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-rw-r--r--arch/mips/include/asm/uasm.h1
-rw-r--r--arch/mips/mm/uasm-micromips.c1
-rw-r--r--arch/mips/mm/uasm-mips.c1
-rw-r--r--arch/mips/mm/uasm.c9
4 files changed, 8 insertions, 4 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 38312d8cde57..abf0845f5007 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -143,6 +143,7 @@ Ip_u2s3u1(_scd);
143Ip_u2s3u1(_sd); 143Ip_u2s3u1(_sd);
144Ip_u2u1u3(_sll); 144Ip_u2u1u3(_sll);
145Ip_u3u2u1(_sllv); 145Ip_u3u2u1(_sllv);
146Ip_u2u1s3(_sltiu);
146Ip_u2u1u3(_sra); 147Ip_u2u1u3(_sra);
147Ip_u2u1u3(_srl); 148Ip_u2u1u3(_srl);
148Ip_u3u2u1(_srlv); 149Ip_u3u2u1(_srlv);
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 6128cf3c8f1c..e81649a0551b 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -98,6 +98,7 @@ static struct insn insn_table_MM[] = {
98 { insn_sd, 0, 0 }, 98 { insn_sd, 0, 0 },
99 { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD }, 99 { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD },
100 { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD }, 100 { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD },
101 { insn_sltiu, M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
101 { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD }, 102 { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD },
102 { insn_srl, M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD }, 103 { insn_srl, M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD },
103 { insn_srlv, M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD }, 104 { insn_srlv, M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD },
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 07184927b733..8231d7ddeccd 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -106,6 +106,7 @@ static struct insn insn_table[] = {
106 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 106 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
107 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, 107 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
108 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, 108 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD },
109 { insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
109 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, 110 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },
110 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, 111 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE },
111 { insn_srlv, M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD }, 112 { insn_srlv, M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD },
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 29fc43278801..3a3d8a21cd56 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -52,10 +52,10 @@ enum opcode {
52 insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld, 52 insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld,
53 insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, 53 insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0,
54 insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, 54 insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe,
55 insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, insn_sra, 55 insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, insn_sltiu,
56 insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, 56 insn_sra, insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync,
57 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_xor, 57 insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait,
58 insn_xori, insn_yield, 58 insn_xor, insn_xori, insn_yield,
59}; 59};
60 60
61struct insn { 61struct insn {
@@ -284,6 +284,7 @@ I_u2s3u1(_scd)
284I_u2s3u1(_sd) 284I_u2s3u1(_sd)
285I_u2u1u3(_sll) 285I_u2u1u3(_sll)
286I_u3u2u1(_sllv) 286I_u3u2u1(_sllv)
287I_u2u1s3(_sltiu)
287I_u2u1u3(_sra) 288I_u2u1u3(_sra)
288I_u2u1u3(_srl) 289I_u2u1u3(_srl)
289I_u3u2u1(_srlv) 290I_u3u2u1(_srlv)