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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 03:34:56 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 03:34:56 -0500
commitf9efbce6334844c7f8b9b9459f6d7a6fbc2928e0 (patch)
tree4490a75f7058885561ab498b68fa68e32cf5b969 /include
parent53575aa99dc1584484b99c8173042d8370f6ed88 (diff)
parent07eb663b7ec7fdb9c325e22e83f5975c724b6249 (diff)
Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Olof Johansson: "Most of this branch consists of updates, additions and general churn of the device tree source files in the kernel (arch/arm/boot/dts). Besides that, there are a few things to point out: - Lots of platform conversion on OMAP2+, with removal of old board files for various platforms. - Final conversion of a bunch of ux500 (ST-Ericsson) platforms as well - Some updates to pinctrl and other subsystems. Most of these are for DT-enablement of the various platforms and acks have been collected" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (385 commits) ARM: dts: bcm11351: Use GIC/IRQ defines for sdio interrupts ARM: dts: bcm: Add missing UARTs for bcm11351 (bcm281xx) ARM: dts: bcm281xx: Add card detect GPIO ARM: dts: rename ARCH_BCM to ARCH_BCM_MOBILE (dt) ARM: bcm281xx: Add device node for the GPIO controller ARM: mvebu: Add Netgear ReadyNAS 104 board ARM: tegra: fix Tegra114 IOMMU register address ARM: kirkwood: add support for OpenBlocks A7 platform ARM: dts: omap4-panda: add DPI pinmuxing ARM: dts: AM33xx: Add RNG node ARM: dts: AM33XX: Add hwspinlock node ARM: dts: OMAP5: Add hwspinlock node ARM: dts: OMAP4: Add hwspinlock node ARM: dts: use 'status' property for PCIe nodes ARM: dts: sirf: add missed address-cells and size-cells for prima2 I2C ARM: dts: sirf: add missed cell, cs and dma channel for SPI nodes ARM: dts: sirf: add missed graphics2d iobg in atlas6 dts ARM: dts: sirf: add missed chhifbg node in prima2 and atlas6 dts ARM: dts: sirf: add missed memcontrol-monitor node in prima2 and atlas6 dts ARM: mvebu: Add the core-divider clock to Armada 370/XP ...
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/mfd/dbx500-prcmu.h83
-rw-r--r--include/dt-bindings/pinctrl/am43xx.h31
-rw-r--r--include/dt-bindings/pinctrl/dra.h50
-rw-r--r--include/linux/mfd/dbx500-prcmu.h70
-rw-r--r--include/linux/platform_data/clk-ux500.h3
-rw-r--r--include/linux/platform_data/pinctrl-single.h12
6 files changed, 181 insertions, 68 deletions
diff --git a/include/dt-bindings/mfd/dbx500-prcmu.h b/include/dt-bindings/mfd/dbx500-prcmu.h
new file mode 100644
index 000000000000..552a2d174f01
--- /dev/null
+++ b/include/dt-bindings/mfd/dbx500-prcmu.h
@@ -0,0 +1,83 @@
1/*
2 * This header provides constants for the PRCMU bindings.
3 *
4 */
5
6#ifndef _DT_BINDINGS_MFD_PRCMU_H
7#define _DT_BINDINGS_MFD_PRCMU_H
8
9/*
10 * Clock identifiers.
11 */
12#define ARMCLK 0
13#define PRCMU_ACLK 1
14#define PRCMU_SVAMMCSPCLK 2
15#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */
16#define PRCMU_SIACLK 3
17#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */
18#define PRCMU_SGACLK 4
19#define PRCMU_UARTCLK 5
20#define PRCMU_MSP02CLK 6
21#define PRCMU_MSP1CLK 7
22#define PRCMU_I2CCLK 8
23#define PRCMU_SDMMCCLK 9
24#define PRCMU_SLIMCLK 10
25#define PRCMU_CAMCLK 10 /* DBx540 only. */
26#define PRCMU_PER1CLK 11
27#define PRCMU_PER2CLK 12
28#define PRCMU_PER3CLK 13
29#define PRCMU_PER5CLK 14
30#define PRCMU_PER6CLK 15
31#define PRCMU_PER7CLK 16
32#define PRCMU_LCDCLK 17
33#define PRCMU_BMLCLK 18
34#define PRCMU_HSITXCLK 19
35#define PRCMU_HSIRXCLK 20
36#define PRCMU_HDMICLK 21
37#define PRCMU_APEATCLK 22
38#define PRCMU_APETRACECLK 23
39#define PRCMU_MCDECLK 24
40#define PRCMU_IPI2CCLK 25
41#define PRCMU_DSIALTCLK 26
42#define PRCMU_DMACLK 27
43#define PRCMU_B2R2CLK 28
44#define PRCMU_TVCLK 29
45#define SPARE_UNIPROCLK 30
46#define PRCMU_SSPCLK 31
47#define PRCMU_RNGCLK 32
48#define PRCMU_UICCCLK 33
49#define PRCMU_G1CLK 34 /* DBx540 only. */
50#define PRCMU_HVACLK 35 /* DBx540 only. */
51#define PRCMU_SPARE1CLK 36
52#define PRCMU_SPARE2CLK 37
53
54#define PRCMU_NUM_REG_CLOCKS 38
55
56#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
57#define PRCMU_SYSCLK 39
58#define PRCMU_CDCLK 40
59#define PRCMU_TIMCLK 41
60#define PRCMU_PLLSOC0 42
61#define PRCMU_PLLSOC1 43
62#define PRCMU_ARMSS 44
63#define PRCMU_PLLDDR 45
64
65/* DSI Clocks */
66#define PRCMU_PLLDSI 46
67#define PRCMU_DSI0CLK 47
68#define PRCMU_DSI1CLK 48
69#define PRCMU_DSI0ESCCLK 49
70#define PRCMU_DSI1ESCCLK 50
71#define PRCMU_DSI2ESCCLK 51
72
73/* LCD DSI PLL - Ux540 only */
74#define PRCMU_PLLDSI_LCD 52
75#define PRCMU_DSI0CLK_LCD 53
76#define PRCMU_DSI1CLK_LCD 54
77#define PRCMU_DSI0ESCCLK_LCD 55
78#define PRCMU_DSI1ESCCLK_LCD 56
79#define PRCMU_DSI2ESCCLK_LCD 57
80
81#define PRCMU_NUM_CLKS 58
82
83#endif
diff --git a/include/dt-bindings/pinctrl/am43xx.h b/include/dt-bindings/pinctrl/am43xx.h
new file mode 100644
index 000000000000..eb6c366adfba
--- /dev/null
+++ b/include/dt-bindings/pinctrl/am43xx.h
@@ -0,0 +1,31 @@
1/*
2 * This header provides constants specific to AM43XX pinctrl bindings.
3 */
4
5#ifndef _DT_BINDINGS_PINCTRL_AM43XX_H
6#define _DT_BINDINGS_PINCTRL_AM43XX_H
7
8#define MUX_MODE0 0
9#define MUX_MODE1 1
10#define MUX_MODE2 2
11#define MUX_MODE3 3
12#define MUX_MODE4 4
13#define MUX_MODE5 5
14#define MUX_MODE6 6
15#define MUX_MODE7 7
16
17#define PULL_DISABLE (1 << 16)
18#define PULL_UP (1 << 17)
19#define INPUT_EN (1 << 18)
20#define SLEWCTRL_FAST (1 << 19)
21#define DS0_PULL_UP_DOWN_EN (1 << 27)
22
23#define PIN_OUTPUT (PULL_DISABLE)
24#define PIN_OUTPUT_PULLUP (PULL_UP)
25#define PIN_OUTPUT_PULLDOWN 0
26#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
27#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
28#define PIN_INPUT_PULLDOWN (INPUT_EN)
29
30#endif
31
diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h
new file mode 100644
index 000000000000..002a2855c046
--- /dev/null
+++ b/include/dt-bindings/pinctrl/dra.h
@@ -0,0 +1,50 @@
1/*
2 * This header provides constants for DRA pinctrl bindings.
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 * Author: Rajendra Nayak <rnayak@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef _DT_BINDINGS_PINCTRL_DRA_H
13#define _DT_BINDINGS_PINCTRL_DRA_H
14
15/* DRA7 mux mode options for each pin. See TRM for options */
16#define MUX_MODE0 0x0
17#define MUX_MODE1 0x1
18#define MUX_MODE2 0x2
19#define MUX_MODE3 0x3
20#define MUX_MODE4 0x4
21#define MUX_MODE5 0x5
22#define MUX_MODE6 0x6
23#define MUX_MODE7 0x7
24#define MUX_MODE8 0x8
25#define MUX_MODE9 0x9
26#define MUX_MODE10 0xa
27#define MUX_MODE11 0xb
28#define MUX_MODE12 0xc
29#define MUX_MODE13 0xd
30#define MUX_MODE14 0xe
31#define MUX_MODE15 0xf
32
33#define PULL_ENA (1 << 16)
34#define PULL_UP (1 << 17)
35#define INPUT_EN (1 << 18)
36#define SLEWCONTROL (1 << 19)
37#define WAKEUP_EN (1 << 24)
38#define WAKEUP_EVENT (1 << 25)
39
40/* Active pin states */
41#define PIN_OUTPUT 0
42#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
43#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
44#define PIN_INPUT INPUT_EN
45#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
46#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
47#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
48
49#endif
50
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index ca0790fba2f5..060e11256fbc 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -12,6 +12,8 @@
12#include <linux/notifier.h> 12#include <linux/notifier.h>
13#include <linux/err.h> 13#include <linux/err.h>
14 14
15#include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
16
15/* Offset for the firmware version within the TCPM */ 17/* Offset for the firmware version within the TCPM */
16#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4 18#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
17#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8 19#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
@@ -94,74 +96,6 @@ enum prcmu_wakeup_index {
94#define PRCMU_CLKSRC_ARMCLKFIX 0x46 96#define PRCMU_CLKSRC_ARMCLKFIX 0x46
95#define PRCMU_CLKSRC_HDMICLK 0x47 97#define PRCMU_CLKSRC_HDMICLK 0x47
96 98
97/*
98 * Clock identifiers.
99 */
100enum prcmu_clock {
101 PRCMU_SGACLK,
102 PRCMU_UARTCLK,
103 PRCMU_MSP02CLK,
104 PRCMU_MSP1CLK,
105 PRCMU_I2CCLK,
106 PRCMU_SDMMCCLK,
107 PRCMU_SPARE1CLK,
108 PRCMU_SLIMCLK,
109 PRCMU_PER1CLK,
110 PRCMU_PER2CLK,
111 PRCMU_PER3CLK,
112 PRCMU_PER5CLK,
113 PRCMU_PER6CLK,
114 PRCMU_PER7CLK,
115 PRCMU_LCDCLK,
116 PRCMU_BMLCLK,
117 PRCMU_HSITXCLK,
118 PRCMU_HSIRXCLK,
119 PRCMU_HDMICLK,
120 PRCMU_APEATCLK,
121 PRCMU_APETRACECLK,
122 PRCMU_MCDECLK,
123 PRCMU_IPI2CCLK,
124 PRCMU_DSIALTCLK,
125 PRCMU_DMACLK,
126 PRCMU_B2R2CLK,
127 PRCMU_TVCLK,
128 PRCMU_SSPCLK,
129 PRCMU_RNGCLK,
130 PRCMU_UICCCLK,
131 PRCMU_PWMCLK,
132 PRCMU_IRDACLK,
133 PRCMU_IRRCCLK,
134 PRCMU_SIACLK,
135 PRCMU_SVACLK,
136 PRCMU_ACLK,
137 PRCMU_HVACLK, /* Ux540 only */
138 PRCMU_G1CLK, /* Ux540 only */
139 PRCMU_SDMMCHCLK,
140 PRCMU_CAMCLK,
141 PRCMU_BML8580CLK,
142 PRCMU_NUM_REG_CLOCKS,
143 PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS,
144 PRCMU_CDCLK,
145 PRCMU_TIMCLK,
146 PRCMU_PLLSOC0,
147 PRCMU_PLLSOC1,
148 PRCMU_ARMSS,
149 PRCMU_PLLDDR,
150 PRCMU_PLLDSI,
151 PRCMU_DSI0CLK,
152 PRCMU_DSI1CLK,
153 PRCMU_DSI0ESCCLK,
154 PRCMU_DSI1ESCCLK,
155 PRCMU_DSI2ESCCLK,
156 /* LCD DSI PLL - Ux540 only */
157 PRCMU_PLLDSI_LCD,
158 PRCMU_DSI0CLK_LCD,
159 PRCMU_DSI1CLK_LCD,
160 PRCMU_DSI0ESCCLK_LCD,
161 PRCMU_DSI1ESCCLK_LCD,
162 PRCMU_DSI2ESCCLK_LCD,
163};
164
165/** 99/**
166 * enum prcmu_wdog_id - PRCMU watchdog IDs 100 * enum prcmu_wdog_id - PRCMU watchdog IDs
167 * @PRCMU_WDOG_ALL: use all timers 101 * @PRCMU_WDOG_ALL: use all timers
diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h
index 9d98f3aaa16c..97baf831e071 100644
--- a/include/linux/platform_data/clk-ux500.h
+++ b/include/linux/platform_data/clk-ux500.h
@@ -10,6 +10,9 @@
10#ifndef __CLK_UX500_H 10#ifndef __CLK_UX500_H
11#define __CLK_UX500_H 11#define __CLK_UX500_H
12 12
13void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
14 u32 clkrst5_base, u32 clkrst6_base);
15
13void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, 16void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
14 u32 clkrst5_base, u32 clkrst6_base); 17 u32 clkrst5_base, u32 clkrst6_base);
15void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, 18void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
diff --git a/include/linux/platform_data/pinctrl-single.h b/include/linux/platform_data/pinctrl-single.h
new file mode 100644
index 000000000000..72eacda9b360
--- /dev/null
+++ b/include/linux/platform_data/pinctrl-single.h
@@ -0,0 +1,12 @@
1/**
2 * irq: optional wake-up interrupt
3 * rearm: optional soc specific rearm function
4 *
5 * Note that the irq and rearm setup should come from device
6 * tree except for omap where there are still some dependencies
7 * to the legacy PRM code.
8 */
9struct pcs_pdata {
10 int irq;
11 void (*rearm)(void);
12};