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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:28:03 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:28:03 -0400
commitdfab34aa61a0f8c14a67d7b4c1dae28e57ba592d (patch)
tree581fd4d7394b838acb70c3c2e5d585b5b8a86b0d /include
parenta7726350e06401929eac0aa0677a5467106565fc (diff)
parent88cf9c5e494795a53ec360d0b38f483a6d4e508f (diff)
Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/gpio/gpio.h15
-rw-r--r--include/dt-bindings/interrupt-controller/arm-gic.h22
-rw-r--r--include/dt-bindings/interrupt-controller/irq.h19
3 files changed, 56 insertions, 0 deletions
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h
new file mode 100644
index 000000000000..e6b1e0a808ae
--- /dev/null
+++ b/include/dt-bindings/gpio/gpio.h
@@ -0,0 +1,15 @@
1/*
2 * This header provides constants for most GPIO bindings.
3 *
4 * Most GPIO bindings include a flags cell as part of the GPIO specifier.
5 * In most cases, the format of the flags cell uses the standard values
6 * defined in this header.
7 */
8
9#ifndef _DT_BINDINGS_GPIO_GPIO_H
10#define _DT_BINDINGS_GPIO_GPIO_H
11
12#define GPIO_ACTIVE_HIGH 0
13#define GPIO_ACTIVE_LOW 1
14
15#endif
diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h
new file mode 100644
index 000000000000..1ea1b702fec2
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/arm-gic.h
@@ -0,0 +1,22 @@
1/*
2 * This header provides constants for the ARM GIC.
3 */
4
5#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
6#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
7
8#include <dt-bindings/interrupt-controller/irq.h>
9
10/* interrupt specific cell 0 */
11
12#define GIC_SPI 0
13#define GIC_PPI 1
14
15/*
16 * Interrupt specifier cell 2.
17 * The flaggs in irq.h are valid, plus those below.
18 */
19#define GIC_CPU_MASK_RAW(x) ((x) << 8)
20#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
21
22#endif
diff --git a/include/dt-bindings/interrupt-controller/irq.h b/include/dt-bindings/interrupt-controller/irq.h
new file mode 100644
index 000000000000..33a1003c55aa
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/irq.h
@@ -0,0 +1,19 @@
1/*
2 * This header provides constants for most IRQ bindings.
3 *
4 * Most IRQ bindings include a flags cell as part of the IRQ specifier.
5 * In most cases, the format of the flags cell uses the standard values
6 * defined in this header.
7 */
8
9#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
10#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
11
12#define IRQ_TYPE_NONE 0
13#define IRQ_TYPE_EDGE_RISING 1
14#define IRQ_TYPE_EDGE_FALLING 2
15#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
16#define IRQ_TYPE_LEVEL_HIGH 4
17#define IRQ_TYPE_LEVEL_LOW 8
18
19#endif