Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (69 commits)
  [POWERPC] Add SPE registers to core dumps
  [POWERPC] Use regset code for compat PTRACE_*REGS* calls
  [POWERPC] Use generic compat_sys_ptrace
  [POWERPC] Use generic compat_ptrace_request
  [POWERPC] Use generic ptrace peekdata/pokedata
  [POWERPC] Use regset code for PTRACE_*REGS* requests
  [POWERPC] Switch to generic compat_binfmt_elf code
  [POWERPC] Switch to using user_regset-based core dumps
  [POWERPC] Add user_regset compat support
  [POWERPC] Add user_regset_view definitions
  [POWERPC] Use user_regset accessors for GPRs
  [POWERPC] ptrace accessors for special regs MSR and TRAP
  [POWERPC] Use user_regset accessors for SPE regs
  [POWERPC] Use user_regset accessors for altivec regs
  [POWERPC] Use user_regset accessors for FP regs
  [POWERPC] mpc52xx: fix compile error introduce when rebasing patch
  [POWERPC] 4xx: PCIe indirect DCR spinlock fix.
  [POWERPC] Add missing native dcr dcr_ind_lock spinlock
  [POWERPC] 4xx: Fix offset value on Warp board
  [POWERPC] 4xx: Add 440EPx Sequoia ehci dts entry
  ...

14 files changed, 185 insertions, 84 deletions

diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 528ef183c221..1e79673b7316 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -46,7 +46,7 @@ enum powerpc_oprofile_type {
         PPC_OPROFILE_RS64 = 1,
         PPC_OPROFILE_POWER4 = 2,
         PPC_OPROFILE_G4 = 3,
-        PPC_OPROFILE_BOOKE = 4,
+        PPC_OPROFILE_FSL_EMB = 4,
         PPC_OPROFILE_CELL = 5,
         PPC_OPROFILE_PA6T = 6,
 };
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index af5fb31af559..be6c879e8760 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -59,25 +59,36 @@ do {								\
 /* R/W of indirect DCRs make use of standard naming conventions for DCRs */
 extern spinlock_t dcr_ind_lock;
 
-#define mfdcri(base, reg)                               \
-({                                                      \
-        unsigned long flags;                            \
-        unsigned int val;                               \
-        spin_lock_irqsave(&dcr_ind_lock, flags);        \
-        mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg);      \
-        val = mfdcr(DCRN_ ## base ## _CONFIG_DATA);     \
-        spin_unlock_irqrestore(&dcr_ind_lock, flags);   \
-        val;                                            \
-})
+static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
+{
+        unsigned long flags;
+        unsigned int val;
 
-#define mtdcri(base, reg, data)                         \
-do {                                                    \
-        unsigned long flags;                            \
-        spin_lock_irqsave(&dcr_ind_lock, flags);        \
-        mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg);      \
-        mtdcr(DCRN_ ## base ## _CONFIG_DATA, data);     \
-        spin_unlock_irqrestore(&dcr_ind_lock, flags);   \
-} while (0)
+        spin_lock_irqsave(&dcr_ind_lock, flags);
+        __mtdcr(base_addr, reg);
+        val = __mfdcr(base_data);
+        spin_unlock_irqrestore(&dcr_ind_lock, flags);
+        return val;
+}
+
+static inline void __mtdcri(int base_addr, int base_data, int reg,
+                            unsigned val)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&dcr_ind_lock, flags);
+        __mtdcr(base_addr, reg);
+        __mtdcr(base_data, val);
+        spin_unlock_irqrestore(&dcr_ind_lock, flags);
+}
+
+#define mfdcri(base, reg)       __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \
+                                         DCRN_ ## base ## _CONFIG_DATA, \
+                                         reg)
+
+#define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \
+                                         DCRN_ ## base ## _CONFIG_DATA, \
+                                         reg, data)
 
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index 6bd07ef78ac4..9080d85cb9d0 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -165,8 +165,10 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
  * This is used to ensure we don't load something for the wrong architecture.
  */
 #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
+#define compat_elf_check_arch(x)        ((x)->e_machine == EM_PPC)
 
 #define USE_ELF_CORE_DUMP
+#define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/include/asm-powerpc/mpc512x.h b/include/asm-powerpc/mpc512x.h
new file mode 100644
index 000000000000..c48a1658eeac
--- /dev/null
+++ b/include/asm-powerpc/mpc512x.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007
+ *
+ * Description:
+ * MPC5121 Prototypes and definitions
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_POWERPC_MPC512x_H__
+#define __ASM_POWERPC_MPC512x_H__
+
+extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
+
+#endif /* __ASM_POWERPC_MPC512x_H__ */
+
diff --git a/include/asm-powerpc/mpc52xx_psc.h b/include/asm-powerpc/mpc52xx_psc.h
index bea42b95390f..710c5d36efaa 100644
--- a/include/asm-powerpc/mpc52xx_psc.h
+++ b/include/asm-powerpc/mpc52xx_psc.h
@@ -190,5 +190,53 @@ struct mpc52xx_psc_fifo {
         u16             tflwfptr;       /* PSC + 0x9e */
 };
 
+#define MPC512x_PSC_FIFO_RESET_SLICE    0x80
+#define MPC512x_PSC_FIFO_ENABLE_SLICE   0x01
+#define MPC512x_PSC_FIFO_ENABLE_DMA     0x04
+
+#define MPC512x_PSC_FIFO_EMPTY          0x1
+#define MPC512x_PSC_FIFO_FULL           0x2
+#define MPC512x_PSC_FIFO_ALARM          0x4
+#define MPC512x_PSC_FIFO_URERR          0x8
+#define MPC512x_PSC_FIFO_ORERR          0x01
+#define MPC512x_PSC_FIFO_MEMERROR       0x02
+
+struct mpc512x_psc_fifo {
+        u32             reserved1[10];
+        u32             txcmd;          /* PSC + 0x80 */
+        u32             txalarm;        /* PSC + 0x84 */
+        u32             txsr;           /* PSC + 0x88 */
+        u32             txisr;          /* PSC + 0x8c */
+        u32             tximr;          /* PSC + 0x90 */
+        u32             txcnt;          /* PSC + 0x94 */
+        u32             txptr;          /* PSC + 0x98 */
+        u32             txsz;           /* PSC + 0x9c */
+        u32             reserved2[7];
+        union {
+                u8      txdata_8;
+                u16     txdata_16;
+                u32     txdata_32;
+        } txdata;                       /* PSC + 0xbc */
+#define txdata_8 txdata.txdata_8
+#define txdata_16 txdata.txdata_16
+#define txdata_32 txdata.txdata_32
+        u32             rxcmd;          /* PSC + 0xc0 */
+        u32             rxalarm;        /* PSC + 0xc4 */
+        u32             rxsr;           /* PSC + 0xc8 */
+        u32             rxisr;          /* PSC + 0xcc */
+        u32             rximr;          /* PSC + 0xd0 */
+        u32             rxcnt;          /* PSC + 0xd4 */
+        u32             rxptr;          /* PSC + 0xd8 */
+        u32             rxsz;           /* PSC + 0xdc */
+        u32             reserved3[7];
+        union {
+                u8      rxdata_8;
+                u16     rxdata_16;
+                u32     rxdata_32;
+        } rxdata;                       /* PSC + 0xfc */
+#define rxdata_8 rxdata.rxdata_8
+#define rxdata_16 rxdata.rxdata_16
+#define rxdata_32 rxdata.rxdata_32
+};
 
 #endif  /* __ASM_MPC52xx_PSC_H__ */
diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h
index 938fefb4c4bc..95035c602ba6 100644
--- a/include/asm-powerpc/oprofile_impl.h
+++ b/include/asm-powerpc/oprofile_impl.h
@@ -54,7 +54,7 @@ struct op_powerpc_model {
         int num_counters;
 };
 
-extern struct op_powerpc_model op_model_fsl_booke;
+extern struct op_powerpc_model op_model_fsl_emb;
 extern struct op_powerpc_model op_model_rs64;
 extern struct op_powerpc_model op_model_power4;
 extern struct op_powerpc_model op_model_7450;
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index ffc150f602b8..891d68932f39 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -55,6 +55,8 @@ struct pt_regs {
 
 #ifdef __powerpc64__
 
+#define __ARCH_WANT_COMPAT_SYS_PTRACE
+
 #define STACK_FRAME_OVERHEAD    112     /* size of minimum stack frame */
 
 /* Size of dummy stack frame allocated when calling signal handler. */
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 2408a29507e5..0d6238987df8 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -18,6 +18,10 @@
 #include <asm/reg_booke.h>
 #endif /* CONFIG_BOOKE || CONFIG_40x */
 
+#ifdef CONFIG_FSL_EMB_PERFMON
+#include <asm/reg_fsl_emb.h>
+#endif
+
 #ifdef CONFIG_8xx
 #include <asm/reg_8xx.h>
 #endif /* CONFIG_8xx */
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index 0405ef479814..cf54a3f31753 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -9,68 +9,6 @@
 #ifndef __ASM_POWERPC_REG_BOOKE_H__
 #define __ASM_POWERPC_REG_BOOKE_H__
 
-#ifndef __ASSEMBLY__
-/* Performance Monitor Registers */
-#define mfpmr(rn)       ({unsigned int rval; \
-                        asm volatile("mfpmr %0," __stringify(rn) \
-                                     : "=r" (rval)); rval;})
-#define mtpmr(rn, v)    asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
-#endif /* __ASSEMBLY__ */
-
-/* Freescale Book E Performance Monitor APU Registers */
-#define PMRN_PMC0       0x010   /* Performance Monitor Counter 0 */
-#define PMRN_PMC1       0x011   /* Performance Monitor Counter 1 */
-#define PMRN_PMC2       0x012   /* Performance Monitor Counter 1 */
-#define PMRN_PMC3       0x013   /* Performance Monitor Counter 1 */
-#define PMRN_PMLCA0     0x090   /* PM Local Control A0 */
-#define PMRN_PMLCA1     0x091   /* PM Local Control A1 */
-#define PMRN_PMLCA2     0x092   /* PM Local Control A2 */
-#define PMRN_PMLCA3     0x093   /* PM Local Control A3 */
-
-#define PMLCA_FC        0x80000000      /* Freeze Counter */
-#define PMLCA_FCS       0x40000000      /* Freeze in Supervisor */
-#define PMLCA_FCU       0x20000000      /* Freeze in User */
-#define PMLCA_FCM1      0x10000000      /* Freeze when PMM==1 */
-#define PMLCA_FCM0      0x08000000      /* Freeze when PMM==0 */
-#define PMLCA_CE        0x04000000      /* Condition Enable */
-
-#define PMLCA_EVENT_MASK 0x007f0000     /* Event field */
-#define PMLCA_EVENT_SHIFT       16
-
-#define PMRN_PMLCB0     0x110   /* PM Local Control B0 */
-#define PMRN_PMLCB1     0x111   /* PM Local Control B1 */
-#define PMRN_PMLCB2     0x112   /* PM Local Control B2 */
-#define PMRN_PMLCB3     0x113   /* PM Local Control B3 */
-
-#define PMLCB_THRESHMUL_MASK    0x0700  /* Threshhold Multiple Field */
-#define PMLCB_THRESHMUL_SHIFT   8
-
-#define PMLCB_THRESHOLD_MASK    0x003f  /* Threshold Field */
-#define PMLCB_THRESHOLD_SHIFT   0
-
-#define PMRN_PMGC0      0x190   /* PM Global Control 0 */
-
-#define PMGC0_FAC       0x80000000      /* Freeze all Counters */
-#define PMGC0_PMIE      0x40000000      /* Interrupt Enable */
-#define PMGC0_FCECE     0x20000000      /* Freeze countes on
-                                           Enabled Condition or
-                                           Event */
-
-#define PMRN_UPMC0      0x000   /* User Performance Monitor Counter 0 */
-#define PMRN_UPMC1      0x001   /* User Performance Monitor Counter 1 */
-#define PMRN_UPMC2      0x002   /* User Performance Monitor Counter 1 */
-#define PMRN_UPMC3      0x003   /* User Performance Monitor Counter 1 */
-#define PMRN_UPMLCA0    0x080   /* User PM Local Control A0 */
-#define PMRN_UPMLCA1    0x081   /* User PM Local Control A1 */
-#define PMRN_UPMLCA2    0x082   /* User PM Local Control A2 */
-#define PMRN_UPMLCA3    0x083   /* User PM Local Control A3 */
-#define PMRN_UPMLCB0    0x100   /* User PM Local Control B0 */
-#define PMRN_UPMLCB1    0x101   /* User PM Local Control B1 */
-#define PMRN_UPMLCB2    0x102   /* User PM Local Control B2 */
-#define PMRN_UPMLCB3    0x103   /* User PM Local Control B3 */
-#define PMRN_UPMGC0     0x180   /* User PM Global Control 0 */
-
-
 /* Machine State Register (MSR) Fields */
 #define MSR_UCLE        (1<<26) /* User-mode cache lock enable */
 #define MSR_SPE         (1<<25) /* Enable SPE */
diff --git a/include/asm-powerpc/reg_fsl_emb.h b/include/asm-powerpc/reg_fsl_emb.h
new file mode 100644
index 000000000000..1e180a594589
--- /dev/null
+++ b/include/asm-powerpc/reg_fsl_emb.h
@@ -0,0 +1,72 @@
+/*
+ * Contains register definitions for the Freescale Embedded Performance
+ * Monitor.
+ */
+#ifdef __KERNEL__
+#ifndef __ASM_POWERPC_REG_FSL_EMB_H__
+#define __ASM_POWERPC_REG_FSL_EMB_H__
+
+#ifndef __ASSEMBLY__
+/* Performance Monitor Registers */
+#define mfpmr(rn)       ({unsigned int rval; \
+                        asm volatile("mfpmr %0," __stringify(rn) \
+                                     : "=r" (rval)); rval;})
+#define mtpmr(rn, v)    asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
+#endif /* __ASSEMBLY__ */
+
+/* Freescale Book E Performance Monitor APU Registers */
+#define PMRN_PMC0       0x010   /* Performance Monitor Counter 0 */
+#define PMRN_PMC1       0x011   /* Performance Monitor Counter 1 */
+#define PMRN_PMC2       0x012   /* Performance Monitor Counter 1 */
+#define PMRN_PMC3       0x013   /* Performance Monitor Counter 1 */
+#define PMRN_PMLCA0     0x090   /* PM Local Control A0 */
+#define PMRN_PMLCA1     0x091   /* PM Local Control A1 */
+#define PMRN_PMLCA2     0x092   /* PM Local Control A2 */
+#define PMRN_PMLCA3     0x093   /* PM Local Control A3 */
+
+#define PMLCA_FC        0x80000000      /* Freeze Counter */
+#define PMLCA_FCS       0x40000000      /* Freeze in Supervisor */
+#define PMLCA_FCU       0x20000000      /* Freeze in User */
+#define PMLCA_FCM1      0x10000000      /* Freeze when PMM==1 */
+#define PMLCA_FCM0      0x08000000      /* Freeze when PMM==0 */
+#define PMLCA_CE        0x04000000      /* Condition Enable */
+
+#define PMLCA_EVENT_MASK 0x007f0000     /* Event field */
+#define PMLCA_EVENT_SHIFT       16
+
+#define PMRN_PMLCB0     0x110   /* PM Local Control B0 */
+#define PMRN_PMLCB1     0x111   /* PM Local Control B1 */
+#define PMRN_PMLCB2     0x112   /* PM Local Control B2 */
+#define PMRN_PMLCB3     0x113   /* PM Local Control B3 */
+
+#define PMLCB_THRESHMUL_MASK    0x0700  /* Threshhold Multiple Field */
+#define PMLCB_THRESHMUL_SHIFT   8
+
+#define PMLCB_THRESHOLD_MASK    0x003f  /* Threshold Field */
+#define PMLCB_THRESHOLD_SHIFT   0
+
+#define PMRN_PMGC0      0x190   /* PM Global Control 0 */
+
+#define PMGC0_FAC       0x80000000      /* Freeze all Counters */
+#define PMGC0_PMIE      0x40000000      /* Interrupt Enable */
+#define PMGC0_FCECE     0x20000000      /* Freeze countes on
+                                           Enabled Condition or
+                                           Event */
+
+#define PMRN_UPMC0      0x000   /* User Performance Monitor Counter 0 */
+#define PMRN_UPMC1      0x001   /* User Performance Monitor Counter 1 */
+#define PMRN_UPMC2      0x002   /* User Performance Monitor Counter 1 */
+#define PMRN_UPMC3      0x003   /* User Performance Monitor Counter 1 */
+#define PMRN_UPMLCA0    0x080   /* User PM Local Control A0 */
+#define PMRN_UPMLCA1    0x081   /* User PM Local Control A1 */
+#define PMRN_UPMLCA2    0x082   /* User PM Local Control A2 */
+#define PMRN_UPMLCA3    0x083   /* User PM Local Control A3 */
+#define PMRN_UPMLCB0    0x100   /* User PM Local Control B0 */
+#define PMRN_UPMLCB1    0x101   /* User PM Local Control B1 */
+#define PMRN_UPMLCB2    0x102   /* User PM Local Control B2 */
+#define PMRN_UPMLCB3    0x103   /* User PM Local Control B3 */
+#define PMRN_UPMGC0     0x180   /* User PM Global Control 0 */
+
+
+#endif /* __ASM_POWERPC_REG_FSL_EMB_H__ */
+#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 2a65ae637204..29552ff182aa 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -65,7 +65,7 @@
 struct task_struct;
 struct pt_regs;
 
-#ifdef CONFIG_DEBUGGER
+#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 
 extern int (*__debugger)(struct pt_regs *regs);
 extern int (*__debugger_ipi)(struct pt_regs *regs);
diff --git a/include/asm-powerpc/vio.h b/include/asm-powerpc/vio.h
index 9204c15839c5..56512a968dab 100644
--- a/include/asm-powerpc/vio.h
+++ b/include/asm-powerpc/vio.h
@@ -66,7 +66,7 @@ extern void __devinit vio_unregister_device(struct vio_dev *dev);
 
 struct device_node;
 
-extern struct vio_dev * __devinit vio_register_device_node(
+extern struct vio_dev *vio_register_device_node(
                 struct device_node *node_vdev);
 extern const void *vio_get_attribute(struct vio_dev *vdev, char *which,
                 int *length);
diff --git a/include/linux/elf.h b/include/linux/elf.h
index ed98c761bae7..bad1b16ec49a 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -357,6 +357,7 @@ typedef struct elf64_shdr {
 #define NT_AUXV         6
 #define NT_PRXFPREG     0x46e62b7f      /* copied from gdb5.1/include/elf/common.h */
 #define NT_PPC_VMX      0x100           /* PowerPC Altivec/VMX registers */
+#define NT_PPC_SPE      0x101           /* PowerPC SPE/EVR registers */
 #define NT_386_TLS      0x200           /* i386 TLS slots (struct user_desc) */
 
 
diff --git a/include/linux/of.h b/include/linux/of.h
index b5f33efcb8e2..6981016dcc25 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -50,6 +50,7 @@ extern struct device_node *of_find_matching_node(struct device_node *from,
 extern struct device_node *of_find_node_by_path(const char *path);
 extern struct device_node *of_find_node_by_phandle(phandle handle);
 extern struct device_node *of_get_parent(const struct device_node *node);
+extern struct device_node *of_get_next_parent(struct device_node *node);
 extern struct device_node *of_get_next_child(const struct device_node *node,
                                              struct device_node *prev);
 #define for_each_child_of_node(parent, child) \