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authorTomeu Vizoso <tomeu.vizoso@collabora.com>2015-01-23 06:03:31 -0500
committerMichael Turquette <mturquette@linaro.org>2015-02-02 17:23:42 -0500
commit1c8e600440c7f5036bd9a94526d01e9c7cb68dca (patch)
tree36c9811e976332bc23a00a6fb216dce5e6b55a5a /include
parentb09d6d99102504a929cfaba4cd0e07658d7f01d1 (diff)
clk: Add rate constraints to clocks
Adds a way for clock consumers to set maximum and minimum rates. This can be used for thermal drivers to set minimum rates, or by misc. drivers to set maximum rates to assure a minimum performance level. Changes the signature of the determine_rate callback by adding the parameters min_rate and max_rate. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [sboyd@codeaurora.org: set req_rate in __clk_init] Signed-off-by: Michael Turquette <mturquette@linaro.org> [mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate migrated clk-private.h changes to clk.c]
Diffstat (limited to 'include')
-rw-r--r--include/linux/clk-provider.h17
-rw-r--r--include/linux/clk.h28
-rw-r--r--include/linux/clk/ti.h4
3 files changed, 46 insertions, 3 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 12f13b0673af..17dd6e9439d1 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -175,9 +175,12 @@ struct clk_ops {
175 unsigned long parent_rate); 175 unsigned long parent_rate);
176 long (*round_rate)(struct clk_hw *hw, unsigned long rate, 176 long (*round_rate)(struct clk_hw *hw, unsigned long rate,
177 unsigned long *parent_rate); 177 unsigned long *parent_rate);
178 long (*determine_rate)(struct clk_hw *hw, unsigned long rate, 178 long (*determine_rate)(struct clk_hw *hw,
179 unsigned long *best_parent_rate, 179 unsigned long rate,
180 struct clk_hw **best_parent_hw); 180 unsigned long min_rate,
181 unsigned long max_rate,
182 unsigned long *best_parent_rate,
183 struct clk_hw **best_parent_hw);
181 int (*set_parent)(struct clk_hw *hw, u8 index); 184 int (*set_parent)(struct clk_hw *hw, u8 index);
182 u8 (*get_parent)(struct clk_hw *hw); 185 u8 (*get_parent)(struct clk_hw *hw);
183 int (*set_rate)(struct clk_hw *hw, unsigned long rate, 186 int (*set_rate)(struct clk_hw *hw, unsigned long rate,
@@ -573,9 +576,17 @@ bool __clk_is_prepared(struct clk *clk);
573bool __clk_is_enabled(struct clk *clk); 576bool __clk_is_enabled(struct clk *clk);
574struct clk *__clk_lookup(const char *name); 577struct clk *__clk_lookup(const char *name);
575long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, 578long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
579 unsigned long min_rate,
580 unsigned long max_rate,
576 unsigned long *best_parent_rate, 581 unsigned long *best_parent_rate,
577 struct clk_hw **best_parent_p); 582 struct clk_hw **best_parent_p);
583unsigned long __clk_determine_rate(struct clk_hw *core,
584 unsigned long rate,
585 unsigned long min_rate,
586 unsigned long max_rate);
578long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, 587long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
588 unsigned long min_rate,
589 unsigned long max_rate,
579 unsigned long *best_parent_rate, 590 unsigned long *best_parent_rate,
580 struct clk_hw **best_parent_p); 591 struct clk_hw **best_parent_p);
581 592
diff --git a/include/linux/clk.h b/include/linux/clk.h
index ba7e9eda4347..8381bbfbc308 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -314,6 +314,34 @@ int clk_set_rate(struct clk *clk, unsigned long rate);
314bool clk_has_parent(struct clk *clk, struct clk *parent); 314bool clk_has_parent(struct clk *clk, struct clk *parent);
315 315
316/** 316/**
317 * clk_set_rate_range - set a rate range for a clock source
318 * @clk: clock source
319 * @min: desired minimum clock rate in Hz, inclusive
320 * @max: desired maximum clock rate in Hz, inclusive
321 *
322 * Returns success (0) or negative errno.
323 */
324int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max);
325
326/**
327 * clk_set_min_rate - set a minimum clock rate for a clock source
328 * @clk: clock source
329 * @rate: desired minimum clock rate in Hz, inclusive
330 *
331 * Returns success (0) or negative errno.
332 */
333int clk_set_min_rate(struct clk *clk, unsigned long rate);
334
335/**
336 * clk_set_max_rate - set a maximum clock rate for a clock source
337 * @clk: clock source
338 * @rate: desired maximum clock rate in Hz, inclusive
339 *
340 * Returns success (0) or negative errno.
341 */
342int clk_set_max_rate(struct clk *clk, unsigned long rate);
343
344/**
317 * clk_set_parent - set the parent clock source for this clock 345 * clk_set_parent - set the parent clock source for this clock
318 * @clk: clock source 346 * @clk: clock source
319 * @parent: parent clock source 347 * @parent: parent clock source
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 310122dcd9b5..0eac65054283 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -271,6 +271,8 @@ int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw,
271 u8 index); 271 u8 index);
272long omap3_noncore_dpll_determine_rate(struct clk_hw *hw, 272long omap3_noncore_dpll_determine_rate(struct clk_hw *hw,
273 unsigned long rate, 273 unsigned long rate,
274 unsigned long min_rate,
275 unsigned long max_rate,
274 unsigned long *best_parent_rate, 276 unsigned long *best_parent_rate,
275 struct clk_hw **best_parent_clk); 277 struct clk_hw **best_parent_clk);
276unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, 278unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
@@ -280,6 +282,8 @@ long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
280 unsigned long *parent_rate); 282 unsigned long *parent_rate);
281long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, 283long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
282 unsigned long rate, 284 unsigned long rate,
285 unsigned long min_rate,
286 unsigned long max_rate,
283 unsigned long *best_parent_rate, 287 unsigned long *best_parent_rate,
284 struct clk_hw **best_parent_clk); 288 struct clk_hw **best_parent_clk);
285u8 omap2_init_dpll_parent(struct clk_hw *hw); 289u8 omap2_init_dpll_parent(struct clk_hw *hw);