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authorDave Airlie <airlied@redhat.com>2015-04-19 21:32:26 -0400
committerDave Airlie <airlied@redhat.com>2015-04-19 23:05:20 -0400
commit2c33ce009ca2389dbf0535d0672214d09738e35e (patch)
tree6186a6458c3c160385d794a23eaf07c786a9e61b /include/linux/mlx4/device.h
parentcec32a47010647e8b0603726ebb75b990a4057a4 (diff)
parent09d51602cf84a1264946711dd4ea0dddbac599a1 (diff)
Merge Linus master into drm-next
The merge is clean, but the arm build fails afterwards, due to API changes in the regulator tree. I've included the patch into the merge to fix the build. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'include/linux/mlx4/device.h')
-rw-r--r--include/linux/mlx4/device.h40
1 files changed, 33 insertions, 7 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index e4ebff7e9d02..f9ce34bec45b 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -49,8 +49,6 @@
49#define MSIX_LEGACY_SZ 4 49#define MSIX_LEGACY_SZ 4
50#define MIN_MSIX_P_PORT 5 50#define MIN_MSIX_P_PORT 5
51 51
52#define MLX4_NUM_UP 8
53#define MLX4_NUM_TC 8
54#define MLX4_MAX_100M_UNITS_VAL 255 /* 52#define MLX4_MAX_100M_UNITS_VAL 255 /*
55 * work around: can't set values 53 * work around: can't set values
56 * greater then this value when 54 * greater then this value when
@@ -174,6 +172,7 @@ enum {
174 MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41, 172 MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41,
175 MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42, 173 MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42,
176 MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48, 174 MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48,
175 MLX4_DEV_CAP_FLAG_RSS_IP_FRAG = 1LL << 52,
177 MLX4_DEV_CAP_FLAG_SET_ETH_SCHED = 1LL << 53, 176 MLX4_DEV_CAP_FLAG_SET_ETH_SCHED = 1LL << 53,
178 MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55, 177 MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55,
179 MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 59, 178 MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 59,
@@ -203,7 +202,14 @@ enum {
203 MLX4_DEV_CAP_FLAG2_80_VFS = 1LL << 18, 202 MLX4_DEV_CAP_FLAG2_80_VFS = 1LL << 18,
204 MLX4_DEV_CAP_FLAG2_FS_A0 = 1LL << 19, 203 MLX4_DEV_CAP_FLAG2_FS_A0 = 1LL << 19,
205 MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT = 1LL << 20, 204 MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT = 1LL << 20,
206 MLX4_DEV_CAP_FLAG2_PORT_REMAP = 1LL << 21 205 MLX4_DEV_CAP_FLAG2_PORT_REMAP = 1LL << 21,
206 MLX4_DEV_CAP_FLAG2_QCN = 1LL << 22,
207 MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT = 1LL << 23,
208 MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN = 1LL << 24,
209 MLX4_DEV_CAP_FLAG2_QOS_VPP = 1LL << 25,
210 MLX4_DEV_CAP_FLAG2_ETS_CFG = 1LL << 26,
211 MLX4_DEV_CAP_FLAG2_PORT_BEACON = 1LL << 27,
212 MLX4_DEV_CAP_FLAG2_IGNORE_FCS = 1LL << 28,
207}; 213};
208 214
209enum { 215enum {
@@ -449,6 +455,21 @@ enum mlx4_module_id {
449 MLX4_MODULE_ID_QSFP28 = 0x11, 455 MLX4_MODULE_ID_QSFP28 = 0x11,
450}; 456};
451 457
458enum { /* rl */
459 MLX4_QP_RATE_LIMIT_NONE = 0,
460 MLX4_QP_RATE_LIMIT_KBS = 1,
461 MLX4_QP_RATE_LIMIT_MBS = 2,
462 MLX4_QP_RATE_LIMIT_GBS = 3
463};
464
465struct mlx4_rate_limit_caps {
466 u16 num_rates; /* Number of different rates */
467 u8 min_unit;
468 u16 min_val;
469 u8 max_unit;
470 u16 max_val;
471};
472
452static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) 473static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
453{ 474{
454 return (major << 32) | (minor << 16) | subminor; 475 return (major << 32) | (minor << 16) | subminor;
@@ -564,6 +585,7 @@ struct mlx4_caps {
564 u32 dmfs_high_rate_qpn_base; 585 u32 dmfs_high_rate_qpn_base;
565 u32 dmfs_high_rate_qpn_range; 586 u32 dmfs_high_rate_qpn_range;
566 u32 vf_caps; 587 u32 vf_caps;
588 struct mlx4_rate_limit_caps rl_caps;
567}; 589};
568 590
569struct mlx4_buf_list { 591struct mlx4_buf_list {
@@ -982,6 +1004,11 @@ static inline int mlx4_is_slave(struct mlx4_dev *dev)
982 return dev->flags & MLX4_FLAG_SLAVE; 1004 return dev->flags & MLX4_FLAG_SLAVE;
983} 1005}
984 1006
1007static inline int mlx4_is_eth(struct mlx4_dev *dev, int port)
1008{
1009 return dev->caps.port_type[port] == MLX4_PORT_TYPE_IB ? 0 : 1;
1010}
1011
985int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, 1012int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
986 struct mlx4_buf *buf, gfp_t gfp); 1013 struct mlx4_buf *buf, gfp_t gfp);
987void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); 1014void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
@@ -1282,14 +1309,13 @@ int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac);
1282void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); 1309void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac);
1283int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port); 1310int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port);
1284int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); 1311int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac);
1285void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap);
1286int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, 1312int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
1287 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); 1313 u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx);
1288int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, 1314int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
1289 u8 promisc); 1315 u8 promisc);
1290int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc); 1316int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time);
1291int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw, 1317int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port,
1292 u8 *pg, u16 *ratelimit); 1318 u8 ignore_fcs_value);
1293int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable); 1319int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable);
1294int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx); 1320int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx);
1295int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); 1321int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx);