Merge Linus master into drm-next

The merge is clean, but the arm build fails afterwards,
due to API changes in the regulator tree.

I've included the patch into the merge to fix the build.

Signed-off-by: Dave Airlie <airlied@redhat.com>

3 files changed, 72 insertions, 12 deletions

diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h
index 7b6d4e9ff603..f62e7cf227c6 100644
--- a/include/linux/mlx4/cmd.h
+++ b/include/linux/mlx4/cmd.h
@@ -68,6 +68,8 @@ enum {
         MLX4_CMD_UNMAP_ICM_AUX   = 0xffb,
         MLX4_CMD_SET_ICM_SIZE    = 0xffd,
         MLX4_CMD_ACCESS_REG      = 0x3b,
+        MLX4_CMD_ALLOCATE_VPP    = 0x80,
+        MLX4_CMD_SET_VPORT_QOS   = 0x81,
 
         /*master notify fw on finish for slave's flr*/
         MLX4_CMD_INFORM_FLR_DONE = 0x5b,
@@ -163,6 +165,9 @@ enum {
         MLX4_QP_FLOW_STEERING_ATTACH = 0x65,
         MLX4_QP_FLOW_STEERING_DETACH = 0x66,
         MLX4_FLOW_STEERING_IB_UC_QP_RANGE = 0x64,
+
+        /* Update and read QCN parameters */
+        MLX4_CMD_CONGESTION_CTRL_OPCODE = 0x68,
 };
 
 enum {
@@ -183,7 +188,14 @@ enum {
 };
 
 enum {
-        /* set port opcode modifiers */
+        /* Set port opcode modifiers */
+        MLX4_SET_PORT_IB_OPCODE         = 0x0,
+        MLX4_SET_PORT_ETH_OPCODE        = 0x1,
+        MLX4_SET_PORT_BEACON_OPCODE     = 0x4,
+};
+
+enum {
+        /* Set port Ethernet input modifiers */
         MLX4_SET_PORT_GENERAL   = 0x0,
         MLX4_SET_PORT_RQP_CALC  = 0x1,
         MLX4_SET_PORT_MAC_TABLE = 0x2,
@@ -233,6 +245,16 @@ struct mlx4_config_dev_params {
         u8      rx_csum_flags_port_2;
 };
 
+enum mlx4_en_congestion_control_algorithm {
+        MLX4_CTRL_ALGO_802_1_QAU_REACTION_POINT = 0,
+};
+
+enum mlx4_en_congestion_control_opmod {
+        MLX4_CONGESTION_CONTROL_GET_PARAMS,
+        MLX4_CONGESTION_CONTROL_GET_STATISTICS,
+        MLX4_CONGESTION_CONTROL_SET_PARAMS = 4,
+};
+
 struct mlx4_dev;
 
 struct mlx4_cmd_mailbox {
@@ -281,6 +303,8 @@ void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbo
 u32 mlx4_comm_get_version(void);
 int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u64 mac);
 int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan, u8 qos);
+int mlx4_set_vf_rate(struct mlx4_dev *dev, int port, int vf, int min_tx_rate,
+                     int max_tx_rate);
 int mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting);
 int mlx4_get_vf_config(struct mlx4_dev *dev, int port, int vf, struct ifla_vf_info *ivf);
 int mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_state);
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index e4ebff7e9d02..f9ce34bec45b 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -49,8 +49,6 @@
 #define MSIX_LEGACY_SZ          4
 #define MIN_MSIX_P_PORT         5
 
-#define MLX4_NUM_UP                     8
-#define MLX4_NUM_TC                     8
 #define MLX4_MAX_100M_UNITS_VAL         255     /*
                                                  * work around: can't set values
                                                  * greater then this value when
@@ -174,6 +172,7 @@ enum {
         MLX4_DEV_CAP_FLAG_VEP_UC_STEER  = 1LL << 41,
         MLX4_DEV_CAP_FLAG_VEP_MC_STEER  = 1LL << 42,
         MLX4_DEV_CAP_FLAG_COUNTERS      = 1LL << 48,
+        MLX4_DEV_CAP_FLAG_RSS_IP_FRAG   = 1LL << 52,
         MLX4_DEV_CAP_FLAG_SET_ETH_SCHED = 1LL << 53,
         MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55,
         MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 59,
@@ -203,7 +202,14 @@ enum {
         MLX4_DEV_CAP_FLAG2_80_VFS               = 1LL <<  18,
         MLX4_DEV_CAP_FLAG2_FS_A0                = 1LL <<  19,
         MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT = 1LL << 20,
-        MLX4_DEV_CAP_FLAG2_PORT_REMAP           = 1LL <<  21
+        MLX4_DEV_CAP_FLAG2_PORT_REMAP           = 1LL <<  21,
+        MLX4_DEV_CAP_FLAG2_QCN                  = 1LL <<  22,
+        MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT        = 1LL <<  23,
+        MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN         = 1LL <<  24,
+        MLX4_DEV_CAP_FLAG2_QOS_VPP              = 1LL <<  25,
+        MLX4_DEV_CAP_FLAG2_ETS_CFG              = 1LL <<  26,
+        MLX4_DEV_CAP_FLAG2_PORT_BEACON          = 1LL <<  27,
+        MLX4_DEV_CAP_FLAG2_IGNORE_FCS           = 1LL <<  28,
 };
 
 enum {
@@ -449,6 +455,21 @@ enum mlx4_module_id {
         MLX4_MODULE_ID_QSFP28           = 0x11,
 };
 
+enum { /* rl */
+        MLX4_QP_RATE_LIMIT_NONE         = 0,
+        MLX4_QP_RATE_LIMIT_KBS          = 1,
+        MLX4_QP_RATE_LIMIT_MBS          = 2,
+        MLX4_QP_RATE_LIMIT_GBS          = 3
+};
+
+struct mlx4_rate_limit_caps {
+        u16     num_rates; /* Number of different rates */
+        u8      min_unit;
+        u16     min_val;
+        u8      max_unit;
+        u16     max_val;
+};
+
 static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
 {
         return (major << 32) | (minor << 16) | subminor;
@@ -564,6 +585,7 @@ struct mlx4_caps {
         u32                     dmfs_high_rate_qpn_base;
         u32                     dmfs_high_rate_qpn_range;
         u32                     vf_caps;
+        struct mlx4_rate_limit_caps rl_caps;
 };
 
 struct mlx4_buf_list {
@@ -982,6 +1004,11 @@ static inline int mlx4_is_slave(struct mlx4_dev *dev)
         return dev->flags & MLX4_FLAG_SLAVE;
 }
 
+static inline int mlx4_is_eth(struct mlx4_dev *dev, int port)
+{
+        return dev->caps.port_type[port] == MLX4_PORT_TYPE_IB ? 0 : 1;
+}
+
 int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
                    struct mlx4_buf *buf, gfp_t gfp);
 void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
@@ -1282,14 +1309,13 @@ int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac);
 void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac);
 int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port);
 int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac);
-void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap);
 int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu,
                           u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx);
 int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn,
                            u8 promisc);
-int mlx4_SET_PORT_PRIO2TC(struct mlx4_dev *dev, u8 port, u8 *prio2tc);
-int mlx4_SET_PORT_SCHEDULER(struct mlx4_dev *dev, u8 port, u8 *tc_tx_bw,
-                u8 *pg, u16 *ratelimit);
+int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time);
+int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port,
+                            u8 ignore_fcs_value);
 int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable);
 int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx);
 int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx);
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index 551f85456c11..6fed539e5456 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -207,14 +207,17 @@ struct mlx4_qp_context {
         __be32                  msn;
         __be16                  rq_wqe_counter;
         __be16                  sq_wqe_counter;
-        u32                     reserved3[2];
+        u32                     reserved3;
+        __be16                  rate_limit_params;
+        u8                      reserved4;
+        u8                      qos_vport;
         __be32                  param3;
         __be32                  nummmcpeers_basemkey;
         u8                      log_page_size;
-        u8                      reserved4[2];
+        u8                      reserved5[2];
         u8                      mtt_base_addr_h;
         __be32                  mtt_base_addr_l;
-        u32                     reserved5[10];
+        u32                     reserved6[10];
 };
 
 struct mlx4_update_qp_context {
@@ -229,6 +232,8 @@ struct mlx4_update_qp_context {
 enum {
         MLX4_UPD_QP_MASK_PM_STATE       = 32,
         MLX4_UPD_QP_MASK_VSD            = 33,
+        MLX4_UPD_QP_MASK_QOS_VPP        = 34,
+        MLX4_UPD_QP_MASK_RATE_LIMIT     = 35,
 };
 
 enum {
@@ -428,7 +433,9 @@ struct mlx4_wqe_inline_seg {
 enum mlx4_update_qp_attr {
         MLX4_UPDATE_QP_SMAC             = 1 << 0,
         MLX4_UPDATE_QP_VSD              = 1 << 1,
-        MLX4_UPDATE_QP_SUPPORTED_ATTRS  = (1 << 2) - 1
+        MLX4_UPDATE_QP_RATE_LIMIT       = 1 << 2,
+        MLX4_UPDATE_QP_QOS_VPORT        = 1 << 3,
+        MLX4_UPDATE_QP_SUPPORTED_ATTRS  = (1 << 4) - 1
 };
 
 enum mlx4_update_qp_params_flags {
@@ -437,7 +444,10 @@ enum mlx4_update_qp_params_flags {
 
 struct mlx4_update_qp_params {
         u8      smac_index;
+        u8      qos_vport;
         u32     flags;
+        u16     rate_unit;
+        u16     rate_val;
 };
 
 int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,