aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/mfd
diff options
context:
space:
mode:
authorKrzysztof Kozlowski <k.kozlowski@samsung.com>2014-04-14 05:17:17 -0400
committerLee Jones <lee.jones@linaro.org>2014-04-23 09:08:43 -0400
commitc7846852ec8f304c629963202fa565452e8fe34c (patch)
tree44ce670df12276e3b3b5672fd1db264e48d95c74 /include/linux/mfd
parent0ca852b794dabb3a4dd5c38223cb49a07015540b (diff)
mfd: max14577: Add MAX14577 prefix to IRQ defines
This patch prepares for adding support for MAX77836 device to existing max14577 driver by adding MAX14577 prefix to defines of interrupts. This is only a rename-like patch, new code is not added. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd')
-rw-r--r--include/linux/mfd/max14577-private.h28
1 files changed, 14 insertions, 14 deletions
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h
index 1ce6f2952cc9..989183d232cd 100644
--- a/include/linux/mfd/max14577-private.h
+++ b/include/linux/mfd/max14577-private.h
@@ -79,20 +79,20 @@ enum max14577_muic_charger_type {
79}; 79};
80 80
81/* MAX14577 interrupts */ 81/* MAX14577 interrupts */
82#define INT1_ADC_MASK (0x1 << 0) 82#define MAX14577_INT1_ADC_MASK BIT(0)
83#define INT1_ADCLOW_MASK (0x1 << 1) 83#define MAX14577_INT1_ADCLOW_MASK BIT(1)
84#define INT1_ADCERR_MASK (0x1 << 2) 84#define MAX14577_INT1_ADCERR_MASK BIT(2)
85 85
86#define INT2_CHGTYP_MASK (0x1 << 0) 86#define MAX14577_INT2_CHGTYP_MASK BIT(0)
87#define INT2_CHGDETRUN_MASK (0x1 << 1) 87#define MAX14577_INT2_CHGDETRUN_MASK BIT(1)
88#define INT2_DCDTMR_MASK (0x1 << 2) 88#define MAX14577_INT2_DCDTMR_MASK BIT(2)
89#define INT2_DBCHG_MASK (0x1 << 3) 89#define MAX14577_INT2_DBCHG_MASK BIT(3)
90#define INT2_VBVOLT_MASK (0x1 << 4) 90#define MAX14577_INT2_VBVOLT_MASK BIT(4)
91 91
92#define INT3_EOC_MASK (0x1 << 0) 92#define MAX14577_INT3_EOC_MASK BIT(0)
93#define INT3_CGMBC_MASK (0x1 << 1) 93#define MAX14577_INT3_CGMBC_MASK BIT(1)
94#define INT3_OVP_MASK (0x1 << 2) 94#define MAX14577_INT3_OVP_MASK BIT(2)
95#define INT3_MBCCHGERR_MASK (0x1 << 3) 95#define MAX14577_INT3_MBCCHGERR_MASK BIT(3)
96 96
97/* MAX14577 DEVICE ID register */ 97/* MAX14577 DEVICE ID register */
98#define DEVID_VENDORID_SHIFT 0 98#define DEVID_VENDORID_SHIFT 0