Change the register name definitions for mc13783

To make mc13783 and mc13892 share code, the register names should be
changed to fit the new macro definitions in the comming patch.

Signed-off-by: Yong Shen <yong.shen@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>

1 files changed, 34 insertions, 33 deletions

diff --git a/include/linux/mfd/mc13783.h b/include/linux/mfd/mc13783.h
index b4c741e352c2..7d0f3d6a0002 100644
--- a/include/linux/mfd/mc13783.h
+++ b/include/linux/mfd/mc13783.h
@@ -1,4 +1,5 @@
 /*
+ * Copyright 2010 Yong Shen <yong.shen@linaro.org>
  * Copyright 2009-2010 Pengutronix
  * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
  *
@@ -122,39 +123,39 @@ int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
                 unsigned int channel, unsigned int *sample);
 
 
-#define MC13783_SW_SW1A         0
-#define MC13783_SW_SW1B         1
-#define MC13783_SW_SW2A         2
-#define MC13783_SW_SW2B         3
-#define MC13783_SW_SW3          4
-#define MC13783_SW_PLL          5
-#define MC13783_REGU_VAUDIO     6
-#define MC13783_REGU_VIOHI      7
-#define MC13783_REGU_VIOLO      8
-#define MC13783_REGU_VDIG       9
-#define MC13783_REGU_VGEN       10
-#define MC13783_REGU_VRFDIG     11
-#define MC13783_REGU_VRFREF     12
-#define MC13783_REGU_VRFCP      13
-#define MC13783_REGU_VSIM       14
-#define MC13783_REGU_VESIM      15
-#define MC13783_REGU_VCAM       16
-#define MC13783_REGU_VRFBG      17
-#define MC13783_REGU_VVIB       18
-#define MC13783_REGU_VRF1       19
-#define MC13783_REGU_VRF2       20
-#define MC13783_REGU_VMMC1      21
-#define MC13783_REGU_VMMC2      22
-#define MC13783_REGU_GPO1       23
-#define MC13783_REGU_GPO2       24
-#define MC13783_REGU_GPO3       25
-#define MC13783_REGU_GPO4       26
-#define MC13783_REGU_V1         27
-#define MC13783_REGU_V2         28
-#define MC13783_REGU_V3         29
-#define MC13783_REGU_V4         30
-#define MC13783_REGU_PWGT1SPI   31
-#define MC13783_REGU_PWGT2SPI   32
+#define MC13783_REG_SW1A                0
+#define MC13783_REG_SW1B                1
+#define MC13783_REG_SW2A                2
+#define MC13783_REG_SW2B                3
+#define MC13783_REG_SW3         4
+#define MC13783_REG_PLL         5
+#define MC13783_REG_VAUDIO      6
+#define MC13783_REG_VIOHI       7
+#define MC13783_REG_VIOLO       8
+#define MC13783_REG_VDIG        9
+#define MC13783_REG_VGEN        10
+#define MC13783_REG_VRFDIG      11
+#define MC13783_REG_VRFREF      12
+#define MC13783_REG_VRFCP       13
+#define MC13783_REG_VSIM        14
+#define MC13783_REG_VESIM       15
+#define MC13783_REG_VCAM        16
+#define MC13783_REG_VRFBG       17
+#define MC13783_REG_VVIB        18
+#define MC13783_REG_VRF1        19
+#define MC13783_REG_VRF2        20
+#define MC13783_REG_VMMC1       21
+#define MC13783_REG_VMMC2       22
+#define MC13783_REG_GPO1        23
+#define MC13783_REG_GPO2        24
+#define MC13783_REG_GPO3        25
+#define MC13783_REG_GPO4        26
+#define MC13783_REG_V1          27
+#define MC13783_REG_V2          28
+#define MC13783_REG_V3          29
+#define MC13783_REG_V4          30
+#define MC13783_REG_PWGT1SPI    31
+#define MC13783_REG_PWGT2SPI    32
 
 #define MC13783_IRQ_ADCDONE     MC13XXX_IRQ_ADCDONE
 #define MC13783_IRQ_ADCBISDONE  MC13XXX_IRQ_ADCBISDONE