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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2010-03-01 02:55:20 -0500
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2010-03-01 02:55:20 -0500
commit35858adbfca13678af99fb31618ef4428d6dedb0 (patch)
tree3336feaa61324486945816cb52c347733e7c0821 /include/linux/mfd
parent197d4db752e67160d79fed09968c2140376a80a3 (diff)
parent4b70858ba8d4537daf782defebe5f2ff80ccef2b (diff)
Merge branch 'next' into for-linus
Diffstat (limited to 'include/linux/mfd')
-rw-r--r--include/linux/mfd/pcf50633/core.h7
-rw-r--r--include/linux/mfd/pcf50633/mbc.h1
-rw-r--r--include/linux/mfd/tmio.h39
-rw-r--r--include/linux/mfd/wm831x/pdata.h17
-rw-r--r--include/linux/mfd/wm8350/pmic.h28
5 files changed, 77 insertions, 15 deletions
diff --git a/include/linux/mfd/pcf50633/core.h b/include/linux/mfd/pcf50633/core.h
index d9034cc87f18..3398bd9aab11 100644
--- a/include/linux/mfd/pcf50633/core.h
+++ b/include/linux/mfd/pcf50633/core.h
@@ -29,7 +29,12 @@ struct pcf50633_platform_data {
29 char **batteries; 29 char **batteries;
30 int num_batteries; 30 int num_batteries;
31 31
32 int charging_restart_interval; 32 /*
33 * Should be set accordingly to the reference resistor used, see
34 * I_{ch(ref)} charger reference current in the pcf50633 User
35 * Manual.
36 */
37 int charger_reference_current_ma;
33 38
34 /* Callbacks */ 39 /* Callbacks */
35 void (*probe_done)(struct pcf50633 *); 40 void (*probe_done)(struct pcf50633 *);
diff --git a/include/linux/mfd/pcf50633/mbc.h b/include/linux/mfd/pcf50633/mbc.h
index 4119579acf2c..df4f5fa88de3 100644
--- a/include/linux/mfd/pcf50633/mbc.h
+++ b/include/linux/mfd/pcf50633/mbc.h
@@ -128,6 +128,7 @@ enum pcf50633_reg_mbcs3 {
128int pcf50633_mbc_usb_curlim_set(struct pcf50633 *pcf, int ma); 128int pcf50633_mbc_usb_curlim_set(struct pcf50633 *pcf, int ma);
129 129
130int pcf50633_mbc_get_status(struct pcf50633 *); 130int pcf50633_mbc_get_status(struct pcf50633 *);
131int pcf50633_mbc_get_usb_online_status(struct pcf50633 *);
131 132
132#endif 133#endif
133 134
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 6b9c5d06690c..9cb1834deffa 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -2,6 +2,8 @@
2#define MFD_TMIO_H 2#define MFD_TMIO_H
3 3
4#include <linux/fb.h> 4#include <linux/fb.h>
5#include <linux/io.h>
6#include <linux/platform_device.h>
5 7
6#define tmio_ioread8(addr) readb(addr) 8#define tmio_ioread8(addr) readb(addr)
7#define tmio_ioread16(addr) readw(addr) 9#define tmio_ioread16(addr) readw(addr)
@@ -18,11 +20,48 @@
18 writew((val) >> 16, (addr) + 2); \ 20 writew((val) >> 16, (addr) + 2); \
19 } while (0) 21 } while (0)
20 22
23#define CNF_CMD 0x04
24#define CNF_CTL_BASE 0x10
25#define CNF_INT_PIN 0x3d
26#define CNF_STOP_CLK_CTL 0x40
27#define CNF_GCLK_CTL 0x41
28#define CNF_SD_CLK_MODE 0x42
29#define CNF_PIN_STATUS 0x44
30#define CNF_PWR_CTL_1 0x48
31#define CNF_PWR_CTL_2 0x49
32#define CNF_PWR_CTL_3 0x4a
33#define CNF_CARD_DETECT_MODE 0x4c
34#define CNF_SD_SLOT 0x50
35#define CNF_EXT_GCLK_CTL_1 0xf0
36#define CNF_EXT_GCLK_CTL_2 0xf1
37#define CNF_EXT_GCLK_CTL_3 0xf9
38#define CNF_SD_LED_EN_1 0xfa
39#define CNF_SD_LED_EN_2 0xfe
40
41#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
42
43#define sd_config_write8(base, shift, reg, val) \
44 tmio_iowrite8((val), (base) + ((reg) << (shift)))
45#define sd_config_write16(base, shift, reg, val) \
46 tmio_iowrite16((val), (base) + ((reg) << (shift)))
47#define sd_config_write32(base, shift, reg, val) \
48 do { \
49 tmio_iowrite16((val), (base) + ((reg) << (shift))); \
50 tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
51 } while (0)
52
53int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
54int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
55void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
56void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
57
21/* 58/*
22 * data for the MMC controller 59 * data for the MMC controller
23 */ 60 */
24struct tmio_mmc_data { 61struct tmio_mmc_data {
25 const unsigned int hclk; 62 const unsigned int hclk;
63 void (*set_pwr)(struct platform_device *host, int state);
64 void (*set_clk_div)(struct platform_device *host, int state);
26}; 65};
27 66
28/* 67/*
diff --git a/include/linux/mfd/wm831x/pdata.h b/include/linux/mfd/wm831x/pdata.h
index 415c228743d5..fd322aca33ba 100644
--- a/include/linux/mfd/wm831x/pdata.h
+++ b/include/linux/mfd/wm831x/pdata.h
@@ -41,6 +41,23 @@ struct wm831x_battery_pdata {
41 int timeout; /** Charge cycle timeout, in minutes */ 41 int timeout; /** Charge cycle timeout, in minutes */
42}; 42};
43 43
44/**
45 * Configuration for the WM831x DC-DC BuckWise convertors. This
46 * should be passed as driver_data in the regulator_init_data.
47 *
48 * Currently all the configuration is for the fast DVS switching
49 * support of the devices. This allows MFPs on the device to be
50 * configured as an input to switch between two output voltages,
51 * allowing voltage transitions without the expense of an access over
52 * I2C or SPI buses.
53 */
54struct wm831x_buckv_pdata {
55 int dvs_gpio; /** CPU GPIO to use for DVS switching */
56 int dvs_control_src; /** Hardware DVS source to use (1 or 2) */
57 int dvs_init_state; /** DVS state to expect on startup */
58 int dvs_state_gpio; /** CPU GPIO to use for monitoring status */
59};
60
44/* Sources for status LED configuration. Values are register values 61/* Sources for status LED configuration. Values are register values
45 * plus 1 to allow for a zero default for preserve. 62 * plus 1 to allow for a zero default for preserve.
46 */ 63 */
diff --git a/include/linux/mfd/wm8350/pmic.h b/include/linux/mfd/wm8350/pmic.h
index be3264e286e0..e786fe9841ef 100644
--- a/include/linux/mfd/wm8350/pmic.h
+++ b/include/linux/mfd/wm8350/pmic.h
@@ -666,20 +666,20 @@
666#define WM8350_ISINK_FLASH_DUR_64MS (1 << 8) 666#define WM8350_ISINK_FLASH_DUR_64MS (1 << 8)
667#define WM8350_ISINK_FLASH_DUR_96MS (2 << 8) 667#define WM8350_ISINK_FLASH_DUR_96MS (2 << 8)
668#define WM8350_ISINK_FLASH_DUR_1024MS (3 << 8) 668#define WM8350_ISINK_FLASH_DUR_1024MS (3 << 8)
669#define WM8350_ISINK_FLASH_ON_INSTANT (0 << 4) 669#define WM8350_ISINK_FLASH_ON_INSTANT (0 << 0)
670#define WM8350_ISINK_FLASH_ON_0_25S (1 << 4) 670#define WM8350_ISINK_FLASH_ON_0_25S (1 << 0)
671#define WM8350_ISINK_FLASH_ON_0_50S (2 << 4) 671#define WM8350_ISINK_FLASH_ON_0_50S (2 << 0)
672#define WM8350_ISINK_FLASH_ON_1_00S (3 << 4) 672#define WM8350_ISINK_FLASH_ON_1_00S (3 << 0)
673#define WM8350_ISINK_FLASH_ON_1_95S (1 << 4) 673#define WM8350_ISINK_FLASH_ON_1_95S (1 << 0)
674#define WM8350_ISINK_FLASH_ON_3_91S (2 << 4) 674#define WM8350_ISINK_FLASH_ON_3_91S (2 << 0)
675#define WM8350_ISINK_FLASH_ON_7_80S (3 << 4) 675#define WM8350_ISINK_FLASH_ON_7_80S (3 << 0)
676#define WM8350_ISINK_FLASH_OFF_INSTANT (0 << 0) 676#define WM8350_ISINK_FLASH_OFF_INSTANT (0 << 4)
677#define WM8350_ISINK_FLASH_OFF_0_25S (1 << 0) 677#define WM8350_ISINK_FLASH_OFF_0_25S (1 << 4)
678#define WM8350_ISINK_FLASH_OFF_0_50S (2 << 0) 678#define WM8350_ISINK_FLASH_OFF_0_50S (2 << 4)
679#define WM8350_ISINK_FLASH_OFF_1_00S (3 << 0) 679#define WM8350_ISINK_FLASH_OFF_1_00S (3 << 4)
680#define WM8350_ISINK_FLASH_OFF_1_95S (1 << 0) 680#define WM8350_ISINK_FLASH_OFF_1_95S (1 << 4)
681#define WM8350_ISINK_FLASH_OFF_3_91S (2 << 0) 681#define WM8350_ISINK_FLASH_OFF_3_91S (2 << 4)
682#define WM8350_ISINK_FLASH_OFF_7_80S (3 << 0) 682#define WM8350_ISINK_FLASH_OFF_7_80S (3 << 4)
683 683
684/* 684/*
685 * Regulator Interrupts. 685 * Regulator Interrupts.