diff options
| author | Feng Kan <fkan@apm.com> | 2014-07-30 17:56:58 -0400 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-08-19 11:07:46 -0400 |
| commit | e5f81539f657af7e9f54ea37986fde8f92acef22 (patch) | |
| tree | 1e48f8a6807a0b8a301930fb57bede3baf4532fa /include/linux/irqchip | |
| parent | 7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9 (diff) | |
irqchip: gic: Replace hex numbers with defines.
This is to cleanup some hex numbers used in the code and replace
them with defines to make the code cleaner.
Signed-off-by: Feng Kan <fkan@apm.com>
Reviewed-by: Anup Patel <apatel@apm.com>
Link: https://lkml.kernel.org/r/1406757419-18729-2-git-send-email-fkan@apm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'include/linux/irqchip')
| -rw-r--r-- | include/linux/irqchip/arm-gic.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index 45e2d8c15bd2..5cb9d41af5be 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h | |||
| @@ -21,7 +21,10 @@ | |||
| 21 | #define GIC_CPU_ACTIVEPRIO 0xd0 | 21 | #define GIC_CPU_ACTIVEPRIO 0xd0 |
| 22 | #define GIC_CPU_IDENT 0xfc | 22 | #define GIC_CPU_IDENT 0xfc |
| 23 | 23 | ||
| 24 | #define GICC_ENABLE 0x1 | ||
| 25 | #define GICC_INT_PRI_THRESHOLD 0xf0 | ||
| 24 | #define GICC_IAR_INT_ID_MASK 0x3ff | 26 | #define GICC_IAR_INT_ID_MASK 0x3ff |
| 27 | #define GICC_INT_SPURIOUS 1023 | ||
| 25 | 28 | ||
| 26 | #define GIC_DIST_CTRL 0x000 | 29 | #define GIC_DIST_CTRL 0x000 |
| 27 | #define GIC_DIST_CTR 0x004 | 30 | #define GIC_DIST_CTR 0x004 |
| @@ -39,6 +42,18 @@ | |||
| 39 | #define GIC_DIST_SGI_PENDING_CLEAR 0xf10 | 42 | #define GIC_DIST_SGI_PENDING_CLEAR 0xf10 |
| 40 | #define GIC_DIST_SGI_PENDING_SET 0xf20 | 43 | #define GIC_DIST_SGI_PENDING_SET 0xf20 |
| 41 | 44 | ||
| 45 | #define GICD_ENABLE 0x1 | ||
| 46 | #define GICD_DISABLE 0x0 | ||
| 47 | #define GICD_INT_ACTLOW_LVLTRIG 0x0 | ||
| 48 | #define GICD_INT_EN_CLR_X32 0xffffffff | ||
| 49 | #define GICD_INT_EN_SET_SGI 0x0000ffff | ||
| 50 | #define GICD_INT_EN_CLR_PPI 0xffff0000 | ||
| 51 | #define GICD_INT_DEF_PRI 0xa0 | ||
| 52 | #define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\ | ||
| 53 | (GICD_INT_DEF_PRI << 16) |\ | ||
| 54 | (GICD_INT_DEF_PRI << 8) |\ | ||
| 55 | GICD_INT_DEF_PRI) | ||
| 56 | |||
| 42 | #define GICH_HCR 0x0 | 57 | #define GICH_HCR 0x0 |
| 43 | #define GICH_VTR 0x4 | 58 | #define GICH_VTR 0x4 |
| 44 | #define GICH_VMCR 0x8 | 59 | #define GICH_VMCR 0x8 |
