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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-19 18:06:00 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-19 18:06:00 -0400
commit60812a4a99b796d894d2522dc63cb0fafc3be25e (patch)
treebbf3a441b71e3b9b670d91652094114852272db8 /include/asm-x86/smp_64.h
parentb04cde34cf1d006dfaf8523640f3a18bbb15ebaa (diff)
parent92cb7612aee39642d109b8d935ad265e602c0563 (diff)
Merge ssh://master.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86
* ssh://master.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86: (33 commits) x86: convert cpuinfo_x86 array to a per_cpu array x86: introduce frame_pointer() and stack_pointer() x86 & generic: change to __builtin_prefetch() i386: do not BUG_ON() when MSR is unknown x86: acpi use cpu_physical_id x86: convert cpu_llc_id to be a per cpu variable x86: convert cpu_to_apicid to be a per cpu variable i386: introduce "used_vectors" bitmap which can be used to reserve vectors. x86: use raw locks during oopses x86: honor _PAGE_PSE bit on page walks i386: do cpuid_device_create() in CPU_UP_PREPARE instead of CPU_ONLINE. x86: implement missing x86_64 function smp_call_function_mask() x86: use descriptor's functions instead of inline assembly i386: consolidate show_regs and show_registers for i386 i386: make callgraph use dump_trace() on i386/x86_64 x86: enable iommu_merge by default i386: i386 add AMD64 Barcelona PMU MSR definitions to msr.h x86: Unify i386 and x86-64 early quirks x86: enable HPET on ICH3 and ICH4 x86: force enable HPET on VT8235/8237 chipsets ... Manually fix trivial conflict with task pid container helper changes in arch/x86/kernel/process_32.c
Diffstat (limited to 'include/asm-x86/smp_64.h')
-rw-r--r--include/asm-x86/smp_64.h11
1 files changed, 8 insertions, 3 deletions
diff --git a/include/asm-x86/smp_64.h b/include/asm-x86/smp_64.h
index d30e9b684fdd..6f0e0273b646 100644
--- a/include/asm-x86/smp_64.h
+++ b/include/asm-x86/smp_64.h
@@ -37,6 +37,8 @@ extern void lock_ipi_call_lock(void);
37extern void unlock_ipi_call_lock(void); 37extern void unlock_ipi_call_lock(void);
38extern int smp_num_siblings; 38extern int smp_num_siblings;
39extern void smp_send_reschedule(int cpu); 39extern void smp_send_reschedule(int cpu);
40extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
41 void *info, int wait);
40 42
41/* 43/*
42 * cpu_sibling_map and cpu_core_map now live 44 * cpu_sibling_map and cpu_core_map now live
@@ -47,7 +49,7 @@ extern void smp_send_reschedule(int cpu);
47 */ 49 */
48DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 50DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
49DECLARE_PER_CPU(cpumask_t, cpu_core_map); 51DECLARE_PER_CPU(cpumask_t, cpu_core_map);
50extern u8 cpu_llc_id[NR_CPUS]; 52DECLARE_PER_CPU(u8, cpu_llc_id);
51 53
52#define SMP_TRAMPOLINE_BASE 0x6000 54#define SMP_TRAMPOLINE_BASE 0x6000
53 55
@@ -84,7 +86,9 @@ static inline int hard_smp_processor_id(void)
84 * Some lowlevel functions might want to know about 86 * Some lowlevel functions might want to know about
85 * the real APIC ID <-> CPU # mapping. 87 * the real APIC ID <-> CPU # mapping.
86 */ 88 */
87extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */ 89extern u8 __initdata x86_cpu_to_apicid_init[];
90extern void *x86_cpu_to_apicid_ptr;
91DECLARE_PER_CPU(u8, x86_cpu_to_apicid); /* physical ID */
88extern u8 bios_cpu_apicid[]; 92extern u8 bios_cpu_apicid[];
89 93
90static inline int cpu_present_to_apicid(int mps_cpu) 94static inline int cpu_present_to_apicid(int mps_cpu)
@@ -115,8 +119,9 @@ static __inline int logical_smp_processor_id(void)
115} 119}
116 120
117#ifdef CONFIG_SMP 121#ifdef CONFIG_SMP
118#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] 122#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
119#else 123#else
124extern unsigned int boot_cpu_id;
120#define cpu_physical_id(cpu) boot_cpu_id 125#define cpu_physical_id(cpu) boot_cpu_id
121#endif /* !CONFIG_SMP */ 126#endif /* !CONFIG_SMP */
122#endif 127#endif