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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-19 18:06:00 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-19 18:06:00 -0400
commit60812a4a99b796d894d2522dc63cb0fafc3be25e (patch)
treebbf3a441b71e3b9b670d91652094114852272db8 /include/asm-x86
parentb04cde34cf1d006dfaf8523640f3a18bbb15ebaa (diff)
parent92cb7612aee39642d109b8d935ad265e602c0563 (diff)
Merge ssh://master.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86
* ssh://master.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86: (33 commits) x86: convert cpuinfo_x86 array to a per_cpu array x86: introduce frame_pointer() and stack_pointer() x86 & generic: change to __builtin_prefetch() i386: do not BUG_ON() when MSR is unknown x86: acpi use cpu_physical_id x86: convert cpu_llc_id to be a per cpu variable x86: convert cpu_to_apicid to be a per cpu variable i386: introduce "used_vectors" bitmap which can be used to reserve vectors. x86: use raw locks during oopses x86: honor _PAGE_PSE bit on page walks i386: do cpuid_device_create() in CPU_UP_PREPARE instead of CPU_ONLINE. x86: implement missing x86_64 function smp_call_function_mask() x86: use descriptor's functions instead of inline assembly i386: consolidate show_regs and show_registers for i386 i386: make callgraph use dump_trace() on i386/x86_64 x86: enable iommu_merge by default i386: i386 add AMD64 Barcelona PMU MSR definitions to msr.h x86: Unify i386 and x86-64 early quirks x86: enable HPET on ICH3 and ICH4 x86: force enable HPET on VT8235/8237 chipsets ... Manually fix trivial conflict with task pid container helper changes in arch/x86/kernel/process_32.c
Diffstat (limited to 'include/asm-x86')
-rw-r--r--include/asm-x86/acpi_32.h6
-rw-r--r--include/asm-x86/compat.h6
-rw-r--r--include/asm-x86/desc_64.h30
-rw-r--r--include/asm-x86/geode.h2
-rw-r--r--include/asm-x86/hpet.h1
-rw-r--r--include/asm-x86/io_apic_64.h2
-rw-r--r--include/asm-x86/ipi.h2
-rw-r--r--include/asm-x86/irq_32.h3
-rw-r--r--include/asm-x86/msr-index.h36
-rw-r--r--include/asm-x86/processor_32.h16
-rw-r--r--include/asm-x86/processor_64.h16
-rw-r--r--include/asm-x86/proto.h2
-rw-r--r--include/asm-x86/ptrace_32.h2
-rw-r--r--include/asm-x86/ptrace_64.h2
-rw-r--r--include/asm-x86/smp_32.h6
-rw-r--r--include/asm-x86/smp_64.h11
-rw-r--r--include/asm-x86/system_32.h1
-rw-r--r--include/asm-x86/topology_32.h4
-rw-r--r--include/asm-x86/topology_64.h4
19 files changed, 109 insertions, 43 deletions
diff --git a/include/asm-x86/acpi_32.h b/include/asm-x86/acpi_32.h
index 125179adf044..723493e6c851 100644
--- a/include/asm-x86/acpi_32.h
+++ b/include/asm-x86/acpi_32.h
@@ -81,11 +81,7 @@ int __acpi_release_global_lock(unsigned int *lock);
81 :"=r"(n_hi), "=r"(n_lo) \ 81 :"=r"(n_hi), "=r"(n_lo) \
82 :"0"(n_hi), "1"(n_lo)) 82 :"0"(n_hi), "1"(n_lo))
83 83
84#ifdef CONFIG_X86_IO_APIC 84extern void early_quirks(void);
85extern void check_acpi_pci(void);
86#else
87static inline void check_acpi_pci(void) { }
88#endif
89 85
90#ifdef CONFIG_ACPI 86#ifdef CONFIG_ACPI
91extern int acpi_lapic; 87extern int acpi_lapic;
diff --git a/include/asm-x86/compat.h b/include/asm-x86/compat.h
index 53cb96b68a62..66ba7987184a 100644
--- a/include/asm-x86/compat.h
+++ b/include/asm-x86/compat.h
@@ -6,6 +6,7 @@
6 */ 6 */
7#include <linux/types.h> 7#include <linux/types.h>
8#include <linux/sched.h> 8#include <linux/sched.h>
9#include <asm/user32.h>
9 10
10#define COMPAT_USER_HZ 100 11#define COMPAT_USER_HZ 100
11 12
@@ -181,6 +182,11 @@ struct compat_shmid64_ds {
181}; 182};
182 183
183/* 184/*
185 * The type of struct elf_prstatus.pr_reg in compatible core dumps.
186 */
187typedef struct user_regs_struct32 compat_elf_gregset_t;
188
189/*
184 * A pointer passed in from user mode. This should not 190 * A pointer passed in from user mode. This should not
185 * be used for syscall parameters, just declare them 191 * be used for syscall parameters, just declare them
186 * as pointers because the syscall entry code will have 192 * as pointers because the syscall entry code will have
diff --git a/include/asm-x86/desc_64.h b/include/asm-x86/desc_64.h
index ac991b5ca0fd..7d9c938e69fd 100644
--- a/include/asm-x86/desc_64.h
+++ b/include/asm-x86/desc_64.h
@@ -20,6 +20,16 @@ extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
20#define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8)) 20#define load_LDT_desc() asm volatile("lldt %w0"::"r" (GDT_ENTRY_LDT*8))
21#define clear_LDT() asm volatile("lldt %w0"::"r" (0)) 21#define clear_LDT() asm volatile("lldt %w0"::"r" (0))
22 22
23static inline unsigned long __store_tr(void)
24{
25 unsigned long tr;
26
27 asm volatile ("str %w0":"=r" (tr));
28 return tr;
29}
30
31#define store_tr(tr) (tr) = __store_tr()
32
23/* 33/*
24 * This is the ldt that every process will get unless we need 34 * This is the ldt that every process will get unless we need
25 * something other than this. 35 * something other than this.
@@ -31,6 +41,16 @@ extern struct desc_ptr cpu_gdt_descr[];
31/* the cpu gdt accessor */ 41/* the cpu gdt accessor */
32#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address) 42#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address)
33 43
44static inline void load_gdt(const struct desc_ptr *ptr)
45{
46 asm volatile("lgdt %w0"::"m" (*ptr));
47}
48
49static inline void store_gdt(struct desc_ptr *ptr)
50{
51 asm("sgdt %w0":"=m" (*ptr));
52}
53
34static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist) 54static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist)
35{ 55{
36 struct gate_struct s; 56 struct gate_struct s;
@@ -71,6 +91,16 @@ static inline void set_system_gate_ist(int nr, void *func, unsigned ist)
71 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, ist); 91 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, ist);
72} 92}
73 93
94static inline void load_idt(const struct desc_ptr *ptr)
95{
96 asm volatile("lidt %w0"::"m" (*ptr));
97}
98
99static inline void store_idt(struct desc_ptr *dtr)
100{
101 asm("sidt %w0":"=m" (*dtr));
102}
103
74static inline void set_tssldt_descriptor(void *ptr, unsigned long tss, unsigned type, 104static inline void set_tssldt_descriptor(void *ptr, unsigned long tss, unsigned type,
75 unsigned size) 105 unsigned size)
76{ 106{
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
index d94898831bac..771af336734f 100644
--- a/include/asm-x86/geode.h
+++ b/include/asm-x86/geode.h
@@ -38,6 +38,8 @@ extern int geode_get_dev_base(unsigned int dev);
38#define MSR_LBAR_ACPI 0x5140000E 38#define MSR_LBAR_ACPI 0x5140000E
39#define MSR_LBAR_PMS 0x5140000F 39#define MSR_LBAR_PMS 0x5140000F
40 40
41#define MSR_DIVIL_SOFT_RESET 0x51400017
42
41#define MSR_PIC_YSEL_LOW 0x51400020 43#define MSR_PIC_YSEL_LOW 0x51400020
42#define MSR_PIC_YSEL_HIGH 0x51400021 44#define MSR_PIC_YSEL_HIGH 0x51400021
43#define MSR_PIC_ZSEL_LOW 0x51400022 45#define MSR_PIC_ZSEL_LOW 0x51400022
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h
index d4ab6db050b6..4f51519fc199 100644
--- a/include/asm-x86/hpet.h
+++ b/include/asm-x86/hpet.h
@@ -64,6 +64,7 @@
64/* hpet memory map physical address */ 64/* hpet memory map physical address */
65extern unsigned long hpet_address; 65extern unsigned long hpet_address;
66extern unsigned long force_hpet_address; 66extern unsigned long force_hpet_address;
67extern int hpet_force_user;
67extern int is_hpet_enabled(void); 68extern int is_hpet_enabled(void);
68extern int hpet_enable(void); 69extern int hpet_enable(void);
69extern unsigned long hpet_readl(unsigned long a); 70extern unsigned long hpet_readl(unsigned long a);
diff --git a/include/asm-x86/io_apic_64.h b/include/asm-x86/io_apic_64.h
index d9f2e54324d5..e2c13675ee4e 100644
--- a/include/asm-x86/io_apic_64.h
+++ b/include/asm-x86/io_apic_64.h
@@ -133,4 +133,6 @@ void enable_NMI_through_LVT0 (void * dummy);
133 133
134extern spinlock_t i8259A_lock; 134extern spinlock_t i8259A_lock;
135 135
136extern int timer_over_8254;
137
136#endif 138#endif
diff --git a/include/asm-x86/ipi.h b/include/asm-x86/ipi.h
index a7c75ea408a8..6d011bd6067d 100644
--- a/include/asm-x86/ipi.h
+++ b/include/asm-x86/ipi.h
@@ -119,7 +119,7 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
119 */ 119 */
120 local_irq_save(flags); 120 local_irq_save(flags);
121 for_each_cpu_mask(query_cpu, mask) { 121 for_each_cpu_mask(query_cpu, mask) {
122 __send_IPI_dest_field(x86_cpu_to_apicid[query_cpu], 122 __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu),
123 vector, APIC_DEST_PHYSICAL); 123 vector, APIC_DEST_PHYSICAL);
124 } 124 }
125 local_irq_restore(flags); 125 local_irq_restore(flags);
diff --git a/include/asm-x86/irq_32.h b/include/asm-x86/irq_32.h
index 36f310632c49..aca9c96e8e6b 100644
--- a/include/asm-x86/irq_32.h
+++ b/include/asm-x86/irq_32.h
@@ -45,4 +45,7 @@ unsigned int do_IRQ(struct pt_regs *regs);
45void init_IRQ(void); 45void init_IRQ(void);
46void __init native_init_IRQ(void); 46void __init native_init_IRQ(void);
47 47
48/* Interrupt vector management */
49extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
50
48#endif /* _ASM_IRQ_H */ 51#endif /* _ASM_IRQ_H */
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h
index a02eb2991349..a4944732be04 100644
--- a/include/asm-x86/msr-index.h
+++ b/include/asm-x86/msr-index.h
@@ -73,8 +73,32 @@
73#define MSR_P6_EVNTSEL0 0x00000186 73#define MSR_P6_EVNTSEL0 0x00000186
74#define MSR_P6_EVNTSEL1 0x00000187 74#define MSR_P6_EVNTSEL1 0x00000187
75 75
76/* K7/K8 MSRs. Not complete. See the architecture manual for a more 76/* AMD64 MSRs. Not complete. See the architecture manual for a more
77 complete list. */ 77 complete list. */
78
79#define MSR_AMD64_IBSFETCHCTL 0xc0011030
80#define MSR_AMD64_IBSFETCHLINAD 0xc0011031
81#define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032
82#define MSR_AMD64_IBSOPCTL 0xc0011033
83#define MSR_AMD64_IBSOPRIP 0xc0011034
84#define MSR_AMD64_IBSOPDATA 0xc0011035
85#define MSR_AMD64_IBSOPDATA2 0xc0011036
86#define MSR_AMD64_IBSOPDATA3 0xc0011037
87#define MSR_AMD64_IBSDCLINAD 0xc0011038
88#define MSR_AMD64_IBSDCPHYSAD 0xc0011039
89#define MSR_AMD64_IBSCTL 0xc001103a
90
91/* K8 MSRs */
92#define MSR_K8_TOP_MEM1 0xc001001a
93#define MSR_K8_TOP_MEM2 0xc001001d
94#define MSR_K8_SYSCFG 0xc0010010
95#define MSR_K8_HWCR 0xc0010015
96#define MSR_K8_ENABLE_C1E 0xc0010055
97#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */
98#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */
99#define K8_MTRR_RDMEM_WRMEM_MASK 0x18181818 /* Mask: RdMem|WrMem */
100
101/* K7 MSRs */
78#define MSR_K7_EVNTSEL0 0xc0010000 102#define MSR_K7_EVNTSEL0 0xc0010000
79#define MSR_K7_PERFCTR0 0xc0010004 103#define MSR_K7_PERFCTR0 0xc0010004
80#define MSR_K7_EVNTSEL1 0xc0010001 104#define MSR_K7_EVNTSEL1 0xc0010001
@@ -83,20 +107,10 @@
83#define MSR_K7_PERFCTR2 0xc0010006 107#define MSR_K7_PERFCTR2 0xc0010006
84#define MSR_K7_EVNTSEL3 0xc0010003 108#define MSR_K7_EVNTSEL3 0xc0010003
85#define MSR_K7_PERFCTR3 0xc0010007 109#define MSR_K7_PERFCTR3 0xc0010007
86#define MSR_K8_TOP_MEM1 0xc001001a
87#define MSR_K7_CLK_CTL 0xc001001b 110#define MSR_K7_CLK_CTL 0xc001001b
88#define MSR_K8_TOP_MEM2 0xc001001d
89#define MSR_K8_SYSCFG 0xc0010010
90
91#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */
92#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */
93#define K8_MTRR_RDMEM_WRMEM_MASK 0x18181818 /* Mask: RdMem|WrMem */
94
95#define MSR_K7_HWCR 0xc0010015 111#define MSR_K7_HWCR 0xc0010015
96#define MSR_K8_HWCR 0xc0010015
97#define MSR_K7_FID_VID_CTL 0xc0010041 112#define MSR_K7_FID_VID_CTL 0xc0010041
98#define MSR_K7_FID_VID_STATUS 0xc0010042 113#define MSR_K7_FID_VID_STATUS 0xc0010042
99#define MSR_K8_ENABLE_C1E 0xc0010055
100 114
101/* K6 MSRs */ 115/* K6 MSRs */
102#define MSR_K6_EFER 0xc0000080 116#define MSR_K6_EFER 0xc0000080
diff --git a/include/asm-x86/processor_32.h b/include/asm-x86/processor_32.h
index 83800e7496ee..13976b086837 100644
--- a/include/asm-x86/processor_32.h
+++ b/include/asm-x86/processor_32.h
@@ -79,6 +79,7 @@ struct cpuinfo_x86 {
79 unsigned char booted_cores; /* number of cores as seen by OS */ 79 unsigned char booted_cores; /* number of cores as seen by OS */
80 __u8 phys_proc_id; /* Physical processor id. */ 80 __u8 phys_proc_id; /* Physical processor id. */
81 __u8 cpu_core_id; /* Core id */ 81 __u8 cpu_core_id; /* Core id */
82 __u8 cpu_index; /* index into per_cpu list */
82#endif 83#endif
83} __attribute__((__aligned__(SMP_CACHE_BYTES))); 84} __attribute__((__aligned__(SMP_CACHE_BYTES)));
84 85
@@ -103,14 +104,19 @@ extern struct tss_struct doublefault_tss;
103DECLARE_PER_CPU(struct tss_struct, init_tss); 104DECLARE_PER_CPU(struct tss_struct, init_tss);
104 105
105#ifdef CONFIG_SMP 106#ifdef CONFIG_SMP
106extern struct cpuinfo_x86 cpu_data[]; 107DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info);
107#define current_cpu_data cpu_data[smp_processor_id()] 108#define cpu_data(cpu) per_cpu(cpu_info, cpu)
109#define current_cpu_data cpu_data(smp_processor_id())
108#else 110#else
109#define cpu_data (&boot_cpu_data) 111#define cpu_data(cpu) boot_cpu_data
110#define current_cpu_data boot_cpu_data 112#define current_cpu_data boot_cpu_data
111#endif 113#endif
112 114
113extern int cpu_llc_id[NR_CPUS]; 115/*
116 * the following now lives in the per cpu area:
117 * extern int cpu_llc_id[NR_CPUS];
118 */
119DECLARE_PER_CPU(u8, cpu_llc_id);
114extern char ignore_fpu_irq; 120extern char ignore_fpu_irq;
115 121
116void __init cpu_detect(struct cpuinfo_x86 *c); 122void __init cpu_detect(struct cpuinfo_x86 *c);
diff --git a/include/asm-x86/processor_64.h b/include/asm-x86/processor_64.h
index f422becbddd9..e4f19970a82b 100644
--- a/include/asm-x86/processor_64.h
+++ b/include/asm-x86/processor_64.h
@@ -74,6 +74,7 @@ struct cpuinfo_x86 {
74 __u8 booted_cores; /* number of cores as seen by OS */ 74 __u8 booted_cores; /* number of cores as seen by OS */
75 __u8 phys_proc_id; /* Physical Processor id. */ 75 __u8 phys_proc_id; /* Physical Processor id. */
76 __u8 cpu_core_id; /* Core id. */ 76 __u8 cpu_core_id; /* Core id. */
77 __u8 cpu_index; /* index into per_cpu list */
77#endif 78#endif
78} ____cacheline_aligned; 79} ____cacheline_aligned;
79 80
@@ -88,11 +89,12 @@ struct cpuinfo_x86 {
88#define X86_VENDOR_UNKNOWN 0xff 89#define X86_VENDOR_UNKNOWN 0xff
89 90
90#ifdef CONFIG_SMP 91#ifdef CONFIG_SMP
91extern struct cpuinfo_x86 cpu_data[]; 92DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info);
92#define current_cpu_data cpu_data[smp_processor_id()] 93#define cpu_data(cpu) per_cpu(cpu_info, cpu)
94#define current_cpu_data cpu_data(smp_processor_id())
93#else 95#else
94#define cpu_data (&boot_cpu_data) 96#define cpu_data(cpu) boot_cpu_data
95#define current_cpu_data boot_cpu_data 97#define current_cpu_data boot_cpu_data
96#endif 98#endif
97 99
98extern char ignore_irq13; 100extern char ignore_irq13;
@@ -390,12 +392,6 @@ static inline void sync_core(void)
390 asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory"); 392 asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory");
391} 393}
392 394
393#define ARCH_HAS_PREFETCH
394static inline void prefetch(void *x)
395{
396 asm volatile("prefetcht0 (%0)" :: "r" (x));
397}
398
399#define ARCH_HAS_PREFETCHW 1 395#define ARCH_HAS_PREFETCHW 1
400static inline void prefetchw(void *x) 396static inline void prefetchw(void *x)
401{ 397{
diff --git a/include/asm-x86/proto.h b/include/asm-x86/proto.h
index c44a3a93b5a4..dabba55f7ed8 100644
--- a/include/asm-x86/proto.h
+++ b/include/asm-x86/proto.h
@@ -83,8 +83,6 @@ extern unsigned tsc_khz;
83extern int reboot_force; 83extern int reboot_force;
84extern int notsc_setup(char *); 84extern int notsc_setup(char *);
85 85
86extern int timer_over_8254;
87
88extern int gsi_irq_sharing(int gsi); 86extern int gsi_irq_sharing(int gsi);
89 87
90extern int force_mwait; 88extern int force_mwait;
diff --git a/include/asm-x86/ptrace_32.h b/include/asm-x86/ptrace_32.h
index 6002597b9e12..78d063dabe0a 100644
--- a/include/asm-x86/ptrace_32.h
+++ b/include/asm-x86/ptrace_32.h
@@ -55,6 +55,8 @@ static inline int v8086_mode(struct pt_regs *regs)
55} 55}
56 56
57#define instruction_pointer(regs) ((regs)->eip) 57#define instruction_pointer(regs) ((regs)->eip)
58#define frame_pointer(regs) ((regs)->ebp)
59#define stack_pointer(regs) ((regs)->esp)
58#define regs_return_value(regs) ((regs)->eax) 60#define regs_return_value(regs) ((regs)->eax)
59 61
60extern unsigned long profile_pc(struct pt_regs *regs); 62extern unsigned long profile_pc(struct pt_regs *regs);
diff --git a/include/asm-x86/ptrace_64.h b/include/asm-x86/ptrace_64.h
index 7f166ccb0606..7bfe61e1b705 100644
--- a/include/asm-x86/ptrace_64.h
+++ b/include/asm-x86/ptrace_64.h
@@ -40,6 +40,8 @@ struct pt_regs {
40#define user_mode(regs) (!!((regs)->cs & 3)) 40#define user_mode(regs) (!!((regs)->cs & 3))
41#define user_mode_vm(regs) user_mode(regs) 41#define user_mode_vm(regs) user_mode(regs)
42#define instruction_pointer(regs) ((regs)->rip) 42#define instruction_pointer(regs) ((regs)->rip)
43#define frame_pointer(regs) ((regs)->rbp)
44#define stack_pointer(regs) ((regs)->rsp)
43#define regs_return_value(regs) ((regs)->rax) 45#define regs_return_value(regs) ((regs)->rax)
44 46
45extern unsigned long profile_pc(struct pt_regs *regs); 47extern unsigned long profile_pc(struct pt_regs *regs);
diff --git a/include/asm-x86/smp_32.h b/include/asm-x86/smp_32.h
index 1f576a93368f..7056d8684522 100644
--- a/include/asm-x86/smp_32.h
+++ b/include/asm-x86/smp_32.h
@@ -39,9 +39,11 @@ extern void lock_ipi_call_lock(void);
39extern void unlock_ipi_call_lock(void); 39extern void unlock_ipi_call_lock(void);
40 40
41#define MAX_APICID 256 41#define MAX_APICID 256
42extern u8 x86_cpu_to_apicid[]; 42extern u8 __initdata x86_cpu_to_apicid_init[];
43extern void *x86_cpu_to_apicid_ptr;
44DECLARE_PER_CPU(u8, x86_cpu_to_apicid);
43 45
44#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] 46#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
45 47
46extern void set_cpu_sibling_map(int cpu); 48extern void set_cpu_sibling_map(int cpu);
47 49
diff --git a/include/asm-x86/smp_64.h b/include/asm-x86/smp_64.h
index d30e9b684fdd..6f0e0273b646 100644
--- a/include/asm-x86/smp_64.h
+++ b/include/asm-x86/smp_64.h
@@ -37,6 +37,8 @@ extern void lock_ipi_call_lock(void);
37extern void unlock_ipi_call_lock(void); 37extern void unlock_ipi_call_lock(void);
38extern int smp_num_siblings; 38extern int smp_num_siblings;
39extern void smp_send_reschedule(int cpu); 39extern void smp_send_reschedule(int cpu);
40extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
41 void *info, int wait);
40 42
41/* 43/*
42 * cpu_sibling_map and cpu_core_map now live 44 * cpu_sibling_map and cpu_core_map now live
@@ -47,7 +49,7 @@ extern void smp_send_reschedule(int cpu);
47 */ 49 */
48DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 50DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
49DECLARE_PER_CPU(cpumask_t, cpu_core_map); 51DECLARE_PER_CPU(cpumask_t, cpu_core_map);
50extern u8 cpu_llc_id[NR_CPUS]; 52DECLARE_PER_CPU(u8, cpu_llc_id);
51 53
52#define SMP_TRAMPOLINE_BASE 0x6000 54#define SMP_TRAMPOLINE_BASE 0x6000
53 55
@@ -84,7 +86,9 @@ static inline int hard_smp_processor_id(void)
84 * Some lowlevel functions might want to know about 86 * Some lowlevel functions might want to know about
85 * the real APIC ID <-> CPU # mapping. 87 * the real APIC ID <-> CPU # mapping.
86 */ 88 */
87extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */ 89extern u8 __initdata x86_cpu_to_apicid_init[];
90extern void *x86_cpu_to_apicid_ptr;
91DECLARE_PER_CPU(u8, x86_cpu_to_apicid); /* physical ID */
88extern u8 bios_cpu_apicid[]; 92extern u8 bios_cpu_apicid[];
89 93
90static inline int cpu_present_to_apicid(int mps_cpu) 94static inline int cpu_present_to_apicid(int mps_cpu)
@@ -115,8 +119,9 @@ static __inline int logical_smp_processor_id(void)
115} 119}
116 120
117#ifdef CONFIG_SMP 121#ifdef CONFIG_SMP
118#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] 122#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
119#else 123#else
124extern unsigned int boot_cpu_id;
120#define cpu_physical_id(cpu) boot_cpu_id 125#define cpu_physical_id(cpu) boot_cpu_id
121#endif /* !CONFIG_SMP */ 126#endif /* !CONFIG_SMP */
122#endif 127#endif
diff --git a/include/asm-x86/system_32.h b/include/asm-x86/system_32.h
index db6283eb5e46..ef8468883bac 100644
--- a/include/asm-x86/system_32.h
+++ b/include/asm-x86/system_32.h
@@ -315,5 +315,6 @@ extern unsigned long arch_align_stack(unsigned long sp);
315extern void free_init_pages(char *what, unsigned long begin, unsigned long end); 315extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
316 316
317void default_idle(void); 317void default_idle(void);
318void __show_registers(struct pt_regs *, int all);
318 319
319#endif 320#endif
diff --git a/include/asm-x86/topology_32.h b/include/asm-x86/topology_32.h
index ae1074603c4b..9040f5a61278 100644
--- a/include/asm-x86/topology_32.h
+++ b/include/asm-x86/topology_32.h
@@ -28,8 +28,8 @@
28#define _ASM_I386_TOPOLOGY_H 28#define _ASM_I386_TOPOLOGY_H
29 29
30#ifdef CONFIG_X86_HT 30#ifdef CONFIG_X86_HT
31#define topology_physical_package_id(cpu) (cpu_data[cpu].phys_proc_id) 31#define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id)
32#define topology_core_id(cpu) (cpu_data[cpu].cpu_core_id) 32#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
33#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) 33#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu))
34#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) 34#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
35#endif 35#endif
diff --git a/include/asm-x86/topology_64.h b/include/asm-x86/topology_64.h
index c0c93d744673..a718dda037e0 100644
--- a/include/asm-x86/topology_64.h
+++ b/include/asm-x86/topology_64.h
@@ -56,8 +56,8 @@ extern int __node_distance(int, int);
56#endif 56#endif
57 57
58#ifdef CONFIG_SMP 58#ifdef CONFIG_SMP
59#define topology_physical_package_id(cpu) (cpu_data[cpu].phys_proc_id) 59#define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id)
60#define topology_core_id(cpu) (cpu_data[cpu].cpu_core_id) 60#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id)
61#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) 61#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu))
62#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) 62#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
63#define mc_capable() (boot_cpu_data.x86_max_cores > 1) 63#define mc_capable() (boot_cpu_data.x86_max_cores > 1)