Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

64 files changed, 305 insertions, 240 deletions

diff --git a/include/asm-arm/apm.h b/include/asm-arm/apm.h
deleted file mode 100644
index d09113b37e4a..000000000000
--- a/include/asm-arm/apm.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/* -*- linux-c -*-
- *
- * (C) 2003 zecke@handhelds.org
- *
- * GPL version 2
- *
- * based on arch/arm/kernel/apm.c
- * factor out the information needed by architectures to provide
- * apm status
- *
- *
- */
-#ifndef ARM_ASM_SA1100_APM_H
-#define ARM_ASM_SA1100_APM_H
-
-#include <linux/apm_bios.h>
-
-/*
- * This structure gets filled in by the machine specific 'get_power_status'
- * implementation.  Any fields which are not set default to a safe value.
- */
-struct apm_power_info {
-        unsigned char   ac_line_status;
-#define APM_AC_OFFLINE                  0
-#define APM_AC_ONLINE                   1
-#define APM_AC_BACKUP                   2
-#define APM_AC_UNKNOWN                  0xff
-
-        unsigned char   battery_status;
-#define APM_BATTERY_STATUS_HIGH         0
-#define APM_BATTERY_STATUS_LOW          1
-#define APM_BATTERY_STATUS_CRITICAL     2
-#define APM_BATTERY_STATUS_CHARGING     3
-#define APM_BATTERY_STATUS_NOT_PRESENT  4
-#define APM_BATTERY_STATUS_UNKNOWN      0xff
-
-        unsigned char   battery_flag;
-#define APM_BATTERY_FLAG_HIGH           (1 << 0)
-#define APM_BATTERY_FLAG_LOW            (1 << 1)
-#define APM_BATTERY_FLAG_CRITICAL       (1 << 2)
-#define APM_BATTERY_FLAG_CHARGING       (1 << 3)
-#define APM_BATTERY_FLAG_NOT_PRESENT    (1 << 7)
-#define APM_BATTERY_FLAG_UNKNOWN        0xff
-
-        int             battery_life;
-        int             time;
-        int             units;
-#define APM_UNITS_MINS                  0
-#define APM_UNITS_SECS                  1
-#define APM_UNITS_UNKNOWN               -1
-
-};
-
-/*
- * This allows machines to provide their own "apm get power status" function.
- */
-extern void (*apm_get_power_status)(struct apm_power_info *);
-
-/*
- * Queue an event (APM_SYS_SUSPEND or APM_CRITICAL_SUSPEND)
- */
-void apm_queue_event(apm_event_t event);
-
-#endif
diff --git a/include/asm-arm/arch-at91rm9200/at91_ecc.h b/include/asm-arm/arch-at91rm9200/at91_ecc.h
index fddf256a98d3..5c564ede5c5d 100644
--- a/include/asm-arm/arch-at91rm9200/at91_ecc.h
+++ b/include/asm-arm/arch-at91rm9200/at91_ecc.h
@@ -14,7 +14,7 @@
 #define AT91_ECC_H
 
 #define AT91_ECC_CR             (AT91_ECC + 0x00)       /* Control register */
-#define         AT91_ECC_RST            (1 << 0)                /* Reset parity */
+#define         AT91_ECC_RST            (1 << 0)                /* Reset parity */
 
 #define AT91_ECC_MR             (AT91_ECC + 0x04)       /* Mode register */
 #define         AT91_ECC_PAGESIZE       (3 << 0)                /* Page Size */
@@ -23,16 +23,16 @@
 #define                 AT91_ECC_PAGESIZE_2112          (2)
 #define                 AT91_ECC_PAGESIZE_4224          (3)
 
-#define AT91_ECC_SR             (AT91_ECC + 0x08)       /* Status register */
+#define AT91_ECC_SR             (AT91_ECC + 0x08)       /* Status register */
 #define         AT91_ECC_RECERR         (1 << 0)                /* Recoverable Error */
 #define         AT91_ECC_ECCERR         (1 << 1)                /* ECC Single Bit Error */
 #define         AT91_ECC_MULERR         (1 << 2)                /* Multiple Errors */
 
-#define AT91_ECC_PR             (AT91_ECC + 0x0c)       /* Parity register */
+#define AT91_ECC_PR             (AT91_ECC + 0x0c)       /* Parity register */
 #define         AT91_ECC_BITADDR        (0xf << 0)              /* Bit Error Address */
 #define         AT91_ECC_WORDADDR       (0xfff << 4)            /* Word Error Address */
 
-#define AT91_ECC_NPR            (AT91_ECC + 0x10)       /* NParity register */
+#define AT91_ECC_NPR            (AT91_ECC + 0x10)       /* NParity register */
 #define         AT91_ECC_NPARITY        (0xffff << 0)           /* NParity */
 
 #endif
diff --git a/include/asm-arm/arch-at91rm9200/at91_pmc.h b/include/asm-arm/arch-at91rm9200/at91_pmc.h
index de8c3da74a01..c3b489d09b6c 100644
--- a/include/asm-arm/arch-at91rm9200/at91_pmc.h
+++ b/include/asm-arm/arch-at91rm9200/at91_pmc.h
@@ -61,7 +61,7 @@
 #define                 AT91_PMC_CSS_PLLA               (2 << 0)
 #define                 AT91_PMC_CSS_PLLB               (3 << 0)
 #define         AT91_PMC_PRES           (7 <<  2)               /* Master Clock Prescaler */
-#define                 AT91_PMC_PRES_1                 (0 << 2)
+#define                 AT91_PMC_PRES_1                 (0 << 2)
 #define                 AT91_PMC_PRES_2                 (1 << 2)
 #define                 AT91_PMC_PRES_4                 (2 << 2)
 #define                 AT91_PMC_PRES_8                 (3 << 2)
diff --git a/include/asm-arm/arch-at91rm9200/at91_rstc.h b/include/asm-arm/arch-at91rm9200/at91_rstc.h
index ccdc52da973d..237d3c40b318 100644
--- a/include/asm-arm/arch-at91rm9200/at91_rstc.h
+++ b/include/asm-arm/arch-at91rm9200/at91_rstc.h
@@ -17,7 +17,7 @@
 #define         AT91_RSTC_PROCRST       (1 << 0)                /* Processor Reset */
 #define         AT91_RSTC_PERRST        (1 << 2)                /* Peripheral Reset */
 #define         AT91_RSTC_EXTRST        (1 << 3)                /* External Reset */
-#define         AT01_RSTC_KEY           (0xff << 24)            /* KEY Password */
+#define         AT91_RSTC_KEY           (0xff << 24)            /* KEY Password */
 
 #define AT91_RSTC_SR            (AT91_RSTC + 0x04)      /* Reset Controller Status Register */
 #define         AT91_RSTC_URSTS         (1 << 0)                /* User Reset Status */
diff --git a/include/asm-arm/arch-at91rm9200/at91_rtc.h b/include/asm-arm/arch-at91rm9200/at91_rtc.h
index 6e5065d56260..095fe0883102 100644
--- a/include/asm-arm/arch-at91rm9200/at91_rtc.h
+++ b/include/asm-arm/arch-at91rm9200/at91_rtc.h
@@ -21,21 +21,21 @@
 #define         AT91_RTC_UPDCAL         (1 <<  1)               /* Update Request Calendar Register */
 #define         AT91_RTC_TIMEVSEL       (3 <<  8)               /* Time Event Selection */
 #define                 AT91_RTC_TIMEVSEL_MINUTE        (0 << 8)
-#define                 AT91_RTC_TIMEVSEL_HOUR          (1 << 8)
-#define                 AT91_RTC_TIMEVSEL_DAY24         (2 << 8)
-#define                 AT91_RTC_TIMEVSEL_DAY12         (3 << 8)
+#define                 AT91_RTC_TIMEVSEL_HOUR          (1 << 8)
+#define                 AT91_RTC_TIMEVSEL_DAY24         (2 << 8)
+#define                 AT91_RTC_TIMEVSEL_DAY12         (3 << 8)
 #define         AT91_RTC_CALEVSEL       (3 << 16)               /* Calendar Event Selection */
-#define                 AT91_RTC_CALEVSEL_WEEK          (0 << 16)
-#define                 AT91_RTC_CALEVSEL_MONTH         (1 << 16)
-#define                 AT91_RTC_CALEVSEL_YEAR          (2 << 16)
+#define                 AT91_RTC_CALEVSEL_WEEK          (0 << 16)
+#define                 AT91_RTC_CALEVSEL_MONTH         (1 << 16)
+#define                 AT91_RTC_CALEVSEL_YEAR          (2 << 16)
 
 #define AT91_RTC_MR             (AT91_RTC + 0x04)       /* Mode Register */
-#define         AT91_RTC_HRMOD          (1 <<  0)               /* 12/24 Hour Mode */
+#define                 AT91_RTC_HRMOD          (1 <<  0)               /* 12/24 Hour Mode */
 
 #define AT91_RTC_TIMR           (AT91_RTC + 0x08)       /* Time Register */
 #define         AT91_RTC_SEC            (0x7f <<  0)            /* Current Second */
 #define         AT91_RTC_MIN            (0x7f <<  8)            /* Current Minute */
-#define         AT91_RTC_HOUR           (0x3f << 16)            /* Current Hour */
+#define         AT91_RTC_HOUR           (0x3f << 16)            /* Current Hour */
 #define         AT91_RTC_AMPM           (1    << 22)            /* Ante Meridiem Post Meridiem Indicator */
 
 #define AT91_RTC_CALR           (AT91_RTC + 0x0c)       /* Calendar Register */
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200.h b/include/asm-arm/arch-at91rm9200/at91rm9200.h
index 4d51177efddd..c569b6a21a42 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200.h
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200.h
@@ -274,7 +274,7 @@
 #define AT91_PD19_TPK7          (1 << 19)       /* B: ETM Trace Packet Port 7 */
 #define AT91_PD20_NPCS3         (1 << 20)       /* A: SPI Peripheral Chip Select 3 */
 #define AT91_PD20_TPK8          (1 << 20)       /* B: ETM Trace Packet Port 8 */
-#define AT91_PD21_RTS0          (1 << 21)       /* A: USART Ready To Send 0 */
+#define AT91_PD21_RTS0          (1 << 21)       /* A: USART Ready To Send 0 */
 #define AT91_PD21_TPK9          (1 << 21)       /* B: ETM Trace Packet Port 9 */
 #define AT91_PD22_RTS1          (1 << 22)       /* A: USART Ready To Send 1 */
 #define AT91_PD22_TPK10         (1 << 22)       /* B: ETM Trace Packet Port 10 */
diff --git a/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h b/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h
index 746d973705bf..78f6b4917b8b 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h
+++ b/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h
@@ -58,7 +58,7 @@
 #define         AT91_MATRIX_RCB1                (1 << 1)        /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 
 #define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x11C)   /* EBI Chip Select Assignment Register */
-#define         AT91_MATRIX_CS1A                (1 << 1)         /* Chip Select 1 Assignment */
+#define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
 #define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
 #define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
 #define         AT91_MATRIX_CS3A                (1 << 3)        /* Chip Select 3 Assignment */
diff --git a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
index 270a5dcdf1cd..ec88efabbe6c 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
+++ b/include/asm-arm/arch-at91rm9200/at91sam9261_matrix.h
@@ -15,7 +15,7 @@
 
 #define AT91_MATRIX_MCFG        (AT91_MATRIX + 0x00)    /* Master Configuration Register */
 #define         AT91_MATRIX_RCB0        (1 << 0)                /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define         AT01_MATRIX_RCB1        (1 << 1)                /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+#define         AT91_MATRIX_RCB1        (1 << 1)                /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
 
 #define AT91_MATRIX_SCFG0       (AT91_MATRIX + 0x04)    /* Slave Configuration Register 0 */
 #define AT91_MATRIX_SCFG1       (AT91_MATRIX + 0x08)    /* Slave Configuration Register 1 */
@@ -43,8 +43,8 @@
 
 #define AT91_MATRIX_EBICSA      (AT91_MATRIX + 0x30)    /* EBI Chip Select Assignment Register */
 #define         AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
-#define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
-#define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
+#define                 AT91_MATRIX_CS1A_SMC            (0 << 1)
+#define                 AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
 #define         AT91_MATRIX_CS3A                (1 << 3)        /* Chip Select 3 Assignment */
 #define                 AT91_MATRIX_CS3A_SMC            (0 << 3)
 #define                 AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
index 7d94968b5d57..972e7531c7f4 100644
--- a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
+++ b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
@@ -33,14 +33,14 @@
 #define                 AT91_SDRAMC_NC_9        (1 << 0)
 #define                 AT91_SDRAMC_NC_10       (2 << 0)
 #define                 AT91_SDRAMC_NC_11       (3 << 0)
-#define         AT91_SDRAMC_NR          (3 << 2)                /* Number of Row Bits */
+#define         AT91_SDRAMC_NR          (3 << 2)                /* Number of Row Bits */
 #define                 AT91_SDRAMC_NR_11       (0 << 2)
 #define                 AT91_SDRAMC_NR_12       (1 << 2)
 #define                 AT91_SDRAMC_NR_13       (2 << 2)
-#define         AT91_SDRAMC_NB          (1 << 4)                /* Number of Banks */
+#define         AT91_SDRAMC_NB          (1 << 4)                /* Number of Banks */
 #define                 AT91_SDRAMC_NB_2        (0 << 4)
-#define                 AT91_SDRAMC_NB_4        (1 << 4)
-#define         AT91_SDRAMC_CAS         (3 << 5)                /* CAS Latency */
+#define                 AT91_SDRAMC_NB_4        (1 << 4)
+#define         AT91_SDRAMC_CAS         (3 << 5)                /* CAS Latency */
 #define                 AT91_SDRAMC_CAS_1       (1 << 5)
 #define                 AT91_SDRAMC_CAS_2       (2 << 5)
 #define                 AT91_SDRAMC_CAS_3       (3 << 5)
@@ -110,10 +110,10 @@
 #define AT91_SMC_MODE(n)        (AT91_SMC + 0x0c + ((n)*0x10))  /* Mode Register for CS n */
 #define         AT91_SMC_READMODE       (1 <<  0)                       /* Read Mode */
 #define         AT91_SMC_WRITEMODE      (1 <<  1)                       /* Write Mode */
-#define         AT91_SMC_EXNWMODE       (3 <<  5)                       /* NWAIT Mode */
-#define                 AT91_SMC_EXNWMODE_DISABLE       (0 << 5)
-#define                 AT91_SMC_EXNWMODE_FROZEN        (2 << 5)
-#define                 AT91_SMC_EXNWMODE_READY         (3 << 5)
+#define         AT91_SMC_EXNWMODE       (3 <<  4)                       /* NWAIT Mode */
+#define                 AT91_SMC_EXNWMODE_DISABLE       (0 << 4)
+#define                 AT91_SMC_EXNWMODE_FROZEN        (2 << 4)
+#define                 AT91_SMC_EXNWMODE_READY         (3 << 4)
 #define         AT91_SMC_BAT            (1 <<  8)                       /* Byte Access Type */
 #define                 AT91_SMC_BAT_SELECT             (0 << 8)
 #define                 AT91_SMC_BAT_WRITE              (1 << 8)
diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h
index 9a42f5de9e57..ae532e304bf1 100644
--- a/include/asm-arm/arch-ep93xx/irqs.h
+++ b/include/asm-arm/arch-ep93xx/irqs.h
@@ -22,9 +22,9 @@
 #define IRQ_EP93XX_DMAM2P9              16
 #define IRQ_EP93XX_DMAM2M0              17
 #define IRQ_EP93XX_DMAM2M1              18
-#define IRQ_EP93XX_GPIO0MUX             20
-#define IRQ_EP93XX_GPIO1MUX             21
-#define IRQ_EP93XX_GPIO2MUX             22
+#define IRQ_EP93XX_GPIO0MUX             19
+#define IRQ_EP93XX_GPIO1MUX             20
+#define IRQ_EP93XX_GPIO2MUX             21
 #define IRQ_EP93XX_GPIO3MUX             22
 #define IRQ_EP93XX_UART1RX              23
 #define IRQ_EP93XX_UART1TX              24
diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h
index a6912b3d8671..e56a4e247d62 100644
--- a/include/asm-arm/arch-imx/imx-regs.h
+++ b/include/asm-arm/arch-imx/imx-regs.h
@@ -41,7 +41,13 @@
 
 /* PLL registers */
 #define CSCR   __REG(IMX_PLL_BASE)        /* Clock Source Control Register */
-#define CSCR_SYSTEM_SEL (1<<16)
+#define CSCR_SPLL_RESTART       (1<<22)
+#define CSCR_MPLL_RESTART       (1<<21)
+#define CSCR_SYSTEM_SEL         (1<<16)
+#define CSCR_BCLK_DIV           (0xf<<10)
+#define CSCR_MPU_PRESC          (1<<15)
+#define CSCR_SPEN               (1<<1)
+#define CSCR_MPEN               (1<<0)
 
 #define MPCTL0 __REG(IMX_PLL_BASE + 0x4)  /* MCU PLL Control Register 0 */
 #define MPCTL1 __REG(IMX_PLL_BASE + 0x8)  /* MCU PLL and System Clock Register 1 */
@@ -49,8 +55,6 @@
 #define SPCTL1 __REG(IMX_PLL_BASE + 0x10) /* System PLL Control Register 1 */
 #define PCDR   __REG(IMX_PLL_BASE + 0x20) /* Peripheral Clock Divider Register */
 
-#define CSCR_MPLL_RESTART (1<<21)
-
 /*
  *  GPIO Module and I/O Multiplexer
  *  x = 0..3 for reg_A, reg_B, reg_C, reg_D
diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h
index db6de2480a24..5a7bdb526606 100644
--- a/include/asm-arm/arch-iop13xx/io.h
+++ b/include/asm-arm/arch-iop13xx/io.h
@@ -21,10 +21,11 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)      (a)
+#define __io(a) __iop13xx_io(a)
 #define __mem_pci(a) (a)
 #define __mem_isa(a) (a)
 
+extern void __iomem * __iop13xx_io(unsigned long io_addr);
 extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
 extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
         unsigned long flags);
diff --git a/include/asm-arm/arch-iop13xx/iq81340.h b/include/asm-arm/arch-iop13xx/iq81340.h
index b98f8f109c22..ba2cf931e9ce 100644
--- a/include/asm-arm/arch-iop13xx/iq81340.h
+++ b/include/asm-arm/arch-iop13xx/iq81340.h
@@ -24,8 +24,5 @@
 #define PBI_CF_IDE_BASE     (IQ81340_CMP_FLSH)
 #define PBI_CF_BAR_ADDR     (IOP13XX_PBI_BAR1)
 
-/* These are the values used in the Machine description */
-#define PHYS_IO         0xfeffff00
-#define IO_PG_OFFSET    0xffffff00
-#define BOOT_PARAM_OFFSET  0x00000100
+
 #endif  /* _IQ81340_H_ */
diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h
index 4bbd85f3ed2a..2e9469047eb1 100644
--- a/include/asm-arm/arch-iop32x/iop32x.h
+++ b/include/asm-arm/arch-iop32x/iop32x.h
@@ -19,7 +19,7 @@
  * Peripherals that are shared between the iop32x and iop33x but
  * located at different addresses.
  */
-#define IOP3XX_GPIO_REG(reg)    (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg))
+#define IOP3XX_GPIO_REG(reg)    (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg))
 #define IOP3XX_TIMER_REG(reg)   (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
 
 #include <asm/hardware/iop3xx.h>
diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h
index c85fc06a043c..6d859d742d7f 100644
--- a/include/asm-arm/arch-ixp23xx/memory.h
+++ b/include/asm-arm/arch-ixp23xx/memory.h
@@ -41,21 +41,7 @@
         data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR);                \
          __phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); })
 
-/*
- * Coherency support.  Only supported on A2 CPUs or on A1
- * systems that have the cache coherency workaround.
- */
-static inline int __ixp23xx_arch_is_coherent(void)
-{
-        extern unsigned int processor_id;
-
-        if (((processor_id & 15) >= 4) || machine_is_roadrunner())
-                return 1;
-
-        return 0;
-}
-
-#define arch_is_coherent()      __ixp23xx_arch_is_coherent()
+#define arch_is_coherent()      1
 
 #endif
 
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 0d517267fb63..b7b5414d9320 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -238,9 +238,6 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
 #define memcpy_fromio(a,c,l)            _memcpy_fromio((a),(c),(l))
 #define memcpy_toio(c,a,l)              _memcpy_toio((c),(a),(l))
 
-#define eth_io_copy_and_sum(s,c,l,b) \
-                                eth_copy_and_sum((s),__mem_pci(c),(l),(b))
-
 static inline int
 check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
                 int length)
diff --git a/include/asm-arm/arch-pnx4008/i2c.h b/include/asm-arm/arch-pnx4008/i2c.h
new file mode 100644
index 000000000000..92e8d65006f7
--- /dev/null
+++ b/include/asm-arm/arch-pnx4008/i2c.h
@@ -0,0 +1,67 @@
+/*
+ * PNX4008-specific tweaks for I2C IP3204 block
+ *
+ * Author: Vitaly Wool <vwool@ru.mvista.com>
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#ifndef __ASM_ARCH_I2C_H__
+#define __ASM_ARCH_I2C_H__
+
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+
+enum {
+        mstatus_tdi = 0x00000001,
+        mstatus_afi = 0x00000002,
+        mstatus_nai = 0x00000004,
+        mstatus_drmi = 0x00000008,
+        mstatus_active = 0x00000020,
+        mstatus_scl = 0x00000040,
+        mstatus_sda = 0x00000080,
+        mstatus_rff = 0x00000100,
+        mstatus_rfe = 0x00000200,
+        mstatus_tff = 0x00000400,
+        mstatus_tfe = 0x00000800,
+};
+
+enum {
+        mcntrl_tdie = 0x00000001,
+        mcntrl_afie = 0x00000002,
+        mcntrl_naie = 0x00000004,
+        mcntrl_drmie = 0x00000008,
+        mcntrl_daie = 0x00000020,
+        mcntrl_rffie = 0x00000040,
+        mcntrl_tffie = 0x00000080,
+        mcntrl_reset = 0x00000100,
+        mcntrl_cdbmode = 0x00000400,
+};
+
+enum {
+        rw_bit = 1 << 0,
+        start_bit = 1 << 8,
+        stop_bit = 1 << 9,
+};
+
+#define I2C_REG_RX(a)   ((a)->ioaddr)           /* Rx FIFO reg (RO) */
+#define I2C_REG_TX(a)   ((a)->ioaddr)           /* Tx FIFO reg (WO) */
+#define I2C_REG_STS(a)  ((a)->ioaddr + 0x04)    /* Status reg (RO) */
+#define I2C_REG_CTL(a)  ((a)->ioaddr + 0x08)    /* Ctl reg */
+#define I2C_REG_CKL(a)  ((a)->ioaddr + 0x0c)    /* Clock divider low */
+#define I2C_REG_CKH(a)  ((a)->ioaddr + 0x10)    /* Clock divider high */
+#define I2C_REG_ADR(a)  ((a)->ioaddr + 0x14)    /* I2C address */
+#define I2C_REG_RFL(a)  ((a)->ioaddr + 0x18)    /* Rx FIFO level (RO) */
+#define I2C_REG_TFL(a)  ((a)->ioaddr + 0x1c)    /* Tx FIFO level (RO) */
+#define I2C_REG_RXB(a)  ((a)->ioaddr + 0x20)    /* Num of bytes Rx-ed (RO) */
+#define I2C_REG_TXB(a)  ((a)->ioaddr + 0x24)    /* Num of bytes Tx-ed (RO) */
+#define I2C_REG_TXS(a)  ((a)->ioaddr + 0x28)    /* Tx slave FIFO (RO) */
+#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c)    /* Tx slave FIFO level (RO) */
+
+#define HCLK_MHZ                13
+#define I2C_CHIP_NAME           "PNX4008-I2C"
+
+#endif                          /* __ASM_ARCH_I2C_H___ */
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 083e03c5639f..e24f6b6c79ae 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1626,7 +1626,7 @@
 #define SSCR0_RIM       (1 << 22)       /* Receive FIFO overrrun interrupt mask */
 #define SSCR0_TUM       (1 << 23)       /* Transmit FIFO underrun interrupt mask */
 #define SSCR0_FRDC      (0x07000000)    /* Frame rate divider control (mask) */
-#define SSCR0_SlotsPerFrm(x) ((x) - 1)  /* Time slots per frame [1..8] */
+#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24)  /* Time slots per frame [1..8] */
 #define SSCR0_ADC       (1 << 30)       /* Audio clock select */
 #define SSCR0_MOD       (1 << 31)       /* Mode (normal or network) */
 #endif
@@ -1655,6 +1655,7 @@
 #define SSCR0_EDSS              (1 << 20)       /* Extended Data Size Select */
 
 /* extra bits in PXA255, PXA26x and PXA27x SSP ports */
+#define SSCR0_TISSP             (1 << 4)        /* TI Sync Serial Protocol */
 #define SSCR0_PSP               (3 << 4)        /* PSP - Programmable Serial Protocol */
 #define SSCR1_TTELP             (1 << 31)       /* TXD Tristate Enable Last Phase */
 #define SSCR1_TTE               (1 << 30)       /* TXD Tristate Enable */
diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h
index 915590c391c8..acc7ec7a84a1 100644
--- a/include/asm-arm/arch-pxa/pxa2xx_spi.h
+++ b/include/asm-arm/arch-pxa/pxa2xx_spi.h
@@ -27,16 +27,13 @@
 #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00)
 #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
 #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
-#define SSP_TIMEOUT_SCALE (2712)
 #elif defined(CONFIG_PXA27x)
 #define CLOCK_SPEED_HZ 13000000
 #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
 #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
 #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
-#define SSP_TIMEOUT_SCALE (769)
 #endif
 
-#define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE)
 #define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1)))))
 #define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2)))))
 #define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3)))))
@@ -63,7 +60,7 @@ struct pxa2xx_spi_chip {
         u8 tx_threshold;
         u8 rx_threshold;
         u8 dma_burst_size;
-        u32 timeout_microsecs;
+        u32 timeout;
         u8 enable_loopback;
         void (*cs_control)(u32 command);
 };
diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h
index 40e8e270d337..dcebf6d61903 100644
--- a/include/asm-arm/arch-s3c2410/anubis-cpld.h
+++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/anubis-cpld.h
  *
- * (c) 2005 Simtec Electronics
+ * Copyright (c) 2005 Simtec Electronics
  *      http://www.simtec.co.uk/products/
  *      Ben Dooks <ben@simtec.co.uk>
  *
diff --git a/include/asm-arm/arch-s3c2410/anubis-irq.h b/include/asm-arm/arch-s3c2410/anubis-irq.h
index 4b5f423779df..cd77a70d45c0 100644
--- a/include/asm-arm/arch-s3c2410/anubis-irq.h
+++ b/include/asm-arm/arch-s3c2410/anubis-irq.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/anubis-irq.h
  *
- * (c) 2005 Simtec Electronics
+ * Copyright (c) 2005 Simtec Electronics
  *      http://www.simtec.co.uk/products/
  *      Ben Dooks <ben@simtec.co.uk>
  *
diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h
index 058a2104b035..ab076de4a0d0 100644
--- a/include/asm-arm/arch-s3c2410/anubis-map.h
+++ b/include/asm-arm/arch-s3c2410/anubis-map.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/anubis-map.h
  *
- * (c) 2005 Simtec Electronics
+ * Copyright (c) 2005 Simtec Electronics
  *      http://www.simtec.co.uk/products/
  *      Ben Dooks <ben@simtec.co.uk>
  *
diff --git a/include/asm-arm/arch-s3c2410/audio.h b/include/asm-arm/arch-s3c2410/audio.h
index 7e0222276c98..65e0acffa1ad 100644
--- a/include/asm-arm/arch-s3c2410/audio.h
+++ b/include/asm-arm/arch-s3c2410/audio.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/audio.h
  *
- * (c) 2004-2005 Simtec Electronics
+ * Copyright (c) 2004-2005 Simtec Electronics
  *      http://www.simtec.co.uk/products/SWLINUX/
  *      Ben Dooks <ben@simtec.co.uk>
  *
diff --git a/include/asm-arm/arch-s3c2410/bast-cpld.h b/include/asm-arm/arch-s3c2410/bast-cpld.h
index 8969cffe83fa..034d2c5a47c4 100644
--- a/include/asm-arm/arch-s3c2410/bast-cpld.h
+++ b/include/asm-arm/arch-s3c2410/bast-cpld.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/bast-cpld.h
  *
- * (c) 2003,2004 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003,2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * BAST - CPLD control constants
  *
diff --git a/include/asm-arm/arch-s3c2410/bast-irq.h b/include/asm-arm/arch-s3c2410/bast-irq.h
index 15ffa66f5011..726c0466f85a 100644
--- a/include/asm-arm/arch-s3c2410/bast-irq.h
+++ b/include/asm-arm/arch-s3c2410/bast-irq.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/bast-irq.h
  *
- * (c) 2003,2004 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003,2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * Machine BAST - IRQ Number definitions
  *
diff --git a/include/asm-arm/arch-s3c2410/bast-map.h b/include/asm-arm/arch-s3c2410/bast-map.h
index 727cef84c70e..86ac1c108db8 100644
--- a/include/asm-arm/arch-s3c2410/bast-map.h
+++ b/include/asm-arm/arch-s3c2410/bast-map.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/bast-map.h
  *
- * (c) 2003,2004 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003,2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * Machine BAST - Memory map definitions
  *
diff --git a/include/asm-arm/arch-s3c2410/bast-pmu.h b/include/asm-arm/arch-s3c2410/bast-pmu.h
index 82836027f00f..37a11fe54a78 100644
--- a/include/asm-arm/arch-s3c2410/bast-pmu.h
+++ b/include/asm-arm/arch-s3c2410/bast-pmu.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/bast-pmu.h
  *
- * (c) 2003,2004 Simtec Electronics
+ * Copyright (c) 2003,2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *      Vincent Sanders <vince@simtec.co.uk>
  *
diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h
index 7ac224836971..58ffa7ba3c88 100644
--- a/include/asm-arm/arch-s3c2410/dma.h
+++ b/include/asm-arm/arch-s3c2410/dma.h
@@ -14,7 +14,7 @@
 #define __ASM_ARCH_DMA_H __FILE__
 
 #include <linux/sysdev.h>
-#include "hardware.h"
+#include <asm/hardware.h>
 
 /*
  * This is the maximum DMA address(physical address) that can be DMAd to.
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S
index e09a6b8ec153..1eb4e6b8d249 100644
--- a/include/asm-arm/arch-s3c2410/entry-macro.S
+++ b/include/asm-arm/arch-s3c2410/entry-macro.S
@@ -20,7 +20,7 @@
 #define INTOFFSET       (0x14)
 
 #include <asm/hardware.h>
-#include <asm/arch/irqs.h>
+#include <asm/irq.h>
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 
diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h
index 90894214cace..93a58e7862b0 100644
--- a/include/asm-arm/arch-s3c2410/fb.h
+++ b/include/asm-arm/arch-s3c2410/fb.h
@@ -31,6 +31,9 @@ struct s3c2410fb_hw {
 struct s3c2410fb_mach_info {
         unsigned char   fixed_syncs;    /* do not update sync/border */
 
+        /* LCD types */
+        int             type;
+
         /* Screen size */
         int             width;
         int             height;
diff --git a/include/asm-arm/arch-s3c2410/h1940-latch.h b/include/asm-arm/arch-s3c2410/h1940-latch.h
index c5802411f43d..c3de5ab102eb 100644
--- a/include/asm-arm/arch-s3c2410/h1940-latch.h
+++ b/include/asm-arm/arch-s3c2410/h1940-latch.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/h1940-latch.h
  *
- * (c) 2005 Simtec Electronics
+ * Copyright (c) 2005 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
@@ -16,7 +16,7 @@
 
 
 #ifndef __ASSEMBLY__
-#define H1940_LATCH             ((void __iomem *)0xF8000000)
+#define H1940_LATCH             ((void __force __iomem *)0xF8000000)
 #else
 #define H1940_LATCH             0xF8000000
 #endif
diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h
index 871f8af09b8b..6dadf58ff984 100644
--- a/include/asm-arm/arch-s3c2410/hardware.h
+++ b/include/asm-arm/arch-s3c2410/hardware.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/hardware.h
  *
- * (c) 2003 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - hardware
  *
@@ -13,6 +13,10 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
+#ifndef __ASM_HARDWARE_H
+#error "Do not include this directly, instead #include <asm/hardware.h>"
+#endif
+
 #ifndef __ASSEMBLY__
 
 /* external functions for GPIO support
diff --git a/include/asm-arm/arch-s3c2410/iic.h b/include/asm-arm/arch-s3c2410/iic.h
index ed3d6c7bf6d7..71211c8b5384 100644
--- a/include/asm-arm/arch-s3c2410/iic.h
+++ b/include/asm-arm/arch-s3c2410/iic.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/iic.h
  *
- * (c) 2004 Simtec Electronics
+ * Copyright (c) 2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - I2C Controller platfrom_device info
diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h
index 39a69829d163..4b7cff456c4e 100644
--- a/include/asm-arm/arch-s3c2410/irqs.h
+++ b/include/asm-arm/arch-s3c2410/irqs.h
@@ -12,6 +12,9 @@
 #ifndef __ASM_ARCH_IRQS_H
 #define __ASM_ARCH_IRQS_H __FILE__
 
+#ifndef __ASM_ARM_IRQ_H
+#error "Do not include this directly, instead #include <asm/irq.h>"
+#endif
 
 /* we keep the first set of CPU IRQs out of the range of
  * the ISA space, so that the PC104 has them to itself
diff --git a/include/asm-arm/arch-s3c2410/leds-gpio.h b/include/asm-arm/arch-s3c2410/leds-gpio.h
index f07ed040622b..800846ebddba 100644
--- a/include/asm-arm/arch-s3c2410/leds-gpio.h
+++ b/include/asm-arm/arch-s3c2410/leds-gpio.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/leds-gpio.h
  *
- * (c) 2006 Simtec Electronics
+ * Copyright (c) 2006 Simtec Electronics
  *      http://armlinux.simtec.co.uk/
  *      Ben Dooks <ben@simtec.co.uk>
  *
diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h
index 7895042d176b..4505aefbad17 100644
--- a/include/asm-arm/arch-s3c2410/map.h
+++ b/include/asm-arm/arch-s3c2410/map.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/map.h
  *
- * (c) 2003 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - Memory map definitions
  *
@@ -25,7 +25,7 @@
  */
 
 #ifndef __ASSEMBLY__
-#define S3C2410_ADDR(x)   ((void __iomem *)0xF0000000 + (x))
+#define S3C2410_ADDR(x)   ((void __iomem __force *)0xF0000000 + (x))
 #else
 #define S3C2410_ADDR(x)   (0xF0000000 + (x))
 #endif
@@ -47,73 +47,65 @@
 #define S3C24XX_SZ_MEMCTRL SZ_1M
 
 /* USB host controller */
-#define S3C24XX_VA_USBHOST S3C2410_ADDR(0x00200000)
 #define S3C2400_PA_USBHOST (0x14200000)
 #define S3C2410_PA_USBHOST (0x49000000)
 #define S3C24XX_SZ_USBHOST SZ_1M
 
 /* DMA controller */
-#define S3C24XX_VA_DMA     S3C2410_ADDR(0x00300000)
 #define S3C2400_PA_DMA     (0x14600000)
 #define S3C2410_PA_DMA     (0x4B000000)
 #define S3C24XX_SZ_DMA     SZ_1M
 
 /* Clock and Power management */
-#define S3C24XX_VA_CLKPWR  S3C2410_ADDR(0x00400000)
+#define S3C24XX_VA_CLKPWR  S3C2410_ADDR(0x00200000)
 #define S3C2400_PA_CLKPWR  (0x14800000)
 #define S3C2410_PA_CLKPWR  (0x4C000000)
 #define S3C24XX_SZ_CLKPWR  SZ_1M
 
 /* LCD controller */
-#define S3C24XX_VA_LCD     S3C2410_ADDR(0x00600000)
+#define S3C24XX_VA_LCD     S3C2410_ADDR(0x00300000)
 #define S3C2400_PA_LCD     (0x14A00000)
 #define S3C2410_PA_LCD     (0x4D000000)
 #define S3C24XX_SZ_LCD     SZ_1M
 
 /* NAND flash controller */
-#define S3C24XX_VA_NAND    S3C2410_ADDR(0x00700000)
 #define S3C2410_PA_NAND    (0x4E000000)
 #define S3C24XX_SZ_NAND    SZ_1M
 
 /* MMC controller - available on the S3C2400 */
-#define S3C2400_VA_MMC     S3C2400_ADDR(0x00700000)
 #define S3C2400_PA_MMC     (0x15A00000)
 #define S3C2400_SZ_MMC     SZ_1M
 
 /* UARTs */
-#define S3C24XX_VA_UART    S3C2410_ADDR(0x00800000)
+#define S3C24XX_VA_UART    S3C2410_ADDR(0x00400000)
 #define S3C2400_PA_UART    (0x15000000)
 #define S3C2410_PA_UART    (0x50000000)
 #define S3C24XX_SZ_UART    SZ_1M
 
 /* Timers */
-#define S3C24XX_VA_TIMER   S3C2410_ADDR(0x00900000)
+#define S3C24XX_VA_TIMER   S3C2410_ADDR(0x00500000)
 #define S3C2400_PA_TIMER   (0x15100000)
 #define S3C2410_PA_TIMER   (0x51000000)
 #define S3C24XX_SZ_TIMER   SZ_1M
 
 /* USB Device port */
-#define S3C24XX_VA_USBDEV  S3C2410_ADDR(0x00A00000)
+#define S3C24XX_VA_USBDEV  S3C2410_ADDR(0x00600000)
 #define S3C2400_PA_USBDEV  (0x15200140)
 #define S3C2410_PA_USBDEV  (0x52000000)
 #define S3C24XX_SZ_USBDEV  SZ_1M
 
 /* Watchdog */
-#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00B00000)
+#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00700000)
 #define S3C2400_PA_WATCHDOG (0x15300000)
 #define S3C2410_PA_WATCHDOG (0x53000000)
 #define S3C24XX_SZ_WATCHDOG SZ_1M
 
 /* IIC hardware controller */
-#define S3C24XX_VA_IIC     S3C2410_ADDR(0x00C00000)
 #define S3C2400_PA_IIC     (0x15400000)
 #define S3C2410_PA_IIC     (0x54000000)
 #define S3C24XX_SZ_IIC     SZ_1M
 
-#define VA_IIC_BASE        (S3C24XX_VA_IIC)
-
 /* IIS controller */
-#define S3C24XX_VA_IIS     S3C2410_ADDR(0x00D00000)
 #define S3C2400_PA_IIS     (0x15508000)
 #define S3C2410_PA_IIS     (0x55000000)
 #define S3C24XX_SZ_IIS     SZ_1M
@@ -134,25 +126,21 @@
 #define S3C24XX_SZ_GPIO    SZ_1M
 
 /* RTC */
-#define S3C24XX_VA_RTC     S3C2410_ADDR(0x00F00000)
 #define S3C2400_PA_RTC     (0x15700040)
 #define S3C2410_PA_RTC     (0x57000000)
 #define S3C24XX_SZ_RTC     SZ_1M
 
 /* ADC */
-#define S3C24XX_VA_ADC     S3C2410_ADDR(0x01000000)
 #define S3C2400_PA_ADC     (0x15800000)
 #define S3C2410_PA_ADC     (0x58000000)
 #define S3C24XX_SZ_ADC     SZ_1M
 
 /* SPI */
-#define S3C24XX_VA_SPI     S3C2410_ADDR(0x01100000)
 #define S3C2400_PA_SPI     (0x15900000)
 #define S3C2410_PA_SPI     (0x59000000)
 #define S3C24XX_SZ_SPI     SZ_1M
 
 /* SDI */
-#define S3C24XX_VA_SDI     S3C2410_ADDR(0x01200000)
 #define S3C2410_PA_SDI     (0x5A000000)
 #define S3C24XX_SZ_SDI     SZ_1M
 
diff --git a/include/asm-arm/arch-s3c2410/nand.h b/include/asm-arm/arch-s3c2410/nand.h
index e350ae2acfc6..8816f7f9cee1 100644
--- a/include/asm-arm/arch-s3c2410/nand.h
+++ b/include/asm-arm/arch-s3c2410/nand.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/nand.h
  *
- * (c) 2004 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - NAND device controller platfrom_device info
  *
diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h
index e9d1ae1f354f..3b6498468d62 100644
--- a/include/asm-arm/arch-s3c2410/osiris-cpld.h
+++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h
@@ -1,6 +1,6 @@
 /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
  *
- * (c) 2005 Simtec Electronics
+ * Copyright (c) 2005 Simtec Electronics
  *      http://www.simtec.co.uk/products/
  *      Ben Dooks <ben@simtec.co.uk>
  *
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index b2893e32a236..eae91694edcd 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -52,10 +52,10 @@
 /* general configuration options */
 
 #define S3C2410_GPIO_LEAVE   (0xFFFFFFFF)
-#define S3C2410_GPIO_INPUT   (0xFFFFFFF0)
+#define S3C2410_GPIO_INPUT   (0xFFFFFFF0)       /* not available on A */
 #define S3C2410_GPIO_OUTPUT  (0xFFFFFFF1)
 #define S3C2410_GPIO_IRQ     (0xFFFFFFF2)       /* not available for all */
-#define S3C2410_GPIO_SFN2    (0xFFFFFFF2)       /* not available on A */
+#define S3C2410_GPIO_SFN2    (0xFFFFFFF2)       /* bank A => addr/cs/nand */
 #define S3C2410_GPIO_SFN3    (0xFFFFFFF3)       /* not available on A */
 
 /* register address for the GPIO registers.
diff --git a/include/asm-arm/arch-s3c2410/regs-mem.h b/include/asm-arm/arch-s3c2410/regs-mem.h
index 375dca50364e..e4d82341f7ba 100644
--- a/include/asm-arm/arch-s3c2410/regs-mem.h
+++ b/include/asm-arm/arch-s3c2410/regs-mem.h
@@ -133,10 +133,10 @@
 #define S3C2410_BANKCON_SDRAM           (0x3 << 15)
 
 /* next bits only for EDO DRAM in 6,7 */
-#define S3C2400_BANKCON_EDO_Trdc1      (0x00 << 4)
-#define S3C2400_BANKCON_EDO_Trdc2      (0x01 << 4)
-#define S3C2400_BANKCON_EDO_Trdc3      (0x02 << 4)
-#define S3C2400_BANKCON_EDO_Trdc4      (0x03 << 4)
+#define S3C2400_BANKCON_EDO_Trcd1      (0x00 << 4)
+#define S3C2400_BANKCON_EDO_Trcd2      (0x01 << 4)
+#define S3C2400_BANKCON_EDO_Trcd3      (0x02 << 4)
+#define S3C2400_BANKCON_EDO_Trcd4      (0x03 << 4)
 
 /* CAS pulse width */
 #define S3C2400_BANKCON_EDO_PULSE1     (0x00 << 3)
@@ -153,9 +153,9 @@
 #define S3C2400_BANKCON_EDO_SCANb11    (0x03 << 0)
 
 /* next bits only for SDRAM in 6,7 */
-#define S3C2410_BANKCON_Trdc2           (0x00 << 2)
-#define S3C2410_BANKCON_Trdc3           (0x01 << 2)
-#define S3C2410_BANKCON_Trdc4           (0x02 << 2)
+#define S3C2410_BANKCON_Trcd2           (0x00 << 2)
+#define S3C2410_BANKCON_Trcd3           (0x01 << 2)
+#define S3C2410_BANKCON_Trcd4           (0x02 << 2)
 
 /* control column address select */
 #define S3C2410_BANKCON_SCANb8          (0x00 << 0)
diff --git a/include/asm-arm/arch-s3c2410/regs-serial.h b/include/asm-arm/arch-s3c2410/regs-serial.h
index 19c77da9c3fe..46f52401d132 100644
--- a/include/asm-arm/arch-s3c2410/regs-serial.h
+++ b/include/asm-arm/arch-s3c2410/regs-serial.h
@@ -197,7 +197,7 @@ struct s3c2410_uartcfg {
         unsigned char      hwport;       /* hardware port number */
         unsigned char      unused;
         unsigned short     flags;
-        unsigned long      uart_flags;   /* default uart flags */
+        upf_t              uart_flags;   /* default uart flags */
 
         unsigned long      ucon;         /* value of ucon for port */
         unsigned long      ulcon;        /* value of ulcon for port */
diff --git a/include/asm-arm/arch-s3c2410/regs-udc.h b/include/asm-arm/arch-s3c2410/regs-udc.h
index 487861d5b49a..3c8354619b60 100644
--- a/include/asm-arm/arch-s3c2410/regs-udc.h
+++ b/include/asm-arm/arch-s3c2410/regs-udc.h
@@ -11,8 +11,7 @@
 #ifndef __ASM_ARCH_REGS_UDC_H
 #define __ASM_ARCH_REGS_UDC_H
 
-
-#define S3C2410_USBDREG(x) ((x) + S3C24XX_VA_USBDEV)
+#define S3C2410_USBDREG(x) (x)
 
 #define S3C2410_UDC_FUNC_ADDR_REG       S3C2410_USBDREG(0x0140)
 #define S3C2410_UDC_PWR_REG             S3C2410_USBDREG(0x0144)
@@ -136,8 +135,8 @@
 #define S3C2410_UDC_OCSR2_ISO           (1<<6) // R/W
 #define S3C2410_UDC_OCSR2_DMAIEN        (1<<5) // R/W
 
-#define S3C2410_UDC_SETIX(x)        \
-        __raw_writel(S3C2410_UDC_INDEX_ ## x, S3C2410_UDC_INDEX_REG);
+#define S3C2410_UDC_SETIX(base,x)           \
+        writel(S3C2410_UDC_INDEX_ ## x, base+S3C2410_UDC_INDEX_REG);
 
 
 #define S3C2410_UDC_EP0_CSR_OPKRDY      (1<<0)
diff --git a/include/asm-arm/arch-s3c2410/system.h b/include/asm-arm/arch-s3c2410/system.h
index 4f72a853a5cf..ecf250db45fb 100644
--- a/include/asm-arm/arch-s3c2410/system.h
+++ b/include/asm-arm/arch-s3c2410/system.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/system.h
  *
- * (c) 2003 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - System function defines and includes
  *
diff --git a/include/asm-arm/arch-s3c2410/timex.h b/include/asm-arm/arch-s3c2410/timex.h
index 703c337c5617..c16a99c5a59a 100644
--- a/include/asm-arm/arch-s3c2410/timex.h
+++ b/include/asm-arm/arch-s3c2410/timex.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/timex.h
  *
- * (c) 2003-2005 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - time parameters
  *
diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h
index 81b3e91c56ab..dcb2cef38f50 100644
--- a/include/asm-arm/arch-s3c2410/uncompress.h
+++ b/include/asm-arm/arch-s3c2410/uncompress.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/uncompress.h
  *
- * (c) 2003 Simtec Electronics
- *    Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - uncompress code
  *
@@ -13,6 +13,7 @@
 #ifndef __ASM_ARCH_UNCOMPRESS_H
 #define __ASM_ARCH_UNCOMPRESS_H
 
+typedef unsigned int upf_t;     /* cannot include linux/serial_core.h */
 
 /* defines for UART registers */
 #include "asm/arch/regs-serial.h"
diff --git a/include/asm-arm/arch-s3c2410/usb-control.h b/include/asm-arm/arch-s3c2410/usb-control.h
index 35723569a17a..5bfa376e33dc 100644
--- a/include/asm-arm/arch-s3c2410/usb-control.h
+++ b/include/asm-arm/arch-s3c2410/usb-control.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/usb-control.h
  *
- * (c) 2004 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * S3C2410 - usb port information
  *
diff --git a/include/asm-arm/arch-s3c2410/vr1000-cpld.h b/include/asm-arm/arch-s3c2410/vr1000-cpld.h
index a341b1e1bd98..0557b0a5ab1d 100644
--- a/include/asm-arm/arch-s3c2410/vr1000-cpld.h
+++ b/include/asm-arm/arch-s3c2410/vr1000-cpld.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/vr1000-cpld.h
  *
- * (c) 2003 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * VR1000 - CPLD control constants
  *
diff --git a/include/asm-arm/arch-s3c2410/vr1000-irq.h b/include/asm-arm/arch-s3c2410/vr1000-irq.h
index c39a0ffa670d..890937083c61 100644
--- a/include/asm-arm/arch-s3c2410/vr1000-irq.h
+++ b/include/asm-arm/arch-s3c2410/vr1000-irq.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/vr1000-irq.h
  *
- * (c) 2003,2004 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003,2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * Machine VR1000 - IRQ Number definitions
  *
diff --git a/include/asm-arm/arch-s3c2410/vr1000-map.h b/include/asm-arm/arch-s3c2410/vr1000-map.h
index 1fe4db36c834..92a56a724a8c 100644
--- a/include/asm-arm/arch-s3c2410/vr1000-map.h
+++ b/include/asm-arm/arch-s3c2410/vr1000-map.h
@@ -1,7 +1,7 @@
 /* linux/include/asm-arm/arch-s3c2410/vr1000-map.h
  *
- * (c) 2003-2005 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
  *
  * Machine VR1000 - Memory map definitions
  *
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index f0845646aacb..5f531ea03059 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -319,6 +319,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
                                 unsigned long len, int write);
 #endif
 
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
+
 /*
  * flush_cache_user_range is used when we want to ensure that the
  * Harvard caches are synchronised for the user space address range.
@@ -353,6 +355,18 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
  */
 extern void flush_dcache_page(struct page *);
 
+extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
+
+#define ARCH_HAS_FLUSH_ANON_PAGE
+static inline void flush_anon_page(struct vm_area_struct *vma,
+                         struct page *page, unsigned long vmaddr)
+{
+        extern void __flush_anon_page(struct vm_area_struct *vma,
+                                struct page *, unsigned long);
+        if (PageAnon(page))
+                __flush_anon_page(vma, page, vmaddr);
+}
+
 #define flush_dcache_mmap_lock(mapping) \
         write_lock_irq(&(mapping)->tree_lock)
 #define flush_dcache_mmap_unlock(mapping) \
diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h
index 4679f63688e9..715e18a4add1 100644
--- a/include/asm-arm/cpu-multi32.h
+++ b/include/asm-arm/cpu-multi32.h
@@ -50,9 +50,10 @@ extern struct processor {
          */
         void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm);
         /*
-         * Set a PTE
+         * Set a possibly extended PTE.  Non-extended PTEs should
+         * ignore 'ext'.
          */
-        void (*set_pte)(pte_t *ptep, pte_t pte);
+        void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
 } processor;
 
 #define cpu_proc_init()                 processor._proc_init()
@@ -60,5 +61,5 @@ extern struct processor {
 #define cpu_reset(addr)                 processor.reset(addr)
 #define cpu_do_idle()                   processor._do_idle()
 #define cpu_dcache_clean_area(addr,sz)  processor.dcache_clean_area(addr,sz)
-#define cpu_set_pte(ptep, pte)          processor.set_pte(ptep, pte)
+#define cpu_set_pte_ext(ptep,pte,ext)   processor.set_pte_ext(ptep,pte,ext)
 #define cpu_do_switch_mm(pgd,mm)        processor.switch_mm(pgd,mm)
diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h
index 6723e67244fa..0b120ee36091 100644
--- a/include/asm-arm/cpu-single.h
+++ b/include/asm-arm/cpu-single.h
@@ -28,7 +28,7 @@
 #define cpu_do_idle                     __cpu_fn(CPU_NAME,_do_idle)
 #define cpu_dcache_clean_area           __cpu_fn(CPU_NAME,_dcache_clean_area)
 #define cpu_do_switch_mm                __cpu_fn(CPU_NAME,_switch_mm)
-#define cpu_set_pte                     __cpu_fn(CPU_NAME,_set_pte)
+#define cpu_set_pte_ext                 __cpu_fn(CPU_NAME,_set_pte_ext)
 
 #include <asm/page.h>
 
@@ -40,5 +40,5 @@ extern void cpu_proc_fin(void);
 extern int cpu_do_idle(void);
 extern void cpu_dcache_clean_area(void *, int);
 extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
-extern void cpu_set_pte(pte_t *ptep, pte_t pte);
+extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
 extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h
index 642382d2c9f0..3679a8a8922e 100644
--- a/include/asm-arm/elf.h
+++ b/include/asm-arm/elf.h
@@ -52,6 +52,7 @@ typedef struct user_fp elf_fpregset_t;
 #define HWCAP_EDSP      128
 #define HWCAP_JAVA      256
 #define HWCAP_IWMMXT    512
+#define HWCAP_CRUNCH    1024
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h
index 966946478589..16f5375e57b8 100644
--- a/include/asm-arm/flat.h
+++ b/include/asm-arm/flat.h
@@ -5,7 +5,9 @@
 #ifndef __ARM_FLAT_H__
 #define __ARM_FLAT_H__
 
-#define flat_stack_align(sp)                    /* nothing needed */
+/* An odd number of words will be pushed after this alignment, so
+   deliberately misalign the value.  */
+#define flat_stack_align(sp)    sp = (void *)(((unsigned long)(sp) - 4) | 4)
 #define flat_argvp_envp_on_stack()              1
 #define flat_old_ram_flag(flags)                (flags)
 #define flat_reloc_valid(reloc, size)           ((reloc) <= (size))
diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h
index 6af4e6bd1290..f31cda5a55ee 100644
--- a/include/asm-arm/fpstate.h
+++ b/include/asm-arm/fpstate.h
@@ -35,6 +35,9 @@ struct vfp_hard_struct {
          */
         __u32 fpinst;
         __u32 fpinst2;
+#ifdef CONFIG_SMP
+        __u32 cpu;
+#endif
 };
 
 union vfp_state {
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
index 1018a7486ab7..13ac8a4cd01f 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -168,9 +168,9 @@ extern void gpio_line_set(int line, int value);
 #define IOP3XX_PERCR0           (volatile u32 *)IOP3XX_REG_ADDR(0x0710)
 
 /* General Purpose I/O  */
-#define IOP3XX_GPOE             (volatile u32 *)IOP3XX_GPIO_REG(0x0004)
-#define IOP3XX_GPID             (volatile u32 *)IOP3XX_GPIO_REG(0x0008)
-#define IOP3XX_GPOD             (volatile u32 *)IOP3XX_GPIO_REG(0x000c)
+#define IOP3XX_GPOE             (volatile u32 *)IOP3XX_GPIO_REG(0x0000)
+#define IOP3XX_GPID             (volatile u32 *)IOP3XX_GPIO_REG(0x0004)
+#define IOP3XX_GPOD             (volatile u32 *)IOP3XX_GPIO_REG(0x0008)
 
 /* Timers  */
 #define IOP3XX_TU_TMR0          (volatile u32 *)IOP3XX_TIMER_REG(0x0000)
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 288f76b166d0..5f60b4220906 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -182,9 +182,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 #define memcpy_fromio(a,c,l)    _memcpy_fromio((a),__mem_pci(c),(l))
 #define memcpy_toio(c,a,l)      _memcpy_toio(__mem_pci(c),(a),(l))
 
-#define eth_io_copy_and_sum(s,c,l,b) \
-                                eth_copy_and_sum((s),__mem_pci(c),(l),(b))
-
 #elif !defined(readb)
 
 #define readb(c)                        (__readwrite_bug("readb"),0)
@@ -194,8 +191,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 #define writew(v,c)                     __readwrite_bug("writew")
 #define writel(v,c)                     __readwrite_bug("writel")
 
-#define eth_io_copy_and_sum(s,c,l,b)    __readwrite_bug("eth_io_copy_and_sum")
-
 #define check_signature(io,sig,len)     (0)
 
 #endif  /* __mem_pci */
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index 283af50a16cb..1b882a255e35 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -19,7 +19,6 @@
 #define NO_IRQ  ((unsigned int)(-1))
 #endif
 
-struct irqaction;
 
 /*
  * Migration helpers
@@ -37,6 +36,10 @@ struct irqaction;
 #define IRQT_HIGH       (__IRQT_HIGHLVL)
 #define IRQT_PROBE      IRQ_TYPE_PROBE
 
+#ifndef __ASSEMBLY__
+struct irqaction;
 extern void migrate_irqs(void);
 #endif
 
+#endif
+
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index 88cd5c784ef0..b8cf2d5ec304 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -21,6 +21,7 @@
 
 #include <asm/memory.h>
 #include <asm/arch/vmalloc.h>
+#include <asm/pgtable-hwdef.h>
 
 /*
  * Just any arbitrary offset to the start of the vmalloc VM area: the
@@ -170,7 +171,6 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
 #define L_PTE_EXEC              (1 << 6)
 #define L_PTE_DIRTY             (1 << 7)
 #define L_PTE_SHARED            (1 << 10)       /* shared(v6), coherent(xsc3) */
-#define L_PTE_ASID              (1 << 11)       /* non-global (use ASID, v6) */
 
 #ifndef __ASSEMBLY__
 
@@ -228,7 +228,7 @@ extern struct page *empty_zero_page;
 #define pfn_pte(pfn,prot)       (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)))
 
 #define pte_none(pte)           (!pte_val(pte))
-#define pte_clear(mm,addr,ptep) set_pte_at((mm),(addr),(ptep), __pte(0))
+#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
 #define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
 #define pte_offset_kernel(dir,addr)     (pmd_page_vaddr(*(dir)) + __pte_index(addr))
 #define pte_offset_map(dir,addr)        (pmd_page_vaddr(*(dir)) + __pte_index(addr))
@@ -236,8 +236,11 @@ extern struct page *empty_zero_page;
 #define pte_unmap(pte)          do { } while (0)
 #define pte_unmap_nested(pte)   do { } while (0)
 
-#define set_pte(ptep, pte)      cpu_set_pte(ptep,pte)
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
+#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
+
+#define set_pte_at(mm,addr,ptep,pteval) do { \
+        set_pte_ext(ptep, pteval, (addr) >= PAGE_OFFSET ? 0 : PTE_EXT_NG); \
+ } while (0)
 
 /*
  * The following only work if pte_present() is true.
diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h
index b442e8e2a809..1bbf16182d62 100644
--- a/include/asm-arm/processor.h
+++ b/include/asm-arm/processor.h
@@ -103,14 +103,14 @@ extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
 #if __LINUX_ARM_ARCH__ >= 5
 
 #define ARCH_HAS_PREFETCH
-#define prefetch(ptr)                           \
-        ({                                      \
-                __asm__ __volatile__(           \
-                "pld\t%0"                       \
-                :                               \
-                : "o" (*(char *)(ptr))          \
-                : "cc");                        \
-        })
+static inline void prefetch(const void *ptr)
+{
+        __asm__ __volatile__(
+                "pld\t%0"
+                :
+                : "o" (*(char *)ptr)
+                : "cc");
+}
 
 #define ARCH_HAS_PREFETCHW
 #define prefetchw(ptr)  prefetch(ptr)
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index f05fbe31576c..aa223fc546af 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -73,6 +73,7 @@
 #ifndef __ASSEMBLY__
 
 #include <linux/linkage.h>
+#include <linux/irqflags.h>
 
 struct thread_info;
 struct task_struct;
@@ -139,23 +140,44 @@ static inline int cpu_is_xsc3(void)
 #define cpu_is_xscale() 1
 #endif
 
-#define set_cr(x)                                       \
-        __asm__ __volatile__(                           \
-        "mcr    p15, 0, %0, c1, c0, 0   @ set CR"       \
-        : : "r" (x) : "cc")
-
-#define get_cr()                                        \
-        ({                                              \
-        unsigned int __val;                             \
-        __asm__ __volatile__(                           \
-        "mrc    p15, 0, %0, c1, c0, 0   @ get CR"       \
-        : "=r" (__val) : : "cc");                       \
-        __val;                                          \
-        })
-
 extern unsigned long cr_no_alignment;   /* defined in entry-armv.S */
 extern unsigned long cr_alignment;      /* defined in entry-armv.S */
 
+static inline unsigned int get_cr(void)
+{
+        unsigned int val;
+        asm("mrc p15, 0, %0, c1, c0, 0  @ get CR" : "=r" (val) : : "cc");
+        return val;
+}
+
+static inline void set_cr(unsigned int val)
+{
+        asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
+          : : "r" (val) : "cc");
+}
+
+#ifndef CONFIG_SMP
+extern void adjust_cr(unsigned long mask, unsigned long set);
+#endif
+
+#define CPACC_FULL(n)           (3 << (n * 2))
+#define CPACC_SVC(n)            (1 << (n * 2))
+#define CPACC_DISABLE(n)        (0 << (n * 2))
+
+static inline unsigned int get_copro_access(void)
+{
+        unsigned int val;
+        asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
+          : "=r" (val) : : "cc");
+        return val;
+}
+
+static inline void set_copro_access(unsigned int val)
+{
+        asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
+          : : "r" (val) : "cc");
+}
+
 #define UDBG_UNDEFINED  (1 << 0)
 #define UDBG_SYSCALL    (1 << 1)
 #define UDBG_BADABORT   (1 << 2)
@@ -211,8 +233,6 @@ static inline void sched_cacheflush(void)
 {
 }
 
-#include <linux/irqflags.h>
-
 #ifdef CONFIG_SMP
 
 #define smp_mb()                mb()
diff --git a/include/asm-arm/termbits.h b/include/asm-arm/termbits.h
index bbc6e1d24d3f..a3f4fe1742d0 100644
--- a/include/asm-arm/termbits.h
+++ b/include/asm-arm/termbits.h
@@ -15,6 +15,18 @@ struct termios {
         cc_t c_cc[NCCS];                /* control characters */
 };
 
+struct ktermios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+        speed_t c_ispeed;               /* input speed */
+        speed_t c_ospeed;               /* output speed */
+};
+
+
 /* c_cc characters */
 #define VINTR 0
 #define VQUIT 1
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
index d9b8bddc8732..5014794f9eb3 100644
--- a/include/asm-arm/thread_info.h
+++ b/include/asm-arm/thread_info.h
@@ -147,6 +147,7 @@ extern void iwmmxt_task_switch(struct thread_info *);
 #define TIF_POLLING_NRFLAG      16
 #define TIF_USING_IWMMXT        17
 #define TIF_MEMDIE              18
+#define TIF_FREEZE              19
 
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
@@ -154,6 +155,7 @@ extern void iwmmxt_task_switch(struct thread_info *);
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_USING_IWMMXT       (1 << TIF_USING_IWMMXT)
+#define _TIF_FREEZE             (1 << TIF_FREEZE)
 
 /*
  * Change these and you break ASM code in entry-common.S
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index d44c629d8424..97e7060000cf 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -347,6 +347,31 @@
 #define __NR_mbind                      (__NR_SYSCALL_BASE+319)
 #define __NR_get_mempolicy              (__NR_SYSCALL_BASE+320)
 #define __NR_set_mempolicy              (__NR_SYSCALL_BASE+321)
+#define __NR_openat                     (__NR_SYSCALL_BASE+322)
+#define __NR_mkdirat                    (__NR_SYSCALL_BASE+323)
+#define __NR_mknodat                    (__NR_SYSCALL_BASE+324)
+#define __NR_fchownat                   (__NR_SYSCALL_BASE+325)
+#define __NR_futimesat                  (__NR_SYSCALL_BASE+326)
+#define __NR_fstatat64                  (__NR_SYSCALL_BASE+327)
+#define __NR_unlinkat                   (__NR_SYSCALL_BASE+328)
+#define __NR_renameat                   (__NR_SYSCALL_BASE+329)
+#define __NR_linkat                     (__NR_SYSCALL_BASE+330)
+#define __NR_symlinkat                  (__NR_SYSCALL_BASE+331)
+#define __NR_readlinkat                 (__NR_SYSCALL_BASE+332)
+#define __NR_fchmodat                   (__NR_SYSCALL_BASE+333)
+#define __NR_faccessat                  (__NR_SYSCALL_BASE+334)
+                                        /* 335 for pselect6 */
+                                        /* 336 for ppoll */
+#define __NR_unshare                    (__NR_SYSCALL_BASE+337)
+#define __NR_set_robust_list            (__NR_SYSCALL_BASE+338)
+#define __NR_get_robust_list            (__NR_SYSCALL_BASE+339)
+#define __NR_splice                     (__NR_SYSCALL_BASE+340)
+#define __NR_arm_sync_file_range        (__NR_SYSCALL_BASE+341)
+#define __NR_tee                        (__NR_SYSCALL_BASE+342)
+#define __NR_vmsplice                   (__NR_SYSCALL_BASE+343)
+#define __NR_move_pages                 (__NR_SYSCALL_BASE+344)
+#define __NR_getcpu                     (__NR_SYSCALL_BASE+345)
+                                        /* 346 for epoll_pwait */
 
 /*
  * The following SWIs are ARM private.