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authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-18 18:24:10 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 05:25:49 -0400
commit7412b10f7967ef4210ed6f793004d23642dc5140 (patch)
treef82586f106e50c16b84878cee8e9265dfd9db5e5 /include/asm-arm/arch-iop33x/entry-macro.S
parentd7d214e974b94e8332d1f6c16f6f19b661dfa855 (diff)
[ARM] 3829/1: iop3xx: optimise irq entry macros
Squeeze three instructions out of the iop32x irq demuxer, and nine out of the iop33x irq demuxer by using the hardware vector generator. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop33x/entry-macro.S')
-rw-r--r--include/asm-arm/arch-iop33x/entry-macro.S22
1 files changed, 5 insertions, 17 deletions
diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S
index 425aa7aafa0e..4750e98e9b4a 100644
--- a/include/asm-arm/arch-iop33x/entry-macro.S
+++ b/include/asm-arm/arch-iop33x/entry-macro.S
@@ -12,23 +12,11 @@
12 .macro disable_fiq 12 .macro disable_fiq
13 .endm 13 .endm
14 14
15 /*
16 * Note: only deal with normal interrupts, not FIQ
17 */
18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
19 mov \irqnr, #0 16 ldr \base, =IOP3XX_REG_ADDR(0x07C8)
20 ldr \base, =IOP3XX_REG_ADDR(0x7A0) 17 ldr \irqstat, [\base] @ Read IINTVEC
21 ldr \irqstat, [\base] @ Read IINTSRC0
22 cmp \irqstat, #0
23 bne 1002f
24 ldr \irqstat, [\base, #4] @ Read IINTSRC1
25 cmp \irqstat, #0 18 cmp \irqstat, #0
26 beq 1001f 19 ldreq \irqstat, [\base] @ erratum 63 workaround
27 clz \irqnr, \irqstat 20 adds \irqnr, \irqstat, #1
28 rsbs \irqnr,\irqnr,#31 @ recommend by RMK 21 movne \irqnr, \irqstat, lsr #2
29 add \irqnr,\irqnr,#IRQ_IOP331_XINT8
30 b 1001f
311002: clz \irqnr, \irqstat
32 rsbs \irqnr,\irqnr,#31 @ recommend by RMK
331001:
34 .endm 22 .endm