[ARM] 3829/1: iop3xx: optimise irq entry macros

Squeeze three instructions out of the iop32x irq demuxer, and nine
out of the iop33x irq demuxer by using the hardware vector generator.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 5 insertions, 17 deletions

diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S
index 425aa7aafa0e..4750e98e9b4a 100644
--- a/include/asm-arm/arch-iop33x/entry-macro.S
+++ b/include/asm-arm/arch-iop33x/entry-macro.S
@@ -12,23 +12,11 @@
                 .macro  disable_fiq
                 .endm
 
-                /*
-                 * Note: only deal with normal interrupts, not FIQ
-                 */
                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                mov     \irqnr, #0
-                ldr     \base, =IOP3XX_REG_ADDR(0x7A0)
-                ldr     \irqstat, [\base]               @ Read IINTSRC0
-                cmp     \irqstat, #0
-                bne     1002f
-                ldr     \irqstat, [\base, #4]           @ Read IINTSRC1
+                ldr     \base, =IOP3XX_REG_ADDR(0x07C8)
+                ldr     \irqstat, [\base]               @ Read IINTVEC
                 cmp     \irqstat, #0
-                beq     1001f
-                clz     \irqnr, \irqstat
-                rsbs    \irqnr,\irqnr,#31   @ recommend by RMK
-                add     \irqnr,\irqnr,#IRQ_IOP331_XINT8
-                b       1001f
-1002:           clz     \irqnr, \irqstat
-                rsbs    \irqnr,\irqnr,#31   @ recommend by RMK
-1001:
+                ldreq   \irqstat, [\base]               @ erratum 63 workaround
+                adds    \irqnr, \irqstat, #1
+                movne   \irqnr, \irqstat, lsr #2
                 .endm