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authorDaniel Wolstenholme <daniel.e.wolstenholme@intel.com>2007-05-11 01:33:02 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-11 12:41:52 -0400
commit2fd0237538480c8d704c385b6f9abc3f6c46b760 (patch)
tree4f4052fb01ec00d4717bc7741602e02aa9833ef6 /include/asm-arm/arch-iop13xx/irqs.h
parent87b247c41674e29f90bf4938799ab079951ccc6b (diff)
[ARM] iop13xx: msi support
Enable devices to signal interrupts via PCI memory cycles. rev6: * fix enable/disable typo, Michael Ellerman rev5: * fix up ack, enable, and disable for iop13xx_msi_chip rev4: * move smp compile fix to separate patch * use dynamic_irq_init in create_irq() * hookup mask/unmask routines in iop13xx_msi_chip rev3: * change msi.c to use linux/smp.h instead of asm/smp.h * call dynamic_irq_cleanup at destroy_irq time rev2: * destroy_irq did not take the full 128 bits of msi_irq_in_use into account * added missing '&' for calls to test_and_set_bit and clear_bit [ebiederm@xmission.com: review comments/suggestions] [dan.j.williams@intel.com: cleanups/forward port to 2.6-git] Signed-off-by: Daniel Wolstenholme <daniel.e.wolstenholme@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop13xx/irqs.h')
-rw-r--r--include/asm-arm/arch-iop13xx/irqs.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h
index 5c6fac2a4004..054e7acb5bfa 100644
--- a/include/asm-arm/arch-iop13xx/irqs.h
+++ b/include/asm-arm/arch-iop13xx/irqs.h
@@ -168,7 +168,7 @@ static inline u32 read_intpnd_3(void)
168#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */ 168#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */
169#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */ 169#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */
170#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */ 170#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */
171#define IRQ_IOP13XX_RSVD_113 (113) /* 17 */ 171#define IRQ_IOP13XX_INBD_MSI (113) /* 17 */
172#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */ 172#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */
173#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */ 173#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */
174#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */ 174#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */
@@ -184,7 +184,13 @@ static inline u32 read_intpnd_3(void)
184#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */ 184#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */
185#define IRQ_IOP13XX_HPI (127) /* 31 */ 185#define IRQ_IOP13XX_HPI (127) /* 31 */
186 186
187#ifdef CONFIG_PCI_MSI
188#define IRQ_IOP13XX_MSI_0 (IRQ_IOP13XX_HPI + 1)
189#define NR_IOP13XX_IRQS (IRQ_IOP13XX_MSI_0 + 128)
190#else
187#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1) 191#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1)
192#endif
193
188#define NR_IRQS NR_IOP13XX_IRQS 194#define NR_IRQS NR_IOP13XX_IRQS
189 195
190#endif /* _IOP13XX_IRQ_H_ */ 196#endif /* _IOP13XX_IRQ_H_ */