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authorDaniel Wolstenholme <daniel.e.wolstenholme@intel.com>2007-05-11 01:33:02 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-11 12:41:52 -0400
commit2fd0237538480c8d704c385b6f9abc3f6c46b760 (patch)
tree4f4052fb01ec00d4717bc7741602e02aa9833ef6 /include/asm-arm
parent87b247c41674e29f90bf4938799ab079951ccc6b (diff)
[ARM] iop13xx: msi support
Enable devices to signal interrupts via PCI memory cycles. rev6: * fix enable/disable typo, Michael Ellerman rev5: * fix up ack, enable, and disable for iop13xx_msi_chip rev4: * move smp compile fix to separate patch * use dynamic_irq_init in create_irq() * hookup mask/unmask routines in iop13xx_msi_chip rev3: * change msi.c to use linux/smp.h instead of asm/smp.h * call dynamic_irq_cleanup at destroy_irq time rev2: * destroy_irq did not take the full 128 bits of msi_irq_in_use into account * added missing '&' for calls to test_and_set_bit and clear_bit [ebiederm@xmission.com: review comments/suggestions] [dan.j.williams@intel.com: cleanups/forward port to 2.6-git] Signed-off-by: Daniel Wolstenholme <daniel.e.wolstenholme@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-iop13xx/iop13xx.h29
-rw-r--r--include/asm-arm/arch-iop13xx/irqs.h8
-rw-r--r--include/asm-arm/arch-iop13xx/msi.h11
3 files changed, 47 insertions, 1 deletions
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index 85707e9c3325..e6736c3d1f7f 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -181,6 +181,7 @@ static inline int iop13xx_cpu_id(void)
181#define IOP13XX_ADMA1_PMMR_OFFSET 0x00000200 181#define IOP13XX_ADMA1_PMMR_OFFSET 0x00000200
182#define IOP13XX_ADMA2_PMMR_OFFSET 0x00000400 182#define IOP13XX_ADMA2_PMMR_OFFSET 0x00000400
183#define IOP13XX_PBI_PMMR_OFFSET 0x00001580 183#define IOP13XX_PBI_PMMR_OFFSET 0x00001580
184#define IOP13XX_MU_PMMR_OFFSET 0x00004000
184#define IOP13XX_ESSR0_PMMR_OFFSET 0x00002188 185#define IOP13XX_ESSR0_PMMR_OFFSET 0x00002188
185#define IOP13XX_ESSR0 IOP13XX_REG_ADDR32(0x00002188) 186#define IOP13XX_ESSR0 IOP13XX_REG_ADDR32(0x00002188)
186 187
@@ -412,6 +413,34 @@ static inline int iop13xx_cpu_id(void)
412#define IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK (0x7) 413#define IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK (0x7)
413/*=======================================================================*/ 414/*=======================================================================*/
414 415
416/*============================MESSAGING UNIT=============================*/
417#define IOP13XX_MU_OFFSET(ofs) IOP13XX_REG_ADDR32(IOP13XX_MU_PMMR_OFFSET +\
418 (ofs))
419
420#define IOP13XX_MU_IMR0 IOP13XX_MU_OFFSET(0x10)
421#define IOP13XX_MU_IMR1 IOP13XX_MU_OFFSET(0x14)
422#define IOP13XX_MU_OMR0 IOP13XX_MU_OFFSET(0x18)
423#define IOP13XX_MU_OMR1 IOP13XX_MU_OFFSET(0x1C)
424#define IOP13XX_MU_IDR IOP13XX_MU_OFFSET(0x20)
425#define IOP13XX_MU_IISR IOP13XX_MU_OFFSET(0x24)
426#define IOP13XX_MU_IIMR IOP13XX_MU_OFFSET(0x28)
427#define IOP13XX_MU_ODR IOP13XX_MU_OFFSET(0x2C)
428#define IOP13XX_MU_OISR IOP13XX_MU_OFFSET(0x30)
429#define IOP13XX_MU_OIMR IOP13XX_MU_OFFSET(0x34)
430#define IOP13XX_MU_IRCSR IOP13XX_MU_OFFSET(0x38)
431#define IOP13XX_MU_ORCSR IOP13XX_MU_OFFSET(0x3C)
432#define IOP13XX_MU_MIMR IOP13XX_MU_OFFSET(0x48)
433#define IOP13XX_MU_MUCR IOP13XX_MU_OFFSET(0x50)
434#define IOP13XX_MU_QBAR IOP13XX_MU_OFFSET(0x54)
435#define IOP13XX_MU_MUBAR IOP13XX_MU_OFFSET(0x84)
436
437#define IOP13XX_MU_WINDOW_SIZE (8 * 1024)
438#define IOP13XX_MU_BASE_PHYS (0xff000000)
439#define IOP13XX_MU_BASE_PCI (0xff000000)
440#define IOP13XX_MU_MIMR_PCI (IOP13XX_MU_BASE_PCI + 0x48)
441#define IOP13XX_MU_MIMR_CORE_SELECT (15)
442/*=======================================================================*/
443
415/*==============================ADMA UNITS===============================*/ 444/*==============================ADMA UNITS===============================*/
416#define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9)) 445#define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9))
417#define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0) 446#define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0)
diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h
index 5c6fac2a4004..054e7acb5bfa 100644
--- a/include/asm-arm/arch-iop13xx/irqs.h
+++ b/include/asm-arm/arch-iop13xx/irqs.h
@@ -168,7 +168,7 @@ static inline u32 read_intpnd_3(void)
168#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */ 168#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */
169#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */ 169#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */
170#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */ 170#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */
171#define IRQ_IOP13XX_RSVD_113 (113) /* 17 */ 171#define IRQ_IOP13XX_INBD_MSI (113) /* 17 */
172#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */ 172#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */
173#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */ 173#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */
174#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */ 174#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */
@@ -184,7 +184,13 @@ static inline u32 read_intpnd_3(void)
184#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */ 184#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */
185#define IRQ_IOP13XX_HPI (127) /* 31 */ 185#define IRQ_IOP13XX_HPI (127) /* 31 */
186 186
187#ifdef CONFIG_PCI_MSI
188#define IRQ_IOP13XX_MSI_0 (IRQ_IOP13XX_HPI + 1)
189#define NR_IOP13XX_IRQS (IRQ_IOP13XX_MSI_0 + 128)
190#else
187#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1) 191#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1)
192#endif
193
188#define NR_IRQS NR_IOP13XX_IRQS 194#define NR_IRQS NR_IOP13XX_IRQS
189 195
190#endif /* _IOP13XX_IRQ_H_ */ 196#endif /* _IOP13XX_IRQ_H_ */
diff --git a/include/asm-arm/arch-iop13xx/msi.h b/include/asm-arm/arch-iop13xx/msi.h
new file mode 100644
index 000000000000..b80c5ae17e99
--- /dev/null
+++ b/include/asm-arm/arch-iop13xx/msi.h
@@ -0,0 +1,11 @@
1#ifndef _IOP13XX_MSI_H_
2#define _IOP13XX_MSI_H_
3#ifdef CONFIG_PCI_MSI
4void iop13xx_msi_init(void);
5#else
6static inline void iop13xx_msi_init(void)
7{
8 return;
9}
10#endif
11#endif