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authorMichel Dänzer <daenzer@vmware.com>2010-04-02 12:59:06 -0400
committerDave Airlie <airlied@redhat.com>2010-04-05 19:56:40 -0400
commit57b54ea6b7863ccfeb41851b5f58f9fd1b83c79e (patch)
tree96897aad6541db089db80e3064501636351de4d2 /drivers
parentd668046c13024d74af7d04a124ba55f406380fe7 (diff)
drm/radeon: R300 AD only has one quad pipe.
Gleaned from the Mesa code. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=27355 . Signed-off-by: Michel Dänzer <daenzer@vmware.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/r300.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c10
2 files changed, 9 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 1023eeb65872..0e9eb761a90f 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -324,11 +324,12 @@ void r300_gpu_init(struct radeon_device *rdev)
324 324
325 r100_hdp_reset(rdev); 325 r100_hdp_reset(rdev);
326 /* FIXME: rv380 one pipes ? */ 326 /* FIXME: rv380 one pipes ? */
327 if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) { 327 if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) ||
328 (rdev->family == CHIP_R350)) {
328 /* r300,r350 */ 329 /* r300,r350 */
329 rdev->num_gb_pipes = 2; 330 rdev->num_gb_pipes = 2;
330 } else { 331 } else {
331 /* rv350,rv370,rv380 */ 332 /* rv350,rv370,rv380,r300 AD */
332 rdev->num_gb_pipes = 1; 333 rdev->num_gb_pipes = 1;
333 } 334 }
334 rdev->num_z_pipes = 1; 335 rdev->num_z_pipes = 1;
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index dc6eba6b96dd..419630dd2075 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -417,8 +417,9 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv)
417 return -EBUSY; 417 return -EBUSY;
418} 418}
419 419
420static void radeon_init_pipes(drm_radeon_private_t *dev_priv) 420static void radeon_init_pipes(struct drm_device *dev)
421{ 421{
422 drm_radeon_private_t *dev_priv = dev->dev_private;
422 uint32_t gb_tile_config, gb_pipe_sel = 0; 423 uint32_t gb_tile_config, gb_pipe_sel = 0;
423 424
424 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { 425 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) {
@@ -436,11 +437,12 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
436 dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; 437 dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
437 } else { 438 } else {
438 /* R3xx */ 439 /* R3xx */
439 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || 440 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 &&
441 dev->pdev->device != 0x4144) ||
440 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { 442 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) {
441 dev_priv->num_gb_pipes = 2; 443 dev_priv->num_gb_pipes = 2;
442 } else { 444 } else {
443 /* R3Vxx */ 445 /* RV3xx/R300 AD */
444 dev_priv->num_gb_pipes = 1; 446 dev_priv->num_gb_pipes = 1;
445 } 447 }
446 } 448 }
@@ -736,7 +738,7 @@ static int radeon_do_engine_reset(struct drm_device * dev)
736 738
737 /* setup the raster pipes */ 739 /* setup the raster pipes */
738 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) 740 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300)
739 radeon_init_pipes(dev_priv); 741 radeon_init_pipes(dev);
740 742
741 /* Reset the CP ring */ 743 /* Reset the CP ring */
742 radeon_do_cp_reset(dev_priv); 744 radeon_do_cp_reset(dev_priv);