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authorOlof Johansson <olof@lixom.net>2011-12-20 00:09:48 -0500
committerOlof Johansson <olof@lixom.net>2011-12-20 00:09:48 -0500
commit3b0d597139efddfd8960b44249b4a4c977d172f1 (patch)
tree51c16913c15b52f06f0f4b5b721226e8885e3663 /drivers
parentb86c7842ef176df0fef3d3d05f83900b3599223d (diff)
parent6b6fa98c3e6d29eb7b515d807139590a27e6b9b0 (diff)
Merge branch 'omap/uart' into next/pm
* omap/uart: (32 commits) ARM: omap: pass minimal SoC/board data for UART from dt arm/dts: Add minimal device tree support for omap2420 and omap2430 omap-serial: Add minimal device tree support omap-serial: Use default clock speed (48Mhz) if not specified omap-serial: Get rid of all pdev->id usage ARM: OMAP2+: UART: Fix compilation/sparse warnings ARM: OMAP2+: UART: Remove omap_uart_can_sleep and add pm_qos ARM: OMAP2+: UART: Do not gate uart clocks if used for debug_prints ARM: OMAP2+: UART: Avoid uart idling on suspend for no_console_suspend usecase ARM: OMAP2+: UART: Avoid console uart idling during bootup ARM: OMAP2+: UART: remove temporary variable used to count uart instance ARM: OMAP2+: UART: Make the RX_TIMEOUT for DMA configurable for each UART ARM: OMAP2+: UART: Allow UART parameters to be configured from board file. ARM: OMAP2+: UART: Remove old and unused clocks handling funcs ARM: OMAP2+: UART: Add wakeup mechanism for omap-uarts ARM: OMAP2+: UART: Move errata handling from serial.c to omap-serial ARM: OMAP2+: UART: Get context loss count to context restore ARM: OMAP2+: UART: Remove uart reset function. ARM: OMAP2+: UART: Ensure all reg values configured are available from port structure ARM: OMAP2+: UART: Remove context_save and move context restore to driver ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/tty/serial/omap-serial.c428
1 files changed, 367 insertions, 61 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 5e713d3ef1f4..ca24ab37d11c 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -37,17 +37,24 @@
37#include <linux/clk.h> 37#include <linux/clk.h>
38#include <linux/serial_core.h> 38#include <linux/serial_core.h>
39#include <linux/irq.h> 39#include <linux/irq.h>
40#include <linux/pm_runtime.h>
41#include <linux/of.h>
40 42
41#include <plat/dma.h> 43#include <plat/dma.h>
42#include <plat/dmtimer.h> 44#include <plat/dmtimer.h>
43#include <plat/omap-serial.h> 45#include <plat/omap-serial.h>
44 46
47#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
48
45static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 49static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
46 50
47/* Forward declaration of functions */ 51/* Forward declaration of functions */
48static void uart_tx_dma_callback(int lch, u16 ch_status, void *data); 52static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
49static void serial_omap_rx_timeout(unsigned long uart_no); 53static void serial_omap_rxdma_poll(unsigned long uart_no);
50static int serial_omap_start_rxdma(struct uart_omap_port *up); 54static int serial_omap_start_rxdma(struct uart_omap_port *up);
55static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
56
57static struct workqueue_struct *serial_omap_uart_wq;
51 58
52static inline unsigned int serial_in(struct uart_omap_port *up, int offset) 59static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
53{ 60{
@@ -102,6 +109,8 @@ static void serial_omap_stop_rxdma(struct uart_omap_port *up)
102 omap_free_dma(up->uart_dma.rx_dma_channel); 109 omap_free_dma(up->uart_dma.rx_dma_channel);
103 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE; 110 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
104 up->uart_dma.rx_dma_used = false; 111 up->uart_dma.rx_dma_used = false;
112 pm_runtime_mark_last_busy(&up->pdev->dev);
113 pm_runtime_put_autosuspend(&up->pdev->dev);
105 } 114 }
106} 115}
107 116
@@ -109,9 +118,12 @@ static void serial_omap_enable_ms(struct uart_port *port)
109{ 118{
110 struct uart_omap_port *up = (struct uart_omap_port *)port; 119 struct uart_omap_port *up = (struct uart_omap_port *)port;
111 120
112 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id); 121 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
122
123 pm_runtime_get_sync(&up->pdev->dev);
113 up->ier |= UART_IER_MSI; 124 up->ier |= UART_IER_MSI;
114 serial_out(up, UART_IER, up->ier); 125 serial_out(up, UART_IER, up->ier);
126 pm_runtime_put(&up->pdev->dev);
115} 127}
116 128
117static void serial_omap_stop_tx(struct uart_port *port) 129static void serial_omap_stop_tx(struct uart_port *port)
@@ -129,30 +141,40 @@ static void serial_omap_stop_tx(struct uart_port *port)
129 omap_stop_dma(up->uart_dma.tx_dma_channel); 141 omap_stop_dma(up->uart_dma.tx_dma_channel);
130 omap_free_dma(up->uart_dma.tx_dma_channel); 142 omap_free_dma(up->uart_dma.tx_dma_channel);
131 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE; 143 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
144 pm_runtime_mark_last_busy(&up->pdev->dev);
145 pm_runtime_put_autosuspend(&up->pdev->dev);
132 } 146 }
133 147
148 pm_runtime_get_sync(&up->pdev->dev);
134 if (up->ier & UART_IER_THRI) { 149 if (up->ier & UART_IER_THRI) {
135 up->ier &= ~UART_IER_THRI; 150 up->ier &= ~UART_IER_THRI;
136 serial_out(up, UART_IER, up->ier); 151 serial_out(up, UART_IER, up->ier);
137 } 152 }
153
154 pm_runtime_mark_last_busy(&up->pdev->dev);
155 pm_runtime_put_autosuspend(&up->pdev->dev);
138} 156}
139 157
140static void serial_omap_stop_rx(struct uart_port *port) 158static void serial_omap_stop_rx(struct uart_port *port)
141{ 159{
142 struct uart_omap_port *up = (struct uart_omap_port *)port; 160 struct uart_omap_port *up = (struct uart_omap_port *)port;
143 161
162 pm_runtime_get_sync(&up->pdev->dev);
144 if (up->use_dma) 163 if (up->use_dma)
145 serial_omap_stop_rxdma(up); 164 serial_omap_stop_rxdma(up);
146 up->ier &= ~UART_IER_RLSI; 165 up->ier &= ~UART_IER_RLSI;
147 up->port.read_status_mask &= ~UART_LSR_DR; 166 up->port.read_status_mask &= ~UART_LSR_DR;
148 serial_out(up, UART_IER, up->ier); 167 serial_out(up, UART_IER, up->ier);
168 pm_runtime_mark_last_busy(&up->pdev->dev);
169 pm_runtime_put_autosuspend(&up->pdev->dev);
149} 170}
150 171
151static inline void receive_chars(struct uart_omap_port *up, int *status) 172static inline void receive_chars(struct uart_omap_port *up,
173 unsigned int *status)
152{ 174{
153 struct tty_struct *tty = up->port.state->port.tty; 175 struct tty_struct *tty = up->port.state->port.tty;
154 unsigned int flag; 176 unsigned int flag, lsr = *status;
155 unsigned char ch, lsr = *status; 177 unsigned char ch = 0;
156 int max_count = 256; 178 int max_count = 256;
157 179
158 do { 180 do {
@@ -262,7 +284,10 @@ static void serial_omap_start_tx(struct uart_port *port)
262 int ret = 0; 284 int ret = 0;
263 285
264 if (!up->use_dma) { 286 if (!up->use_dma) {
287 pm_runtime_get_sync(&up->pdev->dev);
265 serial_omap_enable_ier_thri(up); 288 serial_omap_enable_ier_thri(up);
289 pm_runtime_mark_last_busy(&up->pdev->dev);
290 pm_runtime_put_autosuspend(&up->pdev->dev);
266 return; 291 return;
267 } 292 }
268 293
@@ -272,6 +297,7 @@ static void serial_omap_start_tx(struct uart_port *port)
272 xmit = &up->port.state->xmit; 297 xmit = &up->port.state->xmit;
273 298
274 if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) { 299 if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
300 pm_runtime_get_sync(&up->pdev->dev);
275 ret = omap_request_dma(up->uart_dma.uart_dma_tx, 301 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
276 "UART Tx DMA", 302 "UART Tx DMA",
277 (void *)uart_tx_dma_callback, up, 303 (void *)uart_tx_dma_callback, up,
@@ -354,9 +380,13 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
354 unsigned int iir, lsr; 380 unsigned int iir, lsr;
355 unsigned long flags; 381 unsigned long flags;
356 382
383 pm_runtime_get_sync(&up->pdev->dev);
357 iir = serial_in(up, UART_IIR); 384 iir = serial_in(up, UART_IIR);
358 if (iir & UART_IIR_NO_INT) 385 if (iir & UART_IIR_NO_INT) {
386 pm_runtime_mark_last_busy(&up->pdev->dev);
387 pm_runtime_put_autosuspend(&up->pdev->dev);
359 return IRQ_NONE; 388 return IRQ_NONE;
389 }
360 390
361 spin_lock_irqsave(&up->port.lock, flags); 391 spin_lock_irqsave(&up->port.lock, flags);
362 lsr = serial_in(up, UART_LSR); 392 lsr = serial_in(up, UART_LSR);
@@ -378,6 +408,9 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
378 transmit_chars(up); 408 transmit_chars(up);
379 409
380 spin_unlock_irqrestore(&up->port.lock, flags); 410 spin_unlock_irqrestore(&up->port.lock, flags);
411 pm_runtime_mark_last_busy(&up->pdev->dev);
412 pm_runtime_put_autosuspend(&up->pdev->dev);
413
381 up->port_activity = jiffies; 414 up->port_activity = jiffies;
382 return IRQ_HANDLED; 415 return IRQ_HANDLED;
383} 416}
@@ -388,11 +421,12 @@ static unsigned int serial_omap_tx_empty(struct uart_port *port)
388 unsigned long flags = 0; 421 unsigned long flags = 0;
389 unsigned int ret = 0; 422 unsigned int ret = 0;
390 423
391 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id); 424 pm_runtime_get_sync(&up->pdev->dev);
425 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
392 spin_lock_irqsave(&up->port.lock, flags); 426 spin_lock_irqsave(&up->port.lock, flags);
393 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 427 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
394 spin_unlock_irqrestore(&up->port.lock, flags); 428 spin_unlock_irqrestore(&up->port.lock, flags);
395 429 pm_runtime_put(&up->pdev->dev);
396 return ret; 430 return ret;
397} 431}
398 432
@@ -402,8 +436,11 @@ static unsigned int serial_omap_get_mctrl(struct uart_port *port)
402 unsigned char status; 436 unsigned char status;
403 unsigned int ret = 0; 437 unsigned int ret = 0;
404 438
439 pm_runtime_get_sync(&up->pdev->dev);
405 status = check_modem_status(up); 440 status = check_modem_status(up);
406 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id); 441 pm_runtime_put(&up->pdev->dev);
442
443 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
407 444
408 if (status & UART_MSR_DCD) 445 if (status & UART_MSR_DCD)
409 ret |= TIOCM_CAR; 446 ret |= TIOCM_CAR;
@@ -421,7 +458,7 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
421 struct uart_omap_port *up = (struct uart_omap_port *)port; 458 struct uart_omap_port *up = (struct uart_omap_port *)port;
422 unsigned char mcr = 0; 459 unsigned char mcr = 0;
423 460
424 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id); 461 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
425 if (mctrl & TIOCM_RTS) 462 if (mctrl & TIOCM_RTS)
426 mcr |= UART_MCR_RTS; 463 mcr |= UART_MCR_RTS;
427 if (mctrl & TIOCM_DTR) 464 if (mctrl & TIOCM_DTR)
@@ -433,8 +470,11 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
433 if (mctrl & TIOCM_LOOP) 470 if (mctrl & TIOCM_LOOP)
434 mcr |= UART_MCR_LOOP; 471 mcr |= UART_MCR_LOOP;
435 472
436 mcr |= up->mcr; 473 pm_runtime_get_sync(&up->pdev->dev);
437 serial_out(up, UART_MCR, mcr); 474 up->mcr = serial_in(up, UART_MCR);
475 up->mcr |= mcr;
476 serial_out(up, UART_MCR, up->mcr);
477 pm_runtime_put(&up->pdev->dev);
438} 478}
439 479
440static void serial_omap_break_ctl(struct uart_port *port, int break_state) 480static void serial_omap_break_ctl(struct uart_port *port, int break_state)
@@ -442,7 +482,8 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
442 struct uart_omap_port *up = (struct uart_omap_port *)port; 482 struct uart_omap_port *up = (struct uart_omap_port *)port;
443 unsigned long flags = 0; 483 unsigned long flags = 0;
444 484
445 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id); 485 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
486 pm_runtime_get_sync(&up->pdev->dev);
446 spin_lock_irqsave(&up->port.lock, flags); 487 spin_lock_irqsave(&up->port.lock, flags);
447 if (break_state == -1) 488 if (break_state == -1)
448 up->lcr |= UART_LCR_SBC; 489 up->lcr |= UART_LCR_SBC;
@@ -450,6 +491,7 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
450 up->lcr &= ~UART_LCR_SBC; 491 up->lcr &= ~UART_LCR_SBC;
451 serial_out(up, UART_LCR, up->lcr); 492 serial_out(up, UART_LCR, up->lcr);
452 spin_unlock_irqrestore(&up->port.lock, flags); 493 spin_unlock_irqrestore(&up->port.lock, flags);
494 pm_runtime_put(&up->pdev->dev);
453} 495}
454 496
455static int serial_omap_startup(struct uart_port *port) 497static int serial_omap_startup(struct uart_port *port)
@@ -466,8 +508,9 @@ static int serial_omap_startup(struct uart_port *port)
466 if (retval) 508 if (retval)
467 return retval; 509 return retval;
468 510
469 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id); 511 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
470 512
513 pm_runtime_get_sync(&up->pdev->dev);
471 /* 514 /*
472 * Clear the FIFO buffers and disable them. 515 * Clear the FIFO buffers and disable them.
473 * (they will be reenabled in set_termios()) 516 * (they will be reenabled in set_termios())
@@ -505,8 +548,8 @@ static int serial_omap_startup(struct uart_port *port)
505 (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys), 548 (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
506 0); 549 0);
507 init_timer(&(up->uart_dma.rx_timer)); 550 init_timer(&(up->uart_dma.rx_timer));
508 up->uart_dma.rx_timer.function = serial_omap_rx_timeout; 551 up->uart_dma.rx_timer.function = serial_omap_rxdma_poll;
509 up->uart_dma.rx_timer.data = up->pdev->id; 552 up->uart_dma.rx_timer.data = up->port.line;
510 /* Currently the buffer size is 4KB. Can increase it */ 553 /* Currently the buffer size is 4KB. Can increase it */
511 up->uart_dma.rx_buf = dma_alloc_coherent(NULL, 554 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
512 up->uart_dma.rx_buf_size, 555 up->uart_dma.rx_buf_size,
@@ -523,6 +566,8 @@ static int serial_omap_startup(struct uart_port *port)
523 /* Enable module level wake up */ 566 /* Enable module level wake up */
524 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 567 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
525 568
569 pm_runtime_mark_last_busy(&up->pdev->dev);
570 pm_runtime_put_autosuspend(&up->pdev->dev);
526 up->port_activity = jiffies; 571 up->port_activity = jiffies;
527 return 0; 572 return 0;
528} 573}
@@ -532,7 +577,9 @@ static void serial_omap_shutdown(struct uart_port *port)
532 struct uart_omap_port *up = (struct uart_omap_port *)port; 577 struct uart_omap_port *up = (struct uart_omap_port *)port;
533 unsigned long flags = 0; 578 unsigned long flags = 0;
534 579
535 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id); 580 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
581
582 pm_runtime_get_sync(&up->pdev->dev);
536 /* 583 /*
537 * Disable interrupts from this port 584 * Disable interrupts from this port
538 */ 585 */
@@ -566,6 +613,8 @@ static void serial_omap_shutdown(struct uart_port *port)
566 up->uart_dma.rx_buf_dma_phys); 613 up->uart_dma.rx_buf_dma_phys);
567 up->uart_dma.rx_buf = NULL; 614 up->uart_dma.rx_buf = NULL;
568 } 615 }
616
617 pm_runtime_put(&up->pdev->dev);
569 free_irq(up->port.irq, up); 618 free_irq(up->port.irq, up);
570} 619}
571 620
@@ -573,8 +622,6 @@ static inline void
573serial_omap_configure_xonxoff 622serial_omap_configure_xonxoff
574 (struct uart_omap_port *up, struct ktermios *termios) 623 (struct uart_omap_port *up, struct ktermios *termios)
575{ 624{
576 unsigned char efr = 0;
577
578 up->lcr = serial_in(up, UART_LCR); 625 up->lcr = serial_in(up, UART_LCR);
579 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 626 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
580 up->efr = serial_in(up, UART_EFR); 627 up->efr = serial_in(up, UART_EFR);
@@ -584,8 +631,7 @@ serial_omap_configure_xonxoff
584 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); 631 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
585 632
586 /* clear SW control mode bits */ 633 /* clear SW control mode bits */
587 efr = up->efr; 634 up->efr &= OMAP_UART_SW_CLR;
588 efr &= OMAP_UART_SW_CLR;
589 635
590 /* 636 /*
591 * IXON Flag: 637 * IXON Flag:
@@ -593,7 +639,7 @@ serial_omap_configure_xonxoff
593 * Transmit XON1, XOFF1 639 * Transmit XON1, XOFF1
594 */ 640 */
595 if (termios->c_iflag & IXON) 641 if (termios->c_iflag & IXON)
596 efr |= OMAP_UART_SW_TX; 642 up->efr |= OMAP_UART_SW_TX;
597 643
598 /* 644 /*
599 * IXOFF Flag: 645 * IXOFF Flag:
@@ -601,7 +647,7 @@ serial_omap_configure_xonxoff
601 * Receiver compares XON1, XOFF1. 647 * Receiver compares XON1, XOFF1.
602 */ 648 */
603 if (termios->c_iflag & IXOFF) 649 if (termios->c_iflag & IXOFF)
604 efr |= OMAP_UART_SW_RX; 650 up->efr |= OMAP_UART_SW_RX;
605 651
606 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 652 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
607 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 653 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
@@ -624,13 +670,21 @@ serial_omap_configure_xonxoff
624 * load the new software flow control mode IXON or IXOFF 670 * load the new software flow control mode IXON or IXOFF
625 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value. 671 * and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
626 */ 672 */
627 serial_out(up, UART_EFR, efr | UART_EFR_SCD); 673 serial_out(up, UART_EFR, up->efr | UART_EFR_SCD);
628 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 674 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
629 675
630 serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR); 676 serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
631 serial_out(up, UART_LCR, up->lcr); 677 serial_out(up, UART_LCR, up->lcr);
632} 678}
633 679
680static void serial_omap_uart_qos_work(struct work_struct *work)
681{
682 struct uart_omap_port *up = container_of(work, struct uart_omap_port,
683 qos_work);
684
685 pm_qos_update_request(&up->pm_qos_request, up->latency);
686}
687
634static void 688static void
635serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 689serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
636 struct ktermios *old) 690 struct ktermios *old)
@@ -671,6 +725,16 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
671 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13); 725 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
672 quot = serial_omap_get_divisor(port, baud); 726 quot = serial_omap_get_divisor(port, baud);
673 727
728 /* calculate wakeup latency constraint */
729 up->calc_latency = (1000000 * up->port.fifosize) /
730 (1000 * baud / 8);
731 up->latency = up->calc_latency;
732 schedule_work(&up->qos_work);
733
734 up->dll = quot & 0xff;
735 up->dlh = quot >> 8;
736 up->mdr1 = UART_OMAP_MDR1_DISABLE;
737
674 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 738 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
675 UART_FCR_ENABLE_FIFO; 739 UART_FCR_ENABLE_FIFO;
676 if (up->use_dma) 740 if (up->use_dma)
@@ -680,6 +744,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
680 * Ok, we're now changing the port state. Do it with 744 * Ok, we're now changing the port state. Do it with
681 * interrupts disabled. 745 * interrupts disabled.
682 */ 746 */
747 pm_runtime_get_sync(&up->pdev->dev);
683 spin_lock_irqsave(&up->port.lock, flags); 748 spin_lock_irqsave(&up->port.lock, flags);
684 749
685 /* 750 /*
@@ -723,6 +788,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
723 up->ier |= UART_IER_MSI; 788 up->ier |= UART_IER_MSI;
724 serial_out(up, UART_IER, up->ier); 789 serial_out(up, UART_IER, up->ier);
725 serial_out(up, UART_LCR, cval); /* reset DLAB */ 790 serial_out(up, UART_LCR, cval); /* reset DLAB */
791 up->lcr = cval;
792 up->scr = OMAP_UART_SCR_TX_EMPTY;
726 793
727 /* FIFOs and DMA Settings */ 794 /* FIFOs and DMA Settings */
728 795
@@ -749,17 +816,22 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
749 816
750 if (up->use_dma) { 817 if (up->use_dma) {
751 serial_out(up, UART_TI752_TLR, 0); 818 serial_out(up, UART_TI752_TLR, 0);
752 serial_out(up, UART_OMAP_SCR, 819 up->scr |= (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8);
753 (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8));
754 } 820 }
755 821
822 serial_out(up, UART_OMAP_SCR, up->scr);
823
756 serial_out(up, UART_EFR, up->efr); 824 serial_out(up, UART_EFR, up->efr);
757 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 825 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
758 serial_out(up, UART_MCR, up->mcr); 826 serial_out(up, UART_MCR, up->mcr);
759 827
760 /* Protocol, Baud Rate, and Interrupt Settings */ 828 /* Protocol, Baud Rate, and Interrupt Settings */
761 829
762 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); 830 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
831 serial_omap_mdr1_errataset(up, up->mdr1);
832 else
833 serial_out(up, UART_OMAP_MDR1, up->mdr1);
834
763 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 835 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
764 836
765 up->efr = serial_in(up, UART_EFR); 837 up->efr = serial_in(up, UART_EFR);
@@ -769,8 +841,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
769 serial_out(up, UART_IER, 0); 841 serial_out(up, UART_IER, 0);
770 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 842 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
771 843
772 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 844 serial_out(up, UART_DLL, up->dll); /* LS of divisor */
773 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 845 serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
774 846
775 serial_out(up, UART_LCR, 0); 847 serial_out(up, UART_LCR, 0);
776 serial_out(up, UART_IER, up->ier); 848 serial_out(up, UART_IER, up->ier);
@@ -780,9 +852,14 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
780 serial_out(up, UART_LCR, cval); 852 serial_out(up, UART_LCR, cval);
781 853
782 if (baud > 230400 && baud != 3000000) 854 if (baud > 230400 && baud != 3000000)
783 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE); 855 up->mdr1 = UART_OMAP_MDR1_13X_MODE;
784 else 856 else
785 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE); 857 up->mdr1 = UART_OMAP_MDR1_16X_MODE;
858
859 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
860 serial_omap_mdr1_errataset(up, up->mdr1);
861 else
862 serial_out(up, UART_OMAP_MDR1, up->mdr1);
786 863
787 /* Hardware Flow Control Configuration */ 864 /* Hardware Flow Control Configuration */
788 865
@@ -809,7 +886,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
809 serial_omap_configure_xonxoff(up, termios); 886 serial_omap_configure_xonxoff(up, termios);
810 887
811 spin_unlock_irqrestore(&up->port.lock, flags); 888 spin_unlock_irqrestore(&up->port.lock, flags);
812 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id); 889 pm_runtime_put(&up->pdev->dev);
890 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
813} 891}
814 892
815static void 893static void
@@ -819,7 +897,9 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
819 struct uart_omap_port *up = (struct uart_omap_port *)port; 897 struct uart_omap_port *up = (struct uart_omap_port *)port;
820 unsigned char efr; 898 unsigned char efr;
821 899
822 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id); 900 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
901
902 pm_runtime_get_sync(&up->pdev->dev);
823 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 903 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
824 efr = serial_in(up, UART_EFR); 904 efr = serial_in(up, UART_EFR);
825 serial_out(up, UART_EFR, efr | UART_EFR_ECB); 905 serial_out(up, UART_EFR, efr | UART_EFR_ECB);
@@ -829,6 +909,15 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
829 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 909 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
830 serial_out(up, UART_EFR, efr); 910 serial_out(up, UART_EFR, efr);
831 serial_out(up, UART_LCR, 0); 911 serial_out(up, UART_LCR, 0);
912
913 if (!device_may_wakeup(&up->pdev->dev)) {
914 if (!state)
915 pm_runtime_forbid(&up->pdev->dev);
916 else
917 pm_runtime_allow(&up->pdev->dev);
918 }
919
920 pm_runtime_put(&up->pdev->dev);
832} 921}
833 922
834static void serial_omap_release_port(struct uart_port *port) 923static void serial_omap_release_port(struct uart_port *port)
@@ -847,7 +936,7 @@ static void serial_omap_config_port(struct uart_port *port, int flags)
847 struct uart_omap_port *up = (struct uart_omap_port *)port; 936 struct uart_omap_port *up = (struct uart_omap_port *)port;
848 937
849 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 938 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
850 up->pdev->id); 939 up->port.line);
851 up->port.type = PORT_OMAP; 940 up->port.type = PORT_OMAP;
852} 941}
853 942
@@ -864,7 +953,7 @@ serial_omap_type(struct uart_port *port)
864{ 953{
865 struct uart_omap_port *up = (struct uart_omap_port *)port; 954 struct uart_omap_port *up = (struct uart_omap_port *)port;
866 955
867 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id); 956 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
868 return up->name; 957 return up->name;
869} 958}
870 959
@@ -906,19 +995,26 @@ static inline void wait_for_xmitr(struct uart_omap_port *up)
906static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 995static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
907{ 996{
908 struct uart_omap_port *up = (struct uart_omap_port *)port; 997 struct uart_omap_port *up = (struct uart_omap_port *)port;
998
999 pm_runtime_get_sync(&up->pdev->dev);
909 wait_for_xmitr(up); 1000 wait_for_xmitr(up);
910 serial_out(up, UART_TX, ch); 1001 serial_out(up, UART_TX, ch);
1002 pm_runtime_put(&up->pdev->dev);
911} 1003}
912 1004
913static int serial_omap_poll_get_char(struct uart_port *port) 1005static int serial_omap_poll_get_char(struct uart_port *port)
914{ 1006{
915 struct uart_omap_port *up = (struct uart_omap_port *)port; 1007 struct uart_omap_port *up = (struct uart_omap_port *)port;
916 unsigned int status = serial_in(up, UART_LSR); 1008 unsigned int status;
917 1009
1010 pm_runtime_get_sync(&up->pdev->dev);
1011 status = serial_in(up, UART_LSR);
918 if (!(status & UART_LSR_DR)) 1012 if (!(status & UART_LSR_DR))
919 return NO_POLL_CHAR; 1013 return NO_POLL_CHAR;
920 1014
921 return serial_in(up, UART_RX); 1015 status = serial_in(up, UART_RX);
1016 pm_runtime_put(&up->pdev->dev);
1017 return status;
922} 1018}
923 1019
924#endif /* CONFIG_CONSOLE_POLL */ 1020#endif /* CONFIG_CONSOLE_POLL */
@@ -946,6 +1042,8 @@ serial_omap_console_write(struct console *co, const char *s,
946 unsigned int ier; 1042 unsigned int ier;
947 int locked = 1; 1043 int locked = 1;
948 1044
1045 pm_runtime_get_sync(&up->pdev->dev);
1046
949 local_irq_save(flags); 1047 local_irq_save(flags);
950 if (up->port.sysrq) 1048 if (up->port.sysrq)
951 locked = 0; 1049 locked = 0;
@@ -978,6 +1076,8 @@ serial_omap_console_write(struct console *co, const char *s,
978 if (up->msr_saved_flags) 1076 if (up->msr_saved_flags)
979 check_modem_status(up); 1077 check_modem_status(up);
980 1078
1079 pm_runtime_mark_last_busy(&up->pdev->dev);
1080 pm_runtime_put_autosuspend(&up->pdev->dev);
981 if (locked) 1081 if (locked)
982 spin_unlock(&up->port.lock); 1082 spin_unlock(&up->port.lock);
983 local_irq_restore(flags); 1083 local_irq_restore(flags);
@@ -1014,7 +1114,7 @@ static struct console serial_omap_console = {
1014 1114
1015static void serial_omap_add_console_port(struct uart_omap_port *up) 1115static void serial_omap_add_console_port(struct uart_omap_port *up)
1016{ 1116{
1017 serial_omap_console_ports[up->pdev->id] = up; 1117 serial_omap_console_ports[up->port.line] = up;
1018} 1118}
1019 1119
1020#define OMAP_CONSOLE (&serial_omap_console) 1120#define OMAP_CONSOLE (&serial_omap_console)
@@ -1060,26 +1160,30 @@ static struct uart_driver serial_omap_reg = {
1060 .cons = OMAP_CONSOLE, 1160 .cons = OMAP_CONSOLE,
1061}; 1161};
1062 1162
1063static int 1163#ifdef CONFIG_SUSPEND
1064serial_omap_suspend(struct platform_device *pdev, pm_message_t state) 1164static int serial_omap_suspend(struct device *dev)
1065{ 1165{
1066 struct uart_omap_port *up = platform_get_drvdata(pdev); 1166 struct uart_omap_port *up = dev_get_drvdata(dev);
1067 1167
1068 if (up) 1168 if (up) {
1069 uart_suspend_port(&serial_omap_reg, &up->port); 1169 uart_suspend_port(&serial_omap_reg, &up->port);
1170 flush_work_sync(&up->qos_work);
1171 }
1172
1070 return 0; 1173 return 0;
1071} 1174}
1072 1175
1073static int serial_omap_resume(struct platform_device *dev) 1176static int serial_omap_resume(struct device *dev)
1074{ 1177{
1075 struct uart_omap_port *up = platform_get_drvdata(dev); 1178 struct uart_omap_port *up = dev_get_drvdata(dev);
1076 1179
1077 if (up) 1180 if (up)
1078 uart_resume_port(&serial_omap_reg, &up->port); 1181 uart_resume_port(&serial_omap_reg, &up->port);
1079 return 0; 1182 return 0;
1080} 1183}
1184#endif
1081 1185
1082static void serial_omap_rx_timeout(unsigned long uart_no) 1186static void serial_omap_rxdma_poll(unsigned long uart_no)
1083{ 1187{
1084 struct uart_omap_port *up = ui[uart_no]; 1188 struct uart_omap_port *up = ui[uart_no];
1085 unsigned int curr_dma_pos, curr_transmitted_size; 1189 unsigned int curr_dma_pos, curr_transmitted_size;
@@ -1089,9 +1193,9 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
1089 if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) || 1193 if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1090 (curr_dma_pos == 0)) { 1194 (curr_dma_pos == 0)) {
1091 if (jiffies_to_msecs(jiffies - up->port_activity) < 1195 if (jiffies_to_msecs(jiffies - up->port_activity) <
1092 RX_TIMEOUT) { 1196 up->uart_dma.rx_timeout) {
1093 mod_timer(&up->uart_dma.rx_timer, jiffies + 1197 mod_timer(&up->uart_dma.rx_timer, jiffies +
1094 usecs_to_jiffies(up->uart_dma.rx_timeout)); 1198 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1095 } else { 1199 } else {
1096 serial_omap_stop_rxdma(up); 1200 serial_omap_stop_rxdma(up);
1097 up->ier |= (UART_IER_RDI | UART_IER_RLSI); 1201 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
@@ -1120,7 +1224,7 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
1120 } 1224 }
1121 } else { 1225 } else {
1122 mod_timer(&up->uart_dma.rx_timer, jiffies + 1226 mod_timer(&up->uart_dma.rx_timer, jiffies +
1123 usecs_to_jiffies(up->uart_dma.rx_timeout)); 1227 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1124 } 1228 }
1125 up->port_activity = jiffies; 1229 up->port_activity = jiffies;
1126} 1230}
@@ -1135,6 +1239,7 @@ static int serial_omap_start_rxdma(struct uart_omap_port *up)
1135 int ret = 0; 1239 int ret = 0;
1136 1240
1137 if (up->uart_dma.rx_dma_channel == -1) { 1241 if (up->uart_dma.rx_dma_channel == -1) {
1242 pm_runtime_get_sync(&up->pdev->dev);
1138 ret = omap_request_dma(up->uart_dma.uart_dma_rx, 1243 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1139 "UART Rx DMA", 1244 "UART Rx DMA",
1140 (void *)uart_rx_dma_callback, up, 1245 (void *)uart_rx_dma_callback, up,
@@ -1158,7 +1263,7 @@ static int serial_omap_start_rxdma(struct uart_omap_port *up)
1158 /* FIXME: Cache maintenance needed here? */ 1263 /* FIXME: Cache maintenance needed here? */
1159 omap_start_dma(up->uart_dma.rx_dma_channel); 1264 omap_start_dma(up->uart_dma.rx_dma_channel);
1160 mod_timer(&up->uart_dma.rx_timer, jiffies + 1265 mod_timer(&up->uart_dma.rx_timer, jiffies +
1161 usecs_to_jiffies(up->uart_dma.rx_timeout)); 1266 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1162 up->uart_dma.rx_dma_used = true; 1267 up->uart_dma.rx_dma_used = true;
1163 return ret; 1268 return ret;
1164} 1269}
@@ -1221,6 +1326,19 @@ static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1221 return; 1326 return;
1222} 1327}
1223 1328
1329static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1330{
1331 struct omap_uart_port_info *omap_up_info;
1332
1333 omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL);
1334 if (!omap_up_info)
1335 return NULL; /* out of memory */
1336
1337 of_property_read_u32(dev->of_node, "clock-frequency",
1338 &omap_up_info->uartclk);
1339 return omap_up_info;
1340}
1341
1224static int serial_omap_probe(struct platform_device *pdev) 1342static int serial_omap_probe(struct platform_device *pdev)
1225{ 1343{
1226 struct uart_omap_port *up; 1344 struct uart_omap_port *up;
@@ -1228,6 +1346,9 @@ static int serial_omap_probe(struct platform_device *pdev)
1228 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 1346 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1229 int ret = -ENOSPC; 1347 int ret = -ENOSPC;
1230 1348
1349 if (pdev->dev.of_node)
1350 omap_up_info = of_get_uart_port_info(&pdev->dev);
1351
1231 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1352 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1232 if (!mem) { 1353 if (!mem) {
1233 dev_err(&pdev->dev, "no mem resource?\n"); 1354 dev_err(&pdev->dev, "no mem resource?\n");
@@ -1263,7 +1384,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1263 ret = -ENOMEM; 1384 ret = -ENOMEM;
1264 goto do_release_region; 1385 goto do_release_region;
1265 } 1386 }
1266 sprintf(up->name, "OMAP UART%d", pdev->id);
1267 up->pdev = pdev; 1387 up->pdev = pdev;
1268 up->port.dev = &pdev->dev; 1388 up->port.dev = &pdev->dev;
1269 up->port.type = PORT_OMAP; 1389 up->port.type = PORT_OMAP;
@@ -1273,34 +1393,74 @@ static int serial_omap_probe(struct platform_device *pdev)
1273 up->port.regshift = 2; 1393 up->port.regshift = 2;
1274 up->port.fifosize = 64; 1394 up->port.fifosize = 64;
1275 up->port.ops = &serial_omap_pops; 1395 up->port.ops = &serial_omap_pops;
1276 up->port.line = pdev->id;
1277 1396
1278 up->port.membase = omap_up_info->membase; 1397 if (pdev->dev.of_node)
1279 up->port.mapbase = omap_up_info->mapbase; 1398 up->port.line = of_alias_get_id(pdev->dev.of_node, "serial");
1399 else
1400 up->port.line = pdev->id;
1401
1402 if (up->port.line < 0) {
1403 dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n",
1404 up->port.line);
1405 ret = -ENODEV;
1406 goto err;
1407 }
1408
1409 sprintf(up->name, "OMAP UART%d", up->port.line);
1410 up->port.mapbase = mem->start;
1411 up->port.membase = ioremap(mem->start, resource_size(mem));
1412 if (!up->port.membase) {
1413 dev_err(&pdev->dev, "can't ioremap UART\n");
1414 ret = -ENOMEM;
1415 goto err;
1416 }
1417
1280 up->port.flags = omap_up_info->flags; 1418 up->port.flags = omap_up_info->flags;
1281 up->port.irqflags = omap_up_info->irqflags;
1282 up->port.uartclk = omap_up_info->uartclk; 1419 up->port.uartclk = omap_up_info->uartclk;
1420 if (!up->port.uartclk) {
1421 up->port.uartclk = DEFAULT_CLK_SPEED;
1422 dev_warn(&pdev->dev, "No clock speed specified: using default:"
1423 "%d\n", DEFAULT_CLK_SPEED);
1424 }
1283 up->uart_dma.uart_base = mem->start; 1425 up->uart_dma.uart_base = mem->start;
1426 up->errata = omap_up_info->errata;
1284 1427
1285 if (omap_up_info->dma_enabled) { 1428 if (omap_up_info->dma_enabled) {
1286 up->uart_dma.uart_dma_tx = dma_tx->start; 1429 up->uart_dma.uart_dma_tx = dma_tx->start;
1287 up->uart_dma.uart_dma_rx = dma_rx->start; 1430 up->uart_dma.uart_dma_rx = dma_rx->start;
1288 up->use_dma = 1; 1431 up->use_dma = 1;
1289 up->uart_dma.rx_buf_size = 4096; 1432 up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
1290 up->uart_dma.rx_timeout = 2; 1433 up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
1434 up->uart_dma.rx_poll_rate = omap_up_info->dma_rx_poll_rate;
1291 spin_lock_init(&(up->uart_dma.tx_lock)); 1435 spin_lock_init(&(up->uart_dma.tx_lock));
1292 spin_lock_init(&(up->uart_dma.rx_lock)); 1436 spin_lock_init(&(up->uart_dma.rx_lock));
1293 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE; 1437 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1294 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE; 1438 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1295 } 1439 }
1296 1440
1297 ui[pdev->id] = up; 1441 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1442 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1443 pm_qos_add_request(&up->pm_qos_request,
1444 PM_QOS_CPU_DMA_LATENCY, up->latency);
1445 serial_omap_uart_wq = create_singlethread_workqueue(up->name);
1446 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
1447
1448 pm_runtime_use_autosuspend(&pdev->dev);
1449 pm_runtime_set_autosuspend_delay(&pdev->dev,
1450 omap_up_info->autosuspend_timeout);
1451
1452 pm_runtime_irq_safe(&pdev->dev);
1453 pm_runtime_enable(&pdev->dev);
1454 pm_runtime_get_sync(&pdev->dev);
1455
1456 ui[up->port.line] = up;
1298 serial_omap_add_console_port(up); 1457 serial_omap_add_console_port(up);
1299 1458
1300 ret = uart_add_one_port(&serial_omap_reg, &up->port); 1459 ret = uart_add_one_port(&serial_omap_reg, &up->port);
1301 if (ret != 0) 1460 if (ret != 0)
1302 goto do_release_region; 1461 goto do_release_region;
1303 1462
1463 pm_runtime_put(&pdev->dev);
1304 platform_set_drvdata(pdev, up); 1464 platform_set_drvdata(pdev, up);
1305 return 0; 1465 return 0;
1306err: 1466err:
@@ -1315,22 +1475,168 @@ static int serial_omap_remove(struct platform_device *dev)
1315{ 1475{
1316 struct uart_omap_port *up = platform_get_drvdata(dev); 1476 struct uart_omap_port *up = platform_get_drvdata(dev);
1317 1477
1318 platform_set_drvdata(dev, NULL);
1319 if (up) { 1478 if (up) {
1479 pm_runtime_disable(&up->pdev->dev);
1320 uart_remove_one_port(&serial_omap_reg, &up->port); 1480 uart_remove_one_port(&serial_omap_reg, &up->port);
1481 pm_qos_remove_request(&up->pm_qos_request);
1482
1321 kfree(up); 1483 kfree(up);
1322 } 1484 }
1485
1486 platform_set_drvdata(dev, NULL);
1487 return 0;
1488}
1489
1490/*
1491 * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460)
1492 * The access to uart register after MDR1 Access
1493 * causes UART to corrupt data.
1494 *
1495 * Need a delay =
1496 * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
1497 * give 10 times as much
1498 */
1499static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
1500{
1501 u8 timeout = 255;
1502
1503 serial_out(up, UART_OMAP_MDR1, mdr1);
1504 udelay(2);
1505 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
1506 UART_FCR_CLEAR_RCVR);
1507 /*
1508 * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
1509 * TX_FIFO_E bit is 1.
1510 */
1511 while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
1512 (UART_LSR_THRE | UART_LSR_DR))) {
1513 timeout--;
1514 if (!timeout) {
1515 /* Should *never* happen. we warn and carry on */
1516 dev_crit(&up->pdev->dev, "Errata i202: timedout %x\n",
1517 serial_in(up, UART_LSR));
1518 break;
1519 }
1520 udelay(1);
1521 }
1522}
1523
1524static void serial_omap_restore_context(struct uart_omap_port *up)
1525{
1526 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1527 serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE);
1528 else
1529 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
1530
1531 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1532 serial_out(up, UART_EFR, UART_EFR_ECB);
1533 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1534 serial_out(up, UART_IER, 0x0);
1535 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1536 serial_out(up, UART_DLL, up->dll);
1537 serial_out(up, UART_DLM, up->dlh);
1538 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1539 serial_out(up, UART_IER, up->ier);
1540 serial_out(up, UART_FCR, up->fcr);
1541 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1542 serial_out(up, UART_MCR, up->mcr);
1543 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1544 serial_out(up, UART_OMAP_SCR, up->scr);
1545 serial_out(up, UART_EFR, up->efr);
1546 serial_out(up, UART_LCR, up->lcr);
1547 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1548 serial_omap_mdr1_errataset(up, up->mdr1);
1549 else
1550 serial_out(up, UART_OMAP_MDR1, up->mdr1);
1551}
1552
1553#ifdef CONFIG_PM_RUNTIME
1554static int serial_omap_runtime_suspend(struct device *dev)
1555{
1556 struct uart_omap_port *up = dev_get_drvdata(dev);
1557 struct omap_uart_port_info *pdata = dev->platform_data;
1558
1559 if (!up)
1560 return -EINVAL;
1561
1562 if (!pdata || !pdata->enable_wakeup)
1563 return 0;
1564
1565 if (pdata->get_context_loss_count)
1566 up->context_loss_cnt = pdata->get_context_loss_count(dev);
1567
1568 if (device_may_wakeup(dev)) {
1569 if (!up->wakeups_enabled) {
1570 pdata->enable_wakeup(up->pdev, true);
1571 up->wakeups_enabled = true;
1572 }
1573 } else {
1574 if (up->wakeups_enabled) {
1575 pdata->enable_wakeup(up->pdev, false);
1576 up->wakeups_enabled = false;
1577 }
1578 }
1579
1580 /* Errata i291 */
1581 if (up->use_dma && pdata->set_forceidle &&
1582 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1583 pdata->set_forceidle(up->pdev);
1584
1585 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1586 schedule_work(&up->qos_work);
1587
1588 return 0;
1589}
1590
1591static int serial_omap_runtime_resume(struct device *dev)
1592{
1593 struct uart_omap_port *up = dev_get_drvdata(dev);
1594 struct omap_uart_port_info *pdata = dev->platform_data;
1595
1596 if (up) {
1597 if (pdata->get_context_loss_count) {
1598 u32 loss_cnt = pdata->get_context_loss_count(dev);
1599
1600 if (up->context_loss_cnt != loss_cnt)
1601 serial_omap_restore_context(up);
1602 }
1603
1604 /* Errata i291 */
1605 if (up->use_dma && pdata->set_noidle &&
1606 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1607 pdata->set_noidle(up->pdev);
1608
1609 up->latency = up->calc_latency;
1610 schedule_work(&up->qos_work);
1611 }
1612
1323 return 0; 1613 return 0;
1324} 1614}
1615#endif
1616
1617static const struct dev_pm_ops serial_omap_dev_pm_ops = {
1618 SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume)
1619 SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend,
1620 serial_omap_runtime_resume, NULL)
1621};
1622
1623#if defined(CONFIG_OF)
1624static const struct of_device_id omap_serial_of_match[] = {
1625 { .compatible = "ti,omap2-uart" },
1626 { .compatible = "ti,omap3-uart" },
1627 { .compatible = "ti,omap4-uart" },
1628 {},
1629};
1630MODULE_DEVICE_TABLE(of, omap_serial_of_match);
1631#endif
1325 1632
1326static struct platform_driver serial_omap_driver = { 1633static struct platform_driver serial_omap_driver = {
1327 .probe = serial_omap_probe, 1634 .probe = serial_omap_probe,
1328 .remove = serial_omap_remove, 1635 .remove = serial_omap_remove,
1329
1330 .suspend = serial_omap_suspend,
1331 .resume = serial_omap_resume,
1332 .driver = { 1636 .driver = {
1333 .name = DRIVER_NAME, 1637 .name = DRIVER_NAME,
1638 .pm = &serial_omap_dev_pm_ops,
1639 .of_match_table = of_match_ptr(omap_serial_of_match),
1334 }, 1640 },
1335}; 1641};
1336 1642