diff options
author | Paul Mundt <lethal@linux-sh.org> | 2009-11-17 20:53:52 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-11-17 20:53:52 -0500 |
commit | 260af56271f79da0e37faa5a99b1786b221297e5 (patch) | |
tree | d76a2609f940b88083314d5f9131c73115bd4dcb /drivers | |
parent | 1dca899e95d27475c9036ce1cf857a72852b9c53 (diff) | |
parent | 648f15345add88a7eea724365fe1217a8d8a1e16 (diff) |
Merge branch 'sh/stable-updates'
Diffstat (limited to 'drivers')
143 files changed, 1879 insertions, 1038 deletions
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h index 8e679ef5b231..a4471e3d3853 100644 --- a/drivers/acpi/acpica/acconfig.h +++ b/drivers/acpi/acpica/acconfig.h | |||
@@ -103,9 +103,9 @@ | |||
103 | 103 | ||
104 | #define ACPI_MAX_REFERENCE_COUNT 0x1000 | 104 | #define ACPI_MAX_REFERENCE_COUNT 0x1000 |
105 | 105 | ||
106 | /* Size of cached memory mapping for system memory operation region */ | 106 | /* Default page size for use in mapping memory for operation regions */ |
107 | 107 | ||
108 | #define ACPI_SYSMEM_REGION_WINDOW_SIZE 4096 | 108 | #define ACPI_DEFAULT_PAGE_SIZE 4096 /* Must be power of 2 */ |
109 | 109 | ||
110 | /* owner_id tracking. 8 entries allows for 255 owner_ids */ | 110 | /* owner_id tracking. 8 entries allows for 255 owner_ids */ |
111 | 111 | ||
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c index 3a54b737d2da..2bd83ac57c3a 100644 --- a/drivers/acpi/acpica/exregion.c +++ b/drivers/acpi/acpica/exregion.c | |||
@@ -77,7 +77,8 @@ acpi_ex_system_memory_space_handler(u32 function, | |||
77 | void *logical_addr_ptr = NULL; | 77 | void *logical_addr_ptr = NULL; |
78 | struct acpi_mem_space_context *mem_info = region_context; | 78 | struct acpi_mem_space_context *mem_info = region_context; |
79 | u32 length; | 79 | u32 length; |
80 | acpi_size window_size; | 80 | acpi_size map_length; |
81 | acpi_size page_boundary_map_length; | ||
81 | #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED | 82 | #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED |
82 | u32 remainder; | 83 | u32 remainder; |
83 | #endif | 84 | #endif |
@@ -144,25 +145,39 @@ acpi_ex_system_memory_space_handler(u32 function, | |||
144 | } | 145 | } |
145 | 146 | ||
146 | /* | 147 | /* |
147 | * Don't attempt to map memory beyond the end of the region, and | 148 | * Attempt to map from the requested address to the end of the region. |
148 | * constrain the maximum mapping size to something reasonable. | 149 | * However, we will never map more than one page, nor will we cross |
150 | * a page boundary. | ||
149 | */ | 151 | */ |
150 | window_size = (acpi_size) | 152 | map_length = (acpi_size) |
151 | ((mem_info->address + mem_info->length) - address); | 153 | ((mem_info->address + mem_info->length) - address); |
152 | 154 | ||
153 | if (window_size > ACPI_SYSMEM_REGION_WINDOW_SIZE) { | 155 | /* |
154 | window_size = ACPI_SYSMEM_REGION_WINDOW_SIZE; | 156 | * If mapping the entire remaining portion of the region will cross |
157 | * a page boundary, just map up to the page boundary, do not cross. | ||
158 | * On some systems, crossing a page boundary while mapping regions | ||
159 | * can cause warnings if the pages have different attributes | ||
160 | * due to resource management | ||
161 | */ | ||
162 | page_boundary_map_length = | ||
163 | ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address; | ||
164 | |||
165 | if (!page_boundary_map_length) { | ||
166 | page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE; | ||
167 | } | ||
168 | |||
169 | if (map_length > page_boundary_map_length) { | ||
170 | map_length = page_boundary_map_length; | ||
155 | } | 171 | } |
156 | 172 | ||
157 | /* Create a new mapping starting at the address given */ | 173 | /* Create a new mapping starting at the address given */ |
158 | 174 | ||
159 | mem_info->mapped_logical_address = | 175 | mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length); |
160 | acpi_os_map_memory((acpi_physical_address) address, window_size); | ||
161 | if (!mem_info->mapped_logical_address) { | 176 | if (!mem_info->mapped_logical_address) { |
162 | ACPI_ERROR((AE_INFO, | 177 | ACPI_ERROR((AE_INFO, |
163 | "Could not map memory at %8.8X%8.8X, size %X", | 178 | "Could not map memory at %8.8X%8.8X, size %X", |
164 | ACPI_FORMAT_NATIVE_UINT(address), | 179 | ACPI_FORMAT_NATIVE_UINT(address), |
165 | (u32) window_size)); | 180 | (u32) map_length)); |
166 | mem_info->mapped_length = 0; | 181 | mem_info->mapped_length = 0; |
167 | return_ACPI_STATUS(AE_NO_MEMORY); | 182 | return_ACPI_STATUS(AE_NO_MEMORY); |
168 | } | 183 | } |
@@ -170,7 +185,7 @@ acpi_ex_system_memory_space_handler(u32 function, | |||
170 | /* Save the physical address and mapping size */ | 185 | /* Save the physical address and mapping size */ |
171 | 186 | ||
172 | mem_info->mapped_physical_address = address; | 187 | mem_info->mapped_physical_address = address; |
173 | mem_info->mapped_length = window_size; | 188 | mem_info->mapped_length = map_length; |
174 | } | 189 | } |
175 | 190 | ||
176 | /* | 191 | /* |
diff --git a/drivers/acpi/power_meter.c b/drivers/acpi/power_meter.c index e6bfd77986b8..2ef7030a0c28 100644 --- a/drivers/acpi/power_meter.c +++ b/drivers/acpi/power_meter.c | |||
@@ -294,7 +294,11 @@ static int set_acpi_trip(struct acpi_power_meter_resource *resource) | |||
294 | return -EINVAL; | 294 | return -EINVAL; |
295 | } | 295 | } |
296 | 296 | ||
297 | return data; | 297 | /* _PTP returns 0 on success, nonzero otherwise */ |
298 | if (data) | ||
299 | return -EINVAL; | ||
300 | |||
301 | return 0; | ||
298 | } | 302 | } |
299 | 303 | ||
300 | static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, | 304 | static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, |
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c index f8b6f555ba52..d0d25e2e1ced 100644 --- a/drivers/acpi/proc.c +++ b/drivers/acpi/proc.c | |||
@@ -393,7 +393,7 @@ acpi_system_write_wakeup_device(struct file *file, | |||
393 | struct list_head *node, *next; | 393 | struct list_head *node, *next; |
394 | char strbuf[5]; | 394 | char strbuf[5]; |
395 | char str[5] = ""; | 395 | char str[5] = ""; |
396 | int len = count; | 396 | unsigned int len = count; |
397 | struct acpi_device *found_dev = NULL; | 397 | struct acpi_device *found_dev = NULL; |
398 | 398 | ||
399 | if (len > 4) | 399 | if (len > 4) |
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index c567b46dfa0f..ec742a4e5635 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c | |||
@@ -770,7 +770,7 @@ static struct notifier_block acpi_cpu_notifier = | |||
770 | .notifier_call = acpi_cpu_soft_notify, | 770 | .notifier_call = acpi_cpu_soft_notify, |
771 | }; | 771 | }; |
772 | 772 | ||
773 | static int acpi_processor_add(struct acpi_device *device) | 773 | static int __cpuinit acpi_processor_add(struct acpi_device *device) |
774 | { | 774 | { |
775 | struct acpi_processor *pr = NULL; | 775 | struct acpi_processor *pr = NULL; |
776 | int result = 0; | 776 | int result = 0; |
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c index 4c6c14c1e307..1c5d7a8b2fdf 100644 --- a/drivers/acpi/processor_throttling.c +++ b/drivers/acpi/processor_throttling.c | |||
@@ -1133,15 +1133,15 @@ int acpi_processor_get_throttling_info(struct acpi_processor *pr) | |||
1133 | int result = 0; | 1133 | int result = 0; |
1134 | struct acpi_processor_throttling *pthrottling; | 1134 | struct acpi_processor_throttling *pthrottling; |
1135 | 1135 | ||
1136 | if (!pr) | ||
1137 | return -EINVAL; | ||
1138 | |||
1136 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | 1139 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
1137 | "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", | 1140 | "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", |
1138 | pr->throttling.address, | 1141 | pr->throttling.address, |
1139 | pr->throttling.duty_offset, | 1142 | pr->throttling.duty_offset, |
1140 | pr->throttling.duty_width)); | 1143 | pr->throttling.duty_width)); |
1141 | 1144 | ||
1142 | if (!pr) | ||
1143 | return -EINVAL; | ||
1144 | |||
1145 | /* | 1145 | /* |
1146 | * Evaluate _PTC, _TSS and _TPC | 1146 | * Evaluate _PTC, _TSS and _TPC |
1147 | * They must all be present or none of them can be used. | 1147 | * They must all be present or none of them can be used. |
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c index a90afcc723ab..4cc1b8116e76 100644 --- a/drivers/acpi/sleep.c +++ b/drivers/acpi/sleep.c | |||
@@ -413,6 +413,30 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = { | |||
413 | }, | 413 | }, |
414 | }, | 414 | }, |
415 | { | 415 | { |
416 | .callback = init_set_sci_en_on_resume, | ||
417 | .ident = "Hewlett-Packard Pavilion dv4", | ||
418 | .matches = { | ||
419 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
420 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"), | ||
421 | }, | ||
422 | }, | ||
423 | { | ||
424 | .callback = init_set_sci_en_on_resume, | ||
425 | .ident = "Hewlett-Packard Pavilion dv7", | ||
426 | .matches = { | ||
427 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
428 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"), | ||
429 | }, | ||
430 | }, | ||
431 | { | ||
432 | .callback = init_set_sci_en_on_resume, | ||
433 | .ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC", | ||
434 | .matches = { | ||
435 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
436 | DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"), | ||
437 | }, | ||
438 | }, | ||
439 | { | ||
416 | .callback = init_old_suspend_ordering, | 440 | .callback = init_old_suspend_ordering, |
417 | .ident = "Panasonic CF51-2L", | 441 | .ident = "Panasonic CF51-2L", |
418 | .matches = { | 442 | .matches = { |
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c index 64e3c581b7a9..05dff631591c 100644 --- a/drivers/acpi/video.c +++ b/drivers/acpi/video.c | |||
@@ -1223,7 +1223,7 @@ acpi_video_device_write_state(struct file *file, | |||
1223 | u32 state = 0; | 1223 | u32 state = 0; |
1224 | 1224 | ||
1225 | 1225 | ||
1226 | if (!dev || count + 1 > sizeof str) | 1226 | if (!dev || count >= sizeof(str)) |
1227 | return -EINVAL; | 1227 | return -EINVAL; |
1228 | 1228 | ||
1229 | if (copy_from_user(str, buffer, count)) | 1229 | if (copy_from_user(str, buffer, count)) |
@@ -1280,7 +1280,7 @@ acpi_video_device_write_brightness(struct file *file, | |||
1280 | int i; | 1280 | int i; |
1281 | 1281 | ||
1282 | 1282 | ||
1283 | if (!dev || !dev->brightness || count + 1 > sizeof str) | 1283 | if (!dev || !dev->brightness || count >= sizeof(str)) |
1284 | return -EINVAL; | 1284 | return -EINVAL; |
1285 | 1285 | ||
1286 | if (copy_from_user(str, buffer, count)) | 1286 | if (copy_from_user(str, buffer, count)) |
@@ -1562,7 +1562,7 @@ acpi_video_bus_write_POST(struct file *file, | |||
1562 | unsigned long long opt, options; | 1562 | unsigned long long opt, options; |
1563 | 1563 | ||
1564 | 1564 | ||
1565 | if (!video || count + 1 > sizeof str) | 1565 | if (!video || count >= sizeof(str)) |
1566 | return -EINVAL; | 1566 | return -EINVAL; |
1567 | 1567 | ||
1568 | status = acpi_video_bus_POST_options(video, &options); | 1568 | status = acpi_video_bus_POST_options(video, &options); |
@@ -1602,7 +1602,7 @@ acpi_video_bus_write_DOS(struct file *file, | |||
1602 | unsigned long opt; | 1602 | unsigned long opt; |
1603 | 1603 | ||
1604 | 1604 | ||
1605 | if (!video || count + 1 > sizeof str) | 1605 | if (!video || count >= sizeof(str)) |
1606 | return -EINVAL; | 1606 | return -EINVAL; |
1607 | 1607 | ||
1608 | if (copy_from_user(str, buffer, count)) | 1608 | if (copy_from_user(str, buffer, count)) |
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c index 7ba91aa3fe8b..2fb38027f3bb 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c | |||
@@ -591,6 +591,7 @@ static int btusb_close(struct hci_dev *hdev) | |||
591 | return 0; | 591 | return 0; |
592 | 592 | ||
593 | cancel_work_sync(&data->work); | 593 | cancel_work_sync(&data->work); |
594 | cancel_work_sync(&data->waker); | ||
594 | 595 | ||
595 | clear_bit(BTUSB_ISOC_RUNNING, &data->flags); | 596 | clear_bit(BTUSB_ISOC_RUNNING, &data->flags); |
596 | clear_bit(BTUSB_BULK_RUNNING, &data->flags); | 597 | clear_bit(BTUSB_BULK_RUNNING, &data->flags); |
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 662ed923d9eb..50de0f5750d8 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -661,7 +661,7 @@ int gpio_export(unsigned gpio, bool direction_may_change) | |||
661 | 661 | ||
662 | dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), | 662 | dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), |
663 | desc, ioname ? ioname : "gpio%d", gpio); | 663 | desc, ioname ? ioname : "gpio%d", gpio); |
664 | if (dev) { | 664 | if (!IS_ERR(dev)) { |
665 | if (direction_may_change) | 665 | if (direction_may_change) |
666 | status = sysfs_create_group(&dev->kobj, | 666 | status = sysfs_create_group(&dev->kobj, |
667 | &gpio_attr_group); | 667 | &gpio_attr_group); |
@@ -679,7 +679,7 @@ int gpio_export(unsigned gpio, bool direction_may_change) | |||
679 | if (status != 0) | 679 | if (status != 0) |
680 | device_unregister(dev); | 680 | device_unregister(dev); |
681 | } else | 681 | } else |
682 | status = -ENODEV; | 682 | status = PTR_ERR(dev); |
683 | if (status == 0) | 683 | if (status == 0) |
684 | set_bit(FLAG_EXPORT, &desc->flags); | 684 | set_bit(FLAG_EXPORT, &desc->flags); |
685 | } | 685 | } |
@@ -800,11 +800,11 @@ static int gpiochip_export(struct gpio_chip *chip) | |||
800 | mutex_lock(&sysfs_lock); | 800 | mutex_lock(&sysfs_lock); |
801 | dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, | 801 | dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, |
802 | "gpiochip%d", chip->base); | 802 | "gpiochip%d", chip->base); |
803 | if (dev) { | 803 | if (!IS_ERR(dev)) { |
804 | status = sysfs_create_group(&dev->kobj, | 804 | status = sysfs_create_group(&dev->kobj, |
805 | &gpiochip_attr_group); | 805 | &gpiochip_attr_group); |
806 | } else | 806 | } else |
807 | status = -ENODEV; | 807 | status = PTR_ERR(dev); |
808 | chip->exported = (status == 0); | 808 | chip->exported = (status == 0); |
809 | mutex_unlock(&sysfs_lock); | 809 | mutex_unlock(&sysfs_lock); |
810 | 810 | ||
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c index 1fe4e1d344fd..bbfd110a7168 100644 --- a/drivers/gpu/drm/drm_crtc_helper.c +++ b/drivers/gpu/drm/drm_crtc_helper.c | |||
@@ -331,6 +331,7 @@ create_mode: | |||
331 | cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60, | 331 | cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60, |
332 | cmdline_mode->rb, cmdline_mode->interlace, | 332 | cmdline_mode->rb, cmdline_mode->interlace, |
333 | cmdline_mode->margins); | 333 | cmdline_mode->margins); |
334 | drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); | ||
334 | list_add(&mode->head, &connector->modes); | 335 | list_add(&mode->head, &connector->modes); |
335 | return mode; | 336 | return mode; |
336 | } | 337 | } |
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 9c924614c418..dc8e374a0b55 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
@@ -707,7 +707,7 @@ int drm_fb_helper_set_par(struct fb_info *info) | |||
707 | 707 | ||
708 | if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) { | 708 | if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) { |
709 | mutex_lock(&dev->mode_config.mutex); | 709 | mutex_lock(&dev->mode_config.mutex); |
710 | ret = crtc->funcs->set_config(&fb_helper->crtc_info->mode_set); | 710 | ret = crtc->funcs->set_config(&fb_helper->crtc_info[i].mode_set); |
711 | mutex_unlock(&dev->mode_config.mutex); | 711 | mutex_unlock(&dev->mode_config.mutex); |
712 | if (ret) | 712 | if (ret) |
713 | return ret; | 713 | return ret; |
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index 09a28923f46e..b5713eedd6e1 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile | |||
@@ -49,7 +49,7 @@ radeon-y += radeon_device.o radeon_kms.o \ | |||
49 | radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ | 49 | radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ |
50 | rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ | 50 | rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ |
51 | r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ | 51 | r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ |
52 | r600_blit_kms.o | 52 | r600_blit_kms.o radeon_pm.o |
53 | 53 | ||
54 | radeon-$(CONFIG_COMPAT) += radeon_ioc32.o | 54 | radeon-$(CONFIG_COMPAT) += radeon_ioc32.o |
55 | 55 | ||
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h index 5d402086bc47..c11ddddfb3b6 100644 --- a/drivers/gpu/drm/radeon/atombios.h +++ b/drivers/gpu/drm/radeon/atombios.h | |||
@@ -2314,7 +2314,7 @@ typedef struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT { | |||
2314 | UCHAR ucSS_Step; | 2314 | UCHAR ucSS_Step; |
2315 | UCHAR ucSS_Delay; | 2315 | UCHAR ucSS_Delay; |
2316 | UCHAR ucSS_Id; | 2316 | UCHAR ucSS_Id; |
2317 | UCHAR ucRecommandedRef_Div; | 2317 | UCHAR ucRecommendedRef_Div; |
2318 | UCHAR ucSS_Range; /* it was reserved for V11 */ | 2318 | UCHAR ucSS_Range; /* it was reserved for V11 */ |
2319 | } ATOM_SPREAD_SPECTRUM_ASSIGNMENT; | 2319 | } ATOM_SPREAD_SPECTRUM_ASSIGNMENT; |
2320 | 2320 | ||
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 14fa9701aeb3..c15287a590ff 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -31,10 +31,6 @@ | |||
31 | #include "atom.h" | 31 | #include "atom.h" |
32 | #include "atom-bits.h" | 32 | #include "atom-bits.h" |
33 | 33 | ||
34 | /* evil but including atombios.h is much worse */ | ||
35 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | ||
36 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing, | ||
37 | int32_t *pixel_clock); | ||
38 | static void atombios_overscan_setup(struct drm_crtc *crtc, | 34 | static void atombios_overscan_setup(struct drm_crtc *crtc, |
39 | struct drm_display_mode *mode, | 35 | struct drm_display_mode *mode, |
40 | struct drm_display_mode *adjusted_mode) | 36 | struct drm_display_mode *adjusted_mode) |
@@ -248,18 +244,18 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
248 | 244 | ||
249 | switch (mode) { | 245 | switch (mode) { |
250 | case DRM_MODE_DPMS_ON: | 246 | case DRM_MODE_DPMS_ON: |
247 | atombios_enable_crtc(crtc, 1); | ||
251 | if (ASIC_IS_DCE3(rdev)) | 248 | if (ASIC_IS_DCE3(rdev)) |
252 | atombios_enable_crtc_memreq(crtc, 1); | 249 | atombios_enable_crtc_memreq(crtc, 1); |
253 | atombios_enable_crtc(crtc, 1); | ||
254 | atombios_blank_crtc(crtc, 0); | 250 | atombios_blank_crtc(crtc, 0); |
255 | break; | 251 | break; |
256 | case DRM_MODE_DPMS_STANDBY: | 252 | case DRM_MODE_DPMS_STANDBY: |
257 | case DRM_MODE_DPMS_SUSPEND: | 253 | case DRM_MODE_DPMS_SUSPEND: |
258 | case DRM_MODE_DPMS_OFF: | 254 | case DRM_MODE_DPMS_OFF: |
259 | atombios_blank_crtc(crtc, 1); | 255 | atombios_blank_crtc(crtc, 1); |
260 | atombios_enable_crtc(crtc, 0); | ||
261 | if (ASIC_IS_DCE3(rdev)) | 256 | if (ASIC_IS_DCE3(rdev)) |
262 | atombios_enable_crtc_memreq(crtc, 0); | 257 | atombios_enable_crtc_memreq(crtc, 0); |
258 | atombios_enable_crtc(crtc, 0); | ||
263 | break; | 259 | break; |
264 | } | 260 | } |
265 | 261 | ||
@@ -270,59 +266,147 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
270 | 266 | ||
271 | static void | 267 | static void |
272 | atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, | 268 | atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, |
273 | SET_CRTC_USING_DTD_TIMING_PARAMETERS * crtc_param) | 269 | struct drm_display_mode *mode) |
274 | { | 270 | { |
271 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
275 | struct drm_device *dev = crtc->dev; | 272 | struct drm_device *dev = crtc->dev; |
276 | struct radeon_device *rdev = dev->dev_private; | 273 | struct radeon_device *rdev = dev->dev_private; |
277 | SET_CRTC_USING_DTD_TIMING_PARAMETERS conv_param; | 274 | SET_CRTC_USING_DTD_TIMING_PARAMETERS args; |
278 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming); | 275 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming); |
276 | u16 misc = 0; | ||
279 | 277 | ||
280 | conv_param.usH_Size = cpu_to_le16(crtc_param->usH_Size); | 278 | memset(&args, 0, sizeof(args)); |
281 | conv_param.usH_Blanking_Time = | 279 | args.usH_Size = cpu_to_le16(mode->crtc_hdisplay); |
282 | cpu_to_le16(crtc_param->usH_Blanking_Time); | 280 | args.usH_Blanking_Time = |
283 | conv_param.usV_Size = cpu_to_le16(crtc_param->usV_Size); | 281 | cpu_to_le16(mode->crtc_hblank_end - mode->crtc_hdisplay); |
284 | conv_param.usV_Blanking_Time = | 282 | args.usV_Size = cpu_to_le16(mode->crtc_vdisplay); |
285 | cpu_to_le16(crtc_param->usV_Blanking_Time); | 283 | args.usV_Blanking_Time = |
286 | conv_param.usH_SyncOffset = cpu_to_le16(crtc_param->usH_SyncOffset); | 284 | cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay); |
287 | conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); | 285 | args.usH_SyncOffset = |
288 | conv_param.usV_SyncOffset = cpu_to_le16(crtc_param->usV_SyncOffset); | 286 | cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay); |
289 | conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); | 287 | args.usH_SyncWidth = |
290 | conv_param.susModeMiscInfo.usAccess = | 288 | cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); |
291 | cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); | 289 | args.usV_SyncOffset = |
292 | conv_param.ucCRTC = crtc_param->ucCRTC; | 290 | cpu_to_le16(mode->crtc_vsync_start - mode->crtc_vdisplay); |
291 | args.usV_SyncWidth = | ||
292 | cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start); | ||
293 | /*args.ucH_Border = mode->hborder;*/ | ||
294 | /*args.ucV_Border = mode->vborder;*/ | ||
295 | |||
296 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) | ||
297 | misc |= ATOM_VSYNC_POLARITY; | ||
298 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) | ||
299 | misc |= ATOM_HSYNC_POLARITY; | ||
300 | if (mode->flags & DRM_MODE_FLAG_CSYNC) | ||
301 | misc |= ATOM_COMPOSITESYNC; | ||
302 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
303 | misc |= ATOM_INTERLACE; | ||
304 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
305 | misc |= ATOM_DOUBLE_CLOCK_MODE; | ||
306 | |||
307 | args.susModeMiscInfo.usAccess = cpu_to_le16(misc); | ||
308 | args.ucCRTC = radeon_crtc->crtc_id; | ||
293 | 309 | ||
294 | printk("executing set crtc dtd timing\n"); | 310 | printk("executing set crtc dtd timing\n"); |
295 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); | 311 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
296 | } | 312 | } |
297 | 313 | ||
298 | void atombios_crtc_set_timing(struct drm_crtc *crtc, | 314 | static void atombios_crtc_set_timing(struct drm_crtc *crtc, |
299 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION * | 315 | struct drm_display_mode *mode) |
300 | crtc_param) | ||
301 | { | 316 | { |
317 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
302 | struct drm_device *dev = crtc->dev; | 318 | struct drm_device *dev = crtc->dev; |
303 | struct radeon_device *rdev = dev->dev_private; | 319 | struct radeon_device *rdev = dev->dev_private; |
304 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION conv_param; | 320 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION args; |
305 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing); | 321 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing); |
322 | u16 misc = 0; | ||
306 | 323 | ||
307 | conv_param.usH_Total = cpu_to_le16(crtc_param->usH_Total); | 324 | memset(&args, 0, sizeof(args)); |
308 | conv_param.usH_Disp = cpu_to_le16(crtc_param->usH_Disp); | 325 | args.usH_Total = cpu_to_le16(mode->crtc_htotal); |
309 | conv_param.usH_SyncStart = cpu_to_le16(crtc_param->usH_SyncStart); | 326 | args.usH_Disp = cpu_to_le16(mode->crtc_hdisplay); |
310 | conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); | 327 | args.usH_SyncStart = cpu_to_le16(mode->crtc_hsync_start); |
311 | conv_param.usV_Total = cpu_to_le16(crtc_param->usV_Total); | 328 | args.usH_SyncWidth = |
312 | conv_param.usV_Disp = cpu_to_le16(crtc_param->usV_Disp); | 329 | cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); |
313 | conv_param.usV_SyncStart = cpu_to_le16(crtc_param->usV_SyncStart); | 330 | args.usV_Total = cpu_to_le16(mode->crtc_vtotal); |
314 | conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); | 331 | args.usV_Disp = cpu_to_le16(mode->crtc_vdisplay); |
315 | conv_param.susModeMiscInfo.usAccess = | 332 | args.usV_SyncStart = cpu_to_le16(mode->crtc_vsync_start); |
316 | cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); | 333 | args.usV_SyncWidth = |
317 | conv_param.ucCRTC = crtc_param->ucCRTC; | 334 | cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start); |
318 | conv_param.ucOverscanRight = crtc_param->ucOverscanRight; | 335 | |
319 | conv_param.ucOverscanLeft = crtc_param->ucOverscanLeft; | 336 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
320 | conv_param.ucOverscanBottom = crtc_param->ucOverscanBottom; | 337 | misc |= ATOM_VSYNC_POLARITY; |
321 | conv_param.ucOverscanTop = crtc_param->ucOverscanTop; | 338 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
322 | conv_param.ucReserved = crtc_param->ucReserved; | 339 | misc |= ATOM_HSYNC_POLARITY; |
340 | if (mode->flags & DRM_MODE_FLAG_CSYNC) | ||
341 | misc |= ATOM_COMPOSITESYNC; | ||
342 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
343 | misc |= ATOM_INTERLACE; | ||
344 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
345 | misc |= ATOM_DOUBLE_CLOCK_MODE; | ||
346 | |||
347 | args.susModeMiscInfo.usAccess = cpu_to_le16(misc); | ||
348 | args.ucCRTC = radeon_crtc->crtc_id; | ||
323 | 349 | ||
324 | printk("executing set crtc timing\n"); | 350 | printk("executing set crtc timing\n"); |
325 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); | 351 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
352 | } | ||
353 | |||
354 | static void atombios_set_ss(struct drm_crtc *crtc, int enable) | ||
355 | { | ||
356 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
357 | struct drm_device *dev = crtc->dev; | ||
358 | struct radeon_device *rdev = dev->dev_private; | ||
359 | struct drm_encoder *encoder = NULL; | ||
360 | struct radeon_encoder *radeon_encoder = NULL; | ||
361 | struct radeon_encoder_atom_dig *dig = NULL; | ||
362 | int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL); | ||
363 | ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION args; | ||
364 | ENABLE_LVDS_SS_PARAMETERS legacy_args; | ||
365 | uint16_t percentage = 0; | ||
366 | uint8_t type = 0, step = 0, delay = 0, range = 0; | ||
367 | |||
368 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | ||
369 | if (encoder->crtc == crtc) { | ||
370 | radeon_encoder = to_radeon_encoder(encoder); | ||
371 | /* only enable spread spectrum on LVDS */ | ||
372 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | ||
373 | dig = radeon_encoder->enc_priv; | ||
374 | if (dig && dig->ss) { | ||
375 | percentage = dig->ss->percentage; | ||
376 | type = dig->ss->type; | ||
377 | step = dig->ss->step; | ||
378 | delay = dig->ss->delay; | ||
379 | range = dig->ss->range; | ||
380 | } else if (enable) | ||
381 | return; | ||
382 | } else if (enable) | ||
383 | return; | ||
384 | break; | ||
385 | } | ||
386 | } | ||
387 | |||
388 | if (!radeon_encoder) | ||
389 | return; | ||
390 | |||
391 | if (ASIC_IS_AVIVO(rdev)) { | ||
392 | memset(&args, 0, sizeof(args)); | ||
393 | args.usSpreadSpectrumPercentage = cpu_to_le16(percentage); | ||
394 | args.ucSpreadSpectrumType = type; | ||
395 | args.ucSpreadSpectrumStep = step; | ||
396 | args.ucSpreadSpectrumDelay = delay; | ||
397 | args.ucSpreadSpectrumRange = range; | ||
398 | args.ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; | ||
399 | args.ucEnable = enable; | ||
400 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
401 | } else { | ||
402 | memset(&legacy_args, 0, sizeof(legacy_args)); | ||
403 | legacy_args.usSpreadSpectrumPercentage = cpu_to_le16(percentage); | ||
404 | legacy_args.ucSpreadSpectrumType = type; | ||
405 | legacy_args.ucSpreadSpectrumStepSize_Delay = (step & 3) << 2; | ||
406 | legacy_args.ucSpreadSpectrumStepSize_Delay |= (delay & 7) << 4; | ||
407 | legacy_args.ucEnable = enable; | ||
408 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&legacy_args); | ||
409 | } | ||
326 | } | 410 | } |
327 | 411 | ||
328 | void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | 412 | void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) |
@@ -333,12 +417,13 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
333 | struct drm_encoder *encoder = NULL; | 417 | struct drm_encoder *encoder = NULL; |
334 | struct radeon_encoder *radeon_encoder = NULL; | 418 | struct radeon_encoder *radeon_encoder = NULL; |
335 | uint8_t frev, crev; | 419 | uint8_t frev, crev; |
336 | int index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); | 420 | int index; |
337 | SET_PIXEL_CLOCK_PS_ALLOCATION args; | 421 | SET_PIXEL_CLOCK_PS_ALLOCATION args; |
338 | PIXEL_CLOCK_PARAMETERS *spc1_ptr; | 422 | PIXEL_CLOCK_PARAMETERS *spc1_ptr; |
339 | PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr; | 423 | PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr; |
340 | PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr; | 424 | PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr; |
341 | uint32_t sclock = mode->clock; | 425 | uint32_t pll_clock = mode->clock; |
426 | uint32_t adjusted_clock; | ||
342 | uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; | 427 | uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; |
343 | struct radeon_pll *pll; | 428 | struct radeon_pll *pll; |
344 | int pll_flags = 0; | 429 | int pll_flags = 0; |
@@ -346,8 +431,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
346 | memset(&args, 0, sizeof(args)); | 431 | memset(&args, 0, sizeof(args)); |
347 | 432 | ||
348 | if (ASIC_IS_AVIVO(rdev)) { | 433 | if (ASIC_IS_AVIVO(rdev)) { |
349 | uint32_t ss_cntl; | ||
350 | |||
351 | if ((rdev->family == CHIP_RS600) || | 434 | if ((rdev->family == CHIP_RS600) || |
352 | (rdev->family == CHIP_RS690) || | 435 | (rdev->family == CHIP_RS690) || |
353 | (rdev->family == CHIP_RS740)) | 436 | (rdev->family == CHIP_RS740)) |
@@ -358,15 +441,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
358 | pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; | 441 | pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; |
359 | else | 442 | else |
360 | pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; | 443 | pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; |
361 | |||
362 | /* disable spread spectrum clocking for now -- thanks Hedy Lamarr */ | ||
363 | if (radeon_crtc->crtc_id == 0) { | ||
364 | ss_cntl = RREG32(AVIVO_P1PLL_INT_SS_CNTL); | ||
365 | WREG32(AVIVO_P1PLL_INT_SS_CNTL, ss_cntl & ~1); | ||
366 | } else { | ||
367 | ss_cntl = RREG32(AVIVO_P2PLL_INT_SS_CNTL); | ||
368 | WREG32(AVIVO_P2PLL_INT_SS_CNTL, ss_cntl & ~1); | ||
369 | } | ||
370 | } else { | 444 | } else { |
371 | pll_flags |= RADEON_PLL_LEGACY; | 445 | pll_flags |= RADEON_PLL_LEGACY; |
372 | 446 | ||
@@ -393,14 +467,43 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
393 | } | 467 | } |
394 | } | 468 | } |
395 | 469 | ||
470 | /* DCE3+ has an AdjustDisplayPll that will adjust the pixel clock | ||
471 | * accordingly based on the encoder/transmitter to work around | ||
472 | * special hw requirements. | ||
473 | */ | ||
474 | if (ASIC_IS_DCE3(rdev)) { | ||
475 | ADJUST_DISPLAY_PLL_PS_ALLOCATION adjust_pll_args; | ||
476 | |||
477 | if (!encoder) | ||
478 | return; | ||
479 | |||
480 | memset(&adjust_pll_args, 0, sizeof(adjust_pll_args)); | ||
481 | adjust_pll_args.usPixelClock = cpu_to_le16(mode->clock / 10); | ||
482 | adjust_pll_args.ucTransmitterID = radeon_encoder->encoder_id; | ||
483 | adjust_pll_args.ucEncodeMode = atombios_get_encoder_mode(encoder); | ||
484 | |||
485 | index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll); | ||
486 | atom_execute_table(rdev->mode_info.atom_context, | ||
487 | index, (uint32_t *)&adjust_pll_args); | ||
488 | adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10; | ||
489 | } else { | ||
490 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ | ||
491 | if (ASIC_IS_AVIVO(rdev) && | ||
492 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)) | ||
493 | adjusted_clock = mode->clock * 2; | ||
494 | else | ||
495 | adjusted_clock = mode->clock; | ||
496 | } | ||
497 | |||
396 | if (radeon_crtc->crtc_id == 0) | 498 | if (radeon_crtc->crtc_id == 0) |
397 | pll = &rdev->clock.p1pll; | 499 | pll = &rdev->clock.p1pll; |
398 | else | 500 | else |
399 | pll = &rdev->clock.p2pll; | 501 | pll = &rdev->clock.p2pll; |
400 | 502 | ||
401 | radeon_compute_pll(pll, mode->clock, &sclock, &fb_div, &frac_fb_div, | 503 | radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, |
402 | &ref_div, &post_div, pll_flags); | 504 | &ref_div, &post_div, pll_flags); |
403 | 505 | ||
506 | index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); | ||
404 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, | 507 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, |
405 | &crev); | 508 | &crev); |
406 | 509 | ||
@@ -409,7 +512,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
409 | switch (crev) { | 512 | switch (crev) { |
410 | case 1: | 513 | case 1: |
411 | spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput; | 514 | spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput; |
412 | spc1_ptr->usPixelClock = cpu_to_le16(sclock); | 515 | spc1_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); |
413 | spc1_ptr->usRefDiv = cpu_to_le16(ref_div); | 516 | spc1_ptr->usRefDiv = cpu_to_le16(ref_div); |
414 | spc1_ptr->usFbDiv = cpu_to_le16(fb_div); | 517 | spc1_ptr->usFbDiv = cpu_to_le16(fb_div); |
415 | spc1_ptr->ucFracFbDiv = frac_fb_div; | 518 | spc1_ptr->ucFracFbDiv = frac_fb_div; |
@@ -422,7 +525,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
422 | case 2: | 525 | case 2: |
423 | spc2_ptr = | 526 | spc2_ptr = |
424 | (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput; | 527 | (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput; |
425 | spc2_ptr->usPixelClock = cpu_to_le16(sclock); | 528 | spc2_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); |
426 | spc2_ptr->usRefDiv = cpu_to_le16(ref_div); | 529 | spc2_ptr->usRefDiv = cpu_to_le16(ref_div); |
427 | spc2_ptr->usFbDiv = cpu_to_le16(fb_div); | 530 | spc2_ptr->usFbDiv = cpu_to_le16(fb_div); |
428 | spc2_ptr->ucFracFbDiv = frac_fb_div; | 531 | spc2_ptr->ucFracFbDiv = frac_fb_div; |
@@ -437,7 +540,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
437 | return; | 540 | return; |
438 | spc3_ptr = | 541 | spc3_ptr = |
439 | (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput; | 542 | (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput; |
440 | spc3_ptr->usPixelClock = cpu_to_le16(sclock); | 543 | spc3_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); |
441 | spc3_ptr->usRefDiv = cpu_to_le16(ref_div); | 544 | spc3_ptr->usRefDiv = cpu_to_le16(ref_div); |
442 | spc3_ptr->usFbDiv = cpu_to_le16(fb_div); | 545 | spc3_ptr->usFbDiv = cpu_to_le16(fb_div); |
443 | spc3_ptr->ucFracFbDiv = frac_fb_div; | 546 | spc3_ptr->ucFracFbDiv = frac_fb_div; |
@@ -527,6 +630,16 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
527 | WREG32(AVIVO_D1VGA_CONTROL, 0); | 630 | WREG32(AVIVO_D1VGA_CONTROL, 0); |
528 | else | 631 | else |
529 | WREG32(AVIVO_D2VGA_CONTROL, 0); | 632 | WREG32(AVIVO_D2VGA_CONTROL, 0); |
633 | |||
634 | if (rdev->family >= CHIP_RV770) { | ||
635 | if (radeon_crtc->crtc_id) { | ||
636 | WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0); | ||
637 | WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0); | ||
638 | } else { | ||
639 | WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0); | ||
640 | WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0); | ||
641 | } | ||
642 | } | ||
530 | WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, | 643 | WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, |
531 | (u32) fb_location); | 644 | (u32) fb_location); |
532 | WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + | 645 | WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + |
@@ -563,6 +676,10 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
563 | radeon_fb = to_radeon_framebuffer(old_fb); | 676 | radeon_fb = to_radeon_framebuffer(old_fb); |
564 | radeon_gem_object_unpin(radeon_fb->obj); | 677 | radeon_gem_object_unpin(radeon_fb->obj); |
565 | } | 678 | } |
679 | |||
680 | /* Bytes per pixel may have changed */ | ||
681 | radeon_bandwidth_update(rdev); | ||
682 | |||
566 | return 0; | 683 | return 0; |
567 | } | 684 | } |
568 | 685 | ||
@@ -574,134 +691,24 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, | |||
574 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 691 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
575 | struct drm_device *dev = crtc->dev; | 692 | struct drm_device *dev = crtc->dev; |
576 | struct radeon_device *rdev = dev->dev_private; | 693 | struct radeon_device *rdev = dev->dev_private; |
577 | struct drm_encoder *encoder; | ||
578 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION crtc_timing; | ||
579 | int need_tv_timings = 0; | ||
580 | bool ret; | ||
581 | 694 | ||
582 | /* TODO color tiling */ | 695 | /* TODO color tiling */ |
583 | memset(&crtc_timing, 0, sizeof(crtc_timing)); | ||
584 | |||
585 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | ||
586 | /* find tv std */ | ||
587 | if (encoder->crtc == crtc) { | ||
588 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
589 | |||
590 | if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) { | ||
591 | struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv; | ||
592 | if (tv_dac) { | ||
593 | if (tv_dac->tv_std == TV_STD_NTSC || | ||
594 | tv_dac->tv_std == TV_STD_NTSC_J || | ||
595 | tv_dac->tv_std == TV_STD_PAL_M) | ||
596 | need_tv_timings = 1; | ||
597 | else | ||
598 | need_tv_timings = 2; | ||
599 | break; | ||
600 | } | ||
601 | } | ||
602 | } | ||
603 | } | ||
604 | |||
605 | crtc_timing.ucCRTC = radeon_crtc->crtc_id; | ||
606 | if (need_tv_timings) { | ||
607 | ret = radeon_atom_get_tv_timings(rdev, need_tv_timings - 1, | ||
608 | &crtc_timing, &adjusted_mode->clock); | ||
609 | if (ret == false) | ||
610 | need_tv_timings = 0; | ||
611 | } | ||
612 | |||
613 | if (!need_tv_timings) { | ||
614 | crtc_timing.usH_Total = adjusted_mode->crtc_htotal; | ||
615 | crtc_timing.usH_Disp = adjusted_mode->crtc_hdisplay; | ||
616 | crtc_timing.usH_SyncStart = adjusted_mode->crtc_hsync_start; | ||
617 | crtc_timing.usH_SyncWidth = | ||
618 | adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; | ||
619 | |||
620 | crtc_timing.usV_Total = adjusted_mode->crtc_vtotal; | ||
621 | crtc_timing.usV_Disp = adjusted_mode->crtc_vdisplay; | ||
622 | crtc_timing.usV_SyncStart = adjusted_mode->crtc_vsync_start; | ||
623 | crtc_timing.usV_SyncWidth = | ||
624 | adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; | ||
625 | |||
626 | if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) | ||
627 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_VSYNC_POLARITY; | ||
628 | |||
629 | if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) | ||
630 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_HSYNC_POLARITY; | ||
631 | |||
632 | if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC) | ||
633 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_COMPOSITESYNC; | ||
634 | |||
635 | if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
636 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_INTERLACE; | ||
637 | |||
638 | if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
639 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_DOUBLE_CLOCK_MODE; | ||
640 | } | ||
641 | 696 | ||
697 | atombios_set_ss(crtc, 0); | ||
642 | atombios_crtc_set_pll(crtc, adjusted_mode); | 698 | atombios_crtc_set_pll(crtc, adjusted_mode); |
643 | atombios_crtc_set_timing(crtc, &crtc_timing); | 699 | atombios_set_ss(crtc, 1); |
700 | atombios_crtc_set_timing(crtc, adjusted_mode); | ||
644 | 701 | ||
645 | if (ASIC_IS_AVIVO(rdev)) | 702 | if (ASIC_IS_AVIVO(rdev)) |
646 | atombios_crtc_set_base(crtc, x, y, old_fb); | 703 | atombios_crtc_set_base(crtc, x, y, old_fb); |
647 | else { | 704 | else { |
648 | if (radeon_crtc->crtc_id == 0) { | 705 | if (radeon_crtc->crtc_id == 0) |
649 | SET_CRTC_USING_DTD_TIMING_PARAMETERS crtc_dtd_timing; | 706 | atombios_set_crtc_dtd_timing(crtc, adjusted_mode); |
650 | memset(&crtc_dtd_timing, 0, sizeof(crtc_dtd_timing)); | ||
651 | |||
652 | /* setup FP shadow regs on R4xx */ | ||
653 | crtc_dtd_timing.ucCRTC = radeon_crtc->crtc_id; | ||
654 | crtc_dtd_timing.usH_Size = adjusted_mode->crtc_hdisplay; | ||
655 | crtc_dtd_timing.usV_Size = adjusted_mode->crtc_vdisplay; | ||
656 | crtc_dtd_timing.usH_Blanking_Time = | ||
657 | adjusted_mode->crtc_hblank_end - | ||
658 | adjusted_mode->crtc_hdisplay; | ||
659 | crtc_dtd_timing.usV_Blanking_Time = | ||
660 | adjusted_mode->crtc_vblank_end - | ||
661 | adjusted_mode->crtc_vdisplay; | ||
662 | crtc_dtd_timing.usH_SyncOffset = | ||
663 | adjusted_mode->crtc_hsync_start - | ||
664 | adjusted_mode->crtc_hdisplay; | ||
665 | crtc_dtd_timing.usV_SyncOffset = | ||
666 | adjusted_mode->crtc_vsync_start - | ||
667 | adjusted_mode->crtc_vdisplay; | ||
668 | crtc_dtd_timing.usH_SyncWidth = | ||
669 | adjusted_mode->crtc_hsync_end - | ||
670 | adjusted_mode->crtc_hsync_start; | ||
671 | crtc_dtd_timing.usV_SyncWidth = | ||
672 | adjusted_mode->crtc_vsync_end - | ||
673 | adjusted_mode->crtc_vsync_start; | ||
674 | /* crtc_dtd_timing.ucH_Border = adjusted_mode->crtc_hborder; */ | ||
675 | /* crtc_dtd_timing.ucV_Border = adjusted_mode->crtc_vborder; */ | ||
676 | |||
677 | if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) | ||
678 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
679 | ATOM_VSYNC_POLARITY; | ||
680 | |||
681 | if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) | ||
682 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
683 | ATOM_HSYNC_POLARITY; | ||
684 | |||
685 | if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC) | ||
686 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
687 | ATOM_COMPOSITESYNC; | ||
688 | |||
689 | if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
690 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
691 | ATOM_INTERLACE; | ||
692 | |||
693 | if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
694 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
695 | ATOM_DOUBLE_CLOCK_MODE; | ||
696 | |||
697 | atombios_set_crtc_dtd_timing(crtc, &crtc_dtd_timing); | ||
698 | } | ||
699 | radeon_crtc_set_base(crtc, x, y, old_fb); | 707 | radeon_crtc_set_base(crtc, x, y, old_fb); |
700 | radeon_legacy_atom_set_surface(crtc); | 708 | radeon_legacy_atom_set_surface(crtc); |
701 | } | 709 | } |
702 | atombios_overscan_setup(crtc, mode, adjusted_mode); | 710 | atombios_overscan_setup(crtc, mode, adjusted_mode); |
703 | atombios_scaler_setup(crtc); | 711 | atombios_scaler_setup(crtc); |
704 | radeon_bandwidth_update(rdev); | ||
705 | return 0; | 712 | return 0; |
706 | } | 713 | } |
707 | 714 | ||
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 161094c07d94..c9e93eabcf16 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -186,7 +186,7 @@ static inline uint32_t r100_irq_ack(struct radeon_device *rdev) | |||
186 | 186 | ||
187 | int r100_irq_process(struct radeon_device *rdev) | 187 | int r100_irq_process(struct radeon_device *rdev) |
188 | { | 188 | { |
189 | uint32_t status; | 189 | uint32_t status, msi_rearm; |
190 | 190 | ||
191 | status = r100_irq_ack(rdev); | 191 | status = r100_irq_ack(rdev); |
192 | if (!status) { | 192 | if (!status) { |
@@ -209,6 +209,21 @@ int r100_irq_process(struct radeon_device *rdev) | |||
209 | } | 209 | } |
210 | status = r100_irq_ack(rdev); | 210 | status = r100_irq_ack(rdev); |
211 | } | 211 | } |
212 | if (rdev->msi_enabled) { | ||
213 | switch (rdev->family) { | ||
214 | case CHIP_RS400: | ||
215 | case CHIP_RS480: | ||
216 | msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM; | ||
217 | WREG32(RADEON_AIC_CNTL, msi_rearm); | ||
218 | WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); | ||
219 | break; | ||
220 | default: | ||
221 | msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; | ||
222 | WREG32(RADEON_MSI_REARM_EN, msi_rearm); | ||
223 | WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); | ||
224 | break; | ||
225 | } | ||
226 | } | ||
212 | return IRQ_HANDLED; | 227 | return IRQ_HANDLED; |
213 | } | 228 | } |
214 | 229 | ||
@@ -240,7 +255,7 @@ int r100_wb_init(struct radeon_device *rdev) | |||
240 | int r; | 255 | int r; |
241 | 256 | ||
242 | if (rdev->wb.wb_obj == NULL) { | 257 | if (rdev->wb.wb_obj == NULL) { |
243 | r = radeon_object_create(rdev, NULL, 4096, | 258 | r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, |
244 | true, | 259 | true, |
245 | RADEON_GEM_DOMAIN_GTT, | 260 | RADEON_GEM_DOMAIN_GTT, |
246 | false, &rdev->wb.wb_obj); | 261 | false, &rdev->wb.wb_obj); |
@@ -563,19 +578,19 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) | |||
563 | indirect1_start = 16; | 578 | indirect1_start = 16; |
564 | /* cp setup */ | 579 | /* cp setup */ |
565 | WREG32(0x718, pre_write_timer | (pre_write_limit << 28)); | 580 | WREG32(0x718, pre_write_timer | (pre_write_limit << 28)); |
566 | WREG32(RADEON_CP_RB_CNTL, | 581 | tmp = (REG_SET(RADEON_RB_BUFSZ, rb_bufsz) | |
567 | #ifdef __BIG_ENDIAN | ||
568 | RADEON_BUF_SWAP_32BIT | | ||
569 | #endif | ||
570 | REG_SET(RADEON_RB_BUFSZ, rb_bufsz) | | ||
571 | REG_SET(RADEON_RB_BLKSZ, rb_blksz) | | 582 | REG_SET(RADEON_RB_BLKSZ, rb_blksz) | |
572 | REG_SET(RADEON_MAX_FETCH, max_fetch) | | 583 | REG_SET(RADEON_MAX_FETCH, max_fetch) | |
573 | RADEON_RB_NO_UPDATE); | 584 | RADEON_RB_NO_UPDATE); |
585 | #ifdef __BIG_ENDIAN | ||
586 | tmp |= RADEON_BUF_SWAP_32BIT; | ||
587 | #endif | ||
588 | WREG32(RADEON_CP_RB_CNTL, tmp); | ||
589 | |||
574 | /* Set ring address */ | 590 | /* Set ring address */ |
575 | DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr); | 591 | DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr); |
576 | WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr); | 592 | WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr); |
577 | /* Force read & write ptr to 0 */ | 593 | /* Force read & write ptr to 0 */ |
578 | tmp = RREG32(RADEON_CP_RB_CNTL); | ||
579 | WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); | 594 | WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); |
580 | WREG32(RADEON_CP_RB_RPTR_WR, 0); | 595 | WREG32(RADEON_CP_RB_RPTR_WR, 0); |
581 | WREG32(RADEON_CP_RB_WPTR, 0); | 596 | WREG32(RADEON_CP_RB_WPTR, 0); |
@@ -2364,7 +2379,7 @@ void r100_bandwidth_update(struct radeon_device *rdev) | |||
2364 | /* | 2379 | /* |
2365 | Find the total latency for the display data. | 2380 | Find the total latency for the display data. |
2366 | */ | 2381 | */ |
2367 | disp_latency_overhead.full = rfixed_const(80); | 2382 | disp_latency_overhead.full = rfixed_const(8); |
2368 | disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff); | 2383 | disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff); |
2369 | mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full; | 2384 | mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full; |
2370 | mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full; | 2385 | mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full; |
@@ -2562,8 +2577,11 @@ void r100_bandwidth_update(struct radeon_device *rdev) | |||
2562 | static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t) | 2577 | static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t) |
2563 | { | 2578 | { |
2564 | DRM_ERROR("pitch %d\n", t->pitch); | 2579 | DRM_ERROR("pitch %d\n", t->pitch); |
2580 | DRM_ERROR("use_pitch %d\n", t->use_pitch); | ||
2565 | DRM_ERROR("width %d\n", t->width); | 2581 | DRM_ERROR("width %d\n", t->width); |
2582 | DRM_ERROR("width_11 %d\n", t->width_11); | ||
2566 | DRM_ERROR("height %d\n", t->height); | 2583 | DRM_ERROR("height %d\n", t->height); |
2584 | DRM_ERROR("height_11 %d\n", t->height_11); | ||
2567 | DRM_ERROR("num levels %d\n", t->num_levels); | 2585 | DRM_ERROR("num levels %d\n", t->num_levels); |
2568 | DRM_ERROR("depth %d\n", t->txdepth); | 2586 | DRM_ERROR("depth %d\n", t->txdepth); |
2569 | DRM_ERROR("bpp %d\n", t->cpp); | 2587 | DRM_ERROR("bpp %d\n", t->cpp); |
@@ -2623,15 +2641,17 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev, | |||
2623 | else | 2641 | else |
2624 | w = track->textures[u].pitch / (1 << i); | 2642 | w = track->textures[u].pitch / (1 << i); |
2625 | } else { | 2643 | } else { |
2626 | w = track->textures[u].width / (1 << i); | 2644 | w = track->textures[u].width; |
2627 | if (rdev->family >= CHIP_RV515) | 2645 | if (rdev->family >= CHIP_RV515) |
2628 | w |= track->textures[u].width_11; | 2646 | w |= track->textures[u].width_11; |
2647 | w = w / (1 << i); | ||
2629 | if (track->textures[u].roundup_w) | 2648 | if (track->textures[u].roundup_w) |
2630 | w = roundup_pow_of_two(w); | 2649 | w = roundup_pow_of_two(w); |
2631 | } | 2650 | } |
2632 | h = track->textures[u].height / (1 << i); | 2651 | h = track->textures[u].height; |
2633 | if (rdev->family >= CHIP_RV515) | 2652 | if (rdev->family >= CHIP_RV515) |
2634 | h |= track->textures[u].height_11; | 2653 | h |= track->textures[u].height_11; |
2654 | h = h / (1 << i); | ||
2635 | if (track->textures[u].roundup_h) | 2655 | if (track->textures[u].roundup_h) |
2636 | h = roundup_pow_of_two(h); | 2656 | h = roundup_pow_of_two(h); |
2637 | size += w * h; | 2657 | size += w * h; |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index e08c4a8974ca..2f43ee8e4048 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -113,7 +113,7 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev) | |||
113 | tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD; | 113 | tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD; |
114 | WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); | 114 | WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); |
115 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location); | 115 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location); |
116 | tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 4096; | 116 | tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - RADEON_GPU_PAGE_SIZE; |
117 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp); | 117 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp); |
118 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); | 118 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); |
119 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); | 119 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); |
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 5c7fe52de30e..1cefdbcc0850 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -311,6 +311,8 @@ int r420_init(struct radeon_device *rdev) | |||
311 | } | 311 | } |
312 | /* Initialize clocks */ | 312 | /* Initialize clocks */ |
313 | radeon_get_clock_info(rdev->ddev); | 313 | radeon_get_clock_info(rdev->ddev); |
314 | /* Initialize power management */ | ||
315 | radeon_pm_init(rdev); | ||
314 | /* Get vram informations */ | 316 | /* Get vram informations */ |
315 | r300_vram_info(rdev); | 317 | r300_vram_info(rdev); |
316 | /* Initialize memory controller (also test AGP) */ | 318 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h index 868add6e166d..7baa73955563 100644 --- a/drivers/gpu/drm/radeon/r500_reg.h +++ b/drivers/gpu/drm/radeon/r500_reg.h | |||
@@ -384,9 +384,16 @@ | |||
384 | # define AVIVO_D1GRPH_TILED (1 << 20) | 384 | # define AVIVO_D1GRPH_TILED (1 << 20) |
385 | # define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) | 385 | # define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) |
386 | 386 | ||
387 | /* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2 | ||
388 | * block and vice versa. This applies to GRPH, CUR, etc. | ||
389 | */ | ||
387 | #define AVIVO_D1GRPH_LUT_SEL 0x6108 | 390 | #define AVIVO_D1GRPH_LUT_SEL 0x6108 |
388 | #define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 | 391 | #define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 |
392 | #define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914 | ||
393 | #define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114 | ||
389 | #define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 | 394 | #define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 |
395 | #define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x691c | ||
396 | #define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x611c | ||
390 | #define AVIVO_D1GRPH_PITCH 0x6120 | 397 | #define AVIVO_D1GRPH_PITCH 0x6120 |
391 | #define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 | 398 | #define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 |
392 | #define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 | 399 | #define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 |
@@ -404,6 +411,8 @@ | |||
404 | # define AVIVO_D1CURSOR_MODE_MASK (3 << 8) | 411 | # define AVIVO_D1CURSOR_MODE_MASK (3 << 8) |
405 | # define AVIVO_D1CURSOR_MODE_24BPP 2 | 412 | # define AVIVO_D1CURSOR_MODE_24BPP 2 |
406 | #define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 | 413 | #define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 |
414 | #define R700_D1CUR_SURFACE_ADDRESS_HIGH 0x6c0c | ||
415 | #define R700_D2CUR_SURFACE_ADDRESS_HIGH 0x640c | ||
407 | #define AVIVO_D1CUR_SIZE 0x6410 | 416 | #define AVIVO_D1CUR_SIZE 0x6410 |
408 | #define AVIVO_D1CUR_POSITION 0x6414 | 417 | #define AVIVO_D1CUR_POSITION 0x6414 |
409 | #define AVIVO_D1CUR_HOT_SPOT 0x6418 | 418 | #define AVIVO_D1CUR_HOT_SPOT 0x6418 |
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index a555b7b19b48..f7435185c0a6 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c | |||
@@ -260,6 +260,8 @@ int r520_init(struct radeon_device *rdev) | |||
260 | } | 260 | } |
261 | /* Initialize clocks */ | 261 | /* Initialize clocks */ |
262 | radeon_get_clock_info(rdev->ddev); | 262 | radeon_get_clock_info(rdev->ddev); |
263 | /* Initialize power management */ | ||
264 | radeon_pm_init(rdev); | ||
263 | /* Get vram informations */ | 265 | /* Get vram informations */ |
264 | r520_vram_info(rdev); | 266 | r520_vram_info(rdev); |
265 | /* Initialize memory controller (also test AGP) */ | 267 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 609719490ec2..278f646bc18e 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -339,11 +339,10 @@ int r600_mc_init(struct radeon_device *rdev) | |||
339 | { | 339 | { |
340 | fixed20_12 a; | 340 | fixed20_12 a; |
341 | u32 tmp; | 341 | u32 tmp; |
342 | int chansize; | 342 | int chansize, numchan; |
343 | int r; | 343 | int r; |
344 | 344 | ||
345 | /* Get VRAM informations */ | 345 | /* Get VRAM informations */ |
346 | rdev->mc.vram_width = 128; | ||
347 | rdev->mc.vram_is_ddr = true; | 346 | rdev->mc.vram_is_ddr = true; |
348 | tmp = RREG32(RAMCFG); | 347 | tmp = RREG32(RAMCFG); |
349 | if (tmp & CHANSIZE_OVERRIDE) { | 348 | if (tmp & CHANSIZE_OVERRIDE) { |
@@ -353,17 +352,23 @@ int r600_mc_init(struct radeon_device *rdev) | |||
353 | } else { | 352 | } else { |
354 | chansize = 32; | 353 | chansize = 32; |
355 | } | 354 | } |
356 | if (rdev->family == CHIP_R600) { | 355 | tmp = RREG32(CHMAP); |
357 | rdev->mc.vram_width = 8 * chansize; | 356 | switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) { |
358 | } else if (rdev->family == CHIP_RV670) { | 357 | case 0: |
359 | rdev->mc.vram_width = 4 * chansize; | 358 | default: |
360 | } else if ((rdev->family == CHIP_RV610) || | 359 | numchan = 1; |
361 | (rdev->family == CHIP_RV620)) { | 360 | break; |
362 | rdev->mc.vram_width = chansize; | 361 | case 1: |
363 | } else if ((rdev->family == CHIP_RV630) || | 362 | numchan = 2; |
364 | (rdev->family == CHIP_RV635)) { | 363 | break; |
365 | rdev->mc.vram_width = 2 * chansize; | 364 | case 2: |
365 | numchan = 4; | ||
366 | break; | ||
367 | case 3: | ||
368 | numchan = 8; | ||
369 | break; | ||
366 | } | 370 | } |
371 | rdev->mc.vram_width = numchan * chansize; | ||
367 | /* Could aper size report 0 ? */ | 372 | /* Could aper size report 0 ? */ |
368 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 373 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); |
369 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 374 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); |
@@ -404,35 +409,29 @@ int r600_mc_init(struct radeon_device *rdev) | |||
404 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | 409 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; |
405 | } | 410 | } |
406 | } else { | 411 | } else { |
407 | if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { | 412 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; |
408 | rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) & | 413 | rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) & |
409 | 0xFFFF) << 24; | 414 | 0xFFFF) << 24; |
410 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; | 415 | tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; |
411 | tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; | 416 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { |
412 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { | 417 | /* Enough place after vram */ |
413 | /* Enough place after vram */ | 418 | rdev->mc.gtt_location = tmp; |
414 | rdev->mc.gtt_location = tmp; | 419 | } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) { |
415 | } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) { | 420 | /* Enough place before vram */ |
416 | /* Enough place before vram */ | 421 | rdev->mc.gtt_location = 0; |
422 | } else { | ||
423 | /* Not enough place after or before shrink | ||
424 | * gart size | ||
425 | */ | ||
426 | if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) { | ||
417 | rdev->mc.gtt_location = 0; | 427 | rdev->mc.gtt_location = 0; |
428 | rdev->mc.gtt_size = rdev->mc.vram_location; | ||
418 | } else { | 429 | } else { |
419 | /* Not enough place after or before shrink | 430 | rdev->mc.gtt_location = tmp; |
420 | * gart size | 431 | rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp; |
421 | */ | ||
422 | if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) { | ||
423 | rdev->mc.gtt_location = 0; | ||
424 | rdev->mc.gtt_size = rdev->mc.vram_location; | ||
425 | } else { | ||
426 | rdev->mc.gtt_location = tmp; | ||
427 | rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp; | ||
428 | } | ||
429 | } | 432 | } |
430 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | ||
431 | } else { | ||
432 | rdev->mc.vram_location = 0x00000000UL; | ||
433 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | ||
434 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; | ||
435 | } | 433 | } |
434 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | ||
436 | } | 435 | } |
437 | rdev->mc.vram_start = rdev->mc.vram_location; | 436 | rdev->mc.vram_start = rdev->mc.vram_location; |
438 | rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; | 437 | rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; |
@@ -859,7 +858,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
859 | ((rdev->family) == CHIP_RV630) || | 858 | ((rdev->family) == CHIP_RV630) || |
860 | ((rdev->family) == CHIP_RV610) || | 859 | ((rdev->family) == CHIP_RV610) || |
861 | ((rdev->family) == CHIP_RV620) || | 860 | ((rdev->family) == CHIP_RV620) || |
862 | ((rdev->family) == CHIP_RS780)) { | 861 | ((rdev->family) == CHIP_RS780) || |
862 | ((rdev->family) == CHIP_RS880)) { | ||
863 | WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE); | 863 | WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE); |
864 | } else { | 864 | } else { |
865 | WREG32(DB_DEBUG, 0); | 865 | WREG32(DB_DEBUG, 0); |
@@ -876,7 +876,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
876 | tmp = RREG32(SQ_MS_FIFO_SIZES); | 876 | tmp = RREG32(SQ_MS_FIFO_SIZES); |
877 | if (((rdev->family) == CHIP_RV610) || | 877 | if (((rdev->family) == CHIP_RV610) || |
878 | ((rdev->family) == CHIP_RV620) || | 878 | ((rdev->family) == CHIP_RV620) || |
879 | ((rdev->family) == CHIP_RS780)) { | 879 | ((rdev->family) == CHIP_RS780) || |
880 | ((rdev->family) == CHIP_RS880)) { | ||
880 | tmp = (CACHE_FIFO_SIZE(0xa) | | 881 | tmp = (CACHE_FIFO_SIZE(0xa) | |
881 | FETCH_FIFO_HIWATER(0xa) | | 882 | FETCH_FIFO_HIWATER(0xa) | |
882 | DONE_FIFO_HIWATER(0xe0) | | 883 | DONE_FIFO_HIWATER(0xe0) | |
@@ -919,7 +920,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
919 | NUM_ES_STACK_ENTRIES(0)); | 920 | NUM_ES_STACK_ENTRIES(0)); |
920 | } else if (((rdev->family) == CHIP_RV610) || | 921 | } else if (((rdev->family) == CHIP_RV610) || |
921 | ((rdev->family) == CHIP_RV620) || | 922 | ((rdev->family) == CHIP_RV620) || |
922 | ((rdev->family) == CHIP_RS780)) { | 923 | ((rdev->family) == CHIP_RS780) || |
924 | ((rdev->family) == CHIP_RS880)) { | ||
923 | /* no vertex cache */ | 925 | /* no vertex cache */ |
924 | sq_config &= ~VC_ENABLE; | 926 | sq_config &= ~VC_ENABLE; |
925 | 927 | ||
@@ -976,7 +978,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
976 | 978 | ||
977 | if (((rdev->family) == CHIP_RV610) || | 979 | if (((rdev->family) == CHIP_RV610) || |
978 | ((rdev->family) == CHIP_RV620) || | 980 | ((rdev->family) == CHIP_RV620) || |
979 | ((rdev->family) == CHIP_RS780)) { | 981 | ((rdev->family) == CHIP_RS780) || |
982 | ((rdev->family) == CHIP_RS880)) { | ||
980 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY)); | 983 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY)); |
981 | } else { | 984 | } else { |
982 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); | 985 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); |
@@ -1002,8 +1005,9 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
1002 | tmp = rdev->config.r600.max_pipes * 16; | 1005 | tmp = rdev->config.r600.max_pipes * 16; |
1003 | switch (rdev->family) { | 1006 | switch (rdev->family) { |
1004 | case CHIP_RV610: | 1007 | case CHIP_RV610: |
1005 | case CHIP_RS780: | ||
1006 | case CHIP_RV620: | 1008 | case CHIP_RV620: |
1009 | case CHIP_RS780: | ||
1010 | case CHIP_RS880: | ||
1007 | tmp += 32; | 1011 | tmp += 32; |
1008 | break; | 1012 | break; |
1009 | case CHIP_RV670: | 1013 | case CHIP_RV670: |
@@ -1044,8 +1048,9 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
1044 | 1048 | ||
1045 | switch (rdev->family) { | 1049 | switch (rdev->family) { |
1046 | case CHIP_RV610: | 1050 | case CHIP_RV610: |
1047 | case CHIP_RS780: | ||
1048 | case CHIP_RV620: | 1051 | case CHIP_RV620: |
1052 | case CHIP_RS780: | ||
1053 | case CHIP_RS880: | ||
1049 | tmp = TC_L2_SIZE(8); | 1054 | tmp = TC_L2_SIZE(8); |
1050 | break; | 1055 | break; |
1051 | case CHIP_RV630: | 1056 | case CHIP_RV630: |
@@ -1267,19 +1272,17 @@ int r600_cp_resume(struct radeon_device *rdev) | |||
1267 | 1272 | ||
1268 | /* Set ring buffer size */ | 1273 | /* Set ring buffer size */ |
1269 | rb_bufsz = drm_order(rdev->cp.ring_size / 8); | 1274 | rb_bufsz = drm_order(rdev->cp.ring_size / 8); |
1275 | tmp = RB_NO_UPDATE | (drm_order(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; | ||
1270 | #ifdef __BIG_ENDIAN | 1276 | #ifdef __BIG_ENDIAN |
1271 | WREG32(CP_RB_CNTL, BUF_SWAP_32BIT | RB_NO_UPDATE | | 1277 | tmp |= BUF_SWAP_32BIT; |
1272 | (drm_order(4096/8) << 8) | rb_bufsz); | ||
1273 | #else | ||
1274 | WREG32(CP_RB_CNTL, RB_NO_UPDATE | (drm_order(4096/8) << 8) | rb_bufsz); | ||
1275 | #endif | 1278 | #endif |
1279 | WREG32(CP_RB_CNTL, tmp); | ||
1276 | WREG32(CP_SEM_WAIT_TIMER, 0x4); | 1280 | WREG32(CP_SEM_WAIT_TIMER, 0x4); |
1277 | 1281 | ||
1278 | /* Set the write pointer delay */ | 1282 | /* Set the write pointer delay */ |
1279 | WREG32(CP_RB_WPTR_DELAY, 0); | 1283 | WREG32(CP_RB_WPTR_DELAY, 0); |
1280 | 1284 | ||
1281 | /* Initialize the ring buffer's read and write pointers */ | 1285 | /* Initialize the ring buffer's read and write pointers */ |
1282 | tmp = RREG32(CP_RB_CNTL); | ||
1283 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); | 1286 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); |
1284 | WREG32(CP_RB_RPTR_WR, 0); | 1287 | WREG32(CP_RB_RPTR_WR, 0); |
1285 | WREG32(CP_RB_WPTR, 0); | 1288 | WREG32(CP_RB_WPTR, 0); |
@@ -1400,7 +1403,7 @@ int r600_wb_enable(struct radeon_device *rdev) | |||
1400 | int r; | 1403 | int r; |
1401 | 1404 | ||
1402 | if (rdev->wb.wb_obj == NULL) { | 1405 | if (rdev->wb.wb_obj == NULL) { |
1403 | r = radeon_object_create(rdev, NULL, 4096, true, | 1406 | r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true, |
1404 | RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); | 1407 | RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); |
1405 | if (r) { | 1408 | if (r) { |
1406 | dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); | 1409 | dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); |
@@ -1450,8 +1453,8 @@ int r600_copy_blit(struct radeon_device *rdev, | |||
1450 | uint64_t src_offset, uint64_t dst_offset, | 1453 | uint64_t src_offset, uint64_t dst_offset, |
1451 | unsigned num_pages, struct radeon_fence *fence) | 1454 | unsigned num_pages, struct radeon_fence *fence) |
1452 | { | 1455 | { |
1453 | r600_blit_prepare_copy(rdev, num_pages * 4096); | 1456 | r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE); |
1454 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * 4096); | 1457 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE); |
1455 | r600_blit_done_copy(rdev, fence); | 1458 | r600_blit_done_copy(rdev, fence); |
1456 | return 0; | 1459 | return 0; |
1457 | } | 1460 | } |
@@ -1632,10 +1635,13 @@ int r600_init(struct radeon_device *rdev) | |||
1632 | r600_scratch_init(rdev); | 1635 | r600_scratch_init(rdev); |
1633 | /* Initialize surface registers */ | 1636 | /* Initialize surface registers */ |
1634 | radeon_surface_init(rdev); | 1637 | radeon_surface_init(rdev); |
1638 | /* Initialize clocks */ | ||
1635 | radeon_get_clock_info(rdev->ddev); | 1639 | radeon_get_clock_info(rdev->ddev); |
1636 | r = radeon_clocks_init(rdev); | 1640 | r = radeon_clocks_init(rdev); |
1637 | if (r) | 1641 | if (r) |
1638 | return r; | 1642 | return r; |
1643 | /* Initialize power management */ | ||
1644 | radeon_pm_init(rdev); | ||
1639 | /* Fence driver */ | 1645 | /* Fence driver */ |
1640 | r = radeon_fence_driver_init(rdev); | 1646 | r = radeon_fence_driver_init(rdev); |
1641 | if (r) | 1647 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c index dec501081608..5ea432347589 100644 --- a/drivers/gpu/drm/radeon/r600_blit.c +++ b/drivers/gpu/drm/radeon/r600_blit.c | |||
@@ -582,6 +582,8 @@ r600_blit_copy(struct drm_device *dev, | |||
582 | u64 vb_addr; | 582 | u64 vb_addr; |
583 | u32 *vb; | 583 | u32 *vb; |
584 | 584 | ||
585 | vb = r600_nomm_get_vb_ptr(dev); | ||
586 | |||
585 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { | 587 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { |
586 | max_bytes = 8192; | 588 | max_bytes = 8192; |
587 | 589 | ||
@@ -617,8 +619,8 @@ r600_blit_copy(struct drm_device *dev, | |||
617 | if (!dev_priv->blit_vb) | 619 | if (!dev_priv->blit_vb) |
618 | return; | 620 | return; |
619 | set_shaders(dev); | 621 | set_shaders(dev); |
622 | vb = r600_nomm_get_vb_ptr(dev); | ||
620 | } | 623 | } |
621 | vb = r600_nomm_get_vb_ptr(dev); | ||
622 | 624 | ||
623 | vb[0] = i2f(dst_x); | 625 | vb[0] = i2f(dst_x); |
624 | vb[1] = 0; | 626 | vb[1] = 0; |
@@ -706,8 +708,8 @@ r600_blit_copy(struct drm_device *dev, | |||
706 | return; | 708 | return; |
707 | 709 | ||
708 | set_shaders(dev); | 710 | set_shaders(dev); |
711 | vb = r600_nomm_get_vb_ptr(dev); | ||
709 | } | 712 | } |
710 | vb = r600_nomm_get_vb_ptr(dev); | ||
711 | 713 | ||
712 | vb[0] = i2f(dst_x / 4); | 714 | vb[0] = i2f(dst_x / 4); |
713 | vb[1] = 0; | 715 | vb[1] = 0; |
@@ -772,6 +774,7 @@ r600_blit_swap(struct drm_device *dev, | |||
772 | { | 774 | { |
773 | drm_radeon_private_t *dev_priv = dev->dev_private; | 775 | drm_radeon_private_t *dev_priv = dev->dev_private; |
774 | int cb_format, tex_format; | 776 | int cb_format, tex_format; |
777 | int sx2, sy2, dx2, dy2; | ||
775 | u64 vb_addr; | 778 | u64 vb_addr; |
776 | u32 *vb; | 779 | u32 *vb; |
777 | 780 | ||
@@ -786,16 +789,10 @@ r600_blit_swap(struct drm_device *dev, | |||
786 | } | 789 | } |
787 | vb = r600_nomm_get_vb_ptr(dev); | 790 | vb = r600_nomm_get_vb_ptr(dev); |
788 | 791 | ||
789 | if (cpp == 4) { | 792 | sx2 = sx + w; |
790 | cb_format = COLOR_8_8_8_8; | 793 | sy2 = sy + h; |
791 | tex_format = FMT_8_8_8_8; | 794 | dx2 = dx + w; |
792 | } else if (cpp == 2) { | 795 | dy2 = dy + h; |
793 | cb_format = COLOR_5_6_5; | ||
794 | tex_format = FMT_5_6_5; | ||
795 | } else { | ||
796 | cb_format = COLOR_8; | ||
797 | tex_format = FMT_8; | ||
798 | } | ||
799 | 796 | ||
800 | vb[0] = i2f(dx); | 797 | vb[0] = i2f(dx); |
801 | vb[1] = i2f(dy); | 798 | vb[1] = i2f(dy); |
@@ -803,31 +800,46 @@ r600_blit_swap(struct drm_device *dev, | |||
803 | vb[3] = i2f(sy); | 800 | vb[3] = i2f(sy); |
804 | 801 | ||
805 | vb[4] = i2f(dx); | 802 | vb[4] = i2f(dx); |
806 | vb[5] = i2f(dy + h); | 803 | vb[5] = i2f(dy2); |
807 | vb[6] = i2f(sx); | 804 | vb[6] = i2f(sx); |
808 | vb[7] = i2f(sy + h); | 805 | vb[7] = i2f(sy2); |
806 | |||
807 | vb[8] = i2f(dx2); | ||
808 | vb[9] = i2f(dy2); | ||
809 | vb[10] = i2f(sx2); | ||
810 | vb[11] = i2f(sy2); | ||
809 | 811 | ||
810 | vb[8] = i2f(dx + w); | 812 | switch(cpp) { |
811 | vb[9] = i2f(dy + h); | 813 | case 4: |
812 | vb[10] = i2f(sx + w); | 814 | cb_format = COLOR_8_8_8_8; |
813 | vb[11] = i2f(sy + h); | 815 | tex_format = FMT_8_8_8_8; |
816 | break; | ||
817 | case 2: | ||
818 | cb_format = COLOR_5_6_5; | ||
819 | tex_format = FMT_5_6_5; | ||
820 | break; | ||
821 | default: | ||
822 | cb_format = COLOR_8; | ||
823 | tex_format = FMT_8; | ||
824 | break; | ||
825 | } | ||
814 | 826 | ||
815 | /* src */ | 827 | /* src */ |
816 | set_tex_resource(dev_priv, tex_format, | 828 | set_tex_resource(dev_priv, tex_format, |
817 | src_pitch / cpp, | 829 | src_pitch / cpp, |
818 | sy + h, src_pitch / cpp, | 830 | sy2, src_pitch / cpp, |
819 | src_gpu_addr); | 831 | src_gpu_addr); |
820 | 832 | ||
821 | cp_set_surface_sync(dev_priv, | 833 | cp_set_surface_sync(dev_priv, |
822 | R600_TC_ACTION_ENA, (src_pitch * (sy + h)), src_gpu_addr); | 834 | R600_TC_ACTION_ENA, src_pitch * sy2, src_gpu_addr); |
823 | 835 | ||
824 | /* dst */ | 836 | /* dst */ |
825 | set_render_target(dev_priv, cb_format, | 837 | set_render_target(dev_priv, cb_format, |
826 | dst_pitch / cpp, dy + h, | 838 | dst_pitch / cpp, dy2, |
827 | dst_gpu_addr); | 839 | dst_gpu_addr); |
828 | 840 | ||
829 | /* scissors */ | 841 | /* scissors */ |
830 | set_scissors(dev_priv, dx, dy, dx + w, dy + h); | 842 | set_scissors(dev_priv, dx, dy, dx2, dy2); |
831 | 843 | ||
832 | /* Vertex buffer setup */ | 844 | /* Vertex buffer setup */ |
833 | vb_addr = dev_priv->gart_buffers_offset + | 845 | vb_addr = dev_priv->gart_buffers_offset + |
@@ -840,7 +852,7 @@ r600_blit_swap(struct drm_device *dev, | |||
840 | 852 | ||
841 | cp_set_surface_sync(dev_priv, | 853 | cp_set_surface_sync(dev_priv, |
842 | R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, | 854 | R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, |
843 | dst_pitch * (dy + h), dst_gpu_addr); | 855 | dst_pitch * dy2, dst_gpu_addr); |
844 | 856 | ||
845 | dev_priv->blit_vb->used += 12 * 4; | 857 | dev_priv->blit_vb->used += 12 * 4; |
846 | } | 858 | } |
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index 93108bb31d1d..dbf716e1fbf3 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c | |||
@@ -368,7 +368,7 @@ set_default_state(struct radeon_device *rdev) | |||
368 | if ((rdev->family == CHIP_RV610) || | 368 | if ((rdev->family == CHIP_RV610) || |
369 | (rdev->family == CHIP_RV620) || | 369 | (rdev->family == CHIP_RV620) || |
370 | (rdev->family == CHIP_RS780) || | 370 | (rdev->family == CHIP_RS780) || |
371 | (rdev->family == CHIP_RS780) || | 371 | (rdev->family == CHIP_RS880) || |
372 | (rdev->family == CHIP_RV710)) | 372 | (rdev->family == CHIP_RV710)) |
373 | sq_config = 0; | 373 | sq_config = 0; |
374 | else | 374 | else |
@@ -610,6 +610,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev, | |||
610 | 610 | ||
611 | DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr, | 611 | DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr, |
612 | size_bytes, rdev->r600_blit.vb_used); | 612 | size_bytes, rdev->r600_blit.vb_used); |
613 | vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used); | ||
613 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { | 614 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { |
614 | max_bytes = 8192; | 615 | max_bytes = 8192; |
615 | 616 | ||
@@ -652,7 +653,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev, | |||
652 | vb = r600_nomm_get_vb_ptr(dev); | 653 | vb = r600_nomm_get_vb_ptr(dev); |
653 | #endif | 654 | #endif |
654 | } | 655 | } |
655 | vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used); | ||
656 | 656 | ||
657 | vb[0] = i2f(dst_x); | 657 | vb[0] = i2f(dst_x); |
658 | vb[1] = 0; | 658 | vb[1] = 0; |
@@ -747,7 +747,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev, | |||
747 | vb = r600_nomm_get_vb_ptr(dev); | 747 | vb = r600_nomm_get_vb_ptr(dev); |
748 | } | 748 | } |
749 | #endif | 749 | #endif |
750 | vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used); | ||
751 | 750 | ||
752 | vb[0] = i2f(dst_x / 4); | 751 | vb[0] = i2f(dst_x / 4); |
753 | vb[1] = 0; | 752 | vb[1] = 0; |
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 17e42195c632..0d820764f340 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
@@ -466,6 +466,23 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
466 | for (i = 0; i < pkt->count; i++) { | 466 | for (i = 0; i < pkt->count; i++) { |
467 | reg = start_reg + (4 * i); | 467 | reg = start_reg + (4 * i); |
468 | switch (reg) { | 468 | switch (reg) { |
469 | case SQ_ESGS_RING_BASE: | ||
470 | case SQ_GSVS_RING_BASE: | ||
471 | case SQ_ESTMP_RING_BASE: | ||
472 | case SQ_GSTMP_RING_BASE: | ||
473 | case SQ_VSTMP_RING_BASE: | ||
474 | case SQ_PSTMP_RING_BASE: | ||
475 | case SQ_FBUF_RING_BASE: | ||
476 | case SQ_REDUC_RING_BASE: | ||
477 | case SX_MEMORY_EXPORT_BASE: | ||
478 | r = r600_cs_packet_next_reloc(p, &reloc); | ||
479 | if (r) { | ||
480 | DRM_ERROR("bad SET_CONFIG_REG " | ||
481 | "0x%04X\n", reg); | ||
482 | return -EINVAL; | ||
483 | } | ||
484 | ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); | ||
485 | break; | ||
469 | case CP_COHER_BASE: | 486 | case CP_COHER_BASE: |
470 | /* use PACKET3_SURFACE_SYNC */ | 487 | /* use PACKET3_SURFACE_SYNC */ |
471 | return -EINVAL; | 488 | return -EINVAL; |
@@ -487,6 +504,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
487 | reg = start_reg + (4 * i); | 504 | reg = start_reg + (4 * i); |
488 | switch (reg) { | 505 | switch (reg) { |
489 | case DB_DEPTH_BASE: | 506 | case DB_DEPTH_BASE: |
507 | case DB_HTILE_DATA_BASE: | ||
490 | case CB_COLOR0_BASE: | 508 | case CB_COLOR0_BASE: |
491 | case CB_COLOR1_BASE: | 509 | case CB_COLOR1_BASE: |
492 | case CB_COLOR2_BASE: | 510 | case CB_COLOR2_BASE: |
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index 9b64d47f1f82..27ab428b149b 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -119,6 +119,7 @@ | |||
119 | #define DB_DEBUG 0x9830 | 119 | #define DB_DEBUG 0x9830 |
120 | #define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31) | 120 | #define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31) |
121 | #define DB_DEPTH_BASE 0x2800C | 121 | #define DB_DEPTH_BASE 0x2800C |
122 | #define DB_HTILE_DATA_BASE 0x28014 | ||
122 | #define DB_WATERMARKS 0x9838 | 123 | #define DB_WATERMARKS 0x9838 |
123 | #define DEPTH_FREE(x) ((x) << 0) | 124 | #define DEPTH_FREE(x) ((x) << 0) |
124 | #define DEPTH_FLUSH(x) ((x) << 5) | 125 | #define DEPTH_FLUSH(x) ((x) << 5) |
@@ -171,6 +172,14 @@ | |||
171 | #define SQ_STACK_RESOURCE_MGMT_2 0x8c14 | 172 | #define SQ_STACK_RESOURCE_MGMT_2 0x8c14 |
172 | # define NUM_GS_STACK_ENTRIES(x) ((x) << 0) | 173 | # define NUM_GS_STACK_ENTRIES(x) ((x) << 0) |
173 | # define NUM_ES_STACK_ENTRIES(x) ((x) << 16) | 174 | # define NUM_ES_STACK_ENTRIES(x) ((x) << 16) |
175 | #define SQ_ESGS_RING_BASE 0x8c40 | ||
176 | #define SQ_GSVS_RING_BASE 0x8c48 | ||
177 | #define SQ_ESTMP_RING_BASE 0x8c50 | ||
178 | #define SQ_GSTMP_RING_BASE 0x8c58 | ||
179 | #define SQ_VSTMP_RING_BASE 0x8c60 | ||
180 | #define SQ_PSTMP_RING_BASE 0x8c68 | ||
181 | #define SQ_FBUF_RING_BASE 0x8c70 | ||
182 | #define SQ_REDUC_RING_BASE 0x8c78 | ||
174 | 183 | ||
175 | #define GRBM_CNTL 0x8000 | 184 | #define GRBM_CNTL 0x8000 |
176 | # define GRBM_READ_TIMEOUT(x) ((x) << 0) | 185 | # define GRBM_READ_TIMEOUT(x) ((x) << 0) |
@@ -271,6 +280,10 @@ | |||
271 | #define PCIE_PORT_INDEX 0x0038 | 280 | #define PCIE_PORT_INDEX 0x0038 |
272 | #define PCIE_PORT_DATA 0x003C | 281 | #define PCIE_PORT_DATA 0x003C |
273 | 282 | ||
283 | #define CHMAP 0x2004 | ||
284 | #define NOOFCHAN_SHIFT 12 | ||
285 | #define NOOFCHAN_MASK 0x00003000 | ||
286 | |||
274 | #define RAMCFG 0x2408 | 287 | #define RAMCFG 0x2408 |
275 | #define NOOFBANK_SHIFT 0 | 288 | #define NOOFBANK_SHIFT 0 |
276 | #define NOOFBANK_MASK 0x00000001 | 289 | #define NOOFBANK_MASK 0x00000001 |
@@ -352,6 +365,7 @@ | |||
352 | 365 | ||
353 | 366 | ||
354 | #define SX_MISC 0x28350 | 367 | #define SX_MISC 0x28350 |
368 | #define SX_MEMORY_EXPORT_BASE 0x9010 | ||
355 | #define SX_DEBUG_1 0x9054 | 369 | #define SX_DEBUG_1 0x9054 |
356 | #define SMX_EVENT_RELEASE (1 << 0) | 370 | #define SMX_EVENT_RELEASE (1 << 0) |
357 | #define ENABLE_NEW_SMX_ADDRESS (1 << 16) | 371 | #define ENABLE_NEW_SMX_ADDRESS (1 << 16) |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 5ab35b81c86b..757f5cd37744 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -139,6 +139,10 @@ struct radeon_clock { | |||
139 | uint32_t default_sclk; | 139 | uint32_t default_sclk; |
140 | }; | 140 | }; |
141 | 141 | ||
142 | /* | ||
143 | * Power management | ||
144 | */ | ||
145 | int radeon_pm_init(struct radeon_device *rdev); | ||
142 | 146 | ||
143 | /* | 147 | /* |
144 | * Fences. | 148 | * Fences. |
@@ -276,6 +280,8 @@ union radeon_gart_table { | |||
276 | struct radeon_gart_table_vram vram; | 280 | struct radeon_gart_table_vram vram; |
277 | }; | 281 | }; |
278 | 282 | ||
283 | #define RADEON_GPU_PAGE_SIZE 4096 | ||
284 | |||
279 | struct radeon_gart { | 285 | struct radeon_gart { |
280 | dma_addr_t table_addr; | 286 | dma_addr_t table_addr; |
281 | unsigned num_gpu_pages; | 287 | unsigned num_gpu_pages; |
@@ -621,7 +627,9 @@ struct radeon_asic { | |||
621 | uint64_t dst_offset, | 627 | uint64_t dst_offset, |
622 | unsigned num_pages, | 628 | unsigned num_pages, |
623 | struct radeon_fence *fence); | 629 | struct radeon_fence *fence); |
630 | uint32_t (*get_engine_clock)(struct radeon_device *rdev); | ||
624 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); | 631 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); |
632 | uint32_t (*get_memory_clock)(struct radeon_device *rdev); | ||
625 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); | 633 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); |
626 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); | 634 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); |
627 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); | 635 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); |
@@ -783,6 +791,7 @@ struct radeon_device { | |||
783 | const struct firmware *me_fw; /* all family ME firmware */ | 791 | const struct firmware *me_fw; /* all family ME firmware */ |
784 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ | 792 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ |
785 | struct r600_blit r600_blit; | 793 | struct r600_blit r600_blit; |
794 | int msi_enabled; /* msi enabled */ | ||
786 | }; | 795 | }; |
787 | 796 | ||
788 | int radeon_device_init(struct radeon_device *rdev, | 797 | int radeon_device_init(struct radeon_device *rdev, |
@@ -952,7 +961,9 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v) | |||
952 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) | 961 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) |
953 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) | 962 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) |
954 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) | 963 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) |
964 | #define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev)) | ||
955 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 965 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
966 | #define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev)) | ||
956 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 967 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
957 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) | 968 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) |
958 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) | 969 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index c3532c7a6f3f..c18fbee387d7 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -31,10 +31,13 @@ | |||
31 | /* | 31 | /* |
32 | * common functions | 32 | * common functions |
33 | */ | 33 | */ |
34 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); | ||
34 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); | 35 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
35 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); | 36 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); |
36 | 37 | ||
38 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); | ||
37 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); | 39 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
40 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); | ||
38 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); | 41 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); |
39 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); | 42 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
40 | 43 | ||
@@ -95,7 +98,9 @@ static struct radeon_asic r100_asic = { | |||
95 | .copy_blit = &r100_copy_blit, | 98 | .copy_blit = &r100_copy_blit, |
96 | .copy_dma = NULL, | 99 | .copy_dma = NULL, |
97 | .copy = &r100_copy_blit, | 100 | .copy = &r100_copy_blit, |
101 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
98 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 102 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
103 | .get_memory_clock = NULL, | ||
99 | .set_memory_clock = NULL, | 104 | .set_memory_clock = NULL, |
100 | .set_pcie_lanes = NULL, | 105 | .set_pcie_lanes = NULL, |
101 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 106 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -148,7 +153,9 @@ static struct radeon_asic r300_asic = { | |||
148 | .copy_blit = &r100_copy_blit, | 153 | .copy_blit = &r100_copy_blit, |
149 | .copy_dma = &r300_copy_dma, | 154 | .copy_dma = &r300_copy_dma, |
150 | .copy = &r100_copy_blit, | 155 | .copy = &r100_copy_blit, |
156 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
151 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 157 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
158 | .get_memory_clock = NULL, | ||
152 | .set_memory_clock = NULL, | 159 | .set_memory_clock = NULL, |
153 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 160 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
154 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 161 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -185,7 +192,9 @@ static struct radeon_asic r420_asic = { | |||
185 | .copy_blit = &r100_copy_blit, | 192 | .copy_blit = &r100_copy_blit, |
186 | .copy_dma = &r300_copy_dma, | 193 | .copy_dma = &r300_copy_dma, |
187 | .copy = &r100_copy_blit, | 194 | .copy = &r100_copy_blit, |
195 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
188 | .set_engine_clock = &radeon_atom_set_engine_clock, | 196 | .set_engine_clock = &radeon_atom_set_engine_clock, |
197 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
189 | .set_memory_clock = &radeon_atom_set_memory_clock, | 198 | .set_memory_clock = &radeon_atom_set_memory_clock, |
190 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 199 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
191 | .set_clock_gating = &radeon_atom_set_clock_gating, | 200 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -227,7 +236,9 @@ static struct radeon_asic rs400_asic = { | |||
227 | .copy_blit = &r100_copy_blit, | 236 | .copy_blit = &r100_copy_blit, |
228 | .copy_dma = &r300_copy_dma, | 237 | .copy_dma = &r300_copy_dma, |
229 | .copy = &r100_copy_blit, | 238 | .copy = &r100_copy_blit, |
239 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
230 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 240 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
241 | .get_memory_clock = NULL, | ||
231 | .set_memory_clock = NULL, | 242 | .set_memory_clock = NULL, |
232 | .set_pcie_lanes = NULL, | 243 | .set_pcie_lanes = NULL, |
233 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 244 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -273,7 +284,9 @@ static struct radeon_asic rs600_asic = { | |||
273 | .copy_blit = &r100_copy_blit, | 284 | .copy_blit = &r100_copy_blit, |
274 | .copy_dma = &r300_copy_dma, | 285 | .copy_dma = &r300_copy_dma, |
275 | .copy = &r100_copy_blit, | 286 | .copy = &r100_copy_blit, |
287 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
276 | .set_engine_clock = &radeon_atom_set_engine_clock, | 288 | .set_engine_clock = &radeon_atom_set_engine_clock, |
289 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
277 | .set_memory_clock = &radeon_atom_set_memory_clock, | 290 | .set_memory_clock = &radeon_atom_set_memory_clock, |
278 | .set_pcie_lanes = NULL, | 291 | .set_pcie_lanes = NULL, |
279 | .set_clock_gating = &radeon_atom_set_clock_gating, | 292 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -312,7 +325,9 @@ static struct radeon_asic rs690_asic = { | |||
312 | .copy_blit = &r100_copy_blit, | 325 | .copy_blit = &r100_copy_blit, |
313 | .copy_dma = &r300_copy_dma, | 326 | .copy_dma = &r300_copy_dma, |
314 | .copy = &r300_copy_dma, | 327 | .copy = &r300_copy_dma, |
328 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
315 | .set_engine_clock = &radeon_atom_set_engine_clock, | 329 | .set_engine_clock = &radeon_atom_set_engine_clock, |
330 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
316 | .set_memory_clock = &radeon_atom_set_memory_clock, | 331 | .set_memory_clock = &radeon_atom_set_memory_clock, |
317 | .set_pcie_lanes = NULL, | 332 | .set_pcie_lanes = NULL, |
318 | .set_clock_gating = &radeon_atom_set_clock_gating, | 333 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -357,7 +372,9 @@ static struct radeon_asic rv515_asic = { | |||
357 | .copy_blit = &r100_copy_blit, | 372 | .copy_blit = &r100_copy_blit, |
358 | .copy_dma = &r300_copy_dma, | 373 | .copy_dma = &r300_copy_dma, |
359 | .copy = &r100_copy_blit, | 374 | .copy = &r100_copy_blit, |
375 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
360 | .set_engine_clock = &radeon_atom_set_engine_clock, | 376 | .set_engine_clock = &radeon_atom_set_engine_clock, |
377 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
361 | .set_memory_clock = &radeon_atom_set_memory_clock, | 378 | .set_memory_clock = &radeon_atom_set_memory_clock, |
362 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 379 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
363 | .set_clock_gating = &radeon_atom_set_clock_gating, | 380 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -393,7 +410,9 @@ static struct radeon_asic r520_asic = { | |||
393 | .copy_blit = &r100_copy_blit, | 410 | .copy_blit = &r100_copy_blit, |
394 | .copy_dma = &r300_copy_dma, | 411 | .copy_dma = &r300_copy_dma, |
395 | .copy = &r100_copy_blit, | 412 | .copy = &r100_copy_blit, |
413 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
396 | .set_engine_clock = &radeon_atom_set_engine_clock, | 414 | .set_engine_clock = &radeon_atom_set_engine_clock, |
415 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
397 | .set_memory_clock = &radeon_atom_set_memory_clock, | 416 | .set_memory_clock = &radeon_atom_set_memory_clock, |
398 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 417 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
399 | .set_clock_gating = &radeon_atom_set_clock_gating, | 418 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -456,7 +475,9 @@ static struct radeon_asic r600_asic = { | |||
456 | .copy_blit = &r600_copy_blit, | 475 | .copy_blit = &r600_copy_blit, |
457 | .copy_dma = &r600_copy_blit, | 476 | .copy_dma = &r600_copy_blit, |
458 | .copy = &r600_copy_blit, | 477 | .copy = &r600_copy_blit, |
478 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
459 | .set_engine_clock = &radeon_atom_set_engine_clock, | 479 | .set_engine_clock = &radeon_atom_set_engine_clock, |
480 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
460 | .set_memory_clock = &radeon_atom_set_memory_clock, | 481 | .set_memory_clock = &radeon_atom_set_memory_clock, |
461 | .set_pcie_lanes = NULL, | 482 | .set_pcie_lanes = NULL, |
462 | .set_clock_gating = &radeon_atom_set_clock_gating, | 483 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -493,7 +514,9 @@ static struct radeon_asic rv770_asic = { | |||
493 | .copy_blit = &r600_copy_blit, | 514 | .copy_blit = &r600_copy_blit, |
494 | .copy_dma = &r600_copy_blit, | 515 | .copy_dma = &r600_copy_blit, |
495 | .copy = &r600_copy_blit, | 516 | .copy = &r600_copy_blit, |
517 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
496 | .set_engine_clock = &radeon_atom_set_engine_clock, | 518 | .set_engine_clock = &radeon_atom_set_engine_clock, |
519 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
497 | .set_memory_clock = &radeon_atom_set_memory_clock, | 520 | .set_memory_clock = &radeon_atom_set_memory_clock, |
498 | .set_pcie_lanes = NULL, | 521 | .set_pcie_lanes = NULL, |
499 | .set_clock_gating = &radeon_atom_set_clock_gating, | 522 | .set_clock_gating = &radeon_atom_set_clock_gating, |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 5b6c08cee40e..2ed88a820935 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -46,7 +46,8 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
46 | uint32_t supported_device, | 46 | uint32_t supported_device, |
47 | int connector_type, | 47 | int connector_type, |
48 | struct radeon_i2c_bus_rec *i2c_bus, | 48 | struct radeon_i2c_bus_rec *i2c_bus, |
49 | bool linkb, uint32_t igp_lane_info); | 49 | bool linkb, uint32_t igp_lane_info, |
50 | uint16_t connector_object_id); | ||
50 | 51 | ||
51 | /* from radeon_legacy_encoder.c */ | 52 | /* from radeon_legacy_encoder.c */ |
52 | extern void | 53 | extern void |
@@ -193,6 +194,23 @@ const int supported_devices_connector_convert[] = { | |||
193 | DRM_MODE_CONNECTOR_DisplayPort | 194 | DRM_MODE_CONNECTOR_DisplayPort |
194 | }; | 195 | }; |
195 | 196 | ||
197 | const uint16_t supported_devices_connector_object_id_convert[] = { | ||
198 | CONNECTOR_OBJECT_ID_NONE, | ||
199 | CONNECTOR_OBJECT_ID_VGA, | ||
200 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, /* not all boards support DL */ | ||
201 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D, /* not all boards support DL */ | ||
202 | CONNECTOR_OBJECT_ID_VGA, /* technically DVI-A */ | ||
203 | CONNECTOR_OBJECT_ID_COMPOSITE, | ||
204 | CONNECTOR_OBJECT_ID_SVIDEO, | ||
205 | CONNECTOR_OBJECT_ID_LVDS, | ||
206 | CONNECTOR_OBJECT_ID_9PIN_DIN, | ||
207 | CONNECTOR_OBJECT_ID_9PIN_DIN, | ||
208 | CONNECTOR_OBJECT_ID_DISPLAYPORT, | ||
209 | CONNECTOR_OBJECT_ID_HDMI_TYPE_A, | ||
210 | CONNECTOR_OBJECT_ID_HDMI_TYPE_B, | ||
211 | CONNECTOR_OBJECT_ID_SVIDEO | ||
212 | }; | ||
213 | |||
196 | const int object_connector_convert[] = { | 214 | const int object_connector_convert[] = { |
197 | DRM_MODE_CONNECTOR_Unknown, | 215 | DRM_MODE_CONNECTOR_Unknown, |
198 | DRM_MODE_CONNECTOR_DVII, | 216 | DRM_MODE_CONNECTOR_DVII, |
@@ -229,7 +247,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
229 | ATOM_OBJECT_HEADER *obj_header; | 247 | ATOM_OBJECT_HEADER *obj_header; |
230 | int i, j, path_size, device_support; | 248 | int i, j, path_size, device_support; |
231 | int connector_type; | 249 | int connector_type; |
232 | uint16_t igp_lane_info, conn_id; | 250 | uint16_t igp_lane_info, conn_id, connector_object_id; |
233 | bool linkb; | 251 | bool linkb; |
234 | struct radeon_i2c_bus_rec ddc_bus; | 252 | struct radeon_i2c_bus_rec ddc_bus; |
235 | 253 | ||
@@ -277,7 +295,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
277 | ATOM_DEVICE_CV_SUPPORT) | 295 | ATOM_DEVICE_CV_SUPPORT) |
278 | continue; | 296 | continue; |
279 | 297 | ||
280 | if ((rdev->family == CHIP_RS780) && | 298 | /* IGP chips */ |
299 | if ((rdev->flags & RADEON_IS_IGP) && | ||
281 | (con_obj_id == | 300 | (con_obj_id == |
282 | CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) { | 301 | CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) { |
283 | uint16_t igp_offset = 0; | 302 | uint16_t igp_offset = 0; |
@@ -311,6 +330,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
311 | connector_type = | 330 | connector_type = |
312 | object_connector_convert | 331 | object_connector_convert |
313 | [ct]; | 332 | [ct]; |
333 | connector_object_id = ct; | ||
314 | igp_lane_info = | 334 | igp_lane_info = |
315 | slot_config & 0xffff; | 335 | slot_config & 0xffff; |
316 | } else | 336 | } else |
@@ -321,6 +341,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
321 | igp_lane_info = 0; | 341 | igp_lane_info = 0; |
322 | connector_type = | 342 | connector_type = |
323 | object_connector_convert[con_obj_id]; | 343 | object_connector_convert[con_obj_id]; |
344 | connector_object_id = con_obj_id; | ||
324 | } | 345 | } |
325 | 346 | ||
326 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) | 347 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
@@ -425,7 +446,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
425 | le16_to_cpu(path-> | 446 | le16_to_cpu(path-> |
426 | usDeviceTag), | 447 | usDeviceTag), |
427 | connector_type, &ddc_bus, | 448 | connector_type, &ddc_bus, |
428 | linkb, igp_lane_info); | 449 | linkb, igp_lane_info, |
450 | connector_object_id); | ||
429 | 451 | ||
430 | } | 452 | } |
431 | } | 453 | } |
@@ -435,6 +457,45 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
435 | return true; | 457 | return true; |
436 | } | 458 | } |
437 | 459 | ||
460 | static uint16_t atombios_get_connector_object_id(struct drm_device *dev, | ||
461 | int connector_type, | ||
462 | uint16_t devices) | ||
463 | { | ||
464 | struct radeon_device *rdev = dev->dev_private; | ||
465 | |||
466 | if (rdev->flags & RADEON_IS_IGP) { | ||
467 | return supported_devices_connector_object_id_convert | ||
468 | [connector_type]; | ||
469 | } else if (((connector_type == DRM_MODE_CONNECTOR_DVII) || | ||
470 | (connector_type == DRM_MODE_CONNECTOR_DVID)) && | ||
471 | (devices & ATOM_DEVICE_DFP2_SUPPORT)) { | ||
472 | struct radeon_mode_info *mode_info = &rdev->mode_info; | ||
473 | struct atom_context *ctx = mode_info->atom_context; | ||
474 | int index = GetIndexIntoMasterTable(DATA, XTMDS_Info); | ||
475 | uint16_t size, data_offset; | ||
476 | uint8_t frev, crev; | ||
477 | ATOM_XTMDS_INFO *xtmds; | ||
478 | |||
479 | atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset); | ||
480 | xtmds = (ATOM_XTMDS_INFO *)(ctx->bios + data_offset); | ||
481 | |||
482 | if (xtmds->ucSupportedLink & ATOM_XTMDS_SUPPORTED_DUALLINK) { | ||
483 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | ||
484 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I; | ||
485 | else | ||
486 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D; | ||
487 | } else { | ||
488 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | ||
489 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
490 | else | ||
491 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D; | ||
492 | } | ||
493 | } else { | ||
494 | return supported_devices_connector_object_id_convert | ||
495 | [connector_type]; | ||
496 | } | ||
497 | } | ||
498 | |||
438 | struct bios_connector { | 499 | struct bios_connector { |
439 | bool valid; | 500 | bool valid; |
440 | uint16_t line_mux; | 501 | uint16_t line_mux; |
@@ -593,14 +654,20 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
593 | 654 | ||
594 | /* add the connectors */ | 655 | /* add the connectors */ |
595 | for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) { | 656 | for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) { |
596 | if (bios_connectors[i].valid) | 657 | if (bios_connectors[i].valid) { |
658 | uint16_t connector_object_id = | ||
659 | atombios_get_connector_object_id(dev, | ||
660 | bios_connectors[i].connector_type, | ||
661 | bios_connectors[i].devices); | ||
597 | radeon_add_atom_connector(dev, | 662 | radeon_add_atom_connector(dev, |
598 | bios_connectors[i].line_mux, | 663 | bios_connectors[i].line_mux, |
599 | bios_connectors[i].devices, | 664 | bios_connectors[i].devices, |
600 | bios_connectors[i]. | 665 | bios_connectors[i]. |
601 | connector_type, | 666 | connector_type, |
602 | &bios_connectors[i].ddc_bus, | 667 | &bios_connectors[i].ddc_bus, |
603 | false, 0); | 668 | false, 0, |
669 | connector_object_id); | ||
670 | } | ||
604 | } | 671 | } |
605 | 672 | ||
606 | radeon_link_encoder_connector(dev); | 673 | radeon_link_encoder_connector(dev); |
@@ -641,8 +708,12 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
641 | le16_to_cpu(firmware_info->info.usReferenceClock); | 708 | le16_to_cpu(firmware_info->info.usReferenceClock); |
642 | p1pll->reference_div = 0; | 709 | p1pll->reference_div = 0; |
643 | 710 | ||
644 | p1pll->pll_out_min = | 711 | if (crev < 2) |
645 | le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output); | 712 | p1pll->pll_out_min = |
713 | le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output); | ||
714 | else | ||
715 | p1pll->pll_out_min = | ||
716 | le32_to_cpu(firmware_info->info_12.ulMinPixelClockPLL_Output); | ||
646 | p1pll->pll_out_max = | 717 | p1pll->pll_out_max = |
647 | le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); | 718 | le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); |
648 | 719 | ||
@@ -651,6 +722,16 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
651 | p1pll->pll_out_min = 64800; | 722 | p1pll->pll_out_min = 64800; |
652 | else | 723 | else |
653 | p1pll->pll_out_min = 20000; | 724 | p1pll->pll_out_min = 20000; |
725 | } else if (p1pll->pll_out_min > 64800) { | ||
726 | /* Limiting the pll output range is a good thing generally as | ||
727 | * it limits the number of possible pll combinations for a given | ||
728 | * frequency presumably to the ones that work best on each card. | ||
729 | * However, certain duallink DVI monitors seem to like | ||
730 | * pll combinations that would be limited by this at least on | ||
731 | * pre-DCE 3.0 r6xx hardware. This might need to be adjusted per | ||
732 | * family. | ||
733 | */ | ||
734 | p1pll->pll_out_min = 64800; | ||
654 | } | 735 | } |
655 | 736 | ||
656 | p1pll->pll_in_min = | 737 | p1pll->pll_in_min = |
@@ -767,6 +848,46 @@ bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, | |||
767 | return false; | 848 | return false; |
768 | } | 849 | } |
769 | 850 | ||
851 | static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct | ||
852 | radeon_encoder | ||
853 | *encoder, | ||
854 | int id) | ||
855 | { | ||
856 | struct drm_device *dev = encoder->base.dev; | ||
857 | struct radeon_device *rdev = dev->dev_private; | ||
858 | struct radeon_mode_info *mode_info = &rdev->mode_info; | ||
859 | int index = GetIndexIntoMasterTable(DATA, PPLL_SS_Info); | ||
860 | uint16_t data_offset; | ||
861 | struct _ATOM_SPREAD_SPECTRUM_INFO *ss_info; | ||
862 | uint8_t frev, crev; | ||
863 | struct radeon_atom_ss *ss = NULL; | ||
864 | |||
865 | if (id > ATOM_MAX_SS_ENTRY) | ||
866 | return NULL; | ||
867 | |||
868 | atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, | ||
869 | &crev, &data_offset); | ||
870 | |||
871 | ss_info = | ||
872 | (struct _ATOM_SPREAD_SPECTRUM_INFO *)(mode_info->atom_context->bios + data_offset); | ||
873 | |||
874 | if (ss_info) { | ||
875 | ss = | ||
876 | kzalloc(sizeof(struct radeon_atom_ss), GFP_KERNEL); | ||
877 | |||
878 | if (!ss) | ||
879 | return NULL; | ||
880 | |||
881 | ss->percentage = le16_to_cpu(ss_info->asSS_Info[id].usSpreadSpectrumPercentage); | ||
882 | ss->type = ss_info->asSS_Info[id].ucSpreadSpectrumType; | ||
883 | ss->step = ss_info->asSS_Info[id].ucSS_Step; | ||
884 | ss->delay = ss_info->asSS_Info[id].ucSS_Delay; | ||
885 | ss->range = ss_info->asSS_Info[id].ucSS_Range; | ||
886 | ss->refdiv = ss_info->asSS_Info[id].ucRecommendedRef_Div; | ||
887 | } | ||
888 | return ss; | ||
889 | } | ||
890 | |||
770 | union lvds_info { | 891 | union lvds_info { |
771 | struct _ATOM_LVDS_INFO info; | 892 | struct _ATOM_LVDS_INFO info; |
772 | struct _ATOM_LVDS_INFO_V12 info_12; | 893 | struct _ATOM_LVDS_INFO_V12 info_12; |
@@ -798,27 +919,31 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
798 | if (!lvds) | 919 | if (!lvds) |
799 | return NULL; | 920 | return NULL; |
800 | 921 | ||
801 | lvds->native_mode.dotclock = | 922 | lvds->native_mode.clock = |
802 | le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10; | 923 | le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10; |
803 | lvds->native_mode.panel_xres = | 924 | lvds->native_mode.hdisplay = |
804 | le16_to_cpu(lvds_info->info.sLCDTiming.usHActive); | 925 | le16_to_cpu(lvds_info->info.sLCDTiming.usHActive); |
805 | lvds->native_mode.panel_yres = | 926 | lvds->native_mode.vdisplay = |
806 | le16_to_cpu(lvds_info->info.sLCDTiming.usVActive); | 927 | le16_to_cpu(lvds_info->info.sLCDTiming.usVActive); |
807 | lvds->native_mode.hblank = | 928 | lvds->native_mode.htotal = lvds->native_mode.hdisplay + |
808 | le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time); | 929 | le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time); |
809 | lvds->native_mode.hoverplus = | 930 | lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + |
810 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset); | 931 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset); |
811 | lvds->native_mode.hsync_width = | 932 | lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + |
812 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth); | 933 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth); |
813 | lvds->native_mode.vblank = | 934 | lvds->native_mode.vtotal = lvds->native_mode.vdisplay + |
814 | le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time); | 935 | le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time); |
815 | lvds->native_mode.voverplus = | 936 | lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + |
816 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncOffset); | 937 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); |
817 | lvds->native_mode.vsync_width = | 938 | lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + |
818 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); | 939 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); |
819 | lvds->panel_pwr_delay = | 940 | lvds->panel_pwr_delay = |
820 | le16_to_cpu(lvds_info->info.usOffDelayInMs); | 941 | le16_to_cpu(lvds_info->info.usOffDelayInMs); |
821 | lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; | 942 | lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; |
943 | /* set crtc values */ | ||
944 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); | ||
945 | |||
946 | lvds->ss = radeon_atombios_get_ss_info(encoder, lvds_info->info.ucSS_Id); | ||
822 | 947 | ||
823 | encoder->native_mode = lvds->native_mode; | 948 | encoder->native_mode = lvds->native_mode; |
824 | } | 949 | } |
@@ -857,8 +982,7 @@ radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder) | |||
857 | } | 982 | } |
858 | 983 | ||
859 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | 984 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, |
860 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing, | 985 | struct drm_display_mode *mode) |
861 | int32_t *pixel_clock) | ||
862 | { | 986 | { |
863 | struct radeon_mode_info *mode_info = &rdev->mode_info; | 987 | struct radeon_mode_info *mode_info = &rdev->mode_info; |
864 | ATOM_ANALOG_TV_INFO *tv_info; | 988 | ATOM_ANALOG_TV_INFO *tv_info; |
@@ -866,7 +990,7 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | |||
866 | ATOM_DTD_FORMAT *dtd_timings; | 990 | ATOM_DTD_FORMAT *dtd_timings; |
867 | int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); | 991 | int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); |
868 | u8 frev, crev; | 992 | u8 frev, crev; |
869 | uint16_t data_offset; | 993 | u16 data_offset, misc; |
870 | 994 | ||
871 | atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset); | 995 | atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset); |
872 | 996 | ||
@@ -876,28 +1000,37 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | |||
876 | if (index > MAX_SUPPORTED_TV_TIMING) | 1000 | if (index > MAX_SUPPORTED_TV_TIMING) |
877 | return false; | 1001 | return false; |
878 | 1002 | ||
879 | crtc_timing->usH_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total); | 1003 | mode->crtc_htotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total); |
880 | crtc_timing->usH_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp); | 1004 | mode->crtc_hdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp); |
881 | crtc_timing->usH_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); | 1005 | mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); |
882 | crtc_timing->usH_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth); | 1006 | mode->crtc_hsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart) + |
883 | 1007 | le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth); | |
884 | crtc_timing->usV_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total); | 1008 | |
885 | crtc_timing->usV_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp); | 1009 | mode->crtc_vtotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total); |
886 | crtc_timing->usV_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart); | 1010 | mode->crtc_vdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp); |
887 | crtc_timing->usV_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth); | 1011 | mode->crtc_vsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart); |
888 | 1012 | mode->crtc_vsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart) + | |
889 | crtc_timing->susModeMiscInfo = tv_info->aModeTimings[index].susModeMiscInfo; | 1013 | le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth); |
890 | 1014 | ||
891 | crtc_timing->ucOverscanRight = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanRight); | 1015 | mode->flags = 0; |
892 | crtc_timing->ucOverscanLeft = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanLeft); | 1016 | misc = le16_to_cpu(tv_info->aModeTimings[index].susModeMiscInfo.usAccess); |
893 | crtc_timing->ucOverscanBottom = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanBottom); | 1017 | if (misc & ATOM_VSYNC_POLARITY) |
894 | crtc_timing->ucOverscanTop = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanTop); | 1018 | mode->flags |= DRM_MODE_FLAG_NVSYNC; |
895 | *pixel_clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10; | 1019 | if (misc & ATOM_HSYNC_POLARITY) |
1020 | mode->flags |= DRM_MODE_FLAG_NHSYNC; | ||
1021 | if (misc & ATOM_COMPOSITESYNC) | ||
1022 | mode->flags |= DRM_MODE_FLAG_CSYNC; | ||
1023 | if (misc & ATOM_INTERLACE) | ||
1024 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | ||
1025 | if (misc & ATOM_DOUBLE_CLOCK_MODE) | ||
1026 | mode->flags |= DRM_MODE_FLAG_DBLSCAN; | ||
1027 | |||
1028 | mode->clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10; | ||
896 | 1029 | ||
897 | if (index == 1) { | 1030 | if (index == 1) { |
898 | /* PAL timings appear to have wrong values for totals */ | 1031 | /* PAL timings appear to have wrong values for totals */ |
899 | crtc_timing->usH_Total -= 1; | 1032 | mode->crtc_htotal -= 1; |
900 | crtc_timing->usV_Total -= 1; | 1033 | mode->crtc_vtotal -= 1; |
901 | } | 1034 | } |
902 | break; | 1035 | break; |
903 | case 2: | 1036 | case 2: |
@@ -906,17 +1039,36 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | |||
906 | return false; | 1039 | return false; |
907 | 1040 | ||
908 | dtd_timings = &tv_info_v1_2->aModeTimings[index]; | 1041 | dtd_timings = &tv_info_v1_2->aModeTimings[index]; |
909 | crtc_timing->usH_Total = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHBlanking_Time); | 1042 | mode->crtc_htotal = le16_to_cpu(dtd_timings->usHActive) + |
910 | crtc_timing->usH_Disp = le16_to_cpu(dtd_timings->usHActive); | 1043 | le16_to_cpu(dtd_timings->usHBlanking_Time); |
911 | crtc_timing->usH_SyncStart = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHSyncOffset); | 1044 | mode->crtc_hdisplay = le16_to_cpu(dtd_timings->usHActive); |
912 | crtc_timing->usH_SyncWidth = le16_to_cpu(dtd_timings->usHSyncWidth); | 1045 | mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) + |
913 | crtc_timing->usV_Total = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVBlanking_Time); | 1046 | le16_to_cpu(dtd_timings->usHSyncOffset); |
914 | crtc_timing->usV_Disp = le16_to_cpu(dtd_timings->usVActive); | 1047 | mode->crtc_hsync_end = mode->crtc_hsync_start + |
915 | crtc_timing->usV_SyncStart = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVSyncOffset); | 1048 | le16_to_cpu(dtd_timings->usHSyncWidth); |
916 | crtc_timing->usV_SyncWidth = le16_to_cpu(dtd_timings->usVSyncWidth); | 1049 | |
917 | 1050 | mode->crtc_vtotal = le16_to_cpu(dtd_timings->usVActive) + | |
918 | crtc_timing->susModeMiscInfo.usAccess = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess); | 1051 | le16_to_cpu(dtd_timings->usVBlanking_Time); |
919 | *pixel_clock = le16_to_cpu(dtd_timings->usPixClk) * 10; | 1052 | mode->crtc_vdisplay = le16_to_cpu(dtd_timings->usVActive); |
1053 | mode->crtc_vsync_start = le16_to_cpu(dtd_timings->usVActive) + | ||
1054 | le16_to_cpu(dtd_timings->usVSyncOffset); | ||
1055 | mode->crtc_vsync_end = mode->crtc_vsync_start + | ||
1056 | le16_to_cpu(dtd_timings->usVSyncWidth); | ||
1057 | |||
1058 | mode->flags = 0; | ||
1059 | misc = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess); | ||
1060 | if (misc & ATOM_VSYNC_POLARITY) | ||
1061 | mode->flags |= DRM_MODE_FLAG_NVSYNC; | ||
1062 | if (misc & ATOM_HSYNC_POLARITY) | ||
1063 | mode->flags |= DRM_MODE_FLAG_NHSYNC; | ||
1064 | if (misc & ATOM_COMPOSITESYNC) | ||
1065 | mode->flags |= DRM_MODE_FLAG_CSYNC; | ||
1066 | if (misc & ATOM_INTERLACE) | ||
1067 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | ||
1068 | if (misc & ATOM_DOUBLE_CLOCK_MODE) | ||
1069 | mode->flags |= DRM_MODE_FLAG_DBLSCAN; | ||
1070 | |||
1071 | mode->clock = le16_to_cpu(dtd_timings->usPixClk) * 10; | ||
920 | break; | 1072 | break; |
921 | } | 1073 | } |
922 | return true; | 1074 | return true; |
@@ -981,6 +1133,24 @@ void radeon_atom_static_pwrmgt_setup(struct radeon_device *rdev, int enable) | |||
981 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 1133 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
982 | } | 1134 | } |
983 | 1135 | ||
1136 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev) | ||
1137 | { | ||
1138 | GET_ENGINE_CLOCK_PS_ALLOCATION args; | ||
1139 | int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock); | ||
1140 | |||
1141 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1142 | return args.ulReturnEngineClock; | ||
1143 | } | ||
1144 | |||
1145 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev) | ||
1146 | { | ||
1147 | GET_MEMORY_CLOCK_PS_ALLOCATION args; | ||
1148 | int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock); | ||
1149 | |||
1150 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1151 | return args.ulReturnMemoryClock; | ||
1152 | } | ||
1153 | |||
984 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, | 1154 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, |
985 | uint32_t eng_clock) | 1155 | uint32_t eng_clock) |
986 | { | 1156 | { |
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c index 2e938f7496fb..10bd50a7db87 100644 --- a/drivers/gpu/drm/radeon/radeon_benchmark.c +++ b/drivers/gpu/drm/radeon/radeon_benchmark.c | |||
@@ -63,7 +63,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize, | |||
63 | if (r) { | 63 | if (r) { |
64 | goto out_cleanup; | 64 | goto out_cleanup; |
65 | } | 65 | } |
66 | r = radeon_copy_dma(rdev, saddr, daddr, size / 4096, fence); | 66 | r = radeon_copy_dma(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence); |
67 | if (r) { | 67 | if (r) { |
68 | goto out_cleanup; | 68 | goto out_cleanup; |
69 | } | 69 | } |
@@ -88,7 +88,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize, | |||
88 | if (r) { | 88 | if (r) { |
89 | goto out_cleanup; | 89 | goto out_cleanup; |
90 | } | 90 | } |
91 | r = radeon_copy_blit(rdev, saddr, daddr, size / 4096, fence); | 91 | r = radeon_copy_blit(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence); |
92 | if (r) { | 92 | if (r) { |
93 | goto out_cleanup; | 93 | goto out_cleanup; |
94 | } | 94 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index 34a9b9119518..906921740c60 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c | |||
@@ -50,19 +50,16 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev) | |||
50 | vram_base = drm_get_resource_start(rdev->ddev, 0); | 50 | vram_base = drm_get_resource_start(rdev->ddev, 0); |
51 | bios = ioremap(vram_base, size); | 51 | bios = ioremap(vram_base, size); |
52 | if (!bios) { | 52 | if (!bios) { |
53 | DRM_ERROR("Unable to mmap vram\n"); | ||
54 | return false; | 53 | return false; |
55 | } | 54 | } |
56 | 55 | ||
57 | if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { | 56 | if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { |
58 | iounmap(bios); | 57 | iounmap(bios); |
59 | DRM_ERROR("bad rom signature\n"); | ||
60 | return false; | 58 | return false; |
61 | } | 59 | } |
62 | rdev->bios = kmalloc(size, GFP_KERNEL); | 60 | rdev->bios = kmalloc(size, GFP_KERNEL); |
63 | if (rdev->bios == NULL) { | 61 | if (rdev->bios == NULL) { |
64 | iounmap(bios); | 62 | iounmap(bios); |
65 | DRM_ERROR("kmalloc failed\n"); | ||
66 | return false; | 63 | return false; |
67 | } | 64 | } |
68 | memcpy(rdev->bios, bios, size); | 65 | memcpy(rdev->bios, bios, size); |
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index f5c32a766b10..a81354167621 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include "atom.h" | 32 | #include "atom.h" |
33 | 33 | ||
34 | /* 10 khz */ | 34 | /* 10 khz */ |
35 | static uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) | 35 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) |
36 | { | 36 | { |
37 | struct radeon_pll *spll = &rdev->clock.spll; | 37 | struct radeon_pll *spll = &rdev->clock.spll; |
38 | uint32_t fb_div, ref_div, post_div, sclk; | 38 | uint32_t fb_div, ref_div, post_div, sclk; |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 748265a105b3..5253cbf6db1f 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -49,7 +49,8 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
49 | uint32_t connector_id, | 49 | uint32_t connector_id, |
50 | uint32_t supported_device, | 50 | uint32_t supported_device, |
51 | int connector_type, | 51 | int connector_type, |
52 | struct radeon_i2c_bus_rec *i2c_bus); | 52 | struct radeon_i2c_bus_rec *i2c_bus, |
53 | uint16_t connector_object_id); | ||
53 | 54 | ||
54 | /* from radeon_legacy_encoder.c */ | 55 | /* from radeon_legacy_encoder.c */ |
55 | extern void | 56 | extern void |
@@ -808,25 +809,25 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct | |||
808 | lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf; | 809 | lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf; |
809 | 810 | ||
810 | if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE) | 811 | if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE) |
811 | lvds->native_mode.panel_yres = | 812 | lvds->native_mode.vdisplay = |
812 | ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >> | 813 | ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >> |
813 | RADEON_VERT_PANEL_SHIFT) + 1; | 814 | RADEON_VERT_PANEL_SHIFT) + 1; |
814 | else | 815 | else |
815 | lvds->native_mode.panel_yres = | 816 | lvds->native_mode.vdisplay = |
816 | (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1; | 817 | (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1; |
817 | 818 | ||
818 | if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE) | 819 | if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE) |
819 | lvds->native_mode.panel_xres = | 820 | lvds->native_mode.hdisplay = |
820 | (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >> | 821 | (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >> |
821 | RADEON_HORZ_PANEL_SHIFT) + 1) * 8; | 822 | RADEON_HORZ_PANEL_SHIFT) + 1) * 8; |
822 | else | 823 | else |
823 | lvds->native_mode.panel_xres = | 824 | lvds->native_mode.hdisplay = |
824 | ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8; | 825 | ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8; |
825 | 826 | ||
826 | if ((lvds->native_mode.panel_xres < 640) || | 827 | if ((lvds->native_mode.hdisplay < 640) || |
827 | (lvds->native_mode.panel_yres < 480)) { | 828 | (lvds->native_mode.vdisplay < 480)) { |
828 | lvds->native_mode.panel_xres = 640; | 829 | lvds->native_mode.hdisplay = 640; |
829 | lvds->native_mode.panel_yres = 480; | 830 | lvds->native_mode.vdisplay = 480; |
830 | } | 831 | } |
831 | 832 | ||
832 | ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; | 833 | ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; |
@@ -846,8 +847,8 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct | |||
846 | lvds->panel_vcc_delay = 200; | 847 | lvds->panel_vcc_delay = 200; |
847 | 848 | ||
848 | DRM_INFO("Panel info derived from registers\n"); | 849 | DRM_INFO("Panel info derived from registers\n"); |
849 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, | 850 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, |
850 | lvds->native_mode.panel_yres); | 851 | lvds->native_mode.vdisplay); |
851 | 852 | ||
852 | return lvds; | 853 | return lvds; |
853 | } | 854 | } |
@@ -882,11 +883,11 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder | |||
882 | 883 | ||
883 | DRM_INFO("Panel ID String: %s\n", stmp); | 884 | DRM_INFO("Panel ID String: %s\n", stmp); |
884 | 885 | ||
885 | lvds->native_mode.panel_xres = RBIOS16(lcd_info + 0x19); | 886 | lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19); |
886 | lvds->native_mode.panel_yres = RBIOS16(lcd_info + 0x1b); | 887 | lvds->native_mode.vdisplay = RBIOS16(lcd_info + 0x1b); |
887 | 888 | ||
888 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, | 889 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, |
889 | lvds->native_mode.panel_yres); | 890 | lvds->native_mode.vdisplay); |
890 | 891 | ||
891 | lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); | 892 | lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); |
892 | if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) | 893 | if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) |
@@ -944,27 +945,25 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder | |||
944 | if (tmp == 0) | 945 | if (tmp == 0) |
945 | break; | 946 | break; |
946 | 947 | ||
947 | if ((RBIOS16(tmp) == lvds->native_mode.panel_xres) && | 948 | if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) && |
948 | (RBIOS16(tmp + 2) == | 949 | (RBIOS16(tmp + 2) == |
949 | lvds->native_mode.panel_yres)) { | 950 | lvds->native_mode.vdisplay)) { |
950 | lvds->native_mode.hblank = | 951 | lvds->native_mode.htotal = RBIOS16(tmp + 17) * 8; |
951 | (RBIOS16(tmp + 17) - RBIOS16(tmp + 19)) * 8; | 952 | lvds->native_mode.hsync_start = RBIOS16(tmp + 21) * 8; |
952 | lvds->native_mode.hoverplus = | 953 | lvds->native_mode.hsync_end = (RBIOS8(tmp + 23) + |
953 | (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - | 954 | RBIOS16(tmp + 21)) * 8; |
954 | 1) * 8; | 955 | |
955 | lvds->native_mode.hsync_width = | 956 | lvds->native_mode.vtotal = RBIOS16(tmp + 24); |
956 | RBIOS8(tmp + 23) * 8; | 957 | lvds->native_mode.vsync_start = RBIOS16(tmp + 28) & 0x7ff; |
957 | 958 | lvds->native_mode.vsync_end = | |
958 | lvds->native_mode.vblank = (RBIOS16(tmp + 24) - | 959 | ((RBIOS16(tmp + 28) & 0xf800) >> 11) + |
959 | RBIOS16(tmp + 26)); | 960 | (RBIOS16(tmp + 28) & 0x7ff); |
960 | lvds->native_mode.voverplus = | 961 | |
961 | ((RBIOS16(tmp + 28) & 0x7ff) - | 962 | lvds->native_mode.clock = RBIOS16(tmp + 9) * 10; |
962 | RBIOS16(tmp + 26)); | ||
963 | lvds->native_mode.vsync_width = | ||
964 | ((RBIOS16(tmp + 28) & 0xf800) >> 11); | ||
965 | lvds->native_mode.dotclock = | ||
966 | RBIOS16(tmp + 9) * 10; | ||
967 | lvds->native_mode.flags = 0; | 963 | lvds->native_mode.flags = 0; |
964 | /* set crtc values */ | ||
965 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); | ||
966 | |||
968 | } | 967 | } |
969 | } | 968 | } |
970 | } else { | 969 | } else { |
@@ -1178,7 +1177,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1178 | radeon_add_legacy_connector(dev, 0, | 1177 | radeon_add_legacy_connector(dev, 0, |
1179 | ATOM_DEVICE_CRT1_SUPPORT, | 1178 | ATOM_DEVICE_CRT1_SUPPORT, |
1180 | DRM_MODE_CONNECTOR_VGA, | 1179 | DRM_MODE_CONNECTOR_VGA, |
1181 | &ddc_i2c); | 1180 | &ddc_i2c, |
1181 | CONNECTOR_OBJECT_ID_VGA); | ||
1182 | } else if (rdev->flags & RADEON_IS_MOBILITY) { | 1182 | } else if (rdev->flags & RADEON_IS_MOBILITY) { |
1183 | /* LVDS */ | 1183 | /* LVDS */ |
1184 | ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); | 1184 | ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); |
@@ -1190,7 +1190,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1190 | radeon_add_legacy_connector(dev, 0, | 1190 | radeon_add_legacy_connector(dev, 0, |
1191 | ATOM_DEVICE_LCD1_SUPPORT, | 1191 | ATOM_DEVICE_LCD1_SUPPORT, |
1192 | DRM_MODE_CONNECTOR_LVDS, | 1192 | DRM_MODE_CONNECTOR_LVDS, |
1193 | &ddc_i2c); | 1193 | &ddc_i2c, |
1194 | CONNECTOR_OBJECT_ID_LVDS); | ||
1194 | 1195 | ||
1195 | /* VGA - primary dac */ | 1196 | /* VGA - primary dac */ |
1196 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1197 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
@@ -1202,7 +1203,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1202 | radeon_add_legacy_connector(dev, 1, | 1203 | radeon_add_legacy_connector(dev, 1, |
1203 | ATOM_DEVICE_CRT1_SUPPORT, | 1204 | ATOM_DEVICE_CRT1_SUPPORT, |
1204 | DRM_MODE_CONNECTOR_VGA, | 1205 | DRM_MODE_CONNECTOR_VGA, |
1205 | &ddc_i2c); | 1206 | &ddc_i2c, |
1207 | CONNECTOR_OBJECT_ID_VGA); | ||
1206 | } else { | 1208 | } else { |
1207 | /* DVI-I - tv dac, int tmds */ | 1209 | /* DVI-I - tv dac, int tmds */ |
1208 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); | 1210 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
@@ -1220,7 +1222,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1220 | ATOM_DEVICE_DFP1_SUPPORT | | 1222 | ATOM_DEVICE_DFP1_SUPPORT | |
1221 | ATOM_DEVICE_CRT2_SUPPORT, | 1223 | ATOM_DEVICE_CRT2_SUPPORT, |
1222 | DRM_MODE_CONNECTOR_DVII, | 1224 | DRM_MODE_CONNECTOR_DVII, |
1223 | &ddc_i2c); | 1225 | &ddc_i2c, |
1226 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1224 | 1227 | ||
1225 | /* VGA - primary dac */ | 1228 | /* VGA - primary dac */ |
1226 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1229 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
@@ -1232,7 +1235,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1232 | radeon_add_legacy_connector(dev, 1, | 1235 | radeon_add_legacy_connector(dev, 1, |
1233 | ATOM_DEVICE_CRT1_SUPPORT, | 1236 | ATOM_DEVICE_CRT1_SUPPORT, |
1234 | DRM_MODE_CONNECTOR_VGA, | 1237 | DRM_MODE_CONNECTOR_VGA, |
1235 | &ddc_i2c); | 1238 | &ddc_i2c, |
1239 | CONNECTOR_OBJECT_ID_VGA); | ||
1236 | } | 1240 | } |
1237 | 1241 | ||
1238 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { | 1242 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { |
@@ -1245,7 +1249,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1245 | radeon_add_legacy_connector(dev, 2, | 1249 | radeon_add_legacy_connector(dev, 2, |
1246 | ATOM_DEVICE_TV1_SUPPORT, | 1250 | ATOM_DEVICE_TV1_SUPPORT, |
1247 | DRM_MODE_CONNECTOR_SVIDEO, | 1251 | DRM_MODE_CONNECTOR_SVIDEO, |
1248 | &ddc_i2c); | 1252 | &ddc_i2c, |
1253 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1249 | } | 1254 | } |
1250 | break; | 1255 | break; |
1251 | case CT_IBOOK: | 1256 | case CT_IBOOK: |
@@ -1259,7 +1264,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1259 | 0), | 1264 | 0), |
1260 | ATOM_DEVICE_LCD1_SUPPORT); | 1265 | ATOM_DEVICE_LCD1_SUPPORT); |
1261 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1266 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1262 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1267 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1268 | CONNECTOR_OBJECT_ID_LVDS); | ||
1263 | /* VGA - TV DAC */ | 1269 | /* VGA - TV DAC */ |
1264 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1270 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1265 | radeon_add_legacy_encoder(dev, | 1271 | radeon_add_legacy_encoder(dev, |
@@ -1268,7 +1274,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1268 | 2), | 1274 | 2), |
1269 | ATOM_DEVICE_CRT2_SUPPORT); | 1275 | ATOM_DEVICE_CRT2_SUPPORT); |
1270 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, | 1276 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1271 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1277 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1278 | CONNECTOR_OBJECT_ID_VGA); | ||
1272 | /* TV - TV DAC */ | 1279 | /* TV - TV DAC */ |
1273 | radeon_add_legacy_encoder(dev, | 1280 | radeon_add_legacy_encoder(dev, |
1274 | radeon_get_encoder_id(dev, | 1281 | radeon_get_encoder_id(dev, |
@@ -1277,7 +1284,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1277 | ATOM_DEVICE_TV1_SUPPORT); | 1284 | ATOM_DEVICE_TV1_SUPPORT); |
1278 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1285 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1279 | DRM_MODE_CONNECTOR_SVIDEO, | 1286 | DRM_MODE_CONNECTOR_SVIDEO, |
1280 | &ddc_i2c); | 1287 | &ddc_i2c, |
1288 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1281 | break; | 1289 | break; |
1282 | case CT_POWERBOOK_EXTERNAL: | 1290 | case CT_POWERBOOK_EXTERNAL: |
1283 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", | 1291 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", |
@@ -1290,7 +1298,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1290 | 0), | 1298 | 0), |
1291 | ATOM_DEVICE_LCD1_SUPPORT); | 1299 | ATOM_DEVICE_LCD1_SUPPORT); |
1292 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1300 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1293 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1301 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1302 | CONNECTOR_OBJECT_ID_LVDS); | ||
1294 | /* DVI-I - primary dac, ext tmds */ | 1303 | /* DVI-I - primary dac, ext tmds */ |
1295 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1304 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1296 | radeon_add_legacy_encoder(dev, | 1305 | radeon_add_legacy_encoder(dev, |
@@ -1303,10 +1312,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1303 | ATOM_DEVICE_CRT1_SUPPORT, | 1312 | ATOM_DEVICE_CRT1_SUPPORT, |
1304 | 1), | 1313 | 1), |
1305 | ATOM_DEVICE_CRT1_SUPPORT); | 1314 | ATOM_DEVICE_CRT1_SUPPORT); |
1315 | /* XXX some are SL */ | ||
1306 | radeon_add_legacy_connector(dev, 1, | 1316 | radeon_add_legacy_connector(dev, 1, |
1307 | ATOM_DEVICE_DFP2_SUPPORT | | 1317 | ATOM_DEVICE_DFP2_SUPPORT | |
1308 | ATOM_DEVICE_CRT1_SUPPORT, | 1318 | ATOM_DEVICE_CRT1_SUPPORT, |
1309 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1319 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1320 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I); | ||
1310 | /* TV - TV DAC */ | 1321 | /* TV - TV DAC */ |
1311 | radeon_add_legacy_encoder(dev, | 1322 | radeon_add_legacy_encoder(dev, |
1312 | radeon_get_encoder_id(dev, | 1323 | radeon_get_encoder_id(dev, |
@@ -1315,7 +1326,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1315 | ATOM_DEVICE_TV1_SUPPORT); | 1326 | ATOM_DEVICE_TV1_SUPPORT); |
1316 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1327 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1317 | DRM_MODE_CONNECTOR_SVIDEO, | 1328 | DRM_MODE_CONNECTOR_SVIDEO, |
1318 | &ddc_i2c); | 1329 | &ddc_i2c, |
1330 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1319 | break; | 1331 | break; |
1320 | case CT_POWERBOOK_INTERNAL: | 1332 | case CT_POWERBOOK_INTERNAL: |
1321 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", | 1333 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", |
@@ -1328,7 +1340,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1328 | 0), | 1340 | 0), |
1329 | ATOM_DEVICE_LCD1_SUPPORT); | 1341 | ATOM_DEVICE_LCD1_SUPPORT); |
1330 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1342 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1331 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1343 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1344 | CONNECTOR_OBJECT_ID_LVDS); | ||
1332 | /* DVI-I - primary dac, int tmds */ | 1345 | /* DVI-I - primary dac, int tmds */ |
1333 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1346 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1334 | radeon_add_legacy_encoder(dev, | 1347 | radeon_add_legacy_encoder(dev, |
@@ -1344,7 +1357,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1344 | radeon_add_legacy_connector(dev, 1, | 1357 | radeon_add_legacy_connector(dev, 1, |
1345 | ATOM_DEVICE_DFP1_SUPPORT | | 1358 | ATOM_DEVICE_DFP1_SUPPORT | |
1346 | ATOM_DEVICE_CRT1_SUPPORT, | 1359 | ATOM_DEVICE_CRT1_SUPPORT, |
1347 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1360 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1361 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1348 | /* TV - TV DAC */ | 1362 | /* TV - TV DAC */ |
1349 | radeon_add_legacy_encoder(dev, | 1363 | radeon_add_legacy_encoder(dev, |
1350 | radeon_get_encoder_id(dev, | 1364 | radeon_get_encoder_id(dev, |
@@ -1353,7 +1367,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1353 | ATOM_DEVICE_TV1_SUPPORT); | 1367 | ATOM_DEVICE_TV1_SUPPORT); |
1354 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1368 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1355 | DRM_MODE_CONNECTOR_SVIDEO, | 1369 | DRM_MODE_CONNECTOR_SVIDEO, |
1356 | &ddc_i2c); | 1370 | &ddc_i2c, |
1371 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1357 | break; | 1372 | break; |
1358 | case CT_POWERBOOK_VGA: | 1373 | case CT_POWERBOOK_VGA: |
1359 | DRM_INFO("Connector Table: %d (powerbook vga)\n", | 1374 | DRM_INFO("Connector Table: %d (powerbook vga)\n", |
@@ -1366,7 +1381,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1366 | 0), | 1381 | 0), |
1367 | ATOM_DEVICE_LCD1_SUPPORT); | 1382 | ATOM_DEVICE_LCD1_SUPPORT); |
1368 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1383 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1369 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1384 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1385 | CONNECTOR_OBJECT_ID_LVDS); | ||
1370 | /* VGA - primary dac */ | 1386 | /* VGA - primary dac */ |
1371 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1387 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1372 | radeon_add_legacy_encoder(dev, | 1388 | radeon_add_legacy_encoder(dev, |
@@ -1375,7 +1391,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1375 | 1), | 1391 | 1), |
1376 | ATOM_DEVICE_CRT1_SUPPORT); | 1392 | ATOM_DEVICE_CRT1_SUPPORT); |
1377 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, | 1393 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, |
1378 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1394 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1395 | CONNECTOR_OBJECT_ID_VGA); | ||
1379 | /* TV - TV DAC */ | 1396 | /* TV - TV DAC */ |
1380 | radeon_add_legacy_encoder(dev, | 1397 | radeon_add_legacy_encoder(dev, |
1381 | radeon_get_encoder_id(dev, | 1398 | radeon_get_encoder_id(dev, |
@@ -1384,7 +1401,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1384 | ATOM_DEVICE_TV1_SUPPORT); | 1401 | ATOM_DEVICE_TV1_SUPPORT); |
1385 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1402 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1386 | DRM_MODE_CONNECTOR_SVIDEO, | 1403 | DRM_MODE_CONNECTOR_SVIDEO, |
1387 | &ddc_i2c); | 1404 | &ddc_i2c, |
1405 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1388 | break; | 1406 | break; |
1389 | case CT_MINI_EXTERNAL: | 1407 | case CT_MINI_EXTERNAL: |
1390 | DRM_INFO("Connector Table: %d (mini external tmds)\n", | 1408 | DRM_INFO("Connector Table: %d (mini external tmds)\n", |
@@ -1401,10 +1419,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1401 | ATOM_DEVICE_CRT2_SUPPORT, | 1419 | ATOM_DEVICE_CRT2_SUPPORT, |
1402 | 2), | 1420 | 2), |
1403 | ATOM_DEVICE_CRT2_SUPPORT); | 1421 | ATOM_DEVICE_CRT2_SUPPORT); |
1422 | /* XXX are any DL? */ | ||
1404 | radeon_add_legacy_connector(dev, 0, | 1423 | radeon_add_legacy_connector(dev, 0, |
1405 | ATOM_DEVICE_DFP2_SUPPORT | | 1424 | ATOM_DEVICE_DFP2_SUPPORT | |
1406 | ATOM_DEVICE_CRT2_SUPPORT, | 1425 | ATOM_DEVICE_CRT2_SUPPORT, |
1407 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1426 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1427 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1408 | /* TV - TV DAC */ | 1428 | /* TV - TV DAC */ |
1409 | radeon_add_legacy_encoder(dev, | 1429 | radeon_add_legacy_encoder(dev, |
1410 | radeon_get_encoder_id(dev, | 1430 | radeon_get_encoder_id(dev, |
@@ -1413,7 +1433,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1413 | ATOM_DEVICE_TV1_SUPPORT); | 1433 | ATOM_DEVICE_TV1_SUPPORT); |
1414 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, | 1434 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
1415 | DRM_MODE_CONNECTOR_SVIDEO, | 1435 | DRM_MODE_CONNECTOR_SVIDEO, |
1416 | &ddc_i2c); | 1436 | &ddc_i2c, |
1437 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1417 | break; | 1438 | break; |
1418 | case CT_MINI_INTERNAL: | 1439 | case CT_MINI_INTERNAL: |
1419 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", | 1440 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", |
@@ -1433,7 +1454,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1433 | radeon_add_legacy_connector(dev, 0, | 1454 | radeon_add_legacy_connector(dev, 0, |
1434 | ATOM_DEVICE_DFP1_SUPPORT | | 1455 | ATOM_DEVICE_DFP1_SUPPORT | |
1435 | ATOM_DEVICE_CRT2_SUPPORT, | 1456 | ATOM_DEVICE_CRT2_SUPPORT, |
1436 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1457 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1458 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1437 | /* TV - TV DAC */ | 1459 | /* TV - TV DAC */ |
1438 | radeon_add_legacy_encoder(dev, | 1460 | radeon_add_legacy_encoder(dev, |
1439 | radeon_get_encoder_id(dev, | 1461 | radeon_get_encoder_id(dev, |
@@ -1442,7 +1464,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1442 | ATOM_DEVICE_TV1_SUPPORT); | 1464 | ATOM_DEVICE_TV1_SUPPORT); |
1443 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, | 1465 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
1444 | DRM_MODE_CONNECTOR_SVIDEO, | 1466 | DRM_MODE_CONNECTOR_SVIDEO, |
1445 | &ddc_i2c); | 1467 | &ddc_i2c, |
1468 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1446 | break; | 1469 | break; |
1447 | case CT_IMAC_G5_ISIGHT: | 1470 | case CT_IMAC_G5_ISIGHT: |
1448 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", | 1471 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", |
@@ -1455,7 +1478,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1455 | 0), | 1478 | 0), |
1456 | ATOM_DEVICE_DFP1_SUPPORT); | 1479 | ATOM_DEVICE_DFP1_SUPPORT); |
1457 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, | 1480 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, |
1458 | DRM_MODE_CONNECTOR_DVID, &ddc_i2c); | 1481 | DRM_MODE_CONNECTOR_DVID, &ddc_i2c, |
1482 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); | ||
1459 | /* VGA - tv dac */ | 1483 | /* VGA - tv dac */ |
1460 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); | 1484 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1461 | radeon_add_legacy_encoder(dev, | 1485 | radeon_add_legacy_encoder(dev, |
@@ -1464,7 +1488,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1464 | 2), | 1488 | 2), |
1465 | ATOM_DEVICE_CRT2_SUPPORT); | 1489 | ATOM_DEVICE_CRT2_SUPPORT); |
1466 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, | 1490 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1467 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1491 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1492 | CONNECTOR_OBJECT_ID_VGA); | ||
1468 | /* TV - TV DAC */ | 1493 | /* TV - TV DAC */ |
1469 | radeon_add_legacy_encoder(dev, | 1494 | radeon_add_legacy_encoder(dev, |
1470 | radeon_get_encoder_id(dev, | 1495 | radeon_get_encoder_id(dev, |
@@ -1473,7 +1498,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1473 | ATOM_DEVICE_TV1_SUPPORT); | 1498 | ATOM_DEVICE_TV1_SUPPORT); |
1474 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1499 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1475 | DRM_MODE_CONNECTOR_SVIDEO, | 1500 | DRM_MODE_CONNECTOR_SVIDEO, |
1476 | &ddc_i2c); | 1501 | &ddc_i2c, |
1502 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1477 | break; | 1503 | break; |
1478 | case CT_EMAC: | 1504 | case CT_EMAC: |
1479 | DRM_INFO("Connector Table: %d (emac)\n", | 1505 | DRM_INFO("Connector Table: %d (emac)\n", |
@@ -1486,7 +1512,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1486 | 1), | 1512 | 1), |
1487 | ATOM_DEVICE_CRT1_SUPPORT); | 1513 | ATOM_DEVICE_CRT1_SUPPORT); |
1488 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, | 1514 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, |
1489 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1515 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1516 | CONNECTOR_OBJECT_ID_VGA); | ||
1490 | /* VGA - tv dac */ | 1517 | /* VGA - tv dac */ |
1491 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); | 1518 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
1492 | radeon_add_legacy_encoder(dev, | 1519 | radeon_add_legacy_encoder(dev, |
@@ -1495,7 +1522,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1495 | 2), | 1522 | 2), |
1496 | ATOM_DEVICE_CRT2_SUPPORT); | 1523 | ATOM_DEVICE_CRT2_SUPPORT); |
1497 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, | 1524 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1498 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1525 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1526 | CONNECTOR_OBJECT_ID_VGA); | ||
1499 | /* TV - TV DAC */ | 1527 | /* TV - TV DAC */ |
1500 | radeon_add_legacy_encoder(dev, | 1528 | radeon_add_legacy_encoder(dev, |
1501 | radeon_get_encoder_id(dev, | 1529 | radeon_get_encoder_id(dev, |
@@ -1504,7 +1532,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1504 | ATOM_DEVICE_TV1_SUPPORT); | 1532 | ATOM_DEVICE_TV1_SUPPORT); |
1505 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1533 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1506 | DRM_MODE_CONNECTOR_SVIDEO, | 1534 | DRM_MODE_CONNECTOR_SVIDEO, |
1507 | &ddc_i2c); | 1535 | &ddc_i2c, |
1536 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1508 | break; | 1537 | break; |
1509 | default: | 1538 | default: |
1510 | DRM_INFO("Connector table: %d (invalid)\n", | 1539 | DRM_INFO("Connector table: %d (invalid)\n", |
@@ -1581,11 +1610,63 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev, | |||
1581 | return true; | 1610 | return true; |
1582 | } | 1611 | } |
1583 | 1612 | ||
1613 | static bool radeon_apply_legacy_tv_quirks(struct drm_device *dev) | ||
1614 | { | ||
1615 | /* Acer 5102 has non-existent TV port */ | ||
1616 | if (dev->pdev->device == 0x5975 && | ||
1617 | dev->pdev->subsystem_vendor == 0x1025 && | ||
1618 | dev->pdev->subsystem_device == 0x009f) | ||
1619 | return false; | ||
1620 | |||
1621 | /* HP dc5750 has non-existent TV port */ | ||
1622 | if (dev->pdev->device == 0x5974 && | ||
1623 | dev->pdev->subsystem_vendor == 0x103c && | ||
1624 | dev->pdev->subsystem_device == 0x280a) | ||
1625 | return false; | ||
1626 | |||
1627 | return true; | ||
1628 | } | ||
1629 | |||
1630 | static uint16_t combios_check_dl_dvi(struct drm_device *dev, int is_dvi_d) | ||
1631 | { | ||
1632 | struct radeon_device *rdev = dev->dev_private; | ||
1633 | uint32_t ext_tmds_info; | ||
1634 | |||
1635 | if (rdev->flags & RADEON_IS_IGP) { | ||
1636 | if (is_dvi_d) | ||
1637 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D; | ||
1638 | else | ||
1639 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1640 | } | ||
1641 | ext_tmds_info = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); | ||
1642 | if (ext_tmds_info) { | ||
1643 | uint8_t rev = RBIOS8(ext_tmds_info); | ||
1644 | uint8_t flags = RBIOS8(ext_tmds_info + 4 + 5); | ||
1645 | if (rev >= 3) { | ||
1646 | if (is_dvi_d) | ||
1647 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D; | ||
1648 | else | ||
1649 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I; | ||
1650 | } else { | ||
1651 | if (flags & 1) { | ||
1652 | if (is_dvi_d) | ||
1653 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D; | ||
1654 | else | ||
1655 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I; | ||
1656 | } | ||
1657 | } | ||
1658 | } | ||
1659 | if (is_dvi_d) | ||
1660 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D; | ||
1661 | else | ||
1662 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1663 | } | ||
1664 | |||
1584 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | 1665 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) |
1585 | { | 1666 | { |
1586 | struct radeon_device *rdev = dev->dev_private; | 1667 | struct radeon_device *rdev = dev->dev_private; |
1587 | uint32_t conn_info, entry, devices; | 1668 | uint32_t conn_info, entry, devices; |
1588 | uint16_t tmp; | 1669 | uint16_t tmp, connector_object_id; |
1589 | enum radeon_combios_ddc ddc_type; | 1670 | enum radeon_combios_ddc ddc_type; |
1590 | enum radeon_combios_connector connector; | 1671 | enum radeon_combios_connector connector; |
1591 | int i = 0; | 1672 | int i = 0; |
@@ -1628,8 +1709,9 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1628 | break; | 1709 | break; |
1629 | } | 1710 | } |
1630 | 1711 | ||
1631 | radeon_apply_legacy_quirks(dev, i, &connector, | 1712 | if (!radeon_apply_legacy_quirks(dev, i, &connector, |
1632 | &ddc_i2c); | 1713 | &ddc_i2c)) |
1714 | continue; | ||
1633 | 1715 | ||
1634 | switch (connector) { | 1716 | switch (connector) { |
1635 | case CONNECTOR_PROPRIETARY_LEGACY: | 1717 | case CONNECTOR_PROPRIETARY_LEGACY: |
@@ -1644,7 +1726,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1644 | radeon_add_legacy_connector(dev, i, devices, | 1726 | radeon_add_legacy_connector(dev, i, devices, |
1645 | legacy_connector_convert | 1727 | legacy_connector_convert |
1646 | [connector], | 1728 | [connector], |
1647 | &ddc_i2c); | 1729 | &ddc_i2c, |
1730 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); | ||
1648 | break; | 1731 | break; |
1649 | case CONNECTOR_CRT_LEGACY: | 1732 | case CONNECTOR_CRT_LEGACY: |
1650 | if (tmp & 0x1) { | 1733 | if (tmp & 0x1) { |
@@ -1669,7 +1752,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1669 | devices, | 1752 | devices, |
1670 | legacy_connector_convert | 1753 | legacy_connector_convert |
1671 | [connector], | 1754 | [connector], |
1672 | &ddc_i2c); | 1755 | &ddc_i2c, |
1756 | CONNECTOR_OBJECT_ID_VGA); | ||
1673 | break; | 1757 | break; |
1674 | case CONNECTOR_DVI_I_LEGACY: | 1758 | case CONNECTOR_DVI_I_LEGACY: |
1675 | devices = 0; | 1759 | devices = 0; |
@@ -1698,6 +1782,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1698 | ATOM_DEVICE_DFP2_SUPPORT, | 1782 | ATOM_DEVICE_DFP2_SUPPORT, |
1699 | 0), | 1783 | 0), |
1700 | ATOM_DEVICE_DFP2_SUPPORT); | 1784 | ATOM_DEVICE_DFP2_SUPPORT); |
1785 | connector_object_id = combios_check_dl_dvi(dev, 0); | ||
1701 | } else { | 1786 | } else { |
1702 | devices |= ATOM_DEVICE_DFP1_SUPPORT; | 1787 | devices |= ATOM_DEVICE_DFP1_SUPPORT; |
1703 | radeon_add_legacy_encoder(dev, | 1788 | radeon_add_legacy_encoder(dev, |
@@ -1706,19 +1791,24 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1706 | ATOM_DEVICE_DFP1_SUPPORT, | 1791 | ATOM_DEVICE_DFP1_SUPPORT, |
1707 | 0), | 1792 | 0), |
1708 | ATOM_DEVICE_DFP1_SUPPORT); | 1793 | ATOM_DEVICE_DFP1_SUPPORT); |
1794 | connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1709 | } | 1795 | } |
1710 | radeon_add_legacy_connector(dev, | 1796 | radeon_add_legacy_connector(dev, |
1711 | i, | 1797 | i, |
1712 | devices, | 1798 | devices, |
1713 | legacy_connector_convert | 1799 | legacy_connector_convert |
1714 | [connector], | 1800 | [connector], |
1715 | &ddc_i2c); | 1801 | &ddc_i2c, |
1802 | connector_object_id); | ||
1716 | break; | 1803 | break; |
1717 | case CONNECTOR_DVI_D_LEGACY: | 1804 | case CONNECTOR_DVI_D_LEGACY: |
1718 | if ((tmp >> 4) & 0x1) | 1805 | if ((tmp >> 4) & 0x1) { |
1719 | devices = ATOM_DEVICE_DFP2_SUPPORT; | 1806 | devices = ATOM_DEVICE_DFP2_SUPPORT; |
1720 | else | 1807 | connector_object_id = combios_check_dl_dvi(dev, 1); |
1808 | } else { | ||
1721 | devices = ATOM_DEVICE_DFP1_SUPPORT; | 1809 | devices = ATOM_DEVICE_DFP1_SUPPORT; |
1810 | connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1811 | } | ||
1722 | radeon_add_legacy_encoder(dev, | 1812 | radeon_add_legacy_encoder(dev, |
1723 | radeon_get_encoder_id | 1813 | radeon_get_encoder_id |
1724 | (dev, devices, 0), | 1814 | (dev, devices, 0), |
@@ -1726,7 +1816,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1726 | radeon_add_legacy_connector(dev, i, devices, | 1816 | radeon_add_legacy_connector(dev, i, devices, |
1727 | legacy_connector_convert | 1817 | legacy_connector_convert |
1728 | [connector], | 1818 | [connector], |
1729 | &ddc_i2c); | 1819 | &ddc_i2c, |
1820 | connector_object_id); | ||
1730 | break; | 1821 | break; |
1731 | case CONNECTOR_CTV_LEGACY: | 1822 | case CONNECTOR_CTV_LEGACY: |
1732 | case CONNECTOR_STV_LEGACY: | 1823 | case CONNECTOR_STV_LEGACY: |
@@ -1740,7 +1831,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1740 | ATOM_DEVICE_TV1_SUPPORT, | 1831 | ATOM_DEVICE_TV1_SUPPORT, |
1741 | legacy_connector_convert | 1832 | legacy_connector_convert |
1742 | [connector], | 1833 | [connector], |
1743 | &ddc_i2c); | 1834 | &ddc_i2c, |
1835 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1744 | break; | 1836 | break; |
1745 | default: | 1837 | default: |
1746 | DRM_ERROR("Unknown connector type: %d\n", | 1838 | DRM_ERROR("Unknown connector type: %d\n", |
@@ -1772,10 +1864,29 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1772 | ATOM_DEVICE_CRT1_SUPPORT | | 1864 | ATOM_DEVICE_CRT1_SUPPORT | |
1773 | ATOM_DEVICE_DFP1_SUPPORT, | 1865 | ATOM_DEVICE_DFP1_SUPPORT, |
1774 | DRM_MODE_CONNECTOR_DVII, | 1866 | DRM_MODE_CONNECTOR_DVII, |
1775 | &ddc_i2c); | 1867 | &ddc_i2c, |
1868 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1776 | } else { | 1869 | } else { |
1777 | DRM_DEBUG("No connector info found\n"); | 1870 | uint16_t crt_info = |
1778 | return false; | 1871 | combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
1872 | DRM_DEBUG("Found CRT table, assuming VGA connector\n"); | ||
1873 | if (crt_info) { | ||
1874 | radeon_add_legacy_encoder(dev, | ||
1875 | radeon_get_encoder_id(dev, | ||
1876 | ATOM_DEVICE_CRT1_SUPPORT, | ||
1877 | 1), | ||
1878 | ATOM_DEVICE_CRT1_SUPPORT); | ||
1879 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | ||
1880 | radeon_add_legacy_connector(dev, | ||
1881 | 0, | ||
1882 | ATOM_DEVICE_CRT1_SUPPORT, | ||
1883 | DRM_MODE_CONNECTOR_VGA, | ||
1884 | &ddc_i2c, | ||
1885 | CONNECTOR_OBJECT_ID_VGA); | ||
1886 | } else { | ||
1887 | DRM_DEBUG("No connector info found\n"); | ||
1888 | return false; | ||
1889 | } | ||
1779 | } | 1890 | } |
1780 | } | 1891 | } |
1781 | 1892 | ||
@@ -1870,7 +1981,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1870 | 5, | 1981 | 5, |
1871 | ATOM_DEVICE_LCD1_SUPPORT, | 1982 | ATOM_DEVICE_LCD1_SUPPORT, |
1872 | DRM_MODE_CONNECTOR_LVDS, | 1983 | DRM_MODE_CONNECTOR_LVDS, |
1873 | &ddc_i2c); | 1984 | &ddc_i2c, |
1985 | CONNECTOR_OBJECT_ID_LVDS); | ||
1874 | } | 1986 | } |
1875 | } | 1987 | } |
1876 | 1988 | ||
@@ -1880,16 +1992,19 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1880 | combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); | 1992 | combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
1881 | if (tv_info) { | 1993 | if (tv_info) { |
1882 | if (RBIOS8(tv_info + 6) == 'T') { | 1994 | if (RBIOS8(tv_info + 6) == 'T') { |
1883 | radeon_add_legacy_encoder(dev, | 1995 | if (radeon_apply_legacy_tv_quirks(dev)) { |
1884 | radeon_get_encoder_id | 1996 | radeon_add_legacy_encoder(dev, |
1885 | (dev, | 1997 | radeon_get_encoder_id |
1886 | ATOM_DEVICE_TV1_SUPPORT, | 1998 | (dev, |
1887 | 2), | 1999 | ATOM_DEVICE_TV1_SUPPORT, |
1888 | ATOM_DEVICE_TV1_SUPPORT); | 2000 | 2), |
1889 | radeon_add_legacy_connector(dev, 6, | 2001 | ATOM_DEVICE_TV1_SUPPORT); |
1890 | ATOM_DEVICE_TV1_SUPPORT, | 2002 | radeon_add_legacy_connector(dev, 6, |
1891 | DRM_MODE_CONNECTOR_SVIDEO, | 2003 | ATOM_DEVICE_TV1_SUPPORT, |
1892 | &ddc_i2c); | 2004 | DRM_MODE_CONNECTOR_SVIDEO, |
2005 | &ddc_i2c, | ||
2006 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
2007 | } | ||
1893 | } | 2008 | } |
1894 | } | 2009 | } |
1895 | } | 2010 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index e376be47a4a0..fce4c4087fda 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -178,25 +178,12 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode | |||
178 | struct drm_device *dev = encoder->dev; | 178 | struct drm_device *dev = encoder->dev; |
179 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 179 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
180 | struct drm_display_mode *mode = NULL; | 180 | struct drm_display_mode *mode = NULL; |
181 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 181 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
182 | |||
183 | if (native_mode->panel_xres != 0 && | ||
184 | native_mode->panel_yres != 0 && | ||
185 | native_mode->dotclock != 0) { | ||
186 | mode = drm_mode_create(dev); | ||
187 | |||
188 | mode->hdisplay = native_mode->panel_xres; | ||
189 | mode->vdisplay = native_mode->panel_yres; | ||
190 | |||
191 | mode->htotal = mode->hdisplay + native_mode->hblank; | ||
192 | mode->hsync_start = mode->hdisplay + native_mode->hoverplus; | ||
193 | mode->hsync_end = mode->hsync_start + native_mode->hsync_width; | ||
194 | mode->vtotal = mode->vdisplay + native_mode->vblank; | ||
195 | mode->vsync_start = mode->vdisplay + native_mode->voverplus; | ||
196 | mode->vsync_end = mode->vsync_start + native_mode->vsync_width; | ||
197 | mode->clock = native_mode->dotclock; | ||
198 | mode->flags = 0; | ||
199 | 182 | ||
183 | if (native_mode->hdisplay != 0 && | ||
184 | native_mode->vdisplay != 0 && | ||
185 | native_mode->clock != 0) { | ||
186 | mode = drm_mode_duplicate(dev, native_mode); | ||
200 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | 187 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
201 | drm_mode_set_name(mode); | 188 | drm_mode_set_name(mode); |
202 | 189 | ||
@@ -210,7 +197,7 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn | |||
210 | struct drm_device *dev = encoder->dev; | 197 | struct drm_device *dev = encoder->dev; |
211 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 198 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
212 | struct drm_display_mode *mode = NULL; | 199 | struct drm_display_mode *mode = NULL; |
213 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 200 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
214 | int i; | 201 | int i; |
215 | struct mode_size { | 202 | struct mode_size { |
216 | int w; | 203 | int w; |
@@ -236,11 +223,16 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn | |||
236 | }; | 223 | }; |
237 | 224 | ||
238 | for (i = 0; i < 17; i++) { | 225 | for (i = 0; i < 17; i++) { |
226 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { | ||
227 | if (common_modes[i].w > 1024 || | ||
228 | common_modes[i].h > 768) | ||
229 | continue; | ||
230 | } | ||
239 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 231 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
240 | if (common_modes[i].w > native_mode->panel_xres || | 232 | if (common_modes[i].w > native_mode->hdisplay || |
241 | common_modes[i].h > native_mode->panel_yres || | 233 | common_modes[i].h > native_mode->vdisplay || |
242 | (common_modes[i].w == native_mode->panel_xres && | 234 | (common_modes[i].w == native_mode->hdisplay && |
243 | common_modes[i].h == native_mode->panel_yres)) | 235 | common_modes[i].h == native_mode->vdisplay)) |
244 | continue; | 236 | continue; |
245 | } | 237 | } |
246 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | 238 | if (common_modes[i].w < 320 || common_modes[i].h < 200) |
@@ -344,28 +336,23 @@ static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, | |||
344 | struct drm_connector *connector) | 336 | struct drm_connector *connector) |
345 | { | 337 | { |
346 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 338 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
347 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 339 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
348 | 340 | ||
349 | /* Try to get native mode details from EDID if necessary */ | 341 | /* Try to get native mode details from EDID if necessary */ |
350 | if (!native_mode->dotclock) { | 342 | if (!native_mode->clock) { |
351 | struct drm_display_mode *t, *mode; | 343 | struct drm_display_mode *t, *mode; |
352 | 344 | ||
353 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | 345 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
354 | if (mode->hdisplay == native_mode->panel_xres && | 346 | if (mode->hdisplay == native_mode->hdisplay && |
355 | mode->vdisplay == native_mode->panel_yres) { | 347 | mode->vdisplay == native_mode->vdisplay) { |
356 | native_mode->hblank = mode->htotal - mode->hdisplay; | 348 | *native_mode = *mode; |
357 | native_mode->hoverplus = mode->hsync_start - mode->hdisplay; | 349 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); |
358 | native_mode->hsync_width = mode->hsync_end - mode->hsync_start; | ||
359 | native_mode->vblank = mode->vtotal - mode->vdisplay; | ||
360 | native_mode->voverplus = mode->vsync_start - mode->vdisplay; | ||
361 | native_mode->vsync_width = mode->vsync_end - mode->vsync_start; | ||
362 | native_mode->dotclock = mode->clock; | ||
363 | DRM_INFO("Determined LVDS native mode details from EDID\n"); | 350 | DRM_INFO("Determined LVDS native mode details from EDID\n"); |
364 | break; | 351 | break; |
365 | } | 352 | } |
366 | } | 353 | } |
367 | } | 354 | } |
368 | if (!native_mode->dotclock) { | 355 | if (!native_mode->clock) { |
369 | DRM_INFO("No LVDS native mode details, disabling RMX\n"); | 356 | DRM_INFO("No LVDS native mode details, disabling RMX\n"); |
370 | radeon_encoder->rmx_type = RMX_OFF; | 357 | radeon_encoder->rmx_type = RMX_OFF; |
371 | } | 358 | } |
@@ -410,13 +397,64 @@ static int radeon_lvds_get_modes(struct drm_connector *connector) | |||
410 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | 397 | static int radeon_lvds_mode_valid(struct drm_connector *connector, |
411 | struct drm_display_mode *mode) | 398 | struct drm_display_mode *mode) |
412 | { | 399 | { |
400 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
401 | |||
402 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | ||
403 | return MODE_PANEL; | ||
404 | |||
405 | if (encoder) { | ||
406 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
407 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | ||
408 | |||
409 | /* AVIVO hardware supports downscaling modes larger than the panel | ||
410 | * to the panel size, but I'm not sure this is desirable. | ||
411 | */ | ||
412 | if ((mode->hdisplay > native_mode->hdisplay) || | ||
413 | (mode->vdisplay > native_mode->vdisplay)) | ||
414 | return MODE_PANEL; | ||
415 | |||
416 | /* if scaling is disabled, block non-native modes */ | ||
417 | if (radeon_encoder->rmx_type == RMX_OFF) { | ||
418 | if ((mode->hdisplay != native_mode->hdisplay) || | ||
419 | (mode->vdisplay != native_mode->vdisplay)) | ||
420 | return MODE_PANEL; | ||
421 | } | ||
422 | } | ||
423 | |||
413 | return MODE_OK; | 424 | return MODE_OK; |
414 | } | 425 | } |
415 | 426 | ||
416 | static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector) | 427 | static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector) |
417 | { | 428 | { |
418 | enum drm_connector_status ret = connector_status_connected; | 429 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
430 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
431 | enum drm_connector_status ret = connector_status_disconnected; | ||
432 | |||
433 | if (encoder) { | ||
434 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
435 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | ||
436 | |||
437 | /* check if panel is valid */ | ||
438 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | ||
439 | ret = connector_status_connected; | ||
440 | |||
441 | } | ||
442 | |||
443 | /* check for edid as well */ | ||
444 | if (radeon_connector->edid) | ||
445 | ret = connector_status_connected; | ||
446 | else { | ||
447 | if (radeon_connector->ddc_bus) { | ||
448 | radeon_i2c_do_lock(radeon_connector, 1); | ||
449 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, | ||
450 | &radeon_connector->ddc_bus->adapter); | ||
451 | radeon_i2c_do_lock(radeon_connector, 0); | ||
452 | if (radeon_connector->edid) | ||
453 | ret = connector_status_connected; | ||
454 | } | ||
455 | } | ||
419 | /* check acpi lid status ??? */ | 456 | /* check acpi lid status ??? */ |
457 | |||
420 | radeon_connector_update_scratch_regs(connector, ret); | 458 | radeon_connector_update_scratch_regs(connector, ret); |
421 | return ret; | 459 | return ret; |
422 | } | 460 | } |
@@ -427,6 +465,8 @@ static void radeon_connector_destroy(struct drm_connector *connector) | |||
427 | 465 | ||
428 | if (radeon_connector->ddc_bus) | 466 | if (radeon_connector->ddc_bus) |
429 | radeon_i2c_destroy(radeon_connector->ddc_bus); | 467 | radeon_i2c_destroy(radeon_connector->ddc_bus); |
468 | if (radeon_connector->edid) | ||
469 | kfree(radeon_connector->edid); | ||
430 | kfree(radeon_connector->con_priv); | 470 | kfree(radeon_connector->con_priv); |
431 | drm_sysfs_connector_remove(connector); | 471 | drm_sysfs_connector_remove(connector); |
432 | drm_connector_cleanup(connector); | 472 | drm_connector_cleanup(connector); |
@@ -496,6 +536,8 @@ static int radeon_vga_get_modes(struct drm_connector *connector) | |||
496 | static int radeon_vga_mode_valid(struct drm_connector *connector, | 536 | static int radeon_vga_mode_valid(struct drm_connector *connector, |
497 | struct drm_display_mode *mode) | 537 | struct drm_display_mode *mode) |
498 | { | 538 | { |
539 | /* XXX check mode bandwidth */ | ||
540 | /* XXX verify against max DAC output frequency */ | ||
499 | return MODE_OK; | 541 | return MODE_OK; |
500 | } | 542 | } |
501 | 543 | ||
@@ -514,9 +556,32 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect | |||
514 | radeon_i2c_do_lock(radeon_connector, 1); | 556 | radeon_i2c_do_lock(radeon_connector, 1); |
515 | dret = radeon_ddc_probe(radeon_connector); | 557 | dret = radeon_ddc_probe(radeon_connector); |
516 | radeon_i2c_do_lock(radeon_connector, 0); | 558 | radeon_i2c_do_lock(radeon_connector, 0); |
517 | if (dret) | 559 | if (dret) { |
518 | ret = connector_status_connected; | 560 | if (radeon_connector->edid) { |
519 | else { | 561 | kfree(radeon_connector->edid); |
562 | radeon_connector->edid = NULL; | ||
563 | } | ||
564 | radeon_i2c_do_lock(radeon_connector, 1); | ||
565 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | ||
566 | radeon_i2c_do_lock(radeon_connector, 0); | ||
567 | |||
568 | if (!radeon_connector->edid) { | ||
569 | DRM_ERROR("DDC responded but not EDID found for %s\n", | ||
570 | drm_get_connector_name(connector)); | ||
571 | } else { | ||
572 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | ||
573 | |||
574 | /* some oems have boards with separate digital and analog connectors | ||
575 | * with a shared ddc line (often vga + hdmi) | ||
576 | */ | ||
577 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | ||
578 | kfree(radeon_connector->edid); | ||
579 | radeon_connector->edid = NULL; | ||
580 | ret = connector_status_disconnected; | ||
581 | } else | ||
582 | ret = connector_status_connected; | ||
583 | } | ||
584 | } else { | ||
520 | if (radeon_connector->dac_load_detect) { | 585 | if (radeon_connector->dac_load_detect) { |
521 | encoder_funcs = encoder->helper_private; | 586 | encoder_funcs = encoder->helper_private; |
522 | ret = encoder_funcs->detect(encoder, connector); | 587 | ret = encoder_funcs->detect(encoder, connector); |
@@ -570,6 +635,8 @@ static int radeon_tv_get_modes(struct drm_connector *connector) | |||
570 | static int radeon_tv_mode_valid(struct drm_connector *connector, | 635 | static int radeon_tv_mode_valid(struct drm_connector *connector, |
571 | struct drm_display_mode *mode) | 636 | struct drm_display_mode *mode) |
572 | { | 637 | { |
638 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) | ||
639 | return MODE_CLOCK_RANGE; | ||
573 | return MODE_OK; | 640 | return MODE_OK; |
574 | } | 641 | } |
575 | 642 | ||
@@ -644,6 +711,10 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect | |||
644 | dret = radeon_ddc_probe(radeon_connector); | 711 | dret = radeon_ddc_probe(radeon_connector); |
645 | radeon_i2c_do_lock(radeon_connector, 0); | 712 | radeon_i2c_do_lock(radeon_connector, 0); |
646 | if (dret) { | 713 | if (dret) { |
714 | if (radeon_connector->edid) { | ||
715 | kfree(radeon_connector->edid); | ||
716 | radeon_connector->edid = NULL; | ||
717 | } | ||
647 | radeon_i2c_do_lock(radeon_connector, 1); | 718 | radeon_i2c_do_lock(radeon_connector, 1); |
648 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | 719 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
649 | radeon_i2c_do_lock(radeon_connector, 0); | 720 | radeon_i2c_do_lock(radeon_connector, 0); |
@@ -654,10 +725,15 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect | |||
654 | } else { | 725 | } else { |
655 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | 726 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); |
656 | 727 | ||
657 | /* if this isn't a digital monitor | 728 | /* some oems have boards with separate digital and analog connectors |
658 | then we need to make sure we don't have any | 729 | * with a shared ddc line (often vga + hdmi) |
659 | TV conflicts */ | 730 | */ |
660 | ret = connector_status_connected; | 731 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { |
732 | kfree(radeon_connector->edid); | ||
733 | radeon_connector->edid = NULL; | ||
734 | ret = connector_status_disconnected; | ||
735 | } else | ||
736 | ret = connector_status_connected; | ||
661 | } | 737 | } |
662 | } | 738 | } |
663 | 739 | ||
@@ -753,9 +829,27 @@ static void radeon_dvi_force(struct drm_connector *connector) | |||
753 | radeon_connector->use_digital = true; | 829 | radeon_connector->use_digital = true; |
754 | } | 830 | } |
755 | 831 | ||
832 | static int radeon_dvi_mode_valid(struct drm_connector *connector, | ||
833 | struct drm_display_mode *mode) | ||
834 | { | ||
835 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | ||
836 | |||
837 | /* XXX check mode bandwidth */ | ||
838 | |||
839 | if (radeon_connector->use_digital && (mode->clock > 165000)) { | ||
840 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | ||
841 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | ||
842 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | ||
843 | return MODE_OK; | ||
844 | else | ||
845 | return MODE_CLOCK_HIGH; | ||
846 | } | ||
847 | return MODE_OK; | ||
848 | } | ||
849 | |||
756 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { | 850 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
757 | .get_modes = radeon_dvi_get_modes, | 851 | .get_modes = radeon_dvi_get_modes, |
758 | .mode_valid = radeon_vga_mode_valid, | 852 | .mode_valid = radeon_dvi_mode_valid, |
759 | .best_encoder = radeon_dvi_encoder, | 853 | .best_encoder = radeon_dvi_encoder, |
760 | }; | 854 | }; |
761 | 855 | ||
@@ -775,13 +869,15 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
775 | int connector_type, | 869 | int connector_type, |
776 | struct radeon_i2c_bus_rec *i2c_bus, | 870 | struct radeon_i2c_bus_rec *i2c_bus, |
777 | bool linkb, | 871 | bool linkb, |
778 | uint32_t igp_lane_info) | 872 | uint32_t igp_lane_info, |
873 | uint16_t connector_object_id) | ||
779 | { | 874 | { |
780 | struct radeon_device *rdev = dev->dev_private; | 875 | struct radeon_device *rdev = dev->dev_private; |
781 | struct drm_connector *connector; | 876 | struct drm_connector *connector; |
782 | struct radeon_connector *radeon_connector; | 877 | struct radeon_connector *radeon_connector; |
783 | struct radeon_connector_atom_dig *radeon_dig_connector; | 878 | struct radeon_connector_atom_dig *radeon_dig_connector; |
784 | uint32_t subpixel_order = SubPixelNone; | 879 | uint32_t subpixel_order = SubPixelNone; |
880 | bool shared_ddc = false; | ||
785 | int ret; | 881 | int ret; |
786 | 882 | ||
787 | /* fixme - tv/cv/din */ | 883 | /* fixme - tv/cv/din */ |
@@ -795,6 +891,13 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
795 | radeon_connector->devices |= supported_device; | 891 | radeon_connector->devices |= supported_device; |
796 | return; | 892 | return; |
797 | } | 893 | } |
894 | if (radeon_connector->ddc_bus && i2c_bus->valid) { | ||
895 | if (memcmp(&radeon_connector->ddc_bus->rec, i2c_bus, | ||
896 | sizeof(struct radeon_i2c_bus_rec)) == 0) { | ||
897 | radeon_connector->shared_ddc = true; | ||
898 | shared_ddc = true; | ||
899 | } | ||
900 | } | ||
798 | } | 901 | } |
799 | 902 | ||
800 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | 903 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
@@ -805,6 +908,8 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
805 | 908 | ||
806 | radeon_connector->connector_id = connector_id; | 909 | radeon_connector->connector_id = connector_id; |
807 | radeon_connector->devices = supported_device; | 910 | radeon_connector->devices = supported_device; |
911 | radeon_connector->shared_ddc = shared_ddc; | ||
912 | radeon_connector->connector_object_id = connector_object_id; | ||
808 | switch (connector_type) { | 913 | switch (connector_type) { |
809 | case DRM_MODE_CONNECTOR_VGA: | 914 | case DRM_MODE_CONNECTOR_VGA: |
810 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 915 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
@@ -956,7 +1061,8 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
956 | uint32_t connector_id, | 1061 | uint32_t connector_id, |
957 | uint32_t supported_device, | 1062 | uint32_t supported_device, |
958 | int connector_type, | 1063 | int connector_type, |
959 | struct radeon_i2c_bus_rec *i2c_bus) | 1064 | struct radeon_i2c_bus_rec *i2c_bus, |
1065 | uint16_t connector_object_id) | ||
960 | { | 1066 | { |
961 | struct radeon_device *rdev = dev->dev_private; | 1067 | struct radeon_device *rdev = dev->dev_private; |
962 | struct drm_connector *connector; | 1068 | struct drm_connector *connector; |
@@ -985,6 +1091,7 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
985 | 1091 | ||
986 | radeon_connector->connector_id = connector_id; | 1092 | radeon_connector->connector_id = connector_id; |
987 | radeon_connector->devices = supported_device; | 1093 | radeon_connector->devices = supported_device; |
1094 | radeon_connector->connector_object_id = connector_object_id; | ||
988 | switch (connector_type) { | 1095 | switch (connector_type) { |
989 | case DRM_MODE_CONNECTOR_VGA: | 1096 | case DRM_MODE_CONNECTOR_VGA: |
990 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 1097 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c index b13c79e38bc0..28772a37009c 100644 --- a/drivers/gpu/drm/radeon/radeon_cursor.c +++ b/drivers/gpu/drm/radeon/radeon_cursor.c | |||
@@ -109,9 +109,15 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj, | |||
109 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 109 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
110 | struct radeon_device *rdev = crtc->dev->dev_private; | 110 | struct radeon_device *rdev = crtc->dev->dev_private; |
111 | 111 | ||
112 | if (ASIC_IS_AVIVO(rdev)) | 112 | if (ASIC_IS_AVIVO(rdev)) { |
113 | if (rdev->family >= CHIP_RV770) { | ||
114 | if (radeon_crtc->crtc_id) | ||
115 | WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH, 0); | ||
116 | else | ||
117 | WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0); | ||
118 | } | ||
113 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); | 119 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
114 | else { | 120 | } else { |
115 | radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; | 121 | radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; |
116 | /* offset is from DISP(2)_BASE_ADDRESS */ | 122 | /* offset is from DISP(2)_BASE_ADDRESS */ |
117 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); | 123 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index df988142e6b0..e3f9edfa40fe 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -444,20 +444,24 @@ static uint32_t cail_reg_read(struct card_info *info, uint32_t reg) | |||
444 | return r; | 444 | return r; |
445 | } | 445 | } |
446 | 446 | ||
447 | static struct card_info atom_card_info = { | ||
448 | .dev = NULL, | ||
449 | .reg_read = cail_reg_read, | ||
450 | .reg_write = cail_reg_write, | ||
451 | .mc_read = cail_mc_read, | ||
452 | .mc_write = cail_mc_write, | ||
453 | .pll_read = cail_pll_read, | ||
454 | .pll_write = cail_pll_write, | ||
455 | }; | ||
456 | |||
457 | int radeon_atombios_init(struct radeon_device *rdev) | 447 | int radeon_atombios_init(struct radeon_device *rdev) |
458 | { | 448 | { |
459 | atom_card_info.dev = rdev->ddev; | 449 | struct card_info *atom_card_info = |
460 | rdev->mode_info.atom_context = atom_parse(&atom_card_info, rdev->bios); | 450 | kzalloc(sizeof(struct card_info), GFP_KERNEL); |
451 | |||
452 | if (!atom_card_info) | ||
453 | return -ENOMEM; | ||
454 | |||
455 | rdev->mode_info.atom_card_info = atom_card_info; | ||
456 | atom_card_info->dev = rdev->ddev; | ||
457 | atom_card_info->reg_read = cail_reg_read; | ||
458 | atom_card_info->reg_write = cail_reg_write; | ||
459 | atom_card_info->mc_read = cail_mc_read; | ||
460 | atom_card_info->mc_write = cail_mc_write; | ||
461 | atom_card_info->pll_read = cail_pll_read; | ||
462 | atom_card_info->pll_write = cail_pll_write; | ||
463 | |||
464 | rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios); | ||
461 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); | 465 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); |
462 | return 0; | 466 | return 0; |
463 | } | 467 | } |
@@ -465,6 +469,7 @@ int radeon_atombios_init(struct radeon_device *rdev) | |||
465 | void radeon_atombios_fini(struct radeon_device *rdev) | 469 | void radeon_atombios_fini(struct radeon_device *rdev) |
466 | { | 470 | { |
467 | kfree(rdev->mode_info.atom_context); | 471 | kfree(rdev->mode_info.atom_context); |
472 | kfree(rdev->mode_info.atom_card_info); | ||
468 | } | 473 | } |
469 | 474 | ||
470 | int radeon_combios_init(struct radeon_device *rdev) | 475 | int radeon_combios_init(struct radeon_device *rdev) |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 3655d91993a6..c85df4afcb7a 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -137,9 +137,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
137 | if (size != 256) { | 137 | if (size != 256) { |
138 | return; | 138 | return; |
139 | } | 139 | } |
140 | if (crtc->fb == NULL) { | ||
141 | return; | ||
142 | } | ||
143 | 140 | ||
144 | /* userspace palettes are always correct as is */ | 141 | /* userspace palettes are always correct as is */ |
145 | for (i = 0; i < 256; i++) { | 142 | for (i = 0; i < 256; i++) { |
@@ -147,7 +144,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
147 | radeon_crtc->lut_g[i] = green[i] >> 6; | 144 | radeon_crtc->lut_g[i] = green[i] >> 6; |
148 | radeon_crtc->lut_b[i] = blue[i] >> 6; | 145 | radeon_crtc->lut_b[i] = blue[i] >> 6; |
149 | } | 146 | } |
150 | |||
151 | radeon_crtc_load_lut(crtc); | 147 | radeon_crtc_load_lut(crtc); |
152 | } | 148 | } |
153 | 149 | ||
@@ -338,27 +334,19 @@ static bool radeon_setup_enc_conn(struct drm_device *dev) | |||
338 | 334 | ||
339 | int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) | 335 | int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) |
340 | { | 336 | { |
341 | struct edid *edid; | ||
342 | int ret = 0; | 337 | int ret = 0; |
343 | 338 | ||
344 | if (!radeon_connector->ddc_bus) | 339 | if (!radeon_connector->ddc_bus) |
345 | return -1; | 340 | return -1; |
346 | if (!radeon_connector->edid) { | 341 | if (!radeon_connector->edid) { |
347 | radeon_i2c_do_lock(radeon_connector, 1); | 342 | radeon_i2c_do_lock(radeon_connector, 1); |
348 | edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | 343 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
349 | radeon_i2c_do_lock(radeon_connector, 0); | 344 | radeon_i2c_do_lock(radeon_connector, 0); |
350 | } else | 345 | } |
351 | edid = radeon_connector->edid; | ||
352 | 346 | ||
353 | if (edid) { | 347 | if (radeon_connector->edid) { |
354 | /* update digital bits here */ | 348 | drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid); |
355 | if (edid->input & DRM_EDID_INPUT_DIGITAL) | 349 | ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid); |
356 | radeon_connector->use_digital = 1; | ||
357 | else | ||
358 | radeon_connector->use_digital = 0; | ||
359 | drm_mode_connector_update_edid_property(&radeon_connector->base, edid); | ||
360 | ret = drm_add_edid_modes(&radeon_connector->base, edid); | ||
361 | kfree(edid); | ||
362 | return ret; | 350 | return ret; |
363 | } | 351 | } |
364 | drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); | 352 | drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); |
@@ -765,7 +753,7 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | |||
765 | radeon_crtc->rmx_type = radeon_encoder->rmx_type; | 753 | radeon_crtc->rmx_type = radeon_encoder->rmx_type; |
766 | memcpy(&radeon_crtc->native_mode, | 754 | memcpy(&radeon_crtc->native_mode, |
767 | &radeon_encoder->native_mode, | 755 | &radeon_encoder->native_mode, |
768 | sizeof(struct radeon_native_mode)); | 756 | sizeof(struct drm_display_mode)); |
769 | first = false; | 757 | first = false; |
770 | } else { | 758 | } else { |
771 | if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { | 759 | if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { |
@@ -783,10 +771,10 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | |||
783 | if (radeon_crtc->rmx_type != RMX_OFF) { | 771 | if (radeon_crtc->rmx_type != RMX_OFF) { |
784 | fixed20_12 a, b; | 772 | fixed20_12 a, b; |
785 | a.full = rfixed_const(crtc->mode.vdisplay); | 773 | a.full = rfixed_const(crtc->mode.vdisplay); |
786 | b.full = rfixed_const(radeon_crtc->native_mode.panel_xres); | 774 | b.full = rfixed_const(radeon_crtc->native_mode.hdisplay); |
787 | radeon_crtc->vsc.full = rfixed_div(a, b); | 775 | radeon_crtc->vsc.full = rfixed_div(a, b); |
788 | a.full = rfixed_const(crtc->mode.hdisplay); | 776 | a.full = rfixed_const(crtc->mode.hdisplay); |
789 | b.full = rfixed_const(radeon_crtc->native_mode.panel_yres); | 777 | b.full = rfixed_const(radeon_crtc->native_mode.vdisplay); |
790 | radeon_crtc->hsc.full = rfixed_div(a, b); | 778 | radeon_crtc->hsc.full = rfixed_div(a, b); |
791 | } else { | 779 | } else { |
792 | radeon_crtc->vsc.full = rfixed_const(1); | 780 | radeon_crtc->vsc.full = rfixed_const(1); |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index a65ab1a0dad2..d42bc512d75a 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -31,6 +31,10 @@ | |||
31 | 31 | ||
32 | extern int atom_debug; | 32 | extern int atom_debug; |
33 | 33 | ||
34 | /* evil but including atombios.h is much worse */ | ||
35 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | ||
36 | struct drm_display_mode *mode); | ||
37 | |||
34 | uint32_t | 38 | uint32_t |
35 | radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) | 39 | radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) |
36 | { | 40 | { |
@@ -167,49 +171,17 @@ void radeon_rmx_mode_fixup(struct drm_encoder *encoder, | |||
167 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 171 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
168 | struct drm_device *dev = encoder->dev; | 172 | struct drm_device *dev = encoder->dev; |
169 | struct radeon_device *rdev = dev->dev_private; | 173 | struct radeon_device *rdev = dev->dev_private; |
170 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 174 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
171 | 175 | ||
172 | if (mode->hdisplay < native_mode->panel_xres || | 176 | if (mode->hdisplay < native_mode->hdisplay || |
173 | mode->vdisplay < native_mode->panel_yres) { | 177 | mode->vdisplay < native_mode->vdisplay) { |
174 | if (ASIC_IS_AVIVO(rdev)) { | 178 | int mode_id = adjusted_mode->base.id; |
175 | adjusted_mode->hdisplay = native_mode->panel_xres; | 179 | *adjusted_mode = *native_mode; |
176 | adjusted_mode->vdisplay = native_mode->panel_yres; | 180 | if (!ASIC_IS_AVIVO(rdev)) { |
177 | adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank; | 181 | adjusted_mode->hdisplay = mode->hdisplay; |
178 | adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus; | 182 | adjusted_mode->vdisplay = mode->vdisplay; |
179 | adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width; | ||
180 | adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank; | ||
181 | adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus; | ||
182 | adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width; | ||
183 | /* update crtc values */ | ||
184 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); | ||
185 | /* adjust crtc values */ | ||
186 | adjusted_mode->crtc_hdisplay = native_mode->panel_xres; | ||
187 | adjusted_mode->crtc_vdisplay = native_mode->panel_yres; | ||
188 | adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank; | ||
189 | adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus; | ||
190 | adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width; | ||
191 | adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank; | ||
192 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus; | ||
193 | adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width; | ||
194 | } else { | ||
195 | adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank; | ||
196 | adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus; | ||
197 | adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width; | ||
198 | adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank; | ||
199 | adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus; | ||
200 | adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width; | ||
201 | /* update crtc values */ | ||
202 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); | ||
203 | /* adjust crtc values */ | ||
204 | adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank; | ||
205 | adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus; | ||
206 | adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width; | ||
207 | adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank; | ||
208 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus; | ||
209 | adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width; | ||
210 | } | 183 | } |
211 | adjusted_mode->flags = native_mode->flags; | 184 | adjusted_mode->base.id = mode_id; |
212 | adjusted_mode->clock = native_mode->dotclock; | ||
213 | } | 185 | } |
214 | } | 186 | } |
215 | 187 | ||
@@ -219,7 +191,11 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, | |||
219 | struct drm_display_mode *adjusted_mode) | 191 | struct drm_display_mode *adjusted_mode) |
220 | { | 192 | { |
221 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 193 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
194 | struct drm_device *dev = encoder->dev; | ||
195 | struct radeon_device *rdev = dev->dev_private; | ||
222 | 196 | ||
197 | /* set the active encoder to connector routing */ | ||
198 | radeon_encoder_set_active_device(encoder); | ||
223 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 199 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
224 | 200 | ||
225 | if (radeon_encoder->rmx_type != RMX_OFF) | 201 | if (radeon_encoder->rmx_type != RMX_OFF) |
@@ -230,6 +206,18 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, | |||
230 | && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) | 206 | && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) |
231 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2; | 207 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2; |
232 | 208 | ||
209 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) { | ||
210 | struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv; | ||
211 | if (tv_dac) { | ||
212 | if (tv_dac->tv_std == TV_STD_NTSC || | ||
213 | tv_dac->tv_std == TV_STD_NTSC_J || | ||
214 | tv_dac->tv_std == TV_STD_PAL_M) | ||
215 | radeon_atom_get_tv_timings(rdev, 0, adjusted_mode); | ||
216 | else | ||
217 | radeon_atom_get_tv_timings(rdev, 1, adjusted_mode); | ||
218 | } | ||
219 | } | ||
220 | |||
233 | return true; | 221 | return true; |
234 | } | 222 | } |
235 | 223 | ||
@@ -461,7 +449,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
461 | case 1: | 449 | case 1: |
462 | args.v1.ucMisc = 0; | 450 | args.v1.ucMisc = 0; |
463 | args.v1.ucAction = action; | 451 | args.v1.ucAction = action; |
464 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 452 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
465 | args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; | 453 | args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
466 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | 454 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
467 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 455 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
@@ -486,7 +474,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
486 | if (dig->coherent_mode) | 474 | if (dig->coherent_mode) |
487 | args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; | 475 | args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; |
488 | } | 476 | } |
489 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 477 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
490 | args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; | 478 | args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
491 | args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | 479 | args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
492 | args.v2.ucTruncate = 0; | 480 | args.v2.ucTruncate = 0; |
@@ -544,7 +532,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
544 | switch (connector->connector_type) { | 532 | switch (connector->connector_type) { |
545 | case DRM_MODE_CONNECTOR_DVII: | 533 | case DRM_MODE_CONNECTOR_DVII: |
546 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ | 534 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ |
547 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 535 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
548 | return ATOM_ENCODER_MODE_HDMI; | 536 | return ATOM_ENCODER_MODE_HDMI; |
549 | else if (radeon_connector->use_digital) | 537 | else if (radeon_connector->use_digital) |
550 | return ATOM_ENCODER_MODE_DVI; | 538 | return ATOM_ENCODER_MODE_DVI; |
@@ -554,7 +542,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
554 | case DRM_MODE_CONNECTOR_DVID: | 542 | case DRM_MODE_CONNECTOR_DVID: |
555 | case DRM_MODE_CONNECTOR_HDMIA: | 543 | case DRM_MODE_CONNECTOR_HDMIA: |
556 | default: | 544 | default: |
557 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 545 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
558 | return ATOM_ENCODER_MODE_HDMI; | 546 | return ATOM_ENCODER_MODE_HDMI; |
559 | else | 547 | else |
560 | return ATOM_ENCODER_MODE_DVI; | 548 | return ATOM_ENCODER_MODE_DVI; |
@@ -566,7 +554,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
566 | /*if (radeon_output->MonType == MT_DP) | 554 | /*if (radeon_output->MonType == MT_DP) |
567 | return ATOM_ENCODER_MODE_DP; | 555 | return ATOM_ENCODER_MODE_DP; |
568 | else*/ | 556 | else*/ |
569 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 557 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
570 | return ATOM_ENCODER_MODE_HDMI; | 558 | return ATOM_ENCODER_MODE_HDMI; |
571 | else | 559 | else |
572 | return ATOM_ENCODER_MODE_DVI; | 560 | return ATOM_ENCODER_MODE_DVI; |
@@ -734,14 +722,17 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action) | |||
734 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); | 722 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); |
735 | 723 | ||
736 | args.v1.ucAction = action; | 724 | args.v1.ucAction = action; |
737 | 725 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { | |
726 | args.v1.usInitInfo = radeon_connector->connector_object_id; | ||
727 | } else { | ||
728 | if (radeon_encoder->pixel_clock > 165000) | ||
729 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | ||
730 | else | ||
731 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | ||
732 | } | ||
738 | if (ASIC_IS_DCE32(rdev)) { | 733 | if (ASIC_IS_DCE32(rdev)) { |
739 | if (radeon_encoder->pixel_clock > 165000) { | 734 | if (radeon_encoder->pixel_clock > 165000) |
740 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 2) / 100); | 735 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
741 | args.v2.acConfig.fDualLinkConnector = 1; | ||
742 | } else { | ||
743 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 4) / 100); | ||
744 | } | ||
745 | if (dig->dig_block) | 736 | if (dig->dig_block) |
746 | args.v2.acConfig.ucEncoderSel = 1; | 737 | args.v2.acConfig.ucEncoderSel = 1; |
747 | 738 | ||
@@ -766,7 +757,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action) | |||
766 | } | 757 | } |
767 | } else { | 758 | } else { |
768 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; | 759 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; |
769 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock) / 10); | ||
770 | 760 | ||
771 | switch (radeon_encoder->encoder_id) { | 761 | switch (radeon_encoder->encoder_id) { |
772 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 762 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
@@ -874,16 +864,9 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
874 | DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args; | 864 | DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args; |
875 | int index = 0; | 865 | int index = 0; |
876 | bool is_dig = false; | 866 | bool is_dig = false; |
877 | int devices; | ||
878 | 867 | ||
879 | memset(&args, 0, sizeof(args)); | 868 | memset(&args, 0, sizeof(args)); |
880 | 869 | ||
881 | /* on DPMS off we have no idea if active device is meaningful */ | ||
882 | if (mode != DRM_MODE_DPMS_ON && !radeon_encoder->active_device) | ||
883 | devices = radeon_encoder->devices; | ||
884 | else | ||
885 | devices = radeon_encoder->active_device; | ||
886 | |||
887 | DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", | 870 | DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", |
888 | radeon_encoder->encoder_id, mode, radeon_encoder->devices, | 871 | radeon_encoder->encoder_id, mode, radeon_encoder->devices, |
889 | radeon_encoder->active_device); | 872 | radeon_encoder->active_device); |
@@ -914,18 +897,18 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
914 | break; | 897 | break; |
915 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 898 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
916 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: | 899 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
917 | if (devices & (ATOM_DEVICE_TV_SUPPORT)) | 900 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
918 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); | 901 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); |
919 | else if (devices & (ATOM_DEVICE_CV_SUPPORT)) | 902 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
920 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); | 903 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); |
921 | else | 904 | else |
922 | index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl); | 905 | index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl); |
923 | break; | 906 | break; |
924 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: | 907 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
925 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: | 908 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: |
926 | if (devices & (ATOM_DEVICE_TV_SUPPORT)) | 909 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
927 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); | 910 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); |
928 | else if (devices & (ATOM_DEVICE_CV_SUPPORT)) | 911 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
929 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); | 912 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); |
930 | else | 913 | else |
931 | index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); | 914 | index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); |
@@ -1104,8 +1087,11 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder, | |||
1104 | } | 1087 | } |
1105 | 1088 | ||
1106 | /* set scaler clears this on some chips */ | 1089 | /* set scaler clears this on some chips */ |
1107 | if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) | 1090 | if (!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))) { |
1108 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, AVIVO_D1MODE_INTERLEAVE_EN); | 1091 | if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) |
1092 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, | ||
1093 | AVIVO_D1MODE_INTERLEAVE_EN); | ||
1094 | } | ||
1109 | } | 1095 | } |
1110 | 1096 | ||
1111 | static void | 1097 | static void |
@@ -1153,6 +1139,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, | |||
1153 | 1139 | ||
1154 | /* setup and enable the encoder and transmitter */ | 1140 | /* setup and enable the encoder and transmitter */ |
1155 | atombios_dig_encoder_setup(encoder, ATOM_ENABLE); | 1141 | atombios_dig_encoder_setup(encoder, ATOM_ENABLE); |
1142 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT); | ||
1156 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP); | 1143 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP); |
1157 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE); | 1144 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE); |
1158 | break; | 1145 | break; |
@@ -1268,8 +1255,6 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) | |||
1268 | { | 1255 | { |
1269 | radeon_atom_output_lock(encoder, true); | 1256 | radeon_atom_output_lock(encoder, true); |
1270 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); | 1257 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); |
1271 | |||
1272 | radeon_encoder_set_active_device(encoder); | ||
1273 | } | 1258 | } |
1274 | 1259 | ||
1275 | static void radeon_atom_encoder_commit(struct drm_encoder *encoder) | 1260 | static void radeon_atom_encoder_commit(struct drm_encoder *encoder) |
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index a931af065dd4..a68d7566178c 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c | |||
@@ -140,15 +140,15 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset, | |||
140 | WARN(1, "trying to unbind memory to unitialized GART !\n"); | 140 | WARN(1, "trying to unbind memory to unitialized GART !\n"); |
141 | return; | 141 | return; |
142 | } | 142 | } |
143 | t = offset / 4096; | 143 | t = offset / RADEON_GPU_PAGE_SIZE; |
144 | p = t / (PAGE_SIZE / 4096); | 144 | p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); |
145 | for (i = 0; i < pages; i++, p++) { | 145 | for (i = 0; i < pages; i++, p++) { |
146 | if (rdev->gart.pages[p]) { | 146 | if (rdev->gart.pages[p]) { |
147 | pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], | 147 | pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], |
148 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); | 148 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
149 | rdev->gart.pages[p] = NULL; | 149 | rdev->gart.pages[p] = NULL; |
150 | rdev->gart.pages_addr[p] = 0; | 150 | rdev->gart.pages_addr[p] = 0; |
151 | for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { | 151 | for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { |
152 | radeon_gart_set_page(rdev, t, 0); | 152 | radeon_gart_set_page(rdev, t, 0); |
153 | } | 153 | } |
154 | } | 154 | } |
@@ -169,8 +169,8 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, | |||
169 | DRM_ERROR("trying to bind memory to unitialized GART !\n"); | 169 | DRM_ERROR("trying to bind memory to unitialized GART !\n"); |
170 | return -EINVAL; | 170 | return -EINVAL; |
171 | } | 171 | } |
172 | t = offset / 4096; | 172 | t = offset / RADEON_GPU_PAGE_SIZE; |
173 | p = t / (PAGE_SIZE / 4096); | 173 | p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); |
174 | 174 | ||
175 | for (i = 0; i < pages; i++, p++) { | 175 | for (i = 0; i < pages; i++, p++) { |
176 | /* we need to support large memory configurations */ | 176 | /* we need to support large memory configurations */ |
@@ -185,9 +185,9 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, | |||
185 | } | 185 | } |
186 | rdev->gart.pages[p] = pagelist[i]; | 186 | rdev->gart.pages[p] = pagelist[i]; |
187 | page_base = rdev->gart.pages_addr[p]; | 187 | page_base = rdev->gart.pages_addr[p]; |
188 | for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { | 188 | for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { |
189 | radeon_gart_set_page(rdev, t, page_base); | 189 | radeon_gart_set_page(rdev, t, page_base); |
190 | page_base += 4096; | 190 | page_base += RADEON_GPU_PAGE_SIZE; |
191 | } | 191 | } |
192 | } | 192 | } |
193 | mb(); | 193 | mb(); |
@@ -200,14 +200,14 @@ int radeon_gart_init(struct radeon_device *rdev) | |||
200 | if (rdev->gart.pages) { | 200 | if (rdev->gart.pages) { |
201 | return 0; | 201 | return 0; |
202 | } | 202 | } |
203 | /* We need PAGE_SIZE >= 4096 */ | 203 | /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */ |
204 | if (PAGE_SIZE < 4096) { | 204 | if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) { |
205 | DRM_ERROR("Page size is smaller than GPU page size!\n"); | 205 | DRM_ERROR("Page size is smaller than GPU page size!\n"); |
206 | return -EINVAL; | 206 | return -EINVAL; |
207 | } | 207 | } |
208 | /* Compute table size */ | 208 | /* Compute table size */ |
209 | rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; | 209 | rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; |
210 | rdev->gart.num_gpu_pages = rdev->mc.gtt_size / 4096; | 210 | rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE; |
211 | DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", | 211 | DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", |
212 | rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); | 212 | rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); |
213 | /* Allocate pages table */ | 213 | /* Allocate pages table */ |
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index 8e0a8759e428..a0fe6232dcb6 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c | |||
@@ -92,6 +92,13 @@ int radeon_irq_kms_init(struct radeon_device *rdev) | |||
92 | if (r) { | 92 | if (r) { |
93 | return r; | 93 | return r; |
94 | } | 94 | } |
95 | /* enable msi */ | ||
96 | rdev->msi_enabled = 0; | ||
97 | if (rdev->family >= CHIP_RV380) { | ||
98 | int ret = pci_enable_msi(rdev->pdev); | ||
99 | if (!ret) | ||
100 | rdev->msi_enabled = 1; | ||
101 | } | ||
95 | drm_irq_install(rdev->ddev); | 102 | drm_irq_install(rdev->ddev); |
96 | rdev->irq.installed = true; | 103 | rdev->irq.installed = true; |
97 | DRM_INFO("radeon: irq initialized.\n"); | 104 | DRM_INFO("radeon: irq initialized.\n"); |
@@ -103,5 +110,7 @@ void radeon_irq_kms_fini(struct radeon_device *rdev) | |||
103 | if (rdev->irq.installed) { | 110 | if (rdev->irq.installed) { |
104 | rdev->irq.installed = false; | 111 | rdev->irq.installed = false; |
105 | drm_irq_uninstall(rdev->ddev); | 112 | drm_irq_uninstall(rdev->ddev); |
113 | if (rdev->msi_enabled) | ||
114 | pci_disable_msi(rdev->pdev); | ||
106 | } | 115 | } |
107 | } | 116 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 36410f85d705..8d0b7aa87fa4 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -48,7 +48,7 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
48 | u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active; | 48 | u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active; |
49 | u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp; | 49 | u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp; |
50 | u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp; | 50 | u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp; |
51 | struct radeon_native_mode *native_mode = &radeon_crtc->native_mode; | 51 | struct drm_display_mode *native_mode = &radeon_crtc->native_mode; |
52 | 52 | ||
53 | fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) & | 53 | fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) & |
54 | (RADEON_VERT_STRETCH_RESERVED | | 54 | (RADEON_VERT_STRETCH_RESERVED | |
@@ -95,19 +95,19 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
95 | 95 | ||
96 | fp_horz_vert_active = 0; | 96 | fp_horz_vert_active = 0; |
97 | 97 | ||
98 | if (native_mode->panel_xres == 0 || | 98 | if (native_mode->hdisplay == 0 || |
99 | native_mode->panel_yres == 0) { | 99 | native_mode->vdisplay == 0) { |
100 | hscale = false; | 100 | hscale = false; |
101 | vscale = false; | 101 | vscale = false; |
102 | } else { | 102 | } else { |
103 | if (xres > native_mode->panel_xres) | 103 | if (xres > native_mode->hdisplay) |
104 | xres = native_mode->panel_xres; | 104 | xres = native_mode->hdisplay; |
105 | if (yres > native_mode->panel_yres) | 105 | if (yres > native_mode->vdisplay) |
106 | yres = native_mode->panel_yres; | 106 | yres = native_mode->vdisplay; |
107 | 107 | ||
108 | if (xres == native_mode->panel_xres) | 108 | if (xres == native_mode->hdisplay) |
109 | hscale = false; | 109 | hscale = false; |
110 | if (yres == native_mode->panel_yres) | 110 | if (yres == native_mode->vdisplay) |
111 | vscale = false; | 111 | vscale = false; |
112 | } | 112 | } |
113 | 113 | ||
@@ -119,11 +119,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
119 | else { | 119 | else { |
120 | inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0; | 120 | inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0; |
121 | scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX) | 121 | scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX) |
122 | / native_mode->panel_xres + 1; | 122 | / native_mode->hdisplay + 1; |
123 | fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) | | 123 | fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) | |
124 | RADEON_HORZ_STRETCH_BLEND | | 124 | RADEON_HORZ_STRETCH_BLEND | |
125 | RADEON_HORZ_STRETCH_ENABLE | | 125 | RADEON_HORZ_STRETCH_ENABLE | |
126 | ((native_mode->panel_xres/8-1) << 16)); | 126 | ((native_mode->hdisplay/8-1) << 16)); |
127 | } | 127 | } |
128 | 128 | ||
129 | if (!vscale) | 129 | if (!vscale) |
@@ -131,11 +131,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
131 | else { | 131 | else { |
132 | inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0; | 132 | inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0; |
133 | scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX) | 133 | scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX) |
134 | / native_mode->panel_yres + 1; | 134 | / native_mode->vdisplay + 1; |
135 | fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) | | 135 | fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) | |
136 | RADEON_VERT_STRETCH_ENABLE | | 136 | RADEON_VERT_STRETCH_ENABLE | |
137 | RADEON_VERT_STRETCH_BLEND | | 137 | RADEON_VERT_STRETCH_BLEND | |
138 | ((native_mode->panel_yres-1) << 12)); | 138 | ((native_mode->vdisplay-1) << 12)); |
139 | } | 139 | } |
140 | break; | 140 | break; |
141 | case RMX_CENTER: | 141 | case RMX_CENTER: |
@@ -175,8 +175,8 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
175 | ? RADEON_CRTC_V_SYNC_POL | 175 | ? RADEON_CRTC_V_SYNC_POL |
176 | : 0))); | 176 | : 0))); |
177 | 177 | ||
178 | fp_horz_vert_active = (((native_mode->panel_yres) & 0xfff) | | 178 | fp_horz_vert_active = (((native_mode->vdisplay) & 0xfff) | |
179 | (((native_mode->panel_xres / 8) & 0x1ff) << 16)); | 179 | (((native_mode->hdisplay / 8) & 0x1ff) << 16)); |
180 | break; | 180 | break; |
181 | case RMX_OFF: | 181 | case RMX_OFF: |
182 | default: | 182 | default: |
@@ -532,6 +532,10 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
532 | radeon_fb = to_radeon_framebuffer(old_fb); | 532 | radeon_fb = to_radeon_framebuffer(old_fb); |
533 | radeon_gem_object_unpin(radeon_fb->obj); | 533 | radeon_gem_object_unpin(radeon_fb->obj); |
534 | } | 534 | } |
535 | |||
536 | /* Bytes per pixel may have changed */ | ||
537 | radeon_bandwidth_update(rdev); | ||
538 | |||
535 | return 0; | 539 | return 0; |
536 | } | 540 | } |
537 | 541 | ||
@@ -664,6 +668,9 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod | |||
664 | 668 | ||
665 | WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl); | 669 | WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl); |
666 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | 670 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
671 | |||
672 | WREG32(RADEON_FP_H2_SYNC_STRT_WID, crtc_h_sync_strt_wid); | ||
673 | WREG32(RADEON_FP_V2_SYNC_STRT_WID, crtc_v_sync_strt_wid); | ||
667 | } else { | 674 | } else { |
668 | uint32_t crtc_gen_cntl; | 675 | uint32_t crtc_gen_cntl; |
669 | uint32_t crtc_ext_cntl; | 676 | uint32_t crtc_ext_cntl; |
@@ -1015,14 +1022,11 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc, | |||
1015 | int x, int y, struct drm_framebuffer *old_fb) | 1022 | int x, int y, struct drm_framebuffer *old_fb) |
1016 | { | 1023 | { |
1017 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 1024 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
1018 | struct drm_device *dev = crtc->dev; | ||
1019 | struct radeon_device *rdev = dev->dev_private; | ||
1020 | 1025 | ||
1021 | /* TODO TV */ | 1026 | /* TODO TV */ |
1022 | radeon_crtc_set_base(crtc, x, y, old_fb); | 1027 | radeon_crtc_set_base(crtc, x, y, old_fb); |
1023 | radeon_set_crtc_timing(crtc, adjusted_mode); | 1028 | radeon_set_crtc_timing(crtc, adjusted_mode); |
1024 | radeon_set_pll(crtc, adjusted_mode); | 1029 | radeon_set_pll(crtc, adjusted_mode); |
1025 | radeon_bandwidth_update(rdev); | ||
1026 | if (radeon_crtc->crtc_id == 0) { | 1030 | if (radeon_crtc->crtc_id == 0) { |
1027 | radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); | 1031 | radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); |
1028 | } else { | 1032 | } else { |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 6ceb958fd194..00382122869b 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -107,8 +107,6 @@ static void radeon_legacy_lvds_prepare(struct drm_encoder *encoder) | |||
107 | else | 107 | else |
108 | radeon_combios_output_lock(encoder, true); | 108 | radeon_combios_output_lock(encoder, true); |
109 | radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF); | 109 | radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF); |
110 | |||
111 | radeon_encoder_set_active_device(encoder); | ||
112 | } | 110 | } |
113 | 111 | ||
114 | static void radeon_legacy_lvds_commit(struct drm_encoder *encoder) | 112 | static void radeon_legacy_lvds_commit(struct drm_encoder *encoder) |
@@ -192,6 +190,8 @@ static bool radeon_legacy_lvds_mode_fixup(struct drm_encoder *encoder, | |||
192 | { | 190 | { |
193 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 191 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
194 | 192 | ||
193 | /* set the active encoder to connector routing */ | ||
194 | radeon_encoder_set_active_device(encoder); | ||
195 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 195 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
196 | 196 | ||
197 | if (radeon_encoder->rmx_type != RMX_OFF) | 197 | if (radeon_encoder->rmx_type != RMX_OFF) |
@@ -218,7 +218,8 @@ static bool radeon_legacy_primary_dac_mode_fixup(struct drm_encoder *encoder, | |||
218 | struct drm_display_mode *mode, | 218 | struct drm_display_mode *mode, |
219 | struct drm_display_mode *adjusted_mode) | 219 | struct drm_display_mode *adjusted_mode) |
220 | { | 220 | { |
221 | 221 | /* set the active encoder to connector routing */ | |
222 | radeon_encoder_set_active_device(encoder); | ||
222 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 223 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
223 | 224 | ||
224 | return true; | 225 | return true; |
@@ -272,7 +273,6 @@ static void radeon_legacy_primary_dac_prepare(struct drm_encoder *encoder) | |||
272 | else | 273 | else |
273 | radeon_combios_output_lock(encoder, true); | 274 | radeon_combios_output_lock(encoder, true); |
274 | radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF); | 275 | radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF); |
275 | radeon_encoder_set_active_device(encoder); | ||
276 | } | 276 | } |
277 | 277 | ||
278 | static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder) | 278 | static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder) |
@@ -468,7 +468,6 @@ static void radeon_legacy_tmds_int_prepare(struct drm_encoder *encoder) | |||
468 | else | 468 | else |
469 | radeon_combios_output_lock(encoder, true); | 469 | radeon_combios_output_lock(encoder, true); |
470 | radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF); | 470 | radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF); |
471 | radeon_encoder_set_active_device(encoder); | ||
472 | } | 471 | } |
473 | 472 | ||
474 | static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder) | 473 | static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder) |
@@ -543,6 +542,14 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder, | |||
543 | 542 | ||
544 | fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN); | 543 | fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN); |
545 | 544 | ||
545 | fp_gen_cntl &= ~(RADEON_FP_RMX_HVSYNC_CONTROL_EN | | ||
546 | RADEON_FP_DFP_SYNC_SEL | | ||
547 | RADEON_FP_CRT_SYNC_SEL | | ||
548 | RADEON_FP_CRTC_LOCK_8DOT | | ||
549 | RADEON_FP_USE_SHADOW_EN | | ||
550 | RADEON_FP_CRTC_USE_SHADOW_VEND | | ||
551 | RADEON_FP_CRT_SYNC_ALT); | ||
552 | |||
546 | if (1) /* FIXME rgbBits == 8 */ | 553 | if (1) /* FIXME rgbBits == 8 */ |
547 | fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */ | 554 | fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */ |
548 | else | 555 | else |
@@ -556,7 +563,7 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder, | |||
556 | else | 563 | else |
557 | fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; | 564 | fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; |
558 | } else | 565 | } else |
559 | fp_gen_cntl |= RADEON_FP_SEL_CRTC1; | 566 | fp_gen_cntl &= ~RADEON_FP_SEL_CRTC2; |
560 | } else { | 567 | } else { |
561 | if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { | 568 | if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { |
562 | fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; | 569 | fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; |
@@ -593,7 +600,8 @@ static bool radeon_legacy_tmds_ext_mode_fixup(struct drm_encoder *encoder, | |||
593 | struct drm_display_mode *mode, | 600 | struct drm_display_mode *mode, |
594 | struct drm_display_mode *adjusted_mode) | 601 | struct drm_display_mode *adjusted_mode) |
595 | { | 602 | { |
596 | 603 | /* set the active encoder to connector routing */ | |
604 | radeon_encoder_set_active_device(encoder); | ||
597 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 605 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
598 | 606 | ||
599 | return true; | 607 | return true; |
@@ -636,7 +644,6 @@ static void radeon_legacy_tmds_ext_prepare(struct drm_encoder *encoder) | |||
636 | else | 644 | else |
637 | radeon_combios_output_lock(encoder, true); | 645 | radeon_combios_output_lock(encoder, true); |
638 | radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF); | 646 | radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF); |
639 | radeon_encoder_set_active_device(encoder); | ||
640 | } | 647 | } |
641 | 648 | ||
642 | static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder) | 649 | static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder) |
@@ -735,7 +742,8 @@ static bool radeon_legacy_tv_dac_mode_fixup(struct drm_encoder *encoder, | |||
735 | struct drm_display_mode *mode, | 742 | struct drm_display_mode *mode, |
736 | struct drm_display_mode *adjusted_mode) | 743 | struct drm_display_mode *adjusted_mode) |
737 | { | 744 | { |
738 | 745 | /* set the active encoder to connector routing */ | |
746 | radeon_encoder_set_active_device(encoder); | ||
739 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 747 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
740 | 748 | ||
741 | return true; | 749 | return true; |
@@ -839,7 +847,6 @@ static void radeon_legacy_tv_dac_prepare(struct drm_encoder *encoder) | |||
839 | else | 847 | else |
840 | radeon_combios_output_lock(encoder, true); | 848 | radeon_combios_output_lock(encoder, true); |
841 | radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF); | 849 | radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF); |
842 | radeon_encoder_set_active_device(encoder); | ||
843 | } | 850 | } |
844 | 851 | ||
845 | static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder) | 852 | static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder) |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index e61226817ccf..ace726aa0d76 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -172,6 +172,7 @@ enum radeon_connector_table { | |||
172 | 172 | ||
173 | struct radeon_mode_info { | 173 | struct radeon_mode_info { |
174 | struct atom_context *atom_context; | 174 | struct atom_context *atom_context; |
175 | struct card_info *atom_card_info; | ||
175 | enum radeon_connector_table connector_table; | 176 | enum radeon_connector_table connector_table; |
176 | bool mode_config_initialized; | 177 | bool mode_config_initialized; |
177 | struct radeon_crtc *crtcs[2]; | 178 | struct radeon_crtc *crtcs[2]; |
@@ -186,17 +187,6 @@ struct radeon_mode_info { | |||
186 | 187 | ||
187 | }; | 188 | }; |
188 | 189 | ||
189 | struct radeon_native_mode { | ||
190 | /* preferred mode */ | ||
191 | uint32_t panel_xres, panel_yres; | ||
192 | uint32_t hoverplus, hsync_width; | ||
193 | uint32_t hblank; | ||
194 | uint32_t voverplus, vsync_width; | ||
195 | uint32_t vblank; | ||
196 | uint32_t dotclock; | ||
197 | uint32_t flags; | ||
198 | }; | ||
199 | |||
200 | #define MAX_H_CODE_TIMING_LEN 32 | 190 | #define MAX_H_CODE_TIMING_LEN 32 |
201 | #define MAX_V_CODE_TIMING_LEN 32 | 191 | #define MAX_V_CODE_TIMING_LEN 32 |
202 | 192 | ||
@@ -228,7 +218,7 @@ struct radeon_crtc { | |||
228 | enum radeon_rmx_type rmx_type; | 218 | enum radeon_rmx_type rmx_type; |
229 | fixed20_12 vsc; | 219 | fixed20_12 vsc; |
230 | fixed20_12 hsc; | 220 | fixed20_12 hsc; |
231 | struct radeon_native_mode native_mode; | 221 | struct drm_display_mode native_mode; |
232 | }; | 222 | }; |
233 | 223 | ||
234 | struct radeon_encoder_primary_dac { | 224 | struct radeon_encoder_primary_dac { |
@@ -248,7 +238,7 @@ struct radeon_encoder_lvds { | |||
248 | bool use_bios_dividers; | 238 | bool use_bios_dividers; |
249 | uint32_t lvds_gen_cntl; | 239 | uint32_t lvds_gen_cntl; |
250 | /* panel mode */ | 240 | /* panel mode */ |
251 | struct radeon_native_mode native_mode; | 241 | struct drm_display_mode native_mode; |
252 | }; | 242 | }; |
253 | 243 | ||
254 | struct radeon_encoder_tv_dac { | 244 | struct radeon_encoder_tv_dac { |
@@ -271,6 +261,16 @@ struct radeon_encoder_int_tmds { | |||
271 | struct radeon_tmds_pll tmds_pll[4]; | 261 | struct radeon_tmds_pll tmds_pll[4]; |
272 | }; | 262 | }; |
273 | 263 | ||
264 | /* spread spectrum */ | ||
265 | struct radeon_atom_ss { | ||
266 | uint16_t percentage; | ||
267 | uint8_t type; | ||
268 | uint8_t step; | ||
269 | uint8_t delay; | ||
270 | uint8_t range; | ||
271 | uint8_t refdiv; | ||
272 | }; | ||
273 | |||
274 | struct radeon_encoder_atom_dig { | 274 | struct radeon_encoder_atom_dig { |
275 | /* atom dig */ | 275 | /* atom dig */ |
276 | bool coherent_mode; | 276 | bool coherent_mode; |
@@ -278,8 +278,9 @@ struct radeon_encoder_atom_dig { | |||
278 | /* atom lvds */ | 278 | /* atom lvds */ |
279 | uint32_t lvds_misc; | 279 | uint32_t lvds_misc; |
280 | uint16_t panel_pwr_delay; | 280 | uint16_t panel_pwr_delay; |
281 | struct radeon_atom_ss *ss; | ||
281 | /* panel mode */ | 282 | /* panel mode */ |
282 | struct radeon_native_mode native_mode; | 283 | struct drm_display_mode native_mode; |
283 | }; | 284 | }; |
284 | 285 | ||
285 | struct radeon_encoder_atom_dac { | 286 | struct radeon_encoder_atom_dac { |
@@ -294,7 +295,7 @@ struct radeon_encoder { | |||
294 | uint32_t flags; | 295 | uint32_t flags; |
295 | uint32_t pixel_clock; | 296 | uint32_t pixel_clock; |
296 | enum radeon_rmx_type rmx_type; | 297 | enum radeon_rmx_type rmx_type; |
297 | struct radeon_native_mode native_mode; | 298 | struct drm_display_mode native_mode; |
298 | void *enc_priv; | 299 | void *enc_priv; |
299 | }; | 300 | }; |
300 | 301 | ||
@@ -308,12 +309,15 @@ struct radeon_connector { | |||
308 | uint32_t connector_id; | 309 | uint32_t connector_id; |
309 | uint32_t devices; | 310 | uint32_t devices; |
310 | struct radeon_i2c_chan *ddc_bus; | 311 | struct radeon_i2c_chan *ddc_bus; |
312 | /* some systems have a an hdmi and vga port with a shared ddc line */ | ||
313 | bool shared_ddc; | ||
311 | bool use_digital; | 314 | bool use_digital; |
312 | /* we need to mind the EDID between detect | 315 | /* we need to mind the EDID between detect |
313 | and get modes due to analog/digital/tvencoder */ | 316 | and get modes due to analog/digital/tvencoder */ |
314 | struct edid *edid; | 317 | struct edid *edid; |
315 | void *con_priv; | 318 | void *con_priv; |
316 | bool dac_load_detect; | 319 | bool dac_load_detect; |
320 | uint16_t connector_object_id; | ||
317 | }; | 321 | }; |
318 | 322 | ||
319 | struct radeon_framebuffer { | 323 | struct radeon_framebuffer { |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c new file mode 100644 index 000000000000..46146c6a2a06 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
3 | * copy of this software and associated documentation files (the "Software"), | ||
4 | * to deal in the Software without restriction, including without limitation | ||
5 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
6 | * and/or sell copies of the Software, and to permit persons to whom the | ||
7 | * Software is furnished to do so, subject to the following conditions: | ||
8 | * | ||
9 | * The above copyright notice and this permission notice shall be included in | ||
10 | * all copies or substantial portions of the Software. | ||
11 | * | ||
12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
13 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
15 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
16 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
17 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
18 | * OTHER DEALINGS IN THE SOFTWARE. | ||
19 | * | ||
20 | * Authors: Rafał Miłecki <zajec5@gmail.com> | ||
21 | */ | ||
22 | #include "drmP.h" | ||
23 | #include "radeon.h" | ||
24 | |||
25 | int radeon_debugfs_pm_init(struct radeon_device *rdev); | ||
26 | |||
27 | int radeon_pm_init(struct radeon_device *rdev) | ||
28 | { | ||
29 | if (radeon_debugfs_pm_init(rdev)) { | ||
30 | DRM_ERROR("Failed to register debugfs file for CP !\n"); | ||
31 | } | ||
32 | |||
33 | return 0; | ||
34 | } | ||
35 | |||
36 | /* | ||
37 | * Debugfs info | ||
38 | */ | ||
39 | #if defined(CONFIG_DEBUG_FS) | ||
40 | |||
41 | static int radeon_debugfs_pm_info(struct seq_file *m, void *data) | ||
42 | { | ||
43 | struct drm_info_node *node = (struct drm_info_node *) m->private; | ||
44 | struct drm_device *dev = node->minor->dev; | ||
45 | struct radeon_device *rdev = dev->dev_private; | ||
46 | |||
47 | seq_printf(m, "engine clock: %u0 Hz\n", radeon_get_engine_clock(rdev)); | ||
48 | seq_printf(m, "memory clock: %u0 Hz\n", radeon_get_memory_clock(rdev)); | ||
49 | |||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | static struct drm_info_list radeon_pm_info_list[] = { | ||
54 | {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL}, | ||
55 | }; | ||
56 | #endif | ||
57 | |||
58 | int radeon_debugfs_pm_init(struct radeon_device *rdev) | ||
59 | { | ||
60 | #if defined(CONFIG_DEBUG_FS) | ||
61 | return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); | ||
62 | #else | ||
63 | return 0; | ||
64 | #endif | ||
65 | } | ||
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index bfa1ab9c93e1..29ab75903ec1 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h | |||
@@ -290,6 +290,8 @@ | |||
290 | #define RADEON_BUS_CNTL 0x0030 | 290 | #define RADEON_BUS_CNTL 0x0030 |
291 | # define RADEON_BUS_MASTER_DIS (1 << 6) | 291 | # define RADEON_BUS_MASTER_DIS (1 << 6) |
292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) | 292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) |
293 | # define RS600_BUS_MASTER_DIS (1 << 14) | ||
294 | # define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */ | ||
293 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) | 295 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) |
294 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) | 296 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) |
295 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) | 297 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) |
@@ -297,6 +299,9 @@ | |||
297 | # define RADEON_BUS_READ_BURST (1 << 30) | 299 | # define RADEON_BUS_READ_BURST (1 << 30) |
298 | #define RADEON_BUS_CNTL1 0x0034 | 300 | #define RADEON_BUS_CNTL1 0x0034 |
299 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) | 301 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) |
302 | /* rv370/rv380, rv410, r423/r430/r480, r5xx */ | ||
303 | #define RADEON_MSI_REARM_EN 0x0160 | ||
304 | # define RV370_MSI_REARM_EN (1 << 0) | ||
300 | 305 | ||
301 | /* #define RADEON_PCIE_INDEX 0x0030 */ | 306 | /* #define RADEON_PCIE_INDEX 0x0030 */ |
302 | /* #define RADEON_PCIE_DATA 0x0034 */ | 307 | /* #define RADEON_PCIE_DATA 0x0034 */ |
@@ -3311,6 +3316,7 @@ | |||
3311 | #define RADEON_AIC_CNTL 0x01d0 | 3316 | #define RADEON_AIC_CNTL 0x01d0 |
3312 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) | 3317 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) |
3313 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) | 3318 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) |
3319 | # define RS400_MSI_REARM (1 << 3) /* rs400/rs480 */ | ||
3314 | #define RADEON_AIC_LO_ADDR 0x01dc | 3320 | #define RADEON_AIC_LO_ADDR 0x01dc |
3315 | #define RADEON_AIC_PT_BASE 0x01d8 | 3321 | #define RADEON_AIC_PT_BASE 0x01d8 |
3316 | #define RADEON_AIC_HI_ADDR 0x01e0 | 3322 | #define RADEON_AIC_HI_ADDR 0x01e0 |
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c index 03c33cf4e14c..f8a465d9a1cf 100644 --- a/drivers/gpu/drm/radeon/radeon_test.c +++ b/drivers/gpu/drm/radeon/radeon_test.c | |||
@@ -42,7 +42,7 @@ void radeon_test_moves(struct radeon_device *rdev) | |||
42 | /* Number of tests = | 42 | /* Number of tests = |
43 | * (Total GTT - IB pool - writeback page - ring buffer) / test size | 43 | * (Total GTT - IB pool - writeback page - ring buffer) / test size |
44 | */ | 44 | */ |
45 | n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - 4096 - | 45 | n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE - |
46 | rdev->cp.ring_size) / size; | 46 | rdev->cp.ring_size) / size; |
47 | 47 | ||
48 | gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); | 48 | gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); |
@@ -102,7 +102,7 @@ void radeon_test_moves(struct radeon_device *rdev) | |||
102 | goto out_cleanup; | 102 | goto out_cleanup; |
103 | } | 103 | } |
104 | 104 | ||
105 | r = radeon_copy(rdev, gtt_addr, vram_addr, size / 4096, fence); | 105 | r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence); |
106 | if (r) { | 106 | if (r) { |
107 | DRM_ERROR("Failed GTT->VRAM copy %d\n", i); | 107 | DRM_ERROR("Failed GTT->VRAM copy %d\n", i); |
108 | goto out_cleanup; | 108 | goto out_cleanup; |
@@ -145,7 +145,7 @@ void radeon_test_moves(struct radeon_device *rdev) | |||
145 | goto out_cleanup; | 145 | goto out_cleanup; |
146 | } | 146 | } |
147 | 147 | ||
148 | r = radeon_copy(rdev, vram_addr, gtt_addr, size / 4096, fence); | 148 | r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence); |
149 | if (r) { | 149 | if (r) { |
150 | DRM_ERROR("Failed VRAM->GTT copy %d\n", i); | 150 | DRM_ERROR("Failed VRAM->GTT copy %d\n", i); |
151 | goto out_cleanup; | 151 | goto out_cleanup; |
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 765bd184b6fc..1381e06d6af3 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
@@ -295,6 +295,12 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo, | |||
295 | if (unlikely(r)) { | 295 | if (unlikely(r)) { |
296 | return r; | 296 | return r; |
297 | } | 297 | } |
298 | |||
299 | r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement); | ||
300 | if (unlikely(r)) { | ||
301 | goto out_cleanup; | ||
302 | } | ||
303 | |||
298 | r = ttm_tt_bind(bo->ttm, &tmp_mem); | 304 | r = ttm_tt_bind(bo->ttm, &tmp_mem); |
299 | if (unlikely(r)) { | 305 | if (unlikely(r)) { |
300 | goto out_cleanup; | 306 | goto out_cleanup; |
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index a769c296f6a6..ca037160a582 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c | |||
@@ -418,6 +418,8 @@ int rs400_resume(struct radeon_device *rdev) | |||
418 | rs400_gart_disable(rdev); | 418 | rs400_gart_disable(rdev); |
419 | /* Resume clock before doing reset */ | 419 | /* Resume clock before doing reset */ |
420 | r300_clock_startup(rdev); | 420 | r300_clock_startup(rdev); |
421 | /* setup MC before calling post tables */ | ||
422 | rs400_mc_program(rdev); | ||
421 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | 423 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ |
422 | if (radeon_gpu_reset(rdev)) { | 424 | if (radeon_gpu_reset(rdev)) { |
423 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", | 425 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 10dfa78762da..5f117cd8736a 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -242,7 +242,7 @@ void rs600_irq_disable(struct radeon_device *rdev) | |||
242 | 242 | ||
243 | int rs600_irq_process(struct radeon_device *rdev) | 243 | int rs600_irq_process(struct radeon_device *rdev) |
244 | { | 244 | { |
245 | uint32_t status; | 245 | uint32_t status, msi_rearm; |
246 | uint32_t r500_disp_int; | 246 | uint32_t r500_disp_int; |
247 | 247 | ||
248 | status = rs600_irq_ack(rdev, &r500_disp_int); | 248 | status = rs600_irq_ack(rdev, &r500_disp_int); |
@@ -260,6 +260,22 @@ int rs600_irq_process(struct radeon_device *rdev) | |||
260 | drm_handle_vblank(rdev->ddev, 1); | 260 | drm_handle_vblank(rdev->ddev, 1); |
261 | status = rs600_irq_ack(rdev, &r500_disp_int); | 261 | status = rs600_irq_ack(rdev, &r500_disp_int); |
262 | } | 262 | } |
263 | if (rdev->msi_enabled) { | ||
264 | switch (rdev->family) { | ||
265 | case CHIP_RS600: | ||
266 | case CHIP_RS690: | ||
267 | case CHIP_RS740: | ||
268 | msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM; | ||
269 | WREG32(RADEON_BUS_CNTL, msi_rearm); | ||
270 | WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM); | ||
271 | break; | ||
272 | default: | ||
273 | msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; | ||
274 | WREG32(RADEON_MSI_REARM_EN, msi_rearm); | ||
275 | WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); | ||
276 | break; | ||
277 | } | ||
278 | } | ||
263 | return IRQ_HANDLED; | 279 | return IRQ_HANDLED; |
264 | } | 280 | } |
265 | 281 | ||
@@ -472,6 +488,8 @@ int rs600_init(struct radeon_device *rdev) | |||
472 | } | 488 | } |
473 | /* Initialize clocks */ | 489 | /* Initialize clocks */ |
474 | radeon_get_clock_info(rdev->ddev); | 490 | radeon_get_clock_info(rdev->ddev); |
491 | /* Initialize power management */ | ||
492 | radeon_pm_init(rdev); | ||
475 | /* Get vram informations */ | 493 | /* Get vram informations */ |
476 | rs600_vram_info(rdev); | 494 | rs600_vram_info(rdev); |
477 | /* Initialize memory controller (also test AGP) */ | 495 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 025e3225346c..27547175cf93 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -706,6 +706,8 @@ int rs690_init(struct radeon_device *rdev) | |||
706 | } | 706 | } |
707 | /* Initialize clocks */ | 707 | /* Initialize clocks */ |
708 | radeon_get_clock_info(rdev->ddev); | 708 | radeon_get_clock_info(rdev->ddev); |
709 | /* Initialize power management */ | ||
710 | radeon_pm_init(rdev); | ||
709 | /* Get vram informations */ | 711 | /* Get vram informations */ |
710 | rs690_vram_info(rdev); | 712 | rs690_vram_info(rdev); |
711 | /* Initialize memory controller (also test AGP) */ | 713 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 41a34c23e6d8..7935f793bf62 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -137,6 +137,8 @@ int rv515_mc_wait_for_idle(struct radeon_device *rdev) | |||
137 | 137 | ||
138 | void rv515_vga_render_disable(struct radeon_device *rdev) | 138 | void rv515_vga_render_disable(struct radeon_device *rdev) |
139 | { | 139 | { |
140 | WREG32(R_000330_D1VGA_CONTROL, 0); | ||
141 | WREG32(R_000338_D2VGA_CONTROL, 0); | ||
140 | WREG32(R_000300_VGA_RENDER_CONTROL, | 142 | WREG32(R_000300_VGA_RENDER_CONTROL, |
141 | RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL); | 143 | RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL); |
142 | } | 144 | } |
@@ -585,6 +587,8 @@ int rv515_init(struct radeon_device *rdev) | |||
585 | } | 587 | } |
586 | /* Initialize clocks */ | 588 | /* Initialize clocks */ |
587 | radeon_get_clock_info(rdev->ddev); | 589 | radeon_get_clock_info(rdev->ddev); |
590 | /* Initialize power management */ | ||
591 | radeon_pm_init(rdev); | ||
588 | /* Get vram informations */ | 592 | /* Get vram informations */ |
589 | rv515_vram_info(rdev); | 593 | rv515_vram_info(rdev); |
590 | /* Initialize memory controller (also test AGP) */ | 594 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 595ac638039d..b0efd0ddae7a 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -529,11 +529,11 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
529 | if (rdev->family == CHIP_RV770) | 529 | if (rdev->family == CHIP_RV770) |
530 | gb_tiling_config |= BANK_TILING(1); | 530 | gb_tiling_config |= BANK_TILING(1); |
531 | else | 531 | else |
532 | gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_SHIFT) >> NOOFBANK_MASK); | 532 | gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); |
533 | 533 | ||
534 | gb_tiling_config |= GROUP_SIZE(0); | 534 | gb_tiling_config |= GROUP_SIZE(0); |
535 | 535 | ||
536 | if (((mc_arb_ramcfg & NOOFROWS_MASK) & NOOFROWS_SHIFT) > 3) { | 536 | if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) { |
537 | gb_tiling_config |= ROW_TILING(3); | 537 | gb_tiling_config |= ROW_TILING(3); |
538 | gb_tiling_config |= SAMPLE_SPLIT(3); | 538 | gb_tiling_config |= SAMPLE_SPLIT(3); |
539 | } else { | 539 | } else { |
@@ -579,14 +579,14 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
579 | 579 | ||
580 | /* set HW defaults for 3D engine */ | 580 | /* set HW defaults for 3D engine */ |
581 | WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | | 581 | WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | |
582 | ROQ_IB2_START(0x2b))); | 582 | ROQ_IB2_START(0x2b))); |
583 | 583 | ||
584 | WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30)); | 584 | WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30)); |
585 | 585 | ||
586 | WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | | 586 | WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | |
587 | SYNC_GRADIENT | | 587 | SYNC_GRADIENT | |
588 | SYNC_WALKER | | 588 | SYNC_WALKER | |
589 | SYNC_ALIGNER)); | 589 | SYNC_ALIGNER)); |
590 | 590 | ||
591 | sx_debug_1 = RREG32(SX_DEBUG_1); | 591 | sx_debug_1 = RREG32(SX_DEBUG_1); |
592 | sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS; | 592 | sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS; |
@@ -598,9 +598,9 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
598 | WREG32(SMX_DC_CTL0, smx_dc_ctl0); | 598 | WREG32(SMX_DC_CTL0, smx_dc_ctl0); |
599 | 599 | ||
600 | WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) | | 600 | WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) | |
601 | GS_FLUSH_CTL(4) | | 601 | GS_FLUSH_CTL(4) | |
602 | ACK_FLUSH_CTL(3) | | 602 | ACK_FLUSH_CTL(3) | |
603 | SYNC_FLUSH_CTL)); | 603 | SYNC_FLUSH_CTL)); |
604 | 604 | ||
605 | if (rdev->family == CHIP_RV770) | 605 | if (rdev->family == CHIP_RV770) |
606 | WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f)); | 606 | WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f)); |
@@ -611,12 +611,12 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
611 | } | 611 | } |
612 | 612 | ||
613 | WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) | | 613 | WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) | |
614 | POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) | | 614 | POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) | |
615 | SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1))); | 615 | SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1))); |
616 | 616 | ||
617 | WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) | | 617 | WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) | |
618 | SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | | 618 | SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | |
619 | SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize))); | 619 | SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize))); |
620 | 620 | ||
621 | WREG32(PA_SC_MULTI_CHIP_CNTL, 0); | 621 | WREG32(PA_SC_MULTI_CHIP_CNTL, 0); |
622 | 622 | ||
@@ -774,14 +774,36 @@ int rv770_mc_init(struct radeon_device *rdev) | |||
774 | { | 774 | { |
775 | fixed20_12 a; | 775 | fixed20_12 a; |
776 | u32 tmp; | 776 | u32 tmp; |
777 | int chansize, numchan; | ||
777 | int r; | 778 | int r; |
778 | 779 | ||
779 | /* Get VRAM informations */ | 780 | /* Get VRAM informations */ |
780 | /* FIXME: Don't know how to determine vram width, need to check | ||
781 | * vram_width usage | ||
782 | */ | ||
783 | rdev->mc.vram_width = 128; | ||
784 | rdev->mc.vram_is_ddr = true; | 781 | rdev->mc.vram_is_ddr = true; |
782 | tmp = RREG32(MC_ARB_RAMCFG); | ||
783 | if (tmp & CHANSIZE_OVERRIDE) { | ||
784 | chansize = 16; | ||
785 | } else if (tmp & CHANSIZE_MASK) { | ||
786 | chansize = 64; | ||
787 | } else { | ||
788 | chansize = 32; | ||
789 | } | ||
790 | tmp = RREG32(MC_SHARED_CHMAP); | ||
791 | switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) { | ||
792 | case 0: | ||
793 | default: | ||
794 | numchan = 1; | ||
795 | break; | ||
796 | case 1: | ||
797 | numchan = 2; | ||
798 | break; | ||
799 | case 2: | ||
800 | numchan = 4; | ||
801 | break; | ||
802 | case 3: | ||
803 | numchan = 8; | ||
804 | break; | ||
805 | } | ||
806 | rdev->mc.vram_width = numchan * chansize; | ||
785 | /* Could aper size report 0 ? */ | 807 | /* Could aper size report 0 ? */ |
786 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 808 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); |
787 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 809 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); |
@@ -961,10 +983,13 @@ int rv770_init(struct radeon_device *rdev) | |||
961 | r600_scratch_init(rdev); | 983 | r600_scratch_init(rdev); |
962 | /* Initialize surface registers */ | 984 | /* Initialize surface registers */ |
963 | radeon_surface_init(rdev); | 985 | radeon_surface_init(rdev); |
986 | /* Initialize clocks */ | ||
964 | radeon_get_clock_info(rdev->ddev); | 987 | radeon_get_clock_info(rdev->ddev); |
965 | r = radeon_clocks_init(rdev); | 988 | r = radeon_clocks_init(rdev); |
966 | if (r) | 989 | if (r) |
967 | return r; | 990 | return r; |
991 | /* Initialize power management */ | ||
992 | radeon_pm_init(rdev); | ||
968 | /* Fence driver */ | 993 | /* Fence driver */ |
969 | r = radeon_fence_driver_init(rdev); | 994 | r = radeon_fence_driver_init(rdev); |
970 | if (r) | 995 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index 4b9c3d6396ff..a1367ab6f261 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
@@ -129,6 +129,10 @@ | |||
129 | #define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 | 129 | #define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 |
130 | #define HDP_TILING_CONFIG 0x2F3C | 130 | #define HDP_TILING_CONFIG 0x2F3C |
131 | 131 | ||
132 | #define MC_SHARED_CHMAP 0x2004 | ||
133 | #define NOOFCHAN_SHIFT 12 | ||
134 | #define NOOFCHAN_MASK 0x00003000 | ||
135 | |||
132 | #define MC_ARB_RAMCFG 0x2760 | 136 | #define MC_ARB_RAMCFG 0x2760 |
133 | #define NOOFBANK_SHIFT 0 | 137 | #define NOOFBANK_SHIFT 0 |
134 | #define NOOFBANK_MASK 0x00000003 | 138 | #define NOOFBANK_MASK 0x00000003 |
@@ -142,6 +146,7 @@ | |||
142 | #define CHANSIZE_MASK 0x00000100 | 146 | #define CHANSIZE_MASK 0x00000100 |
143 | #define BURSTLENGTH_SHIFT 9 | 147 | #define BURSTLENGTH_SHIFT 9 |
144 | #define BURSTLENGTH_MASK 0x00000200 | 148 | #define BURSTLENGTH_MASK 0x00000200 |
149 | #define CHANSIZE_OVERRIDE (1 << 11) | ||
145 | #define MC_VM_AGP_TOP 0x2028 | 150 | #define MC_VM_AGP_TOP 0x2028 |
146 | #define MC_VM_AGP_BOT 0x202C | 151 | #define MC_VM_AGP_BOT 0x202C |
147 | #define MC_VM_AGP_BASE 0x2030 | 152 | #define MC_VM_AGP_BASE 0x2030 |
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c index a55ee1a56c16..7bcb89f39ce8 100644 --- a/drivers/gpu/drm/ttm/ttm_tt.c +++ b/drivers/gpu/drm/ttm/ttm_tt.c | |||
@@ -279,6 +279,7 @@ int ttm_tt_set_placement_caching(struct ttm_tt *ttm, uint32_t placement) | |||
279 | 279 | ||
280 | return ttm_tt_set_caching(ttm, state); | 280 | return ttm_tt_set_caching(ttm, state); |
281 | } | 281 | } |
282 | EXPORT_SYMBOL(ttm_tt_set_placement_caching); | ||
282 | 283 | ||
283 | static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm) | 284 | static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm) |
284 | { | 285 | { |
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 737335ff2b21..e8fe7f169e25 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -128,7 +128,7 @@ config I2C_PIIX4 | |||
128 | ATI SB600 | 128 | ATI SB600 |
129 | ATI SB700 | 129 | ATI SB700 |
130 | ATI SB800 | 130 | ATI SB800 |
131 | AMD SB900 | 131 | AMD Hudson-2 |
132 | Serverworks OSB4 | 132 | Serverworks OSB4 |
133 | Serverworks CSB5 | 133 | Serverworks CSB5 |
134 | Serverworks CSB6 | 134 | Serverworks CSB6 |
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index d26a972aacaa..1e245e9cad31 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c | |||
@@ -22,7 +22,7 @@ | |||
22 | Intel PIIX4, 440MX | 22 | Intel PIIX4, 440MX |
23 | Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 | 23 | Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 |
24 | ATI IXP200, IXP300, IXP400, SB600, SB700, SB800 | 24 | ATI IXP200, IXP300, IXP400, SB600, SB700, SB800 |
25 | AMD SB900 | 25 | AMD Hudson-2 |
26 | SMSC Victory66 | 26 | SMSC Victory66 |
27 | 27 | ||
28 | Note: we assume there can only be one device, with one SMBus interface. | 28 | Note: we assume there can only be one device, with one SMBus interface. |
@@ -233,9 +233,9 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev, | |||
233 | unsigned short smba_idx = 0xcd6; | 233 | unsigned short smba_idx = 0xcd6; |
234 | u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; | 234 | u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; |
235 | 235 | ||
236 | /* SB800 SMBus does not support forcing address */ | 236 | /* SB800 and later SMBus does not support forcing address */ |
237 | if (force || force_addr) { | 237 | if (force || force_addr) { |
238 | dev_err(&PIIX4_dev->dev, "SB800 SMBus does not support " | 238 | dev_err(&PIIX4_dev->dev, "SMBus does not support " |
239 | "forcing address!\n"); | 239 | "forcing address!\n"); |
240 | return -EINVAL; | 240 | return -EINVAL; |
241 | } | 241 | } |
@@ -480,7 +480,7 @@ static struct pci_device_id piix4_ids[] = { | |||
480 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, | 480 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, |
481 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, | 481 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, |
482 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, | 482 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, |
483 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SMBUS) }, | 483 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) }, |
484 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, | 484 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, |
485 | PCI_DEVICE_ID_SERVERWORKS_OSB4) }, | 485 | PCI_DEVICE_ID_SERVERWORKS_OSB4) }, |
486 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, | 486 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, |
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c index 63c53d65e875..4d76ba473097 100644 --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c | |||
@@ -1046,15 +1046,6 @@ static void ide_port_init_devices(ide_hwif_t *hwif) | |||
1046 | if (port_ops && port_ops->init_dev) | 1046 | if (port_ops && port_ops->init_dev) |
1047 | port_ops->init_dev(drive); | 1047 | port_ops->init_dev(drive); |
1048 | } | 1048 | } |
1049 | |||
1050 | ide_port_for_each_dev(i, drive, hwif) { | ||
1051 | /* | ||
1052 | * default to PIO Mode 0 before we figure out | ||
1053 | * the most suited mode for the attached device | ||
1054 | */ | ||
1055 | if (port_ops && port_ops->set_pio_mode) | ||
1056 | port_ops->set_pio_mode(drive, 0); | ||
1057 | } | ||
1058 | } | 1049 | } |
1059 | 1050 | ||
1060 | static void ide_init_port(ide_hwif_t *hwif, unsigned int port, | 1051 | static void ide_init_port(ide_hwif_t *hwif, unsigned int port, |
diff --git a/drivers/isdn/hardware/eicon/maintidi.c b/drivers/isdn/hardware/eicon/maintidi.c index 23960cb6eaab..41c26e756452 100644 --- a/drivers/isdn/hardware/eicon/maintidi.c +++ b/drivers/isdn/hardware/eicon/maintidi.c | |||
@@ -959,8 +959,9 @@ static int process_idi_event (diva_strace_context_t* pLib, | |||
959 | } | 959 | } |
960 | if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) { | 960 | if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) { |
961 | char* tmp = &pLib->lines[0].pInterface->Layer2[0]; | 961 | char* tmp = &pLib->lines[0].pInterface->Layer2[0]; |
962 | dword l2_state; | 962 | dword l2_state; |
963 | diva_strace_read_uint (pVar, &l2_state); | 963 | if (diva_strace_read_uint(pVar, &l2_state)) |
964 | return -1; | ||
964 | 965 | ||
965 | switch (l2_state) { | 966 | switch (l2_state) { |
966 | case 0: | 967 | case 0: |
diff --git a/drivers/isdn/hardware/eicon/message.c b/drivers/isdn/hardware/eicon/message.c index 27d5dd68f4fb..ae89fb89da64 100644 --- a/drivers/isdn/hardware/eicon/message.c +++ b/drivers/isdn/hardware/eicon/message.c | |||
@@ -2692,7 +2692,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2692 | if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS) | 2692 | if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS) |
2693 | || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) | 2693 | || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) |
2694 | { | 2694 | { |
2695 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); | 2695 | len = offsetof(T30_INFO, universal_6); |
2696 | fax_info_change = false; | 2696 | fax_info_change = false; |
2697 | if (ncpi->length >= 4) | 2697 | if (ncpi->length >= 4) |
2698 | { | 2698 | { |
@@ -2754,7 +2754,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2754 | for (i = 0; i < w; i++) | 2754 | for (i = 0; i < w; i++) |
2755 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i]; | 2755 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i]; |
2756 | ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0; | 2756 | ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0; |
2757 | len = (byte)(((T30_INFO *) 0)->station_id + 20); | 2757 | len = offsetof(T30_INFO, station_id) + 20; |
2758 | w = fax_parms[5].length; | 2758 | w = fax_parms[5].length; |
2759 | if (w > 20) | 2759 | if (w > 20) |
2760 | w = 20; | 2760 | w = 20; |
@@ -2788,7 +2788,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2788 | } | 2788 | } |
2789 | else | 2789 | else |
2790 | { | 2790 | { |
2791 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); | 2791 | len = offsetof(T30_INFO, universal_6); |
2792 | } | 2792 | } |
2793 | fax_info_change = true; | 2793 | fax_info_change = true; |
2794 | 2794 | ||
@@ -2892,7 +2892,7 @@ static byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2892 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF) | 2892 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF) |
2893 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)) | 2893 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)) |
2894 | { | 2894 | { |
2895 | len = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 2895 | len = offsetof(T30_INFO, station_id) + 20; |
2896 | if (plci->fax_connect_info_length < len) | 2896 | if (plci->fax_connect_info_length < len) |
2897 | { | 2897 | { |
2898 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; | 2898 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; |
@@ -3802,7 +3802,7 @@ static byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
3802 | break; | 3802 | break; |
3803 | } | 3803 | } |
3804 | ncpi = &m_parms[1]; | 3804 | ncpi = &m_parms[1]; |
3805 | len = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 3805 | len = offsetof(T30_INFO, station_id) + 20; |
3806 | if (plci->fax_connect_info_length < len) | 3806 | if (plci->fax_connect_info_length < len) |
3807 | { | 3807 | { |
3808 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; | 3808 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; |
@@ -6844,7 +6844,7 @@ static void nl_ind(PLCI *plci) | |||
6844 | if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1]) | 6844 | if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1]) |
6845 | & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD))) | 6845 | & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD))) |
6846 | { | 6846 | { |
6847 | i = ((word)(((T30_INFO *) 0)->station_id + 20)) + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len; | 6847 | i = offsetof(T30_INFO, station_id) + 20 + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len; |
6848 | while (i < plci->NL.RBuffer->length) | 6848 | while (i < plci->NL.RBuffer->length) |
6849 | plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++]; | 6849 | plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++]; |
6850 | } | 6850 | } |
@@ -7236,7 +7236,7 @@ static void nl_ind(PLCI *plci) | |||
7236 | { | 7236 | { |
7237 | plci->RData[1].P = plci->RData[0].P; | 7237 | plci->RData[1].P = plci->RData[0].P; |
7238 | plci->RData[1].PLength = plci->RData[0].PLength; | 7238 | plci->RData[1].PLength = plci->RData[0].PLength; |
7239 | plci->RData[0].P = v120_header_buffer + (-((int) v120_header_buffer) & 3); | 7239 | plci->RData[0].P = v120_header_buffer + (-((unsigned long)v120_header_buffer) & 3); |
7240 | if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1)) | 7240 | if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1)) |
7241 | plci->RData[0].PLength = 1; | 7241 | plci->RData[0].PLength = 1; |
7242 | else | 7242 | else |
@@ -8473,7 +8473,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp) | |||
8473 | fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING; | 8473 | fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING; |
8474 | } | 8474 | } |
8475 | len = nlc[0]; | 8475 | len = nlc[0]; |
8476 | pos = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 8476 | pos = offsetof(T30_INFO, station_id) + 20; |
8477 | if (pos < plci->fax_connect_info_length) | 8477 | if (pos < plci->fax_connect_info_length) |
8478 | { | 8478 | { |
8479 | for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--) | 8479 | for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--) |
@@ -8525,7 +8525,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp) | |||
8525 | } | 8525 | } |
8526 | 8526 | ||
8527 | PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits); | 8527 | PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits); |
8528 | len = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 8528 | len = offsetof(T30_INFO, station_id) + 20; |
8529 | for (i = 0; i < len; i++) | 8529 | for (i = 0; i < len; i++) |
8530 | plci->fax_connect_info_buffer[i] = nlc[1+i]; | 8530 | plci->fax_connect_info_buffer[i] = nlc[1+i]; |
8531 | ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0; | 8531 | ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0; |
diff --git a/drivers/isdn/hisax/amd7930_fn.c b/drivers/isdn/hisax/amd7930_fn.c index bf526a7a63af..d6fdf1f66754 100644 --- a/drivers/isdn/hisax/amd7930_fn.c +++ b/drivers/isdn/hisax/amd7930_fn.c | |||
@@ -594,6 +594,7 @@ Amd7930_l1hw(struct PStack *st, int pr, void *arg) | |||
594 | if (cs->debug & L1_DEB_WARN) | 594 | if (cs->debug & L1_DEB_WARN) |
595 | debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen"); | 595 | debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen"); |
596 | skb_queue_tail(&cs->sq, skb); | 596 | skb_queue_tail(&cs->sq, skb); |
597 | spin_unlock_irqrestore(&cs->lock, flags); | ||
597 | break; | 598 | break; |
598 | } | 599 | } |
599 | if (cs->debug & DEB_DLOG_HEX) | 600 | if (cs->debug & DEB_DLOG_HEX) |
diff --git a/drivers/isdn/hisax/diva.c b/drivers/isdn/hisax/diva.c index 018bd293e580..0b0c2e5d806b 100644 --- a/drivers/isdn/hisax/diva.c +++ b/drivers/isdn/hisax/diva.c | |||
@@ -382,7 +382,7 @@ MemwaitforXFW(struct IsdnCardState *cs, int hscx) | |||
382 | { | 382 | { |
383 | int to = 50; | 383 | int to = 50; |
384 | 384 | ||
385 | while ((!(MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { | 385 | while (((MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) { |
386 | udelay(1); | 386 | udelay(1); |
387 | to--; | 387 | to--; |
388 | } | 388 | } |
diff --git a/drivers/isdn/hisax/elsa_ser.c b/drivers/isdn/hisax/elsa_ser.c index f181db464392..1657bba7879e 100644 --- a/drivers/isdn/hisax/elsa_ser.c +++ b/drivers/isdn/hisax/elsa_ser.c | |||
@@ -477,62 +477,62 @@ static void | |||
477 | modem_set_init(struct IsdnCardState *cs) { | 477 | modem_set_init(struct IsdnCardState *cs) { |
478 | int timeout; | 478 | int timeout; |
479 | 479 | ||
480 | #define RCV_DELAY 20000 | 480 | #define RCV_DELAY 20 |
481 | modem_write_cmd(cs, MInit_1, strlen(MInit_1)); | 481 | modem_write_cmd(cs, MInit_1, strlen(MInit_1)); |
482 | timeout = 1000; | 482 | timeout = 1000; |
483 | while(timeout-- && cs->hw.elsa.transcnt) | 483 | while(timeout-- && cs->hw.elsa.transcnt) |
484 | udelay(1000); | 484 | udelay(1000); |
485 | debugl1(cs, "msi tout=%d", timeout); | 485 | debugl1(cs, "msi tout=%d", timeout); |
486 | udelay(RCV_DELAY); | 486 | mdelay(RCV_DELAY); |
487 | modem_write_cmd(cs, MInit_2, strlen(MInit_2)); | 487 | modem_write_cmd(cs, MInit_2, strlen(MInit_2)); |
488 | timeout = 1000; | 488 | timeout = 1000; |
489 | while(timeout-- && cs->hw.elsa.transcnt) | 489 | while(timeout-- && cs->hw.elsa.transcnt) |
490 | udelay(1000); | 490 | udelay(1000); |
491 | debugl1(cs, "msi tout=%d", timeout); | 491 | debugl1(cs, "msi tout=%d", timeout); |
492 | udelay(RCV_DELAY); | 492 | mdelay(RCV_DELAY); |
493 | modem_write_cmd(cs, MInit_3, strlen(MInit_3)); | 493 | modem_write_cmd(cs, MInit_3, strlen(MInit_3)); |
494 | timeout = 1000; | 494 | timeout = 1000; |
495 | while(timeout-- && cs->hw.elsa.transcnt) | 495 | while(timeout-- && cs->hw.elsa.transcnt) |
496 | udelay(1000); | 496 | udelay(1000); |
497 | debugl1(cs, "msi tout=%d", timeout); | 497 | debugl1(cs, "msi tout=%d", timeout); |
498 | udelay(RCV_DELAY); | 498 | mdelay(RCV_DELAY); |
499 | modem_write_cmd(cs, MInit_4, strlen(MInit_4)); | 499 | modem_write_cmd(cs, MInit_4, strlen(MInit_4)); |
500 | timeout = 1000; | 500 | timeout = 1000; |
501 | while(timeout-- && cs->hw.elsa.transcnt) | 501 | while(timeout-- && cs->hw.elsa.transcnt) |
502 | udelay(1000); | 502 | udelay(1000); |
503 | debugl1(cs, "msi tout=%d", timeout); | 503 | debugl1(cs, "msi tout=%d", timeout); |
504 | udelay(RCV_DELAY ); | 504 | mdelay(RCV_DELAY); |
505 | modem_write_cmd(cs, MInit_5, strlen(MInit_5)); | 505 | modem_write_cmd(cs, MInit_5, strlen(MInit_5)); |
506 | timeout = 1000; | 506 | timeout = 1000; |
507 | while(timeout-- && cs->hw.elsa.transcnt) | 507 | while(timeout-- && cs->hw.elsa.transcnt) |
508 | udelay(1000); | 508 | udelay(1000); |
509 | debugl1(cs, "msi tout=%d", timeout); | 509 | debugl1(cs, "msi tout=%d", timeout); |
510 | udelay(RCV_DELAY); | 510 | mdelay(RCV_DELAY); |
511 | modem_write_cmd(cs, MInit_6, strlen(MInit_6)); | 511 | modem_write_cmd(cs, MInit_6, strlen(MInit_6)); |
512 | timeout = 1000; | 512 | timeout = 1000; |
513 | while(timeout-- && cs->hw.elsa.transcnt) | 513 | while(timeout-- && cs->hw.elsa.transcnt) |
514 | udelay(1000); | 514 | udelay(1000); |
515 | debugl1(cs, "msi tout=%d", timeout); | 515 | debugl1(cs, "msi tout=%d", timeout); |
516 | udelay(RCV_DELAY); | 516 | mdelay(RCV_DELAY); |
517 | modem_write_cmd(cs, MInit_7, strlen(MInit_7)); | 517 | modem_write_cmd(cs, MInit_7, strlen(MInit_7)); |
518 | timeout = 1000; | 518 | timeout = 1000; |
519 | while(timeout-- && cs->hw.elsa.transcnt) | 519 | while(timeout-- && cs->hw.elsa.transcnt) |
520 | udelay(1000); | 520 | udelay(1000); |
521 | debugl1(cs, "msi tout=%d", timeout); | 521 | debugl1(cs, "msi tout=%d", timeout); |
522 | udelay(RCV_DELAY); | 522 | mdelay(RCV_DELAY); |
523 | } | 523 | } |
524 | 524 | ||
525 | static void | 525 | static void |
526 | modem_set_dial(struct IsdnCardState *cs, int outgoing) { | 526 | modem_set_dial(struct IsdnCardState *cs, int outgoing) { |
527 | int timeout; | 527 | int timeout; |
528 | #define RCV_DELAY 20000 | 528 | #define RCV_DELAY 20 |
529 | 529 | ||
530 | modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); | 530 | modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); |
531 | timeout = 1000; | 531 | timeout = 1000; |
532 | while(timeout-- && cs->hw.elsa.transcnt) | 532 | while(timeout-- && cs->hw.elsa.transcnt) |
533 | udelay(1000); | 533 | udelay(1000); |
534 | debugl1(cs, "msi tout=%d", timeout); | 534 | debugl1(cs, "msi tout=%d", timeout); |
535 | udelay(RCV_DELAY); | 535 | mdelay(RCV_DELAY); |
536 | if (outgoing) | 536 | if (outgoing) |
537 | modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout)); | 537 | modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout)); |
538 | else | 538 | else |
@@ -541,7 +541,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) { | |||
541 | while(timeout-- && cs->hw.elsa.transcnt) | 541 | while(timeout-- && cs->hw.elsa.transcnt) |
542 | udelay(1000); | 542 | udelay(1000); |
543 | debugl1(cs, "msi tout=%d", timeout); | 543 | debugl1(cs, "msi tout=%d", timeout); |
544 | udelay(RCV_DELAY); | 544 | mdelay(RCV_DELAY); |
545 | } | 545 | } |
546 | 546 | ||
547 | static void | 547 | static void |
diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c index 9de54202c90c..a420b64472e3 100644 --- a/drivers/isdn/hisax/hfc_usb.c +++ b/drivers/isdn/hisax/hfc_usb.c | |||
@@ -817,8 +817,8 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish) | |||
817 | } | 817 | } |
818 | /* we have a complete hdlc packet */ | 818 | /* we have a complete hdlc packet */ |
819 | if (finish) { | 819 | if (finish) { |
820 | if ((!fifo->skbuff->data[fifo->skbuff->len - 1]) | 820 | if (fifo->skbuff->len > 3 && |
821 | && (fifo->skbuff->len > 3)) { | 821 | !fifo->skbuff->data[fifo->skbuff->len - 1]) { |
822 | 822 | ||
823 | if (fifon == HFCUSB_D_RX) { | 823 | if (fifon == HFCUSB_D_RX) { |
824 | DBG(HFCUSB_DBG_DCHANNEL, | 824 | DBG(HFCUSB_DBG_DCHANNEL, |
diff --git a/drivers/isdn/hisax/hscx_irq.c b/drivers/isdn/hisax/hscx_irq.c index 7b1ad5e4ecda..2387d76c721a 100644 --- a/drivers/isdn/hisax/hscx_irq.c +++ b/drivers/isdn/hisax/hscx_irq.c | |||
@@ -32,7 +32,7 @@ waitforXFW(struct IsdnCardState *cs, int hscx) | |||
32 | { | 32 | { |
33 | int to = 50; | 33 | int to = 50; |
34 | 34 | ||
35 | while ((!(READHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { | 35 | while (((READHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) { |
36 | udelay(1); | 36 | udelay(1); |
37 | to--; | 37 | to--; |
38 | } | 38 | } |
diff --git a/drivers/isdn/hisax/icc.c b/drivers/isdn/hisax/icc.c index 9aba646ba221..c80cbb8a2ef9 100644 --- a/drivers/isdn/hisax/icc.c +++ b/drivers/isdn/hisax/icc.c | |||
@@ -468,6 +468,7 @@ ICC_l1hw(struct PStack *st, int pr, void *arg) | |||
468 | if (cs->debug & L1_DEB_WARN) | 468 | if (cs->debug & L1_DEB_WARN) |
469 | debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); | 469 | debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); |
470 | skb_queue_tail(&cs->sq, skb); | 470 | skb_queue_tail(&cs->sq, skb); |
471 | spin_unlock_irqrestore(&cs->lock, flags); | ||
471 | break; | 472 | break; |
472 | } | 473 | } |
473 | if (cs->debug & DEB_DLOG_HEX) | 474 | if (cs->debug & DEB_DLOG_HEX) |
diff --git a/drivers/isdn/mISDN/stack.c b/drivers/isdn/mISDN/stack.c index 3e1532a180ff..0d05ec43012c 100644 --- a/drivers/isdn/mISDN/stack.c +++ b/drivers/isdn/mISDN/stack.c | |||
@@ -364,7 +364,7 @@ add_layer2(struct mISDNchannel *ch, struct mISDNstack *st) | |||
364 | static int | 364 | static int |
365 | st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg) | 365 | st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg) |
366 | { | 366 | { |
367 | if (!ch->st || ch->st->layer1) | 367 | if (!ch->st || !ch->st->layer1) |
368 | return -EINVAL; | 368 | return -EINVAL; |
369 | return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg); | 369 | return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg); |
370 | } | 370 | } |
diff --git a/drivers/md/md.c b/drivers/md/md.c index 10eb1fce975e..e64c971038d1 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -6504,8 +6504,9 @@ void md_do_sync(mddev_t *mddev) | |||
6504 | skip: | 6504 | skip: |
6505 | mddev->curr_resync = 0; | 6505 | mddev->curr_resync = 0; |
6506 | mddev->curr_resync_completed = 0; | 6506 | mddev->curr_resync_completed = 0; |
6507 | mddev->resync_min = 0; | 6507 | if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) |
6508 | mddev->resync_max = MaxSector; | 6508 | /* We completed so max setting can be forgotten. */ |
6509 | mddev->resync_max = MaxSector; | ||
6509 | sysfs_notify(&mddev->kobj, NULL, "sync_completed"); | 6510 | sysfs_notify(&mddev->kobj, NULL, "sync_completed"); |
6510 | wake_up(&resync_wait); | 6511 | wake_up(&resync_wait); |
6511 | set_bit(MD_RECOVERY_DONE, &mddev->recovery); | 6512 | set_bit(MD_RECOVERY_DONE, &mddev->recovery); |
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 81abefc172d9..dcce204b6c73 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
@@ -4049,6 +4049,8 @@ static sector_t reshape_request(mddev_t *mddev, sector_t sector_nr, int *skipped | |||
4049 | sector_nr = conf->reshape_progress; | 4049 | sector_nr = conf->reshape_progress; |
4050 | sector_div(sector_nr, new_data_disks); | 4050 | sector_div(sector_nr, new_data_disks); |
4051 | if (sector_nr) { | 4051 | if (sector_nr) { |
4052 | mddev->curr_resync_completed = sector_nr; | ||
4053 | sysfs_notify(&mddev->kobj, NULL, "sync_completed"); | ||
4052 | *skipped = 1; | 4054 | *skipped = 1; |
4053 | return sector_nr; | 4055 | return sector_nr; |
4054 | } | 4056 | } |
diff --git a/drivers/media/common/tuners/tda18271-fe.c b/drivers/media/common/tuners/tda18271-fe.c index 64595112000d..3a50ce96fcb9 100644 --- a/drivers/media/common/tuners/tda18271-fe.c +++ b/drivers/media/common/tuners/tda18271-fe.c | |||
@@ -616,13 +616,13 @@ static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq) | |||
616 | case RF2: | 616 | case RF2: |
617 | map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] - | 617 | map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] - |
618 | prog_cal[RF1] + prog_tab[RF1]) / | 618 | prog_cal[RF1] + prog_tab[RF1]) / |
619 | ((rf_freq[RF2] - rf_freq[RF1]) / 1000); | 619 | (s32)((rf_freq[RF2] - rf_freq[RF1]) / 1000); |
620 | map[i].rf2 = rf_freq[RF2] / 1000; | 620 | map[i].rf2 = rf_freq[RF2] / 1000; |
621 | break; | 621 | break; |
622 | case RF3: | 622 | case RF3: |
623 | map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] - | 623 | map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] - |
624 | prog_cal[RF2] + prog_tab[RF2]) / | 624 | prog_cal[RF2] + prog_tab[RF2]) / |
625 | ((rf_freq[RF3] - rf_freq[RF2]) / 1000); | 625 | (s32)((rf_freq[RF3] - rf_freq[RF2]) / 1000); |
626 | map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2]; | 626 | map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2]; |
627 | map[i].rf3 = rf_freq[RF3] / 1000; | 627 | map[i].rf3 = rf_freq[RF3] / 1000; |
628 | break; | 628 | break; |
@@ -1000,12 +1000,12 @@ static int tda18271_set_analog_params(struct dvb_frontend *fe, | |||
1000 | struct tda18271_std_map_item *map; | 1000 | struct tda18271_std_map_item *map; |
1001 | char *mode; | 1001 | char *mode; |
1002 | int ret; | 1002 | int ret; |
1003 | u32 freq = params->frequency * 62500; | 1003 | u32 freq = params->frequency * 125 * |
1004 | ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2; | ||
1004 | 1005 | ||
1005 | priv->mode = TDA18271_ANALOG; | 1006 | priv->mode = TDA18271_ANALOG; |
1006 | 1007 | ||
1007 | if (params->mode == V4L2_TUNER_RADIO) { | 1008 | if (params->mode == V4L2_TUNER_RADIO) { |
1008 | freq = freq / 1000; | ||
1009 | map = &std_map->fm_radio; | 1009 | map = &std_map->fm_radio; |
1010 | mode = "fm"; | 1010 | mode = "fm"; |
1011 | } else if (params->std & V4L2_STD_MN) { | 1011 | } else if (params->std & V4L2_STD_MN) { |
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig index 9744b0692417..0e4b97fba384 100644 --- a/drivers/media/dvb/dvb-usb/Kconfig +++ b/drivers/media/dvb/dvb-usb/Kconfig | |||
@@ -75,7 +75,7 @@ config DVB_USB_DIB0700 | |||
75 | select DVB_DIB3000MC if !DVB_FE_CUSTOMISE | 75 | select DVB_DIB3000MC if !DVB_FE_CUSTOMISE |
76 | select DVB_S5H1411 if !DVB_FE_CUSTOMISE | 76 | select DVB_S5H1411 if !DVB_FE_CUSTOMISE |
77 | select DVB_LGDT3305 if !DVB_FE_CUSTOMISE | 77 | select DVB_LGDT3305 if !DVB_FE_CUSTOMISE |
78 | select DVB_TUNER_DIB0070 | 78 | select DVB_TUNER_DIB0070 if !DVB_FE_CUSTOMISE |
79 | select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE | 79 | select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE |
80 | select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE | 80 | select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE |
81 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE | 81 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE |
diff --git a/drivers/media/dvb/dvb-usb/ce6230.c b/drivers/media/dvb/dvb-usb/ce6230.c index 0737c6377892..3df2045b7d2d 100644 --- a/drivers/media/dvb/dvb-usb/ce6230.c +++ b/drivers/media/dvb/dvb-usb/ce6230.c | |||
@@ -105,7 +105,7 @@ static int ce6230_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[], | |||
105 | int i = 0; | 105 | int i = 0; |
106 | struct req_t req; | 106 | struct req_t req; |
107 | int ret = 0; | 107 | int ret = 0; |
108 | memset(&req, 0, sizeof(&req)); | 108 | memset(&req, 0, sizeof(req)); |
109 | 109 | ||
110 | if (num > 2) | 110 | if (num > 2) |
111 | return -EINVAL; | 111 | return -EINVAL; |
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c index 0b2812aa30a4..6bd8951ea02b 100644 --- a/drivers/media/dvb/dvb-usb/dib0700_devices.c +++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c | |||
@@ -1925,7 +1925,7 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
1925 | { NULL }, | 1925 | { NULL }, |
1926 | }, | 1926 | }, |
1927 | { "Leadtek Winfast DTV Dongle (STK7700P based)", | 1927 | { "Leadtek Winfast DTV Dongle (STK7700P based)", |
1928 | { &dib0700_usb_id_table[8] }, | 1928 | { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] }, |
1929 | { NULL }, | 1929 | { NULL }, |
1930 | }, | 1930 | }, |
1931 | { "AVerMedia AVerTV DVB-T Express", | 1931 | { "AVerMedia AVerTV DVB-T Express", |
@@ -2064,7 +2064,7 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
2064 | }, | 2064 | }, |
2065 | }, | 2065 | }, |
2066 | 2066 | ||
2067 | .num_device_descs = 12, | 2067 | .num_device_descs = 11, |
2068 | .devices = { | 2068 | .devices = { |
2069 | { "DiBcom STK7070P reference design", | 2069 | { "DiBcom STK7070P reference design", |
2070 | { &dib0700_usb_id_table[15], NULL }, | 2070 | { &dib0700_usb_id_table[15], NULL }, |
@@ -2098,11 +2098,6 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
2098 | { &dib0700_usb_id_table[30], NULL }, | 2098 | { &dib0700_usb_id_table[30], NULL }, |
2099 | { NULL }, | 2099 | { NULL }, |
2100 | }, | 2100 | }, |
2101 | { "Terratec Cinergy T USB XXS/ T3", | ||
2102 | { &dib0700_usb_id_table[33], | ||
2103 | &dib0700_usb_id_table[52], NULL }, | ||
2104 | { NULL }, | ||
2105 | }, | ||
2106 | { "Elgato EyeTV DTT", | 2101 | { "Elgato EyeTV DTT", |
2107 | { &dib0700_usb_id_table[49], NULL }, | 2102 | { &dib0700_usb_id_table[49], NULL }, |
2108 | { NULL }, | 2103 | { NULL }, |
@@ -2343,8 +2338,10 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
2343 | { &dib0700_usb_id_table[59], NULL }, | 2338 | { &dib0700_usb_id_table[59], NULL }, |
2344 | { NULL }, | 2339 | { NULL }, |
2345 | }, | 2340 | }, |
2346 | { "Terratec Cinergy T USB XXS (HD)", | 2341 | { "Terratec Cinergy T USB XXS (HD)/ T3", |
2347 | { &dib0700_usb_id_table[34], &dib0700_usb_id_table[60] }, | 2342 | { &dib0700_usb_id_table[33], |
2343 | &dib0700_usb_id_table[52], | ||
2344 | &dib0700_usb_id_table[60], NULL}, | ||
2348 | { NULL }, | 2345 | { NULL }, |
2349 | }, | 2346 | }, |
2350 | }, | 2347 | }, |
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c index d1b67fe0f011..485d061319ab 100644 --- a/drivers/media/dvb/firewire/firedtv-avc.c +++ b/drivers/media/dvb/firewire/firedtv-avc.c | |||
@@ -1050,28 +1050,28 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) | |||
1050 | c->operand[4] = 0; /* slot */ | 1050 | c->operand[4] = 0; /* slot */ |
1051 | c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */ | 1051 | c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */ |
1052 | c->operand[6] = 0; /* more/last */ | 1052 | c->operand[6] = 0; /* more/last */ |
1053 | /* c->operand[7] = XXXprogram_info_length + 17; */ /* length */ | 1053 | /* Use three bytes for length field in case length > 127 */ |
1054 | c->operand[8] = list_management; | 1054 | c->operand[10] = list_management; |
1055 | c->operand[9] = 0x01; /* pmt_cmd=OK_descramble */ | 1055 | c->operand[11] = 0x01; /* pmt_cmd=OK_descramble */ |
1056 | 1056 | ||
1057 | /* TS program map table */ | 1057 | /* TS program map table */ |
1058 | 1058 | ||
1059 | c->operand[10] = 0x02; /* Table id=2 */ | 1059 | c->operand[12] = 0x02; /* Table id=2 */ |
1060 | c->operand[11] = 0x80; /* Section syntax + length */ | 1060 | c->operand[13] = 0x80; /* Section syntax + length */ |
1061 | /* c->operand[12] = XXXprogram_info_length + 12; */ | 1061 | /* c->operand[14] = XXXprogram_info_length + 12; */ |
1062 | c->operand[13] = msg[1]; /* Program number */ | 1062 | c->operand[15] = msg[1]; /* Program number */ |
1063 | c->operand[14] = msg[2]; | 1063 | c->operand[16] = msg[2]; |
1064 | c->operand[15] = 0x01; /* Version number=0 + current/next=1 */ | 1064 | c->operand[17] = 0x01; /* Version number=0 + current/next=1 */ |
1065 | c->operand[16] = 0x00; /* Section number=0 */ | 1065 | c->operand[18] = 0x00; /* Section number=0 */ |
1066 | c->operand[17] = 0x00; /* Last section number=0 */ | 1066 | c->operand[19] = 0x00; /* Last section number=0 */ |
1067 | c->operand[18] = 0x1f; /* PCR_PID=1FFF */ | 1067 | c->operand[20] = 0x1f; /* PCR_PID=1FFF */ |
1068 | c->operand[19] = 0xff; | 1068 | c->operand[21] = 0xff; |
1069 | c->operand[20] = (program_info_length >> 8); /* Program info length */ | 1069 | c->operand[22] = (program_info_length >> 8); /* Program info length */ |
1070 | c->operand[21] = (program_info_length & 0xff); | 1070 | c->operand[23] = (program_info_length & 0xff); |
1071 | 1071 | ||
1072 | /* CA descriptors at programme level */ | 1072 | /* CA descriptors at programme level */ |
1073 | read_pos = 6; | 1073 | read_pos = 6; |
1074 | write_pos = 22; | 1074 | write_pos = 24; |
1075 | if (program_info_length > 0) { | 1075 | if (program_info_length > 0) { |
1076 | pmt_cmd_id = msg[read_pos++]; | 1076 | pmt_cmd_id = msg[read_pos++]; |
1077 | if (pmt_cmd_id != 1 && pmt_cmd_id != 4) | 1077 | if (pmt_cmd_id != 1 && pmt_cmd_id != 4) |
@@ -1113,8 +1113,10 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) | |||
1113 | c->operand[write_pos++] = 0x00; | 1113 | c->operand[write_pos++] = 0x00; |
1114 | c->operand[write_pos++] = 0x00; | 1114 | c->operand[write_pos++] = 0x00; |
1115 | 1115 | ||
1116 | c->operand[7] = write_pos - 8; | 1116 | c->operand[7] = 0x82; |
1117 | c->operand[12] = write_pos - 13; | 1117 | c->operand[8] = (write_pos - 10) >> 8; |
1118 | c->operand[9] = (write_pos - 10) & 0xff; | ||
1119 | c->operand[14] = write_pos - 15; | ||
1118 | 1120 | ||
1119 | crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1); | 1121 | crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1); |
1120 | c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff; | 1122 | c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff; |
diff --git a/drivers/media/dvb/firewire/firedtv-fe.c b/drivers/media/dvb/firewire/firedtv-fe.c index 7ba43630a25d..e49cdc88b0c7 100644 --- a/drivers/media/dvb/firewire/firedtv-fe.c +++ b/drivers/media/dvb/firewire/firedtv-fe.c | |||
@@ -141,18 +141,12 @@ static int fdtv_read_uncorrected_blocks(struct dvb_frontend *fe, u32 *ucblocks) | |||
141 | return -EOPNOTSUPP; | 141 | return -EOPNOTSUPP; |
142 | } | 142 | } |
143 | 143 | ||
144 | #define ACCEPTED 0x9 | ||
145 | |||
146 | static int fdtv_set_frontend(struct dvb_frontend *fe, | 144 | static int fdtv_set_frontend(struct dvb_frontend *fe, |
147 | struct dvb_frontend_parameters *params) | 145 | struct dvb_frontend_parameters *params) |
148 | { | 146 | { |
149 | struct firedtv *fdtv = fe->sec_priv; | 147 | struct firedtv *fdtv = fe->sec_priv; |
150 | 148 | ||
151 | /* FIXME: avc_tuner_dsd never returns ACCEPTED. Check status? */ | 149 | return avc_tuner_dsd(fdtv, params); |
152 | if (avc_tuner_dsd(fdtv, params) != ACCEPTED) | ||
153 | return -EINVAL; | ||
154 | else | ||
155 | return 0; /* not sure of this... */ | ||
156 | } | 150 | } |
157 | 151 | ||
158 | static int fdtv_get_frontend(struct dvb_frontend *fe, | 152 | static int fdtv_get_frontend(struct dvb_frontend *fe, |
diff --git a/drivers/media/dvb/frontends/dib0070.h b/drivers/media/dvb/frontends/dib0070.h index 8a2e1e710adb..eec9e52ffa75 100644 --- a/drivers/media/dvb/frontends/dib0070.h +++ b/drivers/media/dvb/frontends/dib0070.h | |||
@@ -51,6 +51,7 @@ struct dib0070_config { | |||
51 | #if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE)) | 51 | #if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE)) |
52 | extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg); | 52 | extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg); |
53 | extern u16 dib0070_wbd_offset(struct dvb_frontend *); | 53 | extern u16 dib0070_wbd_offset(struct dvb_frontend *); |
54 | extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open); | ||
54 | #else | 55 | #else |
55 | static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg) | 56 | static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg) |
56 | { | 57 | { |
@@ -63,7 +64,11 @@ static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe) | |||
63 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | 64 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |
64 | return -ENODEV; | 65 | return -ENODEV; |
65 | } | 66 | } |
67 | |||
68 | static inline void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open) | ||
69 | { | ||
70 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | ||
71 | } | ||
66 | #endif | 72 | #endif |
67 | extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open); | ||
68 | 73 | ||
69 | #endif | 74 | #endif |
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c index 55ef6eeb0769..0781f94e05d2 100644 --- a/drivers/media/dvb/frontends/dib7000p.c +++ b/drivers/media/dvb/frontends/dib7000p.c | |||
@@ -1375,6 +1375,11 @@ struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, | |||
1375 | if (dib7000p_identify(st) != 0) | 1375 | if (dib7000p_identify(st) != 0) |
1376 | goto error; | 1376 | goto error; |
1377 | 1377 | ||
1378 | /* FIXME: make sure the dev.parent field is initialized, or else | ||
1379 | request_firmware() will hit an OOPS (this should be moved somewhere | ||
1380 | more common) */ | ||
1381 | st->i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap->dev.parent; | ||
1382 | |||
1378 | dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); | 1383 | dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); |
1379 | 1384 | ||
1380 | dib7000p_demod_reset(st); | 1385 | dib7000p_demod_reset(st); |
diff --git a/drivers/media/dvb/pt1/pt1.c b/drivers/media/dvb/pt1/pt1.c index 81e623a90f09..1fd8306371e2 100644 --- a/drivers/media/dvb/pt1/pt1.c +++ b/drivers/media/dvb/pt1/pt1.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/pci.h> | 27 | #include <linux/pci.h> |
28 | #include <linux/kthread.h> | 28 | #include <linux/kthread.h> |
29 | #include <linux/freezer.h> | 29 | #include <linux/freezer.h> |
30 | #include <linux/vmalloc.h> | ||
30 | 31 | ||
31 | #include "dvbdev.h" | 32 | #include "dvbdev.h" |
32 | #include "dvb_demux.h" | 33 | #include "dvb_demux.h" |
diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c index cb8a358b7310..8f88a586b0dd 100644 --- a/drivers/media/dvb/siano/smsusb.c +++ b/drivers/media/dvb/siano/smsusb.c | |||
@@ -529,6 +529,12 @@ struct usb_device_id smsusb_id_table[] = { | |||
529 | .driver_info = SMS1XXX_BOARD_SIANO_NICE }, | 529 | .driver_info = SMS1XXX_BOARD_SIANO_NICE }, |
530 | { USB_DEVICE(0x187f, 0x0301), | 530 | { USB_DEVICE(0x187f, 0x0301), |
531 | .driver_info = SMS1XXX_BOARD_SIANO_VENICE }, | 531 | .driver_info = SMS1XXX_BOARD_SIANO_VENICE }, |
532 | { USB_DEVICE(0x2040, 0xb900), | ||
533 | .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, | ||
534 | { USB_DEVICE(0x2040, 0xb910), | ||
535 | .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, | ||
536 | { USB_DEVICE(0x2040, 0xc000), | ||
537 | .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, | ||
532 | { } /* Terminating entry */ | 538 | { } /* Terminating entry */ |
533 | }; | 539 | }; |
534 | 540 | ||
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c index 939d1e512974..a6724019c66f 100644 --- a/drivers/media/video/bt8xx/bttv-driver.c +++ b/drivers/media/video/bt8xx/bttv-driver.c | |||
@@ -1299,7 +1299,7 @@ set_tvnorm(struct bttv *btv, unsigned int norm) | |||
1299 | 1299 | ||
1300 | tvnorm = &bttv_tvnorms[norm]; | 1300 | tvnorm = &bttv_tvnorms[norm]; |
1301 | 1301 | ||
1302 | if (!memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, | 1302 | if (memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, |
1303 | sizeof (tvnorm->cropcap))) { | 1303 | sizeof (tvnorm->cropcap))) { |
1304 | bttv_crop_reset(&btv->crop[0], norm); | 1304 | bttv_crop_reset(&btv->crop[0], norm); |
1305 | btv->crop[1] = btv->crop[0]; /* current = default */ | 1305 | btv->crop[1] = btv->crop[0]; /* current = default */ |
@@ -3800,11 +3800,34 @@ bttv_irq_next_video(struct bttv *btv, struct bttv_buffer_set *set) | |||
3800 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field) && | 3800 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field) && |
3801 | (item->vb.queue.next != &btv->capture)) { | 3801 | (item->vb.queue.next != &btv->capture)) { |
3802 | item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue); | 3802 | item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue); |
3803 | /* Mike Isely <isely@pobox.com> - Only check | ||
3804 | * and set up the bottom field in the logic | ||
3805 | * below. Don't ever do the top field. This | ||
3806 | * of course means that if we set up the | ||
3807 | * bottom field in the above code that we'll | ||
3808 | * actually skip a field. But that's OK. | ||
3809 | * Having processed only a single buffer this | ||
3810 | * time, then the next time around the first | ||
3811 | * available buffer should be for a top field. | ||
3812 | * That will then cause us here to set up a | ||
3813 | * top then a bottom field in the normal way. | ||
3814 | * The alternative to this understanding is | ||
3815 | * that we set up the second available buffer | ||
3816 | * as a top field, but that's out of order | ||
3817 | * since this driver always processes the top | ||
3818 | * field first - the effect will be the two | ||
3819 | * buffers being returned in the wrong order, | ||
3820 | * with the second buffer also being delayed | ||
3821 | * by one field time (owing to the fifo nature | ||
3822 | * of videobuf). Worse still, we'll be stuck | ||
3823 | * doing fields out of order now every time | ||
3824 | * until something else causes a field to be | ||
3825 | * dropped. By effectively forcing a field to | ||
3826 | * drop this way then we always get back into | ||
3827 | * sync within a single frame time. (Out of | ||
3828 | * order fields can screw up deinterlacing | ||
3829 | * algorithms.) */ | ||
3803 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) { | 3830 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) { |
3804 | if (NULL == set->top && | ||
3805 | V4L2_FIELD_TOP == item->vb.field) { | ||
3806 | set->top = item; | ||
3807 | } | ||
3808 | if (NULL == set->bottom && | 3831 | if (NULL == set->bottom && |
3809 | V4L2_FIELD_BOTTOM == item->vb.field) { | 3832 | V4L2_FIELD_BOTTOM == item->vb.field) { |
3810 | set->bottom = item; | 3833 | set->bottom = item; |
diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c index 7bd8a70f0a0b..ac947aecb9c3 100644 --- a/drivers/media/video/em28xx/em28xx-audio.c +++ b/drivers/media/video/em28xx/em28xx-audio.c | |||
@@ -383,6 +383,11 @@ static int snd_em28xx_hw_capture_free(struct snd_pcm_substream *substream) | |||
383 | 383 | ||
384 | static int snd_em28xx_prepare(struct snd_pcm_substream *substream) | 384 | static int snd_em28xx_prepare(struct snd_pcm_substream *substream) |
385 | { | 385 | { |
386 | struct em28xx *dev = snd_pcm_substream_chip(substream); | ||
387 | |||
388 | dev->adev.hwptr_done_capture = 0; | ||
389 | dev->adev.capture_transfer_done = 0; | ||
390 | |||
386 | return 0; | 391 | return 0; |
387 | } | 392 | } |
388 | 393 | ||
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c index 59400e858965..a27afeb6f39b 100644 --- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c +++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c | |||
@@ -35,12 +35,25 @@ static | |||
35 | const | 35 | const |
36 | struct dmi_system_id s5k4aa_vflip_dmi_table[] = { | 36 | struct dmi_system_id s5k4aa_vflip_dmi_table[] = { |
37 | { | 37 | { |
38 | .ident = "BRUNEINIT", | ||
39 | .matches = { | ||
40 | DMI_MATCH(DMI_SYS_VENDOR, "BRUNENIT"), | ||
41 | DMI_MATCH(DMI_PRODUCT_NAME, "BRUNENIT"), | ||
42 | DMI_MATCH(DMI_BOARD_VERSION, "00030D0000000001") | ||
43 | } | ||
44 | }, { | ||
38 | .ident = "Fujitsu-Siemens Amilo Xa 2528", | 45 | .ident = "Fujitsu-Siemens Amilo Xa 2528", |
39 | .matches = { | 46 | .matches = { |
40 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | 47 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), |
41 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") | 48 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") |
42 | } | 49 | } |
43 | }, { | 50 | }, { |
51 | .ident = "Fujitsu-Siemens Amilo Xi 2528", | ||
52 | .matches = { | ||
53 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | ||
54 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2528") | ||
55 | } | ||
56 | }, { | ||
44 | .ident = "Fujitsu-Siemens Amilo Xi 2550", | 57 | .ident = "Fujitsu-Siemens Amilo Xi 2550", |
45 | .matches = { | 58 | .matches = { |
46 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | 59 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), |
@@ -57,6 +70,13 @@ static | |||
57 | .matches = { | 70 | .matches = { |
58 | DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), | 71 | DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), |
59 | DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), | 72 | DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), |
73 | DMI_MATCH(DMI_BIOS_DATE, "12/02/2008") | ||
74 | } | ||
75 | }, { | ||
76 | .ident = "MSI GX700", | ||
77 | .matches = { | ||
78 | DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), | ||
79 | DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), | ||
60 | DMI_MATCH(DMI_BIOS_DATE, "07/26/2007") | 80 | DMI_MATCH(DMI_BIOS_DATE, "07/26/2007") |
61 | } | 81 | } |
62 | }, { | 82 | }, { |
diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c index 140c8f320e47..f8328b9efae5 100644 --- a/drivers/media/video/gspca/mr97310a.c +++ b/drivers/media/video/gspca/mr97310a.c | |||
@@ -483,7 +483,7 @@ static int start_cif_cam(struct gspca_dev *gspca_dev) | |||
483 | data[3] = 0x2c; /* reg 2, H size/8 */ | 483 | data[3] = 0x2c; /* reg 2, H size/8 */ |
484 | data[4] = 0x48; /* reg 3, V size/4 */ | 484 | data[4] = 0x48; /* reg 3, V size/4 */ |
485 | data[6] = 0x06; /* reg 5, H start */ | 485 | data[6] = 0x06; /* reg 5, H start */ |
486 | data[8] = 0x06 + sd->sensor_type; /* reg 7, V start */ | 486 | data[8] = 0x06 - sd->sensor_type; /* reg 7, V start */ |
487 | break; | 487 | break; |
488 | } | 488 | } |
489 | err_code = mr_write(gspca_dev, 11); | 489 | err_code = mr_write(gspca_dev, 11); |
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c index 2f6e135d94bc..a5c190e93799 100644 --- a/drivers/media/video/gspca/ov519.c +++ b/drivers/media/video/gspca/ov519.c | |||
@@ -2919,7 +2919,7 @@ static void ov518_pkt_scan(struct gspca_dev *gspca_dev, | |||
2919 | /* A false positive here is likely, until OVT gives me | 2919 | /* A false positive here is likely, until OVT gives me |
2920 | * the definitive SOF/EOF format */ | 2920 | * the definitive SOF/EOF format */ |
2921 | if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { | 2921 | if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { |
2922 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); | 2922 | frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); |
2923 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0); | 2923 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0); |
2924 | sd->packet_nr = 0; | 2924 | sd->packet_nr = 0; |
2925 | } | 2925 | } |
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c index 65489d6b0d89..bfae63f5584c 100644 --- a/drivers/media/video/gspca/stv06xx/stv06xx.c +++ b/drivers/media/video/gspca/stv06xx/stv06xx.c | |||
@@ -394,7 +394,8 @@ frame_data: | |||
394 | PDEBUG(D_PACK, "End of frame detected"); | 394 | PDEBUG(D_PACK, "End of frame detected"); |
395 | 395 | ||
396 | /* Complete the last frame (if any) */ | 396 | /* Complete the last frame (if any) */ |
397 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); | 397 | frame = gspca_frame_add(gspca_dev, LAST_PACKET, |
398 | frame, data, 0); | ||
398 | 399 | ||
399 | if (chunk_len) | 400 | if (chunk_len) |
400 | PDEBUG(D_ERR, "Chunk length is " | 401 | PDEBUG(D_ERR, "Chunk length is " |
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c index 6952e9602d5d..51b683c63b70 100644 --- a/drivers/media/video/pxa_camera.c +++ b/drivers/media/video/pxa_camera.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/device.h> | 26 | #include <linux/device.h> |
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | #include <linux/sched.h> | ||
29 | 30 | ||
30 | #include <media/v4l2-common.h> | 31 | #include <media/v4l2-common.h> |
31 | #include <media/v4l2-dev.h> | 32 | #include <media/v4l2-dev.h> |
@@ -1432,7 +1433,9 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd, | |||
1432 | icd->sense = &sense; | 1433 | icd->sense = &sense; |
1433 | 1434 | ||
1434 | cam_f.fmt.pix.pixelformat = cam_fmt->fourcc; | 1435 | cam_f.fmt.pix.pixelformat = cam_fmt->fourcc; |
1435 | ret = v4l2_subdev_call(sd, video, s_fmt, f); | 1436 | ret = v4l2_subdev_call(sd, video, s_fmt, &cam_f); |
1437 | cam_f.fmt.pix.pixelformat = pix->pixelformat; | ||
1438 | *pix = cam_f.fmt.pix; | ||
1436 | 1439 | ||
1437 | icd->sense = NULL; | 1440 | icd->sense = NULL; |
1438 | 1441 | ||
diff --git a/drivers/media/video/s2255drv.c b/drivers/media/video/s2255drv.c index 9e3262c0ba37..2c0bb06cab3b 100644 --- a/drivers/media/video/s2255drv.c +++ b/drivers/media/video/s2255drv.c | |||
@@ -598,11 +598,6 @@ static int s2255_got_frame(struct s2255_dev *dev, int chn, int jpgsize) | |||
598 | buf = list_entry(dma_q->active.next, | 598 | buf = list_entry(dma_q->active.next, |
599 | struct s2255_buffer, vb.queue); | 599 | struct s2255_buffer, vb.queue); |
600 | 600 | ||
601 | if (!waitqueue_active(&buf->vb.done)) { | ||
602 | /* no one active */ | ||
603 | rc = -1; | ||
604 | goto unlock; | ||
605 | } | ||
606 | list_del(&buf->vb.queue); | 601 | list_del(&buf->vb.queue); |
607 | do_gettimeofday(&buf->vb.ts); | 602 | do_gettimeofday(&buf->vb.ts); |
608 | dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i); | 603 | dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i); |
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c index 71145bff94fa..09013229d4aa 100644 --- a/drivers/media/video/saa7134/saa7134-cards.c +++ b/drivers/media/video/saa7134/saa7134-cards.c | |||
@@ -3428,6 +3428,7 @@ struct saa7134_board saa7134_boards[] = { | |||
3428 | .tuner_config = 3, | 3428 | .tuner_config = 3, |
3429 | .mpeg = SAA7134_MPEG_DVB, | 3429 | .mpeg = SAA7134_MPEG_DVB, |
3430 | .ts_type = SAA7134_MPEG_TS_SERIAL, | 3430 | .ts_type = SAA7134_MPEG_TS_SERIAL, |
3431 | .ts_force_val = 1, | ||
3431 | .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */ | 3432 | .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */ |
3432 | .inputs = {{ | 3433 | .inputs = {{ |
3433 | .name = name_tv, | 3434 | .name = name_tv, |
diff --git a/drivers/media/video/saa7134/saa7134-ts.c b/drivers/media/video/saa7134/saa7134-ts.c index 3fa652279ac0..03488ba4c99c 100644 --- a/drivers/media/video/saa7134/saa7134-ts.c +++ b/drivers/media/video/saa7134/saa7134-ts.c | |||
@@ -262,11 +262,13 @@ int saa7134_ts_start(struct saa7134_dev *dev) | |||
262 | switch (saa7134_boards[dev->board].ts_type) { | 262 | switch (saa7134_boards[dev->board].ts_type) { |
263 | case SAA7134_MPEG_TS_PARALLEL: | 263 | case SAA7134_MPEG_TS_PARALLEL: |
264 | saa_writeb(SAA7134_TS_SERIAL0, 0x40); | 264 | saa_writeb(SAA7134_TS_SERIAL0, 0x40); |
265 | saa_writeb(SAA7134_TS_PARALLEL, 0xec); | 265 | saa_writeb(SAA7134_TS_PARALLEL, 0xec | |
266 | (saa7134_boards[dev->board].ts_force_val << 4)); | ||
266 | break; | 267 | break; |
267 | case SAA7134_MPEG_TS_SERIAL: | 268 | case SAA7134_MPEG_TS_SERIAL: |
268 | saa_writeb(SAA7134_TS_SERIAL0, 0xd8); | 269 | saa_writeb(SAA7134_TS_SERIAL0, 0xd8); |
269 | saa_writeb(SAA7134_TS_PARALLEL, 0x6c); | 270 | saa_writeb(SAA7134_TS_PARALLEL, 0x6c | |
271 | (saa7134_boards[dev->board].ts_force_val << 4)); | ||
270 | saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); | 272 | saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); |
271 | saa_writeb(SAA7134_TS_SERIAL1, 0x02); | 273 | saa_writeb(SAA7134_TS_SERIAL1, 0x02); |
272 | break; | 274 | break; |
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h index 6ee3e9b7769e..f8697d46ff5f 100644 --- a/drivers/media/video/saa7134/saa7134.h +++ b/drivers/media/video/saa7134/saa7134.h | |||
@@ -360,6 +360,7 @@ struct saa7134_board { | |||
360 | enum saa7134_mpeg_type mpeg; | 360 | enum saa7134_mpeg_type mpeg; |
361 | enum saa7134_mpeg_ts_type ts_type; | 361 | enum saa7134_mpeg_ts_type ts_type; |
362 | unsigned int vid_port_opts; | 362 | unsigned int vid_port_opts; |
363 | unsigned int ts_force_val:1; | ||
363 | }; | 364 | }; |
364 | 365 | ||
365 | #define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) | 366 | #define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) |
diff --git a/drivers/media/video/saa7164/saa7164-cmd.c b/drivers/media/video/saa7164/saa7164-cmd.c index c45966edc0cf..9c1d3ac43869 100644 --- a/drivers/media/video/saa7164/saa7164-cmd.c +++ b/drivers/media/video/saa7164/saa7164-cmd.c | |||
@@ -347,7 +347,7 @@ int saa7164_cmd_send(struct saa7164_dev *dev, u8 id, tmComResCmd_t command, | |||
347 | 347 | ||
348 | /* Prepare some basic command/response structures */ | 348 | /* Prepare some basic command/response structures */ |
349 | memset(&command_t, 0, sizeof(command_t)); | 349 | memset(&command_t, 0, sizeof(command_t)); |
350 | memset(&response_t, 0, sizeof(&response_t)); | 350 | memset(&response_t, 0, sizeof(response_t)); |
351 | pcommand_t = &command_t; | 351 | pcommand_t = &command_t; |
352 | presponse_t = &response_t; | 352 | presponse_t = &response_t; |
353 | command_t.id = id; | 353 | command_t.id = id; |
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c index 65ac474c517a..2f78b4f263f5 100644 --- a/drivers/media/video/sh_mobile_ceu_camera.c +++ b/drivers/media/video/sh_mobile_ceu_camera.c | |||
@@ -1173,8 +1173,8 @@ static int get_scales(struct soc_camera_device *icd, | |||
1173 | width_in = scale_up(cam->ceu_rect.width, *scale_h); | 1173 | width_in = scale_up(cam->ceu_rect.width, *scale_h); |
1174 | height_in = scale_up(cam->ceu_rect.height, *scale_v); | 1174 | height_in = scale_up(cam->ceu_rect.height, *scale_v); |
1175 | 1175 | ||
1176 | *scale_h = calc_generic_scale(cam->ceu_rect.width, icd->user_width); | 1176 | *scale_h = calc_generic_scale(width_in, icd->user_width); |
1177 | *scale_v = calc_generic_scale(cam->ceu_rect.height, icd->user_height); | 1177 | *scale_v = calc_generic_scale(height_in, icd->user_height); |
1178 | 1178 | ||
1179 | return 0; | 1179 | return 0; |
1180 | } | 1180 | } |
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index 59aa7a3694c2..36e617bd13c7 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c | |||
@@ -1160,13 +1160,15 @@ void soc_camera_host_unregister(struct soc_camera_host *ici) | |||
1160 | if (icd->iface == ici->nr) { | 1160 | if (icd->iface == ici->nr) { |
1161 | /* The bus->remove will be called */ | 1161 | /* The bus->remove will be called */ |
1162 | device_unregister(&icd->dev); | 1162 | device_unregister(&icd->dev); |
1163 | /* Not before device_unregister(), .remove | 1163 | /* |
1164 | * needs parent to call ici->ops->remove() */ | 1164 | * Not before device_unregister(), .remove |
1165 | icd->dev.parent = NULL; | 1165 | * needs parent to call ici->ops->remove(). |
1166 | 1166 | * If the host module is loaded again, device_register() | |
1167 | /* If the host module is loaded again, device_register() | 1167 | * would complain "already initialised," since 2.6.32 |
1168 | * would complain "already initialised" */ | 1168 | * this is also needed to prevent use-after-free of the |
1169 | memset(&icd->dev.kobj, 0, sizeof(icd->dev.kobj)); | 1169 | * device private data. |
1170 | */ | ||
1171 | memset(&icd->dev, 0, sizeof(icd->dev)); | ||
1170 | } | 1172 | } |
1171 | } | 1173 | } |
1172 | 1174 | ||
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c index c3225a561748..1b89735e62fd 100644 --- a/drivers/media/video/uvc/uvc_ctrl.c +++ b/drivers/media/video/uvc/uvc_ctrl.c | |||
@@ -348,7 +348,7 @@ static void uvc_ctrl_set_zoom(struct uvc_control_mapping *mapping, | |||
348 | __s32 value, __u8 *data) | 348 | __s32 value, __u8 *data) |
349 | { | 349 | { |
350 | data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff; | 350 | data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff; |
351 | data[2] = min(abs(value), 0xff); | 351 | data[2] = min((int)abs(value), 0xff); |
352 | } | 352 | } |
353 | 353 | ||
354 | static struct uvc_control_mapping uvc_ctrl_mappings[] = { | 354 | static struct uvc_control_mapping uvc_ctrl_mappings[] = { |
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c index f960e8ea4f17..a6e41d12b221 100644 --- a/drivers/media/video/uvc/uvc_video.c +++ b/drivers/media/video/uvc/uvc_video.c | |||
@@ -90,7 +90,8 @@ static void uvc_fixup_video_ctrl(struct uvc_streaming *stream, | |||
90 | ctrl->dwMaxVideoFrameSize = | 90 | ctrl->dwMaxVideoFrameSize = |
91 | frame->dwMaxVideoFrameBufferSize; | 91 | frame->dwMaxVideoFrameBufferSize; |
92 | 92 | ||
93 | if (stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH && | 93 | if (!(format->flags & UVC_FMT_FLAG_COMPRESSED) && |
94 | stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH && | ||
94 | stream->intf->num_altsetting > 1) { | 95 | stream->intf->num_altsetting > 1) { |
95 | u32 interval; | 96 | u32 interval; |
96 | u32 bandwidth; | 97 | u32 bandwidth; |
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index e7a331de5733..b8fd7af1ceeb 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c | |||
@@ -1529,6 +1529,7 @@ static int mmc_omap_remove(struct platform_device *pdev) | |||
1529 | host->pdata->cleanup(&pdev->dev); | 1529 | host->pdata->cleanup(&pdev->dev); |
1530 | 1530 | ||
1531 | mmc_omap_fclk_enable(host, 0); | 1531 | mmc_omap_fclk_enable(host, 0); |
1532 | free_irq(host->irq, host); | ||
1532 | clk_put(host->fclk); | 1533 | clk_put(host->fclk); |
1533 | clk_disable(host->iclk); | 1534 | clk_disable(host->iclk); |
1534 | clk_put(host->iclk); | 1535 | clk_put(host->iclk); |
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index 1d5cf8636723..ae2f6dbe43c3 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile | |||
@@ -58,4 +58,6 @@ obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o | |||
58 | obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o | 58 | obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o |
59 | obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o | 59 | obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o |
60 | obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o | 60 | obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o |
61 | obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o | ||
62 | obj-$(CONFIG_MTD_VMU) += vmu-flash.o | ||
61 | obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o | 63 | obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o |
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h index a80da0e14a52..3b79a225628a 100644 --- a/drivers/net/benet/be.h +++ b/drivers/net/benet/be.h | |||
@@ -259,6 +259,8 @@ struct be_adapter { | |||
259 | u32 port_num; | 259 | u32 port_num; |
260 | bool promiscuous; | 260 | bool promiscuous; |
261 | u32 cap; | 261 | u32 cap; |
262 | u32 rx_fc; /* Rx flow control */ | ||
263 | u32 tx_fc; /* Tx flow control */ | ||
262 | }; | 264 | }; |
263 | 265 | ||
264 | extern const struct ethtool_ops be_ethtool_ops; | 266 | extern const struct ethtool_ops be_ethtool_ops; |
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h index 49953787e41c..e5f9676cf1bc 100644 --- a/drivers/net/benet/be_cmds.h +++ b/drivers/net/benet/be_cmds.h | |||
@@ -68,7 +68,7 @@ enum { | |||
68 | #define CQE_STATUS_COMPL_MASK 0xFFFF | 68 | #define CQE_STATUS_COMPL_MASK 0xFFFF |
69 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ | 69 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ |
70 | #define CQE_STATUS_EXTD_MASK 0xFFFF | 70 | #define CQE_STATUS_EXTD_MASK 0xFFFF |
71 | #define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */ | 71 | #define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */ |
72 | 72 | ||
73 | struct be_mcc_compl { | 73 | struct be_mcc_compl { |
74 | u32 status; /* dword 0 */ | 74 | u32 status; /* dword 0 */ |
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c index cda5bf2fc50a..f0fd95b43c07 100644 --- a/drivers/net/benet/be_ethtool.c +++ b/drivers/net/benet/be_ethtool.c | |||
@@ -323,10 +323,12 @@ be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd) | |||
323 | 323 | ||
324 | if (ecmd->autoneg != 0) | 324 | if (ecmd->autoneg != 0) |
325 | return -EINVAL; | 325 | return -EINVAL; |
326 | adapter->tx_fc = ecmd->tx_pause; | ||
327 | adapter->rx_fc = ecmd->rx_pause; | ||
326 | 328 | ||
327 | status = be_cmd_set_flow_control(adapter, ecmd->tx_pause, | 329 | status = be_cmd_set_flow_control(adapter, |
328 | ecmd->rx_pause); | 330 | adapter->tx_fc, adapter->rx_fc); |
329 | if (!status) | 331 | if (status) |
330 | dev_warn(&adapter->pdev->dev, "Pause param set failed.\n"); | 332 | dev_warn(&adapter->pdev->dev, "Pause param set failed.\n"); |
331 | 333 | ||
332 | return status; | 334 | return status; |
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c index 1f941f027718..876b357101fa 100644 --- a/drivers/net/benet/be_main.c +++ b/drivers/net/benet/be_main.c | |||
@@ -1610,11 +1610,21 @@ static int be_open(struct net_device *netdev) | |||
1610 | 1610 | ||
1611 | status = be_cmd_link_status_query(adapter, &link_up); | 1611 | status = be_cmd_link_status_query(adapter, &link_up); |
1612 | if (status) | 1612 | if (status) |
1613 | return status; | 1613 | goto ret_sts; |
1614 | be_link_status_update(adapter, link_up); | 1614 | be_link_status_update(adapter, link_up); |
1615 | 1615 | ||
1616 | status = be_vid_config(adapter); | ||
1617 | if (status) | ||
1618 | goto ret_sts; | ||
1619 | |||
1620 | status = be_cmd_set_flow_control(adapter, | ||
1621 | adapter->tx_fc, adapter->rx_fc); | ||
1622 | if (status) | ||
1623 | goto ret_sts; | ||
1624 | |||
1616 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); | 1625 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); |
1617 | return 0; | 1626 | ret_sts: |
1627 | return status; | ||
1618 | } | 1628 | } |
1619 | 1629 | ||
1620 | static int be_setup(struct be_adapter *adapter) | 1630 | static int be_setup(struct be_adapter *adapter) |
@@ -1648,17 +1658,8 @@ static int be_setup(struct be_adapter *adapter) | |||
1648 | if (status != 0) | 1658 | if (status != 0) |
1649 | goto rx_qs_destroy; | 1659 | goto rx_qs_destroy; |
1650 | 1660 | ||
1651 | status = be_vid_config(adapter); | ||
1652 | if (status != 0) | ||
1653 | goto mccqs_destroy; | ||
1654 | |||
1655 | status = be_cmd_set_flow_control(adapter, true, true); | ||
1656 | if (status != 0) | ||
1657 | goto mccqs_destroy; | ||
1658 | return 0; | 1661 | return 0; |
1659 | 1662 | ||
1660 | mccqs_destroy: | ||
1661 | be_mcc_queues_destroy(adapter); | ||
1662 | rx_qs_destroy: | 1663 | rx_qs_destroy: |
1663 | be_rx_queues_destroy(adapter); | 1664 | be_rx_queues_destroy(adapter); |
1664 | tx_qs_destroy: | 1665 | tx_qs_destroy: |
@@ -1909,6 +1910,10 @@ static void be_netdev_init(struct net_device *netdev) | |||
1909 | 1910 | ||
1910 | adapter->rx_csum = true; | 1911 | adapter->rx_csum = true; |
1911 | 1912 | ||
1913 | /* Default settings for Rx and Tx flow control */ | ||
1914 | adapter->rx_fc = true; | ||
1915 | adapter->tx_fc = true; | ||
1916 | |||
1912 | netif_set_gso_max_size(netdev, 65535); | 1917 | netif_set_gso_max_size(netdev, 65535); |
1913 | 1918 | ||
1914 | BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); | 1919 | BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); |
@@ -2171,6 +2176,7 @@ static int be_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2171 | be_close(netdev); | 2176 | be_close(netdev); |
2172 | rtnl_unlock(); | 2177 | rtnl_unlock(); |
2173 | } | 2178 | } |
2179 | be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc); | ||
2174 | be_clear(adapter); | 2180 | be_clear(adapter); |
2175 | 2181 | ||
2176 | pci_save_state(pdev); | 2182 | pci_save_state(pdev); |
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c index f0b9a1e1db46..564e31c9fee4 100644 --- a/drivers/net/can/dev.c +++ b/drivers/net/can/dev.c | |||
@@ -589,6 +589,22 @@ static int can_changelink(struct net_device *dev, | |||
589 | return 0; | 589 | return 0; |
590 | } | 590 | } |
591 | 591 | ||
592 | static size_t can_get_size(const struct net_device *dev) | ||
593 | { | ||
594 | struct can_priv *priv = netdev_priv(dev); | ||
595 | size_t size; | ||
596 | |||
597 | size = nla_total_size(sizeof(u32)); /* IFLA_CAN_STATE */ | ||
598 | size += sizeof(struct can_ctrlmode); /* IFLA_CAN_CTRLMODE */ | ||
599 | size += nla_total_size(sizeof(u32)); /* IFLA_CAN_RESTART_MS */ | ||
600 | size += sizeof(struct can_bittiming); /* IFLA_CAN_BITTIMING */ | ||
601 | size += sizeof(struct can_clock); /* IFLA_CAN_CLOCK */ | ||
602 | if (priv->bittiming_const) /* IFLA_CAN_BITTIMING_CONST */ | ||
603 | size += sizeof(struct can_bittiming_const); | ||
604 | |||
605 | return size; | ||
606 | } | ||
607 | |||
592 | static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) | 608 | static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) |
593 | { | 609 | { |
594 | struct can_priv *priv = netdev_priv(dev); | 610 | struct can_priv *priv = netdev_priv(dev); |
@@ -639,6 +655,7 @@ static struct rtnl_link_ops can_link_ops __read_mostly = { | |||
639 | .setup = can_setup, | 655 | .setup = can_setup, |
640 | .newlink = can_newlink, | 656 | .newlink = can_newlink, |
641 | .changelink = can_changelink, | 657 | .changelink = can_changelink, |
658 | .get_size = can_get_size, | ||
642 | .fill_info = can_fill_info, | 659 | .fill_info = can_fill_info, |
643 | .fill_xstats = can_fill_xstats, | 660 | .fill_xstats = can_fill_xstats, |
644 | }; | 661 | }; |
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c index 9012e0abc626..abdbd9c2b788 100644 --- a/drivers/net/can/usb/ems_usb.c +++ b/drivers/net/can/usb/ems_usb.c | |||
@@ -319,7 +319,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg) | |||
319 | 319 | ||
320 | cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame)); | 320 | cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame)); |
321 | 321 | ||
322 | cf->can_id = msg->msg.can_msg.id; | 322 | cf->can_id = le32_to_cpu(msg->msg.can_msg.id); |
323 | cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); | 323 | cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); |
324 | 324 | ||
325 | if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME | 325 | if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME |
@@ -813,6 +813,9 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne | |||
813 | msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc; | 813 | msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc; |
814 | } | 814 | } |
815 | 815 | ||
816 | /* Respect byte order */ | ||
817 | msg->msg.can_msg.id = cpu_to_le32(msg->msg.can_msg.id); | ||
818 | |||
816 | for (i = 0; i < MAX_TX_URBS; i++) { | 819 | for (i = 0; i < MAX_TX_URBS; i++) { |
817 | if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) { | 820 | if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) { |
818 | context = &dev->tx_contexts[i]; | 821 | context = &dev->tx_contexts[i]; |
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c index 05916aafa4f1..f857afe8e488 100644 --- a/drivers/net/cassini.c +++ b/drivers/net/cassini.c | |||
@@ -4342,11 +4342,11 @@ static int cas_open(struct net_device *dev) | |||
4342 | cas_unlock_all_restore(cp, flags); | 4342 | cas_unlock_all_restore(cp, flags); |
4343 | } | 4343 | } |
4344 | 4344 | ||
4345 | err = -ENOMEM; | ||
4345 | if (cas_tx_tiny_alloc(cp) < 0) | 4346 | if (cas_tx_tiny_alloc(cp) < 0) |
4346 | return -ENOMEM; | 4347 | goto err_unlock; |
4347 | 4348 | ||
4348 | /* alloc rx descriptors */ | 4349 | /* alloc rx descriptors */ |
4349 | err = -ENOMEM; | ||
4350 | if (cas_alloc_rxds(cp) < 0) | 4350 | if (cas_alloc_rxds(cp) < 0) |
4351 | goto err_tx_tiny; | 4351 | goto err_tx_tiny; |
4352 | 4352 | ||
@@ -4386,6 +4386,7 @@ err_spare: | |||
4386 | cas_free_rxds(cp); | 4386 | cas_free_rxds(cp); |
4387 | err_tx_tiny: | 4387 | err_tx_tiny: |
4388 | cas_tx_tiny_free(cp); | 4388 | cas_tx_tiny_free(cp); |
4389 | err_unlock: | ||
4389 | mutex_unlock(&cp->pm_mutex); | 4390 | mutex_unlock(&cp->pm_mutex); |
4390 | return err; | 4391 | return err; |
4391 | } | 4392 | } |
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index f72c56dec33c..3179521aee90 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c | |||
@@ -2221,7 +2221,7 @@ void emac_poll_controller(struct net_device *ndev) | |||
2221 | struct emac_priv *priv = netdev_priv(ndev); | 2221 | struct emac_priv *priv = netdev_priv(ndev); |
2222 | 2222 | ||
2223 | emac_int_disable(priv); | 2223 | emac_int_disable(priv); |
2224 | emac_irq(ndev->irq, priv); | 2224 | emac_irq(ndev->irq, ndev); |
2225 | emac_int_enable(priv); | 2225 | emac_int_enable(priv); |
2226 | } | 2226 | } |
2227 | #endif | 2227 | #endif |
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c index 6ac464866972..efbf67689eca 100644 --- a/drivers/net/fsl_pq_mdio.c +++ b/drivers/net/fsl_pq_mdio.c | |||
@@ -427,3 +427,4 @@ void fsl_pq_mdio_exit(void) | |||
427 | of_unregister_platform_driver(&fsl_pq_mdio_driver); | 427 | of_unregister_platform_driver(&fsl_pq_mdio_driver); |
428 | } | 428 | } |
429 | module_exit(fsl_pq_mdio_exit); | 429 | module_exit(fsl_pq_mdio_exit); |
430 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index cbb143ca1eb8..5bd9e6bf6f2f 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -44,6 +44,7 @@ | |||
44 | 44 | ||
45 | #include "ixgbe.h" | 45 | #include "ixgbe.h" |
46 | #include "ixgbe_common.h" | 46 | #include "ixgbe_common.h" |
47 | #include "ixgbe_dcb_82599.h" | ||
47 | 48 | ||
48 | char ixgbe_driver_name[] = "ixgbe"; | 49 | char ixgbe_driver_name[] = "ixgbe"; |
49 | static const char ixgbe_driver_string[] = | 50 | static const char ixgbe_driver_string[] = |
@@ -226,6 +227,56 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter, | |||
226 | /* tx_buffer_info must be completely set up in the transmit path */ | 227 | /* tx_buffer_info must be completely set up in the transmit path */ |
227 | } | 228 | } |
228 | 229 | ||
230 | /** | ||
231 | * ixgbe_tx_is_paused - check if the tx ring is paused | ||
232 | * @adapter: the ixgbe adapter | ||
233 | * @tx_ring: the corresponding tx_ring | ||
234 | * | ||
235 | * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the | ||
236 | * corresponding TC of this tx_ring when checking TFCS. | ||
237 | * | ||
238 | * Returns : true if paused | ||
239 | */ | ||
240 | static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter, | ||
241 | struct ixgbe_ring *tx_ring) | ||
242 | { | ||
243 | int tc; | ||
244 | u32 txoff = IXGBE_TFCS_TXOFF; | ||
245 | |||
246 | #ifdef CONFIG_IXGBE_DCB | ||
247 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | ||
248 | int reg_idx = tx_ring->reg_idx; | ||
249 | int dcb_i = adapter->ring_feature[RING_F_DCB].indices; | ||
250 | |||
251 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | ||
252 | tc = reg_idx >> 2; | ||
253 | txoff = IXGBE_TFCS_TXOFF0; | ||
254 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | ||
255 | tc = 0; | ||
256 | txoff = IXGBE_TFCS_TXOFF; | ||
257 | if (dcb_i == 8) { | ||
258 | /* TC0, TC1 */ | ||
259 | tc = reg_idx >> 5; | ||
260 | if (tc == 2) /* TC2, TC3 */ | ||
261 | tc += (reg_idx - 64) >> 4; | ||
262 | else if (tc == 3) /* TC4, TC5, TC6, TC7 */ | ||
263 | tc += 1 + ((reg_idx - 96) >> 3); | ||
264 | } else if (dcb_i == 4) { | ||
265 | /* TC0, TC1 */ | ||
266 | tc = reg_idx >> 6; | ||
267 | if (tc == 1) { | ||
268 | tc += (reg_idx - 64) >> 5; | ||
269 | if (tc == 2) /* TC2, TC3 */ | ||
270 | tc += (reg_idx - 96) >> 4; | ||
271 | } | ||
272 | } | ||
273 | } | ||
274 | txoff <<= tc; | ||
275 | } | ||
276 | #endif | ||
277 | return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff; | ||
278 | } | ||
279 | |||
229 | static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, | 280 | static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, |
230 | struct ixgbe_ring *tx_ring, | 281 | struct ixgbe_ring *tx_ring, |
231 | unsigned int eop) | 282 | unsigned int eop) |
@@ -237,7 +288,7 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, | |||
237 | adapter->detect_tx_hung = false; | 288 | adapter->detect_tx_hung = false; |
238 | if (tx_ring->tx_buffer_info[eop].time_stamp && | 289 | if (tx_ring->tx_buffer_info[eop].time_stamp && |
239 | time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && | 290 | time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && |
240 | !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) { | 291 | !ixgbe_tx_is_paused(adapter, tx_ring)) { |
241 | /* detected Tx unit hang */ | 292 | /* detected Tx unit hang */ |
242 | union ixgbe_adv_tx_desc *tx_desc; | 293 | union ixgbe_adv_tx_desc *tx_desc; |
243 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); | 294 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); |
@@ -412,19 +463,23 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, | |||
412 | u32 txctrl; | 463 | u32 txctrl; |
413 | int cpu = get_cpu(); | 464 | int cpu = get_cpu(); |
414 | int q = tx_ring - adapter->tx_ring; | 465 | int q = tx_ring - adapter->tx_ring; |
466 | struct ixgbe_hw *hw = &adapter->hw; | ||
415 | 467 | ||
416 | if (tx_ring->cpu != cpu) { | 468 | if (tx_ring->cpu != cpu) { |
417 | txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q)); | ||
418 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | 469 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { |
470 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q)); | ||
419 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; | 471 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; |
420 | txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); | 472 | txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); |
473 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
474 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl); | ||
421 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | 475 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { |
476 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q)); | ||
422 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; | 477 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; |
423 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << | 478 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << |
424 | IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); | 479 | IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); |
480 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
481 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl); | ||
425 | } | 482 | } |
426 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
427 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl); | ||
428 | tx_ring->cpu = cpu; | 483 | tx_ring->cpu = cpu; |
429 | } | 484 | } |
430 | put_cpu(); | 485 | put_cpu(); |
@@ -1913,11 +1968,25 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) | |||
1913 | break; | 1968 | break; |
1914 | } | 1969 | } |
1915 | } | 1970 | } |
1971 | |||
1916 | if (hw->mac.type == ixgbe_mac_82599EB) { | 1972 | if (hw->mac.type == ixgbe_mac_82599EB) { |
1973 | u32 rttdcs; | ||
1974 | |||
1975 | /* disable the arbiter while setting MTQC */ | ||
1976 | rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); | ||
1977 | rttdcs |= IXGBE_RTTDCS_ARBDIS; | ||
1978 | IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); | ||
1979 | |||
1917 | /* We enable 8 traffic classes, DCB only */ | 1980 | /* We enable 8 traffic classes, DCB only */ |
1918 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) | 1981 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) |
1919 | IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA | | 1982 | IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA | |
1920 | IXGBE_MTQC_8TC_8TQ)); | 1983 | IXGBE_MTQC_8TC_8TQ)); |
1984 | else | ||
1985 | IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB); | ||
1986 | |||
1987 | /* re-eable the arbiter */ | ||
1988 | rttdcs &= ~IXGBE_RTTDCS_ARBDIS; | ||
1989 | IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); | ||
1921 | } | 1990 | } |
1922 | } | 1991 | } |
1923 | 1992 | ||
@@ -2471,7 +2540,10 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter) | |||
2471 | ixgbe_restore_vlan(adapter); | 2540 | ixgbe_restore_vlan(adapter); |
2472 | #ifdef CONFIG_IXGBE_DCB | 2541 | #ifdef CONFIG_IXGBE_DCB |
2473 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | 2542 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { |
2474 | netif_set_gso_max_size(netdev, 32768); | 2543 | if (hw->mac.type == ixgbe_mac_82598EB) |
2544 | netif_set_gso_max_size(netdev, 32768); | ||
2545 | else | ||
2546 | netif_set_gso_max_size(netdev, 65536); | ||
2475 | ixgbe_configure_dcb(adapter); | 2547 | ixgbe_configure_dcb(adapter); |
2476 | } else { | 2548 | } else { |
2477 | netif_set_gso_max_size(netdev, 65536); | 2549 | netif_set_gso_max_size(netdev, 65536); |
diff --git a/drivers/net/macsonic.c b/drivers/net/macsonic.c index 61eabcac734c..b3d7d8d77f46 100644 --- a/drivers/net/macsonic.c +++ b/drivers/net/macsonic.c | |||
@@ -223,69 +223,73 @@ static int __devinit macsonic_init(struct net_device *dev) | |||
223 | return 0; | 223 | return 0; |
224 | } | 224 | } |
225 | 225 | ||
226 | static int __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev) | 226 | #define INVALID_MAC(mac) (memcmp(mac, "\x08\x00\x07", 3) && \ |
227 | memcmp(mac, "\x00\xA0\x40", 3) && \ | ||
228 | memcmp(mac, "\x00\x80\x19", 3) && \ | ||
229 | memcmp(mac, "\x00\x05\x02", 3)) | ||
230 | |||
231 | static void __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev) | ||
227 | { | 232 | { |
228 | struct sonic_local *lp = netdev_priv(dev); | 233 | struct sonic_local *lp = netdev_priv(dev); |
229 | const int prom_addr = ONBOARD_SONIC_PROM_BASE; | 234 | const int prom_addr = ONBOARD_SONIC_PROM_BASE; |
230 | int i; | 235 | unsigned short val; |
231 | 236 | ||
232 | /* On NuBus boards we can sometimes look in the ROM resources. | 237 | /* |
233 | No such luck for comm-slot/onboard. */ | 238 | * On NuBus boards we can sometimes look in the ROM resources. |
234 | for(i = 0; i < 6; i++) | 239 | * No such luck for comm-slot/onboard. |
235 | dev->dev_addr[i] = SONIC_READ_PROM(i); | 240 | * On the PowerBook 520, the PROM base address is a mystery. |
241 | */ | ||
242 | if (hwreg_present((void *)prom_addr)) { | ||
243 | int i; | ||
244 | |||
245 | for (i = 0; i < 6; i++) | ||
246 | dev->dev_addr[i] = SONIC_READ_PROM(i); | ||
247 | if (!INVALID_MAC(dev->dev_addr)) | ||
248 | return; | ||
236 | 249 | ||
237 | /* Most of the time, the address is bit-reversed. The NetBSD | 250 | /* |
238 | source has a rather long and detailed historical account of | 251 | * Most of the time, the address is bit-reversed. The NetBSD |
239 | why this is so. */ | 252 | * source has a rather long and detailed historical account of |
240 | if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && | 253 | * why this is so. |
241 | memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && | 254 | */ |
242 | memcmp(dev->dev_addr, "\x00\x80\x19", 3) && | ||
243 | memcmp(dev->dev_addr, "\x00\x05\x02", 3)) | ||
244 | bit_reverse_addr(dev->dev_addr); | 255 | bit_reverse_addr(dev->dev_addr); |
245 | else | 256 | if (!INVALID_MAC(dev->dev_addr)) |
246 | return 0; | 257 | return; |
247 | 258 | ||
248 | /* If we still have what seems to be a bogus address, we'll | ||
249 | look in the CAM. The top entry should be ours. */ | ||
250 | /* Danger! This only works if MacOS has already initialized | ||
251 | the card... */ | ||
252 | if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && | ||
253 | memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && | ||
254 | memcmp(dev->dev_addr, "\x00\x80\x19", 3) && | ||
255 | memcmp(dev->dev_addr, "\x00\x05\x02", 3)) | ||
256 | { | ||
257 | unsigned short val; | ||
258 | |||
259 | printk(KERN_INFO "macsonic: PROM seems to be wrong, trying CAM entry 15\n"); | ||
260 | |||
261 | SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); | ||
262 | SONIC_WRITE(SONIC_CEP, 15); | ||
263 | |||
264 | val = SONIC_READ(SONIC_CAP2); | ||
265 | dev->dev_addr[5] = val >> 8; | ||
266 | dev->dev_addr[4] = val & 0xff; | ||
267 | val = SONIC_READ(SONIC_CAP1); | ||
268 | dev->dev_addr[3] = val >> 8; | ||
269 | dev->dev_addr[2] = val & 0xff; | ||
270 | val = SONIC_READ(SONIC_CAP0); | ||
271 | dev->dev_addr[1] = val >> 8; | ||
272 | dev->dev_addr[0] = val & 0xff; | ||
273 | |||
274 | printk(KERN_INFO "HW Address from CAM 15: %pM\n", | ||
275 | dev->dev_addr); | ||
276 | } else return 0; | ||
277 | |||
278 | if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && | ||
279 | memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && | ||
280 | memcmp(dev->dev_addr, "\x00\x80\x19", 3) && | ||
281 | memcmp(dev->dev_addr, "\x00\x05\x02", 3)) | ||
282 | { | ||
283 | /* | 259 | /* |
284 | * Still nonsense ... messed up someplace! | 260 | * If we still have what seems to be a bogus address, we'll |
261 | * look in the CAM. The top entry should be ours. | ||
285 | */ | 262 | */ |
286 | printk(KERN_ERR "macsonic: ERROR (INVALID MAC)\n"); | 263 | printk(KERN_WARNING "macsonic: MAC address in PROM seems " |
287 | return -EIO; | 264 | "to be invalid, trying CAM\n"); |
288 | } else return 0; | 265 | } else { |
266 | printk(KERN_WARNING "macsonic: cannot read MAC address from " | ||
267 | "PROM, trying CAM\n"); | ||
268 | } | ||
269 | |||
270 | /* This only works if MacOS has already initialized the card. */ | ||
271 | |||
272 | SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); | ||
273 | SONIC_WRITE(SONIC_CEP, 15); | ||
274 | |||
275 | val = SONIC_READ(SONIC_CAP2); | ||
276 | dev->dev_addr[5] = val >> 8; | ||
277 | dev->dev_addr[4] = val & 0xff; | ||
278 | val = SONIC_READ(SONIC_CAP1); | ||
279 | dev->dev_addr[3] = val >> 8; | ||
280 | dev->dev_addr[2] = val & 0xff; | ||
281 | val = SONIC_READ(SONIC_CAP0); | ||
282 | dev->dev_addr[1] = val >> 8; | ||
283 | dev->dev_addr[0] = val & 0xff; | ||
284 | |||
285 | if (!INVALID_MAC(dev->dev_addr)) | ||
286 | return; | ||
287 | |||
288 | /* Still nonsense ... messed up someplace! */ | ||
289 | |||
290 | printk(KERN_WARNING "macsonic: MAC address in CAM entry 15 " | ||
291 | "seems invalid, will use a random MAC\n"); | ||
292 | random_ether_addr(dev->dev_addr); | ||
289 | } | 293 | } |
290 | 294 | ||
291 | static int __devinit mac_onboard_sonic_probe(struct net_device *dev) | 295 | static int __devinit mac_onboard_sonic_probe(struct net_device *dev) |
@@ -402,8 +406,7 @@ static int __devinit mac_onboard_sonic_probe(struct net_device *dev) | |||
402 | SONIC_WRITE(SONIC_ISR, 0x7fff); | 406 | SONIC_WRITE(SONIC_ISR, 0x7fff); |
403 | 407 | ||
404 | /* Now look for the MAC address. */ | 408 | /* Now look for the MAC address. */ |
405 | if (mac_onboard_sonic_ethernet_addr(dev) != 0) | 409 | mac_onboard_sonic_ethernet_addr(dev); |
406 | return -ENODEV; | ||
407 | 410 | ||
408 | /* Shared init code */ | 411 | /* Shared init code */ |
409 | return macsonic_init(dev); | 412 | return macsonic_init(dev); |
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c index cea7531f4f40..a2fc70a0d0cc 100644 --- a/drivers/net/qlge/qlge_main.c +++ b/drivers/net/qlge/qlge_main.c | |||
@@ -3916,6 +3916,8 @@ static int __devinit ql_init_device(struct pci_dev *pdev, | |||
3916 | goto err_out; | 3916 | goto err_out; |
3917 | } | 3917 | } |
3918 | 3918 | ||
3919 | /* Set PCIe reset type for EEH to fundamental. */ | ||
3920 | pdev->needs_freset = 1; | ||
3919 | pci_save_state(pdev); | 3921 | pci_save_state(pdev); |
3920 | qdev->reg_base = | 3922 | qdev->reg_base = |
3921 | ioremap_nocache(pci_resource_start(pdev, 1), | 3923 | ioremap_nocache(pci_resource_start(pdev, 1), |
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c index bcf13c96f73f..aec05f266107 100644 --- a/drivers/net/qlge/qlge_mpi.c +++ b/drivers/net/qlge/qlge_mpi.c | |||
@@ -499,7 +499,7 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) | |||
499 | /* Wait for the interrupt to come in. */ | 499 | /* Wait for the interrupt to come in. */ |
500 | status = ql_wait_mbx_cmd_cmplt(qdev); | 500 | status = ql_wait_mbx_cmd_cmplt(qdev); |
501 | if (status) | 501 | if (status) |
502 | goto end; | 502 | continue; |
503 | 503 | ||
504 | /* Process the event. If it's an AEN, it | 504 | /* Process the event. If it's an AEN, it |
505 | * will be handled in-line or a worker | 505 | * will be handled in-line or a worker |
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c index cee00ad49b57..49eb91b5f50c 100644 --- a/drivers/net/sfc/sfe4001.c +++ b/drivers/net/sfc/sfe4001.c | |||
@@ -188,7 +188,7 @@ static int sfn4111t_reset(struct efx_nic *efx) | |||
188 | efx_oword_t reg; | 188 | efx_oword_t reg; |
189 | 189 | ||
190 | /* GPIO 3 and the GPIO register are shared with I2C, so block that */ | 190 | /* GPIO 3 and the GPIO register are shared with I2C, so block that */ |
191 | mutex_lock(&efx->i2c_adap.bus_lock); | 191 | i2c_lock_adapter(&efx->i2c_adap); |
192 | 192 | ||
193 | /* Pull RST_N (GPIO 2) low then let it up again, setting the | 193 | /* Pull RST_N (GPIO 2) low then let it up again, setting the |
194 | * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the | 194 | * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the |
@@ -204,7 +204,7 @@ static int sfn4111t_reset(struct efx_nic *efx) | |||
204 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | 204 | falcon_write(efx, ®, GPIO_CTL_REG_KER); |
205 | msleep(1); | 205 | msleep(1); |
206 | 206 | ||
207 | mutex_unlock(&efx->i2c_adap.bus_lock); | 207 | i2c_unlock_adapter(&efx->i2c_adap); |
208 | 208 | ||
209 | ssleep(1); | 209 | ssleep(1); |
210 | return 0; | 210 | return 0; |
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig index c47237c2d638..32d93564a74d 100644 --- a/drivers/net/usb/Kconfig +++ b/drivers/net/usb/Kconfig | |||
@@ -174,7 +174,7 @@ config USB_NET_CDCETHER | |||
174 | * Ericsson Mobile Broadband Module (all variants) | 174 | * Ericsson Mobile Broadband Module (all variants) |
175 | * Motorola (DM100 and SB4100) | 175 | * Motorola (DM100 and SB4100) |
176 | * Broadcom Cable Modem (reference design) | 176 | * Broadcom Cable Modem (reference design) |
177 | * Toshiba (PCX1100U and F3507g) | 177 | * Toshiba (PCX1100U and F3507g/F3607gw) |
178 | * ... | 178 | * ... |
179 | 179 | ||
180 | This driver creates an interface named "ethX", where X depends on | 180 | This driver creates an interface named "ethX", where X depends on |
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c index 4a6aff579403..21e1ba160008 100644 --- a/drivers/net/usb/cdc_ether.c +++ b/drivers/net/usb/cdc_ether.c | |||
@@ -544,20 +544,60 @@ static const struct usb_device_id products [] = { | |||
544 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 544 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
545 | .driver_info = (unsigned long) &cdc_info, | 545 | .driver_info = (unsigned long) &cdc_info, |
546 | }, { | 546 | }, { |
547 | /* Ericsson F3307 */ | 547 | /* Ericsson F3607gw ver 2 */ |
548 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1905, USB_CLASS_COMM, | ||
549 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
550 | .driver_info = (unsigned long) &cdc_info, | ||
551 | }, { | ||
552 | /* Ericsson F3607gw ver 3 */ | ||
548 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, | 553 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, |
549 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 554 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
550 | .driver_info = (unsigned long) &cdc_info, | 555 | .driver_info = (unsigned long) &cdc_info, |
551 | }, { | 556 | }, { |
557 | /* Ericsson F3307 */ | ||
558 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x190a, USB_CLASS_COMM, | ||
559 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
560 | .driver_info = (unsigned long) &cdc_info, | ||
561 | }, { | ||
562 | /* Ericsson F3307 ver 2 */ | ||
563 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1909, USB_CLASS_COMM, | ||
564 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
565 | .driver_info = (unsigned long) &cdc_info, | ||
566 | }, { | ||
567 | /* Ericsson C3607w */ | ||
568 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1049, USB_CLASS_COMM, | ||
569 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
570 | .driver_info = (unsigned long) &cdc_info, | ||
571 | }, { | ||
552 | /* Toshiba F3507g */ | 572 | /* Toshiba F3507g */ |
553 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, | 573 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, |
554 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 574 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
555 | .driver_info = (unsigned long) &cdc_info, | 575 | .driver_info = (unsigned long) &cdc_info, |
556 | }, { | 576 | }, { |
577 | /* Toshiba F3607gw */ | ||
578 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130c, USB_CLASS_COMM, | ||
579 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
580 | .driver_info = (unsigned long) &cdc_info, | ||
581 | }, { | ||
582 | /* Toshiba F3607gw ver 2 */ | ||
583 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x1311, USB_CLASS_COMM, | ||
584 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
585 | .driver_info = (unsigned long) &cdc_info, | ||
586 | }, { | ||
557 | /* Dell F3507g */ | 587 | /* Dell F3507g */ |
558 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, | 588 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, |
559 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 589 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
560 | .driver_info = (unsigned long) &cdc_info, | 590 | .driver_info = (unsigned long) &cdc_info, |
591 | }, { | ||
592 | /* Dell F3607gw */ | ||
593 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8183, USB_CLASS_COMM, | ||
594 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
595 | .driver_info = (unsigned long) &cdc_info, | ||
596 | }, { | ||
597 | /* Dell F3607gw ver 2 */ | ||
598 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8184, USB_CLASS_COMM, | ||
599 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
600 | .driver_info = (unsigned long) &cdc_info, | ||
561 | }, | 601 | }, |
562 | { }, // END | 602 | { }, // END |
563 | }; | 603 | }; |
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c index 05630f2f6930..b9e002fccbca 100644 --- a/drivers/net/virtio_net.c +++ b/drivers/net/virtio_net.c | |||
@@ -998,7 +998,7 @@ static unsigned int features[] = { | |||
998 | VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, | 998 | VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, |
999 | }; | 999 | }; |
1000 | 1000 | ||
1001 | static struct virtio_driver virtio_net = { | 1001 | static struct virtio_driver virtio_net_driver = { |
1002 | .feature_table = features, | 1002 | .feature_table = features, |
1003 | .feature_table_size = ARRAY_SIZE(features), | 1003 | .feature_table_size = ARRAY_SIZE(features), |
1004 | .driver.name = KBUILD_MODNAME, | 1004 | .driver.name = KBUILD_MODNAME, |
@@ -1011,12 +1011,12 @@ static struct virtio_driver virtio_net = { | |||
1011 | 1011 | ||
1012 | static int __init init(void) | 1012 | static int __init init(void) |
1013 | { | 1013 | { |
1014 | return register_virtio_driver(&virtio_net); | 1014 | return register_virtio_driver(&virtio_net_driver); |
1015 | } | 1015 | } |
1016 | 1016 | ||
1017 | static void __exit fini(void) | 1017 | static void __exit fini(void) |
1018 | { | 1018 | { |
1019 | unregister_virtio_driver(&virtio_net); | 1019 | unregister_virtio_driver(&virtio_net_driver); |
1020 | } | 1020 | } |
1021 | module_init(init); | 1021 | module_init(init); |
1022 | module_exit(fini); | 1022 | module_exit(fini); |
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c index a741d37fd96f..240cff1e6979 100644 --- a/drivers/net/wireless/ipw2x00/ipw2100.c +++ b/drivers/net/wireless/ipw2x00/ipw2100.c | |||
@@ -6325,10 +6325,8 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev, | |||
6325 | 6325 | ||
6326 | fail: | 6326 | fail: |
6327 | if (dev) { | 6327 | if (dev) { |
6328 | if (registered) { | 6328 | if (registered) |
6329 | unregister_ieee80211(priv->ieee); | ||
6330 | unregister_netdev(dev); | 6329 | unregister_netdev(dev); |
6331 | } | ||
6332 | 6330 | ||
6333 | ipw2100_hw_stop_adapter(priv); | 6331 | ipw2100_hw_stop_adapter(priv); |
6334 | 6332 | ||
@@ -6385,7 +6383,6 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev) | |||
6385 | /* Unregister the device first - this results in close() | 6383 | /* Unregister the device first - this results in close() |
6386 | * being called if the device is open. If we free storage | 6384 | * being called if the device is open. If we free storage |
6387 | * first, then close() will crash. */ | 6385 | * first, then close() will crash. */ |
6388 | unregister_ieee80211(priv->ieee); | ||
6389 | unregister_netdev(dev); | 6386 | unregister_netdev(dev); |
6390 | 6387 | ||
6391 | /* ipw2100_down will ensure that there is no more pending work | 6388 | /* ipw2100_down will ensure that there is no more pending work |
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c index 9b0f2c0646e0..827824d45de9 100644 --- a/drivers/net/wireless/ipw2x00/ipw2200.c +++ b/drivers/net/wireless/ipw2x00/ipw2200.c | |||
@@ -11822,7 +11822,6 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev, | |||
11822 | if (err) { | 11822 | if (err) { |
11823 | IPW_ERROR("Failed to register promiscuous network " | 11823 | IPW_ERROR("Failed to register promiscuous network " |
11824 | "device (error %d).\n", err); | 11824 | "device (error %d).\n", err); |
11825 | unregister_ieee80211(priv->ieee); | ||
11826 | unregister_netdev(priv->net_dev); | 11825 | unregister_netdev(priv->net_dev); |
11827 | goto out_remove_sysfs; | 11826 | goto out_remove_sysfs; |
11828 | } | 11827 | } |
@@ -11873,7 +11872,6 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev) | |||
11873 | 11872 | ||
11874 | mutex_unlock(&priv->mutex); | 11873 | mutex_unlock(&priv->mutex); |
11875 | 11874 | ||
11876 | unregister_ieee80211(priv->ieee); | ||
11877 | unregister_netdev(priv->net_dev); | 11875 | unregister_netdev(priv->net_dev); |
11878 | 11876 | ||
11879 | if (priv->rxq) { | 11877 | if (priv->rxq) { |
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h index f42ade6c2d3e..bf45391172f3 100644 --- a/drivers/net/wireless/ipw2x00/libipw.h +++ b/drivers/net/wireless/ipw2x00/libipw.h | |||
@@ -1020,7 +1020,6 @@ static inline int libipw_is_cck_rate(u8 rate) | |||
1020 | /* ieee80211.c */ | 1020 | /* ieee80211.c */ |
1021 | extern void free_ieee80211(struct net_device *dev, int monitor); | 1021 | extern void free_ieee80211(struct net_device *dev, int monitor); |
1022 | extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); | 1022 | extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); |
1023 | extern void unregister_ieee80211(struct libipw_device *ieee); | ||
1024 | extern int libipw_change_mtu(struct net_device *dev, int new_mtu); | 1023 | extern int libipw_change_mtu(struct net_device *dev, int new_mtu); |
1025 | 1024 | ||
1026 | extern void libipw_networks_age(struct libipw_device *ieee, | 1025 | extern void libipw_networks_age(struct libipw_device *ieee, |
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c index be5b809ec97a..a0e9f6aed7da 100644 --- a/drivers/net/wireless/ipw2x00/libipw_module.c +++ b/drivers/net/wireless/ipw2x00/libipw_module.c | |||
@@ -235,19 +235,16 @@ void free_ieee80211(struct net_device *dev, int monitor) | |||
235 | libipw_networks_free(ieee); | 235 | libipw_networks_free(ieee); |
236 | 236 | ||
237 | /* free cfg80211 resources */ | 237 | /* free cfg80211 resources */ |
238 | if (!monitor) | 238 | if (!monitor) { |
239 | wiphy_unregister(ieee->wdev.wiphy); | ||
240 | kfree(ieee->a_band.channels); | ||
241 | kfree(ieee->bg_band.channels); | ||
239 | wiphy_free(ieee->wdev.wiphy); | 242 | wiphy_free(ieee->wdev.wiphy); |
243 | } | ||
240 | 244 | ||
241 | free_netdev(dev); | 245 | free_netdev(dev); |
242 | } | 246 | } |
243 | 247 | ||
244 | void unregister_ieee80211(struct libipw_device *ieee) | ||
245 | { | ||
246 | wiphy_unregister(ieee->wdev.wiphy); | ||
247 | kfree(ieee->a_band.channels); | ||
248 | kfree(ieee->bg_band.channels); | ||
249 | } | ||
250 | |||
251 | #ifdef CONFIG_LIBIPW_DEBUG | 248 | #ifdef CONFIG_LIBIPW_DEBUG |
252 | 249 | ||
253 | static int debug = 0; | 250 | static int debug = 0; |
@@ -333,4 +330,3 @@ module_init(libipw_init); | |||
333 | 330 | ||
334 | EXPORT_SYMBOL(alloc_ieee80211); | 331 | EXPORT_SYMBOL(alloc_ieee80211); |
335 | EXPORT_SYMBOL(free_ieee80211); | 332 | EXPORT_SYMBOL(free_ieee80211); |
336 | EXPORT_SYMBOL(unregister_ieee80211); | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index 71761b343839..73bbec58341e 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -815,6 +815,8 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
815 | 815 | ||
816 | mutex_init(&rt2x00dev->csr_mutex); | 816 | mutex_init(&rt2x00dev->csr_mutex); |
817 | 817 | ||
818 | set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags); | ||
819 | |||
818 | /* | 820 | /* |
819 | * Make room for rt2x00_intf inside the per-interface | 821 | * Make room for rt2x00_intf inside the per-interface |
820 | * structure ieee80211_vif. | 822 | * structure ieee80211_vif. |
@@ -871,8 +873,6 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
871 | rt2x00leds_register(rt2x00dev); | 873 | rt2x00leds_register(rt2x00dev); |
872 | rt2x00debug_register(rt2x00dev); | 874 | rt2x00debug_register(rt2x00dev); |
873 | 875 | ||
874 | set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags); | ||
875 | |||
876 | return 0; | 876 | return 0; |
877 | 877 | ||
878 | exit: | 878 | exit: |
diff --git a/drivers/net/wireless/rt2x00/rt2x00link.c b/drivers/net/wireless/rt2x00/rt2x00link.c index c64db0ba7f40..c708d0be9155 100644 --- a/drivers/net/wireless/rt2x00/rt2x00link.c +++ b/drivers/net/wireless/rt2x00/rt2x00link.c | |||
@@ -362,8 +362,9 @@ void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev) | |||
362 | 362 | ||
363 | rt2x00link_reset_tuner(rt2x00dev, false); | 363 | rt2x00link_reset_tuner(rt2x00dev, false); |
364 | 364 | ||
365 | ieee80211_queue_delayed_work(rt2x00dev->hw, | 365 | if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) |
366 | &link->work, LINK_TUNE_INTERVAL); | 366 | ieee80211_queue_delayed_work(rt2x00dev->hw, |
367 | &link->work, LINK_TUNE_INTERVAL); | ||
367 | } | 368 | } |
368 | 369 | ||
369 | void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev) | 370 | void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev) |
@@ -469,8 +470,10 @@ static void rt2x00link_tuner(struct work_struct *work) | |||
469 | * Increase tuner counter, and reschedule the next link tuner run. | 470 | * Increase tuner counter, and reschedule the next link tuner run. |
470 | */ | 471 | */ |
471 | link->count++; | 472 | link->count++; |
472 | ieee80211_queue_delayed_work(rt2x00dev->hw, | 473 | |
473 | &link->work, LINK_TUNE_INTERVAL); | 474 | if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) |
475 | ieee80211_queue_delayed_work(rt2x00dev->hw, | ||
476 | &link->work, LINK_TUNE_INTERVAL); | ||
474 | } | 477 | } |
475 | 478 | ||
476 | void rt2x00link_register(struct rt2x00_dev *rt2x00dev) | 479 | void rt2x00link_register(struct rt2x00_dev *rt2x00dev) |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c index 501544882c2c..f02b48a90593 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.c +++ b/drivers/net/wireless/rt2x00/rt2x00usb.c | |||
@@ -47,6 +47,8 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev, | |||
47 | (requesttype == USB_VENDOR_REQUEST_IN) ? | 47 | (requesttype == USB_VENDOR_REQUEST_IN) ? |
48 | usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0); | 48 | usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0); |
49 | 49 | ||
50 | if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) | ||
51 | return -ENODEV; | ||
50 | 52 | ||
51 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 53 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
52 | status = usb_control_msg(usb_dev, pipe, request, requesttype, | 54 | status = usb_control_msg(usb_dev, pipe, request, requesttype, |
@@ -60,8 +62,10 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev, | |||
60 | * -ENODEV: Device has disappeared, no point continuing. | 62 | * -ENODEV: Device has disappeared, no point continuing. |
61 | * All other errors: Try again. | 63 | * All other errors: Try again. |
62 | */ | 64 | */ |
63 | else if (status == -ENODEV) | 65 | else if (status == -ENODEV) { |
66 | clear_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags); | ||
64 | break; | 67 | break; |
68 | } | ||
65 | } | 69 | } |
66 | 70 | ||
67 | ERROR(rt2x00dev, | 71 | ERROR(rt2x00dev, |
@@ -161,6 +165,9 @@ int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev, | |||
161 | { | 165 | { |
162 | unsigned int i; | 166 | unsigned int i; |
163 | 167 | ||
168 | if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) | ||
169 | return -ENODEV; | ||
170 | |||
164 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 171 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
165 | rt2x00usb_register_read_lock(rt2x00dev, offset, reg); | 172 | rt2x00usb_register_read_lock(rt2x00dev, offset, reg); |
166 | if (!rt2x00_get_field32(*reg, field)) | 173 | if (!rt2x00_get_field32(*reg, field)) |
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c index a1c670fc1552..cf8a4a40fdf6 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_leds.c +++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c | |||
@@ -210,10 +210,10 @@ void rtl8187_leds_exit(struct ieee80211_hw *dev) | |||
210 | 210 | ||
211 | /* turn the LED off before exiting */ | 211 | /* turn the LED off before exiting */ |
212 | ieee80211_queue_delayed_work(dev, &priv->led_off, 0); | 212 | ieee80211_queue_delayed_work(dev, &priv->led_off, 0); |
213 | cancel_delayed_work_sync(&priv->led_off); | ||
214 | cancel_delayed_work_sync(&priv->led_on); | ||
215 | rtl8187_unregister_led(&priv->led_rx); | 213 | rtl8187_unregister_led(&priv->led_rx); |
216 | rtl8187_unregister_led(&priv->led_tx); | 214 | rtl8187_unregister_led(&priv->led_tx); |
215 | cancel_delayed_work_sync(&priv->led_off); | ||
216 | cancel_delayed_work_sync(&priv->led_on); | ||
217 | } | 217 | } |
218 | #endif /* def CONFIG_RTL8187_LED */ | 218 | #endif /* def CONFIG_RTL8187_LED */ |
219 | 219 | ||
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 745402e8e498..5b7056cec00c 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c | |||
@@ -656,8 +656,10 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev) | |||
656 | free_link_state(link); | 656 | free_link_state(link); |
657 | 657 | ||
658 | /* Recheck latencies and configure upstream links */ | 658 | /* Recheck latencies and configure upstream links */ |
659 | pcie_update_aspm_capable(root); | 659 | if (parent_link) { |
660 | pcie_config_aspm_path(parent_link); | 660 | pcie_update_aspm_capable(root); |
661 | pcie_config_aspm_path(parent_link); | ||
662 | } | ||
661 | out: | 663 | out: |
662 | mutex_unlock(&aspm_lock); | 664 | mutex_unlock(&aspm_lock); |
663 | up_read(&pci_bus_sem); | 665 | up_read(&pci_bus_sem); |
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c index d379e74a05d0..4226e5352738 100644 --- a/drivers/platform/x86/eeepc-laptop.c +++ b/drivers/platform/x86/eeepc-laptop.c | |||
@@ -150,8 +150,6 @@ struct eeepc_hotk { | |||
150 | /* The actual device the driver binds to */ | 150 | /* The actual device the driver binds to */ |
151 | static struct eeepc_hotk *ehotk; | 151 | static struct eeepc_hotk *ehotk; |
152 | 152 | ||
153 | static void eeepc_rfkill_hotplug(bool real); | ||
154 | |||
155 | /* Platform device/driver */ | 153 | /* Platform device/driver */ |
156 | static int eeepc_hotk_thaw(struct device *device); | 154 | static int eeepc_hotk_thaw(struct device *device); |
157 | static int eeepc_hotk_restore(struct device *device); | 155 | static int eeepc_hotk_restore(struct device *device); |
@@ -345,16 +343,7 @@ static bool eeepc_wlan_rfkill_blocked(void) | |||
345 | static int eeepc_rfkill_set(void *data, bool blocked) | 343 | static int eeepc_rfkill_set(void *data, bool blocked) |
346 | { | 344 | { |
347 | unsigned long asl = (unsigned long)data; | 345 | unsigned long asl = (unsigned long)data; |
348 | int ret; | 346 | return set_acpi(asl, !blocked); |
349 | |||
350 | if (asl != CM_ASL_WLAN) | ||
351 | return set_acpi(asl, !blocked); | ||
352 | |||
353 | /* hack to avoid panic with rt2860sta */ | ||
354 | if (blocked) | ||
355 | eeepc_rfkill_hotplug(false); | ||
356 | ret = set_acpi(asl, !blocked); | ||
357 | return ret; | ||
358 | } | 347 | } |
359 | 348 | ||
360 | static const struct rfkill_ops eeepc_rfkill_ops = { | 349 | static const struct rfkill_ops eeepc_rfkill_ops = { |
@@ -367,7 +356,8 @@ static void __devinit eeepc_enable_camera(void) | |||
367 | * If the following call to set_acpi() fails, it's because there's no | 356 | * If the following call to set_acpi() fails, it's because there's no |
368 | * camera so we can ignore the error. | 357 | * camera so we can ignore the error. |
369 | */ | 358 | */ |
370 | set_acpi(CM_ASL_CAMERA, 1); | 359 | if (get_acpi(CM_ASL_CAMERA) == 0) |
360 | set_acpi(CM_ASL_CAMERA, 1); | ||
371 | } | 361 | } |
372 | 362 | ||
373 | /* | 363 | /* |
@@ -654,13 +644,13 @@ static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot, | |||
654 | return 0; | 644 | return 0; |
655 | } | 645 | } |
656 | 646 | ||
657 | static void eeepc_rfkill_hotplug(bool real) | 647 | static void eeepc_rfkill_hotplug(void) |
658 | { | 648 | { |
659 | struct pci_dev *dev; | 649 | struct pci_dev *dev; |
660 | struct pci_bus *bus; | 650 | struct pci_bus *bus; |
661 | bool blocked = real ? eeepc_wlan_rfkill_blocked() : true; | 651 | bool blocked = eeepc_wlan_rfkill_blocked(); |
662 | 652 | ||
663 | if (real && ehotk->wlan_rfkill) | 653 | if (ehotk->wlan_rfkill) |
664 | rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); | 654 | rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); |
665 | 655 | ||
666 | mutex_lock(&ehotk->hotplug_lock); | 656 | mutex_lock(&ehotk->hotplug_lock); |
@@ -703,7 +693,7 @@ static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data) | |||
703 | if (event != ACPI_NOTIFY_BUS_CHECK) | 693 | if (event != ACPI_NOTIFY_BUS_CHECK) |
704 | return; | 694 | return; |
705 | 695 | ||
706 | eeepc_rfkill_hotplug(true); | 696 | eeepc_rfkill_hotplug(); |
707 | } | 697 | } |
708 | 698 | ||
709 | static void eeepc_hotk_notify(struct acpi_device *device, u32 event) | 699 | static void eeepc_hotk_notify(struct acpi_device *device, u32 event) |
@@ -861,7 +851,7 @@ static int eeepc_hotk_restore(struct device *device) | |||
861 | { | 851 | { |
862 | /* Refresh both wlan rfkill state and pci hotplug */ | 852 | /* Refresh both wlan rfkill state and pci hotplug */ |
863 | if (ehotk->wlan_rfkill) | 853 | if (ehotk->wlan_rfkill) |
864 | eeepc_rfkill_hotplug(true); | 854 | eeepc_rfkill_hotplug(); |
865 | 855 | ||
866 | if (ehotk->bluetooth_rfkill) | 856 | if (ehotk->bluetooth_rfkill) |
867 | rfkill_set_sw_state(ehotk->bluetooth_rfkill, | 857 | rfkill_set_sw_state(ehotk->bluetooth_rfkill, |
@@ -1004,7 +994,7 @@ static void eeepc_rfkill_exit(void) | |||
1004 | * Refresh pci hotplug in case the rfkill state was changed after | 994 | * Refresh pci hotplug in case the rfkill state was changed after |
1005 | * eeepc_unregister_rfkill_notifier() | 995 | * eeepc_unregister_rfkill_notifier() |
1006 | */ | 996 | */ |
1007 | eeepc_rfkill_hotplug(true); | 997 | eeepc_rfkill_hotplug(); |
1008 | if (ehotk->hotplug_slot) | 998 | if (ehotk->hotplug_slot) |
1009 | pci_hp_deregister(ehotk->hotplug_slot); | 999 | pci_hp_deregister(ehotk->hotplug_slot); |
1010 | 1000 | ||
@@ -1120,7 +1110,7 @@ static int eeepc_rfkill_init(struct device *dev) | |||
1120 | * Refresh pci hotplug in case the rfkill state was changed during | 1110 | * Refresh pci hotplug in case the rfkill state was changed during |
1121 | * setup. | 1111 | * setup. |
1122 | */ | 1112 | */ |
1123 | eeepc_rfkill_hotplug(true); | 1113 | eeepc_rfkill_hotplug(); |
1124 | 1114 | ||
1125 | exit: | 1115 | exit: |
1126 | if (result && result != -ENODEV) | 1116 | if (result && result != -ENODEV) |
diff --git a/drivers/pps/kapi.c b/drivers/pps/kapi.c index 35a0b192d768..2d414e23d390 100644 --- a/drivers/pps/kapi.c +++ b/drivers/pps/kapi.c | |||
@@ -271,6 +271,7 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
271 | { | 271 | { |
272 | struct pps_device *pps; | 272 | struct pps_device *pps; |
273 | unsigned long flags; | 273 | unsigned long flags; |
274 | int captured = 0; | ||
274 | 275 | ||
275 | if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) { | 276 | if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) { |
276 | printk(KERN_ERR "pps: unknown event (%x) for source %d\n", | 277 | printk(KERN_ERR "pps: unknown event (%x) for source %d\n", |
@@ -293,7 +294,8 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
293 | 294 | ||
294 | /* Check the event */ | 295 | /* Check the event */ |
295 | pps->current_mode = pps->params.mode; | 296 | pps->current_mode = pps->params.mode; |
296 | if (event & PPS_CAPTUREASSERT) { | 297 | if ((event & PPS_CAPTUREASSERT) & |
298 | (pps->params.mode & PPS_CAPTUREASSERT)) { | ||
297 | /* We have to add an offset? */ | 299 | /* We have to add an offset? */ |
298 | if (pps->params.mode & PPS_OFFSETASSERT) | 300 | if (pps->params.mode & PPS_OFFSETASSERT) |
299 | pps_add_offset(ts, &pps->params.assert_off_tu); | 301 | pps_add_offset(ts, &pps->params.assert_off_tu); |
@@ -303,8 +305,11 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
303 | pps->assert_sequence++; | 305 | pps->assert_sequence++; |
304 | pr_debug("capture assert seq #%u for source %d\n", | 306 | pr_debug("capture assert seq #%u for source %d\n", |
305 | pps->assert_sequence, source); | 307 | pps->assert_sequence, source); |
308 | |||
309 | captured = ~0; | ||
306 | } | 310 | } |
307 | if (event & PPS_CAPTURECLEAR) { | 311 | if ((event & PPS_CAPTURECLEAR) & |
312 | (pps->params.mode & PPS_CAPTURECLEAR)) { | ||
308 | /* We have to add an offset? */ | 313 | /* We have to add an offset? */ |
309 | if (pps->params.mode & PPS_OFFSETCLEAR) | 314 | if (pps->params.mode & PPS_OFFSETCLEAR) |
310 | pps_add_offset(ts, &pps->params.clear_off_tu); | 315 | pps_add_offset(ts, &pps->params.clear_off_tu); |
@@ -314,12 +319,17 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
314 | pps->clear_sequence++; | 319 | pps->clear_sequence++; |
315 | pr_debug("capture clear seq #%u for source %d\n", | 320 | pr_debug("capture clear seq #%u for source %d\n", |
316 | pps->clear_sequence, source); | 321 | pps->clear_sequence, source); |
322 | |||
323 | captured = ~0; | ||
317 | } | 324 | } |
318 | 325 | ||
319 | pps->go = ~0; | 326 | /* Wake up iif captured somthing */ |
320 | wake_up_interruptible(&pps->queue); | 327 | if (captured) { |
328 | pps->go = ~0; | ||
329 | wake_up_interruptible(&pps->queue); | ||
321 | 330 | ||
322 | kill_fasync(&pps->async_queue, SIGIO, POLL_IN); | 331 | kill_fasync(&pps->async_queue, SIGIO, POLL_IN); |
332 | } | ||
323 | 333 | ||
324 | spin_unlock_irqrestore(&pps->lock, flags); | 334 | spin_unlock_irqrestore(&pps->lock, flags); |
325 | 335 | ||
diff --git a/drivers/pps/pps.c b/drivers/pps/pps.c index fea17e7805e9..ca5183bdad85 100644 --- a/drivers/pps/pps.c +++ b/drivers/pps/pps.c | |||
@@ -71,9 +71,14 @@ static long pps_cdev_ioctl(struct file *file, | |||
71 | case PPS_GETPARAMS: | 71 | case PPS_GETPARAMS: |
72 | pr_debug("PPS_GETPARAMS: source %d\n", pps->id); | 72 | pr_debug("PPS_GETPARAMS: source %d\n", pps->id); |
73 | 73 | ||
74 | /* Return current parameters */ | 74 | spin_lock_irq(&pps->lock); |
75 | err = copy_to_user(uarg, &pps->params, | 75 | |
76 | sizeof(struct pps_kparams)); | 76 | /* Get the current parameters */ |
77 | params = pps->params; | ||
78 | |||
79 | spin_unlock_irq(&pps->lock); | ||
80 | |||
81 | err = copy_to_user(uarg, ¶ms, sizeof(struct pps_kparams)); | ||
77 | if (err) | 82 | if (err) |
78 | return -EFAULT; | 83 | return -EFAULT; |
79 | 84 | ||
diff --git a/drivers/rtc/rtc-pcf50633.c b/drivers/rtc/rtc-pcf50633.c index f4dd87e29075..33a10c47260e 100644 --- a/drivers/rtc/rtc-pcf50633.c +++ b/drivers/rtc/rtc-pcf50633.c | |||
@@ -70,7 +70,7 @@ static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf) | |||
70 | rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); | 70 | rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); |
71 | rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); | 71 | rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); |
72 | rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); | 72 | rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); |
73 | rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]); | 73 | rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]) - 1; |
74 | rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100; | 74 | rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100; |
75 | } | 75 | } |
76 | 76 | ||
@@ -81,7 +81,7 @@ static void rtc2pcf_time(struct pcf50633_time *pcf, struct rtc_time *rtc) | |||
81 | pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour); | 81 | pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour); |
82 | pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday); | 82 | pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday); |
83 | pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday); | 83 | pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday); |
84 | pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon); | 84 | pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon + 1); |
85 | pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100); | 85 | pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100); |
86 | } | 86 | } |
87 | 87 | ||
@@ -245,8 +245,9 @@ static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
245 | ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA, | 245 | ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA, |
246 | PCF50633_TI_EXTENT, &pcf_tm.time[0]); | 246 | PCF50633_TI_EXTENT, &pcf_tm.time[0]); |
247 | 247 | ||
248 | if (!alarm_masked) | 248 | if (!alarm_masked || alrm->enabled) |
249 | pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM); | 249 | pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM); |
250 | rtc->alarm_enabled = alrm->enabled; | ||
250 | 251 | ||
251 | return ret; | 252 | return ret; |
252 | } | 253 | } |
diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c index ad164056feb6..423cd5a30b10 100644 --- a/drivers/rtc/rtc-v3020.c +++ b/drivers/rtc/rtc-v3020.c | |||
@@ -96,7 +96,7 @@ static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit) | |||
96 | 96 | ||
97 | static unsigned char v3020_mmio_read_bit(struct v3020 *chip) | 97 | static unsigned char v3020_mmio_read_bit(struct v3020 *chip) |
98 | { | 98 | { |
99 | return readl(chip->ioaddress) & (1 << chip->leftshift); | 99 | return !!(readl(chip->ioaddress) & (1 << chip->leftshift)); |
100 | } | 100 | } |
101 | 101 | ||
102 | static struct v3020_chip_ops v3020_mmio_ops = { | 102 | static struct v3020_chip_ops v3020_mmio_ops = { |
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c index 2c839d0d21bd..fadddac1e5a4 100644 --- a/drivers/rtc/rtc-vr41xx.c +++ b/drivers/rtc/rtc-vr41xx.c | |||
@@ -209,19 +209,18 @@ static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) | |||
209 | 209 | ||
210 | static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq) | 210 | static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq) |
211 | { | 211 | { |
212 | unsigned long count; | 212 | u64 count; |
213 | 213 | ||
214 | if (!is_power_of_2(freq)) | 214 | if (!is_power_of_2(freq)) |
215 | return -EINVAL; | 215 | return -EINVAL; |
216 | count = RTC_FREQUENCY; | 216 | count = RTC_FREQUENCY; |
217 | do_div(count, freq); | 217 | do_div(count, freq); |
218 | 218 | ||
219 | periodic_count = count; | ||
220 | |||
221 | spin_lock_irq(&rtc_lock); | 219 | spin_lock_irq(&rtc_lock); |
222 | 220 | ||
223 | rtc1_write(RTCL1LREG, count); | 221 | periodic_count = count; |
224 | rtc1_write(RTCL1HREG, count >> 16); | 222 | rtc1_write(RTCL1LREG, periodic_count); |
223 | rtc1_write(RTCL1HREG, periodic_count >> 16); | ||
225 | 224 | ||
226 | spin_unlock_irq(&rtc_lock); | 225 | spin_unlock_irq(&rtc_lock); |
227 | 226 | ||
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index b1ae774016f1..737b4c960971 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c | |||
@@ -1089,7 +1089,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags) | |||
1089 | if (!up->port.iobase && !up->port.mapbase && !up->port.membase) | 1089 | if (!up->port.iobase && !up->port.mapbase && !up->port.membase) |
1090 | return; | 1090 | return; |
1091 | 1091 | ||
1092 | DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ", | 1092 | DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ", |
1093 | serial_index(&up->port), up->port.iobase, up->port.membase); | 1093 | serial_index(&up->port), up->port.iobase, up->port.membase); |
1094 | 1094 | ||
1095 | /* | 1095 | /* |
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c index 42e8550cd2b6..b28af13c45a1 100644 --- a/drivers/serial/8250_pci.c +++ b/drivers/serial/8250_pci.c | |||
@@ -2383,7 +2383,7 @@ pciserial_init_ports(struct pci_dev *dev, const struct pciserial_board *board) | |||
2383 | break; | 2383 | break; |
2384 | 2384 | ||
2385 | #ifdef SERIAL_DEBUG_PCI | 2385 | #ifdef SERIAL_DEBUG_PCI |
2386 | printk(KERN_DEBUG "Setup PCI port: port %x, irq %d, type %d\n", | 2386 | printk(KERN_DEBUG "Setup PCI port: port %lx, irq %d, type %d\n", |
2387 | serial_port.iobase, serial_port.irq, serial_port.iotype); | 2387 | serial_port.iobase, serial_port.irq, serial_port.iotype); |
2388 | #endif | 2388 | #endif |
2389 | 2389 | ||
@@ -3139,6 +3139,12 @@ static struct pci_device_id serial_pci_tbl[] = { | |||
3139 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, | 3139 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, |
3140 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 3140 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
3141 | pbn_b0_bt_2_115200 }, | 3141 | pbn_b0_bt_2_115200 }, |
3142 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_A, | ||
3143 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
3144 | pbn_b0_bt_2_115200 }, | ||
3145 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_B, | ||
3146 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
3147 | pbn_b0_bt_2_115200 }, | ||
3142 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, | 3148 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, |
3143 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 3149 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
3144 | pbn_b0_bt_4_460800 }, | 3150 | pbn_b0_bt_4_460800 }, |
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c index 4e83c297ec9e..6f8d8f971212 100644 --- a/drivers/thermal/thermal_sys.c +++ b/drivers/thermal/thermal_sys.c | |||
@@ -180,15 +180,15 @@ trip_point_type_show(struct device *dev, struct device_attribute *attr, | |||
180 | 180 | ||
181 | switch (type) { | 181 | switch (type) { |
182 | case THERMAL_TRIP_CRITICAL: | 182 | case THERMAL_TRIP_CRITICAL: |
183 | return sprintf(buf, "critical"); | 183 | return sprintf(buf, "critical\n"); |
184 | case THERMAL_TRIP_HOT: | 184 | case THERMAL_TRIP_HOT: |
185 | return sprintf(buf, "hot"); | 185 | return sprintf(buf, "hot\n"); |
186 | case THERMAL_TRIP_PASSIVE: | 186 | case THERMAL_TRIP_PASSIVE: |
187 | return sprintf(buf, "passive"); | 187 | return sprintf(buf, "passive\n"); |
188 | case THERMAL_TRIP_ACTIVE: | 188 | case THERMAL_TRIP_ACTIVE: |
189 | return sprintf(buf, "active"); | 189 | return sprintf(buf, "active\n"); |
190 | default: | 190 | default: |
191 | return sprintf(buf, "unknown"); | 191 | return sprintf(buf, "unknown\n"); |
192 | } | 192 | } |
193 | } | 193 | } |
194 | 194 | ||
diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c index 02347c57357d..aa53db9f2e88 100644 --- a/drivers/uio/uio_pdrv_genirq.c +++ b/drivers/uio/uio_pdrv_genirq.c | |||
@@ -178,6 +178,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev) | |||
178 | return 0; | 178 | return 0; |
179 | bad1: | 179 | bad1: |
180 | kfree(priv); | 180 | kfree(priv); |
181 | pm_runtime_disable(&pdev->dev); | ||
181 | bad0: | 182 | bad0: |
182 | return ret; | 183 | return ret; |
183 | } | 184 | } |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 9bbb2855ea91..188e1ba3b69f 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -2121,7 +2121,7 @@ config FB_EP93XX | |||
2121 | 2121 | ||
2122 | config FB_PRE_INIT_FB | 2122 | config FB_PRE_INIT_FB |
2123 | bool "Don't reinitialize, use bootloader's GDC/Display configuration" | 2123 | bool "Don't reinitialize, use bootloader's GDC/Display configuration" |
2124 | depends on FB_MB862XX_LIME | 2124 | depends on FB && FB_MB862XX_LIME |
2125 | ---help--- | 2125 | ---help--- |
2126 | Select this option if display contents should be inherited as set by | 2126 | Select this option if display contents should be inherited as set by |
2127 | the bootloader. | 2127 | the bootloader. |
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c index 8cd279be74e5..37624f74e88b 100644 --- a/drivers/video/atafb.c +++ b/drivers/video/atafb.c | |||
@@ -329,12 +329,6 @@ extern unsigned char fontdata_8x16[]; | |||
329 | * | 329 | * |
330 | * * perform fb specific mmap * | 330 | * * perform fb specific mmap * |
331 | * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma); | 331 | * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma); |
332 | * | ||
333 | * * save current hardware state * | ||
334 | * void (*fb_save_state)(struct fb_info *info); | ||
335 | * | ||
336 | * * restore saved state * | ||
337 | * void (*fb_restore_state)(struct fb_info *info); | ||
338 | * } ; | 332 | * } ; |
339 | */ | 333 | */ |
340 | 334 | ||
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 2830ffd72976..d5e801076d33 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c | |||
@@ -484,6 +484,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info) | |||
484 | unsigned long value; | 484 | unsigned long value; |
485 | unsigned long clk_value_khz; | 485 | unsigned long clk_value_khz; |
486 | unsigned long bits_per_line; | 486 | unsigned long bits_per_line; |
487 | unsigned long pix_factor = 2; | ||
487 | 488 | ||
488 | might_sleep(); | 489 | might_sleep(); |
489 | 490 | ||
@@ -516,20 +517,24 @@ static int atmel_lcdfb_set_par(struct fb_info *info) | |||
516 | /* Now, the LCDC core... */ | 517 | /* Now, the LCDC core... */ |
517 | 518 | ||
518 | /* Set pixel clock */ | 519 | /* Set pixel clock */ |
520 | if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es()) | ||
521 | pix_factor = 1; | ||
522 | |||
519 | clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; | 523 | clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; |
520 | 524 | ||
521 | value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); | 525 | value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); |
522 | 526 | ||
523 | if (value < 2) { | 527 | if (value < pix_factor) { |
524 | dev_notice(info->device, "Bypassing pixel clock divider\n"); | 528 | dev_notice(info->device, "Bypassing pixel clock divider\n"); |
525 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); | 529 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); |
526 | } else { | 530 | } else { |
527 | value = (value / 2) - 1; | 531 | value = (value / pix_factor) - 1; |
528 | dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", | 532 | dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", |
529 | value); | 533 | value); |
530 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, | 534 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, |
531 | value << ATMEL_LCDC_CLKVAL_OFFSET); | 535 | value << ATMEL_LCDC_CLKVAL_OFFSET); |
532 | info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); | 536 | info->var.pixclock = |
537 | KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1))); | ||
533 | dev_dbg(info->device, " updated pixclk: %lu KHz\n", | 538 | dev_dbg(info->device, " updated pixclk: %lu KHz\n", |
534 | PICOS2KHZ(info->var.pixclock)); | 539 | PICOS2KHZ(info->var.pixclock)); |
535 | } | 540 | } |
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index 5a686cea23f4..3681c6a88212 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c | |||
@@ -2311,14 +2311,11 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch) | |||
2311 | ops->graphics = 1; | 2311 | ops->graphics = 1; |
2312 | 2312 | ||
2313 | if (!blank) { | 2313 | if (!blank) { |
2314 | if (info->fbops->fb_save_state) | ||
2315 | info->fbops->fb_save_state(info); | ||
2316 | var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE; | 2314 | var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE; |
2317 | fb_set_var(info, &var); | 2315 | fb_set_var(info, &var); |
2318 | ops->graphics = 0; | 2316 | ops->graphics = 0; |
2319 | ops->var = info->var; | 2317 | ops->var = info->var; |
2320 | } else if (info->fbops->fb_restore_state) | 2318 | } |
2321 | info->fbops->fb_restore_state(info); | ||
2322 | } | 2319 | } |
2323 | 2320 | ||
2324 | if (!fbcon_is_inactive(vc, info)) { | 2321 | if (!fbcon_is_inactive(vc, info)) { |
diff --git a/drivers/video/msm/mddi.c b/drivers/video/msm/mddi.c index 5c5a1ad1d397..474421fe79a6 100644 --- a/drivers/video/msm/mddi.c +++ b/drivers/video/msm/mddi.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/spinlock.h> | 24 | #include <linux/spinlock.h> |
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <linux/sched.h> | ||
27 | #include <mach/msm_iomap.h> | 28 | #include <mach/msm_iomap.h> |
28 | #include <mach/irqs.h> | 29 | #include <mach/irqs.h> |
29 | #include <mach/board.h> | 30 | #include <mach/board.h> |
diff --git a/drivers/video/msm/mddi_client_nt35399.c b/drivers/video/msm/mddi_client_nt35399.c index 9c78050ac799..c9e9349451cb 100644 --- a/drivers/video/msm/mddi_client_nt35399.c +++ b/drivers/video/msm/mddi_client_nt35399.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/sched.h> | ||
22 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
23 | #include <mach/msm_fb.h> | 24 | #include <mach/msm_fb.h> |
24 | 25 | ||
diff --git a/drivers/video/msm/mddi_client_toshiba.c b/drivers/video/msm/mddi_client_toshiba.c index 80d0f5fdf0b1..71048e78f7f0 100644 --- a/drivers/video/msm/mddi_client_toshiba.c +++ b/drivers/video/msm/mddi_client_toshiba.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
23 | #include <linux/sched.h> | ||
23 | #include <mach/msm_fb.h> | 24 | #include <mach/msm_fb.h> |
24 | 25 | ||
25 | 26 | ||
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c index 99636a2b20f2..6c519e2fa2b7 100644 --- a/drivers/video/msm/mdp.c +++ b/drivers/video/msm/mdp.c | |||
@@ -22,9 +22,6 @@ | |||
22 | #include <linux/wait.h> | 22 | #include <linux/wait.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/file.h> | 24 | #include <linux/file.h> |
25 | #ifdef CONFIG_ANDROID_PMEM | ||
26 | #include <linux/android_pmem.h> | ||
27 | #endif | ||
28 | #include <linux/major.h> | 25 | #include <linux/major.h> |
29 | 26 | ||
30 | #include <mach/msm_iomap.h> | 27 | #include <mach/msm_iomap.h> |
@@ -262,11 +259,6 @@ int get_img(struct mdp_img *img, struct fb_info *info, | |||
262 | struct file *file; | 259 | struct file *file; |
263 | unsigned long vstart; | 260 | unsigned long vstart; |
264 | 261 | ||
265 | #ifdef CONFIG_ANDROID_PMEM | ||
266 | if (!get_pmem_file(img->memory_id, start, &vstart, len, filep)) | ||
267 | return 0; | ||
268 | #endif | ||
269 | |||
270 | file = fget_light(img->memory_id, &put_needed); | 262 | file = fget_light(img->memory_id, &put_needed); |
271 | if (file == NULL) | 263 | if (file == NULL) |
272 | return -1; | 264 | return -1; |
@@ -283,12 +275,6 @@ int get_img(struct mdp_img *img, struct fb_info *info, | |||
283 | 275 | ||
284 | void put_img(struct file *src_file, struct file *dst_file) | 276 | void put_img(struct file *src_file, struct file *dst_file) |
285 | { | 277 | { |
286 | #ifdef CONFIG_ANDROID_PMEM | ||
287 | if (src_file) | ||
288 | put_pmem_file(src_file); | ||
289 | if (dst_file) | ||
290 | put_pmem_file(dst_file); | ||
291 | #endif | ||
292 | } | 278 | } |
293 | 279 | ||
294 | int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, | 280 | int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, |
@@ -320,9 +306,6 @@ int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, | |||
320 | if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) { | 306 | if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) { |
321 | printk(KERN_ERR "mpd_ppp: could not retrieve dst image from " | 307 | printk(KERN_ERR "mpd_ppp: could not retrieve dst image from " |
322 | "memory\n"); | 308 | "memory\n"); |
323 | #ifdef CONFIG_ANDROID_PMEM | ||
324 | put_pmem_file(src_file); | ||
325 | #endif | ||
326 | return -EINVAL; | 309 | return -EINVAL; |
327 | } | 310 | } |
328 | mutex_lock(&mdp_mutex); | 311 | mutex_lock(&mdp_mutex); |
@@ -499,7 +482,6 @@ int mdp_probe(struct platform_device *pdev) | |||
499 | /* register mdp device */ | 482 | /* register mdp device */ |
500 | mdp->mdp_dev.dev.parent = &pdev->dev; | 483 | mdp->mdp_dev.dev.parent = &pdev->dev; |
501 | mdp->mdp_dev.dev.class = mdp_class; | 484 | mdp->mdp_dev.dev.class = mdp_class; |
502 | snprintf(mdp->mdp_dev.dev.bus_id, BUS_ID_SIZE, "mdp%d", pdev->id); | ||
503 | 485 | ||
504 | /* if you can remove the platform device you'd have to implement | 486 | /* if you can remove the platform device you'd have to implement |
505 | * this: | 487 | * this: |
diff --git a/drivers/video/msm/mdp_ppp.c b/drivers/video/msm/mdp_ppp.c index ba2c4673b648..4ff001f4cbbd 100644 --- a/drivers/video/msm/mdp_ppp.c +++ b/drivers/video/msm/mdp_ppp.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/file.h> | 16 | #include <linux/file.h> |
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/msm_mdp.h> | 18 | #include <linux/msm_mdp.h> |
19 | #include <linux/android_pmem.h> | ||
20 | #include <mach/msm_fb.h> | 19 | #include <mach/msm_fb.h> |
21 | 20 | ||
22 | #include "mdp_hw.h" | 21 | #include "mdp_hw.h" |
@@ -579,25 +578,6 @@ static int valid_src_dst(unsigned long src_start, unsigned long src_len, | |||
579 | static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs, | 578 | static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs, |
580 | struct file *src_file, struct file *dst_file) | 579 | struct file *src_file, struct file *dst_file) |
581 | { | 580 | { |
582 | #ifdef CONFIG_ANDROID_PMEM | ||
583 | uint32_t src0_len, src1_len, dst0_len, dst1_len; | ||
584 | |||
585 | /* flush src images to memory before dma to mdp */ | ||
586 | get_len(&req->src, &req->src_rect, regs->src_bpp, &src0_len, | ||
587 | &src1_len); | ||
588 | flush_pmem_file(src_file, req->src.offset, src0_len); | ||
589 | if (IS_PSEUDOPLNR(req->src.format)) | ||
590 | flush_pmem_file(src_file, req->src.offset + src0_len, | ||
591 | src1_len); | ||
592 | |||
593 | /* flush dst images */ | ||
594 | get_len(&req->dst, &req->dst_rect, regs->dst_bpp, &dst0_len, | ||
595 | &dst1_len); | ||
596 | flush_pmem_file(dst_file, req->dst.offset, dst0_len); | ||
597 | if (IS_PSEUDOPLNR(req->dst.format)) | ||
598 | flush_pmem_file(dst_file, req->dst.offset + dst0_len, | ||
599 | dst1_len); | ||
600 | #endif | ||
601 | } | 581 | } |
602 | 582 | ||
603 | static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect, | 583 | static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect, |
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c index 37b135d5d12e..842d157e1025 100644 --- a/drivers/video/savage/savagefb_driver.c +++ b/drivers/video/savage/savagefb_driver.c | |||
@@ -1565,7 +1565,7 @@ static int savagefb_blank(int blank, struct fb_info *info) | |||
1565 | vga_out8(0x3c5, sr8, par); | 1565 | vga_out8(0x3c5, sr8, par); |
1566 | vga_out8(0x3c4, 0x0d, par); | 1566 | vga_out8(0x3c4, 0x0d, par); |
1567 | srd = vga_in8(0x3c5, par); | 1567 | srd = vga_in8(0x3c5, par); |
1568 | srd &= 0x03; | 1568 | srd &= 0x50; |
1569 | 1569 | ||
1570 | switch (blank) { | 1570 | switch (blank) { |
1571 | case FB_BLANK_UNBLANK: | 1571 | case FB_BLANK_UNBLANK: |
@@ -1606,22 +1606,6 @@ static int savagefb_blank(int blank, struct fb_info *info) | |||
1606 | return (blank == FB_BLANK_NORMAL) ? 1 : 0; | 1606 | return (blank == FB_BLANK_NORMAL) ? 1 : 0; |
1607 | } | 1607 | } |
1608 | 1608 | ||
1609 | static void savagefb_save_state(struct fb_info *info) | ||
1610 | { | ||
1611 | struct savagefb_par *par = info->par; | ||
1612 | |||
1613 | savage_get_default_par(par, &par->save); | ||
1614 | } | ||
1615 | |||
1616 | static void savagefb_restore_state(struct fb_info *info) | ||
1617 | { | ||
1618 | struct savagefb_par *par = info->par; | ||
1619 | |||
1620 | savagefb_blank(FB_BLANK_POWERDOWN, info); | ||
1621 | savage_set_default_par(par, &par->save); | ||
1622 | savagefb_blank(FB_BLANK_UNBLANK, info); | ||
1623 | } | ||
1624 | |||
1625 | static int savagefb_open(struct fb_info *info, int user) | 1609 | static int savagefb_open(struct fb_info *info, int user) |
1626 | { | 1610 | { |
1627 | struct savagefb_par *par = info->par; | 1611 | struct savagefb_par *par = info->par; |
@@ -1667,8 +1651,6 @@ static struct fb_ops savagefb_ops = { | |||
1667 | .fb_setcolreg = savagefb_setcolreg, | 1651 | .fb_setcolreg = savagefb_setcolreg, |
1668 | .fb_pan_display = savagefb_pan_display, | 1652 | .fb_pan_display = savagefb_pan_display, |
1669 | .fb_blank = savagefb_blank, | 1653 | .fb_blank = savagefb_blank, |
1670 | .fb_save_state = savagefb_save_state, | ||
1671 | .fb_restore_state = savagefb_restore_state, | ||
1672 | #if defined(CONFIG_FB_SAVAGE_ACCEL) | 1654 | #if defined(CONFIG_FB_SAVAGE_ACCEL) |
1673 | .fb_fillrect = savagefb_fillrect, | 1655 | .fb_fillrect = savagefb_fillrect, |
1674 | .fb_copyarea = savagefb_copyarea, | 1656 | .fb_copyarea = savagefb_copyarea, |
diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c index e35232a18571..54fbb2995a5f 100644 --- a/drivers/video/uvesafb.c +++ b/drivers/video/uvesafb.c | |||
@@ -1411,23 +1411,6 @@ static int uvesafb_check_var(struct fb_var_screeninfo *var, | |||
1411 | return 0; | 1411 | return 0; |
1412 | } | 1412 | } |
1413 | 1413 | ||
1414 | static void uvesafb_save_state(struct fb_info *info) | ||
1415 | { | ||
1416 | struct uvesafb_par *par = info->par; | ||
1417 | |||
1418 | if (par->vbe_state_saved) | ||
1419 | kfree(par->vbe_state_saved); | ||
1420 | |||
1421 | par->vbe_state_saved = uvesafb_vbe_state_save(par); | ||
1422 | } | ||
1423 | |||
1424 | static void uvesafb_restore_state(struct fb_info *info) | ||
1425 | { | ||
1426 | struct uvesafb_par *par = info->par; | ||
1427 | |||
1428 | uvesafb_vbe_state_restore(par, par->vbe_state_saved); | ||
1429 | } | ||
1430 | |||
1431 | static struct fb_ops uvesafb_ops = { | 1414 | static struct fb_ops uvesafb_ops = { |
1432 | .owner = THIS_MODULE, | 1415 | .owner = THIS_MODULE, |
1433 | .fb_open = uvesafb_open, | 1416 | .fb_open = uvesafb_open, |
@@ -1441,8 +1424,6 @@ static struct fb_ops uvesafb_ops = { | |||
1441 | .fb_imageblit = cfb_imageblit, | 1424 | .fb_imageblit = cfb_imageblit, |
1442 | .fb_check_var = uvesafb_check_var, | 1425 | .fb_check_var = uvesafb_check_var, |
1443 | .fb_set_par = uvesafb_set_par, | 1426 | .fb_set_par = uvesafb_set_par, |
1444 | .fb_save_state = uvesafb_save_state, | ||
1445 | .fb_restore_state = uvesafb_restore_state, | ||
1446 | }; | 1427 | }; |
1447 | 1428 | ||
1448 | static void __devinit uvesafb_init_info(struct fb_info *info, | 1429 | static void __devinit uvesafb_init_info(struct fb_info *info, |
@@ -1459,15 +1440,6 @@ static void __devinit uvesafb_init_info(struct fb_info *info, | |||
1459 | info->fix.ypanstep = par->ypan ? 1 : 0; | 1440 | info->fix.ypanstep = par->ypan ? 1 : 0; |
1460 | info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0; | 1441 | info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0; |
1461 | 1442 | ||
1462 | /* | ||
1463 | * If we were unable to get the state buffer size, disable | ||
1464 | * functions for saving and restoring the hardware state. | ||
1465 | */ | ||
1466 | if (par->vbe_state_size == 0) { | ||
1467 | info->fbops->fb_save_state = NULL; | ||
1468 | info->fbops->fb_restore_state = NULL; | ||
1469 | } | ||
1470 | |||
1471 | /* Disable blanking if the user requested so. */ | 1443 | /* Disable blanking if the user requested so. */ |
1472 | if (!blank) | 1444 | if (!blank) |
1473 | info->fbops->fb_blank = NULL; | 1445 | info->fbops->fb_blank = NULL; |
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c index 852ca1977917..91430a89107c 100644 --- a/drivers/watchdog/sbc_fitpc2_wdt.c +++ b/drivers/watchdog/sbc_fitpc2_wdt.c | |||
@@ -227,7 +227,7 @@ static int __init fitpc2_wdt_init(void) | |||
227 | } | 227 | } |
228 | 228 | ||
229 | err = misc_register(&fitpc2_wdt_miscdev); | 229 | err = misc_register(&fitpc2_wdt_miscdev); |
230 | if (!err) { | 230 | if (err) { |
231 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", | 231 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", |
232 | WATCHDOG_MINOR, err); | 232 | WATCHDOG_MINOR, err); |
233 | goto err_margin; | 233 | goto err_margin; |