diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_cs.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r600_cs.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 17e42195c632..0d820764f340 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
@@ -466,6 +466,23 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
466 | for (i = 0; i < pkt->count; i++) { | 466 | for (i = 0; i < pkt->count; i++) { |
467 | reg = start_reg + (4 * i); | 467 | reg = start_reg + (4 * i); |
468 | switch (reg) { | 468 | switch (reg) { |
469 | case SQ_ESGS_RING_BASE: | ||
470 | case SQ_GSVS_RING_BASE: | ||
471 | case SQ_ESTMP_RING_BASE: | ||
472 | case SQ_GSTMP_RING_BASE: | ||
473 | case SQ_VSTMP_RING_BASE: | ||
474 | case SQ_PSTMP_RING_BASE: | ||
475 | case SQ_FBUF_RING_BASE: | ||
476 | case SQ_REDUC_RING_BASE: | ||
477 | case SX_MEMORY_EXPORT_BASE: | ||
478 | r = r600_cs_packet_next_reloc(p, &reloc); | ||
479 | if (r) { | ||
480 | DRM_ERROR("bad SET_CONFIG_REG " | ||
481 | "0x%04X\n", reg); | ||
482 | return -EINVAL; | ||
483 | } | ||
484 | ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); | ||
485 | break; | ||
469 | case CP_COHER_BASE: | 486 | case CP_COHER_BASE: |
470 | /* use PACKET3_SURFACE_SYNC */ | 487 | /* use PACKET3_SURFACE_SYNC */ |
471 | return -EINVAL; | 488 | return -EINVAL; |
@@ -487,6 +504,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
487 | reg = start_reg + (4 * i); | 504 | reg = start_reg + (4 * i); |
488 | switch (reg) { | 505 | switch (reg) { |
489 | case DB_DEPTH_BASE: | 506 | case DB_DEPTH_BASE: |
507 | case DB_HTILE_DATA_BASE: | ||
490 | case CB_COLOR0_BASE: | 508 | case CB_COLOR0_BASE: |
491 | case CB_COLOR1_BASE: | 509 | case CB_COLOR1_BASE: |
492 | case CB_COLOR2_BASE: | 510 | case CB_COLOR2_BASE: |