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authorLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 17:03:14 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 17:03:14 -0400
commit0fe41b8982001cd14ee2c77cd776735a5024e98b (patch)
tree83e65d595c413d55259ea14fb97748ce5efe5707 /drivers
parenteedf2c5296a8dfaaf9aec1a938c1d3bd73159a30 (diff)
parent9759d22c8348343b0da4e25d6150c41712686c14 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (422 commits) [ARM] 5435/1: fix compile warning in sanity_check_meminfo() [ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx [ARM] pxa: fix the bad assumption that PCMCIA sockets always start with 0 [ARM] pxa: fix Colibri PXA300 and PXA320 LCD backlight pins imxfb: Fix TFT mode i.MX21/27: remove ifdef CONFIG_FB_IMX imxfb: add clock support mxc: add arch_reset() function clkdev: add possibility to get a clock based on the device name i.MX1: remove fb support from mach-imx [ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP defined Gemini: Add support for Teltonika RUT100 Gemini: gpiolib based GPIO support v2 MAINTAINERS: add myself as Gemini architecture maintainer ARM: Add Gemini architecture v3 [ARM] OMAP: Fix compile for omap2_init_common_hw() MAINTAINERS: Add myself as Faraday ARM core variant maintainer ARM: Add support for FA526 v2 [ARM] acorn,ebsa110,footbridge,integrator,sa1100: Convert asm/io.h to linux/io.h [ARM] collie: fix two minor formatting nits ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/pata_icside.c19
-rw-r--r--drivers/char/hw_random/omap-rng.c2
-rw-r--r--drivers/dma/ipu/ipu_idmac.c2
-rw-r--r--drivers/i2c/busses/i2c-acorn.c2
-rw-r--r--drivers/i2c/busses/i2c-omap.c47
-rw-r--r--drivers/i2c/busses/i2c-versatile.c10
-rw-r--r--drivers/input/keyboard/corgikbd.c2
-rw-r--r--drivers/input/keyboard/spitzkbd.c2
-rw-r--r--drivers/input/mouse/rpcmouse.c2
-rw-r--r--drivers/input/serio/rpckbd.c2
-rw-r--r--drivers/input/touchscreen/corgi_ts.c1
-rw-r--r--drivers/media/video/omap24xxcam.c8
-rw-r--r--drivers/media/video/pxa_camera.c1
-rw-r--r--drivers/mmc/host/mmci.c6
-rw-r--r--drivers/mmc/host/mxcmmc.c4
-rw-r--r--drivers/mmc/host/omap.c24
-rw-r--r--drivers/mmc/host/omap_hsmmc.c4
-rw-r--r--drivers/mmc/host/pxamci.c3
-rw-r--r--drivers/mtd/maps/integrator-flash.c2
-rw-r--r--drivers/mtd/maps/sa1100-flash.c2
-rw-r--r--drivers/mtd/nand/cmx270_nand.c3
-rw-r--r--drivers/mtd/nand/mxc_nand.c2
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c1
-rw-r--r--drivers/net/arm/am79c961a.c2
-rw-r--r--drivers/net/arm/ixp4xx_eth.c20
-rw-r--r--drivers/net/irda/pxaficp_ir.c3
-rw-r--r--drivers/net/smc911x.h3
-rw-r--r--drivers/net/smc91x.h3
-rw-r--r--drivers/pcmcia/pxa2xx_base.c89
-rw-r--r--drivers/pcmcia/pxa2xx_cm_x255.c1
-rw-r--r--drivers/pcmcia/pxa2xx_cm_x270.c1
-rw-r--r--drivers/pcmcia/pxa2xx_e740.c2
-rw-r--r--drivers/pcmcia/pxa2xx_lubbock.c1
-rw-r--r--drivers/pcmcia/pxa2xx_mainstone.c3
-rw-r--r--drivers/pcmcia/pxa2xx_palmld.c4
-rw-r--r--drivers/pcmcia/pxa2xx_trizeps4.c3
-rw-r--r--drivers/pcmcia/pxa2xx_viper.c1
-rw-r--r--drivers/pcmcia/sa1100_h3600.c23
-rw-r--r--drivers/pcmcia/sa1111_generic.c2
-rw-r--r--drivers/pcmcia/sa11xx_base.c50
-rw-r--r--drivers/pcmcia/soc_common.c54
-rw-r--r--drivers/pcmcia/soc_common.h7
-rw-r--r--drivers/rtc/rtc-mv.c11
-rw-r--r--drivers/rtc/rtc-sa1100.c3
-rw-r--r--drivers/scsi/arm/cumana_2.c5
-rw-r--r--drivers/scsi/arm/eesox.c3
-rw-r--r--drivers/scsi/arm/powertec.c3
-rw-r--r--drivers/serial/21285.c2
-rw-r--r--drivers/serial/Kconfig2
-rw-r--r--drivers/serial/clps711x.c2
-rw-r--r--drivers/serial/imx.c2
-rw-r--r--drivers/serial/pxa.c30
-rw-r--r--drivers/serial/sa1100.c2
-rw-r--r--drivers/spi/omap2_mcspi.c4
-rw-r--r--drivers/spi/omap_uwire.c9
-rw-r--r--drivers/spi/pxa2xx_spi.c2
-rw-r--r--drivers/usb/host/ohci-ep93xx.c2
-rw-r--r--drivers/video/Kconfig36
-rw-r--r--drivers/video/Makefile3
-rw-r--r--drivers/video/acornfb.c2
-rw-r--r--drivers/video/broadsheetfb.c568
-rw-r--r--drivers/video/cyber2000fb.c4
-rw-r--r--drivers/video/imxfb.c108
-rw-r--r--drivers/video/mx3fb.c2300
-rw-r--r--drivers/video/pxafb.c15
-rw-r--r--drivers/video/s3c2410fb.c4
-rw-r--r--drivers/video/sa1100fb.c23
-rw-r--r--drivers/w1/masters/mxc_w1.c2
-rw-r--r--drivers/w1/masters/omap_hdq.c4
-rw-r--r--drivers/watchdog/omap_wdt.c94
-rw-r--r--drivers/watchdog/sa1100_wdt.c2
71 files changed, 2167 insertions, 1503 deletions
diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c
index e7347db5b6c4..b663b7ffae4b 100644
--- a/drivers/ata/pata_icside.c
+++ b/drivers/ata/pata_icside.c
@@ -45,8 +45,6 @@ static const struct portinfo pata_icside_portinfo_v6_2 = {
45 .stepping = 6, 45 .stepping = 6,
46}; 46};
47 47
48#define PATA_ICSIDE_MAX_SG 128
49
50struct pata_icside_state { 48struct pata_icside_state {
51 void __iomem *irq_port; 49 void __iomem *irq_port;
52 void __iomem *ioc_base; 50 void __iomem *ioc_base;
@@ -57,7 +55,6 @@ struct pata_icside_state {
57 u8 disabled; 55 u8 disabled;
58 unsigned int speed[ATA_MAX_DEVICES]; 56 unsigned int speed[ATA_MAX_DEVICES];
59 } port[2]; 57 } port[2];
60 struct scatterlist sg[PATA_ICSIDE_MAX_SG];
61}; 58};
62 59
63struct pata_icside_info { 60struct pata_icside_info {
@@ -222,9 +219,7 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
222{ 219{
223 struct ata_port *ap = qc->ap; 220 struct ata_port *ap = qc->ap;
224 struct pata_icside_state *state = ap->host->private_data; 221 struct pata_icside_state *state = ap->host->private_data;
225 struct scatterlist *sg, *rsg = state->sg;
226 unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE; 222 unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
227 unsigned int si;
228 223
229 /* 224 /*
230 * We are simplex; BUG if we try to fiddle with DMA 225 * We are simplex; BUG if we try to fiddle with DMA
@@ -233,20 +228,12 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
233 BUG_ON(dma_channel_active(state->dma)); 228 BUG_ON(dma_channel_active(state->dma));
234 229
235 /* 230 /*
236 * Copy ATAs scattered sg list into a contiguous array of sg
237 */
238 for_each_sg(qc->sg, sg, qc->n_elem, si) {
239 memcpy(rsg, sg, sizeof(*sg));
240 rsg++;
241 }
242
243 /*
244 * Route the DMA signals to the correct interface 231 * Route the DMA signals to the correct interface
245 */ 232 */
246 writeb(state->port[ap->port_no].port_sel, state->ioc_base); 233 writeb(state->port[ap->port_no].port_sel, state->ioc_base);
247 234
248 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]); 235 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
249 set_dma_sg(state->dma, state->sg, rsg - state->sg); 236 set_dma_sg(state->dma, qc->sg, qc->n_elem);
250 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ); 237 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
251 238
252 /* issue r/w command */ 239 /* issue r/w command */
@@ -306,8 +293,8 @@ static int icside_dma_init(struct pata_icside_info *info)
306 293
307static struct scsi_host_template pata_icside_sht = { 294static struct scsi_host_template pata_icside_sht = {
308 ATA_BASE_SHT(DRV_NAME), 295 ATA_BASE_SHT(DRV_NAME),
309 .sg_tablesize = PATA_ICSIDE_MAX_SG, 296 .sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS,
310 .dma_boundary = ~0, /* no dma boundaries */ 297 .dma_boundary = IOMD_DMA_BOUNDARY,
311}; 298};
312 299
313static void pata_icside_postreset(struct ata_link *link, unsigned int *classes) 300static void pata_icside_postreset(struct ata_link *link, unsigned int *classes)
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index ba68a4671cb5..538313f9e7ac 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -102,7 +102,7 @@ static int __init omap_rng_probe(struct platform_device *pdev)
102 return -EBUSY; 102 return -EBUSY;
103 103
104 if (cpu_is_omap24xx()) { 104 if (cpu_is_omap24xx()) {
105 rng_ick = clk_get(&pdev->dev, "rng_ick"); 105 rng_ick = clk_get(&pdev->dev, "ick");
106 if (IS_ERR(rng_ick)) { 106 if (IS_ERR(rng_ick)) {
107 dev_err(&pdev->dev, "Could not get rng_ick\n"); 107 dev_err(&pdev->dev, "Could not get rng_ick\n");
108 ret = PTR_ERR(rng_ick); 108 ret = PTR_ERR(rng_ick);
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index ae50a9d1a4e6..da781d107895 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -1649,7 +1649,7 @@ static int ipu_probe(struct platform_device *pdev)
1649 } 1649 }
1650 1650
1651 /* Get IPU clock */ 1651 /* Get IPU clock */
1652 ipu_data.ipu_clk = clk_get(&pdev->dev, "ipu_clk"); 1652 ipu_data.ipu_clk = clk_get(&pdev->dev, NULL);
1653 if (IS_ERR(ipu_data.ipu_clk)) { 1653 if (IS_ERR(ipu_data.ipu_clk)) {
1654 ret = PTR_ERR(ipu_data.ipu_clk); 1654 ret = PTR_ERR(ipu_data.ipu_clk);
1655 goto err_clk_get; 1655 goto err_clk_get;
diff --git a/drivers/i2c/busses/i2c-acorn.c b/drivers/i2c/busses/i2c-acorn.c
index 9aefb5e5864d..86796488ef4f 100644
--- a/drivers/i2c/busses/i2c-acorn.c
+++ b/drivers/i2c/busses/i2c-acorn.c
@@ -15,9 +15,9 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/i2c-algo-bit.h> 17#include <linux/i2c-algo-bit.h>
18#include <linux/io.h>
18 19
19#include <mach/hardware.h> 20#include <mach/hardware.h>
20#include <asm/io.h>
21#include <asm/hardware/ioc.h> 21#include <asm/hardware/ioc.h>
22#include <asm/system.h> 22#include <asm/system.h>
23 23
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index be8ee2cac8bb..ece0125a1ee5 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -193,22 +193,24 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
193 193
194static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) 194static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
195{ 195{
196 if (cpu_is_omap16xx() || cpu_class_is_omap2()) { 196 int ret;
197 dev->iclk = clk_get(dev->dev, "i2c_ick"); 197
198 if (IS_ERR(dev->iclk)) { 198 dev->iclk = clk_get(dev->dev, "ick");
199 dev->iclk = NULL; 199 if (IS_ERR(dev->iclk)) {
200 return -ENODEV; 200 ret = PTR_ERR(dev->iclk);
201 } 201 dev->iclk = NULL;
202 return ret;
202 } 203 }
203 204
204 dev->fclk = clk_get(dev->dev, "i2c_fck"); 205 dev->fclk = clk_get(dev->dev, "fck");
205 if (IS_ERR(dev->fclk)) { 206 if (IS_ERR(dev->fclk)) {
207 ret = PTR_ERR(dev->fclk);
206 if (dev->iclk != NULL) { 208 if (dev->iclk != NULL) {
207 clk_put(dev->iclk); 209 clk_put(dev->iclk);
208 dev->iclk = NULL; 210 dev->iclk = NULL;
209 } 211 }
210 dev->fclk = NULL; 212 dev->fclk = NULL;
211 return -ENODEV; 213 return ret;
212 } 214 }
213 215
214 return 0; 216 return 0;
@@ -218,18 +220,15 @@ static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
218{ 220{
219 clk_put(dev->fclk); 221 clk_put(dev->fclk);
220 dev->fclk = NULL; 222 dev->fclk = NULL;
221 if (dev->iclk != NULL) { 223 clk_put(dev->iclk);
222 clk_put(dev->iclk); 224 dev->iclk = NULL;
223 dev->iclk = NULL;
224 }
225} 225}
226 226
227static void omap_i2c_unidle(struct omap_i2c_dev *dev) 227static void omap_i2c_unidle(struct omap_i2c_dev *dev)
228{ 228{
229 WARN_ON(!dev->idle); 229 WARN_ON(!dev->idle);
230 230
231 if (dev->iclk != NULL) 231 clk_enable(dev->iclk);
232 clk_enable(dev->iclk);
233 clk_enable(dev->fclk); 232 clk_enable(dev->fclk);
234 dev->idle = 0; 233 dev->idle = 0;
235 if (dev->iestate) 234 if (dev->iestate)
@@ -254,8 +253,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
254 } 253 }
255 dev->idle = 1; 254 dev->idle = 1;
256 clk_disable(dev->fclk); 255 clk_disable(dev->fclk);
257 if (dev->iclk != NULL) 256 clk_disable(dev->iclk);
258 clk_disable(dev->iclk);
259} 257}
260 258
261static int omap_i2c_init(struct omap_i2c_dev *dev) 259static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -312,15 +310,14 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
312 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 310 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
313 311
314 if (cpu_class_is_omap1()) { 312 if (cpu_class_is_omap1()) {
315 struct clk *armxor_ck; 313 /*
316 314 * The I2C functional clock is the armxor_ck, so there's
317 armxor_ck = clk_get(NULL, "armxor_ck"); 315 * no need to get "armxor_ck" separately. Now, if OMAP2420
318 if (IS_ERR(armxor_ck)) 316 * always returns 12MHz for the functional clock, we can
319 dev_warn(dev->dev, "Could not get armxor_ck\n"); 317 * do this bit unconditionally.
320 else { 318 */
321 fclk_rate = clk_get_rate(armxor_ck); 319 fclk_rate = clk_get_rate(dev->fclk);
322 clk_put(armxor_ck); 320
323 }
324 /* TRM for 5912 says the I2C clock must be prescaled to be 321 /* TRM for 5912 says the I2C clock must be prescaled to be
325 * between 7 - 12 MHz. The XOR input clock is typically 322 * between 7 - 12 MHz. The XOR input clock is typically
326 * 12, 13 or 19.2 MHz. So we should have code that produces: 323 * 12, 13 or 19.2 MHz. So we should have code that produces:
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
index 4678babd3ce6..fede619ba227 100644
--- a/drivers/i2c/busses/i2c-versatile.c
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -102,7 +102,13 @@ static int i2c_versatile_probe(struct platform_device *dev)
102 i2c->algo = i2c_versatile_algo; 102 i2c->algo = i2c_versatile_algo;
103 i2c->algo.data = i2c; 103 i2c->algo.data = i2c;
104 104
105 ret = i2c_bit_add_bus(&i2c->adap); 105 if (dev->id >= 0) {
106 /* static bus numbering */
107 i2c->adap.nr = dev->id;
108 ret = i2c_bit_add_numbered_bus(&i2c->adap);
109 } else
110 /* dynamic bus numbering */
111 ret = i2c_bit_add_bus(&i2c->adap);
106 if (ret >= 0) { 112 if (ret >= 0) {
107 platform_set_drvdata(dev, i2c); 113 platform_set_drvdata(dev, i2c);
108 return 0; 114 return 0;
@@ -146,7 +152,7 @@ static void __exit i2c_versatile_exit(void)
146 platform_driver_unregister(&i2c_versatile_driver); 152 platform_driver_unregister(&i2c_versatile_driver);
147} 153}
148 154
149module_init(i2c_versatile_init); 155subsys_initcall(i2c_versatile_init);
150module_exit(i2c_versatile_exit); 156module_exit(i2c_versatile_exit);
151 157
152MODULE_DESCRIPTION("ARM Versatile I2C bus driver"); 158MODULE_DESCRIPTION("ARM Versatile I2C bus driver");
diff --git a/drivers/input/keyboard/corgikbd.c b/drivers/input/keyboard/corgikbd.c
index abb04c82c622..634af6a8e6b3 100644
--- a/drivers/input/keyboard/corgikbd.c
+++ b/drivers/input/keyboard/corgikbd.c
@@ -21,8 +21,6 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22 22
23#include <mach/corgi.h> 23#include <mach/corgi.h>
24#include <mach/hardware.h>
25#include <mach/pxa-regs.h>
26#include <mach/pxa2xx-gpio.h> 24#include <mach/pxa2xx-gpio.h>
27#include <asm/hardware/scoop.h> 25#include <asm/hardware/scoop.h>
28 26
diff --git a/drivers/input/keyboard/spitzkbd.c b/drivers/input/keyboard/spitzkbd.c
index 9d1781a618e9..13967422658c 100644
--- a/drivers/input/keyboard/spitzkbd.c
+++ b/drivers/input/keyboard/spitzkbd.c
@@ -21,8 +21,6 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22 22
23#include <mach/spitz.h> 23#include <mach/spitz.h>
24#include <mach/hardware.h>
25#include <mach/pxa-regs.h>
26#include <mach/pxa2xx-gpio.h> 24#include <mach/pxa2xx-gpio.h>
27 25
28#define KB_ROWS 7 26#define KB_ROWS 7
diff --git a/drivers/input/mouse/rpcmouse.c b/drivers/input/mouse/rpcmouse.c
index 56c079ef5018..272deddc8db6 100644
--- a/drivers/input/mouse/rpcmouse.c
+++ b/drivers/input/mouse/rpcmouse.c
@@ -22,10 +22,10 @@
22#include <linux/interrupt.h> 22#include <linux/interrupt.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/input.h> 24#include <linux/input.h>
25#include <linux/io.h>
25 26
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <asm/irq.h> 28#include <asm/irq.h>
28#include <asm/io.h>
29#include <asm/hardware/iomd.h> 29#include <asm/hardware/iomd.h>
30 30
31MODULE_AUTHOR("Vojtech Pavlik, Russell King"); 31MODULE_AUTHOR("Vojtech Pavlik, Russell King");
diff --git a/drivers/input/serio/rpckbd.c b/drivers/input/serio/rpckbd.c
index 7f36edd34f8b..ed045c99f84b 100644
--- a/drivers/input/serio/rpckbd.c
+++ b/drivers/input/serio/rpckbd.c
@@ -33,10 +33,10 @@
33#include <linux/serio.h> 33#include <linux/serio.h>
34#include <linux/err.h> 34#include <linux/err.h>
35#include <linux/platform_device.h> 35#include <linux/platform_device.h>
36#include <linux/io.h>
36 37
37#include <asm/irq.h> 38#include <asm/irq.h>
38#include <mach/hardware.h> 39#include <mach/hardware.h>
39#include <asm/io.h>
40#include <asm/hardware/iomd.h> 40#include <asm/hardware/iomd.h>
41#include <asm/system.h> 41#include <asm/system.h>
42 42
diff --git a/drivers/input/touchscreen/corgi_ts.c b/drivers/input/touchscreen/corgi_ts.c
index 3fb51b54fe61..94a1919d439d 100644
--- a/drivers/input/touchscreen/corgi_ts.c
+++ b/drivers/input/touchscreen/corgi_ts.c
@@ -21,7 +21,6 @@
21 21
22#include <mach/sharpsl.h> 22#include <mach/sharpsl.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/pxa-regs.h>
25#include <mach/pxa2xx-gpio.h> 24#include <mach/pxa2xx-gpio.h>
26 25
27 26
diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c
index 73eb656acfe3..805faaea6449 100644
--- a/drivers/media/video/omap24xxcam.c
+++ b/drivers/media/video/omap24xxcam.c
@@ -80,17 +80,17 @@ static int omap24xxcam_clock_get(struct omap24xxcam_device *cam)
80{ 80{
81 int rval = 0; 81 int rval = 0;
82 82
83 cam->fck = clk_get(cam->dev, "cam_fck"); 83 cam->fck = clk_get(cam->dev, "fck");
84 if (IS_ERR(cam->fck)) { 84 if (IS_ERR(cam->fck)) {
85 dev_err(cam->dev, "can't get cam_fck"); 85 dev_err(cam->dev, "can't get camera fck");
86 rval = PTR_ERR(cam->fck); 86 rval = PTR_ERR(cam->fck);
87 omap24xxcam_clock_put(cam); 87 omap24xxcam_clock_put(cam);
88 return rval; 88 return rval;
89 } 89 }
90 90
91 cam->ick = clk_get(cam->dev, "cam_ick"); 91 cam->ick = clk_get(cam->dev, "ick");
92 if (IS_ERR(cam->ick)) { 92 if (IS_ERR(cam->ick)) {
93 dev_err(cam->dev, "can't get cam_ick"); 93 dev_err(cam->dev, "can't get camera ick");
94 rval = PTR_ERR(cam->ick); 94 rval = PTR_ERR(cam->ick);
95 omap24xxcam_clock_put(cam); 95 omap24xxcam_clock_put(cam);
96 } 96 }
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index 07c334f25aae..0c4ce58c53d5 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -35,7 +35,6 @@
35#include <linux/videodev2.h> 35#include <linux/videodev2.h>
36 36
37#include <mach/dma.h> 37#include <mach/dma.h>
38#include <mach/pxa-regs.h>
39#include <mach/camera.h> 38#include <mach/camera.h>
40 39
41#define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5) 40#define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 2909bbc8ad00..a663429b3d55 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -490,7 +490,7 @@ static void mmci_check_status(unsigned long data)
490 mod_timer(&host->timer, jiffies + HZ); 490 mod_timer(&host->timer, jiffies + HZ);
491} 491}
492 492
493static int mmci_probe(struct amba_device *dev, void *id) 493static int __devinit mmci_probe(struct amba_device *dev, void *id)
494{ 494{
495 struct mmc_platform_data *plat = dev->dev.platform_data; 495 struct mmc_platform_data *plat = dev->dev.platform_data;
496 struct mmci_host *host; 496 struct mmci_host *host;
@@ -633,7 +633,7 @@ static int mmci_probe(struct amba_device *dev, void *id)
633 return ret; 633 return ret;
634} 634}
635 635
636static int mmci_remove(struct amba_device *dev) 636static int __devexit mmci_remove(struct amba_device *dev)
637{ 637{
638 struct mmc_host *mmc = amba_get_drvdata(dev); 638 struct mmc_host *mmc = amba_get_drvdata(dev);
639 639
@@ -730,7 +730,7 @@ static struct amba_driver mmci_driver = {
730 .name = DRIVER_NAME, 730 .name = DRIVER_NAME,
731 }, 731 },
732 .probe = mmci_probe, 732 .probe = mmci_probe,
733 .remove = mmci_remove, 733 .remove = __devexit_p(mmci_remove),
734 .suspend = mmci_suspend, 734 .suspend = mmci_suspend,
735 .resume = mmci_resume, 735 .resume = mmci_resume,
736 .id_table = mmci_ids, 736 .id_table = mmci_ids,
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index dda0be4e25dc..b4a615c55f28 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -42,7 +42,7 @@
42#define HAS_DMA 42#define HAS_DMA
43#endif 43#endif
44 44
45#define DRIVER_NAME "imx-mmc" 45#define DRIVER_NAME "mxc-mmc"
46 46
47#define MMC_REG_STR_STP_CLK 0x00 47#define MMC_REG_STR_STP_CLK 0x00
48#define MMC_REG_STATUS 0x04 48#define MMC_REG_STATUS 0x04
@@ -707,7 +707,7 @@ static int mxcmci_probe(struct platform_device *pdev)
707 host->res = r; 707 host->res = r;
708 host->irq = irq; 708 host->irq = irq;
709 709
710 host->clk = clk_get(&pdev->dev, "sdhc_clk"); 710 host->clk = clk_get(&pdev->dev, NULL);
711 if (IS_ERR(host->clk)) { 711 if (IS_ERR(host->clk)) {
712 ret = PTR_ERR(host->clk); 712 ret = PTR_ERR(host->clk);
713 goto out_iounmap; 713 goto out_iounmap;
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 67d7b7fef084..5570849188cc 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1460,18 +1460,12 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1460 if (!host->virt_base) 1460 if (!host->virt_base)
1461 goto err_ioremap; 1461 goto err_ioremap;
1462 1462
1463 if (cpu_is_omap24xx()) { 1463 host->iclk = clk_get(&pdev->dev, "ick");
1464 host->iclk = clk_get(&pdev->dev, "mmc_ick"); 1464 if (IS_ERR(host->iclk))
1465 if (IS_ERR(host->iclk)) 1465 goto err_free_mmc_host;
1466 goto err_free_mmc_host; 1466 clk_enable(host->iclk);
1467 clk_enable(host->iclk);
1468 }
1469
1470 if (!cpu_is_omap24xx())
1471 host->fclk = clk_get(&pdev->dev, "mmc_ck");
1472 else
1473 host->fclk = clk_get(&pdev->dev, "mmc_fck");
1474 1467
1468 host->fclk = clk_get(&pdev->dev, "fck");
1475 if (IS_ERR(host->fclk)) { 1469 if (IS_ERR(host->fclk)) {
1476 ret = PTR_ERR(host->fclk); 1470 ret = PTR_ERR(host->fclk);
1477 goto err_free_iclk; 1471 goto err_free_iclk;
@@ -1536,10 +1530,10 @@ static int mmc_omap_remove(struct platform_device *pdev)
1536 if (host->pdata->cleanup) 1530 if (host->pdata->cleanup)
1537 host->pdata->cleanup(&pdev->dev); 1531 host->pdata->cleanup(&pdev->dev);
1538 1532
1539 if (host->iclk && !IS_ERR(host->iclk)) 1533 mmc_omap_fclk_enable(host, 0);
1540 clk_put(host->iclk); 1534 clk_put(host->fclk);
1541 if (host->fclk && !IS_ERR(host->fclk)) 1535 clk_disable(host->iclk);
1542 clk_put(host->fclk); 1536 clk_put(host->iclk);
1543 1537
1544 iounmap(host->virt_base); 1538 iounmap(host->virt_base);
1545 release_mem_region(pdev->resource[0].start, 1539 release_mem_region(pdev->resource[0].start,
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index a631c81dce12..3916a5618e28 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -956,13 +956,13 @@ static int __init omap_mmc_probe(struct platform_device *pdev)
956 956
957 sema_init(&host->sem, 1); 957 sema_init(&host->sem, 1);
958 958
959 host->iclk = clk_get(&pdev->dev, "mmchs_ick"); 959 host->iclk = clk_get(&pdev->dev, "ick");
960 if (IS_ERR(host->iclk)) { 960 if (IS_ERR(host->iclk)) {
961 ret = PTR_ERR(host->iclk); 961 ret = PTR_ERR(host->iclk);
962 host->iclk = NULL; 962 host->iclk = NULL;
963 goto err1; 963 goto err1;
964 } 964 }
965 host->fclk = clk_get(&pdev->dev, "mmchs_fck"); 965 host->fclk = clk_get(&pdev->dev, "fck");
966 if (IS_ERR(host->fclk)) { 966 if (IS_ERR(host->fclk)) {
967 ret = PTR_ERR(host->fclk); 967 ret = PTR_ERR(host->fclk);
968 host->fclk = NULL; 968 host->fclk = NULL;
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 9702ad3774cf..430095725f9f 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -30,9 +30,8 @@
30 30
31#include <asm/sizes.h> 31#include <asm/sizes.h>
32 32
33#include <mach/dma.h>
34#include <mach/hardware.h> 33#include <mach/hardware.h>
35#include <mach/pxa-regs.h> 34#include <mach/dma.h>
36#include <mach/mmc.h> 35#include <mach/mmc.h>
37 36
38#include "pxamci.h" 37#include "pxamci.h"
diff --git a/drivers/mtd/maps/integrator-flash.c b/drivers/mtd/maps/integrator-flash.c
index d2ec262666c7..c9681a339a59 100644
--- a/drivers/mtd/maps/integrator-flash.c
+++ b/drivers/mtd/maps/integrator-flash.c
@@ -31,6 +31,7 @@
31#include <linux/ioport.h> 31#include <linux/ioport.h>
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/init.h> 33#include <linux/init.h>
34#include <linux/io.h>
34 35
35#include <linux/mtd/mtd.h> 36#include <linux/mtd/mtd.h>
36#include <linux/mtd/map.h> 37#include <linux/mtd/map.h>
@@ -38,7 +39,6 @@
38 39
39#include <asm/mach/flash.h> 40#include <asm/mach/flash.h>
40#include <mach/hardware.h> 41#include <mach/hardware.h>
41#include <asm/io.h>
42#include <asm/system.h> 42#include <asm/system.h>
43 43
44#ifdef CONFIG_ARCH_P720T 44#ifdef CONFIG_ARCH_P720T
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c
index 6f6a0f6dafd6..8f57b6f40aa2 100644
--- a/drivers/mtd/maps/sa1100-flash.c
+++ b/drivers/mtd/maps/sa1100-flash.c
@@ -12,6 +12,7 @@
12#include <linux/slab.h> 12#include <linux/slab.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/err.h> 14#include <linux/err.h>
15#include <linux/io.h>
15 16
16#include <linux/mtd/mtd.h> 17#include <linux/mtd/mtd.h>
17#include <linux/mtd/map.h> 18#include <linux/mtd/map.h>
@@ -19,7 +20,6 @@
19#include <linux/mtd/concat.h> 20#include <linux/mtd/concat.h>
20 21
21#include <mach/hardware.h> 22#include <mach/hardware.h>
22#include <asm/io.h>
23#include <asm/sizes.h> 23#include <asm/sizes.h>
24#include <asm/mach/flash.h> 24#include <asm/mach/flash.h>
25 25
diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
index fa129c09bca8..10081e656a6f 100644
--- a/drivers/mtd/nand/cmx270_nand.c
+++ b/drivers/mtd/nand/cmx270_nand.c
@@ -26,8 +26,7 @@
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28 28
29#include <mach/hardware.h> 29#include <mach/pxa2xx-regs.h>
30#include <mach/pxa-regs.h>
31 30
32#define GPIO_NAND_CS (11) 31#define GPIO_NAND_CS (11)
33#define GPIO_NAND_RB (89) 32#define GPIO_NAND_RB (89)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 21fd4f1c4806..bad048aca89a 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -880,7 +880,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
880 this->read_buf = mxc_nand_read_buf; 880 this->read_buf = mxc_nand_read_buf;
881 this->verify_buf = mxc_nand_verify_buf; 881 this->verify_buf = mxc_nand_verify_buf;
882 882
883 host->clk = clk_get(&pdev->dev, "nfc_clk"); 883 host->clk = clk_get(&pdev->dev, "nfc");
884 if (IS_ERR(host->clk)) 884 if (IS_ERR(host->clk))
885 goto eclk; 885 goto eclk;
886 886
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index cc55cbc2b308..61b69cc40009 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -22,7 +22,6 @@
22#include <linux/irq.h> 22#include <linux/irq.h>
23 23
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/pxa-regs.h>
26#include <mach/pxa3xx_nand.h> 25#include <mach/pxa3xx_nand.h>
27 26
28#define CHIP_DELAY_TIMEOUT (2 * HZ/10) 27#define CHIP_DELAY_TIMEOUT (2 * HZ/10)
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c
index c2d012fcc29b..4bc6901b3819 100644
--- a/drivers/net/arm/am79c961a.c
+++ b/drivers/net/arm/am79c961a.c
@@ -27,9 +27,9 @@
27#include <linux/crc32.h> 27#include <linux/crc32.h>
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30#include <linux/io.h>
30 31
31#include <mach/hardware.h> 32#include <mach/hardware.h>
32#include <asm/io.h>
33#include <asm/system.h> 33#include <asm/system.h>
34 34
35#define TX_BUFFERS 15 35#define TX_BUFFERS 15
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 5fe17d5eaa54..448487e22fa3 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -335,11 +335,20 @@ static int ixp4xx_mdio_register(void)
335 if (!(mdio_bus = mdiobus_alloc())) 335 if (!(mdio_bus = mdiobus_alloc()))
336 return -ENOMEM; 336 return -ENOMEM;
337 337
338 /* All MII PHY accesses use NPE-B Ethernet registers */ 338 if (cpu_is_ixp43x()) {
339 spin_lock_init(&mdio_lock); 339 /* IXP43x lacks NPE-B and uses NPE-C for MII PHY access */
340 mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT; 340 if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEC_ETH))
341 __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control); 341 return -ENOSYS;
342 mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
343 } else {
344 /* All MII PHY accesses use NPE-B Ethernet registers */
345 if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
346 return -ENOSYS;
347 mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
348 }
342 349
350 __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control);
351 spin_lock_init(&mdio_lock);
343 mdio_bus->name = "IXP4xx MII Bus"; 352 mdio_bus->name = "IXP4xx MII Bus";
344 mdio_bus->read = &ixp4xx_mdio_read; 353 mdio_bus->read = &ixp4xx_mdio_read;
345 mdio_bus->write = &ixp4xx_mdio_write; 354 mdio_bus->write = &ixp4xx_mdio_write;
@@ -1250,9 +1259,6 @@ static struct platform_driver ixp4xx_eth_driver = {
1250static int __init eth_init_module(void) 1259static int __init eth_init_module(void)
1251{ 1260{
1252 int err; 1261 int err;
1253 if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
1254 return -ENOSYS;
1255
1256 if ((err = ixp4xx_mdio_register())) 1262 if ((err = ixp4xx_mdio_register()))
1257 return err; 1263 return err;
1258 return platform_driver_register(&ixp4xx_eth_driver); 1264 return platform_driver_register(&ixp4xx_eth_driver);
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c
index 31794c2363ec..e775338b525f 100644
--- a/drivers/net/irda/pxaficp_ir.c
+++ b/drivers/net/irda/pxaficp_ir.c
@@ -24,9 +24,8 @@
24 24
25#include <mach/dma.h> 25#include <mach/dma.h>
26#include <mach/irda.h> 26#include <mach/irda.h>
27#include <mach/hardware.h>
28#include <mach/pxa-regs.h>
29#include <mach/regs-uart.h> 27#include <mach/regs-uart.h>
28#include <mach/regs-ost.h>
30 29
31#define FICP __REG(0x40800000) /* Start of FICP area */ 30#define FICP __REG(0x40800000) /* Start of FICP area */
32#define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */ 31#define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index a45952e72018..8140f7cb4d85 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -236,8 +236,7 @@ static inline void SMC_outsl(struct smc911x_local *lp, int reg,
236 * Use a DMA for RX and TX packets. 236 * Use a DMA for RX and TX packets.
237 */ 237 */
238#include <linux/dma-mapping.h> 238#include <linux/dma-mapping.h>
239#include <asm/dma.h> 239#include <mach/dma.h>
240#include <mach/pxa-regs.h>
241 240
242static dma_addr_t rx_dmabuf, tx_dmabuf; 241static dma_addr_t rx_dmabuf, tx_dmabuf;
243static int rx_dmalen, tx_dmalen; 242static int rx_dmalen, tx_dmalen;
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index ed9ae43523a1..6c44f86ae3fd 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -44,6 +44,7 @@
44 defined(CONFIG_MACH_MAINSTONE) ||\ 44 defined(CONFIG_MACH_MAINSTONE) ||\
45 defined(CONFIG_MACH_ZYLONITE) ||\ 45 defined(CONFIG_MACH_ZYLONITE) ||\
46 defined(CONFIG_MACH_LITTLETON) ||\ 46 defined(CONFIG_MACH_LITTLETON) ||\
47 defined(CONFIG_MACH_ZYLONITE2) ||\
47 defined(CONFIG_ARCH_VIPER) 48 defined(CONFIG_ARCH_VIPER)
48 49
49#include <asm/mach-types.h> 50#include <asm/mach-types.h>
@@ -494,8 +495,6 @@ struct smc_local {
494 */ 495 */
495#include <linux/dma-mapping.h> 496#include <linux/dma-mapping.h>
496#include <mach/dma.h> 497#include <mach/dma.h>
497#include <mach/hardware.h>
498#include <mach/pxa-regs.h>
499 498
500#ifdef SMC_insl 499#ifdef SMC_insl
501#undef SMC_insl 500#undef SMC_insl
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index bb9ddb9532e3..c49a7269f6d1 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -28,7 +28,6 @@
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/system.h> 30#include <asm/system.h>
31#include <mach/pxa-regs.h>
32#include <mach/pxa2xx-regs.h> 31#include <mach/pxa2xx-regs.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
34 33
@@ -39,6 +38,44 @@
39#include "soc_common.h" 38#include "soc_common.h"
40#include "pxa2xx_base.h" 39#include "pxa2xx_base.h"
41 40
41/*
42 * Personal Computer Memory Card International Association (PCMCIA) sockets
43 */
44
45#define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */
46#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */
47#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */
48#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */
49#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */
50
51#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */
52#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */
53#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */
54#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */
55
56#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */
57#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */
58#define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */
59#define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */
60
61#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \
62 (0x20000000 + (Nb) * PCMCIASp)
63#define _PCMCIAIO(Nb) _PCMCIA(Nb) /* PCMCIA I/O [0..1] */
64#define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \
65 (_PCMCIA(Nb) + 2 * PCMCIAPrtSp)
66#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \
67 (_PCMCIA(Nb) + 3 * PCMCIAPrtSp)
68
69#define _PCMCIA0 _PCMCIA(0) /* PCMCIA 0 */
70#define _PCMCIA0IO _PCMCIAIO(0) /* PCMCIA 0 I/O */
71#define _PCMCIA0Attr _PCMCIAAttr(0) /* PCMCIA 0 Attribute */
72#define _PCMCIA0Mem _PCMCIAMem(0) /* PCMCIA 0 Memory */
73
74#define _PCMCIA1 _PCMCIA(1) /* PCMCIA 1 */
75#define _PCMCIA1IO _PCMCIAIO(1) /* PCMCIA 1 I/O */
76#define _PCMCIA1Attr _PCMCIAAttr(1) /* PCMCIA 1 Attribute */
77#define _PCMCIA1Mem _PCMCIAMem(1) /* PCMCIA 1 Memory */
78
42 79
43#define MCXX_SETUP_MASK (0x7f) 80#define MCXX_SETUP_MASK (0x7f)
44#define MCXX_ASST_MASK (0x1f) 81#define MCXX_ASST_MASK (0x1f)
@@ -177,29 +214,73 @@ static void pxa2xx_configure_sockets(struct device *dev)
177 MECR |= MECR_CIT; 214 MECR |= MECR_CIT;
178 215
179 /* Set MECR:NOS (Number Of Sockets) */ 216 /* Set MECR:NOS (Number Of Sockets) */
180 if (ops->nr > 1 || machine_is_viper()) 217 if ((ops->first + ops->nr) > 1 || machine_is_viper())
181 MECR |= MECR_NOS; 218 MECR |= MECR_NOS;
182 else 219 else
183 MECR &= ~MECR_NOS; 220 MECR &= ~MECR_NOS;
184} 221}
185 222
223static const char *skt_names[] = {
224 "PCMCIA socket 0",
225 "PCMCIA socket 1",
226};
227
228#define SKT_DEV_INFO_SIZE(n) \
229 (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket))
230
186int __pxa2xx_drv_pcmcia_probe(struct device *dev) 231int __pxa2xx_drv_pcmcia_probe(struct device *dev)
187{ 232{
188 int ret; 233 int i, ret;
189 struct pcmcia_low_level *ops; 234 struct pcmcia_low_level *ops;
235 struct skt_dev_info *sinfo;
236 struct soc_pcmcia_socket *skt;
190 237
191 if (!dev || !dev->platform_data) 238 if (!dev || !dev->platform_data)
192 return -ENODEV; 239 return -ENODEV;
193 240
194 ops = (struct pcmcia_low_level *)dev->platform_data; 241 ops = (struct pcmcia_low_level *)dev->platform_data;
195 242
243 sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
244 if (!sinfo)
245 return -ENOMEM;
246
247 sinfo->nskt = ops->nr;
248
249 /* Initialize processor specific parameters */
250 for (i = 0; i < ops->nr; i++) {
251 skt = &sinfo->skt[i];
252
253 skt->nr = ops->first + i;
254 skt->irq = NO_IRQ;
255
256 skt->res_skt.start = _PCMCIA(skt->nr);
257 skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1;
258 skt->res_skt.name = skt_names[skt->nr];
259 skt->res_skt.flags = IORESOURCE_MEM;
260
261 skt->res_io.start = _PCMCIAIO(skt->nr);
262 skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;
263 skt->res_io.name = "io";
264 skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
265
266 skt->res_mem.start = _PCMCIAMem(skt->nr);
267 skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;
268 skt->res_mem.name = "memory";
269 skt->res_mem.flags = IORESOURCE_MEM;
270
271 skt->res_attr.start = _PCMCIAAttr(skt->nr);
272 skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;
273 skt->res_attr.name = "attribute";
274 skt->res_attr.flags = IORESOURCE_MEM;
275 }
276
196 /* Provide our PXA2xx specific timing routines. */ 277 /* Provide our PXA2xx specific timing routines. */
197 ops->set_timing = pxa2xx_pcmcia_set_timing; 278 ops->set_timing = pxa2xx_pcmcia_set_timing;
198#ifdef CONFIG_CPU_FREQ 279#ifdef CONFIG_CPU_FREQ
199 ops->frequency_change = pxa2xx_pcmcia_frequency_change; 280 ops->frequency_change = pxa2xx_pcmcia_frequency_change;
200#endif 281#endif
201 282
202 ret = soc_common_drv_pcmcia_probe(dev, ops, ops->first, ops->nr); 283 ret = soc_common_drv_pcmcia_probe(dev, ops, sinfo);
203 284
204 if (!ret) 285 if (!ret)
205 pxa2xx_configure_sockets(dev); 286 pxa2xx_configure_sockets(dev);
diff --git a/drivers/pcmcia/pxa2xx_cm_x255.c b/drivers/pcmcia/pxa2xx_cm_x255.c
index 7c8bcb476622..4ed64d8e95e7 100644
--- a/drivers/pcmcia/pxa2xx_cm_x255.c
+++ b/drivers/pcmcia/pxa2xx_cm_x255.c
@@ -16,7 +16,6 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17 17
18#include <asm/mach-types.h> 18#include <asm/mach-types.h>
19#include <mach/pxa-regs.h>
20 19
21#include "soc_common.h" 20#include "soc_common.h"
22 21
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c
index 6c3aac377126..a7b943d01e34 100644
--- a/drivers/pcmcia/pxa2xx_cm_x270.c
+++ b/drivers/pcmcia/pxa2xx_cm_x270.c
@@ -16,7 +16,6 @@
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17 17
18#include <asm/mach-types.h> 18#include <asm/mach-types.h>
19#include <mach/pxa-regs.h>
20 19
21#include "soc_common.h" 20#include "soc_common.h"
22 21
diff --git a/drivers/pcmcia/pxa2xx_e740.c b/drivers/pcmcia/pxa2xx_e740.c
index f663a011bf4a..d09c0dc4a31a 100644
--- a/drivers/pcmcia/pxa2xx_e740.c
+++ b/drivers/pcmcia/pxa2xx_e740.c
@@ -16,8 +16,6 @@
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18 18
19#include <mach/hardware.h>
20#include <mach/pxa-regs.h>
21#include <mach/eseries-gpio.h> 19#include <mach/eseries-gpio.h>
22 20
23#include <asm/irq.h> 21#include <asm/irq.h>
diff --git a/drivers/pcmcia/pxa2xx_lubbock.c b/drivers/pcmcia/pxa2xx_lubbock.c
index 37ec55df086e..6cbb1b1f7cfd 100644
--- a/drivers/pcmcia/pxa2xx_lubbock.c
+++ b/drivers/pcmcia/pxa2xx_lubbock.c
@@ -24,7 +24,6 @@
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <asm/hardware/sa1111.h> 25#include <asm/hardware/sa1111.h>
26#include <asm/mach-types.h> 26#include <asm/mach-types.h>
27#include <mach/pxa-regs.h>
28#include <mach/lubbock.h> 27#include <mach/lubbock.h>
29 28
30#include "sa1111_generic.h" 29#include "sa1111_generic.h"
diff --git a/drivers/pcmcia/pxa2xx_mainstone.c b/drivers/pcmcia/pxa2xx_mainstone.c
index 877001db4916..1138551ba8f6 100644
--- a/drivers/pcmcia/pxa2xx_mainstone.c
+++ b/drivers/pcmcia/pxa2xx_mainstone.c
@@ -21,11 +21,10 @@
21 21
22#include <pcmcia/ss.h> 22#include <pcmcia/ss.h>
23 23
24#include <mach/hardware.h>
25#include <asm/mach-types.h> 24#include <asm/mach-types.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
27 26
28#include <mach/pxa-regs.h> 27#include <mach/pxa2xx-regs.h>
29#include <mach/mainstone.h> 28#include <mach/mainstone.h>
30 29
31#include "soc_common.h" 30#include "soc_common.h"
diff --git a/drivers/pcmcia/pxa2xx_palmld.c b/drivers/pcmcia/pxa2xx_palmld.c
index 1736c67e547e..5ba9b3664a00 100644
--- a/drivers/pcmcia/pxa2xx_palmld.c
+++ b/drivers/pcmcia/pxa2xx_palmld.c
@@ -98,8 +98,8 @@ static void palmld_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
98static struct pcmcia_low_level palmld_pcmcia_ops = { 98static struct pcmcia_low_level palmld_pcmcia_ops = {
99 .owner = THIS_MODULE, 99 .owner = THIS_MODULE,
100 100
101 .first = 0, 101 .first = 1,
102 .nr = 2, 102 .nr = 1,
103 103
104 .hw_init = palmld_pcmcia_hw_init, 104 .hw_init = palmld_pcmcia_hw_init,
105 .hw_shutdown = palmld_pcmcia_hw_shutdown, 105 .hw_shutdown = palmld_pcmcia_hw_shutdown,
diff --git a/drivers/pcmcia/pxa2xx_trizeps4.c b/drivers/pcmcia/pxa2xx_trizeps4.c
index 36c7a0b324d2..e0e5cb339b4a 100644
--- a/drivers/pcmcia/pxa2xx_trizeps4.c
+++ b/drivers/pcmcia/pxa2xx_trizeps4.c
@@ -22,8 +22,7 @@
22#include <asm/mach-types.h> 22#include <asm/mach-types.h>
23#include <asm/irq.h> 23#include <asm/irq.h>
24 24
25#include <mach/hardware.h> 25#include <mach/pxa2xx-regs.h>
26#include <mach/pxa-regs.h>
27#include <mach/trizeps4.h> 26#include <mach/trizeps4.h>
28 27
29#include "soc_common.h" 28#include "soc_common.h"
diff --git a/drivers/pcmcia/pxa2xx_viper.c b/drivers/pcmcia/pxa2xx_viper.c
index dd10481be7bf..17871360fe99 100644
--- a/drivers/pcmcia/pxa2xx_viper.c
+++ b/drivers/pcmcia/pxa2xx_viper.c
@@ -26,7 +26,6 @@
26 26
27#include <asm/irq.h> 27#include <asm/irq.h>
28 28
29#include <mach/pxa-regs.h>
30#include <mach/viper.h> 29#include <mach/viper.h>
31#include <asm/mach-types.h> 30#include <asm/mach-types.h>
32 31
diff --git a/drivers/pcmcia/sa1100_h3600.c b/drivers/pcmcia/sa1100_h3600.c
index 6de4e1b41d60..0cc3748f3758 100644
--- a/drivers/pcmcia/sa1100_h3600.c
+++ b/drivers/pcmcia/sa1100_h3600.c
@@ -37,9 +37,9 @@ static void h3600_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
37 soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs)); 37 soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
38 38
39 /* Disable CF bus: */ 39 /* Disable CF bus: */
40 clr_h3600_egpio(IPAQ_EGPIO_OPT_NVRAM_ON); 40 assign_h3600_egpio(IPAQ_EGPIO_OPT_NVRAM_ON, 0);
41 clr_h3600_egpio(IPAQ_EGPIO_OPT_ON); 41 assign_h3600_egpio(IPAQ_EGPIO_OPT_ON, 0);
42 set_h3600_egpio(IPAQ_EGPIO_OPT_RESET); 42 assign_h3600_egpio(IPAQ_EGPIO_OPT_RESET, 1);
43} 43}
44 44
45static void 45static void
@@ -79,10 +79,7 @@ h3600_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_
79 return -1; 79 return -1;
80 } 80 }
81 81
82 if (state->flags & SS_RESET) 82 assign_h3600_egpio(IPAQ_EGPIO_CARD_RESET, !!(state->flags & SS_RESET));
83 set_h3600_egpio(IPAQ_EGPIO_CARD_RESET);
84 else
85 clr_h3600_egpio(IPAQ_EGPIO_CARD_RESET);
86 83
87 /* Silently ignore Vpp, output enable, speaker enable. */ 84 /* Silently ignore Vpp, output enable, speaker enable. */
88 85
@@ -92,9 +89,9 @@ h3600_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_
92static void h3600_pcmcia_socket_init(struct soc_pcmcia_socket *skt) 89static void h3600_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
93{ 90{
94 /* Enable CF bus: */ 91 /* Enable CF bus: */
95 set_h3600_egpio(IPAQ_EGPIO_OPT_NVRAM_ON); 92 assign_h3600_egpio(IPAQ_EGPIO_OPT_NVRAM_ON, 1);
96 set_h3600_egpio(IPAQ_EGPIO_OPT_ON); 93 assign_h3600_egpio(IPAQ_EGPIO_OPT_ON, 1);
97 clr_h3600_egpio(IPAQ_EGPIO_OPT_RESET); 94 assign_h3600_egpio(IPAQ_EGPIO_OPT_RESET, 0);
98 95
99 msleep(10); 96 msleep(10);
100 97
@@ -112,10 +109,10 @@ static void h3600_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
112 * socket 0 then socket 1. 109 * socket 0 then socket 1.
113 */ 110 */
114 if (skt->nr == 1) { 111 if (skt->nr == 1) {
115 clr_h3600_egpio(IPAQ_EGPIO_OPT_ON); 112 assign_h3600_egpio(IPAQ_EGPIO_OPT_ON, 0);
116 clr_h3600_egpio(IPAQ_EGPIO_OPT_NVRAM_ON); 113 assign_h3600_egpio(IPAQ_EGPIO_OPT_NVRAM_ON, 0);
117 /* hmm, does this suck power? */ 114 /* hmm, does this suck power? */
118 set_h3600_egpio(IPAQ_EGPIO_OPT_RESET); 115 assign_h3600_egpio(IPAQ_EGPIO_OPT_RESET, 1);
119 } 116 }
120} 117}
121 118
diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c
index 6924d0ea8d32..401052a21ce8 100644
--- a/drivers/pcmcia/sa1111_generic.c
+++ b/drivers/pcmcia/sa1111_generic.c
@@ -11,12 +11,12 @@
11#include <linux/device.h> 11#include <linux/device.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h>
14 15
15#include <pcmcia/ss.h> 16#include <pcmcia/ss.h>
16 17
17#include <mach/hardware.h> 18#include <mach/hardware.h>
18#include <asm/hardware/sa1111.h> 19#include <asm/hardware/sa1111.h>
19#include <asm/io.h>
20#include <asm/irq.h> 20#include <asm/irq.h>
21 21
22#include "sa1111_generic.h" 22#include "sa1111_generic.h"
diff --git a/drivers/pcmcia/sa11xx_base.c b/drivers/pcmcia/sa11xx_base.c
index 7cb1273202cc..e15d59f2d8a9 100644
--- a/drivers/pcmcia/sa11xx_base.c
+++ b/drivers/pcmcia/sa11xx_base.c
@@ -36,9 +36,9 @@
36#include <linux/ioport.h> 36#include <linux/ioport.h>
37#include <linux/kernel.h> 37#include <linux/kernel.h>
38#include <linux/spinlock.h> 38#include <linux/spinlock.h>
39#include <linux/io.h>
39 40
40#include <mach/hardware.h> 41#include <mach/hardware.h>
41#include <asm/io.h>
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/system.h> 43#include <asm/system.h>
44 44
@@ -163,9 +163,55 @@ sa1100_pcmcia_show_timing(struct soc_pcmcia_socket *skt, char *buf)
163 return p - buf; 163 return p - buf;
164} 164}
165 165
166static const char *skt_names[] = {
167 "PCMCIA socket 0",
168 "PCMCIA socket 1",
169};
170
171#define SKT_DEV_INFO_SIZE(n) \
172 (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket))
173
166int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, 174int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
167 int first, int nr) 175 int first, int nr)
168{ 176{
177 struct skt_dev_info *sinfo;
178 struct soc_pcmcia_socket *skt;
179 int i;
180
181 sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
182 if (!sinfo)
183 return -ENOMEM;
184
185 sinfo->nskt = nr;
186
187 /* Initiliaze processor specific parameters */
188 for (i = 0; i < nr; i++) {
189 skt = &sinfo->skt[i];
190
191 skt->nr = first + i;
192 skt->irq = NO_IRQ;
193
194 skt->res_skt.start = _PCMCIA(skt->nr);
195 skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1;
196 skt->res_skt.name = skt_names[skt->nr];
197 skt->res_skt.flags = IORESOURCE_MEM;
198
199 skt->res_io.start = _PCMCIAIO(skt->nr);
200 skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;
201 skt->res_io.name = "io";
202 skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
203
204 skt->res_mem.start = _PCMCIAMem(skt->nr);
205 skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;
206 skt->res_mem.name = "memory";
207 skt->res_mem.flags = IORESOURCE_MEM;
208
209 skt->res_attr.start = _PCMCIAAttr(skt->nr);
210 skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;
211 skt->res_attr.name = "attribute";
212 skt->res_attr.flags = IORESOURCE_MEM;
213 }
214
169 /* 215 /*
170 * set default MECR calculation if the board specific 216 * set default MECR calculation if the board specific
171 * code did not specify one... 217 * code did not specify one...
@@ -180,7 +226,7 @@ int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
180 ops->frequency_change = sa1100_pcmcia_frequency_change; 226 ops->frequency_change = sa1100_pcmcia_frequency_change;
181#endif 227#endif
182 228
183 return soc_common_drv_pcmcia_probe(dev, ops, first, nr); 229 return soc_common_drv_pcmcia_probe(dev, ops, sinfo);
184} 230}
185EXPORT_SYMBOL(sa11xx_drv_pcmcia_probe); 231EXPORT_SYMBOL(sa11xx_drv_pcmcia_probe);
186 232
diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c
index f49ac6666153..163cf98e2386 100644
--- a/drivers/pcmcia/soc_common.c
+++ b/drivers/pcmcia/soc_common.c
@@ -49,11 +49,6 @@
49 49
50#include "soc_common.h" 50#include "soc_common.h"
51 51
52/* FIXME: platform dependent resource declaration has to move out of this file */
53#ifdef CONFIG_ARCH_PXA
54#include <mach/pxa-regs.h>
55#endif
56
57#ifdef CONFIG_PCMCIA_DEBUG 52#ifdef CONFIG_PCMCIA_DEBUG
58 53
59static int pc_debug; 54static int pc_debug;
@@ -581,19 +576,6 @@ EXPORT_SYMBOL(soc_pcmcia_enable_irqs);
581LIST_HEAD(soc_pcmcia_sockets); 576LIST_HEAD(soc_pcmcia_sockets);
582static DEFINE_MUTEX(soc_pcmcia_sockets_lock); 577static DEFINE_MUTEX(soc_pcmcia_sockets_lock);
583 578
584static const char *skt_names[] = {
585 "PCMCIA socket 0",
586 "PCMCIA socket 1",
587};
588
589struct skt_dev_info {
590 int nskt;
591 struct soc_pcmcia_socket skt[0];
592};
593
594#define SKT_DEV_INFO_SIZE(n) \
595 (sizeof(struct skt_dev_info) + (n)*sizeof(struct soc_pcmcia_socket))
596
597#ifdef CONFIG_CPU_FREQ 579#ifdef CONFIG_CPU_FREQ
598static int 580static int
599soc_pcmcia_notifier(struct notifier_block *nb, unsigned long val, void *data) 581soc_pcmcia_notifier(struct notifier_block *nb, unsigned long val, void *data)
@@ -637,26 +619,18 @@ static int soc_pcmcia_cpufreq_register(void) { return 0; }
637static void soc_pcmcia_cpufreq_unregister(void) {} 619static void soc_pcmcia_cpufreq_unregister(void) {}
638#endif 620#endif
639 621
640int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr) 622int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops,
623 struct skt_dev_info *sinfo)
641{ 624{
642 struct skt_dev_info *sinfo;
643 struct soc_pcmcia_socket *skt; 625 struct soc_pcmcia_socket *skt;
644 int ret, i; 626 int ret, i;
645 627
646 mutex_lock(&soc_pcmcia_sockets_lock); 628 mutex_lock(&soc_pcmcia_sockets_lock);
647 629
648 sinfo = kzalloc(SKT_DEV_INFO_SIZE(nr), GFP_KERNEL);
649 if (!sinfo) {
650 ret = -ENOMEM;
651 goto out;
652 }
653
654 sinfo->nskt = nr;
655
656 /* 630 /*
657 * Initialise the per-socket structure. 631 * Initialise the per-socket structure.
658 */ 632 */
659 for (i = 0; i < nr; i++) { 633 for (i = 0; i < sinfo->nskt; i++) {
660 skt = &sinfo->skt[i]; 634 skt = &sinfo->skt[i];
661 635
662 skt->socket.ops = &soc_common_pcmcia_operations; 636 skt->socket.ops = &soc_common_pcmcia_operations;
@@ -668,43 +642,21 @@ int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops
668 skt->poll_timer.data = (unsigned long)skt; 642 skt->poll_timer.data = (unsigned long)skt;
669 skt->poll_timer.expires = jiffies + SOC_PCMCIA_POLL_PERIOD; 643 skt->poll_timer.expires = jiffies + SOC_PCMCIA_POLL_PERIOD;
670 644
671 skt->nr = first + i;
672 skt->irq = NO_IRQ;
673 skt->dev = dev; 645 skt->dev = dev;
674 skt->ops = ops; 646 skt->ops = ops;
675 647
676 skt->res_skt.start = _PCMCIA(skt->nr);
677 skt->res_skt.end = _PCMCIA(skt->nr) + PCMCIASp - 1;
678 skt->res_skt.name = skt_names[skt->nr];
679 skt->res_skt.flags = IORESOURCE_MEM;
680
681 ret = request_resource(&iomem_resource, &skt->res_skt); 648 ret = request_resource(&iomem_resource, &skt->res_skt);
682 if (ret) 649 if (ret)
683 goto out_err_1; 650 goto out_err_1;
684 651
685 skt->res_io.start = _PCMCIAIO(skt->nr);
686 skt->res_io.end = _PCMCIAIO(skt->nr) + PCMCIAIOSp - 1;
687 skt->res_io.name = "io";
688 skt->res_io.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
689
690 ret = request_resource(&skt->res_skt, &skt->res_io); 652 ret = request_resource(&skt->res_skt, &skt->res_io);
691 if (ret) 653 if (ret)
692 goto out_err_2; 654 goto out_err_2;
693 655
694 skt->res_mem.start = _PCMCIAMem(skt->nr);
695 skt->res_mem.end = _PCMCIAMem(skt->nr) + PCMCIAMemSp - 1;
696 skt->res_mem.name = "memory";
697 skt->res_mem.flags = IORESOURCE_MEM;
698
699 ret = request_resource(&skt->res_skt, &skt->res_mem); 656 ret = request_resource(&skt->res_skt, &skt->res_mem);
700 if (ret) 657 if (ret)
701 goto out_err_3; 658 goto out_err_3;
702 659
703 skt->res_attr.start = _PCMCIAAttr(skt->nr);
704 skt->res_attr.end = _PCMCIAAttr(skt->nr) + PCMCIAAttrSp - 1;
705 skt->res_attr.name = "attribute";
706 skt->res_attr.flags = IORESOURCE_MEM;
707
708 ret = request_resource(&skt->res_skt, &skt->res_attr); 660 ret = request_resource(&skt->res_skt, &skt->res_attr);
709 if (ret) 661 if (ret)
710 goto out_err_4; 662 goto out_err_4;
diff --git a/drivers/pcmcia/soc_common.h b/drivers/pcmcia/soc_common.h
index 38c67375f363..290e143839ee 100644
--- a/drivers/pcmcia/soc_common.h
+++ b/drivers/pcmcia/soc_common.h
@@ -58,6 +58,11 @@ struct soc_pcmcia_socket {
58 struct list_head node; 58 struct list_head node;
59}; 59};
60 60
61struct skt_dev_info {
62 int nskt;
63 struct soc_pcmcia_socket skt[0];
64};
65
61struct pcmcia_state { 66struct pcmcia_state {
62 unsigned detect: 1, 67 unsigned detect: 1,
63 ready: 1, 68 ready: 1,
@@ -132,7 +137,7 @@ extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_
132 137
133extern struct list_head soc_pcmcia_sockets; 138extern struct list_head soc_pcmcia_sockets;
134 139
135extern int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr); 140extern int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, struct skt_dev_info *sinfo);
136extern int soc_common_drv_pcmcia_remove(struct device *dev); 141extern int soc_common_drv_pcmcia_remove(struct device *dev);
137 142
138 143
diff --git a/drivers/rtc/rtc-mv.c b/drivers/rtc/rtc-mv.c
index 45f12dcd3716..e0263d2005ee 100644
--- a/drivers/rtc/rtc-mv.c
+++ b/drivers/rtc/rtc-mv.c
@@ -12,6 +12,7 @@
12#include <linux/bcd.h> 12#include <linux/bcd.h>
13#include <linux/io.h> 13#include <linux/io.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/delay.h>
15 16
16 17
17#define RTC_TIME_REG_OFFS 0 18#define RTC_TIME_REG_OFFS 0
@@ -119,6 +120,16 @@ static int __init mv_rtc_probe(struct platform_device *pdev)
119 return -EINVAL; 120 return -EINVAL;
120 } 121 }
121 122
123 /* make sure it is actually functional */
124 if (rtc_time == 0x01000000) {
125 ssleep(1);
126 rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS);
127 if (rtc_time == 0x01000000) {
128 dev_err(&pdev->dev, "internal RTC not ticking\n");
129 return -ENODEV;
130 }
131 }
132
122 platform_set_drvdata(pdev, pdata); 133 platform_set_drvdata(pdev, pdata);
123 pdata->rtc = rtc_device_register(pdev->name, &pdev->dev, 134 pdata->rtc = rtc_device_register(pdev->name, &pdev->dev,
124 &mv_rtc_ops, THIS_MODULE); 135 &mv_rtc_ops, THIS_MODULE);
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c
index d26a5f82aaba..4f247e4dd3f9 100644
--- a/drivers/rtc/rtc-sa1100.c
+++ b/drivers/rtc/rtc-sa1100.c
@@ -35,7 +35,8 @@
35#include <asm/irq.h> 35#include <asm/irq.h>
36 36
37#ifdef CONFIG_ARCH_PXA 37#ifdef CONFIG_ARCH_PXA
38#include <mach/pxa-regs.h> 38#include <mach/regs-rtc.h>
39#include <mach/regs-ost.h>
39#endif 40#endif
40 41
41#define RTC_DEF_DIVIDER 32768 - 1 42#define RTC_DEF_DIVIDER 32768 - 1
diff --git a/drivers/scsi/arm/cumana_2.c b/drivers/scsi/arm/cumana_2.c
index 68a64123af8f..c9902b5c1f2b 100644
--- a/drivers/scsi/arm/cumana_2.c
+++ b/drivers/scsi/arm/cumana_2.c
@@ -318,7 +318,7 @@ cumanascsi_2_set_proc_info(struct Scsi_Host *host, char *buffer, int length)
318{ 318{
319 int ret = length; 319 int ret = length;
320 320
321 if (length >= 11 && strcmp(buffer, "CUMANASCSI2") == 0) { 321 if (length >= 11 && strncmp(buffer, "CUMANASCSI2", 11) == 0) {
322 buffer += 11; 322 buffer += 11;
323 length -= 11; 323 length -= 11;
324 324
@@ -390,7 +390,8 @@ static struct scsi_host_template cumanascsi2_template = {
390 .eh_abort_handler = fas216_eh_abort, 390 .eh_abort_handler = fas216_eh_abort,
391 .can_queue = 1, 391 .can_queue = 1,
392 .this_id = 7, 392 .this_id = 7,
393 .sg_tablesize = SG_ALL, 393 .sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS,
394 .dma_boundary = IOMD_DMA_BOUNDARY,
394 .cmd_per_lun = 1, 395 .cmd_per_lun = 1,
395 .use_clustering = DISABLE_CLUSTERING, 396 .use_clustering = DISABLE_CLUSTERING,
396 .proc_name = "cumanascsi2", 397 .proc_name = "cumanascsi2",
diff --git a/drivers/scsi/arm/eesox.c b/drivers/scsi/arm/eesox.c
index bb2477b3fb0b..d8435132f461 100644
--- a/drivers/scsi/arm/eesox.c
+++ b/drivers/scsi/arm/eesox.c
@@ -508,7 +508,8 @@ static struct scsi_host_template eesox_template = {
508 .eh_abort_handler = fas216_eh_abort, 508 .eh_abort_handler = fas216_eh_abort,
509 .can_queue = 1, 509 .can_queue = 1,
510 .this_id = 7, 510 .this_id = 7,
511 .sg_tablesize = SG_ALL, 511 .sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS,
512 .dma_boundary = IOMD_DMA_BOUNDARY,
512 .cmd_per_lun = 1, 513 .cmd_per_lun = 1,
513 .use_clustering = DISABLE_CLUSTERING, 514 .use_clustering = DISABLE_CLUSTERING,
514 .proc_name = "eesox", 515 .proc_name = "eesox",
diff --git a/drivers/scsi/arm/powertec.c b/drivers/scsi/arm/powertec.c
index d9a546d1917c..e2297b4c1b9e 100644
--- a/drivers/scsi/arm/powertec.c
+++ b/drivers/scsi/arm/powertec.c
@@ -302,7 +302,8 @@ static struct scsi_host_template powertecscsi_template = {
302 302
303 .can_queue = 8, 303 .can_queue = 8,
304 .this_id = 7, 304 .this_id = 7,
305 .sg_tablesize = SG_ALL, 305 .sg_tablesize = SCSI_MAX_SG_CHAIN_SEGMENTS,
306 .dma_boundary = IOMD_DMA_BOUNDARY,
306 .cmd_per_lun = 2, 307 .cmd_per_lun = 2,
307 .use_clustering = ENABLE_CLUSTERING, 308 .use_clustering = ENABLE_CLUSTERING,
308 .proc_name = "powertec", 309 .proc_name = "powertec",
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index f31c6698419c..cb6d85d7ff43 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -14,8 +14,8 @@
14#include <linux/tty_flip.h> 14#include <linux/tty_flip.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16#include <linux/serial.h> 16#include <linux/serial.h>
17#include <linux/io.h>
17 18
18#include <asm/io.h>
19#include <asm/irq.h> 19#include <asm/irq.h>
20#include <asm/mach-types.h> 20#include <asm/mach-types.h>
21#include <asm/hardware/dec21285.h> 21#include <asm/hardware/dec21285.h>
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 7d7f576da202..9be11b0963f2 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -628,7 +628,7 @@ config SERIAL_MPSC_CONSOLE
628 628
629config SERIAL_PXA 629config SERIAL_PXA
630 bool "PXA serial port support" 630 bool "PXA serial port support"
631 depends on ARM && ARCH_PXA 631 depends on ARCH_PXA || ARCH_MMP
632 select SERIAL_CORE 632 select SERIAL_CORE
633 help 633 help
634 If you have a machine based on an Intel XScale PXA2xx CPU you 634 If you have a machine based on an Intel XScale PXA2xx CPU you
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c
index 459f3420a429..80e76426131d 100644
--- a/drivers/serial/clps711x.c
+++ b/drivers/serial/clps711x.c
@@ -38,9 +38,9 @@
38#include <linux/tty_flip.h> 38#include <linux/tty_flip.h>
39#include <linux/serial_core.h> 39#include <linux/serial_core.h>
40#include <linux/serial.h> 40#include <linux/serial.h>
41#include <linux/io.h>
41 42
42#include <mach/hardware.h> 43#include <mach/hardware.h>
43#include <asm/io.h>
44#include <asm/irq.h> 44#include <asm/irq.h>
45#include <asm/hardware/clps7111.h> 45#include <asm/hardware/clps7111.h>
46 46
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index a50954612b60..9f460b175c50 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -1129,7 +1129,7 @@ static int serial_imx_probe(struct platform_device *pdev)
1129 sport->timer.function = imx_timeout; 1129 sport->timer.function = imx_timeout;
1130 sport->timer.data = (unsigned long)sport; 1130 sport->timer.data = (unsigned long)sport;
1131 1131
1132 sport->clk = clk_get(&pdev->dev, "uart_clk"); 1132 sport->clk = clk_get(&pdev->dev, "uart");
1133 if (IS_ERR(sport->clk)) { 1133 if (IS_ERR(sport->clk)) {
1134 ret = PTR_ERR(sport->clk); 1134 ret = PTR_ERR(sport->clk);
1135 goto unmap; 1135 goto unmap;
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c
index f6e3b86bb0be..a48a8a13d87b 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/serial/pxa.c
@@ -43,13 +43,7 @@
43#include <linux/tty_flip.h> 43#include <linux/tty_flip.h>
44#include <linux/serial_core.h> 44#include <linux/serial_core.h>
45#include <linux/clk.h> 45#include <linux/clk.h>
46 46#include <linux/io.h>
47#include <asm/io.h>
48#include <mach/hardware.h>
49#include <asm/irq.h>
50#include <mach/pxa-regs.h>
51#include <mach/regs-uart.h>
52
53 47
54struct uart_pxa_port { 48struct uart_pxa_port {
55 struct uart_port port; 49 struct uart_port port;
@@ -491,7 +485,7 @@ serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
491 * Ensure the port will be enabled. 485 * Ensure the port will be enabled.
492 * This is required especially for serial console. 486 * This is required especially for serial console.
493 */ 487 */
494 up->ier |= IER_UUE; 488 up->ier |= UART_IER_UUE;
495 489
496 /* 490 /*
497 * Update the per-port timeout. 491 * Update the per-port timeout.
@@ -784,19 +778,15 @@ static int serial_pxa_probe(struct platform_device *dev)
784 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 778 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
785 sport->port.uartclk = clk_get_rate(sport->clk); 779 sport->port.uartclk = clk_get_rate(sport->clk);
786 780
787 /* 781 switch (dev->id) {
788 * Is it worth keeping this? 782 case 0: sport->name = "FFUART"; break;
789 */ 783 case 1: sport->name = "BTUART"; break;
790 if (mmres->start == __PREG(FFUART)) 784 case 2: sport->name = "STUART"; break;
791 sport->name = "FFUART"; 785 case 3: sport->name = "HWUART"; break;
792 else if (mmres->start == __PREG(BTUART)) 786 default:
793 sport->name = "BTUART";
794 else if (mmres->start == __PREG(STUART))
795 sport->name = "STUART";
796 else if (mmres->start == __PREG(HWUART))
797 sport->name = "HWUART";
798 else
799 sport->name = "???"; 787 sport->name = "???";
788 break;
789 }
800 790
801 sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1); 791 sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1);
802 if (!sport->port.membase) { 792 if (!sport->port.membase) {
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c
index b24a25ea6bc5..94530f01521e 100644
--- a/drivers/serial/sa1100.c
+++ b/drivers/serial/sa1100.c
@@ -36,8 +36,8 @@
36#include <linux/tty_flip.h> 36#include <linux/tty_flip.h>
37#include <linux/serial_core.h> 37#include <linux/serial_core.h>
38#include <linux/serial.h> 38#include <linux/serial.h>
39#include <linux/io.h>
39 40
40#include <asm/io.h>
41#include <asm/irq.h> 41#include <asm/irq.h>
42#include <mach/hardware.h> 42#include <mach/hardware.h>
43#include <asm/mach/serial_sa1100.h> 43#include <asm/mach/serial_sa1100.h>
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index 1c65e380c845..d6d0c5d241ce 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -1021,13 +1021,13 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
1021 spin_lock_init(&mcspi->lock); 1021 spin_lock_init(&mcspi->lock);
1022 INIT_LIST_HEAD(&mcspi->msg_queue); 1022 INIT_LIST_HEAD(&mcspi->msg_queue);
1023 1023
1024 mcspi->ick = clk_get(&pdev->dev, "mcspi_ick"); 1024 mcspi->ick = clk_get(&pdev->dev, "ick");
1025 if (IS_ERR(mcspi->ick)) { 1025 if (IS_ERR(mcspi->ick)) {
1026 dev_dbg(&pdev->dev, "can't get mcspi_ick\n"); 1026 dev_dbg(&pdev->dev, "can't get mcspi_ick\n");
1027 status = PTR_ERR(mcspi->ick); 1027 status = PTR_ERR(mcspi->ick);
1028 goto err1a; 1028 goto err1a;
1029 } 1029 }
1030 mcspi->fck = clk_get(&pdev->dev, "mcspi_fck"); 1030 mcspi->fck = clk_get(&pdev->dev, "fck");
1031 if (IS_ERR(mcspi->fck)) { 1031 if (IS_ERR(mcspi->fck)) {
1032 dev_dbg(&pdev->dev, "can't get mcspi_fck\n"); 1032 dev_dbg(&pdev->dev, "can't get mcspi_fck\n");
1033 status = PTR_ERR(mcspi->fck); 1033 status = PTR_ERR(mcspi->fck);
diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c
index 60b5381c65c4..fe8b9ac0ccef 100644
--- a/drivers/spi/omap_uwire.c
+++ b/drivers/spi/omap_uwire.c
@@ -506,11 +506,12 @@ static int __init uwire_probe(struct platform_device *pdev)
506 506
507 dev_set_drvdata(&pdev->dev, uwire); 507 dev_set_drvdata(&pdev->dev, uwire);
508 508
509 uwire->ck = clk_get(&pdev->dev, "armxor_ck"); 509 uwire->ck = clk_get(&pdev->dev, "fck");
510 if (!uwire->ck || IS_ERR(uwire->ck)) { 510 if (IS_ERR(uwire->ck)) {
511 dev_dbg(&pdev->dev, "no mpu_xor_clk ?\n"); 511 status = PTR_ERR(uwire->ck);
512 dev_dbg(&pdev->dev, "no functional clock?\n");
512 spi_master_put(master); 513 spi_master_put(master);
513 return -ENODEV; 514 return status;
514 } 515 }
515 clk_enable(uwire->ck); 516 clk_enable(uwire->ck);
516 517
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c
index ec24f2d16f3c..33fcef3150d4 100644
--- a/drivers/spi/pxa2xx_spi.c
+++ b/drivers/spi/pxa2xx_spi.c
@@ -34,8 +34,6 @@
34#include <asm/delay.h> 34#include <asm/delay.h>
35 35
36#include <mach/dma.h> 36#include <mach/dma.h>
37#include <mach/hardware.h>
38#include <mach/pxa-regs.h>
39#include <mach/regs-ssp.h> 37#include <mach/regs-ssp.h>
40#include <mach/ssp.h> 38#include <mach/ssp.h>
41#include <mach/pxa2xx_spi.h> 39#include <mach/pxa2xx_spi.h>
diff --git a/drivers/usb/host/ohci-ep93xx.c b/drivers/usb/host/ohci-ep93xx.c
index fb3055f084b5..7cf74f8c2db1 100644
--- a/drivers/usb/host/ohci-ep93xx.c
+++ b/drivers/usb/host/ohci-ep93xx.c
@@ -28,8 +28,6 @@
28#include <linux/signal.h> 28#include <linux/signal.h>
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30 30
31#include <mach/hardware.h>
32
33static struct clk *usb_host_clock; 31static struct clk *usb_host_clock;
34 32
35static void ep93xx_start_hc(struct device *dev) 33static void ep93xx_start_hc(struct device *dev)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index fb19803060cf..41c27a44bd82 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -397,7 +397,7 @@ config FB_SA1100
397 397
398config FB_IMX 398config FB_IMX
399 tristate "Motorola i.MX LCD support" 399 tristate "Motorola i.MX LCD support"
400 depends on FB && ARM && ARCH_IMX 400 depends on FB && (ARCH_IMX || ARCH_MX2)
401 select FB_CFB_FILLRECT 401 select FB_CFB_FILLRECT
402 select FB_CFB_COPYAREA 402 select FB_CFB_COPYAREA
403 select FB_CFB_IMAGEBLIT 403 select FB_CFB_IMAGEBLIT
@@ -2120,16 +2120,30 @@ config FB_PRE_INIT_FB
2120 the bootloader. 2120 the bootloader.
2121 2121
2122config FB_MX3 2122config FB_MX3
2123 tristate "MX3 Framebuffer support" 2123 tristate "MX3 Framebuffer support"
2124 depends on FB && MX3_IPU 2124 depends on FB && MX3_IPU
2125 select FB_CFB_FILLRECT 2125 select FB_CFB_FILLRECT
2126 select FB_CFB_COPYAREA 2126 select FB_CFB_COPYAREA
2127 select FB_CFB_IMAGEBLIT 2127 select FB_CFB_IMAGEBLIT
2128 default y 2128 default y
2129 help 2129 help
2130 This is a framebuffer device for the i.MX31 LCD Controller. So 2130 This is a framebuffer device for the i.MX31 LCD Controller. So
2131 far only synchronous displays are supported. If you plan to use 2131 far only synchronous displays are supported. If you plan to use
2132 an LCD display with your i.MX31 system, say Y here. 2132 an LCD display with your i.MX31 system, say Y here.
2133
2134config FB_BROADSHEET
2135 tristate "E-Ink Broadsheet/Epson S1D13521 controller support"
2136 depends on FB
2137 select FB_SYS_FILLRECT
2138 select FB_SYS_COPYAREA
2139 select FB_SYS_IMAGEBLIT
2140 select FB_SYS_FOPS
2141 select FB_DEFERRED_IO
2142 help
2143 This driver implements support for the E-Ink Broadsheet
2144 controller. The release name for this device was Epson S1D13521
2145 and could also have been called by other names when coupled with
2146 a bridge adapter.
2133 2147
2134source "drivers/video/omap/Kconfig" 2148source "drivers/video/omap/Kconfig"
2135 2149
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 2a998ca6181d..bb265eca7d57 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -106,6 +106,7 @@ obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
106obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o 106obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
107obj-$(CONFIG_FB_MAXINE) += maxinefb.o 107obj-$(CONFIG_FB_MAXINE) += maxinefb.o
108obj-$(CONFIG_FB_METRONOME) += metronomefb.o 108obj-$(CONFIG_FB_METRONOME) += metronomefb.o
109obj-$(CONFIG_FB_BROADSHEET) += broadsheetfb.o
109obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o 110obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
110obj-$(CONFIG_FB_SH7760) += sh7760fb.o 111obj-$(CONFIG_FB_SH7760) += sh7760fb.o
111obj-$(CONFIG_FB_IMX) += imxfb.o 112obj-$(CONFIG_FB_IMX) += imxfb.o
@@ -132,7 +133,7 @@ obj-$(CONFIG_FB_VGA16) += vga16fb.o
132obj-$(CONFIG_FB_OF) += offb.o 133obj-$(CONFIG_FB_OF) += offb.o
133obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o 134obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
134obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o 135obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
135obj-$(CONFIG_FB_MX3) += mx3fb.o 136obj-$(CONFIG_FB_MX3) += mx3fb.o
136 137
137# the test framebuffer is last 138# the test framebuffer is last
138obj-$(CONFIG_FB_VIRTUAL) += vfb.o 139obj-$(CONFIG_FB_VIRTUAL) += vfb.o
diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c
index 61c3d3f40fd1..6995fe1e86d4 100644
--- a/drivers/video/acornfb.c
+++ b/drivers/video/acornfb.c
@@ -28,9 +28,9 @@
28#include <linux/fb.h> 28#include <linux/fb.h>
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30#include <linux/dma-mapping.h> 30#include <linux/dma-mapping.h>
31#include <linux/io.h>
31 32
32#include <mach/hardware.h> 33#include <mach/hardware.h>
33#include <asm/io.h>
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <asm/mach-types.h> 35#include <asm/mach-types.h>
36#include <asm/pgtable.h> 36#include <asm/pgtable.h>
diff --git a/drivers/video/broadsheetfb.c b/drivers/video/broadsheetfb.c
new file mode 100644
index 000000000000..509cb92e8731
--- /dev/null
+++ b/drivers/video/broadsheetfb.c
@@ -0,0 +1,568 @@
1/*
2 * broadsheetfb.c -- FB driver for E-Ink Broadsheet controller
3 *
4 * Copyright (C) 2008, Jaya Kumar
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 *
10 * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
11 *
12 * This driver is written to be used with the Broadsheet display controller.
13 *
14 * It is intended to be architecture independent. A board specific driver
15 * must be used to perform all the physical IO interactions.
16 *
17 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/string.h>
23#include <linux/mm.h>
24#include <linux/slab.h>
25#include <linux/vmalloc.h>
26#include <linux/delay.h>
27#include <linux/interrupt.h>
28#include <linux/fb.h>
29#include <linux/init.h>
30#include <linux/platform_device.h>
31#include <linux/list.h>
32#include <linux/uaccess.h>
33
34#include <video/broadsheetfb.h>
35
36/* Display specific information */
37#define DPY_W 800
38#define DPY_H 600
39
40static struct fb_fix_screeninfo broadsheetfb_fix __devinitdata = {
41 .id = "broadsheetfb",
42 .type = FB_TYPE_PACKED_PIXELS,
43 .visual = FB_VISUAL_STATIC_PSEUDOCOLOR,
44 .xpanstep = 0,
45 .ypanstep = 0,
46 .ywrapstep = 0,
47 .line_length = DPY_W,
48 .accel = FB_ACCEL_NONE,
49};
50
51static struct fb_var_screeninfo broadsheetfb_var __devinitdata = {
52 .xres = DPY_W,
53 .yres = DPY_H,
54 .xres_virtual = DPY_W,
55 .yres_virtual = DPY_H,
56 .bits_per_pixel = 8,
57 .grayscale = 1,
58 .red = { 0, 4, 0 },
59 .green = { 0, 4, 0 },
60 .blue = { 0, 4, 0 },
61 .transp = { 0, 0, 0 },
62};
63
64/* main broadsheetfb functions */
65static void broadsheet_issue_data(struct broadsheetfb_par *par, u16 data)
66{
67 par->board->set_ctl(par, BS_WR, 0);
68 par->board->set_hdb(par, data);
69 par->board->set_ctl(par, BS_WR, 1);
70}
71
72static void broadsheet_issue_cmd(struct broadsheetfb_par *par, u16 data)
73{
74 par->board->set_ctl(par, BS_DC, 0);
75 broadsheet_issue_data(par, data);
76}
77
78static void broadsheet_send_command(struct broadsheetfb_par *par, u16 data)
79{
80 par->board->wait_for_rdy(par);
81
82 par->board->set_ctl(par, BS_CS, 0);
83 broadsheet_issue_cmd(par, data);
84 par->board->set_ctl(par, BS_DC, 1);
85 par->board->set_ctl(par, BS_CS, 1);
86}
87
88static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd,
89 int argc, u16 *argv)
90{
91 int i;
92
93 par->board->wait_for_rdy(par);
94
95 par->board->set_ctl(par, BS_CS, 0);
96 broadsheet_issue_cmd(par, cmd);
97 par->board->set_ctl(par, BS_DC, 1);
98
99 for (i = 0; i < argc; i++)
100 broadsheet_issue_data(par, argv[i]);
101 par->board->set_ctl(par, BS_CS, 1);
102}
103
104static void broadsheet_burst_write(struct broadsheetfb_par *par, int size,
105 u16 *data)
106{
107 int i;
108 u16 tmp;
109
110 par->board->set_ctl(par, BS_CS, 0);
111 par->board->set_ctl(par, BS_DC, 1);
112
113 for (i = 0; i < size; i++) {
114 par->board->set_ctl(par, BS_WR, 0);
115 tmp = (data[i] & 0x0F) << 4;
116 tmp |= (data[i] & 0x0F00) << 4;
117 par->board->set_hdb(par, tmp);
118 par->board->set_ctl(par, BS_WR, 1);
119 }
120
121 par->board->set_ctl(par, BS_CS, 1);
122}
123
124static u16 broadsheet_get_data(struct broadsheetfb_par *par)
125{
126 u16 res;
127 /* wait for ready to go hi. (lo is busy) */
128 par->board->wait_for_rdy(par);
129
130 /* cs lo, dc lo for cmd, we lo for each data, db as usual */
131 par->board->set_ctl(par, BS_DC, 1);
132 par->board->set_ctl(par, BS_CS, 0);
133 par->board->set_ctl(par, BS_WR, 0);
134
135 res = par->board->get_hdb(par);
136
137 /* strobe wr */
138 par->board->set_ctl(par, BS_WR, 1);
139 par->board->set_ctl(par, BS_CS, 1);
140
141 return res;
142}
143
144static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg,
145 u16 data)
146{
147 /* wait for ready to go hi. (lo is busy) */
148 par->board->wait_for_rdy(par);
149
150 /* cs lo, dc lo for cmd, we lo for each data, db as usual */
151 par->board->set_ctl(par, BS_CS, 0);
152
153 broadsheet_issue_cmd(par, BS_CMD_WR_REG);
154
155 par->board->set_ctl(par, BS_DC, 1);
156
157 broadsheet_issue_data(par, reg);
158 broadsheet_issue_data(par, data);
159
160 par->board->set_ctl(par, BS_CS, 1);
161}
162
163static u16 broadsheet_read_reg(struct broadsheetfb_par *par, u16 reg)
164{
165 broadsheet_send_command(par, reg);
166 msleep(100);
167 return broadsheet_get_data(par);
168}
169
170static void __devinit broadsheet_init_display(struct broadsheetfb_par *par)
171{
172 u16 args[5];
173
174 args[0] = DPY_W;
175 args[1] = DPY_H;
176 args[2] = (100 | (1 << 8) | (1 << 9)); /* sdcfg */
177 args[3] = 2; /* gdrv cfg */
178 args[4] = (4 | (1 << 7)); /* lut index format */
179 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args);
180
181 /* did the controller really set it? */
182 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args);
183
184 args[0] = 4; /* fsync len */
185 args[1] = (10 << 8) | 4; /* fend/fbegin len */
186 args[2] = 10; /* line sync len */
187 args[3] = (100 << 8) | 4; /* line end/begin len */
188 args[4] = 6; /* pixel clock cfg */
189 broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_TMG, 5, args);
190
191 /* setup waveform */
192 args[0] = 0x886;
193 args[1] = 0;
194 broadsheet_send_cmdargs(par, BS_CMD_RD_WFM_INFO, 2, args);
195
196 broadsheet_send_command(par, BS_CMD_UPD_GDRV_CLR);
197
198 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG);
199
200 broadsheet_write_reg(par, 0x330, 0x84);
201
202 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG);
203
204 args[0] = (0x3 << 4);
205 broadsheet_send_cmdargs(par, BS_CMD_LD_IMG, 1, args);
206
207 args[0] = 0x154;
208 broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args);
209
210 broadsheet_burst_write(par, DPY_W*DPY_H/2,
211 (u16 *) par->info->screen_base);
212
213 broadsheet_send_command(par, BS_CMD_LD_IMG_END);
214
215 args[0] = 0x4300;
216 broadsheet_send_cmdargs(par, BS_CMD_UPD_FULL, 1, args);
217
218 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG);
219
220 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND);
221
222 par->board->wait_for_rdy(par);
223}
224
225static void __devinit broadsheet_init(struct broadsheetfb_par *par)
226{
227 broadsheet_send_command(par, BS_CMD_INIT_SYS_RUN);
228 /* the controller needs a second */
229 msleep(1000);
230 broadsheet_init_display(par);
231}
232
233static void broadsheetfb_dpy_update_pages(struct broadsheetfb_par *par,
234 u16 y1, u16 y2)
235{
236 u16 args[5];
237 unsigned char *buf = (unsigned char *)par->info->screen_base;
238
239 /* y1 must be a multiple of 4 so drop the lower bits */
240 y1 &= 0xFFFC;
241 /* y2 must be a multiple of 4 , but - 1 so up the lower bits */
242 y2 |= 0x0003;
243
244 args[0] = 0x3 << 4;
245 args[1] = 0;
246 args[2] = y1;
247 args[3] = cpu_to_le16(par->info->var.xres);
248 args[4] = y2;
249 broadsheet_send_cmdargs(par, BS_CMD_LD_IMG_AREA, 5, args);
250
251 args[0] = 0x154;
252 broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args);
253
254 buf += y1 * par->info->var.xres;
255 broadsheet_burst_write(par, ((1 + y2 - y1) * par->info->var.xres)/2,
256 (u16 *) buf);
257
258 broadsheet_send_command(par, BS_CMD_LD_IMG_END);
259
260 args[0] = 0x4300;
261 broadsheet_send_cmdargs(par, BS_CMD_UPD_FULL, 1, args);
262
263 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG);
264
265 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND);
266
267 par->board->wait_for_rdy(par);
268
269}
270
271static void broadsheetfb_dpy_update(struct broadsheetfb_par *par)
272{
273 u16 args[5];
274
275 args[0] = 0x3 << 4;
276 broadsheet_send_cmdargs(par, BS_CMD_LD_IMG, 1, args);
277
278 args[0] = 0x154;
279 broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args);
280 broadsheet_burst_write(par, DPY_W*DPY_H/2,
281 (u16 *) par->info->screen_base);
282
283 broadsheet_send_command(par, BS_CMD_LD_IMG_END);
284
285 args[0] = 0x4300;
286 broadsheet_send_cmdargs(par, BS_CMD_UPD_FULL, 1, args);
287
288 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG);
289
290 broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND);
291
292 par->board->wait_for_rdy(par);
293
294}
295
296/* this is called back from the deferred io workqueue */
297static void broadsheetfb_dpy_deferred_io(struct fb_info *info,
298 struct list_head *pagelist)
299{
300 u16 y1 = 0, h = 0;
301 int prev_index = -1;
302 struct page *cur;
303 struct fb_deferred_io *fbdefio = info->fbdefio;
304 int h_inc;
305 u16 yres = info->var.yres;
306 u16 xres = info->var.xres;
307
308 /* height increment is fixed per page */
309 h_inc = DIV_ROUND_UP(PAGE_SIZE , xres);
310
311 /* walk the written page list and swizzle the data */
312 list_for_each_entry(cur, &fbdefio->pagelist, lru) {
313 if (prev_index < 0) {
314 /* just starting so assign first page */
315 y1 = (cur->index << PAGE_SHIFT) / xres;
316 h = h_inc;
317 } else if ((prev_index + 1) == cur->index) {
318 /* this page is consecutive so increase our height */
319 h += h_inc;
320 } else {
321 /* page not consecutive, issue previous update first */
322 broadsheetfb_dpy_update_pages(info->par, y1, y1 + h);
323 /* start over with our non consecutive page */
324 y1 = (cur->index << PAGE_SHIFT) / xres;
325 h = h_inc;
326 }
327 prev_index = cur->index;
328 }
329
330 /* if we still have any pages to update we do so now */
331 if (h >= yres) {
332 /* its a full screen update, just do it */
333 broadsheetfb_dpy_update(info->par);
334 } else {
335 broadsheetfb_dpy_update_pages(info->par, y1,
336 min((u16) (y1 + h), yres));
337 }
338}
339
340static void broadsheetfb_fillrect(struct fb_info *info,
341 const struct fb_fillrect *rect)
342{
343 struct broadsheetfb_par *par = info->par;
344
345 sys_fillrect(info, rect);
346
347 broadsheetfb_dpy_update(par);
348}
349
350static void broadsheetfb_copyarea(struct fb_info *info,
351 const struct fb_copyarea *area)
352{
353 struct broadsheetfb_par *par = info->par;
354
355 sys_copyarea(info, area);
356
357 broadsheetfb_dpy_update(par);
358}
359
360static void broadsheetfb_imageblit(struct fb_info *info,
361 const struct fb_image *image)
362{
363 struct broadsheetfb_par *par = info->par;
364
365 sys_imageblit(info, image);
366
367 broadsheetfb_dpy_update(par);
368}
369
370/*
371 * this is the slow path from userspace. they can seek and write to
372 * the fb. it's inefficient to do anything less than a full screen draw
373 */
374static ssize_t broadsheetfb_write(struct fb_info *info, const char __user *buf,
375 size_t count, loff_t *ppos)
376{
377 struct broadsheetfb_par *par = info->par;
378 unsigned long p = *ppos;
379 void *dst;
380 int err = 0;
381 unsigned long total_size;
382
383 if (info->state != FBINFO_STATE_RUNNING)
384 return -EPERM;
385
386 total_size = info->fix.smem_len;
387
388 if (p > total_size)
389 return -EFBIG;
390
391 if (count > total_size) {
392 err = -EFBIG;
393 count = total_size;
394 }
395
396 if (count + p > total_size) {
397 if (!err)
398 err = -ENOSPC;
399
400 count = total_size - p;
401 }
402
403 dst = (void *)(info->screen_base + p);
404
405 if (copy_from_user(dst, buf, count))
406 err = -EFAULT;
407
408 if (!err)
409 *ppos += count;
410
411 broadsheetfb_dpy_update(par);
412
413 return (err) ? err : count;
414}
415
416static struct fb_ops broadsheetfb_ops = {
417 .owner = THIS_MODULE,
418 .fb_read = fb_sys_read,
419 .fb_write = broadsheetfb_write,
420 .fb_fillrect = broadsheetfb_fillrect,
421 .fb_copyarea = broadsheetfb_copyarea,
422 .fb_imageblit = broadsheetfb_imageblit,
423};
424
425static struct fb_deferred_io broadsheetfb_defio = {
426 .delay = HZ/4,
427 .deferred_io = broadsheetfb_dpy_deferred_io,
428};
429
430static int __devinit broadsheetfb_probe(struct platform_device *dev)
431{
432 struct fb_info *info;
433 struct broadsheet_board *board;
434 int retval = -ENOMEM;
435 int videomemorysize;
436 unsigned char *videomemory;
437 struct broadsheetfb_par *par;
438 int i;
439
440 /* pick up board specific routines */
441 board = dev->dev.platform_data;
442 if (!board)
443 return -EINVAL;
444
445 /* try to count device specific driver, if can't, platform recalls */
446 if (!try_module_get(board->owner))
447 return -ENODEV;
448
449 info = framebuffer_alloc(sizeof(struct broadsheetfb_par), &dev->dev);
450 if (!info)
451 goto err;
452
453 videomemorysize = (DPY_W*DPY_H);
454 videomemory = vmalloc(videomemorysize);
455 if (!videomemory)
456 goto err_fb_rel;
457
458 memset(videomemory, 0, videomemorysize);
459
460 info->screen_base = (char *)videomemory;
461 info->fbops = &broadsheetfb_ops;
462
463 info->var = broadsheetfb_var;
464 info->fix = broadsheetfb_fix;
465 info->fix.smem_len = videomemorysize;
466 par = info->par;
467 par->info = info;
468 par->board = board;
469 par->write_reg = broadsheet_write_reg;
470 par->read_reg = broadsheet_read_reg;
471 init_waitqueue_head(&par->waitq);
472
473 info->flags = FBINFO_FLAG_DEFAULT;
474
475 info->fbdefio = &broadsheetfb_defio;
476 fb_deferred_io_init(info);
477
478 retval = fb_alloc_cmap(&info->cmap, 16, 0);
479 if (retval < 0) {
480 dev_err(&dev->dev, "Failed to allocate colormap\n");
481 goto err_vfree;
482 }
483
484 /* set cmap */
485 for (i = 0; i < 16; i++)
486 info->cmap.red[i] = (((2*i)+1)*(0xFFFF))/32;
487 memcpy(info->cmap.green, info->cmap.red, sizeof(u16)*16);
488 memcpy(info->cmap.blue, info->cmap.red, sizeof(u16)*16);
489
490 retval = par->board->setup_irq(info);
491 if (retval < 0)
492 goto err_cmap;
493
494 /* this inits the dpy */
495 retval = board->init(par);
496 if (retval < 0)
497 goto err_free_irq;
498
499 broadsheet_init(par);
500
501 retval = register_framebuffer(info);
502 if (retval < 0)
503 goto err_free_irq;
504 platform_set_drvdata(dev, info);
505
506 printk(KERN_INFO
507 "fb%d: Broadsheet frame buffer, using %dK of video memory\n",
508 info->node, videomemorysize >> 10);
509
510
511 return 0;
512
513err_free_irq:
514 board->cleanup(par);
515err_cmap:
516 fb_dealloc_cmap(&info->cmap);
517err_vfree:
518 vfree(videomemory);
519err_fb_rel:
520 framebuffer_release(info);
521err:
522 module_put(board->owner);
523 return retval;
524
525}
526
527static int __devexit broadsheetfb_remove(struct platform_device *dev)
528{
529 struct fb_info *info = platform_get_drvdata(dev);
530
531 if (info) {
532 struct broadsheetfb_par *par = info->par;
533 unregister_framebuffer(info);
534 fb_deferred_io_cleanup(info);
535 par->board->cleanup(par);
536 fb_dealloc_cmap(&info->cmap);
537 vfree((void *)info->screen_base);
538 module_put(par->board->owner);
539 framebuffer_release(info);
540 }
541 return 0;
542}
543
544static struct platform_driver broadsheetfb_driver = {
545 .probe = broadsheetfb_probe,
546 .remove = broadsheetfb_remove,
547 .driver = {
548 .owner = THIS_MODULE,
549 .name = "broadsheetfb",
550 },
551};
552
553static int __init broadsheetfb_init(void)
554{
555 return platform_driver_register(&broadsheetfb_driver);
556}
557
558static void __exit broadsheetfb_exit(void)
559{
560 platform_driver_unregister(&broadsheetfb_driver);
561}
562
563module_init(broadsheetfb_init);
564module_exit(broadsheetfb_exit);
565
566MODULE_DESCRIPTION("fbdev driver for Broadsheet controller");
567MODULE_AUTHOR("Jaya Kumar");
568MODULE_LICENSE("GPL");
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c
index 7a9e42e3a9a9..83c5cefc266c 100644
--- a/drivers/video/cyber2000fb.c
+++ b/drivers/video/cyber2000fb.c
@@ -46,8 +46,8 @@
46#include <linux/fb.h> 46#include <linux/fb.h>
47#include <linux/pci.h> 47#include <linux/pci.h>
48#include <linux/init.h> 48#include <linux/init.h>
49#include <linux/io.h>
49 50
50#include <asm/io.h>
51#include <asm/pgtable.h> 51#include <asm/pgtable.h>
52#include <asm/system.h> 52#include <asm/system.h>
53 53
@@ -1425,7 +1425,7 @@ static void cyberpro_common_resume(struct cfb_info *cfb)
1425 1425
1426#ifdef CONFIG_ARCH_SHARK 1426#ifdef CONFIG_ARCH_SHARK
1427 1427
1428#include <mach/hardware.h> 1428#include <mach/framebuffer.h>
1429 1429
1430static int __devinit cyberpro_vl_probe(void) 1430static int __devinit cyberpro_vl_probe(void)
1431{ 1431{
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c
index d58c68cd456e..15a0ee6d8e23 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/imxfb.c
@@ -14,7 +14,6 @@
14 * linux-arm-kernel@lists.arm.linux.org.uk 14 * linux-arm-kernel@lists.arm.linux.org.uk
15 */ 15 */
16 16
17
18#include <linux/module.h> 17#include <linux/module.h>
19#include <linux/kernel.h> 18#include <linux/kernel.h>
20#include <linux/errno.h> 19#include <linux/errno.h>
@@ -27,9 +26,11 @@
27#include <linux/init.h> 26#include <linux/init.h>
28#include <linux/ioport.h> 27#include <linux/ioport.h>
29#include <linux/cpufreq.h> 28#include <linux/cpufreq.h>
29#include <linux/clk.h>
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
31#include <linux/dma-mapping.h> 31#include <linux/dma-mapping.h>
32#include <linux/io.h> 32#include <linux/io.h>
33#include <linux/math64.h>
33 34
34#include <mach/imxfb.h> 35#include <mach/imxfb.h>
35 36
@@ -44,7 +45,12 @@
44 45
45#define LCDC_SIZE 0x04 46#define LCDC_SIZE 0x04
46#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) 47#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
48
49#ifdef CONFIG_ARCH_MX1
47#define SIZE_YMAX(y) ((y) & 0x1ff) 50#define SIZE_YMAX(y) ((y) & 0x1ff)
51#else
52#define SIZE_YMAX(y) ((y) & 0x3ff)
53#endif
48 54
49#define LCDC_VPW 0x08 55#define LCDC_VPW 0x08
50#define VPW_VPW(x) ((x) & 0x3ff) 56#define VPW_VPW(x) ((x) & 0x3ff)
@@ -54,7 +60,12 @@
54#define CPOS_CC0 (1<<30) 60#define CPOS_CC0 (1<<30)
55#define CPOS_OP (1<<28) 61#define CPOS_OP (1<<28)
56#define CPOS_CXP(x) (((x) & 3ff) << 16) 62#define CPOS_CXP(x) (((x) & 3ff) << 16)
63
64#ifdef CONFIG_ARCH_MX1
57#define CPOS_CYP(y) ((y) & 0x1ff) 65#define CPOS_CYP(y) ((y) & 0x1ff)
66#else
67#define CPOS_CYP(y) ((y) & 0x3ff)
68#endif
58 69
59#define LCDC_LCWHB 0x10 70#define LCDC_LCWHB 0x10
60#define LCWHB_BK_EN (1<<31) 71#define LCWHB_BK_EN (1<<31)
@@ -63,9 +74,16 @@
63#define LCWHB_BD(x) ((x) & 0xff) 74#define LCWHB_BD(x) ((x) & 0xff)
64 75
65#define LCDC_LCHCC 0x14 76#define LCDC_LCHCC 0x14
77
78#ifdef CONFIG_ARCH_MX1
66#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) 79#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11)
67#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) 80#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5)
68#define LCHCC_CUR_COL_B(b) ((b) & 0x1f) 81#define LCHCC_CUR_COL_B(b) ((b) & 0x1f)
82#else
83#define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12)
84#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6)
85#define LCHCC_CUR_COL_B(b) ((b) & 0x3f)
86#endif
69 87
70#define LCDC_PCR 0x18 88#define LCDC_PCR 0x18
71 89
@@ -92,7 +110,13 @@
92/* bit fields in imxfb.h */ 110/* bit fields in imxfb.h */
93 111
94#define LCDC_RMCR 0x34 112#define LCDC_RMCR 0x34
113
114#ifdef CONFIG_ARCH_MX1
95#define RMCR_LCDC_EN (1<<1) 115#define RMCR_LCDC_EN (1<<1)
116#else
117#define RMCR_LCDC_EN 0
118#endif
119
96#define RMCR_SELF_REF (1<<0) 120#define RMCR_SELF_REF (1<<0)
97 121
98#define LCDC_LCDICR 0x38 122#define LCDC_LCDICR 0x38
@@ -119,6 +143,7 @@ struct imxfb_rgb {
119struct imxfb_info { 143struct imxfb_info {
120 struct platform_device *pdev; 144 struct platform_device *pdev;
121 void __iomem *regs; 145 void __iomem *regs;
146 struct clk *clk;
122 147
123 u_int max_bpp; 148 u_int max_bpp;
124 u_int max_xres; 149 u_int max_xres;
@@ -159,6 +184,17 @@ struct imxfb_info {
159#define MIN_XRES 64 184#define MIN_XRES 64
160#define MIN_YRES 64 185#define MIN_YRES 64
161 186
187/* Actually this really is 18bit support, the lowest 2 bits of each colour
188 * are unused in hardware. We claim to have 24bit support to make software
189 * like X work, which does not support 18bit.
190 */
191static struct imxfb_rgb def_rgb_18 = {
192 .red = {.offset = 16, .length = 8,},
193 .green = {.offset = 8, .length = 8,},
194 .blue = {.offset = 0, .length = 8,},
195 .transp = {.offset = 0, .length = 0,},
196};
197
162static struct imxfb_rgb def_rgb_16_tft = { 198static struct imxfb_rgb def_rgb_16_tft = {
163 .red = {.offset = 11, .length = 5,}, 199 .red = {.offset = 11, .length = 5,},
164 .green = {.offset = 5, .length = 6,}, 200 .green = {.offset = 5, .length = 6,},
@@ -286,9 +322,12 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
286 322
287 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); 323 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
288 switch (var->bits_per_pixel) { 324 switch (var->bits_per_pixel) {
325 case 32:
326 rgb = &def_rgb_18;
327 break;
289 case 16: 328 case 16:
290 default: 329 default:
291 if (readl(fbi->regs + LCDC_PCR) & PCR_TFT) 330 if (fbi->pcr & PCR_TFT)
292 rgb = &def_rgb_16_tft; 331 rgb = &def_rgb_16_tft;
293 else 332 else
294 rgb = &def_rgb_16_stn; 333 rgb = &def_rgb_16_stn;
@@ -327,9 +366,7 @@ static int imxfb_set_par(struct fb_info *info)
327 struct imxfb_info *fbi = info->par; 366 struct imxfb_info *fbi = info->par;
328 struct fb_var_screeninfo *var = &info->var; 367 struct fb_var_screeninfo *var = &info->var;
329 368
330 pr_debug("set_par\n"); 369 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
331
332 if (var->bits_per_pixel == 16)
333 info->fix.visual = FB_VISUAL_TRUECOLOR; 370 info->fix.visual = FB_VISUAL_TRUECOLOR;
334 else if (!fbi->cmap_static) 371 else if (!fbi->cmap_static)
335 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 372 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -354,10 +391,6 @@ static void imxfb_enable_controller(struct imxfb_info *fbi)
354{ 391{
355 pr_debug("Enabling LCD controller\n"); 392 pr_debug("Enabling LCD controller\n");
356 393
357 /* initialize LCDC */
358 writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN,
359 fbi->regs + LCDC_RMCR); /* just to be safe... */
360
361 writel(fbi->screen_dma, fbi->regs + LCDC_SSA); 394 writel(fbi->screen_dma, fbi->regs + LCDC_SSA);
362 395
363 /* physical screen start address */ 396 /* physical screen start address */
@@ -373,6 +406,8 @@ static void imxfb_enable_controller(struct imxfb_info *fbi)
373 406
374 writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); 407 writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
375 408
409 clk_enable(fbi->clk);
410
376 if (fbi->backlight_power) 411 if (fbi->backlight_power)
377 fbi->backlight_power(1); 412 fbi->backlight_power(1);
378 if (fbi->lcd_power) 413 if (fbi->lcd_power)
@@ -388,6 +423,8 @@ static void imxfb_disable_controller(struct imxfb_info *fbi)
388 if (fbi->lcd_power) 423 if (fbi->lcd_power)
389 fbi->lcd_power(0); 424 fbi->lcd_power(0);
390 425
426 clk_disable(fbi->clk);
427
391 writel(0, fbi->regs + LCDC_RMCR); 428 writel(0, fbi->regs + LCDC_RMCR);
392} 429}
393 430
@@ -431,6 +468,9 @@ static struct fb_ops imxfb_ops = {
431static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) 468static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
432{ 469{
433 struct imxfb_info *fbi = info->par; 470 struct imxfb_info *fbi = info->par;
471 unsigned int pcr, lcd_clk;
472 unsigned long long tmp;
473
434 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", 474 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
435 var->xres, var->hsync_len, 475 var->xres, var->hsync_len,
436 var->left_margin, var->right_margin); 476 var->left_margin, var->right_margin);
@@ -465,9 +505,9 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
465 info->fix.id, var->lower_margin); 505 info->fix.id, var->lower_margin);
466#endif 506#endif
467 507
468 writel(HCR_H_WIDTH(var->hsync_len) | 508 writel(HCR_H_WIDTH(var->hsync_len - 1) |
469 HCR_H_WAIT_1(var->right_margin) | 509 HCR_H_WAIT_1(var->right_margin - 1) |
470 HCR_H_WAIT_2(var->left_margin), 510 HCR_H_WAIT_2(var->left_margin - 3),
471 fbi->regs + LCDC_HCR); 511 fbi->regs + LCDC_HCR);
472 512
473 writel(VCR_V_WIDTH(var->vsync_len) | 513 writel(VCR_V_WIDTH(var->vsync_len) |
@@ -477,7 +517,23 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
477 517
478 writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), 518 writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres),
479 fbi->regs + LCDC_SIZE); 519 fbi->regs + LCDC_SIZE);
480 writel(fbi->pcr, fbi->regs + LCDC_PCR); 520
521 lcd_clk = clk_get_rate(fbi->clk);
522 tmp = var->pixclock * (unsigned long long)lcd_clk;
523 do_div(tmp, 1000000);
524 if (do_div(tmp, 1000000) > 500000)
525 tmp++;
526 pcr = (unsigned int)tmp;
527 if (--pcr > 0x3F) {
528 pcr = 0x3F;
529 printk(KERN_WARNING "Must limit pixel clock to %uHz\n",
530 lcd_clk / pcr);
531 }
532
533 /* add sync polarities */
534 pcr |= fbi->pcr & ~0x3F;
535
536 writel(pcr, fbi->regs + LCDC_PCR);
481 writel(fbi->pwmr, fbi->regs + LCDC_PWMR); 537 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
482 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); 538 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
483 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); 539 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
@@ -619,6 +675,13 @@ static int __init imxfb_probe(struct platform_device *pdev)
619 goto failed_req; 675 goto failed_req;
620 } 676 }
621 677
678 fbi->clk = clk_get(&pdev->dev, NULL);
679 if (IS_ERR(fbi->clk)) {
680 ret = PTR_ERR(fbi->clk);;
681 dev_err(&pdev->dev, "unable to get clock: %d\n", ret);
682 goto failed_getclock;
683 }
684
622 fbi->regs = ioremap(res->start, resource_size(res)); 685 fbi->regs = ioremap(res->start, resource_size(res));
623 if (fbi->regs == NULL) { 686 if (fbi->regs == NULL) {
624 printk(KERN_ERR"Cannot map frame buffer registers\n"); 687 printk(KERN_ERR"Cannot map frame buffer registers\n");
@@ -650,6 +713,12 @@ static int __init imxfb_probe(struct platform_device *pdev)
650 info->fix.smem_start = fbi->screen_dma; 713 info->fix.smem_start = fbi->screen_dma;
651 } 714 }
652 715
716 if (pdata->init) {
717 ret = pdata->init(fbi->pdev);
718 if (ret)
719 goto failed_platform_init;
720 }
721
653 /* 722 /*
654 * This makes sure that our colour bitfield 723 * This makes sure that our colour bitfield
655 * descriptors are correctly initialised. 724 * descriptors are correctly initialised.
@@ -674,10 +743,15 @@ static int __init imxfb_probe(struct platform_device *pdev)
674failed_register: 743failed_register:
675 fb_dealloc_cmap(&info->cmap); 744 fb_dealloc_cmap(&info->cmap);
676failed_cmap: 745failed_cmap:
746 if (pdata->exit)
747 pdata->exit(fbi->pdev);
748failed_platform_init:
677 if (!pdata->fixed_screen_cpu) 749 if (!pdata->fixed_screen_cpu)
678 dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, 750 dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu,
679 fbi->map_dma); 751 fbi->map_dma);
680failed_map: 752failed_map:
753 clk_put(fbi->clk);
754failed_getclock:
681 iounmap(fbi->regs); 755 iounmap(fbi->regs);
682failed_ioremap: 756failed_ioremap:
683 release_mem_region(res->start, res->end - res->start); 757 release_mem_region(res->start, res->end - res->start);
@@ -691,6 +765,7 @@ failed_init:
691 765
692static int __devexit imxfb_remove(struct platform_device *pdev) 766static int __devexit imxfb_remove(struct platform_device *pdev)
693{ 767{
768 struct imx_fb_platform_data *pdata;
694 struct fb_info *info = platform_get_drvdata(pdev); 769 struct fb_info *info = platform_get_drvdata(pdev);
695 struct imxfb_info *fbi = info->par; 770 struct imxfb_info *fbi = info->par;
696 struct resource *res; 771 struct resource *res;
@@ -701,12 +776,19 @@ static int __devexit imxfb_remove(struct platform_device *pdev)
701 776
702 unregister_framebuffer(info); 777 unregister_framebuffer(info);
703 778
779 pdata = pdev->dev.platform_data;
780 if (pdata->exit)
781 pdata->exit(fbi->pdev);
782
704 fb_dealloc_cmap(&info->cmap); 783 fb_dealloc_cmap(&info->cmap);
705 kfree(info->pseudo_palette); 784 kfree(info->pseudo_palette);
706 framebuffer_release(info); 785 framebuffer_release(info);
707 786
708 iounmap(fbi->regs); 787 iounmap(fbi->regs);
709 release_mem_region(res->start, res->end - res->start + 1); 788 release_mem_region(res->start, res->end - res->start + 1);
789 clk_disable(fbi->clk);
790 clk_put(fbi->clk);
791
710 platform_set_drvdata(pdev, NULL); 792 platform_set_drvdata(pdev, NULL);
711 793
712 return 0; 794 return 0;
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index 8a75d05f4334..fa1a512ce030 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -34,240 +34,240 @@
34#include <asm/io.h> 34#include <asm/io.h>
35#include <asm/uaccess.h> 35#include <asm/uaccess.h>
36 36
37#define MX3FB_NAME "mx3_sdc_fb" 37#define MX3FB_NAME "mx3_sdc_fb"
38 38
39#define MX3FB_REG_OFFSET 0xB4 39#define MX3FB_REG_OFFSET 0xB4
40 40
41/* SDC Registers */ 41/* SDC Registers */
42#define SDC_COM_CONF (0xB4 - MX3FB_REG_OFFSET) 42#define SDC_COM_CONF (0xB4 - MX3FB_REG_OFFSET)
43#define SDC_GW_CTRL (0xB8 - MX3FB_REG_OFFSET) 43#define SDC_GW_CTRL (0xB8 - MX3FB_REG_OFFSET)
44#define SDC_FG_POS (0xBC - MX3FB_REG_OFFSET) 44#define SDC_FG_POS (0xBC - MX3FB_REG_OFFSET)
45#define SDC_BG_POS (0xC0 - MX3FB_REG_OFFSET) 45#define SDC_BG_POS (0xC0 - MX3FB_REG_OFFSET)
46#define SDC_CUR_POS (0xC4 - MX3FB_REG_OFFSET) 46#define SDC_CUR_POS (0xC4 - MX3FB_REG_OFFSET)
47#define SDC_PWM_CTRL (0xC8 - MX3FB_REG_OFFSET) 47#define SDC_PWM_CTRL (0xC8 - MX3FB_REG_OFFSET)
48#define SDC_CUR_MAP (0xCC - MX3FB_REG_OFFSET) 48#define SDC_CUR_MAP (0xCC - MX3FB_REG_OFFSET)
49#define SDC_HOR_CONF (0xD0 - MX3FB_REG_OFFSET) 49#define SDC_HOR_CONF (0xD0 - MX3FB_REG_OFFSET)
50#define SDC_VER_CONF (0xD4 - MX3FB_REG_OFFSET) 50#define SDC_VER_CONF (0xD4 - MX3FB_REG_OFFSET)
51#define SDC_SHARP_CONF_1 (0xD8 - MX3FB_REG_OFFSET) 51#define SDC_SHARP_CONF_1 (0xD8 - MX3FB_REG_OFFSET)
52#define SDC_SHARP_CONF_2 (0xDC - MX3FB_REG_OFFSET) 52#define SDC_SHARP_CONF_2 (0xDC - MX3FB_REG_OFFSET)
53 53
54/* Register bits */ 54/* Register bits */
55#define SDC_COM_TFT_COLOR 0x00000001UL 55#define SDC_COM_TFT_COLOR 0x00000001UL
56#define SDC_COM_FG_EN 0x00000010UL 56#define SDC_COM_FG_EN 0x00000010UL
57#define SDC_COM_GWSEL 0x00000020UL 57#define SDC_COM_GWSEL 0x00000020UL
58#define SDC_COM_GLB_A 0x00000040UL 58#define SDC_COM_GLB_A 0x00000040UL
59#define SDC_COM_KEY_COLOR_G 0x00000080UL 59#define SDC_COM_KEY_COLOR_G 0x00000080UL
60#define SDC_COM_BG_EN 0x00000200UL 60#define SDC_COM_BG_EN 0x00000200UL
61#define SDC_COM_SHARP 0x00001000UL 61#define SDC_COM_SHARP 0x00001000UL
62 62
63#define SDC_V_SYNC_WIDTH_L 0x00000001UL 63#define SDC_V_SYNC_WIDTH_L 0x00000001UL
64 64
65/* Display Interface registers */ 65/* Display Interface registers */
66#define DI_DISP_IF_CONF (0x0124 - MX3FB_REG_OFFSET) 66#define DI_DISP_IF_CONF (0x0124 - MX3FB_REG_OFFSET)
67#define DI_DISP_SIG_POL (0x0128 - MX3FB_REG_OFFSET) 67#define DI_DISP_SIG_POL (0x0128 - MX3FB_REG_OFFSET)
68#define DI_SER_DISP1_CONF (0x012C - MX3FB_REG_OFFSET) 68#define DI_SER_DISP1_CONF (0x012C - MX3FB_REG_OFFSET)
69#define DI_SER_DISP2_CONF (0x0130 - MX3FB_REG_OFFSET) 69#define DI_SER_DISP2_CONF (0x0130 - MX3FB_REG_OFFSET)
70#define DI_HSP_CLK_PER (0x0134 - MX3FB_REG_OFFSET) 70#define DI_HSP_CLK_PER (0x0134 - MX3FB_REG_OFFSET)
71#define DI_DISP0_TIME_CONF_1 (0x0138 - MX3FB_REG_OFFSET) 71#define DI_DISP0_TIME_CONF_1 (0x0138 - MX3FB_REG_OFFSET)
72#define DI_DISP0_TIME_CONF_2 (0x013C - MX3FB_REG_OFFSET) 72#define DI_DISP0_TIME_CONF_2 (0x013C - MX3FB_REG_OFFSET)
73#define DI_DISP0_TIME_CONF_3 (0x0140 - MX3FB_REG_OFFSET) 73#define DI_DISP0_TIME_CONF_3 (0x0140 - MX3FB_REG_OFFSET)
74#define DI_DISP1_TIME_CONF_1 (0x0144 - MX3FB_REG_OFFSET) 74#define DI_DISP1_TIME_CONF_1 (0x0144 - MX3FB_REG_OFFSET)
75#define DI_DISP1_TIME_CONF_2 (0x0148 - MX3FB_REG_OFFSET) 75#define DI_DISP1_TIME_CONF_2 (0x0148 - MX3FB_REG_OFFSET)
76#define DI_DISP1_TIME_CONF_3 (0x014C - MX3FB_REG_OFFSET) 76#define DI_DISP1_TIME_CONF_3 (0x014C - MX3FB_REG_OFFSET)
77#define DI_DISP2_TIME_CONF_1 (0x0150 - MX3FB_REG_OFFSET) 77#define DI_DISP2_TIME_CONF_1 (0x0150 - MX3FB_REG_OFFSET)
78#define DI_DISP2_TIME_CONF_2 (0x0154 - MX3FB_REG_OFFSET) 78#define DI_DISP2_TIME_CONF_2 (0x0154 - MX3FB_REG_OFFSET)
79#define DI_DISP2_TIME_CONF_3 (0x0158 - MX3FB_REG_OFFSET) 79#define DI_DISP2_TIME_CONF_3 (0x0158 - MX3FB_REG_OFFSET)
80#define DI_DISP3_TIME_CONF (0x015C - MX3FB_REG_OFFSET) 80#define DI_DISP3_TIME_CONF (0x015C - MX3FB_REG_OFFSET)
81#define DI_DISP0_DB0_MAP (0x0160 - MX3FB_REG_OFFSET) 81#define DI_DISP0_DB0_MAP (0x0160 - MX3FB_REG_OFFSET)
82#define DI_DISP0_DB1_MAP (0x0164 - MX3FB_REG_OFFSET) 82#define DI_DISP0_DB1_MAP (0x0164 - MX3FB_REG_OFFSET)
83#define DI_DISP0_DB2_MAP (0x0168 - MX3FB_REG_OFFSET) 83#define DI_DISP0_DB2_MAP (0x0168 - MX3FB_REG_OFFSET)
84#define DI_DISP0_CB0_MAP (0x016C - MX3FB_REG_OFFSET) 84#define DI_DISP0_CB0_MAP (0x016C - MX3FB_REG_OFFSET)
85#define DI_DISP0_CB1_MAP (0x0170 - MX3FB_REG_OFFSET) 85#define DI_DISP0_CB1_MAP (0x0170 - MX3FB_REG_OFFSET)
86#define DI_DISP0_CB2_MAP (0x0174 - MX3FB_REG_OFFSET) 86#define DI_DISP0_CB2_MAP (0x0174 - MX3FB_REG_OFFSET)
87#define DI_DISP1_DB0_MAP (0x0178 - MX3FB_REG_OFFSET) 87#define DI_DISP1_DB0_MAP (0x0178 - MX3FB_REG_OFFSET)
88#define DI_DISP1_DB1_MAP (0x017C - MX3FB_REG_OFFSET) 88#define DI_DISP1_DB1_MAP (0x017C - MX3FB_REG_OFFSET)
89#define DI_DISP1_DB2_MAP (0x0180 - MX3FB_REG_OFFSET) 89#define DI_DISP1_DB2_MAP (0x0180 - MX3FB_REG_OFFSET)
90#define DI_DISP1_CB0_MAP (0x0184 - MX3FB_REG_OFFSET) 90#define DI_DISP1_CB0_MAP (0x0184 - MX3FB_REG_OFFSET)
91#define DI_DISP1_CB1_MAP (0x0188 - MX3FB_REG_OFFSET) 91#define DI_DISP1_CB1_MAP (0x0188 - MX3FB_REG_OFFSET)
92#define DI_DISP1_CB2_MAP (0x018C - MX3FB_REG_OFFSET) 92#define DI_DISP1_CB2_MAP (0x018C - MX3FB_REG_OFFSET)
93#define DI_DISP2_DB0_MAP (0x0190 - MX3FB_REG_OFFSET) 93#define DI_DISP2_DB0_MAP (0x0190 - MX3FB_REG_OFFSET)
94#define DI_DISP2_DB1_MAP (0x0194 - MX3FB_REG_OFFSET) 94#define DI_DISP2_DB1_MAP (0x0194 - MX3FB_REG_OFFSET)
95#define DI_DISP2_DB2_MAP (0x0198 - MX3FB_REG_OFFSET) 95#define DI_DISP2_DB2_MAP (0x0198 - MX3FB_REG_OFFSET)
96#define DI_DISP2_CB0_MAP (0x019C - MX3FB_REG_OFFSET) 96#define DI_DISP2_CB0_MAP (0x019C - MX3FB_REG_OFFSET)
97#define DI_DISP2_CB1_MAP (0x01A0 - MX3FB_REG_OFFSET) 97#define DI_DISP2_CB1_MAP (0x01A0 - MX3FB_REG_OFFSET)
98#define DI_DISP2_CB2_MAP (0x01A4 - MX3FB_REG_OFFSET) 98#define DI_DISP2_CB2_MAP (0x01A4 - MX3FB_REG_OFFSET)
99#define DI_DISP3_B0_MAP (0x01A8 - MX3FB_REG_OFFSET) 99#define DI_DISP3_B0_MAP (0x01A8 - MX3FB_REG_OFFSET)
100#define DI_DISP3_B1_MAP (0x01AC - MX3FB_REG_OFFSET) 100#define DI_DISP3_B1_MAP (0x01AC - MX3FB_REG_OFFSET)
101#define DI_DISP3_B2_MAP (0x01B0 - MX3FB_REG_OFFSET) 101#define DI_DISP3_B2_MAP (0x01B0 - MX3FB_REG_OFFSET)
102#define DI_DISP_ACC_CC (0x01B4 - MX3FB_REG_OFFSET) 102#define DI_DISP_ACC_CC (0x01B4 - MX3FB_REG_OFFSET)
103#define DI_DISP_LLA_CONF (0x01B8 - MX3FB_REG_OFFSET) 103#define DI_DISP_LLA_CONF (0x01B8 - MX3FB_REG_OFFSET)
104#define DI_DISP_LLA_DATA (0x01BC - MX3FB_REG_OFFSET) 104#define DI_DISP_LLA_DATA (0x01BC - MX3FB_REG_OFFSET)
105 105
106/* DI_DISP_SIG_POL bits */ 106/* DI_DISP_SIG_POL bits */
107#define DI_D3_VSYNC_POL_SHIFT 28 107#define DI_D3_VSYNC_POL_SHIFT 28
108#define DI_D3_HSYNC_POL_SHIFT 27 108#define DI_D3_HSYNC_POL_SHIFT 27
109#define DI_D3_DRDY_SHARP_POL_SHIFT 26 109#define DI_D3_DRDY_SHARP_POL_SHIFT 26
110#define DI_D3_CLK_POL_SHIFT 25 110#define DI_D3_CLK_POL_SHIFT 25
111#define DI_D3_DATA_POL_SHIFT 24 111#define DI_D3_DATA_POL_SHIFT 24
112 112
113/* DI_DISP_IF_CONF bits */ 113/* DI_DISP_IF_CONF bits */
114#define DI_D3_CLK_IDLE_SHIFT 26 114#define DI_D3_CLK_IDLE_SHIFT 26
115#define DI_D3_CLK_SEL_SHIFT 25 115#define DI_D3_CLK_SEL_SHIFT 25
116#define DI_D3_DATAMSK_SHIFT 24 116#define DI_D3_DATAMSK_SHIFT 24
117 117
118enum ipu_panel { 118enum ipu_panel {
119 IPU_PANEL_SHARP_TFT, 119 IPU_PANEL_SHARP_TFT,
120 IPU_PANEL_TFT, 120 IPU_PANEL_TFT,
121}; 121};
122 122
123struct ipu_di_signal_cfg { 123struct ipu_di_signal_cfg {
124 unsigned datamask_en:1; 124 unsigned datamask_en:1;
125 unsigned clksel_en:1; 125 unsigned clksel_en:1;
126 unsigned clkidle_en:1; 126 unsigned clkidle_en:1;
127 unsigned data_pol:1; /* true = inverted */ 127 unsigned data_pol:1; /* true = inverted */
128 unsigned clk_pol:1; /* true = rising edge */ 128 unsigned clk_pol:1; /* true = rising edge */
129 unsigned enable_pol:1; 129 unsigned enable_pol:1;
130 unsigned Hsync_pol:1; /* true = active high */ 130 unsigned Hsync_pol:1; /* true = active high */
131 unsigned Vsync_pol:1; 131 unsigned Vsync_pol:1;
132}; 132};
133 133
134static const struct fb_videomode mx3fb_modedb[] = { 134static const struct fb_videomode mx3fb_modedb[] = {
135 { 135 {
136 /* 240x320 @ 60 Hz */ 136 /* 240x320 @ 60 Hz */
137 .name = "Sharp-QVGA", 137 .name = "Sharp-QVGA",
138 .refresh = 60, 138 .refresh = 60,
139 .xres = 240, 139 .xres = 240,
140 .yres = 320, 140 .yres = 320,
141 .pixclock = 185925, 141 .pixclock = 185925,
142 .left_margin = 9, 142 .left_margin = 9,
143 .right_margin = 16, 143 .right_margin = 16,
144 .upper_margin = 7, 144 .upper_margin = 7,
145 .lower_margin = 9, 145 .lower_margin = 9,
146 .hsync_len = 1, 146 .hsync_len = 1,
147 .vsync_len = 1, 147 .vsync_len = 1,
148 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | 148 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
149 FB_SYNC_CLK_INVERT | FB_SYNC_DATA_INVERT | 149 FB_SYNC_CLK_INVERT | FB_SYNC_DATA_INVERT |
150 FB_SYNC_CLK_IDLE_EN, 150 FB_SYNC_CLK_IDLE_EN,
151 .vmode = FB_VMODE_NONINTERLACED, 151 .vmode = FB_VMODE_NONINTERLACED,
152 .flag = 0, 152 .flag = 0,
153 }, { 153 }, {
154 /* 240x33 @ 60 Hz */ 154 /* 240x33 @ 60 Hz */
155 .name = "Sharp-CLI", 155 .name = "Sharp-CLI",
156 .refresh = 60, 156 .refresh = 60,
157 .xres = 240, 157 .xres = 240,
158 .yres = 33, 158 .yres = 33,
159 .pixclock = 185925, 159 .pixclock = 185925,
160 .left_margin = 9, 160 .left_margin = 9,
161 .right_margin = 16, 161 .right_margin = 16,
162 .upper_margin = 7, 162 .upper_margin = 7,
163 .lower_margin = 9 + 287, 163 .lower_margin = 9 + 287,
164 .hsync_len = 1, 164 .hsync_len = 1,
165 .vsync_len = 1, 165 .vsync_len = 1,
166 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | 166 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
167 FB_SYNC_CLK_INVERT | FB_SYNC_DATA_INVERT | 167 FB_SYNC_CLK_INVERT | FB_SYNC_DATA_INVERT |
168 FB_SYNC_CLK_IDLE_EN, 168 FB_SYNC_CLK_IDLE_EN,
169 .vmode = FB_VMODE_NONINTERLACED, 169 .vmode = FB_VMODE_NONINTERLACED,
170 .flag = 0, 170 .flag = 0,
171 }, { 171 }, {
172 /* 640x480 @ 60 Hz */ 172 /* 640x480 @ 60 Hz */
173 .name = "NEC-VGA", 173 .name = "NEC-VGA",
174 .refresh = 60, 174 .refresh = 60,
175 .xres = 640, 175 .xres = 640,
176 .yres = 480, 176 .yres = 480,
177 .pixclock = 38255, 177 .pixclock = 38255,
178 .left_margin = 144, 178 .left_margin = 144,
179 .right_margin = 0, 179 .right_margin = 0,
180 .upper_margin = 34, 180 .upper_margin = 34,
181 .lower_margin = 40, 181 .lower_margin = 40,
182 .hsync_len = 1, 182 .hsync_len = 1,
183 .vsync_len = 1, 183 .vsync_len = 1,
184 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH, 184 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
185 .vmode = FB_VMODE_NONINTERLACED, 185 .vmode = FB_VMODE_NONINTERLACED,
186 .flag = 0, 186 .flag = 0,
187 }, { 187 }, {
188 /* NTSC TV output */ 188 /* NTSC TV output */
189 .name = "TV-NTSC", 189 .name = "TV-NTSC",
190 .refresh = 60, 190 .refresh = 60,
191 .xres = 640, 191 .xres = 640,
192 .yres = 480, 192 .yres = 480,
193 .pixclock = 37538, 193 .pixclock = 37538,
194 .left_margin = 38, 194 .left_margin = 38,
195 .right_margin = 858 - 640 - 38 - 3, 195 .right_margin = 858 - 640 - 38 - 3,
196 .upper_margin = 36, 196 .upper_margin = 36,
197 .lower_margin = 518 - 480 - 36 - 1, 197 .lower_margin = 518 - 480 - 36 - 1,
198 .hsync_len = 3, 198 .hsync_len = 3,
199 .vsync_len = 1, 199 .vsync_len = 1,
200 .sync = 0, 200 .sync = 0,
201 .vmode = FB_VMODE_NONINTERLACED, 201 .vmode = FB_VMODE_NONINTERLACED,
202 .flag = 0, 202 .flag = 0,
203 }, { 203 }, {
204 /* PAL TV output */ 204 /* PAL TV output */
205 .name = "TV-PAL", 205 .name = "TV-PAL",
206 .refresh = 50, 206 .refresh = 50,
207 .xres = 640, 207 .xres = 640,
208 .yres = 480, 208 .yres = 480,
209 .pixclock = 37538, 209 .pixclock = 37538,
210 .left_margin = 38, 210 .left_margin = 38,
211 .right_margin = 960 - 640 - 38 - 32, 211 .right_margin = 960 - 640 - 38 - 32,
212 .upper_margin = 32, 212 .upper_margin = 32,
213 .lower_margin = 555 - 480 - 32 - 3, 213 .lower_margin = 555 - 480 - 32 - 3,
214 .hsync_len = 32, 214 .hsync_len = 32,
215 .vsync_len = 3, 215 .vsync_len = 3,
216 .sync = 0, 216 .sync = 0,
217 .vmode = FB_VMODE_NONINTERLACED, 217 .vmode = FB_VMODE_NONINTERLACED,
218 .flag = 0, 218 .flag = 0,
219 }, { 219 }, {
220 /* TV output VGA mode, 640x480 @ 65 Hz */ 220 /* TV output VGA mode, 640x480 @ 65 Hz */
221 .name = "TV-VGA", 221 .name = "TV-VGA",
222 .refresh = 60, 222 .refresh = 60,
223 .xres = 640, 223 .xres = 640,
224 .yres = 480, 224 .yres = 480,
225 .pixclock = 40574, 225 .pixclock = 40574,
226 .left_margin = 35, 226 .left_margin = 35,
227 .right_margin = 45, 227 .right_margin = 45,
228 .upper_margin = 9, 228 .upper_margin = 9,
229 .lower_margin = 1, 229 .lower_margin = 1,
230 .hsync_len = 46, 230 .hsync_len = 46,
231 .vsync_len = 5, 231 .vsync_len = 5,
232 .sync = 0, 232 .sync = 0,
233 .vmode = FB_VMODE_NONINTERLACED, 233 .vmode = FB_VMODE_NONINTERLACED,
234 .flag = 0, 234 .flag = 0,
235 }, 235 },
236}; 236};
237 237
238struct mx3fb_data { 238struct mx3fb_data {
239 struct fb_info *fbi; 239 struct fb_info *fbi;
240 int backlight_level; 240 int backlight_level;
241 void __iomem *reg_base; 241 void __iomem *reg_base;
242 spinlock_t lock; 242 spinlock_t lock;
243 struct device *dev; 243 struct device *dev;
244 244
245 uint32_t h_start_width; 245 uint32_t h_start_width;
246 uint32_t v_start_width; 246 uint32_t v_start_width;
247}; 247};
248 248
249struct dma_chan_request { 249struct dma_chan_request {
250 struct mx3fb_data *mx3fb; 250 struct mx3fb_data *mx3fb;
251 enum ipu_channel id; 251 enum ipu_channel id;
252}; 252};
253 253
254/* MX3 specific framebuffer information. */ 254/* MX3 specific framebuffer information. */
255struct mx3fb_info { 255struct mx3fb_info {
256 int blank; 256 int blank;
257 enum ipu_channel ipu_ch; 257 enum ipu_channel ipu_ch;
258 uint32_t cur_ipu_buf; 258 uint32_t cur_ipu_buf;
259 259
260 u32 pseudo_palette[16]; 260 u32 pseudo_palette[16];
261 261
262 struct completion flip_cmpl; 262 struct completion flip_cmpl;
263 struct mutex mutex; /* Protects fb-ops */ 263 struct mutex mutex; /* Protects fb-ops */
264 struct mx3fb_data *mx3fb; 264 struct mx3fb_data *mx3fb;
265 struct idmac_channel *idmac_channel; 265 struct idmac_channel *idmac_channel;
266 struct dma_async_tx_descriptor *txd; 266 struct dma_async_tx_descriptor *txd;
267 dma_cookie_t cookie; 267 dma_cookie_t cookie;
268 struct scatterlist sg[2]; 268 struct scatterlist sg[2];
269 269
270 u32 sync; /* preserve var->sync flags */ 270 u32 sync; /* preserve var->sync flags */
271}; 271};
272 272
273static void mx3fb_dma_done(void *); 273static void mx3fb_dma_done(void *);
@@ -278,389 +278,389 @@ static unsigned long default_bpp = 16;
278 278
279static u32 mx3fb_read_reg(struct mx3fb_data *mx3fb, unsigned long reg) 279static u32 mx3fb_read_reg(struct mx3fb_data *mx3fb, unsigned long reg)
280{ 280{
281 return __raw_readl(mx3fb->reg_base + reg); 281 return __raw_readl(mx3fb->reg_base + reg);
282} 282}
283 283
284static void mx3fb_write_reg(struct mx3fb_data *mx3fb, u32 value, unsigned long reg) 284static void mx3fb_write_reg(struct mx3fb_data *mx3fb, u32 value, unsigned long reg)
285{ 285{
286 __raw_writel(value, mx3fb->reg_base + reg); 286 __raw_writel(value, mx3fb->reg_base + reg);
287} 287}
288 288
289static const uint32_t di_mappings[] = { 289static const uint32_t di_mappings[] = {
290 0x1600AAAA, 0x00E05555, 0x00070000, 3, /* RGB888 */ 290 0x1600AAAA, 0x00E05555, 0x00070000, 3, /* RGB888 */
291 0x0005000F, 0x000B000F, 0x0011000F, 1, /* RGB666 */ 291 0x0005000F, 0x000B000F, 0x0011000F, 1, /* RGB666 */
292 0x0011000F, 0x000B000F, 0x0005000F, 1, /* BGR666 */ 292 0x0011000F, 0x000B000F, 0x0005000F, 1, /* BGR666 */
293 0x0004003F, 0x000A000F, 0x000F003F, 1 /* RGB565 */ 293 0x0004003F, 0x000A000F, 0x000F003F, 1 /* RGB565 */
294}; 294};
295 295
296static void sdc_fb_init(struct mx3fb_info *fbi) 296static void sdc_fb_init(struct mx3fb_info *fbi)
297{ 297{
298 struct mx3fb_data *mx3fb = fbi->mx3fb; 298 struct mx3fb_data *mx3fb = fbi->mx3fb;
299 uint32_t reg; 299 uint32_t reg;
300 300
301 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF); 301 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
302 302
303 mx3fb_write_reg(mx3fb, reg | SDC_COM_BG_EN, SDC_COM_CONF); 303 mx3fb_write_reg(mx3fb, reg | SDC_COM_BG_EN, SDC_COM_CONF);
304} 304}
305 305
306/* Returns enabled flag before uninit */ 306/* Returns enabled flag before uninit */
307static uint32_t sdc_fb_uninit(struct mx3fb_info *fbi) 307static uint32_t sdc_fb_uninit(struct mx3fb_info *fbi)
308{ 308{
309 struct mx3fb_data *mx3fb = fbi->mx3fb; 309 struct mx3fb_data *mx3fb = fbi->mx3fb;
310 uint32_t reg; 310 uint32_t reg;
311 311
312 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF); 312 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
313 313
314 mx3fb_write_reg(mx3fb, reg & ~SDC_COM_BG_EN, SDC_COM_CONF); 314 mx3fb_write_reg(mx3fb, reg & ~SDC_COM_BG_EN, SDC_COM_CONF);
315 315
316 return reg & SDC_COM_BG_EN; 316 return reg & SDC_COM_BG_EN;
317} 317}
318 318
319static void sdc_enable_channel(struct mx3fb_info *mx3_fbi) 319static void sdc_enable_channel(struct mx3fb_info *mx3_fbi)
320{ 320{
321 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb; 321 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
322 struct idmac_channel *ichan = mx3_fbi->idmac_channel; 322 struct idmac_channel *ichan = mx3_fbi->idmac_channel;
323 struct dma_chan *dma_chan = &ichan->dma_chan; 323 struct dma_chan *dma_chan = &ichan->dma_chan;
324 unsigned long flags; 324 unsigned long flags;
325 dma_cookie_t cookie; 325 dma_cookie_t cookie;
326 326
327 dev_dbg(mx3fb->dev, "mx3fbi %p, desc %p, sg %p\n", mx3_fbi, 327 dev_dbg(mx3fb->dev, "mx3fbi %p, desc %p, sg %p\n", mx3_fbi,
328 to_tx_desc(mx3_fbi->txd), to_tx_desc(mx3_fbi->txd)->sg); 328 to_tx_desc(mx3_fbi->txd), to_tx_desc(mx3_fbi->txd)->sg);
329 329
330 /* This enables the channel */ 330 /* This enables the channel */
331 if (mx3_fbi->cookie < 0) { 331 if (mx3_fbi->cookie < 0) {
332 mx3_fbi->txd = dma_chan->device->device_prep_slave_sg(dma_chan, 332 mx3_fbi->txd = dma_chan->device->device_prep_slave_sg(dma_chan,
333 &mx3_fbi->sg[0], 1, DMA_TO_DEVICE, DMA_PREP_INTERRUPT); 333 &mx3_fbi->sg[0], 1, DMA_TO_DEVICE, DMA_PREP_INTERRUPT);
334 if (!mx3_fbi->txd) { 334 if (!mx3_fbi->txd) {
335 dev_err(mx3fb->dev, "Cannot allocate descriptor on %d\n", 335 dev_err(mx3fb->dev, "Cannot allocate descriptor on %d\n",
336 dma_chan->chan_id); 336 dma_chan->chan_id);
337 return; 337 return;
338 } 338 }
339 339
340 mx3_fbi->txd->callback_param = mx3_fbi->txd; 340 mx3_fbi->txd->callback_param = mx3_fbi->txd;
341 mx3_fbi->txd->callback = mx3fb_dma_done; 341 mx3_fbi->txd->callback = mx3fb_dma_done;
342 342
343 cookie = mx3_fbi->txd->tx_submit(mx3_fbi->txd); 343 cookie = mx3_fbi->txd->tx_submit(mx3_fbi->txd);
344 dev_dbg(mx3fb->dev, "%d: Submit %p #%d [%c]\n", __LINE__, 344 dev_dbg(mx3fb->dev, "%d: Submit %p #%d [%c]\n", __LINE__,
345 mx3_fbi->txd, cookie, list_empty(&ichan->queue) ? '-' : '+'); 345 mx3_fbi->txd, cookie, list_empty(&ichan->queue) ? '-' : '+');
346 } else { 346 } else {
347 if (!mx3_fbi->txd || !mx3_fbi->txd->tx_submit) { 347 if (!mx3_fbi->txd || !mx3_fbi->txd->tx_submit) {
348 dev_err(mx3fb->dev, "Cannot enable channel %d\n", 348 dev_err(mx3fb->dev, "Cannot enable channel %d\n",
349 dma_chan->chan_id); 349 dma_chan->chan_id);
350 return; 350 return;
351 } 351 }
352 352
353 /* Just re-activate the same buffer */ 353 /* Just re-activate the same buffer */
354 dma_async_issue_pending(dma_chan); 354 dma_async_issue_pending(dma_chan);
355 cookie = mx3_fbi->cookie; 355 cookie = mx3_fbi->cookie;
356 dev_dbg(mx3fb->dev, "%d: Re-submit %p #%d [%c]\n", __LINE__, 356 dev_dbg(mx3fb->dev, "%d: Re-submit %p #%d [%c]\n", __LINE__,
357 mx3_fbi->txd, cookie, list_empty(&ichan->queue) ? '-' : '+'); 357 mx3_fbi->txd, cookie, list_empty(&ichan->queue) ? '-' : '+');
358 } 358 }
359 359
360 if (cookie >= 0) { 360 if (cookie >= 0) {
361 spin_lock_irqsave(&mx3fb->lock, flags); 361 spin_lock_irqsave(&mx3fb->lock, flags);
362 sdc_fb_init(mx3_fbi); 362 sdc_fb_init(mx3_fbi);
363 mx3_fbi->cookie = cookie; 363 mx3_fbi->cookie = cookie;
364 spin_unlock_irqrestore(&mx3fb->lock, flags); 364 spin_unlock_irqrestore(&mx3fb->lock, flags);
365 } 365 }
366 366
367 /* 367 /*
368 * Attention! Without this msleep the channel keeps generating 368 * Attention! Without this msleep the channel keeps generating
369 * interrupts. Next sdc_set_brightness() is going to be called 369 * interrupts. Next sdc_set_brightness() is going to be called
370 * from mx3fb_blank(). 370 * from mx3fb_blank().
371 */ 371 */
372 msleep(2); 372 msleep(2);
373} 373}
374 374
375static void sdc_disable_channel(struct mx3fb_info *mx3_fbi) 375static void sdc_disable_channel(struct mx3fb_info *mx3_fbi)
376{ 376{
377 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb; 377 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
378 uint32_t enabled; 378 uint32_t enabled;
379 unsigned long flags; 379 unsigned long flags;
380 380
381 spin_lock_irqsave(&mx3fb->lock, flags); 381 spin_lock_irqsave(&mx3fb->lock, flags);
382 382
383 enabled = sdc_fb_uninit(mx3_fbi); 383 enabled = sdc_fb_uninit(mx3_fbi);
384 384
385 spin_unlock_irqrestore(&mx3fb->lock, flags); 385 spin_unlock_irqrestore(&mx3fb->lock, flags);
386 386
387 mx3_fbi->txd->chan->device->device_terminate_all(mx3_fbi->txd->chan); 387 mx3_fbi->txd->chan->device->device_terminate_all(mx3_fbi->txd->chan);
388 mx3_fbi->txd = NULL; 388 mx3_fbi->txd = NULL;
389 mx3_fbi->cookie = -EINVAL; 389 mx3_fbi->cookie = -EINVAL;
390} 390}
391 391
392/** 392/**
393 * sdc_set_window_pos() - set window position of the respective plane. 393 * sdc_set_window_pos() - set window position of the respective plane.
394 * @mx3fb: mx3fb context. 394 * @mx3fb: mx3fb context.
395 * @channel: IPU DMAC channel ID. 395 * @channel: IPU DMAC channel ID.
396 * @x_pos: X coordinate relative to the top left corner to place window at. 396 * @x_pos: X coordinate relative to the top left corner to place window at.
397 * @y_pos: Y coordinate relative to the top left corner to place window at. 397 * @y_pos: Y coordinate relative to the top left corner to place window at.
398 * @return: 0 on success or negative error code on failure. 398 * @return: 0 on success or negative error code on failure.
399 */ 399 */
400static int sdc_set_window_pos(struct mx3fb_data *mx3fb, enum ipu_channel channel, 400static int sdc_set_window_pos(struct mx3fb_data *mx3fb, enum ipu_channel channel,
401 int16_t x_pos, int16_t y_pos) 401 int16_t x_pos, int16_t y_pos)
402{ 402{
403 x_pos += mx3fb->h_start_width; 403 x_pos += mx3fb->h_start_width;
404 y_pos += mx3fb->v_start_width; 404 y_pos += mx3fb->v_start_width;
405 405
406 if (channel != IDMAC_SDC_0) 406 if (channel != IDMAC_SDC_0)
407 return -EINVAL; 407 return -EINVAL;
408 408
409 mx3fb_write_reg(mx3fb, (x_pos << 16) | y_pos, SDC_BG_POS); 409 mx3fb_write_reg(mx3fb, (x_pos << 16) | y_pos, SDC_BG_POS);
410 return 0; 410 return 0;
411} 411}
412 412
413/** 413/**
414 * sdc_init_panel() - initialize a synchronous LCD panel. 414 * sdc_init_panel() - initialize a synchronous LCD panel.
415 * @mx3fb: mx3fb context. 415 * @mx3fb: mx3fb context.
416 * @panel: panel type. 416 * @panel: panel type.
417 * @pixel_clk: desired pixel clock frequency in Hz. 417 * @pixel_clk: desired pixel clock frequency in Hz.
418 * @width: width of panel in pixels. 418 * @width: width of panel in pixels.
419 * @height: height of panel in pixels. 419 * @height: height of panel in pixels.
420 * @pixel_fmt: pixel format of buffer as FOURCC ASCII code. 420 * @pixel_fmt: pixel format of buffer as FOURCC ASCII code.
421 * @h_start_width: number of pixel clocks between the HSYNC signal pulse 421 * @h_start_width: number of pixel clocks between the HSYNC signal pulse
422 * and the start of valid data. 422 * and the start of valid data.
423 * @h_sync_width: width of the HSYNC signal in units of pixel clocks. 423 * @h_sync_width: width of the HSYNC signal in units of pixel clocks.
424 * @h_end_width: number of pixel clocks between the end of valid data 424 * @h_end_width: number of pixel clocks between the end of valid data
425 * and the HSYNC signal for next line. 425 * and the HSYNC signal for next line.
426 * @v_start_width: number of lines between the VSYNC signal pulse and the 426 * @v_start_width: number of lines between the VSYNC signal pulse and the
427 * start of valid data. 427 * start of valid data.
428 * @v_sync_width: width of the VSYNC signal in units of lines 428 * @v_sync_width: width of the VSYNC signal in units of lines
429 * @v_end_width: number of lines between the end of valid data and the 429 * @v_end_width: number of lines between the end of valid data and the
430 * VSYNC signal for next frame. 430 * VSYNC signal for next frame.
431 * @sig: bitfield of signal polarities for LCD interface. 431 * @sig: bitfield of signal polarities for LCD interface.
432 * @return: 0 on success or negative error code on failure. 432 * @return: 0 on success or negative error code on failure.
433 */ 433 */
434static int sdc_init_panel(struct mx3fb_data *mx3fb, enum ipu_panel panel, 434static int sdc_init_panel(struct mx3fb_data *mx3fb, enum ipu_panel panel,
435 uint32_t pixel_clk, 435 uint32_t pixel_clk,
436 uint16_t width, uint16_t height, 436 uint16_t width, uint16_t height,
437 enum pixel_fmt pixel_fmt, 437 enum pixel_fmt pixel_fmt,
438 uint16_t h_start_width, uint16_t h_sync_width, 438 uint16_t h_start_width, uint16_t h_sync_width,
439 uint16_t h_end_width, uint16_t v_start_width, 439 uint16_t h_end_width, uint16_t v_start_width,
440 uint16_t v_sync_width, uint16_t v_end_width, 440 uint16_t v_sync_width, uint16_t v_end_width,
441 struct ipu_di_signal_cfg sig) 441 struct ipu_di_signal_cfg sig)
442{ 442{
443 unsigned long lock_flags; 443 unsigned long lock_flags;
444 uint32_t reg; 444 uint32_t reg;
445 uint32_t old_conf; 445 uint32_t old_conf;
446 uint32_t div; 446 uint32_t div;
447 struct clk *ipu_clk; 447 struct clk *ipu_clk;
448 448
449 dev_dbg(mx3fb->dev, "panel size = %d x %d", width, height); 449 dev_dbg(mx3fb->dev, "panel size = %d x %d", width, height);
450 450
451 if (v_sync_width == 0 || h_sync_width == 0) 451 if (v_sync_width == 0 || h_sync_width == 0)
452 return -EINVAL; 452 return -EINVAL;
453 453
454 /* Init panel size and blanking periods */ 454 /* Init panel size and blanking periods */
455 reg = ((uint32_t) (h_sync_width - 1) << 26) | 455 reg = ((uint32_t) (h_sync_width - 1) << 26) |
456 ((uint32_t) (width + h_start_width + h_end_width - 1) << 16); 456 ((uint32_t) (width + h_start_width + h_end_width - 1) << 16);
457 mx3fb_write_reg(mx3fb, reg, SDC_HOR_CONF); 457 mx3fb_write_reg(mx3fb, reg, SDC_HOR_CONF);
458 458
459#ifdef DEBUG 459#ifdef DEBUG
460 printk(KERN_CONT " hor_conf %x,", reg); 460 printk(KERN_CONT " hor_conf %x,", reg);
461#endif 461#endif
462 462
463 reg = ((uint32_t) (v_sync_width - 1) << 26) | SDC_V_SYNC_WIDTH_L | 463 reg = ((uint32_t) (v_sync_width - 1) << 26) | SDC_V_SYNC_WIDTH_L |
464 ((uint32_t) (height + v_start_width + v_end_width - 1) << 16); 464 ((uint32_t) (height + v_start_width + v_end_width - 1) << 16);
465 mx3fb_write_reg(mx3fb, reg, SDC_VER_CONF); 465 mx3fb_write_reg(mx3fb, reg, SDC_VER_CONF);
466 466
467#ifdef DEBUG 467#ifdef DEBUG
468 printk(KERN_CONT " ver_conf %x\n", reg); 468 printk(KERN_CONT " ver_conf %x\n", reg);
469#endif 469#endif
470 470
471 mx3fb->h_start_width = h_start_width; 471 mx3fb->h_start_width = h_start_width;
472 mx3fb->v_start_width = v_start_width; 472 mx3fb->v_start_width = v_start_width;
473 473
474 switch (panel) { 474 switch (panel) {
475 case IPU_PANEL_SHARP_TFT: 475 case IPU_PANEL_SHARP_TFT:
476 mx3fb_write_reg(mx3fb, 0x00FD0102L, SDC_SHARP_CONF_1); 476 mx3fb_write_reg(mx3fb, 0x00FD0102L, SDC_SHARP_CONF_1);
477 mx3fb_write_reg(mx3fb, 0x00F500F4L, SDC_SHARP_CONF_2); 477 mx3fb_write_reg(mx3fb, 0x00F500F4L, SDC_SHARP_CONF_2);
478 mx3fb_write_reg(mx3fb, SDC_COM_SHARP | SDC_COM_TFT_COLOR, SDC_COM_CONF); 478 mx3fb_write_reg(mx3fb, SDC_COM_SHARP | SDC_COM_TFT_COLOR, SDC_COM_CONF);
479 break; 479 break;
480 case IPU_PANEL_TFT: 480 case IPU_PANEL_TFT:
481 mx3fb_write_reg(mx3fb, SDC_COM_TFT_COLOR, SDC_COM_CONF); 481 mx3fb_write_reg(mx3fb, SDC_COM_TFT_COLOR, SDC_COM_CONF);
482 break; 482 break;
483 default: 483 default:
484 return -EINVAL; 484 return -EINVAL;
485 } 485 }
486 486
487 /* Init clocking */ 487 /* Init clocking */
488 488
489 /* 489 /*
490 * Calculate divider: fractional part is 4 bits so simply multiple by 490 * Calculate divider: fractional part is 4 bits so simply multiple by
491 * 24 to get fractional part, as long as we stay under ~250MHz and on 491 * 2^4 to get fractional part, as long as we stay under ~250MHz and on
492 * i.MX31 it (HSP_CLK) is <= 178MHz. Currently 128.267MHz 492 * i.MX31 it (HSP_CLK) is <= 178MHz. Currently 128.267MHz
493 */ 493 */
494 dev_dbg(mx3fb->dev, "pixel clk = %d\n", pixel_clk); 494 dev_dbg(mx3fb->dev, "pixel clk = %d\n", pixel_clk);
495 495
496 ipu_clk = clk_get(mx3fb->dev, "ipu_clk"); 496 ipu_clk = clk_get(mx3fb->dev, NULL);
497 div = clk_get_rate(ipu_clk) * 16 / pixel_clk; 497 div = clk_get_rate(ipu_clk) * 16 / pixel_clk;
498 clk_put(ipu_clk); 498 clk_put(ipu_clk);
499 499
500 if (div < 0x40) { /* Divider less than 4 */ 500 if (div < 0x40) { /* Divider less than 4 */
501 dev_dbg(mx3fb->dev, 501 dev_dbg(mx3fb->dev,
502 "InitPanel() - Pixel clock divider less than 4\n"); 502 "InitPanel() - Pixel clock divider less than 4\n");
503 div = 0x40; 503 div = 0x40;
504 } 504 }
505 505
506 spin_lock_irqsave(&mx3fb->lock, lock_flags); 506 spin_lock_irqsave(&mx3fb->lock, lock_flags);
507 507
508 /* 508 /*
509 * DISP3_IF_CLK_DOWN_WR is half the divider value and 2 fraction bits 509 * DISP3_IF_CLK_DOWN_WR is half the divider value and 2 fraction bits
510 * fewer. Subtract 1 extra from DISP3_IF_CLK_DOWN_WR based on timing 510 * fewer. Subtract 1 extra from DISP3_IF_CLK_DOWN_WR based on timing
511 * debug. DISP3_IF_CLK_UP_WR is 0 511 * debug. DISP3_IF_CLK_UP_WR is 0
512 */ 512 */
513 mx3fb_write_reg(mx3fb, (((div / 8) - 1) << 22) | div, DI_DISP3_TIME_CONF); 513 mx3fb_write_reg(mx3fb, (((div / 8) - 1) << 22) | div, DI_DISP3_TIME_CONF);
514 514
515 /* DI settings */ 515 /* DI settings */
516 old_conf = mx3fb_read_reg(mx3fb, DI_DISP_IF_CONF) & 0x78FFFFFF; 516 old_conf = mx3fb_read_reg(mx3fb, DI_DISP_IF_CONF) & 0x78FFFFFF;
517 old_conf |= sig.datamask_en << DI_D3_DATAMSK_SHIFT | 517 old_conf |= sig.datamask_en << DI_D3_DATAMSK_SHIFT |
518 sig.clksel_en << DI_D3_CLK_SEL_SHIFT | 518 sig.clksel_en << DI_D3_CLK_SEL_SHIFT |
519 sig.clkidle_en << DI_D3_CLK_IDLE_SHIFT; 519 sig.clkidle_en << DI_D3_CLK_IDLE_SHIFT;
520 mx3fb_write_reg(mx3fb, old_conf, DI_DISP_IF_CONF); 520 mx3fb_write_reg(mx3fb, old_conf, DI_DISP_IF_CONF);
521 521
522 old_conf = mx3fb_read_reg(mx3fb, DI_DISP_SIG_POL) & 0xE0FFFFFF; 522 old_conf = mx3fb_read_reg(mx3fb, DI_DISP_SIG_POL) & 0xE0FFFFFF;
523 old_conf |= sig.data_pol << DI_D3_DATA_POL_SHIFT | 523 old_conf |= sig.data_pol << DI_D3_DATA_POL_SHIFT |
524 sig.clk_pol << DI_D3_CLK_POL_SHIFT | 524 sig.clk_pol << DI_D3_CLK_POL_SHIFT |
525 sig.enable_pol << DI_D3_DRDY_SHARP_POL_SHIFT | 525 sig.enable_pol << DI_D3_DRDY_SHARP_POL_SHIFT |
526 sig.Hsync_pol << DI_D3_HSYNC_POL_SHIFT | 526 sig.Hsync_pol << DI_D3_HSYNC_POL_SHIFT |
527 sig.Vsync_pol << DI_D3_VSYNC_POL_SHIFT; 527 sig.Vsync_pol << DI_D3_VSYNC_POL_SHIFT;
528 mx3fb_write_reg(mx3fb, old_conf, DI_DISP_SIG_POL); 528 mx3fb_write_reg(mx3fb, old_conf, DI_DISP_SIG_POL);
529 529
530 switch (pixel_fmt) { 530 switch (pixel_fmt) {
531 case IPU_PIX_FMT_RGB24: 531 case IPU_PIX_FMT_RGB24:
532 mx3fb_write_reg(mx3fb, di_mappings[0], DI_DISP3_B0_MAP); 532 mx3fb_write_reg(mx3fb, di_mappings[0], DI_DISP3_B0_MAP);
533 mx3fb_write_reg(mx3fb, di_mappings[1], DI_DISP3_B1_MAP); 533 mx3fb_write_reg(mx3fb, di_mappings[1], DI_DISP3_B1_MAP);
534 mx3fb_write_reg(mx3fb, di_mappings[2], DI_DISP3_B2_MAP); 534 mx3fb_write_reg(mx3fb, di_mappings[2], DI_DISP3_B2_MAP);
535 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) | 535 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) |
536 ((di_mappings[3] - 1) << 12), DI_DISP_ACC_CC); 536 ((di_mappings[3] - 1) << 12), DI_DISP_ACC_CC);
537 break; 537 break;
538 case IPU_PIX_FMT_RGB666: 538 case IPU_PIX_FMT_RGB666:
539 mx3fb_write_reg(mx3fb, di_mappings[4], DI_DISP3_B0_MAP); 539 mx3fb_write_reg(mx3fb, di_mappings[4], DI_DISP3_B0_MAP);
540 mx3fb_write_reg(mx3fb, di_mappings[5], DI_DISP3_B1_MAP); 540 mx3fb_write_reg(mx3fb, di_mappings[5], DI_DISP3_B1_MAP);
541 mx3fb_write_reg(mx3fb, di_mappings[6], DI_DISP3_B2_MAP); 541 mx3fb_write_reg(mx3fb, di_mappings[6], DI_DISP3_B2_MAP);
542 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) | 542 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) |
543 ((di_mappings[7] - 1) << 12), DI_DISP_ACC_CC); 543 ((di_mappings[7] - 1) << 12), DI_DISP_ACC_CC);
544 break; 544 break;
545 case IPU_PIX_FMT_BGR666: 545 case IPU_PIX_FMT_BGR666:
546 mx3fb_write_reg(mx3fb, di_mappings[8], DI_DISP3_B0_MAP); 546 mx3fb_write_reg(mx3fb, di_mappings[8], DI_DISP3_B0_MAP);
547 mx3fb_write_reg(mx3fb, di_mappings[9], DI_DISP3_B1_MAP); 547 mx3fb_write_reg(mx3fb, di_mappings[9], DI_DISP3_B1_MAP);
548 mx3fb_write_reg(mx3fb, di_mappings[10], DI_DISP3_B2_MAP); 548 mx3fb_write_reg(mx3fb, di_mappings[10], DI_DISP3_B2_MAP);
549 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) | 549 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) |
550 ((di_mappings[11] - 1) << 12), DI_DISP_ACC_CC); 550 ((di_mappings[11] - 1) << 12), DI_DISP_ACC_CC);
551 break; 551 break;
552 default: 552 default:
553 mx3fb_write_reg(mx3fb, di_mappings[12], DI_DISP3_B0_MAP); 553 mx3fb_write_reg(mx3fb, di_mappings[12], DI_DISP3_B0_MAP);
554 mx3fb_write_reg(mx3fb, di_mappings[13], DI_DISP3_B1_MAP); 554 mx3fb_write_reg(mx3fb, di_mappings[13], DI_DISP3_B1_MAP);
555 mx3fb_write_reg(mx3fb, di_mappings[14], DI_DISP3_B2_MAP); 555 mx3fb_write_reg(mx3fb, di_mappings[14], DI_DISP3_B2_MAP);
556 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) | 556 mx3fb_write_reg(mx3fb, mx3fb_read_reg(mx3fb, DI_DISP_ACC_CC) |
557 ((di_mappings[15] - 1) << 12), DI_DISP_ACC_CC); 557 ((di_mappings[15] - 1) << 12), DI_DISP_ACC_CC);
558 break; 558 break;
559 } 559 }
560 560
561 spin_unlock_irqrestore(&mx3fb->lock, lock_flags); 561 spin_unlock_irqrestore(&mx3fb->lock, lock_flags);
562 562
563 dev_dbg(mx3fb->dev, "DI_DISP_IF_CONF = 0x%08X\n", 563 dev_dbg(mx3fb->dev, "DI_DISP_IF_CONF = 0x%08X\n",
564 mx3fb_read_reg(mx3fb, DI_DISP_IF_CONF)); 564 mx3fb_read_reg(mx3fb, DI_DISP_IF_CONF));
565 dev_dbg(mx3fb->dev, "DI_DISP_SIG_POL = 0x%08X\n", 565 dev_dbg(mx3fb->dev, "DI_DISP_SIG_POL = 0x%08X\n",
566 mx3fb_read_reg(mx3fb, DI_DISP_SIG_POL)); 566 mx3fb_read_reg(mx3fb, DI_DISP_SIG_POL));
567 dev_dbg(mx3fb->dev, "DI_DISP3_TIME_CONF = 0x%08X\n", 567 dev_dbg(mx3fb->dev, "DI_DISP3_TIME_CONF = 0x%08X\n",
568 mx3fb_read_reg(mx3fb, DI_DISP3_TIME_CONF)); 568 mx3fb_read_reg(mx3fb, DI_DISP3_TIME_CONF));
569 569
570 return 0; 570 return 0;
571} 571}
572 572
573/** 573/**
574 * sdc_set_color_key() - set the transparent color key for SDC graphic plane. 574 * sdc_set_color_key() - set the transparent color key for SDC graphic plane.
575 * @mx3fb: mx3fb context. 575 * @mx3fb: mx3fb context.
576 * @channel: IPU DMAC channel ID. 576 * @channel: IPU DMAC channel ID.
577 * @enable: boolean to enable or disable color keyl. 577 * @enable: boolean to enable or disable color keyl.
578 * @color_key: 24-bit RGB color to use as transparent color key. 578 * @color_key: 24-bit RGB color to use as transparent color key.
579 * @return: 0 on success or negative error code on failure. 579 * @return: 0 on success or negative error code on failure.
580 */ 580 */
581static int sdc_set_color_key(struct mx3fb_data *mx3fb, enum ipu_channel channel, 581static int sdc_set_color_key(struct mx3fb_data *mx3fb, enum ipu_channel channel,
582 bool enable, uint32_t color_key) 582 bool enable, uint32_t color_key)
583{ 583{
584 uint32_t reg, sdc_conf; 584 uint32_t reg, sdc_conf;
585 unsigned long lock_flags; 585 unsigned long lock_flags;
586 586
587 spin_lock_irqsave(&mx3fb->lock, lock_flags); 587 spin_lock_irqsave(&mx3fb->lock, lock_flags);
588 588
589 sdc_conf = mx3fb_read_reg(mx3fb, SDC_COM_CONF); 589 sdc_conf = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
590 if (channel == IDMAC_SDC_0) 590 if (channel == IDMAC_SDC_0)
591 sdc_conf &= ~SDC_COM_GWSEL; 591 sdc_conf &= ~SDC_COM_GWSEL;
592 else 592 else
593 sdc_conf |= SDC_COM_GWSEL; 593 sdc_conf |= SDC_COM_GWSEL;
594 594
595 if (enable) { 595 if (enable) {
596 reg = mx3fb_read_reg(mx3fb, SDC_GW_CTRL) & 0xFF000000L; 596 reg = mx3fb_read_reg(mx3fb, SDC_GW_CTRL) & 0xFF000000L;
597 mx3fb_write_reg(mx3fb, reg | (color_key & 0x00FFFFFFL), 597 mx3fb_write_reg(mx3fb, reg | (color_key & 0x00FFFFFFL),
598 SDC_GW_CTRL); 598 SDC_GW_CTRL);
599 599
600 sdc_conf |= SDC_COM_KEY_COLOR_G; 600 sdc_conf |= SDC_COM_KEY_COLOR_G;
601 } else { 601 } else {
602 sdc_conf &= ~SDC_COM_KEY_COLOR_G; 602 sdc_conf &= ~SDC_COM_KEY_COLOR_G;
603 } 603 }
604 mx3fb_write_reg(mx3fb, sdc_conf, SDC_COM_CONF); 604 mx3fb_write_reg(mx3fb, sdc_conf, SDC_COM_CONF);
605 605
606 spin_unlock_irqrestore(&mx3fb->lock, lock_flags); 606 spin_unlock_irqrestore(&mx3fb->lock, lock_flags);
607 607
608 return 0; 608 return 0;
609} 609}
610 610
611/** 611/**
612 * sdc_set_global_alpha() - set global alpha blending modes. 612 * sdc_set_global_alpha() - set global alpha blending modes.
613 * @mx3fb: mx3fb context. 613 * @mx3fb: mx3fb context.
614 * @enable: boolean to enable or disable global alpha blending. If disabled, 614 * @enable: boolean to enable or disable global alpha blending. If disabled,
615 * per pixel blending is used. 615 * per pixel blending is used.
616 * @alpha: global alpha value. 616 * @alpha: global alpha value.
617 * @return: 0 on success or negative error code on failure. 617 * @return: 0 on success or negative error code on failure.
618 */ 618 */
619static int sdc_set_global_alpha(struct mx3fb_data *mx3fb, bool enable, uint8_t alpha) 619static int sdc_set_global_alpha(struct mx3fb_data *mx3fb, bool enable, uint8_t alpha)
620{ 620{
621 uint32_t reg; 621 uint32_t reg;
622 unsigned long lock_flags; 622 unsigned long lock_flags;
623 623
624 spin_lock_irqsave(&mx3fb->lock, lock_flags); 624 spin_lock_irqsave(&mx3fb->lock, lock_flags);
625 625
626 if (enable) { 626 if (enable) {
627 reg = mx3fb_read_reg(mx3fb, SDC_GW_CTRL) & 0x00FFFFFFL; 627 reg = mx3fb_read_reg(mx3fb, SDC_GW_CTRL) & 0x00FFFFFFL;
628 mx3fb_write_reg(mx3fb, reg | ((uint32_t) alpha << 24), SDC_GW_CTRL); 628 mx3fb_write_reg(mx3fb, reg | ((uint32_t) alpha << 24), SDC_GW_CTRL);
629 629
630 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF); 630 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
631 mx3fb_write_reg(mx3fb, reg | SDC_COM_GLB_A, SDC_COM_CONF); 631 mx3fb_write_reg(mx3fb, reg | SDC_COM_GLB_A, SDC_COM_CONF);
632 } else { 632 } else {
633 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF); 633 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
634 mx3fb_write_reg(mx3fb, reg & ~SDC_COM_GLB_A, SDC_COM_CONF); 634 mx3fb_write_reg(mx3fb, reg & ~SDC_COM_GLB_A, SDC_COM_CONF);
635 } 635 }
636 636
637 spin_unlock_irqrestore(&mx3fb->lock, lock_flags); 637 spin_unlock_irqrestore(&mx3fb->lock, lock_flags);
638 638
639 return 0; 639 return 0;
640} 640}
641 641
642static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value) 642static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value)
643{ 643{
644 /* This might be board-specific */ 644 /* This might be board-specific */
645 mx3fb_write_reg(mx3fb, 0x03000000UL | value << 16, SDC_PWM_CTRL); 645 mx3fb_write_reg(mx3fb, 0x03000000UL | value << 16, SDC_PWM_CTRL);
646 return; 646 return;
647} 647}
648 648
649static uint32_t bpp_to_pixfmt(int bpp) 649static uint32_t bpp_to_pixfmt(int bpp)
650{ 650{
651 uint32_t pixfmt = 0; 651 uint32_t pixfmt = 0;
652 switch (bpp) { 652 switch (bpp) {
653 case 24: 653 case 24:
654 pixfmt = IPU_PIX_FMT_BGR24; 654 pixfmt = IPU_PIX_FMT_BGR24;
655 break; 655 break;
656 case 32: 656 case 32:
657 pixfmt = IPU_PIX_FMT_BGR32; 657 pixfmt = IPU_PIX_FMT_BGR32;
658 break; 658 break;
659 case 16: 659 case 16:
660 pixfmt = IPU_PIX_FMT_RGB565; 660 pixfmt = IPU_PIX_FMT_RGB565;
661 break; 661 break;
662 } 662 }
663 return pixfmt; 663 return pixfmt;
664} 664}
665 665
666static int mx3fb_blank(int blank, struct fb_info *fbi); 666static int mx3fb_blank(int blank, struct fb_info *fbi);
@@ -669,300 +669,300 @@ static int mx3fb_unmap_video_memory(struct fb_info *fbi);
669 669
670/** 670/**
671 * mx3fb_set_fix() - set fixed framebuffer parameters from variable settings. 671 * mx3fb_set_fix() - set fixed framebuffer parameters from variable settings.
672 * @info: framebuffer information pointer 672 * @info: framebuffer information pointer
673 * @return: 0 on success or negative error code on failure. 673 * @return: 0 on success or negative error code on failure.
674 */ 674 */
675static int mx3fb_set_fix(struct fb_info *fbi) 675static int mx3fb_set_fix(struct fb_info *fbi)
676{ 676{
677 struct fb_fix_screeninfo *fix = &fbi->fix; 677 struct fb_fix_screeninfo *fix = &fbi->fix;
678 struct fb_var_screeninfo *var = &fbi->var; 678 struct fb_var_screeninfo *var = &fbi->var;
679 679
680 strncpy(fix->id, "DISP3 BG", 8); 680 strncpy(fix->id, "DISP3 BG", 8);
681 681
682 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8; 682 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
683 683
684 fix->type = FB_TYPE_PACKED_PIXELS; 684 fix->type = FB_TYPE_PACKED_PIXELS;
685 fix->accel = FB_ACCEL_NONE; 685 fix->accel = FB_ACCEL_NONE;
686 fix->visual = FB_VISUAL_TRUECOLOR; 686 fix->visual = FB_VISUAL_TRUECOLOR;
687 fix->xpanstep = 1; 687 fix->xpanstep = 1;
688 fix->ypanstep = 1; 688 fix->ypanstep = 1;
689 689
690 return 0; 690 return 0;
691} 691}
692 692
693static void mx3fb_dma_done(void *arg) 693static void mx3fb_dma_done(void *arg)
694{ 694{
695 struct idmac_tx_desc *tx_desc = to_tx_desc(arg); 695 struct idmac_tx_desc *tx_desc = to_tx_desc(arg);
696 struct dma_chan *chan = tx_desc->txd.chan; 696 struct dma_chan *chan = tx_desc->txd.chan;
697 struct idmac_channel *ichannel = to_idmac_chan(chan); 697 struct idmac_channel *ichannel = to_idmac_chan(chan);
698 struct mx3fb_data *mx3fb = ichannel->client; 698 struct mx3fb_data *mx3fb = ichannel->client;
699 struct mx3fb_info *mx3_fbi = mx3fb->fbi->par; 699 struct mx3fb_info *mx3_fbi = mx3fb->fbi->par;
700 700
701 dev_dbg(mx3fb->dev, "irq %d callback\n", ichannel->eof_irq); 701 dev_dbg(mx3fb->dev, "irq %d callback\n", ichannel->eof_irq);
702 702
703 /* We only need one interrupt, it will be re-enabled as needed */ 703 /* We only need one interrupt, it will be re-enabled as needed */
704 disable_irq(ichannel->eof_irq); 704 disable_irq(ichannel->eof_irq);
705 705
706 complete(&mx3_fbi->flip_cmpl); 706 complete(&mx3_fbi->flip_cmpl);
707} 707}
708 708
709/** 709/**
710 * mx3fb_set_par() - set framebuffer parameters and change the operating mode. 710 * mx3fb_set_par() - set framebuffer parameters and change the operating mode.
711 * @fbi: framebuffer information pointer. 711 * @fbi: framebuffer information pointer.
712 * @return: 0 on success or negative error code on failure. 712 * @return: 0 on success or negative error code on failure.
713 */ 713 */
714static int mx3fb_set_par(struct fb_info *fbi) 714static int mx3fb_set_par(struct fb_info *fbi)
715{ 715{
716 u32 mem_len; 716 u32 mem_len;
717 struct ipu_di_signal_cfg sig_cfg; 717 struct ipu_di_signal_cfg sig_cfg;
718 enum ipu_panel mode = IPU_PANEL_TFT; 718 enum ipu_panel mode = IPU_PANEL_TFT;
719 struct mx3fb_info *mx3_fbi = fbi->par; 719 struct mx3fb_info *mx3_fbi = fbi->par;
720 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb; 720 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
721 struct idmac_channel *ichan = mx3_fbi->idmac_channel; 721 struct idmac_channel *ichan = mx3_fbi->idmac_channel;
722 struct idmac_video_param *video = &ichan->params.video; 722 struct idmac_video_param *video = &ichan->params.video;
723 struct scatterlist *sg = mx3_fbi->sg; 723 struct scatterlist *sg = mx3_fbi->sg;
724 size_t screen_size; 724 size_t screen_size;
725 725
726 dev_dbg(mx3fb->dev, "%s [%c]\n", __func__, list_empty(&ichan->queue) ? '-' : '+'); 726 dev_dbg(mx3fb->dev, "%s [%c]\n", __func__, list_empty(&ichan->queue) ? '-' : '+');
727 727
728 mutex_lock(&mx3_fbi->mutex); 728 mutex_lock(&mx3_fbi->mutex);
729 729
730 /* Total cleanup */ 730 /* Total cleanup */
731 if (mx3_fbi->txd) 731 if (mx3_fbi->txd)
732 sdc_disable_channel(mx3_fbi); 732 sdc_disable_channel(mx3_fbi);
733 733
734 mx3fb_set_fix(fbi); 734 mx3fb_set_fix(fbi);
735 735
736 mem_len = fbi->var.yres_virtual * fbi->fix.line_length; 736 mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
737 if (mem_len > fbi->fix.smem_len) { 737 if (mem_len > fbi->fix.smem_len) {
738 if (fbi->fix.smem_start) 738 if (fbi->fix.smem_start)
739 mx3fb_unmap_video_memory(fbi); 739 mx3fb_unmap_video_memory(fbi);
740 740
741 fbi->fix.smem_len = mem_len; 741 fbi->fix.smem_len = mem_len;
742 if (mx3fb_map_video_memory(fbi) < 0) { 742 if (mx3fb_map_video_memory(fbi) < 0) {
743 mutex_unlock(&mx3_fbi->mutex); 743 mutex_unlock(&mx3_fbi->mutex);
744 return -ENOMEM; 744 return -ENOMEM;
745 } 745 }
746 } 746 }
747 747
748 screen_size = fbi->fix.line_length * fbi->var.yres; 748 screen_size = fbi->fix.line_length * fbi->var.yres;
749 749
750 sg_init_table(&sg[0], 1); 750 sg_init_table(&sg[0], 1);
751 sg_init_table(&sg[1], 1); 751 sg_init_table(&sg[1], 1);
752 752
753 sg_dma_address(&sg[0]) = fbi->fix.smem_start; 753 sg_dma_address(&sg[0]) = fbi->fix.smem_start;
754 sg_set_page(&sg[0], virt_to_page(fbi->screen_base), 754 sg_set_page(&sg[0], virt_to_page(fbi->screen_base),
755 fbi->fix.smem_len, 755 fbi->fix.smem_len,
756 offset_in_page(fbi->screen_base)); 756 offset_in_page(fbi->screen_base));
757 757
758 if (mx3_fbi->ipu_ch == IDMAC_SDC_0) { 758 if (mx3_fbi->ipu_ch == IDMAC_SDC_0) {
759 memset(&sig_cfg, 0, sizeof(sig_cfg)); 759 memset(&sig_cfg, 0, sizeof(sig_cfg));
760 if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT) 760 if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
761 sig_cfg.Hsync_pol = true; 761 sig_cfg.Hsync_pol = true;
762 if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) 762 if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
763 sig_cfg.Vsync_pol = true; 763 sig_cfg.Vsync_pol = true;
764 if (fbi->var.sync & FB_SYNC_CLK_INVERT) 764 if (fbi->var.sync & FB_SYNC_CLK_INVERT)
765 sig_cfg.clk_pol = true; 765 sig_cfg.clk_pol = true;
766 if (fbi->var.sync & FB_SYNC_DATA_INVERT) 766 if (fbi->var.sync & FB_SYNC_DATA_INVERT)
767 sig_cfg.data_pol = true; 767 sig_cfg.data_pol = true;
768 if (fbi->var.sync & FB_SYNC_OE_ACT_HIGH) 768 if (fbi->var.sync & FB_SYNC_OE_ACT_HIGH)
769 sig_cfg.enable_pol = true; 769 sig_cfg.enable_pol = true;
770 if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN) 770 if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
771 sig_cfg.clkidle_en = true; 771 sig_cfg.clkidle_en = true;
772 if (fbi->var.sync & FB_SYNC_CLK_SEL_EN) 772 if (fbi->var.sync & FB_SYNC_CLK_SEL_EN)
773 sig_cfg.clksel_en = true; 773 sig_cfg.clksel_en = true;
774 if (fbi->var.sync & FB_SYNC_SHARP_MODE) 774 if (fbi->var.sync & FB_SYNC_SHARP_MODE)
775 mode = IPU_PANEL_SHARP_TFT; 775 mode = IPU_PANEL_SHARP_TFT;
776 776
777 dev_dbg(fbi->device, "pixclock = %ul Hz\n", 777 dev_dbg(fbi->device, "pixclock = %ul Hz\n",
778 (u32) (PICOS2KHZ(fbi->var.pixclock) * 1000UL)); 778 (u32) (PICOS2KHZ(fbi->var.pixclock) * 1000UL));
779 779
780 if (sdc_init_panel(mx3fb, mode, 780 if (sdc_init_panel(mx3fb, mode,
781 (PICOS2KHZ(fbi->var.pixclock)) * 1000UL, 781 (PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
782 fbi->var.xres, fbi->var.yres, 782 fbi->var.xres, fbi->var.yres,
783 (fbi->var.sync & FB_SYNC_SWAP_RGB) ? 783 (fbi->var.sync & FB_SYNC_SWAP_RGB) ?
784 IPU_PIX_FMT_BGR666 : IPU_PIX_FMT_RGB666, 784 IPU_PIX_FMT_BGR666 : IPU_PIX_FMT_RGB666,
785 fbi->var.left_margin, 785 fbi->var.left_margin,
786 fbi->var.hsync_len, 786 fbi->var.hsync_len,
787 fbi->var.right_margin + 787 fbi->var.right_margin +
788 fbi->var.hsync_len, 788 fbi->var.hsync_len,
789 fbi->var.upper_margin, 789 fbi->var.upper_margin,
790 fbi->var.vsync_len, 790 fbi->var.vsync_len,
791 fbi->var.lower_margin + 791 fbi->var.lower_margin +
792 fbi->var.vsync_len, sig_cfg) != 0) { 792 fbi->var.vsync_len, sig_cfg) != 0) {
793 mutex_unlock(&mx3_fbi->mutex); 793 mutex_unlock(&mx3_fbi->mutex);
794 dev_err(fbi->device, 794 dev_err(fbi->device,
795 "mx3fb: Error initializing panel.\n"); 795 "mx3fb: Error initializing panel.\n");
796 return -EINVAL; 796 return -EINVAL;
797 } 797 }
798 } 798 }
799 799
800 sdc_set_window_pos(mx3fb, mx3_fbi->ipu_ch, 0, 0); 800 sdc_set_window_pos(mx3fb, mx3_fbi->ipu_ch, 0, 0);
801 801
802 mx3_fbi->cur_ipu_buf = 0; 802 mx3_fbi->cur_ipu_buf = 0;
803 803
804 video->out_pixel_fmt = bpp_to_pixfmt(fbi->var.bits_per_pixel); 804 video->out_pixel_fmt = bpp_to_pixfmt(fbi->var.bits_per_pixel);
805 video->out_width = fbi->var.xres; 805 video->out_width = fbi->var.xres;
806 video->out_height = fbi->var.yres; 806 video->out_height = fbi->var.yres;
807 video->out_stride = fbi->var.xres_virtual; 807 video->out_stride = fbi->var.xres_virtual;
808 808
809 if (mx3_fbi->blank == FB_BLANK_UNBLANK) 809 if (mx3_fbi->blank == FB_BLANK_UNBLANK)
810 sdc_enable_channel(mx3_fbi); 810 sdc_enable_channel(mx3_fbi);
811 811
812 mutex_unlock(&mx3_fbi->mutex); 812 mutex_unlock(&mx3_fbi->mutex);
813 813
814 return 0; 814 return 0;
815} 815}
816 816
817/** 817/**
818 * mx3fb_check_var() - check and adjust framebuffer variable parameters. 818 * mx3fb_check_var() - check and adjust framebuffer variable parameters.
819 * @var: framebuffer variable parameters 819 * @var: framebuffer variable parameters
820 * @fbi: framebuffer information pointer 820 * @fbi: framebuffer information pointer
821 */ 821 */
822static int mx3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi) 822static int mx3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi)
823{ 823{
824 struct mx3fb_info *mx3_fbi = fbi->par; 824 struct mx3fb_info *mx3_fbi = fbi->par;
825 u32 vtotal; 825 u32 vtotal;
826 u32 htotal; 826 u32 htotal;
827 827
828 dev_dbg(fbi->device, "%s\n", __func__); 828 dev_dbg(fbi->device, "%s\n", __func__);
829 829
830 if (var->xres_virtual < var->xres) 830 if (var->xres_virtual < var->xres)
831 var->xres_virtual = var->xres; 831 var->xres_virtual = var->xres;
832 if (var->yres_virtual < var->yres) 832 if (var->yres_virtual < var->yres)
833 var->yres_virtual = var->yres; 833 var->yres_virtual = var->yres;
834 834
835 if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) && 835 if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
836 (var->bits_per_pixel != 16)) 836 (var->bits_per_pixel != 16))
837 var->bits_per_pixel = default_bpp; 837 var->bits_per_pixel = default_bpp;
838 838
839 switch (var->bits_per_pixel) { 839 switch (var->bits_per_pixel) {
840 case 16: 840 case 16:
841 var->red.length = 5; 841 var->red.length = 5;
842 var->red.offset = 11; 842 var->red.offset = 11;
843 var->red.msb_right = 0; 843 var->red.msb_right = 0;
844 844
845 var->green.length = 6; 845 var->green.length = 6;
846 var->green.offset = 5; 846 var->green.offset = 5;
847 var->green.msb_right = 0; 847 var->green.msb_right = 0;
848 848
849 var->blue.length = 5; 849 var->blue.length = 5;
850 var->blue.offset = 0; 850 var->blue.offset = 0;
851 var->blue.msb_right = 0; 851 var->blue.msb_right = 0;
852 852
853 var->transp.length = 0; 853 var->transp.length = 0;
854 var->transp.offset = 0; 854 var->transp.offset = 0;
855 var->transp.msb_right = 0; 855 var->transp.msb_right = 0;
856 break; 856 break;
857 case 24: 857 case 24:
858 var->red.length = 8; 858 var->red.length = 8;
859 var->red.offset = 16; 859 var->red.offset = 16;
860 var->red.msb_right = 0; 860 var->red.msb_right = 0;
861 861
862 var->green.length = 8; 862 var->green.length = 8;
863 var->green.offset = 8; 863 var->green.offset = 8;
864 var->green.msb_right = 0; 864 var->green.msb_right = 0;
865 865
866 var->blue.length = 8; 866 var->blue.length = 8;
867 var->blue.offset = 0; 867 var->blue.offset = 0;
868 var->blue.msb_right = 0; 868 var->blue.msb_right = 0;
869 869
870 var->transp.length = 0; 870 var->transp.length = 0;
871 var->transp.offset = 0; 871 var->transp.offset = 0;
872 var->transp.msb_right = 0; 872 var->transp.msb_right = 0;
873 break; 873 break;
874 case 32: 874 case 32:
875 var->red.length = 8; 875 var->red.length = 8;
876 var->red.offset = 16; 876 var->red.offset = 16;
877 var->red.msb_right = 0; 877 var->red.msb_right = 0;
878 878
879 var->green.length = 8; 879 var->green.length = 8;
880 var->green.offset = 8; 880 var->green.offset = 8;
881 var->green.msb_right = 0; 881 var->green.msb_right = 0;
882 882
883 var->blue.length = 8; 883 var->blue.length = 8;
884 var->blue.offset = 0; 884 var->blue.offset = 0;
885 var->blue.msb_right = 0; 885 var->blue.msb_right = 0;
886 886
887 var->transp.length = 8; 887 var->transp.length = 8;
888 var->transp.offset = 24; 888 var->transp.offset = 24;
889 var->transp.msb_right = 0; 889 var->transp.msb_right = 0;
890 break; 890 break;
891 } 891 }
892 892
893 if (var->pixclock < 1000) { 893 if (var->pixclock < 1000) {
894 htotal = var->xres + var->right_margin + var->hsync_len + 894 htotal = var->xres + var->right_margin + var->hsync_len +
895 var->left_margin; 895 var->left_margin;
896 vtotal = var->yres + var->lower_margin + var->vsync_len + 896 vtotal = var->yres + var->lower_margin + var->vsync_len +
897 var->upper_margin; 897 var->upper_margin;
898 var->pixclock = (vtotal * htotal * 6UL) / 100UL; 898 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
899 var->pixclock = KHZ2PICOS(var->pixclock); 899 var->pixclock = KHZ2PICOS(var->pixclock);
900 dev_dbg(fbi->device, "pixclock set for 60Hz refresh = %u ps\n", 900 dev_dbg(fbi->device, "pixclock set for 60Hz refresh = %u ps\n",
901 var->pixclock); 901 var->pixclock);
902 } 902 }
903 903
904 var->height = -1; 904 var->height = -1;
905 var->width = -1; 905 var->width = -1;
906 var->grayscale = 0; 906 var->grayscale = 0;
907 907
908 /* Preserve sync flags */ 908 /* Preserve sync flags */
909 var->sync |= mx3_fbi->sync; 909 var->sync |= mx3_fbi->sync;
910 mx3_fbi->sync |= var->sync; 910 mx3_fbi->sync |= var->sync;
911 911
912 return 0; 912 return 0;
913} 913}
914 914
915static u32 chan_to_field(unsigned int chan, struct fb_bitfield *bf) 915static u32 chan_to_field(unsigned int chan, struct fb_bitfield *bf)
916{ 916{
917 chan &= 0xffff; 917 chan &= 0xffff;
918 chan >>= 16 - bf->length; 918 chan >>= 16 - bf->length;
919 return chan << bf->offset; 919 return chan << bf->offset;
920} 920}
921 921
922static int mx3fb_setcolreg(unsigned int regno, unsigned int red, 922static int mx3fb_setcolreg(unsigned int regno, unsigned int red,
923 unsigned int green, unsigned int blue, 923 unsigned int green, unsigned int blue,
924 unsigned int trans, struct fb_info *fbi) 924 unsigned int trans, struct fb_info *fbi)
925{ 925{
926 struct mx3fb_info *mx3_fbi = fbi->par; 926 struct mx3fb_info *mx3_fbi = fbi->par;
927 u32 val; 927 u32 val;
928 int ret = 1; 928 int ret = 1;
929 929
930 dev_dbg(fbi->device, "%s\n", __func__); 930 dev_dbg(fbi->device, "%s\n", __func__);
931 931
932 mutex_lock(&mx3_fbi->mutex); 932 mutex_lock(&mx3_fbi->mutex);
933 /* 933 /*
934 * If greyscale is true, then we convert the RGB value 934 * If greyscale is true, then we convert the RGB value
935 * to greyscale no matter what visual we are using. 935 * to greyscale no matter what visual we are using.
936 */ 936 */
937 if (fbi->var.grayscale) 937 if (fbi->var.grayscale)
938 red = green = blue = (19595 * red + 38470 * green + 938 red = green = blue = (19595 * red + 38470 * green +
939 7471 * blue) >> 16; 939 7471 * blue) >> 16;
940 switch (fbi->fix.visual) { 940 switch (fbi->fix.visual) {
941 case FB_VISUAL_TRUECOLOR: 941 case FB_VISUAL_TRUECOLOR:
942 /* 942 /*
943 * 16-bit True Colour. We encode the RGB value 943 * 16-bit True Colour. We encode the RGB value
944 * according to the RGB bitfield information. 944 * according to the RGB bitfield information.
945 */ 945 */
946 if (regno < 16) { 946 if (regno < 16) {
947 u32 *pal = fbi->pseudo_palette; 947 u32 *pal = fbi->pseudo_palette;
948 948
949 val = chan_to_field(red, &fbi->var.red); 949 val = chan_to_field(red, &fbi->var.red);
950 val |= chan_to_field(green, &fbi->var.green); 950 val |= chan_to_field(green, &fbi->var.green);
951 val |= chan_to_field(blue, &fbi->var.blue); 951 val |= chan_to_field(blue, &fbi->var.blue);
952 952
953 pal[regno] = val; 953 pal[regno] = val;
954 954
955 ret = 0; 955 ret = 0;
956 } 956 }
957 break; 957 break;
958 958
959 case FB_VISUAL_STATIC_PSEUDOCOLOR: 959 case FB_VISUAL_STATIC_PSEUDOCOLOR:
960 case FB_VISUAL_PSEUDOCOLOR: 960 case FB_VISUAL_PSEUDOCOLOR:
961 break; 961 break;
962 } 962 }
963 mutex_unlock(&mx3_fbi->mutex); 963 mutex_unlock(&mx3_fbi->mutex);
964 964
965 return ret; 965 return ret;
966} 966}
967 967
968/** 968/**
@@ -970,152 +970,152 @@ static int mx3fb_setcolreg(unsigned int regno, unsigned int red,
970 */ 970 */
971static int mx3fb_blank(int blank, struct fb_info *fbi) 971static int mx3fb_blank(int blank, struct fb_info *fbi)
972{ 972{
973 struct mx3fb_info *mx3_fbi = fbi->par; 973 struct mx3fb_info *mx3_fbi = fbi->par;
974 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb; 974 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
975 975
976 dev_dbg(fbi->device, "%s\n", __func__); 976 dev_dbg(fbi->device, "%s\n", __func__);
977 977
978 dev_dbg(fbi->device, "blank = %d\n", blank); 978 dev_dbg(fbi->device, "blank = %d\n", blank);
979 979
980 if (mx3_fbi->blank == blank) 980 if (mx3_fbi->blank == blank)
981 return 0; 981 return 0;
982 982
983 mutex_lock(&mx3_fbi->mutex); 983 mutex_lock(&mx3_fbi->mutex);
984 mx3_fbi->blank = blank; 984 mx3_fbi->blank = blank;
985 985
986 switch (blank) { 986 switch (blank) {
987 case FB_BLANK_POWERDOWN: 987 case FB_BLANK_POWERDOWN:
988 case FB_BLANK_VSYNC_SUSPEND: 988 case FB_BLANK_VSYNC_SUSPEND:
989 case FB_BLANK_HSYNC_SUSPEND: 989 case FB_BLANK_HSYNC_SUSPEND:
990 case FB_BLANK_NORMAL: 990 case FB_BLANK_NORMAL:
991 sdc_disable_channel(mx3_fbi); 991 sdc_disable_channel(mx3_fbi);
992 sdc_set_brightness(mx3fb, 0); 992 sdc_set_brightness(mx3fb, 0);
993 break; 993 break;
994 case FB_BLANK_UNBLANK: 994 case FB_BLANK_UNBLANK:
995 sdc_enable_channel(mx3_fbi); 995 sdc_enable_channel(mx3_fbi);
996 sdc_set_brightness(mx3fb, mx3fb->backlight_level); 996 sdc_set_brightness(mx3fb, mx3fb->backlight_level);
997 break; 997 break;
998 } 998 }
999 mutex_unlock(&mx3_fbi->mutex); 999 mutex_unlock(&mx3_fbi->mutex);
1000 1000
1001 return 0; 1001 return 0;
1002} 1002}
1003 1003
1004/** 1004/**
1005 * mx3fb_pan_display() - pan or wrap the display 1005 * mx3fb_pan_display() - pan or wrap the display
1006 * @var: variable screen buffer information. 1006 * @var: variable screen buffer information.
1007 * @info: framebuffer information pointer. 1007 * @info: framebuffer information pointer.
1008 * 1008 *
1009 * We look only at xoffset, yoffset and the FB_VMODE_YWRAP flag 1009 * We look only at xoffset, yoffset and the FB_VMODE_YWRAP flag
1010 */ 1010 */
1011static int mx3fb_pan_display(struct fb_var_screeninfo *var, 1011static int mx3fb_pan_display(struct fb_var_screeninfo *var,
1012 struct fb_info *fbi) 1012 struct fb_info *fbi)
1013{ 1013{
1014 struct mx3fb_info *mx3_fbi = fbi->par; 1014 struct mx3fb_info *mx3_fbi = fbi->par;
1015 u32 y_bottom; 1015 u32 y_bottom;
1016 unsigned long base; 1016 unsigned long base;
1017 off_t offset; 1017 off_t offset;
1018 dma_cookie_t cookie; 1018 dma_cookie_t cookie;
1019 struct scatterlist *sg = mx3_fbi->sg; 1019 struct scatterlist *sg = mx3_fbi->sg;
1020 struct dma_chan *dma_chan = &mx3_fbi->idmac_channel->dma_chan; 1020 struct dma_chan *dma_chan = &mx3_fbi->idmac_channel->dma_chan;
1021 struct dma_async_tx_descriptor *txd; 1021 struct dma_async_tx_descriptor *txd;
1022 int ret; 1022 int ret;
1023 1023
1024 dev_dbg(fbi->device, "%s [%c]\n", __func__, 1024 dev_dbg(fbi->device, "%s [%c]\n", __func__,
1025 list_empty(&mx3_fbi->idmac_channel->queue) ? '-' : '+'); 1025 list_empty(&mx3_fbi->idmac_channel->queue) ? '-' : '+');
1026 1026
1027 if (var->xoffset > 0) { 1027 if (var->xoffset > 0) {
1028 dev_dbg(fbi->device, "x panning not supported\n"); 1028 dev_dbg(fbi->device, "x panning not supported\n");
1029 return -EINVAL; 1029 return -EINVAL;
1030 } 1030 }
1031 1031
1032 if (fbi->var.xoffset == var->xoffset && 1032 if (fbi->var.xoffset == var->xoffset &&
1033 fbi->var.yoffset == var->yoffset) 1033 fbi->var.yoffset == var->yoffset)
1034 return 0; /* No change, do nothing */ 1034 return 0; /* No change, do nothing */
1035 1035
1036 y_bottom = var->yoffset; 1036 y_bottom = var->yoffset;
1037 1037
1038 if (!(var->vmode & FB_VMODE_YWRAP)) 1038 if (!(var->vmode & FB_VMODE_YWRAP))
1039 y_bottom += var->yres; 1039 y_bottom += var->yres;
1040 1040
1041 if (y_bottom > fbi->var.yres_virtual) 1041 if (y_bottom > fbi->var.yres_virtual)
1042 return -EINVAL; 1042 return -EINVAL;
1043 1043
1044 mutex_lock(&mx3_fbi->mutex); 1044 mutex_lock(&mx3_fbi->mutex);
1045 1045
1046 offset = (var->yoffset * var->xres_virtual + var->xoffset) * 1046 offset = (var->yoffset * var->xres_virtual + var->xoffset) *
1047 (var->bits_per_pixel / 8); 1047 (var->bits_per_pixel / 8);
1048 base = fbi->fix.smem_start + offset; 1048 base = fbi->fix.smem_start + offset;
1049 1049
1050 dev_dbg(fbi->device, "Updating SDC BG buf %d address=0x%08lX\n", 1050 dev_dbg(fbi->device, "Updating SDC BG buf %d address=0x%08lX\n",
1051 mx3_fbi->cur_ipu_buf, base); 1051 mx3_fbi->cur_ipu_buf, base);
1052 1052
1053 /* 1053 /*
1054 * We enable the End of Frame interrupt, which will free a tx-descriptor, 1054 * We enable the End of Frame interrupt, which will free a tx-descriptor,
1055 * which we will need for the next device_prep_slave_sg(). The 1055 * which we will need for the next device_prep_slave_sg(). The
1056 * IRQ-handler will disable the IRQ again. 1056 * IRQ-handler will disable the IRQ again.
1057 */ 1057 */
1058 init_completion(&mx3_fbi->flip_cmpl); 1058 init_completion(&mx3_fbi->flip_cmpl);
1059 enable_irq(mx3_fbi->idmac_channel->eof_irq); 1059 enable_irq(mx3_fbi->idmac_channel->eof_irq);
1060 1060
1061 ret = wait_for_completion_timeout(&mx3_fbi->flip_cmpl, HZ / 10); 1061 ret = wait_for_completion_timeout(&mx3_fbi->flip_cmpl, HZ / 10);
1062 if (ret <= 0) { 1062 if (ret <= 0) {
1063 mutex_unlock(&mx3_fbi->mutex); 1063 mutex_unlock(&mx3_fbi->mutex);
1064 dev_info(fbi->device, "Panning failed due to %s\n", ret < 0 ? 1064 dev_info(fbi->device, "Panning failed due to %s\n", ret < 0 ?
1065 "user interrupt" : "timeout"); 1065 "user interrupt" : "timeout");
1066 return ret ? : -ETIMEDOUT; 1066 return ret ? : -ETIMEDOUT;
1067 } 1067 }
1068 1068
1069 mx3_fbi->cur_ipu_buf = !mx3_fbi->cur_ipu_buf; 1069 mx3_fbi->cur_ipu_buf = !mx3_fbi->cur_ipu_buf;
1070 1070
1071 sg_dma_address(&sg[mx3_fbi->cur_ipu_buf]) = base; 1071 sg_dma_address(&sg[mx3_fbi->cur_ipu_buf]) = base;
1072 sg_set_page(&sg[mx3_fbi->cur_ipu_buf], 1072 sg_set_page(&sg[mx3_fbi->cur_ipu_buf],
1073 virt_to_page(fbi->screen_base + offset), fbi->fix.smem_len, 1073 virt_to_page(fbi->screen_base + offset), fbi->fix.smem_len,
1074 offset_in_page(fbi->screen_base + offset)); 1074 offset_in_page(fbi->screen_base + offset));
1075 1075
1076 txd = dma_chan->device->device_prep_slave_sg(dma_chan, sg + 1076 txd = dma_chan->device->device_prep_slave_sg(dma_chan, sg +
1077 mx3_fbi->cur_ipu_buf, 1, DMA_TO_DEVICE, DMA_PREP_INTERRUPT); 1077 mx3_fbi->cur_ipu_buf, 1, DMA_TO_DEVICE, DMA_PREP_INTERRUPT);
1078 if (!txd) { 1078 if (!txd) {
1079 dev_err(fbi->device, 1079 dev_err(fbi->device,
1080 "Error preparing a DMA transaction descriptor.\n"); 1080 "Error preparing a DMA transaction descriptor.\n");
1081 mutex_unlock(&mx3_fbi->mutex); 1081 mutex_unlock(&mx3_fbi->mutex);
1082 return -EIO; 1082 return -EIO;
1083 } 1083 }
1084 1084
1085 txd->callback_param = txd; 1085 txd->callback_param = txd;
1086 txd->callback = mx3fb_dma_done; 1086 txd->callback = mx3fb_dma_done;
1087 1087
1088 /* 1088 /*
1089 * Emulate original mx3fb behaviour: each new call to idmac_tx_submit() 1089 * Emulate original mx3fb behaviour: each new call to idmac_tx_submit()
1090 * should switch to another buffer 1090 * should switch to another buffer
1091 */ 1091 */
1092 cookie = txd->tx_submit(txd); 1092 cookie = txd->tx_submit(txd);
1093 dev_dbg(fbi->device, "%d: Submit %p #%d\n", __LINE__, txd, cookie); 1093 dev_dbg(fbi->device, "%d: Submit %p #%d\n", __LINE__, txd, cookie);
1094 if (cookie < 0) { 1094 if (cookie < 0) {
1095 dev_err(fbi->device, 1095 dev_err(fbi->device,
1096 "Error updating SDC buf %d to address=0x%08lX\n", 1096 "Error updating SDC buf %d to address=0x%08lX\n",
1097 mx3_fbi->cur_ipu_buf, base); 1097 mx3_fbi->cur_ipu_buf, base);
1098 mutex_unlock(&mx3_fbi->mutex); 1098 mutex_unlock(&mx3_fbi->mutex);
1099 return -EIO; 1099 return -EIO;
1100 } 1100 }
1101 1101
1102 if (mx3_fbi->txd) 1102 if (mx3_fbi->txd)
1103 async_tx_ack(mx3_fbi->txd); 1103 async_tx_ack(mx3_fbi->txd);
1104 mx3_fbi->txd = txd; 1104 mx3_fbi->txd = txd;
1105 1105
1106 fbi->var.xoffset = var->xoffset; 1106 fbi->var.xoffset = var->xoffset;
1107 fbi->var.yoffset = var->yoffset; 1107 fbi->var.yoffset = var->yoffset;
1108 1108
1109 if (var->vmode & FB_VMODE_YWRAP) 1109 if (var->vmode & FB_VMODE_YWRAP)
1110 fbi->var.vmode |= FB_VMODE_YWRAP; 1110 fbi->var.vmode |= FB_VMODE_YWRAP;
1111 else 1111 else
1112 fbi->var.vmode &= ~FB_VMODE_YWRAP; 1112 fbi->var.vmode &= ~FB_VMODE_YWRAP;
1113 1113
1114 mutex_unlock(&mx3_fbi->mutex); 1114 mutex_unlock(&mx3_fbi->mutex);
1115 1115
1116 dev_dbg(fbi->device, "Update complete\n"); 1116 dev_dbg(fbi->device, "Update complete\n");
1117 1117
1118 return 0; 1118 return 0;
1119} 1119}
1120 1120
1121/* 1121/*
@@ -1124,15 +1124,15 @@ static int mx3fb_pan_display(struct fb_var_screeninfo *var,
1124 * blitting, rectangle filling, copy regions and cursor definition. 1124 * blitting, rectangle filling, copy regions and cursor definition.
1125 */ 1125 */
1126static struct fb_ops mx3fb_ops = { 1126static struct fb_ops mx3fb_ops = {
1127 .owner = THIS_MODULE, 1127 .owner = THIS_MODULE,
1128 .fb_set_par = mx3fb_set_par, 1128 .fb_set_par = mx3fb_set_par,
1129 .fb_check_var = mx3fb_check_var, 1129 .fb_check_var = mx3fb_check_var,
1130 .fb_setcolreg = mx3fb_setcolreg, 1130 .fb_setcolreg = mx3fb_setcolreg,
1131 .fb_pan_display = mx3fb_pan_display, 1131 .fb_pan_display = mx3fb_pan_display,
1132 .fb_fillrect = cfb_fillrect, 1132 .fb_fillrect = cfb_fillrect,
1133 .fb_copyarea = cfb_copyarea, 1133 .fb_copyarea = cfb_copyarea,
1134 .fb_imageblit = cfb_imageblit, 1134 .fb_imageblit = cfb_imageblit,
1135 .fb_blank = mx3fb_blank, 1135 .fb_blank = mx3fb_blank,
1136}; 1136};
1137 1137
1138#ifdef CONFIG_PM 1138#ifdef CONFIG_PM
@@ -1146,19 +1146,19 @@ static struct fb_ops mx3fb_ops = {
1146 */ 1146 */
1147static int mx3fb_suspend(struct platform_device *pdev, pm_message_t state) 1147static int mx3fb_suspend(struct platform_device *pdev, pm_message_t state)
1148{ 1148{
1149 struct mx3fb_data *drv_data = platform_get_drvdata(pdev); 1149 struct mx3fb_data *drv_data = platform_get_drvdata(pdev);
1150 struct mx3fb_info *mx3_fbi = drv_data->fbi->par; 1150 struct mx3fb_info *mx3_fbi = drv_data->fbi->par;
1151 1151
1152 acquire_console_sem(); 1152 acquire_console_sem();
1153 fb_set_suspend(drv_data->fbi, 1); 1153 fb_set_suspend(drv_data->fbi, 1);
1154 release_console_sem(); 1154 release_console_sem();
1155 1155
1156 if (mx3_fbi->blank == FB_BLANK_UNBLANK) { 1156 if (mx3_fbi->blank == FB_BLANK_UNBLANK) {
1157 sdc_disable_channel(mx3_fbi); 1157 sdc_disable_channel(mx3_fbi);
1158 sdc_set_brightness(mx3fb, 0); 1158 sdc_set_brightness(mx3fb, 0);
1159 1159
1160 } 1160 }
1161 return 0; 1161 return 0;
1162} 1162}
1163 1163
1164/* 1164/*
@@ -1166,19 +1166,19 @@ static int mx3fb_suspend(struct platform_device *pdev, pm_message_t state)
1166 */ 1166 */
1167static int mx3fb_resume(struct platform_device *pdev) 1167static int mx3fb_resume(struct platform_device *pdev)
1168{ 1168{
1169 struct mx3fb_data *drv_data = platform_get_drvdata(pdev); 1169 struct mx3fb_data *drv_data = platform_get_drvdata(pdev);
1170 struct mx3fb_info *mx3_fbi = drv_data->fbi->par; 1170 struct mx3fb_info *mx3_fbi = drv_data->fbi->par;
1171 1171
1172 if (mx3_fbi->blank == FB_BLANK_UNBLANK) { 1172 if (mx3_fbi->blank == FB_BLANK_UNBLANK) {
1173 sdc_enable_channel(mx3_fbi); 1173 sdc_enable_channel(mx3_fbi);
1174 sdc_set_brightness(mx3fb, drv_data->backlight_level); 1174 sdc_set_brightness(mx3fb, drv_data->backlight_level);
1175 } 1175 }
1176 1176
1177 acquire_console_sem(); 1177 acquire_console_sem();
1178 fb_set_suspend(drv_data->fbi, 0); 1178 fb_set_suspend(drv_data->fbi, 0);
1179 release_console_sem(); 1179 release_console_sem();
1180 1180
1181 return 0; 1181 return 0;
1182} 1182}
1183#else 1183#else
1184#define mx3fb_suspend NULL 1184#define mx3fb_suspend NULL
@@ -1191,8 +1191,8 @@ static int mx3fb_resume(struct platform_device *pdev)
1191 1191
1192/** 1192/**
1193 * mx3fb_map_video_memory() - allocates the DRAM memory for the frame buffer. 1193 * mx3fb_map_video_memory() - allocates the DRAM memory for the frame buffer.
1194 * @fbi: framebuffer information pointer 1194 * @fbi: framebuffer information pointer
1195 * @return: Error code indicating success or failure 1195 * @return: Error code indicating success or failure
1196 * 1196 *
1197 * This buffer is remapped into a non-cached, non-buffered, memory region to 1197 * This buffer is remapped into a non-cached, non-buffered, memory region to
1198 * allow palette and pixel writes to occur without flushing the cache. Once this 1198 * allow palette and pixel writes to occur without flushing the cache. Once this
@@ -1201,349 +1201,349 @@ static int mx3fb_resume(struct platform_device *pdev)
1201 */ 1201 */
1202static int mx3fb_map_video_memory(struct fb_info *fbi) 1202static int mx3fb_map_video_memory(struct fb_info *fbi)
1203{ 1203{
1204 int retval = 0; 1204 int retval = 0;
1205 dma_addr_t addr; 1205 dma_addr_t addr;
1206 1206
1207 fbi->screen_base = dma_alloc_writecombine(fbi->device, 1207 fbi->screen_base = dma_alloc_writecombine(fbi->device,
1208 fbi->fix.smem_len, 1208 fbi->fix.smem_len,
1209 &addr, GFP_DMA); 1209 &addr, GFP_DMA);
1210 1210
1211 if (!fbi->screen_base) { 1211 if (!fbi->screen_base) {
1212 dev_err(fbi->device, "Cannot allocate %u bytes framebuffer memory\n", 1212 dev_err(fbi->device, "Cannot allocate %u bytes framebuffer memory\n",
1213 fbi->fix.smem_len); 1213 fbi->fix.smem_len);
1214 retval = -EBUSY; 1214 retval = -EBUSY;
1215 goto err0; 1215 goto err0;
1216 } 1216 }
1217 1217
1218 fbi->fix.smem_start = addr; 1218 fbi->fix.smem_start = addr;
1219 1219
1220 dev_dbg(fbi->device, "allocated fb @ p=0x%08x, v=0x%p, size=%d.\n", 1220 dev_dbg(fbi->device, "allocated fb @ p=0x%08x, v=0x%p, size=%d.\n",
1221 (uint32_t) fbi->fix.smem_start, fbi->screen_base, fbi->fix.smem_len); 1221 (uint32_t) fbi->fix.smem_start, fbi->screen_base, fbi->fix.smem_len);
1222 1222
1223 fbi->screen_size = fbi->fix.smem_len; 1223 fbi->screen_size = fbi->fix.smem_len;
1224 1224
1225 /* Clear the screen */ 1225 /* Clear the screen */
1226 memset((char *)fbi->screen_base, 0, fbi->fix.smem_len); 1226 memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
1227 1227
1228 return 0; 1228 return 0;
1229 1229
1230err0: 1230err0:
1231 fbi->fix.smem_len = 0; 1231 fbi->fix.smem_len = 0;
1232 fbi->fix.smem_start = 0; 1232 fbi->fix.smem_start = 0;
1233 fbi->screen_base = NULL; 1233 fbi->screen_base = NULL;
1234 return retval; 1234 return retval;
1235} 1235}
1236 1236
1237/** 1237/**
1238 * mx3fb_unmap_video_memory() - de-allocate frame buffer memory. 1238 * mx3fb_unmap_video_memory() - de-allocate frame buffer memory.
1239 * @fbi: framebuffer information pointer 1239 * @fbi: framebuffer information pointer
1240 * @return: error code indicating success or failure 1240 * @return: error code indicating success or failure
1241 */ 1241 */
1242static int mx3fb_unmap_video_memory(struct fb_info *fbi) 1242static int mx3fb_unmap_video_memory(struct fb_info *fbi)
1243{ 1243{
1244 dma_free_writecombine(fbi->device, fbi->fix.smem_len, 1244 dma_free_writecombine(fbi->device, fbi->fix.smem_len,
1245 fbi->screen_base, fbi->fix.smem_start); 1245 fbi->screen_base, fbi->fix.smem_start);
1246 1246
1247 fbi->screen_base = 0; 1247 fbi->screen_base = 0;
1248 fbi->fix.smem_start = 0; 1248 fbi->fix.smem_start = 0;
1249 fbi->fix.smem_len = 0; 1249 fbi->fix.smem_len = 0;
1250 return 0; 1250 return 0;
1251} 1251}
1252 1252
1253/** 1253/**
1254 * mx3fb_init_fbinfo() - initialize framebuffer information object. 1254 * mx3fb_init_fbinfo() - initialize framebuffer information object.
1255 * @return: initialized framebuffer structure. 1255 * @return: initialized framebuffer structure.
1256 */ 1256 */
1257static struct fb_info *mx3fb_init_fbinfo(struct device *dev, struct fb_ops *ops) 1257static struct fb_info *mx3fb_init_fbinfo(struct device *dev, struct fb_ops *ops)
1258{ 1258{
1259 struct fb_info *fbi; 1259 struct fb_info *fbi;
1260 struct mx3fb_info *mx3fbi; 1260 struct mx3fb_info *mx3fbi;
1261 int ret; 1261 int ret;
1262 1262
1263 /* Allocate sufficient memory for the fb structure */ 1263 /* Allocate sufficient memory for the fb structure */
1264 fbi = framebuffer_alloc(sizeof(struct mx3fb_info), dev); 1264 fbi = framebuffer_alloc(sizeof(struct mx3fb_info), dev);
1265 if (!fbi) 1265 if (!fbi)
1266 return NULL; 1266 return NULL;
1267 1267
1268 mx3fbi = fbi->par; 1268 mx3fbi = fbi->par;
1269 mx3fbi->cookie = -EINVAL; 1269 mx3fbi->cookie = -EINVAL;
1270 mx3fbi->cur_ipu_buf = 0; 1270 mx3fbi->cur_ipu_buf = 0;
1271 1271
1272 fbi->var.activate = FB_ACTIVATE_NOW; 1272 fbi->var.activate = FB_ACTIVATE_NOW;
1273 1273
1274 fbi->fbops = ops; 1274 fbi->fbops = ops;
1275 fbi->flags = FBINFO_FLAG_DEFAULT; 1275 fbi->flags = FBINFO_FLAG_DEFAULT;
1276 fbi->pseudo_palette = mx3fbi->pseudo_palette; 1276 fbi->pseudo_palette = mx3fbi->pseudo_palette;
1277 1277
1278 mutex_init(&mx3fbi->mutex); 1278 mutex_init(&mx3fbi->mutex);
1279 1279
1280 /* Allocate colormap */ 1280 /* Allocate colormap */
1281 ret = fb_alloc_cmap(&fbi->cmap, 16, 0); 1281 ret = fb_alloc_cmap(&fbi->cmap, 16, 0);
1282 if (ret < 0) { 1282 if (ret < 0) {
1283 framebuffer_release(fbi); 1283 framebuffer_release(fbi);
1284 return NULL; 1284 return NULL;
1285 } 1285 }
1286 1286
1287 return fbi; 1287 return fbi;
1288} 1288}
1289 1289
1290static int init_fb_chan(struct mx3fb_data *mx3fb, struct idmac_channel *ichan) 1290static int init_fb_chan(struct mx3fb_data *mx3fb, struct idmac_channel *ichan)
1291{ 1291{
1292 struct device *dev = mx3fb->dev; 1292 struct device *dev = mx3fb->dev;
1293 struct mx3fb_platform_data *mx3fb_pdata = dev->platform_data; 1293 struct mx3fb_platform_data *mx3fb_pdata = dev->platform_data;
1294 const char *name = mx3fb_pdata->name; 1294 const char *name = mx3fb_pdata->name;
1295 unsigned int irq; 1295 unsigned int irq;
1296 struct fb_info *fbi; 1296 struct fb_info *fbi;
1297 struct mx3fb_info *mx3fbi; 1297 struct mx3fb_info *mx3fbi;
1298 const struct fb_videomode *mode; 1298 const struct fb_videomode *mode;
1299 int ret, num_modes; 1299 int ret, num_modes;
1300 1300
1301 ichan->client = mx3fb; 1301 ichan->client = mx3fb;
1302 irq = ichan->eof_irq; 1302 irq = ichan->eof_irq;
1303 1303
1304 if (ichan->dma_chan.chan_id != IDMAC_SDC_0) 1304 if (ichan->dma_chan.chan_id != IDMAC_SDC_0)
1305 return -EINVAL; 1305 return -EINVAL;
1306 1306
1307 fbi = mx3fb_init_fbinfo(dev, &mx3fb_ops); 1307 fbi = mx3fb_init_fbinfo(dev, &mx3fb_ops);
1308 if (!fbi) 1308 if (!fbi)
1309 return -ENOMEM; 1309 return -ENOMEM;
1310 1310
1311 if (!fb_mode) 1311 if (!fb_mode)
1312 fb_mode = name; 1312 fb_mode = name;
1313 1313
1314 if (!fb_mode) { 1314 if (!fb_mode) {
1315 ret = -EINVAL; 1315 ret = -EINVAL;
1316 goto emode; 1316 goto emode;
1317 } 1317 }
1318 1318
1319 if (mx3fb_pdata->mode && mx3fb_pdata->num_modes) { 1319 if (mx3fb_pdata->mode && mx3fb_pdata->num_modes) {
1320 mode = mx3fb_pdata->mode; 1320 mode = mx3fb_pdata->mode;
1321 num_modes = mx3fb_pdata->num_modes; 1321 num_modes = mx3fb_pdata->num_modes;
1322 } else { 1322 } else {
1323 mode = mx3fb_modedb; 1323 mode = mx3fb_modedb;
1324 num_modes = ARRAY_SIZE(mx3fb_modedb); 1324 num_modes = ARRAY_SIZE(mx3fb_modedb);
1325 } 1325 }
1326 1326
1327 if (!fb_find_mode(&fbi->var, fbi, fb_mode, mode, 1327 if (!fb_find_mode(&fbi->var, fbi, fb_mode, mode,
1328 num_modes, NULL, default_bpp)) { 1328 num_modes, NULL, default_bpp)) {
1329 ret = -EBUSY; 1329 ret = -EBUSY;
1330 goto emode; 1330 goto emode;
1331 } 1331 }
1332 1332
1333 fb_videomode_to_modelist(mode, num_modes, &fbi->modelist); 1333 fb_videomode_to_modelist(mode, num_modes, &fbi->modelist);
1334 1334
1335 /* Default Y virtual size is 2x panel size */ 1335 /* Default Y virtual size is 2x panel size */
1336 fbi->var.yres_virtual = fbi->var.yres * 2; 1336 fbi->var.yres_virtual = fbi->var.yres * 2;
1337 1337
1338 mx3fb->fbi = fbi; 1338 mx3fb->fbi = fbi;
1339 1339
1340 /* set Display Interface clock period */ 1340 /* set Display Interface clock period */
1341 mx3fb_write_reg(mx3fb, 0x00100010L, DI_HSP_CLK_PER); 1341 mx3fb_write_reg(mx3fb, 0x00100010L, DI_HSP_CLK_PER);
1342 /* Might need to trigger HSP clock change - see 44.3.3.8.5 */ 1342 /* Might need to trigger HSP clock change - see 44.3.3.8.5 */
1343 1343
1344 sdc_set_brightness(mx3fb, 255); 1344 sdc_set_brightness(mx3fb, 255);
1345 sdc_set_global_alpha(mx3fb, true, 0xFF); 1345 sdc_set_global_alpha(mx3fb, true, 0xFF);
1346 sdc_set_color_key(mx3fb, IDMAC_SDC_0, false, 0); 1346 sdc_set_color_key(mx3fb, IDMAC_SDC_0, false, 0);
1347 1347
1348 mx3fbi = fbi->par; 1348 mx3fbi = fbi->par;
1349 mx3fbi->idmac_channel = ichan; 1349 mx3fbi->idmac_channel = ichan;
1350 mx3fbi->ipu_ch = ichan->dma_chan.chan_id; 1350 mx3fbi->ipu_ch = ichan->dma_chan.chan_id;
1351 mx3fbi->mx3fb = mx3fb; 1351 mx3fbi->mx3fb = mx3fb;
1352 mx3fbi->blank = FB_BLANK_NORMAL; 1352 mx3fbi->blank = FB_BLANK_NORMAL;
1353 1353
1354 init_completion(&mx3fbi->flip_cmpl); 1354 init_completion(&mx3fbi->flip_cmpl);
1355 disable_irq(ichan->eof_irq); 1355 disable_irq(ichan->eof_irq);
1356 dev_dbg(mx3fb->dev, "disabling irq %d\n", ichan->eof_irq); 1356 dev_dbg(mx3fb->dev, "disabling irq %d\n", ichan->eof_irq);
1357 ret = mx3fb_set_par(fbi); 1357 ret = mx3fb_set_par(fbi);
1358 if (ret < 0) 1358 if (ret < 0)
1359 goto esetpar; 1359 goto esetpar;
1360 1360
1361 mx3fb_blank(FB_BLANK_UNBLANK, fbi); 1361 mx3fb_blank(FB_BLANK_UNBLANK, fbi);
1362 1362
1363 dev_info(dev, "mx3fb: fb registered, using mode %s\n", fb_mode); 1363 dev_info(dev, "mx3fb: fb registered, using mode %s\n", fb_mode);
1364 1364
1365 ret = register_framebuffer(fbi); 1365 ret = register_framebuffer(fbi);
1366 if (ret < 0) 1366 if (ret < 0)
1367 goto erfb; 1367 goto erfb;
1368 1368
1369 return 0; 1369 return 0;
1370 1370
1371erfb: 1371erfb:
1372esetpar: 1372esetpar:
1373emode: 1373emode:
1374 fb_dealloc_cmap(&fbi->cmap); 1374 fb_dealloc_cmap(&fbi->cmap);
1375 framebuffer_release(fbi); 1375 framebuffer_release(fbi);
1376 1376
1377 return ret; 1377 return ret;
1378} 1378}
1379 1379
1380static bool chan_filter(struct dma_chan *chan, void *arg) 1380static bool chan_filter(struct dma_chan *chan, void *arg)
1381{ 1381{
1382 struct dma_chan_request *rq = arg; 1382 struct dma_chan_request *rq = arg;
1383 struct device *dev; 1383 struct device *dev;
1384 struct mx3fb_platform_data *mx3fb_pdata; 1384 struct mx3fb_platform_data *mx3fb_pdata;
1385 1385
1386 if (!rq) 1386 if (!rq)
1387 return false; 1387 return false;
1388 1388
1389 dev = rq->mx3fb->dev; 1389 dev = rq->mx3fb->dev;
1390 mx3fb_pdata = dev->platform_data; 1390 mx3fb_pdata = dev->platform_data;
1391 1391
1392 return rq->id == chan->chan_id && 1392 return rq->id == chan->chan_id &&
1393 mx3fb_pdata->dma_dev == chan->device->dev; 1393 mx3fb_pdata->dma_dev == chan->device->dev;
1394} 1394}
1395 1395
1396static void release_fbi(struct fb_info *fbi) 1396static void release_fbi(struct fb_info *fbi)
1397{ 1397{
1398 mx3fb_unmap_video_memory(fbi); 1398 mx3fb_unmap_video_memory(fbi);
1399 1399
1400 fb_dealloc_cmap(&fbi->cmap); 1400 fb_dealloc_cmap(&fbi->cmap);
1401 1401
1402 unregister_framebuffer(fbi); 1402 unregister_framebuffer(fbi);
1403 framebuffer_release(fbi); 1403 framebuffer_release(fbi);
1404} 1404}
1405 1405
1406static int mx3fb_probe(struct platform_device *pdev) 1406static int mx3fb_probe(struct platform_device *pdev)
1407{ 1407{
1408 struct device *dev = &pdev->dev; 1408 struct device *dev = &pdev->dev;
1409 int ret; 1409 int ret;
1410 struct resource *sdc_reg; 1410 struct resource *sdc_reg;
1411 struct mx3fb_data *mx3fb; 1411 struct mx3fb_data *mx3fb;
1412 dma_cap_mask_t mask; 1412 dma_cap_mask_t mask;
1413 struct dma_chan *chan; 1413 struct dma_chan *chan;
1414 struct dma_chan_request rq; 1414 struct dma_chan_request rq;
1415 1415
1416 /* 1416 /*
1417 * Display Interface (DI) and Synchronous Display Controller (SDC) 1417 * Display Interface (DI) and Synchronous Display Controller (SDC)
1418 * registers 1418 * registers
1419 */ 1419 */
1420 sdc_reg = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1420 sdc_reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1421 if (!sdc_reg) 1421 if (!sdc_reg)
1422 return -EINVAL; 1422 return -EINVAL;
1423 1423
1424 mx3fb = kzalloc(sizeof(*mx3fb), GFP_KERNEL); 1424 mx3fb = kzalloc(sizeof(*mx3fb), GFP_KERNEL);
1425 if (!mx3fb) 1425 if (!mx3fb)
1426 return -ENOMEM; 1426 return -ENOMEM;
1427 1427
1428 spin_lock_init(&mx3fb->lock); 1428 spin_lock_init(&mx3fb->lock);
1429 1429
1430 mx3fb->reg_base = ioremap(sdc_reg->start, resource_size(sdc_reg)); 1430 mx3fb->reg_base = ioremap(sdc_reg->start, resource_size(sdc_reg));
1431 if (!mx3fb->reg_base) { 1431 if (!mx3fb->reg_base) {
1432 ret = -ENOMEM; 1432 ret = -ENOMEM;
1433 goto eremap; 1433 goto eremap;
1434 } 1434 }
1435 1435
1436 pr_debug("Remapped %x to %x at %p\n", sdc_reg->start, sdc_reg->end, 1436 pr_debug("Remapped %x to %x at %p\n", sdc_reg->start, sdc_reg->end,
1437 mx3fb->reg_base); 1437 mx3fb->reg_base);
1438 1438
1439 /* IDMAC interface */ 1439 /* IDMAC interface */
1440 dmaengine_get(); 1440 dmaengine_get();
1441 1441
1442 mx3fb->dev = dev; 1442 mx3fb->dev = dev;
1443 platform_set_drvdata(pdev, mx3fb); 1443 platform_set_drvdata(pdev, mx3fb);
1444 1444
1445 rq.mx3fb = mx3fb; 1445 rq.mx3fb = mx3fb;
1446 1446
1447 dma_cap_zero(mask); 1447 dma_cap_zero(mask);
1448 dma_cap_set(DMA_SLAVE, mask); 1448 dma_cap_set(DMA_SLAVE, mask);
1449 dma_cap_set(DMA_PRIVATE, mask); 1449 dma_cap_set(DMA_PRIVATE, mask);
1450 rq.id = IDMAC_SDC_0; 1450 rq.id = IDMAC_SDC_0;
1451 chan = dma_request_channel(mask, chan_filter, &rq); 1451 chan = dma_request_channel(mask, chan_filter, &rq);
1452 if (!chan) { 1452 if (!chan) {
1453 ret = -EBUSY; 1453 ret = -EBUSY;
1454 goto ersdc0; 1454 goto ersdc0;
1455 } 1455 }
1456 1456
1457 ret = init_fb_chan(mx3fb, to_idmac_chan(chan)); 1457 ret = init_fb_chan(mx3fb, to_idmac_chan(chan));
1458 if (ret < 0) 1458 if (ret < 0)
1459 goto eisdc0; 1459 goto eisdc0;
1460 1460
1461 mx3fb->backlight_level = 255; 1461 mx3fb->backlight_level = 255;
1462 1462
1463 return 0; 1463 return 0;
1464 1464
1465eisdc0: 1465eisdc0:
1466 dma_release_channel(chan); 1466 dma_release_channel(chan);
1467ersdc0: 1467ersdc0:
1468 dmaengine_put(); 1468 dmaengine_put();
1469 iounmap(mx3fb->reg_base); 1469 iounmap(mx3fb->reg_base);
1470eremap: 1470eremap:
1471 kfree(mx3fb); 1471 kfree(mx3fb);
1472 dev_err(dev, "mx3fb: failed to register fb\n"); 1472 dev_err(dev, "mx3fb: failed to register fb\n");
1473 return ret; 1473 return ret;
1474} 1474}
1475 1475
1476static int mx3fb_remove(struct platform_device *dev) 1476static int mx3fb_remove(struct platform_device *dev)
1477{ 1477{
1478 struct mx3fb_data *mx3fb = platform_get_drvdata(dev); 1478 struct mx3fb_data *mx3fb = platform_get_drvdata(dev);
1479 struct fb_info *fbi = mx3fb->fbi; 1479 struct fb_info *fbi = mx3fb->fbi;
1480 struct mx3fb_info *mx3_fbi = fbi->par; 1480 struct mx3fb_info *mx3_fbi = fbi->par;
1481 struct dma_chan *chan; 1481 struct dma_chan *chan;
1482 1482
1483 chan = &mx3_fbi->idmac_channel->dma_chan; 1483 chan = &mx3_fbi->idmac_channel->dma_chan;
1484 release_fbi(fbi); 1484 release_fbi(fbi);
1485 1485
1486 dma_release_channel(chan); 1486 dma_release_channel(chan);
1487 dmaengine_put(); 1487 dmaengine_put();
1488 1488
1489 iounmap(mx3fb->reg_base); 1489 iounmap(mx3fb->reg_base);
1490 kfree(mx3fb); 1490 kfree(mx3fb);
1491 return 0; 1491 return 0;
1492} 1492}
1493 1493
1494static struct platform_driver mx3fb_driver = { 1494static struct platform_driver mx3fb_driver = {
1495 .driver = { 1495 .driver = {
1496 .name = MX3FB_NAME, 1496 .name = MX3FB_NAME,
1497 }, 1497 },
1498 .probe = mx3fb_probe, 1498 .probe = mx3fb_probe,
1499 .remove = mx3fb_remove, 1499 .remove = mx3fb_remove,
1500 .suspend = mx3fb_suspend, 1500 .suspend = mx3fb_suspend,
1501 .resume = mx3fb_resume, 1501 .resume = mx3fb_resume,
1502}; 1502};
1503 1503
1504/* 1504/*
1505 * Parse user specified options (`video=mx3fb:') 1505 * Parse user specified options (`video=mx3fb:')
1506 * example: 1506 * example:
1507 * video=mx3fb:bpp=16 1507 * video=mx3fb:bpp=16
1508 */ 1508 */
1509static int mx3fb_setup(void) 1509static int mx3fb_setup(void)
1510{ 1510{
1511#ifndef MODULE 1511#ifndef MODULE
1512 char *opt, *options = NULL; 1512 char *opt, *options = NULL;
1513 1513
1514 if (fb_get_options("mx3fb", &options)) 1514 if (fb_get_options("mx3fb", &options))
1515 return -ENODEV; 1515 return -ENODEV;
1516 1516
1517 if (!options || !*options) 1517 if (!options || !*options)
1518 return 0; 1518 return 0;
1519 1519
1520 while ((opt = strsep(&options, ",")) != NULL) { 1520 while ((opt = strsep(&options, ",")) != NULL) {
1521 if (!*opt) 1521 if (!*opt)
1522 continue; 1522 continue;
1523 if (!strncmp(opt, "bpp=", 4)) 1523 if (!strncmp(opt, "bpp=", 4))
1524 default_bpp = simple_strtoul(opt + 4, NULL, 0); 1524 default_bpp = simple_strtoul(opt + 4, NULL, 0);
1525 else 1525 else
1526 fb_mode = opt; 1526 fb_mode = opt;
1527 } 1527 }
1528#endif 1528#endif
1529 1529
1530 return 0; 1530 return 0;
1531} 1531}
1532 1532
1533static int __init mx3fb_init(void) 1533static int __init mx3fb_init(void)
1534{ 1534{
1535 int ret = mx3fb_setup(); 1535 int ret = mx3fb_setup();
1536 1536
1537 if (ret < 0) 1537 if (ret < 0)
1538 return ret; 1538 return ret;
1539 1539
1540 ret = platform_driver_register(&mx3fb_driver); 1540 ret = platform_driver_register(&mx3fb_driver);
1541 return ret; 1541 return ret;
1542} 1542}
1543 1543
1544static void __exit mx3fb_exit(void) 1544static void __exit mx3fb_exit(void)
1545{ 1545{
1546 platform_driver_unregister(&mx3fb_driver); 1546 platform_driver_unregister(&mx3fb_driver);
1547} 1547}
1548 1548
1549module_init(mx3fb_init); 1549module_init(mx3fb_init);
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 2552b9f325ee..84f63205c46d 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -59,7 +59,6 @@
59#include <asm/io.h> 59#include <asm/io.h>
60#include <asm/irq.h> 60#include <asm/irq.h>
61#include <asm/div64.h> 61#include <asm/div64.h>
62#include <mach/pxa-regs.h>
63#include <mach/bitfield.h> 62#include <mach/bitfield.h>
64#include <mach/pxafb.h> 63#include <mach/pxafb.h>
65 64
@@ -883,10 +882,21 @@ static void __devinit init_pxafb_overlay(struct pxafb_info *fbi,
883 init_completion(&ofb->branch_done); 882 init_completion(&ofb->branch_done);
884} 883}
885 884
885static inline int pxafb_overlay_supported(void)
886{
887 if (cpu_is_pxa27x() || cpu_is_pxa3xx())
888 return 1;
889
890 return 0;
891}
892
886static int __devinit pxafb_overlay_init(struct pxafb_info *fbi) 893static int __devinit pxafb_overlay_init(struct pxafb_info *fbi)
887{ 894{
888 int i, ret; 895 int i, ret;
889 896
897 if (!pxafb_overlay_supported())
898 return 0;
899
890 for (i = 0; i < 2; i++) { 900 for (i = 0; i < 2; i++) {
891 init_pxafb_overlay(fbi, &fbi->overlay[i], i); 901 init_pxafb_overlay(fbi, &fbi->overlay[i], i);
892 ret = register_framebuffer(&fbi->overlay[i].fb); 902 ret = register_framebuffer(&fbi->overlay[i].fb);
@@ -909,6 +919,9 @@ static void __devexit pxafb_overlay_exit(struct pxafb_info *fbi)
909{ 919{
910 int i; 920 int i;
911 921
922 if (!pxafb_overlay_supported())
923 return;
924
912 for (i = 0; i < 2; i++) 925 for (i = 0; i < 2; i++)
913 unregister_framebuffer(&fbi->overlay[i].fb); 926 unregister_framebuffer(&fbi->overlay[i].fb);
914} 927}
diff --git a/drivers/video/s3c2410fb.c b/drivers/video/s3c2410fb.c
index 79cf0b1976aa..b0b4513ba537 100644
--- a/drivers/video/s3c2410fb.c
+++ b/drivers/video/s3c2410fb.c
@@ -1017,6 +1017,10 @@ static int s3c2410fb_resume(struct platform_device *dev)
1017 1017
1018 s3c2410fb_init_registers(fbinfo); 1018 s3c2410fb_init_registers(fbinfo);
1019 1019
1020 /* re-activate our display after resume */
1021 s3c2410fb_activate_var(fbinfo);
1022 s3c2410fb_blank(FB_BLANK_UNBLANK, fbinfo);
1023
1020 return 0; 1024 return 0;
1021} 1025}
1022 1026
diff --git a/drivers/video/sa1100fb.c b/drivers/video/sa1100fb.c
index 076f946fa0f5..fad58cf9ef73 100644
--- a/drivers/video/sa1100fb.c
+++ b/drivers/video/sa1100fb.c
@@ -176,9 +176,9 @@
176#include <linux/platform_device.h> 176#include <linux/platform_device.h>
177#include <linux/dma-mapping.h> 177#include <linux/dma-mapping.h>
178#include <linux/mutex.h> 178#include <linux/mutex.h>
179#include <linux/io.h>
179 180
180#include <mach/hardware.h> 181#include <mach/hardware.h>
181#include <asm/io.h>
182#include <asm/mach-types.h> 182#include <asm/mach-types.h>
183#include <mach/assabet.h> 183#include <mach/assabet.h>
184#include <mach/shannon.h> 184#include <mach/shannon.h>
@@ -251,22 +251,6 @@ static struct sa1100fb_mach_info pal_info __initdata = {
251#endif 251#endif
252#endif 252#endif
253 253
254#ifdef CONFIG_SA1100_H3800
255static struct sa1100fb_mach_info h3800_info __initdata = {
256 .pixclock = 174757, .bpp = 16,
257 .xres = 320, .yres = 240,
258
259 .hsync_len = 3, .vsync_len = 3,
260 .left_margin = 12, .upper_margin = 10,
261 .right_margin = 17, .lower_margin = 1,
262
263 .cmap_static = 1,
264
265 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
266 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
267};
268#endif
269
270#ifdef CONFIG_SA1100_H3600 254#ifdef CONFIG_SA1100_H3600
271static struct sa1100fb_mach_info h3600_info __initdata = { 255static struct sa1100fb_mach_info h3600_info __initdata = {
272 .pixclock = 174757, .bpp = 16, 256 .pixclock = 174757, .bpp = 16,
@@ -432,11 +416,6 @@ sa1100fb_get_machine_info(struct sa1100fb_info *fbi)
432 fbi->rgb[RGB_16] = &h3600_rgb_16; 416 fbi->rgb[RGB_16] = &h3600_rgb_16;
433 } 417 }
434#endif 418#endif
435#ifdef CONFIG_SA1100_H3800
436 if (machine_is_h3800()) {
437 inf = &h3800_info;
438 }
439#endif
440#ifdef CONFIG_SA1100_COLLIE 419#ifdef CONFIG_SA1100_COLLIE
441 if (machine_is_collie()) { 420 if (machine_is_collie()) {
442 inf = &collie_info; 421 inf = &collie_info;
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index b9d74d0b353e..65244c02551b 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -116,7 +116,7 @@ static int __init mxc_w1_probe(struct platform_device *pdev)
116 if (!mdev) 116 if (!mdev)
117 return -ENOMEM; 117 return -ENOMEM;
118 118
119 mdev->clk = clk_get(&pdev->dev, "owire_clk"); 119 mdev->clk = clk_get(&pdev->dev, "owire");
120 if (!mdev->clk) { 120 if (!mdev->clk) {
121 err = -ENODEV; 121 err = -ENODEV;
122 goto failed_clk; 122 goto failed_clk;
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c
index c973889110c8..a7e3b706b9d3 100644
--- a/drivers/w1/masters/omap_hdq.c
+++ b/drivers/w1/masters/omap_hdq.c
@@ -590,8 +590,8 @@ static int __init omap_hdq_probe(struct platform_device *pdev)
590 } 590 }
591 591
592 /* get interface & functional clock objects */ 592 /* get interface & functional clock objects */
593 hdq_data->hdq_ick = clk_get(&pdev->dev, "hdq_ick"); 593 hdq_data->hdq_ick = clk_get(&pdev->dev, "ick");
594 hdq_data->hdq_fck = clk_get(&pdev->dev, "hdq_fck"); 594 hdq_data->hdq_fck = clk_get(&pdev->dev, "fck");
595 595
596 if (IS_ERR(hdq_data->hdq_ick) || IS_ERR(hdq_data->hdq_fck)) { 596 if (IS_ERR(hdq_data->hdq_ick) || IS_ERR(hdq_data->hdq_fck)) {
597 dev_dbg(&pdev->dev, "Can't get HDQ clock objects\n"); 597 dev_dbg(&pdev->dev, "Can't get HDQ clock objects\n");
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 2f2ce7429f5b..aa5ad6e33f02 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -60,9 +60,8 @@ struct omap_wdt_dev {
60 void __iomem *base; /* physical */ 60 void __iomem *base; /* physical */
61 struct device *dev; 61 struct device *dev;
62 int omap_wdt_users; 62 int omap_wdt_users;
63 struct clk *armwdt_ck; 63 struct clk *ick;
64 struct clk *mpu_wdt_ick; 64 struct clk *fck;
65 struct clk *mpu_wdt_fck;
66 struct resource *mem; 65 struct resource *mem;
67 struct miscdevice omap_wdt_miscdev; 66 struct miscdevice omap_wdt_miscdev;
68}; 67};
@@ -146,13 +145,8 @@ static int omap_wdt_open(struct inode *inode, struct file *file)
146 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) 145 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
147 return -EBUSY; 146 return -EBUSY;
148 147
149 if (cpu_is_omap16xx()) 148 clk_enable(wdev->ick); /* Enable the interface clock */
150 clk_enable(wdev->armwdt_ck); /* Enable the clock */ 149 clk_enable(wdev->fck); /* Enable the functional clock */
151
152 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
153 clk_enable(wdev->mpu_wdt_ick); /* Enable the interface clock */
154 clk_enable(wdev->mpu_wdt_fck); /* Enable the functional clock */
155 }
156 150
157 /* initialize prescaler */ 151 /* initialize prescaler */
158 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) 152 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
@@ -181,13 +175,8 @@ static int omap_wdt_release(struct inode *inode, struct file *file)
181 175
182 omap_wdt_disable(wdev); 176 omap_wdt_disable(wdev);
183 177
184 if (cpu_is_omap16xx()) 178 clk_disable(wdev->ick);
185 clk_disable(wdev->armwdt_ck); /* Disable the clock */ 179 clk_disable(wdev->fck);
186
187 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
188 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
189 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
190 }
191#else 180#else
192 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); 181 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
193#endif 182#endif
@@ -303,44 +292,19 @@ static int __init omap_wdt_probe(struct platform_device *pdev)
303 wdev->omap_wdt_users = 0; 292 wdev->omap_wdt_users = 0;
304 wdev->mem = mem; 293 wdev->mem = mem;
305 294
306 if (cpu_is_omap16xx()) { 295 wdev->ick = clk_get(&pdev->dev, "ick");
307 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck"); 296 if (IS_ERR(wdev->ick)) {
308 if (IS_ERR(wdev->armwdt_ck)) { 297 ret = PTR_ERR(wdev->ick);
309 ret = PTR_ERR(wdev->armwdt_ck); 298 wdev->ick = NULL;
310 wdev->armwdt_ck = NULL; 299 goto err_clk;
311 goto err_clk;
312 }
313 } 300 }
314 301 wdev->fck = clk_get(&pdev->dev, "fck");
315 if (cpu_is_omap24xx()) { 302 if (IS_ERR(wdev->fck)) {
316 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick"); 303 ret = PTR_ERR(wdev->fck);
317 if (IS_ERR(wdev->mpu_wdt_ick)) { 304 wdev->fck = NULL;
318 ret = PTR_ERR(wdev->mpu_wdt_ick); 305 goto err_clk;
319 wdev->mpu_wdt_ick = NULL;
320 goto err_clk;
321 }
322 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
323 if (IS_ERR(wdev->mpu_wdt_fck)) {
324 ret = PTR_ERR(wdev->mpu_wdt_fck);
325 wdev->mpu_wdt_fck = NULL;
326 goto err_clk;
327 }
328 } 306 }
329 307
330 if (cpu_is_omap34xx()) {
331 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
332 if (IS_ERR(wdev->mpu_wdt_ick)) {
333 ret = PTR_ERR(wdev->mpu_wdt_ick);
334 wdev->mpu_wdt_ick = NULL;
335 goto err_clk;
336 }
337 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
338 if (IS_ERR(wdev->mpu_wdt_fck)) {
339 ret = PTR_ERR(wdev->mpu_wdt_fck);
340 wdev->mpu_wdt_fck = NULL;
341 goto err_clk;
342 }
343 }
344 wdev->base = ioremap(res->start, res->end - res->start + 1); 308 wdev->base = ioremap(res->start, res->end - res->start + 1);
345 if (!wdev->base) { 309 if (!wdev->base) {
346 ret = -ENOMEM; 310 ret = -ENOMEM;
@@ -380,12 +344,10 @@ err_ioremap:
380 wdev->base = NULL; 344 wdev->base = NULL;
381 345
382err_clk: 346err_clk:
383 if (wdev->armwdt_ck) 347 if (wdev->ick)
384 clk_put(wdev->armwdt_ck); 348 clk_put(wdev->ick);
385 if (wdev->mpu_wdt_ick) 349 if (wdev->fck)
386 clk_put(wdev->mpu_wdt_ick); 350 clk_put(wdev->fck);
387 if (wdev->mpu_wdt_fck)
388 clk_put(wdev->mpu_wdt_fck);
389 kfree(wdev); 351 kfree(wdev);
390 352
391err_kzalloc: 353err_kzalloc:
@@ -417,20 +379,8 @@ static int omap_wdt_remove(struct platform_device *pdev)
417 release_mem_region(res->start, res->end - res->start + 1); 379 release_mem_region(res->start, res->end - res->start + 1);
418 platform_set_drvdata(pdev, NULL); 380 platform_set_drvdata(pdev, NULL);
419 381
420 if (wdev->armwdt_ck) { 382 clk_put(wdev->ick);
421 clk_put(wdev->armwdt_ck); 383 clk_put(wdev->fck);
422 wdev->armwdt_ck = NULL;
423 }
424
425 if (wdev->mpu_wdt_ick) {
426 clk_put(wdev->mpu_wdt_ick);
427 wdev->mpu_wdt_ick = NULL;
428 }
429
430 if (wdev->mpu_wdt_fck) {
431 clk_put(wdev->mpu_wdt_fck);
432 wdev->mpu_wdt_fck = NULL;
433 }
434 iounmap(wdev->base); 384 iounmap(wdev->base);
435 385
436 kfree(wdev); 386 kfree(wdev);
diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c
index 5bd782f27837..ee1caae4d33b 100644
--- a/drivers/watchdog/sa1100_wdt.c
+++ b/drivers/watchdog/sa1100_wdt.c
@@ -30,7 +30,7 @@
30#include <linux/timex.h> 30#include <linux/timex.h>
31 31
32#ifdef CONFIG_ARCH_PXA 32#ifdef CONFIG_ARCH_PXA
33#include <mach/pxa-regs.h> 33#include <mach/regs-ost.h>
34#endif 34#endif
35 35
36#include <mach/reset.h> 36#include <mach/reset.h>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 01:19:48 -0500