diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2009-04-29 22:14:08 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-06-16 00:44:50 -0400 |
commit | 700e2052c6814b1b1d2714225d568c5c64bc49ae (patch) | |
tree | 67c62f3c3773d2b856e21662435c839a1aab9dd4 /drivers/usb/host/xhci-mem.c | |
parent | b7258a4aba2b24d5c27a0f6674795e83e7771969 (diff) |
USB: xhci: fix lots of compiler warnings.
Turns out someone never built this code on a 64bit platform.
Someone owes me a beer...
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/xhci-mem.c')
-rw-r--r-- | drivers/usb/host/xhci-mem.c | 64 |
1 files changed, 33 insertions, 31 deletions
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index e81d10a653ef..6b75ca9180e3 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c | |||
@@ -40,16 +40,15 @@ static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flag | |||
40 | seg = kzalloc(sizeof *seg, flags); | 40 | seg = kzalloc(sizeof *seg, flags); |
41 | if (!seg) | 41 | if (!seg) |
42 | return 0; | 42 | return 0; |
43 | xhci_dbg(xhci, "Allocating priv segment structure at 0x%x\n", | 43 | xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg); |
44 | (unsigned int) seg); | ||
45 | 44 | ||
46 | seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma); | 45 | seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma); |
47 | if (!seg->trbs) { | 46 | if (!seg->trbs) { |
48 | kfree(seg); | 47 | kfree(seg); |
49 | return 0; | 48 | return 0; |
50 | } | 49 | } |
51 | xhci_dbg(xhci, "// Allocating segment at 0x%x (virtual) 0x%x (DMA)\n", | 50 | xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n", |
52 | (unsigned int) seg->trbs, (u32) dma); | 51 | seg->trbs, (unsigned long long)dma); |
53 | 52 | ||
54 | memset(seg->trbs, 0, SEGMENT_SIZE); | 53 | memset(seg->trbs, 0, SEGMENT_SIZE); |
55 | seg->dma = dma; | 54 | seg->dma = dma; |
@@ -63,14 +62,12 @@ static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) | |||
63 | if (!seg) | 62 | if (!seg) |
64 | return; | 63 | return; |
65 | if (seg->trbs) { | 64 | if (seg->trbs) { |
66 | xhci_dbg(xhci, "Freeing DMA segment at 0x%x" | 65 | xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n", |
67 | " (virtual) 0x%x (DMA)\n", | 66 | seg->trbs, (unsigned long long)seg->dma); |
68 | (unsigned int) seg->trbs, (u32) seg->dma); | ||
69 | dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); | 67 | dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); |
70 | seg->trbs = NULL; | 68 | seg->trbs = NULL; |
71 | } | 69 | } |
72 | xhci_dbg(xhci, "Freeing priv segment structure at 0x%x\n", | 70 | xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg); |
73 | (unsigned int) seg); | ||
74 | kfree(seg); | 71 | kfree(seg); |
75 | } | 72 | } |
76 | 73 | ||
@@ -98,8 +95,9 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, | |||
98 | val |= TRB_TYPE(TRB_LINK); | 95 | val |= TRB_TYPE(TRB_LINK); |
99 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; | 96 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; |
100 | } | 97 | } |
101 | xhci_dbg(xhci, "Linking segment 0x%x to segment 0x%x (DMA)\n", | 98 | xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n", |
102 | prev->dma, next->dma); | 99 | (unsigned long long)prev->dma, |
100 | (unsigned long long)next->dma); | ||
103 | } | 101 | } |
104 | 102 | ||
105 | /* XXX: Do we need the hcd structure in all these functions? */ | 103 | /* XXX: Do we need the hcd structure in all these functions? */ |
@@ -112,7 +110,7 @@ void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring) | |||
112 | return; | 110 | return; |
113 | first_seg = ring->first_seg; | 111 | first_seg = ring->first_seg; |
114 | seg = first_seg->next; | 112 | seg = first_seg->next; |
115 | xhci_dbg(xhci, "Freeing ring at 0x%x\n", (unsigned int) ring); | 113 | xhci_dbg(xhci, "Freeing ring at %p\n", ring); |
116 | while (seg != first_seg) { | 114 | while (seg != first_seg) { |
117 | struct xhci_segment *next = seg->next; | 115 | struct xhci_segment *next = seg->next; |
118 | xhci_segment_free(xhci, seg); | 116 | xhci_segment_free(xhci, seg); |
@@ -137,7 +135,7 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, | |||
137 | struct xhci_segment *prev; | 135 | struct xhci_segment *prev; |
138 | 136 | ||
139 | ring = kzalloc(sizeof *(ring), flags); | 137 | ring = kzalloc(sizeof *(ring), flags); |
140 | xhci_dbg(xhci, "Allocating ring at 0x%x\n", (unsigned int) ring); | 138 | xhci_dbg(xhci, "Allocating ring at %p\n", ring); |
141 | if (!ring) | 139 | if (!ring) |
142 | return 0; | 140 | return 0; |
143 | 141 | ||
@@ -169,8 +167,8 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, | |||
169 | /* See section 4.9.2.1 and 6.4.4.1 */ | 167 | /* See section 4.9.2.1 and 6.4.4.1 */ |
170 | prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE); | 168 | prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE); |
171 | xhci_dbg(xhci, "Wrote link toggle flag to" | 169 | xhci_dbg(xhci, "Wrote link toggle flag to" |
172 | " segment 0x%x (virtual), 0x%x (DMA)\n", | 170 | " segment %p (virtual), 0x%llx (DMA)\n", |
173 | (unsigned int) prev, (u32) prev->dma); | 171 | prev, (unsigned long long)prev->dma); |
174 | } | 172 | } |
175 | /* The ring is empty, so the enqueue pointer == dequeue pointer */ | 173 | /* The ring is empty, so the enqueue pointer == dequeue pointer */ |
176 | ring->enqueue = ring->first_seg->trbs; | 174 | ring->enqueue = ring->first_seg->trbs; |
@@ -242,7 +240,8 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
242 | if (!dev->out_ctx) | 240 | if (!dev->out_ctx) |
243 | goto fail; | 241 | goto fail; |
244 | dev->out_ctx_dma = dma; | 242 | dev->out_ctx_dma = dma; |
245 | xhci_dbg(xhci, "Slot %d output ctx = 0x%x (dma)\n", slot_id, dma); | 243 | xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id, |
244 | (unsigned long long)dma); | ||
246 | memset(dev->out_ctx, 0, sizeof(*dev->out_ctx)); | 245 | memset(dev->out_ctx, 0, sizeof(*dev->out_ctx)); |
247 | 246 | ||
248 | /* Allocate the (input) device context for address device command */ | 247 | /* Allocate the (input) device context for address device command */ |
@@ -250,7 +249,8 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
250 | if (!dev->in_ctx) | 249 | if (!dev->in_ctx) |
251 | goto fail; | 250 | goto fail; |
252 | dev->in_ctx_dma = dma; | 251 | dev->in_ctx_dma = dma; |
253 | xhci_dbg(xhci, "Slot %d input ctx = 0x%x (dma)\n", slot_id, dma); | 252 | xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id, |
253 | (unsigned long long)dma); | ||
254 | memset(dev->in_ctx, 0, sizeof(*dev->in_ctx)); | 254 | memset(dev->in_ctx, 0, sizeof(*dev->in_ctx)); |
255 | 255 | ||
256 | /* Allocate endpoint 0 ring */ | 256 | /* Allocate endpoint 0 ring */ |
@@ -266,10 +266,10 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
266 | */ | 266 | */ |
267 | xhci->dcbaa->dev_context_ptrs[2*slot_id] = | 267 | xhci->dcbaa->dev_context_ptrs[2*slot_id] = |
268 | (u32) dev->out_ctx_dma + (32); | 268 | (u32) dev->out_ctx_dma + (32); |
269 | xhci_dbg(xhci, "Set slot id %d dcbaa entry 0x%x to 0x%x\n", | 269 | xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", |
270 | slot_id, | 270 | slot_id, |
271 | (unsigned int) &xhci->dcbaa->dev_context_ptrs[2*slot_id], | 271 | &xhci->dcbaa->dev_context_ptrs[2*slot_id], |
272 | dev->out_ctx_dma); | 272 | (unsigned long long)dev->out_ctx_dma); |
273 | xhci->dcbaa->dev_context_ptrs[2*slot_id + 1] = 0; | 273 | xhci->dcbaa->dev_context_ptrs[2*slot_id + 1] = 0; |
274 | 274 | ||
275 | return 1; | 275 | return 1; |
@@ -339,7 +339,7 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud | |||
339 | dev->in_ctx->slot.tt_info = udev->tt->hub->slot_id; | 339 | dev->in_ctx->slot.tt_info = udev->tt->hub->slot_id; |
340 | dev->in_ctx->slot.tt_info |= udev->ttport << 8; | 340 | dev->in_ctx->slot.tt_info |= udev->ttport << 8; |
341 | } | 341 | } |
342 | xhci_dbg(xhci, "udev->tt = 0x%x\n", (unsigned int) udev->tt); | 342 | xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); |
343 | xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); | 343 | xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); |
344 | 344 | ||
345 | /* Step 4 - ring already allocated */ | 345 | /* Step 4 - ring already allocated */ |
@@ -643,8 +643,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
643 | goto fail; | 643 | goto fail; |
644 | memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa)); | 644 | memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa)); |
645 | xhci->dcbaa->dma = dma; | 645 | xhci->dcbaa->dma = dma; |
646 | xhci_dbg(xhci, "// Device context base array address = 0x%x (DMA), 0x%x (virt)\n", | 646 | xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n", |
647 | xhci->dcbaa->dma, (unsigned int) xhci->dcbaa); | 647 | (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa); |
648 | xhci_writel(xhci, (u32) 0, &xhci->op_regs->dcbaa_ptr[1]); | 648 | xhci_writel(xhci, (u32) 0, &xhci->op_regs->dcbaa_ptr[1]); |
649 | xhci_writel(xhci, dma, &xhci->op_regs->dcbaa_ptr[0]); | 649 | xhci_writel(xhci, dma, &xhci->op_regs->dcbaa_ptr[0]); |
650 | 650 | ||
@@ -668,8 +668,9 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
668 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags); | 668 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags); |
669 | if (!xhci->cmd_ring) | 669 | if (!xhci->cmd_ring) |
670 | goto fail; | 670 | goto fail; |
671 | xhci_dbg(xhci, "Allocated command ring at 0x%x\n", (unsigned int) xhci->cmd_ring); | 671 | xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring); |
672 | xhci_dbg(xhci, "First segment DMA is 0x%x\n", (unsigned int) xhci->cmd_ring->first_seg->dma); | 672 | xhci_dbg(xhci, "First segment DMA is 0x%llx\n", |
673 | (unsigned long long)xhci->cmd_ring->first_seg->dma); | ||
673 | 674 | ||
674 | /* Set the address in the Command Ring Control register */ | 675 | /* Set the address in the Command Ring Control register */ |
675 | val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[0]); | 676 | val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[0]); |
@@ -705,15 +706,16 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
705 | sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma); | 706 | sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma); |
706 | if (!xhci->erst.entries) | 707 | if (!xhci->erst.entries) |
707 | goto fail; | 708 | goto fail; |
708 | xhci_dbg(xhci, "// Allocated event ring segment table at 0x%x\n", dma); | 709 | xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n", |
710 | (unsigned long long)dma); | ||
709 | 711 | ||
710 | memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS); | 712 | memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS); |
711 | xhci->erst.num_entries = ERST_NUM_SEGS; | 713 | xhci->erst.num_entries = ERST_NUM_SEGS; |
712 | xhci->erst.erst_dma_addr = dma; | 714 | xhci->erst.erst_dma_addr = dma; |
713 | xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = 0x%x, dma addr = 0x%x\n", | 715 | xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n", |
714 | xhci->erst.num_entries, | 716 | xhci->erst.num_entries, |
715 | (unsigned int) xhci->erst.entries, | 717 | xhci->erst.entries, |
716 | xhci->erst.erst_dma_addr); | 718 | (unsigned long long)xhci->erst.erst_dma_addr); |
717 | 719 | ||
718 | /* set ring base address and size for each segment table entry */ | 720 | /* set ring base address and size for each segment table entry */ |
719 | for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { | 721 | for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { |
@@ -735,8 +737,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
735 | 737 | ||
736 | xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n"); | 738 | xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n"); |
737 | /* set the segment table base address */ | 739 | /* set the segment table base address */ |
738 | xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%x\n", | 740 | xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n", |
739 | xhci->erst.erst_dma_addr); | 741 | (unsigned long long)xhci->erst.erst_dma_addr); |
740 | xhci_writel(xhci, 0, &xhci->ir_set->erst_base[1]); | 742 | xhci_writel(xhci, 0, &xhci->ir_set->erst_base[1]); |
741 | val = xhci_readl(xhci, &xhci->ir_set->erst_base[0]); | 743 | val = xhci_readl(xhci, &xhci->ir_set->erst_base[0]); |
742 | val &= ERST_PTR_MASK; | 744 | val &= ERST_PTR_MASK; |