diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2009-04-29 22:14:08 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-06-16 00:44:50 -0400 |
commit | 700e2052c6814b1b1d2714225d568c5c64bc49ae (patch) | |
tree | 67c62f3c3773d2b856e21662435c839a1aab9dd4 | |
parent | b7258a4aba2b24d5c27a0f6674795e83e7771969 (diff) |
USB: xhci: fix lots of compiler warnings.
Turns out someone never built this code on a 64bit platform.
Someone owes me a beer...
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r-- | drivers/usb/host/xhci-dbg.c | 180 | ||||
-rw-r--r-- | drivers/usb/host/xhci-hcd.c | 37 | ||||
-rw-r--r-- | drivers/usb/host/xhci-mem.c | 64 | ||||
-rw-r--r-- | drivers/usb/host/xhci-ring.c | 72 |
4 files changed, 172 insertions, 181 deletions
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c index 16ef42a0fe85..264c38059d4a 100644 --- a/drivers/usb/host/xhci-dbg.c +++ b/drivers/usb/host/xhci-dbg.c | |||
@@ -30,12 +30,11 @@ void xhci_dbg_regs(struct xhci_hcd *xhci) | |||
30 | { | 30 | { |
31 | u32 temp; | 31 | u32 temp; |
32 | 32 | ||
33 | xhci_dbg(xhci, "// xHCI capability registers at 0x%x:\n", | 33 | xhci_dbg(xhci, "// xHCI capability registers at %p:\n", |
34 | (unsigned int) xhci->cap_regs); | 34 | xhci->cap_regs); |
35 | temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); | 35 | temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); |
36 | xhci_dbg(xhci, "// @%x = 0x%x (CAPLENGTH AND HCIVERSION)\n", | 36 | xhci_dbg(xhci, "// @%p = 0x%x (CAPLENGTH AND HCIVERSION)\n", |
37 | (unsigned int) &xhci->cap_regs->hc_capbase, | 37 | &xhci->cap_regs->hc_capbase, temp); |
38 | (unsigned int) temp); | ||
39 | xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n", | 38 | xhci_dbg(xhci, "// CAPLENGTH: 0x%x\n", |
40 | (unsigned int) HC_LENGTH(temp)); | 39 | (unsigned int) HC_LENGTH(temp)); |
41 | #if 0 | 40 | #if 0 |
@@ -43,29 +42,24 @@ void xhci_dbg_regs(struct xhci_hcd *xhci) | |||
43 | (unsigned int) HC_VERSION(temp)); | 42 | (unsigned int) HC_VERSION(temp)); |
44 | #endif | 43 | #endif |
45 | 44 | ||
46 | xhci_dbg(xhci, "// xHCI operational registers at 0x%x:\n", | 45 | xhci_dbg(xhci, "// xHCI operational registers at %p:\n", xhci->op_regs); |
47 | (unsigned int) xhci->op_regs); | ||
48 | 46 | ||
49 | temp = xhci_readl(xhci, &xhci->cap_regs->run_regs_off); | 47 | temp = xhci_readl(xhci, &xhci->cap_regs->run_regs_off); |
50 | xhci_dbg(xhci, "// @%x = 0x%x RTSOFF\n", | 48 | xhci_dbg(xhci, "// @%p = 0x%x RTSOFF\n", |
51 | (unsigned int) &xhci->cap_regs->run_regs_off, | 49 | &xhci->cap_regs->run_regs_off, |
52 | (unsigned int) temp & RTSOFF_MASK); | 50 | (unsigned int) temp & RTSOFF_MASK); |
53 | xhci_dbg(xhci, "// xHCI runtime registers at 0x%x:\n", | 51 | xhci_dbg(xhci, "// xHCI runtime registers at %p:\n", xhci->run_regs); |
54 | (unsigned int) xhci->run_regs); | ||
55 | 52 | ||
56 | temp = xhci_readl(xhci, &xhci->cap_regs->db_off); | 53 | temp = xhci_readl(xhci, &xhci->cap_regs->db_off); |
57 | xhci_dbg(xhci, "// @%x = 0x%x DBOFF\n", | 54 | xhci_dbg(xhci, "// @%p = 0x%x DBOFF\n", &xhci->cap_regs->db_off, temp); |
58 | (unsigned int) &xhci->cap_regs->db_off, temp); | 55 | xhci_dbg(xhci, "// Doorbell array at %p:\n", xhci->dba); |
59 | xhci_dbg(xhci, "// Doorbell array at 0x%x:\n", | ||
60 | (unsigned int) xhci->dba); | ||
61 | } | 56 | } |
62 | 57 | ||
63 | void xhci_print_cap_regs(struct xhci_hcd *xhci) | 58 | void xhci_print_cap_regs(struct xhci_hcd *xhci) |
64 | { | 59 | { |
65 | u32 temp; | 60 | u32 temp; |
66 | 61 | ||
67 | xhci_dbg(xhci, "xHCI capability registers at 0x%x:\n", | 62 | xhci_dbg(xhci, "xHCI capability registers at %p:\n", xhci->cap_regs); |
68 | (unsigned int) xhci->cap_regs); | ||
69 | 63 | ||
70 | temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); | 64 | temp = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); |
71 | xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:\n", | 65 | xhci_dbg(xhci, "CAPLENGTH AND HCIVERSION 0x%x:\n", |
@@ -146,8 +140,7 @@ void xhci_print_status(struct xhci_hcd *xhci) | |||
146 | 140 | ||
147 | void xhci_print_op_regs(struct xhci_hcd *xhci) | 141 | void xhci_print_op_regs(struct xhci_hcd *xhci) |
148 | { | 142 | { |
149 | xhci_dbg(xhci, "xHCI operational registers at 0x%x:\n", | 143 | xhci_dbg(xhci, "xHCI operational registers at %p:\n", xhci->op_regs); |
150 | (unsigned int) xhci->op_regs); | ||
151 | xhci_print_command_reg(xhci); | 144 | xhci_print_command_reg(xhci); |
152 | xhci_print_status(xhci); | 145 | xhci_print_status(xhci); |
153 | } | 146 | } |
@@ -168,9 +161,8 @@ void xhci_print_ports(struct xhci_hcd *xhci) | |||
168 | addr = &xhci->op_regs->port_status_base; | 161 | addr = &xhci->op_regs->port_status_base; |
169 | for (i = 0; i < ports; i++) { | 162 | for (i = 0; i < ports; i++) { |
170 | for (j = 0; j < NUM_PORT_REGS; ++j) { | 163 | for (j = 0; j < NUM_PORT_REGS; ++j) { |
171 | xhci_dbg(xhci, "0x%x port %s reg = 0x%x\n", | 164 | xhci_dbg(xhci, "%p port %s reg = 0x%x\n", |
172 | (unsigned int) addr, | 165 | addr, names[j], |
173 | names[j], | ||
174 | (unsigned int) xhci_readl(xhci, addr)); | 166 | (unsigned int) xhci_readl(xhci, addr)); |
175 | addr++; | 167 | addr++; |
176 | } | 168 | } |
@@ -187,46 +179,46 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, struct intr_reg *ir_set, int set_n | |||
187 | if (temp == XHCI_INIT_VALUE) | 179 | if (temp == XHCI_INIT_VALUE) |
188 | return; | 180 | return; |
189 | 181 | ||
190 | xhci_dbg(xhci, " 0x%x: ir_set[%i]\n", (unsigned int) ir_set, set_num); | 182 | xhci_dbg(xhci, " %p: ir_set[%i]\n", ir_set, set_num); |
191 | 183 | ||
192 | xhci_dbg(xhci, " 0x%x: ir_set.pending = 0x%x\n", | 184 | xhci_dbg(xhci, " %p: ir_set.pending = 0x%x\n", addr, |
193 | (unsigned int) addr, (unsigned int) temp); | 185 | (unsigned int)temp); |
194 | 186 | ||
195 | addr = &ir_set->irq_control; | 187 | addr = &ir_set->irq_control; |
196 | temp = xhci_readl(xhci, addr); | 188 | temp = xhci_readl(xhci, addr); |
197 | xhci_dbg(xhci, " 0x%x: ir_set.control = 0x%x\n", | 189 | xhci_dbg(xhci, " %p: ir_set.control = 0x%x\n", addr, |
198 | (unsigned int) addr, (unsigned int) temp); | 190 | (unsigned int)temp); |
199 | 191 | ||
200 | addr = &ir_set->erst_size; | 192 | addr = &ir_set->erst_size; |
201 | temp = xhci_readl(xhci, addr); | 193 | temp = xhci_readl(xhci, addr); |
202 | xhci_dbg(xhci, " 0x%x: ir_set.erst_size = 0x%x\n", | 194 | xhci_dbg(xhci, " %p: ir_set.erst_size = 0x%x\n", addr, |
203 | (unsigned int) addr, (unsigned int) temp); | 195 | (unsigned int)temp); |
204 | 196 | ||
205 | addr = &ir_set->rsvd; | 197 | addr = &ir_set->rsvd; |
206 | temp = xhci_readl(xhci, addr); | 198 | temp = xhci_readl(xhci, addr); |
207 | if (temp != XHCI_INIT_VALUE) | 199 | if (temp != XHCI_INIT_VALUE) |
208 | xhci_dbg(xhci, " WARN: 0x%x: ir_set.rsvd = 0x%x\n", | 200 | xhci_dbg(xhci, " WARN: %p: ir_set.rsvd = 0x%x\n", |
209 | (unsigned int) addr, (unsigned int) temp); | 201 | addr, (unsigned int)temp); |
210 | 202 | ||
211 | addr = &ir_set->erst_base[0]; | 203 | addr = &ir_set->erst_base[0]; |
212 | temp = xhci_readl(xhci, addr); | 204 | temp = xhci_readl(xhci, addr); |
213 | xhci_dbg(xhci, " 0x%x: ir_set.erst_base[0] = 0x%x\n", | 205 | xhci_dbg(xhci, " %p: ir_set.erst_base[0] = 0x%x\n", |
214 | (unsigned int) addr, (unsigned int) temp); | 206 | addr, (unsigned int) temp); |
215 | 207 | ||
216 | addr = &ir_set->erst_base[1]; | 208 | addr = &ir_set->erst_base[1]; |
217 | temp = xhci_readl(xhci, addr); | 209 | temp = xhci_readl(xhci, addr); |
218 | xhci_dbg(xhci, " 0x%x: ir_set.erst_base[1] = 0x%x\n", | 210 | xhci_dbg(xhci, " %p: ir_set.erst_base[1] = 0x%x\n", |
219 | (unsigned int) addr, (unsigned int) temp); | 211 | addr, (unsigned int) temp); |
220 | 212 | ||
221 | addr = &ir_set->erst_dequeue[0]; | 213 | addr = &ir_set->erst_dequeue[0]; |
222 | temp = xhci_readl(xhci, addr); | 214 | temp = xhci_readl(xhci, addr); |
223 | xhci_dbg(xhci, " 0x%x: ir_set.erst_dequeue[0] = 0x%x\n", | 215 | xhci_dbg(xhci, " %p: ir_set.erst_dequeue[0] = 0x%x\n", |
224 | (unsigned int) addr, (unsigned int) temp); | 216 | addr, (unsigned int) temp); |
225 | 217 | ||
226 | addr = &ir_set->erst_dequeue[1]; | 218 | addr = &ir_set->erst_dequeue[1]; |
227 | temp = xhci_readl(xhci, addr); | 219 | temp = xhci_readl(xhci, addr); |
228 | xhci_dbg(xhci, " 0x%x: ir_set.erst_dequeue[1] = 0x%x\n", | 220 | xhci_dbg(xhci, " %p: ir_set.erst_dequeue[1] = 0x%x\n", |
229 | (unsigned int) addr, (unsigned int) temp); | 221 | addr, (unsigned int) temp); |
230 | } | 222 | } |
231 | 223 | ||
232 | void xhci_print_run_regs(struct xhci_hcd *xhci) | 224 | void xhci_print_run_regs(struct xhci_hcd *xhci) |
@@ -234,17 +226,16 @@ void xhci_print_run_regs(struct xhci_hcd *xhci) | |||
234 | u32 temp; | 226 | u32 temp; |
235 | int i; | 227 | int i; |
236 | 228 | ||
237 | xhci_dbg(xhci, "xHCI runtime registers at 0x%x:\n", | 229 | xhci_dbg(xhci, "xHCI runtime registers at %p:\n", xhci->run_regs); |
238 | (unsigned int) xhci->run_regs); | ||
239 | temp = xhci_readl(xhci, &xhci->run_regs->microframe_index); | 230 | temp = xhci_readl(xhci, &xhci->run_regs->microframe_index); |
240 | xhci_dbg(xhci, " 0x%x: Microframe index = 0x%x\n", | 231 | xhci_dbg(xhci, " %p: Microframe index = 0x%x\n", |
241 | (unsigned int) &xhci->run_regs->microframe_index, | 232 | &xhci->run_regs->microframe_index, |
242 | (unsigned int) temp); | 233 | (unsigned int) temp); |
243 | for (i = 0; i < 7; ++i) { | 234 | for (i = 0; i < 7; ++i) { |
244 | temp = xhci_readl(xhci, &xhci->run_regs->rsvd[i]); | 235 | temp = xhci_readl(xhci, &xhci->run_regs->rsvd[i]); |
245 | if (temp != XHCI_INIT_VALUE) | 236 | if (temp != XHCI_INIT_VALUE) |
246 | xhci_dbg(xhci, " WARN: 0x%x: Rsvd[%i] = 0x%x\n", | 237 | xhci_dbg(xhci, " WARN: %p: Rsvd[%i] = 0x%x\n", |
247 | (unsigned int) &xhci->run_regs->rsvd[i], | 238 | &xhci->run_regs->rsvd[i], |
248 | i, (unsigned int) temp); | 239 | i, (unsigned int) temp); |
249 | } | 240 | } |
250 | } | 241 | } |
@@ -347,14 +338,16 @@ void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg) | |||
347 | 338 | ||
348 | void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring) | 339 | void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring) |
349 | { | 340 | { |
350 | xhci_dbg(xhci, "Ring deq = 0x%x (virt), 0x%x (dma)\n", | 341 | xhci_dbg(xhci, "Ring deq = %p (virt), 0x%llx (dma)\n", |
351 | (unsigned int) ring->dequeue, | 342 | ring->dequeue, |
352 | trb_virt_to_dma(ring->deq_seg, ring->dequeue)); | 343 | (unsigned long long)trb_virt_to_dma(ring->deq_seg, |
344 | ring->dequeue)); | ||
353 | xhci_dbg(xhci, "Ring deq updated %u times\n", | 345 | xhci_dbg(xhci, "Ring deq updated %u times\n", |
354 | ring->deq_updates); | 346 | ring->deq_updates); |
355 | xhci_dbg(xhci, "Ring enq = 0x%x (virt), 0x%x (dma)\n", | 347 | xhci_dbg(xhci, "Ring enq = %p (virt), 0x%llx (dma)\n", |
356 | (unsigned int) ring->enqueue, | 348 | ring->enqueue, |
357 | trb_virt_to_dma(ring->enq_seg, ring->enqueue)); | 349 | (unsigned long long)trb_virt_to_dma(ring->enq_seg, |
350 | ring->enqueue)); | ||
358 | xhci_dbg(xhci, "Ring enq updated %u times\n", | 351 | xhci_dbg(xhci, "Ring enq updated %u times\n", |
359 | ring->enq_updates); | 352 | ring->enq_updates); |
360 | } | 353 | } |
@@ -418,42 +411,42 @@ void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_ad | |||
418 | /* Fields are 32 bits wide, DMA addresses are in bytes */ | 411 | /* Fields are 32 bits wide, DMA addresses are in bytes */ |
419 | int field_size = 32 / 8; | 412 | int field_size = 32 / 8; |
420 | 413 | ||
421 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - drop flags\n", | 414 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - drop flags\n", |
422 | (unsigned int) &ctx->drop_flags, | 415 | &ctx->drop_flags, (unsigned long long)dma, |
423 | dma, ctx->drop_flags); | 416 | ctx->drop_flags); |
424 | dma += field_size; | 417 | dma += field_size; |
425 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - add flags\n", | 418 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - add flags\n", |
426 | (unsigned int) &ctx->add_flags, | 419 | &ctx->add_flags, (unsigned long long)dma, |
427 | dma, ctx->add_flags); | 420 | ctx->add_flags); |
428 | dma += field_size; | 421 | dma += field_size; |
429 | for (i = 0; i > 6; ++i) { | 422 | for (i = 0; i > 6; ++i) { |
430 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - rsvd[%d]\n", | 423 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n", |
431 | (unsigned int) &ctx->rsvd[i], | 424 | &ctx->rsvd[i], (unsigned long long)dma, |
432 | dma, ctx->rsvd[i], i); | 425 | ctx->rsvd[i], i); |
433 | dma += field_size; | 426 | dma += field_size; |
434 | } | 427 | } |
435 | 428 | ||
436 | xhci_dbg(xhci, "Slot Context:\n"); | 429 | xhci_dbg(xhci, "Slot Context:\n"); |
437 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - dev_info\n", | 430 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info\n", |
438 | (unsigned int) &ctx->slot.dev_info, | 431 | &ctx->slot.dev_info, |
439 | dma, ctx->slot.dev_info); | 432 | (unsigned long long)dma, ctx->slot.dev_info); |
440 | dma += field_size; | 433 | dma += field_size; |
441 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - dev_info2\n", | 434 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info2\n", |
442 | (unsigned int) &ctx->slot.dev_info2, | 435 | &ctx->slot.dev_info2, |
443 | dma, ctx->slot.dev_info2); | 436 | (unsigned long long)dma, ctx->slot.dev_info2); |
444 | dma += field_size; | 437 | dma += field_size; |
445 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - tt_info\n", | 438 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tt_info\n", |
446 | (unsigned int) &ctx->slot.tt_info, | 439 | &ctx->slot.tt_info, |
447 | dma, ctx->slot.tt_info); | 440 | (unsigned long long)dma, ctx->slot.tt_info); |
448 | dma += field_size; | 441 | dma += field_size; |
449 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - dev_state\n", | 442 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_state\n", |
450 | (unsigned int) &ctx->slot.dev_state, | 443 | &ctx->slot.dev_state, |
451 | dma, ctx->slot.dev_state); | 444 | (unsigned long long)dma, ctx->slot.dev_state); |
452 | dma += field_size; | 445 | dma += field_size; |
453 | for (i = 0; i > 4; ++i) { | 446 | for (i = 0; i > 4; ++i) { |
454 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - rsvd[%d]\n", | 447 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n", |
455 | (unsigned int) &ctx->slot.reserved[i], | 448 | &ctx->slot.reserved[i], (unsigned long long)dma, |
456 | dma, ctx->slot.reserved[i], i); | 449 | ctx->slot.reserved[i], i); |
457 | dma += field_size; | 450 | dma += field_size; |
458 | } | 451 | } |
459 | 452 | ||
@@ -461,30 +454,31 @@ void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_ad | |||
461 | last_ep_ctx = last_ep + 1; | 454 | last_ep_ctx = last_ep + 1; |
462 | for (i = 0; i < last_ep_ctx; ++i) { | 455 | for (i = 0; i < last_ep_ctx; ++i) { |
463 | xhci_dbg(xhci, "Endpoint %02d Context:\n", i); | 456 | xhci_dbg(xhci, "Endpoint %02d Context:\n", i); |
464 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - ep_info\n", | 457 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info\n", |
465 | (unsigned int) &ctx->ep[i].ep_info, | 458 | &ctx->ep[i].ep_info, |
466 | dma, ctx->ep[i].ep_info); | 459 | (unsigned long long)dma, ctx->ep[i].ep_info); |
467 | dma += field_size; | 460 | dma += field_size; |
468 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - ep_info2\n", | 461 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info2\n", |
469 | (unsigned int) &ctx->ep[i].ep_info2, | 462 | &ctx->ep[i].ep_info2, |
470 | dma, ctx->ep[i].ep_info2); | 463 | (unsigned long long)dma, ctx->ep[i].ep_info2); |
471 | dma += field_size; | 464 | dma += field_size; |
472 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - deq[0]\n", | 465 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[0]\n", |
473 | (unsigned int) &ctx->ep[i].deq[0], | 466 | &ctx->ep[i].deq[0], |
474 | dma, ctx->ep[i].deq[0]); | 467 | (unsigned long long)dma, ctx->ep[i].deq[0]); |
475 | dma += field_size; | 468 | dma += field_size; |
476 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - deq[1]\n", | 469 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[1]\n", |
477 | (unsigned int) &ctx->ep[i].deq[1], | 470 | &ctx->ep[i].deq[1], |
478 | dma, ctx->ep[i].deq[1]); | 471 | (unsigned long long)dma, ctx->ep[i].deq[1]); |
479 | dma += field_size; | 472 | dma += field_size; |
480 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - tx_info\n", | 473 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tx_info\n", |
481 | (unsigned int) &ctx->ep[i].tx_info, | 474 | &ctx->ep[i].tx_info, |
482 | dma, ctx->ep[i].tx_info); | 475 | (unsigned long long)dma, ctx->ep[i].tx_info); |
483 | dma += field_size; | 476 | dma += field_size; |
484 | for (j = 0; j < 3; ++j) { | 477 | for (j = 0; j < 3; ++j) { |
485 | xhci_dbg(xhci, "@%08x (virt) @%08x (dma) %#08x - rsvd[%d]\n", | 478 | xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n", |
486 | (unsigned int) &ctx->ep[i].reserved[j], | 479 | &ctx->ep[i].reserved[j], |
487 | dma, ctx->ep[i].reserved[j], j); | 480 | (unsigned long long)dma, |
481 | ctx->ep[i].reserved[j], j); | ||
488 | dma += field_size; | 482 | dma += field_size; |
489 | } | 483 | } |
490 | } | 484 | } |
diff --git a/drivers/usb/host/xhci-hcd.c b/drivers/usb/host/xhci-hcd.c index 197e6bb5b93d..9ffa1fa507cf 100644 --- a/drivers/usb/host/xhci-hcd.c +++ b/drivers/usb/host/xhci-hcd.c | |||
@@ -397,10 +397,8 @@ int xhci_run(struct usb_hcd *hcd) | |||
397 | xhci_writel(xhci, temp, &xhci->op_regs->command); | 397 | xhci_writel(xhci, temp, &xhci->op_regs->command); |
398 | 398 | ||
399 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); | 399 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
400 | xhci_dbg(xhci, "// Enabling event ring interrupter 0x%x" | 400 | xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n", |
401 | " by writing 0x%x to irq_pending\n", | 401 | xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); |
402 | (unsigned int) xhci->ir_set, | ||
403 | (unsigned int) ER_IRQ_ENABLE(temp)); | ||
404 | xhci_writel(xhci, ER_IRQ_ENABLE(temp), | 402 | xhci_writel(xhci, ER_IRQ_ENABLE(temp), |
405 | &xhci->ir_set->irq_pending); | 403 | &xhci->ir_set->irq_pending); |
406 | xhci_print_ir_set(xhci, xhci->ir_set, 0); | 404 | xhci_print_ir_set(xhci, xhci->ir_set, 0); |
@@ -431,8 +429,7 @@ int xhci_run(struct usb_hcd *hcd) | |||
431 | xhci_writel(xhci, temp, &xhci->op_regs->command); | 429 | xhci_writel(xhci, temp, &xhci->op_regs->command); |
432 | /* Flush PCI posted writes */ | 430 | /* Flush PCI posted writes */ |
433 | temp = xhci_readl(xhci, &xhci->op_regs->command); | 431 | temp = xhci_readl(xhci, &xhci->op_regs->command); |
434 | xhci_dbg(xhci, "// @%x = 0x%x\n", | 432 | xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp); |
435 | (unsigned int) &xhci->op_regs->command, temp); | ||
436 | if (doorbell) | 433 | if (doorbell) |
437 | (*doorbell)(xhci); | 434 | (*doorbell)(xhci); |
438 | 435 | ||
@@ -660,7 +657,7 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) | |||
660 | if (ret || !urb->hcpriv) | 657 | if (ret || !urb->hcpriv) |
661 | goto done; | 658 | goto done; |
662 | 659 | ||
663 | xhci_dbg(xhci, "Cancel URB 0x%x\n", (unsigned int) urb); | 660 | xhci_dbg(xhci, "Cancel URB %p\n", urb); |
664 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); | 661 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
665 | ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index]; | 662 | ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index]; |
666 | td = (struct xhci_td *) urb->hcpriv; | 663 | td = (struct xhci_td *) urb->hcpriv; |
@@ -702,10 +699,10 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |||
702 | int ret; | 699 | int ret; |
703 | 700 | ||
704 | ret = xhci_check_args(hcd, udev, ep, 1, __func__); | 701 | ret = xhci_check_args(hcd, udev, ep, 1, __func__); |
705 | xhci_dbg(xhci, "%s called for udev %#x\n", __func__, (unsigned int) udev); | ||
706 | if (ret <= 0) | 702 | if (ret <= 0) |
707 | return ret; | 703 | return ret; |
708 | xhci = hcd_to_xhci(hcd); | 704 | xhci = hcd_to_xhci(hcd); |
705 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); | ||
709 | 706 | ||
710 | drop_flag = xhci_get_endpoint_flag(&ep->desc); | 707 | drop_flag = xhci_get_endpoint_flag(&ep->desc); |
711 | if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) { | 708 | if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) { |
@@ -730,8 +727,8 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |||
730 | */ | 727 | */ |
731 | if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED || | 728 | if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED || |
732 | in_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) { | 729 | in_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) { |
733 | xhci_warn(xhci, "xHCI %s called with disabled ep %#x\n", | 730 | xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", |
734 | __func__, (unsigned int) ep); | 731 | __func__, ep); |
735 | spin_unlock_irqrestore(&xhci->lock, flags); | 732 | spin_unlock_irqrestore(&xhci->lock, flags); |
736 | return 0; | 733 | return 0; |
737 | } | 734 | } |
@@ -817,8 +814,8 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |||
817 | * ignore this request. | 814 | * ignore this request. |
818 | */ | 815 | */ |
819 | if (in_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) { | 816 | if (in_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) { |
820 | xhci_warn(xhci, "xHCI %s called with enabled ep %#x\n", | 817 | xhci_warn(xhci, "xHCI %s called with enabled ep %p\n", |
821 | __func__, (unsigned int) ep); | 818 | __func__, ep); |
822 | spin_unlock_irqrestore(&xhci->lock, flags); | 819 | spin_unlock_irqrestore(&xhci->lock, flags); |
823 | return 0; | 820 | return 0; |
824 | } | 821 | } |
@@ -904,7 +901,7 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) | |||
904 | spin_unlock_irqrestore(&xhci->lock, flags); | 901 | spin_unlock_irqrestore(&xhci->lock, flags); |
905 | return -EINVAL; | 902 | return -EINVAL; |
906 | } | 903 | } |
907 | xhci_dbg(xhci, "%s called for udev %#x\n", __func__, (unsigned int) udev); | 904 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
908 | virt_dev = xhci->devs[udev->slot_id]; | 905 | virt_dev = xhci->devs[udev->slot_id]; |
909 | 906 | ||
910 | /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ | 907 | /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ |
@@ -1009,7 +1006,7 @@ void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) | |||
1009 | spin_unlock_irqrestore(&xhci->lock, flags); | 1006 | spin_unlock_irqrestore(&xhci->lock, flags); |
1010 | return; | 1007 | return; |
1011 | } | 1008 | } |
1012 | xhci_dbg(xhci, "%s called for udev %#x\n", __func__, (unsigned int) udev); | 1009 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
1013 | virt_dev = xhci->devs[udev->slot_id]; | 1010 | virt_dev = xhci->devs[udev->slot_id]; |
1014 | /* Free any rings allocated for added endpoints */ | 1011 | /* Free any rings allocated for added endpoints */ |
1015 | for (i = 0; i < 31; ++i) { | 1012 | for (i = 0; i < 31; ++i) { |
@@ -1184,16 +1181,16 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) | |||
1184 | xhci_dbg(xhci, "Op regs DCBAA ptr[0] = %#08x\n", temp); | 1181 | xhci_dbg(xhci, "Op regs DCBAA ptr[0] = %#08x\n", temp); |
1185 | temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[1]); | 1182 | temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[1]); |
1186 | xhci_dbg(xhci, "Op regs DCBAA ptr[1] = %#08x\n", temp); | 1183 | xhci_dbg(xhci, "Op regs DCBAA ptr[1] = %#08x\n", temp); |
1187 | xhci_dbg(xhci, "Slot ID %d dcbaa entry[0] @%08x = %#08x\n", | 1184 | xhci_dbg(xhci, "Slot ID %d dcbaa entry[0] @%p = %#08x\n", |
1188 | udev->slot_id, | 1185 | udev->slot_id, |
1189 | (unsigned int) &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id], | 1186 | &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id], |
1190 | xhci->dcbaa->dev_context_ptrs[2*udev->slot_id]); | 1187 | xhci->dcbaa->dev_context_ptrs[2*udev->slot_id]); |
1191 | xhci_dbg(xhci, "Slot ID %d dcbaa entry[1] @%08x = %#08x\n", | 1188 | xhci_dbg(xhci, "Slot ID %d dcbaa entry[1] @%p = %#08x\n", |
1192 | udev->slot_id, | 1189 | udev->slot_id, |
1193 | (unsigned int) &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1], | 1190 | &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1], |
1194 | xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1]); | 1191 | xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1]); |
1195 | xhci_dbg(xhci, "Output Context DMA address = %#08x\n", | 1192 | xhci_dbg(xhci, "Output Context DMA address = %#08llx\n", |
1196 | virt_dev->out_ctx_dma); | 1193 | (unsigned long long)virt_dev->out_ctx_dma); |
1197 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); | 1194 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
1198 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 2); | 1195 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 2); |
1199 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); | 1196 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); |
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index e81d10a653ef..6b75ca9180e3 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c | |||
@@ -40,16 +40,15 @@ static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flag | |||
40 | seg = kzalloc(sizeof *seg, flags); | 40 | seg = kzalloc(sizeof *seg, flags); |
41 | if (!seg) | 41 | if (!seg) |
42 | return 0; | 42 | return 0; |
43 | xhci_dbg(xhci, "Allocating priv segment structure at 0x%x\n", | 43 | xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg); |
44 | (unsigned int) seg); | ||
45 | 44 | ||
46 | seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma); | 45 | seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma); |
47 | if (!seg->trbs) { | 46 | if (!seg->trbs) { |
48 | kfree(seg); | 47 | kfree(seg); |
49 | return 0; | 48 | return 0; |
50 | } | 49 | } |
51 | xhci_dbg(xhci, "// Allocating segment at 0x%x (virtual) 0x%x (DMA)\n", | 50 | xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n", |
52 | (unsigned int) seg->trbs, (u32) dma); | 51 | seg->trbs, (unsigned long long)dma); |
53 | 52 | ||
54 | memset(seg->trbs, 0, SEGMENT_SIZE); | 53 | memset(seg->trbs, 0, SEGMENT_SIZE); |
55 | seg->dma = dma; | 54 | seg->dma = dma; |
@@ -63,14 +62,12 @@ static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) | |||
63 | if (!seg) | 62 | if (!seg) |
64 | return; | 63 | return; |
65 | if (seg->trbs) { | 64 | if (seg->trbs) { |
66 | xhci_dbg(xhci, "Freeing DMA segment at 0x%x" | 65 | xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n", |
67 | " (virtual) 0x%x (DMA)\n", | 66 | seg->trbs, (unsigned long long)seg->dma); |
68 | (unsigned int) seg->trbs, (u32) seg->dma); | ||
69 | dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); | 67 | dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); |
70 | seg->trbs = NULL; | 68 | seg->trbs = NULL; |
71 | } | 69 | } |
72 | xhci_dbg(xhci, "Freeing priv segment structure at 0x%x\n", | 70 | xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg); |
73 | (unsigned int) seg); | ||
74 | kfree(seg); | 71 | kfree(seg); |
75 | } | 72 | } |
76 | 73 | ||
@@ -98,8 +95,9 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, | |||
98 | val |= TRB_TYPE(TRB_LINK); | 95 | val |= TRB_TYPE(TRB_LINK); |
99 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; | 96 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; |
100 | } | 97 | } |
101 | xhci_dbg(xhci, "Linking segment 0x%x to segment 0x%x (DMA)\n", | 98 | xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n", |
102 | prev->dma, next->dma); | 99 | (unsigned long long)prev->dma, |
100 | (unsigned long long)next->dma); | ||
103 | } | 101 | } |
104 | 102 | ||
105 | /* XXX: Do we need the hcd structure in all these functions? */ | 103 | /* XXX: Do we need the hcd structure in all these functions? */ |
@@ -112,7 +110,7 @@ void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring) | |||
112 | return; | 110 | return; |
113 | first_seg = ring->first_seg; | 111 | first_seg = ring->first_seg; |
114 | seg = first_seg->next; | 112 | seg = first_seg->next; |
115 | xhci_dbg(xhci, "Freeing ring at 0x%x\n", (unsigned int) ring); | 113 | xhci_dbg(xhci, "Freeing ring at %p\n", ring); |
116 | while (seg != first_seg) { | 114 | while (seg != first_seg) { |
117 | struct xhci_segment *next = seg->next; | 115 | struct xhci_segment *next = seg->next; |
118 | xhci_segment_free(xhci, seg); | 116 | xhci_segment_free(xhci, seg); |
@@ -137,7 +135,7 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, | |||
137 | struct xhci_segment *prev; | 135 | struct xhci_segment *prev; |
138 | 136 | ||
139 | ring = kzalloc(sizeof *(ring), flags); | 137 | ring = kzalloc(sizeof *(ring), flags); |
140 | xhci_dbg(xhci, "Allocating ring at 0x%x\n", (unsigned int) ring); | 138 | xhci_dbg(xhci, "Allocating ring at %p\n", ring); |
141 | if (!ring) | 139 | if (!ring) |
142 | return 0; | 140 | return 0; |
143 | 141 | ||
@@ -169,8 +167,8 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, | |||
169 | /* See section 4.9.2.1 and 6.4.4.1 */ | 167 | /* See section 4.9.2.1 and 6.4.4.1 */ |
170 | prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE); | 168 | prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE); |
171 | xhci_dbg(xhci, "Wrote link toggle flag to" | 169 | xhci_dbg(xhci, "Wrote link toggle flag to" |
172 | " segment 0x%x (virtual), 0x%x (DMA)\n", | 170 | " segment %p (virtual), 0x%llx (DMA)\n", |
173 | (unsigned int) prev, (u32) prev->dma); | 171 | prev, (unsigned long long)prev->dma); |
174 | } | 172 | } |
175 | /* The ring is empty, so the enqueue pointer == dequeue pointer */ | 173 | /* The ring is empty, so the enqueue pointer == dequeue pointer */ |
176 | ring->enqueue = ring->first_seg->trbs; | 174 | ring->enqueue = ring->first_seg->trbs; |
@@ -242,7 +240,8 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
242 | if (!dev->out_ctx) | 240 | if (!dev->out_ctx) |
243 | goto fail; | 241 | goto fail; |
244 | dev->out_ctx_dma = dma; | 242 | dev->out_ctx_dma = dma; |
245 | xhci_dbg(xhci, "Slot %d output ctx = 0x%x (dma)\n", slot_id, dma); | 243 | xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id, |
244 | (unsigned long long)dma); | ||
246 | memset(dev->out_ctx, 0, sizeof(*dev->out_ctx)); | 245 | memset(dev->out_ctx, 0, sizeof(*dev->out_ctx)); |
247 | 246 | ||
248 | /* Allocate the (input) device context for address device command */ | 247 | /* Allocate the (input) device context for address device command */ |
@@ -250,7 +249,8 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
250 | if (!dev->in_ctx) | 249 | if (!dev->in_ctx) |
251 | goto fail; | 250 | goto fail; |
252 | dev->in_ctx_dma = dma; | 251 | dev->in_ctx_dma = dma; |
253 | xhci_dbg(xhci, "Slot %d input ctx = 0x%x (dma)\n", slot_id, dma); | 252 | xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id, |
253 | (unsigned long long)dma); | ||
254 | memset(dev->in_ctx, 0, sizeof(*dev->in_ctx)); | 254 | memset(dev->in_ctx, 0, sizeof(*dev->in_ctx)); |
255 | 255 | ||
256 | /* Allocate endpoint 0 ring */ | 256 | /* Allocate endpoint 0 ring */ |
@@ -266,10 +266,10 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
266 | */ | 266 | */ |
267 | xhci->dcbaa->dev_context_ptrs[2*slot_id] = | 267 | xhci->dcbaa->dev_context_ptrs[2*slot_id] = |
268 | (u32) dev->out_ctx_dma + (32); | 268 | (u32) dev->out_ctx_dma + (32); |
269 | xhci_dbg(xhci, "Set slot id %d dcbaa entry 0x%x to 0x%x\n", | 269 | xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", |
270 | slot_id, | 270 | slot_id, |
271 | (unsigned int) &xhci->dcbaa->dev_context_ptrs[2*slot_id], | 271 | &xhci->dcbaa->dev_context_ptrs[2*slot_id], |
272 | dev->out_ctx_dma); | 272 | (unsigned long long)dev->out_ctx_dma); |
273 | xhci->dcbaa->dev_context_ptrs[2*slot_id + 1] = 0; | 273 | xhci->dcbaa->dev_context_ptrs[2*slot_id + 1] = 0; |
274 | 274 | ||
275 | return 1; | 275 | return 1; |
@@ -339,7 +339,7 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud | |||
339 | dev->in_ctx->slot.tt_info = udev->tt->hub->slot_id; | 339 | dev->in_ctx->slot.tt_info = udev->tt->hub->slot_id; |
340 | dev->in_ctx->slot.tt_info |= udev->ttport << 8; | 340 | dev->in_ctx->slot.tt_info |= udev->ttport << 8; |
341 | } | 341 | } |
342 | xhci_dbg(xhci, "udev->tt = 0x%x\n", (unsigned int) udev->tt); | 342 | xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); |
343 | xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); | 343 | xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); |
344 | 344 | ||
345 | /* Step 4 - ring already allocated */ | 345 | /* Step 4 - ring already allocated */ |
@@ -643,8 +643,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
643 | goto fail; | 643 | goto fail; |
644 | memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa)); | 644 | memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa)); |
645 | xhci->dcbaa->dma = dma; | 645 | xhci->dcbaa->dma = dma; |
646 | xhci_dbg(xhci, "// Device context base array address = 0x%x (DMA), 0x%x (virt)\n", | 646 | xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n", |
647 | xhci->dcbaa->dma, (unsigned int) xhci->dcbaa); | 647 | (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa); |
648 | xhci_writel(xhci, (u32) 0, &xhci->op_regs->dcbaa_ptr[1]); | 648 | xhci_writel(xhci, (u32) 0, &xhci->op_regs->dcbaa_ptr[1]); |
649 | xhci_writel(xhci, dma, &xhci->op_regs->dcbaa_ptr[0]); | 649 | xhci_writel(xhci, dma, &xhci->op_regs->dcbaa_ptr[0]); |
650 | 650 | ||
@@ -668,8 +668,9 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
668 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags); | 668 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags); |
669 | if (!xhci->cmd_ring) | 669 | if (!xhci->cmd_ring) |
670 | goto fail; | 670 | goto fail; |
671 | xhci_dbg(xhci, "Allocated command ring at 0x%x\n", (unsigned int) xhci->cmd_ring); | 671 | xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring); |
672 | xhci_dbg(xhci, "First segment DMA is 0x%x\n", (unsigned int) xhci->cmd_ring->first_seg->dma); | 672 | xhci_dbg(xhci, "First segment DMA is 0x%llx\n", |
673 | (unsigned long long)xhci->cmd_ring->first_seg->dma); | ||
673 | 674 | ||
674 | /* Set the address in the Command Ring Control register */ | 675 | /* Set the address in the Command Ring Control register */ |
675 | val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[0]); | 676 | val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[0]); |
@@ -705,15 +706,16 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
705 | sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma); | 706 | sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma); |
706 | if (!xhci->erst.entries) | 707 | if (!xhci->erst.entries) |
707 | goto fail; | 708 | goto fail; |
708 | xhci_dbg(xhci, "// Allocated event ring segment table at 0x%x\n", dma); | 709 | xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n", |
710 | (unsigned long long)dma); | ||
709 | 711 | ||
710 | memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS); | 712 | memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS); |
711 | xhci->erst.num_entries = ERST_NUM_SEGS; | 713 | xhci->erst.num_entries = ERST_NUM_SEGS; |
712 | xhci->erst.erst_dma_addr = dma; | 714 | xhci->erst.erst_dma_addr = dma; |
713 | xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = 0x%x, dma addr = 0x%x\n", | 715 | xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n", |
714 | xhci->erst.num_entries, | 716 | xhci->erst.num_entries, |
715 | (unsigned int) xhci->erst.entries, | 717 | xhci->erst.entries, |
716 | xhci->erst.erst_dma_addr); | 718 | (unsigned long long)xhci->erst.erst_dma_addr); |
717 | 719 | ||
718 | /* set ring base address and size for each segment table entry */ | 720 | /* set ring base address and size for each segment table entry */ |
719 | for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { | 721 | for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { |
@@ -735,8 +737,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
735 | 737 | ||
736 | xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n"); | 738 | xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n"); |
737 | /* set the segment table base address */ | 739 | /* set the segment table base address */ |
738 | xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%x\n", | 740 | xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n", |
739 | xhci->erst.erst_dma_addr); | 741 | (unsigned long long)xhci->erst.erst_dma_addr); |
740 | xhci_writel(xhci, 0, &xhci->ir_set->erst_base[1]); | 742 | xhci_writel(xhci, 0, &xhci->ir_set->erst_base[1]); |
741 | val = xhci_readl(xhci, &xhci->ir_set->erst_base[0]); | 743 | val = xhci_readl(xhci, &xhci->ir_set->erst_base[0]); |
742 | val &= ERST_PTR_MASK; | 744 | val &= ERST_PTR_MASK; |
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 1feca20612d1..9d6874710669 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -74,12 +74,12 @@ | |||
74 | dma_addr_t trb_virt_to_dma(struct xhci_segment *seg, | 74 | dma_addr_t trb_virt_to_dma(struct xhci_segment *seg, |
75 | union xhci_trb *trb) | 75 | union xhci_trb *trb) |
76 | { | 76 | { |
77 | unsigned int offset; | 77 | dma_addr_t offset; |
78 | 78 | ||
79 | if (!seg || !trb || (void *) trb < (void *) seg->trbs) | 79 | if (!seg || !trb || (void *) trb < (void *) seg->trbs) |
80 | return 0; | 80 | return 0; |
81 | /* offset in bytes, since these are byte-addressable */ | 81 | /* offset in bytes, since these are byte-addressable */ |
82 | offset = (unsigned int) trb - (unsigned int) seg->trbs; | 82 | offset = trb - seg->trbs; |
83 | /* SEGMENT_SIZE in bytes, trbs are 16-byte aligned */ | 83 | /* SEGMENT_SIZE in bytes, trbs are 16-byte aligned */ |
84 | if (offset > SEGMENT_SIZE || (offset % sizeof(*trb)) != 0) | 84 | if (offset > SEGMENT_SIZE || (offset % sizeof(*trb)) != 0) |
85 | return 0; | 85 | return 0; |
@@ -145,8 +145,8 @@ static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer | |||
145 | if (consumer && last_trb_on_last_seg(xhci, ring, ring->deq_seg, next)) { | 145 | if (consumer && last_trb_on_last_seg(xhci, ring, ring->deq_seg, next)) { |
146 | ring->cycle_state = (ring->cycle_state ? 0 : 1); | 146 | ring->cycle_state = (ring->cycle_state ? 0 : 1); |
147 | if (!in_interrupt()) | 147 | if (!in_interrupt()) |
148 | xhci_dbg(xhci, "Toggle cycle state for ring 0x%x = %i\n", | 148 | xhci_dbg(xhci, "Toggle cycle state for ring %p = %i\n", |
149 | (unsigned int) ring, | 149 | ring, |
150 | (unsigned int) ring->cycle_state); | 150 | (unsigned int) ring->cycle_state); |
151 | } | 151 | } |
152 | ring->deq_seg = ring->deq_seg->next; | 152 | ring->deq_seg = ring->deq_seg->next; |
@@ -195,8 +195,8 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer | |||
195 | if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { | 195 | if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { |
196 | ring->cycle_state = (ring->cycle_state ? 0 : 1); | 196 | ring->cycle_state = (ring->cycle_state ? 0 : 1); |
197 | if (!in_interrupt()) | 197 | if (!in_interrupt()) |
198 | xhci_dbg(xhci, "Toggle cycle state for ring 0x%x = %i\n", | 198 | xhci_dbg(xhci, "Toggle cycle state for ring %p = %i\n", |
199 | (unsigned int) ring, | 199 | ring, |
200 | (unsigned int) ring->cycle_state); | 200 | (unsigned int) ring->cycle_state); |
201 | } | 201 | } |
202 | } | 202 | } |
@@ -387,12 +387,12 @@ void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, | |||
387 | */ | 387 | */ |
388 | cur_trb->generic.field[3] &= ~TRB_CHAIN; | 388 | cur_trb->generic.field[3] &= ~TRB_CHAIN; |
389 | xhci_dbg(xhci, "Cancel (unchain) link TRB\n"); | 389 | xhci_dbg(xhci, "Cancel (unchain) link TRB\n"); |
390 | xhci_dbg(xhci, "Address = 0x%x (0x%x dma); " | 390 | xhci_dbg(xhci, "Address = %p (0x%llx dma); " |
391 | "in seg 0x%x (0x%x dma)\n", | 391 | "in seg %p (0x%llx dma)\n", |
392 | (unsigned int) cur_trb, | 392 | cur_trb, |
393 | trb_virt_to_dma(cur_seg, cur_trb), | 393 | (unsigned long long)trb_virt_to_dma(cur_seg, cur_trb), |
394 | (unsigned int) cur_seg, | 394 | cur_seg, |
395 | cur_seg->dma); | 395 | (unsigned long long)cur_seg->dma); |
396 | } else { | 396 | } else { |
397 | cur_trb->generic.field[0] = 0; | 397 | cur_trb->generic.field[0] = 0; |
398 | cur_trb->generic.field[1] = 0; | 398 | cur_trb->generic.field[1] = 0; |
@@ -400,12 +400,12 @@ void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, | |||
400 | /* Preserve only the cycle bit of this TRB */ | 400 | /* Preserve only the cycle bit of this TRB */ |
401 | cur_trb->generic.field[3] &= TRB_CYCLE; | 401 | cur_trb->generic.field[3] &= TRB_CYCLE; |
402 | cur_trb->generic.field[3] |= TRB_TYPE(TRB_TR_NOOP); | 402 | cur_trb->generic.field[3] |= TRB_TYPE(TRB_TR_NOOP); |
403 | xhci_dbg(xhci, "Cancel TRB 0x%x (0x%x dma) " | 403 | xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) " |
404 | "in seg 0x%x (0x%x dma)\n", | 404 | "in seg %p (0x%llx dma)\n", |
405 | (unsigned int) cur_trb, | 405 | cur_trb, |
406 | trb_virt_to_dma(cur_seg, cur_trb), | 406 | (unsigned long long)trb_virt_to_dma(cur_seg, cur_trb), |
407 | (unsigned int) cur_seg, | 407 | cur_seg, |
408 | cur_seg->dma); | 408 | (unsigned long long)cur_seg->dma); |
409 | } | 409 | } |
410 | if (cur_trb == cur_td->last_trb) | 410 | if (cur_trb == cur_td->last_trb) |
411 | break; | 411 | break; |
@@ -456,9 +456,9 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci, | |||
456 | */ | 456 | */ |
457 | list_for_each(entry, &ep_ring->cancelled_td_list) { | 457 | list_for_each(entry, &ep_ring->cancelled_td_list) { |
458 | cur_td = list_entry(entry, struct xhci_td, cancelled_td_list); | 458 | cur_td = list_entry(entry, struct xhci_td, cancelled_td_list); |
459 | xhci_dbg(xhci, "Cancelling TD starting at 0x%x, 0x%x (dma).\n", | 459 | xhci_dbg(xhci, "Cancelling TD starting at %p, 0x%llx (dma).\n", |
460 | (unsigned int) cur_td->first_trb, | 460 | cur_td->first_trb, |
461 | trb_virt_to_dma(cur_td->start_seg, cur_td->first_trb)); | 461 | (unsigned long long)trb_virt_to_dma(cur_td->start_seg, cur_td->first_trb)); |
462 | /* | 462 | /* |
463 | * If we stopped on the TD we need to cancel, then we have to | 463 | * If we stopped on the TD we need to cancel, then we have to |
464 | * move the xHC endpoint ring dequeue pointer past this TD. | 464 | * move the xHC endpoint ring dequeue pointer past this TD. |
@@ -480,12 +480,12 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci, | |||
480 | 480 | ||
481 | /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */ | 481 | /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */ |
482 | if (deq_state.new_deq_ptr && deq_state.new_deq_seg) { | 482 | if (deq_state.new_deq_ptr && deq_state.new_deq_seg) { |
483 | xhci_dbg(xhci, "Set TR Deq Ptr cmd, new deq seg = 0x%x (0x%x dma), " | 483 | xhci_dbg(xhci, "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), " |
484 | "new deq ptr = 0x%x (0x%x dma), new cycle = %u\n", | 484 | "new deq ptr = %p (0x%llx dma), new cycle = %u\n", |
485 | (unsigned int) deq_state.new_deq_seg, | 485 | deq_state.new_deq_seg, |
486 | deq_state.new_deq_seg->dma, | 486 | (unsigned long long)deq_state.new_deq_seg->dma, |
487 | (unsigned int) deq_state.new_deq_ptr, | 487 | deq_state.new_deq_ptr, |
488 | trb_virt_to_dma(deq_state.new_deq_seg, deq_state.new_deq_ptr), | 488 | (unsigned long long)trb_virt_to_dma(deq_state.new_deq_seg, deq_state.new_deq_ptr), |
489 | deq_state.new_cycle_state); | 489 | deq_state.new_cycle_state); |
490 | queue_set_tr_deq(xhci, slot_id, ep_index, | 490 | queue_set_tr_deq(xhci, slot_id, ep_index, |
491 | deq_state.new_deq_seg, | 491 | deq_state.new_deq_seg, |
@@ -522,8 +522,7 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci, | |||
522 | cur_td->urb->hcpriv = NULL; | 522 | cur_td->urb->hcpriv = NULL; |
523 | usb_hcd_unlink_urb_from_ep(xhci_to_hcd(xhci), cur_td->urb); | 523 | usb_hcd_unlink_urb_from_ep(xhci_to_hcd(xhci), cur_td->urb); |
524 | 524 | ||
525 | xhci_dbg(xhci, "Giveback cancelled URB 0x%x\n", | 525 | xhci_dbg(xhci, "Giveback cancelled URB %p\n", cur_td->urb); |
526 | (unsigned int) cur_td->urb); | ||
527 | spin_unlock(&xhci->lock); | 526 | spin_unlock(&xhci->lock); |
528 | /* Doesn't matter what we pass for status, since the core will | 527 | /* Doesn't matter what we pass for status, since the core will |
529 | * just overwrite it (because the URB has been unlinked). | 528 | * just overwrite it (because the URB has been unlinked). |
@@ -1183,9 +1182,9 @@ unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
1183 | num_trbs++; | 1182 | num_trbs++; |
1184 | running_total += TRB_MAX_BUFF_SIZE; | 1183 | running_total += TRB_MAX_BUFF_SIZE; |
1185 | } | 1184 | } |
1186 | xhci_dbg(xhci, " sg #%d: dma = %#x, len = %#x (%d), num_trbs = %d\n", | 1185 | xhci_dbg(xhci, " sg #%d: dma = %#llx, len = %#x (%d), num_trbs = %d\n", |
1187 | i, sg_dma_address(sg), len, len, | 1186 | i, (unsigned long long)sg_dma_address(sg), |
1188 | num_trbs - previous_total_trbs); | 1187 | len, len, num_trbs - previous_total_trbs); |
1189 | 1188 | ||
1190 | len = min_t(int, len, temp); | 1189 | len = min_t(int, len, temp); |
1191 | temp -= len; | 1190 | temp -= len; |
@@ -1394,11 +1393,11 @@ int queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
1394 | /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */ | 1393 | /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */ |
1395 | 1394 | ||
1396 | if (!in_interrupt()) | 1395 | if (!in_interrupt()) |
1397 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %#x (%d), addr = %#x, num_trbs = %d\n", | 1396 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %#x (%d), addr = %#llx, num_trbs = %d\n", |
1398 | urb->ep->desc.bEndpointAddress, | 1397 | urb->ep->desc.bEndpointAddress, |
1399 | urb->transfer_buffer_length, | 1398 | urb->transfer_buffer_length, |
1400 | urb->transfer_buffer_length, | 1399 | urb->transfer_buffer_length, |
1401 | urb->transfer_dma, | 1400 | (unsigned long long)urb->transfer_dma, |
1402 | num_trbs); | 1401 | num_trbs); |
1403 | 1402 | ||
1404 | ret = xhci_prepare_transfer(xhci, xhci->devs[slot_id], ep_index, | 1403 | ret = xhci_prepare_transfer(xhci, xhci->devs[slot_id], ep_index, |
@@ -1640,9 +1639,8 @@ static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id, | |||
1640 | addr = trb_virt_to_dma(deq_seg, deq_ptr); | 1639 | addr = trb_virt_to_dma(deq_seg, deq_ptr); |
1641 | if (addr == 0) | 1640 | if (addr == 0) |
1642 | xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n"); | 1641 | xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n"); |
1643 | xhci_warn(xhci, "WARN deq seg = 0x%x, deq pt = 0x%x\n", | 1642 | xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n", |
1644 | (unsigned int) deq_seg, | 1643 | deq_seg, deq_ptr); |
1645 | (unsigned int) deq_ptr); | ||
1646 | return queue_command(xhci, (u32) addr | cycle_state, 0, 0, | 1644 | return queue_command(xhci, (u32) addr | cycle_state, 0, 0, |
1647 | trb_slot_id | trb_ep_index | type); | 1645 | trb_slot_id | trb_ep_index | type); |
1648 | } | 1646 | } |