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authorIngo Molnar <mingo@elte.hu>2009-09-21 06:51:27 -0400
committerIngo Molnar <mingo@elte.hu>2009-09-21 06:51:42 -0400
commitae82bfd61ca7e57cc2d914add9ab0873e260f2f5 (patch)
treea7f862ad8b0ae4f2e8953e6aa613eb702b484ecf /drivers/usb/gadget/m66592-udc.c
parentcd74c86bdf705f824d494a2bbda393d1d562b40a (diff)
parentebc79c4f8da0f92efa968e0328f32334a2ce80cf (diff)
Merge branch 'linus' into perfcounters/rename
Merge reason: pull in all the latest code before doing the rename. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/usb/gadget/m66592-udc.c')
-rw-r--r--drivers/usb/gadget/m66592-udc.c286
1 files changed, 159 insertions, 127 deletions
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
index 43dcf9e1af6b..a8c8543d1b08 100644
--- a/drivers/usb/gadget/m66592-udc.c
+++ b/drivers/usb/gadget/m66592-udc.c
@@ -25,44 +25,18 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28 28#include <linux/err.h>
29#include <linux/usb/ch9.h> 29#include <linux/usb/ch9.h>
30#include <linux/usb/gadget.h> 30#include <linux/usb/gadget.h>
31 31
32#include "m66592-udc.h" 32#include "m66592-udc.h"
33 33
34
35MODULE_DESCRIPTION("M66592 USB gadget driver"); 34MODULE_DESCRIPTION("M66592 USB gadget driver");
36MODULE_LICENSE("GPL"); 35MODULE_LICENSE("GPL");
37MODULE_AUTHOR("Yoshihiro Shimoda"); 36MODULE_AUTHOR("Yoshihiro Shimoda");
38MODULE_ALIAS("platform:m66592_udc"); 37MODULE_ALIAS("platform:m66592_udc");
39 38
40#define DRIVER_VERSION "18 Oct 2007" 39#define DRIVER_VERSION "21 July 2009"
41
42/* module parameters */
43#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
44static unsigned short endian = M66592_LITTLE;
45module_param(endian, ushort, 0644);
46MODULE_PARM_DESC(endian, "data endian: big=0, little=0 (default=0)");
47#else
48static unsigned short clock = M66592_XTAL24;
49module_param(clock, ushort, 0644);
50MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0 "
51 "(default=16384)");
52
53static unsigned short vif = M66592_LDRV;
54module_param(vif, ushort, 0644);
55MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0 (default=32768)");
56
57static unsigned short endian;
58module_param(endian, ushort, 0644);
59MODULE_PARM_DESC(endian, "data endian: big=256, little=0 (default=0)");
60
61static unsigned short irq_sense = M66592_INTL;
62module_param(irq_sense, ushort, 0644);
63MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0 "
64 "(default=2)");
65#endif
66 40
67static const char udc_name[] = "m66592_udc"; 41static const char udc_name[] = "m66592_udc";
68static const char *m66592_ep_name[] = { 42static const char *m66592_ep_name[] = {
@@ -244,6 +218,7 @@ static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
244static inline void pipe_change(struct m66592 *m66592, u16 pipenum) 218static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
245{ 219{
246 struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; 220 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
221 unsigned short mbw;
247 222
248 if (ep->use_dma) 223 if (ep->use_dma)
249 return; 224 return;
@@ -252,7 +227,12 @@ static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
252 227
253 ndelay(450); 228 ndelay(450);
254 229
255 m66592_bset(m66592, M66592_MBW, ep->fifosel); 230 if (m66592->pdata->on_chip)
231 mbw = M66592_MBW_32;
232 else
233 mbw = M66592_MBW_16;
234
235 m66592_bset(m66592, mbw, ep->fifosel);
256} 236}
257 237
258static int pipe_buffer_setting(struct m66592 *m66592, 238static int pipe_buffer_setting(struct m66592 *m66592,
@@ -276,24 +256,27 @@ static int pipe_buffer_setting(struct m66592 *m66592,
276 buf_bsize = 0; 256 buf_bsize = 0;
277 break; 257 break;
278 case M66592_BULK: 258 case M66592_BULK:
279 bufnum = m66592->bi_bufnum + 259 /* isochronous pipes may be used as bulk pipes */
280 (info->pipe - M66592_BASE_PIPENUM_BULK) * 16; 260 if (info->pipe > M66592_BASE_PIPENUM_BULK)
281 m66592->bi_bufnum += 16; 261 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
262 else
263 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
264
265 bufnum = M66592_BASE_BUFNUM + (bufnum * 16);
282 buf_bsize = 7; 266 buf_bsize = 7;
283 pipecfg |= M66592_DBLB; 267 pipecfg |= M66592_DBLB;
284 if (!info->dir_in) 268 if (!info->dir_in)
285 pipecfg |= M66592_SHTNAK; 269 pipecfg |= M66592_SHTNAK;
286 break; 270 break;
287 case M66592_ISO: 271 case M66592_ISO:
288 bufnum = m66592->bi_bufnum + 272 bufnum = M66592_BASE_BUFNUM +
289 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; 273 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
290 m66592->bi_bufnum += 16;
291 buf_bsize = 7; 274 buf_bsize = 7;
292 break; 275 break;
293 } 276 }
294 if (m66592->bi_bufnum > M66592_MAX_BUFNUM) { 277
295 pr_err("m66592 pipe memory is insufficient(%d)\n", 278 if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) {
296 m66592->bi_bufnum); 279 pr_err("m66592 pipe memory is insufficient\n");
297 return -ENOMEM; 280 return -ENOMEM;
298 } 281 }
299 282
@@ -313,17 +296,6 @@ static void pipe_buffer_release(struct m66592 *m66592,
313 if (info->pipe == 0) 296 if (info->pipe == 0)
314 return; 297 return;
315 298
316 switch (info->type) {
317 case M66592_BULK:
318 if (is_bulk_pipe(info->pipe))
319 m66592->bi_bufnum -= 16;
320 break;
321 case M66592_ISO:
322 if (is_isoc_pipe(info->pipe))
323 m66592->bi_bufnum -= 16;
324 break;
325 }
326
327 if (is_bulk_pipe(info->pipe)) { 299 if (is_bulk_pipe(info->pipe)) {
328 m66592->bulk--; 300 m66592->bulk--;
329 } else if (is_interrupt_pipe(info->pipe)) 301 } else if (is_interrupt_pipe(info->pipe))
@@ -340,6 +312,7 @@ static void pipe_buffer_release(struct m66592 *m66592,
340static void pipe_initialize(struct m66592_ep *ep) 312static void pipe_initialize(struct m66592_ep *ep)
341{ 313{
342 struct m66592 *m66592 = ep->m66592; 314 struct m66592 *m66592 = ep->m66592;
315 unsigned short mbw;
343 316
344 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); 317 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
345 318
@@ -351,7 +324,12 @@ static void pipe_initialize(struct m66592_ep *ep)
351 324
352 ndelay(450); 325 ndelay(450);
353 326
354 m66592_bset(m66592, M66592_MBW, ep->fifosel); 327 if (m66592->pdata->on_chip)
328 mbw = M66592_MBW_32;
329 else
330 mbw = M66592_MBW_16;
331
332 m66592_bset(m66592, mbw, ep->fifosel);
355 } 333 }
356} 334}
357 335
@@ -367,15 +345,13 @@ static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
367 ep->fifosel = M66592_D0FIFOSEL; 345 ep->fifosel = M66592_D0FIFOSEL;
368 ep->fifoctr = M66592_D0FIFOCTR; 346 ep->fifoctr = M66592_D0FIFOCTR;
369 ep->fifotrn = M66592_D0FIFOTRN; 347 ep->fifotrn = M66592_D0FIFOTRN;
370#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 348 } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) {
371 } else if (m66592->num_dma == 1) {
372 m66592->num_dma++; 349 m66592->num_dma++;
373 ep->use_dma = 1; 350 ep->use_dma = 1;
374 ep->fifoaddr = M66592_D1FIFO; 351 ep->fifoaddr = M66592_D1FIFO;
375 ep->fifosel = M66592_D1FIFOSEL; 352 ep->fifosel = M66592_D1FIFOSEL;
376 ep->fifoctr = M66592_D1FIFOCTR; 353 ep->fifoctr = M66592_D1FIFOCTR;
377 ep->fifotrn = M66592_D1FIFOTRN; 354 ep->fifotrn = M66592_D1FIFOTRN;
378#endif
379 } else { 355 } else {
380 ep->use_dma = 0; 356 ep->use_dma = 0;
381 ep->fifoaddr = M66592_CFIFO; 357 ep->fifoaddr = M66592_CFIFO;
@@ -620,76 +596,120 @@ static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
620 } 596 }
621} 597}
622 598
623#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
624static void init_controller(struct m66592 *m66592) 599static void init_controller(struct m66592 *m66592)
625{ 600{
626 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ 601 unsigned int endian;
627 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
628 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
629 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
630 602
631 /* This is a workaound for SH7722 2nd cut */ 603 if (m66592->pdata->on_chip) {
632 m66592_bset(m66592, 0x8000, M66592_DVSTCTR); 604 if (m66592->pdata->endian)
633 m66592_bset(m66592, 0x1000, M66592_TESTMODE); 605 endian = 0; /* big endian */
634 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR); 606 else
607 endian = M66592_LITTLE; /* little endian */
635 608
636 m66592_bset(m66592, M66592_INTL, M66592_INTENB1); 609 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
610 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
611 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
612 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
637 613
638 m66592_write(m66592, 0, M66592_CFBCFG); 614 /* This is a workaound for SH7722 2nd cut */
639 m66592_write(m66592, 0, M66592_D0FBCFG); 615 m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
640 m66592_bset(m66592, endian, M66592_CFBCFG); 616 m66592_bset(m66592, 0x1000, M66592_TESTMODE);
641 m66592_bset(m66592, endian, M66592_D0FBCFG); 617 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
642}
643#else /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
644static void init_controller(struct m66592 *m66592)
645{
646 m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND),
647 M66592_PINCFG);
648 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
649 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG);
650 618
651 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); 619 m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
652 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); 620
653 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); 621 m66592_write(m66592, 0, M66592_CFBCFG);
622 m66592_write(m66592, 0, M66592_D0FBCFG);
623 m66592_bset(m66592, endian, M66592_CFBCFG);
624 m66592_bset(m66592, endian, M66592_D0FBCFG);
625 } else {
626 unsigned int clock, vif, irq_sense;
627
628 if (m66592->pdata->endian)
629 endian = M66592_BIGEND; /* big endian */
630 else
631 endian = 0; /* little endian */
632
633 if (m66592->pdata->vif)
634 vif = M66592_LDRV; /* 3.3v */
635 else
636 vif = 0; /* 1.5v */
637
638 switch (m66592->pdata->xtal) {
639 case M66592_PLATDATA_XTAL_12MHZ:
640 clock = M66592_XTAL12;
641 break;
642 case M66592_PLATDATA_XTAL_24MHZ:
643 clock = M66592_XTAL24;
644 break;
645 case M66592_PLATDATA_XTAL_48MHZ:
646 clock = M66592_XTAL48;
647 break;
648 default:
649 pr_warning("m66592-udc: xtal configuration error\n");
650 clock = 0;
651 }
652
653 switch (m66592->irq_trigger) {
654 case IRQF_TRIGGER_LOW:
655 irq_sense = M66592_INTL;
656 break;
657 case IRQF_TRIGGER_FALLING:
658 irq_sense = 0;
659 break;
660 default:
661 pr_warning("m66592-udc: irq trigger config error\n");
662 irq_sense = 0;
663 }
654 664
655 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 665 m66592_bset(m66592,
666 (vif & M66592_LDRV) | (endian & M66592_BIGEND),
667 M66592_PINCFG);
668 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
669 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,
670 M66592_SYSCFG);
671 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
672 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
673 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
674
675 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
656 676
657 msleep(3); 677 msleep(3);
658 678
659 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); 679 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
660 680
661 msleep(1); 681 msleep(1);
662 682
663 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); 683 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
664 684
665 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); 685 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
666 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, 686 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
667 M66592_DMA0CFG); 687 M66592_DMA0CFG);
688 }
668} 689}
669#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
670 690
671static void disable_controller(struct m66592 *m66592) 691static void disable_controller(struct m66592 *m66592)
672{ 692{
673#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 693 if (!m66592->pdata->on_chip) {
674 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); 694 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
675 udelay(1); 695 udelay(1);
676 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); 696 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
677 udelay(1); 697 udelay(1);
678 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); 698 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
679 udelay(1); 699 udelay(1);
680 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); 700 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
681#endif 701 }
682} 702}
683 703
684static void m66592_start_xclock(struct m66592 *m66592) 704static void m66592_start_xclock(struct m66592 *m66592)
685{ 705{
686#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
687 u16 tmp; 706 u16 tmp;
688 707
689 tmp = m66592_read(m66592, M66592_SYSCFG); 708 if (!m66592->pdata->on_chip) {
690 if (!(tmp & M66592_XCKE)) 709 tmp = m66592_read(m66592, M66592_SYSCFG);
691 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 710 if (!(tmp & M66592_XCKE))
692#endif 711 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
712 }
693} 713}
694 714
695/*-------------------------------------------------------------------------*/ 715/*-------------------------------------------------------------------------*/
@@ -1177,8 +1197,7 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1177 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1197 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1178 intenb0 = m66592_read(m66592, M66592_INTENB0); 1198 intenb0 = m66592_read(m66592, M66592_INTENB0);
1179 1199
1180#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 1200 if (m66592->pdata->on_chip && !intsts0 && !intenb0) {
1181 if (!intsts0 && !intenb0) {
1182 /* 1201 /*
1183 * When USB clock stops, it cannot read register. Even if a 1202 * When USB clock stops, it cannot read register. Even if a
1184 * clock stops, the interrupt occurs. So this driver turn on 1203 * clock stops, the interrupt occurs. So this driver turn on
@@ -1188,7 +1207,6 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1188 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1207 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1189 intenb0 = m66592_read(m66592, M66592_INTENB0); 1208 intenb0 = m66592_read(m66592, M66592_INTENB0);
1190 } 1209 }
1191#endif
1192 1210
1193 savepipe = m66592_read(m66592, M66592_CFIFOSEL); 1211 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1194 1212
@@ -1534,9 +1552,11 @@ static int __exit m66592_remove(struct platform_device *pdev)
1534 iounmap(m66592->reg); 1552 iounmap(m66592->reg);
1535 free_irq(platform_get_irq(pdev, 0), m66592); 1553 free_irq(platform_get_irq(pdev, 0), m66592);
1536 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); 1554 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1537#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1555#ifdef CONFIG_HAVE_CLK
1538 clk_disable(m66592->clk); 1556 if (m66592->pdata->on_chip) {
1539 clk_put(m66592->clk); 1557 clk_disable(m66592->clk);
1558 clk_put(m66592->clk);
1559 }
1540#endif 1560#endif
1541 kfree(m66592); 1561 kfree(m66592);
1542 return 0; 1562 return 0;
@@ -1548,11 +1568,10 @@ static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1548 1568
1549static int __init m66592_probe(struct platform_device *pdev) 1569static int __init m66592_probe(struct platform_device *pdev)
1550{ 1570{
1551 struct resource *res; 1571 struct resource *res, *ires;
1552 int irq;
1553 void __iomem *reg = NULL; 1572 void __iomem *reg = NULL;
1554 struct m66592 *m66592 = NULL; 1573 struct m66592 *m66592 = NULL;
1555#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1574#ifdef CONFIG_HAVE_CLK
1556 char clk_name[8]; 1575 char clk_name[8];
1557#endif 1576#endif
1558 int ret = 0; 1577 int ret = 0;
@@ -1565,10 +1584,11 @@ static int __init m66592_probe(struct platform_device *pdev)
1565 goto clean_up; 1584 goto clean_up;
1566 } 1585 }
1567 1586
1568 irq = platform_get_irq(pdev, 0); 1587 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1569 if (irq < 0) { 1588 if (!ires) {
1570 ret = -ENODEV; 1589 ret = -ENODEV;
1571 pr_err("platform_get_irq error.\n"); 1590 dev_err(&pdev->dev,
1591 "platform_get_resource IORESOURCE_IRQ error.\n");
1572 goto clean_up; 1592 goto clean_up;
1573 } 1593 }
1574 1594
@@ -1579,6 +1599,12 @@ static int __init m66592_probe(struct platform_device *pdev)
1579 goto clean_up; 1599 goto clean_up;
1580 } 1600 }
1581 1601
1602 if (pdev->dev.platform_data == NULL) {
1603 dev_err(&pdev->dev, "no platform data\n");
1604 ret = -ENODEV;
1605 goto clean_up;
1606 }
1607
1582 /* initialize ucd */ 1608 /* initialize ucd */
1583 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); 1609 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1584 if (m66592 == NULL) { 1610 if (m66592 == NULL) {
@@ -1586,6 +1612,9 @@ static int __init m66592_probe(struct platform_device *pdev)
1586 goto clean_up; 1612 goto clean_up;
1587 } 1613 }
1588 1614
1615 m66592->pdata = pdev->dev.platform_data;
1616 m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1617
1589 spin_lock_init(&m66592->lock); 1618 spin_lock_init(&m66592->lock);
1590 dev_set_drvdata(&pdev->dev, m66592); 1619 dev_set_drvdata(&pdev->dev, m66592);
1591 1620
@@ -1603,24 +1632,25 @@ static int __init m66592_probe(struct platform_device *pdev)
1603 m66592->timer.data = (unsigned long)m66592; 1632 m66592->timer.data = (unsigned long)m66592;
1604 m66592->reg = reg; 1633 m66592->reg = reg;
1605 1634
1606 m66592->bi_bufnum = M66592_BASE_BUFNUM; 1635 ret = request_irq(ires->start, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1607
1608 ret = request_irq(irq, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1609 udc_name, m66592); 1636 udc_name, m66592);
1610 if (ret < 0) { 1637 if (ret < 0) {
1611 pr_err("request_irq error (%d)\n", ret); 1638 pr_err("request_irq error (%d)\n", ret);
1612 goto clean_up; 1639 goto clean_up;
1613 } 1640 }
1614 1641
1615#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1642#ifdef CONFIG_HAVE_CLK
1616 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); 1643 if (m66592->pdata->on_chip) {
1617 m66592->clk = clk_get(&pdev->dev, clk_name); 1644 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
1618 if (IS_ERR(m66592->clk)) { 1645 m66592->clk = clk_get(&pdev->dev, clk_name);
1619 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 1646 if (IS_ERR(m66592->clk)) {
1620 ret = PTR_ERR(m66592->clk); 1647 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1621 goto clean_up2; 1648 clk_name);
1649 ret = PTR_ERR(m66592->clk);
1650 goto clean_up2;
1651 }
1652 clk_enable(m66592->clk);
1622 } 1653 }
1623 clk_enable(m66592->clk);
1624#endif 1654#endif
1625 INIT_LIST_HEAD(&m66592->gadget.ep_list); 1655 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1626 m66592->gadget.ep0 = &m66592->ep[0].ep; 1656 m66592->gadget.ep0 = &m66592->ep[0].ep;
@@ -1662,12 +1692,14 @@ static int __init m66592_probe(struct platform_device *pdev)
1662 return 0; 1692 return 0;
1663 1693
1664clean_up3: 1694clean_up3:
1665#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1695#ifdef CONFIG_HAVE_CLK
1666 clk_disable(m66592->clk); 1696 if (m66592->pdata->on_chip) {
1667 clk_put(m66592->clk); 1697 clk_disable(m66592->clk);
1698 clk_put(m66592->clk);
1699 }
1668clean_up2: 1700clean_up2:
1669#endif 1701#endif
1670 free_irq(irq, m66592); 1702 free_irq(ires->start, m66592);
1671clean_up: 1703clean_up:
1672 if (m66592) { 1704 if (m66592) {
1673 if (m66592->ep0_req) 1705 if (m66592->ep0_req)