diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-09-21 06:51:27 -0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-09-21 06:51:42 -0400 |
| commit | ae82bfd61ca7e57cc2d914add9ab0873e260f2f5 (patch) | |
| tree | a7f862ad8b0ae4f2e8953e6aa613eb702b484ecf | |
| parent | cd74c86bdf705f824d494a2bbda393d1d562b40a (diff) | |
| parent | ebc79c4f8da0f92efa968e0328f32334a2ce80cf (diff) | |
Merge branch 'linus' into perfcounters/rename
Merge reason: pull in all the latest code before doing the rename.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
901 files changed, 66487 insertions, 11786 deletions
diff --git a/Documentation/arm/OMAP/omap_pm b/Documentation/arm/OMAP/omap_pm new file mode 100644 index 000000000000..5389440aade3 --- /dev/null +++ b/Documentation/arm/OMAP/omap_pm | |||
| @@ -0,0 +1,129 @@ | |||
| 1 | |||
| 2 | The OMAP PM interface | ||
| 3 | ===================== | ||
| 4 | |||
| 5 | This document describes the temporary OMAP PM interface. Driver | ||
| 6 | authors use these functions to communicate minimum latency or | ||
| 7 | throughput constraints to the kernel power management code. | ||
| 8 | Over time, the intention is to merge features from the OMAP PM | ||
| 9 | interface into the Linux PM QoS code. | ||
| 10 | |||
| 11 | Drivers need to express PM parameters which: | ||
| 12 | |||
| 13 | - support the range of power management parameters present in the TI SRF; | ||
| 14 | |||
| 15 | - separate the drivers from the underlying PM parameter | ||
| 16 | implementation, whether it is the TI SRF or Linux PM QoS or Linux | ||
| 17 | latency framework or something else; | ||
| 18 | |||
| 19 | - specify PM parameters in terms of fundamental units, such as | ||
| 20 | latency and throughput, rather than units which are specific to OMAP | ||
| 21 | or to particular OMAP variants; | ||
| 22 | |||
| 23 | - allow drivers which are shared with other architectures (e.g., | ||
| 24 | DaVinci) to add these constraints in a way which won't affect non-OMAP | ||
| 25 | systems, | ||
| 26 | |||
| 27 | - can be implemented immediately with minimal disruption of other | ||
| 28 | architectures. | ||
| 29 | |||
| 30 | |||
| 31 | This document proposes the OMAP PM interface, including the following | ||
| 32 | five power management functions for driver code: | ||
| 33 | |||
| 34 | 1. Set the maximum MPU wakeup latency: | ||
| 35 | (*pdata->set_max_mpu_wakeup_lat)(struct device *dev, unsigned long t) | ||
| 36 | |||
| 37 | 2. Set the maximum device wakeup latency: | ||
| 38 | (*pdata->set_max_dev_wakeup_lat)(struct device *dev, unsigned long t) | ||
| 39 | |||
| 40 | 3. Set the maximum system DMA transfer start latency (CORE pwrdm): | ||
| 41 | (*pdata->set_max_sdma_lat)(struct device *dev, long t) | ||
| 42 | |||
| 43 | 4. Set the minimum bus throughput needed by a device: | ||
| 44 | (*pdata->set_min_bus_tput)(struct device *dev, u8 agent_id, unsigned long r) | ||
| 45 | |||
| 46 | 5. Return the number of times the device has lost context | ||
| 47 | (*pdata->get_dev_context_loss_count)(struct device *dev) | ||
| 48 | |||
| 49 | |||
| 50 | Further documentation for all OMAP PM interface functions can be | ||
| 51 | found in arch/arm/plat-omap/include/mach/omap-pm.h. | ||
| 52 | |||
| 53 | |||
| 54 | The OMAP PM layer is intended to be temporary | ||
| 55 | --------------------------------------------- | ||
| 56 | |||
| 57 | The intention is that eventually the Linux PM QoS layer should support | ||
| 58 | the range of power management features present in OMAP3. As this | ||
| 59 | happens, existing drivers using the OMAP PM interface can be modified | ||
| 60 | to use the Linux PM QoS code; and the OMAP PM interface can disappear. | ||
| 61 | |||
| 62 | |||
| 63 | Driver usage of the OMAP PM functions | ||
| 64 | ------------------------------------- | ||
| 65 | |||
| 66 | As the 'pdata' in the above examples indicates, these functions are | ||
| 67 | exposed to drivers through function pointers in driver .platform_data | ||
| 68 | structures. The function pointers are initialized by the board-*.c | ||
| 69 | files to point to the corresponding OMAP PM functions: | ||
| 70 | .set_max_dev_wakeup_lat will point to | ||
| 71 | omap_pm_set_max_dev_wakeup_lat(), etc. Other architectures which do | ||
| 72 | not support these functions should leave these function pointers set | ||
| 73 | to NULL. Drivers should use the following idiom: | ||
| 74 | |||
| 75 | if (pdata->set_max_dev_wakeup_lat) | ||
| 76 | (*pdata->set_max_dev_wakeup_lat)(dev, t); | ||
| 77 | |||
| 78 | The most common usage of these functions will probably be to specify | ||
| 79 | the maximum time from when an interrupt occurs, to when the device | ||
| 80 | becomes accessible. To accomplish this, driver writers should use the | ||
| 81 | set_max_mpu_wakeup_lat() function to to constrain the MPU wakeup | ||
| 82 | latency, and the set_max_dev_wakeup_lat() function to constrain the | ||
| 83 | device wakeup latency (from clk_enable() to accessibility). For | ||
| 84 | example, | ||
| 85 | |||
| 86 | /* Limit MPU wakeup latency */ | ||
| 87 | if (pdata->set_max_mpu_wakeup_lat) | ||
| 88 | (*pdata->set_max_mpu_wakeup_lat)(dev, tc); | ||
| 89 | |||
| 90 | /* Limit device powerdomain wakeup latency */ | ||
| 91 | if (pdata->set_max_dev_wakeup_lat) | ||
| 92 | (*pdata->set_max_dev_wakeup_lat)(dev, td); | ||
| 93 | |||
| 94 | /* total wakeup latency in this example: (tc + td) */ | ||
| 95 | |||
| 96 | The PM parameters can be overwritten by calling the function again | ||
| 97 | with the new value. The settings can be removed by calling the | ||
| 98 | function with a t argument of -1 (except in the case of | ||
| 99 | set_max_bus_tput(), which should be called with an r argument of 0). | ||
| 100 | |||
| 101 | The fifth function above, omap_pm_get_dev_context_loss_count(), | ||
| 102 | is intended as an optimization to allow drivers to determine whether the | ||
| 103 | device has lost its internal context. If context has been lost, the | ||
| 104 | driver must restore its internal context before proceeding. | ||
| 105 | |||
| 106 | |||
| 107 | Other specialized interface functions | ||
| 108 | ------------------------------------- | ||
| 109 | |||
| 110 | The five functions listed above are intended to be usable by any | ||
| 111 | device driver. DSPBridge and CPUFreq have a few special requirements. | ||
| 112 | DSPBridge expresses target DSP performance levels in terms of OPP IDs. | ||
| 113 | CPUFreq expresses target MPU performance levels in terms of MPU | ||
| 114 | frequency. The OMAP PM interface contains functions for these | ||
| 115 | specialized cases to convert that input information (OPPs/MPU | ||
| 116 | frequency) into the form that the underlying power management | ||
| 117 | implementation needs: | ||
| 118 | |||
| 119 | 6. (*pdata->dsp_get_opp_table)(void) | ||
| 120 | |||
| 121 | 7. (*pdata->dsp_set_min_opp)(u8 opp_id) | ||
| 122 | |||
| 123 | 8. (*pdata->dsp_get_opp)(void) | ||
| 124 | |||
| 125 | 9. (*pdata->cpu_get_freq_table)(void) | ||
| 126 | |||
| 127 | 10. (*pdata->cpu_set_freq)(unsigned long f) | ||
| 128 | |||
| 129 | 11. (*pdata->cpu_get_freq)(void) | ||
diff --git a/Documentation/cpu-freq/user-guide.txt b/Documentation/cpu-freq/user-guide.txt index 5d5f5fadd1c2..2a5b850847c0 100644 --- a/Documentation/cpu-freq/user-guide.txt +++ b/Documentation/cpu-freq/user-guide.txt | |||
| @@ -176,7 +176,9 @@ scaling_governor, and by "echoing" the name of another | |||
| 176 | work on some specific architectures or | 176 | work on some specific architectures or |
| 177 | processors. | 177 | processors. |
| 178 | 178 | ||
| 179 | cpuinfo_cur_freq : Current speed of the CPU, in KHz. | 179 | cpuinfo_cur_freq : Current frequency of the CPU as obtained from |
| 180 | the hardware, in KHz. This is the frequency | ||
| 181 | the CPU actually runs at. | ||
| 180 | 182 | ||
| 181 | scaling_available_frequencies : List of available frequencies, in KHz. | 183 | scaling_available_frequencies : List of available frequencies, in KHz. |
| 182 | 184 | ||
| @@ -196,7 +198,10 @@ related_cpus : List of CPUs that need some sort of frequency | |||
| 196 | 198 | ||
| 197 | scaling_driver : Hardware driver for cpufreq. | 199 | scaling_driver : Hardware driver for cpufreq. |
| 198 | 200 | ||
| 199 | scaling_cur_freq : Current frequency of the CPU, in KHz. | 201 | scaling_cur_freq : Current frequency of the CPU as determined by |
| 202 | the governor and cpufreq core, in KHz. This is | ||
| 203 | the frequency the kernel thinks the CPU runs | ||
| 204 | at. | ||
| 200 | 205 | ||
| 201 | If you have selected the "userspace" governor which allows you to | 206 | If you have selected the "userspace" governor which allows you to |
| 202 | set the CPU operating frequency to a specific value, you can read out | 207 | set the CPU operating frequency to a specific value, you can read out |
diff --git a/Documentation/filesystems/ext4.txt b/Documentation/filesystems/ext4.txt index 7be02ac5fa36..18b5ec8cea45 100644 --- a/Documentation/filesystems/ext4.txt +++ b/Documentation/filesystems/ext4.txt | |||
| @@ -134,15 +134,9 @@ ro Mount filesystem read only. Note that ext4 will | |||
| 134 | mount options "ro,noload" can be used to prevent | 134 | mount options "ro,noload" can be used to prevent |
| 135 | writes to the filesystem. | 135 | writes to the filesystem. |
| 136 | 136 | ||
| 137 | journal_checksum Enable checksumming of the journal transactions. | ||
| 138 | This will allow the recovery code in e2fsck and the | ||
| 139 | kernel to detect corruption in the kernel. It is a | ||
| 140 | compatible change and will be ignored by older kernels. | ||
| 141 | |||
| 142 | journal_async_commit Commit block can be written to disk without waiting | 137 | journal_async_commit Commit block can be written to disk without waiting |
| 143 | for descriptor blocks. If enabled older kernels cannot | 138 | for descriptor blocks. If enabled older kernels cannot |
| 144 | mount the device. This will enable 'journal_checksum' | 139 | mount the device. |
| 145 | internally. | ||
| 146 | 140 | ||
| 147 | journal=update Update the ext4 file system's journal to the current | 141 | journal=update Update the ext4 file system's journal to the current |
| 148 | format. | 142 | format. |
| @@ -263,10 +257,18 @@ resuid=n The user ID which may use the reserved blocks. | |||
| 263 | 257 | ||
| 264 | sb=n Use alternate superblock at this location. | 258 | sb=n Use alternate superblock at this location. |
| 265 | 259 | ||
| 266 | quota | 260 | quota These options are ignored by the filesystem. They |
| 267 | noquota | 261 | noquota are used only by quota tools to recognize volumes |
| 268 | grpquota | 262 | grpquota where quota should be turned on. See documentation |
| 269 | usrquota | 263 | usrquota in the quota-tools package for more details |
| 264 | (http://sourceforge.net/projects/linuxquota). | ||
| 265 | |||
| 266 | jqfmt=<quota type> These options tell filesystem details about quota | ||
| 267 | usrjquota=<file> so that quota information can be properly updated | ||
| 268 | grpjquota=<file> during journal replay. They replace the above | ||
| 269 | quota options. See documentation in the quota-tools | ||
| 270 | package for more details | ||
| 271 | (http://sourceforge.net/projects/linuxquota). | ||
| 270 | 272 | ||
| 271 | bh (*) ext4 associates buffer heads to data pages to | 273 | bh (*) ext4 associates buffer heads to data pages to |
| 272 | nobh (a) cache disk block mapping information | 274 | nobh (a) cache disk block mapping information |
diff --git a/Documentation/hwmon/wm831x b/Documentation/hwmon/wm831x new file mode 100644 index 000000000000..24f47d8f6a42 --- /dev/null +++ b/Documentation/hwmon/wm831x | |||
| @@ -0,0 +1,37 @@ | |||
| 1 | Kernel driver wm831x-hwmon | ||
| 2 | ========================== | ||
| 3 | |||
| 4 | Supported chips: | ||
| 5 | * Wolfson Microelectronics WM831x PMICs | ||
| 6 | Prefix: 'wm831x' | ||
| 7 | Datasheet: | ||
| 8 | http://www.wolfsonmicro.com/products/WM8310 | ||
| 9 | http://www.wolfsonmicro.com/products/WM8311 | ||
| 10 | http://www.wolfsonmicro.com/products/WM8312 | ||
| 11 | |||
| 12 | Authors: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 13 | |||
| 14 | Description | ||
| 15 | ----------- | ||
| 16 | |||
| 17 | The WM831x series of PMICs include an AUXADC which can be used to | ||
| 18 | monitor a range of system operating parameters, including the voltages | ||
| 19 | of the major supplies within the system. Currently the driver provides | ||
| 20 | reporting of all the input values but does not provide any alarms. | ||
| 21 | |||
| 22 | Voltage Monitoring | ||
| 23 | ------------------ | ||
| 24 | |||
| 25 | Voltages are sampled by a 12 bit ADC. Voltages in milivolts are 1.465 | ||
| 26 | times the ADC value. | ||
| 27 | |||
| 28 | Temperature Monitoring | ||
| 29 | ---------------------- | ||
| 30 | |||
| 31 | Temperatures are sampled by a 12 bit ADC. Chip and battery temperatures | ||
| 32 | are available. The chip temperature is calculated as: | ||
| 33 | |||
| 34 | Degrees celsius = (512.18 - data) / 1.0983 | ||
| 35 | |||
| 36 | while the battery temperature calculation will depend on the NTC | ||
| 37 | thermistor component. | ||
diff --git a/Documentation/hwmon/wm8350 b/Documentation/hwmon/wm8350 new file mode 100644 index 000000000000..98f923bd2e92 --- /dev/null +++ b/Documentation/hwmon/wm8350 | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | Kernel driver wm8350-hwmon | ||
| 2 | ========================== | ||
| 3 | |||
| 4 | Supported chips: | ||
| 5 | * Wolfson Microelectronics WM835x PMICs | ||
| 6 | Prefix: 'wm8350' | ||
| 7 | Datasheet: | ||
| 8 | http://www.wolfsonmicro.com/products/WM8350 | ||
| 9 | http://www.wolfsonmicro.com/products/WM8351 | ||
| 10 | http://www.wolfsonmicro.com/products/WM8352 | ||
| 11 | |||
| 12 | Authors: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 13 | |||
| 14 | Description | ||
| 15 | ----------- | ||
| 16 | |||
| 17 | The WM835x series of PMICs include an AUXADC which can be used to | ||
| 18 | monitor a range of system operating parameters, including the voltages | ||
| 19 | of the major supplies within the system. Currently the driver provides | ||
| 20 | simple access to these major supplies. | ||
| 21 | |||
| 22 | Voltage Monitoring | ||
| 23 | ------------------ | ||
| 24 | |||
| 25 | Voltages are sampled by a 12 bit ADC. For the internal supplies the ADC | ||
| 26 | is referenced to the system VRTC. | ||
diff --git a/Documentation/kernel-doc-nano-HOWTO.txt b/Documentation/kernel-doc-nano-HOWTO.txt index 4d04572b6549..348b9e5e28fc 100644 --- a/Documentation/kernel-doc-nano-HOWTO.txt +++ b/Documentation/kernel-doc-nano-HOWTO.txt | |||
| @@ -66,7 +66,9 @@ Example kernel-doc function comment: | |||
| 66 | * The longer description can have multiple paragraphs. | 66 | * The longer description can have multiple paragraphs. |
| 67 | */ | 67 | */ |
| 68 | 68 | ||
| 69 | The first line, with the short description, must be on a single line. | 69 | The short description following the subject can span multiple lines |
| 70 | and ends with an @argument description, an empty line or the end of | ||
| 71 | the comment block. | ||
| 70 | 72 | ||
| 71 | The @argument descriptions must begin on the very next line following | 73 | The @argument descriptions must begin on the very next line following |
| 72 | this opening short function description line, with no intervening | 74 | this opening short function description line, with no intervening |
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index f45d0d8e71d8..0f17d16dc101 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt | |||
| @@ -1565,7 +1565,7 @@ and is between 256 and 4096 characters. It is defined in the file | |||
| 1565 | of returning the full 64-bit number. | 1565 | of returning the full 64-bit number. |
| 1566 | The default is to return 64-bit inode numbers. | 1566 | The default is to return 64-bit inode numbers. |
| 1567 | 1567 | ||
| 1568 | nmi_debug= [KNL,AVR32] Specify one or more actions to take | 1568 | nmi_debug= [KNL,AVR32,SH] Specify one or more actions to take |
| 1569 | when a NMI is triggered. | 1569 | when a NMI is triggered. |
| 1570 | Format: [state][,regs][,debounce][,die] | 1570 | Format: [state][,regs][,debounce][,die] |
| 1571 | 1571 | ||
diff --git a/Documentation/kref.txt b/Documentation/kref.txt index 130b6e87aa7e..ae203f91ee9b 100644 --- a/Documentation/kref.txt +++ b/Documentation/kref.txt | |||
| @@ -84,7 +84,6 @@ int my_data_handler(void) | |||
| 84 | task = kthread_run(more_data_handling, data, "more_data_handling"); | 84 | task = kthread_run(more_data_handling, data, "more_data_handling"); |
| 85 | if (task == ERR_PTR(-ENOMEM)) { | 85 | if (task == ERR_PTR(-ENOMEM)) { |
| 86 | rv = -ENOMEM; | 86 | rv = -ENOMEM; |
| 87 | kref_put(&data->refcount, data_release); | ||
| 88 | goto out; | 87 | goto out; |
| 89 | } | 88 | } |
| 90 | 89 | ||
diff --git a/Documentation/x86/boot.txt b/Documentation/x86/boot.txt index 8da3a795083f..30b43e1b2697 100644 --- a/Documentation/x86/boot.txt +++ b/Documentation/x86/boot.txt | |||
| @@ -599,6 +599,7 @@ Protocol: 2.07+ | |||
| 599 | 0x00000000 The default x86/PC environment | 599 | 0x00000000 The default x86/PC environment |
| 600 | 0x00000001 lguest | 600 | 0x00000001 lguest |
| 601 | 0x00000002 Xen | 601 | 0x00000002 Xen |
| 602 | 0x00000003 Moorestown MID | ||
| 602 | 603 | ||
| 603 | Field name: hardware_subarch_data | 604 | Field name: hardware_subarch_data |
| 604 | Type: write (subarch-dependent) | 605 | Type: write (subarch-dependent) |
diff --git a/MAINTAINERS b/MAINTAINERS index e613c6dd709f..43761a00e3f1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
| @@ -1973,7 +1973,6 @@ F: fs/ext2/ | |||
| 1973 | F: include/linux/ext2* | 1973 | F: include/linux/ext2* |
| 1974 | 1974 | ||
| 1975 | EXT3 FILE SYSTEM | 1975 | EXT3 FILE SYSTEM |
| 1976 | M: Stephen Tweedie <sct@redhat.com> | ||
| 1977 | M: Andrew Morton <akpm@linux-foundation.org> | 1976 | M: Andrew Morton <akpm@linux-foundation.org> |
| 1978 | M: Andreas Dilger <adilger@sun.com> | 1977 | M: Andreas Dilger <adilger@sun.com> |
| 1979 | L: linux-ext4@vger.kernel.org | 1978 | L: linux-ext4@vger.kernel.org |
| @@ -2901,8 +2900,8 @@ F: fs/jffs2/ | |||
| 2901 | F: include/linux/jffs2.h | 2900 | F: include/linux/jffs2.h |
| 2902 | 2901 | ||
| 2903 | JOURNALLING LAYER FOR BLOCK DEVICES (JBD) | 2902 | JOURNALLING LAYER FOR BLOCK DEVICES (JBD) |
| 2904 | M: Stephen Tweedie <sct@redhat.com> | ||
| 2905 | M: Andrew Morton <akpm@linux-foundation.org> | 2903 | M: Andrew Morton <akpm@linux-foundation.org> |
| 2904 | M: Jan Kara <jack@suse.cz> | ||
| 2906 | L: linux-ext4@vger.kernel.org | 2905 | L: linux-ext4@vger.kernel.org |
| 2907 | S: Maintained | 2906 | S: Maintained |
| 2908 | F: fs/jbd*/ | 2907 | F: fs/jbd*/ |
| @@ -4455,6 +4454,14 @@ S: Maintained | |||
| 4455 | F: kernel/sched* | 4454 | F: kernel/sched* |
| 4456 | F: include/linux/sched.h | 4455 | F: include/linux/sched.h |
| 4457 | 4456 | ||
| 4457 | SCORE ARCHITECTURE | ||
| 4458 | P: Chen Liqin | ||
| 4459 | M: liqin.chen@sunplusct.com | ||
| 4460 | P: Lennox Wu | ||
| 4461 | M: lennox.wu@sunplusct.com | ||
| 4462 | W: http://www.sunplusct.com | ||
| 4463 | S: Supported | ||
| 4464 | |||
| 4458 | SCSI CDROM DRIVER | 4465 | SCSI CDROM DRIVER |
| 4459 | M: Jens Axboe <axboe@kernel.dk> | 4466 | M: Jens Axboe <axboe@kernel.dk> |
| 4460 | L: linux-scsi@vger.kernel.org | 4467 | L: linux-scsi@vger.kernel.org |
| @@ -4654,6 +4661,12 @@ F: arch/arm/mach-s3c2410/ | |||
| 4654 | F: drivers/*/*s3c2410* | 4661 | F: drivers/*/*s3c2410* |
| 4655 | F: drivers/*/*/*s3c2410* | 4662 | F: drivers/*/*/*s3c2410* |
| 4656 | 4663 | ||
| 4664 | TI DAVINCI MACHINE SUPPORT | ||
| 4665 | P: Kevin Hilman | ||
| 4666 | M: davinci-linux-open-source@linux.davincidsp.com | ||
| 4667 | S: Supported | ||
| 4668 | F: arch/arm/mach-davinci | ||
| 4669 | |||
| 4657 | SIS 190 ETHERNET DRIVER | 4670 | SIS 190 ETHERNET DRIVER |
| 4658 | M: Francois Romieu <romieu@fr.zoreil.com> | 4671 | M: Francois Romieu <romieu@fr.zoreil.com> |
| 4659 | L: netdev@vger.kernel.org | 4672 | L: netdev@vger.kernel.org |
| @@ -5678,6 +5691,26 @@ S: Supported | |||
| 5678 | F: drivers/input/touchscreen/*wm97* | 5691 | F: drivers/input/touchscreen/*wm97* |
| 5679 | F: include/linux/wm97xx.h | 5692 | F: include/linux/wm97xx.h |
| 5680 | 5693 | ||
| 5694 | WOLFSON MICROELECTRONICS PMIC DRIVERS | ||
| 5695 | P: Mark Brown | ||
| 5696 | M: broonie@opensource.wolfsonmicro.com | ||
| 5697 | L: linux-kernel@vger.kernel.org | ||
| 5698 | T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus | ||
| 5699 | W: http://opensource.wolfsonmicro.com/node/8 | ||
| 5700 | S: Supported | ||
| 5701 | F: drivers/leds/leds-wm83*.c | ||
| 5702 | F: drivers/mfd/wm8*.c | ||
| 5703 | F: drivers/power/wm83*.c | ||
| 5704 | F: drivers/rtc/rtc-wm83*.c | ||
| 5705 | F: drivers/regulator/wm8*.c | ||
| 5706 | F: drivers/video/backlight/wm83*_bl.c | ||
| 5707 | F: drivers/watchdog/wm83*_wdt.c | ||
| 5708 | F: include/linux/mfd/wm831x/ | ||
| 5709 | F: include/linux/mfd/wm8350/ | ||
| 5710 | F: include/linux/mfd/wm8400/ | ||
| 5711 | F: sound/soc/codecs/wm8350.c | ||
| 5712 | F: sound/soc/codecs/wm8400.c | ||
| 5713 | |||
| 5681 | X.25 NETWORK LAYER | 5714 | X.25 NETWORK LAYER |
| 5682 | M: Henner Eisen <eis@baty.hanse.de> | 5715 | M: Henner Eisen <eis@baty.hanse.de> |
| 5683 | L: linux-x25@vger.kernel.org | 5716 | L: linux-x25@vger.kernel.org |
diff --git a/arch/arm/configs/da830_omapl137_defconfig b/arch/arm/configs/da830_omapl137_defconfig new file mode 100644 index 000000000000..7c8e38f5c5ab --- /dev/null +++ b/arch/arm/configs/da830_omapl137_defconfig | |||
| @@ -0,0 +1,1254 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.30-rc2-davinci1 | ||
| 4 | # Wed May 13 15:33:29 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 25 | CONFIG_ZONE_DMA=y | ||
| 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 29 | |||
| 30 | # | ||
| 31 | # General setup | ||
| 32 | # | ||
| 33 | CONFIG_EXPERIMENTAL=y | ||
| 34 | CONFIG_BROKEN_ON_SMP=y | ||
| 35 | CONFIG_LOCK_KERNEL=y | ||
| 36 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 37 | CONFIG_LOCALVERSION="" | ||
| 38 | CONFIG_LOCALVERSION_AUTO=y | ||
| 39 | # CONFIG_SWAP is not set | ||
| 40 | CONFIG_SYSVIPC=y | ||
| 41 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 42 | CONFIG_POSIX_MQUEUE=y | ||
| 43 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 44 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 45 | # CONFIG_TASKSTATS is not set | ||
| 46 | # CONFIG_AUDIT is not set | ||
| 47 | |||
| 48 | # | ||
| 49 | # RCU Subsystem | ||
| 50 | # | ||
| 51 | CONFIG_CLASSIC_RCU=y | ||
| 52 | # CONFIG_TREE_RCU is not set | ||
| 53 | # CONFIG_PREEMPT_RCU is not set | ||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 55 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 56 | CONFIG_IKCONFIG=y | ||
| 57 | CONFIG_IKCONFIG_PROC=y | ||
| 58 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 59 | CONFIG_GROUP_SCHED=y | ||
| 60 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 61 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 62 | CONFIG_USER_SCHED=y | ||
| 63 | # CONFIG_CGROUP_SCHED is not set | ||
| 64 | # CONFIG_CGROUPS is not set | ||
| 65 | CONFIG_SYSFS_DEPRECATED=y | ||
| 66 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 67 | # CONFIG_RELAY is not set | ||
| 68 | # CONFIG_NAMESPACES is not set | ||
| 69 | CONFIG_BLK_DEV_INITRD=y | ||
| 70 | CONFIG_INITRAMFS_SOURCE="" | ||
| 71 | CONFIG_RD_GZIP=y | ||
| 72 | # CONFIG_RD_BZIP2 is not set | ||
| 73 | # CONFIG_RD_LZMA is not set | ||
| 74 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 75 | CONFIG_SYSCTL=y | ||
| 76 | CONFIG_ANON_INODES=y | ||
| 77 | CONFIG_EMBEDDED=y | ||
| 78 | CONFIG_UID16=y | ||
| 79 | CONFIG_SYSCTL_SYSCALL=y | ||
| 80 | CONFIG_KALLSYMS=y | ||
| 81 | # CONFIG_KALLSYMS_ALL is not set | ||
| 82 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 83 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 84 | CONFIG_HOTPLUG=y | ||
| 85 | CONFIG_PRINTK=y | ||
| 86 | CONFIG_BUG=y | ||
| 87 | CONFIG_ELF_CORE=y | ||
| 88 | CONFIG_BASE_FULL=y | ||
| 89 | CONFIG_FUTEX=y | ||
| 90 | CONFIG_EPOLL=y | ||
| 91 | CONFIG_SIGNALFD=y | ||
| 92 | CONFIG_TIMERFD=y | ||
| 93 | CONFIG_EVENTFD=y | ||
| 94 | CONFIG_SHMEM=y | ||
| 95 | CONFIG_AIO=y | ||
| 96 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 97 | CONFIG_SLUB_DEBUG=y | ||
| 98 | CONFIG_COMPAT_BRK=y | ||
| 99 | # CONFIG_SLAB is not set | ||
| 100 | CONFIG_SLUB=y | ||
| 101 | # CONFIG_SLOB is not set | ||
| 102 | # CONFIG_PROFILING is not set | ||
| 103 | # CONFIG_MARKERS is not set | ||
| 104 | CONFIG_HAVE_OPROFILE=y | ||
| 105 | # CONFIG_KPROBES is not set | ||
| 106 | CONFIG_HAVE_KPROBES=y | ||
| 107 | CONFIG_HAVE_KRETPROBES=y | ||
| 108 | CONFIG_HAVE_CLK=y | ||
| 109 | # CONFIG_SLOW_WORK is not set | ||
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 111 | CONFIG_SLABINFO=y | ||
| 112 | CONFIG_RT_MUTEXES=y | ||
| 113 | CONFIG_BASE_SMALL=0 | ||
| 114 | CONFIG_MODULES=y | ||
| 115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 116 | CONFIG_MODULE_UNLOAD=y | ||
| 117 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
| 118 | CONFIG_MODVERSIONS=y | ||
| 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 120 | CONFIG_BLOCK=y | ||
| 121 | # CONFIG_LBD is not set | ||
| 122 | # CONFIG_BLK_DEV_BSG is not set | ||
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 124 | |||
| 125 | # | ||
| 126 | # IO Schedulers | ||
| 127 | # | ||
| 128 | CONFIG_IOSCHED_NOOP=y | ||
| 129 | CONFIG_IOSCHED_AS=y | ||
| 130 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 131 | # CONFIG_IOSCHED_CFQ is not set | ||
| 132 | CONFIG_DEFAULT_AS=y | ||
| 133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 134 | # CONFIG_DEFAULT_CFQ is not set | ||
| 135 | # CONFIG_DEFAULT_NOOP is not set | ||
| 136 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 137 | # CONFIG_FREEZER is not set | ||
| 138 | |||
| 139 | # | ||
| 140 | # System Type | ||
| 141 | # | ||
| 142 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 143 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 144 | # CONFIG_ARCH_REALVIEW is not set | ||
| 145 | # CONFIG_ARCH_VERSATILE is not set | ||
| 146 | # CONFIG_ARCH_AT91 is not set | ||
| 147 | # CONFIG_ARCH_CLPS711X is not set | ||
| 148 | # CONFIG_ARCH_EBSA110 is not set | ||
| 149 | # CONFIG_ARCH_EP93XX is not set | ||
| 150 | # CONFIG_ARCH_GEMINI is not set | ||
| 151 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 152 | # CONFIG_ARCH_NETX is not set | ||
| 153 | # CONFIG_ARCH_H720X is not set | ||
| 154 | # CONFIG_ARCH_IMX is not set | ||
| 155 | # CONFIG_ARCH_IOP13XX is not set | ||
| 156 | # CONFIG_ARCH_IOP32X is not set | ||
| 157 | # CONFIG_ARCH_IOP33X is not set | ||
| 158 | # CONFIG_ARCH_IXP23XX is not set | ||
| 159 | # CONFIG_ARCH_IXP2000 is not set | ||
| 160 | # CONFIG_ARCH_IXP4XX is not set | ||
| 161 | # CONFIG_ARCH_L7200 is not set | ||
| 162 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 163 | # CONFIG_ARCH_KS8695 is not set | ||
| 164 | # CONFIG_ARCH_NS9XXX is not set | ||
| 165 | # CONFIG_ARCH_LOKI is not set | ||
| 166 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 167 | # CONFIG_ARCH_MXC is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | ||
| 169 | # CONFIG_ARCH_PNX4008 is not set | ||
| 170 | # CONFIG_ARCH_PXA is not set | ||
| 171 | # CONFIG_ARCH_MMP is not set | ||
| 172 | # CONFIG_ARCH_RPC is not set | ||
| 173 | # CONFIG_ARCH_SA1100 is not set | ||
| 174 | # CONFIG_ARCH_S3C2410 is not set | ||
| 175 | # CONFIG_ARCH_S3C64XX is not set | ||
| 176 | # CONFIG_ARCH_SHARK is not set | ||
| 177 | # CONFIG_ARCH_LH7A40X is not set | ||
| 178 | CONFIG_ARCH_DAVINCI=y | ||
| 179 | # CONFIG_ARCH_OMAP is not set | ||
| 180 | # CONFIG_ARCH_MSM is not set | ||
| 181 | # CONFIG_ARCH_W90X900 is not set | ||
| 182 | CONFIG_CP_INTC=y | ||
| 183 | |||
| 184 | # | ||
| 185 | # TI DaVinci Implementations | ||
| 186 | # | ||
| 187 | |||
| 188 | # | ||
| 189 | # DaVinci Core Type | ||
| 190 | # | ||
| 191 | # CONFIG_ARCH_DAVINCI_DM644x is not set | ||
| 192 | # CONFIG_ARCH_DAVINCI_DM646x is not set | ||
| 193 | # CONFIG_ARCH_DAVINCI_DM355 is not set | ||
| 194 | CONFIG_ARCH_DAVINCI_DA830=y | ||
| 195 | |||
| 196 | # | ||
| 197 | # DaVinci Board Type | ||
| 198 | # | ||
| 199 | CONFIG_MACH_DAVINCI_DA830_EVM=y | ||
| 200 | CONFIG_DAVINCI_MUX=y | ||
| 201 | # CONFIG_DAVINCI_MUX_DEBUG is not set | ||
| 202 | # CONFIG_DAVINCI_MUX_WARNINGS is not set | ||
| 203 | CONFIG_DAVINCI_RESET_CLOCKS=y | ||
| 204 | |||
| 205 | # | ||
| 206 | # Processor Type | ||
| 207 | # | ||
| 208 | CONFIG_CPU_32=y | ||
| 209 | CONFIG_CPU_ARM926T=y | ||
| 210 | CONFIG_CPU_32v5=y | ||
| 211 | CONFIG_CPU_ABRT_EV5TJ=y | ||
| 212 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 213 | CONFIG_CPU_CACHE_VIVT=y | ||
| 214 | CONFIG_CPU_COPY_V4WB=y | ||
| 215 | CONFIG_CPU_TLB_V4WBI=y | ||
| 216 | CONFIG_CPU_CP15=y | ||
| 217 | CONFIG_CPU_CP15_MMU=y | ||
| 218 | |||
| 219 | # | ||
| 220 | # Processor Features | ||
| 221 | # | ||
| 222 | CONFIG_ARM_THUMB=y | ||
| 223 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 224 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 225 | CONFIG_CPU_DCACHE_WRITETHROUGH=y | ||
| 226 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
| 227 | # CONFIG_OUTER_CACHE is not set | ||
| 228 | CONFIG_COMMON_CLKDEV=y | ||
| 229 | |||
| 230 | # | ||
| 231 | # Bus support | ||
| 232 | # | ||
| 233 | # CONFIG_PCI_SYSCALL is not set | ||
| 234 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 235 | # CONFIG_PCCARD is not set | ||
| 236 | |||
| 237 | # | ||
| 238 | # Kernel Features | ||
| 239 | # | ||
| 240 | CONFIG_TICK_ONESHOT=y | ||
| 241 | CONFIG_NO_HZ=y | ||
| 242 | CONFIG_HIGH_RES_TIMERS=y | ||
| 243 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 244 | CONFIG_VMSPLIT_3G=y | ||
| 245 | # CONFIG_VMSPLIT_2G is not set | ||
| 246 | # CONFIG_VMSPLIT_1G is not set | ||
| 247 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 248 | CONFIG_PREEMPT=y | ||
| 249 | CONFIG_HZ=100 | ||
| 250 | CONFIG_AEABI=y | ||
| 251 | # CONFIG_OABI_COMPAT is not set | ||
| 252 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 253 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 254 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 255 | # CONFIG_HIGHMEM is not set | ||
| 256 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 257 | CONFIG_FLATMEM_MANUAL=y | ||
| 258 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 259 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 260 | CONFIG_FLATMEM=y | ||
| 261 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 262 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 263 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 264 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 265 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 266 | CONFIG_BOUNCE=y | ||
| 267 | CONFIG_VIRT_TO_BUS=y | ||
| 268 | CONFIG_UNEVICTABLE_LRU=y | ||
| 269 | CONFIG_HAVE_MLOCK=y | ||
| 270 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 271 | CONFIG_LEDS=y | ||
| 272 | # CONFIG_LEDS_CPU is not set | ||
| 273 | CONFIG_ALIGNMENT_TRAP=y | ||
| 274 | |||
| 275 | # | ||
| 276 | # Boot options | ||
| 277 | # | ||
| 278 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 279 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 280 | CONFIG_CMDLINE="" | ||
| 281 | # CONFIG_XIP_KERNEL is not set | ||
| 282 | # CONFIG_KEXEC is not set | ||
| 283 | |||
| 284 | # | ||
| 285 | # CPU Power Management | ||
| 286 | # | ||
| 287 | # CONFIG_CPU_IDLE is not set | ||
| 288 | |||
| 289 | # | ||
| 290 | # Floating point emulation | ||
| 291 | # | ||
| 292 | |||
| 293 | # | ||
| 294 | # At least one emulation must be selected | ||
| 295 | # | ||
| 296 | # CONFIG_VFP is not set | ||
| 297 | |||
| 298 | # | ||
| 299 | # Userspace binary formats | ||
| 300 | # | ||
| 301 | CONFIG_BINFMT_ELF=y | ||
| 302 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 303 | CONFIG_HAVE_AOUT=y | ||
| 304 | # CONFIG_BINFMT_AOUT is not set | ||
| 305 | # CONFIG_BINFMT_MISC is not set | ||
| 306 | |||
| 307 | # | ||
| 308 | # Power management options | ||
| 309 | # | ||
| 310 | # CONFIG_PM is not set | ||
| 311 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 312 | CONFIG_NET=y | ||
| 313 | |||
| 314 | # | ||
| 315 | # Networking options | ||
| 316 | # | ||
| 317 | CONFIG_PACKET=y | ||
| 318 | # CONFIG_PACKET_MMAP is not set | ||
| 319 | CONFIG_UNIX=y | ||
| 320 | CONFIG_XFRM=y | ||
| 321 | # CONFIG_XFRM_USER is not set | ||
| 322 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 323 | # CONFIG_XFRM_MIGRATE is not set | ||
| 324 | # CONFIG_XFRM_STATISTICS is not set | ||
| 325 | # CONFIG_NET_KEY is not set | ||
| 326 | CONFIG_INET=y | ||
| 327 | # CONFIG_IP_MULTICAST is not set | ||
| 328 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 329 | CONFIG_IP_FIB_HASH=y | ||
| 330 | CONFIG_IP_PNP=y | ||
| 331 | CONFIG_IP_PNP_DHCP=y | ||
| 332 | # CONFIG_IP_PNP_BOOTP is not set | ||
| 333 | # CONFIG_IP_PNP_RARP is not set | ||
| 334 | # CONFIG_NET_IPIP is not set | ||
| 335 | # CONFIG_NET_IPGRE is not set | ||
| 336 | # CONFIG_ARPD is not set | ||
| 337 | # CONFIG_SYN_COOKIES is not set | ||
| 338 | # CONFIG_INET_AH is not set | ||
| 339 | # CONFIG_INET_ESP is not set | ||
| 340 | # CONFIG_INET_IPCOMP is not set | ||
| 341 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 342 | CONFIG_INET_TUNNEL=m | ||
| 343 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 344 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 345 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 346 | # CONFIG_INET_LRO is not set | ||
| 347 | CONFIG_INET_DIAG=y | ||
| 348 | CONFIG_INET_TCP_DIAG=y | ||
| 349 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 350 | CONFIG_TCP_CONG_CUBIC=y | ||
| 351 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 352 | # CONFIG_TCP_MD5SIG is not set | ||
| 353 | CONFIG_IPV6=m | ||
| 354 | # CONFIG_IPV6_PRIVACY is not set | ||
| 355 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
| 356 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
| 357 | # CONFIG_INET6_AH is not set | ||
| 358 | # CONFIG_INET6_ESP is not set | ||
| 359 | # CONFIG_INET6_IPCOMP is not set | ||
| 360 | # CONFIG_IPV6_MIP6 is not set | ||
| 361 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 362 | # CONFIG_INET6_TUNNEL is not set | ||
| 363 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
| 364 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
| 365 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
| 366 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
| 367 | CONFIG_IPV6_SIT=m | ||
| 368 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
| 369 | # CONFIG_IPV6_TUNNEL is not set | ||
| 370 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
| 371 | # CONFIG_IPV6_MROUTE is not set | ||
| 372 | # CONFIG_NETWORK_SECMARK is not set | ||
| 373 | CONFIG_NETFILTER=y | ||
| 374 | # CONFIG_NETFILTER_DEBUG is not set | ||
| 375 | CONFIG_NETFILTER_ADVANCED=y | ||
| 376 | |||
| 377 | # | ||
| 378 | # Core Netfilter Configuration | ||
| 379 | # | ||
| 380 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
| 381 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
| 382 | # CONFIG_NF_CONNTRACK is not set | ||
| 383 | # CONFIG_NETFILTER_XTABLES is not set | ||
| 384 | # CONFIG_IP_VS is not set | ||
| 385 | |||
| 386 | # | ||
| 387 | # IP: Netfilter Configuration | ||
| 388 | # | ||
| 389 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
| 390 | # CONFIG_IP_NF_QUEUE is not set | ||
| 391 | # CONFIG_IP_NF_IPTABLES is not set | ||
| 392 | # CONFIG_IP_NF_ARPTABLES is not set | ||
| 393 | |||
| 394 | # | ||
| 395 | # IPv6: Netfilter Configuration | ||
| 396 | # | ||
| 397 | # CONFIG_IP6_NF_QUEUE is not set | ||
| 398 | # CONFIG_IP6_NF_IPTABLES is not set | ||
| 399 | # CONFIG_IP_DCCP is not set | ||
| 400 | # CONFIG_IP_SCTP is not set | ||
| 401 | # CONFIG_TIPC is not set | ||
| 402 | # CONFIG_ATM is not set | ||
| 403 | # CONFIG_BRIDGE is not set | ||
| 404 | # CONFIG_NET_DSA is not set | ||
| 405 | # CONFIG_VLAN_8021Q is not set | ||
| 406 | # CONFIG_DECNET is not set | ||
| 407 | # CONFIG_LLC2 is not set | ||
| 408 | # CONFIG_IPX is not set | ||
| 409 | # CONFIG_ATALK is not set | ||
| 410 | # CONFIG_X25 is not set | ||
| 411 | # CONFIG_LAPB is not set | ||
| 412 | # CONFIG_ECONET is not set | ||
| 413 | # CONFIG_WAN_ROUTER is not set | ||
| 414 | # CONFIG_PHONET is not set | ||
| 415 | # CONFIG_NET_SCHED is not set | ||
| 416 | # CONFIG_DCB is not set | ||
| 417 | |||
| 418 | # | ||
| 419 | # Network testing | ||
| 420 | # | ||
| 421 | # CONFIG_NET_PKTGEN is not set | ||
| 422 | # CONFIG_HAMRADIO is not set | ||
| 423 | # CONFIG_CAN is not set | ||
| 424 | # CONFIG_IRDA is not set | ||
| 425 | # CONFIG_BT is not set | ||
| 426 | # CONFIG_AF_RXRPC is not set | ||
| 427 | # CONFIG_WIRELESS is not set | ||
| 428 | # CONFIG_WIMAX is not set | ||
| 429 | # CONFIG_RFKILL is not set | ||
| 430 | # CONFIG_NET_9P is not set | ||
| 431 | |||
| 432 | # | ||
| 433 | # Device Drivers | ||
| 434 | # | ||
| 435 | |||
| 436 | # | ||
| 437 | # Generic Driver Options | ||
| 438 | # | ||
| 439 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 440 | CONFIG_STANDALONE=y | ||
| 441 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 442 | # CONFIG_FW_LOADER is not set | ||
| 443 | # CONFIG_DEBUG_DRIVER is not set | ||
| 444 | # CONFIG_DEBUG_DEVRES is not set | ||
| 445 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 446 | # CONFIG_CONNECTOR is not set | ||
| 447 | # CONFIG_MTD is not set | ||
| 448 | # CONFIG_PARPORT is not set | ||
| 449 | CONFIG_BLK_DEV=y | ||
| 450 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 451 | CONFIG_BLK_DEV_LOOP=m | ||
| 452 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 453 | # CONFIG_BLK_DEV_NBD is not set | ||
| 454 | CONFIG_BLK_DEV_RAM=y | ||
| 455 | CONFIG_BLK_DEV_RAM_COUNT=1 | ||
| 456 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
| 457 | # CONFIG_BLK_DEV_XIP is not set | ||
| 458 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 459 | # CONFIG_ATA_OVER_ETH is not set | ||
| 460 | CONFIG_MISC_DEVICES=y | ||
| 461 | # CONFIG_ICS932S401 is not set | ||
| 462 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 463 | # CONFIG_ISL29003 is not set | ||
| 464 | # CONFIG_C2PORT is not set | ||
| 465 | |||
| 466 | # | ||
| 467 | # EEPROM support | ||
| 468 | # | ||
| 469 | CONFIG_EEPROM_AT24=y | ||
| 470 | # CONFIG_EEPROM_LEGACY is not set | ||
| 471 | # CONFIG_EEPROM_93CX6 is not set | ||
| 472 | CONFIG_HAVE_IDE=y | ||
| 473 | # CONFIG_IDE is not set | ||
| 474 | |||
| 475 | # | ||
| 476 | # SCSI device support | ||
| 477 | # | ||
| 478 | # CONFIG_RAID_ATTRS is not set | ||
| 479 | CONFIG_SCSI=m | ||
| 480 | CONFIG_SCSI_DMA=y | ||
| 481 | # CONFIG_SCSI_TGT is not set | ||
| 482 | # CONFIG_SCSI_NETLINK is not set | ||
| 483 | CONFIG_SCSI_PROC_FS=y | ||
| 484 | |||
| 485 | # | ||
| 486 | # SCSI support type (disk, tape, CD-ROM) | ||
| 487 | # | ||
| 488 | CONFIG_BLK_DEV_SD=m | ||
| 489 | # CONFIG_CHR_DEV_ST is not set | ||
| 490 | # CONFIG_CHR_DEV_OSST is not set | ||
| 491 | # CONFIG_BLK_DEV_SR is not set | ||
| 492 | # CONFIG_CHR_DEV_SG is not set | ||
| 493 | # CONFIG_CHR_DEV_SCH is not set | ||
| 494 | |||
| 495 | # | ||
| 496 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 497 | # | ||
| 498 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 499 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 500 | # CONFIG_SCSI_LOGGING is not set | ||
| 501 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 502 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 503 | |||
| 504 | # | ||
| 505 | # SCSI Transports | ||
| 506 | # | ||
| 507 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 508 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 509 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 510 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 511 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 512 | CONFIG_SCSI_LOWLEVEL=y | ||
| 513 | # CONFIG_ISCSI_TCP is not set | ||
| 514 | # CONFIG_LIBFC is not set | ||
| 515 | # CONFIG_LIBFCOE is not set | ||
| 516 | # CONFIG_SCSI_DEBUG is not set | ||
| 517 | # CONFIG_SCSI_DH is not set | ||
| 518 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 519 | # CONFIG_ATA is not set | ||
| 520 | # CONFIG_MD is not set | ||
| 521 | CONFIG_NETDEVICES=y | ||
| 522 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 523 | # CONFIG_DUMMY is not set | ||
| 524 | # CONFIG_BONDING is not set | ||
| 525 | # CONFIG_MACVLAN is not set | ||
| 526 | # CONFIG_EQUALIZER is not set | ||
| 527 | CONFIG_TUN=m | ||
| 528 | # CONFIG_VETH is not set | ||
| 529 | CONFIG_PHYLIB=y | ||
| 530 | |||
| 531 | # | ||
| 532 | # MII PHY device drivers | ||
| 533 | # | ||
| 534 | # CONFIG_MARVELL_PHY is not set | ||
| 535 | # CONFIG_DAVICOM_PHY is not set | ||
| 536 | # CONFIG_QSEMI_PHY is not set | ||
| 537 | CONFIG_LXT_PHY=y | ||
| 538 | # CONFIG_CICADA_PHY is not set | ||
| 539 | # CONFIG_VITESSE_PHY is not set | ||
| 540 | # CONFIG_SMSC_PHY is not set | ||
| 541 | # CONFIG_BROADCOM_PHY is not set | ||
| 542 | # CONFIG_ICPLUS_PHY is not set | ||
| 543 | # CONFIG_REALTEK_PHY is not set | ||
| 544 | # CONFIG_NATIONAL_PHY is not set | ||
| 545 | # CONFIG_STE10XP is not set | ||
| 546 | CONFIG_LSI_ET1011C_PHY=y | ||
| 547 | # CONFIG_FIXED_PHY is not set | ||
| 548 | # CONFIG_MDIO_BITBANG is not set | ||
| 549 | CONFIG_NET_ETHERNET=y | ||
| 550 | CONFIG_MII=y | ||
| 551 | # CONFIG_AX88796 is not set | ||
| 552 | # CONFIG_SMC91X is not set | ||
| 553 | CONFIG_TI_DAVINCI_EMAC=y | ||
| 554 | # CONFIG_DM9000 is not set | ||
| 555 | # CONFIG_ETHOC is not set | ||
| 556 | # CONFIG_SMC911X is not set | ||
| 557 | # CONFIG_SMSC911X is not set | ||
| 558 | # CONFIG_DNET is not set | ||
| 559 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 560 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 561 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 562 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 563 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 564 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 565 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 566 | # CONFIG_B44 is not set | ||
| 567 | # CONFIG_NETDEV_1000 is not set | ||
| 568 | # CONFIG_NETDEV_10000 is not set | ||
| 569 | |||
| 570 | # | ||
| 571 | # Wireless LAN | ||
| 572 | # | ||
| 573 | # CONFIG_WLAN_PRE80211 is not set | ||
| 574 | # CONFIG_WLAN_80211 is not set | ||
| 575 | |||
| 576 | # | ||
| 577 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 578 | # | ||
| 579 | # CONFIG_WAN is not set | ||
| 580 | # CONFIG_PPP is not set | ||
| 581 | # CONFIG_SLIP is not set | ||
| 582 | CONFIG_NETCONSOLE=y | ||
| 583 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
| 584 | CONFIG_NETPOLL=y | ||
| 585 | CONFIG_NETPOLL_TRAP=y | ||
| 586 | CONFIG_NET_POLL_CONTROLLER=y | ||
| 587 | # CONFIG_ISDN is not set | ||
| 588 | |||
| 589 | # | ||
| 590 | # Input device support | ||
| 591 | # | ||
| 592 | CONFIG_INPUT=y | ||
| 593 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 594 | # CONFIG_INPUT_POLLDEV is not set | ||
| 595 | |||
| 596 | # | ||
| 597 | # Userland interfaces | ||
| 598 | # | ||
| 599 | CONFIG_INPUT_MOUSEDEV=m | ||
| 600 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 601 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 602 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 603 | # CONFIG_INPUT_JOYDEV is not set | ||
| 604 | CONFIG_INPUT_EVDEV=m | ||
| 605 | CONFIG_INPUT_EVBUG=m | ||
| 606 | |||
| 607 | # | ||
| 608 | # Input Device Drivers | ||
| 609 | # | ||
| 610 | CONFIG_INPUT_KEYBOARD=y | ||
| 611 | CONFIG_KEYBOARD_ATKBD=m | ||
| 612 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 613 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 614 | CONFIG_KEYBOARD_XTKBD=m | ||
| 615 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 616 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 617 | CONFIG_KEYBOARD_GPIO=y | ||
| 618 | # CONFIG_INPUT_MOUSE is not set | ||
| 619 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 620 | # CONFIG_INPUT_TABLET is not set | ||
| 621 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 622 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 623 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 624 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 625 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 626 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 627 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 628 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 629 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 630 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 631 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 632 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 633 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 634 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 635 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 636 | # CONFIG_INPUT_MISC is not set | ||
| 637 | |||
| 638 | # | ||
| 639 | # Hardware I/O ports | ||
| 640 | # | ||
| 641 | CONFIG_SERIO=y | ||
| 642 | CONFIG_SERIO_SERPORT=y | ||
| 643 | CONFIG_SERIO_LIBPS2=y | ||
| 644 | # CONFIG_SERIO_RAW is not set | ||
| 645 | # CONFIG_GAMEPORT is not set | ||
| 646 | |||
| 647 | # | ||
| 648 | # Character devices | ||
| 649 | # | ||
| 650 | CONFIG_VT=y | ||
| 651 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 652 | # CONFIG_VT_CONSOLE is not set | ||
| 653 | CONFIG_HW_CONSOLE=y | ||
| 654 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 655 | CONFIG_DEVKMEM=y | ||
| 656 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 657 | |||
| 658 | # | ||
| 659 | # Serial drivers | ||
| 660 | # | ||
| 661 | CONFIG_SERIAL_8250=y | ||
| 662 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 663 | CONFIG_SERIAL_8250_NR_UARTS=3 | ||
| 664 | CONFIG_SERIAL_8250_RUNTIME_UARTS=3 | ||
| 665 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 666 | |||
| 667 | # | ||
| 668 | # Non-8250 serial port support | ||
| 669 | # | ||
| 670 | CONFIG_SERIAL_CORE=y | ||
| 671 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 672 | CONFIG_UNIX98_PTYS=y | ||
| 673 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 674 | CONFIG_LEGACY_PTYS=y | ||
| 675 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 676 | # CONFIG_IPMI_HANDLER is not set | ||
| 677 | CONFIG_HW_RANDOM=m | ||
| 678 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 679 | # CONFIG_R3964 is not set | ||
| 680 | # CONFIG_RAW_DRIVER is not set | ||
| 681 | # CONFIG_TCG_TPM is not set | ||
| 682 | CONFIG_I2C=y | ||
| 683 | CONFIG_I2C_BOARDINFO=y | ||
| 684 | CONFIG_I2C_CHARDEV=y | ||
| 685 | CONFIG_I2C_HELPER_AUTO=y | ||
| 686 | |||
| 687 | # | ||
| 688 | # I2C Hardware Bus support | ||
| 689 | # | ||
| 690 | |||
| 691 | # | ||
| 692 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 693 | # | ||
| 694 | CONFIG_I2C_DAVINCI=y | ||
| 695 | # CONFIG_I2C_GPIO is not set | ||
| 696 | # CONFIG_I2C_OCORES is not set | ||
| 697 | # CONFIG_I2C_SIMTEC is not set | ||
| 698 | |||
| 699 | # | ||
| 700 | # External I2C/SMBus adapter drivers | ||
| 701 | # | ||
| 702 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 703 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 704 | |||
| 705 | # | ||
| 706 | # Other I2C/SMBus bus drivers | ||
| 707 | # | ||
| 708 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 709 | # CONFIG_I2C_STUB is not set | ||
| 710 | |||
| 711 | # | ||
| 712 | # Miscellaneous I2C Chip support | ||
| 713 | # | ||
| 714 | # CONFIG_DS1682 is not set | ||
| 715 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 716 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 717 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 718 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 719 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 720 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 721 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 722 | # CONFIG_SPI is not set | ||
| 723 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 724 | CONFIG_GPIOLIB=y | ||
| 725 | # CONFIG_DEBUG_GPIO is not set | ||
| 726 | # CONFIG_GPIO_SYSFS is not set | ||
| 727 | |||
| 728 | # | ||
| 729 | # Memory mapped GPIO expanders: | ||
| 730 | # | ||
| 731 | |||
| 732 | # | ||
| 733 | # I2C GPIO expanders: | ||
| 734 | # | ||
| 735 | # CONFIG_GPIO_MAX732X is not set | ||
| 736 | # CONFIG_GPIO_PCA953X is not set | ||
| 737 | CONFIG_GPIO_PCF857X=m | ||
| 738 | |||
| 739 | # | ||
| 740 | # PCI GPIO expanders: | ||
| 741 | # | ||
| 742 | |||
| 743 | # | ||
| 744 | # SPI GPIO expanders: | ||
| 745 | # | ||
| 746 | # CONFIG_W1 is not set | ||
| 747 | # CONFIG_POWER_SUPPLY is not set | ||
| 748 | # CONFIG_HWMON is not set | ||
| 749 | # CONFIG_THERMAL is not set | ||
| 750 | # CONFIG_THERMAL_HWMON is not set | ||
| 751 | CONFIG_WATCHDOG=y | ||
| 752 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 753 | |||
| 754 | # | ||
| 755 | # Watchdog Device Drivers | ||
| 756 | # | ||
| 757 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 758 | # CONFIG_DAVINCI_WATCHDOG is not set | ||
| 759 | CONFIG_SSB_POSSIBLE=y | ||
| 760 | |||
| 761 | # | ||
| 762 | # Sonics Silicon Backplane | ||
| 763 | # | ||
| 764 | # CONFIG_SSB is not set | ||
| 765 | |||
| 766 | # | ||
| 767 | # Multifunction device drivers | ||
| 768 | # | ||
| 769 | # CONFIG_MFD_CORE is not set | ||
| 770 | # CONFIG_MFD_SM501 is not set | ||
| 771 | # CONFIG_MFD_ASIC3 is not set | ||
| 772 | # CONFIG_HTC_EGPIO is not set | ||
| 773 | # CONFIG_HTC_PASIC3 is not set | ||
| 774 | # CONFIG_TPS65010 is not set | ||
| 775 | # CONFIG_TWL4030_CORE is not set | ||
| 776 | # CONFIG_MFD_TMIO is not set | ||
| 777 | # CONFIG_MFD_T7L66XB is not set | ||
| 778 | # CONFIG_MFD_TC6387XB is not set | ||
| 779 | # CONFIG_MFD_TC6393XB is not set | ||
| 780 | # CONFIG_PMIC_DA903X is not set | ||
| 781 | # CONFIG_MFD_WM8400 is not set | ||
| 782 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 783 | # CONFIG_MFD_PCF50633 is not set | ||
| 784 | |||
| 785 | # | ||
| 786 | # Multimedia devices | ||
| 787 | # | ||
| 788 | |||
| 789 | # | ||
| 790 | # Multimedia core support | ||
| 791 | # | ||
| 792 | # CONFIG_VIDEO_DEV is not set | ||
| 793 | # CONFIG_DVB_CORE is not set | ||
| 794 | # CONFIG_VIDEO_MEDIA is not set | ||
| 795 | |||
| 796 | # | ||
| 797 | # Multimedia drivers | ||
| 798 | # | ||
| 799 | # CONFIG_DAB is not set | ||
| 800 | |||
| 801 | # | ||
| 802 | # Graphics support | ||
| 803 | # | ||
| 804 | # CONFIG_VGASTATE is not set | ||
| 805 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 806 | # CONFIG_FB is not set | ||
| 807 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 808 | |||
| 809 | # | ||
| 810 | # Display device support | ||
| 811 | # | ||
| 812 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 813 | |||
| 814 | # | ||
| 815 | # Console display driver support | ||
| 816 | # | ||
| 817 | # CONFIG_VGA_CONSOLE is not set | ||
| 818 | CONFIG_DUMMY_CONSOLE=y | ||
| 819 | CONFIG_SOUND=m | ||
| 820 | # CONFIG_SOUND_OSS_CORE is not set | ||
| 821 | CONFIG_SND=m | ||
| 822 | CONFIG_SND_TIMER=m | ||
| 823 | CONFIG_SND_PCM=m | ||
| 824 | CONFIG_SND_JACK=y | ||
| 825 | # CONFIG_SND_SEQUENCER is not set | ||
| 826 | # CONFIG_SND_MIXER_OSS is not set | ||
| 827 | # CONFIG_SND_PCM_OSS is not set | ||
| 828 | # CONFIG_SND_HRTIMER is not set | ||
| 829 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 830 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 831 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 832 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 833 | # CONFIG_SND_DEBUG is not set | ||
| 834 | CONFIG_SND_DRIVERS=y | ||
| 835 | # CONFIG_SND_DUMMY is not set | ||
| 836 | # CONFIG_SND_MTPAV is not set | ||
| 837 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 838 | # CONFIG_SND_MPU401 is not set | ||
| 839 | CONFIG_SND_ARM=y | ||
| 840 | CONFIG_SND_SOC=m | ||
| 841 | CONFIG_SND_DAVINCI_SOC=m | ||
| 842 | CONFIG_SND_SOC_I2C_AND_SPI=m | ||
| 843 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 844 | # CONFIG_SOUND_PRIME is not set | ||
| 845 | # CONFIG_HID_SUPPORT is not set | ||
| 846 | # CONFIG_USB_SUPPORT is not set | ||
| 847 | # CONFIG_USB_MUSB_HOST is not set | ||
| 848 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 849 | # CONFIG_USB_MUSB_OTG is not set | ||
| 850 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 851 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 852 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 853 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 854 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 855 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 856 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 857 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 858 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 859 | # CONFIG_USB_GADGET_IMX is not set | ||
| 860 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 861 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 862 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 863 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 864 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 865 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 866 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 867 | # CONFIG_USB_ZERO is not set | ||
| 868 | # CONFIG_USB_ETH is not set | ||
| 869 | # CONFIG_USB_GADGETFS is not set | ||
| 870 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 871 | # CONFIG_USB_G_SERIAL is not set | ||
| 872 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 873 | # CONFIG_USB_G_PRINTER is not set | ||
| 874 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 875 | # CONFIG_MMC is not set | ||
| 876 | # CONFIG_MEMSTICK is not set | ||
| 877 | # CONFIG_ACCESSIBILITY is not set | ||
| 878 | # CONFIG_NEW_LEDS is not set | ||
| 879 | CONFIG_RTC_LIB=y | ||
| 880 | # CONFIG_RTC_CLASS is not set | ||
| 881 | # CONFIG_DMADEVICES is not set | ||
| 882 | # CONFIG_AUXDISPLAY is not set | ||
| 883 | # CONFIG_REGULATOR is not set | ||
| 884 | # CONFIG_UIO is not set | ||
| 885 | # CONFIG_STAGING is not set | ||
| 886 | |||
| 887 | # | ||
| 888 | # File systems | ||
| 889 | # | ||
| 890 | CONFIG_EXT2_FS=y | ||
| 891 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 892 | # CONFIG_EXT2_FS_XIP is not set | ||
| 893 | CONFIG_EXT3_FS=y | ||
| 894 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 895 | CONFIG_EXT3_FS_XATTR=y | ||
| 896 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 897 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 898 | # CONFIG_EXT4_FS is not set | ||
| 899 | CONFIG_JBD=y | ||
| 900 | # CONFIG_JBD_DEBUG is not set | ||
| 901 | CONFIG_FS_MBCACHE=y | ||
| 902 | # CONFIG_REISERFS_FS is not set | ||
| 903 | # CONFIG_JFS_FS is not set | ||
| 904 | # CONFIG_FS_POSIX_ACL is not set | ||
| 905 | CONFIG_FILE_LOCKING=y | ||
| 906 | CONFIG_XFS_FS=m | ||
| 907 | # CONFIG_XFS_QUOTA is not set | ||
| 908 | # CONFIG_XFS_POSIX_ACL is not set | ||
| 909 | # CONFIG_XFS_RT is not set | ||
| 910 | # CONFIG_XFS_DEBUG is not set | ||
| 911 | # CONFIG_OCFS2_FS is not set | ||
| 912 | # CONFIG_BTRFS_FS is not set | ||
| 913 | CONFIG_DNOTIFY=y | ||
| 914 | CONFIG_INOTIFY=y | ||
| 915 | CONFIG_INOTIFY_USER=y | ||
| 916 | # CONFIG_QUOTA is not set | ||
| 917 | # CONFIG_AUTOFS_FS is not set | ||
| 918 | CONFIG_AUTOFS4_FS=m | ||
| 919 | # CONFIG_FUSE_FS is not set | ||
| 920 | |||
| 921 | # | ||
| 922 | # Caches | ||
| 923 | # | ||
| 924 | # CONFIG_FSCACHE is not set | ||
| 925 | |||
| 926 | # | ||
| 927 | # CD-ROM/DVD Filesystems | ||
| 928 | # | ||
| 929 | # CONFIG_ISO9660_FS is not set | ||
| 930 | # CONFIG_UDF_FS is not set | ||
| 931 | |||
| 932 | # | ||
| 933 | # DOS/FAT/NT Filesystems | ||
| 934 | # | ||
| 935 | CONFIG_FAT_FS=y | ||
| 936 | CONFIG_MSDOS_FS=y | ||
| 937 | CONFIG_VFAT_FS=y | ||
| 938 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 939 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 940 | # CONFIG_NTFS_FS is not set | ||
| 941 | |||
| 942 | # | ||
| 943 | # Pseudo filesystems | ||
| 944 | # | ||
| 945 | CONFIG_PROC_FS=y | ||
| 946 | CONFIG_PROC_SYSCTL=y | ||
| 947 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 948 | CONFIG_SYSFS=y | ||
| 949 | CONFIG_TMPFS=y | ||
| 950 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 951 | # CONFIG_HUGETLB_PAGE is not set | ||
| 952 | # CONFIG_CONFIGFS_FS is not set | ||
| 953 | CONFIG_MISC_FILESYSTEMS=y | ||
| 954 | # CONFIG_ADFS_FS is not set | ||
| 955 | # CONFIG_AFFS_FS is not set | ||
| 956 | # CONFIG_HFS_FS is not set | ||
| 957 | # CONFIG_HFSPLUS_FS is not set | ||
| 958 | # CONFIG_BEFS_FS is not set | ||
| 959 | # CONFIG_BFS_FS is not set | ||
| 960 | # CONFIG_EFS_FS is not set | ||
| 961 | CONFIG_CRAMFS=y | ||
| 962 | # CONFIG_SQUASHFS is not set | ||
| 963 | # CONFIG_VXFS_FS is not set | ||
| 964 | CONFIG_MINIX_FS=m | ||
| 965 | # CONFIG_OMFS_FS is not set | ||
| 966 | # CONFIG_HPFS_FS is not set | ||
| 967 | # CONFIG_QNX4FS_FS is not set | ||
| 968 | # CONFIG_ROMFS_FS is not set | ||
| 969 | # CONFIG_SYSV_FS is not set | ||
| 970 | # CONFIG_UFS_FS is not set | ||
| 971 | # CONFIG_NILFS2_FS is not set | ||
| 972 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 973 | CONFIG_NFS_FS=y | ||
| 974 | CONFIG_NFS_V3=y | ||
| 975 | # CONFIG_NFS_V3_ACL is not set | ||
| 976 | # CONFIG_NFS_V4 is not set | ||
| 977 | CONFIG_ROOT_NFS=y | ||
| 978 | CONFIG_NFSD=m | ||
| 979 | CONFIG_NFSD_V3=y | ||
| 980 | # CONFIG_NFSD_V3_ACL is not set | ||
| 981 | # CONFIG_NFSD_V4 is not set | ||
| 982 | CONFIG_LOCKD=y | ||
| 983 | CONFIG_LOCKD_V4=y | ||
| 984 | CONFIG_EXPORTFS=m | ||
| 985 | CONFIG_NFS_COMMON=y | ||
| 986 | CONFIG_SUNRPC=y | ||
| 987 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 988 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 989 | CONFIG_SMB_FS=m | ||
| 990 | # CONFIG_SMB_NLS_DEFAULT is not set | ||
| 991 | # CONFIG_CIFS is not set | ||
| 992 | # CONFIG_NCP_FS is not set | ||
| 993 | # CONFIG_CODA_FS is not set | ||
| 994 | # CONFIG_AFS_FS is not set | ||
| 995 | |||
| 996 | # | ||
| 997 | # Partition Types | ||
| 998 | # | ||
| 999 | CONFIG_PARTITION_ADVANCED=y | ||
| 1000 | # CONFIG_ACORN_PARTITION is not set | ||
| 1001 | # CONFIG_OSF_PARTITION is not set | ||
| 1002 | # CONFIG_AMIGA_PARTITION is not set | ||
| 1003 | # CONFIG_ATARI_PARTITION is not set | ||
| 1004 | # CONFIG_MAC_PARTITION is not set | ||
| 1005 | CONFIG_MSDOS_PARTITION=y | ||
| 1006 | # CONFIG_BSD_DISKLABEL is not set | ||
| 1007 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 1008 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 1009 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 1010 | # CONFIG_LDM_PARTITION is not set | ||
| 1011 | # CONFIG_SGI_PARTITION is not set | ||
| 1012 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 1013 | # CONFIG_SUN_PARTITION is not set | ||
| 1014 | # CONFIG_KARMA_PARTITION is not set | ||
| 1015 | # CONFIG_EFI_PARTITION is not set | ||
| 1016 | # CONFIG_SYSV68_PARTITION is not set | ||
| 1017 | CONFIG_NLS=y | ||
| 1018 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1019 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1020 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1021 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1022 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1023 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1024 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1025 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1026 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1027 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1028 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1029 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1030 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1031 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1032 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1033 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1034 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1035 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1036 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1037 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1038 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1039 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1040 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1041 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1042 | CONFIG_NLS_ASCII=m | ||
| 1043 | CONFIG_NLS_ISO8859_1=y | ||
| 1044 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1045 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1046 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1047 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1048 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1049 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1050 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1051 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1052 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1053 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1054 | # CONFIG_NLS_KOI8_R is not set | ||
| 1055 | # CONFIG_NLS_KOI8_U is not set | ||
| 1056 | CONFIG_NLS_UTF8=m | ||
| 1057 | # CONFIG_DLM is not set | ||
| 1058 | |||
| 1059 | # | ||
| 1060 | # Kernel hacking | ||
| 1061 | # | ||
| 1062 | # CONFIG_PRINTK_TIME is not set | ||
| 1063 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1064 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1065 | CONFIG_FRAME_WARN=1024 | ||
| 1066 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1067 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1068 | CONFIG_DEBUG_FS=y | ||
| 1069 | # CONFIG_HEADERS_CHECK is not set | ||
| 1070 | CONFIG_DEBUG_KERNEL=y | ||
| 1071 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1072 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1073 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1074 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1075 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1076 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1077 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1078 | CONFIG_SCHED_DEBUG=y | ||
| 1079 | # CONFIG_SCHEDSTATS is not set | ||
| 1080 | CONFIG_TIMER_STATS=y | ||
| 1081 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1082 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 1083 | # CONFIG_SLUB_STATS is not set | ||
| 1084 | CONFIG_DEBUG_PREEMPT=y | ||
| 1085 | CONFIG_DEBUG_RT_MUTEXES=y | ||
| 1086 | CONFIG_DEBUG_PI_LIST=y | ||
| 1087 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1088 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1089 | CONFIG_DEBUG_MUTEXES=y | ||
| 1090 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1091 | # CONFIG_PROVE_LOCKING is not set | ||
| 1092 | # CONFIG_LOCK_STAT is not set | ||
| 1093 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1094 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1095 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1096 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1097 | # CONFIG_DEBUG_INFO is not set | ||
| 1098 | # CONFIG_DEBUG_VM is not set | ||
| 1099 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1100 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1101 | # CONFIG_DEBUG_LIST is not set | ||
| 1102 | # CONFIG_DEBUG_SG is not set | ||
| 1103 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1104 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1105 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1106 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1107 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1108 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1109 | # CONFIG_FAULT_INJECTION is not set | ||
| 1110 | # CONFIG_LATENCYTOP is not set | ||
| 1111 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1112 | # CONFIG_PAGE_POISONING is not set | ||
| 1113 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1114 | CONFIG_TRACING_SUPPORT=y | ||
| 1115 | |||
| 1116 | # | ||
| 1117 | # Tracers | ||
| 1118 | # | ||
| 1119 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1120 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1121 | # CONFIG_PREEMPT_TRACER is not set | ||
| 1122 | # CONFIG_SCHED_TRACER is not set | ||
| 1123 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1124 | # CONFIG_EVENT_TRACER is not set | ||
| 1125 | # CONFIG_BOOT_TRACER is not set | ||
| 1126 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1127 | # CONFIG_STACK_TRACER is not set | ||
| 1128 | # CONFIG_KMEMTRACE is not set | ||
| 1129 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1130 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1131 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1132 | # CONFIG_SAMPLES is not set | ||
| 1133 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1134 | # CONFIG_KGDB is not set | ||
| 1135 | CONFIG_ARM_UNWIND=y | ||
| 1136 | CONFIG_DEBUG_USER=y | ||
| 1137 | CONFIG_DEBUG_ERRORS=y | ||
| 1138 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1139 | # CONFIG_DEBUG_LL is not set | ||
| 1140 | |||
| 1141 | # | ||
| 1142 | # Security options | ||
| 1143 | # | ||
| 1144 | # CONFIG_KEYS is not set | ||
| 1145 | # CONFIG_SECURITY is not set | ||
| 1146 | # CONFIG_SECURITYFS is not set | ||
| 1147 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1148 | CONFIG_CRYPTO=y | ||
| 1149 | |||
| 1150 | # | ||
| 1151 | # Crypto core or helper | ||
| 1152 | # | ||
| 1153 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1154 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 1155 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 1156 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1157 | # CONFIG_CRYPTO_NULL is not set | ||
| 1158 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1159 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1160 | # CONFIG_CRYPTO_TEST is not set | ||
| 1161 | |||
| 1162 | # | ||
| 1163 | # Authenticated Encryption with Associated Data | ||
| 1164 | # | ||
| 1165 | # CONFIG_CRYPTO_CCM is not set | ||
| 1166 | # CONFIG_CRYPTO_GCM is not set | ||
| 1167 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1168 | |||
| 1169 | # | ||
| 1170 | # Block modes | ||
| 1171 | # | ||
| 1172 | # CONFIG_CRYPTO_CBC is not set | ||
| 1173 | # CONFIG_CRYPTO_CTR is not set | ||
| 1174 | # CONFIG_CRYPTO_CTS is not set | ||
| 1175 | # CONFIG_CRYPTO_ECB is not set | ||
| 1176 | # CONFIG_CRYPTO_LRW is not set | ||
| 1177 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1178 | # CONFIG_CRYPTO_XTS is not set | ||
| 1179 | |||
| 1180 | # | ||
| 1181 | # Hash modes | ||
| 1182 | # | ||
| 1183 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1184 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1185 | |||
| 1186 | # | ||
| 1187 | # Digest | ||
| 1188 | # | ||
| 1189 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1190 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1191 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1192 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1193 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1194 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1195 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1196 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1197 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1198 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1199 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1200 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1201 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1202 | |||
| 1203 | # | ||
| 1204 | # Ciphers | ||
| 1205 | # | ||
| 1206 | # CONFIG_CRYPTO_AES is not set | ||
| 1207 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1208 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1209 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1210 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1211 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1212 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1213 | # CONFIG_CRYPTO_DES is not set | ||
| 1214 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1215 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1216 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1217 | # CONFIG_CRYPTO_SEED is not set | ||
| 1218 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1219 | # CONFIG_CRYPTO_TEA is not set | ||
| 1220 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1221 | |||
| 1222 | # | ||
| 1223 | # Compression | ||
| 1224 | # | ||
| 1225 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1226 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1227 | # CONFIG_CRYPTO_LZO is not set | ||
| 1228 | |||
| 1229 | # | ||
| 1230 | # Random Number Generation | ||
| 1231 | # | ||
| 1232 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1233 | # CONFIG_CRYPTO_HW is not set | ||
| 1234 | # CONFIG_BINARY_PRINTF is not set | ||
| 1235 | |||
| 1236 | # | ||
| 1237 | # Library routines | ||
| 1238 | # | ||
| 1239 | CONFIG_BITREVERSE=y | ||
| 1240 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1241 | CONFIG_CRC_CCITT=m | ||
| 1242 | # CONFIG_CRC16 is not set | ||
| 1243 | CONFIG_CRC_T10DIF=m | ||
| 1244 | # CONFIG_CRC_ITU_T is not set | ||
| 1245 | CONFIG_CRC32=y | ||
| 1246 | # CONFIG_CRC7 is not set | ||
| 1247 | # CONFIG_LIBCRC32C is not set | ||
| 1248 | CONFIG_ZLIB_INFLATE=y | ||
| 1249 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1250 | CONFIG_GENERIC_ALLOCATOR=y | ||
| 1251 | CONFIG_HAS_IOMEM=y | ||
| 1252 | CONFIG_HAS_IOPORT=y | ||
| 1253 | CONFIG_HAS_DMA=y | ||
| 1254 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/da850_omapl138_defconfig b/arch/arm/configs/da850_omapl138_defconfig new file mode 100644 index 000000000000..842a70b079bf --- /dev/null +++ b/arch/arm/configs/da850_omapl138_defconfig | |||
| @@ -0,0 +1,1229 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.30-davinci1 | ||
| 4 | # Mon Jun 29 07:54:15 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_MMU=y | ||
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 25 | CONFIG_ZONE_DMA=y | ||
| 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 29 | |||
| 30 | # | ||
| 31 | # General setup | ||
| 32 | # | ||
| 33 | CONFIG_EXPERIMENTAL=y | ||
| 34 | CONFIG_BROKEN_ON_SMP=y | ||
| 35 | CONFIG_LOCK_KERNEL=y | ||
| 36 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 37 | CONFIG_LOCALVERSION="" | ||
| 38 | CONFIG_LOCALVERSION_AUTO=y | ||
| 39 | # CONFIG_SWAP is not set | ||
| 40 | CONFIG_SYSVIPC=y | ||
| 41 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 42 | CONFIG_POSIX_MQUEUE=y | ||
| 43 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 44 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 45 | # CONFIG_TASKSTATS is not set | ||
| 46 | # CONFIG_AUDIT is not set | ||
| 47 | |||
| 48 | # | ||
| 49 | # RCU Subsystem | ||
| 50 | # | ||
| 51 | CONFIG_CLASSIC_RCU=y | ||
| 52 | # CONFIG_TREE_RCU is not set | ||
| 53 | # CONFIG_PREEMPT_RCU is not set | ||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 55 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 56 | CONFIG_IKCONFIG=y | ||
| 57 | CONFIG_IKCONFIG_PROC=y | ||
| 58 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 59 | CONFIG_GROUP_SCHED=y | ||
| 60 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 61 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 62 | CONFIG_USER_SCHED=y | ||
| 63 | # CONFIG_CGROUP_SCHED is not set | ||
| 64 | # CONFIG_CGROUPS is not set | ||
| 65 | CONFIG_SYSFS_DEPRECATED=y | ||
| 66 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 67 | # CONFIG_RELAY is not set | ||
| 68 | # CONFIG_NAMESPACES is not set | ||
| 69 | CONFIG_BLK_DEV_INITRD=y | ||
| 70 | CONFIG_INITRAMFS_SOURCE="" | ||
| 71 | CONFIG_RD_GZIP=y | ||
| 72 | # CONFIG_RD_BZIP2 is not set | ||
| 73 | # CONFIG_RD_LZMA is not set | ||
| 74 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 75 | CONFIG_SYSCTL=y | ||
| 76 | CONFIG_ANON_INODES=y | ||
| 77 | CONFIG_EMBEDDED=y | ||
| 78 | CONFIG_UID16=y | ||
| 79 | CONFIG_SYSCTL_SYSCALL=y | ||
| 80 | CONFIG_KALLSYMS=y | ||
| 81 | # CONFIG_KALLSYMS_ALL is not set | ||
| 82 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 83 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 84 | CONFIG_HOTPLUG=y | ||
| 85 | CONFIG_PRINTK=y | ||
| 86 | CONFIG_BUG=y | ||
| 87 | CONFIG_ELF_CORE=y | ||
| 88 | CONFIG_BASE_FULL=y | ||
| 89 | CONFIG_FUTEX=y | ||
| 90 | CONFIG_EPOLL=y | ||
| 91 | CONFIG_SIGNALFD=y | ||
| 92 | CONFIG_TIMERFD=y | ||
| 93 | CONFIG_EVENTFD=y | ||
| 94 | CONFIG_SHMEM=y | ||
| 95 | CONFIG_AIO=y | ||
| 96 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 97 | CONFIG_SLUB_DEBUG=y | ||
| 98 | CONFIG_COMPAT_BRK=y | ||
| 99 | # CONFIG_SLAB is not set | ||
| 100 | CONFIG_SLUB=y | ||
| 101 | # CONFIG_SLOB is not set | ||
| 102 | # CONFIG_PROFILING is not set | ||
| 103 | # CONFIG_MARKERS is not set | ||
| 104 | CONFIG_HAVE_OPROFILE=y | ||
| 105 | # CONFIG_KPROBES is not set | ||
| 106 | CONFIG_HAVE_KPROBES=y | ||
| 107 | CONFIG_HAVE_KRETPROBES=y | ||
| 108 | CONFIG_HAVE_CLK=y | ||
| 109 | # CONFIG_SLOW_WORK is not set | ||
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 111 | CONFIG_SLABINFO=y | ||
| 112 | CONFIG_RT_MUTEXES=y | ||
| 113 | CONFIG_BASE_SMALL=0 | ||
| 114 | CONFIG_MODULES=y | ||
| 115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 116 | CONFIG_MODULE_UNLOAD=y | ||
| 117 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
| 118 | CONFIG_MODVERSIONS=y | ||
| 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 120 | CONFIG_BLOCK=y | ||
| 121 | # CONFIG_LBD is not set | ||
| 122 | # CONFIG_BLK_DEV_BSG is not set | ||
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 124 | |||
| 125 | # | ||
| 126 | # IO Schedulers | ||
| 127 | # | ||
| 128 | CONFIG_IOSCHED_NOOP=y | ||
| 129 | CONFIG_IOSCHED_AS=y | ||
| 130 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 131 | # CONFIG_IOSCHED_CFQ is not set | ||
| 132 | CONFIG_DEFAULT_AS=y | ||
| 133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 134 | # CONFIG_DEFAULT_CFQ is not set | ||
| 135 | # CONFIG_DEFAULT_NOOP is not set | ||
| 136 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
| 137 | # CONFIG_FREEZER is not set | ||
| 138 | |||
| 139 | # | ||
| 140 | # System Type | ||
| 141 | # | ||
| 142 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 143 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 144 | # CONFIG_ARCH_REALVIEW is not set | ||
| 145 | # CONFIG_ARCH_VERSATILE is not set | ||
| 146 | # CONFIG_ARCH_AT91 is not set | ||
| 147 | # CONFIG_ARCH_CLPS711X is not set | ||
| 148 | # CONFIG_ARCH_EBSA110 is not set | ||
| 149 | # CONFIG_ARCH_EP93XX is not set | ||
| 150 | # CONFIG_ARCH_GEMINI is not set | ||
| 151 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 152 | # CONFIG_ARCH_NETX is not set | ||
| 153 | # CONFIG_ARCH_H720X is not set | ||
| 154 | # CONFIG_ARCH_IMX is not set | ||
| 155 | # CONFIG_ARCH_IOP13XX is not set | ||
| 156 | # CONFIG_ARCH_IOP32X is not set | ||
| 157 | # CONFIG_ARCH_IOP33X is not set | ||
| 158 | # CONFIG_ARCH_IXP23XX is not set | ||
| 159 | # CONFIG_ARCH_IXP2000 is not set | ||
| 160 | # CONFIG_ARCH_IXP4XX is not set | ||
| 161 | # CONFIG_ARCH_L7200 is not set | ||
| 162 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 163 | # CONFIG_ARCH_KS8695 is not set | ||
| 164 | # CONFIG_ARCH_NS9XXX is not set | ||
| 165 | # CONFIG_ARCH_LOKI is not set | ||
| 166 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 167 | # CONFIG_ARCH_MXC is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | ||
| 169 | # CONFIG_ARCH_PNX4008 is not set | ||
| 170 | # CONFIG_ARCH_PXA is not set | ||
| 171 | # CONFIG_ARCH_MMP is not set | ||
| 172 | # CONFIG_ARCH_RPC is not set | ||
| 173 | # CONFIG_ARCH_SA1100 is not set | ||
| 174 | # CONFIG_ARCH_S3C2410 is not set | ||
| 175 | # CONFIG_ARCH_S3C64XX is not set | ||
| 176 | # CONFIG_ARCH_SHARK is not set | ||
| 177 | # CONFIG_ARCH_LH7A40X is not set | ||
| 178 | CONFIG_ARCH_DAVINCI=y | ||
| 179 | # CONFIG_ARCH_OMAP is not set | ||
| 180 | # CONFIG_ARCH_MSM is not set | ||
| 181 | # CONFIG_ARCH_W90X900 is not set | ||
| 182 | CONFIG_CP_INTC=y | ||
| 183 | |||
| 184 | # | ||
| 185 | # TI DaVinci Implementations | ||
| 186 | # | ||
| 187 | |||
| 188 | # | ||
| 189 | # DaVinci Core Type | ||
| 190 | # | ||
| 191 | # CONFIG_ARCH_DAVINCI_DM644x is not set | ||
| 192 | # CONFIG_ARCH_DAVINCI_DM355 is not set | ||
| 193 | # CONFIG_ARCH_DAVINCI_DM646x is not set | ||
| 194 | # CONFIG_ARCH_DAVINCI_DA830 is not set | ||
| 195 | CONFIG_ARCH_DAVINCI_DA850=y | ||
| 196 | CONFIG_ARCH_DAVINCI_DA8XX=y | ||
| 197 | # CONFIG_ARCH_DAVINCI_DM365 is not set | ||
| 198 | |||
| 199 | # | ||
| 200 | # DaVinci Board Type | ||
| 201 | # | ||
| 202 | CONFIG_MACH_DAVINCI_DA850_EVM=y | ||
| 203 | CONFIG_DAVINCI_MUX=y | ||
| 204 | # CONFIG_DAVINCI_MUX_DEBUG is not set | ||
| 205 | # CONFIG_DAVINCI_MUX_WARNINGS is not set | ||
| 206 | CONFIG_DAVINCI_RESET_CLOCKS=y | ||
| 207 | |||
| 208 | # | ||
| 209 | # Processor Type | ||
| 210 | # | ||
| 211 | CONFIG_CPU_32=y | ||
| 212 | CONFIG_CPU_ARM926T=y | ||
| 213 | CONFIG_CPU_32v5=y | ||
| 214 | CONFIG_CPU_ABRT_EV5TJ=y | ||
| 215 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 216 | CONFIG_CPU_CACHE_VIVT=y | ||
| 217 | CONFIG_CPU_COPY_V4WB=y | ||
| 218 | CONFIG_CPU_TLB_V4WBI=y | ||
| 219 | CONFIG_CPU_CP15=y | ||
| 220 | CONFIG_CPU_CP15_MMU=y | ||
| 221 | |||
| 222 | # | ||
| 223 | # Processor Features | ||
| 224 | # | ||
| 225 | CONFIG_ARM_THUMB=y | ||
| 226 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 227 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 228 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
| 229 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
| 230 | # CONFIG_OUTER_CACHE is not set | ||
| 231 | CONFIG_COMMON_CLKDEV=y | ||
| 232 | |||
| 233 | # | ||
| 234 | # Bus support | ||
| 235 | # | ||
| 236 | # CONFIG_PCI_SYSCALL is not set | ||
| 237 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 238 | # CONFIG_PCCARD is not set | ||
| 239 | |||
| 240 | # | ||
| 241 | # Kernel Features | ||
| 242 | # | ||
| 243 | CONFIG_TICK_ONESHOT=y | ||
| 244 | CONFIG_NO_HZ=y | ||
| 245 | CONFIG_HIGH_RES_TIMERS=y | ||
| 246 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 247 | CONFIG_VMSPLIT_3G=y | ||
| 248 | # CONFIG_VMSPLIT_2G is not set | ||
| 249 | # CONFIG_VMSPLIT_1G is not set | ||
| 250 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 251 | CONFIG_PREEMPT=y | ||
| 252 | CONFIG_HZ=100 | ||
| 253 | CONFIG_AEABI=y | ||
| 254 | # CONFIG_OABI_COMPAT is not set | ||
| 255 | # CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set | ||
| 256 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 257 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 258 | # CONFIG_HIGHMEM is not set | ||
| 259 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 260 | CONFIG_FLATMEM_MANUAL=y | ||
| 261 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 262 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 263 | CONFIG_FLATMEM=y | ||
| 264 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 265 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 266 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
| 267 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 268 | CONFIG_ZONE_DMA_FLAG=1 | ||
| 269 | CONFIG_BOUNCE=y | ||
| 270 | CONFIG_VIRT_TO_BUS=y | ||
| 271 | CONFIG_UNEVICTABLE_LRU=y | ||
| 272 | CONFIG_HAVE_MLOCK=y | ||
| 273 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 274 | CONFIG_LEDS=y | ||
| 275 | # CONFIG_LEDS_CPU is not set | ||
| 276 | CONFIG_ALIGNMENT_TRAP=y | ||
| 277 | |||
| 278 | # | ||
| 279 | # Boot options | ||
| 280 | # | ||
| 281 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 282 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 283 | CONFIG_CMDLINE="" | ||
| 284 | # CONFIG_XIP_KERNEL is not set | ||
| 285 | # CONFIG_KEXEC is not set | ||
| 286 | |||
| 287 | # | ||
| 288 | # CPU Power Management | ||
| 289 | # | ||
| 290 | # CONFIG_CPU_IDLE is not set | ||
| 291 | |||
| 292 | # | ||
| 293 | # Floating point emulation | ||
| 294 | # | ||
| 295 | |||
| 296 | # | ||
| 297 | # At least one emulation must be selected | ||
| 298 | # | ||
| 299 | # CONFIG_VFP is not set | ||
| 300 | |||
| 301 | # | ||
| 302 | # Userspace binary formats | ||
| 303 | # | ||
| 304 | CONFIG_BINFMT_ELF=y | ||
| 305 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 306 | CONFIG_HAVE_AOUT=y | ||
| 307 | # CONFIG_BINFMT_AOUT is not set | ||
| 308 | # CONFIG_BINFMT_MISC is not set | ||
| 309 | |||
| 310 | # | ||
| 311 | # Power management options | ||
| 312 | # | ||
| 313 | # CONFIG_PM is not set | ||
| 314 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 315 | CONFIG_NET=y | ||
| 316 | |||
| 317 | # | ||
| 318 | # Networking options | ||
| 319 | # | ||
| 320 | CONFIG_PACKET=y | ||
| 321 | # CONFIG_PACKET_MMAP is not set | ||
| 322 | CONFIG_UNIX=y | ||
| 323 | CONFIG_XFRM=y | ||
| 324 | # CONFIG_XFRM_USER is not set | ||
| 325 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 326 | # CONFIG_XFRM_MIGRATE is not set | ||
| 327 | # CONFIG_XFRM_STATISTICS is not set | ||
| 328 | # CONFIG_NET_KEY is not set | ||
| 329 | CONFIG_INET=y | ||
| 330 | # CONFIG_IP_MULTICAST is not set | ||
| 331 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 332 | CONFIG_IP_FIB_HASH=y | ||
| 333 | CONFIG_IP_PNP=y | ||
| 334 | CONFIG_IP_PNP_DHCP=y | ||
| 335 | # CONFIG_IP_PNP_BOOTP is not set | ||
| 336 | # CONFIG_IP_PNP_RARP is not set | ||
| 337 | # CONFIG_NET_IPIP is not set | ||
| 338 | # CONFIG_NET_IPGRE is not set | ||
| 339 | # CONFIG_ARPD is not set | ||
| 340 | # CONFIG_SYN_COOKIES is not set | ||
| 341 | # CONFIG_INET_AH is not set | ||
| 342 | # CONFIG_INET_ESP is not set | ||
| 343 | # CONFIG_INET_IPCOMP is not set | ||
| 344 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 345 | CONFIG_INET_TUNNEL=m | ||
| 346 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 347 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 348 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 349 | # CONFIG_INET_LRO is not set | ||
| 350 | CONFIG_INET_DIAG=y | ||
| 351 | CONFIG_INET_TCP_DIAG=y | ||
| 352 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 353 | CONFIG_TCP_CONG_CUBIC=y | ||
| 354 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 355 | # CONFIG_TCP_MD5SIG is not set | ||
| 356 | CONFIG_IPV6=m | ||
| 357 | # CONFIG_IPV6_PRIVACY is not set | ||
| 358 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
| 359 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
| 360 | # CONFIG_INET6_AH is not set | ||
| 361 | # CONFIG_INET6_ESP is not set | ||
| 362 | # CONFIG_INET6_IPCOMP is not set | ||
| 363 | # CONFIG_IPV6_MIP6 is not set | ||
| 364 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
| 365 | # CONFIG_INET6_TUNNEL is not set | ||
| 366 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
| 367 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
| 368 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
| 369 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
| 370 | CONFIG_IPV6_SIT=m | ||
| 371 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
| 372 | # CONFIG_IPV6_TUNNEL is not set | ||
| 373 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
| 374 | # CONFIG_IPV6_MROUTE is not set | ||
| 375 | # CONFIG_NETWORK_SECMARK is not set | ||
| 376 | CONFIG_NETFILTER=y | ||
| 377 | # CONFIG_NETFILTER_DEBUG is not set | ||
| 378 | CONFIG_NETFILTER_ADVANCED=y | ||
| 379 | |||
| 380 | # | ||
| 381 | # Core Netfilter Configuration | ||
| 382 | # | ||
| 383 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
| 384 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
| 385 | # CONFIG_NF_CONNTRACK is not set | ||
| 386 | # CONFIG_NETFILTER_XTABLES is not set | ||
| 387 | # CONFIG_IP_VS is not set | ||
| 388 | |||
| 389 | # | ||
| 390 | # IP: Netfilter Configuration | ||
| 391 | # | ||
| 392 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
| 393 | # CONFIG_IP_NF_QUEUE is not set | ||
| 394 | # CONFIG_IP_NF_IPTABLES is not set | ||
| 395 | # CONFIG_IP_NF_ARPTABLES is not set | ||
| 396 | |||
| 397 | # | ||
| 398 | # IPv6: Netfilter Configuration | ||
| 399 | # | ||
| 400 | # CONFIG_IP6_NF_QUEUE is not set | ||
| 401 | # CONFIG_IP6_NF_IPTABLES is not set | ||
| 402 | # CONFIG_IP_DCCP is not set | ||
| 403 | # CONFIG_IP_SCTP is not set | ||
| 404 | # CONFIG_TIPC is not set | ||
| 405 | # CONFIG_ATM is not set | ||
| 406 | # CONFIG_BRIDGE is not set | ||
| 407 | # CONFIG_NET_DSA is not set | ||
| 408 | # CONFIG_VLAN_8021Q is not set | ||
| 409 | # CONFIG_DECNET is not set | ||
| 410 | # CONFIG_LLC2 is not set | ||
| 411 | # CONFIG_IPX is not set | ||
| 412 | # CONFIG_ATALK is not set | ||
| 413 | # CONFIG_X25 is not set | ||
| 414 | # CONFIG_LAPB is not set | ||
| 415 | # CONFIG_ECONET is not set | ||
| 416 | # CONFIG_WAN_ROUTER is not set | ||
| 417 | # CONFIG_PHONET is not set | ||
| 418 | # CONFIG_NET_SCHED is not set | ||
| 419 | # CONFIG_DCB is not set | ||
| 420 | |||
| 421 | # | ||
| 422 | # Network testing | ||
| 423 | # | ||
| 424 | # CONFIG_NET_PKTGEN is not set | ||
| 425 | # CONFIG_HAMRADIO is not set | ||
| 426 | # CONFIG_CAN is not set | ||
| 427 | # CONFIG_IRDA is not set | ||
| 428 | # CONFIG_BT is not set | ||
| 429 | # CONFIG_AF_RXRPC is not set | ||
| 430 | # CONFIG_WIRELESS is not set | ||
| 431 | # CONFIG_WIMAX is not set | ||
| 432 | # CONFIG_RFKILL is not set | ||
| 433 | # CONFIG_NET_9P is not set | ||
| 434 | |||
| 435 | # | ||
| 436 | # Device Drivers | ||
| 437 | # | ||
| 438 | |||
| 439 | # | ||
| 440 | # Generic Driver Options | ||
| 441 | # | ||
| 442 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 443 | CONFIG_STANDALONE=y | ||
| 444 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 445 | # CONFIG_FW_LOADER is not set | ||
| 446 | # CONFIG_DEBUG_DRIVER is not set | ||
| 447 | # CONFIG_DEBUG_DEVRES is not set | ||
| 448 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 449 | # CONFIG_CONNECTOR is not set | ||
| 450 | # CONFIG_MTD is not set | ||
| 451 | # CONFIG_PARPORT is not set | ||
| 452 | CONFIG_BLK_DEV=y | ||
| 453 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 454 | CONFIG_BLK_DEV_LOOP=m | ||
| 455 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
| 456 | # CONFIG_BLK_DEV_NBD is not set | ||
| 457 | CONFIG_BLK_DEV_RAM=y | ||
| 458 | CONFIG_BLK_DEV_RAM_COUNT=1 | ||
| 459 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
| 460 | # CONFIG_BLK_DEV_XIP is not set | ||
| 461 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 462 | # CONFIG_ATA_OVER_ETH is not set | ||
| 463 | CONFIG_MISC_DEVICES=y | ||
| 464 | # CONFIG_ICS932S401 is not set | ||
| 465 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 466 | # CONFIG_ISL29003 is not set | ||
| 467 | # CONFIG_C2PORT is not set | ||
| 468 | |||
| 469 | # | ||
| 470 | # EEPROM support | ||
| 471 | # | ||
| 472 | CONFIG_EEPROM_AT24=y | ||
| 473 | # CONFIG_EEPROM_LEGACY is not set | ||
| 474 | # CONFIG_EEPROM_93CX6 is not set | ||
| 475 | CONFIG_HAVE_IDE=y | ||
| 476 | # CONFIG_IDE is not set | ||
| 477 | |||
| 478 | # | ||
| 479 | # SCSI device support | ||
| 480 | # | ||
| 481 | # CONFIG_RAID_ATTRS is not set | ||
| 482 | CONFIG_SCSI=m | ||
| 483 | CONFIG_SCSI_DMA=y | ||
| 484 | # CONFIG_SCSI_TGT is not set | ||
| 485 | # CONFIG_SCSI_NETLINK is not set | ||
| 486 | CONFIG_SCSI_PROC_FS=y | ||
| 487 | |||
| 488 | # | ||
| 489 | # SCSI support type (disk, tape, CD-ROM) | ||
| 490 | # | ||
| 491 | CONFIG_BLK_DEV_SD=m | ||
| 492 | # CONFIG_CHR_DEV_ST is not set | ||
| 493 | # CONFIG_CHR_DEV_OSST is not set | ||
| 494 | # CONFIG_BLK_DEV_SR is not set | ||
| 495 | # CONFIG_CHR_DEV_SG is not set | ||
| 496 | # CONFIG_CHR_DEV_SCH is not set | ||
| 497 | |||
| 498 | # | ||
| 499 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 500 | # | ||
| 501 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 502 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 503 | # CONFIG_SCSI_LOGGING is not set | ||
| 504 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 505 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 506 | |||
| 507 | # | ||
| 508 | # SCSI Transports | ||
| 509 | # | ||
| 510 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 511 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 512 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 513 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 514 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 515 | CONFIG_SCSI_LOWLEVEL=y | ||
| 516 | # CONFIG_ISCSI_TCP is not set | ||
| 517 | # CONFIG_LIBFC is not set | ||
| 518 | # CONFIG_LIBFCOE is not set | ||
| 519 | # CONFIG_SCSI_DEBUG is not set | ||
| 520 | # CONFIG_SCSI_DH is not set | ||
| 521 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 522 | # CONFIG_ATA is not set | ||
| 523 | # CONFIG_MD is not set | ||
| 524 | CONFIG_NETDEVICES=y | ||
| 525 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 526 | # CONFIG_DUMMY is not set | ||
| 527 | # CONFIG_BONDING is not set | ||
| 528 | # CONFIG_MACVLAN is not set | ||
| 529 | # CONFIG_EQUALIZER is not set | ||
| 530 | CONFIG_TUN=m | ||
| 531 | # CONFIG_VETH is not set | ||
| 532 | CONFIG_PHYLIB=y | ||
| 533 | |||
| 534 | # | ||
| 535 | # MII PHY device drivers | ||
| 536 | # | ||
| 537 | # CONFIG_MARVELL_PHY is not set | ||
| 538 | # CONFIG_DAVICOM_PHY is not set | ||
| 539 | # CONFIG_QSEMI_PHY is not set | ||
| 540 | CONFIG_LXT_PHY=y | ||
| 541 | # CONFIG_CICADA_PHY is not set | ||
| 542 | # CONFIG_VITESSE_PHY is not set | ||
| 543 | # CONFIG_SMSC_PHY is not set | ||
| 544 | # CONFIG_BROADCOM_PHY is not set | ||
| 545 | # CONFIG_ICPLUS_PHY is not set | ||
| 546 | # CONFIG_REALTEK_PHY is not set | ||
| 547 | # CONFIG_NATIONAL_PHY is not set | ||
| 548 | # CONFIG_STE10XP is not set | ||
| 549 | CONFIG_LSI_ET1011C_PHY=y | ||
| 550 | # CONFIG_FIXED_PHY is not set | ||
| 551 | # CONFIG_MDIO_BITBANG is not set | ||
| 552 | CONFIG_NET_ETHERNET=y | ||
| 553 | CONFIG_MII=y | ||
| 554 | # CONFIG_AX88796 is not set | ||
| 555 | # CONFIG_SMC91X is not set | ||
| 556 | # CONFIG_TI_DAVINCI_EMAC is not set | ||
| 557 | # CONFIG_DM9000 is not set | ||
| 558 | # CONFIG_ETHOC is not set | ||
| 559 | # CONFIG_SMC911X is not set | ||
| 560 | # CONFIG_SMSC911X is not set | ||
| 561 | # CONFIG_DNET is not set | ||
| 562 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 563 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 564 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 565 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 566 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 567 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 568 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 569 | # CONFIG_B44 is not set | ||
| 570 | # CONFIG_NETDEV_1000 is not set | ||
| 571 | # CONFIG_NETDEV_10000 is not set | ||
| 572 | |||
| 573 | # | ||
| 574 | # Wireless LAN | ||
| 575 | # | ||
| 576 | # CONFIG_WLAN_PRE80211 is not set | ||
| 577 | # CONFIG_WLAN_80211 is not set | ||
| 578 | |||
| 579 | # | ||
| 580 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 581 | # | ||
| 582 | # CONFIG_WAN is not set | ||
| 583 | # CONFIG_PPP is not set | ||
| 584 | # CONFIG_SLIP is not set | ||
| 585 | CONFIG_NETCONSOLE=y | ||
| 586 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
| 587 | CONFIG_NETPOLL=y | ||
| 588 | CONFIG_NETPOLL_TRAP=y | ||
| 589 | CONFIG_NET_POLL_CONTROLLER=y | ||
| 590 | # CONFIG_ISDN is not set | ||
| 591 | |||
| 592 | # | ||
| 593 | # Input device support | ||
| 594 | # | ||
| 595 | CONFIG_INPUT=y | ||
| 596 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 597 | # CONFIG_INPUT_POLLDEV is not set | ||
| 598 | |||
| 599 | # | ||
| 600 | # Userland interfaces | ||
| 601 | # | ||
| 602 | CONFIG_INPUT_MOUSEDEV=m | ||
| 603 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 604 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 605 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 606 | # CONFIG_INPUT_JOYDEV is not set | ||
| 607 | CONFIG_INPUT_EVDEV=m | ||
| 608 | CONFIG_INPUT_EVBUG=m | ||
| 609 | |||
| 610 | # | ||
| 611 | # Input Device Drivers | ||
| 612 | # | ||
| 613 | CONFIG_INPUT_KEYBOARD=y | ||
| 614 | CONFIG_KEYBOARD_ATKBD=m | ||
| 615 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 616 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 617 | CONFIG_KEYBOARD_XTKBD=m | ||
| 618 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 619 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 620 | CONFIG_KEYBOARD_GPIO=y | ||
| 621 | # CONFIG_INPUT_MOUSE is not set | ||
| 622 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 623 | # CONFIG_INPUT_TABLET is not set | ||
| 624 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 625 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 626 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 627 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 628 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 629 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 630 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 631 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 632 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 633 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 634 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 635 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 636 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 637 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 638 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 639 | # CONFIG_INPUT_MISC is not set | ||
| 640 | |||
| 641 | # | ||
| 642 | # Hardware I/O ports | ||
| 643 | # | ||
| 644 | CONFIG_SERIO=y | ||
| 645 | CONFIG_SERIO_SERPORT=y | ||
| 646 | CONFIG_SERIO_LIBPS2=y | ||
| 647 | # CONFIG_SERIO_RAW is not set | ||
| 648 | # CONFIG_GAMEPORT is not set | ||
| 649 | |||
| 650 | # | ||
| 651 | # Character devices | ||
| 652 | # | ||
| 653 | CONFIG_VT=y | ||
| 654 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 655 | # CONFIG_VT_CONSOLE is not set | ||
| 656 | CONFIG_HW_CONSOLE=y | ||
| 657 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 658 | CONFIG_DEVKMEM=y | ||
| 659 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 660 | |||
| 661 | # | ||
| 662 | # Serial drivers | ||
| 663 | # | ||
| 664 | CONFIG_SERIAL_8250=y | ||
| 665 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 666 | CONFIG_SERIAL_8250_NR_UARTS=3 | ||
| 667 | CONFIG_SERIAL_8250_RUNTIME_UARTS=3 | ||
| 668 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 669 | |||
| 670 | # | ||
| 671 | # Non-8250 serial port support | ||
| 672 | # | ||
| 673 | CONFIG_SERIAL_CORE=y | ||
| 674 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 675 | CONFIG_UNIX98_PTYS=y | ||
| 676 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 677 | CONFIG_LEGACY_PTYS=y | ||
| 678 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 679 | # CONFIG_IPMI_HANDLER is not set | ||
| 680 | CONFIG_HW_RANDOM=m | ||
| 681 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 682 | # CONFIG_R3964 is not set | ||
| 683 | # CONFIG_RAW_DRIVER is not set | ||
| 684 | # CONFIG_TCG_TPM is not set | ||
| 685 | CONFIG_I2C=y | ||
| 686 | CONFIG_I2C_BOARDINFO=y | ||
| 687 | CONFIG_I2C_CHARDEV=y | ||
| 688 | CONFIG_I2C_HELPER_AUTO=y | ||
| 689 | |||
| 690 | # | ||
| 691 | # I2C Hardware Bus support | ||
| 692 | # | ||
| 693 | |||
| 694 | # | ||
| 695 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 696 | # | ||
| 697 | CONFIG_I2C_DAVINCI=y | ||
| 698 | # CONFIG_I2C_GPIO is not set | ||
| 699 | # CONFIG_I2C_OCORES is not set | ||
| 700 | # CONFIG_I2C_SIMTEC is not set | ||
| 701 | |||
| 702 | # | ||
| 703 | # External I2C/SMBus adapter drivers | ||
| 704 | # | ||
| 705 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 706 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 707 | |||
| 708 | # | ||
| 709 | # Other I2C/SMBus bus drivers | ||
| 710 | # | ||
| 711 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 712 | # CONFIG_I2C_STUB is not set | ||
| 713 | |||
| 714 | # | ||
| 715 | # Miscellaneous I2C Chip support | ||
| 716 | # | ||
| 717 | # CONFIG_DS1682 is not set | ||
| 718 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 719 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 720 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 721 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 722 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 723 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 724 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 725 | # CONFIG_SPI is not set | ||
| 726 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 727 | CONFIG_GPIOLIB=y | ||
| 728 | # CONFIG_DEBUG_GPIO is not set | ||
| 729 | # CONFIG_GPIO_SYSFS is not set | ||
| 730 | |||
| 731 | # | ||
| 732 | # Memory mapped GPIO expanders: | ||
| 733 | # | ||
| 734 | |||
| 735 | # | ||
| 736 | # I2C GPIO expanders: | ||
| 737 | # | ||
| 738 | # CONFIG_GPIO_MAX732X is not set | ||
| 739 | # CONFIG_GPIO_PCA953X is not set | ||
| 740 | CONFIG_GPIO_PCF857X=m | ||
| 741 | |||
| 742 | # | ||
| 743 | # PCI GPIO expanders: | ||
| 744 | # | ||
| 745 | |||
| 746 | # | ||
| 747 | # SPI GPIO expanders: | ||
| 748 | # | ||
| 749 | # CONFIG_W1 is not set | ||
| 750 | # CONFIG_POWER_SUPPLY is not set | ||
| 751 | # CONFIG_HWMON is not set | ||
| 752 | # CONFIG_THERMAL is not set | ||
| 753 | # CONFIG_THERMAL_HWMON is not set | ||
| 754 | CONFIG_WATCHDOG=y | ||
| 755 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
| 756 | |||
| 757 | # | ||
| 758 | # Watchdog Device Drivers | ||
| 759 | # | ||
| 760 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 761 | # CONFIG_DAVINCI_WATCHDOG is not set | ||
| 762 | CONFIG_SSB_POSSIBLE=y | ||
| 763 | |||
| 764 | # | ||
| 765 | # Sonics Silicon Backplane | ||
| 766 | # | ||
| 767 | # CONFIG_SSB is not set | ||
| 768 | |||
| 769 | # | ||
| 770 | # Multifunction device drivers | ||
| 771 | # | ||
| 772 | # CONFIG_MFD_CORE is not set | ||
| 773 | # CONFIG_MFD_SM501 is not set | ||
| 774 | # CONFIG_MFD_ASIC3 is not set | ||
| 775 | # CONFIG_HTC_EGPIO is not set | ||
| 776 | # CONFIG_HTC_PASIC3 is not set | ||
| 777 | # CONFIG_TPS65010 is not set | ||
| 778 | # CONFIG_TWL4030_CORE is not set | ||
| 779 | # CONFIG_MFD_TMIO is not set | ||
| 780 | # CONFIG_MFD_T7L66XB is not set | ||
| 781 | # CONFIG_MFD_TC6387XB is not set | ||
| 782 | # CONFIG_MFD_TC6393XB is not set | ||
| 783 | # CONFIG_PMIC_DA903X is not set | ||
| 784 | # CONFIG_MFD_WM8400 is not set | ||
| 785 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 786 | # CONFIG_MFD_PCF50633 is not set | ||
| 787 | |||
| 788 | # | ||
| 789 | # Multimedia devices | ||
| 790 | # | ||
| 791 | |||
| 792 | # | ||
| 793 | # Multimedia core support | ||
| 794 | # | ||
| 795 | # CONFIG_VIDEO_DEV is not set | ||
| 796 | # CONFIG_DVB_CORE is not set | ||
| 797 | # CONFIG_VIDEO_MEDIA is not set | ||
| 798 | |||
| 799 | # | ||
| 800 | # Multimedia drivers | ||
| 801 | # | ||
| 802 | # CONFIG_DAB is not set | ||
| 803 | |||
| 804 | # | ||
| 805 | # Graphics support | ||
| 806 | # | ||
| 807 | # CONFIG_VGASTATE is not set | ||
| 808 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 809 | # CONFIG_FB is not set | ||
| 810 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 811 | |||
| 812 | # | ||
| 813 | # Display device support | ||
| 814 | # | ||
| 815 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 816 | |||
| 817 | # | ||
| 818 | # Console display driver support | ||
| 819 | # | ||
| 820 | # CONFIG_VGA_CONSOLE is not set | ||
| 821 | CONFIG_DUMMY_CONSOLE=y | ||
| 822 | CONFIG_SOUND=m | ||
| 823 | # CONFIG_SOUND_OSS_CORE is not set | ||
| 824 | CONFIG_SND=m | ||
| 825 | CONFIG_SND_TIMER=m | ||
| 826 | CONFIG_SND_PCM=m | ||
| 827 | CONFIG_SND_JACK=y | ||
| 828 | # CONFIG_SND_SEQUENCER is not set | ||
| 829 | # CONFIG_SND_MIXER_OSS is not set | ||
| 830 | # CONFIG_SND_PCM_OSS is not set | ||
| 831 | # CONFIG_SND_HRTIMER is not set | ||
| 832 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 833 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 834 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 835 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 836 | # CONFIG_SND_DEBUG is not set | ||
| 837 | CONFIG_SND_DRIVERS=y | ||
| 838 | # CONFIG_SND_DUMMY is not set | ||
| 839 | # CONFIG_SND_MTPAV is not set | ||
| 840 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 841 | # CONFIG_SND_MPU401 is not set | ||
| 842 | CONFIG_SND_ARM=y | ||
| 843 | CONFIG_SND_SOC=m | ||
| 844 | CONFIG_SND_DAVINCI_SOC=m | ||
| 845 | CONFIG_SND_SOC_I2C_AND_SPI=m | ||
| 846 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 847 | # CONFIG_SOUND_PRIME is not set | ||
| 848 | # CONFIG_HID_SUPPORT is not set | ||
| 849 | # CONFIG_USB_SUPPORT is not set | ||
| 850 | # CONFIG_MMC is not set | ||
| 851 | # CONFIG_MEMSTICK is not set | ||
| 852 | # CONFIG_ACCESSIBILITY is not set | ||
| 853 | # CONFIG_NEW_LEDS is not set | ||
| 854 | CONFIG_RTC_LIB=y | ||
| 855 | # CONFIG_RTC_CLASS is not set | ||
| 856 | # CONFIG_DMADEVICES is not set | ||
| 857 | # CONFIG_AUXDISPLAY is not set | ||
| 858 | # CONFIG_REGULATOR is not set | ||
| 859 | # CONFIG_UIO is not set | ||
| 860 | # CONFIG_STAGING is not set | ||
| 861 | |||
| 862 | # | ||
| 863 | # File systems | ||
| 864 | # | ||
| 865 | CONFIG_EXT2_FS=y | ||
| 866 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 867 | # CONFIG_EXT2_FS_XIP is not set | ||
| 868 | CONFIG_EXT3_FS=y | ||
| 869 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 870 | CONFIG_EXT3_FS_XATTR=y | ||
| 871 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
| 872 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 873 | # CONFIG_EXT4_FS is not set | ||
| 874 | CONFIG_JBD=y | ||
| 875 | # CONFIG_JBD_DEBUG is not set | ||
| 876 | CONFIG_FS_MBCACHE=y | ||
| 877 | # CONFIG_REISERFS_FS is not set | ||
| 878 | # CONFIG_JFS_FS is not set | ||
| 879 | # CONFIG_FS_POSIX_ACL is not set | ||
| 880 | CONFIG_FILE_LOCKING=y | ||
| 881 | CONFIG_XFS_FS=m | ||
| 882 | # CONFIG_XFS_QUOTA is not set | ||
| 883 | # CONFIG_XFS_POSIX_ACL is not set | ||
| 884 | # CONFIG_XFS_RT is not set | ||
| 885 | # CONFIG_XFS_DEBUG is not set | ||
| 886 | # CONFIG_OCFS2_FS is not set | ||
| 887 | # CONFIG_BTRFS_FS is not set | ||
| 888 | CONFIG_DNOTIFY=y | ||
| 889 | CONFIG_INOTIFY=y | ||
| 890 | CONFIG_INOTIFY_USER=y | ||
| 891 | # CONFIG_QUOTA is not set | ||
| 892 | # CONFIG_AUTOFS_FS is not set | ||
| 893 | CONFIG_AUTOFS4_FS=m | ||
| 894 | # CONFIG_FUSE_FS is not set | ||
| 895 | |||
| 896 | # | ||
| 897 | # Caches | ||
| 898 | # | ||
| 899 | # CONFIG_FSCACHE is not set | ||
| 900 | |||
| 901 | # | ||
| 902 | # CD-ROM/DVD Filesystems | ||
| 903 | # | ||
| 904 | # CONFIG_ISO9660_FS is not set | ||
| 905 | # CONFIG_UDF_FS is not set | ||
| 906 | |||
| 907 | # | ||
| 908 | # DOS/FAT/NT Filesystems | ||
| 909 | # | ||
| 910 | CONFIG_FAT_FS=y | ||
| 911 | CONFIG_MSDOS_FS=y | ||
| 912 | CONFIG_VFAT_FS=y | ||
| 913 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 914 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 915 | # CONFIG_NTFS_FS is not set | ||
| 916 | |||
| 917 | # | ||
| 918 | # Pseudo filesystems | ||
| 919 | # | ||
| 920 | CONFIG_PROC_FS=y | ||
| 921 | CONFIG_PROC_SYSCTL=y | ||
| 922 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 923 | CONFIG_SYSFS=y | ||
| 924 | CONFIG_TMPFS=y | ||
| 925 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 926 | # CONFIG_HUGETLB_PAGE is not set | ||
| 927 | # CONFIG_CONFIGFS_FS is not set | ||
| 928 | CONFIG_MISC_FILESYSTEMS=y | ||
| 929 | # CONFIG_ADFS_FS is not set | ||
| 930 | # CONFIG_AFFS_FS is not set | ||
| 931 | # CONFIG_HFS_FS is not set | ||
| 932 | # CONFIG_HFSPLUS_FS is not set | ||
| 933 | # CONFIG_BEFS_FS is not set | ||
| 934 | # CONFIG_BFS_FS is not set | ||
| 935 | # CONFIG_EFS_FS is not set | ||
| 936 | CONFIG_CRAMFS=y | ||
| 937 | # CONFIG_SQUASHFS is not set | ||
| 938 | # CONFIG_VXFS_FS is not set | ||
| 939 | CONFIG_MINIX_FS=m | ||
| 940 | # CONFIG_OMFS_FS is not set | ||
| 941 | # CONFIG_HPFS_FS is not set | ||
| 942 | # CONFIG_QNX4FS_FS is not set | ||
| 943 | # CONFIG_ROMFS_FS is not set | ||
| 944 | # CONFIG_SYSV_FS is not set | ||
| 945 | # CONFIG_UFS_FS is not set | ||
| 946 | # CONFIG_NILFS2_FS is not set | ||
| 947 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 948 | CONFIG_NFS_FS=y | ||
| 949 | CONFIG_NFS_V3=y | ||
| 950 | # CONFIG_NFS_V3_ACL is not set | ||
| 951 | # CONFIG_NFS_V4 is not set | ||
| 952 | CONFIG_ROOT_NFS=y | ||
| 953 | CONFIG_NFSD=m | ||
| 954 | CONFIG_NFSD_V3=y | ||
| 955 | # CONFIG_NFSD_V3_ACL is not set | ||
| 956 | # CONFIG_NFSD_V4 is not set | ||
| 957 | CONFIG_LOCKD=y | ||
| 958 | CONFIG_LOCKD_V4=y | ||
| 959 | CONFIG_EXPORTFS=m | ||
| 960 | CONFIG_NFS_COMMON=y | ||
| 961 | CONFIG_SUNRPC=y | ||
| 962 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 963 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 964 | CONFIG_SMB_FS=m | ||
| 965 | # CONFIG_SMB_NLS_DEFAULT is not set | ||
| 966 | # CONFIG_CIFS is not set | ||
| 967 | # CONFIG_NCP_FS is not set | ||
| 968 | # CONFIG_CODA_FS is not set | ||
| 969 | # CONFIG_AFS_FS is not set | ||
| 970 | |||
| 971 | # | ||
| 972 | # Partition Types | ||
| 973 | # | ||
| 974 | CONFIG_PARTITION_ADVANCED=y | ||
| 975 | # CONFIG_ACORN_PARTITION is not set | ||
| 976 | # CONFIG_OSF_PARTITION is not set | ||
| 977 | # CONFIG_AMIGA_PARTITION is not set | ||
| 978 | # CONFIG_ATARI_PARTITION is not set | ||
| 979 | # CONFIG_MAC_PARTITION is not set | ||
| 980 | CONFIG_MSDOS_PARTITION=y | ||
| 981 | # CONFIG_BSD_DISKLABEL is not set | ||
| 982 | # CONFIG_MINIX_SUBPARTITION is not set | ||
| 983 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
| 984 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 985 | # CONFIG_LDM_PARTITION is not set | ||
| 986 | # CONFIG_SGI_PARTITION is not set | ||
| 987 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 988 | # CONFIG_SUN_PARTITION is not set | ||
| 989 | # CONFIG_KARMA_PARTITION is not set | ||
| 990 | # CONFIG_EFI_PARTITION is not set | ||
| 991 | # CONFIG_SYSV68_PARTITION is not set | ||
| 992 | CONFIG_NLS=y | ||
| 993 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 994 | CONFIG_NLS_CODEPAGE_437=y | ||
| 995 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 996 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 997 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 998 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 999 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1000 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1001 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1002 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1003 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1004 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1005 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1006 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1007 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1008 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1009 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1010 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1011 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1012 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1013 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1014 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1015 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1016 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1017 | CONFIG_NLS_ASCII=m | ||
| 1018 | CONFIG_NLS_ISO8859_1=y | ||
| 1019 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1020 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1021 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1022 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1023 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1024 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1025 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1026 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1027 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1028 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1029 | # CONFIG_NLS_KOI8_R is not set | ||
| 1030 | # CONFIG_NLS_KOI8_U is not set | ||
| 1031 | CONFIG_NLS_UTF8=m | ||
| 1032 | # CONFIG_DLM is not set | ||
| 1033 | |||
| 1034 | # | ||
| 1035 | # Kernel hacking | ||
| 1036 | # | ||
| 1037 | # CONFIG_PRINTK_TIME is not set | ||
| 1038 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1039 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1040 | CONFIG_FRAME_WARN=1024 | ||
| 1041 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1042 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1043 | CONFIG_DEBUG_FS=y | ||
| 1044 | # CONFIG_HEADERS_CHECK is not set | ||
| 1045 | CONFIG_DEBUG_KERNEL=y | ||
| 1046 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1047 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1048 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1049 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1050 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1051 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1052 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1053 | CONFIG_SCHED_DEBUG=y | ||
| 1054 | # CONFIG_SCHEDSTATS is not set | ||
| 1055 | CONFIG_TIMER_STATS=y | ||
| 1056 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1057 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 1058 | # CONFIG_SLUB_STATS is not set | ||
| 1059 | CONFIG_DEBUG_PREEMPT=y | ||
| 1060 | CONFIG_DEBUG_RT_MUTEXES=y | ||
| 1061 | CONFIG_DEBUG_PI_LIST=y | ||
| 1062 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1063 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1064 | CONFIG_DEBUG_MUTEXES=y | ||
| 1065 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1066 | # CONFIG_PROVE_LOCKING is not set | ||
| 1067 | # CONFIG_LOCK_STAT is not set | ||
| 1068 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1069 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1070 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1071 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1072 | # CONFIG_DEBUG_INFO is not set | ||
| 1073 | # CONFIG_DEBUG_VM is not set | ||
| 1074 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1075 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1076 | # CONFIG_DEBUG_LIST is not set | ||
| 1077 | # CONFIG_DEBUG_SG is not set | ||
| 1078 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1079 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1080 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1081 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1082 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1083 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1084 | # CONFIG_FAULT_INJECTION is not set | ||
| 1085 | # CONFIG_LATENCYTOP is not set | ||
| 1086 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1087 | # CONFIG_PAGE_POISONING is not set | ||
| 1088 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1089 | CONFIG_TRACING_SUPPORT=y | ||
| 1090 | |||
| 1091 | # | ||
| 1092 | # Tracers | ||
| 1093 | # | ||
| 1094 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1095 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1096 | # CONFIG_PREEMPT_TRACER is not set | ||
| 1097 | # CONFIG_SCHED_TRACER is not set | ||
| 1098 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 1099 | # CONFIG_EVENT_TRACER is not set | ||
| 1100 | # CONFIG_BOOT_TRACER is not set | ||
| 1101 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1102 | # CONFIG_STACK_TRACER is not set | ||
| 1103 | # CONFIG_KMEMTRACE is not set | ||
| 1104 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1105 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1106 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1107 | # CONFIG_SAMPLES is not set | ||
| 1108 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1109 | # CONFIG_KGDB is not set | ||
| 1110 | CONFIG_ARM_UNWIND=y | ||
| 1111 | CONFIG_DEBUG_USER=y | ||
| 1112 | CONFIG_DEBUG_ERRORS=y | ||
| 1113 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1114 | # CONFIG_DEBUG_LL is not set | ||
| 1115 | |||
| 1116 | # | ||
| 1117 | # Security options | ||
| 1118 | # | ||
| 1119 | # CONFIG_KEYS is not set | ||
| 1120 | # CONFIG_SECURITY is not set | ||
| 1121 | # CONFIG_SECURITYFS is not set | ||
| 1122 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1123 | CONFIG_CRYPTO=y | ||
| 1124 | |||
| 1125 | # | ||
| 1126 | # Crypto core or helper | ||
| 1127 | # | ||
| 1128 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1129 | # CONFIG_CRYPTO_MANAGER is not set | ||
| 1130 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
| 1131 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1132 | # CONFIG_CRYPTO_NULL is not set | ||
| 1133 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1134 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1135 | # CONFIG_CRYPTO_TEST is not set | ||
| 1136 | |||
| 1137 | # | ||
| 1138 | # Authenticated Encryption with Associated Data | ||
| 1139 | # | ||
| 1140 | # CONFIG_CRYPTO_CCM is not set | ||
| 1141 | # CONFIG_CRYPTO_GCM is not set | ||
| 1142 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1143 | |||
| 1144 | # | ||
| 1145 | # Block modes | ||
| 1146 | # | ||
| 1147 | # CONFIG_CRYPTO_CBC is not set | ||
| 1148 | # CONFIG_CRYPTO_CTR is not set | ||
| 1149 | # CONFIG_CRYPTO_CTS is not set | ||
| 1150 | # CONFIG_CRYPTO_ECB is not set | ||
| 1151 | # CONFIG_CRYPTO_LRW is not set | ||
| 1152 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1153 | # CONFIG_CRYPTO_XTS is not set | ||
| 1154 | |||
| 1155 | # | ||
| 1156 | # Hash modes | ||
| 1157 | # | ||
| 1158 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1159 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1160 | |||
| 1161 | # | ||
| 1162 | # Digest | ||
| 1163 | # | ||
| 1164 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1165 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1166 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1167 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1168 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1169 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1170 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1171 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1172 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1173 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1174 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1175 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1176 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1177 | |||
| 1178 | # | ||
| 1179 | # Ciphers | ||
| 1180 | # | ||
| 1181 | # CONFIG_CRYPTO_AES is not set | ||
| 1182 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1183 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1184 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1185 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1186 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1187 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1188 | # CONFIG_CRYPTO_DES is not set | ||
| 1189 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1190 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1191 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1192 | # CONFIG_CRYPTO_SEED is not set | ||
| 1193 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1194 | # CONFIG_CRYPTO_TEA is not set | ||
| 1195 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1196 | |||
| 1197 | # | ||
| 1198 | # Compression | ||
| 1199 | # | ||
| 1200 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1201 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1202 | # CONFIG_CRYPTO_LZO is not set | ||
| 1203 | |||
| 1204 | # | ||
| 1205 | # Random Number Generation | ||
| 1206 | # | ||
| 1207 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1208 | # CONFIG_CRYPTO_HW is not set | ||
| 1209 | # CONFIG_BINARY_PRINTF is not set | ||
| 1210 | |||
| 1211 | # | ||
| 1212 | # Library routines | ||
| 1213 | # | ||
| 1214 | CONFIG_BITREVERSE=y | ||
| 1215 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1216 | CONFIG_CRC_CCITT=m | ||
| 1217 | # CONFIG_CRC16 is not set | ||
| 1218 | CONFIG_CRC_T10DIF=m | ||
| 1219 | # CONFIG_CRC_ITU_T is not set | ||
| 1220 | CONFIG_CRC32=y | ||
| 1221 | # CONFIG_CRC7 is not set | ||
| 1222 | # CONFIG_LIBCRC32C is not set | ||
| 1223 | CONFIG_ZLIB_INFLATE=y | ||
| 1224 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1225 | CONFIG_GENERIC_ALLOCATOR=y | ||
| 1226 | CONFIG_HAS_IOMEM=y | ||
| 1227 | CONFIG_HAS_IOPORT=y | ||
| 1228 | CONFIG_HAS_DMA=y | ||
| 1229 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig index ac18662f38cc..ddffe39d9f87 100644 --- a/arch/arm/configs/davinci_all_defconfig +++ b/arch/arm/configs/davinci_all_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30-rc7 | 3 | # Linux kernel version: 2.6.31-rc3-davinci1 |
| 4 | # Tue May 26 07:24:28 2009 | 4 | # Fri Jul 17 08:26:52 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -9,7 +9,6 @@ CONFIG_GENERIC_GPIO=y | |||
| 9 | CONFIG_GENERIC_TIME=y | 9 | CONFIG_GENERIC_TIME=y |
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | 10 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 11 | CONFIG_MMU=y | 11 | CONFIG_MMU=y |
| 12 | # CONFIG_NO_IOPORT is not set | ||
| 13 | CONFIG_GENERIC_HARDIRQS=y | 12 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 13 | CONFIG_STACKTRACE_SUPPORT=y |
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | 14 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y |
| @@ -18,14 +17,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | 17 | CONFIG_HARDIRQS_SW_RESEND=y |
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | 18 | CONFIG_GENERIC_IRQ_PROBE=y |
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | 20 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_ZONE_DMA=y | 22 | CONFIG_ZONE_DMA=y |
| 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 23 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | 24 | CONFIG_VECTORS_BASE=0xffff0000 |
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 25 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 26 | CONFIG_CONSTRUCTORS=y | ||
| 29 | 27 | ||
| 30 | # | 28 | # |
| 31 | # General setup | 29 | # General setup |
| @@ -62,8 +60,7 @@ CONFIG_FAIR_GROUP_SCHED=y | |||
| 62 | CONFIG_USER_SCHED=y | 60 | CONFIG_USER_SCHED=y |
| 63 | # CONFIG_CGROUP_SCHED is not set | 61 | # CONFIG_CGROUP_SCHED is not set |
| 64 | # CONFIG_CGROUPS is not set | 62 | # CONFIG_CGROUPS is not set |
| 65 | CONFIG_SYSFS_DEPRECATED=y | 63 | # CONFIG_SYSFS_DEPRECATED_V2 is not set |
| 66 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 67 | # CONFIG_RELAY is not set | 64 | # CONFIG_RELAY is not set |
| 68 | # CONFIG_NAMESPACES is not set | 65 | # CONFIG_NAMESPACES is not set |
| 69 | CONFIG_BLK_DEV_INITRD=y | 66 | CONFIG_BLK_DEV_INITRD=y |
| @@ -80,7 +77,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
| 80 | CONFIG_KALLSYMS=y | 77 | CONFIG_KALLSYMS=y |
| 81 | # CONFIG_KALLSYMS_ALL is not set | 78 | # CONFIG_KALLSYMS_ALL is not set |
| 82 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 79 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 83 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 84 | CONFIG_HOTPLUG=y | 80 | CONFIG_HOTPLUG=y |
| 85 | CONFIG_PRINTK=y | 81 | CONFIG_PRINTK=y |
| 86 | CONFIG_BUG=y | 82 | CONFIG_BUG=y |
| @@ -93,8 +89,13 @@ CONFIG_TIMERFD=y | |||
| 93 | CONFIG_EVENTFD=y | 89 | CONFIG_EVENTFD=y |
| 94 | CONFIG_SHMEM=y | 90 | CONFIG_SHMEM=y |
| 95 | CONFIG_AIO=y | 91 | CONFIG_AIO=y |
| 92 | |||
| 93 | # | ||
| 94 | # Performance Counters | ||
| 95 | # | ||
| 96 | CONFIG_VM_EVENT_COUNTERS=y | 96 | CONFIG_VM_EVENT_COUNTERS=y |
| 97 | CONFIG_SLUB_DEBUG=y | 97 | CONFIG_SLUB_DEBUG=y |
| 98 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 98 | CONFIG_COMPAT_BRK=y | 99 | CONFIG_COMPAT_BRK=y |
| 99 | # CONFIG_SLAB is not set | 100 | # CONFIG_SLAB is not set |
| 100 | CONFIG_SLUB=y | 101 | CONFIG_SLUB=y |
| @@ -106,6 +107,11 @@ CONFIG_HAVE_OPROFILE=y | |||
| 106 | CONFIG_HAVE_KPROBES=y | 107 | CONFIG_HAVE_KPROBES=y |
| 107 | CONFIG_HAVE_KRETPROBES=y | 108 | CONFIG_HAVE_KRETPROBES=y |
| 108 | CONFIG_HAVE_CLK=y | 109 | CONFIG_HAVE_CLK=y |
| 110 | |||
| 111 | # | ||
| 112 | # GCOV-based kernel profiling | ||
| 113 | # | ||
| 114 | # CONFIG_GCOV_KERNEL is not set | ||
| 109 | # CONFIG_SLOW_WORK is not set | 115 | # CONFIG_SLOW_WORK is not set |
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 116 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 111 | CONFIG_SLABINFO=y | 117 | CONFIG_SLABINFO=y |
| @@ -118,7 +124,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y | |||
| 118 | CONFIG_MODVERSIONS=y | 124 | CONFIG_MODVERSIONS=y |
| 119 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 125 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 120 | CONFIG_BLOCK=y | 126 | CONFIG_BLOCK=y |
| 121 | # CONFIG_LBD is not set | 127 | CONFIG_LBDAF=y |
| 122 | # CONFIG_BLK_DEV_BSG is not set | 128 | # CONFIG_BLK_DEV_BSG is not set |
| 123 | # CONFIG_BLK_DEV_INTEGRITY is not set | 129 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 124 | 130 | ||
| @@ -145,13 +151,14 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
| 145 | # CONFIG_ARCH_VERSATILE is not set | 151 | # CONFIG_ARCH_VERSATILE is not set |
| 146 | # CONFIG_ARCH_AT91 is not set | 152 | # CONFIG_ARCH_AT91 is not set |
| 147 | # CONFIG_ARCH_CLPS711X is not set | 153 | # CONFIG_ARCH_CLPS711X is not set |
| 154 | # CONFIG_ARCH_GEMINI is not set | ||
| 148 | # CONFIG_ARCH_EBSA110 is not set | 155 | # CONFIG_ARCH_EBSA110 is not set |
| 149 | # CONFIG_ARCH_EP93XX is not set | 156 | # CONFIG_ARCH_EP93XX is not set |
| 150 | # CONFIG_ARCH_GEMINI is not set | ||
| 151 | # CONFIG_ARCH_FOOTBRIDGE is not set | 157 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 158 | # CONFIG_ARCH_MXC is not set | ||
| 159 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 152 | # CONFIG_ARCH_NETX is not set | 160 | # CONFIG_ARCH_NETX is not set |
| 153 | # CONFIG_ARCH_H720X is not set | 161 | # CONFIG_ARCH_H720X is not set |
| 154 | # CONFIG_ARCH_IMX is not set | ||
| 155 | # CONFIG_ARCH_IOP13XX is not set | 162 | # CONFIG_ARCH_IOP13XX is not set |
| 156 | # CONFIG_ARCH_IOP32X is not set | 163 | # CONFIG_ARCH_IOP32X is not set |
| 157 | # CONFIG_ARCH_IOP33X is not set | 164 | # CONFIG_ARCH_IOP33X is not set |
| @@ -160,26 +167,27 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
| 160 | # CONFIG_ARCH_IXP4XX is not set | 167 | # CONFIG_ARCH_IXP4XX is not set |
| 161 | # CONFIG_ARCH_L7200 is not set | 168 | # CONFIG_ARCH_L7200 is not set |
| 162 | # CONFIG_ARCH_KIRKWOOD is not set | 169 | # CONFIG_ARCH_KIRKWOOD is not set |
| 163 | # CONFIG_ARCH_KS8695 is not set | ||
| 164 | # CONFIG_ARCH_NS9XXX is not set | ||
| 165 | # CONFIG_ARCH_LOKI is not set | 170 | # CONFIG_ARCH_LOKI is not set |
| 166 | # CONFIG_ARCH_MV78XX0 is not set | 171 | # CONFIG_ARCH_MV78XX0 is not set |
| 167 | # CONFIG_ARCH_MXC is not set | ||
| 168 | # CONFIG_ARCH_ORION5X is not set | 172 | # CONFIG_ARCH_ORION5X is not set |
| 173 | # CONFIG_ARCH_MMP is not set | ||
| 174 | # CONFIG_ARCH_KS8695 is not set | ||
| 175 | # CONFIG_ARCH_NS9XXX is not set | ||
| 176 | # CONFIG_ARCH_W90X900 is not set | ||
| 169 | # CONFIG_ARCH_PNX4008 is not set | 177 | # CONFIG_ARCH_PNX4008 is not set |
| 170 | # CONFIG_ARCH_PXA is not set | 178 | # CONFIG_ARCH_PXA is not set |
| 171 | # CONFIG_ARCH_MMP is not set | 179 | # CONFIG_ARCH_MSM is not set |
| 172 | # CONFIG_ARCH_RPC is not set | 180 | # CONFIG_ARCH_RPC is not set |
| 173 | # CONFIG_ARCH_SA1100 is not set | 181 | # CONFIG_ARCH_SA1100 is not set |
| 174 | # CONFIG_ARCH_S3C2410 is not set | 182 | # CONFIG_ARCH_S3C2410 is not set |
| 175 | # CONFIG_ARCH_S3C64XX is not set | 183 | # CONFIG_ARCH_S3C64XX is not set |
| 176 | # CONFIG_ARCH_SHARK is not set | 184 | # CONFIG_ARCH_SHARK is not set |
| 177 | # CONFIG_ARCH_LH7A40X is not set | 185 | # CONFIG_ARCH_LH7A40X is not set |
| 186 | # CONFIG_ARCH_U300 is not set | ||
| 178 | CONFIG_ARCH_DAVINCI=y | 187 | CONFIG_ARCH_DAVINCI=y |
| 179 | # CONFIG_ARCH_OMAP is not set | 188 | # CONFIG_ARCH_OMAP is not set |
| 180 | # CONFIG_ARCH_MSM is not set | ||
| 181 | # CONFIG_ARCH_W90X900 is not set | ||
| 182 | CONFIG_AINTC=y | 189 | CONFIG_AINTC=y |
| 190 | CONFIG_ARCH_DAVINCI_DMx=y | ||
| 183 | 191 | ||
| 184 | # | 192 | # |
| 185 | # TI DaVinci Implementations | 193 | # TI DaVinci Implementations |
| @@ -191,6 +199,9 @@ CONFIG_AINTC=y | |||
| 191 | CONFIG_ARCH_DAVINCI_DM644x=y | 199 | CONFIG_ARCH_DAVINCI_DM644x=y |
| 192 | CONFIG_ARCH_DAVINCI_DM355=y | 200 | CONFIG_ARCH_DAVINCI_DM355=y |
| 193 | CONFIG_ARCH_DAVINCI_DM646x=y | 201 | CONFIG_ARCH_DAVINCI_DM646x=y |
| 202 | # CONFIG_ARCH_DAVINCI_DA830 is not set | ||
| 203 | # CONFIG_ARCH_DAVINCI_DA850 is not set | ||
| 204 | CONFIG_ARCH_DAVINCI_DM365=y | ||
| 194 | 205 | ||
| 195 | # | 206 | # |
| 196 | # DaVinci Board Type | 207 | # DaVinci Board Type |
| @@ -200,6 +211,7 @@ CONFIG_MACH_SFFSDR=y | |||
| 200 | CONFIG_MACH_DAVINCI_DM355_EVM=y | 211 | CONFIG_MACH_DAVINCI_DM355_EVM=y |
| 201 | CONFIG_MACH_DM355_LEOPARD=y | 212 | CONFIG_MACH_DM355_LEOPARD=y |
| 202 | CONFIG_MACH_DAVINCI_DM6467_EVM=y | 213 | CONFIG_MACH_DAVINCI_DM6467_EVM=y |
| 214 | CONFIG_MACH_DAVINCI_DM365_EVM=y | ||
| 203 | CONFIG_DAVINCI_MUX=y | 215 | CONFIG_DAVINCI_MUX=y |
| 204 | CONFIG_DAVINCI_MUX_DEBUG=y | 216 | CONFIG_DAVINCI_MUX_DEBUG=y |
| 205 | CONFIG_DAVINCI_MUX_WARNINGS=y | 217 | CONFIG_DAVINCI_MUX_WARNINGS=y |
| @@ -227,7 +239,6 @@ CONFIG_ARM_THUMB=y | |||
| 227 | # CONFIG_CPU_DCACHE_DISABLE is not set | 239 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 228 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | 240 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set |
| 229 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | 241 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set |
| 230 | # CONFIG_OUTER_CACHE is not set | ||
| 231 | CONFIG_COMMON_CLKDEV=y | 242 | CONFIG_COMMON_CLKDEV=y |
| 232 | 243 | ||
| 233 | # | 244 | # |
| @@ -252,7 +263,6 @@ CONFIG_PREEMPT=y | |||
| 252 | CONFIG_HZ=100 | 263 | CONFIG_HZ=100 |
| 253 | CONFIG_AEABI=y | 264 | CONFIG_AEABI=y |
| 254 | # CONFIG_OABI_COMPAT is not set | 265 | # CONFIG_OABI_COMPAT is not set |
| 255 | # CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set | ||
| 256 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | 266 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 257 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | 267 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 258 | # CONFIG_HIGHMEM is not set | 268 | # CONFIG_HIGHMEM is not set |
| @@ -268,12 +278,13 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096 | |||
| 268 | CONFIG_ZONE_DMA_FLAG=1 | 278 | CONFIG_ZONE_DMA_FLAG=1 |
| 269 | CONFIG_BOUNCE=y | 279 | CONFIG_BOUNCE=y |
| 270 | CONFIG_VIRT_TO_BUS=y | 280 | CONFIG_VIRT_TO_BUS=y |
| 271 | CONFIG_UNEVICTABLE_LRU=y | ||
| 272 | CONFIG_HAVE_MLOCK=y | 281 | CONFIG_HAVE_MLOCK=y |
| 273 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 282 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
| 283 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 274 | CONFIG_LEDS=y | 284 | CONFIG_LEDS=y |
| 275 | # CONFIG_LEDS_CPU is not set | 285 | # CONFIG_LEDS_CPU is not set |
| 276 | CONFIG_ALIGNMENT_TRAP=y | 286 | CONFIG_ALIGNMENT_TRAP=y |
| 287 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 277 | 288 | ||
| 278 | # | 289 | # |
| 279 | # Boot options | 290 | # Boot options |
| @@ -415,6 +426,7 @@ CONFIG_NETFILTER_ADVANCED=y | |||
| 415 | # CONFIG_ECONET is not set | 426 | # CONFIG_ECONET is not set |
| 416 | # CONFIG_WAN_ROUTER is not set | 427 | # CONFIG_WAN_ROUTER is not set |
| 417 | # CONFIG_PHONET is not set | 428 | # CONFIG_PHONET is not set |
| 429 | # CONFIG_IEEE802154 is not set | ||
| 418 | # CONFIG_NET_SCHED is not set | 430 | # CONFIG_NET_SCHED is not set |
| 419 | # CONFIG_DCB is not set | 431 | # CONFIG_DCB is not set |
| 420 | 432 | ||
| @@ -553,6 +565,7 @@ CONFIG_BLK_DEV_RAM_SIZE=32768 | |||
| 553 | # CONFIG_BLK_DEV_XIP is not set | 565 | # CONFIG_BLK_DEV_XIP is not set |
| 554 | # CONFIG_CDROM_PKTCDVD is not set | 566 | # CONFIG_CDROM_PKTCDVD is not set |
| 555 | # CONFIG_ATA_OVER_ETH is not set | 567 | # CONFIG_ATA_OVER_ETH is not set |
| 568 | # CONFIG_MG_DISK is not set | ||
| 556 | CONFIG_MISC_DEVICES=y | 569 | CONFIG_MISC_DEVICES=y |
| 557 | # CONFIG_ICS932S401 is not set | 570 | # CONFIG_ICS932S401 is not set |
| 558 | # CONFIG_ENCLOSURE_SERVICES is not set | 571 | # CONFIG_ENCLOSURE_SERVICES is not set |
| @@ -564,6 +577,7 @@ CONFIG_MISC_DEVICES=y | |||
| 564 | # | 577 | # |
| 565 | CONFIG_EEPROM_AT24=y | 578 | CONFIG_EEPROM_AT24=y |
| 566 | # CONFIG_EEPROM_LEGACY is not set | 579 | # CONFIG_EEPROM_LEGACY is not set |
| 580 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 567 | # CONFIG_EEPROM_93CX6 is not set | 581 | # CONFIG_EEPROM_93CX6 is not set |
| 568 | CONFIG_HAVE_IDE=y | 582 | CONFIG_HAVE_IDE=y |
| 569 | CONFIG_IDE=m | 583 | CONFIG_IDE=m |
| @@ -609,10 +623,6 @@ CONFIG_BLK_DEV_SD=m | |||
| 609 | # CONFIG_BLK_DEV_SR is not set | 623 | # CONFIG_BLK_DEV_SR is not set |
| 610 | # CONFIG_CHR_DEV_SG is not set | 624 | # CONFIG_CHR_DEV_SG is not set |
| 611 | # CONFIG_CHR_DEV_SCH is not set | 625 | # CONFIG_CHR_DEV_SCH is not set |
| 612 | |||
| 613 | # | ||
| 614 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 615 | # | ||
| 616 | # CONFIG_SCSI_MULTI_LUN is not set | 626 | # CONFIG_SCSI_MULTI_LUN is not set |
| 617 | # CONFIG_SCSI_CONSTANTS is not set | 627 | # CONFIG_SCSI_CONSTANTS is not set |
| 618 | # CONFIG_SCSI_LOGGING is not set | 628 | # CONFIG_SCSI_LOGGING is not set |
| @@ -637,7 +647,6 @@ CONFIG_SCSI_LOWLEVEL=y | |||
| 637 | # CONFIG_ATA is not set | 647 | # CONFIG_ATA is not set |
| 638 | # CONFIG_MD is not set | 648 | # CONFIG_MD is not set |
| 639 | CONFIG_NETDEVICES=y | 649 | CONFIG_NETDEVICES=y |
| 640 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 641 | # CONFIG_DUMMY is not set | 650 | # CONFIG_DUMMY is not set |
| 642 | # CONFIG_BONDING is not set | 651 | # CONFIG_BONDING is not set |
| 643 | # CONFIG_MACVLAN is not set | 652 | # CONFIG_MACVLAN is not set |
| @@ -684,6 +693,7 @@ CONFIG_DM9000_DEBUGLEVEL=4 | |||
| 684 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 693 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
| 685 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 694 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
| 686 | # CONFIG_B44 is not set | 695 | # CONFIG_B44 is not set |
| 696 | # CONFIG_KS8842 is not set | ||
| 687 | # CONFIG_NETDEV_1000 is not set | 697 | # CONFIG_NETDEV_1000 is not set |
| 688 | # CONFIG_NETDEV_10000 is not set | 698 | # CONFIG_NETDEV_10000 is not set |
| 689 | 699 | ||
| @@ -748,18 +758,21 @@ CONFIG_INPUT_EVBUG=m | |||
| 748 | # | 758 | # |
| 749 | CONFIG_INPUT_KEYBOARD=y | 759 | CONFIG_INPUT_KEYBOARD=y |
| 750 | CONFIG_KEYBOARD_ATKBD=m | 760 | CONFIG_KEYBOARD_ATKBD=m |
| 751 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 752 | # CONFIG_KEYBOARD_LKKBD is not set | 761 | # CONFIG_KEYBOARD_LKKBD is not set |
| 753 | CONFIG_KEYBOARD_XTKBD=m | 762 | CONFIG_KEYBOARD_GPIO=y |
| 763 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 764 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 754 | # CONFIG_KEYBOARD_NEWTON is not set | 765 | # CONFIG_KEYBOARD_NEWTON is not set |
| 755 | # CONFIG_KEYBOARD_STOWAWAY is not set | 766 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 756 | CONFIG_KEYBOARD_GPIO=y | 767 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 768 | CONFIG_KEYBOARD_XTKBD=m | ||
| 757 | # CONFIG_INPUT_MOUSE is not set | 769 | # CONFIG_INPUT_MOUSE is not set |
| 758 | # CONFIG_INPUT_JOYSTICK is not set | 770 | # CONFIG_INPUT_JOYSTICK is not set |
| 759 | # CONFIG_INPUT_TABLET is not set | 771 | # CONFIG_INPUT_TABLET is not set |
| 760 | CONFIG_INPUT_TOUCHSCREEN=y | 772 | CONFIG_INPUT_TOUCHSCREEN=y |
| 761 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | 773 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 762 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 774 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 775 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 763 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 776 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 764 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 777 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 765 | # CONFIG_TOUCHSCREEN_ELO is not set | 778 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -773,6 +786,7 @@ CONFIG_INPUT_TOUCHSCREEN=y | |||
| 773 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 786 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
| 774 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 787 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
| 775 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | 788 | # CONFIG_TOUCHSCREEN_TSC2007 is not set |
| 789 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 776 | # CONFIG_INPUT_MISC is not set | 790 | # CONFIG_INPUT_MISC is not set |
| 777 | 791 | ||
| 778 | # | 792 | # |
| @@ -832,6 +846,7 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 832 | # I2C system bus drivers (mostly embedded / system-on-chip) | 846 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 833 | # | 847 | # |
| 834 | CONFIG_I2C_DAVINCI=y | 848 | CONFIG_I2C_DAVINCI=y |
| 849 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 835 | # CONFIG_I2C_GPIO is not set | 850 | # CONFIG_I2C_GPIO is not set |
| 836 | # CONFIG_I2C_OCORES is not set | 851 | # CONFIG_I2C_OCORES is not set |
| 837 | # CONFIG_I2C_SIMTEC is not set | 852 | # CONFIG_I2C_SIMTEC is not set |
| @@ -854,7 +869,6 @@ CONFIG_I2C_DAVINCI=y | |||
| 854 | # | 869 | # |
| 855 | # CONFIG_DS1682 is not set | 870 | # CONFIG_DS1682 is not set |
| 856 | # CONFIG_SENSORS_PCA9539 is not set | 871 | # CONFIG_SENSORS_PCA9539 is not set |
| 857 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 858 | # CONFIG_SENSORS_TSL2550 is not set | 872 | # CONFIG_SENSORS_TSL2550 is not set |
| 859 | # CONFIG_I2C_DEBUG_CORE is not set | 873 | # CONFIG_I2C_DEBUG_CORE is not set |
| 860 | # CONFIG_I2C_DEBUG_ALGO is not set | 874 | # CONFIG_I2C_DEBUG_ALGO is not set |
| @@ -935,6 +949,7 @@ CONFIG_HWMON=y | |||
| 935 | # CONFIG_SENSORS_SMSC47B397 is not set | 949 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 936 | # CONFIG_SENSORS_ADS7828 is not set | 950 | # CONFIG_SENSORS_ADS7828 is not set |
| 937 | # CONFIG_SENSORS_THMC50 is not set | 951 | # CONFIG_SENSORS_THMC50 is not set |
| 952 | # CONFIG_SENSORS_TMP401 is not set | ||
| 938 | # CONFIG_SENSORS_VT1211 is not set | 953 | # CONFIG_SENSORS_VT1211 is not set |
| 939 | # CONFIG_SENSORS_W83781D is not set | 954 | # CONFIG_SENSORS_W83781D is not set |
| 940 | # CONFIG_SENSORS_W83791D is not set | 955 | # CONFIG_SENSORS_W83791D is not set |
| @@ -986,52 +1001,8 @@ CONFIG_SSB_POSSIBLE=y | |||
| 986 | # CONFIG_MFD_WM8400 is not set | 1001 | # CONFIG_MFD_WM8400 is not set |
| 987 | # CONFIG_MFD_WM8350_I2C is not set | 1002 | # CONFIG_MFD_WM8350_I2C is not set |
| 988 | # CONFIG_MFD_PCF50633 is not set | 1003 | # CONFIG_MFD_PCF50633 is not set |
| 989 | 1004 | # CONFIG_AB3100_CORE is not set | |
| 990 | # | 1005 | # CONFIG_MEDIA_SUPPORT is not set |
| 991 | # Multimedia devices | ||
| 992 | # | ||
| 993 | |||
| 994 | # | ||
| 995 | # Multimedia core support | ||
| 996 | # | ||
| 997 | CONFIG_VIDEO_DEV=y | ||
| 998 | CONFIG_VIDEO_V4L2_COMMON=y | ||
| 999 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
| 1000 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 1001 | # CONFIG_DVB_CORE is not set | ||
| 1002 | CONFIG_VIDEO_MEDIA=y | ||
| 1003 | |||
| 1004 | # | ||
| 1005 | # Multimedia drivers | ||
| 1006 | # | ||
| 1007 | # CONFIG_MEDIA_ATTACH is not set | ||
| 1008 | CONFIG_MEDIA_TUNER=y | ||
| 1009 | # CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
| 1010 | CONFIG_MEDIA_TUNER_SIMPLE=y | ||
| 1011 | CONFIG_MEDIA_TUNER_TDA8290=y | ||
| 1012 | CONFIG_MEDIA_TUNER_TDA9887=y | ||
| 1013 | CONFIG_MEDIA_TUNER_TEA5761=y | ||
| 1014 | CONFIG_MEDIA_TUNER_TEA5767=y | ||
| 1015 | CONFIG_MEDIA_TUNER_MT20XX=y | ||
| 1016 | CONFIG_MEDIA_TUNER_XC2028=y | ||
| 1017 | CONFIG_MEDIA_TUNER_XC5000=y | ||
| 1018 | CONFIG_MEDIA_TUNER_MC44S803=y | ||
| 1019 | CONFIG_VIDEO_V4L2=y | ||
| 1020 | CONFIG_VIDEO_V4L1=y | ||
| 1021 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 1022 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 1023 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 1024 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
| 1025 | # CONFIG_VIDEO_VIVI is not set | ||
| 1026 | # CONFIG_VIDEO_CPIA is not set | ||
| 1027 | # CONFIG_VIDEO_CPIA2 is not set | ||
| 1028 | # CONFIG_VIDEO_SAA5246A is not set | ||
| 1029 | # CONFIG_VIDEO_SAA5249 is not set | ||
| 1030 | # CONFIG_SOC_CAMERA is not set | ||
| 1031 | # CONFIG_V4L_USB_DRIVERS is not set | ||
| 1032 | # CONFIG_RADIO_ADAPTERS is not set | ||
| 1033 | CONFIG_DAB=y | ||
| 1034 | # CONFIG_USB_DABUSB is not set | ||
| 1035 | 1006 | ||
| 1036 | # | 1007 | # |
| 1037 | # Graphics support | 1008 | # Graphics support |
| @@ -1102,6 +1073,11 @@ CONFIG_SND_SUPPORT_OLD_API=y | |||
| 1102 | CONFIG_SND_VERBOSE_PROCFS=y | 1073 | CONFIG_SND_VERBOSE_PROCFS=y |
| 1103 | # CONFIG_SND_VERBOSE_PRINTK is not set | 1074 | # CONFIG_SND_VERBOSE_PRINTK is not set |
| 1104 | # CONFIG_SND_DEBUG is not set | 1075 | # CONFIG_SND_DEBUG is not set |
| 1076 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
| 1077 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 1078 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 1079 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 1080 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 1105 | CONFIG_SND_DRIVERS=y | 1081 | CONFIG_SND_DRIVERS=y |
| 1106 | # CONFIG_SND_DUMMY is not set | 1082 | # CONFIG_SND_DUMMY is not set |
| 1107 | # CONFIG_SND_MTPAV is not set | 1083 | # CONFIG_SND_MTPAV is not set |
| @@ -1112,9 +1088,16 @@ CONFIG_SND_USB=y | |||
| 1112 | # CONFIG_SND_USB_AUDIO is not set | 1088 | # CONFIG_SND_USB_AUDIO is not set |
| 1113 | # CONFIG_SND_USB_CAIAQ is not set | 1089 | # CONFIG_SND_USB_CAIAQ is not set |
| 1114 | CONFIG_SND_SOC=m | 1090 | CONFIG_SND_SOC=m |
| 1115 | # CONFIG_SND_DAVINCI_SOC is not set | 1091 | CONFIG_SND_DAVINCI_SOC=m |
| 1092 | CONFIG_SND_DAVINCI_SOC_I2S=m | ||
| 1093 | CONFIG_SND_DAVINCI_SOC_MCASP=m | ||
| 1094 | CONFIG_SND_DAVINCI_SOC_EVM=m | ||
| 1095 | CONFIG_SND_DM6467_SOC_EVM=m | ||
| 1096 | # CONFIG_SND_DAVINCI_SOC_SFFSDR is not set | ||
| 1116 | CONFIG_SND_SOC_I2C_AND_SPI=m | 1097 | CONFIG_SND_SOC_I2C_AND_SPI=m |
| 1117 | # CONFIG_SND_SOC_ALL_CODECS is not set | 1098 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 1099 | CONFIG_SND_SOC_SPDIF=m | ||
| 1100 | CONFIG_SND_SOC_TLV320AIC3X=m | ||
| 1118 | # CONFIG_SOUND_PRIME is not set | 1101 | # CONFIG_SOUND_PRIME is not set |
| 1119 | CONFIG_HID_SUPPORT=y | 1102 | CONFIG_HID_SUPPORT=y |
| 1120 | CONFIG_HID=m | 1103 | CONFIG_HID=m |
| @@ -1143,7 +1126,7 @@ CONFIG_HID_BELKIN=m | |||
| 1143 | CONFIG_HID_CHERRY=m | 1126 | CONFIG_HID_CHERRY=m |
| 1144 | CONFIG_HID_CHICONY=m | 1127 | CONFIG_HID_CHICONY=m |
| 1145 | CONFIG_HID_CYPRESS=m | 1128 | CONFIG_HID_CYPRESS=m |
| 1146 | # CONFIG_DRAGONRISE_FF is not set | 1129 | # CONFIG_HID_DRAGONRISE is not set |
| 1147 | CONFIG_HID_EZKEY=m | 1130 | CONFIG_HID_EZKEY=m |
| 1148 | # CONFIG_HID_KYE is not set | 1131 | # CONFIG_HID_KYE is not set |
| 1149 | CONFIG_HID_GYRATION=m | 1132 | CONFIG_HID_GYRATION=m |
| @@ -1160,10 +1143,11 @@ CONFIG_HID_PETALYNX=m | |||
| 1160 | CONFIG_HID_SAMSUNG=m | 1143 | CONFIG_HID_SAMSUNG=m |
| 1161 | CONFIG_HID_SONY=m | 1144 | CONFIG_HID_SONY=m |
| 1162 | CONFIG_HID_SUNPLUS=m | 1145 | CONFIG_HID_SUNPLUS=m |
| 1163 | # CONFIG_GREENASIA_FF is not set | 1146 | # CONFIG_HID_GREENASIA is not set |
| 1147 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1164 | # CONFIG_HID_TOPSEED is not set | 1148 | # CONFIG_HID_TOPSEED is not set |
| 1165 | # CONFIG_THRUSTMASTER_FF is not set | 1149 | # CONFIG_HID_THRUSTMASTER is not set |
| 1166 | # CONFIG_ZEROPLUS_FF is not set | 1150 | # CONFIG_HID_ZEROPLUS is not set |
| 1167 | CONFIG_USB_SUPPORT=y | 1151 | CONFIG_USB_SUPPORT=y |
| 1168 | CONFIG_USB_ARCH_HAS_HCD=y | 1152 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1169 | # CONFIG_USB_ARCH_HAS_OHCI is not set | 1153 | # CONFIG_USB_ARCH_HAS_OHCI is not set |
| @@ -1266,6 +1250,7 @@ CONFIG_USB_STORAGE=m | |||
| 1266 | # CONFIG_USB_IDMOUSE is not set | 1250 | # CONFIG_USB_IDMOUSE is not set |
| 1267 | # CONFIG_USB_FTDI_ELAN is not set | 1251 | # CONFIG_USB_FTDI_ELAN is not set |
| 1268 | # CONFIG_USB_APPLEDISPLAY is not set | 1252 | # CONFIG_USB_APPLEDISPLAY is not set |
| 1253 | # CONFIG_USB_SISUSBVGA is not set | ||
| 1269 | # CONFIG_USB_LD is not set | 1254 | # CONFIG_USB_LD is not set |
| 1270 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1255 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 1271 | # CONFIG_USB_IOWARRIOR is not set | 1256 | # CONFIG_USB_IOWARRIOR is not set |
| @@ -1285,17 +1270,20 @@ CONFIG_USB_GADGET_SELECTED=y | |||
| 1285 | # CONFIG_USB_GADGET_OMAP is not set | 1270 | # CONFIG_USB_GADGET_OMAP is not set |
| 1286 | # CONFIG_USB_GADGET_PXA25X is not set | 1271 | # CONFIG_USB_GADGET_PXA25X is not set |
| 1287 | # CONFIG_USB_GADGET_PXA27X is not set | 1272 | # CONFIG_USB_GADGET_PXA27X is not set |
| 1288 | # CONFIG_USB_GADGET_S3C2410 is not set | 1273 | # CONFIG_USB_GADGET_S3C_HSOTG is not set |
| 1289 | # CONFIG_USB_GADGET_IMX is not set | 1274 | # CONFIG_USB_GADGET_IMX is not set |
| 1275 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1290 | # CONFIG_USB_GADGET_M66592 is not set | 1276 | # CONFIG_USB_GADGET_M66592 is not set |
| 1291 | # CONFIG_USB_GADGET_AMD5536UDC is not set | 1277 | # CONFIG_USB_GADGET_AMD5536UDC is not set |
| 1292 | # CONFIG_USB_GADGET_FSL_QE is not set | 1278 | # CONFIG_USB_GADGET_FSL_QE is not set |
| 1293 | # CONFIG_USB_GADGET_CI13XXX is not set | 1279 | # CONFIG_USB_GADGET_CI13XXX is not set |
| 1294 | # CONFIG_USB_GADGET_NET2280 is not set | 1280 | # CONFIG_USB_GADGET_NET2280 is not set |
| 1295 | # CONFIG_USB_GADGET_GOKU is not set | 1281 | # CONFIG_USB_GADGET_GOKU is not set |
| 1282 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 1296 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | 1283 | # CONFIG_USB_GADGET_DUMMY_HCD is not set |
| 1297 | CONFIG_USB_GADGET_DUALSPEED=y | 1284 | CONFIG_USB_GADGET_DUALSPEED=y |
| 1298 | CONFIG_USB_ZERO=m | 1285 | CONFIG_USB_ZERO=m |
| 1286 | # CONFIG_USB_AUDIO is not set | ||
| 1299 | CONFIG_USB_ETH=m | 1287 | CONFIG_USB_ETH=m |
| 1300 | CONFIG_USB_ETH_RNDIS=y | 1288 | CONFIG_USB_ETH_RNDIS=y |
| 1301 | CONFIG_USB_GADGETFS=m | 1289 | CONFIG_USB_GADGETFS=m |
| @@ -1311,7 +1299,7 @@ CONFIG_USB_CDC_COMPOSITE=m | |||
| 1311 | # | 1299 | # |
| 1312 | CONFIG_USB_OTG_UTILS=y | 1300 | CONFIG_USB_OTG_UTILS=y |
| 1313 | # CONFIG_USB_GPIO_VBUS is not set | 1301 | # CONFIG_USB_GPIO_VBUS is not set |
| 1314 | # CONFIG_NOP_USB_XCEIV is not set | 1302 | CONFIG_NOP_USB_XCEIV=m |
| 1315 | CONFIG_MMC=m | 1303 | CONFIG_MMC=m |
| 1316 | # CONFIG_MMC_DEBUG is not set | 1304 | # CONFIG_MMC_DEBUG is not set |
| 1317 | # CONFIG_MMC_UNSAFE_RESUME is not set | 1305 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| @@ -1328,7 +1316,6 @@ CONFIG_MMC_BLOCK=m | |||
| 1328 | # MMC/SD/SDIO Host Controller Drivers | 1316 | # MMC/SD/SDIO Host Controller Drivers |
| 1329 | # | 1317 | # |
| 1330 | # CONFIG_MMC_SDHCI is not set | 1318 | # CONFIG_MMC_SDHCI is not set |
| 1331 | # CONFIG_MMC_DAVINCI is not set | ||
| 1332 | # CONFIG_MEMSTICK is not set | 1319 | # CONFIG_MEMSTICK is not set |
| 1333 | # CONFIG_ACCESSIBILITY is not set | 1320 | # CONFIG_ACCESSIBILITY is not set |
| 1334 | CONFIG_NEW_LEDS=y | 1321 | CONFIG_NEW_LEDS=y |
| @@ -1340,7 +1327,7 @@ CONFIG_LEDS_CLASS=m | |||
| 1340 | # CONFIG_LEDS_PCA9532 is not set | 1327 | # CONFIG_LEDS_PCA9532 is not set |
| 1341 | CONFIG_LEDS_GPIO=m | 1328 | CONFIG_LEDS_GPIO=m |
| 1342 | CONFIG_LEDS_GPIO_PLATFORM=y | 1329 | CONFIG_LEDS_GPIO_PLATFORM=y |
| 1343 | # CONFIG_LEDS_LP5521 is not set | 1330 | # CONFIG_LEDS_LP3944 is not set |
| 1344 | # CONFIG_LEDS_PCA955X is not set | 1331 | # CONFIG_LEDS_PCA955X is not set |
| 1345 | # CONFIG_LEDS_BD2802 is not set | 1332 | # CONFIG_LEDS_BD2802 is not set |
| 1346 | 1333 | ||
| @@ -1386,6 +1373,7 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1386 | # CONFIG_RTC_DRV_S35390A is not set | 1373 | # CONFIG_RTC_DRV_S35390A is not set |
| 1387 | # CONFIG_RTC_DRV_FM3130 is not set | 1374 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1388 | # CONFIG_RTC_DRV_RX8581 is not set | 1375 | # CONFIG_RTC_DRV_RX8581 is not set |
| 1376 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1389 | 1377 | ||
| 1390 | # | 1378 | # |
| 1391 | # SPI RTC drivers | 1379 | # SPI RTC drivers |
| @@ -1433,14 +1421,16 @@ CONFIG_FS_MBCACHE=y | |||
| 1433 | # CONFIG_REISERFS_FS is not set | 1421 | # CONFIG_REISERFS_FS is not set |
| 1434 | # CONFIG_JFS_FS is not set | 1422 | # CONFIG_JFS_FS is not set |
| 1435 | # CONFIG_FS_POSIX_ACL is not set | 1423 | # CONFIG_FS_POSIX_ACL is not set |
| 1436 | CONFIG_FILE_LOCKING=y | ||
| 1437 | CONFIG_XFS_FS=m | 1424 | CONFIG_XFS_FS=m |
| 1438 | # CONFIG_XFS_QUOTA is not set | 1425 | # CONFIG_XFS_QUOTA is not set |
| 1439 | # CONFIG_XFS_POSIX_ACL is not set | 1426 | # CONFIG_XFS_POSIX_ACL is not set |
| 1440 | # CONFIG_XFS_RT is not set | 1427 | # CONFIG_XFS_RT is not set |
| 1441 | # CONFIG_XFS_DEBUG is not set | 1428 | # CONFIG_XFS_DEBUG is not set |
| 1429 | # CONFIG_GFS2_FS is not set | ||
| 1442 | # CONFIG_OCFS2_FS is not set | 1430 | # CONFIG_OCFS2_FS is not set |
| 1443 | # CONFIG_BTRFS_FS is not set | 1431 | # CONFIG_BTRFS_FS is not set |
| 1432 | CONFIG_FILE_LOCKING=y | ||
| 1433 | CONFIG_FSNOTIFY=y | ||
| 1444 | CONFIG_DNOTIFY=y | 1434 | CONFIG_DNOTIFY=y |
| 1445 | CONFIG_INOTIFY=y | 1435 | CONFIG_INOTIFY=y |
| 1446 | CONFIG_INOTIFY_USER=y | 1436 | CONFIG_INOTIFY_USER=y |
| @@ -1623,6 +1613,7 @@ CONFIG_TIMER_STATS=y | |||
| 1623 | # CONFIG_DEBUG_OBJECTS is not set | 1613 | # CONFIG_DEBUG_OBJECTS is not set |
| 1624 | # CONFIG_SLUB_DEBUG_ON is not set | 1614 | # CONFIG_SLUB_DEBUG_ON is not set |
| 1625 | # CONFIG_SLUB_STATS is not set | 1615 | # CONFIG_SLUB_STATS is not set |
| 1616 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1626 | CONFIG_DEBUG_PREEMPT=y | 1617 | CONFIG_DEBUG_PREEMPT=y |
| 1627 | CONFIG_DEBUG_RT_MUTEXES=y | 1618 | CONFIG_DEBUG_RT_MUTEXES=y |
| 1628 | CONFIG_DEBUG_PI_LIST=y | 1619 | CONFIG_DEBUG_PI_LIST=y |
| @@ -1654,18 +1645,16 @@ CONFIG_DEBUG_BUGVERBOSE=y | |||
| 1654 | # CONFIG_PAGE_POISONING is not set | 1645 | # CONFIG_PAGE_POISONING is not set |
| 1655 | CONFIG_HAVE_FUNCTION_TRACER=y | 1646 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1656 | CONFIG_TRACING_SUPPORT=y | 1647 | CONFIG_TRACING_SUPPORT=y |
| 1657 | 1648 | CONFIG_FTRACE=y | |
| 1658 | # | ||
| 1659 | # Tracers | ||
| 1660 | # | ||
| 1661 | # CONFIG_FUNCTION_TRACER is not set | 1649 | # CONFIG_FUNCTION_TRACER is not set |
| 1662 | # CONFIG_IRQSOFF_TRACER is not set | 1650 | # CONFIG_IRQSOFF_TRACER is not set |
| 1663 | # CONFIG_PREEMPT_TRACER is not set | 1651 | # CONFIG_PREEMPT_TRACER is not set |
| 1664 | # CONFIG_SCHED_TRACER is not set | 1652 | # CONFIG_SCHED_TRACER is not set |
| 1665 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 1653 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 1666 | # CONFIG_EVENT_TRACER is not set | ||
| 1667 | # CONFIG_BOOT_TRACER is not set | 1654 | # CONFIG_BOOT_TRACER is not set |
| 1668 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 1655 | CONFIG_BRANCH_PROFILE_NONE=y |
| 1656 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1657 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1669 | # CONFIG_STACK_TRACER is not set | 1658 | # CONFIG_STACK_TRACER is not set |
| 1670 | # CONFIG_KMEMTRACE is not set | 1659 | # CONFIG_KMEMTRACE is not set |
| 1671 | # CONFIG_WORKQUEUE_TRACER is not set | 1660 | # CONFIG_WORKQUEUE_TRACER is not set |
diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig new file mode 100644 index 000000000000..8da75dede52e --- /dev/null +++ b/arch/arm/configs/n8x0_defconfig | |||
| @@ -0,0 +1,1104 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.31-rc5 | ||
| 4 | # Thu Aug 6 22:17:23 2009 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_GENERIC_GPIO=y | ||
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 11 | CONFIG_MMU=y | ||
| 12 | CONFIG_GENERIC_HARDIRQS=y | ||
| 13 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 14 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 15 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 20 | CONFIG_GENERIC_HWEIGHT=y | ||
| 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 25 | CONFIG_CONSTRUCTORS=y | ||
| 26 | |||
| 27 | # | ||
| 28 | # General setup | ||
| 29 | # | ||
| 30 | CONFIG_EXPERIMENTAL=y | ||
| 31 | CONFIG_BROKEN_ON_SMP=y | ||
| 32 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 33 | CONFIG_LOCALVERSION="" | ||
| 34 | CONFIG_LOCALVERSION_AUTO=y | ||
| 35 | CONFIG_SWAP=y | ||
| 36 | CONFIG_SYSVIPC=y | ||
| 37 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 38 | # CONFIG_POSIX_MQUEUE is not set | ||
| 39 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
| 40 | # CONFIG_TASKSTATS is not set | ||
| 41 | # CONFIG_AUDIT is not set | ||
| 42 | |||
| 43 | # | ||
| 44 | # RCU Subsystem | ||
| 45 | # | ||
| 46 | # CONFIG_CLASSIC_RCU is not set | ||
| 47 | CONFIG_TREE_RCU=y | ||
| 48 | # CONFIG_PREEMPT_RCU is not set | ||
| 49 | # CONFIG_RCU_TRACE is not set | ||
| 50 | CONFIG_RCU_FANOUT=32 | ||
| 51 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 54 | # CONFIG_IKCONFIG is not set | ||
| 55 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 56 | # CONFIG_GROUP_SCHED is not set | ||
| 57 | # CONFIG_CGROUPS is not set | ||
| 58 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
| 59 | # CONFIG_RELAY is not set | ||
| 60 | CONFIG_NAMESPACES=y | ||
| 61 | # CONFIG_UTS_NS is not set | ||
| 62 | # CONFIG_IPC_NS is not set | ||
| 63 | # CONFIG_USER_NS is not set | ||
| 64 | # CONFIG_PID_NS is not set | ||
| 65 | # CONFIG_NET_NS is not set | ||
| 66 | CONFIG_BLK_DEV_INITRD=y | ||
| 67 | CONFIG_INITRAMFS_SOURCE="" | ||
| 68 | CONFIG_RD_GZIP=y | ||
| 69 | CONFIG_RD_BZIP2=y | ||
| 70 | CONFIG_RD_LZMA=y | ||
| 71 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 72 | CONFIG_SYSCTL=y | ||
| 73 | CONFIG_ANON_INODES=y | ||
| 74 | # CONFIG_EMBEDDED is not set | ||
| 75 | CONFIG_UID16=y | ||
| 76 | CONFIG_SYSCTL_SYSCALL=y | ||
| 77 | CONFIG_KALLSYMS=y | ||
| 78 | # CONFIG_KALLSYMS_ALL is not set | ||
| 79 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 80 | CONFIG_HOTPLUG=y | ||
| 81 | CONFIG_PRINTK=y | ||
| 82 | CONFIG_BUG=y | ||
| 83 | CONFIG_ELF_CORE=y | ||
| 84 | CONFIG_BASE_FULL=y | ||
| 85 | CONFIG_FUTEX=y | ||
| 86 | CONFIG_EPOLL=y | ||
| 87 | CONFIG_SIGNALFD=y | ||
| 88 | CONFIG_TIMERFD=y | ||
| 89 | CONFIG_EVENTFD=y | ||
| 90 | CONFIG_SHMEM=y | ||
| 91 | CONFIG_AIO=y | ||
| 92 | |||
| 93 | # | ||
| 94 | # Performance Counters | ||
| 95 | # | ||
| 96 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 97 | CONFIG_SLUB_DEBUG=y | ||
| 98 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 99 | CONFIG_COMPAT_BRK=y | ||
| 100 | # CONFIG_SLAB is not set | ||
| 101 | CONFIG_SLUB=y | ||
| 102 | # CONFIG_SLOB is not set | ||
| 103 | # CONFIG_PROFILING is not set | ||
| 104 | # CONFIG_MARKERS is not set | ||
| 105 | CONFIG_HAVE_OPROFILE=y | ||
| 106 | # CONFIG_KPROBES is not set | ||
| 107 | CONFIG_HAVE_KPROBES=y | ||
| 108 | CONFIG_HAVE_KRETPROBES=y | ||
| 109 | CONFIG_HAVE_CLK=y | ||
| 110 | |||
| 111 | # | ||
| 112 | # GCOV-based kernel profiling | ||
| 113 | # | ||
| 114 | # CONFIG_SLOW_WORK is not set | ||
| 115 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 116 | CONFIG_SLABINFO=y | ||
| 117 | CONFIG_RT_MUTEXES=y | ||
| 118 | CONFIG_BASE_SMALL=0 | ||
| 119 | CONFIG_MODULES=y | ||
| 120 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 121 | CONFIG_MODULE_UNLOAD=y | ||
| 122 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 123 | # CONFIG_MODVERSIONS is not set | ||
| 124 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 125 | CONFIG_BLOCK=y | ||
| 126 | # CONFIG_LBDAF is not set | ||
| 127 | # CONFIG_BLK_DEV_BSG is not set | ||
| 128 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 129 | |||
| 130 | # | ||
| 131 | # IO Schedulers | ||
| 132 | # | ||
| 133 | CONFIG_IOSCHED_NOOP=y | ||
| 134 | # CONFIG_IOSCHED_AS is not set | ||
| 135 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 136 | CONFIG_IOSCHED_CFQ=y | ||
| 137 | # CONFIG_DEFAULT_AS is not set | ||
| 138 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 139 | CONFIG_DEFAULT_CFQ=y | ||
| 140 | # CONFIG_DEFAULT_NOOP is not set | ||
| 141 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 142 | # CONFIG_FREEZER is not set | ||
| 143 | |||
| 144 | # | ||
| 145 | # System Type | ||
| 146 | # | ||
| 147 | # CONFIG_ARCH_AAEC2000 is not set | ||
| 148 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 149 | # CONFIG_ARCH_REALVIEW is not set | ||
| 150 | # CONFIG_ARCH_VERSATILE is not set | ||
| 151 | # CONFIG_ARCH_AT91 is not set | ||
| 152 | # CONFIG_ARCH_CLPS711X is not set | ||
| 153 | # CONFIG_ARCH_GEMINI is not set | ||
| 154 | # CONFIG_ARCH_EBSA110 is not set | ||
| 155 | # CONFIG_ARCH_EP93XX is not set | ||
| 156 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 157 | # CONFIG_ARCH_MXC is not set | ||
| 158 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 159 | # CONFIG_ARCH_NETX is not set | ||
| 160 | # CONFIG_ARCH_H720X is not set | ||
| 161 | # CONFIG_ARCH_IOP13XX is not set | ||
| 162 | # CONFIG_ARCH_IOP32X is not set | ||
| 163 | # CONFIG_ARCH_IOP33X is not set | ||
| 164 | # CONFIG_ARCH_IXP23XX is not set | ||
| 165 | # CONFIG_ARCH_IXP2000 is not set | ||
| 166 | # CONFIG_ARCH_IXP4XX is not set | ||
| 167 | # CONFIG_ARCH_L7200 is not set | ||
| 168 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 169 | # CONFIG_ARCH_LOKI is not set | ||
| 170 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 171 | # CONFIG_ARCH_ORION5X is not set | ||
| 172 | # CONFIG_ARCH_MMP is not set | ||
| 173 | # CONFIG_ARCH_KS8695 is not set | ||
| 174 | # CONFIG_ARCH_NS9XXX is not set | ||
| 175 | # CONFIG_ARCH_W90X900 is not set | ||
| 176 | # CONFIG_ARCH_PNX4008 is not set | ||
| 177 | # CONFIG_ARCH_PXA is not set | ||
| 178 | # CONFIG_ARCH_MSM is not set | ||
| 179 | # CONFIG_ARCH_RPC is not set | ||
| 180 | # CONFIG_ARCH_SA1100 is not set | ||
| 181 | # CONFIG_ARCH_S3C2410 is not set | ||
| 182 | # CONFIG_ARCH_S3C64XX is not set | ||
| 183 | # CONFIG_ARCH_SHARK is not set | ||
| 184 | # CONFIG_ARCH_LH7A40X is not set | ||
| 185 | # CONFIG_ARCH_U300 is not set | ||
| 186 | # CONFIG_ARCH_DAVINCI is not set | ||
| 187 | CONFIG_ARCH_OMAP=y | ||
| 188 | |||
| 189 | # | ||
| 190 | # TI OMAP Implementations | ||
| 191 | # | ||
| 192 | CONFIG_ARCH_OMAP_OTG=y | ||
| 193 | # CONFIG_ARCH_OMAP1 is not set | ||
| 194 | CONFIG_ARCH_OMAP2=y | ||
| 195 | # CONFIG_ARCH_OMAP3 is not set | ||
| 196 | # CONFIG_ARCH_OMAP4 is not set | ||
| 197 | |||
| 198 | # | ||
| 199 | # OMAP Feature Selections | ||
| 200 | # | ||
| 201 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | ||
| 202 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | ||
| 203 | CONFIG_OMAP_RESET_CLOCKS=y | ||
| 204 | # CONFIG_OMAP_MUX is not set | ||
| 205 | # CONFIG_OMAP_MCBSP is not set | ||
| 206 | CONFIG_OMAP_MBOX_FWK=y | ||
| 207 | # CONFIG_OMAP_MPU_TIMER is not set | ||
| 208 | CONFIG_OMAP_32K_TIMER=y | ||
| 209 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 210 | CONFIG_OMAP_DM_TIMER=y | ||
| 211 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | ||
| 212 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | ||
| 213 | CONFIG_OMAP_LL_DEBUG_UART3=y | ||
| 214 | # CONFIG_MACH_OMAP_GENERIC is not set | ||
| 215 | |||
| 216 | # | ||
| 217 | # OMAP Core Type | ||
| 218 | # | ||
| 219 | CONFIG_ARCH_OMAP24XX=y | ||
| 220 | CONFIG_ARCH_OMAP2420=y | ||
| 221 | # CONFIG_ARCH_OMAP2430 is not set | ||
| 222 | |||
| 223 | # | ||
| 224 | # OMAP Board Type | ||
| 225 | # | ||
| 226 | CONFIG_MACH_OMAP2_TUSB6010=y | ||
| 227 | # CONFIG_MACH_OMAP_H4 is not set | ||
| 228 | # CONFIG_MACH_OMAP_APOLLON is not set | ||
| 229 | # CONFIG_MACH_OMAP_2430SDP is not set | ||
| 230 | CONFIG_MACH_NOKIA_N8X0=y | ||
| 231 | |||
| 232 | # | ||
| 233 | # Processor Type | ||
| 234 | # | ||
| 235 | CONFIG_CPU_32=y | ||
| 236 | CONFIG_CPU_V6=y | ||
| 237 | # CONFIG_CPU_32v6K is not set | ||
| 238 | CONFIG_CPU_32v6=y | ||
| 239 | CONFIG_CPU_ABRT_EV6=y | ||
| 240 | CONFIG_CPU_PABRT_NOIFAR=y | ||
| 241 | CONFIG_CPU_CACHE_V6=y | ||
| 242 | CONFIG_CPU_CACHE_VIPT=y | ||
| 243 | CONFIG_CPU_COPY_V6=y | ||
| 244 | CONFIG_CPU_TLB_V6=y | ||
| 245 | CONFIG_CPU_HAS_ASID=y | ||
| 246 | CONFIG_CPU_CP15=y | ||
| 247 | CONFIG_CPU_CP15_MMU=y | ||
| 248 | |||
| 249 | # | ||
| 250 | # Processor Features | ||
| 251 | # | ||
| 252 | CONFIG_ARM_THUMB=y | ||
| 253 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 254 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 255 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 256 | # CONFIG_ARM_ERRATA_411920 is not set | ||
| 257 | CONFIG_COMMON_CLKDEV=y | ||
| 258 | |||
| 259 | # | ||
| 260 | # Bus support | ||
| 261 | # | ||
| 262 | # CONFIG_PCI_SYSCALL is not set | ||
| 263 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 264 | # CONFIG_PCCARD is not set | ||
| 265 | |||
| 266 | # | ||
| 267 | # Kernel Features | ||
| 268 | # | ||
| 269 | # CONFIG_NO_HZ is not set | ||
| 270 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 271 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 272 | CONFIG_VMSPLIT_3G=y | ||
| 273 | # CONFIG_VMSPLIT_2G is not set | ||
| 274 | # CONFIG_VMSPLIT_1G is not set | ||
| 275 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 276 | # CONFIG_PREEMPT is not set | ||
| 277 | CONFIG_HZ=128 | ||
| 278 | CONFIG_AEABI=y | ||
| 279 | CONFIG_OABI_COMPAT=y | ||
| 280 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 281 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 282 | # CONFIG_HIGHMEM is not set | ||
| 283 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 284 | CONFIG_FLATMEM_MANUAL=y | ||
| 285 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 286 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 287 | CONFIG_FLATMEM=y | ||
| 288 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 289 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 290 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 291 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 292 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 293 | CONFIG_VIRT_TO_BUS=y | ||
| 294 | CONFIG_HAVE_MLOCK=y | ||
| 295 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 296 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 297 | CONFIG_LEDS=y | ||
| 298 | CONFIG_ALIGNMENT_TRAP=y | ||
| 299 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 300 | |||
| 301 | # | ||
| 302 | # Boot options | ||
| 303 | # | ||
| 304 | CONFIG_ZBOOT_ROM_TEXT=0x10C08000 | ||
| 305 | CONFIG_ZBOOT_ROM_BSS=0x10200000 | ||
| 306 | # CONFIG_ZBOOT_ROM is not set | ||
| 307 | CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS0,115200n8" | ||
| 308 | # CONFIG_XIP_KERNEL is not set | ||
| 309 | # CONFIG_KEXEC is not set | ||
| 310 | |||
| 311 | # | ||
| 312 | # CPU Power Management | ||
| 313 | # | ||
| 314 | # CONFIG_CPU_FREQ is not set | ||
| 315 | # CONFIG_CPU_IDLE is not set | ||
| 316 | |||
| 317 | # | ||
| 318 | # Floating point emulation | ||
| 319 | # | ||
| 320 | |||
| 321 | # | ||
| 322 | # At least one emulation must be selected | ||
| 323 | # | ||
| 324 | CONFIG_FPE_NWFPE=y | ||
| 325 | # CONFIG_FPE_NWFPE_XP is not set | ||
| 326 | # CONFIG_FPE_FASTFPE is not set | ||
| 327 | CONFIG_VFP=y | ||
| 328 | |||
| 329 | # | ||
| 330 | # Userspace binary formats | ||
| 331 | # | ||
| 332 | CONFIG_BINFMT_ELF=y | ||
| 333 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 334 | CONFIG_HAVE_AOUT=y | ||
| 335 | # CONFIG_BINFMT_AOUT is not set | ||
| 336 | # CONFIG_BINFMT_MISC is not set | ||
| 337 | |||
| 338 | # | ||
| 339 | # Power management options | ||
| 340 | # | ||
| 341 | # CONFIG_PM is not set | ||
| 342 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 343 | CONFIG_NET=y | ||
| 344 | |||
| 345 | # | ||
| 346 | # Networking options | ||
| 347 | # | ||
| 348 | # CONFIG_PACKET is not set | ||
| 349 | CONFIG_UNIX=y | ||
| 350 | # CONFIG_NET_KEY is not set | ||
| 351 | CONFIG_INET=y | ||
| 352 | # CONFIG_IP_MULTICAST is not set | ||
| 353 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 354 | CONFIG_IP_FIB_HASH=y | ||
| 355 | # CONFIG_IP_PNP is not set | ||
| 356 | # CONFIG_NET_IPIP is not set | ||
| 357 | # CONFIG_NET_IPGRE is not set | ||
| 358 | # CONFIG_ARPD is not set | ||
| 359 | # CONFIG_SYN_COOKIES is not set | ||
| 360 | # CONFIG_INET_AH is not set | ||
| 361 | # CONFIG_INET_ESP is not set | ||
| 362 | # CONFIG_INET_IPCOMP is not set | ||
| 363 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 364 | # CONFIG_INET_TUNNEL is not set | ||
| 365 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 366 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 367 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 368 | # CONFIG_INET_LRO is not set | ||
| 369 | CONFIG_INET_DIAG=y | ||
| 370 | CONFIG_INET_TCP_DIAG=y | ||
| 371 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 372 | CONFIG_TCP_CONG_CUBIC=y | ||
| 373 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 374 | # CONFIG_TCP_MD5SIG is not set | ||
| 375 | # CONFIG_IPV6 is not set | ||
| 376 | # CONFIG_NETWORK_SECMARK is not set | ||
| 377 | # CONFIG_NETFILTER is not set | ||
| 378 | # CONFIG_IP_DCCP is not set | ||
| 379 | # CONFIG_IP_SCTP is not set | ||
| 380 | # CONFIG_TIPC is not set | ||
| 381 | # CONFIG_ATM is not set | ||
| 382 | # CONFIG_BRIDGE is not set | ||
| 383 | # CONFIG_NET_DSA is not set | ||
| 384 | # CONFIG_VLAN_8021Q is not set | ||
| 385 | # CONFIG_DECNET is not set | ||
| 386 | # CONFIG_LLC2 is not set | ||
| 387 | # CONFIG_IPX is not set | ||
| 388 | # CONFIG_ATALK is not set | ||
| 389 | # CONFIG_X25 is not set | ||
| 390 | # CONFIG_LAPB is not set | ||
| 391 | # CONFIG_ECONET is not set | ||
| 392 | # CONFIG_WAN_ROUTER is not set | ||
| 393 | # CONFIG_PHONET is not set | ||
| 394 | # CONFIG_IEEE802154 is not set | ||
| 395 | # CONFIG_NET_SCHED is not set | ||
| 396 | # CONFIG_DCB is not set | ||
| 397 | |||
| 398 | # | ||
| 399 | # Network testing | ||
| 400 | # | ||
| 401 | # CONFIG_NET_PKTGEN is not set | ||
| 402 | # CONFIG_HAMRADIO is not set | ||
| 403 | # CONFIG_CAN is not set | ||
| 404 | # CONFIG_IRDA is not set | ||
| 405 | # CONFIG_BT is not set | ||
| 406 | # CONFIG_AF_RXRPC is not set | ||
| 407 | CONFIG_WIRELESS=y | ||
| 408 | # CONFIG_CFG80211 is not set | ||
| 409 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
| 410 | # CONFIG_WIRELESS_EXT is not set | ||
| 411 | # CONFIG_LIB80211 is not set | ||
| 412 | |||
| 413 | # | ||
| 414 | # CFG80211 needs to be enabled for MAC80211 | ||
| 415 | # | ||
| 416 | CONFIG_MAC80211_DEFAULT_PS_VALUE=0 | ||
| 417 | # CONFIG_WIMAX is not set | ||
| 418 | # CONFIG_RFKILL is not set | ||
| 419 | # CONFIG_NET_9P is not set | ||
| 420 | |||
| 421 | # | ||
| 422 | # Device Drivers | ||
| 423 | # | ||
| 424 | |||
| 425 | # | ||
| 426 | # Generic Driver Options | ||
| 427 | # | ||
| 428 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 429 | CONFIG_STANDALONE=y | ||
| 430 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 431 | CONFIG_FW_LOADER=y | ||
| 432 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 433 | CONFIG_EXTRA_FIRMWARE="" | ||
| 434 | # CONFIG_DEBUG_DRIVER is not set | ||
| 435 | # CONFIG_DEBUG_DEVRES is not set | ||
| 436 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 437 | # CONFIG_CONNECTOR is not set | ||
| 438 | CONFIG_MTD=y | ||
| 439 | # CONFIG_MTD_DEBUG is not set | ||
| 440 | # CONFIG_MTD_CONCAT is not set | ||
| 441 | CONFIG_MTD_PARTITIONS=y | ||
| 442 | # CONFIG_MTD_TESTS is not set | ||
| 443 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 444 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 445 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 446 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 447 | |||
| 448 | # | ||
| 449 | # User Modules And Translation Layers | ||
| 450 | # | ||
| 451 | # CONFIG_MTD_CHAR is not set | ||
| 452 | CONFIG_HAVE_MTD_OTP=y | ||
| 453 | # CONFIG_MTD_BLKDEVS is not set | ||
| 454 | # CONFIG_MTD_BLOCK is not set | ||
| 455 | # CONFIG_MTD_BLOCK_RO is not set | ||
| 456 | # CONFIG_FTL is not set | ||
| 457 | # CONFIG_NFTL is not set | ||
| 458 | # CONFIG_INFTL is not set | ||
| 459 | # CONFIG_RFD_FTL is not set | ||
| 460 | # CONFIG_SSFDC is not set | ||
| 461 | # CONFIG_MTD_OOPS is not set | ||
| 462 | |||
| 463 | # | ||
| 464 | # RAM/ROM/Flash chip drivers | ||
| 465 | # | ||
| 466 | # CONFIG_MTD_CFI is not set | ||
| 467 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 468 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 469 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 470 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 471 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 472 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 473 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 474 | CONFIG_MTD_CFI_I1=y | ||
| 475 | CONFIG_MTD_CFI_I2=y | ||
| 476 | # CONFIG_MTD_CFI_I4 is not set | ||
| 477 | # CONFIG_MTD_CFI_I8 is not set | ||
| 478 | # CONFIG_MTD_RAM is not set | ||
| 479 | # CONFIG_MTD_ROM is not set | ||
| 480 | # CONFIG_MTD_ABSENT is not set | ||
| 481 | |||
| 482 | # | ||
| 483 | # Mapping drivers for chip access | ||
| 484 | # | ||
| 485 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 486 | # CONFIG_MTD_PLATRAM is not set | ||
| 487 | |||
| 488 | # | ||
| 489 | # Self-contained MTD device drivers | ||
| 490 | # | ||
| 491 | # CONFIG_MTD_DATAFLASH is not set | ||
| 492 | # CONFIG_MTD_M25P80 is not set | ||
| 493 | # CONFIG_MTD_SLRAM is not set | ||
| 494 | # CONFIG_MTD_PHRAM is not set | ||
| 495 | # CONFIG_MTD_MTDRAM is not set | ||
| 496 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 497 | |||
| 498 | # | ||
| 499 | # Disk-On-Chip Device Drivers | ||
| 500 | # | ||
| 501 | # CONFIG_MTD_DOC2000 is not set | ||
| 502 | # CONFIG_MTD_DOC2001 is not set | ||
| 503 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 504 | # CONFIG_MTD_NAND is not set | ||
| 505 | CONFIG_MTD_ONENAND=y | ||
| 506 | # CONFIG_MTD_ONENAND_VERIFY_WRITE is not set | ||
| 507 | # CONFIG_MTD_ONENAND_GENERIC is not set | ||
| 508 | CONFIG_MTD_ONENAND_OMAP2=y | ||
| 509 | CONFIG_MTD_ONENAND_OTP=y | ||
| 510 | # CONFIG_MTD_ONENAND_2X_PROGRAM is not set | ||
| 511 | # CONFIG_MTD_ONENAND_SIM is not set | ||
| 512 | |||
| 513 | # | ||
| 514 | # LPDDR flash memory drivers | ||
| 515 | # | ||
| 516 | # CONFIG_MTD_LPDDR is not set | ||
| 517 | |||
| 518 | # | ||
| 519 | # UBI - Unsorted block images | ||
| 520 | # | ||
| 521 | # CONFIG_MTD_UBI is not set | ||
| 522 | # CONFIG_PARPORT is not set | ||
| 523 | CONFIG_BLK_DEV=y | ||
| 524 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 525 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 526 | # CONFIG_BLK_DEV_NBD is not set | ||
| 527 | # CONFIG_BLK_DEV_UB is not set | ||
| 528 | CONFIG_BLK_DEV_RAM=y | ||
| 529 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 530 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 531 | # CONFIG_BLK_DEV_XIP is not set | ||
| 532 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 533 | # CONFIG_ATA_OVER_ETH is not set | ||
| 534 | # CONFIG_MG_DISK is not set | ||
| 535 | # CONFIG_MISC_DEVICES is not set | ||
| 536 | CONFIG_HAVE_IDE=y | ||
| 537 | # CONFIG_IDE is not set | ||
| 538 | |||
| 539 | # | ||
| 540 | # SCSI device support | ||
| 541 | # | ||
| 542 | # CONFIG_RAID_ATTRS is not set | ||
| 543 | # CONFIG_SCSI is not set | ||
| 544 | # CONFIG_SCSI_DMA is not set | ||
| 545 | # CONFIG_SCSI_NETLINK is not set | ||
| 546 | # CONFIG_ATA is not set | ||
| 547 | # CONFIG_MD is not set | ||
| 548 | # CONFIG_NETDEVICES is not set | ||
| 549 | # CONFIG_ISDN is not set | ||
| 550 | |||
| 551 | # | ||
| 552 | # Input device support | ||
| 553 | # | ||
| 554 | CONFIG_INPUT=y | ||
| 555 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 556 | # CONFIG_INPUT_POLLDEV is not set | ||
| 557 | |||
| 558 | # | ||
| 559 | # Userland interfaces | ||
| 560 | # | ||
| 561 | CONFIG_INPUT_MOUSEDEV=y | ||
| 562 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 563 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 564 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 565 | # CONFIG_INPUT_JOYDEV is not set | ||
| 566 | # CONFIG_INPUT_EVDEV is not set | ||
| 567 | # CONFIG_INPUT_EVBUG is not set | ||
| 568 | |||
| 569 | # | ||
| 570 | # Input Device Drivers | ||
| 571 | # | ||
| 572 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 573 | # CONFIG_INPUT_MOUSE is not set | ||
| 574 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 575 | # CONFIG_INPUT_TABLET is not set | ||
| 576 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 577 | # CONFIG_INPUT_MISC is not set | ||
| 578 | |||
| 579 | # | ||
| 580 | # Hardware I/O ports | ||
| 581 | # | ||
| 582 | CONFIG_SERIO=y | ||
| 583 | CONFIG_SERIO_SERPORT=y | ||
| 584 | # CONFIG_SERIO_RAW is not set | ||
| 585 | # CONFIG_GAMEPORT is not set | ||
| 586 | |||
| 587 | # | ||
| 588 | # Character devices | ||
| 589 | # | ||
| 590 | CONFIG_VT=y | ||
| 591 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 592 | CONFIG_VT_CONSOLE=y | ||
| 593 | CONFIG_HW_CONSOLE=y | ||
| 594 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 595 | CONFIG_DEVKMEM=y | ||
| 596 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 597 | |||
| 598 | # | ||
| 599 | # Serial drivers | ||
| 600 | # | ||
| 601 | CONFIG_SERIAL_8250=y | ||
| 602 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 603 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
| 604 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 605 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
| 606 | |||
| 607 | # | ||
| 608 | # Non-8250 serial port support | ||
| 609 | # | ||
| 610 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 611 | CONFIG_SERIAL_CORE=y | ||
| 612 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 613 | CONFIG_UNIX98_PTYS=y | ||
| 614 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 615 | # CONFIG_LEGACY_PTYS is not set | ||
| 616 | # CONFIG_IPMI_HANDLER is not set | ||
| 617 | # CONFIG_HW_RANDOM is not set | ||
| 618 | # CONFIG_R3964 is not set | ||
| 619 | # CONFIG_RAW_DRIVER is not set | ||
| 620 | # CONFIG_TCG_TPM is not set | ||
| 621 | # CONFIG_I2C is not set | ||
| 622 | CONFIG_SPI=y | ||
| 623 | # CONFIG_SPI_DEBUG is not set | ||
| 624 | CONFIG_SPI_MASTER=y | ||
| 625 | |||
| 626 | # | ||
| 627 | # SPI Master Controller Drivers | ||
| 628 | # | ||
| 629 | # CONFIG_SPI_BITBANG is not set | ||
| 630 | # CONFIG_SPI_GPIO is not set | ||
| 631 | CONFIG_SPI_OMAP24XX=y | ||
| 632 | |||
| 633 | # | ||
| 634 | # SPI Protocol Masters | ||
| 635 | # | ||
| 636 | # CONFIG_SPI_SPIDEV is not set | ||
| 637 | # CONFIG_SPI_TLE62X0 is not set | ||
| 638 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 639 | CONFIG_GPIOLIB=y | ||
| 640 | # CONFIG_DEBUG_GPIO is not set | ||
| 641 | # CONFIG_GPIO_SYSFS is not set | ||
| 642 | |||
| 643 | # | ||
| 644 | # Memory mapped GPIO expanders: | ||
| 645 | # | ||
| 646 | |||
| 647 | # | ||
| 648 | # I2C GPIO expanders: | ||
| 649 | # | ||
| 650 | |||
| 651 | # | ||
| 652 | # PCI GPIO expanders: | ||
| 653 | # | ||
| 654 | |||
| 655 | # | ||
| 656 | # SPI GPIO expanders: | ||
| 657 | # | ||
| 658 | # CONFIG_GPIO_MAX7301 is not set | ||
| 659 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 660 | # CONFIG_W1 is not set | ||
| 661 | # CONFIG_POWER_SUPPLY is not set | ||
| 662 | # CONFIG_HWMON is not set | ||
| 663 | # CONFIG_THERMAL is not set | ||
| 664 | # CONFIG_THERMAL_HWMON is not set | ||
| 665 | # CONFIG_WATCHDOG is not set | ||
| 666 | CONFIG_SSB_POSSIBLE=y | ||
| 667 | |||
| 668 | # | ||
| 669 | # Sonics Silicon Backplane | ||
| 670 | # | ||
| 671 | # CONFIG_SSB is not set | ||
| 672 | |||
| 673 | # | ||
| 674 | # Multifunction device drivers | ||
| 675 | # | ||
| 676 | # CONFIG_MFD_CORE is not set | ||
| 677 | # CONFIG_MFD_SM501 is not set | ||
| 678 | # CONFIG_MFD_ASIC3 is not set | ||
| 679 | # CONFIG_HTC_EGPIO is not set | ||
| 680 | # CONFIG_HTC_PASIC3 is not set | ||
| 681 | # CONFIG_MFD_TMIO is not set | ||
| 682 | # CONFIG_MFD_T7L66XB is not set | ||
| 683 | # CONFIG_MFD_TC6387XB is not set | ||
| 684 | # CONFIG_MFD_TC6393XB is not set | ||
| 685 | # CONFIG_EZX_PCAP is not set | ||
| 686 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 687 | |||
| 688 | # | ||
| 689 | # Graphics support | ||
| 690 | # | ||
| 691 | # CONFIG_VGASTATE is not set | ||
| 692 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 693 | # CONFIG_FB is not set | ||
| 694 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 695 | |||
| 696 | # | ||
| 697 | # Display device support | ||
| 698 | # | ||
| 699 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 700 | |||
| 701 | # | ||
| 702 | # Console display driver support | ||
| 703 | # | ||
| 704 | # CONFIG_VGA_CONSOLE is not set | ||
| 705 | CONFIG_DUMMY_CONSOLE=y | ||
| 706 | # CONFIG_SOUND is not set | ||
| 707 | # CONFIG_HID_SUPPORT is not set | ||
| 708 | CONFIG_USB_SUPPORT=y | ||
| 709 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 710 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 711 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 712 | CONFIG_USB=y | ||
| 713 | CONFIG_USB_DEBUG=y | ||
| 714 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 715 | |||
| 716 | # | ||
| 717 | # Miscellaneous USB options | ||
| 718 | # | ||
| 719 | CONFIG_USB_DEVICEFS=y | ||
| 720 | CONFIG_USB_DEVICE_CLASS=y | ||
| 721 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 722 | # CONFIG_USB_OTG is not set | ||
| 723 | # CONFIG_USB_MON is not set | ||
| 724 | # CONFIG_USB_WUSB is not set | ||
| 725 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 726 | |||
| 727 | # | ||
| 728 | # USB Host Controller Drivers | ||
| 729 | # | ||
| 730 | # CONFIG_USB_C67X00_HCD is not set | ||
| 731 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 732 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 733 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 734 | # CONFIG_USB_OHCI_HCD is not set | ||
| 735 | # CONFIG_USB_SL811_HCD is not set | ||
| 736 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 737 | # CONFIG_USB_HWA_HCD is not set | ||
| 738 | CONFIG_USB_MUSB_HDRC=y | ||
| 739 | CONFIG_USB_TUSB6010=y | ||
| 740 | # CONFIG_USB_MUSB_HOST is not set | ||
| 741 | CONFIG_USB_MUSB_PERIPHERAL=y | ||
| 742 | # CONFIG_USB_MUSB_OTG is not set | ||
| 743 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 744 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 745 | # CONFIG_USB_INVENTRA_DMA is not set | ||
| 746 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 747 | CONFIG_USB_TUSB_OMAP_DMA=y | ||
| 748 | CONFIG_USB_MUSB_DEBUG=y | ||
| 749 | |||
| 750 | # | ||
| 751 | # USB Device Class drivers | ||
| 752 | # | ||
| 753 | # CONFIG_USB_ACM is not set | ||
| 754 | # CONFIG_USB_PRINTER is not set | ||
| 755 | # CONFIG_USB_WDM is not set | ||
| 756 | # CONFIG_USB_TMC is not set | ||
| 757 | |||
| 758 | # | ||
| 759 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 760 | # | ||
| 761 | |||
| 762 | # | ||
| 763 | # also be needed; see USB_STORAGE Help for more info | ||
| 764 | # | ||
| 765 | # CONFIG_USB_LIBUSUAL is not set | ||
| 766 | |||
| 767 | # | ||
| 768 | # USB Imaging devices | ||
| 769 | # | ||
| 770 | # CONFIG_USB_MDC800 is not set | ||
| 771 | |||
| 772 | # | ||
| 773 | # USB port drivers | ||
| 774 | # | ||
| 775 | # CONFIG_USB_SERIAL is not set | ||
| 776 | |||
| 777 | # | ||
| 778 | # USB Miscellaneous drivers | ||
| 779 | # | ||
| 780 | # CONFIG_USB_EMI62 is not set | ||
| 781 | # CONFIG_USB_EMI26 is not set | ||
| 782 | # CONFIG_USB_ADUTUX is not set | ||
| 783 | # CONFIG_USB_SEVSEG is not set | ||
| 784 | # CONFIG_USB_RIO500 is not set | ||
| 785 | # CONFIG_USB_LEGOTOWER is not set | ||
| 786 | # CONFIG_USB_LCD is not set | ||
| 787 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 788 | # CONFIG_USB_LED is not set | ||
| 789 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 790 | # CONFIG_USB_CYTHERM is not set | ||
| 791 | # CONFIG_USB_IDMOUSE is not set | ||
| 792 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 793 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 794 | # CONFIG_USB_SISUSBVGA is not set | ||
| 795 | # CONFIG_USB_LD is not set | ||
| 796 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 797 | # CONFIG_USB_IOWARRIOR is not set | ||
| 798 | # CONFIG_USB_TEST is not set | ||
| 799 | # CONFIG_USB_ISIGHTFW is not set | ||
| 800 | # CONFIG_USB_VST is not set | ||
| 801 | CONFIG_USB_GADGET=y | ||
| 802 | CONFIG_USB_GADGET_DEBUG=y | ||
| 803 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
| 804 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 805 | CONFIG_USB_GADGET_SELECTED=y | ||
| 806 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 807 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 808 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 809 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 810 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 811 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 812 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 813 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 814 | # CONFIG_USB_GADGET_IMX is not set | ||
| 815 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 816 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 817 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 818 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 819 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 820 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 821 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 822 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 823 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 824 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 825 | # CONFIG_USB_ZERO is not set | ||
| 826 | # CONFIG_USB_AUDIO is not set | ||
| 827 | CONFIG_USB_ETH=y | ||
| 828 | # CONFIG_USB_ETH_RNDIS is not set | ||
| 829 | # CONFIG_USB_GADGETFS is not set | ||
| 830 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 831 | # CONFIG_USB_G_SERIAL is not set | ||
| 832 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 833 | # CONFIG_USB_G_PRINTER is not set | ||
| 834 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 835 | |||
| 836 | # | ||
| 837 | # OTG and related infrastructure | ||
| 838 | # | ||
| 839 | CONFIG_USB_OTG_UTILS=y | ||
| 840 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 841 | CONFIG_NOP_USB_XCEIV=y | ||
| 842 | # CONFIG_MMC is not set | ||
| 843 | # CONFIG_MEMSTICK is not set | ||
| 844 | # CONFIG_ACCESSIBILITY is not set | ||
| 845 | # CONFIG_NEW_LEDS is not set | ||
| 846 | CONFIG_RTC_LIB=y | ||
| 847 | # CONFIG_RTC_CLASS is not set | ||
| 848 | # CONFIG_DMADEVICES is not set | ||
| 849 | # CONFIG_AUXDISPLAY is not set | ||
| 850 | # CONFIG_REGULATOR is not set | ||
| 851 | # CONFIG_UIO is not set | ||
| 852 | # CONFIG_STAGING is not set | ||
| 853 | |||
| 854 | # | ||
| 855 | # File systems | ||
| 856 | # | ||
| 857 | # CONFIG_EXT2_FS is not set | ||
| 858 | # CONFIG_EXT3_FS is not set | ||
| 859 | # CONFIG_EXT4_FS is not set | ||
| 860 | # CONFIG_REISERFS_FS is not set | ||
| 861 | # CONFIG_JFS_FS is not set | ||
| 862 | # CONFIG_FS_POSIX_ACL is not set | ||
| 863 | # CONFIG_XFS_FS is not set | ||
| 864 | # CONFIG_OCFS2_FS is not set | ||
| 865 | # CONFIG_BTRFS_FS is not set | ||
| 866 | CONFIG_FILE_LOCKING=y | ||
| 867 | CONFIG_FSNOTIFY=y | ||
| 868 | CONFIG_DNOTIFY=y | ||
| 869 | CONFIG_INOTIFY=y | ||
| 870 | CONFIG_INOTIFY_USER=y | ||
| 871 | # CONFIG_QUOTA is not set | ||
| 872 | # CONFIG_AUTOFS_FS is not set | ||
| 873 | # CONFIG_AUTOFS4_FS is not set | ||
| 874 | # CONFIG_FUSE_FS is not set | ||
| 875 | |||
| 876 | # | ||
| 877 | # Caches | ||
| 878 | # | ||
| 879 | # CONFIG_FSCACHE is not set | ||
| 880 | |||
| 881 | # | ||
| 882 | # CD-ROM/DVD Filesystems | ||
| 883 | # | ||
| 884 | # CONFIG_ISO9660_FS is not set | ||
| 885 | # CONFIG_UDF_FS is not set | ||
| 886 | |||
| 887 | # | ||
| 888 | # DOS/FAT/NT Filesystems | ||
| 889 | # | ||
| 890 | # CONFIG_MSDOS_FS is not set | ||
| 891 | # CONFIG_VFAT_FS is not set | ||
| 892 | # CONFIG_NTFS_FS is not set | ||
| 893 | |||
| 894 | # | ||
| 895 | # Pseudo filesystems | ||
| 896 | # | ||
| 897 | CONFIG_PROC_FS=y | ||
| 898 | CONFIG_PROC_SYSCTL=y | ||
| 899 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 900 | CONFIG_SYSFS=y | ||
| 901 | CONFIG_TMPFS=y | ||
| 902 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 903 | # CONFIG_HUGETLB_PAGE is not set | ||
| 904 | # CONFIG_CONFIGFS_FS is not set | ||
| 905 | CONFIG_MISC_FILESYSTEMS=y | ||
| 906 | # CONFIG_ADFS_FS is not set | ||
| 907 | # CONFIG_AFFS_FS is not set | ||
| 908 | # CONFIG_HFS_FS is not set | ||
| 909 | # CONFIG_HFSPLUS_FS is not set | ||
| 910 | # CONFIG_BEFS_FS is not set | ||
| 911 | # CONFIG_BFS_FS is not set | ||
| 912 | # CONFIG_EFS_FS is not set | ||
| 913 | CONFIG_JFFS2_FS=y | ||
| 914 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 915 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 916 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 917 | CONFIG_JFFS2_SUMMARY=y | ||
| 918 | # CONFIG_JFFS2_FS_XATTR is not set | ||
| 919 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 920 | CONFIG_JFFS2_ZLIB=y | ||
| 921 | CONFIG_JFFS2_LZO=y | ||
| 922 | CONFIG_JFFS2_RTIME=y | ||
| 923 | # CONFIG_JFFS2_RUBIN is not set | ||
| 924 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 925 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
| 926 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 927 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
| 928 | # CONFIG_CRAMFS is not set | ||
| 929 | # CONFIG_SQUASHFS is not set | ||
| 930 | # CONFIG_VXFS_FS is not set | ||
| 931 | # CONFIG_MINIX_FS is not set | ||
| 932 | # CONFIG_OMFS_FS is not set | ||
| 933 | # CONFIG_HPFS_FS is not set | ||
| 934 | # CONFIG_QNX4FS_FS is not set | ||
| 935 | # CONFIG_ROMFS_FS is not set | ||
| 936 | # CONFIG_SYSV_FS is not set | ||
| 937 | # CONFIG_UFS_FS is not set | ||
| 938 | # CONFIG_NILFS2_FS is not set | ||
| 939 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 940 | # CONFIG_NFS_FS is not set | ||
| 941 | # CONFIG_NFSD is not set | ||
| 942 | # CONFIG_SMB_FS is not set | ||
| 943 | # CONFIG_CIFS is not set | ||
| 944 | # CONFIG_NCP_FS is not set | ||
| 945 | # CONFIG_CODA_FS is not set | ||
| 946 | # CONFIG_AFS_FS is not set | ||
| 947 | |||
| 948 | # | ||
| 949 | # Partition Types | ||
| 950 | # | ||
| 951 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 952 | CONFIG_MSDOS_PARTITION=y | ||
| 953 | CONFIG_NLS=y | ||
| 954 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 955 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 956 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 957 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 958 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 959 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 960 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 961 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 962 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 963 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 964 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 965 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 966 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 967 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 968 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 969 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 970 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 971 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 972 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 973 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 974 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 975 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 976 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 977 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 978 | # CONFIG_NLS_ASCII is not set | ||
| 979 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 980 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 981 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 982 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 983 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 984 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 985 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 986 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 987 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 988 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 989 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 990 | # CONFIG_NLS_KOI8_R is not set | ||
| 991 | # CONFIG_NLS_KOI8_U is not set | ||
| 992 | # CONFIG_NLS_UTF8 is not set | ||
| 993 | # CONFIG_DLM is not set | ||
| 994 | |||
| 995 | # | ||
| 996 | # Kernel hacking | ||
| 997 | # | ||
| 998 | CONFIG_PRINTK_TIME=y | ||
| 999 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1000 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 1001 | CONFIG_FRAME_WARN=1024 | ||
| 1002 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1003 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1004 | # CONFIG_DEBUG_FS is not set | ||
| 1005 | # CONFIG_HEADERS_CHECK is not set | ||
| 1006 | CONFIG_DEBUG_KERNEL=y | ||
| 1007 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 1008 | CONFIG_DETECT_SOFTLOCKUP=y | ||
| 1009 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
| 1010 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
| 1011 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1012 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1013 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1014 | CONFIG_SCHED_DEBUG=y | ||
| 1015 | # CONFIG_SCHEDSTATS is not set | ||
| 1016 | # CONFIG_TIMER_STATS is not set | ||
| 1017 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 1018 | # CONFIG_SLUB_DEBUG_ON is not set | ||
| 1019 | # CONFIG_SLUB_STATS is not set | ||
| 1020 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 1021 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 1022 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 1023 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 1024 | # CONFIG_DEBUG_MUTEXES is not set | ||
| 1025 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 1026 | # CONFIG_PROVE_LOCKING is not set | ||
| 1027 | # CONFIG_LOCK_STAT is not set | ||
| 1028 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 1029 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 1030 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 1031 | CONFIG_DEBUG_BUGVERBOSE=y | ||
| 1032 | CONFIG_DEBUG_INFO=y | ||
| 1033 | # CONFIG_DEBUG_VM is not set | ||
| 1034 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 1035 | CONFIG_DEBUG_MEMORY_INIT=y | ||
| 1036 | # CONFIG_DEBUG_LIST is not set | ||
| 1037 | # CONFIG_DEBUG_SG is not set | ||
| 1038 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 1039 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 1040 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 1041 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1042 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 1043 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1044 | # CONFIG_FAULT_INJECTION is not set | ||
| 1045 | # CONFIG_LATENCYTOP is not set | ||
| 1046 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1047 | # CONFIG_PAGE_POISONING is not set | ||
| 1048 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1049 | CONFIG_TRACING_SUPPORT=y | ||
| 1050 | CONFIG_FTRACE=y | ||
| 1051 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1052 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 1053 | # CONFIG_SCHED_TRACER is not set | ||
| 1054 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 1055 | # CONFIG_BOOT_TRACER is not set | ||
| 1056 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 1057 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 1058 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 1059 | # CONFIG_STACK_TRACER is not set | ||
| 1060 | # CONFIG_KMEMTRACE is not set | ||
| 1061 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1062 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1063 | # CONFIG_SAMPLES is not set | ||
| 1064 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1065 | # CONFIG_KGDB is not set | ||
| 1066 | CONFIG_ARM_UNWIND=y | ||
| 1067 | CONFIG_DEBUG_USER=y | ||
| 1068 | CONFIG_DEBUG_ERRORS=y | ||
| 1069 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 1070 | # CONFIG_DEBUG_LL is not set | ||
| 1071 | |||
| 1072 | # | ||
| 1073 | # Security options | ||
| 1074 | # | ||
| 1075 | # CONFIG_KEYS is not set | ||
| 1076 | # CONFIG_SECURITY is not set | ||
| 1077 | # CONFIG_SECURITYFS is not set | ||
| 1078 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1079 | # CONFIG_CRYPTO is not set | ||
| 1080 | # CONFIG_BINARY_PRINTF is not set | ||
| 1081 | |||
| 1082 | # | ||
| 1083 | # Library routines | ||
| 1084 | # | ||
| 1085 | CONFIG_BITREVERSE=y | ||
| 1086 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1087 | CONFIG_CRC_CCITT=y | ||
| 1088 | # CONFIG_CRC16 is not set | ||
| 1089 | # CONFIG_CRC_T10DIF is not set | ||
| 1090 | # CONFIG_CRC_ITU_T is not set | ||
| 1091 | CONFIG_CRC32=y | ||
| 1092 | # CONFIG_CRC7 is not set | ||
| 1093 | # CONFIG_LIBCRC32C is not set | ||
| 1094 | CONFIG_ZLIB_INFLATE=y | ||
| 1095 | CONFIG_ZLIB_DEFLATE=y | ||
| 1096 | CONFIG_LZO_COMPRESS=y | ||
| 1097 | CONFIG_LZO_DECOMPRESS=y | ||
| 1098 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1099 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 1100 | CONFIG_DECOMPRESS_LZMA=y | ||
| 1101 | CONFIG_HAS_IOMEM=y | ||
| 1102 | CONFIG_HAS_IOPORT=y | ||
| 1103 | CONFIG_HAS_DMA=y | ||
| 1104 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig index 4c6fb7e959df..51c0fa8897cd 100644 --- a/arch/arm/configs/omap3_beagle_defconfig +++ b/arch/arm/configs/omap3_beagle_defconfig | |||
| @@ -128,6 +128,7 @@ CONFIG_DEFAULT_AS=y | |||
| 128 | # CONFIG_DEFAULT_NOOP is not set | 128 | # CONFIG_DEFAULT_NOOP is not set |
| 129 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 129 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
| 130 | CONFIG_CLASSIC_RCU=y | 130 | CONFIG_CLASSIC_RCU=y |
| 131 | CONFIG_FREEZER=y | ||
| 131 | 132 | ||
| 132 | # | 133 | # |
| 133 | # System Type | 134 | # System Type |
| @@ -236,6 +237,7 @@ CONFIG_ARM_THUMB=y | |||
| 236 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 237 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 237 | CONFIG_HAS_TLS_REG=y | 238 | CONFIG_HAS_TLS_REG=y |
| 238 | # CONFIG_OUTER_CACHE is not set | 239 | # CONFIG_OUTER_CACHE is not set |
| 240 | CONFIG_COMMON_CLKDEV=y | ||
| 239 | 241 | ||
| 240 | # | 242 | # |
| 241 | # Bus support | 243 | # Bus support |
| @@ -317,7 +319,12 @@ CONFIG_BINFMT_MISC=y | |||
| 317 | # | 319 | # |
| 318 | # Power management options | 320 | # Power management options |
| 319 | # | 321 | # |
| 320 | # CONFIG_PM is not set | 322 | CONFIG_PM=y |
| 323 | # CONFIG_PM_DEBUG is not set | ||
| 324 | CONFIG_PM_SLEEP=y | ||
| 325 | CONFIG_SUSPEND=y | ||
| 326 | CONFIG_SUSPEND_FREEZER=y | ||
| 327 | # CONFIG_APM_EMULATION is not set | ||
| 321 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 328 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 322 | CONFIG_NET=y | 329 | CONFIG_NET=y |
| 323 | 330 | ||
| @@ -713,6 +720,7 @@ CONFIG_GPIOLIB=y | |||
| 713 | # CONFIG_GPIO_MAX732X is not set | 720 | # CONFIG_GPIO_MAX732X is not set |
| 714 | # CONFIG_GPIO_PCA953X is not set | 721 | # CONFIG_GPIO_PCA953X is not set |
| 715 | # CONFIG_GPIO_PCF857X is not set | 722 | # CONFIG_GPIO_PCF857X is not set |
| 723 | CONFIG_GPIO_TWL4030=y | ||
| 716 | 724 | ||
| 717 | # | 725 | # |
| 718 | # PCI GPIO expanders: | 726 | # PCI GPIO expanders: |
| @@ -741,6 +749,7 @@ CONFIG_SSB_POSSIBLE=y | |||
| 741 | # CONFIG_MFD_SM501 is not set | 749 | # CONFIG_MFD_SM501 is not set |
| 742 | # CONFIG_HTC_EGPIO is not set | 750 | # CONFIG_HTC_EGPIO is not set |
| 743 | # CONFIG_HTC_PASIC3 is not set | 751 | # CONFIG_HTC_PASIC3 is not set |
| 752 | CONFIG_TWL4030_CORE=y | ||
| 744 | # CONFIG_UCB1400_CORE is not set | 753 | # CONFIG_UCB1400_CORE is not set |
| 745 | # CONFIG_MFD_TMIO is not set | 754 | # CONFIG_MFD_TMIO is not set |
| 746 | # CONFIG_MFD_T7L66XB is not set | 755 | # CONFIG_MFD_T7L66XB is not set |
| @@ -787,7 +796,7 @@ CONFIG_DUMMY_CONSOLE=y | |||
| 787 | CONFIG_USB_SUPPORT=y | 796 | CONFIG_USB_SUPPORT=y |
| 788 | CONFIG_USB_ARCH_HAS_HCD=y | 797 | CONFIG_USB_ARCH_HAS_HCD=y |
| 789 | CONFIG_USB_ARCH_HAS_OHCI=y | 798 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 790 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 799 | CONFIG_USB_ARCH_HAS_EHCI=y |
| 791 | CONFIG_USB=y | 800 | CONFIG_USB=y |
| 792 | # CONFIG_USB_DEBUG is not set | 801 | # CONFIG_USB_DEBUG is not set |
| 793 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | 802 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set |
| @@ -798,7 +807,8 @@ CONFIG_USB=y | |||
| 798 | CONFIG_USB_DEVICEFS=y | 807 | CONFIG_USB_DEVICEFS=y |
| 799 | CONFIG_USB_DEVICE_CLASS=y | 808 | CONFIG_USB_DEVICE_CLASS=y |
| 800 | # CONFIG_USB_DYNAMIC_MINORS is not set | 809 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 801 | # CONFIG_USB_OTG is not set | 810 | CONFIG_USB_SUSPEND=y |
| 811 | CONFIG_USB_OTG=y | ||
| 802 | # CONFIG_USB_OTG_WHITELIST is not set | 812 | # CONFIG_USB_OTG_WHITELIST is not set |
| 803 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | 813 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 804 | CONFIG_USB_MON=y | 814 | CONFIG_USB_MON=y |
| @@ -806,6 +816,8 @@ CONFIG_USB_MON=y | |||
| 806 | # | 816 | # |
| 807 | # USB Host Controller Drivers | 817 | # USB Host Controller Drivers |
| 808 | # | 818 | # |
| 819 | CONFIG_USB_EHCI_HCD=y | ||
| 820 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
| 809 | # CONFIG_USB_C67X00_HCD is not set | 821 | # CONFIG_USB_C67X00_HCD is not set |
| 810 | # CONFIG_USB_ISP116X_HCD is not set | 822 | # CONFIG_USB_ISP116X_HCD is not set |
| 811 | # CONFIG_USB_ISP1760_HCD is not set | 823 | # CONFIG_USB_ISP1760_HCD is not set |
| @@ -818,10 +830,10 @@ CONFIG_USB_MUSB_SOC=y | |||
| 818 | # | 830 | # |
| 819 | # OMAP 343x high speed USB support | 831 | # OMAP 343x high speed USB support |
| 820 | # | 832 | # |
| 821 | CONFIG_USB_MUSB_HOST=y | 833 | # CONFIG_USB_MUSB_HOST is not set |
| 822 | # CONFIG_USB_MUSB_PERIPHERAL is not set | 834 | # CONFIG_USB_MUSB_PERIPHERAL is not set |
| 823 | # CONFIG_USB_MUSB_OTG is not set | 835 | CONFIG_USB_MUSB_OTG=y |
| 824 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | 836 | CONFIG_USB_GADGET_MUSB_HDRC=y |
| 825 | CONFIG_USB_MUSB_HDRC_HCD=y | 837 | CONFIG_USB_MUSB_HDRC_HCD=y |
| 826 | # CONFIG_MUSB_PIO_ONLY is not set | 838 | # CONFIG_MUSB_PIO_ONLY is not set |
| 827 | CONFIG_USB_INVENTRA_DMA=y | 839 | CONFIG_USB_INVENTRA_DMA=y |
| @@ -887,8 +899,8 @@ CONFIG_USB_GADGET_SELECTED=y | |||
| 887 | # CONFIG_USB_GADGET_FSL_USB2 is not set | 899 | # CONFIG_USB_GADGET_FSL_USB2 is not set |
| 888 | # CONFIG_USB_GADGET_NET2280 is not set | 900 | # CONFIG_USB_GADGET_NET2280 is not set |
| 889 | # CONFIG_USB_GADGET_PXA25X is not set | 901 | # CONFIG_USB_GADGET_PXA25X is not set |
| 890 | CONFIG_USB_GADGET_M66592=y | 902 | # CONFIG_USB_GADGET_M66592 is not set |
| 891 | CONFIG_USB_M66592=y | 903 | # CONFIG_USB_M66592 is not set |
| 892 | # CONFIG_USB_GADGET_PXA27X is not set | 904 | # CONFIG_USB_GADGET_PXA27X is not set |
| 893 | # CONFIG_USB_GADGET_GOKU is not set | 905 | # CONFIG_USB_GADGET_GOKU is not set |
| 894 | # CONFIG_USB_GADGET_LH7A40X is not set | 906 | # CONFIG_USB_GADGET_LH7A40X is not set |
| @@ -906,6 +918,15 @@ CONFIG_USB_ETH_RNDIS=y | |||
| 906 | # CONFIG_USB_MIDI_GADGET is not set | 918 | # CONFIG_USB_MIDI_GADGET is not set |
| 907 | # CONFIG_USB_G_PRINTER is not set | 919 | # CONFIG_USB_G_PRINTER is not set |
| 908 | # CONFIG_USB_CDC_COMPOSITE is not set | 920 | # CONFIG_USB_CDC_COMPOSITE is not set |
| 921 | |||
| 922 | # | ||
| 923 | # OTG and related infrastructure | ||
| 924 | # | ||
| 925 | CONFIG_USB_OTG_UTILS=y | ||
| 926 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 927 | # CONFIG_ISP1301_OMAP is not set | ||
| 928 | CONFIG_TWL4030_USB=y | ||
| 929 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 909 | CONFIG_MMC=y | 930 | CONFIG_MMC=y |
| 910 | # CONFIG_MMC_DEBUG is not set | 931 | # CONFIG_MMC_DEBUG is not set |
| 911 | # CONFIG_MMC_UNSAFE_RESUME is not set | 932 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| @@ -923,6 +944,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
| 923 | # | 944 | # |
| 924 | # CONFIG_MMC_SDHCI is not set | 945 | # CONFIG_MMC_SDHCI is not set |
| 925 | # CONFIG_MMC_OMAP is not set | 946 | # CONFIG_MMC_OMAP is not set |
| 947 | CONFIG_MMC_OMAP_HS=y | ||
| 926 | # CONFIG_MEMSTICK is not set | 948 | # CONFIG_MEMSTICK is not set |
| 927 | # CONFIG_ACCESSIBILITY is not set | 949 | # CONFIG_ACCESSIBILITY is not set |
| 928 | # CONFIG_NEW_LEDS is not set | 950 | # CONFIG_NEW_LEDS is not set |
| @@ -981,10 +1003,11 @@ CONFIG_RTC_INTF_DEV=y | |||
| 981 | # | 1003 | # |
| 982 | # Voltage and Current regulators | 1004 | # Voltage and Current regulators |
| 983 | # | 1005 | # |
| 984 | # CONFIG_REGULATOR is not set | 1006 | CONFIG_REGULATOR=y |
| 985 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | 1007 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set |
| 986 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | 1008 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set |
| 987 | # CONFIG_REGULATOR_BQ24022 is not set | 1009 | # CONFIG_REGULATOR_BQ24022 is not set |
| 1010 | CONFIG_REGULATOR_TWL4030=y | ||
| 988 | # CONFIG_UIO is not set | 1011 | # CONFIG_UIO is not set |
| 989 | 1012 | ||
| 990 | # | 1013 | # |
diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig index 8fb918d9ba65..9a510eab75a6 100644 --- a/arch/arm/configs/omap_3430sdp_defconfig +++ b/arch/arm/configs/omap_3430sdp_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.29-rc8 | 3 | # Linux kernel version: 2.6.30-omap1 |
| 4 | # Fri Mar 13 14:17:01 2009 | 4 | # Tue Jun 23 10:36:45 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -197,9 +197,9 @@ CONFIG_OMAP_MCBSP=y | |||
| 197 | CONFIG_OMAP_32K_TIMER=y | 197 | CONFIG_OMAP_32K_TIMER=y |
| 198 | CONFIG_OMAP_32K_TIMER_HZ=128 | 198 | CONFIG_OMAP_32K_TIMER_HZ=128 |
| 199 | CONFIG_OMAP_DM_TIMER=y | 199 | CONFIG_OMAP_DM_TIMER=y |
| 200 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | 200 | CONFIG_OMAP_LL_DEBUG_UART1=y |
| 201 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | 201 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set |
| 202 | CONFIG_OMAP_LL_DEBUG_UART3=y | 202 | # CONFIG_OMAP_LL_DEBUG_UART3 is not set |
| 203 | CONFIG_OMAP_SERIAL_WAKE=y | 203 | CONFIG_OMAP_SERIAL_WAKE=y |
| 204 | CONFIG_ARCH_OMAP34XX=y | 204 | CONFIG_ARCH_OMAP34XX=y |
| 205 | CONFIG_ARCH_OMAP3430=y | 205 | CONFIG_ARCH_OMAP3430=y |
| @@ -207,10 +207,10 @@ CONFIG_ARCH_OMAP3430=y | |||
| 207 | # | 207 | # |
| 208 | # OMAP Board Type | 208 | # OMAP Board Type |
| 209 | # | 209 | # |
| 210 | CONFIG_MACH_OMAP3_BEAGLE=y | 210 | # CONFIG_MACH_OMAP3_BEAGLE is not set |
| 211 | CONFIG_MACH_OMAP_LDP=y | 211 | # CONFIG_MACH_OMAP_LDP is not set |
| 212 | CONFIG_MACH_OVERO=y | 212 | # CONFIG_MACH_OVERO is not set |
| 213 | CONFIG_MACH_OMAP3_PANDORA=y | 213 | # CONFIG_MACH_OMAP3_PANDORA is not set |
| 214 | CONFIG_MACH_OMAP_3430SDP=y | 214 | CONFIG_MACH_OMAP_3430SDP=y |
| 215 | 215 | ||
| 216 | # | 216 | # |
| @@ -950,7 +950,7 @@ CONFIG_SPI_OMAP24XX=y | |||
| 950 | # CONFIG_SPI_TLE62X0 is not set | 950 | # CONFIG_SPI_TLE62X0 is not set |
| 951 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 951 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 952 | CONFIG_GPIOLIB=y | 952 | CONFIG_GPIOLIB=y |
| 953 | CONFIG_DEBUG_GPIO=y | 953 | # CONFIG_DEBUG_GPIO is not set |
| 954 | CONFIG_GPIO_SYSFS=y | 954 | CONFIG_GPIO_SYSFS=y |
| 955 | 955 | ||
| 956 | # | 956 | # |
| @@ -1370,7 +1370,7 @@ CONFIG_SND_OMAP_SOC=y | |||
| 1370 | CONFIG_SND_OMAP_SOC_MCBSP=y | 1370 | CONFIG_SND_OMAP_SOC_MCBSP=y |
| 1371 | # CONFIG_SND_OMAP_SOC_OVERO is not set | 1371 | # CONFIG_SND_OMAP_SOC_OVERO is not set |
| 1372 | CONFIG_SND_OMAP_SOC_SDP3430=y | 1372 | CONFIG_SND_OMAP_SOC_SDP3430=y |
| 1373 | CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y | 1373 | # CONFIG_SND_OMAP_SOC_OMAP3_PANDORA is not set |
| 1374 | CONFIG_SND_SOC_I2C_AND_SPI=y | 1374 | CONFIG_SND_SOC_I2C_AND_SPI=y |
| 1375 | # CONFIG_SND_SOC_ALL_CODECS is not set | 1375 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 1376 | CONFIG_SND_SOC_TWL4030=y | 1376 | CONFIG_SND_SOC_TWL4030=y |
diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig index 213fe9c5eaae..f1739fae7ed4 100644 --- a/arch/arm/configs/omap_zoom2_defconfig +++ b/arch/arm/configs/omap_zoom2_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.27-rc5 | 3 | # Linux kernel version: 2.6.30-omap1 |
| 4 | # Fri Oct 10 11:49:41 2008 | 4 | # Fri Jun 12 17:25:46 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| 23 | CONFIG_GENERIC_HWEIGHT=y | 23 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
| 26 | CONFIG_ZONE_DMA=y | ||
| 27 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 25 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 28 | CONFIG_VECTORS_BASE=0xffff0000 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| 29 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -39,44 +37,61 @@ CONFIG_LOCALVERSION_AUTO=y | |||
| 39 | CONFIG_SWAP=y | 37 | CONFIG_SWAP=y |
| 40 | CONFIG_SYSVIPC=y | 38 | CONFIG_SYSVIPC=y |
| 41 | CONFIG_SYSVIPC_SYSCTL=y | 39 | CONFIG_SYSVIPC_SYSCTL=y |
| 40 | # CONFIG_POSIX_MQUEUE is not set | ||
| 42 | CONFIG_BSD_PROCESS_ACCT=y | 41 | CONFIG_BSD_PROCESS_ACCT=y |
| 43 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 42 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
| 43 | # CONFIG_TASKSTATS is not set | ||
| 44 | # CONFIG_AUDIT is not set | ||
| 45 | |||
| 46 | # | ||
| 47 | # RCU Subsystem | ||
| 48 | # | ||
| 49 | CONFIG_CLASSIC_RCU=y | ||
| 50 | # CONFIG_TREE_RCU is not set | ||
| 51 | # CONFIG_PREEMPT_RCU is not set | ||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 53 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 44 | # CONFIG_IKCONFIG is not set | 54 | # CONFIG_IKCONFIG is not set |
| 45 | CONFIG_LOG_BUF_SHIFT=14 | 55 | CONFIG_LOG_BUF_SHIFT=14 |
| 46 | # CONFIG_CGROUPS is not set | ||
| 47 | CONFIG_GROUP_SCHED=y | 56 | CONFIG_GROUP_SCHED=y |
| 48 | CONFIG_FAIR_GROUP_SCHED=y | 57 | CONFIG_FAIR_GROUP_SCHED=y |
| 49 | # CONFIG_RT_GROUP_SCHED is not set | 58 | # CONFIG_RT_GROUP_SCHED is not set |
| 50 | CONFIG_USER_SCHED=y | 59 | CONFIG_USER_SCHED=y |
| 51 | # CONFIG_CGROUP_SCHED is not set | 60 | # CONFIG_CGROUP_SCHED is not set |
| 61 | # CONFIG_CGROUPS is not set | ||
| 52 | CONFIG_SYSFS_DEPRECATED=y | 62 | CONFIG_SYSFS_DEPRECATED=y |
| 53 | CONFIG_SYSFS_DEPRECATED_V2=y | 63 | CONFIG_SYSFS_DEPRECATED_V2=y |
| 54 | # CONFIG_RELAY is not set | 64 | # CONFIG_RELAY is not set |
| 55 | # CONFIG_NAMESPACES is not set | 65 | # CONFIG_NAMESPACES is not set |
| 56 | CONFIG_BLK_DEV_INITRD=y | 66 | CONFIG_BLK_DEV_INITRD=y |
| 57 | CONFIG_INITRAMFS_SOURCE="" | 67 | CONFIG_INITRAMFS_SOURCE="" |
| 68 | CONFIG_RD_GZIP=y | ||
| 69 | # CONFIG_RD_BZIP2 is not set | ||
| 70 | # CONFIG_RD_LZMA is not set | ||
| 58 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 71 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 59 | CONFIG_SYSCTL=y | 72 | CONFIG_SYSCTL=y |
| 73 | CONFIG_ANON_INODES=y | ||
| 60 | CONFIG_EMBEDDED=y | 74 | CONFIG_EMBEDDED=y |
| 61 | CONFIG_UID16=y | 75 | CONFIG_UID16=y |
| 62 | # CONFIG_SYSCTL_SYSCALL is not set | 76 | # CONFIG_SYSCTL_SYSCALL is not set |
| 63 | CONFIG_KALLSYMS=y | 77 | CONFIG_KALLSYMS=y |
| 64 | # CONFIG_KALLSYMS_ALL is not set | 78 | # CONFIG_KALLSYMS_ALL is not set |
| 65 | CONFIG_KALLSYMS_EXTRA_PASS=y | 79 | CONFIG_KALLSYMS_EXTRA_PASS=y |
| 80 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 66 | CONFIG_HOTPLUG=y | 81 | CONFIG_HOTPLUG=y |
| 67 | CONFIG_PRINTK=y | 82 | CONFIG_PRINTK=y |
| 68 | CONFIG_BUG=y | 83 | CONFIG_BUG=y |
| 69 | CONFIG_ELF_CORE=y | 84 | CONFIG_ELF_CORE=y |
| 70 | CONFIG_COMPAT_BRK=y | ||
| 71 | CONFIG_BASE_FULL=y | 85 | CONFIG_BASE_FULL=y |
| 72 | CONFIG_FUTEX=y | 86 | CONFIG_FUTEX=y |
| 73 | CONFIG_ANON_INODES=y | ||
| 74 | CONFIG_EPOLL=y | 87 | CONFIG_EPOLL=y |
| 75 | CONFIG_SIGNALFD=y | 88 | CONFIG_SIGNALFD=y |
| 76 | CONFIG_TIMERFD=y | 89 | CONFIG_TIMERFD=y |
| 77 | CONFIG_EVENTFD=y | 90 | CONFIG_EVENTFD=y |
| 78 | CONFIG_SHMEM=y | 91 | CONFIG_SHMEM=y |
| 92 | CONFIG_AIO=y | ||
| 79 | CONFIG_VM_EVENT_COUNTERS=y | 93 | CONFIG_VM_EVENT_COUNTERS=y |
| 94 | CONFIG_COMPAT_BRK=y | ||
| 80 | CONFIG_SLAB=y | 95 | CONFIG_SLAB=y |
| 81 | # CONFIG_SLUB is not set | 96 | # CONFIG_SLUB is not set |
| 82 | # CONFIG_SLOB is not set | 97 | # CONFIG_SLOB is not set |
| @@ -84,19 +99,13 @@ CONFIG_SLAB=y | |||
| 84 | # CONFIG_MARKERS is not set | 99 | # CONFIG_MARKERS is not set |
| 85 | CONFIG_HAVE_OPROFILE=y | 100 | CONFIG_HAVE_OPROFILE=y |
| 86 | # CONFIG_KPROBES is not set | 101 | # CONFIG_KPROBES is not set |
| 87 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
| 88 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
| 89 | CONFIG_HAVE_KPROBES=y | 102 | CONFIG_HAVE_KPROBES=y |
| 90 | CONFIG_HAVE_KRETPROBES=y | 103 | CONFIG_HAVE_KRETPROBES=y |
| 91 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | ||
| 92 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
| 93 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
| 94 | CONFIG_HAVE_CLK=y | 104 | CONFIG_HAVE_CLK=y |
| 95 | CONFIG_PROC_PAGE_MONITOR=y | 105 | # CONFIG_SLOW_WORK is not set |
| 96 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 106 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 97 | CONFIG_SLABINFO=y | 107 | CONFIG_SLABINFO=y |
| 98 | CONFIG_RT_MUTEXES=y | 108 | CONFIG_RT_MUTEXES=y |
| 99 | # CONFIG_TINY_SHMEM is not set | ||
| 100 | CONFIG_BASE_SMALL=0 | 109 | CONFIG_BASE_SMALL=0 |
| 101 | CONFIG_MODULES=y | 110 | CONFIG_MODULES=y |
| 102 | # CONFIG_MODULE_FORCE_LOAD is not set | 111 | # CONFIG_MODULE_FORCE_LOAD is not set |
| @@ -104,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y | |||
| 104 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 113 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 105 | CONFIG_MODVERSIONS=y | 114 | CONFIG_MODVERSIONS=y |
| 106 | CONFIG_MODULE_SRCVERSION_ALL=y | 115 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 107 | CONFIG_KMOD=y | ||
| 108 | CONFIG_BLOCK=y | 116 | CONFIG_BLOCK=y |
| 109 | # CONFIG_LBD is not set | 117 | # CONFIG_LBD is not set |
| 110 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 111 | # CONFIG_LSF is not set | ||
| 112 | # CONFIG_BLK_DEV_BSG is not set | 118 | # CONFIG_BLK_DEV_BSG is not set |
| 113 | # CONFIG_BLK_DEV_INTEGRITY is not set | 119 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 114 | 120 | ||
| @@ -124,7 +130,7 @@ CONFIG_DEFAULT_AS=y | |||
| 124 | # CONFIG_DEFAULT_CFQ is not set | 130 | # CONFIG_DEFAULT_CFQ is not set |
| 125 | # CONFIG_DEFAULT_NOOP is not set | 131 | # CONFIG_DEFAULT_NOOP is not set |
| 126 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 132 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
| 127 | CONFIG_CLASSIC_RCU=y | 133 | CONFIG_FREEZER=y |
| 128 | 134 | ||
| 129 | # | 135 | # |
| 130 | # System Type | 136 | # System Type |
| @@ -134,10 +140,10 @@ CONFIG_CLASSIC_RCU=y | |||
| 134 | # CONFIG_ARCH_REALVIEW is not set | 140 | # CONFIG_ARCH_REALVIEW is not set |
| 135 | # CONFIG_ARCH_VERSATILE is not set | 141 | # CONFIG_ARCH_VERSATILE is not set |
| 136 | # CONFIG_ARCH_AT91 is not set | 142 | # CONFIG_ARCH_AT91 is not set |
| 137 | # CONFIG_ARCH_CLPS7500 is not set | ||
| 138 | # CONFIG_ARCH_CLPS711X is not set | 143 | # CONFIG_ARCH_CLPS711X is not set |
| 139 | # CONFIG_ARCH_EBSA110 is not set | 144 | # CONFIG_ARCH_EBSA110 is not set |
| 140 | # CONFIG_ARCH_EP93XX is not set | 145 | # CONFIG_ARCH_EP93XX is not set |
| 146 | # CONFIG_ARCH_GEMINI is not set | ||
| 141 | # CONFIG_ARCH_FOOTBRIDGE is not set | 147 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 142 | # CONFIG_ARCH_NETX is not set | 148 | # CONFIG_ARCH_NETX is not set |
| 143 | # CONFIG_ARCH_H720X is not set | 149 | # CONFIG_ARCH_H720X is not set |
| @@ -158,14 +164,17 @@ CONFIG_CLASSIC_RCU=y | |||
| 158 | # CONFIG_ARCH_ORION5X is not set | 164 | # CONFIG_ARCH_ORION5X is not set |
| 159 | # CONFIG_ARCH_PNX4008 is not set | 165 | # CONFIG_ARCH_PNX4008 is not set |
| 160 | # CONFIG_ARCH_PXA is not set | 166 | # CONFIG_ARCH_PXA is not set |
| 167 | # CONFIG_ARCH_MMP is not set | ||
| 161 | # CONFIG_ARCH_RPC is not set | 168 | # CONFIG_ARCH_RPC is not set |
| 162 | # CONFIG_ARCH_SA1100 is not set | 169 | # CONFIG_ARCH_SA1100 is not set |
| 163 | # CONFIG_ARCH_S3C2410 is not set | 170 | # CONFIG_ARCH_S3C2410 is not set |
| 171 | # CONFIG_ARCH_S3C64XX is not set | ||
| 164 | # CONFIG_ARCH_SHARK is not set | 172 | # CONFIG_ARCH_SHARK is not set |
| 165 | # CONFIG_ARCH_LH7A40X is not set | 173 | # CONFIG_ARCH_LH7A40X is not set |
| 166 | # CONFIG_ARCH_DAVINCI is not set | 174 | # CONFIG_ARCH_DAVINCI is not set |
| 167 | CONFIG_ARCH_OMAP=y | 175 | CONFIG_ARCH_OMAP=y |
| 168 | # CONFIG_ARCH_MSM7X00A is not set | 176 | # CONFIG_ARCH_MSM is not set |
| 177 | # CONFIG_ARCH_W90X900 is not set | ||
| 169 | 178 | ||
| 170 | # | 179 | # |
| 171 | # TI OMAP Implementations | 180 | # TI OMAP Implementations |
| @@ -174,6 +183,7 @@ CONFIG_ARCH_OMAP_OTG=y | |||
| 174 | # CONFIG_ARCH_OMAP1 is not set | 183 | # CONFIG_ARCH_OMAP1 is not set |
| 175 | # CONFIG_ARCH_OMAP2 is not set | 184 | # CONFIG_ARCH_OMAP2 is not set |
| 176 | CONFIG_ARCH_OMAP3=y | 185 | CONFIG_ARCH_OMAP3=y |
| 186 | # CONFIG_ARCH_OMAP4 is not set | ||
| 177 | 187 | ||
| 178 | # | 188 | # |
| 179 | # OMAP Feature Selections | 189 | # OMAP Feature Selections |
| @@ -185,6 +195,7 @@ CONFIG_OMAP_MUX=y | |||
| 185 | CONFIG_OMAP_MUX_DEBUG=y | 195 | CONFIG_OMAP_MUX_DEBUG=y |
| 186 | CONFIG_OMAP_MUX_WARNINGS=y | 196 | CONFIG_OMAP_MUX_WARNINGS=y |
| 187 | CONFIG_OMAP_MCBSP=y | 197 | CONFIG_OMAP_MCBSP=y |
| 198 | # CONFIG_OMAP_MBOX_FWK is not set | ||
| 188 | # CONFIG_OMAP_MPU_TIMER is not set | 199 | # CONFIG_OMAP_MPU_TIMER is not set |
| 189 | CONFIG_OMAP_32K_TIMER=y | 200 | CONFIG_OMAP_32K_TIMER=y |
| 190 | CONFIG_OMAP_32K_TIMER_HZ=128 | 201 | CONFIG_OMAP_32K_TIMER_HZ=128 |
| @@ -192,25 +203,20 @@ CONFIG_OMAP_DM_TIMER=y | |||
| 192 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set | 203 | # CONFIG_OMAP_LL_DEBUG_UART1 is not set |
| 193 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set | 204 | # CONFIG_OMAP_LL_DEBUG_UART2 is not set |
| 194 | CONFIG_OMAP_LL_DEBUG_UART3=y | 205 | CONFIG_OMAP_LL_DEBUG_UART3=y |
| 195 | CONFIG_OMAP_SERIAL_WAKE=y | ||
| 196 | CONFIG_ARCH_OMAP34XX=y | 206 | CONFIG_ARCH_OMAP34XX=y |
| 197 | CONFIG_ARCH_OMAP3430=y | 207 | CONFIG_ARCH_OMAP3430=y |
| 198 | 208 | ||
| 199 | # | 209 | # |
| 200 | # OMAP Board Type | 210 | # OMAP Board Type |
| 201 | # | 211 | # |
| 202 | # CONFIG_MACH_OMAP3_BEAGLE is not set | 212 | # CONFIG_MACH_NOKIA_RX51 is not set |
| 203 | # CONFIG_MACH_OMAP_LDP is not set | 213 | # CONFIG_MACH_OMAP_LDP is not set |
| 204 | CONFIG_MACH_OMAP_ZOOM2=y | 214 | # CONFIG_MACH_OMAP_3430SDP is not set |
| 215 | # CONFIG_MACH_OMAP3EVM is not set | ||
| 216 | # CONFIG_MACH_OMAP3_BEAGLE is not set | ||
| 205 | # CONFIG_MACH_OVERO is not set | 217 | # CONFIG_MACH_OVERO is not set |
| 206 | 218 | # CONFIG_MACH_OMAP3_PANDORA is not set | |
| 207 | # | 219 | CONFIG_MACH_OMAP_ZOOM2=y |
| 208 | # Boot options | ||
| 209 | # | ||
| 210 | |||
| 211 | # | ||
| 212 | # Power management | ||
| 213 | # | ||
| 214 | 220 | ||
| 215 | # | 221 | # |
| 216 | # Processor Type | 222 | # Processor Type |
| @@ -239,6 +245,10 @@ CONFIG_ARM_THUMB=y | |||
| 239 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 245 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 240 | CONFIG_HAS_TLS_REG=y | 246 | CONFIG_HAS_TLS_REG=y |
| 241 | # CONFIG_OUTER_CACHE is not set | 247 | # CONFIG_OUTER_CACHE is not set |
| 248 | # CONFIG_ARM_ERRATA_430973 is not set | ||
| 249 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 250 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 251 | CONFIG_COMMON_CLKDEV=y | ||
| 242 | 252 | ||
| 243 | # | 253 | # |
| 244 | # Bus support | 254 | # Bus support |
| @@ -254,26 +264,32 @@ CONFIG_TICK_ONESHOT=y | |||
| 254 | CONFIG_NO_HZ=y | 264 | CONFIG_NO_HZ=y |
| 255 | CONFIG_HIGH_RES_TIMERS=y | 265 | CONFIG_HIGH_RES_TIMERS=y |
| 256 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 266 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| 267 | CONFIG_VMSPLIT_3G=y | ||
| 268 | # CONFIG_VMSPLIT_2G is not set | ||
| 269 | # CONFIG_VMSPLIT_1G is not set | ||
| 270 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 257 | # CONFIG_PREEMPT is not set | 271 | # CONFIG_PREEMPT is not set |
| 258 | CONFIG_HZ=128 | 272 | CONFIG_HZ=128 |
| 259 | CONFIG_AEABI=y | 273 | CONFIG_AEABI=y |
| 260 | CONFIG_OABI_COMPAT=y | 274 | CONFIG_OABI_COMPAT=y |
| 261 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | 275 | # CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set |
| 262 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 276 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 277 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 278 | # CONFIG_HIGHMEM is not set | ||
| 263 | CONFIG_SELECT_MEMORY_MODEL=y | 279 | CONFIG_SELECT_MEMORY_MODEL=y |
| 264 | CONFIG_FLATMEM_MANUAL=y | 280 | CONFIG_FLATMEM_MANUAL=y |
| 265 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 281 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
| 266 | # CONFIG_SPARSEMEM_MANUAL is not set | 282 | # CONFIG_SPARSEMEM_MANUAL is not set |
| 267 | CONFIG_FLATMEM=y | 283 | CONFIG_FLATMEM=y |
| 268 | CONFIG_FLAT_NODE_MEM_MAP=y | 284 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 269 | # CONFIG_SPARSEMEM_STATIC is not set | ||
| 270 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
| 271 | CONFIG_PAGEFLAGS_EXTENDED=y | 285 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 272 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 286 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
| 273 | # CONFIG_RESOURCES_64BIT is not set | 287 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 274 | CONFIG_ZONE_DMA_FLAG=1 | 288 | CONFIG_ZONE_DMA_FLAG=0 |
| 275 | CONFIG_BOUNCE=y | ||
| 276 | CONFIG_VIRT_TO_BUS=y | 289 | CONFIG_VIRT_TO_BUS=y |
| 290 | CONFIG_UNEVICTABLE_LRU=y | ||
| 291 | CONFIG_HAVE_MLOCK=y | ||
| 292 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 277 | # CONFIG_LEDS is not set | 293 | # CONFIG_LEDS is not set |
| 278 | CONFIG_ALIGNMENT_TRAP=y | 294 | CONFIG_ALIGNMENT_TRAP=y |
| 279 | 295 | ||
| @@ -287,9 +303,10 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.16 | |||
| 287 | # CONFIG_KEXEC is not set | 303 | # CONFIG_KEXEC is not set |
| 288 | 304 | ||
| 289 | # | 305 | # |
| 290 | # CPU Frequency scaling | 306 | # CPU Power Management |
| 291 | # | 307 | # |
| 292 | # CONFIG_CPU_FREQ is not set | 308 | # CONFIG_CPU_FREQ is not set |
| 309 | # CONFIG_CPU_IDLE is not set | ||
| 293 | 310 | ||
| 294 | # | 311 | # |
| 295 | # Floating point emulation | 312 | # Floating point emulation |
| @@ -309,13 +326,23 @@ CONFIG_VFPv3=y | |||
| 309 | # Userspace binary formats | 326 | # Userspace binary formats |
| 310 | # | 327 | # |
| 311 | CONFIG_BINFMT_ELF=y | 328 | CONFIG_BINFMT_ELF=y |
| 329 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 330 | CONFIG_HAVE_AOUT=y | ||
| 312 | # CONFIG_BINFMT_AOUT is not set | 331 | # CONFIG_BINFMT_AOUT is not set |
| 313 | CONFIG_BINFMT_MISC=y | 332 | CONFIG_BINFMT_MISC=y |
| 314 | 333 | ||
| 315 | # | 334 | # |
| 316 | # Power management options | 335 | # Power management options |
| 317 | # | 336 | # |
| 318 | # CONFIG_PM is not set | 337 | CONFIG_PM=y |
| 338 | CONFIG_PM_DEBUG=y | ||
| 339 | CONFIG_PM_VERBOSE=y | ||
| 340 | CONFIG_CAN_PM_TRACE=y | ||
| 341 | CONFIG_PM_SLEEP=y | ||
| 342 | CONFIG_SUSPEND=y | ||
| 343 | # CONFIG_PM_TEST_SUSPEND is not set | ||
| 344 | CONFIG_SUSPEND_FREEZER=y | ||
| 345 | # CONFIG_APM_EMULATION is not set | ||
| 319 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 346 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 320 | CONFIG_NET=y | 347 | CONFIG_NET=y |
| 321 | 348 | ||
| @@ -378,7 +405,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 378 | # CONFIG_LAPB is not set | 405 | # CONFIG_LAPB is not set |
| 379 | # CONFIG_ECONET is not set | 406 | # CONFIG_ECONET is not set |
| 380 | # CONFIG_WAN_ROUTER is not set | 407 | # CONFIG_WAN_ROUTER is not set |
| 408 | # CONFIG_PHONET is not set | ||
| 381 | # CONFIG_NET_SCHED is not set | 409 | # CONFIG_NET_SCHED is not set |
| 410 | # CONFIG_DCB is not set | ||
| 382 | 411 | ||
| 383 | # | 412 | # |
| 384 | # Network testing | 413 | # Network testing |
| @@ -389,8 +418,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
| 389 | # CONFIG_IRDA is not set | 418 | # CONFIG_IRDA is not set |
| 390 | # CONFIG_BT is not set | 419 | # CONFIG_BT is not set |
| 391 | # CONFIG_AF_RXRPC is not set | 420 | # CONFIG_AF_RXRPC is not set |
| 392 | # CONFIG_PHONET is not set | ||
| 393 | # CONFIG_WIRELESS is not set | 421 | # CONFIG_WIRELESS is not set |
| 422 | # CONFIG_WIMAX is not set | ||
| 394 | # CONFIG_RFKILL is not set | 423 | # CONFIG_RFKILL is not set |
| 395 | # CONFIG_NET_9P is not set | 424 | # CONFIG_NET_9P is not set |
| 396 | 425 | ||
| @@ -416,14 +445,28 @@ CONFIG_BLK_DEV=y | |||
| 416 | # CONFIG_BLK_DEV_COW_COMMON is not set | 445 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 417 | CONFIG_BLK_DEV_LOOP=y | 446 | CONFIG_BLK_DEV_LOOP=y |
| 418 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 447 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 448 | # CONFIG_BLK_DEV_NBD is not set | ||
| 449 | # CONFIG_BLK_DEV_UB is not set | ||
| 419 | CONFIG_BLK_DEV_RAM=y | 450 | CONFIG_BLK_DEV_RAM=y |
| 420 | CONFIG_BLK_DEV_RAM_COUNT=16 | 451 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 421 | CONFIG_BLK_DEV_RAM_SIZE=16384 | 452 | CONFIG_BLK_DEV_RAM_SIZE=16384 |
| 422 | # CONFIG_BLK_DEV_XIP is not set | 453 | # CONFIG_BLK_DEV_XIP is not set |
| 423 | # CONFIG_CDROM_PKTCDVD is not set | 454 | # CONFIG_CDROM_PKTCDVD is not set |
| 455 | # CONFIG_ATA_OVER_ETH is not set | ||
| 424 | CONFIG_MISC_DEVICES=y | 456 | CONFIG_MISC_DEVICES=y |
| 425 | # CONFIG_EEPROM_93CX6 is not set | 457 | # CONFIG_ICS932S401 is not set |
| 458 | # CONFIG_OMAP_STI is not set | ||
| 426 | # CONFIG_ENCLOSURE_SERVICES is not set | 459 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 460 | # CONFIG_ISL29003 is not set | ||
| 461 | # CONFIG_C2PORT is not set | ||
| 462 | |||
| 463 | # | ||
| 464 | # EEPROM support | ||
| 465 | # | ||
| 466 | # CONFIG_EEPROM_AT24 is not set | ||
| 467 | # CONFIG_EEPROM_AT25 is not set | ||
| 468 | # CONFIG_EEPROM_LEGACY is not set | ||
| 469 | # CONFIG_EEPROM_93CX6 is not set | ||
| 427 | CONFIG_HAVE_IDE=y | 470 | CONFIG_HAVE_IDE=y |
| 428 | # CONFIG_IDE is not set | 471 | # CONFIG_IDE is not set |
| 429 | 472 | ||
| @@ -461,14 +504,20 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
| 461 | # | 504 | # |
| 462 | # CONFIG_SCSI_SPI_ATTRS is not set | 505 | # CONFIG_SCSI_SPI_ATTRS is not set |
| 463 | # CONFIG_SCSI_FC_ATTRS is not set | 506 | # CONFIG_SCSI_FC_ATTRS is not set |
| 507 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 464 | # CONFIG_SCSI_SAS_LIBSAS is not set | 508 | # CONFIG_SCSI_SAS_LIBSAS is not set |
| 465 | # CONFIG_SCSI_SRP_ATTRS is not set | 509 | # CONFIG_SCSI_SRP_ATTRS is not set |
| 466 | CONFIG_SCSI_LOWLEVEL=y | 510 | CONFIG_SCSI_LOWLEVEL=y |
| 511 | # CONFIG_ISCSI_TCP is not set | ||
| 512 | # CONFIG_LIBFC is not set | ||
| 513 | # CONFIG_LIBFCOE is not set | ||
| 467 | # CONFIG_SCSI_DEBUG is not set | 514 | # CONFIG_SCSI_DEBUG is not set |
| 468 | # CONFIG_SCSI_DH is not set | 515 | # CONFIG_SCSI_DH is not set |
| 516 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 469 | # CONFIG_ATA is not set | 517 | # CONFIG_ATA is not set |
| 470 | # CONFIG_MD is not set | 518 | # CONFIG_MD is not set |
| 471 | CONFIG_NETDEVICES=y | 519 | CONFIG_NETDEVICES=y |
| 520 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 472 | # CONFIG_DUMMY is not set | 521 | # CONFIG_DUMMY is not set |
| 473 | # CONFIG_BONDING is not set | 522 | # CONFIG_BONDING is not set |
| 474 | # CONFIG_MACVLAN is not set | 523 | # CONFIG_MACVLAN is not set |
| @@ -501,8 +550,10 @@ CONFIG_MII=y | |||
| 501 | # CONFIG_SMC91X is not set | 550 | # CONFIG_SMC91X is not set |
| 502 | # CONFIG_DM9000 is not set | 551 | # CONFIG_DM9000 is not set |
| 503 | # CONFIG_ENC28J60 is not set | 552 | # CONFIG_ENC28J60 is not set |
| 553 | # CONFIG_ETHOC is not set | ||
| 504 | # CONFIG_SMC911X is not set | 554 | # CONFIG_SMC911X is not set |
| 505 | CONFIG_SMSC911X=y | 555 | CONFIG_SMSC911X=y |
| 556 | # CONFIG_DNET is not set | ||
| 506 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 557 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
| 507 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 558 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
| 508 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 559 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
| @@ -519,7 +570,10 @@ CONFIG_NETDEV_10000=y | |||
| 519 | # | 570 | # |
| 520 | # CONFIG_WLAN_PRE80211 is not set | 571 | # CONFIG_WLAN_PRE80211 is not set |
| 521 | # CONFIG_WLAN_80211 is not set | 572 | # CONFIG_WLAN_80211 is not set |
| 522 | # CONFIG_IWLWIFI_LEDS is not set | 573 | |
| 574 | # | ||
| 575 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 576 | # | ||
| 523 | 577 | ||
| 524 | # | 578 | # |
| 525 | # USB Network Adapters | 579 | # USB Network Adapters |
| @@ -561,17 +615,25 @@ CONFIG_INPUT_EVDEV=y | |||
| 561 | # CONFIG_INPUT_TABLET is not set | 615 | # CONFIG_INPUT_TABLET is not set |
| 562 | CONFIG_INPUT_TOUCHSCREEN=y | 616 | CONFIG_INPUT_TOUCHSCREEN=y |
| 563 | CONFIG_TOUCHSCREEN_ADS7846=y | 617 | CONFIG_TOUCHSCREEN_ADS7846=y |
| 618 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 619 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
| 620 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | ||
| 621 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 564 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 622 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 565 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 623 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 566 | # CONFIG_TOUCHSCREEN_ELO is not set | 624 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 625 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 567 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 626 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 568 | # CONFIG_TOUCHSCREEN_INEXIO is not set | 627 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
| 569 | # CONFIG_TOUCHSCREEN_MK712 is not set | 628 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| 570 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | 629 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set |
| 571 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 630 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
| 572 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 631 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
| 573 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | 632 | # CONFIG_TOUCHSCREEN_TSC2005 is not set |
| 633 | # CONFIG_TOUCHSCREEN_TSC210X is not set | ||
| 634 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 574 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 635 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
| 636 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
| 575 | # CONFIG_INPUT_MISC is not set | 637 | # CONFIG_INPUT_MISC is not set |
| 576 | 638 | ||
| 577 | # | 639 | # |
| @@ -607,13 +669,15 @@ CONFIG_SERIAL_8250_RSA=y | |||
| 607 | # | 669 | # |
| 608 | # Non-8250 serial port support | 670 | # Non-8250 serial port support |
| 609 | # | 671 | # |
| 672 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 610 | CONFIG_SERIAL_CORE=y | 673 | CONFIG_SERIAL_CORE=y |
| 611 | CONFIG_SERIAL_CORE_CONSOLE=y | 674 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 612 | CONFIG_UNIX98_PTYS=y | 675 | CONFIG_UNIX98_PTYS=y |
| 676 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 613 | # CONFIG_LEGACY_PTYS is not set | 677 | # CONFIG_LEGACY_PTYS is not set |
| 614 | # CONFIG_IPMI_HANDLER is not set | 678 | # CONFIG_IPMI_HANDLER is not set |
| 615 | CONFIG_HW_RANDOM=y | 679 | CONFIG_HW_RANDOM=y |
| 616 | # CONFIG_NVRAM is not set | 680 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set |
| 617 | # CONFIG_R3964 is not set | 681 | # CONFIG_R3964 is not set |
| 618 | # CONFIG_RAW_DRIVER is not set | 682 | # CONFIG_RAW_DRIVER is not set |
| 619 | # CONFIG_TCG_TPM is not set | 683 | # CONFIG_TCG_TPM is not set |
| @@ -639,6 +703,7 @@ CONFIG_I2C_OMAP=y | |||
| 639 | # | 703 | # |
| 640 | # CONFIG_I2C_PARPORT_LIGHT is not set | 704 | # CONFIG_I2C_PARPORT_LIGHT is not set |
| 641 | # CONFIG_I2C_TAOS_EVM is not set | 705 | # CONFIG_I2C_TAOS_EVM is not set |
| 706 | # CONFIG_I2C_TINY_USB is not set | ||
| 642 | 707 | ||
| 643 | # | 708 | # |
| 644 | # Other I2C/SMBus bus drivers | 709 | # Other I2C/SMBus bus drivers |
| @@ -650,14 +715,11 @@ CONFIG_I2C_OMAP=y | |||
| 650 | # Miscellaneous I2C Chip support | 715 | # Miscellaneous I2C Chip support |
| 651 | # | 716 | # |
| 652 | # CONFIG_DS1682 is not set | 717 | # CONFIG_DS1682 is not set |
| 653 | # CONFIG_EEPROM_AT24 is not set | ||
| 654 | # CONFIG_EEPROM_LEGACY is not set | ||
| 655 | # CONFIG_SENSORS_PCF8574 is not set | 718 | # CONFIG_SENSORS_PCF8574 is not set |
| 656 | # CONFIG_PCF8575 is not set | 719 | # CONFIG_PCF8575 is not set |
| 657 | # CONFIG_SENSORS_PCA9539 is not set | 720 | # CONFIG_SENSORS_PCA9539 is not set |
| 658 | # CONFIG_SENSORS_PCF8591 is not set | 721 | # CONFIG_TWL4030_MADC is not set |
| 659 | # CONFIG_ISP1301_OMAP is not set | 722 | # CONFIG_TWL4030_POWEROFF is not set |
| 660 | # CONFIG_TPS65010 is not set | ||
| 661 | # CONFIG_SENSORS_MAX6875 is not set | 723 | # CONFIG_SENSORS_MAX6875 is not set |
| 662 | # CONFIG_SENSORS_TSL2550 is not set | 724 | # CONFIG_SENSORS_TSL2550 is not set |
| 663 | # CONFIG_I2C_DEBUG_CORE is not set | 725 | # CONFIG_I2C_DEBUG_CORE is not set |
| @@ -672,12 +734,12 @@ CONFIG_SPI_MASTER=y | |||
| 672 | # SPI Master Controller Drivers | 734 | # SPI Master Controller Drivers |
| 673 | # | 735 | # |
| 674 | # CONFIG_SPI_BITBANG is not set | 736 | # CONFIG_SPI_BITBANG is not set |
| 737 | # CONFIG_SPI_GPIO is not set | ||
| 675 | CONFIG_SPI_OMAP24XX=y | 738 | CONFIG_SPI_OMAP24XX=y |
| 676 | 739 | ||
| 677 | # | 740 | # |
| 678 | # SPI Protocol Masters | 741 | # SPI Protocol Masters |
| 679 | # | 742 | # |
| 680 | # CONFIG_EEPROM_AT25 is not set | ||
| 681 | # CONFIG_SPI_SPIDEV is not set | 743 | # CONFIG_SPI_SPIDEV is not set |
| 682 | # CONFIG_SPI_TLE62X0 is not set | 744 | # CONFIG_SPI_TLE62X0 is not set |
| 683 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 745 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| @@ -686,11 +748,16 @@ CONFIG_GPIOLIB=y | |||
| 686 | # CONFIG_GPIO_SYSFS is not set | 748 | # CONFIG_GPIO_SYSFS is not set |
| 687 | 749 | ||
| 688 | # | 750 | # |
| 751 | # Memory mapped GPIO expanders: | ||
| 752 | # | ||
| 753 | |||
| 754 | # | ||
| 689 | # I2C GPIO expanders: | 755 | # I2C GPIO expanders: |
| 690 | # | 756 | # |
| 691 | # CONFIG_GPIO_MAX732X is not set | 757 | # CONFIG_GPIO_MAX732X is not set |
| 692 | # CONFIG_GPIO_PCA953X is not set | 758 | # CONFIG_GPIO_PCA953X is not set |
| 693 | # CONFIG_GPIO_PCF857X is not set | 759 | # CONFIG_GPIO_PCF857X is not set |
| 760 | CONFIG_GPIO_TWL4030=y | ||
| 694 | 761 | ||
| 695 | # | 762 | # |
| 696 | # PCI GPIO expanders: | 763 | # PCI GPIO expanders: |
| @@ -702,26 +769,34 @@ CONFIG_GPIOLIB=y | |||
| 702 | # CONFIG_GPIO_MAX7301 is not set | 769 | # CONFIG_GPIO_MAX7301 is not set |
| 703 | # CONFIG_GPIO_MCP23S08 is not set | 770 | # CONFIG_GPIO_MCP23S08 is not set |
| 704 | CONFIG_W1=y | 771 | CONFIG_W1=y |
| 772 | CONFIG_W1_CON=y | ||
| 705 | 773 | ||
| 706 | # | 774 | # |
| 707 | # 1-wire Bus Masters | 775 | # 1-wire Bus Masters |
| 708 | # | 776 | # |
| 777 | # CONFIG_W1_MASTER_DS2490 is not set | ||
| 709 | # CONFIG_W1_MASTER_DS2482 is not set | 778 | # CONFIG_W1_MASTER_DS2482 is not set |
| 710 | # CONFIG_W1_MASTER_DS1WM is not set | 779 | # CONFIG_W1_MASTER_DS1WM is not set |
| 711 | # CONFIG_W1_MASTER_GPIO is not set | 780 | # CONFIG_W1_MASTER_GPIO is not set |
| 781 | # CONFIG_HDQ_MASTER_OMAP is not set | ||
| 712 | 782 | ||
| 713 | # | 783 | # |
| 714 | # 1-wire Slaves | 784 | # 1-wire Slaves |
| 715 | # | 785 | # |
| 716 | # CONFIG_W1_SLAVE_THERM is not set | 786 | # CONFIG_W1_SLAVE_THERM is not set |
| 717 | # CONFIG_W1_SLAVE_SMEM is not set | 787 | # CONFIG_W1_SLAVE_SMEM is not set |
| 788 | # CONFIG_W1_SLAVE_DS2431 is not set | ||
| 718 | # CONFIG_W1_SLAVE_DS2433 is not set | 789 | # CONFIG_W1_SLAVE_DS2433 is not set |
| 719 | # CONFIG_W1_SLAVE_DS2760 is not set | 790 | # CONFIG_W1_SLAVE_DS2760 is not set |
| 791 | # CONFIG_W1_SLAVE_BQ27000 is not set | ||
| 720 | CONFIG_POWER_SUPPLY=y | 792 | CONFIG_POWER_SUPPLY=y |
| 721 | # CONFIG_POWER_SUPPLY_DEBUG is not set | 793 | # CONFIG_POWER_SUPPLY_DEBUG is not set |
| 722 | # CONFIG_PDA_POWER is not set | 794 | # CONFIG_PDA_POWER is not set |
| 723 | # CONFIG_BATTERY_DS2760 is not set | 795 | # CONFIG_BATTERY_DS2760 is not set |
| 796 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 724 | # CONFIG_HWMON is not set | 797 | # CONFIG_HWMON is not set |
| 798 | # CONFIG_THERMAL is not set | ||
| 799 | # CONFIG_THERMAL_HWMON is not set | ||
| 725 | CONFIG_WATCHDOG=y | 800 | CONFIG_WATCHDOG=y |
| 726 | CONFIG_WATCHDOG_NOWAYOUT=y | 801 | CONFIG_WATCHDOG_NOWAYOUT=y |
| 727 | 802 | ||
| @@ -729,11 +804,17 @@ CONFIG_WATCHDOG_NOWAYOUT=y | |||
| 729 | # Watchdog Device Drivers | 804 | # Watchdog Device Drivers |
| 730 | # | 805 | # |
| 731 | # CONFIG_SOFT_WATCHDOG is not set | 806 | # CONFIG_SOFT_WATCHDOG is not set |
| 807 | # CONFIG_OMAP_WATCHDOG is not set | ||
| 732 | 808 | ||
| 733 | # | 809 | # |
| 734 | # Sonics Silicon Backplane | 810 | # USB-based Watchdog Cards |
| 735 | # | 811 | # |
| 812 | # CONFIG_USBPCWATCHDOG is not set | ||
| 736 | CONFIG_SSB_POSSIBLE=y | 813 | CONFIG_SSB_POSSIBLE=y |
| 814 | |||
| 815 | # | ||
| 816 | # Sonics Silicon Backplane | ||
| 817 | # | ||
| 737 | # CONFIG_SSB is not set | 818 | # CONFIG_SSB is not set |
| 738 | 819 | ||
| 739 | # | 820 | # |
| @@ -741,12 +822,19 @@ CONFIG_SSB_POSSIBLE=y | |||
| 741 | # | 822 | # |
| 742 | # CONFIG_MFD_CORE is not set | 823 | # CONFIG_MFD_CORE is not set |
| 743 | # CONFIG_MFD_SM501 is not set | 824 | # CONFIG_MFD_SM501 is not set |
| 825 | # CONFIG_MFD_ASIC3 is not set | ||
| 744 | # CONFIG_HTC_EGPIO is not set | 826 | # CONFIG_HTC_EGPIO is not set |
| 745 | # CONFIG_HTC_PASIC3 is not set | 827 | # CONFIG_HTC_PASIC3 is not set |
| 828 | # CONFIG_TPS65010 is not set | ||
| 829 | CONFIG_TWL4030_CORE=y | ||
| 746 | # CONFIG_MFD_TMIO is not set | 830 | # CONFIG_MFD_TMIO is not set |
| 747 | # CONFIG_MFD_T7L66XB is not set | 831 | # CONFIG_MFD_T7L66XB is not set |
| 748 | # CONFIG_MFD_TC6387XB is not set | 832 | # CONFIG_MFD_TC6387XB is not set |
| 749 | # CONFIG_MFD_TC6393XB is not set | 833 | # CONFIG_MFD_TC6393XB is not set |
| 834 | # CONFIG_PMIC_DA903X is not set | ||
| 835 | # CONFIG_MFD_WM8400 is not set | ||
| 836 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 837 | # CONFIG_MFD_PCF50633 is not set | ||
| 750 | 838 | ||
| 751 | # | 839 | # |
| 752 | # Multimedia devices | 840 | # Multimedia devices |
| @@ -756,12 +844,14 @@ CONFIG_SSB_POSSIBLE=y | |||
| 756 | # Multimedia core support | 844 | # Multimedia core support |
| 757 | # | 845 | # |
| 758 | # CONFIG_VIDEO_DEV is not set | 846 | # CONFIG_VIDEO_DEV is not set |
| 847 | # CONFIG_DVB_CORE is not set | ||
| 759 | # CONFIG_VIDEO_MEDIA is not set | 848 | # CONFIG_VIDEO_MEDIA is not set |
| 760 | 849 | ||
| 761 | # | 850 | # |
| 762 | # Multimedia drivers | 851 | # Multimedia drivers |
| 763 | # | 852 | # |
| 764 | CONFIG_DAB=y | 853 | CONFIG_DAB=y |
| 854 | # CONFIG_USB_DABUSB is not set | ||
| 765 | 855 | ||
| 766 | # | 856 | # |
| 767 | # Graphics support | 857 | # Graphics support |
| @@ -782,10 +872,12 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m | |||
| 782 | # CONFIG_VGA_CONSOLE is not set | 872 | # CONFIG_VGA_CONSOLE is not set |
| 783 | CONFIG_DUMMY_CONSOLE=y | 873 | CONFIG_DUMMY_CONSOLE=y |
| 784 | CONFIG_SOUND=y | 874 | CONFIG_SOUND=y |
| 875 | # CONFIG_SOUND_OSS_CORE is not set | ||
| 785 | CONFIG_SND=y | 876 | CONFIG_SND=y |
| 786 | # CONFIG_SND_SEQUENCER is not set | 877 | # CONFIG_SND_SEQUENCER is not set |
| 787 | # CONFIG_SND_MIXER_OSS is not set | 878 | # CONFIG_SND_MIXER_OSS is not set |
| 788 | # CONFIG_SND_PCM_OSS is not set | 879 | # CONFIG_SND_PCM_OSS is not set |
| 880 | # CONFIG_SND_HRTIMER is not set | ||
| 789 | # CONFIG_SND_DYNAMIC_MINORS is not set | 881 | # CONFIG_SND_DYNAMIC_MINORS is not set |
| 790 | CONFIG_SND_SUPPORT_OLD_API=y | 882 | CONFIG_SND_SUPPORT_OLD_API=y |
| 791 | CONFIG_SND_VERBOSE_PROCFS=y | 883 | CONFIG_SND_VERBOSE_PROCFS=y |
| @@ -798,19 +890,197 @@ CONFIG_SND_DRIVERS=y | |||
| 798 | # CONFIG_SND_MPU401 is not set | 890 | # CONFIG_SND_MPU401 is not set |
| 799 | CONFIG_SND_ARM=y | 891 | CONFIG_SND_ARM=y |
| 800 | CONFIG_SND_SPI=y | 892 | CONFIG_SND_SPI=y |
| 893 | CONFIG_SND_USB=y | ||
| 894 | # CONFIG_SND_USB_AUDIO is not set | ||
| 895 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 801 | # CONFIG_SND_SOC is not set | 896 | # CONFIG_SND_SOC is not set |
| 802 | # CONFIG_SOUND_PRIME is not set | 897 | # CONFIG_SOUND_PRIME is not set |
| 803 | CONFIG_HID_SUPPORT=y | 898 | CONFIG_HID_SUPPORT=y |
| 804 | CONFIG_HID=y | 899 | CONFIG_HID=y |
| 805 | # CONFIG_HID_DEBUG is not set | 900 | # CONFIG_HID_DEBUG is not set |
| 806 | # CONFIG_HIDRAW is not set | 901 | # CONFIG_HIDRAW is not set |
| 807 | # CONFIG_USB_SUPPORT is not set | 902 | |
| 903 | # | ||
| 904 | # USB Input Devices | ||
| 905 | # | ||
| 906 | CONFIG_USB_HID=y | ||
| 907 | # CONFIG_HID_PID is not set | ||
| 908 | # CONFIG_USB_HIDDEV is not set | ||
| 909 | |||
| 910 | # | ||
| 911 | # Special HID drivers | ||
| 912 | # | ||
| 913 | # CONFIG_HID_A4TECH is not set | ||
| 914 | # CONFIG_HID_APPLE is not set | ||
| 915 | # CONFIG_HID_BELKIN is not set | ||
| 916 | # CONFIG_HID_CHERRY is not set | ||
| 917 | # CONFIG_HID_CHICONY is not set | ||
| 918 | # CONFIG_HID_CYPRESS is not set | ||
| 919 | # CONFIG_DRAGONRISE_FF is not set | ||
| 920 | # CONFIG_HID_EZKEY is not set | ||
| 921 | # CONFIG_HID_KYE is not set | ||
| 922 | # CONFIG_HID_GYRATION is not set | ||
| 923 | # CONFIG_HID_KENSINGTON is not set | ||
| 924 | # CONFIG_HID_LOGITECH is not set | ||
| 925 | # CONFIG_HID_MICROSOFT is not set | ||
| 926 | # CONFIG_HID_MONTEREY is not set | ||
| 927 | # CONFIG_HID_NTRIG is not set | ||
| 928 | # CONFIG_HID_PANTHERLORD is not set | ||
| 929 | # CONFIG_HID_PETALYNX is not set | ||
| 930 | # CONFIG_HID_SAMSUNG is not set | ||
| 931 | # CONFIG_HID_SONY is not set | ||
| 932 | # CONFIG_HID_SUNPLUS is not set | ||
| 933 | # CONFIG_GREENASIA_FF is not set | ||
| 934 | # CONFIG_HID_TOPSEED is not set | ||
| 935 | # CONFIG_THRUSTMASTER_FF is not set | ||
| 936 | # CONFIG_ZEROPLUS_FF is not set | ||
| 937 | CONFIG_USB_SUPPORT=y | ||
| 938 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 939 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 940 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 941 | CONFIG_USB=y | ||
| 942 | CONFIG_USB_DEBUG=y | ||
| 943 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 944 | |||
| 945 | # | ||
| 946 | # Miscellaneous USB options | ||
| 947 | # | ||
| 948 | # CONFIG_USB_DEVICEFS is not set | ||
| 949 | CONFIG_USB_DEVICE_CLASS=y | ||
| 950 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 951 | CONFIG_USB_SUSPEND=y | ||
| 952 | CONFIG_USB_OTG=y | ||
| 953 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 954 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 955 | CONFIG_USB_MON=y | ||
| 956 | # CONFIG_USB_WUSB is not set | ||
| 957 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 958 | |||
| 959 | # | ||
| 960 | # USB Host Controller Drivers | ||
| 961 | # | ||
| 962 | # CONFIG_USB_C67X00_HCD is not set | ||
| 963 | # CONFIG_USB_EHCI_HCD is not set | ||
| 964 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 965 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 966 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 967 | # CONFIG_USB_OHCI_HCD is not set | ||
| 968 | # CONFIG_USB_SL811_HCD is not set | ||
| 969 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 970 | # CONFIG_USB_HWA_HCD is not set | ||
| 971 | CONFIG_USB_MUSB_HDRC=y | ||
| 972 | CONFIG_USB_MUSB_SOC=y | ||
| 973 | |||
| 974 | # | ||
| 975 | # OMAP 343x high speed USB support | ||
| 976 | # | ||
| 977 | # CONFIG_USB_MUSB_HOST is not set | ||
| 978 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 979 | CONFIG_USB_MUSB_OTG=y | ||
| 980 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 981 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 982 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 983 | CONFIG_USB_INVENTRA_DMA=y | ||
| 984 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 985 | CONFIG_USB_MUSB_DEBUG=y | ||
| 986 | |||
| 987 | # | ||
| 988 | # USB Device Class drivers | ||
| 989 | # | ||
| 990 | # CONFIG_USB_ACM is not set | ||
| 991 | # CONFIG_USB_PRINTER is not set | ||
| 992 | # CONFIG_USB_WDM is not set | ||
| 993 | # CONFIG_USB_TMC is not set | ||
| 994 | |||
| 995 | # | ||
| 996 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 997 | # | ||
| 998 | |||
| 999 | # | ||
| 1000 | # also be needed; see USB_STORAGE Help for more info | ||
| 1001 | # | ||
| 1002 | # CONFIG_USB_STORAGE is not set | ||
| 1003 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1004 | |||
| 1005 | # | ||
| 1006 | # USB Imaging devices | ||
| 1007 | # | ||
| 1008 | # CONFIG_USB_MDC800 is not set | ||
| 1009 | # CONFIG_USB_MICROTEK is not set | ||
| 1010 | |||
| 1011 | # | ||
| 1012 | # USB port drivers | ||
| 1013 | # | ||
| 1014 | # CONFIG_USB_SERIAL is not set | ||
| 1015 | |||
| 1016 | # | ||
| 1017 | # USB Miscellaneous drivers | ||
| 1018 | # | ||
| 1019 | # CONFIG_USB_EMI62 is not set | ||
| 1020 | # CONFIG_USB_EMI26 is not set | ||
| 1021 | # CONFIG_USB_ADUTUX is not set | ||
| 1022 | # CONFIG_USB_SEVSEG is not set | ||
| 1023 | # CONFIG_USB_RIO500 is not set | ||
| 1024 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1025 | # CONFIG_USB_LCD is not set | ||
| 1026 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1027 | # CONFIG_USB_LED is not set | ||
| 1028 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1029 | # CONFIG_USB_CYTHERM is not set | ||
| 1030 | # CONFIG_USB_IDMOUSE is not set | ||
| 1031 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1032 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1033 | # CONFIG_USB_LD is not set | ||
| 1034 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1035 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1036 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1037 | # CONFIG_USB_VST is not set | ||
| 1038 | CONFIG_USB_GADGET=y | ||
| 1039 | CONFIG_USB_GADGET_DEBUG=y | ||
| 1040 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
| 1041 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 1042 | CONFIG_USB_GADGET_SELECTED=y | ||
| 1043 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 1044 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 1045 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 1046 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 1047 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 1048 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 1049 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 1050 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 1051 | # CONFIG_USB_GADGET_IMX is not set | ||
| 1052 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 1053 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 1054 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 1055 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 1056 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 1057 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 1058 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 1059 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 1060 | CONFIG_USB_ZERO=y | ||
| 1061 | # CONFIG_USB_ZERO_HNPTEST is not set | ||
| 1062 | # CONFIG_USB_ETH is not set | ||
| 1063 | # CONFIG_USB_GADGETFS is not set | ||
| 1064 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 1065 | # CONFIG_USB_G_SERIAL is not set | ||
| 1066 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 1067 | # CONFIG_USB_G_PRINTER is not set | ||
| 1068 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 1069 | |||
| 1070 | # | ||
| 1071 | # OTG and related infrastructure | ||
| 1072 | # | ||
| 1073 | CONFIG_USB_OTG_UTILS=y | ||
| 1074 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1075 | # CONFIG_ISP1301_OMAP is not set | ||
| 1076 | CONFIG_TWL4030_USB=y | ||
| 1077 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 808 | CONFIG_MMC=y | 1078 | CONFIG_MMC=y |
| 809 | # CONFIG_MMC_DEBUG is not set | 1079 | # CONFIG_MMC_DEBUG is not set |
| 810 | # CONFIG_MMC_UNSAFE_RESUME is not set | 1080 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| 811 | 1081 | ||
| 812 | # | 1082 | # |
| 813 | # MMC/SD Card Drivers | 1083 | # MMC/SD/SDIO Card Drivers |
| 814 | # | 1084 | # |
| 815 | CONFIG_MMC_BLOCK=y | 1085 | CONFIG_MMC_BLOCK=y |
| 816 | CONFIG_MMC_BLOCK_BOUNCE=y | 1086 | CONFIG_MMC_BLOCK_BOUNCE=y |
| @@ -818,11 +1088,13 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
| 818 | # CONFIG_MMC_TEST is not set | 1088 | # CONFIG_MMC_TEST is not set |
| 819 | 1089 | ||
| 820 | # | 1090 | # |
| 821 | # MMC/SD Host Controller Drivers | 1091 | # MMC/SD/SDIO Host Controller Drivers |
| 822 | # | 1092 | # |
| 823 | # CONFIG_MMC_SDHCI is not set | 1093 | # CONFIG_MMC_SDHCI is not set |
| 824 | # CONFIG_MMC_OMAP is not set | 1094 | CONFIG_MMC_OMAP_HS=y |
| 825 | # CONFIG_MMC_SPI is not set | 1095 | # CONFIG_MMC_SPI is not set |
| 1096 | # CONFIG_MEMSTICK is not set | ||
| 1097 | # CONFIG_ACCESSIBILITY is not set | ||
| 826 | # CONFIG_NEW_LEDS is not set | 1098 | # CONFIG_NEW_LEDS is not set |
| 827 | CONFIG_RTC_LIB=y | 1099 | CONFIG_RTC_LIB=y |
| 828 | CONFIG_RTC_CLASS=y | 1100 | CONFIG_RTC_CLASS=y |
| @@ -852,43 +1124,55 @@ CONFIG_RTC_INTF_DEV=y | |||
| 852 | # CONFIG_RTC_DRV_PCF8563 is not set | 1124 | # CONFIG_RTC_DRV_PCF8563 is not set |
| 853 | # CONFIG_RTC_DRV_PCF8583 is not set | 1125 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 854 | # CONFIG_RTC_DRV_M41T80 is not set | 1126 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1127 | # CONFIG_RTC_DRV_TWL4030 is not set | ||
| 855 | # CONFIG_RTC_DRV_S35390A is not set | 1128 | # CONFIG_RTC_DRV_S35390A is not set |
| 856 | # CONFIG_RTC_DRV_FM3130 is not set | 1129 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1130 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 857 | 1131 | ||
| 858 | # | 1132 | # |
| 859 | # SPI RTC drivers | 1133 | # SPI RTC drivers |
| 860 | # | 1134 | # |
| 861 | # CONFIG_RTC_DRV_M41T94 is not set | 1135 | # CONFIG_RTC_DRV_M41T94 is not set |
| 862 | # CONFIG_RTC_DRV_DS1305 is not set | 1136 | # CONFIG_RTC_DRV_DS1305 is not set |
| 1137 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 863 | # CONFIG_RTC_DRV_MAX6902 is not set | 1138 | # CONFIG_RTC_DRV_MAX6902 is not set |
| 864 | # CONFIG_RTC_DRV_R9701 is not set | 1139 | # CONFIG_RTC_DRV_R9701 is not set |
| 865 | # CONFIG_RTC_DRV_RS5C348 is not set | 1140 | # CONFIG_RTC_DRV_RS5C348 is not set |
| 1141 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 866 | 1142 | ||
| 867 | # | 1143 | # |
| 868 | # Platform RTC drivers | 1144 | # Platform RTC drivers |
| 869 | # | 1145 | # |
| 870 | # CONFIG_RTC_DRV_CMOS is not set | 1146 | # CONFIG_RTC_DRV_CMOS is not set |
| 1147 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 871 | # CONFIG_RTC_DRV_DS1511 is not set | 1148 | # CONFIG_RTC_DRV_DS1511 is not set |
| 872 | # CONFIG_RTC_DRV_DS1553 is not set | 1149 | # CONFIG_RTC_DRV_DS1553 is not set |
| 873 | # CONFIG_RTC_DRV_DS1742 is not set | 1150 | # CONFIG_RTC_DRV_DS1742 is not set |
| 874 | # CONFIG_RTC_DRV_STK17TA8 is not set | 1151 | # CONFIG_RTC_DRV_STK17TA8 is not set |
| 875 | # CONFIG_RTC_DRV_M48T86 is not set | 1152 | # CONFIG_RTC_DRV_M48T86 is not set |
| 1153 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 876 | # CONFIG_RTC_DRV_M48T59 is not set | 1154 | # CONFIG_RTC_DRV_M48T59 is not set |
| 1155 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 877 | # CONFIG_RTC_DRV_V3020 is not set | 1156 | # CONFIG_RTC_DRV_V3020 is not set |
| 878 | 1157 | ||
| 879 | # | 1158 | # |
| 880 | # on-CPU RTC drivers | 1159 | # on-CPU RTC drivers |
| 881 | # | 1160 | # |
| 882 | # CONFIG_DMADEVICES is not set | 1161 | # CONFIG_DMADEVICES is not set |
| 883 | 1162 | # CONFIG_AUXDISPLAY is not set | |
| 884 | # | 1163 | CONFIG_REGULATOR=y |
| 885 | # Voltage and Current regulators | 1164 | # CONFIG_REGULATOR_DEBUG is not set |
| 886 | # | ||
| 887 | # CONFIG_REGULATOR is not set | ||
| 888 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | 1165 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set |
| 889 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | 1166 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set |
| 890 | # CONFIG_REGULATOR_BQ24022 is not set | 1167 | # CONFIG_REGULATOR_BQ24022 is not set |
| 1168 | CONFIG_REGULATOR_TWL4030=y | ||
| 891 | # CONFIG_UIO is not set | 1169 | # CONFIG_UIO is not set |
| 1170 | # CONFIG_STAGING is not set | ||
| 1171 | |||
| 1172 | # | ||
| 1173 | # CBUS support | ||
| 1174 | # | ||
| 1175 | # CONFIG_CBUS is not set | ||
| 892 | 1176 | ||
| 893 | # | 1177 | # |
| 894 | # File systems | 1178 | # File systems |
| @@ -897,18 +1181,24 @@ CONFIG_EXT2_FS=y | |||
| 897 | # CONFIG_EXT2_FS_XATTR is not set | 1181 | # CONFIG_EXT2_FS_XATTR is not set |
| 898 | # CONFIG_EXT2_FS_XIP is not set | 1182 | # CONFIG_EXT2_FS_XIP is not set |
| 899 | CONFIG_EXT3_FS=y | 1183 | CONFIG_EXT3_FS=y |
| 1184 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 900 | # CONFIG_EXT3_FS_XATTR is not set | 1185 | # CONFIG_EXT3_FS_XATTR is not set |
| 901 | # CONFIG_EXT4DEV_FS is not set | 1186 | # CONFIG_EXT4_FS is not set |
| 902 | CONFIG_JBD=y | 1187 | CONFIG_JBD=y |
| 903 | # CONFIG_REISERFS_FS is not set | 1188 | # CONFIG_REISERFS_FS is not set |
| 904 | # CONFIG_JFS_FS is not set | 1189 | # CONFIG_JFS_FS is not set |
| 905 | # CONFIG_FS_POSIX_ACL is not set | 1190 | CONFIG_FS_POSIX_ACL=y |
| 1191 | CONFIG_FILE_LOCKING=y | ||
| 906 | # CONFIG_XFS_FS is not set | 1192 | # CONFIG_XFS_FS is not set |
| 1193 | # CONFIG_OCFS2_FS is not set | ||
| 1194 | # CONFIG_BTRFS_FS is not set | ||
| 907 | CONFIG_DNOTIFY=y | 1195 | CONFIG_DNOTIFY=y |
| 908 | CONFIG_INOTIFY=y | 1196 | CONFIG_INOTIFY=y |
| 909 | CONFIG_INOTIFY_USER=y | 1197 | CONFIG_INOTIFY_USER=y |
| 910 | CONFIG_QUOTA=y | 1198 | CONFIG_QUOTA=y |
| 1199 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 911 | CONFIG_PRINT_QUOTA_WARNING=y | 1200 | CONFIG_PRINT_QUOTA_WARNING=y |
| 1201 | CONFIG_QUOTA_TREE=y | ||
| 912 | # CONFIG_QFMT_V1 is not set | 1202 | # CONFIG_QFMT_V1 is not set |
| 913 | CONFIG_QFMT_V2=y | 1203 | CONFIG_QFMT_V2=y |
| 914 | CONFIG_QUOTACTL=y | 1204 | CONFIG_QUOTACTL=y |
| @@ -917,6 +1207,11 @@ CONFIG_QUOTACTL=y | |||
| 917 | # CONFIG_FUSE_FS is not set | 1207 | # CONFIG_FUSE_FS is not set |
| 918 | 1208 | ||
| 919 | # | 1209 | # |
| 1210 | # Caches | ||
| 1211 | # | ||
| 1212 | # CONFIG_FSCACHE is not set | ||
| 1213 | |||
| 1214 | # | ||
| 920 | # CD-ROM/DVD Filesystems | 1215 | # CD-ROM/DVD Filesystems |
| 921 | # | 1216 | # |
| 922 | # CONFIG_ISO9660_FS is not set | 1217 | # CONFIG_ISO9660_FS is not set |
| @@ -937,15 +1232,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |||
| 937 | # | 1232 | # |
| 938 | CONFIG_PROC_FS=y | 1233 | CONFIG_PROC_FS=y |
| 939 | CONFIG_PROC_SYSCTL=y | 1234 | CONFIG_PROC_SYSCTL=y |
| 1235 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 940 | CONFIG_SYSFS=y | 1236 | CONFIG_SYSFS=y |
| 941 | CONFIG_TMPFS=y | 1237 | CONFIG_TMPFS=y |
| 942 | # CONFIG_TMPFS_POSIX_ACL is not set | 1238 | # CONFIG_TMPFS_POSIX_ACL is not set |
| 943 | # CONFIG_HUGETLB_PAGE is not set | 1239 | # CONFIG_HUGETLB_PAGE is not set |
| 944 | # CONFIG_CONFIGFS_FS is not set | 1240 | # CONFIG_CONFIGFS_FS is not set |
| 945 | 1241 | CONFIG_MISC_FILESYSTEMS=y | |
| 946 | # | ||
| 947 | # Miscellaneous filesystems | ||
| 948 | # | ||
| 949 | # CONFIG_ADFS_FS is not set | 1242 | # CONFIG_ADFS_FS is not set |
| 950 | # CONFIG_AFFS_FS is not set | 1243 | # CONFIG_AFFS_FS is not set |
| 951 | # CONFIG_HFS_FS is not set | 1244 | # CONFIG_HFS_FS is not set |
| @@ -954,6 +1247,7 @@ CONFIG_TMPFS=y | |||
| 954 | # CONFIG_BFS_FS is not set | 1247 | # CONFIG_BFS_FS is not set |
| 955 | # CONFIG_EFS_FS is not set | 1248 | # CONFIG_EFS_FS is not set |
| 956 | # CONFIG_CRAMFS is not set | 1249 | # CONFIG_CRAMFS is not set |
| 1250 | # CONFIG_SQUASHFS is not set | ||
| 957 | # CONFIG_VXFS_FS is not set | 1251 | # CONFIG_VXFS_FS is not set |
| 958 | # CONFIG_MINIX_FS is not set | 1252 | # CONFIG_MINIX_FS is not set |
| 959 | # CONFIG_OMFS_FS is not set | 1253 | # CONFIG_OMFS_FS is not set |
| @@ -962,6 +1256,7 @@ CONFIG_TMPFS=y | |||
| 962 | # CONFIG_ROMFS_FS is not set | 1256 | # CONFIG_ROMFS_FS is not set |
| 963 | # CONFIG_SYSV_FS is not set | 1257 | # CONFIG_SYSV_FS is not set |
| 964 | # CONFIG_UFS_FS is not set | 1258 | # CONFIG_UFS_FS is not set |
| 1259 | # CONFIG_NILFS2_FS is not set | ||
| 965 | CONFIG_NETWORK_FILESYSTEMS=y | 1260 | CONFIG_NETWORK_FILESYSTEMS=y |
| 966 | CONFIG_NFS_FS=y | 1261 | CONFIG_NFS_FS=y |
| 967 | CONFIG_NFS_V3=y | 1262 | CONFIG_NFS_V3=y |
| @@ -975,7 +1270,6 @@ CONFIG_NFS_ACL_SUPPORT=y | |||
| 975 | CONFIG_NFS_COMMON=y | 1270 | CONFIG_NFS_COMMON=y |
| 976 | CONFIG_SUNRPC=y | 1271 | CONFIG_SUNRPC=y |
| 977 | CONFIG_SUNRPC_GSS=y | 1272 | CONFIG_SUNRPC_GSS=y |
| 978 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
| 979 | CONFIG_RPCSEC_GSS_KRB5=y | 1273 | CONFIG_RPCSEC_GSS_KRB5=y |
| 980 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1274 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 981 | # CONFIG_SMB_FS is not set | 1275 | # CONFIG_SMB_FS is not set |
| @@ -1045,6 +1339,7 @@ CONFIG_NLS_ISO8859_1=y | |||
| 1045 | # CONFIG_NLS_KOI8_R is not set | 1339 | # CONFIG_NLS_KOI8_R is not set |
| 1046 | # CONFIG_NLS_KOI8_U is not set | 1340 | # CONFIG_NLS_KOI8_U is not set |
| 1047 | # CONFIG_NLS_UTF8 is not set | 1341 | # CONFIG_NLS_UTF8 is not set |
| 1342 | # CONFIG_DLM is not set | ||
| 1048 | 1343 | ||
| 1049 | # | 1344 | # |
| 1050 | # Kernel hacking | 1345 | # Kernel hacking |
| @@ -1062,6 +1357,9 @@ CONFIG_DEBUG_KERNEL=y | |||
| 1062 | CONFIG_DETECT_SOFTLOCKUP=y | 1357 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1063 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1358 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1064 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1359 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| 1360 | CONFIG_DETECT_HUNG_TASK=y | ||
| 1361 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 1362 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 1065 | CONFIG_SCHED_DEBUG=y | 1363 | CONFIG_SCHED_DEBUG=y |
| 1066 | # CONFIG_SCHEDSTATS is not set | 1364 | # CONFIG_SCHEDSTATS is not set |
| 1067 | # CONFIG_TIMER_STATS is not set | 1365 | # CONFIG_TIMER_STATS is not set |
| @@ -1084,21 +1382,36 @@ CONFIG_DEBUG_INFO=y | |||
| 1084 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1382 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 1085 | # CONFIG_DEBUG_LIST is not set | 1383 | # CONFIG_DEBUG_LIST is not set |
| 1086 | # CONFIG_DEBUG_SG is not set | 1384 | # CONFIG_DEBUG_SG is not set |
| 1087 | CONFIG_FRAME_POINTER=y | 1385 | # CONFIG_DEBUG_NOTIFIERS is not set |
| 1088 | # CONFIG_BOOT_PRINTK_DELAY is not set | 1386 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 1089 | # CONFIG_RCU_TORTURE_TEST is not set | 1387 | # CONFIG_RCU_TORTURE_TEST is not set |
| 1388 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1090 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1389 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1390 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 1091 | # CONFIG_FAULT_INJECTION is not set | 1391 | # CONFIG_FAULT_INJECTION is not set |
| 1092 | # CONFIG_LATENCYTOP is not set | 1392 | # CONFIG_LATENCYTOP is not set |
| 1093 | CONFIG_HAVE_FTRACE=y | 1393 | # CONFIG_PAGE_POISONING is not set |
| 1094 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1394 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1095 | # CONFIG_FTRACE is not set | 1395 | CONFIG_TRACING_SUPPORT=y |
| 1396 | |||
| 1397 | # | ||
| 1398 | # Tracers | ||
| 1399 | # | ||
| 1400 | # CONFIG_FUNCTION_TRACER is not set | ||
| 1096 | # CONFIG_IRQSOFF_TRACER is not set | 1401 | # CONFIG_IRQSOFF_TRACER is not set |
| 1097 | # CONFIG_SCHED_TRACER is not set | 1402 | # CONFIG_SCHED_TRACER is not set |
| 1098 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 1403 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
| 1404 | # CONFIG_EVENT_TRACER is not set | ||
| 1405 | # CONFIG_BOOT_TRACER is not set | ||
| 1406 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 1407 | # CONFIG_STACK_TRACER is not set | ||
| 1408 | # CONFIG_KMEMTRACE is not set | ||
| 1409 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 1410 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 1099 | # CONFIG_SAMPLES is not set | 1411 | # CONFIG_SAMPLES is not set |
| 1100 | CONFIG_HAVE_ARCH_KGDB=y | 1412 | CONFIG_HAVE_ARCH_KGDB=y |
| 1101 | # CONFIG_KGDB is not set | 1413 | # CONFIG_KGDB is not set |
| 1414 | CONFIG_ARM_UNWIND=y | ||
| 1102 | # CONFIG_DEBUG_USER is not set | 1415 | # CONFIG_DEBUG_USER is not set |
| 1103 | # CONFIG_DEBUG_ERRORS is not set | 1416 | # CONFIG_DEBUG_ERRORS is not set |
| 1104 | # CONFIG_DEBUG_STACK_USAGE is not set | 1417 | # CONFIG_DEBUG_STACK_USAGE is not set |
| @@ -1110,17 +1423,28 @@ CONFIG_DEBUG_LL=y | |||
| 1110 | # | 1423 | # |
| 1111 | # CONFIG_KEYS is not set | 1424 | # CONFIG_KEYS is not set |
| 1112 | # CONFIG_SECURITY is not set | 1425 | # CONFIG_SECURITY is not set |
| 1426 | # CONFIG_SECURITYFS is not set | ||
| 1113 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1427 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
| 1114 | CONFIG_CRYPTO=y | 1428 | CONFIG_CRYPTO=y |
| 1115 | 1429 | ||
| 1116 | # | 1430 | # |
| 1117 | # Crypto core or helper | 1431 | # Crypto core or helper |
| 1118 | # | 1432 | # |
| 1433 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1119 | CONFIG_CRYPTO_ALGAPI=y | 1434 | CONFIG_CRYPTO_ALGAPI=y |
| 1435 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1436 | CONFIG_CRYPTO_AEAD2=y | ||
| 1120 | CONFIG_CRYPTO_BLKCIPHER=y | 1437 | CONFIG_CRYPTO_BLKCIPHER=y |
| 1438 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1439 | CONFIG_CRYPTO_HASH=y | ||
| 1440 | CONFIG_CRYPTO_HASH2=y | ||
| 1441 | CONFIG_CRYPTO_RNG2=y | ||
| 1442 | CONFIG_CRYPTO_PCOMP=y | ||
| 1121 | CONFIG_CRYPTO_MANAGER=y | 1443 | CONFIG_CRYPTO_MANAGER=y |
| 1444 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1122 | # CONFIG_CRYPTO_GF128MUL is not set | 1445 | # CONFIG_CRYPTO_GF128MUL is not set |
| 1123 | # CONFIG_CRYPTO_NULL is not set | 1446 | # CONFIG_CRYPTO_NULL is not set |
| 1447 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1124 | # CONFIG_CRYPTO_CRYPTD is not set | 1448 | # CONFIG_CRYPTO_CRYPTD is not set |
| 1125 | # CONFIG_CRYPTO_AUTHENC is not set | 1449 | # CONFIG_CRYPTO_AUTHENC is not set |
| 1126 | # CONFIG_CRYPTO_TEST is not set | 1450 | # CONFIG_CRYPTO_TEST is not set |
| @@ -1152,7 +1476,7 @@ CONFIG_CRYPTO_PCBC=m | |||
| 1152 | # | 1476 | # |
| 1153 | # Digest | 1477 | # Digest |
| 1154 | # | 1478 | # |
| 1155 | # CONFIG_CRYPTO_CRC32C is not set | 1479 | CONFIG_CRYPTO_CRC32C=y |
| 1156 | # CONFIG_CRYPTO_MD4 is not set | 1480 | # CONFIG_CRYPTO_MD4 is not set |
| 1157 | CONFIG_CRYPTO_MD5=y | 1481 | CONFIG_CRYPTO_MD5=y |
| 1158 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1482 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| @@ -1189,15 +1513,21 @@ CONFIG_CRYPTO_DES=y | |||
| 1189 | # Compression | 1513 | # Compression |
| 1190 | # | 1514 | # |
| 1191 | # CONFIG_CRYPTO_DEFLATE is not set | 1515 | # CONFIG_CRYPTO_DEFLATE is not set |
| 1516 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1192 | # CONFIG_CRYPTO_LZO is not set | 1517 | # CONFIG_CRYPTO_LZO is not set |
| 1518 | |||
| 1519 | # | ||
| 1520 | # Random Number Generation | ||
| 1521 | # | ||
| 1522 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1193 | CONFIG_CRYPTO_HW=y | 1523 | CONFIG_CRYPTO_HW=y |
| 1524 | # CONFIG_BINARY_PRINTF is not set | ||
| 1194 | 1525 | ||
| 1195 | # | 1526 | # |
| 1196 | # Library routines | 1527 | # Library routines |
| 1197 | # | 1528 | # |
| 1198 | CONFIG_BITREVERSE=y | 1529 | CONFIG_BITREVERSE=y |
| 1199 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | 1530 | CONFIG_GENERIC_FIND_LAST_BIT=y |
| 1200 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
| 1201 | CONFIG_CRC_CCITT=y | 1531 | CONFIG_CRC_CCITT=y |
| 1202 | # CONFIG_CRC16 is not set | 1532 | # CONFIG_CRC16 is not set |
| 1203 | CONFIG_CRC_T10DIF=y | 1533 | CONFIG_CRC_T10DIF=y |
| @@ -1205,7 +1535,9 @@ CONFIG_CRC_T10DIF=y | |||
| 1205 | CONFIG_CRC32=y | 1535 | CONFIG_CRC32=y |
| 1206 | # CONFIG_CRC7 is not set | 1536 | # CONFIG_CRC7 is not set |
| 1207 | CONFIG_LIBCRC32C=y | 1537 | CONFIG_LIBCRC32C=y |
| 1208 | CONFIG_PLIST=y | 1538 | CONFIG_ZLIB_INFLATE=y |
| 1539 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1209 | CONFIG_HAS_IOMEM=y | 1540 | CONFIG_HAS_IOMEM=y |
| 1210 | CONFIG_HAS_IOPORT=y | 1541 | CONFIG_HAS_IOPORT=y |
| 1211 | CONFIG_HAS_DMA=y | 1542 | CONFIG_HAS_DMA=y |
| 1543 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig index f238df66efd4..e7e31332c62a 100644 --- a/arch/arm/configs/rx51_defconfig +++ b/arch/arm/configs/rx51_defconfig | |||
| @@ -1006,6 +1006,7 @@ CONFIG_WATCHDOG=y | |||
| 1006 | # | 1006 | # |
| 1007 | # CONFIG_SOFT_WATCHDOG is not set | 1007 | # CONFIG_SOFT_WATCHDOG is not set |
| 1008 | CONFIG_OMAP_WATCHDOG=m | 1008 | CONFIG_OMAP_WATCHDOG=m |
| 1009 | CONFIG_TWL4030_WATCHDOG=m | ||
| 1009 | 1010 | ||
| 1010 | # | 1011 | # |
| 1011 | # USB-based Watchdog Cards | 1012 | # USB-based Watchdog Cards |
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index be747f5c6cd8..40866c643f13 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig | |||
| @@ -6,6 +6,9 @@ config AINTC | |||
| 6 | config CP_INTC | 6 | config CP_INTC |
| 7 | bool | 7 | bool |
| 8 | 8 | ||
| 9 | config ARCH_DAVINCI_DMx | ||
| 10 | bool | ||
| 11 | |||
| 9 | menu "TI DaVinci Implementations" | 12 | menu "TI DaVinci Implementations" |
| 10 | 13 | ||
| 11 | comment "DaVinci Core Type" | 14 | comment "DaVinci Core Type" |
| @@ -13,20 +16,41 @@ comment "DaVinci Core Type" | |||
| 13 | config ARCH_DAVINCI_DM644x | 16 | config ARCH_DAVINCI_DM644x |
| 14 | bool "DaVinci 644x based system" | 17 | bool "DaVinci 644x based system" |
| 15 | select AINTC | 18 | select AINTC |
| 19 | select ARCH_DAVINCI_DMx | ||
| 16 | 20 | ||
| 17 | config ARCH_DAVINCI_DM355 | 21 | config ARCH_DAVINCI_DM355 |
| 18 | bool "DaVinci 355 based system" | 22 | bool "DaVinci 355 based system" |
| 19 | select AINTC | 23 | select AINTC |
| 24 | select ARCH_DAVINCI_DMx | ||
| 20 | 25 | ||
| 21 | config ARCH_DAVINCI_DM646x | 26 | config ARCH_DAVINCI_DM646x |
| 22 | bool "DaVinci 646x based system" | 27 | bool "DaVinci 646x based system" |
| 23 | select AINTC | 28 | select AINTC |
| 29 | select ARCH_DAVINCI_DMx | ||
| 30 | |||
| 31 | config ARCH_DAVINCI_DA830 | ||
| 32 | bool "DA830/OMAP-L137 based system" | ||
| 33 | select CP_INTC | ||
| 34 | select ARCH_DAVINCI_DA8XX | ||
| 35 | |||
| 36 | config ARCH_DAVINCI_DA850 | ||
| 37 | bool "DA850/OMAP-L138 based system" | ||
| 38 | select CP_INTC | ||
| 39 | select ARCH_DAVINCI_DA8XX | ||
| 40 | |||
| 41 | config ARCH_DAVINCI_DA8XX | ||
| 42 | bool | ||
| 43 | |||
| 44 | config ARCH_DAVINCI_DM365 | ||
| 45 | bool "DaVinci 365 based system" | ||
| 46 | select AINTC | ||
| 47 | select ARCH_DAVINCI_DMx | ||
| 24 | 48 | ||
| 25 | comment "DaVinci Board Type" | 49 | comment "DaVinci Board Type" |
| 26 | 50 | ||
| 27 | config MACH_DAVINCI_EVM | 51 | config MACH_DAVINCI_EVM |
| 28 | bool "TI DM644x EVM" | 52 | bool "TI DM644x EVM" |
| 29 | default y | 53 | default ARCH_DAVINCI_DM644x |
| 30 | depends on ARCH_DAVINCI_DM644x | 54 | depends on ARCH_DAVINCI_DM644x |
| 31 | help | 55 | help |
| 32 | Configure this option to specify the whether the board used | 56 | Configure this option to specify the whether the board used |
| @@ -41,6 +65,7 @@ config MACH_SFFSDR | |||
| 41 | 65 | ||
| 42 | config MACH_DAVINCI_DM355_EVM | 66 | config MACH_DAVINCI_DM355_EVM |
| 43 | bool "TI DM355 EVM" | 67 | bool "TI DM355 EVM" |
| 68 | default ARCH_DAVINCI_DM355 | ||
| 44 | depends on ARCH_DAVINCI_DM355 | 69 | depends on ARCH_DAVINCI_DM355 |
| 45 | help | 70 | help |
| 46 | Configure this option to specify the whether the board used | 71 | Configure this option to specify the whether the board used |
| @@ -55,11 +80,33 @@ config MACH_DM355_LEOPARD | |||
| 55 | 80 | ||
| 56 | config MACH_DAVINCI_DM6467_EVM | 81 | config MACH_DAVINCI_DM6467_EVM |
| 57 | bool "TI DM6467 EVM" | 82 | bool "TI DM6467 EVM" |
| 83 | default ARCH_DAVINCI_DM646x | ||
| 58 | depends on ARCH_DAVINCI_DM646x | 84 | depends on ARCH_DAVINCI_DM646x |
| 59 | help | 85 | help |
| 60 | Configure this option to specify the whether the board used | 86 | Configure this option to specify the whether the board used |
| 61 | for development is a DM6467 EVM | 87 | for development is a DM6467 EVM |
| 62 | 88 | ||
| 89 | config MACH_DAVINCI_DM365_EVM | ||
| 90 | bool "TI DM365 EVM" | ||
| 91 | default ARCH_DAVINCI_DM365 | ||
| 92 | depends on ARCH_DAVINCI_DM365 | ||
| 93 | help | ||
| 94 | Configure this option to specify whether the board used | ||
| 95 | for development is a DM365 EVM | ||
| 96 | |||
| 97 | config MACH_DAVINCI_DA830_EVM | ||
| 98 | bool "TI DA830/OMAP-L137 Reference Platform" | ||
| 99 | default ARCH_DAVINCI_DA830 | ||
| 100 | depends on ARCH_DAVINCI_DA830 | ||
| 101 | help | ||
| 102 | Say Y here to select the TI DA830/OMAP-L137 Evaluation Module. | ||
| 103 | |||
| 104 | config MACH_DAVINCI_DA850_EVM | ||
| 105 | bool "TI DA850/OMAP-L138 Reference Platform" | ||
| 106 | default ARCH_DAVINCI_DA850 | ||
| 107 | depends on ARCH_DAVINCI_DA850 | ||
| 108 | help | ||
| 109 | Say Y here to select the TI DA850/OMAP-L138 Evaluation Module. | ||
| 63 | 110 | ||
| 64 | config DAVINCI_MUX | 111 | config DAVINCI_MUX |
| 65 | bool "DAVINCI multiplexing support" | 112 | bool "DAVINCI multiplexing support" |
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 059ab78084ba..2e11e847313b 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile | |||
| @@ -5,14 +5,17 @@ | |||
| 5 | 5 | ||
| 6 | # Common objects | 6 | # Common objects |
| 7 | obj-y := time.o clock.o serial.o io.o psc.o \ | 7 | obj-y := time.o clock.o serial.o io.o psc.o \ |
| 8 | gpio.o devices.o dma.o usb.o common.o sram.o | 8 | gpio.o dma.o usb.o common.o sram.o |
| 9 | 9 | ||
| 10 | obj-$(CONFIG_DAVINCI_MUX) += mux.o | 10 | obj-$(CONFIG_DAVINCI_MUX) += mux.o |
| 11 | 11 | ||
| 12 | # Chip specific | 12 | # Chip specific |
| 13 | obj-$(CONFIG_ARCH_DAVINCI_DM644x) += dm644x.o | 13 | obj-$(CONFIG_ARCH_DAVINCI_DM644x) += dm644x.o devices.o |
| 14 | obj-$(CONFIG_ARCH_DAVINCI_DM355) += dm355.o | 14 | obj-$(CONFIG_ARCH_DAVINCI_DM355) += dm355.o devices.o |
| 15 | obj-$(CONFIG_ARCH_DAVINCI_DM646x) += dm646x.o | 15 | obj-$(CONFIG_ARCH_DAVINCI_DM646x) += dm646x.o devices.o |
| 16 | obj-$(CONFIG_ARCH_DAVINCI_DM365) += dm365.o devices.o | ||
| 17 | obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o | ||
| 18 | obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o | ||
| 16 | 19 | ||
| 17 | obj-$(CONFIG_AINTC) += irq.o | 20 | obj-$(CONFIG_AINTC) += irq.o |
| 18 | obj-$(CONFIG_CP_INTC) += cp_intc.o | 21 | obj-$(CONFIG_CP_INTC) += cp_intc.o |
| @@ -23,3 +26,6 @@ obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o | |||
| 23 | obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o | 26 | obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o |
| 24 | obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o | 27 | obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o |
| 25 | obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o | 28 | obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o |
| 29 | obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o | ||
| 30 | obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o | ||
| 31 | obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o | ||
diff --git a/arch/arm/mach-davinci/Makefile.boot b/arch/arm/mach-davinci/Makefile.boot index e1dd366f836b..db97ef2c6477 100644 --- a/arch/arm/mach-davinci/Makefile.boot +++ b/arch/arm/mach-davinci/Makefile.boot | |||
| @@ -1,3 +1,13 @@ | |||
| 1 | ifeq ($(CONFIG_ARCH_DAVINCI_DA8XX),y) | ||
| 2 | ifeq ($(CONFIG_ARCH_DAVINCI_DMx),y) | ||
| 3 | $(error Cannot enable DaVinci and DA8XX platforms concurrently) | ||
| 4 | else | ||
| 5 | zreladdr-y := 0xc0008000 | ||
| 6 | params_phys-y := 0xc0000100 | ||
| 7 | initrd_phys-y := 0xc0800000 | ||
| 8 | endif | ||
| 9 | else | ||
| 1 | zreladdr-y := 0x80008000 | 10 | zreladdr-y := 0x80008000 |
| 2 | params_phys-y := 0x80000100 | 11 | params_phys-y := 0x80000100 |
| 3 | initrd_phys-y := 0x80800000 | 12 | initrd_phys-y := 0x80800000 |
| 13 | endif | ||
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c new file mode 100644 index 000000000000..bfbb63936f33 --- /dev/null +++ b/arch/arm/mach-davinci/board-da830-evm.c | |||
| @@ -0,0 +1,157 @@ | |||
| 1 | /* | ||
| 2 | * TI DA830/OMAP L137 EVM board | ||
| 3 | * | ||
| 4 | * Author: Mark A. Greer <mgreer@mvista.com> | ||
| 5 | * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c | ||
| 6 | * | ||
| 7 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | ||
| 8 | * the terms of the GNU General Public License version 2. This program | ||
| 9 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 10 | * or implied. | ||
| 11 | */ | ||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/console.h> | ||
| 16 | #include <linux/i2c.h> | ||
| 17 | #include <linux/i2c/at24.h> | ||
| 18 | |||
| 19 | #include <asm/mach-types.h> | ||
| 20 | #include <asm/mach/arch.h> | ||
| 21 | |||
| 22 | #include <mach/common.h> | ||
| 23 | #include <mach/irqs.h> | ||
| 24 | #include <mach/cp_intc.h> | ||
| 25 | #include <mach/da8xx.h> | ||
| 26 | #include <mach/asp.h> | ||
| 27 | |||
| 28 | #define DA830_EVM_PHY_MASK 0x0 | ||
| 29 | #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ | ||
| 30 | |||
| 31 | static struct at24_platform_data da830_evm_i2c_eeprom_info = { | ||
| 32 | .byte_len = SZ_256K / 8, | ||
| 33 | .page_size = 64, | ||
| 34 | .flags = AT24_FLAG_ADDR16, | ||
| 35 | .setup = davinci_get_mac_addr, | ||
| 36 | .context = (void *)0x7f00, | ||
| 37 | }; | ||
| 38 | |||
| 39 | static struct i2c_board_info __initdata da830_evm_i2c_devices[] = { | ||
| 40 | { | ||
| 41 | I2C_BOARD_INFO("24c256", 0x50), | ||
| 42 | .platform_data = &da830_evm_i2c_eeprom_info, | ||
| 43 | }, | ||
| 44 | { | ||
| 45 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | ||
| 46 | } | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = { | ||
| 50 | .bus_freq = 100, /* kHz */ | ||
| 51 | .bus_delay = 0, /* usec */ | ||
| 52 | }; | ||
| 53 | |||
| 54 | static struct davinci_uart_config da830_evm_uart_config __initdata = { | ||
| 55 | .enabled_uarts = 0x7, | ||
| 56 | }; | ||
| 57 | |||
| 58 | static u8 da830_iis_serializer_direction[] = { | ||
| 59 | RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | ||
| 60 | INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, | ||
| 61 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct snd_platform_data da830_evm_snd_data = { | ||
| 65 | .tx_dma_offset = 0x2000, | ||
| 66 | .rx_dma_offset = 0x2000, | ||
| 67 | .op_mode = DAVINCI_MCASP_IIS_MODE, | ||
| 68 | .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), | ||
| 69 | .tdm_slots = 2, | ||
| 70 | .serial_dir = da830_iis_serializer_direction, | ||
| 71 | .eventq_no = EVENTQ_0, | ||
| 72 | .version = MCASP_VERSION_2, | ||
| 73 | .txnumevt = 1, | ||
| 74 | .rxnumevt = 1, | ||
| 75 | }; | ||
| 76 | |||
| 77 | static __init void da830_evm_init(void) | ||
| 78 | { | ||
| 79 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
| 80 | int ret; | ||
| 81 | |||
| 82 | ret = da8xx_register_edma(); | ||
| 83 | if (ret) | ||
| 84 | pr_warning("da830_evm_init: edma registration failed: %d\n", | ||
| 85 | ret); | ||
| 86 | |||
| 87 | ret = da8xx_pinmux_setup(da830_i2c0_pins); | ||
| 88 | if (ret) | ||
| 89 | pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n", | ||
| 90 | ret); | ||
| 91 | |||
| 92 | ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata); | ||
| 93 | if (ret) | ||
| 94 | pr_warning("da830_evm_init: i2c0 registration failed: %d\n", | ||
| 95 | ret); | ||
| 96 | |||
| 97 | soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK; | ||
| 98 | soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY; | ||
| 99 | soc_info->emac_pdata->rmii_en = 1; | ||
| 100 | |||
| 101 | ret = da8xx_pinmux_setup(da830_cpgmac_pins); | ||
| 102 | if (ret) | ||
| 103 | pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n", | ||
| 104 | ret); | ||
| 105 | |||
| 106 | ret = da8xx_register_emac(); | ||
| 107 | if (ret) | ||
| 108 | pr_warning("da830_evm_init: emac registration failed: %d\n", | ||
| 109 | ret); | ||
| 110 | |||
| 111 | ret = da8xx_register_watchdog(); | ||
| 112 | if (ret) | ||
| 113 | pr_warning("da830_evm_init: watchdog registration failed: %d\n", | ||
| 114 | ret); | ||
| 115 | |||
| 116 | davinci_serial_init(&da830_evm_uart_config); | ||
| 117 | i2c_register_board_info(1, da830_evm_i2c_devices, | ||
| 118 | ARRAY_SIZE(da830_evm_i2c_devices)); | ||
| 119 | |||
| 120 | ret = da8xx_pinmux_setup(da830_mcasp1_pins); | ||
| 121 | if (ret) | ||
| 122 | pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", | ||
| 123 | ret); | ||
| 124 | |||
| 125 | da8xx_init_mcasp(1, &da830_evm_snd_data); | ||
| 126 | } | ||
| 127 | |||
| 128 | #ifdef CONFIG_SERIAL_8250_CONSOLE | ||
| 129 | static int __init da830_evm_console_init(void) | ||
| 130 | { | ||
| 131 | return add_preferred_console("ttyS", 2, "115200"); | ||
| 132 | } | ||
| 133 | console_initcall(da830_evm_console_init); | ||
| 134 | #endif | ||
| 135 | |||
| 136 | static __init void da830_evm_irq_init(void) | ||
| 137 | { | ||
| 138 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
| 139 | |||
| 140 | cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ, | ||
| 141 | soc_info->intc_irq_prios); | ||
| 142 | } | ||
| 143 | |||
| 144 | static void __init da830_evm_map_io(void) | ||
| 145 | { | ||
| 146 | da830_init(); | ||
| 147 | } | ||
| 148 | |||
| 149 | MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP L137 EVM") | ||
| 150 | .phys_io = IO_PHYS, | ||
| 151 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | ||
| 152 | .boot_params = (DA8XX_DDR_BASE + 0x100), | ||
| 153 | .map_io = da830_evm_map_io, | ||
| 154 | .init_irq = da830_evm_irq_init, | ||
| 155 | .timer = &davinci_timer, | ||
| 156 | .init_machine = da830_evm_init, | ||
| 157 | MACHINE_END | ||
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c new file mode 100644 index 000000000000..c759d72494e0 --- /dev/null +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
| @@ -0,0 +1,415 @@ | |||
| 1 | /* | ||
| 2 | * TI DA850/OMAP-L138 EVM board | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ | ||
| 5 | * | ||
| 6 | * Derived from: arch/arm/mach-davinci/board-da830-evm.c | ||
| 7 | * Original Copyrights follow: | ||
| 8 | * | ||
| 9 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | ||
| 10 | * the terms of the GNU General Public License version 2. This program | ||
| 11 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 12 | * or implied. | ||
| 13 | */ | ||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/console.h> | ||
| 18 | #include <linux/i2c.h> | ||
| 19 | #include <linux/i2c/at24.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/mtd/mtd.h> | ||
| 23 | #include <linux/mtd/nand.h> | ||
| 24 | #include <linux/mtd/partitions.h> | ||
| 25 | #include <linux/mtd/physmap.h> | ||
| 26 | |||
| 27 | #include <asm/mach-types.h> | ||
| 28 | #include <asm/mach/arch.h> | ||
| 29 | |||
| 30 | #include <mach/common.h> | ||
| 31 | #include <mach/irqs.h> | ||
| 32 | #include <mach/cp_intc.h> | ||
| 33 | #include <mach/da8xx.h> | ||
| 34 | #include <mach/nand.h> | ||
| 35 | |||
| 36 | #define DA850_EVM_PHY_MASK 0x1 | ||
| 37 | #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ | ||
| 38 | |||
| 39 | #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) | ||
| 40 | #define DA850_LCD_PWR_PIN GPIO_TO_PIN(8, 10) | ||
| 41 | |||
| 42 | #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) | ||
| 43 | #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) | ||
| 44 | |||
| 45 | static struct mtd_partition da850_evm_norflash_partition[] = { | ||
| 46 | { | ||
| 47 | .name = "NOR filesystem", | ||
| 48 | .offset = 0, | ||
| 49 | .size = MTDPART_SIZ_FULL, | ||
| 50 | .mask_flags = 0, | ||
| 51 | }, | ||
| 52 | }; | ||
| 53 | |||
| 54 | static struct physmap_flash_data da850_evm_norflash_data = { | ||
| 55 | .width = 2, | ||
| 56 | .parts = da850_evm_norflash_partition, | ||
| 57 | .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), | ||
| 58 | }; | ||
| 59 | |||
| 60 | static struct resource da850_evm_norflash_resource[] = { | ||
| 61 | { | ||
| 62 | .start = DA8XX_AEMIF_CS2_BASE, | ||
| 63 | .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, | ||
| 64 | .flags = IORESOURCE_MEM, | ||
| 65 | }, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct platform_device da850_evm_norflash_device = { | ||
| 69 | .name = "physmap-flash", | ||
| 70 | .id = 0, | ||
| 71 | .dev = { | ||
| 72 | .platform_data = &da850_evm_norflash_data, | ||
| 73 | }, | ||
| 74 | .num_resources = 1, | ||
| 75 | .resource = da850_evm_norflash_resource, | ||
| 76 | }; | ||
| 77 | |||
| 78 | /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash | ||
| 79 | * (128K blocks). It may be used instead of the (default) SPI flash | ||
| 80 | * to boot, using TI's tools to install the secondary boot loader | ||
| 81 | * (UBL) and U-Boot. | ||
| 82 | */ | ||
| 83 | struct mtd_partition da850_evm_nandflash_partition[] = { | ||
| 84 | { | ||
| 85 | .name = "u-boot env", | ||
| 86 | .offset = 0, | ||
| 87 | .size = SZ_128K, | ||
| 88 | .mask_flags = MTD_WRITEABLE, | ||
| 89 | }, | ||
| 90 | { | ||
| 91 | .name = "UBL", | ||
| 92 | .offset = MTDPART_OFS_APPEND, | ||
| 93 | .size = SZ_128K, | ||
| 94 | .mask_flags = MTD_WRITEABLE, | ||
| 95 | }, | ||
| 96 | { | ||
| 97 | .name = "u-boot", | ||
| 98 | .offset = MTDPART_OFS_APPEND, | ||
| 99 | .size = 4 * SZ_128K, | ||
| 100 | .mask_flags = MTD_WRITEABLE, | ||
| 101 | }, | ||
| 102 | { | ||
| 103 | .name = "kernel", | ||
| 104 | .offset = 0x200000, | ||
| 105 | .size = SZ_2M, | ||
| 106 | .mask_flags = 0, | ||
| 107 | }, | ||
| 108 | { | ||
| 109 | .name = "filesystem", | ||
| 110 | .offset = MTDPART_OFS_APPEND, | ||
| 111 | .size = MTDPART_SIZ_FULL, | ||
| 112 | .mask_flags = 0, | ||
| 113 | }, | ||
| 114 | }; | ||
| 115 | |||
| 116 | static struct davinci_nand_pdata da850_evm_nandflash_data = { | ||
| 117 | .parts = da850_evm_nandflash_partition, | ||
| 118 | .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), | ||
| 119 | .ecc_mode = NAND_ECC_HW, | ||
| 120 | .options = NAND_USE_FLASH_BBT, | ||
| 121 | }; | ||
| 122 | |||
| 123 | static struct resource da850_evm_nandflash_resource[] = { | ||
| 124 | { | ||
| 125 | .start = DA8XX_AEMIF_CS3_BASE, | ||
| 126 | .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, | ||
| 127 | .flags = IORESOURCE_MEM, | ||
| 128 | }, | ||
| 129 | { | ||
| 130 | .start = DA8XX_AEMIF_CTL_BASE, | ||
| 131 | .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, | ||
| 132 | .flags = IORESOURCE_MEM, | ||
| 133 | }, | ||
| 134 | }; | ||
| 135 | |||
| 136 | static struct platform_device da850_evm_nandflash_device = { | ||
| 137 | .name = "davinci_nand", | ||
| 138 | .id = 1, | ||
| 139 | .dev = { | ||
| 140 | .platform_data = &da850_evm_nandflash_data, | ||
| 141 | }, | ||
| 142 | .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), | ||
| 143 | .resource = da850_evm_nandflash_resource, | ||
| 144 | }; | ||
| 145 | |||
| 146 | static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { | ||
| 147 | { | ||
| 148 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | ||
| 149 | } | ||
| 150 | }; | ||
| 151 | |||
| 152 | static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { | ||
| 153 | .bus_freq = 100, /* kHz */ | ||
| 154 | .bus_delay = 0, /* usec */ | ||
| 155 | }; | ||
| 156 | |||
| 157 | static struct davinci_uart_config da850_evm_uart_config __initdata = { | ||
| 158 | .enabled_uarts = 0x7, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct platform_device *da850_evm_devices[] __initdata = { | ||
| 162 | &da850_evm_nandflash_device, | ||
| 163 | &da850_evm_norflash_device, | ||
| 164 | }; | ||
| 165 | |||
| 166 | /* davinci da850 evm audio machine driver */ | ||
| 167 | static u8 da850_iis_serializer_direction[] = { | ||
| 168 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | ||
| 169 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | ||
| 170 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, | ||
| 171 | RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | ||
| 172 | }; | ||
| 173 | |||
| 174 | static struct snd_platform_data da850_evm_snd_data = { | ||
| 175 | .tx_dma_offset = 0x2000, | ||
| 176 | .rx_dma_offset = 0x2000, | ||
| 177 | .op_mode = DAVINCI_MCASP_IIS_MODE, | ||
| 178 | .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), | ||
| 179 | .tdm_slots = 2, | ||
| 180 | .serial_dir = da850_iis_serializer_direction, | ||
| 181 | .eventq_no = EVENTQ_1, | ||
| 182 | .version = MCASP_VERSION_2, | ||
| 183 | .txnumevt = 1, | ||
| 184 | .rxnumevt = 1, | ||
| 185 | }; | ||
| 186 | |||
| 187 | static int da850_evm_mmc_get_ro(int index) | ||
| 188 | { | ||
| 189 | return gpio_get_value(DA850_MMCSD_WP_PIN); | ||
| 190 | } | ||
| 191 | |||
| 192 | static int da850_evm_mmc_get_cd(int index) | ||
| 193 | { | ||
| 194 | return !gpio_get_value(DA850_MMCSD_CD_PIN); | ||
| 195 | } | ||
| 196 | |||
| 197 | static struct davinci_mmc_config da850_mmc_config = { | ||
| 198 | .get_ro = da850_evm_mmc_get_ro, | ||
| 199 | .get_cd = da850_evm_mmc_get_cd, | ||
| 200 | .wires = 4, | ||
| 201 | .version = MMC_CTLR_VERSION_2, | ||
| 202 | }; | ||
| 203 | |||
| 204 | static int da850_lcd_hw_init(void) | ||
| 205 | { | ||
| 206 | int status; | ||
| 207 | |||
| 208 | status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n"); | ||
| 209 | if (status < 0) | ||
| 210 | return status; | ||
| 211 | |||
| 212 | status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n"); | ||
| 213 | if (status < 0) { | ||
| 214 | gpio_free(DA850_LCD_BL_PIN); | ||
| 215 | return status; | ||
| 216 | } | ||
| 217 | |||
| 218 | gpio_direction_output(DA850_LCD_BL_PIN, 0); | ||
| 219 | gpio_direction_output(DA850_LCD_PWR_PIN, 0); | ||
| 220 | |||
| 221 | /* disable lcd backlight */ | ||
| 222 | gpio_set_value(DA850_LCD_BL_PIN, 0); | ||
| 223 | |||
| 224 | /* disable lcd power */ | ||
| 225 | gpio_set_value(DA850_LCD_PWR_PIN, 0); | ||
| 226 | |||
| 227 | /* enable lcd power */ | ||
| 228 | gpio_set_value(DA850_LCD_PWR_PIN, 1); | ||
| 229 | |||
| 230 | /* enable lcd backlight */ | ||
| 231 | gpio_set_value(DA850_LCD_BL_PIN, 1); | ||
| 232 | |||
| 233 | return 0; | ||
| 234 | } | ||
| 235 | |||
| 236 | #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 | ||
| 237 | #define DA8XX_AEMIF_ASIZE_16BIT 0x1 | ||
| 238 | |||
| 239 | static void __init da850_evm_init_nor(void) | ||
| 240 | { | ||
| 241 | void __iomem *aemif_addr; | ||
| 242 | |||
| 243 | aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); | ||
| 244 | |||
| 245 | /* Configure data bus width of CS2 to 16 bit */ | ||
| 246 | writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | | ||
| 247 | DA8XX_AEMIF_ASIZE_16BIT, | ||
| 248 | aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); | ||
| 249 | |||
| 250 | iounmap(aemif_addr); | ||
| 251 | } | ||
| 252 | |||
| 253 | #if defined(CONFIG_MTD_PHYSMAP) || \ | ||
| 254 | defined(CONFIG_MTD_PHYSMAP_MODULE) | ||
| 255 | #define HAS_NOR 1 | ||
| 256 | #else | ||
| 257 | #define HAS_NOR 0 | ||
| 258 | #endif | ||
| 259 | |||
| 260 | #if defined(CONFIG_MMC_DAVINCI) || \ | ||
| 261 | defined(CONFIG_MMC_DAVINCI_MODULE) | ||
| 262 | #define HAS_MMC 1 | ||
| 263 | #else | ||
| 264 | #define HAS_MMC 0 | ||
| 265 | #endif | ||
| 266 | |||
| 267 | static __init void da850_evm_init(void) | ||
| 268 | { | ||
| 269 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
| 270 | int ret; | ||
| 271 | |||
| 272 | ret = da8xx_pinmux_setup(da850_nand_pins); | ||
| 273 | if (ret) | ||
| 274 | pr_warning("da850_evm_init: nand mux setup failed: %d\n", | ||
| 275 | ret); | ||
| 276 | |||
| 277 | ret = da8xx_pinmux_setup(da850_nor_pins); | ||
| 278 | if (ret) | ||
| 279 | pr_warning("da850_evm_init: nor mux setup failed: %d\n", | ||
| 280 | ret); | ||
| 281 | |||
| 282 | da850_evm_init_nor(); | ||
| 283 | |||
| 284 | platform_add_devices(da850_evm_devices, | ||
| 285 | ARRAY_SIZE(da850_evm_devices)); | ||
| 286 | |||
| 287 | ret = da8xx_register_edma(); | ||
| 288 | if (ret) | ||
| 289 | pr_warning("da850_evm_init: edma registration failed: %d\n", | ||
| 290 | ret); | ||
| 291 | |||
| 292 | ret = da8xx_pinmux_setup(da850_i2c0_pins); | ||
| 293 | if (ret) | ||
| 294 | pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n", | ||
| 295 | ret); | ||
| 296 | |||
| 297 | ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); | ||
| 298 | if (ret) | ||
| 299 | pr_warning("da850_evm_init: i2c0 registration failed: %d\n", | ||
| 300 | ret); | ||
| 301 | |||
| 302 | soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK; | ||
| 303 | soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY; | ||
| 304 | soc_info->emac_pdata->rmii_en = 0; | ||
| 305 | |||
| 306 | ret = da8xx_pinmux_setup(da850_cpgmac_pins); | ||
| 307 | if (ret) | ||
| 308 | pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n", | ||
| 309 | ret); | ||
| 310 | |||
| 311 | ret = da8xx_register_emac(); | ||
| 312 | if (ret) | ||
| 313 | pr_warning("da850_evm_init: emac registration failed: %d\n", | ||
| 314 | ret); | ||
| 315 | |||
| 316 | ret = da8xx_register_watchdog(); | ||
| 317 | if (ret) | ||
| 318 | pr_warning("da830_evm_init: watchdog registration failed: %d\n", | ||
| 319 | ret); | ||
| 320 | |||
| 321 | if (HAS_MMC) { | ||
| 322 | if (HAS_NOR) | ||
| 323 | pr_warning("WARNING: both NOR Flash and MMC/SD are " | ||
| 324 | "enabled, but they share AEMIF pins.\n" | ||
| 325 | "\tDisable one of them.\n"); | ||
| 326 | |||
| 327 | ret = da8xx_pinmux_setup(da850_mmcsd0_pins); | ||
| 328 | if (ret) | ||
| 329 | pr_warning("da850_evm_init: mmcsd0 mux setup failed:" | ||
| 330 | " %d\n", ret); | ||
| 331 | |||
| 332 | ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n"); | ||
| 333 | if (ret) | ||
| 334 | pr_warning("da850_evm_init: can not open GPIO %d\n", | ||
| 335 | DA850_MMCSD_CD_PIN); | ||
| 336 | gpio_direction_input(DA850_MMCSD_CD_PIN); | ||
| 337 | |||
| 338 | ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n"); | ||
| 339 | if (ret) | ||
| 340 | pr_warning("da850_evm_init: can not open GPIO %d\n", | ||
| 341 | DA850_MMCSD_WP_PIN); | ||
| 342 | gpio_direction_input(DA850_MMCSD_WP_PIN); | ||
| 343 | |||
| 344 | ret = da8xx_register_mmcsd0(&da850_mmc_config); | ||
| 345 | if (ret) | ||
| 346 | pr_warning("da850_evm_init: mmcsd0 registration failed:" | ||
| 347 | " %d\n", ret); | ||
| 348 | } | ||
| 349 | |||
| 350 | davinci_serial_init(&da850_evm_uart_config); | ||
| 351 | |||
| 352 | i2c_register_board_info(1, da850_evm_i2c_devices, | ||
| 353 | ARRAY_SIZE(da850_evm_i2c_devices)); | ||
| 354 | |||
| 355 | /* | ||
| 356 | * shut down uart 0 and 1; they are not used on the board and | ||
| 357 | * accessing them causes endless "too much work in irq53" messages | ||
| 358 | * with arago fs | ||
| 359 | */ | ||
| 360 | __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); | ||
| 361 | __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); | ||
| 362 | |||
| 363 | ret = da8xx_pinmux_setup(da850_mcasp_pins); | ||
| 364 | if (ret) | ||
| 365 | pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", | ||
| 366 | ret); | ||
| 367 | |||
| 368 | da8xx_init_mcasp(0, &da850_evm_snd_data); | ||
| 369 | |||
| 370 | ret = da8xx_pinmux_setup(da850_lcdcntl_pins); | ||
| 371 | if (ret) | ||
| 372 | pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", | ||
| 373 | ret); | ||
| 374 | |||
| 375 | ret = da850_lcd_hw_init(); | ||
| 376 | if (ret) | ||
| 377 | pr_warning("da850_evm_init: lcd initialization failed: %d\n", | ||
| 378 | ret); | ||
| 379 | |||
| 380 | ret = da8xx_register_lcdc(); | ||
| 381 | if (ret) | ||
| 382 | pr_warning("da850_evm_init: lcdc registration failed: %d\n", | ||
| 383 | ret); | ||
| 384 | } | ||
| 385 | |||
| 386 | #ifdef CONFIG_SERIAL_8250_CONSOLE | ||
| 387 | static int __init da850_evm_console_init(void) | ||
| 388 | { | ||
| 389 | return add_preferred_console("ttyS", 2, "115200"); | ||
| 390 | } | ||
| 391 | console_initcall(da850_evm_console_init); | ||
| 392 | #endif | ||
| 393 | |||
| 394 | static __init void da850_evm_irq_init(void) | ||
| 395 | { | ||
| 396 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
| 397 | |||
| 398 | cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ, | ||
| 399 | soc_info->intc_irq_prios); | ||
| 400 | } | ||
| 401 | |||
| 402 | static void __init da850_evm_map_io(void) | ||
| 403 | { | ||
| 404 | da850_init(); | ||
| 405 | } | ||
| 406 | |||
| 407 | MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM") | ||
| 408 | .phys_io = IO_PHYS, | ||
| 409 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | ||
| 410 | .boot_params = (DA8XX_DDR_BASE + 0x100), | ||
| 411 | .map_io = da850_evm_map_io, | ||
| 412 | .init_irq = da850_evm_irq_init, | ||
| 413 | .timer = &davinci_timer, | ||
| 414 | .init_machine = da850_evm_init, | ||
| 415 | MACHINE_END | ||
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index d6ab64ccd496..77e806798822 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
| @@ -20,6 +20,8 @@ | |||
| 20 | #include <linux/io.h> | 20 | #include <linux/io.h> |
| 21 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
| 22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
| 23 | #include <linux/videodev2.h> | ||
| 24 | #include <media/tvp514x.h> | ||
| 23 | #include <linux/spi/spi.h> | 25 | #include <linux/spi/spi.h> |
| 24 | #include <linux/spi/eeprom.h> | 26 | #include <linux/spi/eeprom.h> |
| 25 | 27 | ||
| @@ -117,6 +119,8 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
| 117 | .bus_delay = 0 /* usec */, | 119 | .bus_delay = 0 /* usec */, |
| 118 | }; | 120 | }; |
| 119 | 121 | ||
| 122 | static struct snd_platform_data dm355_evm_snd_data; | ||
| 123 | |||
| 120 | static int dm355evm_mmc_gpios = -EINVAL; | 124 | static int dm355evm_mmc_gpios = -EINVAL; |
| 121 | 125 | ||
| 122 | static void dm355evm_mmcsd_gpios(unsigned gpio) | 126 | static void dm355evm_mmcsd_gpios(unsigned gpio) |
| @@ -134,11 +138,11 @@ static void dm355evm_mmcsd_gpios(unsigned gpio) | |||
| 134 | } | 138 | } |
| 135 | 139 | ||
| 136 | static struct i2c_board_info dm355evm_i2c_info[] = { | 140 | static struct i2c_board_info dm355evm_i2c_info[] = { |
| 137 | { I2C_BOARD_INFO("dm355evm_msp", 0x25), | 141 | { I2C_BOARD_INFO("dm355evm_msp", 0x25), |
| 138 | .platform_data = dm355evm_mmcsd_gpios, | 142 | .platform_data = dm355evm_mmcsd_gpios, |
| 139 | /* plus irq */ }, | 143 | }, |
| 140 | /* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */ | 144 | /* { plus irq }, */ |
| 141 | /* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */ | 145 | { I2C_BOARD_INFO("tlv320aic33", 0x1b), }, |
| 142 | }; | 146 | }; |
| 143 | 147 | ||
| 144 | static void __init evm_init_i2c(void) | 148 | static void __init evm_init_i2c(void) |
| @@ -177,6 +181,72 @@ static struct platform_device dm355evm_dm9000 = { | |||
| 177 | .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc), | 181 | .num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc), |
| 178 | }; | 182 | }; |
| 179 | 183 | ||
| 184 | static struct tvp514x_platform_data tvp5146_pdata = { | ||
| 185 | .clk_polarity = 0, | ||
| 186 | .hs_polarity = 1, | ||
| 187 | .vs_polarity = 1 | ||
| 188 | }; | ||
| 189 | |||
| 190 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | ||
| 191 | /* Inputs available at the TVP5146 */ | ||
| 192 | static struct v4l2_input tvp5146_inputs[] = { | ||
| 193 | { | ||
| 194 | .index = 0, | ||
| 195 | .name = "Composite", | ||
| 196 | .type = V4L2_INPUT_TYPE_CAMERA, | ||
| 197 | .std = TVP514X_STD_ALL, | ||
| 198 | }, | ||
| 199 | { | ||
| 200 | .index = 1, | ||
| 201 | .name = "S-Video", | ||
| 202 | .type = V4L2_INPUT_TYPE_CAMERA, | ||
| 203 | .std = TVP514X_STD_ALL, | ||
| 204 | }, | ||
| 205 | }; | ||
| 206 | |||
| 207 | /* | ||
| 208 | * this is the route info for connecting each input to decoder | ||
| 209 | * ouput that goes to vpfe. There is a one to one correspondence | ||
| 210 | * with tvp5146_inputs | ||
| 211 | */ | ||
| 212 | static struct vpfe_route tvp5146_routes[] = { | ||
| 213 | { | ||
| 214 | .input = INPUT_CVBS_VI2B, | ||
| 215 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | ||
| 216 | }, | ||
| 217 | { | ||
| 218 | .input = INPUT_SVIDEO_VI2C_VI1C, | ||
| 219 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | ||
| 220 | }, | ||
| 221 | }; | ||
| 222 | |||
| 223 | static struct vpfe_subdev_info vpfe_sub_devs[] = { | ||
| 224 | { | ||
| 225 | .name = "tvp5146", | ||
| 226 | .grp_id = 0, | ||
| 227 | .num_inputs = ARRAY_SIZE(tvp5146_inputs), | ||
| 228 | .inputs = tvp5146_inputs, | ||
| 229 | .routes = tvp5146_routes, | ||
| 230 | .can_route = 1, | ||
| 231 | .ccdc_if_params = { | ||
| 232 | .if_type = VPFE_BT656, | ||
| 233 | .hdpol = VPFE_PINPOL_POSITIVE, | ||
| 234 | .vdpol = VPFE_PINPOL_POSITIVE, | ||
| 235 | }, | ||
| 236 | .board_info = { | ||
| 237 | I2C_BOARD_INFO("tvp5146", 0x5d), | ||
| 238 | .platform_data = &tvp5146_pdata, | ||
| 239 | }, | ||
| 240 | } | ||
| 241 | }; | ||
| 242 | |||
| 243 | static struct vpfe_config vpfe_cfg = { | ||
| 244 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | ||
| 245 | .sub_devs = vpfe_sub_devs, | ||
| 246 | .card_name = "DM355 EVM", | ||
| 247 | .ccdc = "DM355 CCDC", | ||
| 248 | }; | ||
| 249 | |||
| 180 | static struct platform_device *davinci_evm_devices[] __initdata = { | 250 | static struct platform_device *davinci_evm_devices[] __initdata = { |
| 181 | &dm355evm_dm9000, | 251 | &dm355evm_dm9000, |
| 182 | &davinci_nand_device, | 252 | &davinci_nand_device, |
| @@ -188,6 +258,8 @@ static struct davinci_uart_config uart_config __initdata = { | |||
| 188 | 258 | ||
| 189 | static void __init dm355_evm_map_io(void) | 259 | static void __init dm355_evm_map_io(void) |
| 190 | { | 260 | { |
| 261 | /* setup input configuration for VPFE input devices */ | ||
| 262 | dm355_set_vpfe_config(&vpfe_cfg); | ||
| 191 | dm355_init(); | 263 | dm355_init(); |
| 192 | } | 264 | } |
| 193 | 265 | ||
| @@ -279,6 +351,9 @@ static __init void dm355_evm_init(void) | |||
| 279 | 351 | ||
| 280 | dm355_init_spi0(BIT(0), dm355_evm_spi_info, | 352 | dm355_init_spi0(BIT(0), dm355_evm_spi_info, |
| 281 | ARRAY_SIZE(dm355_evm_spi_info)); | 353 | ARRAY_SIZE(dm355_evm_spi_info)); |
| 354 | |||
| 355 | /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */ | ||
| 356 | dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data); | ||
| 282 | } | 357 | } |
| 283 | 358 | ||
| 284 | static __init void dm355_evm_irq_init(void) | 359 | static __init void dm355_evm_irq_init(void) |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c new file mode 100644 index 000000000000..a1d5e7dac741 --- /dev/null +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
| @@ -0,0 +1,492 @@ | |||
| 1 | /* | ||
| 2 | * TI DaVinci DM365 EVM board support | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Texas Instruments Incorporated | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License as | ||
| 8 | * published by the Free Software Foundation version 2. | ||
| 9 | * | ||
| 10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
| 11 | * kind, whether express or implied; without even the implied warranty | ||
| 12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | */ | ||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/dma-mapping.h> | ||
| 19 | #include <linux/i2c.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | #include <linux/clk.h> | ||
| 22 | #include <linux/i2c/at24.h> | ||
| 23 | #include <linux/leds.h> | ||
| 24 | #include <linux/mtd/mtd.h> | ||
| 25 | #include <linux/mtd/partitions.h> | ||
| 26 | #include <linux/mtd/nand.h> | ||
| 27 | #include <asm/setup.h> | ||
| 28 | #include <asm/mach-types.h> | ||
| 29 | #include <asm/mach/arch.h> | ||
| 30 | #include <asm/mach/map.h> | ||
| 31 | #include <mach/mux.h> | ||
| 32 | #include <mach/hardware.h> | ||
| 33 | #include <mach/dm365.h> | ||
| 34 | #include <mach/psc.h> | ||
| 35 | #include <mach/common.h> | ||
| 36 | #include <mach/i2c.h> | ||
| 37 | #include <mach/serial.h> | ||
| 38 | #include <mach/common.h> | ||
| 39 | #include <mach/mmc.h> | ||
| 40 | #include <mach/nand.h> | ||
| 41 | |||
| 42 | |||
| 43 | static inline int have_imager(void) | ||
| 44 | { | ||
| 45 | /* REVISIT when it's supported, trigger via Kconfig */ | ||
| 46 | return 0; | ||
| 47 | } | ||
| 48 | |||
| 49 | static inline int have_tvp7002(void) | ||
| 50 | { | ||
| 51 | /* REVISIT when it's supported, trigger via Kconfig */ | ||
| 52 | return 0; | ||
| 53 | } | ||
| 54 | |||
| 55 | |||
| 56 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000 | ||
| 57 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
| 58 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
| 59 | |||
| 60 | #define DM365_EVM_PHY_MASK (0x2) | ||
| 61 | #define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | ||
| 62 | |||
| 63 | /* | ||
| 64 | * A MAX-II CPLD is used for various board control functions. | ||
| 65 | */ | ||
| 66 | #define CPLD_OFFSET(a13a8,a2a1) (((a13a8) << 10) + ((a2a1) << 3)) | ||
| 67 | |||
| 68 | #define CPLD_VERSION CPLD_OFFSET(0,0) /* r/o */ | ||
| 69 | #define CPLD_TEST CPLD_OFFSET(0,1) | ||
| 70 | #define CPLD_LEDS CPLD_OFFSET(0,2) | ||
| 71 | #define CPLD_MUX CPLD_OFFSET(0,3) | ||
| 72 | #define CPLD_SWITCH CPLD_OFFSET(1,0) /* r/o */ | ||
| 73 | #define CPLD_POWER CPLD_OFFSET(1,1) | ||
| 74 | #define CPLD_VIDEO CPLD_OFFSET(1,2) | ||
| 75 | #define CPLD_CARDSTAT CPLD_OFFSET(1,3) /* r/o */ | ||
| 76 | |||
| 77 | #define CPLD_DILC_OUT CPLD_OFFSET(2,0) | ||
| 78 | #define CPLD_DILC_IN CPLD_OFFSET(2,1) /* r/o */ | ||
| 79 | |||
| 80 | #define CPLD_IMG_DIR0 CPLD_OFFSET(2,2) | ||
| 81 | #define CPLD_IMG_MUX0 CPLD_OFFSET(2,3) | ||
| 82 | #define CPLD_IMG_MUX1 CPLD_OFFSET(3,0) | ||
| 83 | #define CPLD_IMG_DIR1 CPLD_OFFSET(3,1) | ||
| 84 | #define CPLD_IMG_MUX2 CPLD_OFFSET(3,2) | ||
| 85 | #define CPLD_IMG_MUX3 CPLD_OFFSET(3,3) | ||
| 86 | #define CPLD_IMG_DIR2 CPLD_OFFSET(4,0) | ||
| 87 | #define CPLD_IMG_MUX4 CPLD_OFFSET(4,1) | ||
| 88 | #define CPLD_IMG_MUX5 CPLD_OFFSET(4,2) | ||
| 89 | |||
| 90 | #define CPLD_RESETS CPLD_OFFSET(4,3) | ||
| 91 | |||
| 92 | #define CPLD_CCD_DIR1 CPLD_OFFSET(0x3e,0) | ||
| 93 | #define CPLD_CCD_IO1 CPLD_OFFSET(0x3e,1) | ||
| 94 | #define CPLD_CCD_DIR2 CPLD_OFFSET(0x3e,2) | ||
| 95 | #define CPLD_CCD_IO2 CPLD_OFFSET(0x3e,3) | ||
| 96 | #define CPLD_CCD_DIR3 CPLD_OFFSET(0x3f,0) | ||
| 97 | #define CPLD_CCD_IO3 CPLD_OFFSET(0x3f,1) | ||
| 98 | |||
| 99 | static void __iomem *cpld; | ||
| 100 | |||
| 101 | |||
| 102 | /* NOTE: this is geared for the standard config, with a socketed | ||
| 103 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | ||
| 104 | * swap chips with a different block size, partitioning will | ||
| 105 | * need to be changed. This NAND chip MT29F16G08FAA is the default | ||
| 106 | * NAND shipped with the Spectrum Digital DM365 EVM | ||
| 107 | */ | ||
| 108 | #define NAND_BLOCK_SIZE SZ_128K | ||
| 109 | |||
| 110 | static struct mtd_partition davinci_nand_partitions[] = { | ||
| 111 | { | ||
| 112 | /* UBL (a few copies) plus U-Boot */ | ||
| 113 | .name = "bootloader", | ||
| 114 | .offset = 0, | ||
| 115 | .size = 28 * NAND_BLOCK_SIZE, | ||
| 116 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
| 117 | }, { | ||
| 118 | /* U-Boot environment */ | ||
| 119 | .name = "params", | ||
| 120 | .offset = MTDPART_OFS_APPEND, | ||
| 121 | .size = 2 * NAND_BLOCK_SIZE, | ||
| 122 | .mask_flags = 0, | ||
| 123 | }, { | ||
| 124 | .name = "kernel", | ||
| 125 | .offset = MTDPART_OFS_APPEND, | ||
| 126 | .size = SZ_4M, | ||
| 127 | .mask_flags = 0, | ||
| 128 | }, { | ||
| 129 | .name = "filesystem1", | ||
| 130 | .offset = MTDPART_OFS_APPEND, | ||
| 131 | .size = SZ_512M, | ||
| 132 | .mask_flags = 0, | ||
| 133 | }, { | ||
| 134 | .name = "filesystem2", | ||
| 135 | .offset = MTDPART_OFS_APPEND, | ||
| 136 | .size = MTDPART_SIZ_FULL, | ||
| 137 | .mask_flags = 0, | ||
| 138 | } | ||
| 139 | /* two blocks with bad block table (and mirror) at the end */ | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct davinci_nand_pdata davinci_nand_data = { | ||
| 143 | .mask_chipsel = BIT(14), | ||
| 144 | .parts = davinci_nand_partitions, | ||
| 145 | .nr_parts = ARRAY_SIZE(davinci_nand_partitions), | ||
| 146 | .ecc_mode = NAND_ECC_HW, | ||
| 147 | .options = NAND_USE_FLASH_BBT, | ||
| 148 | }; | ||
| 149 | |||
| 150 | static struct resource davinci_nand_resources[] = { | ||
| 151 | { | ||
| 152 | .start = DM365_ASYNC_EMIF_DATA_CE0_BASE, | ||
| 153 | .end = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1, | ||
| 154 | .flags = IORESOURCE_MEM, | ||
| 155 | }, { | ||
| 156 | .start = DM365_ASYNC_EMIF_CONTROL_BASE, | ||
| 157 | .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | ||
| 158 | .flags = IORESOURCE_MEM, | ||
| 159 | }, | ||
| 160 | }; | ||
| 161 | |||
| 162 | static struct platform_device davinci_nand_device = { | ||
| 163 | .name = "davinci_nand", | ||
| 164 | .id = 0, | ||
| 165 | .num_resources = ARRAY_SIZE(davinci_nand_resources), | ||
| 166 | .resource = davinci_nand_resources, | ||
| 167 | .dev = { | ||
| 168 | .platform_data = &davinci_nand_data, | ||
| 169 | }, | ||
| 170 | }; | ||
| 171 | |||
| 172 | static struct at24_platform_data eeprom_info = { | ||
| 173 | .byte_len = (256*1024) / 8, | ||
| 174 | .page_size = 64, | ||
| 175 | .flags = AT24_FLAG_ADDR16, | ||
| 176 | .setup = davinci_get_mac_addr, | ||
| 177 | .context = (void *)0x7f00, | ||
| 178 | }; | ||
| 179 | |||
| 180 | static struct i2c_board_info i2c_info[] = { | ||
| 181 | { | ||
| 182 | I2C_BOARD_INFO("24c256", 0x50), | ||
| 183 | .platform_data = &eeprom_info, | ||
| 184 | }, | ||
| 185 | }; | ||
| 186 | |||
| 187 | static struct davinci_i2c_platform_data i2c_pdata = { | ||
| 188 | .bus_freq = 400 /* kHz */, | ||
| 189 | .bus_delay = 0 /* usec */, | ||
| 190 | }; | ||
| 191 | |||
| 192 | static int cpld_mmc_get_cd(int module) | ||
| 193 | { | ||
| 194 | if (!cpld) | ||
| 195 | return -ENXIO; | ||
| 196 | |||
| 197 | /* low == card present */ | ||
| 198 | return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0)); | ||
| 199 | } | ||
| 200 | |||
| 201 | static int cpld_mmc_get_ro(int module) | ||
| 202 | { | ||
| 203 | if (!cpld) | ||
| 204 | return -ENXIO; | ||
| 205 | |||
| 206 | /* high == card's write protect switch active */ | ||
| 207 | return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1)); | ||
| 208 | } | ||
| 209 | |||
| 210 | static struct davinci_mmc_config dm365evm_mmc_config = { | ||
| 211 | .get_cd = cpld_mmc_get_cd, | ||
| 212 | .get_ro = cpld_mmc_get_ro, | ||
| 213 | .wires = 4, | ||
| 214 | .max_freq = 50000000, | ||
| 215 | .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, | ||
| 216 | .version = MMC_CTLR_VERSION_2, | ||
| 217 | }; | ||
| 218 | |||
| 219 | static void dm365evm_emac_configure(void) | ||
| 220 | { | ||
| 221 | /* | ||
| 222 | * EMAC pins are multiplexed with GPIO and UART | ||
| 223 | * Further details are available at the DM365 ARM | ||
| 224 | * Subsystem Users Guide(sprufg5.pdf) pages 125 - 127 | ||
| 225 | */ | ||
| 226 | davinci_cfg_reg(DM365_EMAC_TX_EN); | ||
| 227 | davinci_cfg_reg(DM365_EMAC_TX_CLK); | ||
| 228 | davinci_cfg_reg(DM365_EMAC_COL); | ||
| 229 | davinci_cfg_reg(DM365_EMAC_TXD3); | ||
| 230 | davinci_cfg_reg(DM365_EMAC_TXD2); | ||
| 231 | davinci_cfg_reg(DM365_EMAC_TXD1); | ||
| 232 | davinci_cfg_reg(DM365_EMAC_TXD0); | ||
| 233 | davinci_cfg_reg(DM365_EMAC_RXD3); | ||
| 234 | davinci_cfg_reg(DM365_EMAC_RXD2); | ||
| 235 | davinci_cfg_reg(DM365_EMAC_RXD1); | ||
| 236 | davinci_cfg_reg(DM365_EMAC_RXD0); | ||
| 237 | davinci_cfg_reg(DM365_EMAC_RX_CLK); | ||
| 238 | davinci_cfg_reg(DM365_EMAC_RX_DV); | ||
| 239 | davinci_cfg_reg(DM365_EMAC_RX_ER); | ||
| 240 | davinci_cfg_reg(DM365_EMAC_CRS); | ||
| 241 | davinci_cfg_reg(DM365_EMAC_MDIO); | ||
| 242 | davinci_cfg_reg(DM365_EMAC_MDCLK); | ||
| 243 | |||
| 244 | /* | ||
| 245 | * EMAC interrupts are multiplexed with GPIO interrupts | ||
| 246 | * Details are available at the DM365 ARM | ||
| 247 | * Subsystem Users Guide(sprufg5.pdf) pages 133 - 134 | ||
| 248 | */ | ||
| 249 | davinci_cfg_reg(DM365_INT_EMAC_RXTHRESH); | ||
| 250 | davinci_cfg_reg(DM365_INT_EMAC_RXPULSE); | ||
| 251 | davinci_cfg_reg(DM365_INT_EMAC_TXPULSE); | ||
| 252 | davinci_cfg_reg(DM365_INT_EMAC_MISCPULSE); | ||
| 253 | } | ||
| 254 | |||
| 255 | static void dm365evm_mmc_configure(void) | ||
| 256 | { | ||
| 257 | /* | ||
| 258 | * MMC/SD pins are multiplexed with GPIO and EMIF | ||
| 259 | * Further details are available at the DM365 ARM | ||
| 260 | * Subsystem Users Guide(sprufg5.pdf) pages 118, 128 - 131 | ||
| 261 | */ | ||
| 262 | davinci_cfg_reg(DM365_SD1_CLK); | ||
| 263 | davinci_cfg_reg(DM365_SD1_CMD); | ||
| 264 | davinci_cfg_reg(DM365_SD1_DATA3); | ||
| 265 | davinci_cfg_reg(DM365_SD1_DATA2); | ||
| 266 | davinci_cfg_reg(DM365_SD1_DATA1); | ||
| 267 | davinci_cfg_reg(DM365_SD1_DATA0); | ||
| 268 | } | ||
| 269 | |||
| 270 | static void __init evm_init_i2c(void) | ||
| 271 | { | ||
| 272 | davinci_init_i2c(&i2c_pdata); | ||
| 273 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); | ||
| 274 | } | ||
| 275 | |||
| 276 | static struct platform_device *dm365_evm_nand_devices[] __initdata = { | ||
| 277 | &davinci_nand_device, | ||
| 278 | }; | ||
| 279 | |||
| 280 | static inline int have_leds(void) | ||
| 281 | { | ||
| 282 | #ifdef CONFIG_LEDS_CLASS | ||
| 283 | return 1; | ||
| 284 | #else | ||
| 285 | return 0; | ||
| 286 | #endif | ||
| 287 | } | ||
| 288 | |||
| 289 | struct cpld_led { | ||
| 290 | struct led_classdev cdev; | ||
| 291 | u8 mask; | ||
| 292 | }; | ||
| 293 | |||
| 294 | static const struct { | ||
| 295 | const char *name; | ||
| 296 | const char *trigger; | ||
| 297 | } cpld_leds[] = { | ||
| 298 | { "dm365evm::ds2", }, | ||
| 299 | { "dm365evm::ds3", }, | ||
| 300 | { "dm365evm::ds4", }, | ||
| 301 | { "dm365evm::ds5", }, | ||
| 302 | { "dm365evm::ds6", "nand-disk", }, | ||
| 303 | { "dm365evm::ds7", "mmc1", }, | ||
| 304 | { "dm365evm::ds8", "mmc0", }, | ||
| 305 | { "dm365evm::ds9", "heartbeat", }, | ||
| 306 | }; | ||
| 307 | |||
| 308 | static void cpld_led_set(struct led_classdev *cdev, enum led_brightness b) | ||
| 309 | { | ||
| 310 | struct cpld_led *led = container_of(cdev, struct cpld_led, cdev); | ||
| 311 | u8 reg = __raw_readb(cpld + CPLD_LEDS); | ||
| 312 | |||
| 313 | if (b != LED_OFF) | ||
| 314 | reg &= ~led->mask; | ||
| 315 | else | ||
| 316 | reg |= led->mask; | ||
| 317 | __raw_writeb(reg, cpld + CPLD_LEDS); | ||
| 318 | } | ||
| 319 | |||
| 320 | static enum led_brightness cpld_led_get(struct led_classdev *cdev) | ||
| 321 | { | ||
| 322 | struct cpld_led *led = container_of(cdev, struct cpld_led, cdev); | ||
| 323 | u8 reg = __raw_readb(cpld + CPLD_LEDS); | ||
| 324 | |||
| 325 | return (reg & led->mask) ? LED_OFF : LED_FULL; | ||
| 326 | } | ||
| 327 | |||
| 328 | static int __init cpld_leds_init(void) | ||
| 329 | { | ||
| 330 | int i; | ||
| 331 | |||
| 332 | if (!have_leds() || !cpld) | ||
| 333 | return 0; | ||
| 334 | |||
| 335 | /* setup LEDs */ | ||
| 336 | __raw_writeb(0xff, cpld + CPLD_LEDS); | ||
| 337 | for (i = 0; i < ARRAY_SIZE(cpld_leds); i++) { | ||
| 338 | struct cpld_led *led; | ||
| 339 | |||
| 340 | led = kzalloc(sizeof(*led), GFP_KERNEL); | ||
| 341 | if (!led) | ||
| 342 | break; | ||
| 343 | |||
| 344 | led->cdev.name = cpld_leds[i].name; | ||
| 345 | led->cdev.brightness_set = cpld_led_set; | ||
| 346 | led->cdev.brightness_get = cpld_led_get; | ||
| 347 | led->cdev.default_trigger = cpld_leds[i].trigger; | ||
| 348 | led->mask = BIT(i); | ||
| 349 | |||
| 350 | if (led_classdev_register(NULL, &led->cdev) < 0) { | ||
| 351 | kfree(led); | ||
| 352 | break; | ||
| 353 | } | ||
| 354 | } | ||
| 355 | |||
| 356 | return 0; | ||
| 357 | } | ||
| 358 | /* run after subsys_initcall() for LEDs */ | ||
| 359 | fs_initcall(cpld_leds_init); | ||
| 360 | |||
| 361 | |||
| 362 | static void __init evm_init_cpld(void) | ||
| 363 | { | ||
| 364 | u8 mux, resets; | ||
| 365 | const char *label; | ||
| 366 | struct clk *aemif_clk; | ||
| 367 | |||
| 368 | /* Make sure we can configure the CPLD through CS1. Then | ||
| 369 | * leave it on for later access to MMC and LED registers. | ||
| 370 | */ | ||
| 371 | aemif_clk = clk_get(NULL, "aemif"); | ||
| 372 | if (IS_ERR(aemif_clk)) | ||
| 373 | return; | ||
| 374 | clk_enable(aemif_clk); | ||
| 375 | |||
| 376 | if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE, | ||
| 377 | "cpld") == NULL) | ||
| 378 | goto fail; | ||
| 379 | cpld = ioremap(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE); | ||
| 380 | if (!cpld) { | ||
| 381 | release_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, | ||
| 382 | SECTION_SIZE); | ||
| 383 | fail: | ||
| 384 | pr_err("ERROR: can't map CPLD\n"); | ||
| 385 | clk_disable(aemif_clk); | ||
| 386 | return; | ||
| 387 | } | ||
| 388 | |||
| 389 | /* External muxing for some signals */ | ||
| 390 | mux = 0; | ||
| 391 | |||
| 392 | /* Read SW5 to set up NAND + keypad _or_ OneNAND (sync read). | ||
| 393 | * NOTE: SW4 bus width setting must match! | ||
| 394 | */ | ||
| 395 | if ((__raw_readb(cpld + CPLD_SWITCH) & BIT(5)) == 0) { | ||
| 396 | /* external keypad mux */ | ||
| 397 | mux |= BIT(7); | ||
| 398 | |||
| 399 | platform_add_devices(dm365_evm_nand_devices, | ||
| 400 | ARRAY_SIZE(dm365_evm_nand_devices)); | ||
| 401 | } else { | ||
| 402 | /* no OneNAND support yet */ | ||
| 403 | } | ||
| 404 | |||
| 405 | /* Leave external chips in reset when unused. */ | ||
| 406 | resets = BIT(3) | BIT(2) | BIT(1) | BIT(0); | ||
| 407 | |||
| 408 | /* Static video input config with SN74CBT16214 1-of-3 mux: | ||
| 409 | * - port b1 == tvp7002 (mux lowbits == 1 or 6) | ||
| 410 | * - port b2 == imager (mux lowbits == 2 or 7) | ||
| 411 | * - port b3 == tvp5146 (mux lowbits == 5) | ||
| 412 | * | ||
| 413 | * Runtime switching could work too, with limitations. | ||
| 414 | */ | ||
| 415 | if (have_imager()) { | ||
| 416 | label = "HD imager"; | ||
| 417 | mux |= 1; | ||
| 418 | |||
| 419 | /* externally mux MMC1/ENET/AIC33 to imager */ | ||
| 420 | mux |= BIT(6) | BIT(5) | BIT(3); | ||
| 421 | } else { | ||
| 422 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
| 423 | |||
| 424 | /* we can use MMC1 ... */ | ||
| 425 | dm365evm_mmc_configure(); | ||
| 426 | davinci_setup_mmc(1, &dm365evm_mmc_config); | ||
| 427 | |||
| 428 | /* ... and ENET ... */ | ||
| 429 | dm365evm_emac_configure(); | ||
| 430 | soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK; | ||
| 431 | soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY; | ||
| 432 | resets &= ~BIT(3); | ||
| 433 | |||
| 434 | /* ... and AIC33 */ | ||
| 435 | resets &= ~BIT(1); | ||
| 436 | |||
| 437 | if (have_tvp7002()) { | ||
| 438 | mux |= 2; | ||
| 439 | resets &= ~BIT(2); | ||
| 440 | label = "tvp7002 HD"; | ||
| 441 | } else { | ||
| 442 | /* default to tvp5146 */ | ||
| 443 | mux |= 5; | ||
| 444 | resets &= ~BIT(0); | ||
| 445 | label = "tvp5146 SD"; | ||
| 446 | } | ||
| 447 | } | ||
| 448 | __raw_writeb(mux, cpld + CPLD_MUX); | ||
| 449 | __raw_writeb(resets, cpld + CPLD_RESETS); | ||
| 450 | pr_info("EVM: %s video input\n", label); | ||
| 451 | |||
| 452 | /* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */ | ||
| 453 | } | ||
| 454 | |||
| 455 | static struct davinci_uart_config uart_config __initdata = { | ||
| 456 | .enabled_uarts = (1 << 0), | ||
| 457 | }; | ||
| 458 | |||
| 459 | static void __init dm365_evm_map_io(void) | ||
| 460 | { | ||
| 461 | dm365_init(); | ||
| 462 | } | ||
| 463 | |||
| 464 | static __init void dm365_evm_init(void) | ||
| 465 | { | ||
| 466 | evm_init_i2c(); | ||
| 467 | davinci_serial_init(&uart_config); | ||
| 468 | |||
| 469 | dm365evm_emac_configure(); | ||
| 470 | dm365evm_mmc_configure(); | ||
| 471 | |||
| 472 | davinci_setup_mmc(0, &dm365evm_mmc_config); | ||
| 473 | |||
| 474 | /* maybe setup mmc1/etc ... _after_ mmc0 */ | ||
| 475 | evm_init_cpld(); | ||
| 476 | } | ||
| 477 | |||
| 478 | static __init void dm365_evm_irq_init(void) | ||
| 479 | { | ||
| 480 | davinci_irq_init(); | ||
| 481 | } | ||
| 482 | |||
| 483 | MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM") | ||
| 484 | .phys_io = IO_PHYS, | ||
| 485 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | ||
| 486 | .boot_params = (0x80000100), | ||
| 487 | .map_io = dm365_evm_map_io, | ||
| 488 | .init_irq = dm365_evm_irq_init, | ||
| 489 | .timer = &davinci_timer, | ||
| 490 | .init_machine = dm365_evm_init, | ||
| 491 | MACHINE_END | ||
| 492 | |||
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 56c8cd01de9a..1213a0087ad4 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
| @@ -28,6 +28,9 @@ | |||
| 28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
| 29 | #include <linux/phy.h> | 29 | #include <linux/phy.h> |
| 30 | #include <linux/clk.h> | 30 | #include <linux/clk.h> |
| 31 | #include <linux/videodev2.h> | ||
| 32 | |||
| 33 | #include <media/tvp514x.h> | ||
| 31 | 34 | ||
| 32 | #include <asm/setup.h> | 35 | #include <asm/setup.h> |
| 33 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
| @@ -194,6 +197,72 @@ static struct platform_device davinci_fb_device = { | |||
| 194 | .num_resources = 0, | 197 | .num_resources = 0, |
| 195 | }; | 198 | }; |
| 196 | 199 | ||
| 200 | static struct tvp514x_platform_data tvp5146_pdata = { | ||
| 201 | .clk_polarity = 0, | ||
| 202 | .hs_polarity = 1, | ||
| 203 | .vs_polarity = 1 | ||
| 204 | }; | ||
| 205 | |||
| 206 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | ||
| 207 | /* Inputs available at the TVP5146 */ | ||
| 208 | static struct v4l2_input tvp5146_inputs[] = { | ||
| 209 | { | ||
| 210 | .index = 0, | ||
| 211 | .name = "Composite", | ||
| 212 | .type = V4L2_INPUT_TYPE_CAMERA, | ||
| 213 | .std = TVP514X_STD_ALL, | ||
| 214 | }, | ||
| 215 | { | ||
| 216 | .index = 1, | ||
| 217 | .name = "S-Video", | ||
| 218 | .type = V4L2_INPUT_TYPE_CAMERA, | ||
| 219 | .std = TVP514X_STD_ALL, | ||
| 220 | }, | ||
| 221 | }; | ||
| 222 | |||
| 223 | /* | ||
| 224 | * this is the route info for connecting each input to decoder | ||
| 225 | * ouput that goes to vpfe. There is a one to one correspondence | ||
| 226 | * with tvp5146_inputs | ||
| 227 | */ | ||
| 228 | static struct vpfe_route tvp5146_routes[] = { | ||
| 229 | { | ||
| 230 | .input = INPUT_CVBS_VI2B, | ||
| 231 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | ||
| 232 | }, | ||
| 233 | { | ||
| 234 | .input = INPUT_SVIDEO_VI2C_VI1C, | ||
| 235 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | ||
| 236 | }, | ||
| 237 | }; | ||
| 238 | |||
| 239 | static struct vpfe_subdev_info vpfe_sub_devs[] = { | ||
| 240 | { | ||
| 241 | .name = "tvp5146", | ||
| 242 | .grp_id = 0, | ||
| 243 | .num_inputs = ARRAY_SIZE(tvp5146_inputs), | ||
| 244 | .inputs = tvp5146_inputs, | ||
| 245 | .routes = tvp5146_routes, | ||
| 246 | .can_route = 1, | ||
| 247 | .ccdc_if_params = { | ||
| 248 | .if_type = VPFE_BT656, | ||
| 249 | .hdpol = VPFE_PINPOL_POSITIVE, | ||
| 250 | .vdpol = VPFE_PINPOL_POSITIVE, | ||
| 251 | }, | ||
| 252 | .board_info = { | ||
| 253 | I2C_BOARD_INFO("tvp5146", 0x5d), | ||
| 254 | .platform_data = &tvp5146_pdata, | ||
| 255 | }, | ||
| 256 | }, | ||
| 257 | }; | ||
| 258 | |||
| 259 | static struct vpfe_config vpfe_cfg = { | ||
| 260 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | ||
| 261 | .sub_devs = vpfe_sub_devs, | ||
| 262 | .card_name = "DM6446 EVM", | ||
| 263 | .ccdc = "DM6446 CCDC", | ||
| 264 | }; | ||
| 265 | |||
| 197 | static struct platform_device rtc_dev = { | 266 | static struct platform_device rtc_dev = { |
| 198 | .name = "rtc_davinci_evm", | 267 | .name = "rtc_davinci_evm", |
| 199 | .id = -1, | 268 | .id = -1, |
| @@ -225,6 +294,8 @@ static struct platform_device ide_dev = { | |||
| 225 | }, | 294 | }, |
| 226 | }; | 295 | }; |
| 227 | 296 | ||
| 297 | static struct snd_platform_data dm644x_evm_snd_data; | ||
| 298 | |||
| 228 | /*----------------------------------------------------------------------*/ | 299 | /*----------------------------------------------------------------------*/ |
| 229 | 300 | ||
| 230 | /* | 301 | /* |
| @@ -557,10 +628,9 @@ static struct i2c_board_info __initdata i2c_info[] = { | |||
| 557 | I2C_BOARD_INFO("24c256", 0x50), | 628 | I2C_BOARD_INFO("24c256", 0x50), |
| 558 | .platform_data = &eeprom_info, | 629 | .platform_data = &eeprom_info, |
| 559 | }, | 630 | }, |
| 560 | /* ALSO: | 631 | { |
| 561 | * - tvl320aic33 audio codec (0x1b) | 632 | I2C_BOARD_INFO("tlv320aic33", 0x1b), |
| 562 | * - tvp5146 video decoder (0x5d) | 633 | }, |
| 563 | */ | ||
| 564 | }; | 634 | }; |
| 565 | 635 | ||
| 566 | /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz), | 636 | /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz), |
| @@ -590,6 +660,8 @@ static struct davinci_uart_config uart_config __initdata = { | |||
| 590 | static void __init | 660 | static void __init |
| 591 | davinci_evm_map_io(void) | 661 | davinci_evm_map_io(void) |
| 592 | { | 662 | { |
| 663 | /* setup input configuration for VPFE input devices */ | ||
| 664 | dm644x_set_vpfe_config(&vpfe_cfg); | ||
| 593 | dm644x_init(); | 665 | dm644x_init(); |
| 594 | } | 666 | } |
| 595 | 667 | ||
| @@ -666,6 +738,7 @@ static __init void davinci_evm_init(void) | |||
| 666 | davinci_setup_mmc(0, &dm6446evm_mmc_config); | 738 | davinci_setup_mmc(0, &dm6446evm_mmc_config); |
| 667 | 739 | ||
| 668 | davinci_serial_init(&uart_config); | 740 | davinci_serial_init(&uart_config); |
| 741 | dm644x_init_asp(&dm644x_evm_snd_data); | ||
| 669 | 742 | ||
| 670 | soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK; | 743 | soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK; |
| 671 | soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY; | 744 | soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY; |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 8657e72debc1..24e0e13b1492 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
| @@ -34,6 +34,8 @@ | |||
| 34 | #include <linux/i2c/pcf857x.h> | 34 | #include <linux/i2c/pcf857x.h> |
| 35 | #include <linux/etherdevice.h> | 35 | #include <linux/etherdevice.h> |
| 36 | 36 | ||
| 37 | #include <media/tvp514x.h> | ||
| 38 | |||
| 37 | #include <asm/setup.h> | 39 | #include <asm/setup.h> |
| 38 | #include <asm/mach-types.h> | 40 | #include <asm/mach-types.h> |
| 39 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
| @@ -48,13 +50,89 @@ | |||
| 48 | #include <mach/mmc.h> | 50 | #include <mach/mmc.h> |
| 49 | #include <mach/emac.h> | 51 | #include <mach/emac.h> |
| 50 | 52 | ||
| 53 | #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ | ||
| 54 | defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | ||
| 55 | #define HAS_ATA 1 | ||
| 56 | #else | ||
| 57 | #define HAS_ATA 0 | ||
| 58 | #endif | ||
| 59 | |||
| 60 | /* CPLD Register 0 bits to control ATA */ | ||
| 61 | #define DM646X_EVM_ATA_RST BIT(0) | ||
| 62 | #define DM646X_EVM_ATA_PWD BIT(1) | ||
| 63 | |||
| 51 | #define DM646X_EVM_PHY_MASK (0x2) | 64 | #define DM646X_EVM_PHY_MASK (0x2) |
| 52 | #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | 65 | #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ |
| 53 | 66 | ||
| 67 | #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) | ||
| 68 | #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) | ||
| 69 | #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) | ||
| 70 | #define VCH2CLK_SYSCLK8 (BIT(9)) | ||
| 71 | #define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) | ||
| 72 | #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12)) | ||
| 73 | #define VCH3CLK_SYSCLK8 (BIT(13)) | ||
| 74 | #define VCH3CLK_AUXCLK (BIT(14) | BIT(13)) | ||
| 75 | |||
| 76 | #define VIDCH2CLK (BIT(10)) | ||
| 77 | #define VIDCH3CLK (BIT(11)) | ||
| 78 | #define VIDCH1CLK (BIT(4)) | ||
| 79 | #define TVP7002_INPUT (BIT(4)) | ||
| 80 | #define TVP5147_INPUT (~BIT(4)) | ||
| 81 | #define VPIF_INPUT_ONE_CHANNEL (BIT(5)) | ||
| 82 | #define VPIF_INPUT_TWO_CHANNEL (~BIT(5)) | ||
| 83 | #define TVP5147_CH0 "tvp514x-0" | ||
| 84 | #define TVP5147_CH1 "tvp514x-1" | ||
| 85 | |||
| 86 | static void __iomem *vpif_vidclkctl_reg; | ||
| 87 | static void __iomem *vpif_vsclkdis_reg; | ||
| 88 | /* spin lock for updating above registers */ | ||
| 89 | static spinlock_t vpif_reg_lock; | ||
| 90 | |||
| 54 | static struct davinci_uart_config uart_config __initdata = { | 91 | static struct davinci_uart_config uart_config __initdata = { |
| 55 | .enabled_uarts = (1 << 0), | 92 | .enabled_uarts = (1 << 0), |
| 56 | }; | 93 | }; |
| 57 | 94 | ||
| 95 | /* CPLD Register 0 Client: used for I/O Control */ | ||
| 96 | static int cpld_reg0_probe(struct i2c_client *client, | ||
| 97 | const struct i2c_device_id *id) | ||
| 98 | { | ||
| 99 | if (HAS_ATA) { | ||
| 100 | u8 data; | ||
| 101 | struct i2c_msg msg[2] = { | ||
| 102 | { | ||
| 103 | .addr = client->addr, | ||
| 104 | .flags = I2C_M_RD, | ||
| 105 | .len = 1, | ||
| 106 | .buf = &data, | ||
| 107 | }, | ||
| 108 | { | ||
| 109 | .addr = client->addr, | ||
| 110 | .flags = 0, | ||
| 111 | .len = 1, | ||
| 112 | .buf = &data, | ||
| 113 | }, | ||
| 114 | }; | ||
| 115 | |||
| 116 | /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */ | ||
| 117 | i2c_transfer(client->adapter, msg, 1); | ||
| 118 | data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD); | ||
| 119 | i2c_transfer(client->adapter, msg + 1, 1); | ||
| 120 | } | ||
| 121 | |||
| 122 | return 0; | ||
| 123 | } | ||
| 124 | |||
| 125 | static const struct i2c_device_id cpld_reg_ids[] = { | ||
| 126 | { "cpld_reg0", 0, }, | ||
| 127 | { }, | ||
| 128 | }; | ||
| 129 | |||
| 130 | static struct i2c_driver dm6467evm_cpld_driver = { | ||
| 131 | .driver.name = "cpld_reg0", | ||
| 132 | .id_table = cpld_reg_ids, | ||
| 133 | .probe = cpld_reg0_probe, | ||
| 134 | }; | ||
| 135 | |||
| 58 | /* LEDS */ | 136 | /* LEDS */ |
| 59 | 137 | ||
| 60 | static struct gpio_led evm_leds[] = { | 138 | static struct gpio_led evm_leds[] = { |
| @@ -206,6 +284,69 @@ static struct at24_platform_data eeprom_info = { | |||
| 206 | .context = (void *)0x7f00, | 284 | .context = (void *)0x7f00, |
| 207 | }; | 285 | }; |
| 208 | 286 | ||
| 287 | static u8 dm646x_iis_serializer_direction[] = { | ||
| 288 | TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE, | ||
| 289 | }; | ||
| 290 | |||
| 291 | static u8 dm646x_dit_serializer_direction[] = { | ||
| 292 | TX_MODE, | ||
| 293 | }; | ||
| 294 | |||
| 295 | static struct snd_platform_data dm646x_evm_snd_data[] = { | ||
| 296 | { | ||
| 297 | .tx_dma_offset = 0x400, | ||
| 298 | .rx_dma_offset = 0x400, | ||
| 299 | .op_mode = DAVINCI_MCASP_IIS_MODE, | ||
| 300 | .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction), | ||
| 301 | .tdm_slots = 2, | ||
| 302 | .serial_dir = dm646x_iis_serializer_direction, | ||
| 303 | .eventq_no = EVENTQ_0, | ||
| 304 | }, | ||
| 305 | { | ||
| 306 | .tx_dma_offset = 0x400, | ||
| 307 | .rx_dma_offset = 0, | ||
| 308 | .op_mode = DAVINCI_MCASP_DIT_MODE, | ||
| 309 | .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction), | ||
| 310 | .tdm_slots = 32, | ||
| 311 | .serial_dir = dm646x_dit_serializer_direction, | ||
| 312 | .eventq_no = EVENTQ_0, | ||
| 313 | }, | ||
| 314 | }; | ||
| 315 | |||
| 316 | static struct i2c_client *cpld_client; | ||
| 317 | |||
| 318 | static int cpld_video_probe(struct i2c_client *client, | ||
| 319 | const struct i2c_device_id *id) | ||
| 320 | { | ||
| 321 | cpld_client = client; | ||
| 322 | return 0; | ||
| 323 | } | ||
| 324 | |||
| 325 | static int __devexit cpld_video_remove(struct i2c_client *client) | ||
| 326 | { | ||
| 327 | cpld_client = NULL; | ||
| 328 | return 0; | ||
| 329 | } | ||
| 330 | |||
| 331 | static const struct i2c_device_id cpld_video_id[] = { | ||
| 332 | { "cpld_video", 0 }, | ||
| 333 | { } | ||
| 334 | }; | ||
| 335 | |||
| 336 | static struct i2c_driver cpld_video_driver = { | ||
| 337 | .driver = { | ||
| 338 | .name = "cpld_video", | ||
| 339 | }, | ||
| 340 | .probe = cpld_video_probe, | ||
| 341 | .remove = cpld_video_remove, | ||
| 342 | .id_table = cpld_video_id, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static void evm_init_cpld(void) | ||
| 346 | { | ||
| 347 | i2c_add_driver(&cpld_video_driver); | ||
| 348 | } | ||
| 349 | |||
| 209 | static struct i2c_board_info __initdata i2c_info[] = { | 350 | static struct i2c_board_info __initdata i2c_info[] = { |
| 210 | { | 351 | { |
| 211 | I2C_BOARD_INFO("24c256", 0x50), | 352 | I2C_BOARD_INFO("24c256", 0x50), |
| @@ -215,6 +356,15 @@ static struct i2c_board_info __initdata i2c_info[] = { | |||
| 215 | I2C_BOARD_INFO("pcf8574a", 0x38), | 356 | I2C_BOARD_INFO("pcf8574a", 0x38), |
| 216 | .platform_data = &pcf_data, | 357 | .platform_data = &pcf_data, |
| 217 | }, | 358 | }, |
| 359 | { | ||
| 360 | I2C_BOARD_INFO("cpld_reg0", 0x3a), | ||
| 361 | }, | ||
| 362 | { | ||
| 363 | I2C_BOARD_INFO("tlv320aic33", 0x18), | ||
| 364 | }, | ||
| 365 | { | ||
| 366 | I2C_BOARD_INFO("cpld_video", 0x3b), | ||
| 367 | }, | ||
| 218 | }; | 368 | }; |
| 219 | 369 | ||
| 220 | static struct davinci_i2c_platform_data i2c_pdata = { | 370 | static struct davinci_i2c_platform_data i2c_pdata = { |
| @@ -222,10 +372,265 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
| 222 | .bus_delay = 0 /* usec */, | 372 | .bus_delay = 0 /* usec */, |
| 223 | }; | 373 | }; |
| 224 | 374 | ||
| 375 | static int set_vpif_clock(int mux_mode, int hd) | ||
| 376 | { | ||
| 377 | unsigned long flags; | ||
| 378 | unsigned int value; | ||
| 379 | int val = 0; | ||
| 380 | int err = 0; | ||
| 381 | |||
| 382 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client) | ||
| 383 | return -ENXIO; | ||
| 384 | |||
| 385 | /* disable the clock */ | ||
| 386 | spin_lock_irqsave(&vpif_reg_lock, flags); | ||
| 387 | value = __raw_readl(vpif_vsclkdis_reg); | ||
| 388 | value |= (VIDCH3CLK | VIDCH2CLK); | ||
| 389 | __raw_writel(value, vpif_vsclkdis_reg); | ||
| 390 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | ||
| 391 | |||
| 392 | val = i2c_smbus_read_byte(cpld_client); | ||
| 393 | if (val < 0) | ||
| 394 | return val; | ||
| 395 | |||
| 396 | if (mux_mode == 1) | ||
| 397 | val &= ~0x40; | ||
| 398 | else | ||
| 399 | val |= 0x40; | ||
| 400 | |||
| 401 | err = i2c_smbus_write_byte(cpld_client, val); | ||
| 402 | if (err) | ||
| 403 | return err; | ||
| 404 | |||
| 405 | value = __raw_readl(vpif_vidclkctl_reg); | ||
| 406 | value &= ~(VCH2CLK_MASK); | ||
| 407 | value &= ~(VCH3CLK_MASK); | ||
| 408 | |||
| 409 | if (hd >= 1) | ||
| 410 | value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8); | ||
| 411 | else | ||
| 412 | value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK); | ||
| 413 | |||
| 414 | __raw_writel(value, vpif_vidclkctl_reg); | ||
| 415 | |||
| 416 | spin_lock_irqsave(&vpif_reg_lock, flags); | ||
| 417 | value = __raw_readl(vpif_vsclkdis_reg); | ||
| 418 | /* enable the clock */ | ||
| 419 | value &= ~(VIDCH3CLK | VIDCH2CLK); | ||
| 420 | __raw_writel(value, vpif_vsclkdis_reg); | ||
| 421 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | ||
| 422 | |||
| 423 | return 0; | ||
| 424 | } | ||
| 425 | |||
| 426 | static struct vpif_subdev_info dm646x_vpif_subdev[] = { | ||
| 427 | { | ||
| 428 | .name = "adv7343", | ||
| 429 | .board_info = { | ||
| 430 | I2C_BOARD_INFO("adv7343", 0x2a), | ||
| 431 | }, | ||
| 432 | }, | ||
| 433 | { | ||
| 434 | .name = "ths7303", | ||
| 435 | .board_info = { | ||
| 436 | I2C_BOARD_INFO("ths7303", 0x2c), | ||
| 437 | }, | ||
| 438 | }, | ||
| 439 | }; | ||
| 440 | |||
| 441 | static const char *output[] = { | ||
| 442 | "Composite", | ||
| 443 | "Component", | ||
| 444 | "S-Video", | ||
| 445 | }; | ||
| 446 | |||
| 447 | static struct vpif_display_config dm646x_vpif_display_config = { | ||
| 448 | .set_clock = set_vpif_clock, | ||
| 449 | .subdevinfo = dm646x_vpif_subdev, | ||
| 450 | .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev), | ||
| 451 | .output = output, | ||
| 452 | .output_count = ARRAY_SIZE(output), | ||
| 453 | .card_name = "DM646x EVM", | ||
| 454 | }; | ||
| 455 | |||
| 456 | /** | ||
| 457 | * setup_vpif_input_path() | ||
| 458 | * @channel: channel id (0 - CH0, 1 - CH1) | ||
| 459 | * @sub_dev_name: ptr sub device name | ||
| 460 | * | ||
| 461 | * This will set vpif input to capture data from tvp514x or | ||
| 462 | * tvp7002. | ||
| 463 | */ | ||
| 464 | static int setup_vpif_input_path(int channel, const char *sub_dev_name) | ||
| 465 | { | ||
| 466 | int err = 0; | ||
| 467 | int val; | ||
| 468 | |||
| 469 | /* for channel 1, we don't do anything */ | ||
| 470 | if (channel != 0) | ||
| 471 | return 0; | ||
| 472 | |||
| 473 | if (!cpld_client) | ||
| 474 | return -ENXIO; | ||
| 475 | |||
| 476 | val = i2c_smbus_read_byte(cpld_client); | ||
| 477 | if (val < 0) | ||
| 478 | return val; | ||
| 479 | |||
| 480 | if (!strcmp(sub_dev_name, TVP5147_CH0) || | ||
| 481 | !strcmp(sub_dev_name, TVP5147_CH1)) | ||
| 482 | val &= TVP5147_INPUT; | ||
| 483 | else | ||
| 484 | val |= TVP7002_INPUT; | ||
| 485 | |||
| 486 | err = i2c_smbus_write_byte(cpld_client, val); | ||
| 487 | if (err) | ||
| 488 | return err; | ||
| 489 | return 0; | ||
| 490 | } | ||
| 491 | |||
| 492 | /** | ||
| 493 | * setup_vpif_input_channel_mode() | ||
| 494 | * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel | ||
| 495 | * | ||
| 496 | * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147) | ||
| 497 | */ | ||
| 498 | static int setup_vpif_input_channel_mode(int mux_mode) | ||
| 499 | { | ||
| 500 | unsigned long flags; | ||
| 501 | int err = 0; | ||
| 502 | int val; | ||
| 503 | u32 value; | ||
| 504 | |||
| 505 | if (!vpif_vsclkdis_reg || !cpld_client) | ||
| 506 | return -ENXIO; | ||
| 507 | |||
| 508 | val = i2c_smbus_read_byte(cpld_client); | ||
| 509 | if (val < 0) | ||
| 510 | return val; | ||
| 511 | |||
| 512 | spin_lock_irqsave(&vpif_reg_lock, flags); | ||
| 513 | value = __raw_readl(vpif_vsclkdis_reg); | ||
| 514 | if (mux_mode) { | ||
| 515 | val &= VPIF_INPUT_TWO_CHANNEL; | ||
| 516 | value |= VIDCH1CLK; | ||
| 517 | } else { | ||
| 518 | val |= VPIF_INPUT_ONE_CHANNEL; | ||
| 519 | value &= ~VIDCH1CLK; | ||
| 520 | } | ||
| 521 | __raw_writel(value, vpif_vsclkdis_reg); | ||
| 522 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | ||
| 523 | |||
| 524 | err = i2c_smbus_write_byte(cpld_client, val); | ||
| 525 | if (err) | ||
| 526 | return err; | ||
| 527 | |||
| 528 | return 0; | ||
| 529 | } | ||
| 530 | |||
| 531 | static struct tvp514x_platform_data tvp5146_pdata = { | ||
| 532 | .clk_polarity = 0, | ||
| 533 | .hs_polarity = 1, | ||
| 534 | .vs_polarity = 1 | ||
| 535 | }; | ||
| 536 | |||
| 537 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | ||
| 538 | |||
| 539 | static struct vpif_subdev_info vpif_capture_sdev_info[] = { | ||
| 540 | { | ||
| 541 | .name = TVP5147_CH0, | ||
| 542 | .board_info = { | ||
| 543 | I2C_BOARD_INFO("tvp5146", 0x5d), | ||
| 544 | .platform_data = &tvp5146_pdata, | ||
| 545 | }, | ||
| 546 | .input = INPUT_CVBS_VI2B, | ||
| 547 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | ||
| 548 | .can_route = 1, | ||
| 549 | .vpif_if = { | ||
| 550 | .if_type = VPIF_IF_BT656, | ||
| 551 | .hd_pol = 1, | ||
| 552 | .vd_pol = 1, | ||
| 553 | .fid_pol = 0, | ||
| 554 | }, | ||
| 555 | }, | ||
| 556 | { | ||
| 557 | .name = TVP5147_CH1, | ||
| 558 | .board_info = { | ||
| 559 | I2C_BOARD_INFO("tvp5146", 0x5c), | ||
| 560 | .platform_data = &tvp5146_pdata, | ||
| 561 | }, | ||
| 562 | .input = INPUT_SVIDEO_VI2C_VI1C, | ||
| 563 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | ||
| 564 | .can_route = 1, | ||
| 565 | .vpif_if = { | ||
| 566 | .if_type = VPIF_IF_BT656, | ||
| 567 | .hd_pol = 1, | ||
| 568 | .vd_pol = 1, | ||
| 569 | .fid_pol = 0, | ||
| 570 | }, | ||
| 571 | }, | ||
| 572 | }; | ||
| 573 | |||
| 574 | static const struct vpif_input dm6467_ch0_inputs[] = { | ||
| 575 | { | ||
| 576 | .input = { | ||
| 577 | .index = 0, | ||
| 578 | .name = "Composite", | ||
| 579 | .type = V4L2_INPUT_TYPE_CAMERA, | ||
| 580 | .std = TVP514X_STD_ALL, | ||
| 581 | }, | ||
| 582 | .subdev_name = TVP5147_CH0, | ||
| 583 | }, | ||
| 584 | }; | ||
| 585 | |||
| 586 | static const struct vpif_input dm6467_ch1_inputs[] = { | ||
| 587 | { | ||
| 588 | .input = { | ||
| 589 | .index = 0, | ||
| 590 | .name = "S-Video", | ||
| 591 | .type = V4L2_INPUT_TYPE_CAMERA, | ||
| 592 | .std = TVP514X_STD_ALL, | ||
| 593 | }, | ||
| 594 | .subdev_name = TVP5147_CH1, | ||
| 595 | }, | ||
| 596 | }; | ||
| 597 | |||
| 598 | static struct vpif_capture_config dm646x_vpif_capture_cfg = { | ||
| 599 | .setup_input_path = setup_vpif_input_path, | ||
| 600 | .setup_input_channel_mode = setup_vpif_input_channel_mode, | ||
| 601 | .subdev_info = vpif_capture_sdev_info, | ||
| 602 | .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info), | ||
| 603 | .chan_config[0] = { | ||
| 604 | .inputs = dm6467_ch0_inputs, | ||
| 605 | .input_count = ARRAY_SIZE(dm6467_ch0_inputs), | ||
| 606 | }, | ||
| 607 | .chan_config[1] = { | ||
| 608 | .inputs = dm6467_ch1_inputs, | ||
| 609 | .input_count = ARRAY_SIZE(dm6467_ch1_inputs), | ||
| 610 | }, | ||
| 611 | }; | ||
| 612 | |||
| 613 | static void __init evm_init_video(void) | ||
| 614 | { | ||
| 615 | vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4); | ||
| 616 | vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4); | ||
| 617 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) { | ||
| 618 | pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n"); | ||
| 619 | return; | ||
| 620 | } | ||
| 621 | spin_lock_init(&vpif_reg_lock); | ||
| 622 | |||
| 623 | dm646x_setup_vpif(&dm646x_vpif_display_config, | ||
| 624 | &dm646x_vpif_capture_cfg); | ||
| 625 | } | ||
| 626 | |||
| 225 | static void __init evm_init_i2c(void) | 627 | static void __init evm_init_i2c(void) |
| 226 | { | 628 | { |
| 227 | davinci_init_i2c(&i2c_pdata); | 629 | davinci_init_i2c(&i2c_pdata); |
| 630 | i2c_add_driver(&dm6467evm_cpld_driver); | ||
| 228 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); | 631 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); |
| 632 | evm_init_cpld(); | ||
| 633 | evm_init_video(); | ||
| 229 | } | 634 | } |
| 230 | 635 | ||
| 231 | static void __init davinci_map_io(void) | 636 | static void __init davinci_map_io(void) |
| @@ -239,6 +644,11 @@ static __init void evm_init(void) | |||
| 239 | 644 | ||
| 240 | evm_init_i2c(); | 645 | evm_init_i2c(); |
| 241 | davinci_serial_init(&uart_config); | 646 | davinci_serial_init(&uart_config); |
| 647 | dm646x_init_mcasp0(&dm646x_evm_snd_data[0]); | ||
| 648 | dm646x_init_mcasp1(&dm646x_evm_snd_data[1]); | ||
| 649 | |||
| 650 | if (HAS_ATA) | ||
| 651 | dm646x_init_ide(); | ||
| 242 | 652 | ||
| 243 | soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK; | 653 | soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK; |
| 244 | soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY; | 654 | soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY; |
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 39bf321d70a2..83d54d50b5ea 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
| @@ -227,7 +227,10 @@ static void __init clk_pll_init(struct clk *clk) | |||
| 227 | if (ctrl & PLLCTL_PLLEN) { | 227 | if (ctrl & PLLCTL_PLLEN) { |
| 228 | bypass = 0; | 228 | bypass = 0; |
| 229 | mult = __raw_readl(pll->base + PLLM); | 229 | mult = __raw_readl(pll->base + PLLM); |
| 230 | mult = (mult & PLLM_PLLM_MASK) + 1; | 230 | if (cpu_is_davinci_dm365()) |
| 231 | mult = 2 * (mult & PLLM_PLLM_MASK); | ||
| 232 | else | ||
| 233 | mult = (mult & PLLM_PLLM_MASK) + 1; | ||
| 231 | } else | 234 | } else |
| 232 | bypass = 1; | 235 | bypass = 1; |
| 233 | 236 | ||
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c new file mode 100644 index 000000000000..19b2748357fc --- /dev/null +++ b/arch/arm/mach-davinci/da830.c | |||
| @@ -0,0 +1,1205 @@ | |||
| 1 | /* | ||
| 2 | * TI DA830/OMAP L137 chip specific setup | ||
| 3 | * | ||
| 4 | * Author: Mark A. Greer <mgreer@mvista.com> | ||
| 5 | * | ||
| 6 | * 2009 (c) MontaVista Software, Inc. This file is licensed under | ||
| 7 | * the terms of the GNU General Public License version 2. This program | ||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 9 | * or implied. | ||
| 10 | */ | ||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/clk.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | |||
| 16 | #include <asm/mach/map.h> | ||
| 17 | |||
| 18 | #include <mach/clock.h> | ||
| 19 | #include <mach/psc.h> | ||
| 20 | #include <mach/mux.h> | ||
| 21 | #include <mach/irqs.h> | ||
| 22 | #include <mach/cputype.h> | ||
| 23 | #include <mach/common.h> | ||
| 24 | #include <mach/time.h> | ||
| 25 | #include <mach/da8xx.h> | ||
| 26 | #include <mach/asp.h> | ||
| 27 | |||
| 28 | #include "clock.h" | ||
| 29 | #include "mux.h" | ||
| 30 | |||
| 31 | /* Offsets of the 8 compare registers on the da830 */ | ||
| 32 | #define DA830_CMP12_0 0x60 | ||
| 33 | #define DA830_CMP12_1 0x64 | ||
| 34 | #define DA830_CMP12_2 0x68 | ||
| 35 | #define DA830_CMP12_3 0x6c | ||
| 36 | #define DA830_CMP12_4 0x70 | ||
| 37 | #define DA830_CMP12_5 0x74 | ||
| 38 | #define DA830_CMP12_6 0x78 | ||
| 39 | #define DA830_CMP12_7 0x7c | ||
| 40 | |||
| 41 | #define DA830_REF_FREQ 24000000 | ||
| 42 | |||
| 43 | static struct pll_data pll0_data = { | ||
| 44 | .num = 1, | ||
| 45 | .phys_base = DA8XX_PLL0_BASE, | ||
| 46 | .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct clk ref_clk = { | ||
| 50 | .name = "ref_clk", | ||
| 51 | .rate = DA830_REF_FREQ, | ||
| 52 | }; | ||
| 53 | |||
| 54 | static struct clk pll0_clk = { | ||
| 55 | .name = "pll0", | ||
| 56 | .parent = &ref_clk, | ||
| 57 | .pll_data = &pll0_data, | ||
| 58 | .flags = CLK_PLL, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct clk pll0_aux_clk = { | ||
| 62 | .name = "pll0_aux_clk", | ||
| 63 | .parent = &pll0_clk, | ||
| 64 | .flags = CLK_PLL | PRE_PLL, | ||
| 65 | }; | ||
| 66 | |||
| 67 | static struct clk pll0_sysclk2 = { | ||
| 68 | .name = "pll0_sysclk2", | ||
| 69 | .parent = &pll0_clk, | ||
| 70 | .flags = CLK_PLL, | ||
| 71 | .div_reg = PLLDIV2, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct clk pll0_sysclk3 = { | ||
| 75 | .name = "pll0_sysclk3", | ||
| 76 | .parent = &pll0_clk, | ||
| 77 | .flags = CLK_PLL, | ||
| 78 | .div_reg = PLLDIV3, | ||
| 79 | }; | ||
| 80 | |||
| 81 | static struct clk pll0_sysclk4 = { | ||
| 82 | .name = "pll0_sysclk4", | ||
| 83 | .parent = &pll0_clk, | ||
| 84 | .flags = CLK_PLL, | ||
| 85 | .div_reg = PLLDIV4, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct clk pll0_sysclk5 = { | ||
| 89 | .name = "pll0_sysclk5", | ||
| 90 | .parent = &pll0_clk, | ||
| 91 | .flags = CLK_PLL, | ||
| 92 | .div_reg = PLLDIV5, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static struct clk pll0_sysclk6 = { | ||
| 96 | .name = "pll0_sysclk6", | ||
| 97 | .parent = &pll0_clk, | ||
| 98 | .flags = CLK_PLL, | ||
| 99 | .div_reg = PLLDIV6, | ||
| 100 | }; | ||
| 101 | |||
| 102 | static struct clk pll0_sysclk7 = { | ||
| 103 | .name = "pll0_sysclk7", | ||
| 104 | .parent = &pll0_clk, | ||
| 105 | .flags = CLK_PLL, | ||
| 106 | .div_reg = PLLDIV7, | ||
| 107 | }; | ||
| 108 | |||
| 109 | static struct clk i2c0_clk = { | ||
| 110 | .name = "i2c0", | ||
| 111 | .parent = &pll0_aux_clk, | ||
| 112 | }; | ||
| 113 | |||
| 114 | static struct clk timerp64_0_clk = { | ||
| 115 | .name = "timer0", | ||
| 116 | .parent = &pll0_aux_clk, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static struct clk timerp64_1_clk = { | ||
| 120 | .name = "timer1", | ||
| 121 | .parent = &pll0_aux_clk, | ||
| 122 | }; | ||
| 123 | |||
| 124 | static struct clk arm_rom_clk = { | ||
| 125 | .name = "arm_rom", | ||
| 126 | .parent = &pll0_sysclk2, | ||
| 127 | .lpsc = DA8XX_LPSC0_ARM_RAM_ROM, | ||
| 128 | .flags = ALWAYS_ENABLED, | ||
| 129 | }; | ||
| 130 | |||
| 131 | static struct clk scr0_ss_clk = { | ||
| 132 | .name = "scr0_ss", | ||
| 133 | .parent = &pll0_sysclk2, | ||
| 134 | .lpsc = DA8XX_LPSC0_SCR0_SS, | ||
| 135 | .flags = ALWAYS_ENABLED, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static struct clk scr1_ss_clk = { | ||
| 139 | .name = "scr1_ss", | ||
| 140 | .parent = &pll0_sysclk2, | ||
| 141 | .lpsc = DA8XX_LPSC0_SCR1_SS, | ||
| 142 | .flags = ALWAYS_ENABLED, | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct clk scr2_ss_clk = { | ||
| 146 | .name = "scr2_ss", | ||
| 147 | .parent = &pll0_sysclk2, | ||
| 148 | .lpsc = DA8XX_LPSC0_SCR2_SS, | ||
| 149 | .flags = ALWAYS_ENABLED, | ||
| 150 | }; | ||
| 151 | |||
| 152 | static struct clk dmax_clk = { | ||
| 153 | .name = "dmax", | ||
| 154 | .parent = &pll0_sysclk2, | ||
| 155 | .lpsc = DA8XX_LPSC0_DMAX, | ||
| 156 | .flags = ALWAYS_ENABLED, | ||
| 157 | }; | ||
| 158 | |||
| 159 | static struct clk tpcc_clk = { | ||
| 160 | .name = "tpcc", | ||
| 161 | .parent = &pll0_sysclk2, | ||
| 162 | .lpsc = DA8XX_LPSC0_TPCC, | ||
| 163 | .flags = ALWAYS_ENABLED | CLK_PSC, | ||
| 164 | }; | ||
| 165 | |||
| 166 | static struct clk tptc0_clk = { | ||
| 167 | .name = "tptc0", | ||
| 168 | .parent = &pll0_sysclk2, | ||
| 169 | .lpsc = DA8XX_LPSC0_TPTC0, | ||
| 170 | .flags = ALWAYS_ENABLED, | ||
| 171 | }; | ||
| 172 | |||
| 173 | static struct clk tptc1_clk = { | ||
| 174 | .name = "tptc1", | ||
| 175 | .parent = &pll0_sysclk2, | ||
| 176 | .lpsc = DA8XX_LPSC0_TPTC1, | ||
| 177 | .flags = ALWAYS_ENABLED, | ||
| 178 | }; | ||
| 179 | |||
| 180 | static struct clk mmcsd_clk = { | ||
| 181 | .name = "mmcsd", | ||
| 182 | .parent = &pll0_sysclk2, | ||
| 183 | .lpsc = DA8XX_LPSC0_MMC_SD, | ||
| 184 | }; | ||
| 185 | |||
| 186 | static struct clk uart0_clk = { | ||
| 187 | .name = "uart0", | ||
| 188 | .parent = &pll0_sysclk2, | ||
| 189 | .lpsc = DA8XX_LPSC0_UART0, | ||
| 190 | }; | ||
| 191 | |||
| 192 | static struct clk uart1_clk = { | ||
| 193 | .name = "uart1", | ||
| 194 | .parent = &pll0_sysclk2, | ||
| 195 | .lpsc = DA8XX_LPSC1_UART1, | ||
| 196 | .psc_ctlr = 1, | ||
| 197 | }; | ||
| 198 | |||
| 199 | static struct clk uart2_clk = { | ||
| 200 | .name = "uart2", | ||
| 201 | .parent = &pll0_sysclk2, | ||
| 202 | .lpsc = DA8XX_LPSC1_UART2, | ||
| 203 | .psc_ctlr = 1, | ||
| 204 | }; | ||
| 205 | |||
| 206 | static struct clk spi0_clk = { | ||
| 207 | .name = "spi0", | ||
| 208 | .parent = &pll0_sysclk2, | ||
| 209 | .lpsc = DA8XX_LPSC0_SPI0, | ||
| 210 | }; | ||
| 211 | |||
| 212 | static struct clk spi1_clk = { | ||
| 213 | .name = "spi1", | ||
| 214 | .parent = &pll0_sysclk2, | ||
| 215 | .lpsc = DA8XX_LPSC1_SPI1, | ||
| 216 | .psc_ctlr = 1, | ||
| 217 | }; | ||
| 218 | |||
| 219 | static struct clk ecap0_clk = { | ||
| 220 | .name = "ecap0", | ||
| 221 | .parent = &pll0_sysclk2, | ||
| 222 | .lpsc = DA8XX_LPSC1_ECAP, | ||
| 223 | .psc_ctlr = 1, | ||
| 224 | }; | ||
| 225 | |||
| 226 | static struct clk ecap1_clk = { | ||
| 227 | .name = "ecap1", | ||
| 228 | .parent = &pll0_sysclk2, | ||
| 229 | .lpsc = DA8XX_LPSC1_ECAP, | ||
| 230 | .psc_ctlr = 1, | ||
| 231 | }; | ||
| 232 | |||
| 233 | static struct clk ecap2_clk = { | ||
| 234 | .name = "ecap2", | ||
| 235 | .parent = &pll0_sysclk2, | ||
| 236 | .lpsc = DA8XX_LPSC1_ECAP, | ||
| 237 | .psc_ctlr = 1, | ||
| 238 | }; | ||
| 239 | |||
| 240 | static struct clk pwm0_clk = { | ||
| 241 | .name = "pwm0", | ||
| 242 | .parent = &pll0_sysclk2, | ||
| 243 | .lpsc = DA8XX_LPSC1_PWM, | ||
| 244 | .psc_ctlr = 1, | ||
| 245 | }; | ||
| 246 | |||
| 247 | static struct clk pwm1_clk = { | ||
| 248 | .name = "pwm1", | ||
| 249 | .parent = &pll0_sysclk2, | ||
| 250 | .lpsc = DA8XX_LPSC1_PWM, | ||
| 251 | .psc_ctlr = 1, | ||
| 252 | }; | ||
| 253 | |||
| 254 | static struct clk pwm2_clk = { | ||
| 255 | .name = "pwm2", | ||
| 256 | .parent = &pll0_sysclk2, | ||
| 257 | .lpsc = DA8XX_LPSC1_PWM, | ||
| 258 | .psc_ctlr = 1, | ||
| 259 | }; | ||
| 260 | |||
| 261 | static struct clk eqep0_clk = { | ||
| 262 | .name = "eqep0", | ||
| 263 | .parent = &pll0_sysclk2, | ||
| 264 | .lpsc = DA830_LPSC1_EQEP, | ||
| 265 | .psc_ctlr = 1, | ||
| 266 | }; | ||
| 267 | |||
| 268 | static struct clk eqep1_clk = { | ||
| 269 | .name = "eqep1", | ||
| 270 | .parent = &pll0_sysclk2, | ||
| 271 | .lpsc = DA830_LPSC1_EQEP, | ||
| 272 | .psc_ctlr = 1, | ||
| 273 | }; | ||
| 274 | |||
| 275 | static struct clk lcdc_clk = { | ||
| 276 | .name = "lcdc", | ||
| 277 | .parent = &pll0_sysclk2, | ||
| 278 | .lpsc = DA8XX_LPSC1_LCDC, | ||
| 279 | .psc_ctlr = 1, | ||
| 280 | }; | ||
| 281 | |||
| 282 | static struct clk mcasp0_clk = { | ||
| 283 | .name = "mcasp0", | ||
| 284 | .parent = &pll0_sysclk2, | ||
| 285 | .lpsc = DA8XX_LPSC1_McASP0, | ||
| 286 | .psc_ctlr = 1, | ||
| 287 | }; | ||
| 288 | |||
| 289 | static struct clk mcasp1_clk = { | ||
| 290 | .name = "mcasp1", | ||
| 291 | .parent = &pll0_sysclk2, | ||
| 292 | .lpsc = DA830_LPSC1_McASP1, | ||
| 293 | .psc_ctlr = 1, | ||
| 294 | }; | ||
| 295 | |||
| 296 | static struct clk mcasp2_clk = { | ||
| 297 | .name = "mcasp2", | ||
| 298 | .parent = &pll0_sysclk2, | ||
| 299 | .lpsc = DA830_LPSC1_McASP2, | ||
| 300 | .psc_ctlr = 1, | ||
| 301 | }; | ||
| 302 | |||
| 303 | static struct clk usb20_clk = { | ||
| 304 | .name = "usb20", | ||
| 305 | .parent = &pll0_sysclk2, | ||
| 306 | .lpsc = DA8XX_LPSC1_USB20, | ||
| 307 | .psc_ctlr = 1, | ||
| 308 | }; | ||
| 309 | |||
| 310 | static struct clk aemif_clk = { | ||
| 311 | .name = "aemif", | ||
| 312 | .parent = &pll0_sysclk3, | ||
| 313 | .lpsc = DA8XX_LPSC0_EMIF25, | ||
| 314 | .flags = ALWAYS_ENABLED, | ||
| 315 | }; | ||
| 316 | |||
| 317 | static struct clk aintc_clk = { | ||
| 318 | .name = "aintc", | ||
| 319 | .parent = &pll0_sysclk4, | ||
| 320 | .lpsc = DA8XX_LPSC0_AINTC, | ||
| 321 | .flags = ALWAYS_ENABLED, | ||
| 322 | }; | ||
| 323 | |||
| 324 | static struct clk secu_mgr_clk = { | ||
| 325 | .name = "secu_mgr", | ||
| 326 | .parent = &pll0_sysclk4, | ||
| 327 | .lpsc = DA8XX_LPSC0_SECU_MGR, | ||
| 328 | .flags = ALWAYS_ENABLED, | ||
| 329 | }; | ||
| 330 | |||
| 331 | static struct clk emac_clk = { | ||
| 332 | .name = "emac", | ||
| 333 | .parent = &pll0_sysclk4, | ||
| 334 | .lpsc = DA8XX_LPSC1_CPGMAC, | ||
| 335 | .psc_ctlr = 1, | ||
| 336 | }; | ||
| 337 | |||
| 338 | static struct clk gpio_clk = { | ||
| 339 | .name = "gpio", | ||
| 340 | .parent = &pll0_sysclk4, | ||
| 341 | .lpsc = DA8XX_LPSC1_GPIO, | ||
| 342 | .psc_ctlr = 1, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static struct clk i2c1_clk = { | ||
| 346 | .name = "i2c1", | ||
| 347 | .parent = &pll0_sysclk4, | ||
| 348 | .lpsc = DA8XX_LPSC1_I2C, | ||
| 349 | .psc_ctlr = 1, | ||
| 350 | }; | ||
| 351 | |||
| 352 | static struct clk usb11_clk = { | ||
| 353 | .name = "usb11", | ||
| 354 | .parent = &pll0_sysclk4, | ||
| 355 | .lpsc = DA8XX_LPSC1_USB11, | ||
| 356 | .psc_ctlr = 1, | ||
| 357 | }; | ||
| 358 | |||
| 359 | static struct clk emif3_clk = { | ||
| 360 | .name = "emif3", | ||
| 361 | .parent = &pll0_sysclk5, | ||
| 362 | .lpsc = DA8XX_LPSC1_EMIF3C, | ||
| 363 | .flags = ALWAYS_ENABLED, | ||
| 364 | .psc_ctlr = 1, | ||
| 365 | }; | ||
| 366 | |||
| 367 | static struct clk arm_clk = { | ||
| 368 | .name = "arm", | ||
| 369 | .parent = &pll0_sysclk6, | ||
| 370 | .lpsc = DA8XX_LPSC0_ARM, | ||
| 371 | .flags = ALWAYS_ENABLED, | ||
| 372 | }; | ||
| 373 | |||
| 374 | static struct clk rmii_clk = { | ||
| 375 | .name = "rmii", | ||
| 376 | .parent = &pll0_sysclk7, | ||
| 377 | }; | ||
| 378 | |||
| 379 | static struct davinci_clk da830_clks[] = { | ||
| 380 | CLK(NULL, "ref", &ref_clk), | ||
| 381 | CLK(NULL, "pll0", &pll0_clk), | ||
| 382 | CLK(NULL, "pll0_aux", &pll0_aux_clk), | ||
| 383 | CLK(NULL, "pll0_sysclk2", &pll0_sysclk2), | ||
| 384 | CLK(NULL, "pll0_sysclk3", &pll0_sysclk3), | ||
| 385 | CLK(NULL, "pll0_sysclk4", &pll0_sysclk4), | ||
| 386 | CLK(NULL, "pll0_sysclk5", &pll0_sysclk5), | ||
| 387 | CLK(NULL, "pll0_sysclk6", &pll0_sysclk6), | ||
| 388 | CLK(NULL, "pll0_sysclk7", &pll0_sysclk7), | ||
| 389 | CLK("i2c_davinci.1", NULL, &i2c0_clk), | ||
| 390 | CLK(NULL, "timer0", &timerp64_0_clk), | ||
| 391 | CLK("watchdog", NULL, &timerp64_1_clk), | ||
| 392 | CLK(NULL, "arm_rom", &arm_rom_clk), | ||
| 393 | CLK(NULL, "scr0_ss", &scr0_ss_clk), | ||
| 394 | CLK(NULL, "scr1_ss", &scr1_ss_clk), | ||
| 395 | CLK(NULL, "scr2_ss", &scr2_ss_clk), | ||
| 396 | CLK(NULL, "dmax", &dmax_clk), | ||
| 397 | CLK(NULL, "tpcc", &tpcc_clk), | ||
| 398 | CLK(NULL, "tptc0", &tptc0_clk), | ||
| 399 | CLK(NULL, "tptc1", &tptc1_clk), | ||
| 400 | CLK("davinci_mmc.0", NULL, &mmcsd_clk), | ||
| 401 | CLK(NULL, "uart0", &uart0_clk), | ||
| 402 | CLK(NULL, "uart1", &uart1_clk), | ||
| 403 | CLK(NULL, "uart2", &uart2_clk), | ||
| 404 | CLK("dm_spi.0", NULL, &spi0_clk), | ||
| 405 | CLK("dm_spi.1", NULL, &spi1_clk), | ||
| 406 | CLK(NULL, "ecap0", &ecap0_clk), | ||
| 407 | CLK(NULL, "ecap1", &ecap1_clk), | ||
| 408 | CLK(NULL, "ecap2", &ecap2_clk), | ||
| 409 | CLK(NULL, "pwm0", &pwm0_clk), | ||
| 410 | CLK(NULL, "pwm1", &pwm1_clk), | ||
| 411 | CLK(NULL, "pwm2", &pwm2_clk), | ||
| 412 | CLK("eqep.0", NULL, &eqep0_clk), | ||
| 413 | CLK("eqep.1", NULL, &eqep1_clk), | ||
| 414 | CLK("da830_lcdc", NULL, &lcdc_clk), | ||
| 415 | CLK("davinci-mcasp.0", NULL, &mcasp0_clk), | ||
| 416 | CLK("davinci-mcasp.1", NULL, &mcasp1_clk), | ||
| 417 | CLK("davinci-mcasp.2", NULL, &mcasp2_clk), | ||
| 418 | CLK("musb_hdrc", NULL, &usb20_clk), | ||
| 419 | CLK(NULL, "aemif", &aemif_clk), | ||
| 420 | CLK(NULL, "aintc", &aintc_clk), | ||
| 421 | CLK(NULL, "secu_mgr", &secu_mgr_clk), | ||
| 422 | CLK("davinci_emac.1", NULL, &emac_clk), | ||
| 423 | CLK(NULL, "gpio", &gpio_clk), | ||
| 424 | CLK("i2c_davinci.2", NULL, &i2c1_clk), | ||
| 425 | CLK(NULL, "usb11", &usb11_clk), | ||
| 426 | CLK(NULL, "emif3", &emif3_clk), | ||
| 427 | CLK(NULL, "arm", &arm_clk), | ||
| 428 | CLK(NULL, "rmii", &rmii_clk), | ||
| 429 | CLK(NULL, NULL, NULL), | ||
| 430 | }; | ||
| 431 | |||
| 432 | /* | ||
| 433 | * Device specific mux setup | ||
| 434 | * | ||
| 435 | * soc description mux mode mode mux dbg | ||
| 436 | * reg offset mask mode | ||
| 437 | */ | ||
| 438 | static const struct mux_config da830_pins[] = { | ||
| 439 | #ifdef CONFIG_DAVINCI_MUX | ||
| 440 | MUX_CFG(DA830, GPIO7_14, 0, 0, 0xf, 1, false) | ||
| 441 | MUX_CFG(DA830, RTCK, 0, 0, 0xf, 8, false) | ||
| 442 | MUX_CFG(DA830, GPIO7_15, 0, 4, 0xf, 1, false) | ||
| 443 | MUX_CFG(DA830, EMU_0, 0, 4, 0xf, 8, false) | ||
| 444 | MUX_CFG(DA830, EMB_SDCKE, 0, 8, 0xf, 1, false) | ||
| 445 | MUX_CFG(DA830, EMB_CLK_GLUE, 0, 12, 0xf, 1, false) | ||
| 446 | MUX_CFG(DA830, EMB_CLK, 0, 12, 0xf, 2, false) | ||
| 447 | MUX_CFG(DA830, NEMB_CS_0, 0, 16, 0xf, 1, false) | ||
| 448 | MUX_CFG(DA830, NEMB_CAS, 0, 20, 0xf, 1, false) | ||
| 449 | MUX_CFG(DA830, NEMB_RAS, 0, 24, 0xf, 1, false) | ||
| 450 | MUX_CFG(DA830, NEMB_WE, 0, 28, 0xf, 1, false) | ||
| 451 | MUX_CFG(DA830, EMB_BA_1, 1, 0, 0xf, 1, false) | ||
| 452 | MUX_CFG(DA830, EMB_BA_0, 1, 4, 0xf, 1, false) | ||
| 453 | MUX_CFG(DA830, EMB_A_0, 1, 8, 0xf, 1, false) | ||
| 454 | MUX_CFG(DA830, EMB_A_1, 1, 12, 0xf, 1, false) | ||
| 455 | MUX_CFG(DA830, EMB_A_2, 1, 16, 0xf, 1, false) | ||
| 456 | MUX_CFG(DA830, EMB_A_3, 1, 20, 0xf, 1, false) | ||
| 457 | MUX_CFG(DA830, EMB_A_4, 1, 24, 0xf, 1, false) | ||
| 458 | MUX_CFG(DA830, EMB_A_5, 1, 28, 0xf, 1, false) | ||
| 459 | MUX_CFG(DA830, GPIO7_0, 1, 0, 0xf, 8, false) | ||
| 460 | MUX_CFG(DA830, GPIO7_1, 1, 4, 0xf, 8, false) | ||
| 461 | MUX_CFG(DA830, GPIO7_2, 1, 8, 0xf, 8, false) | ||
| 462 | MUX_CFG(DA830, GPIO7_3, 1, 12, 0xf, 8, false) | ||
| 463 | MUX_CFG(DA830, GPIO7_4, 1, 16, 0xf, 8, false) | ||
| 464 | MUX_CFG(DA830, GPIO7_5, 1, 20, 0xf, 8, false) | ||
| 465 | MUX_CFG(DA830, GPIO7_6, 1, 24, 0xf, 8, false) | ||
| 466 | MUX_CFG(DA830, GPIO7_7, 1, 28, 0xf, 8, false) | ||
| 467 | MUX_CFG(DA830, EMB_A_6, 2, 0, 0xf, 1, false) | ||
| 468 | MUX_CFG(DA830, EMB_A_7, 2, 4, 0xf, 1, false) | ||
| 469 | MUX_CFG(DA830, EMB_A_8, 2, 8, 0xf, 1, false) | ||
| 470 | MUX_CFG(DA830, EMB_A_9, 2, 12, 0xf, 1, false) | ||
| 471 | MUX_CFG(DA830, EMB_A_10, 2, 16, 0xf, 1, false) | ||
| 472 | MUX_CFG(DA830, EMB_A_11, 2, 20, 0xf, 1, false) | ||
| 473 | MUX_CFG(DA830, EMB_A_12, 2, 24, 0xf, 1, false) | ||
| 474 | MUX_CFG(DA830, EMB_D_31, 2, 28, 0xf, 1, false) | ||
| 475 | MUX_CFG(DA830, GPIO7_8, 2, 0, 0xf, 8, false) | ||
| 476 | MUX_CFG(DA830, GPIO7_9, 2, 4, 0xf, 8, false) | ||
| 477 | MUX_CFG(DA830, GPIO7_10, 2, 8, 0xf, 8, false) | ||
| 478 | MUX_CFG(DA830, GPIO7_11, 2, 12, 0xf, 8, false) | ||
| 479 | MUX_CFG(DA830, GPIO7_12, 2, 16, 0xf, 8, false) | ||
| 480 | MUX_CFG(DA830, GPIO7_13, 2, 20, 0xf, 8, false) | ||
| 481 | MUX_CFG(DA830, GPIO3_13, 2, 24, 0xf, 8, false) | ||
| 482 | MUX_CFG(DA830, EMB_D_30, 3, 0, 0xf, 1, false) | ||
| 483 | MUX_CFG(DA830, EMB_D_29, 3, 4, 0xf, 1, false) | ||
| 484 | MUX_CFG(DA830, EMB_D_28, 3, 8, 0xf, 1, false) | ||
| 485 | MUX_CFG(DA830, EMB_D_27, 3, 12, 0xf, 1, false) | ||
| 486 | MUX_CFG(DA830, EMB_D_26, 3, 16, 0xf, 1, false) | ||
| 487 | MUX_CFG(DA830, EMB_D_25, 3, 20, 0xf, 1, false) | ||
| 488 | MUX_CFG(DA830, EMB_D_24, 3, 24, 0xf, 1, false) | ||
| 489 | MUX_CFG(DA830, EMB_D_23, 3, 28, 0xf, 1, false) | ||
| 490 | MUX_CFG(DA830, EMB_D_22, 4, 0, 0xf, 1, false) | ||
| 491 | MUX_CFG(DA830, EMB_D_21, 4, 4, 0xf, 1, false) | ||
| 492 | MUX_CFG(DA830, EMB_D_20, 4, 8, 0xf, 1, false) | ||
| 493 | MUX_CFG(DA830, EMB_D_19, 4, 12, 0xf, 1, false) | ||
| 494 | MUX_CFG(DA830, EMB_D_18, 4, 16, 0xf, 1, false) | ||
| 495 | MUX_CFG(DA830, EMB_D_17, 4, 20, 0xf, 1, false) | ||
| 496 | MUX_CFG(DA830, EMB_D_16, 4, 24, 0xf, 1, false) | ||
| 497 | MUX_CFG(DA830, NEMB_WE_DQM_3, 4, 28, 0xf, 1, false) | ||
| 498 | MUX_CFG(DA830, NEMB_WE_DQM_2, 5, 0, 0xf, 1, false) | ||
| 499 | MUX_CFG(DA830, EMB_D_0, 5, 4, 0xf, 1, false) | ||
| 500 | MUX_CFG(DA830, EMB_D_1, 5, 8, 0xf, 1, false) | ||
| 501 | MUX_CFG(DA830, EMB_D_2, 5, 12, 0xf, 1, false) | ||
| 502 | MUX_CFG(DA830, EMB_D_3, 5, 16, 0xf, 1, false) | ||
| 503 | MUX_CFG(DA830, EMB_D_4, 5, 20, 0xf, 1, false) | ||
| 504 | MUX_CFG(DA830, EMB_D_5, 5, 24, 0xf, 1, false) | ||
| 505 | MUX_CFG(DA830, EMB_D_6, 5, 28, 0xf, 1, false) | ||
| 506 | MUX_CFG(DA830, GPIO6_0, 5, 4, 0xf, 8, false) | ||
| 507 | MUX_CFG(DA830, GPIO6_1, 5, 8, 0xf, 8, false) | ||
| 508 | MUX_CFG(DA830, GPIO6_2, 5, 12, 0xf, 8, false) | ||
| 509 | MUX_CFG(DA830, GPIO6_3, 5, 16, 0xf, 8, false) | ||
| 510 | MUX_CFG(DA830, GPIO6_4, 5, 20, 0xf, 8, false) | ||
| 511 | MUX_CFG(DA830, GPIO6_5, 5, 24, 0xf, 8, false) | ||
| 512 | MUX_CFG(DA830, GPIO6_6, 5, 28, 0xf, 8, false) | ||
| 513 | MUX_CFG(DA830, EMB_D_7, 6, 0, 0xf, 1, false) | ||
| 514 | MUX_CFG(DA830, EMB_D_8, 6, 4, 0xf, 1, false) | ||
| 515 | MUX_CFG(DA830, EMB_D_9, 6, 8, 0xf, 1, false) | ||
| 516 | MUX_CFG(DA830, EMB_D_10, 6, 12, 0xf, 1, false) | ||
| 517 | MUX_CFG(DA830, EMB_D_11, 6, 16, 0xf, 1, false) | ||
| 518 | MUX_CFG(DA830, EMB_D_12, 6, 20, 0xf, 1, false) | ||
| 519 | MUX_CFG(DA830, EMB_D_13, 6, 24, 0xf, 1, false) | ||
| 520 | MUX_CFG(DA830, EMB_D_14, 6, 28, 0xf, 1, false) | ||
| 521 | MUX_CFG(DA830, GPIO6_7, 6, 0, 0xf, 8, false) | ||
| 522 | MUX_CFG(DA830, GPIO6_8, 6, 4, 0xf, 8, false) | ||
| 523 | MUX_CFG(DA830, GPIO6_9, 6, 8, 0xf, 8, false) | ||
| 524 | MUX_CFG(DA830, GPIO6_10, 6, 12, 0xf, 8, false) | ||
| 525 | MUX_CFG(DA830, GPIO6_11, 6, 16, 0xf, 8, false) | ||
| 526 | MUX_CFG(DA830, GPIO6_12, 6, 20, 0xf, 8, false) | ||
| 527 | MUX_CFG(DA830, GPIO6_13, 6, 24, 0xf, 8, false) | ||
| 528 | MUX_CFG(DA830, GPIO6_14, 6, 28, 0xf, 8, false) | ||
| 529 | MUX_CFG(DA830, EMB_D_15, 7, 0, 0xf, 1, false) | ||
| 530 | MUX_CFG(DA830, NEMB_WE_DQM_1, 7, 4, 0xf, 1, false) | ||
| 531 | MUX_CFG(DA830, NEMB_WE_DQM_0, 7, 8, 0xf, 1, false) | ||
| 532 | MUX_CFG(DA830, SPI0_SOMI_0, 7, 12, 0xf, 1, false) | ||
| 533 | MUX_CFG(DA830, SPI0_SIMO_0, 7, 16, 0xf, 1, false) | ||
| 534 | MUX_CFG(DA830, SPI0_CLK, 7, 20, 0xf, 1, false) | ||
| 535 | MUX_CFG(DA830, NSPI0_ENA, 7, 24, 0xf, 1, false) | ||
| 536 | MUX_CFG(DA830, NSPI0_SCS_0, 7, 28, 0xf, 1, false) | ||
| 537 | MUX_CFG(DA830, EQEP0I, 7, 12, 0xf, 2, false) | ||
| 538 | MUX_CFG(DA830, EQEP0S, 7, 16, 0xf, 2, false) | ||
| 539 | MUX_CFG(DA830, EQEP1I, 7, 20, 0xf, 2, false) | ||
| 540 | MUX_CFG(DA830, NUART0_CTS, 7, 24, 0xf, 2, false) | ||
| 541 | MUX_CFG(DA830, NUART0_RTS, 7, 28, 0xf, 2, false) | ||
| 542 | MUX_CFG(DA830, EQEP0A, 7, 24, 0xf, 4, false) | ||
| 543 | MUX_CFG(DA830, EQEP0B, 7, 28, 0xf, 4, false) | ||
| 544 | MUX_CFG(DA830, GPIO6_15, 7, 0, 0xf, 8, false) | ||
| 545 | MUX_CFG(DA830, GPIO5_14, 7, 4, 0xf, 8, false) | ||
| 546 | MUX_CFG(DA830, GPIO5_15, 7, 8, 0xf, 8, false) | ||
| 547 | MUX_CFG(DA830, GPIO5_0, 7, 12, 0xf, 8, false) | ||
| 548 | MUX_CFG(DA830, GPIO5_1, 7, 16, 0xf, 8, false) | ||
| 549 | MUX_CFG(DA830, GPIO5_2, 7, 20, 0xf, 8, false) | ||
| 550 | MUX_CFG(DA830, GPIO5_3, 7, 24, 0xf, 8, false) | ||
| 551 | MUX_CFG(DA830, GPIO5_4, 7, 28, 0xf, 8, false) | ||
| 552 | MUX_CFG(DA830, SPI1_SOMI_0, 8, 0, 0xf, 1, false) | ||
| 553 | MUX_CFG(DA830, SPI1_SIMO_0, 8, 4, 0xf, 1, false) | ||
| 554 | MUX_CFG(DA830, SPI1_CLK, 8, 8, 0xf, 1, false) | ||
| 555 | MUX_CFG(DA830, UART0_RXD, 8, 12, 0xf, 1, false) | ||
| 556 | MUX_CFG(DA830, UART0_TXD, 8, 16, 0xf, 1, false) | ||
| 557 | MUX_CFG(DA830, AXR1_10, 8, 20, 0xf, 1, false) | ||
| 558 | MUX_CFG(DA830, AXR1_11, 8, 24, 0xf, 1, false) | ||
| 559 | MUX_CFG(DA830, NSPI1_ENA, 8, 28, 0xf, 1, false) | ||
| 560 | MUX_CFG(DA830, I2C1_SCL, 8, 0, 0xf, 2, false) | ||
| 561 | MUX_CFG(DA830, I2C1_SDA, 8, 4, 0xf, 2, false) | ||
| 562 | MUX_CFG(DA830, EQEP1S, 8, 8, 0xf, 2, false) | ||
| 563 | MUX_CFG(DA830, I2C0_SDA, 8, 12, 0xf, 2, false) | ||
| 564 | MUX_CFG(DA830, I2C0_SCL, 8, 16, 0xf, 2, false) | ||
| 565 | MUX_CFG(DA830, UART2_RXD, 8, 28, 0xf, 2, false) | ||
| 566 | MUX_CFG(DA830, TM64P0_IN12, 8, 12, 0xf, 4, false) | ||
| 567 | MUX_CFG(DA830, TM64P0_OUT12, 8, 16, 0xf, 4, false) | ||
| 568 | MUX_CFG(DA830, GPIO5_5, 8, 0, 0xf, 8, false) | ||
| 569 | MUX_CFG(DA830, GPIO5_6, 8, 4, 0xf, 8, false) | ||
| 570 | MUX_CFG(DA830, GPIO5_7, 8, 8, 0xf, 8, false) | ||
| 571 | MUX_CFG(DA830, GPIO5_8, 8, 12, 0xf, 8, false) | ||
| 572 | MUX_CFG(DA830, GPIO5_9, 8, 16, 0xf, 8, false) | ||
| 573 | MUX_CFG(DA830, GPIO5_10, 8, 20, 0xf, 8, false) | ||
| 574 | MUX_CFG(DA830, GPIO5_11, 8, 24, 0xf, 8, false) | ||
| 575 | MUX_CFG(DA830, GPIO5_12, 8, 28, 0xf, 8, false) | ||
| 576 | MUX_CFG(DA830, NSPI1_SCS_0, 9, 0, 0xf, 1, false) | ||
| 577 | MUX_CFG(DA830, USB0_DRVVBUS, 9, 4, 0xf, 1, false) | ||
| 578 | MUX_CFG(DA830, AHCLKX0, 9, 8, 0xf, 1, false) | ||
| 579 | MUX_CFG(DA830, ACLKX0, 9, 12, 0xf, 1, false) | ||
| 580 | MUX_CFG(DA830, AFSX0, 9, 16, 0xf, 1, false) | ||
| 581 | MUX_CFG(DA830, AHCLKR0, 9, 20, 0xf, 1, false) | ||
| 582 | MUX_CFG(DA830, ACLKR0, 9, 24, 0xf, 1, false) | ||
| 583 | MUX_CFG(DA830, AFSR0, 9, 28, 0xf, 1, false) | ||
| 584 | MUX_CFG(DA830, UART2_TXD, 9, 0, 0xf, 2, false) | ||
| 585 | MUX_CFG(DA830, AHCLKX2, 9, 8, 0xf, 2, false) | ||
| 586 | MUX_CFG(DA830, ECAP0_APWM0, 9, 12, 0xf, 2, false) | ||
| 587 | MUX_CFG(DA830, RMII_MHZ_50_CLK, 9, 20, 0xf, 2, false) | ||
| 588 | MUX_CFG(DA830, ECAP1_APWM1, 9, 24, 0xf, 2, false) | ||
| 589 | MUX_CFG(DA830, USB_REFCLKIN, 9, 8, 0xf, 4, false) | ||
| 590 | MUX_CFG(DA830, GPIO5_13, 9, 0, 0xf, 8, false) | ||
| 591 | MUX_CFG(DA830, GPIO4_15, 9, 4, 0xf, 8, false) | ||
| 592 | MUX_CFG(DA830, GPIO2_11, 9, 8, 0xf, 8, false) | ||
| 593 | MUX_CFG(DA830, GPIO2_12, 9, 12, 0xf, 8, false) | ||
| 594 | MUX_CFG(DA830, GPIO2_13, 9, 16, 0xf, 8, false) | ||
| 595 | MUX_CFG(DA830, GPIO2_14, 9, 20, 0xf, 8, false) | ||
| 596 | MUX_CFG(DA830, GPIO2_15, 9, 24, 0xf, 8, false) | ||
| 597 | MUX_CFG(DA830, GPIO3_12, 9, 28, 0xf, 8, false) | ||
| 598 | MUX_CFG(DA830, AMUTE0, 10, 0, 0xf, 1, false) | ||
| 599 | MUX_CFG(DA830, AXR0_0, 10, 4, 0xf, 1, false) | ||
| 600 | MUX_CFG(DA830, AXR0_1, 10, 8, 0xf, 1, false) | ||
| 601 | MUX_CFG(DA830, AXR0_2, 10, 12, 0xf, 1, false) | ||
| 602 | MUX_CFG(DA830, AXR0_3, 10, 16, 0xf, 1, false) | ||
| 603 | MUX_CFG(DA830, AXR0_4, 10, 20, 0xf, 1, false) | ||
| 604 | MUX_CFG(DA830, AXR0_5, 10, 24, 0xf, 1, false) | ||
| 605 | MUX_CFG(DA830, AXR0_6, 10, 28, 0xf, 1, false) | ||
| 606 | MUX_CFG(DA830, RMII_TXD_0, 10, 4, 0xf, 2, false) | ||
| 607 | MUX_CFG(DA830, RMII_TXD_1, 10, 8, 0xf, 2, false) | ||
| 608 | MUX_CFG(DA830, RMII_TXEN, 10, 12, 0xf, 2, false) | ||
| 609 | MUX_CFG(DA830, RMII_CRS_DV, 10, 16, 0xf, 2, false) | ||
| 610 | MUX_CFG(DA830, RMII_RXD_0, 10, 20, 0xf, 2, false) | ||
| 611 | MUX_CFG(DA830, RMII_RXD_1, 10, 24, 0xf, 2, false) | ||
| 612 | MUX_CFG(DA830, RMII_RXER, 10, 28, 0xf, 2, false) | ||
| 613 | MUX_CFG(DA830, AFSR2, 10, 4, 0xf, 4, false) | ||
| 614 | MUX_CFG(DA830, ACLKX2, 10, 8, 0xf, 4, false) | ||
| 615 | MUX_CFG(DA830, AXR2_3, 10, 12, 0xf, 4, false) | ||
| 616 | MUX_CFG(DA830, AXR2_2, 10, 16, 0xf, 4, false) | ||
| 617 | MUX_CFG(DA830, AXR2_1, 10, 20, 0xf, 4, false) | ||
| 618 | MUX_CFG(DA830, AFSX2, 10, 24, 0xf, 4, false) | ||
| 619 | MUX_CFG(DA830, ACLKR2, 10, 28, 0xf, 4, false) | ||
| 620 | MUX_CFG(DA830, NRESETOUT, 10, 0, 0xf, 8, false) | ||
| 621 | MUX_CFG(DA830, GPIO3_0, 10, 4, 0xf, 8, false) | ||
| 622 | MUX_CFG(DA830, GPIO3_1, 10, 8, 0xf, 8, false) | ||
| 623 | MUX_CFG(DA830, GPIO3_2, 10, 12, 0xf, 8, false) | ||
| 624 | MUX_CFG(DA830, GPIO3_3, 10, 16, 0xf, 8, false) | ||
| 625 | MUX_CFG(DA830, GPIO3_4, 10, 20, 0xf, 8, false) | ||
| 626 | MUX_CFG(DA830, GPIO3_5, 10, 24, 0xf, 8, false) | ||
| 627 | MUX_CFG(DA830, GPIO3_6, 10, 28, 0xf, 8, false) | ||
| 628 | MUX_CFG(DA830, AXR0_7, 11, 0, 0xf, 1, false) | ||
| 629 | MUX_CFG(DA830, AXR0_8, 11, 4, 0xf, 1, false) | ||
| 630 | MUX_CFG(DA830, UART1_RXD, 11, 8, 0xf, 1, false) | ||
| 631 | MUX_CFG(DA830, UART1_TXD, 11, 12, 0xf, 1, false) | ||
| 632 | MUX_CFG(DA830, AXR0_11, 11, 16, 0xf, 1, false) | ||
| 633 | MUX_CFG(DA830, AHCLKX1, 11, 20, 0xf, 1, false) | ||
| 634 | MUX_CFG(DA830, ACLKX1, 11, 24, 0xf, 1, false) | ||
| 635 | MUX_CFG(DA830, AFSX1, 11, 28, 0xf, 1, false) | ||
| 636 | MUX_CFG(DA830, MDIO_CLK, 11, 0, 0xf, 2, false) | ||
| 637 | MUX_CFG(DA830, MDIO_D, 11, 4, 0xf, 2, false) | ||
| 638 | MUX_CFG(DA830, AXR0_9, 11, 8, 0xf, 2, false) | ||
| 639 | MUX_CFG(DA830, AXR0_10, 11, 12, 0xf, 2, false) | ||
| 640 | MUX_CFG(DA830, EPWM0B, 11, 20, 0xf, 2, false) | ||
| 641 | MUX_CFG(DA830, EPWM0A, 11, 24, 0xf, 2, false) | ||
| 642 | MUX_CFG(DA830, EPWMSYNCI, 11, 28, 0xf, 2, false) | ||
| 643 | MUX_CFG(DA830, AXR2_0, 11, 16, 0xf, 4, false) | ||
| 644 | MUX_CFG(DA830, EPWMSYNC0, 11, 28, 0xf, 4, false) | ||
| 645 | MUX_CFG(DA830, GPIO3_7, 11, 0, 0xf, 8, false) | ||
| 646 | MUX_CFG(DA830, GPIO3_8, 11, 4, 0xf, 8, false) | ||
| 647 | MUX_CFG(DA830, GPIO3_9, 11, 8, 0xf, 8, false) | ||
| 648 | MUX_CFG(DA830, GPIO3_10, 11, 12, 0xf, 8, false) | ||
| 649 | MUX_CFG(DA830, GPIO3_11, 11, 16, 0xf, 8, false) | ||
| 650 | MUX_CFG(DA830, GPIO3_14, 11, 20, 0xf, 8, false) | ||
| 651 | MUX_CFG(DA830, GPIO3_15, 11, 24, 0xf, 8, false) | ||
| 652 | MUX_CFG(DA830, GPIO4_10, 11, 28, 0xf, 8, false) | ||
| 653 | MUX_CFG(DA830, AHCLKR1, 12, 0, 0xf, 1, false) | ||
| 654 | MUX_CFG(DA830, ACLKR1, 12, 4, 0xf, 1, false) | ||
| 655 | MUX_CFG(DA830, AFSR1, 12, 8, 0xf, 1, false) | ||
| 656 | MUX_CFG(DA830, AMUTE1, 12, 12, 0xf, 1, false) | ||
| 657 | MUX_CFG(DA830, AXR1_0, 12, 16, 0xf, 1, false) | ||
| 658 | MUX_CFG(DA830, AXR1_1, 12, 20, 0xf, 1, false) | ||
| 659 | MUX_CFG(DA830, AXR1_2, 12, 24, 0xf, 1, false) | ||
| 660 | MUX_CFG(DA830, AXR1_3, 12, 28, 0xf, 1, false) | ||
| 661 | MUX_CFG(DA830, ECAP2_APWM2, 12, 4, 0xf, 2, false) | ||
| 662 | MUX_CFG(DA830, EHRPWMGLUETZ, 12, 12, 0xf, 2, false) | ||
| 663 | MUX_CFG(DA830, EQEP1A, 12, 28, 0xf, 2, false) | ||
| 664 | MUX_CFG(DA830, GPIO4_11, 12, 0, 0xf, 8, false) | ||
| 665 | MUX_CFG(DA830, GPIO4_12, 12, 4, 0xf, 8, false) | ||
| 666 | MUX_CFG(DA830, GPIO4_13, 12, 8, 0xf, 8, false) | ||
| 667 | MUX_CFG(DA830, GPIO4_14, 12, 12, 0xf, 8, false) | ||
| 668 | MUX_CFG(DA830, GPIO4_0, 12, 16, 0xf, 8, false) | ||
| 669 | MUX_CFG(DA830, GPIO4_1, 12, 20, 0xf, 8, false) | ||
| 670 | MUX_CFG(DA830, GPIO4_2, 12, 24, 0xf, 8, false) | ||
| 671 | MUX_CFG(DA830, GPIO4_3, 12, 28, 0xf, 8, false) | ||
| 672 | MUX_CFG(DA830, AXR1_4, 13, 0, 0xf, 1, false) | ||
| 673 | MUX_CFG(DA830, AXR1_5, 13, 4, 0xf, 1, false) | ||
| 674 | MUX_CFG(DA830, AXR1_6, 13, 8, 0xf, 1, false) | ||
| 675 | MUX_CFG(DA830, AXR1_7, 13, 12, 0xf, 1, false) | ||
| 676 | MUX_CFG(DA830, AXR1_8, 13, 16, 0xf, 1, false) | ||
| 677 | MUX_CFG(DA830, AXR1_9, 13, 20, 0xf, 1, false) | ||
| 678 | MUX_CFG(DA830, EMA_D_0, 13, 24, 0xf, 1, false) | ||
| 679 | MUX_CFG(DA830, EMA_D_1, 13, 28, 0xf, 1, false) | ||
| 680 | MUX_CFG(DA830, EQEP1B, 13, 0, 0xf, 2, false) | ||
| 681 | MUX_CFG(DA830, EPWM2B, 13, 4, 0xf, 2, false) | ||
| 682 | MUX_CFG(DA830, EPWM2A, 13, 8, 0xf, 2, false) | ||
| 683 | MUX_CFG(DA830, EPWM1B, 13, 12, 0xf, 2, false) | ||
| 684 | MUX_CFG(DA830, EPWM1A, 13, 16, 0xf, 2, false) | ||
| 685 | MUX_CFG(DA830, MMCSD_DAT_0, 13, 24, 0xf, 2, false) | ||
| 686 | MUX_CFG(DA830, MMCSD_DAT_1, 13, 28, 0xf, 2, false) | ||
| 687 | MUX_CFG(DA830, UHPI_HD_0, 13, 24, 0xf, 4, false) | ||
| 688 | MUX_CFG(DA830, UHPI_HD_1, 13, 28, 0xf, 4, false) | ||
| 689 | MUX_CFG(DA830, GPIO4_4, 13, 0, 0xf, 8, false) | ||
| 690 | MUX_CFG(DA830, GPIO4_5, 13, 4, 0xf, 8, false) | ||
| 691 | MUX_CFG(DA830, GPIO4_6, 13, 8, 0xf, 8, false) | ||
| 692 | MUX_CFG(DA830, GPIO4_7, 13, 12, 0xf, 8, false) | ||
| 693 | MUX_CFG(DA830, GPIO4_8, 13, 16, 0xf, 8, false) | ||
| 694 | MUX_CFG(DA830, GPIO4_9, 13, 20, 0xf, 8, false) | ||
| 695 | MUX_CFG(DA830, GPIO0_0, 13, 24, 0xf, 8, false) | ||
| 696 | MUX_CFG(DA830, GPIO0_1, 13, 28, 0xf, 8, false) | ||
| 697 | MUX_CFG(DA830, EMA_D_2, 14, 0, 0xf, 1, false) | ||
| 698 | MUX_CFG(DA830, EMA_D_3, 14, 4, 0xf, 1, false) | ||
| 699 | MUX_CFG(DA830, EMA_D_4, 14, 8, 0xf, 1, false) | ||
| 700 | MUX_CFG(DA830, EMA_D_5, 14, 12, 0xf, 1, false) | ||
| 701 | MUX_CFG(DA830, EMA_D_6, 14, 16, 0xf, 1, false) | ||
| 702 | MUX_CFG(DA830, EMA_D_7, 14, 20, 0xf, 1, false) | ||
| 703 | MUX_CFG(DA830, EMA_D_8, 14, 24, 0xf, 1, false) | ||
| 704 | MUX_CFG(DA830, EMA_D_9, 14, 28, 0xf, 1, false) | ||
| 705 | MUX_CFG(DA830, MMCSD_DAT_2, 14, 0, 0xf, 2, false) | ||
| 706 | MUX_CFG(DA830, MMCSD_DAT_3, 14, 4, 0xf, 2, false) | ||
| 707 | MUX_CFG(DA830, MMCSD_DAT_4, 14, 8, 0xf, 2, false) | ||
| 708 | MUX_CFG(DA830, MMCSD_DAT_5, 14, 12, 0xf, 2, false) | ||
| 709 | MUX_CFG(DA830, MMCSD_DAT_6, 14, 16, 0xf, 2, false) | ||
| 710 | MUX_CFG(DA830, MMCSD_DAT_7, 14, 20, 0xf, 2, false) | ||
| 711 | MUX_CFG(DA830, UHPI_HD_8, 14, 24, 0xf, 2, false) | ||
| 712 | MUX_CFG(DA830, UHPI_HD_9, 14, 28, 0xf, 2, false) | ||
| 713 | MUX_CFG(DA830, UHPI_HD_2, 14, 0, 0xf, 4, false) | ||
| 714 | MUX_CFG(DA830, UHPI_HD_3, 14, 4, 0xf, 4, false) | ||
| 715 | MUX_CFG(DA830, UHPI_HD_4, 14, 8, 0xf, 4, false) | ||
| 716 | MUX_CFG(DA830, UHPI_HD_5, 14, 12, 0xf, 4, false) | ||
| 717 | MUX_CFG(DA830, UHPI_HD_6, 14, 16, 0xf, 4, false) | ||
| 718 | MUX_CFG(DA830, UHPI_HD_7, 14, 20, 0xf, 4, false) | ||
| 719 | MUX_CFG(DA830, LCD_D_8, 14, 24, 0xf, 4, false) | ||
| 720 | MUX_CFG(DA830, LCD_D_9, 14, 28, 0xf, 4, false) | ||
| 721 | MUX_CFG(DA830, GPIO0_2, 14, 0, 0xf, 8, false) | ||
| 722 | MUX_CFG(DA830, GPIO0_3, 14, 4, 0xf, 8, false) | ||
| 723 | MUX_CFG(DA830, GPIO0_4, 14, 8, 0xf, 8, false) | ||
| 724 | MUX_CFG(DA830, GPIO0_5, 14, 12, 0xf, 8, false) | ||
| 725 | MUX_CFG(DA830, GPIO0_6, 14, 16, 0xf, 8, false) | ||
| 726 | MUX_CFG(DA830, GPIO0_7, 14, 20, 0xf, 8, false) | ||
| 727 | MUX_CFG(DA830, GPIO0_8, 14, 24, 0xf, 8, false) | ||
| 728 | MUX_CFG(DA830, GPIO0_9, 14, 28, 0xf, 8, false) | ||
| 729 | MUX_CFG(DA830, EMA_D_10, 15, 0, 0xf, 1, false) | ||
| 730 | MUX_CFG(DA830, EMA_D_11, 15, 4, 0xf, 1, false) | ||
| 731 | MUX_CFG(DA830, EMA_D_12, 15, 8, 0xf, 1, false) | ||
| 732 | MUX_CFG(DA830, EMA_D_13, 15, 12, 0xf, 1, false) | ||
| 733 | MUX_CFG(DA830, EMA_D_14, 15, 16, 0xf, 1, false) | ||
| 734 | MUX_CFG(DA830, EMA_D_15, 15, 20, 0xf, 1, false) | ||
| 735 | MUX_CFG(DA830, EMA_A_0, 15, 24, 0xf, 1, false) | ||
| 736 | MUX_CFG(DA830, EMA_A_1, 15, 28, 0xf, 1, false) | ||
| 737 | MUX_CFG(DA830, UHPI_HD_10, 15, 0, 0xf, 2, false) | ||
| 738 | MUX_CFG(DA830, UHPI_HD_11, 15, 4, 0xf, 2, false) | ||
| 739 | MUX_CFG(DA830, UHPI_HD_12, 15, 8, 0xf, 2, false) | ||
| 740 | MUX_CFG(DA830, UHPI_HD_13, 15, 12, 0xf, 2, false) | ||
| 741 | MUX_CFG(DA830, UHPI_HD_14, 15, 16, 0xf, 2, false) | ||
| 742 | MUX_CFG(DA830, UHPI_HD_15, 15, 20, 0xf, 2, false) | ||
| 743 | MUX_CFG(DA830, LCD_D_7, 15, 24, 0xf, 2, false) | ||
| 744 | MUX_CFG(DA830, MMCSD_CLK, 15, 28, 0xf, 2, false) | ||
| 745 | MUX_CFG(DA830, LCD_D_10, 15, 0, 0xf, 4, false) | ||
| 746 | MUX_CFG(DA830, LCD_D_11, 15, 4, 0xf, 4, false) | ||
| 747 | MUX_CFG(DA830, LCD_D_12, 15, 8, 0xf, 4, false) | ||
| 748 | MUX_CFG(DA830, LCD_D_13, 15, 12, 0xf, 4, false) | ||
| 749 | MUX_CFG(DA830, LCD_D_14, 15, 16, 0xf, 4, false) | ||
| 750 | MUX_CFG(DA830, LCD_D_15, 15, 20, 0xf, 4, false) | ||
| 751 | MUX_CFG(DA830, UHPI_HCNTL0, 15, 28, 0xf, 4, false) | ||
| 752 | MUX_CFG(DA830, GPIO0_10, 15, 0, 0xf, 8, false) | ||
| 753 | MUX_CFG(DA830, GPIO0_11, 15, 4, 0xf, 8, false) | ||
| 754 | MUX_CFG(DA830, GPIO0_12, 15, 8, 0xf, 8, false) | ||
| 755 | MUX_CFG(DA830, GPIO0_13, 15, 12, 0xf, 8, false) | ||
| 756 | MUX_CFG(DA830, GPIO0_14, 15, 16, 0xf, 8, false) | ||
| 757 | MUX_CFG(DA830, GPIO0_15, 15, 20, 0xf, 8, false) | ||
| 758 | MUX_CFG(DA830, GPIO1_0, 15, 24, 0xf, 8, false) | ||
| 759 | MUX_CFG(DA830, GPIO1_1, 15, 28, 0xf, 8, false) | ||
| 760 | MUX_CFG(DA830, EMA_A_2, 16, 0, 0xf, 1, false) | ||
| 761 | MUX_CFG(DA830, EMA_A_3, 16, 4, 0xf, 1, false) | ||
| 762 | MUX_CFG(DA830, EMA_A_4, 16, 8, 0xf, 1, false) | ||
| 763 | MUX_CFG(DA830, EMA_A_5, 16, 12, 0xf, 1, false) | ||
| 764 | MUX_CFG(DA830, EMA_A_6, 16, 16, 0xf, 1, false) | ||
| 765 | MUX_CFG(DA830, EMA_A_7, 16, 20, 0xf, 1, false) | ||
| 766 | MUX_CFG(DA830, EMA_A_8, 16, 24, 0xf, 1, false) | ||
| 767 | MUX_CFG(DA830, EMA_A_9, 16, 28, 0xf, 1, false) | ||
| 768 | MUX_CFG(DA830, MMCSD_CMD, 16, 0, 0xf, 2, false) | ||
| 769 | MUX_CFG(DA830, LCD_D_6, 16, 4, 0xf, 2, false) | ||
| 770 | MUX_CFG(DA830, LCD_D_3, 16, 8, 0xf, 2, false) | ||
| 771 | MUX_CFG(DA830, LCD_D_2, 16, 12, 0xf, 2, false) | ||
| 772 | MUX_CFG(DA830, LCD_D_1, 16, 16, 0xf, 2, false) | ||
| 773 | MUX_CFG(DA830, LCD_D_0, 16, 20, 0xf, 2, false) | ||
| 774 | MUX_CFG(DA830, LCD_PCLK, 16, 24, 0xf, 2, false) | ||
| 775 | MUX_CFG(DA830, LCD_HSYNC, 16, 28, 0xf, 2, false) | ||
| 776 | MUX_CFG(DA830, UHPI_HCNTL1, 16, 0, 0xf, 4, false) | ||
| 777 | MUX_CFG(DA830, GPIO1_2, 16, 0, 0xf, 8, false) | ||
| 778 | MUX_CFG(DA830, GPIO1_3, 16, 4, 0xf, 8, false) | ||
| 779 | MUX_CFG(DA830, GPIO1_4, 16, 8, 0xf, 8, false) | ||
| 780 | MUX_CFG(DA830, GPIO1_5, 16, 12, 0xf, 8, false) | ||
| 781 | MUX_CFG(DA830, GPIO1_6, 16, 16, 0xf, 8, false) | ||
| 782 | MUX_CFG(DA830, GPIO1_7, 16, 20, 0xf, 8, false) | ||
| 783 | MUX_CFG(DA830, GPIO1_8, 16, 24, 0xf, 8, false) | ||
| 784 | MUX_CFG(DA830, GPIO1_9, 16, 28, 0xf, 8, false) | ||
| 785 | MUX_CFG(DA830, EMA_A_10, 17, 0, 0xf, 1, false) | ||
| 786 | MUX_CFG(DA830, EMA_A_11, 17, 4, 0xf, 1, false) | ||
| 787 | MUX_CFG(DA830, EMA_A_12, 17, 8, 0xf, 1, false) | ||
| 788 | MUX_CFG(DA830, EMA_BA_1, 17, 12, 0xf, 1, false) | ||
| 789 | MUX_CFG(DA830, EMA_BA_0, 17, 16, 0xf, 1, false) | ||
| 790 | MUX_CFG(DA830, EMA_CLK, 17, 20, 0xf, 1, false) | ||
| 791 | MUX_CFG(DA830, EMA_SDCKE, 17, 24, 0xf, 1, false) | ||
| 792 | MUX_CFG(DA830, NEMA_CAS, 17, 28, 0xf, 1, false) | ||
| 793 | MUX_CFG(DA830, LCD_VSYNC, 17, 0, 0xf, 2, false) | ||
| 794 | MUX_CFG(DA830, NLCD_AC_ENB_CS, 17, 4, 0xf, 2, false) | ||
| 795 | MUX_CFG(DA830, LCD_MCLK, 17, 8, 0xf, 2, false) | ||
| 796 | MUX_CFG(DA830, LCD_D_5, 17, 12, 0xf, 2, false) | ||
| 797 | MUX_CFG(DA830, LCD_D_4, 17, 16, 0xf, 2, false) | ||
| 798 | MUX_CFG(DA830, OBSCLK, 17, 20, 0xf, 2, false) | ||
| 799 | MUX_CFG(DA830, NEMA_CS_4, 17, 28, 0xf, 2, false) | ||
| 800 | MUX_CFG(DA830, UHPI_HHWIL, 17, 12, 0xf, 4, false) | ||
| 801 | MUX_CFG(DA830, AHCLKR2, 17, 20, 0xf, 4, false) | ||
| 802 | MUX_CFG(DA830, GPIO1_10, 17, 0, 0xf, 8, false) | ||
| 803 | MUX_CFG(DA830, GPIO1_11, 17, 4, 0xf, 8, false) | ||
| 804 | MUX_CFG(DA830, GPIO1_12, 17, 8, 0xf, 8, false) | ||
| 805 | MUX_CFG(DA830, GPIO1_13, 17, 12, 0xf, 8, false) | ||
| 806 | MUX_CFG(DA830, GPIO1_14, 17, 16, 0xf, 8, false) | ||
| 807 | MUX_CFG(DA830, GPIO1_15, 17, 20, 0xf, 8, false) | ||
| 808 | MUX_CFG(DA830, GPIO2_0, 17, 24, 0xf, 8, false) | ||
| 809 | MUX_CFG(DA830, GPIO2_1, 17, 28, 0xf, 8, false) | ||
| 810 | MUX_CFG(DA830, NEMA_RAS, 18, 0, 0xf, 1, false) | ||
| 811 | MUX_CFG(DA830, NEMA_WE, 18, 4, 0xf, 1, false) | ||
| 812 | MUX_CFG(DA830, NEMA_CS_0, 18, 8, 0xf, 1, false) | ||
| 813 | MUX_CFG(DA830, NEMA_CS_2, 18, 12, 0xf, 1, false) | ||
| 814 | MUX_CFG(DA830, NEMA_CS_3, 18, 16, 0xf, 1, false) | ||
| 815 | MUX_CFG(DA830, NEMA_OE, 18, 20, 0xf, 1, false) | ||
| 816 | MUX_CFG(DA830, NEMA_WE_DQM_1, 18, 24, 0xf, 1, false) | ||
| 817 | MUX_CFG(DA830, NEMA_WE_DQM_0, 18, 28, 0xf, 1, false) | ||
| 818 | MUX_CFG(DA830, NEMA_CS_5, 18, 0, 0xf, 2, false) | ||
| 819 | MUX_CFG(DA830, UHPI_HRNW, 18, 4, 0xf, 2, false) | ||
| 820 | MUX_CFG(DA830, NUHPI_HAS, 18, 8, 0xf, 2, false) | ||
| 821 | MUX_CFG(DA830, NUHPI_HCS, 18, 12, 0xf, 2, false) | ||
| 822 | MUX_CFG(DA830, NUHPI_HDS1, 18, 20, 0xf, 2, false) | ||
| 823 | MUX_CFG(DA830, NUHPI_HDS2, 18, 24, 0xf, 2, false) | ||
| 824 | MUX_CFG(DA830, NUHPI_HINT, 18, 28, 0xf, 2, false) | ||
| 825 | MUX_CFG(DA830, AXR0_12, 18, 4, 0xf, 4, false) | ||
| 826 | MUX_CFG(DA830, AMUTE2, 18, 16, 0xf, 4, false) | ||
| 827 | MUX_CFG(DA830, AXR0_13, 18, 20, 0xf, 4, false) | ||
| 828 | MUX_CFG(DA830, AXR0_14, 18, 24, 0xf, 4, false) | ||
| 829 | MUX_CFG(DA830, AXR0_15, 18, 28, 0xf, 4, false) | ||
| 830 | MUX_CFG(DA830, GPIO2_2, 18, 0, 0xf, 8, false) | ||
| 831 | MUX_CFG(DA830, GPIO2_3, 18, 4, 0xf, 8, false) | ||
| 832 | MUX_CFG(DA830, GPIO2_4, 18, 8, 0xf, 8, false) | ||
| 833 | MUX_CFG(DA830, GPIO2_5, 18, 12, 0xf, 8, false) | ||
| 834 | MUX_CFG(DA830, GPIO2_6, 18, 16, 0xf, 8, false) | ||
| 835 | MUX_CFG(DA830, GPIO2_7, 18, 20, 0xf, 8, false) | ||
| 836 | MUX_CFG(DA830, GPIO2_8, 18, 24, 0xf, 8, false) | ||
| 837 | MUX_CFG(DA830, GPIO2_9, 18, 28, 0xf, 8, false) | ||
| 838 | MUX_CFG(DA830, EMA_WAIT_0, 19, 0, 0xf, 1, false) | ||
| 839 | MUX_CFG(DA830, NUHPI_HRDY, 19, 0, 0xf, 2, false) | ||
| 840 | MUX_CFG(DA830, GPIO2_10, 19, 0, 0xf, 8, false) | ||
| 841 | #endif | ||
| 842 | }; | ||
| 843 | |||
| 844 | const short da830_emif25_pins[] __initdata = { | ||
| 845 | DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3, | ||
| 846 | DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7, | ||
| 847 | DA830_EMA_D_8, DA830_EMA_D_9, DA830_EMA_D_10, DA830_EMA_D_11, | ||
| 848 | DA830_EMA_D_12, DA830_EMA_D_13, DA830_EMA_D_14, DA830_EMA_D_15, | ||
| 849 | DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3, | ||
| 850 | DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7, | ||
| 851 | DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11, | ||
| 852 | DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_EMA_CLK, | ||
| 853 | DA830_EMA_SDCKE, DA830_NEMA_CS_4, DA830_NEMA_CS_5, DA830_NEMA_WE, | ||
| 854 | DA830_NEMA_CS_0, DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, | ||
| 855 | DA830_NEMA_WE_DQM_1, DA830_NEMA_WE_DQM_0, DA830_EMA_WAIT_0, | ||
| 856 | -1 | ||
| 857 | }; | ||
| 858 | |||
| 859 | const short da830_spi0_pins[] __initdata = { | ||
| 860 | DA830_SPI0_SOMI_0, DA830_SPI0_SIMO_0, DA830_SPI0_CLK, DA830_NSPI0_ENA, | ||
| 861 | DA830_NSPI0_SCS_0, | ||
| 862 | -1 | ||
| 863 | }; | ||
| 864 | |||
| 865 | const short da830_spi1_pins[] __initdata = { | ||
| 866 | DA830_SPI1_SOMI_0, DA830_SPI1_SIMO_0, DA830_SPI1_CLK, DA830_NSPI1_ENA, | ||
| 867 | DA830_NSPI1_SCS_0, | ||
| 868 | -1 | ||
| 869 | }; | ||
| 870 | |||
| 871 | const short da830_mmc_sd_pins[] __initdata = { | ||
| 872 | DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, | ||
| 873 | DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5, | ||
| 874 | DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK, | ||
| 875 | DA830_MMCSD_CMD, | ||
| 876 | -1 | ||
| 877 | }; | ||
| 878 | |||
| 879 | const short da830_uart0_pins[] __initdata = { | ||
| 880 | DA830_NUART0_CTS, DA830_NUART0_RTS, DA830_UART0_RXD, DA830_UART0_TXD, | ||
| 881 | -1 | ||
| 882 | }; | ||
| 883 | |||
| 884 | const short da830_uart1_pins[] __initdata = { | ||
| 885 | DA830_UART1_RXD, DA830_UART1_TXD, | ||
| 886 | -1 | ||
| 887 | }; | ||
| 888 | |||
| 889 | const short da830_uart2_pins[] __initdata = { | ||
| 890 | DA830_UART2_RXD, DA830_UART2_TXD, | ||
| 891 | -1 | ||
| 892 | }; | ||
| 893 | |||
| 894 | const short da830_usb20_pins[] __initdata = { | ||
| 895 | DA830_USB0_DRVVBUS, DA830_USB_REFCLKIN, | ||
| 896 | -1 | ||
| 897 | }; | ||
| 898 | |||
| 899 | const short da830_usb11_pins[] __initdata = { | ||
| 900 | DA830_USB_REFCLKIN, | ||
| 901 | -1 | ||
| 902 | }; | ||
| 903 | |||
| 904 | const short da830_uhpi_pins[] __initdata = { | ||
| 905 | DA830_UHPI_HD_0, DA830_UHPI_HD_1, DA830_UHPI_HD_2, DA830_UHPI_HD_3, | ||
| 906 | DA830_UHPI_HD_4, DA830_UHPI_HD_5, DA830_UHPI_HD_6, DA830_UHPI_HD_7, | ||
| 907 | DA830_UHPI_HD_8, DA830_UHPI_HD_9, DA830_UHPI_HD_10, DA830_UHPI_HD_11, | ||
| 908 | DA830_UHPI_HD_12, DA830_UHPI_HD_13, DA830_UHPI_HD_14, DA830_UHPI_HD_15, | ||
| 909 | DA830_UHPI_HCNTL0, DA830_UHPI_HCNTL1, DA830_UHPI_HHWIL, DA830_UHPI_HRNW, | ||
| 910 | DA830_NUHPI_HAS, DA830_NUHPI_HCS, DA830_NUHPI_HDS1, DA830_NUHPI_HDS2, | ||
| 911 | DA830_NUHPI_HINT, DA830_NUHPI_HRDY, | ||
| 912 | -1 | ||
| 913 | }; | ||
| 914 | |||
| 915 | const short da830_cpgmac_pins[] __initdata = { | ||
| 916 | DA830_RMII_TXD_0, DA830_RMII_TXD_1, DA830_RMII_TXEN, DA830_RMII_CRS_DV, | ||
| 917 | DA830_RMII_RXD_0, DA830_RMII_RXD_1, DA830_RMII_RXER, DA830_MDIO_CLK, | ||
| 918 | DA830_MDIO_D, | ||
| 919 | -1 | ||
| 920 | }; | ||
| 921 | |||
| 922 | const short da830_emif3c_pins[] __initdata = { | ||
| 923 | DA830_EMB_SDCKE, DA830_EMB_CLK_GLUE, DA830_EMB_CLK, DA830_NEMB_CS_0, | ||
| 924 | DA830_NEMB_CAS, DA830_NEMB_RAS, DA830_NEMB_WE, DA830_EMB_BA_1, | ||
| 925 | DA830_EMB_BA_0, DA830_EMB_A_0, DA830_EMB_A_1, DA830_EMB_A_2, | ||
| 926 | DA830_EMB_A_3, DA830_EMB_A_4, DA830_EMB_A_5, DA830_EMB_A_6, | ||
| 927 | DA830_EMB_A_7, DA830_EMB_A_8, DA830_EMB_A_9, DA830_EMB_A_10, | ||
| 928 | DA830_EMB_A_11, DA830_EMB_A_12, DA830_NEMB_WE_DQM_3, | ||
| 929 | DA830_NEMB_WE_DQM_2, DA830_EMB_D_0, DA830_EMB_D_1, DA830_EMB_D_2, | ||
| 930 | DA830_EMB_D_3, DA830_EMB_D_4, DA830_EMB_D_5, DA830_EMB_D_6, | ||
| 931 | DA830_EMB_D_7, DA830_EMB_D_8, DA830_EMB_D_9, DA830_EMB_D_10, | ||
| 932 | DA830_EMB_D_11, DA830_EMB_D_12, DA830_EMB_D_13, DA830_EMB_D_14, | ||
| 933 | DA830_EMB_D_15, DA830_EMB_D_16, DA830_EMB_D_17, DA830_EMB_D_18, | ||
| 934 | DA830_EMB_D_19, DA830_EMB_D_20, DA830_EMB_D_21, DA830_EMB_D_22, | ||
| 935 | DA830_EMB_D_23, DA830_EMB_D_24, DA830_EMB_D_25, DA830_EMB_D_26, | ||
| 936 | DA830_EMB_D_27, DA830_EMB_D_28, DA830_EMB_D_29, DA830_EMB_D_30, | ||
| 937 | DA830_EMB_D_31, DA830_NEMB_WE_DQM_1, DA830_NEMB_WE_DQM_0, | ||
| 938 | -1 | ||
| 939 | }; | ||
| 940 | |||
| 941 | const short da830_mcasp0_pins[] __initdata = { | ||
| 942 | DA830_AHCLKX0, DA830_ACLKX0, DA830_AFSX0, | ||
| 943 | DA830_AHCLKR0, DA830_ACLKR0, DA830_AFSR0, DA830_AMUTE0, | ||
| 944 | DA830_AXR0_0, DA830_AXR0_1, DA830_AXR0_2, DA830_AXR0_3, | ||
| 945 | DA830_AXR0_4, DA830_AXR0_5, DA830_AXR0_6, DA830_AXR0_7, | ||
| 946 | DA830_AXR0_8, DA830_AXR0_9, DA830_AXR0_10, DA830_AXR0_11, | ||
| 947 | DA830_AXR0_12, DA830_AXR0_13, DA830_AXR0_14, DA830_AXR0_15, | ||
| 948 | -1 | ||
| 949 | }; | ||
| 950 | |||
| 951 | const short da830_mcasp1_pins[] __initdata = { | ||
| 952 | DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, | ||
| 953 | DA830_AHCLKR1, DA830_ACLKR1, DA830_AFSR1, DA830_AMUTE1, | ||
| 954 | DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_3, | ||
| 955 | DA830_AXR1_4, DA830_AXR1_5, DA830_AXR1_6, DA830_AXR1_7, | ||
| 956 | DA830_AXR1_8, DA830_AXR1_9, DA830_AXR1_10, DA830_AXR1_11, | ||
| 957 | -1 | ||
| 958 | }; | ||
| 959 | |||
| 960 | const short da830_mcasp2_pins[] __initdata = { | ||
| 961 | DA830_AHCLKX2, DA830_ACLKX2, DA830_AFSX2, | ||
| 962 | DA830_AHCLKR2, DA830_ACLKR2, DA830_AFSR2, DA830_AMUTE2, | ||
| 963 | DA830_AXR2_0, DA830_AXR2_1, DA830_AXR2_2, DA830_AXR2_3, | ||
| 964 | -1 | ||
| 965 | }; | ||
| 966 | |||
| 967 | const short da830_i2c0_pins[] __initdata = { | ||
| 968 | DA830_I2C0_SDA, DA830_I2C0_SCL, | ||
| 969 | -1 | ||
| 970 | }; | ||
| 971 | |||
| 972 | const short da830_i2c1_pins[] __initdata = { | ||
| 973 | DA830_I2C1_SCL, DA830_I2C1_SDA, | ||
| 974 | -1 | ||
| 975 | }; | ||
| 976 | |||
| 977 | const short da830_lcdcntl_pins[] __initdata = { | ||
| 978 | DA830_LCD_D_0, DA830_LCD_D_1, DA830_LCD_D_2, DA830_LCD_D_3, | ||
| 979 | DA830_LCD_D_4, DA830_LCD_D_5, DA830_LCD_D_6, DA830_LCD_D_7, | ||
| 980 | DA830_LCD_D_8, DA830_LCD_D_9, DA830_LCD_D_10, DA830_LCD_D_11, | ||
| 981 | DA830_LCD_D_12, DA830_LCD_D_13, DA830_LCD_D_14, DA830_LCD_D_15, | ||
| 982 | DA830_LCD_PCLK, DA830_LCD_HSYNC, DA830_LCD_VSYNC, DA830_NLCD_AC_ENB_CS, | ||
| 983 | DA830_LCD_MCLK, | ||
| 984 | -1 | ||
| 985 | }; | ||
| 986 | |||
| 987 | const short da830_pwm_pins[] __initdata = { | ||
| 988 | DA830_ECAP0_APWM0, DA830_ECAP1_APWM1, DA830_EPWM0B, DA830_EPWM0A, | ||
| 989 | DA830_EPWMSYNCI, DA830_EPWMSYNC0, DA830_ECAP2_APWM2, DA830_EHRPWMGLUETZ, | ||
| 990 | DA830_EPWM2B, DA830_EPWM2A, DA830_EPWM1B, DA830_EPWM1A, | ||
| 991 | -1 | ||
| 992 | }; | ||
| 993 | |||
| 994 | const short da830_ecap0_pins[] __initdata = { | ||
| 995 | DA830_ECAP0_APWM0, | ||
| 996 | -1 | ||
| 997 | }; | ||
| 998 | |||
| 999 | const short da830_ecap1_pins[] __initdata = { | ||
| 1000 | DA830_ECAP1_APWM1, | ||
| 1001 | -1 | ||
| 1002 | }; | ||
| 1003 | |||
| 1004 | const short da830_ecap2_pins[] __initdata = { | ||
| 1005 | DA830_ECAP2_APWM2, | ||
| 1006 | -1 | ||
| 1007 | }; | ||
| 1008 | |||
| 1009 | const short da830_eqep0_pins[] __initdata = { | ||
| 1010 | DA830_EQEP0I, DA830_EQEP0S, DA830_EQEP0A, DA830_EQEP0B, | ||
| 1011 | -1 | ||
| 1012 | }; | ||
| 1013 | |||
| 1014 | const short da830_eqep1_pins[] __initdata = { | ||
| 1015 | DA830_EQEP1I, DA830_EQEP1S, DA830_EQEP1A, DA830_EQEP1B, | ||
| 1016 | -1 | ||
| 1017 | }; | ||
| 1018 | |||
| 1019 | /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ | ||
| 1020 | static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = { | ||
| 1021 | [IRQ_DA8XX_COMMTX] = 7, | ||
| 1022 | [IRQ_DA8XX_COMMRX] = 7, | ||
| 1023 | [IRQ_DA8XX_NINT] = 7, | ||
| 1024 | [IRQ_DA8XX_EVTOUT0] = 7, | ||
| 1025 | [IRQ_DA8XX_EVTOUT1] = 7, | ||
| 1026 | [IRQ_DA8XX_EVTOUT2] = 7, | ||
| 1027 | [IRQ_DA8XX_EVTOUT3] = 7, | ||
| 1028 | [IRQ_DA8XX_EVTOUT4] = 7, | ||
| 1029 | [IRQ_DA8XX_EVTOUT5] = 7, | ||
| 1030 | [IRQ_DA8XX_EVTOUT6] = 7, | ||
| 1031 | [IRQ_DA8XX_EVTOUT6] = 7, | ||
| 1032 | [IRQ_DA8XX_EVTOUT7] = 7, | ||
| 1033 | [IRQ_DA8XX_CCINT0] = 7, | ||
| 1034 | [IRQ_DA8XX_CCERRINT] = 7, | ||
| 1035 | [IRQ_DA8XX_TCERRINT0] = 7, | ||
| 1036 | [IRQ_DA8XX_AEMIFINT] = 7, | ||
| 1037 | [IRQ_DA8XX_I2CINT0] = 7, | ||
| 1038 | [IRQ_DA8XX_MMCSDINT0] = 7, | ||
| 1039 | [IRQ_DA8XX_MMCSDINT1] = 7, | ||
| 1040 | [IRQ_DA8XX_ALLINT0] = 7, | ||
| 1041 | [IRQ_DA8XX_RTC] = 7, | ||
| 1042 | [IRQ_DA8XX_SPINT0] = 7, | ||
| 1043 | [IRQ_DA8XX_TINT12_0] = 7, | ||
| 1044 | [IRQ_DA8XX_TINT34_0] = 7, | ||
| 1045 | [IRQ_DA8XX_TINT12_1] = 7, | ||
| 1046 | [IRQ_DA8XX_TINT34_1] = 7, | ||
| 1047 | [IRQ_DA8XX_UARTINT0] = 7, | ||
| 1048 | [IRQ_DA8XX_KEYMGRINT] = 7, | ||
| 1049 | [IRQ_DA8XX_SECINT] = 7, | ||
| 1050 | [IRQ_DA8XX_SECKEYERR] = 7, | ||
| 1051 | [IRQ_DA830_MPUERR] = 7, | ||
| 1052 | [IRQ_DA830_IOPUERR] = 7, | ||
| 1053 | [IRQ_DA830_BOOTCFGERR] = 7, | ||
| 1054 | [IRQ_DA8XX_CHIPINT0] = 7, | ||
| 1055 | [IRQ_DA8XX_CHIPINT1] = 7, | ||
| 1056 | [IRQ_DA8XX_CHIPINT2] = 7, | ||
| 1057 | [IRQ_DA8XX_CHIPINT3] = 7, | ||
| 1058 | [IRQ_DA8XX_TCERRINT1] = 7, | ||
| 1059 | [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7, | ||
| 1060 | [IRQ_DA8XX_C0_RX_PULSE] = 7, | ||
| 1061 | [IRQ_DA8XX_C0_TX_PULSE] = 7, | ||
| 1062 | [IRQ_DA8XX_C0_MISC_PULSE] = 7, | ||
| 1063 | [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7, | ||
| 1064 | [IRQ_DA8XX_C1_RX_PULSE] = 7, | ||
| 1065 | [IRQ_DA8XX_C1_TX_PULSE] = 7, | ||
| 1066 | [IRQ_DA8XX_C1_MISC_PULSE] = 7, | ||
| 1067 | [IRQ_DA8XX_MEMERR] = 7, | ||
| 1068 | [IRQ_DA8XX_GPIO0] = 7, | ||
| 1069 | [IRQ_DA8XX_GPIO1] = 7, | ||
| 1070 | [IRQ_DA8XX_GPIO2] = 7, | ||
| 1071 | [IRQ_DA8XX_GPIO3] = 7, | ||
| 1072 | [IRQ_DA8XX_GPIO4] = 7, | ||
| 1073 | [IRQ_DA8XX_GPIO5] = 7, | ||
| 1074 | [IRQ_DA8XX_GPIO6] = 7, | ||
| 1075 | [IRQ_DA8XX_GPIO7] = 7, | ||
| 1076 | [IRQ_DA8XX_GPIO8] = 7, | ||
| 1077 | [IRQ_DA8XX_I2CINT1] = 7, | ||
| 1078 | [IRQ_DA8XX_LCDINT] = 7, | ||
| 1079 | [IRQ_DA8XX_UARTINT1] = 7, | ||
| 1080 | [IRQ_DA8XX_MCASPINT] = 7, | ||
| 1081 | [IRQ_DA8XX_ALLINT1] = 7, | ||
| 1082 | [IRQ_DA8XX_SPINT1] = 7, | ||
| 1083 | [IRQ_DA8XX_UHPI_INT1] = 7, | ||
| 1084 | [IRQ_DA8XX_USB_INT] = 7, | ||
| 1085 | [IRQ_DA8XX_IRQN] = 7, | ||
| 1086 | [IRQ_DA8XX_RWAKEUP] = 7, | ||
| 1087 | [IRQ_DA8XX_UARTINT2] = 7, | ||
| 1088 | [IRQ_DA8XX_DFTSSINT] = 7, | ||
| 1089 | [IRQ_DA8XX_EHRPWM0] = 7, | ||
| 1090 | [IRQ_DA8XX_EHRPWM0TZ] = 7, | ||
| 1091 | [IRQ_DA8XX_EHRPWM1] = 7, | ||
| 1092 | [IRQ_DA8XX_EHRPWM1TZ] = 7, | ||
| 1093 | [IRQ_DA830_EHRPWM2] = 7, | ||
| 1094 | [IRQ_DA830_EHRPWM2TZ] = 7, | ||
| 1095 | [IRQ_DA8XX_ECAP0] = 7, | ||
| 1096 | [IRQ_DA8XX_ECAP1] = 7, | ||
| 1097 | [IRQ_DA8XX_ECAP2] = 7, | ||
| 1098 | [IRQ_DA830_EQEP0] = 7, | ||
| 1099 | [IRQ_DA830_EQEP1] = 7, | ||
| 1100 | [IRQ_DA830_T12CMPINT0_0] = 7, | ||
| 1101 | [IRQ_DA830_T12CMPINT1_0] = 7, | ||
| 1102 | [IRQ_DA830_T12CMPINT2_0] = 7, | ||
| 1103 | [IRQ_DA830_T12CMPINT3_0] = 7, | ||
| 1104 | [IRQ_DA830_T12CMPINT4_0] = 7, | ||
| 1105 | [IRQ_DA830_T12CMPINT5_0] = 7, | ||
| 1106 | [IRQ_DA830_T12CMPINT6_0] = 7, | ||
| 1107 | [IRQ_DA830_T12CMPINT7_0] = 7, | ||
| 1108 | [IRQ_DA830_T12CMPINT0_1] = 7, | ||
| 1109 | [IRQ_DA830_T12CMPINT1_1] = 7, | ||
| 1110 | [IRQ_DA830_T12CMPINT2_1] = 7, | ||
| 1111 | [IRQ_DA830_T12CMPINT3_1] = 7, | ||
| 1112 | [IRQ_DA830_T12CMPINT4_1] = 7, | ||
| 1113 | [IRQ_DA830_T12CMPINT5_1] = 7, | ||
| 1114 | [IRQ_DA830_T12CMPINT6_1] = 7, | ||
| 1115 | [IRQ_DA830_T12CMPINT7_1] = 7, | ||
| 1116 | [IRQ_DA8XX_ARMCLKSTOPREQ] = 7, | ||
| 1117 | }; | ||
| 1118 | |||
| 1119 | static struct map_desc da830_io_desc[] = { | ||
| 1120 | { | ||
| 1121 | .virtual = IO_VIRT, | ||
| 1122 | .pfn = __phys_to_pfn(IO_PHYS), | ||
| 1123 | .length = IO_SIZE, | ||
| 1124 | .type = MT_DEVICE | ||
| 1125 | }, | ||
| 1126 | { | ||
| 1127 | .virtual = DA8XX_CP_INTC_VIRT, | ||
| 1128 | .pfn = __phys_to_pfn(DA8XX_CP_INTC_BASE), | ||
| 1129 | .length = DA8XX_CP_INTC_SIZE, | ||
| 1130 | .type = MT_DEVICE | ||
| 1131 | }, | ||
| 1132 | }; | ||
| 1133 | |||
| 1134 | static void __iomem *da830_psc_bases[] = { | ||
| 1135 | IO_ADDRESS(DA8XX_PSC0_BASE), | ||
| 1136 | IO_ADDRESS(DA8XX_PSC1_BASE), | ||
| 1137 | }; | ||
| 1138 | |||
| 1139 | /* Contents of JTAG ID register used to identify exact cpu type */ | ||
| 1140 | static struct davinci_id da830_ids[] = { | ||
| 1141 | { | ||
| 1142 | .variant = 0x0, | ||
| 1143 | .part_no = 0xb7df, | ||
| 1144 | .manufacturer = 0x017, /* 0x02f >> 1 */ | ||
| 1145 | .cpu_id = DAVINCI_CPU_ID_DA830, | ||
| 1146 | .name = "da830/omap l137", | ||
| 1147 | }, | ||
| 1148 | }; | ||
| 1149 | |||
| 1150 | static struct davinci_timer_instance da830_timer_instance[2] = { | ||
| 1151 | { | ||
| 1152 | .base = IO_ADDRESS(DA8XX_TIMER64P0_BASE), | ||
| 1153 | .bottom_irq = IRQ_DA8XX_TINT12_0, | ||
| 1154 | .top_irq = IRQ_DA8XX_TINT34_0, | ||
| 1155 | .cmp_off = DA830_CMP12_0, | ||
| 1156 | .cmp_irq = IRQ_DA830_T12CMPINT0_0, | ||
| 1157 | }, | ||
| 1158 | { | ||
| 1159 | .base = IO_ADDRESS(DA8XX_TIMER64P1_BASE), | ||
| 1160 | .bottom_irq = IRQ_DA8XX_TINT12_1, | ||
| 1161 | .top_irq = IRQ_DA8XX_TINT34_1, | ||
| 1162 | .cmp_off = DA830_CMP12_0, | ||
| 1163 | .cmp_irq = IRQ_DA830_T12CMPINT0_1, | ||
| 1164 | }, | ||
| 1165 | }; | ||
| 1166 | |||
| 1167 | /* | ||
| 1168 | * T0_BOT: Timer 0, bottom : Used for clock_event & clocksource | ||
| 1169 | * T0_TOP: Timer 0, top : Used by DSP | ||
| 1170 | * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer | ||
| 1171 | */ | ||
| 1172 | static struct davinci_timer_info da830_timer_info = { | ||
| 1173 | .timers = da830_timer_instance, | ||
| 1174 | .clockevent_id = T0_BOT, | ||
| 1175 | .clocksource_id = T0_BOT, | ||
| 1176 | }; | ||
| 1177 | |||
| 1178 | static struct davinci_soc_info davinci_soc_info_da830 = { | ||
| 1179 | .io_desc = da830_io_desc, | ||
| 1180 | .io_desc_num = ARRAY_SIZE(da830_io_desc), | ||
| 1181 | .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG), | ||
| 1182 | .ids = da830_ids, | ||
| 1183 | .ids_num = ARRAY_SIZE(da830_ids), | ||
| 1184 | .cpu_clks = da830_clks, | ||
| 1185 | .psc_bases = da830_psc_bases, | ||
| 1186 | .psc_bases_num = ARRAY_SIZE(da830_psc_bases), | ||
| 1187 | .pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120), | ||
| 1188 | .pinmux_pins = da830_pins, | ||
| 1189 | .pinmux_pins_num = ARRAY_SIZE(da830_pins), | ||
| 1190 | .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, | ||
| 1191 | .intc_type = DAVINCI_INTC_TYPE_CP_INTC, | ||
| 1192 | .intc_irq_prios = da830_default_priorities, | ||
| 1193 | .intc_irq_num = DA830_N_CP_INTC_IRQ, | ||
| 1194 | .timer_info = &da830_timer_info, | ||
| 1195 | .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE), | ||
| 1196 | .gpio_num = 128, | ||
| 1197 | .gpio_irq = IRQ_DA8XX_GPIO0, | ||
| 1198 | .serial_dev = &da8xx_serial_device, | ||
| 1199 | .emac_pdata = &da8xx_emac_pdata, | ||
| 1200 | }; | ||
| 1201 | |||
| 1202 | void __init da830_init(void) | ||
| 1203 | { | ||
| 1204 | davinci_common_init(&davinci_soc_info_da830); | ||
| 1205 | } | ||
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c new file mode 100644 index 000000000000..192d719a47df --- /dev/null +++ b/arch/arm/mach-davinci/da850.c | |||
| @@ -0,0 +1,820 @@ | |||
| 1 | /* | ||
| 2 | * TI DA850/OMAP-L138 chip specific setup | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ | ||
| 5 | * | ||
| 6 | * Derived from: arch/arm/mach-davinci/da830.c | ||
| 7 | * Original Copyrights follow: | ||
| 8 | * | ||
| 9 | * 2009 (c) MontaVista Software, Inc. This file is licensed under | ||
| 10 | * the terms of the GNU General Public License version 2. This program | ||
| 11 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 12 | * or implied. | ||
| 13 | */ | ||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/clk.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | |||
| 19 | #include <asm/mach/map.h> | ||
| 20 | |||
| 21 | #include <mach/clock.h> | ||
| 22 | #include <mach/psc.h> | ||
| 23 | #include <mach/mux.h> | ||
| 24 | #include <mach/irqs.h> | ||
| 25 | #include <mach/cputype.h> | ||
| 26 | #include <mach/common.h> | ||
| 27 | #include <mach/time.h> | ||
| 28 | #include <mach/da8xx.h> | ||
| 29 | |||
| 30 | #include "clock.h" | ||
| 31 | #include "mux.h" | ||
| 32 | |||
| 33 | #define DA850_PLL1_BASE 0x01e1a000 | ||
| 34 | #define DA850_TIMER64P2_BASE 0x01f0c000 | ||
| 35 | #define DA850_TIMER64P3_BASE 0x01f0d000 | ||
| 36 | |||
| 37 | #define DA850_REF_FREQ 24000000 | ||
| 38 | |||
| 39 | static struct pll_data pll0_data = { | ||
| 40 | .num = 1, | ||
| 41 | .phys_base = DA8XX_PLL0_BASE, | ||
| 42 | .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static struct clk ref_clk = { | ||
| 46 | .name = "ref_clk", | ||
| 47 | .rate = DA850_REF_FREQ, | ||
| 48 | }; | ||
| 49 | |||
| 50 | static struct clk pll0_clk = { | ||
| 51 | .name = "pll0", | ||
| 52 | .parent = &ref_clk, | ||
| 53 | .pll_data = &pll0_data, | ||
| 54 | .flags = CLK_PLL, | ||
| 55 | }; | ||
| 56 | |||
| 57 | static struct clk pll0_aux_clk = { | ||
| 58 | .name = "pll0_aux_clk", | ||
| 59 | .parent = &pll0_clk, | ||
| 60 | .flags = CLK_PLL | PRE_PLL, | ||
| 61 | }; | ||
| 62 | |||
| 63 | static struct clk pll0_sysclk2 = { | ||
| 64 | .name = "pll0_sysclk2", | ||
| 65 | .parent = &pll0_clk, | ||
| 66 | .flags = CLK_PLL, | ||
| 67 | .div_reg = PLLDIV2, | ||
| 68 | }; | ||
| 69 | |||
| 70 | static struct clk pll0_sysclk3 = { | ||
| 71 | .name = "pll0_sysclk3", | ||
| 72 | .parent = &pll0_clk, | ||
| 73 | .flags = CLK_PLL, | ||
| 74 | .div_reg = PLLDIV3, | ||
| 75 | }; | ||
| 76 | |||
| 77 | static struct clk pll0_sysclk4 = { | ||
| 78 | .name = "pll0_sysclk4", | ||
| 79 | .parent = &pll0_clk, | ||
| 80 | .flags = CLK_PLL, | ||
| 81 | .div_reg = PLLDIV4, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct clk pll0_sysclk5 = { | ||
| 85 | .name = "pll0_sysclk5", | ||
| 86 | .parent = &pll0_clk, | ||
| 87 | .flags = CLK_PLL, | ||
| 88 | .div_reg = PLLDIV5, | ||
| 89 | }; | ||
| 90 | |||
| 91 | static struct clk pll0_sysclk6 = { | ||
| 92 | .name = "pll0_sysclk6", | ||
| 93 | .parent = &pll0_clk, | ||
| 94 | .flags = CLK_PLL, | ||
| 95 | .div_reg = PLLDIV6, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct clk pll0_sysclk7 = { | ||
| 99 | .name = "pll0_sysclk7", | ||
| 100 | .parent = &pll0_clk, | ||
| 101 | .flags = CLK_PLL, | ||
| 102 | .div_reg = PLLDIV7, | ||
| 103 | }; | ||
| 104 | |||
| 105 | static struct pll_data pll1_data = { | ||
| 106 | .num = 2, | ||
| 107 | .phys_base = DA850_PLL1_BASE, | ||
| 108 | .flags = PLL_HAS_POSTDIV, | ||
| 109 | }; | ||
| 110 | |||
| 111 | static struct clk pll1_clk = { | ||
| 112 | .name = "pll1", | ||
| 113 | .parent = &ref_clk, | ||
| 114 | .pll_data = &pll1_data, | ||
| 115 | .flags = CLK_PLL, | ||
| 116 | }; | ||
| 117 | |||
| 118 | static struct clk pll1_aux_clk = { | ||
| 119 | .name = "pll1_aux_clk", | ||
| 120 | .parent = &pll1_clk, | ||
| 121 | .flags = CLK_PLL | PRE_PLL, | ||
| 122 | }; | ||
| 123 | |||
| 124 | static struct clk pll1_sysclk2 = { | ||
| 125 | .name = "pll1_sysclk2", | ||
| 126 | .parent = &pll1_clk, | ||
| 127 | .flags = CLK_PLL, | ||
| 128 | .div_reg = PLLDIV2, | ||
| 129 | }; | ||
| 130 | |||
| 131 | static struct clk pll1_sysclk3 = { | ||
| 132 | .name = "pll1_sysclk3", | ||
| 133 | .parent = &pll1_clk, | ||
| 134 | .flags = CLK_PLL, | ||
| 135 | .div_reg = PLLDIV3, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static struct clk pll1_sysclk4 = { | ||
| 139 | .name = "pll1_sysclk4", | ||
| 140 | .parent = &pll1_clk, | ||
| 141 | .flags = CLK_PLL, | ||
| 142 | .div_reg = PLLDIV4, | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct clk pll1_sysclk5 = { | ||
| 146 | .name = "pll1_sysclk5", | ||
| 147 | .parent = &pll1_clk, | ||
| 148 | .flags = CLK_PLL, | ||
| 149 | .div_reg = PLLDIV5, | ||
| 150 | }; | ||
| 151 | |||
| 152 | static struct clk pll1_sysclk6 = { | ||
| 153 | .name = "pll0_sysclk6", | ||
| 154 | .parent = &pll0_clk, | ||
| 155 | .flags = CLK_PLL, | ||
| 156 | .div_reg = PLLDIV6, | ||
| 157 | }; | ||
| 158 | |||
| 159 | static struct clk pll1_sysclk7 = { | ||
| 160 | .name = "pll1_sysclk7", | ||
| 161 | .parent = &pll1_clk, | ||
| 162 | .flags = CLK_PLL, | ||
| 163 | .div_reg = PLLDIV7, | ||
| 164 | }; | ||
| 165 | |||
| 166 | static struct clk i2c0_clk = { | ||
| 167 | .name = "i2c0", | ||
| 168 | .parent = &pll0_aux_clk, | ||
| 169 | }; | ||
| 170 | |||
| 171 | static struct clk timerp64_0_clk = { | ||
| 172 | .name = "timer0", | ||
| 173 | .parent = &pll0_aux_clk, | ||
| 174 | }; | ||
| 175 | |||
| 176 | static struct clk timerp64_1_clk = { | ||
| 177 | .name = "timer1", | ||
| 178 | .parent = &pll0_aux_clk, | ||
| 179 | }; | ||
| 180 | |||
| 181 | static struct clk arm_rom_clk = { | ||
| 182 | .name = "arm_rom", | ||
| 183 | .parent = &pll0_sysclk2, | ||
| 184 | .lpsc = DA8XX_LPSC0_ARM_RAM_ROM, | ||
| 185 | .flags = ALWAYS_ENABLED, | ||
| 186 | }; | ||
| 187 | |||
| 188 | static struct clk tpcc0_clk = { | ||
| 189 | .name = "tpcc0", | ||
| 190 | .parent = &pll0_sysclk2, | ||
| 191 | .lpsc = DA8XX_LPSC0_TPCC, | ||
| 192 | .flags = ALWAYS_ENABLED | CLK_PSC, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct clk tptc0_clk = { | ||
| 196 | .name = "tptc0", | ||
| 197 | .parent = &pll0_sysclk2, | ||
| 198 | .lpsc = DA8XX_LPSC0_TPTC0, | ||
| 199 | .flags = ALWAYS_ENABLED, | ||
| 200 | }; | ||
| 201 | |||
| 202 | static struct clk tptc1_clk = { | ||
| 203 | .name = "tptc1", | ||
| 204 | .parent = &pll0_sysclk2, | ||
| 205 | .lpsc = DA8XX_LPSC0_TPTC1, | ||
| 206 | .flags = ALWAYS_ENABLED, | ||
| 207 | }; | ||
| 208 | |||
| 209 | static struct clk tpcc1_clk = { | ||
| 210 | .name = "tpcc1", | ||
| 211 | .parent = &pll0_sysclk2, | ||
| 212 | .lpsc = DA850_LPSC1_TPCC1, | ||
| 213 | .flags = CLK_PSC | ALWAYS_ENABLED, | ||
| 214 | .psc_ctlr = 1, | ||
| 215 | }; | ||
| 216 | |||
| 217 | static struct clk tptc2_clk = { | ||
| 218 | .name = "tptc2", | ||
| 219 | .parent = &pll0_sysclk2, | ||
| 220 | .lpsc = DA850_LPSC1_TPTC2, | ||
| 221 | .flags = ALWAYS_ENABLED, | ||
| 222 | .psc_ctlr = 1, | ||
| 223 | }; | ||
| 224 | |||
| 225 | static struct clk uart0_clk = { | ||
| 226 | .name = "uart0", | ||
| 227 | .parent = &pll0_sysclk2, | ||
| 228 | .lpsc = DA8XX_LPSC0_UART0, | ||
| 229 | }; | ||
| 230 | |||
| 231 | static struct clk uart1_clk = { | ||
| 232 | .name = "uart1", | ||
| 233 | .parent = &pll0_sysclk2, | ||
| 234 | .lpsc = DA8XX_LPSC1_UART1, | ||
| 235 | .psc_ctlr = 1, | ||
| 236 | }; | ||
| 237 | |||
| 238 | static struct clk uart2_clk = { | ||
| 239 | .name = "uart2", | ||
| 240 | .parent = &pll0_sysclk2, | ||
| 241 | .lpsc = DA8XX_LPSC1_UART2, | ||
| 242 | .psc_ctlr = 1, | ||
| 243 | }; | ||
| 244 | |||
| 245 | static struct clk aintc_clk = { | ||
| 246 | .name = "aintc", | ||
| 247 | .parent = &pll0_sysclk4, | ||
| 248 | .lpsc = DA8XX_LPSC0_AINTC, | ||
| 249 | .flags = ALWAYS_ENABLED, | ||
| 250 | }; | ||
| 251 | |||
| 252 | static struct clk gpio_clk = { | ||
| 253 | .name = "gpio", | ||
| 254 | .parent = &pll0_sysclk4, | ||
| 255 | .lpsc = DA8XX_LPSC1_GPIO, | ||
| 256 | .psc_ctlr = 1, | ||
| 257 | }; | ||
| 258 | |||
| 259 | static struct clk i2c1_clk = { | ||
| 260 | .name = "i2c1", | ||
| 261 | .parent = &pll0_sysclk4, | ||
| 262 | .lpsc = DA8XX_LPSC1_I2C, | ||
| 263 | .psc_ctlr = 1, | ||
| 264 | }; | ||
| 265 | |||
| 266 | static struct clk emif3_clk = { | ||
| 267 | .name = "emif3", | ||
| 268 | .parent = &pll0_sysclk5, | ||
| 269 | .lpsc = DA8XX_LPSC1_EMIF3C, | ||
| 270 | .flags = ALWAYS_ENABLED, | ||
| 271 | .psc_ctlr = 1, | ||
| 272 | }; | ||
| 273 | |||
| 274 | static struct clk arm_clk = { | ||
| 275 | .name = "arm", | ||
| 276 | .parent = &pll0_sysclk6, | ||
| 277 | .lpsc = DA8XX_LPSC0_ARM, | ||
| 278 | .flags = ALWAYS_ENABLED, | ||
| 279 | }; | ||
| 280 | |||
| 281 | static struct clk rmii_clk = { | ||
| 282 | .name = "rmii", | ||
| 283 | .parent = &pll0_sysclk7, | ||
| 284 | }; | ||
| 285 | |||
| 286 | static struct clk emac_clk = { | ||
| 287 | .name = "emac", | ||
| 288 | .parent = &pll0_sysclk4, | ||
| 289 | .lpsc = DA8XX_LPSC1_CPGMAC, | ||
| 290 | .psc_ctlr = 1, | ||
| 291 | }; | ||
| 292 | |||
| 293 | static struct clk mcasp_clk = { | ||
| 294 | .name = "mcasp", | ||
| 295 | .parent = &pll0_sysclk2, | ||
| 296 | .lpsc = DA8XX_LPSC1_McASP0, | ||
| 297 | .psc_ctlr = 1, | ||
| 298 | }; | ||
| 299 | |||
| 300 | static struct clk lcdc_clk = { | ||
| 301 | .name = "lcdc", | ||
| 302 | .parent = &pll0_sysclk2, | ||
| 303 | .lpsc = DA8XX_LPSC1_LCDC, | ||
| 304 | .psc_ctlr = 1, | ||
| 305 | }; | ||
| 306 | |||
| 307 | static struct clk mmcsd_clk = { | ||
| 308 | .name = "mmcsd", | ||
| 309 | .parent = &pll0_sysclk2, | ||
| 310 | .lpsc = DA8XX_LPSC0_MMC_SD, | ||
| 311 | }; | ||
| 312 | |||
| 313 | static struct clk aemif_clk = { | ||
| 314 | .name = "aemif", | ||
| 315 | .parent = &pll0_sysclk3, | ||
| 316 | .lpsc = DA8XX_LPSC0_EMIF25, | ||
| 317 | .flags = ALWAYS_ENABLED, | ||
| 318 | }; | ||
| 319 | |||
| 320 | static struct davinci_clk da850_clks[] = { | ||
| 321 | CLK(NULL, "ref", &ref_clk), | ||
| 322 | CLK(NULL, "pll0", &pll0_clk), | ||
| 323 | CLK(NULL, "pll0_aux", &pll0_aux_clk), | ||
| 324 | CLK(NULL, "pll0_sysclk2", &pll0_sysclk2), | ||
| 325 | CLK(NULL, "pll0_sysclk3", &pll0_sysclk3), | ||
| 326 | CLK(NULL, "pll0_sysclk4", &pll0_sysclk4), | ||
| 327 | CLK(NULL, "pll0_sysclk5", &pll0_sysclk5), | ||
| 328 | CLK(NULL, "pll0_sysclk6", &pll0_sysclk6), | ||
| 329 | CLK(NULL, "pll0_sysclk7", &pll0_sysclk7), | ||
| 330 | CLK(NULL, "pll1", &pll1_clk), | ||
| 331 | CLK(NULL, "pll1_aux", &pll1_aux_clk), | ||
| 332 | CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), | ||
| 333 | CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), | ||
| 334 | CLK(NULL, "pll1_sysclk4", &pll1_sysclk4), | ||
| 335 | CLK(NULL, "pll1_sysclk5", &pll1_sysclk5), | ||
| 336 | CLK(NULL, "pll1_sysclk6", &pll1_sysclk6), | ||
| 337 | CLK(NULL, "pll1_sysclk7", &pll1_sysclk7), | ||
| 338 | CLK("i2c_davinci.1", NULL, &i2c0_clk), | ||
| 339 | CLK(NULL, "timer0", &timerp64_0_clk), | ||
| 340 | CLK("watchdog", NULL, &timerp64_1_clk), | ||
| 341 | CLK(NULL, "arm_rom", &arm_rom_clk), | ||
| 342 | CLK(NULL, "tpcc0", &tpcc0_clk), | ||
| 343 | CLK(NULL, "tptc0", &tptc0_clk), | ||
| 344 | CLK(NULL, "tptc1", &tptc1_clk), | ||
| 345 | CLK(NULL, "tpcc1", &tpcc1_clk), | ||
| 346 | CLK(NULL, "tptc2", &tptc2_clk), | ||
| 347 | CLK(NULL, "uart0", &uart0_clk), | ||
| 348 | CLK(NULL, "uart1", &uart1_clk), | ||
| 349 | CLK(NULL, "uart2", &uart2_clk), | ||
| 350 | CLK(NULL, "aintc", &aintc_clk), | ||
| 351 | CLK(NULL, "gpio", &gpio_clk), | ||
| 352 | CLK("i2c_davinci.2", NULL, &i2c1_clk), | ||
| 353 | CLK(NULL, "emif3", &emif3_clk), | ||
| 354 | CLK(NULL, "arm", &arm_clk), | ||
| 355 | CLK(NULL, "rmii", &rmii_clk), | ||
| 356 | CLK("davinci_emac.1", NULL, &emac_clk), | ||
| 357 | CLK("davinci-mcasp.0", NULL, &mcasp_clk), | ||
| 358 | CLK("da8xx_lcdc.0", NULL, &lcdc_clk), | ||
| 359 | CLK("davinci_mmc.0", NULL, &mmcsd_clk), | ||
| 360 | CLK(NULL, "aemif", &aemif_clk), | ||
| 361 | CLK(NULL, NULL, NULL), | ||
| 362 | }; | ||
| 363 | |||
| 364 | /* | ||
| 365 | * Device specific mux setup | ||
| 366 | * | ||
| 367 | * soc description mux mode mode mux dbg | ||
| 368 | * reg offset mask mode | ||
| 369 | */ | ||
| 370 | static const struct mux_config da850_pins[] = { | ||
| 371 | #ifdef CONFIG_DAVINCI_MUX | ||
| 372 | /* UART0 function */ | ||
| 373 | MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false) | ||
| 374 | MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false) | ||
| 375 | MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false) | ||
| 376 | MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false) | ||
| 377 | /* UART1 function */ | ||
| 378 | MUX_CFG(DA850, UART1_RXD, 4, 24, 15, 2, false) | ||
| 379 | MUX_CFG(DA850, UART1_TXD, 4, 28, 15, 2, false) | ||
| 380 | /* UART2 function */ | ||
| 381 | MUX_CFG(DA850, UART2_RXD, 4, 16, 15, 2, false) | ||
| 382 | MUX_CFG(DA850, UART2_TXD, 4, 20, 15, 2, false) | ||
| 383 | /* I2C1 function */ | ||
| 384 | MUX_CFG(DA850, I2C1_SCL, 4, 16, 15, 4, false) | ||
| 385 | MUX_CFG(DA850, I2C1_SDA, 4, 20, 15, 4, false) | ||
| 386 | /* I2C0 function */ | ||
| 387 | MUX_CFG(DA850, I2C0_SDA, 4, 12, 15, 2, false) | ||
| 388 | MUX_CFG(DA850, I2C0_SCL, 4, 8, 15, 2, false) | ||
| 389 | /* EMAC function */ | ||
| 390 | MUX_CFG(DA850, MII_TXEN, 2, 4, 15, 8, false) | ||
| 391 | MUX_CFG(DA850, MII_TXCLK, 2, 8, 15, 8, false) | ||
| 392 | MUX_CFG(DA850, MII_COL, 2, 12, 15, 8, false) | ||
| 393 | MUX_CFG(DA850, MII_TXD_3, 2, 16, 15, 8, false) | ||
| 394 | MUX_CFG(DA850, MII_TXD_2, 2, 20, 15, 8, false) | ||
| 395 | MUX_CFG(DA850, MII_TXD_1, 2, 24, 15, 8, false) | ||
| 396 | MUX_CFG(DA850, MII_TXD_0, 2, 28, 15, 8, false) | ||
| 397 | MUX_CFG(DA850, MII_RXCLK, 3, 0, 15, 8, false) | ||
| 398 | MUX_CFG(DA850, MII_RXDV, 3, 4, 15, 8, false) | ||
| 399 | MUX_CFG(DA850, MII_RXER, 3, 8, 15, 8, false) | ||
| 400 | MUX_CFG(DA850, MII_CRS, 3, 12, 15, 8, false) | ||
| 401 | MUX_CFG(DA850, MII_RXD_3, 3, 16, 15, 8, false) | ||
| 402 | MUX_CFG(DA850, MII_RXD_2, 3, 20, 15, 8, false) | ||
| 403 | MUX_CFG(DA850, MII_RXD_1, 3, 24, 15, 8, false) | ||
| 404 | MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false) | ||
| 405 | MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false) | ||
| 406 | MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false) | ||
| 407 | /* McASP function */ | ||
| 408 | MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false) | ||
| 409 | MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false) | ||
| 410 | MUX_CFG(DA850, AFSR, 0, 8, 15, 1, false) | ||
| 411 | MUX_CFG(DA850, AFSX, 0, 12, 15, 1, false) | ||
| 412 | MUX_CFG(DA850, AHCLKR, 0, 16, 15, 1, false) | ||
| 413 | MUX_CFG(DA850, AHCLKX, 0, 20, 15, 1, false) | ||
| 414 | MUX_CFG(DA850, AMUTE, 0, 24, 15, 1, false) | ||
| 415 | MUX_CFG(DA850, AXR_15, 1, 0, 15, 1, false) | ||
| 416 | MUX_CFG(DA850, AXR_14, 1, 4, 15, 1, false) | ||
| 417 | MUX_CFG(DA850, AXR_13, 1, 8, 15, 1, false) | ||
| 418 | MUX_CFG(DA850, AXR_12, 1, 12, 15, 1, false) | ||
| 419 | MUX_CFG(DA850, AXR_11, 1, 16, 15, 1, false) | ||
| 420 | MUX_CFG(DA850, AXR_10, 1, 20, 15, 1, false) | ||
| 421 | MUX_CFG(DA850, AXR_9, 1, 24, 15, 1, false) | ||
| 422 | MUX_CFG(DA850, AXR_8, 1, 28, 15, 1, false) | ||
| 423 | MUX_CFG(DA850, AXR_7, 2, 0, 15, 1, false) | ||
| 424 | MUX_CFG(DA850, AXR_6, 2, 4, 15, 1, false) | ||
| 425 | MUX_CFG(DA850, AXR_5, 2, 8, 15, 1, false) | ||
| 426 | MUX_CFG(DA850, AXR_4, 2, 12, 15, 1, false) | ||
| 427 | MUX_CFG(DA850, AXR_3, 2, 16, 15, 1, false) | ||
| 428 | MUX_CFG(DA850, AXR_2, 2, 20, 15, 1, false) | ||
| 429 | MUX_CFG(DA850, AXR_1, 2, 24, 15, 1, false) | ||
| 430 | MUX_CFG(DA850, AXR_0, 2, 28, 15, 1, false) | ||
| 431 | /* LCD function */ | ||
| 432 | MUX_CFG(DA850, LCD_D_7, 16, 8, 15, 2, false) | ||
| 433 | MUX_CFG(DA850, LCD_D_6, 16, 12, 15, 2, false) | ||
| 434 | MUX_CFG(DA850, LCD_D_5, 16, 16, 15, 2, false) | ||
| 435 | MUX_CFG(DA850, LCD_D_4, 16, 20, 15, 2, false) | ||
| 436 | MUX_CFG(DA850, LCD_D_3, 16, 24, 15, 2, false) | ||
| 437 | MUX_CFG(DA850, LCD_D_2, 16, 28, 15, 2, false) | ||
| 438 | MUX_CFG(DA850, LCD_D_1, 17, 0, 15, 2, false) | ||
| 439 | MUX_CFG(DA850, LCD_D_0, 17, 4, 15, 2, false) | ||
| 440 | MUX_CFG(DA850, LCD_D_15, 17, 8, 15, 2, false) | ||
| 441 | MUX_CFG(DA850, LCD_D_14, 17, 12, 15, 2, false) | ||
| 442 | MUX_CFG(DA850, LCD_D_13, 17, 16, 15, 2, false) | ||
| 443 | MUX_CFG(DA850, LCD_D_12, 17, 20, 15, 2, false) | ||
| 444 | MUX_CFG(DA850, LCD_D_11, 17, 24, 15, 2, false) | ||
| 445 | MUX_CFG(DA850, LCD_D_10, 17, 28, 15, 2, false) | ||
| 446 | MUX_CFG(DA850, LCD_D_9, 18, 0, 15, 2, false) | ||
| 447 | MUX_CFG(DA850, LCD_D_8, 18, 4, 15, 2, false) | ||
| 448 | MUX_CFG(DA850, LCD_PCLK, 18, 24, 15, 2, false) | ||
| 449 | MUX_CFG(DA850, LCD_HSYNC, 19, 0, 15, 2, false) | ||
| 450 | MUX_CFG(DA850, LCD_VSYNC, 19, 4, 15, 2, false) | ||
| 451 | MUX_CFG(DA850, NLCD_AC_ENB_CS, 19, 24, 15, 2, false) | ||
| 452 | /* MMC/SD0 function */ | ||
| 453 | MUX_CFG(DA850, MMCSD0_DAT_0, 10, 8, 15, 2, false) | ||
| 454 | MUX_CFG(DA850, MMCSD0_DAT_1, 10, 12, 15, 2, false) | ||
| 455 | MUX_CFG(DA850, MMCSD0_DAT_2, 10, 16, 15, 2, false) | ||
| 456 | MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false) | ||
| 457 | MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false) | ||
| 458 | MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false) | ||
| 459 | /* EMIF2.5/EMIFA function */ | ||
| 460 | MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false) | ||
| 461 | MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false) | ||
| 462 | MUX_CFG(DA850, EMA_D_5, 9, 8, 15, 1, false) | ||
| 463 | MUX_CFG(DA850, EMA_D_4, 9, 12, 15, 1, false) | ||
| 464 | MUX_CFG(DA850, EMA_D_3, 9, 16, 15, 1, false) | ||
| 465 | MUX_CFG(DA850, EMA_D_2, 9, 20, 15, 1, false) | ||
| 466 | MUX_CFG(DA850, EMA_D_1, 9, 24, 15, 1, false) | ||
| 467 | MUX_CFG(DA850, EMA_D_0, 9, 28, 15, 1, false) | ||
| 468 | MUX_CFG(DA850, EMA_A_1, 12, 24, 15, 1, false) | ||
| 469 | MUX_CFG(DA850, EMA_A_2, 12, 20, 15, 1, false) | ||
| 470 | MUX_CFG(DA850, NEMA_CS_3, 7, 4, 15, 1, false) | ||
| 471 | MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false) | ||
| 472 | MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false) | ||
| 473 | MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false) | ||
| 474 | MUX_CFG(DA850, EMA_A_0, 12, 28, 15, 1, false) | ||
| 475 | MUX_CFG(DA850, EMA_A_3, 12, 16, 15, 1, false) | ||
| 476 | MUX_CFG(DA850, EMA_A_4, 12, 12, 15, 1, false) | ||
| 477 | MUX_CFG(DA850, EMA_A_5, 12, 8, 15, 1, false) | ||
| 478 | MUX_CFG(DA850, EMA_A_6, 12, 4, 15, 1, false) | ||
| 479 | MUX_CFG(DA850, EMA_A_7, 12, 0, 15, 1, false) | ||
| 480 | MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false) | ||
| 481 | MUX_CFG(DA850, EMA_A_9, 11, 24, 15, 1, false) | ||
| 482 | MUX_CFG(DA850, EMA_A_10, 11, 20, 15, 1, false) | ||
| 483 | MUX_CFG(DA850, EMA_A_11, 11, 16, 15, 1, false) | ||
| 484 | MUX_CFG(DA850, EMA_A_12, 11, 12, 15, 1, false) | ||
| 485 | MUX_CFG(DA850, EMA_A_13, 11, 8, 15, 1, false) | ||
| 486 | MUX_CFG(DA850, EMA_A_14, 11, 4, 15, 1, false) | ||
| 487 | MUX_CFG(DA850, EMA_A_15, 11, 0, 15, 1, false) | ||
| 488 | MUX_CFG(DA850, EMA_A_16, 10, 28, 15, 1, false) | ||
| 489 | MUX_CFG(DA850, EMA_A_17, 10, 24, 15, 1, false) | ||
| 490 | MUX_CFG(DA850, EMA_A_18, 10, 20, 15, 1, false) | ||
| 491 | MUX_CFG(DA850, EMA_A_19, 10, 16, 15, 1, false) | ||
| 492 | MUX_CFG(DA850, EMA_A_20, 10, 12, 15, 1, false) | ||
| 493 | MUX_CFG(DA850, EMA_A_21, 10, 8, 15, 1, false) | ||
| 494 | MUX_CFG(DA850, EMA_A_22, 10, 4, 15, 1, false) | ||
| 495 | MUX_CFG(DA850, EMA_A_23, 10, 0, 15, 1, false) | ||
| 496 | MUX_CFG(DA850, EMA_D_8, 8, 28, 15, 1, false) | ||
| 497 | MUX_CFG(DA850, EMA_D_9, 8, 24, 15, 1, false) | ||
| 498 | MUX_CFG(DA850, EMA_D_10, 8, 20, 15, 1, false) | ||
| 499 | MUX_CFG(DA850, EMA_D_11, 8, 16, 15, 1, false) | ||
| 500 | MUX_CFG(DA850, EMA_D_12, 8, 12, 15, 1, false) | ||
| 501 | MUX_CFG(DA850, EMA_D_13, 8, 8, 15, 1, false) | ||
| 502 | MUX_CFG(DA850, EMA_D_14, 8, 4, 15, 1, false) | ||
| 503 | MUX_CFG(DA850, EMA_D_15, 8, 0, 15, 1, false) | ||
| 504 | MUX_CFG(DA850, EMA_BA_1, 5, 24, 15, 1, false) | ||
| 505 | MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false) | ||
| 506 | MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false) | ||
| 507 | MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false) | ||
| 508 | /* GPIO function */ | ||
| 509 | MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) | ||
| 510 | MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false) | ||
| 511 | MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) | ||
| 512 | MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) | ||
| 513 | #endif | ||
| 514 | }; | ||
| 515 | |||
| 516 | const short da850_uart0_pins[] __initdata = { | ||
| 517 | DA850_NUART0_CTS, DA850_NUART0_RTS, DA850_UART0_RXD, DA850_UART0_TXD, | ||
| 518 | -1 | ||
| 519 | }; | ||
| 520 | |||
| 521 | const short da850_uart1_pins[] __initdata = { | ||
| 522 | DA850_UART1_RXD, DA850_UART1_TXD, | ||
| 523 | -1 | ||
| 524 | }; | ||
| 525 | |||
| 526 | const short da850_uart2_pins[] __initdata = { | ||
| 527 | DA850_UART2_RXD, DA850_UART2_TXD, | ||
| 528 | -1 | ||
| 529 | }; | ||
| 530 | |||
| 531 | const short da850_i2c0_pins[] __initdata = { | ||
| 532 | DA850_I2C0_SDA, DA850_I2C0_SCL, | ||
| 533 | -1 | ||
| 534 | }; | ||
| 535 | |||
| 536 | const short da850_i2c1_pins[] __initdata = { | ||
| 537 | DA850_I2C1_SCL, DA850_I2C1_SDA, | ||
| 538 | -1 | ||
| 539 | }; | ||
| 540 | |||
| 541 | const short da850_cpgmac_pins[] __initdata = { | ||
| 542 | DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, | ||
| 543 | DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, | ||
| 544 | DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, | ||
| 545 | DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, | ||
| 546 | DA850_MDIO_D, | ||
| 547 | -1 | ||
| 548 | }; | ||
| 549 | |||
| 550 | const short da850_mcasp_pins[] __initdata = { | ||
| 551 | DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, | ||
| 552 | DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, | ||
| 553 | DA850_AXR_11, DA850_AXR_12, | ||
| 554 | -1 | ||
| 555 | }; | ||
| 556 | |||
| 557 | const short da850_lcdcntl_pins[] __initdata = { | ||
| 558 | DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, DA850_LCD_D_4, | ||
| 559 | DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, DA850_LCD_D_8, | ||
| 560 | DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11, DA850_LCD_D_12, | ||
| 561 | DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15, DA850_LCD_PCLK, | ||
| 562 | DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS, DA850_GPIO2_15, | ||
| 563 | DA850_GPIO8_10, | ||
| 564 | -1 | ||
| 565 | }; | ||
| 566 | |||
| 567 | const short da850_mmcsd0_pins[] __initdata = { | ||
| 568 | DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, | ||
| 569 | DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, | ||
| 570 | DA850_GPIO4_0, DA850_GPIO4_1, | ||
| 571 | -1 | ||
| 572 | }; | ||
| 573 | |||
| 574 | const short da850_nand_pins[] __initdata = { | ||
| 575 | DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4, | ||
| 576 | DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0, | ||
| 577 | DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, | ||
| 578 | DA850_NEMA_WE, DA850_NEMA_OE, | ||
| 579 | -1 | ||
| 580 | }; | ||
| 581 | |||
| 582 | const short da850_nor_pins[] __initdata = { | ||
| 583 | DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, | ||
| 584 | DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, | ||
| 585 | DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, | ||
| 586 | DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, | ||
| 587 | DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, | ||
| 588 | DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, | ||
| 589 | DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, | ||
| 590 | DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, | ||
| 591 | DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, | ||
| 592 | DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, | ||
| 593 | DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, | ||
| 594 | DA850_EMA_A_22, DA850_EMA_A_23, | ||
| 595 | -1 | ||
| 596 | }; | ||
| 597 | |||
| 598 | /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ | ||
| 599 | static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { | ||
| 600 | [IRQ_DA8XX_COMMTX] = 7, | ||
| 601 | [IRQ_DA8XX_COMMRX] = 7, | ||
| 602 | [IRQ_DA8XX_NINT] = 7, | ||
| 603 | [IRQ_DA8XX_EVTOUT0] = 7, | ||
| 604 | [IRQ_DA8XX_EVTOUT1] = 7, | ||
| 605 | [IRQ_DA8XX_EVTOUT2] = 7, | ||
| 606 | [IRQ_DA8XX_EVTOUT3] = 7, | ||
| 607 | [IRQ_DA8XX_EVTOUT4] = 7, | ||
| 608 | [IRQ_DA8XX_EVTOUT5] = 7, | ||
| 609 | [IRQ_DA8XX_EVTOUT6] = 7, | ||
| 610 | [IRQ_DA8XX_EVTOUT6] = 7, | ||
| 611 | [IRQ_DA8XX_EVTOUT7] = 7, | ||
| 612 | [IRQ_DA8XX_CCINT0] = 7, | ||
| 613 | [IRQ_DA8XX_CCERRINT] = 7, | ||
| 614 | [IRQ_DA8XX_TCERRINT0] = 7, | ||
| 615 | [IRQ_DA8XX_AEMIFINT] = 7, | ||
| 616 | [IRQ_DA8XX_I2CINT0] = 7, | ||
| 617 | [IRQ_DA8XX_MMCSDINT0] = 7, | ||
| 618 | [IRQ_DA8XX_MMCSDINT1] = 7, | ||
| 619 | [IRQ_DA8XX_ALLINT0] = 7, | ||
| 620 | [IRQ_DA8XX_RTC] = 7, | ||
| 621 | [IRQ_DA8XX_SPINT0] = 7, | ||
| 622 | [IRQ_DA8XX_TINT12_0] = 7, | ||
| 623 | [IRQ_DA8XX_TINT34_0] = 7, | ||
| 624 | [IRQ_DA8XX_TINT12_1] = 7, | ||
| 625 | [IRQ_DA8XX_TINT34_1] = 7, | ||
| 626 | [IRQ_DA8XX_UARTINT0] = 7, | ||
| 627 | [IRQ_DA8XX_KEYMGRINT] = 7, | ||
| 628 | [IRQ_DA8XX_SECINT] = 7, | ||
| 629 | [IRQ_DA8XX_SECKEYERR] = 7, | ||
| 630 | [IRQ_DA850_MPUADDRERR0] = 7, | ||
| 631 | [IRQ_DA850_MPUPROTERR0] = 7, | ||
| 632 | [IRQ_DA850_IOPUADDRERR0] = 7, | ||
| 633 | [IRQ_DA850_IOPUPROTERR0] = 7, | ||
| 634 | [IRQ_DA850_IOPUADDRERR1] = 7, | ||
| 635 | [IRQ_DA850_IOPUPROTERR1] = 7, | ||
| 636 | [IRQ_DA850_IOPUADDRERR2] = 7, | ||
| 637 | [IRQ_DA850_IOPUPROTERR2] = 7, | ||
| 638 | [IRQ_DA850_BOOTCFG_ADDR_ERR] = 7, | ||
| 639 | [IRQ_DA850_BOOTCFG_PROT_ERR] = 7, | ||
| 640 | [IRQ_DA850_MPUADDRERR1] = 7, | ||
| 641 | [IRQ_DA850_MPUPROTERR1] = 7, | ||
| 642 | [IRQ_DA850_IOPUADDRERR3] = 7, | ||
| 643 | [IRQ_DA850_IOPUPROTERR3] = 7, | ||
| 644 | [IRQ_DA850_IOPUADDRERR4] = 7, | ||
| 645 | [IRQ_DA850_IOPUPROTERR4] = 7, | ||
| 646 | [IRQ_DA850_IOPUADDRERR5] = 7, | ||
| 647 | [IRQ_DA850_IOPUPROTERR5] = 7, | ||
| 648 | [IRQ_DA850_MIOPU_BOOTCFG_ERR] = 7, | ||
| 649 | [IRQ_DA8XX_CHIPINT0] = 7, | ||
| 650 | [IRQ_DA8XX_CHIPINT1] = 7, | ||
| 651 | [IRQ_DA8XX_CHIPINT2] = 7, | ||
| 652 | [IRQ_DA8XX_CHIPINT3] = 7, | ||
| 653 | [IRQ_DA8XX_TCERRINT1] = 7, | ||
| 654 | [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7, | ||
| 655 | [IRQ_DA8XX_C0_RX_PULSE] = 7, | ||
| 656 | [IRQ_DA8XX_C0_TX_PULSE] = 7, | ||
| 657 | [IRQ_DA8XX_C0_MISC_PULSE] = 7, | ||
| 658 | [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7, | ||
| 659 | [IRQ_DA8XX_C1_RX_PULSE] = 7, | ||
| 660 | [IRQ_DA8XX_C1_TX_PULSE] = 7, | ||
| 661 | [IRQ_DA8XX_C1_MISC_PULSE] = 7, | ||
| 662 | [IRQ_DA8XX_MEMERR] = 7, | ||
| 663 | [IRQ_DA8XX_GPIO0] = 7, | ||
| 664 | [IRQ_DA8XX_GPIO1] = 7, | ||
| 665 | [IRQ_DA8XX_GPIO2] = 7, | ||
| 666 | [IRQ_DA8XX_GPIO3] = 7, | ||
| 667 | [IRQ_DA8XX_GPIO4] = 7, | ||
| 668 | [IRQ_DA8XX_GPIO5] = 7, | ||
| 669 | [IRQ_DA8XX_GPIO6] = 7, | ||
| 670 | [IRQ_DA8XX_GPIO7] = 7, | ||
| 671 | [IRQ_DA8XX_GPIO8] = 7, | ||
| 672 | [IRQ_DA8XX_I2CINT1] = 7, | ||
| 673 | [IRQ_DA8XX_LCDINT] = 7, | ||
| 674 | [IRQ_DA8XX_UARTINT1] = 7, | ||
| 675 | [IRQ_DA8XX_MCASPINT] = 7, | ||
| 676 | [IRQ_DA8XX_ALLINT1] = 7, | ||
| 677 | [IRQ_DA8XX_SPINT1] = 7, | ||
| 678 | [IRQ_DA8XX_UHPI_INT1] = 7, | ||
| 679 | [IRQ_DA8XX_USB_INT] = 7, | ||
| 680 | [IRQ_DA8XX_IRQN] = 7, | ||
| 681 | [IRQ_DA8XX_RWAKEUP] = 7, | ||
| 682 | [IRQ_DA8XX_UARTINT2] = 7, | ||
| 683 | [IRQ_DA8XX_DFTSSINT] = 7, | ||
| 684 | [IRQ_DA8XX_EHRPWM0] = 7, | ||
| 685 | [IRQ_DA8XX_EHRPWM0TZ] = 7, | ||
| 686 | [IRQ_DA8XX_EHRPWM1] = 7, | ||
| 687 | [IRQ_DA8XX_EHRPWM1TZ] = 7, | ||
| 688 | [IRQ_DA850_SATAINT] = 7, | ||
| 689 | [IRQ_DA850_TINT12_2] = 7, | ||
| 690 | [IRQ_DA850_TINT34_2] = 7, | ||
| 691 | [IRQ_DA850_TINTALL_2] = 7, | ||
| 692 | [IRQ_DA8XX_ECAP0] = 7, | ||
| 693 | [IRQ_DA8XX_ECAP1] = 7, | ||
| 694 | [IRQ_DA8XX_ECAP2] = 7, | ||
| 695 | [IRQ_DA850_MMCSDINT0_1] = 7, | ||
| 696 | [IRQ_DA850_MMCSDINT1_1] = 7, | ||
| 697 | [IRQ_DA850_T12CMPINT0_2] = 7, | ||
| 698 | [IRQ_DA850_T12CMPINT1_2] = 7, | ||
| 699 | [IRQ_DA850_T12CMPINT2_2] = 7, | ||
| 700 | [IRQ_DA850_T12CMPINT3_2] = 7, | ||
| 701 | [IRQ_DA850_T12CMPINT4_2] = 7, | ||
| 702 | [IRQ_DA850_T12CMPINT5_2] = 7, | ||
| 703 | [IRQ_DA850_T12CMPINT6_2] = 7, | ||
| 704 | [IRQ_DA850_T12CMPINT7_2] = 7, | ||
| 705 | [IRQ_DA850_T12CMPINT0_3] = 7, | ||
| 706 | [IRQ_DA850_T12CMPINT1_3] = 7, | ||
| 707 | [IRQ_DA850_T12CMPINT2_3] = 7, | ||
| 708 | [IRQ_DA850_T12CMPINT3_3] = 7, | ||
| 709 | [IRQ_DA850_T12CMPINT4_3] = 7, | ||
| 710 | [IRQ_DA850_T12CMPINT5_3] = 7, | ||
| 711 | [IRQ_DA850_T12CMPINT6_3] = 7, | ||
| 712 | [IRQ_DA850_T12CMPINT7_3] = 7, | ||
| 713 | [IRQ_DA850_RPIINT] = 7, | ||
| 714 | [IRQ_DA850_VPIFINT] = 7, | ||
| 715 | [IRQ_DA850_CCINT1] = 7, | ||
| 716 | [IRQ_DA850_CCERRINT1] = 7, | ||
| 717 | [IRQ_DA850_TCERRINT2] = 7, | ||
| 718 | [IRQ_DA850_TINT12_3] = 7, | ||
| 719 | [IRQ_DA850_TINT34_3] = 7, | ||
| 720 | [IRQ_DA850_TINTALL_3] = 7, | ||
| 721 | [IRQ_DA850_MCBSP0RINT] = 7, | ||
| 722 | [IRQ_DA850_MCBSP0XINT] = 7, | ||
| 723 | [IRQ_DA850_MCBSP1RINT] = 7, | ||
| 724 | [IRQ_DA850_MCBSP1XINT] = 7, | ||
| 725 | [IRQ_DA8XX_ARMCLKSTOPREQ] = 7, | ||
| 726 | }; | ||
| 727 | |||
| 728 | static struct map_desc da850_io_desc[] = { | ||
| 729 | { | ||
| 730 | .virtual = IO_VIRT, | ||
| 731 | .pfn = __phys_to_pfn(IO_PHYS), | ||
| 732 | .length = IO_SIZE, | ||
| 733 | .type = MT_DEVICE | ||
| 734 | }, | ||
| 735 | { | ||
| 736 | .virtual = DA8XX_CP_INTC_VIRT, | ||
| 737 | .pfn = __phys_to_pfn(DA8XX_CP_INTC_BASE), | ||
| 738 | .length = DA8XX_CP_INTC_SIZE, | ||
| 739 | .type = MT_DEVICE | ||
| 740 | }, | ||
| 741 | }; | ||
| 742 | |||
| 743 | static void __iomem *da850_psc_bases[] = { | ||
| 744 | IO_ADDRESS(DA8XX_PSC0_BASE), | ||
| 745 | IO_ADDRESS(DA8XX_PSC1_BASE), | ||
| 746 | }; | ||
| 747 | |||
| 748 | /* Contents of JTAG ID register used to identify exact cpu type */ | ||
| 749 | static struct davinci_id da850_ids[] = { | ||
| 750 | { | ||
| 751 | .variant = 0x0, | ||
| 752 | .part_no = 0xb7d1, | ||
| 753 | .manufacturer = 0x017, /* 0x02f >> 1 */ | ||
| 754 | .cpu_id = DAVINCI_CPU_ID_DA850, | ||
| 755 | .name = "da850/omap-l138", | ||
| 756 | }, | ||
| 757 | }; | ||
| 758 | |||
| 759 | static struct davinci_timer_instance da850_timer_instance[4] = { | ||
| 760 | { | ||
| 761 | .base = IO_ADDRESS(DA8XX_TIMER64P0_BASE), | ||
| 762 | .bottom_irq = IRQ_DA8XX_TINT12_0, | ||
| 763 | .top_irq = IRQ_DA8XX_TINT34_0, | ||
| 764 | }, | ||
| 765 | { | ||
| 766 | .base = IO_ADDRESS(DA8XX_TIMER64P1_BASE), | ||
| 767 | .bottom_irq = IRQ_DA8XX_TINT12_1, | ||
| 768 | .top_irq = IRQ_DA8XX_TINT34_1, | ||
| 769 | }, | ||
| 770 | { | ||
| 771 | .base = IO_ADDRESS(DA850_TIMER64P2_BASE), | ||
| 772 | .bottom_irq = IRQ_DA850_TINT12_2, | ||
| 773 | .top_irq = IRQ_DA850_TINT34_2, | ||
| 774 | }, | ||
| 775 | { | ||
| 776 | .base = IO_ADDRESS(DA850_TIMER64P3_BASE), | ||
| 777 | .bottom_irq = IRQ_DA850_TINT12_3, | ||
| 778 | .top_irq = IRQ_DA850_TINT34_3, | ||
| 779 | }, | ||
| 780 | }; | ||
| 781 | |||
| 782 | /* | ||
| 783 | * T0_BOT: Timer 0, bottom : Used for clock_event | ||
| 784 | * T0_TOP: Timer 0, top : Used for clocksource | ||
| 785 | * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer | ||
| 786 | */ | ||
| 787 | static struct davinci_timer_info da850_timer_info = { | ||
| 788 | .timers = da850_timer_instance, | ||
| 789 | .clockevent_id = T0_BOT, | ||
| 790 | .clocksource_id = T0_TOP, | ||
| 791 | }; | ||
| 792 | |||
| 793 | static struct davinci_soc_info davinci_soc_info_da850 = { | ||
| 794 | .io_desc = da850_io_desc, | ||
| 795 | .io_desc_num = ARRAY_SIZE(da850_io_desc), | ||
| 796 | .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG), | ||
| 797 | .ids = da850_ids, | ||
| 798 | .ids_num = ARRAY_SIZE(da850_ids), | ||
| 799 | .cpu_clks = da850_clks, | ||
| 800 | .psc_bases = da850_psc_bases, | ||
| 801 | .psc_bases_num = ARRAY_SIZE(da850_psc_bases), | ||
| 802 | .pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120), | ||
| 803 | .pinmux_pins = da850_pins, | ||
| 804 | .pinmux_pins_num = ARRAY_SIZE(da850_pins), | ||
| 805 | .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, | ||
| 806 | .intc_type = DAVINCI_INTC_TYPE_CP_INTC, | ||
| 807 | .intc_irq_prios = da850_default_priorities, | ||
| 808 | .intc_irq_num = DA850_N_CP_INTC_IRQ, | ||
| 809 | .timer_info = &da850_timer_info, | ||
| 810 | .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE), | ||
| 811 | .gpio_num = 144, | ||
| 812 | .gpio_irq = IRQ_DA8XX_GPIO0, | ||
| 813 | .serial_dev = &da8xx_serial_device, | ||
| 814 | .emac_pdata = &da8xx_emac_pdata, | ||
| 815 | }; | ||
| 816 | |||
| 817 | void __init da850_init(void) | ||
| 818 | { | ||
| 819 | davinci_common_init(&davinci_soc_info_da850); | ||
| 820 | } | ||
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c new file mode 100644 index 000000000000..58ad5b66fd60 --- /dev/null +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
| @@ -0,0 +1,450 @@ | |||
| 1 | /* | ||
| 2 | * DA8XX/OMAP L1XX platform device data | ||
| 3 | * | ||
| 4 | * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com> | ||
| 5 | * Derived from code that was: | ||
| 6 | * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License, or | ||
| 11 | * (at your option) any later version. | ||
| 12 | */ | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/dma-mapping.h> | ||
| 18 | #include <linux/serial_8250.h> | ||
| 19 | |||
| 20 | #include <mach/cputype.h> | ||
| 21 | #include <mach/common.h> | ||
| 22 | #include <mach/time.h> | ||
| 23 | #include <mach/da8xx.h> | ||
| 24 | #include <video/da8xx-fb.h> | ||
| 25 | |||
| 26 | #include "clock.h" | ||
| 27 | |||
| 28 | #define DA8XX_TPCC_BASE 0x01c00000 | ||
| 29 | #define DA8XX_TPTC0_BASE 0x01c08000 | ||
| 30 | #define DA8XX_TPTC1_BASE 0x01c08400 | ||
| 31 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ | ||
| 32 | #define DA8XX_I2C0_BASE 0x01c22000 | ||
| 33 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 | ||
| 34 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 | ||
| 35 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 | ||
| 36 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 | ||
| 37 | #define DA8XX_GPIO_BASE 0x01e26000 | ||
| 38 | #define DA8XX_I2C1_BASE 0x01e28000 | ||
| 39 | |||
| 40 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 | ||
| 41 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 | ||
| 42 | #define DA8XX_EMAC_RAM_OFFSET 0x0000 | ||
| 43 | #define DA8XX_MDIO_REG_OFFSET 0x4000 | ||
| 44 | #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K | ||
| 45 | |||
| 46 | static struct plat_serial8250_port da8xx_serial_pdata[] = { | ||
| 47 | { | ||
| 48 | .mapbase = DA8XX_UART0_BASE, | ||
| 49 | .irq = IRQ_DA8XX_UARTINT0, | ||
| 50 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
| 51 | UPF_IOREMAP, | ||
| 52 | .iotype = UPIO_MEM, | ||
| 53 | .regshift = 2, | ||
| 54 | }, | ||
| 55 | { | ||
| 56 | .mapbase = DA8XX_UART1_BASE, | ||
| 57 | .irq = IRQ_DA8XX_UARTINT1, | ||
| 58 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
| 59 | UPF_IOREMAP, | ||
| 60 | .iotype = UPIO_MEM, | ||
| 61 | .regshift = 2, | ||
| 62 | }, | ||
| 63 | { | ||
| 64 | .mapbase = DA8XX_UART2_BASE, | ||
| 65 | .irq = IRQ_DA8XX_UARTINT2, | ||
| 66 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
| 67 | UPF_IOREMAP, | ||
| 68 | .iotype = UPIO_MEM, | ||
| 69 | .regshift = 2, | ||
| 70 | }, | ||
| 71 | { | ||
| 72 | .flags = 0, | ||
| 73 | }, | ||
| 74 | }; | ||
| 75 | |||
| 76 | struct platform_device da8xx_serial_device = { | ||
| 77 | .name = "serial8250", | ||
| 78 | .id = PLAT8250_DEV_PLATFORM, | ||
| 79 | .dev = { | ||
| 80 | .platform_data = da8xx_serial_pdata, | ||
| 81 | }, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static const s8 da8xx_dma_chan_no_event[] = { | ||
| 85 | 20, 21, | ||
| 86 | -1 | ||
| 87 | }; | ||
| 88 | |||
| 89 | static const s8 da8xx_queue_tc_mapping[][2] = { | ||
| 90 | /* {event queue no, TC no} */ | ||
| 91 | {0, 0}, | ||
| 92 | {1, 1}, | ||
| 93 | {-1, -1} | ||
| 94 | }; | ||
| 95 | |||
| 96 | static const s8 da8xx_queue_priority_mapping[][2] = { | ||
| 97 | /* {event queue no, Priority} */ | ||
| 98 | {0, 3}, | ||
| 99 | {1, 7}, | ||
| 100 | {-1, -1} | ||
| 101 | }; | ||
| 102 | |||
| 103 | static struct edma_soc_info da8xx_edma_info[] = { | ||
| 104 | { | ||
| 105 | .n_channel = 32, | ||
| 106 | .n_region = 4, | ||
| 107 | .n_slot = 128, | ||
| 108 | .n_tc = 2, | ||
| 109 | .n_cc = 1, | ||
| 110 | .noevent = da8xx_dma_chan_no_event, | ||
| 111 | .queue_tc_mapping = da8xx_queue_tc_mapping, | ||
| 112 | .queue_priority_mapping = da8xx_queue_priority_mapping, | ||
| 113 | }, | ||
| 114 | }; | ||
| 115 | |||
| 116 | static struct resource da8xx_edma_resources[] = { | ||
| 117 | { | ||
| 118 | .name = "edma_cc0", | ||
| 119 | .start = DA8XX_TPCC_BASE, | ||
| 120 | .end = DA8XX_TPCC_BASE + SZ_32K - 1, | ||
| 121 | .flags = IORESOURCE_MEM, | ||
| 122 | }, | ||
| 123 | { | ||
| 124 | .name = "edma_tc0", | ||
| 125 | .start = DA8XX_TPTC0_BASE, | ||
| 126 | .end = DA8XX_TPTC0_BASE + SZ_1K - 1, | ||
| 127 | .flags = IORESOURCE_MEM, | ||
| 128 | }, | ||
| 129 | { | ||
| 130 | .name = "edma_tc1", | ||
| 131 | .start = DA8XX_TPTC1_BASE, | ||
| 132 | .end = DA8XX_TPTC1_BASE + SZ_1K - 1, | ||
| 133 | .flags = IORESOURCE_MEM, | ||
| 134 | }, | ||
| 135 | { | ||
| 136 | .name = "edma0", | ||
| 137 | .start = IRQ_DA8XX_CCINT0, | ||
| 138 | .flags = IORESOURCE_IRQ, | ||
| 139 | }, | ||
| 140 | { | ||
| 141 | .name = "edma0_err", | ||
| 142 | .start = IRQ_DA8XX_CCERRINT, | ||
| 143 | .flags = IORESOURCE_IRQ, | ||
| 144 | }, | ||
| 145 | }; | ||
| 146 | |||
| 147 | static struct platform_device da8xx_edma_device = { | ||
| 148 | .name = "edma", | ||
| 149 | .id = -1, | ||
| 150 | .dev = { | ||
| 151 | .platform_data = da8xx_edma_info, | ||
| 152 | }, | ||
| 153 | .num_resources = ARRAY_SIZE(da8xx_edma_resources), | ||
| 154 | .resource = da8xx_edma_resources, | ||
| 155 | }; | ||
| 156 | |||
| 157 | int __init da8xx_register_edma(void) | ||
| 158 | { | ||
| 159 | return platform_device_register(&da8xx_edma_device); | ||
| 160 | } | ||
| 161 | |||
| 162 | static struct resource da8xx_i2c_resources0[] = { | ||
| 163 | { | ||
| 164 | .start = DA8XX_I2C0_BASE, | ||
| 165 | .end = DA8XX_I2C0_BASE + SZ_4K - 1, | ||
| 166 | .flags = IORESOURCE_MEM, | ||
| 167 | }, | ||
| 168 | { | ||
| 169 | .start = IRQ_DA8XX_I2CINT0, | ||
| 170 | .end = IRQ_DA8XX_I2CINT0, | ||
| 171 | .flags = IORESOURCE_IRQ, | ||
| 172 | }, | ||
| 173 | }; | ||
| 174 | |||
| 175 | static struct platform_device da8xx_i2c_device0 = { | ||
| 176 | .name = "i2c_davinci", | ||
| 177 | .id = 1, | ||
| 178 | .num_resources = ARRAY_SIZE(da8xx_i2c_resources0), | ||
| 179 | .resource = da8xx_i2c_resources0, | ||
| 180 | }; | ||
| 181 | |||
| 182 | static struct resource da8xx_i2c_resources1[] = { | ||
| 183 | { | ||
| 184 | .start = DA8XX_I2C1_BASE, | ||
| 185 | .end = DA8XX_I2C1_BASE + SZ_4K - 1, | ||
| 186 | .flags = IORESOURCE_MEM, | ||
| 187 | }, | ||
| 188 | { | ||
| 189 | .start = IRQ_DA8XX_I2CINT1, | ||
| 190 | .end = IRQ_DA8XX_I2CINT1, | ||
| 191 | .flags = IORESOURCE_IRQ, | ||
| 192 | }, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct platform_device da8xx_i2c_device1 = { | ||
| 196 | .name = "i2c_davinci", | ||
| 197 | .id = 2, | ||
| 198 | .num_resources = ARRAY_SIZE(da8xx_i2c_resources1), | ||
| 199 | .resource = da8xx_i2c_resources1, | ||
| 200 | }; | ||
| 201 | |||
| 202 | int __init da8xx_register_i2c(int instance, | ||
| 203 | struct davinci_i2c_platform_data *pdata) | ||
| 204 | { | ||
| 205 | struct platform_device *pdev; | ||
| 206 | |||
| 207 | if (instance == 0) | ||
| 208 | pdev = &da8xx_i2c_device0; | ||
| 209 | else if (instance == 1) | ||
| 210 | pdev = &da8xx_i2c_device1; | ||
| 211 | else | ||
| 212 | return -EINVAL; | ||
| 213 | |||
| 214 | pdev->dev.platform_data = pdata; | ||
| 215 | return platform_device_register(pdev); | ||
| 216 | } | ||
| 217 | |||
| 218 | static struct resource da8xx_watchdog_resources[] = { | ||
| 219 | { | ||
| 220 | .start = DA8XX_WDOG_BASE, | ||
| 221 | .end = DA8XX_WDOG_BASE + SZ_4K - 1, | ||
| 222 | .flags = IORESOURCE_MEM, | ||
| 223 | }, | ||
| 224 | }; | ||
| 225 | |||
| 226 | struct platform_device davinci_wdt_device = { | ||
| 227 | .name = "watchdog", | ||
| 228 | .id = -1, | ||
| 229 | .num_resources = ARRAY_SIZE(da8xx_watchdog_resources), | ||
| 230 | .resource = da8xx_watchdog_resources, | ||
| 231 | }; | ||
| 232 | |||
| 233 | int __init da8xx_register_watchdog(void) | ||
| 234 | { | ||
| 235 | return platform_device_register(&davinci_wdt_device); | ||
| 236 | } | ||
| 237 | |||
| 238 | static struct resource da8xx_emac_resources[] = { | ||
| 239 | { | ||
| 240 | .start = DA8XX_EMAC_CPPI_PORT_BASE, | ||
| 241 | .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1, | ||
| 242 | .flags = IORESOURCE_MEM, | ||
| 243 | }, | ||
| 244 | { | ||
| 245 | .start = IRQ_DA8XX_C0_RX_THRESH_PULSE, | ||
| 246 | .end = IRQ_DA8XX_C0_RX_THRESH_PULSE, | ||
| 247 | .flags = IORESOURCE_IRQ, | ||
| 248 | }, | ||
| 249 | { | ||
| 250 | .start = IRQ_DA8XX_C0_RX_PULSE, | ||
| 251 | .end = IRQ_DA8XX_C0_RX_PULSE, | ||
| 252 | .flags = IORESOURCE_IRQ, | ||
| 253 | }, | ||
| 254 | { | ||
| 255 | .start = IRQ_DA8XX_C0_TX_PULSE, | ||
| 256 | .end = IRQ_DA8XX_C0_TX_PULSE, | ||
| 257 | .flags = IORESOURCE_IRQ, | ||
| 258 | }, | ||
| 259 | { | ||
| 260 | .start = IRQ_DA8XX_C0_MISC_PULSE, | ||
| 261 | .end = IRQ_DA8XX_C0_MISC_PULSE, | ||
| 262 | .flags = IORESOURCE_IRQ, | ||
| 263 | }, | ||
| 264 | }; | ||
| 265 | |||
| 266 | struct emac_platform_data da8xx_emac_pdata = { | ||
| 267 | .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, | ||
| 268 | .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, | ||
| 269 | .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, | ||
| 270 | .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET, | ||
| 271 | .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, | ||
| 272 | .version = EMAC_VERSION_2, | ||
| 273 | }; | ||
| 274 | |||
| 275 | static struct platform_device da8xx_emac_device = { | ||
| 276 | .name = "davinci_emac", | ||
| 277 | .id = 1, | ||
| 278 | .dev = { | ||
| 279 | .platform_data = &da8xx_emac_pdata, | ||
| 280 | }, | ||
| 281 | .num_resources = ARRAY_SIZE(da8xx_emac_resources), | ||
| 282 | .resource = da8xx_emac_resources, | ||
| 283 | }; | ||
| 284 | |||
| 285 | static struct resource da830_mcasp1_resources[] = { | ||
| 286 | { | ||
| 287 | .name = "mcasp1", | ||
| 288 | .start = DAVINCI_DA830_MCASP1_REG_BASE, | ||
| 289 | .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1, | ||
| 290 | .flags = IORESOURCE_MEM, | ||
| 291 | }, | ||
| 292 | /* TX event */ | ||
| 293 | { | ||
| 294 | .start = DAVINCI_DA830_DMA_MCASP1_AXEVT, | ||
| 295 | .end = DAVINCI_DA830_DMA_MCASP1_AXEVT, | ||
| 296 | .flags = IORESOURCE_DMA, | ||
| 297 | }, | ||
| 298 | /* RX event */ | ||
| 299 | { | ||
| 300 | .start = DAVINCI_DA830_DMA_MCASP1_AREVT, | ||
| 301 | .end = DAVINCI_DA830_DMA_MCASP1_AREVT, | ||
| 302 | .flags = IORESOURCE_DMA, | ||
| 303 | }, | ||
| 304 | }; | ||
| 305 | |||
| 306 | static struct platform_device da830_mcasp1_device = { | ||
| 307 | .name = "davinci-mcasp", | ||
| 308 | .id = 1, | ||
| 309 | .num_resources = ARRAY_SIZE(da830_mcasp1_resources), | ||
| 310 | .resource = da830_mcasp1_resources, | ||
| 311 | }; | ||
| 312 | |||
| 313 | static struct resource da850_mcasp_resources[] = { | ||
| 314 | { | ||
| 315 | .name = "mcasp", | ||
| 316 | .start = DAVINCI_DA8XX_MCASP0_REG_BASE, | ||
| 317 | .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1, | ||
| 318 | .flags = IORESOURCE_MEM, | ||
| 319 | }, | ||
| 320 | /* TX event */ | ||
| 321 | { | ||
| 322 | .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, | ||
| 323 | .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, | ||
| 324 | .flags = IORESOURCE_DMA, | ||
| 325 | }, | ||
| 326 | /* RX event */ | ||
| 327 | { | ||
| 328 | .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT, | ||
| 329 | .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT, | ||
| 330 | .flags = IORESOURCE_DMA, | ||
| 331 | }, | ||
| 332 | }; | ||
| 333 | |||
| 334 | static struct platform_device da850_mcasp_device = { | ||
| 335 | .name = "davinci-mcasp", | ||
| 336 | .id = 0, | ||
| 337 | .num_resources = ARRAY_SIZE(da850_mcasp_resources), | ||
| 338 | .resource = da850_mcasp_resources, | ||
| 339 | }; | ||
| 340 | |||
| 341 | int __init da8xx_register_emac(void) | ||
| 342 | { | ||
| 343 | return platform_device_register(&da8xx_emac_device); | ||
| 344 | } | ||
| 345 | |||
| 346 | void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata) | ||
| 347 | { | ||
| 348 | /* DA830/OMAP-L137 has 3 instances of McASP */ | ||
| 349 | if (cpu_is_davinci_da830() && id == 1) { | ||
| 350 | da830_mcasp1_device.dev.platform_data = pdata; | ||
| 351 | platform_device_register(&da830_mcasp1_device); | ||
| 352 | } else if (cpu_is_davinci_da850()) { | ||
| 353 | da850_mcasp_device.dev.platform_data = pdata; | ||
| 354 | platform_device_register(&da850_mcasp_device); | ||
| 355 | } | ||
| 356 | } | ||
| 357 | |||
| 358 | static const struct display_panel disp_panel = { | ||
| 359 | QVGA, | ||
| 360 | 16, | ||
| 361 | 16, | ||
| 362 | COLOR_ACTIVE, | ||
| 363 | }; | ||
| 364 | |||
| 365 | static struct lcd_ctrl_config lcd_cfg = { | ||
| 366 | &disp_panel, | ||
| 367 | .ac_bias = 255, | ||
| 368 | .ac_bias_intrpt = 0, | ||
| 369 | .dma_burst_sz = 16, | ||
| 370 | .bpp = 16, | ||
| 371 | .fdd = 255, | ||
| 372 | .tft_alt_mode = 0, | ||
| 373 | .stn_565_mode = 0, | ||
| 374 | .mono_8bit_mode = 0, | ||
| 375 | .invert_line_clock = 1, | ||
| 376 | .invert_frm_clock = 1, | ||
| 377 | .sync_edge = 0, | ||
| 378 | .sync_ctrl = 1, | ||
| 379 | .raster_order = 0, | ||
| 380 | }; | ||
| 381 | |||
| 382 | static struct da8xx_lcdc_platform_data da850_evm_lcdc_pdata = { | ||
| 383 | .manu_name = "sharp", | ||
| 384 | .controller_data = &lcd_cfg, | ||
| 385 | .type = "Sharp_LK043T1DG01", | ||
| 386 | }; | ||
| 387 | |||
| 388 | static struct resource da8xx_lcdc_resources[] = { | ||
| 389 | [0] = { /* registers */ | ||
| 390 | .start = DA8XX_LCD_CNTRL_BASE, | ||
| 391 | .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1, | ||
| 392 | .flags = IORESOURCE_MEM, | ||
| 393 | }, | ||
| 394 | [1] = { /* interrupt */ | ||
| 395 | .start = IRQ_DA8XX_LCDINT, | ||
| 396 | .end = IRQ_DA8XX_LCDINT, | ||
| 397 | .flags = IORESOURCE_IRQ, | ||
| 398 | }, | ||
| 399 | }; | ||
| 400 | |||
| 401 | static struct platform_device da850_lcdc_device = { | ||
| 402 | .name = "da8xx_lcdc", | ||
| 403 | .id = 0, | ||
| 404 | .num_resources = ARRAY_SIZE(da8xx_lcdc_resources), | ||
| 405 | .resource = da8xx_lcdc_resources, | ||
| 406 | .dev = { | ||
| 407 | .platform_data = &da850_evm_lcdc_pdata, | ||
| 408 | } | ||
| 409 | }; | ||
| 410 | |||
| 411 | int __init da8xx_register_lcdc(void) | ||
| 412 | { | ||
| 413 | return platform_device_register(&da850_lcdc_device); | ||
| 414 | } | ||
| 415 | |||
| 416 | static struct resource da8xx_mmcsd0_resources[] = { | ||
| 417 | { /* registers */ | ||
| 418 | .start = DA8XX_MMCSD0_BASE, | ||
| 419 | .end = DA8XX_MMCSD0_BASE + SZ_4K - 1, | ||
| 420 | .flags = IORESOURCE_MEM, | ||
| 421 | }, | ||
| 422 | { /* interrupt */ | ||
| 423 | .start = IRQ_DA8XX_MMCSDINT0, | ||
| 424 | .end = IRQ_DA8XX_MMCSDINT0, | ||
| 425 | .flags = IORESOURCE_IRQ, | ||
| 426 | }, | ||
| 427 | { /* DMA RX */ | ||
| 428 | .start = EDMA_CTLR_CHAN(0, 16), | ||
| 429 | .end = EDMA_CTLR_CHAN(0, 16), | ||
| 430 | .flags = IORESOURCE_DMA, | ||
| 431 | }, | ||
| 432 | { /* DMA TX */ | ||
| 433 | .start = EDMA_CTLR_CHAN(0, 17), | ||
| 434 | .end = EDMA_CTLR_CHAN(0, 17), | ||
| 435 | .flags = IORESOURCE_DMA, | ||
| 436 | }, | ||
| 437 | }; | ||
| 438 | |||
| 439 | static struct platform_device da8xx_mmcsd0_device = { | ||
| 440 | .name = "davinci_mmc", | ||
| 441 | .id = 0, | ||
| 442 | .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources), | ||
| 443 | .resource = da8xx_mmcsd0_resources, | ||
| 444 | }; | ||
| 445 | |||
| 446 | int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config) | ||
| 447 | { | ||
| 448 | da8xx_mmcsd0_device.dev.platform_data = config; | ||
| 449 | return platform_device_register(&da8xx_mmcsd0_device); | ||
| 450 | } | ||
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index de16f347566a..a55b650db71e 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
| @@ -31,6 +31,8 @@ | |||
| 31 | #define DAVINCI_MMCSD0_BASE 0x01E10000 | 31 | #define DAVINCI_MMCSD0_BASE 0x01E10000 |
| 32 | #define DM355_MMCSD0_BASE 0x01E11000 | 32 | #define DM355_MMCSD0_BASE 0x01E11000 |
| 33 | #define DM355_MMCSD1_BASE 0x01E00000 | 33 | #define DM355_MMCSD1_BASE 0x01E00000 |
| 34 | #define DM365_MMCSD0_BASE 0x01D11000 | ||
| 35 | #define DM365_MMCSD1_BASE 0x01D00000 | ||
| 34 | 36 | ||
| 35 | static struct resource i2c_resources[] = { | 37 | static struct resource i2c_resources[] = { |
| 36 | { | 38 | { |
| @@ -82,10 +84,10 @@ static struct resource mmcsd0_resources[] = { | |||
| 82 | }, | 84 | }, |
| 83 | /* DMA channels: RX, then TX */ | 85 | /* DMA channels: RX, then TX */ |
| 84 | { | 86 | { |
| 85 | .start = DAVINCI_DMA_MMCRXEVT, | 87 | .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT), |
| 86 | .flags = IORESOURCE_DMA, | 88 | .flags = IORESOURCE_DMA, |
| 87 | }, { | 89 | }, { |
| 88 | .start = DAVINCI_DMA_MMCTXEVT, | 90 | .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT), |
| 89 | .flags = IORESOURCE_DMA, | 91 | .flags = IORESOURCE_DMA, |
| 90 | }, | 92 | }, |
| 91 | }; | 93 | }; |
| @@ -119,10 +121,10 @@ static struct resource mmcsd1_resources[] = { | |||
| 119 | }, | 121 | }, |
| 120 | /* DMA channels: RX, then TX */ | 122 | /* DMA channels: RX, then TX */ |
| 121 | { | 123 | { |
| 122 | .start = 30, /* rx */ | 124 | .start = EDMA_CTLR_CHAN(0, 30), /* rx */ |
| 123 | .flags = IORESOURCE_DMA, | 125 | .flags = IORESOURCE_DMA, |
| 124 | }, { | 126 | }, { |
| 125 | .start = 31, /* tx */ | 127 | .start = EDMA_CTLR_CHAN(0, 31), /* tx */ |
| 126 | .flags = IORESOURCE_DMA, | 128 | .flags = IORESOURCE_DMA, |
| 127 | }, | 129 | }, |
| 128 | }; | 130 | }; |
| @@ -154,19 +156,31 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) | |||
| 154 | */ | 156 | */ |
| 155 | switch (module) { | 157 | switch (module) { |
| 156 | case 1: | 158 | case 1: |
| 157 | if (!cpu_is_davinci_dm355()) | 159 | if (cpu_is_davinci_dm355()) { |
| 160 | /* REVISIT we may not need all these pins if e.g. this | ||
| 161 | * is a hard-wired SDIO device... | ||
| 162 | */ | ||
| 163 | davinci_cfg_reg(DM355_SD1_CMD); | ||
| 164 | davinci_cfg_reg(DM355_SD1_CLK); | ||
| 165 | davinci_cfg_reg(DM355_SD1_DATA0); | ||
| 166 | davinci_cfg_reg(DM355_SD1_DATA1); | ||
| 167 | davinci_cfg_reg(DM355_SD1_DATA2); | ||
| 168 | davinci_cfg_reg(DM355_SD1_DATA3); | ||
| 169 | } else if (cpu_is_davinci_dm365()) { | ||
| 170 | void __iomem *pupdctl1 = | ||
| 171 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c); | ||
| 172 | |||
| 173 | /* Configure pull down control */ | ||
| 174 | __raw_writel((__raw_readl(pupdctl1) & ~0x400), | ||
| 175 | pupdctl1); | ||
| 176 | |||
| 177 | mmcsd1_resources[0].start = DM365_MMCSD1_BASE; | ||
| 178 | mmcsd1_resources[0].end = DM365_MMCSD1_BASE + | ||
| 179 | SZ_4K - 1; | ||
| 180 | mmcsd0_resources[2].start = IRQ_DM365_SDIOINT1; | ||
| 181 | } else | ||
| 158 | break; | 182 | break; |
| 159 | 183 | ||
| 160 | /* REVISIT we may not need all these pins if e.g. this | ||
| 161 | * is a hard-wired SDIO device... | ||
| 162 | */ | ||
| 163 | davinci_cfg_reg(DM355_SD1_CMD); | ||
| 164 | davinci_cfg_reg(DM355_SD1_CLK); | ||
| 165 | davinci_cfg_reg(DM355_SD1_DATA0); | ||
| 166 | davinci_cfg_reg(DM355_SD1_DATA1); | ||
| 167 | davinci_cfg_reg(DM355_SD1_DATA2); | ||
| 168 | davinci_cfg_reg(DM355_SD1_DATA3); | ||
| 169 | |||
| 170 | pdev = &davinci_mmcsd1_device; | 184 | pdev = &davinci_mmcsd1_device; |
| 171 | break; | 185 | break; |
| 172 | case 0: | 186 | case 0: |
| @@ -180,9 +194,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) | |||
| 180 | 194 | ||
| 181 | /* enable RX EDMA */ | 195 | /* enable RX EDMA */ |
| 182 | davinci_cfg_reg(DM355_EVT26_MMC0_RX); | 196 | davinci_cfg_reg(DM355_EVT26_MMC0_RX); |
| 183 | } | 197 | } else if (cpu_is_davinci_dm365()) { |
| 184 | 198 | mmcsd0_resources[0].start = DM365_MMCSD0_BASE; | |
| 185 | else if (cpu_is_davinci_dm644x()) { | 199 | mmcsd0_resources[0].end = DM365_MMCSD0_BASE + |
| 200 | SZ_4K - 1; | ||
| 201 | mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; | ||
| 202 | } else if (cpu_is_davinci_dm644x()) { | ||
| 186 | /* REVISIT: should this be in board-init code? */ | 203 | /* REVISIT: should this be in board-init code? */ |
| 187 | void __iomem *base = | 204 | void __iomem *base = |
| 188 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | 205 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); |
| @@ -216,6 +233,8 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) | |||
| 216 | 233 | ||
| 217 | static struct resource wdt_resources[] = { | 234 | static struct resource wdt_resources[] = { |
| 218 | { | 235 | { |
| 236 | .start = DAVINCI_WDOG_BASE, | ||
| 237 | .end = DAVINCI_WDOG_BASE + SZ_1K - 1, | ||
| 219 | .flags = IORESOURCE_MEM, | 238 | .flags = IORESOURCE_MEM, |
| 220 | }, | 239 | }, |
| 221 | }; | 240 | }; |
| @@ -229,11 +248,6 @@ struct platform_device davinci_wdt_device = { | |||
| 229 | 248 | ||
| 230 | static void davinci_init_wdt(void) | 249 | static void davinci_init_wdt(void) |
| 231 | { | 250 | { |
| 232 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
| 233 | |||
| 234 | wdt_resources[0].start = (resource_size_t)soc_info->wdt_base; | ||
| 235 | wdt_resources[0].end = (resource_size_t)soc_info->wdt_base + SZ_1K - 1; | ||
| 236 | |||
| 237 | platform_device_register(&davinci_wdt_device); | 251 | platform_device_register(&davinci_wdt_device); |
| 238 | } | 252 | } |
| 239 | 253 | ||
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index baaaf328de2e..059670018aff 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <mach/time.h> | 30 | #include <mach/time.h> |
| 31 | #include <mach/serial.h> | 31 | #include <mach/serial.h> |
| 32 | #include <mach/common.h> | 32 | #include <mach/common.h> |
| 33 | #include <mach/asp.h> | ||
| 33 | 34 | ||
| 34 | #include "clock.h" | 35 | #include "clock.h" |
| 35 | #include "mux.h" | 36 | #include "mux.h" |
| @@ -360,8 +361,8 @@ static struct davinci_clk dm355_clks[] = { | |||
| 360 | CLK(NULL, "uart1", &uart1_clk), | 361 | CLK(NULL, "uart1", &uart1_clk), |
| 361 | CLK(NULL, "uart2", &uart2_clk), | 362 | CLK(NULL, "uart2", &uart2_clk), |
| 362 | CLK("i2c_davinci.1", NULL, &i2c_clk), | 363 | CLK("i2c_davinci.1", NULL, &i2c_clk), |
| 363 | CLK("soc-audio.0", NULL, &asp0_clk), | 364 | CLK("davinci-asp.0", NULL, &asp0_clk), |
| 364 | CLK("soc-audio.1", NULL, &asp1_clk), | 365 | CLK("davinci-asp.1", NULL, &asp1_clk), |
| 365 | CLK("davinci_mmc.0", NULL, &mmcsd0_clk), | 366 | CLK("davinci_mmc.0", NULL, &mmcsd0_clk), |
| 366 | CLK("davinci_mmc.1", NULL, &mmcsd1_clk), | 367 | CLK("davinci_mmc.1", NULL, &mmcsd1_clk), |
| 367 | CLK(NULL, "spi0", &spi0_clk), | 368 | CLK(NULL, "spi0", &spi0_clk), |
| @@ -481,6 +482,20 @@ INT_CFG(DM355, INT_EDMA_TC1_ERR, 4, 1, 1, false) | |||
| 481 | EVT_CFG(DM355, EVT8_ASP1_TX, 0, 1, 0, false) | 482 | EVT_CFG(DM355, EVT8_ASP1_TX, 0, 1, 0, false) |
| 482 | EVT_CFG(DM355, EVT9_ASP1_RX, 1, 1, 0, false) | 483 | EVT_CFG(DM355, EVT9_ASP1_RX, 1, 1, 0, false) |
| 483 | EVT_CFG(DM355, EVT26_MMC0_RX, 2, 1, 0, false) | 484 | EVT_CFG(DM355, EVT26_MMC0_RX, 2, 1, 0, false) |
| 485 | |||
| 486 | MUX_CFG(DM355, VOUT_FIELD, 1, 18, 3, 1, false) | ||
| 487 | MUX_CFG(DM355, VOUT_FIELD_G70, 1, 18, 3, 0, false) | ||
| 488 | MUX_CFG(DM355, VOUT_HVSYNC, 1, 16, 1, 0, false) | ||
| 489 | MUX_CFG(DM355, VOUT_COUTL_EN, 1, 0, 0xff, 0x55, false) | ||
| 490 | MUX_CFG(DM355, VOUT_COUTH_EN, 1, 8, 0xff, 0x55, false) | ||
| 491 | |||
| 492 | MUX_CFG(DM355, VIN_PCLK, 0, 14, 1, 1, false) | ||
| 493 | MUX_CFG(DM355, VIN_CAM_WEN, 0, 13, 1, 1, false) | ||
| 494 | MUX_CFG(DM355, VIN_CAM_VD, 0, 12, 1, 1, false) | ||
| 495 | MUX_CFG(DM355, VIN_CAM_HD, 0, 11, 1, 1, false) | ||
| 496 | MUX_CFG(DM355, VIN_YIN_EN, 0, 10, 1, 1, false) | ||
| 497 | MUX_CFG(DM355, VIN_CINL_EN, 0, 0, 0xff, 0x55, false) | ||
| 498 | MUX_CFG(DM355, VIN_CINH_EN, 0, 8, 3, 3, false) | ||
| 484 | #endif | 499 | #endif |
| 485 | }; | 500 | }; |
| 486 | 501 | ||
| @@ -558,17 +573,38 @@ static const s8 dma_chan_dm355_no_event[] = { | |||
| 558 | -1 | 573 | -1 |
| 559 | }; | 574 | }; |
| 560 | 575 | ||
| 561 | static struct edma_soc_info dm355_edma_info = { | 576 | static const s8 |
| 562 | .n_channel = 64, | 577 | queue_tc_mapping[][2] = { |
| 563 | .n_region = 4, | 578 | /* {event queue no, TC no} */ |
| 564 | .n_slot = 128, | 579 | {0, 0}, |
| 565 | .n_tc = 2, | 580 | {1, 1}, |
| 566 | .noevent = dma_chan_dm355_no_event, | 581 | {-1, -1}, |
| 582 | }; | ||
| 583 | |||
| 584 | static const s8 | ||
| 585 | queue_priority_mapping[][2] = { | ||
| 586 | /* {event queue no, Priority} */ | ||
| 587 | {0, 3}, | ||
| 588 | {1, 7}, | ||
| 589 | {-1, -1}, | ||
| 590 | }; | ||
| 591 | |||
| 592 | static struct edma_soc_info dm355_edma_info[] = { | ||
| 593 | { | ||
| 594 | .n_channel = 64, | ||
| 595 | .n_region = 4, | ||
| 596 | .n_slot = 128, | ||
| 597 | .n_tc = 2, | ||
| 598 | .n_cc = 1, | ||
| 599 | .noevent = dma_chan_dm355_no_event, | ||
| 600 | .queue_tc_mapping = queue_tc_mapping, | ||
| 601 | .queue_priority_mapping = queue_priority_mapping, | ||
| 602 | }, | ||
| 567 | }; | 603 | }; |
| 568 | 604 | ||
| 569 | static struct resource edma_resources[] = { | 605 | static struct resource edma_resources[] = { |
| 570 | { | 606 | { |
| 571 | .name = "edma_cc", | 607 | .name = "edma_cc0", |
| 572 | .start = 0x01c00000, | 608 | .start = 0x01c00000, |
| 573 | .end = 0x01c00000 + SZ_64K - 1, | 609 | .end = 0x01c00000 + SZ_64K - 1, |
| 574 | .flags = IORESOURCE_MEM, | 610 | .flags = IORESOURCE_MEM, |
| @@ -586,10 +622,12 @@ static struct resource edma_resources[] = { | |||
| 586 | .flags = IORESOURCE_MEM, | 622 | .flags = IORESOURCE_MEM, |
| 587 | }, | 623 | }, |
| 588 | { | 624 | { |
| 625 | .name = "edma0", | ||
| 589 | .start = IRQ_CCINT0, | 626 | .start = IRQ_CCINT0, |
| 590 | .flags = IORESOURCE_IRQ, | 627 | .flags = IORESOURCE_IRQ, |
| 591 | }, | 628 | }, |
| 592 | { | 629 | { |
| 630 | .name = "edma0_err", | ||
| 593 | .start = IRQ_CCERRINT, | 631 | .start = IRQ_CCERRINT, |
| 594 | .flags = IORESOURCE_IRQ, | 632 | .flags = IORESOURCE_IRQ, |
| 595 | }, | 633 | }, |
| @@ -598,12 +636,98 @@ static struct resource edma_resources[] = { | |||
| 598 | 636 | ||
| 599 | static struct platform_device dm355_edma_device = { | 637 | static struct platform_device dm355_edma_device = { |
| 600 | .name = "edma", | 638 | .name = "edma", |
| 601 | .id = -1, | 639 | .id = 0, |
| 602 | .dev.platform_data = &dm355_edma_info, | 640 | .dev.platform_data = dm355_edma_info, |
| 603 | .num_resources = ARRAY_SIZE(edma_resources), | 641 | .num_resources = ARRAY_SIZE(edma_resources), |
| 604 | .resource = edma_resources, | 642 | .resource = edma_resources, |
| 605 | }; | 643 | }; |
| 606 | 644 | ||
| 645 | static struct resource dm355_asp1_resources[] = { | ||
| 646 | { | ||
| 647 | .start = DAVINCI_ASP1_BASE, | ||
| 648 | .end = DAVINCI_ASP1_BASE + SZ_8K - 1, | ||
| 649 | .flags = IORESOURCE_MEM, | ||
| 650 | }, | ||
| 651 | { | ||
| 652 | .start = DAVINCI_DMA_ASP1_TX, | ||
| 653 | .end = DAVINCI_DMA_ASP1_TX, | ||
| 654 | .flags = IORESOURCE_DMA, | ||
| 655 | }, | ||
| 656 | { | ||
| 657 | .start = DAVINCI_DMA_ASP1_RX, | ||
| 658 | .end = DAVINCI_DMA_ASP1_RX, | ||
| 659 | .flags = IORESOURCE_DMA, | ||
| 660 | }, | ||
| 661 | }; | ||
| 662 | |||
| 663 | static struct platform_device dm355_asp1_device = { | ||
| 664 | .name = "davinci-asp", | ||
| 665 | .id = 1, | ||
| 666 | .num_resources = ARRAY_SIZE(dm355_asp1_resources), | ||
| 667 | .resource = dm355_asp1_resources, | ||
| 668 | }; | ||
| 669 | |||
| 670 | static struct resource dm355_vpss_resources[] = { | ||
| 671 | { | ||
| 672 | /* VPSS BL Base address */ | ||
| 673 | .name = "vpss", | ||
| 674 | .start = 0x01c70800, | ||
| 675 | .end = 0x01c70800 + 0xff, | ||
| 676 | .flags = IORESOURCE_MEM, | ||
| 677 | }, | ||
| 678 | { | ||
| 679 | /* VPSS CLK Base address */ | ||
| 680 | .name = "vpss", | ||
| 681 | .start = 0x01c70000, | ||
| 682 | .end = 0x01c70000 + 0xf, | ||
| 683 | .flags = IORESOURCE_MEM, | ||
| 684 | }, | ||
| 685 | }; | ||
| 686 | |||
| 687 | static struct platform_device dm355_vpss_device = { | ||
| 688 | .name = "vpss", | ||
| 689 | .id = -1, | ||
| 690 | .dev.platform_data = "dm355_vpss", | ||
| 691 | .num_resources = ARRAY_SIZE(dm355_vpss_resources), | ||
| 692 | .resource = dm355_vpss_resources, | ||
| 693 | }; | ||
| 694 | |||
| 695 | static struct resource vpfe_resources[] = { | ||
| 696 | { | ||
| 697 | .start = IRQ_VDINT0, | ||
| 698 | .end = IRQ_VDINT0, | ||
| 699 | .flags = IORESOURCE_IRQ, | ||
| 700 | }, | ||
| 701 | { | ||
| 702 | .start = IRQ_VDINT1, | ||
| 703 | .end = IRQ_VDINT1, | ||
| 704 | .flags = IORESOURCE_IRQ, | ||
| 705 | }, | ||
| 706 | /* CCDC Base address */ | ||
| 707 | { | ||
| 708 | .flags = IORESOURCE_MEM, | ||
| 709 | .start = 0x01c70600, | ||
| 710 | .end = 0x01c70600 + 0x1ff, | ||
| 711 | }, | ||
| 712 | }; | ||
| 713 | |||
| 714 | static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | ||
| 715 | static struct platform_device vpfe_capture_dev = { | ||
| 716 | .name = CAPTURE_DRV_NAME, | ||
| 717 | .id = -1, | ||
| 718 | .num_resources = ARRAY_SIZE(vpfe_resources), | ||
| 719 | .resource = vpfe_resources, | ||
| 720 | .dev = { | ||
| 721 | .dma_mask = &vpfe_capture_dma_mask, | ||
| 722 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 723 | }, | ||
| 724 | }; | ||
| 725 | |||
| 726 | void dm355_set_vpfe_config(struct vpfe_config *cfg) | ||
| 727 | { | ||
| 728 | vpfe_capture_dev.dev.platform_data = cfg; | ||
| 729 | } | ||
| 730 | |||
| 607 | /*----------------------------------------------------------------------*/ | 731 | /*----------------------------------------------------------------------*/ |
| 608 | 732 | ||
| 609 | static struct map_desc dm355_io_desc[] = { | 733 | static struct map_desc dm355_io_desc[] = { |
| @@ -704,7 +828,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { | |||
| 704 | .intc_irq_prios = dm355_default_priorities, | 828 | .intc_irq_prios = dm355_default_priorities, |
| 705 | .intc_irq_num = DAVINCI_N_AINTC_IRQ, | 829 | .intc_irq_num = DAVINCI_N_AINTC_IRQ, |
| 706 | .timer_info = &dm355_timer_info, | 830 | .timer_info = &dm355_timer_info, |
| 707 | .wdt_base = IO_ADDRESS(DAVINCI_WDOG_BASE), | ||
| 708 | .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), | 831 | .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), |
| 709 | .gpio_num = 104, | 832 | .gpio_num = 104, |
| 710 | .gpio_irq = IRQ_DM355_GPIOBNK0, | 833 | .gpio_irq = IRQ_DM355_GPIOBNK0, |
| @@ -713,6 +836,19 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { | |||
| 713 | .sram_len = SZ_32K, | 836 | .sram_len = SZ_32K, |
| 714 | }; | 837 | }; |
| 715 | 838 | ||
| 839 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) | ||
| 840 | { | ||
| 841 | /* we don't use ASP1 IRQs, or we'd need to mux them ... */ | ||
| 842 | if (evt_enable & ASP1_TX_EVT_EN) | ||
| 843 | davinci_cfg_reg(DM355_EVT8_ASP1_TX); | ||
| 844 | |||
| 845 | if (evt_enable & ASP1_RX_EVT_EN) | ||
| 846 | davinci_cfg_reg(DM355_EVT9_ASP1_RX); | ||
| 847 | |||
| 848 | dm355_asp1_device.dev.platform_data = pdata; | ||
| 849 | platform_device_register(&dm355_asp1_device); | ||
| 850 | } | ||
| 851 | |||
| 716 | void __init dm355_init(void) | 852 | void __init dm355_init(void) |
| 717 | { | 853 | { |
| 718 | davinci_common_init(&davinci_soc_info_dm355); | 854 | davinci_common_init(&davinci_soc_info_dm355); |
| @@ -725,6 +861,20 @@ static int __init dm355_init_devices(void) | |||
| 725 | 861 | ||
| 726 | davinci_cfg_reg(DM355_INT_EDMA_CC); | 862 | davinci_cfg_reg(DM355_INT_EDMA_CC); |
| 727 | platform_device_register(&dm355_edma_device); | 863 | platform_device_register(&dm355_edma_device); |
| 864 | platform_device_register(&dm355_vpss_device); | ||
| 865 | /* | ||
| 866 | * setup Mux configuration for vpfe input and register | ||
| 867 | * vpfe capture platform device | ||
| 868 | */ | ||
| 869 | davinci_cfg_reg(DM355_VIN_PCLK); | ||
| 870 | davinci_cfg_reg(DM355_VIN_CAM_WEN); | ||
| 871 | davinci_cfg_reg(DM355_VIN_CAM_VD); | ||
| 872 | davinci_cfg_reg(DM355_VIN_CAM_HD); | ||
| 873 | davinci_cfg_reg(DM355_VIN_YIN_EN); | ||
| 874 | davinci_cfg_reg(DM355_VIN_CINL_EN); | ||
| 875 | davinci_cfg_reg(DM355_VIN_CINH_EN); | ||
| 876 | platform_device_register(&vpfe_capture_dev); | ||
| 877 | |||
| 728 | return 0; | 878 | return 0; |
| 729 | } | 879 | } |
| 730 | postcore_initcall(dm355_init_devices); | 880 | postcore_initcall(dm355_init_devices); |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c new file mode 100644 index 000000000000..e81517434703 --- /dev/null +++ b/arch/arm/mach-davinci/dm365.c | |||
| @@ -0,0 +1,926 @@ | |||
| 1 | /* | ||
| 2 | * TI DaVinci DM365 chip specific setup | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Texas Instruments | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License as | ||
| 8 | * published by the Free Software Foundation version 2. | ||
| 9 | * | ||
| 10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
| 11 | * kind, whether express or implied; without even the implied warranty | ||
| 12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | */ | ||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/clk.h> | ||
| 18 | #include <linux/serial_8250.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | #include <linux/dma-mapping.h> | ||
| 21 | #include <linux/gpio.h> | ||
| 22 | |||
| 23 | #include <asm/mach/map.h> | ||
| 24 | |||
| 25 | #include <mach/dm365.h> | ||
| 26 | #include <mach/clock.h> | ||
| 27 | #include <mach/cputype.h> | ||
| 28 | #include <mach/edma.h> | ||
| 29 | #include <mach/psc.h> | ||
| 30 | #include <mach/mux.h> | ||
| 31 | #include <mach/irqs.h> | ||
| 32 | #include <mach/time.h> | ||
| 33 | #include <mach/serial.h> | ||
| 34 | #include <mach/common.h> | ||
| 35 | |||
| 36 | #include "clock.h" | ||
| 37 | #include "mux.h" | ||
| 38 | |||
| 39 | #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ | ||
| 40 | |||
| 41 | static struct pll_data pll1_data = { | ||
| 42 | .num = 1, | ||
| 43 | .phys_base = DAVINCI_PLL1_BASE, | ||
| 44 | .flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static struct pll_data pll2_data = { | ||
| 48 | .num = 2, | ||
| 49 | .phys_base = DAVINCI_PLL2_BASE, | ||
| 50 | .flags = PLL_HAS_POSTDIV | PLL_HAS_PREDIV, | ||
| 51 | }; | ||
| 52 | |||
| 53 | static struct clk ref_clk = { | ||
| 54 | .name = "ref_clk", | ||
| 55 | .rate = DM365_REF_FREQ, | ||
| 56 | }; | ||
| 57 | |||
| 58 | static struct clk pll1_clk = { | ||
| 59 | .name = "pll1", | ||
| 60 | .parent = &ref_clk, | ||
| 61 | .flags = CLK_PLL, | ||
| 62 | .pll_data = &pll1_data, | ||
| 63 | }; | ||
| 64 | |||
| 65 | static struct clk pll1_aux_clk = { | ||
| 66 | .name = "pll1_aux_clk", | ||
| 67 | .parent = &pll1_clk, | ||
| 68 | .flags = CLK_PLL | PRE_PLL, | ||
| 69 | }; | ||
| 70 | |||
| 71 | static struct clk pll1_sysclkbp = { | ||
| 72 | .name = "pll1_sysclkbp", | ||
| 73 | .parent = &pll1_clk, | ||
| 74 | .flags = CLK_PLL | PRE_PLL, | ||
| 75 | .div_reg = BPDIV | ||
| 76 | }; | ||
| 77 | |||
| 78 | static struct clk clkout0_clk = { | ||
| 79 | .name = "clkout0", | ||
| 80 | .parent = &pll1_clk, | ||
| 81 | .flags = CLK_PLL | PRE_PLL, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct clk pll1_sysclk1 = { | ||
| 85 | .name = "pll1_sysclk1", | ||
| 86 | .parent = &pll1_clk, | ||
| 87 | .flags = CLK_PLL, | ||
| 88 | .div_reg = PLLDIV1, | ||
| 89 | }; | ||
| 90 | |||
| 91 | static struct clk pll1_sysclk2 = { | ||
| 92 | .name = "pll1_sysclk2", | ||
| 93 | .parent = &pll1_clk, | ||
| 94 | .flags = CLK_PLL, | ||
| 95 | .div_reg = PLLDIV2, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct clk pll1_sysclk3 = { | ||
| 99 | .name = "pll1_sysclk3", | ||
| 100 | .parent = &pll1_clk, | ||
| 101 | .flags = CLK_PLL, | ||
| 102 | .div_reg = PLLDIV3, | ||
| 103 | }; | ||
| 104 | |||
| 105 | static struct clk pll1_sysclk4 = { | ||
| 106 | .name = "pll1_sysclk4", | ||
| 107 | .parent = &pll1_clk, | ||
| 108 | .flags = CLK_PLL, | ||
| 109 | .div_reg = PLLDIV4, | ||
| 110 | }; | ||
| 111 | |||
| 112 | static struct clk pll1_sysclk5 = { | ||
| 113 | .name = "pll1_sysclk5", | ||
| 114 | .parent = &pll1_clk, | ||
| 115 | .flags = CLK_PLL, | ||
| 116 | .div_reg = PLLDIV5, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static struct clk pll1_sysclk6 = { | ||
| 120 | .name = "pll1_sysclk6", | ||
| 121 | .parent = &pll1_clk, | ||
| 122 | .flags = CLK_PLL, | ||
| 123 | .div_reg = PLLDIV6, | ||
| 124 | }; | ||
| 125 | |||
| 126 | static struct clk pll1_sysclk7 = { | ||
| 127 | .name = "pll1_sysclk7", | ||
| 128 | .parent = &pll1_clk, | ||
| 129 | .flags = CLK_PLL, | ||
| 130 | .div_reg = PLLDIV7, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct clk pll1_sysclk8 = { | ||
| 134 | .name = "pll1_sysclk8", | ||
| 135 | .parent = &pll1_clk, | ||
| 136 | .flags = CLK_PLL, | ||
| 137 | .div_reg = PLLDIV8, | ||
| 138 | }; | ||
| 139 | |||
| 140 | static struct clk pll1_sysclk9 = { | ||
| 141 | .name = "pll1_sysclk9", | ||
| 142 | .parent = &pll1_clk, | ||
| 143 | .flags = CLK_PLL, | ||
| 144 | .div_reg = PLLDIV9, | ||
| 145 | }; | ||
| 146 | |||
| 147 | static struct clk pll2_clk = { | ||
| 148 | .name = "pll2", | ||
| 149 | .parent = &ref_clk, | ||
| 150 | .flags = CLK_PLL, | ||
| 151 | .pll_data = &pll2_data, | ||
| 152 | }; | ||
| 153 | |||
| 154 | static struct clk pll2_aux_clk = { | ||
| 155 | .name = "pll2_aux_clk", | ||
| 156 | .parent = &pll2_clk, | ||
| 157 | .flags = CLK_PLL | PRE_PLL, | ||
| 158 | }; | ||
| 159 | |||
| 160 | static struct clk clkout1_clk = { | ||
| 161 | .name = "clkout1", | ||
| 162 | .parent = &pll2_clk, | ||
| 163 | .flags = CLK_PLL | PRE_PLL, | ||
| 164 | }; | ||
| 165 | |||
| 166 | static struct clk pll2_sysclk1 = { | ||
| 167 | .name = "pll2_sysclk1", | ||
| 168 | .parent = &pll2_clk, | ||
| 169 | .flags = CLK_PLL, | ||
| 170 | .div_reg = PLLDIV1, | ||
| 171 | }; | ||
| 172 | |||
| 173 | static struct clk pll2_sysclk2 = { | ||
| 174 | .name = "pll2_sysclk2", | ||
| 175 | .parent = &pll2_clk, | ||
| 176 | .flags = CLK_PLL, | ||
| 177 | .div_reg = PLLDIV2, | ||
| 178 | }; | ||
| 179 | |||
| 180 | static struct clk pll2_sysclk3 = { | ||
| 181 | .name = "pll2_sysclk3", | ||
| 182 | .parent = &pll2_clk, | ||
| 183 | .flags = CLK_PLL, | ||
| 184 | .div_reg = PLLDIV3, | ||
| 185 | }; | ||
| 186 | |||
| 187 | static struct clk pll2_sysclk4 = { | ||
| 188 | .name = "pll2_sysclk4", | ||
| 189 | .parent = &pll2_clk, | ||
| 190 | .flags = CLK_PLL, | ||
| 191 | .div_reg = PLLDIV4, | ||
| 192 | }; | ||
| 193 | |||
| 194 | static struct clk pll2_sysclk5 = { | ||
| 195 | .name = "pll2_sysclk5", | ||
| 196 | .parent = &pll2_clk, | ||
| 197 | .flags = CLK_PLL, | ||
| 198 | .div_reg = PLLDIV5, | ||
| 199 | }; | ||
| 200 | |||
| 201 | static struct clk pll2_sysclk6 = { | ||
| 202 | .name = "pll2_sysclk6", | ||
| 203 | .parent = &pll2_clk, | ||
| 204 | .flags = CLK_PLL, | ||
| 205 | .div_reg = PLLDIV6, | ||
| 206 | }; | ||
| 207 | |||
| 208 | static struct clk pll2_sysclk7 = { | ||
| 209 | .name = "pll2_sysclk7", | ||
| 210 | .parent = &pll2_clk, | ||
| 211 | .flags = CLK_PLL, | ||
| 212 | .div_reg = PLLDIV7, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct clk pll2_sysclk8 = { | ||
| 216 | .name = "pll2_sysclk8", | ||
| 217 | .parent = &pll2_clk, | ||
| 218 | .flags = CLK_PLL, | ||
| 219 | .div_reg = PLLDIV8, | ||
| 220 | }; | ||
| 221 | |||
| 222 | static struct clk pll2_sysclk9 = { | ||
| 223 | .name = "pll2_sysclk9", | ||
| 224 | .parent = &pll2_clk, | ||
| 225 | .flags = CLK_PLL, | ||
| 226 | .div_reg = PLLDIV9, | ||
| 227 | }; | ||
| 228 | |||
| 229 | static struct clk vpss_dac_clk = { | ||
| 230 | .name = "vpss_dac", | ||
| 231 | .parent = &pll1_sysclk3, | ||
| 232 | .lpsc = DM365_LPSC_DAC_CLK, | ||
| 233 | }; | ||
| 234 | |||
| 235 | static struct clk vpss_master_clk = { | ||
| 236 | .name = "vpss_master", | ||
| 237 | .parent = &pll1_sysclk5, | ||
| 238 | .lpsc = DM365_LPSC_VPSSMSTR, | ||
| 239 | .flags = CLK_PSC, | ||
| 240 | }; | ||
| 241 | |||
| 242 | static struct clk arm_clk = { | ||
| 243 | .name = "arm_clk", | ||
| 244 | .parent = &pll2_sysclk2, | ||
| 245 | .lpsc = DAVINCI_LPSC_ARM, | ||
| 246 | .flags = ALWAYS_ENABLED, | ||
| 247 | }; | ||
| 248 | |||
| 249 | static struct clk uart0_clk = { | ||
| 250 | .name = "uart0", | ||
| 251 | .parent = &pll1_aux_clk, | ||
| 252 | .lpsc = DAVINCI_LPSC_UART0, | ||
| 253 | }; | ||
| 254 | |||
| 255 | static struct clk uart1_clk = { | ||
| 256 | .name = "uart1", | ||
| 257 | .parent = &pll1_sysclk4, | ||
| 258 | .lpsc = DAVINCI_LPSC_UART1, | ||
| 259 | }; | ||
| 260 | |||
| 261 | static struct clk i2c_clk = { | ||
| 262 | .name = "i2c", | ||
| 263 | .parent = &pll1_aux_clk, | ||
| 264 | .lpsc = DAVINCI_LPSC_I2C, | ||
| 265 | }; | ||
| 266 | |||
| 267 | static struct clk mmcsd0_clk = { | ||
| 268 | .name = "mmcsd0", | ||
| 269 | .parent = &pll1_sysclk8, | ||
| 270 | .lpsc = DAVINCI_LPSC_MMC_SD, | ||
| 271 | }; | ||
| 272 | |||
| 273 | static struct clk mmcsd1_clk = { | ||
| 274 | .name = "mmcsd1", | ||
| 275 | .parent = &pll1_sysclk4, | ||
| 276 | .lpsc = DM365_LPSC_MMC_SD1, | ||
| 277 | }; | ||
| 278 | |||
| 279 | static struct clk spi0_clk = { | ||
| 280 | .name = "spi0", | ||
| 281 | .parent = &pll1_sysclk4, | ||
| 282 | .lpsc = DAVINCI_LPSC_SPI, | ||
| 283 | }; | ||
| 284 | |||
| 285 | static struct clk spi1_clk = { | ||
| 286 | .name = "spi1", | ||
| 287 | .parent = &pll1_sysclk4, | ||
| 288 | .lpsc = DM365_LPSC_SPI1, | ||
| 289 | }; | ||
| 290 | |||
| 291 | static struct clk spi2_clk = { | ||
| 292 | .name = "spi2", | ||
| 293 | .parent = &pll1_sysclk4, | ||
| 294 | .lpsc = DM365_LPSC_SPI2, | ||
| 295 | }; | ||
| 296 | |||
| 297 | static struct clk spi3_clk = { | ||
| 298 | .name = "spi3", | ||
| 299 | .parent = &pll1_sysclk4, | ||
| 300 | .lpsc = DM365_LPSC_SPI3, | ||
| 301 | }; | ||
| 302 | |||
| 303 | static struct clk spi4_clk = { | ||
| 304 | .name = "spi4", | ||
| 305 | .parent = &pll1_aux_clk, | ||
| 306 | .lpsc = DM365_LPSC_SPI4, | ||
| 307 | }; | ||
| 308 | |||
| 309 | static struct clk gpio_clk = { | ||
| 310 | .name = "gpio", | ||
| 311 | .parent = &pll1_sysclk4, | ||
| 312 | .lpsc = DAVINCI_LPSC_GPIO, | ||
| 313 | }; | ||
| 314 | |||
| 315 | static struct clk aemif_clk = { | ||
| 316 | .name = "aemif", | ||
| 317 | .parent = &pll1_sysclk4, | ||
| 318 | .lpsc = DAVINCI_LPSC_AEMIF, | ||
| 319 | }; | ||
| 320 | |||
| 321 | static struct clk pwm0_clk = { | ||
| 322 | .name = "pwm0", | ||
| 323 | .parent = &pll1_aux_clk, | ||
| 324 | .lpsc = DAVINCI_LPSC_PWM0, | ||
| 325 | }; | ||
| 326 | |||
| 327 | static struct clk pwm1_clk = { | ||
| 328 | .name = "pwm1", | ||
| 329 | .parent = &pll1_aux_clk, | ||
| 330 | .lpsc = DAVINCI_LPSC_PWM1, | ||
| 331 | }; | ||
| 332 | |||
| 333 | static struct clk pwm2_clk = { | ||
| 334 | .name = "pwm2", | ||
| 335 | .parent = &pll1_aux_clk, | ||
| 336 | .lpsc = DAVINCI_LPSC_PWM2, | ||
| 337 | }; | ||
| 338 | |||
| 339 | static struct clk pwm3_clk = { | ||
| 340 | .name = "pwm3", | ||
| 341 | .parent = &ref_clk, | ||
| 342 | .lpsc = DM365_LPSC_PWM3, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static struct clk timer0_clk = { | ||
| 346 | .name = "timer0", | ||
| 347 | .parent = &pll1_aux_clk, | ||
| 348 | .lpsc = DAVINCI_LPSC_TIMER0, | ||
| 349 | }; | ||
| 350 | |||
| 351 | static struct clk timer1_clk = { | ||
| 352 | .name = "timer1", | ||
| 353 | .parent = &pll1_aux_clk, | ||
| 354 | .lpsc = DAVINCI_LPSC_TIMER1, | ||
| 355 | }; | ||
| 356 | |||
| 357 | static struct clk timer2_clk = { | ||
| 358 | .name = "timer2", | ||
| 359 | .parent = &pll1_aux_clk, | ||
| 360 | .lpsc = DAVINCI_LPSC_TIMER2, | ||
| 361 | .usecount = 1, | ||
| 362 | }; | ||
| 363 | |||
| 364 | static struct clk timer3_clk = { | ||
| 365 | .name = "timer3", | ||
| 366 | .parent = &pll1_aux_clk, | ||
| 367 | .lpsc = DM365_LPSC_TIMER3, | ||
| 368 | }; | ||
| 369 | |||
| 370 | static struct clk usb_clk = { | ||
| 371 | .name = "usb", | ||
| 372 | .parent = &pll2_sysclk1, | ||
| 373 | .lpsc = DAVINCI_LPSC_USB, | ||
| 374 | }; | ||
| 375 | |||
| 376 | static struct clk emac_clk = { | ||
| 377 | .name = "emac", | ||
| 378 | .parent = &pll1_sysclk4, | ||
| 379 | .lpsc = DM365_LPSC_EMAC, | ||
| 380 | }; | ||
| 381 | |||
| 382 | static struct clk voicecodec_clk = { | ||
| 383 | .name = "voice_codec", | ||
| 384 | .parent = &pll2_sysclk4, | ||
| 385 | .lpsc = DM365_LPSC_VOICE_CODEC, | ||
| 386 | }; | ||
| 387 | |||
| 388 | static struct clk asp0_clk = { | ||
| 389 | .name = "asp0", | ||
| 390 | .parent = &pll1_sysclk4, | ||
| 391 | .lpsc = DM365_LPSC_McBSP1, | ||
| 392 | }; | ||
| 393 | |||
| 394 | static struct clk rto_clk = { | ||
| 395 | .name = "rto", | ||
| 396 | .parent = &pll1_sysclk4, | ||
| 397 | .lpsc = DM365_LPSC_RTO, | ||
| 398 | }; | ||
| 399 | |||
| 400 | static struct clk mjcp_clk = { | ||
| 401 | .name = "mjcp", | ||
| 402 | .parent = &pll1_sysclk3, | ||
| 403 | .lpsc = DM365_LPSC_MJCP, | ||
| 404 | }; | ||
| 405 | |||
| 406 | static struct davinci_clk dm365_clks[] = { | ||
| 407 | CLK(NULL, "ref", &ref_clk), | ||
| 408 | CLK(NULL, "pll1", &pll1_clk), | ||
| 409 | CLK(NULL, "pll1_aux", &pll1_aux_clk), | ||
| 410 | CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp), | ||
| 411 | CLK(NULL, "clkout0", &clkout0_clk), | ||
| 412 | CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), | ||
| 413 | CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), | ||
| 414 | CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), | ||
| 415 | CLK(NULL, "pll1_sysclk4", &pll1_sysclk4), | ||
| 416 | CLK(NULL, "pll1_sysclk5", &pll1_sysclk5), | ||
| 417 | CLK(NULL, "pll1_sysclk6", &pll1_sysclk6), | ||
| 418 | CLK(NULL, "pll1_sysclk7", &pll1_sysclk7), | ||
| 419 | CLK(NULL, "pll1_sysclk8", &pll1_sysclk8), | ||
| 420 | CLK(NULL, "pll1_sysclk9", &pll1_sysclk9), | ||
| 421 | CLK(NULL, "pll2", &pll2_clk), | ||
| 422 | CLK(NULL, "pll2_aux", &pll2_aux_clk), | ||
| 423 | CLK(NULL, "clkout1", &clkout1_clk), | ||
| 424 | CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), | ||
| 425 | CLK(NULL, "pll2_sysclk2", &pll2_sysclk2), | ||
| 426 | CLK(NULL, "pll2_sysclk3", &pll2_sysclk3), | ||
| 427 | CLK(NULL, "pll2_sysclk4", &pll2_sysclk4), | ||
| 428 | CLK(NULL, "pll2_sysclk5", &pll2_sysclk5), | ||
| 429 | CLK(NULL, "pll2_sysclk6", &pll2_sysclk6), | ||
| 430 | CLK(NULL, "pll2_sysclk7", &pll2_sysclk7), | ||
| 431 | CLK(NULL, "pll2_sysclk8", &pll2_sysclk8), | ||
| 432 | CLK(NULL, "pll2_sysclk9", &pll2_sysclk9), | ||
| 433 | CLK(NULL, "vpss_dac", &vpss_dac_clk), | ||
| 434 | CLK(NULL, "vpss_master", &vpss_master_clk), | ||
| 435 | CLK(NULL, "arm", &arm_clk), | ||
| 436 | CLK(NULL, "uart0", &uart0_clk), | ||
| 437 | CLK(NULL, "uart1", &uart1_clk), | ||
| 438 | CLK("i2c_davinci.1", NULL, &i2c_clk), | ||
| 439 | CLK("davinci_mmc.0", NULL, &mmcsd0_clk), | ||
| 440 | CLK("davinci_mmc.1", NULL, &mmcsd1_clk), | ||
| 441 | CLK("spi_davinci.0", NULL, &spi0_clk), | ||
| 442 | CLK("spi_davinci.1", NULL, &spi1_clk), | ||
| 443 | CLK("spi_davinci.2", NULL, &spi2_clk), | ||
| 444 | CLK("spi_davinci.3", NULL, &spi3_clk), | ||
| 445 | CLK("spi_davinci.4", NULL, &spi4_clk), | ||
| 446 | CLK(NULL, "gpio", &gpio_clk), | ||
| 447 | CLK(NULL, "aemif", &aemif_clk), | ||
| 448 | CLK(NULL, "pwm0", &pwm0_clk), | ||
| 449 | CLK(NULL, "pwm1", &pwm1_clk), | ||
| 450 | CLK(NULL, "pwm2", &pwm2_clk), | ||
| 451 | CLK(NULL, "pwm3", &pwm3_clk), | ||
| 452 | CLK(NULL, "timer0", &timer0_clk), | ||
| 453 | CLK(NULL, "timer1", &timer1_clk), | ||
| 454 | CLK("watchdog", NULL, &timer2_clk), | ||
| 455 | CLK(NULL, "timer3", &timer3_clk), | ||
| 456 | CLK(NULL, "usb", &usb_clk), | ||
| 457 | CLK("davinci_emac.1", NULL, &emac_clk), | ||
| 458 | CLK("voice_codec", NULL, &voicecodec_clk), | ||
| 459 | CLK("soc-audio.0", NULL, &asp0_clk), | ||
| 460 | CLK(NULL, "rto", &rto_clk), | ||
| 461 | CLK(NULL, "mjcp", &mjcp_clk), | ||
| 462 | CLK(NULL, NULL, NULL), | ||
| 463 | }; | ||
| 464 | |||
| 465 | /*----------------------------------------------------------------------*/ | ||
| 466 | |||
| 467 | #define PINMUX0 0x00 | ||
| 468 | #define PINMUX1 0x04 | ||
| 469 | #define PINMUX2 0x08 | ||
| 470 | #define PINMUX3 0x0c | ||
| 471 | #define PINMUX4 0x10 | ||
| 472 | #define INTMUX 0x18 | ||
| 473 | #define EVTMUX 0x1c | ||
| 474 | |||
| 475 | |||
| 476 | static const struct mux_config dm365_pins[] = { | ||
| 477 | #ifdef CONFIG_DAVINCI_MUX | ||
| 478 | MUX_CFG(DM365, MMCSD0, 0, 24, 1, 0, false) | ||
| 479 | |||
| 480 | MUX_CFG(DM365, SD1_CLK, 0, 16, 3, 1, false) | ||
| 481 | MUX_CFG(DM365, SD1_CMD, 4, 30, 3, 1, false) | ||
| 482 | MUX_CFG(DM365, SD1_DATA3, 4, 28, 3, 1, false) | ||
| 483 | MUX_CFG(DM365, SD1_DATA2, 4, 26, 3, 1, false) | ||
| 484 | MUX_CFG(DM365, SD1_DATA1, 4, 24, 3, 1, false) | ||
| 485 | MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false) | ||
| 486 | |||
| 487 | MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false) | ||
| 488 | MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false) | ||
| 489 | |||
| 490 | MUX_CFG(DM365, AEMIF_AR, 2, 0, 3, 1, false) | ||
| 491 | MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false) | ||
| 492 | MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false) | ||
| 493 | MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false) | ||
| 494 | MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false) | ||
| 495 | |||
| 496 | MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false) | ||
| 497 | MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false) | ||
| 498 | MUX_CFG(DM365, MCBSP0_BFSX, 0, 21, 1, 1, false) | ||
| 499 | MUX_CFG(DM365, MCBSP0_BDR, 0, 20, 1, 1, false) | ||
| 500 | MUX_CFG(DM365, MCBSP0_R, 0, 19, 1, 1, false) | ||
| 501 | MUX_CFG(DM365, MCBSP0_BFSR, 0, 18, 1, 1, false) | ||
| 502 | |||
| 503 | MUX_CFG(DM365, SPI0_SCLK, 3, 28, 1, 1, false) | ||
| 504 | MUX_CFG(DM365, SPI0_SDI, 3, 26, 3, 1, false) | ||
| 505 | MUX_CFG(DM365, SPI0_SDO, 3, 25, 1, 1, false) | ||
| 506 | MUX_CFG(DM365, SPI0_SDENA0, 3, 29, 3, 1, false) | ||
| 507 | MUX_CFG(DM365, SPI0_SDENA1, 3, 26, 3, 2, false) | ||
| 508 | |||
| 509 | MUX_CFG(DM365, UART0_RXD, 3, 20, 1, 1, false) | ||
| 510 | MUX_CFG(DM365, UART0_TXD, 3, 19, 1, 1, false) | ||
| 511 | MUX_CFG(DM365, UART1_RXD, 3, 17, 3, 2, false) | ||
| 512 | MUX_CFG(DM365, UART1_TXD, 3, 15, 3, 2, false) | ||
| 513 | MUX_CFG(DM365, UART1_RTS, 3, 23, 3, 1, false) | ||
| 514 | MUX_CFG(DM365, UART1_CTS, 3, 21, 3, 1, false) | ||
| 515 | |||
| 516 | MUX_CFG(DM365, EMAC_TX_EN, 3, 17, 3, 1, false) | ||
| 517 | MUX_CFG(DM365, EMAC_TX_CLK, 3, 15, 3, 1, false) | ||
| 518 | MUX_CFG(DM365, EMAC_COL, 3, 14, 1, 1, false) | ||
| 519 | MUX_CFG(DM365, EMAC_TXD3, 3, 13, 1, 1, false) | ||
| 520 | MUX_CFG(DM365, EMAC_TXD2, 3, 12, 1, 1, false) | ||
| 521 | MUX_CFG(DM365, EMAC_TXD1, 3, 11, 1, 1, false) | ||
| 522 | MUX_CFG(DM365, EMAC_TXD0, 3, 10, 1, 1, false) | ||
| 523 | MUX_CFG(DM365, EMAC_RXD3, 3, 9, 1, 1, false) | ||
| 524 | MUX_CFG(DM365, EMAC_RXD2, 3, 8, 1, 1, false) | ||
| 525 | MUX_CFG(DM365, EMAC_RXD1, 3, 7, 1, 1, false) | ||
| 526 | MUX_CFG(DM365, EMAC_RXD0, 3, 6, 1, 1, false) | ||
| 527 | MUX_CFG(DM365, EMAC_RX_CLK, 3, 5, 1, 1, false) | ||
| 528 | MUX_CFG(DM365, EMAC_RX_DV, 3, 4, 1, 1, false) | ||
| 529 | MUX_CFG(DM365, EMAC_RX_ER, 3, 3, 1, 1, false) | ||
| 530 | MUX_CFG(DM365, EMAC_CRS, 3, 2, 1, 1, false) | ||
| 531 | MUX_CFG(DM365, EMAC_MDIO, 3, 1, 1, 1, false) | ||
| 532 | MUX_CFG(DM365, EMAC_MDCLK, 3, 0, 1, 1, false) | ||
| 533 | |||
| 534 | MUX_CFG(DM365, KEYPAD, 2, 0, 0x3f, 0x3f, false) | ||
| 535 | |||
| 536 | MUX_CFG(DM365, PWM0, 1, 0, 3, 2, false) | ||
| 537 | MUX_CFG(DM365, PWM0_G23, 3, 26, 3, 3, false) | ||
| 538 | MUX_CFG(DM365, PWM1, 1, 2, 3, 2, false) | ||
| 539 | MUX_CFG(DM365, PWM1_G25, 3, 29, 3, 2, false) | ||
| 540 | MUX_CFG(DM365, PWM2_G87, 1, 10, 3, 2, false) | ||
| 541 | MUX_CFG(DM365, PWM2_G88, 1, 8, 3, 2, false) | ||
| 542 | MUX_CFG(DM365, PWM2_G89, 1, 6, 3, 2, false) | ||
| 543 | MUX_CFG(DM365, PWM2_G90, 1, 4, 3, 2, false) | ||
| 544 | MUX_CFG(DM365, PWM3_G80, 1, 20, 3, 3, false) | ||
| 545 | MUX_CFG(DM365, PWM3_G81, 1, 18, 3, 3, false) | ||
| 546 | MUX_CFG(DM365, PWM3_G85, 1, 14, 3, 2, false) | ||
| 547 | MUX_CFG(DM365, PWM3_G86, 1, 12, 3, 2, false) | ||
| 548 | |||
| 549 | MUX_CFG(DM365, SPI1_SCLK, 4, 2, 3, 1, false) | ||
| 550 | MUX_CFG(DM365, SPI1_SDI, 3, 31, 1, 1, false) | ||
| 551 | MUX_CFG(DM365, SPI1_SDO, 4, 0, 3, 1, false) | ||
| 552 | MUX_CFG(DM365, SPI1_SDENA0, 4, 4, 3, 1, false) | ||
| 553 | MUX_CFG(DM365, SPI1_SDENA1, 4, 0, 3, 2, false) | ||
| 554 | |||
| 555 | MUX_CFG(DM365, SPI2_SCLK, 4, 10, 3, 1, false) | ||
| 556 | MUX_CFG(DM365, SPI2_SDI, 4, 6, 3, 1, false) | ||
| 557 | MUX_CFG(DM365, SPI2_SDO, 4, 8, 3, 1, false) | ||
| 558 | MUX_CFG(DM365, SPI2_SDENA0, 4, 12, 3, 1, false) | ||
| 559 | MUX_CFG(DM365, SPI2_SDENA1, 4, 8, 3, 2, false) | ||
| 560 | |||
| 561 | MUX_CFG(DM365, SPI3_SCLK, 0, 0, 3, 2, false) | ||
| 562 | MUX_CFG(DM365, SPI3_SDI, 0, 2, 3, 2, false) | ||
| 563 | MUX_CFG(DM365, SPI3_SDO, 0, 6, 3, 2, false) | ||
| 564 | MUX_CFG(DM365, SPI3_SDENA0, 0, 4, 3, 2, false) | ||
| 565 | MUX_CFG(DM365, SPI3_SDENA1, 0, 6, 3, 3, false) | ||
| 566 | |||
| 567 | MUX_CFG(DM365, SPI4_SCLK, 4, 18, 3, 1, false) | ||
| 568 | MUX_CFG(DM365, SPI4_SDI, 4, 14, 3, 1, false) | ||
| 569 | MUX_CFG(DM365, SPI4_SDO, 4, 16, 3, 1, false) | ||
| 570 | MUX_CFG(DM365, SPI4_SDENA0, 4, 20, 3, 1, false) | ||
| 571 | MUX_CFG(DM365, SPI4_SDENA1, 4, 16, 3, 2, false) | ||
| 572 | |||
| 573 | MUX_CFG(DM365, GPIO20, 3, 21, 3, 0, false) | ||
| 574 | MUX_CFG(DM365, GPIO33, 4, 12, 3, 0, false) | ||
| 575 | MUX_CFG(DM365, GPIO40, 4, 26, 3, 0, false) | ||
| 576 | |||
| 577 | MUX_CFG(DM365, VOUT_FIELD, 1, 18, 3, 1, false) | ||
| 578 | MUX_CFG(DM365, VOUT_FIELD_G81, 1, 18, 3, 0, false) | ||
| 579 | MUX_CFG(DM365, VOUT_HVSYNC, 1, 16, 1, 0, false) | ||
| 580 | MUX_CFG(DM365, VOUT_COUTL_EN, 1, 0, 0xff, 0x55, false) | ||
| 581 | MUX_CFG(DM365, VOUT_COUTH_EN, 1, 8, 0xff, 0x55, false) | ||
| 582 | MUX_CFG(DM365, VIN_CAM_WEN, 0, 14, 3, 0, false) | ||
| 583 | MUX_CFG(DM365, VIN_CAM_VD, 0, 13, 1, 0, false) | ||
| 584 | MUX_CFG(DM365, VIN_CAM_HD, 0, 12, 1, 0, false) | ||
| 585 | MUX_CFG(DM365, VIN_YIN4_7_EN, 0, 0, 0xff, 0, false) | ||
| 586 | MUX_CFG(DM365, VIN_YIN0_3_EN, 0, 8, 0xf, 0, false) | ||
| 587 | |||
| 588 | INT_CFG(DM365, INT_EDMA_CC, 2, 1, 1, false) | ||
| 589 | INT_CFG(DM365, INT_EDMA_TC0_ERR, 3, 1, 1, false) | ||
| 590 | INT_CFG(DM365, INT_EDMA_TC1_ERR, 4, 1, 1, false) | ||
| 591 | INT_CFG(DM365, INT_EDMA_TC2_ERR, 22, 1, 1, false) | ||
| 592 | INT_CFG(DM365, INT_EDMA_TC3_ERR, 23, 1, 1, false) | ||
| 593 | INT_CFG(DM365, INT_PRTCSS, 10, 1, 1, false) | ||
| 594 | INT_CFG(DM365, INT_EMAC_RXTHRESH, 14, 1, 1, false) | ||
| 595 | INT_CFG(DM365, INT_EMAC_RXPULSE, 15, 1, 1, false) | ||
| 596 | INT_CFG(DM365, INT_EMAC_TXPULSE, 16, 1, 1, false) | ||
| 597 | INT_CFG(DM365, INT_EMAC_MISCPULSE, 17, 1, 1, false) | ||
| 598 | INT_CFG(DM365, INT_IMX0_ENABLE, 0, 1, 0, false) | ||
| 599 | INT_CFG(DM365, INT_IMX0_DISABLE, 0, 1, 1, false) | ||
| 600 | INT_CFG(DM365, INT_HDVICP_ENABLE, 0, 1, 1, false) | ||
| 601 | INT_CFG(DM365, INT_HDVICP_DISABLE, 0, 1, 0, false) | ||
| 602 | INT_CFG(DM365, INT_IMX1_ENABLE, 24, 1, 1, false) | ||
| 603 | INT_CFG(DM365, INT_IMX1_DISABLE, 24, 1, 0, false) | ||
| 604 | INT_CFG(DM365, INT_NSF_ENABLE, 25, 1, 1, false) | ||
| 605 | INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false) | ||
| 606 | #endif | ||
| 607 | }; | ||
| 608 | |||
| 609 | static struct emac_platform_data dm365_emac_pdata = { | ||
| 610 | .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, | ||
| 611 | .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, | ||
| 612 | .ctrl_ram_offset = DM365_EMAC_CNTRL_RAM_OFFSET, | ||
| 613 | .mdio_reg_offset = DM365_EMAC_MDIO_OFFSET, | ||
| 614 | .ctrl_ram_size = DM365_EMAC_CNTRL_RAM_SIZE, | ||
| 615 | .version = EMAC_VERSION_2, | ||
| 616 | }; | ||
| 617 | |||
| 618 | static struct resource dm365_emac_resources[] = { | ||
| 619 | { | ||
| 620 | .start = DM365_EMAC_BASE, | ||
| 621 | .end = DM365_EMAC_BASE + 0x47ff, | ||
| 622 | .flags = IORESOURCE_MEM, | ||
| 623 | }, | ||
| 624 | { | ||
| 625 | .start = IRQ_DM365_EMAC_RXTHRESH, | ||
| 626 | .end = IRQ_DM365_EMAC_RXTHRESH, | ||
| 627 | .flags = IORESOURCE_IRQ, | ||
| 628 | }, | ||
| 629 | { | ||
| 630 | .start = IRQ_DM365_EMAC_RXPULSE, | ||
| 631 | .end = IRQ_DM365_EMAC_RXPULSE, | ||
| 632 | .flags = IORESOURCE_IRQ, | ||
| 633 | }, | ||
| 634 | { | ||
| 635 | .start = IRQ_DM365_EMAC_TXPULSE, | ||
| 636 | .end = IRQ_DM365_EMAC_TXPULSE, | ||
| 637 | .flags = IORESOURCE_IRQ, | ||
| 638 | }, | ||
| 639 | { | ||
| 640 | .start = IRQ_DM365_EMAC_MISCPULSE, | ||
| 641 | .end = IRQ_DM365_EMAC_MISCPULSE, | ||
| 642 | .flags = IORESOURCE_IRQ, | ||
| 643 | }, | ||
| 644 | }; | ||
| 645 | |||
| 646 | static struct platform_device dm365_emac_device = { | ||
| 647 | .name = "davinci_emac", | ||
| 648 | .id = 1, | ||
| 649 | .dev = { | ||
| 650 | .platform_data = &dm365_emac_pdata, | ||
| 651 | }, | ||
| 652 | .num_resources = ARRAY_SIZE(dm365_emac_resources), | ||
| 653 | .resource = dm365_emac_resources, | ||
| 654 | }; | ||
| 655 | |||
| 656 | static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { | ||
| 657 | [IRQ_VDINT0] = 2, | ||
| 658 | [IRQ_VDINT1] = 6, | ||
| 659 | [IRQ_VDINT2] = 6, | ||
| 660 | [IRQ_HISTINT] = 6, | ||
| 661 | [IRQ_H3AINT] = 6, | ||
| 662 | [IRQ_PRVUINT] = 6, | ||
| 663 | [IRQ_RSZINT] = 6, | ||
| 664 | [IRQ_DM365_INSFINT] = 7, | ||
| 665 | [IRQ_VENCINT] = 6, | ||
| 666 | [IRQ_ASQINT] = 6, | ||
| 667 | [IRQ_IMXINT] = 6, | ||
| 668 | [IRQ_DM365_IMCOPINT] = 4, | ||
| 669 | [IRQ_USBINT] = 4, | ||
| 670 | [IRQ_DM365_RTOINT] = 7, | ||
| 671 | [IRQ_DM365_TINT5] = 7, | ||
| 672 | [IRQ_DM365_TINT6] = 5, | ||
| 673 | [IRQ_CCINT0] = 5, | ||
| 674 | [IRQ_CCERRINT] = 5, | ||
| 675 | [IRQ_TCERRINT0] = 5, | ||
| 676 | [IRQ_TCERRINT] = 7, | ||
| 677 | [IRQ_PSCIN] = 4, | ||
| 678 | [IRQ_DM365_SPINT2_1] = 7, | ||
| 679 | [IRQ_DM365_TINT7] = 7, | ||
| 680 | [IRQ_DM365_SDIOINT0] = 7, | ||
| 681 | [IRQ_MBXINT] = 7, | ||
| 682 | [IRQ_MBRINT] = 7, | ||
| 683 | [IRQ_MMCINT] = 7, | ||
| 684 | [IRQ_DM365_MMCINT1] = 7, | ||
| 685 | [IRQ_DM365_PWMINT3] = 7, | ||
| 686 | [IRQ_DDRINT] = 4, | ||
| 687 | [IRQ_AEMIFINT] = 2, | ||
| 688 | [IRQ_DM365_SDIOINT1] = 2, | ||
| 689 | [IRQ_TINT0_TINT12] = 7, | ||
| 690 | [IRQ_TINT0_TINT34] = 7, | ||
| 691 | [IRQ_TINT1_TINT12] = 7, | ||
| 692 | [IRQ_TINT1_TINT34] = 7, | ||
| 693 | [IRQ_PWMINT0] = 7, | ||
| 694 | [IRQ_PWMINT1] = 3, | ||
| 695 | [IRQ_PWMINT2] = 3, | ||
| 696 | [IRQ_I2C] = 3, | ||
| 697 | [IRQ_UARTINT0] = 3, | ||
| 698 | [IRQ_UARTINT1] = 3, | ||
| 699 | [IRQ_DM365_SPIINT0_0] = 3, | ||
| 700 | [IRQ_DM365_SPIINT3_0] = 3, | ||
| 701 | [IRQ_DM365_GPIO0] = 3, | ||
| 702 | [IRQ_DM365_GPIO1] = 7, | ||
| 703 | [IRQ_DM365_GPIO2] = 4, | ||
| 704 | [IRQ_DM365_GPIO3] = 4, | ||
| 705 | [IRQ_DM365_GPIO4] = 7, | ||
| 706 | [IRQ_DM365_GPIO5] = 7, | ||
| 707 | [IRQ_DM365_GPIO6] = 7, | ||
| 708 | [IRQ_DM365_GPIO7] = 7, | ||
| 709 | [IRQ_DM365_EMAC_RXTHRESH] = 7, | ||
| 710 | [IRQ_DM365_EMAC_RXPULSE] = 7, | ||
| 711 | [IRQ_DM365_EMAC_TXPULSE] = 7, | ||
| 712 | [IRQ_DM365_EMAC_MISCPULSE] = 7, | ||
| 713 | [IRQ_DM365_GPIO12] = 7, | ||
| 714 | [IRQ_DM365_GPIO13] = 7, | ||
| 715 | [IRQ_DM365_GPIO14] = 7, | ||
| 716 | [IRQ_DM365_GPIO15] = 7, | ||
| 717 | [IRQ_DM365_KEYINT] = 7, | ||
| 718 | [IRQ_DM365_TCERRINT2] = 7, | ||
| 719 | [IRQ_DM365_TCERRINT3] = 7, | ||
| 720 | [IRQ_DM365_EMUINT] = 7, | ||
| 721 | }; | ||
| 722 | |||
| 723 | /* Four Transfer Controllers on DM365 */ | ||
| 724 | static const s8 | ||
| 725 | dm365_queue_tc_mapping[][2] = { | ||
| 726 | /* {event queue no, TC no} */ | ||
| 727 | {0, 0}, | ||
| 728 | {1, 1}, | ||
| 729 | {2, 2}, | ||
| 730 | {3, 3}, | ||
| 731 | {-1, -1}, | ||
| 732 | }; | ||
| 733 | |||
| 734 | static const s8 | ||
| 735 | dm365_queue_priority_mapping[][2] = { | ||
| 736 | /* {event queue no, Priority} */ | ||
| 737 | {0, 7}, | ||
| 738 | {1, 7}, | ||
| 739 | {2, 7}, | ||
| 740 | {3, 0}, | ||
| 741 | {-1, -1}, | ||
| 742 | }; | ||
| 743 | |||
| 744 | static struct edma_soc_info dm365_edma_info[] = { | ||
| 745 | { | ||
| 746 | .n_channel = 64, | ||
| 747 | .n_region = 4, | ||
| 748 | .n_slot = 256, | ||
| 749 | .n_tc = 4, | ||
| 750 | .n_cc = 1, | ||
| 751 | .queue_tc_mapping = dm365_queue_tc_mapping, | ||
| 752 | .queue_priority_mapping = dm365_queue_priority_mapping, | ||
| 753 | .default_queue = EVENTQ_2, | ||
| 754 | }, | ||
| 755 | }; | ||
| 756 | |||
| 757 | static struct resource edma_resources[] = { | ||
| 758 | { | ||
| 759 | .name = "edma_cc0", | ||
| 760 | .start = 0x01c00000, | ||
| 761 | .end = 0x01c00000 + SZ_64K - 1, | ||
| 762 | .flags = IORESOURCE_MEM, | ||
| 763 | }, | ||
| 764 | { | ||
| 765 | .name = "edma_tc0", | ||
| 766 | .start = 0x01c10000, | ||
| 767 | .end = 0x01c10000 + SZ_1K - 1, | ||
| 768 | .flags = IORESOURCE_MEM, | ||
| 769 | }, | ||
| 770 | { | ||
| 771 | .name = "edma_tc1", | ||
| 772 | .start = 0x01c10400, | ||
| 773 | .end = 0x01c10400 + SZ_1K - 1, | ||
| 774 | .flags = IORESOURCE_MEM, | ||
| 775 | }, | ||
| 776 | { | ||
| 777 | .name = "edma_tc2", | ||
| 778 | .start = 0x01c10800, | ||
| 779 | .end = 0x01c10800 + SZ_1K - 1, | ||
| 780 | .flags = IORESOURCE_MEM, | ||
| 781 | }, | ||
| 782 | { | ||
| 783 | .name = "edma_tc3", | ||
| 784 | .start = 0x01c10c00, | ||
| 785 | .end = 0x01c10c00 + SZ_1K - 1, | ||
| 786 | .flags = IORESOURCE_MEM, | ||
| 787 | }, | ||
| 788 | { | ||
| 789 | .name = "edma0", | ||
| 790 | .start = IRQ_CCINT0, | ||
| 791 | .flags = IORESOURCE_IRQ, | ||
| 792 | }, | ||
| 793 | { | ||
| 794 | .name = "edma0_err", | ||
| 795 | .start = IRQ_CCERRINT, | ||
| 796 | .flags = IORESOURCE_IRQ, | ||
| 797 | }, | ||
| 798 | /* not using TC*_ERR */ | ||
| 799 | }; | ||
| 800 | |||
| 801 | static struct platform_device dm365_edma_device = { | ||
| 802 | .name = "edma", | ||
| 803 | .id = 0, | ||
| 804 | .dev.platform_data = dm365_edma_info, | ||
| 805 | .num_resources = ARRAY_SIZE(edma_resources), | ||
| 806 | .resource = edma_resources, | ||
| 807 | }; | ||
| 808 | |||
| 809 | static struct map_desc dm365_io_desc[] = { | ||
| 810 | { | ||
| 811 | .virtual = IO_VIRT, | ||
| 812 | .pfn = __phys_to_pfn(IO_PHYS), | ||
| 813 | .length = IO_SIZE, | ||
| 814 | .type = MT_DEVICE | ||
| 815 | }, | ||
| 816 | { | ||
| 817 | .virtual = SRAM_VIRT, | ||
| 818 | .pfn = __phys_to_pfn(0x00010000), | ||
| 819 | .length = SZ_32K, | ||
| 820 | /* MT_MEMORY_NONCACHED requires supersection alignment */ | ||
| 821 | .type = MT_DEVICE, | ||
| 822 | }, | ||
| 823 | }; | ||
| 824 | |||
| 825 | /* Contents of JTAG ID register used to identify exact cpu type */ | ||
| 826 | static struct davinci_id dm365_ids[] = { | ||
| 827 | { | ||
| 828 | .variant = 0x0, | ||
| 829 | .part_no = 0xb83e, | ||
| 830 | .manufacturer = 0x017, | ||
| 831 | .cpu_id = DAVINCI_CPU_ID_DM365, | ||
| 832 | .name = "dm365_rev1.1", | ||
| 833 | }, | ||
| 834 | { | ||
| 835 | .variant = 0x8, | ||
| 836 | .part_no = 0xb83e, | ||
| 837 | .manufacturer = 0x017, | ||
| 838 | .cpu_id = DAVINCI_CPU_ID_DM365, | ||
| 839 | .name = "dm365_rev1.2", | ||
| 840 | }, | ||
| 841 | }; | ||
| 842 | |||
| 843 | static void __iomem *dm365_psc_bases[] = { | ||
| 844 | IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), | ||
| 845 | }; | ||
| 846 | |||
| 847 | struct davinci_timer_info dm365_timer_info = { | ||
| 848 | .timers = davinci_timer_instance, | ||
| 849 | .clockevent_id = T0_BOT, | ||
| 850 | .clocksource_id = T0_TOP, | ||
| 851 | }; | ||
| 852 | |||
| 853 | static struct plat_serial8250_port dm365_serial_platform_data[] = { | ||
| 854 | { | ||
| 855 | .mapbase = DAVINCI_UART0_BASE, | ||
| 856 | .irq = IRQ_UARTINT0, | ||
| 857 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
| 858 | UPF_IOREMAP, | ||
| 859 | .iotype = UPIO_MEM, | ||
| 860 | .regshift = 2, | ||
| 861 | }, | ||
| 862 | { | ||
| 863 | .mapbase = DAVINCI_UART1_BASE, | ||
| 864 | .irq = IRQ_UARTINT1, | ||
| 865 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
| 866 | UPF_IOREMAP, | ||
| 867 | .iotype = UPIO_MEM, | ||
| 868 | .regshift = 2, | ||
| 869 | }, | ||
| 870 | { | ||
| 871 | .flags = 0 | ||
| 872 | }, | ||
| 873 | }; | ||
| 874 | |||
| 875 | static struct platform_device dm365_serial_device = { | ||
| 876 | .name = "serial8250", | ||
| 877 | .id = PLAT8250_DEV_PLATFORM, | ||
| 878 | .dev = { | ||
| 879 | .platform_data = dm365_serial_platform_data, | ||
| 880 | }, | ||
| 881 | }; | ||
| 882 | |||
| 883 | static struct davinci_soc_info davinci_soc_info_dm365 = { | ||
| 884 | .io_desc = dm365_io_desc, | ||
| 885 | .io_desc_num = ARRAY_SIZE(dm365_io_desc), | ||
| 886 | .jtag_id_base = IO_ADDRESS(0x01c40028), | ||
| 887 | .ids = dm365_ids, | ||
| 888 | .ids_num = ARRAY_SIZE(dm365_ids), | ||
| 889 | .cpu_clks = dm365_clks, | ||
| 890 | .psc_bases = dm365_psc_bases, | ||
| 891 | .psc_bases_num = ARRAY_SIZE(dm365_psc_bases), | ||
| 892 | .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), | ||
| 893 | .pinmux_pins = dm365_pins, | ||
| 894 | .pinmux_pins_num = ARRAY_SIZE(dm365_pins), | ||
| 895 | .intc_base = IO_ADDRESS(DAVINCI_ARM_INTC_BASE), | ||
| 896 | .intc_type = DAVINCI_INTC_TYPE_AINTC, | ||
| 897 | .intc_irq_prios = dm365_default_priorities, | ||
| 898 | .intc_irq_num = DAVINCI_N_AINTC_IRQ, | ||
| 899 | .timer_info = &dm365_timer_info, | ||
| 900 | .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), | ||
| 901 | .gpio_num = 104, | ||
| 902 | .gpio_irq = IRQ_DM365_GPIO0, | ||
| 903 | .gpio_unbanked = 8, /* really 16 ... skip muxed GPIOs */ | ||
| 904 | .serial_dev = &dm365_serial_device, | ||
| 905 | .emac_pdata = &dm365_emac_pdata, | ||
| 906 | .sram_dma = 0x00010000, | ||
| 907 | .sram_len = SZ_32K, | ||
| 908 | }; | ||
| 909 | |||
| 910 | void __init dm365_init(void) | ||
| 911 | { | ||
| 912 | davinci_common_init(&davinci_soc_info_dm365); | ||
| 913 | } | ||
| 914 | |||
| 915 | static int __init dm365_init_devices(void) | ||
| 916 | { | ||
| 917 | if (!cpu_is_davinci_dm365()) | ||
| 918 | return 0; | ||
| 919 | |||
| 920 | davinci_cfg_reg(DM365_INT_EDMA_CC); | ||
| 921 | platform_device_register(&dm365_edma_device); | ||
| 922 | platform_device_register(&dm365_emac_device); | ||
| 923 | |||
| 924 | return 0; | ||
| 925 | } | ||
| 926 | postcore_initcall(dm365_init_devices); | ||
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index fb5449b3c97b..d6e0fa5a8d8a 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
| @@ -27,6 +27,7 @@ | |||
| 27 | #include <mach/time.h> | 27 | #include <mach/time.h> |
| 28 | #include <mach/serial.h> | 28 | #include <mach/serial.h> |
| 29 | #include <mach/common.h> | 29 | #include <mach/common.h> |
| 30 | #include <mach/asp.h> | ||
| 30 | 31 | ||
| 31 | #include "clock.h" | 32 | #include "clock.h" |
| 32 | #include "mux.h" | 33 | #include "mux.h" |
| @@ -303,7 +304,7 @@ struct davinci_clk dm644x_clks[] = { | |||
| 303 | CLK("davinci_emac.1", NULL, &emac_clk), | 304 | CLK("davinci_emac.1", NULL, &emac_clk), |
| 304 | CLK("i2c_davinci.1", NULL, &i2c_clk), | 305 | CLK("i2c_davinci.1", NULL, &i2c_clk), |
| 305 | CLK("palm_bk3710", NULL, &ide_clk), | 306 | CLK("palm_bk3710", NULL, &ide_clk), |
| 306 | CLK("soc-audio.0", NULL, &asp_clk), | 307 | CLK("davinci-asp", NULL, &asp_clk), |
| 307 | CLK("davinci_mmc.0", NULL, &mmcsd_clk), | 308 | CLK("davinci_mmc.0", NULL, &mmcsd_clk), |
| 308 | CLK(NULL, "spi", &spi_clk), | 309 | CLK(NULL, "spi", &spi_clk), |
| 309 | CLK(NULL, "gpio", &gpio_clk), | 310 | CLK(NULL, "gpio", &gpio_clk), |
| @@ -484,17 +485,38 @@ static const s8 dma_chan_dm644x_no_event[] = { | |||
| 484 | -1 | 485 | -1 |
| 485 | }; | 486 | }; |
| 486 | 487 | ||
| 487 | static struct edma_soc_info dm644x_edma_info = { | 488 | static const s8 |
| 488 | .n_channel = 64, | 489 | queue_tc_mapping[][2] = { |
| 489 | .n_region = 4, | 490 | /* {event queue no, TC no} */ |
| 490 | .n_slot = 128, | 491 | {0, 0}, |
| 491 | .n_tc = 2, | 492 | {1, 1}, |
| 492 | .noevent = dma_chan_dm644x_no_event, | 493 | {-1, -1}, |
| 494 | }; | ||
| 495 | |||
| 496 | static const s8 | ||
| 497 | queue_priority_mapping[][2] = { | ||
| 498 | /* {event queue no, Priority} */ | ||
| 499 | {0, 3}, | ||
| 500 | {1, 7}, | ||
| 501 | {-1, -1}, | ||
| 502 | }; | ||
| 503 | |||
| 504 | static struct edma_soc_info dm644x_edma_info[] = { | ||
| 505 | { | ||
| 506 | .n_channel = 64, | ||
| 507 | .n_region = 4, | ||
| 508 | .n_slot = 128, | ||
| 509 | .n_tc = 2, | ||
| 510 | .n_cc = 1, | ||
| 511 | .noevent = dma_chan_dm644x_no_event, | ||
| 512 | .queue_tc_mapping = queue_tc_mapping, | ||
| 513 | .queue_priority_mapping = queue_priority_mapping, | ||
| 514 | }, | ||
| 493 | }; | 515 | }; |
| 494 | 516 | ||
| 495 | static struct resource edma_resources[] = { | 517 | static struct resource edma_resources[] = { |
| 496 | { | 518 | { |
| 497 | .name = "edma_cc", | 519 | .name = "edma_cc0", |
| 498 | .start = 0x01c00000, | 520 | .start = 0x01c00000, |
| 499 | .end = 0x01c00000 + SZ_64K - 1, | 521 | .end = 0x01c00000 + SZ_64K - 1, |
| 500 | .flags = IORESOURCE_MEM, | 522 | .flags = IORESOURCE_MEM, |
| @@ -512,10 +534,12 @@ static struct resource edma_resources[] = { | |||
| 512 | .flags = IORESOURCE_MEM, | 534 | .flags = IORESOURCE_MEM, |
| 513 | }, | 535 | }, |
| 514 | { | 536 | { |
| 537 | .name = "edma0", | ||
| 515 | .start = IRQ_CCINT0, | 538 | .start = IRQ_CCINT0, |
| 516 | .flags = IORESOURCE_IRQ, | 539 | .flags = IORESOURCE_IRQ, |
| 517 | }, | 540 | }, |
| 518 | { | 541 | { |
| 542 | .name = "edma0_err", | ||
| 519 | .start = IRQ_CCERRINT, | 543 | .start = IRQ_CCERRINT, |
| 520 | .flags = IORESOURCE_IRQ, | 544 | .flags = IORESOURCE_IRQ, |
| 521 | }, | 545 | }, |
| @@ -524,12 +548,91 @@ static struct resource edma_resources[] = { | |||
| 524 | 548 | ||
| 525 | static struct platform_device dm644x_edma_device = { | 549 | static struct platform_device dm644x_edma_device = { |
| 526 | .name = "edma", | 550 | .name = "edma", |
| 527 | .id = -1, | 551 | .id = 0, |
| 528 | .dev.platform_data = &dm644x_edma_info, | 552 | .dev.platform_data = dm644x_edma_info, |
| 529 | .num_resources = ARRAY_SIZE(edma_resources), | 553 | .num_resources = ARRAY_SIZE(edma_resources), |
| 530 | .resource = edma_resources, | 554 | .resource = edma_resources, |
| 531 | }; | 555 | }; |
| 532 | 556 | ||
| 557 | /* DM6446 EVM uses ASP0; line-out is a pair of RCA jacks */ | ||
| 558 | static struct resource dm644x_asp_resources[] = { | ||
| 559 | { | ||
| 560 | .start = DAVINCI_ASP0_BASE, | ||
| 561 | .end = DAVINCI_ASP0_BASE + SZ_8K - 1, | ||
| 562 | .flags = IORESOURCE_MEM, | ||
| 563 | }, | ||
| 564 | { | ||
| 565 | .start = DAVINCI_DMA_ASP0_TX, | ||
| 566 | .end = DAVINCI_DMA_ASP0_TX, | ||
| 567 | .flags = IORESOURCE_DMA, | ||
| 568 | }, | ||
| 569 | { | ||
| 570 | .start = DAVINCI_DMA_ASP0_RX, | ||
| 571 | .end = DAVINCI_DMA_ASP0_RX, | ||
| 572 | .flags = IORESOURCE_DMA, | ||
| 573 | }, | ||
| 574 | }; | ||
| 575 | |||
| 576 | static struct platform_device dm644x_asp_device = { | ||
| 577 | .name = "davinci-asp", | ||
| 578 | .id = -1, | ||
| 579 | .num_resources = ARRAY_SIZE(dm644x_asp_resources), | ||
| 580 | .resource = dm644x_asp_resources, | ||
| 581 | }; | ||
| 582 | |||
| 583 | static struct resource dm644x_vpss_resources[] = { | ||
| 584 | { | ||
| 585 | /* VPSS Base address */ | ||
| 586 | .name = "vpss", | ||
| 587 | .start = 0x01c73400, | ||
| 588 | .end = 0x01c73400 + 0xff, | ||
| 589 | .flags = IORESOURCE_MEM, | ||
| 590 | }, | ||
| 591 | }; | ||
| 592 | |||
| 593 | static struct platform_device dm644x_vpss_device = { | ||
| 594 | .name = "vpss", | ||
| 595 | .id = -1, | ||
| 596 | .dev.platform_data = "dm644x_vpss", | ||
| 597 | .num_resources = ARRAY_SIZE(dm644x_vpss_resources), | ||
| 598 | .resource = dm644x_vpss_resources, | ||
| 599 | }; | ||
| 600 | |||
| 601 | static struct resource vpfe_resources[] = { | ||
| 602 | { | ||
| 603 | .start = IRQ_VDINT0, | ||
| 604 | .end = IRQ_VDINT0, | ||
| 605 | .flags = IORESOURCE_IRQ, | ||
| 606 | }, | ||
| 607 | { | ||
| 608 | .start = IRQ_VDINT1, | ||
| 609 | .end = IRQ_VDINT1, | ||
| 610 | .flags = IORESOURCE_IRQ, | ||
| 611 | }, | ||
| 612 | { | ||
| 613 | .start = 0x01c70400, | ||
| 614 | .end = 0x01c70400 + 0xff, | ||
| 615 | .flags = IORESOURCE_MEM, | ||
| 616 | }, | ||
| 617 | }; | ||
| 618 | |||
| 619 | static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | ||
| 620 | static struct platform_device vpfe_capture_dev = { | ||
| 621 | .name = CAPTURE_DRV_NAME, | ||
| 622 | .id = -1, | ||
| 623 | .num_resources = ARRAY_SIZE(vpfe_resources), | ||
| 624 | .resource = vpfe_resources, | ||
| 625 | .dev = { | ||
| 626 | .dma_mask = &vpfe_capture_dma_mask, | ||
| 627 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 628 | }, | ||
| 629 | }; | ||
| 630 | |||
| 631 | void dm644x_set_vpfe_config(struct vpfe_config *cfg) | ||
| 632 | { | ||
| 633 | vpfe_capture_dev.dev.platform_data = cfg; | ||
| 634 | } | ||
| 635 | |||
| 533 | /*----------------------------------------------------------------------*/ | 636 | /*----------------------------------------------------------------------*/ |
| 534 | 637 | ||
| 535 | static struct map_desc dm644x_io_desc[] = { | 638 | static struct map_desc dm644x_io_desc[] = { |
| @@ -557,6 +660,13 @@ static struct davinci_id dm644x_ids[] = { | |||
| 557 | .cpu_id = DAVINCI_CPU_ID_DM6446, | 660 | .cpu_id = DAVINCI_CPU_ID_DM6446, |
| 558 | .name = "dm6446", | 661 | .name = "dm6446", |
| 559 | }, | 662 | }, |
| 663 | { | ||
| 664 | .variant = 0x1, | ||
| 665 | .part_no = 0xb700, | ||
| 666 | .manufacturer = 0x017, | ||
| 667 | .cpu_id = DAVINCI_CPU_ID_DM6446, | ||
| 668 | .name = "dm6446a", | ||
| 669 | }, | ||
| 560 | }; | 670 | }; |
| 561 | 671 | ||
| 562 | static void __iomem *dm644x_psc_bases[] = { | 672 | static void __iomem *dm644x_psc_bases[] = { |
| @@ -630,7 +740,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { | |||
| 630 | .intc_irq_prios = dm644x_default_priorities, | 740 | .intc_irq_prios = dm644x_default_priorities, |
| 631 | .intc_irq_num = DAVINCI_N_AINTC_IRQ, | 741 | .intc_irq_num = DAVINCI_N_AINTC_IRQ, |
| 632 | .timer_info = &dm644x_timer_info, | 742 | .timer_info = &dm644x_timer_info, |
| 633 | .wdt_base = IO_ADDRESS(DAVINCI_WDOG_BASE), | ||
| 634 | .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), | 743 | .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), |
| 635 | .gpio_num = 71, | 744 | .gpio_num = 71, |
| 636 | .gpio_irq = IRQ_GPIOBNK0, | 745 | .gpio_irq = IRQ_GPIOBNK0, |
| @@ -640,6 +749,13 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { | |||
| 640 | .sram_len = SZ_16K, | 749 | .sram_len = SZ_16K, |
| 641 | }; | 750 | }; |
| 642 | 751 | ||
| 752 | void __init dm644x_init_asp(struct snd_platform_data *pdata) | ||
| 753 | { | ||
| 754 | davinci_cfg_reg(DM644X_MCBSP); | ||
| 755 | dm644x_asp_device.dev.platform_data = pdata; | ||
| 756 | platform_device_register(&dm644x_asp_device); | ||
| 757 | } | ||
| 758 | |||
| 643 | void __init dm644x_init(void) | 759 | void __init dm644x_init(void) |
| 644 | { | 760 | { |
| 645 | davinci_common_init(&davinci_soc_info_dm644x); | 761 | davinci_common_init(&davinci_soc_info_dm644x); |
| @@ -652,6 +768,9 @@ static int __init dm644x_init_devices(void) | |||
| 652 | 768 | ||
| 653 | platform_device_register(&dm644x_edma_device); | 769 | platform_device_register(&dm644x_edma_device); |
| 654 | platform_device_register(&dm644x_emac_device); | 770 | platform_device_register(&dm644x_emac_device); |
| 771 | platform_device_register(&dm644x_vpss_device); | ||
| 772 | platform_device_register(&vpfe_capture_dev); | ||
| 773 | |||
| 655 | return 0; | 774 | return 0; |
| 656 | } | 775 | } |
| 657 | postcore_initcall(dm644x_init_devices); | 776 | postcore_initcall(dm644x_init_devices); |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 334f0711e0f5..0976049c7b3b 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
| @@ -27,10 +27,20 @@ | |||
| 27 | #include <mach/time.h> | 27 | #include <mach/time.h> |
| 28 | #include <mach/serial.h> | 28 | #include <mach/serial.h> |
| 29 | #include <mach/common.h> | 29 | #include <mach/common.h> |
| 30 | #include <mach/asp.h> | ||
| 30 | 31 | ||
| 31 | #include "clock.h" | 32 | #include "clock.h" |
| 32 | #include "mux.h" | 33 | #include "mux.h" |
| 33 | 34 | ||
| 35 | #define DAVINCI_VPIF_BASE (0x01C12000) | ||
| 36 | #define VDD3P3V_PWDN_OFFSET (0x48) | ||
| 37 | #define VSCLKDIS_OFFSET (0x6C) | ||
| 38 | |||
| 39 | #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ | ||
| 40 | BIT_MASK(0)) | ||
| 41 | #define VSCLKDIS_MASK (BIT_MASK(11) | BIT_MASK(10) | BIT_MASK(9) |\ | ||
| 42 | BIT_MASK(8)) | ||
| 43 | |||
| 34 | /* | 44 | /* |
| 35 | * Device specific clocks | 45 | * Device specific clocks |
| 36 | */ | 46 | */ |
| @@ -162,6 +172,41 @@ static struct clk arm_clk = { | |||
| 162 | .flags = ALWAYS_ENABLED, | 172 | .flags = ALWAYS_ENABLED, |
| 163 | }; | 173 | }; |
| 164 | 174 | ||
| 175 | static struct clk edma_cc_clk = { | ||
| 176 | .name = "edma_cc", | ||
| 177 | .parent = &pll1_sysclk2, | ||
| 178 | .lpsc = DM646X_LPSC_TPCC, | ||
| 179 | .flags = ALWAYS_ENABLED, | ||
| 180 | }; | ||
| 181 | |||
| 182 | static struct clk edma_tc0_clk = { | ||
| 183 | .name = "edma_tc0", | ||
| 184 | .parent = &pll1_sysclk2, | ||
| 185 | .lpsc = DM646X_LPSC_TPTC0, | ||
| 186 | .flags = ALWAYS_ENABLED, | ||
| 187 | }; | ||
| 188 | |||
| 189 | static struct clk edma_tc1_clk = { | ||
| 190 | .name = "edma_tc1", | ||
| 191 | .parent = &pll1_sysclk2, | ||
| 192 | .lpsc = DM646X_LPSC_TPTC1, | ||
| 193 | .flags = ALWAYS_ENABLED, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static struct clk edma_tc2_clk = { | ||
| 197 | .name = "edma_tc2", | ||
| 198 | .parent = &pll1_sysclk2, | ||
| 199 | .lpsc = DM646X_LPSC_TPTC2, | ||
| 200 | .flags = ALWAYS_ENABLED, | ||
| 201 | }; | ||
| 202 | |||
| 203 | static struct clk edma_tc3_clk = { | ||
| 204 | .name = "edma_tc3", | ||
| 205 | .parent = &pll1_sysclk2, | ||
| 206 | .lpsc = DM646X_LPSC_TPTC3, | ||
| 207 | .flags = ALWAYS_ENABLED, | ||
| 208 | }; | ||
| 209 | |||
| 165 | static struct clk uart0_clk = { | 210 | static struct clk uart0_clk = { |
| 166 | .name = "uart0", | 211 | .name = "uart0", |
| 167 | .parent = &aux_clkin, | 212 | .parent = &aux_clkin, |
| @@ -192,6 +237,18 @@ static struct clk gpio_clk = { | |||
| 192 | .lpsc = DM646X_LPSC_GPIO, | 237 | .lpsc = DM646X_LPSC_GPIO, |
| 193 | }; | 238 | }; |
| 194 | 239 | ||
| 240 | static struct clk mcasp0_clk = { | ||
| 241 | .name = "mcasp0", | ||
| 242 | .parent = &pll1_sysclk3, | ||
| 243 | .lpsc = DM646X_LPSC_McASP0, | ||
| 244 | }; | ||
| 245 | |||
| 246 | static struct clk mcasp1_clk = { | ||
| 247 | .name = "mcasp1", | ||
| 248 | .parent = &pll1_sysclk3, | ||
| 249 | .lpsc = DM646X_LPSC_McASP1, | ||
| 250 | }; | ||
| 251 | |||
| 195 | static struct clk aemif_clk = { | 252 | static struct clk aemif_clk = { |
| 196 | .name = "aemif", | 253 | .name = "aemif", |
| 197 | .parent = &pll1_sysclk3, | 254 | .parent = &pll1_sysclk3, |
| @@ -237,6 +294,13 @@ static struct clk timer2_clk = { | |||
| 237 | .flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */ | 294 | .flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */ |
| 238 | }; | 295 | }; |
| 239 | 296 | ||
| 297 | |||
| 298 | static struct clk ide_clk = { | ||
| 299 | .name = "ide", | ||
| 300 | .parent = &pll1_sysclk4, | ||
| 301 | .lpsc = DAVINCI_LPSC_ATA, | ||
| 302 | }; | ||
| 303 | |||
| 240 | static struct clk vpif0_clk = { | 304 | static struct clk vpif0_clk = { |
| 241 | .name = "vpif0", | 305 | .name = "vpif0", |
| 242 | .parent = &ref_clk, | 306 | .parent = &ref_clk, |
| @@ -269,11 +333,18 @@ struct davinci_clk dm646x_clks[] = { | |||
| 269 | CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), | 333 | CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), |
| 270 | CLK(NULL, "dsp", &dsp_clk), | 334 | CLK(NULL, "dsp", &dsp_clk), |
| 271 | CLK(NULL, "arm", &arm_clk), | 335 | CLK(NULL, "arm", &arm_clk), |
| 336 | CLK(NULL, "edma_cc", &edma_cc_clk), | ||
| 337 | CLK(NULL, "edma_tc0", &edma_tc0_clk), | ||
| 338 | CLK(NULL, "edma_tc1", &edma_tc1_clk), | ||
| 339 | CLK(NULL, "edma_tc2", &edma_tc2_clk), | ||
| 340 | CLK(NULL, "edma_tc3", &edma_tc3_clk), | ||
| 272 | CLK(NULL, "uart0", &uart0_clk), | 341 | CLK(NULL, "uart0", &uart0_clk), |
| 273 | CLK(NULL, "uart1", &uart1_clk), | 342 | CLK(NULL, "uart1", &uart1_clk), |
| 274 | CLK(NULL, "uart2", &uart2_clk), | 343 | CLK(NULL, "uart2", &uart2_clk), |
| 275 | CLK("i2c_davinci.1", NULL, &i2c_clk), | 344 | CLK("i2c_davinci.1", NULL, &i2c_clk), |
| 276 | CLK(NULL, "gpio", &gpio_clk), | 345 | CLK(NULL, "gpio", &gpio_clk), |
| 346 | CLK("davinci-mcasp.0", NULL, &mcasp0_clk), | ||
| 347 | CLK("davinci-mcasp.1", NULL, &mcasp1_clk), | ||
| 277 | CLK(NULL, "aemif", &aemif_clk), | 348 | CLK(NULL, "aemif", &aemif_clk), |
| 278 | CLK("davinci_emac.1", NULL, &emac_clk), | 349 | CLK("davinci_emac.1", NULL, &emac_clk), |
| 279 | CLK(NULL, "pwm0", &pwm0_clk), | 350 | CLK(NULL, "pwm0", &pwm0_clk), |
| @@ -281,6 +352,7 @@ struct davinci_clk dm646x_clks[] = { | |||
| 281 | CLK(NULL, "timer0", &timer0_clk), | 352 | CLK(NULL, "timer0", &timer0_clk), |
| 282 | CLK(NULL, "timer1", &timer1_clk), | 353 | CLK(NULL, "timer1", &timer1_clk), |
| 283 | CLK("watchdog", NULL, &timer2_clk), | 354 | CLK("watchdog", NULL, &timer2_clk), |
| 355 | CLK("palm_bk3710", NULL, &ide_clk), | ||
| 284 | CLK(NULL, "vpif0", &vpif0_clk), | 356 | CLK(NULL, "vpif0", &vpif0_clk), |
| 285 | CLK(NULL, "vpif1", &vpif1_clk), | 357 | CLK(NULL, "vpif1", &vpif1_clk), |
| 286 | CLK(NULL, NULL, NULL), | 358 | CLK(NULL, NULL, NULL), |
| @@ -344,7 +416,7 @@ static struct platform_device dm646x_emac_device = { | |||
| 344 | */ | 416 | */ |
| 345 | static const struct mux_config dm646x_pins[] = { | 417 | static const struct mux_config dm646x_pins[] = { |
| 346 | #ifdef CONFIG_DAVINCI_MUX | 418 | #ifdef CONFIG_DAVINCI_MUX |
| 347 | MUX_CFG(DM646X, ATAEN, 0, 0, 1, 1, true) | 419 | MUX_CFG(DM646X, ATAEN, 0, 0, 5, 1, true) |
| 348 | 420 | ||
| 349 | MUX_CFG(DM646X, AUDCK1, 0, 29, 1, 0, false) | 421 | MUX_CFG(DM646X, AUDCK1, 0, 29, 1, 0, false) |
| 350 | 422 | ||
| @@ -451,17 +523,43 @@ static const s8 dma_chan_dm646x_no_event[] = { | |||
| 451 | -1 | 523 | -1 |
| 452 | }; | 524 | }; |
| 453 | 525 | ||
| 454 | static struct edma_soc_info dm646x_edma_info = { | 526 | /* Four Transfer Controllers on DM646x */ |
| 455 | .n_channel = 64, | 527 | static const s8 |
| 456 | .n_region = 6, /* 0-1, 4-7 */ | 528 | dm646x_queue_tc_mapping[][2] = { |
| 457 | .n_slot = 512, | 529 | /* {event queue no, TC no} */ |
| 458 | .n_tc = 4, | 530 | {0, 0}, |
| 459 | .noevent = dma_chan_dm646x_no_event, | 531 | {1, 1}, |
| 532 | {2, 2}, | ||
| 533 | {3, 3}, | ||
| 534 | {-1, -1}, | ||
| 535 | }; | ||
| 536 | |||
| 537 | static const s8 | ||
| 538 | dm646x_queue_priority_mapping[][2] = { | ||
| 539 | /* {event queue no, Priority} */ | ||
| 540 | {0, 4}, | ||
| 541 | {1, 0}, | ||
| 542 | {2, 5}, | ||
| 543 | {3, 1}, | ||
| 544 | {-1, -1}, | ||
| 545 | }; | ||
| 546 | |||
| 547 | static struct edma_soc_info dm646x_edma_info[] = { | ||
| 548 | { | ||
| 549 | .n_channel = 64, | ||
| 550 | .n_region = 6, /* 0-1, 4-7 */ | ||
| 551 | .n_slot = 512, | ||
| 552 | .n_tc = 4, | ||
| 553 | .n_cc = 1, | ||
| 554 | .noevent = dma_chan_dm646x_no_event, | ||
| 555 | .queue_tc_mapping = dm646x_queue_tc_mapping, | ||
| 556 | .queue_priority_mapping = dm646x_queue_priority_mapping, | ||
| 557 | }, | ||
| 460 | }; | 558 | }; |
| 461 | 559 | ||
| 462 | static struct resource edma_resources[] = { | 560 | static struct resource edma_resources[] = { |
| 463 | { | 561 | { |
| 464 | .name = "edma_cc", | 562 | .name = "edma_cc0", |
| 465 | .start = 0x01c00000, | 563 | .start = 0x01c00000, |
| 466 | .end = 0x01c00000 + SZ_64K - 1, | 564 | .end = 0x01c00000 + SZ_64K - 1, |
| 467 | .flags = IORESOURCE_MEM, | 565 | .flags = IORESOURCE_MEM, |
| @@ -491,10 +589,12 @@ static struct resource edma_resources[] = { | |||
| 491 | .flags = IORESOURCE_MEM, | 589 | .flags = IORESOURCE_MEM, |
| 492 | }, | 590 | }, |
| 493 | { | 591 | { |
| 592 | .name = "edma0", | ||
| 494 | .start = IRQ_CCINT0, | 593 | .start = IRQ_CCINT0, |
| 495 | .flags = IORESOURCE_IRQ, | 594 | .flags = IORESOURCE_IRQ, |
| 496 | }, | 595 | }, |
| 497 | { | 596 | { |
| 597 | .name = "edma0_err", | ||
| 498 | .start = IRQ_CCERRINT, | 598 | .start = IRQ_CCERRINT, |
| 499 | .flags = IORESOURCE_IRQ, | 599 | .flags = IORESOURCE_IRQ, |
| 500 | }, | 600 | }, |
| @@ -503,12 +603,167 @@ static struct resource edma_resources[] = { | |||
| 503 | 603 | ||
| 504 | static struct platform_device dm646x_edma_device = { | 604 | static struct platform_device dm646x_edma_device = { |
| 505 | .name = "edma", | 605 | .name = "edma", |
| 506 | .id = -1, | 606 | .id = 0, |
| 507 | .dev.platform_data = &dm646x_edma_info, | 607 | .dev.platform_data = dm646x_edma_info, |
| 508 | .num_resources = ARRAY_SIZE(edma_resources), | 608 | .num_resources = ARRAY_SIZE(edma_resources), |
| 509 | .resource = edma_resources, | 609 | .resource = edma_resources, |
| 510 | }; | 610 | }; |
| 511 | 611 | ||
| 612 | static struct resource ide_resources[] = { | ||
| 613 | { | ||
| 614 | .start = DM646X_ATA_REG_BASE, | ||
| 615 | .end = DM646X_ATA_REG_BASE + 0x7ff, | ||
| 616 | .flags = IORESOURCE_MEM, | ||
| 617 | }, | ||
| 618 | { | ||
| 619 | .start = IRQ_DM646X_IDE, | ||
| 620 | .end = IRQ_DM646X_IDE, | ||
| 621 | .flags = IORESOURCE_IRQ, | ||
| 622 | }, | ||
| 623 | }; | ||
| 624 | |||
| 625 | static u64 ide_dma_mask = DMA_BIT_MASK(32); | ||
| 626 | |||
| 627 | static struct platform_device ide_dev = { | ||
| 628 | .name = "palm_bk3710", | ||
| 629 | .id = -1, | ||
| 630 | .resource = ide_resources, | ||
| 631 | .num_resources = ARRAY_SIZE(ide_resources), | ||
| 632 | .dev = { | ||
| 633 | .dma_mask = &ide_dma_mask, | ||
| 634 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 635 | }, | ||
| 636 | }; | ||
| 637 | |||
| 638 | static struct resource dm646x_mcasp0_resources[] = { | ||
| 639 | { | ||
| 640 | .name = "mcasp0", | ||
| 641 | .start = DAVINCI_DM646X_MCASP0_REG_BASE, | ||
| 642 | .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1, | ||
| 643 | .flags = IORESOURCE_MEM, | ||
| 644 | }, | ||
| 645 | /* first TX, then RX */ | ||
| 646 | { | ||
| 647 | .start = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, | ||
| 648 | .end = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, | ||
| 649 | .flags = IORESOURCE_DMA, | ||
| 650 | }, | ||
| 651 | { | ||
| 652 | .start = DAVINCI_DM646X_DMA_MCASP0_AREVT0, | ||
| 653 | .end = DAVINCI_DM646X_DMA_MCASP0_AREVT0, | ||
| 654 | .flags = IORESOURCE_DMA, | ||
| 655 | }, | ||
| 656 | }; | ||
| 657 | |||
| 658 | static struct resource dm646x_mcasp1_resources[] = { | ||
| 659 | { | ||
| 660 | .name = "mcasp1", | ||
| 661 | .start = DAVINCI_DM646X_MCASP1_REG_BASE, | ||
| 662 | .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1, | ||
| 663 | .flags = IORESOURCE_MEM, | ||
| 664 | }, | ||
| 665 | /* DIT mode, only TX event */ | ||
| 666 | { | ||
| 667 | .start = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, | ||
| 668 | .end = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, | ||
| 669 | .flags = IORESOURCE_DMA, | ||
| 670 | }, | ||
| 671 | /* DIT mode, dummy entry */ | ||
| 672 | { | ||
| 673 | .start = -1, | ||
| 674 | .end = -1, | ||
| 675 | .flags = IORESOURCE_DMA, | ||
| 676 | }, | ||
| 677 | }; | ||
| 678 | |||
| 679 | static struct platform_device dm646x_mcasp0_device = { | ||
| 680 | .name = "davinci-mcasp", | ||
| 681 | .id = 0, | ||
| 682 | .num_resources = ARRAY_SIZE(dm646x_mcasp0_resources), | ||
| 683 | .resource = dm646x_mcasp0_resources, | ||
| 684 | }; | ||
| 685 | |||
| 686 | static struct platform_device dm646x_mcasp1_device = { | ||
| 687 | .name = "davinci-mcasp", | ||
| 688 | .id = 1, | ||
| 689 | .num_resources = ARRAY_SIZE(dm646x_mcasp1_resources), | ||
| 690 | .resource = dm646x_mcasp1_resources, | ||
| 691 | }; | ||
| 692 | |||
| 693 | static struct platform_device dm646x_dit_device = { | ||
| 694 | .name = "spdif-dit", | ||
| 695 | .id = -1, | ||
| 696 | }; | ||
| 697 | |||
| 698 | static u64 vpif_dma_mask = DMA_BIT_MASK(32); | ||
| 699 | |||
| 700 | static struct resource vpif_resource[] = { | ||
| 701 | { | ||
| 702 | .start = DAVINCI_VPIF_BASE, | ||
| 703 | .end = DAVINCI_VPIF_BASE + 0x03ff, | ||
| 704 | .flags = IORESOURCE_MEM, | ||
| 705 | } | ||
| 706 | }; | ||
| 707 | |||
| 708 | static struct platform_device vpif_dev = { | ||
| 709 | .name = "vpif", | ||
| 710 | .id = -1, | ||
| 711 | .dev = { | ||
| 712 | .dma_mask = &vpif_dma_mask, | ||
| 713 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 714 | }, | ||
| 715 | .resource = vpif_resource, | ||
| 716 | .num_resources = ARRAY_SIZE(vpif_resource), | ||
| 717 | }; | ||
| 718 | |||
| 719 | static struct resource vpif_display_resource[] = { | ||
| 720 | { | ||
| 721 | .start = IRQ_DM646X_VP_VERTINT2, | ||
| 722 | .end = IRQ_DM646X_VP_VERTINT2, | ||
| 723 | .flags = IORESOURCE_IRQ, | ||
| 724 | }, | ||
| 725 | { | ||
| 726 | .start = IRQ_DM646X_VP_VERTINT3, | ||
| 727 | .end = IRQ_DM646X_VP_VERTINT3, | ||
| 728 | .flags = IORESOURCE_IRQ, | ||
| 729 | }, | ||
| 730 | }; | ||
| 731 | |||
| 732 | static struct platform_device vpif_display_dev = { | ||
| 733 | .name = "vpif_display", | ||
| 734 | .id = -1, | ||
| 735 | .dev = { | ||
| 736 | .dma_mask = &vpif_dma_mask, | ||
| 737 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 738 | }, | ||
| 739 | .resource = vpif_display_resource, | ||
| 740 | .num_resources = ARRAY_SIZE(vpif_display_resource), | ||
| 741 | }; | ||
| 742 | |||
| 743 | static struct resource vpif_capture_resource[] = { | ||
| 744 | { | ||
| 745 | .start = IRQ_DM646X_VP_VERTINT0, | ||
| 746 | .end = IRQ_DM646X_VP_VERTINT0, | ||
| 747 | .flags = IORESOURCE_IRQ, | ||
| 748 | }, | ||
| 749 | { | ||
| 750 | .start = IRQ_DM646X_VP_VERTINT1, | ||
| 751 | .end = IRQ_DM646X_VP_VERTINT1, | ||
| 752 | .flags = IORESOURCE_IRQ, | ||
| 753 | }, | ||
| 754 | }; | ||
| 755 | |||
| 756 | static struct platform_device vpif_capture_dev = { | ||
| 757 | .name = "vpif_capture", | ||
| 758 | .id = -1, | ||
| 759 | .dev = { | ||
| 760 | .dma_mask = &vpif_dma_mask, | ||
| 761 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 762 | }, | ||
| 763 | .resource = vpif_capture_resource, | ||
| 764 | .num_resources = ARRAY_SIZE(vpif_capture_resource), | ||
| 765 | }; | ||
| 766 | |||
| 512 | /*----------------------------------------------------------------------*/ | 767 | /*----------------------------------------------------------------------*/ |
| 513 | 768 | ||
| 514 | static struct map_desc dm646x_io_desc[] = { | 769 | static struct map_desc dm646x_io_desc[] = { |
| @@ -609,7 +864,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { | |||
| 609 | .intc_irq_prios = dm646x_default_priorities, | 864 | .intc_irq_prios = dm646x_default_priorities, |
| 610 | .intc_irq_num = DAVINCI_N_AINTC_IRQ, | 865 | .intc_irq_num = DAVINCI_N_AINTC_IRQ, |
| 611 | .timer_info = &dm646x_timer_info, | 866 | .timer_info = &dm646x_timer_info, |
| 612 | .wdt_base = IO_ADDRESS(DAVINCI_WDOG_BASE), | ||
| 613 | .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), | 867 | .gpio_base = IO_ADDRESS(DAVINCI_GPIO_BASE), |
| 614 | .gpio_num = 43, /* Only 33 usable */ | 868 | .gpio_num = 43, /* Only 33 usable */ |
| 615 | .gpio_irq = IRQ_DM646X_GPIOBNK0, | 869 | .gpio_irq = IRQ_DM646X_GPIOBNK0, |
| @@ -619,6 +873,51 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { | |||
| 619 | .sram_len = SZ_32K, | 873 | .sram_len = SZ_32K, |
| 620 | }; | 874 | }; |
| 621 | 875 | ||
| 876 | void __init dm646x_init_ide() | ||
| 877 | { | ||
| 878 | davinci_cfg_reg(DM646X_ATAEN); | ||
| 879 | platform_device_register(&ide_dev); | ||
| 880 | } | ||
| 881 | |||
| 882 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata) | ||
| 883 | { | ||
| 884 | dm646x_mcasp0_device.dev.platform_data = pdata; | ||
| 885 | platform_device_register(&dm646x_mcasp0_device); | ||
| 886 | } | ||
| 887 | |||
| 888 | void __init dm646x_init_mcasp1(struct snd_platform_data *pdata) | ||
| 889 | { | ||
| 890 | dm646x_mcasp1_device.dev.platform_data = pdata; | ||
| 891 | platform_device_register(&dm646x_mcasp1_device); | ||
| 892 | platform_device_register(&dm646x_dit_device); | ||
| 893 | } | ||
| 894 | |||
| 895 | void dm646x_setup_vpif(struct vpif_display_config *display_config, | ||
| 896 | struct vpif_capture_config *capture_config) | ||
| 897 | { | ||
| 898 | unsigned int value; | ||
| 899 | void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
| 900 | |||
| 901 | value = __raw_readl(base + VSCLKDIS_OFFSET); | ||
| 902 | value &= ~VSCLKDIS_MASK; | ||
| 903 | __raw_writel(value, base + VSCLKDIS_OFFSET); | ||
| 904 | |||
| 905 | value = __raw_readl(base + VDD3P3V_PWDN_OFFSET); | ||
| 906 | value &= ~VDD3P3V_VID_MASK; | ||
| 907 | __raw_writel(value, base + VDD3P3V_PWDN_OFFSET); | ||
| 908 | |||
| 909 | davinci_cfg_reg(DM646X_STSOMUX_DISABLE); | ||
| 910 | davinci_cfg_reg(DM646X_STSIMUX_DISABLE); | ||
| 911 | davinci_cfg_reg(DM646X_PTSOMUX_DISABLE); | ||
| 912 | davinci_cfg_reg(DM646X_PTSIMUX_DISABLE); | ||
| 913 | |||
| 914 | vpif_display_dev.dev.platform_data = display_config; | ||
| 915 | vpif_capture_dev.dev.platform_data = capture_config; | ||
| 916 | platform_device_register(&vpif_dev); | ||
| 917 | platform_device_register(&vpif_display_dev); | ||
| 918 | platform_device_register(&vpif_capture_dev); | ||
| 919 | } | ||
| 920 | |||
| 622 | void __init dm646x_init(void) | 921 | void __init dm646x_init(void) |
| 623 | { | 922 | { |
| 624 | davinci_common_init(&davinci_soc_info_dm646x); | 923 | davinci_common_init(&davinci_soc_info_dm646x); |
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c index 15e9eb158bb7..f2e57d272958 100644 --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c | |||
| @@ -100,132 +100,158 @@ | |||
| 100 | #define EDMA_SHADOW0 0x2000 /* 4 regions shadowing global channels */ | 100 | #define EDMA_SHADOW0 0x2000 /* 4 regions shadowing global channels */ |
| 101 | #define EDMA_PARM 0x4000 /* 128 param entries */ | 101 | #define EDMA_PARM 0x4000 /* 128 param entries */ |
| 102 | 102 | ||
| 103 | #define DAVINCI_DMA_3PCC_BASE 0x01C00000 | ||
| 104 | |||
| 105 | #define PARM_OFFSET(param_no) (EDMA_PARM + ((param_no) << 5)) | 103 | #define PARM_OFFSET(param_no) (EDMA_PARM + ((param_no) << 5)) |
| 106 | 104 | ||
| 105 | #define EDMA_DCHMAP 0x0100 /* 64 registers */ | ||
| 106 | #define CHMAP_EXIST BIT(24) | ||
| 107 | |||
| 107 | #define EDMA_MAX_DMACH 64 | 108 | #define EDMA_MAX_DMACH 64 |
| 108 | #define EDMA_MAX_PARAMENTRY 512 | 109 | #define EDMA_MAX_PARAMENTRY 512 |
| 109 | #define EDMA_MAX_EVQUE 2 /* FIXME too small */ | 110 | #define EDMA_MAX_CC 2 |
| 110 | 111 | ||
| 111 | 112 | ||
| 112 | /*****************************************************************************/ | 113 | /*****************************************************************************/ |
| 113 | 114 | ||
| 114 | static void __iomem *edmacc_regs_base; | 115 | static void __iomem *edmacc_regs_base[EDMA_MAX_CC]; |
| 115 | 116 | ||
| 116 | static inline unsigned int edma_read(int offset) | 117 | static inline unsigned int edma_read(unsigned ctlr, int offset) |
| 117 | { | 118 | { |
| 118 | return (unsigned int)__raw_readl(edmacc_regs_base + offset); | 119 | return (unsigned int)__raw_readl(edmacc_regs_base[ctlr] + offset); |
| 119 | } | 120 | } |
| 120 | 121 | ||
| 121 | static inline void edma_write(int offset, int val) | 122 | static inline void edma_write(unsigned ctlr, int offset, int val) |
| 122 | { | 123 | { |
| 123 | __raw_writel(val, edmacc_regs_base + offset); | 124 | __raw_writel(val, edmacc_regs_base[ctlr] + offset); |
| 124 | } | 125 | } |
| 125 | static inline void edma_modify(int offset, unsigned and, unsigned or) | 126 | static inline void edma_modify(unsigned ctlr, int offset, unsigned and, |
| 127 | unsigned or) | ||
| 126 | { | 128 | { |
| 127 | unsigned val = edma_read(offset); | 129 | unsigned val = edma_read(ctlr, offset); |
| 128 | val &= and; | 130 | val &= and; |
| 129 | val |= or; | 131 | val |= or; |
| 130 | edma_write(offset, val); | 132 | edma_write(ctlr, offset, val); |
| 131 | } | 133 | } |
| 132 | static inline void edma_and(int offset, unsigned and) | 134 | static inline void edma_and(unsigned ctlr, int offset, unsigned and) |
| 133 | { | 135 | { |
| 134 | unsigned val = edma_read(offset); | 136 | unsigned val = edma_read(ctlr, offset); |
| 135 | val &= and; | 137 | val &= and; |
| 136 | edma_write(offset, val); | 138 | edma_write(ctlr, offset, val); |
| 137 | } | 139 | } |
| 138 | static inline void edma_or(int offset, unsigned or) | 140 | static inline void edma_or(unsigned ctlr, int offset, unsigned or) |
| 139 | { | 141 | { |
| 140 | unsigned val = edma_read(offset); | 142 | unsigned val = edma_read(ctlr, offset); |
| 141 | val |= or; | 143 | val |= or; |
| 142 | edma_write(offset, val); | 144 | edma_write(ctlr, offset, val); |
| 143 | } | 145 | } |
| 144 | static inline unsigned int edma_read_array(int offset, int i) | 146 | static inline unsigned int edma_read_array(unsigned ctlr, int offset, int i) |
| 145 | { | 147 | { |
| 146 | return edma_read(offset + (i << 2)); | 148 | return edma_read(ctlr, offset + (i << 2)); |
| 147 | } | 149 | } |
| 148 | static inline void edma_write_array(int offset, int i, unsigned val) | 150 | static inline void edma_write_array(unsigned ctlr, int offset, int i, |
| 151 | unsigned val) | ||
| 149 | { | 152 | { |
| 150 | edma_write(offset + (i << 2), val); | 153 | edma_write(ctlr, offset + (i << 2), val); |
| 151 | } | 154 | } |
| 152 | static inline void edma_modify_array(int offset, int i, | 155 | static inline void edma_modify_array(unsigned ctlr, int offset, int i, |
| 153 | unsigned and, unsigned or) | 156 | unsigned and, unsigned or) |
| 154 | { | 157 | { |
| 155 | edma_modify(offset + (i << 2), and, or); | 158 | edma_modify(ctlr, offset + (i << 2), and, or); |
| 156 | } | 159 | } |
| 157 | static inline void edma_or_array(int offset, int i, unsigned or) | 160 | static inline void edma_or_array(unsigned ctlr, int offset, int i, unsigned or) |
| 158 | { | 161 | { |
| 159 | edma_or(offset + (i << 2), or); | 162 | edma_or(ctlr, offset + (i << 2), or); |
| 160 | } | 163 | } |
| 161 | static inline void edma_or_array2(int offset, int i, int j, unsigned or) | 164 | static inline void edma_or_array2(unsigned ctlr, int offset, int i, int j, |
| 165 | unsigned or) | ||
| 162 | { | 166 | { |
| 163 | edma_or(offset + ((i*2 + j) << 2), or); | 167 | edma_or(ctlr, offset + ((i*2 + j) << 2), or); |
| 164 | } | 168 | } |
| 165 | static inline void edma_write_array2(int offset, int i, int j, unsigned val) | 169 | static inline void edma_write_array2(unsigned ctlr, int offset, int i, int j, |
| 170 | unsigned val) | ||
| 166 | { | 171 | { |
| 167 | edma_write(offset + ((i*2 + j) << 2), val); | 172 | edma_write(ctlr, offset + ((i*2 + j) << 2), val); |
| 168 | } | 173 | } |
| 169 | static inline unsigned int edma_shadow0_read(int offset) | 174 | static inline unsigned int edma_shadow0_read(unsigned ctlr, int offset) |
| 170 | { | 175 | { |
| 171 | return edma_read(EDMA_SHADOW0 + offset); | 176 | return edma_read(ctlr, EDMA_SHADOW0 + offset); |
| 172 | } | 177 | } |
| 173 | static inline unsigned int edma_shadow0_read_array(int offset, int i) | 178 | static inline unsigned int edma_shadow0_read_array(unsigned ctlr, int offset, |
| 179 | int i) | ||
| 174 | { | 180 | { |
| 175 | return edma_read(EDMA_SHADOW0 + offset + (i << 2)); | 181 | return edma_read(ctlr, EDMA_SHADOW0 + offset + (i << 2)); |
| 176 | } | 182 | } |
| 177 | static inline void edma_shadow0_write(int offset, unsigned val) | 183 | static inline void edma_shadow0_write(unsigned ctlr, int offset, unsigned val) |
| 178 | { | 184 | { |
| 179 | edma_write(EDMA_SHADOW0 + offset, val); | 185 | edma_write(ctlr, EDMA_SHADOW0 + offset, val); |
| 180 | } | 186 | } |
| 181 | static inline void edma_shadow0_write_array(int offset, int i, unsigned val) | 187 | static inline void edma_shadow0_write_array(unsigned ctlr, int offset, int i, |
| 188 | unsigned val) | ||
| 182 | { | 189 | { |
| 183 | edma_write(EDMA_SHADOW0 + offset + (i << 2), val); | 190 | edma_write(ctlr, EDMA_SHADOW0 + offset + (i << 2), val); |
| 184 | } | 191 | } |
| 185 | static inline unsigned int edma_parm_read(int offset, int param_no) | 192 | static inline unsigned int edma_parm_read(unsigned ctlr, int offset, |
| 193 | int param_no) | ||
| 186 | { | 194 | { |
| 187 | return edma_read(EDMA_PARM + offset + (param_no << 5)); | 195 | return edma_read(ctlr, EDMA_PARM + offset + (param_no << 5)); |
| 188 | } | 196 | } |
| 189 | static inline void edma_parm_write(int offset, int param_no, unsigned val) | 197 | static inline void edma_parm_write(unsigned ctlr, int offset, int param_no, |
| 198 | unsigned val) | ||
| 190 | { | 199 | { |
| 191 | edma_write(EDMA_PARM + offset + (param_no << 5), val); | 200 | edma_write(ctlr, EDMA_PARM + offset + (param_no << 5), val); |
| 192 | } | 201 | } |
| 193 | static inline void edma_parm_modify(int offset, int param_no, | 202 | static inline void edma_parm_modify(unsigned ctlr, int offset, int param_no, |
| 194 | unsigned and, unsigned or) | 203 | unsigned and, unsigned or) |
| 195 | { | 204 | { |
| 196 | edma_modify(EDMA_PARM + offset + (param_no << 5), and, or); | 205 | edma_modify(ctlr, EDMA_PARM + offset + (param_no << 5), and, or); |
| 197 | } | 206 | } |
| 198 | static inline void edma_parm_and(int offset, int param_no, unsigned and) | 207 | static inline void edma_parm_and(unsigned ctlr, int offset, int param_no, |
| 208 | unsigned and) | ||
| 199 | { | 209 | { |
| 200 | edma_and(EDMA_PARM + offset + (param_no << 5), and); | 210 | edma_and(ctlr, EDMA_PARM + offset + (param_no << 5), and); |
| 201 | } | 211 | } |
| 202 | static inline void edma_parm_or(int offset, int param_no, unsigned or) | 212 | static inline void edma_parm_or(unsigned ctlr, int offset, int param_no, |
| 213 | unsigned or) | ||
| 203 | { | 214 | { |
| 204 | edma_or(EDMA_PARM + offset + (param_no << 5), or); | 215 | edma_or(ctlr, EDMA_PARM + offset + (param_no << 5), or); |
| 205 | } | 216 | } |
| 206 | 217 | ||
| 207 | /*****************************************************************************/ | 218 | /*****************************************************************************/ |
| 208 | 219 | ||
| 209 | /* actual number of DMA channels and slots on this silicon */ | 220 | /* actual number of DMA channels and slots on this silicon */ |
| 210 | static unsigned num_channels; | 221 | struct edma { |
| 211 | static unsigned num_slots; | 222 | /* how many dma resources of each type */ |
| 223 | unsigned num_channels; | ||
| 224 | unsigned num_region; | ||
| 225 | unsigned num_slots; | ||
| 226 | unsigned num_tc; | ||
| 227 | unsigned num_cc; | ||
| 228 | enum dma_event_q default_queue; | ||
| 229 | |||
| 230 | /* list of channels with no even trigger; terminated by "-1" */ | ||
| 231 | const s8 *noevent; | ||
| 232 | |||
| 233 | /* The edma_inuse bit for each PaRAM slot is clear unless the | ||
| 234 | * channel is in use ... by ARM or DSP, for QDMA, or whatever. | ||
| 235 | */ | ||
| 236 | DECLARE_BITMAP(edma_inuse, EDMA_MAX_PARAMENTRY); | ||
| 212 | 237 | ||
| 213 | static struct dma_interrupt_data { | 238 | /* The edma_noevent bit for each channel is clear unless |
| 214 | void (*callback)(unsigned channel, unsigned short ch_status, | 239 | * it doesn't trigger DMA events on this platform. It uses a |
| 215 | void *data); | 240 | * bit of SOC-specific initialization code. |
| 216 | void *data; | 241 | */ |
| 217 | } intr_data[EDMA_MAX_DMACH]; | 242 | DECLARE_BITMAP(edma_noevent, EDMA_MAX_DMACH); |
| 218 | 243 | ||
| 219 | /* The edma_inuse bit for each PaRAM slot is clear unless the | 244 | unsigned irq_res_start; |
| 220 | * channel is in use ... by ARM or DSP, for QDMA, or whatever. | 245 | unsigned irq_res_end; |
| 221 | */ | ||
| 222 | static DECLARE_BITMAP(edma_inuse, EDMA_MAX_PARAMENTRY); | ||
| 223 | 246 | ||
| 224 | /* The edma_noevent bit for each channel is clear unless | 247 | struct dma_interrupt_data { |
| 225 | * it doesn't trigger DMA events on this platform. It uses a | 248 | void (*callback)(unsigned channel, unsigned short ch_status, |
| 226 | * bit of SOC-specific initialization code. | 249 | void *data); |
| 227 | */ | 250 | void *data; |
| 228 | static DECLARE_BITMAP(edma_noevent, EDMA_MAX_DMACH); | 251 | } intr_data[EDMA_MAX_DMACH]; |
| 252 | }; | ||
| 253 | |||
| 254 | static struct edma *edma_info[EDMA_MAX_CC]; | ||
| 229 | 255 | ||
| 230 | /* dummy param set used to (re)initialize parameter RAM slots */ | 256 | /* dummy param set used to (re)initialize parameter RAM slots */ |
| 231 | static const struct edmacc_param dummy_paramset = { | 257 | static const struct edmacc_param dummy_paramset = { |
| @@ -233,47 +259,52 @@ static const struct edmacc_param dummy_paramset = { | |||
| 233 | .ccnt = 1, | 259 | .ccnt = 1, |
| 234 | }; | 260 | }; |
| 235 | 261 | ||
| 236 | static const int __initconst | ||
| 237 | queue_tc_mapping[EDMA_MAX_EVQUE + 1][2] = { | ||
| 238 | /* {event queue no, TC no} */ | ||
| 239 | {0, 0}, | ||
| 240 | {1, 1}, | ||
| 241 | {-1, -1} | ||
| 242 | }; | ||
| 243 | |||
| 244 | static const int __initconst | ||
| 245 | queue_priority_mapping[EDMA_MAX_EVQUE + 1][2] = { | ||
| 246 | /* {event queue no, Priority} */ | ||
| 247 | {0, 3}, | ||
| 248 | {1, 7}, | ||
| 249 | {-1, -1} | ||
| 250 | }; | ||
| 251 | |||
| 252 | /*****************************************************************************/ | 262 | /*****************************************************************************/ |
| 253 | 263 | ||
| 254 | static void map_dmach_queue(unsigned ch_no, enum dma_event_q queue_no) | 264 | static void map_dmach_queue(unsigned ctlr, unsigned ch_no, |
| 265 | enum dma_event_q queue_no) | ||
| 255 | { | 266 | { |
| 256 | int bit = (ch_no & 0x7) * 4; | 267 | int bit = (ch_no & 0x7) * 4; |
| 257 | 268 | ||
| 258 | /* default to low priority queue */ | 269 | /* default to low priority queue */ |
| 259 | if (queue_no == EVENTQ_DEFAULT) | 270 | if (queue_no == EVENTQ_DEFAULT) |
| 260 | queue_no = EVENTQ_1; | 271 | queue_no = edma_info[ctlr]->default_queue; |
| 261 | 272 | ||
| 262 | queue_no &= 7; | 273 | queue_no &= 7; |
| 263 | edma_modify_array(EDMA_DMAQNUM, (ch_no >> 3), | 274 | edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3), |
| 264 | ~(0x7 << bit), queue_no << bit); | 275 | ~(0x7 << bit), queue_no << bit); |
| 265 | } | 276 | } |
| 266 | 277 | ||
| 267 | static void __init map_queue_tc(int queue_no, int tc_no) | 278 | static void __init map_queue_tc(unsigned ctlr, int queue_no, int tc_no) |
| 268 | { | 279 | { |
| 269 | int bit = queue_no * 4; | 280 | int bit = queue_no * 4; |
| 270 | edma_modify(EDMA_QUETCMAP, ~(0x7 << bit), ((tc_no & 0x7) << bit)); | 281 | edma_modify(ctlr, EDMA_QUETCMAP, ~(0x7 << bit), ((tc_no & 0x7) << bit)); |
| 271 | } | 282 | } |
| 272 | 283 | ||
| 273 | static void __init assign_priority_to_queue(int queue_no, int priority) | 284 | static void __init assign_priority_to_queue(unsigned ctlr, int queue_no, |
| 285 | int priority) | ||
| 274 | { | 286 | { |
| 275 | int bit = queue_no * 4; | 287 | int bit = queue_no * 4; |
| 276 | edma_modify(EDMA_QUEPRI, ~(0x7 << bit), ((priority & 0x7) << bit)); | 288 | edma_modify(ctlr, EDMA_QUEPRI, ~(0x7 << bit), |
| 289 | ((priority & 0x7) << bit)); | ||
| 290 | } | ||
| 291 | |||
| 292 | /** | ||
| 293 | * map_dmach_param - Maps channel number to param entry number | ||
| 294 | * | ||
| 295 | * This maps the dma channel number to param entry numberter. In | ||
| 296 | * other words using the DMA channel mapping registers a param entry | ||
| 297 | * can be mapped to any channel | ||
| 298 | * | ||
| 299 | * Callers are responsible for ensuring the channel mapping logic is | ||
| 300 | * included in that particular EDMA variant (Eg : dm646x) | ||
| 301 | * | ||
| 302 | */ | ||
| 303 | static void __init map_dmach_param(unsigned ctlr) | ||
| 304 | { | ||
| 305 | int i; | ||
| 306 | for (i = 0; i < EDMA_MAX_DMACH; i++) | ||
| 307 | edma_write_array(ctlr, EDMA_DCHMAP , i , (i << 5)); | ||
| 277 | } | 308 | } |
| 278 | 309 | ||
| 279 | static inline void | 310 | static inline void |
| @@ -281,22 +312,39 @@ setup_dma_interrupt(unsigned lch, | |||
| 281 | void (*callback)(unsigned channel, u16 ch_status, void *data), | 312 | void (*callback)(unsigned channel, u16 ch_status, void *data), |
| 282 | void *data) | 313 | void *data) |
| 283 | { | 314 | { |
| 315 | unsigned ctlr; | ||
| 316 | |||
| 317 | ctlr = EDMA_CTLR(lch); | ||
| 318 | lch = EDMA_CHAN_SLOT(lch); | ||
| 319 | |||
| 284 | if (!callback) { | 320 | if (!callback) { |
| 285 | edma_shadow0_write_array(SH_IECR, lch >> 5, | 321 | edma_shadow0_write_array(ctlr, SH_IECR, lch >> 5, |
| 286 | (1 << (lch & 0x1f))); | 322 | (1 << (lch & 0x1f))); |
| 287 | } | 323 | } |
| 288 | 324 | ||
| 289 | intr_data[lch].callback = callback; | 325 | edma_info[ctlr]->intr_data[lch].callback = callback; |
| 290 | intr_data[lch].data = data; | 326 | edma_info[ctlr]->intr_data[lch].data = data; |
| 291 | 327 | ||
| 292 | if (callback) { | 328 | if (callback) { |
| 293 | edma_shadow0_write_array(SH_ICR, lch >> 5, | 329 | edma_shadow0_write_array(ctlr, SH_ICR, lch >> 5, |
| 294 | (1 << (lch & 0x1f))); | 330 | (1 << (lch & 0x1f))); |
| 295 | edma_shadow0_write_array(SH_IESR, lch >> 5, | 331 | edma_shadow0_write_array(ctlr, SH_IESR, lch >> 5, |
| 296 | (1 << (lch & 0x1f))); | 332 | (1 << (lch & 0x1f))); |
| 297 | } | 333 | } |
| 298 | } | 334 | } |
| 299 | 335 | ||
| 336 | static int irq2ctlr(int irq) | ||
| 337 | { | ||
| 338 | if (irq >= edma_info[0]->irq_res_start && | ||
| 339 | irq <= edma_info[0]->irq_res_end) | ||
| 340 | return 0; | ||
| 341 | else if (irq >= edma_info[1]->irq_res_start && | ||
| 342 | irq <= edma_info[1]->irq_res_end) | ||
| 343 | return 1; | ||
| 344 | |||
| 345 | return -1; | ||
| 346 | } | ||
| 347 | |||
| 300 | /****************************************************************************** | 348 | /****************************************************************************** |
| 301 | * | 349 | * |
| 302 | * DMA interrupt handler | 350 | * DMA interrupt handler |
| @@ -305,32 +353,39 @@ setup_dma_interrupt(unsigned lch, | |||
| 305 | static irqreturn_t dma_irq_handler(int irq, void *data) | 353 | static irqreturn_t dma_irq_handler(int irq, void *data) |
| 306 | { | 354 | { |
| 307 | int i; | 355 | int i; |
| 356 | unsigned ctlr; | ||
| 308 | unsigned int cnt = 0; | 357 | unsigned int cnt = 0; |
| 309 | 358 | ||
| 359 | ctlr = irq2ctlr(irq); | ||
| 360 | |||
| 310 | dev_dbg(data, "dma_irq_handler\n"); | 361 | dev_dbg(data, "dma_irq_handler\n"); |
| 311 | 362 | ||
| 312 | if ((edma_shadow0_read_array(SH_IPR, 0) == 0) | 363 | if ((edma_shadow0_read_array(ctlr, SH_IPR, 0) == 0) |
| 313 | && (edma_shadow0_read_array(SH_IPR, 1) == 0)) | 364 | && (edma_shadow0_read_array(ctlr, SH_IPR, 1) == 0)) |
| 314 | return IRQ_NONE; | 365 | return IRQ_NONE; |
| 315 | 366 | ||
| 316 | while (1) { | 367 | while (1) { |
| 317 | int j; | 368 | int j; |
| 318 | if (edma_shadow0_read_array(SH_IPR, 0)) | 369 | if (edma_shadow0_read_array(ctlr, SH_IPR, 0)) |
| 319 | j = 0; | 370 | j = 0; |
| 320 | else if (edma_shadow0_read_array(SH_IPR, 1)) | 371 | else if (edma_shadow0_read_array(ctlr, SH_IPR, 1)) |
| 321 | j = 1; | 372 | j = 1; |
| 322 | else | 373 | else |
| 323 | break; | 374 | break; |
| 324 | dev_dbg(data, "IPR%d %08x\n", j, | 375 | dev_dbg(data, "IPR%d %08x\n", j, |
| 325 | edma_shadow0_read_array(SH_IPR, j)); | 376 | edma_shadow0_read_array(ctlr, SH_IPR, j)); |
| 326 | for (i = 0; i < 32; i++) { | 377 | for (i = 0; i < 32; i++) { |
| 327 | int k = (j << 5) + i; | 378 | int k = (j << 5) + i; |
| 328 | if (edma_shadow0_read_array(SH_IPR, j) & (1 << i)) { | 379 | if (edma_shadow0_read_array(ctlr, SH_IPR, j) & |
| 380 | (1 << i)) { | ||
| 329 | /* Clear the corresponding IPR bits */ | 381 | /* Clear the corresponding IPR bits */ |
| 330 | edma_shadow0_write_array(SH_ICR, j, (1 << i)); | 382 | edma_shadow0_write_array(ctlr, SH_ICR, j, |
| 331 | if (intr_data[k].callback) { | 383 | (1 << i)); |
| 332 | intr_data[k].callback(k, DMA_COMPLETE, | 384 | if (edma_info[ctlr]->intr_data[k].callback) { |
| 333 | intr_data[k].data); | 385 | edma_info[ctlr]->intr_data[k].callback( |
| 386 | k, DMA_COMPLETE, | ||
| 387 | edma_info[ctlr]->intr_data[k]. | ||
| 388 | data); | ||
| 334 | } | 389 | } |
| 335 | } | 390 | } |
| 336 | } | 391 | } |
| @@ -338,7 +393,7 @@ static irqreturn_t dma_irq_handler(int irq, void *data) | |||
| 338 | if (cnt > 10) | 393 | if (cnt > 10) |
| 339 | break; | 394 | break; |
| 340 | } | 395 | } |
| 341 | edma_shadow0_write(SH_IEVAL, 1); | 396 | edma_shadow0_write(ctlr, SH_IEVAL, 1); |
| 342 | return IRQ_HANDLED; | 397 | return IRQ_HANDLED; |
| 343 | } | 398 | } |
| 344 | 399 | ||
| @@ -350,78 +405,87 @@ static irqreturn_t dma_irq_handler(int irq, void *data) | |||
| 350 | static irqreturn_t dma_ccerr_handler(int irq, void *data) | 405 | static irqreturn_t dma_ccerr_handler(int irq, void *data) |
| 351 | { | 406 | { |
| 352 | int i; | 407 | int i; |
| 408 | unsigned ctlr; | ||
| 353 | unsigned int cnt = 0; | 409 | unsigned int cnt = 0; |
| 354 | 410 | ||
| 411 | ctlr = irq2ctlr(irq); | ||
| 412 | |||
| 355 | dev_dbg(data, "dma_ccerr_handler\n"); | 413 | dev_dbg(data, "dma_ccerr_handler\n"); |
| 356 | 414 | ||
| 357 | if ((edma_read_array(EDMA_EMR, 0) == 0) && | 415 | if ((edma_read_array(ctlr, EDMA_EMR, 0) == 0) && |
| 358 | (edma_read_array(EDMA_EMR, 1) == 0) && | 416 | (edma_read_array(ctlr, EDMA_EMR, 1) == 0) && |
| 359 | (edma_read(EDMA_QEMR) == 0) && (edma_read(EDMA_CCERR) == 0)) | 417 | (edma_read(ctlr, EDMA_QEMR) == 0) && |
| 418 | (edma_read(ctlr, EDMA_CCERR) == 0)) | ||
| 360 | return IRQ_NONE; | 419 | return IRQ_NONE; |
| 361 | 420 | ||
| 362 | while (1) { | 421 | while (1) { |
| 363 | int j = -1; | 422 | int j = -1; |
| 364 | if (edma_read_array(EDMA_EMR, 0)) | 423 | if (edma_read_array(ctlr, EDMA_EMR, 0)) |
| 365 | j = 0; | 424 | j = 0; |
| 366 | else if (edma_read_array(EDMA_EMR, 1)) | 425 | else if (edma_read_array(ctlr, EDMA_EMR, 1)) |
| 367 | j = 1; | 426 | j = 1; |
| 368 | if (j >= 0) { | 427 | if (j >= 0) { |
| 369 | dev_dbg(data, "EMR%d %08x\n", j, | 428 | dev_dbg(data, "EMR%d %08x\n", j, |
| 370 | edma_read_array(EDMA_EMR, j)); | 429 | edma_read_array(ctlr, EDMA_EMR, j)); |
| 371 | for (i = 0; i < 32; i++) { | 430 | for (i = 0; i < 32; i++) { |
| 372 | int k = (j << 5) + i; | 431 | int k = (j << 5) + i; |
| 373 | if (edma_read_array(EDMA_EMR, j) & (1 << i)) { | 432 | if (edma_read_array(ctlr, EDMA_EMR, j) & |
| 433 | (1 << i)) { | ||
| 374 | /* Clear the corresponding EMR bits */ | 434 | /* Clear the corresponding EMR bits */ |
| 375 | edma_write_array(EDMA_EMCR, j, 1 << i); | 435 | edma_write_array(ctlr, EDMA_EMCR, j, |
| 436 | 1 << i); | ||
| 376 | /* Clear any SER */ | 437 | /* Clear any SER */ |
| 377 | edma_shadow0_write_array(SH_SECR, j, | 438 | edma_shadow0_write_array(ctlr, SH_SECR, |
| 378 | (1 << i)); | 439 | j, (1 << i)); |
| 379 | if (intr_data[k].callback) { | 440 | if (edma_info[ctlr]->intr_data[k]. |
| 380 | intr_data[k].callback(k, | 441 | callback) { |
| 381 | DMA_CC_ERROR, | 442 | edma_info[ctlr]->intr_data[k]. |
| 382 | intr_data | 443 | callback(k, |
| 383 | [k].data); | 444 | DMA_CC_ERROR, |
| 445 | edma_info[ctlr]->intr_data | ||
| 446 | [k].data); | ||
| 384 | } | 447 | } |
| 385 | } | 448 | } |
| 386 | } | 449 | } |
| 387 | } else if (edma_read(EDMA_QEMR)) { | 450 | } else if (edma_read(ctlr, EDMA_QEMR)) { |
| 388 | dev_dbg(data, "QEMR %02x\n", | 451 | dev_dbg(data, "QEMR %02x\n", |
| 389 | edma_read(EDMA_QEMR)); | 452 | edma_read(ctlr, EDMA_QEMR)); |
| 390 | for (i = 0; i < 8; i++) { | 453 | for (i = 0; i < 8; i++) { |
| 391 | if (edma_read(EDMA_QEMR) & (1 << i)) { | 454 | if (edma_read(ctlr, EDMA_QEMR) & (1 << i)) { |
| 392 | /* Clear the corresponding IPR bits */ | 455 | /* Clear the corresponding IPR bits */ |
| 393 | edma_write(EDMA_QEMCR, 1 << i); | 456 | edma_write(ctlr, EDMA_QEMCR, 1 << i); |
| 394 | edma_shadow0_write(SH_QSECR, (1 << i)); | 457 | edma_shadow0_write(ctlr, SH_QSECR, |
| 458 | (1 << i)); | ||
| 395 | 459 | ||
| 396 | /* NOTE: not reported!! */ | 460 | /* NOTE: not reported!! */ |
| 397 | } | 461 | } |
| 398 | } | 462 | } |
| 399 | } else if (edma_read(EDMA_CCERR)) { | 463 | } else if (edma_read(ctlr, EDMA_CCERR)) { |
| 400 | dev_dbg(data, "CCERR %08x\n", | 464 | dev_dbg(data, "CCERR %08x\n", |
| 401 | edma_read(EDMA_CCERR)); | 465 | edma_read(ctlr, EDMA_CCERR)); |
| 402 | /* FIXME: CCERR.BIT(16) ignored! much better | 466 | /* FIXME: CCERR.BIT(16) ignored! much better |
| 403 | * to just write CCERRCLR with CCERR value... | 467 | * to just write CCERRCLR with CCERR value... |
| 404 | */ | 468 | */ |
| 405 | for (i = 0; i < 8; i++) { | 469 | for (i = 0; i < 8; i++) { |
| 406 | if (edma_read(EDMA_CCERR) & (1 << i)) { | 470 | if (edma_read(ctlr, EDMA_CCERR) & (1 << i)) { |
| 407 | /* Clear the corresponding IPR bits */ | 471 | /* Clear the corresponding IPR bits */ |
| 408 | edma_write(EDMA_CCERRCLR, 1 << i); | 472 | edma_write(ctlr, EDMA_CCERRCLR, 1 << i); |
| 409 | 473 | ||
| 410 | /* NOTE: not reported!! */ | 474 | /* NOTE: not reported!! */ |
| 411 | } | 475 | } |
| 412 | } | 476 | } |
| 413 | } | 477 | } |
| 414 | if ((edma_read_array(EDMA_EMR, 0) == 0) | 478 | if ((edma_read_array(ctlr, EDMA_EMR, 0) == 0) |
| 415 | && (edma_read_array(EDMA_EMR, 1) == 0) | 479 | && (edma_read_array(ctlr, EDMA_EMR, 1) == 0) |
| 416 | && (edma_read(EDMA_QEMR) == 0) | 480 | && (edma_read(ctlr, EDMA_QEMR) == 0) |
| 417 | && (edma_read(EDMA_CCERR) == 0)) { | 481 | && (edma_read(ctlr, EDMA_CCERR) == 0)) { |
| 418 | break; | 482 | break; |
| 419 | } | 483 | } |
| 420 | cnt++; | 484 | cnt++; |
| 421 | if (cnt > 10) | 485 | if (cnt > 10) |
| 422 | break; | 486 | break; |
| 423 | } | 487 | } |
| 424 | edma_write(EDMA_EEVAL, 1); | 488 | edma_write(ctlr, EDMA_EEVAL, 1); |
| 425 | return IRQ_HANDLED; | 489 | return IRQ_HANDLED; |
| 426 | } | 490 | } |
| 427 | 491 | ||
| @@ -445,6 +509,45 @@ static irqreturn_t dma_tc1err_handler(int irq, void *data) | |||
| 445 | return IRQ_HANDLED; | 509 | return IRQ_HANDLED; |
| 446 | } | 510 | } |
| 447 | 511 | ||
| 512 | static int reserve_contiguous_params(int ctlr, unsigned int id, | ||
| 513 | unsigned int num_params, | ||
| 514 | unsigned int start_param) | ||
| 515 | { | ||
| 516 | int i, j; | ||
| 517 | unsigned int count = num_params; | ||
| 518 | |||
| 519 | for (i = start_param; i < edma_info[ctlr]->num_slots; ++i) { | ||
| 520 | j = EDMA_CHAN_SLOT(i); | ||
| 521 | if (!test_and_set_bit(j, edma_info[ctlr]->edma_inuse)) | ||
| 522 | count--; | ||
| 523 | if (count == 0) | ||
| 524 | break; | ||
| 525 | else if (id == EDMA_CONT_PARAMS_FIXED_EXACT) | ||
| 526 | break; | ||
| 527 | else | ||
| 528 | count = num_params; | ||
| 529 | } | ||
| 530 | |||
| 531 | /* | ||
| 532 | * We have to clear any bits that we set | ||
| 533 | * if we run out parameter RAMs, i.e we do find a set | ||
| 534 | * of contiguous parameter RAMs but do not find the exact number | ||
| 535 | * requested as we may reach the total number of parameter RAMs | ||
| 536 | */ | ||
| 537 | if (count) { | ||
| 538 | for (j = i - num_params + count + 1; j <= i ; ++j) | ||
| 539 | clear_bit(j, edma_info[ctlr]->edma_inuse); | ||
| 540 | |||
| 541 | return -EBUSY; | ||
| 542 | } | ||
| 543 | |||
| 544 | for (j = i - num_params + 1; j <= i; ++j) | ||
| 545 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(j), | ||
| 546 | &dummy_paramset, PARM_SIZE); | ||
| 547 | |||
| 548 | return EDMA_CTLR_CHAN(ctlr, i - num_params + 1); | ||
| 549 | } | ||
| 550 | |||
| 448 | /*-----------------------------------------------------------------------*/ | 551 | /*-----------------------------------------------------------------------*/ |
| 449 | 552 | ||
| 450 | /* Resource alloc/free: dma channels, parameter RAM slots */ | 553 | /* Resource alloc/free: dma channels, parameter RAM slots */ |
| @@ -484,35 +587,53 @@ int edma_alloc_channel(int channel, | |||
| 484 | void *data, | 587 | void *data, |
| 485 | enum dma_event_q eventq_no) | 588 | enum dma_event_q eventq_no) |
| 486 | { | 589 | { |
| 590 | unsigned i, done, ctlr = 0; | ||
| 591 | |||
| 592 | if (channel >= 0) { | ||
| 593 | ctlr = EDMA_CTLR(channel); | ||
| 594 | channel = EDMA_CHAN_SLOT(channel); | ||
| 595 | } | ||
| 596 | |||
| 487 | if (channel < 0) { | 597 | if (channel < 0) { |
| 488 | channel = 0; | 598 | for (i = 0; i < EDMA_MAX_CC; i++) { |
| 489 | for (;;) { | 599 | channel = 0; |
| 490 | channel = find_next_bit(edma_noevent, | 600 | for (;;) { |
| 491 | num_channels, channel); | 601 | channel = find_next_bit(edma_info[i]-> |
| 492 | if (channel == num_channels) | 602 | edma_noevent, |
| 493 | return -ENOMEM; | 603 | edma_info[i]->num_channels, |
| 494 | if (!test_and_set_bit(channel, edma_inuse)) | 604 | channel); |
| 605 | if (channel == edma_info[i]->num_channels) | ||
| 606 | return -ENOMEM; | ||
| 607 | if (!test_and_set_bit(channel, | ||
| 608 | edma_info[i]->edma_inuse)) { | ||
| 609 | done = 1; | ||
| 610 | ctlr = i; | ||
| 611 | break; | ||
| 612 | } | ||
| 613 | channel++; | ||
| 614 | } | ||
| 615 | if (done) | ||
| 495 | break; | 616 | break; |
| 496 | channel++; | ||
| 497 | } | 617 | } |
| 498 | } else if (channel >= num_channels) { | 618 | } else if (channel >= edma_info[ctlr]->num_channels) { |
| 499 | return -EINVAL; | 619 | return -EINVAL; |
| 500 | } else if (test_and_set_bit(channel, edma_inuse)) { | 620 | } else if (test_and_set_bit(channel, edma_info[ctlr]->edma_inuse)) { |
| 501 | return -EBUSY; | 621 | return -EBUSY; |
| 502 | } | 622 | } |
| 503 | 623 | ||
| 504 | /* ensure access through shadow region 0 */ | 624 | /* ensure access through shadow region 0 */ |
| 505 | edma_or_array2(EDMA_DRAE, 0, channel >> 5, 1 << (channel & 0x1f)); | 625 | edma_or_array2(ctlr, EDMA_DRAE, 0, channel >> 5, 1 << (channel & 0x1f)); |
| 506 | 626 | ||
| 507 | /* ensure no events are pending */ | 627 | /* ensure no events are pending */ |
| 508 | edma_stop(channel); | 628 | edma_stop(EDMA_CTLR_CHAN(ctlr, channel)); |
| 509 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(channel), | 629 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(channel), |
| 510 | &dummy_paramset, PARM_SIZE); | 630 | &dummy_paramset, PARM_SIZE); |
| 511 | 631 | ||
| 512 | if (callback) | 632 | if (callback) |
| 513 | setup_dma_interrupt(channel, callback, data); | 633 | setup_dma_interrupt(EDMA_CTLR_CHAN(ctlr, channel), |
| 634 | callback, data); | ||
| 514 | 635 | ||
| 515 | map_dmach_queue(channel, eventq_no); | 636 | map_dmach_queue(ctlr, channel, eventq_no); |
| 516 | 637 | ||
| 517 | return channel; | 638 | return channel; |
| 518 | } | 639 | } |
| @@ -532,15 +653,20 @@ EXPORT_SYMBOL(edma_alloc_channel); | |||
| 532 | */ | 653 | */ |
| 533 | void edma_free_channel(unsigned channel) | 654 | void edma_free_channel(unsigned channel) |
| 534 | { | 655 | { |
| 535 | if (channel >= num_channels) | 656 | unsigned ctlr; |
| 657 | |||
| 658 | ctlr = EDMA_CTLR(channel); | ||
| 659 | channel = EDMA_CHAN_SLOT(channel); | ||
| 660 | |||
| 661 | if (channel >= edma_info[ctlr]->num_channels) | ||
| 536 | return; | 662 | return; |
| 537 | 663 | ||
| 538 | setup_dma_interrupt(channel, NULL, NULL); | 664 | setup_dma_interrupt(channel, NULL, NULL); |
| 539 | /* REVISIT should probably take out of shadow region 0 */ | 665 | /* REVISIT should probably take out of shadow region 0 */ |
| 540 | 666 | ||
| 541 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(channel), | 667 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(channel), |
| 542 | &dummy_paramset, PARM_SIZE); | 668 | &dummy_paramset, PARM_SIZE); |
| 543 | clear_bit(channel, edma_inuse); | 669 | clear_bit(channel, edma_info[ctlr]->edma_inuse); |
| 544 | } | 670 | } |
| 545 | EXPORT_SYMBOL(edma_free_channel); | 671 | EXPORT_SYMBOL(edma_free_channel); |
| 546 | 672 | ||
| @@ -558,28 +684,33 @@ EXPORT_SYMBOL(edma_free_channel); | |||
| 558 | * | 684 | * |
| 559 | * Returns the number of the slot, else negative errno. | 685 | * Returns the number of the slot, else negative errno. |
| 560 | */ | 686 | */ |
| 561 | int edma_alloc_slot(int slot) | 687 | int edma_alloc_slot(unsigned ctlr, int slot) |
| 562 | { | 688 | { |
| 689 | if (slot >= 0) | ||
| 690 | slot = EDMA_CHAN_SLOT(slot); | ||
| 691 | |||
| 563 | if (slot < 0) { | 692 | if (slot < 0) { |
| 564 | slot = num_channels; | 693 | slot = edma_info[ctlr]->num_channels; |
| 565 | for (;;) { | 694 | for (;;) { |
| 566 | slot = find_next_zero_bit(edma_inuse, | 695 | slot = find_next_zero_bit(edma_info[ctlr]->edma_inuse, |
| 567 | num_slots, slot); | 696 | edma_info[ctlr]->num_slots, slot); |
| 568 | if (slot == num_slots) | 697 | if (slot == edma_info[ctlr]->num_slots) |
| 569 | return -ENOMEM; | 698 | return -ENOMEM; |
| 570 | if (!test_and_set_bit(slot, edma_inuse)) | 699 | if (!test_and_set_bit(slot, |
| 700 | edma_info[ctlr]->edma_inuse)) | ||
| 571 | break; | 701 | break; |
| 572 | } | 702 | } |
| 573 | } else if (slot < num_channels || slot >= num_slots) { | 703 | } else if (slot < edma_info[ctlr]->num_channels || |
| 704 | slot >= edma_info[ctlr]->num_slots) { | ||
| 574 | return -EINVAL; | 705 | return -EINVAL; |
| 575 | } else if (test_and_set_bit(slot, edma_inuse)) { | 706 | } else if (test_and_set_bit(slot, edma_info[ctlr]->edma_inuse)) { |
| 576 | return -EBUSY; | 707 | return -EBUSY; |
| 577 | } | 708 | } |
| 578 | 709 | ||
| 579 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), | 710 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), |
| 580 | &dummy_paramset, PARM_SIZE); | 711 | &dummy_paramset, PARM_SIZE); |
| 581 | 712 | ||
| 582 | return slot; | 713 | return EDMA_CTLR_CHAN(ctlr, slot); |
| 583 | } | 714 | } |
| 584 | EXPORT_SYMBOL(edma_alloc_slot); | 715 | EXPORT_SYMBOL(edma_alloc_slot); |
| 585 | 716 | ||
| @@ -593,15 +724,119 @@ EXPORT_SYMBOL(edma_alloc_slot); | |||
| 593 | */ | 724 | */ |
| 594 | void edma_free_slot(unsigned slot) | 725 | void edma_free_slot(unsigned slot) |
| 595 | { | 726 | { |
| 596 | if (slot < num_channels || slot >= num_slots) | 727 | unsigned ctlr; |
| 728 | |||
| 729 | ctlr = EDMA_CTLR(slot); | ||
| 730 | slot = EDMA_CHAN_SLOT(slot); | ||
| 731 | |||
| 732 | if (slot < edma_info[ctlr]->num_channels || | ||
| 733 | slot >= edma_info[ctlr]->num_slots) | ||
| 597 | return; | 734 | return; |
| 598 | 735 | ||
| 599 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), | 736 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), |
| 600 | &dummy_paramset, PARM_SIZE); | 737 | &dummy_paramset, PARM_SIZE); |
| 601 | clear_bit(slot, edma_inuse); | 738 | clear_bit(slot, edma_info[ctlr]->edma_inuse); |
| 602 | } | 739 | } |
| 603 | EXPORT_SYMBOL(edma_free_slot); | 740 | EXPORT_SYMBOL(edma_free_slot); |
| 604 | 741 | ||
| 742 | |||
| 743 | /** | ||
| 744 | * edma_alloc_cont_slots- alloc contiguous parameter RAM slots | ||
| 745 | * The API will return the starting point of a set of | ||
| 746 | * contiguous PARAM's that have been requested | ||
| 747 | * | ||
| 748 | * @id: can only be EDMA_CONT_PARAMS_ANY or EDMA_CONT_PARAMS_FIXED_EXACT | ||
| 749 | * or EDMA_CONT_PARAMS_FIXED_NOT_EXACT | ||
| 750 | * @count: number of contiguous Paramter RAM's | ||
| 751 | * @param - the start value of Parameter RAM that should be passed if id | ||
| 752 | * is EDMA_CONT_PARAMS_FIXED_EXACT or EDMA_CONT_PARAMS_FIXED_NOT_EXACT | ||
| 753 | * | ||
| 754 | * If id is EDMA_CONT_PARAMS_ANY then the API starts looking for a set of | ||
| 755 | * contiguous Parameter RAMs from parameter RAM 64 in the case of DaVinci SOCs | ||
| 756 | * and 32 in the case of Primus | ||
| 757 | * | ||
| 758 | * If id is EDMA_CONT_PARAMS_FIXED_EXACT then the API starts looking for a | ||
| 759 | * set of contiguous parameter RAMs from the "param" that is passed as an | ||
| 760 | * argument to the API. | ||
| 761 | * | ||
| 762 | * If id is EDMA_CONT_PARAMS_FIXED_NOT_EXACT then the API initially tries | ||
| 763 | * starts looking for a set of contiguous parameter RAMs from the "param" | ||
| 764 | * that is passed as an argument to the API. On failure the API will try to | ||
| 765 | * find a set of contiguous Parameter RAMs in the remaining Parameter RAMs | ||
| 766 | */ | ||
| 767 | int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count) | ||
| 768 | { | ||
| 769 | /* | ||
| 770 | * The start slot requested should be greater than | ||
| 771 | * the number of channels and lesser than the total number | ||
| 772 | * of slots | ||
| 773 | */ | ||
| 774 | if (slot < edma_info[ctlr]->num_channels || | ||
| 775 | slot >= edma_info[ctlr]->num_slots) | ||
| 776 | return -EINVAL; | ||
| 777 | |||
| 778 | /* | ||
| 779 | * The number of parameter RAMs requested cannot be less than 1 | ||
| 780 | * and cannot be more than the number of slots minus the number of | ||
| 781 | * channels | ||
| 782 | */ | ||
| 783 | if (count < 1 || count > | ||
| 784 | (edma_info[ctlr]->num_slots - edma_info[ctlr]->num_channels)) | ||
| 785 | return -EINVAL; | ||
| 786 | |||
| 787 | switch (id) { | ||
| 788 | case EDMA_CONT_PARAMS_ANY: | ||
| 789 | return reserve_contiguous_params(ctlr, id, count, | ||
| 790 | edma_info[ctlr]->num_channels); | ||
| 791 | case EDMA_CONT_PARAMS_FIXED_EXACT: | ||
| 792 | case EDMA_CONT_PARAMS_FIXED_NOT_EXACT: | ||
| 793 | return reserve_contiguous_params(ctlr, id, count, slot); | ||
| 794 | default: | ||
| 795 | return -EINVAL; | ||
| 796 | } | ||
| 797 | |||
| 798 | } | ||
| 799 | EXPORT_SYMBOL(edma_alloc_cont_slots); | ||
| 800 | |||
| 801 | /** | ||
| 802 | * edma_free_cont_slots - deallocate DMA parameter RAMs | ||
| 803 | * @slot: first parameter RAM of a set of parameter RAMs to be freed | ||
| 804 | * @count: the number of contiguous parameter RAMs to be freed | ||
| 805 | * | ||
| 806 | * This deallocates the parameter RAM slots allocated by | ||
| 807 | * edma_alloc_cont_slots. | ||
| 808 | * Callers/applications need to keep track of sets of contiguous | ||
| 809 | * parameter RAMs that have been allocated using the edma_alloc_cont_slots | ||
| 810 | * API. | ||
| 811 | * Callers are responsible for ensuring the slots are inactive, and will | ||
| 812 | * not be activated. | ||
| 813 | */ | ||
| 814 | int edma_free_cont_slots(unsigned slot, int count) | ||
| 815 | { | ||
| 816 | unsigned ctlr; | ||
| 817 | int i; | ||
| 818 | |||
| 819 | ctlr = EDMA_CTLR(slot); | ||
| 820 | slot = EDMA_CHAN_SLOT(slot); | ||
| 821 | |||
| 822 | if (slot < edma_info[ctlr]->num_channels || | ||
| 823 | slot >= edma_info[ctlr]->num_slots || | ||
| 824 | count < 1) | ||
| 825 | return -EINVAL; | ||
| 826 | |||
| 827 | for (i = slot; i < slot + count; ++i) { | ||
| 828 | ctlr = EDMA_CTLR(i); | ||
| 829 | slot = EDMA_CHAN_SLOT(i); | ||
| 830 | |||
| 831 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), | ||
| 832 | &dummy_paramset, PARM_SIZE); | ||
| 833 | clear_bit(slot, edma_info[ctlr]->edma_inuse); | ||
| 834 | } | ||
| 835 | |||
| 836 | return 0; | ||
| 837 | } | ||
| 838 | EXPORT_SYMBOL(edma_free_cont_slots); | ||
| 839 | |||
| 605 | /*-----------------------------------------------------------------------*/ | 840 | /*-----------------------------------------------------------------------*/ |
| 606 | 841 | ||
| 607 | /* Parameter RAM operations (i) -- read/write partial slots */ | 842 | /* Parameter RAM operations (i) -- read/write partial slots */ |
| @@ -620,8 +855,13 @@ EXPORT_SYMBOL(edma_free_slot); | |||
| 620 | void edma_set_src(unsigned slot, dma_addr_t src_port, | 855 | void edma_set_src(unsigned slot, dma_addr_t src_port, |
| 621 | enum address_mode mode, enum fifo_width width) | 856 | enum address_mode mode, enum fifo_width width) |
| 622 | { | 857 | { |
| 623 | if (slot < num_slots) { | 858 | unsigned ctlr; |
| 624 | unsigned int i = edma_parm_read(PARM_OPT, slot); | 859 | |
| 860 | ctlr = EDMA_CTLR(slot); | ||
| 861 | slot = EDMA_CHAN_SLOT(slot); | ||
| 862 | |||
| 863 | if (slot < edma_info[ctlr]->num_slots) { | ||
| 864 | unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot); | ||
| 625 | 865 | ||
| 626 | if (mode) { | 866 | if (mode) { |
| 627 | /* set SAM and program FWID */ | 867 | /* set SAM and program FWID */ |
| @@ -630,11 +870,11 @@ void edma_set_src(unsigned slot, dma_addr_t src_port, | |||
| 630 | /* clear SAM */ | 870 | /* clear SAM */ |
| 631 | i &= ~SAM; | 871 | i &= ~SAM; |
| 632 | } | 872 | } |
| 633 | edma_parm_write(PARM_OPT, slot, i); | 873 | edma_parm_write(ctlr, PARM_OPT, slot, i); |
| 634 | 874 | ||
| 635 | /* set the source port address | 875 | /* set the source port address |
| 636 | in source register of param structure */ | 876 | in source register of param structure */ |
| 637 | edma_parm_write(PARM_SRC, slot, src_port); | 877 | edma_parm_write(ctlr, PARM_SRC, slot, src_port); |
| 638 | } | 878 | } |
| 639 | } | 879 | } |
| 640 | EXPORT_SYMBOL(edma_set_src); | 880 | EXPORT_SYMBOL(edma_set_src); |
| @@ -653,8 +893,13 @@ EXPORT_SYMBOL(edma_set_src); | |||
| 653 | void edma_set_dest(unsigned slot, dma_addr_t dest_port, | 893 | void edma_set_dest(unsigned slot, dma_addr_t dest_port, |
| 654 | enum address_mode mode, enum fifo_width width) | 894 | enum address_mode mode, enum fifo_width width) |
| 655 | { | 895 | { |
| 656 | if (slot < num_slots) { | 896 | unsigned ctlr; |
| 657 | unsigned int i = edma_parm_read(PARM_OPT, slot); | 897 | |
| 898 | ctlr = EDMA_CTLR(slot); | ||
| 899 | slot = EDMA_CHAN_SLOT(slot); | ||
| 900 | |||
| 901 | if (slot < edma_info[ctlr]->num_slots) { | ||
| 902 | unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot); | ||
| 658 | 903 | ||
| 659 | if (mode) { | 904 | if (mode) { |
| 660 | /* set DAM and program FWID */ | 905 | /* set DAM and program FWID */ |
| @@ -663,10 +908,10 @@ void edma_set_dest(unsigned slot, dma_addr_t dest_port, | |||
| 663 | /* clear DAM */ | 908 | /* clear DAM */ |
| 664 | i &= ~DAM; | 909 | i &= ~DAM; |
| 665 | } | 910 | } |
| 666 | edma_parm_write(PARM_OPT, slot, i); | 911 | edma_parm_write(ctlr, PARM_OPT, slot, i); |
| 667 | /* set the destination port address | 912 | /* set the destination port address |
| 668 | in dest register of param structure */ | 913 | in dest register of param structure */ |
| 669 | edma_parm_write(PARM_DST, slot, dest_port); | 914 | edma_parm_write(ctlr, PARM_DST, slot, dest_port); |
| 670 | } | 915 | } |
| 671 | } | 916 | } |
| 672 | EXPORT_SYMBOL(edma_set_dest); | 917 | EXPORT_SYMBOL(edma_set_dest); |
| @@ -683,8 +928,12 @@ EXPORT_SYMBOL(edma_set_dest); | |||
| 683 | void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst) | 928 | void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst) |
| 684 | { | 929 | { |
| 685 | struct edmacc_param temp; | 930 | struct edmacc_param temp; |
| 931 | unsigned ctlr; | ||
| 932 | |||
| 933 | ctlr = EDMA_CTLR(slot); | ||
| 934 | slot = EDMA_CHAN_SLOT(slot); | ||
| 686 | 935 | ||
| 687 | edma_read_slot(slot, &temp); | 936 | edma_read_slot(EDMA_CTLR_CHAN(ctlr, slot), &temp); |
| 688 | if (src != NULL) | 937 | if (src != NULL) |
| 689 | *src = temp.src; | 938 | *src = temp.src; |
| 690 | if (dst != NULL) | 939 | if (dst != NULL) |
| @@ -704,10 +953,15 @@ EXPORT_SYMBOL(edma_get_position); | |||
| 704 | */ | 953 | */ |
| 705 | void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx) | 954 | void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx) |
| 706 | { | 955 | { |
| 707 | if (slot < num_slots) { | 956 | unsigned ctlr; |
| 708 | edma_parm_modify(PARM_SRC_DST_BIDX, slot, | 957 | |
| 958 | ctlr = EDMA_CTLR(slot); | ||
| 959 | slot = EDMA_CHAN_SLOT(slot); | ||
| 960 | |||
| 961 | if (slot < edma_info[ctlr]->num_slots) { | ||
| 962 | edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot, | ||
| 709 | 0xffff0000, src_bidx); | 963 | 0xffff0000, src_bidx); |
| 710 | edma_parm_modify(PARM_SRC_DST_CIDX, slot, | 964 | edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot, |
| 711 | 0xffff0000, src_cidx); | 965 | 0xffff0000, src_cidx); |
| 712 | } | 966 | } |
| 713 | } | 967 | } |
| @@ -725,10 +979,15 @@ EXPORT_SYMBOL(edma_set_src_index); | |||
| 725 | */ | 979 | */ |
| 726 | void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx) | 980 | void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx) |
| 727 | { | 981 | { |
| 728 | if (slot < num_slots) { | 982 | unsigned ctlr; |
| 729 | edma_parm_modify(PARM_SRC_DST_BIDX, slot, | 983 | |
| 984 | ctlr = EDMA_CTLR(slot); | ||
| 985 | slot = EDMA_CHAN_SLOT(slot); | ||
| 986 | |||
| 987 | if (slot < edma_info[ctlr]->num_slots) { | ||
| 988 | edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot, | ||
| 730 | 0x0000ffff, dest_bidx << 16); | 989 | 0x0000ffff, dest_bidx << 16); |
| 731 | edma_parm_modify(PARM_SRC_DST_CIDX, slot, | 990 | edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot, |
| 732 | 0x0000ffff, dest_cidx << 16); | 991 | 0x0000ffff, dest_cidx << 16); |
| 733 | } | 992 | } |
| 734 | } | 993 | } |
| @@ -767,16 +1026,21 @@ void edma_set_transfer_params(unsigned slot, | |||
| 767 | u16 acnt, u16 bcnt, u16 ccnt, | 1026 | u16 acnt, u16 bcnt, u16 ccnt, |
| 768 | u16 bcnt_rld, enum sync_dimension sync_mode) | 1027 | u16 bcnt_rld, enum sync_dimension sync_mode) |
| 769 | { | 1028 | { |
| 770 | if (slot < num_slots) { | 1029 | unsigned ctlr; |
| 771 | edma_parm_modify(PARM_LINK_BCNTRLD, slot, | 1030 | |
| 1031 | ctlr = EDMA_CTLR(slot); | ||
| 1032 | slot = EDMA_CHAN_SLOT(slot); | ||
| 1033 | |||
| 1034 | if (slot < edma_info[ctlr]->num_slots) { | ||
| 1035 | edma_parm_modify(ctlr, PARM_LINK_BCNTRLD, slot, | ||
| 772 | 0x0000ffff, bcnt_rld << 16); | 1036 | 0x0000ffff, bcnt_rld << 16); |
| 773 | if (sync_mode == ASYNC) | 1037 | if (sync_mode == ASYNC) |
| 774 | edma_parm_and(PARM_OPT, slot, ~SYNCDIM); | 1038 | edma_parm_and(ctlr, PARM_OPT, slot, ~SYNCDIM); |
| 775 | else | 1039 | else |
| 776 | edma_parm_or(PARM_OPT, slot, SYNCDIM); | 1040 | edma_parm_or(ctlr, PARM_OPT, slot, SYNCDIM); |
| 777 | /* Set the acount, bcount, ccount registers */ | 1041 | /* Set the acount, bcount, ccount registers */ |
| 778 | edma_parm_write(PARM_A_B_CNT, slot, (bcnt << 16) | acnt); | 1042 | edma_parm_write(ctlr, PARM_A_B_CNT, slot, (bcnt << 16) | acnt); |
| 779 | edma_parm_write(PARM_CCNT, slot, ccnt); | 1043 | edma_parm_write(ctlr, PARM_CCNT, slot, ccnt); |
| 780 | } | 1044 | } |
| 781 | } | 1045 | } |
| 782 | EXPORT_SYMBOL(edma_set_transfer_params); | 1046 | EXPORT_SYMBOL(edma_set_transfer_params); |
| @@ -790,11 +1054,19 @@ EXPORT_SYMBOL(edma_set_transfer_params); | |||
| 790 | */ | 1054 | */ |
| 791 | void edma_link(unsigned from, unsigned to) | 1055 | void edma_link(unsigned from, unsigned to) |
| 792 | { | 1056 | { |
| 793 | if (from >= num_slots) | 1057 | unsigned ctlr_from, ctlr_to; |
| 1058 | |||
| 1059 | ctlr_from = EDMA_CTLR(from); | ||
| 1060 | from = EDMA_CHAN_SLOT(from); | ||
| 1061 | ctlr_to = EDMA_CTLR(to); | ||
| 1062 | to = EDMA_CHAN_SLOT(to); | ||
| 1063 | |||
| 1064 | if (from >= edma_info[ctlr_from]->num_slots) | ||
| 794 | return; | 1065 | return; |
| 795 | if (to >= num_slots) | 1066 | if (to >= edma_info[ctlr_to]->num_slots) |
| 796 | return; | 1067 | return; |
| 797 | edma_parm_modify(PARM_LINK_BCNTRLD, from, 0xffff0000, PARM_OFFSET(to)); | 1068 | edma_parm_modify(ctlr_from, PARM_LINK_BCNTRLD, from, 0xffff0000, |
| 1069 | PARM_OFFSET(to)); | ||
| 798 | } | 1070 | } |
| 799 | EXPORT_SYMBOL(edma_link); | 1071 | EXPORT_SYMBOL(edma_link); |
| 800 | 1072 | ||
| @@ -807,9 +1079,14 @@ EXPORT_SYMBOL(edma_link); | |||
| 807 | */ | 1079 | */ |
| 808 | void edma_unlink(unsigned from) | 1080 | void edma_unlink(unsigned from) |
| 809 | { | 1081 | { |
| 810 | if (from >= num_slots) | 1082 | unsigned ctlr; |
| 1083 | |||
| 1084 | ctlr = EDMA_CTLR(from); | ||
| 1085 | from = EDMA_CHAN_SLOT(from); | ||
| 1086 | |||
| 1087 | if (from >= edma_info[ctlr]->num_slots) | ||
| 811 | return; | 1088 | return; |
| 812 | edma_parm_or(PARM_LINK_BCNTRLD, from, 0xffff); | 1089 | edma_parm_or(ctlr, PARM_LINK_BCNTRLD, from, 0xffff); |
| 813 | } | 1090 | } |
| 814 | EXPORT_SYMBOL(edma_unlink); | 1091 | EXPORT_SYMBOL(edma_unlink); |
| 815 | 1092 | ||
| @@ -829,9 +1106,15 @@ EXPORT_SYMBOL(edma_unlink); | |||
| 829 | */ | 1106 | */ |
| 830 | void edma_write_slot(unsigned slot, const struct edmacc_param *param) | 1107 | void edma_write_slot(unsigned slot, const struct edmacc_param *param) |
| 831 | { | 1108 | { |
| 832 | if (slot >= num_slots) | 1109 | unsigned ctlr; |
| 1110 | |||
| 1111 | ctlr = EDMA_CTLR(slot); | ||
| 1112 | slot = EDMA_CHAN_SLOT(slot); | ||
| 1113 | |||
| 1114 | if (slot >= edma_info[ctlr]->num_slots) | ||
| 833 | return; | 1115 | return; |
| 834 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), param, PARM_SIZE); | 1116 | memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), param, |
| 1117 | PARM_SIZE); | ||
| 835 | } | 1118 | } |
| 836 | EXPORT_SYMBOL(edma_write_slot); | 1119 | EXPORT_SYMBOL(edma_write_slot); |
| 837 | 1120 | ||
| @@ -845,9 +1128,15 @@ EXPORT_SYMBOL(edma_write_slot); | |||
| 845 | */ | 1128 | */ |
| 846 | void edma_read_slot(unsigned slot, struct edmacc_param *param) | 1129 | void edma_read_slot(unsigned slot, struct edmacc_param *param) |
| 847 | { | 1130 | { |
| 848 | if (slot >= num_slots) | 1131 | unsigned ctlr; |
| 1132 | |||
| 1133 | ctlr = EDMA_CTLR(slot); | ||
| 1134 | slot = EDMA_CHAN_SLOT(slot); | ||
| 1135 | |||
| 1136 | if (slot >= edma_info[ctlr]->num_slots) | ||
| 849 | return; | 1137 | return; |
| 850 | memcpy_fromio(param, edmacc_regs_base + PARM_OFFSET(slot), PARM_SIZE); | 1138 | memcpy_fromio(param, edmacc_regs_base[ctlr] + PARM_OFFSET(slot), |
| 1139 | PARM_SIZE); | ||
| 851 | } | 1140 | } |
| 852 | EXPORT_SYMBOL(edma_read_slot); | 1141 | EXPORT_SYMBOL(edma_read_slot); |
| 853 | 1142 | ||
| @@ -864,10 +1153,15 @@ EXPORT_SYMBOL(edma_read_slot); | |||
| 864 | */ | 1153 | */ |
| 865 | void edma_pause(unsigned channel) | 1154 | void edma_pause(unsigned channel) |
| 866 | { | 1155 | { |
| 867 | if (channel < num_channels) { | 1156 | unsigned ctlr; |
| 1157 | |||
| 1158 | ctlr = EDMA_CTLR(channel); | ||
| 1159 | channel = EDMA_CHAN_SLOT(channel); | ||
| 1160 | |||
| 1161 | if (channel < edma_info[ctlr]->num_channels) { | ||
| 868 | unsigned int mask = (1 << (channel & 0x1f)); | 1162 | unsigned int mask = (1 << (channel & 0x1f)); |
| 869 | 1163 | ||
| 870 | edma_shadow0_write_array(SH_EECR, channel >> 5, mask); | 1164 | edma_shadow0_write_array(ctlr, SH_EECR, channel >> 5, mask); |
| 871 | } | 1165 | } |
| 872 | } | 1166 | } |
| 873 | EXPORT_SYMBOL(edma_pause); | 1167 | EXPORT_SYMBOL(edma_pause); |
| @@ -880,10 +1174,15 @@ EXPORT_SYMBOL(edma_pause); | |||
| 880 | */ | 1174 | */ |
| 881 | void edma_resume(unsigned channel) | 1175 | void edma_resume(unsigned channel) |
| 882 | { | 1176 | { |
| 883 | if (channel < num_channels) { | 1177 | unsigned ctlr; |
| 1178 | |||
| 1179 | ctlr = EDMA_CTLR(channel); | ||
| 1180 | channel = EDMA_CHAN_SLOT(channel); | ||
| 1181 | |||
| 1182 | if (channel < edma_info[ctlr]->num_channels) { | ||
| 884 | unsigned int mask = (1 << (channel & 0x1f)); | 1183 | unsigned int mask = (1 << (channel & 0x1f)); |
| 885 | 1184 | ||
| 886 | edma_shadow0_write_array(SH_EESR, channel >> 5, mask); | 1185 | edma_shadow0_write_array(ctlr, SH_EESR, channel >> 5, mask); |
| 887 | } | 1186 | } |
| 888 | } | 1187 | } |
| 889 | EXPORT_SYMBOL(edma_resume); | 1188 | EXPORT_SYMBOL(edma_resume); |
| @@ -901,28 +1200,33 @@ EXPORT_SYMBOL(edma_resume); | |||
| 901 | */ | 1200 | */ |
| 902 | int edma_start(unsigned channel) | 1201 | int edma_start(unsigned channel) |
| 903 | { | 1202 | { |
| 904 | if (channel < num_channels) { | 1203 | unsigned ctlr; |
| 1204 | |||
| 1205 | ctlr = EDMA_CTLR(channel); | ||
| 1206 | channel = EDMA_CHAN_SLOT(channel); | ||
| 1207 | |||
| 1208 | if (channel < edma_info[ctlr]->num_channels) { | ||
| 905 | int j = channel >> 5; | 1209 | int j = channel >> 5; |
| 906 | unsigned int mask = (1 << (channel & 0x1f)); | 1210 | unsigned int mask = (1 << (channel & 0x1f)); |
| 907 | 1211 | ||
| 908 | /* EDMA channels without event association */ | 1212 | /* EDMA channels without event association */ |
| 909 | if (test_bit(channel, edma_noevent)) { | 1213 | if (test_bit(channel, edma_info[ctlr]->edma_noevent)) { |
| 910 | pr_debug("EDMA: ESR%d %08x\n", j, | 1214 | pr_debug("EDMA: ESR%d %08x\n", j, |
| 911 | edma_shadow0_read_array(SH_ESR, j)); | 1215 | edma_shadow0_read_array(ctlr, SH_ESR, j)); |
| 912 | edma_shadow0_write_array(SH_ESR, j, mask); | 1216 | edma_shadow0_write_array(ctlr, SH_ESR, j, mask); |
| 913 | return 0; | 1217 | return 0; |
| 914 | } | 1218 | } |
| 915 | 1219 | ||
| 916 | /* EDMA channel with event association */ | 1220 | /* EDMA channel with event association */ |
| 917 | pr_debug("EDMA: ER%d %08x\n", j, | 1221 | pr_debug("EDMA: ER%d %08x\n", j, |
| 918 | edma_shadow0_read_array(SH_ER, j)); | 1222 | edma_shadow0_read_array(ctlr, SH_ER, j)); |
| 919 | /* Clear any pending error */ | 1223 | /* Clear any pending error */ |
| 920 | edma_write_array(EDMA_EMCR, j, mask); | 1224 | edma_write_array(ctlr, EDMA_EMCR, j, mask); |
| 921 | /* Clear any SER */ | 1225 | /* Clear any SER */ |
| 922 | edma_shadow0_write_array(SH_SECR, j, mask); | 1226 | edma_shadow0_write_array(ctlr, SH_SECR, j, mask); |
| 923 | edma_shadow0_write_array(SH_EESR, j, mask); | 1227 | edma_shadow0_write_array(ctlr, SH_EESR, j, mask); |
| 924 | pr_debug("EDMA: EER%d %08x\n", j, | 1228 | pr_debug("EDMA: EER%d %08x\n", j, |
| 925 | edma_shadow0_read_array(SH_EER, j)); | 1229 | edma_shadow0_read_array(ctlr, SH_EER, j)); |
| 926 | return 0; | 1230 | return 0; |
| 927 | } | 1231 | } |
| 928 | 1232 | ||
| @@ -941,17 +1245,22 @@ EXPORT_SYMBOL(edma_start); | |||
| 941 | */ | 1245 | */ |
| 942 | void edma_stop(unsigned channel) | 1246 | void edma_stop(unsigned channel) |
| 943 | { | 1247 | { |
| 944 | if (channel < num_channels) { | 1248 | unsigned ctlr; |
| 1249 | |||
| 1250 | ctlr = EDMA_CTLR(channel); | ||
| 1251 | channel = EDMA_CHAN_SLOT(channel); | ||
| 1252 | |||
| 1253 | if (channel < edma_info[ctlr]->num_channels) { | ||
| 945 | int j = channel >> 5; | 1254 | int j = channel >> 5; |
| 946 | unsigned int mask = (1 << (channel & 0x1f)); | 1255 | unsigned int mask = (1 << (channel & 0x1f)); |
| 947 | 1256 | ||
| 948 | edma_shadow0_write_array(SH_EECR, j, mask); | 1257 | edma_shadow0_write_array(ctlr, SH_EECR, j, mask); |
| 949 | edma_shadow0_write_array(SH_ECR, j, mask); | 1258 | edma_shadow0_write_array(ctlr, SH_ECR, j, mask); |
| 950 | edma_shadow0_write_array(SH_SECR, j, mask); | 1259 | edma_shadow0_write_array(ctlr, SH_SECR, j, mask); |
| 951 | edma_write_array(EDMA_EMCR, j, mask); | 1260 | edma_write_array(ctlr, EDMA_EMCR, j, mask); |
| 952 | 1261 | ||
| 953 | pr_debug("EDMA: EER%d %08x\n", j, | 1262 | pr_debug("EDMA: EER%d %08x\n", j, |
| 954 | edma_shadow0_read_array(SH_EER, j)); | 1263 | edma_shadow0_read_array(ctlr, SH_EER, j)); |
| 955 | 1264 | ||
| 956 | /* REVISIT: consider guarding against inappropriate event | 1265 | /* REVISIT: consider guarding against inappropriate event |
| 957 | * chaining by overwriting with dummy_paramset. | 1266 | * chaining by overwriting with dummy_paramset. |
| @@ -975,18 +1284,23 @@ EXPORT_SYMBOL(edma_stop); | |||
| 975 | 1284 | ||
| 976 | void edma_clean_channel(unsigned channel) | 1285 | void edma_clean_channel(unsigned channel) |
| 977 | { | 1286 | { |
| 978 | if (channel < num_channels) { | 1287 | unsigned ctlr; |
| 1288 | |||
| 1289 | ctlr = EDMA_CTLR(channel); | ||
| 1290 | channel = EDMA_CHAN_SLOT(channel); | ||
| 1291 | |||
| 1292 | if (channel < edma_info[ctlr]->num_channels) { | ||
| 979 | int j = (channel >> 5); | 1293 | int j = (channel >> 5); |
| 980 | unsigned int mask = 1 << (channel & 0x1f); | 1294 | unsigned int mask = 1 << (channel & 0x1f); |
| 981 | 1295 | ||
| 982 | pr_debug("EDMA: EMR%d %08x\n", j, | 1296 | pr_debug("EDMA: EMR%d %08x\n", j, |
| 983 | edma_read_array(EDMA_EMR, j)); | 1297 | edma_read_array(ctlr, EDMA_EMR, j)); |
| 984 | edma_shadow0_write_array(SH_ECR, j, mask); | 1298 | edma_shadow0_write_array(ctlr, SH_ECR, j, mask); |
| 985 | /* Clear the corresponding EMR bits */ | 1299 | /* Clear the corresponding EMR bits */ |
| 986 | edma_write_array(EDMA_EMCR, j, mask); | 1300 | edma_write_array(ctlr, EDMA_EMCR, j, mask); |
| 987 | /* Clear any SER */ | 1301 | /* Clear any SER */ |
| 988 | edma_shadow0_write_array(SH_SECR, j, mask); | 1302 | edma_shadow0_write_array(ctlr, SH_SECR, j, mask); |
| 989 | edma_write(EDMA_CCERRCLR, (1 << 16) | 0x3); | 1303 | edma_write(ctlr, EDMA_CCERRCLR, (1 << 16) | 0x3); |
| 990 | } | 1304 | } |
| 991 | } | 1305 | } |
| 992 | EXPORT_SYMBOL(edma_clean_channel); | 1306 | EXPORT_SYMBOL(edma_clean_channel); |
| @@ -998,12 +1312,17 @@ EXPORT_SYMBOL(edma_clean_channel); | |||
| 998 | */ | 1312 | */ |
| 999 | void edma_clear_event(unsigned channel) | 1313 | void edma_clear_event(unsigned channel) |
| 1000 | { | 1314 | { |
| 1001 | if (channel >= num_channels) | 1315 | unsigned ctlr; |
| 1316 | |||
| 1317 | ctlr = EDMA_CTLR(channel); | ||
| 1318 | channel = EDMA_CHAN_SLOT(channel); | ||
| 1319 | |||
| 1320 | if (channel >= edma_info[ctlr]->num_channels) | ||
| 1002 | return; | 1321 | return; |
| 1003 | if (channel < 32) | 1322 | if (channel < 32) |
| 1004 | edma_write(EDMA_ECR, 1 << channel); | 1323 | edma_write(ctlr, EDMA_ECR, 1 << channel); |
| 1005 | else | 1324 | else |
| 1006 | edma_write(EDMA_ECRH, 1 << (channel - 32)); | 1325 | edma_write(ctlr, EDMA_ECRH, 1 << (channel - 32)); |
| 1007 | } | 1326 | } |
| 1008 | EXPORT_SYMBOL(edma_clear_event); | 1327 | EXPORT_SYMBOL(edma_clear_event); |
| 1009 | 1328 | ||
| @@ -1012,62 +1331,133 @@ EXPORT_SYMBOL(edma_clear_event); | |||
| 1012 | static int __init edma_probe(struct platform_device *pdev) | 1331 | static int __init edma_probe(struct platform_device *pdev) |
| 1013 | { | 1332 | { |
| 1014 | struct edma_soc_info *info = pdev->dev.platform_data; | 1333 | struct edma_soc_info *info = pdev->dev.platform_data; |
| 1015 | int i; | 1334 | const s8 (*queue_priority_mapping)[2]; |
| 1016 | int status; | 1335 | const s8 (*queue_tc_mapping)[2]; |
| 1336 | int i, j, found = 0; | ||
| 1337 | int status = -1; | ||
| 1017 | const s8 *noevent; | 1338 | const s8 *noevent; |
| 1018 | int irq = 0, err_irq = 0; | 1339 | int irq[EDMA_MAX_CC] = {0, 0}; |
| 1019 | struct resource *r; | 1340 | int err_irq[EDMA_MAX_CC] = {0, 0}; |
| 1020 | resource_size_t len; | 1341 | struct resource *r[EDMA_MAX_CC] = {NULL}; |
| 1342 | resource_size_t len[EDMA_MAX_CC]; | ||
| 1343 | char res_name[10]; | ||
| 1344 | char irq_name[10]; | ||
| 1021 | 1345 | ||
| 1022 | if (!info) | 1346 | if (!info) |
| 1023 | return -ENODEV; | 1347 | return -ENODEV; |
| 1024 | 1348 | ||
| 1025 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "edma_cc"); | 1349 | for (j = 0; j < EDMA_MAX_CC; j++) { |
| 1026 | if (!r) | 1350 | sprintf(res_name, "edma_cc%d", j); |
| 1027 | return -ENODEV; | 1351 | r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 1352 | res_name); | ||
| 1353 | if (!r[j]) { | ||
| 1354 | if (found) | ||
| 1355 | break; | ||
| 1356 | else | ||
| 1357 | return -ENODEV; | ||
| 1358 | } else | ||
| 1359 | found = 1; | ||
| 1360 | |||
| 1361 | len[j] = resource_size(r[j]); | ||
| 1362 | |||
| 1363 | r[j] = request_mem_region(r[j]->start, len[j], | ||
| 1364 | dev_name(&pdev->dev)); | ||
| 1365 | if (!r[j]) { | ||
| 1366 | status = -EBUSY; | ||
| 1367 | goto fail1; | ||
| 1368 | } | ||
| 1028 | 1369 | ||
| 1029 | len = r->end - r->start + 1; | 1370 | edmacc_regs_base[j] = ioremap(r[j]->start, len[j]); |
| 1371 | if (!edmacc_regs_base[j]) { | ||
| 1372 | status = -EBUSY; | ||
| 1373 | goto fail1; | ||
| 1374 | } | ||
| 1030 | 1375 | ||
| 1031 | r = request_mem_region(r->start, len, r->name); | 1376 | edma_info[j] = kmalloc(sizeof(struct edma), GFP_KERNEL); |
| 1032 | if (!r) | 1377 | if (!edma_info[j]) { |
| 1033 | return -EBUSY; | 1378 | status = -ENOMEM; |
| 1379 | goto fail1; | ||
| 1380 | } | ||
| 1381 | memset(edma_info[j], 0, sizeof(struct edma)); | ||
| 1382 | |||
| 1383 | edma_info[j]->num_channels = min_t(unsigned, info[j].n_channel, | ||
| 1384 | EDMA_MAX_DMACH); | ||
| 1385 | edma_info[j]->num_slots = min_t(unsigned, info[j].n_slot, | ||
| 1386 | EDMA_MAX_PARAMENTRY); | ||
| 1387 | edma_info[j]->num_cc = min_t(unsigned, info[j].n_cc, | ||
| 1388 | EDMA_MAX_CC); | ||
| 1389 | |||
| 1390 | edma_info[j]->default_queue = info[j].default_queue; | ||
| 1391 | if (!edma_info[j]->default_queue) | ||
| 1392 | edma_info[j]->default_queue = EVENTQ_1; | ||
| 1393 | |||
| 1394 | dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", | ||
| 1395 | edmacc_regs_base[j]); | ||
| 1396 | |||
| 1397 | for (i = 0; i < edma_info[j]->num_slots; i++) | ||
| 1398 | memcpy_toio(edmacc_regs_base[j] + PARM_OFFSET(i), | ||
| 1399 | &dummy_paramset, PARM_SIZE); | ||
| 1400 | |||
| 1401 | noevent = info[j].noevent; | ||
| 1402 | if (noevent) { | ||
| 1403 | while (*noevent != -1) | ||
| 1404 | set_bit(*noevent++, edma_info[j]->edma_noevent); | ||
| 1405 | } | ||
| 1034 | 1406 | ||
| 1035 | edmacc_regs_base = ioremap(r->start, len); | 1407 | sprintf(irq_name, "edma%d", j); |
| 1036 | if (!edmacc_regs_base) { | 1408 | irq[j] = platform_get_irq_byname(pdev, irq_name); |
| 1037 | status = -EBUSY; | 1409 | edma_info[j]->irq_res_start = irq[j]; |
| 1038 | goto fail1; | 1410 | status = request_irq(irq[j], dma_irq_handler, 0, "edma", |
| 1039 | } | 1411 | &pdev->dev); |
| 1412 | if (status < 0) { | ||
| 1413 | dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n", | ||
| 1414 | irq[j], status); | ||
| 1415 | goto fail; | ||
| 1416 | } | ||
| 1040 | 1417 | ||
| 1041 | num_channels = min_t(unsigned, info->n_channel, EDMA_MAX_DMACH); | 1418 | sprintf(irq_name, "edma%d_err", j); |
| 1042 | num_slots = min_t(unsigned, info->n_slot, EDMA_MAX_PARAMENTRY); | 1419 | err_irq[j] = platform_get_irq_byname(pdev, irq_name); |
| 1420 | edma_info[j]->irq_res_end = err_irq[j]; | ||
| 1421 | status = request_irq(err_irq[j], dma_ccerr_handler, 0, | ||
| 1422 | "edma_error", &pdev->dev); | ||
| 1423 | if (status < 0) { | ||
| 1424 | dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n", | ||
| 1425 | err_irq[j], status); | ||
| 1426 | goto fail; | ||
| 1427 | } | ||
| 1043 | 1428 | ||
| 1044 | dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", edmacc_regs_base); | 1429 | /* Everything lives on transfer controller 1 until otherwise |
| 1430 | * specified. This way, long transfers on the low priority queue | ||
| 1431 | * started by the codec engine will not cause audio defects. | ||
| 1432 | */ | ||
| 1433 | for (i = 0; i < edma_info[j]->num_channels; i++) | ||
| 1434 | map_dmach_queue(j, i, EVENTQ_1); | ||
| 1045 | 1435 | ||
| 1046 | for (i = 0; i < num_slots; i++) | 1436 | queue_tc_mapping = info[j].queue_tc_mapping; |
| 1047 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(i), | 1437 | queue_priority_mapping = info[j].queue_priority_mapping; |
| 1048 | &dummy_paramset, PARM_SIZE); | ||
| 1049 | 1438 | ||
| 1050 | noevent = info->noevent; | 1439 | /* Event queue to TC mapping */ |
| 1051 | if (noevent) { | 1440 | for (i = 0; queue_tc_mapping[i][0] != -1; i++) |
| 1052 | while (*noevent != -1) | 1441 | map_queue_tc(j, queue_tc_mapping[i][0], |
| 1053 | set_bit(*noevent++, edma_noevent); | 1442 | queue_tc_mapping[i][1]); |
| 1054 | } | ||
| 1055 | 1443 | ||
| 1056 | irq = platform_get_irq(pdev, 0); | 1444 | /* Event queue priority mapping */ |
| 1057 | status = request_irq(irq, dma_irq_handler, 0, "edma", &pdev->dev); | 1445 | for (i = 0; queue_priority_mapping[i][0] != -1; i++) |
| 1058 | if (status < 0) { | 1446 | assign_priority_to_queue(j, |
| 1059 | dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n", | 1447 | queue_priority_mapping[i][0], |
| 1060 | irq, status); | 1448 | queue_priority_mapping[i][1]); |
| 1061 | goto fail; | 1449 | |
| 1062 | } | 1450 | /* Map the channel to param entry if channel mapping logic |
| 1451 | * exist | ||
| 1452 | */ | ||
| 1453 | if (edma_read(j, EDMA_CCCFG) & CHMAP_EXIST) | ||
| 1454 | map_dmach_param(j); | ||
| 1063 | 1455 | ||
| 1064 | err_irq = platform_get_irq(pdev, 1); | 1456 | for (i = 0; i < info[j].n_region; i++) { |
| 1065 | status = request_irq(err_irq, dma_ccerr_handler, 0, | 1457 | edma_write_array2(j, EDMA_DRAE, i, 0, 0x0); |
| 1066 | "edma_error", &pdev->dev); | 1458 | edma_write_array2(j, EDMA_DRAE, i, 1, 0x0); |
| 1067 | if (status < 0) { | 1459 | edma_write_array(j, EDMA_QRAE, i, 0x0); |
| 1068 | dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n", | 1460 | } |
| 1069 | err_irq, status); | ||
| 1070 | goto fail; | ||
| 1071 | } | 1461 | } |
| 1072 | 1462 | ||
| 1073 | if (tc_errs_handled) { | 1463 | if (tc_errs_handled) { |
| @@ -1087,38 +1477,23 @@ static int __init edma_probe(struct platform_device *pdev) | |||
| 1087 | } | 1477 | } |
| 1088 | } | 1478 | } |
| 1089 | 1479 | ||
| 1090 | /* Everything lives on transfer controller 1 until otherwise specified. | ||
| 1091 | * This way, long transfers on the low priority queue | ||
| 1092 | * started by the codec engine will not cause audio defects. | ||
| 1093 | */ | ||
| 1094 | for (i = 0; i < num_channels; i++) | ||
| 1095 | map_dmach_queue(i, EVENTQ_1); | ||
| 1096 | |||
| 1097 | /* Event queue to TC mapping */ | ||
| 1098 | for (i = 0; queue_tc_mapping[i][0] != -1; i++) | ||
| 1099 | map_queue_tc(queue_tc_mapping[i][0], queue_tc_mapping[i][1]); | ||
| 1100 | |||
| 1101 | /* Event queue priority mapping */ | ||
| 1102 | for (i = 0; queue_priority_mapping[i][0] != -1; i++) | ||
| 1103 | assign_priority_to_queue(queue_priority_mapping[i][0], | ||
| 1104 | queue_priority_mapping[i][1]); | ||
| 1105 | |||
| 1106 | for (i = 0; i < info->n_region; i++) { | ||
| 1107 | edma_write_array2(EDMA_DRAE, i, 0, 0x0); | ||
| 1108 | edma_write_array2(EDMA_DRAE, i, 1, 0x0); | ||
| 1109 | edma_write_array(EDMA_QRAE, i, 0x0); | ||
| 1110 | } | ||
| 1111 | |||
| 1112 | return 0; | 1480 | return 0; |
| 1113 | 1481 | ||
| 1114 | fail: | 1482 | fail: |
| 1115 | if (err_irq) | 1483 | for (i = 0; i < EDMA_MAX_CC; i++) { |
| 1116 | free_irq(err_irq, NULL); | 1484 | if (err_irq[i]) |
| 1117 | if (irq) | 1485 | free_irq(err_irq[i], &pdev->dev); |
| 1118 | free_irq(irq, NULL); | 1486 | if (irq[i]) |
| 1119 | iounmap(edmacc_regs_base); | 1487 | free_irq(irq[i], &pdev->dev); |
| 1488 | } | ||
| 1120 | fail1: | 1489 | fail1: |
| 1121 | release_mem_region(r->start, len); | 1490 | for (i = 0; i < EDMA_MAX_CC; i++) { |
| 1491 | if (r[i]) | ||
| 1492 | release_mem_region(r[i]->start, len[i]); | ||
| 1493 | if (edmacc_regs_base[i]) | ||
| 1494 | iounmap(edmacc_regs_base[i]); | ||
| 1495 | kfree(edma_info[i]); | ||
| 1496 | } | ||
| 1122 | return status; | 1497 | return status; |
| 1123 | } | 1498 | } |
| 1124 | 1499 | ||
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index 1b6532159c58..f6ea9db11f41 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c | |||
| @@ -34,6 +34,7 @@ static DEFINE_SPINLOCK(gpio_lock); | |||
| 34 | struct davinci_gpio { | 34 | struct davinci_gpio { |
| 35 | struct gpio_chip chip; | 35 | struct gpio_chip chip; |
| 36 | struct gpio_controller *__iomem regs; | 36 | struct gpio_controller *__iomem regs; |
| 37 | int irq_base; | ||
| 37 | }; | 38 | }; |
| 38 | 39 | ||
| 39 | static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; | 40 | static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; |
| @@ -161,8 +162,7 @@ pure_initcall(davinci_gpio_setup); | |||
| 161 | * used as output pins ... which is convenient for testing. | 162 | * used as output pins ... which is convenient for testing. |
| 162 | * | 163 | * |
| 163 | * NOTE: The first few GPIOs also have direct INTC hookups in addition | 164 | * NOTE: The first few GPIOs also have direct INTC hookups in addition |
| 164 | * to their GPIOBNK0 irq, with a bit less overhead but less flexibility | 165 | * to their GPIOBNK0 irq, with a bit less overhead. |
| 165 | * on triggering (e.g. no edge options). We don't try to use those. | ||
| 166 | * | 166 | * |
| 167 | * All those INTC hookups (direct, plus several IRQ banks) can also | 167 | * All those INTC hookups (direct, plus several IRQ banks) can also |
| 168 | * serve as EDMA event triggers. | 168 | * serve as EDMA event triggers. |
| @@ -171,7 +171,7 @@ pure_initcall(davinci_gpio_setup); | |||
| 171 | static void gpio_irq_disable(unsigned irq) | 171 | static void gpio_irq_disable(unsigned irq) |
| 172 | { | 172 | { |
| 173 | struct gpio_controller *__iomem g = get_irq_chip_data(irq); | 173 | struct gpio_controller *__iomem g = get_irq_chip_data(irq); |
| 174 | u32 mask = __gpio_mask(irq_to_gpio(irq)); | 174 | u32 mask = (u32) get_irq_data(irq); |
| 175 | 175 | ||
| 176 | __raw_writel(mask, &g->clr_falling); | 176 | __raw_writel(mask, &g->clr_falling); |
| 177 | __raw_writel(mask, &g->clr_rising); | 177 | __raw_writel(mask, &g->clr_rising); |
| @@ -180,7 +180,7 @@ static void gpio_irq_disable(unsigned irq) | |||
| 180 | static void gpio_irq_enable(unsigned irq) | 180 | static void gpio_irq_enable(unsigned irq) |
| 181 | { | 181 | { |
| 182 | struct gpio_controller *__iomem g = get_irq_chip_data(irq); | 182 | struct gpio_controller *__iomem g = get_irq_chip_data(irq); |
| 183 | u32 mask = __gpio_mask(irq_to_gpio(irq)); | 183 | u32 mask = (u32) get_irq_data(irq); |
| 184 | unsigned status = irq_desc[irq].status; | 184 | unsigned status = irq_desc[irq].status; |
| 185 | 185 | ||
| 186 | status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; | 186 | status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; |
| @@ -196,7 +196,7 @@ static void gpio_irq_enable(unsigned irq) | |||
| 196 | static int gpio_irq_type(unsigned irq, unsigned trigger) | 196 | static int gpio_irq_type(unsigned irq, unsigned trigger) |
| 197 | { | 197 | { |
| 198 | struct gpio_controller *__iomem g = get_irq_chip_data(irq); | 198 | struct gpio_controller *__iomem g = get_irq_chip_data(irq); |
| 199 | u32 mask = __gpio_mask(irq_to_gpio(irq)); | 199 | u32 mask = (u32) get_irq_data(irq); |
| 200 | 200 | ||
| 201 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) | 201 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
| 202 | return -EINVAL; | 202 | return -EINVAL; |
| @@ -260,6 +260,45 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
| 260 | /* now it may re-trigger */ | 260 | /* now it may re-trigger */ |
| 261 | } | 261 | } |
| 262 | 262 | ||
| 263 | static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset) | ||
| 264 | { | ||
| 265 | struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); | ||
| 266 | |||
| 267 | if (d->irq_base >= 0) | ||
| 268 | return d->irq_base + offset; | ||
| 269 | else | ||
| 270 | return -ENODEV; | ||
| 271 | } | ||
| 272 | |||
| 273 | static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) | ||
| 274 | { | ||
| 275 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
| 276 | |||
| 277 | /* NOTE: we assume for now that only irqs in the first gpio_chip | ||
| 278 | * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs). | ||
| 279 | */ | ||
| 280 | if (offset < soc_info->gpio_unbanked) | ||
| 281 | return soc_info->gpio_irq + offset; | ||
| 282 | else | ||
| 283 | return -ENODEV; | ||
| 284 | } | ||
| 285 | |||
| 286 | static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger) | ||
| 287 | { | ||
| 288 | struct gpio_controller *__iomem g = get_irq_chip_data(irq); | ||
| 289 | u32 mask = (u32) get_irq_data(irq); | ||
| 290 | |||
| 291 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) | ||
| 292 | return -EINVAL; | ||
| 293 | |||
| 294 | __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) | ||
| 295 | ? &g->set_falling : &g->clr_falling); | ||
| 296 | __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) | ||
| 297 | ? &g->set_rising : &g->clr_rising); | ||
| 298 | |||
| 299 | return 0; | ||
| 300 | } | ||
| 301 | |||
| 263 | /* | 302 | /* |
| 264 | * NOTE: for suspend/resume, probably best to make a platform_device with | 303 | * NOTE: for suspend/resume, probably best to make a platform_device with |
| 265 | * suspend_late/resume_resume calls hooking into results of the set_wake() | 304 | * suspend_late/resume_resume calls hooking into results of the set_wake() |
| @@ -275,6 +314,7 @@ static int __init davinci_gpio_irq_setup(void) | |||
| 275 | u32 binten = 0; | 314 | u32 binten = 0; |
| 276 | unsigned ngpio, bank_irq; | 315 | unsigned ngpio, bank_irq; |
| 277 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 316 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
| 317 | struct gpio_controller *__iomem g; | ||
| 278 | 318 | ||
| 279 | ngpio = soc_info->gpio_num; | 319 | ngpio = soc_info->gpio_num; |
| 280 | 320 | ||
| @@ -292,12 +332,63 @@ static int __init davinci_gpio_irq_setup(void) | |||
| 292 | } | 332 | } |
| 293 | clk_enable(clk); | 333 | clk_enable(clk); |
| 294 | 334 | ||
| 335 | /* Arrange gpio_to_irq() support, handling either direct IRQs or | ||
| 336 | * banked IRQs. Having GPIOs in the first GPIO bank use direct | ||
| 337 | * IRQs, while the others use banked IRQs, would need some setup | ||
| 338 | * tweaks to recognize hardware which can do that. | ||
| 339 | */ | ||
| 340 | for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) { | ||
| 341 | chips[bank].chip.to_irq = gpio_to_irq_banked; | ||
| 342 | chips[bank].irq_base = soc_info->gpio_unbanked | ||
| 343 | ? -EINVAL | ||
| 344 | : (soc_info->intc_irq_num + gpio); | ||
| 345 | } | ||
| 346 | |||
| 347 | /* | ||
| 348 | * AINTC can handle direct/unbanked IRQs for GPIOs, with the GPIO | ||
| 349 | * controller only handling trigger modes. We currently assume no | ||
| 350 | * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs. | ||
| 351 | */ | ||
| 352 | if (soc_info->gpio_unbanked) { | ||
| 353 | static struct irq_chip gpio_irqchip_unbanked; | ||
| 354 | |||
| 355 | /* pass "bank 0" GPIO IRQs to AINTC */ | ||
| 356 | chips[0].chip.to_irq = gpio_to_irq_unbanked; | ||
| 357 | binten = BIT(0); | ||
| 358 | |||
| 359 | /* AINTC handles mask/unmask; GPIO handles triggering */ | ||
| 360 | irq = bank_irq; | ||
| 361 | gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); | ||
| 362 | gpio_irqchip_unbanked.name = "GPIO-AINTC"; | ||
| 363 | gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked; | ||
| 364 | |||
| 365 | /* default trigger: both edges */ | ||
| 366 | g = gpio2controller(0); | ||
| 367 | __raw_writel(~0, &g->set_falling); | ||
| 368 | __raw_writel(~0, &g->set_rising); | ||
| 369 | |||
| 370 | /* set the direct IRQs up to use that irqchip */ | ||
| 371 | for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { | ||
| 372 | set_irq_chip(irq, &gpio_irqchip_unbanked); | ||
| 373 | set_irq_data(irq, (void *) __gpio_mask(gpio)); | ||
| 374 | set_irq_chip_data(irq, g); | ||
| 375 | irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH; | ||
| 376 | } | ||
| 377 | |||
| 378 | goto done; | ||
| 379 | } | ||
| 380 | |||
| 381 | /* | ||
| 382 | * Or, AINTC can handle IRQs for banks of 16 GPIO IRQs, which we | ||
| 383 | * then chain through our own handler. | ||
| 384 | */ | ||
| 295 | for (gpio = 0, irq = gpio_to_irq(0), bank = 0; | 385 | for (gpio = 0, irq = gpio_to_irq(0), bank = 0; |
| 296 | gpio < ngpio; | 386 | gpio < ngpio; |
| 297 | bank++, bank_irq++) { | 387 | bank++, bank_irq++) { |
| 298 | struct gpio_controller *__iomem g = gpio2controller(gpio); | ||
| 299 | unsigned i; | 388 | unsigned i; |
| 300 | 389 | ||
| 390 | /* disabled by default, enabled only as needed */ | ||
| 391 | g = gpio2controller(gpio); | ||
| 301 | __raw_writel(~0, &g->clr_falling); | 392 | __raw_writel(~0, &g->clr_falling); |
| 302 | __raw_writel(~0, &g->clr_rising); | 393 | __raw_writel(~0, &g->clr_rising); |
| 303 | 394 | ||
| @@ -309,6 +400,7 @@ static int __init davinci_gpio_irq_setup(void) | |||
| 309 | for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { | 400 | for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { |
| 310 | set_irq_chip(irq, &gpio_irqchip); | 401 | set_irq_chip(irq, &gpio_irqchip); |
| 311 | set_irq_chip_data(irq, g); | 402 | set_irq_chip_data(irq, g); |
| 403 | set_irq_data(irq, (void *) __gpio_mask(gpio)); | ||
| 312 | set_irq_handler(irq, handle_simple_irq); | 404 | set_irq_handler(irq, handle_simple_irq); |
| 313 | set_irq_flags(irq, IRQF_VALID); | 405 | set_irq_flags(irq, IRQF_VALID); |
| 314 | } | 406 | } |
| @@ -316,6 +408,7 @@ static int __init davinci_gpio_irq_setup(void) | |||
| 316 | binten |= BIT(bank); | 408 | binten |= BIT(bank); |
| 317 | } | 409 | } |
| 318 | 410 | ||
| 411 | done: | ||
| 319 | /* BINTEN -- per-bank interrupt enable. genirq would also let these | 412 | /* BINTEN -- per-bank interrupt enable. genirq would also let these |
| 320 | * bits be set/cleared dynamically. | 413 | * bits be set/cleared dynamically. |
| 321 | */ | 414 | */ |
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index e0abc437d796..18e4ce34ece6 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h | |||
| @@ -5,21 +5,73 @@ | |||
| 5 | #define __ASM_ARCH_DAVINCI_ASP_H | 5 | #define __ASM_ARCH_DAVINCI_ASP_H |
| 6 | 6 | ||
| 7 | #include <mach/irqs.h> | 7 | #include <mach/irqs.h> |
| 8 | #include <mach/edma.h> | ||
| 8 | 9 | ||
| 9 | /* Bases of register banks */ | 10 | /* Bases of dm644x and dm355 register banks */ |
| 10 | #define DAVINCI_ASP0_BASE 0x01E02000 | 11 | #define DAVINCI_ASP0_BASE 0x01E02000 |
| 11 | #define DAVINCI_ASP1_BASE 0x01E04000 | 12 | #define DAVINCI_ASP1_BASE 0x01E04000 |
| 12 | 13 | ||
| 13 | /* EDMA channels */ | 14 | /* Bases of dm646x register banks */ |
| 15 | #define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 | ||
| 16 | #define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 | ||
| 17 | |||
| 18 | /* Bases of da850/da830 McASP0 register banks */ | ||
| 19 | #define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000 | ||
| 20 | |||
| 21 | /* Bases of da830 McASP1 register banks */ | ||
| 22 | #define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 | ||
| 23 | |||
| 24 | /* EDMA channels of dm644x and dm355 */ | ||
| 14 | #define DAVINCI_DMA_ASP0_TX 2 | 25 | #define DAVINCI_DMA_ASP0_TX 2 |
| 15 | #define DAVINCI_DMA_ASP0_RX 3 | 26 | #define DAVINCI_DMA_ASP0_RX 3 |
| 16 | #define DAVINCI_DMA_ASP1_TX 8 | 27 | #define DAVINCI_DMA_ASP1_TX 8 |
| 17 | #define DAVINCI_DMA_ASP1_RX 9 | 28 | #define DAVINCI_DMA_ASP1_RX 9 |
| 18 | 29 | ||
| 30 | /* EDMA channels of dm646x */ | ||
| 31 | #define DAVINCI_DM646X_DMA_MCASP0_AXEVT0 6 | ||
| 32 | #define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 | ||
| 33 | #define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 | ||
| 34 | |||
| 35 | /* EDMA channels of da850/da830 McASP0 */ | ||
| 36 | #define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0 | ||
| 37 | #define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1 | ||
| 38 | |||
| 39 | /* EDMA channels of da830 McASP1 */ | ||
| 40 | #define DAVINCI_DA830_DMA_MCASP1_AREVT 2 | ||
| 41 | #define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 | ||
| 42 | |||
| 19 | /* Interrupts */ | 43 | /* Interrupts */ |
| 20 | #define DAVINCI_ASP0_RX_INT IRQ_MBRINT | 44 | #define DAVINCI_ASP0_RX_INT IRQ_MBRINT |
| 21 | #define DAVINCI_ASP0_TX_INT IRQ_MBXINT | 45 | #define DAVINCI_ASP0_TX_INT IRQ_MBXINT |
| 22 | #define DAVINCI_ASP1_RX_INT IRQ_MBRINT | 46 | #define DAVINCI_ASP1_RX_INT IRQ_MBRINT |
| 23 | #define DAVINCI_ASP1_TX_INT IRQ_MBXINT | 47 | #define DAVINCI_ASP1_TX_INT IRQ_MBXINT |
| 24 | 48 | ||
| 49 | struct snd_platform_data { | ||
| 50 | u32 tx_dma_offset; | ||
| 51 | u32 rx_dma_offset; | ||
| 52 | enum dma_event_q eventq_no; /* event queue number */ | ||
| 53 | unsigned int codec_fmt; | ||
| 54 | |||
| 55 | /* McASP specific fields */ | ||
| 56 | int tdm_slots; | ||
| 57 | u8 op_mode; | ||
| 58 | u8 num_serializer; | ||
| 59 | u8 *serial_dir; | ||
| 60 | u8 version; | ||
| 61 | u8 txnumevt; | ||
| 62 | u8 rxnumevt; | ||
| 63 | }; | ||
| 64 | |||
| 65 | enum { | ||
| 66 | MCASP_VERSION_1 = 0, /* DM646x */ | ||
| 67 | MCASP_VERSION_2, /* DA8xx/OMAPL1x */ | ||
| 68 | }; | ||
| 69 | |||
| 70 | #define INACTIVE_MODE 0 | ||
| 71 | #define TX_MODE 1 | ||
| 72 | #define RX_MODE 2 | ||
| 73 | |||
| 74 | #define DAVINCI_MCASP_IIS_MODE 0 | ||
| 75 | #define DAVINCI_MCASP_DIT_MODE 1 | ||
| 76 | |||
| 25 | #endif /* __ASM_ARCH_DAVINCI_ASP_H */ | 77 | #endif /* __ASM_ARCH_DAVINCI_ASP_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index a1f03b606d8f..1fd3917cae4e 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h | |||
| @@ -60,10 +60,10 @@ struct davinci_soc_info { | |||
| 60 | u8 *intc_irq_prios; | 60 | u8 *intc_irq_prios; |
| 61 | unsigned long intc_irq_num; | 61 | unsigned long intc_irq_num; |
| 62 | struct davinci_timer_info *timer_info; | 62 | struct davinci_timer_info *timer_info; |
| 63 | void __iomem *wdt_base; | ||
| 64 | void __iomem *gpio_base; | 63 | void __iomem *gpio_base; |
| 65 | unsigned gpio_num; | 64 | unsigned gpio_num; |
| 66 | unsigned gpio_irq; | 65 | unsigned gpio_irq; |
| 66 | unsigned gpio_unbanked; | ||
| 67 | struct platform_device *serial_dev; | 67 | struct platform_device *serial_dev; |
| 68 | struct emac_platform_data *emac_pdata; | 68 | struct emac_platform_data *emac_pdata; |
| 69 | dma_addr_t sram_dma; | 69 | dma_addr_t sram_dma; |
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h index d12a5ed2959a..189b1ff13642 100644 --- a/arch/arm/mach-davinci/include/mach/cputype.h +++ b/arch/arm/mach-davinci/include/mach/cputype.h | |||
| @@ -30,6 +30,9 @@ struct davinci_id { | |||
| 30 | #define DAVINCI_CPU_ID_DM6446 0x64460000 | 30 | #define DAVINCI_CPU_ID_DM6446 0x64460000 |
| 31 | #define DAVINCI_CPU_ID_DM6467 0x64670000 | 31 | #define DAVINCI_CPU_ID_DM6467 0x64670000 |
| 32 | #define DAVINCI_CPU_ID_DM355 0x03550000 | 32 | #define DAVINCI_CPU_ID_DM355 0x03550000 |
| 33 | #define DAVINCI_CPU_ID_DM365 0x03650000 | ||
| 34 | #define DAVINCI_CPU_ID_DA830 0x08300000 | ||
| 35 | #define DAVINCI_CPU_ID_DA850 0x08500000 | ||
| 33 | 36 | ||
| 34 | #define IS_DAVINCI_CPU(type, id) \ | 37 | #define IS_DAVINCI_CPU(type, id) \ |
| 35 | static inline int is_davinci_ ##type(void) \ | 38 | static inline int is_davinci_ ##type(void) \ |
| @@ -40,6 +43,9 @@ static inline int is_davinci_ ##type(void) \ | |||
| 40 | IS_DAVINCI_CPU(dm644x, DAVINCI_CPU_ID_DM6446) | 43 | IS_DAVINCI_CPU(dm644x, DAVINCI_CPU_ID_DM6446) |
| 41 | IS_DAVINCI_CPU(dm646x, DAVINCI_CPU_ID_DM6467) | 44 | IS_DAVINCI_CPU(dm646x, DAVINCI_CPU_ID_DM6467) |
| 42 | IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355) | 45 | IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355) |
| 46 | IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365) | ||
| 47 | IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) | ||
| 48 | IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850) | ||
| 43 | 49 | ||
| 44 | #ifdef CONFIG_ARCH_DAVINCI_DM644x | 50 | #ifdef CONFIG_ARCH_DAVINCI_DM644x |
| 45 | #define cpu_is_davinci_dm644x() is_davinci_dm644x() | 51 | #define cpu_is_davinci_dm644x() is_davinci_dm644x() |
| @@ -59,4 +65,22 @@ IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355) | |||
| 59 | #define cpu_is_davinci_dm355() 0 | 65 | #define cpu_is_davinci_dm355() 0 |
| 60 | #endif | 66 | #endif |
| 61 | 67 | ||
| 68 | #ifdef CONFIG_ARCH_DAVINCI_DM365 | ||
| 69 | #define cpu_is_davinci_dm365() is_davinci_dm365() | ||
| 70 | #else | ||
| 71 | #define cpu_is_davinci_dm365() 0 | ||
| 72 | #endif | ||
| 73 | |||
| 74 | #ifdef CONFIG_ARCH_DAVINCI_DA830 | ||
| 75 | #define cpu_is_davinci_da830() is_davinci_da830() | ||
| 76 | #else | ||
| 77 | #define cpu_is_davinci_da830() 0 | ||
| 78 | #endif | ||
| 79 | |||
| 80 | #ifdef CONFIG_ARCH_DAVINCI_DA850 | ||
| 81 | #define cpu_is_davinci_da850() is_davinci_da850() | ||
| 82 | #else | ||
| 83 | #define cpu_is_davinci_da850() 0 | ||
| 84 | #endif | ||
| 85 | |||
| 62 | #endif | 86 | #endif |
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h new file mode 100644 index 000000000000..d4095d0572c6 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
| @@ -0,0 +1,121 @@ | |||
| 1 | /* | ||
| 2 | * Chip specific defines for DA8XX/OMAP L1XX SoC | ||
| 3 | * | ||
| 4 | * Author: Mark A. Greer <mgreer@mvista.com> | ||
| 5 | * | ||
| 6 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | ||
| 7 | * the terms of the GNU General Public License version 2. This program | ||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | ||
| 9 | * or implied. | ||
| 10 | */ | ||
| 11 | #ifndef __ASM_ARCH_DAVINCI_DA8XX_H | ||
| 12 | #define __ASM_ARCH_DAVINCI_DA8XX_H | ||
| 13 | |||
| 14 | #include <mach/serial.h> | ||
| 15 | #include <mach/edma.h> | ||
| 16 | #include <mach/i2c.h> | ||
| 17 | #include <mach/emac.h> | ||
| 18 | #include <mach/asp.h> | ||
| 19 | #include <mach/mmc.h> | ||
| 20 | |||
| 21 | /* | ||
| 22 | * The cp_intc interrupt controller for the da8xx isn't in the same | ||
| 23 | * chunk of physical memory space as the other registers (like it is | ||
| 24 | * on the davincis) so it needs to be mapped separately. It will be | ||
| 25 | * mapped early on when the I/O space is mapped and we'll put it just | ||
| 26 | * before the I/O space in the processor's virtual memory space. | ||
| 27 | */ | ||
| 28 | #define DA8XX_CP_INTC_BASE 0xfffee000 | ||
| 29 | #define DA8XX_CP_INTC_SIZE SZ_8K | ||
| 30 | #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) | ||
| 31 | |||
| 32 | #define DA8XX_BOOT_CFG_BASE (IO_PHYS + 0x14000) | ||
| 33 | |||
| 34 | #define DA8XX_PSC0_BASE 0x01c10000 | ||
| 35 | #define DA8XX_PLL0_BASE 0x01c11000 | ||
| 36 | #define DA8XX_JTAG_ID_REG 0x01c14018 | ||
| 37 | #define DA8XX_TIMER64P0_BASE 0x01c20000 | ||
| 38 | #define DA8XX_TIMER64P1_BASE 0x01c21000 | ||
| 39 | #define DA8XX_GPIO_BASE 0x01e26000 | ||
| 40 | #define DA8XX_PSC1_BASE 0x01e27000 | ||
| 41 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | ||
| 42 | #define DA8XX_MMCSD0_BASE 0x01c40000 | ||
| 43 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 | ||
| 44 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 | ||
| 45 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 | ||
| 46 | |||
| 47 | #define PINMUX0 0x00 | ||
| 48 | #define PINMUX1 0x04 | ||
| 49 | #define PINMUX2 0x08 | ||
| 50 | #define PINMUX3 0x0c | ||
| 51 | #define PINMUX4 0x10 | ||
| 52 | #define PINMUX5 0x14 | ||
| 53 | #define PINMUX6 0x18 | ||
| 54 | #define PINMUX7 0x1c | ||
| 55 | #define PINMUX8 0x20 | ||
| 56 | #define PINMUX9 0x24 | ||
| 57 | #define PINMUX10 0x28 | ||
| 58 | #define PINMUX11 0x2c | ||
| 59 | #define PINMUX12 0x30 | ||
| 60 | #define PINMUX13 0x34 | ||
| 61 | #define PINMUX14 0x38 | ||
| 62 | #define PINMUX15 0x3c | ||
| 63 | #define PINMUX16 0x40 | ||
| 64 | #define PINMUX17 0x44 | ||
| 65 | #define PINMUX18 0x48 | ||
| 66 | #define PINMUX19 0x4c | ||
| 67 | |||
| 68 | void __init da830_init(void); | ||
| 69 | void __init da850_init(void); | ||
| 70 | |||
| 71 | int da8xx_register_edma(void); | ||
| 72 | int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); | ||
| 73 | int da8xx_register_watchdog(void); | ||
| 74 | int da8xx_register_emac(void); | ||
| 75 | int da8xx_register_lcdc(void); | ||
| 76 | int da8xx_register_mmcsd0(struct davinci_mmc_config *config); | ||
| 77 | void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata); | ||
| 78 | |||
| 79 | extern struct platform_device da8xx_serial_device; | ||
| 80 | extern struct emac_platform_data da8xx_emac_pdata; | ||
| 81 | |||
| 82 | extern const short da830_emif25_pins[]; | ||
| 83 | extern const short da830_spi0_pins[]; | ||
| 84 | extern const short da830_spi1_pins[]; | ||
| 85 | extern const short da830_mmc_sd_pins[]; | ||
| 86 | extern const short da830_uart0_pins[]; | ||
| 87 | extern const short da830_uart1_pins[]; | ||
| 88 | extern const short da830_uart2_pins[]; | ||
| 89 | extern const short da830_usb20_pins[]; | ||
| 90 | extern const short da830_usb11_pins[]; | ||
| 91 | extern const short da830_uhpi_pins[]; | ||
| 92 | extern const short da830_cpgmac_pins[]; | ||
| 93 | extern const short da830_emif3c_pins[]; | ||
| 94 | extern const short da830_mcasp0_pins[]; | ||
| 95 | extern const short da830_mcasp1_pins[]; | ||
| 96 | extern const short da830_mcasp2_pins[]; | ||
| 97 | extern const short da830_i2c0_pins[]; | ||
| 98 | extern const short da830_i2c1_pins[]; | ||
| 99 | extern const short da830_lcdcntl_pins[]; | ||
| 100 | extern const short da830_pwm_pins[]; | ||
| 101 | extern const short da830_ecap0_pins[]; | ||
| 102 | extern const short da830_ecap1_pins[]; | ||
| 103 | extern const short da830_ecap2_pins[]; | ||
| 104 | extern const short da830_eqep0_pins[]; | ||
| 105 | extern const short da830_eqep1_pins[]; | ||
| 106 | |||
| 107 | extern const short da850_uart0_pins[]; | ||
| 108 | extern const short da850_uart1_pins[]; | ||
| 109 | extern const short da850_uart2_pins[]; | ||
| 110 | extern const short da850_i2c0_pins[]; | ||
| 111 | extern const short da850_i2c1_pins[]; | ||
| 112 | extern const short da850_cpgmac_pins[]; | ||
| 113 | extern const short da850_mcasp_pins[]; | ||
| 114 | extern const short da850_lcdcntl_pins[]; | ||
| 115 | extern const short da850_mmcsd0_pins[]; | ||
| 116 | extern const short da850_nand_pins[]; | ||
| 117 | extern const short da850_nor_pins[]; | ||
| 118 | |||
| 119 | int da8xx_pinmux_setup(const short pins[]); | ||
| 120 | |||
| 121 | #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index de3fc2182b47..17ab5236da66 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S | |||
| @@ -24,7 +24,15 @@ | |||
| 24 | tst \rx, #1 @ MMU enabled? | 24 | tst \rx, #1 @ MMU enabled? |
| 25 | moveq \rx, #0x01000000 @ physical base address | 25 | moveq \rx, #0x01000000 @ physical base address |
| 26 | movne \rx, #0xfe000000 @ virtual base | 26 | movne \rx, #0xfe000000 @ virtual base |
| 27 | #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) | ||
| 28 | #error Cannot enable DaVinci and DA8XX platforms concurrently | ||
| 29 | #elif defined(CONFIG_MACH_DAVINCI_DA830_EVM) || \ | ||
| 30 | defined(CONFIG_MACH_DAVINCI_DA850_EVM) | ||
| 31 | orr \rx, \rx, #0x00d00000 @ physical base address | ||
| 32 | orr \rx, \rx, #0x0000d000 @ of UART 2 | ||
| 33 | #else | ||
| 27 | orr \rx, \rx, #0x00c20000 @ UART 0 | 34 | orr \rx, \rx, #0x00c20000 @ UART 0 |
| 35 | #endif | ||
| 28 | .endm | 36 | .endm |
| 29 | 37 | ||
| 30 | .macro senduart,rd,rx | 38 | .macro senduart,rd,rx |
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h index 54903b72438e..85536d8e8336 100644 --- a/arch/arm/mach-davinci/include/mach/dm355.h +++ b/arch/arm/mach-davinci/include/mach/dm355.h | |||
| @@ -12,11 +12,18 @@ | |||
| 12 | #define __ASM_ARCH_DM355_H | 12 | #define __ASM_ARCH_DM355_H |
| 13 | 13 | ||
| 14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
| 15 | #include <mach/asp.h> | ||
| 16 | #include <media/davinci/vpfe_capture.h> | ||
| 17 | |||
| 18 | #define ASP1_TX_EVT_EN 1 | ||
| 19 | #define ASP1_RX_EVT_EN 2 | ||
| 15 | 20 | ||
| 16 | struct spi_board_info; | 21 | struct spi_board_info; |
| 17 | 22 | ||
| 18 | void __init dm355_init(void); | 23 | void __init dm355_init(void); |
| 19 | void dm355_init_spi0(unsigned chipselect_mask, | 24 | void dm355_init_spi0(unsigned chipselect_mask, |
| 20 | struct spi_board_info *info, unsigned len); | 25 | struct spi_board_info *info, unsigned len); |
| 26 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata); | ||
| 27 | void dm355_set_vpfe_config(struct vpfe_config *cfg); | ||
| 21 | 28 | ||
| 22 | #endif /* __ASM_ARCH_DM355_H */ | 29 | #endif /* __ASM_ARCH_DM355_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h new file mode 100644 index 000000000000..09db4343bb4c --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/dm365.h | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Texas Instruments Incorporated | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License as | ||
| 6 | * published by the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
| 9 | * kind, whether express or implied; without even the implied warranty | ||
| 10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | */ | ||
| 13 | #ifndef __ASM_ARCH_DM365_H | ||
| 14 | #define __ASM_ARCH_DM665_H | ||
| 15 | |||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <mach/hardware.h> | ||
| 18 | #include <mach/emac.h> | ||
| 19 | |||
| 20 | #define DM365_EMAC_BASE (0x01D07000) | ||
| 21 | #define DM365_EMAC_CNTRL_OFFSET (0x0000) | ||
| 22 | #define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) | ||
| 23 | #define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) | ||
| 24 | #define DM365_EMAC_MDIO_OFFSET (0x4000) | ||
| 25 | #define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
| 26 | |||
| 27 | void __init dm365_init(void); | ||
| 28 | |||
| 29 | #endif /* __ASM_ARCH_DM365_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h index 15d42b92a8c9..0efb73852c2c 100644 --- a/arch/arm/mach-davinci/include/mach/dm644x.h +++ b/arch/arm/mach-davinci/include/mach/dm644x.h | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
| 26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
| 27 | #include <mach/emac.h> | 27 | #include <mach/emac.h> |
| 28 | #include <mach/asp.h> | ||
| 29 | #include <media/davinci/vpfe_capture.h> | ||
| 28 | 30 | ||
| 29 | #define DM644X_EMAC_BASE (0x01C80000) | 31 | #define DM644X_EMAC_BASE (0x01C80000) |
| 30 | #define DM644X_EMAC_CNTRL_OFFSET (0x0000) | 32 | #define DM644X_EMAC_CNTRL_OFFSET (0x0000) |
| @@ -34,5 +36,7 @@ | |||
| 34 | #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) | 36 | #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) |
| 35 | 37 | ||
| 36 | void __init dm644x_init(void); | 38 | void __init dm644x_init(void); |
| 39 | void __init dm644x_init_asp(struct snd_platform_data *pdata); | ||
| 40 | void dm644x_set_vpfe_config(struct vpfe_config *cfg); | ||
| 37 | 41 | ||
| 38 | #endif /* __ASM_ARCH_DM644X_H */ | 42 | #endif /* __ASM_ARCH_DM644X_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index 1fc764c8646e..8cec746ae9d2 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h | |||
| @@ -13,6 +13,9 @@ | |||
| 13 | 13 | ||
| 14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
| 15 | #include <mach/emac.h> | 15 | #include <mach/emac.h> |
| 16 | #include <mach/asp.h> | ||
| 17 | #include <linux/i2c.h> | ||
| 18 | #include <linux/videodev2.h> | ||
| 16 | 19 | ||
| 17 | #define DM646X_EMAC_BASE (0x01C80000) | 20 | #define DM646X_EMAC_BASE (0x01C80000) |
| 18 | #define DM646X_EMAC_CNTRL_OFFSET (0x0000) | 21 | #define DM646X_EMAC_CNTRL_OFFSET (0x0000) |
| @@ -21,6 +24,68 @@ | |||
| 21 | #define DM646X_EMAC_MDIO_OFFSET (0x4000) | 24 | #define DM646X_EMAC_MDIO_OFFSET (0x4000) |
| 22 | #define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) | 25 | #define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) |
| 23 | 26 | ||
| 27 | #define DM646X_ATA_REG_BASE (0x01C66000) | ||
| 28 | |||
| 24 | void __init dm646x_init(void); | 29 | void __init dm646x_init(void); |
| 30 | void __init dm646x_init_ide(void); | ||
| 31 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); | ||
| 32 | void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); | ||
| 33 | |||
| 34 | void dm646x_video_init(void); | ||
| 35 | |||
| 36 | enum vpif_if_type { | ||
| 37 | VPIF_IF_BT656, | ||
| 38 | VPIF_IF_BT1120, | ||
| 39 | VPIF_IF_RAW_BAYER | ||
| 40 | }; | ||
| 41 | |||
| 42 | struct vpif_interface { | ||
| 43 | enum vpif_if_type if_type; | ||
| 44 | unsigned hd_pol:1; | ||
| 45 | unsigned vd_pol:1; | ||
| 46 | unsigned fid_pol:1; | ||
| 47 | }; | ||
| 48 | |||
| 49 | struct vpif_subdev_info { | ||
| 50 | const char *name; | ||
| 51 | struct i2c_board_info board_info; | ||
| 52 | u32 input; | ||
| 53 | u32 output; | ||
| 54 | unsigned can_route:1; | ||
| 55 | struct vpif_interface vpif_if; | ||
| 56 | }; | ||
| 57 | |||
| 58 | struct vpif_display_config { | ||
| 59 | int (*set_clock)(int, int); | ||
| 60 | struct vpif_subdev_info *subdevinfo; | ||
| 61 | int subdev_count; | ||
| 62 | const char **output; | ||
| 63 | int output_count; | ||
| 64 | const char *card_name; | ||
| 65 | }; | ||
| 66 | |||
| 67 | struct vpif_input { | ||
| 68 | struct v4l2_input input; | ||
| 69 | const char *subdev_name; | ||
| 70 | }; | ||
| 71 | |||
| 72 | #define VPIF_CAPTURE_MAX_CHANNELS 2 | ||
| 73 | |||
| 74 | struct vpif_capture_chan_config { | ||
| 75 | const struct vpif_input *inputs; | ||
| 76 | int input_count; | ||
| 77 | }; | ||
| 78 | |||
| 79 | struct vpif_capture_config { | ||
| 80 | int (*setup_input_channel_mode)(int); | ||
| 81 | int (*setup_input_path)(int, const char *); | ||
| 82 | struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS]; | ||
| 83 | struct vpif_subdev_info *subdev_info; | ||
| 84 | int subdev_count; | ||
| 85 | const char *card_name; | ||
| 86 | }; | ||
| 87 | |||
| 88 | void dm646x_setup_vpif(struct vpif_display_config *, | ||
| 89 | struct vpif_capture_config *); | ||
| 25 | 90 | ||
| 26 | #endif /* __ASM_ARCH_DM646X_H */ | 91 | #endif /* __ASM_ARCH_DM646X_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h index 24a379239d7f..eb8bfd7925e7 100644 --- a/arch/arm/mach-davinci/include/mach/edma.h +++ b/arch/arm/mach-davinci/include/mach/edma.h | |||
| @@ -139,6 +139,54 @@ struct edmacc_param { | |||
| 139 | #define DAVINCI_DMA_PWM1 53 | 139 | #define DAVINCI_DMA_PWM1 53 |
| 140 | #define DAVINCI_DMA_PWM2 54 | 140 | #define DAVINCI_DMA_PWM2 54 |
| 141 | 141 | ||
| 142 | /* DA830 specific EDMA3 information */ | ||
| 143 | #define EDMA_DA830_NUM_DMACH 32 | ||
| 144 | #define EDMA_DA830_NUM_TCC 32 | ||
| 145 | #define EDMA_DA830_NUM_PARAMENTRY 128 | ||
| 146 | #define EDMA_DA830_NUM_EVQUE 2 | ||
| 147 | #define EDMA_DA830_NUM_TC 2 | ||
| 148 | #define EDMA_DA830_CHMAP_EXIST 0 | ||
| 149 | #define EDMA_DA830_NUM_REGIONS 4 | ||
| 150 | #define DA830_DMACH2EVENT_MAP0 0x000FC03Fu | ||
| 151 | #define DA830_DMACH2EVENT_MAP1 0x00000000u | ||
| 152 | #define DA830_EDMA_ARM_OWN 0x30FFCCFFu | ||
| 153 | |||
| 154 | /* DA830 specific EDMA3 Events Information */ | ||
| 155 | enum DA830_edma_ch { | ||
| 156 | DA830_DMACH_MCASP0_RX, | ||
| 157 | DA830_DMACH_MCASP0_TX, | ||
| 158 | DA830_DMACH_MCASP1_RX, | ||
| 159 | DA830_DMACH_MCASP1_TX, | ||
| 160 | DA830_DMACH_MCASP2_RX, | ||
| 161 | DA830_DMACH_MCASP2_TX, | ||
| 162 | DA830_DMACH_GPIO_BNK0INT, | ||
| 163 | DA830_DMACH_GPIO_BNK1INT, | ||
| 164 | DA830_DMACH_UART0_RX, | ||
| 165 | DA830_DMACH_UART0_TX, | ||
| 166 | DA830_DMACH_TMR64P0_EVTOUT12, | ||
| 167 | DA830_DMACH_TMR64P0_EVTOUT34, | ||
| 168 | DA830_DMACH_UART1_RX, | ||
| 169 | DA830_DMACH_UART1_TX, | ||
| 170 | DA830_DMACH_SPI0_RX, | ||
| 171 | DA830_DMACH_SPI0_TX, | ||
| 172 | DA830_DMACH_MMCSD_RX, | ||
| 173 | DA830_DMACH_MMCSD_TX, | ||
| 174 | DA830_DMACH_SPI1_RX, | ||
| 175 | DA830_DMACH_SPI1_TX, | ||
| 176 | DA830_DMACH_DMAX_EVTOUT6, | ||
| 177 | DA830_DMACH_DMAX_EVTOUT7, | ||
| 178 | DA830_DMACH_GPIO_BNK2INT, | ||
| 179 | DA830_DMACH_GPIO_BNK3INT, | ||
| 180 | DA830_DMACH_I2C0_RX, | ||
| 181 | DA830_DMACH_I2C0_TX, | ||
| 182 | DA830_DMACH_I2C1_RX, | ||
| 183 | DA830_DMACH_I2C1_TX, | ||
| 184 | DA830_DMACH_GPIO_BNK4INT, | ||
| 185 | DA830_DMACH_GPIO_BNK5INT, | ||
| 186 | DA830_DMACH_UART2_RX, | ||
| 187 | DA830_DMACH_UART2_TX | ||
| 188 | }; | ||
| 189 | |||
| 142 | /*ch_status paramater of callback function possible values*/ | 190 | /*ch_status paramater of callback function possible values*/ |
| 143 | #define DMA_COMPLETE 1 | 191 | #define DMA_COMPLETE 1 |
| 144 | #define DMA_CC_ERROR 2 | 192 | #define DMA_CC_ERROR 2 |
| @@ -162,6 +210,8 @@ enum fifo_width { | |||
| 162 | enum dma_event_q { | 210 | enum dma_event_q { |
| 163 | EVENTQ_0 = 0, | 211 | EVENTQ_0 = 0, |
| 164 | EVENTQ_1 = 1, | 212 | EVENTQ_1 = 1, |
| 213 | EVENTQ_2 = 2, | ||
| 214 | EVENTQ_3 = 3, | ||
| 165 | EVENTQ_DEFAULT = -1 | 215 | EVENTQ_DEFAULT = -1 |
| 166 | }; | 216 | }; |
| 167 | 217 | ||
| @@ -170,8 +220,15 @@ enum sync_dimension { | |||
| 170 | ABSYNC = 1 | 220 | ABSYNC = 1 |
| 171 | }; | 221 | }; |
| 172 | 222 | ||
| 223 | #define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan)) | ||
| 224 | #define EDMA_CTLR(i) ((i) >> 16) | ||
| 225 | #define EDMA_CHAN_SLOT(i) ((i) & 0xffff) | ||
| 226 | |||
| 173 | #define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */ | 227 | #define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */ |
| 174 | #define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */ | 228 | #define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */ |
| 229 | #define EDMA_CONT_PARAMS_ANY 1001 | ||
| 230 | #define EDMA_CONT_PARAMS_FIXED_EXACT 1002 | ||
| 231 | #define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003 | ||
| 175 | 232 | ||
| 176 | /* alloc/free DMA channels and their dedicated parameter RAM slots */ | 233 | /* alloc/free DMA channels and their dedicated parameter RAM slots */ |
| 177 | int edma_alloc_channel(int channel, | 234 | int edma_alloc_channel(int channel, |
| @@ -180,9 +237,13 @@ int edma_alloc_channel(int channel, | |||
| 180 | void edma_free_channel(unsigned channel); | 237 | void edma_free_channel(unsigned channel); |
| 181 | 238 | ||
| 182 | /* alloc/free parameter RAM slots */ | 239 | /* alloc/free parameter RAM slots */ |
| 183 | int edma_alloc_slot(int slot); | 240 | int edma_alloc_slot(unsigned ctlr, int slot); |
| 184 | void edma_free_slot(unsigned slot); | 241 | void edma_free_slot(unsigned slot); |
| 185 | 242 | ||
| 243 | /* alloc/free a set of contiguous parameter RAM slots */ | ||
| 244 | int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count); | ||
| 245 | int edma_free_cont_slots(unsigned slot, int count); | ||
| 246 | |||
| 186 | /* calls that operate on part of a parameter RAM slot */ | 247 | /* calls that operate on part of a parameter RAM slot */ |
| 187 | void edma_set_src(unsigned slot, dma_addr_t src_port, | 248 | void edma_set_src(unsigned slot, dma_addr_t src_port, |
| 188 | enum address_mode mode, enum fifo_width); | 249 | enum address_mode mode, enum fifo_width); |
| @@ -216,9 +277,13 @@ struct edma_soc_info { | |||
| 216 | unsigned n_region; | 277 | unsigned n_region; |
| 217 | unsigned n_slot; | 278 | unsigned n_slot; |
| 218 | unsigned n_tc; | 279 | unsigned n_tc; |
| 280 | unsigned n_cc; | ||
| 281 | enum dma_event_q default_queue; | ||
| 219 | 282 | ||
| 220 | /* list of channels with no even trigger; terminated by "-1" */ | 283 | /* list of channels with no even trigger; terminated by "-1" */ |
| 221 | const s8 *noevent; | 284 | const s8 *noevent; |
| 285 | const s8 (*queue_tc_mapping)[2]; | ||
| 286 | const s8 (*queue_priority_mapping)[2]; | ||
| 222 | }; | 287 | }; |
| 223 | 288 | ||
| 224 | #endif | 289 | #endif |
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index ae0745568316..f3b8ef878158 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h | |||
| @@ -42,6 +42,9 @@ | |||
| 42 | */ | 42 | */ |
| 43 | #define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */ | 43 | #define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */ |
| 44 | 44 | ||
| 45 | /* Convert GPIO signal to GPIO pin number */ | ||
| 46 | #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio)) | ||
| 47 | |||
| 45 | struct gpio_controller { | 48 | struct gpio_controller { |
| 46 | u32 dir; | 49 | u32 dir; |
| 47 | u32 out_data; | 50 | u32 out_data; |
| @@ -78,6 +81,8 @@ __gpio_to_controller(unsigned gpio) | |||
| 78 | ptr = base + 0x60; | 81 | ptr = base + 0x60; |
| 79 | else if (gpio < 32 * 4) | 82 | else if (gpio < 32 * 4) |
| 80 | ptr = base + 0x88; | 83 | ptr = base + 0x88; |
| 84 | else if (gpio < 32 * 5) | ||
| 85 | ptr = base + 0xb0; | ||
| 81 | else | 86 | else |
| 82 | ptr = NULL; | 87 | ptr = NULL; |
| 83 | return ptr; | 88 | return ptr; |
| @@ -142,15 +147,13 @@ static inline int gpio_cansleep(unsigned gpio) | |||
| 142 | 147 | ||
| 143 | static inline int gpio_to_irq(unsigned gpio) | 148 | static inline int gpio_to_irq(unsigned gpio) |
| 144 | { | 149 | { |
| 145 | if (gpio >= DAVINCI_N_GPIO) | 150 | return __gpio_to_irq(gpio); |
| 146 | return -EINVAL; | ||
| 147 | return davinci_soc_info.intc_irq_num + gpio; | ||
| 148 | } | 151 | } |
| 149 | 152 | ||
| 150 | static inline int irq_to_gpio(unsigned irq) | 153 | static inline int irq_to_gpio(unsigned irq) |
| 151 | { | 154 | { |
| 152 | /* caller guarantees gpio_to_irq() succeeded */ | 155 | /* don't support the reverse mapping */ |
| 153 | return irq - davinci_soc_info.intc_irq_num; | 156 | return -ENOSYS; |
| 154 | } | 157 | } |
| 155 | 158 | ||
| 156 | #endif /* __DAVINCI_GPIO_H */ | 159 | #endif /* __DAVINCI_GPIO_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index 48c77934d519..41c89386e39b 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h | |||
| @@ -24,4 +24,21 @@ | |||
| 24 | /* System control register offsets */ | 24 | /* System control register offsets */ |
| 25 | #define DM64XX_VDD3P3V_PWDN 0x48 | 25 | #define DM64XX_VDD3P3V_PWDN 0x48 |
| 26 | 26 | ||
| 27 | /* | ||
| 28 | * I/O mapping | ||
| 29 | */ | ||
| 30 | #define IO_PHYS 0x01c00000 | ||
| 31 | #define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ | ||
| 32 | #define IO_SIZE 0x00400000 | ||
| 33 | #define IO_VIRT (IO_PHYS + IO_OFFSET) | ||
| 34 | #define io_v2p(va) ((va) - IO_OFFSET) | ||
| 35 | #define __IO_ADDRESS(x) ((x) + IO_OFFSET) | ||
| 36 | #define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) | ||
| 37 | |||
| 38 | #ifdef __ASSEMBLER__ | ||
| 39 | #define IOMEM(x) x | ||
| 40 | #else | ||
| 41 | #define IOMEM(x) ((void __force __iomem *)(x)) | ||
| 42 | #endif | ||
| 43 | |||
| 27 | #endif /* __ASM_ARCH_HARDWARE_H */ | 44 | #endif /* __ASM_ARCH_HARDWARE_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h index 2479785405af..62b0a90309ad 100644 --- a/arch/arm/mach-davinci/include/mach/io.h +++ b/arch/arm/mach-davinci/include/mach/io.h | |||
| @@ -14,18 +14,6 @@ | |||
| 14 | #define IO_SPACE_LIMIT 0xffffffff | 14 | #define IO_SPACE_LIMIT 0xffffffff |
| 15 | 15 | ||
| 16 | /* | 16 | /* |
| 17 | * ---------------------------------------------------------------------------- | ||
| 18 | * I/O mapping | ||
| 19 | * ---------------------------------------------------------------------------- | ||
| 20 | */ | ||
| 21 | #define IO_PHYS 0x01c00000 | ||
| 22 | #define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ | ||
| 23 | #define IO_SIZE 0x00400000 | ||
| 24 | #define IO_VIRT (IO_PHYS + IO_OFFSET) | ||
| 25 | #define io_v2p(va) ((va) - IO_OFFSET) | ||
| 26 | #define __IO_ADDRESS(x) ((x) + IO_OFFSET) | ||
| 27 | |||
| 28 | /* | ||
| 29 | * We don't actually have real ISA nor PCI buses, but there is so many | 17 | * We don't actually have real ISA nor PCI buses, but there is so many |
| 30 | * drivers out there that might just work if we fake them... | 18 | * drivers out there that might just work if we fake them... |
| 31 | */ | 19 | */ |
| @@ -33,19 +21,12 @@ | |||
| 33 | #define __mem_pci(a) (a) | 21 | #define __mem_pci(a) (a) |
| 34 | #define __mem_isa(a) (a) | 22 | #define __mem_isa(a) (a) |
| 35 | 23 | ||
| 36 | #define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) | 24 | #ifndef __ASSEMBLER__ |
| 37 | |||
| 38 | #ifdef __ASSEMBLER__ | ||
| 39 | #define IOMEM(x) x | ||
| 40 | #else | ||
| 41 | #define IOMEM(x) ((void __force __iomem *)(x)) | ||
| 42 | |||
| 43 | #define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t) | 25 | #define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t) |
| 44 | #define __arch_iounmap(v) davinci_iounmap(v) | 26 | #define __arch_iounmap(v) davinci_iounmap(v) |
| 45 | 27 | ||
| 46 | void __iomem *davinci_ioremap(unsigned long phys, size_t size, | 28 | void __iomem *davinci_ioremap(unsigned long phys, size_t size, |
| 47 | unsigned int type); | 29 | unsigned int type); |
| 48 | void davinci_iounmap(volatile void __iomem *addr); | 30 | void davinci_iounmap(volatile void __iomem *addr); |
| 49 | 31 | #endif | |
| 50 | #endif /* __ASSEMBLER__ */ | ||
| 51 | #endif /* __ASM_ARCH_IO_H */ | 32 | #endif /* __ASM_ARCH_IO_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index bc5d6aaa69a3..3c918a772619 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h | |||
| @@ -99,9 +99,6 @@ | |||
| 99 | #define IRQ_EMUINT 63 | 99 | #define IRQ_EMUINT 63 |
| 100 | 100 | ||
| 101 | #define DAVINCI_N_AINTC_IRQ 64 | 101 | #define DAVINCI_N_AINTC_IRQ 64 |
| 102 | #define DAVINCI_N_GPIO 104 | ||
| 103 | |||
| 104 | #define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO) | ||
| 105 | 102 | ||
| 106 | #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 | 103 | #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 |
| 107 | 104 | ||
| @@ -206,4 +203,206 @@ | |||
| 206 | #define IRQ_DM355_GPIOBNK5 59 | 203 | #define IRQ_DM355_GPIOBNK5 59 |
| 207 | #define IRQ_DM355_GPIOBNK6 60 | 204 | #define IRQ_DM355_GPIOBNK6 60 |
| 208 | 205 | ||
| 206 | /* DaVinci DM365-specific Interrupts */ | ||
| 207 | #define IRQ_DM365_INSFINT 7 | ||
| 208 | #define IRQ_DM365_IMXINT1 8 | ||
| 209 | #define IRQ_DM365_IMXINT0 10 | ||
| 210 | #define IRQ_DM365_KLD_ARMINT 10 | ||
| 211 | #define IRQ_DM365_IMCOPINT 11 | ||
| 212 | #define IRQ_DM365_RTOINT 13 | ||
| 213 | #define IRQ_DM365_TINT5 14 | ||
| 214 | #define IRQ_DM365_TINT6 15 | ||
| 215 | #define IRQ_DM365_SPINT2_1 21 | ||
| 216 | #define IRQ_DM365_TINT7 22 | ||
| 217 | #define IRQ_DM365_SDIOINT0 23 | ||
| 218 | #define IRQ_DM365_MMCINT1 27 | ||
| 219 | #define IRQ_DM365_PWMINT3 28 | ||
| 220 | #define IRQ_DM365_SDIOINT1 31 | ||
| 221 | #define IRQ_DM365_SPIINT0_0 42 | ||
| 222 | #define IRQ_DM365_SPIINT3_0 43 | ||
| 223 | #define IRQ_DM365_GPIO0 44 | ||
| 224 | #define IRQ_DM365_GPIO1 45 | ||
| 225 | #define IRQ_DM365_GPIO2 46 | ||
| 226 | #define IRQ_DM365_GPIO3 47 | ||
| 227 | #define IRQ_DM365_GPIO4 48 | ||
| 228 | #define IRQ_DM365_GPIO5 49 | ||
| 229 | #define IRQ_DM365_GPIO6 50 | ||
| 230 | #define IRQ_DM365_GPIO7 51 | ||
| 231 | #define IRQ_DM365_EMAC_RXTHRESH 52 | ||
| 232 | #define IRQ_DM365_EMAC_RXPULSE 53 | ||
| 233 | #define IRQ_DM365_EMAC_TXPULSE 54 | ||
| 234 | #define IRQ_DM365_EMAC_MISCPULSE 55 | ||
| 235 | #define IRQ_DM365_GPIO12 56 | ||
| 236 | #define IRQ_DM365_GPIO13 57 | ||
| 237 | #define IRQ_DM365_GPIO14 58 | ||
| 238 | #define IRQ_DM365_GPIO15 59 | ||
| 239 | #define IRQ_DM365_ADCINT 59 | ||
| 240 | #define IRQ_DM365_KEYINT 60 | ||
| 241 | #define IRQ_DM365_TCERRINT2 61 | ||
| 242 | #define IRQ_DM365_TCERRINT3 62 | ||
| 243 | #define IRQ_DM365_EMUINT 63 | ||
| 244 | |||
| 245 | /* DA8XX interrupts */ | ||
| 246 | #define IRQ_DA8XX_COMMTX 0 | ||
| 247 | #define IRQ_DA8XX_COMMRX 1 | ||
| 248 | #define IRQ_DA8XX_NINT 2 | ||
| 249 | #define IRQ_DA8XX_EVTOUT0 3 | ||
| 250 | #define IRQ_DA8XX_EVTOUT1 4 | ||
| 251 | #define IRQ_DA8XX_EVTOUT2 5 | ||
| 252 | #define IRQ_DA8XX_EVTOUT3 6 | ||
| 253 | #define IRQ_DA8XX_EVTOUT4 7 | ||
| 254 | #define IRQ_DA8XX_EVTOUT5 8 | ||
| 255 | #define IRQ_DA8XX_EVTOUT6 9 | ||
| 256 | #define IRQ_DA8XX_EVTOUT7 10 | ||
| 257 | #define IRQ_DA8XX_CCINT0 11 | ||
| 258 | #define IRQ_DA8XX_CCERRINT 12 | ||
| 259 | #define IRQ_DA8XX_TCERRINT0 13 | ||
| 260 | #define IRQ_DA8XX_AEMIFINT 14 | ||
| 261 | #define IRQ_DA8XX_I2CINT0 15 | ||
| 262 | #define IRQ_DA8XX_MMCSDINT0 16 | ||
| 263 | #define IRQ_DA8XX_MMCSDINT1 17 | ||
| 264 | #define IRQ_DA8XX_ALLINT0 18 | ||
| 265 | #define IRQ_DA8XX_RTC 19 | ||
| 266 | #define IRQ_DA8XX_SPINT0 20 | ||
| 267 | #define IRQ_DA8XX_TINT12_0 21 | ||
| 268 | #define IRQ_DA8XX_TINT34_0 22 | ||
| 269 | #define IRQ_DA8XX_TINT12_1 23 | ||
| 270 | #define IRQ_DA8XX_TINT34_1 24 | ||
| 271 | #define IRQ_DA8XX_UARTINT0 25 | ||
| 272 | #define IRQ_DA8XX_KEYMGRINT 26 | ||
| 273 | #define IRQ_DA8XX_SECINT 26 | ||
| 274 | #define IRQ_DA8XX_SECKEYERR 26 | ||
| 275 | #define IRQ_DA8XX_CHIPINT0 28 | ||
| 276 | #define IRQ_DA8XX_CHIPINT1 29 | ||
| 277 | #define IRQ_DA8XX_CHIPINT2 30 | ||
| 278 | #define IRQ_DA8XX_CHIPINT3 31 | ||
| 279 | #define IRQ_DA8XX_TCERRINT1 32 | ||
| 280 | #define IRQ_DA8XX_C0_RX_THRESH_PULSE 33 | ||
| 281 | #define IRQ_DA8XX_C0_RX_PULSE 34 | ||
| 282 | #define IRQ_DA8XX_C0_TX_PULSE 35 | ||
| 283 | #define IRQ_DA8XX_C0_MISC_PULSE 36 | ||
| 284 | #define IRQ_DA8XX_C1_RX_THRESH_PULSE 37 | ||
| 285 | #define IRQ_DA8XX_C1_RX_PULSE 38 | ||
| 286 | #define IRQ_DA8XX_C1_TX_PULSE 39 | ||
| 287 | #define IRQ_DA8XX_C1_MISC_PULSE 40 | ||
| 288 | #define IRQ_DA8XX_MEMERR 41 | ||
| 289 | #define IRQ_DA8XX_GPIO0 42 | ||
| 290 | #define IRQ_DA8XX_GPIO1 43 | ||
| 291 | #define IRQ_DA8XX_GPIO2 44 | ||
| 292 | #define IRQ_DA8XX_GPIO3 45 | ||
| 293 | #define IRQ_DA8XX_GPIO4 46 | ||
| 294 | #define IRQ_DA8XX_GPIO5 47 | ||
| 295 | #define IRQ_DA8XX_GPIO6 48 | ||
| 296 | #define IRQ_DA8XX_GPIO7 49 | ||
| 297 | #define IRQ_DA8XX_GPIO8 50 | ||
| 298 | #define IRQ_DA8XX_I2CINT1 51 | ||
| 299 | #define IRQ_DA8XX_LCDINT 52 | ||
| 300 | #define IRQ_DA8XX_UARTINT1 53 | ||
| 301 | #define IRQ_DA8XX_MCASPINT 54 | ||
| 302 | #define IRQ_DA8XX_ALLINT1 55 | ||
| 303 | #define IRQ_DA8XX_SPINT1 56 | ||
| 304 | #define IRQ_DA8XX_UHPI_INT1 57 | ||
| 305 | #define IRQ_DA8XX_USB_INT 58 | ||
| 306 | #define IRQ_DA8XX_IRQN 59 | ||
| 307 | #define IRQ_DA8XX_RWAKEUP 60 | ||
| 308 | #define IRQ_DA8XX_UARTINT2 61 | ||
| 309 | #define IRQ_DA8XX_DFTSSINT 62 | ||
| 310 | #define IRQ_DA8XX_EHRPWM0 63 | ||
| 311 | #define IRQ_DA8XX_EHRPWM0TZ 64 | ||
| 312 | #define IRQ_DA8XX_EHRPWM1 65 | ||
| 313 | #define IRQ_DA8XX_EHRPWM1TZ 66 | ||
| 314 | #define IRQ_DA8XX_ECAP0 69 | ||
| 315 | #define IRQ_DA8XX_ECAP1 70 | ||
| 316 | #define IRQ_DA8XX_ECAP2 71 | ||
| 317 | #define IRQ_DA8XX_ARMCLKSTOPREQ 90 | ||
| 318 | |||
| 319 | /* DA830 specific interrupts */ | ||
| 320 | #define IRQ_DA830_MPUERR 27 | ||
| 321 | #define IRQ_DA830_IOPUERR 27 | ||
| 322 | #define IRQ_DA830_BOOTCFGERR 27 | ||
| 323 | #define IRQ_DA830_EHRPWM2 67 | ||
| 324 | #define IRQ_DA830_EHRPWM2TZ 68 | ||
| 325 | #define IRQ_DA830_EQEP0 72 | ||
| 326 | #define IRQ_DA830_EQEP1 73 | ||
| 327 | #define IRQ_DA830_T12CMPINT0_0 74 | ||
| 328 | #define IRQ_DA830_T12CMPINT1_0 75 | ||
| 329 | #define IRQ_DA830_T12CMPINT2_0 76 | ||
| 330 | #define IRQ_DA830_T12CMPINT3_0 77 | ||
| 331 | #define IRQ_DA830_T12CMPINT4_0 78 | ||
| 332 | #define IRQ_DA830_T12CMPINT5_0 79 | ||
| 333 | #define IRQ_DA830_T12CMPINT6_0 80 | ||
| 334 | #define IRQ_DA830_T12CMPINT7_0 81 | ||
| 335 | #define IRQ_DA830_T12CMPINT0_1 82 | ||
| 336 | #define IRQ_DA830_T12CMPINT1_1 83 | ||
| 337 | #define IRQ_DA830_T12CMPINT2_1 84 | ||
| 338 | #define IRQ_DA830_T12CMPINT3_1 85 | ||
| 339 | #define IRQ_DA830_T12CMPINT4_1 86 | ||
| 340 | #define IRQ_DA830_T12CMPINT5_1 87 | ||
| 341 | #define IRQ_DA830_T12CMPINT6_1 88 | ||
| 342 | #define IRQ_DA830_T12CMPINT7_1 89 | ||
| 343 | |||
| 344 | #define DA830_N_CP_INTC_IRQ 96 | ||
| 345 | |||
| 346 | /* DA850 speicific interrupts */ | ||
| 347 | #define IRQ_DA850_MPUADDRERR0 27 | ||
| 348 | #define IRQ_DA850_MPUPROTERR0 27 | ||
| 349 | #define IRQ_DA850_IOPUADDRERR0 27 | ||
| 350 | #define IRQ_DA850_IOPUPROTERR0 27 | ||
| 351 | #define IRQ_DA850_IOPUADDRERR1 27 | ||
| 352 | #define IRQ_DA850_IOPUPROTERR1 27 | ||
| 353 | #define IRQ_DA850_IOPUADDRERR2 27 | ||
| 354 | #define IRQ_DA850_IOPUPROTERR2 27 | ||
| 355 | #define IRQ_DA850_BOOTCFG_ADDR_ERR 27 | ||
| 356 | #define IRQ_DA850_BOOTCFG_PROT_ERR 27 | ||
| 357 | #define IRQ_DA850_MPUADDRERR1 27 | ||
| 358 | #define IRQ_DA850_MPUPROTERR1 27 | ||
| 359 | #define IRQ_DA850_IOPUADDRERR3 27 | ||
| 360 | #define IRQ_DA850_IOPUPROTERR3 27 | ||
| 361 | #define IRQ_DA850_IOPUADDRERR4 27 | ||
| 362 | #define IRQ_DA850_IOPUPROTERR4 27 | ||
| 363 | #define IRQ_DA850_IOPUADDRERR5 27 | ||
| 364 | #define IRQ_DA850_IOPUPROTERR5 27 | ||
| 365 | #define IRQ_DA850_MIOPU_BOOTCFG_ERR 27 | ||
| 366 | #define IRQ_DA850_SATAINT 67 | ||
| 367 | #define IRQ_DA850_TINT12_2 68 | ||
| 368 | #define IRQ_DA850_TINT34_2 68 | ||
| 369 | #define IRQ_DA850_TINTALL_2 68 | ||
| 370 | #define IRQ_DA850_MMCSDINT0_1 72 | ||
| 371 | #define IRQ_DA850_MMCSDINT1_1 73 | ||
| 372 | #define IRQ_DA850_T12CMPINT0_2 74 | ||
| 373 | #define IRQ_DA850_T12CMPINT1_2 75 | ||
| 374 | #define IRQ_DA850_T12CMPINT2_2 76 | ||
| 375 | #define IRQ_DA850_T12CMPINT3_2 77 | ||
| 376 | #define IRQ_DA850_T12CMPINT4_2 78 | ||
| 377 | #define IRQ_DA850_T12CMPINT5_2 79 | ||
| 378 | #define IRQ_DA850_T12CMPINT6_2 80 | ||
| 379 | #define IRQ_DA850_T12CMPINT7_2 81 | ||
| 380 | #define IRQ_DA850_T12CMPINT0_3 82 | ||
| 381 | #define IRQ_DA850_T12CMPINT1_3 83 | ||
| 382 | #define IRQ_DA850_T12CMPINT2_3 84 | ||
| 383 | #define IRQ_DA850_T12CMPINT3_3 85 | ||
| 384 | #define IRQ_DA850_T12CMPINT4_3 86 | ||
| 385 | #define IRQ_DA850_T12CMPINT5_3 87 | ||
| 386 | #define IRQ_DA850_T12CMPINT6_3 88 | ||
| 387 | #define IRQ_DA850_T12CMPINT7_3 89 | ||
| 388 | #define IRQ_DA850_RPIINT 91 | ||
| 389 | #define IRQ_DA850_VPIFINT 92 | ||
| 390 | #define IRQ_DA850_CCINT1 93 | ||
| 391 | #define IRQ_DA850_CCERRINT1 94 | ||
| 392 | #define IRQ_DA850_TCERRINT2 95 | ||
| 393 | #define IRQ_DA850_TINT12_3 96 | ||
| 394 | #define IRQ_DA850_TINT34_3 96 | ||
| 395 | #define IRQ_DA850_TINTALL_3 96 | ||
| 396 | #define IRQ_DA850_MCBSP0RINT 97 | ||
| 397 | #define IRQ_DA850_MCBSP0XINT 98 | ||
| 398 | #define IRQ_DA850_MCBSP1RINT 99 | ||
| 399 | #define IRQ_DA850_MCBSP1XINT 100 | ||
| 400 | |||
| 401 | #define DA850_N_CP_INTC_IRQ 101 | ||
| 402 | |||
| 403 | /* da850 currently has the most gpio pins (144) */ | ||
| 404 | #define DAVINCI_N_GPIO 144 | ||
| 405 | /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ | ||
| 406 | #define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO) | ||
| 407 | |||
| 209 | #endif /* __ASM_ARCH_IRQS_H */ | 408 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h index c712c7cdf38f..80309aed534a 100644 --- a/arch/arm/mach-davinci/include/mach/memory.h +++ b/arch/arm/mach-davinci/include/mach/memory.h | |||
| @@ -20,9 +20,16 @@ | |||
| 20 | /************************************************************************** | 20 | /************************************************************************** |
| 21 | * Definitions | 21 | * Definitions |
| 22 | **************************************************************************/ | 22 | **************************************************************************/ |
| 23 | #define DAVINCI_DDR_BASE 0x80000000 | 23 | #define DAVINCI_DDR_BASE 0x80000000 |
| 24 | #define DA8XX_DDR_BASE 0xc0000000 | ||
| 24 | 25 | ||
| 26 | #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) | ||
| 27 | #error Cannot enable DaVinci and DA8XX platforms concurrently | ||
| 28 | #elif defined(CONFIG_ARCH_DAVINCI_DA8XX) | ||
| 29 | #define PHYS_OFFSET DA8XX_DDR_BASE | ||
| 30 | #else | ||
| 25 | #define PHYS_OFFSET DAVINCI_DDR_BASE | 31 | #define PHYS_OFFSET DAVINCI_DDR_BASE |
| 32 | #endif | ||
| 26 | 33 | ||
| 27 | /* | 34 | /* |
| 28 | * Increase size of DMA-consistent memory region | 35 | * Increase size of DMA-consistent memory region |
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index 27378458542f..bb84893a4e83 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h | |||
| @@ -154,6 +154,737 @@ enum davinci_dm355_index { | |||
| 154 | DM355_EVT8_ASP1_TX, | 154 | DM355_EVT8_ASP1_TX, |
| 155 | DM355_EVT9_ASP1_RX, | 155 | DM355_EVT9_ASP1_RX, |
| 156 | DM355_EVT26_MMC0_RX, | 156 | DM355_EVT26_MMC0_RX, |
| 157 | |||
| 158 | /* Video Out */ | ||
| 159 | DM355_VOUT_FIELD, | ||
| 160 | DM355_VOUT_FIELD_G70, | ||
| 161 | DM355_VOUT_HVSYNC, | ||
| 162 | DM355_VOUT_COUTL_EN, | ||
| 163 | DM355_VOUT_COUTH_EN, | ||
| 164 | |||
| 165 | /* Video In Pin Mux */ | ||
| 166 | DM355_VIN_PCLK, | ||
| 167 | DM355_VIN_CAM_WEN, | ||
| 168 | DM355_VIN_CAM_VD, | ||
| 169 | DM355_VIN_CAM_HD, | ||
| 170 | DM355_VIN_YIN_EN, | ||
| 171 | DM355_VIN_CINL_EN, | ||
| 172 | DM355_VIN_CINH_EN, | ||
| 173 | }; | ||
| 174 | |||
| 175 | enum davinci_dm365_index { | ||
| 176 | /* MMC/SD 0 */ | ||
| 177 | DM365_MMCSD0, | ||
| 178 | |||
| 179 | /* MMC/SD 1 */ | ||
| 180 | DM365_SD1_CLK, | ||
| 181 | DM365_SD1_CMD, | ||
| 182 | DM365_SD1_DATA3, | ||
| 183 | DM365_SD1_DATA2, | ||
| 184 | DM365_SD1_DATA1, | ||
| 185 | DM365_SD1_DATA0, | ||
| 186 | |||
| 187 | /* I2C */ | ||
| 188 | DM365_I2C_SDA, | ||
| 189 | DM365_I2C_SCL, | ||
| 190 | |||
| 191 | /* AEMIF */ | ||
| 192 | DM365_AEMIF_AR, | ||
| 193 | DM365_AEMIF_A3, | ||
| 194 | DM365_AEMIF_A7, | ||
| 195 | DM365_AEMIF_D15_8, | ||
| 196 | DM365_AEMIF_CE0, | ||
| 197 | |||
| 198 | /* ASP0 function */ | ||
| 199 | DM365_MCBSP0_BDX, | ||
| 200 | DM365_MCBSP0_X, | ||
| 201 | DM365_MCBSP0_BFSX, | ||
| 202 | DM365_MCBSP0_BDR, | ||
| 203 | DM365_MCBSP0_R, | ||
| 204 | DM365_MCBSP0_BFSR, | ||
| 205 | |||
| 206 | /* SPI0 */ | ||
| 207 | DM365_SPI0_SCLK, | ||
| 208 | DM365_SPI0_SDI, | ||
| 209 | DM365_SPI0_SDO, | ||
| 210 | DM365_SPI0_SDENA0, | ||
| 211 | DM365_SPI0_SDENA1, | ||
| 212 | |||
| 213 | /* UART */ | ||
| 214 | DM365_UART0_RXD, | ||
| 215 | DM365_UART0_TXD, | ||
| 216 | DM365_UART1_RXD, | ||
| 217 | DM365_UART1_TXD, | ||
| 218 | DM365_UART1_RTS, | ||
| 219 | DM365_UART1_CTS, | ||
| 220 | |||
| 221 | /* EMAC */ | ||
| 222 | DM365_EMAC_TX_EN, | ||
| 223 | DM365_EMAC_TX_CLK, | ||
| 224 | DM365_EMAC_COL, | ||
| 225 | DM365_EMAC_TXD3, | ||
| 226 | DM365_EMAC_TXD2, | ||
| 227 | DM365_EMAC_TXD1, | ||
| 228 | DM365_EMAC_TXD0, | ||
| 229 | DM365_EMAC_RXD3, | ||
| 230 | DM365_EMAC_RXD2, | ||
| 231 | DM365_EMAC_RXD1, | ||
| 232 | DM365_EMAC_RXD0, | ||
| 233 | DM365_EMAC_RX_CLK, | ||
| 234 | DM365_EMAC_RX_DV, | ||
| 235 | DM365_EMAC_RX_ER, | ||
| 236 | DM365_EMAC_CRS, | ||
| 237 | DM365_EMAC_MDIO, | ||
| 238 | DM365_EMAC_MDCLK, | ||
| 239 | |||
| 240 | /* Keypad */ | ||
| 241 | DM365_KEYPAD, | ||
| 242 | |||
| 243 | /* PWM */ | ||
| 244 | DM365_PWM0, | ||
| 245 | DM365_PWM0_G23, | ||
| 246 | DM365_PWM1, | ||
| 247 | DM365_PWM1_G25, | ||
| 248 | DM365_PWM2_G87, | ||
| 249 | DM365_PWM2_G88, | ||
| 250 | DM365_PWM2_G89, | ||
| 251 | DM365_PWM2_G90, | ||
| 252 | DM365_PWM3_G80, | ||
| 253 | DM365_PWM3_G81, | ||
| 254 | DM365_PWM3_G85, | ||
| 255 | DM365_PWM3_G86, | ||
| 256 | |||
| 257 | /* SPI1 */ | ||
| 258 | DM365_SPI1_SCLK, | ||
| 259 | DM365_SPI1_SDO, | ||
| 260 | DM365_SPI1_SDI, | ||
| 261 | DM365_SPI1_SDENA0, | ||
| 262 | DM365_SPI1_SDENA1, | ||
| 263 | |||
| 264 | /* SPI2 */ | ||
| 265 | DM365_SPI2_SCLK, | ||
| 266 | DM365_SPI2_SDO, | ||
| 267 | DM365_SPI2_SDI, | ||
| 268 | DM365_SPI2_SDENA0, | ||
| 269 | DM365_SPI2_SDENA1, | ||
| 270 | |||
| 271 | /* SPI3 */ | ||
| 272 | DM365_SPI3_SCLK, | ||
| 273 | DM365_SPI3_SDO, | ||
| 274 | DM365_SPI3_SDI, | ||
| 275 | DM365_SPI3_SDENA0, | ||
| 276 | DM365_SPI3_SDENA1, | ||
| 277 | |||
| 278 | /* SPI4 */ | ||
| 279 | DM365_SPI4_SCLK, | ||
| 280 | DM365_SPI4_SDO, | ||
| 281 | DM365_SPI4_SDI, | ||
| 282 | DM365_SPI4_SDENA0, | ||
| 283 | DM365_SPI4_SDENA1, | ||
| 284 | |||
| 285 | /* GPIO */ | ||
| 286 | DM365_GPIO20, | ||
| 287 | DM365_GPIO33, | ||
| 288 | DM365_GPIO40, | ||
| 289 | |||
| 290 | /* Video */ | ||
| 291 | DM365_VOUT_FIELD, | ||
| 292 | DM365_VOUT_FIELD_G81, | ||
| 293 | DM365_VOUT_HVSYNC, | ||
| 294 | DM365_VOUT_COUTL_EN, | ||
| 295 | DM365_VOUT_COUTH_EN, | ||
| 296 | DM365_VIN_CAM_WEN, | ||
| 297 | DM365_VIN_CAM_VD, | ||
| 298 | DM365_VIN_CAM_HD, | ||
| 299 | DM365_VIN_YIN4_7_EN, | ||
| 300 | DM365_VIN_YIN0_3_EN, | ||
| 301 | |||
| 302 | /* IRQ muxing */ | ||
| 303 | DM365_INT_EDMA_CC, | ||
| 304 | DM365_INT_EDMA_TC0_ERR, | ||
| 305 | DM365_INT_EDMA_TC1_ERR, | ||
| 306 | DM365_INT_EDMA_TC2_ERR, | ||
| 307 | DM365_INT_EDMA_TC3_ERR, | ||
| 308 | DM365_INT_PRTCSS, | ||
| 309 | DM365_INT_EMAC_RXTHRESH, | ||
| 310 | DM365_INT_EMAC_RXPULSE, | ||
| 311 | DM365_INT_EMAC_TXPULSE, | ||
| 312 | DM365_INT_EMAC_MISCPULSE, | ||
| 313 | DM365_INT_IMX0_ENABLE, | ||
| 314 | DM365_INT_IMX0_DISABLE, | ||
| 315 | DM365_INT_HDVICP_ENABLE, | ||
| 316 | DM365_INT_HDVICP_DISABLE, | ||
| 317 | DM365_INT_IMX1_ENABLE, | ||
| 318 | DM365_INT_IMX1_DISABLE, | ||
| 319 | DM365_INT_NSF_ENABLE, | ||
| 320 | DM365_INT_NSF_DISABLE, | ||
| 321 | |||
| 322 | /* EDMA event muxing */ | ||
| 323 | DM365_EVT2_ASP_TX, | ||
| 324 | DM365_EVT3_ASP_RX, | ||
| 325 | DM365_EVT26_MMC0_RX, | ||
| 326 | }; | ||
| 327 | |||
| 328 | enum da830_index { | ||
| 329 | DA830_GPIO7_14, | ||
| 330 | DA830_RTCK, | ||
| 331 | DA830_GPIO7_15, | ||
| 332 | DA830_EMU_0, | ||
| 333 | DA830_EMB_SDCKE, | ||
| 334 | DA830_EMB_CLK_GLUE, | ||
| 335 | DA830_EMB_CLK, | ||
| 336 | DA830_NEMB_CS_0, | ||
| 337 | DA830_NEMB_CAS, | ||
| 338 | DA830_NEMB_RAS, | ||
| 339 | DA830_NEMB_WE, | ||
| 340 | DA830_EMB_BA_1, | ||
| 341 | DA830_EMB_BA_0, | ||
| 342 | DA830_EMB_A_0, | ||
| 343 | DA830_EMB_A_1, | ||
| 344 | DA830_EMB_A_2, | ||
| 345 | DA830_EMB_A_3, | ||
| 346 | DA830_EMB_A_4, | ||
| 347 | DA830_EMB_A_5, | ||
| 348 | DA830_GPIO7_0, | ||
| 349 | DA830_GPIO7_1, | ||
| 350 | DA830_GPIO7_2, | ||
| 351 | DA830_GPIO7_3, | ||
| 352 | DA830_GPIO7_4, | ||
| 353 | DA830_GPIO7_5, | ||
| 354 | DA830_GPIO7_6, | ||
| 355 | DA830_GPIO7_7, | ||
| 356 | DA830_EMB_A_6, | ||
| 357 | DA830_EMB_A_7, | ||
| 358 | DA830_EMB_A_8, | ||
| 359 | DA830_EMB_A_9, | ||
| 360 | DA830_EMB_A_10, | ||
| 361 | DA830_EMB_A_11, | ||
| 362 | DA830_EMB_A_12, | ||
| 363 | DA830_EMB_D_31, | ||
| 364 | DA830_GPIO7_8, | ||
| 365 | DA830_GPIO7_9, | ||
| 366 | DA830_GPIO7_10, | ||
| 367 | DA830_GPIO7_11, | ||
| 368 | DA830_GPIO7_12, | ||
| 369 | DA830_GPIO7_13, | ||
| 370 | DA830_GPIO3_13, | ||
| 371 | DA830_EMB_D_30, | ||
| 372 | DA830_EMB_D_29, | ||
| 373 | DA830_EMB_D_28, | ||
| 374 | DA830_EMB_D_27, | ||
| 375 | DA830_EMB_D_26, | ||
| 376 | DA830_EMB_D_25, | ||
| 377 | DA830_EMB_D_24, | ||
| 378 | DA830_EMB_D_23, | ||
| 379 | DA830_EMB_D_22, | ||
| 380 | DA830_EMB_D_21, | ||
| 381 | DA830_EMB_D_20, | ||
| 382 | DA830_EMB_D_19, | ||
| 383 | DA830_EMB_D_18, | ||
| 384 | DA830_EMB_D_17, | ||
| 385 | DA830_EMB_D_16, | ||
| 386 | DA830_NEMB_WE_DQM_3, | ||
| 387 | DA830_NEMB_WE_DQM_2, | ||
| 388 | DA830_EMB_D_0, | ||
| 389 | DA830_EMB_D_1, | ||
| 390 | DA830_EMB_D_2, | ||
| 391 | DA830_EMB_D_3, | ||
| 392 | DA830_EMB_D_4, | ||
| 393 | DA830_EMB_D_5, | ||
| 394 | DA830_EMB_D_6, | ||
| 395 | DA830_GPIO6_0, | ||
| 396 | DA830_GPIO6_1, | ||
| 397 | DA830_GPIO6_2, | ||
| 398 | DA830_GPIO6_3, | ||
| 399 | DA830_GPIO6_4, | ||
| 400 | DA830_GPIO6_5, | ||
| 401 | DA830_GPIO6_6, | ||
| 402 | DA830_EMB_D_7, | ||
| 403 | DA830_EMB_D_8, | ||
| 404 | DA830_EMB_D_9, | ||
| 405 | DA830_EMB_D_10, | ||
| 406 | DA830_EMB_D_11, | ||
| 407 | DA830_EMB_D_12, | ||
| 408 | DA830_EMB_D_13, | ||
| 409 | DA830_EMB_D_14, | ||
| 410 | DA830_GPIO6_7, | ||
| 411 | DA830_GPIO6_8, | ||
| 412 | DA830_GPIO6_9, | ||
| 413 | DA830_GPIO6_10, | ||
| 414 | DA830_GPIO6_11, | ||
| 415 | DA830_GPIO6_12, | ||
| 416 | DA830_GPIO6_13, | ||
| 417 | DA830_GPIO6_14, | ||
| 418 | DA830_EMB_D_15, | ||
| 419 | DA830_NEMB_WE_DQM_1, | ||
| 420 | DA830_NEMB_WE_DQM_0, | ||
| 421 | DA830_SPI0_SOMI_0, | ||
| 422 | DA830_SPI0_SIMO_0, | ||
| 423 | DA830_SPI0_CLK, | ||
| 424 | DA830_NSPI0_ENA, | ||
| 425 | DA830_NSPI0_SCS_0, | ||
| 426 | DA830_EQEP0I, | ||
| 427 | DA830_EQEP0S, | ||
| 428 | DA830_EQEP1I, | ||
| 429 | DA830_NUART0_CTS, | ||
| 430 | DA830_NUART0_RTS, | ||
| 431 | DA830_EQEP0A, | ||
| 432 | DA830_EQEP0B, | ||
| 433 | DA830_GPIO6_15, | ||
| 434 | DA830_GPIO5_14, | ||
| 435 | DA830_GPIO5_15, | ||
| 436 | DA830_GPIO5_0, | ||
| 437 | DA830_GPIO5_1, | ||
| 438 | DA830_GPIO5_2, | ||
| 439 | DA830_GPIO5_3, | ||
| 440 | DA830_GPIO5_4, | ||
| 441 | DA830_SPI1_SOMI_0, | ||
| 442 | DA830_SPI1_SIMO_0, | ||
| 443 | DA830_SPI1_CLK, | ||
| 444 | DA830_UART0_RXD, | ||
| 445 | DA830_UART0_TXD, | ||
| 446 | DA830_AXR1_10, | ||
| 447 | DA830_AXR1_11, | ||
| 448 | DA830_NSPI1_ENA, | ||
| 449 | DA830_I2C1_SCL, | ||
| 450 | DA830_I2C1_SDA, | ||
| 451 | DA830_EQEP1S, | ||
| 452 | DA830_I2C0_SDA, | ||
| 453 | DA830_I2C0_SCL, | ||
| 454 | DA830_UART2_RXD, | ||
| 455 | DA830_TM64P0_IN12, | ||
| 456 | DA830_TM64P0_OUT12, | ||
| 457 | DA830_GPIO5_5, | ||
| 458 | DA830_GPIO5_6, | ||
| 459 | DA830_GPIO5_7, | ||
| 460 | DA830_GPIO5_8, | ||
| 461 | DA830_GPIO5_9, | ||
| 462 | DA830_GPIO5_10, | ||
| 463 | DA830_GPIO5_11, | ||
| 464 | DA830_GPIO5_12, | ||
| 465 | DA830_NSPI1_SCS_0, | ||
| 466 | DA830_USB0_DRVVBUS, | ||
| 467 | DA830_AHCLKX0, | ||
| 468 | DA830_ACLKX0, | ||
| 469 | DA830_AFSX0, | ||
| 470 | DA830_AHCLKR0, | ||
| 471 | DA830_ACLKR0, | ||
| 472 | DA830_AFSR0, | ||
| 473 | DA830_UART2_TXD, | ||
| 474 | DA830_AHCLKX2, | ||
| 475 | DA830_ECAP0_APWM0, | ||
| 476 | DA830_RMII_MHZ_50_CLK, | ||
| 477 | DA830_ECAP1_APWM1, | ||
| 478 | DA830_USB_REFCLKIN, | ||
| 479 | DA830_GPIO5_13, | ||
| 480 | DA830_GPIO4_15, | ||
| 481 | DA830_GPIO2_11, | ||
| 482 | DA830_GPIO2_12, | ||
| 483 | DA830_GPIO2_13, | ||
| 484 | DA830_GPIO2_14, | ||
| 485 | DA830_GPIO2_15, | ||
| 486 | DA830_GPIO3_12, | ||
| 487 | DA830_AMUTE0, | ||
| 488 | DA830_AXR0_0, | ||
| 489 | DA830_AXR0_1, | ||
| 490 | DA830_AXR0_2, | ||
| 491 | DA830_AXR0_3, | ||
| 492 | DA830_AXR0_4, | ||
| 493 | DA830_AXR0_5, | ||
| 494 | DA830_AXR0_6, | ||
| 495 | DA830_RMII_TXD_0, | ||
| 496 | DA830_RMII_TXD_1, | ||
| 497 | DA830_RMII_TXEN, | ||
| 498 | DA830_RMII_CRS_DV, | ||
| 499 | DA830_RMII_RXD_0, | ||
| 500 | DA830_RMII_RXD_1, | ||
| 501 | DA830_RMII_RXER, | ||
| 502 | DA830_AFSR2, | ||
| 503 | DA830_ACLKX2, | ||
| 504 | DA830_AXR2_3, | ||
| 505 | DA830_AXR2_2, | ||
| 506 | DA830_AXR2_1, | ||
| 507 | DA830_AFSX2, | ||
| 508 | DA830_ACLKR2, | ||
| 509 | DA830_NRESETOUT, | ||
| 510 | DA830_GPIO3_0, | ||
| 511 | DA830_GPIO3_1, | ||
| 512 | DA830_GPIO3_2, | ||
| 513 | DA830_GPIO3_3, | ||
| 514 | DA830_GPIO3_4, | ||
| 515 | DA830_GPIO3_5, | ||
| 516 | DA830_GPIO3_6, | ||
| 517 | DA830_AXR0_7, | ||
| 518 | DA830_AXR0_8, | ||
| 519 | DA830_UART1_RXD, | ||
| 520 | DA830_UART1_TXD, | ||
| 521 | DA830_AXR0_11, | ||
| 522 | DA830_AHCLKX1, | ||
| 523 | DA830_ACLKX1, | ||
| 524 | DA830_AFSX1, | ||
| 525 | DA830_MDIO_CLK, | ||
| 526 | DA830_MDIO_D, | ||
| 527 | DA830_AXR0_9, | ||
| 528 | DA830_AXR0_10, | ||
| 529 | DA830_EPWM0B, | ||
| 530 | DA830_EPWM0A, | ||
| 531 | DA830_EPWMSYNCI, | ||
| 532 | DA830_AXR2_0, | ||
| 533 | DA830_EPWMSYNC0, | ||
| 534 | DA830_GPIO3_7, | ||
| 535 | DA830_GPIO3_8, | ||
| 536 | DA830_GPIO3_9, | ||
| 537 | DA830_GPIO3_10, | ||
| 538 | DA830_GPIO3_11, | ||
| 539 | DA830_GPIO3_14, | ||
| 540 | DA830_GPIO3_15, | ||
| 541 | DA830_GPIO4_10, | ||
| 542 | DA830_AHCLKR1, | ||
| 543 | DA830_ACLKR1, | ||
| 544 | DA830_AFSR1, | ||
| 545 | DA830_AMUTE1, | ||
| 546 | DA830_AXR1_0, | ||
| 547 | DA830_AXR1_1, | ||
| 548 | DA830_AXR1_2, | ||
| 549 | DA830_AXR1_3, | ||
| 550 | DA830_ECAP2_APWM2, | ||
| 551 | DA830_EHRPWMGLUETZ, | ||
| 552 | DA830_EQEP1A, | ||
| 553 | DA830_GPIO4_11, | ||
| 554 | DA830_GPIO4_12, | ||
| 555 | DA830_GPIO4_13, | ||
| 556 | DA830_GPIO4_14, | ||
| 557 | DA830_GPIO4_0, | ||
| 558 | DA830_GPIO4_1, | ||
| 559 | DA830_GPIO4_2, | ||
| 560 | DA830_GPIO4_3, | ||
| 561 | DA830_AXR1_4, | ||
| 562 | DA830_AXR1_5, | ||
| 563 | DA830_AXR1_6, | ||
| 564 | DA830_AXR1_7, | ||
| 565 | DA830_AXR1_8, | ||
| 566 | DA830_AXR1_9, | ||
| 567 | DA830_EMA_D_0, | ||
| 568 | DA830_EMA_D_1, | ||
| 569 | DA830_EQEP1B, | ||
| 570 | DA830_EPWM2B, | ||
| 571 | DA830_EPWM2A, | ||
| 572 | DA830_EPWM1B, | ||
| 573 | DA830_EPWM1A, | ||
| 574 | DA830_MMCSD_DAT_0, | ||
| 575 | DA830_MMCSD_DAT_1, | ||
| 576 | DA830_UHPI_HD_0, | ||
| 577 | DA830_UHPI_HD_1, | ||
| 578 | DA830_GPIO4_4, | ||
| 579 | DA830_GPIO4_5, | ||
| 580 | DA830_GPIO4_6, | ||
| 581 | DA830_GPIO4_7, | ||
| 582 | DA830_GPIO4_8, | ||
| 583 | DA830_GPIO4_9, | ||
| 584 | DA830_GPIO0_0, | ||
| 585 | DA830_GPIO0_1, | ||
| 586 | DA830_EMA_D_2, | ||
| 587 | DA830_EMA_D_3, | ||
| 588 | DA830_EMA_D_4, | ||
| 589 | DA830_EMA_D_5, | ||
| 590 | DA830_EMA_D_6, | ||
| 591 | DA830_EMA_D_7, | ||
| 592 | DA830_EMA_D_8, | ||
| 593 | DA830_EMA_D_9, | ||
| 594 | DA830_MMCSD_DAT_2, | ||
| 595 | DA830_MMCSD_DAT_3, | ||
| 596 | DA830_MMCSD_DAT_4, | ||
| 597 | DA830_MMCSD_DAT_5, | ||
| 598 | DA830_MMCSD_DAT_6, | ||
| 599 | DA830_MMCSD_DAT_7, | ||
| 600 | DA830_UHPI_HD_8, | ||
| 601 | DA830_UHPI_HD_9, | ||
| 602 | DA830_UHPI_HD_2, | ||
| 603 | DA830_UHPI_HD_3, | ||
| 604 | DA830_UHPI_HD_4, | ||
| 605 | DA830_UHPI_HD_5, | ||
| 606 | DA830_UHPI_HD_6, | ||
| 607 | DA830_UHPI_HD_7, | ||
| 608 | DA830_LCD_D_8, | ||
| 609 | DA830_LCD_D_9, | ||
| 610 | DA830_GPIO0_2, | ||
| 611 | DA830_GPIO0_3, | ||
| 612 | DA830_GPIO0_4, | ||
| 613 | DA830_GPIO0_5, | ||
| 614 | DA830_GPIO0_6, | ||
| 615 | DA830_GPIO0_7, | ||
| 616 | DA830_GPIO0_8, | ||
| 617 | DA830_GPIO0_9, | ||
| 618 | DA830_EMA_D_10, | ||
| 619 | DA830_EMA_D_11, | ||
| 620 | DA830_EMA_D_12, | ||
| 621 | DA830_EMA_D_13, | ||
| 622 | DA830_EMA_D_14, | ||
| 623 | DA830_EMA_D_15, | ||
| 624 | DA830_EMA_A_0, | ||
| 625 | DA830_EMA_A_1, | ||
| 626 | DA830_UHPI_HD_10, | ||
| 627 | DA830_UHPI_HD_11, | ||
| 628 | DA830_UHPI_HD_12, | ||
| 629 | DA830_UHPI_HD_13, | ||
| 630 | DA830_UHPI_HD_14, | ||
| 631 | DA830_UHPI_HD_15, | ||
| 632 | DA830_LCD_D_7, | ||
| 633 | DA830_MMCSD_CLK, | ||
| 634 | DA830_LCD_D_10, | ||
| 635 | DA830_LCD_D_11, | ||
| 636 | DA830_LCD_D_12, | ||
| 637 | DA830_LCD_D_13, | ||
| 638 | DA830_LCD_D_14, | ||
| 639 | DA830_LCD_D_15, | ||
| 640 | DA830_UHPI_HCNTL0, | ||
| 641 | DA830_GPIO0_10, | ||
| 642 | DA830_GPIO0_11, | ||
| 643 | DA830_GPIO0_12, | ||
| 644 | DA830_GPIO0_13, | ||
| 645 | DA830_GPIO0_14, | ||
| 646 | DA830_GPIO0_15, | ||
| 647 | DA830_GPIO1_0, | ||
| 648 | DA830_GPIO1_1, | ||
| 649 | DA830_EMA_A_2, | ||
| 650 | DA830_EMA_A_3, | ||
| 651 | DA830_EMA_A_4, | ||
| 652 | DA830_EMA_A_5, | ||
| 653 | DA830_EMA_A_6, | ||
| 654 | DA830_EMA_A_7, | ||
| 655 | DA830_EMA_A_8, | ||
| 656 | DA830_EMA_A_9, | ||
| 657 | DA830_MMCSD_CMD, | ||
| 658 | DA830_LCD_D_6, | ||
| 659 | DA830_LCD_D_3, | ||
| 660 | DA830_LCD_D_2, | ||
| 661 | DA830_LCD_D_1, | ||
| 662 | DA830_LCD_D_0, | ||
| 663 | DA830_LCD_PCLK, | ||
| 664 | DA830_LCD_HSYNC, | ||
| 665 | DA830_UHPI_HCNTL1, | ||
| 666 | DA830_GPIO1_2, | ||
| 667 | DA830_GPIO1_3, | ||
| 668 | DA830_GPIO1_4, | ||
| 669 | DA830_GPIO1_5, | ||
| 670 | DA830_GPIO1_6, | ||
| 671 | DA830_GPIO1_7, | ||
| 672 | DA830_GPIO1_8, | ||
| 673 | DA830_GPIO1_9, | ||
| 674 | DA830_EMA_A_10, | ||
| 675 | DA830_EMA_A_11, | ||
| 676 | DA830_EMA_A_12, | ||
| 677 | DA830_EMA_BA_1, | ||
| 678 | DA830_EMA_BA_0, | ||
| 679 | DA830_EMA_CLK, | ||
| 680 | DA830_EMA_SDCKE, | ||
| 681 | DA830_NEMA_CAS, | ||
| 682 | DA830_LCD_VSYNC, | ||
| 683 | DA830_NLCD_AC_ENB_CS, | ||
| 684 | DA830_LCD_MCLK, | ||
| 685 | DA830_LCD_D_5, | ||
| 686 | DA830_LCD_D_4, | ||
| 687 | DA830_OBSCLK, | ||
| 688 | DA830_NEMA_CS_4, | ||
| 689 | DA830_UHPI_HHWIL, | ||
| 690 | DA830_AHCLKR2, | ||
| 691 | DA830_GPIO1_10, | ||
| 692 | DA830_GPIO1_11, | ||
| 693 | DA830_GPIO1_12, | ||
| 694 | DA830_GPIO1_13, | ||
| 695 | DA830_GPIO1_14, | ||
| 696 | DA830_GPIO1_15, | ||
| 697 | DA830_GPIO2_0, | ||
| 698 | DA830_GPIO2_1, | ||
| 699 | DA830_NEMA_RAS, | ||
| 700 | DA830_NEMA_WE, | ||
| 701 | DA830_NEMA_CS_0, | ||
| 702 | DA830_NEMA_CS_2, | ||
| 703 | DA830_NEMA_CS_3, | ||
| 704 | DA830_NEMA_OE, | ||
| 705 | DA830_NEMA_WE_DQM_1, | ||
| 706 | DA830_NEMA_WE_DQM_0, | ||
| 707 | DA830_NEMA_CS_5, | ||
| 708 | DA830_UHPI_HRNW, | ||
| 709 | DA830_NUHPI_HAS, | ||
| 710 | DA830_NUHPI_HCS, | ||
| 711 | DA830_NUHPI_HDS1, | ||
| 712 | DA830_NUHPI_HDS2, | ||
| 713 | DA830_NUHPI_HINT, | ||
| 714 | DA830_AXR0_12, | ||
| 715 | DA830_AMUTE2, | ||
| 716 | DA830_AXR0_13, | ||
| 717 | DA830_AXR0_14, | ||
| 718 | DA830_AXR0_15, | ||
| 719 | DA830_GPIO2_2, | ||
| 720 | DA830_GPIO2_3, | ||
| 721 | DA830_GPIO2_4, | ||
| 722 | DA830_GPIO2_5, | ||
| 723 | DA830_GPIO2_6, | ||
| 724 | DA830_GPIO2_7, | ||
| 725 | DA830_GPIO2_8, | ||
| 726 | DA830_GPIO2_9, | ||
| 727 | DA830_EMA_WAIT_0, | ||
| 728 | DA830_NUHPI_HRDY, | ||
| 729 | DA830_GPIO2_10, | ||
| 730 | }; | ||
| 731 | |||
| 732 | enum davinci_da850_index { | ||
| 733 | /* UART0 function */ | ||
| 734 | DA850_NUART0_CTS, | ||
| 735 | DA850_NUART0_RTS, | ||
| 736 | DA850_UART0_RXD, | ||
| 737 | DA850_UART0_TXD, | ||
| 738 | |||
| 739 | /* UART1 function */ | ||
| 740 | DA850_NUART1_CTS, | ||
| 741 | DA850_NUART1_RTS, | ||
| 742 | DA850_UART1_RXD, | ||
| 743 | DA850_UART1_TXD, | ||
| 744 | |||
| 745 | /* UART2 function */ | ||
| 746 | DA850_NUART2_CTS, | ||
| 747 | DA850_NUART2_RTS, | ||
| 748 | DA850_UART2_RXD, | ||
| 749 | DA850_UART2_TXD, | ||
| 750 | |||
| 751 | /* I2C1 function */ | ||
| 752 | DA850_I2C1_SCL, | ||
| 753 | DA850_I2C1_SDA, | ||
| 754 | |||
| 755 | /* I2C0 function */ | ||
| 756 | DA850_I2C0_SDA, | ||
| 757 | DA850_I2C0_SCL, | ||
| 758 | |||
| 759 | /* EMAC function */ | ||
| 760 | DA850_MII_TXEN, | ||
| 761 | DA850_MII_TXCLK, | ||
| 762 | DA850_MII_COL, | ||
| 763 | DA850_MII_TXD_3, | ||
| 764 | DA850_MII_TXD_2, | ||
| 765 | DA850_MII_TXD_1, | ||
| 766 | DA850_MII_TXD_0, | ||
| 767 | DA850_MII_RXER, | ||
| 768 | DA850_MII_CRS, | ||
| 769 | DA850_MII_RXCLK, | ||
| 770 | DA850_MII_RXDV, | ||
| 771 | DA850_MII_RXD_3, | ||
| 772 | DA850_MII_RXD_2, | ||
| 773 | DA850_MII_RXD_1, | ||
| 774 | DA850_MII_RXD_0, | ||
| 775 | DA850_MDIO_CLK, | ||
| 776 | DA850_MDIO_D, | ||
| 777 | |||
| 778 | /* McASP function */ | ||
| 779 | DA850_ACLKR, | ||
| 780 | DA850_ACLKX, | ||
| 781 | DA850_AFSR, | ||
| 782 | DA850_AFSX, | ||
| 783 | DA850_AHCLKR, | ||
| 784 | DA850_AHCLKX, | ||
| 785 | DA850_AMUTE, | ||
| 786 | DA850_AXR_15, | ||
| 787 | DA850_AXR_14, | ||
| 788 | DA850_AXR_13, | ||
| 789 | DA850_AXR_12, | ||
| 790 | DA850_AXR_11, | ||
| 791 | DA850_AXR_10, | ||
| 792 | DA850_AXR_9, | ||
| 793 | DA850_AXR_8, | ||
| 794 | DA850_AXR_7, | ||
| 795 | DA850_AXR_6, | ||
| 796 | DA850_AXR_5, | ||
| 797 | DA850_AXR_4, | ||
| 798 | DA850_AXR_3, | ||
| 799 | DA850_AXR_2, | ||
| 800 | DA850_AXR_1, | ||
| 801 | DA850_AXR_0, | ||
| 802 | |||
| 803 | /* LCD function */ | ||
| 804 | DA850_LCD_D_7, | ||
| 805 | DA850_LCD_D_6, | ||
| 806 | DA850_LCD_D_5, | ||
| 807 | DA850_LCD_D_4, | ||
| 808 | DA850_LCD_D_3, | ||
| 809 | DA850_LCD_D_2, | ||
| 810 | DA850_LCD_D_1, | ||
| 811 | DA850_LCD_D_0, | ||
| 812 | DA850_LCD_D_15, | ||
| 813 | DA850_LCD_D_14, | ||
| 814 | DA850_LCD_D_13, | ||
| 815 | DA850_LCD_D_12, | ||
| 816 | DA850_LCD_D_11, | ||
| 817 | DA850_LCD_D_10, | ||
| 818 | DA850_LCD_D_9, | ||
| 819 | DA850_LCD_D_8, | ||
| 820 | DA850_LCD_PCLK, | ||
| 821 | DA850_LCD_HSYNC, | ||
| 822 | DA850_LCD_VSYNC, | ||
| 823 | DA850_NLCD_AC_ENB_CS, | ||
| 824 | |||
| 825 | /* MMC/SD0 function */ | ||
| 826 | DA850_MMCSD0_DAT_0, | ||
| 827 | DA850_MMCSD0_DAT_1, | ||
| 828 | DA850_MMCSD0_DAT_2, | ||
| 829 | DA850_MMCSD0_DAT_3, | ||
| 830 | DA850_MMCSD0_CLK, | ||
| 831 | DA850_MMCSD0_CMD, | ||
| 832 | |||
| 833 | /* EMIF2.5/EMIFA function */ | ||
| 834 | DA850_EMA_D_7, | ||
| 835 | DA850_EMA_D_6, | ||
| 836 | DA850_EMA_D_5, | ||
| 837 | DA850_EMA_D_4, | ||
| 838 | DA850_EMA_D_3, | ||
| 839 | DA850_EMA_D_2, | ||
| 840 | DA850_EMA_D_1, | ||
| 841 | DA850_EMA_D_0, | ||
| 842 | DA850_EMA_A_1, | ||
| 843 | DA850_EMA_A_2, | ||
| 844 | DA850_NEMA_CS_3, | ||
| 845 | DA850_NEMA_CS_4, | ||
| 846 | DA850_NEMA_WE, | ||
| 847 | DA850_NEMA_OE, | ||
| 848 | DA850_EMA_D_15, | ||
| 849 | DA850_EMA_D_14, | ||
| 850 | DA850_EMA_D_13, | ||
| 851 | DA850_EMA_D_12, | ||
| 852 | DA850_EMA_D_11, | ||
| 853 | DA850_EMA_D_10, | ||
| 854 | DA850_EMA_D_9, | ||
| 855 | DA850_EMA_D_8, | ||
| 856 | DA850_EMA_A_0, | ||
| 857 | DA850_EMA_A_3, | ||
| 858 | DA850_EMA_A_4, | ||
| 859 | DA850_EMA_A_5, | ||
| 860 | DA850_EMA_A_6, | ||
| 861 | DA850_EMA_A_7, | ||
| 862 | DA850_EMA_A_8, | ||
| 863 | DA850_EMA_A_9, | ||
| 864 | DA850_EMA_A_10, | ||
| 865 | DA850_EMA_A_11, | ||
| 866 | DA850_EMA_A_12, | ||
| 867 | DA850_EMA_A_13, | ||
| 868 | DA850_EMA_A_14, | ||
| 869 | DA850_EMA_A_15, | ||
| 870 | DA850_EMA_A_16, | ||
| 871 | DA850_EMA_A_17, | ||
| 872 | DA850_EMA_A_18, | ||
| 873 | DA850_EMA_A_19, | ||
| 874 | DA850_EMA_A_20, | ||
| 875 | DA850_EMA_A_21, | ||
| 876 | DA850_EMA_A_22, | ||
| 877 | DA850_EMA_A_23, | ||
| 878 | DA850_EMA_BA_1, | ||
| 879 | DA850_EMA_CLK, | ||
| 880 | DA850_EMA_WAIT_1, | ||
| 881 | DA850_NEMA_CS_2, | ||
| 882 | |||
| 883 | /* GPIO function */ | ||
| 884 | DA850_GPIO2_15, | ||
| 885 | DA850_GPIO8_10, | ||
| 886 | DA850_GPIO4_0, | ||
| 887 | DA850_GPIO4_1, | ||
| 157 | }; | 888 | }; |
| 158 | 889 | ||
| 159 | #ifdef CONFIG_DAVINCI_MUX | 890 | #ifdef CONFIG_DAVINCI_MUX |
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index ab8a2586d1cc..171173c1dbad 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
| @@ -81,6 +81,24 @@ | |||
| 81 | #define DM355_LPSC_RTO 12 | 81 | #define DM355_LPSC_RTO 12 |
| 82 | #define DM355_LPSC_VPSS_DAC 41 | 82 | #define DM355_LPSC_VPSS_DAC 41 |
| 83 | 83 | ||
| 84 | /* DM365 */ | ||
| 85 | #define DM365_LPSC_TIMER3 5 | ||
| 86 | #define DM365_LPSC_SPI1 6 | ||
| 87 | #define DM365_LPSC_MMC_SD1 7 | ||
| 88 | #define DM365_LPSC_McBSP1 8 | ||
| 89 | #define DM365_LPSC_PWM3 10 | ||
| 90 | #define DM365_LPSC_SPI2 11 | ||
| 91 | #define DM365_LPSC_RTO 12 | ||
| 92 | #define DM365_LPSC_TIMER4 17 | ||
| 93 | #define DM365_LPSC_SPI0 22 | ||
| 94 | #define DM365_LPSC_SPI3 38 | ||
| 95 | #define DM365_LPSC_SPI4 39 | ||
| 96 | #define DM365_LPSC_EMAC 40 | ||
| 97 | #define DM365_LPSC_VOICE_CODEC 44 | ||
| 98 | #define DM365_LPSC_DAC_CLK 46 | ||
| 99 | #define DM365_LPSC_VPSSMSTR 47 | ||
| 100 | #define DM365_LPSC_MJCP 50 | ||
| 101 | |||
| 84 | /* | 102 | /* |
| 85 | * LPSC Assignments | 103 | * LPSC Assignments |
| 86 | */ | 104 | */ |
| @@ -118,6 +136,50 @@ | |||
| 118 | #define DM646X_LPSC_TIMER1 35 | 136 | #define DM646X_LPSC_TIMER1 35 |
| 119 | #define DM646X_LPSC_ARM_INTC 45 | 137 | #define DM646X_LPSC_ARM_INTC 45 |
| 120 | 138 | ||
| 139 | /* PSC0 defines */ | ||
| 140 | #define DA8XX_LPSC0_TPCC 0 | ||
| 141 | #define DA8XX_LPSC0_TPTC0 1 | ||
| 142 | #define DA8XX_LPSC0_TPTC1 2 | ||
| 143 | #define DA8XX_LPSC0_EMIF25 3 | ||
| 144 | #define DA8XX_LPSC0_SPI0 4 | ||
| 145 | #define DA8XX_LPSC0_MMC_SD 5 | ||
| 146 | #define DA8XX_LPSC0_AINTC 6 | ||
| 147 | #define DA8XX_LPSC0_ARM_RAM_ROM 7 | ||
| 148 | #define DA8XX_LPSC0_SECU_MGR 8 | ||
| 149 | #define DA8XX_LPSC0_UART0 9 | ||
| 150 | #define DA8XX_LPSC0_SCR0_SS 10 | ||
| 151 | #define DA8XX_LPSC0_SCR1_SS 11 | ||
| 152 | #define DA8XX_LPSC0_SCR2_SS 12 | ||
| 153 | #define DA8XX_LPSC0_DMAX 13 | ||
| 154 | #define DA8XX_LPSC0_ARM 14 | ||
| 155 | #define DA8XX_LPSC0_GEM 15 | ||
| 156 | |||
| 157 | /* PSC1 defines */ | ||
| 158 | #define DA850_LPSC1_TPCC1 0 | ||
| 159 | #define DA8XX_LPSC1_USB20 1 | ||
| 160 | #define DA8XX_LPSC1_USB11 2 | ||
| 161 | #define DA8XX_LPSC1_GPIO 3 | ||
| 162 | #define DA8XX_LPSC1_UHPI 4 | ||
| 163 | #define DA8XX_LPSC1_CPGMAC 5 | ||
| 164 | #define DA8XX_LPSC1_EMIF3C 6 | ||
| 165 | #define DA8XX_LPSC1_McASP0 7 | ||
| 166 | #define DA830_LPSC1_McASP1 8 | ||
| 167 | #define DA850_LPSC1_SATA 8 | ||
| 168 | #define DA830_LPSC1_McASP2 9 | ||
| 169 | #define DA8XX_LPSC1_SPI1 10 | ||
| 170 | #define DA8XX_LPSC1_I2C 11 | ||
| 171 | #define DA8XX_LPSC1_UART1 12 | ||
| 172 | #define DA8XX_LPSC1_UART2 13 | ||
| 173 | #define DA8XX_LPSC1_LCDC 16 | ||
| 174 | #define DA8XX_LPSC1_PWM 17 | ||
| 175 | #define DA8XX_LPSC1_ECAP 20 | ||
| 176 | #define DA830_LPSC1_EQEP 21 | ||
| 177 | #define DA850_LPSC1_TPTC2 21 | ||
| 178 | #define DA8XX_LPSC1_SCR_P0_SS 24 | ||
| 179 | #define DA8XX_LPSC1_SCR_P1_SS 25 | ||
| 180 | #define DA8XX_LPSC1_CR_P3_SS 26 | ||
| 181 | #define DA8XX_LPSC1_L3_CBA_RAM 31 | ||
| 182 | |||
| 121 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); | 183 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); |
| 122 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, | 184 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
| 123 | unsigned int id, char enable); | 185 | unsigned int id, char enable); |
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index 794fa5cf93c1..a584697a9e70 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h | |||
| @@ -11,13 +11,17 @@ | |||
| 11 | #ifndef __ASM_ARCH_SERIAL_H | 11 | #ifndef __ASM_ARCH_SERIAL_H |
| 12 | #define __ASM_ARCH_SERIAL_H | 12 | #define __ASM_ARCH_SERIAL_H |
| 13 | 13 | ||
| 14 | #include <mach/io.h> | 14 | #include <mach/hardware.h> |
| 15 | 15 | ||
| 16 | #define DAVINCI_MAX_NR_UARTS 3 | 16 | #define DAVINCI_MAX_NR_UARTS 3 |
| 17 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) | 17 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) |
| 18 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) | 18 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) |
| 19 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) | 19 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) |
| 20 | 20 | ||
| 21 | #define DA8XX_UART0_BASE (IO_PHYS + 0x042000) | ||
| 22 | #define DA8XX_UART1_BASE (IO_PHYS + 0x10c000) | ||
| 23 | #define DA8XX_UART2_BASE (IO_PHYS + 0x10d000) | ||
| 24 | |||
| 21 | /* DaVinci UART register offsets */ | 25 | /* DaVinci UART register offsets */ |
| 22 | #define UART_DAVINCI_PWREMU 0x0c | 26 | #define UART_DAVINCI_PWREMU 0x0c |
| 23 | #define UART_DM646X_SCR 0x10 | 27 | #define UART_DM646X_SCR 0x10 |
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h index b7e7036674fa..8e4f10fe1263 100644 --- a/arch/arm/mach-davinci/include/mach/system.h +++ b/arch/arm/mach-davinci/include/mach/system.h | |||
| @@ -16,12 +16,12 @@ | |||
| 16 | 16 | ||
| 17 | extern void davinci_watchdog_reset(void); | 17 | extern void davinci_watchdog_reset(void); |
| 18 | 18 | ||
| 19 | static void arch_idle(void) | 19 | static inline void arch_idle(void) |
| 20 | { | 20 | { |
| 21 | cpu_do_idle(); | 21 | cpu_do_idle(); |
| 22 | } | 22 | } |
| 23 | 23 | ||
| 24 | static void arch_reset(char mode, const char *cmd) | 24 | static inline void arch_reset(char mode, const char *cmd) |
| 25 | { | 25 | { |
| 26 | davinci_watchdog_reset(); | 26 | davinci_watchdog_reset(); |
| 27 | } | 27 | } |
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h index 1e27475f9a23..33796b4db17f 100644 --- a/arch/arm/mach-davinci/include/mach/uncompress.h +++ b/arch/arm/mach-davinci/include/mach/uncompress.h | |||
| @@ -21,8 +21,11 @@ static u32 *uart; | |||
| 21 | 21 | ||
| 22 | static u32 *get_uart_base(void) | 22 | static u32 *get_uart_base(void) |
| 23 | { | 23 | { |
| 24 | /* Add logic here for new platforms, using __macine_arch_type */ | 24 | if (__machine_arch_type == MACH_TYPE_DAVINCI_DA830_EVM || |
| 25 | return (u32 *)DAVINCI_UART0_BASE; | 25 | __machine_arch_type == MACH_TYPE_DAVINCI_DA850_EVM) |
| 26 | return (u32 *)DA8XX_UART2_BASE; | ||
| 27 | else | ||
| 28 | return (u32 *)DAVINCI_UART0_BASE; | ||
| 26 | } | 29 | } |
| 27 | 30 | ||
| 28 | /* PORT_16C550A, in polled non-fifo mode */ | 31 | /* PORT_16C550A, in polled non-fifo mode */ |
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h index ad51625b6609..d49646a8e206 100644 --- a/arch/arm/mach-davinci/include/mach/vmalloc.h +++ b/arch/arm/mach-davinci/include/mach/vmalloc.h | |||
| @@ -8,7 +8,7 @@ | |||
| 8 | * is licensed "as is" without any warranty of any kind, whether express | 8 | * is licensed "as is" without any warranty of any kind, whether express |
| 9 | * or implied. | 9 | * or implied. |
| 10 | */ | 10 | */ |
| 11 | #include <mach/io.h> | 11 | #include <mach/hardware.h> |
| 12 | 12 | ||
| 13 | /* Allow vmalloc range until the IO virtual range minus a 2M "hole" */ | 13 | /* Allow vmalloc range until the IO virtual range minus a 2M "hole" */ |
| 14 | #define VMALLOC_END (IO_VIRT - (2<<20)) | 14 | #define VMALLOC_END (IO_VIRT - (2<<20)) |
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c index d310f579aa85..898905e48946 100644 --- a/arch/arm/mach-davinci/mux.c +++ b/arch/arm/mach-davinci/mux.c | |||
| @@ -91,3 +91,17 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) | |||
| 91 | return 0; | 91 | return 0; |
| 92 | } | 92 | } |
| 93 | EXPORT_SYMBOL(davinci_cfg_reg); | 93 | EXPORT_SYMBOL(davinci_cfg_reg); |
| 94 | |||
| 95 | int da8xx_pinmux_setup(const short pins[]) | ||
| 96 | { | ||
| 97 | int i, error = -EINVAL; | ||
| 98 | |||
| 99 | if (pins) | ||
| 100 | for (i = 0; pins[i] >= 0; i++) { | ||
| 101 | error = davinci_cfg_reg(pins[i]); | ||
| 102 | if (error) | ||
| 103 | break; | ||
| 104 | } | ||
| 105 | |||
| 106 | return error; | ||
| 107 | } | ||
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c index db54b2a66b4d..4f1fc9b318b3 100644 --- a/arch/arm/mach-davinci/sram.c +++ b/arch/arm/mach-davinci/sram.c | |||
| @@ -60,7 +60,7 @@ static int __init sram_init(void) | |||
| 60 | int status = 0; | 60 | int status = 0; |
| 61 | 61 | ||
| 62 | if (len) { | 62 | if (len) { |
| 63 | len = min(len, SRAM_SIZE); | 63 | len = min_t(unsigned, len, SRAM_SIZE); |
| 64 | sram_pool = gen_pool_create(ilog2(SRAM_GRANULARITY), -1); | 64 | sram_pool = gen_pool_create(ilog2(SRAM_GRANULARITY), -1); |
| 65 | if (!sram_pool) | 65 | if (!sram_pool) |
| 66 | status = -ENOMEM; | 66 | status = -ENOMEM; |
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 0884ca57bfb0..0d1b6d407b46 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c | |||
| @@ -406,11 +406,11 @@ struct sys_timer davinci_timer = { | |||
| 406 | void davinci_watchdog_reset(void) | 406 | void davinci_watchdog_reset(void) |
| 407 | { | 407 | { |
| 408 | u32 tgcr, wdtcr; | 408 | u32 tgcr, wdtcr; |
| 409 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 409 | struct platform_device *pdev = &davinci_wdt_device; |
| 410 | void __iomem *base = soc_info->wdt_base; | 410 | void __iomem *base = IO_ADDRESS(pdev->resource[0].start); |
| 411 | struct clk *wd_clk; | 411 | struct clk *wd_clk; |
| 412 | 412 | ||
| 413 | wd_clk = clk_get(&davinci_wdt_device.dev, NULL); | 413 | wd_clk = clk_get(&pdev->dev, NULL); |
| 414 | if (WARN_ON(IS_ERR(wd_clk))) | 414 | if (WARN_ON(IS_ERR(wd_clk))) |
| 415 | return; | 415 | return; |
| 416 | clk_enable(wd_clk); | 416 | clk_enable(wd_clk); |
| @@ -420,11 +420,11 @@ void davinci_watchdog_reset(void) | |||
| 420 | 420 | ||
| 421 | /* reset timer, set mode to 64-bit watchdog, and unreset */ | 421 | /* reset timer, set mode to 64-bit watchdog, and unreset */ |
| 422 | tgcr = 0; | 422 | tgcr = 0; |
| 423 | __raw_writel(tgcr, base + TCR); | 423 | __raw_writel(tgcr, base + TGCR); |
| 424 | tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT; | 424 | tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT; |
| 425 | tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | | 425 | tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | |
| 426 | (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); | 426 | (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); |
| 427 | __raw_writel(tgcr, base + TCR); | 427 | __raw_writel(tgcr, base + TGCR); |
| 428 | 428 | ||
| 429 | /* clear counter and period regs */ | 429 | /* clear counter and period regs */ |
| 430 | __raw_writel(0, base + TIM12); | 430 | __raw_writel(0, base + TIM12); |
| @@ -432,12 +432,8 @@ void davinci_watchdog_reset(void) | |||
| 432 | __raw_writel(0, base + PRD12); | 432 | __raw_writel(0, base + PRD12); |
| 433 | __raw_writel(0, base + PRD34); | 433 | __raw_writel(0, base + PRD34); |
| 434 | 434 | ||
| 435 | /* enable */ | ||
| 436 | wdtcr = __raw_readl(base + WDTCR); | ||
| 437 | wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT; | ||
| 438 | __raw_writel(wdtcr, base + WDTCR); | ||
| 439 | |||
| 440 | /* put watchdog in pre-active state */ | 435 | /* put watchdog in pre-active state */ |
| 436 | wdtcr = __raw_readl(base + WDTCR); | ||
| 441 | wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) | | 437 | wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) | |
| 442 | (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); | 438 | (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); |
| 443 | __raw_writel(wdtcr, base + WDTCR); | 439 | __raw_writel(wdtcr, base + WDTCR); |
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c index abedb6337182..06f55931620c 100644 --- a/arch/arm/mach-davinci/usb.c +++ b/arch/arm/mach-davinci/usb.c | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <mach/common.h> | 13 | #include <mach/common.h> |
| 14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
| 15 | #include <mach/irqs.h> | 15 | #include <mach/irqs.h> |
| 16 | #include <mach/cputype.h> | ||
| 16 | 17 | ||
| 17 | #define DAVINCI_USB_OTG_BASE 0x01C64000 | 18 | #define DAVINCI_USB_OTG_BASE 0x01C64000 |
| 18 | 19 | ||
| @@ -64,6 +65,10 @@ static struct resource usb_resources[] = { | |||
| 64 | .start = IRQ_USBINT, | 65 | .start = IRQ_USBINT, |
| 65 | .flags = IORESOURCE_IRQ, | 66 | .flags = IORESOURCE_IRQ, |
| 66 | }, | 67 | }, |
| 68 | { | ||
| 69 | /* placeholder for the dedicated CPPI IRQ */ | ||
| 70 | .flags = IORESOURCE_IRQ, | ||
| 71 | }, | ||
| 67 | }; | 72 | }; |
| 68 | 73 | ||
| 69 | static u64 usb_dmamask = DMA_BIT_MASK(32); | 74 | static u64 usb_dmamask = DMA_BIT_MASK(32); |
| @@ -84,6 +89,14 @@ void __init setup_usb(unsigned mA, unsigned potpgt_msec) | |||
| 84 | { | 89 | { |
| 85 | usb_data.power = mA / 2; | 90 | usb_data.power = mA / 2; |
| 86 | usb_data.potpgt = potpgt_msec / 2; | 91 | usb_data.potpgt = potpgt_msec / 2; |
| 92 | |||
| 93 | if (cpu_is_davinci_dm646x()) { | ||
| 94 | /* Override the defaults as DM6467 uses different IRQs. */ | ||
| 95 | usb_dev.resource[1].start = IRQ_DM646X_USBINT; | ||
| 96 | usb_dev.resource[2].start = IRQ_DM646X_USBDMAINT; | ||
| 97 | } else /* other devices don't have dedicated CPPI IRQ */ | ||
| 98 | usb_dev.num_resources = 2; | ||
| 99 | |||
| 87 | platform_device_register(&usb_dev); | 100 | platform_device_register(&usb_dev); |
| 88 | } | 101 | } |
| 89 | 102 | ||
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 8b40aace9db4..42920f9c1a11 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
| @@ -15,8 +15,11 @@ | |||
| 15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
| 16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 17 | #include <linux/input.h> | 17 | #include <linux/input.h> |
| 18 | #include <linux/interrupt.h> | ||
| 18 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/serial_8250.h> | ||
| 19 | 21 | ||
| 22 | #include <asm/serial.h> | ||
| 20 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
| 21 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
| 22 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
| @@ -162,10 +165,6 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = { | |||
| 162 | .ctrl_name = "internal", | 165 | .ctrl_name = "internal", |
| 163 | }; | 166 | }; |
| 164 | 167 | ||
| 165 | static struct omap_uart_config ams_delta_uart_config __initdata = { | ||
| 166 | .enabled_uarts = 1, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static struct omap_usb_config ams_delta_usb_config __initdata = { | 168 | static struct omap_usb_config ams_delta_usb_config __initdata = { |
| 170 | .register_host = 1, | 169 | .register_host = 1, |
| 171 | .hmc_mode = 16, | 170 | .hmc_mode = 16, |
| @@ -174,7 +173,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = { | |||
| 174 | 173 | ||
| 175 | static struct omap_board_config_kernel ams_delta_config[] = { | 174 | static struct omap_board_config_kernel ams_delta_config[] = { |
| 176 | { OMAP_TAG_LCD, &ams_delta_lcd_config }, | 175 | { OMAP_TAG_LCD, &ams_delta_lcd_config }, |
| 177 | { OMAP_TAG_UART, &ams_delta_uart_config }, | ||
| 178 | }; | 176 | }; |
| 179 | 177 | ||
| 180 | static struct resource ams_delta_kp_resources[] = { | 178 | static struct resource ams_delta_kp_resources[] = { |
| @@ -235,6 +233,41 @@ static void __init ams_delta_init(void) | |||
| 235 | platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); | 233 | platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); |
| 236 | } | 234 | } |
| 237 | 235 | ||
| 236 | static struct plat_serial8250_port ams_delta_modem_ports[] = { | ||
| 237 | { | ||
| 238 | .membase = (void *) AMS_DELTA_MODEM_VIRT, | ||
| 239 | .mapbase = AMS_DELTA_MODEM_PHYS, | ||
| 240 | .irq = -EINVAL, /* changed later */ | ||
| 241 | .flags = UPF_BOOT_AUTOCONF, | ||
| 242 | .irqflags = IRQF_TRIGGER_RISING, | ||
| 243 | .iotype = UPIO_MEM, | ||
| 244 | .regshift = 1, | ||
| 245 | .uartclk = BASE_BAUD * 16, | ||
| 246 | }, | ||
| 247 | { }, | ||
| 248 | }; | ||
| 249 | |||
| 250 | static struct platform_device ams_delta_modem_device = { | ||
| 251 | .name = "serial8250", | ||
| 252 | .id = PLAT8250_DEV_PLATFORM1, | ||
| 253 | .dev = { | ||
| 254 | .platform_data = ams_delta_modem_ports, | ||
| 255 | }, | ||
| 256 | }; | ||
| 257 | |||
| 258 | static int __init ams_delta_modem_init(void) | ||
| 259 | { | ||
| 260 | omap_cfg_reg(M14_1510_GPIO2); | ||
| 261 | ams_delta_modem_ports[0].irq = gpio_to_irq(2); | ||
| 262 | |||
| 263 | ams_delta_latch2_write( | ||
| 264 | AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC, | ||
| 265 | AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC); | ||
| 266 | |||
| 267 | return platform_device_register(&ams_delta_modem_device); | ||
| 268 | } | ||
| 269 | arch_initcall(ams_delta_modem_init); | ||
| 270 | |||
| 238 | static void __init ams_delta_map_io(void) | 271 | static void __init ams_delta_map_io(void) |
| 239 | { | 272 | { |
| 240 | omap1_map_common_io(); | 273 | omap1_map_common_io(); |
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 19e0e9232336..a7ead1b93226 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
| @@ -240,16 +240,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data) | |||
| 240 | return gpio_get_value(P2_NAND_RB_GPIO_PIN); | 240 | return gpio_get_value(P2_NAND_RB_GPIO_PIN); |
| 241 | } | 241 | } |
| 242 | 242 | ||
| 243 | static struct omap_uart_config fsample_uart_config __initdata = { | ||
| 244 | .enabled_uarts = ((1 << 0) | (1 << 1)), | ||
| 245 | }; | ||
| 246 | |||
| 247 | static struct omap_lcd_config fsample_lcd_config __initdata = { | 243 | static struct omap_lcd_config fsample_lcd_config __initdata = { |
| 248 | .ctrl_name = "internal", | 244 | .ctrl_name = "internal", |
| 249 | }; | 245 | }; |
| 250 | 246 | ||
| 251 | static struct omap_board_config_kernel fsample_config[] = { | 247 | static struct omap_board_config_kernel fsample_config[] = { |
| 252 | { OMAP_TAG_UART, &fsample_uart_config }, | ||
| 253 | { OMAP_TAG_LCD, &fsample_lcd_config }, | 248 | { OMAP_TAG_LCD, &fsample_lcd_config }, |
| 254 | }; | 249 | }; |
| 255 | 250 | ||
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index e724940e86f2..fb47239da72f 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c | |||
| @@ -57,12 +57,7 @@ static struct omap_usb_config generic1610_usb_config __initdata = { | |||
| 57 | }; | 57 | }; |
| 58 | #endif | 58 | #endif |
| 59 | 59 | ||
| 60 | static struct omap_uart_config generic_uart_config __initdata = { | ||
| 61 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct omap_board_config_kernel generic_config[] __initdata = { | 60 | static struct omap_board_config_kernel generic_config[] __initdata = { |
| 65 | { OMAP_TAG_UART, &generic_uart_config }, | ||
| 66 | }; | 61 | }; |
| 67 | 62 | ||
| 68 | static void __init omap_generic_init(void) | 63 | static void __init omap_generic_init(void) |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index f695aa053ac8..aab860307dca 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
| @@ -360,16 +360,11 @@ static struct omap_usb_config h2_usb_config __initdata = { | |||
| 360 | .pins[1] = 3, | 360 | .pins[1] = 3, |
| 361 | }; | 361 | }; |
| 362 | 362 | ||
| 363 | static struct omap_uart_config h2_uart_config __initdata = { | ||
| 364 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 365 | }; | ||
| 366 | |||
| 367 | static struct omap_lcd_config h2_lcd_config __initdata = { | 363 | static struct omap_lcd_config h2_lcd_config __initdata = { |
| 368 | .ctrl_name = "internal", | 364 | .ctrl_name = "internal", |
| 369 | }; | 365 | }; |
| 370 | 366 | ||
| 371 | static struct omap_board_config_kernel h2_config[] __initdata = { | 367 | static struct omap_board_config_kernel h2_config[] __initdata = { |
| 372 | { OMAP_TAG_UART, &h2_uart_config }, | ||
| 373 | { OMAP_TAG_LCD, &h2_lcd_config }, | 368 | { OMAP_TAG_LCD, &h2_lcd_config }, |
| 374 | }; | 369 | }; |
| 375 | 370 | ||
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index f597968733b4..89586b80b8d5 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
| @@ -313,16 +313,11 @@ static struct omap_usb_config h3_usb_config __initdata = { | |||
| 313 | .pins[1] = 3, | 313 | .pins[1] = 3, |
| 314 | }; | 314 | }; |
| 315 | 315 | ||
| 316 | static struct omap_uart_config h3_uart_config __initdata = { | ||
| 317 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 318 | }; | ||
| 319 | |||
| 320 | static struct omap_lcd_config h3_lcd_config __initdata = { | 316 | static struct omap_lcd_config h3_lcd_config __initdata = { |
| 321 | .ctrl_name = "internal", | 317 | .ctrl_name = "internal", |
| 322 | }; | 318 | }; |
| 323 | 319 | ||
| 324 | static struct omap_board_config_kernel h3_config[] __initdata = { | 320 | static struct omap_board_config_kernel h3_config[] __initdata = { |
| 325 | { OMAP_TAG_UART, &h3_uart_config }, | ||
| 326 | { OMAP_TAG_LCD, &h3_lcd_config }, | 321 | { OMAP_TAG_LCD, &h3_lcd_config }, |
| 327 | }; | 322 | }; |
| 328 | 323 | ||
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 2fd98260ea49..cc2abbb2d0f4 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
| @@ -368,13 +368,8 @@ static inline void innovator_mmc_init(void) | |||
| 368 | } | 368 | } |
| 369 | #endif | 369 | #endif |
| 370 | 370 | ||
| 371 | static struct omap_uart_config innovator_uart_config __initdata = { | ||
| 372 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 373 | }; | ||
| 374 | |||
| 375 | static struct omap_board_config_kernel innovator_config[] = { | 371 | static struct omap_board_config_kernel innovator_config[] = { |
| 376 | { OMAP_TAG_LCD, NULL }, | 372 | { OMAP_TAG_LCD, NULL }, |
| 377 | { OMAP_TAG_UART, &innovator_uart_config }, | ||
| 378 | }; | 373 | }; |
| 379 | 374 | ||
| 380 | static void __init innovator_init(void) | 375 | static void __init innovator_init(void) |
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index cf3247b15f87..ed891b8a6b15 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
| @@ -293,10 +293,6 @@ static struct omap_usb_config osk_usb_config __initdata = { | |||
| 293 | .pins[0] = 2, | 293 | .pins[0] = 2, |
| 294 | }; | 294 | }; |
| 295 | 295 | ||
| 296 | static struct omap_uart_config osk_uart_config __initdata = { | ||
| 297 | .enabled_uarts = (1 << 0), | ||
| 298 | }; | ||
| 299 | |||
| 300 | #ifdef CONFIG_OMAP_OSK_MISTRAL | 296 | #ifdef CONFIG_OMAP_OSK_MISTRAL |
| 301 | static struct omap_lcd_config osk_lcd_config __initdata = { | 297 | static struct omap_lcd_config osk_lcd_config __initdata = { |
| 302 | .ctrl_name = "internal", | 298 | .ctrl_name = "internal", |
| @@ -304,7 +300,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = { | |||
| 304 | #endif | 300 | #endif |
| 305 | 301 | ||
| 306 | static struct omap_board_config_kernel osk_config[] __initdata = { | 302 | static struct omap_board_config_kernel osk_config[] __initdata = { |
| 307 | { OMAP_TAG_UART, &osk_uart_config }, | ||
| 308 | #ifdef CONFIG_OMAP_OSK_MISTRAL | 303 | #ifdef CONFIG_OMAP_OSK_MISTRAL |
| 309 | { OMAP_TAG_LCD, &osk_lcd_config }, | 304 | { OMAP_TAG_LCD, &osk_lcd_config }, |
| 310 | #endif | 305 | #endif |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 886b4c0569bd..90dd0431b0dc 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
| @@ -212,10 +212,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = { | |||
| 212 | .ctrl_name = "internal", | 212 | .ctrl_name = "internal", |
| 213 | }; | 213 | }; |
| 214 | 214 | ||
| 215 | static struct omap_uart_config palmte_uart_config __initdata = { | ||
| 216 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), | ||
| 217 | }; | ||
| 218 | |||
| 219 | #ifdef CONFIG_APM | 215 | #ifdef CONFIG_APM |
| 220 | /* | 216 | /* |
| 221 | * Values measured in 10 minute intervals averaged over 10 samples. | 217 | * Values measured in 10 minute intervals averaged over 10 samples. |
| @@ -302,7 +298,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery) | |||
| 302 | 298 | ||
| 303 | static struct omap_board_config_kernel palmte_config[] __initdata = { | 299 | static struct omap_board_config_kernel palmte_config[] __initdata = { |
| 304 | { OMAP_TAG_LCD, &palmte_lcd_config }, | 300 | { OMAP_TAG_LCD, &palmte_lcd_config }, |
| 305 | { OMAP_TAG_UART, &palmte_uart_config }, | ||
| 306 | }; | 301 | }; |
| 307 | 302 | ||
| 308 | static struct spi_board_info palmte_spi_info[] __initdata = { | 303 | static struct spi_board_info palmte_spi_info[] __initdata = { |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 4f1b44831d37..8256139891ff 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
| @@ -274,13 +274,8 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = { | |||
| 274 | .ctrl_name = "internal", | 274 | .ctrl_name = "internal", |
| 275 | }; | 275 | }; |
| 276 | 276 | ||
| 277 | static struct omap_uart_config palmtt_uart_config __initdata = { | ||
| 278 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), | ||
| 279 | }; | ||
| 280 | |||
| 281 | static struct omap_board_config_kernel palmtt_config[] __initdata = { | 277 | static struct omap_board_config_kernel palmtt_config[] __initdata = { |
| 282 | { OMAP_TAG_LCD, &palmtt_lcd_config }, | 278 | { OMAP_TAG_LCD, &palmtt_lcd_config }, |
| 283 | { OMAP_TAG_UART, &palmtt_uart_config }, | ||
| 284 | }; | 279 | }; |
| 285 | 280 | ||
| 286 | static void __init omap_mpu_wdt_mode(int mode) { | 281 | static void __init omap_mpu_wdt_mode(int mode) { |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 9a55c3c58218..81b6bde1c5a3 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
| @@ -244,13 +244,8 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = { | |||
| 244 | .ctrl_name = "internal", | 244 | .ctrl_name = "internal", |
| 245 | }; | 245 | }; |
| 246 | 246 | ||
| 247 | static struct omap_uart_config palmz71_uart_config __initdata = { | ||
| 248 | .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), | ||
| 249 | }; | ||
| 250 | |||
| 251 | static struct omap_board_config_kernel palmz71_config[] __initdata = { | 247 | static struct omap_board_config_kernel palmz71_config[] __initdata = { |
| 252 | {OMAP_TAG_LCD, &palmz71_lcd_config}, | 248 | {OMAP_TAG_LCD, &palmz71_lcd_config}, |
| 253 | {OMAP_TAG_UART, &palmz71_uart_config}, | ||
| 254 | }; | 249 | }; |
| 255 | 250 | ||
| 256 | static irqreturn_t | 251 | static irqreturn_t |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 3b9f907aa899..83406699f310 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
| @@ -208,16 +208,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data) | |||
| 208 | return gpio_get_value(P2_NAND_RB_GPIO_PIN); | 208 | return gpio_get_value(P2_NAND_RB_GPIO_PIN); |
| 209 | } | 209 | } |
| 210 | 210 | ||
| 211 | static struct omap_uart_config perseus2_uart_config __initdata = { | ||
| 212 | .enabled_uarts = ((1 << 0) | (1 << 1)), | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct omap_lcd_config perseus2_lcd_config __initdata = { | 211 | static struct omap_lcd_config perseus2_lcd_config __initdata = { |
| 216 | .ctrl_name = "internal", | 212 | .ctrl_name = "internal", |
| 217 | }; | 213 | }; |
| 218 | 214 | ||
| 219 | static struct omap_board_config_kernel perseus2_config[] __initdata = { | 215 | static struct omap_board_config_kernel perseus2_config[] __initdata = { |
| 220 | { OMAP_TAG_UART, &perseus2_uart_config }, | ||
| 221 | { OMAP_TAG_LCD, &perseus2_lcd_config }, | 216 | { OMAP_TAG_LCD, &perseus2_lcd_config }, |
| 222 | }; | 217 | }; |
| 223 | 218 | ||
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index c096577695fe..02c85ca2e1df 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
| @@ -369,13 +369,8 @@ static struct platform_device *sx1_devices[] __initdata = { | |||
| 369 | }; | 369 | }; |
| 370 | /*-----------------------------------------*/ | 370 | /*-----------------------------------------*/ |
| 371 | 371 | ||
| 372 | static struct omap_uart_config sx1_uart_config __initdata = { | ||
| 373 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 374 | }; | ||
| 375 | |||
| 376 | static struct omap_board_config_kernel sx1_config[] __initdata = { | 372 | static struct omap_board_config_kernel sx1_config[] __initdata = { |
| 377 | { OMAP_TAG_LCD, &sx1_lcd_config }, | 373 | { OMAP_TAG_LCD, &sx1_lcd_config }, |
| 378 | { OMAP_TAG_UART, &sx1_uart_config }, | ||
| 379 | }; | 374 | }; |
| 380 | 375 | ||
| 381 | /*-----------------------------------------*/ | 376 | /*-----------------------------------------*/ |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 98275e03dad1..c06e7a553472 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
| @@ -140,12 +140,7 @@ static struct omap_usb_config voiceblue_usb_config __initdata = { | |||
| 140 | .pins[2] = 6, | 140 | .pins[2] = 6, |
| 141 | }; | 141 | }; |
| 142 | 142 | ||
| 143 | static struct omap_uart_config voiceblue_uart_config __initdata = { | ||
| 144 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 145 | }; | ||
| 146 | |||
| 147 | static struct omap_board_config_kernel voiceblue_config[] = { | 143 | static struct omap_board_config_kernel voiceblue_config[] = { |
| 148 | { OMAP_TAG_UART, &voiceblue_uart_config }, | ||
| 149 | }; | 144 | }; |
| 150 | 145 | ||
| 151 | static void __init voiceblue_init_irq(void) | 146 | static void __init voiceblue_init_irq(void) |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index bbbaeb0abcd3..06808434ea04 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
| @@ -71,7 +71,7 @@ static inline void omap_init_rtc(void) {} | |||
| 71 | # define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 | 71 | # define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 |
| 72 | #endif | 72 | #endif |
| 73 | 73 | ||
| 74 | #define OMAP1_MBOX_BASE IO_ADDRESS(OMAP16XX_MAILBOX_BASE) | 74 | #define OMAP1_MBOX_BASE OMAP1_IO_ADDRESS(OMAP16XX_MAILBOX_BASE) |
| 75 | 75 | ||
| 76 | static struct resource mbox_resources[] = { | 76 | static struct resource mbox_resources[] = { |
| 77 | { | 77 | { |
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 3afe540149f7..7030f9281ea1 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c | |||
| @@ -29,9 +29,9 @@ extern void omapfb_reserve_sdram(void); | |||
| 29 | */ | 29 | */ |
| 30 | static struct map_desc omap_io_desc[] __initdata = { | 30 | static struct map_desc omap_io_desc[] __initdata = { |
| 31 | { | 31 | { |
| 32 | .virtual = IO_VIRT, | 32 | .virtual = OMAP1_IO_VIRT, |
| 33 | .pfn = __phys_to_pfn(IO_PHYS), | 33 | .pfn = __phys_to_pfn(OMAP1_IO_PHYS), |
| 34 | .length = IO_SIZE, | 34 | .length = OMAP1_IO_SIZE, |
| 35 | .type = MT_DEVICE | 35 | .type = MT_DEVICE |
| 36 | } | 36 | } |
| 37 | }; | 37 | }; |
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h index 9ed5e2c1de4d..c4f05bdcf8a6 100644 --- a/arch/arm/mach-omap1/pm.h +++ b/arch/arm/mach-omap1/pm.h | |||
| @@ -39,11 +39,11 @@ | |||
| 39 | * Register and offset definitions to be used in PM assembler code | 39 | * Register and offset definitions to be used in PM assembler code |
| 40 | * ---------------------------------------------------------------------------- | 40 | * ---------------------------------------------------------------------------- |
| 41 | */ | 41 | */ |
| 42 | #define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) | 42 | #define CLKGEN_REG_ASM_BASE OMAP1_IO_ADDRESS(0xfffece00) |
| 43 | #define ARM_IDLECT1_ASM_OFFSET 0x04 | 43 | #define ARM_IDLECT1_ASM_OFFSET 0x04 |
| 44 | #define ARM_IDLECT2_ASM_OFFSET 0x08 | 44 | #define ARM_IDLECT2_ASM_OFFSET 0x08 |
| 45 | 45 | ||
| 46 | #define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) | 46 | #define TCMIF_ASM_BASE OMAP1_IO_ADDRESS(0xfffecc00) |
| 47 | #define EMIFS_CONFIG_ASM_OFFSET 0x0c | 47 | #define EMIFS_CONFIG_ASM_OFFSET 0x0c |
| 48 | #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 | 48 | #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 |
| 49 | 49 | ||
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index f754cee4f3c3..d496e50fec40 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c | |||
| @@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) | |||
| 64 | 64 | ||
| 65 | static struct plat_serial8250_port serial_platform_data[] = { | 65 | static struct plat_serial8250_port serial_platform_data[] = { |
| 66 | { | 66 | { |
| 67 | .membase = IO_ADDRESS(OMAP_UART1_BASE), | 67 | .membase = OMAP1_IO_ADDRESS(OMAP_UART1_BASE), |
| 68 | .mapbase = OMAP_UART1_BASE, | 68 | .mapbase = OMAP_UART1_BASE, |
| 69 | .irq = INT_UART1, | 69 | .irq = INT_UART1, |
| 70 | .flags = UPF_BOOT_AUTOCONF, | 70 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -73,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 73 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 73 | .uartclk = OMAP16XX_BASE_BAUD * 16, |
| 74 | }, | 74 | }, |
| 75 | { | 75 | { |
| 76 | .membase = IO_ADDRESS(OMAP_UART2_BASE), | 76 | .membase = OMAP1_IO_ADDRESS(OMAP_UART2_BASE), |
| 77 | .mapbase = OMAP_UART2_BASE, | 77 | .mapbase = OMAP_UART2_BASE, |
| 78 | .irq = INT_UART2, | 78 | .irq = INT_UART2, |
| 79 | .flags = UPF_BOOT_AUTOCONF, | 79 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -82,7 +82,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 82 | .uartclk = OMAP16XX_BASE_BAUD * 16, | 82 | .uartclk = OMAP16XX_BASE_BAUD * 16, |
| 83 | }, | 83 | }, |
| 84 | { | 84 | { |
| 85 | .membase = IO_ADDRESS(OMAP_UART3_BASE), | 85 | .membase = OMAP1_IO_ADDRESS(OMAP_UART3_BASE), |
| 86 | .mapbase = OMAP_UART3_BASE, | 86 | .mapbase = OMAP_UART3_BASE, |
| 87 | .irq = INT_UART3, | 87 | .irq = INT_UART3, |
| 88 | .flags = UPF_BOOT_AUTOCONF, | 88 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -109,7 +109,6 @@ static struct platform_device serial_device = { | |||
| 109 | void __init omap_serial_init(void) | 109 | void __init omap_serial_init(void) |
| 110 | { | 110 | { |
| 111 | int i; | 111 | int i; |
| 112 | const struct omap_uart_config *info; | ||
| 113 | 112 | ||
| 114 | if (cpu_is_omap730()) { | 113 | if (cpu_is_omap730()) { |
| 115 | serial_platform_data[0].regshift = 0; | 114 | serial_platform_data[0].regshift = 0; |
| @@ -131,19 +130,9 @@ void __init omap_serial_init(void) | |||
| 131 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; | 130 | serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; |
| 132 | } | 131 | } |
| 133 | 132 | ||
| 134 | info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); | ||
| 135 | if (info == NULL) | ||
| 136 | return; | ||
| 137 | |||
| 138 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | 133 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { |
| 139 | unsigned char reg; | 134 | unsigned char reg; |
| 140 | 135 | ||
| 141 | if (!((1 << i) & info->enabled_uarts)) { | ||
| 142 | serial_platform_data[i].membase = NULL; | ||
| 143 | serial_platform_data[i].mapbase = 0; | ||
| 144 | continue; | ||
| 145 | } | ||
| 146 | |||
| 147 | switch (i) { | 136 | switch (i) { |
| 148 | case 0: | 137 | case 0: |
| 149 | uart1_ck = clk_get(NULL, "uart1_ck"); | 138 | uart1_ck = clk_get(NULL, "uart1_ck"); |
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 261cdc48228b..7724e520d07c 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S | |||
| @@ -21,13 +21,13 @@ | |||
| 21 | ENTRY(omap1_sram_reprogram_clock) | 21 | ENTRY(omap1_sram_reprogram_clock) |
| 22 | stmfd sp!, {r0 - r12, lr} @ save registers on stack | 22 | stmfd sp!, {r0 - r12, lr} @ save registers on stack |
| 23 | 23 | ||
| 24 | mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 | 24 | mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000 |
| 25 | orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000 | 25 | orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000 |
| 26 | orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00 | 26 | orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00 |
| 27 | 27 | ||
| 28 | mov r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000 | 28 | mov r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000 |
| 29 | orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 | 29 | orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 |
| 30 | orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 | 30 | orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 |
| 31 | 31 | ||
| 32 | tst r0, #1 << 4 @ want lock mode? | 32 | tst r0, #1 << 4 @ want lock mode? |
| 33 | beq newck @ nope | 33 | beq newck @ nope |
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index 4d56408d3cff..1be6a214d88d 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c | |||
| @@ -62,8 +62,8 @@ typedef struct { | |||
| 62 | u32 read_tim; /* READ_TIM, R */ | 62 | u32 read_tim; /* READ_TIM, R */ |
| 63 | } omap_mpu_timer_regs_t; | 63 | } omap_mpu_timer_regs_t; |
| 64 | 64 | ||
| 65 | #define omap_mpu_timer_base(n) \ | 65 | #define omap_mpu_timer_base(n) \ |
| 66 | ((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ | 66 | ((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ |
| 67 | (n)*OMAP_MPU_TIMER_OFFSET)) | 67 | (n)*OMAP_MPU_TIMER_OFFSET)) |
| 68 | 68 | ||
| 69 | static inline unsigned long omap_mpu_timer_read(int nr) | 69 | static inline unsigned long omap_mpu_timer_read(int nr) |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index a755eb5e2361..75b1c7efae7e 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
| @@ -31,6 +31,11 @@ config MACH_OMAP_GENERIC | |||
| 31 | bool "Generic OMAP board" | 31 | bool "Generic OMAP board" |
| 32 | depends on ARCH_OMAP2 && ARCH_OMAP24XX | 32 | depends on ARCH_OMAP2 && ARCH_OMAP24XX |
| 33 | 33 | ||
| 34 | config MACH_OMAP2_TUSB6010 | ||
| 35 | bool | ||
| 36 | depends on ARCH_OMAP2 && ARCH_OMAP2420 | ||
| 37 | default y if MACH_NOKIA_N8X0 | ||
| 38 | |||
| 34 | config MACH_OMAP_H4 | 39 | config MACH_OMAP_H4 |
| 35 | bool "OMAP 2420 H4 board" | 40 | bool "OMAP 2420 H4 board" |
| 36 | depends on ARCH_OMAP2 && ARCH_OMAP24XX | 41 | depends on ARCH_OMAP2 && ARCH_OMAP24XX |
| @@ -68,6 +73,10 @@ config MACH_OMAP_3430SDP | |||
| 68 | bool "OMAP 3430 SDP board" | 73 | bool "OMAP 3430 SDP board" |
| 69 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | 74 | depends on ARCH_OMAP3 && ARCH_OMAP34XX |
| 70 | 75 | ||
| 76 | config MACH_NOKIA_N8X0 | ||
| 77 | bool "Nokia N800/N810" | ||
| 78 | depends on ARCH_OMAP2420 | ||
| 79 | |||
| 71 | config MACH_NOKIA_RX51 | 80 | config MACH_NOKIA_RX51 |
| 72 | bool "Nokia RX-51 board" | 81 | bool "Nokia RX-51 board" |
| 73 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | 82 | depends on ARCH_OMAP3 && ARCH_OMAP34XX |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 735bae5b0dec..8cb16777661a 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
| @@ -5,7 +5,7 @@ | |||
| 5 | # Common support | 5 | # Common support |
| 6 | obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o | 6 | obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o |
| 7 | 7 | ||
| 8 | omap-2-3-common = irq.o sdrc.o | 8 | omap-2-3-common = irq.o sdrc.o omap_hwmod.o |
| 9 | prcm-common = prcm.o powerdomain.o | 9 | prcm-common = prcm.o powerdomain.o |
| 10 | clock-common = clock.o clockdomain.o | 10 | clock-common = clock.o clockdomain.o |
| 11 | 11 | ||
| @@ -35,6 +35,11 @@ obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o | |||
| 35 | obj-$(CONFIG_PM_DEBUG) += pm-debug.o | 35 | obj-$(CONFIG_PM_DEBUG) += pm-debug.o |
| 36 | endif | 36 | endif |
| 37 | 37 | ||
| 38 | # PRCM | ||
| 39 | obj-$(CONFIG_ARCH_OMAP2) += cm.o | ||
| 40 | obj-$(CONFIG_ARCH_OMAP3) += cm.o | ||
| 41 | obj-$(CONFIG_ARCH_OMAP4) += cm4xxx.o | ||
| 42 | |||
| 38 | # Clock framework | 43 | # Clock framework |
| 39 | obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o | 44 | obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o |
| 40 | obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o | 45 | obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o |
| @@ -62,7 +67,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \ | |||
| 62 | mmc-twl4030.o | 67 | mmc-twl4030.o |
| 63 | obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ | 68 | obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ |
| 64 | mmc-twl4030.o | 69 | mmc-twl4030.o |
| 65 | 70 | obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o | |
| 66 | obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ | 71 | obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ |
| 67 | board-rx51-peripherals.o \ | 72 | board-rx51-peripherals.o \ |
| 68 | mmc-twl4030.o | 73 | mmc-twl4030.o |
| @@ -74,6 +79,7 @@ obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o | |||
| 74 | 79 | ||
| 75 | # Platform specific device init code | 80 | # Platform specific device init code |
| 76 | obj-y += usb-musb.o | 81 | obj-y += usb-musb.o |
| 82 | obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o | ||
| 77 | 83 | ||
| 78 | onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o | 84 | onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o |
| 79 | obj-y += $(onenand-m) $(onenand-y) | 85 | obj-y += $(onenand-m) $(onenand-y) |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 8ec2a132904d..42217b32f835 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
| @@ -139,23 +139,19 @@ static inline void board_smc91x_init(void) | |||
| 139 | 139 | ||
| 140 | #endif | 140 | #endif |
| 141 | 141 | ||
| 142 | static struct omap_board_config_kernel sdp2430_config[] = { | ||
| 143 | {OMAP_TAG_LCD, &sdp2430_lcd_config}, | ||
| 144 | }; | ||
| 145 | |||
| 142 | static void __init omap_2430sdp_init_irq(void) | 146 | static void __init omap_2430sdp_init_irq(void) |
| 143 | { | 147 | { |
| 148 | omap_board_config = sdp2430_config; | ||
| 149 | omap_board_config_size = ARRAY_SIZE(sdp2430_config); | ||
| 144 | omap2_init_common_hw(NULL, NULL); | 150 | omap2_init_common_hw(NULL, NULL); |
| 145 | omap_init_irq(); | 151 | omap_init_irq(); |
| 146 | omap_gpio_init(); | 152 | omap_gpio_init(); |
| 147 | } | 153 | } |
| 148 | 154 | ||
| 149 | static struct omap_uart_config sdp2430_uart_config __initdata = { | ||
| 150 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 151 | }; | ||
| 152 | |||
| 153 | static struct omap_board_config_kernel sdp2430_config[] = { | ||
| 154 | {OMAP_TAG_UART, &sdp2430_uart_config}, | ||
| 155 | {OMAP_TAG_LCD, &sdp2430_lcd_config}, | ||
| 156 | }; | ||
| 157 | |||
| 158 | |||
| 159 | static struct twl4030_gpio_platform_data sdp2430_gpio_data = { | 155 | static struct twl4030_gpio_platform_data sdp2430_gpio_data = { |
| 160 | .gpio_base = OMAP_MAX_GPIO_LINES, | 156 | .gpio_base = OMAP_MAX_GPIO_LINES, |
| 161 | .irq_base = TWL4030_GPIO_IRQ_BASE, | 157 | .irq_base = TWL4030_GPIO_IRQ_BASE, |
| @@ -205,8 +201,6 @@ static void __init omap_2430sdp_init(void) | |||
| 205 | omap2430_i2c_init(); | 201 | omap2430_i2c_init(); |
| 206 | 202 | ||
| 207 | platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); | 203 | platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); |
| 208 | omap_board_config = sdp2430_config; | ||
| 209 | omap_board_config_size = ARRAY_SIZE(sdp2430_config); | ||
| 210 | omap_serial_init(); | 204 | omap_serial_init(); |
| 211 | twl4030_mmc_init(mmc); | 205 | twl4030_mmc_init(mmc); |
| 212 | usb_musb_init(); | 206 | usb_musb_init(); |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index ac262cd74503..bd57ec76dc5e 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
| @@ -167,26 +167,23 @@ static struct platform_device *sdp3430_devices[] __initdata = { | |||
| 167 | &sdp3430_lcd_device, | 167 | &sdp3430_lcd_device, |
| 168 | }; | 168 | }; |
| 169 | 169 | ||
| 170 | static void __init omap_3430sdp_init_irq(void) | ||
| 171 | { | ||
| 172 | omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); | ||
| 173 | omap_init_irq(); | ||
| 174 | omap_gpio_init(); | ||
| 175 | } | ||
| 176 | |||
| 177 | static struct omap_uart_config sdp3430_uart_config __initdata = { | ||
| 178 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 179 | }; | ||
| 180 | |||
| 181 | static struct omap_lcd_config sdp3430_lcd_config __initdata = { | 170 | static struct omap_lcd_config sdp3430_lcd_config __initdata = { |
| 182 | .ctrl_name = "internal", | 171 | .ctrl_name = "internal", |
| 183 | }; | 172 | }; |
| 184 | 173 | ||
| 185 | static struct omap_board_config_kernel sdp3430_config[] __initdata = { | 174 | static struct omap_board_config_kernel sdp3430_config[] __initdata = { |
| 186 | { OMAP_TAG_UART, &sdp3430_uart_config }, | ||
| 187 | { OMAP_TAG_LCD, &sdp3430_lcd_config }, | 175 | { OMAP_TAG_LCD, &sdp3430_lcd_config }, |
| 188 | }; | 176 | }; |
| 189 | 177 | ||
| 178 | static void __init omap_3430sdp_init_irq(void) | ||
| 179 | { | ||
| 180 | omap_board_config = sdp3430_config; | ||
| 181 | omap_board_config_size = ARRAY_SIZE(sdp3430_config); | ||
| 182 | omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL); | ||
| 183 | omap_init_irq(); | ||
| 184 | omap_gpio_init(); | ||
| 185 | } | ||
| 186 | |||
| 190 | static int sdp3430_batt_table[] = { | 187 | static int sdp3430_batt_table[] = { |
| 191 | /* 0 C*/ | 188 | /* 0 C*/ |
| 192 | 30800, 29500, 28300, 27100, | 189 | 30800, 29500, 28300, 27100, |
| @@ -478,12 +475,15 @@ static inline void board_smc91x_init(void) | |||
| 478 | 475 | ||
| 479 | #endif | 476 | #endif |
| 480 | 477 | ||
| 478 | static void enable_board_wakeup_source(void) | ||
| 479 | { | ||
| 480 | omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */ | ||
| 481 | } | ||
| 482 | |||
| 481 | static void __init omap_3430sdp_init(void) | 483 | static void __init omap_3430sdp_init(void) |
| 482 | { | 484 | { |
| 483 | omap3430_i2c_init(); | 485 | omap3430_i2c_init(); |
| 484 | platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices)); | 486 | platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices)); |
| 485 | omap_board_config = sdp3430_config; | ||
| 486 | omap_board_config_size = ARRAY_SIZE(sdp3430_config); | ||
| 487 | if (omap_rev() > OMAP3430_REV_ES1_0) | 487 | if (omap_rev() > OMAP3430_REV_ES1_0) |
| 488 | ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; | 488 | ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2; |
| 489 | else | 489 | else |
| @@ -495,6 +495,7 @@ static void __init omap_3430sdp_init(void) | |||
| 495 | omap_serial_init(); | 495 | omap_serial_init(); |
| 496 | usb_musb_init(); | 496 | usb_musb_init(); |
| 497 | board_smc91x_init(); | 497 | board_smc91x_init(); |
| 498 | enable_board_wakeup_source(); | ||
| 498 | } | 499 | } |
| 499 | 500 | ||
| 500 | static void __init omap_3430sdp_map_io(void) | 501 | static void __init omap_3430sdp_map_io(void) |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 1b223076ceb7..eb37c40ea83a 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
| @@ -47,14 +47,13 @@ static struct omap_lcd_config sdp4430_lcd_config __initdata = { | |||
| 47 | }; | 47 | }; |
| 48 | 48 | ||
| 49 | static struct omap_board_config_kernel sdp4430_config[] __initdata = { | 49 | static struct omap_board_config_kernel sdp4430_config[] __initdata = { |
| 50 | { OMAP_TAG_UART, &sdp4430_uart_config }, | ||
| 51 | { OMAP_TAG_LCD, &sdp4430_lcd_config }, | 50 | { OMAP_TAG_LCD, &sdp4430_lcd_config }, |
| 52 | }; | 51 | }; |
| 53 | 52 | ||
| 54 | static void __init gic_init_irq(void) | 53 | static void __init gic_init_irq(void) |
| 55 | { | 54 | { |
| 56 | gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29); | 55 | gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29); |
| 57 | gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); | 56 | gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); |
| 58 | } | 57 | } |
| 59 | 58 | ||
| 60 | static void __init omap_4430sdp_init_irq(void) | 59 | static void __init omap_4430sdp_init_irq(void) |
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index dcfc20d03894..7a2b54c7291a 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
| @@ -248,18 +248,6 @@ out: | |||
| 248 | clk_put(gpmc_fck); | 248 | clk_put(gpmc_fck); |
| 249 | } | 249 | } |
| 250 | 250 | ||
| 251 | static void __init omap_apollon_init_irq(void) | ||
| 252 | { | ||
| 253 | omap2_init_common_hw(NULL, NULL); | ||
| 254 | omap_init_irq(); | ||
| 255 | omap_gpio_init(); | ||
| 256 | apollon_init_smc91x(); | ||
| 257 | } | ||
| 258 | |||
| 259 | static struct omap_uart_config apollon_uart_config __initdata = { | ||
| 260 | .enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2), | ||
| 261 | }; | ||
| 262 | |||
| 263 | static struct omap_usb_config apollon_usb_config __initdata = { | 251 | static struct omap_usb_config apollon_usb_config __initdata = { |
| 264 | .register_dev = 1, | 252 | .register_dev = 1, |
| 265 | .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ | 253 | .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ |
| @@ -272,10 +260,19 @@ static struct omap_lcd_config apollon_lcd_config __initdata = { | |||
| 272 | }; | 260 | }; |
| 273 | 261 | ||
| 274 | static struct omap_board_config_kernel apollon_config[] = { | 262 | static struct omap_board_config_kernel apollon_config[] = { |
| 275 | { OMAP_TAG_UART, &apollon_uart_config }, | ||
| 276 | { OMAP_TAG_LCD, &apollon_lcd_config }, | 263 | { OMAP_TAG_LCD, &apollon_lcd_config }, |
| 277 | }; | 264 | }; |
| 278 | 265 | ||
| 266 | static void __init omap_apollon_init_irq(void) | ||
| 267 | { | ||
| 268 | omap_board_config = apollon_config; | ||
| 269 | omap_board_config_size = ARRAY_SIZE(apollon_config); | ||
| 270 | omap2_init_common_hw(NULL, NULL); | ||
| 271 | omap_init_irq(); | ||
| 272 | omap_gpio_init(); | ||
| 273 | apollon_init_smc91x(); | ||
| 274 | } | ||
| 275 | |||
| 279 | static void __init apollon_led_init(void) | 276 | static void __init apollon_led_init(void) |
| 280 | { | 277 | { |
| 281 | /* LED0 - AA10 */ | 278 | /* LED0 - AA10 */ |
| @@ -324,8 +321,6 @@ static void __init omap_apollon_init(void) | |||
| 324 | * if not needed. | 321 | * if not needed. |
| 325 | */ | 322 | */ |
| 326 | platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices)); | 323 | platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices)); |
| 327 | omap_board_config = apollon_config; | ||
| 328 | omap_board_config_size = ARRAY_SIZE(apollon_config); | ||
| 329 | omap_serial_init(); | 324 | omap_serial_init(); |
| 330 | } | 325 | } |
| 331 | 326 | ||
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index fd00aa03690c..2e09a1c444cb 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c | |||
| @@ -31,24 +31,19 @@ | |||
| 31 | #include <mach/board.h> | 31 | #include <mach/board.h> |
| 32 | #include <mach/common.h> | 32 | #include <mach/common.h> |
| 33 | 33 | ||
| 34 | static struct omap_board_config_kernel generic_config[] = { | ||
| 35 | }; | ||
| 36 | |||
| 34 | static void __init omap_generic_init_irq(void) | 37 | static void __init omap_generic_init_irq(void) |
| 35 | { | 38 | { |
| 39 | omap_board_config = generic_config; | ||
| 40 | omap_board_config_size = ARRAY_SIZE(generic_config); | ||
| 36 | omap2_init_common_hw(NULL, NULL); | 41 | omap2_init_common_hw(NULL, NULL); |
| 37 | omap_init_irq(); | 42 | omap_init_irq(); |
| 38 | } | 43 | } |
| 39 | 44 | ||
| 40 | static struct omap_uart_config generic_uart_config __initdata = { | ||
| 41 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 42 | }; | ||
| 43 | |||
| 44 | static struct omap_board_config_kernel generic_config[] = { | ||
| 45 | { OMAP_TAG_UART, &generic_uart_config }, | ||
| 46 | }; | ||
| 47 | |||
| 48 | static void __init omap_generic_init(void) | 45 | static void __init omap_generic_init(void) |
| 49 | { | 46 | { |
| 50 | omap_board_config = generic_config; | ||
| 51 | omap_board_config_size = ARRAY_SIZE(generic_config); | ||
| 52 | omap_serial_init(); | 47 | omap_serial_init(); |
| 53 | } | 48 | } |
| 54 | 49 | ||
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 7b1d61d5bb2c..eaa02d012c5c 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
| @@ -268,18 +268,6 @@ static void __init h4_init_flash(void) | |||
| 268 | h4_flash_resource.end = base + SZ_64M - 1; | 268 | h4_flash_resource.end = base + SZ_64M - 1; |
| 269 | } | 269 | } |
| 270 | 270 | ||
| 271 | static void __init omap_h4_init_irq(void) | ||
| 272 | { | ||
| 273 | omap2_init_common_hw(NULL, NULL); | ||
| 274 | omap_init_irq(); | ||
| 275 | omap_gpio_init(); | ||
| 276 | h4_init_flash(); | ||
| 277 | } | ||
| 278 | |||
| 279 | static struct omap_uart_config h4_uart_config __initdata = { | ||
| 280 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 281 | }; | ||
| 282 | |||
| 283 | static struct omap_lcd_config h4_lcd_config __initdata = { | 271 | static struct omap_lcd_config h4_lcd_config __initdata = { |
| 284 | .ctrl_name = "internal", | 272 | .ctrl_name = "internal", |
| 285 | }; | 273 | }; |
| @@ -318,10 +306,19 @@ static struct omap_usb_config h4_usb_config __initdata = { | |||
| 318 | }; | 306 | }; |
| 319 | 307 | ||
| 320 | static struct omap_board_config_kernel h4_config[] = { | 308 | static struct omap_board_config_kernel h4_config[] = { |
| 321 | { OMAP_TAG_UART, &h4_uart_config }, | ||
| 322 | { OMAP_TAG_LCD, &h4_lcd_config }, | 309 | { OMAP_TAG_LCD, &h4_lcd_config }, |
| 323 | }; | 310 | }; |
| 324 | 311 | ||
| 312 | static void __init omap_h4_init_irq(void) | ||
| 313 | { | ||
| 314 | omap_board_config = h4_config; | ||
| 315 | omap_board_config_size = ARRAY_SIZE(h4_config); | ||
| 316 | omap2_init_common_hw(NULL, NULL); | ||
| 317 | omap_init_irq(); | ||
| 318 | omap_gpio_init(); | ||
| 319 | h4_init_flash(); | ||
| 320 | } | ||
| 321 | |||
| 325 | static struct at24_platform_data m24c01 = { | 322 | static struct at24_platform_data m24c01 = { |
| 326 | .byte_len = SZ_1K / 8, | 323 | .byte_len = SZ_1K / 8, |
| 327 | .page_size = 16, | 324 | .page_size = 16, |
| @@ -366,8 +363,6 @@ static void __init omap_h4_init(void) | |||
| 366 | ARRAY_SIZE(h4_i2c_board_info)); | 363 | ARRAY_SIZE(h4_i2c_board_info)); |
| 367 | 364 | ||
| 368 | platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); | 365 | platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); |
| 369 | omap_board_config = h4_config; | ||
| 370 | omap_board_config_size = ARRAY_SIZE(h4_config); | ||
| 371 | omap_usb_init(&h4_usb_config); | 366 | omap_usb_init(&h4_usb_config); |
| 372 | omap_serial_init(); | 367 | omap_serial_init(); |
| 373 | } | 368 | } |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index ea383f88cb1b..ec6854cbdd9f 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
| @@ -268,18 +268,6 @@ static inline void __init ldp_init_smsc911x(void) | |||
| 268 | gpio_direction_input(eth_gpio); | 268 | gpio_direction_input(eth_gpio); |
| 269 | } | 269 | } |
| 270 | 270 | ||
| 271 | static void __init omap_ldp_init_irq(void) | ||
| 272 | { | ||
| 273 | omap2_init_common_hw(NULL, NULL); | ||
| 274 | omap_init_irq(); | ||
| 275 | omap_gpio_init(); | ||
| 276 | ldp_init_smsc911x(); | ||
| 277 | } | ||
| 278 | |||
| 279 | static struct omap_uart_config ldp_uart_config __initdata = { | ||
| 280 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 281 | }; | ||
| 282 | |||
| 283 | static struct platform_device ldp_lcd_device = { | 271 | static struct platform_device ldp_lcd_device = { |
| 284 | .name = "ldp_lcd", | 272 | .name = "ldp_lcd", |
| 285 | .id = -1, | 273 | .id = -1, |
| @@ -290,10 +278,19 @@ static struct omap_lcd_config ldp_lcd_config __initdata = { | |||
| 290 | }; | 278 | }; |
| 291 | 279 | ||
| 292 | static struct omap_board_config_kernel ldp_config[] __initdata = { | 280 | static struct omap_board_config_kernel ldp_config[] __initdata = { |
| 293 | { OMAP_TAG_UART, &ldp_uart_config }, | ||
| 294 | { OMAP_TAG_LCD, &ldp_lcd_config }, | 281 | { OMAP_TAG_LCD, &ldp_lcd_config }, |
| 295 | }; | 282 | }; |
| 296 | 283 | ||
| 284 | static void __init omap_ldp_init_irq(void) | ||
| 285 | { | ||
| 286 | omap_board_config = ldp_config; | ||
| 287 | omap_board_config_size = ARRAY_SIZE(ldp_config); | ||
| 288 | omap2_init_common_hw(NULL, NULL); | ||
| 289 | omap_init_irq(); | ||
| 290 | omap_gpio_init(); | ||
| 291 | ldp_init_smsc911x(); | ||
| 292 | } | ||
| 293 | |||
| 297 | static struct twl4030_usb_data ldp_usb_data = { | 294 | static struct twl4030_usb_data ldp_usb_data = { |
| 298 | .usb_mode = T2_USB_MODE_ULPI, | 295 | .usb_mode = T2_USB_MODE_ULPI, |
| 299 | }; | 296 | }; |
| @@ -377,8 +374,6 @@ static void __init omap_ldp_init(void) | |||
| 377 | { | 374 | { |
| 378 | omap_i2c_init(); | 375 | omap_i2c_init(); |
| 379 | platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); | 376 | platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); |
| 380 | omap_board_config = ldp_config; | ||
| 381 | omap_board_config_size = ARRAY_SIZE(ldp_config); | ||
| 382 | ts_gpio = 54; | 377 | ts_gpio = 54; |
| 383 | ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio); | 378 | ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio); |
| 384 | spi_register_board_info(ldp_spi_board_info, | 379 | spi_register_board_info(ldp_spi_board_info, |
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c new file mode 100644 index 000000000000..8341632d260b --- /dev/null +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
| @@ -0,0 +1,150 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-omap2/board-n8x0.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2005-2009 Nokia Corporation | ||
| 5 | * Author: Juha Yrjola <juha.yrjola@nokia.com> | ||
| 6 | * | ||
| 7 | * Modified from mach-omap2/board-generic.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/clk.h> | ||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/gpio.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | #include <linux/stddef.h> | ||
| 20 | #include <linux/spi/spi.h> | ||
| 21 | #include <linux/usb/musb.h> | ||
| 22 | |||
| 23 | #include <asm/mach/arch.h> | ||
| 24 | #include <asm/mach-types.h> | ||
| 25 | |||
| 26 | #include <mach/board.h> | ||
| 27 | #include <mach/common.h> | ||
| 28 | #include <mach/irqs.h> | ||
| 29 | #include <mach/mcspi.h> | ||
| 30 | #include <mach/onenand.h> | ||
| 31 | #include <mach/serial.h> | ||
| 32 | |||
| 33 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { | ||
| 34 | .turbo_mode = 0, | ||
| 35 | .single_channel = 1, | ||
| 36 | }; | ||
| 37 | |||
| 38 | static struct spi_board_info n800_spi_board_info[] __initdata = { | ||
| 39 | { | ||
| 40 | .modalias = "p54spi", | ||
| 41 | .bus_num = 2, | ||
| 42 | .chip_select = 0, | ||
| 43 | .max_speed_hz = 48000000, | ||
| 44 | .controller_data = &p54spi_mcspi_config, | ||
| 45 | }, | ||
| 46 | }; | ||
| 47 | |||
| 48 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ | ||
| 49 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | ||
| 50 | |||
| 51 | static struct mtd_partition onenand_partitions[] = { | ||
| 52 | { | ||
| 53 | .name = "bootloader", | ||
| 54 | .offset = 0, | ||
| 55 | .size = 0x20000, | ||
| 56 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | ||
| 57 | }, | ||
| 58 | { | ||
| 59 | .name = "config", | ||
| 60 | .offset = MTDPART_OFS_APPEND, | ||
| 61 | .size = 0x60000, | ||
| 62 | }, | ||
| 63 | { | ||
| 64 | .name = "kernel", | ||
| 65 | .offset = MTDPART_OFS_APPEND, | ||
| 66 | .size = 0x200000, | ||
| 67 | }, | ||
| 68 | { | ||
| 69 | .name = "initfs", | ||
| 70 | .offset = MTDPART_OFS_APPEND, | ||
| 71 | .size = 0x400000, | ||
| 72 | }, | ||
| 73 | { | ||
| 74 | .name = "rootfs", | ||
| 75 | .offset = MTDPART_OFS_APPEND, | ||
| 76 | .size = MTDPART_SIZ_FULL, | ||
| 77 | }, | ||
| 78 | }; | ||
| 79 | |||
| 80 | static struct omap_onenand_platform_data board_onenand_data = { | ||
| 81 | .cs = 0, | ||
| 82 | .gpio_irq = 26, | ||
| 83 | .parts = onenand_partitions, | ||
| 84 | .nr_parts = ARRAY_SIZE(onenand_partitions), | ||
| 85 | .flags = ONENAND_SYNC_READ, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static void __init n8x0_onenand_init(void) | ||
| 89 | { | ||
| 90 | gpmc_onenand_init(&board_onenand_data); | ||
| 91 | } | ||
| 92 | |||
| 93 | #else | ||
| 94 | |||
| 95 | static void __init n8x0_onenand_init(void) {} | ||
| 96 | |||
| 97 | #endif | ||
| 98 | |||
| 99 | static void __init n8x0_map_io(void) | ||
| 100 | { | ||
| 101 | omap2_set_globals_242x(); | ||
| 102 | omap2_map_common_io(); | ||
| 103 | } | ||
| 104 | |||
| 105 | static void __init n8x0_init_irq(void) | ||
| 106 | { | ||
| 107 | omap2_init_common_hw(NULL, NULL); | ||
| 108 | omap_init_irq(); | ||
| 109 | omap_gpio_init(); | ||
| 110 | } | ||
| 111 | |||
| 112 | static void __init n8x0_init_machine(void) | ||
| 113 | { | ||
| 114 | /* FIXME: add n810 spi devices */ | ||
| 115 | spi_register_board_info(n800_spi_board_info, | ||
| 116 | ARRAY_SIZE(n800_spi_board_info)); | ||
| 117 | |||
| 118 | omap_serial_init(); | ||
| 119 | n8x0_onenand_init(); | ||
| 120 | } | ||
| 121 | |||
| 122 | MACHINE_START(NOKIA_N800, "Nokia N800") | ||
| 123 | .phys_io = 0x48000000, | ||
| 124 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
| 125 | .boot_params = 0x80000100, | ||
| 126 | .map_io = n8x0_map_io, | ||
| 127 | .init_irq = n8x0_init_irq, | ||
| 128 | .init_machine = n8x0_init_machine, | ||
| 129 | .timer = &omap_timer, | ||
| 130 | MACHINE_END | ||
| 131 | |||
| 132 | MACHINE_START(NOKIA_N810, "Nokia N810") | ||
| 133 | .phys_io = 0x48000000, | ||
| 134 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
| 135 | .boot_params = 0x80000100, | ||
| 136 | .map_io = n8x0_map_io, | ||
| 137 | .init_irq = n8x0_init_irq, | ||
| 138 | .init_machine = n8x0_init_machine, | ||
| 139 | .timer = &omap_timer, | ||
| 140 | MACHINE_END | ||
| 141 | |||
| 142 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | ||
| 143 | .phys_io = 0x48000000, | ||
| 144 | .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
| 145 | .boot_params = 0x80000100, | ||
| 146 | .map_io = n8x0_map_io, | ||
| 147 | .init_irq = n8x0_init_irq, | ||
| 148 | .init_machine = n8x0_init_machine, | ||
| 149 | .timer = &omap_timer, | ||
| 150 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index e00ba128cece..500c9956876d 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
| @@ -108,10 +108,6 @@ static struct platform_device omap3beagle_nand_device = { | |||
| 108 | 108 | ||
| 109 | #include "sdram-micron-mt46h32m32lf-6.h" | 109 | #include "sdram-micron-mt46h32m32lf-6.h" |
| 110 | 110 | ||
| 111 | static struct omap_uart_config omap3_beagle_uart_config __initdata = { | ||
| 112 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 113 | }; | ||
| 114 | |||
| 115 | static struct twl4030_hsmmc_info mmc[] = { | 111 | static struct twl4030_hsmmc_info mmc[] = { |
| 116 | { | 112 | { |
| 117 | .mmc = 1, | 113 | .mmc = 1, |
| @@ -249,11 +245,16 @@ static struct regulator_init_data beagle_vpll2 = { | |||
| 249 | .consumer_supplies = &beagle_vdvi_supply, | 245 | .consumer_supplies = &beagle_vdvi_supply, |
| 250 | }; | 246 | }; |
| 251 | 247 | ||
| 248 | static struct twl4030_usb_data beagle_usb_data = { | ||
| 249 | .usb_mode = T2_USB_MODE_ULPI, | ||
| 250 | }; | ||
| 251 | |||
| 252 | static struct twl4030_platform_data beagle_twldata = { | 252 | static struct twl4030_platform_data beagle_twldata = { |
| 253 | .irq_base = TWL4030_IRQ_BASE, | 253 | .irq_base = TWL4030_IRQ_BASE, |
| 254 | .irq_end = TWL4030_IRQ_END, | 254 | .irq_end = TWL4030_IRQ_END, |
| 255 | 255 | ||
| 256 | /* platform_data for children goes here */ | 256 | /* platform_data for children goes here */ |
| 257 | .usb = &beagle_usb_data, | ||
| 257 | .gpio = &beagle_gpio_data, | 258 | .gpio = &beagle_gpio_data, |
| 258 | .vmmc1 = &beagle_vmmc1, | 259 | .vmmc1 = &beagle_vmmc1, |
| 259 | .vsim = &beagle_vsim, | 260 | .vsim = &beagle_vsim, |
| @@ -280,17 +281,6 @@ static int __init omap3_beagle_i2c_init(void) | |||
| 280 | return 0; | 281 | return 0; |
| 281 | } | 282 | } |
| 282 | 283 | ||
| 283 | static void __init omap3_beagle_init_irq(void) | ||
| 284 | { | ||
| 285 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | ||
| 286 | mt46h32m32lf6_sdrc_params); | ||
| 287 | omap_init_irq(); | ||
| 288 | #ifdef CONFIG_OMAP_32K_TIMER | ||
| 289 | omap2_gp_clockevent_set_gptimer(12); | ||
| 290 | #endif | ||
| 291 | omap_gpio_init(); | ||
| 292 | } | ||
| 293 | |||
| 294 | static struct gpio_led gpio_leds[] = { | 284 | static struct gpio_led gpio_leds[] = { |
| 295 | { | 285 | { |
| 296 | .name = "beagleboard::usr0", | 286 | .name = "beagleboard::usr0", |
| @@ -345,10 +335,22 @@ static struct platform_device keys_gpio = { | |||
| 345 | }; | 335 | }; |
| 346 | 336 | ||
| 347 | static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { | 337 | static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { |
| 348 | { OMAP_TAG_UART, &omap3_beagle_uart_config }, | ||
| 349 | { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, | 338 | { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, |
| 350 | }; | 339 | }; |
| 351 | 340 | ||
| 341 | static void __init omap3_beagle_init_irq(void) | ||
| 342 | { | ||
| 343 | omap_board_config = omap3_beagle_config; | ||
| 344 | omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); | ||
| 345 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | ||
| 346 | mt46h32m32lf6_sdrc_params); | ||
| 347 | omap_init_irq(); | ||
| 348 | #ifdef CONFIG_OMAP_32K_TIMER | ||
| 349 | omap2_gp_clockevent_set_gptimer(12); | ||
| 350 | #endif | ||
| 351 | omap_gpio_init(); | ||
| 352 | } | ||
| 353 | |||
| 352 | static struct platform_device *omap3_beagle_devices[] __initdata = { | 354 | static struct platform_device *omap3_beagle_devices[] __initdata = { |
| 353 | &omap3_beagle_lcd_device, | 355 | &omap3_beagle_lcd_device, |
| 354 | &leds_gpio, | 356 | &leds_gpio, |
| @@ -398,8 +400,6 @@ static void __init omap3_beagle_init(void) | |||
| 398 | omap3_beagle_i2c_init(); | 400 | omap3_beagle_i2c_init(); |
| 399 | platform_add_devices(omap3_beagle_devices, | 401 | platform_add_devices(omap3_beagle_devices, |
| 400 | ARRAY_SIZE(omap3_beagle_devices)); | 402 | ARRAY_SIZE(omap3_beagle_devices)); |
| 401 | omap_board_config = omap3_beagle_config; | ||
| 402 | omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); | ||
| 403 | omap_serial_init(); | 403 | omap_serial_init(); |
| 404 | 404 | ||
| 405 | omap_cfg_reg(J25_34XX_GPIO170); | 405 | omap_cfg_reg(J25_34XX_GPIO170); |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index c4b144647dc5..d50b9be90580 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
| @@ -92,10 +92,6 @@ static inline void __init omap3evm_init_smc911x(void) | |||
| 92 | gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); | 92 | gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ); |
| 93 | } | 93 | } |
| 94 | 94 | ||
| 95 | static struct omap_uart_config omap3_evm_uart_config __initdata = { | ||
| 96 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 97 | }; | ||
| 98 | |||
| 99 | static struct twl4030_hsmmc_info mmc[] = { | 95 | static struct twl4030_hsmmc_info mmc[] = { |
| 100 | { | 96 | { |
| 101 | .mmc = 1, | 97 | .mmc = 1, |
| @@ -278,19 +274,20 @@ struct spi_board_info omap3evm_spi_board_info[] = { | |||
| 278 | }, | 274 | }, |
| 279 | }; | 275 | }; |
| 280 | 276 | ||
| 277 | static struct omap_board_config_kernel omap3_evm_config[] __initdata = { | ||
| 278 | { OMAP_TAG_LCD, &omap3_evm_lcd_config }, | ||
| 279 | }; | ||
| 280 | |||
| 281 | static void __init omap3_evm_init_irq(void) | 281 | static void __init omap3_evm_init_irq(void) |
| 282 | { | 282 | { |
| 283 | omap_board_config = omap3_evm_config; | ||
| 284 | omap_board_config_size = ARRAY_SIZE(omap3_evm_config); | ||
| 283 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL); | 285 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL); |
| 284 | omap_init_irq(); | 286 | omap_init_irq(); |
| 285 | omap_gpio_init(); | 287 | omap_gpio_init(); |
| 286 | omap3evm_init_smc911x(); | 288 | omap3evm_init_smc911x(); |
| 287 | } | 289 | } |
| 288 | 290 | ||
| 289 | static struct omap_board_config_kernel omap3_evm_config[] __initdata = { | ||
| 290 | { OMAP_TAG_UART, &omap3_evm_uart_config }, | ||
| 291 | { OMAP_TAG_LCD, &omap3_evm_lcd_config }, | ||
| 292 | }; | ||
| 293 | |||
| 294 | static struct platform_device *omap3_evm_devices[] __initdata = { | 291 | static struct platform_device *omap3_evm_devices[] __initdata = { |
| 295 | &omap3_evm_lcd_device, | 292 | &omap3_evm_lcd_device, |
| 296 | &omap3evm_smc911x_device, | 293 | &omap3evm_smc911x_device, |
| @@ -301,8 +298,6 @@ static void __init omap3_evm_init(void) | |||
| 301 | omap3_evm_i2c_init(); | 298 | omap3_evm_i2c_init(); |
| 302 | 299 | ||
| 303 | platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); | 300 | platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices)); |
| 304 | omap_board_config = omap3_evm_config; | ||
| 305 | omap_board_config_size = ARRAY_SIZE(omap3_evm_config); | ||
| 306 | 301 | ||
| 307 | spi_register_board_info(omap3evm_spi_board_info, | 302 | spi_register_board_info(omap3evm_spi_board_info, |
| 308 | ARRAY_SIZE(omap3evm_spi_board_info)); | 303 | ARRAY_SIZE(omap3evm_spi_board_info)); |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 864ee3d021f7..b43f6e36b6d9 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
| @@ -213,10 +213,6 @@ static struct twl4030_hsmmc_info omap3pandora_mmc[] = { | |||
| 213 | {} /* Terminator */ | 213 | {} /* Terminator */ |
| 214 | }; | 214 | }; |
| 215 | 215 | ||
| 216 | static struct omap_uart_config omap3pandora_uart_config __initdata = { | ||
| 217 | .enabled_uarts = (1 << 2), /* UART3 */ | ||
| 218 | }; | ||
| 219 | |||
| 220 | static struct regulator_consumer_supply pandora_vmmc1_supply = { | 216 | static struct regulator_consumer_supply pandora_vmmc1_supply = { |
| 221 | .supply = "vmmc", | 217 | .supply = "vmmc", |
| 222 | }; | 218 | }; |
| @@ -309,14 +305,6 @@ static int __init omap3pandora_i2c_init(void) | |||
| 309 | return 0; | 305 | return 0; |
| 310 | } | 306 | } |
| 311 | 307 | ||
| 312 | static void __init omap3pandora_init_irq(void) | ||
| 313 | { | ||
| 314 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | ||
| 315 | mt46h32m32lf6_sdrc_params); | ||
| 316 | omap_init_irq(); | ||
| 317 | omap_gpio_init(); | ||
| 318 | } | ||
| 319 | |||
| 320 | static void __init omap3pandora_ads7846_init(void) | 308 | static void __init omap3pandora_ads7846_init(void) |
| 321 | { | 309 | { |
| 322 | int gpio = OMAP3_PANDORA_TS_GPIO; | 310 | int gpio = OMAP3_PANDORA_TS_GPIO; |
| @@ -376,10 +364,19 @@ static struct omap_lcd_config omap3pandora_lcd_config __initdata = { | |||
| 376 | }; | 364 | }; |
| 377 | 365 | ||
| 378 | static struct omap_board_config_kernel omap3pandora_config[] __initdata = { | 366 | static struct omap_board_config_kernel omap3pandora_config[] __initdata = { |
| 379 | { OMAP_TAG_UART, &omap3pandora_uart_config }, | ||
| 380 | { OMAP_TAG_LCD, &omap3pandora_lcd_config }, | 367 | { OMAP_TAG_LCD, &omap3pandora_lcd_config }, |
| 381 | }; | 368 | }; |
| 382 | 369 | ||
| 370 | static void __init omap3pandora_init_irq(void) | ||
| 371 | { | ||
| 372 | omap_board_config = omap3pandora_config; | ||
| 373 | omap_board_config_size = ARRAY_SIZE(omap3pandora_config); | ||
| 374 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | ||
| 375 | mt46h32m32lf6_sdrc_params); | ||
| 376 | omap_init_irq(); | ||
| 377 | omap_gpio_init(); | ||
| 378 | } | ||
| 379 | |||
| 383 | static struct platform_device *omap3pandora_devices[] __initdata = { | 380 | static struct platform_device *omap3pandora_devices[] __initdata = { |
| 384 | &omap3pandora_lcd_device, | 381 | &omap3pandora_lcd_device, |
| 385 | &pandora_leds_gpio, | 382 | &pandora_leds_gpio, |
| @@ -391,8 +388,6 @@ static void __init omap3pandora_init(void) | |||
| 391 | omap3pandora_i2c_init(); | 388 | omap3pandora_i2c_init(); |
| 392 | platform_add_devices(omap3pandora_devices, | 389 | platform_add_devices(omap3pandora_devices, |
| 393 | ARRAY_SIZE(omap3pandora_devices)); | 390 | ARRAY_SIZE(omap3pandora_devices)); |
| 394 | omap_board_config = omap3pandora_config; | ||
| 395 | omap_board_config_size = ARRAY_SIZE(omap3pandora_config); | ||
| 396 | omap_serial_init(); | 391 | omap_serial_init(); |
| 397 | spi_register_board_info(omap3pandora_spi_board_info, | 392 | spi_register_board_info(omap3pandora_spi_board_info, |
| 398 | ARRAY_SIZE(omap3pandora_spi_board_info)); | 393 | ARRAY_SIZE(omap3pandora_spi_board_info)); |
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 6bce23004aa4..9917d2fddc2f 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
| @@ -271,9 +271,6 @@ static void __init overo_flash_init(void) | |||
| 271 | printk(KERN_ERR "Unable to register NAND device\n"); | 271 | printk(KERN_ERR "Unable to register NAND device\n"); |
| 272 | } | 272 | } |
| 273 | } | 273 | } |
| 274 | static struct omap_uart_config overo_uart_config __initdata = { | ||
| 275 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 276 | }; | ||
| 277 | 274 | ||
| 278 | static struct twl4030_hsmmc_info mmc[] = { | 275 | static struct twl4030_hsmmc_info mmc[] = { |
| 279 | { | 276 | { |
| @@ -360,14 +357,6 @@ static int __init overo_i2c_init(void) | |||
| 360 | return 0; | 357 | return 0; |
| 361 | } | 358 | } |
| 362 | 359 | ||
| 363 | static void __init overo_init_irq(void) | ||
| 364 | { | ||
| 365 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | ||
| 366 | mt46h32m32lf6_sdrc_params); | ||
| 367 | omap_init_irq(); | ||
| 368 | omap_gpio_init(); | ||
| 369 | } | ||
| 370 | |||
| 371 | static struct platform_device overo_lcd_device = { | 360 | static struct platform_device overo_lcd_device = { |
| 372 | .name = "overo_lcd", | 361 | .name = "overo_lcd", |
| 373 | .id = -1, | 362 | .id = -1, |
| @@ -378,10 +367,19 @@ static struct omap_lcd_config overo_lcd_config __initdata = { | |||
| 378 | }; | 367 | }; |
| 379 | 368 | ||
| 380 | static struct omap_board_config_kernel overo_config[] __initdata = { | 369 | static struct omap_board_config_kernel overo_config[] __initdata = { |
| 381 | { OMAP_TAG_UART, &overo_uart_config }, | ||
| 382 | { OMAP_TAG_LCD, &overo_lcd_config }, | 370 | { OMAP_TAG_LCD, &overo_lcd_config }, |
| 383 | }; | 371 | }; |
| 384 | 372 | ||
| 373 | static void __init overo_init_irq(void) | ||
| 374 | { | ||
| 375 | omap_board_config = overo_config; | ||
| 376 | omap_board_config_size = ARRAY_SIZE(overo_config); | ||
| 377 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, | ||
| 378 | mt46h32m32lf6_sdrc_params); | ||
| 379 | omap_init_irq(); | ||
| 380 | omap_gpio_init(); | ||
| 381 | } | ||
| 382 | |||
| 385 | static struct platform_device *overo_devices[] __initdata = { | 383 | static struct platform_device *overo_devices[] __initdata = { |
| 386 | &overo_lcd_device, | 384 | &overo_lcd_device, |
| 387 | }; | 385 | }; |
| @@ -390,8 +388,6 @@ static void __init overo_init(void) | |||
| 390 | { | 388 | { |
| 391 | overo_i2c_init(); | 389 | overo_i2c_init(); |
| 392 | platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); | 390 | platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); |
| 393 | omap_board_config = overo_config; | ||
| 394 | omap_board_config_size = ARRAY_SIZE(overo_config); | ||
| 395 | omap_serial_init(); | 391 | omap_serial_init(); |
| 396 | overo_flash_init(); | 392 | overo_flash_init(); |
| 397 | usb_musb_init(); | 393 | usb_musb_init(); |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 56d931a425f7..e70baa799018 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * linux/arch/arm/mach-omap2/board-rx51-flash.c | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2008-2009 Nokia | 4 | * Copyright (C) 2008-2009 Nokia |
| 5 | * | 5 | * |
| @@ -282,7 +282,124 @@ static struct twl4030_usb_data rx51_usb_data = { | |||
| 282 | .usb_mode = T2_USB_MODE_ULPI, | 282 | .usb_mode = T2_USB_MODE_ULPI, |
| 283 | }; | 283 | }; |
| 284 | 284 | ||
| 285 | static struct twl4030_platform_data rx51_twldata = { | 285 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
| 286 | /* | ||
| 287 | * Turn off VDD1 and VDD2. | ||
| 288 | */ | ||
| 289 | {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4}, | ||
| 290 | {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2}, | ||
| 291 | /* | ||
| 292 | * And also turn off the OMAP3 PLLs and the sysclk output. | ||
| 293 | */ | ||
| 294 | {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3}, | ||
| 295 | {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_OFF), 3}, | ||
| 296 | }; | ||
| 297 | |||
| 298 | static struct twl4030_script sleep_on_script __initdata = { | ||
| 299 | .script = sleep_on_seq, | ||
| 300 | .size = ARRAY_SIZE(sleep_on_seq), | ||
| 301 | .flags = TWL4030_SLEEP_SCRIPT, | ||
| 302 | }; | ||
| 303 | |||
| 304 | static struct twl4030_ins wakeup_seq[] __initdata = { | ||
| 305 | /* | ||
| 306 | * Reenable the OMAP3 PLLs. | ||
| 307 | * Wakeup VDD1 and VDD2. | ||
| 308 | * Reenable sysclk output. | ||
| 309 | */ | ||
| 310 | {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30}, | ||
| 311 | {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30}, | ||
| 312 | {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37}, | ||
| 313 | {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3}, | ||
| 314 | }; | ||
| 315 | |||
| 316 | static struct twl4030_script wakeup_script __initdata = { | ||
| 317 | .script = wakeup_seq, | ||
| 318 | .size = ARRAY_SIZE(wakeup_seq), | ||
| 319 | .flags = TWL4030_WAKEUP12_SCRIPT, | ||
| 320 | }; | ||
| 321 | |||
| 322 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | ||
| 323 | /* | ||
| 324 | * Wakeup VDD1 (dummy to be able to insert a delay) | ||
| 325 | * Enable CLKEN | ||
| 326 | */ | ||
| 327 | {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_ACTIVE), 3}, | ||
| 328 | }; | ||
| 329 | |||
| 330 | static struct twl4030_script wakeup_p3_script __initdata = { | ||
| 331 | .script = wakeup_p3_seq, | ||
| 332 | .size = ARRAY_SIZE(wakeup_p3_seq), | ||
| 333 | .flags = TWL4030_WAKEUP3_SCRIPT, | ||
| 334 | }; | ||
| 335 | |||
| 336 | static struct twl4030_ins wrst_seq[] __initdata = { | ||
| 337 | /* | ||
| 338 | * Reset twl4030. | ||
| 339 | * Reset VDD1 regulator. | ||
| 340 | * Reset VDD2 regulator. | ||
| 341 | * Reset VPLL1 regulator. | ||
| 342 | * Enable sysclk output. | ||
| 343 | * Reenable twl4030. | ||
| 344 | */ | ||
| 345 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | ||
| 346 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | ||
| 347 | 0x13}, | ||
| 348 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 2, RES_STATE_WRST), 0x13}, | ||
| 349 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, | ||
| 350 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | ||
| 351 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | ||
| 352 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | ||
| 353 | {MSG_SINGULAR(DEV_GRP_P1, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, | ||
| 354 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, | ||
| 355 | }; | ||
| 356 | |||
| 357 | static struct twl4030_script wrst_script __initdata = { | ||
| 358 | .script = wrst_seq, | ||
| 359 | .size = ARRAY_SIZE(wrst_seq), | ||
| 360 | .flags = TWL4030_WRST_SCRIPT, | ||
| 361 | }; | ||
| 362 | |||
| 363 | static struct twl4030_script *twl4030_scripts[] __initdata = { | ||
| 364 | /* wakeup12 script should be loaded before sleep script, otherwise a | ||
| 365 | board might hit retention before loading of wakeup script is | ||
| 366 | completed. This can cause boot failures depending on timing issues. | ||
| 367 | */ | ||
| 368 | &wakeup_script, | ||
| 369 | &sleep_on_script, | ||
| 370 | &wakeup_p3_script, | ||
| 371 | &wrst_script, | ||
| 372 | }; | ||
| 373 | |||
| 374 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | ||
| 375 | { .resource = RES_VINTANA1, .devgroup = -1, .type = -1, .type2 = 1 }, | ||
| 376 | { .resource = RES_VINTANA2, .devgroup = -1, .type = -1, .type2 = 1 }, | ||
| 377 | { .resource = RES_VINTDIG, .devgroup = -1, .type = -1, .type2 = 1 }, | ||
| 378 | { .resource = RES_VMMC1, .devgroup = -1, .type = -1, .type2 = 3}, | ||
| 379 | { .resource = RES_VMMC2, .devgroup = DEV_GRP_NULL, .type = -1, | ||
| 380 | .type2 = 3}, | ||
| 381 | { .resource = RES_VAUX1, .devgroup = -1, .type = -1, .type2 = 3}, | ||
| 382 | { .resource = RES_VAUX2, .devgroup = -1, .type = -1, .type2 = 3}, | ||
| 383 | { .resource = RES_VAUX3, .devgroup = -1, .type = -1, .type2 = 3}, | ||
| 384 | { .resource = RES_VAUX4, .devgroup = -1, .type = -1, .type2 = 3}, | ||
| 385 | { .resource = RES_VPLL2, .devgroup = -1, .type = -1, .type2 = 3}, | ||
| 386 | { .resource = RES_VDAC, .devgroup = -1, .type = -1, .type2 = 3}, | ||
| 387 | { .resource = RES_VSIM, .devgroup = DEV_GRP_NULL, .type = -1, | ||
| 388 | .type2 = 3}, | ||
| 389 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P3, .type = -1, | ||
| 390 | .type2 = 1 }, | ||
| 391 | { 0, 0}, | ||
| 392 | }; | ||
| 393 | |||
| 394 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | ||
| 395 | .scripts = twl4030_scripts, | ||
| 396 | .num = ARRAY_SIZE(twl4030_scripts), | ||
| 397 | .resource_config = twl4030_rconfig, | ||
| 398 | }; | ||
| 399 | |||
| 400 | |||
| 401 | |||
| 402 | static struct twl4030_platform_data rx51_twldata __initdata = { | ||
| 286 | .irq_base = TWL4030_IRQ_BASE, | 403 | .irq_base = TWL4030_IRQ_BASE, |
| 287 | .irq_end = TWL4030_IRQ_END, | 404 | .irq_end = TWL4030_IRQ_END, |
| 288 | 405 | ||
| @@ -291,6 +408,7 @@ static struct twl4030_platform_data rx51_twldata = { | |||
| 291 | .keypad = &rx51_kp_data, | 408 | .keypad = &rx51_kp_data, |
| 292 | .madc = &rx51_madc_data, | 409 | .madc = &rx51_madc_data, |
| 293 | .usb = &rx51_usb_data, | 410 | .usb = &rx51_usb_data, |
| 411 | .power = &rx51_t2scripts_data, | ||
| 294 | 412 | ||
| 295 | .vaux1 = &rx51_vaux1, | 413 | .vaux1 = &rx51_vaux1, |
| 296 | .vaux2 = &rx51_vaux2, | 414 | .vaux2 = &rx51_vaux2, |
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 1c9e07fe8266..f9196c3b1a7b 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
| @@ -31,10 +31,6 @@ | |||
| 31 | #include <mach/gpmc.h> | 31 | #include <mach/gpmc.h> |
| 32 | #include <mach/usb.h> | 32 | #include <mach/usb.h> |
| 33 | 33 | ||
| 34 | static struct omap_uart_config rx51_uart_config = { | ||
| 35 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
| 36 | }; | ||
| 37 | |||
| 38 | static struct omap_lcd_config rx51_lcd_config = { | 34 | static struct omap_lcd_config rx51_lcd_config = { |
| 39 | .ctrl_name = "internal", | 35 | .ctrl_name = "internal", |
| 40 | }; | 36 | }; |
| @@ -52,7 +48,6 @@ static struct omap_fbmem_config rx51_fbmem2_config = { | |||
| 52 | }; | 48 | }; |
| 53 | 49 | ||
| 54 | static struct omap_board_config_kernel rx51_config[] = { | 50 | static struct omap_board_config_kernel rx51_config[] = { |
| 55 | { OMAP_TAG_UART, &rx51_uart_config }, | ||
| 56 | { OMAP_TAG_FBMEM, &rx51_fbmem0_config }, | 51 | { OMAP_TAG_FBMEM, &rx51_fbmem0_config }, |
| 57 | { OMAP_TAG_FBMEM, &rx51_fbmem1_config }, | 52 | { OMAP_TAG_FBMEM, &rx51_fbmem1_config }, |
| 58 | { OMAP_TAG_FBMEM, &rx51_fbmem2_config }, | 53 | { OMAP_TAG_FBMEM, &rx51_fbmem2_config }, |
| @@ -61,6 +56,8 @@ static struct omap_board_config_kernel rx51_config[] = { | |||
| 61 | 56 | ||
| 62 | static void __init rx51_init_irq(void) | 57 | static void __init rx51_init_irq(void) |
| 63 | { | 58 | { |
| 59 | omap_board_config = rx51_config; | ||
| 60 | omap_board_config_size = ARRAY_SIZE(rx51_config); | ||
| 64 | omap2_init_common_hw(NULL, NULL); | 61 | omap2_init_common_hw(NULL, NULL); |
| 65 | omap_init_irq(); | 62 | omap_init_irq(); |
| 66 | omap_gpio_init(); | 63 | omap_gpio_init(); |
| @@ -70,8 +67,6 @@ extern void __init rx51_peripherals_init(void); | |||
| 70 | 67 | ||
| 71 | static void __init rx51_init(void) | 68 | static void __init rx51_init(void) |
| 72 | { | 69 | { |
| 73 | omap_board_config = rx51_config; | ||
| 74 | omap_board_config_size = ARRAY_SIZE(rx51_config); | ||
| 75 | omap_serial_init(); | 70 | omap_serial_init(); |
| 76 | usb_musb_init(); | 71 | usb_musb_init(); |
| 77 | rx51_peripherals_init(); | 72 | rx51_peripherals_init(); |
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c index bac5c4321ff7..1f13e2a1f322 100644 --- a/arch/arm/mach-omap2/board-zoom-debugboard.c +++ b/arch/arm/mach-omap2/board-zoom-debugboard.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
| 13 | #include <linux/serial_8250.h> | 13 | #include <linux/serial_8250.h> |
| 14 | #include <linux/smsc911x.h> | 14 | #include <linux/smsc911x.h> |
| 15 | #include <linux/interrupt.h> | ||
| 15 | 16 | ||
| 16 | #include <mach/gpmc.h> | 17 | #include <mach/gpmc.h> |
| 17 | 18 | ||
| @@ -84,6 +85,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 84 | .mapbase = 0x10000000, | 85 | .mapbase = 0x10000000, |
| 85 | .irq = OMAP_GPIO_IRQ(102), | 86 | .irq = OMAP_GPIO_IRQ(102), |
| 86 | .flags = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ, | 87 | .flags = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ, |
| 88 | .irqflags = IRQF_SHARED | IRQF_TRIGGER_RISING, | ||
| 87 | .iotype = UPIO_MEM, | 89 | .iotype = UPIO_MEM, |
| 88 | .regshift = 1, | 90 | .regshift = 1, |
| 89 | .uartclk = QUART_CLK, | 91 | .uartclk = QUART_CLK, |
| @@ -94,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
| 94 | 96 | ||
| 95 | static struct platform_device zoom2_debugboard_serial_device = { | 97 | static struct platform_device zoom2_debugboard_serial_device = { |
| 96 | .name = "serial8250", | 98 | .name = "serial8250", |
| 97 | .id = PLAT8250_DEV_PLATFORM1, | 99 | .id = 3, |
| 98 | .dev = { | 100 | .dev = { |
| 99 | .platform_data = serial_platform_data, | 101 | .platform_data = serial_platform_data, |
| 100 | }, | 102 | }, |
| @@ -127,6 +129,7 @@ static inline void __init zoom2_init_quaduart(void) | |||
| 127 | static inline int omap_zoom2_debugboard_detect(void) | 129 | static inline int omap_zoom2_debugboard_detect(void) |
| 128 | { | 130 | { |
| 129 | int debug_board_detect = 0; | 131 | int debug_board_detect = 0; |
| 132 | int ret = 1; | ||
| 130 | 133 | ||
| 131 | debug_board_detect = ZOOM2_SMSC911X_GPIO; | 134 | debug_board_detect = ZOOM2_SMSC911X_GPIO; |
| 132 | 135 | ||
| @@ -138,10 +141,10 @@ static inline int omap_zoom2_debugboard_detect(void) | |||
| 138 | gpio_direction_input(debug_board_detect); | 141 | gpio_direction_input(debug_board_detect); |
| 139 | 142 | ||
| 140 | if (!gpio_get_value(debug_board_detect)) { | 143 | if (!gpio_get_value(debug_board_detect)) { |
| 141 | gpio_free(debug_board_detect); | 144 | ret = 0; |
| 142 | return 0; | ||
| 143 | } | 145 | } |
| 144 | return 1; | 146 | gpio_free(debug_board_detect); |
| 147 | return ret; | ||
| 145 | } | 148 | } |
| 146 | 149 | ||
| 147 | static struct platform_device *zoom2_devices[] __initdata = { | 150 | static struct platform_device *zoom2_devices[] __initdata = { |
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index 427b7b8b1237..324009edbd53 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c | |||
| @@ -12,36 +12,217 @@ | |||
| 12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/input.h> | ||
| 15 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
| 16 | #include <linux/i2c/twl4030.h> | 17 | #include <linux/i2c/twl4030.h> |
| 18 | #include <linux/regulator/machine.h> | ||
| 17 | 19 | ||
| 18 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
| 19 | #include <asm/mach/arch.h> | 21 | #include <asm/mach/arch.h> |
| 20 | 22 | ||
| 21 | #include <mach/common.h> | 23 | #include <mach/common.h> |
| 22 | #include <mach/usb.h> | 24 | #include <mach/usb.h> |
| 25 | #include <mach/keypad.h> | ||
| 23 | 26 | ||
| 24 | #include "mmc-twl4030.h" | 27 | #include "mmc-twl4030.h" |
| 25 | 28 | ||
| 26 | static void __init omap_zoom2_init_irq(void) | 29 | /* Zoom2 has Qwerty keyboard*/ |
| 30 | static int zoom2_twl4030_keymap[] = { | ||
| 31 | KEY(0, 0, KEY_E), | ||
| 32 | KEY(1, 0, KEY_R), | ||
| 33 | KEY(2, 0, KEY_T), | ||
| 34 | KEY(3, 0, KEY_HOME), | ||
| 35 | KEY(6, 0, KEY_I), | ||
| 36 | KEY(7, 0, KEY_LEFTSHIFT), | ||
| 37 | KEY(0, 1, KEY_D), | ||
| 38 | KEY(1, 1, KEY_F), | ||
| 39 | KEY(2, 1, KEY_G), | ||
| 40 | KEY(3, 1, KEY_SEND), | ||
| 41 | KEY(6, 1, KEY_K), | ||
| 42 | KEY(7, 1, KEY_ENTER), | ||
| 43 | KEY(0, 2, KEY_X), | ||
| 44 | KEY(1, 2, KEY_C), | ||
| 45 | KEY(2, 2, KEY_V), | ||
| 46 | KEY(3, 2, KEY_END), | ||
| 47 | KEY(6, 2, KEY_DOT), | ||
| 48 | KEY(7, 2, KEY_CAPSLOCK), | ||
| 49 | KEY(0, 3, KEY_Z), | ||
| 50 | KEY(1, 3, KEY_KPPLUS), | ||
| 51 | KEY(2, 3, KEY_B), | ||
| 52 | KEY(3, 3, KEY_F1), | ||
| 53 | KEY(6, 3, KEY_O), | ||
| 54 | KEY(7, 3, KEY_SPACE), | ||
| 55 | KEY(0, 4, KEY_W), | ||
| 56 | KEY(1, 4, KEY_Y), | ||
| 57 | KEY(2, 4, KEY_U), | ||
| 58 | KEY(3, 4, KEY_F2), | ||
| 59 | KEY(4, 4, KEY_VOLUMEUP), | ||
| 60 | KEY(6, 4, KEY_L), | ||
| 61 | KEY(7, 4, KEY_LEFT), | ||
| 62 | KEY(0, 5, KEY_S), | ||
| 63 | KEY(1, 5, KEY_H), | ||
| 64 | KEY(2, 5, KEY_J), | ||
| 65 | KEY(3, 5, KEY_F3), | ||
| 66 | KEY(5, 5, KEY_VOLUMEDOWN), | ||
| 67 | KEY(6, 5, KEY_M), | ||
| 68 | KEY(4, 5, KEY_ENTER), | ||
| 69 | KEY(7, 5, KEY_RIGHT), | ||
| 70 | KEY(0, 6, KEY_Q), | ||
| 71 | KEY(1, 6, KEY_A), | ||
| 72 | KEY(2, 6, KEY_N), | ||
| 73 | KEY(3, 6, KEY_BACKSPACE), | ||
| 74 | KEY(6, 6, KEY_P), | ||
| 75 | KEY(7, 6, KEY_UP), | ||
| 76 | KEY(6, 7, KEY_SELECT), | ||
| 77 | KEY(7, 7, KEY_DOWN), | ||
| 78 | KEY(0, 7, KEY_PROG1), /*MACRO 1 <User defined> */ | ||
| 79 | KEY(1, 7, KEY_PROG2), /*MACRO 2 <User defined> */ | ||
| 80 | KEY(2, 7, KEY_PROG3), /*MACRO 3 <User defined> */ | ||
| 81 | KEY(3, 7, KEY_PROG4), /*MACRO 4 <User defined> */ | ||
| 82 | 0 | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct twl4030_keypad_data zoom2_kp_twl4030_data = { | ||
| 86 | .rows = 8, | ||
| 87 | .cols = 8, | ||
| 88 | .keymap = zoom2_twl4030_keymap, | ||
| 89 | .keymapsize = ARRAY_SIZE(zoom2_twl4030_keymap), | ||
| 90 | .rep = 1, | ||
| 91 | }; | ||
| 92 | |||
| 93 | static struct omap_board_config_kernel zoom2_config[] __initdata = { | ||
| 94 | }; | ||
| 95 | |||
| 96 | static struct regulator_consumer_supply zoom2_vmmc1_supply = { | ||
| 97 | .supply = "vmmc", | ||
| 98 | }; | ||
| 99 | |||
| 100 | static struct regulator_consumer_supply zoom2_vsim_supply = { | ||
| 101 | .supply = "vmmc_aux", | ||
| 102 | }; | ||
| 103 | |||
| 104 | static struct regulator_consumer_supply zoom2_vmmc2_supply = { | ||
| 105 | .supply = "vmmc", | ||
| 106 | }; | ||
| 107 | |||
| 108 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | ||
| 109 | static struct regulator_init_data zoom2_vmmc1 = { | ||
| 110 | .constraints = { | ||
| 111 | .min_uV = 1850000, | ||
| 112 | .max_uV = 3150000, | ||
| 113 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 114 | | REGULATOR_MODE_STANDBY, | ||
| 115 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 116 | | REGULATOR_CHANGE_MODE | ||
| 117 | | REGULATOR_CHANGE_STATUS, | ||
| 118 | }, | ||
| 119 | .num_consumer_supplies = 1, | ||
| 120 | .consumer_supplies = &zoom2_vmmc1_supply, | ||
| 121 | }; | ||
| 122 | |||
| 123 | /* VMMC2 for MMC2 card */ | ||
| 124 | static struct regulator_init_data zoom2_vmmc2 = { | ||
| 125 | .constraints = { | ||
| 126 | .min_uV = 1850000, | ||
| 127 | .max_uV = 1850000, | ||
| 128 | .apply_uV = true, | ||
| 129 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 130 | | REGULATOR_MODE_STANDBY, | ||
| 131 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 132 | | REGULATOR_CHANGE_STATUS, | ||
| 133 | }, | ||
| 134 | .num_consumer_supplies = 1, | ||
| 135 | .consumer_supplies = &zoom2_vmmc2_supply, | ||
| 136 | }; | ||
| 137 | |||
| 138 | /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ | ||
| 139 | static struct regulator_init_data zoom2_vsim = { | ||
| 140 | .constraints = { | ||
| 141 | .min_uV = 1800000, | ||
| 142 | .max_uV = 3000000, | ||
| 143 | .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 144 | | REGULATOR_MODE_STANDBY, | ||
| 145 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 146 | | REGULATOR_CHANGE_MODE | ||
| 147 | | REGULATOR_CHANGE_STATUS, | ||
| 148 | }, | ||
| 149 | .num_consumer_supplies = 1, | ||
| 150 | .consumer_supplies = &zoom2_vsim_supply, | ||
| 151 | }; | ||
| 152 | |||
| 153 | static struct twl4030_hsmmc_info mmc[] __initdata = { | ||
| 154 | { | ||
| 155 | .mmc = 1, | ||
| 156 | .wires = 4, | ||
| 157 | .gpio_wp = -EINVAL, | ||
| 158 | }, | ||
| 159 | { | ||
| 160 | .mmc = 2, | ||
| 161 | .wires = 4, | ||
| 162 | .gpio_wp = -EINVAL, | ||
| 163 | }, | ||
| 164 | {} /* Terminator */ | ||
| 165 | }; | ||
| 166 | |||
| 167 | static int zoom2_twl_gpio_setup(struct device *dev, | ||
| 168 | unsigned gpio, unsigned ngpio) | ||
| 27 | { | 169 | { |
| 28 | omap2_init_common_hw(NULL, NULL); | 170 | /* gpio + 0 is "mmc0_cd" (input/IRQ), |
| 29 | omap_init_irq(); | 171 | * gpio + 1 is "mmc1_cd" (input/IRQ) |
| 30 | omap_gpio_init(); | 172 | */ |
| 173 | mmc[0].gpio_cd = gpio + 0; | ||
| 174 | mmc[1].gpio_cd = gpio + 1; | ||
| 175 | twl4030_mmc_init(mmc); | ||
| 176 | |||
| 177 | /* link regulators to MMC adapters ... we "know" the | ||
| 178 | * regulators will be set up only *after* we return. | ||
| 179 | */ | ||
| 180 | zoom2_vmmc1_supply.dev = mmc[0].dev; | ||
| 181 | zoom2_vsim_supply.dev = mmc[0].dev; | ||
| 182 | zoom2_vmmc2_supply.dev = mmc[1].dev; | ||
| 183 | |||
| 184 | return 0; | ||
| 31 | } | 185 | } |
| 32 | 186 | ||
| 33 | static struct omap_uart_config zoom2_uart_config __initdata = { | 187 | |
| 34 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | 188 | static int zoom2_batt_table[] = { |
| 189 | /* 0 C*/ | ||
| 190 | 30800, 29500, 28300, 27100, | ||
| 191 | 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, | ||
| 192 | 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, | ||
| 193 | 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, | ||
| 194 | 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, | ||
| 195 | 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, | ||
| 196 | 4040, 3910, 3790, 3670, 3550 | ||
| 35 | }; | 197 | }; |
| 36 | 198 | ||
| 37 | static struct omap_board_config_kernel zoom2_config[] __initdata = { | 199 | static struct twl4030_bci_platform_data zoom2_bci_data = { |
| 38 | { OMAP_TAG_UART, &zoom2_uart_config }, | 200 | .battery_tmp_tbl = zoom2_batt_table, |
| 201 | .tblsize = ARRAY_SIZE(zoom2_batt_table), | ||
| 39 | }; | 202 | }; |
| 40 | 203 | ||
| 204 | static struct twl4030_usb_data zoom2_usb_data = { | ||
| 205 | .usb_mode = T2_USB_MODE_ULPI, | ||
| 206 | }; | ||
| 207 | |||
| 208 | static void __init omap_zoom2_init_irq(void) | ||
| 209 | { | ||
| 210 | omap_board_config = zoom2_config; | ||
| 211 | omap_board_config_size = ARRAY_SIZE(zoom2_config); | ||
| 212 | omap2_init_common_hw(NULL, NULL); | ||
| 213 | omap_init_irq(); | ||
| 214 | omap_gpio_init(); | ||
| 215 | } | ||
| 216 | |||
| 41 | static struct twl4030_gpio_platform_data zoom2_gpio_data = { | 217 | static struct twl4030_gpio_platform_data zoom2_gpio_data = { |
| 42 | .gpio_base = OMAP_MAX_GPIO_LINES, | 218 | .gpio_base = OMAP_MAX_GPIO_LINES, |
| 43 | .irq_base = TWL4030_GPIO_IRQ_BASE, | 219 | .irq_base = TWL4030_GPIO_IRQ_BASE, |
| 44 | .irq_end = TWL4030_GPIO_IRQ_END, | 220 | .irq_end = TWL4030_GPIO_IRQ_END, |
| 221 | .setup = zoom2_twl_gpio_setup, | ||
| 222 | }; | ||
| 223 | |||
| 224 | static struct twl4030_madc_platform_data zoom2_madc_data = { | ||
| 225 | .irq_line = 1, | ||
| 45 | }; | 226 | }; |
| 46 | 227 | ||
| 47 | static struct twl4030_platform_data zoom2_twldata = { | 228 | static struct twl4030_platform_data zoom2_twldata = { |
| @@ -49,7 +230,15 @@ static struct twl4030_platform_data zoom2_twldata = { | |||
| 49 | .irq_end = TWL4030_IRQ_END, | 230 | .irq_end = TWL4030_IRQ_END, |
| 50 | 231 | ||
| 51 | /* platform_data for children goes here */ | 232 | /* platform_data for children goes here */ |
| 233 | .bci = &zoom2_bci_data, | ||
| 234 | .madc = &zoom2_madc_data, | ||
| 235 | .usb = &zoom2_usb_data, | ||
| 52 | .gpio = &zoom2_gpio_data, | 236 | .gpio = &zoom2_gpio_data, |
| 237 | .keypad = &zoom2_kp_twl4030_data, | ||
| 238 | .vmmc1 = &zoom2_vmmc1, | ||
| 239 | .vmmc2 = &zoom2_vmmc2, | ||
| 240 | .vsim = &zoom2_vsim, | ||
| 241 | |||
| 53 | }; | 242 | }; |
| 54 | 243 | ||
| 55 | static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = { | 244 | static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = { |
| @@ -70,26 +259,13 @@ static int __init omap_i2c_init(void) | |||
| 70 | return 0; | 259 | return 0; |
| 71 | } | 260 | } |
| 72 | 261 | ||
| 73 | static struct twl4030_hsmmc_info mmc[] __initdata = { | ||
| 74 | { | ||
| 75 | .mmc = 1, | ||
| 76 | .wires = 4, | ||
| 77 | .gpio_cd = -EINVAL, | ||
| 78 | .gpio_wp = -EINVAL, | ||
| 79 | }, | ||
| 80 | {} /* Terminator */ | ||
| 81 | }; | ||
| 82 | |||
| 83 | extern int __init omap_zoom2_debugboard_init(void); | 262 | extern int __init omap_zoom2_debugboard_init(void); |
| 84 | 263 | ||
| 85 | static void __init omap_zoom2_init(void) | 264 | static void __init omap_zoom2_init(void) |
| 86 | { | 265 | { |
| 87 | omap_i2c_init(); | 266 | omap_i2c_init(); |
| 88 | omap_board_config = zoom2_config; | ||
| 89 | omap_board_config_size = ARRAY_SIZE(zoom2_config); | ||
| 90 | omap_serial_init(); | 267 | omap_serial_init(); |
| 91 | omap_zoom2_debugboard_init(); | 268 | omap_zoom2_debugboard_init(); |
| 92 | twl4030_mmc_init(mmc); | ||
| 93 | usb_musb_init(); | 269 | usb_musb_init(); |
| 94 | } | 270 | } |
| 95 | 271 | ||
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 456e2ad5f621..f2a92d614f0f 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
| @@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk) | |||
| 1043 | omap2_clk_disable(clk); | 1043 | omap2_clk_disable(clk); |
| 1044 | } else | 1044 | } else |
| 1045 | _omap2_clk_disable(clk); | 1045 | _omap2_clk_disable(clk); |
| 1046 | if (clk->clkdm != NULL) | ||
| 1047 | pwrdm_clkdm_state_switch(clk->clkdm); | ||
| 1046 | } | 1048 | } |
| 1047 | #endif | 1049 | #endif |
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index cd7819cc0c9e..fafcd32e6907 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c | |||
| @@ -27,6 +27,7 @@ | |||
| 27 | #include <linux/limits.h> | 27 | #include <linux/limits.h> |
| 28 | #include <linux/bitops.h> | 28 | #include <linux/bitops.h> |
| 29 | 29 | ||
| 30 | #include <mach/cpu.h> | ||
| 30 | #include <mach/clock.h> | 31 | #include <mach/clock.h> |
| 31 | #include <mach/sram.h> | 32 | #include <mach/sram.h> |
| 32 | #include <asm/div64.h> | 33 | #include <asm/div64.h> |
| @@ -1067,17 +1068,17 @@ static int __init omap2_clk_arch_init(void) | |||
| 1067 | return -EINVAL; | 1068 | return -EINVAL; |
| 1068 | 1069 | ||
| 1069 | /* REVISIT: not yet ready for 343x */ | 1070 | /* REVISIT: not yet ready for 343x */ |
| 1070 | #if 0 | 1071 | if (clk_set_rate(&dpll1_ck, mpurate)) |
| 1071 | if (clk_set_rate(&virt_prcm_set, mpurate)) | 1072 | printk(KERN_ERR "*** Unable to set MPU rate\n"); |
| 1072 | printk(KERN_ERR "Could not find matching MPU rate\n"); | ||
| 1073 | #endif | ||
| 1074 | 1073 | ||
| 1075 | recalculate_root_clocks(); | 1074 | recalculate_root_clocks(); |
| 1076 | 1075 | ||
| 1077 | printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): " | 1076 | printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): " |
| 1078 | "%ld.%01ld/%ld/%ld MHz\n", | 1077 | "%ld.%01ld/%ld/%ld MHz\n", |
| 1079 | (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10, | 1078 | (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10), |
| 1080 | (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ; | 1079 | (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ; |
| 1080 | |||
| 1081 | calibrate_delay(); | ||
| 1081 | 1082 | ||
| 1082 | return 0; | 1083 | return 0; |
| 1083 | } | 1084 | } |
| @@ -1136,7 +1137,7 @@ int __init omap2_clk_init(void) | |||
| 1136 | 1137 | ||
| 1137 | recalculate_root_clocks(); | 1138 | recalculate_root_clocks(); |
| 1138 | 1139 | ||
| 1139 | printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): " | 1140 | printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): " |
| 1140 | "%ld.%01ld/%ld/%ld MHz\n", | 1141 | "%ld.%01ld/%ld/%ld MHz\n", |
| 1141 | (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10, | 1142 | (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10, |
| 1142 | (core_ck.rate / 1000000), (arm_fck.rate / 1000000)); | 1143 | (core_ck.rate / 1000000), (arm_fck.rate / 1000000)); |
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 57cc2725b923..c8119781e00a 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
| @@ -1020,6 +1020,7 @@ static struct clk arm_fck = { | |||
| 1020 | .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), | 1020 | .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), |
| 1021 | .clksel_mask = OMAP3430_ST_MPU_CLK_MASK, | 1021 | .clksel_mask = OMAP3430_ST_MPU_CLK_MASK, |
| 1022 | .clksel = arm_fck_clksel, | 1022 | .clksel = arm_fck_clksel, |
| 1023 | .clkdm_name = "mpu_clkdm", | ||
| 1023 | .recalc = &omap2_clksel_recalc, | 1024 | .recalc = &omap2_clksel_recalc, |
| 1024 | }; | 1025 | }; |
| 1025 | 1026 | ||
| @@ -1155,7 +1156,6 @@ static struct clk gfx_cg1_ck = { | |||
| 1155 | .name = "gfx_cg1_ck", | 1156 | .name = "gfx_cg1_ck", |
| 1156 | .ops = &clkops_omap2_dflt_wait, | 1157 | .ops = &clkops_omap2_dflt_wait, |
| 1157 | .parent = &gfx_l3_fck, /* REVISIT: correct? */ | 1158 | .parent = &gfx_l3_fck, /* REVISIT: correct? */ |
| 1158 | .init = &omap2_init_clk_clkdm, | ||
| 1159 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), | 1159 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), |
| 1160 | .enable_bit = OMAP3430ES1_EN_2D_SHIFT, | 1160 | .enable_bit = OMAP3430ES1_EN_2D_SHIFT, |
| 1161 | .clkdm_name = "gfx_3430es1_clkdm", | 1161 | .clkdm_name = "gfx_3430es1_clkdm", |
| @@ -1166,7 +1166,6 @@ static struct clk gfx_cg2_ck = { | |||
| 1166 | .name = "gfx_cg2_ck", | 1166 | .name = "gfx_cg2_ck", |
| 1167 | .ops = &clkops_omap2_dflt_wait, | 1167 | .ops = &clkops_omap2_dflt_wait, |
| 1168 | .parent = &gfx_l3_fck, /* REVISIT: correct? */ | 1168 | .parent = &gfx_l3_fck, /* REVISIT: correct? */ |
| 1169 | .init = &omap2_init_clk_clkdm, | ||
| 1170 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), | 1169 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), |
| 1171 | .enable_bit = OMAP3430ES1_EN_3D_SHIFT, | 1170 | .enable_bit = OMAP3430ES1_EN_3D_SHIFT, |
| 1172 | .clkdm_name = "gfx_3430es1_clkdm", | 1171 | .clkdm_name = "gfx_3430es1_clkdm", |
| @@ -1210,7 +1209,6 @@ static struct clk sgx_ick = { | |||
| 1210 | .name = "sgx_ick", | 1209 | .name = "sgx_ick", |
| 1211 | .ops = &clkops_omap2_dflt_wait, | 1210 | .ops = &clkops_omap2_dflt_wait, |
| 1212 | .parent = &l3_ick, | 1211 | .parent = &l3_ick, |
| 1213 | .init = &omap2_init_clk_clkdm, | ||
| 1214 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), | 1212 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), |
| 1215 | .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT, | 1213 | .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT, |
| 1216 | .clkdm_name = "sgx_clkdm", | 1214 | .clkdm_name = "sgx_clkdm", |
| @@ -1223,7 +1221,6 @@ static struct clk d2d_26m_fck = { | |||
| 1223 | .name = "d2d_26m_fck", | 1221 | .name = "d2d_26m_fck", |
| 1224 | .ops = &clkops_omap2_dflt_wait, | 1222 | .ops = &clkops_omap2_dflt_wait, |
| 1225 | .parent = &sys_ck, | 1223 | .parent = &sys_ck, |
| 1226 | .init = &omap2_init_clk_clkdm, | ||
| 1227 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1224 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
| 1228 | .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, | 1225 | .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, |
| 1229 | .clkdm_name = "d2d_clkdm", | 1226 | .clkdm_name = "d2d_clkdm", |
| @@ -1234,7 +1231,6 @@ static struct clk modem_fck = { | |||
| 1234 | .name = "modem_fck", | 1231 | .name = "modem_fck", |
| 1235 | .ops = &clkops_omap2_dflt_wait, | 1232 | .ops = &clkops_omap2_dflt_wait, |
| 1236 | .parent = &sys_ck, | 1233 | .parent = &sys_ck, |
| 1237 | .init = &omap2_init_clk_clkdm, | ||
| 1238 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1234 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
| 1239 | .enable_bit = OMAP3430_EN_MODEM_SHIFT, | 1235 | .enable_bit = OMAP3430_EN_MODEM_SHIFT, |
| 1240 | .clkdm_name = "d2d_clkdm", | 1236 | .clkdm_name = "d2d_clkdm", |
| @@ -1622,7 +1618,6 @@ static struct clk core_l3_ick = { | |||
| 1622 | .name = "core_l3_ick", | 1618 | .name = "core_l3_ick", |
| 1623 | .ops = &clkops_null, | 1619 | .ops = &clkops_null, |
| 1624 | .parent = &l3_ick, | 1620 | .parent = &l3_ick, |
| 1625 | .init = &omap2_init_clk_clkdm, | ||
| 1626 | .clkdm_name = "core_l3_clkdm", | 1621 | .clkdm_name = "core_l3_clkdm", |
| 1627 | .recalc = &followparent_recalc, | 1622 | .recalc = &followparent_recalc, |
| 1628 | }; | 1623 | }; |
| @@ -1691,7 +1686,6 @@ static struct clk core_l4_ick = { | |||
| 1691 | .name = "core_l4_ick", | 1686 | .name = "core_l4_ick", |
| 1692 | .ops = &clkops_null, | 1687 | .ops = &clkops_null, |
| 1693 | .parent = &l4_ick, | 1688 | .parent = &l4_ick, |
| 1694 | .init = &omap2_init_clk_clkdm, | ||
| 1695 | .clkdm_name = "core_l4_clkdm", | 1689 | .clkdm_name = "core_l4_clkdm", |
| 1696 | .recalc = &followparent_recalc, | 1690 | .recalc = &followparent_recalc, |
| 1697 | }; | 1691 | }; |
| @@ -2089,7 +2083,6 @@ static struct clk dss_tv_fck = { | |||
| 2089 | .name = "dss_tv_fck", | 2083 | .name = "dss_tv_fck", |
| 2090 | .ops = &clkops_omap2_dflt, | 2084 | .ops = &clkops_omap2_dflt, |
| 2091 | .parent = &omap_54m_fck, | 2085 | .parent = &omap_54m_fck, |
| 2092 | .init = &omap2_init_clk_clkdm, | ||
| 2093 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), | 2086 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), |
| 2094 | .enable_bit = OMAP3430_EN_TV_SHIFT, | 2087 | .enable_bit = OMAP3430_EN_TV_SHIFT, |
| 2095 | .clkdm_name = "dss_clkdm", | 2088 | .clkdm_name = "dss_clkdm", |
| @@ -2100,7 +2093,6 @@ static struct clk dss_96m_fck = { | |||
| 2100 | .name = "dss_96m_fck", | 2093 | .name = "dss_96m_fck", |
| 2101 | .ops = &clkops_omap2_dflt, | 2094 | .ops = &clkops_omap2_dflt, |
| 2102 | .parent = &omap_96m_fck, | 2095 | .parent = &omap_96m_fck, |
| 2103 | .init = &omap2_init_clk_clkdm, | ||
| 2104 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), | 2096 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), |
| 2105 | .enable_bit = OMAP3430_EN_TV_SHIFT, | 2097 | .enable_bit = OMAP3430_EN_TV_SHIFT, |
| 2106 | .clkdm_name = "dss_clkdm", | 2098 | .clkdm_name = "dss_clkdm", |
| @@ -2111,7 +2103,6 @@ static struct clk dss2_alwon_fck = { | |||
| 2111 | .name = "dss2_alwon_fck", | 2103 | .name = "dss2_alwon_fck", |
| 2112 | .ops = &clkops_omap2_dflt, | 2104 | .ops = &clkops_omap2_dflt, |
| 2113 | .parent = &sys_ck, | 2105 | .parent = &sys_ck, |
| 2114 | .init = &omap2_init_clk_clkdm, | ||
| 2115 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), | 2106 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), |
| 2116 | .enable_bit = OMAP3430_EN_DSS2_SHIFT, | 2107 | .enable_bit = OMAP3430_EN_DSS2_SHIFT, |
| 2117 | .clkdm_name = "dss_clkdm", | 2108 | .clkdm_name = "dss_clkdm", |
| @@ -2123,7 +2114,6 @@ static struct clk dss_ick_3430es1 = { | |||
| 2123 | .name = "dss_ick", | 2114 | .name = "dss_ick", |
| 2124 | .ops = &clkops_omap2_dflt, | 2115 | .ops = &clkops_omap2_dflt, |
| 2125 | .parent = &l4_ick, | 2116 | .parent = &l4_ick, |
| 2126 | .init = &omap2_init_clk_clkdm, | ||
| 2127 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), | 2117 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), |
| 2128 | .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, | 2118 | .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, |
| 2129 | .clkdm_name = "dss_clkdm", | 2119 | .clkdm_name = "dss_clkdm", |
| @@ -2135,7 +2125,6 @@ static struct clk dss_ick_3430es2 = { | |||
| 2135 | .name = "dss_ick", | 2125 | .name = "dss_ick", |
| 2136 | .ops = &clkops_omap3430es2_dss_usbhost_wait, | 2126 | .ops = &clkops_omap3430es2_dss_usbhost_wait, |
| 2137 | .parent = &l4_ick, | 2127 | .parent = &l4_ick, |
| 2138 | .init = &omap2_init_clk_clkdm, | ||
| 2139 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), | 2128 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), |
| 2140 | .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, | 2129 | .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, |
| 2141 | .clkdm_name = "dss_clkdm", | 2130 | .clkdm_name = "dss_clkdm", |
| @@ -2159,7 +2148,6 @@ static struct clk cam_ick = { | |||
| 2159 | .name = "cam_ick", | 2148 | .name = "cam_ick", |
| 2160 | .ops = &clkops_omap2_dflt, | 2149 | .ops = &clkops_omap2_dflt, |
| 2161 | .parent = &l4_ick, | 2150 | .parent = &l4_ick, |
| 2162 | .init = &omap2_init_clk_clkdm, | ||
| 2163 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), | 2151 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), |
| 2164 | .enable_bit = OMAP3430_EN_CAM_SHIFT, | 2152 | .enable_bit = OMAP3430_EN_CAM_SHIFT, |
| 2165 | .clkdm_name = "cam_clkdm", | 2153 | .clkdm_name = "cam_clkdm", |
| @@ -2170,7 +2158,6 @@ static struct clk csi2_96m_fck = { | |||
| 2170 | .name = "csi2_96m_fck", | 2158 | .name = "csi2_96m_fck", |
| 2171 | .ops = &clkops_omap2_dflt, | 2159 | .ops = &clkops_omap2_dflt, |
| 2172 | .parent = &core_96m_fck, | 2160 | .parent = &core_96m_fck, |
| 2173 | .init = &omap2_init_clk_clkdm, | ||
| 2174 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), | 2161 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), |
| 2175 | .enable_bit = OMAP3430_EN_CSI2_SHIFT, | 2162 | .enable_bit = OMAP3430_EN_CSI2_SHIFT, |
| 2176 | .clkdm_name = "cam_clkdm", | 2163 | .clkdm_name = "cam_clkdm", |
| @@ -2183,7 +2170,6 @@ static struct clk usbhost_120m_fck = { | |||
| 2183 | .name = "usbhost_120m_fck", | 2170 | .name = "usbhost_120m_fck", |
| 2184 | .ops = &clkops_omap2_dflt, | 2171 | .ops = &clkops_omap2_dflt, |
| 2185 | .parent = &dpll5_m2_ck, | 2172 | .parent = &dpll5_m2_ck, |
| 2186 | .init = &omap2_init_clk_clkdm, | ||
| 2187 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), | 2173 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), |
| 2188 | .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, | 2174 | .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, |
| 2189 | .clkdm_name = "usbhost_clkdm", | 2175 | .clkdm_name = "usbhost_clkdm", |
| @@ -2194,7 +2180,6 @@ static struct clk usbhost_48m_fck = { | |||
| 2194 | .name = "usbhost_48m_fck", | 2180 | .name = "usbhost_48m_fck", |
| 2195 | .ops = &clkops_omap3430es2_dss_usbhost_wait, | 2181 | .ops = &clkops_omap3430es2_dss_usbhost_wait, |
| 2196 | .parent = &omap_48m_fck, | 2182 | .parent = &omap_48m_fck, |
| 2197 | .init = &omap2_init_clk_clkdm, | ||
| 2198 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), | 2183 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), |
| 2199 | .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, | 2184 | .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, |
| 2200 | .clkdm_name = "usbhost_clkdm", | 2185 | .clkdm_name = "usbhost_clkdm", |
| @@ -2206,7 +2191,6 @@ static struct clk usbhost_ick = { | |||
| 2206 | .name = "usbhost_ick", | 2191 | .name = "usbhost_ick", |
| 2207 | .ops = &clkops_omap3430es2_dss_usbhost_wait, | 2192 | .ops = &clkops_omap3430es2_dss_usbhost_wait, |
| 2208 | .parent = &l4_ick, | 2193 | .parent = &l4_ick, |
| 2209 | .init = &omap2_init_clk_clkdm, | ||
| 2210 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), | 2194 | .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), |
| 2211 | .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, | 2195 | .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, |
| 2212 | .clkdm_name = "usbhost_clkdm", | 2196 | .clkdm_name = "usbhost_clkdm", |
| @@ -2268,7 +2252,6 @@ static struct clk gpt1_fck = { | |||
| 2268 | static struct clk wkup_32k_fck = { | 2252 | static struct clk wkup_32k_fck = { |
| 2269 | .name = "wkup_32k_fck", | 2253 | .name = "wkup_32k_fck", |
| 2270 | .ops = &clkops_null, | 2254 | .ops = &clkops_null, |
| 2271 | .init = &omap2_init_clk_clkdm, | ||
| 2272 | .parent = &omap_32k_fck, | 2255 | .parent = &omap_32k_fck, |
| 2273 | .clkdm_name = "wkup_clkdm", | 2256 | .clkdm_name = "wkup_clkdm", |
| 2274 | .recalc = &followparent_recalc, | 2257 | .recalc = &followparent_recalc, |
| @@ -2383,7 +2366,6 @@ static struct clk per_96m_fck = { | |||
| 2383 | .name = "per_96m_fck", | 2366 | .name = "per_96m_fck", |
| 2384 | .ops = &clkops_null, | 2367 | .ops = &clkops_null, |
| 2385 | .parent = &omap_96m_alwon_fck, | 2368 | .parent = &omap_96m_alwon_fck, |
| 2386 | .init = &omap2_init_clk_clkdm, | ||
| 2387 | .clkdm_name = "per_clkdm", | 2369 | .clkdm_name = "per_clkdm", |
| 2388 | .recalc = &followparent_recalc, | 2370 | .recalc = &followparent_recalc, |
| 2389 | }; | 2371 | }; |
| @@ -2392,7 +2374,6 @@ static struct clk per_48m_fck = { | |||
| 2392 | .name = "per_48m_fck", | 2374 | .name = "per_48m_fck", |
| 2393 | .ops = &clkops_null, | 2375 | .ops = &clkops_null, |
| 2394 | .parent = &omap_48m_fck, | 2376 | .parent = &omap_48m_fck, |
| 2395 | .init = &omap2_init_clk_clkdm, | ||
| 2396 | .clkdm_name = "per_clkdm", | 2377 | .clkdm_name = "per_clkdm", |
| 2397 | .recalc = &followparent_recalc, | 2378 | .recalc = &followparent_recalc, |
| 2398 | }; | 2379 | }; |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 0e7d501865b6..4ef7b4f5474e 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
| @@ -299,7 +299,8 @@ struct clockdomain *clkdm_lookup(const char *name) | |||
| 299 | * anything else to indicate failure; or -EINVAL if the function pointer | 299 | * anything else to indicate failure; or -EINVAL if the function pointer |
| 300 | * is null. | 300 | * is null. |
| 301 | */ | 301 | */ |
| 302 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) | 302 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), |
| 303 | void *user) | ||
| 303 | { | 304 | { |
| 304 | struct clockdomain *clkdm; | 305 | struct clockdomain *clkdm; |
| 305 | int ret = 0; | 306 | int ret = 0; |
| @@ -309,7 +310,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) | |||
| 309 | 310 | ||
| 310 | mutex_lock(&clkdm_mutex); | 311 | mutex_lock(&clkdm_mutex); |
| 311 | list_for_each_entry(clkdm, &clkdm_list, node) { | 312 | list_for_each_entry(clkdm, &clkdm_list, node) { |
| 312 | ret = (*fn)(clkdm); | 313 | ret = (*fn)(clkdm, user); |
| 313 | if (ret) | 314 | if (ret) |
| 314 | break; | 315 | break; |
| 315 | } | 316 | } |
| @@ -484,6 +485,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |||
| 484 | v << __ffs(clkdm->clktrctrl_mask), | 485 | v << __ffs(clkdm->clktrctrl_mask), |
| 485 | clkdm->pwrdm.ptr->prcm_offs, | 486 | clkdm->pwrdm.ptr->prcm_offs, |
| 486 | CM_CLKSTCTRL); | 487 | CM_CLKSTCTRL); |
| 488 | |||
| 489 | pwrdm_clkdm_state_switch(clkdm); | ||
| 487 | } | 490 | } |
| 488 | 491 | ||
| 489 | /** | 492 | /** |
| @@ -572,6 +575,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |||
| 572 | omap2_clkdm_wakeup(clkdm); | 575 | omap2_clkdm_wakeup(clkdm); |
| 573 | 576 | ||
| 574 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | 577 | pwrdm_wait_transition(clkdm->pwrdm.ptr); |
| 578 | pwrdm_clkdm_state_switch(clkdm); | ||
| 575 | 579 | ||
| 576 | return 0; | 580 | return 0; |
| 577 | } | 581 | } |
| @@ -624,6 +628,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |||
| 624 | else | 628 | else |
| 625 | omap2_clkdm_sleep(clkdm); | 629 | omap2_clkdm_sleep(clkdm); |
| 626 | 630 | ||
| 631 | pwrdm_clkdm_state_switch(clkdm); | ||
| 632 | |||
| 627 | return 0; | 633 | return 0; |
| 628 | } | 634 | } |
| 629 | 635 | ||
diff --git a/arch/arm/mach-omap2/cm.c b/arch/arm/mach-omap2/cm.c new file mode 100644 index 000000000000..8eb2dab8c7db --- /dev/null +++ b/arch/arm/mach-omap2/cm.c | |||
| @@ -0,0 +1,70 @@ | |||
| 1 | /* | ||
| 2 | * OMAP2/3 CM module functions | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/spinlock.h> | ||
| 17 | #include <linux/list.h> | ||
| 18 | #include <linux/errno.h> | ||
| 19 | #include <linux/err.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | |||
| 22 | #include <asm/atomic.h> | ||
| 23 | |||
| 24 | #include "cm.h" | ||
| 25 | #include "cm-regbits-24xx.h" | ||
| 26 | #include "cm-regbits-34xx.h" | ||
| 27 | |||
| 28 | /* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */ | ||
| 29 | #define MAX_MODULE_READY_TIME 20000 | ||
| 30 | |||
| 31 | static const u8 cm_idlest_offs[] = { | ||
| 32 | CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 | ||
| 33 | }; | ||
| 34 | |||
| 35 | /** | ||
| 36 | * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby | ||
| 37 | * @prcm_mod: PRCM module offset | ||
| 38 | * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) | ||
| 39 | * @idlest_shift: shift of the bit in the CM_IDLEST* register to check | ||
| 40 | * | ||
| 41 | * XXX document | ||
| 42 | */ | ||
| 43 | int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) | ||
| 44 | { | ||
| 45 | int ena = 0, i = 0; | ||
| 46 | u8 cm_idlest_reg; | ||
| 47 | u32 mask; | ||
| 48 | |||
| 49 | if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs))) | ||
| 50 | return -EINVAL; | ||
| 51 | |||
| 52 | cm_idlest_reg = cm_idlest_offs[idlest_id - 1]; | ||
| 53 | |||
| 54 | if (cpu_is_omap24xx()) | ||
| 55 | ena = idlest_shift; | ||
| 56 | else if (cpu_is_omap34xx()) | ||
| 57 | ena = 0; | ||
| 58 | else | ||
| 59 | BUG(); | ||
| 60 | |||
| 61 | mask = 1 << idlest_shift; | ||
| 62 | |||
| 63 | /* XXX should be OMAP2 CM */ | ||
| 64 | while (((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) != ena) && | ||
| 65 | (i++ < MAX_MODULE_READY_TIME)) | ||
| 66 | udelay(1); | ||
| 67 | |||
| 68 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | ||
| 69 | } | ||
| 70 | |||
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index f3c91a1ca391..cfd0b726ba44 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h | |||
| @@ -17,11 +17,11 @@ | |||
| 17 | #include "prcm-common.h" | 17 | #include "prcm-common.h" |
| 18 | 18 | ||
| 19 | #define OMAP2420_CM_REGADDR(module, reg) \ | 19 | #define OMAP2420_CM_REGADDR(module, reg) \ |
| 20 | IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) | 20 | OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) |
| 21 | #define OMAP2430_CM_REGADDR(module, reg) \ | 21 | #define OMAP2430_CM_REGADDR(module, reg) \ |
| 22 | IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) | 22 | OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) |
| 23 | #define OMAP34XX_CM_REGADDR(module, reg) \ | 23 | #define OMAP34XX_CM_REGADDR(module, reg) \ |
| 24 | IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) | 24 | OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) |
| 25 | 25 | ||
| 26 | /* | 26 | /* |
| 27 | * Architecture-specific global CM registers | 27 | * Architecture-specific global CM registers |
| @@ -98,6 +98,10 @@ extern u32 cm_read_mod_reg(s16 module, u16 idx); | |||
| 98 | extern void cm_write_mod_reg(u32 val, s16 module, u16 idx); | 98 | extern void cm_write_mod_reg(u32 val, s16 module, u16 idx); |
| 99 | extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); | 99 | extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); |
| 100 | 100 | ||
| 101 | extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, | ||
| 102 | u8 idlest_shift); | ||
| 103 | extern int omap4_cm_wait_module_ready(u32 prcm_mod, u8 prcm_dev_offs); | ||
| 104 | |||
| 101 | static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) | 105 | static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) |
| 102 | { | 106 | { |
| 103 | return cm_rmw_mod_reg_bits(bits, bits, module, idx); | 107 | return cm_rmw_mod_reg_bits(bits, bits, module, idx); |
diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c new file mode 100644 index 000000000000..e4ebd6d53135 --- /dev/null +++ b/arch/arm/mach-omap2/cm4xxx.c | |||
| @@ -0,0 +1,68 @@ | |||
| 1 | /* | ||
| 2 | * OMAP4 CM module functions | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/spinlock.h> | ||
| 17 | #include <linux/list.h> | ||
| 18 | #include <linux/errno.h> | ||
| 19 | #include <linux/err.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | |||
| 22 | #include <asm/atomic.h> | ||
| 23 | |||
| 24 | #include "cm.h" | ||
| 25 | #include "cm-regbits-4xxx.h" | ||
| 26 | |||
| 27 | /* XXX move this to cm.h */ | ||
| 28 | /* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */ | ||
| 29 | #define MAX_MODULE_READY_TIME 20000 | ||
| 30 | |||
| 31 | /* | ||
| 32 | * OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK: isolates the IDLEST field in the | ||
| 33 | * CM_CLKCTRL register. | ||
| 34 | */ | ||
| 35 | #define OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK (0x2 << 16) | ||
| 36 | |||
| 37 | /* | ||
| 38 | * OMAP4 prcm_mod u32 fields contain packed data: the CM ID in bit 16 and | ||
| 39 | * the PRCM module offset address (from the CM module base) in bits 15-0. | ||
| 40 | */ | ||
| 41 | #define OMAP4_PRCM_MOD_CM_ID_SHIFT 16 | ||
| 42 | #define OMAP4_PRCM_MOD_OFFS_MASK 0xffff | ||
| 43 | |||
| 44 | /** | ||
| 45 | * omap4_cm_wait_idlest_ready - wait for a module to leave idle or standby | ||
| 46 | * @prcm_mod: PRCM module offset (XXX example) | ||
| 47 | * @prcm_dev_offs: PRCM device offset (e.g. MCASP XXX example) | ||
| 48 | * | ||
| 49 | * XXX document | ||
| 50 | */ | ||
| 51 | int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs) | ||
| 52 | { | ||
| 53 | int i = 0; | ||
| 54 | u8 cm_id; | ||
| 55 | u16 prcm_mod_offs; | ||
| 56 | u32 mask = OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK; | ||
| 57 | |||
| 58 | cm_id = prcm_mod >> OMAP4_PRCM_MOD_CM_ID_SHIFT; | ||
| 59 | prcm_mod_offs = prcm_mod & OMAP4_PRCM_MOD_OFFS_MASK; | ||
| 60 | |||
| 61 | while (((omap4_cm_read_mod_reg(cm_id, prcm_mod_offs, prcm_dev_offs, | ||
| 62 | OMAP4_CM_CLKCTRL_DREG) & mask) != 0) && | ||
| 63 | (i++ < MAX_MODULE_READY_TIME)) | ||
| 64 | udelay(1); | ||
| 65 | |||
| 66 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | ||
| 67 | } | ||
| 68 | |||
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 894cc355818a..a2e915639b72 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
| @@ -513,6 +513,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
| 513 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); | 513 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); |
| 514 | } | 514 | } |
| 515 | } | 515 | } |
| 516 | |||
| 517 | if (cpu_is_omap3430()) { | ||
| 518 | if (controller_nr == 0) { | ||
| 519 | omap_cfg_reg(N28_3430_MMC1_CLK); | ||
| 520 | omap_cfg_reg(M27_3430_MMC1_CMD); | ||
| 521 | omap_cfg_reg(N27_3430_MMC1_DAT0); | ||
| 522 | if (mmc_controller->slots[0].wires == 4 || | ||
| 523 | mmc_controller->slots[0].wires == 8) { | ||
| 524 | omap_cfg_reg(N26_3430_MMC1_DAT1); | ||
| 525 | omap_cfg_reg(N25_3430_MMC1_DAT2); | ||
| 526 | omap_cfg_reg(P28_3430_MMC1_DAT3); | ||
| 527 | } | ||
| 528 | if (mmc_controller->slots[0].wires == 8) { | ||
| 529 | omap_cfg_reg(P27_3430_MMC1_DAT4); | ||
| 530 | omap_cfg_reg(P26_3430_MMC1_DAT5); | ||
| 531 | omap_cfg_reg(R27_3430_MMC1_DAT6); | ||
| 532 | omap_cfg_reg(R25_3430_MMC1_DAT7); | ||
| 533 | } | ||
| 534 | } | ||
| 535 | if (controller_nr == 1) { | ||
| 536 | /* MMC2 */ | ||
| 537 | omap_cfg_reg(AE2_3430_MMC2_CLK); | ||
| 538 | omap_cfg_reg(AG5_3430_MMC2_CMD); | ||
| 539 | omap_cfg_reg(AH5_3430_MMC2_DAT0); | ||
| 540 | |||
| 541 | /* | ||
| 542 | * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed | ||
| 543 | * in the board-*.c files | ||
| 544 | */ | ||
| 545 | if (mmc_controller->slots[0].wires == 4 || | ||
| 546 | mmc_controller->slots[0].wires == 8) { | ||
| 547 | omap_cfg_reg(AH4_3430_MMC2_DAT1); | ||
| 548 | omap_cfg_reg(AG4_3430_MMC2_DAT2); | ||
| 549 | omap_cfg_reg(AF4_3430_MMC2_DAT3); | ||
| 550 | } | ||
| 551 | } | ||
| 552 | |||
| 553 | /* | ||
| 554 | * For MMC3 the pins need to be muxed in the board-*.c files | ||
| 555 | */ | ||
| 556 | } | ||
| 516 | } | 557 | } |
| 517 | 558 | ||
| 518 | void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | 559 | void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index e9b9bcb19b4e..7574b6f20e8e 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
| @@ -32,17 +32,23 @@ | |||
| 32 | #include <mach/sram.h> | 32 | #include <mach/sram.h> |
| 33 | #include <mach/sdrc.h> | 33 | #include <mach/sdrc.h> |
| 34 | #include <mach/gpmc.h> | 34 | #include <mach/gpmc.h> |
| 35 | #include <mach/serial.h> | ||
| 35 | 36 | ||
| 36 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ | 37 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */ |
| 37 | #include "clock.h" | 38 | #include "clock.h" |
| 38 | 39 | ||
| 40 | #include <mach/omap-pm.h> | ||
| 39 | #include <mach/powerdomain.h> | 41 | #include <mach/powerdomain.h> |
| 40 | |||
| 41 | #include "powerdomains.h" | 42 | #include "powerdomains.h" |
| 42 | 43 | ||
| 43 | #include <mach/clockdomain.h> | 44 | #include <mach/clockdomain.h> |
| 44 | #include "clockdomains.h" | 45 | #include "clockdomains.h" |
| 45 | #endif | 46 | #endif |
| 47 | #include <mach/omap_hwmod.h> | ||
| 48 | #include "omap_hwmod_2420.h" | ||
| 49 | #include "omap_hwmod_2430.h" | ||
| 50 | #include "omap_hwmod_34xx.h" | ||
| 51 | |||
| 46 | /* | 52 | /* |
| 47 | * The machine specific code may provide the extra mapping besides the | 53 | * The machine specific code may provide the extra mapping besides the |
| 48 | * default mapping provided here. | 54 | * default mapping provided here. |
| @@ -279,11 +285,26 @@ static int __init _omap2_init_reprogram_sdrc(void) | |||
| 279 | void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, | 285 | void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, |
| 280 | struct omap_sdrc_params *sdrc_cs1) | 286 | struct omap_sdrc_params *sdrc_cs1) |
| 281 | { | 287 | { |
| 288 | struct omap_hwmod **hwmods = NULL; | ||
| 289 | |||
| 290 | if (cpu_is_omap2420()) | ||
| 291 | hwmods = omap2420_hwmods; | ||
| 292 | else if (cpu_is_omap2430()) | ||
| 293 | hwmods = omap2430_hwmods; | ||
| 294 | else if (cpu_is_omap34xx()) | ||
| 295 | hwmods = omap34xx_hwmods; | ||
| 296 | |||
| 297 | omap_hwmod_init(hwmods); | ||
| 282 | omap2_mux_init(); | 298 | omap2_mux_init(); |
| 283 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */ | 299 | #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */ |
| 300 | /* The OPP tables have to be registered before a clk init */ | ||
| 301 | omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps); | ||
| 284 | pwrdm_init(powerdomains_omap); | 302 | pwrdm_init(powerdomains_omap); |
| 285 | clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); | 303 | clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); |
| 286 | omap2_clk_init(); | 304 | omap2_clk_init(); |
| 305 | omap_serial_early_init(); | ||
| 306 | omap_hwmod_late_init(); | ||
| 307 | omap_pm_if_init(); | ||
| 287 | omap2_sdrc_init(sdrc_cs0, sdrc_cs1); | 308 | omap2_sdrc_init(sdrc_cs0, sdrc_cs1); |
| 288 | _omap2_init_reprogram_sdrc(); | 309 | _omap2_init_reprogram_sdrc(); |
| 289 | #endif | 310 | #endif |
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c index 015f22a53ead..2d9b5cc981cd 100644 --- a/arch/arm/mach-omap2/iommu2.c +++ b/arch/arm/mach-omap2/iommu2.c | |||
| @@ -217,10 +217,19 @@ static ssize_t omap2_dump_cr(struct iommu *obj, struct cr_regs *cr, char *buf) | |||
| 217 | } | 217 | } |
| 218 | 218 | ||
| 219 | #define pr_reg(name) \ | 219 | #define pr_reg(name) \ |
| 220 | p += sprintf(p, "%20s: %08x\n", \ | 220 | do { \ |
| 221 | __stringify(name), iommu_read_reg(obj, MMU_##name)); | 221 | ssize_t bytes; \ |
| 222 | 222 | const char *str = "%20s: %08x\n"; \ | |
| 223 | static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf) | 223 | const int maxcol = 32; \ |
| 224 | bytes = snprintf(p, maxcol, str, __stringify(name), \ | ||
| 225 | iommu_read_reg(obj, MMU_##name)); \ | ||
| 226 | p += bytes; \ | ||
| 227 | len -= bytes; \ | ||
| 228 | if (len < maxcol) \ | ||
| 229 | goto out; \ | ||
| 230 | } while (0) | ||
| 231 | |||
| 232 | static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len) | ||
| 224 | { | 233 | { |
| 225 | char *p = buf; | 234 | char *p = buf; |
| 226 | 235 | ||
| @@ -242,7 +251,7 @@ static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf) | |||
| 242 | pr_reg(READ_CAM); | 251 | pr_reg(READ_CAM); |
| 243 | pr_reg(READ_RAM); | 252 | pr_reg(READ_RAM); |
| 244 | pr_reg(EMU_FAULT_AD); | 253 | pr_reg(EMU_FAULT_AD); |
| 245 | 254 | out: | |
| 246 | return p - buf; | 255 | return p - buf; |
| 247 | } | 256 | } |
| 248 | 257 | ||
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 43d6b92b65f2..2daa595aaff4 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
| @@ -492,6 +492,61 @@ MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262, | |||
| 492 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) | 492 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) |
| 493 | MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264, | 493 | MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264, |
| 494 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) | 494 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT) |
| 495 | |||
| 496 | /* MMC1 */ | ||
| 497 | MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144, | ||
| 498 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 499 | MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146, | ||
| 500 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 501 | MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148, | ||
| 502 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 503 | MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a, | ||
| 504 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 505 | MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c, | ||
| 506 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 507 | MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e, | ||
| 508 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 509 | MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150, | ||
| 510 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 511 | MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152, | ||
| 512 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 513 | MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154, | ||
| 514 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 515 | MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156, | ||
| 516 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 517 | |||
| 518 | /* MMC2 */ | ||
| 519 | MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158, | ||
| 520 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 521 | MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A, | ||
| 522 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 523 | MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c, | ||
| 524 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 525 | MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e, | ||
| 526 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 527 | MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160, | ||
| 528 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 529 | MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162, | ||
| 530 | OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 531 | |||
| 532 | /* MMC3 */ | ||
| 533 | MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8, | ||
| 534 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 535 | MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0, | ||
| 536 | OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 537 | MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4, | ||
| 538 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 539 | MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6, | ||
| 540 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 541 | MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8, | ||
| 542 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 543 | MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2, | ||
| 544 | OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP) | ||
| 545 | |||
| 546 | /* SYS_NIRQ T2 INT1 */ | ||
| 547 | MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0, | ||
| 548 | OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP | | ||
| 549 | OMAP34XX_MUX_MODE0) | ||
| 495 | }; | 550 | }; |
| 496 | 551 | ||
| 497 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) | 552 | #define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) |
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 8fe8d230f21b..48ee295db275 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
| @@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) | |||
| 54 | * for us: do so | 54 | * for us: do so |
| 55 | */ | 55 | */ |
| 56 | 56 | ||
| 57 | gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); | 57 | gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)); |
| 58 | 58 | ||
| 59 | /* | 59 | /* |
| 60 | * Synchronise with the boot thread. | 60 | * Synchronise with the boot thread. |
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c new file mode 100644 index 000000000000..d2e0f1c95961 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
| @@ -0,0 +1,1554 @@ | |||
| 1 | /* | ||
| 2 | * omap_hwmod implementation for OMAP2/3/4 | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * With fixes and testing from Kevin Hilman | ||
| 7 | * | ||
| 8 | * Created in collaboration with (alphabetical order): Benoit Cousson, | ||
| 9 | * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari | ||
| 10 | * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | * | ||
| 16 | * This code manages "OMAP modules" (on-chip devices) and their | ||
| 17 | * integration with Linux device driver and bus code. | ||
| 18 | * | ||
| 19 | * References: | ||
| 20 | * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) | ||
| 21 | * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) | ||
| 22 | * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) | ||
| 23 | * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) | ||
| 24 | * - Open Core Protocol Specification 2.2 | ||
| 25 | * | ||
| 26 | * To do: | ||
| 27 | * - pin mux handling | ||
| 28 | * - handle IO mapping | ||
| 29 | * - bus throughput & module latency measurement code | ||
| 30 | * | ||
| 31 | * XXX add tests at the beginning of each function to ensure the hwmod is | ||
| 32 | * in the appropriate state | ||
| 33 | * XXX error return values should be checked to ensure that they are | ||
| 34 | * appropriate | ||
| 35 | */ | ||
| 36 | #undef DEBUG | ||
| 37 | |||
| 38 | #include <linux/kernel.h> | ||
| 39 | #include <linux/errno.h> | ||
| 40 | #include <linux/io.h> | ||
| 41 | #include <linux/clk.h> | ||
| 42 | #include <linux/delay.h> | ||
| 43 | #include <linux/err.h> | ||
| 44 | #include <linux/list.h> | ||
| 45 | #include <linux/mutex.h> | ||
| 46 | #include <linux/bootmem.h> | ||
| 47 | |||
| 48 | #include <mach/cpu.h> | ||
| 49 | #include <mach/clockdomain.h> | ||
| 50 | #include <mach/powerdomain.h> | ||
| 51 | #include <mach/clock.h> | ||
| 52 | #include <mach/omap_hwmod.h> | ||
| 53 | |||
| 54 | #include "cm.h" | ||
| 55 | |||
| 56 | /* Maximum microseconds to wait for OMAP module to reset */ | ||
| 57 | #define MAX_MODULE_RESET_WAIT 10000 | ||
| 58 | |||
| 59 | /* Name of the OMAP hwmod for the MPU */ | ||
| 60 | #define MPU_INITIATOR_NAME "mpu_hwmod" | ||
| 61 | |||
| 62 | /* omap_hwmod_list contains all registered struct omap_hwmods */ | ||
| 63 | static LIST_HEAD(omap_hwmod_list); | ||
| 64 | |||
| 65 | static DEFINE_MUTEX(omap_hwmod_mutex); | ||
| 66 | |||
| 67 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ | ||
| 68 | static struct omap_hwmod *mpu_oh; | ||
| 69 | |||
| 70 | /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */ | ||
| 71 | static u8 inited; | ||
| 72 | |||
| 73 | |||
| 74 | /* Private functions */ | ||
| 75 | |||
| 76 | /** | ||
| 77 | * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy | ||
| 78 | * @oh: struct omap_hwmod * | ||
| 79 | * | ||
| 80 | * Load the current value of the hwmod OCP_SYSCONFIG register into the | ||
| 81 | * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no | ||
| 82 | * OCP_SYSCONFIG register or 0 upon success. | ||
| 83 | */ | ||
| 84 | static int _update_sysc_cache(struct omap_hwmod *oh) | ||
| 85 | { | ||
| 86 | if (!oh->sysconfig) { | ||
| 87 | WARN(!oh->sysconfig, "omap_hwmod: %s: cannot read " | ||
| 88 | "OCP_SYSCONFIG: not defined on hwmod\n", oh->name); | ||
| 89 | return -EINVAL; | ||
| 90 | } | ||
| 91 | |||
| 92 | /* XXX ensure module interface clock is up */ | ||
| 93 | |||
| 94 | oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs); | ||
| 95 | |||
| 96 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; | ||
| 97 | |||
| 98 | return 0; | ||
| 99 | } | ||
| 100 | |||
| 101 | /** | ||
| 102 | * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register | ||
| 103 | * @v: OCP_SYSCONFIG value to write | ||
| 104 | * @oh: struct omap_hwmod * | ||
| 105 | * | ||
| 106 | * Write @v into the module OCP_SYSCONFIG register, if it has one. No | ||
| 107 | * return value. | ||
| 108 | */ | ||
| 109 | static void _write_sysconfig(u32 v, struct omap_hwmod *oh) | ||
| 110 | { | ||
| 111 | if (!oh->sysconfig) { | ||
| 112 | WARN(!oh->sysconfig, "omap_hwmod: %s: cannot write " | ||
| 113 | "OCP_SYSCONFIG: not defined on hwmod\n", oh->name); | ||
| 114 | return; | ||
| 115 | } | ||
| 116 | |||
| 117 | /* XXX ensure module interface clock is up */ | ||
| 118 | |||
| 119 | if (oh->_sysc_cache != v) { | ||
| 120 | oh->_sysc_cache = v; | ||
| 121 | omap_hwmod_writel(v, oh, oh->sysconfig->sysc_offs); | ||
| 122 | } | ||
| 123 | } | ||
| 124 | |||
| 125 | /** | ||
| 126 | * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v | ||
| 127 | * @oh: struct omap_hwmod * | ||
| 128 | * @standbymode: MIDLEMODE field bits | ||
| 129 | * @v: pointer to register contents to modify | ||
| 130 | * | ||
| 131 | * Update the master standby mode bits in @v to be @standbymode for | ||
| 132 | * the @oh hwmod. Does not write to the hardware. Returns -EINVAL | ||
| 133 | * upon error or 0 upon success. | ||
| 134 | */ | ||
| 135 | static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, | ||
| 136 | u32 *v) | ||
| 137 | { | ||
| 138 | if (!oh->sysconfig || | ||
| 139 | !(oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE)) | ||
| 140 | return -EINVAL; | ||
| 141 | |||
| 142 | *v &= ~SYSC_MIDLEMODE_MASK; | ||
| 143 | *v |= __ffs(standbymode) << SYSC_MIDLEMODE_SHIFT; | ||
| 144 | |||
| 145 | return 0; | ||
| 146 | } | ||
| 147 | |||
| 148 | /** | ||
| 149 | * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v | ||
| 150 | * @oh: struct omap_hwmod * | ||
| 151 | * @idlemode: SIDLEMODE field bits | ||
| 152 | * @v: pointer to register contents to modify | ||
| 153 | * | ||
| 154 | * Update the slave idle mode bits in @v to be @idlemode for the @oh | ||
| 155 | * hwmod. Does not write to the hardware. Returns -EINVAL upon error | ||
| 156 | * or 0 upon success. | ||
| 157 | */ | ||
| 158 | static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) | ||
| 159 | { | ||
| 160 | if (!oh->sysconfig || | ||
| 161 | !(oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE)) | ||
| 162 | return -EINVAL; | ||
| 163 | |||
| 164 | *v &= ~SYSC_SIDLEMODE_MASK; | ||
| 165 | *v |= __ffs(idlemode) << SYSC_SIDLEMODE_SHIFT; | ||
| 166 | |||
| 167 | return 0; | ||
| 168 | } | ||
| 169 | |||
| 170 | /** | ||
| 171 | * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v | ||
| 172 | * @oh: struct omap_hwmod * | ||
| 173 | * @clockact: CLOCKACTIVITY field bits | ||
| 174 | * @v: pointer to register contents to modify | ||
| 175 | * | ||
| 176 | * Update the clockactivity mode bits in @v to be @clockact for the | ||
| 177 | * @oh hwmod. Used for additional powersaving on some modules. Does | ||
| 178 | * not write to the hardware. Returns -EINVAL upon error or 0 upon | ||
| 179 | * success. | ||
| 180 | */ | ||
| 181 | static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) | ||
| 182 | { | ||
| 183 | if (!oh->sysconfig || | ||
| 184 | !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) | ||
| 185 | return -EINVAL; | ||
| 186 | |||
| 187 | *v &= ~SYSC_CLOCKACTIVITY_MASK; | ||
| 188 | *v |= clockact << SYSC_CLOCKACTIVITY_SHIFT; | ||
| 189 | |||
| 190 | return 0; | ||
| 191 | } | ||
| 192 | |||
| 193 | /** | ||
| 194 | * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v | ||
| 195 | * @oh: struct omap_hwmod * | ||
| 196 | * @v: pointer to register contents to modify | ||
| 197 | * | ||
| 198 | * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon | ||
| 199 | * error or 0 upon success. | ||
| 200 | */ | ||
| 201 | static int _set_softreset(struct omap_hwmod *oh, u32 *v) | ||
| 202 | { | ||
| 203 | if (!oh->sysconfig || | ||
| 204 | !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET)) | ||
| 205 | return -EINVAL; | ||
| 206 | |||
| 207 | *v |= SYSC_SOFTRESET_MASK; | ||
| 208 | |||
| 209 | return 0; | ||
| 210 | } | ||
| 211 | |||
| 212 | /** | ||
| 213 | * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware | ||
| 214 | * @oh: struct omap_hwmod * | ||
| 215 | * | ||
| 216 | * Allow the hardware module @oh to send wakeups. Returns -EINVAL | ||
| 217 | * upon error or 0 upon success. | ||
| 218 | */ | ||
| 219 | static int _enable_wakeup(struct omap_hwmod *oh) | ||
| 220 | { | ||
| 221 | u32 v; | ||
| 222 | |||
| 223 | if (!oh->sysconfig || | ||
| 224 | !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) | ||
| 225 | return -EINVAL; | ||
| 226 | |||
| 227 | v = oh->_sysc_cache; | ||
| 228 | v |= SYSC_ENAWAKEUP_MASK; | ||
| 229 | _write_sysconfig(v, oh); | ||
| 230 | |||
| 231 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | ||
| 232 | |||
| 233 | oh->_int_flags |= _HWMOD_WAKEUP_ENABLED; | ||
| 234 | |||
| 235 | return 0; | ||
| 236 | } | ||
| 237 | |||
| 238 | /** | ||
| 239 | * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware | ||
| 240 | * @oh: struct omap_hwmod * | ||
| 241 | * | ||
| 242 | * Prevent the hardware module @oh to send wakeups. Returns -EINVAL | ||
| 243 | * upon error or 0 upon success. | ||
| 244 | */ | ||
| 245 | static int _disable_wakeup(struct omap_hwmod *oh) | ||
| 246 | { | ||
| 247 | u32 v; | ||
| 248 | |||
| 249 | if (!oh->sysconfig || | ||
| 250 | !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) | ||
| 251 | return -EINVAL; | ||
| 252 | |||
| 253 | v = oh->_sysc_cache; | ||
| 254 | v &= ~SYSC_ENAWAKEUP_MASK; | ||
| 255 | _write_sysconfig(v, oh); | ||
| 256 | |||
| 257 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | ||
| 258 | |||
| 259 | oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED; | ||
| 260 | |||
| 261 | return 0; | ||
| 262 | } | ||
| 263 | |||
| 264 | /** | ||
| 265 | * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active | ||
| 266 | * @oh: struct omap_hwmod * | ||
| 267 | * | ||
| 268 | * Prevent the hardware module @oh from entering idle while the | ||
| 269 | * hardare module initiator @init_oh is active. Useful when a module | ||
| 270 | * will be accessed by a particular initiator (e.g., if a module will | ||
| 271 | * be accessed by the IVA, there should be a sleepdep between the IVA | ||
| 272 | * initiator and the module). Only applies to modules in smart-idle | ||
| 273 | * mode. Returns -EINVAL upon error or passes along | ||
| 274 | * pwrdm_add_sleepdep() value upon success. | ||
| 275 | */ | ||
| 276 | static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) | ||
| 277 | { | ||
| 278 | if (!oh->_clk) | ||
| 279 | return -EINVAL; | ||
| 280 | |||
| 281 | return pwrdm_add_sleepdep(oh->_clk->clkdm->pwrdm.ptr, | ||
| 282 | init_oh->_clk->clkdm->pwrdm.ptr); | ||
| 283 | } | ||
| 284 | |||
| 285 | /** | ||
| 286 | * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active | ||
| 287 | * @oh: struct omap_hwmod * | ||
| 288 | * | ||
| 289 | * Allow the hardware module @oh to enter idle while the hardare | ||
| 290 | * module initiator @init_oh is active. Useful when a module will not | ||
| 291 | * be accessed by a particular initiator (e.g., if a module will not | ||
| 292 | * be accessed by the IVA, there should be no sleepdep between the IVA | ||
| 293 | * initiator and the module). Only applies to modules in smart-idle | ||
| 294 | * mode. Returns -EINVAL upon error or passes along | ||
| 295 | * pwrdm_add_sleepdep() value upon success. | ||
| 296 | */ | ||
| 297 | static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) | ||
| 298 | { | ||
| 299 | if (!oh->_clk) | ||
| 300 | return -EINVAL; | ||
| 301 | |||
| 302 | return pwrdm_del_sleepdep(oh->_clk->clkdm->pwrdm.ptr, | ||
| 303 | init_oh->_clk->clkdm->pwrdm.ptr); | ||
| 304 | } | ||
| 305 | |||
| 306 | /** | ||
| 307 | * _init_main_clk - get a struct clk * for the the hwmod's main functional clk | ||
| 308 | * @oh: struct omap_hwmod * | ||
| 309 | * | ||
| 310 | * Called from _init_clocks(). Populates the @oh _clk (main | ||
| 311 | * functional clock pointer) if a main_clk is present. Returns 0 on | ||
| 312 | * success or -EINVAL on error. | ||
| 313 | */ | ||
| 314 | static int _init_main_clk(struct omap_hwmod *oh) | ||
| 315 | { | ||
| 316 | struct clk *c; | ||
| 317 | int ret = 0; | ||
| 318 | |||
| 319 | if (!oh->clkdev_con_id) | ||
| 320 | return 0; | ||
| 321 | |||
| 322 | c = clk_get_sys(oh->clkdev_dev_id, oh->clkdev_con_id); | ||
| 323 | WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get main_clk %s.%s\n", | ||
| 324 | oh->name, oh->clkdev_dev_id, oh->clkdev_con_id); | ||
| 325 | if (IS_ERR(c)) | ||
| 326 | ret = -EINVAL; | ||
| 327 | oh->_clk = c; | ||
| 328 | |||
| 329 | return ret; | ||
| 330 | } | ||
| 331 | |||
| 332 | /** | ||
| 333 | * _init_interface_clk - get a struct clk * for the the hwmod's interface clks | ||
| 334 | * @oh: struct omap_hwmod * | ||
| 335 | * | ||
| 336 | * Called from _init_clocks(). Populates the @oh OCP slave interface | ||
| 337 | * clock pointers. Returns 0 on success or -EINVAL on error. | ||
| 338 | */ | ||
| 339 | static int _init_interface_clks(struct omap_hwmod *oh) | ||
| 340 | { | ||
| 341 | struct omap_hwmod_ocp_if *os; | ||
| 342 | struct clk *c; | ||
| 343 | int i; | ||
| 344 | int ret = 0; | ||
| 345 | |||
| 346 | if (oh->slaves_cnt == 0) | ||
| 347 | return 0; | ||
| 348 | |||
| 349 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | ||
| 350 | if (!os->clkdev_con_id) | ||
| 351 | continue; | ||
| 352 | |||
| 353 | c = clk_get_sys(os->clkdev_dev_id, os->clkdev_con_id); | ||
| 354 | WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get " | ||
| 355 | "interface_clk %s.%s\n", oh->name, | ||
| 356 | os->clkdev_dev_id, os->clkdev_con_id); | ||
| 357 | if (IS_ERR(c)) | ||
| 358 | ret = -EINVAL; | ||
| 359 | os->_clk = c; | ||
| 360 | } | ||
| 361 | |||
| 362 | return ret; | ||
| 363 | } | ||
| 364 | |||
| 365 | /** | ||
| 366 | * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks | ||
| 367 | * @oh: struct omap_hwmod * | ||
| 368 | * | ||
| 369 | * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk | ||
| 370 | * clock pointers. Returns 0 on success or -EINVAL on error. | ||
| 371 | */ | ||
| 372 | static int _init_opt_clks(struct omap_hwmod *oh) | ||
| 373 | { | ||
| 374 | struct omap_hwmod_opt_clk *oc; | ||
| 375 | struct clk *c; | ||
| 376 | int i; | ||
| 377 | int ret = 0; | ||
| 378 | |||
| 379 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { | ||
| 380 | c = clk_get_sys(oc->clkdev_dev_id, oc->clkdev_con_id); | ||
| 381 | WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get opt_clk " | ||
| 382 | "%s.%s\n", oh->name, oc->clkdev_dev_id, | ||
| 383 | oc->clkdev_con_id); | ||
| 384 | if (IS_ERR(c)) | ||
| 385 | ret = -EINVAL; | ||
| 386 | oc->_clk = c; | ||
| 387 | } | ||
| 388 | |||
| 389 | return ret; | ||
| 390 | } | ||
| 391 | |||
| 392 | /** | ||
| 393 | * _enable_clocks - enable hwmod main clock and interface clocks | ||
| 394 | * @oh: struct omap_hwmod * | ||
| 395 | * | ||
| 396 | * Enables all clocks necessary for register reads and writes to succeed | ||
| 397 | * on the hwmod @oh. Returns 0. | ||
| 398 | */ | ||
| 399 | static int _enable_clocks(struct omap_hwmod *oh) | ||
| 400 | { | ||
| 401 | struct omap_hwmod_ocp_if *os; | ||
| 402 | int i; | ||
| 403 | |||
| 404 | pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); | ||
| 405 | |||
| 406 | if (oh->_clk && !IS_ERR(oh->_clk)) | ||
| 407 | clk_enable(oh->_clk); | ||
| 408 | |||
| 409 | if (oh->slaves_cnt > 0) { | ||
| 410 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | ||
| 411 | struct clk *c = os->_clk; | ||
| 412 | |||
| 413 | if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE)) | ||
| 414 | clk_enable(c); | ||
| 415 | } | ||
| 416 | } | ||
| 417 | |||
| 418 | /* The opt clocks are controlled by the device driver. */ | ||
| 419 | |||
| 420 | return 0; | ||
| 421 | } | ||
| 422 | |||
| 423 | /** | ||
| 424 | * _disable_clocks - disable hwmod main clock and interface clocks | ||
| 425 | * @oh: struct omap_hwmod * | ||
| 426 | * | ||
| 427 | * Disables the hwmod @oh main functional and interface clocks. Returns 0. | ||
| 428 | */ | ||
| 429 | static int _disable_clocks(struct omap_hwmod *oh) | ||
| 430 | { | ||
| 431 | struct omap_hwmod_ocp_if *os; | ||
| 432 | int i; | ||
| 433 | |||
| 434 | pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); | ||
| 435 | |||
| 436 | if (oh->_clk && !IS_ERR(oh->_clk)) | ||
| 437 | clk_disable(oh->_clk); | ||
| 438 | |||
| 439 | if (oh->slaves_cnt > 0) { | ||
| 440 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | ||
| 441 | struct clk *c = os->_clk; | ||
| 442 | |||
| 443 | if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE)) | ||
| 444 | clk_disable(c); | ||
| 445 | } | ||
| 446 | } | ||
| 447 | |||
| 448 | /* The opt clocks are controlled by the device driver. */ | ||
| 449 | |||
| 450 | return 0; | ||
| 451 | } | ||
| 452 | |||
| 453 | /** | ||
| 454 | * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use | ||
| 455 | * @oh: struct omap_hwmod * | ||
| 456 | * | ||
| 457 | * Returns the array index of the OCP slave port that the MPU | ||
| 458 | * addresses the device on, or -EINVAL upon error or not found. | ||
| 459 | */ | ||
| 460 | static int _find_mpu_port_index(struct omap_hwmod *oh) | ||
| 461 | { | ||
| 462 | struct omap_hwmod_ocp_if *os; | ||
| 463 | int i; | ||
| 464 | int found = 0; | ||
| 465 | |||
| 466 | if (!oh || oh->slaves_cnt == 0) | ||
| 467 | return -EINVAL; | ||
| 468 | |||
| 469 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | ||
| 470 | if (os->user & OCP_USER_MPU) { | ||
| 471 | found = 1; | ||
| 472 | break; | ||
| 473 | } | ||
| 474 | } | ||
| 475 | |||
| 476 | if (found) | ||
| 477 | pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n", | ||
| 478 | oh->name, i); | ||
| 479 | else | ||
| 480 | pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n", | ||
| 481 | oh->name); | ||
| 482 | |||
| 483 | return (found) ? i : -EINVAL; | ||
| 484 | } | ||
| 485 | |||
| 486 | /** | ||
| 487 | * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU | ||
| 488 | * @oh: struct omap_hwmod * | ||
| 489 | * | ||
| 490 | * Return the virtual address of the base of the register target of | ||
| 491 | * device @oh, or NULL on error. | ||
| 492 | */ | ||
| 493 | static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index) | ||
| 494 | { | ||
| 495 | struct omap_hwmod_ocp_if *os; | ||
| 496 | struct omap_hwmod_addr_space *mem; | ||
| 497 | int i; | ||
| 498 | int found = 0; | ||
| 499 | |||
| 500 | if (!oh || oh->slaves_cnt == 0) | ||
| 501 | return NULL; | ||
| 502 | |||
| 503 | os = *oh->slaves + index; | ||
| 504 | |||
| 505 | for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { | ||
| 506 | if (mem->flags & ADDR_TYPE_RT) { | ||
| 507 | found = 1; | ||
| 508 | break; | ||
| 509 | } | ||
| 510 | } | ||
| 511 | |||
| 512 | /* XXX use ioremap() instead? */ | ||
| 513 | |||
| 514 | if (found) | ||
| 515 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", | ||
| 516 | oh->name, OMAP2_IO_ADDRESS(mem->pa_start)); | ||
| 517 | else | ||
| 518 | pr_debug("omap_hwmod: %s: no MPU register target found\n", | ||
| 519 | oh->name); | ||
| 520 | |||
| 521 | return (found) ? OMAP2_IO_ADDRESS(mem->pa_start) : NULL; | ||
| 522 | } | ||
| 523 | |||
| 524 | /** | ||
| 525 | * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG | ||
| 526 | * @oh: struct omap_hwmod * | ||
| 527 | * | ||
| 528 | * If module is marked as SWSUP_SIDLE, force the module out of slave | ||
| 529 | * idle; otherwise, configure it for smart-idle. If module is marked | ||
| 530 | * as SWSUP_MSUSPEND, force the module out of master standby; | ||
| 531 | * otherwise, configure it for smart-standby. No return value. | ||
| 532 | */ | ||
| 533 | static void _sysc_enable(struct omap_hwmod *oh) | ||
| 534 | { | ||
| 535 | u8 idlemode; | ||
| 536 | u32 v; | ||
| 537 | |||
| 538 | if (!oh->sysconfig) | ||
| 539 | return; | ||
| 540 | |||
| 541 | v = oh->_sysc_cache; | ||
| 542 | |||
| 543 | if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) { | ||
| 544 | idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? | ||
| 545 | HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; | ||
| 546 | _set_slave_idlemode(oh, idlemode, &v); | ||
| 547 | } | ||
| 548 | |||
| 549 | if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) { | ||
| 550 | idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? | ||
| 551 | HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; | ||
| 552 | _set_master_standbymode(oh, idlemode, &v); | ||
| 553 | } | ||
| 554 | |||
| 555 | /* XXX OCP AUTOIDLE bit? */ | ||
| 556 | |||
| 557 | if (oh->flags & HWMOD_SET_DEFAULT_CLOCKACT && | ||
| 558 | oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY) | ||
| 559 | _set_clockactivity(oh, oh->sysconfig->clockact, &v); | ||
| 560 | |||
| 561 | _write_sysconfig(v, oh); | ||
| 562 | } | ||
| 563 | |||
| 564 | /** | ||
| 565 | * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG | ||
| 566 | * @oh: struct omap_hwmod * | ||
| 567 | * | ||
| 568 | * If module is marked as SWSUP_SIDLE, force the module into slave | ||
| 569 | * idle; otherwise, configure it for smart-idle. If module is marked | ||
| 570 | * as SWSUP_MSUSPEND, force the module into master standby; otherwise, | ||
| 571 | * configure it for smart-standby. No return value. | ||
| 572 | */ | ||
| 573 | static void _sysc_idle(struct omap_hwmod *oh) | ||
| 574 | { | ||
| 575 | u8 idlemode; | ||
| 576 | u32 v; | ||
| 577 | |||
| 578 | if (!oh->sysconfig) | ||
| 579 | return; | ||
| 580 | |||
| 581 | v = oh->_sysc_cache; | ||
| 582 | |||
| 583 | if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) { | ||
| 584 | idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? | ||
| 585 | HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; | ||
| 586 | _set_slave_idlemode(oh, idlemode, &v); | ||
| 587 | } | ||
| 588 | |||
| 589 | if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) { | ||
| 590 | idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? | ||
| 591 | HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; | ||
| 592 | _set_master_standbymode(oh, idlemode, &v); | ||
| 593 | } | ||
| 594 | |||
| 595 | _write_sysconfig(v, oh); | ||
| 596 | } | ||
| 597 | |||
| 598 | /** | ||
| 599 | * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG | ||
| 600 | * @oh: struct omap_hwmod * | ||
| 601 | * | ||
| 602 | * Force the module into slave idle and master suspend. No return | ||
| 603 | * value. | ||
| 604 | */ | ||
| 605 | static void _sysc_shutdown(struct omap_hwmod *oh) | ||
| 606 | { | ||
| 607 | u32 v; | ||
| 608 | |||
| 609 | if (!oh->sysconfig) | ||
| 610 | return; | ||
| 611 | |||
| 612 | v = oh->_sysc_cache; | ||
| 613 | |||
| 614 | if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) | ||
| 615 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); | ||
| 616 | |||
| 617 | if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) | ||
| 618 | _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); | ||
| 619 | |||
| 620 | /* XXX clear OCP AUTOIDLE bit? */ | ||
| 621 | |||
| 622 | _write_sysconfig(v, oh); | ||
| 623 | } | ||
| 624 | |||
| 625 | /** | ||
| 626 | * _lookup - find an omap_hwmod by name | ||
| 627 | * @name: find an omap_hwmod by name | ||
| 628 | * | ||
| 629 | * Return a pointer to an omap_hwmod by name, or NULL if not found. | ||
| 630 | * Caller must hold omap_hwmod_mutex. | ||
| 631 | */ | ||
| 632 | static struct omap_hwmod *_lookup(const char *name) | ||
| 633 | { | ||
| 634 | struct omap_hwmod *oh, *temp_oh; | ||
| 635 | |||
| 636 | oh = NULL; | ||
| 637 | |||
| 638 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | ||
| 639 | if (!strcmp(name, temp_oh->name)) { | ||
| 640 | oh = temp_oh; | ||
| 641 | break; | ||
| 642 | } | ||
| 643 | } | ||
| 644 | |||
| 645 | return oh; | ||
| 646 | } | ||
| 647 | |||
| 648 | /** | ||
| 649 | * _init_clocks - clk_get() all clocks associated with this hwmod | ||
| 650 | * @oh: struct omap_hwmod * | ||
| 651 | * | ||
| 652 | * Called by omap_hwmod_late_init() (after omap2_clk_init()). | ||
| 653 | * Resolves all clock names embedded in the hwmod. Must be called | ||
| 654 | * with omap_hwmod_mutex held. Returns -EINVAL if the omap_hwmod | ||
| 655 | * has not yet been registered or if the clocks have already been | ||
| 656 | * initialized, 0 on success, or a non-zero error on failure. | ||
| 657 | */ | ||
| 658 | static int _init_clocks(struct omap_hwmod *oh) | ||
| 659 | { | ||
| 660 | int ret = 0; | ||
| 661 | |||
| 662 | if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED)) | ||
| 663 | return -EINVAL; | ||
| 664 | |||
| 665 | pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); | ||
| 666 | |||
| 667 | ret |= _init_main_clk(oh); | ||
| 668 | ret |= _init_interface_clks(oh); | ||
| 669 | ret |= _init_opt_clks(oh); | ||
| 670 | |||
| 671 | oh->_state = _HWMOD_STATE_CLKS_INITED; | ||
| 672 | |||
| 673 | return ret; | ||
| 674 | } | ||
| 675 | |||
| 676 | /** | ||
| 677 | * _wait_target_ready - wait for a module to leave slave idle | ||
| 678 | * @oh: struct omap_hwmod * | ||
| 679 | * | ||
| 680 | * Wait for a module @oh to leave slave idle. Returns 0 if the module | ||
| 681 | * does not have an IDLEST bit or if the module successfully leaves | ||
| 682 | * slave idle; otherwise, pass along the return value of the | ||
| 683 | * appropriate *_cm_wait_module_ready() function. | ||
| 684 | */ | ||
| 685 | static int _wait_target_ready(struct omap_hwmod *oh) | ||
| 686 | { | ||
| 687 | struct omap_hwmod_ocp_if *os; | ||
| 688 | int ret; | ||
| 689 | |||
| 690 | if (!oh) | ||
| 691 | return -EINVAL; | ||
| 692 | |||
| 693 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | ||
| 694 | return 0; | ||
| 695 | |||
| 696 | os = *oh->slaves + oh->_mpu_port_index; | ||
| 697 | |||
| 698 | if (!(os->flags & OCPIF_HAS_IDLEST)) | ||
| 699 | return 0; | ||
| 700 | |||
| 701 | /* XXX check module SIDLEMODE */ | ||
| 702 | |||
| 703 | /* XXX check clock enable states */ | ||
| 704 | |||
| 705 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | ||
| 706 | ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, | ||
| 707 | oh->prcm.omap2.idlest_reg_id, | ||
| 708 | oh->prcm.omap2.idlest_idle_bit); | ||
| 709 | #if 0 | ||
| 710 | } else if (cpu_is_omap44xx()) { | ||
| 711 | ret = omap4_cm_wait_module_ready(oh->prcm.omap4.module_offs, | ||
| 712 | oh->prcm.omap4.device_offs); | ||
| 713 | #endif | ||
| 714 | } else { | ||
| 715 | BUG(); | ||
| 716 | }; | ||
| 717 | |||
| 718 | return ret; | ||
| 719 | } | ||
| 720 | |||
| 721 | /** | ||
| 722 | * _reset - reset an omap_hwmod | ||
| 723 | * @oh: struct omap_hwmod * | ||
| 724 | * | ||
| 725 | * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be | ||
| 726 | * enabled for this to work. Must be called with omap_hwmod_mutex | ||
| 727 | * held. Returns -EINVAL if the hwmod cannot be reset this way or if | ||
| 728 | * the hwmod is in the wrong state, -ETIMEDOUT if the module did not | ||
| 729 | * reset in time, or 0 upon success. | ||
| 730 | */ | ||
| 731 | static int _reset(struct omap_hwmod *oh) | ||
| 732 | { | ||
| 733 | u32 r, v; | ||
| 734 | int c; | ||
| 735 | |||
| 736 | if (!oh->sysconfig || | ||
| 737 | !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET) || | ||
| 738 | (oh->sysconfig->sysc_flags & SYSS_MISSING)) | ||
| 739 | return -EINVAL; | ||
| 740 | |||
| 741 | /* clocks must be on for this operation */ | ||
| 742 | if (oh->_state != _HWMOD_STATE_ENABLED) { | ||
| 743 | WARN(1, "omap_hwmod: %s: reset can only be entered from " | ||
| 744 | "enabled state\n", oh->name); | ||
| 745 | return -EINVAL; | ||
| 746 | } | ||
| 747 | |||
| 748 | pr_debug("omap_hwmod: %s: resetting\n", oh->name); | ||
| 749 | |||
| 750 | v = oh->_sysc_cache; | ||
| 751 | r = _set_softreset(oh, &v); | ||
| 752 | if (r) | ||
| 753 | return r; | ||
| 754 | _write_sysconfig(v, oh); | ||
| 755 | |||
| 756 | c = 0; | ||
| 757 | while (c < MAX_MODULE_RESET_WAIT && | ||
| 758 | !(omap_hwmod_readl(oh, oh->sysconfig->syss_offs) & | ||
| 759 | SYSS_RESETDONE_MASK)) { | ||
| 760 | udelay(1); | ||
| 761 | c++; | ||
| 762 | } | ||
| 763 | |||
| 764 | if (c == MAX_MODULE_RESET_WAIT) | ||
| 765 | WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n", | ||
| 766 | oh->name, MAX_MODULE_RESET_WAIT); | ||
| 767 | else | ||
| 768 | pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, c); | ||
| 769 | |||
| 770 | /* | ||
| 771 | * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from | ||
| 772 | * _wait_target_ready() or _reset() | ||
| 773 | */ | ||
| 774 | |||
| 775 | return (c == MAX_MODULE_RESET_WAIT) ? -ETIMEDOUT : 0; | ||
| 776 | } | ||
| 777 | |||
| 778 | /** | ||
| 779 | * _enable - enable an omap_hwmod | ||
| 780 | * @oh: struct omap_hwmod * | ||
| 781 | * | ||
| 782 | * Enables an omap_hwmod @oh such that the MPU can access the hwmod's | ||
| 783 | * register target. Must be called with omap_hwmod_mutex held. | ||
| 784 | * Returns -EINVAL if the hwmod is in the wrong state or passes along | ||
| 785 | * the return value of _wait_target_ready(). | ||
| 786 | */ | ||
| 787 | static int _enable(struct omap_hwmod *oh) | ||
| 788 | { | ||
| 789 | int r; | ||
| 790 | |||
| 791 | if (oh->_state != _HWMOD_STATE_INITIALIZED && | ||
| 792 | oh->_state != _HWMOD_STATE_IDLE && | ||
| 793 | oh->_state != _HWMOD_STATE_DISABLED) { | ||
| 794 | WARN(1, "omap_hwmod: %s: enabled state can only be entered " | ||
| 795 | "from initialized, idle, or disabled state\n", oh->name); | ||
| 796 | return -EINVAL; | ||
| 797 | } | ||
| 798 | |||
| 799 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); | ||
| 800 | |||
| 801 | /* XXX mux balls */ | ||
| 802 | |||
| 803 | _add_initiator_dep(oh, mpu_oh); | ||
| 804 | _enable_clocks(oh); | ||
| 805 | |||
| 806 | if (oh->sysconfig) { | ||
| 807 | if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) | ||
| 808 | _update_sysc_cache(oh); | ||
| 809 | _sysc_enable(oh); | ||
| 810 | } | ||
| 811 | |||
| 812 | r = _wait_target_ready(oh); | ||
| 813 | if (!r) | ||
| 814 | oh->_state = _HWMOD_STATE_ENABLED; | ||
| 815 | |||
| 816 | return r; | ||
| 817 | } | ||
| 818 | |||
| 819 | /** | ||
| 820 | * _idle - idle an omap_hwmod | ||
| 821 | * @oh: struct omap_hwmod * | ||
| 822 | * | ||
| 823 | * Idles an omap_hwmod @oh. This should be called once the hwmod has | ||
| 824 | * no further work. Returns -EINVAL if the hwmod is in the wrong | ||
| 825 | * state or returns 0. | ||
| 826 | */ | ||
| 827 | static int _idle(struct omap_hwmod *oh) | ||
| 828 | { | ||
| 829 | if (oh->_state != _HWMOD_STATE_ENABLED) { | ||
| 830 | WARN(1, "omap_hwmod: %s: idle state can only be entered from " | ||
| 831 | "enabled state\n", oh->name); | ||
| 832 | return -EINVAL; | ||
| 833 | } | ||
| 834 | |||
| 835 | pr_debug("omap_hwmod: %s: idling\n", oh->name); | ||
| 836 | |||
| 837 | if (oh->sysconfig) | ||
| 838 | _sysc_idle(oh); | ||
| 839 | _del_initiator_dep(oh, mpu_oh); | ||
| 840 | _disable_clocks(oh); | ||
| 841 | |||
| 842 | oh->_state = _HWMOD_STATE_IDLE; | ||
| 843 | |||
| 844 | return 0; | ||
| 845 | } | ||
| 846 | |||
| 847 | /** | ||
| 848 | * _shutdown - shutdown an omap_hwmod | ||
| 849 | * @oh: struct omap_hwmod * | ||
| 850 | * | ||
| 851 | * Shut down an omap_hwmod @oh. This should be called when the driver | ||
| 852 | * used for the hwmod is removed or unloaded or if the driver is not | ||
| 853 | * used by the system. Returns -EINVAL if the hwmod is in the wrong | ||
| 854 | * state or returns 0. | ||
| 855 | */ | ||
| 856 | static int _shutdown(struct omap_hwmod *oh) | ||
| 857 | { | ||
| 858 | if (oh->_state != _HWMOD_STATE_IDLE && | ||
| 859 | oh->_state != _HWMOD_STATE_ENABLED) { | ||
| 860 | WARN(1, "omap_hwmod: %s: disabled state can only be entered " | ||
| 861 | "from idle, or enabled state\n", oh->name); | ||
| 862 | return -EINVAL; | ||
| 863 | } | ||
| 864 | |||
| 865 | pr_debug("omap_hwmod: %s: disabling\n", oh->name); | ||
| 866 | |||
| 867 | if (oh->sysconfig) | ||
| 868 | _sysc_shutdown(oh); | ||
| 869 | _del_initiator_dep(oh, mpu_oh); | ||
| 870 | /* XXX what about the other system initiators here? DMA, tesla, d2d */ | ||
| 871 | _disable_clocks(oh); | ||
| 872 | /* XXX Should this code also force-disable the optional clocks? */ | ||
| 873 | |||
| 874 | /* XXX mux any associated balls to safe mode */ | ||
| 875 | |||
| 876 | oh->_state = _HWMOD_STATE_DISABLED; | ||
| 877 | |||
| 878 | return 0; | ||
| 879 | } | ||
| 880 | |||
| 881 | /** | ||
| 882 | * _write_clockact_lock - set the module's clockactivity bits | ||
| 883 | * @oh: struct omap_hwmod * | ||
| 884 | * @clockact: CLOCKACTIVITY field bits | ||
| 885 | * | ||
| 886 | * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh | ||
| 887 | * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the | ||
| 888 | * wrong state or returns 0. | ||
| 889 | */ | ||
| 890 | static int _write_clockact_lock(struct omap_hwmod *oh, u8 clockact) | ||
| 891 | { | ||
| 892 | u32 v; | ||
| 893 | |||
| 894 | if (!oh->sysconfig || | ||
| 895 | !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) | ||
| 896 | return -EINVAL; | ||
| 897 | |||
| 898 | mutex_lock(&omap_hwmod_mutex); | ||
| 899 | v = oh->_sysc_cache; | ||
| 900 | _set_clockactivity(oh, clockact, &v); | ||
| 901 | _write_sysconfig(v, oh); | ||
| 902 | mutex_unlock(&omap_hwmod_mutex); | ||
| 903 | |||
| 904 | return 0; | ||
| 905 | } | ||
| 906 | |||
| 907 | |||
| 908 | /** | ||
| 909 | * _setup - do initial configuration of omap_hwmod | ||
| 910 | * @oh: struct omap_hwmod * | ||
| 911 | * | ||
| 912 | * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh | ||
| 913 | * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex | ||
| 914 | * held. Returns -EINVAL if the hwmod is in the wrong state or returns | ||
| 915 | * 0. | ||
| 916 | */ | ||
| 917 | static int _setup(struct omap_hwmod *oh) | ||
| 918 | { | ||
| 919 | struct omap_hwmod_ocp_if *os; | ||
| 920 | int i; | ||
| 921 | |||
| 922 | if (!oh) | ||
| 923 | return -EINVAL; | ||
| 924 | |||
| 925 | /* Set iclk autoidle mode */ | ||
| 926 | if (oh->slaves_cnt > 0) { | ||
| 927 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | ||
| 928 | struct clk *c = os->_clk; | ||
| 929 | |||
| 930 | if (!c || IS_ERR(c)) | ||
| 931 | continue; | ||
| 932 | |||
| 933 | if (os->flags & OCPIF_SWSUP_IDLE) { | ||
| 934 | /* XXX omap_iclk_deny_idle(c); */ | ||
| 935 | } else { | ||
| 936 | /* XXX omap_iclk_allow_idle(c); */ | ||
| 937 | clk_enable(c); | ||
| 938 | } | ||
| 939 | } | ||
| 940 | } | ||
| 941 | |||
| 942 | oh->_state = _HWMOD_STATE_INITIALIZED; | ||
| 943 | |||
| 944 | _enable(oh); | ||
| 945 | |||
| 946 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) | ||
| 947 | _reset(oh); | ||
| 948 | |||
| 949 | /* XXX OCP AUTOIDLE bit? */ | ||
| 950 | /* XXX OCP ENAWAKEUP bit? */ | ||
| 951 | |||
| 952 | if (!(oh->flags & HWMOD_INIT_NO_IDLE)) | ||
| 953 | _idle(oh); | ||
| 954 | |||
| 955 | return 0; | ||
| 956 | } | ||
| 957 | |||
| 958 | |||
| 959 | |||
| 960 | /* Public functions */ | ||
| 961 | |||
| 962 | u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs) | ||
| 963 | { | ||
| 964 | return __raw_readl(oh->_rt_va + reg_offs); | ||
| 965 | } | ||
| 966 | |||
| 967 | void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs) | ||
| 968 | { | ||
| 969 | __raw_writel(v, oh->_rt_va + reg_offs); | ||
| 970 | } | ||
| 971 | |||
| 972 | /** | ||
| 973 | * omap_hwmod_register - register a struct omap_hwmod | ||
| 974 | * @oh: struct omap_hwmod * | ||
| 975 | * | ||
| 976 | * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod already | ||
| 977 | * has been registered by the same name; -EINVAL if the omap_hwmod is in the | ||
| 978 | * wrong state, or 0 on success. | ||
| 979 | * | ||
| 980 | * XXX The data should be copied into bootmem, so the original data | ||
| 981 | * should be marked __initdata and freed after init. This would allow | ||
| 982 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note | ||
| 983 | * that the copy process would be relatively complex due to the large number | ||
| 984 | * of substructures. | ||
| 985 | */ | ||
| 986 | int omap_hwmod_register(struct omap_hwmod *oh) | ||
| 987 | { | ||
| 988 | int ret, ms_id; | ||
| 989 | |||
| 990 | if (!oh || (oh->_state != _HWMOD_STATE_UNKNOWN)) | ||
| 991 | return -EINVAL; | ||
| 992 | |||
| 993 | mutex_lock(&omap_hwmod_mutex); | ||
| 994 | |||
| 995 | pr_debug("omap_hwmod: %s: registering\n", oh->name); | ||
| 996 | |||
| 997 | if (_lookup(oh->name)) { | ||
| 998 | ret = -EEXIST; | ||
| 999 | goto ohr_unlock; | ||
| 1000 | } | ||
| 1001 | |||
| 1002 | ms_id = _find_mpu_port_index(oh); | ||
| 1003 | if (!IS_ERR_VALUE(ms_id)) { | ||
| 1004 | oh->_mpu_port_index = ms_id; | ||
| 1005 | oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); | ||
| 1006 | } else { | ||
| 1007 | oh->_int_flags |= _HWMOD_NO_MPU_PORT; | ||
| 1008 | } | ||
| 1009 | |||
| 1010 | list_add_tail(&oh->node, &omap_hwmod_list); | ||
| 1011 | |||
| 1012 | oh->_state = _HWMOD_STATE_REGISTERED; | ||
| 1013 | |||
| 1014 | ret = 0; | ||
| 1015 | |||
| 1016 | ohr_unlock: | ||
| 1017 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1018 | return ret; | ||
| 1019 | } | ||
| 1020 | |||
| 1021 | /** | ||
| 1022 | * omap_hwmod_lookup - look up a registered omap_hwmod by name | ||
| 1023 | * @name: name of the omap_hwmod to look up | ||
| 1024 | * | ||
| 1025 | * Given a @name of an omap_hwmod, return a pointer to the registered | ||
| 1026 | * struct omap_hwmod *, or NULL upon error. | ||
| 1027 | */ | ||
| 1028 | struct omap_hwmod *omap_hwmod_lookup(const char *name) | ||
| 1029 | { | ||
| 1030 | struct omap_hwmod *oh; | ||
| 1031 | |||
| 1032 | if (!name) | ||
| 1033 | return NULL; | ||
| 1034 | |||
| 1035 | mutex_lock(&omap_hwmod_mutex); | ||
| 1036 | oh = _lookup(name); | ||
| 1037 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1038 | |||
| 1039 | return oh; | ||
| 1040 | } | ||
| 1041 | |||
| 1042 | /** | ||
| 1043 | * omap_hwmod_for_each - call function for each registered omap_hwmod | ||
| 1044 | * @fn: pointer to a callback function | ||
| 1045 | * | ||
| 1046 | * Call @fn for each registered omap_hwmod, passing @data to each | ||
| 1047 | * function. @fn must return 0 for success or any other value for | ||
| 1048 | * failure. If @fn returns non-zero, the iteration across omap_hwmods | ||
| 1049 | * will stop and the non-zero return value will be passed to the | ||
| 1050 | * caller of omap_hwmod_for_each(). @fn is called with | ||
| 1051 | * omap_hwmod_for_each() held. | ||
| 1052 | */ | ||
| 1053 | int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)) | ||
| 1054 | { | ||
| 1055 | struct omap_hwmod *temp_oh; | ||
| 1056 | int ret; | ||
| 1057 | |||
| 1058 | if (!fn) | ||
| 1059 | return -EINVAL; | ||
| 1060 | |||
| 1061 | mutex_lock(&omap_hwmod_mutex); | ||
| 1062 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | ||
| 1063 | ret = (*fn)(temp_oh); | ||
| 1064 | if (ret) | ||
| 1065 | break; | ||
| 1066 | } | ||
| 1067 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1068 | |||
| 1069 | return ret; | ||
| 1070 | } | ||
| 1071 | |||
| 1072 | |||
| 1073 | /** | ||
| 1074 | * omap_hwmod_init - init omap_hwmod code and register hwmods | ||
| 1075 | * @ohs: pointer to an array of omap_hwmods to register | ||
| 1076 | * | ||
| 1077 | * Intended to be called early in boot before the clock framework is | ||
| 1078 | * initialized. If @ohs is not null, will register all omap_hwmods | ||
| 1079 | * listed in @ohs that are valid for this chip. Returns -EINVAL if | ||
| 1080 | * omap_hwmod_init() has already been called or 0 otherwise. | ||
| 1081 | */ | ||
| 1082 | int omap_hwmod_init(struct omap_hwmod **ohs) | ||
| 1083 | { | ||
| 1084 | struct omap_hwmod *oh; | ||
| 1085 | int r; | ||
| 1086 | |||
| 1087 | if (inited) | ||
| 1088 | return -EINVAL; | ||
| 1089 | |||
| 1090 | inited = 1; | ||
| 1091 | |||
| 1092 | if (!ohs) | ||
| 1093 | return 0; | ||
| 1094 | |||
| 1095 | oh = *ohs; | ||
| 1096 | while (oh) { | ||
| 1097 | if (omap_chip_is(oh->omap_chip)) { | ||
| 1098 | r = omap_hwmod_register(oh); | ||
| 1099 | WARN(r, "omap_hwmod: %s: omap_hwmod_register returned " | ||
| 1100 | "%d\n", oh->name, r); | ||
| 1101 | } | ||
| 1102 | oh = *++ohs; | ||
| 1103 | } | ||
| 1104 | |||
| 1105 | return 0; | ||
| 1106 | } | ||
| 1107 | |||
| 1108 | /** | ||
| 1109 | * omap_hwmod_late_init - do some post-clock framework initialization | ||
| 1110 | * | ||
| 1111 | * Must be called after omap2_clk_init(). Resolves the struct clk names | ||
| 1112 | * to struct clk pointers for each registered omap_hwmod. Also calls | ||
| 1113 | * _setup() on each hwmod. Returns 0. | ||
| 1114 | */ | ||
| 1115 | int omap_hwmod_late_init(void) | ||
| 1116 | { | ||
| 1117 | int r; | ||
| 1118 | |||
| 1119 | /* XXX check return value */ | ||
| 1120 | r = omap_hwmod_for_each(_init_clocks); | ||
| 1121 | WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n"); | ||
| 1122 | |||
| 1123 | mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME); | ||
| 1124 | WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n", | ||
| 1125 | MPU_INITIATOR_NAME); | ||
| 1126 | |||
| 1127 | omap_hwmod_for_each(_setup); | ||
| 1128 | |||
| 1129 | return 0; | ||
| 1130 | } | ||
| 1131 | |||
| 1132 | /** | ||
| 1133 | * omap_hwmod_unregister - unregister an omap_hwmod | ||
| 1134 | * @oh: struct omap_hwmod * | ||
| 1135 | * | ||
| 1136 | * Unregisters a previously-registered omap_hwmod @oh. There's probably | ||
| 1137 | * no use case for this, so it is likely to be removed in a later version. | ||
| 1138 | * | ||
| 1139 | * XXX Free all of the bootmem-allocated structures here when that is | ||
| 1140 | * implemented. Make it clear that core code is the only code that is | ||
| 1141 | * expected to unregister modules. | ||
| 1142 | */ | ||
| 1143 | int omap_hwmod_unregister(struct omap_hwmod *oh) | ||
| 1144 | { | ||
| 1145 | if (!oh) | ||
| 1146 | return -EINVAL; | ||
| 1147 | |||
| 1148 | pr_debug("omap_hwmod: %s: unregistering\n", oh->name); | ||
| 1149 | |||
| 1150 | mutex_lock(&omap_hwmod_mutex); | ||
| 1151 | list_del(&oh->node); | ||
| 1152 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1153 | |||
| 1154 | return 0; | ||
| 1155 | } | ||
| 1156 | |||
| 1157 | /** | ||
| 1158 | * omap_hwmod_enable - enable an omap_hwmod | ||
| 1159 | * @oh: struct omap_hwmod * | ||
| 1160 | * | ||
| 1161 | * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable(). | ||
| 1162 | * Returns -EINVAL on error or passes along the return value from _enable(). | ||
| 1163 | */ | ||
| 1164 | int omap_hwmod_enable(struct omap_hwmod *oh) | ||
| 1165 | { | ||
| 1166 | int r; | ||
| 1167 | |||
| 1168 | if (!oh) | ||
| 1169 | return -EINVAL; | ||
| 1170 | |||
| 1171 | mutex_lock(&omap_hwmod_mutex); | ||
| 1172 | r = _enable(oh); | ||
| 1173 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1174 | |||
| 1175 | return r; | ||
| 1176 | } | ||
| 1177 | |||
| 1178 | /** | ||
| 1179 | * omap_hwmod_idle - idle an omap_hwmod | ||
| 1180 | * @oh: struct omap_hwmod * | ||
| 1181 | * | ||
| 1182 | * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle(). | ||
| 1183 | * Returns -EINVAL on error or passes along the return value from _idle(). | ||
| 1184 | */ | ||
| 1185 | int omap_hwmod_idle(struct omap_hwmod *oh) | ||
| 1186 | { | ||
| 1187 | if (!oh) | ||
| 1188 | return -EINVAL; | ||
| 1189 | |||
| 1190 | mutex_lock(&omap_hwmod_mutex); | ||
| 1191 | _idle(oh); | ||
| 1192 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1193 | |||
| 1194 | return 0; | ||
| 1195 | } | ||
| 1196 | |||
| 1197 | /** | ||
| 1198 | * omap_hwmod_shutdown - shutdown an omap_hwmod | ||
| 1199 | * @oh: struct omap_hwmod * | ||
| 1200 | * | ||
| 1201 | * Shutdown an omap_hwomd @oh. Intended to be called by | ||
| 1202 | * omap_device_shutdown(). Returns -EINVAL on error or passes along | ||
| 1203 | * the return value from _shutdown(). | ||
| 1204 | */ | ||
| 1205 | int omap_hwmod_shutdown(struct omap_hwmod *oh) | ||
| 1206 | { | ||
| 1207 | if (!oh) | ||
| 1208 | return -EINVAL; | ||
| 1209 | |||
| 1210 | mutex_lock(&omap_hwmod_mutex); | ||
| 1211 | _shutdown(oh); | ||
| 1212 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1213 | |||
| 1214 | return 0; | ||
| 1215 | } | ||
| 1216 | |||
| 1217 | /** | ||
| 1218 | * omap_hwmod_enable_clocks - enable main_clk, all interface clocks | ||
| 1219 | * @oh: struct omap_hwmod *oh | ||
| 1220 | * | ||
| 1221 | * Intended to be called by the omap_device code. | ||
| 1222 | */ | ||
| 1223 | int omap_hwmod_enable_clocks(struct omap_hwmod *oh) | ||
| 1224 | { | ||
| 1225 | mutex_lock(&omap_hwmod_mutex); | ||
| 1226 | _enable_clocks(oh); | ||
| 1227 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1228 | |||
| 1229 | return 0; | ||
| 1230 | } | ||
| 1231 | |||
| 1232 | /** | ||
| 1233 | * omap_hwmod_disable_clocks - disable main_clk, all interface clocks | ||
| 1234 | * @oh: struct omap_hwmod *oh | ||
| 1235 | * | ||
| 1236 | * Intended to be called by the omap_device code. | ||
| 1237 | */ | ||
| 1238 | int omap_hwmod_disable_clocks(struct omap_hwmod *oh) | ||
| 1239 | { | ||
| 1240 | mutex_lock(&omap_hwmod_mutex); | ||
| 1241 | _disable_clocks(oh); | ||
| 1242 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1243 | |||
| 1244 | return 0; | ||
| 1245 | } | ||
| 1246 | |||
| 1247 | /** | ||
| 1248 | * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete | ||
| 1249 | * @oh: struct omap_hwmod *oh | ||
| 1250 | * | ||
| 1251 | * Intended to be called by drivers and core code when all posted | ||
| 1252 | * writes to a device must complete before continuing further | ||
| 1253 | * execution (for example, after clearing some device IRQSTATUS | ||
| 1254 | * register bits) | ||
| 1255 | * | ||
| 1256 | * XXX what about targets with multiple OCP threads? | ||
| 1257 | */ | ||
| 1258 | void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) | ||
| 1259 | { | ||
| 1260 | BUG_ON(!oh); | ||
| 1261 | |||
| 1262 | if (!oh->sysconfig || !oh->sysconfig->sysc_flags) { | ||
| 1263 | WARN(1, "omap_device: %s: OCP barrier impossible due to " | ||
| 1264 | "device configuration\n", oh->name); | ||
| 1265 | return; | ||
| 1266 | } | ||
| 1267 | |||
| 1268 | /* | ||
| 1269 | * Forces posted writes to complete on the OCP thread handling | ||
| 1270 | * register writes | ||
| 1271 | */ | ||
| 1272 | omap_hwmod_readl(oh, oh->sysconfig->sysc_offs); | ||
| 1273 | } | ||
| 1274 | |||
| 1275 | /** | ||
| 1276 | * omap_hwmod_reset - reset the hwmod | ||
| 1277 | * @oh: struct omap_hwmod * | ||
| 1278 | * | ||
| 1279 | * Under some conditions, a driver may wish to reset the entire device. | ||
| 1280 | * Called from omap_device code. Returns -EINVAL on error or passes along | ||
| 1281 | * the return value from _reset()/_enable(). | ||
| 1282 | */ | ||
| 1283 | int omap_hwmod_reset(struct omap_hwmod *oh) | ||
| 1284 | { | ||
| 1285 | int r; | ||
| 1286 | |||
| 1287 | if (!oh || !(oh->_state & _HWMOD_STATE_ENABLED)) | ||
| 1288 | return -EINVAL; | ||
| 1289 | |||
| 1290 | mutex_lock(&omap_hwmod_mutex); | ||
| 1291 | r = _reset(oh); | ||
| 1292 | if (!r) | ||
| 1293 | r = _enable(oh); | ||
| 1294 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1295 | |||
| 1296 | return r; | ||
| 1297 | } | ||
| 1298 | |||
| 1299 | /** | ||
| 1300 | * omap_hwmod_count_resources - count number of struct resources needed by hwmod | ||
| 1301 | * @oh: struct omap_hwmod * | ||
| 1302 | * @res: pointer to the first element of an array of struct resource to fill | ||
| 1303 | * | ||
| 1304 | * Count the number of struct resource array elements necessary to | ||
| 1305 | * contain omap_hwmod @oh resources. Intended to be called by code | ||
| 1306 | * that registers omap_devices. Intended to be used to determine the | ||
| 1307 | * size of a dynamically-allocated struct resource array, before | ||
| 1308 | * calling omap_hwmod_fill_resources(). Returns the number of struct | ||
| 1309 | * resource array elements needed. | ||
| 1310 | * | ||
| 1311 | * XXX This code is not optimized. It could attempt to merge adjacent | ||
| 1312 | * resource IDs. | ||
| 1313 | * | ||
| 1314 | */ | ||
| 1315 | int omap_hwmod_count_resources(struct omap_hwmod *oh) | ||
| 1316 | { | ||
| 1317 | int ret, i; | ||
| 1318 | |||
| 1319 | ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt; | ||
| 1320 | |||
| 1321 | for (i = 0; i < oh->slaves_cnt; i++) | ||
| 1322 | ret += (*oh->slaves + i)->addr_cnt; | ||
| 1323 | |||
| 1324 | return ret; | ||
| 1325 | } | ||
| 1326 | |||
| 1327 | /** | ||
| 1328 | * omap_hwmod_fill_resources - fill struct resource array with hwmod data | ||
| 1329 | * @oh: struct omap_hwmod * | ||
| 1330 | * @res: pointer to the first element of an array of struct resource to fill | ||
| 1331 | * | ||
| 1332 | * Fill the struct resource array @res with resource data from the | ||
| 1333 | * omap_hwmod @oh. Intended to be called by code that registers | ||
| 1334 | * omap_devices. See also omap_hwmod_count_resources(). Returns the | ||
| 1335 | * number of array elements filled. | ||
| 1336 | */ | ||
| 1337 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | ||
| 1338 | { | ||
| 1339 | int i, j; | ||
| 1340 | int r = 0; | ||
| 1341 | |||
| 1342 | /* For each IRQ, DMA, memory area, fill in array.*/ | ||
| 1343 | |||
| 1344 | for (i = 0; i < oh->mpu_irqs_cnt; i++) { | ||
| 1345 | (res + r)->start = *(oh->mpu_irqs + i); | ||
| 1346 | (res + r)->end = *(oh->mpu_irqs + i); | ||
| 1347 | (res + r)->flags = IORESOURCE_IRQ; | ||
| 1348 | r++; | ||
| 1349 | } | ||
| 1350 | |||
| 1351 | for (i = 0; i < oh->sdma_chs_cnt; i++) { | ||
| 1352 | (res + r)->name = (oh->sdma_chs + i)->name; | ||
| 1353 | (res + r)->start = (oh->sdma_chs + i)->dma_ch; | ||
| 1354 | (res + r)->end = (oh->sdma_chs + i)->dma_ch; | ||
| 1355 | (res + r)->flags = IORESOURCE_DMA; | ||
| 1356 | r++; | ||
| 1357 | } | ||
| 1358 | |||
| 1359 | for (i = 0; i < oh->slaves_cnt; i++) { | ||
| 1360 | struct omap_hwmod_ocp_if *os; | ||
| 1361 | |||
| 1362 | os = *oh->slaves + i; | ||
| 1363 | |||
| 1364 | for (j = 0; j < os->addr_cnt; j++) { | ||
| 1365 | (res + r)->start = (os->addr + j)->pa_start; | ||
| 1366 | (res + r)->end = (os->addr + j)->pa_end; | ||
| 1367 | (res + r)->flags = IORESOURCE_MEM; | ||
| 1368 | r++; | ||
| 1369 | } | ||
| 1370 | } | ||
| 1371 | |||
| 1372 | return r; | ||
| 1373 | } | ||
| 1374 | |||
| 1375 | /** | ||
| 1376 | * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain | ||
| 1377 | * @oh: struct omap_hwmod * | ||
| 1378 | * | ||
| 1379 | * Return the powerdomain pointer associated with the OMAP module | ||
| 1380 | * @oh's main clock. If @oh does not have a main clk, return the | ||
| 1381 | * powerdomain associated with the interface clock associated with the | ||
| 1382 | * module's MPU port. (XXX Perhaps this should use the SDMA port | ||
| 1383 | * instead?) Returns NULL on error, or a struct powerdomain * on | ||
| 1384 | * success. | ||
| 1385 | */ | ||
| 1386 | struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) | ||
| 1387 | { | ||
| 1388 | struct clk *c; | ||
| 1389 | |||
| 1390 | if (!oh) | ||
| 1391 | return NULL; | ||
| 1392 | |||
| 1393 | if (oh->_clk) { | ||
| 1394 | c = oh->_clk; | ||
| 1395 | } else { | ||
| 1396 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | ||
| 1397 | return NULL; | ||
| 1398 | c = oh->slaves[oh->_mpu_port_index]->_clk; | ||
| 1399 | } | ||
| 1400 | |||
| 1401 | return c->clkdm->pwrdm.ptr; | ||
| 1402 | |||
| 1403 | } | ||
| 1404 | |||
| 1405 | /** | ||
| 1406 | * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh | ||
| 1407 | * @oh: struct omap_hwmod * | ||
| 1408 | * @init_oh: struct omap_hwmod * (initiator) | ||
| 1409 | * | ||
| 1410 | * Add a sleep dependency between the initiator @init_oh and @oh. | ||
| 1411 | * Intended to be called by DSP/Bridge code via platform_data for the | ||
| 1412 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge | ||
| 1413 | * code needs to add/del initiator dependencies dynamically | ||
| 1414 | * before/after accessing a device. Returns the return value from | ||
| 1415 | * _add_initiator_dep(). | ||
| 1416 | * | ||
| 1417 | * XXX Keep a usecount in the clockdomain code | ||
| 1418 | */ | ||
| 1419 | int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, | ||
| 1420 | struct omap_hwmod *init_oh) | ||
| 1421 | { | ||
| 1422 | return _add_initiator_dep(oh, init_oh); | ||
| 1423 | } | ||
| 1424 | |||
| 1425 | /* | ||
| 1426 | * XXX what about functions for drivers to save/restore ocp_sysconfig | ||
| 1427 | * for context save/restore operations? | ||
| 1428 | */ | ||
| 1429 | |||
| 1430 | /** | ||
| 1431 | * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh | ||
| 1432 | * @oh: struct omap_hwmod * | ||
| 1433 | * @init_oh: struct omap_hwmod * (initiator) | ||
| 1434 | * | ||
| 1435 | * Remove a sleep dependency between the initiator @init_oh and @oh. | ||
| 1436 | * Intended to be called by DSP/Bridge code via platform_data for the | ||
| 1437 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge | ||
| 1438 | * code needs to add/del initiator dependencies dynamically | ||
| 1439 | * before/after accessing a device. Returns the return value from | ||
| 1440 | * _del_initiator_dep(). | ||
| 1441 | * | ||
| 1442 | * XXX Keep a usecount in the clockdomain code | ||
| 1443 | */ | ||
| 1444 | int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, | ||
| 1445 | struct omap_hwmod *init_oh) | ||
| 1446 | { | ||
| 1447 | return _del_initiator_dep(oh, init_oh); | ||
| 1448 | } | ||
| 1449 | |||
| 1450 | /** | ||
| 1451 | * omap_hwmod_set_clockact_none - set clockactivity test to BOTH | ||
| 1452 | * @oh: struct omap_hwmod * | ||
| 1453 | * | ||
| 1454 | * On some modules, this function can affect the wakeup latency vs. | ||
| 1455 | * power consumption balance. Intended to be called by the | ||
| 1456 | * omap_device layer. Passes along the return value from | ||
| 1457 | * _write_clockact_lock(). | ||
| 1458 | */ | ||
| 1459 | int omap_hwmod_set_clockact_both(struct omap_hwmod *oh) | ||
| 1460 | { | ||
| 1461 | return _write_clockact_lock(oh, CLOCKACT_TEST_BOTH); | ||
| 1462 | } | ||
| 1463 | |||
| 1464 | /** | ||
| 1465 | * omap_hwmod_set_clockact_none - set clockactivity test to MAIN | ||
| 1466 | * @oh: struct omap_hwmod * | ||
| 1467 | * | ||
| 1468 | * On some modules, this function can affect the wakeup latency vs. | ||
| 1469 | * power consumption balance. Intended to be called by the | ||
| 1470 | * omap_device layer. Passes along the return value from | ||
| 1471 | * _write_clockact_lock(). | ||
| 1472 | */ | ||
| 1473 | int omap_hwmod_set_clockact_main(struct omap_hwmod *oh) | ||
| 1474 | { | ||
| 1475 | return _write_clockact_lock(oh, CLOCKACT_TEST_MAIN); | ||
| 1476 | } | ||
| 1477 | |||
| 1478 | /** | ||
| 1479 | * omap_hwmod_set_clockact_none - set clockactivity test to ICLK | ||
| 1480 | * @oh: struct omap_hwmod * | ||
| 1481 | * | ||
| 1482 | * On some modules, this function can affect the wakeup latency vs. | ||
| 1483 | * power consumption balance. Intended to be called by the | ||
| 1484 | * omap_device layer. Passes along the return value from | ||
| 1485 | * _write_clockact_lock(). | ||
| 1486 | */ | ||
| 1487 | int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh) | ||
| 1488 | { | ||
| 1489 | return _write_clockact_lock(oh, CLOCKACT_TEST_ICLK); | ||
| 1490 | } | ||
| 1491 | |||
| 1492 | /** | ||
| 1493 | * omap_hwmod_set_clockact_none - set clockactivity test to NONE | ||
| 1494 | * @oh: struct omap_hwmod * | ||
| 1495 | * | ||
| 1496 | * On some modules, this function can affect the wakeup latency vs. | ||
| 1497 | * power consumption balance. Intended to be called by the | ||
| 1498 | * omap_device layer. Passes along the return value from | ||
| 1499 | * _write_clockact_lock(). | ||
| 1500 | */ | ||
| 1501 | int omap_hwmod_set_clockact_none(struct omap_hwmod *oh) | ||
| 1502 | { | ||
| 1503 | return _write_clockact_lock(oh, CLOCKACT_TEST_NONE); | ||
| 1504 | } | ||
| 1505 | |||
| 1506 | /** | ||
| 1507 | * omap_hwmod_enable_wakeup - allow device to wake up the system | ||
| 1508 | * @oh: struct omap_hwmod * | ||
| 1509 | * | ||
| 1510 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to | ||
| 1511 | * send wakeups to the PRCM. Eventually this should sets PRCM wakeup | ||
| 1512 | * registers to cause the PRCM to receive wakeup events from the | ||
| 1513 | * module. Does not set any wakeup routing registers beyond this | ||
| 1514 | * point - if the module is to wake up any other module or subsystem, | ||
| 1515 | * that must be set separately. Called by omap_device code. Returns | ||
| 1516 | * -EINVAL on error or 0 upon success. | ||
| 1517 | */ | ||
| 1518 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) | ||
| 1519 | { | ||
| 1520 | if (!oh->sysconfig || | ||
| 1521 | !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) | ||
| 1522 | return -EINVAL; | ||
| 1523 | |||
| 1524 | mutex_lock(&omap_hwmod_mutex); | ||
| 1525 | _enable_wakeup(oh); | ||
| 1526 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1527 | |||
| 1528 | return 0; | ||
| 1529 | } | ||
| 1530 | |||
| 1531 | /** | ||
| 1532 | * omap_hwmod_disable_wakeup - prevent device from waking the system | ||
| 1533 | * @oh: struct omap_hwmod * | ||
| 1534 | * | ||
| 1535 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module | ||
| 1536 | * from sending wakeups to the PRCM. Eventually this should clear | ||
| 1537 | * PRCM wakeup registers to cause the PRCM to ignore wakeup events | ||
| 1538 | * from the module. Does not set any wakeup routing registers beyond | ||
| 1539 | * this point - if the module is to wake up any other module or | ||
| 1540 | * subsystem, that must be set separately. Called by omap_device | ||
| 1541 | * code. Returns -EINVAL on error or 0 upon success. | ||
| 1542 | */ | ||
| 1543 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) | ||
| 1544 | { | ||
| 1545 | if (!oh->sysconfig || | ||
| 1546 | !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP)) | ||
| 1547 | return -EINVAL; | ||
| 1548 | |||
| 1549 | mutex_lock(&omap_hwmod_mutex); | ||
| 1550 | _disable_wakeup(oh); | ||
| 1551 | mutex_unlock(&omap_hwmod_mutex); | ||
| 1552 | |||
| 1553 | return 0; | ||
| 1554 | } | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420.h b/arch/arm/mach-omap2/omap_hwmod_2420.h new file mode 100644 index 000000000000..767e4965ac4e --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2420.h | |||
| @@ -0,0 +1,141 @@ | |||
| 1 | /* | ||
| 2 | * omap_hwmod_2420.h - hardware modules present on the OMAP2420 chips | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | * XXX handle crossbar/shared link difference for L3? | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H | ||
| 15 | #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H | ||
| 16 | |||
| 17 | #ifdef CONFIG_ARCH_OMAP2420 | ||
| 18 | |||
| 19 | #include <mach/omap_hwmod.h> | ||
| 20 | #include <mach/irqs.h> | ||
| 21 | #include <mach/cpu.h> | ||
| 22 | #include <mach/dma.h> | ||
| 23 | |||
| 24 | #include "prm-regbits-24xx.h" | ||
| 25 | |||
| 26 | static struct omap_hwmod omap2420_mpu_hwmod; | ||
| 27 | static struct omap_hwmod omap2420_l3_hwmod; | ||
| 28 | static struct omap_hwmod omap2420_l4_core_hwmod; | ||
| 29 | |||
| 30 | /* L3 -> L4_CORE interface */ | ||
| 31 | static struct omap_hwmod_ocp_if omap2420_l3__l4_core = { | ||
| 32 | .master = &omap2420_l3_hwmod, | ||
| 33 | .slave = &omap2420_l4_core_hwmod, | ||
| 34 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 35 | }; | ||
| 36 | |||
| 37 | /* MPU -> L3 interface */ | ||
| 38 | static struct omap_hwmod_ocp_if omap2420_mpu__l3 = { | ||
| 39 | .master = &omap2420_mpu_hwmod, | ||
| 40 | .slave = &omap2420_l3_hwmod, | ||
| 41 | .user = OCP_USER_MPU, | ||
| 42 | }; | ||
| 43 | |||
| 44 | /* Slave interfaces on the L3 interconnect */ | ||
| 45 | static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = { | ||
| 46 | &omap2420_mpu__l3, | ||
| 47 | }; | ||
| 48 | |||
| 49 | /* Master interfaces on the L3 interconnect */ | ||
| 50 | static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = { | ||
| 51 | &omap2420_l3__l4_core, | ||
| 52 | }; | ||
| 53 | |||
| 54 | /* L3 */ | ||
| 55 | static struct omap_hwmod omap2420_l3_hwmod = { | ||
| 56 | .name = "l3_hwmod", | ||
| 57 | .masters = omap2420_l3_masters, | ||
| 58 | .masters_cnt = ARRAY_SIZE(omap2420_l3_masters), | ||
| 59 | .slaves = omap2420_l3_slaves, | ||
| 60 | .slaves_cnt = ARRAY_SIZE(omap2420_l3_slaves), | ||
| 61 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct omap_hwmod omap2420_l4_wkup_hwmod; | ||
| 65 | |||
| 66 | /* L4_CORE -> L4_WKUP interface */ | ||
| 67 | static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { | ||
| 68 | .master = &omap2420_l4_core_hwmod, | ||
| 69 | .slave = &omap2420_l4_wkup_hwmod, | ||
| 70 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 71 | }; | ||
| 72 | |||
| 73 | /* Slave interfaces on the L4_CORE interconnect */ | ||
| 74 | static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = { | ||
| 75 | &omap2420_l3__l4_core, | ||
| 76 | }; | ||
| 77 | |||
| 78 | /* Master interfaces on the L4_CORE interconnect */ | ||
| 79 | static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = { | ||
| 80 | &omap2420_l4_core__l4_wkup, | ||
| 81 | }; | ||
| 82 | |||
| 83 | /* L4 CORE */ | ||
| 84 | static struct omap_hwmod omap2420_l4_core_hwmod = { | ||
| 85 | .name = "l4_core_hwmod", | ||
| 86 | .masters = omap2420_l4_core_masters, | ||
| 87 | .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters), | ||
| 88 | .slaves = omap2420_l4_core_slaves, | ||
| 89 | .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves), | ||
| 90 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 91 | }; | ||
| 92 | |||
| 93 | /* Slave interfaces on the L4_WKUP interconnect */ | ||
| 94 | static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = { | ||
| 95 | &omap2420_l4_core__l4_wkup, | ||
| 96 | }; | ||
| 97 | |||
| 98 | /* Master interfaces on the L4_WKUP interconnect */ | ||
| 99 | static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = { | ||
| 100 | }; | ||
| 101 | |||
| 102 | /* L4 WKUP */ | ||
| 103 | static struct omap_hwmod omap2420_l4_wkup_hwmod = { | ||
| 104 | .name = "l4_wkup_hwmod", | ||
| 105 | .masters = omap2420_l4_wkup_masters, | ||
| 106 | .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters), | ||
| 107 | .slaves = omap2420_l4_wkup_slaves, | ||
| 108 | .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves), | ||
| 109 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 110 | }; | ||
| 111 | |||
| 112 | /* Master interfaces on the MPU device */ | ||
| 113 | static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = { | ||
| 114 | &omap2420_mpu__l3, | ||
| 115 | }; | ||
| 116 | |||
| 117 | /* MPU */ | ||
| 118 | static struct omap_hwmod omap2420_mpu_hwmod = { | ||
| 119 | .name = "mpu_hwmod", | ||
| 120 | .clkdev_dev_id = NULL, | ||
| 121 | .clkdev_con_id = "mpu_ck", | ||
| 122 | .masters = omap2420_mpu_masters, | ||
| 123 | .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters), | ||
| 124 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 125 | }; | ||
| 126 | |||
| 127 | static __initdata struct omap_hwmod *omap2420_hwmods[] = { | ||
| 128 | &omap2420_l3_hwmod, | ||
| 129 | &omap2420_l4_core_hwmod, | ||
| 130 | &omap2420_l4_wkup_hwmod, | ||
| 131 | &omap2420_mpu_hwmod, | ||
| 132 | NULL, | ||
| 133 | }; | ||
| 134 | |||
| 135 | #else | ||
| 136 | # define omap2420_hwmods 0 | ||
| 137 | #endif | ||
| 138 | |||
| 139 | #endif | ||
| 140 | |||
| 141 | |||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h new file mode 100644 index 000000000000..a412be6420ec --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_2430.h | |||
| @@ -0,0 +1,143 @@ | |||
| 1 | /* | ||
| 2 | * omap_hwmod_2430.h - hardware modules present on the OMAP2430 chips | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | * XXX handle crossbar/shared link difference for L3? | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H | ||
| 15 | #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H | ||
| 16 | |||
| 17 | #ifdef CONFIG_ARCH_OMAP2430 | ||
| 18 | |||
| 19 | #include <mach/omap_hwmod.h> | ||
| 20 | #include <mach/irqs.h> | ||
| 21 | #include <mach/cpu.h> | ||
| 22 | #include <mach/dma.h> | ||
| 23 | |||
| 24 | #include "prm-regbits-24xx.h" | ||
| 25 | |||
| 26 | static struct omap_hwmod omap2430_mpu_hwmod; | ||
| 27 | static struct omap_hwmod omap2430_l3_hwmod; | ||
| 28 | static struct omap_hwmod omap2430_l4_core_hwmod; | ||
| 29 | |||
| 30 | /* L3 -> L4_CORE interface */ | ||
| 31 | static struct omap_hwmod_ocp_if omap2430_l3__l4_core = { | ||
| 32 | .master = &omap2430_l3_hwmod, | ||
| 33 | .slave = &omap2430_l4_core_hwmod, | ||
| 34 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 35 | }; | ||
| 36 | |||
| 37 | /* MPU -> L3 interface */ | ||
| 38 | static struct omap_hwmod_ocp_if omap2430_mpu__l3 = { | ||
| 39 | .master = &omap2430_mpu_hwmod, | ||
| 40 | .slave = &omap2430_l3_hwmod, | ||
| 41 | .user = OCP_USER_MPU, | ||
| 42 | }; | ||
| 43 | |||
| 44 | /* Slave interfaces on the L3 interconnect */ | ||
| 45 | static struct omap_hwmod_ocp_if *omap2430_l3_slaves[] = { | ||
| 46 | &omap2430_mpu__l3, | ||
| 47 | }; | ||
| 48 | |||
| 49 | /* Master interfaces on the L3 interconnect */ | ||
| 50 | static struct omap_hwmod_ocp_if *omap2430_l3_masters[] = { | ||
| 51 | &omap2430_l3__l4_core, | ||
| 52 | }; | ||
| 53 | |||
| 54 | /* L3 */ | ||
| 55 | static struct omap_hwmod omap2430_l3_hwmod = { | ||
| 56 | .name = "l3_hwmod", | ||
| 57 | .masters = omap2430_l3_masters, | ||
| 58 | .masters_cnt = ARRAY_SIZE(omap2430_l3_masters), | ||
| 59 | .slaves = omap2430_l3_slaves, | ||
| 60 | .slaves_cnt = ARRAY_SIZE(omap2430_l3_slaves), | ||
| 61 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 62 | }; | ||
| 63 | |||
| 64 | static struct omap_hwmod omap2430_l4_wkup_hwmod; | ||
| 65 | static struct omap_hwmod omap2430_mmc1_hwmod; | ||
| 66 | static struct omap_hwmod omap2430_mmc2_hwmod; | ||
| 67 | |||
| 68 | /* L4_CORE -> L4_WKUP interface */ | ||
| 69 | static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { | ||
| 70 | .master = &omap2430_l4_core_hwmod, | ||
| 71 | .slave = &omap2430_l4_wkup_hwmod, | ||
| 72 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 73 | }; | ||
| 74 | |||
| 75 | /* Slave interfaces on the L4_CORE interconnect */ | ||
| 76 | static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { | ||
| 77 | &omap2430_l3__l4_core, | ||
| 78 | }; | ||
| 79 | |||
| 80 | /* Master interfaces on the L4_CORE interconnect */ | ||
| 81 | static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { | ||
| 82 | &omap2430_l4_core__l4_wkup, | ||
| 83 | }; | ||
| 84 | |||
| 85 | /* L4 CORE */ | ||
| 86 | static struct omap_hwmod omap2430_l4_core_hwmod = { | ||
| 87 | .name = "l4_core_hwmod", | ||
| 88 | .masters = omap2430_l4_core_masters, | ||
| 89 | .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), | ||
| 90 | .slaves = omap2430_l4_core_slaves, | ||
| 91 | .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), | ||
| 92 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 93 | }; | ||
| 94 | |||
| 95 | /* Slave interfaces on the L4_WKUP interconnect */ | ||
| 96 | static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { | ||
| 97 | &omap2430_l4_core__l4_wkup, | ||
| 98 | }; | ||
| 99 | |||
| 100 | /* Master interfaces on the L4_WKUP interconnect */ | ||
| 101 | static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { | ||
| 102 | }; | ||
| 103 | |||
| 104 | /* L4 WKUP */ | ||
| 105 | static struct omap_hwmod omap2430_l4_wkup_hwmod = { | ||
| 106 | .name = "l4_wkup_hwmod", | ||
| 107 | .masters = omap2430_l4_wkup_masters, | ||
| 108 | .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), | ||
| 109 | .slaves = omap2430_l4_wkup_slaves, | ||
| 110 | .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), | ||
| 111 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 112 | }; | ||
| 113 | |||
| 114 | /* Master interfaces on the MPU device */ | ||
| 115 | static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { | ||
| 116 | &omap2430_mpu__l3, | ||
| 117 | }; | ||
| 118 | |||
| 119 | /* MPU */ | ||
| 120 | static struct omap_hwmod omap2430_mpu_hwmod = { | ||
| 121 | .name = "mpu_hwmod", | ||
| 122 | .clkdev_dev_id = NULL, | ||
| 123 | .clkdev_con_id = "mpu_ck", | ||
| 124 | .masters = omap2430_mpu_masters, | ||
| 125 | .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), | ||
| 126 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 127 | }; | ||
| 128 | |||
| 129 | static __initdata struct omap_hwmod *omap2430_hwmods[] = { | ||
| 130 | &omap2430_l3_hwmod, | ||
| 131 | &omap2430_l4_core_hwmod, | ||
| 132 | &omap2430_l4_wkup_hwmod, | ||
| 133 | &omap2430_mpu_hwmod, | ||
| 134 | NULL, | ||
| 135 | }; | ||
| 136 | |||
| 137 | #else | ||
| 138 | # define omap2430_hwmods 0 | ||
| 139 | #endif | ||
| 140 | |||
| 141 | #endif | ||
| 142 | |||
| 143 | |||
diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h b/arch/arm/mach-omap2/omap_hwmod_34xx.h new file mode 100644 index 000000000000..1e069f831575 --- /dev/null +++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h | |||
| @@ -0,0 +1,168 @@ | |||
| 1 | /* | ||
| 2 | * omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H | ||
| 13 | #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H | ||
| 14 | |||
| 15 | #ifdef CONFIG_ARCH_OMAP34XX | ||
| 16 | |||
| 17 | #include <mach/omap_hwmod.h> | ||
| 18 | #include <mach/irqs.h> | ||
| 19 | #include <mach/cpu.h> | ||
| 20 | #include <mach/dma.h> | ||
| 21 | |||
| 22 | #include "prm-regbits-34xx.h" | ||
| 23 | |||
| 24 | static struct omap_hwmod omap34xx_mpu_hwmod; | ||
| 25 | static struct omap_hwmod omap34xx_l3_hwmod; | ||
| 26 | static struct omap_hwmod omap34xx_l4_core_hwmod; | ||
| 27 | static struct omap_hwmod omap34xx_l4_per_hwmod; | ||
| 28 | |||
| 29 | /* L3 -> L4_CORE interface */ | ||
| 30 | static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = { | ||
| 31 | .master = &omap34xx_l3_hwmod, | ||
| 32 | .slave = &omap34xx_l4_core_hwmod, | ||
| 33 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 34 | }; | ||
| 35 | |||
| 36 | /* L3 -> L4_PER interface */ | ||
| 37 | static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = { | ||
| 38 | .master = &omap34xx_l3_hwmod, | ||
| 39 | .slave = &omap34xx_l4_per_hwmod, | ||
| 40 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 41 | }; | ||
| 42 | |||
| 43 | /* MPU -> L3 interface */ | ||
| 44 | static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = { | ||
| 45 | .master = &omap34xx_mpu_hwmod, | ||
| 46 | .slave = &omap34xx_l3_hwmod, | ||
| 47 | .user = OCP_USER_MPU, | ||
| 48 | }; | ||
| 49 | |||
| 50 | /* Slave interfaces on the L3 interconnect */ | ||
| 51 | static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = { | ||
| 52 | &omap34xx_mpu__l3, | ||
| 53 | }; | ||
| 54 | |||
| 55 | /* Master interfaces on the L3 interconnect */ | ||
| 56 | static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = { | ||
| 57 | &omap34xx_l3__l4_core, | ||
| 58 | &omap34xx_l3__l4_per, | ||
| 59 | }; | ||
| 60 | |||
| 61 | /* L3 */ | ||
| 62 | static struct omap_hwmod omap34xx_l3_hwmod = { | ||
| 63 | .name = "l3_hwmod", | ||
| 64 | .masters = omap34xx_l3_masters, | ||
| 65 | .masters_cnt = ARRAY_SIZE(omap34xx_l3_masters), | ||
| 66 | .slaves = omap34xx_l3_slaves, | ||
| 67 | .slaves_cnt = ARRAY_SIZE(omap34xx_l3_slaves), | ||
| 68 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) | ||
| 69 | }; | ||
| 70 | |||
| 71 | static struct omap_hwmod omap34xx_l4_wkup_hwmod; | ||
| 72 | |||
| 73 | /* L4_CORE -> L4_WKUP interface */ | ||
| 74 | static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = { | ||
| 75 | .master = &omap34xx_l4_core_hwmod, | ||
| 76 | .slave = &omap34xx_l4_wkup_hwmod, | ||
| 77 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 78 | }; | ||
| 79 | |||
| 80 | /* Slave interfaces on the L4_CORE interconnect */ | ||
| 81 | static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = { | ||
| 82 | &omap34xx_l3__l4_core, | ||
| 83 | }; | ||
| 84 | |||
| 85 | /* Master interfaces on the L4_CORE interconnect */ | ||
| 86 | static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = { | ||
| 87 | &omap34xx_l4_core__l4_wkup, | ||
| 88 | }; | ||
| 89 | |||
| 90 | /* L4 CORE */ | ||
| 91 | static struct omap_hwmod omap34xx_l4_core_hwmod = { | ||
| 92 | .name = "l4_core_hwmod", | ||
| 93 | .masters = omap34xx_l4_core_masters, | ||
| 94 | .masters_cnt = ARRAY_SIZE(omap34xx_l4_core_masters), | ||
| 95 | .slaves = omap34xx_l4_core_slaves, | ||
| 96 | .slaves_cnt = ARRAY_SIZE(omap34xx_l4_core_slaves), | ||
| 97 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) | ||
| 98 | }; | ||
| 99 | |||
| 100 | /* Slave interfaces on the L4_PER interconnect */ | ||
| 101 | static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = { | ||
| 102 | &omap34xx_l3__l4_per, | ||
| 103 | }; | ||
| 104 | |||
| 105 | /* Master interfaces on the L4_PER interconnect */ | ||
| 106 | static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = { | ||
| 107 | }; | ||
| 108 | |||
| 109 | /* L4 PER */ | ||
| 110 | static struct omap_hwmod omap34xx_l4_per_hwmod = { | ||
| 111 | .name = "l4_per_hwmod", | ||
| 112 | .masters = omap34xx_l4_per_masters, | ||
| 113 | .masters_cnt = ARRAY_SIZE(omap34xx_l4_per_masters), | ||
| 114 | .slaves = omap34xx_l4_per_slaves, | ||
| 115 | .slaves_cnt = ARRAY_SIZE(omap34xx_l4_per_slaves), | ||
| 116 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) | ||
| 117 | }; | ||
| 118 | |||
| 119 | /* Slave interfaces on the L4_WKUP interconnect */ | ||
| 120 | static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = { | ||
| 121 | &omap34xx_l4_core__l4_wkup, | ||
| 122 | }; | ||
| 123 | |||
| 124 | /* Master interfaces on the L4_WKUP interconnect */ | ||
| 125 | static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = { | ||
| 126 | }; | ||
| 127 | |||
| 128 | /* L4 WKUP */ | ||
| 129 | static struct omap_hwmod omap34xx_l4_wkup_hwmod = { | ||
| 130 | .name = "l4_wkup_hwmod", | ||
| 131 | .masters = omap34xx_l4_wkup_masters, | ||
| 132 | .masters_cnt = ARRAY_SIZE(omap34xx_l4_wkup_masters), | ||
| 133 | .slaves = omap34xx_l4_wkup_slaves, | ||
| 134 | .slaves_cnt = ARRAY_SIZE(omap34xx_l4_wkup_slaves), | ||
| 135 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) | ||
| 136 | }; | ||
| 137 | |||
| 138 | /* Master interfaces on the MPU device */ | ||
| 139 | static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = { | ||
| 140 | &omap34xx_mpu__l3, | ||
| 141 | }; | ||
| 142 | |||
| 143 | /* MPU */ | ||
| 144 | static struct omap_hwmod omap34xx_mpu_hwmod = { | ||
| 145 | .name = "mpu_hwmod", | ||
| 146 | .clkdev_dev_id = NULL, | ||
| 147 | .clkdev_con_id = "arm_fck", | ||
| 148 | .masters = omap34xx_mpu_masters, | ||
| 149 | .masters_cnt = ARRAY_SIZE(omap34xx_mpu_masters), | ||
| 150 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 151 | }; | ||
| 152 | |||
| 153 | static __initdata struct omap_hwmod *omap34xx_hwmods[] = { | ||
| 154 | &omap34xx_l3_hwmod, | ||
| 155 | &omap34xx_l4_core_hwmod, | ||
| 156 | &omap34xx_l4_per_hwmod, | ||
| 157 | &omap34xx_l4_wkup_hwmod, | ||
| 158 | &omap34xx_mpu_hwmod, | ||
| 159 | NULL, | ||
| 160 | }; | ||
| 161 | |||
| 162 | #else | ||
| 163 | # define omap34xx_hwmods 0 | ||
| 164 | #endif | ||
| 165 | |||
| 166 | #endif | ||
| 167 | |||
| 168 | |||
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 6cc375a275be..1b4c1600f8d8 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
| @@ -20,13 +20,16 @@ | |||
| 20 | */ | 20 | */ |
| 21 | 21 | ||
| 22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/timer.h> | 23 | #include <linux/sched.h> |
| 24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
| 25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
| 26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
| 27 | #include <linux/module.h> | ||
| 27 | 28 | ||
| 28 | #include <mach/clock.h> | 29 | #include <mach/clock.h> |
| 29 | #include <mach/board.h> | 30 | #include <mach/board.h> |
| 31 | #include <mach/powerdomain.h> | ||
| 32 | #include <mach/clockdomain.h> | ||
| 30 | 33 | ||
| 31 | #include "prm.h" | 34 | #include "prm.h" |
| 32 | #include "cm.h" | 35 | #include "cm.h" |
| @@ -48,7 +51,9 @@ int omap2_pm_debug; | |||
| 48 | regs[reg_count++].val = __raw_readl(reg) | 51 | regs[reg_count++].val = __raw_readl(reg) |
| 49 | #define DUMP_INTC_REG(reg, off) \ | 52 | #define DUMP_INTC_REG(reg, off) \ |
| 50 | regs[reg_count].name = #reg; \ | 53 | regs[reg_count].name = #reg; \ |
| 51 | regs[reg_count++].val = __raw_readl(IO_ADDRESS(0x480fe000 + (off))) | 54 | regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off))) |
| 55 | |||
| 56 | static int __init pm_dbg_init(void); | ||
| 52 | 57 | ||
| 53 | void omap2_pm_dump(int mode, int resume, unsigned int us) | 58 | void omap2_pm_dump(int mode, int resume, unsigned int us) |
| 54 | { | 59 | { |
| @@ -150,3 +155,425 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) | |||
| 150 | for (i = 0; i < reg_count; i++) | 155 | for (i = 0; i < reg_count; i++) |
| 151 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); | 156 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); |
| 152 | } | 157 | } |
| 158 | |||
| 159 | #ifdef CONFIG_DEBUG_FS | ||
| 160 | #include <linux/debugfs.h> | ||
| 161 | #include <linux/seq_file.h> | ||
| 162 | |||
| 163 | static void pm_dbg_regset_store(u32 *ptr); | ||
| 164 | |||
| 165 | struct dentry *pm_dbg_dir; | ||
| 166 | |||
| 167 | static int pm_dbg_init_done; | ||
| 168 | |||
| 169 | enum { | ||
| 170 | DEBUG_FILE_COUNTERS = 0, | ||
| 171 | DEBUG_FILE_TIMERS, | ||
| 172 | }; | ||
| 173 | |||
| 174 | struct pm_module_def { | ||
| 175 | char name[8]; /* Name of the module */ | ||
| 176 | short type; /* CM or PRM */ | ||
| 177 | unsigned short offset; | ||
| 178 | int low; /* First register address on this module */ | ||
| 179 | int high; /* Last register address on this module */ | ||
| 180 | }; | ||
| 181 | |||
| 182 | #define MOD_CM 0 | ||
| 183 | #define MOD_PRM 1 | ||
| 184 | |||
| 185 | static const struct pm_module_def *pm_dbg_reg_modules; | ||
| 186 | static const struct pm_module_def omap3_pm_reg_modules[] = { | ||
| 187 | { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c }, | ||
| 188 | { "OCP", MOD_CM, OCP_MOD, 0, 0x10 }, | ||
| 189 | { "MPU", MOD_CM, MPU_MOD, 4, 0x4c }, | ||
| 190 | { "CORE", MOD_CM, CORE_MOD, 0, 0x4c }, | ||
| 191 | { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c }, | ||
| 192 | { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 }, | ||
| 193 | { "CCR", MOD_CM, PLL_MOD, 0, 0x70 }, | ||
| 194 | { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c }, | ||
| 195 | { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c }, | ||
| 196 | { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c }, | ||
| 197 | { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 }, | ||
| 198 | { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 }, | ||
| 199 | { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c }, | ||
| 200 | |||
| 201 | { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc }, | ||
| 202 | { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c }, | ||
| 203 | { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 }, | ||
| 204 | { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 }, | ||
| 205 | { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 }, | ||
| 206 | { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 }, | ||
| 207 | { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 }, | ||
| 208 | { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 }, | ||
| 209 | { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 }, | ||
| 210 | { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 }, | ||
| 211 | { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 }, | ||
| 212 | { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 }, | ||
| 213 | { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 }, | ||
| 214 | { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 }, | ||
| 215 | { "", 0, 0, 0, 0 }, | ||
| 216 | }; | ||
| 217 | |||
| 218 | #define PM_DBG_MAX_REG_SETS 4 | ||
| 219 | |||
| 220 | static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS]; | ||
| 221 | |||
| 222 | static int pm_dbg_get_regset_size(void) | ||
| 223 | { | ||
| 224 | static int regset_size; | ||
| 225 | |||
| 226 | if (regset_size == 0) { | ||
| 227 | int i = 0; | ||
| 228 | |||
| 229 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
| 230 | regset_size += pm_dbg_reg_modules[i].high + | ||
| 231 | 4 - pm_dbg_reg_modules[i].low; | ||
| 232 | i++; | ||
| 233 | } | ||
| 234 | } | ||
| 235 | return regset_size; | ||
| 236 | } | ||
| 237 | |||
| 238 | static int pm_dbg_show_regs(struct seq_file *s, void *unused) | ||
| 239 | { | ||
| 240 | int i, j; | ||
| 241 | unsigned long val; | ||
| 242 | int reg_set = (int)s->private; | ||
| 243 | u32 *ptr; | ||
| 244 | void *store = NULL; | ||
| 245 | int regs; | ||
| 246 | int linefeed; | ||
| 247 | |||
| 248 | if (reg_set == 0) { | ||
| 249 | store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); | ||
| 250 | ptr = store; | ||
| 251 | pm_dbg_regset_store(ptr); | ||
| 252 | } else { | ||
| 253 | ptr = pm_dbg_reg_set[reg_set - 1]; | ||
| 254 | } | ||
| 255 | |||
| 256 | i = 0; | ||
| 257 | |||
| 258 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
| 259 | regs = 0; | ||
| 260 | linefeed = 0; | ||
| 261 | if (pm_dbg_reg_modules[i].type == MOD_CM) | ||
| 262 | seq_printf(s, "MOD: CM_%s (%08x)\n", | ||
| 263 | pm_dbg_reg_modules[i].name, | ||
| 264 | (u32)(OMAP3430_CM_BASE + | ||
| 265 | pm_dbg_reg_modules[i].offset)); | ||
| 266 | else | ||
| 267 | seq_printf(s, "MOD: PRM_%s (%08x)\n", | ||
| 268 | pm_dbg_reg_modules[i].name, | ||
| 269 | (u32)(OMAP3430_PRM_BASE + | ||
| 270 | pm_dbg_reg_modules[i].offset)); | ||
| 271 | |||
| 272 | for (j = pm_dbg_reg_modules[i].low; | ||
| 273 | j <= pm_dbg_reg_modules[i].high; j += 4) { | ||
| 274 | val = *(ptr++); | ||
| 275 | if (val != 0) { | ||
| 276 | regs++; | ||
| 277 | if (linefeed) { | ||
| 278 | seq_printf(s, "\n"); | ||
| 279 | linefeed = 0; | ||
| 280 | } | ||
| 281 | seq_printf(s, " %02x => %08lx", j, val); | ||
| 282 | if (regs % 4 == 0) | ||
| 283 | linefeed = 1; | ||
| 284 | } | ||
| 285 | } | ||
| 286 | seq_printf(s, "\n"); | ||
| 287 | i++; | ||
| 288 | } | ||
| 289 | |||
| 290 | if (store != NULL) | ||
| 291 | kfree(store); | ||
| 292 | |||
| 293 | return 0; | ||
| 294 | } | ||
| 295 | |||
| 296 | static void pm_dbg_regset_store(u32 *ptr) | ||
| 297 | { | ||
| 298 | int i, j; | ||
| 299 | u32 val; | ||
| 300 | |||
| 301 | i = 0; | ||
| 302 | |||
| 303 | while (pm_dbg_reg_modules[i].name[0] != 0) { | ||
| 304 | for (j = pm_dbg_reg_modules[i].low; | ||
| 305 | j <= pm_dbg_reg_modules[i].high; j += 4) { | ||
| 306 | if (pm_dbg_reg_modules[i].type == MOD_CM) | ||
| 307 | val = cm_read_mod_reg( | ||
| 308 | pm_dbg_reg_modules[i].offset, j); | ||
| 309 | else | ||
| 310 | val = prm_read_mod_reg( | ||
| 311 | pm_dbg_reg_modules[i].offset, j); | ||
| 312 | *(ptr++) = val; | ||
| 313 | } | ||
| 314 | i++; | ||
| 315 | } | ||
| 316 | } | ||
| 317 | |||
| 318 | int pm_dbg_regset_save(int reg_set) | ||
| 319 | { | ||
| 320 | if (pm_dbg_reg_set[reg_set-1] == NULL) | ||
| 321 | return -EINVAL; | ||
| 322 | |||
| 323 | pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]); | ||
| 324 | |||
| 325 | return 0; | ||
| 326 | } | ||
| 327 | |||
| 328 | static const char pwrdm_state_names[][4] = { | ||
| 329 | "OFF", | ||
| 330 | "RET", | ||
| 331 | "INA", | ||
| 332 | "ON" | ||
| 333 | }; | ||
| 334 | |||
| 335 | void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) | ||
| 336 | { | ||
| 337 | s64 t; | ||
| 338 | |||
| 339 | if (!pm_dbg_init_done) | ||
| 340 | return ; | ||
| 341 | |||
| 342 | /* Update timer for previous state */ | ||
| 343 | t = sched_clock(); | ||
| 344 | |||
| 345 | pwrdm->state_timer[prev] += t - pwrdm->timer; | ||
| 346 | |||
| 347 | pwrdm->timer = t; | ||
| 348 | } | ||
| 349 | |||
| 350 | static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) | ||
| 351 | { | ||
| 352 | struct seq_file *s = (struct seq_file *)user; | ||
| 353 | |||
| 354 | if (strcmp(clkdm->name, "emu_clkdm") == 0 || | ||
| 355 | strcmp(clkdm->name, "wkup_clkdm") == 0 || | ||
| 356 | strncmp(clkdm->name, "dpll", 4) == 0) | ||
| 357 | return 0; | ||
| 358 | |||
| 359 | seq_printf(s, "%s->%s (%d)", clkdm->name, | ||
| 360 | clkdm->pwrdm.ptr->name, | ||
| 361 | atomic_read(&clkdm->usecount)); | ||
| 362 | seq_printf(s, "\n"); | ||
| 363 | |||
| 364 | return 0; | ||
| 365 | } | ||
| 366 | |||
| 367 | static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user) | ||
| 368 | { | ||
| 369 | struct seq_file *s = (struct seq_file *)user; | ||
| 370 | int i; | ||
| 371 | |||
| 372 | if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || | ||
| 373 | strcmp(pwrdm->name, "wkup_pwrdm") == 0 || | ||
| 374 | strncmp(pwrdm->name, "dpll", 4) == 0) | ||
| 375 | return 0; | ||
| 376 | |||
| 377 | if (pwrdm->state != pwrdm_read_pwrst(pwrdm)) | ||
| 378 | printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n", | ||
| 379 | pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm)); | ||
| 380 | |||
| 381 | seq_printf(s, "%s (%s)", pwrdm->name, | ||
| 382 | pwrdm_state_names[pwrdm->state]); | ||
| 383 | for (i = 0; i < 4; i++) | ||
| 384 | seq_printf(s, ",%s:%d", pwrdm_state_names[i], | ||
| 385 | pwrdm->state_counter[i]); | ||
| 386 | |||
| 387 | seq_printf(s, "\n"); | ||
| 388 | |||
| 389 | return 0; | ||
| 390 | } | ||
| 391 | |||
| 392 | static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user) | ||
| 393 | { | ||
| 394 | struct seq_file *s = (struct seq_file *)user; | ||
| 395 | int i; | ||
| 396 | |||
| 397 | if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || | ||
| 398 | strcmp(pwrdm->name, "wkup_pwrdm") == 0 || | ||
| 399 | strncmp(pwrdm->name, "dpll", 4) == 0) | ||
| 400 | return 0; | ||
| 401 | |||
| 402 | pwrdm_state_switch(pwrdm); | ||
| 403 | |||
| 404 | seq_printf(s, "%s (%s)", pwrdm->name, | ||
| 405 | pwrdm_state_names[pwrdm->state]); | ||
| 406 | |||
| 407 | for (i = 0; i < 4; i++) | ||
| 408 | seq_printf(s, ",%s:%lld", pwrdm_state_names[i], | ||
| 409 | pwrdm->state_timer[i]); | ||
| 410 | |||
| 411 | seq_printf(s, "\n"); | ||
| 412 | return 0; | ||
| 413 | } | ||
| 414 | |||
| 415 | static int pm_dbg_show_counters(struct seq_file *s, void *unused) | ||
| 416 | { | ||
| 417 | pwrdm_for_each(pwrdm_dbg_show_counter, s); | ||
| 418 | clkdm_for_each(clkdm_dbg_show_counter, s); | ||
| 419 | |||
| 420 | return 0; | ||
| 421 | } | ||
| 422 | |||
| 423 | static int pm_dbg_show_timers(struct seq_file *s, void *unused) | ||
| 424 | { | ||
| 425 | pwrdm_for_each(pwrdm_dbg_show_timer, s); | ||
| 426 | return 0; | ||
| 427 | } | ||
| 428 | |||
| 429 | static int pm_dbg_open(struct inode *inode, struct file *file) | ||
| 430 | { | ||
| 431 | switch ((int)inode->i_private) { | ||
| 432 | case DEBUG_FILE_COUNTERS: | ||
| 433 | return single_open(file, pm_dbg_show_counters, | ||
| 434 | &inode->i_private); | ||
| 435 | case DEBUG_FILE_TIMERS: | ||
| 436 | default: | ||
| 437 | return single_open(file, pm_dbg_show_timers, | ||
| 438 | &inode->i_private); | ||
| 439 | }; | ||
| 440 | } | ||
| 441 | |||
| 442 | static int pm_dbg_reg_open(struct inode *inode, struct file *file) | ||
| 443 | { | ||
| 444 | return single_open(file, pm_dbg_show_regs, inode->i_private); | ||
| 445 | } | ||
| 446 | |||
| 447 | static const struct file_operations debug_fops = { | ||
| 448 | .open = pm_dbg_open, | ||
| 449 | .read = seq_read, | ||
| 450 | .llseek = seq_lseek, | ||
| 451 | .release = single_release, | ||
| 452 | }; | ||
| 453 | |||
| 454 | static const struct file_operations debug_reg_fops = { | ||
| 455 | .open = pm_dbg_reg_open, | ||
| 456 | .read = seq_read, | ||
| 457 | .llseek = seq_lseek, | ||
| 458 | .release = single_release, | ||
| 459 | }; | ||
| 460 | |||
| 461 | int pm_dbg_regset_init(int reg_set) | ||
| 462 | { | ||
| 463 | char name[2]; | ||
| 464 | |||
| 465 | if (!pm_dbg_init_done) | ||
| 466 | pm_dbg_init(); | ||
| 467 | |||
| 468 | if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS || | ||
| 469 | pm_dbg_reg_set[reg_set-1] != NULL) | ||
| 470 | return -EINVAL; | ||
| 471 | |||
| 472 | pm_dbg_reg_set[reg_set-1] = | ||
| 473 | kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); | ||
| 474 | |||
| 475 | if (pm_dbg_reg_set[reg_set-1] == NULL) | ||
| 476 | return -ENOMEM; | ||
| 477 | |||
| 478 | if (pm_dbg_dir != NULL) { | ||
| 479 | sprintf(name, "%d", reg_set); | ||
| 480 | |||
| 481 | (void) debugfs_create_file(name, S_IRUGO, | ||
| 482 | pm_dbg_dir, (void *)reg_set, &debug_reg_fops); | ||
| 483 | } | ||
| 484 | |||
| 485 | return 0; | ||
| 486 | } | ||
| 487 | |||
| 488 | static int pwrdm_suspend_get(void *data, u64 *val) | ||
| 489 | { | ||
| 490 | *val = omap3_pm_get_suspend_state((struct powerdomain *)data); | ||
| 491 | |||
| 492 | if (*val >= 0) | ||
| 493 | return 0; | ||
| 494 | return *val; | ||
| 495 | } | ||
| 496 | |||
| 497 | static int pwrdm_suspend_set(void *data, u64 val) | ||
| 498 | { | ||
| 499 | return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val); | ||
| 500 | } | ||
| 501 | |||
| 502 | DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get, | ||
| 503 | pwrdm_suspend_set, "%llu\n"); | ||
| 504 | |||
| 505 | static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir) | ||
| 506 | { | ||
| 507 | int i; | ||
| 508 | s64 t; | ||
| 509 | struct dentry *d; | ||
| 510 | |||
| 511 | t = sched_clock(); | ||
| 512 | |||
| 513 | for (i = 0; i < 4; i++) | ||
| 514 | pwrdm->state_timer[i] = 0; | ||
| 515 | |||
| 516 | pwrdm->timer = t; | ||
| 517 | |||
| 518 | if (strncmp(pwrdm->name, "dpll", 4) == 0) | ||
| 519 | return 0; | ||
| 520 | |||
| 521 | d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); | ||
| 522 | |||
| 523 | (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, | ||
| 524 | (void *)pwrdm, &pwrdm_suspend_fops); | ||
| 525 | |||
| 526 | return 0; | ||
| 527 | } | ||
| 528 | |||
| 529 | static int __init pm_dbg_init(void) | ||
| 530 | { | ||
| 531 | int i; | ||
| 532 | struct dentry *d; | ||
| 533 | char name[2]; | ||
| 534 | |||
| 535 | if (pm_dbg_init_done) | ||
| 536 | return 0; | ||
| 537 | |||
| 538 | if (cpu_is_omap34xx()) | ||
| 539 | pm_dbg_reg_modules = omap3_pm_reg_modules; | ||
| 540 | else { | ||
| 541 | printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); | ||
| 542 | return -ENODEV; | ||
| 543 | } | ||
| 544 | |||
| 545 | d = debugfs_create_dir("pm_debug", NULL); | ||
| 546 | if (IS_ERR(d)) | ||
| 547 | return PTR_ERR(d); | ||
| 548 | |||
| 549 | (void) debugfs_create_file("count", S_IRUGO, | ||
| 550 | d, (void *)DEBUG_FILE_COUNTERS, &debug_fops); | ||
| 551 | (void) debugfs_create_file("time", S_IRUGO, | ||
| 552 | d, (void *)DEBUG_FILE_TIMERS, &debug_fops); | ||
| 553 | |||
| 554 | pwrdm_for_each(pwrdms_setup, (void *)d); | ||
| 555 | |||
| 556 | pm_dbg_dir = debugfs_create_dir("registers", d); | ||
| 557 | if (IS_ERR(pm_dbg_dir)) | ||
| 558 | return PTR_ERR(pm_dbg_dir); | ||
| 559 | |||
| 560 | (void) debugfs_create_file("current", S_IRUGO, | ||
| 561 | pm_dbg_dir, (void *)0, &debug_reg_fops); | ||
| 562 | |||
| 563 | for (i = 0; i < PM_DBG_MAX_REG_SETS; i++) | ||
| 564 | if (pm_dbg_reg_set[i] != NULL) { | ||
| 565 | sprintf(name, "%d", i+1); | ||
| 566 | (void) debugfs_create_file(name, S_IRUGO, | ||
| 567 | pm_dbg_dir, (void *)(i+1), &debug_reg_fops); | ||
| 568 | |||
| 569 | } | ||
| 570 | |||
| 571 | pm_dbg_init_done = 1; | ||
| 572 | |||
| 573 | return 0; | ||
| 574 | } | ||
| 575 | arch_initcall(pm_dbg_init); | ||
| 576 | |||
| 577 | #else | ||
| 578 | void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {} | ||
| 579 | #endif | ||
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 21201cd4117b..8400f5768923 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
| @@ -11,12 +11,23 @@ | |||
| 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H | 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H |
| 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H | 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H |
| 13 | 13 | ||
| 14 | #include <mach/powerdomain.h> | ||
| 15 | |||
| 16 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); | ||
| 17 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | ||
| 18 | |||
| 14 | #ifdef CONFIG_PM_DEBUG | 19 | #ifdef CONFIG_PM_DEBUG |
| 15 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | 20 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); |
| 16 | extern int omap2_pm_debug; | 21 | extern int omap2_pm_debug; |
| 22 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); | ||
| 23 | extern int pm_dbg_regset_save(int reg_set); | ||
| 24 | extern int pm_dbg_regset_init(int reg_set); | ||
| 17 | #else | 25 | #else |
| 18 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | 26 | #define omap2_pm_dump(mode, resume, us) do {} while (0); |
| 19 | #define omap2_pm_debug 0 | 27 | #define omap2_pm_debug 0 |
| 28 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); | ||
| 29 | #define pm_dbg_regset_save(reg_set) do {} while (0); | ||
| 30 | #define pm_dbg_regset_init(reg_set) do {} while (0); | ||
| 20 | #endif /* CONFIG_PM_DEBUG */ | 31 | #endif /* CONFIG_PM_DEBUG */ |
| 21 | 32 | ||
| 22 | extern void omap24xx_idle_loop_suspend(void); | 33 | extern void omap24xx_idle_loop_suspend(void); |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 528dbdc26e23..bff5c4e89742 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
| @@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = { | |||
| 333 | .valid = suspend_valid_only_mem, | 333 | .valid = suspend_valid_only_mem, |
| 334 | }; | 334 | }; |
| 335 | 335 | ||
| 336 | static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm) | 336 | static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm, void *unused) |
| 337 | { | 337 | { |
| 338 | omap2_clkdm_allow_idle(clkdm); | 338 | omap2_clkdm_allow_idle(clkdm); |
| 339 | return 0; | 339 | return 0; |
| @@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void) | |||
| 385 | omap2_clkdm_sleep(gfx_clkdm); | 385 | omap2_clkdm_sleep(gfx_clkdm); |
| 386 | 386 | ||
| 387 | /* Enable clockdomain hardware-supervised control for all clkdms */ | 387 | /* Enable clockdomain hardware-supervised control for all clkdms */ |
| 388 | clkdm_for_each(_pm_clkdm_enable_hwsup); | 388 | clkdm_for_each(_pm_clkdm_enable_hwsup, NULL); |
| 389 | 389 | ||
| 390 | /* Enable clock autoidle for all domains */ | 390 | /* Enable clock autoidle for all domains */ |
| 391 | cm_write_mod_reg(OMAP24XX_AUTO_CAM | | 391 | cm_write_mod_reg(OMAP24XX_AUTO_CAM | |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 488d595d8e4b..0ff5a6c53aa0 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
| @@ -170,6 +170,8 @@ static void omap_sram_idle(void) | |||
| 170 | printk(KERN_ERR "Invalid mpu state in sram_idle\n"); | 170 | printk(KERN_ERR "Invalid mpu state in sram_idle\n"); |
| 171 | return; | 171 | return; |
| 172 | } | 172 | } |
| 173 | pwrdm_pre_transition(); | ||
| 174 | |||
| 173 | omap2_gpio_prepare_for_retention(); | 175 | omap2_gpio_prepare_for_retention(); |
| 174 | omap_uart_prepare_idle(0); | 176 | omap_uart_prepare_idle(0); |
| 175 | omap_uart_prepare_idle(1); | 177 | omap_uart_prepare_idle(1); |
| @@ -182,6 +184,9 @@ static void omap_sram_idle(void) | |||
| 182 | omap_uart_resume_idle(1); | 184 | omap_uart_resume_idle(1); |
| 183 | omap_uart_resume_idle(0); | 185 | omap_uart_resume_idle(0); |
| 184 | omap2_gpio_resume_after_retention(); | 186 | omap2_gpio_resume_after_retention(); |
| 187 | |||
| 188 | pwrdm_post_transition(); | ||
| 189 | |||
| 185 | } | 190 | } |
| 186 | 191 | ||
| 187 | /* | 192 | /* |
| @@ -271,6 +276,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | |||
| 271 | if (sleep_switch) { | 276 | if (sleep_switch) { |
| 272 | omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); | 277 | omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); |
| 273 | pwrdm_wait_transition(pwrdm); | 278 | pwrdm_wait_transition(pwrdm); |
| 279 | pwrdm_state_switch(pwrdm); | ||
| 274 | } | 280 | } |
| 275 | 281 | ||
| 276 | err: | 282 | err: |
| @@ -658,14 +664,38 @@ static void __init prcm_setup_regs(void) | |||
| 658 | omap3_d2d_idle(); | 664 | omap3_d2d_idle(); |
| 659 | } | 665 | } |
| 660 | 666 | ||
| 661 | static int __init pwrdms_setup(struct powerdomain *pwrdm) | 667 | int omap3_pm_get_suspend_state(struct powerdomain *pwrdm) |
| 668 | { | ||
| 669 | struct power_state *pwrst; | ||
| 670 | |||
| 671 | list_for_each_entry(pwrst, &pwrst_list, node) { | ||
| 672 | if (pwrst->pwrdm == pwrdm) | ||
| 673 | return pwrst->next_state; | ||
| 674 | } | ||
| 675 | return -EINVAL; | ||
| 676 | } | ||
| 677 | |||
| 678 | int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state) | ||
| 679 | { | ||
| 680 | struct power_state *pwrst; | ||
| 681 | |||
| 682 | list_for_each_entry(pwrst, &pwrst_list, node) { | ||
| 683 | if (pwrst->pwrdm == pwrdm) { | ||
| 684 | pwrst->next_state = state; | ||
| 685 | return 0; | ||
| 686 | } | ||
| 687 | } | ||
| 688 | return -EINVAL; | ||
| 689 | } | ||
| 690 | |||
| 691 | static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) | ||
| 662 | { | 692 | { |
| 663 | struct power_state *pwrst; | 693 | struct power_state *pwrst; |
| 664 | 694 | ||
| 665 | if (!pwrdm->pwrsts) | 695 | if (!pwrdm->pwrsts) |
| 666 | return 0; | 696 | return 0; |
| 667 | 697 | ||
| 668 | pwrst = kmalloc(sizeof(struct power_state), GFP_KERNEL); | 698 | pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC); |
| 669 | if (!pwrst) | 699 | if (!pwrst) |
| 670 | return -ENOMEM; | 700 | return -ENOMEM; |
| 671 | pwrst->pwrdm = pwrdm; | 701 | pwrst->pwrdm = pwrdm; |
| @@ -683,7 +713,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm) | |||
| 683 | * supported. Initiate sleep transition for other clockdomains, if | 713 | * supported. Initiate sleep transition for other clockdomains, if |
| 684 | * they are not used | 714 | * they are not used |
| 685 | */ | 715 | */ |
| 686 | static int __init clkdms_setup(struct clockdomain *clkdm) | 716 | static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) |
| 687 | { | 717 | { |
| 688 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | 718 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) |
| 689 | omap2_clkdm_allow_idle(clkdm); | 719 | omap2_clkdm_allow_idle(clkdm); |
| @@ -716,13 +746,13 @@ static int __init omap3_pm_init(void) | |||
| 716 | goto err1; | 746 | goto err1; |
| 717 | } | 747 | } |
| 718 | 748 | ||
| 719 | ret = pwrdm_for_each(pwrdms_setup); | 749 | ret = pwrdm_for_each(pwrdms_setup, NULL); |
| 720 | if (ret) { | 750 | if (ret) { |
| 721 | printk(KERN_ERR "Failed to setup powerdomains\n"); | 751 | printk(KERN_ERR "Failed to setup powerdomains\n"); |
| 722 | goto err2; | 752 | goto err2; |
| 723 | } | 753 | } |
| 724 | 754 | ||
| 725 | (void) clkdm_for_each(clkdms_setup); | 755 | (void) clkdm_for_each(clkdms_setup, NULL); |
| 726 | 756 | ||
| 727 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); | 757 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); |
| 728 | if (mpu_pwrdm == NULL) { | 758 | if (mpu_pwrdm == NULL) { |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 983f1cb676be..2594cbff3947 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
| @@ -35,6 +35,13 @@ | |||
| 35 | #include <mach/powerdomain.h> | 35 | #include <mach/powerdomain.h> |
| 36 | #include <mach/clockdomain.h> | 36 | #include <mach/clockdomain.h> |
| 37 | 37 | ||
| 38 | #include "pm.h" | ||
| 39 | |||
| 40 | enum { | ||
| 41 | PWRDM_STATE_NOW = 0, | ||
| 42 | PWRDM_STATE_PREV, | ||
| 43 | }; | ||
| 44 | |||
| 38 | /* pwrdm_list contains all registered struct powerdomains */ | 45 | /* pwrdm_list contains all registered struct powerdomains */ |
| 39 | static LIST_HEAD(pwrdm_list); | 46 | static LIST_HEAD(pwrdm_list); |
| 40 | 47 | ||
| @@ -83,7 +90,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, | |||
| 83 | if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip)) | 90 | if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip)) |
| 84 | return ERR_PTR(-EINVAL); | 91 | return ERR_PTR(-EINVAL); |
| 85 | 92 | ||
| 86 | for (pd = deps; pd; pd++) { | 93 | for (pd = deps; pd->pwrdm_name; pd++) { |
| 87 | 94 | ||
| 88 | if (!omap_chip_is(pd->omap_chip)) | 95 | if (!omap_chip_is(pd->omap_chip)) |
| 89 | continue; | 96 | continue; |
| @@ -96,12 +103,71 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, | |||
| 96 | 103 | ||
| 97 | } | 104 | } |
| 98 | 105 | ||
| 99 | if (!pd) | 106 | if (!pd->pwrdm_name) |
| 100 | return ERR_PTR(-ENOENT); | 107 | return ERR_PTR(-ENOENT); |
| 101 | 108 | ||
| 102 | return pd->pwrdm; | 109 | return pd->pwrdm; |
| 103 | } | 110 | } |
| 104 | 111 | ||
| 112 | static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag) | ||
| 113 | { | ||
| 114 | |||
| 115 | int prev; | ||
| 116 | int state; | ||
| 117 | |||
| 118 | if (pwrdm == NULL) | ||
| 119 | return -EINVAL; | ||
| 120 | |||
| 121 | state = pwrdm_read_pwrst(pwrdm); | ||
| 122 | |||
| 123 | switch (flag) { | ||
| 124 | case PWRDM_STATE_NOW: | ||
| 125 | prev = pwrdm->state; | ||
| 126 | break; | ||
| 127 | case PWRDM_STATE_PREV: | ||
| 128 | prev = pwrdm_read_prev_pwrst(pwrdm); | ||
| 129 | if (pwrdm->state != prev) | ||
| 130 | pwrdm->state_counter[prev]++; | ||
| 131 | break; | ||
| 132 | default: | ||
| 133 | return -EINVAL; | ||
| 134 | } | ||
| 135 | |||
| 136 | if (state != prev) | ||
| 137 | pwrdm->state_counter[state]++; | ||
| 138 | |||
| 139 | pm_dbg_update_time(pwrdm, prev); | ||
| 140 | |||
| 141 | pwrdm->state = state; | ||
| 142 | |||
| 143 | return 0; | ||
| 144 | } | ||
| 145 | |||
| 146 | static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused) | ||
| 147 | { | ||
| 148 | pwrdm_clear_all_prev_pwrst(pwrdm); | ||
| 149 | _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); | ||
| 150 | return 0; | ||
| 151 | } | ||
| 152 | |||
| 153 | static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) | ||
| 154 | { | ||
| 155 | _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV); | ||
| 156 | return 0; | ||
| 157 | } | ||
| 158 | |||
| 159 | static __init void _pwrdm_setup(struct powerdomain *pwrdm) | ||
| 160 | { | ||
| 161 | int i; | ||
| 162 | |||
| 163 | for (i = 0; i < 4; i++) | ||
| 164 | pwrdm->state_counter[i] = 0; | ||
| 165 | |||
| 166 | pwrdm_wait_transition(pwrdm); | ||
| 167 | pwrdm->state = pwrdm_read_pwrst(pwrdm); | ||
| 168 | pwrdm->state_counter[pwrdm->state] = 1; | ||
| 169 | |||
| 170 | } | ||
| 105 | 171 | ||
| 106 | /* Public functions */ | 172 | /* Public functions */ |
| 107 | 173 | ||
| @@ -117,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list) | |||
| 117 | { | 183 | { |
| 118 | struct powerdomain **p = NULL; | 184 | struct powerdomain **p = NULL; |
| 119 | 185 | ||
| 120 | if (pwrdm_list) | 186 | if (pwrdm_list) { |
| 121 | for (p = pwrdm_list; *p; p++) | 187 | for (p = pwrdm_list; *p; p++) { |
| 122 | pwrdm_register(*p); | 188 | pwrdm_register(*p); |
| 189 | _pwrdm_setup(*p); | ||
| 190 | } | ||
| 191 | } | ||
| 123 | } | 192 | } |
| 124 | 193 | ||
| 125 | /** | 194 | /** |
| @@ -217,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name) | |||
| 217 | * anything else to indicate failure; or -EINVAL if the function | 286 | * anything else to indicate failure; or -EINVAL if the function |
| 218 | * pointer is null. | 287 | * pointer is null. |
| 219 | */ | 288 | */ |
| 220 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) | 289 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), |
| 290 | void *user) | ||
| 221 | { | 291 | { |
| 222 | struct powerdomain *temp_pwrdm; | 292 | struct powerdomain *temp_pwrdm; |
| 223 | unsigned long flags; | 293 | unsigned long flags; |
| @@ -228,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) | |||
| 228 | 298 | ||
| 229 | read_lock_irqsave(&pwrdm_rwlock, flags); | 299 | read_lock_irqsave(&pwrdm_rwlock, flags); |
| 230 | list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { | 300 | list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { |
| 231 | ret = (*fn)(temp_pwrdm); | 301 | ret = (*fn)(temp_pwrdm, user); |
| 232 | if (ret) | 302 | if (ret) |
| 233 | break; | 303 | break; |
| 234 | } | 304 | } |
| @@ -1110,4 +1180,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm) | |||
| 1110 | return 0; | 1180 | return 0; |
| 1111 | } | 1181 | } |
| 1112 | 1182 | ||
| 1183 | int pwrdm_state_switch(struct powerdomain *pwrdm) | ||
| 1184 | { | ||
| 1185 | return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW); | ||
| 1186 | } | ||
| 1187 | |||
| 1188 | int pwrdm_clkdm_state_switch(struct clockdomain *clkdm) | ||
| 1189 | { | ||
| 1190 | if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) { | ||
| 1191 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | ||
| 1192 | return pwrdm_state_switch(clkdm->pwrdm.ptr); | ||
| 1193 | } | ||
| 1194 | |||
| 1195 | return -EINVAL; | ||
| 1196 | } | ||
| 1197 | int pwrdm_clk_state_switch(struct clk *clk) | ||
| 1198 | { | ||
| 1199 | if (clk != NULL && clk->clkdm != NULL) | ||
| 1200 | return pwrdm_clkdm_state_switch(clk->clkdm); | ||
| 1201 | return -EINVAL; | ||
| 1202 | } | ||
| 1203 | |||
| 1204 | int pwrdm_pre_transition(void) | ||
| 1205 | { | ||
| 1206 | pwrdm_for_each(_pwrdm_pre_transition_cb, NULL); | ||
| 1207 | return 0; | ||
| 1208 | } | ||
| 1209 | |||
| 1210 | int pwrdm_post_transition(void) | ||
| 1211 | { | ||
| 1212 | pwrdm_for_each(_pwrdm_post_transition_cb, NULL); | ||
| 1213 | return 0; | ||
| 1214 | } | ||
| 1113 | 1215 | ||
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 9937e2814696..03c467c35f54 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h | |||
| @@ -17,11 +17,11 @@ | |||
| 17 | #include "prcm-common.h" | 17 | #include "prcm-common.h" |
| 18 | 18 | ||
| 19 | #define OMAP2420_PRM_REGADDR(module, reg) \ | 19 | #define OMAP2420_PRM_REGADDR(module, reg) \ |
| 20 | IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) | 20 | OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) |
| 21 | #define OMAP2430_PRM_REGADDR(module, reg) \ | 21 | #define OMAP2430_PRM_REGADDR(module, reg) \ |
| 22 | IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) | 22 | OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) |
| 23 | #define OMAP34XX_PRM_REGADDR(module, reg) \ | 23 | #define OMAP34XX_PRM_REGADDR(module, reg) \ |
| 24 | IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) | 24 | OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) |
| 25 | 25 | ||
| 26 | /* | 26 | /* |
| 27 | * Architecture-specific global PRM registers | 27 | * Architecture-specific global PRM registers |
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 1a8bbd094066..0837eda5f2b6 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h | |||
| @@ -48,9 +48,9 @@ static inline u32 sms_read_reg(u16 reg) | |||
| 48 | return __raw_readl(OMAP_SMS_REGADDR(reg)); | 48 | return __raw_readl(OMAP_SMS_REGADDR(reg)); |
| 49 | } | 49 | } |
| 50 | #else | 50 | #else |
| 51 | #define OMAP242X_SDRC_REGADDR(reg) IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) | 51 | #define OMAP242X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg)) |
| 52 | #define OMAP243X_SDRC_REGADDR(reg) IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) | 52 | #define OMAP243X_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg)) |
| 53 | #define OMAP34XX_SDRC_REGADDR(reg) IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) | 53 | #define OMAP34XX_SDRC_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg)) |
| 54 | #endif /* __ASSEMBLER__ */ | 54 | #endif /* __ASSEMBLER__ */ |
| 55 | 55 | ||
| 56 | #endif | 56 | #endif |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index ce22344b94e7..3a529c77daa8 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
| @@ -73,7 +73,7 @@ static LIST_HEAD(uart_list); | |||
| 73 | 73 | ||
| 74 | static struct plat_serial8250_port serial_platform_data0[] = { | 74 | static struct plat_serial8250_port serial_platform_data0[] = { |
| 75 | { | 75 | { |
| 76 | .membase = IO_ADDRESS(OMAP_UART1_BASE), | 76 | .membase = OMAP2_IO_ADDRESS(OMAP_UART1_BASE), |
| 77 | .mapbase = OMAP_UART1_BASE, | 77 | .mapbase = OMAP_UART1_BASE, |
| 78 | .irq = 72, | 78 | .irq = 72, |
| 79 | .flags = UPF_BOOT_AUTOCONF, | 79 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -87,7 +87,7 @@ static struct plat_serial8250_port serial_platform_data0[] = { | |||
| 87 | 87 | ||
| 88 | static struct plat_serial8250_port serial_platform_data1[] = { | 88 | static struct plat_serial8250_port serial_platform_data1[] = { |
| 89 | { | 89 | { |
| 90 | .membase = IO_ADDRESS(OMAP_UART2_BASE), | 90 | .membase = OMAP2_IO_ADDRESS(OMAP_UART2_BASE), |
| 91 | .mapbase = OMAP_UART2_BASE, | 91 | .mapbase = OMAP_UART2_BASE, |
| 92 | .irq = 73, | 92 | .irq = 73, |
| 93 | .flags = UPF_BOOT_AUTOCONF, | 93 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -101,7 +101,7 @@ static struct plat_serial8250_port serial_platform_data1[] = { | |||
| 101 | 101 | ||
| 102 | static struct plat_serial8250_port serial_platform_data2[] = { | 102 | static struct plat_serial8250_port serial_platform_data2[] = { |
| 103 | { | 103 | { |
| 104 | .membase = IO_ADDRESS(OMAP_UART3_BASE), | 104 | .membase = OMAP2_IO_ADDRESS(OMAP_UART3_BASE), |
| 105 | .mapbase = OMAP_UART3_BASE, | 105 | .mapbase = OMAP_UART3_BASE, |
| 106 | .irq = 74, | 106 | .irq = 74, |
| 107 | .flags = UPF_BOOT_AUTOCONF, | 107 | .flags = UPF_BOOT_AUTOCONF, |
| @@ -123,6 +123,21 @@ static struct plat_serial8250_port serial_platform_data2[] = { | |||
| 123 | } | 123 | } |
| 124 | }; | 124 | }; |
| 125 | 125 | ||
| 126 | #ifdef CONFIG_ARCH_OMAP4 | ||
| 127 | static struct plat_serial8250_port serial_platform_data3[] = { | ||
| 128 | { | ||
| 129 | .membase = IO_ADDRESS(OMAP_UART4_BASE), | ||
| 130 | .mapbase = OMAP_UART4_BASE, | ||
| 131 | .irq = 70, | ||
| 132 | .flags = UPF_BOOT_AUTOCONF, | ||
| 133 | .iotype = UPIO_MEM, | ||
| 134 | .regshift = 2, | ||
| 135 | .uartclk = OMAP24XX_BASE_BAUD * 16, | ||
| 136 | }, { | ||
| 137 | .flags = 0 | ||
| 138 | } | ||
| 139 | }; | ||
| 140 | #endif | ||
| 126 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, | 141 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, |
| 127 | int offset) | 142 | int offset) |
| 128 | { | 143 | { |
| @@ -470,7 +485,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart) | |||
| 470 | uart->padconf = 0; | 485 | uart->padconf = 0; |
| 471 | } | 486 | } |
| 472 | 487 | ||
| 473 | p->flags |= UPF_SHARE_IRQ; | 488 | p->irqflags |= IRQF_SHARED; |
| 474 | ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED, | 489 | ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED, |
| 475 | "serial idle", (void *)uart); | 490 | "serial idle", (void *)uart); |
| 476 | WARN_ON(ret); | 491 | WARN_ON(ret); |
| @@ -560,12 +575,22 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = { | |||
| 560 | }, | 575 | }, |
| 561 | }, | 576 | }, |
| 562 | }, | 577 | }, |
| 578 | #ifdef CONFIG_ARCH_OMAP4 | ||
| 579 | { | ||
| 580 | .pdev = { | ||
| 581 | .name = "serial8250", | ||
| 582 | .id = 3 | ||
| 583 | .dev = { | ||
| 584 | .platform_data = serial_platform_data3, | ||
| 585 | }, | ||
| 586 | }, | ||
| 587 | }, | ||
| 588 | #endif | ||
| 563 | }; | 589 | }; |
| 564 | 590 | ||
| 565 | void __init omap_serial_init(void) | 591 | void __init omap_serial_early_init(void) |
| 566 | { | 592 | { |
| 567 | int i; | 593 | int i; |
| 568 | const struct omap_uart_config *info; | ||
| 569 | char name[16]; | 594 | char name[16]; |
| 570 | 595 | ||
| 571 | /* | 596 | /* |
| @@ -574,23 +599,12 @@ void __init omap_serial_init(void) | |||
| 574 | * if not needed. | 599 | * if not needed. |
| 575 | */ | 600 | */ |
| 576 | 601 | ||
| 577 | info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); | ||
| 578 | |||
| 579 | if (info == NULL) | ||
| 580 | return; | ||
| 581 | |||
| 582 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | 602 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { |
| 583 | struct omap_uart_state *uart = &omap_uart[i]; | 603 | struct omap_uart_state *uart = &omap_uart[i]; |
| 584 | struct platform_device *pdev = &uart->pdev; | 604 | struct platform_device *pdev = &uart->pdev; |
| 585 | struct device *dev = &pdev->dev; | 605 | struct device *dev = &pdev->dev; |
| 586 | struct plat_serial8250_port *p = dev->platform_data; | 606 | struct plat_serial8250_port *p = dev->platform_data; |
| 587 | 607 | ||
| 588 | if (!(info->enabled_uarts & (1 << i))) { | ||
| 589 | p->membase = NULL; | ||
| 590 | p->mapbase = 0; | ||
| 591 | continue; | ||
| 592 | } | ||
| 593 | |||
| 594 | sprintf(name, "uart%d_ick", i+1); | 608 | sprintf(name, "uart%d_ick", i+1); |
| 595 | uart->ick = clk_get(NULL, name); | 609 | uart->ick = clk_get(NULL, name); |
| 596 | if (IS_ERR(uart->ick)) { | 610 | if (IS_ERR(uart->ick)) { |
| @@ -605,8 +619,11 @@ void __init omap_serial_init(void) | |||
| 605 | uart->fck = NULL; | 619 | uart->fck = NULL; |
| 606 | } | 620 | } |
| 607 | 621 | ||
| 608 | if (!uart->ick || !uart->fck) | 622 | /* FIXME: Remove this once the clkdev is ready */ |
| 609 | continue; | 623 | if (!cpu_is_omap44xx()) { |
| 624 | if (!uart->ick || !uart->fck) | ||
| 625 | continue; | ||
| 626 | } | ||
| 610 | 627 | ||
| 611 | uart->num = i; | 628 | uart->num = i; |
| 612 | p->private_data = uart; | 629 | p->private_data = uart; |
| @@ -617,6 +634,18 @@ void __init omap_serial_init(void) | |||
| 617 | p->irq += 32; | 634 | p->irq += 32; |
| 618 | 635 | ||
| 619 | omap_uart_enable_clocks(uart); | 636 | omap_uart_enable_clocks(uart); |
| 637 | } | ||
| 638 | } | ||
| 639 | |||
| 640 | void __init omap_serial_init(void) | ||
| 641 | { | ||
| 642 | int i; | ||
| 643 | |||
| 644 | for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { | ||
| 645 | struct omap_uart_state *uart = &omap_uart[i]; | ||
| 646 | struct platform_device *pdev = &uart->pdev; | ||
| 647 | struct device *dev = &pdev->dev; | ||
| 648 | |||
| 620 | omap_uart_reset(uart); | 649 | omap_uart_reset(uart); |
| 621 | omap_uart_idle_init(uart); | 650 | omap_uart_idle_init(uart); |
| 622 | 651 | ||
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index bb299851116d..9b62208658bc 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S | |||
| @@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl: | |||
| 128 | prcm_mask_val: | 128 | prcm_mask_val: |
| 129 | .word 0xFFFF3FFC | 129 | .word 0xFFFF3FFC |
| 130 | omap242x_sdi_timer_32ksynct_cr: | 130 | omap242x_sdi_timer_32ksynct_cr: |
| 131 | .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) | 131 | .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) |
| 132 | ENTRY(omap242x_sram_ddr_init_sz) | 132 | ENTRY(omap242x_sram_ddr_init_sz) |
| 133 | .word . - omap242x_sram_ddr_init | 133 | .word . - omap242x_sram_ddr_init |
| 134 | 134 | ||
| @@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl: | |||
| 224 | ddr_prcm_mask_val: | 224 | ddr_prcm_mask_val: |
| 225 | .word 0xFFFF3FFC | 225 | .word 0xFFFF3FFC |
| 226 | omap242x_srs_timer_32ksynct: | 226 | omap242x_srs_timer_32ksynct: |
| 227 | .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) | 227 | .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010) |
| 228 | 228 | ||
| 229 | ENTRY(omap242x_sram_reprogram_sdrc_sz) | 229 | ENTRY(omap242x_sram_reprogram_sdrc_sz) |
| 230 | .word . - omap242x_sram_reprogram_sdrc | 230 | .word . - omap242x_sram_reprogram_sdrc |
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index 9955abcaeb31..df2cd9277c00 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S | |||
| @@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl: | |||
| 128 | prcm_mask_val: | 128 | prcm_mask_val: |
| 129 | .word 0xFFFF3FFC | 129 | .word 0xFFFF3FFC |
| 130 | omap243x_sdi_timer_32ksynct_cr: | 130 | omap243x_sdi_timer_32ksynct_cr: |
| 131 | .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) | 131 | .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) |
| 132 | ENTRY(omap243x_sram_ddr_init_sz) | 132 | ENTRY(omap243x_sram_ddr_init_sz) |
| 133 | .word . - omap243x_sram_ddr_init | 133 | .word . - omap243x_sram_ddr_init |
| 134 | 134 | ||
| @@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl: | |||
| 224 | ddr_prcm_mask_val: | 224 | ddr_prcm_mask_val: |
| 225 | .word 0xFFFF3FFC | 225 | .word 0xFFFF3FFC |
| 226 | omap243x_srs_timer_32ksynct: | 226 | omap243x_srs_timer_32ksynct: |
| 227 | .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) | 227 | .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010) |
| 228 | 228 | ||
| 229 | ENTRY(omap243x_sram_reprogram_sdrc_sz) | 229 | ENTRY(omap243x_sram_reprogram_sdrc_sz) |
| 230 | .word . - omap243x_sram_reprogram_sdrc | 230 | .word . - omap243x_sram_reprogram_sdrc |
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 97eeeebcb066..e2338c0aebcf 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
| @@ -231,7 +231,7 @@ static void __init omap2_gp_clocksource_init(void) | |||
| 231 | static void __init omap2_gp_timer_init(void) | 231 | static void __init omap2_gp_timer_init(void) |
| 232 | { | 232 | { |
| 233 | #ifdef CONFIG_LOCAL_TIMERS | 233 | #ifdef CONFIG_LOCAL_TIMERS |
| 234 | twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); | 234 | twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); |
| 235 | #endif | 235 | #endif |
| 236 | omap_dm_timer_init(); | 236 | omap_dm_timer_init(); |
| 237 | 237 | ||
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 739e59e8025c..1145a2562b0f 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c | |||
| @@ -31,15 +31,6 @@ | |||
| 31 | #include <mach/mux.h> | 31 | #include <mach/mux.h> |
| 32 | #include <mach/usb.h> | 32 | #include <mach/usb.h> |
| 33 | 33 | ||
| 34 | #define OTG_SYSCONFIG (OMAP34XX_HSUSB_OTG_BASE + 0x404) | ||
| 35 | |||
| 36 | static void __init usb_musb_pm_init(void) | ||
| 37 | { | ||
| 38 | /* Ensure force-idle mode for OTG controller */ | ||
| 39 | if (cpu_is_omap34xx()) | ||
| 40 | omap_writel(0, OTG_SYSCONFIG); | ||
| 41 | } | ||
| 42 | |||
| 43 | #ifdef CONFIG_USB_MUSB_SOC | 34 | #ifdef CONFIG_USB_MUSB_SOC |
| 44 | 35 | ||
| 45 | static struct resource musb_resources[] = { | 36 | static struct resource musb_resources[] = { |
| @@ -173,13 +164,10 @@ void __init usb_musb_init(void) | |||
| 173 | printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n"); | 164 | printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n"); |
| 174 | return; | 165 | return; |
| 175 | } | 166 | } |
| 176 | |||
| 177 | usb_musb_pm_init(); | ||
| 178 | } | 167 | } |
| 179 | 168 | ||
| 180 | #else | 169 | #else |
| 181 | void __init usb_musb_init(void) | 170 | void __init usb_musb_init(void) |
| 182 | { | 171 | { |
| 183 | usb_musb_pm_init(); | ||
| 184 | } | 172 | } |
| 185 | #endif /* CONFIG_USB_MUSB_SOC */ | 173 | #endif /* CONFIG_USB_MUSB_SOC */ |
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index efe85d095190..64b3f52bd9b2 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
| @@ -120,6 +120,10 @@ config OMAP_MBOX_FWK | |||
| 120 | config OMAP_IOMMU | 120 | config OMAP_IOMMU |
| 121 | tristate | 121 | tristate |
| 122 | 122 | ||
| 123 | config OMAP_IOMMU_DEBUG | ||
| 124 | depends on OMAP_IOMMU | ||
| 125 | tristate | ||
| 126 | |||
| 123 | choice | 127 | choice |
| 124 | prompt "System timer" | 128 | prompt "System timer" |
| 125 | default OMAP_MPU_TIMER | 129 | default OMAP_MPU_TIMER |
| @@ -183,6 +187,19 @@ config OMAP_SERIAL_WAKE | |||
| 183 | to data on the serial RX line. This allows you to wake the | 187 | to data on the serial RX line. This allows you to wake the |
| 184 | system from serial console. | 188 | system from serial console. |
| 185 | 189 | ||
| 190 | choice | ||
| 191 | prompt "OMAP PM layer selection" | ||
| 192 | depends on ARCH_OMAP | ||
| 193 | default OMAP_PM_NOOP | ||
| 194 | |||
| 195 | config OMAP_PM_NONE | ||
| 196 | bool "No PM layer" | ||
| 197 | |||
| 198 | config OMAP_PM_NOOP | ||
| 199 | bool "No-op/debug PM layer" | ||
| 200 | |||
| 201 | endchoice | ||
| 202 | |||
| 186 | endmenu | 203 | endmenu |
| 187 | 204 | ||
| 188 | endif | 205 | endif |
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index a83279523958..98f01910c2cf 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile | |||
| @@ -12,8 +12,13 @@ obj- := | |||
| 12 | # OCPI interconnect support for 1710, 1610 and 5912 | 12 | # OCPI interconnect support for 1710, 1610 and 5912 |
| 13 | obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o | 13 | obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o |
| 14 | 14 | ||
| 15 | # omap_device support (OMAP2+ only at the moment) | ||
| 16 | obj-$(CONFIG_ARCH_OMAP2) += omap_device.o | ||
| 17 | obj-$(CONFIG_ARCH_OMAP3) += omap_device.o | ||
| 18 | |||
| 15 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | 19 | obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o |
| 16 | obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o | 20 | obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o |
| 21 | obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o | ||
| 17 | 22 | ||
| 18 | obj-$(CONFIG_CPU_FREQ) += cpu-omap.o | 23 | obj-$(CONFIG_CPU_FREQ) += cpu-omap.o |
| 19 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o | 24 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o |
| @@ -25,3 +30,4 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y) | |||
| 25 | # OMAP mailbox framework | 30 | # OMAP mailbox framework |
| 26 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o | 31 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o |
| 27 | 32 | ||
| 33 | obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o \ No newline at end of file | ||
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index e8c327a45a55..bf880e966d3b 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
| @@ -488,7 +488,7 @@ static int __init clk_debugfs_init(void) | |||
| 488 | } | 488 | } |
| 489 | return 0; | 489 | return 0; |
| 490 | err_out: | 490 | err_out: |
| 491 | debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */ | 491 | debugfs_remove_recursive(clk_debugfs_root); |
| 492 | return err; | 492 | return err; |
| 493 | } | 493 | } |
| 494 | late_initcall(clk_debugfs_init); | 494 | late_initcall(clk_debugfs_init); |
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index ebcf006406f9..3a4768d55895 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
| @@ -54,50 +54,6 @@ static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) | |||
| 54 | struct omap_board_config_kernel *kinfo = NULL; | 54 | struct omap_board_config_kernel *kinfo = NULL; |
| 55 | int i; | 55 | int i; |
| 56 | 56 | ||
| 57 | #ifdef CONFIG_OMAP_BOOT_TAG | ||
| 58 | struct omap_board_config_entry *info = NULL; | ||
| 59 | |||
| 60 | if (omap_bootloader_tag_len > 4) | ||
| 61 | info = (struct omap_board_config_entry *) omap_bootloader_tag; | ||
| 62 | while (info != NULL) { | ||
| 63 | u8 *next; | ||
| 64 | |||
| 65 | if (info->tag == tag) { | ||
| 66 | if (skip == 0) | ||
| 67 | break; | ||
| 68 | skip--; | ||
| 69 | } | ||
| 70 | |||
| 71 | if ((info->len & 0x03) != 0) { | ||
| 72 | /* We bail out to avoid an alignment fault */ | ||
| 73 | printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n", | ||
| 74 | info->len, info->tag); | ||
| 75 | return NULL; | ||
| 76 | } | ||
| 77 | next = (u8 *) info + sizeof(*info) + info->len; | ||
| 78 | if (next >= omap_bootloader_tag + omap_bootloader_tag_len) | ||
| 79 | info = NULL; | ||
| 80 | else | ||
| 81 | info = (struct omap_board_config_entry *) next; | ||
| 82 | } | ||
| 83 | if (info != NULL) { | ||
| 84 | /* Check the length as a lame attempt to check for | ||
| 85 | * binary inconsistency. */ | ||
| 86 | if (len != NO_LENGTH_CHECK) { | ||
| 87 | /* Word-align len */ | ||
| 88 | if (len & 0x03) | ||
| 89 | len = (len + 3) & ~0x03; | ||
| 90 | if (info->len != len) { | ||
| 91 | printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n", | ||
| 92 | tag, len, info->len); | ||
| 93 | return NULL; | ||
| 94 | } | ||
| 95 | } | ||
| 96 | if (len_out != NULL) | ||
| 97 | *len_out = info->len; | ||
| 98 | return info->data; | ||
| 99 | } | ||
| 100 | #endif | ||
| 101 | /* Try to find the config from the board-specific structures | 57 | /* Try to find the config from the board-specific structures |
| 102 | * in the kernel. */ | 58 | * in the kernel. */ |
| 103 | for (i = 0; i < omap_board_config_size; i++) { | 59 | for (i = 0; i < omap_board_config_size; i++) { |
| @@ -127,50 +83,6 @@ const void *omap_get_var_config(u16 tag, size_t *len) | |||
| 127 | } | 83 | } |
| 128 | EXPORT_SYMBOL(omap_get_var_config); | 84 | EXPORT_SYMBOL(omap_get_var_config); |
| 129 | 85 | ||
| 130 | static int __init omap_add_serial_console(void) | ||
| 131 | { | ||
| 132 | const struct omap_serial_console_config *con_info; | ||
| 133 | const struct omap_uart_config *uart_info; | ||
| 134 | static char speed[11], *opt = NULL; | ||
| 135 | int line, i, uart_idx; | ||
| 136 | |||
| 137 | uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); | ||
| 138 | con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE, | ||
| 139 | struct omap_serial_console_config); | ||
| 140 | if (uart_info == NULL || con_info == NULL) | ||
| 141 | return 0; | ||
| 142 | |||
| 143 | if (con_info->console_uart == 0) | ||
| 144 | return 0; | ||
| 145 | |||
| 146 | if (con_info->console_speed) { | ||
| 147 | snprintf(speed, sizeof(speed), "%u", con_info->console_speed); | ||
| 148 | opt = speed; | ||
| 149 | } | ||
| 150 | |||
| 151 | uart_idx = con_info->console_uart - 1; | ||
| 152 | if (uart_idx >= OMAP_MAX_NR_PORTS) { | ||
| 153 | printk(KERN_INFO "Console: external UART#%d. " | ||
| 154 | "Not adding it as console this time.\n", | ||
| 155 | uart_idx + 1); | ||
| 156 | return 0; | ||
| 157 | } | ||
| 158 | if (!(uart_info->enabled_uarts & (1 << uart_idx))) { | ||
| 159 | printk(KERN_ERR "Console: Selected UART#%d is " | ||
| 160 | "not enabled for this platform\n", | ||
| 161 | uart_idx + 1); | ||
| 162 | return -1; | ||
| 163 | } | ||
| 164 | line = 0; | ||
| 165 | for (i = 0; i < uart_idx; i++) { | ||
| 166 | if (uart_info->enabled_uarts & (1 << i)) | ||
| 167 | line++; | ||
| 168 | } | ||
| 169 | return add_preferred_console("ttyS", line, opt); | ||
| 170 | } | ||
| 171 | console_initcall(omap_add_serial_console); | ||
| 172 | |||
| 173 | |||
| 174 | /* | 86 | /* |
| 175 | * 32KHz clocksource ... always available, on pretty most chips except | 87 | * 32KHz clocksource ... always available, on pretty most chips except |
| 176 | * OMAP 730 and 1510. Other timers could be used as clocksources, with | 88 | * OMAP 730 and 1510. Other timers could be used as clocksources, with |
| @@ -253,11 +165,8 @@ static struct clocksource clocksource_32k = { | |||
| 253 | */ | 165 | */ |
| 254 | unsigned long long sched_clock(void) | 166 | unsigned long long sched_clock(void) |
| 255 | { | 167 | { |
| 256 | unsigned long long ret; | 168 | return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k), |
| 257 | 169 | clocksource_32k.mult, clocksource_32k.shift); | |
| 258 | ret = (unsigned long long)clocksource_32k.read(&clocksource_32k); | ||
| 259 | ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift; | ||
| 260 | return ret; | ||
| 261 | } | 170 | } |
| 262 | 171 | ||
| 263 | static int __init omap_init_clocksource_32k(void) | 172 | static int __init omap_init_clocksource_32k(void) |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 9b00f4cbc903..fd3154ae69b1 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
| @@ -2347,16 +2347,16 @@ static int __init omap_init_dma(void) | |||
| 2347 | int ch, r; | 2347 | int ch, r; |
| 2348 | 2348 | ||
| 2349 | if (cpu_class_is_omap1()) { | 2349 | if (cpu_class_is_omap1()) { |
| 2350 | omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE); | 2350 | omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE); |
| 2351 | dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; | 2351 | dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; |
| 2352 | } else if (cpu_is_omap24xx()) { | 2352 | } else if (cpu_is_omap24xx()) { |
| 2353 | omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE); | 2353 | omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE); |
| 2354 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; | 2354 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; |
| 2355 | } else if (cpu_is_omap34xx()) { | 2355 | } else if (cpu_is_omap34xx()) { |
| 2356 | omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE); | 2356 | omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE); |
| 2357 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; | 2357 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; |
| 2358 | } else if (cpu_is_omap44xx()) { | 2358 | } else if (cpu_is_omap44xx()) { |
| 2359 | omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE); | 2359 | omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE); |
| 2360 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; | 2360 | dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; |
| 2361 | } else { | 2361 | } else { |
| 2362 | pr_err("DMA init failed for unsupported omap\n"); | 2362 | pr_err("DMA init failed for unsupported omap\n"); |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 7f50b6103dee..d325b54daeb5 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
| @@ -774,7 +774,10 @@ int __init omap_dm_timer_init(void) | |||
| 774 | 774 | ||
| 775 | for (i = 0; i < dm_timer_count; i++) { | 775 | for (i = 0; i < dm_timer_count; i++) { |
| 776 | timer = &dm_timers[i]; | 776 | timer = &dm_timers[i]; |
| 777 | timer->io_base = IO_ADDRESS(timer->phys_base); | 777 | if (cpu_class_is_omap1()) |
| 778 | timer->io_base = OMAP1_IO_ADDRESS(timer->phys_base); | ||
| 779 | else | ||
| 780 | timer->io_base = OMAP2_IO_ADDRESS(timer->phys_base); | ||
| 778 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | 781 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ |
| 779 | defined(CONFIG_ARCH_OMAP4) | 782 | defined(CONFIG_ARCH_OMAP4) |
| 780 | if (cpu_class_is_omap2()) { | 783 | if (cpu_class_is_omap2()) { |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 176c86e5531d..693839c89ad0 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -31,7 +31,7 @@ | |||
| 31 | /* | 31 | /* |
| 32 | * OMAP1510 GPIO registers | 32 | * OMAP1510 GPIO registers |
| 33 | */ | 33 | */ |
| 34 | #define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) | 34 | #define OMAP1510_GPIO_BASE OMAP1_IO_ADDRESS(0xfffce000) |
| 35 | #define OMAP1510_GPIO_DATA_INPUT 0x00 | 35 | #define OMAP1510_GPIO_DATA_INPUT 0x00 |
| 36 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 | 36 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 |
| 37 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 | 37 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 |
| @@ -45,10 +45,10 @@ | |||
| 45 | /* | 45 | /* |
| 46 | * OMAP1610 specific GPIO registers | 46 | * OMAP1610 specific GPIO registers |
| 47 | */ | 47 | */ |
| 48 | #define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) | 48 | #define OMAP1610_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbe400) |
| 49 | #define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) | 49 | #define OMAP1610_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbec00) |
| 50 | #define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) | 50 | #define OMAP1610_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbb400) |
| 51 | #define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) | 51 | #define OMAP1610_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbbc00) |
| 52 | #define OMAP1610_GPIO_REVISION 0x0000 | 52 | #define OMAP1610_GPIO_REVISION 0x0000 |
| 53 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 | 53 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 |
| 54 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 | 54 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 |
| @@ -70,12 +70,12 @@ | |||
| 70 | /* | 70 | /* |
| 71 | * OMAP730 specific GPIO registers | 71 | * OMAP730 specific GPIO registers |
| 72 | */ | 72 | */ |
| 73 | #define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) | 73 | #define OMAP730_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000) |
| 74 | #define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) | 74 | #define OMAP730_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800) |
| 75 | #define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) | 75 | #define OMAP730_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000) |
| 76 | #define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) | 76 | #define OMAP730_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800) |
| 77 | #define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) | 77 | #define OMAP730_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000) |
| 78 | #define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) | 78 | #define OMAP730_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800) |
| 79 | #define OMAP730_GPIO_DATA_INPUT 0x00 | 79 | #define OMAP730_GPIO_DATA_INPUT 0x00 |
| 80 | #define OMAP730_GPIO_DATA_OUTPUT 0x04 | 80 | #define OMAP730_GPIO_DATA_OUTPUT 0x04 |
| 81 | #define OMAP730_GPIO_DIR_CONTROL 0x08 | 81 | #define OMAP730_GPIO_DIR_CONTROL 0x08 |
| @@ -86,12 +86,12 @@ | |||
| 86 | /* | 86 | /* |
| 87 | * OMAP850 specific GPIO registers | 87 | * OMAP850 specific GPIO registers |
| 88 | */ | 88 | */ |
| 89 | #define OMAP850_GPIO1_BASE IO_ADDRESS(0xfffbc000) | 89 | #define OMAP850_GPIO1_BASE OMAP1_IO_ADDRESS(0xfffbc000) |
| 90 | #define OMAP850_GPIO2_BASE IO_ADDRESS(0xfffbc800) | 90 | #define OMAP850_GPIO2_BASE OMAP1_IO_ADDRESS(0xfffbc800) |
| 91 | #define OMAP850_GPIO3_BASE IO_ADDRESS(0xfffbd000) | 91 | #define OMAP850_GPIO3_BASE OMAP1_IO_ADDRESS(0xfffbd000) |
| 92 | #define OMAP850_GPIO4_BASE IO_ADDRESS(0xfffbd800) | 92 | #define OMAP850_GPIO4_BASE OMAP1_IO_ADDRESS(0xfffbd800) |
| 93 | #define OMAP850_GPIO5_BASE IO_ADDRESS(0xfffbe000) | 93 | #define OMAP850_GPIO5_BASE OMAP1_IO_ADDRESS(0xfffbe000) |
| 94 | #define OMAP850_GPIO6_BASE IO_ADDRESS(0xfffbe800) | 94 | #define OMAP850_GPIO6_BASE OMAP1_IO_ADDRESS(0xfffbe800) |
| 95 | #define OMAP850_GPIO_DATA_INPUT 0x00 | 95 | #define OMAP850_GPIO_DATA_INPUT 0x00 |
| 96 | #define OMAP850_GPIO_DATA_OUTPUT 0x04 | 96 | #define OMAP850_GPIO_DATA_OUTPUT 0x04 |
| 97 | #define OMAP850_GPIO_DIR_CONTROL 0x08 | 97 | #define OMAP850_GPIO_DIR_CONTROL 0x08 |
| @@ -99,19 +99,21 @@ | |||
| 99 | #define OMAP850_GPIO_INT_MASK 0x10 | 99 | #define OMAP850_GPIO_INT_MASK 0x10 |
| 100 | #define OMAP850_GPIO_INT_STATUS 0x14 | 100 | #define OMAP850_GPIO_INT_STATUS 0x14 |
| 101 | 101 | ||
| 102 | #define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE) | ||
| 103 | |||
| 102 | /* | 104 | /* |
| 103 | * omap24xx specific GPIO registers | 105 | * omap24xx specific GPIO registers |
| 104 | */ | 106 | */ |
| 105 | #define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) | 107 | #define OMAP242X_GPIO1_BASE OMAP2_IO_ADDRESS(0x48018000) |
| 106 | #define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) | 108 | #define OMAP242X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4801a000) |
| 107 | #define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) | 109 | #define OMAP242X_GPIO3_BASE OMAP2_IO_ADDRESS(0x4801c000) |
| 108 | #define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) | 110 | #define OMAP242X_GPIO4_BASE OMAP2_IO_ADDRESS(0x4801e000) |
| 109 | 111 | ||
| 110 | #define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) | 112 | #define OMAP243X_GPIO1_BASE OMAP2_IO_ADDRESS(0x4900C000) |
| 111 | #define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) | 113 | #define OMAP243X_GPIO2_BASE OMAP2_IO_ADDRESS(0x4900E000) |
| 112 | #define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) | 114 | #define OMAP243X_GPIO3_BASE OMAP2_IO_ADDRESS(0x49010000) |
| 113 | #define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) | 115 | #define OMAP243X_GPIO4_BASE OMAP2_IO_ADDRESS(0x49012000) |
| 114 | #define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) | 116 | #define OMAP243X_GPIO5_BASE OMAP2_IO_ADDRESS(0x480B6000) |
| 115 | 117 | ||
| 116 | #define OMAP24XX_GPIO_REVISION 0x0000 | 118 | #define OMAP24XX_GPIO_REVISION 0x0000 |
| 117 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 | 119 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 |
| @@ -168,24 +170,22 @@ | |||
| 168 | * omap34xx specific GPIO registers | 170 | * omap34xx specific GPIO registers |
| 169 | */ | 171 | */ |
| 170 | 172 | ||
| 171 | #define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) | 173 | #define OMAP34XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x48310000) |
| 172 | #define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) | 174 | #define OMAP34XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x49050000) |
| 173 | #define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) | 175 | #define OMAP34XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x49052000) |
| 174 | #define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) | 176 | #define OMAP34XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x49054000) |
| 175 | #define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) | 177 | #define OMAP34XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x49056000) |
| 176 | #define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) | 178 | #define OMAP34XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x49058000) |
| 177 | 179 | ||
| 178 | /* | 180 | /* |
| 179 | * OMAP44XX specific GPIO registers | 181 | * OMAP44XX specific GPIO registers |
| 180 | */ | 182 | */ |
| 181 | #define OMAP44XX_GPIO1_BASE IO_ADDRESS(0x4a310000) | 183 | #define OMAP44XX_GPIO1_BASE OMAP2_IO_ADDRESS(0x4a310000) |
| 182 | #define OMAP44XX_GPIO2_BASE IO_ADDRESS(0x48055000) | 184 | #define OMAP44XX_GPIO2_BASE OMAP2_IO_ADDRESS(0x48055000) |
| 183 | #define OMAP44XX_GPIO3_BASE IO_ADDRESS(0x48057000) | 185 | #define OMAP44XX_GPIO3_BASE OMAP2_IO_ADDRESS(0x48057000) |
| 184 | #define OMAP44XX_GPIO4_BASE IO_ADDRESS(0x48059000) | 186 | #define OMAP44XX_GPIO4_BASE OMAP2_IO_ADDRESS(0x48059000) |
| 185 | #define OMAP44XX_GPIO5_BASE IO_ADDRESS(0x4805B000) | 187 | #define OMAP44XX_GPIO5_BASE OMAP2_IO_ADDRESS(0x4805B000) |
| 186 | #define OMAP44XX_GPIO6_BASE IO_ADDRESS(0x4805D000) | 188 | #define OMAP44XX_GPIO6_BASE OMAP2_IO_ADDRESS(0x4805D000) |
| 187 | |||
| 188 | #define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE) | ||
| 189 | 189 | ||
| 190 | struct gpio_bank { | 190 | struct gpio_bank { |
| 191 | void __iomem *base; | 191 | void __iomem *base; |
| @@ -221,7 +221,7 @@ struct gpio_bank { | |||
| 221 | 221 | ||
| 222 | #ifdef CONFIG_ARCH_OMAP16XX | 222 | #ifdef CONFIG_ARCH_OMAP16XX |
| 223 | static struct gpio_bank gpio_bank_1610[5] = { | 223 | static struct gpio_bank gpio_bank_1610[5] = { |
| 224 | { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, | 224 | { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, |
| 225 | { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, | 225 | { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, |
| 226 | { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, | 226 | { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, |
| 227 | { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, | 227 | { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, |
| @@ -231,14 +231,14 @@ static struct gpio_bank gpio_bank_1610[5] = { | |||
| 231 | 231 | ||
| 232 | #ifdef CONFIG_ARCH_OMAP15XX | 232 | #ifdef CONFIG_ARCH_OMAP15XX |
| 233 | static struct gpio_bank gpio_bank_1510[2] = { | 233 | static struct gpio_bank gpio_bank_1510[2] = { |
| 234 | { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 234 | { OMAP1_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
| 235 | { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } | 235 | { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } |
| 236 | }; | 236 | }; |
| 237 | #endif | 237 | #endif |
| 238 | 238 | ||
| 239 | #ifdef CONFIG_ARCH_OMAP730 | 239 | #ifdef CONFIG_ARCH_OMAP730 |
| 240 | static struct gpio_bank gpio_bank_730[7] = { | 240 | static struct gpio_bank gpio_bank_730[7] = { |
| 241 | { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 241 | { OMAP1_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
| 242 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, | 242 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, |
| 243 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, | 243 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, |
| 244 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, | 244 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, |
| @@ -250,7 +250,7 @@ static struct gpio_bank gpio_bank_730[7] = { | |||
| 250 | 250 | ||
| 251 | #ifdef CONFIG_ARCH_OMAP850 | 251 | #ifdef CONFIG_ARCH_OMAP850 |
| 252 | static struct gpio_bank gpio_bank_850[7] = { | 252 | static struct gpio_bank gpio_bank_850[7] = { |
| 253 | { OMAP_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 253 | { OMAP1_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
| 254 | { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 }, | 254 | { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 }, |
| 255 | { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 }, | 255 | { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 }, |
| 256 | { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 }, | 256 | { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 }, |
| @@ -2032,7 +2032,7 @@ void omap2_gpio_resume_after_retention(void) | |||
| 2032 | return; | 2032 | return; |
| 2033 | for (i = 0; i < gpio_bank_count; i++) { | 2033 | for (i = 0; i < gpio_bank_count; i++) { |
| 2034 | struct gpio_bank *bank = &gpio_bank[i]; | 2034 | struct gpio_bank *bank = &gpio_bank[i]; |
| 2035 | u32 l; | 2035 | u32 l, gen, gen0, gen1; |
| 2036 | 2036 | ||
| 2037 | if (!(bank->enabled_non_wakeup_gpios)) | 2037 | if (!(bank->enabled_non_wakeup_gpios)) |
| 2038 | continue; | 2038 | continue; |
| @@ -2056,13 +2056,32 @@ void omap2_gpio_resume_after_retention(void) | |||
| 2056 | * this silicon bug. */ | 2056 | * this silicon bug. */ |
| 2057 | l ^= bank->saved_datain; | 2057 | l ^= bank->saved_datain; |
| 2058 | l &= bank->non_wakeup_gpios; | 2058 | l &= bank->non_wakeup_gpios; |
| 2059 | if (l) { | 2059 | |
| 2060 | /* | ||
| 2061 | * No need to generate IRQs for the rising edge for gpio IRQs | ||
| 2062 | * configured with falling edge only; and vice versa. | ||
| 2063 | */ | ||
| 2064 | gen0 = l & bank->saved_fallingdetect; | ||
| 2065 | gen0 &= bank->saved_datain; | ||
| 2066 | |||
| 2067 | gen1 = l & bank->saved_risingdetect; | ||
| 2068 | gen1 &= ~(bank->saved_datain); | ||
| 2069 | |||
| 2070 | /* FIXME: Consider GPIO IRQs with level detections properly! */ | ||
| 2071 | gen = l & (~(bank->saved_fallingdetect) & | ||
| 2072 | ~(bank->saved_risingdetect)); | ||
| 2073 | /* Consider all GPIO IRQs needed to be updated */ | ||
| 2074 | gen |= gen0 | gen1; | ||
| 2075 | |||
| 2076 | if (gen) { | ||
| 2060 | u32 old0, old1; | 2077 | u32 old0, old1; |
| 2061 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2078 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
| 2062 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 2079 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
| 2063 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 2080 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
| 2064 | __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 2081 | __raw_writel(old0 | gen, bank->base + |
| 2065 | __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 2082 | OMAP24XX_GPIO_LEVELDETECT0); |
| 2083 | __raw_writel(old1 | gen, bank->base + | ||
| 2084 | OMAP24XX_GPIO_LEVELDETECT1); | ||
| 2066 | __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 2085 | __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
| 2067 | __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 2086 | __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
| 2068 | #endif | 2087 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h index 50ea79a0efa2..8e913c322810 100644 --- a/arch/arm/plat-omap/include/mach/board.h +++ b/arch/arm/plat-omap/include/mach/board.h | |||
| @@ -16,10 +16,8 @@ | |||
| 16 | 16 | ||
| 17 | /* Different peripheral ids */ | 17 | /* Different peripheral ids */ |
| 18 | #define OMAP_TAG_CLOCK 0x4f01 | 18 | #define OMAP_TAG_CLOCK 0x4f01 |
| 19 | #define OMAP_TAG_SERIAL_CONSOLE 0x4f03 | ||
| 20 | #define OMAP_TAG_LCD 0x4f05 | 19 | #define OMAP_TAG_LCD 0x4f05 |
| 21 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 | 20 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 |
| 22 | #define OMAP_TAG_UART 0x4f07 | ||
| 23 | #define OMAP_TAG_FBMEM 0x4f08 | 21 | #define OMAP_TAG_FBMEM 0x4f08 |
| 24 | #define OMAP_TAG_STI_CONSOLE 0x4f09 | 22 | #define OMAP_TAG_STI_CONSOLE 0x4f09 |
| 25 | #define OMAP_TAG_CAMERA_SENSOR 0x4f0a | 23 | #define OMAP_TAG_CAMERA_SENSOR 0x4f0a |
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h index b9d0dd2da89b..99ebd886f134 100644 --- a/arch/arm/plat-omap/include/mach/clockdomain.h +++ b/arch/arm/plat-omap/include/mach/clockdomain.h | |||
| @@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm); | |||
| 95 | int clkdm_unregister(struct clockdomain *clkdm); | 95 | int clkdm_unregister(struct clockdomain *clkdm); |
| 96 | struct clockdomain *clkdm_lookup(const char *name); | 96 | struct clockdomain *clkdm_lookup(const char *name); |
| 97 | 97 | ||
| 98 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)); | 98 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), |
| 99 | void *user); | ||
| 99 | struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); | 100 | struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); |
| 100 | 101 | ||
| 101 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm); | 102 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm); |
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index 8140dbccb7bc..826d317cdbec 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h | |||
| @@ -20,15 +20,15 @@ | |||
| 20 | 20 | ||
| 21 | #ifndef __ASSEMBLY__ | 21 | #ifndef __ASSEMBLY__ |
| 22 | #define OMAP242X_CTRL_REGADDR(reg) \ | 22 | #define OMAP242X_CTRL_REGADDR(reg) \ |
| 23 | IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) | 23 | OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) |
| 24 | #define OMAP243X_CTRL_REGADDR(reg) \ | 24 | #define OMAP243X_CTRL_REGADDR(reg) \ |
| 25 | IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) | 25 | OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) |
| 26 | #define OMAP343X_CTRL_REGADDR(reg) \ | 26 | #define OMAP343X_CTRL_REGADDR(reg) \ |
| 27 | IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) | 27 | OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) |
| 28 | #else | 28 | #else |
| 29 | #define OMAP242X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) | 29 | #define OMAP242X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) |
| 30 | #define OMAP243X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) | 30 | #define OMAP243X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) |
| 31 | #define OMAP343X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) | 31 | #define OMAP343X_CTRL_REGADDR(reg) OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) |
| 32 | #endif /* __ASSEMBLY__ */ | 32 | #endif /* __ASSEMBLY__ */ |
| 33 | 33 | ||
| 34 | /* | 34 | /* |
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index 56426ed45ef4..a5592991634d 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | .endm | 41 | .endm |
| 42 | 42 | ||
| 43 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 43 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 44 | ldr \base, =IO_ADDRESS(OMAP_IH1_BASE) | 44 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) |
| 45 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] | 45 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] |
| 46 | ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] | 46 | ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] |
| 47 | mov \irqstat, #0xffffffff | 47 | mov \irqstat, #0xffffffff |
| @@ -53,7 +53,7 @@ | |||
| 53 | cmp \irqnr, #0 | 53 | cmp \irqnr, #0 |
| 54 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | 54 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] |
| 55 | cmpeq \irqnr, #INT_IH2_IRQ | 55 | cmpeq \irqnr, #INT_IH2_IRQ |
| 56 | ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE) | 56 | ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) |
| 57 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] | 57 | ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] |
| 58 | addeqs \irqnr, \irqnr, #32 | 58 | addeqs \irqnr, \irqnr, #32 |
| 59 | 1510: | 59 | 1510: |
| @@ -68,9 +68,9 @@ | |||
| 68 | 68 | ||
| 69 | /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ | 69 | /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ |
| 70 | #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) | 70 | #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) |
| 71 | #define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) | 71 | #define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE) |
| 72 | #elif defined(CONFIG_ARCH_OMAP34XX) | 72 | #elif defined(CONFIG_ARCH_OMAP34XX) |
| 73 | #define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) | 73 | #define OMAP2_VA_IC_BASE OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE) |
| 74 | #endif | 74 | #endif |
| 75 | #if defined(CONFIG_ARCH_OMAP4) | 75 | #if defined(CONFIG_ARCH_OMAP4) |
| 76 | #include <mach/omap44xx.h> | 76 | #include <mach/omap44xx.h> |
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h index 2b22a8799bc6..633ff688b928 100644 --- a/arch/arm/plat-omap/include/mach/gpio.h +++ b/arch/arm/plat-omap/include/mach/gpio.h | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #include <linux/io.h> | 29 | #include <linux/io.h> |
| 30 | #include <mach/irqs.h> | 30 | #include <mach/irqs.h> |
| 31 | 31 | ||
| 32 | #define OMAP_MPUIO_BASE 0xfffb5000 | 32 | #define OMAP1_MPUIO_BASE 0xfffb5000 |
| 33 | 33 | ||
| 34 | #if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)) | 34 | #if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)) |
| 35 | 35 | ||
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index 21fb0efdda86..8d32df32b0b1 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h | |||
| @@ -54,17 +54,33 @@ | |||
| 54 | * ---------------------------------------------------------------------------- | 54 | * ---------------------------------------------------------------------------- |
| 55 | */ | 55 | */ |
| 56 | 56 | ||
| 57 | #if defined(CONFIG_ARCH_OMAP1) | 57 | #ifdef __ASSEMBLER__ |
| 58 | #define IOMEM(x) (x) | ||
| 59 | #else | ||
| 60 | #define IOMEM(x) ((void __force __iomem *)(x)) | ||
| 61 | #endif | ||
| 62 | |||
| 63 | #define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ | ||
| 64 | #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) | ||
| 65 | |||
| 66 | #define OMAP2_IO_OFFSET 0x90000000 | ||
| 67 | #define OMAP2_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */ | ||
| 68 | |||
| 69 | /* | ||
| 70 | * ---------------------------------------------------------------------------- | ||
| 71 | * Omap1 specific IO mapping | ||
| 72 | * ---------------------------------------------------------------------------- | ||
| 73 | */ | ||
| 58 | 74 | ||
| 59 | #define IO_PHYS 0xFFFB0000 | 75 | #define OMAP1_IO_PHYS 0xFFFB0000 |
| 60 | #define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ | 76 | #define OMAP1_IO_SIZE 0x40000 |
| 61 | #define IO_SIZE 0x40000 | 77 | #define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET) |
| 62 | #define IO_VIRT (IO_PHYS - IO_OFFSET) | ||
| 63 | #define __IO_ADDRESS(pa) ((pa) - IO_OFFSET) | ||
| 64 | #define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) | ||
| 65 | #define io_v2p(va) ((va) + IO_OFFSET) | ||
| 66 | 78 | ||
| 67 | #elif defined(CONFIG_ARCH_OMAP2) | 79 | /* |
| 80 | * ---------------------------------------------------------------------------- | ||
| 81 | * Omap2 specific IO mapping | ||
| 82 | * ---------------------------------------------------------------------------- | ||
| 83 | */ | ||
| 68 | 84 | ||
| 69 | /* We map both L3 and L4 on OMAP2 */ | 85 | /* We map both L3 and L4 on OMAP2 */ |
| 70 | #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ | 86 | #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ |
| @@ -87,11 +103,6 @@ | |||
| 87 | #define OMAP243X_SMS_VIRT 0xFC000000 | 103 | #define OMAP243X_SMS_VIRT 0xFC000000 |
| 88 | #define OMAP243X_SMS_SIZE SZ_1M | 104 | #define OMAP243X_SMS_SIZE SZ_1M |
| 89 | 105 | ||
| 90 | #define IO_OFFSET 0x90000000 | ||
| 91 | #define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ | ||
| 92 | #define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ | ||
| 93 | #define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ | ||
| 94 | |||
| 95 | /* DSP */ | 106 | /* DSP */ |
| 96 | #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ | 107 | #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ |
| 97 | #define DSP_MEM_24XX_VIRT 0xe0000000 | 108 | #define DSP_MEM_24XX_VIRT 0xe0000000 |
| @@ -103,7 +114,11 @@ | |||
| 103 | #define DSP_MMU_24XX_VIRT 0xe2000000 | 114 | #define DSP_MMU_24XX_VIRT 0xe2000000 |
| 104 | #define DSP_MMU_24XX_SIZE SZ_4K | 115 | #define DSP_MMU_24XX_SIZE SZ_4K |
| 105 | 116 | ||
| 106 | #elif defined(CONFIG_ARCH_OMAP3) | 117 | /* |
| 118 | * ---------------------------------------------------------------------------- | ||
| 119 | * Omap3 specific IO mapping | ||
| 120 | * ---------------------------------------------------------------------------- | ||
| 121 | */ | ||
| 107 | 122 | ||
| 108 | /* We map both L3 and L4 on OMAP3 */ | 123 | /* We map both L3 and L4 on OMAP3 */ |
| 109 | #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ | 124 | #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ |
| @@ -143,12 +158,6 @@ | |||
| 143 | #define OMAP343X_SDRC_VIRT 0xFD000000 | 158 | #define OMAP343X_SDRC_VIRT 0xFD000000 |
| 144 | #define OMAP343X_SDRC_SIZE SZ_1M | 159 | #define OMAP343X_SDRC_SIZE SZ_1M |
| 145 | 160 | ||
| 146 | |||
| 147 | #define IO_OFFSET 0x90000000 | ||
| 148 | #define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ | ||
| 149 | #define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ | ||
| 150 | #define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ | ||
| 151 | |||
| 152 | /* DSP */ | 161 | /* DSP */ |
| 153 | #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ | 162 | #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ |
| 154 | #define DSP_MEM_34XX_VIRT 0xe0000000 | 163 | #define DSP_MEM_34XX_VIRT 0xe0000000 |
| @@ -160,8 +169,12 @@ | |||
| 160 | #define DSP_MMU_34XX_VIRT 0xe2000000 | 169 | #define DSP_MMU_34XX_VIRT 0xe2000000 |
| 161 | #define DSP_MMU_34XX_SIZE SZ_4K | 170 | #define DSP_MMU_34XX_SIZE SZ_4K |
| 162 | 171 | ||
| 172 | /* | ||
| 173 | * ---------------------------------------------------------------------------- | ||
| 174 | * Omap4 specific IO mapping | ||
| 175 | * ---------------------------------------------------------------------------- | ||
| 176 | */ | ||
| 163 | 177 | ||
| 164 | #elif defined(CONFIG_ARCH_OMAP4) | ||
| 165 | /* We map both L3 and L4 on OMAP4 */ | 178 | /* We map both L3 and L4 on OMAP4 */ |
| 166 | #define L3_44XX_PHYS L3_44XX_BASE | 179 | #define L3_44XX_PHYS L3_44XX_BASE |
| 167 | #define L3_44XX_VIRT 0xd4000000 | 180 | #define L3_44XX_VIRT 0xd4000000 |
| @@ -189,38 +202,24 @@ | |||
| 189 | #define OMAP44XX_GPMC_SIZE SZ_1M | 202 | #define OMAP44XX_GPMC_SIZE SZ_1M |
| 190 | 203 | ||
| 191 | 204 | ||
| 192 | #define IO_OFFSET 0x90000000 | 205 | /* |
| 193 | #define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ | 206 | * ---------------------------------------------------------------------------- |
| 194 | #define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ | 207 | * Omap specific register access |
| 195 | #define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ | 208 | * ---------------------------------------------------------------------------- |
| 196 | 209 | */ | |
| 197 | #endif | ||
| 198 | |||
| 199 | #define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) | ||
| 200 | #define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa)) | ||
| 201 | #define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa)) | ||
| 202 | 210 | ||
| 203 | #ifdef __ASSEMBLER__ | 211 | #ifndef __ASSEMBLER__ |
| 204 | #define IOMEM(x) (x) | ||
| 205 | #else | ||
| 206 | #define IOMEM(x) ((void __force __iomem *)(x)) | ||
| 207 | 212 | ||
| 208 | /* | 213 | /* |
| 209 | * Functions to access the OMAP IO region | 214 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these |
| 210 | * | ||
| 211 | * NOTE: - Use omap_read/write[bwl] for physical register addresses | ||
| 212 | * - Use __raw_read/write[bwl]() for virtual register addresses | ||
| 213 | * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses | ||
| 214 | * - DO NOT use hardcoded virtual addresses to allow changing the | ||
| 215 | * IO address space again if needed | ||
| 216 | */ | 215 | */ |
| 217 | #define omap_readb(a) __raw_readb(IO_ADDRESS(a)) | ||
| 218 | #define omap_readw(a) __raw_readw(IO_ADDRESS(a)) | ||
| 219 | #define omap_readl(a) __raw_readl(IO_ADDRESS(a)) | ||
| 220 | 216 | ||
| 221 | #define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a)) | 217 | extern u8 omap_readb(u32 pa); |
| 222 | #define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) | 218 | extern u16 omap_readw(u32 pa); |
| 223 | #define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) | 219 | extern u32 omap_readl(u32 pa); |
| 220 | extern void omap_writeb(u8 v, u32 pa); | ||
| 221 | extern void omap_writew(u16 v, u32 pa); | ||
| 222 | extern void omap_writel(u32 v, u32 pa); | ||
| 224 | 223 | ||
| 225 | struct omap_sdrc_params; | 224 | struct omap_sdrc_params; |
| 226 | 225 | ||
diff --git a/arch/arm/plat-omap/include/mach/iommu.h b/arch/arm/plat-omap/include/mach/iommu.h index 769b00b4c34a..46d41ac83dbf 100644 --- a/arch/arm/plat-omap/include/mach/iommu.h +++ b/arch/arm/plat-omap/include/mach/iommu.h | |||
| @@ -95,7 +95,7 @@ struct iommu_functions { | |||
| 95 | 95 | ||
| 96 | void (*save_ctx)(struct iommu *obj); | 96 | void (*save_ctx)(struct iommu *obj); |
| 97 | void (*restore_ctx)(struct iommu *obj); | 97 | void (*restore_ctx)(struct iommu *obj); |
| 98 | ssize_t (*dump_ctx)(struct iommu *obj, char *buf); | 98 | ssize_t (*dump_ctx)(struct iommu *obj, char *buf, ssize_t len); |
| 99 | }; | 99 | }; |
| 100 | 100 | ||
| 101 | struct iommu_platform_data { | 101 | struct iommu_platform_data { |
| @@ -162,7 +162,7 @@ extern void uninstall_iommu_arch(const struct iommu_functions *ops); | |||
| 162 | extern int foreach_iommu_device(void *data, | 162 | extern int foreach_iommu_device(void *data, |
| 163 | int (*fn)(struct device *, void *)); | 163 | int (*fn)(struct device *, void *)); |
| 164 | 164 | ||
| 165 | extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf); | 165 | extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len); |
| 166 | extern size_t dump_tlb_entries(struct iommu *obj, char *buf); | 166 | extern size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t len); |
| 167 | 167 | ||
| 168 | #endif /* __MACH_IOMMU_H */ | 168 | #endif /* __MACH_IOMMU_H */ |
diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/plat-omap/include/mach/mtd-xip.h index 39b591ff54bb..f82a8dcaad94 100644 --- a/arch/arm/plat-omap/include/mach/mtd-xip.h +++ b/arch/arm/plat-omap/include/mach/mtd-xip.h | |||
| @@ -25,7 +25,7 @@ typedef struct { | |||
| 25 | } xip_omap_mpu_timer_regs_t; | 25 | } xip_omap_mpu_timer_regs_t; |
| 26 | 26 | ||
| 27 | #define xip_omap_mpu_timer_base(n) \ | 27 | #define xip_omap_mpu_timer_base(n) \ |
| 28 | ((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ | 28 | ((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ |
| 29 | (n)*OMAP_MPU_TIMER_OFFSET)) | 29 | (n)*OMAP_MPU_TIMER_OFFSET)) |
| 30 | 30 | ||
| 31 | static inline unsigned long xip_omap_mpu_timer_read(int nr) | 31 | static inline unsigned long xip_omap_mpu_timer_read(int nr) |
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 80281c458baf..98dfab651dfc 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h | |||
| @@ -857,6 +857,37 @@ enum omap34xx_index { | |||
| 857 | /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */ | 857 | /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */ |
| 858 | H16_34XX_SDRC_CKE0, | 858 | H16_34XX_SDRC_CKE0, |
| 859 | H17_34XX_SDRC_CKE1, | 859 | H17_34XX_SDRC_CKE1, |
| 860 | |||
| 861 | /* MMC1 */ | ||
| 862 | N28_3430_MMC1_CLK, | ||
| 863 | M27_3430_MMC1_CMD, | ||
| 864 | N27_3430_MMC1_DAT0, | ||
| 865 | N26_3430_MMC1_DAT1, | ||
| 866 | N25_3430_MMC1_DAT2, | ||
| 867 | P28_3430_MMC1_DAT3, | ||
| 868 | P27_3430_MMC1_DAT4, | ||
| 869 | P26_3430_MMC1_DAT5, | ||
| 870 | R27_3430_MMC1_DAT6, | ||
| 871 | R25_3430_MMC1_DAT7, | ||
| 872 | |||
| 873 | /* MMC2 */ | ||
| 874 | AE2_3430_MMC2_CLK, | ||
| 875 | AG5_3430_MMC2_CMD, | ||
| 876 | AH5_3430_MMC2_DAT0, | ||
| 877 | AH4_3430_MMC2_DAT1, | ||
| 878 | AG4_3430_MMC2_DAT2, | ||
| 879 | AF4_3430_MMC2_DAT3, | ||
| 880 | |||
| 881 | /* MMC3 */ | ||
| 882 | AF10_3430_MMC3_CLK, | ||
| 883 | AC3_3430_MMC3_CMD, | ||
| 884 | AE11_3430_MMC3_DAT0, | ||
| 885 | AH9_3430_MMC3_DAT1, | ||
| 886 | AF13_3430_MMC3_DAT2, | ||
| 887 | AF13_3430_MMC3_DAT3, | ||
| 888 | |||
| 889 | /* SYS_NIRQ T2 INT1 */ | ||
| 890 | AF26_34XX_SYS_NIRQ, | ||
| 860 | }; | 891 | }; |
| 861 | 892 | ||
| 862 | struct omap_mux_cfg { | 893 | struct omap_mux_cfg { |
diff --git a/arch/arm/plat-omap/include/mach/omap-pm.h b/arch/arm/plat-omap/include/mach/omap-pm.h new file mode 100644 index 000000000000..3ee41d711492 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap-pm.h | |||
| @@ -0,0 +1,301 @@ | |||
| 1 | /* | ||
| 2 | * omap-pm.h - OMAP power management interface | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008-2009 Texas Instruments, Inc. | ||
| 5 | * Copyright (C) 2008-2009 Nokia Corporation | ||
| 6 | * Paul Walmsley | ||
| 7 | * | ||
| 8 | * Interface developed by (in alphabetical order): Karthik Dasu, Jouni | ||
| 9 | * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa, | ||
| 10 | * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, | ||
| 11 | * Richard Woodruff | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H | ||
| 15 | #define ASM_ARM_ARCH_OMAP_OMAP_PM_H | ||
| 16 | |||
| 17 | #include <linux/device.h> | ||
| 18 | #include <linux/cpufreq.h> | ||
| 19 | |||
| 20 | #include "powerdomain.h" | ||
| 21 | |||
| 22 | /** | ||
| 23 | * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU | ||
| 24 | * @rate: target clock rate | ||
| 25 | * @opp_id: OPP ID | ||
| 26 | * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP | ||
| 27 | * | ||
| 28 | * Operating performance point data. Can vary by OMAP chip and board. | ||
| 29 | */ | ||
| 30 | struct omap_opp { | ||
| 31 | unsigned long rate; | ||
| 32 | u8 opp_id; | ||
| 33 | u16 min_vdd; | ||
| 34 | }; | ||
| 35 | |||
| 36 | extern struct omap_opp *mpu_opps; | ||
| 37 | extern struct omap_opp *dsp_opps; | ||
| 38 | extern struct omap_opp *l3_opps; | ||
| 39 | |||
| 40 | /* | ||
| 41 | * agent_id values for use with omap_pm_set_min_bus_tput(): | ||
| 42 | * | ||
| 43 | * OCP_INITIATOR_AGENT is only valid for devices that can act as | ||
| 44 | * initiators -- it represents the device's L3 interconnect | ||
| 45 | * connection. OCP_TARGET_AGENT represents the device's L4 | ||
| 46 | * interconnect connection. | ||
| 47 | */ | ||
| 48 | #define OCP_TARGET_AGENT 1 | ||
| 49 | #define OCP_INITIATOR_AGENT 2 | ||
| 50 | |||
| 51 | /** | ||
| 52 | * omap_pm_if_early_init - OMAP PM init code called before clock fw init | ||
| 53 | * @mpu_opp_table: array ptr to struct omap_opp for MPU | ||
| 54 | * @dsp_opp_table: array ptr to struct omap_opp for DSP | ||
| 55 | * @l3_opp_table : array ptr to struct omap_opp for CORE | ||
| 56 | * | ||
| 57 | * Initialize anything that must be configured before the clock | ||
| 58 | * framework starts. The "_if_" is to avoid name collisions with the | ||
| 59 | * PM idle-loop code. | ||
| 60 | */ | ||
| 61 | int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table, | ||
| 62 | struct omap_opp *dsp_opp_table, | ||
| 63 | struct omap_opp *l3_opp_table); | ||
| 64 | |||
| 65 | /** | ||
| 66 | * omap_pm_if_init - OMAP PM init code called after clock fw init | ||
| 67 | * | ||
| 68 | * The main initialization code. OPP tables are passed in here. The | ||
| 69 | * "_if_" is to avoid name collisions with the PM idle-loop code. | ||
| 70 | */ | ||
| 71 | int __init omap_pm_if_init(void); | ||
| 72 | |||
| 73 | /** | ||
| 74 | * omap_pm_if_exit - OMAP PM exit code | ||
| 75 | * | ||
| 76 | * Exit code; currently unused. The "_if_" is to avoid name | ||
| 77 | * collisions with the PM idle-loop code. | ||
| 78 | */ | ||
| 79 | void omap_pm_if_exit(void); | ||
| 80 | |||
| 81 | /* | ||
| 82 | * Device-driver-originated constraints (via board-*.c files, platform_data) | ||
| 83 | */ | ||
| 84 | |||
| 85 | |||
| 86 | /** | ||
| 87 | * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency | ||
| 88 | * @dev: struct device * requesting the constraint | ||
| 89 | * @t: maximum MPU wakeup latency in microseconds | ||
| 90 | * | ||
| 91 | * Request that the maximum interrupt latency for the MPU to be no | ||
| 92 | * greater than 't' microseconds. "Interrupt latency" in this case is | ||
| 93 | * defined as the elapsed time from the occurrence of a hardware or | ||
| 94 | * timer interrupt to the time when the device driver's interrupt | ||
| 95 | * service routine has been entered by the MPU. | ||
| 96 | * | ||
| 97 | * It is intended that underlying PM code will use this information to | ||
| 98 | * determine what power state to put the MPU powerdomain into, and | ||
| 99 | * possibly the CORE powerdomain as well, since interrupt handling | ||
| 100 | * code currently runs from SDRAM. Advanced PM or board*.c code may | ||
| 101 | * also configure interrupt controller priorities, OCP bus priorities, | ||
| 102 | * CPU speed(s), etc. | ||
| 103 | * | ||
| 104 | * This function will not affect device wakeup latency, e.g., time | ||
| 105 | * elapsed from when a device driver enables a hardware device with | ||
| 106 | * clk_enable(), to when the device is ready for register access or | ||
| 107 | * other use. To control this device wakeup latency, use | ||
| 108 | * set_max_dev_wakeup_lat() | ||
| 109 | * | ||
| 110 | * Multiple calls to set_max_mpu_wakeup_lat() will replace the | ||
| 111 | * previous t value. To remove the latency target for the MPU, call | ||
| 112 | * with t = -1. | ||
| 113 | * | ||
| 114 | * No return value. | ||
| 115 | */ | ||
| 116 | void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t); | ||
| 117 | |||
| 118 | |||
| 119 | /** | ||
| 120 | * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device | ||
| 121 | * @dev: struct device * requesting the constraint | ||
| 122 | * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT) | ||
| 123 | * @r: minimum throughput (in KiB/s) | ||
| 124 | * | ||
| 125 | * Request that the minimum data throughput on the OCP interconnect | ||
| 126 | * attached to device 'dev' interconnect agent 'tbus_id' be no less | ||
| 127 | * than 'r' KiB/s. | ||
| 128 | * | ||
| 129 | * It is expected that the OMAP PM or bus code will use this | ||
| 130 | * information to set the interconnect clock to run at the lowest | ||
| 131 | * possible speed that satisfies all current system users. The PM or | ||
| 132 | * bus code will adjust the estimate based on its model of the bus, so | ||
| 133 | * device driver authors should attempt to specify an accurate | ||
| 134 | * quantity for their device use case, and let the PM or bus code | ||
| 135 | * overestimate the numbers as necessary to handle request/response | ||
| 136 | * latency, other competing users on the system, etc. On OMAP2/3, if | ||
| 137 | * a driver requests a minimum L4 interconnect speed constraint, the | ||
| 138 | * code will also need to add an minimum L3 interconnect speed | ||
| 139 | * constraint, | ||
| 140 | * | ||
| 141 | * Multiple calls to set_min_bus_tput() will replace the previous rate | ||
| 142 | * value for this device. To remove the interconnect throughput | ||
| 143 | * restriction for this device, call with r = 0. | ||
| 144 | * | ||
| 145 | * No return value. | ||
| 146 | */ | ||
| 147 | void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r); | ||
| 148 | |||
| 149 | |||
| 150 | /** | ||
| 151 | * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency | ||
| 152 | * @dev: struct device * | ||
| 153 | * @t: maximum device wakeup latency in microseconds | ||
| 154 | * | ||
| 155 | * Request that the maximum amount of time necessary for a device to | ||
| 156 | * become accessible after its clocks are enabled should be no greater | ||
| 157 | * than 't' microseconds. Specifically, this represents the time from | ||
| 158 | * when a device driver enables device clocks with clk_enable(), to | ||
| 159 | * when the register reads and writes on the device will succeed. | ||
| 160 | * This function should be called before clk_disable() is called, | ||
| 161 | * since the power state transition decision may be made during | ||
| 162 | * clk_disable(). | ||
| 163 | * | ||
| 164 | * It is intended that underlying PM code will use this information to | ||
| 165 | * determine what power state to put the powerdomain enclosing this | ||
| 166 | * device into. | ||
| 167 | * | ||
| 168 | * Multiple calls to set_max_dev_wakeup_lat() will replace the | ||
| 169 | * previous wakeup latency values for this device. To remove the wakeup | ||
| 170 | * latency restriction for this device, call with t = -1. | ||
| 171 | * | ||
| 172 | * No return value. | ||
| 173 | */ | ||
| 174 | void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t); | ||
| 175 | |||
| 176 | |||
| 177 | /** | ||
| 178 | * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency | ||
| 179 | * @dev: struct device * | ||
| 180 | * @t: maximum DMA transfer start latency in microseconds | ||
| 181 | * | ||
| 182 | * Request that the maximum system DMA transfer start latency for this | ||
| 183 | * device 'dev' should be no greater than 't' microseconds. "DMA | ||
| 184 | * transfer start latency" here is defined as the elapsed time from | ||
| 185 | * when a device (e.g., McBSP) requests that a system DMA transfer | ||
| 186 | * start or continue, to the time at which data starts to flow into | ||
| 187 | * that device from the system DMA controller. | ||
| 188 | * | ||
| 189 | * It is intended that underlying PM code will use this information to | ||
| 190 | * determine what power state to put the CORE powerdomain into. | ||
| 191 | * | ||
| 192 | * Since system DMA transfers may not involve the MPU, this function | ||
| 193 | * will not affect MPU wakeup latency. Use set_max_cpu_lat() to do | ||
| 194 | * so. Similarly, this function will not affect device wakeup latency | ||
| 195 | * -- use set_max_dev_wakeup_lat() to affect that. | ||
| 196 | * | ||
| 197 | * Multiple calls to set_max_sdma_lat() will replace the previous t | ||
| 198 | * value for this device. To remove the maximum DMA latency for this | ||
| 199 | * device, call with t = -1. | ||
| 200 | * | ||
| 201 | * No return value. | ||
| 202 | */ | ||
| 203 | void omap_pm_set_max_sdma_lat(struct device *dev, long t); | ||
| 204 | |||
| 205 | |||
| 206 | /* | ||
| 207 | * DSP Bridge-specific constraints | ||
| 208 | */ | ||
| 209 | |||
| 210 | /** | ||
| 211 | * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table | ||
| 212 | * | ||
| 213 | * Intended for use by DSPBridge. Returns an array of OPP->DSP clock | ||
| 214 | * frequency entries. The final item in the array should have .rate = | ||
| 215 | * .opp_id = 0. | ||
| 216 | */ | ||
| 217 | const struct omap_opp *omap_pm_dsp_get_opp_table(void); | ||
| 218 | |||
| 219 | /** | ||
| 220 | * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge | ||
| 221 | * @opp_id: target DSP OPP ID | ||
| 222 | * | ||
| 223 | * Set a minimum OPP ID for the DSP. This is intended to be called | ||
| 224 | * only from the DSP Bridge MPU-side driver. Unfortunately, the only | ||
| 225 | * information that code receives from the DSP/BIOS load estimator is the | ||
| 226 | * target OPP ID; hence, this interface. No return value. | ||
| 227 | */ | ||
| 228 | void omap_pm_dsp_set_min_opp(u8 opp_id); | ||
| 229 | |||
| 230 | /** | ||
| 231 | * omap_pm_dsp_get_opp - report the current DSP OPP ID | ||
| 232 | * | ||
| 233 | * Report the current OPP for the DSP. Since on OMAP3, the DSP and | ||
| 234 | * MPU share a single voltage domain, the OPP ID returned back may | ||
| 235 | * represent a higher DSP speed than the OPP requested via | ||
| 236 | * omap_pm_dsp_set_min_opp(). | ||
| 237 | * | ||
| 238 | * Returns the current VDD1 OPP ID, or 0 upon error. | ||
| 239 | */ | ||
| 240 | u8 omap_pm_dsp_get_opp(void); | ||
| 241 | |||
| 242 | |||
| 243 | /* | ||
| 244 | * CPUFreq-originated constraint | ||
| 245 | * | ||
| 246 | * In the future, this should be handled by custom OPP clocktype | ||
| 247 | * functions. | ||
| 248 | */ | ||
| 249 | |||
| 250 | /** | ||
| 251 | * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr | ||
| 252 | * | ||
| 253 | * Provide a frequency table usable by CPUFreq for the current chip/board. | ||
| 254 | * Returns a pointer to a struct cpufreq_frequency_table array or NULL | ||
| 255 | * upon error. | ||
| 256 | */ | ||
| 257 | struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void); | ||
| 258 | |||
| 259 | /** | ||
| 260 | * omap_pm_cpu_set_freq - set the current minimum MPU frequency | ||
| 261 | * @f: MPU frequency in Hz | ||
| 262 | * | ||
| 263 | * Set the current minimum CPU frequency. The actual CPU frequency | ||
| 264 | * used could end up higher if the DSP requested a higher OPP. | ||
| 265 | * Intended to be called by plat-omap/cpu_omap.c:omap_target(). No | ||
| 266 | * return value. | ||
| 267 | */ | ||
| 268 | void omap_pm_cpu_set_freq(unsigned long f); | ||
| 269 | |||
| 270 | /** | ||
| 271 | * omap_pm_cpu_get_freq - report the current CPU frequency | ||
| 272 | * | ||
| 273 | * Returns the current MPU frequency, or 0 upon error. | ||
| 274 | */ | ||
| 275 | unsigned long omap_pm_cpu_get_freq(void); | ||
| 276 | |||
| 277 | |||
| 278 | /* | ||
| 279 | * Device context loss tracking | ||
| 280 | */ | ||
| 281 | |||
| 282 | /** | ||
| 283 | * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx | ||
| 284 | * @dev: struct device * | ||
| 285 | * | ||
| 286 | * This function returns the number of times that the device @dev has | ||
| 287 | * lost its internal context. This generally occurs on a powerdomain | ||
| 288 | * transition to OFF. Drivers use this as an optimization to avoid restoring | ||
| 289 | * context if the device hasn't lost it. To use, drivers should initially | ||
| 290 | * call this in their context save functions and store the result. Early in | ||
| 291 | * the driver's context restore function, the driver should call this function | ||
| 292 | * again, and compare the result to the stored counter. If they differ, the | ||
| 293 | * driver must restore device context. If the number of context losses | ||
| 294 | * exceeds the maximum positive integer, the function will wrap to 0 and | ||
| 295 | * continue counting. Returns the number of context losses for this device, | ||
| 296 | * or -EINVAL upon error. | ||
| 297 | */ | ||
| 298 | int omap_pm_get_dev_context_loss_count(struct device *dev); | ||
| 299 | |||
| 300 | |||
| 301 | #endif | ||
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h index 15dec7f1c7c0..b3ba5ac7b4a4 100644 --- a/arch/arm/plat-omap/include/mach/omap44xx.h +++ b/arch/arm/plat-omap/include/mach/omap44xx.h | |||
| @@ -33,14 +33,14 @@ | |||
| 33 | #define IRQ_SIR_IRQ 0x0040 | 33 | #define IRQ_SIR_IRQ 0x0040 |
| 34 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 | 34 | #define OMAP44XX_GIC_DIST_BASE 0x48241000 |
| 35 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 | 35 | #define OMAP44XX_GIC_CPU_BASE 0x48240100 |
| 36 | #define OMAP44XX_VA_GIC_CPU_BASE IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) | 36 | #define OMAP44XX_VA_GIC_CPU_BASE OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) |
| 37 | #define OMAP44XX_SCU_BASE 0x48240000 | 37 | #define OMAP44XX_SCU_BASE 0x48240000 |
| 38 | #define OMAP44XX_VA_SCU_BASE IO_ADDRESS(OMAP44XX_SCU_BASE) | 38 | #define OMAP44XX_VA_SCU_BASE OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE) |
| 39 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 | 39 | #define OMAP44XX_LOCAL_TWD_BASE 0x48240600 |
| 40 | #define OMAP44XX_VA_LOCAL_TWD_BASE IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) | 40 | #define OMAP44XX_VA_LOCAL_TWD_BASE OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE) |
| 41 | #define OMAP44XX_LOCAL_TWD_SIZE 0x00000100 | 41 | #define OMAP44XX_LOCAL_TWD_SIZE 0x00000100 |
| 42 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 | 42 | #define OMAP44XX_WKUPGEN_BASE 0x48281000 |
| 43 | #define OMAP44XX_VA_WKUPGEN_BASE IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) | 43 | #define OMAP44XX_VA_WKUPGEN_BASE OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE) |
| 44 | 44 | ||
| 45 | #endif /* __ASM_ARCH_OMAP44XX_H */ | 45 | #endif /* __ASM_ARCH_OMAP44XX_H */ |
| 46 | 46 | ||
diff --git a/arch/arm/plat-omap/include/mach/omap_device.h b/arch/arm/plat-omap/include/mach/omap_device.h new file mode 100644 index 000000000000..bd0e136db337 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap_device.h | |||
| @@ -0,0 +1,141 @@ | |||
| 1 | /* | ||
| 2 | * omap_device headers | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * Developed in collaboration with (alphabetical order): Benoit | ||
| 8 | * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram | ||
| 9 | * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard | ||
| 10 | * Woodruff | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | * | ||
| 16 | * Eventually this type of functionality should either be | ||
| 17 | * a) implemented via arch-specific pointers in platform_device | ||
| 18 | * or | ||
| 19 | * b) implemented as a proper omap_bus/omap_device in Linux, no more | ||
| 20 | * platform_device | ||
| 21 | * | ||
| 22 | * omap_device differs from omap_hwmod in that it includes external | ||
| 23 | * (e.g., board- and system-level) integration details. omap_hwmod | ||
| 24 | * stores hardware data that is invariant for a given OMAP chip. | ||
| 25 | * | ||
| 26 | * To do: | ||
| 27 | * - GPIO integration | ||
| 28 | * - regulator integration | ||
| 29 | * | ||
| 30 | */ | ||
| 31 | #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H | ||
| 32 | #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H | ||
| 33 | |||
| 34 | #include <linux/kernel.h> | ||
| 35 | #include <linux/platform_device.h> | ||
| 36 | |||
| 37 | #include <mach/omap_hwmod.h> | ||
| 38 | |||
| 39 | /* omap_device._state values */ | ||
| 40 | #define OMAP_DEVICE_STATE_UNKNOWN 0 | ||
| 41 | #define OMAP_DEVICE_STATE_ENABLED 1 | ||
| 42 | #define OMAP_DEVICE_STATE_IDLE 2 | ||
| 43 | #define OMAP_DEVICE_STATE_SHUTDOWN 3 | ||
| 44 | |||
| 45 | /** | ||
| 46 | * struct omap_device - omap_device wrapper for platform_devices | ||
| 47 | * @pdev: platform_device | ||
| 48 | * @hwmods: (one .. many per omap_device) | ||
| 49 | * @hwmods_cnt: ARRAY_SIZE() of @hwmods | ||
| 50 | * @pm_lats: ptr to an omap_device_pm_latency table | ||
| 51 | * @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats | ||
| 52 | * @pm_lat_level: array index of the last odpl entry executed - -1 if never | ||
| 53 | * @dev_wakeup_lat: dev wakeup latency in microseconds | ||
| 54 | * @_dev_wakeup_lat_limit: dev wakeup latency limit in usec - set by OMAP PM | ||
| 55 | * @_state: one of OMAP_DEVICE_STATE_* (see above) | ||
| 56 | * @flags: device flags | ||
| 57 | * | ||
| 58 | * Integrates omap_hwmod data into Linux platform_device. | ||
| 59 | * | ||
| 60 | * Field names beginning with underscores are for the internal use of | ||
| 61 | * the omap_device code. | ||
| 62 | * | ||
| 63 | */ | ||
| 64 | struct omap_device { | ||
| 65 | struct platform_device pdev; | ||
| 66 | struct omap_hwmod **hwmods; | ||
| 67 | struct omap_device_pm_latency *pm_lats; | ||
| 68 | u32 dev_wakeup_lat; | ||
| 69 | u32 _dev_wakeup_lat_limit; | ||
| 70 | u8 pm_lats_cnt; | ||
| 71 | s8 pm_lat_level; | ||
| 72 | u8 hwmods_cnt; | ||
| 73 | u8 _state; | ||
| 74 | }; | ||
| 75 | |||
| 76 | /* Device driver interface (call via platform_data fn ptrs) */ | ||
| 77 | |||
| 78 | int omap_device_enable(struct platform_device *pdev); | ||
| 79 | int omap_device_idle(struct platform_device *pdev); | ||
| 80 | int omap_device_shutdown(struct platform_device *pdev); | ||
| 81 | |||
| 82 | /* Core code interface */ | ||
| 83 | |||
| 84 | int omap_device_count_resources(struct omap_device *od); | ||
| 85 | int omap_device_fill_resources(struct omap_device *od, struct resource *res); | ||
| 86 | |||
| 87 | struct omap_device *omap_device_build(const char *pdev_name, int pdev_id, | ||
| 88 | struct omap_hwmod *oh, void *pdata, | ||
| 89 | int pdata_len, | ||
| 90 | struct omap_device_pm_latency *pm_lats, | ||
| 91 | int pm_lats_cnt); | ||
| 92 | |||
| 93 | struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, | ||
| 94 | struct omap_hwmod **oh, int oh_cnt, | ||
| 95 | void *pdata, int pdata_len, | ||
| 96 | struct omap_device_pm_latency *pm_lats, | ||
| 97 | int pm_lats_cnt); | ||
| 98 | |||
| 99 | int omap_device_register(struct omap_device *od); | ||
| 100 | |||
| 101 | /* OMAP PM interface */ | ||
| 102 | int omap_device_align_pm_lat(struct platform_device *pdev, | ||
| 103 | u32 new_wakeup_lat_limit); | ||
| 104 | struct powerdomain *omap_device_get_pwrdm(struct omap_device *od); | ||
| 105 | |||
| 106 | /* Other */ | ||
| 107 | |||
| 108 | int omap_device_idle_hwmods(struct omap_device *od); | ||
| 109 | int omap_device_enable_hwmods(struct omap_device *od); | ||
| 110 | |||
| 111 | int omap_device_disable_clocks(struct omap_device *od); | ||
| 112 | int omap_device_enable_clocks(struct omap_device *od); | ||
| 113 | |||
| 114 | |||
| 115 | /* | ||
| 116 | * Entries should be kept in latency order ascending | ||
| 117 | * | ||
| 118 | * deact_lat is the maximum number of microseconds required to complete | ||
| 119 | * deactivate_func() at the device's slowest OPP. | ||
| 120 | * | ||
| 121 | * act_lat is the maximum number of microseconds required to complete | ||
| 122 | * activate_func() at the device's slowest OPP. | ||
| 123 | * | ||
| 124 | * This will result in some suboptimal power management decisions at fast | ||
| 125 | * OPPs, but avoids having to recompute all device power management decisions | ||
| 126 | * if the system shifts from a fast OPP to a slow OPP (in order to meet | ||
| 127 | * latency requirements). | ||
| 128 | * | ||
| 129 | * XXX should deactivate_func/activate_func() take platform_device pointers | ||
| 130 | * rather than omap_device pointers? | ||
| 131 | */ | ||
| 132 | struct omap_device_pm_latency { | ||
| 133 | u32 deactivate_lat; | ||
| 134 | int (*deactivate_func)(struct omap_device *od); | ||
| 135 | u32 activate_lat; | ||
| 136 | int (*activate_func)(struct omap_device *od); | ||
| 137 | }; | ||
| 138 | |||
| 139 | |||
| 140 | #endif | ||
| 141 | |||
diff --git a/arch/arm/plat-omap/include/mach/omap_hwmod.h b/arch/arm/plat-omap/include/mach/omap_hwmod.h new file mode 100644 index 000000000000..1f79c20e2929 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/omap_hwmod.h | |||
| @@ -0,0 +1,447 @@ | |||
| 1 | /* | ||
| 2 | * omap_hwmod macros, structures | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * Created in collaboration with (alphabetical order): Benoit Cousson, | ||
| 8 | * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari | ||
| 9 | * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | * | ||
| 15 | * These headers and macros are used to define OMAP on-chip module | ||
| 16 | * data and their integration with other OMAP modules and Linux. | ||
| 17 | * | ||
| 18 | * References: | ||
| 19 | * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) | ||
| 20 | * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) | ||
| 21 | * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) | ||
| 22 | * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) | ||
| 23 | * - Open Core Protocol Specification 2.2 | ||
| 24 | * | ||
| 25 | * To do: | ||
| 26 | * - add interconnect error log structures | ||
| 27 | * - add pinmuxing | ||
| 28 | * - init_conn_id_bit (CONNID_BIT_VECTOR) | ||
| 29 | * - implement default hwmod SMS/SDRC flags? | ||
| 30 | * | ||
| 31 | */ | ||
| 32 | #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H | ||
| 33 | #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H | ||
| 34 | |||
| 35 | #include <linux/kernel.h> | ||
| 36 | #include <linux/ioport.h> | ||
| 37 | |||
| 38 | #include <mach/cpu.h> | ||
| 39 | |||
| 40 | struct omap_device; | ||
| 41 | |||
| 42 | /* OCP SYSCONFIG bit shifts/masks */ | ||
| 43 | #define SYSC_MIDLEMODE_SHIFT 12 | ||
| 44 | #define SYSC_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT) | ||
| 45 | #define SYSC_CLOCKACTIVITY_SHIFT 8 | ||
| 46 | #define SYSC_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT) | ||
| 47 | #define SYSC_SIDLEMODE_SHIFT 3 | ||
| 48 | #define SYSC_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT) | ||
| 49 | #define SYSC_ENAWAKEUP_SHIFT 2 | ||
| 50 | #define SYSC_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT) | ||
| 51 | #define SYSC_SOFTRESET_SHIFT 1 | ||
| 52 | #define SYSC_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT) | ||
| 53 | |||
| 54 | /* OCP SYSSTATUS bit shifts/masks */ | ||
| 55 | #define SYSS_RESETDONE_SHIFT 0 | ||
| 56 | #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT) | ||
| 57 | |||
| 58 | /* Master standby/slave idle mode flags */ | ||
| 59 | #define HWMOD_IDLEMODE_FORCE (1 << 0) | ||
| 60 | #define HWMOD_IDLEMODE_NO (1 << 1) | ||
| 61 | #define HWMOD_IDLEMODE_SMART (1 << 2) | ||
| 62 | |||
| 63 | |||
| 64 | /** | ||
| 65 | * struct omap_hwmod_dma_info - MPU address space handled by the hwmod | ||
| 66 | * @name: name of the DMA channel (module local name) | ||
| 67 | * @dma_ch: DMA channel ID | ||
| 68 | * | ||
| 69 | * @name should be something short, e.g., "tx" or "rx". It is for use | ||
| 70 | * by platform_get_resource_byname(). It is defined locally to the | ||
| 71 | * hwmod. | ||
| 72 | */ | ||
| 73 | struct omap_hwmod_dma_info { | ||
| 74 | const char *name; | ||
| 75 | u16 dma_ch; | ||
| 76 | }; | ||
| 77 | |||
| 78 | /** | ||
| 79 | * struct omap_hwmod_opt_clk - optional clocks used by this hwmod | ||
| 80 | * @role: "sys", "32k", "tv", etc -- for use in clk_get() | ||
| 81 | * @clkdev_dev_id: opt clock: clkdev dev_id string | ||
| 82 | * @clkdev_con_id: opt clock: clkdev con_id string | ||
| 83 | * @_clk: pointer to the struct clk (filled in at runtime) | ||
| 84 | * | ||
| 85 | * The module's interface clock and main functional clock should not | ||
| 86 | * be added as optional clocks. | ||
| 87 | */ | ||
| 88 | struct omap_hwmod_opt_clk { | ||
| 89 | const char *role; | ||
| 90 | const char *clkdev_dev_id; | ||
| 91 | const char *clkdev_con_id; | ||
| 92 | struct clk *_clk; | ||
| 93 | }; | ||
| 94 | |||
| 95 | |||
| 96 | /* omap_hwmod_omap2_firewall.flags bits */ | ||
| 97 | #define OMAP_FIREWALL_L3 (1 << 0) | ||
| 98 | #define OMAP_FIREWALL_L4 (1 << 1) | ||
| 99 | |||
| 100 | /** | ||
| 101 | * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data | ||
| 102 | * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_* | ||
| 103 | * @l4_fw_region: L4 firewall region ID | ||
| 104 | * @l4_prot_group: L4 protection group ID | ||
| 105 | * @flags: (see omap_hwmod_omap2_firewall.flags macros above) | ||
| 106 | */ | ||
| 107 | struct omap_hwmod_omap2_firewall { | ||
| 108 | u8 l3_perm_bit; | ||
| 109 | u8 l4_fw_region; | ||
| 110 | u8 l4_prot_group; | ||
| 111 | u8 flags; | ||
| 112 | }; | ||
| 113 | |||
| 114 | |||
| 115 | /* | ||
| 116 | * omap_hwmod_addr_space.flags bits | ||
| 117 | * | ||
| 118 | * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init. | ||
| 119 | * ADDR_TYPE_RT: Address space contains module register target data. | ||
| 120 | */ | ||
| 121 | #define ADDR_MAP_ON_INIT (1 << 0) | ||
| 122 | #define ADDR_TYPE_RT (1 << 1) | ||
| 123 | |||
| 124 | /** | ||
| 125 | * struct omap_hwmod_addr_space - MPU address space handled by the hwmod | ||
| 126 | * @pa_start: starting physical address | ||
| 127 | * @pa_end: ending physical address | ||
| 128 | * @flags: (see omap_hwmod_addr_space.flags macros above) | ||
| 129 | * | ||
| 130 | * Address space doesn't necessarily follow physical interconnect | ||
| 131 | * structure. GPMC is one example. | ||
| 132 | */ | ||
| 133 | struct omap_hwmod_addr_space { | ||
| 134 | u32 pa_start; | ||
| 135 | u32 pa_end; | ||
| 136 | u8 flags; | ||
| 137 | }; | ||
| 138 | |||
| 139 | |||
| 140 | /* | ||
| 141 | * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this | ||
| 142 | * interface to interact with the hwmod. Used to add sleep dependencies | ||
| 143 | * when the module is enabled or disabled. | ||
| 144 | */ | ||
| 145 | #define OCP_USER_MPU (1 << 0) | ||
| 146 | #define OCP_USER_SDMA (1 << 1) | ||
| 147 | |||
| 148 | /* omap_hwmod_ocp_if.flags bits */ | ||
| 149 | #define OCPIF_HAS_IDLEST (1 << 0) | ||
| 150 | #define OCPIF_SWSUP_IDLE (1 << 1) | ||
| 151 | #define OCPIF_CAN_BURST (1 << 2) | ||
| 152 | |||
| 153 | /** | ||
| 154 | * struct omap_hwmod_ocp_if - OCP interface data | ||
| 155 | * @master: struct omap_hwmod that initiates OCP transactions on this link | ||
| 156 | * @slave: struct omap_hwmod that responds to OCP transactions on this link | ||
| 157 | * @addr: address space associated with this link | ||
| 158 | * @clkdev_dev_id: interface clock: clkdev dev_id string | ||
| 159 | * @clkdev_con_id: interface clock: clkdev con_id string | ||
| 160 | * @_clk: pointer to the interface struct clk (filled in at runtime) | ||
| 161 | * @fw: interface firewall data | ||
| 162 | * @addr_cnt: ARRAY_SIZE(@addr) | ||
| 163 | * @width: OCP data width | ||
| 164 | * @thread_cnt: number of threads | ||
| 165 | * @max_burst_len: maximum burst length in @width sized words (0 if unlimited) | ||
| 166 | * @user: initiators using this interface (see OCP_USER_* macros above) | ||
| 167 | * @flags: OCP interface flags (see OCPIF_* macros above) | ||
| 168 | * | ||
| 169 | * It may also be useful to add a tag_cnt field for OCP2.x devices. | ||
| 170 | * | ||
| 171 | * Parameter names beginning with an underscore are managed internally by | ||
| 172 | * the omap_hwmod code and should not be set during initialization. | ||
| 173 | */ | ||
| 174 | struct omap_hwmod_ocp_if { | ||
| 175 | struct omap_hwmod *master; | ||
| 176 | struct omap_hwmod *slave; | ||
| 177 | struct omap_hwmod_addr_space *addr; | ||
| 178 | const char *clkdev_dev_id; | ||
| 179 | const char *clkdev_con_id; | ||
| 180 | struct clk *_clk; | ||
| 181 | union { | ||
| 182 | struct omap_hwmod_omap2_firewall omap2; | ||
| 183 | } fw; | ||
| 184 | u8 addr_cnt; | ||
| 185 | u8 width; | ||
| 186 | u8 thread_cnt; | ||
| 187 | u8 max_burst_len; | ||
| 188 | u8 user; | ||
| 189 | u8 flags; | ||
| 190 | }; | ||
| 191 | |||
| 192 | |||
| 193 | /* Macros for use in struct omap_hwmod_sysconfig */ | ||
| 194 | |||
| 195 | /* Flags for use in omap_hwmod_sysconfig.idlemodes */ | ||
| 196 | #define MASTER_STANDBY_SHIFT 2 | ||
| 197 | #define SLAVE_IDLE_SHIFT 0 | ||
| 198 | #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT) | ||
| 199 | #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT) | ||
| 200 | #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT) | ||
| 201 | #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) | ||
| 202 | #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) | ||
| 203 | #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) | ||
| 204 | |||
| 205 | /* omap_hwmod_sysconfig.sysc_flags capability flags */ | ||
| 206 | #define SYSC_HAS_AUTOIDLE (1 << 0) | ||
| 207 | #define SYSC_HAS_SOFTRESET (1 << 1) | ||
| 208 | #define SYSC_HAS_ENAWAKEUP (1 << 2) | ||
| 209 | #define SYSC_HAS_EMUFREE (1 << 3) | ||
| 210 | #define SYSC_HAS_CLOCKACTIVITY (1 << 4) | ||
| 211 | #define SYSC_HAS_SIDLEMODE (1 << 5) | ||
| 212 | #define SYSC_HAS_MIDLEMODE (1 << 6) | ||
| 213 | #define SYSS_MISSING (1 << 7) | ||
| 214 | |||
| 215 | /* omap_hwmod_sysconfig.clockact flags */ | ||
| 216 | #define CLOCKACT_TEST_BOTH 0x0 | ||
| 217 | #define CLOCKACT_TEST_MAIN 0x1 | ||
| 218 | #define CLOCKACT_TEST_ICLK 0x2 | ||
| 219 | #define CLOCKACT_TEST_NONE 0x3 | ||
| 220 | |||
| 221 | /** | ||
| 222 | * struct omap_hwmod_sysconfig - hwmod OCP_SYSCONFIG/OCP_SYSSTATUS data | ||
| 223 | * @rev_offs: IP block revision register offset (from module base addr) | ||
| 224 | * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) | ||
| 225 | * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) | ||
| 226 | * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} | ||
| 227 | * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported | ||
| 228 | * @clockact: the default value of the module CLOCKACTIVITY bits | ||
| 229 | * | ||
| 230 | * @clockact describes to the module which clocks are likely to be | ||
| 231 | * disabled when the PRCM issues its idle request to the module. Some | ||
| 232 | * modules have separate clockdomains for the interface clock and main | ||
| 233 | * functional clock, and can check whether they should acknowledge the | ||
| 234 | * idle request based on the internal module functionality that has | ||
| 235 | * been associated with the clocks marked in @clockact. This field is | ||
| 236 | * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below) | ||
| 237 | * | ||
| 238 | */ | ||
| 239 | struct omap_hwmod_sysconfig { | ||
| 240 | u16 rev_offs; | ||
| 241 | u16 sysc_offs; | ||
| 242 | u16 syss_offs; | ||
| 243 | u8 idlemodes; | ||
| 244 | u8 sysc_flags; | ||
| 245 | u8 clockact; | ||
| 246 | }; | ||
| 247 | |||
| 248 | /** | ||
| 249 | * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data | ||
| 250 | * @module_offs: PRCM submodule offset from the start of the PRM/CM | ||
| 251 | * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3) | ||
| 252 | * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs | ||
| 253 | * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3) | ||
| 254 | * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit | ||
| 255 | * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit | ||
| 256 | * | ||
| 257 | * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST, | ||
| 258 | * WKEN, GRPSEL registers. In an ideal world, no extra information | ||
| 259 | * would be needed for IDLEST information, but alas, there are some | ||
| 260 | * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit | ||
| 261 | * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST) | ||
| 262 | */ | ||
| 263 | struct omap_hwmod_omap2_prcm { | ||
| 264 | s16 module_offs; | ||
| 265 | u8 prcm_reg_id; | ||
| 266 | u8 module_bit; | ||
| 267 | u8 idlest_reg_id; | ||
| 268 | u8 idlest_idle_bit; | ||
| 269 | u8 idlest_stdby_bit; | ||
| 270 | }; | ||
| 271 | |||
| 272 | |||
| 273 | /** | ||
| 274 | * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data | ||
| 275 | * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2 | ||
| 276 | * @device_offs: device register offset from @module_offs | ||
| 277 | * @submodule_wkdep_bit: bit shift of the WKDEP range | ||
| 278 | */ | ||
| 279 | struct omap_hwmod_omap4_prcm { | ||
| 280 | u32 module_offs; | ||
| 281 | u16 device_offs; | ||
| 282 | u8 submodule_wkdep_bit; | ||
| 283 | }; | ||
| 284 | |||
| 285 | |||
| 286 | /* | ||
| 287 | * omap_hwmod.flags definitions | ||
| 288 | * | ||
| 289 | * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out | ||
| 290 | * of idle, rather than relying on module smart-idle | ||
| 291 | * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out | ||
| 292 | * of standby, rather than relying on module smart-standby | ||
| 293 | * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for | ||
| 294 | * SDRAM controller, etc. | ||
| 295 | * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM | ||
| 296 | * controller, etc. | ||
| 297 | * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup | ||
| 298 | */ | ||
| 299 | #define HWMOD_SWSUP_SIDLE (1 << 0) | ||
| 300 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) | ||
| 301 | #define HWMOD_INIT_NO_RESET (1 << 2) | ||
| 302 | #define HWMOD_INIT_NO_IDLE (1 << 3) | ||
| 303 | #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 4) | ||
| 304 | |||
| 305 | /* | ||
| 306 | * omap_hwmod._int_flags definitions | ||
| 307 | * These are for internal use only and are managed by the omap_hwmod code. | ||
| 308 | * | ||
| 309 | * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module | ||
| 310 | * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP | ||
| 311 | * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached | ||
| 312 | */ | ||
| 313 | #define _HWMOD_NO_MPU_PORT (1 << 0) | ||
| 314 | #define _HWMOD_WAKEUP_ENABLED (1 << 1) | ||
| 315 | #define _HWMOD_SYSCONFIG_LOADED (1 << 2) | ||
| 316 | |||
| 317 | /* | ||
| 318 | * omap_hwmod._state definitions | ||
| 319 | * | ||
| 320 | * INITIALIZED: reset (optionally), initialized, enabled, disabled | ||
| 321 | * (optionally) | ||
| 322 | * | ||
| 323 | * | ||
| 324 | */ | ||
| 325 | #define _HWMOD_STATE_UNKNOWN 0 | ||
| 326 | #define _HWMOD_STATE_REGISTERED 1 | ||
| 327 | #define _HWMOD_STATE_CLKS_INITED 2 | ||
| 328 | #define _HWMOD_STATE_INITIALIZED 3 | ||
| 329 | #define _HWMOD_STATE_ENABLED 4 | ||
| 330 | #define _HWMOD_STATE_IDLE 5 | ||
| 331 | #define _HWMOD_STATE_DISABLED 6 | ||
| 332 | |||
| 333 | /** | ||
| 334 | * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks) | ||
| 335 | * @name: name of the hwmod | ||
| 336 | * @od: struct omap_device currently associated with this hwmod (internal use) | ||
| 337 | * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) | ||
| 338 | * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt) | ||
| 339 | * @prcm: PRCM data pertaining to this hwmod | ||
| 340 | * @clkdev_dev_id: main clock: clkdev dev_id string | ||
| 341 | * @clkdev_con_id: main clock: clkdev con_id string | ||
| 342 | * @_clk: pointer to the main struct clk (filled in at runtime) | ||
| 343 | * @opt_clks: other device clocks that drivers can request (0..*) | ||
| 344 | * @masters: ptr to array of OCP ifs that this hwmod can initiate on | ||
| 345 | * @slaves: ptr to array of OCP ifs that this hwmod can respond on | ||
| 346 | * @sysconfig: device SYSCONFIG/SYSSTATUS register data | ||
| 347 | * @dev_attr: arbitrary device attributes that can be passed to the driver | ||
| 348 | * @_sysc_cache: internal-use hwmod flags | ||
| 349 | * @_rt_va: cached register target start address (internal use) | ||
| 350 | * @_mpu_port_index: cached MPU register target slave ID (internal use) | ||
| 351 | * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6) | ||
| 352 | * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift | ||
| 353 | * @mpu_irqs_cnt: number of @mpu_irqs | ||
| 354 | * @sdma_chs_cnt: number of @sdma_chs | ||
| 355 | * @opt_clks_cnt: number of @opt_clks | ||
| 356 | * @master_cnt: number of @master entries | ||
| 357 | * @slaves_cnt: number of @slave entries | ||
| 358 | * @response_lat: device OCP response latency (in interface clock cycles) | ||
| 359 | * @_int_flags: internal-use hwmod flags | ||
| 360 | * @_state: internal-use hwmod state | ||
| 361 | * @flags: hwmod flags (documented below) | ||
| 362 | * @omap_chip: OMAP chips this hwmod is present on | ||
| 363 | * @node: list node for hwmod list (internal use) | ||
| 364 | * | ||
| 365 | * @clkdev_dev_id, @clkdev_con_id, and @clk all refer to this module's "main | ||
| 366 | * clock," which for our purposes is defined as "the functional clock needed | ||
| 367 | * for register accesses to complete." Modules may not have a main clock if | ||
| 368 | * the interface clock also serves as a main clock. | ||
| 369 | * | ||
| 370 | * Parameter names beginning with an underscore are managed internally by | ||
| 371 | * the omap_hwmod code and should not be set during initialization. | ||
| 372 | */ | ||
| 373 | struct omap_hwmod { | ||
| 374 | const char *name; | ||
| 375 | struct omap_device *od; | ||
| 376 | u8 *mpu_irqs; | ||
| 377 | struct omap_hwmod_dma_info *sdma_chs; | ||
| 378 | union { | ||
| 379 | struct omap_hwmod_omap2_prcm omap2; | ||
| 380 | struct omap_hwmod_omap4_prcm omap4; | ||
| 381 | } prcm; | ||
| 382 | const char *clkdev_dev_id; | ||
| 383 | const char *clkdev_con_id; | ||
| 384 | struct clk *_clk; | ||
| 385 | struct omap_hwmod_opt_clk *opt_clks; | ||
| 386 | struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ | ||
| 387 | struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ | ||
| 388 | struct omap_hwmod_sysconfig *sysconfig; | ||
| 389 | void *dev_attr; | ||
| 390 | u32 _sysc_cache; | ||
| 391 | void __iomem *_rt_va; | ||
| 392 | struct list_head node; | ||
| 393 | u16 flags; | ||
| 394 | u8 _mpu_port_index; | ||
| 395 | u8 msuspendmux_reg_id; | ||
| 396 | u8 msuspendmux_shift; | ||
| 397 | u8 response_lat; | ||
| 398 | u8 mpu_irqs_cnt; | ||
| 399 | u8 sdma_chs_cnt; | ||
| 400 | u8 opt_clks_cnt; | ||
| 401 | u8 masters_cnt; | ||
| 402 | u8 slaves_cnt; | ||
| 403 | u8 hwmods_cnt; | ||
| 404 | u8 _int_flags; | ||
| 405 | u8 _state; | ||
| 406 | const struct omap_chip_id omap_chip; | ||
| 407 | }; | ||
| 408 | |||
| 409 | int omap_hwmod_init(struct omap_hwmod **ohs); | ||
| 410 | int omap_hwmod_register(struct omap_hwmod *oh); | ||
| 411 | int omap_hwmod_unregister(struct omap_hwmod *oh); | ||
| 412 | struct omap_hwmod *omap_hwmod_lookup(const char *name); | ||
| 413 | int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)); | ||
| 414 | int omap_hwmod_late_init(void); | ||
| 415 | |||
| 416 | int omap_hwmod_enable(struct omap_hwmod *oh); | ||
| 417 | int omap_hwmod_idle(struct omap_hwmod *oh); | ||
| 418 | int omap_hwmod_shutdown(struct omap_hwmod *oh); | ||
| 419 | |||
| 420 | int omap_hwmod_enable_clocks(struct omap_hwmod *oh); | ||
| 421 | int omap_hwmod_disable_clocks(struct omap_hwmod *oh); | ||
| 422 | |||
| 423 | int omap_hwmod_reset(struct omap_hwmod *oh); | ||
| 424 | void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); | ||
| 425 | |||
| 426 | void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs); | ||
| 427 | u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs); | ||
| 428 | |||
| 429 | int omap_hwmod_count_resources(struct omap_hwmod *oh); | ||
| 430 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); | ||
| 431 | |||
| 432 | struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); | ||
| 433 | |||
| 434 | int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, | ||
| 435 | struct omap_hwmod *init_oh); | ||
| 436 | int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, | ||
| 437 | struct omap_hwmod *init_oh); | ||
| 438 | |||
| 439 | int omap_hwmod_set_clockact_both(struct omap_hwmod *oh); | ||
| 440 | int omap_hwmod_set_clockact_main(struct omap_hwmod *oh); | ||
| 441 | int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh); | ||
| 442 | int omap_hwmod_set_clockact_none(struct omap_hwmod *oh); | ||
| 443 | |||
| 444 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh); | ||
| 445 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh); | ||
| 446 | |||
| 447 | #endif | ||
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h index 69c9e675d8ee..6271d8556a40 100644 --- a/arch/arm/plat-omap/include/mach/powerdomain.h +++ b/arch/arm/plat-omap/include/mach/powerdomain.h | |||
| @@ -117,6 +117,13 @@ struct powerdomain { | |||
| 117 | 117 | ||
| 118 | struct list_head node; | 118 | struct list_head node; |
| 119 | 119 | ||
| 120 | int state; | ||
| 121 | unsigned state_counter[4]; | ||
| 122 | |||
| 123 | #ifdef CONFIG_PM_DEBUG | ||
| 124 | s64 timer; | ||
| 125 | s64 state_timer[4]; | ||
| 126 | #endif | ||
| 120 | }; | 127 | }; |
| 121 | 128 | ||
| 122 | 129 | ||
| @@ -126,7 +133,8 @@ int pwrdm_register(struct powerdomain *pwrdm); | |||
| 126 | int pwrdm_unregister(struct powerdomain *pwrdm); | 133 | int pwrdm_unregister(struct powerdomain *pwrdm); |
| 127 | struct powerdomain *pwrdm_lookup(const char *name); | 134 | struct powerdomain *pwrdm_lookup(const char *name); |
| 128 | 135 | ||
| 129 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)); | 136 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), |
| 137 | void *user); | ||
| 130 | 138 | ||
| 131 | int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); | 139 | int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); |
| 132 | int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); | 140 | int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); |
| @@ -164,4 +172,9 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); | |||
| 164 | 172 | ||
| 165 | int pwrdm_wait_transition(struct powerdomain *pwrdm); | 173 | int pwrdm_wait_transition(struct powerdomain *pwrdm); |
| 166 | 174 | ||
| 175 | int pwrdm_state_switch(struct powerdomain *pwrdm); | ||
| 176 | int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); | ||
| 177 | int pwrdm_pre_transition(void); | ||
| 178 | int pwrdm_post_transition(void); | ||
| 179 | |||
| 167 | #endif | 180 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 0be18e4ff182..1c09c78a48f2 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h | |||
| @@ -21,19 +21,28 @@ | |||
| 21 | /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ | 21 | /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ |
| 22 | 22 | ||
| 23 | #define SDRC_SYSCONFIG 0x010 | 23 | #define SDRC_SYSCONFIG 0x010 |
| 24 | #define SDRC_CS_CFG 0x040 | ||
| 25 | #define SDRC_SHARING 0x044 | ||
| 26 | #define SDRC_ERR_TYPE 0x04C | ||
| 24 | #define SDRC_DLLA_CTRL 0x060 | 27 | #define SDRC_DLLA_CTRL 0x060 |
| 25 | #define SDRC_DLLA_STATUS 0x064 | 28 | #define SDRC_DLLA_STATUS 0x064 |
| 26 | #define SDRC_DLLB_CTRL 0x068 | 29 | #define SDRC_DLLB_CTRL 0x068 |
| 27 | #define SDRC_DLLB_STATUS 0x06C | 30 | #define SDRC_DLLB_STATUS 0x06C |
| 28 | #define SDRC_POWER 0x070 | 31 | #define SDRC_POWER 0x070 |
| 32 | #define SDRC_MCFG_0 0x080 | ||
| 29 | #define SDRC_MR_0 0x084 | 33 | #define SDRC_MR_0 0x084 |
| 34 | #define SDRC_EMR2_0 0x08c | ||
| 30 | #define SDRC_ACTIM_CTRL_A_0 0x09c | 35 | #define SDRC_ACTIM_CTRL_A_0 0x09c |
| 31 | #define SDRC_ACTIM_CTRL_B_0 0x0a0 | 36 | #define SDRC_ACTIM_CTRL_B_0 0x0a0 |
| 32 | #define SDRC_RFR_CTRL_0 0x0a4 | 37 | #define SDRC_RFR_CTRL_0 0x0a4 |
| 38 | #define SDRC_MANUAL_0 0x0a8 | ||
| 39 | #define SDRC_MCFG_1 0x0B0 | ||
| 33 | #define SDRC_MR_1 0x0B4 | 40 | #define SDRC_MR_1 0x0B4 |
| 41 | #define SDRC_EMR2_1 0x0BC | ||
| 34 | #define SDRC_ACTIM_CTRL_A_1 0x0C4 | 42 | #define SDRC_ACTIM_CTRL_A_1 0x0C4 |
| 35 | #define SDRC_ACTIM_CTRL_B_1 0x0C8 | 43 | #define SDRC_ACTIM_CTRL_B_1 0x0C8 |
| 36 | #define SDRC_RFR_CTRL_1 0x0D4 | 44 | #define SDRC_RFR_CTRL_1 0x0D4 |
| 45 | #define SDRC_MANUAL_1 0x0D8 | ||
| 37 | 46 | ||
| 38 | /* | 47 | /* |
| 39 | * These values represent the number of memory clock cycles between | 48 | * These values represent the number of memory clock cycles between |
| @@ -71,11 +80,11 @@ | |||
| 71 | */ | 80 | */ |
| 72 | 81 | ||
| 73 | #define OMAP242X_SMS_REGADDR(reg) \ | 82 | #define OMAP242X_SMS_REGADDR(reg) \ |
| 74 | (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) | 83 | (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg) |
| 75 | #define OMAP243X_SMS_REGADDR(reg) \ | 84 | #define OMAP243X_SMS_REGADDR(reg) \ |
| 76 | (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) | 85 | (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg) |
| 77 | #define OMAP343X_SMS_REGADDR(reg) \ | 86 | #define OMAP343X_SMS_REGADDR(reg) \ |
| 78 | (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) | 87 | (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg) |
| 79 | 88 | ||
| 80 | /* SMS register offsets - read/write with sms_{read,write}_reg() */ | 89 | /* SMS register offsets - read/write with sms_{read,write}_reg() */ |
| 81 | 90 | ||
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h index def0529c75eb..e249186d26e2 100644 --- a/arch/arm/plat-omap/include/mach/serial.h +++ b/arch/arm/plat-omap/include/mach/serial.h | |||
| @@ -13,6 +13,8 @@ | |||
| 13 | #ifndef __ASM_ARCH_SERIAL_H | 13 | #ifndef __ASM_ARCH_SERIAL_H |
| 14 | #define __ASM_ARCH_SERIAL_H | 14 | #define __ASM_ARCH_SERIAL_H |
| 15 | 15 | ||
| 16 | #include <linux/init.h> | ||
| 17 | |||
| 16 | #if defined(CONFIG_ARCH_OMAP1) | 18 | #if defined(CONFIG_ARCH_OMAP1) |
| 17 | /* OMAP1 serial ports */ | 19 | /* OMAP1 serial ports */ |
| 18 | #define OMAP_UART1_BASE 0xfffb0000 | 20 | #define OMAP_UART1_BASE 0xfffb0000 |
| @@ -53,6 +55,7 @@ | |||
| 53 | }) | 55 | }) |
| 54 | 56 | ||
| 55 | #ifndef __ASSEMBLER__ | 57 | #ifndef __ASSEMBLER__ |
| 58 | extern void __init omap_serial_early_init(void); | ||
| 56 | extern void omap_serial_init(void); | 59 | extern void omap_serial_init(void); |
| 57 | extern int omap_uart_can_sleep(void); | 60 | extern int omap_uart_can_sleep(void); |
| 58 | extern void omap_uart_check_wakeup(void); | 61 | extern void omap_uart_check_wakeup(void); |
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index 9b42d72d96cf..b6defa23e77e 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c | |||
| @@ -30,8 +30,8 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
| 30 | { | 30 | { |
| 31 | #ifdef CONFIG_ARCH_OMAP1 | 31 | #ifdef CONFIG_ARCH_OMAP1 |
| 32 | if (cpu_class_is_omap1()) { | 32 | if (cpu_class_is_omap1()) { |
| 33 | if (BETWEEN(p, IO_PHYS, IO_SIZE)) | 33 | if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) |
| 34 | return XLATE(p, IO_PHYS, IO_VIRT); | 34 | return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT); |
| 35 | } | 35 | } |
| 36 | if (cpu_is_omap730()) { | 36 | if (cpu_is_omap730()) { |
| 37 | if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) | 37 | if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) |
| @@ -132,3 +132,61 @@ void omap_iounmap(volatile void __iomem *addr) | |||
| 132 | __iounmap(addr); | 132 | __iounmap(addr); |
| 133 | } | 133 | } |
| 134 | EXPORT_SYMBOL(omap_iounmap); | 134 | EXPORT_SYMBOL(omap_iounmap); |
| 135 | |||
| 136 | /* | ||
| 137 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these | ||
| 138 | */ | ||
| 139 | |||
| 140 | u8 omap_readb(u32 pa) | ||
| 141 | { | ||
| 142 | if (cpu_class_is_omap1()) | ||
| 143 | return __raw_readb(OMAP1_IO_ADDRESS(pa)); | ||
| 144 | else | ||
| 145 | return __raw_readb(OMAP2_IO_ADDRESS(pa)); | ||
| 146 | } | ||
| 147 | EXPORT_SYMBOL(omap_readb); | ||
| 148 | |||
| 149 | u16 omap_readw(u32 pa) | ||
| 150 | { | ||
| 151 | if (cpu_class_is_omap1()) | ||
| 152 | return __raw_readw(OMAP1_IO_ADDRESS(pa)); | ||
| 153 | else | ||
| 154 | return __raw_readw(OMAP2_IO_ADDRESS(pa)); | ||
| 155 | } | ||
| 156 | EXPORT_SYMBOL(omap_readw); | ||
| 157 | |||
| 158 | u32 omap_readl(u32 pa) | ||
| 159 | { | ||
| 160 | if (cpu_class_is_omap1()) | ||
| 161 | return __raw_readl(OMAP1_IO_ADDRESS(pa)); | ||
| 162 | else | ||
| 163 | return __raw_readl(OMAP2_IO_ADDRESS(pa)); | ||
| 164 | } | ||
| 165 | EXPORT_SYMBOL(omap_readl); | ||
| 166 | |||
| 167 | void omap_writeb(u8 v, u32 pa) | ||
| 168 | { | ||
| 169 | if (cpu_class_is_omap1()) | ||
| 170 | __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); | ||
| 171 | else | ||
| 172 | __raw_writeb(v, OMAP2_IO_ADDRESS(pa)); | ||
| 173 | } | ||
| 174 | EXPORT_SYMBOL(omap_writeb); | ||
| 175 | |||
| 176 | void omap_writew(u16 v, u32 pa) | ||
| 177 | { | ||
| 178 | if (cpu_class_is_omap1()) | ||
| 179 | __raw_writew(v, OMAP1_IO_ADDRESS(pa)); | ||
| 180 | else | ||
| 181 | __raw_writew(v, OMAP2_IO_ADDRESS(pa)); | ||
| 182 | } | ||
| 183 | EXPORT_SYMBOL(omap_writew); | ||
| 184 | |||
| 185 | void omap_writel(u32 v, u32 pa) | ||
| 186 | { | ||
| 187 | if (cpu_class_is_omap1()) | ||
| 188 | __raw_writel(v, OMAP1_IO_ADDRESS(pa)); | ||
| 189 | else | ||
| 190 | __raw_writel(v, OMAP2_IO_ADDRESS(pa)); | ||
| 191 | } | ||
| 192 | EXPORT_SYMBOL(omap_writel); | ||
diff --git a/arch/arm/plat-omap/iommu-debug.c b/arch/arm/plat-omap/iommu-debug.c new file mode 100644 index 000000000000..c799b3b0d709 --- /dev/null +++ b/arch/arm/plat-omap/iommu-debug.c | |||
| @@ -0,0 +1,415 @@ | |||
| 1 | /* | ||
| 2 | * omap iommu: debugfs interface | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008-2009 Nokia Corporation | ||
| 5 | * | ||
| 6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/err.h> | ||
| 14 | #include <linux/clk.h> | ||
| 15 | #include <linux/io.h> | ||
| 16 | #include <linux/uaccess.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/debugfs.h> | ||
| 19 | |||
| 20 | #include <mach/iommu.h> | ||
| 21 | #include <mach/iovmm.h> | ||
| 22 | |||
| 23 | #include "iopgtable.h" | ||
| 24 | |||
| 25 | #define MAXCOLUMN 100 /* for short messages */ | ||
| 26 | |||
| 27 | static DEFINE_MUTEX(iommu_debug_lock); | ||
| 28 | |||
| 29 | static struct dentry *iommu_debug_root; | ||
| 30 | |||
| 31 | static ssize_t debug_read_ver(struct file *file, char __user *userbuf, | ||
| 32 | size_t count, loff_t *ppos) | ||
| 33 | { | ||
| 34 | u32 ver = iommu_arch_version(); | ||
| 35 | char buf[MAXCOLUMN], *p = buf; | ||
| 36 | |||
| 37 | p += sprintf(p, "H/W version: %d.%d\n", (ver >> 4) & 0xf , ver & 0xf); | ||
| 38 | |||
| 39 | return simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); | ||
| 40 | } | ||
| 41 | |||
| 42 | static ssize_t debug_read_regs(struct file *file, char __user *userbuf, | ||
| 43 | size_t count, loff_t *ppos) | ||
| 44 | { | ||
| 45 | struct iommu *obj = file->private_data; | ||
| 46 | char *p, *buf; | ||
| 47 | ssize_t bytes; | ||
| 48 | |||
| 49 | buf = kmalloc(count, GFP_KERNEL); | ||
| 50 | if (!buf) | ||
| 51 | return -ENOMEM; | ||
| 52 | p = buf; | ||
| 53 | |||
| 54 | mutex_lock(&iommu_debug_lock); | ||
| 55 | |||
| 56 | bytes = iommu_dump_ctx(obj, p, count); | ||
| 57 | bytes = simple_read_from_buffer(userbuf, count, ppos, buf, bytes); | ||
| 58 | |||
| 59 | mutex_unlock(&iommu_debug_lock); | ||
| 60 | kfree(buf); | ||
| 61 | |||
| 62 | return bytes; | ||
| 63 | } | ||
| 64 | |||
| 65 | static ssize_t debug_read_tlb(struct file *file, char __user *userbuf, | ||
| 66 | size_t count, loff_t *ppos) | ||
| 67 | { | ||
| 68 | struct iommu *obj = file->private_data; | ||
| 69 | char *p, *buf; | ||
| 70 | ssize_t bytes, rest; | ||
| 71 | |||
| 72 | buf = kmalloc(count, GFP_KERNEL); | ||
| 73 | if (!buf) | ||
| 74 | return -ENOMEM; | ||
| 75 | p = buf; | ||
| 76 | |||
| 77 | mutex_lock(&iommu_debug_lock); | ||
| 78 | |||
| 79 | p += sprintf(p, "%8s %8s\n", "cam:", "ram:"); | ||
| 80 | p += sprintf(p, "-----------------------------------------\n"); | ||
| 81 | rest = count - (p - buf); | ||
| 82 | p += dump_tlb_entries(obj, p, rest); | ||
| 83 | |||
| 84 | bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); | ||
| 85 | |||
| 86 | mutex_unlock(&iommu_debug_lock); | ||
| 87 | kfree(buf); | ||
| 88 | |||
| 89 | return bytes; | ||
| 90 | } | ||
| 91 | |||
| 92 | static ssize_t debug_write_pagetable(struct file *file, | ||
| 93 | const char __user *userbuf, size_t count, loff_t *ppos) | ||
| 94 | { | ||
| 95 | struct iotlb_entry e; | ||
| 96 | struct cr_regs cr; | ||
| 97 | int err; | ||
| 98 | struct iommu *obj = file->private_data; | ||
| 99 | char buf[MAXCOLUMN], *p = buf; | ||
| 100 | |||
| 101 | count = min(count, sizeof(buf)); | ||
| 102 | |||
| 103 | mutex_lock(&iommu_debug_lock); | ||
| 104 | if (copy_from_user(p, userbuf, count)) { | ||
| 105 | mutex_unlock(&iommu_debug_lock); | ||
| 106 | return -EFAULT; | ||
| 107 | } | ||
| 108 | |||
| 109 | sscanf(p, "%x %x", &cr.cam, &cr.ram); | ||
| 110 | if (!cr.cam || !cr.ram) { | ||
| 111 | mutex_unlock(&iommu_debug_lock); | ||
| 112 | return -EINVAL; | ||
| 113 | } | ||
| 114 | |||
| 115 | iotlb_cr_to_e(&cr, &e); | ||
| 116 | err = iopgtable_store_entry(obj, &e); | ||
| 117 | if (err) | ||
| 118 | dev_err(obj->dev, "%s: fail to store cr\n", __func__); | ||
| 119 | |||
| 120 | mutex_unlock(&iommu_debug_lock); | ||
| 121 | return count; | ||
| 122 | } | ||
| 123 | |||
| 124 | #define dump_ioptable_entry_one(lv, da, val) \ | ||
| 125 | ({ \ | ||
| 126 | int __err = 0; \ | ||
| 127 | ssize_t bytes; \ | ||
| 128 | const int maxcol = 22; \ | ||
| 129 | const char *str = "%d: %08x %08x\n"; \ | ||
| 130 | bytes = snprintf(p, maxcol, str, lv, da, val); \ | ||
| 131 | p += bytes; \ | ||
| 132 | len -= bytes; \ | ||
| 133 | if (len < maxcol) \ | ||
| 134 | __err = -ENOMEM; \ | ||
| 135 | __err; \ | ||
| 136 | }) | ||
| 137 | |||
| 138 | static ssize_t dump_ioptable(struct iommu *obj, char *buf, ssize_t len) | ||
| 139 | { | ||
| 140 | int i; | ||
| 141 | u32 *iopgd; | ||
| 142 | char *p = buf; | ||
| 143 | |||
| 144 | spin_lock(&obj->page_table_lock); | ||
| 145 | |||
| 146 | iopgd = iopgd_offset(obj, 0); | ||
| 147 | for (i = 0; i < PTRS_PER_IOPGD; i++, iopgd++) { | ||
| 148 | int j, err; | ||
| 149 | u32 *iopte; | ||
| 150 | u32 da; | ||
| 151 | |||
| 152 | if (!*iopgd) | ||
| 153 | continue; | ||
| 154 | |||
| 155 | if (!(*iopgd & IOPGD_TABLE)) { | ||
| 156 | da = i << IOPGD_SHIFT; | ||
| 157 | |||
| 158 | err = dump_ioptable_entry_one(1, da, *iopgd); | ||
| 159 | if (err) | ||
| 160 | goto out; | ||
| 161 | continue; | ||
| 162 | } | ||
| 163 | |||
| 164 | iopte = iopte_offset(iopgd, 0); | ||
| 165 | |||
| 166 | for (j = 0; j < PTRS_PER_IOPTE; j++, iopte++) { | ||
| 167 | if (!*iopte) | ||
| 168 | continue; | ||
| 169 | |||
| 170 | da = (i << IOPGD_SHIFT) + (j << IOPTE_SHIFT); | ||
| 171 | err = dump_ioptable_entry_one(2, da, *iopgd); | ||
| 172 | if (err) | ||
| 173 | goto out; | ||
| 174 | } | ||
| 175 | } | ||
| 176 | out: | ||
| 177 | spin_unlock(&obj->page_table_lock); | ||
| 178 | |||
| 179 | return p - buf; | ||
| 180 | } | ||
| 181 | |||
| 182 | static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf, | ||
| 183 | size_t count, loff_t *ppos) | ||
| 184 | { | ||
| 185 | struct iommu *obj = file->private_data; | ||
| 186 | char *p, *buf; | ||
| 187 | size_t bytes; | ||
| 188 | |||
| 189 | buf = (char *)__get_free_page(GFP_KERNEL); | ||
| 190 | if (!buf) | ||
| 191 | return -ENOMEM; | ||
| 192 | p = buf; | ||
| 193 | |||
| 194 | p += sprintf(p, "L: %8s %8s\n", "da:", "pa:"); | ||
| 195 | p += sprintf(p, "-----------------------------------------\n"); | ||
| 196 | |||
| 197 | mutex_lock(&iommu_debug_lock); | ||
| 198 | |||
| 199 | bytes = PAGE_SIZE - (p - buf); | ||
| 200 | p += dump_ioptable(obj, p, bytes); | ||
| 201 | |||
| 202 | bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); | ||
| 203 | |||
| 204 | mutex_unlock(&iommu_debug_lock); | ||
| 205 | free_page((unsigned long)buf); | ||
| 206 | |||
| 207 | return bytes; | ||
| 208 | } | ||
| 209 | |||
| 210 | static ssize_t debug_read_mmap(struct file *file, char __user *userbuf, | ||
| 211 | size_t count, loff_t *ppos) | ||
| 212 | { | ||
| 213 | struct iommu *obj = file->private_data; | ||
| 214 | char *p, *buf; | ||
| 215 | struct iovm_struct *tmp; | ||
| 216 | int uninitialized_var(i); | ||
| 217 | ssize_t bytes; | ||
| 218 | |||
| 219 | buf = (char *)__get_free_page(GFP_KERNEL); | ||
| 220 | if (!buf) | ||
| 221 | return -ENOMEM; | ||
| 222 | p = buf; | ||
| 223 | |||
| 224 | p += sprintf(p, "%-3s %-8s %-8s %6s %8s\n", | ||
| 225 | "No", "start", "end", "size", "flags"); | ||
| 226 | p += sprintf(p, "-------------------------------------------------\n"); | ||
| 227 | |||
| 228 | mutex_lock(&iommu_debug_lock); | ||
| 229 | |||
| 230 | list_for_each_entry(tmp, &obj->mmap, list) { | ||
| 231 | size_t len; | ||
| 232 | const char *str = "%3d %08x-%08x %6x %8x\n"; | ||
| 233 | const int maxcol = 39; | ||
| 234 | |||
| 235 | len = tmp->da_end - tmp->da_start; | ||
| 236 | p += snprintf(p, maxcol, str, | ||
| 237 | i, tmp->da_start, tmp->da_end, len, tmp->flags); | ||
| 238 | |||
| 239 | if (PAGE_SIZE - (p - buf) < maxcol) | ||
| 240 | break; | ||
| 241 | i++; | ||
| 242 | } | ||
| 243 | |||
| 244 | bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); | ||
| 245 | |||
| 246 | mutex_unlock(&iommu_debug_lock); | ||
| 247 | free_page((unsigned long)buf); | ||
| 248 | |||
| 249 | return bytes; | ||
| 250 | } | ||
| 251 | |||
| 252 | static ssize_t debug_read_mem(struct file *file, char __user *userbuf, | ||
| 253 | size_t count, loff_t *ppos) | ||
| 254 | { | ||
| 255 | struct iommu *obj = file->private_data; | ||
| 256 | char *p, *buf; | ||
| 257 | struct iovm_struct *area; | ||
| 258 | ssize_t bytes; | ||
| 259 | |||
| 260 | count = min_t(ssize_t, count, PAGE_SIZE); | ||
| 261 | |||
| 262 | buf = (char *)__get_free_page(GFP_KERNEL); | ||
| 263 | if (!buf) | ||
| 264 | return -ENOMEM; | ||
| 265 | p = buf; | ||
| 266 | |||
| 267 | mutex_lock(&iommu_debug_lock); | ||
| 268 | |||
| 269 | area = find_iovm_area(obj, (u32)ppos); | ||
| 270 | if (IS_ERR(area)) { | ||
| 271 | bytes = -EINVAL; | ||
| 272 | goto err_out; | ||
| 273 | } | ||
| 274 | memcpy(p, area->va, count); | ||
| 275 | p += count; | ||
| 276 | |||
| 277 | bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf); | ||
| 278 | err_out: | ||
| 279 | mutex_unlock(&iommu_debug_lock); | ||
| 280 | free_page((unsigned long)buf); | ||
| 281 | |||
| 282 | return bytes; | ||
| 283 | } | ||
| 284 | |||
| 285 | static ssize_t debug_write_mem(struct file *file, const char __user *userbuf, | ||
| 286 | size_t count, loff_t *ppos) | ||
| 287 | { | ||
| 288 | struct iommu *obj = file->private_data; | ||
| 289 | struct iovm_struct *area; | ||
| 290 | char *p, *buf; | ||
| 291 | |||
| 292 | count = min_t(size_t, count, PAGE_SIZE); | ||
| 293 | |||
| 294 | buf = (char *)__get_free_page(GFP_KERNEL); | ||
| 295 | if (!buf) | ||
| 296 | return -ENOMEM; | ||
| 297 | p = buf; | ||
| 298 | |||
| 299 | mutex_lock(&iommu_debug_lock); | ||
| 300 | |||
| 301 | if (copy_from_user(p, userbuf, count)) { | ||
| 302 | count = -EFAULT; | ||
| 303 | goto err_out; | ||
| 304 | } | ||
| 305 | |||
| 306 | area = find_iovm_area(obj, (u32)ppos); | ||
| 307 | if (IS_ERR(area)) { | ||
| 308 | count = -EINVAL; | ||
| 309 | goto err_out; | ||
| 310 | } | ||
| 311 | memcpy(area->va, p, count); | ||
| 312 | err_out: | ||
| 313 | mutex_unlock(&iommu_debug_lock); | ||
| 314 | free_page((unsigned long)buf); | ||
| 315 | |||
| 316 | return count; | ||
| 317 | } | ||
| 318 | |||
| 319 | static int debug_open_generic(struct inode *inode, struct file *file) | ||
| 320 | { | ||
| 321 | file->private_data = inode->i_private; | ||
| 322 | return 0; | ||
| 323 | } | ||
| 324 | |||
| 325 | #define DEBUG_FOPS(name) \ | ||
| 326 | static const struct file_operations debug_##name##_fops = { \ | ||
| 327 | .open = debug_open_generic, \ | ||
| 328 | .read = debug_read_##name, \ | ||
| 329 | .write = debug_write_##name, \ | ||
| 330 | }; | ||
| 331 | |||
| 332 | #define DEBUG_FOPS_RO(name) \ | ||
| 333 | static const struct file_operations debug_##name##_fops = { \ | ||
| 334 | .open = debug_open_generic, \ | ||
| 335 | .read = debug_read_##name, \ | ||
| 336 | }; | ||
| 337 | |||
| 338 | DEBUG_FOPS_RO(ver); | ||
| 339 | DEBUG_FOPS_RO(regs); | ||
| 340 | DEBUG_FOPS_RO(tlb); | ||
| 341 | DEBUG_FOPS(pagetable); | ||
| 342 | DEBUG_FOPS_RO(mmap); | ||
| 343 | DEBUG_FOPS(mem); | ||
| 344 | |||
| 345 | #define __DEBUG_ADD_FILE(attr, mode) \ | ||
| 346 | { \ | ||
| 347 | struct dentry *dent; \ | ||
| 348 | dent = debugfs_create_file(#attr, mode, parent, \ | ||
| 349 | obj, &debug_##attr##_fops); \ | ||
| 350 | if (!dent) \ | ||
| 351 | return -ENOMEM; \ | ||
| 352 | } | ||
| 353 | |||
| 354 | #define DEBUG_ADD_FILE(name) __DEBUG_ADD_FILE(name, 600) | ||
| 355 | #define DEBUG_ADD_FILE_RO(name) __DEBUG_ADD_FILE(name, 400) | ||
| 356 | |||
| 357 | static int iommu_debug_register(struct device *dev, void *data) | ||
| 358 | { | ||
| 359 | struct platform_device *pdev = to_platform_device(dev); | ||
| 360 | struct iommu *obj = platform_get_drvdata(pdev); | ||
| 361 | struct dentry *d, *parent; | ||
| 362 | |||
| 363 | if (!obj || !obj->dev) | ||
| 364 | return -EINVAL; | ||
| 365 | |||
| 366 | d = debugfs_create_dir(obj->name, iommu_debug_root); | ||
| 367 | if (!d) | ||
| 368 | return -ENOMEM; | ||
| 369 | parent = d; | ||
| 370 | |||
| 371 | d = debugfs_create_u8("nr_tlb_entries", 400, parent, | ||
| 372 | (u8 *)&obj->nr_tlb_entries); | ||
| 373 | if (!d) | ||
| 374 | return -ENOMEM; | ||
| 375 | |||
| 376 | DEBUG_ADD_FILE_RO(ver); | ||
| 377 | DEBUG_ADD_FILE_RO(regs); | ||
| 378 | DEBUG_ADD_FILE_RO(tlb); | ||
| 379 | DEBUG_ADD_FILE(pagetable); | ||
| 380 | DEBUG_ADD_FILE_RO(mmap); | ||
| 381 | DEBUG_ADD_FILE(mem); | ||
| 382 | |||
| 383 | return 0; | ||
| 384 | } | ||
| 385 | |||
| 386 | static int __init iommu_debug_init(void) | ||
| 387 | { | ||
| 388 | struct dentry *d; | ||
| 389 | int err; | ||
| 390 | |||
| 391 | d = debugfs_create_dir("iommu", NULL); | ||
| 392 | if (!d) | ||
| 393 | return -ENOMEM; | ||
| 394 | iommu_debug_root = d; | ||
| 395 | |||
| 396 | err = foreach_iommu_device(d, iommu_debug_register); | ||
| 397 | if (err) | ||
| 398 | goto err_out; | ||
| 399 | return 0; | ||
| 400 | |||
| 401 | err_out: | ||
| 402 | debugfs_remove_recursive(iommu_debug_root); | ||
| 403 | return err; | ||
| 404 | } | ||
| 405 | module_init(iommu_debug_init) | ||
| 406 | |||
| 407 | static void __exit iommu_debugfs_exit(void) | ||
| 408 | { | ||
| 409 | debugfs_remove_recursive(iommu_debug_root); | ||
| 410 | } | ||
| 411 | module_exit(iommu_debugfs_exit) | ||
| 412 | |||
| 413 | MODULE_DESCRIPTION("omap iommu: debugfs interface"); | ||
| 414 | MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>"); | ||
| 415 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index 4a0301399013..4b6012707307 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c | |||
| @@ -351,16 +351,14 @@ EXPORT_SYMBOL_GPL(flush_iotlb_all); | |||
| 351 | 351 | ||
| 352 | #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE) | 352 | #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE) |
| 353 | 353 | ||
| 354 | ssize_t iommu_dump_ctx(struct iommu *obj, char *buf) | 354 | ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes) |
| 355 | { | 355 | { |
| 356 | ssize_t bytes; | ||
| 357 | |||
| 358 | if (!obj || !buf) | 356 | if (!obj || !buf) |
| 359 | return -EINVAL; | 357 | return -EINVAL; |
| 360 | 358 | ||
| 361 | clk_enable(obj->clk); | 359 | clk_enable(obj->clk); |
| 362 | 360 | ||
| 363 | bytes = arch_iommu->dump_ctx(obj, buf); | 361 | bytes = arch_iommu->dump_ctx(obj, buf, bytes); |
| 364 | 362 | ||
| 365 | clk_disable(obj->clk); | 363 | clk_disable(obj->clk); |
| 366 | 364 | ||
| @@ -368,7 +366,7 @@ ssize_t iommu_dump_ctx(struct iommu *obj, char *buf) | |||
| 368 | } | 366 | } |
| 369 | EXPORT_SYMBOL_GPL(iommu_dump_ctx); | 367 | EXPORT_SYMBOL_GPL(iommu_dump_ctx); |
| 370 | 368 | ||
| 371 | static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs) | 369 | static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num) |
| 372 | { | 370 | { |
| 373 | int i; | 371 | int i; |
| 374 | struct iotlb_lock saved, l; | 372 | struct iotlb_lock saved, l; |
| @@ -379,7 +377,7 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs) | |||
| 379 | iotlb_lock_get(obj, &saved); | 377 | iotlb_lock_get(obj, &saved); |
| 380 | memcpy(&l, &saved, sizeof(saved)); | 378 | memcpy(&l, &saved, sizeof(saved)); |
| 381 | 379 | ||
| 382 | for (i = 0; i < obj->nr_tlb_entries; i++) { | 380 | for (i = 0; i < num; i++) { |
| 383 | struct cr_regs tmp; | 381 | struct cr_regs tmp; |
| 384 | 382 | ||
| 385 | iotlb_lock_get(obj, &l); | 383 | iotlb_lock_get(obj, &l); |
| @@ -402,18 +400,21 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs) | |||
| 402 | * @obj: target iommu | 400 | * @obj: target iommu |
| 403 | * @buf: output buffer | 401 | * @buf: output buffer |
| 404 | **/ | 402 | **/ |
| 405 | size_t dump_tlb_entries(struct iommu *obj, char *buf) | 403 | size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes) |
| 406 | { | 404 | { |
| 407 | int i, n; | 405 | int i, num; |
| 408 | struct cr_regs *cr; | 406 | struct cr_regs *cr; |
| 409 | char *p = buf; | 407 | char *p = buf; |
| 410 | 408 | ||
| 411 | cr = kcalloc(obj->nr_tlb_entries, sizeof(*cr), GFP_KERNEL); | 409 | num = bytes / sizeof(*cr); |
| 410 | num = min(obj->nr_tlb_entries, num); | ||
| 411 | |||
| 412 | cr = kcalloc(num, sizeof(*cr), GFP_KERNEL); | ||
| 412 | if (!cr) | 413 | if (!cr) |
| 413 | return 0; | 414 | return 0; |
| 414 | 415 | ||
| 415 | n = __dump_tlb_entries(obj, cr); | 416 | num = __dump_tlb_entries(obj, cr, num); |
| 416 | for (i = 0; i < n; i++) | 417 | for (i = 0; i < num; i++) |
| 417 | p += iotlb_dump_cr(obj, cr + i, p); | 418 | p += iotlb_dump_cr(obj, cr + i, p); |
| 418 | kfree(cr); | 419 | kfree(cr); |
| 419 | 420 | ||
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c index 2fce2c151a95..6fc52fcbdc03 100644 --- a/arch/arm/plat-omap/iovmm.c +++ b/arch/arm/plat-omap/iovmm.c | |||
| @@ -199,7 +199,7 @@ static void *vmap_sg(const struct sg_table *sgt) | |||
| 199 | va += bytes; | 199 | va += bytes; |
| 200 | } | 200 | } |
| 201 | 201 | ||
| 202 | flush_cache_vmap(new->addr, total); | 202 | flush_cache_vmap(new->addr, new->addr + total); |
| 203 | return new->addr; | 203 | return new->addr; |
| 204 | 204 | ||
| 205 | err_out: | 205 | err_out: |
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c new file mode 100644 index 000000000000..e98f0a2a6c26 --- /dev/null +++ b/arch/arm/plat-omap/omap-pm-noop.c | |||
| @@ -0,0 +1,296 @@ | |||
| 1 | /* | ||
| 2 | * omap-pm-noop.c - OMAP power management interface - dummy version | ||
| 3 | * | ||
| 4 | * This code implements the OMAP power management interface to | ||
| 5 | * drivers, CPUIdle, CPUFreq, and DSP Bridge. It is strictly for | ||
| 6 | * debug/demonstration use, as it does nothing but printk() whenever a | ||
| 7 | * function is called (when DEBUG is defined, below) | ||
| 8 | * | ||
| 9 | * Copyright (C) 2008-2009 Texas Instruments, Inc. | ||
| 10 | * Copyright (C) 2008-2009 Nokia Corporation | ||
| 11 | * Paul Walmsley | ||
| 12 | * | ||
| 13 | * Interface developed by (in alphabetical order): | ||
| 14 | * Karthik Dasu, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan | ||
| 15 | * Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, Richard Woodruff | ||
| 16 | */ | ||
| 17 | |||
| 18 | #undef DEBUG | ||
| 19 | |||
| 20 | #include <linux/init.h> | ||
| 21 | #include <linux/cpufreq.h> | ||
| 22 | #include <linux/device.h> | ||
| 23 | |||
| 24 | /* Interface documentation is in mach/omap-pm.h */ | ||
| 25 | #include <mach/omap-pm.h> | ||
| 26 | |||
| 27 | #include <mach/powerdomain.h> | ||
| 28 | |||
| 29 | struct omap_opp *dsp_opps; | ||
| 30 | struct omap_opp *mpu_opps; | ||
| 31 | struct omap_opp *l3_opps; | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Device-driver-originated constraints (via board-*.c files) | ||
| 35 | */ | ||
| 36 | |||
| 37 | void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t) | ||
| 38 | { | ||
| 39 | if (!dev || t < -1) { | ||
| 40 | WARN_ON(1); | ||
| 41 | return; | ||
| 42 | }; | ||
| 43 | |||
| 44 | if (t == -1) | ||
| 45 | pr_debug("OMAP PM: remove max MPU wakeup latency constraint: " | ||
| 46 | "dev %s\n", dev_name(dev)); | ||
| 47 | else | ||
| 48 | pr_debug("OMAP PM: add max MPU wakeup latency constraint: " | ||
| 49 | "dev %s, t = %ld usec\n", dev_name(dev), t); | ||
| 50 | |||
| 51 | /* | ||
| 52 | * For current Linux, this needs to map the MPU to a | ||
| 53 | * powerdomain, then go through the list of current max lat | ||
| 54 | * constraints on the MPU and find the smallest. If | ||
| 55 | * the latency constraint has changed, the code should | ||
| 56 | * recompute the state to enter for the next powerdomain | ||
| 57 | * state. | ||
| 58 | * | ||
| 59 | * TI CDP code can call constraint_set here. | ||
| 60 | */ | ||
| 61 | } | ||
| 62 | |||
| 63 | void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r) | ||
| 64 | { | ||
| 65 | if (!dev || (agent_id != OCP_INITIATOR_AGENT && | ||
| 66 | agent_id != OCP_TARGET_AGENT)) { | ||
| 67 | WARN_ON(1); | ||
| 68 | return; | ||
| 69 | }; | ||
| 70 | |||
| 71 | if (r == 0) | ||
| 72 | pr_debug("OMAP PM: remove min bus tput constraint: " | ||
| 73 | "dev %s for agent_id %d\n", dev_name(dev), agent_id); | ||
| 74 | else | ||
| 75 | pr_debug("OMAP PM: add min bus tput constraint: " | ||
| 76 | "dev %s for agent_id %d: rate %ld KiB\n", | ||
| 77 | dev_name(dev), agent_id, r); | ||
| 78 | |||
| 79 | /* | ||
| 80 | * This code should model the interconnect and compute the | ||
| 81 | * required clock frequency, convert that to a VDD2 OPP ID, then | ||
| 82 | * set the VDD2 OPP appropriately. | ||
| 83 | * | ||
| 84 | * TI CDP code can call constraint_set here on the VDD2 OPP. | ||
| 85 | */ | ||
| 86 | } | ||
| 87 | |||
| 88 | void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t) | ||
| 89 | { | ||
| 90 | if (!dev || t < -1) { | ||
| 91 | WARN_ON(1); | ||
| 92 | return; | ||
| 93 | }; | ||
| 94 | |||
| 95 | if (t == -1) | ||
| 96 | pr_debug("OMAP PM: remove max device latency constraint: " | ||
| 97 | "dev %s\n", dev_name(dev)); | ||
| 98 | else | ||
| 99 | pr_debug("OMAP PM: add max device latency constraint: " | ||
| 100 | "dev %s, t = %ld usec\n", dev_name(dev), t); | ||
| 101 | |||
| 102 | /* | ||
| 103 | * For current Linux, this needs to map the device to a | ||
| 104 | * powerdomain, then go through the list of current max lat | ||
| 105 | * constraints on that powerdomain and find the smallest. If | ||
| 106 | * the latency constraint has changed, the code should | ||
| 107 | * recompute the state to enter for the next powerdomain | ||
| 108 | * state. Conceivably, this code should also determine | ||
| 109 | * whether to actually disable the device clocks or not, | ||
| 110 | * depending on how long it takes to re-enable the clocks. | ||
| 111 | * | ||
| 112 | * TI CDP code can call constraint_set here. | ||
| 113 | */ | ||
| 114 | } | ||
| 115 | |||
| 116 | void omap_pm_set_max_sdma_lat(struct device *dev, long t) | ||
| 117 | { | ||
| 118 | if (!dev || t < -1) { | ||
| 119 | WARN_ON(1); | ||
| 120 | return; | ||
| 121 | }; | ||
| 122 | |||
| 123 | if (t == -1) | ||
| 124 | pr_debug("OMAP PM: remove max DMA latency constraint: " | ||
| 125 | "dev %s\n", dev_name(dev)); | ||
| 126 | else | ||
| 127 | pr_debug("OMAP PM: add max DMA latency constraint: " | ||
| 128 | "dev %s, t = %ld usec\n", dev_name(dev), t); | ||
| 129 | |||
| 130 | /* | ||
| 131 | * For current Linux PM QOS params, this code should scan the | ||
| 132 | * list of maximum CPU and DMA latencies and select the | ||
| 133 | * smallest, then set cpu_dma_latency pm_qos_param | ||
| 134 | * accordingly. | ||
| 135 | * | ||
| 136 | * For future Linux PM QOS params, with separate CPU and DMA | ||
| 137 | * latency params, this code should just set the dma_latency param. | ||
| 138 | * | ||
| 139 | * TI CDP code can call constraint_set here. | ||
| 140 | */ | ||
| 141 | |||
| 142 | } | ||
| 143 | |||
| 144 | |||
| 145 | /* | ||
| 146 | * DSP Bridge-specific constraints | ||
| 147 | */ | ||
| 148 | |||
| 149 | const struct omap_opp *omap_pm_dsp_get_opp_table(void) | ||
| 150 | { | ||
| 151 | pr_debug("OMAP PM: DSP request for OPP table\n"); | ||
| 152 | |||
| 153 | /* | ||
| 154 | * Return DSP frequency table here: The final item in the | ||
| 155 | * array should have .rate = .opp_id = 0. | ||
| 156 | */ | ||
| 157 | |||
| 158 | return NULL; | ||
| 159 | } | ||
| 160 | |||
| 161 | void omap_pm_dsp_set_min_opp(u8 opp_id) | ||
| 162 | { | ||
| 163 | if (opp_id == 0) { | ||
| 164 | WARN_ON(1); | ||
| 165 | return; | ||
| 166 | } | ||
| 167 | |||
| 168 | pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id); | ||
| 169 | |||
| 170 | /* | ||
| 171 | * | ||
| 172 | * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we | ||
| 173 | * can just test to see which is higher, the CPU's desired OPP | ||
| 174 | * ID or the DSP's desired OPP ID, and use whichever is | ||
| 175 | * highest. | ||
| 176 | * | ||
| 177 | * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP | ||
| 178 | * rate is keyed on MPU speed, not the OPP ID. So we need to | ||
| 179 | * map the OPP ID to the MPU speed for use with clk_set_rate() | ||
| 180 | * if it is higher than the current OPP clock rate. | ||
| 181 | * | ||
| 182 | */ | ||
| 183 | } | ||
| 184 | |||
| 185 | |||
| 186 | u8 omap_pm_dsp_get_opp(void) | ||
| 187 | { | ||
| 188 | pr_debug("OMAP PM: DSP requests current DSP OPP ID\n"); | ||
| 189 | |||
| 190 | /* | ||
| 191 | * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock | ||
| 192 | * | ||
| 193 | * CDP12.14+: | ||
| 194 | * Call clk_get_rate() on the OPP custom clock, map that to an | ||
| 195 | * OPP ID using the tables defined in board-*.c/chip-*.c files. | ||
| 196 | */ | ||
| 197 | |||
| 198 | return 0; | ||
| 199 | } | ||
| 200 | |||
| 201 | /* | ||
| 202 | * CPUFreq-originated constraint | ||
| 203 | * | ||
| 204 | * In the future, this should be handled by custom OPP clocktype | ||
| 205 | * functions. | ||
| 206 | */ | ||
| 207 | |||
| 208 | struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void) | ||
| 209 | { | ||
| 210 | pr_debug("OMAP PM: CPUFreq request for frequency table\n"); | ||
| 211 | |||
| 212 | /* | ||
| 213 | * Return CPUFreq frequency table here: loop over | ||
| 214 | * all VDD1 clkrates, pull out the mpu_ck frequencies, build | ||
| 215 | * table | ||
| 216 | */ | ||
| 217 | |||
| 218 | return NULL; | ||
| 219 | } | ||
| 220 | |||
| 221 | void omap_pm_cpu_set_freq(unsigned long f) | ||
| 222 | { | ||
| 223 | if (f == 0) { | ||
| 224 | WARN_ON(1); | ||
| 225 | return; | ||
| 226 | } | ||
| 227 | |||
| 228 | pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n", | ||
| 229 | f); | ||
| 230 | |||
| 231 | /* | ||
| 232 | * For l-o dev tree, determine whether MPU freq or DSP OPP id | ||
| 233 | * freq is higher. Find the OPP ID corresponding to the | ||
| 234 | * higher frequency. Call clk_round_rate() and clk_set_rate() | ||
| 235 | * on the OPP custom clock. | ||
| 236 | * | ||
| 237 | * CDP should just be able to set the VDD1 OPP clock rate here. | ||
| 238 | */ | ||
| 239 | } | ||
| 240 | |||
| 241 | unsigned long omap_pm_cpu_get_freq(void) | ||
| 242 | { | ||
| 243 | pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n"); | ||
| 244 | |||
| 245 | /* | ||
| 246 | * Call clk_get_rate() on the mpu_ck. | ||
| 247 | */ | ||
| 248 | |||
| 249 | return 0; | ||
| 250 | } | ||
| 251 | |||
| 252 | /* | ||
| 253 | * Device context loss tracking | ||
| 254 | */ | ||
| 255 | |||
| 256 | int omap_pm_get_dev_context_loss_count(struct device *dev) | ||
| 257 | { | ||
| 258 | if (!dev) { | ||
| 259 | WARN_ON(1); | ||
| 260 | return -EINVAL; | ||
| 261 | }; | ||
| 262 | |||
| 263 | pr_debug("OMAP PM: returning context loss count for dev %s\n", | ||
| 264 | dev_name(dev)); | ||
| 265 | |||
| 266 | /* | ||
| 267 | * Map the device to the powerdomain. Return the powerdomain | ||
| 268 | * off counter. | ||
| 269 | */ | ||
| 270 | |||
| 271 | return 0; | ||
| 272 | } | ||
| 273 | |||
| 274 | |||
| 275 | /* Should be called before clk framework init */ | ||
| 276 | int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table, | ||
| 277 | struct omap_opp *dsp_opp_table, | ||
| 278 | struct omap_opp *l3_opp_table) | ||
| 279 | { | ||
| 280 | mpu_opps = mpu_opp_table; | ||
| 281 | dsp_opps = dsp_opp_table; | ||
| 282 | l3_opps = l3_opp_table; | ||
| 283 | return 0; | ||
| 284 | } | ||
| 285 | |||
| 286 | /* Must be called after clock framework is initialized */ | ||
| 287 | int __init omap_pm_if_init(void) | ||
| 288 | { | ||
| 289 | return 0; | ||
| 290 | } | ||
| 291 | |||
| 292 | void omap_pm_if_exit(void) | ||
| 293 | { | ||
| 294 | /* Deallocate CPUFreq frequency table here */ | ||
| 295 | } | ||
| 296 | |||
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c new file mode 100644 index 000000000000..2c409fc6dd21 --- /dev/null +++ b/arch/arm/plat-omap/omap_device.c | |||
| @@ -0,0 +1,687 @@ | |||
| 1 | /* | ||
| 2 | * omap_device implementation | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Nokia Corporation | ||
| 5 | * Paul Walmsley | ||
| 6 | * | ||
| 7 | * Developed in collaboration with (alphabetical order): Benoit | ||
| 8 | * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram | ||
| 9 | * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard | ||
| 10 | * Woodruff | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | * | ||
| 16 | * This code provides a consistent interface for OMAP device drivers | ||
| 17 | * to control power management and interconnect properties of their | ||
| 18 | * devices. | ||
| 19 | * | ||
| 20 | * In the medium- to long-term, this code should either be | ||
| 21 | * a) implemented via arch-specific pointers in platform_data | ||
| 22 | * or | ||
| 23 | * b) implemented as a proper omap_bus/omap_device in Linux, no more | ||
| 24 | * platform_data func pointers | ||
| 25 | * | ||
| 26 | * | ||
| 27 | * Guidelines for usage by driver authors: | ||
| 28 | * | ||
| 29 | * 1. These functions are intended to be used by device drivers via | ||
| 30 | * function pointers in struct platform_data. As an example, | ||
| 31 | * omap_device_enable() should be passed to the driver as | ||
| 32 | * | ||
| 33 | * struct foo_driver_platform_data { | ||
| 34 | * ... | ||
| 35 | * int (*device_enable)(struct platform_device *pdev); | ||
| 36 | * ... | ||
| 37 | * } | ||
| 38 | * | ||
| 39 | * Note that the generic "device_enable" name is used, rather than | ||
| 40 | * "omap_device_enable". This is so other architectures can pass in their | ||
| 41 | * own enable/disable functions here. | ||
| 42 | * | ||
| 43 | * This should be populated during device setup: | ||
| 44 | * | ||
| 45 | * ... | ||
| 46 | * pdata->device_enable = omap_device_enable; | ||
| 47 | * ... | ||
| 48 | * | ||
| 49 | * 2. Drivers should first check to ensure the function pointer is not null | ||
| 50 | * before calling it, as in: | ||
| 51 | * | ||
| 52 | * if (pdata->device_enable) | ||
| 53 | * pdata->device_enable(pdev); | ||
| 54 | * | ||
| 55 | * This allows other architectures that don't use similar device_enable()/ | ||
| 56 | * device_shutdown() functions to execute normally. | ||
| 57 | * | ||
| 58 | * ... | ||
| 59 | * | ||
| 60 | * Suggested usage by device drivers: | ||
| 61 | * | ||
| 62 | * During device initialization: | ||
| 63 | * device_enable() | ||
| 64 | * | ||
| 65 | * During device idle: | ||
| 66 | * (save remaining device context if necessary) | ||
| 67 | * device_idle(); | ||
| 68 | * | ||
| 69 | * During device resume: | ||
| 70 | * device_enable(); | ||
| 71 | * (restore context if necessary) | ||
| 72 | * | ||
| 73 | * During device shutdown: | ||
| 74 | * device_shutdown() | ||
| 75 | * (device must be reinitialized at this point to use it again) | ||
| 76 | * | ||
| 77 | */ | ||
| 78 | #undef DEBUG | ||
| 79 | |||
| 80 | #include <linux/kernel.h> | ||
| 81 | #include <linux/platform_device.h> | ||
| 82 | #include <linux/err.h> | ||
| 83 | #include <linux/io.h> | ||
| 84 | |||
| 85 | #include <mach/omap_device.h> | ||
| 86 | #include <mach/omap_hwmod.h> | ||
| 87 | |||
| 88 | /* These parameters are passed to _omap_device_{de,}activate() */ | ||
| 89 | #define USE_WAKEUP_LAT 0 | ||
| 90 | #define IGNORE_WAKEUP_LAT 1 | ||
| 91 | |||
| 92 | /* XXX this should be moved into a separate file */ | ||
| 93 | #if defined(CONFIG_ARCH_OMAP2420) | ||
| 94 | # define OMAP_32KSYNCT_BASE 0x48004000 | ||
| 95 | #elif defined(CONFIG_ARCH_OMAP2430) | ||
| 96 | # define OMAP_32KSYNCT_BASE 0x49020000 | ||
| 97 | #elif defined(CONFIG_ARCH_OMAP3430) | ||
| 98 | # define OMAP_32KSYNCT_BASE 0x48320000 | ||
| 99 | #else | ||
| 100 | # error Unknown OMAP device | ||
| 101 | #endif | ||
| 102 | |||
| 103 | /* Private functions */ | ||
| 104 | |||
| 105 | /** | ||
| 106 | * _read_32ksynct - read the OMAP 32K sync timer | ||
| 107 | * | ||
| 108 | * Returns the current value of the 32KiHz synchronization counter. | ||
| 109 | * XXX this should be generalized to simply read the system clocksource. | ||
| 110 | * XXX this should be moved to a separate synctimer32k.c file | ||
| 111 | */ | ||
| 112 | static u32 _read_32ksynct(void) | ||
| 113 | { | ||
| 114 | if (!cpu_class_is_omap2()) | ||
| 115 | BUG(); | ||
| 116 | |||
| 117 | return __raw_readl(OMAP2_IO_ADDRESS(OMAP_32KSYNCT_BASE + 0x010)); | ||
| 118 | } | ||
| 119 | |||
| 120 | /** | ||
| 121 | * _omap_device_activate - increase device readiness | ||
| 122 | * @od: struct omap_device * | ||
| 123 | * @ignore_lat: increase to latency target (0) or full readiness (1)? | ||
| 124 | * | ||
| 125 | * Increase readiness of omap_device @od (thus decreasing device | ||
| 126 | * wakeup latency, but consuming more power). If @ignore_lat is | ||
| 127 | * IGNORE_WAKEUP_LAT, make the omap_device fully active. Otherwise, | ||
| 128 | * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup | ||
| 129 | * latency is greater than the requested maximum wakeup latency, step | ||
| 130 | * backwards in the omap_device_pm_latency table to ensure the | ||
| 131 | * device's maximum wakeup latency is less than or equal to the | ||
| 132 | * requested maximum wakeup latency. Returns 0. | ||
| 133 | */ | ||
| 134 | static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) | ||
| 135 | { | ||
| 136 | u32 a, b; | ||
| 137 | |||
| 138 | pr_debug("omap_device: %s: activating\n", od->pdev.name); | ||
| 139 | |||
| 140 | while (od->pm_lat_level > 0) { | ||
| 141 | struct omap_device_pm_latency *odpl; | ||
| 142 | int act_lat = 0; | ||
| 143 | |||
| 144 | od->pm_lat_level--; | ||
| 145 | |||
| 146 | odpl = od->pm_lats + od->pm_lat_level; | ||
| 147 | |||
| 148 | if (!ignore_lat && | ||
| 149 | (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit)) | ||
| 150 | break; | ||
| 151 | |||
| 152 | a = _read_32ksynct(); | ||
| 153 | |||
| 154 | /* XXX check return code */ | ||
| 155 | odpl->activate_func(od); | ||
| 156 | |||
| 157 | b = _read_32ksynct(); | ||
| 158 | |||
| 159 | act_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */ | ||
| 160 | |||
| 161 | pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time " | ||
| 162 | "%d usec\n", od->pdev.name, od->pm_lat_level, act_lat); | ||
| 163 | |||
| 164 | WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: " | ||
| 165 | "activate step %d took longer than expected (%d > %d)\n", | ||
| 166 | od->pdev.name, od->pdev.id, od->pm_lat_level, | ||
| 167 | act_lat, odpl->activate_lat); | ||
| 168 | |||
| 169 | od->dev_wakeup_lat -= odpl->activate_lat; | ||
| 170 | } | ||
| 171 | |||
| 172 | return 0; | ||
| 173 | } | ||
| 174 | |||
| 175 | /** | ||
| 176 | * _omap_device_deactivate - decrease device readiness | ||
| 177 | * @od: struct omap_device * | ||
| 178 | * @ignore_lat: decrease to latency target (0) or full inactivity (1)? | ||
| 179 | * | ||
| 180 | * Decrease readiness of omap_device @od (thus increasing device | ||
| 181 | * wakeup latency, but conserving power). If @ignore_lat is | ||
| 182 | * IGNORE_WAKEUP_LAT, make the omap_device fully inactive. Otherwise, | ||
| 183 | * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup | ||
| 184 | * latency is less than the requested maximum wakeup latency, step | ||
| 185 | * forwards in the omap_device_pm_latency table to ensure the device's | ||
| 186 | * maximum wakeup latency is less than or equal to the requested | ||
| 187 | * maximum wakeup latency. Returns 0. | ||
| 188 | */ | ||
| 189 | static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) | ||
| 190 | { | ||
| 191 | u32 a, b; | ||
| 192 | |||
| 193 | pr_debug("omap_device: %s: deactivating\n", od->pdev.name); | ||
| 194 | |||
| 195 | while (od->pm_lat_level < od->pm_lats_cnt) { | ||
| 196 | struct omap_device_pm_latency *odpl; | ||
| 197 | int deact_lat = 0; | ||
| 198 | |||
| 199 | odpl = od->pm_lats + od->pm_lat_level; | ||
| 200 | |||
| 201 | if (!ignore_lat && | ||
| 202 | ((od->dev_wakeup_lat + odpl->activate_lat) > | ||
| 203 | od->_dev_wakeup_lat_limit)) | ||
| 204 | break; | ||
| 205 | |||
| 206 | a = _read_32ksynct(); | ||
| 207 | |||
| 208 | /* XXX check return code */ | ||
| 209 | odpl->deactivate_func(od); | ||
| 210 | |||
| 211 | b = _read_32ksynct(); | ||
| 212 | |||
| 213 | deact_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */ | ||
| 214 | |||
| 215 | pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time " | ||
| 216 | "%d usec\n", od->pdev.name, od->pm_lat_level, | ||
| 217 | deact_lat); | ||
| 218 | |||
| 219 | WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: " | ||
| 220 | "deactivate step %d took longer than expected (%d > %d)\n", | ||
| 221 | od->pdev.name, od->pdev.id, od->pm_lat_level, | ||
| 222 | deact_lat, odpl->deactivate_lat); | ||
| 223 | |||
| 224 | od->dev_wakeup_lat += odpl->activate_lat; | ||
| 225 | |||
| 226 | od->pm_lat_level++; | ||
| 227 | } | ||
| 228 | |||
| 229 | return 0; | ||
| 230 | } | ||
| 231 | |||
| 232 | static inline struct omap_device *_find_by_pdev(struct platform_device *pdev) | ||
| 233 | { | ||
| 234 | return container_of(pdev, struct omap_device, pdev); | ||
| 235 | } | ||
| 236 | |||
| 237 | |||
| 238 | /* Public functions for use by core code */ | ||
| 239 | |||
| 240 | /** | ||
| 241 | * omap_device_count_resources - count number of struct resource entries needed | ||
| 242 | * @od: struct omap_device * | ||
| 243 | * | ||
| 244 | * Count the number of struct resource entries needed for this | ||
| 245 | * omap_device @od. Used by omap_device_build_ss() to determine how | ||
| 246 | * much memory to allocate before calling | ||
| 247 | * omap_device_fill_resources(). Returns the count. | ||
| 248 | */ | ||
| 249 | int omap_device_count_resources(struct omap_device *od) | ||
| 250 | { | ||
| 251 | struct omap_hwmod *oh; | ||
| 252 | int c = 0; | ||
| 253 | int i; | ||
| 254 | |||
| 255 | for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) | ||
| 256 | c += omap_hwmod_count_resources(oh); | ||
| 257 | |||
| 258 | pr_debug("omap_device: %s: counted %d total resources across %d " | ||
| 259 | "hwmods\n", od->pdev.name, c, od->hwmods_cnt); | ||
| 260 | |||
| 261 | return c; | ||
| 262 | } | ||
| 263 | |||
| 264 | /** | ||
| 265 | * omap_device_fill_resources - fill in array of struct resource | ||
| 266 | * @od: struct omap_device * | ||
| 267 | * @res: pointer to an array of struct resource to be filled in | ||
| 268 | * | ||
| 269 | * Populate one or more empty struct resource pointed to by @res with | ||
| 270 | * the resource data for this omap_device @od. Used by | ||
| 271 | * omap_device_build_ss() after calling omap_device_count_resources(). | ||
| 272 | * Ideally this function would not be needed at all. If omap_device | ||
| 273 | * replaces platform_device, then we can specify our own | ||
| 274 | * get_resource()/ get_irq()/etc functions that use the underlying | ||
| 275 | * omap_hwmod information. Or if platform_device is extended to use | ||
| 276 | * subarchitecture-specific function pointers, the various | ||
| 277 | * platform_device functions can simply call omap_device internal | ||
| 278 | * functions to get device resources. Hacking around the existing | ||
| 279 | * platform_device code wastes memory. Returns 0. | ||
| 280 | */ | ||
| 281 | int omap_device_fill_resources(struct omap_device *od, struct resource *res) | ||
| 282 | { | ||
| 283 | struct omap_hwmod *oh; | ||
| 284 | int c = 0; | ||
| 285 | int i, r; | ||
| 286 | |||
| 287 | for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) { | ||
| 288 | r = omap_hwmod_fill_resources(oh, res); | ||
| 289 | res += r; | ||
| 290 | c += r; | ||
| 291 | } | ||
| 292 | |||
| 293 | return 0; | ||
| 294 | } | ||
| 295 | |||
| 296 | /** | ||
| 297 | * omap_device_build - build and register an omap_device with one omap_hwmod | ||
| 298 | * @pdev_name: name of the platform_device driver to use | ||
| 299 | * @pdev_id: this platform_device's connection ID | ||
| 300 | * @oh: ptr to the single omap_hwmod that backs this omap_device | ||
| 301 | * @pdata: platform_data ptr to associate with the platform_device | ||
| 302 | * @pdata_len: amount of memory pointed to by @pdata | ||
| 303 | * @pm_lats: pointer to a omap_device_pm_latency array for this device | ||
| 304 | * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats | ||
| 305 | * | ||
| 306 | * Convenience function for building and registering a single | ||
| 307 | * omap_device record, which in turn builds and registers a | ||
| 308 | * platform_device record. See omap_device_build_ss() for more | ||
| 309 | * information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise, | ||
| 310 | * passes along the return value of omap_device_build_ss(). | ||
| 311 | */ | ||
| 312 | struct omap_device *omap_device_build(const char *pdev_name, int pdev_id, | ||
| 313 | struct omap_hwmod *oh, void *pdata, | ||
| 314 | int pdata_len, | ||
| 315 | struct omap_device_pm_latency *pm_lats, | ||
| 316 | int pm_lats_cnt) | ||
| 317 | { | ||
| 318 | struct omap_hwmod *ohs[] = { oh }; | ||
| 319 | |||
| 320 | if (!oh) | ||
| 321 | return ERR_PTR(-EINVAL); | ||
| 322 | |||
| 323 | return omap_device_build_ss(pdev_name, pdev_id, ohs, 1, pdata, | ||
| 324 | pdata_len, pm_lats, pm_lats_cnt); | ||
| 325 | } | ||
| 326 | |||
| 327 | /** | ||
| 328 | * omap_device_build_ss - build and register an omap_device with multiple hwmods | ||
| 329 | * @pdev_name: name of the platform_device driver to use | ||
| 330 | * @pdev_id: this platform_device's connection ID | ||
| 331 | * @oh: ptr to the single omap_hwmod that backs this omap_device | ||
| 332 | * @pdata: platform_data ptr to associate with the platform_device | ||
| 333 | * @pdata_len: amount of memory pointed to by @pdata | ||
| 334 | * @pm_lats: pointer to a omap_device_pm_latency array for this device | ||
| 335 | * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats | ||
| 336 | * | ||
| 337 | * Convenience function for building and registering an omap_device | ||
| 338 | * subsystem record. Subsystem records consist of multiple | ||
| 339 | * omap_hwmods. This function in turn builds and registers a | ||
| 340 | * platform_device record. Returns an ERR_PTR() on error, or passes | ||
| 341 | * along the return value of omap_device_register(). | ||
| 342 | */ | ||
| 343 | struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, | ||
| 344 | struct omap_hwmod **ohs, int oh_cnt, | ||
| 345 | void *pdata, int pdata_len, | ||
| 346 | struct omap_device_pm_latency *pm_lats, | ||
| 347 | int pm_lats_cnt) | ||
| 348 | { | ||
| 349 | int ret = -ENOMEM; | ||
| 350 | struct omap_device *od; | ||
| 351 | char *pdev_name2; | ||
| 352 | struct resource *res = NULL; | ||
| 353 | int res_count; | ||
| 354 | struct omap_hwmod **hwmods; | ||
| 355 | |||
| 356 | if (!ohs || oh_cnt == 0 || !pdev_name) | ||
| 357 | return ERR_PTR(-EINVAL); | ||
| 358 | |||
| 359 | if (!pdata && pdata_len > 0) | ||
| 360 | return ERR_PTR(-EINVAL); | ||
| 361 | |||
| 362 | pr_debug("omap_device: %s: building with %d hwmods\n", pdev_name, | ||
| 363 | oh_cnt); | ||
| 364 | |||
| 365 | od = kzalloc(sizeof(struct omap_device), GFP_KERNEL); | ||
| 366 | if (!od) | ||
| 367 | return ERR_PTR(-ENOMEM); | ||
| 368 | |||
| 369 | od->hwmods_cnt = oh_cnt; | ||
| 370 | |||
| 371 | hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt, | ||
| 372 | GFP_KERNEL); | ||
| 373 | if (!hwmods) | ||
| 374 | goto odbs_exit1; | ||
| 375 | |||
| 376 | memcpy(hwmods, ohs, sizeof(struct omap_hwmod *) * oh_cnt); | ||
| 377 | od->hwmods = hwmods; | ||
| 378 | |||
| 379 | pdev_name2 = kzalloc(strlen(pdev_name) + 1, GFP_KERNEL); | ||
| 380 | if (!pdev_name2) | ||
| 381 | goto odbs_exit2; | ||
| 382 | strcpy(pdev_name2, pdev_name); | ||
| 383 | |||
| 384 | od->pdev.name = pdev_name2; | ||
| 385 | od->pdev.id = pdev_id; | ||
| 386 | |||
| 387 | res_count = omap_device_count_resources(od); | ||
| 388 | if (res_count > 0) { | ||
| 389 | res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL); | ||
| 390 | if (!res) | ||
| 391 | goto odbs_exit3; | ||
| 392 | } | ||
| 393 | omap_device_fill_resources(od, res); | ||
| 394 | |||
| 395 | od->pdev.num_resources = res_count; | ||
| 396 | od->pdev.resource = res; | ||
| 397 | |||
| 398 | platform_device_add_data(&od->pdev, pdata, pdata_len); | ||
| 399 | |||
| 400 | od->pm_lats = pm_lats; | ||
| 401 | od->pm_lats_cnt = pm_lats_cnt; | ||
| 402 | |||
| 403 | ret = omap_device_register(od); | ||
| 404 | if (ret) | ||
| 405 | goto odbs_exit4; | ||
| 406 | |||
| 407 | return od; | ||
| 408 | |||
| 409 | odbs_exit4: | ||
| 410 | kfree(res); | ||
| 411 | odbs_exit3: | ||
| 412 | kfree(pdev_name2); | ||
| 413 | odbs_exit2: | ||
| 414 | kfree(hwmods); | ||
| 415 | odbs_exit1: | ||
| 416 | kfree(od); | ||
| 417 | |||
| 418 | pr_err("omap_device: %s: build failed (%d)\n", pdev_name, ret); | ||
| 419 | |||
| 420 | return ERR_PTR(ret); | ||
| 421 | } | ||
| 422 | |||
| 423 | /** | ||
| 424 | * omap_device_register - register an omap_device with one omap_hwmod | ||
| 425 | * @od: struct omap_device * to register | ||
| 426 | * | ||
| 427 | * Register the omap_device structure. This currently just calls | ||
| 428 | * platform_device_register() on the underlying platform_device. | ||
| 429 | * Returns the return value of platform_device_register(). | ||
| 430 | */ | ||
| 431 | int omap_device_register(struct omap_device *od) | ||
| 432 | { | ||
| 433 | pr_debug("omap_device: %s: registering\n", od->pdev.name); | ||
| 434 | |||
| 435 | return platform_device_register(&od->pdev); | ||
| 436 | } | ||
| 437 | |||
| 438 | |||
| 439 | /* Public functions for use by device drivers through struct platform_data */ | ||
| 440 | |||
| 441 | /** | ||
| 442 | * omap_device_enable - fully activate an omap_device | ||
| 443 | * @od: struct omap_device * to activate | ||
| 444 | * | ||
| 445 | * Do whatever is necessary for the hwmods underlying omap_device @od | ||
| 446 | * to be accessible and ready to operate. This generally involves | ||
| 447 | * enabling clocks, setting SYSCONFIG registers; and in the future may | ||
| 448 | * involve remuxing pins. Device drivers should call this function | ||
| 449 | * (through platform_data function pointers) where they would normally | ||
| 450 | * enable clocks, etc. Returns -EINVAL if called when the omap_device | ||
| 451 | * is already enabled, or passes along the return value of | ||
| 452 | * _omap_device_activate(). | ||
| 453 | */ | ||
| 454 | int omap_device_enable(struct platform_device *pdev) | ||
| 455 | { | ||
| 456 | int ret; | ||
| 457 | struct omap_device *od; | ||
| 458 | |||
| 459 | od = _find_by_pdev(pdev); | ||
| 460 | |||
| 461 | if (od->_state == OMAP_DEVICE_STATE_ENABLED) { | ||
| 462 | WARN(1, "omap_device: %s.%d: omap_device_enable() called from " | ||
| 463 | "invalid state\n", od->pdev.name, od->pdev.id); | ||
| 464 | return -EINVAL; | ||
| 465 | } | ||
| 466 | |||
| 467 | /* Enable everything if we're enabling this device from scratch */ | ||
| 468 | if (od->_state == OMAP_DEVICE_STATE_UNKNOWN) | ||
| 469 | od->pm_lat_level = od->pm_lats_cnt; | ||
| 470 | |||
| 471 | ret = _omap_device_activate(od, IGNORE_WAKEUP_LAT); | ||
| 472 | |||
| 473 | od->dev_wakeup_lat = 0; | ||
| 474 | od->_dev_wakeup_lat_limit = INT_MAX; | ||
| 475 | od->_state = OMAP_DEVICE_STATE_ENABLED; | ||
| 476 | |||
| 477 | return ret; | ||
| 478 | } | ||
| 479 | |||
| 480 | /** | ||
| 481 | * omap_device_idle - idle an omap_device | ||
| 482 | * @od: struct omap_device * to idle | ||
| 483 | * | ||
| 484 | * Idle omap_device @od by calling as many .deactivate_func() entries | ||
| 485 | * in the omap_device's pm_lats table as is possible without exceeding | ||
| 486 | * the device's maximum wakeup latency limit, pm_lat_limit. Device | ||
| 487 | * drivers should call this function (through platform_data function | ||
| 488 | * pointers) where they would normally disable clocks after operations | ||
| 489 | * complete, etc.. Returns -EINVAL if the omap_device is not | ||
| 490 | * currently enabled, or passes along the return value of | ||
| 491 | * _omap_device_deactivate(). | ||
| 492 | */ | ||
| 493 | int omap_device_idle(struct platform_device *pdev) | ||
| 494 | { | ||
| 495 | int ret; | ||
| 496 | struct omap_device *od; | ||
| 497 | |||
| 498 | od = _find_by_pdev(pdev); | ||
| 499 | |||
| 500 | if (od->_state != OMAP_DEVICE_STATE_ENABLED) { | ||
| 501 | WARN(1, "omap_device: %s.%d: omap_device_idle() called from " | ||
| 502 | "invalid state\n", od->pdev.name, od->pdev.id); | ||
| 503 | return -EINVAL; | ||
| 504 | } | ||
| 505 | |||
| 506 | ret = _omap_device_deactivate(od, USE_WAKEUP_LAT); | ||
| 507 | |||
| 508 | od->_state = OMAP_DEVICE_STATE_IDLE; | ||
| 509 | |||
| 510 | return ret; | ||
| 511 | } | ||
| 512 | |||
| 513 | /** | ||
| 514 | * omap_device_shutdown - shut down an omap_device | ||
| 515 | * @od: struct omap_device * to shut down | ||
| 516 | * | ||
| 517 | * Shut down omap_device @od by calling all .deactivate_func() entries | ||
| 518 | * in the omap_device's pm_lats table and then shutting down all of | ||
| 519 | * the underlying omap_hwmods. Used when a device is being "removed" | ||
| 520 | * or a device driver is being unloaded. Returns -EINVAL if the | ||
| 521 | * omap_device is not currently enabled or idle, or passes along the | ||
| 522 | * return value of _omap_device_deactivate(). | ||
| 523 | */ | ||
| 524 | int omap_device_shutdown(struct platform_device *pdev) | ||
| 525 | { | ||
| 526 | int ret, i; | ||
| 527 | struct omap_device *od; | ||
| 528 | struct omap_hwmod *oh; | ||
| 529 | |||
| 530 | od = _find_by_pdev(pdev); | ||
| 531 | |||
| 532 | if (od->_state != OMAP_DEVICE_STATE_ENABLED && | ||
| 533 | od->_state != OMAP_DEVICE_STATE_IDLE) { | ||
| 534 | WARN(1, "omap_device: %s.%d: omap_device_shutdown() called " | ||
| 535 | "from invalid state\n", od->pdev.name, od->pdev.id); | ||
| 536 | return -EINVAL; | ||
| 537 | } | ||
| 538 | |||
| 539 | ret = _omap_device_deactivate(od, IGNORE_WAKEUP_LAT); | ||
| 540 | |||
| 541 | for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) | ||
| 542 | omap_hwmod_shutdown(oh); | ||
| 543 | |||
| 544 | od->_state = OMAP_DEVICE_STATE_SHUTDOWN; | ||
| 545 | |||
| 546 | return ret; | ||
| 547 | } | ||
| 548 | |||
| 549 | /** | ||
| 550 | * omap_device_align_pm_lat - activate/deactivate device to match wakeup lat lim | ||
| 551 | * @od: struct omap_device * | ||
| 552 | * | ||
| 553 | * When a device's maximum wakeup latency limit changes, call some of | ||
| 554 | * the .activate_func or .deactivate_func function pointers in the | ||
| 555 | * omap_device's pm_lats array to ensure that the device's maximum | ||
| 556 | * wakeup latency is less than or equal to the new latency limit. | ||
| 557 | * Intended to be called by OMAP PM code whenever a device's maximum | ||
| 558 | * wakeup latency limit changes (e.g., via | ||
| 559 | * omap_pm_set_dev_wakeup_lat()). Returns 0 if nothing needs to be | ||
| 560 | * done (e.g., if the omap_device is not currently idle, or if the | ||
| 561 | * wakeup latency is already current with the new limit) or passes | ||
| 562 | * along the return value of _omap_device_deactivate() or | ||
| 563 | * _omap_device_activate(). | ||
| 564 | */ | ||
| 565 | int omap_device_align_pm_lat(struct platform_device *pdev, | ||
| 566 | u32 new_wakeup_lat_limit) | ||
| 567 | { | ||
| 568 | int ret = -EINVAL; | ||
| 569 | struct omap_device *od; | ||
| 570 | |||
| 571 | od = _find_by_pdev(pdev); | ||
| 572 | |||
| 573 | if (new_wakeup_lat_limit == od->dev_wakeup_lat) | ||
| 574 | return 0; | ||
| 575 | |||
| 576 | od->_dev_wakeup_lat_limit = new_wakeup_lat_limit; | ||
| 577 | |||
| 578 | if (od->_state != OMAP_DEVICE_STATE_IDLE) | ||
| 579 | return 0; | ||
| 580 | else if (new_wakeup_lat_limit > od->dev_wakeup_lat) | ||
| 581 | ret = _omap_device_deactivate(od, USE_WAKEUP_LAT); | ||
| 582 | else if (new_wakeup_lat_limit < od->dev_wakeup_lat) | ||
| 583 | ret = _omap_device_activate(od, USE_WAKEUP_LAT); | ||
| 584 | |||
| 585 | return ret; | ||
| 586 | } | ||
| 587 | |||
| 588 | /** | ||
| 589 | * omap_device_get_pwrdm - return the powerdomain * associated with @od | ||
| 590 | * @od: struct omap_device * | ||
| 591 | * | ||
| 592 | * Return the powerdomain associated with the first underlying | ||
| 593 | * omap_hwmod for this omap_device. Intended for use by core OMAP PM | ||
| 594 | * code. Returns NULL on error or a struct powerdomain * upon | ||
| 595 | * success. | ||
| 596 | */ | ||
| 597 | struct powerdomain *omap_device_get_pwrdm(struct omap_device *od) | ||
| 598 | { | ||
| 599 | /* | ||
| 600 | * XXX Assumes that all omap_hwmod powerdomains are identical. | ||
| 601 | * This may not necessarily be true. There should be a sanity | ||
| 602 | * check in here to WARN() if any difference appears. | ||
| 603 | */ | ||
| 604 | if (!od->hwmods_cnt) | ||
| 605 | return NULL; | ||
| 606 | |||
| 607 | return omap_hwmod_get_pwrdm(od->hwmods[0]); | ||
| 608 | } | ||
| 609 | |||
| 610 | /* | ||
| 611 | * Public functions intended for use in omap_device_pm_latency | ||
| 612 | * .activate_func and .deactivate_func function pointers | ||
| 613 | */ | ||
| 614 | |||
| 615 | /** | ||
| 616 | * omap_device_enable_hwmods - call omap_hwmod_enable() on all hwmods | ||
| 617 | * @od: struct omap_device *od | ||
| 618 | * | ||
| 619 | * Enable all underlying hwmods. Returns 0. | ||
| 620 | */ | ||
| 621 | int omap_device_enable_hwmods(struct omap_device *od) | ||
| 622 | { | ||
| 623 | struct omap_hwmod *oh; | ||
| 624 | int i; | ||
| 625 | |||
| 626 | for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) | ||
| 627 | omap_hwmod_enable(oh); | ||
| 628 | |||
| 629 | /* XXX pass along return value here? */ | ||
| 630 | return 0; | ||
| 631 | } | ||
| 632 | |||
| 633 | /** | ||
| 634 | * omap_device_idle_hwmods - call omap_hwmod_idle() on all hwmods | ||
| 635 | * @od: struct omap_device *od | ||
| 636 | * | ||
| 637 | * Idle all underlying hwmods. Returns 0. | ||
| 638 | */ | ||
| 639 | int omap_device_idle_hwmods(struct omap_device *od) | ||
| 640 | { | ||
| 641 | struct omap_hwmod *oh; | ||
| 642 | int i; | ||
| 643 | |||
| 644 | for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) | ||
| 645 | omap_hwmod_idle(oh); | ||
| 646 | |||
| 647 | /* XXX pass along return value here? */ | ||
| 648 | return 0; | ||
| 649 | } | ||
| 650 | |||
| 651 | /** | ||
| 652 | * omap_device_disable_clocks - disable all main and interface clocks | ||
| 653 | * @od: struct omap_device *od | ||
| 654 | * | ||
| 655 | * Disable the main functional clock and interface clock for all of the | ||
| 656 | * omap_hwmods associated with the omap_device. Returns 0. | ||
| 657 | */ | ||
| 658 | int omap_device_disable_clocks(struct omap_device *od) | ||
| 659 | { | ||
| 660 | struct omap_hwmod *oh; | ||
| 661 | int i; | ||
| 662 | |||
| 663 | for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) | ||
| 664 | omap_hwmod_disable_clocks(oh); | ||
| 665 | |||
| 666 | /* XXX pass along return value here? */ | ||
| 667 | return 0; | ||
| 668 | } | ||
| 669 | |||
| 670 | /** | ||
| 671 | * omap_device_enable_clocks - enable all main and interface clocks | ||
| 672 | * @od: struct omap_device *od | ||
| 673 | * | ||
| 674 | * Enable the main functional clock and interface clock for all of the | ||
| 675 | * omap_hwmods associated with the omap_device. Returns 0. | ||
| 676 | */ | ||
| 677 | int omap_device_enable_clocks(struct omap_device *od) | ||
| 678 | { | ||
| 679 | struct omap_hwmod *oh; | ||
| 680 | int i; | ||
| 681 | |||
| 682 | for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) | ||
| 683 | omap_hwmod_enable_clocks(oh); | ||
| 684 | |||
| 685 | /* XXX pass along return value here? */ | ||
| 686 | return 0; | ||
| 687 | } | ||
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 5eae7876979c..925f64711c37 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
| @@ -56,16 +56,16 @@ | |||
| 56 | #define SRAM_BOOTLOADER_SZ 0x80 | 56 | #define SRAM_BOOTLOADER_SZ 0x80 |
| 57 | #endif | 57 | #endif |
| 58 | 58 | ||
| 59 | #define OMAP24XX_VA_REQINFOPERM0 IO_ADDRESS(0x68005048) | 59 | #define OMAP24XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68005048) |
| 60 | #define OMAP24XX_VA_READPERM0 IO_ADDRESS(0x68005050) | 60 | #define OMAP24XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68005050) |
| 61 | #define OMAP24XX_VA_WRITEPERM0 IO_ADDRESS(0x68005058) | 61 | #define OMAP24XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68005058) |
| 62 | 62 | ||
| 63 | #define OMAP34XX_VA_REQINFOPERM0 IO_ADDRESS(0x68012848) | 63 | #define OMAP34XX_VA_REQINFOPERM0 OMAP2_IO_ADDRESS(0x68012848) |
| 64 | #define OMAP34XX_VA_READPERM0 IO_ADDRESS(0x68012850) | 64 | #define OMAP34XX_VA_READPERM0 OMAP2_IO_ADDRESS(0x68012850) |
| 65 | #define OMAP34XX_VA_WRITEPERM0 IO_ADDRESS(0x68012858) | 65 | #define OMAP34XX_VA_WRITEPERM0 OMAP2_IO_ADDRESS(0x68012858) |
| 66 | #define OMAP34XX_VA_ADDR_MATCH2 IO_ADDRESS(0x68012880) | 66 | #define OMAP34XX_VA_ADDR_MATCH2 OMAP2_IO_ADDRESS(0x68012880) |
| 67 | #define OMAP34XX_VA_SMS_RG_ATT0 IO_ADDRESS(0x6C000048) | 67 | #define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_IO_ADDRESS(0x6C000048) |
| 68 | #define OMAP34XX_VA_CONTROL_STAT IO_ADDRESS(0x480022F0) | 68 | #define OMAP34XX_VA_CONTROL_STAT OMAP2_IO_ADDRESS(0x480022F0) |
| 69 | 69 | ||
| 70 | #define GP_DEVICE 0x300 | 70 | #define GP_DEVICE 0x300 |
| 71 | 71 | ||
diff --git a/arch/frv/kernel/vmlinux.lds.S b/arch/frv/kernel/vmlinux.lds.S index 7dbf41f68b52..cbe811fccfcc 100644 --- a/arch/frv/kernel/vmlinux.lds.S +++ b/arch/frv/kernel/vmlinux.lds.S | |||
| @@ -35,50 +35,13 @@ SECTIONS | |||
| 35 | #endif | 35 | #endif |
| 36 | } | 36 | } |
| 37 | _einittext = .; | 37 | _einittext = .; |
| 38 | .init.data : { INIT_DATA } | ||
| 39 | |||
| 40 | . = ALIGN(8); | ||
| 41 | __setup_start = .; | ||
| 42 | .setup.init : { KEEP(*(.init.setup)) } | ||
| 43 | __setup_end = .; | ||
| 44 | |||
| 45 | __initcall_start = .; | ||
| 46 | .initcall.init : { | ||
| 47 | INITCALLS | ||
| 48 | } | ||
| 49 | __initcall_end = .; | ||
| 50 | __con_initcall_start = .; | ||
| 51 | .con_initcall.init : { *(.con_initcall.init) } | ||
| 52 | __con_initcall_end = .; | ||
| 53 | SECURITY_INIT | ||
| 54 | . = ALIGN(4); | ||
| 55 | __alt_instructions = .; | ||
| 56 | .altinstructions : { *(.altinstructions) } | ||
| 57 | __alt_instructions_end = .; | ||
| 58 | .altinstr_replacement : { *(.altinstr_replacement) } | ||
| 59 | 38 | ||
| 39 | INIT_DATA_SECTION(8) | ||
| 60 | PERCPU(4096) | 40 | PERCPU(4096) |
| 61 | 41 | ||
| 62 | #ifdef CONFIG_BLK_DEV_INITRD | 42 | . = ALIGN(PAGE_SIZE); |
| 63 | . = ALIGN(4096); | ||
| 64 | __initramfs_start = .; | ||
| 65 | .init.ramfs : { *(.init.ramfs) } | ||
| 66 | __initramfs_end = .; | ||
| 67 | #endif | ||
| 68 | |||
| 69 | . = ALIGN(THREAD_SIZE); | ||
| 70 | __init_end = .; | 43 | __init_end = .; |
| 71 | 44 | ||
| 72 | /* put sections together that have massive alignment issues */ | ||
| 73 | . = ALIGN(THREAD_SIZE); | ||
| 74 | .data.init_task : { | ||
| 75 | /* init task record & stack */ | ||
| 76 | *(.data.init_task) | ||
| 77 | } | ||
| 78 | |||
| 79 | . = ALIGN(L1_CACHE_BYTES); | ||
| 80 | .data.cacheline_aligned : { *(.data.cacheline_aligned) } | ||
| 81 | |||
| 82 | .trap : { | 45 | .trap : { |
| 83 | /* trap table management - read entry-table.S before modifying */ | 46 | /* trap table management - read entry-table.S before modifying */ |
| 84 | . = ALIGN(8192); | 47 | . = ALIGN(8192); |
| @@ -124,13 +87,12 @@ SECTIONS | |||
| 124 | 87 | ||
| 125 | } | 88 | } |
| 126 | 89 | ||
| 127 | . = ALIGN(8); /* Exception table */ | 90 | EXCEPTION_TABLE(8) |
| 128 | __start___ex_table = .; | ||
| 129 | __ex_table : { KEEP(*(__ex_table)) } | ||
| 130 | __stop___ex_table = .; | ||
| 131 | 91 | ||
| 132 | _sdata = .; | 92 | _sdata = .; |
| 133 | .data : { /* Data */ | 93 | .data : { /* Data */ |
| 94 | INIT_TASK_DATA(THREAD_SIZE) | ||
| 95 | CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) | ||
| 134 | DATA_DATA | 96 | DATA_DATA |
| 135 | *(.data.*) | 97 | *(.data.*) |
| 136 | EXIT_DATA | 98 | EXIT_DATA |
| @@ -159,22 +121,8 @@ SECTIONS | |||
| 159 | . = ALIGN(PAGE_SIZE); | 121 | . = ALIGN(PAGE_SIZE); |
| 160 | __kernel_image_end = .; | 122 | __kernel_image_end = .; |
| 161 | 123 | ||
| 162 | /* Stabs debugging sections. */ | 124 | STABS_DEBUG |
| 163 | .stab 0 : { *(.stab) } | 125 | DWARF_DEBUG |
| 164 | .stabstr 0 : { *(.stabstr) } | ||
| 165 | .stab.excl 0 : { *(.stab.excl) } | ||
| 166 | .stab.exclstr 0 : { *(.stab.exclstr) } | ||
| 167 | .stab.index 0 : { *(.stab.index) } | ||
| 168 | .stab.indexstr 0 : { *(.stab.indexstr) } | ||
| 169 | |||
| 170 | .debug_line 0 : { *(.debug_line) } | ||
| 171 | .debug_info 0 : { *(.debug_info) } | ||
| 172 | .debug_abbrev 0 : { *(.debug_abbrev) } | ||
| 173 | .debug_aranges 0 : { *(.debug_aranges) } | ||
| 174 | .debug_frame 0 : { *(.debug_frame) } | ||
| 175 | .debug_pubnames 0 : { *(.debug_pubnames) } | ||
| 176 | .debug_str 0 : { *(.debug_str) } | ||
| 177 | .debug_ranges 0 : { *(.debug_ranges) } | ||
| 178 | 126 | ||
| 179 | .comment 0 : { *(.comment) } | 127 | .comment 0 : { *(.comment) } |
| 180 | 128 | ||
diff --git a/arch/ia64/include/asm/mca.h b/arch/ia64/include/asm/mca.h index 44a0b53df900..c171cdf0a789 100644 --- a/arch/ia64/include/asm/mca.h +++ b/arch/ia64/include/asm/mca.h | |||
| @@ -145,12 +145,14 @@ extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *); | |||
| 145 | extern void ia64_init_handler(struct pt_regs *, | 145 | extern void ia64_init_handler(struct pt_regs *, |
| 146 | struct switch_stack *, | 146 | struct switch_stack *, |
| 147 | struct ia64_sal_os_state *); | 147 | struct ia64_sal_os_state *); |
| 148 | extern void ia64_os_init_on_kdump(void); | ||
| 148 | extern void ia64_monarch_init_handler(void); | 149 | extern void ia64_monarch_init_handler(void); |
| 149 | extern void ia64_slave_init_handler(void); | 150 | extern void ia64_slave_init_handler(void); |
| 150 | extern void ia64_mca_cmc_vector_setup(void); | 151 | extern void ia64_mca_cmc_vector_setup(void); |
| 151 | extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *)); | 152 | extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *)); |
| 152 | extern void ia64_unreg_MCA_extension(void); | 153 | extern void ia64_unreg_MCA_extension(void); |
| 153 | extern unsigned long ia64_get_rnat(unsigned long *); | 154 | extern unsigned long ia64_get_rnat(unsigned long *); |
| 155 | extern void ia64_set_psr_mc(void); | ||
| 154 | extern void ia64_mca_printk(const char * fmt, ...) | 156 | extern void ia64_mca_printk(const char * fmt, ...) |
| 155 | __attribute__ ((format (printf, 1, 2))); | 157 | __attribute__ ((format (printf, 1, 2))); |
| 156 | 158 | ||
diff --git a/arch/ia64/kernel/crash.c b/arch/ia64/kernel/crash.c index f065093f8e9b..6631a9dfafdc 100644 --- a/arch/ia64/kernel/crash.c +++ b/arch/ia64/kernel/crash.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | int kdump_status[NR_CPUS]; | 23 | int kdump_status[NR_CPUS]; |
| 24 | static atomic_t kdump_cpu_frozen; | 24 | static atomic_t kdump_cpu_frozen; |
| 25 | atomic_t kdump_in_progress; | 25 | atomic_t kdump_in_progress; |
| 26 | static int kdump_freeze_monarch; | ||
| 26 | static int kdump_on_init = 1; | 27 | static int kdump_on_init = 1; |
| 27 | static int kdump_on_fatal_mca = 1; | 28 | static int kdump_on_fatal_mca = 1; |
| 28 | 29 | ||
| @@ -108,10 +109,38 @@ machine_crash_shutdown(struct pt_regs *pt) | |||
| 108 | */ | 109 | */ |
| 109 | kexec_disable_iosapic(); | 110 | kexec_disable_iosapic(); |
| 110 | #ifdef CONFIG_SMP | 111 | #ifdef CONFIG_SMP |
| 112 | /* | ||
| 113 | * If kdump_on_init is set and an INIT is asserted here, kdump will | ||
| 114 | * be started again via INIT monarch. | ||
| 115 | */ | ||
| 116 | local_irq_disable(); | ||
| 117 | ia64_set_psr_mc(); /* mask MCA/INIT */ | ||
| 118 | if (atomic_inc_return(&kdump_in_progress) != 1) | ||
| 119 | unw_init_running(kdump_cpu_freeze, NULL); | ||
| 120 | |||
| 121 | /* | ||
| 122 | * Now this cpu is ready for kdump. | ||
| 123 | * Stop all others by IPI or INIT. They could receive INIT from | ||
| 124 | * outside and might be INIT monarch, but only thing they have to | ||
| 125 | * do is falling into kdump_cpu_freeze(). | ||
| 126 | * | ||
| 127 | * If an INIT is asserted here: | ||
| 128 | * - All receivers might be slaves, since some of cpus could already | ||
| 129 | * be frozen and INIT might be masked on monarch. In this case, | ||
| 130 | * all slaves will be frozen soon since kdump_in_progress will let | ||
| 131 | * them into DIE_INIT_SLAVE_LEAVE. | ||
| 132 | * - One might be a monarch, but INIT rendezvous will fail since | ||
| 133 | * at least this cpu already have INIT masked so it never join | ||
| 134 | * to the rendezvous. In this case, all slaves and monarch will | ||
| 135 | * be frozen soon with no wait since the INIT rendezvous is skipped | ||
| 136 | * by kdump_in_progress. | ||
| 137 | */ | ||
| 111 | kdump_smp_send_stop(); | 138 | kdump_smp_send_stop(); |
| 112 | /* not all cpu response to IPI, send INIT to freeze them */ | 139 | /* not all cpu response to IPI, send INIT to freeze them */ |
| 113 | if (kdump_wait_cpu_freeze() && kdump_on_init) { | 140 | if (kdump_wait_cpu_freeze()) { |
| 114 | kdump_smp_send_init(); | 141 | kdump_smp_send_init(); |
| 142 | /* wait again, don't go ahead if possible */ | ||
| 143 | kdump_wait_cpu_freeze(); | ||
| 115 | } | 144 | } |
| 116 | #endif | 145 | #endif |
| 117 | } | 146 | } |
| @@ -129,17 +158,17 @@ void | |||
| 129 | kdump_cpu_freeze(struct unw_frame_info *info, void *arg) | 158 | kdump_cpu_freeze(struct unw_frame_info *info, void *arg) |
| 130 | { | 159 | { |
| 131 | int cpuid; | 160 | int cpuid; |
| 161 | |||
| 132 | local_irq_disable(); | 162 | local_irq_disable(); |
| 133 | cpuid = smp_processor_id(); | 163 | cpuid = smp_processor_id(); |
| 134 | crash_save_this_cpu(); | 164 | crash_save_this_cpu(); |
| 135 | current->thread.ksp = (__u64)info->sw - 16; | 165 | current->thread.ksp = (__u64)info->sw - 16; |
| 166 | |||
| 167 | ia64_set_psr_mc(); /* mask MCA/INIT and stop reentrance */ | ||
| 168 | |||
| 136 | atomic_inc(&kdump_cpu_frozen); | 169 | atomic_inc(&kdump_cpu_frozen); |
| 137 | kdump_status[cpuid] = 1; | 170 | kdump_status[cpuid] = 1; |
| 138 | mb(); | 171 | mb(); |
| 139 | #ifdef CONFIG_HOTPLUG_CPU | ||
| 140 | if (cpuid != 0) | ||
| 141 | ia64_jump_to_sal(&sal_boot_rendez_state[cpuid]); | ||
| 142 | #endif | ||
| 143 | for (;;) | 172 | for (;;) |
| 144 | cpu_relax(); | 173 | cpu_relax(); |
| 145 | } | 174 | } |
| @@ -150,6 +179,20 @@ kdump_init_notifier(struct notifier_block *self, unsigned long val, void *data) | |||
| 150 | struct ia64_mca_notify_die *nd; | 179 | struct ia64_mca_notify_die *nd; |
| 151 | struct die_args *args = data; | 180 | struct die_args *args = data; |
| 152 | 181 | ||
| 182 | if (atomic_read(&kdump_in_progress)) { | ||
| 183 | switch (val) { | ||
| 184 | case DIE_INIT_MONARCH_LEAVE: | ||
| 185 | if (!kdump_freeze_monarch) | ||
| 186 | break; | ||
| 187 | /* fall through */ | ||
| 188 | case DIE_INIT_SLAVE_LEAVE: | ||
| 189 | case DIE_INIT_MONARCH_ENTER: | ||
| 190 | case DIE_MCA_RENDZVOUS_LEAVE: | ||
| 191 | unw_init_running(kdump_cpu_freeze, NULL); | ||
| 192 | break; | ||
| 193 | } | ||
| 194 | } | ||
| 195 | |||
| 153 | if (!kdump_on_init && !kdump_on_fatal_mca) | 196 | if (!kdump_on_init && !kdump_on_fatal_mca) |
| 154 | return NOTIFY_DONE; | 197 | return NOTIFY_DONE; |
| 155 | 198 | ||
| @@ -162,43 +205,31 @@ kdump_init_notifier(struct notifier_block *self, unsigned long val, void *data) | |||
| 162 | } | 205 | } |
| 163 | 206 | ||
| 164 | if (val != DIE_INIT_MONARCH_LEAVE && | 207 | if (val != DIE_INIT_MONARCH_LEAVE && |
| 165 | val != DIE_INIT_SLAVE_LEAVE && | ||
| 166 | val != DIE_INIT_MONARCH_PROCESS && | 208 | val != DIE_INIT_MONARCH_PROCESS && |
| 167 | val != DIE_MCA_RENDZVOUS_LEAVE && | ||
| 168 | val != DIE_MCA_MONARCH_LEAVE) | 209 | val != DIE_MCA_MONARCH_LEAVE) |
| 169 | return NOTIFY_DONE; | 210 | return NOTIFY_DONE; |
| 170 | 211 | ||
| 171 | nd = (struct ia64_mca_notify_die *)args->err; | 212 | nd = (struct ia64_mca_notify_die *)args->err; |
| 172 | /* Reason code 1 means machine check rendezvous*/ | ||
| 173 | if ((val == DIE_INIT_MONARCH_LEAVE || val == DIE_INIT_SLAVE_LEAVE | ||
| 174 | || val == DIE_INIT_MONARCH_PROCESS) && nd->sos->rv_rc == 1) | ||
| 175 | return NOTIFY_DONE; | ||
| 176 | 213 | ||
| 177 | switch (val) { | 214 | switch (val) { |
| 178 | case DIE_INIT_MONARCH_PROCESS: | 215 | case DIE_INIT_MONARCH_PROCESS: |
| 179 | if (kdump_on_init) { | 216 | /* Reason code 1 means machine check rendezvous*/ |
| 180 | atomic_set(&kdump_in_progress, 1); | 217 | if (kdump_on_init && (nd->sos->rv_rc != 1)) { |
| 181 | *(nd->monarch_cpu) = -1; | 218 | if (atomic_inc_return(&kdump_in_progress) != 1) |
| 219 | kdump_freeze_monarch = 1; | ||
| 182 | } | 220 | } |
| 183 | break; | 221 | break; |
| 184 | case DIE_INIT_MONARCH_LEAVE: | 222 | case DIE_INIT_MONARCH_LEAVE: |
| 185 | if (kdump_on_init) | 223 | /* Reason code 1 means machine check rendezvous*/ |
| 224 | if (kdump_on_init && (nd->sos->rv_rc != 1)) | ||
| 186 | machine_kdump_on_init(); | 225 | machine_kdump_on_init(); |
| 187 | break; | 226 | break; |
| 188 | case DIE_INIT_SLAVE_LEAVE: | ||
| 189 | if (atomic_read(&kdump_in_progress)) | ||
| 190 | unw_init_running(kdump_cpu_freeze, NULL); | ||
| 191 | break; | ||
| 192 | case DIE_MCA_RENDZVOUS_LEAVE: | ||
| 193 | if (atomic_read(&kdump_in_progress)) | ||
| 194 | unw_init_running(kdump_cpu_freeze, NULL); | ||
| 195 | break; | ||
| 196 | case DIE_MCA_MONARCH_LEAVE: | 227 | case DIE_MCA_MONARCH_LEAVE: |
| 197 | /* *(nd->data) indicate if MCA is recoverable */ | 228 | /* *(nd->data) indicate if MCA is recoverable */ |
| 198 | if (kdump_on_fatal_mca && !(*(nd->data))) { | 229 | if (kdump_on_fatal_mca && !(*(nd->data))) { |
| 199 | atomic_set(&kdump_in_progress, 1); | 230 | if (atomic_inc_return(&kdump_in_progress) == 1) |
| 200 | *(nd->monarch_cpu) = -1; | 231 | machine_kdump_on_init(); |
| 201 | machine_kdump_on_init(); | 232 | /* We got fatal MCA while kdump!? No way!! */ |
| 202 | } | 233 | } |
| 203 | break; | 234 | break; |
| 204 | } | 235 | } |
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S index 23f846de62d5..1a6e44515eb4 100644 --- a/arch/ia64/kernel/head.S +++ b/arch/ia64/kernel/head.S | |||
| @@ -167,7 +167,7 @@ RestRR: \ | |||
| 167 | mov _tmp2=((ia64_rid(IA64_REGION_ID_KERNEL, (num<<61)) << 8) | (pgsize << 2) | vhpt);; \ | 167 | mov _tmp2=((ia64_rid(IA64_REGION_ID_KERNEL, (num<<61)) << 8) | (pgsize << 2) | vhpt);; \ |
| 168 | mov rr[_tmp1]=_tmp2 | 168 | mov rr[_tmp1]=_tmp2 |
| 169 | 169 | ||
| 170 | .section __special_page_section,"ax" | 170 | __PAGE_ALIGNED_DATA |
| 171 | 171 | ||
| 172 | .global empty_zero_page | 172 | .global empty_zero_page |
| 173 | empty_zero_page: | 173 | empty_zero_page: |
| @@ -181,7 +181,7 @@ swapper_pg_dir: | |||
| 181 | halt_msg: | 181 | halt_msg: |
| 182 | stringz "Halting kernel\n" | 182 | stringz "Halting kernel\n" |
| 183 | 183 | ||
| 184 | .section .text.head,"ax" | 184 | __REF |
| 185 | 185 | ||
| 186 | .global start_ap | 186 | .global start_ap |
| 187 | 187 | ||
| @@ -1242,7 +1242,7 @@ GLOBAL_ENTRY(ia64_jump_to_sal) | |||
| 1242 | movl r16=SAL_PSR_BITS_TO_SET;; | 1242 | movl r16=SAL_PSR_BITS_TO_SET;; |
| 1243 | mov cr.ipsr=r16 | 1243 | mov cr.ipsr=r16 |
| 1244 | mov cr.ifs=r0;; | 1244 | mov cr.ifs=r0;; |
| 1245 | rfi;; | 1245 | rfi;; // note: this unmask MCA/INIT (psr.mc) |
| 1246 | 1: | 1246 | 1: |
| 1247 | /* | 1247 | /* |
| 1248 | * Invalidate all TLB data/inst | 1248 | * Invalidate all TLB data/inst |
diff --git a/arch/ia64/kernel/machine_kexec.c b/arch/ia64/kernel/machine_kexec.c index 0823de1f6ebe..3d3aeef46947 100644 --- a/arch/ia64/kernel/machine_kexec.c +++ b/arch/ia64/kernel/machine_kexec.c | |||
| @@ -24,6 +24,8 @@ | |||
| 24 | #include <asm/delay.h> | 24 | #include <asm/delay.h> |
| 25 | #include <asm/meminit.h> | 25 | #include <asm/meminit.h> |
| 26 | #include <asm/processor.h> | 26 | #include <asm/processor.h> |
| 27 | #include <asm/sal.h> | ||
| 28 | #include <asm/mca.h> | ||
| 27 | 29 | ||
| 28 | typedef NORET_TYPE void (*relocate_new_kernel_t)( | 30 | typedef NORET_TYPE void (*relocate_new_kernel_t)( |
| 29 | unsigned long indirection_page, | 31 | unsigned long indirection_page, |
| @@ -85,13 +87,26 @@ static void ia64_machine_kexec(struct unw_frame_info *info, void *arg) | |||
| 85 | void *pal_addr = efi_get_pal_addr(); | 87 | void *pal_addr = efi_get_pal_addr(); |
| 86 | unsigned long code_addr = (unsigned long)page_address(image->control_code_page); | 88 | unsigned long code_addr = (unsigned long)page_address(image->control_code_page); |
| 87 | int ii; | 89 | int ii; |
| 90 | u64 fp, gp; | ||
| 91 | ia64_fptr_t *init_handler = (ia64_fptr_t *)ia64_os_init_on_kdump; | ||
| 88 | 92 | ||
| 89 | BUG_ON(!image); | 93 | BUG_ON(!image); |
| 90 | if (image->type == KEXEC_TYPE_CRASH) { | 94 | if (image->type == KEXEC_TYPE_CRASH) { |
| 91 | crash_save_this_cpu(); | 95 | crash_save_this_cpu(); |
| 92 | current->thread.ksp = (__u64)info->sw - 16; | 96 | current->thread.ksp = (__u64)info->sw - 16; |
| 97 | |||
| 98 | /* Register noop init handler */ | ||
| 99 | fp = ia64_tpa(init_handler->fp); | ||
| 100 | gp = ia64_tpa(ia64_getreg(_IA64_REG_GP)); | ||
| 101 | ia64_sal_set_vectors(SAL_VECTOR_OS_INIT, fp, gp, 0, fp, gp, 0); | ||
| 102 | } else { | ||
| 103 | /* Unregister init handlers of current kernel */ | ||
| 104 | ia64_sal_set_vectors(SAL_VECTOR_OS_INIT, 0, 0, 0, 0, 0, 0); | ||
| 93 | } | 105 | } |
| 94 | 106 | ||
| 107 | /* Unregister mca handler - No more recovery on current kernel */ | ||
| 108 | ia64_sal_set_vectors(SAL_VECTOR_OS_MCA, 0, 0, 0, 0, 0, 0); | ||
| 109 | |||
| 95 | /* Interrupts aren't acceptable while we reboot */ | 110 | /* Interrupts aren't acceptable while we reboot */ |
| 96 | local_irq_disable(); | 111 | local_irq_disable(); |
| 97 | 112 | ||
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c index 7b30d21c5190..d2877a7bfe2e 100644 --- a/arch/ia64/kernel/mca.c +++ b/arch/ia64/kernel/mca.c | |||
| @@ -1682,14 +1682,25 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw, | |||
| 1682 | 1682 | ||
| 1683 | if (!sos->monarch) { | 1683 | if (!sos->monarch) { |
| 1684 | ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT; | 1684 | ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT; |
| 1685 | |||
| 1686 | #ifdef CONFIG_KEXEC | ||
| 1687 | while (monarch_cpu == -1 && !atomic_read(&kdump_in_progress)) | ||
| 1688 | udelay(1000); | ||
| 1689 | #else | ||
| 1685 | while (monarch_cpu == -1) | 1690 | while (monarch_cpu == -1) |
| 1686 | cpu_relax(); /* spin until monarch enters */ | 1691 | cpu_relax(); /* spin until monarch enters */ |
| 1692 | #endif | ||
| 1687 | 1693 | ||
| 1688 | NOTIFY_INIT(DIE_INIT_SLAVE_ENTER, regs, (long)&nd, 1); | 1694 | NOTIFY_INIT(DIE_INIT_SLAVE_ENTER, regs, (long)&nd, 1); |
| 1689 | NOTIFY_INIT(DIE_INIT_SLAVE_PROCESS, regs, (long)&nd, 1); | 1695 | NOTIFY_INIT(DIE_INIT_SLAVE_PROCESS, regs, (long)&nd, 1); |
| 1690 | 1696 | ||
| 1697 | #ifdef CONFIG_KEXEC | ||
| 1698 | while (monarch_cpu != -1 && !atomic_read(&kdump_in_progress)) | ||
| 1699 | udelay(1000); | ||
| 1700 | #else | ||
| 1691 | while (monarch_cpu != -1) | 1701 | while (monarch_cpu != -1) |
| 1692 | cpu_relax(); /* spin until monarch leaves */ | 1702 | cpu_relax(); /* spin until monarch leaves */ |
| 1703 | #endif | ||
| 1693 | 1704 | ||
| 1694 | NOTIFY_INIT(DIE_INIT_SLAVE_LEAVE, regs, (long)&nd, 1); | 1705 | NOTIFY_INIT(DIE_INIT_SLAVE_LEAVE, regs, (long)&nd, 1); |
| 1695 | 1706 | ||
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S index a06d46548ff9..7461d2573d41 100644 --- a/arch/ia64/kernel/mca_asm.S +++ b/arch/ia64/kernel/mca_asm.S | |||
| @@ -40,6 +40,7 @@ | |||
| 40 | 40 | ||
| 41 | .global ia64_do_tlb_purge | 41 | .global ia64_do_tlb_purge |
| 42 | .global ia64_os_mca_dispatch | 42 | .global ia64_os_mca_dispatch |
| 43 | .global ia64_os_init_on_kdump | ||
| 43 | .global ia64_os_init_dispatch_monarch | 44 | .global ia64_os_init_dispatch_monarch |
| 44 | .global ia64_os_init_dispatch_slave | 45 | .global ia64_os_init_dispatch_slave |
| 45 | 46 | ||
| @@ -299,6 +300,25 @@ END(ia64_os_mca_virtual_begin) | |||
| 299 | //StartMain//////////////////////////////////////////////////////////////////// | 300 | //StartMain//////////////////////////////////////////////////////////////////// |
| 300 | 301 | ||
| 301 | // | 302 | // |
| 303 | // NOP init handler for kdump. In panic situation, we may receive INIT | ||
| 304 | // while kernel transition. Since we initialize registers on leave from | ||
| 305 | // current kernel, no longer monarch/slave handlers of current kernel in | ||
| 306 | // virtual mode are called safely. | ||
| 307 | // We can unregister these init handlers from SAL, however then the INIT | ||
| 308 | // will result in warmboot by SAL and we cannot retrieve the crashdump. | ||
| 309 | // Therefore register this NOP function to SAL, to prevent entering virtual | ||
| 310 | // mode and resulting warmboot by SAL. | ||
| 311 | // | ||
| 312 | ia64_os_init_on_kdump: | ||
| 313 | mov r8=r0 // IA64_INIT_RESUME | ||
| 314 | mov r9=r10 // SAL_GP | ||
| 315 | mov r22=r17 // *minstate | ||
| 316 | ;; | ||
| 317 | mov r10=r0 // return to same context | ||
| 318 | mov b0=r12 // SAL_CHECK return address | ||
| 319 | br b0 | ||
| 320 | |||
| 321 | // | ||
| 302 | // SAL to OS entry point for INIT on all processors. This has been defined for | 322 | // SAL to OS entry point for INIT on all processors. This has been defined for |
| 303 | // registration purposes with SAL as a part of ia64_mca_init. Monarch and | 323 | // registration purposes with SAL as a part of ia64_mca_init. Monarch and |
| 304 | // slave INIT have identical processing, except for the value of the | 324 | // slave INIT have identical processing, except for the value of the |
| @@ -1073,3 +1093,30 @@ GLOBAL_ENTRY(ia64_get_rnat) | |||
| 1073 | mov ar.rsc=3 | 1093 | mov ar.rsc=3 |
| 1074 | br.ret.sptk.many rp | 1094 | br.ret.sptk.many rp |
| 1075 | END(ia64_get_rnat) | 1095 | END(ia64_get_rnat) |
| 1096 | |||
| 1097 | |||
| 1098 | // void ia64_set_psr_mc(void) | ||
| 1099 | // | ||
| 1100 | // Set psr.mc bit to mask MCA/INIT. | ||
| 1101 | GLOBAL_ENTRY(ia64_set_psr_mc) | ||
| 1102 | rsm psr.i | psr.ic // disable interrupts | ||
| 1103 | ;; | ||
| 1104 | srlz.d | ||
| 1105 | ;; | ||
| 1106 | mov r14 = psr // get psr{36:35,31:0} | ||
| 1107 | movl r15 = 1f | ||
| 1108 | ;; | ||
| 1109 | dep r14 = -1, r14, PSR_MC, 1 // set psr.mc | ||
| 1110 | ;; | ||
| 1111 | dep r14 = -1, r14, PSR_IC, 1 // set psr.ic | ||
| 1112 | ;; | ||
| 1113 | dep r14 = -1, r14, PSR_BN, 1 // keep bank1 in use | ||
| 1114 | ;; | ||
| 1115 | mov cr.ipsr = r14 | ||
| 1116 | mov cr.ifs = r0 | ||
| 1117 | mov cr.iip = r15 | ||
| 1118 | ;; | ||
| 1119 | rfi | ||
| 1120 | 1: | ||
| 1121 | br.ret.sptk.many rp | ||
| 1122 | END(ia64_set_psr_mc) | ||
diff --git a/arch/ia64/kernel/relocate_kernel.S b/arch/ia64/kernel/relocate_kernel.S index 903babd22d62..32f6fc131fbe 100644 --- a/arch/ia64/kernel/relocate_kernel.S +++ b/arch/ia64/kernel/relocate_kernel.S | |||
| @@ -52,7 +52,7 @@ GLOBAL_ENTRY(relocate_new_kernel) | |||
| 52 | srlz.i | 52 | srlz.i |
| 53 | ;; | 53 | ;; |
| 54 | mov ar.rnat=r18 | 54 | mov ar.rnat=r18 |
| 55 | rfi | 55 | rfi // note: this unmask MCA/INIT (psr.mc) |
| 56 | ;; | 56 | ;; |
| 57 | 1: | 57 | 1: |
| 58 | //physical mode code begin | 58 | //physical mode code begin |
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S index eb4214d1c5af..0a0c77b2c988 100644 --- a/arch/ia64/kernel/vmlinux.lds.S +++ b/arch/ia64/kernel/vmlinux.lds.S | |||
| @@ -51,8 +51,6 @@ SECTIONS | |||
| 51 | KPROBES_TEXT | 51 | KPROBES_TEXT |
| 52 | *(.gnu.linkonce.t*) | 52 | *(.gnu.linkonce.t*) |
| 53 | } | 53 | } |
| 54 | .text.head : AT(ADDR(.text.head) - LOAD_OFFSET) | ||
| 55 | { *(.text.head) } | ||
| 56 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) | 54 | .text2 : AT(ADDR(.text2) - LOAD_OFFSET) |
| 57 | { *(.text2) } | 55 | { *(.text2) } |
| 58 | #ifdef CONFIG_SMP | 56 | #ifdef CONFIG_SMP |
| @@ -66,14 +64,7 @@ SECTIONS | |||
| 66 | NOTES :code :note /* put .notes in text and mark in PT_NOTE */ | 64 | NOTES :code :note /* put .notes in text and mark in PT_NOTE */ |
| 67 | code_continues : {} :code /* switch back to regular program... */ | 65 | code_continues : {} :code /* switch back to regular program... */ |
| 68 | 66 | ||
| 69 | /* Exception table */ | 67 | EXCEPTION_TABLE(16) |
| 70 | . = ALIGN(16); | ||
| 71 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) | ||
| 72 | { | ||
| 73 | __start___ex_table = .; | ||
| 74 | *(__ex_table) | ||
| 75 | __stop___ex_table = .; | ||
| 76 | } | ||
| 77 | 68 | ||
| 78 | /* MCA table */ | 69 | /* MCA table */ |
| 79 | . = ALIGN(16); | 70 | . = ALIGN(16); |
| @@ -115,38 +106,9 @@ SECTIONS | |||
| 115 | 106 | ||
| 116 | . = ALIGN(PAGE_SIZE); | 107 | . = ALIGN(PAGE_SIZE); |
| 117 | __init_begin = .; | 108 | __init_begin = .; |
| 118 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) | ||
| 119 | { | ||
| 120 | _sinittext = .; | ||
| 121 | INIT_TEXT | ||
| 122 | _einittext = .; | ||
| 123 | } | ||
| 124 | |||
| 125 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) | ||
| 126 | { INIT_DATA } | ||
| 127 | 109 | ||
| 128 | #ifdef CONFIG_BLK_DEV_INITRD | 110 | INIT_TEXT_SECTION(PAGE_SIZE) |
| 129 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) | 111 | INIT_DATA_SECTION(16) |
| 130 | { | ||
| 131 | __initramfs_start = .; | ||
| 132 | *(.init.ramfs) | ||
| 133 | __initramfs_end = .; | ||
| 134 | } | ||
| 135 | #endif | ||
| 136 | |||
| 137 | . = ALIGN(16); | ||
| 138 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) | ||
| 139 | { | ||
| 140 | __setup_start = .; | ||
| 141 | *(.init.setup) | ||
| 142 | __setup_end = .; | ||
| 143 | } | ||
| 144 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) | ||
| 145 | { | ||
| 146 | __initcall_start = .; | ||
| 147 | INITCALLS | ||
| 148 | __initcall_end = .; | ||
| 149 | } | ||
| 150 | 112 | ||
| 151 | .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET) | 113 | .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET) |
| 152 | { | 114 | { |
| @@ -204,24 +166,13 @@ SECTIONS | |||
| 204 | } | 166 | } |
| 205 | #endif | 167 | #endif |
| 206 | 168 | ||
| 207 | . = ALIGN(8); | ||
| 208 | __con_initcall_start = .; | ||
| 209 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) | ||
| 210 | { *(.con_initcall.init) } | ||
| 211 | __con_initcall_end = .; | ||
| 212 | __security_initcall_start = .; | ||
| 213 | .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET) | ||
| 214 | { *(.security_initcall.init) } | ||
| 215 | __security_initcall_end = .; | ||
| 216 | . = ALIGN(PAGE_SIZE); | 169 | . = ALIGN(PAGE_SIZE); |
| 217 | __init_end = .; | 170 | __init_end = .; |
| 218 | 171 | ||
| 219 | /* The initial task and kernel stack */ | ||
| 220 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) | ||
| 221 | { *(.data.init_task) } | ||
| 222 | |||
| 223 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) | 172 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) |
| 224 | { *(__special_page_section) | 173 | { |
| 174 | PAGE_ALIGNED_DATA(PAGE_SIZE) | ||
| 175 | . = ALIGN(PAGE_SIZE); | ||
| 225 | __start_gate_section = .; | 176 | __start_gate_section = .; |
| 226 | *(.data.gate) | 177 | *(.data.gate) |
| 227 | __stop_gate_section = .; | 178 | __stop_gate_section = .; |
| @@ -236,12 +187,6 @@ SECTIONS | |||
| 236 | * kernel data | 187 | * kernel data |
| 237 | */ | 188 | */ |
| 238 | 189 | ||
| 239 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) | ||
| 240 | { *(.data.read_mostly) } | ||
| 241 | |||
| 242 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) | ||
| 243 | { *(.data.cacheline_aligned) } | ||
| 244 | |||
| 245 | /* Per-cpu data: */ | 190 | /* Per-cpu data: */ |
| 246 | . = ALIGN(PERCPU_PAGE_SIZE); | 191 | . = ALIGN(PERCPU_PAGE_SIZE); |
| 247 | PERCPU_VADDR(PERCPU_ADDR, :percpu) | 192 | PERCPU_VADDR(PERCPU_ADDR, :percpu) |
| @@ -258,6 +203,9 @@ SECTIONS | |||
| 258 | __cpu0_per_cpu = .; | 203 | __cpu0_per_cpu = .; |
| 259 | . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */ | 204 | . = . + PERCPU_PAGE_SIZE; /* cpu0 per-cpu space */ |
| 260 | #endif | 205 | #endif |
| 206 | INIT_TASK_DATA(PAGE_SIZE) | ||
| 207 | CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES) | ||
| 208 | READ_MOSTLY_DATA(SMP_CACHE_BYTES) | ||
| 261 | DATA_DATA | 209 | DATA_DATA |
| 262 | *(.data1) | 210 | *(.data1) |
| 263 | *(.gnu.linkonce.d*) | 211 | *(.gnu.linkonce.d*) |
| @@ -274,48 +222,15 @@ SECTIONS | |||
| 274 | .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) | 222 | .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) |
| 275 | { *(.sdata) *(.sdata1) *(.srdata) } | 223 | { *(.sdata) *(.sdata1) *(.srdata) } |
| 276 | _edata = .; | 224 | _edata = .; |
| 277 | __bss_start = .; | 225 | |
| 278 | .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) | 226 | BSS_SECTION(0, 0, 0) |
| 279 | { *(.sbss) *(.scommon) } | ||
| 280 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) | ||
| 281 | { *(.bss) *(COMMON) } | ||
| 282 | __bss_stop = .; | ||
| 283 | 227 | ||
| 284 | _end = .; | 228 | _end = .; |
| 285 | 229 | ||
| 286 | code : { } :code | 230 | code : { } :code |
| 287 | /* Stabs debugging sections. */ | 231 | |
| 288 | .stab 0 : { *(.stab) } | 232 | STABS_DEBUG |
| 289 | .stabstr 0 : { *(.stabstr) } | 233 | DWARF_DEBUG |
| 290 | .stab.excl 0 : { *(.stab.excl) } | ||
| 291 | .stab.exclstr 0 : { *(.stab.exclstr) } | ||
| 292 | .stab.index 0 : { *(.stab.index) } | ||
| 293 | .stab.indexstr 0 : { *(.stab.indexstr) } | ||
| 294 | /* DWARF debug sections. | ||
| 295 | Symbols in the DWARF debugging sections are relative to the beginning | ||
| 296 | of the section so we begin them at 0. */ | ||
| 297 | /* DWARF 1 */ | ||
| 298 | .debug 0 : { *(.debug) } | ||
| 299 | .line 0 : { *(.line) } | ||
| 300 | /* GNU DWARF 1 extensions */ | ||
| 301 | .debug_srcinfo 0 : { *(.debug_srcinfo) } | ||
| 302 | .debug_sfnames 0 : { *(.debug_sfnames) } | ||
| 303 | /* DWARF 1.1 and DWARF 2 */ | ||
| 304 | .debug_aranges 0 : { *(.debug_aranges) } | ||
| 305 | .debug_pubnames 0 : { *(.debug_pubnames) } | ||
| 306 | /* DWARF 2 */ | ||
| 307 | .debug_info 0 : { *(.debug_info) } | ||
| 308 | .debug_abbrev 0 : { *(.debug_abbrev) } | ||
| 309 | .debug_line 0 : { *(.debug_line) } | ||
| 310 | .debug_frame 0 : { *(.debug_frame) } | ||
| 311 | .debug_str 0 : { *(.debug_str) } | ||
| 312 | .debug_loc 0 : { *(.debug_loc) } | ||
| 313 | .debug_macinfo 0 : { *(.debug_macinfo) } | ||
| 314 | /* SGI/MIPS DWARF 2 extensions */ | ||
| 315 | .debug_weaknames 0 : { *(.debug_weaknames) } | ||
| 316 | .debug_funcnames 0 : { *(.debug_funcnames) } | ||
| 317 | .debug_typenames 0 : { *(.debug_typenames) } | ||
| 318 | .debug_varnames 0 : { *(.debug_varnames) } | ||
| 319 | 234 | ||
| 320 | /* Default discards */ | 235 | /* Default discards */ |
| 321 | DISCARDS | 236 | DISCARDS |
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_ate.c b/arch/ia64/sn/pci/pcibr/pcibr_ate.c index 239b3cedcf2b..5bc34eac9e01 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_ate.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_ate.c | |||
| @@ -54,6 +54,8 @@ static int find_free_ate(struct ate_resource *ate_resource, int start, | |||
| 54 | break; | 54 | break; |
| 55 | } | 55 | } |
| 56 | } | 56 | } |
| 57 | if (i >= ate_resource->num_ate) | ||
| 58 | return -1; | ||
| 57 | } else | 59 | } else |
| 58 | index++; /* Try next ate */ | 60 | index++; /* Try next ate */ |
| 59 | } | 61 | } |
diff --git a/arch/m68knommu/kernel/time.c b/arch/m68knommu/kernel/time.c index c2aa717de08a..a90acf5b0cde 100644 --- a/arch/m68knommu/kernel/time.c +++ b/arch/m68knommu/kernel/time.c | |||
| @@ -72,9 +72,10 @@ static unsigned long read_rtc_mmss(void) | |||
| 72 | return mktime(year, mon, day, hour, min, sec); | 72 | return mktime(year, mon, day, hour, min, sec); |
| 73 | } | 73 | } |
| 74 | 74 | ||
| 75 | unsigned long read_persistent_clock(void) | 75 | void read_persistent_clock(struct timespec *ts) |
| 76 | { | 76 | { |
| 77 | return read_rtc_mmss(); | 77 | ts->tv_sec = read_rtc_mmss(); |
| 78 | ts->tv_nsec = 0; | ||
| 78 | } | 79 | } |
| 79 | 80 | ||
| 80 | int update_persistent_clock(struct timespec now) | 81 | int update_persistent_clock(struct timespec now) |
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c index 463136e6685a..02f505f23c32 100644 --- a/arch/mips/dec/time.c +++ b/arch/mips/dec/time.c | |||
| @@ -18,7 +18,7 @@ | |||
| 18 | #include <asm/dec/ioasic.h> | 18 | #include <asm/dec/ioasic.h> |
| 19 | #include <asm/dec/machtype.h> | 19 | #include <asm/dec/machtype.h> |
| 20 | 20 | ||
| 21 | unsigned long read_persistent_clock(void) | 21 | void read_persistent_clock(struct timespec *ts) |
| 22 | { | 22 | { |
| 23 | unsigned int year, mon, day, hour, min, sec, real_year; | 23 | unsigned int year, mon, day, hour, min, sec, real_year; |
| 24 | unsigned long flags; | 24 | unsigned long flags; |
| @@ -53,7 +53,8 @@ unsigned long read_persistent_clock(void) | |||
| 53 | 53 | ||
| 54 | year += real_year - 72 + 2000; | 54 | year += real_year - 72 + 2000; |
| 55 | 55 | ||
| 56 | return mktime(year, mon, day, hour, min, sec); | 56 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); |
| 57 | ts->tv_nsec = 0; | ||
| 57 | } | 58 | } |
| 58 | 59 | ||
| 59 | /* | 60 | /* |
diff --git a/arch/mips/lasat/ds1603.c b/arch/mips/lasat/ds1603.c index 52cb1436a12a..c6fd96ff118d 100644 --- a/arch/mips/lasat/ds1603.c +++ b/arch/mips/lasat/ds1603.c | |||
| @@ -135,7 +135,7 @@ static void rtc_end_op(void) | |||
| 135 | lasat_ndelay(1000); | 135 | lasat_ndelay(1000); |
| 136 | } | 136 | } |
| 137 | 137 | ||
| 138 | unsigned long read_persistent_clock(void) | 138 | void read_persistent_clock(struct timespec *ts) |
| 139 | { | 139 | { |
| 140 | unsigned long word; | 140 | unsigned long word; |
| 141 | unsigned long flags; | 141 | unsigned long flags; |
| @@ -147,7 +147,8 @@ unsigned long read_persistent_clock(void) | |||
| 147 | rtc_end_op(); | 147 | rtc_end_op(); |
| 148 | spin_unlock_irqrestore(&rtc_lock, flags); | 148 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 149 | 149 | ||
| 150 | return word; | 150 | ts->tv_sec = word; |
| 151 | ts->tv_nsec = 0; | ||
| 151 | } | 152 | } |
| 152 | 153 | ||
| 153 | int rtc_mips_set_mmss(unsigned long time) | 154 | int rtc_mips_set_mmss(unsigned long time) |
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c index 8f88886feb12..3f04d4c406b7 100644 --- a/arch/mips/lasat/sysctl.c +++ b/arch/mips/lasat/sysctl.c | |||
| @@ -92,10 +92,12 @@ static int rtctmp; | |||
| 92 | int proc_dolasatrtc(ctl_table *table, int write, struct file *filp, | 92 | int proc_dolasatrtc(ctl_table *table, int write, struct file *filp, |
| 93 | void *buffer, size_t *lenp, loff_t *ppos) | 93 | void *buffer, size_t *lenp, loff_t *ppos) |
| 94 | { | 94 | { |
| 95 | struct timespec ts; | ||
| 95 | int r; | 96 | int r; |
| 96 | 97 | ||
| 97 | if (!write) { | 98 | if (!write) { |
| 98 | rtctmp = read_persistent_clock(); | 99 | read_persistent_clock(&ts); |
| 100 | rtctmp = ts.tv_sec; | ||
| 99 | /* check for time < 0 and set to 0 */ | 101 | /* check for time < 0 and set to 0 */ |
| 100 | if (rtctmp < 0) | 102 | if (rtctmp < 0) |
| 101 | rtctmp = 0; | 103 | rtctmp = 0; |
| @@ -134,9 +136,11 @@ int sysctl_lasat_rtc(ctl_table *table, | |||
| 134 | void *oldval, size_t *oldlenp, | 136 | void *oldval, size_t *oldlenp, |
| 135 | void *newval, size_t newlen) | 137 | void *newval, size_t newlen) |
| 136 | { | 138 | { |
| 139 | struct timespec ts; | ||
| 137 | int r; | 140 | int r; |
| 138 | 141 | ||
| 139 | rtctmp = read_persistent_clock(); | 142 | read_persistent_clock(&ts); |
| 143 | rtctmp = ts.tv_sec; | ||
| 140 | if (rtctmp < 0) | 144 | if (rtctmp < 0) |
| 141 | rtctmp = 0; | 145 | rtctmp = 0; |
| 142 | r = sysctl_intvec(table, oldval, oldlenp, newval, newlen); | 146 | r = sysctl_intvec(table, oldval, oldlenp, newval, newlen); |
diff --git a/arch/mips/loongson/common/time.c b/arch/mips/loongson/common/time.c index b13d17174654..6e08c8270abe 100644 --- a/arch/mips/loongson/common/time.c +++ b/arch/mips/loongson/common/time.c | |||
| @@ -21,7 +21,8 @@ void __init plat_time_init(void) | |||
| 21 | mips_hpt_frequency = cpu_clock_freq / 2; | 21 | mips_hpt_frequency = cpu_clock_freq / 2; |
| 22 | } | 22 | } |
| 23 | 23 | ||
| 24 | unsigned long read_persistent_clock(void) | 24 | void read_persistent_clock(struct timespec *ts) |
| 25 | { | 25 | { |
| 26 | return mc146818_get_cmos_time(); | 26 | ts->tv_sec = mc146818_get_cmos_time(); |
| 27 | ts->tv_nsec = 0; | ||
| 27 | } | 28 | } |
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index 0b97d47691fc..3c6f190aa61c 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c | |||
| @@ -100,9 +100,10 @@ static unsigned int __init estimate_cpu_frequency(void) | |||
| 100 | return count; | 100 | return count; |
| 101 | } | 101 | } |
| 102 | 102 | ||
| 103 | unsigned long read_persistent_clock(void) | 103 | void read_persistent_clock(struct timespec *ts) |
| 104 | { | 104 | { |
| 105 | return mc146818_get_cmos_time(); | 105 | ts->tv_sec = mc146818_get_cmos_time(); |
| 106 | ts->tv_nsec = 0; | ||
| 106 | } | 107 | } |
| 107 | 108 | ||
| 108 | static void __init plat_perf_setup(void) | 109 | static void __init plat_perf_setup(void) |
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c index 2d3c0dca275d..3498ac9c35af 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.c +++ b/arch/mips/pmc-sierra/yosemite/setup.c | |||
| @@ -70,7 +70,7 @@ void __init bus_error_init(void) | |||
| 70 | } | 70 | } |
| 71 | 71 | ||
| 72 | 72 | ||
| 73 | unsigned long read_persistent_clock(void) | 73 | void read_persistent_clock(struct timespec *ts) |
| 74 | { | 74 | { |
| 75 | unsigned int year, month, day, hour, min, sec; | 75 | unsigned int year, month, day, hour, min, sec; |
| 76 | unsigned long flags; | 76 | unsigned long flags; |
| @@ -92,7 +92,8 @@ unsigned long read_persistent_clock(void) | |||
| 92 | m48t37_base->control = 0x00; | 92 | m48t37_base->control = 0x00; |
| 93 | spin_unlock_irqrestore(&rtc_lock, flags); | 93 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 94 | 94 | ||
| 95 | return mktime(year, month, day, hour, min, sec); | 95 | ts->tv_sec = mktime(year, month, day, hour, min, sec); |
| 96 | ts->tv_nsec = 0; | ||
| 96 | } | 97 | } |
| 97 | 98 | ||
| 98 | int rtc_mips_set_time(unsigned long tim) | 99 | int rtc_mips_set_time(unsigned long tim) |
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 672e45d495a9..623ffc933c4c 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c | |||
| @@ -87,19 +87,26 @@ enum swarm_rtc_type { | |||
| 87 | 87 | ||
| 88 | enum swarm_rtc_type swarm_rtc_type; | 88 | enum swarm_rtc_type swarm_rtc_type; |
| 89 | 89 | ||
| 90 | unsigned long read_persistent_clock(void) | 90 | void read_persistent_clock(struct timespec *ts) |
| 91 | { | 91 | { |
| 92 | unsigned long sec; | ||
| 93 | |||
| 92 | switch (swarm_rtc_type) { | 94 | switch (swarm_rtc_type) { |
| 93 | case RTC_XICOR: | 95 | case RTC_XICOR: |
| 94 | return xicor_get_time(); | 96 | sec = xicor_get_time(); |
| 97 | break; | ||
| 95 | 98 | ||
| 96 | case RTC_M4LT81: | 99 | case RTC_M4LT81: |
| 97 | return m41t81_get_time(); | 100 | sec = m41t81_get_time(); |
| 101 | break; | ||
| 98 | 102 | ||
| 99 | case RTC_NONE: | 103 | case RTC_NONE: |
| 100 | default: | 104 | default: |
| 101 | return mktime(2000, 1, 1, 0, 0, 0); | 105 | sec = mktime(2000, 1, 1, 0, 0, 0); |
| 106 | break; | ||
| 102 | } | 107 | } |
| 108 | ts->tv_sec = sec; | ||
| 109 | tv->tv_nsec = 0; | ||
| 103 | } | 110 | } |
| 104 | 111 | ||
| 105 | int rtc_mips_set_time(unsigned long sec) | 112 | int rtc_mips_set_time(unsigned long sec) |
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c index 0d9ec1a5c24a..62df6a598e0a 100644 --- a/arch/mips/sni/time.c +++ b/arch/mips/sni/time.c | |||
| @@ -182,7 +182,8 @@ void __init plat_time_init(void) | |||
| 182 | setup_pit_timer(); | 182 | setup_pit_timer(); |
| 183 | } | 183 | } |
| 184 | 184 | ||
| 185 | unsigned long read_persistent_clock(void) | 185 | void read_persistent_clock(struct timespec *ts) |
| 186 | { | 186 | { |
| 187 | return -1; | 187 | ts->tv_sec = -1; |
| 188 | ts->tv_nsec = 0; | ||
| 188 | } | 189 | } |
diff --git a/arch/mn10300/kernel/asm-offsets.c b/arch/mn10300/kernel/asm-offsets.c index 2646fcbd7d89..82b40079ad76 100644 --- a/arch/mn10300/kernel/asm-offsets.c +++ b/arch/mn10300/kernel/asm-offsets.c | |||
| @@ -95,7 +95,7 @@ void foo(void) | |||
| 95 | OFFSET(__iobase, mn10300_serial_port, _iobase); | 95 | OFFSET(__iobase, mn10300_serial_port, _iobase); |
| 96 | 96 | ||
| 97 | DEFINE(__UART_XMIT_SIZE, UART_XMIT_SIZE); | 97 | DEFINE(__UART_XMIT_SIZE, UART_XMIT_SIZE); |
| 98 | OFFSET(__xmit_buffer, uart_info, xmit.buf); | 98 | OFFSET(__xmit_buffer, uart_state, xmit.buf); |
| 99 | OFFSET(__xmit_head, uart_info, xmit.head); | 99 | OFFSET(__xmit_head, uart_state, xmit.head); |
| 100 | OFFSET(__xmit_tail, uart_info, xmit.tail); | 100 | OFFSET(__xmit_tail, uart_state, xmit.tail); |
| 101 | } | 101 | } |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index a180b4f9a4f6..465e498bcb33 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
| @@ -774,11 +774,12 @@ int update_persistent_clock(struct timespec now) | |||
| 774 | return ppc_md.set_rtc_time(&tm); | 774 | return ppc_md.set_rtc_time(&tm); |
| 775 | } | 775 | } |
| 776 | 776 | ||
| 777 | unsigned long read_persistent_clock(void) | 777 | void read_persistent_clock(struct timespec *ts) |
| 778 | { | 778 | { |
| 779 | struct rtc_time tm; | 779 | struct rtc_time tm; |
| 780 | static int first = 1; | 780 | static int first = 1; |
| 781 | 781 | ||
| 782 | ts->tv_nsec = 0; | ||
| 782 | /* XXX this is a litle fragile but will work okay in the short term */ | 783 | /* XXX this is a litle fragile but will work okay in the short term */ |
| 783 | if (first) { | 784 | if (first) { |
| 784 | first = 0; | 785 | first = 0; |
| @@ -786,14 +787,18 @@ unsigned long read_persistent_clock(void) | |||
| 786 | timezone_offset = ppc_md.time_init(); | 787 | timezone_offset = ppc_md.time_init(); |
| 787 | 788 | ||
| 788 | /* get_boot_time() isn't guaranteed to be safe to call late */ | 789 | /* get_boot_time() isn't guaranteed to be safe to call late */ |
| 789 | if (ppc_md.get_boot_time) | 790 | if (ppc_md.get_boot_time) { |
| 790 | return ppc_md.get_boot_time() -timezone_offset; | 791 | ts->tv_sec = ppc_md.get_boot_time() - timezone_offset; |
| 792 | return; | ||
| 793 | } | ||
| 794 | } | ||
| 795 | if (!ppc_md.get_rtc_time) { | ||
| 796 | ts->tv_sec = 0; | ||
| 797 | return; | ||
| 791 | } | 798 | } |
| 792 | if (!ppc_md.get_rtc_time) | ||
| 793 | return 0; | ||
| 794 | ppc_md.get_rtc_time(&tm); | 799 | ppc_md.get_rtc_time(&tm); |
| 795 | return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday, | 800 | ts->tv_sec = mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday, |
| 796 | tm.tm_hour, tm.tm_min, tm.tm_sec); | 801 | tm.tm_hour, tm.tm_min, tm.tm_sec); |
| 797 | } | 802 | } |
| 798 | 803 | ||
| 799 | /* clocksource code */ | 804 | /* clocksource code */ |
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c index c7ae4b17e0e3..e9d94f61d500 100644 --- a/arch/s390/kernel/sys_s390.c +++ b/arch/s390/kernel/sys_s390.c | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | #include <linux/personality.h> | 29 | #include <linux/personality.h> |
| 30 | #include <linux/unistd.h> | 30 | #include <linux/unistd.h> |
| 31 | #include <linux/ipc.h> | 31 | #include <linux/ipc.h> |
| 32 | #include <linux/syscalls.h> | ||
| 33 | #include <asm/uaccess.h> | 32 | #include <asm/uaccess.h> |
| 34 | #include "entry.h" | 33 | #include "entry.h" |
| 35 | 34 | ||
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c index e3dc28b8075d..34162a0b2caa 100644 --- a/arch/s390/kernel/time.c +++ b/arch/s390/kernel/time.c | |||
| @@ -184,12 +184,14 @@ static void timing_alert_interrupt(__u16 code) | |||
| 184 | static void etr_reset(void); | 184 | static void etr_reset(void); |
| 185 | static void stp_reset(void); | 185 | static void stp_reset(void); |
| 186 | 186 | ||
| 187 | unsigned long read_persistent_clock(void) | 187 | void read_persistent_clock(struct timespec *ts) |
| 188 | { | 188 | { |
| 189 | struct timespec ts; | 189 | tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts); |
| 190 | } | ||
| 190 | 191 | ||
| 191 | tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts); | 192 | void read_boot_clock(struct timespec *ts) |
| 192 | return ts.tv_sec; | 193 | { |
| 194 | tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts); | ||
| 193 | } | 195 | } |
| 194 | 196 | ||
| 195 | static cycle_t read_tod_clock(struct clocksource *cs) | 197 | static cycle_t read_tod_clock(struct clocksource *cs) |
| @@ -207,6 +209,10 @@ static struct clocksource clocksource_tod = { | |||
| 207 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 209 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 208 | }; | 210 | }; |
| 209 | 211 | ||
| 212 | struct clocksource * __init clocksource_default_clock(void) | ||
| 213 | { | ||
| 214 | return &clocksource_tod; | ||
| 215 | } | ||
| 210 | 216 | ||
| 211 | void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) | 217 | void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) |
| 212 | { | 218 | { |
| @@ -244,10 +250,6 @@ void update_vsyscall_tz(void) | |||
| 244 | */ | 250 | */ |
| 245 | void __init time_init(void) | 251 | void __init time_init(void) |
| 246 | { | 252 | { |
| 247 | struct timespec ts; | ||
| 248 | unsigned long flags; | ||
| 249 | cycle_t now; | ||
| 250 | |||
| 251 | /* Reset time synchronization interfaces. */ | 253 | /* Reset time synchronization interfaces. */ |
| 252 | etr_reset(); | 254 | etr_reset(); |
| 253 | stp_reset(); | 255 | stp_reset(); |
| @@ -263,26 +265,6 @@ void __init time_init(void) | |||
| 263 | if (clocksource_register(&clocksource_tod) != 0) | 265 | if (clocksource_register(&clocksource_tod) != 0) |
| 264 | panic("Could not register TOD clock source"); | 266 | panic("Could not register TOD clock source"); |
| 265 | 267 | ||
| 266 | /* | ||
| 267 | * The TOD clock is an accurate clock. The xtime should be | ||
| 268 | * initialized in a way that the difference between TOD and | ||
| 269 | * xtime is reasonably small. Too bad that timekeeping_init | ||
| 270 | * sets xtime.tv_nsec to zero. In addition the clock source | ||
| 271 | * change from the jiffies clock source to the TOD clock | ||
| 272 | * source add another error of up to 1/HZ second. The same | ||
| 273 | * function sets wall_to_monotonic to a value that is too | ||
| 274 | * small for /proc/uptime to be accurate. | ||
| 275 | * Reset xtime and wall_to_monotonic to sane values. | ||
| 276 | */ | ||
| 277 | write_seqlock_irqsave(&xtime_lock, flags); | ||
| 278 | now = get_clock(); | ||
| 279 | tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime); | ||
| 280 | clocksource_tod.cycle_last = now; | ||
| 281 | clocksource_tod.raw_time = xtime; | ||
| 282 | tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts); | ||
| 283 | set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec); | ||
| 284 | write_sequnlock_irqrestore(&xtime_lock, flags); | ||
| 285 | |||
| 286 | /* Enable TOD clock interrupts on the boot cpu. */ | 268 | /* Enable TOD clock interrupts on the boot cpu. */ |
| 287 | init_cpu_timer(); | 269 | init_cpu_timer(); |
| 288 | 270 | ||
diff --git a/arch/score/Kconfig b/arch/score/Kconfig new file mode 100644 index 000000000000..55d413e6dcf2 --- /dev/null +++ b/arch/score/Kconfig | |||
| @@ -0,0 +1,141 @@ | |||
| 1 | # For a description of the syntax of this configuration file, | ||
| 2 | # see Documentation/kbuild/kconfig-language.txt. | ||
| 3 | |||
| 4 | mainmenu "Linux/SCORE Kernel Configuration" | ||
| 5 | |||
| 6 | menu "Machine selection" | ||
| 7 | |||
| 8 | choice | ||
| 9 | prompt "System type" | ||
| 10 | default MACH_SPCT6600 | ||
| 11 | |||
| 12 | config ARCH_SCORE7 | ||
| 13 | bool "SCORE7 processor" | ||
| 14 | select SYS_SUPPORTS_32BIT_KERNEL | ||
| 15 | select CPU_SCORE7 | ||
| 16 | select GENERIC_HAS_IOMAP | ||
| 17 | |||
| 18 | config MACH_SPCT6600 | ||
| 19 | bool "SPCT6600 series based machines" | ||
| 20 | select SYS_SUPPORTS_32BIT_KERNEL | ||
| 21 | select CPU_SCORE7 | ||
| 22 | select GENERIC_HAS_IOMAP | ||
| 23 | |||
| 24 | config SCORE_SIM | ||
| 25 | bool "Score simulator" | ||
| 26 | select SYS_SUPPORTS_32BIT_KERNEL | ||
| 27 | select CPU_SCORE7 | ||
| 28 | select GENERIC_HAS_IOMAP | ||
| 29 | endchoice | ||
| 30 | |||
| 31 | endmenu | ||
| 32 | |||
| 33 | config CPU_SCORE7 | ||
| 34 | bool | ||
| 35 | |||
| 36 | config GENERIC_IOMAP | ||
| 37 | def_bool y | ||
| 38 | |||
| 39 | config NO_DMA | ||
| 40 | bool | ||
| 41 | default y | ||
| 42 | |||
| 43 | config RWSEM_GENERIC_SPINLOCK | ||
| 44 | def_bool y | ||
| 45 | |||
| 46 | config GENERIC_FIND_NEXT_BIT | ||
| 47 | def_bool y | ||
| 48 | |||
| 49 | config GENERIC_HWEIGHT | ||
| 50 | def_bool y | ||
| 51 | |||
| 52 | config GENERIC_CALIBRATE_DELAY | ||
| 53 | def_bool y | ||
| 54 | |||
| 55 | config GENERIC_CLOCKEVENTS | ||
| 56 | def_bool y | ||
| 57 | |||
| 58 | config GENERIC_TIME | ||
| 59 | def_bool y | ||
| 60 | |||
| 61 | config SCHED_NO_NO_OMIT_FRAME_POINTER | ||
| 62 | def_bool y | ||
| 63 | |||
| 64 | config GENERIC_HARDIRQS_NO__DO_IRQ | ||
| 65 | def_bool y | ||
| 66 | |||
| 67 | config GENERIC_SYSCALL_TABLE | ||
| 68 | def_bool y | ||
| 69 | |||
| 70 | config SCORE_L1_CACHE_SHIFT | ||
| 71 | int | ||
| 72 | default "4" | ||
| 73 | |||
| 74 | menu "Kernel type" | ||
| 75 | |||
| 76 | config 32BIT | ||
| 77 | def_bool y | ||
| 78 | |||
| 79 | config GENERIC_HARDIRQS | ||
| 80 | def_bool y | ||
| 81 | |||
| 82 | config ARCH_FLATMEM_ENABLE | ||
| 83 | def_bool y | ||
| 84 | |||
| 85 | config ARCH_POPULATES_NODE_MAP | ||
| 86 | def_bool y | ||
| 87 | |||
| 88 | source "mm/Kconfig" | ||
| 89 | |||
| 90 | config MEMORY_START | ||
| 91 | hex | ||
| 92 | default 0xa0000000 | ||
| 93 | |||
| 94 | source "kernel/time/Kconfig" | ||
| 95 | source "kernel/Kconfig.hz" | ||
| 96 | source "kernel/Kconfig.preempt" | ||
| 97 | |||
| 98 | endmenu | ||
| 99 | |||
| 100 | config RWSEM_GENERIC_SPINLOCK | ||
| 101 | def_bool y | ||
| 102 | |||
| 103 | config LOCKDEP_SUPPORT | ||
| 104 | def_bool y | ||
| 105 | |||
| 106 | config STACKTRACE_SUPPORT | ||
| 107 | def_bool y | ||
| 108 | |||
| 109 | source "init/Kconfig" | ||
| 110 | |||
| 111 | config PROBE_INITRD_HEADER | ||
| 112 | bool "Probe initrd header created by addinitrd" | ||
| 113 | depends on BLK_DEV_INITRD | ||
| 114 | help | ||
| 115 | Probe initrd header at the last page of kernel image. | ||
| 116 | Say Y here if you are using arch/score/boot/addinitrd.c to | ||
| 117 | add initrd or initramfs image to the kernel image. | ||
| 118 | Otherwise, say N. | ||
| 119 | |||
| 120 | config MMU | ||
| 121 | def_bool y | ||
| 122 | |||
| 123 | menu "Executable file formats" | ||
| 124 | |||
| 125 | source "fs/Kconfig.binfmt" | ||
| 126 | |||
| 127 | endmenu | ||
| 128 | |||
| 129 | source "net/Kconfig" | ||
| 130 | |||
| 131 | source "drivers/Kconfig" | ||
| 132 | |||
| 133 | source "fs/Kconfig" | ||
| 134 | |||
| 135 | source "arch/score/Kconfig.debug" | ||
| 136 | |||
| 137 | source "security/Kconfig" | ||
| 138 | |||
| 139 | source "crypto/Kconfig" | ||
| 140 | |||
| 141 | source "lib/Kconfig" | ||
diff --git a/arch/score/Kconfig.debug b/arch/score/Kconfig.debug new file mode 100644 index 000000000000..451ed54ce646 --- /dev/null +++ b/arch/score/Kconfig.debug | |||
| @@ -0,0 +1,37 @@ | |||
| 1 | menu "Kernel hacking" | ||
| 2 | |||
| 3 | config TRACE_IRQFLAGS_SUPPORT | ||
| 4 | bool | ||
| 5 | default y | ||
| 6 | |||
| 7 | source "lib/Kconfig.debug" | ||
| 8 | |||
| 9 | config CMDLINE | ||
| 10 | string "Default kernel command string" | ||
| 11 | default "" | ||
| 12 | help | ||
| 13 | On some platforms, there is currently no way for the boot loader to | ||
| 14 | pass arguments to the kernel. For these platforms, you can supply | ||
| 15 | some command-line options at build time by entering them here. In | ||
| 16 | other cases you can specify kernel args so that you don't have | ||
| 17 | to set them up in board prom initialization routines. | ||
| 18 | |||
| 19 | config DEBUG_STACK_USAGE | ||
| 20 | bool "Enable stack utilization instrumentation" | ||
| 21 | depends on DEBUG_KERNEL | ||
| 22 | help | ||
| 23 | Enables the display of the minimum amount of free stack which each | ||
| 24 | task has ever had available in the sysrq-T and sysrq-P debug output. | ||
| 25 | |||
| 26 | This option will slow down process creation somewhat. | ||
| 27 | |||
| 28 | config RUNTIME_DEBUG | ||
| 29 | bool "Enable run-time debugging" | ||
| 30 | depends on DEBUG_KERNEL | ||
| 31 | help | ||
| 32 | If you say Y here, some debugging macros will do run-time checking. | ||
| 33 | If you say N here, those macros will mostly turn to no-ops. See | ||
| 34 | include/asm-score/debug.h for debuging macros. | ||
| 35 | If unsure, say N. | ||
| 36 | |||
| 37 | endmenu | ||
diff --git a/arch/score/Makefile b/arch/score/Makefile new file mode 100644 index 000000000000..68e0cd06d5c9 --- /dev/null +++ b/arch/score/Makefile | |||
| @@ -0,0 +1,43 @@ | |||
| 1 | # | ||
| 2 | # arch/score/Makefile | ||
| 3 | # | ||
| 4 | # This file is subject to the terms and conditions of the GNU General Public | ||
| 5 | # License. See the file "COPYING" in the main directory of this archive | ||
| 6 | # for more details. | ||
| 7 | # | ||
| 8 | |||
| 9 | KBUILD_DEFCONFIG := spct6600_defconfig | ||
| 10 | CROSS_COMPILE := score-linux- | ||
| 11 | |||
| 12 | # | ||
| 13 | # CPU-dependent compiler/assembler options for optimization. | ||
| 14 | # | ||
| 15 | cflags-y += -G0 -pipe -mel -mnhwloop -D__SCOREEL__ \ | ||
| 16 | -D__linux__ -ffunction-sections -ffreestanding | ||
| 17 | |||
| 18 | # | ||
| 19 | # Board-dependent options and extra files | ||
| 20 | # | ||
| 21 | KBUILD_AFLAGS += $(cflags-y) | ||
| 22 | KBUILD_CFLAGS += $(cflags-y) | ||
| 23 | MODFLAGS += -mlong-calls | ||
| 24 | LDFLAGS += --oformat elf32-littlescore | ||
| 25 | LDFLAGS_vmlinux += -G0 -static -nostdlib | ||
| 26 | |||
| 27 | head-y := arch/score/kernel/head.o | ||
| 28 | libs-y += arch/score/lib/ | ||
| 29 | core-y += arch/score/kernel/ arch/score/mm/ | ||
| 30 | |||
| 31 | boot := arch/score/boot | ||
| 32 | |||
| 33 | vmlinux.bin: vmlinux | ||
| 34 | $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ | ||
| 35 | |||
| 36 | archclean: | ||
| 37 | @$(MAKE) $(clean)=$(boot) | ||
| 38 | |||
| 39 | define archhelp | ||
| 40 | echo ' vmlinux.bin - Raw binary boot image' | ||
| 41 | echo | ||
| 42 | echo ' These will be default as apropriate for a configured platform.' | ||
| 43 | endef | ||
diff --git a/arch/score/boot/Makefile b/arch/score/boot/Makefile new file mode 100644 index 000000000000..0c5fbd0fb696 --- /dev/null +++ b/arch/score/boot/Makefile | |||
| @@ -0,0 +1,15 @@ | |||
| 1 | # | ||
| 2 | # arch/score/boot/Makefile | ||
| 3 | # | ||
| 4 | # This file is subject to the terms and conditions of the GNU General Public | ||
| 5 | # License. See the file "COPYING" in the main directory of this archive | ||
| 6 | # for more details. | ||
| 7 | # | ||
| 8 | |||
| 9 | targets := vmlinux.bin | ||
| 10 | |||
| 11 | $(obj)/vmlinux.bin: vmlinux FORCE | ||
| 12 | $(call if_changed,objcopy) | ||
| 13 | @echo 'Kernel: $@ is ready' ' (#'`cat .version`')' | ||
| 14 | |||
| 15 | clean-files += vmlinux.bin | ||
diff --git a/arch/score/configs/spct6600_defconfig b/arch/score/configs/spct6600_defconfig new file mode 100644 index 000000000000..e064943b13d4 --- /dev/null +++ b/arch/score/configs/spct6600_defconfig | |||
| @@ -0,0 +1,717 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.30-rc5 | ||
| 4 | # Fri Jun 12 18:57:07 2009 | ||
| 5 | # | ||
| 6 | |||
| 7 | # | ||
| 8 | # Machine selection | ||
| 9 | # | ||
| 10 | # CONFIG_ARCH_SCORE7 is not set | ||
| 11 | CONFIG_MACH_SPCT6600=y | ||
| 12 | # CONFIG_SCORE_SIM is not set | ||
| 13 | CONFIG_CPU_SCORE7=y | ||
| 14 | CONFIG_GENERIC_IOMAP=y | ||
| 15 | CONFIG_NO_DMA=y | ||
| 16 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 17 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 18 | CONFIG_GENERIC_HWEIGHT=y | ||
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 20 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 21 | CONFIG_GENERIC_TIME=y | ||
| 22 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
| 23 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 24 | CONFIG_GENERIC_SYSCALL_TABLE=y | ||
| 25 | CONFIG_SCORE_L1_CACHE_SHIFT=4 | ||
| 26 | |||
| 27 | # | ||
| 28 | # Kernel type | ||
| 29 | # | ||
| 30 | CONFIG_32BIT=y | ||
| 31 | CONFIG_GENERIC_HARDIRQS=y | ||
| 32 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 33 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 34 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 35 | CONFIG_FLATMEM_MANUAL=y | ||
| 36 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 37 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 38 | CONFIG_FLATMEM=y | ||
| 39 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 40 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 41 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 42 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 43 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 44 | CONFIG_VIRT_TO_BUS=y | ||
| 45 | CONFIG_UNEVICTABLE_LRU=y | ||
| 46 | CONFIG_HAVE_MLOCK=y | ||
| 47 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 48 | CONFIG_MEMORY_START=0xa0000000 | ||
| 49 | # CONFIG_NO_HZ is not set | ||
| 50 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 51 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 52 | CONFIG_HZ_100=y | ||
| 53 | # CONFIG_HZ_250 is not set | ||
| 54 | # CONFIG_HZ_300 is not set | ||
| 55 | # CONFIG_HZ_1000 is not set | ||
| 56 | CONFIG_HZ=100 | ||
| 57 | # CONFIG_SCHED_HRTICK is not set | ||
| 58 | # CONFIG_PREEMPT_NONE is not set | ||
| 59 | CONFIG_PREEMPT_VOLUNTARY=y | ||
| 60 | # CONFIG_PREEMPT is not set | ||
| 61 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 62 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 63 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 64 | |||
| 65 | # | ||
| 66 | # General setup | ||
| 67 | # | ||
| 68 | CONFIG_EXPERIMENTAL=y | ||
| 69 | CONFIG_BROKEN_ON_SMP=y | ||
| 70 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 71 | CONFIG_LOCALVERSION="" | ||
| 72 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 73 | CONFIG_SWAP=y | ||
| 74 | CONFIG_SYSVIPC=y | ||
| 75 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 76 | CONFIG_POSIX_MQUEUE=y | ||
| 77 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 78 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 79 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 80 | # CONFIG_TASKSTATS is not set | ||
| 81 | # CONFIG_AUDIT is not set | ||
| 82 | |||
| 83 | # | ||
| 84 | # RCU Subsystem | ||
| 85 | # | ||
| 86 | CONFIG_CLASSIC_RCU=y | ||
| 87 | # CONFIG_TREE_RCU is not set | ||
| 88 | # CONFIG_PREEMPT_RCU is not set | ||
| 89 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 90 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 91 | # CONFIG_IKCONFIG is not set | ||
| 92 | CONFIG_LOG_BUF_SHIFT=12 | ||
| 93 | # CONFIG_GROUP_SCHED is not set | ||
| 94 | # CONFIG_CGROUPS is not set | ||
| 95 | CONFIG_SYSFS_DEPRECATED=y | ||
| 96 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 97 | # CONFIG_RELAY is not set | ||
| 98 | # CONFIG_NAMESPACES is not set | ||
| 99 | CONFIG_BLK_DEV_INITRD=y | ||
| 100 | CONFIG_INITRAMFS_SOURCE="" | ||
| 101 | CONFIG_RD_GZIP=y | ||
| 102 | # CONFIG_RD_BZIP2 is not set | ||
| 103 | # CONFIG_RD_LZMA is not set | ||
| 104 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
| 105 | CONFIG_SYSCTL=y | ||
| 106 | CONFIG_ANON_INODES=y | ||
| 107 | CONFIG_EMBEDDED=y | ||
| 108 | CONFIG_SYSCTL_SYSCALL=y | ||
| 109 | # CONFIG_KALLSYMS is not set | ||
| 110 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 111 | # CONFIG_HOTPLUG is not set | ||
| 112 | CONFIG_PRINTK=y | ||
| 113 | CONFIG_BUG=y | ||
| 114 | CONFIG_ELF_CORE=y | ||
| 115 | CONFIG_BASE_FULL=y | ||
| 116 | CONFIG_FUTEX=y | ||
| 117 | CONFIG_EPOLL=y | ||
| 118 | CONFIG_SIGNALFD=y | ||
| 119 | CONFIG_TIMERFD=y | ||
| 120 | CONFIG_EVENTFD=y | ||
| 121 | CONFIG_SHMEM=y | ||
| 122 | CONFIG_AIO=y | ||
| 123 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 124 | CONFIG_COMPAT_BRK=y | ||
| 125 | CONFIG_SLAB=y | ||
| 126 | # CONFIG_SLUB is not set | ||
| 127 | # CONFIG_SLOB is not set | ||
| 128 | # CONFIG_PROFILING is not set | ||
| 129 | # CONFIG_MARKERS is not set | ||
| 130 | # CONFIG_SLOW_WORK is not set | ||
| 131 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
| 132 | CONFIG_SLABINFO=y | ||
| 133 | CONFIG_RT_MUTEXES=y | ||
| 134 | CONFIG_BASE_SMALL=0 | ||
| 135 | CONFIG_MODULES=y | ||
| 136 | CONFIG_MODULE_FORCE_LOAD=y | ||
| 137 | CONFIG_MODULE_UNLOAD=y | ||
| 138 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
| 139 | # CONFIG_MODVERSIONS is not set | ||
| 140 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 141 | CONFIG_BLOCK=y | ||
| 142 | CONFIG_LBD=y | ||
| 143 | # CONFIG_BLK_DEV_BSG is not set | ||
| 144 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 145 | |||
| 146 | # | ||
| 147 | # IO Schedulers | ||
| 148 | # | ||
| 149 | CONFIG_IOSCHED_NOOP=y | ||
| 150 | CONFIG_IOSCHED_AS=y | ||
| 151 | CONFIG_IOSCHED_DEADLINE=y | ||
| 152 | CONFIG_IOSCHED_CFQ=y | ||
| 153 | # CONFIG_DEFAULT_AS is not set | ||
| 154 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 155 | CONFIG_DEFAULT_CFQ=y | ||
| 156 | # CONFIG_DEFAULT_NOOP is not set | ||
| 157 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 158 | # CONFIG_PROBE_INITRD_HEADER is not set | ||
| 159 | CONFIG_MMU=y | ||
| 160 | |||
| 161 | # | ||
| 162 | # Executable file formats | ||
| 163 | # | ||
| 164 | CONFIG_BINFMT_ELF=y | ||
| 165 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 166 | # CONFIG_HAVE_AOUT is not set | ||
| 167 | CONFIG_BINFMT_MISC=y | ||
| 168 | CONFIG_NET=y | ||
| 169 | |||
| 170 | # | ||
| 171 | # Networking options | ||
| 172 | # | ||
| 173 | # CONFIG_PACKET is not set | ||
| 174 | CONFIG_UNIX=y | ||
| 175 | CONFIG_XFRM=y | ||
| 176 | # CONFIG_XFRM_USER is not set | ||
| 177 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 178 | # CONFIG_XFRM_MIGRATE is not set | ||
| 179 | # CONFIG_XFRM_STATISTICS is not set | ||
| 180 | CONFIG_NET_KEY=y | ||
| 181 | # CONFIG_NET_KEY_MIGRATE is not set | ||
| 182 | CONFIG_INET=y | ||
| 183 | CONFIG_IP_MULTICAST=y | ||
| 184 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 185 | CONFIG_IP_FIB_HASH=y | ||
| 186 | # CONFIG_IP_PNP is not set | ||
| 187 | # CONFIG_NET_IPIP is not set | ||
| 188 | # CONFIG_NET_IPGRE is not set | ||
| 189 | # CONFIG_IP_MROUTE is not set | ||
| 190 | CONFIG_ARPD=y | ||
| 191 | # CONFIG_SYN_COOKIES is not set | ||
| 192 | # CONFIG_INET_AH is not set | ||
| 193 | # CONFIG_INET_ESP is not set | ||
| 194 | # CONFIG_INET_IPCOMP is not set | ||
| 195 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 196 | # CONFIG_INET_TUNNEL is not set | ||
| 197 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 198 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 199 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 200 | # CONFIG_INET_LRO is not set | ||
| 201 | CONFIG_INET_DIAG=y | ||
| 202 | CONFIG_INET_TCP_DIAG=y | ||
| 203 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 204 | CONFIG_TCP_CONG_CUBIC=y | ||
| 205 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 206 | # CONFIG_TCP_MD5SIG is not set | ||
| 207 | # CONFIG_IPV6 is not set | ||
| 208 | # CONFIG_NETLABEL is not set | ||
| 209 | # CONFIG_NETWORK_SECMARK is not set | ||
| 210 | # CONFIG_NETFILTER is not set | ||
| 211 | # CONFIG_IP_DCCP is not set | ||
| 212 | # CONFIG_IP_SCTP is not set | ||
| 213 | # CONFIG_TIPC is not set | ||
| 214 | # CONFIG_ATM is not set | ||
| 215 | # CONFIG_BRIDGE is not set | ||
| 216 | # CONFIG_NET_DSA is not set | ||
| 217 | # CONFIG_VLAN_8021Q is not set | ||
| 218 | # CONFIG_DECNET is not set | ||
| 219 | # CONFIG_LLC2 is not set | ||
| 220 | # CONFIG_IPX is not set | ||
| 221 | # CONFIG_ATALK is not set | ||
| 222 | # CONFIG_X25 is not set | ||
| 223 | # CONFIG_LAPB is not set | ||
| 224 | # CONFIG_ECONET is not set | ||
| 225 | # CONFIG_WAN_ROUTER is not set | ||
| 226 | # CONFIG_PHONET is not set | ||
| 227 | # CONFIG_NET_SCHED is not set | ||
| 228 | # CONFIG_DCB is not set | ||
| 229 | |||
| 230 | # | ||
| 231 | # Network testing | ||
| 232 | # | ||
| 233 | # CONFIG_NET_PKTGEN is not set | ||
| 234 | # CONFIG_HAMRADIO is not set | ||
| 235 | # CONFIG_CAN is not set | ||
| 236 | # CONFIG_IRDA is not set | ||
| 237 | # CONFIG_BT is not set | ||
| 238 | # CONFIG_AF_RXRPC is not set | ||
| 239 | # CONFIG_WIRELESS is not set | ||
| 240 | # CONFIG_WIMAX is not set | ||
| 241 | # CONFIG_RFKILL is not set | ||
| 242 | # CONFIG_NET_9P is not set | ||
| 243 | |||
| 244 | # | ||
| 245 | # Device Drivers | ||
| 246 | # | ||
| 247 | |||
| 248 | # | ||
| 249 | # Generic Driver Options | ||
| 250 | # | ||
| 251 | # CONFIG_STANDALONE is not set | ||
| 252 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
| 253 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 254 | # CONFIG_CONNECTOR is not set | ||
| 255 | # CONFIG_MTD is not set | ||
| 256 | # CONFIG_PARPORT is not set | ||
| 257 | CONFIG_BLK_DEV=y | ||
| 258 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 259 | CONFIG_BLK_DEV_LOOP=y | ||
| 260 | CONFIG_BLK_DEV_CRYPTOLOOP=y | ||
| 261 | # CONFIG_BLK_DEV_NBD is not set | ||
| 262 | CONFIG_BLK_DEV_RAM=y | ||
| 263 | CONFIG_BLK_DEV_RAM_COUNT=1 | ||
| 264 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 265 | # CONFIG_BLK_DEV_XIP is not set | ||
| 266 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 267 | # CONFIG_ATA_OVER_ETH is not set | ||
| 268 | # CONFIG_MISC_DEVICES is not set | ||
| 269 | |||
| 270 | # | ||
| 271 | # SCSI device support | ||
| 272 | # | ||
| 273 | # CONFIG_RAID_ATTRS is not set | ||
| 274 | # CONFIG_SCSI is not set | ||
| 275 | # CONFIG_SCSI_DMA is not set | ||
| 276 | # CONFIG_SCSI_NETLINK is not set | ||
| 277 | # CONFIG_MD is not set | ||
| 278 | CONFIG_NETDEVICES=y | ||
| 279 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 280 | # CONFIG_DUMMY is not set | ||
| 281 | # CONFIG_BONDING is not set | ||
| 282 | # CONFIG_MACVLAN is not set | ||
| 283 | # CONFIG_EQUALIZER is not set | ||
| 284 | # CONFIG_TUN is not set | ||
| 285 | # CONFIG_VETH is not set | ||
| 286 | # CONFIG_NET_ETHERNET is not set | ||
| 287 | # CONFIG_NETDEV_1000 is not set | ||
| 288 | # CONFIG_NETDEV_10000 is not set | ||
| 289 | |||
| 290 | # | ||
| 291 | # Wireless LAN | ||
| 292 | # | ||
| 293 | # CONFIG_WLAN_PRE80211 is not set | ||
| 294 | # CONFIG_WLAN_80211 is not set | ||
| 295 | |||
| 296 | # | ||
| 297 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 298 | # | ||
| 299 | # CONFIG_WAN is not set | ||
| 300 | # CONFIG_PPP is not set | ||
| 301 | # CONFIG_SLIP is not set | ||
| 302 | # CONFIG_NETCONSOLE is not set | ||
| 303 | # CONFIG_NETPOLL is not set | ||
| 304 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 305 | # CONFIG_ISDN is not set | ||
| 306 | # CONFIG_PHONE is not set | ||
| 307 | |||
| 308 | # | ||
| 309 | # Input device support | ||
| 310 | # | ||
| 311 | CONFIG_INPUT=y | ||
| 312 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 313 | # CONFIG_INPUT_POLLDEV is not set | ||
| 314 | |||
| 315 | # | ||
| 316 | # Userland interfaces | ||
| 317 | # | ||
| 318 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 319 | # CONFIG_INPUT_JOYDEV is not set | ||
| 320 | # CONFIG_INPUT_EVDEV is not set | ||
| 321 | # CONFIG_INPUT_EVBUG is not set | ||
| 322 | |||
| 323 | # | ||
| 324 | # Input Device Drivers | ||
| 325 | # | ||
| 326 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 327 | # CONFIG_INPUT_MOUSE is not set | ||
| 328 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 329 | # CONFIG_INPUT_TABLET is not set | ||
| 330 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 331 | # CONFIG_INPUT_MISC is not set | ||
| 332 | |||
| 333 | # | ||
| 334 | # Hardware I/O ports | ||
| 335 | # | ||
| 336 | # CONFIG_SERIO is not set | ||
| 337 | # CONFIG_GAMEPORT is not set | ||
| 338 | |||
| 339 | # | ||
| 340 | # Character devices | ||
| 341 | # | ||
| 342 | CONFIG_VT=y | ||
| 343 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 344 | CONFIG_VT_CONSOLE=y | ||
| 345 | CONFIG_HW_CONSOLE=y | ||
| 346 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
| 347 | CONFIG_DEVKMEM=y | ||
| 348 | CONFIG_SERIAL_NONSTANDARD=y | ||
| 349 | # CONFIG_N_HDLC is not set | ||
| 350 | # CONFIG_RISCOM8 is not set | ||
| 351 | # CONFIG_SPECIALIX is not set | ||
| 352 | # CONFIG_RIO is not set | ||
| 353 | CONFIG_STALDRV=y | ||
| 354 | |||
| 355 | # | ||
| 356 | # Serial drivers | ||
| 357 | # | ||
| 358 | # CONFIG_SERIAL_8250 is not set | ||
| 359 | |||
| 360 | # | ||
| 361 | # Non-8250 serial port support | ||
| 362 | # | ||
| 363 | CONFIG_UNIX98_PTYS=y | ||
| 364 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 365 | CONFIG_LEGACY_PTYS=y | ||
| 366 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 367 | # CONFIG_IPMI_HANDLER is not set | ||
| 368 | # CONFIG_HW_RANDOM is not set | ||
| 369 | # CONFIG_RTC is not set | ||
| 370 | # CONFIG_GEN_RTC is not set | ||
| 371 | # CONFIG_R3964 is not set | ||
| 372 | CONFIG_RAW_DRIVER=y | ||
| 373 | CONFIG_MAX_RAW_DEVS=8192 | ||
| 374 | # CONFIG_TCG_TPM is not set | ||
| 375 | # CONFIG_I2C is not set | ||
| 376 | # CONFIG_SPI is not set | ||
| 377 | # CONFIG_W1 is not set | ||
| 378 | # CONFIG_POWER_SUPPLY is not set | ||
| 379 | # CONFIG_HWMON is not set | ||
| 380 | # CONFIG_THERMAL is not set | ||
| 381 | # CONFIG_THERMAL_HWMON is not set | ||
| 382 | # CONFIG_WATCHDOG is not set | ||
| 383 | |||
| 384 | # | ||
| 385 | # Multifunction device drivers | ||
| 386 | # | ||
| 387 | # CONFIG_MFD_CORE is not set | ||
| 388 | # CONFIG_MFD_SM501 is not set | ||
| 389 | # CONFIG_HTC_PASIC3 is not set | ||
| 390 | # CONFIG_MFD_TMIO is not set | ||
| 391 | # CONFIG_REGULATOR is not set | ||
| 392 | |||
| 393 | # | ||
| 394 | # Multimedia devices | ||
| 395 | # | ||
| 396 | |||
| 397 | # | ||
| 398 | # Multimedia core support | ||
| 399 | # | ||
| 400 | # CONFIG_VIDEO_DEV is not set | ||
| 401 | # CONFIG_DVB_CORE is not set | ||
| 402 | # CONFIG_VIDEO_MEDIA is not set | ||
| 403 | |||
| 404 | # | ||
| 405 | # Multimedia drivers | ||
| 406 | # | ||
| 407 | # CONFIG_DAB is not set | ||
| 408 | |||
| 409 | # | ||
| 410 | # Graphics support | ||
| 411 | # | ||
| 412 | # CONFIG_VGASTATE is not set | ||
| 413 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 414 | # CONFIG_FB is not set | ||
| 415 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 416 | |||
| 417 | # | ||
| 418 | # Display device support | ||
| 419 | # | ||
| 420 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 421 | |||
| 422 | # | ||
| 423 | # Console display driver support | ||
| 424 | # | ||
| 425 | # CONFIG_VGA_CONSOLE is not set | ||
| 426 | CONFIG_DUMMY_CONSOLE=y | ||
| 427 | # CONFIG_SOUND is not set | ||
| 428 | # CONFIG_HID_SUPPORT is not set | ||
| 429 | # CONFIG_USB_SUPPORT is not set | ||
| 430 | # CONFIG_MMC is not set | ||
| 431 | # CONFIG_MEMSTICK is not set | ||
| 432 | # CONFIG_NEW_LEDS is not set | ||
| 433 | # CONFIG_ACCESSIBILITY is not set | ||
| 434 | # CONFIG_RTC_CLASS is not set | ||
| 435 | # CONFIG_AUXDISPLAY is not set | ||
| 436 | # CONFIG_UIO is not set | ||
| 437 | # CONFIG_STAGING is not set | ||
| 438 | |||
| 439 | # | ||
| 440 | # File systems | ||
| 441 | # | ||
| 442 | CONFIG_EXT2_FS=y | ||
| 443 | CONFIG_EXT2_FS_XATTR=y | ||
| 444 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
| 445 | # CONFIG_EXT2_FS_SECURITY is not set | ||
| 446 | # CONFIG_EXT2_FS_XIP is not set | ||
| 447 | CONFIG_EXT3_FS=y | ||
| 448 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 449 | CONFIG_EXT3_FS_XATTR=y | ||
| 450 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 451 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 452 | # CONFIG_EXT4_FS is not set | ||
| 453 | CONFIG_JBD=y | ||
| 454 | CONFIG_FS_MBCACHE=y | ||
| 455 | # CONFIG_REISERFS_FS is not set | ||
| 456 | # CONFIG_JFS_FS is not set | ||
| 457 | CONFIG_FS_POSIX_ACL=y | ||
| 458 | CONFIG_FILE_LOCKING=y | ||
| 459 | # CONFIG_XFS_FS is not set | ||
| 460 | # CONFIG_GFS2_FS is not set | ||
| 461 | # CONFIG_OCFS2_FS is not set | ||
| 462 | # CONFIG_BTRFS_FS is not set | ||
| 463 | CONFIG_DNOTIFY=y | ||
| 464 | CONFIG_INOTIFY=y | ||
| 465 | CONFIG_INOTIFY_USER=y | ||
| 466 | # CONFIG_QUOTA is not set | ||
| 467 | CONFIG_AUTOFS_FS=y | ||
| 468 | CONFIG_AUTOFS4_FS=y | ||
| 469 | # CONFIG_FUSE_FS is not set | ||
| 470 | CONFIG_GENERIC_ACL=y | ||
| 471 | |||
| 472 | # | ||
| 473 | # Caches | ||
| 474 | # | ||
| 475 | # CONFIG_FSCACHE is not set | ||
| 476 | |||
| 477 | # | ||
| 478 | # CD-ROM/DVD Filesystems | ||
| 479 | # | ||
| 480 | # CONFIG_ISO9660_FS is not set | ||
| 481 | # CONFIG_UDF_FS is not set | ||
| 482 | |||
| 483 | # | ||
| 484 | # DOS/FAT/NT Filesystems | ||
| 485 | # | ||
| 486 | # CONFIG_MSDOS_FS is not set | ||
| 487 | # CONFIG_VFAT_FS is not set | ||
| 488 | # CONFIG_NTFS_FS is not set | ||
| 489 | |||
| 490 | # | ||
| 491 | # Pseudo filesystems | ||
| 492 | # | ||
| 493 | CONFIG_PROC_FS=y | ||
| 494 | CONFIG_PROC_KCORE=y | ||
| 495 | CONFIG_PROC_SYSCTL=y | ||
| 496 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
| 497 | CONFIG_SYSFS=y | ||
| 498 | CONFIG_TMPFS=y | ||
| 499 | CONFIG_TMPFS_POSIX_ACL=y | ||
| 500 | # CONFIG_HUGETLB_PAGE is not set | ||
| 501 | # CONFIG_CONFIGFS_FS is not set | ||
| 502 | CONFIG_MISC_FILESYSTEMS=y | ||
| 503 | # CONFIG_ADFS_FS is not set | ||
| 504 | # CONFIG_AFFS_FS is not set | ||
| 505 | # CONFIG_ECRYPT_FS is not set | ||
| 506 | # CONFIG_HFS_FS is not set | ||
| 507 | # CONFIG_HFSPLUS_FS is not set | ||
| 508 | # CONFIG_BEFS_FS is not set | ||
| 509 | # CONFIG_BFS_FS is not set | ||
| 510 | # CONFIG_EFS_FS is not set | ||
| 511 | # CONFIG_CRAMFS is not set | ||
| 512 | # CONFIG_SQUASHFS is not set | ||
| 513 | # CONFIG_VXFS_FS is not set | ||
| 514 | # CONFIG_MINIX_FS is not set | ||
| 515 | # CONFIG_OMFS_FS is not set | ||
| 516 | # CONFIG_HPFS_FS is not set | ||
| 517 | # CONFIG_QNX4FS_FS is not set | ||
| 518 | # CONFIG_ROMFS_FS is not set | ||
| 519 | # CONFIG_SYSV_FS is not set | ||
| 520 | # CONFIG_UFS_FS is not set | ||
| 521 | # CONFIG_NILFS2_FS is not set | ||
| 522 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 523 | CONFIG_NFS_FS=y | ||
| 524 | CONFIG_NFS_V3=y | ||
| 525 | CONFIG_NFS_V3_ACL=y | ||
| 526 | CONFIG_NFS_V4=y | ||
| 527 | CONFIG_NFSD=y | ||
| 528 | CONFIG_NFSD_V2_ACL=y | ||
| 529 | CONFIG_NFSD_V3=y | ||
| 530 | CONFIG_NFSD_V3_ACL=y | ||
| 531 | CONFIG_NFSD_V4=y | ||
| 532 | CONFIG_LOCKD=y | ||
| 533 | CONFIG_LOCKD_V4=y | ||
| 534 | CONFIG_EXPORTFS=y | ||
| 535 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 536 | CONFIG_NFS_COMMON=y | ||
| 537 | CONFIG_SUNRPC=y | ||
| 538 | CONFIG_SUNRPC_GSS=y | ||
| 539 | CONFIG_RPCSEC_GSS_KRB5=y | ||
| 540 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 541 | # CONFIG_SMB_FS is not set | ||
| 542 | # CONFIG_CIFS is not set | ||
| 543 | # CONFIG_NCP_FS is not set | ||
| 544 | # CONFIG_CODA_FS is not set | ||
| 545 | # CONFIG_AFS_FS is not set | ||
| 546 | |||
| 547 | # | ||
| 548 | # Partition Types | ||
| 549 | # | ||
| 550 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 551 | CONFIG_MSDOS_PARTITION=y | ||
| 552 | # CONFIG_NLS is not set | ||
| 553 | # CONFIG_DLM is not set | ||
| 554 | |||
| 555 | # | ||
| 556 | # Kernel hacking | ||
| 557 | # | ||
| 558 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 559 | # CONFIG_PRINTK_TIME is not set | ||
| 560 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 561 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 562 | CONFIG_FRAME_WARN=1024 | ||
| 563 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 564 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 565 | # CONFIG_DEBUG_FS is not set | ||
| 566 | # CONFIG_HEADERS_CHECK is not set | ||
| 567 | # CONFIG_DEBUG_KERNEL is not set | ||
| 568 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 569 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 570 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 571 | CONFIG_TRACING_SUPPORT=y | ||
| 572 | |||
| 573 | # | ||
| 574 | # Tracers | ||
| 575 | # | ||
| 576 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 577 | # CONFIG_SCHED_TRACER is not set | ||
| 578 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
| 579 | # CONFIG_EVENT_TRACER is not set | ||
| 580 | # CONFIG_BOOT_TRACER is not set | ||
| 581 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
| 582 | # CONFIG_KMEMTRACE is not set | ||
| 583 | # CONFIG_WORKQUEUE_TRACER is not set | ||
| 584 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 585 | # CONFIG_SAMPLES is not set | ||
| 586 | CONFIG_CMDLINE="" | ||
| 587 | |||
| 588 | # | ||
| 589 | # Security options | ||
| 590 | # | ||
| 591 | CONFIG_KEYS=y | ||
| 592 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | ||
| 593 | CONFIG_SECURITY=y | ||
| 594 | # CONFIG_SECURITYFS is not set | ||
| 595 | CONFIG_SECURITY_NETWORK=y | ||
| 596 | # CONFIG_SECURITY_NETWORK_XFRM is not set | ||
| 597 | # CONFIG_SECURITY_PATH is not set | ||
| 598 | CONFIG_SECURITY_FILE_CAPABILITIES=y | ||
| 599 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 | ||
| 600 | # CONFIG_SECURITY_TOMOYO is not set | ||
| 601 | CONFIG_CRYPTO=y | ||
| 602 | |||
| 603 | # | ||
| 604 | # Crypto core or helper | ||
| 605 | # | ||
| 606 | # CONFIG_CRYPTO_FIPS is not set | ||
| 607 | CONFIG_CRYPTO_ALGAPI=y | ||
| 608 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 609 | CONFIG_CRYPTO_AEAD=y | ||
| 610 | CONFIG_CRYPTO_AEAD2=y | ||
| 611 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 612 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 613 | CONFIG_CRYPTO_HASH=y | ||
| 614 | CONFIG_CRYPTO_HASH2=y | ||
| 615 | CONFIG_CRYPTO_RNG=y | ||
| 616 | CONFIG_CRYPTO_RNG2=y | ||
| 617 | CONFIG_CRYPTO_PCOMP=y | ||
| 618 | CONFIG_CRYPTO_MANAGER=y | ||
| 619 | CONFIG_CRYPTO_MANAGER2=y | ||
| 620 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 621 | CONFIG_CRYPTO_NULL=y | ||
| 622 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 623 | CONFIG_CRYPTO_CRYPTD=y | ||
| 624 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 625 | # CONFIG_CRYPTO_TEST is not set | ||
| 626 | |||
| 627 | # | ||
| 628 | # Authenticated Encryption with Associated Data | ||
| 629 | # | ||
| 630 | # CONFIG_CRYPTO_CCM is not set | ||
| 631 | # CONFIG_CRYPTO_GCM is not set | ||
| 632 | CONFIG_CRYPTO_SEQIV=y | ||
| 633 | |||
| 634 | # | ||
| 635 | # Block modes | ||
| 636 | # | ||
| 637 | CONFIG_CRYPTO_CBC=y | ||
| 638 | # CONFIG_CRYPTO_CTR is not set | ||
| 639 | # CONFIG_CRYPTO_CTS is not set | ||
| 640 | # CONFIG_CRYPTO_ECB is not set | ||
| 641 | # CONFIG_CRYPTO_LRW is not set | ||
| 642 | # CONFIG_CRYPTO_PCBC is not set | ||
| 643 | # CONFIG_CRYPTO_XTS is not set | ||
| 644 | |||
| 645 | # | ||
| 646 | # Hash modes | ||
| 647 | # | ||
| 648 | # CONFIG_CRYPTO_HMAC is not set | ||
| 649 | # CONFIG_CRYPTO_XCBC is not set | ||
| 650 | |||
| 651 | # | ||
| 652 | # Digest | ||
| 653 | # | ||
| 654 | CONFIG_CRYPTO_CRC32C=y | ||
| 655 | CONFIG_CRYPTO_MD4=y | ||
| 656 | CONFIG_CRYPTO_MD5=y | ||
| 657 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
| 658 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 659 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 660 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 661 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 662 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 663 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 664 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 665 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 666 | # CONFIG_CRYPTO_WP512 is not set | ||
| 667 | |||
| 668 | # | ||
| 669 | # Ciphers | ||
| 670 | # | ||
| 671 | # CONFIG_CRYPTO_AES is not set | ||
| 672 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 673 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 674 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 675 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 676 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 677 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 678 | CONFIG_CRYPTO_DES=y | ||
| 679 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 680 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 681 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 682 | # CONFIG_CRYPTO_SEED is not set | ||
| 683 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 684 | # CONFIG_CRYPTO_TEA is not set | ||
| 685 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 686 | |||
| 687 | # | ||
| 688 | # Compression | ||
| 689 | # | ||
| 690 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 691 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 692 | # CONFIG_CRYPTO_LZO is not set | ||
| 693 | |||
| 694 | # | ||
| 695 | # Random Number Generation | ||
| 696 | # | ||
| 697 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 698 | # CONFIG_CRYPTO_HW is not set | ||
| 699 | # CONFIG_BINARY_PRINTF is not set | ||
| 700 | |||
| 701 | # | ||
| 702 | # Library routines | ||
| 703 | # | ||
| 704 | CONFIG_BITREVERSE=y | ||
| 705 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 706 | CONFIG_CRC_CCITT=y | ||
| 707 | CONFIG_CRC16=y | ||
| 708 | # CONFIG_CRC_T10DIF is not set | ||
| 709 | # CONFIG_CRC_ITU_T is not set | ||
| 710 | CONFIG_CRC32=y | ||
| 711 | # CONFIG_CRC7 is not set | ||
| 712 | CONFIG_LIBCRC32C=y | ||
| 713 | CONFIG_ZLIB_INFLATE=y | ||
| 714 | CONFIG_DECOMPRESS_GZIP=y | ||
| 715 | CONFIG_HAS_IOMEM=y | ||
| 716 | CONFIG_HAS_IOPORT=y | ||
| 717 | CONFIG_NLATTR=y | ||
diff --git a/arch/score/include/asm/Kbuild b/arch/score/include/asm/Kbuild new file mode 100644 index 000000000000..b367abd4620f --- /dev/null +++ b/arch/score/include/asm/Kbuild | |||
| @@ -0,0 +1,3 @@ | |||
| 1 | include include/asm-generic/Kbuild.asm | ||
| 2 | |||
| 3 | header-y += | ||
diff --git a/arch/score/include/asm/asmmacro.h b/arch/score/include/asm/asmmacro.h new file mode 100644 index 000000000000..a04a54cea25d --- /dev/null +++ b/arch/score/include/asm/asmmacro.h | |||
| @@ -0,0 +1,161 @@ | |||
| 1 | #ifndef _ASM_SCORE_ASMMACRO_H | ||
| 2 | #define _ASM_SCORE_ASMMACRO_H | ||
| 3 | |||
| 4 | #include <asm/asm-offsets.h> | ||
| 5 | |||
| 6 | #ifdef __ASSEMBLY__ | ||
| 7 | |||
| 8 | .macro SAVE_ALL | ||
| 9 | mfcr r30, cr0 | ||
| 10 | mv r31, r0 | ||
| 11 | nop | ||
| 12 | /* if UMs == 1, change stack. */ | ||
| 13 | slli.c r30, r30, 28 | ||
| 14 | bpl 1f | ||
| 15 | la r31, kernelsp | ||
| 16 | lw r31, [r31] | ||
| 17 | 1: | ||
| 18 | mv r30, r0 | ||
| 19 | addri r0, r31, -PT_SIZE | ||
| 20 | |||
| 21 | sw r30, [r0, PT_R0] | ||
| 22 | .set r1 | ||
| 23 | sw r1, [r0, PT_R1] | ||
| 24 | .set nor1 | ||
| 25 | sw r2, [r0, PT_R2] | ||
| 26 | sw r3, [r0, PT_R3] | ||
| 27 | sw r4, [r0, PT_R4] | ||
| 28 | sw r5, [r0, PT_R5] | ||
| 29 | sw r6, [r0, PT_R6] | ||
| 30 | sw r7, [r0, PT_R7] | ||
| 31 | |||
| 32 | sw r8, [r0, PT_R8] | ||
| 33 | sw r9, [r0, PT_R9] | ||
| 34 | sw r10, [r0, PT_R10] | ||
| 35 | sw r11, [r0, PT_R11] | ||
| 36 | sw r12, [r0, PT_R12] | ||
| 37 | sw r13, [r0, PT_R13] | ||
| 38 | sw r14, [r0, PT_R14] | ||
| 39 | sw r15, [r0, PT_R15] | ||
| 40 | |||
| 41 | sw r16, [r0, PT_R16] | ||
| 42 | sw r17, [r0, PT_R17] | ||
| 43 | sw r18, [r0, PT_R18] | ||
| 44 | sw r19, [r0, PT_R19] | ||
| 45 | sw r20, [r0, PT_R20] | ||
| 46 | sw r21, [r0, PT_R21] | ||
| 47 | sw r22, [r0, PT_R22] | ||
| 48 | sw r23, [r0, PT_R23] | ||
| 49 | |||
| 50 | sw r24, [r0, PT_R24] | ||
| 51 | sw r25, [r0, PT_R25] | ||
| 52 | sw r25, [r0, PT_R25] | ||
| 53 | sw r26, [r0, PT_R26] | ||
| 54 | sw r27, [r0, PT_R27] | ||
| 55 | |||
| 56 | sw r28, [r0, PT_R28] | ||
| 57 | sw r29, [r0, PT_R29] | ||
| 58 | orri r28, r0, 0x1fff | ||
| 59 | li r31, 0x00001fff | ||
| 60 | xor r28, r28, r31 | ||
| 61 | |||
| 62 | mfcehl r30, r31 | ||
| 63 | sw r30, [r0, PT_CEH] | ||
| 64 | sw r31, [r0, PT_CEL] | ||
| 65 | |||
| 66 | mfcr r31, cr0 | ||
| 67 | sw r31, [r0, PT_PSR] | ||
| 68 | |||
| 69 | mfcr r31, cr1 | ||
| 70 | sw r31, [r0, PT_CONDITION] | ||
| 71 | |||
| 72 | mfcr r31, cr2 | ||
| 73 | sw r31, [r0, PT_ECR] | ||
| 74 | |||
| 75 | mfcr r31, cr5 | ||
| 76 | srli r31, r31, 1 | ||
| 77 | slli r31, r31, 1 | ||
| 78 | sw r31, [r0, PT_EPC] | ||
| 79 | .endm | ||
| 80 | |||
| 81 | .macro RESTORE_ALL_AND_RET | ||
| 82 | mfcr r30, cr0 | ||
| 83 | srli r30, r30, 1 | ||
| 84 | slli r30, r30, 1 | ||
| 85 | mtcr r30, cr0 | ||
| 86 | nop | ||
| 87 | nop | ||
| 88 | nop | ||
| 89 | nop | ||
| 90 | nop | ||
| 91 | |||
| 92 | .set r1 | ||
| 93 | ldis r1, 0x00ff | ||
| 94 | and r30, r30, r1 | ||
| 95 | not r1, r1 | ||
| 96 | lw r31, [r0, PT_PSR] | ||
| 97 | and r31, r31, r1 | ||
| 98 | .set nor1 | ||
| 99 | or r31, r31, r30 | ||
| 100 | mtcr r31, cr0 | ||
| 101 | nop | ||
| 102 | nop | ||
| 103 | nop | ||
| 104 | nop | ||
| 105 | nop | ||
| 106 | |||
| 107 | lw r30, [r0, PT_CONDITION] | ||
| 108 | mtcr r30, cr1 | ||
| 109 | nop | ||
| 110 | nop | ||
| 111 | nop | ||
| 112 | nop | ||
| 113 | nop | ||
| 114 | |||
| 115 | lw r30, [r0, PT_CEH] | ||
| 116 | lw r31, [r0, PT_CEL] | ||
| 117 | mtcehl r30, r31 | ||
| 118 | |||
| 119 | .set r1 | ||
| 120 | lw r1, [r0, PT_R1] | ||
| 121 | .set nor1 | ||
| 122 | lw r2, [r0, PT_R2] | ||
| 123 | lw r3, [r0, PT_R3] | ||
| 124 | lw r4, [r0, PT_R4] | ||
| 125 | lw r5, [r0, PT_R5] | ||
| 126 | lw r6, [r0, PT_R6] | ||
| 127 | lw r7, [r0, PT_R7] | ||
| 128 | |||
| 129 | lw r8, [r0, PT_R8] | ||
| 130 | lw r9, [r0, PT_R9] | ||
| 131 | lw r10, [r0, PT_R10] | ||
| 132 | lw r11, [r0, PT_R11] | ||
| 133 | lw r12, [r0, PT_R12] | ||
| 134 | lw r13, [r0, PT_R13] | ||
| 135 | lw r14, [r0, PT_R14] | ||
| 136 | lw r15, [r0, PT_R15] | ||
| 137 | |||
| 138 | lw r16, [r0, PT_R16] | ||
| 139 | lw r17, [r0, PT_R17] | ||
| 140 | lw r18, [r0, PT_R18] | ||
| 141 | lw r19, [r0, PT_R19] | ||
| 142 | lw r20, [r0, PT_R20] | ||
| 143 | lw r21, [r0, PT_R21] | ||
| 144 | lw r22, [r0, PT_R22] | ||
| 145 | lw r23, [r0, PT_R23] | ||
| 146 | |||
| 147 | lw r24, [r0, PT_R24] | ||
| 148 | lw r25, [r0, PT_R25] | ||
| 149 | lw r26, [r0, PT_R26] | ||
| 150 | lw r27, [r0, PT_R27] | ||
| 151 | lw r28, [r0, PT_R28] | ||
| 152 | lw r29, [r0, PT_R29] | ||
| 153 | |||
| 154 | lw r30, [r0, PT_EPC] | ||
| 155 | lw r0, [r0, PT_R0] | ||
| 156 | mtcr r30, cr5 | ||
| 157 | rte | ||
| 158 | .endm | ||
| 159 | |||
| 160 | #endif /* __ASSEMBLY__ */ | ||
| 161 | #endif /* _ASM_SCORE_ASMMACRO_H */ | ||
diff --git a/arch/score/include/asm/atomic.h b/arch/score/include/asm/atomic.h new file mode 100644 index 000000000000..84eb8ddf9f3f --- /dev/null +++ b/arch/score/include/asm/atomic.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_ATOMIC_H | ||
| 2 | #define _ASM_SCORE_ATOMIC_H | ||
| 3 | |||
| 4 | #include <asm-generic/atomic.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_ATOMIC_H */ | ||
diff --git a/arch/score/include/asm/auxvec.h b/arch/score/include/asm/auxvec.h new file mode 100644 index 000000000000..f69151565aee --- /dev/null +++ b/arch/score/include/asm/auxvec.h | |||
| @@ -0,0 +1,4 @@ | |||
| 1 | #ifndef _ASM_SCORE_AUXVEC_H | ||
| 2 | #define _ASM_SCORE_AUXVEC_H | ||
| 3 | |||
| 4 | #endif /* _ASM_SCORE_AUXVEC_H */ | ||
diff --git a/arch/score/include/asm/bitops.h b/arch/score/include/asm/bitops.h new file mode 100644 index 000000000000..2763b050fca8 --- /dev/null +++ b/arch/score/include/asm/bitops.h | |||
| @@ -0,0 +1,16 @@ | |||
| 1 | #ifndef _ASM_SCORE_BITOPS_H | ||
| 2 | #define _ASM_SCORE_BITOPS_H | ||
| 3 | |||
| 4 | #include <asm/byteorder.h> /* swab32 */ | ||
| 5 | #include <asm/system.h> /* save_flags */ | ||
| 6 | |||
| 7 | /* | ||
| 8 | * clear_bit() doesn't provide any barrier for the compiler. | ||
| 9 | */ | ||
| 10 | #define smp_mb__before_clear_bit() barrier() | ||
| 11 | #define smp_mb__after_clear_bit() barrier() | ||
| 12 | |||
| 13 | #include <asm-generic/bitops.h> | ||
| 14 | #include <asm-generic/bitops/__fls.h> | ||
| 15 | |||
| 16 | #endif /* _ASM_SCORE_BITOPS_H */ | ||
diff --git a/arch/score/include/asm/bitsperlong.h b/arch/score/include/asm/bitsperlong.h new file mode 100644 index 000000000000..86ff337aa459 --- /dev/null +++ b/arch/score/include/asm/bitsperlong.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_BITSPERLONG_H | ||
| 2 | #define _ASM_SCORE_BITSPERLONG_H | ||
| 3 | |||
| 4 | #include <asm-generic/bitsperlong.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_BITSPERLONG_H */ | ||
diff --git a/arch/score/include/asm/bug.h b/arch/score/include/asm/bug.h new file mode 100644 index 000000000000..bb76a330bcf1 --- /dev/null +++ b/arch/score/include/asm/bug.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_BUG_H | ||
| 2 | #define _ASM_SCORE_BUG_H | ||
| 3 | |||
| 4 | #include <asm-generic/bug.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_BUG_H */ | ||
diff --git a/arch/score/include/asm/bugs.h b/arch/score/include/asm/bugs.h new file mode 100644 index 000000000000..a062e1056bb3 --- /dev/null +++ b/arch/score/include/asm/bugs.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_BUGS_H | ||
| 2 | #define _ASM_SCORE_BUGS_H | ||
| 3 | |||
| 4 | #include <asm-generic/bugs.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_BUGS_H */ | ||
diff --git a/arch/score/include/asm/byteorder.h b/arch/score/include/asm/byteorder.h new file mode 100644 index 000000000000..88cbebc79212 --- /dev/null +++ b/arch/score/include/asm/byteorder.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_BYTEORDER_H | ||
| 2 | #define _ASM_SCORE_BYTEORDER_H | ||
| 3 | |||
| 4 | #include <linux/byteorder/little_endian.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_BYTEORDER_H */ | ||
diff --git a/arch/score/include/asm/cache.h b/arch/score/include/asm/cache.h new file mode 100644 index 000000000000..ae3d59f2d2c4 --- /dev/null +++ b/arch/score/include/asm/cache.h | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | #ifndef _ASM_SCORE_CACHE_H | ||
| 2 | #define _ASM_SCORE_CACHE_H | ||
| 3 | |||
| 4 | #define L1_CACHE_SHIFT 4 | ||
| 5 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
| 6 | |||
| 7 | #endif /* _ASM_SCORE_CACHE_H */ | ||
diff --git a/arch/score/include/asm/cacheflush.h b/arch/score/include/asm/cacheflush.h new file mode 100644 index 000000000000..07cc8fc457cd --- /dev/null +++ b/arch/score/include/asm/cacheflush.h | |||
| @@ -0,0 +1,45 @@ | |||
| 1 | #ifndef _ASM_SCORE_CACHEFLUSH_H | ||
| 2 | #define _ASM_SCORE_CACHEFLUSH_H | ||
| 3 | |||
| 4 | /* Keep includes the same across arches. */ | ||
| 5 | #include <linux/mm.h> | ||
| 6 | |||
| 7 | extern void flush_cache_all(void); | ||
| 8 | extern void flush_cache_mm(struct mm_struct *mm); | ||
| 9 | extern void flush_cache_range(struct vm_area_struct *vma, | ||
| 10 | unsigned long start, unsigned long end); | ||
| 11 | extern void flush_cache_page(struct vm_area_struct *vma, | ||
| 12 | unsigned long page, unsigned long pfn); | ||
| 13 | extern void flush_cache_sigtramp(unsigned long addr); | ||
| 14 | extern void flush_icache_all(void); | ||
| 15 | extern void flush_icache_range(unsigned long start, unsigned long end); | ||
| 16 | extern void flush_dcache_range(unsigned long start, unsigned long end); | ||
| 17 | |||
| 18 | #define flush_cache_dup_mm(mm) do {} while (0) | ||
| 19 | #define flush_dcache_page(page) do {} while (0) | ||
| 20 | #define flush_dcache_mmap_lock(mapping) do {} while (0) | ||
| 21 | #define flush_dcache_mmap_unlock(mapping) do {} while (0) | ||
| 22 | #define flush_cache_vmap(start, end) do {} while (0) | ||
| 23 | #define flush_cache_vunmap(start, end) do {} while (0) | ||
| 24 | |||
| 25 | static inline void flush_icache_page(struct vm_area_struct *vma, | ||
| 26 | struct page *page) | ||
| 27 | { | ||
| 28 | if (vma->vm_flags & VM_EXEC) { | ||
| 29 | void *v = page_address(page); | ||
| 30 | flush_icache_range((unsigned long) v, | ||
| 31 | (unsigned long) v + PAGE_SIZE); | ||
| 32 | } | ||
| 33 | } | ||
| 34 | |||
| 35 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
| 36 | memcpy(dst, src, len) | ||
| 37 | |||
| 38 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
| 39 | do { \ | ||
| 40 | memcpy(dst, src, len); \ | ||
| 41 | if ((vma->vm_flags & VM_EXEC)) \ | ||
| 42 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
| 43 | } while (0) | ||
| 44 | |||
| 45 | #endif /* _ASM_SCORE_CACHEFLUSH_H */ | ||
diff --git a/arch/score/include/asm/checksum.h b/arch/score/include/asm/checksum.h new file mode 100644 index 000000000000..f909ac3144a4 --- /dev/null +++ b/arch/score/include/asm/checksum.h | |||
| @@ -0,0 +1,235 @@ | |||
| 1 | #ifndef _ASM_SCORE_CHECKSUM_H | ||
| 2 | #define _ASM_SCORE_CHECKSUM_H | ||
| 3 | |||
| 4 | #include <linux/in6.h> | ||
| 5 | #include <asm/uaccess.h> | ||
| 6 | |||
| 7 | /* | ||
| 8 | * computes the checksum of a memory block at buff, length len, | ||
| 9 | * and adds in "sum" (32-bit) | ||
| 10 | * | ||
| 11 | * returns a 32-bit number suitable for feeding into itself | ||
| 12 | * or csum_tcpudp_magic | ||
| 13 | * | ||
| 14 | * this function must be called with even lengths, except | ||
| 15 | * for the last fragment, which may be odd | ||
| 16 | * | ||
| 17 | * it's best to have buff aligned on a 32-bit boundary | ||
| 18 | */ | ||
| 19 | unsigned int csum_partial(const void *buff, int len, __wsum sum); | ||
| 20 | unsigned int csum_partial_copy_from_user(const char *src, char *dst, int len, | ||
| 21 | unsigned int sum, int *csum_err); | ||
| 22 | unsigned int csum_partial_copy(const char *src, char *dst, | ||
| 23 | int len, unsigned int sum); | ||
| 24 | |||
| 25 | /* | ||
| 26 | * this is a new version of the above that records errors it finds in *errp, | ||
| 27 | * but continues and zeros the rest of the buffer. | ||
| 28 | */ | ||
| 29 | |||
| 30 | /* | ||
| 31 | * Copy and checksum to user | ||
| 32 | */ | ||
| 33 | #define HAVE_CSUM_COPY_USER | ||
| 34 | static inline | ||
| 35 | __wsum csum_and_copy_to_user(const void *src, void __user *dst, int len, | ||
| 36 | __wsum sum, int *err_ptr) | ||
| 37 | { | ||
| 38 | sum = csum_partial(src, len, sum); | ||
| 39 | if (copy_to_user(dst, src, len)) { | ||
| 40 | *err_ptr = -EFAULT; | ||
| 41 | return (__force __wsum) -1; /* invalid checksum */ | ||
| 42 | } | ||
| 43 | return sum; | ||
| 44 | } | ||
| 45 | |||
| 46 | |||
| 47 | #define csum_partial_copy_nocheck csum_partial_copy | ||
| 48 | /* | ||
| 49 | * Fold a partial checksum without adding pseudo headers | ||
| 50 | */ | ||
| 51 | |||
| 52 | static inline __sum16 csum_fold(__wsum sum) | ||
| 53 | { | ||
| 54 | /* the while loop is unnecessary really, it's always enough with two | ||
| 55 | iterations */ | ||
| 56 | __asm__ __volatile__( | ||
| 57 | ".set volatile\n\t" | ||
| 58 | ".set\tr1\n\t" | ||
| 59 | "slli\tr1,%0, 16\n\t" | ||
| 60 | "add\t%0,%0, r1\n\t" | ||
| 61 | "cmp.c\tr1, %0\n\t" | ||
| 62 | "srli\t%0, %0, 16\n\t" | ||
| 63 | "bleu\t1f\n\t" | ||
| 64 | "addi\t%0, 0x1\n\t" | ||
| 65 | "1:ldi\tr30, 0xffff\n\t" | ||
| 66 | "xor\t%0, %0, r30\n\t" | ||
| 67 | "slli\t%0, %0, 16\n\t" | ||
| 68 | "srli\t%0, %0, 16\n\t" | ||
| 69 | ".set\tnor1\n\t" | ||
| 70 | ".set optimize\n\t" | ||
| 71 | : "=r" (sum) | ||
| 72 | : "0" (sum)); | ||
| 73 | return sum; | ||
| 74 | } | ||
| 75 | |||
| 76 | /* | ||
| 77 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
| 78 | * which always checksum on 4 octet boundaries. | ||
| 79 | * | ||
| 80 | * By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by | ||
| 81 | * Arnt Gulbrandsen. | ||
| 82 | */ | ||
| 83 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
| 84 | { | ||
| 85 | unsigned int sum; | ||
| 86 | unsigned long dummy; | ||
| 87 | |||
| 88 | __asm__ __volatile__( | ||
| 89 | ".set volatile\n\t" | ||
| 90 | ".set\tnor1\n\t" | ||
| 91 | "lw\t%0, [%1]\n\t" | ||
| 92 | "subri\t%2, %2, 4\n\t" | ||
| 93 | "slli\t%2, %2, 2\n\t" | ||
| 94 | "lw\t%3, [%1, 4]\n\t" | ||
| 95 | "add\t%2, %2, %1\n\t" | ||
| 96 | "add\t%0, %0, %3\n\t" | ||
| 97 | "cmp.c\t%3, %0\n\t" | ||
| 98 | "lw\t%3, [%1, 8]\n\t" | ||
| 99 | "bleu\t1f\n\t" | ||
| 100 | "addi\t%0, 0x1\n\t" | ||
| 101 | "1:\n\t" | ||
| 102 | "add\t%0, %0, %3\n\t" | ||
| 103 | "cmp.c\t%3, %0\n\t" | ||
| 104 | "lw\t%3, [%1, 12]\n\t" | ||
| 105 | "bleu\t1f\n\t" | ||
| 106 | "addi\t%0, 0x1\n\t" | ||
| 107 | "1:add\t%0, %0, %3\n\t" | ||
| 108 | "cmp.c\t%3, %0\n\t" | ||
| 109 | "bleu\t1f\n\t" | ||
| 110 | "addi\t%0, 0x1\n" | ||
| 111 | |||
| 112 | "1:\tlw\t%3, [%1, 16]\n\t" | ||
| 113 | "addi\t%1, 4\n\t" | ||
| 114 | "add\t%0, %0, %3\n\t" | ||
| 115 | "cmp.c\t%3, %0\n\t" | ||
| 116 | "bleu\t2f\n\t" | ||
| 117 | "addi\t%0, 0x1\n" | ||
| 118 | "2:cmp.c\t%2, %1\n\t" | ||
| 119 | "bne\t1b\n\t" | ||
| 120 | |||
| 121 | ".set\tr1\n\t" | ||
| 122 | ".set optimize\n\t" | ||
| 123 | : "=&r" (sum), "=&r" (iph), "=&r" (ihl), "=&r" (dummy) | ||
| 124 | : "1" (iph), "2" (ihl)); | ||
| 125 | |||
| 126 | return csum_fold(sum); | ||
| 127 | } | ||
| 128 | |||
| 129 | static inline __wsum | ||
| 130 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, | ||
| 131 | unsigned short proto, __wsum sum) | ||
| 132 | { | ||
| 133 | unsigned long tmp = (ntohs(len) << 16) + proto * 256; | ||
| 134 | __asm__ __volatile__( | ||
| 135 | ".set volatile\n\t" | ||
| 136 | "add\t%0, %0, %2\n\t" | ||
| 137 | "cmp.c\t%2, %0\n\t" | ||
| 138 | "bleu\t1f\n\t" | ||
| 139 | "addi\t%0, 0x1\n\t" | ||
| 140 | "1:\n\t" | ||
| 141 | "add\t%0, %0, %3\n\t" | ||
| 142 | "cmp.c\t%3, %0\n\t" | ||
| 143 | "bleu\t1f\n\t" | ||
| 144 | "addi\t%0, 0x1\n\t" | ||
| 145 | "1:\n\t" | ||
| 146 | "add\t%0, %0, %4\n\t" | ||
| 147 | "cmp.c\t%4, %0\n\t" | ||
| 148 | "bleu\t1f\n\t" | ||
| 149 | "addi\t%0, 0x1\n\t" | ||
| 150 | "1:\n\t" | ||
| 151 | ".set optimize\n\t" | ||
| 152 | : "=r" (sum) | ||
| 153 | : "0" (daddr), "r"(saddr), | ||
| 154 | "r" (tmp), | ||
| 155 | "r" (sum)); | ||
| 156 | return sum; | ||
| 157 | } | ||
| 158 | |||
| 159 | /* | ||
| 160 | * computes the checksum of the TCP/UDP pseudo-header | ||
| 161 | * returns a 16-bit checksum, already complemented | ||
| 162 | */ | ||
| 163 | static inline __sum16 | ||
| 164 | csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, | ||
| 165 | unsigned short proto, __wsum sum) | ||
| 166 | { | ||
| 167 | return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); | ||
| 168 | } | ||
| 169 | |||
| 170 | /* | ||
| 171 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
| 172 | * in icmp.c | ||
| 173 | */ | ||
| 174 | |||
| 175 | static inline unsigned short ip_compute_csum(const void *buff, int len) | ||
| 176 | { | ||
| 177 | return csum_fold(csum_partial(buff, len, 0)); | ||
| 178 | } | ||
| 179 | |||
| 180 | #define _HAVE_ARCH_IPV6_CSUM | ||
| 181 | static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, | ||
| 182 | const struct in6_addr *daddr, | ||
| 183 | __u32 len, unsigned short proto, | ||
| 184 | __wsum sum) | ||
| 185 | { | ||
| 186 | __asm__ __volatile__( | ||
| 187 | ".set\tnoreorder\t\t\t# csum_ipv6_magic\n\t" | ||
| 188 | ".set\tnoat\n\t" | ||
| 189 | "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t" | ||
| 190 | "sltu\t$1, %0, %5\n\t" | ||
| 191 | "addu\t%0, $1\n\t" | ||
| 192 | "addu\t%0, %6\t\t\t# csum\n\t" | ||
| 193 | "sltu\t$1, %0, %6\n\t" | ||
| 194 | "lw\t%1, 0(%2)\t\t\t# four words source address\n\t" | ||
| 195 | "addu\t%0, $1\n\t" | ||
| 196 | "addu\t%0, %1\n\t" | ||
| 197 | "sltu\t$1, %0, %1\n\t" | ||
| 198 | "lw\t%1, 4(%2)\n\t" | ||
| 199 | "addu\t%0, $1\n\t" | ||
| 200 | "addu\t%0, %1\n\t" | ||
| 201 | "sltu\t$1, %0, %1\n\t" | ||
| 202 | "lw\t%1, 8(%2)\n\t" | ||
| 203 | "addu\t%0, $1\n\t" | ||
| 204 | "addu\t%0, %1\n\t" | ||
| 205 | "sltu\t$1, %0, %1\n\t" | ||
| 206 | "lw\t%1, 12(%2)\n\t" | ||
| 207 | "addu\t%0, $1\n\t" | ||
| 208 | "addu\t%0, %1\n\t" | ||
| 209 | "sltu\t$1, %0, %1\n\t" | ||
| 210 | "lw\t%1, 0(%3)\n\t" | ||
| 211 | "addu\t%0, $1\n\t" | ||
| 212 | "addu\t%0, %1\n\t" | ||
| 213 | "sltu\t$1, %0, %1\n\t" | ||
| 214 | "lw\t%1, 4(%3)\n\t" | ||
| 215 | "addu\t%0, $1\n\t" | ||
| 216 | "addu\t%0, %1\n\t" | ||
| 217 | "sltu\t$1, %0, %1\n\t" | ||
| 218 | "lw\t%1, 8(%3)\n\t" | ||
| 219 | "addu\t%0, $1\n\t" | ||
| 220 | "addu\t%0, %1\n\t" | ||
| 221 | "sltu\t$1, %0, %1\n\t" | ||
| 222 | "lw\t%1, 12(%3)\n\t" | ||
| 223 | "addu\t%0, $1\n\t" | ||
| 224 | "addu\t%0, %1\n\t" | ||
| 225 | "sltu\t$1, %0, %1\n\t" | ||
| 226 | "addu\t%0, $1\t\t\t# Add final carry\n\t" | ||
| 227 | ".set\tnoat\n\t" | ||
| 228 | ".set\tnoreorder" | ||
| 229 | : "=r" (sum), "=r" (proto) | ||
| 230 | : "r" (saddr), "r" (daddr), | ||
| 231 | "0" (htonl(len)), "1" (htonl(proto)), "r" (sum)); | ||
| 232 | |||
| 233 | return csum_fold(sum); | ||
| 234 | } | ||
| 235 | #endif /* _ASM_SCORE_CHECKSUM_H */ | ||
diff --git a/arch/score/include/asm/cputime.h b/arch/score/include/asm/cputime.h new file mode 100644 index 000000000000..1fced99f0d67 --- /dev/null +++ b/arch/score/include/asm/cputime.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_CPUTIME_H | ||
| 2 | #define _ASM_SCORE_CPUTIME_H | ||
| 3 | |||
| 4 | #include <asm-generic/cputime.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_CPUTIME_H */ | ||
diff --git a/arch/score/include/asm/current.h b/arch/score/include/asm/current.h new file mode 100644 index 000000000000..16eae9cbaf1a --- /dev/null +++ b/arch/score/include/asm/current.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_CURRENT_H | ||
| 2 | #define _ASM_SCORE_CURRENT_H | ||
| 3 | |||
| 4 | #include <asm-generic/current.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_CURRENT_H */ | ||
diff --git a/arch/score/include/asm/delay.h b/arch/score/include/asm/delay.h new file mode 100644 index 000000000000..6726ec199dc0 --- /dev/null +++ b/arch/score/include/asm/delay.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | #ifndef _ASM_SCORE_DELAY_H | ||
| 2 | #define _ASM_SCORE_DELAY_H | ||
| 3 | |||
| 4 | static inline void __delay(unsigned long loops) | ||
| 5 | { | ||
| 6 | /* 3 cycles per loop. */ | ||
| 7 | __asm__ __volatile__ ( | ||
| 8 | "1:\tsubi\t%0, 3\n\t" | ||
| 9 | "cmpz.c\t%0\n\t" | ||
| 10 | "ble\t1b\n\t" | ||
| 11 | : "=r" (loops) | ||
| 12 | : "0" (loops)); | ||
| 13 | } | ||
| 14 | |||
| 15 | static inline void __udelay(unsigned long usecs) | ||
| 16 | { | ||
| 17 | unsigned long loops_per_usec; | ||
| 18 | |||
| 19 | loops_per_usec = (loops_per_jiffy * HZ) / 1000000; | ||
| 20 | |||
| 21 | __delay(usecs * loops_per_usec); | ||
| 22 | } | ||
| 23 | |||
| 24 | #define udelay(usecs) __udelay(usecs) | ||
| 25 | |||
| 26 | #endif /* _ASM_SCORE_DELAY_H */ | ||
diff --git a/arch/score/include/asm/device.h b/arch/score/include/asm/device.h new file mode 100644 index 000000000000..2dc7cc5d5ef9 --- /dev/null +++ b/arch/score/include/asm/device.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_DEVICE_H | ||
| 2 | #define _ASM_SCORE_DEVICE_H | ||
| 3 | |||
| 4 | #include <asm-generic/device.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_DEVICE_H */ | ||
diff --git a/arch/score/include/asm/div64.h b/arch/score/include/asm/div64.h new file mode 100644 index 000000000000..75fae19824eb --- /dev/null +++ b/arch/score/include/asm/div64.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_DIV64_H | ||
| 2 | #define _ASM_SCORE_DIV64_H | ||
| 3 | |||
| 4 | #include <asm-generic/div64.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_DIV64_H */ | ||
diff --git a/arch/score/include/asm/dma-mapping.h b/arch/score/include/asm/dma-mapping.h new file mode 100644 index 000000000000..f9c0193c7a53 --- /dev/null +++ b/arch/score/include/asm/dma-mapping.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_DMA_MAPPING_H | ||
| 2 | #define _ASM_SCORE_DMA_MAPPING_H | ||
| 3 | |||
| 4 | #include <asm-generic/dma-mapping-broken.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_DMA_MAPPING_H */ | ||
diff --git a/arch/score/include/asm/dma.h b/arch/score/include/asm/dma.h new file mode 100644 index 000000000000..9f44185298bf --- /dev/null +++ b/arch/score/include/asm/dma.h | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | #ifndef _ASM_SCORE_DMA_H | ||
| 2 | #define _ASM_SCORE_DMA_H | ||
| 3 | |||
| 4 | #include <asm/io.h> | ||
| 5 | |||
| 6 | #define MAX_DMA_ADDRESS (0) | ||
| 7 | |||
| 8 | #endif /* _ASM_SCORE_DMA_H */ | ||
diff --git a/arch/score/include/asm/elf.h b/arch/score/include/asm/elf.h new file mode 100644 index 000000000000..43526d9fda93 --- /dev/null +++ b/arch/score/include/asm/elf.h | |||
| @@ -0,0 +1,103 @@ | |||
| 1 | #ifndef _ASM_SCORE_ELF_H | ||
| 2 | #define _ASM_SCORE_ELF_H | ||
| 3 | |||
| 4 | #include <linux/ptrace.h> | ||
| 5 | |||
| 6 | #define EM_SCORE7 135 | ||
| 7 | |||
| 8 | /* Relocation types. */ | ||
| 9 | #define R_SCORE_NONE 0 | ||
| 10 | #define R_SCORE_HI16 1 | ||
| 11 | #define R_SCORE_LO16 2 | ||
| 12 | #define R_SCORE_BCMP 3 | ||
| 13 | #define R_SCORE_24 4 | ||
| 14 | #define R_SCORE_PC19 5 | ||
| 15 | #define R_SCORE16_11 6 | ||
| 16 | #define R_SCORE16_PC8 7 | ||
| 17 | #define R_SCORE_ABS32 8 | ||
| 18 | #define R_SCORE_ABS16 9 | ||
| 19 | #define R_SCORE_DUMMY2 10 | ||
| 20 | #define R_SCORE_GP15 11 | ||
| 21 | #define R_SCORE_GNU_VTINHERIT 12 | ||
| 22 | #define R_SCORE_GNU_VTENTRY 13 | ||
| 23 | #define R_SCORE_GOT15 14 | ||
| 24 | #define R_SCORE_GOT_LO16 15 | ||
| 25 | #define R_SCORE_CALL15 16 | ||
| 26 | #define R_SCORE_GPREL32 17 | ||
| 27 | #define R_SCORE_REL32 18 | ||
| 28 | #define R_SCORE_DUMMY_HI16 19 | ||
| 29 | #define R_SCORE_IMM30 20 | ||
| 30 | #define R_SCORE_IMM32 21 | ||
| 31 | |||
| 32 | /* ELF register definitions */ | ||
| 33 | typedef unsigned long elf_greg_t; | ||
| 34 | |||
| 35 | #define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t)) | ||
| 36 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
| 37 | |||
| 38 | /* Score does not have fp regs. */ | ||
| 39 | typedef double elf_fpreg_t; | ||
| 40 | typedef elf_fpreg_t elf_fpregset_t; | ||
| 41 | |||
| 42 | #define elf_check_arch(x) ((x)->e_machine == EM_SCORE7) | ||
| 43 | |||
| 44 | /* | ||
| 45 | * These are used to set parameters in the core dumps. | ||
| 46 | */ | ||
| 47 | #define ELF_CLASS ELFCLASS32 | ||
| 48 | |||
| 49 | /* | ||
| 50 | * These are used to set parameters in the core dumps. | ||
| 51 | */ | ||
| 52 | #define ELF_DATA ELFDATA2LSB | ||
| 53 | #define ELF_ARCH EM_SCORE7 | ||
| 54 | |||
| 55 | #define SET_PERSONALITY(ex) \ | ||
| 56 | do { \ | ||
| 57 | set_personality(PER_LINUX); \ | ||
| 58 | } while (0) | ||
| 59 | |||
| 60 | struct task_struct; | ||
| 61 | struct pt_regs; | ||
| 62 | |||
| 63 | #define CORE_DUMP_USE_REGSET | ||
| 64 | #define USE_ELF_CORE_DUMP | ||
| 65 | #define ELF_EXEC_PAGESIZE PAGE_SIZE | ||
| 66 | |||
| 67 | /* This yields a mask that user programs can use to figure out what | ||
| 68 | instruction set this cpu supports. This could be done in userspace, | ||
| 69 | but it's not easy, and we've already done it here. */ | ||
| 70 | |||
| 71 | #define ELF_HWCAP (0) | ||
| 72 | |||
| 73 | /* This yields a string that ld.so will use to load implementation | ||
| 74 | specific libraries for optimization. This is more specific in | ||
| 75 | intent than poking at uname or /proc/cpuinfo. | ||
| 76 | |||
| 77 | For the moment, we have only optimizations for the Intel generations, | ||
| 78 | but that could change... */ | ||
| 79 | |||
| 80 | #define ELF_PLATFORM (NULL) | ||
| 81 | |||
| 82 | #define ELF_PLAT_INIT(_r, load_addr) \ | ||
| 83 | do { \ | ||
| 84 | _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \ | ||
| 85 | _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \ | ||
| 86 | _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \ | ||
| 87 | _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \ | ||
| 88 | _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \ | ||
| 89 | _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \ | ||
| 90 | _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \ | ||
| 91 | _r->regs[30] = _r->regs[31] = 0; \ | ||
| 92 | } while (0) | ||
| 93 | |||
| 94 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | ||
| 95 | use of this is to invoke "./ld.so someprog" to test out a new version of | ||
| 96 | the loader. We need to make sure that it is out of the way of the program | ||
| 97 | that it will "exec", and that there is sufficient room for the brk. */ | ||
| 98 | |||
| 99 | #ifndef ELF_ET_DYN_BASE | ||
| 100 | #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) | ||
| 101 | #endif | ||
| 102 | |||
| 103 | #endif /* _ASM_SCORE_ELF_H */ | ||
diff --git a/arch/score/include/asm/emergency-restart.h b/arch/score/include/asm/emergency-restart.h new file mode 100644 index 000000000000..ca31e9803a8a --- /dev/null +++ b/arch/score/include/asm/emergency-restart.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_EMERGENCY_RESTART_H | ||
| 2 | #define _ASM_SCORE_EMERGENCY_RESTART_H | ||
| 3 | |||
| 4 | #include <asm-generic/emergency-restart.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_EMERGENCY_RESTART_H */ | ||
diff --git a/arch/score/include/asm/errno.h b/arch/score/include/asm/errno.h new file mode 100644 index 000000000000..29ff39d5ab47 --- /dev/null +++ b/arch/score/include/asm/errno.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_ERRNO_H | ||
| 2 | #define _ASM_SCORE_ERRNO_H | ||
| 3 | |||
| 4 | #include <asm-generic/errno.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_ERRNO_H */ | ||
diff --git a/arch/score/include/asm/fcntl.h b/arch/score/include/asm/fcntl.h new file mode 100644 index 000000000000..03968a3103a4 --- /dev/null +++ b/arch/score/include/asm/fcntl.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_FCNTL_H | ||
| 2 | #define _ASM_SCORE_FCNTL_H | ||
| 3 | |||
| 4 | #include <asm-generic/fcntl.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_FCNTL_H */ | ||
diff --git a/arch/score/include/asm/fixmap.h b/arch/score/include/asm/fixmap.h new file mode 100644 index 000000000000..ee1676694024 --- /dev/null +++ b/arch/score/include/asm/fixmap.h | |||
| @@ -0,0 +1,82 @@ | |||
| 1 | #ifndef _ASM_SCORE_FIXMAP_H | ||
| 2 | #define _ASM_SCORE_FIXMAP_H | ||
| 3 | |||
| 4 | #include <asm/page.h> | ||
| 5 | |||
| 6 | #define PHY_RAM_BASE 0x00000000 | ||
| 7 | #define PHY_IO_BASE 0x10000000 | ||
| 8 | |||
| 9 | #define VIRTUAL_RAM_BASE 0xa0000000 | ||
| 10 | #define VIRTUAL_IO_BASE 0xb0000000 | ||
| 11 | |||
| 12 | #define RAM_SPACE_SIZE 0x10000000 | ||
| 13 | #define IO_SPACE_SIZE 0x10000000 | ||
| 14 | |||
| 15 | /* Kernel unmapped, cached 512MB */ | ||
| 16 | #define KSEG1 0xa0000000 | ||
| 17 | |||
| 18 | /* | ||
| 19 | * Here we define all the compile-time 'special' virtual | ||
| 20 | * addresses. The point is to have a constant address at | ||
| 21 | * compile time, but to set the physical address only | ||
| 22 | * in the boot process. We allocate these special addresses | ||
| 23 | * from the end of virtual memory (0xfffff000) backwards. | ||
| 24 | * Also this lets us do fail-safe vmalloc(), we | ||
| 25 | * can guarantee that these special addresses and | ||
| 26 | * vmalloc()-ed addresses never overlap. | ||
| 27 | * | ||
| 28 | * these 'compile-time allocated' memory buffers are | ||
| 29 | * fixed-size 4k pages. (or larger if used with an increment | ||
| 30 | * highger than 1) use fixmap_set(idx,phys) to associate | ||
| 31 | * physical memory with fixmap indices. | ||
| 32 | * | ||
| 33 | * TLB entries of such buffers will not be flushed across | ||
| 34 | * task switches. | ||
| 35 | */ | ||
| 36 | |||
| 37 | /* | ||
| 38 | * on UP currently we will have no trace of the fixmap mechanizm, | ||
| 39 | * no page table allocations, etc. This might change in the | ||
| 40 | * future, say framebuffers for the console driver(s) could be | ||
| 41 | * fix-mapped? | ||
| 42 | */ | ||
| 43 | enum fixed_addresses { | ||
| 44 | #define FIX_N_COLOURS 8 | ||
| 45 | FIX_CMAP_BEGIN, | ||
| 46 | FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, | ||
| 47 | __end_of_fixed_addresses | ||
| 48 | }; | ||
| 49 | |||
| 50 | /* | ||
| 51 | * used by vmalloc.c. | ||
| 52 | * | ||
| 53 | * Leave one empty page between vmalloc'ed areas and | ||
| 54 | * the start of the fixmap, and leave one page empty | ||
| 55 | * at the top of mem.. | ||
| 56 | */ | ||
| 57 | #define FIXADDR_TOP ((unsigned long)(long)(int)0xfefe0000) | ||
| 58 | #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) | ||
| 59 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | ||
| 60 | |||
| 61 | #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) | ||
| 62 | #define __virt_to_fix(x) \ | ||
| 63 | ((FIXADDR_TOP - ((x) & PAGE_MASK)) >> PAGE_SHIFT) | ||
| 64 | |||
| 65 | extern void __this_fixmap_does_not_exist(void); | ||
| 66 | |||
| 67 | /* | ||
| 68 | * 'index to address' translation. If anyone tries to use the idx | ||
| 69 | * directly without tranlation, we catch the bug with a NULL-deference | ||
| 70 | * kernel oops. Illegal ranges of incoming indices are caught too. | ||
| 71 | */ | ||
| 72 | static inline unsigned long fix_to_virt(const unsigned int idx) | ||
| 73 | { | ||
| 74 | return __fix_to_virt(idx); | ||
| 75 | } | ||
| 76 | |||
| 77 | static inline unsigned long virt_to_fix(const unsigned long vaddr) | ||
| 78 | { | ||
| 79 | return __virt_to_fix(vaddr); | ||
| 80 | } | ||
| 81 | |||
| 82 | #endif /* _ASM_SCORE_FIXMAP_H */ | ||
diff --git a/arch/score/include/asm/ftrace.h b/arch/score/include/asm/ftrace.h new file mode 100644 index 000000000000..79d6f10e1f5b --- /dev/null +++ b/arch/score/include/asm/ftrace.h | |||
| @@ -0,0 +1,4 @@ | |||
| 1 | #ifndef _ASM_SCORE_FTRACE_H | ||
| 2 | #define _ASM_SCORE_FTRACE_H | ||
| 3 | |||
| 4 | #endif /* _ASM_SCORE_FTRACE_H */ | ||
diff --git a/arch/score/include/asm/futex.h b/arch/score/include/asm/futex.h new file mode 100644 index 000000000000..1dca2420f8db --- /dev/null +++ b/arch/score/include/asm/futex.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_FUTEX_H | ||
| 2 | #define _ASM_SCORE_FUTEX_H | ||
| 3 | |||
| 4 | #include <asm-generic/futex.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_FUTEX_H */ | ||
diff --git a/arch/score/include/asm/hardirq.h b/arch/score/include/asm/hardirq.h new file mode 100644 index 000000000000..dc932c50d3ee --- /dev/null +++ b/arch/score/include/asm/hardirq.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_HARDIRQ_H | ||
| 2 | #define _ASM_SCORE_HARDIRQ_H | ||
| 3 | |||
| 4 | #include <asm-generic/hardirq.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_HARDIRQ_H */ | ||
diff --git a/arch/score/include/asm/hw_irq.h b/arch/score/include/asm/hw_irq.h new file mode 100644 index 000000000000..4caafb2b509a --- /dev/null +++ b/arch/score/include/asm/hw_irq.h | |||
| @@ -0,0 +1,4 @@ | |||
| 1 | #ifndef _ASM_SCORE_HW_IRQ_H | ||
| 2 | #define _ASM_SCORE_HW_IRQ_H | ||
| 3 | |||
| 4 | #endif /* _ASM_SCORE_HW_IRQ_H */ | ||
diff --git a/arch/score/include/asm/io.h b/arch/score/include/asm/io.h new file mode 100644 index 000000000000..fbbfd7132e3b --- /dev/null +++ b/arch/score/include/asm/io.h | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | #ifndef _ASM_SCORE_IO_H | ||
| 2 | #define _ASM_SCORE_IO_H | ||
| 3 | |||
| 4 | #include <asm-generic/io.h> | ||
| 5 | |||
| 6 | #define virt_to_bus virt_to_phys | ||
| 7 | #define bus_to_virt phys_to_virt | ||
| 8 | |||
| 9 | #endif /* _ASM_SCORE_IO_H */ | ||
diff --git a/arch/score/include/asm/ioctl.h b/arch/score/include/asm/ioctl.h new file mode 100644 index 000000000000..a351d2194bfd --- /dev/null +++ b/arch/score/include/asm/ioctl.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_IOCTL_H | ||
| 2 | #define _ASM_SCORE_IOCTL_H | ||
| 3 | |||
| 4 | #include <asm-generic/ioctl.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_IOCTL_H */ | ||
diff --git a/arch/score/include/asm/ioctls.h b/arch/score/include/asm/ioctls.h new file mode 100644 index 000000000000..ed01d2b9aeab --- /dev/null +++ b/arch/score/include/asm/ioctls.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_IOCTLS_H | ||
| 2 | #define _ASM_SCORE_IOCTLS_H | ||
| 3 | |||
| 4 | #include <asm-generic/ioctls.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_IOCTLS_H */ | ||
diff --git a/arch/score/include/asm/ipcbuf.h b/arch/score/include/asm/ipcbuf.h new file mode 100644 index 000000000000..e082ceff1818 --- /dev/null +++ b/arch/score/include/asm/ipcbuf.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_IPCBUF_H | ||
| 2 | #define _ASM_SCORE_IPCBUF_H | ||
| 3 | |||
| 4 | #include <asm-generic/ipcbuf.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_IPCBUF_H */ | ||
diff --git a/arch/score/include/asm/irq.h b/arch/score/include/asm/irq.h new file mode 100644 index 000000000000..c883f3df33fa --- /dev/null +++ b/arch/score/include/asm/irq.h | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | #ifndef _ASM_SCORE_IRQ_H | ||
| 2 | #define _ASM_SCORE_IRQ_H | ||
| 3 | |||
| 4 | #define EXCEPTION_VECTOR_BASE_ADDR 0xa0000000 | ||
| 5 | #define VECTOR_ADDRESS_OFFSET_MODE4 0 | ||
| 6 | #define VECTOR_ADDRESS_OFFSET_MODE16 1 | ||
| 7 | |||
| 8 | #define DEBUG_VECTOR_SIZE (0x4) | ||
| 9 | #define DEBUG_VECTOR_BASE_ADDR ((EXCEPTION_VECTOR_BASE_ADDR) + 0x1fc) | ||
| 10 | |||
| 11 | #define GENERAL_VECTOR_SIZE (0x10) | ||
| 12 | #define GENERAL_VECTOR_BASE_ADDR ((EXCEPTION_VECTOR_BASE_ADDR) + 0x200) | ||
| 13 | |||
| 14 | #define NR_IRQS 64 | ||
| 15 | #define IRQ_VECTOR_SIZE (0x10) | ||
| 16 | #define IRQ_VECTOR_BASE_ADDR ((EXCEPTION_VECTOR_BASE_ADDR) + 0x210) | ||
| 17 | #define IRQ_VECTOR_END_ADDR ((EXCEPTION_VECTOR_BASE_ADDR) + 0x5f0) | ||
| 18 | |||
| 19 | #define irq_canonicalize(irq) (irq) | ||
| 20 | |||
| 21 | #define IRQ_TIMER (7) /* Timer IRQ number of SPCT6600 */ | ||
| 22 | |||
| 23 | extern void interrupt_exception_vector(void); | ||
| 24 | |||
| 25 | #endif /* _ASM_SCORE_IRQ_H */ | ||
diff --git a/arch/score/include/asm/irq_regs.h b/arch/score/include/asm/irq_regs.h new file mode 100644 index 000000000000..b8e881c9a69f --- /dev/null +++ b/arch/score/include/asm/irq_regs.h | |||
| @@ -0,0 +1,11 @@ | |||
| 1 | #ifndef _ASM_SCORE_IRQ_REGS_H | ||
| 2 | #define _ASM_SCORE_IRQ_REGS_H | ||
| 3 | |||
| 4 | #include <linux/thread_info.h> | ||
| 5 | |||
| 6 | static inline struct pt_regs *get_irq_regs(void) | ||
| 7 | { | ||
| 8 | return current_thread_info()->regs; | ||
| 9 | } | ||
| 10 | |||
| 11 | #endif /* _ASM_SCORE_IRQ_REGS_H */ | ||
diff --git a/arch/score/include/asm/irqflags.h b/arch/score/include/asm/irqflags.h new file mode 100644 index 000000000000..690a6cae7294 --- /dev/null +++ b/arch/score/include/asm/irqflags.h | |||
| @@ -0,0 +1,109 @@ | |||
| 1 | #ifndef _ASM_SCORE_IRQFLAGS_H | ||
| 2 | #define _ASM_SCORE_IRQFLAGS_H | ||
| 3 | |||
| 4 | #ifndef __ASSEMBLY__ | ||
| 5 | |||
| 6 | #define raw_local_irq_save(x) \ | ||
| 7 | { \ | ||
| 8 | __asm__ __volatile__( \ | ||
| 9 | "mfcr r8, cr0;" \ | ||
| 10 | "li r9, 0xfffffffe;" \ | ||
| 11 | "nop;" \ | ||
| 12 | "mv %0, r8;" \ | ||
| 13 | "and r8, r8, r9;" \ | ||
| 14 | "mtcr r8, cr0;" \ | ||
| 15 | "nop;" \ | ||
| 16 | "nop;" \ | ||
| 17 | "nop;" \ | ||
| 18 | "nop;" \ | ||
| 19 | "nop;" \ | ||
| 20 | : "=r" (x) \ | ||
| 21 | : \ | ||
| 22 | : "r8", "r9" \ | ||
| 23 | ); \ | ||
| 24 | } | ||
| 25 | |||
| 26 | #define raw_local_irq_restore(x) \ | ||
| 27 | { \ | ||
| 28 | __asm__ __volatile__( \ | ||
| 29 | "mfcr r8, cr0;" \ | ||
| 30 | "ldi r9, 0x1;" \ | ||
| 31 | "and %0, %0, r9;" \ | ||
| 32 | "or r8, r8, %0;" \ | ||
| 33 | "mtcr r8, cr0;" \ | ||
| 34 | "nop;" \ | ||
| 35 | "nop;" \ | ||
| 36 | "nop;" \ | ||
| 37 | "nop;" \ | ||
| 38 | "nop;" \ | ||
| 39 | : \ | ||
| 40 | : "r"(x) \ | ||
| 41 | : "r8", "r9" \ | ||
| 42 | ); \ | ||
| 43 | } | ||
| 44 | |||
| 45 | #define raw_local_irq_enable(void) \ | ||
| 46 | { \ | ||
| 47 | __asm__ __volatile__( \ | ||
| 48 | "mfcr\tr8,cr0;" \ | ||
| 49 | "nop;" \ | ||
| 50 | "nop;" \ | ||
| 51 | "ori\tr8,0x1;" \ | ||
| 52 | "mtcr\tr8,cr0;" \ | ||
| 53 | "nop;" \ | ||
| 54 | "nop;" \ | ||
| 55 | "nop;" \ | ||
| 56 | "nop;" \ | ||
| 57 | "nop;" \ | ||
| 58 | : \ | ||
| 59 | : \ | ||
| 60 | : "r8"); \ | ||
| 61 | } | ||
| 62 | |||
| 63 | #define raw_local_irq_disable(void) \ | ||
| 64 | { \ | ||
| 65 | __asm__ __volatile__( \ | ||
| 66 | "mfcr\tr8,cr0;" \ | ||
| 67 | "nop;" \ | ||
| 68 | "nop;" \ | ||
| 69 | "srli\tr8,r8,1;" \ | ||
| 70 | "slli\tr8,r8,1;" \ | ||
| 71 | "mtcr\tr8,cr0;" \ | ||
| 72 | "nop;" \ | ||
| 73 | "nop;" \ | ||
| 74 | "nop;" \ | ||
| 75 | "nop;" \ | ||
| 76 | "nop;" \ | ||
| 77 | : \ | ||
| 78 | : \ | ||
| 79 | : "r8"); \ | ||
| 80 | } | ||
| 81 | |||
| 82 | #define raw_local_save_flags(x) \ | ||
| 83 | { \ | ||
| 84 | __asm__ __volatile__( \ | ||
| 85 | "mfcr r8, cr0;" \ | ||
| 86 | "nop;" \ | ||
| 87 | "nop;" \ | ||
| 88 | "mv %0, r8;" \ | ||
| 89 | "nop;" \ | ||
| 90 | "nop;" \ | ||
| 91 | "nop;" \ | ||
| 92 | "nop;" \ | ||
| 93 | "nop;" \ | ||
| 94 | "ldi r9, 0x1;" \ | ||
| 95 | "and %0, %0, r9;" \ | ||
| 96 | : "=r" (x) \ | ||
| 97 | : \ | ||
| 98 | : "r8", "r9" \ | ||
| 99 | ); \ | ||
| 100 | } | ||
| 101 | |||
| 102 | static inline int raw_irqs_disabled_flags(unsigned long flags) | ||
| 103 | { | ||
| 104 | return !(flags & 1); | ||
| 105 | } | ||
| 106 | |||
| 107 | #endif | ||
| 108 | |||
| 109 | #endif /* _ASM_SCORE_IRQFLAGS_H */ | ||
diff --git a/arch/score/include/asm/kdebug.h b/arch/score/include/asm/kdebug.h new file mode 100644 index 000000000000..a666e513f747 --- /dev/null +++ b/arch/score/include/asm/kdebug.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_KDEBUG_H | ||
| 2 | #define _ASM_SCORE_KDEBUG_H | ||
| 3 | |||
| 4 | #include <asm-generic/kdebug.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_KDEBUG_H */ | ||
diff --git a/arch/score/include/asm/kmap_types.h b/arch/score/include/asm/kmap_types.h new file mode 100644 index 000000000000..6c46eb5077d3 --- /dev/null +++ b/arch/score/include/asm/kmap_types.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_KMAP_TYPES_H | ||
| 2 | #define _ASM_SCORE_KMAP_TYPES_H | ||
| 3 | |||
| 4 | #include <asm-generic/kmap_types.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_KMAP_TYPES_H */ | ||
diff --git a/arch/score/include/asm/linkage.h b/arch/score/include/asm/linkage.h new file mode 100644 index 000000000000..2323a8ecf445 --- /dev/null +++ b/arch/score/include/asm/linkage.h | |||
| @@ -0,0 +1,7 @@ | |||
| 1 | #ifndef _ASM_SCORE_LINKAGE_H | ||
| 2 | #define _ASM_SCORE_LINKAGE_H | ||
| 3 | |||
| 4 | #define __ALIGN .align 2 | ||
| 5 | #define __ALIGN_STR ".align 2" | ||
| 6 | |||
| 7 | #endif /* _ASM_SCORE_LINKAGE_H */ | ||
diff --git a/arch/score/include/asm/local.h b/arch/score/include/asm/local.h new file mode 100644 index 000000000000..7e02f13dbba8 --- /dev/null +++ b/arch/score/include/asm/local.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_LOCAL_H | ||
| 2 | #define _ASM_SCORE_LOCAL_H | ||
| 3 | |||
| 4 | #include <asm-generic/local.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_LOCAL_H */ | ||
diff --git a/arch/score/include/asm/mman.h b/arch/score/include/asm/mman.h new file mode 100644 index 000000000000..84d85ddfed8d --- /dev/null +++ b/arch/score/include/asm/mman.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_MMAN_H | ||
| 2 | #define _ASM_SCORE_MMAN_H | ||
| 3 | |||
| 4 | #include <asm-generic/mman.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_MMAN_H */ | ||
diff --git a/arch/score/include/asm/mmu.h b/arch/score/include/asm/mmu.h new file mode 100644 index 000000000000..676828e4c10a --- /dev/null +++ b/arch/score/include/asm/mmu.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_MMU_H | ||
| 2 | #define _ASM_SCORE_MMU_H | ||
| 3 | |||
| 4 | typedef unsigned long mm_context_t; | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_MMU_H */ | ||
diff --git a/arch/score/include/asm/mmu_context.h b/arch/score/include/asm/mmu_context.h new file mode 100644 index 000000000000..2644577c96e8 --- /dev/null +++ b/arch/score/include/asm/mmu_context.h | |||
| @@ -0,0 +1,113 @@ | |||
| 1 | #ifndef _ASM_SCORE_MMU_CONTEXT_H | ||
| 2 | #define _ASM_SCORE_MMU_CONTEXT_H | ||
| 3 | |||
| 4 | #include <linux/errno.h> | ||
| 5 | #include <linux/sched.h> | ||
| 6 | #include <linux/slab.h> | ||
| 7 | #include <asm-generic/mm_hooks.h> | ||
| 8 | |||
| 9 | #include <asm/cacheflush.h> | ||
| 10 | #include <asm/tlbflush.h> | ||
| 11 | #include <asm/scoreregs.h> | ||
| 12 | |||
| 13 | /* | ||
| 14 | * For the fast tlb miss handlers, we keep a per cpu array of pointers | ||
| 15 | * to the current pgd for each processor. Also, the proc. id is stuffed | ||
| 16 | * into the context register. | ||
| 17 | */ | ||
| 18 | extern unsigned long asid_cache; | ||
| 19 | extern unsigned long pgd_current; | ||
| 20 | |||
| 21 | #define TLBMISS_HANDLER_SETUP_PGD(pgd) (pgd_current = (unsigned long)(pgd)) | ||
| 22 | |||
| 23 | #define TLBMISS_HANDLER_SETUP() \ | ||
| 24 | do { \ | ||
| 25 | write_c0_context(0); \ | ||
| 26 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) \ | ||
| 27 | } while (0) | ||
| 28 | |||
| 29 | /* | ||
| 30 | * All unused by hardware upper bits will be considered | ||
| 31 | * as a software asid extension. | ||
| 32 | */ | ||
| 33 | #define ASID_VERSION_MASK 0xfffff000 | ||
| 34 | #define ASID_FIRST_VERSION 0x1000 | ||
| 35 | |||
| 36 | /* PEVN --------- VPN ---------- --ASID--- -NA- */ | ||
| 37 | /* binary: 0000 0000 0000 0000 0000 0000 0001 0000 */ | ||
| 38 | /* binary: 0000 0000 0000 0000 0000 1111 1111 0000 */ | ||
| 39 | #define ASID_INC 0x10 | ||
| 40 | #define ASID_MASK 0xff0 | ||
| 41 | |||
| 42 | static inline void enter_lazy_tlb(struct mm_struct *mm, | ||
| 43 | struct task_struct *tsk) | ||
| 44 | {} | ||
| 45 | |||
| 46 | static inline void | ||
| 47 | get_new_mmu_context(struct mm_struct *mm) | ||
| 48 | { | ||
| 49 | unsigned long asid = asid_cache + ASID_INC; | ||
| 50 | |||
| 51 | if (!(asid & ASID_MASK)) { | ||
| 52 | local_flush_tlb_all(); /* start new asid cycle */ | ||
| 53 | if (!asid) /* fix version if needed */ | ||
| 54 | asid = ASID_FIRST_VERSION; | ||
| 55 | } | ||
| 56 | |||
| 57 | mm->context = asid; | ||
| 58 | asid_cache = asid; | ||
| 59 | } | ||
| 60 | |||
| 61 | /* | ||
| 62 | * Initialize the context related info for a new mm_struct | ||
| 63 | * instance. | ||
| 64 | */ | ||
| 65 | static inline int | ||
| 66 | init_new_context(struct task_struct *tsk, struct mm_struct *mm) | ||
| 67 | { | ||
| 68 | mm->context = 0; | ||
| 69 | return 0; | ||
| 70 | } | ||
| 71 | |||
| 72 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | ||
| 73 | struct task_struct *tsk) | ||
| 74 | { | ||
| 75 | unsigned long flags; | ||
| 76 | |||
| 77 | local_irq_save(flags); | ||
| 78 | if ((next->context ^ asid_cache) & ASID_VERSION_MASK) | ||
| 79 | get_new_mmu_context(next); | ||
| 80 | |||
| 81 | pevn_set(next->context); | ||
| 82 | TLBMISS_HANDLER_SETUP_PGD(next->pgd); | ||
| 83 | local_irq_restore(flags); | ||
| 84 | } | ||
| 85 | |||
| 86 | /* | ||
| 87 | * Destroy context related info for an mm_struct that is about | ||
| 88 | * to be put to rest. | ||
| 89 | */ | ||
| 90 | static inline void destroy_context(struct mm_struct *mm) | ||
| 91 | {} | ||
| 92 | |||
| 93 | static inline void | ||
| 94 | deactivate_mm(struct task_struct *task, struct mm_struct *mm) | ||
| 95 | {} | ||
| 96 | |||
| 97 | /* | ||
| 98 | * After we have set current->mm to a new value, this activates | ||
| 99 | * the context for the new mm so we see the new mappings. | ||
| 100 | */ | ||
| 101 | static inline void | ||
| 102 | activate_mm(struct mm_struct *prev, struct mm_struct *next) | ||
| 103 | { | ||
| 104 | unsigned long flags; | ||
| 105 | |||
| 106 | local_irq_save(flags); | ||
| 107 | get_new_mmu_context(next); | ||
| 108 | pevn_set(next->context); | ||
| 109 | TLBMISS_HANDLER_SETUP_PGD(next->pgd); | ||
| 110 | local_irq_restore(flags); | ||
| 111 | } | ||
| 112 | |||
| 113 | #endif /* _ASM_SCORE_MMU_CONTEXT_H */ | ||
diff --git a/arch/score/include/asm/module.h b/arch/score/include/asm/module.h new file mode 100644 index 000000000000..f0b5dc0bd023 --- /dev/null +++ b/arch/score/include/asm/module.h | |||
| @@ -0,0 +1,39 @@ | |||
| 1 | #ifndef _ASM_SCORE_MODULE_H | ||
| 2 | #define _ASM_SCORE_MODULE_H | ||
| 3 | |||
| 4 | #include <linux/list.h> | ||
| 5 | #include <asm/uaccess.h> | ||
| 6 | |||
| 7 | struct mod_arch_specific { | ||
| 8 | /* Data Bus Error exception tables */ | ||
| 9 | struct list_head dbe_list; | ||
| 10 | const struct exception_table_entry *dbe_start; | ||
| 11 | const struct exception_table_entry *dbe_end; | ||
| 12 | }; | ||
| 13 | |||
| 14 | typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ | ||
| 15 | |||
| 16 | #define Elf_Shdr Elf32_Shdr | ||
| 17 | #define Elf_Sym Elf32_Sym | ||
| 18 | #define Elf_Ehdr Elf32_Ehdr | ||
| 19 | #define Elf_Addr Elf32_Addr | ||
| 20 | |||
| 21 | /* Given an address, look for it in the exception tables. */ | ||
| 22 | #ifdef CONFIG_MODULES | ||
| 23 | const struct exception_table_entry *search_module_dbetables(unsigned long addr); | ||
| 24 | #else | ||
| 25 | static inline const struct exception_table_entry | ||
| 26 | *search_module_dbetables(unsigned long addr) | ||
| 27 | { | ||
| 28 | return NULL; | ||
| 29 | } | ||
| 30 | #endif | ||
| 31 | |||
| 32 | #define MODULE_PROC_FAMILY "SCORE7" | ||
| 33 | #define MODULE_KERNEL_TYPE "32BIT " | ||
| 34 | #define MODULE_KERNEL_SMTC "" | ||
| 35 | |||
| 36 | #define MODULE_ARCH_VERMAGIC \ | ||
| 37 | MODULE_PROC_FAMILY MODULE_KERNEL_TYPE MODULE_KERNEL_SMTC | ||
| 38 | |||
| 39 | #endif /* _ASM_SCORE_MODULE_H */ | ||
diff --git a/arch/score/include/asm/msgbuf.h b/arch/score/include/asm/msgbuf.h new file mode 100644 index 000000000000..7506721e29fa --- /dev/null +++ b/arch/score/include/asm/msgbuf.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_MSGBUF_H | ||
| 2 | #define _ASM_SCORE_MSGBUF_H | ||
| 3 | |||
| 4 | #include <asm-generic/msgbuf.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_MSGBUF_H */ | ||
diff --git a/arch/score/include/asm/mutex.h b/arch/score/include/asm/mutex.h new file mode 100644 index 000000000000..10d48fe4db97 --- /dev/null +++ b/arch/score/include/asm/mutex.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_MUTEX_H | ||
| 2 | #define _ASM_SCORE_MUTEX_H | ||
| 3 | |||
| 4 | #include <asm-generic/mutex-dec.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_MUTEX_H */ | ||
diff --git a/arch/score/include/asm/page.h b/arch/score/include/asm/page.h new file mode 100644 index 000000000000..ee5821042fcc --- /dev/null +++ b/arch/score/include/asm/page.h | |||
| @@ -0,0 +1,92 @@ | |||
| 1 | #ifndef _ASM_SCORE_PAGE_H | ||
| 2 | #define _ASM_SCORE_PAGE_H | ||
| 3 | |||
| 4 | #include <linux/pfn.h> | ||
| 5 | |||
| 6 | /* PAGE_SHIFT determines the page size */ | ||
| 7 | #define PAGE_SHIFT (12) | ||
| 8 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | ||
| 9 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
| 10 | |||
| 11 | #ifdef __KERNEL__ | ||
| 12 | |||
| 13 | #ifndef __ASSEMBLY__ | ||
| 14 | |||
| 15 | #define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1))) | ||
| 16 | #define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1))) | ||
| 17 | |||
| 18 | /* align addr on a size boundary - adjust address up/down if needed */ | ||
| 19 | #define _ALIGN_UP(addr, size) (((addr)+((size)-1))&(~((size)-1))) | ||
| 20 | #define _ALIGN_DOWN(addr, size) ((addr)&(~((size)-1))) | ||
| 21 | |||
| 22 | /* align addr on a size boundary - adjust address up if needed */ | ||
| 23 | #define _ALIGN(addr, size) _ALIGN_UP(addr, size) | ||
| 24 | |||
| 25 | /* | ||
| 26 | * PAGE_OFFSET -- the first address of the first page of memory. When not | ||
| 27 | * using MMU this corresponds to the first free page in physical memory (aligned | ||
| 28 | * on a page boundary). | ||
| 29 | */ | ||
| 30 | #define PAGE_OFFSET (0xA0000000UL) | ||
| 31 | |||
| 32 | #define clear_page(pgaddr) memset((pgaddr), 0, PAGE_SIZE) | ||
| 33 | #define copy_page(to, from) memcpy((to), (from), PAGE_SIZE) | ||
| 34 | |||
| 35 | #define clear_user_page(pgaddr, vaddr, page) memset((pgaddr), 0, PAGE_SIZE) | ||
| 36 | #define copy_user_page(vto, vfrom, vaddr, topg) \ | ||
| 37 | memcpy((vto), (vfrom), PAGE_SIZE) | ||
| 38 | |||
| 39 | /* | ||
| 40 | * These are used to make use of C type-checking.. | ||
| 41 | */ | ||
| 42 | |||
| 43 | typedef struct { unsigned long pte; } pte_t; /* page table entry */ | ||
| 44 | typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */ | ||
| 45 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
| 46 | typedef struct page *pgtable_t; | ||
| 47 | |||
| 48 | #define pte_val(x) ((x).pte) | ||
| 49 | #define pgd_val(x) ((x).pgd) | ||
| 50 | #define pgprot_val(x) ((x).pgprot) | ||
| 51 | |||
| 52 | #define __pte(x) ((pte_t) { (x) }) | ||
| 53 | #define __pgd(x) ((pgd_t) { (x) }) | ||
| 54 | #define __pgprot(x) ((pgprot_t) { (x) }) | ||
| 55 | |||
| 56 | extern unsigned long max_low_pfn; | ||
| 57 | extern unsigned long min_low_pfn; | ||
| 58 | extern unsigned long max_pfn; | ||
| 59 | |||
| 60 | #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) | ||
| 61 | #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) | ||
| 62 | |||
| 63 | #define phys_to_pfn(phys) (PFN_DOWN(phys)) | ||
| 64 | #define pfn_to_phys(pfn) (PFN_PHYS(pfn)) | ||
| 65 | |||
| 66 | #define virt_to_pfn(vaddr) (phys_to_pfn((__pa(vaddr)))) | ||
| 67 | #define pfn_to_virt(pfn) __va(pfn_to_phys((pfn))) | ||
| 68 | |||
| 69 | #define virt_to_page(vaddr) (pfn_to_page(virt_to_pfn(vaddr))) | ||
| 70 | #define page_to_virt(page) (pfn_to_virt(page_to_pfn(page))) | ||
| 71 | |||
| 72 | #define page_to_phys(page) (pfn_to_phys(page_to_pfn(page))) | ||
| 73 | #define page_to_bus(page) (page_to_phys(page)) | ||
| 74 | #define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) | ||
| 75 | |||
| 76 | #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_mapnr) | ||
| 77 | |||
| 78 | #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) | ||
| 79 | |||
| 80 | #endif /* __ASSEMBLY__ */ | ||
| 81 | |||
| 82 | #define virt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr))) | ||
| 83 | |||
| 84 | #endif /* __KERNEL__ */ | ||
| 85 | |||
| 86 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | ||
| 87 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
| 88 | |||
| 89 | #include <asm-generic/memory_model.h> | ||
| 90 | #include <asm-generic/getorder.h> | ||
| 91 | |||
| 92 | #endif /* _ASM_SCORE_PAGE_H */ | ||
diff --git a/arch/score/include/asm/param.h b/arch/score/include/asm/param.h new file mode 100644 index 000000000000..916b8690b6aa --- /dev/null +++ b/arch/score/include/asm/param.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_PARAM_H | ||
| 2 | #define _ASM_SCORE_PARAM_H | ||
| 3 | |||
| 4 | #include <asm-generic/param.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_PARAM_H */ | ||
diff --git a/arch/score/include/asm/pci.h b/arch/score/include/asm/pci.h new file mode 100644 index 000000000000..3f3cfd82549c --- /dev/null +++ b/arch/score/include/asm/pci.h | |||
| @@ -0,0 +1,4 @@ | |||
| 1 | #ifndef _ASM_SCORE_PCI_H | ||
| 2 | #define _ASM_SCORE_PCI_H | ||
| 3 | |||
| 4 | #endif /* _ASM_SCORE_PCI_H */ | ||
diff --git a/arch/score/include/asm/percpu.h b/arch/score/include/asm/percpu.h new file mode 100644 index 000000000000..e7bd4e05b475 --- /dev/null +++ b/arch/score/include/asm/percpu.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_PERCPU_H | ||
| 2 | #define _ASM_SCORE_PERCPU_H | ||
| 3 | |||
| 4 | #include <asm-generic/percpu.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_PERCPU_H */ | ||
diff --git a/arch/score/include/asm/pgalloc.h b/arch/score/include/asm/pgalloc.h new file mode 100644 index 000000000000..059a61b7071b --- /dev/null +++ b/arch/score/include/asm/pgalloc.h | |||
| @@ -0,0 +1,83 @@ | |||
| 1 | #ifndef _ASM_SCORE_PGALLOC_H | ||
| 2 | #define _ASM_SCORE_PGALLOC_H | ||
| 3 | |||
| 4 | #include <linux/mm.h> | ||
| 5 | |||
| 6 | static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, | ||
| 7 | pte_t *pte) | ||
| 8 | { | ||
| 9 | set_pmd(pmd, __pmd((unsigned long)pte)); | ||
| 10 | } | ||
| 11 | |||
| 12 | static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, | ||
| 13 | pgtable_t pte) | ||
| 14 | { | ||
| 15 | set_pmd(pmd, __pmd((unsigned long)page_address(pte))); | ||
| 16 | } | ||
| 17 | |||
| 18 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
| 19 | |||
| 20 | static inline pgd_t *pgd_alloc(struct mm_struct *mm) | ||
| 21 | { | ||
| 22 | pgd_t *ret, *init; | ||
| 23 | |||
| 24 | ret = (pgd_t *) __get_free_pages(GFP_KERNEL, PGD_ORDER); | ||
| 25 | if (ret) { | ||
| 26 | init = pgd_offset(&init_mm, 0UL); | ||
| 27 | pgd_init((unsigned long)ret); | ||
| 28 | memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD, | ||
| 29 | (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); | ||
| 30 | } | ||
| 31 | |||
| 32 | return ret; | ||
| 33 | } | ||
| 34 | |||
| 35 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
| 36 | { | ||
| 37 | free_pages((unsigned long)pgd, PGD_ORDER); | ||
| 38 | } | ||
| 39 | |||
| 40 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | ||
| 41 | unsigned long address) | ||
| 42 | { | ||
| 43 | pte_t *pte; | ||
| 44 | |||
| 45 | pte = (pte_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, | ||
| 46 | PTE_ORDER); | ||
| 47 | |||
| 48 | return pte; | ||
| 49 | } | ||
| 50 | |||
| 51 | static inline struct page *pte_alloc_one(struct mm_struct *mm, | ||
| 52 | unsigned long address) | ||
| 53 | { | ||
| 54 | struct page *pte; | ||
| 55 | |||
| 56 | pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER); | ||
| 57 | if (pte) { | ||
| 58 | clear_highpage(pte); | ||
| 59 | pgtable_page_ctor(pte); | ||
| 60 | } | ||
| 61 | return pte; | ||
| 62 | } | ||
| 63 | |||
| 64 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | ||
| 65 | { | ||
| 66 | free_pages((unsigned long)pte, PTE_ORDER); | ||
| 67 | } | ||
| 68 | |||
| 69 | static inline void pte_free(struct mm_struct *mm, pgtable_t pte) | ||
| 70 | { | ||
| 71 | pgtable_page_dtor(pte); | ||
| 72 | __free_pages(pte, PTE_ORDER); | ||
| 73 | } | ||
| 74 | |||
| 75 | #define __pte_free_tlb(tlb, pte, buf) \ | ||
| 76 | do { \ | ||
| 77 | pgtable_page_dtor(pte); \ | ||
| 78 | tlb_remove_page((tlb), pte); \ | ||
| 79 | } while (0) | ||
| 80 | |||
| 81 | #define check_pgt_cache() do {} while (0) | ||
| 82 | |||
| 83 | #endif /* _ASM_SCORE_PGALLOC_H */ | ||
diff --git a/arch/score/include/asm/pgtable-bits.h b/arch/score/include/asm/pgtable-bits.h new file mode 100644 index 000000000000..7d65a96a82e5 --- /dev/null +++ b/arch/score/include/asm/pgtable-bits.h | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | #ifndef _ASM_SCORE_PGTABLE_BITS_H | ||
| 2 | #define _ASM_SCORE_PGTABLE_BITS_H | ||
| 3 | |||
| 4 | #define _PAGE_ACCESSED (1<<5) /* implemented in software */ | ||
| 5 | #define _PAGE_READ (1<<6) /* implemented in software */ | ||
| 6 | #define _PAGE_WRITE (1<<7) /* implemented in software */ | ||
| 7 | #define _PAGE_PRESENT (1<<9) /* implemented in software */ | ||
| 8 | #define _PAGE_MODIFIED (1<<10) /* implemented in software */ | ||
| 9 | #define _PAGE_FILE (1<<10) | ||
| 10 | |||
| 11 | #define _PAGE_GLOBAL (1<<0) | ||
| 12 | #define _PAGE_VALID (1<<1) | ||
| 13 | #define _PAGE_SILENT_READ (1<<1) /* synonym */ | ||
| 14 | #define _PAGE_DIRTY (1<<2) /* Write bit */ | ||
| 15 | #define _PAGE_SILENT_WRITE (1<<2) | ||
| 16 | #define _PAGE_CACHE (1<<3) /* cache */ | ||
| 17 | #define _CACHE_MASK (1<<3) | ||
| 18 | #define _PAGE_BUFFERABLE (1<<4) /*Fallow Spec. */ | ||
| 19 | |||
| 20 | #define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) | ||
| 21 | #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) | ||
| 22 | #define _PAGE_CHG_MASK \ | ||
| 23 | (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_CACHE) | ||
| 24 | |||
| 25 | #endif /* _ASM_SCORE_PGTABLE_BITS_H */ | ||
diff --git a/arch/score/include/asm/pgtable.h b/arch/score/include/asm/pgtable.h new file mode 100644 index 000000000000..674934b40170 --- /dev/null +++ b/arch/score/include/asm/pgtable.h | |||
| @@ -0,0 +1,287 @@ | |||
| 1 | #ifndef _ASM_SCORE_PGTABLE_H | ||
| 2 | #define _ASM_SCORE_PGTABLE_H | ||
| 3 | |||
| 4 | #include <linux/const.h> | ||
| 5 | #include <asm-generic/pgtable-nopmd.h> | ||
| 6 | |||
| 7 | #include <asm/fixmap.h> | ||
| 8 | #include <asm/setup.h> | ||
| 9 | #include <asm/pgtable-bits.h> | ||
| 10 | |||
| 11 | extern void load_pgd(unsigned long pg_dir); | ||
| 12 | extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)]; | ||
| 13 | |||
| 14 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | ||
| 15 | #define PGDIR_SHIFT 22 | ||
| 16 | #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) | ||
| 17 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
| 18 | |||
| 19 | /* | ||
| 20 | * Entries per page directory level: we use two-level, so | ||
| 21 | * we don't really have any PUD/PMD directory physically. | ||
| 22 | */ | ||
| 23 | #define PGD_ORDER 0 | ||
| 24 | #define PTE_ORDER 0 | ||
| 25 | |||
| 26 | #define PTRS_PER_PGD 1024 | ||
| 27 | #define PTRS_PER_PTE 1024 | ||
| 28 | |||
| 29 | #define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) | ||
| 30 | #define FIRST_USER_ADDRESS 0 | ||
| 31 | |||
| 32 | #define VMALLOC_START (0xc0000000UL) | ||
| 33 | |||
| 34 | #define PKMAP_BASE (0xfd000000UL) | ||
| 35 | |||
| 36 | #define VMALLOC_END (FIXADDR_START - 2*PAGE_SIZE) | ||
| 37 | |||
| 38 | #define pte_ERROR(e) \ | ||
| 39 | printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \ | ||
| 40 | __FILE__, __LINE__, pte_val(e)) | ||
| 41 | #define pgd_ERROR(e) \ | ||
| 42 | printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \ | ||
| 43 | __FILE__, __LINE__, pgd_val(e)) | ||
| 44 | |||
| 45 | /* | ||
| 46 | * Empty pgd/pmd entries point to the invalid_pte_table. | ||
| 47 | */ | ||
| 48 | static inline int pmd_none(pmd_t pmd) | ||
| 49 | { | ||
| 50 | return pmd_val(pmd) == (unsigned long) invalid_pte_table; | ||
| 51 | } | ||
| 52 | |||
| 53 | #define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK) | ||
| 54 | |||
| 55 | static inline int pmd_present(pmd_t pmd) | ||
| 56 | { | ||
| 57 | return pmd_val(pmd) != (unsigned long) invalid_pte_table; | ||
| 58 | } | ||
| 59 | |||
| 60 | static inline void pmd_clear(pmd_t *pmdp) | ||
| 61 | { | ||
| 62 | pmd_val(*pmdp) = ((unsigned long) invalid_pte_table); | ||
| 63 | } | ||
| 64 | |||
| 65 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | ||
| 66 | #define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT)) | ||
| 67 | #define pfn_pte(pfn, prot) \ | ||
| 68 | __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
| 69 | |||
| 70 | #define __pgd_offset(address) pgd_index(address) | ||
| 71 | #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) | ||
| 72 | #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) | ||
| 73 | |||
| 74 | /* to find an entry in a kernel page-table-directory */ | ||
| 75 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
| 76 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) | ||
| 77 | |||
| 78 | /* to find an entry in a page-table-directory */ | ||
| 79 | #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr)) | ||
| 80 | |||
| 81 | /* Find an entry in the third-level page table.. */ | ||
| 82 | #define __pte_offset(address) \ | ||
| 83 | (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
| 84 | #define pte_offset(dir, address) \ | ||
| 85 | ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) | ||
| 86 | #define pte_offset_kernel(dir, address) \ | ||
| 87 | ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) | ||
| 88 | |||
| 89 | #define pte_offset_map(dir, address) \ | ||
| 90 | ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) | ||
| 91 | #define pte_offset_map_nested(dir, address) \ | ||
| 92 | ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) | ||
| 93 | #define pte_unmap(pte) ((void)(pte)) | ||
| 94 | #define pte_unmap_nested(pte) ((void)(pte)) | ||
| 95 | |||
| 96 | /* | ||
| 97 | * Bits 9(_PAGE_PRESENT) and 10(_PAGE_FILE)are taken, | ||
| 98 | * split up 30 bits of offset into this range: | ||
| 99 | */ | ||
| 100 | #define PTE_FILE_MAX_BITS 30 | ||
| 101 | #define pte_to_pgoff(_pte) \ | ||
| 102 | (((_pte).pte & 0x1ff) | (((_pte).pte >> 11) << 9)) | ||
| 103 | #define pgoff_to_pte(off) \ | ||
| 104 | ((pte_t) {((off) & 0x1ff) | (((off) >> 9) << 11) | _PAGE_FILE}) | ||
| 105 | #define __pte_to_swp_entry(pte) \ | ||
| 106 | ((swp_entry_t) { pte_val(pte)}) | ||
| 107 | #define __swp_entry_to_pte(x) ((pte_t) {(x).val}) | ||
| 108 | |||
| 109 | #define pmd_phys(pmd) __pa((void *)pmd_val(pmd)) | ||
| 110 | #define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) | ||
| 111 | #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) | ||
| 112 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } | ||
| 113 | |||
| 114 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) | ||
| 115 | #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) | ||
| 116 | #define pte_clear(mm, addr, xp) \ | ||
| 117 | do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) | ||
| 118 | |||
| 119 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ | ||
| 120 | remap_pfn_range(vma, vaddr, pfn, size, prot) | ||
| 121 | |||
| 122 | /* | ||
| 123 | * The "pgd_xxx()" functions here are trivial for a folded two-level | ||
| 124 | * setup: the pgd is never bad, and a pmd always exists (as it's folded | ||
| 125 | * into the pgd entry) | ||
| 126 | */ | ||
| 127 | #define pgd_present(pgd) (1) | ||
| 128 | #define pgd_none(pgd) (0) | ||
| 129 | #define pgd_bad(pgd) (0) | ||
| 130 | #define pgd_clear(pgdp) do { } while (0) | ||
| 131 | |||
| 132 | #define kern_addr_valid(addr) (1) | ||
| 133 | #define pmd_page_vaddr(pmd) pmd_val(pmd) | ||
| 134 | |||
| 135 | #define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) | ||
| 136 | #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) | ||
| 137 | |||
| 138 | #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_CACHE) | ||
| 139 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ | ||
| 140 | _PAGE_CACHE) | ||
| 141 | #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHE) | ||
| 142 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHE) | ||
| 143 | #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ | ||
| 144 | _PAGE_GLOBAL | _PAGE_CACHE) | ||
| 145 | #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ | ||
| 146 | __WRITEABLE | _PAGE_GLOBAL & ~_PAGE_CACHE) | ||
| 147 | |||
| 148 | #define __P000 PAGE_NONE | ||
| 149 | #define __P001 PAGE_READONLY | ||
| 150 | #define __P010 PAGE_COPY | ||
| 151 | #define __P011 PAGE_COPY | ||
| 152 | #define __P100 PAGE_READONLY | ||
| 153 | #define __P101 PAGE_READONLY | ||
| 154 | #define __P110 PAGE_COPY | ||
| 155 | #define __P111 PAGE_COPY | ||
| 156 | |||
| 157 | #define __S000 PAGE_NONE | ||
| 158 | #define __S001 PAGE_READONLY | ||
| 159 | #define __S010 PAGE_SHARED | ||
| 160 | #define __S011 PAGE_SHARED | ||
| 161 | #define __S100 PAGE_READONLY | ||
| 162 | #define __S101 PAGE_READONLY | ||
| 163 | #define __S110 PAGE_SHARED | ||
| 164 | #define __S111 PAGE_SHARED | ||
| 165 | |||
| 166 | #define pgprot_noncached pgprot_noncached | ||
| 167 | |||
| 168 | static inline pgprot_t pgprot_noncached(pgprot_t _prot) | ||
| 169 | { | ||
| 170 | unsigned long prot = pgprot_val(_prot); | ||
| 171 | |||
| 172 | prot = (prot & ~_CACHE_MASK); | ||
| 173 | |||
| 174 | return __pgprot(prot); | ||
| 175 | } | ||
| 176 | |||
| 177 | #define __swp_type(x) ((x).val & 0x1f) | ||
| 178 | #define __swp_offset(x) ((x).val >> 11) | ||
| 179 | #define __swp_entry(type, offset) ((swp_entry_t){(type) | ((offset) << 11)}) | ||
| 180 | |||
| 181 | extern unsigned long empty_zero_page; | ||
| 182 | extern unsigned long zero_page_mask; | ||
| 183 | |||
| 184 | #define ZERO_PAGE(vaddr) \ | ||
| 185 | (virt_to_page((void *)(empty_zero_page + \ | ||
| 186 | (((unsigned long)(vaddr)) & zero_page_mask)))) | ||
| 187 | |||
| 188 | #define pgtable_cache_init() do {} while (0) | ||
| 189 | |||
| 190 | #define arch_enter_lazy_cpu_mode() do {} while (0) | ||
| 191 | |||
| 192 | static inline int pte_write(pte_t pte) | ||
| 193 | { | ||
| 194 | return pte_val(pte) & _PAGE_WRITE; | ||
| 195 | } | ||
| 196 | |||
| 197 | static inline int pte_dirty(pte_t pte) | ||
| 198 | { | ||
| 199 | return pte_val(pte) & _PAGE_MODIFIED; | ||
| 200 | } | ||
| 201 | |||
| 202 | static inline int pte_young(pte_t pte) | ||
| 203 | { | ||
| 204 | return pte_val(pte) & _PAGE_ACCESSED; | ||
| 205 | } | ||
| 206 | |||
| 207 | static inline int pte_file(pte_t pte) | ||
| 208 | { | ||
| 209 | return pte_val(pte) & _PAGE_FILE; | ||
| 210 | } | ||
| 211 | |||
| 212 | #define pte_special(pte) (0) | ||
| 213 | |||
| 214 | static inline pte_t pte_wrprotect(pte_t pte) | ||
| 215 | { | ||
| 216 | pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); | ||
| 217 | return pte; | ||
| 218 | } | ||
| 219 | |||
| 220 | static inline pte_t pte_mkclean(pte_t pte) | ||
| 221 | { | ||
| 222 | pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE); | ||
| 223 | return pte; | ||
| 224 | } | ||
| 225 | |||
| 226 | static inline pte_t pte_mkold(pte_t pte) | ||
| 227 | { | ||
| 228 | pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ); | ||
| 229 | return pte; | ||
| 230 | } | ||
| 231 | |||
| 232 | static inline pte_t pte_mkwrite(pte_t pte) | ||
| 233 | { | ||
| 234 | pte_val(pte) |= _PAGE_WRITE; | ||
| 235 | if (pte_val(pte) & _PAGE_MODIFIED) | ||
| 236 | pte_val(pte) |= _PAGE_SILENT_WRITE; | ||
| 237 | return pte; | ||
| 238 | } | ||
| 239 | |||
| 240 | static inline pte_t pte_mkdirty(pte_t pte) | ||
| 241 | { | ||
| 242 | pte_val(pte) |= _PAGE_MODIFIED; | ||
| 243 | if (pte_val(pte) & _PAGE_WRITE) | ||
| 244 | pte_val(pte) |= _PAGE_SILENT_WRITE; | ||
| 245 | return pte; | ||
| 246 | } | ||
| 247 | |||
| 248 | static inline pte_t pte_mkyoung(pte_t pte) | ||
| 249 | { | ||
| 250 | pte_val(pte) |= _PAGE_ACCESSED; | ||
| 251 | if (pte_val(pte) & _PAGE_READ) | ||
| 252 | pte_val(pte) |= _PAGE_SILENT_READ; | ||
| 253 | return pte; | ||
| 254 | } | ||
| 255 | |||
| 256 | #define set_pmd(pmdptr, pmdval) \ | ||
| 257 | do { *(pmdptr) = (pmdval); } while (0) | ||
| 258 | #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) | ||
| 259 | |||
| 260 | extern unsigned long pgd_current; | ||
| 261 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; | ||
| 262 | extern void paging_init(void); | ||
| 263 | |||
| 264 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
| 265 | { | ||
| 266 | return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); | ||
| 267 | } | ||
| 268 | |||
| 269 | extern void __update_tlb(struct vm_area_struct *vma, | ||
| 270 | unsigned long address, pte_t pte); | ||
| 271 | extern void __update_cache(struct vm_area_struct *vma, | ||
| 272 | unsigned long address, pte_t pte); | ||
| 273 | |||
| 274 | static inline void update_mmu_cache(struct vm_area_struct *vma, | ||
| 275 | unsigned long address, pte_t pte) | ||
| 276 | { | ||
| 277 | __update_tlb(vma, address, pte); | ||
| 278 | __update_cache(vma, address, pte); | ||
| 279 | } | ||
| 280 | |||
| 281 | #ifndef __ASSEMBLY__ | ||
| 282 | #include <asm-generic/pgtable.h> | ||
| 283 | |||
| 284 | void setup_memory(void); | ||
| 285 | #endif /* __ASSEMBLY__ */ | ||
| 286 | |||
| 287 | #endif /* _ASM_SCORE_PGTABLE_H */ | ||
diff --git a/arch/score/include/asm/poll.h b/arch/score/include/asm/poll.h new file mode 100644 index 000000000000..18532db02861 --- /dev/null +++ b/arch/score/include/asm/poll.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_POLL_H | ||
| 2 | #define _ASM_SCORE_POLL_H | ||
| 3 | |||
| 4 | #include <asm-generic/poll.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_POLL_H */ | ||
diff --git a/arch/score/include/asm/posix_types.h b/arch/score/include/asm/posix_types.h new file mode 100644 index 000000000000..b88acf80048a --- /dev/null +++ b/arch/score/include/asm/posix_types.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_POSIX_TYPES_H | ||
| 2 | #define _ASM_SCORE_POSIX_TYPES_H | ||
| 3 | |||
| 4 | #include <asm-generic/posix_types.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_POSIX_TYPES_H */ | ||
diff --git a/arch/score/include/asm/processor.h b/arch/score/include/asm/processor.h new file mode 100644 index 000000000000..7e22f216d771 --- /dev/null +++ b/arch/score/include/asm/processor.h | |||
| @@ -0,0 +1,106 @@ | |||
| 1 | #ifndef _ASM_SCORE_PROCESSOR_H | ||
| 2 | #define _ASM_SCORE_PROCESSOR_H | ||
| 3 | |||
| 4 | #include <linux/cpumask.h> | ||
| 5 | #include <linux/threads.h> | ||
| 6 | |||
| 7 | #include <asm/segment.h> | ||
| 8 | |||
| 9 | struct task_struct; | ||
| 10 | |||
| 11 | /* | ||
| 12 | * System setup and hardware flags.. | ||
| 13 | */ | ||
| 14 | extern void (*cpu_wait)(void); | ||
| 15 | |||
| 16 | extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); | ||
| 17 | extern unsigned long thread_saved_pc(struct task_struct *tsk); | ||
| 18 | extern void start_thread(struct pt_regs *regs, | ||
| 19 | unsigned long pc, unsigned long sp); | ||
| 20 | extern unsigned long get_wchan(struct task_struct *p); | ||
| 21 | |||
| 22 | /* | ||
| 23 | * Return current * instruction pointer ("program counter"). | ||
| 24 | */ | ||
| 25 | #define current_text_addr() ({ __label__ _l; _l: &&_l; }) | ||
| 26 | |||
| 27 | #define cpu_relax() barrier() | ||
| 28 | #define release_thread(thread) do {} while (0) | ||
| 29 | #define prepare_to_copy(tsk) do {} while (0) | ||
| 30 | |||
| 31 | /* | ||
| 32 | * User space process size: 2GB. This is hardcoded into a few places, | ||
| 33 | * so don't change it unless you know what you are doing. | ||
| 34 | */ | ||
| 35 | #define TASK_SIZE 0x7fff8000UL | ||
| 36 | |||
| 37 | /* | ||
| 38 | * This decides where the kernel will search for a free chunk of vm | ||
| 39 | * space during mmap's. | ||
| 40 | */ | ||
| 41 | #define TASK_UNMAPPED_BASE ((TASK_SIZE / 3) & ~(PAGE_SIZE)) | ||
| 42 | |||
| 43 | #ifdef __KERNEL__ | ||
| 44 | #define STACK_TOP TASK_SIZE | ||
| 45 | #define STACK_TOP_MAX TASK_SIZE | ||
| 46 | #endif | ||
| 47 | |||
| 48 | /* | ||
| 49 | * If you change thread_struct remember to change the #defines below too! | ||
| 50 | */ | ||
| 51 | struct thread_struct { | ||
| 52 | unsigned long reg0, reg2, reg3; | ||
| 53 | unsigned long reg12, reg13, reg14, reg15, reg16; | ||
| 54 | unsigned long reg17, reg18, reg19, reg20, reg21; | ||
| 55 | |||
| 56 | unsigned long cp0_psr; | ||
| 57 | unsigned long cp0_ema; /* Last user fault */ | ||
| 58 | unsigned long cp0_badvaddr; /* Last user fault */ | ||
| 59 | unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ | ||
| 60 | unsigned long error_code; | ||
| 61 | unsigned long trap_no; | ||
| 62 | |||
| 63 | unsigned long mflags; | ||
| 64 | unsigned long reg29; | ||
| 65 | |||
| 66 | unsigned long single_step; | ||
| 67 | unsigned long ss_nextcnt; | ||
| 68 | |||
| 69 | unsigned long insn1_type; | ||
| 70 | unsigned long addr1; | ||
| 71 | unsigned long insn1; | ||
| 72 | |||
| 73 | unsigned long insn2_type; | ||
| 74 | unsigned long addr2; | ||
| 75 | unsigned long insn2; | ||
| 76 | |||
| 77 | mm_segment_t current_ds; | ||
| 78 | }; | ||
| 79 | |||
| 80 | #define INIT_THREAD { \ | ||
| 81 | .reg0 = 0, \ | ||
| 82 | .reg2 = 0, \ | ||
| 83 | .reg3 = 0, \ | ||
| 84 | .reg12 = 0, \ | ||
| 85 | .reg13 = 0, \ | ||
| 86 | .reg14 = 0, \ | ||
| 87 | .reg15 = 0, \ | ||
| 88 | .reg16 = 0, \ | ||
| 89 | .reg17 = 0, \ | ||
| 90 | .reg18 = 0, \ | ||
| 91 | .reg19 = 0, \ | ||
| 92 | .reg20 = 0, \ | ||
| 93 | .reg21 = 0, \ | ||
| 94 | .cp0_psr = 0, \ | ||
| 95 | .error_code = 0, \ | ||
| 96 | .trap_no = 0, \ | ||
| 97 | } | ||
| 98 | |||
| 99 | #define kstk_tos(tsk) \ | ||
| 100 | ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32) | ||
| 101 | #define task_pt_regs(tsk) ((struct pt_regs *)kstk_tos(tsk) - 1) | ||
| 102 | |||
| 103 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc) | ||
| 104 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29]) | ||
| 105 | |||
| 106 | #endif /* _ASM_SCORE_PROCESSOR_H */ | ||
diff --git a/arch/score/include/asm/ptrace.h b/arch/score/include/asm/ptrace.h new file mode 100644 index 000000000000..d40e691f23e2 --- /dev/null +++ b/arch/score/include/asm/ptrace.h | |||
| @@ -0,0 +1,97 @@ | |||
| 1 | #ifndef _ASM_SCORE_PTRACE_H | ||
| 2 | #define _ASM_SCORE_PTRACE_H | ||
| 3 | |||
| 4 | #define PTRACE_GETREGS 12 | ||
| 5 | #define PTRACE_SETREGS 13 | ||
| 6 | |||
| 7 | #define PC 32 | ||
| 8 | #define CONDITION 33 | ||
| 9 | #define ECR 34 | ||
| 10 | #define EMA 35 | ||
| 11 | #define CEH 36 | ||
| 12 | #define CEL 37 | ||
| 13 | #define COUNTER 38 | ||
| 14 | #define LDCR 39 | ||
| 15 | #define STCR 40 | ||
| 16 | #define PSR 41 | ||
| 17 | |||
| 18 | #define SINGLESTEP16_INSN 0x7006 | ||
| 19 | #define SINGLESTEP32_INSN 0x840C8000 | ||
| 20 | #define BREAKPOINT16_INSN 0x7002 /* work on SPG300 */ | ||
| 21 | #define BREAKPOINT32_INSN 0x84048000 /* work on SPG300 */ | ||
| 22 | |||
| 23 | /* Define instruction mask */ | ||
| 24 | #define INSN32_MASK 0x80008000 | ||
| 25 | |||
| 26 | #define J32 0x88008000 /* 1_00010_0000000000_1_000000000000000 */ | ||
| 27 | #define J32M 0xFC008000 /* 1_11111_0000000000_1_000000000000000 */ | ||
| 28 | |||
| 29 | #define B32 0x90008000 /* 1_00100_0000000000_1_000000000000000 */ | ||
| 30 | #define B32M 0xFC008000 | ||
| 31 | #define BL32 0x90008001 /* 1_00100_0000000000_1_000000000000001 */ | ||
| 32 | #define BL32M B32 | ||
| 33 | #define BR32 0x80008008 /* 1_00000_0000000000_1_00000000_000100_0 */ | ||
| 34 | #define BR32M 0xFFE0807E | ||
| 35 | #define BRL32 0x80008009 /* 1_00000_0000000000_1_00000000_000100_1 */ | ||
| 36 | #define BRL32M BR32M | ||
| 37 | |||
| 38 | #define B32_SET (J32 | B32 | BL32 | BR32 | BRL32) | ||
| 39 | |||
| 40 | #define J16 0x3000 /* 0_011_....... */ | ||
| 41 | #define J16M 0xF000 | ||
| 42 | #define B16 0x4000 /* 0_100_....... */ | ||
| 43 | #define B16M 0xF000 | ||
| 44 | #define BR16 0x0004 /* 0_000.......0100 */ | ||
| 45 | #define BR16M 0xF00F | ||
| 46 | #define B16_SET (J16 | B16 | BR16) | ||
| 47 | |||
| 48 | |||
| 49 | /* | ||
| 50 | * This struct defines the way the registers are stored on the stack during a | ||
| 51 | * system call/exception. As usual the registers k0/k1 aren't being saved. | ||
| 52 | */ | ||
| 53 | struct pt_regs { | ||
| 54 | unsigned long pad0[6]; /* stack arguments */ | ||
| 55 | unsigned long orig_r4; | ||
| 56 | unsigned long orig_r7; | ||
| 57 | long is_syscall; | ||
| 58 | |||
| 59 | unsigned long regs[32]; | ||
| 60 | |||
| 61 | unsigned long cel; | ||
| 62 | unsigned long ceh; | ||
| 63 | |||
| 64 | unsigned long sr0; /* cnt */ | ||
| 65 | unsigned long sr1; /* lcr */ | ||
| 66 | unsigned long sr2; /* scr */ | ||
| 67 | |||
| 68 | unsigned long cp0_epc; | ||
| 69 | unsigned long cp0_ema; | ||
| 70 | unsigned long cp0_psr; | ||
| 71 | unsigned long cp0_ecr; | ||
| 72 | unsigned long cp0_condition; | ||
| 73 | }; | ||
| 74 | |||
| 75 | #ifdef __KERNEL__ | ||
| 76 | |||
| 77 | struct task_struct; | ||
| 78 | |||
| 79 | /* | ||
| 80 | * Does the process account for user or for system time? | ||
| 81 | */ | ||
| 82 | #define user_mode(regs) ((regs->cp0_psr & 8) == 8) | ||
| 83 | |||
| 84 | #define instruction_pointer(regs) ((unsigned long)(regs)->cp0_epc) | ||
| 85 | #define profile_pc(regs) instruction_pointer(regs) | ||
| 86 | |||
| 87 | extern void do_syscall_trace(struct pt_regs *regs, int entryexit); | ||
| 88 | extern int read_tsk_long(struct task_struct *, unsigned long, unsigned long *); | ||
| 89 | extern int read_tsk_short(struct task_struct *, unsigned long, | ||
| 90 | unsigned short *); | ||
| 91 | |||
| 92 | #define arch_has_single_step() (1) | ||
| 93 | extern void user_enable_single_step(struct task_struct *); | ||
| 94 | extern void user_disable_single_step(struct task_struct *); | ||
| 95 | #endif /* __KERNEL__ */ | ||
| 96 | |||
| 97 | #endif /* _ASM_SCORE_PTRACE_H */ | ||
diff --git a/arch/score/include/asm/resource.h b/arch/score/include/asm/resource.h new file mode 100644 index 000000000000..9ce22bc7b475 --- /dev/null +++ b/arch/score/include/asm/resource.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_RESOURCE_H | ||
| 2 | #define _ASM_SCORE_RESOURCE_H | ||
| 3 | |||
| 4 | #include <asm-generic/resource.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_RESOURCE_H */ | ||
diff --git a/arch/score/include/asm/scatterlist.h b/arch/score/include/asm/scatterlist.h new file mode 100644 index 000000000000..9f533b8362c7 --- /dev/null +++ b/arch/score/include/asm/scatterlist.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SCATTERLIST_H | ||
| 2 | #define _ASM_SCORE_SCATTERLIST_H | ||
| 3 | |||
| 4 | #include <asm-generic/scatterlist.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SCATTERLIST_H */ | ||
diff --git a/arch/score/include/asm/scoreregs.h b/arch/score/include/asm/scoreregs.h new file mode 100644 index 000000000000..d0ad29204518 --- /dev/null +++ b/arch/score/include/asm/scoreregs.h | |||
| @@ -0,0 +1,51 @@ | |||
| 1 | #ifndef _ASM_SCORE_SCOREREGS_H | ||
| 2 | #define _ASM_SCORE_SCOREREGS_H | ||
| 3 | |||
| 4 | #include <linux/linkage.h> | ||
| 5 | |||
| 6 | /* TIMER register */ | ||
| 7 | #define TIME0BASE 0x96080000 | ||
| 8 | #define P_TIMER0_CTRL (TIME0BASE + 0x00) | ||
| 9 | #define P_TIMER0_CPP_CTRL (TIME0BASE + 0x04) | ||
| 10 | #define P_TIMER0_PRELOAD (TIME0BASE + 0x08) | ||
| 11 | #define P_TIMER0_CPP_REG (TIME0BASE + 0x0C) | ||
| 12 | #define P_TIMER0_UPCNT (TIME0BASE + 0x10) | ||
| 13 | |||
| 14 | /* Timer Controller Register */ | ||
| 15 | /* bit 0 Timer enable */ | ||
| 16 | #define TMR_DISABLE 0x0000 | ||
| 17 | #define TMR_ENABLE 0x0001 | ||
| 18 | |||
| 19 | /* bit 1 Interrupt enable */ | ||
| 20 | #define TMR_IE_DISABLE 0x0000 | ||
| 21 | #define TMR_IE_ENABLE 0x0002 | ||
| 22 | |||
| 23 | /* bit 2 Output enable */ | ||
| 24 | #define TMR_OE_DISABLE 0x0004 | ||
| 25 | #define TMR_OE_ENABLE 0x0000 | ||
| 26 | |||
| 27 | /* bit4 Up/Down counting selection */ | ||
| 28 | #define TMR_UD_DOWN 0x0000 | ||
| 29 | #define TMR_UD_UP 0x0010 | ||
| 30 | |||
| 31 | /* bit5 Up/Down counting control selection */ | ||
| 32 | #define TMR_UDS_UD 0x0000 | ||
| 33 | #define TMR_UDS_EXTUD 0x0020 | ||
| 34 | |||
| 35 | /* bit6 Time output mode */ | ||
| 36 | #define TMR_OM_TOGGLE 0x0000 | ||
| 37 | #define TMR_OM_PILSE 0x0040 | ||
| 38 | |||
| 39 | /* bit 8..9 External input active edge selection */ | ||
| 40 | #define TMR_ES_PE 0x0000 | ||
| 41 | #define TMR_ES_NE 0x0100 | ||
| 42 | #define TMR_ES_BOTH 0x0200 | ||
| 43 | |||
| 44 | /* bit 10..11 Operating mode */ | ||
| 45 | #define TMR_M_FREE 0x0000 /* free running timer mode */ | ||
| 46 | #define TMR_M_PERIODIC 0x0400 /* periodic timer mode */ | ||
| 47 | #define TMR_M_FC 0x0800 /* free running counter mode */ | ||
| 48 | #define TMR_M_PC 0x0c00 /* periodic counter mode */ | ||
| 49 | |||
| 50 | #define SYSTEM_CLOCK (27*1000000/4) /* 27 MHz */ | ||
| 51 | #endif /* _ASM_SCORE_SCOREREGS_H */ | ||
diff --git a/arch/score/include/asm/sections.h b/arch/score/include/asm/sections.h new file mode 100644 index 000000000000..9441d23af005 --- /dev/null +++ b/arch/score/include/asm/sections.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SECTIONS_H | ||
| 2 | #define _ASM_SCORE_SECTIONS_H | ||
| 3 | |||
| 4 | #include <asm-generic/sections.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SECTIONS_H */ | ||
diff --git a/arch/score/include/asm/segment.h b/arch/score/include/asm/segment.h new file mode 100644 index 000000000000..e16cf6afb495 --- /dev/null +++ b/arch/score/include/asm/segment.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | #ifndef _ASM_SCORE_SEGMENT_H | ||
| 2 | #define _ASM_SCORE_SEGMENT_H | ||
| 3 | |||
| 4 | #ifndef __ASSEMBLY__ | ||
| 5 | |||
| 6 | typedef struct { | ||
| 7 | unsigned long seg; | ||
| 8 | } mm_segment_t; | ||
| 9 | |||
| 10 | #define KERNEL_DS ((mm_segment_t){0}) | ||
| 11 | #define USER_DS KERNEL_DS | ||
| 12 | |||
| 13 | # define get_ds() (KERNEL_DS) | ||
| 14 | # define get_fs() (current_thread_info()->addr_limit) | ||
| 15 | # define set_fs(x) \ | ||
| 16 | do { current_thread_info()->addr_limit = (x); } while (0) | ||
| 17 | |||
| 18 | # define segment_eq(a, b) ((a).seg == (b).seg) | ||
| 19 | |||
| 20 | # endif /* __ASSEMBLY__ */ | ||
| 21 | #endif /* _ASM_SCORE_SEGMENT_H */ | ||
diff --git a/arch/score/include/asm/sembuf.h b/arch/score/include/asm/sembuf.h new file mode 100644 index 000000000000..dae5e835ce9e --- /dev/null +++ b/arch/score/include/asm/sembuf.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SEMBUF_H | ||
| 2 | #define _ASM_SCORE_SEMBUF_H | ||
| 3 | |||
| 4 | #include <asm-generic/sembuf.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SEMBUF_H */ | ||
diff --git a/arch/score/include/asm/setup.h b/arch/score/include/asm/setup.h new file mode 100644 index 000000000000..3cb944dc68dc --- /dev/null +++ b/arch/score/include/asm/setup.h | |||
| @@ -0,0 +1,41 @@ | |||
| 1 | #ifndef _ASM_SCORE_SETUP_H | ||
| 2 | #define _ASM_SCORE_SETUP_H | ||
| 3 | |||
| 4 | #define COMMAND_LINE_SIZE 256 | ||
| 5 | #define MEMORY_START 0 | ||
| 6 | #define MEMORY_SIZE 0x2000000 | ||
| 7 | |||
| 8 | #ifdef __KERNEL__ | ||
| 9 | |||
| 10 | extern void pagetable_init(void); | ||
| 11 | extern void pgd_init(unsigned long page); | ||
| 12 | |||
| 13 | extern void setup_early_printk(void); | ||
| 14 | extern void cpu_cache_init(void); | ||
| 15 | extern void tlb_init(void); | ||
| 16 | |||
| 17 | extern void handle_nmi(void); | ||
| 18 | extern void handle_adelinsn(void); | ||
| 19 | extern void handle_adedata(void); | ||
| 20 | extern void handle_ibe(void); | ||
| 21 | extern void handle_pel(void); | ||
| 22 | extern void handle_sys(void); | ||
| 23 | extern void handle_ccu(void); | ||
| 24 | extern void handle_ri(void); | ||
| 25 | extern void handle_tr(void); | ||
| 26 | extern void handle_ades(void); | ||
| 27 | extern void handle_cee(void); | ||
| 28 | extern void handle_cpe(void); | ||
| 29 | extern void handle_dve(void); | ||
| 30 | extern void handle_dbe(void); | ||
| 31 | extern void handle_reserved(void); | ||
| 32 | extern void handle_tlb_refill(void); | ||
| 33 | extern void handle_tlb_invaild(void); | ||
| 34 | extern void handle_mod(void); | ||
| 35 | extern void debug_exception_vector(void); | ||
| 36 | extern void general_exception_vector(void); | ||
| 37 | extern void interrupt_exception_vector(void); | ||
| 38 | |||
| 39 | #endif /* __KERNEL__ */ | ||
| 40 | |||
| 41 | #endif /* _ASM_SCORE_SETUP_H */ | ||
diff --git a/arch/score/include/asm/shmbuf.h b/arch/score/include/asm/shmbuf.h new file mode 100644 index 000000000000..c85b2429ba21 --- /dev/null +++ b/arch/score/include/asm/shmbuf.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SHMBUF_H | ||
| 2 | #define _ASM_SCORE_SHMBUF_H | ||
| 3 | |||
| 4 | #include <asm-generic/shmbuf.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SHMBUF_H */ | ||
diff --git a/arch/score/include/asm/shmparam.h b/arch/score/include/asm/shmparam.h new file mode 100644 index 000000000000..1d60813141b6 --- /dev/null +++ b/arch/score/include/asm/shmparam.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SHMPARAM_H | ||
| 2 | #define _ASM_SCORE_SHMPARAM_H | ||
| 3 | |||
| 4 | #include <asm-generic/shmparam.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SHMPARAM_H */ | ||
diff --git a/arch/score/include/asm/sigcontext.h b/arch/score/include/asm/sigcontext.h new file mode 100644 index 000000000000..5ffda39ddb90 --- /dev/null +++ b/arch/score/include/asm/sigcontext.h | |||
| @@ -0,0 +1,22 @@ | |||
| 1 | #ifndef _ASM_SCORE_SIGCONTEXT_H | ||
| 2 | #define _ASM_SCORE_SIGCONTEXT_H | ||
| 3 | |||
| 4 | /* | ||
| 5 | * Keep this struct definition in sync with the sigcontext fragment | ||
| 6 | * in arch/score/tools/offset.c | ||
| 7 | */ | ||
| 8 | struct sigcontext { | ||
| 9 | unsigned int sc_regmask; | ||
| 10 | unsigned int sc_psr; | ||
| 11 | unsigned int sc_condition; | ||
| 12 | unsigned long sc_pc; | ||
| 13 | unsigned long sc_regs[32]; | ||
| 14 | unsigned int sc_ssflags; | ||
| 15 | unsigned int sc_mdceh; | ||
| 16 | unsigned int sc_mdcel; | ||
| 17 | unsigned int sc_ecr; | ||
| 18 | unsigned long sc_ema; | ||
| 19 | unsigned long sc_sigset[4]; | ||
| 20 | }; | ||
| 21 | |||
| 22 | #endif /* _ASM_SCORE_SIGCONTEXT_H */ | ||
diff --git a/arch/score/include/asm/siginfo.h b/arch/score/include/asm/siginfo.h new file mode 100644 index 000000000000..87ca35607a28 --- /dev/null +++ b/arch/score/include/asm/siginfo.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SIGINFO_H | ||
| 2 | #define _ASM_SCORE_SIGINFO_H | ||
| 3 | |||
| 4 | #include <asm-generic/siginfo.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SIGINFO_H */ | ||
diff --git a/arch/score/include/asm/signal.h b/arch/score/include/asm/signal.h new file mode 100644 index 000000000000..2605bc06b64f --- /dev/null +++ b/arch/score/include/asm/signal.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SIGNAL_H | ||
| 2 | #define _ASM_SCORE_SIGNAL_H | ||
| 3 | |||
| 4 | #include <asm-generic/signal.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SIGNAL_H */ | ||
diff --git a/arch/score/include/asm/socket.h b/arch/score/include/asm/socket.h new file mode 100644 index 000000000000..612a70e385ba --- /dev/null +++ b/arch/score/include/asm/socket.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SOCKET_H | ||
| 2 | #define _ASM_SCORE_SOCKET_H | ||
| 3 | |||
| 4 | #include <asm-generic/socket.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SOCKET_H */ | ||
diff --git a/arch/score/include/asm/sockios.h b/arch/score/include/asm/sockios.h new file mode 100644 index 000000000000..ba8256480189 --- /dev/null +++ b/arch/score/include/asm/sockios.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SOCKIOS_H | ||
| 2 | #define _ASM_SCORE_SOCKIOS_H | ||
| 3 | |||
| 4 | #include <asm-generic/sockios.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SOCKIOS_H */ | ||
diff --git a/arch/score/include/asm/stat.h b/arch/score/include/asm/stat.h new file mode 100644 index 000000000000..5037055500a2 --- /dev/null +++ b/arch/score/include/asm/stat.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_STAT_H | ||
| 2 | #define _ASM_SCORE_STAT_H | ||
| 3 | |||
| 4 | #include <asm-generic/stat.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_STAT_H */ | ||
diff --git a/arch/score/include/asm/statfs.h b/arch/score/include/asm/statfs.h new file mode 100644 index 000000000000..36e41004e996 --- /dev/null +++ b/arch/score/include/asm/statfs.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_STATFS_H | ||
| 2 | #define _ASM_SCORE_STATFS_H | ||
| 3 | |||
| 4 | #include <asm-generic/statfs.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_STATFS_H */ | ||
diff --git a/arch/score/include/asm/string.h b/arch/score/include/asm/string.h new file mode 100644 index 000000000000..8a6bf5063aa5 --- /dev/null +++ b/arch/score/include/asm/string.h | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | #ifndef _ASM_SCORE_STRING_H | ||
| 2 | #define _ASM_SCORE_STRING_H | ||
| 3 | |||
| 4 | extern void *memset(void *__s, int __c, size_t __count); | ||
| 5 | extern void *memcpy(void *__to, __const__ void *__from, size_t __n); | ||
| 6 | extern void *memmove(void *__dest, __const__ void *__src, size_t __n); | ||
| 7 | |||
| 8 | #endif /* _ASM_SCORE_STRING_H */ | ||
diff --git a/arch/score/include/asm/swab.h b/arch/score/include/asm/swab.h new file mode 100644 index 000000000000..fadc3cc6d8a2 --- /dev/null +++ b/arch/score/include/asm/swab.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_SWAB_H | ||
| 2 | #define _ASM_SCORE_SWAB_H | ||
| 3 | |||
| 4 | #include <asm-generic/swab.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_SWAB_H */ | ||
diff --git a/arch/score/include/asm/syscalls.h b/arch/score/include/asm/syscalls.h new file mode 100644 index 000000000000..1dd5e0d6b0c3 --- /dev/null +++ b/arch/score/include/asm/syscalls.h | |||
| @@ -0,0 +1,11 @@ | |||
| 1 | #ifndef _ASM_SCORE_SYSCALLS_H | ||
| 2 | #define _ASM_SCORE_SYSCALLS_H | ||
| 3 | |||
| 4 | asmlinkage long score_clone(struct pt_regs *regs); | ||
| 5 | asmlinkage long score_execve(struct pt_regs *regs); | ||
| 6 | asmlinkage long score_sigaltstack(struct pt_regs *regs); | ||
| 7 | asmlinkage long score_rt_sigreturn(struct pt_regs *regs); | ||
| 8 | |||
| 9 | #include <asm-generic/syscalls.h> | ||
| 10 | |||
| 11 | #endif /* _ASM_SCORE_SYSCALLS_H */ | ||
diff --git a/arch/score/include/asm/system.h b/arch/score/include/asm/system.h new file mode 100644 index 000000000000..589d5c7e171c --- /dev/null +++ b/arch/score/include/asm/system.h | |||
| @@ -0,0 +1,90 @@ | |||
| 1 | #ifndef _ASM_SCORE_SYSTEM_H | ||
| 2 | #define _ASM_SCORE_SYSTEM_H | ||
| 3 | |||
| 4 | #include <linux/types.h> | ||
| 5 | #include <linux/irqflags.h> | ||
| 6 | |||
| 7 | struct pt_regs; | ||
| 8 | struct task_struct; | ||
| 9 | |||
| 10 | extern void *resume(void *last, void *next, void *next_ti); | ||
| 11 | |||
| 12 | #define switch_to(prev, next, last) \ | ||
| 13 | do { \ | ||
| 14 | (last) = resume(prev, next, task_thread_info(next)); \ | ||
| 15 | } while (0) | ||
| 16 | |||
| 17 | #define finish_arch_switch(prev) do {} while (0) | ||
| 18 | |||
| 19 | typedef void (*vi_handler_t)(void); | ||
| 20 | extern unsigned long arch_align_stack(unsigned long sp); | ||
| 21 | |||
| 22 | #define mb() barrier() | ||
| 23 | #define rmb() barrier() | ||
| 24 | #define wmb() barrier() | ||
| 25 | #define smp_mb() barrier() | ||
| 26 | #define smp_rmb() barrier() | ||
| 27 | #define smp_wmb() barrier() | ||
| 28 | |||
| 29 | #define read_barrier_depends() do {} while (0) | ||
| 30 | #define smp_read_barrier_depends() do {} while (0) | ||
| 31 | |||
| 32 | #define set_mb(var, value) do {var = value; wmb(); } while (0) | ||
| 33 | |||
| 34 | #define __HAVE_ARCH_CMPXCHG 1 | ||
| 35 | |||
| 36 | #include <asm-generic/cmpxchg-local.h> | ||
| 37 | |||
| 38 | #ifndef __ASSEMBLY__ | ||
| 39 | |||
| 40 | struct __xchg_dummy { unsigned long a[100]; }; | ||
| 41 | #define __xg(x) ((struct __xchg_dummy *)(x)) | ||
| 42 | |||
| 43 | static inline | ||
| 44 | unsigned long __xchg(volatile unsigned long *m, unsigned long val) | ||
| 45 | { | ||
| 46 | unsigned long retval; | ||
| 47 | unsigned long flags; | ||
| 48 | |||
| 49 | local_irq_save(flags); | ||
| 50 | retval = *m; | ||
| 51 | *m = val; | ||
| 52 | local_irq_restore(flags); | ||
| 53 | return retval; | ||
| 54 | } | ||
| 55 | |||
| 56 | #define xchg(ptr, v) \ | ||
| 57 | ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr), \ | ||
| 58 | (unsigned long)(v))) | ||
| 59 | |||
| 60 | static inline unsigned long __cmpxchg(volatile unsigned long *m, | ||
| 61 | unsigned long old, unsigned long new) | ||
| 62 | { | ||
| 63 | unsigned long retval; | ||
| 64 | unsigned long flags; | ||
| 65 | |||
| 66 | local_irq_save(flags); | ||
| 67 | retval = *m; | ||
| 68 | if (retval == old) | ||
| 69 | *m = new; | ||
| 70 | local_irq_restore(flags); | ||
| 71 | return retval; | ||
| 72 | } | ||
| 73 | |||
| 74 | #define cmpxchg(ptr, o, n) \ | ||
| 75 | ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \ | ||
| 76 | (unsigned long)(o), \ | ||
| 77 | (unsigned long)(n))) | ||
| 78 | |||
| 79 | extern void __die(const char *, struct pt_regs *, const char *, | ||
| 80 | const char *, unsigned long) __attribute__((noreturn)); | ||
| 81 | extern void __die_if_kernel(const char *, struct pt_regs *, const char *, | ||
| 82 | const char *, unsigned long); | ||
| 83 | |||
| 84 | #define die(msg, regs) \ | ||
| 85 | __die(msg, regs, __FILE__ ":", __func__, __LINE__) | ||
| 86 | #define die_if_kernel(msg, regs) \ | ||
| 87 | __die_if_kernel(msg, regs, __FILE__ ":", __func__, __LINE__) | ||
| 88 | |||
| 89 | #endif /* !__ASSEMBLY__ */ | ||
| 90 | #endif /* _ASM_SCORE_SYSTEM_H */ | ||
diff --git a/arch/score/include/asm/termbits.h b/arch/score/include/asm/termbits.h new file mode 100644 index 000000000000..9a95c1412437 --- /dev/null +++ b/arch/score/include/asm/termbits.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_TERMBITS_H | ||
| 2 | #define _ASM_SCORE_TERMBITS_H | ||
| 3 | |||
| 4 | #include <asm-generic/termbits.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_TERMBITS_H */ | ||
diff --git a/arch/score/include/asm/termios.h b/arch/score/include/asm/termios.h new file mode 100644 index 000000000000..40984e811ad6 --- /dev/null +++ b/arch/score/include/asm/termios.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_TERMIOS_H | ||
| 2 | #define _ASM_SCORE_TERMIOS_H | ||
| 3 | |||
| 4 | #include <asm-generic/termios.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_TERMIOS_H */ | ||
diff --git a/arch/score/include/asm/thread_info.h b/arch/score/include/asm/thread_info.h new file mode 100644 index 000000000000..3a1122885528 --- /dev/null +++ b/arch/score/include/asm/thread_info.h | |||
| @@ -0,0 +1,105 @@ | |||
| 1 | #ifndef _ASM_SCORE_THREAD_INFO_H | ||
| 2 | #define _ASM_SCORE_THREAD_INFO_H | ||
| 3 | |||
| 4 | #ifdef __KERNEL__ | ||
| 5 | |||
| 6 | #define KU_MASK 0x08 | ||
| 7 | #define KU_USER 0x08 | ||
| 8 | #define KU_KERN 0x00 | ||
| 9 | |||
| 10 | #ifndef __ASSEMBLY__ | ||
| 11 | |||
| 12 | #include <asm/processor.h> | ||
| 13 | |||
| 14 | /* | ||
| 15 | * low level task data that entry.S needs immediate access to | ||
| 16 | * - this struct should fit entirely inside of one cache line | ||
| 17 | * - this struct shares the supervisor stack pages | ||
| 18 | * - if the contents of this structure are changed, the assembly constants | ||
| 19 | * must also be changed | ||
| 20 | */ | ||
| 21 | struct thread_info { | ||
| 22 | struct task_struct *task; /* main task structure */ | ||
| 23 | struct exec_domain *exec_domain; /* execution domain */ | ||
| 24 | unsigned long flags; /* low level flags */ | ||
| 25 | unsigned long tp_value; /* thread pointer */ | ||
| 26 | __u32 cpu; /* current CPU */ | ||
| 27 | |||
| 28 | /* 0 => preemptable, < 0 => BUG */ | ||
| 29 | int preempt_count; | ||
| 30 | |||
| 31 | /* | ||
| 32 | * thread address space: | ||
| 33 | * 0-0xBFFFFFFF for user-thead | ||
| 34 | * 0-0xFFFFFFFF for kernel-thread | ||
| 35 | */ | ||
| 36 | mm_segment_t addr_limit; | ||
| 37 | struct restart_block restart_block; | ||
| 38 | struct pt_regs *regs; | ||
| 39 | }; | ||
| 40 | |||
| 41 | /* | ||
| 42 | * macros/functions for gaining access to the thread information structure | ||
| 43 | * | ||
| 44 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
| 45 | */ | ||
| 46 | #define INIT_THREAD_INFO(tsk) \ | ||
| 47 | { \ | ||
| 48 | .task = &tsk, \ | ||
| 49 | .exec_domain = &default_exec_domain, \ | ||
| 50 | .cpu = 0, \ | ||
| 51 | .preempt_count = 1, \ | ||
| 52 | .addr_limit = KERNEL_DS, \ | ||
| 53 | .restart_block = { \ | ||
| 54 | .fn = do_no_restart_syscall, \ | ||
| 55 | }, \ | ||
| 56 | } | ||
| 57 | |||
| 58 | #define init_thread_info (init_thread_union.thread_info) | ||
| 59 | #define init_stack (init_thread_union.stack) | ||
| 60 | |||
| 61 | /* How to get the thread information struct from C. */ | ||
| 62 | register struct thread_info *__current_thread_info __asm__("r28"); | ||
| 63 | #define current_thread_info() __current_thread_info | ||
| 64 | |||
| 65 | /* thread information allocation */ | ||
| 66 | #define THREAD_SIZE_ORDER (1) | ||
| 67 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) | ||
| 68 | #define THREAD_MASK (THREAD_SIZE - 1UL) | ||
| 69 | #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR | ||
| 70 | |||
| 71 | #define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) | ||
| 72 | #define free_thread_info(info) kfree(info) | ||
| 73 | |||
| 74 | #endif /* !__ASSEMBLY__ */ | ||
| 75 | |||
| 76 | #define PREEMPT_ACTIVE 0x10000000 | ||
| 77 | |||
| 78 | /* | ||
| 79 | * thread information flags | ||
| 80 | * - these are process state flags that various assembly files may need to | ||
| 81 | * access | ||
| 82 | * - pending work-to-be-done flags are in LSW | ||
| 83 | * - other flags in MSW | ||
| 84 | */ | ||
| 85 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
| 86 | #define TIF_SIGPENDING 1 /* signal pending */ | ||
| 87 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | ||
| 88 | #define TIF_NOTIFY_RESUME 5 /* callback before returning to user */ | ||
| 89 | #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ | ||
| 90 | #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling | ||
| 91 | TIF_NEED_RESCHED */ | ||
| 92 | #define TIF_MEMDIE 18 | ||
| 93 | |||
| 94 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | ||
| 95 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | ||
| 96 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | ||
| 97 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) | ||
| 98 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | ||
| 99 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | ||
| 100 | |||
| 101 | #define _TIF_WORK_MASK (0x0000ffff) | ||
| 102 | |||
| 103 | #endif /* __KERNEL__ */ | ||
| 104 | |||
| 105 | #endif /* _ASM_SCORE_THREAD_INFO_H */ | ||
diff --git a/arch/score/include/asm/timex.h b/arch/score/include/asm/timex.h new file mode 100644 index 000000000000..a524ae0c5e7b --- /dev/null +++ b/arch/score/include/asm/timex.h | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | #ifndef _ASM_SCORE_TIMEX_H | ||
| 2 | #define _ASM_SCORE_TIMEX_H | ||
| 3 | |||
| 4 | #define CLOCK_TICK_RATE 27000000 /* Timer input freq. */ | ||
| 5 | |||
| 6 | #include <asm-generic/timex.h> | ||
| 7 | |||
| 8 | #endif /* _ASM_SCORE_TIMEX_H */ | ||
diff --git a/arch/score/include/asm/tlb.h b/arch/score/include/asm/tlb.h new file mode 100644 index 000000000000..46882ed524e6 --- /dev/null +++ b/arch/score/include/asm/tlb.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | #ifndef _ASM_SCORE_TLB_H | ||
| 2 | #define _ASM_SCORE_TLB_H | ||
| 3 | |||
| 4 | /* | ||
| 5 | * SCORE doesn't need any special per-pte or per-vma handling, except | ||
| 6 | * we need to flush cache for area to be unmapped. | ||
| 7 | */ | ||
| 8 | #define tlb_start_vma(tlb, vma) do {} while (0) | ||
| 9 | #define tlb_end_vma(tlb, vma) do {} while (0) | ||
| 10 | #define __tlb_remove_tlb_entry(tlb, ptep, address) do {} while (0) | ||
| 11 | #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) | ||
| 12 | |||
| 13 | extern void score7_FTLB_refill_Handler(void); | ||
| 14 | |||
| 15 | #include <asm-generic/tlb.h> | ||
| 16 | |||
| 17 | #endif /* _ASM_SCORE_TLB_H */ | ||
diff --git a/arch/score/include/asm/tlbflush.h b/arch/score/include/asm/tlbflush.h new file mode 100644 index 000000000000..9cce978367d5 --- /dev/null +++ b/arch/score/include/asm/tlbflush.h | |||
| @@ -0,0 +1,142 @@ | |||
| 1 | #ifndef _ASM_SCORE_TLBFLUSH_H | ||
| 2 | #define _ASM_SCORE_TLBFLUSH_H | ||
| 3 | |||
| 4 | #include <linux/mm.h> | ||
| 5 | |||
| 6 | /* | ||
| 7 | * TLB flushing: | ||
| 8 | * | ||
| 9 | * - flush_tlb_all() flushes all processes TLB entries | ||
| 10 | * - flush_tlb_mm(mm) flushes the specified mm context TLB entries | ||
| 11 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
| 12 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
| 13 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
| 14 | */ | ||
| 15 | extern void local_flush_tlb_all(void); | ||
| 16 | extern void local_flush_tlb_mm(struct mm_struct *mm); | ||
| 17 | extern void local_flush_tlb_range(struct vm_area_struct *vma, | ||
| 18 | unsigned long start, unsigned long end); | ||
| 19 | extern void local_flush_tlb_kernel_range(unsigned long start, | ||
| 20 | unsigned long end); | ||
| 21 | extern void local_flush_tlb_page(struct vm_area_struct *vma, | ||
| 22 | unsigned long page); | ||
| 23 | extern void local_flush_tlb_one(unsigned long vaddr); | ||
| 24 | |||
| 25 | #define flush_tlb_all() local_flush_tlb_all() | ||
| 26 | #define flush_tlb_mm(mm) local_flush_tlb_mm(mm) | ||
| 27 | #define flush_tlb_range(vma, vmaddr, end) \ | ||
| 28 | local_flush_tlb_range(vma, vmaddr, end) | ||
| 29 | #define flush_tlb_kernel_range(vmaddr, end) \ | ||
| 30 | local_flush_tlb_kernel_range(vmaddr, end) | ||
| 31 | #define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page) | ||
| 32 | #define flush_tlb_one(vaddr) local_flush_tlb_one(vaddr) | ||
| 33 | |||
| 34 | #ifndef __ASSEMBLY__ | ||
| 35 | |||
| 36 | static inline unsigned long pevn_get(void) | ||
| 37 | { | ||
| 38 | unsigned long val; | ||
| 39 | |||
| 40 | __asm__ __volatile__( | ||
| 41 | "mfcr %0, cr11\n" | ||
| 42 | "nop\nnop\n" | ||
| 43 | : "=r" (val)); | ||
| 44 | |||
| 45 | return val; | ||
| 46 | } | ||
| 47 | |||
| 48 | static inline void pevn_set(unsigned long val) | ||
| 49 | { | ||
| 50 | __asm__ __volatile__( | ||
| 51 | "mtcr %0, cr11\n" | ||
| 52 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 53 | : : "r" (val)); | ||
| 54 | } | ||
| 55 | |||
| 56 | static inline void pectx_set(unsigned long val) | ||
| 57 | { | ||
| 58 | __asm__ __volatile__( | ||
| 59 | "mtcr %0, cr12\n" | ||
| 60 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 61 | : : "r" (val)); | ||
| 62 | } | ||
| 63 | |||
| 64 | static inline unsigned long pectx_get(void) | ||
| 65 | { | ||
| 66 | unsigned long val; | ||
| 67 | __asm__ __volatile__( | ||
| 68 | "mfcr %0, cr12\n" | ||
| 69 | "nop\nnop\n" | ||
| 70 | : "=r" (val)); | ||
| 71 | return val; | ||
| 72 | } | ||
| 73 | static inline unsigned long tlblock_get(void) | ||
| 74 | { | ||
| 75 | unsigned long val; | ||
| 76 | |||
| 77 | __asm__ __volatile__( | ||
| 78 | "mfcr %0, cr7\n" | ||
| 79 | "nop\nnop\n" | ||
| 80 | : "=r" (val)); | ||
| 81 | return val; | ||
| 82 | } | ||
| 83 | static inline void tlblock_set(unsigned long val) | ||
| 84 | { | ||
| 85 | __asm__ __volatile__( | ||
| 86 | "mtcr %0, cr7\n" | ||
| 87 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 88 | : : "r" (val)); | ||
| 89 | } | ||
| 90 | |||
| 91 | static inline void tlbpt_set(unsigned long val) | ||
| 92 | { | ||
| 93 | __asm__ __volatile__( | ||
| 94 | "mtcr %0, cr8\n" | ||
| 95 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 96 | : : "r" (val)); | ||
| 97 | } | ||
| 98 | |||
| 99 | static inline long tlbpt_get(void) | ||
| 100 | { | ||
| 101 | long val; | ||
| 102 | |||
| 103 | __asm__ __volatile__( | ||
| 104 | "mfcr %0, cr8\n" | ||
| 105 | "nop\nnop\n" | ||
| 106 | : "=r" (val)); | ||
| 107 | |||
| 108 | return val; | ||
| 109 | } | ||
| 110 | |||
| 111 | static inline void peaddr_set(unsigned long val) | ||
| 112 | { | ||
| 113 | __asm__ __volatile__( | ||
| 114 | "mtcr %0, cr9\n" | ||
| 115 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 116 | : : "r" (val)); | ||
| 117 | } | ||
| 118 | |||
| 119 | /* TLB operations. */ | ||
| 120 | static inline void tlb_probe(void) | ||
| 121 | { | ||
| 122 | __asm__ __volatile__("stlb;nop;nop;nop;nop;nop"); | ||
| 123 | } | ||
| 124 | |||
| 125 | static inline void tlb_read(void) | ||
| 126 | { | ||
| 127 | __asm__ __volatile__("mftlb;nop;nop;nop;nop;nop"); | ||
| 128 | } | ||
| 129 | |||
| 130 | static inline void tlb_write_indexed(void) | ||
| 131 | { | ||
| 132 | __asm__ __volatile__("mtptlb;nop;nop;nop;nop;nop"); | ||
| 133 | } | ||
| 134 | |||
| 135 | static inline void tlb_write_random(void) | ||
| 136 | { | ||
| 137 | __asm__ __volatile__("mtrtlb;nop;nop;nop;nop;nop"); | ||
| 138 | } | ||
| 139 | |||
| 140 | #endif /* Not __ASSEMBLY__ */ | ||
| 141 | |||
| 142 | #endif /* _ASM_SCORE_TLBFLUSH_H */ | ||
diff --git a/arch/score/include/asm/topology.h b/arch/score/include/asm/topology.h new file mode 100644 index 000000000000..425fba381f88 --- /dev/null +++ b/arch/score/include/asm/topology.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_TOPOLOGY_H | ||
| 2 | #define _ASM_SCORE_TOPOLOGY_H | ||
| 3 | |||
| 4 | #include <asm-generic/topology.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_TOPOLOGY_H */ | ||
diff --git a/arch/score/include/asm/types.h b/arch/score/include/asm/types.h new file mode 100644 index 000000000000..2140032778ee --- /dev/null +++ b/arch/score/include/asm/types.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_TYPES_H | ||
| 2 | #define _ASM_SCORE_TYPES_H | ||
| 3 | |||
| 4 | #include <asm-generic/types.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_TYPES_H */ | ||
diff --git a/arch/score/include/asm/uaccess.h b/arch/score/include/asm/uaccess.h new file mode 100644 index 000000000000..ab66ddde777b --- /dev/null +++ b/arch/score/include/asm/uaccess.h | |||
| @@ -0,0 +1,424 @@ | |||
| 1 | #ifndef __SCORE_UACCESS_H | ||
| 2 | #define __SCORE_UACCESS_H | ||
| 3 | |||
| 4 | #include <linux/kernel.h> | ||
| 5 | #include <linux/errno.h> | ||
| 6 | #include <linux/thread_info.h> | ||
| 7 | |||
| 8 | #define VERIFY_READ 0 | ||
| 9 | #define VERIFY_WRITE 1 | ||
| 10 | |||
| 11 | #define get_ds() (KERNEL_DS) | ||
| 12 | #define get_fs() (current_thread_info()->addr_limit) | ||
| 13 | #define segment_eq(a, b) ((a).seg == (b).seg) | ||
| 14 | |||
| 15 | /* | ||
| 16 | * Is a address valid? This does a straighforward calculation rather | ||
| 17 | * than tests. | ||
| 18 | * | ||
| 19 | * Address valid if: | ||
| 20 | * - "addr" doesn't have any high-bits set | ||
| 21 | * - AND "size" doesn't have any high-bits set | ||
| 22 | * - AND "addr+size" doesn't have any high-bits set | ||
| 23 | * - OR we are in kernel mode. | ||
| 24 | * | ||
| 25 | * __ua_size() is a trick to avoid runtime checking of positive constant | ||
| 26 | * sizes; for those we already know at compile time that the size is ok. | ||
| 27 | */ | ||
| 28 | #define __ua_size(size) \ | ||
| 29 | ((__builtin_constant_p(size) && (signed long) (size) > 0) ? 0 : (size)) | ||
| 30 | |||
| 31 | /* | ||
| 32 | * access_ok: - Checks if a user space pointer is valid | ||
| 33 | * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that | ||
| 34 | * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe | ||
| 35 | * to write to a block, it is always safe to read from it. | ||
| 36 | * @addr: User space pointer to start of block to check | ||
| 37 | * @size: Size of block to check | ||
| 38 | * | ||
| 39 | * Context: User context only. This function may sleep. | ||
| 40 | * | ||
| 41 | * Checks if a pointer to a block of memory in user space is valid. | ||
| 42 | * | ||
| 43 | * Returns true (nonzero) if the memory block may be valid, false (zero) | ||
| 44 | * if it is definitely invalid. | ||
| 45 | * | ||
| 46 | * Note that, depending on architecture, this function probably just | ||
| 47 | * checks that the pointer is in the user space range - after calling | ||
| 48 | * this function, memory access functions may still return -EFAULT. | ||
| 49 | */ | ||
| 50 | |||
| 51 | #define __access_ok(addr, size) \ | ||
| 52 | (((long)((get_fs().seg) & \ | ||
| 53 | ((addr) | ((addr) + (size)) | \ | ||
| 54 | __ua_size(size)))) == 0) | ||
| 55 | |||
| 56 | #define access_ok(type, addr, size) \ | ||
| 57 | likely(__access_ok((unsigned long)(addr), (size))) | ||
| 58 | |||
| 59 | /* | ||
| 60 | * put_user: - Write a simple value into user space. | ||
| 61 | * @x: Value to copy to user space. | ||
| 62 | * @ptr: Destination address, in user space. | ||
| 63 | * | ||
| 64 | * Context: User context only. This function may sleep. | ||
| 65 | * | ||
| 66 | * This macro copies a single simple value from kernel space to user | ||
| 67 | * space. It supports simple types like char and int, but not larger | ||
| 68 | * data types like structures or arrays. | ||
| 69 | * | ||
| 70 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
| 71 | * to the result of dereferencing @ptr. | ||
| 72 | * | ||
| 73 | * Returns zero on success, or -EFAULT on error. | ||
| 74 | */ | ||
| 75 | #define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) | ||
| 76 | |||
| 77 | /* | ||
| 78 | * get_user: - Get a simple variable from user space. | ||
| 79 | * @x: Variable to store result. | ||
| 80 | * @ptr: Source address, in user space. | ||
| 81 | * | ||
| 82 | * Context: User context only. This function may sleep. | ||
| 83 | * | ||
| 84 | * This macro copies a single simple variable from user space to kernel | ||
| 85 | * space. It supports simple types like char and int, but not larger | ||
| 86 | * data types like structures or arrays. | ||
| 87 | * | ||
| 88 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
| 89 | * dereferencing @ptr must be assignable to @x without a cast. | ||
| 90 | * | ||
| 91 | * Returns zero on success, or -EFAULT on error. | ||
| 92 | * On error, the variable @x is set to zero. | ||
| 93 | */ | ||
| 94 | #define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) | ||
| 95 | |||
| 96 | /* | ||
| 97 | * __put_user: - Write a simple value into user space, with less checking. | ||
| 98 | * @x: Value to copy to user space. | ||
| 99 | * @ptr: Destination address, in user space. | ||
| 100 | * | ||
| 101 | * Context: User context only. This function may sleep. | ||
| 102 | * | ||
| 103 | * This macro copies a single simple value from kernel space to user | ||
| 104 | * space. It supports simple types like char and int, but not larger | ||
| 105 | * data types like structures or arrays. | ||
| 106 | * | ||
| 107 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
| 108 | * to the result of dereferencing @ptr. | ||
| 109 | * | ||
| 110 | * Caller must check the pointer with access_ok() before calling this | ||
| 111 | * function. | ||
| 112 | * | ||
| 113 | * Returns zero on success, or -EFAULT on error. | ||
| 114 | */ | ||
| 115 | #define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
| 116 | |||
| 117 | /* | ||
| 118 | * __get_user: - Get a simple variable from user space, with less checking. | ||
| 119 | * @x: Variable to store result. | ||
| 120 | * @ptr: Source address, in user space. | ||
| 121 | * | ||
| 122 | * Context: User context only. This function may sleep. | ||
| 123 | * | ||
| 124 | * This macro copies a single simple variable from user space to kernel | ||
| 125 | * space. It supports simple types like char and int, but not larger | ||
| 126 | * data types like structures or arrays. | ||
| 127 | * | ||
| 128 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
| 129 | * dereferencing @ptr must be assignable to @x without a cast. | ||
| 130 | * | ||
| 131 | * Caller must check the pointer with access_ok() before calling this | ||
| 132 | * function. | ||
| 133 | * | ||
| 134 | * Returns zero on success, or -EFAULT on error. | ||
| 135 | * On error, the variable @x is set to zero. | ||
| 136 | */ | ||
| 137 | #define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
| 138 | |||
| 139 | struct __large_struct { unsigned long buf[100]; }; | ||
| 140 | #define __m(x) (*(struct __large_struct __user *)(x)) | ||
| 141 | |||
| 142 | /* | ||
| 143 | * Yuck. We need two variants, one for 64bit operation and one | ||
| 144 | * for 32 bit mode and old iron. | ||
| 145 | */ | ||
| 146 | extern void __get_user_unknown(void); | ||
| 147 | |||
| 148 | #define __get_user_common(val, size, ptr) \ | ||
| 149 | do { \ | ||
| 150 | switch (size) { \ | ||
| 151 | case 1: \ | ||
| 152 | __get_user_asm(val, "lb", ptr); \ | ||
| 153 | break; \ | ||
| 154 | case 2: \ | ||
| 155 | __get_user_asm(val, "lh", ptr); \ | ||
| 156 | break; \ | ||
| 157 | case 4: \ | ||
| 158 | __get_user_asm(val, "lw", ptr); \ | ||
| 159 | break; \ | ||
| 160 | case 8: \ | ||
| 161 | if ((copy_from_user((void *)&val, ptr, 8)) == 0) \ | ||
| 162 | __gu_err = 0; \ | ||
| 163 | else \ | ||
| 164 | __gu_err = -EFAULT; \ | ||
| 165 | break; \ | ||
| 166 | default: \ | ||
| 167 | __get_user_unknown(); \ | ||
| 168 | break; \ | ||
| 169 | } \ | ||
| 170 | } while (0) | ||
| 171 | |||
| 172 | #define __get_user_nocheck(x, ptr, size) \ | ||
| 173 | ({ \ | ||
| 174 | long __gu_err = 0; \ | ||
| 175 | __get_user_common((x), size, ptr); \ | ||
| 176 | __gu_err; \ | ||
| 177 | }) | ||
| 178 | |||
| 179 | #define __get_user_check(x, ptr, size) \ | ||
| 180 | ({ \ | ||
| 181 | long __gu_err = -EFAULT; \ | ||
| 182 | const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ | ||
| 183 | \ | ||
| 184 | if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ | ||
| 185 | __get_user_common((x), size, __gu_ptr); \ | ||
| 186 | \ | ||
| 187 | __gu_err; \ | ||
| 188 | }) | ||
| 189 | |||
| 190 | #define __get_user_asm(val, insn, addr) \ | ||
| 191 | { \ | ||
| 192 | long __gu_tmp; \ | ||
| 193 | \ | ||
| 194 | __asm__ __volatile__( \ | ||
| 195 | "1:" insn " %1, %3\n" \ | ||
| 196 | "2:\n" \ | ||
| 197 | ".section .fixup,\"ax\"\n" \ | ||
| 198 | "3:li %0, %4\n" \ | ||
| 199 | "j 2b\n" \ | ||
| 200 | ".previous\n" \ | ||
| 201 | ".section __ex_table,\"a\"\n" \ | ||
| 202 | ".word 1b, 3b\n" \ | ||
| 203 | ".previous\n" \ | ||
| 204 | : "=r" (__gu_err), "=r" (__gu_tmp) \ | ||
| 205 | : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \ | ||
| 206 | \ | ||
| 207 | (val) = (__typeof__(*(addr))) __gu_tmp; \ | ||
| 208 | } | ||
| 209 | |||
| 210 | /* | ||
| 211 | * Yuck. We need two variants, one for 64bit operation and one | ||
| 212 | * for 32 bit mode and old iron. | ||
| 213 | */ | ||
| 214 | #define __put_user_nocheck(val, ptr, size) \ | ||
| 215 | ({ \ | ||
| 216 | __typeof__(*(ptr)) __pu_val; \ | ||
| 217 | long __pu_err = 0; \ | ||
| 218 | \ | ||
| 219 | __pu_val = (val); \ | ||
| 220 | switch (size) { \ | ||
| 221 | case 1: \ | ||
| 222 | __put_user_asm("sb", ptr); \ | ||
| 223 | break; \ | ||
| 224 | case 2: \ | ||
| 225 | __put_user_asm("sh", ptr); \ | ||
| 226 | break; \ | ||
| 227 | case 4: \ | ||
| 228 | __put_user_asm("sw", ptr); \ | ||
| 229 | break; \ | ||
| 230 | case 8: \ | ||
| 231 | if ((__copy_to_user((void *)ptr, &__pu_val, 8)) == 0) \ | ||
| 232 | __pu_err = 0; \ | ||
| 233 | else \ | ||
| 234 | __pu_err = -EFAULT; \ | ||
| 235 | break; \ | ||
| 236 | default: \ | ||
| 237 | __put_user_unknown(); \ | ||
| 238 | break; \ | ||
| 239 | } \ | ||
| 240 | __pu_err; \ | ||
| 241 | }) | ||
| 242 | |||
| 243 | |||
| 244 | #define __put_user_check(val, ptr, size) \ | ||
| 245 | ({ \ | ||
| 246 | __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ | ||
| 247 | __typeof__(*(ptr)) __pu_val = (val); \ | ||
| 248 | long __pu_err = -EFAULT; \ | ||
| 249 | \ | ||
| 250 | if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \ | ||
| 251 | switch (size) { \ | ||
| 252 | case 1: \ | ||
| 253 | __put_user_asm("sb", __pu_addr); \ | ||
| 254 | break; \ | ||
| 255 | case 2: \ | ||
| 256 | __put_user_asm("sh", __pu_addr); \ | ||
| 257 | break; \ | ||
| 258 | case 4: \ | ||
| 259 | __put_user_asm("sw", __pu_addr); \ | ||
| 260 | break; \ | ||
| 261 | case 8: \ | ||
| 262 | if ((__copy_to_user((void *)__pu_addr, &__pu_val, 8)) == 0)\ | ||
| 263 | __pu_err = 0; \ | ||
| 264 | else \ | ||
| 265 | __pu_err = -EFAULT; \ | ||
| 266 | break; \ | ||
| 267 | default: \ | ||
| 268 | __put_user_unknown(); \ | ||
| 269 | break; \ | ||
| 270 | } \ | ||
| 271 | } \ | ||
| 272 | __pu_err; \ | ||
| 273 | }) | ||
| 274 | |||
| 275 | #define __put_user_asm(insn, ptr) \ | ||
| 276 | __asm__ __volatile__( \ | ||
| 277 | "1:" insn " %2, %3\n" \ | ||
| 278 | "2:\n" \ | ||
| 279 | ".section .fixup,\"ax\"\n" \ | ||
| 280 | "3:li %0, %4\n" \ | ||
| 281 | "j 2b\n" \ | ||
| 282 | ".previous\n" \ | ||
| 283 | ".section __ex_table,\"a\"\n" \ | ||
| 284 | ".word 1b, 3b\n" \ | ||
| 285 | ".previous\n" \ | ||
| 286 | : "=r" (__pu_err) \ | ||
| 287 | : "0" (0), "r" (__pu_val), "o" (__m(ptr)), \ | ||
| 288 | "i" (-EFAULT)); | ||
| 289 | |||
| 290 | extern void __put_user_unknown(void); | ||
| 291 | extern int __copy_tofrom_user(void *to, const void *from, unsigned long len); | ||
| 292 | |||
| 293 | static inline unsigned long | ||
| 294 | copy_from_user(void *to, const void *from, unsigned long len) | ||
| 295 | { | ||
| 296 | unsigned long over; | ||
| 297 | |||
| 298 | if (access_ok(VERIFY_READ, from, len)) | ||
| 299 | return __copy_tofrom_user(to, from, len); | ||
| 300 | |||
| 301 | if ((unsigned long)from < TASK_SIZE) { | ||
| 302 | over = (unsigned long)from + len - TASK_SIZE; | ||
| 303 | return __copy_tofrom_user(to, from, len - over) + over; | ||
| 304 | } | ||
| 305 | return len; | ||
| 306 | } | ||
| 307 | |||
| 308 | static inline unsigned long | ||
| 309 | copy_to_user(void *to, const void *from, unsigned long len) | ||
| 310 | { | ||
| 311 | unsigned long over; | ||
| 312 | |||
| 313 | if (access_ok(VERIFY_WRITE, to, len)) | ||
| 314 | return __copy_tofrom_user(to, from, len); | ||
| 315 | |||
| 316 | if ((unsigned long)to < TASK_SIZE) { | ||
| 317 | over = (unsigned long)to + len - TASK_SIZE; | ||
| 318 | return __copy_tofrom_user(to, from, len - over) + over; | ||
| 319 | } | ||
| 320 | return len; | ||
| 321 | } | ||
| 322 | |||
| 323 | #define __copy_from_user(to, from, len) \ | ||
| 324 | __copy_tofrom_user((to), (from), (len)) | ||
| 325 | |||
| 326 | #define __copy_to_user(to, from, len) \ | ||
| 327 | __copy_tofrom_user((to), (from), (len)) | ||
| 328 | |||
| 329 | static inline unsigned long | ||
| 330 | __copy_to_user_inatomic(void *to, const void *from, unsigned long len) | ||
| 331 | { | ||
| 332 | return __copy_to_user(to, from, len); | ||
| 333 | } | ||
| 334 | |||
| 335 | static inline unsigned long | ||
| 336 | __copy_from_user_inatomic(void *to, const void *from, unsigned long len) | ||
| 337 | { | ||
| 338 | return __copy_from_user(to, from, len); | ||
| 339 | } | ||
| 340 | |||
| 341 | #define __copy_in_user(to, from, len) __copy_from_user(to, from, len) | ||
| 342 | |||
| 343 | static inline unsigned long | ||
| 344 | copy_in_user(void *to, const void *from, unsigned long len) | ||
| 345 | { | ||
| 346 | if (access_ok(VERIFY_READ, from, len) && | ||
| 347 | access_ok(VERFITY_WRITE, to, len)) | ||
| 348 | return copy_from_user(to, from, len); | ||
| 349 | } | ||
| 350 | |||
| 351 | /* | ||
| 352 | * __clear_user: - Zero a block of memory in user space, with less checking. | ||
| 353 | * @to: Destination address, in user space. | ||
| 354 | * @n: Number of bytes to zero. | ||
| 355 | * | ||
| 356 | * Zero a block of memory in user space. Caller must check | ||
| 357 | * the specified block with access_ok() before calling this function. | ||
| 358 | * | ||
| 359 | * Returns number of bytes that could not be cleared. | ||
| 360 | * On success, this will be zero. | ||
| 361 | */ | ||
| 362 | extern unsigned long __clear_user(void __user *src, unsigned long size); | ||
| 363 | |||
| 364 | static inline unsigned long clear_user(char *src, unsigned long size) | ||
| 365 | { | ||
| 366 | if (access_ok(VERIFY_WRITE, src, size)) | ||
| 367 | return __clear_user(src, size); | ||
| 368 | |||
| 369 | return -EFAULT; | ||
| 370 | } | ||
| 371 | /* | ||
| 372 | * __strncpy_from_user: - Copy a NUL terminated string from userspace, with less checking. | ||
| 373 | * @dst: Destination address, in kernel space. This buffer must be at | ||
| 374 | * least @count bytes long. | ||
| 375 | * @src: Source address, in user space. | ||
| 376 | * @count: Maximum number of bytes to copy, including the trailing NUL. | ||
| 377 | * | ||
| 378 | * Copies a NUL-terminated string from userspace to kernel space. | ||
| 379 | * Caller must check the specified block with access_ok() before calling | ||
| 380 | * this function. | ||
| 381 | * | ||
| 382 | * On success, returns the length of the string (not including the trailing | ||
| 383 | * NUL). | ||
| 384 | * | ||
| 385 | * If access to userspace fails, returns -EFAULT (some data may have been | ||
| 386 | * copied). | ||
| 387 | * | ||
| 388 | * If @count is smaller than the length of the string, copies @count bytes | ||
| 389 | * and returns @count. | ||
| 390 | */ | ||
| 391 | extern int __strncpy_from_user(char *dst, const char *src, long len); | ||
| 392 | |||
| 393 | static inline int strncpy_from_user(char *dst, const char *src, long len) | ||
| 394 | { | ||
| 395 | if (access_ok(VERIFY_READ, src, 1)) | ||
| 396 | return __strncpy_from_user(dst, src, len); | ||
| 397 | |||
| 398 | return -EFAULT; | ||
| 399 | } | ||
| 400 | |||
| 401 | extern int __strlen_user(const char *src); | ||
| 402 | static inline long strlen_user(const char __user *src) | ||
| 403 | { | ||
| 404 | return __strlen_user(src); | ||
| 405 | } | ||
| 406 | |||
| 407 | extern int __strnlen_user(const char *str, long len); | ||
| 408 | static inline long strnlen_user(const char __user *str, long len) | ||
| 409 | { | ||
| 410 | if (!access_ok(VERIFY_READ, str, 0)) | ||
| 411 | return 0; | ||
| 412 | else | ||
| 413 | return __strnlen_user(str, len); | ||
| 414 | } | ||
| 415 | |||
| 416 | struct exception_table_entry { | ||
| 417 | unsigned long insn; | ||
| 418 | unsigned long fixup; | ||
| 419 | }; | ||
| 420 | |||
| 421 | extern int fixup_exception(struct pt_regs *regs); | ||
| 422 | |||
| 423 | #endif /* __SCORE_UACCESS_H */ | ||
| 424 | |||
diff --git a/arch/score/include/asm/ucontext.h b/arch/score/include/asm/ucontext.h new file mode 100644 index 000000000000..9bc07b9f30fb --- /dev/null +++ b/arch/score/include/asm/ucontext.h | |||
| @@ -0,0 +1 @@ | |||
| #include <asm-generic/ucontext.h> | |||
diff --git a/arch/score/include/asm/unaligned.h b/arch/score/include/asm/unaligned.h new file mode 100644 index 000000000000..2fc06de51c62 --- /dev/null +++ b/arch/score/include/asm/unaligned.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef _ASM_SCORE_UNALIGNED_H | ||
| 2 | #define _ASM_SCORE_UNALIGNED_H | ||
| 3 | |||
| 4 | #include <asm-generic/unaligned.h> | ||
| 5 | |||
| 6 | #endif /* _ASM_SCORE_UNALIGNED_H */ | ||
diff --git a/arch/score/include/asm/unistd.h b/arch/score/include/asm/unistd.h new file mode 100644 index 000000000000..4aa957364d4d --- /dev/null +++ b/arch/score/include/asm/unistd.h | |||
| @@ -0,0 +1,13 @@ | |||
| 1 | #if !defined(_ASM_SCORE_UNISTD_H) || defined(__SYSCALL) | ||
| 2 | #define _ASM_SCORE_UNISTD_H | ||
| 3 | |||
| 4 | #define __ARCH_HAVE_MMU | ||
| 5 | |||
| 6 | #define __ARCH_WANT_SYSCALL_NO_AT | ||
| 7 | #define __ARCH_WANT_SYSCALL_NO_FLAGS | ||
| 8 | #define __ARCH_WANT_SYSCALL_OFF_T | ||
| 9 | #define __ARCH_WANT_SYSCALL_DEPRECATED | ||
| 10 | |||
| 11 | #include <asm-generic/unistd.h> | ||
| 12 | |||
| 13 | #endif /* _ASM_SCORE_UNISTD_H */ | ||
diff --git a/arch/score/include/asm/user.h b/arch/score/include/asm/user.h new file mode 100644 index 000000000000..7bfb8e2c8054 --- /dev/null +++ b/arch/score/include/asm/user.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | #ifndef _ASM_SCORE_USER_H | ||
| 2 | #define _ASM_SCORE_USER_H | ||
| 3 | |||
| 4 | struct user_regs_struct { | ||
| 5 | unsigned long regs[32]; | ||
| 6 | |||
| 7 | unsigned long cel; | ||
| 8 | unsigned long ceh; | ||
| 9 | |||
| 10 | unsigned long sr0; /* cnt */ | ||
| 11 | unsigned long sr1; /* lcr */ | ||
| 12 | unsigned long sr2; /* scr */ | ||
| 13 | |||
| 14 | unsigned long cp0_epc; | ||
| 15 | unsigned long cp0_ema; | ||
| 16 | unsigned long cp0_psr; | ||
| 17 | unsigned long cp0_ecr; | ||
| 18 | unsigned long cp0_condition; | ||
| 19 | }; | ||
| 20 | |||
| 21 | #endif /* _ASM_SCORE_USER_H */ | ||
diff --git a/arch/score/kernel/Makefile b/arch/score/kernel/Makefile new file mode 100644 index 000000000000..f218673b5d3d --- /dev/null +++ b/arch/score/kernel/Makefile | |||
| @@ -0,0 +1,11 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the Linux/SCORE kernel. | ||
| 3 | # | ||
| 4 | |||
| 5 | extra-y := head.o vmlinux.lds | ||
| 6 | |||
| 7 | obj-y += entry.o init_task.o irq.o process.o ptrace.o \ | ||
| 8 | setup.o signal.o sys_score.o time.o traps.o \ | ||
| 9 | sys_call_table.o | ||
| 10 | |||
| 11 | obj-$(CONFIG_MODULES) += module.o | ||
diff --git a/arch/score/kernel/asm-offsets.c b/arch/score/kernel/asm-offsets.c new file mode 100644 index 000000000000..57788f44c6fb --- /dev/null +++ b/arch/score/kernel/asm-offsets.c | |||
| @@ -0,0 +1,216 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/asm-offsets.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/kbuild.h> | ||
| 27 | #include <linux/interrupt.h> | ||
| 28 | #include <linux/mm.h> | ||
| 29 | #include <linux/sched.h> | ||
| 30 | |||
| 31 | #include <asm-generic/cmpxchg-local.h> | ||
| 32 | |||
| 33 | void output_ptreg_defines(void) | ||
| 34 | { | ||
| 35 | COMMENT("SCORE pt_regs offsets."); | ||
| 36 | OFFSET(PT_R0, pt_regs, regs[0]); | ||
| 37 | OFFSET(PT_R1, pt_regs, regs[1]); | ||
| 38 | OFFSET(PT_R2, pt_regs, regs[2]); | ||
| 39 | OFFSET(PT_R3, pt_regs, regs[3]); | ||
| 40 | OFFSET(PT_R4, pt_regs, regs[4]); | ||
| 41 | OFFSET(PT_R5, pt_regs, regs[5]); | ||
| 42 | OFFSET(PT_R6, pt_regs, regs[6]); | ||
| 43 | OFFSET(PT_R7, pt_regs, regs[7]); | ||
| 44 | OFFSET(PT_R8, pt_regs, regs[8]); | ||
| 45 | OFFSET(PT_R9, pt_regs, regs[9]); | ||
| 46 | OFFSET(PT_R10, pt_regs, regs[10]); | ||
| 47 | OFFSET(PT_R11, pt_regs, regs[11]); | ||
| 48 | OFFSET(PT_R12, pt_regs, regs[12]); | ||
| 49 | OFFSET(PT_R13, pt_regs, regs[13]); | ||
| 50 | OFFSET(PT_R14, pt_regs, regs[14]); | ||
| 51 | OFFSET(PT_R15, pt_regs, regs[15]); | ||
| 52 | OFFSET(PT_R16, pt_regs, regs[16]); | ||
| 53 | OFFSET(PT_R17, pt_regs, regs[17]); | ||
| 54 | OFFSET(PT_R18, pt_regs, regs[18]); | ||
| 55 | OFFSET(PT_R19, pt_regs, regs[19]); | ||
| 56 | OFFSET(PT_R20, pt_regs, regs[20]); | ||
| 57 | OFFSET(PT_R21, pt_regs, regs[21]); | ||
| 58 | OFFSET(PT_R22, pt_regs, regs[22]); | ||
| 59 | OFFSET(PT_R23, pt_regs, regs[23]); | ||
| 60 | OFFSET(PT_R24, pt_regs, regs[24]); | ||
| 61 | OFFSET(PT_R25, pt_regs, regs[25]); | ||
| 62 | OFFSET(PT_R26, pt_regs, regs[26]); | ||
| 63 | OFFSET(PT_R27, pt_regs, regs[27]); | ||
| 64 | OFFSET(PT_R28, pt_regs, regs[28]); | ||
| 65 | OFFSET(PT_R29, pt_regs, regs[29]); | ||
| 66 | OFFSET(PT_R30, pt_regs, regs[30]); | ||
| 67 | OFFSET(PT_R31, pt_regs, regs[31]); | ||
| 68 | |||
| 69 | OFFSET(PT_ORIG_R4, pt_regs, orig_r4); | ||
| 70 | OFFSET(PT_ORIG_R7, pt_regs, orig_r7); | ||
| 71 | OFFSET(PT_CEL, pt_regs, cel); | ||
| 72 | OFFSET(PT_CEH, pt_regs, ceh); | ||
| 73 | OFFSET(PT_SR0, pt_regs, sr0); | ||
| 74 | OFFSET(PT_SR1, pt_regs, sr1); | ||
| 75 | OFFSET(PT_SR2, pt_regs, sr2); | ||
| 76 | OFFSET(PT_EPC, pt_regs, cp0_epc); | ||
| 77 | OFFSET(PT_EMA, pt_regs, cp0_ema); | ||
| 78 | OFFSET(PT_PSR, pt_regs, cp0_psr); | ||
| 79 | OFFSET(PT_ECR, pt_regs, cp0_ecr); | ||
| 80 | OFFSET(PT_CONDITION, pt_regs, cp0_condition); | ||
| 81 | OFFSET(PT_IS_SYSCALL, pt_regs, is_syscall); | ||
| 82 | |||
| 83 | DEFINE(PT_SIZE, sizeof(struct pt_regs)); | ||
| 84 | BLANK(); | ||
| 85 | } | ||
| 86 | |||
| 87 | void output_task_defines(void) | ||
| 88 | { | ||
| 89 | COMMENT("SCORE task_struct offsets."); | ||
| 90 | OFFSET(TASK_STATE, task_struct, state); | ||
| 91 | OFFSET(TASK_THREAD_INFO, task_struct, stack); | ||
| 92 | OFFSET(TASK_FLAGS, task_struct, flags); | ||
| 93 | OFFSET(TASK_MM, task_struct, mm); | ||
| 94 | OFFSET(TASK_PID, task_struct, pid); | ||
| 95 | DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct)); | ||
| 96 | BLANK(); | ||
| 97 | } | ||
| 98 | |||
| 99 | void output_thread_info_defines(void) | ||
| 100 | { | ||
| 101 | COMMENT("SCORE thread_info offsets."); | ||
| 102 | OFFSET(TI_TASK, thread_info, task); | ||
| 103 | OFFSET(TI_EXEC_DOMAIN, thread_info, exec_domain); | ||
| 104 | OFFSET(TI_FLAGS, thread_info, flags); | ||
| 105 | OFFSET(TI_TP_VALUE, thread_info, tp_value); | ||
| 106 | OFFSET(TI_CPU, thread_info, cpu); | ||
| 107 | OFFSET(TI_PRE_COUNT, thread_info, preempt_count); | ||
| 108 | OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit); | ||
| 109 | OFFSET(TI_RESTART_BLOCK, thread_info, restart_block); | ||
| 110 | OFFSET(TI_REGS, thread_info, regs); | ||
| 111 | DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); | ||
| 112 | DEFINE(KERNEL_STACK_MASK, THREAD_MASK); | ||
| 113 | BLANK(); | ||
| 114 | } | ||
| 115 | |||
| 116 | void output_thread_defines(void) | ||
| 117 | { | ||
| 118 | COMMENT("SCORE specific thread_struct offsets."); | ||
| 119 | OFFSET(THREAD_REG0, task_struct, thread.reg0); | ||
| 120 | OFFSET(THREAD_REG2, task_struct, thread.reg2); | ||
| 121 | OFFSET(THREAD_REG3, task_struct, thread.reg3); | ||
| 122 | OFFSET(THREAD_REG12, task_struct, thread.reg12); | ||
| 123 | OFFSET(THREAD_REG13, task_struct, thread.reg13); | ||
| 124 | OFFSET(THREAD_REG14, task_struct, thread.reg14); | ||
| 125 | OFFSET(THREAD_REG15, task_struct, thread.reg15); | ||
| 126 | OFFSET(THREAD_REG16, task_struct, thread.reg16); | ||
| 127 | OFFSET(THREAD_REG17, task_struct, thread.reg17); | ||
| 128 | OFFSET(THREAD_REG18, task_struct, thread.reg18); | ||
| 129 | OFFSET(THREAD_REG19, task_struct, thread.reg19); | ||
| 130 | OFFSET(THREAD_REG20, task_struct, thread.reg20); | ||
| 131 | OFFSET(THREAD_REG21, task_struct, thread.reg21); | ||
| 132 | OFFSET(THREAD_REG29, task_struct, thread.reg29); | ||
| 133 | |||
| 134 | OFFSET(THREAD_PSR, task_struct, thread.cp0_psr); | ||
| 135 | OFFSET(THREAD_EMA, task_struct, thread.cp0_ema); | ||
| 136 | OFFSET(THREAD_BADUADDR, task_struct, thread.cp0_baduaddr); | ||
| 137 | OFFSET(THREAD_ECODE, task_struct, thread.error_code); | ||
| 138 | OFFSET(THREAD_TRAPNO, task_struct, thread.trap_no); | ||
| 139 | BLANK(); | ||
| 140 | } | ||
| 141 | |||
| 142 | void output_mm_defines(void) | ||
| 143 | { | ||
| 144 | COMMENT("Size of struct page"); | ||
| 145 | DEFINE(STRUCT_PAGE_SIZE, sizeof(struct page)); | ||
| 146 | BLANK(); | ||
| 147 | COMMENT("Linux mm_struct offsets."); | ||
| 148 | OFFSET(MM_USERS, mm_struct, mm_users); | ||
| 149 | OFFSET(MM_PGD, mm_struct, pgd); | ||
| 150 | OFFSET(MM_CONTEXT, mm_struct, context); | ||
| 151 | BLANK(); | ||
| 152 | DEFINE(_PAGE_SIZE, PAGE_SIZE); | ||
| 153 | DEFINE(_PAGE_SHIFT, PAGE_SHIFT); | ||
| 154 | BLANK(); | ||
| 155 | DEFINE(_PGD_T_SIZE, sizeof(pgd_t)); | ||
| 156 | DEFINE(_PTE_T_SIZE, sizeof(pte_t)); | ||
| 157 | BLANK(); | ||
| 158 | DEFINE(_PGD_ORDER, PGD_ORDER); | ||
| 159 | DEFINE(_PTE_ORDER, PTE_ORDER); | ||
| 160 | BLANK(); | ||
| 161 | DEFINE(_PGDIR_SHIFT, PGDIR_SHIFT); | ||
| 162 | BLANK(); | ||
| 163 | DEFINE(_PTRS_PER_PGD, PTRS_PER_PGD); | ||
| 164 | DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE); | ||
| 165 | BLANK(); | ||
| 166 | } | ||
| 167 | |||
| 168 | void output_sc_defines(void) | ||
| 169 | { | ||
| 170 | COMMENT("Linux sigcontext offsets."); | ||
| 171 | OFFSET(SC_REGS, sigcontext, sc_regs); | ||
| 172 | OFFSET(SC_MDCEH, sigcontext, sc_mdceh); | ||
| 173 | OFFSET(SC_MDCEL, sigcontext, sc_mdcel); | ||
| 174 | OFFSET(SC_PC, sigcontext, sc_pc); | ||
| 175 | OFFSET(SC_PSR, sigcontext, sc_psr); | ||
| 176 | OFFSET(SC_ECR, sigcontext, sc_ecr); | ||
| 177 | OFFSET(SC_EMA, sigcontext, sc_ema); | ||
| 178 | BLANK(); | ||
| 179 | } | ||
| 180 | |||
| 181 | void output_signal_defined(void) | ||
| 182 | { | ||
| 183 | COMMENT("Linux signal numbers."); | ||
| 184 | DEFINE(_SIGHUP, SIGHUP); | ||
| 185 | DEFINE(_SIGINT, SIGINT); | ||
| 186 | DEFINE(_SIGQUIT, SIGQUIT); | ||
| 187 | DEFINE(_SIGILL, SIGILL); | ||
| 188 | DEFINE(_SIGTRAP, SIGTRAP); | ||
| 189 | DEFINE(_SIGIOT, SIGIOT); | ||
| 190 | DEFINE(_SIGABRT, SIGABRT); | ||
| 191 | DEFINE(_SIGFPE, SIGFPE); | ||
| 192 | DEFINE(_SIGKILL, SIGKILL); | ||
| 193 | DEFINE(_SIGBUS, SIGBUS); | ||
| 194 | DEFINE(_SIGSEGV, SIGSEGV); | ||
| 195 | DEFINE(_SIGSYS, SIGSYS); | ||
| 196 | DEFINE(_SIGPIPE, SIGPIPE); | ||
| 197 | DEFINE(_SIGALRM, SIGALRM); | ||
| 198 | DEFINE(_SIGTERM, SIGTERM); | ||
| 199 | DEFINE(_SIGUSR1, SIGUSR1); | ||
| 200 | DEFINE(_SIGUSR2, SIGUSR2); | ||
| 201 | DEFINE(_SIGCHLD, SIGCHLD); | ||
| 202 | DEFINE(_SIGPWR, SIGPWR); | ||
| 203 | DEFINE(_SIGWINCH, SIGWINCH); | ||
| 204 | DEFINE(_SIGURG, SIGURG); | ||
| 205 | DEFINE(_SIGIO, SIGIO); | ||
| 206 | DEFINE(_SIGSTOP, SIGSTOP); | ||
| 207 | DEFINE(_SIGTSTP, SIGTSTP); | ||
| 208 | DEFINE(_SIGCONT, SIGCONT); | ||
| 209 | DEFINE(_SIGTTIN, SIGTTIN); | ||
| 210 | DEFINE(_SIGTTOU, SIGTTOU); | ||
| 211 | DEFINE(_SIGVTALRM, SIGVTALRM); | ||
| 212 | DEFINE(_SIGPROF, SIGPROF); | ||
| 213 | DEFINE(_SIGXCPU, SIGXCPU); | ||
| 214 | DEFINE(_SIGXFSZ, SIGXFSZ); | ||
| 215 | BLANK(); | ||
| 216 | } | ||
diff --git a/arch/score/kernel/entry.S b/arch/score/kernel/entry.S new file mode 100644 index 000000000000..577abba3fac6 --- /dev/null +++ b/arch/score/kernel/entry.S | |||
| @@ -0,0 +1,514 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/entry.S | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/err.h> | ||
| 27 | #include <linux/init.h> | ||
| 28 | #include <linux/linkage.h> | ||
| 29 | |||
| 30 | #include <asm/asmmacro.h> | ||
| 31 | #include <asm/thread_info.h> | ||
| 32 | #include <asm/unistd.h> | ||
| 33 | |||
| 34 | /* | ||
| 35 | * disable interrupts. | ||
| 36 | */ | ||
| 37 | .macro disable_irq | ||
| 38 | mfcr r8, cr0 | ||
| 39 | srli r8, r8, 1 | ||
| 40 | slli r8, r8, 1 | ||
| 41 | mtcr r8, cr0 | ||
| 42 | nop | ||
| 43 | nop | ||
| 44 | nop | ||
| 45 | nop | ||
| 46 | nop | ||
| 47 | .endm | ||
| 48 | |||
| 49 | /* | ||
| 50 | * enable interrupts. | ||
| 51 | */ | ||
| 52 | .macro enable_irq | ||
| 53 | mfcr r8, cr0 | ||
| 54 | ori r8, 1 | ||
| 55 | mtcr r8, cr0 | ||
| 56 | nop | ||
| 57 | nop | ||
| 58 | nop | ||
| 59 | nop | ||
| 60 | nop | ||
| 61 | .endm | ||
| 62 | |||
| 63 | __INIT | ||
| 64 | ENTRY(debug_exception_vector) | ||
| 65 | nop! | ||
| 66 | nop! | ||
| 67 | nop! | ||
| 68 | nop! | ||
| 69 | nop! | ||
| 70 | nop! | ||
| 71 | nop! | ||
| 72 | nop! | ||
| 73 | |||
| 74 | ENTRY(general_exception_vector) # should move to addr 0x200 | ||
| 75 | j general_exception | ||
| 76 | nop! | ||
| 77 | nop! | ||
| 78 | nop! | ||
| 79 | nop! | ||
| 80 | nop! | ||
| 81 | nop! | ||
| 82 | |||
| 83 | ENTRY(interrupt_exception_vector) # should move to addr 0x210 | ||
| 84 | j interrupt_exception | ||
| 85 | nop! | ||
| 86 | nop! | ||
| 87 | nop! | ||
| 88 | nop! | ||
| 89 | nop! | ||
| 90 | nop! | ||
| 91 | |||
| 92 | .section ".text", "ax" | ||
| 93 | .align 2; | ||
| 94 | general_exception: | ||
| 95 | mfcr r31, cr2 | ||
| 96 | nop | ||
| 97 | la r30, exception_handlers | ||
| 98 | andi r31, 0x1f # get ecr.exc_code | ||
| 99 | slli r31, r31, 2 | ||
| 100 | add r30, r30, r31 | ||
| 101 | lw r30, [r30] | ||
| 102 | br r30 | ||
| 103 | |||
| 104 | interrupt_exception: | ||
| 105 | SAVE_ALL | ||
| 106 | mfcr r4, cr2 | ||
| 107 | nop | ||
| 108 | lw r16, [r28, TI_REGS] | ||
| 109 | sw r0, [r28, TI_REGS] | ||
| 110 | la r3, ret_from_irq | ||
| 111 | srli r4, r4, 18 # get ecr.ip[7:2], interrupt No. | ||
| 112 | mv r5, r0 | ||
| 113 | j do_IRQ | ||
| 114 | |||
| 115 | ENTRY(handle_nmi) # NMI #1 | ||
| 116 | SAVE_ALL | ||
| 117 | mv r4, r0 | ||
| 118 | la r8, nmi_exception_handler | ||
| 119 | brl r8 | ||
| 120 | j restore_all | ||
| 121 | |||
| 122 | ENTRY(handle_adelinsn) # AdEL-instruction #2 | ||
| 123 | SAVE_ALL | ||
| 124 | mfcr r8, cr6 | ||
| 125 | nop | ||
| 126 | nop | ||
| 127 | sw r8, [r0, PT_EMA] | ||
| 128 | mv r4, r0 | ||
| 129 | la r8, do_adelinsn | ||
| 130 | brl r8 | ||
| 131 | mv r4, r0 | ||
| 132 | j ret_from_exception | ||
| 133 | nop | ||
| 134 | |||
| 135 | ENTRY(handle_ibe) # BusEL-instruction #5 | ||
| 136 | SAVE_ALL | ||
| 137 | mv r4, r0 | ||
| 138 | la r8, do_be | ||
| 139 | brl r8 | ||
| 140 | mv r4, r0 | ||
| 141 | j ret_from_exception | ||
| 142 | nop | ||
| 143 | |||
| 144 | ENTRY(handle_pel) # P-EL #6 | ||
| 145 | SAVE_ALL | ||
| 146 | mv r4, r0 | ||
| 147 | la r8, do_pel | ||
| 148 | brl r8 | ||
| 149 | mv r4, r0 | ||
| 150 | j ret_from_exception | ||
| 151 | nop | ||
| 152 | |||
| 153 | ENTRY(handle_ccu) # CCU #8 | ||
| 154 | SAVE_ALL | ||
| 155 | mv r4, r0 | ||
| 156 | la r8, do_ccu | ||
| 157 | brl r8 | ||
| 158 | mv r4, r0 | ||
| 159 | j ret_from_exception | ||
| 160 | nop | ||
| 161 | |||
| 162 | ENTRY(handle_ri) # RI #9 | ||
| 163 | SAVE_ALL | ||
| 164 | mv r4, r0 | ||
| 165 | la r8, do_ri | ||
| 166 | brl r8 | ||
| 167 | mv r4, r0 | ||
| 168 | j ret_from_exception | ||
| 169 | nop | ||
| 170 | |||
| 171 | ENTRY(handle_tr) # Trap #10 | ||
| 172 | SAVE_ALL | ||
| 173 | mv r4, r0 | ||
| 174 | la r8, do_tr | ||
| 175 | brl r8 | ||
| 176 | mv r4, r0 | ||
| 177 | j ret_from_exception | ||
| 178 | nop | ||
| 179 | |||
| 180 | ENTRY(handle_adedata) # AdES-instruction #12 | ||
| 181 | SAVE_ALL | ||
| 182 | mfcr r8, cr6 | ||
| 183 | nop | ||
| 184 | nop | ||
| 185 | sw r8, [r0, PT_EMA] | ||
| 186 | mv r4, r0 | ||
| 187 | la r8, do_adedata | ||
| 188 | brl r8 | ||
| 189 | mv r4, r0 | ||
| 190 | j ret_from_exception | ||
| 191 | nop | ||
| 192 | |||
| 193 | ENTRY(handle_cee) # CeE #16 | ||
| 194 | SAVE_ALL | ||
| 195 | mv r4, r0 | ||
| 196 | la r8, do_cee | ||
| 197 | brl r8 | ||
| 198 | mv r4, r0 | ||
| 199 | j ret_from_exception | ||
| 200 | nop | ||
| 201 | |||
| 202 | ENTRY(handle_cpe) # CpE #17 | ||
| 203 | SAVE_ALL | ||
| 204 | mv r4, r0 | ||
| 205 | la r8, do_cpe | ||
| 206 | brl r8 | ||
| 207 | mv r4, r0 | ||
| 208 | j ret_from_exception | ||
| 209 | nop | ||
| 210 | |||
| 211 | ENTRY(handle_dbe) # BusEL-data #18 | ||
| 212 | SAVE_ALL | ||
| 213 | mv r4, r0 | ||
| 214 | la r8, do_be | ||
| 215 | brl r8 | ||
| 216 | mv r4, r0 | ||
| 217 | j ret_from_exception | ||
| 218 | nop | ||
| 219 | |||
| 220 | ENTRY(handle_reserved) # others | ||
| 221 | SAVE_ALL | ||
| 222 | mv r4, r0 | ||
| 223 | la r8, do_reserved | ||
| 224 | brl r8 | ||
| 225 | mv r4, r0 | ||
| 226 | j ret_from_exception | ||
| 227 | nop | ||
| 228 | |||
| 229 | #ifndef CONFIG_PREEMPT | ||
| 230 | #define resume_kernel restore_all | ||
| 231 | #else | ||
| 232 | #define __ret_from_irq ret_from_exception | ||
| 233 | #endif | ||
| 234 | |||
| 235 | .align 2 | ||
| 236 | #ifndef CONFIG_PREEMPT | ||
| 237 | ENTRY(ret_from_exception) | ||
| 238 | disable_irq # preempt stop | ||
| 239 | nop | ||
| 240 | j __ret_from_irq | ||
| 241 | nop | ||
| 242 | #endif | ||
| 243 | |||
| 244 | ENTRY(ret_from_irq) | ||
| 245 | sw r16, [r28, TI_REGS] | ||
| 246 | |||
| 247 | ENTRY(__ret_from_irq) | ||
| 248 | lw r8, [r0, PT_PSR] # returning to kernel mode? | ||
| 249 | andri.c r8, r8, KU_USER | ||
| 250 | beq resume_kernel | ||
| 251 | |||
| 252 | resume_userspace: | ||
| 253 | disable_irq | ||
| 254 | lw r6, [r28, TI_FLAGS] # current->work | ||
| 255 | li r8, _TIF_WORK_MASK | ||
| 256 | and.c r8, r8, r6 # ignoring syscall_trace | ||
| 257 | bne work_pending | ||
| 258 | nop | ||
| 259 | j restore_all | ||
| 260 | nop | ||
| 261 | |||
| 262 | #ifdef CONFIG_PREEMPT | ||
| 263 | resume_kernel: | ||
| 264 | disable_irq | ||
| 265 | lw r8, [r28, TI_PRE_COUNT] | ||
| 266 | cmpz.c r8 | ||
| 267 | bne r8, restore_all | ||
| 268 | need_resched: | ||
| 269 | lw r8, [r28, TI_FLAGS] | ||
| 270 | andri.c r9, r8, _TIF_NEED_RESCHED | ||
| 271 | beq restore_all | ||
| 272 | lw r8, [r28, PT_PSR] # Interrupts off? | ||
| 273 | andri.c r8, r8, 1 | ||
| 274 | beq restore_all | ||
| 275 | bl preempt_schedule_irq | ||
| 276 | nop | ||
| 277 | j need_resched | ||
| 278 | nop | ||
| 279 | #endif | ||
| 280 | |||
| 281 | ENTRY(ret_from_fork) | ||
| 282 | bl schedule_tail # r4=struct task_struct *prev | ||
| 283 | |||
| 284 | ENTRY(syscall_exit) | ||
| 285 | nop | ||
| 286 | disable_irq | ||
| 287 | lw r6, [r28, TI_FLAGS] # current->work | ||
| 288 | li r8, _TIF_WORK_MASK | ||
| 289 | and.c r8, r6, r8 | ||
| 290 | bne syscall_exit_work | ||
| 291 | |||
| 292 | ENTRY(restore_all) # restore full frame | ||
| 293 | RESTORE_ALL_AND_RET | ||
| 294 | |||
| 295 | work_pending: | ||
| 296 | andri.c r8, r6, _TIF_NEED_RESCHED # r6 is preloaded with TI_FLAGS | ||
| 297 | beq work_notifysig | ||
| 298 | work_resched: | ||
| 299 | bl schedule | ||
| 300 | nop | ||
| 301 | disable_irq | ||
| 302 | lw r6, [r28, TI_FLAGS] | ||
| 303 | li r8, _TIF_WORK_MASK | ||
| 304 | and.c r8, r6, r8 # is there any work to be done | ||
| 305 | # other than syscall tracing? | ||
| 306 | beq restore_all | ||
| 307 | andri.c r8, r6, _TIF_NEED_RESCHED | ||
| 308 | bne work_resched | ||
| 309 | |||
| 310 | work_notifysig: | ||
| 311 | mv r4, r0 | ||
| 312 | li r5, 0 | ||
| 313 | bl do_notify_resume # r6 already loaded | ||
| 314 | nop | ||
| 315 | j resume_userspace | ||
| 316 | nop | ||
| 317 | |||
| 318 | ENTRY(syscall_exit_work) | ||
| 319 | li r8, _TIF_SYSCALL_TRACE | ||
| 320 | and.c r8, r8, r6 # r6 is preloaded with TI_FLAGS | ||
| 321 | beq work_pending # trace bit set? | ||
| 322 | nop | ||
| 323 | enable_irq | ||
| 324 | mv r4, r0 | ||
| 325 | li r5, 1 | ||
| 326 | bl do_syscall_trace | ||
| 327 | nop | ||
| 328 | b resume_userspace | ||
| 329 | nop | ||
| 330 | |||
| 331 | .macro save_context reg | ||
| 332 | sw r12, [\reg, THREAD_REG12]; | ||
| 333 | sw r13, [\reg, THREAD_REG13]; | ||
| 334 | sw r14, [\reg, THREAD_REG14]; | ||
| 335 | sw r15, [\reg, THREAD_REG15]; | ||
| 336 | sw r16, [\reg, THREAD_REG16]; | ||
| 337 | sw r17, [\reg, THREAD_REG17]; | ||
| 338 | sw r18, [\reg, THREAD_REG18]; | ||
| 339 | sw r19, [\reg, THREAD_REG19]; | ||
| 340 | sw r20, [\reg, THREAD_REG20]; | ||
| 341 | sw r21, [\reg, THREAD_REG21]; | ||
| 342 | sw r29, [\reg, THREAD_REG29]; | ||
| 343 | sw r2, [\reg, THREAD_REG2]; | ||
| 344 | sw r0, [\reg, THREAD_REG0] | ||
| 345 | .endm | ||
| 346 | |||
| 347 | .macro restore_context reg | ||
| 348 | lw r12, [\reg, THREAD_REG12]; | ||
| 349 | lw r13, [\reg, THREAD_REG13]; | ||
| 350 | lw r14, [\reg, THREAD_REG14]; | ||
| 351 | lw r15, [\reg, THREAD_REG15]; | ||
| 352 | lw r16, [\reg, THREAD_REG16]; | ||
| 353 | lw r17, [\reg, THREAD_REG17]; | ||
| 354 | lw r18, [\reg, THREAD_REG18]; | ||
| 355 | lw r19, [\reg, THREAD_REG19]; | ||
| 356 | lw r20, [\reg, THREAD_REG20]; | ||
| 357 | lw r21, [\reg, THREAD_REG21]; | ||
| 358 | lw r29, [\reg, THREAD_REG29]; | ||
| 359 | lw r0, [\reg, THREAD_REG0]; | ||
| 360 | lw r2, [\reg, THREAD_REG2]; | ||
| 361 | lw r3, [\reg, THREAD_REG3] | ||
| 362 | .endm | ||
| 363 | |||
| 364 | /* | ||
| 365 | * task_struct *resume(task_struct *prev, task_struct *next, | ||
| 366 | * struct thread_info *next_ti) | ||
| 367 | */ | ||
| 368 | ENTRY(resume) | ||
| 369 | mfcr r9, cr0 | ||
| 370 | nop | ||
| 371 | nop | ||
| 372 | sw r9, [r4, THREAD_PSR] | ||
| 373 | save_context r4 | ||
| 374 | sw r3, [r4, THREAD_REG3] | ||
| 375 | |||
| 376 | mv r28, r6 | ||
| 377 | restore_context r5 | ||
| 378 | mv r8, r6 | ||
| 379 | addi r8, KERNEL_STACK_SIZE | ||
| 380 | subi r8, 32 | ||
| 381 | la r9, kernelsp; | ||
| 382 | sw r8, [r9]; | ||
| 383 | |||
| 384 | mfcr r9, cr0 | ||
| 385 | ldis r7, 0x00ff | ||
| 386 | nop | ||
| 387 | and r9, r9, r7 | ||
| 388 | lw r6, [r5, THREAD_PSR] | ||
| 389 | not r7, r7 | ||
| 390 | and r6, r6, r7 | ||
| 391 | or r6, r6, r9 | ||
| 392 | mtcr r6, cr0 | ||
| 393 | nop; nop; nop; nop; nop | ||
| 394 | br r3 | ||
| 395 | |||
| 396 | ENTRY(handle_sys) | ||
| 397 | SAVE_ALL | ||
| 398 | sw r8, [r0, 16] # argument 5 from user r8 | ||
| 399 | sw r9, [r0, 20] # argument 6 from user r9 | ||
| 400 | enable_irq | ||
| 401 | |||
| 402 | sw r4, [r0, PT_ORIG_R4] #for restart syscall | ||
| 403 | sw r7, [r0, PT_ORIG_R7] #for restart syscall | ||
| 404 | sw r27, [r0, PT_IS_SYSCALL] # it from syscall | ||
| 405 | |||
| 406 | lw r9, [r0, PT_EPC] # skip syscall on return | ||
| 407 | addi r9, 4 | ||
| 408 | sw r9, [r0, PT_EPC] | ||
| 409 | |||
| 410 | cmpi.c r27, __NR_syscalls # check syscall number | ||
| 411 | bgtu illegal_syscall | ||
| 412 | |||
| 413 | slli r8, r27, 2 # get syscall routine | ||
| 414 | la r11, sys_call_table | ||
| 415 | add r11, r11, r8 | ||
| 416 | lw r10, [r11] # get syscall entry | ||
| 417 | |||
| 418 | cmpz.c r10 | ||
| 419 | beq illegal_syscall | ||
| 420 | |||
| 421 | lw r8, [r28, TI_FLAGS] | ||
| 422 | li r9, _TIF_SYSCALL_TRACE | ||
| 423 | and.c r8, r8, r9 | ||
| 424 | bne syscall_trace_entry | ||
| 425 | |||
| 426 | brl r10 # Do The Real system call | ||
| 427 | |||
| 428 | cmpi.c r4, 0 | ||
| 429 | blt 1f | ||
| 430 | ldi r8, 0 | ||
| 431 | sw r8, [r0, PT_R7] | ||
| 432 | b 2f | ||
| 433 | 1: | ||
| 434 | cmpi.c r4, -MAX_ERRNO - 1 | ||
| 435 | ble 2f | ||
| 436 | ldi r8, 0x1; | ||
| 437 | sw r8, [r0, PT_R7] | ||
| 438 | neg r4, r4 | ||
| 439 | 2: | ||
| 440 | sw r4, [r0, PT_R4] # save result | ||
| 441 | |||
| 442 | syscall_return: | ||
| 443 | disable_irq | ||
| 444 | lw r6, [r28, TI_FLAGS] # current->work | ||
| 445 | li r8, _TIF_WORK_MASK | ||
| 446 | and.c r8, r6, r8 | ||
| 447 | bne syscall_return_work | ||
| 448 | j restore_all | ||
| 449 | |||
| 450 | syscall_return_work: | ||
| 451 | j syscall_exit_work | ||
| 452 | |||
| 453 | syscall_trace_entry: | ||
| 454 | mv r16, r10 | ||
| 455 | mv r4, r0 | ||
| 456 | li r5, 0 | ||
| 457 | bl do_syscall_trace | ||
| 458 | |||
| 459 | mv r8, r16 | ||
| 460 | lw r4, [r0, PT_R4] # Restore argument registers | ||
| 461 | lw r5, [r0, PT_R5] | ||
| 462 | lw r6, [r0, PT_R6] | ||
| 463 | lw r7, [r0, PT_R7] | ||
| 464 | brl r8 | ||
| 465 | |||
| 466 | li r8, -MAX_ERRNO - 1 | ||
| 467 | sw r8, [r0, PT_R7] # set error flag | ||
| 468 | |||
| 469 | neg r4, r4 # error | ||
| 470 | sw r4, [r0, PT_R0] # set flag for syscall | ||
| 471 | # restarting | ||
| 472 | 1: sw r4, [r0, PT_R2] # result | ||
| 473 | j syscall_exit | ||
| 474 | |||
| 475 | illegal_syscall: | ||
| 476 | ldi r4, -ENOSYS # error | ||
| 477 | sw r4, [r0, PT_ORIG_R4] | ||
| 478 | sw r4, [r0, PT_R4] | ||
| 479 | ldi r9, 1 # set error flag | ||
| 480 | sw r9, [r0, PT_R7] | ||
| 481 | j syscall_return | ||
| 482 | |||
| 483 | ENTRY(sys_execve) | ||
| 484 | mv r4, r0 | ||
| 485 | la r8, score_execve | ||
| 486 | br r8 | ||
| 487 | |||
| 488 | ENTRY(sys_clone) | ||
| 489 | mv r4, r0 | ||
| 490 | la r8, score_clone | ||
| 491 | br r8 | ||
| 492 | |||
| 493 | ENTRY(sys_rt_sigreturn) | ||
| 494 | mv r4, r0 | ||
| 495 | la r8, score_rt_sigreturn | ||
| 496 | br r8 | ||
| 497 | |||
| 498 | ENTRY(sys_sigaltstack) | ||
| 499 | mv r4, r0 | ||
| 500 | la r8, score_sigaltstack | ||
| 501 | br r8 | ||
| 502 | |||
| 503 | #ifdef __ARCH_WANT_SYSCALL_DEPRECATED | ||
| 504 | ENTRY(sys_fork) | ||
| 505 | mv r4, r0 | ||
| 506 | la r8, score_fork | ||
| 507 | br r8 | ||
| 508 | |||
| 509 | ENTRY(sys_vfork) | ||
| 510 | mv r4, r0 | ||
| 511 | la r8, score_vfork | ||
| 512 | br r8 | ||
| 513 | #endif /* __ARCH_WANT_SYSCALL_DEPRECATED */ | ||
| 514 | |||
diff --git a/arch/score/kernel/head.S b/arch/score/kernel/head.S new file mode 100644 index 000000000000..22a7e3c7292b --- /dev/null +++ b/arch/score/kernel/head.S | |||
| @@ -0,0 +1,70 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/head.S | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | #include <linux/init.h> | ||
| 26 | #include <linux/linkage.h> | ||
| 27 | |||
| 28 | #include <asm/asm-offsets.h> | ||
| 29 | |||
| 30 | .extern start_kernel | ||
| 31 | .global init_thread_union | ||
| 32 | .global kernelsp | ||
| 33 | |||
| 34 | __INIT | ||
| 35 | ENTRY(_stext) | ||
| 36 | la r30, __bss_start /* initialize BSS segment. */ | ||
| 37 | la r31, _end | ||
| 38 | xor r8, r8, r8 | ||
| 39 | |||
| 40 | 1: cmp.c r31, r30 | ||
| 41 | beq 2f | ||
| 42 | |||
| 43 | sw r8, [r30] /* clean memory. */ | ||
| 44 | addi r30, 4 | ||
| 45 | b 1b | ||
| 46 | |||
| 47 | 2: la r28, init_thread_union /* set kernel stack. */ | ||
| 48 | mv r0, r28 | ||
| 49 | addi r0, KERNEL_STACK_SIZE - 32 | ||
| 50 | la r30, kernelsp | ||
| 51 | sw r0, [r30] | ||
| 52 | subi r0, 4*4 | ||
| 53 | xor r30, r30, r30 | ||
| 54 | ori r30, 0x02 /* enable MMU. */ | ||
| 55 | mtcr r30, cr4 | ||
| 56 | nop | ||
| 57 | nop | ||
| 58 | nop | ||
| 59 | nop | ||
| 60 | nop | ||
| 61 | nop | ||
| 62 | nop | ||
| 63 | |||
| 64 | /* there is no parameter */ | ||
| 65 | xor r4, r4, r4 | ||
| 66 | xor r5, r5, r5 | ||
| 67 | xor r6, r6, r6 | ||
| 68 | xor r7, r7, r7 | ||
| 69 | la r30, start_kernel /* jump to init_arch */ | ||
| 70 | br r30 | ||
diff --git a/arch/score/kernel/init_task.c b/arch/score/kernel/init_task.c new file mode 100644 index 000000000000..ff952f6c63fd --- /dev/null +++ b/arch/score/kernel/init_task.c | |||
| @@ -0,0 +1,47 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/init_task.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License, or | ||
| 11 | * (at your option) any later version. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, | ||
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 16 | * GNU General Public License for more details. | ||
| 17 | * | ||
| 18 | * You should have received a copy of the GNU General Public License | ||
| 19 | * along with this program; if not, see the file COPYING, or write | ||
| 20 | * to the Free Software Foundation, Inc., | ||
| 21 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 22 | */ | ||
| 23 | |||
| 24 | #include <linux/init_task.h> | ||
| 25 | #include <linux/mqueue.h> | ||
| 26 | |||
| 27 | static struct signal_struct init_signals = INIT_SIGNALS(init_signals); | ||
| 28 | static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); | ||
| 29 | |||
| 30 | /* | ||
| 31 | * Initial thread structure. | ||
| 32 | * | ||
| 33 | * We need to make sure that this is THREAD_SIZE aligned due to the | ||
| 34 | * way process stacks are handled. This is done by having a special | ||
| 35 | * "init_task" linker map entry.. | ||
| 36 | */ | ||
| 37 | union thread_union init_thread_union | ||
| 38 | __attribute__((__section__(".data.init_task"), __aligned__(THREAD_SIZE))) = | ||
| 39 | { INIT_THREAD_INFO(init_task) }; | ||
| 40 | |||
| 41 | /* | ||
| 42 | * Initial task structure. | ||
| 43 | * | ||
| 44 | * All other task structs will be allocated on slabs in fork.c | ||
| 45 | */ | ||
| 46 | struct task_struct init_task = INIT_TASK(init_task); | ||
| 47 | EXPORT_SYMBOL(init_task); | ||
diff --git a/arch/score/kernel/irq.c b/arch/score/kernel/irq.c new file mode 100644 index 000000000000..47647dde09ca --- /dev/null +++ b/arch/score/kernel/irq.c | |||
| @@ -0,0 +1,148 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/irq.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/interrupt.h> | ||
| 27 | #include <linux/kernel_stat.h> | ||
| 28 | #include <linux/seq_file.h> | ||
| 29 | |||
| 30 | #include <asm/io.h> | ||
| 31 | |||
| 32 | /* the interrupt controller is hardcoded at this address */ | ||
| 33 | #define SCORE_PIC ((u32 __iomem __force *)0x95F50000) | ||
| 34 | |||
| 35 | #define INT_PNDL 0 | ||
| 36 | #define INT_PNDH 1 | ||
| 37 | #define INT_PRIORITY_M 2 | ||
| 38 | #define INT_PRIORITY_SG0 4 | ||
| 39 | #define INT_PRIORITY_SG1 5 | ||
| 40 | #define INT_PRIORITY_SG2 6 | ||
| 41 | #define INT_PRIORITY_SG3 7 | ||
| 42 | #define INT_MASKL 8 | ||
| 43 | #define INT_MASKH 9 | ||
| 44 | |||
| 45 | /* | ||
| 46 | * handles all normal device IRQs | ||
| 47 | */ | ||
| 48 | asmlinkage void do_IRQ(int irq) | ||
| 49 | { | ||
| 50 | irq_enter(); | ||
| 51 | generic_handle_irq(irq); | ||
| 52 | irq_exit(); | ||
| 53 | } | ||
| 54 | |||
| 55 | static void score_mask(unsigned int irq_nr) | ||
| 56 | { | ||
| 57 | unsigned int irq_source = 63 - irq_nr; | ||
| 58 | |||
| 59 | if (irq_source < 32) | ||
| 60 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \ | ||
| 61 | (1 << irq_source)), SCORE_PIC + INT_MASKL); | ||
| 62 | else | ||
| 63 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) | \ | ||
| 64 | (1 << (irq_source - 32))), SCORE_PIC + INT_MASKH); | ||
| 65 | } | ||
| 66 | |||
| 67 | static void score_unmask(unsigned int irq_nr) | ||
| 68 | { | ||
| 69 | unsigned int irq_source = 63 - irq_nr; | ||
| 70 | |||
| 71 | if (irq_source < 32) | ||
| 72 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \ | ||
| 73 | ~(1 << irq_source)), SCORE_PIC + INT_MASKL); | ||
| 74 | else | ||
| 75 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) & \ | ||
| 76 | ~(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH); | ||
| 77 | } | ||
| 78 | |||
| 79 | struct irq_chip score_irq_chip = { | ||
| 80 | .name = "Score7-level", | ||
| 81 | .mask = score_mask, | ||
| 82 | .mask_ack = score_mask, | ||
| 83 | .unmask = score_unmask, | ||
| 84 | }; | ||
| 85 | |||
| 86 | /* | ||
| 87 | * initialise the interrupt system | ||
| 88 | */ | ||
| 89 | void __init init_IRQ(void) | ||
| 90 | { | ||
| 91 | int index; | ||
| 92 | unsigned long target_addr; | ||
| 93 | |||
| 94 | for (index = 0; index < NR_IRQS; ++index) | ||
| 95 | set_irq_chip_and_handler(index, &score_irq_chip, | ||
| 96 | handle_level_irq); | ||
| 97 | |||
| 98 | for (target_addr = IRQ_VECTOR_BASE_ADDR; | ||
| 99 | target_addr <= IRQ_VECTOR_END_ADDR; | ||
| 100 | target_addr += IRQ_VECTOR_SIZE) | ||
| 101 | memcpy((void *)target_addr, \ | ||
| 102 | interrupt_exception_vector, IRQ_VECTOR_SIZE); | ||
| 103 | |||
| 104 | __raw_writel(0xffffffff, SCORE_PIC + INT_MASKL); | ||
| 105 | __raw_writel(0xffffffff, SCORE_PIC + INT_MASKH); | ||
| 106 | |||
| 107 | __asm__ __volatile__( | ||
| 108 | "mtcr %0, cr3\n\t" | ||
| 109 | : : "r" (EXCEPTION_VECTOR_BASE_ADDR | \ | ||
| 110 | VECTOR_ADDRESS_OFFSET_MODE16)); | ||
| 111 | } | ||
| 112 | |||
| 113 | /* | ||
| 114 | * Generic, controller-independent functions: | ||
| 115 | */ | ||
| 116 | int show_interrupts(struct seq_file *p, void *v) | ||
| 117 | { | ||
| 118 | int i = *(loff_t *)v, cpu; | ||
| 119 | struct irqaction *action; | ||
| 120 | unsigned long flags; | ||
| 121 | |||
| 122 | if (i == 0) { | ||
| 123 | seq_puts(p, " "); | ||
| 124 | for_each_online_cpu(cpu) | ||
| 125 | seq_printf(p, "CPU%d ", cpu); | ||
| 126 | seq_putc(p, '\n'); | ||
| 127 | } | ||
| 128 | |||
| 129 | if (i < NR_IRQS) { | ||
| 130 | spin_lock_irqsave(&irq_desc[i].lock, flags); | ||
| 131 | action = irq_desc[i].action; | ||
| 132 | if (!action) | ||
| 133 | goto unlock; | ||
| 134 | |||
| 135 | seq_printf(p, "%3d: ", i); | ||
| 136 | seq_printf(p, "%10u ", kstat_irqs(i)); | ||
| 137 | seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-"); | ||
| 138 | seq_printf(p, " %s", action->name); | ||
| 139 | for (action = action->next; action; action = action->next) | ||
| 140 | seq_printf(p, ", %s", action->name); | ||
| 141 | |||
| 142 | seq_putc(p, '\n'); | ||
| 143 | unlock: | ||
| 144 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); | ||
| 145 | } | ||
| 146 | |||
| 147 | return 0; | ||
| 148 | } | ||
diff --git a/arch/score/kernel/module.c b/arch/score/kernel/module.c new file mode 100644 index 000000000000..4de8d47becd3 --- /dev/null +++ b/arch/score/kernel/module.c | |||
| @@ -0,0 +1,165 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/module.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/moduleloader.h> | ||
| 27 | #include <linux/module.h> | ||
| 28 | #include <linux/vmalloc.h> | ||
| 29 | |||
| 30 | void *module_alloc(unsigned long size) | ||
| 31 | { | ||
| 32 | return size ? vmalloc(size) : NULL; | ||
| 33 | } | ||
| 34 | |||
| 35 | /* Free memory returned from module_alloc */ | ||
| 36 | void module_free(struct module *mod, void *module_region) | ||
| 37 | { | ||
| 38 | vfree(module_region); | ||
| 39 | } | ||
| 40 | |||
| 41 | int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, | ||
| 42 | char *secstrings, struct module *mod) | ||
| 43 | { | ||
| 44 | return 0; | ||
| 45 | } | ||
| 46 | |||
| 47 | int apply_relocate(Elf_Shdr *sechdrs, const char *strtab, | ||
| 48 | unsigned int symindex, unsigned int relindex, | ||
| 49 | struct module *me) | ||
| 50 | { | ||
| 51 | Elf32_Shdr *symsec = sechdrs + symindex; | ||
| 52 | Elf32_Shdr *relsec = sechdrs + relindex; | ||
| 53 | Elf32_Shdr *dstsec = sechdrs + relsec->sh_info; | ||
| 54 | Elf32_Rel *rel = (void *)relsec->sh_addr; | ||
| 55 | unsigned int i; | ||
| 56 | |||
| 57 | for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) { | ||
| 58 | unsigned long loc; | ||
| 59 | Elf32_Sym *sym; | ||
| 60 | s32 r_offset; | ||
| 61 | |||
| 62 | r_offset = ELF32_R_SYM(rel->r_info); | ||
| 63 | if ((r_offset < 0) || | ||
| 64 | (r_offset > (symsec->sh_size / sizeof(Elf32_Sym)))) { | ||
| 65 | printk(KERN_ERR "%s: bad relocation, section %d reloc %d\n", | ||
| 66 | me->name, relindex, i); | ||
| 67 | return -ENOEXEC; | ||
| 68 | } | ||
| 69 | |||
| 70 | sym = ((Elf32_Sym *)symsec->sh_addr) + r_offset; | ||
| 71 | |||
| 72 | if ((rel->r_offset < 0) || | ||
| 73 | (rel->r_offset > dstsec->sh_size - sizeof(u32))) { | ||
| 74 | printk(KERN_ERR "%s: out of bounds relocation, " | ||
| 75 | "section %d reloc %d offset %d size %d\n", | ||
| 76 | me->name, relindex, i, rel->r_offset, | ||
| 77 | dstsec->sh_size); | ||
| 78 | return -ENOEXEC; | ||
| 79 | } | ||
| 80 | |||
| 81 | loc = dstsec->sh_addr + rel->r_offset; | ||
| 82 | switch (ELF32_R_TYPE(rel->r_info)) { | ||
| 83 | case R_SCORE_NONE: | ||
| 84 | break; | ||
| 85 | case R_SCORE_ABS32: | ||
| 86 | *(unsigned long *)loc += sym->st_value; | ||
| 87 | break; | ||
| 88 | case R_SCORE_HI16: | ||
| 89 | break; | ||
| 90 | case R_SCORE_LO16: { | ||
| 91 | unsigned long hi16_offset, offset; | ||
| 92 | unsigned long uvalue; | ||
| 93 | unsigned long temp, temp_hi; | ||
| 94 | temp_hi = *((unsigned long *)loc - 1); | ||
| 95 | temp = *(unsigned long *)loc; | ||
| 96 | |||
| 97 | hi16_offset = (((((temp_hi) >> 16) & 0x3) << 15) | | ||
| 98 | ((temp_hi) & 0x7fff)) >> 1; | ||
| 99 | offset = ((temp >> 16 & 0x03) << 15) | | ||
| 100 | ((temp & 0x7fff) >> 1); | ||
| 101 | offset = (hi16_offset << 16) | (offset & 0xffff); | ||
| 102 | uvalue = sym->st_value + offset; | ||
| 103 | hi16_offset = (uvalue >> 16) << 1; | ||
| 104 | |||
| 105 | temp_hi = ((temp_hi) & (~(0x37fff))) | | ||
| 106 | (hi16_offset & 0x7fff) | | ||
| 107 | ((hi16_offset << 1) & 0x30000); | ||
| 108 | *((unsigned long *)loc - 1) = temp_hi; | ||
| 109 | |||
| 110 | offset = (uvalue & 0xffff) << 1; | ||
| 111 | temp = (temp & (~(0x37fff))) | (offset & 0x7fff) | | ||
| 112 | ((offset << 1) & 0x30000); | ||
| 113 | *(unsigned long *)loc = temp; | ||
| 114 | break; | ||
| 115 | } | ||
| 116 | case R_SCORE_24: { | ||
| 117 | unsigned long hi16_offset, offset; | ||
| 118 | unsigned long uvalue; | ||
| 119 | unsigned long temp; | ||
| 120 | |||
| 121 | temp = *(unsigned long *)loc; | ||
| 122 | offset = (temp & 0x03FF7FFE); | ||
| 123 | hi16_offset = (offset & 0xFFFF0000); | ||
| 124 | offset = (hi16_offset | ((offset & 0xFFFF) << 1)) >> 2; | ||
| 125 | |||
| 126 | uvalue = (sym->st_value + offset) >> 1; | ||
| 127 | uvalue = uvalue & 0x00ffffff; | ||
| 128 | |||
| 129 | temp = (temp & 0xfc008001) | | ||
| 130 | ((uvalue << 2) & 0x3ff0000) | | ||
| 131 | ((uvalue & 0x3fff) << 1); | ||
| 132 | *(unsigned long *)loc = temp; | ||
| 133 | break; | ||
| 134 | } | ||
| 135 | default: | ||
| 136 | printk(KERN_ERR "%s: unknown relocation: %u\n", | ||
| 137 | me->name, ELF32_R_TYPE(rel->r_info)); | ||
| 138 | return -ENOEXEC; | ||
| 139 | } | ||
| 140 | } | ||
| 141 | |||
| 142 | return 0; | ||
| 143 | } | ||
| 144 | |||
| 145 | int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, | ||
| 146 | unsigned int symindex, unsigned int relsec, | ||
| 147 | struct module *me) | ||
| 148 | { | ||
| 149 | return 0; | ||
| 150 | } | ||
| 151 | |||
| 152 | /* Given an address, look for it in the module exception tables. */ | ||
| 153 | const struct exception_table_entry *search_module_dbetables(unsigned long addr) | ||
| 154 | { | ||
| 155 | return NULL; | ||
| 156 | } | ||
| 157 | |||
| 158 | /* Put in dbe list if necessary. */ | ||
| 159 | int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, | ||
| 160 | struct module *me) | ||
| 161 | { | ||
| 162 | return 0; | ||
| 163 | } | ||
| 164 | |||
| 165 | void module_arch_cleanup(struct module *mod) {} | ||
diff --git a/arch/score/kernel/process.c b/arch/score/kernel/process.c new file mode 100644 index 000000000000..25d08030a883 --- /dev/null +++ b/arch/score/kernel/process.c | |||
| @@ -0,0 +1,168 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/process.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/module.h> | ||
| 27 | #include <linux/reboot.h> | ||
| 28 | #include <linux/elfcore.h> | ||
| 29 | #include <linux/pm.h> | ||
| 30 | |||
| 31 | void (*pm_power_off)(void); | ||
| 32 | EXPORT_SYMBOL(pm_power_off); | ||
| 33 | |||
| 34 | /* If or when software machine-restart is implemented, add code here. */ | ||
| 35 | void machine_restart(char *command) {} | ||
| 36 | |||
| 37 | /* If or when software machine-halt is implemented, add code here. */ | ||
| 38 | void machine_halt(void) {} | ||
| 39 | |||
| 40 | /* If or when software machine-power-off is implemented, add code here. */ | ||
| 41 | void machine_power_off(void) {} | ||
| 42 | |||
| 43 | /* | ||
| 44 | * The idle thread. There's no useful work to be | ||
| 45 | * done, so just try to conserve power and have a | ||
| 46 | * low exit latency (ie sit in a loop waiting for | ||
| 47 | * somebody to say that they'd like to reschedule) | ||
| 48 | */ | ||
| 49 | void __noreturn cpu_idle(void) | ||
| 50 | { | ||
| 51 | /* endless idle loop with no priority at all */ | ||
| 52 | while (1) { | ||
| 53 | while (!need_resched()) | ||
| 54 | barrier(); | ||
| 55 | |||
| 56 | preempt_enable_no_resched(); | ||
| 57 | schedule(); | ||
| 58 | preempt_disable(); | ||
| 59 | } | ||
| 60 | } | ||
| 61 | |||
| 62 | void ret_from_fork(void); | ||
| 63 | |||
| 64 | void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) | ||
| 65 | { | ||
| 66 | unsigned long status; | ||
| 67 | |||
| 68 | /* New thread loses kernel privileges. */ | ||
| 69 | status = regs->cp0_psr & ~(KU_MASK); | ||
| 70 | status |= KU_USER; | ||
| 71 | regs->cp0_psr = status; | ||
| 72 | regs->cp0_epc = pc; | ||
| 73 | regs->regs[0] = sp; | ||
| 74 | } | ||
| 75 | |||
| 76 | void exit_thread(void) {} | ||
| 77 | |||
| 78 | /* | ||
| 79 | * When a process does an "exec", machine state like FPU and debug | ||
| 80 | * registers need to be reset. This is a hook function for that. | ||
| 81 | * Currently we don't have any such state to reset, so this is empty. | ||
| 82 | */ | ||
| 83 | void flush_thread(void) {} | ||
| 84 | |||
| 85 | /* | ||
| 86 | * set up the kernel stack and exception frames for a new process | ||
| 87 | */ | ||
| 88 | int copy_thread(unsigned long clone_flags, unsigned long usp, | ||
| 89 | unsigned long unused, | ||
| 90 | struct task_struct *p, struct pt_regs *regs) | ||
| 91 | { | ||
| 92 | struct thread_info *ti = task_thread_info(p); | ||
| 93 | struct pt_regs *childregs = task_pt_regs(p); | ||
| 94 | |||
| 95 | p->set_child_tid = NULL; | ||
| 96 | p->clear_child_tid = NULL; | ||
| 97 | |||
| 98 | *childregs = *regs; | ||
| 99 | childregs->regs[7] = 0; /* Clear error flag */ | ||
| 100 | childregs->regs[4] = 0; /* Child gets zero as return value */ | ||
| 101 | regs->regs[4] = p->pid; | ||
| 102 | |||
| 103 | if (childregs->cp0_psr & 0x8) { /* test kernel fork or user fork */ | ||
| 104 | childregs->regs[0] = usp; /* user fork */ | ||
| 105 | } else { | ||
| 106 | childregs->regs[28] = (unsigned long) ti; /* kernel fork */ | ||
| 107 | childregs->regs[0] = (unsigned long) childregs; | ||
| 108 | } | ||
| 109 | |||
| 110 | p->thread.reg0 = (unsigned long) childregs; | ||
| 111 | p->thread.reg3 = (unsigned long) ret_from_fork; | ||
| 112 | p->thread.cp0_psr = 0; | ||
| 113 | |||
| 114 | return 0; | ||
| 115 | } | ||
| 116 | |||
| 117 | /* Fill in the fpu structure for a core dump. */ | ||
| 118 | int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r) | ||
| 119 | { | ||
| 120 | return 1; | ||
| 121 | } | ||
| 122 | |||
| 123 | static void __noreturn | ||
| 124 | kernel_thread_helper(void *unused0, int (*fn)(void *), | ||
| 125 | void *arg, void *unused1) | ||
| 126 | { | ||
| 127 | do_exit(fn(arg)); | ||
| 128 | } | ||
| 129 | |||
| 130 | /* | ||
| 131 | * Create a kernel thread. | ||
| 132 | */ | ||
| 133 | long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) | ||
| 134 | { | ||
| 135 | struct pt_regs regs; | ||
| 136 | |||
| 137 | memset(®s, 0, sizeof(regs)); | ||
| 138 | |||
| 139 | regs.regs[6] = (unsigned long) arg; | ||
| 140 | regs.regs[5] = (unsigned long) fn; | ||
| 141 | regs.cp0_epc = (unsigned long) kernel_thread_helper; | ||
| 142 | regs.cp0_psr = (regs.cp0_psr & ~(0x1|0x4|0x8)) | \ | ||
| 143 | ((regs.cp0_psr & 0x3) << 2); | ||
| 144 | |||
| 145 | return do_fork(flags | CLONE_VM | CLONE_UNTRACED, \ | ||
| 146 | 0, ®s, 0, NULL, NULL); | ||
| 147 | } | ||
| 148 | |||
| 149 | unsigned long thread_saved_pc(struct task_struct *tsk) | ||
| 150 | { | ||
| 151 | return task_pt_regs(tsk)->cp0_epc; | ||
| 152 | } | ||
| 153 | |||
| 154 | unsigned long get_wchan(struct task_struct *task) | ||
| 155 | { | ||
| 156 | if (!task || task == current || task->state == TASK_RUNNING) | ||
| 157 | return 0; | ||
| 158 | |||
| 159 | if (!task_stack_page(task)) | ||
| 160 | return 0; | ||
| 161 | |||
| 162 | return task_pt_regs(task)->cp0_epc; | ||
| 163 | } | ||
| 164 | |||
| 165 | unsigned long arch_align_stack(unsigned long sp) | ||
| 166 | { | ||
| 167 | return sp; | ||
| 168 | } | ||
diff --git a/arch/score/kernel/ptrace.c b/arch/score/kernel/ptrace.c new file mode 100644 index 000000000000..174c6422b096 --- /dev/null +++ b/arch/score/kernel/ptrace.c | |||
| @@ -0,0 +1,382 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/ptrace.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/elf.h> | ||
| 27 | #include <linux/kernel.h> | ||
| 28 | #include <linux/mm.h> | ||
| 29 | #include <linux/ptrace.h> | ||
| 30 | #include <linux/regset.h> | ||
| 31 | |||
| 32 | #include <asm/uaccess.h> | ||
| 33 | |||
| 34 | /* | ||
| 35 | * retrieve the contents of SCORE userspace general registers | ||
| 36 | */ | ||
| 37 | static int genregs_get(struct task_struct *target, | ||
| 38 | const struct user_regset *regset, | ||
| 39 | unsigned int pos, unsigned int count, | ||
| 40 | void *kbuf, void __user *ubuf) | ||
| 41 | { | ||
| 42 | const struct pt_regs *regs = task_pt_regs(target); | ||
| 43 | int ret; | ||
| 44 | |||
| 45 | /* skip 9 * sizeof(unsigned long) not use for pt_regs */ | ||
| 46 | ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, | ||
| 47 | 0, offsetof(struct pt_regs, regs)); | ||
| 48 | |||
| 49 | /* r0 - r31, cel, ceh, sr0, sr1, sr2, epc, ema, psr, ecr, condition */ | ||
| 50 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | ||
| 51 | regs->regs, | ||
| 52 | offsetof(struct pt_regs, regs), | ||
| 53 | offsetof(struct pt_regs, cp0_condition)); | ||
| 54 | |||
| 55 | if (!ret) | ||
| 56 | ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, | ||
| 57 | sizeof(struct pt_regs), -1); | ||
| 58 | |||
| 59 | return ret; | ||
| 60 | } | ||
| 61 | |||
| 62 | /* | ||
| 63 | * update the contents of the SCORE userspace general registers | ||
| 64 | */ | ||
| 65 | static int genregs_set(struct task_struct *target, | ||
| 66 | const struct user_regset *regset, | ||
| 67 | unsigned int pos, unsigned int count, | ||
| 68 | const void *kbuf, const void __user *ubuf) | ||
| 69 | { | ||
| 70 | struct pt_regs *regs = task_pt_regs(target); | ||
| 71 | int ret; | ||
| 72 | |||
| 73 | /* skip 9 * sizeof(unsigned long) */ | ||
| 74 | ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, | ||
| 75 | 0, offsetof(struct pt_regs, regs)); | ||
| 76 | |||
| 77 | /* r0 - r31, cel, ceh, sr0, sr1, sr2, epc, ema, psr, ecr, condition */ | ||
| 78 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | ||
| 79 | regs->regs, | ||
| 80 | offsetof(struct pt_regs, regs), | ||
| 81 | offsetof(struct pt_regs, cp0_condition)); | ||
| 82 | |||
| 83 | if (!ret) | ||
| 84 | ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, | ||
| 85 | sizeof(struct pt_regs), -1); | ||
| 86 | |||
| 87 | return ret; | ||
| 88 | } | ||
| 89 | |||
| 90 | /* | ||
| 91 | * Define the register sets available on the score7 under Linux | ||
| 92 | */ | ||
| 93 | enum score7_regset { | ||
| 94 | REGSET_GENERAL, | ||
| 95 | }; | ||
| 96 | |||
| 97 | static const struct user_regset score7_regsets[] = { | ||
| 98 | [REGSET_GENERAL] = { | ||
| 99 | .core_note_type = NT_PRSTATUS, | ||
| 100 | .n = ELF_NGREG, | ||
| 101 | .size = sizeof(long), | ||
| 102 | .align = sizeof(long), | ||
| 103 | .get = genregs_get, | ||
| 104 | .set = genregs_set, | ||
| 105 | }, | ||
| 106 | }; | ||
| 107 | |||
| 108 | static const struct user_regset_view user_score_native_view = { | ||
| 109 | .name = "score7", | ||
| 110 | .e_machine = EM_SCORE7, | ||
| 111 | .regsets = score7_regsets, | ||
| 112 | .n = ARRAY_SIZE(score7_regsets), | ||
| 113 | }; | ||
| 114 | |||
| 115 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | ||
| 116 | { | ||
| 117 | return &user_score_native_view; | ||
| 118 | } | ||
| 119 | |||
| 120 | static int is_16bitinsn(unsigned long insn) | ||
| 121 | { | ||
| 122 | if ((insn & INSN32_MASK) == INSN32_MASK) | ||
| 123 | return 0; | ||
| 124 | else | ||
| 125 | return 1; | ||
| 126 | } | ||
| 127 | |||
| 128 | int | ||
| 129 | read_tsk_long(struct task_struct *child, | ||
| 130 | unsigned long addr, unsigned long *res) | ||
| 131 | { | ||
| 132 | int copied; | ||
| 133 | |||
| 134 | copied = access_process_vm(child, addr, res, sizeof(*res), 0); | ||
| 135 | |||
| 136 | return copied != sizeof(*res) ? -EIO : 0; | ||
| 137 | } | ||
| 138 | |||
| 139 | int | ||
| 140 | read_tsk_short(struct task_struct *child, | ||
| 141 | unsigned long addr, unsigned short *res) | ||
| 142 | { | ||
| 143 | int copied; | ||
| 144 | |||
| 145 | copied = access_process_vm(child, addr, res, sizeof(*res), 0); | ||
| 146 | |||
| 147 | return copied != sizeof(*res) ? -EIO : 0; | ||
| 148 | } | ||
| 149 | |||
| 150 | static int | ||
| 151 | write_tsk_short(struct task_struct *child, | ||
| 152 | unsigned long addr, unsigned short val) | ||
| 153 | { | ||
| 154 | int copied; | ||
| 155 | |||
| 156 | copied = access_process_vm(child, addr, &val, sizeof(val), 1); | ||
| 157 | |||
| 158 | return copied != sizeof(val) ? -EIO : 0; | ||
| 159 | } | ||
| 160 | |||
| 161 | static int | ||
| 162 | write_tsk_long(struct task_struct *child, | ||
| 163 | unsigned long addr, unsigned long val) | ||
| 164 | { | ||
| 165 | int copied; | ||
| 166 | |||
| 167 | copied = access_process_vm(child, addr, &val, sizeof(val), 1); | ||
| 168 | |||
| 169 | return copied != sizeof(val) ? -EIO : 0; | ||
| 170 | } | ||
| 171 | |||
| 172 | void user_enable_single_step(struct task_struct *child) | ||
| 173 | { | ||
| 174 | /* far_epc is the target of branch */ | ||
| 175 | unsigned int epc, far_epc = 0; | ||
| 176 | unsigned long epc_insn, far_epc_insn; | ||
| 177 | int ninsn_type; /* next insn type 0=16b, 1=32b */ | ||
| 178 | unsigned int tmp, tmp2; | ||
| 179 | struct pt_regs *regs = task_pt_regs(child); | ||
| 180 | child->thread.single_step = 1; | ||
| 181 | child->thread.ss_nextcnt = 1; | ||
| 182 | epc = regs->cp0_epc; | ||
| 183 | |||
| 184 | read_tsk_long(child, epc, &epc_insn); | ||
| 185 | |||
| 186 | if (is_16bitinsn(epc_insn)) { | ||
| 187 | if ((epc_insn & J16M) == J16) { | ||
| 188 | tmp = epc_insn & 0xFFE; | ||
| 189 | epc = (epc & 0xFFFFF000) | tmp; | ||
| 190 | } else if ((epc_insn & B16M) == B16) { | ||
| 191 | child->thread.ss_nextcnt = 2; | ||
| 192 | tmp = (epc_insn & 0xFF) << 1; | ||
| 193 | tmp = tmp << 23; | ||
| 194 | tmp = (unsigned int)((int) tmp >> 23); | ||
| 195 | far_epc = epc + tmp; | ||
| 196 | epc += 2; | ||
| 197 | } else if ((epc_insn & BR16M) == BR16) { | ||
| 198 | child->thread.ss_nextcnt = 2; | ||
| 199 | tmp = (epc_insn >> 4) & 0xF; | ||
| 200 | far_epc = regs->regs[tmp]; | ||
| 201 | epc += 2; | ||
| 202 | } else | ||
| 203 | epc += 2; | ||
| 204 | } else { | ||
| 205 | if ((epc_insn & J32M) == J32) { | ||
| 206 | tmp = epc_insn & 0x03FFFFFE; | ||
| 207 | tmp2 = tmp & 0x7FFF; | ||
| 208 | tmp = (((tmp >> 16) & 0x3FF) << 15) | tmp2; | ||
| 209 | epc = (epc & 0xFFC00000) | tmp; | ||
| 210 | } else if ((epc_insn & B32M) == B32) { | ||
| 211 | child->thread.ss_nextcnt = 2; | ||
| 212 | tmp = epc_insn & 0x03FFFFFE; /* discard LK bit */ | ||
| 213 | tmp2 = tmp & 0x3FF; | ||
| 214 | tmp = (((tmp >> 16) & 0x3FF) << 10) | tmp2; /* 20bit */ | ||
| 215 | tmp = tmp << 12; | ||
| 216 | tmp = (unsigned int)((int) tmp >> 12); | ||
| 217 | far_epc = epc + tmp; | ||
| 218 | epc += 4; | ||
| 219 | } else if ((epc_insn & BR32M) == BR32) { | ||
| 220 | child->thread.ss_nextcnt = 2; | ||
| 221 | tmp = (epc_insn >> 16) & 0x1F; | ||
| 222 | far_epc = regs->regs[tmp]; | ||
| 223 | epc += 4; | ||
| 224 | } else | ||
| 225 | epc += 4; | ||
| 226 | } | ||
| 227 | |||
| 228 | if (child->thread.ss_nextcnt == 1) { | ||
| 229 | read_tsk_long(child, epc, &epc_insn); | ||
| 230 | |||
| 231 | if (is_16bitinsn(epc_insn)) { | ||
| 232 | write_tsk_short(child, epc, SINGLESTEP16_INSN); | ||
| 233 | ninsn_type = 0; | ||
| 234 | } else { | ||
| 235 | write_tsk_long(child, epc, SINGLESTEP32_INSN); | ||
| 236 | ninsn_type = 1; | ||
| 237 | } | ||
| 238 | |||
| 239 | if (ninsn_type == 0) { /* 16bits */ | ||
| 240 | child->thread.insn1_type = 0; | ||
| 241 | child->thread.addr1 = epc; | ||
| 242 | /* the insn may have 32bit data */ | ||
| 243 | child->thread.insn1 = (short)epc_insn; | ||
| 244 | } else { | ||
| 245 | child->thread.insn1_type = 1; | ||
| 246 | child->thread.addr1 = epc; | ||
| 247 | child->thread.insn1 = epc_insn; | ||
| 248 | } | ||
| 249 | } else { | ||
| 250 | /* branch! have two target child->thread.ss_nextcnt=2 */ | ||
| 251 | read_tsk_long(child, epc, &epc_insn); | ||
| 252 | read_tsk_long(child, far_epc, &far_epc_insn); | ||
| 253 | if (is_16bitinsn(epc_insn)) { | ||
| 254 | write_tsk_short(child, epc, SINGLESTEP16_INSN); | ||
| 255 | ninsn_type = 0; | ||
| 256 | } else { | ||
| 257 | write_tsk_long(child, epc, SINGLESTEP32_INSN); | ||
| 258 | ninsn_type = 1; | ||
| 259 | } | ||
| 260 | |||
| 261 | if (ninsn_type == 0) { /* 16bits */ | ||
| 262 | child->thread.insn1_type = 0; | ||
| 263 | child->thread.addr1 = epc; | ||
| 264 | /* the insn may have 32bit data */ | ||
| 265 | child->thread.insn1 = (short)epc_insn; | ||
| 266 | } else { | ||
| 267 | child->thread.insn1_type = 1; | ||
| 268 | child->thread.addr1 = epc; | ||
| 269 | child->thread.insn1 = epc_insn; | ||
| 270 | } | ||
| 271 | |||
| 272 | if (is_16bitinsn(far_epc_insn)) { | ||
| 273 | write_tsk_short(child, far_epc, SINGLESTEP16_INSN); | ||
| 274 | ninsn_type = 0; | ||
| 275 | } else { | ||
| 276 | write_tsk_long(child, far_epc, SINGLESTEP32_INSN); | ||
| 277 | ninsn_type = 1; | ||
| 278 | } | ||
| 279 | |||
| 280 | if (ninsn_type == 0) { /* 16bits */ | ||
| 281 | child->thread.insn2_type = 0; | ||
| 282 | child->thread.addr2 = far_epc; | ||
| 283 | /* the insn may have 32bit data */ | ||
| 284 | child->thread.insn2 = (short)far_epc_insn; | ||
| 285 | } else { | ||
| 286 | child->thread.insn2_type = 1; | ||
| 287 | child->thread.addr2 = far_epc; | ||
| 288 | child->thread.insn2 = far_epc_insn; | ||
| 289 | } | ||
| 290 | } | ||
| 291 | } | ||
| 292 | |||
| 293 | void user_disable_single_step(struct task_struct *child) | ||
| 294 | { | ||
| 295 | if (child->thread.insn1_type == 0) | ||
| 296 | write_tsk_short(child, child->thread.addr1, | ||
| 297 | child->thread.insn1); | ||
| 298 | |||
| 299 | if (child->thread.insn1_type == 1) | ||
| 300 | write_tsk_long(child, child->thread.addr1, | ||
| 301 | child->thread.insn1); | ||
| 302 | |||
| 303 | if (child->thread.ss_nextcnt == 2) { /* branch */ | ||
| 304 | if (child->thread.insn1_type == 0) | ||
| 305 | write_tsk_short(child, child->thread.addr1, | ||
| 306 | child->thread.insn1); | ||
| 307 | if (child->thread.insn1_type == 1) | ||
| 308 | write_tsk_long(child, child->thread.addr1, | ||
| 309 | child->thread.insn1); | ||
| 310 | if (child->thread.insn2_type == 0) | ||
| 311 | write_tsk_short(child, child->thread.addr2, | ||
| 312 | child->thread.insn2); | ||
| 313 | if (child->thread.insn2_type == 1) | ||
| 314 | write_tsk_long(child, child->thread.addr2, | ||
| 315 | child->thread.insn2); | ||
| 316 | } | ||
| 317 | |||
| 318 | child->thread.single_step = 0; | ||
| 319 | child->thread.ss_nextcnt = 0; | ||
| 320 | } | ||
| 321 | |||
| 322 | void ptrace_disable(struct task_struct *child) | ||
| 323 | { | ||
| 324 | user_disable_single_step(child); | ||
| 325 | } | ||
| 326 | |||
| 327 | long | ||
| 328 | arch_ptrace(struct task_struct *child, long request, long addr, long data) | ||
| 329 | { | ||
| 330 | int ret; | ||
| 331 | unsigned long __user *datap = (void __user *)data; | ||
| 332 | |||
| 333 | switch (request) { | ||
| 334 | case PTRACE_GETREGS: | ||
| 335 | ret = copy_regset_to_user(child, &user_score_native_view, | ||
| 336 | REGSET_GENERAL, | ||
| 337 | 0, sizeof(struct pt_regs), | ||
| 338 | (void __user *)datap); | ||
| 339 | break; | ||
| 340 | |||
| 341 | case PTRACE_SETREGS: | ||
| 342 | ret = copy_regset_from_user(child, &user_score_native_view, | ||
| 343 | REGSET_GENERAL, | ||
| 344 | 0, sizeof(struct pt_regs), | ||
| 345 | (const void __user *)datap); | ||
| 346 | break; | ||
| 347 | |||
| 348 | default: | ||
| 349 | ret = ptrace_request(child, request, addr, data); | ||
| 350 | break; | ||
| 351 | } | ||
| 352 | |||
| 353 | return ret; | ||
| 354 | } | ||
| 355 | |||
| 356 | /* | ||
| 357 | * Notification of system call entry/exit | ||
| 358 | * - triggered by current->work.syscall_trace | ||
| 359 | */ | ||
| 360 | asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit) | ||
| 361 | { | ||
| 362 | if (!(current->ptrace & PT_PTRACED)) | ||
| 363 | return; | ||
| 364 | |||
| 365 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | ||
| 366 | return; | ||
| 367 | |||
| 368 | /* The 0x80 provides a way for the tracing parent to distinguish | ||
| 369 | between a syscall stop and SIGTRAP delivery. */ | ||
| 370 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? | ||
| 371 | 0x80 : 0)); | ||
| 372 | |||
| 373 | /* | ||
| 374 | * this isn't the same as continuing with a signal, but it will do | ||
| 375 | * for normal use. strace only continues with a signal if the | ||
| 376 | * stopping signal is not SIGTRAP. -brl | ||
| 377 | */ | ||
| 378 | if (current->exit_code) { | ||
| 379 | send_sig(current->exit_code, current, 1); | ||
| 380 | current->exit_code = 0; | ||
| 381 | } | ||
| 382 | } | ||
diff --git a/arch/score/kernel/setup.c b/arch/score/kernel/setup.c new file mode 100644 index 000000000000..6a2503c75c4e --- /dev/null +++ b/arch/score/kernel/setup.c | |||
| @@ -0,0 +1,159 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/setup.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/bootmem.h> | ||
| 27 | #include <linux/initrd.h> | ||
| 28 | #include <linux/ioport.h> | ||
| 29 | #include <linux/mm.h> | ||
| 30 | #include <linux/seq_file.h> | ||
| 31 | #include <linux/screen_info.h> | ||
| 32 | |||
| 33 | #include <asm-generic/sections.h> | ||
| 34 | #include <asm/setup.h> | ||
| 35 | |||
| 36 | struct screen_info screen_info; | ||
| 37 | unsigned long kernelsp; | ||
| 38 | |||
| 39 | static char command_line[COMMAND_LINE_SIZE]; | ||
| 40 | static struct resource code_resource = { .name = "Kernel code",}; | ||
| 41 | static struct resource data_resource = { .name = "Kernel data",}; | ||
| 42 | |||
| 43 | static void __init bootmem_init(void) | ||
| 44 | { | ||
| 45 | unsigned long start_pfn, bootmap_size; | ||
| 46 | unsigned long size = initrd_end - initrd_start; | ||
| 47 | |||
| 48 | start_pfn = PFN_UP(__pa(&_end)); | ||
| 49 | |||
| 50 | min_low_pfn = PFN_UP(MEMORY_START); | ||
| 51 | max_low_pfn = PFN_UP(MEMORY_START + MEMORY_SIZE); | ||
| 52 | |||
| 53 | /* Initialize the boot-time allocator with low memory only. */ | ||
| 54 | bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, | ||
| 55 | min_low_pfn, max_low_pfn); | ||
| 56 | add_active_range(0, min_low_pfn, max_low_pfn); | ||
| 57 | |||
| 58 | free_bootmem(PFN_PHYS(start_pfn), | ||
| 59 | (max_low_pfn - start_pfn) << PAGE_SHIFT); | ||
| 60 | memory_present(0, start_pfn, max_low_pfn); | ||
| 61 | |||
| 62 | /* Reserve space for the bootmem bitmap. */ | ||
| 63 | reserve_bootmem(PFN_PHYS(start_pfn), bootmap_size, BOOTMEM_DEFAULT); | ||
| 64 | |||
| 65 | if (size == 0) { | ||
| 66 | printk(KERN_INFO "Initrd not found or empty"); | ||
| 67 | goto disable; | ||
| 68 | } | ||
| 69 | |||
| 70 | if (__pa(initrd_end) > PFN_PHYS(max_low_pfn)) { | ||
| 71 | printk(KERN_ERR "Initrd extends beyond end of memory"); | ||
| 72 | goto disable; | ||
| 73 | } | ||
| 74 | |||
| 75 | /* Reserve space for the initrd bitmap. */ | ||
| 76 | reserve_bootmem(__pa(initrd_start), size, BOOTMEM_DEFAULT); | ||
| 77 | initrd_below_start_ok = 1; | ||
| 78 | |||
| 79 | pr_info("Initial ramdisk at: 0x%lx (%lu bytes)\n", | ||
| 80 | initrd_start, size); | ||
| 81 | return; | ||
| 82 | disable: | ||
| 83 | printk(KERN_CONT " - disabling initrd\n"); | ||
| 84 | initrd_start = 0; | ||
| 85 | initrd_end = 0; | ||
| 86 | } | ||
| 87 | |||
| 88 | static void __init resource_init(void) | ||
| 89 | { | ||
| 90 | struct resource *res; | ||
| 91 | |||
| 92 | code_resource.start = __pa(&_text); | ||
| 93 | code_resource.end = __pa(&_etext) - 1; | ||
| 94 | data_resource.start = __pa(&_etext); | ||
| 95 | data_resource.end = __pa(&_edata) - 1; | ||
| 96 | |||
| 97 | res = alloc_bootmem(sizeof(struct resource)); | ||
| 98 | res->name = "System RAM"; | ||
| 99 | res->start = MEMORY_START; | ||
| 100 | res->end = MEMORY_START + MEMORY_SIZE - 1; | ||
| 101 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; | ||
| 102 | request_resource(&iomem_resource, res); | ||
| 103 | |||
| 104 | request_resource(res, &code_resource); | ||
| 105 | request_resource(res, &data_resource); | ||
| 106 | } | ||
| 107 | |||
| 108 | void __init setup_arch(char **cmdline_p) | ||
| 109 | { | ||
| 110 | randomize_va_space = 0; | ||
| 111 | *cmdline_p = command_line; | ||
| 112 | |||
| 113 | cpu_cache_init(); | ||
| 114 | tlb_init(); | ||
| 115 | bootmem_init(); | ||
| 116 | paging_init(); | ||
| 117 | resource_init(); | ||
| 118 | } | ||
| 119 | |||
| 120 | static int show_cpuinfo(struct seq_file *m, void *v) | ||
| 121 | { | ||
| 122 | unsigned long n = (unsigned long) v - 1; | ||
| 123 | |||
| 124 | seq_printf(m, "processor\t\t: %ld\n", n); | ||
| 125 | seq_printf(m, "\n"); | ||
| 126 | |||
| 127 | return 0; | ||
| 128 | } | ||
| 129 | |||
| 130 | static void *c_start(struct seq_file *m, loff_t *pos) | ||
| 131 | { | ||
| 132 | unsigned long i = *pos; | ||
| 133 | |||
| 134 | return i < 1 ? (void *) (i + 1) : NULL; | ||
| 135 | } | ||
| 136 | |||
| 137 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | ||
| 138 | { | ||
| 139 | ++*pos; | ||
| 140 | return c_start(m, pos); | ||
| 141 | } | ||
| 142 | |||
| 143 | static void c_stop(struct seq_file *m, void *v) | ||
| 144 | { | ||
| 145 | } | ||
| 146 | |||
| 147 | const struct seq_operations cpuinfo_op = { | ||
| 148 | .start = c_start, | ||
| 149 | .next = c_next, | ||
| 150 | .stop = c_stop, | ||
| 151 | .show = show_cpuinfo, | ||
| 152 | }; | ||
| 153 | |||
| 154 | static int __init topology_init(void) | ||
| 155 | { | ||
| 156 | return 0; | ||
| 157 | } | ||
| 158 | |||
| 159 | subsys_initcall(topology_init); | ||
diff --git a/arch/score/kernel/signal.c b/arch/score/kernel/signal.c new file mode 100644 index 000000000000..aa57440e4973 --- /dev/null +++ b/arch/score/kernel/signal.c | |||
| @@ -0,0 +1,361 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/signal.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/errno.h> | ||
| 27 | #include <linux/signal.h> | ||
| 28 | #include <linux/ptrace.h> | ||
| 29 | #include <linux/unistd.h> | ||
| 30 | #include <linux/uaccess.h> | ||
| 31 | |||
| 32 | #include <asm/cacheflush.h> | ||
| 33 | #include <asm/syscalls.h> | ||
| 34 | #include <asm/ucontext.h> | ||
| 35 | |||
| 36 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | ||
| 37 | |||
| 38 | struct rt_sigframe { | ||
| 39 | u32 rs_ass[4]; /* argument save space */ | ||
| 40 | u32 rs_code[2]; /* signal trampoline */ | ||
| 41 | struct siginfo rs_info; | ||
| 42 | struct ucontext rs_uc; | ||
| 43 | }; | ||
| 44 | |||
| 45 | static int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) | ||
| 46 | { | ||
| 47 | int err = 0; | ||
| 48 | unsigned long reg; | ||
| 49 | |||
| 50 | reg = regs->cp0_epc; err |= __put_user(reg, &sc->sc_pc); | ||
| 51 | err |= __put_user(regs->cp0_psr, &sc->sc_psr); | ||
| 52 | err |= __put_user(regs->cp0_condition, &sc->sc_condition); | ||
| 53 | |||
| 54 | |||
| 55 | #define save_gp_reg(i) { \ | ||
| 56 | reg = regs->regs[i]; \ | ||
| 57 | err |= __put_user(reg, &sc->sc_regs[i]); \ | ||
| 58 | } while (0) | ||
| 59 | save_gp_reg(0); save_gp_reg(1); save_gp_reg(2); | ||
| 60 | save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); | ||
| 61 | save_gp_reg(6); save_gp_reg(7); save_gp_reg(8); | ||
| 62 | save_gp_reg(9); save_gp_reg(10); save_gp_reg(11); | ||
| 63 | save_gp_reg(12); save_gp_reg(13); save_gp_reg(14); | ||
| 64 | save_gp_reg(15); save_gp_reg(16); save_gp_reg(17); | ||
| 65 | save_gp_reg(18); save_gp_reg(19); save_gp_reg(20); | ||
| 66 | save_gp_reg(21); save_gp_reg(22); save_gp_reg(23); | ||
| 67 | save_gp_reg(24); save_gp_reg(25); save_gp_reg(26); | ||
| 68 | save_gp_reg(27); save_gp_reg(28); save_gp_reg(29); | ||
| 69 | #undef save_gp_reg | ||
| 70 | |||
| 71 | reg = regs->ceh; err |= __put_user(reg, &sc->sc_mdceh); | ||
| 72 | reg = regs->cel; err |= __put_user(reg, &sc->sc_mdcel); | ||
| 73 | err |= __put_user(regs->cp0_ecr, &sc->sc_ecr); | ||
| 74 | err |= __put_user(regs->cp0_ema, &sc->sc_ema); | ||
| 75 | |||
| 76 | return err; | ||
| 77 | } | ||
| 78 | |||
| 79 | static int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) | ||
| 80 | { | ||
| 81 | int err = 0; | ||
| 82 | u32 reg; | ||
| 83 | |||
| 84 | err |= __get_user(regs->cp0_epc, &sc->sc_pc); | ||
| 85 | err |= __get_user(regs->cp0_condition, &sc->sc_condition); | ||
| 86 | |||
| 87 | err |= __get_user(reg, &sc->sc_mdceh); | ||
| 88 | regs->ceh = (int) reg; | ||
| 89 | err |= __get_user(reg, &sc->sc_mdcel); | ||
| 90 | regs->cel = (int) reg; | ||
| 91 | |||
| 92 | err |= __get_user(reg, &sc->sc_psr); | ||
| 93 | regs->cp0_psr = (int) reg; | ||
| 94 | err |= __get_user(reg, &sc->sc_ecr); | ||
| 95 | regs->cp0_ecr = (int) reg; | ||
| 96 | err |= __get_user(reg, &sc->sc_ema); | ||
| 97 | regs->cp0_ema = (int) reg; | ||
| 98 | |||
| 99 | #define restore_gp_reg(i) do { \ | ||
| 100 | err |= __get_user(reg, &sc->sc_regs[i]); \ | ||
| 101 | regs->regs[i] = reg; \ | ||
| 102 | } while (0) | ||
| 103 | restore_gp_reg(0); restore_gp_reg(1); restore_gp_reg(2); | ||
| 104 | restore_gp_reg(3); restore_gp_reg(4); restore_gp_reg(5); | ||
| 105 | restore_gp_reg(6); restore_gp_reg(7); restore_gp_reg(8); | ||
| 106 | restore_gp_reg(9); restore_gp_reg(10); restore_gp_reg(11); | ||
| 107 | restore_gp_reg(12); restore_gp_reg(13); restore_gp_reg(14); | ||
| 108 | restore_gp_reg(15); restore_gp_reg(16); restore_gp_reg(17); | ||
| 109 | restore_gp_reg(18); restore_gp_reg(19); restore_gp_reg(20); | ||
| 110 | restore_gp_reg(21); restore_gp_reg(22); restore_gp_reg(23); | ||
| 111 | restore_gp_reg(24); restore_gp_reg(25); restore_gp_reg(26); | ||
| 112 | restore_gp_reg(27); restore_gp_reg(28); restore_gp_reg(29); | ||
| 113 | #undef restore_gp_reg | ||
| 114 | |||
| 115 | return err; | ||
| 116 | } | ||
| 117 | |||
| 118 | /* | ||
| 119 | * Determine which stack to use.. | ||
| 120 | */ | ||
| 121 | static void __user *get_sigframe(struct k_sigaction *ka, | ||
| 122 | struct pt_regs *regs, size_t frame_size) | ||
| 123 | { | ||
| 124 | unsigned long sp; | ||
| 125 | |||
| 126 | /* Default to using normal stack */ | ||
| 127 | sp = regs->regs[0]; | ||
| 128 | sp -= 32; | ||
| 129 | |||
| 130 | /* This is the X/Open sanctioned signal stack switching. */ | ||
| 131 | if ((ka->sa.sa_flags & SA_ONSTACK) && (!on_sig_stack(sp))) | ||
| 132 | sp = current->sas_ss_sp + current->sas_ss_size; | ||
| 133 | |||
| 134 | return (void __user*)((sp - frame_size) & ~7); | ||
| 135 | } | ||
| 136 | |||
| 137 | asmlinkage long | ||
| 138 | score_sigaltstack(struct pt_regs *regs) | ||
| 139 | { | ||
| 140 | const stack_t __user *uss = (const stack_t __user *) regs->regs[4]; | ||
| 141 | stack_t __user *uoss = (stack_t __user *) regs->regs[5]; | ||
| 142 | unsigned long usp = regs->regs[0]; | ||
| 143 | |||
| 144 | return do_sigaltstack(uss, uoss, usp); | ||
| 145 | } | ||
| 146 | |||
| 147 | asmlinkage long | ||
| 148 | score_rt_sigreturn(struct pt_regs *regs) | ||
| 149 | { | ||
| 150 | struct rt_sigframe __user *frame; | ||
| 151 | sigset_t set; | ||
| 152 | stack_t st; | ||
| 153 | int sig; | ||
| 154 | |||
| 155 | frame = (struct rt_sigframe __user *) regs->regs[0]; | ||
| 156 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
| 157 | goto badframe; | ||
| 158 | if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set))) | ||
| 159 | goto badframe; | ||
| 160 | |||
| 161 | sigdelsetmask(&set, ~_BLOCKABLE); | ||
| 162 | spin_lock_irq(¤t->sighand->siglock); | ||
| 163 | current->blocked = set; | ||
| 164 | recalc_sigpending(); | ||
| 165 | spin_unlock_irq(¤t->sighand->siglock); | ||
| 166 | |||
| 167 | sig = restore_sigcontext(regs, &frame->rs_uc.uc_mcontext); | ||
| 168 | if (sig < 0) | ||
| 169 | goto badframe; | ||
| 170 | else if (sig) | ||
| 171 | force_sig(sig, current); | ||
| 172 | |||
| 173 | if (__copy_from_user(&st, &frame->rs_uc.uc_stack, sizeof(st))) | ||
| 174 | goto badframe; | ||
| 175 | |||
| 176 | /* It is more difficult to avoid calling this function than to | ||
| 177 | call it and ignore errors. */ | ||
| 178 | do_sigaltstack((stack_t __user *)&st, NULL, regs->regs[0]); | ||
| 179 | |||
| 180 | __asm__ __volatile__( | ||
| 181 | "mv\tr0, %0\n\t" | ||
| 182 | "la\tr8, syscall_exit\n\t" | ||
| 183 | "br\tr8\n\t" | ||
| 184 | : : "r" (regs) : "r8"); | ||
| 185 | |||
| 186 | badframe: | ||
| 187 | force_sig(SIGSEGV, current); | ||
| 188 | |||
| 189 | return 0; | ||
| 190 | } | ||
| 191 | |||
| 192 | static int setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, | ||
| 193 | int signr, sigset_t *set, siginfo_t *info) | ||
| 194 | { | ||
| 195 | struct rt_sigframe __user *frame; | ||
| 196 | int err = 0; | ||
| 197 | |||
| 198 | frame = get_sigframe(ka, regs, sizeof(*frame)); | ||
| 199 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | ||
| 200 | goto give_sigsegv; | ||
| 201 | |||
| 202 | /* | ||
| 203 | * Set up the return code ... | ||
| 204 | * | ||
| 205 | * li v0, __NR_rt_sigreturn | ||
| 206 | * syscall | ||
| 207 | */ | ||
| 208 | err |= __put_user(0x87788000 + __NR_rt_sigreturn*2, | ||
| 209 | frame->rs_code + 0); | ||
| 210 | err |= __put_user(0x80008002, frame->rs_code + 1); | ||
| 211 | flush_cache_sigtramp((unsigned long) frame->rs_code); | ||
| 212 | |||
| 213 | err |= copy_siginfo_to_user(&frame->rs_info, info); | ||
| 214 | err |= __put_user(0, &frame->rs_uc.uc_flags); | ||
| 215 | err |= __put_user(NULL, &frame->rs_uc.uc_link); | ||
| 216 | err |= __put_user((void __user *)current->sas_ss_sp, | ||
| 217 | &frame->rs_uc.uc_stack.ss_sp); | ||
| 218 | err |= __put_user(sas_ss_flags(regs->regs[0]), | ||
| 219 | &frame->rs_uc.uc_stack.ss_flags); | ||
| 220 | err |= __put_user(current->sas_ss_size, | ||
| 221 | &frame->rs_uc.uc_stack.ss_size); | ||
| 222 | err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext); | ||
| 223 | err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set)); | ||
| 224 | |||
| 225 | if (err) | ||
| 226 | goto give_sigsegv; | ||
| 227 | |||
| 228 | regs->regs[0] = (unsigned long) frame; | ||
| 229 | regs->regs[3] = (unsigned long) frame->rs_code; | ||
| 230 | regs->regs[4] = signr; | ||
| 231 | regs->regs[5] = (unsigned long) &frame->rs_info; | ||
| 232 | regs->regs[6] = (unsigned long) &frame->rs_uc; | ||
| 233 | regs->regs[29] = (unsigned long) ka->sa.sa_handler; | ||
| 234 | regs->cp0_epc = (unsigned long) ka->sa.sa_handler; | ||
| 235 | |||
| 236 | return 0; | ||
| 237 | |||
| 238 | give_sigsegv: | ||
| 239 | if (signr == SIGSEGV) | ||
| 240 | ka->sa.sa_handler = SIG_DFL; | ||
| 241 | force_sig(SIGSEGV, current); | ||
| 242 | return -EFAULT; | ||
| 243 | } | ||
| 244 | |||
| 245 | static int handle_signal(unsigned long sig, siginfo_t *info, | ||
| 246 | struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs) | ||
| 247 | { | ||
| 248 | int ret; | ||
| 249 | |||
| 250 | if (regs->is_syscall) { | ||
| 251 | switch (regs->regs[4]) { | ||
| 252 | case ERESTART_RESTARTBLOCK: | ||
| 253 | case ERESTARTNOHAND: | ||
| 254 | regs->regs[4] = EINTR; | ||
| 255 | break; | ||
| 256 | case ERESTARTSYS: | ||
| 257 | if (!(ka->sa.sa_flags & SA_RESTART)) { | ||
| 258 | regs->regs[4] = EINTR; | ||
| 259 | break; | ||
| 260 | } | ||
| 261 | case ERESTARTNOINTR: | ||
| 262 | regs->regs[4] = regs->orig_r4; | ||
| 263 | regs->regs[7] = regs->orig_r7; | ||
| 264 | regs->cp0_epc -= 8; | ||
| 265 | } | ||
| 266 | |||
| 267 | regs->is_syscall = 0; | ||
| 268 | } | ||
| 269 | |||
| 270 | /* | ||
| 271 | * Set up the stack frame | ||
| 272 | */ | ||
| 273 | ret = setup_rt_frame(ka, regs, sig, oldset, info); | ||
| 274 | |||
| 275 | spin_lock_irq(¤t->sighand->siglock); | ||
| 276 | sigorsets(¤t->blocked, ¤t->blocked, &ka->sa.sa_mask); | ||
| 277 | if (!(ka->sa.sa_flags & SA_NODEFER)) | ||
| 278 | sigaddset(¤t->blocked, sig); | ||
| 279 | recalc_sigpending(); | ||
| 280 | spin_unlock_irq(¤t->sighand->siglock); | ||
| 281 | |||
| 282 | return ret; | ||
| 283 | } | ||
| 284 | |||
| 285 | static void do_signal(struct pt_regs *regs) | ||
| 286 | { | ||
| 287 | struct k_sigaction ka; | ||
| 288 | sigset_t *oldset; | ||
| 289 | siginfo_t info; | ||
| 290 | int signr; | ||
| 291 | |||
| 292 | /* | ||
| 293 | * We want the common case to go fast, which is why we may in certain | ||
| 294 | * cases get here from kernel mode. Just return without doing anything | ||
| 295 | * if so. | ||
| 296 | */ | ||
| 297 | if (!user_mode(regs)) | ||
| 298 | return; | ||
| 299 | |||
| 300 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | ||
| 301 | oldset = ¤t->saved_sigmask; | ||
| 302 | else | ||
| 303 | oldset = ¤t->blocked; | ||
| 304 | |||
| 305 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); | ||
| 306 | if (signr > 0) { | ||
| 307 | /* Actually deliver the signal. */ | ||
| 308 | if (handle_signal(signr, &info, &ka, oldset, regs) == 0) { | ||
| 309 | /* | ||
| 310 | * A signal was successfully delivered; the saved | ||
| 311 | * sigmask will have been stored in the signal frame, | ||
| 312 | * and will be restored by sigreturn, so we can simply | ||
| 313 | * clear the TIF_RESTORE_SIGMASK flag. | ||
| 314 | */ | ||
| 315 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | ||
| 316 | clear_thread_flag(TIF_RESTORE_SIGMASK); | ||
| 317 | } | ||
| 318 | |||
| 319 | return; | ||
| 320 | } | ||
| 321 | |||
| 322 | if (regs->is_syscall) { | ||
| 323 | if (regs->regs[4] == ERESTARTNOHAND || | ||
| 324 | regs->regs[4] == ERESTARTSYS || | ||
| 325 | regs->regs[4] == ERESTARTNOINTR) { | ||
| 326 | regs->regs[4] = regs->orig_r4; | ||
| 327 | regs->regs[7] = regs->orig_r7; | ||
| 328 | regs->cp0_epc -= 8; | ||
| 329 | } | ||
| 330 | |||
| 331 | if (regs->regs[4] == ERESTART_RESTARTBLOCK) { | ||
| 332 | regs->regs[27] = __NR_restart_syscall; | ||
| 333 | regs->regs[4] = regs->orig_r4; | ||
| 334 | regs->regs[7] = regs->orig_r7; | ||
| 335 | regs->cp0_epc -= 8; | ||
| 336 | } | ||
| 337 | |||
| 338 | regs->is_syscall = 0; /* Don't deal with this again. */ | ||
| 339 | } | ||
| 340 | |||
| 341 | /* | ||
| 342 | * If there's no signal to deliver, we just put the saved sigmask | ||
| 343 | * back | ||
| 344 | */ | ||
| 345 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) { | ||
| 346 | clear_thread_flag(TIF_RESTORE_SIGMASK); | ||
| 347 | sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); | ||
| 348 | } | ||
| 349 | } | ||
| 350 | |||
| 351 | /* | ||
| 352 | * notification of userspace execution resumption | ||
| 353 | * - triggered by the TIF_WORK_MASK flags | ||
| 354 | */ | ||
| 355 | asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused, | ||
| 356 | __u32 thread_info_flags) | ||
| 357 | { | ||
| 358 | /* deal with pending signal delivery */ | ||
| 359 | if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) | ||
| 360 | do_signal(regs); | ||
| 361 | } | ||
diff --git a/arch/score/kernel/sys_call_table.c b/arch/score/kernel/sys_call_table.c new file mode 100644 index 000000000000..287369b88c43 --- /dev/null +++ b/arch/score/kernel/sys_call_table.c | |||
| @@ -0,0 +1,12 @@ | |||
| 1 | #include <linux/syscalls.h> | ||
| 2 | #include <linux/signal.h> | ||
| 3 | #include <linux/unistd.h> | ||
| 4 | |||
| 5 | #include <asm/syscalls.h> | ||
| 6 | |||
| 7 | #undef __SYSCALL | ||
| 8 | #define __SYSCALL(nr, call) [nr] = (call), | ||
| 9 | |||
| 10 | void *sys_call_table[__NR_syscalls] = { | ||
| 11 | #include <asm/unistd.h> | ||
| 12 | }; | ||
diff --git a/arch/score/kernel/sys_score.c b/arch/score/kernel/sys_score.c new file mode 100644 index 000000000000..001249469866 --- /dev/null +++ b/arch/score/kernel/sys_score.c | |||
| @@ -0,0 +1,151 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/syscall.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/file.h> | ||
| 27 | #include <linux/fs.h> | ||
| 28 | #include <linux/mm.h> | ||
| 29 | #include <linux/mman.h> | ||
| 30 | #include <linux/module.h> | ||
| 31 | #include <linux/unistd.h> | ||
| 32 | #include <linux/syscalls.h> | ||
| 33 | #include <asm/syscalls.h> | ||
| 34 | |||
| 35 | asmlinkage long | ||
| 36 | sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot, | ||
| 37 | unsigned long flags, unsigned long fd, unsigned long pgoff) | ||
| 38 | { | ||
| 39 | int error = -EBADF; | ||
| 40 | struct file *file = NULL; | ||
| 41 | |||
| 42 | if (pgoff & (~PAGE_MASK >> 12)) | ||
| 43 | return -EINVAL; | ||
| 44 | |||
| 45 | flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); | ||
| 46 | if (!(flags & MAP_ANONYMOUS)) { | ||
| 47 | file = fget(fd); | ||
| 48 | if (!file) | ||
| 49 | return error; | ||
| 50 | } | ||
| 51 | |||
| 52 | down_write(¤t->mm->mmap_sem); | ||
| 53 | error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); | ||
| 54 | up_write(¤t->mm->mmap_sem); | ||
| 55 | |||
| 56 | if (file) | ||
| 57 | fput(file); | ||
| 58 | |||
| 59 | return error; | ||
| 60 | } | ||
| 61 | |||
| 62 | asmlinkage long | ||
| 63 | sys_mmap(unsigned long addr, unsigned long len, unsigned long prot, | ||
| 64 | unsigned long flags, unsigned long fd, off_t pgoff) | ||
| 65 | { | ||
| 66 | return sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT); | ||
| 67 | } | ||
| 68 | |||
| 69 | asmlinkage long | ||
| 70 | score_fork(struct pt_regs *regs) | ||
| 71 | { | ||
| 72 | return do_fork(SIGCHLD, regs->regs[0], regs, 0, NULL, NULL); | ||
| 73 | } | ||
| 74 | |||
| 75 | /* | ||
| 76 | * Clone a task - this clones the calling program thread. | ||
| 77 | * This is called indirectly via a small wrapper | ||
| 78 | */ | ||
| 79 | asmlinkage long | ||
| 80 | score_clone(struct pt_regs *regs) | ||
| 81 | { | ||
| 82 | unsigned long clone_flags; | ||
| 83 | unsigned long newsp; | ||
| 84 | int __user *parent_tidptr, *child_tidptr; | ||
| 85 | |||
| 86 | clone_flags = regs->regs[4]; | ||
| 87 | newsp = regs->regs[5]; | ||
| 88 | if (!newsp) | ||
| 89 | newsp = regs->regs[0]; | ||
| 90 | parent_tidptr = (int __user *)regs->regs[6]; | ||
| 91 | child_tidptr = (int __user *)regs->regs[8]; | ||
| 92 | |||
| 93 | return do_fork(clone_flags, newsp, regs, 0, | ||
| 94 | parent_tidptr, child_tidptr); | ||
| 95 | } | ||
| 96 | |||
| 97 | asmlinkage long | ||
| 98 | score_vfork(struct pt_regs *regs) | ||
| 99 | { | ||
| 100 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, | ||
| 101 | regs->regs[0], regs, 0, NULL, NULL); | ||
| 102 | } | ||
| 103 | |||
| 104 | /* | ||
| 105 | * sys_execve() executes a new program. | ||
| 106 | * This is called indirectly via a small wrapper | ||
| 107 | */ | ||
| 108 | asmlinkage long | ||
| 109 | score_execve(struct pt_regs *regs) | ||
| 110 | { | ||
| 111 | int error; | ||
| 112 | char *filename; | ||
| 113 | |||
| 114 | filename = getname((char __user*)regs->regs[4]); | ||
| 115 | error = PTR_ERR(filename); | ||
| 116 | if (IS_ERR(filename)) | ||
| 117 | return error; | ||
| 118 | |||
| 119 | error = do_execve(filename, (char __user *__user*)regs->regs[5], | ||
| 120 | (char __user *__user *) regs->regs[6], regs); | ||
| 121 | |||
| 122 | putname(filename); | ||
| 123 | return error; | ||
| 124 | } | ||
| 125 | |||
| 126 | /* | ||
| 127 | * Do a system call from kernel instead of calling sys_execve so we | ||
| 128 | * end up with proper pt_regs. | ||
| 129 | */ | ||
| 130 | int kernel_execve(const char *filename, char *const argv[], char *const envp[]) | ||
| 131 | { | ||
| 132 | register unsigned long __r4 asm("r4") = (unsigned long) filename; | ||
| 133 | register unsigned long __r5 asm("r5") = (unsigned long) argv; | ||
| 134 | register unsigned long __r6 asm("r6") = (unsigned long) envp; | ||
| 135 | register unsigned long __r7 asm("r7"); | ||
| 136 | |||
| 137 | __asm__ __volatile__ (" \n" | ||
| 138 | "ldi r27, %5 \n" | ||
| 139 | "syscall \n" | ||
| 140 | "mv %0, r4 \n" | ||
| 141 | "mv %1, r7 \n" | ||
| 142 | : "=&r" (__r4), "=r" (__r7) | ||
| 143 | : "r" (__r4), "r" (__r5), "r" (__r6), "i" (__NR_execve) | ||
| 144 | : "r8", "r9", "r10", "r11", "r22", "r23", "r24", "r25", | ||
| 145 | "r26", "r27", "memory"); | ||
| 146 | |||
| 147 | if (__r7 == 0) | ||
| 148 | return __r4; | ||
| 149 | |||
| 150 | return -__r4; | ||
| 151 | } | ||
diff --git a/arch/score/kernel/time.c b/arch/score/kernel/time.c new file mode 100644 index 000000000000..f0a43affb201 --- /dev/null +++ b/arch/score/kernel/time.c | |||
| @@ -0,0 +1,99 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/time.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/clockchips.h> | ||
| 27 | #include <linux/interrupt.h> | ||
| 28 | |||
| 29 | #include <asm/scoreregs.h> | ||
| 30 | |||
| 31 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
| 32 | { | ||
| 33 | struct clock_event_device *evdev = dev_id; | ||
| 34 | |||
| 35 | /* clear timer interrupt flag */ | ||
| 36 | outl(1, P_TIMER0_CPP_REG); | ||
| 37 | evdev->event_handler(evdev); | ||
| 38 | |||
| 39 | return IRQ_HANDLED; | ||
| 40 | } | ||
| 41 | |||
| 42 | static struct irqaction timer_irq = { | ||
| 43 | .handler = timer_interrupt, | ||
| 44 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
| 45 | .name = "timer", | ||
| 46 | }; | ||
| 47 | |||
| 48 | static int score_timer_set_next_event(unsigned long delta, | ||
| 49 | struct clock_event_device *evdev) | ||
| 50 | { | ||
| 51 | outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL); | ||
| 52 | outl(delta, P_TIMER0_PRELOAD); | ||
| 53 | outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL); | ||
| 54 | |||
| 55 | return 0; | ||
| 56 | } | ||
| 57 | |||
| 58 | static void score_timer_set_mode(enum clock_event_mode mode, | ||
| 59 | struct clock_event_device *evdev) | ||
| 60 | { | ||
| 61 | switch (mode) { | ||
| 62 | case CLOCK_EVT_MODE_PERIODIC: | ||
| 63 | outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL); | ||
| 64 | outl(SYSTEM_CLOCK/HZ, P_TIMER0_PRELOAD); | ||
| 65 | outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL); | ||
| 66 | break; | ||
| 67 | case CLOCK_EVT_MODE_ONESHOT: | ||
| 68 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
| 69 | case CLOCK_EVT_MODE_RESUME: | ||
| 70 | case CLOCK_EVT_MODE_UNUSED: | ||
| 71 | break; | ||
| 72 | default: | ||
| 73 | BUG(); | ||
| 74 | } | ||
| 75 | } | ||
| 76 | |||
| 77 | static struct clock_event_device score_clockevent = { | ||
| 78 | .name = "score_clockevent", | ||
| 79 | .features = CLOCK_EVT_FEAT_PERIODIC, | ||
| 80 | .shift = 16, | ||
| 81 | .set_next_event = score_timer_set_next_event, | ||
| 82 | .set_mode = score_timer_set_mode, | ||
| 83 | }; | ||
| 84 | |||
| 85 | void __init time_init(void) | ||
| 86 | { | ||
| 87 | timer_irq.dev_id = &score_clockevent; | ||
| 88 | setup_irq(IRQ_TIMER , &timer_irq); | ||
| 89 | |||
| 90 | /* setup COMPARE clockevent */ | ||
| 91 | score_clockevent.mult = div_sc(SYSTEM_CLOCK, NSEC_PER_SEC, | ||
| 92 | score_clockevent.shift); | ||
| 93 | score_clockevent.max_delta_ns = clockevent_delta2ns((u32)~0, | ||
| 94 | &score_clockevent); | ||
| 95 | score_clockevent.min_delta_ns = clockevent_delta2ns(50, | ||
| 96 | &score_clockevent) + 1; | ||
| 97 | score_clockevent.cpumask = cpumask_of(0); | ||
| 98 | clockevents_register_device(&score_clockevent); | ||
| 99 | } | ||
diff --git a/arch/score/kernel/traps.c b/arch/score/kernel/traps.c new file mode 100644 index 000000000000..0e46fb19a848 --- /dev/null +++ b/arch/score/kernel/traps.c | |||
| @@ -0,0 +1,349 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/traps.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/module.h> | ||
| 27 | #include <linux/sched.h> | ||
| 28 | |||
| 29 | #include <asm/cacheflush.h> | ||
| 30 | #include <asm/irq.h> | ||
| 31 | #include <asm/irq_regs.h> | ||
| 32 | |||
| 33 | unsigned long exception_handlers[32]; | ||
| 34 | |||
| 35 | /* | ||
| 36 | * The architecture-independent show_stack generator | ||
| 37 | */ | ||
| 38 | void show_stack(struct task_struct *task, unsigned long *sp) | ||
| 39 | { | ||
| 40 | int i; | ||
| 41 | long stackdata; | ||
| 42 | |||
| 43 | sp = sp ? sp : (unsigned long *)&sp; | ||
| 44 | |||
| 45 | printk(KERN_NOTICE "Stack: "); | ||
| 46 | i = 1; | ||
| 47 | while ((long) sp & (PAGE_SIZE - 1)) { | ||
| 48 | if (i && ((i % 8) == 0)) | ||
| 49 | printk(KERN_NOTICE "\n"); | ||
| 50 | if (i > 40) { | ||
| 51 | printk(KERN_NOTICE " ..."); | ||
| 52 | break; | ||
| 53 | } | ||
| 54 | |||
| 55 | if (__get_user(stackdata, sp++)) { | ||
| 56 | printk(KERN_NOTICE " (Bad stack address)"); | ||
| 57 | break; | ||
| 58 | } | ||
| 59 | |||
| 60 | printk(KERN_NOTICE " %08lx", stackdata); | ||
| 61 | i++; | ||
| 62 | } | ||
| 63 | printk(KERN_NOTICE "\n"); | ||
| 64 | } | ||
| 65 | |||
| 66 | static void show_trace(long *sp) | ||
| 67 | { | ||
| 68 | int i; | ||
| 69 | long addr; | ||
| 70 | |||
| 71 | sp = sp ? sp : (long *) &sp; | ||
| 72 | |||
| 73 | printk(KERN_NOTICE "Call Trace: "); | ||
| 74 | i = 1; | ||
| 75 | while ((long) sp & (PAGE_SIZE - 1)) { | ||
| 76 | if (__get_user(addr, sp++)) { | ||
| 77 | if (i && ((i % 6) == 0)) | ||
| 78 | printk(KERN_NOTICE "\n"); | ||
| 79 | printk(KERN_NOTICE " (Bad stack address)\n"); | ||
| 80 | break; | ||
| 81 | } | ||
| 82 | |||
| 83 | if (kernel_text_address(addr)) { | ||
| 84 | if (i && ((i % 6) == 0)) | ||
| 85 | printk(KERN_NOTICE "\n"); | ||
| 86 | if (i > 40) { | ||
| 87 | printk(KERN_NOTICE " ..."); | ||
| 88 | break; | ||
| 89 | } | ||
| 90 | |||
| 91 | printk(KERN_NOTICE " [<%08lx>]", addr); | ||
| 92 | i++; | ||
| 93 | } | ||
| 94 | } | ||
| 95 | printk(KERN_NOTICE "\n"); | ||
| 96 | } | ||
| 97 | |||
| 98 | static void show_code(unsigned int *pc) | ||
| 99 | { | ||
| 100 | long i; | ||
| 101 | |||
| 102 | printk(KERN_NOTICE "\nCode:"); | ||
| 103 | |||
| 104 | for (i = -3; i < 6; i++) { | ||
| 105 | unsigned long insn; | ||
| 106 | if (__get_user(insn, pc + i)) { | ||
| 107 | printk(KERN_NOTICE " (Bad address in epc)\n"); | ||
| 108 | break; | ||
| 109 | } | ||
| 110 | printk(KERN_NOTICE "%c%08lx%c", (i ? ' ' : '<'), | ||
| 111 | insn, (i ? ' ' : '>')); | ||
| 112 | } | ||
| 113 | } | ||
| 114 | |||
| 115 | /* | ||
| 116 | * FIXME: really the generic show_regs should take a const pointer argument. | ||
| 117 | */ | ||
| 118 | void show_regs(struct pt_regs *regs) | ||
| 119 | { | ||
| 120 | printk("r0 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | ||
| 121 | regs->regs[0], regs->regs[1], regs->regs[2], regs->regs[3], | ||
| 122 | regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]); | ||
| 123 | printk("r8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | ||
| 124 | regs->regs[8], regs->regs[9], regs->regs[10], regs->regs[11], | ||
| 125 | regs->regs[12], regs->regs[13], regs->regs[14], regs->regs[15]); | ||
| 126 | printk("r16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | ||
| 127 | regs->regs[16], regs->regs[17], regs->regs[18], regs->regs[19], | ||
| 128 | regs->regs[20], regs->regs[21], regs->regs[22], regs->regs[23]); | ||
| 129 | printk("r24: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | ||
| 130 | regs->regs[24], regs->regs[25], regs->regs[26], regs->regs[27], | ||
| 131 | regs->regs[28], regs->regs[29], regs->regs[30], regs->regs[31]); | ||
| 132 | |||
| 133 | printk("CEH : %08lx\n", regs->ceh); | ||
| 134 | printk("CEL : %08lx\n", regs->cel); | ||
| 135 | |||
| 136 | printk("EMA:%08lx, epc:%08lx %s\nPSR: %08lx\nECR:%08lx\nCondition : %08lx\n", | ||
| 137 | regs->cp0_ema, regs->cp0_epc, print_tainted(), regs->cp0_psr, | ||
| 138 | regs->cp0_ecr, regs->cp0_condition); | ||
| 139 | } | ||
| 140 | |||
| 141 | static void show_registers(struct pt_regs *regs) | ||
| 142 | { | ||
| 143 | show_regs(regs); | ||
| 144 | printk(KERN_NOTICE "Process %s (pid: %d, stackpage=%08lx)\n", | ||
| 145 | current->comm, current->pid, (unsigned long) current); | ||
| 146 | show_stack(current_thread_info()->task, (long *) regs->regs[0]); | ||
| 147 | show_trace((long *) regs->regs[0]); | ||
| 148 | show_code((unsigned int *) regs->cp0_epc); | ||
| 149 | printk(KERN_NOTICE "\n"); | ||
| 150 | } | ||
| 151 | |||
| 152 | /* | ||
| 153 | * The architecture-independent dump_stack generator | ||
| 154 | */ | ||
| 155 | void dump_stack(void) | ||
| 156 | { | ||
| 157 | show_stack(current_thread_info()->task, | ||
| 158 | (long *) get_irq_regs()->regs[0]); | ||
| 159 | } | ||
| 160 | EXPORT_SYMBOL(dump_stack); | ||
| 161 | |||
| 162 | void __die(const char *str, struct pt_regs *regs, const char *file, | ||
| 163 | const char *func, unsigned long line) | ||
| 164 | { | ||
| 165 | console_verbose(); | ||
| 166 | printk("%s", str); | ||
| 167 | if (file && func) | ||
| 168 | printk(" in %s:%s, line %ld", file, func, line); | ||
| 169 | printk(":\n"); | ||
| 170 | show_registers(regs); | ||
| 171 | do_exit(SIGSEGV); | ||
| 172 | } | ||
| 173 | |||
| 174 | void __die_if_kernel(const char *str, struct pt_regs *regs, | ||
| 175 | const char *file, const char *func, unsigned long line) | ||
| 176 | { | ||
| 177 | if (!user_mode(regs)) | ||
| 178 | __die(str, regs, file, func, line); | ||
| 179 | } | ||
| 180 | |||
| 181 | asmlinkage void do_adelinsn(struct pt_regs *regs) | ||
| 182 | { | ||
| 183 | printk("do_ADE-linsn:ema:0x%08lx:epc:0x%08lx\n", | ||
| 184 | regs->cp0_ema, regs->cp0_epc); | ||
| 185 | die_if_kernel("do_ade execution Exception\n", regs); | ||
| 186 | force_sig(SIGBUS, current); | ||
| 187 | } | ||
| 188 | |||
| 189 | asmlinkage void do_adedata(struct pt_regs *regs) | ||
| 190 | { | ||
| 191 | const struct exception_table_entry *fixup; | ||
| 192 | fixup = search_exception_tables(regs->cp0_epc); | ||
| 193 | if (fixup) { | ||
| 194 | regs->cp0_epc = fixup->fixup; | ||
| 195 | return; | ||
| 196 | } | ||
| 197 | printk("do_ADE-data:ema:0x%08lx:epc:0x%08lx\n", | ||
| 198 | regs->cp0_ema, regs->cp0_epc); | ||
| 199 | die_if_kernel("do_ade execution Exception\n", regs); | ||
| 200 | force_sig(SIGBUS, current); | ||
| 201 | } | ||
| 202 | |||
| 203 | asmlinkage void do_pel(struct pt_regs *regs) | ||
| 204 | { | ||
| 205 | die_if_kernel("do_pel execution Exception", regs); | ||
| 206 | force_sig(SIGFPE, current); | ||
| 207 | } | ||
| 208 | |||
| 209 | asmlinkage void do_cee(struct pt_regs *regs) | ||
| 210 | { | ||
| 211 | die_if_kernel("do_cee execution Exception", regs); | ||
| 212 | force_sig(SIGFPE, current); | ||
| 213 | } | ||
| 214 | |||
| 215 | asmlinkage void do_cpe(struct pt_regs *regs) | ||
| 216 | { | ||
| 217 | die_if_kernel("do_cpe execution Exception", regs); | ||
| 218 | force_sig(SIGFPE, current); | ||
| 219 | } | ||
| 220 | |||
| 221 | asmlinkage void do_be(struct pt_regs *regs) | ||
| 222 | { | ||
| 223 | die_if_kernel("do_be execution Exception", regs); | ||
| 224 | force_sig(SIGBUS, current); | ||
| 225 | } | ||
| 226 | |||
| 227 | asmlinkage void do_ov(struct pt_regs *regs) | ||
| 228 | { | ||
| 229 | siginfo_t info; | ||
| 230 | |||
| 231 | die_if_kernel("do_ov execution Exception", regs); | ||
| 232 | |||
| 233 | info.si_code = FPE_INTOVF; | ||
| 234 | info.si_signo = SIGFPE; | ||
| 235 | info.si_errno = 0; | ||
| 236 | info.si_addr = (void *)regs->cp0_epc; | ||
| 237 | force_sig_info(SIGFPE, &info, current); | ||
| 238 | } | ||
| 239 | |||
| 240 | asmlinkage void do_tr(struct pt_regs *regs) | ||
| 241 | { | ||
| 242 | die_if_kernel("do_tr execution Exception", regs); | ||
| 243 | force_sig(SIGTRAP, current); | ||
| 244 | } | ||
| 245 | |||
| 246 | asmlinkage void do_ri(struct pt_regs *regs) | ||
| 247 | { | ||
| 248 | unsigned long epc_insn; | ||
| 249 | unsigned long epc = regs->cp0_epc; | ||
| 250 | |||
| 251 | read_tsk_long(current, epc, &epc_insn); | ||
| 252 | if (current->thread.single_step == 1) { | ||
| 253 | if ((epc == current->thread.addr1) || | ||
| 254 | (epc == current->thread.addr2)) { | ||
| 255 | user_disable_single_step(current); | ||
| 256 | force_sig(SIGTRAP, current); | ||
| 257 | return; | ||
| 258 | } else | ||
| 259 | BUG(); | ||
| 260 | } else if ((epc_insn == BREAKPOINT32_INSN) || | ||
| 261 | ((epc_insn & 0x0000FFFF) == 0x7002) || | ||
| 262 | ((epc_insn & 0xFFFF0000) == 0x70020000)) { | ||
| 263 | force_sig(SIGTRAP, current); | ||
| 264 | return; | ||
| 265 | } else { | ||
| 266 | die_if_kernel("do_ri execution Exception", regs); | ||
| 267 | force_sig(SIGILL, current); | ||
| 268 | } | ||
| 269 | } | ||
| 270 | |||
| 271 | asmlinkage void do_ccu(struct pt_regs *regs) | ||
| 272 | { | ||
| 273 | die_if_kernel("do_ccu execution Exception", regs); | ||
| 274 | force_sig(SIGILL, current); | ||
| 275 | } | ||
| 276 | |||
| 277 | asmlinkage void do_reserved(struct pt_regs *regs) | ||
| 278 | { | ||
| 279 | /* | ||
| 280 | * Game over - no way to handle this if it ever occurs. Most probably | ||
| 281 | * caused by a new unknown cpu type or after another deadly | ||
| 282 | * hard/software error. | ||
| 283 | */ | ||
| 284 | die_if_kernel("do_reserved execution Exception", regs); | ||
| 285 | show_regs(regs); | ||
| 286 | panic("Caught reserved exception - should not happen."); | ||
| 287 | } | ||
| 288 | |||
| 289 | /* | ||
| 290 | * NMI exception handler. | ||
| 291 | */ | ||
| 292 | void nmi_exception_handler(struct pt_regs *regs) | ||
| 293 | { | ||
| 294 | die_if_kernel("nmi_exception_handler execution Exception", regs); | ||
| 295 | die("NMI", regs); | ||
| 296 | } | ||
| 297 | |||
| 298 | /* Install CPU exception handler */ | ||
| 299 | void *set_except_vector(int n, void *addr) | ||
| 300 | { | ||
| 301 | unsigned long handler = (unsigned long) addr; | ||
| 302 | unsigned long old_handler = exception_handlers[n]; | ||
| 303 | |||
| 304 | exception_handlers[n] = handler; | ||
| 305 | return (void *)old_handler; | ||
| 306 | } | ||
| 307 | |||
| 308 | void __init trap_init(void) | ||
| 309 | { | ||
| 310 | int i; | ||
| 311 | |||
| 312 | pgd_current = (unsigned long)init_mm.pgd; | ||
| 313 | /* DEBUG EXCEPTION */ | ||
| 314 | memcpy((void *)DEBUG_VECTOR_BASE_ADDR, | ||
| 315 | &debug_exception_vector, DEBUG_VECTOR_SIZE); | ||
| 316 | /* NMI EXCEPTION */ | ||
| 317 | memcpy((void *)GENERAL_VECTOR_BASE_ADDR, | ||
| 318 | &general_exception_vector, GENERAL_VECTOR_SIZE); | ||
| 319 | |||
| 320 | /* | ||
| 321 | * Initialise exception handlers | ||
| 322 | */ | ||
| 323 | for (i = 0; i <= 31; i++) | ||
| 324 | set_except_vector(i, handle_reserved); | ||
| 325 | |||
| 326 | set_except_vector(1, handle_nmi); | ||
| 327 | set_except_vector(2, handle_adelinsn); | ||
| 328 | set_except_vector(3, handle_tlb_refill); | ||
| 329 | set_except_vector(4, handle_tlb_invaild); | ||
| 330 | set_except_vector(5, handle_ibe); | ||
| 331 | set_except_vector(6, handle_pel); | ||
| 332 | set_except_vector(7, handle_sys); | ||
| 333 | set_except_vector(8, handle_ccu); | ||
| 334 | set_except_vector(9, handle_ri); | ||
| 335 | set_except_vector(10, handle_tr); | ||
| 336 | set_except_vector(11, handle_adedata); | ||
| 337 | set_except_vector(12, handle_adedata); | ||
| 338 | set_except_vector(13, handle_tlb_refill); | ||
| 339 | set_except_vector(14, handle_tlb_invaild); | ||
| 340 | set_except_vector(15, handle_mod); | ||
| 341 | set_except_vector(16, handle_cee); | ||
| 342 | set_except_vector(17, handle_cpe); | ||
| 343 | set_except_vector(18, handle_dbe); | ||
| 344 | flush_icache_range(DEBUG_VECTOR_BASE_ADDR, IRQ_VECTOR_BASE_ADDR); | ||
| 345 | |||
| 346 | atomic_inc(&init_mm.mm_count); | ||
| 347 | current->active_mm = &init_mm; | ||
| 348 | cpu_cache_init(); | ||
| 349 | } | ||
diff --git a/arch/score/kernel/vmlinux.lds.S b/arch/score/kernel/vmlinux.lds.S new file mode 100644 index 000000000000..f85569831d5c --- /dev/null +++ b/arch/score/kernel/vmlinux.lds.S | |||
| @@ -0,0 +1,148 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/kernel/vmlinux.lds.S | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <asm-generic/vmlinux.lds.h> | ||
| 27 | |||
| 28 | OUTPUT_ARCH(score) | ||
| 29 | ENTRY(_stext) | ||
| 30 | |||
| 31 | jiffies = jiffies_64; | ||
| 32 | |||
| 33 | SECTIONS | ||
| 34 | { | ||
| 35 | . = CONFIG_MEMORY_START + 0x2000; | ||
| 36 | /* read-only */ | ||
| 37 | .text : { | ||
| 38 | _text = .; /* Text and read-only data */ | ||
| 39 | TEXT_TEXT | ||
| 40 | SCHED_TEXT | ||
| 41 | LOCK_TEXT | ||
| 42 | KPROBES_TEXT | ||
| 43 | *(.text.*) | ||
| 44 | *(.fixup) | ||
| 45 | . = ALIGN (4) ; | ||
| 46 | _etext = .; /* End of text section */ | ||
| 47 | } | ||
| 48 | |||
| 49 | . = ALIGN(16); | ||
| 50 | RODATA | ||
| 51 | |||
| 52 | /* Exception table */ | ||
| 53 | . = ALIGN(16); | ||
| 54 | __ex_table : { | ||
| 55 | __start___ex_table = .; | ||
| 56 | *(__ex_table) | ||
| 57 | __stop___ex_table = .; | ||
| 58 | } | ||
| 59 | |||
| 60 | /* writeable */ | ||
| 61 | .data ALIGN (4096): { | ||
| 62 | *(.data.init_task) | ||
| 63 | |||
| 64 | DATA_DATA | ||
| 65 | CONSTRUCTORS | ||
| 66 | } | ||
| 67 | |||
| 68 | /* We want the small data sections together, so single-instruction offsets | ||
| 69 | can access them all, and initialized data all before uninitialized, so | ||
| 70 | we can shorten the on-disk segment size. */ | ||
| 71 | . = ALIGN(8); | ||
| 72 | .sdata : { | ||
| 73 | *(.sdata) | ||
| 74 | } | ||
| 75 | |||
| 76 | . = ALIGN(32); | ||
| 77 | .data.cacheline_aligned : { | ||
| 78 | *(.data.cacheline_aligned) | ||
| 79 | } | ||
| 80 | _edata = .; /* End of data section */ | ||
| 81 | |||
| 82 | /* will be freed after init */ | ||
| 83 | . = ALIGN(4096); /* Init code and data */ | ||
| 84 | __init_begin = .; | ||
| 85 | |||
| 86 | . = ALIGN(4096); | ||
| 87 | .init.text : { | ||
| 88 | _sinittext = .; | ||
| 89 | INIT_TEXT | ||
| 90 | _einittext = .; | ||
| 91 | } | ||
| 92 | .init.data : { | ||
| 93 | INIT_DATA | ||
| 94 | } | ||
| 95 | . = ALIGN(16); | ||
| 96 | .init.setup : { | ||
| 97 | __setup_start = .; | ||
| 98 | *(.init.setup) | ||
| 99 | __setup_end = .; | ||
| 100 | } | ||
| 101 | |||
| 102 | .initcall.init : { | ||
| 103 | __initcall_start = .; | ||
| 104 | INITCALLS | ||
| 105 | __initcall_end = .; | ||
| 106 | } | ||
| 107 | |||
| 108 | .con_initcall.init : { | ||
| 109 | __con_initcall_start = .; | ||
| 110 | *(.con_initcall.init) | ||
| 111 | __con_initcall_end = .; | ||
| 112 | } | ||
| 113 | SECURITY_INIT | ||
| 114 | |||
| 115 | /* .exit.text is discarded at runtime, not link time, to deal with | ||
| 116 | * references from .rodata | ||
| 117 | */ | ||
| 118 | .exit.text : { | ||
| 119 | EXIT_TEXT | ||
| 120 | } | ||
| 121 | .exit.data : { | ||
| 122 | EXIT_DATA | ||
| 123 | } | ||
| 124 | #if defined(CONFIG_BLK_DEV_INITRD) | ||
| 125 | .init.ramfs ALIGN(4096): { | ||
| 126 | __initramfs_start = .; | ||
| 127 | *(.init.ramfs) | ||
| 128 | __initramfs_end = .; | ||
| 129 | . = ALIGN(4); | ||
| 130 | LONG(0); | ||
| 131 | } | ||
| 132 | #endif | ||
| 133 | . = ALIGN(4096); | ||
| 134 | __init_end = .; | ||
| 135 | /* freed after init ends here */ | ||
| 136 | |||
| 137 | __bss_start = .; /* BSS */ | ||
| 138 | .sbss : { | ||
| 139 | *(.sbss) | ||
| 140 | *(.scommon) | ||
| 141 | } | ||
| 142 | .bss : { | ||
| 143 | *(.bss) | ||
| 144 | *(COMMON) | ||
| 145 | } | ||
| 146 | __bss_stop = .; | ||
| 147 | _end = .; | ||
| 148 | } | ||
diff --git a/arch/score/lib/Makefile b/arch/score/lib/Makefile new file mode 100644 index 000000000000..553e30e81faf --- /dev/null +++ b/arch/score/lib/Makefile | |||
| @@ -0,0 +1,8 @@ | |||
| 1 | # | ||
| 2 | # Makefile for SCORE-specific library files.. | ||
| 3 | # | ||
| 4 | |||
| 5 | lib-y += string.o checksum.o checksum_copy.o | ||
| 6 | |||
| 7 | # libgcc-style stuff needed in the kernel | ||
| 8 | obj-y += ashldi3.o ashrdi3.o cmpdi2.o lshrdi3.o ucmpdi2.o | ||
diff --git a/arch/score/lib/ashldi3.c b/arch/score/lib/ashldi3.c new file mode 100644 index 000000000000..15691a910431 --- /dev/null +++ b/arch/score/lib/ashldi3.c | |||
| @@ -0,0 +1,46 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/ashldi3.c | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, see the file COPYING, or write | ||
| 16 | * to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include "libgcc.h" | ||
| 22 | |||
| 23 | long long __ashldi3(long long u, word_type b) | ||
| 24 | { | ||
| 25 | DWunion uu, w; | ||
| 26 | word_type bm; | ||
| 27 | |||
| 28 | if (b == 0) | ||
| 29 | return u; | ||
| 30 | |||
| 31 | uu.ll = u; | ||
| 32 | bm = 32 - b; | ||
| 33 | |||
| 34 | if (bm <= 0) { | ||
| 35 | w.s.low = 0; | ||
| 36 | w.s.high = (unsigned int) uu.s.low << -bm; | ||
| 37 | } else { | ||
| 38 | const unsigned int carries = (unsigned int) uu.s.low >> bm; | ||
| 39 | |||
| 40 | w.s.low = (unsigned int) uu.s.low << b; | ||
| 41 | w.s.high = ((unsigned int) uu.s.high << b) | carries; | ||
| 42 | } | ||
| 43 | |||
| 44 | return w.ll; | ||
| 45 | } | ||
| 46 | EXPORT_SYMBOL(__ashldi3); | ||
diff --git a/arch/score/lib/ashrdi3.c b/arch/score/lib/ashrdi3.c new file mode 100644 index 000000000000..d9814a5d8d30 --- /dev/null +++ b/arch/score/lib/ashrdi3.c | |||
| @@ -0,0 +1,48 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/ashrdi3.c | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, see the file COPYING, or write | ||
| 16 | * to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include "libgcc.h" | ||
| 22 | |||
| 23 | long long __ashrdi3(long long u, word_type b) | ||
| 24 | { | ||
| 25 | DWunion uu, w; | ||
| 26 | word_type bm; | ||
| 27 | |||
| 28 | if (b == 0) | ||
| 29 | return u; | ||
| 30 | |||
| 31 | uu.ll = u; | ||
| 32 | bm = 32 - b; | ||
| 33 | |||
| 34 | if (bm <= 0) { | ||
| 35 | /* w.s.high = 1..1 or 0..0 */ | ||
| 36 | w.s.high = | ||
| 37 | uu.s.high >> 31; | ||
| 38 | w.s.low = uu.s.high >> -bm; | ||
| 39 | } else { | ||
| 40 | const unsigned int carries = (unsigned int) uu.s.high << bm; | ||
| 41 | |||
| 42 | w.s.high = uu.s.high >> b; | ||
| 43 | w.s.low = ((unsigned int) uu.s.low >> b) | carries; | ||
| 44 | } | ||
| 45 | |||
| 46 | return w.ll; | ||
| 47 | } | ||
| 48 | EXPORT_SYMBOL(__ashrdi3); | ||
diff --git a/arch/score/lib/checksum.S b/arch/score/lib/checksum.S new file mode 100644 index 000000000000..706157edc7d5 --- /dev/null +++ b/arch/score/lib/checksum.S | |||
| @@ -0,0 +1,255 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/csum_partial.S | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | #include <linux/linkage.h> | ||
| 26 | |||
| 27 | #define ADDC(sum,reg) \ | ||
| 28 | add sum, sum, reg; \ | ||
| 29 | cmp.c reg, sum; \ | ||
| 30 | bleu 9f; \ | ||
| 31 | addi sum, 0x1; \ | ||
| 32 | 9: | ||
| 33 | |||
| 34 | #define CSUM_BIGCHUNK(src, offset, sum) \ | ||
| 35 | lw r8, [src, offset + 0x00]; \ | ||
| 36 | lw r9, [src, offset + 0x04]; \ | ||
| 37 | lw r10, [src, offset + 0x08]; \ | ||
| 38 | lw r11, [src, offset + 0x0c]; \ | ||
| 39 | ADDC(sum, r8); \ | ||
| 40 | ADDC(sum, r9); \ | ||
| 41 | ADDC(sum, r10); \ | ||
| 42 | ADDC(sum, r11); \ | ||
| 43 | lw r8, [src, offset + 0x10]; \ | ||
| 44 | lw r9, [src, offset + 0x14]; \ | ||
| 45 | lw r10, [src, offset + 0x18]; \ | ||
| 46 | lw r11, [src, offset + 0x1c]; \ | ||
| 47 | ADDC(sum, r8); \ | ||
| 48 | ADDC(sum, r9); \ | ||
| 49 | ADDC(sum, r10); \ | ||
| 50 | ADDC(sum, r11); \ | ||
| 51 | |||
| 52 | #define src r4 | ||
| 53 | #define dest r5 | ||
| 54 | #define sum r27 | ||
| 55 | |||
| 56 | .text | ||
| 57 | /* unknown src alignment and < 8 bytes to go */ | ||
| 58 | small_csumcpy: | ||
| 59 | mv r5, r10 | ||
| 60 | ldi r9, 0x0 | ||
| 61 | cmpi.c r25, 0x1 | ||
| 62 | beq pass_small_set_t7 /*already set, jump to pass_small_set_t7*/ | ||
| 63 | andri.c r25,r4 , 0x1 /*Is src 2 bytes aligned?*/ | ||
| 64 | |||
| 65 | pass_small_set_t7: | ||
| 66 | beq aligned | ||
| 67 | cmpi.c r5, 0x0 | ||
| 68 | beq fold | ||
| 69 | lbu r9, [src] | ||
| 70 | slli r9,r9, 0x8 /*Little endian*/ | ||
| 71 | ADDC(sum, r9) | ||
| 72 | addi src, 0x1 | ||
| 73 | subi.c r5, 0x1 | ||
| 74 | |||
| 75 | /*len still a full word */ | ||
| 76 | aligned: | ||
| 77 | andri.c r8, r5, 0x4 /*Len >= 4?*/ | ||
| 78 | beq len_less_4bytes | ||
| 79 | |||
| 80 | /* Still a full word (4byte) to go,and the src is word aligned.*/ | ||
| 81 | andri.c r8, src, 0x3 /*src is 4bytes aligned, so use LW!!*/ | ||
| 82 | beq four_byte_aligned | ||
| 83 | lhu r9, [src] | ||
| 84 | addi src, 2 | ||
| 85 | ADDC(sum, r9) | ||
| 86 | lhu r9, [src] | ||
| 87 | addi src, 2 | ||
| 88 | ADDC(sum, r9) | ||
| 89 | b len_less_4bytes | ||
| 90 | |||
| 91 | four_byte_aligned: /* Len >=4 and four byte aligned */ | ||
| 92 | lw r9, [src] | ||
| 93 | addi src, 4 | ||
| 94 | ADDC(sum, r9) | ||
| 95 | |||
| 96 | len_less_4bytes: /* 2 byte aligned aligned and length<4B */ | ||
| 97 | andri.c r8, r5, 0x2 | ||
| 98 | beq len_less_2bytes | ||
| 99 | lhu r9, [src] | ||
| 100 | addi src, 0x2 /* src+=2 */ | ||
| 101 | ADDC(sum, r9) | ||
| 102 | |||
| 103 | len_less_2bytes: /* len = 1 */ | ||
| 104 | andri.c r8, r5, 0x1 | ||
| 105 | beq fold /* less than 2 and not equal 1--> len=0 -> fold */ | ||
| 106 | lbu r9, [src] | ||
| 107 | |||
| 108 | fold_ADDC: | ||
| 109 | ADDC(sum, r9) | ||
| 110 | fold: | ||
| 111 | /* fold checksum */ | ||
| 112 | slli r26, sum, 16 | ||
| 113 | add sum, sum, r26 | ||
| 114 | cmp.c r26, sum | ||
| 115 | srli sum, sum, 16 | ||
| 116 | bleu 1f /* if r26<=sum */ | ||
| 117 | addi sum, 0x1 /* r26>sum */ | ||
| 118 | 1: | ||
| 119 | /* odd buffer alignment? r25 was set in csum_partial */ | ||
| 120 | cmpi.c r25, 0x0 | ||
| 121 | beq 1f | ||
| 122 | slli r26, sum, 8 | ||
| 123 | srli sum, sum, 8 | ||
| 124 | or sum, sum, r26 | ||
| 125 | andi sum, 0xffff | ||
| 126 | 1: | ||
| 127 | .set optimize | ||
| 128 | /* Add the passed partial csum. */ | ||
| 129 | ADDC(sum, r6) | ||
| 130 | mv r4, sum | ||
| 131 | br r3 | ||
| 132 | .set volatile | ||
| 133 | |||
| 134 | .align 5 | ||
| 135 | ENTRY(csum_partial) | ||
| 136 | ldi sum, 0 | ||
| 137 | ldi r25, 0 | ||
| 138 | mv r10, r5 | ||
| 139 | cmpi.c r5, 0x8 | ||
| 140 | blt small_csumcpy /* < 8(singed) bytes to copy */ | ||
| 141 | cmpi.c r5, 0x0 | ||
| 142 | beq out | ||
| 143 | andri.c r25, src, 0x1 /* odd buffer? */ | ||
| 144 | |||
| 145 | beq word_align | ||
| 146 | hword_align: /* 1 byte */ | ||
| 147 | lbu r8, [src] | ||
| 148 | subi r5, 0x1 | ||
| 149 | slli r8, r8, 8 | ||
| 150 | ADDC(sum, r8) | ||
| 151 | addi src, 0x1 | ||
| 152 | |||
| 153 | word_align: /* 2 bytes */ | ||
| 154 | andri.c r8, src, 0x2 /* 4bytes(dword)_aligned? */ | ||
| 155 | beq dword_align /* not, maybe dword_align */ | ||
| 156 | lhu r8, [src] | ||
| 157 | subi r5, 0x2 | ||
| 158 | ADDC(sum, r8) | ||
| 159 | addi src, 0x2 | ||
| 160 | |||
| 161 | dword_align: /* 4bytes */ | ||
| 162 | mv r26, r5 /* maybe useless when len >=56 */ | ||
| 163 | ldi r8, 56 | ||
| 164 | cmp.c r8, r5 | ||
| 165 | bgtu do_end_words /* if a1(len)<t0(56) ,unsigned */ | ||
| 166 | andri.c r26, src, 0x4 | ||
| 167 | beq qword_align | ||
| 168 | lw r8, [src] | ||
| 169 | subi r5, 0x4 | ||
| 170 | ADDC(sum, r8) | ||
| 171 | addi src, 0x4 | ||
| 172 | |||
| 173 | qword_align: /* 8 bytes */ | ||
| 174 | andri.c r26, src, 0x8 | ||
| 175 | beq oword_align | ||
| 176 | lw r8, [src, 0x0] | ||
| 177 | lw r9, [src, 0x4] | ||
| 178 | subi r5, 0x8 /* len-=0x8 */ | ||
| 179 | ADDC(sum, r8) | ||
| 180 | ADDC(sum, r9) | ||
| 181 | addi src, 0x8 | ||
| 182 | |||
| 183 | oword_align: /* 16bytes */ | ||
| 184 | andri.c r26, src, 0x10 | ||
| 185 | beq begin_movement | ||
| 186 | lw r10, [src, 0x08] | ||
| 187 | lw r11, [src, 0x0c] | ||
| 188 | lw r8, [src, 0x00] | ||
| 189 | lw r9, [src, 0x04] | ||
| 190 | ADDC(sum, r10) | ||
| 191 | ADDC(sum, r11) | ||
| 192 | ADDC(sum, r8) | ||
| 193 | ADDC(sum, r9) | ||
| 194 | subi r5, 0x10 | ||
| 195 | addi src, 0x10 | ||
| 196 | |||
| 197 | begin_movement: | ||
| 198 | srli.c r26, r5, 0x7 /* len>=128? */ | ||
| 199 | beq 1f /* len<128 */ | ||
| 200 | |||
| 201 | /* r26 is the result that computed in oword_align */ | ||
| 202 | move_128bytes: | ||
| 203 | CSUM_BIGCHUNK(src, 0x00, sum) | ||
| 204 | CSUM_BIGCHUNK(src, 0x20, sum) | ||
| 205 | CSUM_BIGCHUNK(src, 0x40, sum) | ||
| 206 | CSUM_BIGCHUNK(src, 0x60, sum) | ||
| 207 | subi.c r26, 0x01 /* r26 equals len/128 */ | ||
| 208 | addi src, 0x80 | ||
| 209 | bne move_128bytes | ||
| 210 | |||
| 211 | 1: /* len<128,we process 64byte here */ | ||
| 212 | andri.c r10, r5, 0x40 | ||
| 213 | beq 1f | ||
| 214 | |||
| 215 | move_64bytes: | ||
| 216 | CSUM_BIGCHUNK(src, 0x00, sum) | ||
| 217 | CSUM_BIGCHUNK(src, 0x20, sum) | ||
| 218 | addi src, 0x40 | ||
| 219 | |||
| 220 | 1: /* len<64 */ | ||
| 221 | andri r26, r5, 0x1c /* 0x1c=28 */ | ||
| 222 | andri.c r10, r5, 0x20 | ||
| 223 | beq do_end_words /* decided by andri */ | ||
| 224 | |||
| 225 | move_32bytes: | ||
| 226 | CSUM_BIGCHUNK(src, 0x00, sum) | ||
| 227 | andri r26, r5, 0x1c | ||
| 228 | addri src, src, 0x20 | ||
| 229 | |||
| 230 | do_end_words: /* len<32 */ | ||
| 231 | /* r26 was set already in dword_align */ | ||
| 232 | cmpi.c r26, 0x0 | ||
| 233 | beq maybe_end_cruft /* len<28 or len<56 */ | ||
| 234 | srli r26, r26, 0x2 | ||
| 235 | |||
| 236 | end_words: | ||
| 237 | lw r8, [src] | ||
| 238 | subi.c r26, 0x1 /* unit is 4 byte */ | ||
| 239 | ADDC(sum, r8) | ||
| 240 | addi src, 0x4 | ||
| 241 | cmpi.c r26, 0x0 | ||
| 242 | bne end_words /* r26!=0 */ | ||
| 243 | |||
| 244 | maybe_end_cruft: /* len<4 */ | ||
| 245 | andri r10, r5, 0x3 | ||
| 246 | |||
| 247 | small_memcpy: | ||
| 248 | mv r5, r10 | ||
| 249 | j small_csumcpy | ||
| 250 | |||
| 251 | out: | ||
| 252 | mv r4, sum | ||
| 253 | br r3 | ||
| 254 | |||
| 255 | END(csum_partial) | ||
diff --git a/arch/score/lib/checksum_copy.c b/arch/score/lib/checksum_copy.c new file mode 100644 index 000000000000..04565dd3ded8 --- /dev/null +++ b/arch/score/lib/checksum_copy.c | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/csum_partial_copy.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <net/checksum.h> | ||
| 27 | |||
| 28 | #include <asm/uaccess.h> | ||
| 29 | |||
| 30 | unsigned int csum_partial_copy(const char *src, char *dst, | ||
| 31 | int len, unsigned int sum) | ||
| 32 | { | ||
| 33 | sum = csum_partial(src, len, sum); | ||
| 34 | memcpy(dst, src, len); | ||
| 35 | |||
| 36 | return sum; | ||
| 37 | } | ||
| 38 | |||
| 39 | unsigned int csum_partial_copy_from_user(const char *src, char *dst, | ||
| 40 | int len, unsigned int sum, | ||
| 41 | int *err_ptr) | ||
| 42 | { | ||
| 43 | int missing; | ||
| 44 | |||
| 45 | missing = copy_from_user(dst, src, len); | ||
| 46 | if (missing) { | ||
| 47 | memset(dst + len - missing, 0, missing); | ||
| 48 | *err_ptr = -EFAULT; | ||
| 49 | } | ||
| 50 | |||
| 51 | return csum_partial(dst, len, sum); | ||
| 52 | } | ||
diff --git a/arch/score/lib/cmpdi2.c b/arch/score/lib/cmpdi2.c new file mode 100644 index 000000000000..1ed5290c66ed --- /dev/null +++ b/arch/score/lib/cmpdi2.c | |||
| @@ -0,0 +1,44 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/cmpdi2.c | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, see the file COPYING, or write | ||
| 16 | * to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include "libgcc.h" | ||
| 22 | |||
| 23 | word_type __cmpdi2(long long a, long long b) | ||
| 24 | { | ||
| 25 | const DWunion au = { | ||
| 26 | .ll = a | ||
| 27 | }; | ||
| 28 | const DWunion bu = { | ||
| 29 | .ll = b | ||
| 30 | }; | ||
| 31 | |||
| 32 | if (au.s.high < bu.s.high) | ||
| 33 | return 0; | ||
| 34 | else if (au.s.high > bu.s.high) | ||
| 35 | return 2; | ||
| 36 | |||
| 37 | if ((unsigned int) au.s.low < (unsigned int) bu.s.low) | ||
| 38 | return 0; | ||
| 39 | else if ((unsigned int) au.s.low > (unsigned int) bu.s.low) | ||
| 40 | return 2; | ||
| 41 | |||
| 42 | return 1; | ||
| 43 | } | ||
| 44 | EXPORT_SYMBOL(__cmpdi2); | ||
diff --git a/arch/score/lib/libgcc.h b/arch/score/lib/libgcc.h new file mode 100644 index 000000000000..0f12543d9f31 --- /dev/null +++ b/arch/score/lib/libgcc.h | |||
| @@ -0,0 +1,37 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/libgcc.h | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, see the file COPYING, or write | ||
| 16 | * to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | |||
| 21 | #ifndef __ASM_LIBGCC_H | ||
| 22 | #define __ASM_LIBGCC_H | ||
| 23 | |||
| 24 | #include <asm/byteorder.h> | ||
| 25 | |||
| 26 | typedef int word_type __attribute__((mode(__word__))); | ||
| 27 | |||
| 28 | struct DWstruct { | ||
| 29 | int low, high; | ||
| 30 | }; | ||
| 31 | |||
| 32 | typedef union { | ||
| 33 | struct DWstruct s; | ||
| 34 | long long ll; | ||
| 35 | } DWunion; | ||
| 36 | |||
| 37 | #endif /* __ASM_LIBGCC_H */ | ||
diff --git a/arch/score/lib/lshrdi3.c b/arch/score/lib/lshrdi3.c new file mode 100644 index 000000000000..ce21175fd791 --- /dev/null +++ b/arch/score/lib/lshrdi3.c | |||
| @@ -0,0 +1,47 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/lshrdi3.c | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, see the file COPYING, or write | ||
| 16 | * to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | |||
| 21 | #include <linux/module.h> | ||
| 22 | #include "libgcc.h" | ||
| 23 | |||
| 24 | long long __lshrdi3(long long u, word_type b) | ||
| 25 | { | ||
| 26 | DWunion uu, w; | ||
| 27 | word_type bm; | ||
| 28 | |||
| 29 | if (b == 0) | ||
| 30 | return u; | ||
| 31 | |||
| 32 | uu.ll = u; | ||
| 33 | bm = 32 - b; | ||
| 34 | |||
| 35 | if (bm <= 0) { | ||
| 36 | w.s.high = 0; | ||
| 37 | w.s.low = (unsigned int) uu.s.high >> -bm; | ||
| 38 | } else { | ||
| 39 | const unsigned int carries = (unsigned int) uu.s.high << bm; | ||
| 40 | |||
| 41 | w.s.high = (unsigned int) uu.s.high >> b; | ||
| 42 | w.s.low = ((unsigned int) uu.s.low >> b) | carries; | ||
| 43 | } | ||
| 44 | |||
| 45 | return w.ll; | ||
| 46 | } | ||
| 47 | EXPORT_SYMBOL(__lshrdi3); | ||
diff --git a/arch/score/lib/string.S b/arch/score/lib/string.S new file mode 100644 index 000000000000..00b7d3a2fc60 --- /dev/null +++ b/arch/score/lib/string.S | |||
| @@ -0,0 +1,184 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/string.S | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 8 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/linkage.h> | ||
| 27 | #include <asm-generic/errno.h> | ||
| 28 | |||
| 29 | .text | ||
| 30 | .align 2 | ||
| 31 | ENTRY(__strncpy_from_user) | ||
| 32 | cmpi.c r6, 0 | ||
| 33 | mv r9, r6 | ||
| 34 | ble .L2 | ||
| 35 | 0: lbu r7, [r5] | ||
| 36 | ldi r8, 0 | ||
| 37 | 1: sb r7, [r4] | ||
| 38 | 2: lb r6, [r5] | ||
| 39 | cmp.c r6, r8 | ||
| 40 | beq .L2 | ||
| 41 | |||
| 42 | .L5: | ||
| 43 | addi r8, 1 | ||
| 44 | cmp.c r8, r9 | ||
| 45 | beq .L7 | ||
| 46 | 3: lbu r6, [r5, 1]+ | ||
| 47 | 4: sb r6, [r4, 1]+ | ||
| 48 | 5: lb r7, [r5] | ||
| 49 | cmpi.c r7, 0 | ||
| 50 | bne .L5 | ||
| 51 | .L7: | ||
| 52 | mv r4, r8 | ||
| 53 | br r3 | ||
| 54 | .L2: | ||
| 55 | ldi r8, 0 | ||
| 56 | mv r4, r8 | ||
| 57 | br r3 | ||
| 58 | .section .fixup, "ax" | ||
| 59 | 99: | ||
| 60 | ldi r4, -EFAULT | ||
| 61 | br r3 | ||
| 62 | .previous | ||
| 63 | .section __ex_table, "a" | ||
| 64 | .align 2 | ||
| 65 | .word 0b ,99b | ||
| 66 | .word 1b ,99b | ||
| 67 | .word 2b ,99b | ||
| 68 | .word 3b ,99b | ||
| 69 | .word 4b ,99b | ||
| 70 | .word 5b ,99b | ||
| 71 | .previous | ||
| 72 | |||
| 73 | .align 2 | ||
| 74 | ENTRY(__strnlen_user) | ||
| 75 | cmpi.c r5, 0 | ||
| 76 | ble .L11 | ||
| 77 | 0: lb r6, [r4] | ||
| 78 | ldi r7, 0 | ||
| 79 | cmp.c r6, r7 | ||
| 80 | beq .L11 | ||
| 81 | .L15: | ||
| 82 | addi r7, 1 | ||
| 83 | cmp.c r7, r5 | ||
| 84 | beq .L23 | ||
| 85 | 1: lb r6, [r4,1]+ | ||
| 86 | cmpi.c r6, 0 | ||
| 87 | bne .L15 | ||
| 88 | .L23: | ||
| 89 | addri r4, r7, 1 | ||
| 90 | br r3 | ||
| 91 | |||
| 92 | .L11: | ||
| 93 | ldi r4, 1 | ||
| 94 | br r3 | ||
| 95 | .section .fixup, "ax" | ||
| 96 | 99: | ||
| 97 | ldi r4, 0 | ||
| 98 | br r3 | ||
| 99 | |||
| 100 | .section __ex_table,"a" | ||
| 101 | .align 2 | ||
| 102 | .word 0b, 99b | ||
| 103 | .word 1b, 99b | ||
| 104 | .previous | ||
| 105 | |||
| 106 | .align 2 | ||
| 107 | ENTRY(__strlen_user) | ||
| 108 | 0: lb r6, [r4] | ||
| 109 | mv r7, r4 | ||
| 110 | extsb r6, r6 | ||
| 111 | cmpi.c r6, 0 | ||
| 112 | mv r4, r6 | ||
| 113 | beq .L27 | ||
| 114 | .L28: | ||
| 115 | 1: lb r6, [r7, 1]+ | ||
| 116 | addi r6, 1 | ||
| 117 | cmpi.c r6, 0 | ||
| 118 | bne .L28 | ||
| 119 | .L27: | ||
| 120 | br r3 | ||
| 121 | .section .fixup, "ax" | ||
| 122 | ldi r4, 0x0 | ||
| 123 | br r3 | ||
| 124 | 99: | ||
| 125 | ldi r4, 0 | ||
| 126 | br r3 | ||
| 127 | .previous | ||
| 128 | .section __ex_table, "a" | ||
| 129 | .align 2 | ||
| 130 | .word 0b ,99b | ||
| 131 | .word 1b ,99b | ||
| 132 | .previous | ||
| 133 | |||
| 134 | .align 2 | ||
| 135 | ENTRY(__copy_tofrom_user) | ||
| 136 | cmpi.c r6, 0 | ||
| 137 | mv r10,r6 | ||
| 138 | beq .L32 | ||
| 139 | ldi r9, 0 | ||
| 140 | .L34: | ||
| 141 | add r6, r5, r9 | ||
| 142 | 0: lbu r8, [r6] | ||
| 143 | add r7, r4, r9 | ||
| 144 | 1: sb r8, [r7] | ||
| 145 | addi r9, 1 | ||
| 146 | cmp.c r9, r10 | ||
| 147 | bne .L34 | ||
| 148 | .L32: | ||
| 149 | ldi r4, 0 | ||
| 150 | br r3 | ||
| 151 | .section .fixup, "ax" | ||
| 152 | 99: | ||
| 153 | sub r4, r10, r9 | ||
| 154 | br r3 | ||
| 155 | .previous | ||
| 156 | .section __ex_table, "a" | ||
| 157 | .align 2 | ||
| 158 | .word 0b, 99b | ||
| 159 | .word 1b, 99b | ||
| 160 | .previous | ||
| 161 | |||
| 162 | .align 2 | ||
| 163 | ENTRY(__clear_user) | ||
| 164 | cmpi.c r5, 0 | ||
| 165 | beq .L38 | ||
| 166 | ldi r6, 0 | ||
| 167 | mv r7, r6 | ||
| 168 | .L40: | ||
| 169 | addi r6, 1 | ||
| 170 | 0: sb r7, [r4]+, 1 | ||
| 171 | cmp.c r6, r5 | ||
| 172 | bne .L40 | ||
| 173 | .L38: | ||
| 174 | ldi r4, 0 | ||
| 175 | br r3 | ||
| 176 | |||
| 177 | .section .fixup, "ax" | ||
| 178 | br r3 | ||
| 179 | .previous | ||
| 180 | .section __ex_table, "a" | ||
| 181 | .align 2 | ||
| 182 | 99: | ||
| 183 | .word 0b, 99b | ||
| 184 | .previous | ||
diff --git a/arch/score/lib/ucmpdi2.c b/arch/score/lib/ucmpdi2.c new file mode 100644 index 000000000000..b15241e0b079 --- /dev/null +++ b/arch/score/lib/ucmpdi2.c | |||
| @@ -0,0 +1,38 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/lib/ucmpdi2.c | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation; either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program; if not, see the file COPYING, or write | ||
| 16 | * to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include "libgcc.h" | ||
| 22 | |||
| 23 | word_type __ucmpdi2(unsigned long long a, unsigned long long b) | ||
| 24 | { | ||
| 25 | const DWunion au = {.ll = a}; | ||
| 26 | const DWunion bu = {.ll = b}; | ||
| 27 | |||
| 28 | if ((unsigned int) au.s.high < (unsigned int) bu.s.high) | ||
| 29 | return 0; | ||
| 30 | else if ((unsigned int) au.s.high > (unsigned int) bu.s.high) | ||
| 31 | return 2; | ||
| 32 | if ((unsigned int) au.s.low < (unsigned int) bu.s.low) | ||
| 33 | return 0; | ||
| 34 | else if ((unsigned int) au.s.low > (unsigned int) bu.s.low) | ||
| 35 | return 2; | ||
| 36 | return 1; | ||
| 37 | } | ||
| 38 | EXPORT_SYMBOL(__ucmpdi2); | ||
diff --git a/arch/score/mm/Makefile b/arch/score/mm/Makefile new file mode 100644 index 000000000000..7b1e29b1f8cd --- /dev/null +++ b/arch/score/mm/Makefile | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the Linux/SCORE-specific parts of the memory manager. | ||
| 3 | # | ||
| 4 | |||
| 5 | obj-y += cache.o extable.o fault.o init.o \ | ||
| 6 | tlb-miss.o tlb-score.o pgtable.o | ||
diff --git a/arch/score/mm/cache.c b/arch/score/mm/cache.c new file mode 100644 index 000000000000..dbac9d9dfddd --- /dev/null +++ b/arch/score/mm/cache.c | |||
| @@ -0,0 +1,257 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/mm/cache.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/init.h> | ||
| 27 | #include <linux/linkage.h> | ||
| 28 | #include <linux/kernel.h> | ||
| 29 | #include <linux/mm.h> | ||
| 30 | #include <linux/module.h> | ||
| 31 | #include <linux/sched.h> | ||
| 32 | |||
| 33 | #include <asm/mmu_context.h> | ||
| 34 | |||
| 35 | /* | ||
| 36 | Just flush entire Dcache!! | ||
| 37 | You must ensure the page doesn't include instructions, because | ||
| 38 | the function will not flush the Icache. | ||
| 39 | The addr must be cache aligned. | ||
| 40 | */ | ||
| 41 | static void flush_data_cache_page(unsigned long addr) | ||
| 42 | { | ||
| 43 | unsigned int i; | ||
| 44 | for (i = 0; i < (PAGE_SIZE / L1_CACHE_BYTES); i += L1_CACHE_BYTES) { | ||
| 45 | __asm__ __volatile__( | ||
| 46 | "cache 0x0e, [%0, 0]\n" | ||
| 47 | "cache 0x1a, [%0, 0]\n" | ||
| 48 | "nop\n" | ||
| 49 | : : "r" (addr)); | ||
| 50 | addr += L1_CACHE_BYTES; | ||
| 51 | } | ||
| 52 | } | ||
| 53 | |||
| 54 | /* called by update_mmu_cache. */ | ||
| 55 | void __update_cache(struct vm_area_struct *vma, unsigned long address, | ||
| 56 | pte_t pte) | ||
| 57 | { | ||
| 58 | struct page *page; | ||
| 59 | unsigned long pfn, addr; | ||
| 60 | int exec = (vma->vm_flags & VM_EXEC); | ||
| 61 | |||
| 62 | pfn = pte_pfn(pte); | ||
| 63 | if (unlikely(!pfn_valid(pfn))) | ||
| 64 | return; | ||
| 65 | page = pfn_to_page(pfn); | ||
| 66 | if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) { | ||
| 67 | addr = (unsigned long) page_address(page); | ||
| 68 | if (exec) | ||
| 69 | flush_data_cache_page(addr); | ||
| 70 | clear_bit(PG_arch_1, &page->flags); | ||
| 71 | } | ||
| 72 | } | ||
| 73 | |||
| 74 | static inline void setup_protection_map(void) | ||
| 75 | { | ||
| 76 | protection_map[0] = PAGE_NONE; | ||
| 77 | protection_map[1] = PAGE_READONLY; | ||
| 78 | protection_map[2] = PAGE_COPY; | ||
| 79 | protection_map[3] = PAGE_COPY; | ||
| 80 | protection_map[4] = PAGE_READONLY; | ||
| 81 | protection_map[5] = PAGE_READONLY; | ||
| 82 | protection_map[6] = PAGE_COPY; | ||
| 83 | protection_map[7] = PAGE_COPY; | ||
| 84 | protection_map[8] = PAGE_NONE; | ||
| 85 | protection_map[9] = PAGE_READONLY; | ||
| 86 | protection_map[10] = PAGE_SHARED; | ||
| 87 | protection_map[11] = PAGE_SHARED; | ||
| 88 | protection_map[12] = PAGE_READONLY; | ||
| 89 | protection_map[13] = PAGE_READONLY; | ||
| 90 | protection_map[14] = PAGE_SHARED; | ||
| 91 | protection_map[15] = PAGE_SHARED; | ||
| 92 | } | ||
| 93 | |||
| 94 | void __devinit cpu_cache_init(void) | ||
| 95 | { | ||
| 96 | setup_protection_map(); | ||
| 97 | } | ||
| 98 | |||
| 99 | void flush_icache_all(void) | ||
| 100 | { | ||
| 101 | __asm__ __volatile__( | ||
| 102 | "la r8, flush_icache_all\n" | ||
| 103 | "cache 0x10, [r8, 0]\n" | ||
| 104 | "nop\nnop\nnop\nnop\nnop\nnop\n" | ||
| 105 | : : : "r8"); | ||
| 106 | } | ||
| 107 | |||
| 108 | void flush_dcache_all(void) | ||
| 109 | { | ||
| 110 | __asm__ __volatile__( | ||
| 111 | "la r8, flush_dcache_all\n" | ||
| 112 | "cache 0x1f, [r8, 0]\n" | ||
| 113 | "nop\nnop\nnop\nnop\nnop\nnop\n" | ||
| 114 | "cache 0x1a, [r8, 0]\n" | ||
| 115 | "nop\nnop\nnop\nnop\nnop\nnop\n" | ||
| 116 | : : : "r8"); | ||
| 117 | } | ||
| 118 | |||
| 119 | void flush_cache_all(void) | ||
| 120 | { | ||
| 121 | __asm__ __volatile__( | ||
| 122 | "la r8, flush_cache_all\n" | ||
| 123 | "cache 0x10, [r8, 0]\n" | ||
| 124 | "nop\nnop\nnop\nnop\nnop\nnop\n" | ||
| 125 | "cache 0x1f, [r8, 0]\n" | ||
| 126 | "nop\nnop\nnop\nnop\nnop\nnop\n" | ||
| 127 | "cache 0x1a, [r8, 0]\n" | ||
| 128 | "nop\nnop\nnop\nnop\nnop\nnop\n" | ||
| 129 | : : : "r8"); | ||
| 130 | } | ||
| 131 | |||
| 132 | void flush_cache_mm(struct mm_struct *mm) | ||
| 133 | { | ||
| 134 | if (!(mm->context)) | ||
| 135 | return; | ||
| 136 | flush_cache_all(); | ||
| 137 | } | ||
| 138 | |||
| 139 | /*if we flush a range precisely , the processing may be very long. | ||
| 140 | We must check each page in the range whether present. If the page is present, | ||
| 141 | we can flush the range in the page. Be careful, the range may be cross two | ||
| 142 | page, a page is present and another is not present. | ||
| 143 | */ | ||
| 144 | /* | ||
| 145 | The interface is provided in hopes that the port can find | ||
| 146 | a suitably efficient method for removing multiple page | ||
| 147 | sized regions from the cache. | ||
| 148 | */ | ||
| 149 | void flush_cache_range(struct vm_area_struct *vma, | ||
| 150 | unsigned long start, unsigned long end) | ||
| 151 | { | ||
| 152 | struct mm_struct *mm = vma->vm_mm; | ||
| 153 | int exec = vma->vm_flags & VM_EXEC; | ||
| 154 | pgd_t *pgdp; | ||
| 155 | pud_t *pudp; | ||
| 156 | pmd_t *pmdp; | ||
| 157 | pte_t *ptep; | ||
| 158 | |||
| 159 | if (!(mm->context)) | ||
| 160 | return; | ||
| 161 | |||
| 162 | pgdp = pgd_offset(mm, start); | ||
| 163 | pudp = pud_offset(pgdp, start); | ||
| 164 | pmdp = pmd_offset(pudp, start); | ||
| 165 | ptep = pte_offset(pmdp, start); | ||
| 166 | |||
| 167 | while (start <= end) { | ||
| 168 | unsigned long tmpend; | ||
| 169 | pgdp = pgd_offset(mm, start); | ||
| 170 | pudp = pud_offset(pgdp, start); | ||
| 171 | pmdp = pmd_offset(pudp, start); | ||
| 172 | ptep = pte_offset(pmdp, start); | ||
| 173 | |||
| 174 | if (!(pte_val(*ptep) & _PAGE_PRESENT)) { | ||
| 175 | start = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1); | ||
| 176 | continue; | ||
| 177 | } | ||
| 178 | tmpend = (start | (PAGE_SIZE-1)) > end ? | ||
| 179 | end : (start | (PAGE_SIZE-1)); | ||
| 180 | |||
| 181 | flush_dcache_range(start, tmpend); | ||
| 182 | if (exec) | ||
| 183 | flush_icache_range(start, tmpend); | ||
| 184 | start = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1); | ||
| 185 | } | ||
| 186 | } | ||
| 187 | |||
| 188 | void flush_cache_page(struct vm_area_struct *vma, | ||
| 189 | unsigned long addr, unsigned long pfn) | ||
| 190 | { | ||
| 191 | int exec = vma->vm_flags & VM_EXEC; | ||
| 192 | unsigned long kaddr = 0xa0000000 | (pfn << PAGE_SHIFT); | ||
| 193 | |||
| 194 | flush_dcache_range(kaddr, kaddr + PAGE_SIZE); | ||
| 195 | |||
| 196 | if (exec) | ||
| 197 | flush_icache_range(kaddr, kaddr + PAGE_SIZE); | ||
| 198 | } | ||
| 199 | |||
| 200 | void flush_cache_sigtramp(unsigned long addr) | ||
| 201 | { | ||
| 202 | __asm__ __volatile__( | ||
| 203 | "cache 0x02, [%0, 0]\n" | ||
| 204 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 205 | "cache 0x02, [%0, 0x4]\n" | ||
| 206 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 207 | |||
| 208 | "cache 0x0d, [%0, 0]\n" | ||
| 209 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 210 | "cache 0x0d, [%0, 0x4]\n" | ||
| 211 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 212 | |||
| 213 | "cache 0x1a, [%0, 0]\n" | ||
| 214 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 215 | : : "r" (addr)); | ||
| 216 | } | ||
| 217 | |||
| 218 | /* | ||
| 219 | 1. WB and invalid a cache line of Dcache | ||
| 220 | 2. Drain Write Buffer | ||
| 221 | the range must be smaller than PAGE_SIZE | ||
| 222 | */ | ||
| 223 | void flush_dcache_range(unsigned long start, unsigned long end) | ||
| 224 | { | ||
| 225 | int size, i; | ||
| 226 | |||
| 227 | start = start & ~(L1_CACHE_BYTES - 1); | ||
| 228 | end = end & ~(L1_CACHE_BYTES - 1); | ||
| 229 | size = end - start; | ||
| 230 | /* flush dcache to ram, and invalidate dcache lines. */ | ||
| 231 | for (i = 0; i < size; i += L1_CACHE_BYTES) { | ||
| 232 | __asm__ __volatile__( | ||
| 233 | "cache 0x0e, [%0, 0]\n" | ||
| 234 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 235 | "cache 0x1a, [%0, 0]\n" | ||
| 236 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 237 | : : "r" (start)); | ||
| 238 | start += L1_CACHE_BYTES; | ||
| 239 | } | ||
| 240 | } | ||
| 241 | |||
| 242 | void flush_icache_range(unsigned long start, unsigned long end) | ||
| 243 | { | ||
| 244 | int size, i; | ||
| 245 | start = start & ~(L1_CACHE_BYTES - 1); | ||
| 246 | end = end & ~(L1_CACHE_BYTES - 1); | ||
| 247 | |||
| 248 | size = end - start; | ||
| 249 | /* invalidate icache lines. */ | ||
| 250 | for (i = 0; i < size; i += L1_CACHE_BYTES) { | ||
| 251 | __asm__ __volatile__( | ||
| 252 | "cache 0x02, [%0, 0]\n" | ||
| 253 | "nop\nnop\nnop\nnop\nnop\n" | ||
| 254 | : : "r" (start)); | ||
| 255 | start += L1_CACHE_BYTES; | ||
| 256 | } | ||
| 257 | } | ||
diff --git a/arch/score/mm/extable.c b/arch/score/mm/extable.c new file mode 100644 index 000000000000..01ff6445171c --- /dev/null +++ b/arch/score/mm/extable.c | |||
| @@ -0,0 +1,38 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/mm/extable.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/module.h> | ||
| 27 | |||
| 28 | int fixup_exception(struct pt_regs *regs) | ||
| 29 | { | ||
| 30 | const struct exception_table_entry *fixup; | ||
| 31 | |||
| 32 | fixup = search_exception_tables(regs->cp0_epc); | ||
| 33 | if (fixup) { | ||
| 34 | regs->cp0_epc = fixup->fixup; | ||
| 35 | return 1; | ||
| 36 | } | ||
| 37 | return 0; | ||
| 38 | } | ||
diff --git a/arch/score/mm/fault.c b/arch/score/mm/fault.c new file mode 100644 index 000000000000..47b600e4b2c5 --- /dev/null +++ b/arch/score/mm/fault.c | |||
| @@ -0,0 +1,235 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/mm/fault.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/errno.h> | ||
| 27 | #include <linux/interrupt.h> | ||
| 28 | #include <linux/kernel.h> | ||
| 29 | #include <linux/mm.h> | ||
| 30 | #include <linux/mman.h> | ||
| 31 | #include <linux/module.h> | ||
| 32 | #include <linux/signal.h> | ||
| 33 | #include <linux/sched.h> | ||
| 34 | #include <linux/string.h> | ||
| 35 | #include <linux/types.h> | ||
| 36 | #include <linux/ptrace.h> | ||
| 37 | |||
| 38 | /* | ||
| 39 | * This routine handles page faults. It determines the address, | ||
| 40 | * and the problem, and then passes it off to one of the appropriate | ||
| 41 | * routines. | ||
| 42 | */ | ||
| 43 | asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write, | ||
| 44 | unsigned long address) | ||
| 45 | { | ||
| 46 | struct vm_area_struct *vma = NULL; | ||
| 47 | struct task_struct *tsk = current; | ||
| 48 | struct mm_struct *mm = tsk->mm; | ||
| 49 | const int field = sizeof(unsigned long) * 2; | ||
| 50 | siginfo_t info; | ||
| 51 | int fault; | ||
| 52 | |||
| 53 | info.si_code = SEGV_MAPERR; | ||
| 54 | |||
| 55 | /* | ||
| 56 | * We fault-in kernel-space virtual memory on-demand. The | ||
| 57 | * 'reference' page table is init_mm.pgd. | ||
| 58 | * | ||
| 59 | * NOTE! We MUST NOT take any locks for this case. We may | ||
| 60 | * be in an interrupt or a critical region, and should | ||
| 61 | * only copy the information from the master page table, | ||
| 62 | * nothing more. | ||
| 63 | */ | ||
| 64 | if (unlikely(address >= VMALLOC_START && address <= VMALLOC_END)) | ||
| 65 | goto vmalloc_fault; | ||
| 66 | #ifdef MODULE_START | ||
| 67 | if (unlikely(address >= MODULE_START && address < MODULE_END)) | ||
| 68 | goto vmalloc_fault; | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /* | ||
| 72 | * If we're in an interrupt or have no user | ||
| 73 | * context, we must not take the fault.. | ||
| 74 | */ | ||
| 75 | if (in_atomic() || !mm) | ||
| 76 | goto bad_area_nosemaphore; | ||
| 77 | |||
| 78 | down_read(&mm->mmap_sem); | ||
| 79 | vma = find_vma(mm, address); | ||
| 80 | if (!vma) | ||
| 81 | goto bad_area; | ||
| 82 | if (vma->vm_start <= address) | ||
| 83 | goto good_area; | ||
| 84 | if (!(vma->vm_flags & VM_GROWSDOWN)) | ||
| 85 | goto bad_area; | ||
| 86 | if (expand_stack(vma, address)) | ||
| 87 | goto bad_area; | ||
| 88 | /* | ||
| 89 | * Ok, we have a good vm_area for this memory access, so | ||
| 90 | * we can handle it.. | ||
| 91 | */ | ||
| 92 | good_area: | ||
| 93 | info.si_code = SEGV_ACCERR; | ||
| 94 | |||
| 95 | if (write) { | ||
| 96 | if (!(vma->vm_flags & VM_WRITE)) | ||
| 97 | goto bad_area; | ||
| 98 | } else { | ||
| 99 | if (!(vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC))) | ||
| 100 | goto bad_area; | ||
| 101 | } | ||
| 102 | |||
| 103 | survive: | ||
| 104 | /* | ||
| 105 | * If for any reason at all we couldn't handle the fault, | ||
| 106 | * make sure we exit gracefully rather than endlessly redo | ||
| 107 | * the fault. | ||
| 108 | */ | ||
| 109 | fault = handle_mm_fault(mm, vma, address, write); | ||
| 110 | if (unlikely(fault & VM_FAULT_ERROR)) { | ||
| 111 | if (fault & VM_FAULT_OOM) | ||
| 112 | goto out_of_memory; | ||
| 113 | else if (fault & VM_FAULT_SIGBUS) | ||
| 114 | goto do_sigbus; | ||
| 115 | BUG(); | ||
| 116 | } | ||
| 117 | if (fault & VM_FAULT_MAJOR) | ||
| 118 | tsk->maj_flt++; | ||
| 119 | else | ||
| 120 | tsk->min_flt++; | ||
| 121 | |||
| 122 | up_read(&mm->mmap_sem); | ||
| 123 | return; | ||
| 124 | |||
| 125 | /* | ||
| 126 | * Something tried to access memory that isn't in our memory map.. | ||
| 127 | * Fix it, but check if it's kernel or user first.. | ||
| 128 | */ | ||
| 129 | bad_area: | ||
| 130 | up_read(&mm->mmap_sem); | ||
| 131 | |||
| 132 | bad_area_nosemaphore: | ||
| 133 | /* User mode accesses just cause a SIGSEGV */ | ||
| 134 | if (user_mode(regs)) { | ||
| 135 | tsk->thread.cp0_badvaddr = address; | ||
| 136 | tsk->thread.error_code = write; | ||
| 137 | info.si_signo = SIGSEGV; | ||
| 138 | info.si_errno = 0; | ||
| 139 | /* info.si_code has been set above */ | ||
| 140 | info.si_addr = (void __user *) address; | ||
| 141 | force_sig_info(SIGSEGV, &info, tsk); | ||
| 142 | return; | ||
| 143 | } | ||
| 144 | |||
| 145 | no_context: | ||
| 146 | /* Are we prepared to handle this kernel fault? */ | ||
| 147 | if (fixup_exception(regs)) { | ||
| 148 | current->thread.cp0_baduaddr = address; | ||
| 149 | return; | ||
| 150 | } | ||
| 151 | |||
| 152 | /* | ||
| 153 | * Oops. The kernel tried to access some bad page. We'll have to | ||
| 154 | * terminate things with extreme prejudice. | ||
| 155 | */ | ||
| 156 | bust_spinlocks(1); | ||
| 157 | |||
| 158 | printk(KERN_ALERT "CPU %d Unable to handle kernel paging request at " | ||
| 159 | "virtual address %0*lx, epc == %0*lx, ra == %0*lx\n", | ||
| 160 | 0, field, address, field, regs->cp0_epc, | ||
| 161 | field, regs->regs[3]); | ||
| 162 | die("Oops", regs); | ||
| 163 | |||
| 164 | /* | ||
| 165 | * We ran out of memory, or some other thing happened to us that made | ||
| 166 | * us unable to handle the page fault gracefully. | ||
| 167 | */ | ||
| 168 | out_of_memory: | ||
| 169 | up_read(&mm->mmap_sem); | ||
| 170 | if (is_global_init(tsk)) { | ||
| 171 | yield(); | ||
| 172 | down_read(&mm->mmap_sem); | ||
| 173 | goto survive; | ||
| 174 | } | ||
| 175 | printk("VM: killing process %s\n", tsk->comm); | ||
| 176 | if (user_mode(regs)) | ||
| 177 | do_group_exit(SIGKILL); | ||
| 178 | goto no_context; | ||
| 179 | |||
| 180 | do_sigbus: | ||
| 181 | up_read(&mm->mmap_sem); | ||
| 182 | /* Kernel mode? Handle exceptions or die */ | ||
| 183 | if (!user_mode(regs)) | ||
| 184 | goto no_context; | ||
| 185 | else | ||
| 186 | /* | ||
| 187 | * Send a sigbus, regardless of whether we were in kernel | ||
| 188 | * or user mode. | ||
| 189 | */ | ||
| 190 | tsk->thread.cp0_badvaddr = address; | ||
| 191 | info.si_signo = SIGBUS; | ||
| 192 | info.si_errno = 0; | ||
| 193 | info.si_code = BUS_ADRERR; | ||
| 194 | info.si_addr = (void __user *) address; | ||
| 195 | force_sig_info(SIGBUS, &info, tsk); | ||
| 196 | return; | ||
| 197 | vmalloc_fault: | ||
| 198 | { | ||
| 199 | /* | ||
| 200 | * Synchronize this task's top level page-table | ||
| 201 | * with the 'reference' page table. | ||
| 202 | * | ||
| 203 | * Do _not_ use "tsk" here. We might be inside | ||
| 204 | * an interrupt in the middle of a task switch.. | ||
| 205 | */ | ||
| 206 | int offset = __pgd_offset(address); | ||
| 207 | pgd_t *pgd, *pgd_k; | ||
| 208 | pud_t *pud, *pud_k; | ||
| 209 | pmd_t *pmd, *pmd_k; | ||
| 210 | pte_t *pte_k; | ||
| 211 | |||
| 212 | pgd = (pgd_t *) pgd_current + offset; | ||
| 213 | pgd_k = init_mm.pgd + offset; | ||
| 214 | |||
| 215 | if (!pgd_present(*pgd_k)) | ||
| 216 | goto no_context; | ||
| 217 | set_pgd(pgd, *pgd_k); | ||
| 218 | |||
| 219 | pud = pud_offset(pgd, address); | ||
| 220 | pud_k = pud_offset(pgd_k, address); | ||
| 221 | if (!pud_present(*pud_k)) | ||
| 222 | goto no_context; | ||
| 223 | |||
| 224 | pmd = pmd_offset(pud, address); | ||
| 225 | pmd_k = pmd_offset(pud_k, address); | ||
| 226 | if (!pmd_present(*pmd_k)) | ||
| 227 | goto no_context; | ||
| 228 | set_pmd(pmd, *pmd_k); | ||
| 229 | |||
| 230 | pte_k = pte_offset_kernel(pmd_k, address); | ||
| 231 | if (!pte_present(*pte_k)) | ||
| 232 | goto no_context; | ||
| 233 | return; | ||
| 234 | } | ||
| 235 | } | ||
diff --git a/arch/score/mm/init.c b/arch/score/mm/init.c new file mode 100644 index 000000000000..4e3dcd0c4716 --- /dev/null +++ b/arch/score/mm/init.c | |||
| @@ -0,0 +1,161 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/mm/init.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/errno.h> | ||
| 27 | #include <linux/bootmem.h> | ||
| 28 | #include <linux/kernel.h> | ||
| 29 | #include <linux/init.h> | ||
| 30 | #include <linux/mm.h> | ||
| 31 | #include <linux/mman.h> | ||
| 32 | #include <linux/pagemap.h> | ||
| 33 | #include <linux/proc_fs.h> | ||
| 34 | #include <linux/sched.h> | ||
| 35 | #include <linux/initrd.h> | ||
| 36 | |||
| 37 | #include <asm/sections.h> | ||
| 38 | #include <asm/tlb.h> | ||
| 39 | |||
| 40 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | ||
| 41 | |||
| 42 | unsigned long empty_zero_page; | ||
| 43 | EXPORT_SYMBOL_GPL(empty_zero_page); | ||
| 44 | |||
| 45 | static struct kcore_list kcore_mem, kcore_vmalloc; | ||
| 46 | |||
| 47 | static unsigned long setup_zero_page(void) | ||
| 48 | { | ||
| 49 | struct page *page; | ||
| 50 | |||
| 51 | empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 0); | ||
| 52 | if (!empty_zero_page) | ||
| 53 | panic("Oh boy, that early out of memory?"); | ||
| 54 | |||
| 55 | page = virt_to_page((void *) empty_zero_page); | ||
| 56 | SetPageReserved(page); | ||
| 57 | |||
| 58 | return 1UL; | ||
| 59 | } | ||
| 60 | |||
| 61 | #ifndef CONFIG_NEED_MULTIPLE_NODES | ||
| 62 | static int __init page_is_ram(unsigned long pagenr) | ||
| 63 | { | ||
| 64 | if (pagenr >= min_low_pfn && pagenr < max_low_pfn) | ||
| 65 | return 1; | ||
| 66 | else | ||
| 67 | return 0; | ||
| 68 | } | ||
| 69 | |||
| 70 | void __init paging_init(void) | ||
| 71 | { | ||
| 72 | unsigned long max_zone_pfns[MAX_NR_ZONES]; | ||
| 73 | unsigned long lastpfn; | ||
| 74 | |||
| 75 | pagetable_init(); | ||
| 76 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | ||
| 77 | lastpfn = max_low_pfn; | ||
| 78 | free_area_init_nodes(max_zone_pfns); | ||
| 79 | } | ||
| 80 | |||
| 81 | void __init mem_init(void) | ||
| 82 | { | ||
| 83 | unsigned long codesize, reservedpages, datasize, initsize; | ||
| 84 | unsigned long tmp, ram = 0; | ||
| 85 | |||
| 86 | max_mapnr = max_low_pfn; | ||
| 87 | high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); | ||
| 88 | totalram_pages += free_all_bootmem(); | ||
| 89 | totalram_pages -= setup_zero_page(); /* Setup zeroed pages. */ | ||
| 90 | reservedpages = 0; | ||
| 91 | |||
| 92 | for (tmp = 0; tmp < max_low_pfn; tmp++) | ||
| 93 | if (page_is_ram(tmp)) { | ||
| 94 | ram++; | ||
| 95 | if (PageReserved(pfn_to_page(tmp))) | ||
| 96 | reservedpages++; | ||
| 97 | } | ||
| 98 | |||
| 99 | num_physpages = ram; | ||
| 100 | codesize = (unsigned long) &_etext - (unsigned long) &_text; | ||
| 101 | datasize = (unsigned long) &_edata - (unsigned long) &_etext; | ||
| 102 | initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; | ||
| 103 | |||
| 104 | kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT); | ||
| 105 | kclist_add(&kcore_vmalloc, (void *) VMALLOC_START, | ||
| 106 | VMALLOC_END - VMALLOC_START); | ||
| 107 | |||
| 108 | printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " | ||
| 109 | "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n", | ||
| 110 | (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), | ||
| 111 | ram << (PAGE_SHIFT-10), codesize >> 10, | ||
| 112 | reservedpages << (PAGE_SHIFT-10), datasize >> 10, | ||
| 113 | initsize >> 10, | ||
| 114 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); | ||
| 115 | } | ||
| 116 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ | ||
| 117 | |||
| 118 | static void free_init_pages(const char *what, unsigned long begin, unsigned long end) | ||
| 119 | { | ||
| 120 | unsigned long pfn; | ||
| 121 | |||
| 122 | for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) { | ||
| 123 | struct page *page = pfn_to_page(pfn); | ||
| 124 | void *addr = phys_to_virt(PFN_PHYS(pfn)); | ||
| 125 | |||
| 126 | ClearPageReserved(page); | ||
| 127 | init_page_count(page); | ||
| 128 | memset(addr, POISON_FREE_INITMEM, PAGE_SIZE); | ||
| 129 | __free_page(page); | ||
| 130 | totalram_pages++; | ||
| 131 | } | ||
| 132 | printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); | ||
| 133 | } | ||
| 134 | |||
| 135 | #ifdef CONFIG_BLK_DEV_INITRD | ||
| 136 | void free_initrd_mem(unsigned long start, unsigned long end) | ||
| 137 | { | ||
| 138 | free_init_pages("initrd memory", | ||
| 139 | virt_to_phys((void *) start), | ||
| 140 | virt_to_phys((void *) end)); | ||
| 141 | } | ||
| 142 | #endif | ||
| 143 | |||
| 144 | void __init_refok free_initmem(void) | ||
| 145 | { | ||
| 146 | free_init_pages("unused kernel memory", | ||
| 147 | __pa(&__init_begin), | ||
| 148 | __pa(&__init_end)); | ||
| 149 | } | ||
| 150 | |||
| 151 | unsigned long pgd_current; | ||
| 152 | |||
| 153 | #define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order))) | ||
| 154 | |||
| 155 | /* | ||
| 156 | * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER | ||
| 157 | * are constants. So we use the variants from asm-offset.h until that gcc | ||
| 158 | * will officially be retired. | ||
| 159 | */ | ||
| 160 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned(PTE_ORDER); | ||
| 161 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER); | ||
diff --git a/arch/score/mm/pgtable.c b/arch/score/mm/pgtable.c new file mode 100644 index 000000000000..6408bb73d3cc --- /dev/null +++ b/arch/score/mm/pgtable.c | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/mm/pgtable-32.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/bootmem.h> | ||
| 27 | #include <linux/init.h> | ||
| 28 | #include <linux/pfn.h> | ||
| 29 | #include <linux/mm.h> | ||
| 30 | |||
| 31 | void pgd_init(unsigned long page) | ||
| 32 | { | ||
| 33 | unsigned long *p = (unsigned long *) page; | ||
| 34 | int i; | ||
| 35 | |||
| 36 | for (i = 0; i < USER_PTRS_PER_PGD; i += 8) { | ||
| 37 | p[i + 0] = (unsigned long) invalid_pte_table; | ||
| 38 | p[i + 1] = (unsigned long) invalid_pte_table; | ||
| 39 | p[i + 2] = (unsigned long) invalid_pte_table; | ||
| 40 | p[i + 3] = (unsigned long) invalid_pte_table; | ||
| 41 | p[i + 4] = (unsigned long) invalid_pte_table; | ||
| 42 | p[i + 5] = (unsigned long) invalid_pte_table; | ||
| 43 | p[i + 6] = (unsigned long) invalid_pte_table; | ||
| 44 | p[i + 7] = (unsigned long) invalid_pte_table; | ||
| 45 | } | ||
| 46 | } | ||
| 47 | |||
| 48 | void __init pagetable_init(void) | ||
| 49 | { | ||
| 50 | /* Initialize the entire pgd. */ | ||
| 51 | pgd_init((unsigned long)swapper_pg_dir); | ||
| 52 | } | ||
diff --git a/arch/score/mm/tlb-miss.S b/arch/score/mm/tlb-miss.S new file mode 100644 index 000000000000..f27651914e8d --- /dev/null +++ b/arch/score/mm/tlb-miss.S | |||
| @@ -0,0 +1,199 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/mm/tlbex.S | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <asm/asmmacro.h> | ||
| 27 | #include <asm/pgtable-bits.h> | ||
| 28 | #include <asm/scoreregs.h> | ||
| 29 | |||
| 30 | /* | ||
| 31 | * After this macro runs, the pte faulted on is | ||
| 32 | * in register PTE, a ptr into the table in which | ||
| 33 | * the pte belongs is in PTR. | ||
| 34 | */ | ||
| 35 | .macro load_pte, pte, ptr | ||
| 36 | la \ptr, pgd_current | ||
| 37 | lw \ptr, [\ptr, 0] | ||
| 38 | mfcr \pte, cr6 | ||
| 39 | srli \pte, \pte, 22 | ||
| 40 | slli \pte, \pte, 2 | ||
| 41 | add \ptr, \ptr, \pte | ||
| 42 | lw \ptr, [\ptr, 0] | ||
| 43 | mfcr \pte, cr6 | ||
| 44 | srli \pte, \pte, 10 | ||
| 45 | andi \pte, 0xffc | ||
| 46 | add \ptr, \ptr, \pte | ||
| 47 | lw \pte, [\ptr, 0] | ||
| 48 | .endm | ||
| 49 | |||
| 50 | .macro pte_reload, ptr | ||
| 51 | lw \ptr, [\ptr, 0] | ||
| 52 | mtcr \ptr, cr12 | ||
| 53 | nop | ||
| 54 | nop | ||
| 55 | nop | ||
| 56 | nop | ||
| 57 | nop | ||
| 58 | .endm | ||
| 59 | |||
| 60 | .macro do_fault, write | ||
| 61 | SAVE_ALL | ||
| 62 | mfcr r6, cr6 | ||
| 63 | mv r4, r0 | ||
| 64 | ldi r5, \write | ||
| 65 | la r8, do_page_fault | ||
| 66 | brl r8 | ||
| 67 | j ret_from_exception | ||
| 68 | .endm | ||
| 69 | |||
| 70 | .macro pte_writable, pte, ptr, label | ||
| 71 | andi \pte, 0x280 | ||
| 72 | cmpi.c \pte, 0x280 | ||
| 73 | bne \label | ||
| 74 | lw \pte, [\ptr, 0] /*reload PTE*/ | ||
| 75 | .endm | ||
| 76 | |||
| 77 | /* | ||
| 78 | * Make PTE writable, update software status bits as well, | ||
| 79 | * then store at PTR. | ||
| 80 | */ | ||
| 81 | .macro pte_makewrite, pte, ptr | ||
| 82 | ori \pte, 0x426 | ||
| 83 | sw \pte, [\ptr, 0] | ||
| 84 | .endm | ||
| 85 | |||
| 86 | .text | ||
| 87 | ENTRY(score7_FTLB_refill_Handler) | ||
| 88 | la r31, pgd_current /* get pgd pointer */ | ||
| 89 | lw r31, [r31, 0] /* get the address of PGD */ | ||
| 90 | mfcr r30, cr6 | ||
| 91 | srli r30, r30, 22 /* PGDIR_SHIFT = 22*/ | ||
| 92 | slli r30, r30, 2 | ||
| 93 | add r31, r31, r30 | ||
| 94 | lw r31, [r31, 0] /* get the address of the start address of PTE table */ | ||
| 95 | |||
| 96 | mfcr r30, cr9 | ||
| 97 | andi r30, 0xfff /* equivalent to get PET index and right shift 2 bits */ | ||
| 98 | add r31, r31, r30 | ||
| 99 | lw r30, [r31, 0] /* load pte entry */ | ||
| 100 | mtcr r30, cr12 | ||
| 101 | nop | ||
| 102 | nop | ||
| 103 | nop | ||
| 104 | nop | ||
| 105 | nop | ||
| 106 | mtrtlb | ||
| 107 | nop | ||
| 108 | nop | ||
| 109 | nop | ||
| 110 | nop | ||
| 111 | nop | ||
| 112 | rte /* 6 cycles to make sure tlb entry works */ | ||
| 113 | |||
| 114 | ENTRY(score7_KSEG_refill_Handler) | ||
| 115 | la r31, pgd_current /* get pgd pointer */ | ||
| 116 | lw r31, [r31, 0] /* get the address of PGD */ | ||
| 117 | mfcr r30, cr6 | ||
| 118 | srli r30, r30, 22 /* PGDIR_SHIFT = 22 */ | ||
| 119 | slli r30, r30, 2 | ||
| 120 | add r31, r31, r30 | ||
| 121 | lw r31, [r31, 0] /* get the address of the start address of PTE table */ | ||
| 122 | |||
| 123 | mfcr r30, cr6 /* get Bad VPN */ | ||
| 124 | srli r30, r30, 10 | ||
| 125 | andi r30, 0xffc /* PTE VPN mask (bit 11~2) */ | ||
| 126 | |||
| 127 | add r31, r31, r30 | ||
| 128 | lw r30, [r31, 0] /* load pte entry */ | ||
| 129 | mtcr r30, cr12 | ||
| 130 | nop | ||
| 131 | nop | ||
| 132 | nop | ||
| 133 | nop | ||
| 134 | nop | ||
| 135 | mtrtlb | ||
| 136 | nop | ||
| 137 | nop | ||
| 138 | nop | ||
| 139 | nop | ||
| 140 | nop | ||
| 141 | rte /* 6 cycles to make sure tlb entry works */ | ||
| 142 | |||
| 143 | nopage_tlbl: | ||
| 144 | do_fault 0 /* Read */ | ||
| 145 | |||
| 146 | ENTRY(handle_tlb_refill) | ||
| 147 | load_pte r30, r31 | ||
| 148 | pte_writable r30, r31, handle_tlb_refill_nopage | ||
| 149 | pte_makewrite r30, r31 /* Access|Modify|Dirty|Valid */ | ||
| 150 | pte_reload r31 | ||
| 151 | mtrtlb | ||
| 152 | nop | ||
| 153 | nop | ||
| 154 | nop | ||
| 155 | nop | ||
| 156 | nop | ||
| 157 | rte | ||
| 158 | handle_tlb_refill_nopage: | ||
| 159 | do_fault 0 /* Read */ | ||
| 160 | |||
| 161 | ENTRY(handle_tlb_invaild) | ||
| 162 | load_pte r30, r31 | ||
| 163 | stlb /* find faulting entry */ | ||
| 164 | pte_writable r30, r31, handle_tlb_invaild_nopage | ||
| 165 | pte_makewrite r30, r31 /* Access|Modify|Dirty|Valid */ | ||
| 166 | pte_reload r31 | ||
| 167 | mtptlb | ||
| 168 | nop | ||
| 169 | nop | ||
| 170 | nop | ||
| 171 | nop | ||
| 172 | nop | ||
| 173 | rte | ||
| 174 | handle_tlb_invaild_nopage: | ||
| 175 | do_fault 0 /* Read */ | ||
| 176 | |||
| 177 | ENTRY(handle_mod) | ||
| 178 | load_pte r30, r31 | ||
| 179 | stlb /* find faulting entry */ | ||
| 180 | andi r30, _PAGE_WRITE /* Writable? */ | ||
| 181 | cmpz.c r30 | ||
| 182 | beq nowrite_mod | ||
| 183 | lw r30, [r31, 0] /* reload into r30 */ | ||
| 184 | |||
| 185 | /* Present and writable bits set, set accessed and dirty bits. */ | ||
| 186 | pte_makewrite r30, r31 | ||
| 187 | |||
| 188 | /* Now reload the entry into the tlb. */ | ||
| 189 | pte_reload r31 | ||
| 190 | mtptlb | ||
| 191 | nop | ||
| 192 | nop | ||
| 193 | nop | ||
| 194 | nop | ||
| 195 | nop | ||
| 196 | rte | ||
| 197 | |||
| 198 | nowrite_mod: | ||
| 199 | do_fault 1 /* Write */ | ||
diff --git a/arch/score/mm/tlb-score.c b/arch/score/mm/tlb-score.c new file mode 100644 index 000000000000..4fa5aa5afecc --- /dev/null +++ b/arch/score/mm/tlb-score.c | |||
| @@ -0,0 +1,251 @@ | |||
| 1 | /* | ||
| 2 | * arch/score/mm/tlb-score.c | ||
| 3 | * | ||
| 4 | * Score Processor version. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Sunplus Core Technology Co., Ltd. | ||
| 7 | * Lennox Wu <lennox.wu@sunplusct.com> | ||
| 8 | * Chen Liqin <liqin.chen@sunplusct.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, see the file COPYING, or write | ||
| 22 | * to the Free Software Foundation, Inc., | ||
| 23 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 24 | */ | ||
| 25 | |||
| 26 | #include <linux/highmem.h> | ||
| 27 | #include <linux/module.h> | ||
| 28 | |||
| 29 | #include <asm/irq.h> | ||
| 30 | #include <asm/mmu_context.h> | ||
| 31 | #include <asm/tlb.h> | ||
| 32 | |||
| 33 | #define TLBSIZE 32 | ||
| 34 | |||
| 35 | unsigned long asid_cache = ASID_FIRST_VERSION; | ||
| 36 | EXPORT_SYMBOL(asid_cache); | ||
| 37 | |||
| 38 | void local_flush_tlb_all(void) | ||
| 39 | { | ||
| 40 | unsigned long flags; | ||
| 41 | unsigned long old_ASID; | ||
| 42 | int entry; | ||
| 43 | |||
| 44 | local_irq_save(flags); | ||
| 45 | old_ASID = pevn_get() & ASID_MASK; | ||
| 46 | pectx_set(0); /* invalid */ | ||
| 47 | entry = tlblock_get(); /* skip locked entries*/ | ||
| 48 | |||
| 49 | for (; entry < TLBSIZE; entry++) { | ||
| 50 | tlbpt_set(entry); | ||
| 51 | pevn_set(KSEG1); | ||
| 52 | barrier(); | ||
| 53 | tlb_write_indexed(); | ||
| 54 | } | ||
| 55 | pevn_set(old_ASID); | ||
| 56 | local_irq_restore(flags); | ||
| 57 | } | ||
| 58 | |||
| 59 | /* | ||
| 60 | * If mm is currently active_mm, we can't really drop it. Instead, | ||
| 61 | * we will get a new one for it. | ||
| 62 | */ | ||
| 63 | static inline void | ||
| 64 | drop_mmu_context(struct mm_struct *mm) | ||
| 65 | { | ||
| 66 | unsigned long flags; | ||
| 67 | |||
| 68 | local_irq_save(flags); | ||
| 69 | get_new_mmu_context(mm); | ||
| 70 | pevn_set(mm->context & ASID_MASK); | ||
| 71 | local_irq_restore(flags); | ||
| 72 | } | ||
| 73 | |||
| 74 | void local_flush_tlb_mm(struct mm_struct *mm) | ||
| 75 | { | ||
| 76 | if (mm->context != 0) | ||
| 77 | drop_mmu_context(mm); | ||
| 78 | } | ||
| 79 | |||
| 80 | void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | ||
| 81 | unsigned long end) | ||
| 82 | { | ||
| 83 | struct mm_struct *mm = vma->vm_mm; | ||
| 84 | unsigned long vma_mm_context = mm->context; | ||
| 85 | if (mm->context != 0) { | ||
| 86 | unsigned long flags; | ||
| 87 | int size; | ||
| 88 | |||
| 89 | local_irq_save(flags); | ||
| 90 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | ||
| 91 | if (size <= TLBSIZE) { | ||
| 92 | int oldpid = pevn_get() & ASID_MASK; | ||
| 93 | int newpid = vma_mm_context & ASID_MASK; | ||
| 94 | |||
| 95 | start &= PAGE_MASK; | ||
| 96 | end += (PAGE_SIZE - 1); | ||
| 97 | end &= PAGE_MASK; | ||
| 98 | while (start < end) { | ||
| 99 | int idx; | ||
| 100 | |||
| 101 | pevn_set(start | newpid); | ||
| 102 | start += PAGE_SIZE; | ||
| 103 | barrier(); | ||
| 104 | tlb_probe(); | ||
| 105 | idx = tlbpt_get(); | ||
| 106 | pectx_set(0); | ||
| 107 | pevn_set(KSEG1); | ||
| 108 | if (idx < 0) | ||
| 109 | continue; | ||
| 110 | tlb_write_indexed(); | ||
| 111 | } | ||
| 112 | pevn_set(oldpid); | ||
| 113 | } else { | ||
| 114 | /* Bigger than TLBSIZE, get new ASID directly */ | ||
| 115 | get_new_mmu_context(mm); | ||
| 116 | if (mm == current->active_mm) | ||
| 117 | pevn_set(vma_mm_context & ASID_MASK); | ||
| 118 | } | ||
| 119 | local_irq_restore(flags); | ||
| 120 | } | ||
| 121 | } | ||
| 122 | |||
| 123 | void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) | ||
| 124 | { | ||
| 125 | unsigned long flags; | ||
| 126 | int size; | ||
| 127 | |||
| 128 | local_irq_save(flags); | ||
| 129 | size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; | ||
| 130 | if (size <= TLBSIZE) { | ||
| 131 | int pid = pevn_get(); | ||
| 132 | |||
| 133 | start &= PAGE_MASK; | ||
| 134 | end += PAGE_SIZE - 1; | ||
| 135 | end &= PAGE_MASK; | ||
| 136 | |||
| 137 | while (start < end) { | ||
| 138 | long idx; | ||
| 139 | |||
| 140 | pevn_set(start); | ||
| 141 | start += PAGE_SIZE; | ||
| 142 | tlb_probe(); | ||
| 143 | idx = tlbpt_get(); | ||
| 144 | if (idx < 0) | ||
| 145 | continue; | ||
| 146 | pectx_set(0); | ||
| 147 | pevn_set(KSEG1); | ||
| 148 | barrier(); | ||
| 149 | tlb_write_indexed(); | ||
| 150 | } | ||
| 151 | pevn_set(pid); | ||
| 152 | } else { | ||
| 153 | local_flush_tlb_all(); | ||
| 154 | } | ||
| 155 | |||
| 156 | local_irq_restore(flags); | ||
| 157 | } | ||
| 158 | |||
| 159 | void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) | ||
| 160 | { | ||
| 161 | if (!vma || vma->vm_mm->context != 0) { | ||
| 162 | unsigned long flags; | ||
| 163 | int oldpid, newpid, idx; | ||
| 164 | unsigned long vma_ASID = vma->vm_mm->context; | ||
| 165 | |||
| 166 | newpid = vma_ASID & ASID_MASK; | ||
| 167 | page &= PAGE_MASK; | ||
| 168 | local_irq_save(flags); | ||
| 169 | oldpid = pevn_get() & ASID_MASK; | ||
| 170 | pevn_set(page | newpid); | ||
| 171 | barrier(); | ||
| 172 | tlb_probe(); | ||
| 173 | idx = tlbpt_get(); | ||
| 174 | pectx_set(0); | ||
| 175 | pevn_set(KSEG1); | ||
| 176 | if (idx < 0) /* p_bit(31) - 1: miss, 0: hit*/ | ||
| 177 | goto finish; | ||
| 178 | barrier(); | ||
| 179 | tlb_write_indexed(); | ||
| 180 | finish: | ||
| 181 | pevn_set(oldpid); | ||
| 182 | local_irq_restore(flags); | ||
| 183 | } | ||
| 184 | } | ||
| 185 | |||
| 186 | /* | ||
| 187 | * This one is only used for pages with the global bit set so we don't care | ||
| 188 | * much about the ASID. | ||
| 189 | */ | ||
| 190 | void local_flush_tlb_one(unsigned long page) | ||
| 191 | { | ||
| 192 | unsigned long flags; | ||
| 193 | int oldpid, idx; | ||
| 194 | |||
| 195 | local_irq_save(flags); | ||
| 196 | oldpid = pevn_get(); | ||
| 197 | page &= (PAGE_MASK << 1); | ||
| 198 | pevn_set(page); | ||
| 199 | barrier(); | ||
| 200 | tlb_probe(); | ||
| 201 | idx = tlbpt_get(); | ||
| 202 | pectx_set(0); | ||
| 203 | if (idx >= 0) { | ||
| 204 | /* Make sure all entries differ. */ | ||
| 205 | pevn_set(KSEG1); | ||
| 206 | barrier(); | ||
| 207 | tlb_write_indexed(); | ||
| 208 | } | ||
| 209 | pevn_set(oldpid); | ||
| 210 | local_irq_restore(flags); | ||
| 211 | } | ||
| 212 | |||
| 213 | void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) | ||
| 214 | { | ||
| 215 | unsigned long flags; | ||
| 216 | int idx, pid; | ||
| 217 | |||
| 218 | /* | ||
| 219 | * Handle debugger faulting in for debugee. | ||
| 220 | */ | ||
| 221 | if (current->active_mm != vma->vm_mm) | ||
| 222 | return; | ||
| 223 | |||
| 224 | pid = pevn_get() & ASID_MASK; | ||
| 225 | |||
| 226 | local_irq_save(flags); | ||
| 227 | address &= PAGE_MASK; | ||
| 228 | pevn_set(address | pid); | ||
| 229 | barrier(); | ||
| 230 | tlb_probe(); | ||
| 231 | idx = tlbpt_get(); | ||
| 232 | pectx_set(pte_val(pte)); | ||
| 233 | pevn_set(address | pid); | ||
| 234 | if (idx < 0) | ||
| 235 | tlb_write_random(); | ||
| 236 | else | ||
| 237 | tlb_write_indexed(); | ||
| 238 | |||
| 239 | pevn_set(pid); | ||
| 240 | local_irq_restore(flags); | ||
| 241 | } | ||
| 242 | |||
| 243 | void __cpuinit tlb_init(void) | ||
| 244 | { | ||
| 245 | tlblock_set(0); | ||
| 246 | local_flush_tlb_all(); | ||
| 247 | memcpy((void *)(EXCEPTION_VECTOR_BASE_ADDR + 0x100), | ||
| 248 | &score7_FTLB_refill_Handler, 0xFC); | ||
| 249 | flush_icache_range(EXCEPTION_VECTOR_BASE_ADDR + 0x100, | ||
| 250 | EXCEPTION_VECTOR_BASE_ADDR + 0x1FC); | ||
| 251 | } | ||
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index e2bdd7b94fd9..4df3570fe511 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
| @@ -10,12 +10,17 @@ config SUPERH | |||
| 10 | select EMBEDDED | 10 | select EMBEDDED |
| 11 | select HAVE_CLK | 11 | select HAVE_CLK |
| 12 | select HAVE_IDE | 12 | select HAVE_IDE |
| 13 | select HAVE_LMB | ||
| 13 | select HAVE_OPROFILE | 14 | select HAVE_OPROFILE |
| 14 | select HAVE_GENERIC_DMA_COHERENT | 15 | select HAVE_GENERIC_DMA_COHERENT |
| 15 | select HAVE_IOREMAP_PROT if MMU | 16 | select HAVE_IOREMAP_PROT if MMU |
| 16 | select HAVE_ARCH_TRACEHOOK | 17 | select HAVE_ARCH_TRACEHOOK |
| 17 | select HAVE_DMA_API_DEBUG | 18 | select HAVE_DMA_API_DEBUG |
| 18 | select HAVE_PERF_COUNTERS | 19 | select HAVE_PERF_COUNTERS |
| 20 | select HAVE_KERNEL_GZIP | ||
| 21 | select HAVE_KERNEL_BZIP2 | ||
| 22 | select HAVE_KERNEL_LZMA | ||
| 23 | select HAVE_SYSCALL_TRACEPOINTS | ||
| 19 | select RTC_LIB | 24 | select RTC_LIB |
| 20 | select GENERIC_ATOMIC64 | 25 | select GENERIC_ATOMIC64 |
| 21 | help | 26 | help |
| @@ -31,6 +36,9 @@ config SUPERH32 | |||
| 31 | select HAVE_FUNCTION_TRACER | 36 | select HAVE_FUNCTION_TRACER |
| 32 | select HAVE_FTRACE_MCOUNT_RECORD | 37 | select HAVE_FTRACE_MCOUNT_RECORD |
| 33 | select HAVE_DYNAMIC_FTRACE | 38 | select HAVE_DYNAMIC_FTRACE |
| 39 | select HAVE_FUNCTION_TRACE_MCOUNT_TEST | ||
| 40 | select HAVE_FTRACE_SYSCALLS | ||
| 41 | select HAVE_FUNCTION_GRAPH_TRACER | ||
| 34 | select HAVE_ARCH_KGDB | 42 | select HAVE_ARCH_KGDB |
| 35 | select ARCH_HIBERNATION_POSSIBLE if MMU | 43 | select ARCH_HIBERNATION_POSSIBLE if MMU |
| 36 | 44 | ||
| @@ -212,6 +220,8 @@ config CPU_SHX3 | |||
| 212 | config ARCH_SHMOBILE | 220 | config ARCH_SHMOBILE |
| 213 | bool | 221 | bool |
| 214 | select ARCH_SUSPEND_POSSIBLE | 222 | select ARCH_SUSPEND_POSSIBLE |
| 223 | select PM | ||
| 224 | select PM_RUNTIME | ||
| 215 | 225 | ||
| 216 | if SUPERH32 | 226 | if SUPERH32 |
| 217 | 227 | ||
| @@ -389,6 +399,13 @@ config CPU_SUBTYPE_SH7724 | |||
| 389 | help | 399 | help |
| 390 | Select SH7724 if you have an SH-MobileR2R CPU. | 400 | Select SH7724 if you have an SH-MobileR2R CPU. |
| 391 | 401 | ||
| 402 | config CPU_SUBTYPE_SH7757 | ||
| 403 | bool "Support SH7757 processor" | ||
| 404 | select CPU_SH4A | ||
| 405 | select CPU_SHX2 | ||
| 406 | help | ||
| 407 | Select SH7757 if you have a SH4A SH7757 CPU. | ||
| 408 | |||
| 392 | config CPU_SUBTYPE_SH7763 | 409 | config CPU_SUBTYPE_SH7763 |
| 393 | bool "Support SH7763 processor" | 410 | bool "Support SH7763 processor" |
| 394 | select CPU_SH4A | 411 | select CPU_SH4A |
| @@ -751,12 +768,31 @@ config UBC_WAKEUP | |||
| 751 | 768 | ||
| 752 | If unsure, say N. | 769 | If unsure, say N. |
| 753 | 770 | ||
| 754 | config CMDLINE_BOOL | 771 | choice |
| 755 | bool "Default bootloader kernel arguments" | 772 | prompt "Kernel command line" |
| 773 | optional | ||
| 774 | default CMDLINE_OVERWRITE | ||
| 775 | help | ||
| 776 | Setting this option allows the kernel command line arguments | ||
| 777 | to be set. | ||
| 778 | |||
| 779 | config CMDLINE_OVERWRITE | ||
| 780 | bool "Overwrite bootloader kernel arguments" | ||
| 781 | help | ||
| 782 | Given string will overwrite any arguments passed in by | ||
| 783 | a bootloader. | ||
| 784 | |||
| 785 | config CMDLINE_EXTEND | ||
| 786 | bool "Extend bootloader kernel arguments" | ||
| 787 | help | ||
| 788 | Given string will be concatenated with arguments passed in | ||
| 789 | by a bootloader. | ||
| 790 | |||
| 791 | endchoice | ||
| 756 | 792 | ||
| 757 | config CMDLINE | 793 | config CMDLINE |
| 758 | string "Initial kernel command string" | 794 | string "Kernel command line arguments string" |
| 759 | depends on CMDLINE_BOOL | 795 | depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND |
| 760 | default "console=ttySC1,115200" | 796 | default "console=ttySC1,115200" |
| 761 | 797 | ||
| 762 | endmenu | 798 | endmenu |
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 39224b57c6ef..55907af1dc25 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug | |||
| @@ -38,11 +38,13 @@ config EARLY_SCIF_CONSOLE_PORT | |||
| 38 | default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ | 38 | default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ |
| 39 | CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ | 39 | CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ |
| 40 | CPU_SUBTYPE_SH7343 | 40 | CPU_SUBTYPE_SH7343 |
| 41 | default "0xffea0000" if CPU_SUBTYPE_SH7785 | 41 | default "0xfe4c0000" if CPU_SUBTYPE_SH7757 |
| 42 | default "0xffeb0000" if CPU_SUBTYPE_SH7785 | ||
| 42 | default "0xffeb0000" if CPU_SUBTYPE_SH7786 | 43 | default "0xffeb0000" if CPU_SUBTYPE_SH7786 |
| 43 | default "0xfffe8000" if CPU_SUBTYPE_SH7203 | 44 | default "0xfffe8000" if CPU_SUBTYPE_SH7203 |
| 44 | default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 | 45 | default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 |
| 45 | default "0xffe80000" if CPU_SH4 | 46 | default "0xffe80000" if CPU_SH4 |
| 47 | default "0xa4000150" if CPU_SH3 | ||
| 46 | default "0x00000000" | 48 | default "0x00000000" |
| 47 | 49 | ||
| 48 | config EARLY_PRINTK | 50 | config EARLY_PRINTK |
| @@ -61,12 +63,14 @@ config EARLY_PRINTK | |||
| 61 | select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using | 63 | select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using |
| 62 | the kernel command line option to toggle back and forth. | 64 | the kernel command line option to toggle back and forth. |
| 63 | 65 | ||
| 64 | config DEBUG_STACKOVERFLOW | 66 | config STACK_DEBUG |
| 65 | bool "Check for stack overflows" | 67 | bool "Check for stack overflows" |
| 66 | depends on DEBUG_KERNEL && SUPERH32 | 68 | depends on DEBUG_KERNEL && SUPERH32 |
| 67 | help | 69 | help |
| 68 | This option will cause messages to be printed if free stack space | 70 | This option will cause messages to be printed if free stack space |
| 69 | drops below a certain limit. | 71 | drops below a certain limit. Saying Y here will add overhead to |
| 72 | every function call and will therefore incur a major | ||
| 73 | performance hit. Most users should say N. | ||
| 70 | 74 | ||
| 71 | config DEBUG_STACK_USAGE | 75 | config DEBUG_STACK_USAGE |
| 72 | bool "Stack utilization instrumentation" | 76 | bool "Stack utilization instrumentation" |
| @@ -107,6 +111,14 @@ config DUMP_CODE | |||
| 107 | 111 | ||
| 108 | Those looking for more verbose debugging output should say Y. | 112 | Those looking for more verbose debugging output should say Y. |
| 109 | 113 | ||
| 114 | config DWARF_UNWINDER | ||
| 115 | bool "Enable the DWARF unwinder for stacktraces" | ||
| 116 | select FRAME_POINTER | ||
| 117 | default n | ||
| 118 | help | ||
| 119 | Enabling this option will make stacktraces more accurate, at | ||
| 120 | the cost of an increase in overall kernel size. | ||
| 121 | |||
| 110 | config SH_NO_BSS_INIT | 122 | config SH_NO_BSS_INIT |
| 111 | bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" | 123 | bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" |
| 112 | depends on DEBUG_KERNEL | 124 | depends on DEBUG_KERNEL |
| @@ -123,4 +135,9 @@ config SH64_SR_WATCH | |||
| 123 | bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" | 135 | bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" |
| 124 | depends on SUPERH64 | 136 | depends on SUPERH64 |
| 125 | 137 | ||
| 138 | config MCOUNT | ||
| 139 | def_bool y | ||
| 140 | depends on SUPERH32 | ||
| 141 | depends on STACK_DEBUG || FUNCTION_TRACER | ||
| 142 | |||
| 126 | endmenu | 143 | endmenu |
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 75d049b03f7e..fc51a918b31a 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile | |||
| @@ -136,6 +136,8 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh | |||
| 136 | machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705 | 136 | machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705 |
| 137 | machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander | 137 | machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander |
| 138 | machdir-$(CONFIG_SH_MIGOR) += mach-migor | 138 | machdir-$(CONFIG_SH_MIGOR) += mach-migor |
| 139 | machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09 | ||
| 140 | machdir-$(CONFIG_SH_ECOVEC) += mach-ecovec24 | ||
| 139 | machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780 | 141 | machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780 |
| 140 | machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto | 142 | machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto |
| 141 | machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp | 143 | machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp |
| @@ -186,17 +188,27 @@ KBUILD_CFLAGS += -pipe $(cflags-y) | |||
| 186 | KBUILD_CPPFLAGS += $(cflags-y) | 188 | KBUILD_CPPFLAGS += $(cflags-y) |
| 187 | KBUILD_AFLAGS += $(cflags-y) | 189 | KBUILD_AFLAGS += $(cflags-y) |
| 188 | 190 | ||
| 191 | ifeq ($(CONFIG_MCOUNT),y) | ||
| 192 | KBUILD_CFLAGS += -pg | ||
| 193 | endif | ||
| 194 | |||
| 195 | ifeq ($(CONFIG_DWARF_UNWINDER),y) | ||
| 196 | KBUILD_CFLAGS += -fasynchronous-unwind-tables | ||
| 197 | endif | ||
| 198 | |||
| 189 | libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) | 199 | libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) |
| 190 | libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) | 200 | libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) |
| 191 | 201 | ||
| 192 | PHONY += maketools FORCE | 202 | BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec \ |
| 203 | zImage vmlinux.srec romImage | ||
| 204 | PHONY += maketools $(BOOT_TARGETS) FORCE | ||
| 193 | 205 | ||
| 194 | maketools: include/linux/version.h FORCE | 206 | maketools: include/linux/version.h FORCE |
| 195 | $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h | 207 | $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h |
| 196 | 208 | ||
| 197 | all: $(KBUILD_IMAGE) | 209 | all: $(KBUILD_IMAGE) |
| 198 | 210 | ||
| 199 | zImage uImage uImage.srec vmlinux.srec: vmlinux | 211 | $(BOOT_TARGETS): vmlinux |
| 200 | $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ | 212 | $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ |
| 201 | 213 | ||
| 202 | compressed: zImage | 214 | compressed: zImage |
| @@ -208,10 +220,14 @@ archclean: | |||
| 208 | $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall | 220 | $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall |
| 209 | 221 | ||
| 210 | define archhelp | 222 | define archhelp |
| 211 | @echo '* zImage - Compressed kernel image' | 223 | @echo ' zImage - Compressed kernel image' |
| 224 | @echo ' romImage - Compressed ROM image, if supported' | ||
| 212 | @echo ' vmlinux.srec - Create an ELF S-record' | 225 | @echo ' vmlinux.srec - Create an ELF S-record' |
| 213 | @echo ' uImage - Create a bootable image for U-Boot' | 226 | @echo '* uImage - Alias to bootable U-Boot image' |
| 214 | @echo ' uImage.srec - Create an S-record for U-Boot' | 227 | @echo ' uImage.srec - Create an S-record for U-Boot' |
| 228 | @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)' | ||
| 229 | @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)' | ||
| 230 | @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)' | ||
| 215 | endef | 231 | endef |
| 216 | 232 | ||
| 217 | CLEAN_FILES += include/asm-sh/machtypes.h | 233 | CLEAN_FILES += include/asm-sh/machtypes.h |
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index 2b1af0eefa6a..aedd9deb5de2 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig | |||
| @@ -160,7 +160,6 @@ config SH_SH7785LCR | |||
| 160 | bool "SH7785LCR" | 160 | bool "SH7785LCR" |
| 161 | depends on CPU_SUBTYPE_SH7785 | 161 | depends on CPU_SUBTYPE_SH7785 |
| 162 | select SYS_SUPPORTS_PCI | 162 | select SYS_SUPPORTS_PCI |
| 163 | select IO_TRAPPED if MMU | ||
| 164 | 163 | ||
| 165 | config SH_SH7785LCR_29BIT_PHYSMAPS | 164 | config SH_SH7785LCR_29BIT_PHYSMAPS |
| 166 | bool "SH7785LCR 29bit physmaps" | 165 | bool "SH7785LCR 29bit physmaps" |
| @@ -171,6 +170,13 @@ config SH_SH7785LCR_29BIT_PHYSMAPS | |||
| 171 | DIP switch(S2-5). If you set the DIP switch for S2-5 = ON, | 170 | DIP switch(S2-5). If you set the DIP switch for S2-5 = ON, |
| 172 | you can access all on-board device in 29bit address mode. | 171 | you can access all on-board device in 29bit address mode. |
| 173 | 172 | ||
| 173 | config SH_SH7785LCR_PT | ||
| 174 | bool "SH7785LCR prototype board on 32-bit MMU mode" | ||
| 175 | depends on SH_SH7785LCR && 32BIT | ||
| 176 | default n | ||
| 177 | help | ||
| 178 | If you use prototype board, this option is enabled. | ||
| 179 | |||
| 174 | config SH_URQUELL | 180 | config SH_URQUELL |
| 175 | bool "Urquell" | 181 | bool "Urquell" |
| 176 | depends on CPU_SUBTYPE_SH7786 | 182 | depends on CPU_SUBTYPE_SH7786 |
| @@ -193,6 +199,20 @@ config SH_AP325RXA | |||
| 193 | Renesas "AP-325RXA" support. | 199 | Renesas "AP-325RXA" support. |
| 194 | Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" | 200 | Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" |
| 195 | 201 | ||
| 202 | config SH_KFR2R09 | ||
| 203 | bool "KFR2R09" | ||
| 204 | depends on CPU_SUBTYPE_SH7724 | ||
| 205 | select ARCH_REQUIRE_GPIOLIB | ||
| 206 | help | ||
| 207 | "Kit For R2R for 2009" support. | ||
| 208 | |||
| 209 | config SH_ECOVEC | ||
| 210 | bool "EcoVec" | ||
| 211 | depends on CPU_SUBTYPE_SH7724 | ||
| 212 | select ARCH_REQUIRE_GPIOLIB | ||
| 213 | help | ||
| 214 | Renesas "R0P7724LC0011/21RL (EcoVec)" support. | ||
| 215 | |||
| 196 | config SH_SH7763RDP | 216 | config SH_SH7763RDP |
| 197 | bool "SH7763RDP" | 217 | bool "SH7763RDP" |
| 198 | depends on CPU_SUBTYPE_SH7763 | 218 | depends on CPU_SUBTYPE_SH7763 |
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c index b9c88cc519e2..327d47c25a57 100644 --- a/arch/sh/boards/board-ap325rxa.c +++ b/arch/sh/boards/board-ap325rxa.c | |||
| @@ -188,7 +188,7 @@ static struct sh_mobile_lcdc_info lcdc_info = { | |||
| 188 | .name = "LB070WV1", | 188 | .name = "LB070WV1", |
| 189 | .xres = 800, | 189 | .xres = 800, |
| 190 | .yres = 480, | 190 | .yres = 480, |
| 191 | .left_margin = 40, | 191 | .left_margin = 32, |
| 192 | .right_margin = 160, | 192 | .right_margin = 160, |
| 193 | .hsync_len = 8, | 193 | .hsync_len = 8, |
| 194 | .upper_margin = 63, | 194 | .upper_margin = 63, |
| @@ -211,7 +211,7 @@ static struct resource lcdc_resources[] = { | |||
| 211 | [0] = { | 211 | [0] = { |
| 212 | .name = "LCDC", | 212 | .name = "LCDC", |
| 213 | .start = 0xfe940000, /* P4-only space */ | 213 | .start = 0xfe940000, /* P4-only space */ |
| 214 | .end = 0xfe941fff, | 214 | .end = 0xfe942fff, |
| 215 | .flags = IORESOURCE_MEM, | 215 | .flags = IORESOURCE_MEM, |
| 216 | }, | 216 | }, |
| 217 | [1] = { | 217 | [1] = { |
| @@ -227,6 +227,9 @@ static struct platform_device lcdc_device = { | |||
| 227 | .dev = { | 227 | .dev = { |
| 228 | .platform_data = &lcdc_info, | 228 | .platform_data = &lcdc_info, |
| 229 | }, | 229 | }, |
| 230 | .archdata = { | ||
| 231 | .hwblk_id = HWBLK_LCDC, | ||
| 232 | }, | ||
| 230 | }; | 233 | }; |
| 231 | 234 | ||
| 232 | static void camera_power(int val) | 235 | static void camera_power(int val) |
| @@ -377,6 +380,9 @@ static struct platform_device ceu_device = { | |||
| 377 | .dev = { | 380 | .dev = { |
| 378 | .platform_data = &sh_mobile_ceu_info, | 381 | .platform_data = &sh_mobile_ceu_info, |
| 379 | }, | 382 | }, |
| 383 | .archdata = { | ||
| 384 | .hwblk_id = HWBLK_CEU, | ||
| 385 | }, | ||
| 380 | }; | 386 | }; |
| 381 | 387 | ||
| 382 | struct spi_gpio_platform_data sdcard_cn3_platform_data = { | 388 | struct spi_gpio_platform_data sdcard_cn3_platform_data = { |
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c index 42410a15d255..e5a8a2fde39c 100644 --- a/arch/sh/boards/board-sh7785lcr.c +++ b/arch/sh/boards/board-sh7785lcr.c | |||
| @@ -223,6 +223,19 @@ static struct platform_device sm501_device = { | |||
| 223 | .resource = sm501_resources, | 223 | .resource = sm501_resources, |
| 224 | }; | 224 | }; |
| 225 | 225 | ||
| 226 | static struct resource i2c_proto_resources[] = { | ||
| 227 | [0] = { | ||
| 228 | .start = PCA9564_PROTO_32BIT_ADDR, | ||
| 229 | .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1, | ||
| 230 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, | ||
| 231 | }, | ||
| 232 | [1] = { | ||
| 233 | .start = 12, | ||
| 234 | .end = 12, | ||
| 235 | .flags = IORESOURCE_IRQ, | ||
| 236 | }, | ||
| 237 | }; | ||
| 238 | |||
| 226 | static struct resource i2c_resources[] = { | 239 | static struct resource i2c_resources[] = { |
| 227 | [0] = { | 240 | [0] = { |
| 228 | .start = PCA9564_ADDR, | 241 | .start = PCA9564_ADDR, |
| @@ -271,6 +284,11 @@ static int __init sh7785lcr_devices_setup(void) | |||
| 271 | i2c_register_board_info(0, sh7785lcr_i2c_devices, | 284 | i2c_register_board_info(0, sh7785lcr_i2c_devices, |
| 272 | ARRAY_SIZE(sh7785lcr_i2c_devices)); | 285 | ARRAY_SIZE(sh7785lcr_i2c_devices)); |
| 273 | 286 | ||
| 287 | if (mach_is_sh7785lcr_pt()) { | ||
| 288 | i2c_device.resource = i2c_proto_resources; | ||
| 289 | i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources); | ||
| 290 | } | ||
| 291 | |||
| 274 | return platform_add_devices(sh7785lcr_devices, | 292 | return platform_add_devices(sh7785lcr_devices, |
| 275 | ARRAY_SIZE(sh7785lcr_devices)); | 293 | ARRAY_SIZE(sh7785lcr_devices)); |
| 276 | } | 294 | } |
diff --git a/arch/sh/boards/mach-ecovec24/Makefile b/arch/sh/boards/mach-ecovec24/Makefile new file mode 100644 index 000000000000..51f852151655 --- /dev/null +++ b/arch/sh/boards/mach-ecovec24/Makefile | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the R0P7724LC0011/21RL (EcoVec) | ||
| 3 | # | ||
| 4 | # This file is subject to the terms and conditions of the GNU General Public | ||
| 5 | # License. See the file "COPYING" in the main directory of this archive | ||
| 6 | # for more details. | ||
| 7 | # | ||
| 8 | |||
| 9 | obj-y := setup.o \ No newline at end of file | ||
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c new file mode 100644 index 000000000000..96bc1698310f --- /dev/null +++ b/arch/sh/boards/mach-ecovec24/setup.c | |||
| @@ -0,0 +1,670 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Renesas Solutions Corp. | ||
| 3 | * | ||
| 4 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/device.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/mtd/physmap.h> | ||
| 15 | #include <linux/gpio.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/delay.h> | ||
| 19 | #include <linux/usb/r8a66597.h> | ||
| 20 | #include <linux/i2c.h> | ||
| 21 | #include <linux/input.h> | ||
| 22 | #include <video/sh_mobile_lcdc.h> | ||
| 23 | #include <media/sh_mobile_ceu.h> | ||
| 24 | #include <asm/heartbeat.h> | ||
| 25 | #include <asm/sh_eth.h> | ||
| 26 | #include <asm/sh_keysc.h> | ||
| 27 | #include <asm/clock.h> | ||
| 28 | #include <cpu/sh7724.h> | ||
| 29 | |||
| 30 | /* | ||
| 31 | * Address Interface BusWidth | ||
| 32 | *----------------------------------------- | ||
| 33 | * 0x0000_0000 uboot 16bit | ||
| 34 | * 0x0004_0000 Linux romImage 16bit | ||
| 35 | * 0x0014_0000 MTD for Linux 16bit | ||
| 36 | * 0x0400_0000 Internal I/O 16/32bit | ||
| 37 | * 0x0800_0000 DRAM 32bit | ||
| 38 | * 0x1800_0000 MFI 16bit | ||
| 39 | */ | ||
| 40 | |||
| 41 | /* Heartbeat */ | ||
| 42 | static unsigned char led_pos[] = { 0, 1, 2, 3 }; | ||
| 43 | static struct heartbeat_data heartbeat_data = { | ||
| 44 | .regsize = 8, | ||
| 45 | .nr_bits = 4, | ||
| 46 | .bit_pos = led_pos, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct resource heartbeat_resources[] = { | ||
| 50 | [0] = { | ||
| 51 | .start = 0xA405012C, /* PTG */ | ||
| 52 | .end = 0xA405012E - 1, | ||
| 53 | .flags = IORESOURCE_MEM, | ||
| 54 | }, | ||
| 55 | }; | ||
| 56 | |||
| 57 | static struct platform_device heartbeat_device = { | ||
| 58 | .name = "heartbeat", | ||
| 59 | .id = -1, | ||
| 60 | .dev = { | ||
| 61 | .platform_data = &heartbeat_data, | ||
| 62 | }, | ||
| 63 | .num_resources = ARRAY_SIZE(heartbeat_resources), | ||
| 64 | .resource = heartbeat_resources, | ||
| 65 | }; | ||
| 66 | |||
| 67 | /* MTD */ | ||
| 68 | static struct mtd_partition nor_flash_partitions[] = { | ||
| 69 | { | ||
| 70 | .name = "boot loader", | ||
| 71 | .offset = 0, | ||
| 72 | .size = (5 * 1024 * 1024), | ||
| 73 | .mask_flags = MTD_CAP_ROM, | ||
| 74 | }, { | ||
| 75 | .name = "free-area", | ||
| 76 | .offset = MTDPART_OFS_APPEND, | ||
| 77 | .size = MTDPART_SIZ_FULL, | ||
| 78 | }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | static struct physmap_flash_data nor_flash_data = { | ||
| 82 | .width = 2, | ||
| 83 | .parts = nor_flash_partitions, | ||
| 84 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | ||
| 85 | }; | ||
| 86 | |||
| 87 | static struct resource nor_flash_resources[] = { | ||
| 88 | [0] = { | ||
| 89 | .name = "NOR Flash", | ||
| 90 | .start = 0x00000000, | ||
| 91 | .end = 0x03ffffff, | ||
| 92 | .flags = IORESOURCE_MEM, | ||
| 93 | } | ||
| 94 | }; | ||
| 95 | |||
| 96 | static struct platform_device nor_flash_device = { | ||
| 97 | .name = "physmap-flash", | ||
| 98 | .resource = nor_flash_resources, | ||
| 99 | .num_resources = ARRAY_SIZE(nor_flash_resources), | ||
| 100 | .dev = { | ||
| 101 | .platform_data = &nor_flash_data, | ||
| 102 | }, | ||
| 103 | }; | ||
| 104 | |||
| 105 | /* SH Eth */ | ||
| 106 | #define SH_ETH_ADDR (0xA4600000) | ||
| 107 | #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0) | ||
| 108 | #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8) | ||
| 109 | static struct resource sh_eth_resources[] = { | ||
| 110 | [0] = { | ||
| 111 | .start = SH_ETH_ADDR, | ||
| 112 | .end = SH_ETH_ADDR + 0x1FC, | ||
| 113 | .flags = IORESOURCE_MEM, | ||
| 114 | }, | ||
| 115 | [1] = { | ||
| 116 | .start = 91, | ||
| 117 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 118 | }, | ||
| 119 | }; | ||
| 120 | |||
| 121 | struct sh_eth_plat_data sh_eth_plat = { | ||
| 122 | .phy = 0x1f, /* SMSC LAN8700 */ | ||
| 123 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | ||
| 124 | }; | ||
| 125 | |||
| 126 | static struct platform_device sh_eth_device = { | ||
| 127 | .name = "sh-eth", | ||
| 128 | .id = 0, | ||
| 129 | .dev = { | ||
| 130 | .platform_data = &sh_eth_plat, | ||
| 131 | }, | ||
| 132 | .num_resources = ARRAY_SIZE(sh_eth_resources), | ||
| 133 | .resource = sh_eth_resources, | ||
| 134 | }; | ||
| 135 | |||
| 136 | /* USB0 host */ | ||
| 137 | void usb0_port_power(int port, int power) | ||
| 138 | { | ||
| 139 | gpio_set_value(GPIO_PTB4, power); | ||
| 140 | } | ||
| 141 | |||
| 142 | static struct r8a66597_platdata usb0_host_data = { | ||
| 143 | .on_chip = 1, | ||
| 144 | .port_power = usb0_port_power, | ||
| 145 | }; | ||
| 146 | |||
| 147 | static struct resource usb0_host_resources[] = { | ||
| 148 | [0] = { | ||
| 149 | .start = 0xa4d80000, | ||
| 150 | .end = 0xa4d80124 - 1, | ||
| 151 | .flags = IORESOURCE_MEM, | ||
| 152 | }, | ||
| 153 | [1] = { | ||
| 154 | .start = 65, | ||
| 155 | .end = 65, | ||
| 156 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
| 157 | }, | ||
| 158 | }; | ||
| 159 | |||
| 160 | static struct platform_device usb0_host_device = { | ||
| 161 | .name = "r8a66597_hcd", | ||
| 162 | .id = 0, | ||
| 163 | .dev = { | ||
| 164 | .dma_mask = NULL, /* not use dma */ | ||
| 165 | .coherent_dma_mask = 0xffffffff, | ||
| 166 | .platform_data = &usb0_host_data, | ||
| 167 | }, | ||
| 168 | .num_resources = ARRAY_SIZE(usb0_host_resources), | ||
| 169 | .resource = usb0_host_resources, | ||
| 170 | }; | ||
| 171 | |||
| 172 | /* | ||
| 173 | * USB1 | ||
| 174 | * | ||
| 175 | * CN5 can use both host/function, | ||
| 176 | * and we can determine it by checking PTB[3] | ||
| 177 | * | ||
| 178 | * This time only USB1 host is supported. | ||
| 179 | */ | ||
| 180 | void usb1_port_power(int port, int power) | ||
| 181 | { | ||
| 182 | if (!gpio_get_value(GPIO_PTB3)) { | ||
| 183 | printk(KERN_ERR "USB1 function is not supported\n"); | ||
| 184 | return; | ||
| 185 | } | ||
| 186 | |||
| 187 | gpio_set_value(GPIO_PTB5, power); | ||
| 188 | } | ||
| 189 | |||
| 190 | static struct r8a66597_platdata usb1_host_data = { | ||
| 191 | .on_chip = 1, | ||
| 192 | .port_power = usb1_port_power, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct resource usb1_host_resources[] = { | ||
| 196 | [0] = { | ||
| 197 | .start = 0xa4d90000, | ||
| 198 | .end = 0xa4d90124 - 1, | ||
| 199 | .flags = IORESOURCE_MEM, | ||
| 200 | }, | ||
| 201 | [1] = { | ||
| 202 | .start = 66, | ||
| 203 | .end = 66, | ||
| 204 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
| 205 | }, | ||
| 206 | }; | ||
| 207 | |||
| 208 | static struct platform_device usb1_host_device = { | ||
| 209 | .name = "r8a66597_hcd", | ||
| 210 | .id = 1, | ||
| 211 | .dev = { | ||
| 212 | .dma_mask = NULL, /* not use dma */ | ||
| 213 | .coherent_dma_mask = 0xffffffff, | ||
| 214 | .platform_data = &usb1_host_data, | ||
| 215 | }, | ||
| 216 | .num_resources = ARRAY_SIZE(usb1_host_resources), | ||
| 217 | .resource = usb1_host_resources, | ||
| 218 | }; | ||
| 219 | |||
| 220 | /* LCDC */ | ||
| 221 | static struct sh_mobile_lcdc_info lcdc_info = { | ||
| 222 | .ch[0] = { | ||
| 223 | .interface_type = RGB18, | ||
| 224 | .chan = LCDC_CHAN_MAINLCD, | ||
| 225 | .bpp = 16, | ||
| 226 | .lcd_cfg = { | ||
| 227 | .sync = 0, /* hsync and vsync are active low */ | ||
| 228 | }, | ||
| 229 | .lcd_size_cfg = { /* 7.0 inch */ | ||
| 230 | .width = 152, | ||
| 231 | .height = 91, | ||
| 232 | }, | ||
| 233 | .board_cfg = { | ||
| 234 | }, | ||
| 235 | } | ||
| 236 | }; | ||
| 237 | |||
| 238 | static struct resource lcdc_resources[] = { | ||
| 239 | [0] = { | ||
| 240 | .name = "LCDC", | ||
| 241 | .start = 0xfe940000, | ||
| 242 | .end = 0xfe942fff, | ||
| 243 | .flags = IORESOURCE_MEM, | ||
| 244 | }, | ||
| 245 | [1] = { | ||
| 246 | .start = 106, | ||
| 247 | .flags = IORESOURCE_IRQ, | ||
| 248 | }, | ||
| 249 | }; | ||
| 250 | |||
| 251 | static struct platform_device lcdc_device = { | ||
| 252 | .name = "sh_mobile_lcdc_fb", | ||
| 253 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
| 254 | .resource = lcdc_resources, | ||
| 255 | .dev = { | ||
| 256 | .platform_data = &lcdc_info, | ||
| 257 | }, | ||
| 258 | .archdata = { | ||
| 259 | .hwblk_id = HWBLK_LCDC, | ||
| 260 | }, | ||
| 261 | }; | ||
| 262 | |||
| 263 | /* CEU0 */ | ||
| 264 | static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { | ||
| 265 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | ||
| 266 | }; | ||
| 267 | |||
| 268 | static struct resource ceu0_resources[] = { | ||
| 269 | [0] = { | ||
| 270 | .name = "CEU0", | ||
| 271 | .start = 0xfe910000, | ||
| 272 | .end = 0xfe91009f, | ||
| 273 | .flags = IORESOURCE_MEM, | ||
| 274 | }, | ||
| 275 | [1] = { | ||
| 276 | .start = 52, | ||
| 277 | .flags = IORESOURCE_IRQ, | ||
| 278 | }, | ||
| 279 | [2] = { | ||
| 280 | /* place holder for contiguous memory */ | ||
| 281 | }, | ||
| 282 | }; | ||
| 283 | |||
| 284 | static struct platform_device ceu0_device = { | ||
| 285 | .name = "sh_mobile_ceu", | ||
| 286 | .id = 0, /* "ceu0" clock */ | ||
| 287 | .num_resources = ARRAY_SIZE(ceu0_resources), | ||
| 288 | .resource = ceu0_resources, | ||
| 289 | .dev = { | ||
| 290 | .platform_data = &sh_mobile_ceu0_info, | ||
| 291 | }, | ||
| 292 | .archdata = { | ||
| 293 | .hwblk_id = HWBLK_CEU0, | ||
| 294 | }, | ||
| 295 | }; | ||
| 296 | |||
| 297 | /* CEU1 */ | ||
| 298 | static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { | ||
| 299 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | ||
| 300 | }; | ||
| 301 | |||
| 302 | static struct resource ceu1_resources[] = { | ||
| 303 | [0] = { | ||
| 304 | .name = "CEU1", | ||
| 305 | .start = 0xfe914000, | ||
| 306 | .end = 0xfe91409f, | ||
| 307 | .flags = IORESOURCE_MEM, | ||
| 308 | }, | ||
| 309 | [1] = { | ||
| 310 | .start = 63, | ||
| 311 | .flags = IORESOURCE_IRQ, | ||
| 312 | }, | ||
| 313 | [2] = { | ||
| 314 | /* place holder for contiguous memory */ | ||
| 315 | }, | ||
| 316 | }; | ||
| 317 | |||
| 318 | static struct platform_device ceu1_device = { | ||
| 319 | .name = "sh_mobile_ceu", | ||
| 320 | .id = 1, /* "ceu1" clock */ | ||
| 321 | .num_resources = ARRAY_SIZE(ceu1_resources), | ||
| 322 | .resource = ceu1_resources, | ||
| 323 | .dev = { | ||
| 324 | .platform_data = &sh_mobile_ceu1_info, | ||
| 325 | }, | ||
| 326 | .archdata = { | ||
| 327 | .hwblk_id = HWBLK_CEU1, | ||
| 328 | }, | ||
| 329 | }; | ||
| 330 | |||
| 331 | /* I2C device */ | ||
| 332 | static struct i2c_board_info i2c1_devices[] = { | ||
| 333 | { | ||
| 334 | I2C_BOARD_INFO("r2025sd", 0x32), | ||
| 335 | }, | ||
| 336 | }; | ||
| 337 | |||
| 338 | /* KEYSC */ | ||
| 339 | static struct sh_keysc_info keysc_info = { | ||
| 340 | .mode = SH_KEYSC_MODE_1, | ||
| 341 | .scan_timing = 3, | ||
| 342 | .delay = 50, | ||
| 343 | .kycr2_delay = 100, | ||
| 344 | .keycodes = { KEY_1, 0, 0, 0, 0, | ||
| 345 | KEY_2, 0, 0, 0, 0, | ||
| 346 | KEY_3, 0, 0, 0, 0, | ||
| 347 | KEY_4, 0, 0, 0, 0, | ||
| 348 | KEY_5, 0, 0, 0, 0, | ||
| 349 | KEY_6, 0, 0, 0, 0, }, | ||
| 350 | }; | ||
| 351 | |||
| 352 | static struct resource keysc_resources[] = { | ||
| 353 | [0] = { | ||
| 354 | .name = "KEYSC", | ||
| 355 | .start = 0x044b0000, | ||
| 356 | .end = 0x044b000f, | ||
| 357 | .flags = IORESOURCE_MEM, | ||
| 358 | }, | ||
| 359 | [1] = { | ||
| 360 | .start = 79, | ||
| 361 | .flags = IORESOURCE_IRQ, | ||
| 362 | }, | ||
| 363 | }; | ||
| 364 | |||
| 365 | static struct platform_device keysc_device = { | ||
| 366 | .name = "sh_keysc", | ||
| 367 | .id = 0, /* keysc0 clock */ | ||
| 368 | .num_resources = ARRAY_SIZE(keysc_resources), | ||
| 369 | .resource = keysc_resources, | ||
| 370 | .dev = { | ||
| 371 | .platform_data = &keysc_info, | ||
| 372 | }, | ||
| 373 | .archdata = { | ||
| 374 | .hwblk_id = HWBLK_KEYSC, | ||
| 375 | }, | ||
| 376 | }; | ||
| 377 | |||
| 378 | static struct platform_device *ecovec_devices[] __initdata = { | ||
| 379 | &heartbeat_device, | ||
| 380 | &nor_flash_device, | ||
| 381 | &sh_eth_device, | ||
| 382 | &usb0_host_device, | ||
| 383 | &usb1_host_device, /* USB1 host support */ | ||
| 384 | &lcdc_device, | ||
| 385 | &ceu0_device, | ||
| 386 | &ceu1_device, | ||
| 387 | &keysc_device, | ||
| 388 | }; | ||
| 389 | |||
| 390 | #define EEPROM_ADDR 0x50 | ||
| 391 | static u8 mac_read(struct i2c_adapter *a, u8 command) | ||
| 392 | { | ||
| 393 | struct i2c_msg msg[2]; | ||
| 394 | u8 buf; | ||
| 395 | int ret; | ||
| 396 | |||
| 397 | msg[0].addr = EEPROM_ADDR; | ||
| 398 | msg[0].flags = 0; | ||
| 399 | msg[0].len = 1; | ||
| 400 | msg[0].buf = &command; | ||
| 401 | |||
| 402 | msg[1].addr = EEPROM_ADDR; | ||
| 403 | msg[1].flags = I2C_M_RD; | ||
| 404 | msg[1].len = 1; | ||
| 405 | msg[1].buf = &buf; | ||
| 406 | |||
| 407 | ret = i2c_transfer(a, msg, 2); | ||
| 408 | if (ret < 0) { | ||
| 409 | printk(KERN_ERR "error %d\n", ret); | ||
| 410 | buf = 0xff; | ||
| 411 | } | ||
| 412 | |||
| 413 | return buf; | ||
| 414 | } | ||
| 415 | |||
| 416 | #define MAC_LEN 6 | ||
| 417 | static void __init sh_eth_init(void) | ||
| 418 | { | ||
| 419 | struct i2c_adapter *a = i2c_get_adapter(1); | ||
| 420 | struct clk *eth_clk; | ||
| 421 | u8 mac[MAC_LEN]; | ||
| 422 | int i; | ||
| 423 | |||
| 424 | if (!a) { | ||
| 425 | pr_err("can not get I2C 1\n"); | ||
| 426 | return; | ||
| 427 | } | ||
| 428 | |||
| 429 | eth_clk = clk_get(NULL, "eth0"); | ||
| 430 | if (!eth_clk) { | ||
| 431 | pr_err("can not get eth0 clk\n"); | ||
| 432 | return; | ||
| 433 | } | ||
| 434 | |||
| 435 | /* read MAC address frome EEPROM */ | ||
| 436 | for (i = 0; i < MAC_LEN; i++) { | ||
| 437 | mac[i] = mac_read(a, 0x10 + i); | ||
| 438 | msleep(10); | ||
| 439 | } | ||
| 440 | |||
| 441 | /* clock enable */ | ||
| 442 | clk_enable(eth_clk); | ||
| 443 | |||
| 444 | /* reset sh-eth */ | ||
| 445 | ctrl_outl(0x1, SH_ETH_ADDR + 0x0); | ||
| 446 | |||
| 447 | /* set MAC addr */ | ||
| 448 | ctrl_outl((mac[0] << 24) | | ||
| 449 | (mac[1] << 16) | | ||
| 450 | (mac[2] << 8) | | ||
| 451 | (mac[3] << 0), SH_ETH_MAHR); | ||
| 452 | ctrl_outl((mac[4] << 8) | | ||
| 453 | (mac[5] << 0), SH_ETH_MALR); | ||
| 454 | |||
| 455 | clk_put(eth_clk); | ||
| 456 | } | ||
| 457 | |||
| 458 | #define PORT_HIZA 0xA4050158 | ||
| 459 | #define IODRIVEA 0xA405018A | ||
| 460 | static int __init arch_setup(void) | ||
| 461 | { | ||
| 462 | /* enable SCIFA0 */ | ||
| 463 | gpio_request(GPIO_FN_SCIF0_TXD, NULL); | ||
| 464 | gpio_request(GPIO_FN_SCIF0_RXD, NULL); | ||
| 465 | |||
| 466 | /* enable debug LED */ | ||
| 467 | gpio_request(GPIO_PTG0, NULL); | ||
| 468 | gpio_request(GPIO_PTG1, NULL); | ||
| 469 | gpio_request(GPIO_PTG2, NULL); | ||
| 470 | gpio_request(GPIO_PTG3, NULL); | ||
| 471 | gpio_direction_output(GPIO_PTG0, 0); | ||
| 472 | gpio_direction_output(GPIO_PTG1, 0); | ||
| 473 | gpio_direction_output(GPIO_PTG2, 0); | ||
| 474 | gpio_direction_output(GPIO_PTG3, 0); | ||
| 475 | ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); | ||
| 476 | |||
| 477 | /* enable SH-Eth */ | ||
| 478 | gpio_request(GPIO_PTA1, NULL); | ||
| 479 | gpio_direction_output(GPIO_PTA1, 1); | ||
| 480 | mdelay(20); | ||
| 481 | |||
| 482 | gpio_request(GPIO_FN_RMII_RXD0, NULL); | ||
| 483 | gpio_request(GPIO_FN_RMII_RXD1, NULL); | ||
| 484 | gpio_request(GPIO_FN_RMII_TXD0, NULL); | ||
| 485 | gpio_request(GPIO_FN_RMII_TXD1, NULL); | ||
| 486 | gpio_request(GPIO_FN_RMII_REF_CLK, NULL); | ||
| 487 | gpio_request(GPIO_FN_RMII_TX_EN, NULL); | ||
| 488 | gpio_request(GPIO_FN_RMII_RX_ER, NULL); | ||
| 489 | gpio_request(GPIO_FN_RMII_CRS_DV, NULL); | ||
| 490 | gpio_request(GPIO_FN_MDIO, NULL); | ||
| 491 | gpio_request(GPIO_FN_MDC, NULL); | ||
| 492 | gpio_request(GPIO_FN_LNKSTA, NULL); | ||
| 493 | |||
| 494 | /* enable USB */ | ||
| 495 | ctrl_outw(0x0000, 0xA4D80000); | ||
| 496 | ctrl_outw(0x0000, 0xA4D90000); | ||
| 497 | gpio_request(GPIO_PTB3, NULL); | ||
| 498 | gpio_request(GPIO_PTB4, NULL); | ||
| 499 | gpio_request(GPIO_PTB5, NULL); | ||
| 500 | gpio_direction_input(GPIO_PTB3); | ||
| 501 | gpio_direction_output(GPIO_PTB4, 0); | ||
| 502 | gpio_direction_output(GPIO_PTB5, 0); | ||
| 503 | ctrl_outw(0x0600, 0xa40501d4); | ||
| 504 | ctrl_outw(0x0600, 0xa4050192); | ||
| 505 | |||
| 506 | /* enable LCDC */ | ||
| 507 | gpio_request(GPIO_FN_LCDD23, NULL); | ||
| 508 | gpio_request(GPIO_FN_LCDD22, NULL); | ||
| 509 | gpio_request(GPIO_FN_LCDD21, NULL); | ||
| 510 | gpio_request(GPIO_FN_LCDD20, NULL); | ||
| 511 | gpio_request(GPIO_FN_LCDD19, NULL); | ||
| 512 | gpio_request(GPIO_FN_LCDD18, NULL); | ||
| 513 | gpio_request(GPIO_FN_LCDD17, NULL); | ||
| 514 | gpio_request(GPIO_FN_LCDD16, NULL); | ||
| 515 | gpio_request(GPIO_FN_LCDD15, NULL); | ||
| 516 | gpio_request(GPIO_FN_LCDD14, NULL); | ||
| 517 | gpio_request(GPIO_FN_LCDD13, NULL); | ||
| 518 | gpio_request(GPIO_FN_LCDD12, NULL); | ||
| 519 | gpio_request(GPIO_FN_LCDD11, NULL); | ||
| 520 | gpio_request(GPIO_FN_LCDD10, NULL); | ||
| 521 | gpio_request(GPIO_FN_LCDD9, NULL); | ||
| 522 | gpio_request(GPIO_FN_LCDD8, NULL); | ||
| 523 | gpio_request(GPIO_FN_LCDD7, NULL); | ||
| 524 | gpio_request(GPIO_FN_LCDD6, NULL); | ||
| 525 | gpio_request(GPIO_FN_LCDD5, NULL); | ||
| 526 | gpio_request(GPIO_FN_LCDD4, NULL); | ||
| 527 | gpio_request(GPIO_FN_LCDD3, NULL); | ||
| 528 | gpio_request(GPIO_FN_LCDD2, NULL); | ||
| 529 | gpio_request(GPIO_FN_LCDD1, NULL); | ||
| 530 | gpio_request(GPIO_FN_LCDD0, NULL); | ||
| 531 | gpio_request(GPIO_FN_LCDDISP, NULL); | ||
| 532 | gpio_request(GPIO_FN_LCDHSYN, NULL); | ||
| 533 | gpio_request(GPIO_FN_LCDDCK, NULL); | ||
| 534 | gpio_request(GPIO_FN_LCDVSYN, NULL); | ||
| 535 | gpio_request(GPIO_FN_LCDDON, NULL); | ||
| 536 | gpio_request(GPIO_FN_LCDLCLK, NULL); | ||
| 537 | ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); | ||
| 538 | |||
| 539 | gpio_request(GPIO_PTE6, NULL); | ||
| 540 | gpio_request(GPIO_PTU1, NULL); | ||
| 541 | gpio_request(GPIO_PTR1, NULL); | ||
| 542 | gpio_request(GPIO_PTA2, NULL); | ||
| 543 | gpio_direction_input(GPIO_PTE6); | ||
| 544 | gpio_direction_output(GPIO_PTU1, 0); | ||
| 545 | gpio_direction_output(GPIO_PTR1, 0); | ||
| 546 | gpio_direction_output(GPIO_PTA2, 0); | ||
| 547 | |||
| 548 | /* I/O buffer drive ability is low */ | ||
| 549 | ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA); | ||
| 550 | |||
| 551 | if (gpio_get_value(GPIO_PTE6)) { | ||
| 552 | /* DVI */ | ||
| 553 | lcdc_info.clock_source = LCDC_CLK_EXTERNAL; | ||
| 554 | lcdc_info.ch[0].clock_divider = 1, | ||
| 555 | lcdc_info.ch[0].lcd_cfg.name = "DVI"; | ||
| 556 | lcdc_info.ch[0].lcd_cfg.xres = 1280; | ||
| 557 | lcdc_info.ch[0].lcd_cfg.yres = 720; | ||
| 558 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; | ||
| 559 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; | ||
| 560 | lcdc_info.ch[0].lcd_cfg.hsync_len = 40; | ||
| 561 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; | ||
| 562 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; | ||
| 563 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; | ||
| 564 | |||
| 565 | gpio_set_value(GPIO_PTA2, 1); | ||
| 566 | gpio_set_value(GPIO_PTU1, 1); | ||
| 567 | } else { | ||
| 568 | /* Panel */ | ||
| 569 | |||
| 570 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; | ||
| 571 | lcdc_info.ch[0].clock_divider = 2, | ||
| 572 | lcdc_info.ch[0].lcd_cfg.name = "Panel"; | ||
| 573 | lcdc_info.ch[0].lcd_cfg.xres = 800; | ||
| 574 | lcdc_info.ch[0].lcd_cfg.yres = 480; | ||
| 575 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; | ||
| 576 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; | ||
| 577 | lcdc_info.ch[0].lcd_cfg.hsync_len = 70; | ||
| 578 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; | ||
| 579 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; | ||
| 580 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; | ||
| 581 | |||
| 582 | gpio_set_value(GPIO_PTR1, 1); | ||
| 583 | |||
| 584 | /* FIXME | ||
| 585 | * | ||
| 586 | * LCDDON control is needed for Panel, | ||
| 587 | * but current sh_mobile_lcdc driver doesn't control it. | ||
| 588 | * It is temporary correspondence | ||
| 589 | */ | ||
| 590 | gpio_request(GPIO_PTF4, NULL); | ||
| 591 | gpio_direction_output(GPIO_PTF4, 1); | ||
| 592 | } | ||
| 593 | |||
| 594 | /* enable CEU0 */ | ||
| 595 | gpio_request(GPIO_FN_VIO0_D15, NULL); | ||
| 596 | gpio_request(GPIO_FN_VIO0_D14, NULL); | ||
| 597 | gpio_request(GPIO_FN_VIO0_D13, NULL); | ||
| 598 | gpio_request(GPIO_FN_VIO0_D12, NULL); | ||
| 599 | gpio_request(GPIO_FN_VIO0_D11, NULL); | ||
| 600 | gpio_request(GPIO_FN_VIO0_D10, NULL); | ||
| 601 | gpio_request(GPIO_FN_VIO0_D9, NULL); | ||
| 602 | gpio_request(GPIO_FN_VIO0_D8, NULL); | ||
| 603 | gpio_request(GPIO_FN_VIO0_D7, NULL); | ||
| 604 | gpio_request(GPIO_FN_VIO0_D6, NULL); | ||
| 605 | gpio_request(GPIO_FN_VIO0_D5, NULL); | ||
| 606 | gpio_request(GPIO_FN_VIO0_D4, NULL); | ||
| 607 | gpio_request(GPIO_FN_VIO0_D3, NULL); | ||
| 608 | gpio_request(GPIO_FN_VIO0_D2, NULL); | ||
| 609 | gpio_request(GPIO_FN_VIO0_D1, NULL); | ||
| 610 | gpio_request(GPIO_FN_VIO0_D0, NULL); | ||
| 611 | gpio_request(GPIO_FN_VIO0_VD, NULL); | ||
| 612 | gpio_request(GPIO_FN_VIO0_CLK, NULL); | ||
| 613 | gpio_request(GPIO_FN_VIO0_FLD, NULL); | ||
| 614 | gpio_request(GPIO_FN_VIO0_HD, NULL); | ||
| 615 | platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); | ||
| 616 | |||
| 617 | /* enable CEU1 */ | ||
| 618 | gpio_request(GPIO_FN_VIO1_D7, NULL); | ||
| 619 | gpio_request(GPIO_FN_VIO1_D6, NULL); | ||
| 620 | gpio_request(GPIO_FN_VIO1_D5, NULL); | ||
| 621 | gpio_request(GPIO_FN_VIO1_D4, NULL); | ||
| 622 | gpio_request(GPIO_FN_VIO1_D3, NULL); | ||
| 623 | gpio_request(GPIO_FN_VIO1_D2, NULL); | ||
| 624 | gpio_request(GPIO_FN_VIO1_D1, NULL); | ||
| 625 | gpio_request(GPIO_FN_VIO1_D0, NULL); | ||
| 626 | gpio_request(GPIO_FN_VIO1_FLD, NULL); | ||
| 627 | gpio_request(GPIO_FN_VIO1_HD, NULL); | ||
| 628 | gpio_request(GPIO_FN_VIO1_VD, NULL); | ||
| 629 | gpio_request(GPIO_FN_VIO1_CLK, NULL); | ||
| 630 | platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); | ||
| 631 | |||
| 632 | /* enable KEYSC */ | ||
| 633 | gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); | ||
| 634 | gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); | ||
| 635 | gpio_request(GPIO_FN_KEYOUT3, NULL); | ||
| 636 | gpio_request(GPIO_FN_KEYOUT2, NULL); | ||
| 637 | gpio_request(GPIO_FN_KEYOUT1, NULL); | ||
| 638 | gpio_request(GPIO_FN_KEYOUT0, NULL); | ||
| 639 | gpio_request(GPIO_FN_KEYIN0, NULL); | ||
| 640 | |||
| 641 | /* enable user debug switch */ | ||
| 642 | gpio_request(GPIO_PTR0, NULL); | ||
| 643 | gpio_request(GPIO_PTR4, NULL); | ||
| 644 | gpio_request(GPIO_PTR5, NULL); | ||
| 645 | gpio_request(GPIO_PTR6, NULL); | ||
| 646 | gpio_direction_input(GPIO_PTR0); | ||
| 647 | gpio_direction_input(GPIO_PTR4); | ||
| 648 | gpio_direction_input(GPIO_PTR5); | ||
| 649 | gpio_direction_input(GPIO_PTR6); | ||
| 650 | |||
| 651 | /* enable I2C device */ | ||
| 652 | i2c_register_board_info(1, i2c1_devices, | ||
| 653 | ARRAY_SIZE(i2c1_devices)); | ||
| 654 | |||
| 655 | return platform_add_devices(ecovec_devices, | ||
| 656 | ARRAY_SIZE(ecovec_devices)); | ||
| 657 | } | ||
| 658 | arch_initcall(arch_setup); | ||
| 659 | |||
| 660 | static int __init devices_setup(void) | ||
| 661 | { | ||
| 662 | sh_eth_init(); | ||
| 663 | return 0; | ||
| 664 | } | ||
| 665 | device_initcall(devices_setup); | ||
| 666 | |||
| 667 | |||
| 668 | static struct sh_machine_vector mv_ecovec __initmv = { | ||
| 669 | .mv_name = "R0P7724 (EcoVec)", | ||
| 670 | }; | ||
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c index 1639f8915000..566e69d8d729 100644 --- a/arch/sh/boards/mach-highlander/setup.c +++ b/arch/sh/boards/mach-highlander/setup.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
| 23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/usb/r8a66597.h> | 24 | #include <linux/usb/r8a66597.h> |
| 25 | #include <linux/usb/m66592.h> | ||
| 25 | #include <net/ax88796.h> | 26 | #include <net/ax88796.h> |
| 26 | #include <asm/machvec.h> | 27 | #include <asm/machvec.h> |
| 27 | #include <mach/highlander.h> | 28 | #include <mach/highlander.h> |
| @@ -60,6 +61,11 @@ static struct platform_device r8a66597_usb_host_device = { | |||
| 60 | .resource = r8a66597_usb_host_resources, | 61 | .resource = r8a66597_usb_host_resources, |
| 61 | }; | 62 | }; |
| 62 | 63 | ||
| 64 | static struct m66592_platdata usbf_platdata = { | ||
| 65 | .xtal = M66592_PLATDATA_XTAL_24MHZ, | ||
| 66 | .vif = 1, | ||
| 67 | }; | ||
| 68 | |||
| 63 | static struct resource m66592_usb_peripheral_resources[] = { | 69 | static struct resource m66592_usb_peripheral_resources[] = { |
| 64 | [0] = { | 70 | [0] = { |
| 65 | .name = "m66592_udc", | 71 | .name = "m66592_udc", |
| @@ -81,6 +87,7 @@ static struct platform_device m66592_usb_peripheral_device = { | |||
| 81 | .dev = { | 87 | .dev = { |
| 82 | .dma_mask = NULL, /* don't use dma */ | 88 | .dma_mask = NULL, /* don't use dma */ |
| 83 | .coherent_dma_mask = 0xffffffff, | 89 | .coherent_dma_mask = 0xffffffff, |
| 90 | .platform_data = &usbf_platdata, | ||
| 84 | }, | 91 | }, |
| 85 | .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources), | 92 | .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources), |
| 86 | .resource = m66592_usb_peripheral_resources, | 93 | .resource = m66592_usb_peripheral_resources, |
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile new file mode 100644 index 000000000000..5d5867826e3b --- /dev/null +++ b/arch/sh/boards/mach-kfr2r09/Makefile | |||
| @@ -0,0 +1,2 @@ | |||
| 1 | obj-y := setup.o | ||
| 2 | obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o | ||
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c new file mode 100644 index 000000000000..8ccb1cc8b589 --- /dev/null +++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c | |||
| @@ -0,0 +1,332 @@ | |||
| 1 | /* | ||
| 2 | * KFR2R09 LCD panel support | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Magnus Damm | ||
| 5 | * | ||
| 6 | * Register settings based on the out-of-tree t33fb.c driver | ||
| 7 | * Copyright (C) 2008 Lineo Solutions, Inc. | ||
| 8 | * | ||
| 9 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 10 | * License. See the file COPYING in the main directory of this archive for | ||
| 11 | * more details. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/delay.h> | ||
| 15 | #include <linux/err.h> | ||
| 16 | #include <linux/fb.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/kernel.h> | ||
| 19 | #include <linux/module.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 21 | #include <video/sh_mobile_lcdc.h> | ||
| 22 | #include <mach/kfr2r09.h> | ||
| 23 | #include <cpu/sh7724.h> | ||
| 24 | |||
| 25 | /* The on-board LCD module is a Hitachi TX07D34VM0AAA. This module is made | ||
| 26 | * up of a 240x400 LCD hooked up to a R61517 driver IC. The driver IC is | ||
| 27 | * communicating with the main port of the LCDC using an 18-bit SYS interface. | ||
| 28 | * | ||
| 29 | * The device code for this LCD module is 0x01221517. | ||
| 30 | */ | ||
| 31 | |||
| 32 | static const unsigned char data_frame_if[] = { | ||
| 33 | 0x02, /* WEMODE: 1=cont, 0=one-shot */ | ||
| 34 | 0x00, 0x00, | ||
| 35 | 0x00, /* EPF, DFM */ | ||
| 36 | 0x02, /* RIM[1] : 1 (18bpp) */ | ||
| 37 | }; | ||
| 38 | |||
| 39 | static const unsigned char data_panel[] = { | ||
| 40 | 0x0b, | ||
| 41 | 0x63, /* 400 lines */ | ||
| 42 | 0x04, 0x00, 0x00, 0x04, 0x11, 0x00, 0x00, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static const unsigned char data_timing[] = { | ||
| 46 | 0x00, 0x00, 0x13, 0x08, 0x08, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static const unsigned char data_timing_src[] = { | ||
| 50 | 0x11, 0x01, 0x00, 0x01, | ||
| 51 | }; | ||
| 52 | |||
| 53 | static const unsigned char data_gamma[] = { | ||
| 54 | 0x01, 0x02, 0x08, 0x23, 0x03, 0x0c, 0x00, 0x06, 0x00, 0x00, | ||
| 55 | 0x01, 0x00, 0x0c, 0x23, 0x03, 0x08, 0x02, 0x06, 0x00, 0x00, | ||
| 56 | }; | ||
| 57 | |||
| 58 | static const unsigned char data_power[] = { | ||
| 59 | 0x07, 0xc5, 0xdc, 0x02, 0x33, 0x0a, | ||
| 60 | }; | ||
| 61 | |||
| 62 | static unsigned long read_reg(void *sohandle, | ||
| 63 | struct sh_mobile_lcdc_sys_bus_ops *so) | ||
| 64 | { | ||
| 65 | return so->read_data(sohandle); | ||
| 66 | } | ||
| 67 | |||
| 68 | static void write_reg(void *sohandle, | ||
| 69 | struct sh_mobile_lcdc_sys_bus_ops *so, | ||
| 70 | int i, unsigned long v) | ||
| 71 | { | ||
| 72 | if (i) | ||
| 73 | so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */ | ||
| 74 | else | ||
| 75 | so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */ | ||
| 76 | } | ||
| 77 | |||
| 78 | static void write_data(void *sohandle, | ||
| 79 | struct sh_mobile_lcdc_sys_bus_ops *so, | ||
| 80 | unsigned char const *data, int no_data) | ||
| 81 | { | ||
| 82 | int i; | ||
| 83 | |||
| 84 | for (i = 0; i < no_data; i++) | ||
| 85 | write_reg(sohandle, so, 1, data[i]); | ||
| 86 | } | ||
| 87 | |||
| 88 | static unsigned long read_device_code(void *sohandle, | ||
| 89 | struct sh_mobile_lcdc_sys_bus_ops *so) | ||
| 90 | { | ||
| 91 | unsigned long device_code; | ||
| 92 | |||
| 93 | /* access protect OFF */ | ||
| 94 | write_reg(sohandle, so, 0, 0xb0); | ||
| 95 | write_reg(sohandle, so, 1, 0x00); | ||
| 96 | |||
| 97 | /* deep standby OFF */ | ||
| 98 | write_reg(sohandle, so, 0, 0xb1); | ||
| 99 | write_reg(sohandle, so, 1, 0x00); | ||
| 100 | |||
| 101 | /* device code command */ | ||
| 102 | write_reg(sohandle, so, 0, 0xbf); | ||
| 103 | mdelay(50); | ||
| 104 | |||
| 105 | /* dummy read */ | ||
| 106 | read_reg(sohandle, so); | ||
| 107 | |||
| 108 | /* read device code */ | ||
| 109 | device_code = ((read_reg(sohandle, so) & 0xff) << 24); | ||
| 110 | device_code |= ((read_reg(sohandle, so) & 0xff) << 16); | ||
| 111 | device_code |= ((read_reg(sohandle, so) & 0xff) << 8); | ||
| 112 | device_code |= (read_reg(sohandle, so) & 0xff); | ||
| 113 | |||
| 114 | return device_code; | ||
| 115 | } | ||
| 116 | |||
| 117 | static void write_memory_start(void *sohandle, | ||
| 118 | struct sh_mobile_lcdc_sys_bus_ops *so) | ||
| 119 | { | ||
| 120 | write_reg(sohandle, so, 0, 0x2c); | ||
| 121 | } | ||
| 122 | |||
| 123 | static void clear_memory(void *sohandle, | ||
| 124 | struct sh_mobile_lcdc_sys_bus_ops *so) | ||
| 125 | { | ||
| 126 | int i; | ||
| 127 | |||
| 128 | /* write start */ | ||
| 129 | write_memory_start(sohandle, so); | ||
| 130 | |||
| 131 | /* paint it black */ | ||
| 132 | for (i = 0; i < (240 * 400); i++) | ||
| 133 | write_reg(sohandle, so, 1, 0x00); | ||
| 134 | } | ||
| 135 | |||
| 136 | static void display_on(void *sohandle, | ||
| 137 | struct sh_mobile_lcdc_sys_bus_ops *so) | ||
| 138 | { | ||
| 139 | /* access protect off */ | ||
| 140 | write_reg(sohandle, so, 0, 0xb0); | ||
| 141 | write_reg(sohandle, so, 1, 0x00); | ||
| 142 | |||
| 143 | /* exit deep standby mode */ | ||
| 144 | write_reg(sohandle, so, 0, 0xb1); | ||
| 145 | write_reg(sohandle, so, 1, 0x00); | ||
| 146 | |||
| 147 | /* frame memory I/F */ | ||
| 148 | write_reg(sohandle, so, 0, 0xb3); | ||
| 149 | write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if)); | ||
| 150 | |||
| 151 | /* display mode and frame memory write mode */ | ||
| 152 | write_reg(sohandle, so, 0, 0xb4); | ||
| 153 | write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */ | ||
| 154 | |||
| 155 | /* panel */ | ||
| 156 | write_reg(sohandle, so, 0, 0xc0); | ||
| 157 | write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel)); | ||
| 158 | |||
| 159 | /* timing (normal) */ | ||
| 160 | write_reg(sohandle, so, 0, 0xc1); | ||
| 161 | write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); | ||
| 162 | |||
| 163 | /* timing (partial) */ | ||
| 164 | write_reg(sohandle, so, 0, 0xc2); | ||
| 165 | write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); | ||
| 166 | |||
| 167 | /* timing (idle) */ | ||
| 168 | write_reg(sohandle, so, 0, 0xc3); | ||
| 169 | write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); | ||
| 170 | |||
| 171 | /* timing (source/VCOM/gate driving) */ | ||
| 172 | write_reg(sohandle, so, 0, 0xc4); | ||
| 173 | write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src)); | ||
| 174 | |||
| 175 | /* gamma (red) */ | ||
| 176 | write_reg(sohandle, so, 0, 0xc8); | ||
| 177 | write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); | ||
| 178 | |||
| 179 | /* gamma (green) */ | ||
| 180 | write_reg(sohandle, so, 0, 0xc9); | ||
| 181 | write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); | ||
| 182 | |||
| 183 | /* gamma (blue) */ | ||
| 184 | write_reg(sohandle, so, 0, 0xca); | ||
| 185 | write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); | ||
| 186 | |||
| 187 | /* power (common) */ | ||
| 188 | write_reg(sohandle, so, 0, 0xd0); | ||
| 189 | write_data(sohandle, so, data_power, ARRAY_SIZE(data_power)); | ||
| 190 | |||
| 191 | /* VCOM */ | ||
| 192 | write_reg(sohandle, so, 0, 0xd1); | ||
| 193 | write_reg(sohandle, so, 1, 0x00); | ||
| 194 | write_reg(sohandle, so, 1, 0x0f); | ||
| 195 | write_reg(sohandle, so, 1, 0x02); | ||
| 196 | |||
| 197 | /* power (normal) */ | ||
| 198 | write_reg(sohandle, so, 0, 0xd2); | ||
| 199 | write_reg(sohandle, so, 1, 0x63); | ||
| 200 | write_reg(sohandle, so, 1, 0x24); | ||
| 201 | |||
| 202 | /* power (partial) */ | ||
| 203 | write_reg(sohandle, so, 0, 0xd3); | ||
| 204 | write_reg(sohandle, so, 1, 0x63); | ||
| 205 | write_reg(sohandle, so, 1, 0x24); | ||
| 206 | |||
| 207 | /* power (idle) */ | ||
| 208 | write_reg(sohandle, so, 0, 0xd4); | ||
| 209 | write_reg(sohandle, so, 1, 0x63); | ||
| 210 | write_reg(sohandle, so, 1, 0x24); | ||
| 211 | |||
| 212 | write_reg(sohandle, so, 0, 0xd8); | ||
| 213 | write_reg(sohandle, so, 1, 0x77); | ||
| 214 | write_reg(sohandle, so, 1, 0x77); | ||
| 215 | |||
| 216 | /* TE signal */ | ||
| 217 | write_reg(sohandle, so, 0, 0x35); | ||
| 218 | write_reg(sohandle, so, 1, 0x00); | ||
| 219 | |||
| 220 | /* TE signal line */ | ||
| 221 | write_reg(sohandle, so, 0, 0x44); | ||
| 222 | write_reg(sohandle, so, 1, 0x00); | ||
| 223 | write_reg(sohandle, so, 1, 0x00); | ||
| 224 | |||
| 225 | /* column address */ | ||
| 226 | write_reg(sohandle, so, 0, 0x2a); | ||
| 227 | write_reg(sohandle, so, 1, 0x00); | ||
| 228 | write_reg(sohandle, so, 1, 0x00); | ||
| 229 | write_reg(sohandle, so, 1, 0x00); | ||
| 230 | write_reg(sohandle, so, 1, 0xef); | ||
| 231 | |||
| 232 | /* page address */ | ||
| 233 | write_reg(sohandle, so, 0, 0x2b); | ||
| 234 | write_reg(sohandle, so, 1, 0x00); | ||
| 235 | write_reg(sohandle, so, 1, 0x00); | ||
| 236 | write_reg(sohandle, so, 1, 0x01); | ||
| 237 | write_reg(sohandle, so, 1, 0x8f); | ||
| 238 | |||
| 239 | /* exit sleep mode */ | ||
| 240 | write_reg(sohandle, so, 0, 0x11); | ||
| 241 | |||
| 242 | mdelay(120); | ||
| 243 | |||
| 244 | /* clear vram */ | ||
| 245 | clear_memory(sohandle, so); | ||
| 246 | |||
| 247 | /* display ON */ | ||
| 248 | write_reg(sohandle, so, 0, 0x29); | ||
| 249 | mdelay(1); | ||
| 250 | |||
| 251 | write_memory_start(sohandle, so); | ||
| 252 | } | ||
| 253 | |||
| 254 | int kfr2r09_lcd_setup(void *board_data, void *sohandle, | ||
| 255 | struct sh_mobile_lcdc_sys_bus_ops *so) | ||
| 256 | { | ||
| 257 | /* power on */ | ||
| 258 | gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */ | ||
| 259 | gpio_set_value(GPIO_PTE4, 0); /* LCD_RST/ -> L */ | ||
| 260 | gpio_set_value(GPIO_PTF4, 1); /* PROTECT/ -> H */ | ||
| 261 | udelay(1100); | ||
| 262 | gpio_set_value(GPIO_PTE4, 1); /* LCD_RST/ -> H */ | ||
| 263 | udelay(10); | ||
| 264 | gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */ | ||
| 265 | mdelay(20); | ||
| 266 | |||
| 267 | if (read_device_code(sohandle, so) != 0x01221517) | ||
| 268 | return -ENODEV; | ||
| 269 | |||
| 270 | pr_info("KFR2R09 WQVGA LCD Module detected.\n"); | ||
| 271 | |||
| 272 | display_on(sohandle, so); | ||
| 273 | return 0; | ||
| 274 | } | ||
| 275 | |||
| 276 | #define CTRL_CKSW 0x10 | ||
| 277 | #define CTRL_C10 0x20 | ||
| 278 | #define CTRL_CPSW 0x80 | ||
| 279 | #define MAIN_MLED4 0x40 | ||
| 280 | #define MAIN_MSW 0x80 | ||
| 281 | |||
| 282 | static int kfr2r09_lcd_backlight(int on) | ||
| 283 | { | ||
| 284 | struct i2c_adapter *a; | ||
| 285 | struct i2c_msg msg; | ||
| 286 | unsigned char buf[2]; | ||
| 287 | int ret; | ||
| 288 | |||
| 289 | a = i2c_get_adapter(0); | ||
| 290 | if (!a) | ||
| 291 | return -ENODEV; | ||
| 292 | |||
| 293 | buf[0] = 0x00; | ||
| 294 | if (on) | ||
| 295 | buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW; | ||
| 296 | else | ||
| 297 | buf[1] = 0; | ||
| 298 | |||
| 299 | msg.addr = 0x75; | ||
| 300 | msg.buf = buf; | ||
| 301 | msg.len = 2; | ||
| 302 | msg.flags = 0; | ||
| 303 | ret = i2c_transfer(a, &msg, 1); | ||
| 304 | if (ret != 1) | ||
| 305 | return -ENODEV; | ||
| 306 | |||
| 307 | buf[0] = 0x01; | ||
| 308 | if (on) | ||
| 309 | buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c; | ||
| 310 | else | ||
| 311 | buf[1] = 0; | ||
| 312 | |||
| 313 | msg.addr = 0x75; | ||
| 314 | msg.buf = buf; | ||
| 315 | msg.len = 2; | ||
| 316 | msg.flags = 0; | ||
| 317 | ret = i2c_transfer(a, &msg, 1); | ||
| 318 | if (ret != 1) | ||
| 319 | return -ENODEV; | ||
| 320 | |||
| 321 | return 0; | ||
| 322 | } | ||
| 323 | |||
| 324 | void kfr2r09_lcd_on(void *board_data) | ||
| 325 | { | ||
| 326 | kfr2r09_lcd_backlight(1); | ||
| 327 | } | ||
| 328 | |||
| 329 | void kfr2r09_lcd_off(void *board_data) | ||
| 330 | { | ||
| 331 | kfr2r09_lcd_backlight(0); | ||
| 332 | } | ||
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c new file mode 100644 index 000000000000..c08d33fe2104 --- /dev/null +++ b/arch/sh/boards/mach-kfr2r09/setup.c | |||
| @@ -0,0 +1,386 @@ | |||
| 1 | /* | ||
| 2 | * KFR2R09 board support code | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Magnus Damm | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/interrupt.h> | ||
| 13 | #include <linux/mtd/physmap.h> | ||
| 14 | #include <linux/mtd/onenand.h> | ||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/clk.h> | ||
| 17 | #include <linux/gpio.h> | ||
| 18 | #include <linux/input.h> | ||
| 19 | #include <linux/i2c.h> | ||
| 20 | #include <linux/usb/r8a66597.h> | ||
| 21 | #include <video/sh_mobile_lcdc.h> | ||
| 22 | #include <asm/clock.h> | ||
| 23 | #include <asm/machvec.h> | ||
| 24 | #include <asm/io.h> | ||
| 25 | #include <asm/sh_keysc.h> | ||
| 26 | #include <cpu/sh7724.h> | ||
| 27 | #include <mach/kfr2r09.h> | ||
| 28 | |||
| 29 | static struct mtd_partition kfr2r09_nor_flash_partitions[] = | ||
| 30 | { | ||
| 31 | { | ||
| 32 | .name = "boot", | ||
| 33 | .offset = 0, | ||
| 34 | .size = (4 * 1024 * 1024), | ||
| 35 | .mask_flags = MTD_WRITEABLE, /* Read-only */ | ||
| 36 | }, | ||
| 37 | { | ||
| 38 | .name = "other", | ||
| 39 | .offset = MTDPART_OFS_APPEND, | ||
| 40 | .size = MTDPART_SIZ_FULL, | ||
| 41 | }, | ||
| 42 | }; | ||
| 43 | |||
| 44 | static struct physmap_flash_data kfr2r09_nor_flash_data = { | ||
| 45 | .width = 2, | ||
| 46 | .parts = kfr2r09_nor_flash_partitions, | ||
| 47 | .nr_parts = ARRAY_SIZE(kfr2r09_nor_flash_partitions), | ||
| 48 | }; | ||
| 49 | |||
| 50 | static struct resource kfr2r09_nor_flash_resources[] = { | ||
| 51 | [0] = { | ||
| 52 | .name = "NOR Flash", | ||
| 53 | .start = 0x00000000, | ||
| 54 | .end = 0x03ffffff, | ||
| 55 | .flags = IORESOURCE_MEM, | ||
| 56 | } | ||
| 57 | }; | ||
| 58 | |||
| 59 | static struct platform_device kfr2r09_nor_flash_device = { | ||
| 60 | .name = "physmap-flash", | ||
| 61 | .resource = kfr2r09_nor_flash_resources, | ||
| 62 | .num_resources = ARRAY_SIZE(kfr2r09_nor_flash_resources), | ||
| 63 | .dev = { | ||
| 64 | .platform_data = &kfr2r09_nor_flash_data, | ||
| 65 | }, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct resource kfr2r09_nand_flash_resources[] = { | ||
| 69 | [0] = { | ||
| 70 | .name = "NAND Flash", | ||
| 71 | .start = 0x10000000, | ||
| 72 | .end = 0x1001ffff, | ||
| 73 | .flags = IORESOURCE_MEM, | ||
| 74 | } | ||
| 75 | }; | ||
| 76 | |||
| 77 | static struct platform_device kfr2r09_nand_flash_device = { | ||
| 78 | .name = "onenand-flash", | ||
| 79 | .resource = kfr2r09_nand_flash_resources, | ||
| 80 | .num_resources = ARRAY_SIZE(kfr2r09_nand_flash_resources), | ||
| 81 | }; | ||
| 82 | |||
| 83 | static struct sh_keysc_info kfr2r09_sh_keysc_info = { | ||
| 84 | .mode = SH_KEYSC_MODE_1, /* KEYOUT0->4, KEYIN0->4 */ | ||
| 85 | .scan_timing = 3, | ||
| 86 | .delay = 10, | ||
| 87 | .keycodes = { | ||
| 88 | KEY_PHONE, KEY_CLEAR, KEY_MAIL, KEY_WWW, KEY_ENTER, | ||
| 89 | KEY_1, KEY_2, KEY_3, 0, KEY_UP, | ||
| 90 | KEY_4, KEY_5, KEY_6, 0, KEY_LEFT, | ||
| 91 | KEY_7, KEY_8, KEY_9, KEY_PROG1, KEY_RIGHT, | ||
| 92 | KEY_S, KEY_0, KEY_P, KEY_PROG2, KEY_DOWN, | ||
| 93 | 0, 0, 0, 0, 0 | ||
| 94 | }, | ||
| 95 | }; | ||
| 96 | |||
| 97 | static struct resource kfr2r09_sh_keysc_resources[] = { | ||
| 98 | [0] = { | ||
| 99 | .name = "KEYSC", | ||
| 100 | .start = 0x044b0000, | ||
| 101 | .end = 0x044b000f, | ||
| 102 | .flags = IORESOURCE_MEM, | ||
| 103 | }, | ||
| 104 | [1] = { | ||
| 105 | .start = 79, | ||
| 106 | .flags = IORESOURCE_IRQ, | ||
| 107 | }, | ||
| 108 | }; | ||
| 109 | |||
| 110 | static struct platform_device kfr2r09_sh_keysc_device = { | ||
| 111 | .name = "sh_keysc", | ||
| 112 | .id = 0, /* "keysc0" clock */ | ||
| 113 | .num_resources = ARRAY_SIZE(kfr2r09_sh_keysc_resources), | ||
| 114 | .resource = kfr2r09_sh_keysc_resources, | ||
| 115 | .dev = { | ||
| 116 | .platform_data = &kfr2r09_sh_keysc_info, | ||
| 117 | }, | ||
| 118 | .archdata = { | ||
| 119 | .hwblk_id = HWBLK_KEYSC, | ||
| 120 | }, | ||
| 121 | }; | ||
| 122 | |||
| 123 | static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = { | ||
| 124 | .clock_source = LCDC_CLK_BUS, | ||
| 125 | .ch[0] = { | ||
| 126 | .chan = LCDC_CHAN_MAINLCD, | ||
| 127 | .bpp = 16, | ||
| 128 | .interface_type = SYS18, | ||
| 129 | .clock_divider = 6, | ||
| 130 | .flags = LCDC_FLAGS_DWPOL, | ||
| 131 | .lcd_cfg = { | ||
| 132 | .name = "TX07D34VM0AAA", | ||
| 133 | .xres = 240, | ||
| 134 | .yres = 400, | ||
| 135 | .left_margin = 0, | ||
| 136 | .right_margin = 16, | ||
| 137 | .hsync_len = 8, | ||
| 138 | .upper_margin = 0, | ||
| 139 | .lower_margin = 1, | ||
| 140 | .vsync_len = 1, | ||
| 141 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
| 142 | }, | ||
| 143 | .lcd_size_cfg = { | ||
| 144 | .width = 35, | ||
| 145 | .height = 58, | ||
| 146 | }, | ||
| 147 | .board_cfg = { | ||
| 148 | .setup_sys = kfr2r09_lcd_setup, | ||
| 149 | .display_on = kfr2r09_lcd_on, | ||
| 150 | .display_off = kfr2r09_lcd_off, | ||
| 151 | }, | ||
| 152 | .sys_bus_cfg = { | ||
| 153 | .ldmt2r = 0x07010904, | ||
| 154 | .ldmt3r = 0x14012914, | ||
| 155 | /* set 1s delay to encourage fsync() */ | ||
| 156 | .deferred_io_msec = 1000, | ||
| 157 | }, | ||
| 158 | } | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct resource kfr2r09_sh_lcdc_resources[] = { | ||
| 162 | [0] = { | ||
| 163 | .name = "LCDC", | ||
| 164 | .start = 0xfe940000, /* P4-only space */ | ||
| 165 | .end = 0xfe942fff, | ||
| 166 | .flags = IORESOURCE_MEM, | ||
| 167 | }, | ||
| 168 | [1] = { | ||
| 169 | .start = 106, | ||
| 170 | .flags = IORESOURCE_IRQ, | ||
| 171 | }, | ||
| 172 | }; | ||
| 173 | |||
| 174 | static struct platform_device kfr2r09_sh_lcdc_device = { | ||
| 175 | .name = "sh_mobile_lcdc_fb", | ||
| 176 | .num_resources = ARRAY_SIZE(kfr2r09_sh_lcdc_resources), | ||
| 177 | .resource = kfr2r09_sh_lcdc_resources, | ||
| 178 | .dev = { | ||
| 179 | .platform_data = &kfr2r09_sh_lcdc_info, | ||
| 180 | }, | ||
| 181 | .archdata = { | ||
| 182 | .hwblk_id = HWBLK_LCDC, | ||
| 183 | }, | ||
| 184 | }; | ||
| 185 | |||
| 186 | static struct r8a66597_platdata kfr2r09_usb0_gadget_data = { | ||
| 187 | .on_chip = 1, | ||
| 188 | }; | ||
| 189 | |||
| 190 | static struct resource kfr2r09_usb0_gadget_resources[] = { | ||
| 191 | [0] = { | ||
| 192 | .start = 0x04d80000, | ||
| 193 | .end = 0x04d80123, | ||
| 194 | .flags = IORESOURCE_MEM, | ||
| 195 | }, | ||
| 196 | [1] = { | ||
| 197 | .start = 65, | ||
| 198 | .end = 65, | ||
| 199 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
| 200 | }, | ||
| 201 | }; | ||
| 202 | |||
| 203 | static struct platform_device kfr2r09_usb0_gadget_device = { | ||
| 204 | .name = "r8a66597_udc", | ||
| 205 | .id = 0, | ||
| 206 | .dev = { | ||
| 207 | .dma_mask = NULL, /* not use dma */ | ||
| 208 | .coherent_dma_mask = 0xffffffff, | ||
| 209 | .platform_data = &kfr2r09_usb0_gadget_data, | ||
| 210 | }, | ||
| 211 | .num_resources = ARRAY_SIZE(kfr2r09_usb0_gadget_resources), | ||
| 212 | .resource = kfr2r09_usb0_gadget_resources, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct platform_device *kfr2r09_devices[] __initdata = { | ||
| 216 | &kfr2r09_nor_flash_device, | ||
| 217 | &kfr2r09_nand_flash_device, | ||
| 218 | &kfr2r09_sh_keysc_device, | ||
| 219 | &kfr2r09_sh_lcdc_device, | ||
| 220 | }; | ||
| 221 | |||
| 222 | #define BSC_CS0BCR 0xfec10004 | ||
| 223 | #define BSC_CS0WCR 0xfec10024 | ||
| 224 | #define BSC_CS4BCR 0xfec10010 | ||
| 225 | #define BSC_CS4WCR 0xfec10030 | ||
| 226 | #define PORT_MSELCRB 0xa4050182 | ||
| 227 | |||
| 228 | #ifdef CONFIG_I2C | ||
| 229 | static int kfr2r09_usb0_gadget_i2c_setup(void) | ||
| 230 | { | ||
| 231 | struct i2c_adapter *a; | ||
| 232 | struct i2c_msg msg; | ||
| 233 | unsigned char buf[2]; | ||
| 234 | int ret; | ||
| 235 | |||
| 236 | a = i2c_get_adapter(0); | ||
| 237 | if (!a) | ||
| 238 | return -ENODEV; | ||
| 239 | |||
| 240 | /* set bit 1 (the second bit) of chip at 0x09, register 0x13 */ | ||
| 241 | buf[0] = 0x13; | ||
| 242 | msg.addr = 0x09; | ||
| 243 | msg.buf = buf; | ||
| 244 | msg.len = 1; | ||
| 245 | msg.flags = 0; | ||
| 246 | ret = i2c_transfer(a, &msg, 1); | ||
| 247 | if (ret != 1) | ||
| 248 | return -ENODEV; | ||
| 249 | |||
| 250 | buf[0] = 0; | ||
| 251 | msg.addr = 0x09; | ||
| 252 | msg.buf = buf; | ||
| 253 | msg.len = 1; | ||
| 254 | msg.flags = I2C_M_RD; | ||
| 255 | ret = i2c_transfer(a, &msg, 1); | ||
| 256 | if (ret != 1) | ||
| 257 | return -ENODEV; | ||
| 258 | |||
| 259 | buf[1] = buf[0] | (1 << 1); | ||
| 260 | buf[0] = 0x13; | ||
| 261 | msg.addr = 0x09; | ||
| 262 | msg.buf = buf; | ||
| 263 | msg.len = 2; | ||
| 264 | msg.flags = 0; | ||
| 265 | ret = i2c_transfer(a, &msg, 1); | ||
| 266 | if (ret != 1) | ||
| 267 | return -ENODEV; | ||
| 268 | |||
| 269 | return 0; | ||
| 270 | } | ||
| 271 | #else | ||
| 272 | static int kfr2r09_usb0_gadget_i2c_setup(void) | ||
| 273 | { | ||
| 274 | return -ENODEV; | ||
| 275 | } | ||
| 276 | #endif | ||
| 277 | |||
| 278 | static int kfr2r09_usb0_gadget_setup(void) | ||
| 279 | { | ||
| 280 | int plugged_in; | ||
| 281 | |||
| 282 | gpio_request(GPIO_PTN4, NULL); /* USB_DET */ | ||
| 283 | gpio_direction_input(GPIO_PTN4); | ||
| 284 | plugged_in = gpio_get_value(GPIO_PTN4); | ||
| 285 | if (!plugged_in) | ||
| 286 | return -ENODEV; /* no cable plugged in */ | ||
| 287 | |||
| 288 | if (kfr2r09_usb0_gadget_i2c_setup() != 0) | ||
| 289 | return -ENODEV; /* unable to configure using i2c */ | ||
| 290 | |||
| 291 | ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); | ||
| 292 | gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */ | ||
| 293 | gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */ | ||
| 294 | gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */ | ||
| 295 | msleep(20); /* wait 20ms to let the clock settle */ | ||
| 296 | clk_enable(clk_get(NULL, "usb0")); | ||
| 297 | ctrl_outw(0x0600, 0xa40501d4); | ||
| 298 | |||
| 299 | return 0; | ||
| 300 | } | ||
| 301 | |||
| 302 | static int __init kfr2r09_devices_setup(void) | ||
| 303 | { | ||
| 304 | /* enable SCIF1 serial port for YC401 console support */ | ||
| 305 | gpio_request(GPIO_FN_SCIF1_RXD, NULL); | ||
| 306 | gpio_request(GPIO_FN_SCIF1_TXD, NULL); | ||
| 307 | |||
| 308 | /* setup NOR flash at CS0 */ | ||
| 309 | ctrl_outl(0x36db0400, BSC_CS0BCR); | ||
| 310 | ctrl_outl(0x00000500, BSC_CS0WCR); | ||
| 311 | |||
| 312 | /* setup NAND flash at CS4 */ | ||
| 313 | ctrl_outl(0x36db0400, BSC_CS4BCR); | ||
| 314 | ctrl_outl(0x00000500, BSC_CS4WCR); | ||
| 315 | |||
| 316 | /* setup KEYSC pins */ | ||
| 317 | gpio_request(GPIO_FN_KEYOUT0, NULL); | ||
| 318 | gpio_request(GPIO_FN_KEYOUT1, NULL); | ||
| 319 | gpio_request(GPIO_FN_KEYOUT2, NULL); | ||
| 320 | gpio_request(GPIO_FN_KEYOUT3, NULL); | ||
| 321 | gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); | ||
| 322 | gpio_request(GPIO_FN_KEYIN0, NULL); | ||
| 323 | gpio_request(GPIO_FN_KEYIN1, NULL); | ||
| 324 | gpio_request(GPIO_FN_KEYIN2, NULL); | ||
| 325 | gpio_request(GPIO_FN_KEYIN3, NULL); | ||
| 326 | gpio_request(GPIO_FN_KEYIN4, NULL); | ||
| 327 | gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); | ||
| 328 | |||
| 329 | /* setup LCDC pins for SYS panel */ | ||
| 330 | gpio_request(GPIO_FN_LCDD17, NULL); | ||
| 331 | gpio_request(GPIO_FN_LCDD16, NULL); | ||
| 332 | gpio_request(GPIO_FN_LCDD15, NULL); | ||
| 333 | gpio_request(GPIO_FN_LCDD14, NULL); | ||
| 334 | gpio_request(GPIO_FN_LCDD13, NULL); | ||
| 335 | gpio_request(GPIO_FN_LCDD12, NULL); | ||
| 336 | gpio_request(GPIO_FN_LCDD11, NULL); | ||
| 337 | gpio_request(GPIO_FN_LCDD10, NULL); | ||
| 338 | gpio_request(GPIO_FN_LCDD9, NULL); | ||
| 339 | gpio_request(GPIO_FN_LCDD8, NULL); | ||
| 340 | gpio_request(GPIO_FN_LCDD7, NULL); | ||
| 341 | gpio_request(GPIO_FN_LCDD6, NULL); | ||
| 342 | gpio_request(GPIO_FN_LCDD5, NULL); | ||
| 343 | gpio_request(GPIO_FN_LCDD4, NULL); | ||
| 344 | gpio_request(GPIO_FN_LCDD3, NULL); | ||
| 345 | gpio_request(GPIO_FN_LCDD2, NULL); | ||
| 346 | gpio_request(GPIO_FN_LCDD1, NULL); | ||
| 347 | gpio_request(GPIO_FN_LCDD0, NULL); | ||
| 348 | gpio_request(GPIO_FN_LCDRS, NULL); /* LCD_RS */ | ||
| 349 | gpio_request(GPIO_FN_LCDCS, NULL); /* LCD_CS/ */ | ||
| 350 | gpio_request(GPIO_FN_LCDRD, NULL); /* LCD_RD/ */ | ||
| 351 | gpio_request(GPIO_FN_LCDWR, NULL); /* LCD_WR/ */ | ||
| 352 | gpio_request(GPIO_FN_LCDVSYN, NULL); /* LCD_VSYNC */ | ||
| 353 | gpio_request(GPIO_PTE4, NULL); /* LCD_RST/ */ | ||
| 354 | gpio_direction_output(GPIO_PTE4, 1); | ||
| 355 | gpio_request(GPIO_PTF4, NULL); /* PROTECT/ */ | ||
| 356 | gpio_direction_output(GPIO_PTF4, 1); | ||
| 357 | gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */ | ||
| 358 | gpio_direction_output(GPIO_PTU0, 1); | ||
| 359 | |||
| 360 | /* setup USB function */ | ||
| 361 | if (kfr2r09_usb0_gadget_setup() == 0) | ||
| 362 | platform_device_register(&kfr2r09_usb0_gadget_device); | ||
| 363 | |||
| 364 | return platform_add_devices(kfr2r09_devices, | ||
| 365 | ARRAY_SIZE(kfr2r09_devices)); | ||
| 366 | } | ||
| 367 | device_initcall(kfr2r09_devices_setup); | ||
| 368 | |||
| 369 | /* Return the board specific boot mode pin configuration */ | ||
| 370 | static int kfr2r09_mode_pins(void) | ||
| 371 | { | ||
| 372 | /* MD0=1, MD1=1, MD2=0: Clock Mode 3 | ||
| 373 | * MD3=0: 16-bit Area0 Bus Width | ||
| 374 | * MD5=1: Little Endian | ||
| 375 | * MD8=1: Test Mode Disabled | ||
| 376 | */ | ||
| 377 | return MODE_PIN0 | MODE_PIN1 | MODE_PIN5 | MODE_PIN8; | ||
| 378 | } | ||
| 379 | |||
| 380 | /* | ||
| 381 | * The Machine Vector | ||
| 382 | */ | ||
| 383 | static struct sh_machine_vector mv_kfr2r09 __initmv = { | ||
| 384 | .mv_name = "kfr2r09", | ||
| 385 | .mv_mode_pins = kfr2r09_mode_pins, | ||
| 386 | }; | ||
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index f9b2e4df35b9..6ed1fd32369e 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c | |||
| @@ -98,6 +98,9 @@ static struct platform_device sh_keysc_device = { | |||
| 98 | .dev = { | 98 | .dev = { |
| 99 | .platform_data = &sh_keysc_info, | 99 | .platform_data = &sh_keysc_info, |
| 100 | }, | 100 | }, |
| 101 | .archdata = { | ||
| 102 | .hwblk_id = HWBLK_KEYSC, | ||
| 103 | }, | ||
| 101 | }; | 104 | }; |
| 102 | 105 | ||
| 103 | static struct mtd_partition migor_nor_flash_partitions[] = | 106 | static struct mtd_partition migor_nor_flash_partitions[] = |
| @@ -276,7 +279,7 @@ static struct resource migor_lcdc_resources[] = { | |||
| 276 | [0] = { | 279 | [0] = { |
| 277 | .name = "LCDC", | 280 | .name = "LCDC", |
| 278 | .start = 0xfe940000, /* P4-only space */ | 281 | .start = 0xfe940000, /* P4-only space */ |
| 279 | .end = 0xfe941fff, | 282 | .end = 0xfe942fff, |
| 280 | .flags = IORESOURCE_MEM, | 283 | .flags = IORESOURCE_MEM, |
| 281 | }, | 284 | }, |
| 282 | [1] = { | 285 | [1] = { |
| @@ -292,6 +295,9 @@ static struct platform_device migor_lcdc_device = { | |||
| 292 | .dev = { | 295 | .dev = { |
| 293 | .platform_data = &sh_mobile_lcdc_info, | 296 | .platform_data = &sh_mobile_lcdc_info, |
| 294 | }, | 297 | }, |
| 298 | .archdata = { | ||
| 299 | .hwblk_id = HWBLK_LCDC, | ||
| 300 | }, | ||
| 295 | }; | 301 | }; |
| 296 | 302 | ||
| 297 | static struct clk *camera_clk; | 303 | static struct clk *camera_clk; |
| @@ -379,6 +385,9 @@ static struct platform_device migor_ceu_device = { | |||
| 379 | .dev = { | 385 | .dev = { |
| 380 | .platform_data = &sh_mobile_ceu_info, | 386 | .platform_data = &sh_mobile_ceu_info, |
| 381 | }, | 387 | }, |
| 388 | .archdata = { | ||
| 389 | .hwblk_id = HWBLK_CEU, | ||
| 390 | }, | ||
| 382 | }; | 391 | }; |
| 383 | 392 | ||
| 384 | struct spi_gpio_platform_data sdcard_cn9_platform_data = { | 393 | struct spi_gpio_platform_data sdcard_cn9_platform_data = { |
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c index af84904ed86f..36374078e521 100644 --- a/arch/sh/boards/mach-se/7722/setup.c +++ b/arch/sh/boards/mach-se/7722/setup.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <asm/io.h> | 22 | #include <asm/io.h> |
| 23 | #include <asm/heartbeat.h> | 23 | #include <asm/heartbeat.h> |
| 24 | #include <asm/sh_keysc.h> | 24 | #include <asm/sh_keysc.h> |
| 25 | #include <cpu/sh7722.h> | ||
| 25 | 26 | ||
| 26 | /* Heartbeat */ | 27 | /* Heartbeat */ |
| 27 | static struct heartbeat_data heartbeat_data = { | 28 | static struct heartbeat_data heartbeat_data = { |
| @@ -137,6 +138,9 @@ static struct platform_device sh_keysc_device = { | |||
| 137 | .dev = { | 138 | .dev = { |
| 138 | .platform_data = &sh_keysc_info, | 139 | .platform_data = &sh_keysc_info, |
| 139 | }, | 140 | }, |
| 141 | .archdata = { | ||
| 142 | .hwblk_id = HWBLK_KEYSC, | ||
| 143 | }, | ||
| 140 | }; | 144 | }; |
| 141 | 145 | ||
| 142 | static struct platform_device *se7722_devices[] __initdata = { | 146 | static struct platform_device *se7722_devices[] __initdata = { |
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index 15456a0773bf..00973e0f8c63 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c | |||
| @@ -39,7 +39,15 @@ | |||
| 39 | * SW41 : abxx xxxx -> a = 0 : Analog monitor | 39 | * SW41 : abxx xxxx -> a = 0 : Analog monitor |
| 40 | * 1 : Digital monitor | 40 | * 1 : Digital monitor |
| 41 | * b = 0 : VGA | 41 | * b = 0 : VGA |
| 42 | * 1 : SVGA | 42 | * 1 : 720p |
| 43 | */ | ||
| 44 | |||
| 45 | /* | ||
| 46 | * about 720p | ||
| 47 | * | ||
| 48 | * When you use 1280 x 720 lcdc output, | ||
| 49 | * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz, | ||
| 50 | * and change SW41 to use 720p | ||
| 43 | */ | 51 | */ |
| 44 | 52 | ||
| 45 | /* Heartbeat */ | 53 | /* Heartbeat */ |
| @@ -158,7 +166,7 @@ static struct resource lcdc_resources[] = { | |||
| 158 | [0] = { | 166 | [0] = { |
| 159 | .name = "LCDC", | 167 | .name = "LCDC", |
| 160 | .start = 0xfe940000, | 168 | .start = 0xfe940000, |
| 161 | .end = 0xfe941fff, | 169 | .end = 0xfe942fff, |
| 162 | .flags = IORESOURCE_MEM, | 170 | .flags = IORESOURCE_MEM, |
| 163 | }, | 171 | }, |
| 164 | [1] = { | 172 | [1] = { |
| @@ -174,6 +182,9 @@ static struct platform_device lcdc_device = { | |||
| 174 | .dev = { | 182 | .dev = { |
| 175 | .platform_data = &lcdc_info, | 183 | .platform_data = &lcdc_info, |
| 176 | }, | 184 | }, |
| 185 | .archdata = { | ||
| 186 | .hwblk_id = HWBLK_LCDC, | ||
| 187 | }, | ||
| 177 | }; | 188 | }; |
| 178 | 189 | ||
| 179 | /* CEU0 */ | 190 | /* CEU0 */ |
| @@ -205,6 +216,9 @@ static struct platform_device ceu0_device = { | |||
| 205 | .dev = { | 216 | .dev = { |
| 206 | .platform_data = &sh_mobile_ceu0_info, | 217 | .platform_data = &sh_mobile_ceu0_info, |
| 207 | }, | 218 | }, |
| 219 | .archdata = { | ||
| 220 | .hwblk_id = HWBLK_CEU0, | ||
| 221 | }, | ||
| 208 | }; | 222 | }; |
| 209 | 223 | ||
| 210 | /* CEU1 */ | 224 | /* CEU1 */ |
| @@ -236,6 +250,9 @@ static struct platform_device ceu1_device = { | |||
| 236 | .dev = { | 250 | .dev = { |
| 237 | .platform_data = &sh_mobile_ceu1_info, | 251 | .platform_data = &sh_mobile_ceu1_info, |
| 238 | }, | 252 | }, |
| 253 | .archdata = { | ||
| 254 | .hwblk_id = HWBLK_CEU1, | ||
| 255 | }, | ||
| 239 | }; | 256 | }; |
| 240 | 257 | ||
| 241 | /* KEYSC in SoC (Needs SW33-2 set to ON) */ | 258 | /* KEYSC in SoC (Needs SW33-2 set to ON) */ |
| @@ -274,6 +291,9 @@ static struct platform_device keysc_device = { | |||
| 274 | .dev = { | 291 | .dev = { |
| 275 | .platform_data = &keysc_info, | 292 | .platform_data = &keysc_info, |
| 276 | }, | 293 | }, |
| 294 | .archdata = { | ||
| 295 | .hwblk_id = HWBLK_KEYSC, | ||
| 296 | }, | ||
| 277 | }; | 297 | }; |
| 278 | 298 | ||
| 279 | /* SH Eth */ | 299 | /* SH Eth */ |
| @@ -302,15 +322,19 @@ static struct platform_device sh_eth_device = { | |||
| 302 | }, | 322 | }, |
| 303 | .num_resources = ARRAY_SIZE(sh_eth_resources), | 323 | .num_resources = ARRAY_SIZE(sh_eth_resources), |
| 304 | .resource = sh_eth_resources, | 324 | .resource = sh_eth_resources, |
| 325 | .archdata = { | ||
| 326 | .hwblk_id = HWBLK_ETHER, | ||
| 327 | }, | ||
| 305 | }; | 328 | }; |
| 306 | 329 | ||
| 307 | static struct r8a66597_platdata sh7724_usb0_host_data = { | 330 | static struct r8a66597_platdata sh7724_usb0_host_data = { |
| 331 | .on_chip = 1, | ||
| 308 | }; | 332 | }; |
| 309 | 333 | ||
| 310 | static struct resource sh7724_usb0_host_resources[] = { | 334 | static struct resource sh7724_usb0_host_resources[] = { |
| 311 | [0] = { | 335 | [0] = { |
| 312 | .start = 0xa4d80000, | 336 | .start = 0xa4d80000, |
| 313 | .end = 0xa4d800ff, | 337 | .end = 0xa4d80124 - 1, |
| 314 | .flags = IORESOURCE_MEM, | 338 | .flags = IORESOURCE_MEM, |
| 315 | }, | 339 | }, |
| 316 | [1] = { | 340 | [1] = { |
| @@ -330,6 +354,38 @@ static struct platform_device sh7724_usb0_host_device = { | |||
| 330 | }, | 354 | }, |
| 331 | .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), | 355 | .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), |
| 332 | .resource = sh7724_usb0_host_resources, | 356 | .resource = sh7724_usb0_host_resources, |
| 357 | .archdata = { | ||
| 358 | .hwblk_id = HWBLK_USB0, | ||
| 359 | }, | ||
| 360 | }; | ||
| 361 | |||
| 362 | static struct r8a66597_platdata sh7724_usb1_gadget_data = { | ||
| 363 | .on_chip = 1, | ||
| 364 | }; | ||
| 365 | |||
| 366 | static struct resource sh7724_usb1_gadget_resources[] = { | ||
| 367 | [0] = { | ||
| 368 | .start = 0xa4d90000, | ||
| 369 | .end = 0xa4d90123, | ||
| 370 | .flags = IORESOURCE_MEM, | ||
| 371 | }, | ||
| 372 | [1] = { | ||
| 373 | .start = 66, | ||
| 374 | .end = 66, | ||
| 375 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
| 376 | }, | ||
| 377 | }; | ||
| 378 | |||
| 379 | static struct platform_device sh7724_usb1_gadget_device = { | ||
| 380 | .name = "r8a66597_udc", | ||
| 381 | .id = 1, /* USB1 */ | ||
| 382 | .dev = { | ||
| 383 | .dma_mask = NULL, /* not use dma */ | ||
| 384 | .coherent_dma_mask = 0xffffffff, | ||
| 385 | .platform_data = &sh7724_usb1_gadget_data, | ||
| 386 | }, | ||
| 387 | .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources), | ||
| 388 | .resource = sh7724_usb1_gadget_resources, | ||
| 333 | }; | 389 | }; |
| 334 | 390 | ||
| 335 | static struct platform_device *ms7724se_devices[] __initdata = { | 391 | static struct platform_device *ms7724se_devices[] __initdata = { |
| @@ -342,6 +398,7 @@ static struct platform_device *ms7724se_devices[] __initdata = { | |||
| 342 | &keysc_device, | 398 | &keysc_device, |
| 343 | &sh_eth_device, | 399 | &sh_eth_device, |
| 344 | &sh7724_usb0_host_device, | 400 | &sh7724_usb0_host_device, |
| 401 | &sh7724_usb1_gadget_device, | ||
| 345 | }; | 402 | }; |
| 346 | 403 | ||
| 347 | #define EEPROM_OP 0xBA206000 | 404 | #define EEPROM_OP 0xBA206000 |
| @@ -421,9 +478,38 @@ static int __init devices_setup(void) | |||
| 421 | /* turn on USB clocks, use external clock */ | 478 | /* turn on USB clocks, use external clock */ |
| 422 | ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); | 479 | ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); |
| 423 | 480 | ||
| 481 | #ifdef CONFIG_PM | ||
| 482 | /* Let LED9 show STATUS2 */ | ||
| 483 | gpio_request(GPIO_FN_STATUS2, NULL); | ||
| 484 | |||
| 485 | /* Lit LED10 show STATUS0 */ | ||
| 486 | gpio_request(GPIO_FN_STATUS0, NULL); | ||
| 487 | |||
| 488 | /* Lit LED11 show PDSTATUS */ | ||
| 489 | gpio_request(GPIO_FN_PDSTATUS, NULL); | ||
| 490 | #else | ||
| 491 | /* Lit LED9 */ | ||
| 492 | gpio_request(GPIO_PTJ6, NULL); | ||
| 493 | gpio_direction_output(GPIO_PTJ6, 1); | ||
| 494 | gpio_export(GPIO_PTJ6, 0); | ||
| 495 | |||
| 496 | /* Lit LED10 */ | ||
| 497 | gpio_request(GPIO_PTJ5, NULL); | ||
| 498 | gpio_direction_output(GPIO_PTJ5, 1); | ||
| 499 | gpio_export(GPIO_PTJ5, 0); | ||
| 500 | |||
| 501 | /* Lit LED11 */ | ||
| 502 | gpio_request(GPIO_PTJ7, NULL); | ||
| 503 | gpio_direction_output(GPIO_PTJ7, 1); | ||
| 504 | gpio_export(GPIO_PTJ7, 0); | ||
| 505 | #endif | ||
| 506 | |||
| 424 | /* enable USB0 port */ | 507 | /* enable USB0 port */ |
| 425 | ctrl_outw(0x0600, 0xa40501d4); | 508 | ctrl_outw(0x0600, 0xa40501d4); |
| 426 | 509 | ||
| 510 | /* enable USB1 port */ | ||
| 511 | ctrl_outw(0x0600, 0xa4050192); | ||
| 512 | |||
| 427 | /* enable IRQ 0,1,2 */ | 513 | /* enable IRQ 0,1,2 */ |
| 428 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | 514 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); |
| 429 | gpio_request(GPIO_FN_INTC_IRQ1, NULL); | 515 | gpio_request(GPIO_FN_INTC_IRQ1, NULL); |
| @@ -546,15 +632,15 @@ static int __init devices_setup(void) | |||
| 546 | sh_eth_init(); | 632 | sh_eth_init(); |
| 547 | 633 | ||
| 548 | if (sw & SW41_B) { | 634 | if (sw & SW41_B) { |
| 549 | /* SVGA */ | 635 | /* 720p */ |
| 550 | lcdc_info.ch[0].lcd_cfg.xres = 800; | 636 | lcdc_info.ch[0].lcd_cfg.xres = 1280; |
| 551 | lcdc_info.ch[0].lcd_cfg.yres = 600; | 637 | lcdc_info.ch[0].lcd_cfg.yres = 720; |
| 552 | lcdc_info.ch[0].lcd_cfg.left_margin = 142; | 638 | lcdc_info.ch[0].lcd_cfg.left_margin = 220; |
| 553 | lcdc_info.ch[0].lcd_cfg.right_margin = 52; | 639 | lcdc_info.ch[0].lcd_cfg.right_margin = 110; |
| 554 | lcdc_info.ch[0].lcd_cfg.hsync_len = 96; | 640 | lcdc_info.ch[0].lcd_cfg.hsync_len = 40; |
| 555 | lcdc_info.ch[0].lcd_cfg.upper_margin = 24; | 641 | lcdc_info.ch[0].lcd_cfg.upper_margin = 20; |
| 556 | lcdc_info.ch[0].lcd_cfg.lower_margin = 2; | 642 | lcdc_info.ch[0].lcd_cfg.lower_margin = 5; |
| 557 | lcdc_info.ch[0].lcd_cfg.vsync_len = 2; | 643 | lcdc_info.ch[0].lcd_cfg.vsync_len = 5; |
| 558 | } else { | 644 | } else { |
| 559 | /* VGA */ | 645 | /* VGA */ |
| 560 | lcdc_info.ch[0].lcd_cfg.xres = 640; | 646 | lcdc_info.ch[0].lcd_cfg.xres = 640; |
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c index 8913ae39a802..efe4cb9f8a77 100644 --- a/arch/sh/boards/mach-x3proto/setup.c +++ b/arch/sh/boards/mach-x3proto/setup.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/irq.h> | 17 | #include <linux/irq.h> |
| 18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/usb/r8a66597.h> | 19 | #include <linux/usb/r8a66597.h> |
| 20 | #include <linux/usb/m66592.h> | ||
| 20 | #include <asm/ilsel.h> | 21 | #include <asm/ilsel.h> |
| 21 | 22 | ||
| 22 | static struct resource heartbeat_resources[] = { | 23 | static struct resource heartbeat_resources[] = { |
| @@ -89,6 +90,11 @@ static struct platform_device r8a66597_usb_host_device = { | |||
| 89 | .resource = r8a66597_usb_host_resources, | 90 | .resource = r8a66597_usb_host_resources, |
| 90 | }; | 91 | }; |
| 91 | 92 | ||
| 93 | static struct m66592_platdata usbf_platdata = { | ||
| 94 | .xtal = M66592_PLATDATA_XTAL_24MHZ, | ||
| 95 | .vif = 1, | ||
| 96 | }; | ||
| 97 | |||
| 92 | static struct resource m66592_usb_peripheral_resources[] = { | 98 | static struct resource m66592_usb_peripheral_resources[] = { |
| 93 | [0] = { | 99 | [0] = { |
| 94 | .name = "m66592_udc", | 100 | .name = "m66592_udc", |
| @@ -109,6 +115,7 @@ static struct platform_device m66592_usb_peripheral_device = { | |||
| 109 | .dev = { | 115 | .dev = { |
| 110 | .dma_mask = NULL, /* don't use dma */ | 116 | .dma_mask = NULL, /* don't use dma */ |
| 111 | .coherent_dma_mask = 0xffffffff, | 117 | .coherent_dma_mask = 0xffffffff, |
| 118 | .platform_data = &usbf_platdata, | ||
| 112 | }, | 119 | }, |
| 113 | .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources), | 120 | .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources), |
| 114 | .resource = m66592_usb_peripheral_resources, | 121 | .resource = m66592_usb_peripheral_resources, |
diff --git a/arch/sh/boot/.gitignore b/arch/sh/boot/.gitignore index aad5edddf93b..541087d2029c 100644 --- a/arch/sh/boot/.gitignore +++ b/arch/sh/boot/.gitignore | |||
| @@ -1,4 +1,3 @@ | |||
| 1 | zImage | 1 | zImage |
| 2 | vmlinux.srec | 2 | vmlinux* |
| 3 | uImage | 3 | uImage* |
| 4 | uImage.srec | ||
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile index 78efb04c28f3..a1316872be6f 100644 --- a/arch/sh/boot/Makefile +++ b/arch/sh/boot/Makefile | |||
| @@ -20,8 +20,13 @@ CONFIG_BOOT_LINK_OFFSET ?= 0x00800000 | |||
| 20 | CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000 | 20 | CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000 |
| 21 | CONFIG_ENTRY_OFFSET ?= 0x00001000 | 21 | CONFIG_ENTRY_OFFSET ?= 0x00001000 |
| 22 | 22 | ||
| 23 | targets := zImage vmlinux.srec uImage uImage.srec | 23 | suffix-$(CONFIG_KERNEL_GZIP) := gz |
| 24 | subdir- := compressed | 24 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 |
| 25 | suffix-$(CONFIG_KERNEL_LZMA) := lzma | ||
| 26 | |||
| 27 | targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz uImage.bz2 uImage.lzma | ||
| 28 | extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma | ||
| 29 | subdir- := compressed romimage | ||
| 25 | 30 | ||
| 26 | $(obj)/zImage: $(obj)/compressed/vmlinux FORCE | 31 | $(obj)/zImage: $(obj)/compressed/vmlinux FORCE |
| 27 | $(call if_changed,objcopy) | 32 | $(call if_changed,objcopy) |
| @@ -30,6 +35,13 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE | |||
| 30 | $(obj)/compressed/vmlinux: FORCE | 35 | $(obj)/compressed/vmlinux: FORCE |
| 31 | $(Q)$(MAKE) $(build)=$(obj)/compressed $@ | 36 | $(Q)$(MAKE) $(build)=$(obj)/compressed $@ |
| 32 | 37 | ||
| 38 | $(obj)/romImage: $(obj)/romimage/vmlinux FORCE | ||
| 39 | $(call if_changed,objcopy) | ||
| 40 | @echo ' Kernel: $@ is ready' | ||
| 41 | |||
| 42 | $(obj)/romimage/vmlinux: $(obj)/zImage FORCE | ||
| 43 | $(Q)$(MAKE) $(build)=$(obj)/romimage $@ | ||
| 44 | |||
| 33 | KERNEL_MEMORY := 0x00000000 | 45 | KERNEL_MEMORY := 0x00000000 |
| 34 | ifeq ($(CONFIG_PMB_FIXED),y) | 46 | ifeq ($(CONFIG_PMB_FIXED),y) |
| 35 | KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \ | 47 | KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \ |
| @@ -40,9 +52,6 @@ KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \ | |||
| 40 | $$[$(CONFIG_MEMORY_START)]') | 52 | $$[$(CONFIG_MEMORY_START)]') |
| 41 | endif | 53 | endif |
| 42 | 54 | ||
| 43 | export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \ | ||
| 44 | CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY | ||
| 45 | |||
| 46 | KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ | 55 | KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ |
| 47 | $$[$(CONFIG_PAGE_OFFSET) + \ | 56 | $$[$(CONFIG_PAGE_OFFSET) + \ |
| 48 | $(KERNEL_MEMORY) + \ | 57 | $(KERNEL_MEMORY) + \ |
| @@ -55,19 +64,30 @@ KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \ | |||
| 55 | 64 | ||
| 56 | quiet_cmd_uimage = UIMAGE $@ | 65 | quiet_cmd_uimage = UIMAGE $@ |
| 57 | cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \ | 66 | cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \ |
| 58 | -C gzip -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \ | 67 | -C $(2) -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \ |
| 59 | -n 'Linux-$(KERNELRELEASE)' -d $< $@ | 68 | -n 'Linux-$(KERNELRELEASE)' -d $< $@ |
| 60 | 69 | ||
| 61 | $(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE | ||
| 62 | $(call if_changed,uimage) | ||
| 63 | @echo ' Image $@ is ready' | ||
| 64 | |||
| 65 | $(obj)/vmlinux.bin: vmlinux FORCE | 70 | $(obj)/vmlinux.bin: vmlinux FORCE |
| 66 | $(call if_changed,objcopy) | 71 | $(call if_changed,objcopy) |
| 67 | 72 | ||
| 68 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE | 73 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE |
| 69 | $(call if_changed,gzip) | 74 | $(call if_changed,gzip) |
| 70 | 75 | ||
| 76 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE | ||
| 77 | $(call if_changed,bzip2) | ||
| 78 | |||
| 79 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE | ||
| 80 | $(call if_changed,lzma) | ||
| 81 | |||
| 82 | $(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2 | ||
| 83 | $(call if_changed,uimage,bzip2) | ||
| 84 | |||
| 85 | $(obj)/uImage.gz: $(obj)/vmlinux.bin.gz | ||
| 86 | $(call if_changed,uimage,gzip) | ||
| 87 | |||
| 88 | $(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma | ||
| 89 | $(call if_changed,uimage,lzma) | ||
| 90 | |||
| 71 | OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec | 91 | OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec |
| 72 | $(obj)/vmlinux.srec: $(obj)/compressed/vmlinux | 92 | $(obj)/vmlinux.srec: $(obj)/compressed/vmlinux |
| 73 | $(call if_changed,objcopy) | 93 | $(call if_changed,objcopy) |
| @@ -76,5 +96,9 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec | |||
| 76 | $(obj)/uImage.srec: $(obj)/uImage | 96 | $(obj)/uImage.srec: $(obj)/uImage |
| 77 | $(call if_changed,objcopy) | 97 | $(call if_changed,objcopy) |
| 78 | 98 | ||
| 79 | clean-files += uImage uImage.srec vmlinux.srec \ | 99 | $(obj)/uImage: $(obj)/uImage.$(suffix-y) |
| 80 | vmlinux.bin vmlinux.bin.gz | 100 | @ln -sf $(notdir $<) $@ |
| 101 | @echo ' Image $@ is ready' | ||
| 102 | |||
| 103 | export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \ | ||
| 104 | CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY suffix-y | ||
diff --git a/arch/sh/boot/compressed/.gitignore b/arch/sh/boot/compressed/.gitignore new file mode 100644 index 000000000000..2374a83d87b2 --- /dev/null +++ b/arch/sh/boot/compressed/.gitignore | |||
| @@ -0,0 +1 @@ | |||
| vmlinux.bin.* | |||
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index 9531bf1b7c2f..6182eca5180a 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile | |||
| @@ -5,9 +5,10 @@ | |||
| 5 | # | 5 | # |
| 6 | 6 | ||
| 7 | targets := vmlinux vmlinux.bin vmlinux.bin.gz \ | 7 | targets := vmlinux vmlinux.bin vmlinux.bin.gz \ |
| 8 | head_$(BITS).o misc_$(BITS).o piggy.o | 8 | vmlinux.bin.bz2 vmlinux.bin.lzma \ |
| 9 | head_$(BITS).o misc.o piggy.o | ||
| 9 | 10 | ||
| 10 | OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc_$(BITS).o $(obj)/cache.o | 11 | OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o |
| 11 | 12 | ||
| 12 | ifdef CONFIG_SH_STANDARD_BIOS | 13 | ifdef CONFIG_SH_STANDARD_BIOS |
| 13 | OBJECTS += $(obj)/../../kernel/sh_bios.o | 14 | OBJECTS += $(obj)/../../kernel/sh_bios.o |
| @@ -23,7 +24,7 @@ IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \ | |||
| 23 | 24 | ||
| 24 | LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) | 25 | LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) |
| 25 | 26 | ||
| 26 | ifeq ($(CONFIG_FUNCTION_TRACER),y) | 27 | ifeq ($(CONFIG_MCOUNT),y) |
| 27 | ORIG_CFLAGS := $(KBUILD_CFLAGS) | 28 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
| 28 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) | 29 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) |
| 29 | endif | 30 | endif |
| @@ -38,10 +39,18 @@ $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE | |||
| 38 | $(obj)/vmlinux.bin: vmlinux FORCE | 39 | $(obj)/vmlinux.bin: vmlinux FORCE |
| 39 | $(call if_changed,objcopy) | 40 | $(call if_changed,objcopy) |
| 40 | 41 | ||
| 41 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE | 42 | vmlinux.bin.all-y := $(obj)/vmlinux.bin |
| 43 | |||
| 44 | $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE | ||
| 42 | $(call if_changed,gzip) | 45 | $(call if_changed,gzip) |
| 46 | $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE | ||
| 47 | $(call if_changed,bzip2) | ||
| 48 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE | ||
| 49 | $(call if_changed,lzma) | ||
| 43 | 50 | ||
| 44 | OBJCOPYFLAGS += -R .empty_zero_page | 51 | OBJCOPYFLAGS += -R .empty_zero_page |
| 45 | 52 | ||
| 46 | $(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE | 53 | LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T |
| 47 | $(call if_changed,as_o_S) | 54 | |
| 55 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE | ||
| 56 | $(call if_changed,ld) | ||
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S index 06ac31f3be88..02a30935f0b9 100644 --- a/arch/sh/boot/compressed/head_32.S +++ b/arch/sh/boot/compressed/head_32.S | |||
| @@ -22,7 +22,7 @@ startup: | |||
| 22 | bt clear_bss | 22 | bt clear_bss |
| 23 | sub r0, r2 | 23 | sub r0, r2 |
| 24 | mov.l bss_start_addr, r0 | 24 | mov.l bss_start_addr, r0 |
| 25 | mov #0xe0, r1 | 25 | mov #0xffffffe0, r1 |
| 26 | and r1, r0 ! align cache line | 26 | and r1, r0 ! align cache line |
| 27 | mov.l text_start_addr, r3 | 27 | mov.l text_start_addr, r3 |
| 28 | mov r0, r1 | 28 | mov r0, r1 |
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c new file mode 100644 index 000000000000..fd56a71ca9d9 --- /dev/null +++ b/arch/sh/boot/compressed/misc.c | |||
| @@ -0,0 +1,149 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/boot/compressed/misc.c | ||
| 3 | * | ||
| 4 | * This is a collection of several routines from gzip-1.0.3 | ||
| 5 | * adapted for Linux. | ||
| 6 | * | ||
| 7 | * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 | ||
| 8 | * | ||
| 9 | * Adapted for SH by Stuart Menefy, Aug 1999 | ||
| 10 | * | ||
| 11 | * Modified to use standard LinuxSH BIOS by Greg Banks 7Jul2000 | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <asm/uaccess.h> | ||
| 15 | #include <asm/addrspace.h> | ||
| 16 | #include <asm/page.h> | ||
| 17 | #include <asm/sh_bios.h> | ||
| 18 | |||
| 19 | /* | ||
| 20 | * gzip declarations | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define STATIC static | ||
| 24 | |||
| 25 | #undef memset | ||
| 26 | #undef memcpy | ||
| 27 | #define memzero(s, n) memset ((s), 0, (n)) | ||
| 28 | |||
| 29 | /* cache.c */ | ||
| 30 | #define CACHE_ENABLE 0 | ||
| 31 | #define CACHE_DISABLE 1 | ||
| 32 | int cache_control(unsigned int command); | ||
| 33 | |||
| 34 | extern char input_data[]; | ||
| 35 | extern int input_len; | ||
| 36 | static unsigned char *output; | ||
| 37 | |||
| 38 | static void error(char *m); | ||
| 39 | |||
| 40 | int puts(const char *); | ||
| 41 | |||
| 42 | extern int _text; /* Defined in vmlinux.lds.S */ | ||
| 43 | extern int _end; | ||
| 44 | static unsigned long free_mem_ptr; | ||
| 45 | static unsigned long free_mem_end_ptr; | ||
| 46 | |||
| 47 | #ifdef CONFIG_HAVE_KERNEL_BZIP2 | ||
| 48 | #define HEAP_SIZE 0x400000 | ||
| 49 | #else | ||
| 50 | #define HEAP_SIZE 0x10000 | ||
| 51 | #endif | ||
| 52 | |||
| 53 | #ifdef CONFIG_KERNEL_GZIP | ||
| 54 | #include "../../../../lib/decompress_inflate.c" | ||
| 55 | #endif | ||
| 56 | |||
| 57 | #ifdef CONFIG_KERNEL_BZIP2 | ||
| 58 | #include "../../../../lib/decompress_bunzip2.c" | ||
| 59 | #endif | ||
| 60 | |||
| 61 | #ifdef CONFIG_KERNEL_LZMA | ||
| 62 | #include "../../../../lib/decompress_unlzma.c" | ||
| 63 | #endif | ||
| 64 | |||
| 65 | #ifdef CONFIG_SH_STANDARD_BIOS | ||
| 66 | size_t strlen(const char *s) | ||
| 67 | { | ||
| 68 | int i = 0; | ||
| 69 | |||
| 70 | while (*s++) | ||
| 71 | i++; | ||
| 72 | return i; | ||
| 73 | } | ||
| 74 | |||
| 75 | int puts(const char *s) | ||
| 76 | { | ||
| 77 | int len = strlen(s); | ||
| 78 | sh_bios_console_write(s, len); | ||
| 79 | return len; | ||
| 80 | } | ||
| 81 | #else | ||
| 82 | int puts(const char *s) | ||
| 83 | { | ||
| 84 | /* This should be updated to use the sh-sci routines */ | ||
| 85 | return 0; | ||
| 86 | } | ||
| 87 | #endif | ||
| 88 | |||
| 89 | void* memset(void* s, int c, size_t n) | ||
| 90 | { | ||
| 91 | int i; | ||
| 92 | char *ss = (char*)s; | ||
| 93 | |||
| 94 | for (i=0;i<n;i++) ss[i] = c; | ||
| 95 | return s; | ||
| 96 | } | ||
| 97 | |||
| 98 | void* memcpy(void* __dest, __const void* __src, | ||
| 99 | size_t __n) | ||
| 100 | { | ||
| 101 | int i; | ||
| 102 | char *d = (char *)__dest, *s = (char *)__src; | ||
| 103 | |||
| 104 | for (i=0;i<__n;i++) d[i] = s[i]; | ||
| 105 | return __dest; | ||
| 106 | } | ||
| 107 | |||
| 108 | static void error(char *x) | ||
| 109 | { | ||
| 110 | puts("\n\n"); | ||
| 111 | puts(x); | ||
| 112 | puts("\n\n -- System halted"); | ||
| 113 | |||
| 114 | while(1); /* Halt */ | ||
| 115 | } | ||
| 116 | |||
| 117 | #ifdef CONFIG_SUPERH64 | ||
| 118 | #define stackalign 8 | ||
| 119 | #else | ||
| 120 | #define stackalign 4 | ||
| 121 | #endif | ||
| 122 | |||
| 123 | #define STACK_SIZE (4096) | ||
| 124 | long __attribute__ ((aligned(stackalign))) user_stack[STACK_SIZE]; | ||
| 125 | long *stack_start = &user_stack[STACK_SIZE]; | ||
| 126 | |||
| 127 | void decompress_kernel(void) | ||
| 128 | { | ||
| 129 | unsigned long output_addr; | ||
| 130 | |||
| 131 | #ifdef CONFIG_SUPERH64 | ||
| 132 | output_addr = (CONFIG_MEMORY_START + 0x2000); | ||
| 133 | #else | ||
| 134 | output_addr = PHYSADDR((unsigned long)&_text+PAGE_SIZE); | ||
| 135 | #ifdef CONFIG_29BIT | ||
| 136 | output_addr |= P2SEG; | ||
| 137 | #endif | ||
| 138 | #endif | ||
| 139 | |||
| 140 | output = (unsigned char *)output_addr; | ||
| 141 | free_mem_ptr = (unsigned long)&_end; | ||
| 142 | free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; | ||
| 143 | |||
| 144 | puts("Uncompressing Linux... "); | ||
| 145 | cache_control(CACHE_ENABLE); | ||
| 146 | decompress(input_data, input_len, NULL, NULL, output, NULL, error); | ||
| 147 | cache_control(CACHE_DISABLE); | ||
| 148 | puts("Ok, booting the kernel.\n"); | ||
| 149 | } | ||
diff --git a/arch/sh/boot/compressed/misc_32.c b/arch/sh/boot/compressed/misc_32.c deleted file mode 100644 index efdba6b29572..000000000000 --- a/arch/sh/boot/compressed/misc_32.c +++ /dev/null | |||
| @@ -1,206 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/boot/compressed/misc.c | ||
| 3 | * | ||
| 4 | * This is a collection of several routines from gzip-1.0.3 | ||
| 5 | * adapted for Linux. | ||
| 6 | * | ||
| 7 | * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 | ||
| 8 | * | ||
| 9 | * Adapted for SH by Stuart Menefy, Aug 1999 | ||
| 10 | * | ||
| 11 | * Modified to use standard LinuxSH BIOS by Greg Banks 7Jul2000 | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <asm/uaccess.h> | ||
| 15 | #include <asm/addrspace.h> | ||
| 16 | #include <asm/page.h> | ||
| 17 | #ifdef CONFIG_SH_STANDARD_BIOS | ||
| 18 | #include <asm/sh_bios.h> | ||
| 19 | #endif | ||
| 20 | |||
| 21 | /* | ||
| 22 | * gzip declarations | ||
| 23 | */ | ||
| 24 | |||
| 25 | #define OF(args) args | ||
| 26 | #define STATIC static | ||
| 27 | |||
| 28 | #undef memset | ||
| 29 | #undef memcpy | ||
| 30 | #define memzero(s, n) memset ((s), 0, (n)) | ||
| 31 | |||
| 32 | typedef unsigned char uch; | ||
| 33 | typedef unsigned short ush; | ||
| 34 | typedef unsigned long ulg; | ||
| 35 | |||
| 36 | #define WSIZE 0x8000 /* Window size must be at least 32k, */ | ||
| 37 | /* and a power of two */ | ||
| 38 | |||
| 39 | static uch *inbuf; /* input buffer */ | ||
| 40 | static uch window[WSIZE]; /* Sliding window buffer */ | ||
| 41 | |||
| 42 | static unsigned insize = 0; /* valid bytes in inbuf */ | ||
| 43 | static unsigned inptr = 0; /* index of next byte to be processed in inbuf */ | ||
| 44 | static unsigned outcnt = 0; /* bytes in output buffer */ | ||
| 45 | |||
| 46 | /* gzip flag byte */ | ||
| 47 | #define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */ | ||
| 48 | #define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */ | ||
| 49 | #define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ | ||
| 50 | #define ORIG_NAME 0x08 /* bit 3 set: original file name present */ | ||
| 51 | #define COMMENT 0x10 /* bit 4 set: file comment present */ | ||
| 52 | #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ | ||
| 53 | #define RESERVED 0xC0 /* bit 6,7: reserved */ | ||
| 54 | |||
| 55 | #define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) | ||
| 56 | |||
| 57 | /* Diagnostic functions */ | ||
| 58 | #ifdef DEBUG | ||
| 59 | # define Assert(cond,msg) {if(!(cond)) error(msg);} | ||
| 60 | # define Trace(x) fprintf x | ||
| 61 | # define Tracev(x) {if (verbose) fprintf x ;} | ||
| 62 | # define Tracevv(x) {if (verbose>1) fprintf x ;} | ||
| 63 | # define Tracec(c,x) {if (verbose && (c)) fprintf x ;} | ||
| 64 | # define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} | ||
| 65 | #else | ||
| 66 | # define Assert(cond,msg) | ||
| 67 | # define Trace(x) | ||
| 68 | # define Tracev(x) | ||
| 69 | # define Tracevv(x) | ||
| 70 | # define Tracec(c,x) | ||
| 71 | # define Tracecv(c,x) | ||
| 72 | #endif | ||
| 73 | |||
| 74 | static int fill_inbuf(void); | ||
| 75 | static void flush_window(void); | ||
| 76 | static void error(char *m); | ||
| 77 | |||
| 78 | extern char input_data[]; | ||
| 79 | extern int input_len; | ||
| 80 | |||
| 81 | static long bytes_out = 0; | ||
| 82 | static uch *output_data; | ||
| 83 | static unsigned long output_ptr = 0; | ||
| 84 | |||
| 85 | static void error(char *m); | ||
| 86 | |||
| 87 | int puts(const char *); | ||
| 88 | |||
| 89 | extern int _text; /* Defined in vmlinux.lds.S */ | ||
| 90 | extern int _end; | ||
| 91 | static unsigned long free_mem_ptr; | ||
| 92 | static unsigned long free_mem_end_ptr; | ||
| 93 | |||
| 94 | #define HEAP_SIZE 0x10000 | ||
| 95 | |||
| 96 | #include "../../../../lib/inflate.c" | ||
| 97 | |||
| 98 | #ifdef CONFIG_SH_STANDARD_BIOS | ||
| 99 | size_t strlen(const char *s) | ||
| 100 | { | ||
| 101 | int i = 0; | ||
| 102 | |||
| 103 | while (*s++) | ||
| 104 | i++; | ||
| 105 | return i; | ||
| 106 | } | ||
| 107 | |||
| 108 | int puts(const char *s) | ||
| 109 | { | ||
| 110 | int len = strlen(s); | ||
| 111 | sh_bios_console_write(s, len); | ||
| 112 | return len; | ||
| 113 | } | ||
| 114 | #else | ||
| 115 | int puts(const char *s) | ||
| 116 | { | ||
| 117 | /* This should be updated to use the sh-sci routines */ | ||
| 118 | return 0; | ||
| 119 | } | ||
| 120 | #endif | ||
| 121 | |||
| 122 | void* memset(void* s, int c, size_t n) | ||
| 123 | { | ||
| 124 | int i; | ||
| 125 | char *ss = (char*)s; | ||
| 126 | |||
| 127 | for (i=0;i<n;i++) ss[i] = c; | ||
| 128 | return s; | ||
| 129 | } | ||
| 130 | |||
| 131 | void* memcpy(void* __dest, __const void* __src, | ||
| 132 | size_t __n) | ||
| 133 | { | ||
| 134 | int i; | ||
| 135 | char *d = (char *)__dest, *s = (char *)__src; | ||
| 136 | |||
| 137 | for (i=0;i<__n;i++) d[i] = s[i]; | ||
| 138 | return __dest; | ||
| 139 | } | ||
| 140 | |||
| 141 | /* =========================================================================== | ||
| 142 | * Fill the input buffer. This is called only when the buffer is empty | ||
| 143 | * and at least one byte is really needed. | ||
| 144 | */ | ||
| 145 | static int fill_inbuf(void) | ||
| 146 | { | ||
| 147 | if (insize != 0) { | ||
| 148 | error("ran out of input data"); | ||
| 149 | } | ||
| 150 | |||
| 151 | inbuf = input_data; | ||
| 152 | insize = input_len; | ||
| 153 | inptr = 1; | ||
| 154 | return inbuf[0]; | ||
| 155 | } | ||
| 156 | |||
| 157 | /* =========================================================================== | ||
| 158 | * Write the output window window[0..outcnt-1] and update crc and bytes_out. | ||
| 159 | * (Used for the decompressed data only.) | ||
| 160 | */ | ||
| 161 | static void flush_window(void) | ||
| 162 | { | ||
| 163 | ulg c = crc; /* temporary variable */ | ||
| 164 | unsigned n; | ||
| 165 | uch *in, *out, ch; | ||
| 166 | |||
| 167 | in = window; | ||
| 168 | out = &output_data[output_ptr]; | ||
| 169 | for (n = 0; n < outcnt; n++) { | ||
| 170 | ch = *out++ = *in++; | ||
| 171 | c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); | ||
| 172 | } | ||
| 173 | crc = c; | ||
| 174 | bytes_out += (ulg)outcnt; | ||
| 175 | output_ptr += (ulg)outcnt; | ||
| 176 | outcnt = 0; | ||
| 177 | } | ||
| 178 | |||
| 179 | static void error(char *x) | ||
| 180 | { | ||
| 181 | puts("\n\n"); | ||
| 182 | puts(x); | ||
| 183 | puts("\n\n -- System halted"); | ||
| 184 | |||
| 185 | while(1); /* Halt */ | ||
| 186 | } | ||
| 187 | |||
| 188 | #define STACK_SIZE (4096) | ||
| 189 | long user_stack [STACK_SIZE]; | ||
| 190 | long* stack_start = &user_stack[STACK_SIZE]; | ||
| 191 | |||
| 192 | void decompress_kernel(void) | ||
| 193 | { | ||
| 194 | output_data = NULL; | ||
| 195 | output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE); | ||
| 196 | #ifdef CONFIG_29BIT | ||
| 197 | output_ptr |= P2SEG; | ||
| 198 | #endif | ||
| 199 | free_mem_ptr = (unsigned long)&_end; | ||
| 200 | free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; | ||
| 201 | |||
| 202 | makecrc(); | ||
| 203 | puts("Uncompressing Linux... "); | ||
| 204 | gunzip(); | ||
| 205 | puts("Ok, booting the kernel.\n"); | ||
| 206 | } | ||
diff --git a/arch/sh/boot/compressed/misc_64.c b/arch/sh/boot/compressed/misc_64.c deleted file mode 100644 index 2941657e18aa..000000000000 --- a/arch/sh/boot/compressed/misc_64.c +++ /dev/null | |||
| @@ -1,210 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/boot/compressed/misc_64.c | ||
| 3 | * | ||
| 4 | * This is a collection of several routines from gzip-1.0.3 | ||
| 5 | * adapted for Linux. | ||
| 6 | * | ||
| 7 | * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 | ||
| 8 | * | ||
| 9 | * Adapted for SHmedia from sh by Stuart Menefy, May 2002 | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <asm/uaccess.h> | ||
| 13 | |||
| 14 | /* cache.c */ | ||
| 15 | #define CACHE_ENABLE 0 | ||
| 16 | #define CACHE_DISABLE 1 | ||
| 17 | int cache_control(unsigned int command); | ||
| 18 | |||
| 19 | /* | ||
| 20 | * gzip declarations | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define OF(args) args | ||
| 24 | #define STATIC static | ||
| 25 | |||
| 26 | #undef memset | ||
| 27 | #undef memcpy | ||
| 28 | #define memzero(s, n) memset ((s), 0, (n)) | ||
| 29 | |||
| 30 | typedef unsigned char uch; | ||
| 31 | typedef unsigned short ush; | ||
| 32 | typedef unsigned long ulg; | ||
| 33 | |||
| 34 | #define WSIZE 0x8000 /* Window size must be at least 32k, */ | ||
| 35 | /* and a power of two */ | ||
| 36 | |||
| 37 | static uch *inbuf; /* input buffer */ | ||
| 38 | static uch window[WSIZE]; /* Sliding window buffer */ | ||
| 39 | |||
| 40 | static unsigned insize = 0; /* valid bytes in inbuf */ | ||
| 41 | static unsigned inptr = 0; /* index of next byte to be processed in inbuf */ | ||
| 42 | static unsigned outcnt = 0; /* bytes in output buffer */ | ||
| 43 | |||
| 44 | /* gzip flag byte */ | ||
| 45 | #define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */ | ||
| 46 | #define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */ | ||
| 47 | #define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ | ||
| 48 | #define ORIG_NAME 0x08 /* bit 3 set: original file name present */ | ||
| 49 | #define COMMENT 0x10 /* bit 4 set: file comment present */ | ||
| 50 | #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ | ||
| 51 | #define RESERVED 0xC0 /* bit 6,7: reserved */ | ||
| 52 | |||
| 53 | #define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) | ||
| 54 | |||
| 55 | /* Diagnostic functions */ | ||
| 56 | #ifdef DEBUG | ||
| 57 | # define Assert(cond,msg) {if(!(cond)) error(msg);} | ||
| 58 | # define Trace(x) fprintf x | ||
| 59 | # define Tracev(x) {if (verbose) fprintf x ;} | ||
| 60 | # define Tracevv(x) {if (verbose>1) fprintf x ;} | ||
| 61 | # define Tracec(c,x) {if (verbose && (c)) fprintf x ;} | ||
| 62 | # define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} | ||
| 63 | #else | ||
| 64 | # define Assert(cond,msg) | ||
| 65 | # define Trace(x) | ||
| 66 | # define Tracev(x) | ||
| 67 | # define Tracevv(x) | ||
| 68 | # define Tracec(c,x) | ||
| 69 | # define Tracecv(c,x) | ||
| 70 | #endif | ||
| 71 | |||
| 72 | static int fill_inbuf(void); | ||
| 73 | static void flush_window(void); | ||
| 74 | static void error(char *m); | ||
| 75 | |||
| 76 | extern char input_data[]; | ||
| 77 | extern int input_len; | ||
| 78 | |||
| 79 | static long bytes_out = 0; | ||
| 80 | static uch *output_data; | ||
| 81 | static unsigned long output_ptr = 0; | ||
| 82 | |||
| 83 | static void error(char *m); | ||
| 84 | |||
| 85 | static void puts(const char *); | ||
| 86 | |||
| 87 | extern int _text; /* Defined in vmlinux.lds.S */ | ||
| 88 | extern int _end; | ||
| 89 | static unsigned long free_mem_ptr; | ||
| 90 | static unsigned long free_mem_end_ptr; | ||
| 91 | |||
| 92 | #define HEAP_SIZE 0x10000 | ||
| 93 | |||
| 94 | #include "../../../../lib/inflate.c" | ||
| 95 | |||
| 96 | void puts(const char *s) | ||
| 97 | { | ||
| 98 | } | ||
| 99 | |||
| 100 | void *memset(void *s, int c, size_t n) | ||
| 101 | { | ||
| 102 | int i; | ||
| 103 | char *ss = (char *) s; | ||
| 104 | |||
| 105 | for (i = 0; i < n; i++) | ||
| 106 | ss[i] = c; | ||
| 107 | return s; | ||
| 108 | } | ||
| 109 | |||
| 110 | void *memcpy(void *__dest, __const void *__src, size_t __n) | ||
| 111 | { | ||
| 112 | int i; | ||
| 113 | char *d = (char *) __dest, *s = (char *) __src; | ||
| 114 | |||
| 115 | for (i = 0; i < __n; i++) | ||
| 116 | d[i] = s[i]; | ||
| 117 | return __dest; | ||
| 118 | } | ||
| 119 | |||
| 120 | /* =========================================================================== | ||
| 121 | * Fill the input buffer. This is called only when the buffer is empty | ||
| 122 | * and at least one byte is really needed. | ||
| 123 | */ | ||
| 124 | static int fill_inbuf(void) | ||
| 125 | { | ||
| 126 | if (insize != 0) { | ||
| 127 | error("ran out of input data\n"); | ||
| 128 | } | ||
| 129 | |||
| 130 | inbuf = input_data; | ||
| 131 | insize = input_len; | ||
| 132 | inptr = 1; | ||
| 133 | return inbuf[0]; | ||
| 134 | } | ||
| 135 | |||
| 136 | /* =========================================================================== | ||
| 137 | * Write the output window window[0..outcnt-1] and update crc and bytes_out. | ||
| 138 | * (Used for the decompressed data only.) | ||
| 139 | */ | ||
| 140 | static void flush_window(void) | ||
| 141 | { | ||
| 142 | ulg c = crc; /* temporary variable */ | ||
| 143 | unsigned n; | ||
| 144 | uch *in, *out, ch; | ||
| 145 | |||
| 146 | in = window; | ||
| 147 | out = &output_data[output_ptr]; | ||
| 148 | for (n = 0; n < outcnt; n++) { | ||
| 149 | ch = *out++ = *in++; | ||
| 150 | c = crc_32_tab[((int) c ^ ch) & 0xff] ^ (c >> 8); | ||
| 151 | } | ||
| 152 | crc = c; | ||
| 153 | bytes_out += (ulg) outcnt; | ||
| 154 | output_ptr += (ulg) outcnt; | ||
| 155 | outcnt = 0; | ||
| 156 | puts("."); | ||
| 157 | } | ||
| 158 | |||
| 159 | static void error(char *x) | ||
| 160 | { | ||
| 161 | puts("\n\n"); | ||
| 162 | puts(x); | ||
| 163 | puts("\n\n -- System halted"); | ||
| 164 | |||
| 165 | while (1) ; /* Halt */ | ||
| 166 | } | ||
| 167 | |||
| 168 | #define STACK_SIZE (4096) | ||
| 169 | long __attribute__ ((aligned(8))) user_stack[STACK_SIZE]; | ||
| 170 | long *stack_start = &user_stack[STACK_SIZE]; | ||
| 171 | |||
| 172 | void decompress_kernel(void) | ||
| 173 | { | ||
| 174 | output_data = (uch *) (CONFIG_MEMORY_START + 0x2000); | ||
| 175 | free_mem_ptr = (unsigned long) &_end; | ||
| 176 | free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; | ||
| 177 | |||
| 178 | makecrc(); | ||
| 179 | puts("Uncompressing Linux... "); | ||
| 180 | cache_control(CACHE_ENABLE); | ||
| 181 | gunzip(); | ||
| 182 | puts("\n"); | ||
| 183 | |||
| 184 | #if 0 | ||
| 185 | /* When booting from ROM may want to do something like this if the | ||
| 186 | * boot loader doesn't. | ||
| 187 | */ | ||
| 188 | |||
| 189 | /* Set up the parameters and command line */ | ||
| 190 | { | ||
| 191 | volatile unsigned int *parambase = | ||
| 192 | (int *) (CONFIG_MEMORY_START + 0x1000); | ||
| 193 | |||
| 194 | parambase[0] = 0x1; /* MOUNT_ROOT_RDONLY */ | ||
| 195 | parambase[1] = 0x0; /* RAMDISK_FLAGS */ | ||
| 196 | parambase[2] = 0x0200; /* ORIG_ROOT_DEV */ | ||
| 197 | parambase[3] = 0x0; /* LOADER_TYPE */ | ||
| 198 | parambase[4] = 0x0; /* INITRD_START */ | ||
| 199 | parambase[5] = 0x0; /* INITRD_SIZE */ | ||
| 200 | parambase[6] = 0; | ||
| 201 | |||
| 202 | strcpy((char *) ((int) parambase + 0x100), | ||
| 203 | "console=ttySC0,38400"); | ||
| 204 | } | ||
| 205 | #endif | ||
| 206 | |||
| 207 | puts("Ok, booting the kernel.\n"); | ||
| 208 | |||
| 209 | cache_control(CACHE_DISABLE); | ||
| 210 | } | ||
diff --git a/arch/sh/boot/compressed/piggy.S b/arch/sh/boot/compressed/piggy.S deleted file mode 100644 index 566071926b13..000000000000 --- a/arch/sh/boot/compressed/piggy.S +++ /dev/null | |||
| @@ -1,8 +0,0 @@ | |||
| 1 | .global input_len, input_data | ||
| 2 | .data | ||
| 3 | input_len: | ||
| 4 | .long input_data_end - input_data | ||
| 5 | input_data: | ||
| 6 | .incbin "arch/sh/boot/compressed/vmlinux.bin.gz" | ||
| 7 | input_data_end: | ||
| 8 | .end | ||
diff --git a/arch/sh/boot/compressed/vmlinux.scr b/arch/sh/boot/compressed/vmlinux.scr new file mode 100644 index 000000000000..f02382ae5c48 --- /dev/null +++ b/arch/sh/boot/compressed/vmlinux.scr | |||
| @@ -0,0 +1,10 @@ | |||
| 1 | SECTIONS | ||
| 2 | { | ||
| 3 | .rodata.compressed : { | ||
| 4 | input_len = .; | ||
| 5 | LONG(input_data_end - input_data) input_data = .; | ||
| 6 | *(.data) | ||
| 7 | output_len = . - 4; | ||
| 8 | input_data_end = .; | ||
| 9 | } | ||
| 10 | } | ||
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile new file mode 100644 index 000000000000..5806eee84f6f --- /dev/null +++ b/arch/sh/boot/romimage/Makefile | |||
| @@ -0,0 +1,19 @@ | |||
| 1 | # | ||
| 2 | # linux/arch/sh/boot/romimage/Makefile | ||
| 3 | # | ||
| 4 | # create an image suitable for burning to flash from zImage | ||
| 5 | # | ||
| 6 | |||
| 7 | targets := vmlinux head.o | ||
| 8 | |||
| 9 | OBJECTS = $(obj)/head.o | ||
| 10 | LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart | ||
| 11 | |||
| 12 | $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE | ||
| 13 | $(call if_changed,ld) | ||
| 14 | @: | ||
| 15 | |||
| 16 | LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T | ||
| 17 | |||
| 18 | $(obj)/piggy.o: $(obj)/vmlinux.scr arch/sh/boot/zImage FORCE | ||
| 19 | $(call if_changed,ld) | ||
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S new file mode 100644 index 000000000000..219bc626dd71 --- /dev/null +++ b/arch/sh/boot/romimage/head.S | |||
| @@ -0,0 +1,10 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/sh/boot/romimage/head.S | ||
| 3 | * | ||
| 4 | * Board specific setup code, executed before zImage loader | ||
| 5 | */ | ||
| 6 | |||
| 7 | .text | ||
| 8 | .global romstart | ||
| 9 | romstart: | ||
| 10 | #include <mach/romimage.h> | ||
diff --git a/arch/sh/boot/romimage/vmlinux.scr b/arch/sh/boot/romimage/vmlinux.scr new file mode 100644 index 000000000000..287c08f8b4bb --- /dev/null +++ b/arch/sh/boot/romimage/vmlinux.scr | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | SECTIONS | ||
| 2 | { | ||
| 3 | .text : { | ||
| 4 | *(.data) | ||
| 5 | } | ||
| 6 | } | ||
diff --git a/arch/sh/configs/ecovec24-romimage_defconfig b/arch/sh/configs/ecovec24-romimage_defconfig new file mode 100644 index 000000000000..9a22c64775be --- /dev/null +++ b/arch/sh/configs/ecovec24-romimage_defconfig | |||
| @@ -0,0 +1,1032 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.31-rc7 | ||
| 4 | # Tue Sep 8 13:56:18 2009 | ||
| 5 | # | ||
| 6 | CONFIG_SUPERH=y | ||
| 7 | CONFIG_SUPERH32=y | ||
| 8 | # CONFIG_SUPERH64 is not set | ||
| 9 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
| 10 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 11 | CONFIG_GENERIC_BUG=y | ||
| 12 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 13 | CONFIG_GENERIC_HWEIGHT=y | ||
| 14 | CONFIG_GENERIC_HARDIRQS=y | ||
| 15 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 16 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 17 | CONFIG_IRQ_PER_CPU=y | ||
| 18 | CONFIG_GENERIC_GPIO=y | ||
| 19 | CONFIG_GENERIC_TIME=y | ||
| 20 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 21 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 22 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 23 | CONFIG_SYS_SUPPORTS_CMT=y | ||
| 24 | CONFIG_SYS_SUPPORTS_TMU=y | ||
| 25 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 26 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 27 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 28 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 29 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 30 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 31 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | ||
| 32 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
| 33 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 34 | CONFIG_CONSTRUCTORS=y | ||
| 35 | |||
| 36 | # | ||
| 37 | # General setup | ||
| 38 | # | ||
| 39 | CONFIG_EXPERIMENTAL=y | ||
| 40 | CONFIG_BROKEN_ON_SMP=y | ||
| 41 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 42 | CONFIG_LOCALVERSION="" | ||
| 43 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 44 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 45 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
| 46 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 47 | CONFIG_KERNEL_GZIP=y | ||
| 48 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 49 | # CONFIG_KERNEL_LZMA is not set | ||
| 50 | CONFIG_SWAP=y | ||
| 51 | CONFIG_SYSVIPC=y | ||
| 52 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 53 | # CONFIG_POSIX_MQUEUE is not set | ||
| 54 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 55 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 56 | # CONFIG_TASKSTATS is not set | ||
| 57 | # CONFIG_AUDIT is not set | ||
| 58 | |||
| 59 | # | ||
| 60 | # RCU Subsystem | ||
| 61 | # | ||
| 62 | CONFIG_CLASSIC_RCU=y | ||
| 63 | # CONFIG_TREE_RCU is not set | ||
| 64 | # CONFIG_PREEMPT_RCU is not set | ||
| 65 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 66 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 67 | CONFIG_IKCONFIG=y | ||
| 68 | CONFIG_IKCONFIG_PROC=y | ||
| 69 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 70 | CONFIG_GROUP_SCHED=y | ||
| 71 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 72 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 73 | CONFIG_USER_SCHED=y | ||
| 74 | # CONFIG_CGROUP_SCHED is not set | ||
| 75 | # CONFIG_CGROUPS is not set | ||
| 76 | CONFIG_SYSFS_DEPRECATED=y | ||
| 77 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 78 | # CONFIG_RELAY is not set | ||
| 79 | # CONFIG_NAMESPACES is not set | ||
| 80 | CONFIG_BLK_DEV_INITRD=y | ||
| 81 | CONFIG_INITRAMFS_SOURCE="" | ||
| 82 | CONFIG_INITRAMFS_ROOT_UID=0 | ||
| 83 | CONFIG_INITRAMFS_ROOT_GID=0 | ||
| 84 | CONFIG_RD_GZIP=y | ||
| 85 | # CONFIG_RD_BZIP2 is not set | ||
| 86 | # CONFIG_RD_LZMA is not set | ||
| 87 | CONFIG_INITRAMFS_COMPRESSION_NONE=y | ||
| 88 | # CONFIG_INITRAMFS_COMPRESSION_GZIP is not set | ||
| 89 | # CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set | ||
| 90 | # CONFIG_INITRAMFS_COMPRESSION_LZMA is not set | ||
| 91 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 92 | CONFIG_SYSCTL=y | ||
| 93 | CONFIG_ANON_INODES=y | ||
| 94 | CONFIG_EMBEDDED=y | ||
| 95 | CONFIG_UID16=y | ||
| 96 | CONFIG_SYSCTL_SYSCALL=y | ||
| 97 | # CONFIG_KALLSYMS is not set | ||
| 98 | CONFIG_HOTPLUG=y | ||
| 99 | CONFIG_PRINTK=y | ||
| 100 | CONFIG_BUG=y | ||
| 101 | CONFIG_ELF_CORE=y | ||
| 102 | CONFIG_BASE_FULL=y | ||
| 103 | CONFIG_FUTEX=y | ||
| 104 | CONFIG_EPOLL=y | ||
| 105 | CONFIG_SIGNALFD=y | ||
| 106 | CONFIG_TIMERFD=y | ||
| 107 | CONFIG_EVENTFD=y | ||
| 108 | CONFIG_SHMEM=y | ||
| 109 | CONFIG_AIO=y | ||
| 110 | CONFIG_HAVE_PERF_COUNTERS=y | ||
| 111 | |||
| 112 | # | ||
| 113 | # Performance Counters | ||
| 114 | # | ||
| 115 | # CONFIG_PERF_COUNTERS is not set | ||
| 116 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 117 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 118 | CONFIG_COMPAT_BRK=y | ||
| 119 | CONFIG_SLAB=y | ||
| 120 | # CONFIG_SLUB is not set | ||
| 121 | # CONFIG_SLOB is not set | ||
| 122 | # CONFIG_PROFILING is not set | ||
| 123 | # CONFIG_MARKERS is not set | ||
| 124 | CONFIG_HAVE_OPROFILE=y | ||
| 125 | CONFIG_HAVE_IOREMAP_PROT=y | ||
| 126 | CONFIG_HAVE_KPROBES=y | ||
| 127 | CONFIG_HAVE_KRETPROBES=y | ||
| 128 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 129 | CONFIG_HAVE_CLK=y | ||
| 130 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
| 131 | |||
| 132 | # | ||
| 133 | # GCOV-based kernel profiling | ||
| 134 | # | ||
| 135 | # CONFIG_GCOV_KERNEL is not set | ||
| 136 | # CONFIG_SLOW_WORK is not set | ||
| 137 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 138 | CONFIG_SLABINFO=y | ||
| 139 | CONFIG_RT_MUTEXES=y | ||
| 140 | CONFIG_BASE_SMALL=0 | ||
| 141 | # CONFIG_MODULES is not set | ||
| 142 | CONFIG_BLOCK=y | ||
| 143 | # CONFIG_LBDAF is not set | ||
| 144 | # CONFIG_BLK_DEV_BSG is not set | ||
| 145 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 146 | |||
| 147 | # | ||
| 148 | # IO Schedulers | ||
| 149 | # | ||
| 150 | CONFIG_IOSCHED_NOOP=y | ||
| 151 | CONFIG_IOSCHED_AS=y | ||
| 152 | CONFIG_IOSCHED_DEADLINE=y | ||
| 153 | CONFIG_IOSCHED_CFQ=y | ||
| 154 | # CONFIG_DEFAULT_AS is not set | ||
| 155 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 156 | CONFIG_DEFAULT_CFQ=y | ||
| 157 | # CONFIG_DEFAULT_NOOP is not set | ||
| 158 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 159 | # CONFIG_FREEZER is not set | ||
| 160 | |||
| 161 | # | ||
| 162 | # System type | ||
| 163 | # | ||
| 164 | CONFIG_CPU_SH4=y | ||
| 165 | CONFIG_CPU_SH4A=y | ||
| 166 | CONFIG_CPU_SHX2=y | ||
| 167 | CONFIG_ARCH_SHMOBILE=y | ||
| 168 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
| 169 | # CONFIG_CPU_SUBTYPE_SH7201 is not set | ||
| 170 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
| 171 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
| 172 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
| 173 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
| 174 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | ||
| 175 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
| 176 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
| 177 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
| 178 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
| 179 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
| 180 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
| 181 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
| 182 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
| 183 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
| 184 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
| 185 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
| 186 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
| 187 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
| 188 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
| 189 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
| 190 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
| 191 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
| 192 | CONFIG_CPU_SUBTYPE_SH7724=y | ||
| 193 | # CONFIG_CPU_SUBTYPE_SH7757 is not set | ||
| 194 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
| 195 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
| 196 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
| 197 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
| 198 | # CONFIG_CPU_SUBTYPE_SH7786 is not set | ||
| 199 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
| 200 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
| 201 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
| 202 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | ||
| 203 | |||
| 204 | # | ||
| 205 | # Memory management options | ||
| 206 | # | ||
| 207 | CONFIG_QUICKLIST=y | ||
| 208 | CONFIG_MMU=y | ||
| 209 | CONFIG_PAGE_OFFSET=0x80000000 | ||
| 210 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
| 211 | CONFIG_MEMORY_START=0x08000000 | ||
| 212 | CONFIG_MEMORY_SIZE=0x08000000 | ||
| 213 | CONFIG_29BIT=y | ||
| 214 | # CONFIG_X2TLB is not set | ||
| 215 | CONFIG_VSYSCALL=y | ||
| 216 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 217 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 218 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 219 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
| 220 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 221 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 222 | CONFIG_PAGE_SIZE_4KB=y | ||
| 223 | # CONFIG_PAGE_SIZE_8KB is not set | ||
| 224 | # CONFIG_PAGE_SIZE_16KB is not set | ||
| 225 | # CONFIG_PAGE_SIZE_64KB is not set | ||
| 226 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 227 | CONFIG_FLATMEM_MANUAL=y | ||
| 228 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 229 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 230 | CONFIG_FLATMEM=y | ||
| 231 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 232 | CONFIG_SPARSEMEM_STATIC=y | ||
| 233 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 234 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 235 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 236 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 237 | CONFIG_NR_QUICK=2 | ||
| 238 | CONFIG_HAVE_MLOCK=y | ||
| 239 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 240 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 241 | |||
| 242 | # | ||
| 243 | # Cache configuration | ||
| 244 | # | ||
| 245 | CONFIG_CACHE_WRITEBACK=y | ||
| 246 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
| 247 | # CONFIG_CACHE_OFF is not set | ||
| 248 | |||
| 249 | # | ||
| 250 | # Processor features | ||
| 251 | # | ||
| 252 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
| 253 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
| 254 | CONFIG_SH_FPU=y | ||
| 255 | # CONFIG_SH_STORE_QUEUES is not set | ||
| 256 | CONFIG_CPU_HAS_INTEVT=y | ||
| 257 | CONFIG_CPU_HAS_SR_RB=y | ||
| 258 | CONFIG_CPU_HAS_FPU=y | ||
| 259 | |||
| 260 | # | ||
| 261 | # Board support | ||
| 262 | # | ||
| 263 | # CONFIG_SH_7724_SOLUTION_ENGINE is not set | ||
| 264 | # CONFIG_SH_KFR2R09 is not set | ||
| 265 | CONFIG_SH_ECOVEC=y | ||
| 266 | |||
| 267 | # | ||
| 268 | # Timer and clock configuration | ||
| 269 | # | ||
| 270 | # CONFIG_SH_TIMER_TMU is not set | ||
| 271 | CONFIG_SH_TIMER_CMT=y | ||
| 272 | CONFIG_SH_PCLK_FREQ=33333333 | ||
| 273 | CONFIG_SH_CLK_CPG=y | ||
| 274 | # CONFIG_NO_HZ is not set | ||
| 275 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 276 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 277 | |||
| 278 | # | ||
| 279 | # CPU Frequency scaling | ||
| 280 | # | ||
| 281 | # CONFIG_CPU_FREQ is not set | ||
| 282 | |||
| 283 | # | ||
| 284 | # DMA support | ||
| 285 | # | ||
| 286 | # CONFIG_SH_DMA is not set | ||
| 287 | |||
| 288 | # | ||
| 289 | # Companion Chips | ||
| 290 | # | ||
| 291 | |||
| 292 | # | ||
| 293 | # Additional SuperH Device Drivers | ||
| 294 | # | ||
| 295 | # CONFIG_HEARTBEAT is not set | ||
| 296 | # CONFIG_PUSH_SWITCH is not set | ||
| 297 | |||
| 298 | # | ||
| 299 | # Kernel features | ||
| 300 | # | ||
| 301 | # CONFIG_HZ_100 is not set | ||
| 302 | CONFIG_HZ_250=y | ||
| 303 | # CONFIG_HZ_300 is not set | ||
| 304 | # CONFIG_HZ_1000 is not set | ||
| 305 | CONFIG_HZ=250 | ||
| 306 | # CONFIG_SCHED_HRTICK is not set | ||
| 307 | CONFIG_KEXEC=y | ||
| 308 | # CONFIG_CRASH_DUMP is not set | ||
| 309 | # CONFIG_SECCOMP is not set | ||
| 310 | CONFIG_PREEMPT_NONE=y | ||
| 311 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 312 | # CONFIG_PREEMPT is not set | ||
| 313 | CONFIG_GUSA=y | ||
| 314 | # CONFIG_SPARSE_IRQ is not set | ||
| 315 | |||
| 316 | # | ||
| 317 | # Boot options | ||
| 318 | # | ||
| 319 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
| 320 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
| 321 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
| 322 | CONFIG_CMDLINE_BOOL=y | ||
| 323 | CONFIG_CMDLINE="console=ttySC0,115200" | ||
| 324 | |||
| 325 | # | ||
| 326 | # Bus options | ||
| 327 | # | ||
| 328 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 329 | # CONFIG_PCCARD is not set | ||
| 330 | |||
| 331 | # | ||
| 332 | # Executable file formats | ||
| 333 | # | ||
| 334 | CONFIG_BINFMT_ELF=y | ||
| 335 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 336 | # CONFIG_HAVE_AOUT is not set | ||
| 337 | # CONFIG_BINFMT_MISC is not set | ||
| 338 | |||
| 339 | # | ||
| 340 | # Power management options (EXPERIMENTAL) | ||
| 341 | # | ||
| 342 | CONFIG_PM=y | ||
| 343 | # CONFIG_PM_DEBUG is not set | ||
| 344 | # CONFIG_SUSPEND is not set | ||
| 345 | # CONFIG_HIBERNATION is not set | ||
| 346 | CONFIG_PM_RUNTIME=y | ||
| 347 | # CONFIG_CPU_IDLE is not set | ||
| 348 | CONFIG_NET=y | ||
| 349 | |||
| 350 | # | ||
| 351 | # Networking options | ||
| 352 | # | ||
| 353 | CONFIG_PACKET=y | ||
| 354 | CONFIG_PACKET_MMAP=y | ||
| 355 | CONFIG_UNIX=y | ||
| 356 | # CONFIG_NET_KEY is not set | ||
| 357 | CONFIG_INET=y | ||
| 358 | # CONFIG_IP_MULTICAST is not set | ||
| 359 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 360 | CONFIG_IP_FIB_HASH=y | ||
| 361 | # CONFIG_IP_PNP is not set | ||
| 362 | # CONFIG_NET_IPIP is not set | ||
| 363 | # CONFIG_NET_IPGRE is not set | ||
| 364 | # CONFIG_ARPD is not set | ||
| 365 | # CONFIG_SYN_COOKIES is not set | ||
| 366 | # CONFIG_INET_AH is not set | ||
| 367 | # CONFIG_INET_ESP is not set | ||
| 368 | # CONFIG_INET_IPCOMP is not set | ||
| 369 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 370 | # CONFIG_INET_TUNNEL is not set | ||
| 371 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 372 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 373 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 374 | # CONFIG_INET_LRO is not set | ||
| 375 | # CONFIG_INET_DIAG is not set | ||
| 376 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 377 | CONFIG_TCP_CONG_CUBIC=y | ||
| 378 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 379 | # CONFIG_TCP_MD5SIG is not set | ||
| 380 | # CONFIG_IPV6 is not set | ||
| 381 | # CONFIG_NETWORK_SECMARK is not set | ||
| 382 | # CONFIG_NETFILTER is not set | ||
| 383 | # CONFIG_IP_DCCP is not set | ||
| 384 | # CONFIG_IP_SCTP is not set | ||
| 385 | # CONFIG_TIPC is not set | ||
| 386 | # CONFIG_ATM is not set | ||
| 387 | # CONFIG_BRIDGE is not set | ||
| 388 | # CONFIG_NET_DSA is not set | ||
| 389 | # CONFIG_VLAN_8021Q is not set | ||
| 390 | # CONFIG_DECNET is not set | ||
| 391 | # CONFIG_LLC2 is not set | ||
| 392 | # CONFIG_IPX is not set | ||
| 393 | # CONFIG_ATALK is not set | ||
| 394 | # CONFIG_X25 is not set | ||
| 395 | # CONFIG_LAPB is not set | ||
| 396 | # CONFIG_ECONET is not set | ||
| 397 | # CONFIG_WAN_ROUTER is not set | ||
| 398 | # CONFIG_PHONET is not set | ||
| 399 | # CONFIG_IEEE802154 is not set | ||
| 400 | # CONFIG_NET_SCHED is not set | ||
| 401 | # CONFIG_DCB is not set | ||
| 402 | |||
| 403 | # | ||
| 404 | # Network testing | ||
| 405 | # | ||
| 406 | # CONFIG_NET_PKTGEN is not set | ||
| 407 | # CONFIG_HAMRADIO is not set | ||
| 408 | # CONFIG_CAN is not set | ||
| 409 | # CONFIG_IRDA is not set | ||
| 410 | # CONFIG_BT is not set | ||
| 411 | # CONFIG_AF_RXRPC is not set | ||
| 412 | # CONFIG_WIRELESS is not set | ||
| 413 | # CONFIG_WIMAX is not set | ||
| 414 | # CONFIG_RFKILL is not set | ||
| 415 | # CONFIG_NET_9P is not set | ||
| 416 | |||
| 417 | # | ||
| 418 | # Device Drivers | ||
| 419 | # | ||
| 420 | |||
| 421 | # | ||
| 422 | # Generic Driver Options | ||
| 423 | # | ||
| 424 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 425 | CONFIG_STANDALONE=y | ||
| 426 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 427 | CONFIG_FW_LOADER=y | ||
| 428 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 429 | CONFIG_EXTRA_FIRMWARE="" | ||
| 430 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 431 | # CONFIG_CONNECTOR is not set | ||
| 432 | # CONFIG_MTD is not set | ||
| 433 | # CONFIG_PARPORT is not set | ||
| 434 | CONFIG_BLK_DEV=y | ||
| 435 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 436 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 437 | # CONFIG_BLK_DEV_NBD is not set | ||
| 438 | # CONFIG_BLK_DEV_UB is not set | ||
| 439 | # CONFIG_BLK_DEV_RAM is not set | ||
| 440 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 441 | # CONFIG_ATA_OVER_ETH is not set | ||
| 442 | # CONFIG_BLK_DEV_HD is not set | ||
| 443 | # CONFIG_MISC_DEVICES is not set | ||
| 444 | CONFIG_HAVE_IDE=y | ||
| 445 | # CONFIG_IDE is not set | ||
| 446 | |||
| 447 | # | ||
| 448 | # SCSI device support | ||
| 449 | # | ||
| 450 | # CONFIG_RAID_ATTRS is not set | ||
| 451 | CONFIG_SCSI=y | ||
| 452 | CONFIG_SCSI_DMA=y | ||
| 453 | # CONFIG_SCSI_TGT is not set | ||
| 454 | # CONFIG_SCSI_NETLINK is not set | ||
| 455 | CONFIG_SCSI_PROC_FS=y | ||
| 456 | |||
| 457 | # | ||
| 458 | # SCSI support type (disk, tape, CD-ROM) | ||
| 459 | # | ||
| 460 | CONFIG_BLK_DEV_SD=y | ||
| 461 | # CONFIG_CHR_DEV_ST is not set | ||
| 462 | # CONFIG_CHR_DEV_OSST is not set | ||
| 463 | # CONFIG_BLK_DEV_SR is not set | ||
| 464 | # CONFIG_CHR_DEV_SG is not set | ||
| 465 | # CONFIG_CHR_DEV_SCH is not set | ||
| 466 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 467 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 468 | # CONFIG_SCSI_LOGGING is not set | ||
| 469 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 470 | |||
| 471 | # | ||
| 472 | # SCSI Transports | ||
| 473 | # | ||
| 474 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 475 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 476 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 477 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 478 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 479 | # CONFIG_SCSI_LOWLEVEL is not set | ||
| 480 | # CONFIG_SCSI_DH is not set | ||
| 481 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 482 | # CONFIG_ATA is not set | ||
| 483 | # CONFIG_MD is not set | ||
| 484 | CONFIG_NETDEVICES=y | ||
| 485 | # CONFIG_DUMMY is not set | ||
| 486 | # CONFIG_BONDING is not set | ||
| 487 | # CONFIG_MACVLAN is not set | ||
| 488 | # CONFIG_EQUALIZER is not set | ||
| 489 | # CONFIG_TUN is not set | ||
| 490 | # CONFIG_VETH is not set | ||
| 491 | CONFIG_PHYLIB=y | ||
| 492 | |||
| 493 | # | ||
| 494 | # MII PHY device drivers | ||
| 495 | # | ||
| 496 | # CONFIG_MARVELL_PHY is not set | ||
| 497 | # CONFIG_DAVICOM_PHY is not set | ||
| 498 | # CONFIG_QSEMI_PHY is not set | ||
| 499 | # CONFIG_LXT_PHY is not set | ||
| 500 | # CONFIG_CICADA_PHY is not set | ||
| 501 | # CONFIG_VITESSE_PHY is not set | ||
| 502 | # CONFIG_SMSC_PHY is not set | ||
| 503 | # CONFIG_BROADCOM_PHY is not set | ||
| 504 | # CONFIG_ICPLUS_PHY is not set | ||
| 505 | # CONFIG_REALTEK_PHY is not set | ||
| 506 | # CONFIG_NATIONAL_PHY is not set | ||
| 507 | # CONFIG_STE10XP is not set | ||
| 508 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 509 | # CONFIG_FIXED_PHY is not set | ||
| 510 | CONFIG_MDIO_BITBANG=y | ||
| 511 | # CONFIG_MDIO_GPIO is not set | ||
| 512 | CONFIG_NET_ETHERNET=y | ||
| 513 | CONFIG_MII=y | ||
| 514 | # CONFIG_AX88796 is not set | ||
| 515 | # CONFIG_STNIC is not set | ||
| 516 | CONFIG_SH_ETH=y | ||
| 517 | # CONFIG_SMC91X is not set | ||
| 518 | # CONFIG_ETHOC is not set | ||
| 519 | # CONFIG_SMC911X is not set | ||
| 520 | # CONFIG_SMSC911X is not set | ||
| 521 | # CONFIG_DNET is not set | ||
| 522 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 523 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 524 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 525 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 526 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 527 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 528 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 529 | # CONFIG_B44 is not set | ||
| 530 | # CONFIG_KS8842 is not set | ||
| 531 | # CONFIG_NETDEV_1000 is not set | ||
| 532 | # CONFIG_NETDEV_10000 is not set | ||
| 533 | |||
| 534 | # | ||
| 535 | # Wireless LAN | ||
| 536 | # | ||
| 537 | # CONFIG_WLAN_PRE80211 is not set | ||
| 538 | # CONFIG_WLAN_80211 is not set | ||
| 539 | |||
| 540 | # | ||
| 541 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 542 | # | ||
| 543 | |||
| 544 | # | ||
| 545 | # USB Network Adapters | ||
| 546 | # | ||
| 547 | # CONFIG_USB_CATC is not set | ||
| 548 | # CONFIG_USB_KAWETH is not set | ||
| 549 | # CONFIG_USB_PEGASUS is not set | ||
| 550 | # CONFIG_USB_RTL8150 is not set | ||
| 551 | # CONFIG_USB_USBNET is not set | ||
| 552 | # CONFIG_WAN is not set | ||
| 553 | # CONFIG_PPP is not set | ||
| 554 | # CONFIG_SLIP is not set | ||
| 555 | # CONFIG_NETCONSOLE is not set | ||
| 556 | # CONFIG_NETPOLL is not set | ||
| 557 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 558 | # CONFIG_ISDN is not set | ||
| 559 | # CONFIG_PHONE is not set | ||
| 560 | |||
| 561 | # | ||
| 562 | # Input device support | ||
| 563 | # | ||
| 564 | CONFIG_INPUT=y | ||
| 565 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 566 | # CONFIG_INPUT_POLLDEV is not set | ||
| 567 | |||
| 568 | # | ||
| 569 | # Userland interfaces | ||
| 570 | # | ||
| 571 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 572 | # CONFIG_INPUT_JOYDEV is not set | ||
| 573 | # CONFIG_INPUT_EVDEV is not set | ||
| 574 | # CONFIG_INPUT_EVBUG is not set | ||
| 575 | |||
| 576 | # | ||
| 577 | # Input Device Drivers | ||
| 578 | # | ||
| 579 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 580 | # CONFIG_INPUT_MOUSE is not set | ||
| 581 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 582 | # CONFIG_INPUT_TABLET is not set | ||
| 583 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 584 | # CONFIG_INPUT_MISC is not set | ||
| 585 | |||
| 586 | # | ||
| 587 | # Hardware I/O ports | ||
| 588 | # | ||
| 589 | # CONFIG_SERIO is not set | ||
| 590 | # CONFIG_GAMEPORT is not set | ||
| 591 | |||
| 592 | # | ||
| 593 | # Character devices | ||
| 594 | # | ||
| 595 | CONFIG_VT=y | ||
| 596 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 597 | CONFIG_VT_CONSOLE=y | ||
| 598 | CONFIG_HW_CONSOLE=y | ||
| 599 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 600 | CONFIG_DEVKMEM=y | ||
| 601 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 602 | |||
| 603 | # | ||
| 604 | # Serial drivers | ||
| 605 | # | ||
| 606 | # CONFIG_SERIAL_8250 is not set | ||
| 607 | |||
| 608 | # | ||
| 609 | # Non-8250 serial port support | ||
| 610 | # | ||
| 611 | CONFIG_SERIAL_SH_SCI=y | ||
| 612 | CONFIG_SERIAL_SH_SCI_NR_UARTS=6 | ||
| 613 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
| 614 | CONFIG_SERIAL_CORE=y | ||
| 615 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 616 | CONFIG_UNIX98_PTYS=y | ||
| 617 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 618 | CONFIG_LEGACY_PTYS=y | ||
| 619 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 620 | # CONFIG_IPMI_HANDLER is not set | ||
| 621 | CONFIG_HW_RANDOM=y | ||
| 622 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 623 | # CONFIG_R3964 is not set | ||
| 624 | # CONFIG_RAW_DRIVER is not set | ||
| 625 | # CONFIG_TCG_TPM is not set | ||
| 626 | CONFIG_I2C=y | ||
| 627 | CONFIG_I2C_BOARDINFO=y | ||
| 628 | # CONFIG_I2C_CHARDEV is not set | ||
| 629 | CONFIG_I2C_HELPER_AUTO=y | ||
| 630 | |||
| 631 | # | ||
| 632 | # I2C Hardware Bus support | ||
| 633 | # | ||
| 634 | |||
| 635 | # | ||
| 636 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 637 | # | ||
| 638 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 639 | # CONFIG_I2C_GPIO is not set | ||
| 640 | # CONFIG_I2C_OCORES is not set | ||
| 641 | CONFIG_I2C_SH_MOBILE=y | ||
| 642 | # CONFIG_I2C_SIMTEC is not set | ||
| 643 | |||
| 644 | # | ||
| 645 | # External I2C/SMBus adapter drivers | ||
| 646 | # | ||
| 647 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 648 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 649 | # CONFIG_I2C_TINY_USB is not set | ||
| 650 | |||
| 651 | # | ||
| 652 | # Other I2C/SMBus bus drivers | ||
| 653 | # | ||
| 654 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 655 | |||
| 656 | # | ||
| 657 | # Miscellaneous I2C Chip support | ||
| 658 | # | ||
| 659 | # CONFIG_DS1682 is not set | ||
| 660 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 661 | # CONFIG_PCF8575 is not set | ||
| 662 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 663 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 664 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 665 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 666 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 667 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 668 | # CONFIG_SPI is not set | ||
| 669 | |||
| 670 | # | ||
| 671 | # PPS support | ||
| 672 | # | ||
| 673 | # CONFIG_PPS is not set | ||
| 674 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 675 | CONFIG_GPIOLIB=y | ||
| 676 | CONFIG_GPIO_SYSFS=y | ||
| 677 | |||
| 678 | # | ||
| 679 | # Memory mapped GPIO expanders: | ||
| 680 | # | ||
| 681 | |||
| 682 | # | ||
| 683 | # I2C GPIO expanders: | ||
| 684 | # | ||
| 685 | # CONFIG_GPIO_MAX732X is not set | ||
| 686 | # CONFIG_GPIO_PCA953X is not set | ||
| 687 | # CONFIG_GPIO_PCF857X is not set | ||
| 688 | |||
| 689 | # | ||
| 690 | # PCI GPIO expanders: | ||
| 691 | # | ||
| 692 | |||
| 693 | # | ||
| 694 | # SPI GPIO expanders: | ||
| 695 | # | ||
| 696 | # CONFIG_W1 is not set | ||
| 697 | # CONFIG_POWER_SUPPLY is not set | ||
| 698 | # CONFIG_HWMON is not set | ||
| 699 | # CONFIG_THERMAL is not set | ||
| 700 | # CONFIG_THERMAL_HWMON is not set | ||
| 701 | # CONFIG_WATCHDOG is not set | ||
| 702 | CONFIG_SSB_POSSIBLE=y | ||
| 703 | |||
| 704 | # | ||
| 705 | # Sonics Silicon Backplane | ||
| 706 | # | ||
| 707 | # CONFIG_SSB is not set | ||
| 708 | |||
| 709 | # | ||
| 710 | # Multifunction device drivers | ||
| 711 | # | ||
| 712 | # CONFIG_MFD_CORE is not set | ||
| 713 | # CONFIG_MFD_SM501 is not set | ||
| 714 | # CONFIG_HTC_PASIC3 is not set | ||
| 715 | # CONFIG_TPS65010 is not set | ||
| 716 | # CONFIG_TWL4030_CORE is not set | ||
| 717 | # CONFIG_MFD_TMIO is not set | ||
| 718 | # CONFIG_PMIC_DA903X is not set | ||
| 719 | # CONFIG_MFD_WM8400 is not set | ||
| 720 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 721 | # CONFIG_MFD_PCF50633 is not set | ||
| 722 | # CONFIG_AB3100_CORE is not set | ||
| 723 | # CONFIG_REGULATOR is not set | ||
| 724 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 725 | |||
| 726 | # | ||
| 727 | # Graphics support | ||
| 728 | # | ||
| 729 | # CONFIG_VGASTATE is not set | ||
| 730 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 731 | # CONFIG_FB is not set | ||
| 732 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 733 | |||
| 734 | # | ||
| 735 | # Display device support | ||
| 736 | # | ||
| 737 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 738 | |||
| 739 | # | ||
| 740 | # Console display driver support | ||
| 741 | # | ||
| 742 | CONFIG_DUMMY_CONSOLE=y | ||
| 743 | # CONFIG_SOUND is not set | ||
| 744 | # CONFIG_HID_SUPPORT is not set | ||
| 745 | CONFIG_USB_SUPPORT=y | ||
| 746 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 747 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 748 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 749 | CONFIG_USB=y | ||
| 750 | # CONFIG_USB_DEBUG is not set | ||
| 751 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 752 | |||
| 753 | # | ||
| 754 | # Miscellaneous USB options | ||
| 755 | # | ||
| 756 | # CONFIG_USB_DEVICEFS is not set | ||
| 757 | CONFIG_USB_DEVICE_CLASS=y | ||
| 758 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 759 | # CONFIG_USB_SUSPEND is not set | ||
| 760 | # CONFIG_USB_OTG is not set | ||
| 761 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 762 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 763 | # CONFIG_USB_MON is not set | ||
| 764 | # CONFIG_USB_WUSB is not set | ||
| 765 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 766 | |||
| 767 | # | ||
| 768 | # USB Host Controller Drivers | ||
| 769 | # | ||
| 770 | # CONFIG_USB_C67X00_HCD is not set | ||
| 771 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 772 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 773 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 774 | # CONFIG_USB_SL811_HCD is not set | ||
| 775 | CONFIG_USB_R8A66597_HCD=y | ||
| 776 | # CONFIG_USB_HWA_HCD is not set | ||
| 777 | |||
| 778 | # | ||
| 779 | # USB Device Class drivers | ||
| 780 | # | ||
| 781 | # CONFIG_USB_ACM is not set | ||
| 782 | # CONFIG_USB_PRINTER is not set | ||
| 783 | # CONFIG_USB_WDM is not set | ||
| 784 | # CONFIG_USB_TMC is not set | ||
| 785 | |||
| 786 | # | ||
| 787 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 788 | # | ||
| 789 | |||
| 790 | # | ||
| 791 | # also be needed; see USB_STORAGE Help for more info | ||
| 792 | # | ||
| 793 | CONFIG_USB_STORAGE=y | ||
| 794 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 795 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 796 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 797 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 798 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 799 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 800 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 801 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 802 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 803 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 804 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 805 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 806 | # CONFIG_USB_LIBUSUAL is not set | ||
| 807 | |||
| 808 | # | ||
| 809 | # USB Imaging devices | ||
| 810 | # | ||
| 811 | # CONFIG_USB_MDC800 is not set | ||
| 812 | # CONFIG_USB_MICROTEK is not set | ||
| 813 | |||
| 814 | # | ||
| 815 | # USB port drivers | ||
| 816 | # | ||
| 817 | # CONFIG_USB_SERIAL is not set | ||
| 818 | |||
| 819 | # | ||
| 820 | # USB Miscellaneous drivers | ||
| 821 | # | ||
| 822 | # CONFIG_USB_EMI62 is not set | ||
| 823 | # CONFIG_USB_EMI26 is not set | ||
| 824 | # CONFIG_USB_ADUTUX is not set | ||
| 825 | # CONFIG_USB_SEVSEG is not set | ||
| 826 | # CONFIG_USB_RIO500 is not set | ||
| 827 | # CONFIG_USB_LEGOTOWER is not set | ||
| 828 | # CONFIG_USB_LCD is not set | ||
| 829 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 830 | # CONFIG_USB_LED is not set | ||
| 831 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 832 | # CONFIG_USB_CYTHERM is not set | ||
| 833 | # CONFIG_USB_IDMOUSE is not set | ||
| 834 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 835 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 836 | # CONFIG_USB_LD is not set | ||
| 837 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 838 | # CONFIG_USB_IOWARRIOR is not set | ||
| 839 | # CONFIG_USB_TEST is not set | ||
| 840 | # CONFIG_USB_ISIGHTFW is not set | ||
| 841 | # CONFIG_USB_VST is not set | ||
| 842 | # CONFIG_USB_GADGET is not set | ||
| 843 | |||
| 844 | # | ||
| 845 | # OTG and related infrastructure | ||
| 846 | # | ||
| 847 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 848 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 849 | # CONFIG_MMC is not set | ||
| 850 | # CONFIG_MEMSTICK is not set | ||
| 851 | # CONFIG_NEW_LEDS is not set | ||
| 852 | # CONFIG_ACCESSIBILITY is not set | ||
| 853 | CONFIG_RTC_LIB=y | ||
| 854 | # CONFIG_RTC_CLASS is not set | ||
| 855 | # CONFIG_DMADEVICES is not set | ||
| 856 | # CONFIG_AUXDISPLAY is not set | ||
| 857 | # CONFIG_UIO is not set | ||
| 858 | |||
| 859 | # | ||
| 860 | # TI VLYNQ | ||
| 861 | # | ||
| 862 | # CONFIG_STAGING is not set | ||
| 863 | |||
| 864 | # | ||
| 865 | # File systems | ||
| 866 | # | ||
| 867 | CONFIG_EXT2_FS=y | ||
| 868 | # CONFIG_EXT2_FS_XATTR is not set | ||
| 869 | # CONFIG_EXT2_FS_XIP is not set | ||
| 870 | # CONFIG_EXT3_FS is not set | ||
| 871 | # CONFIG_EXT4_FS is not set | ||
| 872 | # CONFIG_REISERFS_FS is not set | ||
| 873 | # CONFIG_JFS_FS is not set | ||
| 874 | # CONFIG_FS_POSIX_ACL is not set | ||
| 875 | # CONFIG_XFS_FS is not set | ||
| 876 | # CONFIG_OCFS2_FS is not set | ||
| 877 | # CONFIG_BTRFS_FS is not set | ||
| 878 | CONFIG_FILE_LOCKING=y | ||
| 879 | # CONFIG_FSNOTIFY is not set | ||
| 880 | # CONFIG_DNOTIFY is not set | ||
| 881 | # CONFIG_INOTIFY is not set | ||
| 882 | # CONFIG_INOTIFY_USER is not set | ||
| 883 | # CONFIG_QUOTA is not set | ||
| 884 | # CONFIG_AUTOFS_FS is not set | ||
| 885 | # CONFIG_AUTOFS4_FS is not set | ||
| 886 | # CONFIG_FUSE_FS is not set | ||
| 887 | |||
| 888 | # | ||
| 889 | # Caches | ||
| 890 | # | ||
| 891 | # CONFIG_FSCACHE is not set | ||
| 892 | |||
| 893 | # | ||
| 894 | # CD-ROM/DVD Filesystems | ||
| 895 | # | ||
| 896 | # CONFIG_ISO9660_FS is not set | ||
| 897 | # CONFIG_UDF_FS is not set | ||
| 898 | |||
| 899 | # | ||
| 900 | # DOS/FAT/NT Filesystems | ||
| 901 | # | ||
| 902 | # CONFIG_MSDOS_FS is not set | ||
| 903 | # CONFIG_VFAT_FS is not set | ||
| 904 | # CONFIG_NTFS_FS is not set | ||
| 905 | |||
| 906 | # | ||
| 907 | # Pseudo filesystems | ||
| 908 | # | ||
| 909 | CONFIG_PROC_FS=y | ||
| 910 | CONFIG_PROC_KCORE=y | ||
| 911 | CONFIG_PROC_SYSCTL=y | ||
| 912 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 913 | CONFIG_SYSFS=y | ||
| 914 | CONFIG_TMPFS=y | ||
| 915 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 916 | # CONFIG_HUGETLBFS is not set | ||
| 917 | # CONFIG_HUGETLB_PAGE is not set | ||
| 918 | # CONFIG_CONFIGFS_FS is not set | ||
| 919 | # CONFIG_MISC_FILESYSTEMS is not set | ||
| 920 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
| 921 | |||
| 922 | # | ||
| 923 | # Partition Types | ||
| 924 | # | ||
| 925 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 926 | CONFIG_MSDOS_PARTITION=y | ||
| 927 | CONFIG_NLS=y | ||
| 928 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 929 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 930 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 931 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 932 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 933 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 934 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 935 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 936 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 937 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 938 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 939 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 940 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 941 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 942 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 943 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 944 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 945 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 946 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 947 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 948 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 949 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 950 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 951 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 952 | # CONFIG_NLS_ASCII is not set | ||
| 953 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 954 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 955 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 956 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 957 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 958 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 959 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 960 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 961 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 962 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 963 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 964 | # CONFIG_NLS_KOI8_R is not set | ||
| 965 | # CONFIG_NLS_KOI8_U is not set | ||
| 966 | # CONFIG_NLS_UTF8 is not set | ||
| 967 | # CONFIG_DLM is not set | ||
| 968 | |||
| 969 | # | ||
| 970 | # Kernel hacking | ||
| 971 | # | ||
| 972 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 973 | # CONFIG_PRINTK_TIME is not set | ||
| 974 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 975 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 976 | CONFIG_FRAME_WARN=1024 | ||
| 977 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 978 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 979 | CONFIG_DEBUG_FS=y | ||
| 980 | # CONFIG_HEADERS_CHECK is not set | ||
| 981 | # CONFIG_DEBUG_KERNEL is not set | ||
| 982 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 983 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 984 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 985 | # CONFIG_LATENCYTOP is not set | ||
| 986 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 987 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 988 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 989 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 990 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 991 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 992 | CONFIG_HAVE_FTRACE_SYSCALLS=y | ||
| 993 | CONFIG_TRACING_SUPPORT=y | ||
| 994 | # CONFIG_FTRACE is not set | ||
| 995 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 996 | # CONFIG_DMA_API_DEBUG is not set | ||
| 997 | # CONFIG_SAMPLES is not set | ||
| 998 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 999 | # CONFIG_SH_STANDARD_BIOS is not set | ||
| 1000 | # CONFIG_EARLY_SCIF_CONSOLE is not set | ||
| 1001 | # CONFIG_DWARF_UNWINDER is not set | ||
| 1002 | |||
| 1003 | # | ||
| 1004 | # Security options | ||
| 1005 | # | ||
| 1006 | # CONFIG_KEYS is not set | ||
| 1007 | # CONFIG_SECURITY is not set | ||
| 1008 | # CONFIG_SECURITYFS is not set | ||
| 1009 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1010 | # CONFIG_CRYPTO is not set | ||
| 1011 | # CONFIG_BINARY_PRINTF is not set | ||
| 1012 | |||
| 1013 | # | ||
| 1014 | # Library routines | ||
| 1015 | # | ||
| 1016 | CONFIG_BITREVERSE=y | ||
| 1017 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1018 | # CONFIG_CRC_CCITT is not set | ||
| 1019 | # CONFIG_CRC16 is not set | ||
| 1020 | # CONFIG_CRC_T10DIF is not set | ||
| 1021 | # CONFIG_CRC_ITU_T is not set | ||
| 1022 | CONFIG_CRC32=y | ||
| 1023 | # CONFIG_CRC7 is not set | ||
| 1024 | # CONFIG_LIBCRC32C is not set | ||
| 1025 | CONFIG_ZLIB_INFLATE=y | ||
| 1026 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1027 | CONFIG_HAS_IOMEM=y | ||
| 1028 | CONFIG_HAS_IOPORT=y | ||
| 1029 | CONFIG_HAS_DMA=y | ||
| 1030 | CONFIG_HAVE_LMB=y | ||
| 1031 | CONFIG_NLATTR=y | ||
| 1032 | CONFIG_GENERIC_ATOMIC64=y | ||
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig new file mode 100644 index 000000000000..2050a76683c3 --- /dev/null +++ b/arch/sh/configs/ecovec24_defconfig | |||
| @@ -0,0 +1,1558 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.31-rc7 | ||
| 4 | # Wed Aug 26 09:09:07 2009 | ||
| 5 | # | ||
| 6 | CONFIG_SUPERH=y | ||
| 7 | CONFIG_SUPERH32=y | ||
| 8 | # CONFIG_SUPERH64 is not set | ||
| 9 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
| 10 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 11 | CONFIG_GENERIC_BUG=y | ||
| 12 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 13 | CONFIG_GENERIC_HWEIGHT=y | ||
| 14 | CONFIG_GENERIC_HARDIRQS=y | ||
| 15 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 16 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 17 | CONFIG_IRQ_PER_CPU=y | ||
| 18 | CONFIG_GENERIC_GPIO=y | ||
| 19 | CONFIG_GENERIC_TIME=y | ||
| 20 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 21 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 22 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 23 | CONFIG_SYS_SUPPORTS_CMT=y | ||
| 24 | CONFIG_SYS_SUPPORTS_TMU=y | ||
| 25 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 26 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 27 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 28 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 29 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 30 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 31 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | ||
| 32 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
| 33 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 34 | CONFIG_CONSTRUCTORS=y | ||
| 35 | |||
| 36 | # | ||
| 37 | # General setup | ||
| 38 | # | ||
| 39 | CONFIG_EXPERIMENTAL=y | ||
| 40 | CONFIG_BROKEN_ON_SMP=y | ||
| 41 | CONFIG_LOCK_KERNEL=y | ||
| 42 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 43 | CONFIG_LOCALVERSION="" | ||
| 44 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 45 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 46 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
| 47 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 48 | CONFIG_KERNEL_GZIP=y | ||
| 49 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 50 | # CONFIG_KERNEL_LZMA is not set | ||
| 51 | CONFIG_SWAP=y | ||
| 52 | CONFIG_SYSVIPC=y | ||
| 53 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 54 | # CONFIG_POSIX_MQUEUE is not set | ||
| 55 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 56 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 57 | # CONFIG_TASKSTATS is not set | ||
| 58 | # CONFIG_AUDIT is not set | ||
| 59 | |||
| 60 | # | ||
| 61 | # RCU Subsystem | ||
| 62 | # | ||
| 63 | CONFIG_CLASSIC_RCU=y | ||
| 64 | # CONFIG_TREE_RCU is not set | ||
| 65 | # CONFIG_PREEMPT_RCU is not set | ||
| 66 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 67 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 68 | # CONFIG_IKCONFIG is not set | ||
| 69 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 70 | CONFIG_GROUP_SCHED=y | ||
| 71 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 72 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 73 | CONFIG_USER_SCHED=y | ||
| 74 | # CONFIG_CGROUP_SCHED is not set | ||
| 75 | # CONFIG_CGROUPS is not set | ||
| 76 | CONFIG_SYSFS_DEPRECATED=y | ||
| 77 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 78 | # CONFIG_RELAY is not set | ||
| 79 | # CONFIG_NAMESPACES is not set | ||
| 80 | # CONFIG_BLK_DEV_INITRD is not set | ||
| 81 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 82 | CONFIG_SYSCTL=y | ||
| 83 | CONFIG_ANON_INODES=y | ||
| 84 | CONFIG_EMBEDDED=y | ||
| 85 | CONFIG_UID16=y | ||
| 86 | CONFIG_SYSCTL_SYSCALL=y | ||
| 87 | # CONFIG_KALLSYMS is not set | ||
| 88 | CONFIG_HOTPLUG=y | ||
| 89 | CONFIG_PRINTK=y | ||
| 90 | CONFIG_BUG=y | ||
| 91 | CONFIG_ELF_CORE=y | ||
| 92 | CONFIG_BASE_FULL=y | ||
| 93 | CONFIG_FUTEX=y | ||
| 94 | CONFIG_EPOLL=y | ||
| 95 | CONFIG_SIGNALFD=y | ||
| 96 | CONFIG_TIMERFD=y | ||
| 97 | CONFIG_EVENTFD=y | ||
| 98 | CONFIG_SHMEM=y | ||
| 99 | CONFIG_AIO=y | ||
| 100 | CONFIG_HAVE_PERF_COUNTERS=y | ||
| 101 | |||
| 102 | # | ||
| 103 | # Performance Counters | ||
| 104 | # | ||
| 105 | # CONFIG_PERF_COUNTERS is not set | ||
| 106 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 107 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 108 | CONFIG_COMPAT_BRK=y | ||
| 109 | CONFIG_SLAB=y | ||
| 110 | # CONFIG_SLUB is not set | ||
| 111 | # CONFIG_SLOB is not set | ||
| 112 | # CONFIG_PROFILING is not set | ||
| 113 | # CONFIG_MARKERS is not set | ||
| 114 | CONFIG_HAVE_OPROFILE=y | ||
| 115 | CONFIG_HAVE_IOREMAP_PROT=y | ||
| 116 | CONFIG_HAVE_KPROBES=y | ||
| 117 | CONFIG_HAVE_KRETPROBES=y | ||
| 118 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 119 | CONFIG_HAVE_CLK=y | ||
| 120 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
| 121 | |||
| 122 | # | ||
| 123 | # GCOV-based kernel profiling | ||
| 124 | # | ||
| 125 | # CONFIG_GCOV_KERNEL is not set | ||
| 126 | # CONFIG_SLOW_WORK is not set | ||
| 127 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 128 | CONFIG_SLABINFO=y | ||
| 129 | CONFIG_RT_MUTEXES=y | ||
| 130 | CONFIG_BASE_SMALL=0 | ||
| 131 | CONFIG_MODULES=y | ||
| 132 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 133 | CONFIG_MODULE_UNLOAD=y | ||
| 134 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 135 | # CONFIG_MODVERSIONS is not set | ||
| 136 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 137 | CONFIG_BLOCK=y | ||
| 138 | CONFIG_LBDAF=y | ||
| 139 | # CONFIG_BLK_DEV_BSG is not set | ||
| 140 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 141 | |||
| 142 | # | ||
| 143 | # IO Schedulers | ||
| 144 | # | ||
| 145 | CONFIG_IOSCHED_NOOP=y | ||
| 146 | CONFIG_IOSCHED_AS=y | ||
| 147 | CONFIG_IOSCHED_DEADLINE=y | ||
| 148 | CONFIG_IOSCHED_CFQ=y | ||
| 149 | # CONFIG_DEFAULT_AS is not set | ||
| 150 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 151 | CONFIG_DEFAULT_CFQ=y | ||
| 152 | # CONFIG_DEFAULT_NOOP is not set | ||
| 153 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 154 | CONFIG_FREEZER=y | ||
| 155 | |||
| 156 | # | ||
| 157 | # System type | ||
| 158 | # | ||
| 159 | CONFIG_CPU_SH4=y | ||
| 160 | CONFIG_CPU_SH4A=y | ||
| 161 | CONFIG_CPU_SHX2=y | ||
| 162 | CONFIG_ARCH_SHMOBILE=y | ||
| 163 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
| 164 | # CONFIG_CPU_SUBTYPE_SH7201 is not set | ||
| 165 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
| 166 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
| 167 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
| 168 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
| 169 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | ||
| 170 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
| 171 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
| 172 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
| 173 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
| 174 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
| 175 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
| 176 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
| 177 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
| 178 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
| 179 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
| 180 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
| 181 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
| 182 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
| 183 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
| 184 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
| 185 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
| 186 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
| 187 | CONFIG_CPU_SUBTYPE_SH7724=y | ||
| 188 | # CONFIG_CPU_SUBTYPE_SH7757 is not set | ||
| 189 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
| 190 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
| 191 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
| 192 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
| 193 | # CONFIG_CPU_SUBTYPE_SH7786 is not set | ||
| 194 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
| 195 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
| 196 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
| 197 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | ||
| 198 | |||
| 199 | # | ||
| 200 | # Memory management options | ||
| 201 | # | ||
| 202 | CONFIG_QUICKLIST=y | ||
| 203 | CONFIG_MMU=y | ||
| 204 | CONFIG_PAGE_OFFSET=0x80000000 | ||
| 205 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
| 206 | CONFIG_MEMORY_START=0x08000000 | ||
| 207 | CONFIG_MEMORY_SIZE=0x08000000 | ||
| 208 | CONFIG_29BIT=y | ||
| 209 | # CONFIG_X2TLB is not set | ||
| 210 | CONFIG_VSYSCALL=y | ||
| 211 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 212 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 213 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 214 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
| 215 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 216 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 217 | CONFIG_PAGE_SIZE_4KB=y | ||
| 218 | # CONFIG_PAGE_SIZE_8KB is not set | ||
| 219 | # CONFIG_PAGE_SIZE_16KB is not set | ||
| 220 | # CONFIG_PAGE_SIZE_64KB is not set | ||
| 221 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 222 | CONFIG_FLATMEM_MANUAL=y | ||
| 223 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 224 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 225 | CONFIG_FLATMEM=y | ||
| 226 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 227 | CONFIG_SPARSEMEM_STATIC=y | ||
| 228 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 229 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 230 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 231 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 232 | CONFIG_NR_QUICK=2 | ||
| 233 | CONFIG_HAVE_MLOCK=y | ||
| 234 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 235 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 236 | |||
| 237 | # | ||
| 238 | # Cache configuration | ||
| 239 | # | ||
| 240 | CONFIG_CACHE_WRITEBACK=y | ||
| 241 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
| 242 | # CONFIG_CACHE_OFF is not set | ||
| 243 | |||
| 244 | # | ||
| 245 | # Processor features | ||
| 246 | # | ||
| 247 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
| 248 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
| 249 | CONFIG_SH_FPU=y | ||
| 250 | # CONFIG_SH_STORE_QUEUES is not set | ||
| 251 | CONFIG_CPU_HAS_INTEVT=y | ||
| 252 | CONFIG_CPU_HAS_SR_RB=y | ||
| 253 | CONFIG_CPU_HAS_FPU=y | ||
| 254 | |||
| 255 | # | ||
| 256 | # Board support | ||
| 257 | # | ||
| 258 | # CONFIG_SH_7724_SOLUTION_ENGINE is not set | ||
| 259 | # CONFIG_SH_KFR2R09 is not set | ||
| 260 | CONFIG_SH_ECOVEC=y | ||
| 261 | |||
| 262 | # | ||
| 263 | # Timer and clock configuration | ||
| 264 | # | ||
| 265 | CONFIG_SH_TIMER_TMU=y | ||
| 266 | # CONFIG_SH_TIMER_CMT is not set | ||
| 267 | CONFIG_SH_PCLK_FREQ=33333333 | ||
| 268 | CONFIG_SH_CLK_CPG=y | ||
| 269 | # CONFIG_NO_HZ is not set | ||
| 270 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 271 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 272 | |||
| 273 | # | ||
| 274 | # CPU Frequency scaling | ||
| 275 | # | ||
| 276 | # CONFIG_CPU_FREQ is not set | ||
| 277 | |||
| 278 | # | ||
| 279 | # DMA support | ||
| 280 | # | ||
| 281 | # CONFIG_SH_DMA is not set | ||
| 282 | |||
| 283 | # | ||
| 284 | # Companion Chips | ||
| 285 | # | ||
| 286 | |||
| 287 | # | ||
| 288 | # Additional SuperH Device Drivers | ||
| 289 | # | ||
| 290 | CONFIG_HEARTBEAT=y | ||
| 291 | # CONFIG_PUSH_SWITCH is not set | ||
| 292 | |||
| 293 | # | ||
| 294 | # Kernel features | ||
| 295 | # | ||
| 296 | # CONFIG_HZ_100 is not set | ||
| 297 | CONFIG_HZ_250=y | ||
| 298 | # CONFIG_HZ_300 is not set | ||
| 299 | # CONFIG_HZ_1000 is not set | ||
| 300 | CONFIG_HZ=250 | ||
| 301 | # CONFIG_SCHED_HRTICK is not set | ||
| 302 | # CONFIG_KEXEC is not set | ||
| 303 | # CONFIG_CRASH_DUMP is not set | ||
| 304 | CONFIG_SECCOMP=y | ||
| 305 | # CONFIG_PREEMPT_NONE is not set | ||
| 306 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 307 | CONFIG_PREEMPT=y | ||
| 308 | CONFIG_GUSA=y | ||
| 309 | # CONFIG_SPARSE_IRQ is not set | ||
| 310 | |||
| 311 | # | ||
| 312 | # Boot options | ||
| 313 | # | ||
| 314 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
| 315 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
| 316 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
| 317 | CONFIG_CMDLINE_BOOL=y | ||
| 318 | CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=120M memchunk.vpu=4m" | ||
| 319 | |||
| 320 | # | ||
| 321 | # Bus options | ||
| 322 | # | ||
| 323 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 324 | # CONFIG_PCCARD is not set | ||
| 325 | |||
| 326 | # | ||
| 327 | # Executable file formats | ||
| 328 | # | ||
| 329 | CONFIG_BINFMT_ELF=y | ||
| 330 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 331 | # CONFIG_HAVE_AOUT is not set | ||
| 332 | # CONFIG_BINFMT_MISC is not set | ||
| 333 | |||
| 334 | # | ||
| 335 | # Power management options (EXPERIMENTAL) | ||
| 336 | # | ||
| 337 | CONFIG_PM=y | ||
| 338 | # CONFIG_PM_DEBUG is not set | ||
| 339 | CONFIG_PM_SLEEP=y | ||
| 340 | CONFIG_SUSPEND=y | ||
| 341 | CONFIG_SUSPEND_FREEZER=y | ||
| 342 | # CONFIG_HIBERNATION is not set | ||
| 343 | CONFIG_PM_RUNTIME=y | ||
| 344 | # CONFIG_CPU_IDLE is not set | ||
| 345 | CONFIG_NET=y | ||
| 346 | |||
| 347 | # | ||
| 348 | # Networking options | ||
| 349 | # | ||
| 350 | CONFIG_PACKET=y | ||
| 351 | # CONFIG_PACKET_MMAP is not set | ||
| 352 | CONFIG_UNIX=y | ||
| 353 | # CONFIG_NET_KEY is not set | ||
| 354 | CONFIG_INET=y | ||
| 355 | # CONFIG_IP_MULTICAST is not set | ||
| 356 | CONFIG_IP_ADVANCED_ROUTER=y | ||
| 357 | CONFIG_ASK_IP_FIB_HASH=y | ||
| 358 | # CONFIG_IP_FIB_TRIE is not set | ||
| 359 | CONFIG_IP_FIB_HASH=y | ||
| 360 | # CONFIG_IP_MULTIPLE_TABLES is not set | ||
| 361 | # CONFIG_IP_ROUTE_MULTIPATH is not set | ||
| 362 | # CONFIG_IP_ROUTE_VERBOSE is not set | ||
| 363 | CONFIG_IP_PNP=y | ||
| 364 | CONFIG_IP_PNP_DHCP=y | ||
| 365 | # CONFIG_IP_PNP_BOOTP is not set | ||
| 366 | # CONFIG_IP_PNP_RARP is not set | ||
| 367 | # CONFIG_NET_IPIP is not set | ||
| 368 | # CONFIG_NET_IPGRE is not set | ||
| 369 | # CONFIG_ARPD is not set | ||
| 370 | # CONFIG_SYN_COOKIES is not set | ||
| 371 | # CONFIG_INET_AH is not set | ||
| 372 | # CONFIG_INET_ESP is not set | ||
| 373 | # CONFIG_INET_IPCOMP is not set | ||
| 374 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 375 | # CONFIG_INET_TUNNEL is not set | ||
| 376 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 377 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 378 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 379 | # CONFIG_INET_LRO is not set | ||
| 380 | CONFIG_INET_DIAG=y | ||
| 381 | CONFIG_INET_TCP_DIAG=y | ||
| 382 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 383 | CONFIG_TCP_CONG_CUBIC=y | ||
| 384 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 385 | # CONFIG_TCP_MD5SIG is not set | ||
| 386 | # CONFIG_IPV6 is not set | ||
| 387 | # CONFIG_NETWORK_SECMARK is not set | ||
| 388 | # CONFIG_NETFILTER is not set | ||
| 389 | # CONFIG_IP_DCCP is not set | ||
| 390 | # CONFIG_IP_SCTP is not set | ||
| 391 | # CONFIG_TIPC is not set | ||
| 392 | # CONFIG_ATM is not set | ||
| 393 | # CONFIG_BRIDGE is not set | ||
| 394 | # CONFIG_NET_DSA is not set | ||
| 395 | # CONFIG_VLAN_8021Q is not set | ||
| 396 | # CONFIG_DECNET is not set | ||
| 397 | # CONFIG_LLC2 is not set | ||
| 398 | # CONFIG_IPX is not set | ||
| 399 | # CONFIG_ATALK is not set | ||
| 400 | # CONFIG_X25 is not set | ||
| 401 | # CONFIG_LAPB is not set | ||
| 402 | # CONFIG_ECONET is not set | ||
| 403 | # CONFIG_WAN_ROUTER is not set | ||
| 404 | # CONFIG_PHONET is not set | ||
| 405 | # CONFIG_IEEE802154 is not set | ||
| 406 | # CONFIG_NET_SCHED is not set | ||
| 407 | # CONFIG_DCB is not set | ||
| 408 | |||
| 409 | # | ||
| 410 | # Network testing | ||
| 411 | # | ||
| 412 | # CONFIG_NET_PKTGEN is not set | ||
| 413 | # CONFIG_HAMRADIO is not set | ||
| 414 | # CONFIG_CAN is not set | ||
| 415 | # CONFIG_IRDA is not set | ||
| 416 | # CONFIG_BT is not set | ||
| 417 | # CONFIG_AF_RXRPC is not set | ||
| 418 | CONFIG_WIRELESS=y | ||
| 419 | # CONFIG_CFG80211 is not set | ||
| 420 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
| 421 | # CONFIG_WIRELESS_EXT is not set | ||
| 422 | # CONFIG_LIB80211 is not set | ||
| 423 | |||
| 424 | # | ||
| 425 | # CFG80211 needs to be enabled for MAC80211 | ||
| 426 | # | ||
| 427 | CONFIG_MAC80211_DEFAULT_PS_VALUE=0 | ||
| 428 | # CONFIG_WIMAX is not set | ||
| 429 | # CONFIG_RFKILL is not set | ||
| 430 | # CONFIG_NET_9P is not set | ||
| 431 | |||
| 432 | # | ||
| 433 | # Device Drivers | ||
| 434 | # | ||
| 435 | |||
| 436 | # | ||
| 437 | # Generic Driver Options | ||
| 438 | # | ||
| 439 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 440 | CONFIG_STANDALONE=y | ||
| 441 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 442 | CONFIG_FW_LOADER=y | ||
| 443 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 444 | CONFIG_EXTRA_FIRMWARE="" | ||
| 445 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 446 | # CONFIG_CONNECTOR is not set | ||
| 447 | CONFIG_MTD=y | ||
| 448 | # CONFIG_MTD_DEBUG is not set | ||
| 449 | CONFIG_MTD_CONCAT=y | ||
| 450 | CONFIG_MTD_PARTITIONS=y | ||
| 451 | # CONFIG_MTD_TESTS is not set | ||
| 452 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 453 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 454 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 455 | |||
| 456 | # | ||
| 457 | # User Modules And Translation Layers | ||
| 458 | # | ||
| 459 | CONFIG_MTD_CHAR=y | ||
| 460 | CONFIG_MTD_BLKDEVS=y | ||
| 461 | CONFIG_MTD_BLOCK=y | ||
| 462 | # CONFIG_FTL is not set | ||
| 463 | # CONFIG_NFTL is not set | ||
| 464 | # CONFIG_INFTL is not set | ||
| 465 | # CONFIG_RFD_FTL is not set | ||
| 466 | # CONFIG_SSFDC is not set | ||
| 467 | # CONFIG_MTD_OOPS is not set | ||
| 468 | |||
| 469 | # | ||
| 470 | # RAM/ROM/Flash chip drivers | ||
| 471 | # | ||
| 472 | CONFIG_MTD_CFI=y | ||
| 473 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 474 | CONFIG_MTD_GEN_PROBE=y | ||
| 475 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 476 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 477 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 478 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 479 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 480 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 481 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 482 | CONFIG_MTD_CFI_I1=y | ||
| 483 | CONFIG_MTD_CFI_I2=y | ||
| 484 | # CONFIG_MTD_CFI_I4 is not set | ||
| 485 | # CONFIG_MTD_CFI_I8 is not set | ||
| 486 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
| 487 | CONFIG_MTD_CFI_AMDSTD=y | ||
| 488 | # CONFIG_MTD_CFI_STAA is not set | ||
| 489 | CONFIG_MTD_CFI_UTIL=y | ||
| 490 | # CONFIG_MTD_RAM is not set | ||
| 491 | # CONFIG_MTD_ROM is not set | ||
| 492 | # CONFIG_MTD_ABSENT is not set | ||
| 493 | |||
| 494 | # | ||
| 495 | # Mapping drivers for chip access | ||
| 496 | # | ||
| 497 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 498 | CONFIG_MTD_PHYSMAP=y | ||
| 499 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
| 500 | # CONFIG_MTD_PLATRAM is not set | ||
| 501 | |||
| 502 | # | ||
| 503 | # Self-contained MTD device drivers | ||
| 504 | # | ||
| 505 | # CONFIG_MTD_DATAFLASH is not set | ||
| 506 | # CONFIG_MTD_M25P80 is not set | ||
| 507 | # CONFIG_MTD_SLRAM is not set | ||
| 508 | # CONFIG_MTD_PHRAM is not set | ||
| 509 | # CONFIG_MTD_MTDRAM is not set | ||
| 510 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 511 | |||
| 512 | # | ||
| 513 | # Disk-On-Chip Device Drivers | ||
| 514 | # | ||
| 515 | # CONFIG_MTD_DOC2000 is not set | ||
| 516 | # CONFIG_MTD_DOC2001 is not set | ||
| 517 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 518 | CONFIG_MTD_NAND=y | ||
| 519 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 520 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 521 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 522 | CONFIG_MTD_NAND_IDS=y | ||
| 523 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 524 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 525 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 526 | # CONFIG_MTD_ALAUDA is not set | ||
| 527 | # CONFIG_MTD_ONENAND is not set | ||
| 528 | |||
| 529 | # | ||
| 530 | # LPDDR flash memory drivers | ||
| 531 | # | ||
| 532 | # CONFIG_MTD_LPDDR is not set | ||
| 533 | |||
| 534 | # | ||
| 535 | # UBI - Unsorted block images | ||
| 536 | # | ||
| 537 | CONFIG_MTD_UBI=y | ||
| 538 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
| 539 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
| 540 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
| 541 | |||
| 542 | # | ||
| 543 | # UBI debugging options | ||
| 544 | # | ||
| 545 | # CONFIG_MTD_UBI_DEBUG is not set | ||
| 546 | # CONFIG_PARPORT is not set | ||
| 547 | CONFIG_BLK_DEV=y | ||
| 548 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 549 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 550 | # CONFIG_BLK_DEV_NBD is not set | ||
| 551 | # CONFIG_BLK_DEV_UB is not set | ||
| 552 | CONFIG_BLK_DEV_RAM=y | ||
| 553 | CONFIG_BLK_DEV_RAM_COUNT=4 | ||
| 554 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
| 555 | # CONFIG_BLK_DEV_XIP is not set | ||
| 556 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 557 | # CONFIG_ATA_OVER_ETH is not set | ||
| 558 | # CONFIG_BLK_DEV_HD is not set | ||
| 559 | CONFIG_MISC_DEVICES=y | ||
| 560 | # CONFIG_ICS932S401 is not set | ||
| 561 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 562 | # CONFIG_ISL29003 is not set | ||
| 563 | # CONFIG_C2PORT is not set | ||
| 564 | |||
| 565 | # | ||
| 566 | # EEPROM support | ||
| 567 | # | ||
| 568 | # CONFIG_EEPROM_AT24 is not set | ||
| 569 | # CONFIG_EEPROM_AT25 is not set | ||
| 570 | # CONFIG_EEPROM_LEGACY is not set | ||
| 571 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 572 | # CONFIG_EEPROM_93CX6 is not set | ||
| 573 | CONFIG_HAVE_IDE=y | ||
| 574 | # CONFIG_IDE is not set | ||
| 575 | |||
| 576 | # | ||
| 577 | # SCSI device support | ||
| 578 | # | ||
| 579 | # CONFIG_RAID_ATTRS is not set | ||
| 580 | CONFIG_SCSI=y | ||
| 581 | CONFIG_SCSI_DMA=y | ||
| 582 | # CONFIG_SCSI_TGT is not set | ||
| 583 | # CONFIG_SCSI_NETLINK is not set | ||
| 584 | CONFIG_SCSI_PROC_FS=y | ||
| 585 | |||
| 586 | # | ||
| 587 | # SCSI support type (disk, tape, CD-ROM) | ||
| 588 | # | ||
| 589 | CONFIG_BLK_DEV_SD=y | ||
| 590 | # CONFIG_CHR_DEV_ST is not set | ||
| 591 | # CONFIG_CHR_DEV_OSST is not set | ||
| 592 | # CONFIG_BLK_DEV_SR is not set | ||
| 593 | # CONFIG_CHR_DEV_SG is not set | ||
| 594 | # CONFIG_CHR_DEV_SCH is not set | ||
| 595 | # CONFIG_SCSI_MULTI_LUN is not set | ||
| 596 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 597 | # CONFIG_SCSI_LOGGING is not set | ||
| 598 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 599 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 600 | |||
| 601 | # | ||
| 602 | # SCSI Transports | ||
| 603 | # | ||
| 604 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 605 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 606 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
| 607 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 608 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 609 | CONFIG_SCSI_LOWLEVEL=y | ||
| 610 | # CONFIG_ISCSI_TCP is not set | ||
| 611 | # CONFIG_LIBFC is not set | ||
| 612 | # CONFIG_LIBFCOE is not set | ||
| 613 | # CONFIG_SCSI_DEBUG is not set | ||
| 614 | # CONFIG_SCSI_DH is not set | ||
| 615 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 616 | # CONFIG_ATA is not set | ||
| 617 | # CONFIG_MD is not set | ||
| 618 | CONFIG_NETDEVICES=y | ||
| 619 | # CONFIG_DUMMY is not set | ||
| 620 | # CONFIG_BONDING is not set | ||
| 621 | # CONFIG_MACVLAN is not set | ||
| 622 | # CONFIG_EQUALIZER is not set | ||
| 623 | # CONFIG_TUN is not set | ||
| 624 | # CONFIG_VETH is not set | ||
| 625 | CONFIG_PHYLIB=y | ||
| 626 | |||
| 627 | # | ||
| 628 | # MII PHY device drivers | ||
| 629 | # | ||
| 630 | # CONFIG_MARVELL_PHY is not set | ||
| 631 | # CONFIG_DAVICOM_PHY is not set | ||
| 632 | # CONFIG_QSEMI_PHY is not set | ||
| 633 | # CONFIG_LXT_PHY is not set | ||
| 634 | # CONFIG_CICADA_PHY is not set | ||
| 635 | # CONFIG_VITESSE_PHY is not set | ||
| 636 | CONFIG_SMSC_PHY=y | ||
| 637 | # CONFIG_BROADCOM_PHY is not set | ||
| 638 | # CONFIG_ICPLUS_PHY is not set | ||
| 639 | # CONFIG_REALTEK_PHY is not set | ||
| 640 | # CONFIG_NATIONAL_PHY is not set | ||
| 641 | # CONFIG_STE10XP is not set | ||
| 642 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 643 | # CONFIG_FIXED_PHY is not set | ||
| 644 | CONFIG_MDIO_BITBANG=y | ||
| 645 | # CONFIG_MDIO_GPIO is not set | ||
| 646 | CONFIG_NET_ETHERNET=y | ||
| 647 | CONFIG_MII=y | ||
| 648 | # CONFIG_AX88796 is not set | ||
| 649 | # CONFIG_STNIC is not set | ||
| 650 | CONFIG_SH_ETH=y | ||
| 651 | # CONFIG_SMC91X is not set | ||
| 652 | # CONFIG_ENC28J60 is not set | ||
| 653 | # CONFIG_ETHOC is not set | ||
| 654 | # CONFIG_SMC911X is not set | ||
| 655 | # CONFIG_SMSC911X is not set | ||
| 656 | # CONFIG_DNET is not set | ||
| 657 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 658 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 659 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 660 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 661 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 662 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 663 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 664 | # CONFIG_B44 is not set | ||
| 665 | # CONFIG_KS8842 is not set | ||
| 666 | # CONFIG_KS8851 is not set | ||
| 667 | # CONFIG_NETDEV_1000 is not set | ||
| 668 | # CONFIG_NETDEV_10000 is not set | ||
| 669 | |||
| 670 | # | ||
| 671 | # Wireless LAN | ||
| 672 | # | ||
| 673 | # CONFIG_WLAN_PRE80211 is not set | ||
| 674 | # CONFIG_WLAN_80211 is not set | ||
| 675 | |||
| 676 | # | ||
| 677 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
| 678 | # | ||
| 679 | |||
| 680 | # | ||
| 681 | # USB Network Adapters | ||
| 682 | # | ||
| 683 | # CONFIG_USB_CATC is not set | ||
| 684 | # CONFIG_USB_KAWETH is not set | ||
| 685 | # CONFIG_USB_PEGASUS is not set | ||
| 686 | # CONFIG_USB_RTL8150 is not set | ||
| 687 | # CONFIG_USB_USBNET is not set | ||
| 688 | # CONFIG_WAN is not set | ||
| 689 | # CONFIG_PPP is not set | ||
| 690 | # CONFIG_SLIP is not set | ||
| 691 | # CONFIG_NETCONSOLE is not set | ||
| 692 | # CONFIG_NETPOLL is not set | ||
| 693 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
| 694 | # CONFIG_ISDN is not set | ||
| 695 | # CONFIG_PHONE is not set | ||
| 696 | |||
| 697 | # | ||
| 698 | # Input device support | ||
| 699 | # | ||
| 700 | CONFIG_INPUT=y | ||
| 701 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 702 | # CONFIG_INPUT_POLLDEV is not set | ||
| 703 | |||
| 704 | # | ||
| 705 | # Userland interfaces | ||
| 706 | # | ||
| 707 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 708 | # CONFIG_INPUT_JOYDEV is not set | ||
| 709 | CONFIG_INPUT_EVDEV=y | ||
| 710 | # CONFIG_INPUT_EVBUG is not set | ||
| 711 | |||
| 712 | # | ||
| 713 | # Input Device Drivers | ||
| 714 | # | ||
| 715 | CONFIG_INPUT_KEYBOARD=y | ||
| 716 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 717 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 718 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 719 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 720 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 721 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 722 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 723 | CONFIG_KEYBOARD_SH_KEYSC=y | ||
| 724 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 725 | # CONFIG_INPUT_MOUSE is not set | ||
| 726 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 727 | # CONFIG_INPUT_TABLET is not set | ||
| 728 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 729 | # CONFIG_INPUT_MISC is not set | ||
| 730 | |||
| 731 | # | ||
| 732 | # Hardware I/O ports | ||
| 733 | # | ||
| 734 | # CONFIG_SERIO is not set | ||
| 735 | # CONFIG_GAMEPORT is not set | ||
| 736 | |||
| 737 | # | ||
| 738 | # Character devices | ||
| 739 | # | ||
| 740 | CONFIG_VT=y | ||
| 741 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 742 | CONFIG_VT_CONSOLE=y | ||
| 743 | CONFIG_HW_CONSOLE=y | ||
| 744 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 745 | CONFIG_DEVKMEM=y | ||
| 746 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 747 | |||
| 748 | # | ||
| 749 | # Serial drivers | ||
| 750 | # | ||
| 751 | # CONFIG_SERIAL_8250 is not set | ||
| 752 | |||
| 753 | # | ||
| 754 | # Non-8250 serial port support | ||
| 755 | # | ||
| 756 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 757 | CONFIG_SERIAL_SH_SCI=y | ||
| 758 | CONFIG_SERIAL_SH_SCI_NR_UARTS=6 | ||
| 759 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
| 760 | CONFIG_SERIAL_CORE=y | ||
| 761 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 762 | CONFIG_UNIX98_PTYS=y | ||
| 763 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 764 | CONFIG_LEGACY_PTYS=y | ||
| 765 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 766 | # CONFIG_IPMI_HANDLER is not set | ||
| 767 | CONFIG_HW_RANDOM=y | ||
| 768 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 769 | # CONFIG_R3964 is not set | ||
| 770 | # CONFIG_RAW_DRIVER is not set | ||
| 771 | # CONFIG_TCG_TPM is not set | ||
| 772 | CONFIG_I2C=y | ||
| 773 | CONFIG_I2C_BOARDINFO=y | ||
| 774 | CONFIG_I2C_CHARDEV=y | ||
| 775 | CONFIG_I2C_HELPER_AUTO=y | ||
| 776 | |||
| 777 | # | ||
| 778 | # I2C Hardware Bus support | ||
| 779 | # | ||
| 780 | |||
| 781 | # | ||
| 782 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 783 | # | ||
| 784 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 785 | # CONFIG_I2C_GPIO is not set | ||
| 786 | # CONFIG_I2C_OCORES is not set | ||
| 787 | CONFIG_I2C_SH_MOBILE=y | ||
| 788 | # CONFIG_I2C_SIMTEC is not set | ||
| 789 | |||
| 790 | # | ||
| 791 | # External I2C/SMBus adapter drivers | ||
| 792 | # | ||
| 793 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 794 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 795 | # CONFIG_I2C_TINY_USB is not set | ||
| 796 | |||
| 797 | # | ||
| 798 | # Other I2C/SMBus bus drivers | ||
| 799 | # | ||
| 800 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 801 | # CONFIG_I2C_STUB is not set | ||
| 802 | |||
| 803 | # | ||
| 804 | # Miscellaneous I2C Chip support | ||
| 805 | # | ||
| 806 | # CONFIG_DS1682 is not set | ||
| 807 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 808 | # CONFIG_PCF8575 is not set | ||
| 809 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 810 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 811 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 812 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 813 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 814 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 815 | CONFIG_SPI=y | ||
| 816 | CONFIG_SPI_MASTER=y | ||
| 817 | |||
| 818 | # | ||
| 819 | # SPI Master Controller Drivers | ||
| 820 | # | ||
| 821 | CONFIG_SPI_BITBANG=y | ||
| 822 | # CONFIG_SPI_GPIO is not set | ||
| 823 | # CONFIG_SPI_SH_SCI is not set | ||
| 824 | |||
| 825 | # | ||
| 826 | # SPI Protocol Masters | ||
| 827 | # | ||
| 828 | # CONFIG_SPI_SPIDEV is not set | ||
| 829 | # CONFIG_SPI_TLE62X0 is not set | ||
| 830 | |||
| 831 | # | ||
| 832 | # PPS support | ||
| 833 | # | ||
| 834 | # CONFIG_PPS is not set | ||
| 835 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 836 | CONFIG_GPIOLIB=y | ||
| 837 | # CONFIG_GPIO_SYSFS is not set | ||
| 838 | |||
| 839 | # | ||
| 840 | # Memory mapped GPIO expanders: | ||
| 841 | # | ||
| 842 | |||
| 843 | # | ||
| 844 | # I2C GPIO expanders: | ||
| 845 | # | ||
| 846 | # CONFIG_GPIO_MAX732X is not set | ||
| 847 | # CONFIG_GPIO_PCA953X is not set | ||
| 848 | # CONFIG_GPIO_PCF857X is not set | ||
| 849 | |||
| 850 | # | ||
| 851 | # PCI GPIO expanders: | ||
| 852 | # | ||
| 853 | |||
| 854 | # | ||
| 855 | # SPI GPIO expanders: | ||
| 856 | # | ||
| 857 | # CONFIG_GPIO_MAX7301 is not set | ||
| 858 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 859 | # CONFIG_W1 is not set | ||
| 860 | # CONFIG_POWER_SUPPLY is not set | ||
| 861 | # CONFIG_HWMON is not set | ||
| 862 | # CONFIG_THERMAL is not set | ||
| 863 | # CONFIG_THERMAL_HWMON is not set | ||
| 864 | # CONFIG_WATCHDOG is not set | ||
| 865 | CONFIG_SSB_POSSIBLE=y | ||
| 866 | |||
| 867 | # | ||
| 868 | # Sonics Silicon Backplane | ||
| 869 | # | ||
| 870 | # CONFIG_SSB is not set | ||
| 871 | |||
| 872 | # | ||
| 873 | # Multifunction device drivers | ||
| 874 | # | ||
| 875 | # CONFIG_MFD_CORE is not set | ||
| 876 | # CONFIG_MFD_SM501 is not set | ||
| 877 | # CONFIG_HTC_PASIC3 is not set | ||
| 878 | # CONFIG_TPS65010 is not set | ||
| 879 | # CONFIG_TWL4030_CORE is not set | ||
| 880 | # CONFIG_MFD_TMIO is not set | ||
| 881 | # CONFIG_PMIC_DA903X is not set | ||
| 882 | # CONFIG_MFD_WM8400 is not set | ||
| 883 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 884 | # CONFIG_MFD_PCF50633 is not set | ||
| 885 | # CONFIG_AB3100_CORE is not set | ||
| 886 | # CONFIG_EZX_PCAP is not set | ||
| 887 | # CONFIG_REGULATOR is not set | ||
| 888 | CONFIG_MEDIA_SUPPORT=y | ||
| 889 | |||
| 890 | # | ||
| 891 | # Multimedia core support | ||
| 892 | # | ||
| 893 | CONFIG_VIDEO_DEV=y | ||
| 894 | CONFIG_VIDEO_V4L2_COMMON=y | ||
| 895 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
| 896 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 897 | # CONFIG_DVB_CORE is not set | ||
| 898 | CONFIG_VIDEO_MEDIA=y | ||
| 899 | |||
| 900 | # | ||
| 901 | # Multimedia drivers | ||
| 902 | # | ||
| 903 | # CONFIG_MEDIA_ATTACH is not set | ||
| 904 | CONFIG_MEDIA_TUNER=y | ||
| 905 | # CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
| 906 | CONFIG_MEDIA_TUNER_SIMPLE=y | ||
| 907 | CONFIG_MEDIA_TUNER_TDA8290=y | ||
| 908 | CONFIG_MEDIA_TUNER_TDA9887=y | ||
| 909 | CONFIG_MEDIA_TUNER_TEA5761=y | ||
| 910 | CONFIG_MEDIA_TUNER_TEA5767=y | ||
| 911 | CONFIG_MEDIA_TUNER_MT20XX=y | ||
| 912 | CONFIG_MEDIA_TUNER_XC2028=y | ||
| 913 | CONFIG_MEDIA_TUNER_XC5000=y | ||
| 914 | CONFIG_MEDIA_TUNER_MC44S803=y | ||
| 915 | CONFIG_VIDEO_V4L2=y | ||
| 916 | CONFIG_VIDEO_V4L1=y | ||
| 917 | CONFIG_VIDEOBUF_GEN=y | ||
| 918 | CONFIG_VIDEOBUF_DMA_CONTIG=y | ||
| 919 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 920 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 921 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 922 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
| 923 | # CONFIG_VIDEO_VIVI is not set | ||
| 924 | # CONFIG_VIDEO_CPIA is not set | ||
| 925 | # CONFIG_VIDEO_CPIA2 is not set | ||
| 926 | # CONFIG_VIDEO_SAA5246A is not set | ||
| 927 | # CONFIG_VIDEO_SAA5249 is not set | ||
| 928 | CONFIG_SOC_CAMERA=y | ||
| 929 | # CONFIG_SOC_CAMERA_MT9M001 is not set | ||
| 930 | # CONFIG_SOC_CAMERA_MT9M111 is not set | ||
| 931 | # CONFIG_SOC_CAMERA_MT9T031 is not set | ||
| 932 | # CONFIG_SOC_CAMERA_MT9V022 is not set | ||
| 933 | # CONFIG_SOC_CAMERA_TW9910 is not set | ||
| 934 | # CONFIG_SOC_CAMERA_PLATFORM is not set | ||
| 935 | # CONFIG_SOC_CAMERA_OV772X is not set | ||
| 936 | CONFIG_VIDEO_SH_MOBILE_CEU=y | ||
| 937 | # CONFIG_V4L_USB_DRIVERS is not set | ||
| 938 | CONFIG_RADIO_ADAPTERS=y | ||
| 939 | # CONFIG_USB_DSBR is not set | ||
| 940 | # CONFIG_USB_SI470X is not set | ||
| 941 | # CONFIG_USB_MR800 is not set | ||
| 942 | # CONFIG_RADIO_TEA5764 is not set | ||
| 943 | # CONFIG_DAB is not set | ||
| 944 | |||
| 945 | # | ||
| 946 | # Graphics support | ||
| 947 | # | ||
| 948 | # CONFIG_VGASTATE is not set | ||
| 949 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 950 | CONFIG_FB=y | ||
| 951 | # CONFIG_FIRMWARE_EDID is not set | ||
| 952 | # CONFIG_FB_DDC is not set | ||
| 953 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 954 | # CONFIG_FB_CFB_FILLRECT is not set | ||
| 955 | # CONFIG_FB_CFB_COPYAREA is not set | ||
| 956 | # CONFIG_FB_CFB_IMAGEBLIT is not set | ||
| 957 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 958 | CONFIG_FB_SYS_FILLRECT=y | ||
| 959 | CONFIG_FB_SYS_COPYAREA=y | ||
| 960 | CONFIG_FB_SYS_IMAGEBLIT=y | ||
| 961 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 962 | CONFIG_FB_SYS_FOPS=y | ||
| 963 | CONFIG_FB_DEFERRED_IO=y | ||
| 964 | # CONFIG_FB_SVGALIB is not set | ||
| 965 | # CONFIG_FB_MACMODES is not set | ||
| 966 | # CONFIG_FB_BACKLIGHT is not set | ||
| 967 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 968 | # CONFIG_FB_TILEBLITTING is not set | ||
| 969 | |||
| 970 | # | ||
| 971 | # Frame buffer hardware drivers | ||
| 972 | # | ||
| 973 | # CONFIG_FB_S1D13XXX is not set | ||
| 974 | CONFIG_FB_SH_MOBILE_LCDC=y | ||
| 975 | # CONFIG_FB_VIRTUAL is not set | ||
| 976 | # CONFIG_FB_METRONOME is not set | ||
| 977 | # CONFIG_FB_MB862XX is not set | ||
| 978 | # CONFIG_FB_BROADSHEET is not set | ||
| 979 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 980 | |||
| 981 | # | ||
| 982 | # Display device support | ||
| 983 | # | ||
| 984 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 985 | |||
| 986 | # | ||
| 987 | # Console display driver support | ||
| 988 | # | ||
| 989 | CONFIG_DUMMY_CONSOLE=y | ||
| 990 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 991 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 992 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 993 | # CONFIG_FONTS is not set | ||
| 994 | CONFIG_FONT_8x8=y | ||
| 995 | CONFIG_FONT_8x16=y | ||
| 996 | CONFIG_LOGO=y | ||
| 997 | # CONFIG_LOGO_LINUX_MONO is not set | ||
| 998 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
| 999 | # CONFIG_LOGO_LINUX_CLUT224 is not set | ||
| 1000 | # CONFIG_LOGO_SUPERH_MONO is not set | ||
| 1001 | # CONFIG_LOGO_SUPERH_VGA16 is not set | ||
| 1002 | CONFIG_LOGO_SUPERH_CLUT224=y | ||
| 1003 | # CONFIG_SOUND is not set | ||
| 1004 | CONFIG_HID_SUPPORT=y | ||
| 1005 | CONFIG_HID=y | ||
| 1006 | # CONFIG_HID_DEBUG is not set | ||
| 1007 | # CONFIG_HIDRAW is not set | ||
| 1008 | |||
| 1009 | # | ||
| 1010 | # USB Input Devices | ||
| 1011 | # | ||
| 1012 | CONFIG_USB_HID=y | ||
| 1013 | # CONFIG_HID_PID is not set | ||
| 1014 | # CONFIG_USB_HIDDEV is not set | ||
| 1015 | |||
| 1016 | # | ||
| 1017 | # Special HID drivers | ||
| 1018 | # | ||
| 1019 | # CONFIG_HID_A4TECH is not set | ||
| 1020 | # CONFIG_HID_APPLE is not set | ||
| 1021 | # CONFIG_HID_BELKIN is not set | ||
| 1022 | # CONFIG_HID_CHERRY is not set | ||
| 1023 | # CONFIG_HID_CHICONY is not set | ||
| 1024 | # CONFIG_HID_CYPRESS is not set | ||
| 1025 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1026 | # CONFIG_HID_EZKEY is not set | ||
| 1027 | # CONFIG_HID_KYE is not set | ||
| 1028 | # CONFIG_HID_GYRATION is not set | ||
| 1029 | # CONFIG_HID_KENSINGTON is not set | ||
| 1030 | # CONFIG_HID_LOGITECH is not set | ||
| 1031 | # CONFIG_HID_MICROSOFT is not set | ||
| 1032 | # CONFIG_HID_MONTEREY is not set | ||
| 1033 | # CONFIG_HID_NTRIG is not set | ||
| 1034 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1035 | # CONFIG_HID_PETALYNX is not set | ||
| 1036 | # CONFIG_HID_SAMSUNG is not set | ||
| 1037 | # CONFIG_HID_SONY is not set | ||
| 1038 | # CONFIG_HID_SUNPLUS is not set | ||
| 1039 | # CONFIG_HID_GREENASIA is not set | ||
| 1040 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1041 | # CONFIG_HID_TOPSEED is not set | ||
| 1042 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1043 | # CONFIG_HID_ZEROPLUS is not set | ||
| 1044 | CONFIG_USB_SUPPORT=y | ||
| 1045 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 1046 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 1047 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 1048 | CONFIG_USB=y | ||
| 1049 | # CONFIG_USB_DEBUG is not set | ||
| 1050 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
| 1051 | |||
| 1052 | # | ||
| 1053 | # Miscellaneous USB options | ||
| 1054 | # | ||
| 1055 | CONFIG_USB_DEVICEFS=y | ||
| 1056 | CONFIG_USB_DEVICE_CLASS=y | ||
| 1057 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1058 | # CONFIG_USB_SUSPEND is not set | ||
| 1059 | # CONFIG_USB_OTG is not set | ||
| 1060 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 1061 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 1062 | CONFIG_USB_MON=y | ||
| 1063 | # CONFIG_USB_WUSB is not set | ||
| 1064 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1065 | |||
| 1066 | # | ||
| 1067 | # USB Host Controller Drivers | ||
| 1068 | # | ||
| 1069 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1070 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1071 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1072 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1073 | # CONFIG_USB_SL811_HCD is not set | ||
| 1074 | CONFIG_USB_R8A66597_HCD=y | ||
| 1075 | # CONFIG_USB_HWA_HCD is not set | ||
| 1076 | |||
| 1077 | # | ||
| 1078 | # USB Device Class drivers | ||
| 1079 | # | ||
| 1080 | # CONFIG_USB_ACM is not set | ||
| 1081 | # CONFIG_USB_PRINTER is not set | ||
| 1082 | # CONFIG_USB_WDM is not set | ||
| 1083 | # CONFIG_USB_TMC is not set | ||
| 1084 | |||
| 1085 | # | ||
| 1086 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 1087 | # | ||
| 1088 | |||
| 1089 | # | ||
| 1090 | # also be needed; see USB_STORAGE Help for more info | ||
| 1091 | # | ||
| 1092 | CONFIG_USB_STORAGE=y | ||
| 1093 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 1094 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 1095 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 1096 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 1097 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 1098 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 1099 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 1100 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 1101 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 1102 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 1103 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 1104 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 1105 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1106 | |||
| 1107 | # | ||
| 1108 | # USB Imaging devices | ||
| 1109 | # | ||
| 1110 | # CONFIG_USB_MDC800 is not set | ||
| 1111 | # CONFIG_USB_MICROTEK is not set | ||
| 1112 | |||
| 1113 | # | ||
| 1114 | # USB port drivers | ||
| 1115 | # | ||
| 1116 | # CONFIG_USB_SERIAL is not set | ||
| 1117 | |||
| 1118 | # | ||
| 1119 | # USB Miscellaneous drivers | ||
| 1120 | # | ||
| 1121 | # CONFIG_USB_EMI62 is not set | ||
| 1122 | # CONFIG_USB_EMI26 is not set | ||
| 1123 | # CONFIG_USB_ADUTUX is not set | ||
| 1124 | # CONFIG_USB_SEVSEG is not set | ||
| 1125 | # CONFIG_USB_RIO500 is not set | ||
| 1126 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1127 | # CONFIG_USB_LCD is not set | ||
| 1128 | # CONFIG_USB_BERRY_CHARGE is not set | ||
| 1129 | # CONFIG_USB_LED is not set | ||
| 1130 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1131 | # CONFIG_USB_CYTHERM is not set | ||
| 1132 | # CONFIG_USB_IDMOUSE is not set | ||
| 1133 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1134 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1135 | # CONFIG_USB_LD is not set | ||
| 1136 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1137 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1138 | # CONFIG_USB_TEST is not set | ||
| 1139 | # CONFIG_USB_ISIGHTFW is not set | ||
| 1140 | # CONFIG_USB_VST is not set | ||
| 1141 | # CONFIG_USB_GADGET is not set | ||
| 1142 | |||
| 1143 | # | ||
| 1144 | # OTG and related infrastructure | ||
| 1145 | # | ||
| 1146 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1147 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 1148 | CONFIG_MMC=y | ||
| 1149 | # CONFIG_MMC_DEBUG is not set | ||
| 1150 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 1151 | |||
| 1152 | # | ||
| 1153 | # MMC/SD/SDIO Card Drivers | ||
| 1154 | # | ||
| 1155 | CONFIG_MMC_BLOCK=y | ||
| 1156 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 1157 | # CONFIG_SDIO_UART is not set | ||
| 1158 | # CONFIG_MMC_TEST is not set | ||
| 1159 | |||
| 1160 | # | ||
| 1161 | # MMC/SD/SDIO Host Controller Drivers | ||
| 1162 | # | ||
| 1163 | # CONFIG_MMC_SDHCI is not set | ||
| 1164 | CONFIG_MMC_SPI=y | ||
| 1165 | # CONFIG_MEMSTICK is not set | ||
| 1166 | # CONFIG_NEW_LEDS is not set | ||
| 1167 | # CONFIG_ACCESSIBILITY is not set | ||
| 1168 | CONFIG_RTC_LIB=y | ||
| 1169 | CONFIG_RTC_CLASS=y | ||
| 1170 | CONFIG_RTC_HCTOSYS=y | ||
| 1171 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 1172 | # CONFIG_RTC_DEBUG is not set | ||
| 1173 | |||
| 1174 | # | ||
| 1175 | # RTC interfaces | ||
| 1176 | # | ||
| 1177 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1178 | CONFIG_RTC_INTF_PROC=y | ||
| 1179 | CONFIG_RTC_INTF_DEV=y | ||
| 1180 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1181 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1182 | |||
| 1183 | # | ||
| 1184 | # I2C RTC drivers | ||
| 1185 | # | ||
| 1186 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1187 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1188 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1189 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1190 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1191 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1192 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1193 | CONFIG_RTC_DRV_PCF8563=y | ||
| 1194 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1195 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1196 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1197 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1198 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1199 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1200 | |||
| 1201 | # | ||
| 1202 | # SPI RTC drivers | ||
| 1203 | # | ||
| 1204 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1205 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1206 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1207 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1208 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1209 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1210 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1211 | |||
| 1212 | # | ||
| 1213 | # Platform RTC drivers | ||
| 1214 | # | ||
| 1215 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1216 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1217 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1218 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1219 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1220 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1221 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1222 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1223 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1224 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 1225 | |||
| 1226 | # | ||
| 1227 | # on-CPU RTC drivers | ||
| 1228 | # | ||
| 1229 | # CONFIG_RTC_DRV_SH is not set | ||
| 1230 | # CONFIG_RTC_DRV_GENERIC is not set | ||
| 1231 | # CONFIG_DMADEVICES is not set | ||
| 1232 | # CONFIG_AUXDISPLAY is not set | ||
| 1233 | CONFIG_UIO=y | ||
| 1234 | # CONFIG_UIO_PDRV is not set | ||
| 1235 | CONFIG_UIO_PDRV_GENIRQ=y | ||
| 1236 | # CONFIG_UIO_SMX is not set | ||
| 1237 | # CONFIG_UIO_SERCOS3 is not set | ||
| 1238 | |||
| 1239 | # | ||
| 1240 | # TI VLYNQ | ||
| 1241 | # | ||
| 1242 | # CONFIG_STAGING is not set | ||
| 1243 | |||
| 1244 | # | ||
| 1245 | # File systems | ||
| 1246 | # | ||
| 1247 | CONFIG_EXT2_FS=y | ||
| 1248 | CONFIG_EXT2_FS_XATTR=y | ||
| 1249 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
| 1250 | CONFIG_EXT2_FS_SECURITY=y | ||
| 1251 | # CONFIG_EXT2_FS_XIP is not set | ||
| 1252 | CONFIG_EXT3_FS=y | ||
| 1253 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 1254 | CONFIG_EXT3_FS_XATTR=y | ||
| 1255 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 1256 | CONFIG_EXT3_FS_SECURITY=y | ||
| 1257 | # CONFIG_EXT4_FS is not set | ||
| 1258 | CONFIG_JBD=y | ||
| 1259 | # CONFIG_JBD_DEBUG is not set | ||
| 1260 | CONFIG_FS_MBCACHE=y | ||
| 1261 | # CONFIG_REISERFS_FS is not set | ||
| 1262 | # CONFIG_JFS_FS is not set | ||
| 1263 | CONFIG_FS_POSIX_ACL=y | ||
| 1264 | # CONFIG_XFS_FS is not set | ||
| 1265 | # CONFIG_GFS2_FS is not set | ||
| 1266 | # CONFIG_OCFS2_FS is not set | ||
| 1267 | # CONFIG_BTRFS_FS is not set | ||
| 1268 | CONFIG_FILE_LOCKING=y | ||
| 1269 | CONFIG_FSNOTIFY=y | ||
| 1270 | CONFIG_DNOTIFY=y | ||
| 1271 | CONFIG_INOTIFY=y | ||
| 1272 | CONFIG_INOTIFY_USER=y | ||
| 1273 | # CONFIG_QUOTA is not set | ||
| 1274 | # CONFIG_AUTOFS_FS is not set | ||
| 1275 | # CONFIG_AUTOFS4_FS is not set | ||
| 1276 | # CONFIG_FUSE_FS is not set | ||
| 1277 | |||
| 1278 | # | ||
| 1279 | # Caches | ||
| 1280 | # | ||
| 1281 | # CONFIG_FSCACHE is not set | ||
| 1282 | |||
| 1283 | # | ||
| 1284 | # CD-ROM/DVD Filesystems | ||
| 1285 | # | ||
| 1286 | # CONFIG_ISO9660_FS is not set | ||
| 1287 | # CONFIG_UDF_FS is not set | ||
| 1288 | |||
| 1289 | # | ||
| 1290 | # DOS/FAT/NT Filesystems | ||
| 1291 | # | ||
| 1292 | CONFIG_FAT_FS=y | ||
| 1293 | # CONFIG_MSDOS_FS is not set | ||
| 1294 | CONFIG_VFAT_FS=y | ||
| 1295 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 1296 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 1297 | # CONFIG_NTFS_FS is not set | ||
| 1298 | |||
| 1299 | # | ||
| 1300 | # Pseudo filesystems | ||
| 1301 | # | ||
| 1302 | CONFIG_PROC_FS=y | ||
| 1303 | CONFIG_PROC_KCORE=y | ||
| 1304 | CONFIG_PROC_SYSCTL=y | ||
| 1305 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 1306 | CONFIG_SYSFS=y | ||
| 1307 | CONFIG_TMPFS=y | ||
| 1308 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 1309 | # CONFIG_HUGETLBFS is not set | ||
| 1310 | # CONFIG_HUGETLB_PAGE is not set | ||
| 1311 | # CONFIG_CONFIGFS_FS is not set | ||
| 1312 | CONFIG_MISC_FILESYSTEMS=y | ||
| 1313 | # CONFIG_ADFS_FS is not set | ||
| 1314 | # CONFIG_AFFS_FS is not set | ||
| 1315 | # CONFIG_HFS_FS is not set | ||
| 1316 | # CONFIG_HFSPLUS_FS is not set | ||
| 1317 | # CONFIG_BEFS_FS is not set | ||
| 1318 | # CONFIG_BFS_FS is not set | ||
| 1319 | # CONFIG_EFS_FS is not set | ||
| 1320 | # CONFIG_JFFS2_FS is not set | ||
| 1321 | # CONFIG_UBIFS_FS is not set | ||
| 1322 | # CONFIG_CRAMFS is not set | ||
| 1323 | # CONFIG_SQUASHFS is not set | ||
| 1324 | # CONFIG_VXFS_FS is not set | ||
| 1325 | # CONFIG_MINIX_FS is not set | ||
| 1326 | # CONFIG_OMFS_FS is not set | ||
| 1327 | # CONFIG_HPFS_FS is not set | ||
| 1328 | # CONFIG_QNX4FS_FS is not set | ||
| 1329 | # CONFIG_ROMFS_FS is not set | ||
| 1330 | # CONFIG_SYSV_FS is not set | ||
| 1331 | # CONFIG_UFS_FS is not set | ||
| 1332 | # CONFIG_NILFS2_FS is not set | ||
| 1333 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 1334 | CONFIG_NFS_FS=y | ||
| 1335 | CONFIG_NFS_V3=y | ||
| 1336 | # CONFIG_NFS_V3_ACL is not set | ||
| 1337 | # CONFIG_NFS_V4 is not set | ||
| 1338 | CONFIG_ROOT_NFS=y | ||
| 1339 | CONFIG_NFSD=y | ||
| 1340 | CONFIG_NFSD_V3=y | ||
| 1341 | # CONFIG_NFSD_V3_ACL is not set | ||
| 1342 | # CONFIG_NFSD_V4 is not set | ||
| 1343 | CONFIG_LOCKD=y | ||
| 1344 | CONFIG_LOCKD_V4=y | ||
| 1345 | CONFIG_EXPORTFS=y | ||
| 1346 | CONFIG_NFS_COMMON=y | ||
| 1347 | CONFIG_SUNRPC=y | ||
| 1348 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
| 1349 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
| 1350 | # CONFIG_SMB_FS is not set | ||
| 1351 | # CONFIG_CIFS is not set | ||
| 1352 | # CONFIG_NCP_FS is not set | ||
| 1353 | # CONFIG_CODA_FS is not set | ||
| 1354 | # CONFIG_AFS_FS is not set | ||
| 1355 | |||
| 1356 | # | ||
| 1357 | # Partition Types | ||
| 1358 | # | ||
| 1359 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 1360 | CONFIG_MSDOS_PARTITION=y | ||
| 1361 | CONFIG_NLS=y | ||
| 1362 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1363 | CONFIG_NLS_CODEPAGE_437=y | ||
| 1364 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1365 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1366 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1367 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1368 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1369 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1370 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1371 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1372 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1373 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1374 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1375 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1376 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1377 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1378 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1379 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1380 | CONFIG_NLS_CODEPAGE_932=y | ||
| 1381 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1382 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1383 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1384 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1385 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1386 | # CONFIG_NLS_ASCII is not set | ||
| 1387 | CONFIG_NLS_ISO8859_1=y | ||
| 1388 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1389 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1390 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1391 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1392 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1393 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1394 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1395 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1396 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1397 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1398 | # CONFIG_NLS_KOI8_R is not set | ||
| 1399 | # CONFIG_NLS_KOI8_U is not set | ||
| 1400 | # CONFIG_NLS_UTF8 is not set | ||
| 1401 | # CONFIG_DLM is not set | ||
| 1402 | |||
| 1403 | # | ||
| 1404 | # Kernel hacking | ||
| 1405 | # | ||
| 1406 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 1407 | # CONFIG_PRINTK_TIME is not set | ||
| 1408 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1409 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 1410 | CONFIG_FRAME_WARN=1024 | ||
| 1411 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1412 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1413 | CONFIG_DEBUG_FS=y | ||
| 1414 | # CONFIG_HEADERS_CHECK is not set | ||
| 1415 | # CONFIG_DEBUG_KERNEL is not set | ||
| 1416 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1417 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1418 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1419 | # CONFIG_LATENCYTOP is not set | ||
| 1420 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
| 1421 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1422 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 1423 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 1424 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1425 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 1426 | CONFIG_HAVE_FTRACE_SYSCALLS=y | ||
| 1427 | CONFIG_TRACING_SUPPORT=y | ||
| 1428 | # CONFIG_FTRACE is not set | ||
| 1429 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1430 | # CONFIG_DMA_API_DEBUG is not set | ||
| 1431 | # CONFIG_SAMPLES is not set | ||
| 1432 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1433 | # CONFIG_SH_STANDARD_BIOS is not set | ||
| 1434 | # CONFIG_EARLY_SCIF_CONSOLE is not set | ||
| 1435 | # CONFIG_DWARF_UNWINDER is not set | ||
| 1436 | |||
| 1437 | # | ||
| 1438 | # Security options | ||
| 1439 | # | ||
| 1440 | # CONFIG_KEYS is not set | ||
| 1441 | # CONFIG_SECURITY is not set | ||
| 1442 | # CONFIG_SECURITYFS is not set | ||
| 1443 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1444 | CONFIG_CRYPTO=y | ||
| 1445 | |||
| 1446 | # | ||
| 1447 | # Crypto core or helper | ||
| 1448 | # | ||
| 1449 | # CONFIG_CRYPTO_FIPS is not set | ||
| 1450 | CONFIG_CRYPTO_ALGAPI=y | ||
| 1451 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 1452 | CONFIG_CRYPTO_AEAD2=y | ||
| 1453 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 1454 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 1455 | CONFIG_CRYPTO_HASH2=y | ||
| 1456 | CONFIG_CRYPTO_RNG2=y | ||
| 1457 | CONFIG_CRYPTO_PCOMP=y | ||
| 1458 | CONFIG_CRYPTO_MANAGER=y | ||
| 1459 | CONFIG_CRYPTO_MANAGER2=y | ||
| 1460 | # CONFIG_CRYPTO_GF128MUL is not set | ||
| 1461 | # CONFIG_CRYPTO_NULL is not set | ||
| 1462 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 1463 | # CONFIG_CRYPTO_CRYPTD is not set | ||
| 1464 | # CONFIG_CRYPTO_AUTHENC is not set | ||
| 1465 | # CONFIG_CRYPTO_TEST is not set | ||
| 1466 | |||
| 1467 | # | ||
| 1468 | # Authenticated Encryption with Associated Data | ||
| 1469 | # | ||
| 1470 | # CONFIG_CRYPTO_CCM is not set | ||
| 1471 | # CONFIG_CRYPTO_GCM is not set | ||
| 1472 | # CONFIG_CRYPTO_SEQIV is not set | ||
| 1473 | |||
| 1474 | # | ||
| 1475 | # Block modes | ||
| 1476 | # | ||
| 1477 | CONFIG_CRYPTO_CBC=y | ||
| 1478 | # CONFIG_CRYPTO_CTR is not set | ||
| 1479 | # CONFIG_CRYPTO_CTS is not set | ||
| 1480 | # CONFIG_CRYPTO_ECB is not set | ||
| 1481 | # CONFIG_CRYPTO_LRW is not set | ||
| 1482 | # CONFIG_CRYPTO_PCBC is not set | ||
| 1483 | # CONFIG_CRYPTO_XTS is not set | ||
| 1484 | |||
| 1485 | # | ||
| 1486 | # Hash modes | ||
| 1487 | # | ||
| 1488 | # CONFIG_CRYPTO_HMAC is not set | ||
| 1489 | # CONFIG_CRYPTO_XCBC is not set | ||
| 1490 | |||
| 1491 | # | ||
| 1492 | # Digest | ||
| 1493 | # | ||
| 1494 | # CONFIG_CRYPTO_CRC32C is not set | ||
| 1495 | # CONFIG_CRYPTO_MD4 is not set | ||
| 1496 | # CONFIG_CRYPTO_MD5 is not set | ||
| 1497 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
| 1498 | # CONFIG_CRYPTO_RMD128 is not set | ||
| 1499 | # CONFIG_CRYPTO_RMD160 is not set | ||
| 1500 | # CONFIG_CRYPTO_RMD256 is not set | ||
| 1501 | # CONFIG_CRYPTO_RMD320 is not set | ||
| 1502 | # CONFIG_CRYPTO_SHA1 is not set | ||
| 1503 | # CONFIG_CRYPTO_SHA256 is not set | ||
| 1504 | # CONFIG_CRYPTO_SHA512 is not set | ||
| 1505 | # CONFIG_CRYPTO_TGR192 is not set | ||
| 1506 | # CONFIG_CRYPTO_WP512 is not set | ||
| 1507 | |||
| 1508 | # | ||
| 1509 | # Ciphers | ||
| 1510 | # | ||
| 1511 | # CONFIG_CRYPTO_AES is not set | ||
| 1512 | # CONFIG_CRYPTO_ANUBIS is not set | ||
| 1513 | # CONFIG_CRYPTO_ARC4 is not set | ||
| 1514 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
| 1515 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
| 1516 | # CONFIG_CRYPTO_CAST5 is not set | ||
| 1517 | # CONFIG_CRYPTO_CAST6 is not set | ||
| 1518 | # CONFIG_CRYPTO_DES is not set | ||
| 1519 | # CONFIG_CRYPTO_FCRYPT is not set | ||
| 1520 | # CONFIG_CRYPTO_KHAZAD is not set | ||
| 1521 | # CONFIG_CRYPTO_SALSA20 is not set | ||
| 1522 | # CONFIG_CRYPTO_SEED is not set | ||
| 1523 | # CONFIG_CRYPTO_SERPENT is not set | ||
| 1524 | # CONFIG_CRYPTO_TEA is not set | ||
| 1525 | # CONFIG_CRYPTO_TWOFISH is not set | ||
| 1526 | |||
| 1527 | # | ||
| 1528 | # Compression | ||
| 1529 | # | ||
| 1530 | # CONFIG_CRYPTO_DEFLATE is not set | ||
| 1531 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 1532 | # CONFIG_CRYPTO_LZO is not set | ||
| 1533 | |||
| 1534 | # | ||
| 1535 | # Random Number Generation | ||
| 1536 | # | ||
| 1537 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
| 1538 | CONFIG_CRYPTO_HW=y | ||
| 1539 | # CONFIG_BINARY_PRINTF is not set | ||
| 1540 | |||
| 1541 | # | ||
| 1542 | # Library routines | ||
| 1543 | # | ||
| 1544 | CONFIG_BITREVERSE=y | ||
| 1545 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1546 | # CONFIG_CRC_CCITT is not set | ||
| 1547 | # CONFIG_CRC16 is not set | ||
| 1548 | CONFIG_CRC_T10DIF=y | ||
| 1549 | CONFIG_CRC_ITU_T=y | ||
| 1550 | CONFIG_CRC32=y | ||
| 1551 | CONFIG_CRC7=y | ||
| 1552 | # CONFIG_LIBCRC32C is not set | ||
| 1553 | CONFIG_HAS_IOMEM=y | ||
| 1554 | CONFIG_HAS_IOPORT=y | ||
| 1555 | CONFIG_HAS_DMA=y | ||
| 1556 | CONFIG_HAVE_LMB=y | ||
| 1557 | CONFIG_NLATTR=y | ||
| 1558 | CONFIG_GENERIC_ATOMIC64=y | ||
diff --git a/arch/sh/configs/kfr2r09-romimage_defconfig b/arch/sh/configs/kfr2r09-romimage_defconfig new file mode 100644 index 000000000000..c0f9263e1387 --- /dev/null +++ b/arch/sh/configs/kfr2r09-romimage_defconfig | |||
| @@ -0,0 +1,774 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.31-rc6 | ||
| 4 | # Thu Aug 20 15:09:16 2009 | ||
| 5 | # | ||
| 6 | CONFIG_SUPERH=y | ||
| 7 | CONFIG_SUPERH32=y | ||
| 8 | # CONFIG_SUPERH64 is not set | ||
| 9 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
| 10 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 11 | CONFIG_GENERIC_BUG=y | ||
| 12 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 13 | CONFIG_GENERIC_HWEIGHT=y | ||
| 14 | CONFIG_GENERIC_HARDIRQS=y | ||
| 15 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 16 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 17 | CONFIG_IRQ_PER_CPU=y | ||
| 18 | CONFIG_GENERIC_GPIO=y | ||
| 19 | CONFIG_GENERIC_TIME=y | ||
| 20 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 21 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 22 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 23 | CONFIG_SYS_SUPPORTS_CMT=y | ||
| 24 | CONFIG_SYS_SUPPORTS_TMU=y | ||
| 25 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 26 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 27 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 28 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 29 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 30 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 31 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | ||
| 32 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
| 33 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 34 | CONFIG_CONSTRUCTORS=y | ||
| 35 | |||
| 36 | # | ||
| 37 | # General setup | ||
| 38 | # | ||
| 39 | CONFIG_EXPERIMENTAL=y | ||
| 40 | CONFIG_BROKEN_ON_SMP=y | ||
| 41 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 42 | CONFIG_LOCALVERSION="" | ||
| 43 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 44 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 45 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
| 46 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 47 | CONFIG_KERNEL_GZIP=y | ||
| 48 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 49 | # CONFIG_KERNEL_LZMA is not set | ||
| 50 | CONFIG_SYSVIPC=y | ||
| 51 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 52 | # CONFIG_POSIX_MQUEUE is not set | ||
| 53 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 54 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 55 | # CONFIG_TASKSTATS is not set | ||
| 56 | # CONFIG_AUDIT is not set | ||
| 57 | |||
| 58 | # | ||
| 59 | # RCU Subsystem | ||
| 60 | # | ||
| 61 | CONFIG_CLASSIC_RCU=y | ||
| 62 | # CONFIG_TREE_RCU is not set | ||
| 63 | # CONFIG_PREEMPT_RCU is not set | ||
| 64 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 65 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 66 | CONFIG_IKCONFIG=y | ||
| 67 | CONFIG_IKCONFIG_PROC=y | ||
| 68 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 69 | CONFIG_GROUP_SCHED=y | ||
| 70 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 71 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 72 | CONFIG_USER_SCHED=y | ||
| 73 | # CONFIG_CGROUP_SCHED is not set | ||
| 74 | # CONFIG_CGROUPS is not set | ||
| 75 | CONFIG_SYSFS_DEPRECATED=y | ||
| 76 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 77 | # CONFIG_RELAY is not set | ||
| 78 | # CONFIG_NAMESPACES is not set | ||
| 79 | CONFIG_BLK_DEV_INITRD=y | ||
| 80 | CONFIG_INITRAMFS_SOURCE="" | ||
| 81 | CONFIG_INITRAMFS_ROOT_UID=0 | ||
| 82 | CONFIG_INITRAMFS_ROOT_GID=0 | ||
| 83 | CONFIG_RD_GZIP=y | ||
| 84 | # CONFIG_RD_BZIP2 is not set | ||
| 85 | # CONFIG_RD_LZMA is not set | ||
| 86 | # CONFIG_INITRAMFS_COMPRESSION_NONE is not set | ||
| 87 | CONFIG_INITRAMFS_COMPRESSION_GZIP=y | ||
| 88 | # CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set | ||
| 89 | # CONFIG_INITRAMFS_COMPRESSION_LZMA is not set | ||
| 90 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 91 | CONFIG_SYSCTL=y | ||
| 92 | CONFIG_ANON_INODES=y | ||
| 93 | CONFIG_EMBEDDED=y | ||
| 94 | CONFIG_UID16=y | ||
| 95 | CONFIG_SYSCTL_SYSCALL=y | ||
| 96 | # CONFIG_KALLSYMS is not set | ||
| 97 | CONFIG_HOTPLUG=y | ||
| 98 | CONFIG_PRINTK=y | ||
| 99 | CONFIG_BUG=y | ||
| 100 | CONFIG_ELF_CORE=y | ||
| 101 | CONFIG_BASE_FULL=y | ||
| 102 | CONFIG_FUTEX=y | ||
| 103 | CONFIG_EPOLL=y | ||
| 104 | CONFIG_SIGNALFD=y | ||
| 105 | CONFIG_TIMERFD=y | ||
| 106 | CONFIG_EVENTFD=y | ||
| 107 | CONFIG_SHMEM=y | ||
| 108 | CONFIG_AIO=y | ||
| 109 | CONFIG_HAVE_PERF_COUNTERS=y | ||
| 110 | |||
| 111 | # | ||
| 112 | # Performance Counters | ||
| 113 | # | ||
| 114 | # CONFIG_PERF_COUNTERS is not set | ||
| 115 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 116 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 117 | CONFIG_COMPAT_BRK=y | ||
| 118 | CONFIG_SLAB=y | ||
| 119 | # CONFIG_SLUB is not set | ||
| 120 | # CONFIG_SLOB is not set | ||
| 121 | # CONFIG_PROFILING is not set | ||
| 122 | # CONFIG_MARKERS is not set | ||
| 123 | CONFIG_HAVE_OPROFILE=y | ||
| 124 | CONFIG_HAVE_IOREMAP_PROT=y | ||
| 125 | CONFIG_HAVE_KPROBES=y | ||
| 126 | CONFIG_HAVE_KRETPROBES=y | ||
| 127 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 128 | CONFIG_HAVE_CLK=y | ||
| 129 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
| 130 | |||
| 131 | # | ||
| 132 | # GCOV-based kernel profiling | ||
| 133 | # | ||
| 134 | # CONFIG_GCOV_KERNEL is not set | ||
| 135 | # CONFIG_SLOW_WORK is not set | ||
| 136 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 137 | CONFIG_SLABINFO=y | ||
| 138 | CONFIG_RT_MUTEXES=y | ||
| 139 | CONFIG_BASE_SMALL=0 | ||
| 140 | # CONFIG_MODULES is not set | ||
| 141 | # CONFIG_BLOCK is not set | ||
| 142 | # CONFIG_FREEZER is not set | ||
| 143 | |||
| 144 | # | ||
| 145 | # System type | ||
| 146 | # | ||
| 147 | CONFIG_CPU_SH4=y | ||
| 148 | CONFIG_CPU_SH4A=y | ||
| 149 | CONFIG_CPU_SHX2=y | ||
| 150 | CONFIG_ARCH_SHMOBILE=y | ||
| 151 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
| 152 | # CONFIG_CPU_SUBTYPE_SH7201 is not set | ||
| 153 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
| 154 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
| 155 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
| 156 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
| 157 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | ||
| 158 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
| 159 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
| 160 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
| 161 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
| 162 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
| 163 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
| 164 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
| 165 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
| 166 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
| 167 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
| 168 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
| 169 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
| 170 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
| 171 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
| 172 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
| 173 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
| 174 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
| 175 | CONFIG_CPU_SUBTYPE_SH7724=y | ||
| 176 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
| 177 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
| 178 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
| 179 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
| 180 | # CONFIG_CPU_SUBTYPE_SH7786 is not set | ||
| 181 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
| 182 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
| 183 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
| 184 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | ||
| 185 | |||
| 186 | # | ||
| 187 | # Memory management options | ||
| 188 | # | ||
| 189 | CONFIG_QUICKLIST=y | ||
| 190 | CONFIG_MMU=y | ||
| 191 | CONFIG_PAGE_OFFSET=0x80000000 | ||
| 192 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
| 193 | CONFIG_MEMORY_START=0x08000000 | ||
| 194 | CONFIG_MEMORY_SIZE=0x08000000 | ||
| 195 | CONFIG_29BIT=y | ||
| 196 | # CONFIG_X2TLB is not set | ||
| 197 | CONFIG_VSYSCALL=y | ||
| 198 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 199 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 200 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 201 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
| 202 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 203 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 204 | CONFIG_PAGE_SIZE_4KB=y | ||
| 205 | # CONFIG_PAGE_SIZE_8KB is not set | ||
| 206 | # CONFIG_PAGE_SIZE_16KB is not set | ||
| 207 | # CONFIG_PAGE_SIZE_64KB is not set | ||
| 208 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 209 | CONFIG_FLATMEM_MANUAL=y | ||
| 210 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 211 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 212 | CONFIG_FLATMEM=y | ||
| 213 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 214 | CONFIG_SPARSEMEM_STATIC=y | ||
| 215 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 216 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 217 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 218 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 219 | CONFIG_NR_QUICK=2 | ||
| 220 | CONFIG_HAVE_MLOCK=y | ||
| 221 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 222 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 223 | |||
| 224 | # | ||
| 225 | # Cache configuration | ||
| 226 | # | ||
| 227 | CONFIG_CACHE_WRITEBACK=y | ||
| 228 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
| 229 | # CONFIG_CACHE_OFF is not set | ||
| 230 | |||
| 231 | # | ||
| 232 | # Processor features | ||
| 233 | # | ||
| 234 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
| 235 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
| 236 | CONFIG_SH_FPU=y | ||
| 237 | # CONFIG_SH_STORE_QUEUES is not set | ||
| 238 | CONFIG_CPU_HAS_INTEVT=y | ||
| 239 | CONFIG_CPU_HAS_SR_RB=y | ||
| 240 | CONFIG_CPU_HAS_FPU=y | ||
| 241 | |||
| 242 | # | ||
| 243 | # Board support | ||
| 244 | # | ||
| 245 | # CONFIG_SH_7724_SOLUTION_ENGINE is not set | ||
| 246 | CONFIG_SH_KFR2R09=y | ||
| 247 | # CONFIG_SH_ECOVEC is not set | ||
| 248 | |||
| 249 | # | ||
| 250 | # Timer and clock configuration | ||
| 251 | # | ||
| 252 | # CONFIG_SH_TIMER_TMU is not set | ||
| 253 | CONFIG_SH_TIMER_CMT=y | ||
| 254 | CONFIG_SH_PCLK_FREQ=33333333 | ||
| 255 | CONFIG_SH_CLK_CPG=y | ||
| 256 | # CONFIG_NO_HZ is not set | ||
| 257 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 258 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 259 | |||
| 260 | # | ||
| 261 | # CPU Frequency scaling | ||
| 262 | # | ||
| 263 | # CONFIG_CPU_FREQ is not set | ||
| 264 | |||
| 265 | # | ||
| 266 | # DMA support | ||
| 267 | # | ||
| 268 | # CONFIG_SH_DMA is not set | ||
| 269 | |||
| 270 | # | ||
| 271 | # Companion Chips | ||
| 272 | # | ||
| 273 | |||
| 274 | # | ||
| 275 | # Additional SuperH Device Drivers | ||
| 276 | # | ||
| 277 | # CONFIG_HEARTBEAT is not set | ||
| 278 | # CONFIG_PUSH_SWITCH is not set | ||
| 279 | |||
| 280 | # | ||
| 281 | # Kernel features | ||
| 282 | # | ||
| 283 | CONFIG_HZ_100=y | ||
| 284 | # CONFIG_HZ_250 is not set | ||
| 285 | # CONFIG_HZ_300 is not set | ||
| 286 | # CONFIG_HZ_1000 is not set | ||
| 287 | CONFIG_HZ=100 | ||
| 288 | # CONFIG_SCHED_HRTICK is not set | ||
| 289 | CONFIG_KEXEC=y | ||
| 290 | # CONFIG_CRASH_DUMP is not set | ||
| 291 | # CONFIG_SECCOMP is not set | ||
| 292 | CONFIG_PREEMPT_NONE=y | ||
| 293 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 294 | # CONFIG_PREEMPT is not set | ||
| 295 | CONFIG_GUSA=y | ||
| 296 | # CONFIG_SPARSE_IRQ is not set | ||
| 297 | |||
| 298 | # | ||
| 299 | # Boot options | ||
| 300 | # | ||
| 301 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
| 302 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
| 303 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
| 304 | CONFIG_CMDLINE_BOOL=y | ||
| 305 | CONFIG_CMDLINE="console=ttySC1,115200 quiet" | ||
| 306 | |||
| 307 | # | ||
| 308 | # Bus options | ||
| 309 | # | ||
| 310 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 311 | # CONFIG_PCCARD is not set | ||
| 312 | |||
| 313 | # | ||
| 314 | # Executable file formats | ||
| 315 | # | ||
| 316 | CONFIG_BINFMT_ELF=y | ||
| 317 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 318 | # CONFIG_HAVE_AOUT is not set | ||
| 319 | # CONFIG_BINFMT_MISC is not set | ||
| 320 | |||
| 321 | # | ||
| 322 | # Power management options (EXPERIMENTAL) | ||
| 323 | # | ||
| 324 | CONFIG_PM=y | ||
| 325 | # CONFIG_PM_DEBUG is not set | ||
| 326 | # CONFIG_SUSPEND is not set | ||
| 327 | # CONFIG_CPU_IDLE is not set | ||
| 328 | CONFIG_NET=y | ||
| 329 | |||
| 330 | # | ||
| 331 | # Networking options | ||
| 332 | # | ||
| 333 | CONFIG_PACKET=y | ||
| 334 | CONFIG_PACKET_MMAP=y | ||
| 335 | CONFIG_UNIX=y | ||
| 336 | # CONFIG_NET_KEY is not set | ||
| 337 | CONFIG_INET=y | ||
| 338 | # CONFIG_IP_MULTICAST is not set | ||
| 339 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 340 | CONFIG_IP_FIB_HASH=y | ||
| 341 | # CONFIG_IP_PNP is not set | ||
| 342 | # CONFIG_NET_IPIP is not set | ||
| 343 | # CONFIG_NET_IPGRE is not set | ||
| 344 | # CONFIG_ARPD is not set | ||
| 345 | # CONFIG_SYN_COOKIES is not set | ||
| 346 | # CONFIG_INET_AH is not set | ||
| 347 | # CONFIG_INET_ESP is not set | ||
| 348 | # CONFIG_INET_IPCOMP is not set | ||
| 349 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 350 | # CONFIG_INET_TUNNEL is not set | ||
| 351 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 352 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 353 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 354 | # CONFIG_INET_LRO is not set | ||
| 355 | # CONFIG_INET_DIAG is not set | ||
| 356 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 357 | CONFIG_TCP_CONG_CUBIC=y | ||
| 358 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 359 | # CONFIG_TCP_MD5SIG is not set | ||
| 360 | # CONFIG_IPV6 is not set | ||
| 361 | # CONFIG_NETWORK_SECMARK is not set | ||
| 362 | # CONFIG_NETFILTER is not set | ||
| 363 | # CONFIG_IP_DCCP is not set | ||
| 364 | # CONFIG_IP_SCTP is not set | ||
| 365 | # CONFIG_TIPC is not set | ||
| 366 | # CONFIG_ATM is not set | ||
| 367 | # CONFIG_BRIDGE is not set | ||
| 368 | # CONFIG_NET_DSA is not set | ||
| 369 | # CONFIG_VLAN_8021Q is not set | ||
| 370 | # CONFIG_DECNET is not set | ||
| 371 | # CONFIG_LLC2 is not set | ||
| 372 | # CONFIG_IPX is not set | ||
| 373 | # CONFIG_ATALK is not set | ||
| 374 | # CONFIG_X25 is not set | ||
| 375 | # CONFIG_LAPB is not set | ||
| 376 | # CONFIG_ECONET is not set | ||
| 377 | # CONFIG_WAN_ROUTER is not set | ||
| 378 | # CONFIG_PHONET is not set | ||
| 379 | # CONFIG_IEEE802154 is not set | ||
| 380 | # CONFIG_NET_SCHED is not set | ||
| 381 | # CONFIG_DCB is not set | ||
| 382 | |||
| 383 | # | ||
| 384 | # Network testing | ||
| 385 | # | ||
| 386 | # CONFIG_NET_PKTGEN is not set | ||
| 387 | # CONFIG_HAMRADIO is not set | ||
| 388 | # CONFIG_CAN is not set | ||
| 389 | # CONFIG_IRDA is not set | ||
| 390 | # CONFIG_BT is not set | ||
| 391 | # CONFIG_AF_RXRPC is not set | ||
| 392 | # CONFIG_WIRELESS is not set | ||
| 393 | # CONFIG_WIMAX is not set | ||
| 394 | # CONFIG_RFKILL is not set | ||
| 395 | # CONFIG_NET_9P is not set | ||
| 396 | |||
| 397 | # | ||
| 398 | # Device Drivers | ||
| 399 | # | ||
| 400 | |||
| 401 | # | ||
| 402 | # Generic Driver Options | ||
| 403 | # | ||
| 404 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 405 | CONFIG_STANDALONE=y | ||
| 406 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 407 | CONFIG_FW_LOADER=y | ||
| 408 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 409 | CONFIG_EXTRA_FIRMWARE="" | ||
| 410 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 411 | # CONFIG_CONNECTOR is not set | ||
| 412 | # CONFIG_MTD is not set | ||
| 413 | # CONFIG_PARPORT is not set | ||
| 414 | # CONFIG_MISC_DEVICES is not set | ||
| 415 | CONFIG_HAVE_IDE=y | ||
| 416 | |||
| 417 | # | ||
| 418 | # SCSI device support | ||
| 419 | # | ||
| 420 | # CONFIG_SCSI_DMA is not set | ||
| 421 | # CONFIG_SCSI_NETLINK is not set | ||
| 422 | # CONFIG_NETDEVICES is not set | ||
| 423 | # CONFIG_ISDN is not set | ||
| 424 | # CONFIG_PHONE is not set | ||
| 425 | |||
| 426 | # | ||
| 427 | # Input device support | ||
| 428 | # | ||
| 429 | CONFIG_INPUT=y | ||
| 430 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 431 | # CONFIG_INPUT_POLLDEV is not set | ||
| 432 | |||
| 433 | # | ||
| 434 | # Userland interfaces | ||
| 435 | # | ||
| 436 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 437 | # CONFIG_INPUT_JOYDEV is not set | ||
| 438 | # CONFIG_INPUT_EVDEV is not set | ||
| 439 | # CONFIG_INPUT_EVBUG is not set | ||
| 440 | |||
| 441 | # | ||
| 442 | # Input Device Drivers | ||
| 443 | # | ||
| 444 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 445 | # CONFIG_INPUT_MOUSE is not set | ||
| 446 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 447 | # CONFIG_INPUT_TABLET is not set | ||
| 448 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 449 | # CONFIG_INPUT_MISC is not set | ||
| 450 | |||
| 451 | # | ||
| 452 | # Hardware I/O ports | ||
| 453 | # | ||
| 454 | # CONFIG_SERIO is not set | ||
| 455 | # CONFIG_GAMEPORT is not set | ||
| 456 | |||
| 457 | # | ||
| 458 | # Character devices | ||
| 459 | # | ||
| 460 | CONFIG_VT=y | ||
| 461 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 462 | CONFIG_VT_CONSOLE=y | ||
| 463 | CONFIG_HW_CONSOLE=y | ||
| 464 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 465 | CONFIG_DEVKMEM=y | ||
| 466 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 467 | |||
| 468 | # | ||
| 469 | # Serial drivers | ||
| 470 | # | ||
| 471 | # CONFIG_SERIAL_8250 is not set | ||
| 472 | |||
| 473 | # | ||
| 474 | # Non-8250 serial port support | ||
| 475 | # | ||
| 476 | CONFIG_SERIAL_SH_SCI=y | ||
| 477 | CONFIG_SERIAL_SH_SCI_NR_UARTS=6 | ||
| 478 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
| 479 | CONFIG_SERIAL_CORE=y | ||
| 480 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 481 | CONFIG_UNIX98_PTYS=y | ||
| 482 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 483 | CONFIG_LEGACY_PTYS=y | ||
| 484 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 485 | # CONFIG_IPMI_HANDLER is not set | ||
| 486 | CONFIG_HW_RANDOM=y | ||
| 487 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 488 | # CONFIG_R3964 is not set | ||
| 489 | # CONFIG_TCG_TPM is not set | ||
| 490 | CONFIG_I2C=y | ||
| 491 | CONFIG_I2C_BOARDINFO=y | ||
| 492 | # CONFIG_I2C_CHARDEV is not set | ||
| 493 | CONFIG_I2C_HELPER_AUTO=y | ||
| 494 | |||
| 495 | # | ||
| 496 | # I2C Hardware Bus support | ||
| 497 | # | ||
| 498 | |||
| 499 | # | ||
| 500 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 501 | # | ||
| 502 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 503 | # CONFIG_I2C_GPIO is not set | ||
| 504 | # CONFIG_I2C_OCORES is not set | ||
| 505 | CONFIG_I2C_SH_MOBILE=y | ||
| 506 | # CONFIG_I2C_SIMTEC is not set | ||
| 507 | |||
| 508 | # | ||
| 509 | # External I2C/SMBus adapter drivers | ||
| 510 | # | ||
| 511 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 512 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 513 | |||
| 514 | # | ||
| 515 | # Other I2C/SMBus bus drivers | ||
| 516 | # | ||
| 517 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 518 | |||
| 519 | # | ||
| 520 | # Miscellaneous I2C Chip support | ||
| 521 | # | ||
| 522 | # CONFIG_DS1682 is not set | ||
| 523 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 524 | # CONFIG_PCF8575 is not set | ||
| 525 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 526 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 527 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 528 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 529 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 530 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 531 | # CONFIG_SPI is not set | ||
| 532 | |||
| 533 | # | ||
| 534 | # PPS support | ||
| 535 | # | ||
| 536 | # CONFIG_PPS is not set | ||
| 537 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 538 | CONFIG_GPIOLIB=y | ||
| 539 | CONFIG_GPIO_SYSFS=y | ||
| 540 | |||
| 541 | # | ||
| 542 | # Memory mapped GPIO expanders: | ||
| 543 | # | ||
| 544 | |||
| 545 | # | ||
| 546 | # I2C GPIO expanders: | ||
| 547 | # | ||
| 548 | # CONFIG_GPIO_MAX732X is not set | ||
| 549 | # CONFIG_GPIO_PCA953X is not set | ||
| 550 | # CONFIG_GPIO_PCF857X is not set | ||
| 551 | |||
| 552 | # | ||
| 553 | # PCI GPIO expanders: | ||
| 554 | # | ||
| 555 | |||
| 556 | # | ||
| 557 | # SPI GPIO expanders: | ||
| 558 | # | ||
| 559 | # CONFIG_W1 is not set | ||
| 560 | # CONFIG_POWER_SUPPLY is not set | ||
| 561 | # CONFIG_HWMON is not set | ||
| 562 | # CONFIG_THERMAL is not set | ||
| 563 | # CONFIG_THERMAL_HWMON is not set | ||
| 564 | # CONFIG_WATCHDOG is not set | ||
| 565 | CONFIG_SSB_POSSIBLE=y | ||
| 566 | |||
| 567 | # | ||
| 568 | # Sonics Silicon Backplane | ||
| 569 | # | ||
| 570 | # CONFIG_SSB is not set | ||
| 571 | |||
| 572 | # | ||
| 573 | # Multifunction device drivers | ||
| 574 | # | ||
| 575 | # CONFIG_MFD_CORE is not set | ||
| 576 | # CONFIG_MFD_SM501 is not set | ||
| 577 | # CONFIG_HTC_PASIC3 is not set | ||
| 578 | # CONFIG_TPS65010 is not set | ||
| 579 | # CONFIG_TWL4030_CORE is not set | ||
| 580 | # CONFIG_MFD_TMIO is not set | ||
| 581 | # CONFIG_PMIC_DA903X is not set | ||
| 582 | # CONFIG_MFD_WM8400 is not set | ||
| 583 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 584 | # CONFIG_MFD_PCF50633 is not set | ||
| 585 | # CONFIG_AB3100_CORE is not set | ||
| 586 | # CONFIG_REGULATOR is not set | ||
| 587 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 588 | |||
| 589 | # | ||
| 590 | # Graphics support | ||
| 591 | # | ||
| 592 | # CONFIG_VGASTATE is not set | ||
| 593 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 594 | # CONFIG_FB is not set | ||
| 595 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 596 | |||
| 597 | # | ||
| 598 | # Display device support | ||
| 599 | # | ||
| 600 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 601 | |||
| 602 | # | ||
| 603 | # Console display driver support | ||
| 604 | # | ||
| 605 | CONFIG_DUMMY_CONSOLE=y | ||
| 606 | # CONFIG_SOUND is not set | ||
| 607 | # CONFIG_HID_SUPPORT is not set | ||
| 608 | CONFIG_USB_SUPPORT=y | ||
| 609 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 610 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 611 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 612 | # CONFIG_USB is not set | ||
| 613 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 614 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 615 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 616 | |||
| 617 | # | ||
| 618 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 619 | # | ||
| 620 | CONFIG_USB_GADGET=y | ||
| 621 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 622 | # CONFIG_USB_GADGET_DEBUG_FS is not set | ||
| 623 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 624 | CONFIG_USB_GADGET_SELECTED=y | ||
| 625 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 626 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 627 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 628 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 629 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 630 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 631 | CONFIG_USB_GADGET_R8A66597=y | ||
| 632 | CONFIG_USB_R8A66597=y | ||
| 633 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 634 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 635 | # CONFIG_USB_GADGET_IMX is not set | ||
| 636 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 637 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 638 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 639 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 640 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 641 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 642 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 643 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 644 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 645 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 646 | # CONFIG_USB_ZERO is not set | ||
| 647 | # CONFIG_USB_AUDIO is not set | ||
| 648 | # CONFIG_USB_ETH is not set | ||
| 649 | # CONFIG_USB_GADGETFS is not set | ||
| 650 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 651 | # CONFIG_USB_G_SERIAL is not set | ||
| 652 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 653 | # CONFIG_USB_G_PRINTER is not set | ||
| 654 | CONFIG_USB_CDC_COMPOSITE=y | ||
| 655 | |||
| 656 | # | ||
| 657 | # OTG and related infrastructure | ||
| 658 | # | ||
| 659 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 660 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 661 | # CONFIG_MMC is not set | ||
| 662 | # CONFIG_MEMSTICK is not set | ||
| 663 | # CONFIG_NEW_LEDS is not set | ||
| 664 | # CONFIG_ACCESSIBILITY is not set | ||
| 665 | CONFIG_RTC_LIB=y | ||
| 666 | # CONFIG_RTC_CLASS is not set | ||
| 667 | # CONFIG_DMADEVICES is not set | ||
| 668 | # CONFIG_AUXDISPLAY is not set | ||
| 669 | # CONFIG_UIO is not set | ||
| 670 | |||
| 671 | # | ||
| 672 | # TI VLYNQ | ||
| 673 | # | ||
| 674 | # CONFIG_STAGING is not set | ||
| 675 | |||
| 676 | # | ||
| 677 | # File systems | ||
| 678 | # | ||
| 679 | CONFIG_FILE_LOCKING=y | ||
| 680 | # CONFIG_FSNOTIFY is not set | ||
| 681 | # CONFIG_DNOTIFY is not set | ||
| 682 | # CONFIG_INOTIFY is not set | ||
| 683 | # CONFIG_INOTIFY_USER is not set | ||
| 684 | # CONFIG_QUOTA is not set | ||
| 685 | # CONFIG_AUTOFS_FS is not set | ||
| 686 | # CONFIG_AUTOFS4_FS is not set | ||
| 687 | # CONFIG_FUSE_FS is not set | ||
| 688 | |||
| 689 | # | ||
| 690 | # Caches | ||
| 691 | # | ||
| 692 | # CONFIG_FSCACHE is not set | ||
| 693 | |||
| 694 | # | ||
| 695 | # Pseudo filesystems | ||
| 696 | # | ||
| 697 | CONFIG_PROC_FS=y | ||
| 698 | CONFIG_PROC_KCORE=y | ||
| 699 | CONFIG_PROC_SYSCTL=y | ||
| 700 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 701 | CONFIG_SYSFS=y | ||
| 702 | CONFIG_TMPFS=y | ||
| 703 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 704 | # CONFIG_HUGETLBFS is not set | ||
| 705 | # CONFIG_HUGETLB_PAGE is not set | ||
| 706 | # CONFIG_CONFIGFS_FS is not set | ||
| 707 | # CONFIG_MISC_FILESYSTEMS is not set | ||
| 708 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
| 709 | # CONFIG_NLS is not set | ||
| 710 | # CONFIG_DLM is not set | ||
| 711 | |||
| 712 | # | ||
| 713 | # Kernel hacking | ||
| 714 | # | ||
| 715 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 716 | # CONFIG_PRINTK_TIME is not set | ||
| 717 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 718 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 719 | CONFIG_FRAME_WARN=1024 | ||
| 720 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 721 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 722 | CONFIG_DEBUG_FS=y | ||
| 723 | # CONFIG_HEADERS_CHECK is not set | ||
| 724 | # CONFIG_DEBUG_KERNEL is not set | ||
| 725 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 726 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 727 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 728 | # CONFIG_LATENCYTOP is not set | ||
| 729 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 730 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 731 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 732 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 733 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 734 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 735 | CONFIG_HAVE_FTRACE_SYSCALLS=y | ||
| 736 | CONFIG_TRACING_SUPPORT=y | ||
| 737 | # CONFIG_FTRACE is not set | ||
| 738 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 739 | # CONFIG_DMA_API_DEBUG is not set | ||
| 740 | # CONFIG_SAMPLES is not set | ||
| 741 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 742 | # CONFIG_SH_STANDARD_BIOS is not set | ||
| 743 | # CONFIG_EARLY_SCIF_CONSOLE is not set | ||
| 744 | # CONFIG_DWARF_UNWINDER is not set | ||
| 745 | |||
| 746 | # | ||
| 747 | # Security options | ||
| 748 | # | ||
| 749 | # CONFIG_KEYS is not set | ||
| 750 | # CONFIG_SECURITY is not set | ||
| 751 | # CONFIG_SECURITYFS is not set | ||
| 752 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 753 | # CONFIG_CRYPTO is not set | ||
| 754 | # CONFIG_BINARY_PRINTF is not set | ||
| 755 | |||
| 756 | # | ||
| 757 | # Library routines | ||
| 758 | # | ||
| 759 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 760 | # CONFIG_CRC_CCITT is not set | ||
| 761 | # CONFIG_CRC16 is not set | ||
| 762 | # CONFIG_CRC_T10DIF is not set | ||
| 763 | # CONFIG_CRC_ITU_T is not set | ||
| 764 | # CONFIG_CRC32 is not set | ||
| 765 | # CONFIG_CRC7 is not set | ||
| 766 | # CONFIG_LIBCRC32C is not set | ||
| 767 | CONFIG_ZLIB_INFLATE=y | ||
| 768 | CONFIG_DECOMPRESS_GZIP=y | ||
| 769 | CONFIG_HAS_IOMEM=y | ||
| 770 | CONFIG_HAS_IOPORT=y | ||
| 771 | CONFIG_HAS_DMA=y | ||
| 772 | CONFIG_HAVE_LMB=y | ||
| 773 | CONFIG_NLATTR=y | ||
| 774 | CONFIG_GENERIC_ATOMIC64=y | ||
diff --git a/arch/sh/configs/kfr2r09_defconfig b/arch/sh/configs/kfr2r09_defconfig new file mode 100644 index 000000000000..cef61319d2f4 --- /dev/null +++ b/arch/sh/configs/kfr2r09_defconfig | |||
| @@ -0,0 +1,1059 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux kernel version: 2.6.31-rc6 | ||
| 4 | # Thu Aug 20 21:58:52 2009 | ||
| 5 | # | ||
| 6 | CONFIG_SUPERH=y | ||
| 7 | CONFIG_SUPERH32=y | ||
| 8 | # CONFIG_SUPERH64 is not set | ||
| 9 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | ||
| 10 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 11 | CONFIG_GENERIC_BUG=y | ||
| 12 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
| 13 | CONFIG_GENERIC_HWEIGHT=y | ||
| 14 | CONFIG_GENERIC_HARDIRQS=y | ||
| 15 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
| 16 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 17 | CONFIG_IRQ_PER_CPU=y | ||
| 18 | CONFIG_GENERIC_GPIO=y | ||
| 19 | CONFIG_GENERIC_TIME=y | ||
| 20 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 21 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 22 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
| 23 | CONFIG_SYS_SUPPORTS_CMT=y | ||
| 24 | CONFIG_SYS_SUPPORTS_TMU=y | ||
| 25 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 26 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 27 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 28 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
| 29 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 30 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | ||
| 31 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | ||
| 32 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
| 33 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 34 | CONFIG_CONSTRUCTORS=y | ||
| 35 | |||
| 36 | # | ||
| 37 | # General setup | ||
| 38 | # | ||
| 39 | CONFIG_EXPERIMENTAL=y | ||
| 40 | CONFIG_BROKEN_ON_SMP=y | ||
| 41 | CONFIG_LOCK_KERNEL=y | ||
| 42 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 43 | CONFIG_LOCALVERSION="" | ||
| 44 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 45 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 46 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
| 47 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 48 | CONFIG_KERNEL_GZIP=y | ||
| 49 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 50 | # CONFIG_KERNEL_LZMA is not set | ||
| 51 | CONFIG_SWAP=y | ||
| 52 | CONFIG_SYSVIPC=y | ||
| 53 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 54 | # CONFIG_POSIX_MQUEUE is not set | ||
| 55 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 56 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 57 | # CONFIG_TASKSTATS is not set | ||
| 58 | # CONFIG_AUDIT is not set | ||
| 59 | |||
| 60 | # | ||
| 61 | # RCU Subsystem | ||
| 62 | # | ||
| 63 | CONFIG_CLASSIC_RCU=y | ||
| 64 | # CONFIG_TREE_RCU is not set | ||
| 65 | # CONFIG_PREEMPT_RCU is not set | ||
| 66 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 67 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 68 | CONFIG_IKCONFIG=y | ||
| 69 | CONFIG_IKCONFIG_PROC=y | ||
| 70 | CONFIG_LOG_BUF_SHIFT=14 | ||
| 71 | CONFIG_GROUP_SCHED=y | ||
| 72 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 73 | # CONFIG_RT_GROUP_SCHED is not set | ||
| 74 | CONFIG_USER_SCHED=y | ||
| 75 | # CONFIG_CGROUP_SCHED is not set | ||
| 76 | # CONFIG_CGROUPS is not set | ||
| 77 | CONFIG_SYSFS_DEPRECATED=y | ||
| 78 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
| 79 | # CONFIG_RELAY is not set | ||
| 80 | # CONFIG_NAMESPACES is not set | ||
| 81 | CONFIG_BLK_DEV_INITRD=y | ||
| 82 | CONFIG_INITRAMFS_SOURCE="" | ||
| 83 | CONFIG_RD_GZIP=y | ||
| 84 | # CONFIG_RD_BZIP2 is not set | ||
| 85 | # CONFIG_RD_LZMA is not set | ||
| 86 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 87 | CONFIG_SYSCTL=y | ||
| 88 | CONFIG_ANON_INODES=y | ||
| 89 | CONFIG_EMBEDDED=y | ||
| 90 | CONFIG_UID16=y | ||
| 91 | CONFIG_SYSCTL_SYSCALL=y | ||
| 92 | # CONFIG_KALLSYMS is not set | ||
| 93 | CONFIG_HOTPLUG=y | ||
| 94 | CONFIG_PRINTK=y | ||
| 95 | CONFIG_BUG=y | ||
| 96 | CONFIG_ELF_CORE=y | ||
| 97 | CONFIG_BASE_FULL=y | ||
| 98 | CONFIG_FUTEX=y | ||
| 99 | CONFIG_EPOLL=y | ||
| 100 | CONFIG_SIGNALFD=y | ||
| 101 | CONFIG_TIMERFD=y | ||
| 102 | CONFIG_EVENTFD=y | ||
| 103 | CONFIG_SHMEM=y | ||
| 104 | CONFIG_AIO=y | ||
| 105 | CONFIG_HAVE_PERF_COUNTERS=y | ||
| 106 | |||
| 107 | # | ||
| 108 | # Performance Counters | ||
| 109 | # | ||
| 110 | # CONFIG_PERF_COUNTERS is not set | ||
| 111 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 112 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 113 | CONFIG_COMPAT_BRK=y | ||
| 114 | CONFIG_SLAB=y | ||
| 115 | # CONFIG_SLUB is not set | ||
| 116 | # CONFIG_SLOB is not set | ||
| 117 | # CONFIG_PROFILING is not set | ||
| 118 | # CONFIG_MARKERS is not set | ||
| 119 | CONFIG_HAVE_OPROFILE=y | ||
| 120 | CONFIG_HAVE_IOREMAP_PROT=y | ||
| 121 | CONFIG_HAVE_KPROBES=y | ||
| 122 | CONFIG_HAVE_KRETPROBES=y | ||
| 123 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
| 124 | CONFIG_HAVE_CLK=y | ||
| 125 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
| 126 | |||
| 127 | # | ||
| 128 | # GCOV-based kernel profiling | ||
| 129 | # | ||
| 130 | # CONFIG_GCOV_KERNEL is not set | ||
| 131 | # CONFIG_SLOW_WORK is not set | ||
| 132 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 133 | CONFIG_SLABINFO=y | ||
| 134 | CONFIG_RT_MUTEXES=y | ||
| 135 | CONFIG_BASE_SMALL=0 | ||
| 136 | CONFIG_MODULES=y | ||
| 137 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
| 138 | CONFIG_MODULE_UNLOAD=y | ||
| 139 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
| 140 | # CONFIG_MODVERSIONS is not set | ||
| 141 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
| 142 | CONFIG_BLOCK=y | ||
| 143 | CONFIG_LBDAF=y | ||
| 144 | # CONFIG_BLK_DEV_BSG is not set | ||
| 145 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
| 146 | |||
| 147 | # | ||
| 148 | # IO Schedulers | ||
| 149 | # | ||
| 150 | CONFIG_IOSCHED_NOOP=y | ||
| 151 | # CONFIG_IOSCHED_AS is not set | ||
| 152 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 153 | # CONFIG_IOSCHED_CFQ is not set | ||
| 154 | # CONFIG_DEFAULT_AS is not set | ||
| 155 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 156 | # CONFIG_DEFAULT_CFQ is not set | ||
| 157 | CONFIG_DEFAULT_NOOP=y | ||
| 158 | CONFIG_DEFAULT_IOSCHED="noop" | ||
| 159 | # CONFIG_FREEZER is not set | ||
| 160 | |||
| 161 | # | ||
| 162 | # System type | ||
| 163 | # | ||
| 164 | CONFIG_CPU_SH4=y | ||
| 165 | CONFIG_CPU_SH4A=y | ||
| 166 | CONFIG_CPU_SHX2=y | ||
| 167 | CONFIG_ARCH_SHMOBILE=y | ||
| 168 | # CONFIG_CPU_SUBTYPE_SH7619 is not set | ||
| 169 | # CONFIG_CPU_SUBTYPE_SH7201 is not set | ||
| 170 | # CONFIG_CPU_SUBTYPE_SH7203 is not set | ||
| 171 | # CONFIG_CPU_SUBTYPE_SH7206 is not set | ||
| 172 | # CONFIG_CPU_SUBTYPE_SH7263 is not set | ||
| 173 | # CONFIG_CPU_SUBTYPE_MXG is not set | ||
| 174 | # CONFIG_CPU_SUBTYPE_SH7705 is not set | ||
| 175 | # CONFIG_CPU_SUBTYPE_SH7706 is not set | ||
| 176 | # CONFIG_CPU_SUBTYPE_SH7707 is not set | ||
| 177 | # CONFIG_CPU_SUBTYPE_SH7708 is not set | ||
| 178 | # CONFIG_CPU_SUBTYPE_SH7709 is not set | ||
| 179 | # CONFIG_CPU_SUBTYPE_SH7710 is not set | ||
| 180 | # CONFIG_CPU_SUBTYPE_SH7712 is not set | ||
| 181 | # CONFIG_CPU_SUBTYPE_SH7720 is not set | ||
| 182 | # CONFIG_CPU_SUBTYPE_SH7721 is not set | ||
| 183 | # CONFIG_CPU_SUBTYPE_SH7750 is not set | ||
| 184 | # CONFIG_CPU_SUBTYPE_SH7091 is not set | ||
| 185 | # CONFIG_CPU_SUBTYPE_SH7750R is not set | ||
| 186 | # CONFIG_CPU_SUBTYPE_SH7750S is not set | ||
| 187 | # CONFIG_CPU_SUBTYPE_SH7751 is not set | ||
| 188 | # CONFIG_CPU_SUBTYPE_SH7751R is not set | ||
| 189 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | ||
| 190 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | ||
| 191 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | ||
| 192 | CONFIG_CPU_SUBTYPE_SH7724=y | ||
| 193 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | ||
| 194 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | ||
| 195 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | ||
| 196 | # CONFIG_CPU_SUBTYPE_SH7785 is not set | ||
| 197 | # CONFIG_CPU_SUBTYPE_SH7786 is not set | ||
| 198 | # CONFIG_CPU_SUBTYPE_SHX3 is not set | ||
| 199 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | ||
| 200 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | ||
| 201 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | ||
| 202 | |||
| 203 | # | ||
| 204 | # Memory management options | ||
| 205 | # | ||
| 206 | CONFIG_QUICKLIST=y | ||
| 207 | CONFIG_MMU=y | ||
| 208 | CONFIG_PAGE_OFFSET=0x80000000 | ||
| 209 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
| 210 | CONFIG_MEMORY_START=0x08000000 | ||
| 211 | CONFIG_MEMORY_SIZE=0x08000000 | ||
| 212 | CONFIG_29BIT=y | ||
| 213 | # CONFIG_X2TLB is not set | ||
| 214 | CONFIG_VSYSCALL=y | ||
| 215 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
| 216 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
| 217 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | ||
| 218 | CONFIG_MAX_ACTIVE_REGIONS=1 | ||
| 219 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
| 220 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | ||
| 221 | CONFIG_PAGE_SIZE_4KB=y | ||
| 222 | # CONFIG_PAGE_SIZE_8KB is not set | ||
| 223 | # CONFIG_PAGE_SIZE_16KB is not set | ||
| 224 | # CONFIG_PAGE_SIZE_64KB is not set | ||
| 225 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 226 | CONFIG_FLATMEM_MANUAL=y | ||
| 227 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
| 228 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
| 229 | CONFIG_FLATMEM=y | ||
| 230 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 231 | CONFIG_SPARSEMEM_STATIC=y | ||
| 232 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 233 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 234 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 235 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 236 | CONFIG_NR_QUICK=2 | ||
| 237 | CONFIG_HAVE_MLOCK=y | ||
| 238 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 239 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 240 | |||
| 241 | # | ||
| 242 | # Cache configuration | ||
| 243 | # | ||
| 244 | CONFIG_CACHE_WRITEBACK=y | ||
| 245 | # CONFIG_CACHE_WRITETHROUGH is not set | ||
| 246 | # CONFIG_CACHE_OFF is not set | ||
| 247 | |||
| 248 | # | ||
| 249 | # Processor features | ||
| 250 | # | ||
| 251 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
| 252 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
| 253 | CONFIG_SH_FPU=y | ||
| 254 | # CONFIG_SH_STORE_QUEUES is not set | ||
| 255 | CONFIG_CPU_HAS_INTEVT=y | ||
| 256 | CONFIG_CPU_HAS_SR_RB=y | ||
| 257 | CONFIG_CPU_HAS_FPU=y | ||
| 258 | |||
| 259 | # | ||
| 260 | # Board support | ||
| 261 | # | ||
| 262 | # CONFIG_SH_7724_SOLUTION_ENGINE is not set | ||
| 263 | CONFIG_SH_KFR2R09=y | ||
| 264 | # CONFIG_SH_ECOVEC is not set | ||
| 265 | |||
| 266 | # | ||
| 267 | # Timer and clock configuration | ||
| 268 | # | ||
| 269 | # CONFIG_SH_TIMER_TMU is not set | ||
| 270 | CONFIG_SH_TIMER_CMT=y | ||
| 271 | CONFIG_SH_PCLK_FREQ=33333333 | ||
| 272 | CONFIG_SH_CLK_CPG=y | ||
| 273 | CONFIG_TICK_ONESHOT=y | ||
| 274 | CONFIG_NO_HZ=y | ||
| 275 | # CONFIG_HIGH_RES_TIMERS is not set | ||
| 276 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 277 | |||
| 278 | # | ||
| 279 | # CPU Frequency scaling | ||
| 280 | # | ||
| 281 | # CONFIG_CPU_FREQ is not set | ||
| 282 | |||
| 283 | # | ||
| 284 | # DMA support | ||
| 285 | # | ||
| 286 | # CONFIG_SH_DMA is not set | ||
| 287 | |||
| 288 | # | ||
| 289 | # Companion Chips | ||
| 290 | # | ||
| 291 | |||
| 292 | # | ||
| 293 | # Additional SuperH Device Drivers | ||
| 294 | # | ||
| 295 | # CONFIG_HEARTBEAT is not set | ||
| 296 | # CONFIG_PUSH_SWITCH is not set | ||
| 297 | |||
| 298 | # | ||
| 299 | # Kernel features | ||
| 300 | # | ||
| 301 | # CONFIG_HZ_100 is not set | ||
| 302 | # CONFIG_HZ_250 is not set | ||
| 303 | # CONFIG_HZ_300 is not set | ||
| 304 | CONFIG_HZ_1000=y | ||
| 305 | CONFIG_HZ=1000 | ||
| 306 | # CONFIG_SCHED_HRTICK is not set | ||
| 307 | CONFIG_KEXEC=y | ||
| 308 | # CONFIG_CRASH_DUMP is not set | ||
| 309 | # CONFIG_SECCOMP is not set | ||
| 310 | # CONFIG_PREEMPT_NONE is not set | ||
| 311 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 312 | CONFIG_PREEMPT=y | ||
| 313 | CONFIG_GUSA=y | ||
| 314 | # CONFIG_SPARSE_IRQ is not set | ||
| 315 | |||
| 316 | # | ||
| 317 | # Boot options | ||
| 318 | # | ||
| 319 | CONFIG_ZERO_PAGE_OFFSET=0x00001000 | ||
| 320 | CONFIG_BOOT_LINK_OFFSET=0x00800000 | ||
| 321 | CONFIG_ENTRY_OFFSET=0x00001000 | ||
| 322 | CONFIG_CMDLINE_BOOL=y | ||
| 323 | CONFIG_CMDLINE="console=tty0 console=ttySC1,115200" | ||
| 324 | |||
| 325 | # | ||
| 326 | # Bus options | ||
| 327 | # | ||
| 328 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 329 | # CONFIG_PCCARD is not set | ||
| 330 | |||
| 331 | # | ||
| 332 | # Executable file formats | ||
| 333 | # | ||
| 334 | CONFIG_BINFMT_ELF=y | ||
| 335 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 336 | # CONFIG_HAVE_AOUT is not set | ||
| 337 | # CONFIG_BINFMT_MISC is not set | ||
| 338 | |||
| 339 | # | ||
| 340 | # Power management options (EXPERIMENTAL) | ||
| 341 | # | ||
| 342 | CONFIG_PM=y | ||
| 343 | # CONFIG_PM_DEBUG is not set | ||
| 344 | # CONFIG_SUSPEND is not set | ||
| 345 | # CONFIG_HIBERNATION is not set | ||
| 346 | CONFIG_CPU_IDLE=y | ||
| 347 | CONFIG_CPU_IDLE_GOV_LADDER=y | ||
| 348 | CONFIG_CPU_IDLE_GOV_MENU=y | ||
| 349 | CONFIG_NET=y | ||
| 350 | |||
| 351 | # | ||
| 352 | # Networking options | ||
| 353 | # | ||
| 354 | CONFIG_PACKET=y | ||
| 355 | CONFIG_PACKET_MMAP=y | ||
| 356 | CONFIG_UNIX=y | ||
| 357 | # CONFIG_NET_KEY is not set | ||
| 358 | CONFIG_INET=y | ||
| 359 | # CONFIG_IP_MULTICAST is not set | ||
| 360 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 361 | CONFIG_IP_FIB_HASH=y | ||
| 362 | # CONFIG_IP_PNP is not set | ||
| 363 | # CONFIG_NET_IPIP is not set | ||
| 364 | # CONFIG_NET_IPGRE is not set | ||
| 365 | # CONFIG_ARPD is not set | ||
| 366 | # CONFIG_SYN_COOKIES is not set | ||
| 367 | # CONFIG_INET_AH is not set | ||
| 368 | # CONFIG_INET_ESP is not set | ||
| 369 | # CONFIG_INET_IPCOMP is not set | ||
| 370 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
| 371 | # CONFIG_INET_TUNNEL is not set | ||
| 372 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
| 373 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
| 374 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
| 375 | # CONFIG_INET_LRO is not set | ||
| 376 | # CONFIG_INET_DIAG is not set | ||
| 377 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
| 378 | CONFIG_TCP_CONG_CUBIC=y | ||
| 379 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 380 | # CONFIG_TCP_MD5SIG is not set | ||
| 381 | # CONFIG_IPV6 is not set | ||
| 382 | # CONFIG_NETWORK_SECMARK is not set | ||
| 383 | # CONFIG_NETFILTER is not set | ||
| 384 | # CONFIG_IP_DCCP is not set | ||
| 385 | # CONFIG_IP_SCTP is not set | ||
| 386 | # CONFIG_TIPC is not set | ||
| 387 | # CONFIG_ATM is not set | ||
| 388 | # CONFIG_BRIDGE is not set | ||
| 389 | # CONFIG_NET_DSA is not set | ||
| 390 | # CONFIG_VLAN_8021Q is not set | ||
| 391 | # CONFIG_DECNET is not set | ||
| 392 | # CONFIG_LLC2 is not set | ||
| 393 | # CONFIG_IPX is not set | ||
| 394 | # CONFIG_ATALK is not set | ||
| 395 | # CONFIG_X25 is not set | ||
| 396 | # CONFIG_LAPB is not set | ||
| 397 | # CONFIG_ECONET is not set | ||
| 398 | # CONFIG_WAN_ROUTER is not set | ||
| 399 | # CONFIG_PHONET is not set | ||
| 400 | # CONFIG_IEEE802154 is not set | ||
| 401 | # CONFIG_NET_SCHED is not set | ||
| 402 | # CONFIG_DCB is not set | ||
| 403 | |||
| 404 | # | ||
| 405 | # Network testing | ||
| 406 | # | ||
| 407 | # CONFIG_NET_PKTGEN is not set | ||
| 408 | # CONFIG_HAMRADIO is not set | ||
| 409 | # CONFIG_CAN is not set | ||
| 410 | # CONFIG_IRDA is not set | ||
| 411 | # CONFIG_BT is not set | ||
| 412 | # CONFIG_AF_RXRPC is not set | ||
| 413 | # CONFIG_WIRELESS is not set | ||
| 414 | # CONFIG_WIMAX is not set | ||
| 415 | # CONFIG_RFKILL is not set | ||
| 416 | # CONFIG_NET_9P is not set | ||
| 417 | |||
| 418 | # | ||
| 419 | # Device Drivers | ||
| 420 | # | ||
| 421 | |||
| 422 | # | ||
| 423 | # Generic Driver Options | ||
| 424 | # | ||
| 425 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
| 426 | CONFIG_STANDALONE=y | ||
| 427 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 428 | CONFIG_FW_LOADER=y | ||
| 429 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 430 | CONFIG_EXTRA_FIRMWARE="" | ||
| 431 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 432 | # CONFIG_CONNECTOR is not set | ||
| 433 | CONFIG_MTD=y | ||
| 434 | # CONFIG_MTD_DEBUG is not set | ||
| 435 | CONFIG_MTD_CONCAT=y | ||
| 436 | CONFIG_MTD_PARTITIONS=y | ||
| 437 | # CONFIG_MTD_TESTS is not set | ||
| 438 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 439 | CONFIG_MTD_CMDLINE_PARTS=y | ||
| 440 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 441 | |||
| 442 | # | ||
| 443 | # User Modules And Translation Layers | ||
| 444 | # | ||
| 445 | CONFIG_MTD_CHAR=y | ||
| 446 | CONFIG_MTD_BLKDEVS=y | ||
| 447 | CONFIG_MTD_BLOCK=y | ||
| 448 | # CONFIG_FTL is not set | ||
| 449 | # CONFIG_NFTL is not set | ||
| 450 | # CONFIG_INFTL is not set | ||
| 451 | # CONFIG_RFD_FTL is not set | ||
| 452 | # CONFIG_SSFDC is not set | ||
| 453 | # CONFIG_MTD_OOPS is not set | ||
| 454 | |||
| 455 | # | ||
| 456 | # RAM/ROM/Flash chip drivers | ||
| 457 | # | ||
| 458 | CONFIG_MTD_CFI=y | ||
| 459 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 460 | CONFIG_MTD_GEN_PROBE=y | ||
| 461 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
| 462 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 463 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 464 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 465 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 466 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 467 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 468 | CONFIG_MTD_CFI_I1=y | ||
| 469 | CONFIG_MTD_CFI_I2=y | ||
| 470 | # CONFIG_MTD_CFI_I4 is not set | ||
| 471 | # CONFIG_MTD_CFI_I8 is not set | ||
| 472 | CONFIG_MTD_CFI_INTELEXT=y | ||
| 473 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
| 474 | # CONFIG_MTD_CFI_STAA is not set | ||
| 475 | CONFIG_MTD_CFI_UTIL=y | ||
| 476 | # CONFIG_MTD_RAM is not set | ||
| 477 | # CONFIG_MTD_ROM is not set | ||
| 478 | # CONFIG_MTD_ABSENT is not set | ||
| 479 | |||
| 480 | # | ||
| 481 | # Mapping drivers for chip access | ||
| 482 | # | ||
| 483 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 484 | CONFIG_MTD_PHYSMAP=y | ||
| 485 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
| 486 | # CONFIG_MTD_PLATRAM is not set | ||
| 487 | |||
| 488 | # | ||
| 489 | # Self-contained MTD device drivers | ||
| 490 | # | ||
| 491 | # CONFIG_MTD_SLRAM is not set | ||
| 492 | # CONFIG_MTD_PHRAM is not set | ||
| 493 | # CONFIG_MTD_MTDRAM is not set | ||
| 494 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 495 | |||
| 496 | # | ||
| 497 | # Disk-On-Chip Device Drivers | ||
| 498 | # | ||
| 499 | # CONFIG_MTD_DOC2000 is not set | ||
| 500 | # CONFIG_MTD_DOC2001 is not set | ||
| 501 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 502 | # CONFIG_MTD_NAND is not set | ||
| 503 | # CONFIG_MTD_ONENAND is not set | ||
| 504 | |||
| 505 | # | ||
| 506 | # LPDDR flash memory drivers | ||
| 507 | # | ||
| 508 | # CONFIG_MTD_LPDDR is not set | ||
| 509 | |||
| 510 | # | ||
| 511 | # UBI - Unsorted block images | ||
| 512 | # | ||
| 513 | CONFIG_MTD_UBI=y | ||
| 514 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
| 515 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
| 516 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
| 517 | |||
| 518 | # | ||
| 519 | # UBI debugging options | ||
| 520 | # | ||
| 521 | # CONFIG_MTD_UBI_DEBUG is not set | ||
| 522 | # CONFIG_PARPORT is not set | ||
| 523 | CONFIG_BLK_DEV=y | ||
| 524 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 525 | # CONFIG_BLK_DEV_LOOP is not set | ||
| 526 | # CONFIG_BLK_DEV_NBD is not set | ||
| 527 | # CONFIG_BLK_DEV_RAM is not set | ||
| 528 | # CONFIG_CDROM_PKTCDVD is not set | ||
| 529 | # CONFIG_ATA_OVER_ETH is not set | ||
| 530 | # CONFIG_BLK_DEV_HD is not set | ||
| 531 | # CONFIG_MISC_DEVICES is not set | ||
| 532 | CONFIG_HAVE_IDE=y | ||
| 533 | # CONFIG_IDE is not set | ||
| 534 | |||
| 535 | # | ||
| 536 | # SCSI device support | ||
| 537 | # | ||
| 538 | # CONFIG_RAID_ATTRS is not set | ||
| 539 | # CONFIG_SCSI is not set | ||
| 540 | # CONFIG_SCSI_DMA is not set | ||
| 541 | # CONFIG_SCSI_NETLINK is not set | ||
| 542 | # CONFIG_ATA is not set | ||
| 543 | # CONFIG_MD is not set | ||
| 544 | # CONFIG_NETDEVICES is not set | ||
| 545 | # CONFIG_ISDN is not set | ||
| 546 | # CONFIG_PHONE is not set | ||
| 547 | |||
| 548 | # | ||
| 549 | # Input device support | ||
| 550 | # | ||
| 551 | CONFIG_INPUT=y | ||
| 552 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
| 553 | # CONFIG_INPUT_POLLDEV is not set | ||
| 554 | |||
| 555 | # | ||
| 556 | # Userland interfaces | ||
| 557 | # | ||
| 558 | # CONFIG_INPUT_MOUSEDEV is not set | ||
| 559 | # CONFIG_INPUT_JOYDEV is not set | ||
| 560 | CONFIG_INPUT_EVDEV=y | ||
| 561 | # CONFIG_INPUT_EVBUG is not set | ||
| 562 | |||
| 563 | # | ||
| 564 | # Input Device Drivers | ||
| 565 | # | ||
| 566 | CONFIG_INPUT_KEYBOARD=y | ||
| 567 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 568 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 569 | # CONFIG_KEYBOARD_GPIO is not set | ||
| 570 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 571 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 572 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 573 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 574 | CONFIG_KEYBOARD_SH_KEYSC=y | ||
| 575 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 576 | # CONFIG_INPUT_MOUSE is not set | ||
| 577 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 578 | # CONFIG_INPUT_TABLET is not set | ||
| 579 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 580 | # CONFIG_INPUT_MISC is not set | ||
| 581 | |||
| 582 | # | ||
| 583 | # Hardware I/O ports | ||
| 584 | # | ||
| 585 | # CONFIG_SERIO is not set | ||
| 586 | # CONFIG_GAMEPORT is not set | ||
| 587 | |||
| 588 | # | ||
| 589 | # Character devices | ||
| 590 | # | ||
| 591 | CONFIG_VT=y | ||
| 592 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 593 | CONFIG_VT_CONSOLE=y | ||
| 594 | CONFIG_HW_CONSOLE=y | ||
| 595 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 596 | CONFIG_DEVKMEM=y | ||
| 597 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 598 | |||
| 599 | # | ||
| 600 | # Serial drivers | ||
| 601 | # | ||
| 602 | # CONFIG_SERIAL_8250 is not set | ||
| 603 | |||
| 604 | # | ||
| 605 | # Non-8250 serial port support | ||
| 606 | # | ||
| 607 | CONFIG_SERIAL_SH_SCI=y | ||
| 608 | CONFIG_SERIAL_SH_SCI_NR_UARTS=6 | ||
| 609 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||
| 610 | CONFIG_SERIAL_CORE=y | ||
| 611 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 612 | CONFIG_UNIX98_PTYS=y | ||
| 613 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 614 | CONFIG_LEGACY_PTYS=y | ||
| 615 | CONFIG_LEGACY_PTY_COUNT=256 | ||
| 616 | # CONFIG_IPMI_HANDLER is not set | ||
| 617 | CONFIG_HW_RANDOM=y | ||
| 618 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 619 | # CONFIG_R3964 is not set | ||
| 620 | # CONFIG_RAW_DRIVER is not set | ||
| 621 | # CONFIG_TCG_TPM is not set | ||
| 622 | CONFIG_I2C=y | ||
| 623 | CONFIG_I2C_BOARDINFO=y | ||
| 624 | # CONFIG_I2C_CHARDEV is not set | ||
| 625 | CONFIG_I2C_HELPER_AUTO=y | ||
| 626 | |||
| 627 | # | ||
| 628 | # I2C Hardware Bus support | ||
| 629 | # | ||
| 630 | |||
| 631 | # | ||
| 632 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 633 | # | ||
| 634 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 635 | # CONFIG_I2C_GPIO is not set | ||
| 636 | # CONFIG_I2C_OCORES is not set | ||
| 637 | CONFIG_I2C_SH_MOBILE=y | ||
| 638 | # CONFIG_I2C_SIMTEC is not set | ||
| 639 | |||
| 640 | # | ||
| 641 | # External I2C/SMBus adapter drivers | ||
| 642 | # | ||
| 643 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 644 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 645 | |||
| 646 | # | ||
| 647 | # Other I2C/SMBus bus drivers | ||
| 648 | # | ||
| 649 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 650 | # CONFIG_I2C_STUB is not set | ||
| 651 | |||
| 652 | # | ||
| 653 | # Miscellaneous I2C Chip support | ||
| 654 | # | ||
| 655 | # CONFIG_DS1682 is not set | ||
| 656 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 657 | # CONFIG_PCF8575 is not set | ||
| 658 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 659 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 660 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 661 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 662 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 663 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 664 | # CONFIG_SPI is not set | ||
| 665 | |||
| 666 | # | ||
| 667 | # PPS support | ||
| 668 | # | ||
| 669 | # CONFIG_PPS is not set | ||
| 670 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 671 | CONFIG_GPIOLIB=y | ||
| 672 | CONFIG_GPIO_SYSFS=y | ||
| 673 | |||
| 674 | # | ||
| 675 | # Memory mapped GPIO expanders: | ||
| 676 | # | ||
| 677 | |||
| 678 | # | ||
| 679 | # I2C GPIO expanders: | ||
| 680 | # | ||
| 681 | # CONFIG_GPIO_MAX732X is not set | ||
| 682 | # CONFIG_GPIO_PCA953X is not set | ||
| 683 | # CONFIG_GPIO_PCF857X is not set | ||
| 684 | |||
| 685 | # | ||
| 686 | # PCI GPIO expanders: | ||
| 687 | # | ||
| 688 | |||
| 689 | # | ||
| 690 | # SPI GPIO expanders: | ||
| 691 | # | ||
| 692 | # CONFIG_W1 is not set | ||
| 693 | # CONFIG_POWER_SUPPLY is not set | ||
| 694 | # CONFIG_HWMON is not set | ||
| 695 | # CONFIG_THERMAL is not set | ||
| 696 | # CONFIG_THERMAL_HWMON is not set | ||
| 697 | # CONFIG_WATCHDOG is not set | ||
| 698 | CONFIG_SSB_POSSIBLE=y | ||
| 699 | |||
| 700 | # | ||
| 701 | # Sonics Silicon Backplane | ||
| 702 | # | ||
| 703 | # CONFIG_SSB is not set | ||
| 704 | |||
| 705 | # | ||
| 706 | # Multifunction device drivers | ||
| 707 | # | ||
| 708 | # CONFIG_MFD_CORE is not set | ||
| 709 | # CONFIG_MFD_SM501 is not set | ||
| 710 | # CONFIG_HTC_PASIC3 is not set | ||
| 711 | # CONFIG_TPS65010 is not set | ||
| 712 | # CONFIG_TWL4030_CORE is not set | ||
| 713 | # CONFIG_MFD_TMIO is not set | ||
| 714 | # CONFIG_PMIC_DA903X is not set | ||
| 715 | # CONFIG_MFD_WM8400 is not set | ||
| 716 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 717 | # CONFIG_MFD_PCF50633 is not set | ||
| 718 | # CONFIG_AB3100_CORE is not set | ||
| 719 | # CONFIG_REGULATOR is not set | ||
| 720 | # CONFIG_MEDIA_SUPPORT is not set | ||
| 721 | |||
| 722 | # | ||
| 723 | # Graphics support | ||
| 724 | # | ||
| 725 | # CONFIG_VGASTATE is not set | ||
| 726 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 727 | CONFIG_FB=y | ||
| 728 | # CONFIG_FIRMWARE_EDID is not set | ||
| 729 | # CONFIG_FB_DDC is not set | ||
| 730 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 731 | # CONFIG_FB_CFB_FILLRECT is not set | ||
| 732 | # CONFIG_FB_CFB_COPYAREA is not set | ||
| 733 | # CONFIG_FB_CFB_IMAGEBLIT is not set | ||
| 734 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 735 | CONFIG_FB_SYS_FILLRECT=y | ||
| 736 | CONFIG_FB_SYS_COPYAREA=y | ||
| 737 | CONFIG_FB_SYS_IMAGEBLIT=y | ||
| 738 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 739 | CONFIG_FB_SYS_FOPS=y | ||
| 740 | CONFIG_FB_DEFERRED_IO=y | ||
| 741 | # CONFIG_FB_SVGALIB is not set | ||
| 742 | # CONFIG_FB_MACMODES is not set | ||
| 743 | # CONFIG_FB_BACKLIGHT is not set | ||
| 744 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 745 | # CONFIG_FB_TILEBLITTING is not set | ||
| 746 | |||
| 747 | # | ||
| 748 | # Frame buffer hardware drivers | ||
| 749 | # | ||
| 750 | # CONFIG_FB_S1D13XXX is not set | ||
| 751 | CONFIG_FB_SH_MOBILE_LCDC=y | ||
| 752 | # CONFIG_FB_VIRTUAL is not set | ||
| 753 | # CONFIG_FB_METRONOME is not set | ||
| 754 | # CONFIG_FB_MB862XX is not set | ||
| 755 | # CONFIG_FB_BROADSHEET is not set | ||
| 756 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 757 | |||
| 758 | # | ||
| 759 | # Display device support | ||
| 760 | # | ||
| 761 | # CONFIG_DISPLAY_SUPPORT is not set | ||
| 762 | |||
| 763 | # | ||
| 764 | # Console display driver support | ||
| 765 | # | ||
| 766 | CONFIG_DUMMY_CONSOLE=y | ||
| 767 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 768 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
| 769 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
| 770 | CONFIG_FONTS=y | ||
| 771 | # CONFIG_FONT_8x8 is not set | ||
| 772 | # CONFIG_FONT_8x16 is not set | ||
| 773 | # CONFIG_FONT_6x11 is not set | ||
| 774 | # CONFIG_FONT_7x14 is not set | ||
| 775 | # CONFIG_FONT_PEARL_8x8 is not set | ||
| 776 | # CONFIG_FONT_ACORN_8x8 is not set | ||
| 777 | CONFIG_FONT_MINI_4x6=y | ||
| 778 | # CONFIG_FONT_SUN8x16 is not set | ||
| 779 | # CONFIG_FONT_SUN12x22 is not set | ||
| 780 | # CONFIG_FONT_10x18 is not set | ||
| 781 | CONFIG_LOGO=y | ||
| 782 | # CONFIG_LOGO_LINUX_MONO is not set | ||
| 783 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
| 784 | # CONFIG_LOGO_LINUX_CLUT224 is not set | ||
| 785 | # CONFIG_LOGO_SUPERH_MONO is not set | ||
| 786 | CONFIG_LOGO_SUPERH_VGA16=y | ||
| 787 | # CONFIG_LOGO_SUPERH_CLUT224 is not set | ||
| 788 | # CONFIG_SOUND is not set | ||
| 789 | # CONFIG_HID_SUPPORT is not set | ||
| 790 | CONFIG_USB_SUPPORT=y | ||
| 791 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 792 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 793 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
| 794 | # CONFIG_USB is not set | ||
| 795 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 796 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 797 | # CONFIG_USB_GADGET_MUSB_HDRC is not set | ||
| 798 | |||
| 799 | # | ||
| 800 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 801 | # | ||
| 802 | CONFIG_USB_GADGET=y | ||
| 803 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 804 | # CONFIG_USB_GADGET_DEBUG_FS is not set | ||
| 805 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
| 806 | CONFIG_USB_GADGET_SELECTED=y | ||
| 807 | # CONFIG_USB_GADGET_AT91 is not set | ||
| 808 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
| 809 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
| 810 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
| 811 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 812 | # CONFIG_USB_GADGET_PXA25X is not set | ||
| 813 | CONFIG_USB_GADGET_R8A66597=y | ||
| 814 | CONFIG_USB_R8A66597=y | ||
| 815 | # CONFIG_USB_GADGET_PXA27X is not set | ||
| 816 | # CONFIG_USB_GADGET_S3C_HSOTG is not set | ||
| 817 | # CONFIG_USB_GADGET_IMX is not set | ||
| 818 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
| 819 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 820 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
| 821 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
| 822 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
| 823 | # CONFIG_USB_GADGET_NET2280 is not set | ||
| 824 | # CONFIG_USB_GADGET_GOKU is not set | ||
| 825 | # CONFIG_USB_GADGET_LANGWELL is not set | ||
| 826 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 827 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 828 | # CONFIG_USB_ZERO is not set | ||
| 829 | # CONFIG_USB_AUDIO is not set | ||
| 830 | # CONFIG_USB_ETH is not set | ||
| 831 | # CONFIG_USB_GADGETFS is not set | ||
| 832 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 833 | # CONFIG_USB_G_SERIAL is not set | ||
| 834 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 835 | # CONFIG_USB_G_PRINTER is not set | ||
| 836 | CONFIG_USB_CDC_COMPOSITE=y | ||
| 837 | |||
| 838 | # | ||
| 839 | # OTG and related infrastructure | ||
| 840 | # | ||
| 841 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 842 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 843 | CONFIG_MMC=y | ||
| 844 | # CONFIG_MMC_DEBUG is not set | ||
| 845 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
| 846 | |||
| 847 | # | ||
| 848 | # MMC/SD/SDIO Card Drivers | ||
| 849 | # | ||
| 850 | CONFIG_MMC_BLOCK=y | ||
| 851 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 852 | # CONFIG_SDIO_UART is not set | ||
| 853 | # CONFIG_MMC_TEST is not set | ||
| 854 | |||
| 855 | # | ||
| 856 | # MMC/SD/SDIO Host Controller Drivers | ||
| 857 | # | ||
| 858 | # CONFIG_MMC_SDHCI is not set | ||
| 859 | # CONFIG_MEMSTICK is not set | ||
| 860 | # CONFIG_NEW_LEDS is not set | ||
| 861 | # CONFIG_ACCESSIBILITY is not set | ||
| 862 | CONFIG_RTC_LIB=y | ||
| 863 | CONFIG_RTC_CLASS=y | ||
| 864 | CONFIG_RTC_HCTOSYS=y | ||
| 865 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 866 | # CONFIG_RTC_DEBUG is not set | ||
| 867 | |||
| 868 | # | ||
| 869 | # RTC interfaces | ||
| 870 | # | ||
| 871 | CONFIG_RTC_INTF_SYSFS=y | ||
| 872 | CONFIG_RTC_INTF_PROC=y | ||
| 873 | CONFIG_RTC_INTF_DEV=y | ||
| 874 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 875 | # CONFIG_RTC_DRV_TEST is not set | ||
| 876 | |||
| 877 | # | ||
| 878 | # I2C RTC drivers | ||
| 879 | # | ||
| 880 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 881 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 882 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 883 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 884 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 885 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 886 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 887 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 888 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 889 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 890 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 891 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 892 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 893 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 894 | |||
| 895 | # | ||
| 896 | # SPI RTC drivers | ||
| 897 | # | ||
| 898 | |||
| 899 | # | ||
| 900 | # Platform RTC drivers | ||
| 901 | # | ||
| 902 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 903 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 904 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 905 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 906 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 907 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 908 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 909 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 910 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 911 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 912 | |||
| 913 | # | ||
| 914 | # on-CPU RTC drivers | ||
| 915 | # | ||
| 916 | CONFIG_RTC_DRV_SH=y | ||
| 917 | # CONFIG_RTC_DRV_GENERIC is not set | ||
| 918 | # CONFIG_DMADEVICES is not set | ||
| 919 | # CONFIG_AUXDISPLAY is not set | ||
| 920 | CONFIG_UIO=y | ||
| 921 | # CONFIG_UIO_PDRV is not set | ||
| 922 | CONFIG_UIO_PDRV_GENIRQ=y | ||
| 923 | # CONFIG_UIO_SMX is not set | ||
| 924 | # CONFIG_UIO_SERCOS3 is not set | ||
| 925 | |||
| 926 | # | ||
| 927 | # TI VLYNQ | ||
| 928 | # | ||
| 929 | # CONFIG_STAGING is not set | ||
| 930 | |||
| 931 | # | ||
| 932 | # File systems | ||
| 933 | # | ||
| 934 | # CONFIG_EXT2_FS is not set | ||
| 935 | # CONFIG_EXT3_FS is not set | ||
| 936 | # CONFIG_EXT4_FS is not set | ||
| 937 | # CONFIG_REISERFS_FS is not set | ||
| 938 | # CONFIG_JFS_FS is not set | ||
| 939 | # CONFIG_FS_POSIX_ACL is not set | ||
| 940 | # CONFIG_XFS_FS is not set | ||
| 941 | # CONFIG_GFS2_FS is not set | ||
| 942 | # CONFIG_OCFS2_FS is not set | ||
| 943 | # CONFIG_BTRFS_FS is not set | ||
| 944 | CONFIG_FILE_LOCKING=y | ||
| 945 | CONFIG_FSNOTIFY=y | ||
| 946 | CONFIG_DNOTIFY=y | ||
| 947 | # CONFIG_INOTIFY is not set | ||
| 948 | CONFIG_INOTIFY_USER=y | ||
| 949 | # CONFIG_QUOTA is not set | ||
| 950 | # CONFIG_AUTOFS_FS is not set | ||
| 951 | # CONFIG_AUTOFS4_FS is not set | ||
| 952 | # CONFIG_FUSE_FS is not set | ||
| 953 | |||
| 954 | # | ||
| 955 | # Caches | ||
| 956 | # | ||
| 957 | # CONFIG_FSCACHE is not set | ||
| 958 | |||
| 959 | # | ||
| 960 | # CD-ROM/DVD Filesystems | ||
| 961 | # | ||
| 962 | # CONFIG_ISO9660_FS is not set | ||
| 963 | # CONFIG_UDF_FS is not set | ||
| 964 | |||
| 965 | # | ||
| 966 | # DOS/FAT/NT Filesystems | ||
| 967 | # | ||
| 968 | # CONFIG_MSDOS_FS is not set | ||
| 969 | # CONFIG_VFAT_FS is not set | ||
| 970 | # CONFIG_NTFS_FS is not set | ||
| 971 | |||
| 972 | # | ||
| 973 | # Pseudo filesystems | ||
| 974 | # | ||
| 975 | CONFIG_PROC_FS=y | ||
| 976 | CONFIG_PROC_KCORE=y | ||
| 977 | CONFIG_PROC_SYSCTL=y | ||
| 978 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 979 | CONFIG_SYSFS=y | ||
| 980 | CONFIG_TMPFS=y | ||
| 981 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
| 982 | # CONFIG_HUGETLBFS is not set | ||
| 983 | # CONFIG_HUGETLB_PAGE is not set | ||
| 984 | # CONFIG_CONFIGFS_FS is not set | ||
| 985 | # CONFIG_MISC_FILESYSTEMS is not set | ||
| 986 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
| 987 | |||
| 988 | # | ||
| 989 | # Partition Types | ||
| 990 | # | ||
| 991 | # CONFIG_PARTITION_ADVANCED is not set | ||
| 992 | CONFIG_MSDOS_PARTITION=y | ||
| 993 | # CONFIG_NLS is not set | ||
| 994 | # CONFIG_DLM is not set | ||
| 995 | |||
| 996 | # | ||
| 997 | # Kernel hacking | ||
| 998 | # | ||
| 999 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 1000 | # CONFIG_PRINTK_TIME is not set | ||
| 1001 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 1002 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 1003 | CONFIG_FRAME_WARN=1024 | ||
| 1004 | # CONFIG_MAGIC_SYSRQ is not set | ||
| 1005 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 1006 | CONFIG_DEBUG_FS=y | ||
| 1007 | # CONFIG_HEADERS_CHECK is not set | ||
| 1008 | # CONFIG_DEBUG_KERNEL is not set | ||
| 1009 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 1010 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 1011 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
| 1012 | # CONFIG_LATENCYTOP is not set | ||
| 1013 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 1014 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 1015 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 1016 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 1017 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 1018 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 1019 | CONFIG_HAVE_FTRACE_SYSCALLS=y | ||
| 1020 | CONFIG_TRACING_SUPPORT=y | ||
| 1021 | # CONFIG_FTRACE is not set | ||
| 1022 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 1023 | # CONFIG_DMA_API_DEBUG is not set | ||
| 1024 | # CONFIG_SAMPLES is not set | ||
| 1025 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 1026 | # CONFIG_SH_STANDARD_BIOS is not set | ||
| 1027 | # CONFIG_EARLY_SCIF_CONSOLE is not set | ||
| 1028 | # CONFIG_DWARF_UNWINDER is not set | ||
| 1029 | |||
| 1030 | # | ||
| 1031 | # Security options | ||
| 1032 | # | ||
| 1033 | # CONFIG_KEYS is not set | ||
| 1034 | # CONFIG_SECURITY is not set | ||
| 1035 | # CONFIG_SECURITYFS is not set | ||
| 1036 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
| 1037 | # CONFIG_CRYPTO is not set | ||
| 1038 | # CONFIG_BINARY_PRINTF is not set | ||
| 1039 | |||
| 1040 | # | ||
| 1041 | # Library routines | ||
| 1042 | # | ||
| 1043 | CONFIG_BITREVERSE=y | ||
| 1044 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 1045 | # CONFIG_CRC_CCITT is not set | ||
| 1046 | # CONFIG_CRC16 is not set | ||
| 1047 | # CONFIG_CRC_T10DIF is not set | ||
| 1048 | # CONFIG_CRC_ITU_T is not set | ||
| 1049 | CONFIG_CRC32=y | ||
| 1050 | # CONFIG_CRC7 is not set | ||
| 1051 | # CONFIG_LIBCRC32C is not set | ||
| 1052 | CONFIG_ZLIB_INFLATE=y | ||
| 1053 | CONFIG_DECOMPRESS_GZIP=y | ||
| 1054 | CONFIG_HAS_IOMEM=y | ||
| 1055 | CONFIG_HAS_IOPORT=y | ||
| 1056 | CONFIG_HAS_DMA=y | ||
| 1057 | CONFIG_HAVE_LMB=y | ||
| 1058 | CONFIG_NLATTR=y | ||
| 1059 | CONFIG_GENERIC_ATOMIC64=y | ||
diff --git a/arch/sh/configs/snapgear_defconfig b/arch/sh/configs/snapgear_defconfig index ca3c88a88021..2be2d75adbb7 100644 --- a/arch/sh/configs/snapgear_defconfig +++ b/arch/sh/configs/snapgear_defconfig | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30 | 3 | # Linux kernel version: 2.6.31-rc6 |
| 4 | # Thu Jun 18 13:11:58 2009 | 4 | # Thu Aug 20 15:03:04 2009 |
| 5 | # | 5 | # |
| 6 | CONFIG_SUPERH=y | 6 | CONFIG_SUPERH=y |
| 7 | CONFIG_SUPERH32=y | 7 | CONFIG_SUPERH32=y |
| @@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y | |||
| 14 | CONFIG_GENERIC_HARDIRQS=y | 14 | CONFIG_GENERIC_HARDIRQS=y |
| 15 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 15 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 16 | CONFIG_GENERIC_IRQ_PROBE=y | 16 | CONFIG_GENERIC_IRQ_PROBE=y |
| 17 | CONFIG_IRQ_PER_CPU=y | ||
| 17 | # CONFIG_GENERIC_GPIO is not set | 18 | # CONFIG_GENERIC_GPIO is not set |
| 18 | CONFIG_GENERIC_TIME=y | 19 | CONFIG_GENERIC_TIME=y |
| 19 | CONFIG_GENERIC_CLOCKEVENTS=y | 20 | CONFIG_GENERIC_CLOCKEVENTS=y |
| @@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y | |||
| 28 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 29 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
| 29 | CONFIG_ARCH_NO_VIRT_TO_BUS=y | 30 | CONFIG_ARCH_NO_VIRT_TO_BUS=y |
| 30 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | 31 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y |
| 32 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
| 31 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 33 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 34 | CONFIG_CONSTRUCTORS=y | ||
| 32 | 35 | ||
| 33 | # | 36 | # |
| 34 | # General setup | 37 | # General setup |
| @@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 38 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 41 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 39 | CONFIG_LOCALVERSION="" | 42 | CONFIG_LOCALVERSION="" |
| 40 | CONFIG_LOCALVERSION_AUTO=y | 43 | CONFIG_LOCALVERSION_AUTO=y |
| 44 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 45 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
| 46 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 47 | CONFIG_KERNEL_GZIP=y | ||
| 48 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 49 | # CONFIG_KERNEL_LZMA is not set | ||
| 41 | # CONFIG_SWAP is not set | 50 | # CONFIG_SWAP is not set |
| 42 | # CONFIG_SYSVIPC is not set | 51 | # CONFIG_SYSVIPC is not set |
| 43 | # CONFIG_POSIX_MQUEUE is not set | 52 | # CONFIG_POSIX_MQUEUE is not set |
| @@ -86,10 +95,12 @@ CONFIG_TIMERFD=y | |||
| 86 | CONFIG_EVENTFD=y | 95 | CONFIG_EVENTFD=y |
| 87 | CONFIG_SHMEM=y | 96 | CONFIG_SHMEM=y |
| 88 | CONFIG_AIO=y | 97 | CONFIG_AIO=y |
| 98 | CONFIG_HAVE_PERF_COUNTERS=y | ||
| 89 | 99 | ||
| 90 | # | 100 | # |
| 91 | # Performance Counters | 101 | # Performance Counters |
| 92 | # | 102 | # |
| 103 | # CONFIG_PERF_COUNTERS is not set | ||
| 93 | CONFIG_VM_EVENT_COUNTERS=y | 104 | CONFIG_VM_EVENT_COUNTERS=y |
| 94 | CONFIG_PCI_QUIRKS=y | 105 | CONFIG_PCI_QUIRKS=y |
| 95 | # CONFIG_STRIP_ASM_SYMS is not set | 106 | # CONFIG_STRIP_ASM_SYMS is not set |
| @@ -106,6 +117,10 @@ CONFIG_HAVE_KRETPROBES=y | |||
| 106 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 117 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
| 107 | CONFIG_HAVE_CLK=y | 118 | CONFIG_HAVE_CLK=y |
| 108 | CONFIG_HAVE_DMA_API_DEBUG=y | 119 | CONFIG_HAVE_DMA_API_DEBUG=y |
| 120 | |||
| 121 | # | ||
| 122 | # GCOV-based kernel profiling | ||
| 123 | # | ||
| 109 | # CONFIG_SLOW_WORK is not set | 124 | # CONFIG_SLOW_WORK is not set |
| 110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 125 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 111 | CONFIG_SLABINFO=y | 126 | CONFIG_SLABINFO=y |
| @@ -113,7 +128,7 @@ CONFIG_RT_MUTEXES=y | |||
| 113 | CONFIG_BASE_SMALL=0 | 128 | CONFIG_BASE_SMALL=0 |
| 114 | # CONFIG_MODULES is not set | 129 | # CONFIG_MODULES is not set |
| 115 | CONFIG_BLOCK=y | 130 | CONFIG_BLOCK=y |
| 116 | # CONFIG_LBD is not set | 131 | CONFIG_LBDAF=y |
| 117 | # CONFIG_BLK_DEV_BSG is not set | 132 | # CONFIG_BLK_DEV_BSG is not set |
| 118 | # CONFIG_BLK_DEV_INTEGRITY is not set | 133 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 119 | 134 | ||
| @@ -534,7 +549,11 @@ CONFIG_HAVE_IDE=y | |||
| 534 | # | 549 | # |
| 535 | 550 | ||
| 536 | # | 551 | # |
| 537 | # Enable only one of the two stacks, unless you know what you are doing | 552 | # You can enable one or both FireWire driver stacks. |
| 553 | # | ||
| 554 | |||
| 555 | # | ||
| 556 | # See the help texts for more information. | ||
| 538 | # | 557 | # |
| 539 | # CONFIG_FIREWIRE is not set | 558 | # CONFIG_FIREWIRE is not set |
| 540 | # CONFIG_IEEE1394 is not set | 559 | # CONFIG_IEEE1394 is not set |
| @@ -686,6 +705,11 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
| 686 | CONFIG_DEVPORT=y | 705 | CONFIG_DEVPORT=y |
| 687 | # CONFIG_I2C is not set | 706 | # CONFIG_I2C is not set |
| 688 | # CONFIG_SPI is not set | 707 | # CONFIG_SPI is not set |
| 708 | |||
| 709 | # | ||
| 710 | # PPS support | ||
| 711 | # | ||
| 712 | # CONFIG_PPS is not set | ||
| 689 | # CONFIG_W1 is not set | 713 | # CONFIG_W1 is not set |
| 690 | # CONFIG_POWER_SUPPLY is not set | 714 | # CONFIG_POWER_SUPPLY is not set |
| 691 | # CONFIG_HWMON is not set | 715 | # CONFIG_HWMON is not set |
| @@ -732,7 +756,44 @@ CONFIG_SSB_POSSIBLE=y | |||
| 732 | # CONFIG_ACCESSIBILITY is not set | 756 | # CONFIG_ACCESSIBILITY is not set |
| 733 | # CONFIG_INFINIBAND is not set | 757 | # CONFIG_INFINIBAND is not set |
| 734 | CONFIG_RTC_LIB=y | 758 | CONFIG_RTC_LIB=y |
| 735 | # CONFIG_RTC_CLASS is not set | 759 | CONFIG_RTC_CLASS=y |
| 760 | CONFIG_RTC_HCTOSYS=y | ||
| 761 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 762 | # CONFIG_RTC_DEBUG is not set | ||
| 763 | |||
| 764 | # | ||
| 765 | # RTC interfaces | ||
| 766 | # | ||
| 767 | CONFIG_RTC_INTF_SYSFS=y | ||
| 768 | CONFIG_RTC_INTF_PROC=y | ||
| 769 | CONFIG_RTC_INTF_DEV=y | ||
| 770 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 771 | # CONFIG_RTC_DRV_TEST is not set | ||
| 772 | |||
| 773 | # | ||
| 774 | # SPI RTC drivers | ||
| 775 | # | ||
| 776 | |||
| 777 | # | ||
| 778 | # Platform RTC drivers | ||
| 779 | # | ||
| 780 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 781 | CONFIG_RTC_DRV_DS1302=y | ||
| 782 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 783 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 784 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 785 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 786 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 787 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 788 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 789 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 790 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 791 | |||
| 792 | # | ||
| 793 | # on-CPU RTC drivers | ||
| 794 | # | ||
| 795 | # CONFIG_RTC_DRV_SH is not set | ||
| 796 | # CONFIG_RTC_DRV_GENERIC is not set | ||
| 736 | # CONFIG_DMADEVICES is not set | 797 | # CONFIG_DMADEVICES is not set |
| 737 | # CONFIG_AUXDISPLAY is not set | 798 | # CONFIG_AUXDISPLAY is not set |
| 738 | # CONFIG_UIO is not set | 799 | # CONFIG_UIO is not set |
| @@ -754,6 +815,7 @@ CONFIG_EXT2_FS=y | |||
| 754 | # CONFIG_JFS_FS is not set | 815 | # CONFIG_JFS_FS is not set |
| 755 | # CONFIG_FS_POSIX_ACL is not set | 816 | # CONFIG_FS_POSIX_ACL is not set |
| 756 | # CONFIG_XFS_FS is not set | 817 | # CONFIG_XFS_FS is not set |
| 818 | # CONFIG_GFS2_FS is not set | ||
| 757 | # CONFIG_OCFS2_FS is not set | 819 | # CONFIG_OCFS2_FS is not set |
| 758 | # CONFIG_BTRFS_FS is not set | 820 | # CONFIG_BTRFS_FS is not set |
| 759 | CONFIG_FILE_LOCKING=y | 821 | CONFIG_FILE_LOCKING=y |
| @@ -856,8 +918,11 @@ CONFIG_FRAME_WARN=1024 | |||
| 856 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 918 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 857 | # CONFIG_LATENCYTOP is not set | 919 | # CONFIG_LATENCYTOP is not set |
| 858 | CONFIG_HAVE_FUNCTION_TRACER=y | 920 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 921 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 922 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
| 859 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 923 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
| 860 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 924 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
| 925 | CONFIG_HAVE_FTRACE_SYSCALLS=y | ||
| 861 | CONFIG_TRACING_SUPPORT=y | 926 | CONFIG_TRACING_SUPPORT=y |
| 862 | # CONFIG_FTRACE is not set | 927 | # CONFIG_FTRACE is not set |
| 863 | # CONFIG_DMA_API_DEBUG is not set | 928 | # CONFIG_DMA_API_DEBUG is not set |
| @@ -865,6 +930,7 @@ CONFIG_TRACING_SUPPORT=y | |||
| 865 | CONFIG_HAVE_ARCH_KGDB=y | 930 | CONFIG_HAVE_ARCH_KGDB=y |
| 866 | # CONFIG_SH_STANDARD_BIOS is not set | 931 | # CONFIG_SH_STANDARD_BIOS is not set |
| 867 | # CONFIG_EARLY_SCIF_CONSOLE is not set | 932 | # CONFIG_EARLY_SCIF_CONSOLE is not set |
| 933 | # CONFIG_DWARF_UNWINDER is not set | ||
| 868 | 934 | ||
| 869 | # | 935 | # |
| 870 | # Security options | 936 | # Security options |
| @@ -893,5 +959,6 @@ CONFIG_DECOMPRESS_GZIP=y | |||
| 893 | CONFIG_HAS_IOMEM=y | 959 | CONFIG_HAS_IOMEM=y |
| 894 | CONFIG_HAS_IOPORT=y | 960 | CONFIG_HAS_IOPORT=y |
| 895 | CONFIG_HAS_DMA=y | 961 | CONFIG_HAS_DMA=y |
| 962 | CONFIG_HAVE_LMB=y | ||
| 896 | CONFIG_NLATTR=y | 963 | CONFIG_NLATTR=y |
| 897 | CONFIG_GENERIC_ATOMIC64=y | 964 | CONFIG_GENERIC_ATOMIC64=y |
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig index 63e9dd30b41c..b91fa8dbf047 100644 --- a/arch/sh/drivers/dma/Kconfig +++ b/arch/sh/drivers/dma/Kconfig | |||
| @@ -27,12 +27,12 @@ config NR_ONCHIP_DMA_CHANNELS | |||
| 27 | default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ | 27 | default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ |
| 28 | CPU_SUBTYPE_SH7760 | 28 | CPU_SUBTYPE_SH7760 |
| 29 | default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \ | 29 | default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \ |
| 30 | CPU_SUBTYPE_SH7785 | 30 | CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724 |
| 31 | default "6" | 31 | default "6" |
| 32 | help | 32 | help |
| 33 | This allows you to specify the number of channels that the on-chip | 33 | This allows you to specify the number of channels that the on-chip |
| 34 | DMAC supports. This will be 4 for SH7091/SH7750/SH7751 and 8 for the | 34 | DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the |
| 35 | SH7750R/SH7751R. | 35 | SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6. |
| 36 | 36 | ||
| 37 | config NR_DMA_CHANNELS_BOOL | 37 | config NR_DMA_CHANNELS_BOOL |
| 38 | depends on SH_DMA | 38 | depends on SH_DMA |
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c index 938817e34e2b..a9339a6174fc 100644 --- a/arch/sh/drivers/heartbeat.c +++ b/arch/sh/drivers/heartbeat.c | |||
| @@ -40,14 +40,19 @@ static inline void heartbeat_toggle_bit(struct heartbeat_data *hd, | |||
| 40 | if (inverted) | 40 | if (inverted) |
| 41 | new = ~new; | 41 | new = ~new; |
| 42 | 42 | ||
| 43 | new &= hd->mask; | ||
| 44 | |||
| 43 | switch (hd->regsize) { | 45 | switch (hd->regsize) { |
| 44 | case 32: | 46 | case 32: |
| 47 | new |= ioread32(hd->base) & ~hd->mask; | ||
| 45 | iowrite32(new, hd->base); | 48 | iowrite32(new, hd->base); |
| 46 | break; | 49 | break; |
| 47 | case 16: | 50 | case 16: |
| 51 | new |= ioread16(hd->base) & ~hd->mask; | ||
| 48 | iowrite16(new, hd->base); | 52 | iowrite16(new, hd->base); |
| 49 | break; | 53 | break; |
| 50 | default: | 54 | default: |
| 55 | new |= ioread8(hd->base) & ~hd->mask; | ||
| 51 | iowrite8(new, hd->base); | 56 | iowrite8(new, hd->base); |
| 52 | break; | 57 | break; |
| 53 | } | 58 | } |
| @@ -72,6 +77,7 @@ static int heartbeat_drv_probe(struct platform_device *pdev) | |||
| 72 | { | 77 | { |
| 73 | struct resource *res; | 78 | struct resource *res; |
| 74 | struct heartbeat_data *hd; | 79 | struct heartbeat_data *hd; |
| 80 | int i; | ||
| 75 | 81 | ||
| 76 | if (unlikely(pdev->num_resources != 1)) { | 82 | if (unlikely(pdev->num_resources != 1)) { |
| 77 | dev_err(&pdev->dev, "invalid number of resources\n"); | 83 | dev_err(&pdev->dev, "invalid number of resources\n"); |
| @@ -107,6 +113,10 @@ static int heartbeat_drv_probe(struct platform_device *pdev) | |||
| 107 | hd->nr_bits = ARRAY_SIZE(default_bit_pos); | 113 | hd->nr_bits = ARRAY_SIZE(default_bit_pos); |
| 108 | } | 114 | } |
| 109 | 115 | ||
| 116 | hd->mask = 0; | ||
| 117 | for (i = 0; i < hd->nr_bits; i++) | ||
| 118 | hd->mask |= (1 << hd->bit_pos[i]); | ||
| 119 | |||
| 110 | if (!hd->regsize) | 120 | if (!hd->regsize) |
| 111 | hd->regsize = 8; /* default access size */ | 121 | hd->regsize = 8; /* default access size */ |
| 112 | 122 | ||
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index 9a1c423ad167..c481df639022 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c | |||
| @@ -295,6 +295,8 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |||
| 295 | vma->vm_page_prot); | 295 | vma->vm_page_prot); |
| 296 | } | 296 | } |
| 297 | 297 | ||
| 298 | #ifndef CONFIG_GENERIC_IOMAP | ||
| 299 | |||
| 298 | static void __iomem *ioport_map_pci(struct pci_dev *dev, | 300 | static void __iomem *ioport_map_pci(struct pci_dev *dev, |
| 299 | unsigned long port, unsigned int nr) | 301 | unsigned long port, unsigned int nr) |
| 300 | { | 302 | { |
| @@ -346,6 +348,8 @@ void pci_iounmap(struct pci_dev *dev, void __iomem *addr) | |||
| 346 | } | 348 | } |
| 347 | EXPORT_SYMBOL(pci_iounmap); | 349 | EXPORT_SYMBOL(pci_iounmap); |
| 348 | 350 | ||
| 351 | #endif /* CONFIG_GENERIC_IOMAP */ | ||
| 352 | |||
| 349 | #ifdef CONFIG_HOTPLUG | 353 | #ifdef CONFIG_HOTPLUG |
| 350 | EXPORT_SYMBOL(pcibios_resource_to_bus); | 354 | EXPORT_SYMBOL(pcibios_resource_to_bus); |
| 351 | EXPORT_SYMBOL(pcibios_bus_to_resource); | 355 | EXPORT_SYMBOL(pcibios_bus_to_resource); |
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild index 43910cdf78a5..e121c30f797d 100644 --- a/arch/sh/include/asm/Kbuild +++ b/arch/sh/include/asm/Kbuild | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | include include/asm-generic/Kbuild.asm | 1 | include include/asm-generic/Kbuild.asm |
| 2 | 2 | ||
| 3 | header-y += cpu-features.h | 3 | header-y += cachectl.h cpu-features.h |
| 4 | 4 | ||
| 5 | unifdef-y += unistd_32.h | 5 | unifdef-y += unistd_32.h |
| 6 | unifdef-y += unistd_64.h | 6 | unifdef-y += unistd_64.h |
diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h index c01718040166..d02c01b3e6b9 100644 --- a/arch/sh/include/asm/bug.h +++ b/arch/sh/include/asm/bug.h | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | #define __ASM_SH_BUG_H | 2 | #define __ASM_SH_BUG_H |
| 3 | 3 | ||
| 4 | #define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ | 4 | #define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ |
| 5 | #define BUGFLAG_UNWINDER (1 << 1) | ||
| 5 | 6 | ||
| 6 | #ifdef CONFIG_GENERIC_BUG | 7 | #ifdef CONFIG_GENERIC_BUG |
| 7 | #define HAVE_ARCH_BUG | 8 | #define HAVE_ARCH_BUG |
| @@ -72,6 +73,36 @@ do { \ | |||
| 72 | unlikely(__ret_warn_on); \ | 73 | unlikely(__ret_warn_on); \ |
| 73 | }) | 74 | }) |
| 74 | 75 | ||
| 76 | #define UNWINDER_BUG() \ | ||
| 77 | do { \ | ||
| 78 | __asm__ __volatile__ ( \ | ||
| 79 | "1:\t.short %O0\n" \ | ||
| 80 | _EMIT_BUG_ENTRY \ | ||
| 81 | : \ | ||
| 82 | : "n" (TRAPA_BUG_OPCODE), \ | ||
| 83 | "i" (__FILE__), \ | ||
| 84 | "i" (__LINE__), \ | ||
| 85 | "i" (BUGFLAG_UNWINDER), \ | ||
| 86 | "i" (sizeof(struct bug_entry))); \ | ||
| 87 | } while (0) | ||
| 88 | |||
| 89 | #define UNWINDER_BUG_ON(x) ({ \ | ||
| 90 | int __ret_unwinder_on = !!(x); \ | ||
| 91 | if (__builtin_constant_p(__ret_unwinder_on)) { \ | ||
| 92 | if (__ret_unwinder_on) \ | ||
| 93 | UNWINDER_BUG(); \ | ||
| 94 | } else { \ | ||
| 95 | if (unlikely(__ret_unwinder_on)) \ | ||
| 96 | UNWINDER_BUG(); \ | ||
| 97 | } \ | ||
| 98 | unlikely(__ret_unwinder_on); \ | ||
| 99 | }) | ||
| 100 | |||
| 101 | #else | ||
| 102 | |||
| 103 | #define UNWINDER_BUG BUG | ||
| 104 | #define UNWINDER_BUG_ON BUG_ON | ||
| 105 | |||
| 75 | #endif /* CONFIG_GENERIC_BUG */ | 106 | #endif /* CONFIG_GENERIC_BUG */ |
| 76 | 107 | ||
| 77 | #include <asm-generic/bug.h> | 108 | #include <asm-generic/bug.h> |
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h index 4924ff6f5439..46260fcbdf4b 100644 --- a/arch/sh/include/asm/bugs.h +++ b/arch/sh/include/asm/bugs.h | |||
| @@ -21,25 +21,25 @@ static void __init check_bugs(void) | |||
| 21 | 21 | ||
| 22 | current_cpu_data.loops_per_jiffy = loops_per_jiffy; | 22 | current_cpu_data.loops_per_jiffy = loops_per_jiffy; |
| 23 | 23 | ||
| 24 | switch (current_cpu_data.type) { | 24 | switch (current_cpu_data.family) { |
| 25 | case CPU_SH7619: | 25 | case CPU_FAMILY_SH2: |
| 26 | *p++ = '2'; | 26 | *p++ = '2'; |
| 27 | break; | 27 | break; |
| 28 | case CPU_SH7201 ... CPU_MXG: | 28 | case CPU_FAMILY_SH2A: |
| 29 | *p++ = '2'; | 29 | *p++ = '2'; |
| 30 | *p++ = 'a'; | 30 | *p++ = 'a'; |
| 31 | break; | 31 | break; |
| 32 | case CPU_SH7705 ... CPU_SH7729: | 32 | case CPU_FAMILY_SH3: |
| 33 | *p++ = '3'; | 33 | *p++ = '3'; |
| 34 | break; | 34 | break; |
| 35 | case CPU_SH7750 ... CPU_SH4_501: | 35 | case CPU_FAMILY_SH4: |
| 36 | *p++ = '4'; | 36 | *p++ = '4'; |
| 37 | break; | 37 | break; |
| 38 | case CPU_SH7763 ... CPU_SHX3: | 38 | case CPU_FAMILY_SH4A: |
| 39 | *p++ = '4'; | 39 | *p++ = '4'; |
| 40 | *p++ = 'a'; | 40 | *p++ = 'a'; |
| 41 | break; | 41 | break; |
| 42 | case CPU_SH7343 ... CPU_SH7366: | 42 | case CPU_FAMILY_SH4AL_DSP: |
| 43 | *p++ = '4'; | 43 | *p++ = '4'; |
| 44 | *p++ = 'a'; | 44 | *p++ = 'a'; |
| 45 | *p++ = 'l'; | 45 | *p++ = 'l'; |
| @@ -48,15 +48,15 @@ static void __init check_bugs(void) | |||
| 48 | *p++ = 's'; | 48 | *p++ = 's'; |
| 49 | *p++ = 'p'; | 49 | *p++ = 'p'; |
| 50 | break; | 50 | break; |
| 51 | case CPU_SH5_101 ... CPU_SH5_103: | 51 | case CPU_FAMILY_SH5: |
| 52 | *p++ = '6'; | 52 | *p++ = '6'; |
| 53 | *p++ = '4'; | 53 | *p++ = '4'; |
| 54 | break; | 54 | break; |
| 55 | case CPU_SH_NONE: | 55 | case CPU_FAMILY_UNKNOWN: |
| 56 | /* | 56 | /* |
| 57 | * Specifically use CPU_SH_NONE rather than default:, | 57 | * Specifically use CPU_FAMILY_UNKNOWN rather than |
| 58 | * so we're able to have the compiler whine about | 58 | * default:, so we're able to have the compiler whine |
| 59 | * unhandled enumerations. | 59 | * about unhandled enumerations. |
| 60 | */ | 60 | */ |
| 61 | break; | 61 | break; |
| 62 | } | 62 | } |
diff --git a/arch/sh/include/asm/cachectl.h b/arch/sh/include/asm/cachectl.h new file mode 100644 index 000000000000..6ffb4b7a212e --- /dev/null +++ b/arch/sh/include/asm/cachectl.h | |||
| @@ -0,0 +1,19 @@ | |||
| 1 | #ifndef _SH_CACHECTL_H | ||
| 2 | #define _SH_CACHECTL_H | ||
| 3 | |||
| 4 | /* Definitions for the cacheflush system call. */ | ||
| 5 | |||
| 6 | #define CACHEFLUSH_D_INVAL 0x1 /* invalidate (without write back) */ | ||
| 7 | #define CACHEFLUSH_D_WB 0x2 /* write back (without invalidate) */ | ||
| 8 | #define CACHEFLUSH_D_PURGE 0x3 /* writeback and invalidate */ | ||
| 9 | |||
| 10 | #define CACHEFLUSH_I 0x4 | ||
| 11 | |||
| 12 | /* | ||
| 13 | * Options for cacheflush system call | ||
| 14 | */ | ||
| 15 | #define ICACHE CACHEFLUSH_I /* flush instruction cache */ | ||
| 16 | #define DCACHE CACHEFLUSH_D_PURGE /* writeback and flush data cache */ | ||
| 17 | #define BCACHE (ICACHE|DCACHE) /* flush both caches */ | ||
| 18 | |||
| 19 | #endif /* _SH_CACHECTL_H */ | ||
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h index 4c5462daa74c..c29918f3c819 100644 --- a/arch/sh/include/asm/cacheflush.h +++ b/arch/sh/include/asm/cacheflush.h | |||
| @@ -3,45 +3,65 @@ | |||
| 3 | 3 | ||
| 4 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
| 5 | 5 | ||
| 6 | #ifdef CONFIG_CACHE_OFF | 6 | #include <linux/mm.h> |
| 7 | |||
| 7 | /* | 8 | /* |
| 8 | * Nothing to do when the cache is disabled, initial flush and explicit | 9 | * Cache flushing: |
| 9 | * disabling is handled at CPU init time. | 10 | * |
| 11 | * - flush_cache_all() flushes entire cache | ||
| 12 | * - flush_cache_mm(mm) flushes the specified mm context's cache lines | ||
| 13 | * - flush_cache_dup mm(mm) handles cache flushing when forking | ||
| 14 | * - flush_cache_page(mm, vmaddr, pfn) flushes a single page | ||
| 15 | * - flush_cache_range(vma, start, end) flushes a range of pages | ||
| 10 | * | 16 | * |
| 11 | * See arch/sh/kernel/cpu/init.c:cache_init(). | 17 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache |
| 18 | * - flush_icache_range(start, end) flushes(invalidates) a range for icache | ||
| 19 | * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache | ||
| 20 | * - flush_cache_sigtramp(vaddr) flushes the signal trampoline | ||
| 12 | */ | 21 | */ |
| 13 | #define p3_cache_init() do { } while (0) | 22 | extern void (*local_flush_cache_all)(void *args); |
| 14 | #define flush_cache_all() do { } while (0) | 23 | extern void (*local_flush_cache_mm)(void *args); |
| 15 | #define flush_cache_mm(mm) do { } while (0) | 24 | extern void (*local_flush_cache_dup_mm)(void *args); |
| 16 | #define flush_cache_dup_mm(mm) do { } while (0) | 25 | extern void (*local_flush_cache_page)(void *args); |
| 17 | #define flush_cache_range(vma, start, end) do { } while (0) | 26 | extern void (*local_flush_cache_range)(void *args); |
| 18 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | 27 | extern void (*local_flush_dcache_page)(void *args); |
| 19 | #define flush_dcache_page(page) do { } while (0) | 28 | extern void (*local_flush_icache_range)(void *args); |
| 20 | #define flush_icache_range(start, end) do { } while (0) | 29 | extern void (*local_flush_icache_page)(void *args); |
| 21 | #define flush_icache_page(vma,pg) do { } while (0) | 30 | extern void (*local_flush_cache_sigtramp)(void *args); |
| 22 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 23 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 24 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
| 25 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
| 26 | #define __flush_wback_region(start, size) do { (void)(start); } while (0) | ||
| 27 | #define __flush_purge_region(start, size) do { (void)(start); } while (0) | ||
| 28 | #define __flush_invalidate_region(start, size) do { (void)(start); } while (0) | ||
| 29 | #else | ||
| 30 | #include <cpu/cacheflush.h> | ||
| 31 | 31 | ||
| 32 | /* | 32 | static inline void cache_noop(void *args) { } |
| 33 | * Consistent DMA requires that the __flush_xxx() primitives must be set | 33 | |
| 34 | * for any of the enabled non-coherent caches (most of the UP CPUs), | 34 | extern void (*__flush_wback_region)(void *start, int size); |
| 35 | * regardless of PIPT or VIPT cache configurations. | 35 | extern void (*__flush_purge_region)(void *start, int size); |
| 36 | */ | 36 | extern void (*__flush_invalidate_region)(void *start, int size); |
| 37 | |||
| 38 | extern void flush_cache_all(void); | ||
| 39 | extern void flush_cache_mm(struct mm_struct *mm); | ||
| 40 | extern void flush_cache_dup_mm(struct mm_struct *mm); | ||
| 41 | extern void flush_cache_page(struct vm_area_struct *vma, | ||
| 42 | unsigned long addr, unsigned long pfn); | ||
| 43 | extern void flush_cache_range(struct vm_area_struct *vma, | ||
| 44 | unsigned long start, unsigned long end); | ||
| 45 | extern void flush_dcache_page(struct page *page); | ||
| 46 | extern void flush_icache_range(unsigned long start, unsigned long end); | ||
| 47 | extern void flush_icache_page(struct vm_area_struct *vma, | ||
| 48 | struct page *page); | ||
| 49 | extern void flush_cache_sigtramp(unsigned long address); | ||
| 50 | |||
| 51 | struct flusher_data { | ||
| 52 | struct vm_area_struct *vma; | ||
| 53 | unsigned long addr1, addr2; | ||
| 54 | }; | ||
| 37 | 55 | ||
| 38 | /* Flush (write-back only) a region (smaller than a page) */ | 56 | #define ARCH_HAS_FLUSH_ANON_PAGE |
| 39 | extern void __flush_wback_region(void *start, int size); | 57 | extern void __flush_anon_page(struct page *page, unsigned long); |
| 40 | /* Flush (write-back & invalidate) a region (smaller than a page) */ | 58 | |
| 41 | extern void __flush_purge_region(void *start, int size); | 59 | static inline void flush_anon_page(struct vm_area_struct *vma, |
| 42 | /* Flush (invalidate only) a region (smaller than a page) */ | 60 | struct page *page, unsigned long vmaddr) |
| 43 | extern void __flush_invalidate_region(void *start, int size); | 61 | { |
| 44 | #endif | 62 | if (boot_cpu_data.dcache.n_aliases && PageAnon(page)) |
| 63 | __flush_anon_page(page, vmaddr); | ||
| 64 | } | ||
| 45 | 65 | ||
| 46 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE | 66 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE |
| 47 | static inline void flush_kernel_dcache_page(struct page *page) | 67 | static inline void flush_kernel_dcache_page(struct page *page) |
| @@ -49,7 +69,6 @@ static inline void flush_kernel_dcache_page(struct page *page) | |||
| 49 | flush_dcache_page(page); | 69 | flush_dcache_page(page); |
| 50 | } | 70 | } |
| 51 | 71 | ||
| 52 | #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_CACHE_OFF) | ||
| 53 | extern void copy_to_user_page(struct vm_area_struct *vma, | 72 | extern void copy_to_user_page(struct vm_area_struct *vma, |
| 54 | struct page *page, unsigned long vaddr, void *dst, const void *src, | 73 | struct page *page, unsigned long vaddr, void *dst, const void *src, |
| 55 | unsigned long len); | 74 | unsigned long len); |
| @@ -57,23 +76,20 @@ extern void copy_to_user_page(struct vm_area_struct *vma, | |||
| 57 | extern void copy_from_user_page(struct vm_area_struct *vma, | 76 | extern void copy_from_user_page(struct vm_area_struct *vma, |
| 58 | struct page *page, unsigned long vaddr, void *dst, const void *src, | 77 | struct page *page, unsigned long vaddr, void *dst, const void *src, |
| 59 | unsigned long len); | 78 | unsigned long len); |
| 60 | #else | ||
| 61 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
| 62 | do { \ | ||
| 63 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
| 64 | memcpy(dst, src, len); \ | ||
| 65 | flush_icache_user_range(vma, page, vaddr, len); \ | ||
| 66 | } while (0) | ||
| 67 | |||
| 68 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
| 69 | do { \ | ||
| 70 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
| 71 | memcpy(dst, src, len); \ | ||
| 72 | } while (0) | ||
| 73 | #endif | ||
| 74 | 79 | ||
| 75 | #define flush_cache_vmap(start, end) flush_cache_all() | 80 | #define flush_cache_vmap(start, end) flush_cache_all() |
| 76 | #define flush_cache_vunmap(start, end) flush_cache_all() | 81 | #define flush_cache_vunmap(start, end) flush_cache_all() |
| 77 | 82 | ||
| 83 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 84 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 85 | |||
| 86 | void kmap_coherent_init(void); | ||
| 87 | void *kmap_coherent(struct page *page, unsigned long addr); | ||
| 88 | void kunmap_coherent(void *kvaddr); | ||
| 89 | |||
| 90 | #define PG_dcache_dirty PG_arch_1 | ||
| 91 | |||
| 92 | void cpu_cache_init(void); | ||
| 93 | |||
| 78 | #endif /* __KERNEL__ */ | 94 | #endif /* __KERNEL__ */ |
| 79 | #endif /* __ASM_SH_CACHEFLUSH_H */ | 95 | #endif /* __ASM_SH_CACHEFLUSH_H */ |
diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h index 8688a88303ee..b16debfe8c1e 100644 --- a/arch/sh/include/asm/device.h +++ b/arch/sh/include/asm/device.h | |||
| @@ -3,7 +3,9 @@ | |||
| 3 | * | 3 | * |
| 4 | * This file is released under the GPLv2 | 4 | * This file is released under the GPLv2 |
| 5 | */ | 5 | */ |
| 6 | #include <asm-generic/device.h> | 6 | |
| 7 | struct dev_archdata { | ||
| 8 | }; | ||
| 7 | 9 | ||
| 8 | struct platform_device; | 10 | struct platform_device; |
| 9 | /* allocate contiguous memory chunk and fill in struct resource */ | 11 | /* allocate contiguous memory chunk and fill in struct resource */ |
| @@ -12,3 +14,15 @@ int platform_resource_setup_memory(struct platform_device *pdev, | |||
| 12 | 14 | ||
| 13 | void plat_early_device_setup(void); | 15 | void plat_early_device_setup(void); |
| 14 | 16 | ||
| 17 | #define PDEV_ARCHDATA_FLAG_INIT 0 | ||
| 18 | #define PDEV_ARCHDATA_FLAG_IDLE 1 | ||
| 19 | #define PDEV_ARCHDATA_FLAG_SUSP 2 | ||
| 20 | |||
| 21 | struct pdev_archdata { | ||
| 22 | int hwblk_id; | ||
| 23 | #ifdef CONFIG_PM_RUNTIME | ||
| 24 | unsigned long flags; | ||
| 25 | struct list_head entry; | ||
| 26 | struct mutex mutex; | ||
| 27 | #endif | ||
| 28 | }; | ||
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h index 0c8f8e14622a..68a5f4cb0343 100644 --- a/arch/sh/include/asm/dma-sh.h +++ b/arch/sh/include/asm/dma-sh.h | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | 16 | ||
| 17 | /* DMAOR contorl: The DMAOR access size is different by CPU.*/ | 17 | /* DMAOR contorl: The DMAOR access size is different by CPU.*/ |
| 18 | #if defined(CONFIG_CPU_SUBTYPE_SH7723) || \ | 18 | #if defined(CONFIG_CPU_SUBTYPE_SH7723) || \ |
| 19 | defined(CONFIG_CPU_SUBTYPE_SH7724) || \ | ||
| 19 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 20 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
| 20 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 21 | defined(CONFIG_CPU_SUBTYPE_SH7785) |
| 21 | #define dmaor_read_reg(n) \ | 22 | #define dmaor_read_reg(n) \ |
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h new file mode 100644 index 000000000000..ced6795891a6 --- /dev/null +++ b/arch/sh/include/asm/dwarf.h | |||
| @@ -0,0 +1,398 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Matt Fleming <matt@console-pimps.org> | ||
| 3 | * | ||
| 4 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 5 | * License. See the file "COPYING" in the main directory of this archive | ||
| 6 | * for more details. | ||
| 7 | * | ||
| 8 | */ | ||
| 9 | #ifndef __ASM_SH_DWARF_H | ||
| 10 | #define __ASM_SH_DWARF_H | ||
| 11 | |||
| 12 | #ifdef CONFIG_DWARF_UNWINDER | ||
| 13 | |||
| 14 | /* | ||
| 15 | * DWARF expression operations | ||
| 16 | */ | ||
| 17 | #define DW_OP_addr 0x03 | ||
| 18 | #define DW_OP_deref 0x06 | ||
| 19 | #define DW_OP_const1u 0x08 | ||
| 20 | #define DW_OP_const1s 0x09 | ||
| 21 | #define DW_OP_const2u 0x0a | ||
| 22 | #define DW_OP_const2s 0x0b | ||
| 23 | #define DW_OP_const4u 0x0c | ||
| 24 | #define DW_OP_const4s 0x0d | ||
| 25 | #define DW_OP_const8u 0x0e | ||
| 26 | #define DW_OP_const8s 0x0f | ||
| 27 | #define DW_OP_constu 0x10 | ||
| 28 | #define DW_OP_consts 0x11 | ||
| 29 | #define DW_OP_dup 0x12 | ||
| 30 | #define DW_OP_drop 0x13 | ||
| 31 | #define DW_OP_over 0x14 | ||
| 32 | #define DW_OP_pick 0x15 | ||
| 33 | #define DW_OP_swap 0x16 | ||
| 34 | #define DW_OP_rot 0x17 | ||
| 35 | #define DW_OP_xderef 0x18 | ||
| 36 | #define DW_OP_abs 0x19 | ||
| 37 | #define DW_OP_and 0x1a | ||
| 38 | #define DW_OP_div 0x1b | ||
| 39 | #define DW_OP_minus 0x1c | ||
| 40 | #define DW_OP_mod 0x1d | ||
| 41 | #define DW_OP_mul 0x1e | ||
| 42 | #define DW_OP_neg 0x1f | ||
| 43 | #define DW_OP_not 0x20 | ||
| 44 | #define DW_OP_or 0x21 | ||
| 45 | #define DW_OP_plus 0x22 | ||
| 46 | #define DW_OP_plus_uconst 0x23 | ||
| 47 | #define DW_OP_shl 0x24 | ||
| 48 | #define DW_OP_shr 0x25 | ||
| 49 | #define DW_OP_shra 0x26 | ||
| 50 | #define DW_OP_xor 0x27 | ||
| 51 | #define DW_OP_skip 0x2f | ||
| 52 | #define DW_OP_bra 0x28 | ||
| 53 | #define DW_OP_eq 0x29 | ||
| 54 | #define DW_OP_ge 0x2a | ||
| 55 | #define DW_OP_gt 0x2b | ||
| 56 | #define DW_OP_le 0x2c | ||
| 57 | #define DW_OP_lt 0x2d | ||
| 58 | #define DW_OP_ne 0x2e | ||
| 59 | #define DW_OP_lit0 0x30 | ||
| 60 | #define DW_OP_lit1 0x31 | ||
| 61 | #define DW_OP_lit2 0x32 | ||
| 62 | #define DW_OP_lit3 0x33 | ||
| 63 | #define DW_OP_lit4 0x34 | ||
| 64 | #define DW_OP_lit5 0x35 | ||
| 65 | #define DW_OP_lit6 0x36 | ||
| 66 | #define DW_OP_lit7 0x37 | ||
| 67 | #define DW_OP_lit8 0x38 | ||
| 68 | #define DW_OP_lit9 0x39 | ||
| 69 | #define DW_OP_lit10 0x3a | ||
| 70 | #define DW_OP_lit11 0x3b | ||
| 71 | #define DW_OP_lit12 0x3c | ||
| 72 | #define DW_OP_lit13 0x3d | ||
| 73 | #define DW_OP_lit14 0x3e | ||
| 74 | #define DW_OP_lit15 0x3f | ||
| 75 | #define DW_OP_lit16 0x40 | ||
| 76 | #define DW_OP_lit17 0x41 | ||
| 77 | #define DW_OP_lit18 0x42 | ||
| 78 | #define DW_OP_lit19 0x43 | ||
| 79 | #define DW_OP_lit20 0x44 | ||
| 80 | #define DW_OP_lit21 0x45 | ||
| 81 | #define DW_OP_lit22 0x46 | ||
| 82 | #define DW_OP_lit23 0x47 | ||
| 83 | #define DW_OP_lit24 0x48 | ||
| 84 | #define DW_OP_lit25 0x49 | ||
| 85 | #define DW_OP_lit26 0x4a | ||
| 86 | #define DW_OP_lit27 0x4b | ||
| 87 | #define DW_OP_lit28 0x4c | ||
| 88 | #define DW_OP_lit29 0x4d | ||
| 89 | #define DW_OP_lit30 0x4e | ||
| 90 | #define DW_OP_lit31 0x4f | ||
| 91 | #define DW_OP_reg0 0x50 | ||
| 92 | #define DW_OP_reg1 0x51 | ||
| 93 | #define DW_OP_reg2 0x52 | ||
| 94 | #define DW_OP_reg3 0x53 | ||
| 95 | #define DW_OP_reg4 0x54 | ||
| 96 | #define DW_OP_reg5 0x55 | ||
| 97 | #define DW_OP_reg6 0x56 | ||
| 98 | #define DW_OP_reg7 0x57 | ||
| 99 | #define DW_OP_reg8 0x58 | ||
| 100 | #define DW_OP_reg9 0x59 | ||
| 101 | #define DW_OP_reg10 0x5a | ||
| 102 | #define DW_OP_reg11 0x5b | ||
| 103 | #define DW_OP_reg12 0x5c | ||
| 104 | #define DW_OP_reg13 0x5d | ||
| 105 | #define DW_OP_reg14 0x5e | ||
| 106 | #define DW_OP_reg15 0x5f | ||
| 107 | #define DW_OP_reg16 0x60 | ||
| 108 | #define DW_OP_reg17 0x61 | ||
| 109 | #define DW_OP_reg18 0x62 | ||
| 110 | #define DW_OP_reg19 0x63 | ||
| 111 | #define DW_OP_reg20 0x64 | ||
| 112 | #define DW_OP_reg21 0x65 | ||
| 113 | #define DW_OP_reg22 0x66 | ||
| 114 | #define DW_OP_reg23 0x67 | ||
| 115 | #define DW_OP_reg24 0x68 | ||
| 116 | #define DW_OP_reg25 0x69 | ||
| 117 | #define DW_OP_reg26 0x6a | ||
| 118 | #define DW_OP_reg27 0x6b | ||
| 119 | #define DW_OP_reg28 0x6c | ||
| 120 | #define DW_OP_reg29 0x6d | ||
| 121 | #define DW_OP_reg30 0x6e | ||
| 122 | #define DW_OP_reg31 0x6f | ||
| 123 | #define DW_OP_breg0 0x70 | ||
| 124 | #define DW_OP_breg1 0x71 | ||
| 125 | #define DW_OP_breg2 0x72 | ||
| 126 | #define DW_OP_breg3 0x73 | ||
| 127 | #define DW_OP_breg4 0x74 | ||
| 128 | #define DW_OP_breg5 0x75 | ||
| 129 | #define DW_OP_breg6 0x76 | ||
| 130 | #define DW_OP_breg7 0x77 | ||
| 131 | #define DW_OP_breg8 0x78 | ||
| 132 | #define DW_OP_breg9 0x79 | ||
| 133 | #define DW_OP_breg10 0x7a | ||
| 134 | #define DW_OP_breg11 0x7b | ||
| 135 | #define DW_OP_breg12 0x7c | ||
| 136 | #define DW_OP_breg13 0x7d | ||
| 137 | #define DW_OP_breg14 0x7e | ||
| 138 | #define DW_OP_breg15 0x7f | ||
| 139 | #define DW_OP_breg16 0x80 | ||
| 140 | #define DW_OP_breg17 0x81 | ||
| 141 | #define DW_OP_breg18 0x82 | ||
| 142 | #define DW_OP_breg19 0x83 | ||
| 143 | #define DW_OP_breg20 0x84 | ||
| 144 | #define DW_OP_breg21 0x85 | ||
| 145 | #define DW_OP_breg22 0x86 | ||
| 146 | #define DW_OP_breg23 0x87 | ||
| 147 | #define DW_OP_breg24 0x88 | ||
| 148 | #define DW_OP_breg25 0x89 | ||
| 149 | #define DW_OP_breg26 0x8a | ||
| 150 | #define DW_OP_breg27 0x8b | ||
| 151 | #define DW_OP_breg28 0x8c | ||
| 152 | #define DW_OP_breg29 0x8d | ||
| 153 | #define DW_OP_breg30 0x8e | ||
| 154 | #define DW_OP_breg31 0x8f | ||
| 155 | #define DW_OP_regx 0x90 | ||
| 156 | #define DW_OP_fbreg 0x91 | ||
| 157 | #define DW_OP_bregx 0x92 | ||
| 158 | #define DW_OP_piece 0x93 | ||
| 159 | #define DW_OP_deref_size 0x94 | ||
| 160 | #define DW_OP_xderef_size 0x95 | ||
| 161 | #define DW_OP_nop 0x96 | ||
| 162 | #define DW_OP_push_object_address 0x97 | ||
| 163 | #define DW_OP_call2 0x98 | ||
| 164 | #define DW_OP_call4 0x99 | ||
| 165 | #define DW_OP_call_ref 0x9a | ||
| 166 | #define DW_OP_form_tls_address 0x9b | ||
| 167 | #define DW_OP_call_frame_cfa 0x9c | ||
| 168 | #define DW_OP_bit_piece 0x9d | ||
| 169 | #define DW_OP_lo_user 0xe0 | ||
| 170 | #define DW_OP_hi_user 0xff | ||
| 171 | |||
| 172 | /* | ||
| 173 | * Addresses used in FDE entries in the .eh_frame section may be encoded | ||
| 174 | * using one of the following encodings. | ||
| 175 | */ | ||
| 176 | #define DW_EH_PE_absptr 0x00 | ||
| 177 | #define DW_EH_PE_omit 0xff | ||
| 178 | #define DW_EH_PE_uleb128 0x01 | ||
| 179 | #define DW_EH_PE_udata2 0x02 | ||
| 180 | #define DW_EH_PE_udata4 0x03 | ||
| 181 | #define DW_EH_PE_udata8 0x04 | ||
| 182 | #define DW_EH_PE_sleb128 0x09 | ||
| 183 | #define DW_EH_PE_sdata2 0x0a | ||
| 184 | #define DW_EH_PE_sdata4 0x0b | ||
| 185 | #define DW_EH_PE_sdata8 0x0c | ||
| 186 | #define DW_EH_PE_signed 0x09 | ||
| 187 | |||
| 188 | #define DW_EH_PE_pcrel 0x10 | ||
| 189 | |||
| 190 | /* | ||
| 191 | * The architecture-specific register number that contains the return | ||
| 192 | * address in the .debug_frame table. | ||
| 193 | */ | ||
| 194 | #define DWARF_ARCH_RA_REG 17 | ||
| 195 | |||
| 196 | #ifndef __ASSEMBLY__ | ||
| 197 | /* | ||
| 198 | * Read either the frame pointer (r14) or the stack pointer (r15). | ||
| 199 | * NOTE: this MUST be inlined. | ||
| 200 | */ | ||
| 201 | static __always_inline unsigned long dwarf_read_arch_reg(unsigned int reg) | ||
| 202 | { | ||
| 203 | unsigned long value = 0; | ||
| 204 | |||
| 205 | switch (reg) { | ||
| 206 | case 14: | ||
| 207 | __asm__ __volatile__("mov r14, %0\n" : "=r" (value)); | ||
| 208 | break; | ||
| 209 | case 15: | ||
| 210 | __asm__ __volatile__("mov r15, %0\n" : "=r" (value)); | ||
| 211 | break; | ||
| 212 | default: | ||
| 213 | BUG(); | ||
| 214 | } | ||
| 215 | |||
| 216 | return value; | ||
| 217 | } | ||
| 218 | |||
| 219 | /** | ||
| 220 | * dwarf_cie - Common Information Entry | ||
| 221 | */ | ||
| 222 | struct dwarf_cie { | ||
| 223 | unsigned long length; | ||
| 224 | unsigned long cie_id; | ||
| 225 | unsigned char version; | ||
| 226 | const char *augmentation; | ||
| 227 | unsigned int code_alignment_factor; | ||
| 228 | int data_alignment_factor; | ||
| 229 | |||
| 230 | /* Which column in the rule table represents return addr of func. */ | ||
| 231 | unsigned int return_address_reg; | ||
| 232 | |||
| 233 | unsigned char *initial_instructions; | ||
| 234 | unsigned char *instructions_end; | ||
| 235 | |||
| 236 | unsigned char encoding; | ||
| 237 | |||
| 238 | unsigned long cie_pointer; | ||
| 239 | |||
| 240 | struct list_head link; | ||
| 241 | |||
| 242 | unsigned long flags; | ||
| 243 | #define DWARF_CIE_Z_AUGMENTATION (1 << 0) | ||
| 244 | }; | ||
| 245 | |||
| 246 | /** | ||
| 247 | * dwarf_fde - Frame Description Entry | ||
| 248 | */ | ||
| 249 | struct dwarf_fde { | ||
| 250 | unsigned long length; | ||
| 251 | unsigned long cie_pointer; | ||
| 252 | struct dwarf_cie *cie; | ||
| 253 | unsigned long initial_location; | ||
| 254 | unsigned long address_range; | ||
| 255 | unsigned char *instructions; | ||
| 256 | unsigned char *end; | ||
| 257 | struct list_head link; | ||
| 258 | }; | ||
| 259 | |||
| 260 | /** | ||
| 261 | * dwarf_frame - DWARF information for a frame in the call stack | ||
| 262 | */ | ||
| 263 | struct dwarf_frame { | ||
| 264 | struct dwarf_frame *prev, *next; | ||
| 265 | |||
| 266 | unsigned long pc; | ||
| 267 | |||
| 268 | struct list_head reg_list; | ||
| 269 | |||
| 270 | unsigned long cfa; | ||
| 271 | |||
| 272 | /* Valid when DW_FRAME_CFA_REG_OFFSET is set in flags */ | ||
| 273 | unsigned int cfa_register; | ||
| 274 | unsigned int cfa_offset; | ||
| 275 | |||
| 276 | /* Valid when DW_FRAME_CFA_REG_EXP is set in flags */ | ||
| 277 | unsigned char *cfa_expr; | ||
| 278 | unsigned int cfa_expr_len; | ||
| 279 | |||
| 280 | unsigned long flags; | ||
| 281 | #define DWARF_FRAME_CFA_REG_OFFSET (1 << 0) | ||
| 282 | #define DWARF_FRAME_CFA_REG_EXP (1 << 1) | ||
| 283 | |||
| 284 | unsigned long return_addr; | ||
| 285 | }; | ||
| 286 | |||
| 287 | /** | ||
| 288 | * dwarf_reg - DWARF register | ||
| 289 | * @flags: Describes how to calculate the value of this register | ||
| 290 | */ | ||
| 291 | struct dwarf_reg { | ||
| 292 | struct list_head link; | ||
| 293 | |||
| 294 | unsigned int number; | ||
| 295 | |||
| 296 | unsigned long addr; | ||
| 297 | unsigned long flags; | ||
| 298 | #define DWARF_REG_OFFSET (1 << 0) | ||
| 299 | #define DWARF_VAL_OFFSET (1 << 1) | ||
| 300 | #define DWARF_UNDEFINED (1 << 2) | ||
| 301 | }; | ||
| 302 | |||
| 303 | /* | ||
| 304 | * Call Frame instruction opcodes. | ||
| 305 | */ | ||
| 306 | #define DW_CFA_advance_loc 0x40 | ||
| 307 | #define DW_CFA_offset 0x80 | ||
| 308 | #define DW_CFA_restore 0xc0 | ||
| 309 | #define DW_CFA_nop 0x00 | ||
| 310 | #define DW_CFA_set_loc 0x01 | ||
| 311 | #define DW_CFA_advance_loc1 0x02 | ||
| 312 | #define DW_CFA_advance_loc2 0x03 | ||
| 313 | #define DW_CFA_advance_loc4 0x04 | ||
| 314 | #define DW_CFA_offset_extended 0x05 | ||
| 315 | #define DW_CFA_restore_extended 0x06 | ||
| 316 | #define DW_CFA_undefined 0x07 | ||
| 317 | #define DW_CFA_same_value 0x08 | ||
| 318 | #define DW_CFA_register 0x09 | ||
| 319 | #define DW_CFA_remember_state 0x0a | ||
| 320 | #define DW_CFA_restore_state 0x0b | ||
| 321 | #define DW_CFA_def_cfa 0x0c | ||
| 322 | #define DW_CFA_def_cfa_register 0x0d | ||
| 323 | #define DW_CFA_def_cfa_offset 0x0e | ||
| 324 | #define DW_CFA_def_cfa_expression 0x0f | ||
| 325 | #define DW_CFA_expression 0x10 | ||
| 326 | #define DW_CFA_offset_extended_sf 0x11 | ||
| 327 | #define DW_CFA_def_cfa_sf 0x12 | ||
| 328 | #define DW_CFA_def_cfa_offset_sf 0x13 | ||
| 329 | #define DW_CFA_val_offset 0x14 | ||
| 330 | #define DW_CFA_val_offset_sf 0x15 | ||
| 331 | #define DW_CFA_val_expression 0x16 | ||
| 332 | #define DW_CFA_lo_user 0x1c | ||
| 333 | #define DW_CFA_hi_user 0x3f | ||
| 334 | |||
| 335 | /* GNU extension opcodes */ | ||
| 336 | #define DW_CFA_GNU_args_size 0x2e | ||
| 337 | #define DW_CFA_GNU_negative_offset_extended 0x2f | ||
| 338 | |||
| 339 | /* | ||
| 340 | * Some call frame instructions encode their operands in the opcode. We | ||
| 341 | * need some helper functions to extract both the opcode and operands | ||
| 342 | * from an instruction. | ||
| 343 | */ | ||
| 344 | static inline unsigned int DW_CFA_opcode(unsigned long insn) | ||
| 345 | { | ||
| 346 | return (insn & 0xc0); | ||
| 347 | } | ||
| 348 | |||
| 349 | static inline unsigned int DW_CFA_operand(unsigned long insn) | ||
| 350 | { | ||
| 351 | return (insn & 0x3f); | ||
| 352 | } | ||
| 353 | |||
| 354 | #define DW_EH_FRAME_CIE 0 /* .eh_frame CIE IDs are 0 */ | ||
| 355 | #define DW_CIE_ID 0xffffffff | ||
| 356 | #define DW64_CIE_ID 0xffffffffffffffffULL | ||
| 357 | |||
| 358 | /* | ||
| 359 | * DWARF FDE/CIE length field values. | ||
| 360 | */ | ||
| 361 | #define DW_EXT_LO 0xfffffff0 | ||
| 362 | #define DW_EXT_HI 0xffffffff | ||
| 363 | #define DW_EXT_DWARF64 DW_EXT_HI | ||
| 364 | |||
| 365 | extern struct dwarf_frame *dwarf_unwind_stack(unsigned long, | ||
| 366 | struct dwarf_frame *); | ||
| 367 | #endif /* !__ASSEMBLY__ */ | ||
| 368 | |||
| 369 | #define CFI_STARTPROC .cfi_startproc | ||
| 370 | #define CFI_ENDPROC .cfi_endproc | ||
| 371 | #define CFI_DEF_CFA .cfi_def_cfa | ||
| 372 | #define CFI_REGISTER .cfi_register | ||
| 373 | #define CFI_REL_OFFSET .cfi_rel_offset | ||
| 374 | #define CFI_UNDEFINED .cfi_undefined | ||
| 375 | |||
| 376 | #else | ||
| 377 | |||
| 378 | /* | ||
| 379 | * Use the asm comment character to ignore the rest of the line. | ||
| 380 | */ | ||
| 381 | #define CFI_IGNORE ! | ||
| 382 | |||
| 383 | #define CFI_STARTPROC CFI_IGNORE | ||
| 384 | #define CFI_ENDPROC CFI_IGNORE | ||
| 385 | #define CFI_DEF_CFA CFI_IGNORE | ||
| 386 | #define CFI_REGISTER CFI_IGNORE | ||
| 387 | #define CFI_REL_OFFSET CFI_IGNORE | ||
| 388 | #define CFI_UNDEFINED CFI_IGNORE | ||
| 389 | |||
| 390 | #ifndef __ASSEMBLY__ | ||
| 391 | static inline void dwarf_unwinder_init(void) | ||
| 392 | { | ||
| 393 | } | ||
| 394 | #endif | ||
| 395 | |||
| 396 | #endif /* CONFIG_DWARF_UNWINDER */ | ||
| 397 | |||
| 398 | #endif /* __ASM_SH_DWARF_H */ | ||
diff --git a/arch/sh/include/asm/entry-macros.S b/arch/sh/include/asm/entry-macros.S index 3a4752a65722..cc43a55e1fcf 100644 --- a/arch/sh/include/asm/entry-macros.S +++ b/arch/sh/include/asm/entry-macros.S | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | .endm | 7 | .endm |
| 8 | 8 | ||
| 9 | .macro sti | 9 | .macro sti |
| 10 | mov #0xf0, r11 | 10 | mov #0xfffffff0, r11 |
| 11 | extu.b r11, r11 | 11 | extu.b r11, r11 |
| 12 | not r11, r11 | 12 | not r11, r11 |
| 13 | stc sr, r10 | 13 | stc sr, r10 |
| @@ -31,8 +31,92 @@ | |||
| 31 | #endif | 31 | #endif |
| 32 | .endm | 32 | .endm |
| 33 | 33 | ||
| 34 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
| 35 | |||
| 36 | .macro TRACE_IRQS_ON | ||
| 37 | mov.l r0, @-r15 | ||
| 38 | mov.l r1, @-r15 | ||
| 39 | mov.l r2, @-r15 | ||
| 40 | mov.l r3, @-r15 | ||
| 41 | mov.l r4, @-r15 | ||
| 42 | mov.l r5, @-r15 | ||
| 43 | mov.l r6, @-r15 | ||
| 44 | mov.l r7, @-r15 | ||
| 45 | |||
| 46 | mov.l 7834f, r0 | ||
| 47 | jsr @r0 | ||
| 48 | nop | ||
| 49 | |||
| 50 | mov.l @r15+, r7 | ||
| 51 | mov.l @r15+, r6 | ||
| 52 | mov.l @r15+, r5 | ||
| 53 | mov.l @r15+, r4 | ||
| 54 | mov.l @r15+, r3 | ||
| 55 | mov.l @r15+, r2 | ||
| 56 | mov.l @r15+, r1 | ||
| 57 | mov.l @r15+, r0 | ||
| 58 | mov.l 7834f, r0 | ||
| 59 | |||
| 60 | bra 7835f | ||
| 61 | nop | ||
| 62 | .balign 4 | ||
| 63 | 7834: .long trace_hardirqs_on | ||
| 64 | 7835: | ||
| 65 | .endm | ||
| 66 | .macro TRACE_IRQS_OFF | ||
| 67 | |||
| 68 | mov.l r0, @-r15 | ||
| 69 | mov.l r1, @-r15 | ||
| 70 | mov.l r2, @-r15 | ||
| 71 | mov.l r3, @-r15 | ||
| 72 | mov.l r4, @-r15 | ||
| 73 | mov.l r5, @-r15 | ||
| 74 | mov.l r6, @-r15 | ||
| 75 | mov.l r7, @-r15 | ||
| 76 | |||
| 77 | mov.l 7834f, r0 | ||
| 78 | jsr @r0 | ||
| 79 | nop | ||
| 80 | |||
| 81 | mov.l @r15+, r7 | ||
| 82 | mov.l @r15+, r6 | ||
| 83 | mov.l @r15+, r5 | ||
| 84 | mov.l @r15+, r4 | ||
| 85 | mov.l @r15+, r3 | ||
| 86 | mov.l @r15+, r2 | ||
| 87 | mov.l @r15+, r1 | ||
| 88 | mov.l @r15+, r0 | ||
| 89 | mov.l 7834f, r0 | ||
| 90 | |||
| 91 | bra 7835f | ||
| 92 | nop | ||
| 93 | .balign 4 | ||
| 94 | 7834: .long trace_hardirqs_off | ||
| 95 | 7835: | ||
| 96 | .endm | ||
| 97 | |||
| 98 | #else | ||
| 99 | .macro TRACE_IRQS_ON | ||
| 100 | .endm | ||
| 101 | |||
| 102 | .macro TRACE_IRQS_OFF | ||
| 103 | .endm | ||
| 104 | #endif | ||
| 105 | |||
| 34 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) | 106 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) |
| 35 | # define PREF(x) pref @x | 107 | # define PREF(x) pref @x |
| 36 | #else | 108 | #else |
| 37 | # define PREF(x) nop | 109 | # define PREF(x) nop |
| 38 | #endif | 110 | #endif |
| 111 | |||
| 112 | /* | ||
| 113 | * Macro for use within assembly. Because the DWARF unwinder | ||
| 114 | * needs to use the frame register to unwind the stack, we | ||
| 115 | * need to setup r14 with the value of the stack pointer as | ||
| 116 | * the return address is usually on the stack somewhere. | ||
| 117 | */ | ||
| 118 | .macro setup_frame_reg | ||
| 119 | #ifdef CONFIG_DWARF_UNWINDER | ||
| 120 | mov r15, r14 | ||
| 121 | #endif | ||
| 122 | .endm | ||
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h index 8fea7d8c8258..12f3a31f20af 100644 --- a/arch/sh/include/asm/ftrace.h +++ b/arch/sh/include/asm/ftrace.h | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | #ifdef CONFIG_FUNCTION_TRACER | 4 | #ifdef CONFIG_FUNCTION_TRACER |
| 5 | 5 | ||
| 6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ | 6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ |
| 7 | #define FTRACE_SYSCALL_MAX NR_syscalls | ||
| 7 | 8 | ||
| 8 | #ifndef __ASSEMBLY__ | 9 | #ifndef __ASSEMBLY__ |
| 9 | extern void mcount(void); | 10 | extern void mcount(void); |
| @@ -11,10 +12,13 @@ extern void mcount(void); | |||
| 11 | #define MCOUNT_ADDR ((long)(mcount)) | 12 | #define MCOUNT_ADDR ((long)(mcount)) |
| 12 | 13 | ||
| 13 | #ifdef CONFIG_DYNAMIC_FTRACE | 14 | #ifdef CONFIG_DYNAMIC_FTRACE |
| 14 | #define CALLER_ADDR ((long)(ftrace_caller)) | 15 | #define CALL_ADDR ((long)(ftrace_call)) |
| 15 | #define STUB_ADDR ((long)(ftrace_stub)) | 16 | #define STUB_ADDR ((long)(ftrace_stub)) |
| 17 | #define GRAPH_ADDR ((long)(ftrace_graph_call)) | ||
| 18 | #define CALLER_ADDR ((long)(ftrace_caller)) | ||
| 16 | 19 | ||
| 17 | #define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALLER_ADDR) >> 1) | 20 | #define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALL_ADDR) - 4) |
| 21 | #define GRAPH_INSN_OFFSET ((CALLER_ADDR - GRAPH_ADDR) - 4) | ||
| 18 | 22 | ||
| 19 | struct dyn_arch_ftrace { | 23 | struct dyn_arch_ftrace { |
| 20 | /* No extra data needed on sh */ | 24 | /* No extra data needed on sh */ |
diff --git a/arch/sh/include/asm/hardirq.h b/arch/sh/include/asm/hardirq.h index 715ee237fc77..a5be4afa790b 100644 --- a/arch/sh/include/asm/hardirq.h +++ b/arch/sh/include/asm/hardirq.h | |||
| @@ -1,16 +1,9 @@ | |||
| 1 | #ifndef __ASM_SH_HARDIRQ_H | 1 | #ifndef __ASM_SH_HARDIRQ_H |
| 2 | #define __ASM_SH_HARDIRQ_H | 2 | #define __ASM_SH_HARDIRQ_H |
| 3 | 3 | ||
| 4 | #include <linux/threads.h> | ||
| 5 | #include <linux/irq.h> | ||
| 6 | |||
| 7 | /* entry.S is sensitive to the offsets of these fields */ | ||
| 8 | typedef struct { | ||
| 9 | unsigned int __softirq_pending; | ||
| 10 | } ____cacheline_aligned irq_cpustat_t; | ||
| 11 | |||
| 12 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
| 13 | |||
| 14 | extern void ack_bad_irq(unsigned int irq); | 4 | extern void ack_bad_irq(unsigned int irq); |
| 5 | #define ack_bad_irq ack_bad_irq | ||
| 6 | |||
| 7 | #include <asm-generic/hardirq.h> | ||
| 15 | 8 | ||
| 16 | #endif /* __ASM_SH_HARDIRQ_H */ | 9 | #endif /* __ASM_SH_HARDIRQ_H */ |
diff --git a/arch/sh/include/asm/heartbeat.h b/arch/sh/include/asm/heartbeat.h index 724a43ed245e..caaafe5a3ef1 100644 --- a/arch/sh/include/asm/heartbeat.h +++ b/arch/sh/include/asm/heartbeat.h | |||
| @@ -11,6 +11,7 @@ struct heartbeat_data { | |||
| 11 | unsigned int nr_bits; | 11 | unsigned int nr_bits; |
| 12 | struct timer_list timer; | 12 | struct timer_list timer; |
| 13 | unsigned int regsize; | 13 | unsigned int regsize; |
| 14 | unsigned int mask; | ||
| 14 | unsigned long flags; | 15 | unsigned long flags; |
| 15 | }; | 16 | }; |
| 16 | 17 | ||
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h new file mode 100644 index 000000000000..5d3ccae4202b --- /dev/null +++ b/arch/sh/include/asm/hwblk.h | |||
| @@ -0,0 +1,72 @@ | |||
| 1 | #ifndef __ASM_SH_HWBLK_H | ||
| 2 | #define __ASM_SH_HWBLK_H | ||
| 3 | |||
| 4 | #include <asm/clock.h> | ||
| 5 | #include <asm/io.h> | ||
| 6 | |||
| 7 | #define HWBLK_CNT_USAGE 0 | ||
| 8 | #define HWBLK_CNT_IDLE 1 | ||
| 9 | #define HWBLK_CNT_DEVICES 2 | ||
| 10 | #define HWBLK_CNT_NR 3 | ||
| 11 | |||
| 12 | #define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */ | ||
| 13 | |||
| 14 | #define HWBLK_AREA(_flags, _parent) \ | ||
| 15 | { \ | ||
| 16 | .flags = _flags, \ | ||
| 17 | .parent = _parent, \ | ||
| 18 | } | ||
| 19 | |||
| 20 | struct hwblk_area { | ||
| 21 | int cnt[HWBLK_CNT_NR]; | ||
| 22 | unsigned char parent; | ||
| 23 | unsigned char flags; | ||
| 24 | }; | ||
| 25 | |||
| 26 | #define HWBLK(_mstp, _bit, _area) \ | ||
| 27 | { \ | ||
| 28 | .mstp = (void __iomem *)_mstp, \ | ||
| 29 | .bit = _bit, \ | ||
| 30 | .area = _area, \ | ||
| 31 | } | ||
| 32 | |||
| 33 | struct hwblk { | ||
| 34 | void __iomem *mstp; | ||
| 35 | unsigned char bit; | ||
| 36 | unsigned char area; | ||
| 37 | int cnt[HWBLK_CNT_NR]; | ||
| 38 | }; | ||
| 39 | |||
| 40 | struct hwblk_info { | ||
| 41 | struct hwblk_area *areas; | ||
| 42 | int nr_areas; | ||
| 43 | struct hwblk *hwblks; | ||
| 44 | int nr_hwblks; | ||
| 45 | }; | ||
| 46 | |||
| 47 | /* Should be defined by processor-specific code */ | ||
| 48 | int arch_hwblk_init(void); | ||
| 49 | int arch_hwblk_sleep_mode(void); | ||
| 50 | |||
| 51 | int hwblk_register(struct hwblk_info *info); | ||
| 52 | int hwblk_init(void); | ||
| 53 | |||
| 54 | void hwblk_enable(struct hwblk_info *info, int hwblk); | ||
| 55 | void hwblk_disable(struct hwblk_info *info, int hwblk); | ||
| 56 | |||
| 57 | void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int cnt); | ||
| 58 | void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt); | ||
| 59 | |||
| 60 | /* allow clocks to enable and disable hardware blocks */ | ||
| 61 | #define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \ | ||
| 62 | { \ | ||
| 63 | .name = _name, \ | ||
| 64 | .id = _id, \ | ||
| 65 | .parent = _parent, \ | ||
| 66 | .arch_flags = _hwblk, \ | ||
| 67 | .flags = _flags, \ | ||
| 68 | } | ||
| 69 | |||
| 70 | int sh_hwblk_clk_register(struct clk *clks, int nr); | ||
| 71 | |||
| 72 | #endif /* __ASM_SH_HWBLK_H */ | ||
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 25348141674b..5be45ea4dfec 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h | |||
| @@ -92,8 +92,12 @@ | |||
| 92 | 92 | ||
| 93 | static inline void ctrl_delay(void) | 93 | static inline void ctrl_delay(void) |
| 94 | { | 94 | { |
| 95 | #ifdef P2SEG | 95 | #ifdef CONFIG_CPU_SH4 |
| 96 | __raw_readw(CCN_PVR); | ||
| 97 | #elif defined(P2SEG) | ||
| 96 | __raw_readw(P2SEG); | 98 | __raw_readw(P2SEG); |
| 99 | #else | ||
| 100 | #error "Need a dummy address for delay" | ||
| 97 | #endif | 101 | #endif |
| 98 | } | 102 | } |
| 99 | 103 | ||
| @@ -146,6 +150,7 @@ __BUILD_MEMORY_STRING(q, u64) | |||
| 146 | #define readl_relaxed(a) readl(a) | 150 | #define readl_relaxed(a) readl(a) |
| 147 | #define readq_relaxed(a) readq(a) | 151 | #define readq_relaxed(a) readq(a) |
| 148 | 152 | ||
| 153 | #ifndef CONFIG_GENERIC_IOMAP | ||
| 149 | /* Simple MMIO */ | 154 | /* Simple MMIO */ |
| 150 | #define ioread8(a) __raw_readb(a) | 155 | #define ioread8(a) __raw_readb(a) |
| 151 | #define ioread16(a) __raw_readw(a) | 156 | #define ioread16(a) __raw_readw(a) |
| @@ -166,6 +171,15 @@ __BUILD_MEMORY_STRING(q, u64) | |||
| 166 | #define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c)) | 171 | #define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c)) |
| 167 | #define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c)) | 172 | #define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c)) |
| 168 | #define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c)) | 173 | #define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c)) |
| 174 | #endif | ||
| 175 | |||
| 176 | #define mmio_insb(p,d,c) __raw_readsb(p,d,c) | ||
| 177 | #define mmio_insw(p,d,c) __raw_readsw(p,d,c) | ||
| 178 | #define mmio_insl(p,d,c) __raw_readsl(p,d,c) | ||
| 179 | |||
| 180 | #define mmio_outsb(p,s,c) __raw_writesb(p,s,c) | ||
| 181 | #define mmio_outsw(p,s,c) __raw_writesw(p,s,c) | ||
| 182 | #define mmio_outsl(p,s,c) __raw_writesl(p,s,c) | ||
| 169 | 183 | ||
| 170 | /* synco on SH-4A, otherwise a nop */ | 184 | /* synco on SH-4A, otherwise a nop */ |
| 171 | #define mmiowb() wmb() | 185 | #define mmiowb() wmb() |
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h index 0b9f896f203c..985219f9759e 100644 --- a/arch/sh/include/asm/kdebug.h +++ b/arch/sh/include/asm/kdebug.h | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | /* Grossly misnamed. */ | 4 | /* Grossly misnamed. */ |
| 5 | enum die_val { | 5 | enum die_val { |
| 6 | DIE_TRAP, | 6 | DIE_TRAP, |
| 7 | DIE_NMI, | ||
| 7 | DIE_OOPS, | 8 | DIE_OOPS, |
| 8 | }; | 9 | }; |
| 9 | 10 | ||
diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h index 72704ed725e5..4235e228d921 100644 --- a/arch/sh/include/asm/kgdb.h +++ b/arch/sh/include/asm/kgdb.h | |||
| @@ -30,9 +30,6 @@ static inline void arch_kgdb_breakpoint(void) | |||
| 30 | __asm__ __volatile__ ("trapa #0x3c\n"); | 30 | __asm__ __volatile__ ("trapa #0x3c\n"); |
| 31 | } | 31 | } |
| 32 | 32 | ||
| 33 | /* State info */ | ||
| 34 | extern char in_nmi; /* Debounce flag to prevent NMI reentry*/ | ||
| 35 | |||
| 36 | #define BUFMAX 2048 | 33 | #define BUFMAX 2048 |
| 37 | 34 | ||
| 38 | #define CACHE_FLUSH_IS_SAFE 1 | 35 | #define CACHE_FLUSH_IS_SAFE 1 |
diff --git a/arch/sh/include/asm/lmb.h b/arch/sh/include/asm/lmb.h new file mode 100644 index 000000000000..9b437f657ffa --- /dev/null +++ b/arch/sh/include/asm/lmb.h | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | #ifndef __ASM_SH_LMB_H | ||
| 2 | #define __ASM_SH_LMB_H | ||
| 3 | |||
| 4 | #define LMB_REAL_LIMIT 0 | ||
| 5 | |||
| 6 | #endif /* __ASM_SH_LMB_H */ | ||
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h index 67d8946db193..41080b173a7a 100644 --- a/arch/sh/include/asm/mmu_context.h +++ b/arch/sh/include/asm/mmu_context.h | |||
| @@ -69,7 +69,7 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) | |||
| 69 | * We exhaust ASID of this version. | 69 | * We exhaust ASID of this version. |
| 70 | * Flush all TLB and start new cycle. | 70 | * Flush all TLB and start new cycle. |
| 71 | */ | 71 | */ |
| 72 | flush_tlb_all(); | 72 | local_flush_tlb_all(); |
| 73 | 73 | ||
| 74 | #ifdef CONFIG_SUPERH64 | 74 | #ifdef CONFIG_SUPERH64 |
| 75 | /* | 75 | /* |
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h index 49592c780a6e..81bffc0d6860 100644 --- a/arch/sh/include/asm/page.h +++ b/arch/sh/include/asm/page.h | |||
| @@ -50,26 +50,24 @@ extern unsigned long shm_align_mask; | |||
| 50 | extern unsigned long max_low_pfn, min_low_pfn; | 50 | extern unsigned long max_low_pfn, min_low_pfn; |
| 51 | extern unsigned long memory_start, memory_end; | 51 | extern unsigned long memory_start, memory_end; |
| 52 | 52 | ||
| 53 | extern void clear_page(void *to); | 53 | static inline unsigned long |
| 54 | pages_do_alias(unsigned long addr1, unsigned long addr2) | ||
| 55 | { | ||
| 56 | return (addr1 ^ addr2) & shm_align_mask; | ||
| 57 | } | ||
| 58 | |||
| 59 | |||
| 60 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) | ||
| 54 | extern void copy_page(void *to, void *from); | 61 | extern void copy_page(void *to, void *from); |
| 55 | 62 | ||
| 56 | #if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \ | ||
| 57 | (defined(CONFIG_CPU_SH5) || defined(CONFIG_CPU_SH4) || \ | ||
| 58 | defined(CONFIG_SH7705_CACHE_32KB)) | ||
| 59 | struct page; | 63 | struct page; |
| 60 | struct vm_area_struct; | 64 | struct vm_area_struct; |
| 61 | extern void clear_user_page(void *to, unsigned long address, struct page *page); | 65 | |
| 62 | extern void copy_user_page(void *to, void *from, unsigned long address, | ||
| 63 | struct page *page); | ||
| 64 | #if defined(CONFIG_CPU_SH4) | ||
| 65 | extern void copy_user_highpage(struct page *to, struct page *from, | 66 | extern void copy_user_highpage(struct page *to, struct page *from, |
| 66 | unsigned long vaddr, struct vm_area_struct *vma); | 67 | unsigned long vaddr, struct vm_area_struct *vma); |
| 67 | #define __HAVE_ARCH_COPY_USER_HIGHPAGE | 68 | #define __HAVE_ARCH_COPY_USER_HIGHPAGE |
| 68 | #endif | 69 | extern void clear_user_highpage(struct page *page, unsigned long vaddr); |
| 69 | #else | 70 | #define clear_user_highpage clear_user_highpage |
| 70 | #define clear_user_page(page, vaddr, pg) clear_page(page) | ||
| 71 | #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) | ||
| 72 | #endif | ||
| 73 | 71 | ||
| 74 | /* | 72 | /* |
| 75 | * These are used to make use of C type-checking.. | 73 | * These are used to make use of C type-checking.. |
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h index 2a011b18090b..4f3efa7d5a64 100644 --- a/arch/sh/include/asm/pgtable.h +++ b/arch/sh/include/asm/pgtable.h | |||
| @@ -36,6 +36,12 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; | |||
| 36 | #define NEFF_SIGN (1LL << (NEFF - 1)) | 36 | #define NEFF_SIGN (1LL << (NEFF - 1)) |
| 37 | #define NEFF_MASK (-1LL << NEFF) | 37 | #define NEFF_MASK (-1LL << NEFF) |
| 38 | 38 | ||
| 39 | static inline unsigned long long neff_sign_extend(unsigned long val) | ||
| 40 | { | ||
| 41 | unsigned long long extended = val; | ||
| 42 | return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended; | ||
| 43 | } | ||
| 44 | |||
| 39 | #ifdef CONFIG_29BIT | 45 | #ifdef CONFIG_29BIT |
| 40 | #define NPHYS 29 | 46 | #define NPHYS 29 |
| 41 | #else | 47 | #else |
| @@ -133,27 +139,25 @@ typedef pte_t *pte_addr_t; | |||
| 133 | */ | 139 | */ |
| 134 | #define pgtable_cache_init() do { } while (0) | 140 | #define pgtable_cache_init() do { } while (0) |
| 135 | 141 | ||
| 136 | #if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ | ||
| 137 | defined(CONFIG_SH7705_CACHE_32KB)) | ||
| 138 | struct mm_struct; | ||
| 139 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | ||
| 140 | pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); | ||
| 141 | #endif | ||
| 142 | |||
| 143 | struct vm_area_struct; | 142 | struct vm_area_struct; |
| 144 | extern void update_mmu_cache(struct vm_area_struct * vma, | 143 | |
| 145 | unsigned long address, pte_t pte); | 144 | extern void __update_cache(struct vm_area_struct *vma, |
| 145 | unsigned long address, pte_t pte); | ||
| 146 | extern void __update_tlb(struct vm_area_struct *vma, | ||
| 147 | unsigned long address, pte_t pte); | ||
| 148 | |||
| 149 | static inline void | ||
| 150 | update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) | ||
| 151 | { | ||
| 152 | __update_cache(vma, address, pte); | ||
| 153 | __update_tlb(vma, address, pte); | ||
| 154 | } | ||
| 155 | |||
| 146 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; | 156 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; |
| 147 | extern void paging_init(void); | 157 | extern void paging_init(void); |
| 148 | extern void page_table_range_init(unsigned long start, unsigned long end, | 158 | extern void page_table_range_init(unsigned long start, unsigned long end, |
| 149 | pgd_t *pgd); | 159 | pgd_t *pgd); |
| 150 | 160 | ||
| 151 | #if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_CPU_SH4) && defined(CONFIG_MMU) | ||
| 152 | extern void kmap_coherent_init(void); | ||
| 153 | #else | ||
| 154 | #define kmap_coherent_init() do { } while (0) | ||
| 155 | #endif | ||
| 156 | |||
| 157 | /* arch/sh/mm/mmap.c */ | 161 | /* arch/sh/mm/mmap.c */ |
| 158 | #define HAVE_ARCH_UNMAPPED_AREA | 162 | #define HAVE_ARCH_UNMAPPED_AREA |
| 159 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | 163 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN |
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h index 72ea209195bd..c0d359ce337b 100644 --- a/arch/sh/include/asm/pgtable_32.h +++ b/arch/sh/include/asm/pgtable_32.h | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. | 20 | * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. |
| 21 | * | 21 | * |
| 22 | * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. | 22 | * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. |
| 23 | * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused. | 23 | * Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL. |
| 24 | * | 24 | * |
| 25 | * - On 29 bit platforms, bits 31 to 29 are used for the space attributes | 25 | * - On 29 bit platforms, bits 31 to 29 are used for the space attributes |
| 26 | * and timing control which (together with bit 0) are moved into the | 26 | * and timing control which (together with bit 0) are moved into the |
| @@ -52,6 +52,7 @@ | |||
| 52 | #define _PAGE_PROTNONE 0x200 /* software: if not present */ | 52 | #define _PAGE_PROTNONE 0x200 /* software: if not present */ |
| 53 | #define _PAGE_ACCESSED 0x400 /* software: page referenced */ | 53 | #define _PAGE_ACCESSED 0x400 /* software: page referenced */ |
| 54 | #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ | 54 | #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ |
| 55 | #define _PAGE_SPECIAL 0x800 /* software: special page */ | ||
| 55 | 56 | ||
| 56 | #define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) | 57 | #define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) |
| 57 | #define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) | 58 | #define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) |
| @@ -86,6 +87,14 @@ | |||
| 86 | #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ | 87 | #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ |
| 87 | #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ | 88 | #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ |
| 88 | 89 | ||
| 90 | #ifndef CONFIG_X2TLB | ||
| 91 | /* copy the ptea attributes */ | ||
| 92 | static inline unsigned long copy_ptea_attributes(unsigned long x) | ||
| 93 | { | ||
| 94 | return ((x >> 28) & 0xe) | (x & 0x1); | ||
| 95 | } | ||
| 96 | #endif | ||
| 97 | |||
| 89 | /* Mask which drops unused bits from the PTEL value */ | 98 | /* Mask which drops unused bits from the PTEL value */ |
| 90 | #if defined(CONFIG_CPU_SH3) | 99 | #if defined(CONFIG_CPU_SH3) |
| 91 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ | 100 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ |
| @@ -148,8 +157,12 @@ | |||
| 148 | # define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) | 157 | # define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) |
| 149 | #endif | 158 | #endif |
| 150 | 159 | ||
| 160 | /* | ||
| 161 | * Mask of bits that are to be preserved accross pgprot changes. | ||
| 162 | */ | ||
| 151 | #define _PAGE_CHG_MASK \ | 163 | #define _PAGE_CHG_MASK \ |
| 152 | (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) | 164 | (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ |
| 165 | _PAGE_DIRTY | _PAGE_SPECIAL) | ||
| 153 | 166 | ||
| 154 | #ifndef __ASSEMBLY__ | 167 | #ifndef __ASSEMBLY__ |
| 155 | 168 | ||
| @@ -328,7 +341,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte) | |||
| 328 | #define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) | 341 | #define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) |
| 329 | #define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) | 342 | #define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) |
| 330 | #define pte_file(pte) ((pte).pte_low & _PAGE_FILE) | 343 | #define pte_file(pte) ((pte).pte_low & _PAGE_FILE) |
| 331 | #define pte_special(pte) (0) | 344 | #define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL) |
| 332 | 345 | ||
| 333 | #ifdef CONFIG_X2TLB | 346 | #ifdef CONFIG_X2TLB |
| 334 | #define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) | 347 | #define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) |
| @@ -358,8 +371,9 @@ PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); | |||
| 358 | PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); | 371 | PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); |
| 359 | PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); | 372 | PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); |
| 360 | PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); | 373 | PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); |
| 374 | PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL); | ||
| 361 | 375 | ||
| 362 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } | 376 | #define __HAVE_ARCH_PTE_SPECIAL |
| 363 | 377 | ||
| 364 | /* | 378 | /* |
| 365 | * Macro and implementation to make a page protection as uncachable. | 379 | * Macro and implementation to make a page protection as uncachable. |
| @@ -394,13 +408,19 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | |||
| 394 | 408 | ||
| 395 | /* to find an entry in a page-table-directory. */ | 409 | /* to find an entry in a page-table-directory. */ |
| 396 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) | 410 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) |
| 397 | #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) | 411 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) |
| 412 | #define __pgd_offset(address) pgd_index(address) | ||
| 398 | 413 | ||
| 399 | /* to find an entry in a kernel page-table-directory */ | 414 | /* to find an entry in a kernel page-table-directory */ |
| 400 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | 415 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) |
| 401 | 416 | ||
| 417 | #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) | ||
| 418 | #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) | ||
| 419 | |||
| 402 | /* Find an entry in the third-level page table.. */ | 420 | /* Find an entry in the third-level page table.. */ |
| 403 | #define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | 421 | #define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) |
| 422 | #define __pte_offset(address) pte_index(address) | ||
| 423 | |||
| 404 | #define pte_offset_kernel(dir, address) \ | 424 | #define pte_offset_kernel(dir, address) \ |
| 405 | ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) | 425 | ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) |
| 406 | #define pte_offset_map(dir, address) pte_offset_kernel(dir, address) | 426 | #define pte_offset_map(dir, address) pte_offset_kernel(dir, address) |
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h index c78990cda557..17cdbecc3adc 100644 --- a/arch/sh/include/asm/pgtable_64.h +++ b/arch/sh/include/asm/pgtable_64.h | |||
| @@ -60,6 +60,9 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) | |||
| 60 | /* To find an entry in a kernel PGD. */ | 60 | /* To find an entry in a kernel PGD. */ |
| 61 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | 61 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) |
| 62 | 62 | ||
| 63 | #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) | ||
| 64 | #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) | ||
| 65 | |||
| 63 | /* | 66 | /* |
| 64 | * PMD level access routines. Same notes as above. | 67 | * PMD level access routines. Same notes as above. |
| 65 | */ | 68 | */ |
| @@ -80,6 +83,8 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) | |||
| 80 | #define pte_index(address) \ | 83 | #define pte_index(address) \ |
| 81 | ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | 84 | ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) |
| 82 | 85 | ||
| 86 | #define __pte_offset(address) pte_index(address) | ||
| 87 | |||
| 83 | #define pte_offset_kernel(dir, addr) \ | 88 | #define pte_offset_kernel(dir, addr) \ |
| 84 | ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) | 89 | ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) |
| 85 | 90 | ||
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index ff7daaf9a620..017e0c1807b2 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h | |||
| @@ -32,7 +32,7 @@ enum cpu_type { | |||
| 32 | 32 | ||
| 33 | /* SH-4A types */ | 33 | /* SH-4A types */ |
| 34 | CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786, | 34 | CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786, |
| 35 | CPU_SH7723, CPU_SH7724, CPU_SHX3, | 35 | CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3, |
| 36 | 36 | ||
| 37 | /* SH4AL-DSP types */ | 37 | /* SH4AL-DSP types */ |
| 38 | CPU_SH7343, CPU_SH7722, CPU_SH7366, | 38 | CPU_SH7343, CPU_SH7722, CPU_SH7366, |
| @@ -44,6 +44,17 @@ enum cpu_type { | |||
| 44 | CPU_SH_NONE | 44 | CPU_SH_NONE |
| 45 | }; | 45 | }; |
| 46 | 46 | ||
| 47 | enum cpu_family { | ||
| 48 | CPU_FAMILY_SH2, | ||
| 49 | CPU_FAMILY_SH2A, | ||
| 50 | CPU_FAMILY_SH3, | ||
| 51 | CPU_FAMILY_SH4, | ||
| 52 | CPU_FAMILY_SH4A, | ||
| 53 | CPU_FAMILY_SH4AL_DSP, | ||
| 54 | CPU_FAMILY_SH5, | ||
| 55 | CPU_FAMILY_UNKNOWN, | ||
| 56 | }; | ||
| 57 | |||
| 47 | /* | 58 | /* |
| 48 | * TLB information structure | 59 | * TLB information structure |
| 49 | * | 60 | * |
| @@ -61,7 +72,7 @@ struct tlb_info { | |||
| 61 | }; | 72 | }; |
| 62 | 73 | ||
| 63 | struct sh_cpuinfo { | 74 | struct sh_cpuinfo { |
| 64 | unsigned int type; | 75 | unsigned int type, family; |
| 65 | int cut_major, cut_minor; | 76 | int cut_major, cut_minor; |
| 66 | unsigned long loops_per_jiffy; | 77 | unsigned long loops_per_jiffy; |
| 67 | unsigned long asid_cache; | 78 | unsigned long asid_cache; |
diff --git a/arch/sh/include/asm/romimage-macros.h b/arch/sh/include/asm/romimage-macros.h new file mode 100644 index 000000000000..ae17a150bb58 --- /dev/null +++ b/arch/sh/include/asm/romimage-macros.h | |||
| @@ -0,0 +1,73 @@ | |||
| 1 | #ifndef __ROMIMAGE_MACRO_H | ||
| 2 | #define __ROMIMAGE_MACRO_H | ||
| 3 | |||
| 4 | /* The LIST command is used to include comments in the script */ | ||
| 5 | .macro LIST comment | ||
| 6 | .endm | ||
| 7 | |||
| 8 | /* The ED command is used to write a 32-bit word */ | ||
| 9 | .macro ED, addr, data | ||
| 10 | mov.l 1f, r1 | ||
| 11 | mov.l 2f, r0 | ||
| 12 | mov.l r0, @r1 | ||
| 13 | bra 3f | ||
| 14 | nop | ||
| 15 | .align 2 | ||
| 16 | 1 : .long \addr | ||
| 17 | 2 : .long \data | ||
| 18 | 3 : | ||
| 19 | .endm | ||
| 20 | |||
| 21 | /* The EW command is used to write a 16-bit word */ | ||
| 22 | .macro EW, addr, data | ||
| 23 | mov.l 1f, r1 | ||
| 24 | mov.l 2f, r0 | ||
| 25 | mov.w r0, @r1 | ||
| 26 | bra 3f | ||
| 27 | nop | ||
| 28 | .align 2 | ||
| 29 | 1 : .long \addr | ||
| 30 | 2 : .long \data | ||
| 31 | 3 : | ||
| 32 | .endm | ||
| 33 | |||
| 34 | /* The EB command is used to write an 8-bit word */ | ||
| 35 | .macro EB, addr, data | ||
| 36 | mov.l 1f, r1 | ||
| 37 | mov.l 2f, r0 | ||
| 38 | mov.b r0, @r1 | ||
| 39 | bra 3f | ||
| 40 | nop | ||
| 41 | .align 2 | ||
| 42 | 1 : .long \addr | ||
| 43 | 2 : .long \data | ||
| 44 | 3 : | ||
| 45 | .endm | ||
| 46 | |||
| 47 | /* The WAIT command is used to delay the execution */ | ||
| 48 | .macro WAIT, time | ||
| 49 | mov.l 2f, r3 | ||
| 50 | 1 : | ||
| 51 | nop | ||
| 52 | tst r3, r3 | ||
| 53 | bf/s 1b | ||
| 54 | dt r3 | ||
| 55 | bra 3f | ||
| 56 | nop | ||
| 57 | .align 2 | ||
| 58 | 2 : .long \time * 100 | ||
| 59 | 3 : | ||
| 60 | .endm | ||
| 61 | |||
| 62 | /* The DD command is used to read a 32-bit word */ | ||
| 63 | .macro DD, addr, addr2, nr | ||
| 64 | mov.l 1f, r1 | ||
| 65 | mov.l @r1, r0 | ||
| 66 | bra 2f | ||
| 67 | nop | ||
| 68 | .align 2 | ||
| 69 | 1 : .long \addr | ||
| 70 | 2 : | ||
| 71 | .endm | ||
| 72 | |||
| 73 | #endif /* __ROMIMAGE_MACRO_H */ | ||
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h index 01a4076a3719..a78701da775b 100644 --- a/arch/sh/include/asm/sections.h +++ b/arch/sh/include/asm/sections.h | |||
| @@ -7,6 +7,7 @@ extern void __nosave_begin, __nosave_end; | |||
| 7 | extern long __machvec_start, __machvec_end; | 7 | extern long __machvec_start, __machvec_end; |
| 8 | extern char __uncached_start, __uncached_end; | 8 | extern char __uncached_start, __uncached_end; |
| 9 | extern char _ebss[]; | 9 | extern char _ebss[]; |
| 10 | extern char __start_eh_frame[], __stop_eh_frame[]; | ||
| 10 | 11 | ||
| 11 | #endif /* __ASM_SH_SECTIONS_H */ | 12 | #endif /* __ASM_SH_SECTIONS_H */ |
| 12 | 13 | ||
diff --git a/arch/sh/include/asm/sh_keysc.h b/arch/sh/include/asm/sh_keysc.h index b5a4dd5a9729..4a65b1e40eab 100644 --- a/arch/sh/include/asm/sh_keysc.h +++ b/arch/sh/include/asm/sh_keysc.h | |||
| @@ -7,6 +7,7 @@ struct sh_keysc_info { | |||
| 7 | enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode; | 7 | enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode; |
| 8 | int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */ | 8 | int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */ |
| 9 | int delay; | 9 | int delay; |
| 10 | int kycr2_delay; | ||
| 10 | int keycodes[SH_KEYSC_MAXKEYS]; | 11 | int keycodes[SH_KEYSC_MAXKEYS]; |
| 11 | }; | 12 | }; |
| 12 | 13 | ||
diff --git a/arch/sh/include/asm/stacktrace.h b/arch/sh/include/asm/stacktrace.h new file mode 100644 index 000000000000..797018213718 --- /dev/null +++ b/arch/sh/include/asm/stacktrace.h | |||
| @@ -0,0 +1,25 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Matt Fleming | ||
| 3 | * | ||
| 4 | * Based on: | ||
| 5 | * The x86 implementation - arch/x86/include/asm/stacktrace.h | ||
| 6 | */ | ||
| 7 | #ifndef _ASM_SH_STACKTRACE_H | ||
| 8 | #define _ASM_SH_STACKTRACE_H | ||
| 9 | |||
| 10 | /* Generic stack tracer with callbacks */ | ||
| 11 | |||
| 12 | struct stacktrace_ops { | ||
| 13 | void (*warning)(void *data, char *msg); | ||
| 14 | /* msg must contain %s for the symbol */ | ||
| 15 | void (*warning_symbol)(void *data, char *msg, unsigned long symbol); | ||
| 16 | void (*address)(void *data, unsigned long address, int reliable); | ||
| 17 | /* On negative return stop dumping */ | ||
| 18 | int (*stack)(void *data, char *name); | ||
| 19 | }; | ||
| 20 | |||
| 21 | void dump_trace(struct task_struct *tsk, struct pt_regs *regs, | ||
| 22 | unsigned long *stack, | ||
| 23 | const struct stacktrace_ops *ops, void *data); | ||
| 24 | |||
| 25 | #endif /* _ASM_SH_STACKTRACE_H */ | ||
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h index b1b995370e79..5c8ea28ff7a4 100644 --- a/arch/sh/include/asm/suspend.h +++ b/arch/sh/include/asm/suspend.h | |||
| @@ -10,6 +10,15 @@ struct swsusp_arch_regs { | |||
| 10 | struct pt_regs user_regs; | 10 | struct pt_regs user_regs; |
| 11 | unsigned long bank1_regs[8]; | 11 | unsigned long bank1_regs[8]; |
| 12 | }; | 12 | }; |
| 13 | |||
| 14 | void sh_mobile_call_standby(unsigned long mode); | ||
| 15 | |||
| 16 | #ifdef CONFIG_CPU_IDLE | ||
| 17 | void sh_mobile_setup_cpuidle(void); | ||
| 18 | #else | ||
| 19 | static inline void sh_mobile_setup_cpuidle(void) {} | ||
| 20 | #endif | ||
| 21 | |||
| 13 | #endif | 22 | #endif |
| 14 | 23 | ||
| 15 | /* flags passed to assembly suspend code */ | 24 | /* flags passed to assembly suspend code */ |
diff --git a/arch/sh/include/asm/syscall_32.h b/arch/sh/include/asm/syscall_32.h index 6f83f2cc45c1..7d80df4f09cb 100644 --- a/arch/sh/include/asm/syscall_32.h +++ b/arch/sh/include/asm/syscall_32.h | |||
| @@ -65,6 +65,7 @@ static inline void syscall_get_arguments(struct task_struct *task, | |||
| 65 | case 3: args[2] = regs->regs[6]; | 65 | case 3: args[2] = regs->regs[6]; |
| 66 | case 2: args[1] = regs->regs[5]; | 66 | case 2: args[1] = regs->regs[5]; |
| 67 | case 1: args[0] = regs->regs[4]; | 67 | case 1: args[0] = regs->regs[4]; |
| 68 | case 0: | ||
| 68 | break; | 69 | break; |
| 69 | default: | 70 | default: |
| 70 | BUG(); | 71 | BUG(); |
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index ab79e1f4fbe0..b5c5acdc8c0e 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h | |||
| @@ -14,18 +14,6 @@ | |||
| 14 | 14 | ||
| 15 | #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ | 15 | #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ |
| 16 | 16 | ||
| 17 | #if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) | ||
| 18 | #define __icbi() \ | ||
| 19 | { \ | ||
| 20 | unsigned long __addr; \ | ||
| 21 | __addr = 0xa8000000; \ | ||
| 22 | __asm__ __volatile__( \ | ||
| 23 | "icbi %0\n\t" \ | ||
| 24 | : /* no output */ \ | ||
| 25 | : "m" (__m(__addr))); \ | ||
| 26 | } | ||
| 27 | #endif | ||
| 28 | |||
| 29 | /* | 17 | /* |
| 30 | * A brief note on ctrl_barrier(), the control register write barrier. | 18 | * A brief note on ctrl_barrier(), the control register write barrier. |
| 31 | * | 19 | * |
| @@ -44,7 +32,7 @@ | |||
| 44 | #define mb() __asm__ __volatile__ ("synco": : :"memory") | 32 | #define mb() __asm__ __volatile__ ("synco": : :"memory") |
| 45 | #define rmb() mb() | 33 | #define rmb() mb() |
| 46 | #define wmb() __asm__ __volatile__ ("synco": : :"memory") | 34 | #define wmb() __asm__ __volatile__ ("synco": : :"memory") |
| 47 | #define ctrl_barrier() __icbi() | 35 | #define ctrl_barrier() __icbi(0xa8000000) |
| 48 | #define read_barrier_depends() do { } while(0) | 36 | #define read_barrier_depends() do { } while(0) |
| 49 | #else | 37 | #else |
| 50 | #define mb() __asm__ __volatile__ ("": : :"memory") | 38 | #define mb() __asm__ __volatile__ ("": : :"memory") |
| @@ -181,6 +169,11 @@ BUILD_TRAP_HANDLER(breakpoint); | |||
| 181 | BUILD_TRAP_HANDLER(singlestep); | 169 | BUILD_TRAP_HANDLER(singlestep); |
| 182 | BUILD_TRAP_HANDLER(fpu_error); | 170 | BUILD_TRAP_HANDLER(fpu_error); |
| 183 | BUILD_TRAP_HANDLER(fpu_state_restore); | 171 | BUILD_TRAP_HANDLER(fpu_state_restore); |
| 172 | BUILD_TRAP_HANDLER(nmi); | ||
| 173 | |||
| 174 | #ifdef CONFIG_BUG | ||
| 175 | extern void handle_BUG(struct pt_regs *); | ||
| 176 | #endif | ||
| 184 | 177 | ||
| 185 | #define arch_align_stack(x) (x) | 178 | #define arch_align_stack(x) (x) |
| 186 | 179 | ||
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h index 6c68a51f1cc5..607d413f6168 100644 --- a/arch/sh/include/asm/system_32.h +++ b/arch/sh/include/asm/system_32.h | |||
| @@ -14,12 +14,12 @@ do { \ | |||
| 14 | (u32 *)&tsk->thread.dsp_status; \ | 14 | (u32 *)&tsk->thread.dsp_status; \ |
| 15 | __asm__ __volatile__ ( \ | 15 | __asm__ __volatile__ ( \ |
| 16 | ".balign 4\n\t" \ | 16 | ".balign 4\n\t" \ |
| 17 | "movs.l @r2+, a0\n\t" \ | ||
| 17 | "movs.l @r2+, a1\n\t" \ | 18 | "movs.l @r2+, a1\n\t" \ |
| 18 | "movs.l @r2+, a0g\n\t" \ | 19 | "movs.l @r2+, a0g\n\t" \ |
| 19 | "movs.l @r2+, a1g\n\t" \ | 20 | "movs.l @r2+, a1g\n\t" \ |
| 20 | "movs.l @r2+, m0\n\t" \ | 21 | "movs.l @r2+, m0\n\t" \ |
| 21 | "movs.l @r2+, m1\n\t" \ | 22 | "movs.l @r2+, m1\n\t" \ |
| 22 | "movs.l @r2+, a0\n\t" \ | ||
| 23 | "movs.l @r2+, x0\n\t" \ | 23 | "movs.l @r2+, x0\n\t" \ |
| 24 | "movs.l @r2+, x1\n\t" \ | 24 | "movs.l @r2+, x1\n\t" \ |
| 25 | "movs.l @r2+, y0\n\t" \ | 25 | "movs.l @r2+, y0\n\t" \ |
| @@ -39,20 +39,20 @@ do { \ | |||
| 39 | \ | 39 | \ |
| 40 | __asm__ __volatile__ ( \ | 40 | __asm__ __volatile__ ( \ |
| 41 | ".balign 4\n\t" \ | 41 | ".balign 4\n\t" \ |
| 42 | "stc.l mod, @-r2\n\t" \ | 42 | "stc.l mod, @-r2\n\t" \ |
| 43 | "stc.l re, @-r2\n\t" \ | 43 | "stc.l re, @-r2\n\t" \ |
| 44 | "stc.l rs, @-r2\n\t" \ | 44 | "stc.l rs, @-r2\n\t" \ |
| 45 | "sts.l dsr, @-r2\n\t" \ | 45 | "sts.l dsr, @-r2\n\t" \ |
| 46 | "sts.l y1, @-r2\n\t" \ | 46 | "movs.l y1, @-r2\n\t" \ |
| 47 | "sts.l y0, @-r2\n\t" \ | 47 | "movs.l y0, @-r2\n\t" \ |
| 48 | "sts.l x1, @-r2\n\t" \ | 48 | "movs.l x1, @-r2\n\t" \ |
| 49 | "sts.l x0, @-r2\n\t" \ | 49 | "movs.l x0, @-r2\n\t" \ |
| 50 | "sts.l a0, @-r2\n\t" \ | 50 | "movs.l m1, @-r2\n\t" \ |
| 51 | ".word 0xf653 ! movs.l a1, @-r2\n\t" \ | 51 | "movs.l m0, @-r2\n\t" \ |
| 52 | ".word 0xf6f3 ! movs.l a0g, @-r2\n\t" \ | 52 | "movs.l a1g, @-r2\n\t" \ |
| 53 | ".word 0xf6d3 ! movs.l a1g, @-r2\n\t" \ | 53 | "movs.l a0g, @-r2\n\t" \ |
| 54 | ".word 0xf6c3 ! movs.l m0, @-r2\n\t" \ | 54 | "movs.l a1, @-r2\n\t" \ |
| 55 | ".word 0xf6e3 ! movs.l m1, @-r2\n\t" \ | 55 | "movs.l a0, @-r2\n\t" \ |
| 56 | : : "r" (__ts2)); \ | 56 | : : "r" (__ts2)); \ |
| 57 | } while (0) | 57 | } while (0) |
| 58 | 58 | ||
| @@ -63,6 +63,16 @@ do { \ | |||
| 63 | #define __restore_dsp(tsk) do { } while (0) | 63 | #define __restore_dsp(tsk) do { } while (0) |
| 64 | #endif | 64 | #endif |
| 65 | 65 | ||
| 66 | #if defined(CONFIG_CPU_SH4A) | ||
| 67 | #define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr)) | ||
| 68 | #else | ||
| 69 | #define __icbi(addr) mb() | ||
| 70 | #endif | ||
| 71 | |||
| 72 | #define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr)) | ||
| 73 | #define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr)) | ||
| 74 | #define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr)) | ||
| 75 | |||
| 66 | struct task_struct *__switch_to(struct task_struct *prev, | 76 | struct task_struct *__switch_to(struct task_struct *prev, |
| 67 | struct task_struct *next); | 77 | struct task_struct *next); |
| 68 | 78 | ||
| @@ -198,8 +208,13 @@ do { \ | |||
| 198 | }) | 208 | }) |
| 199 | #endif | 209 | #endif |
| 200 | 210 | ||
| 211 | static inline reg_size_t register_align(void *val) | ||
| 212 | { | ||
| 213 | return (unsigned long)(signed long)val; | ||
| 214 | } | ||
| 215 | |||
| 201 | int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, | 216 | int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, |
| 202 | struct mem_access *ma); | 217 | struct mem_access *ma, int); |
| 203 | 218 | ||
| 204 | asmlinkage void do_address_error(struct pt_regs *regs, | 219 | asmlinkage void do_address_error(struct pt_regs *regs, |
| 205 | unsigned long writeaccess, | 220 | unsigned long writeaccess, |
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h index 943acf5ea07c..8e4a03e7966c 100644 --- a/arch/sh/include/asm/system_64.h +++ b/arch/sh/include/asm/system_64.h | |||
| @@ -37,4 +37,14 @@ do { \ | |||
| 37 | #define jump_to_uncached() do { } while (0) | 37 | #define jump_to_uncached() do { } while (0) |
| 38 | #define back_to_cached() do { } while (0) | 38 | #define back_to_cached() do { } while (0) |
| 39 | 39 | ||
| 40 | #define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) | ||
| 41 | #define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) | ||
| 42 | #define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) | ||
| 43 | #define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) | ||
| 44 | |||
| 45 | static inline reg_size_t register_align(void *val) | ||
| 46 | { | ||
| 47 | return (unsigned long long)(signed long long)(signed long)val; | ||
| 48 | } | ||
| 49 | |||
| 40 | #endif /* __ASM_SH_SYSTEM_64_H */ | 50 | #endif /* __ASM_SH_SYSTEM_64_H */ |
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h index d570ac2e5cb9..bdeb9d46d17d 100644 --- a/arch/sh/include/asm/thread_info.h +++ b/arch/sh/include/asm/thread_info.h | |||
| @@ -97,7 +97,7 @@ static inline struct thread_info *current_thread_info(void) | |||
| 97 | 97 | ||
| 98 | extern struct thread_info *alloc_thread_info(struct task_struct *tsk); | 98 | extern struct thread_info *alloc_thread_info(struct task_struct *tsk); |
| 99 | extern void free_thread_info(struct thread_info *ti); | 99 | extern void free_thread_info(struct thread_info *ti); |
| 100 | 100 | ||
| 101 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ | 101 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ |
| 102 | 102 | ||
| 103 | #endif /* __ASSEMBLY__ */ | 103 | #endif /* __ASSEMBLY__ */ |
| @@ -116,6 +116,7 @@ extern void free_thread_info(struct thread_info *ti); | |||
| 116 | #define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ | 116 | #define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ |
| 117 | #define TIF_SECCOMP 6 /* secure computing */ | 117 | #define TIF_SECCOMP 6 /* secure computing */ |
| 118 | #define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ | 118 | #define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ |
| 119 | #define TIF_SYSCALL_TRACEPOINT 8 /* for ftrace syscall instrumentation */ | ||
| 119 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ | 120 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ |
| 120 | #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ | 121 | #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ |
| 121 | #define TIF_MEMDIE 18 | 122 | #define TIF_MEMDIE 18 |
| @@ -129,25 +130,27 @@ extern void free_thread_info(struct thread_info *ti); | |||
| 129 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) | 130 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) |
| 130 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) | 131 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) |
| 131 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) | 132 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) |
| 133 | #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) | ||
| 132 | #define _TIF_USEDFPU (1 << TIF_USEDFPU) | 134 | #define _TIF_USEDFPU (1 << TIF_USEDFPU) |
| 133 | #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) | 135 | #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) |
| 134 | #define _TIF_FREEZE (1 << TIF_FREEZE) | 136 | #define _TIF_FREEZE (1 << TIF_FREEZE) |
| 135 | 137 | ||
| 136 | /* | 138 | /* |
| 137 | * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within a byte, or we | 139 | * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we |
| 138 | * blow the tst immediate size constraints and need to fix up | 140 | * blow the tst immediate size constraints and need to fix up |
| 139 | * arch/sh/kernel/entry-common.S. | 141 | * arch/sh/kernel/entry-common.S. |
| 140 | */ | 142 | */ |
| 141 | 143 | ||
| 142 | /* work to do in syscall trace */ | 144 | /* work to do in syscall trace */ |
| 143 | #define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \ | 145 | #define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \ |
| 144 | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP) | 146 | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ |
| 147 | _TIF_SYSCALL_TRACEPOINT) | ||
| 145 | 148 | ||
| 146 | /* work to do on any return to u-space */ | 149 | /* work to do on any return to u-space */ |
| 147 | #define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \ | 150 | #define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \ |
| 148 | _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \ | 151 | _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \ |
| 149 | _TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \ | 152 | _TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \ |
| 150 | _TIF_NOTIFY_RESUME) | 153 | _TIF_NOTIFY_RESUME | _TIF_SYSCALL_TRACEPOINT) |
| 151 | 154 | ||
| 152 | /* work to do on interrupt/exception return */ | 155 | /* work to do on interrupt/exception return */ |
| 153 | #define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ | 156 | #define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ |
diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h index c7f3c94837dd..f8421f7ad63a 100644 --- a/arch/sh/include/asm/types.h +++ b/arch/sh/include/asm/types.h | |||
| @@ -11,8 +11,10 @@ | |||
| 11 | 11 | ||
| 12 | #ifdef CONFIG_SUPERH32 | 12 | #ifdef CONFIG_SUPERH32 |
| 13 | typedef u16 insn_size_t; | 13 | typedef u16 insn_size_t; |
| 14 | typedef u32 reg_size_t; | ||
| 14 | #else | 15 | #else |
| 15 | typedef u32 insn_size_t; | 16 | typedef u32 insn_size_t; |
| 17 | typedef u64 reg_size_t; | ||
| 16 | #endif | 18 | #endif |
| 17 | 19 | ||
| 18 | #endif /* __ASSEMBLY__ */ | 20 | #endif /* __ASSEMBLY__ */ |
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h index 61d6ad93d786..925dd40d9d55 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/asm/unistd_32.h | |||
| @@ -132,7 +132,7 @@ | |||
| 132 | #define __NR_clone 120 | 132 | #define __NR_clone 120 |
| 133 | #define __NR_setdomainname 121 | 133 | #define __NR_setdomainname 121 |
| 134 | #define __NR_uname 122 | 134 | #define __NR_uname 122 |
| 135 | #define __NR_modify_ldt 123 | 135 | #define __NR_cacheflush 123 |
| 136 | #define __NR_adjtimex 124 | 136 | #define __NR_adjtimex 124 |
| 137 | #define __NR_mprotect 125 | 137 | #define __NR_mprotect 125 |
| 138 | #define __NR_sigprocmask 126 | 138 | #define __NR_sigprocmask 126 |
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h index a751699afda3..2b84bc916bc5 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/asm/unistd_64.h | |||
| @@ -137,7 +137,7 @@ | |||
| 137 | #define __NR_clone 120 | 137 | #define __NR_clone 120 |
| 138 | #define __NR_setdomainname 121 | 138 | #define __NR_setdomainname 121 |
| 139 | #define __NR_uname 122 | 139 | #define __NR_uname 122 |
| 140 | #define __NR_modify_ldt 123 | 140 | #define __NR_cacheflush 123 |
| 141 | #define __NR_adjtimex 124 | 141 | #define __NR_adjtimex 124 |
| 142 | #define __NR_mprotect 125 | 142 | #define __NR_mprotect 125 |
| 143 | #define __NR_sigprocmask 126 | 143 | #define __NR_sigprocmask 126 |
diff --git a/arch/sh/include/asm/unwinder.h b/arch/sh/include/asm/unwinder.h new file mode 100644 index 000000000000..1e65c07b3e18 --- /dev/null +++ b/arch/sh/include/asm/unwinder.h | |||
| @@ -0,0 +1,31 @@ | |||
| 1 | #ifndef _LINUX_UNWINDER_H | ||
| 2 | #define _LINUX_UNWINDER_H | ||
| 3 | |||
| 4 | #include <asm/stacktrace.h> | ||
| 5 | |||
| 6 | struct unwinder { | ||
| 7 | const char *name; | ||
| 8 | struct list_head list; | ||
| 9 | int rating; | ||
| 10 | void (*dump)(struct task_struct *, struct pt_regs *, | ||
| 11 | unsigned long *, const struct stacktrace_ops *, void *); | ||
| 12 | }; | ||
| 13 | |||
| 14 | extern int unwinder_init(void); | ||
| 15 | extern int unwinder_register(struct unwinder *); | ||
| 16 | |||
| 17 | extern void unwind_stack(struct task_struct *, struct pt_regs *, | ||
| 18 | unsigned long *, const struct stacktrace_ops *, | ||
| 19 | void *); | ||
| 20 | |||
| 21 | extern void stack_reader_dump(struct task_struct *, struct pt_regs *, | ||
| 22 | unsigned long *, const struct stacktrace_ops *, | ||
| 23 | void *); | ||
| 24 | |||
| 25 | /* | ||
| 26 | * Used by fault handling code to signal to the unwinder code that it | ||
| 27 | * should switch to a different unwinder. | ||
| 28 | */ | ||
| 29 | extern int unwinder_faulted; | ||
| 30 | |||
| 31 | #endif /* _LINUX_UNWINDER_H */ | ||
diff --git a/arch/sh/include/asm/vmlinux.lds.h b/arch/sh/include/asm/vmlinux.lds.h new file mode 100644 index 000000000000..244ec4ad9a79 --- /dev/null +++ b/arch/sh/include/asm/vmlinux.lds.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | #ifndef __ASM_SH_VMLINUX_LDS_H | ||
| 2 | #define __ASM_SH_VMLINUX_LDS_H | ||
| 3 | |||
| 4 | #include <asm-generic/vmlinux.lds.h> | ||
| 5 | |||
| 6 | #ifdef CONFIG_DWARF_UNWINDER | ||
| 7 | #define DWARF_EH_FRAME \ | ||
| 8 | .eh_frame : AT(ADDR(.eh_frame) - LOAD_OFFSET) { \ | ||
| 9 | VMLINUX_SYMBOL(__start_eh_frame) = .; \ | ||
| 10 | *(.eh_frame) \ | ||
| 11 | VMLINUX_SYMBOL(__stop_eh_frame) = .; \ | ||
| 12 | } | ||
| 13 | #else | ||
| 14 | #define DWARF_EH_FRAME | ||
| 15 | #endif | ||
| 16 | |||
| 17 | #endif /* __ASM_SH_VMLINUX_LDS_H */ | ||
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h index f024fed00a72..2fe7cee9e43a 100644 --- a/arch/sh/include/asm/watchdog.h +++ b/arch/sh/include/asm/watchdog.h | |||
| @@ -13,10 +13,18 @@ | |||
| 13 | #ifdef __KERNEL__ | 13 | #ifdef __KERNEL__ |
| 14 | 14 | ||
| 15 | #include <linux/types.h> | 15 | #include <linux/types.h> |
| 16 | #include <linux/io.h> | ||
| 17 | |||
| 18 | #define WTCNT_HIGH 0x5a | ||
| 19 | #define WTCSR_HIGH 0xa5 | ||
| 20 | |||
| 21 | #define WTCSR_CKS2 0x04 | ||
| 22 | #define WTCSR_CKS1 0x02 | ||
| 23 | #define WTCSR_CKS0 0x01 | ||
| 24 | |||
| 16 | #include <cpu/watchdog.h> | 25 | #include <cpu/watchdog.h> |
| 17 | #include <asm/io.h> | ||
| 18 | 26 | ||
| 19 | /* | 27 | /* |
| 20 | * See cpu-sh2/watchdog.h for explanation of this stupidity.. | 28 | * See cpu-sh2/watchdog.h for explanation of this stupidity.. |
| 21 | */ | 29 | */ |
| 22 | #ifndef WTCNT_R | 30 | #ifndef WTCNT_R |
| @@ -27,13 +35,6 @@ | |||
| 27 | # define WTCSR_R WTCSR | 35 | # define WTCSR_R WTCSR |
| 28 | #endif | 36 | #endif |
| 29 | 37 | ||
| 30 | #define WTCNT_HIGH 0x5a | ||
| 31 | #define WTCSR_HIGH 0xa5 | ||
| 32 | |||
| 33 | #define WTCSR_CKS2 0x04 | ||
| 34 | #define WTCSR_CKS1 0x02 | ||
| 35 | #define WTCSR_CKS0 0x01 | ||
| 36 | |||
| 37 | /* | 38 | /* |
| 38 | * CKS0-2 supports a number of clock division ratios. At the time the watchdog | 39 | * CKS0-2 supports a number of clock division ratios. At the time the watchdog |
| 39 | * is enabled, it defaults to a 41 usec overflow period .. we overload this to | 40 | * is enabled, it defaults to a 41 usec overflow period .. we overload this to |
diff --git a/arch/sh/include/cpu-common/cpu/cacheflush.h b/arch/sh/include/cpu-common/cpu/cacheflush.h deleted file mode 100644 index c3db00b73605..000000000000 --- a/arch/sh/include/cpu-common/cpu/cacheflush.h +++ /dev/null | |||
| @@ -1,44 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * include/asm-sh/cpu-sh2/cacheflush.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2003 Paul Mundt | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | #ifndef __ASM_CPU_SH2_CACHEFLUSH_H | ||
| 11 | #define __ASM_CPU_SH2_CACHEFLUSH_H | ||
| 12 | |||
| 13 | /* | ||
| 14 | * Cache flushing: | ||
| 15 | * | ||
| 16 | * - flush_cache_all() flushes entire cache | ||
| 17 | * - flush_cache_mm(mm) flushes the specified mm context's cache lines | ||
| 18 | * - flush_cache_dup mm(mm) handles cache flushing when forking | ||
| 19 | * - flush_cache_page(mm, vmaddr, pfn) flushes a single page | ||
| 20 | * - flush_cache_range(vma, start, end) flushes a range of pages | ||
| 21 | * | ||
| 22 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache | ||
| 23 | * - flush_icache_range(start, end) flushes(invalidates) a range for icache | ||
| 24 | * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache | ||
| 25 | * | ||
| 26 | * Caches are indexed (effectively) by physical address on SH-2, so | ||
| 27 | * we don't need them. | ||
| 28 | */ | ||
| 29 | #define flush_cache_all() do { } while (0) | ||
| 30 | #define flush_cache_mm(mm) do { } while (0) | ||
| 31 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
| 32 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
| 33 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
| 34 | #define flush_dcache_page(page) do { } while (0) | ||
| 35 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 36 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 37 | #define flush_icache_range(start, end) do { } while (0) | ||
| 38 | #define flush_icache_page(vma,pg) do { } while (0) | ||
| 39 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
| 40 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
| 41 | |||
| 42 | #define p3_cache_init() do { } while (0) | ||
| 43 | |||
| 44 | #endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ | ||
diff --git a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h b/arch/sh/include/cpu-sh2a/cpu/cacheflush.h deleted file mode 100644 index 3d3b9205d2ac..000000000000 --- a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h +++ /dev/null | |||
| @@ -1,34 +0,0 @@ | |||
| 1 | #ifndef __ASM_CPU_SH2A_CACHEFLUSH_H | ||
| 2 | #define __ASM_CPU_SH2A_CACHEFLUSH_H | ||
| 3 | |||
| 4 | /* | ||
| 5 | * Cache flushing: | ||
| 6 | * | ||
| 7 | * - flush_cache_all() flushes entire cache | ||
| 8 | * - flush_cache_mm(mm) flushes the specified mm context's cache lines | ||
| 9 | * - flush_cache_dup mm(mm) handles cache flushing when forking | ||
| 10 | * - flush_cache_page(mm, vmaddr, pfn) flushes a single page | ||
| 11 | * - flush_cache_range(vma, start, end) flushes a range of pages | ||
| 12 | * | ||
| 13 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache | ||
| 14 | * - flush_icache_range(start, end) flushes(invalidates) a range for icache | ||
| 15 | * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache | ||
| 16 | * | ||
| 17 | * Caches are indexed (effectively) by physical address on SH-2, so | ||
| 18 | * we don't need them. | ||
| 19 | */ | ||
| 20 | #define flush_cache_all() do { } while (0) | ||
| 21 | #define flush_cache_mm(mm) do { } while (0) | ||
| 22 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
| 23 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
| 24 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
| 25 | #define flush_dcache_page(page) do { } while (0) | ||
| 26 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 27 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 28 | void flush_icache_range(unsigned long start, unsigned long end); | ||
| 29 | #define flush_icache_page(vma,pg) do { } while (0) | ||
| 30 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
| 31 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
| 32 | |||
| 33 | #define p3_cache_init() do { } while (0) | ||
| 34 | #endif /* __ASM_CPU_SH2A_CACHEFLUSH_H */ | ||
diff --git a/arch/sh/include/cpu-sh3/cpu/cacheflush.h b/arch/sh/include/cpu-sh3/cpu/cacheflush.h deleted file mode 100644 index 1ac27aae6700..000000000000 --- a/arch/sh/include/cpu-sh3/cpu/cacheflush.h +++ /dev/null | |||
| @@ -1,46 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * include/asm-sh/cpu-sh3/cacheflush.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999 Niibe Yutaka | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | #ifndef __ASM_CPU_SH3_CACHEFLUSH_H | ||
| 11 | #define __ASM_CPU_SH3_CACHEFLUSH_H | ||
| 12 | |||
| 13 | #if defined(CONFIG_SH7705_CACHE_32KB) | ||
| 14 | /* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the | ||
| 15 | * SH4. Unlike the SH4 this is a unified cache so we need to do some work | ||
| 16 | * in mmap when 'exec'ing a new binary | ||
| 17 | */ | ||
| 18 | /* 32KB cache, 4kb PAGE sizes need to check bit 12 */ | ||
| 19 | #define CACHE_ALIAS 0x00001000 | ||
| 20 | |||
| 21 | #define PG_mapped PG_arch_1 | ||
| 22 | |||
| 23 | void flush_cache_all(void); | ||
| 24 | void flush_cache_mm(struct mm_struct *mm); | ||
| 25 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) | ||
| 26 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
| 27 | unsigned long end); | ||
| 28 | void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); | ||
| 29 | void flush_dcache_page(struct page *pg); | ||
| 30 | void flush_icache_range(unsigned long start, unsigned long end); | ||
| 31 | void flush_icache_page(struct vm_area_struct *vma, struct page *page); | ||
| 32 | |||
| 33 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 34 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 35 | |||
| 36 | /* SH3 has unified cache so no special action needed here */ | ||
| 37 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
| 38 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
| 39 | |||
| 40 | #define p3_cache_init() do { } while (0) | ||
| 41 | |||
| 42 | #else | ||
| 43 | #include <cpu-common/cpu/cacheflush.h> | ||
| 44 | #endif | ||
| 45 | |||
| 46 | #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ | ||
diff --git a/arch/sh/include/cpu-sh4/cpu/cacheflush.h b/arch/sh/include/cpu-sh4/cpu/cacheflush.h deleted file mode 100644 index 065306d376eb..000000000000 --- a/arch/sh/include/cpu-sh4/cpu/cacheflush.h +++ /dev/null | |||
| @@ -1,43 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * include/asm-sh/cpu-sh4/cacheflush.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999 Niibe Yutaka | ||
| 5 | * Copyright (C) 2003 Paul Mundt | ||
| 6 | * | ||
| 7 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 8 | * License. See the file "COPYING" in the main directory of this archive | ||
| 9 | * for more details. | ||
| 10 | */ | ||
| 11 | #ifndef __ASM_CPU_SH4_CACHEFLUSH_H | ||
| 12 | #define __ASM_CPU_SH4_CACHEFLUSH_H | ||
| 13 | |||
| 14 | /* | ||
| 15 | * Caches are broken on SH-4 (unless we use write-through | ||
| 16 | * caching; in which case they're only semi-broken), | ||
| 17 | * so we need them. | ||
| 18 | */ | ||
| 19 | void flush_cache_all(void); | ||
| 20 | void flush_dcache_all(void); | ||
| 21 | void flush_cache_mm(struct mm_struct *mm); | ||
| 22 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) | ||
| 23 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
| 24 | unsigned long end); | ||
| 25 | void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, | ||
| 26 | unsigned long pfn); | ||
| 27 | void flush_dcache_page(struct page *pg); | ||
| 28 | |||
| 29 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 30 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 31 | |||
| 32 | void flush_icache_range(unsigned long start, unsigned long end); | ||
| 33 | void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, | ||
| 34 | unsigned long addr, int len); | ||
| 35 | |||
| 36 | #define flush_icache_page(vma,pg) do { } while (0) | ||
| 37 | |||
| 38 | /* Initialization of P3 area for copy_user_page */ | ||
| 39 | void p3_cache_init(void); | ||
| 40 | |||
| 41 | #define PG_mapped PG_arch_1 | ||
| 42 | |||
| 43 | #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ | ||
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h index 0ed5178fed69..f0886bc880e0 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h +++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h | |||
| @@ -16,7 +16,8 @@ | |||
| 16 | #define DMAE0_IRQ 38 | 16 | #define DMAE0_IRQ 38 |
| 17 | #define SH_DMAC_BASE0 0xFF608020 | 17 | #define SH_DMAC_BASE0 0xFF608020 |
| 18 | #define SH_DMARS_BASE 0xFF609000 | 18 | #define SH_DMARS_BASE 0xFF609000 |
| 19 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) | 19 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \ |
| 20 | defined(CONFIG_CPU_SUBTYPE_SH7724) | ||
| 20 | #define DMTE0_IRQ 48 /* DMAC0A*/ | 21 | #define DMTE0_IRQ 48 /* DMAC0A*/ |
| 21 | #define DMTE4_IRQ 40 /* DMAC0B */ | 22 | #define DMTE4_IRQ 40 /* DMAC0B */ |
| 22 | #define DMTE6_IRQ 42 | 23 | #define DMTE6_IRQ 42 |
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h index ccf1d999db6d..e1e90960ee9a 100644 --- a/arch/sh/include/cpu-sh4/cpu/freq.h +++ b/arch/sh/include/cpu-sh4/cpu/freq.h | |||
| @@ -22,6 +22,10 @@ | |||
| 22 | #define MSTPCR0 0xa4150030 | 22 | #define MSTPCR0 0xa4150030 |
| 23 | #define MSTPCR1 0xa4150034 | 23 | #define MSTPCR1 0xa4150034 |
| 24 | #define MSTPCR2 0xa4150038 | 24 | #define MSTPCR2 0xa4150038 |
| 25 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) | ||
| 26 | #define FRQCR 0xffc80000 | ||
| 27 | #define OSCCR 0xffc80018 | ||
| 28 | #define PLLCR 0xffc80024 | ||
| 25 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | 29 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ |
| 26 | defined(CONFIG_CPU_SUBTYPE_SH7780) | 30 | defined(CONFIG_CPU_SUBTYPE_SH7780) |
| 27 | #define FRQCR 0xffc80000 | 31 | #define FRQCR 0xffc80000 |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h index 738ea43c5038..48560407cbe1 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7722.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h | |||
| @@ -221,4 +221,18 @@ enum { | |||
| 221 | GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5, | 221 | GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5, |
| 222 | }; | 222 | }; |
| 223 | 223 | ||
| 224 | enum { | ||
| 225 | HWBLK_UNKNOWN = 0, | ||
| 226 | HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_URAM, HWBLK_XYMEM, | ||
| 227 | HWBLK_INTC, HWBLK_DMAC, HWBLK_SHYWAY, HWBLK_HUDI, | ||
| 228 | HWBLK_UBC, HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL, | ||
| 229 | HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SIO, | ||
| 230 | HWBLK_SIOF0, HWBLK_SIOF1, HWBLK_IIC, HWBLK_RTC, | ||
| 231 | HWBLK_TPU, HWBLK_IRDA, HWBLK_SDHI, HWBLK_SIM, HWBLK_KEYSC, | ||
| 232 | HWBLK_TSIF, HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU, | ||
| 233 | HWBLK_JPU, HWBLK_BEU, HWBLK_CEU, HWBLK_VEU, HWBLK_VPU, | ||
| 234 | HWBLK_LCDC, | ||
| 235 | HWBLK_NR, | ||
| 236 | }; | ||
| 237 | |||
| 224 | #endif /* __ASM_SH7722_H__ */ | 238 | #endif /* __ASM_SH7722_H__ */ |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7723.h b/arch/sh/include/cpu-sh4/cpu/sh7723.h index 14c8ca936781..9b36fae72324 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7723.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7723.h | |||
| @@ -265,4 +265,21 @@ enum { | |||
| 265 | GPIO_FN_IDEA1, GPIO_FN_IDEA0, | 265 | GPIO_FN_IDEA1, GPIO_FN_IDEA0, |
| 266 | }; | 266 | }; |
| 267 | 267 | ||
| 268 | enum { | ||
| 269 | HWBLK_UNKNOWN = 0, | ||
| 270 | HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_L2C, HWBLK_ILMEM, HWBLK_FPU, | ||
| 271 | HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY, | ||
| 272 | HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, HWBLK_SUBC, | ||
| 273 | HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1, | ||
| 274 | HWBLK_FLCTL, | ||
| 275 | HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, | ||
| 276 | HWBLK_SCIF3, HWBLK_SCIF4, HWBLK_SCIF5, | ||
| 277 | HWBLK_MSIOF0, HWBLK_MSIOF1, HWBLK_MERAM, HWBLK_IIC, HWBLK_RTC, | ||
| 278 | HWBLK_ATAPI, HWBLK_ADC, HWBLK_TPU, HWBLK_IRDA, HWBLK_TSIF, HWBLK_ICB, | ||
| 279 | HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_KEYSC, HWBLK_USB, | ||
| 280 | HWBLK_2DG, HWBLK_SIU, HWBLK_VEU2H1, HWBLK_VOU, HWBLK_BEU, HWBLK_CEU, | ||
| 281 | HWBLK_VEU2H0, HWBLK_VPU, HWBLK_LCDC, | ||
| 282 | HWBLK_NR, | ||
| 283 | }; | ||
| 284 | |||
| 268 | #endif /* __ASM_SH7723_H__ */ | 285 | #endif /* __ASM_SH7723_H__ */ |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h index 66fd1184359e..0cd1f71a1116 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7724.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h | |||
| @@ -266,4 +266,21 @@ enum { | |||
| 266 | GPIO_FN_INTC_IRQ1, GPIO_FN_INTC_IRQ0, | 266 | GPIO_FN_INTC_IRQ1, GPIO_FN_INTC_IRQ0, |
| 267 | }; | 267 | }; |
| 268 | 268 | ||
| 269 | enum { | ||
| 270 | HWBLK_UNKNOWN = 0, | ||
| 271 | HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_RSMEM, HWBLK_ILMEM, HWBLK_L2C, | ||
| 272 | HWBLK_FPU, HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY, | ||
| 273 | HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, | ||
| 274 | HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1, | ||
| 275 | HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SCIF3, | ||
| 276 | HWBLK_SCIF4, HWBLK_SCIF5, HWBLK_MSIOF0, HWBLK_MSIOF1, | ||
| 277 | HWBLK_KEYSC, HWBLK_RTC, HWBLK_IIC0, HWBLK_IIC1, | ||
| 278 | HWBLK_MMC, HWBLK_ETHER, HWBLK_ATAPI, HWBLK_TPU, HWBLK_IRDA, | ||
| 279 | HWBLK_TSIF, HWBLK_USB1, HWBLK_USB0, HWBLK_2DG, | ||
| 280 | HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_VEU1, HWBLK_CEU1, HWBLK_BEU1, | ||
| 281 | HWBLK_2DDMAC, HWBLK_SPU, HWBLK_JPU, HWBLK_VOU, | ||
| 282 | HWBLK_BEU0, HWBLK_CEU0, HWBLK_VEU0, HWBLK_VPU, HWBLK_LCDC, | ||
| 283 | HWBLK_NR, | ||
| 284 | }; | ||
| 285 | |||
| 269 | #endif /* __ASM_SH7724_H__ */ | 286 | #endif /* __ASM_SH7724_H__ */ |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h new file mode 100644 index 000000000000..f4d267efad71 --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h | |||
| @@ -0,0 +1,243 @@ | |||
| 1 | #ifndef __ASM_SH7757_H__ | ||
| 2 | #define __ASM_SH7757_H__ | ||
| 3 | |||
| 4 | enum { | ||
| 5 | /* PTA */ | ||
| 6 | GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4, | ||
| 7 | GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0, | ||
| 8 | |||
| 9 | /* PTB */ | ||
| 10 | GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4, | ||
| 11 | GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0, | ||
| 12 | |||
| 13 | /* PTC */ | ||
| 14 | GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4, | ||
| 15 | GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0, | ||
| 16 | |||
| 17 | /* PTD */ | ||
| 18 | GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4, | ||
| 19 | GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0, | ||
| 20 | |||
| 21 | /* PTE */ | ||
| 22 | GPIO_PTE7, GPIO_PTE6, GPIO_PTE5, GPIO_PTE4, | ||
| 23 | GPIO_PTE3, GPIO_PTE2, GPIO_PTE1, GPIO_PTE0, | ||
| 24 | |||
| 25 | /* PTF */ | ||
| 26 | GPIO_PTF7, GPIO_PTF6, GPIO_PTF5, GPIO_PTF4, | ||
| 27 | GPIO_PTF3, GPIO_PTF2, GPIO_PTF1, GPIO_PTF0, | ||
| 28 | |||
| 29 | /* PTG */ | ||
| 30 | GPIO_PTG7, GPIO_PTG6, GPIO_PTG5, GPIO_PTG4, | ||
| 31 | GPIO_PTG3, GPIO_PTG2, GPIO_PTG1, GPIO_PTG0, | ||
| 32 | |||
| 33 | /* PTH */ | ||
| 34 | GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4, | ||
| 35 | GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0, | ||
| 36 | |||
| 37 | /* PTI */ | ||
| 38 | GPIO_PTI7, GPIO_PTI6, GPIO_PTI5, GPIO_PTI4, | ||
| 39 | GPIO_PTI3, GPIO_PTI2, GPIO_PTI1, GPIO_PTI0, | ||
| 40 | |||
| 41 | /* PTJ */ | ||
| 42 | GPIO_PTJ7, GPIO_PTJ6, GPIO_PTJ5, GPIO_PTJ4, | ||
| 43 | GPIO_PTJ3, GPIO_PTJ2, GPIO_PTJ1, GPIO_PTJ0, | ||
| 44 | |||
| 45 | /* PTK */ | ||
| 46 | GPIO_PTK7, GPIO_PTK6, GPIO_PTK5, GPIO_PTK4, | ||
| 47 | GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0, | ||
| 48 | |||
| 49 | /* PTL */ | ||
| 50 | GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4, | ||
| 51 | GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0, | ||
| 52 | |||
| 53 | /* PTM */ | ||
| 54 | GPIO_PTM6, GPIO_PTM5, GPIO_PTM4, | ||
| 55 | GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0, | ||
| 56 | |||
| 57 | /* PTN */ | ||
| 58 | GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4, | ||
| 59 | GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0, | ||
| 60 | |||
| 61 | /* PTO */ | ||
| 62 | GPIO_PTO7, GPIO_PTO6, GPIO_PTO5, GPIO_PTO4, | ||
| 63 | GPIO_PTO3, GPIO_PTO2, GPIO_PTO1, GPIO_PTO0, | ||
| 64 | |||
| 65 | /* PTP */ | ||
| 66 | GPIO_PTP6, GPIO_PTP5, GPIO_PTP4, | ||
| 67 | GPIO_PTP3, GPIO_PTP2, GPIO_PTP1, GPIO_PTP0, | ||
| 68 | |||
| 69 | /* PTQ */ | ||
| 70 | GPIO_PTQ6, GPIO_PTQ5, GPIO_PTQ4, | ||
| 71 | GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0, | ||
| 72 | |||
| 73 | /* PTR */ | ||
| 74 | GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4, | ||
| 75 | GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0, | ||
| 76 | |||
| 77 | /* PTS */ | ||
| 78 | GPIO_PTS7, GPIO_PTS6, GPIO_PTS5, GPIO_PTS4, | ||
| 79 | GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0, | ||
| 80 | |||
| 81 | /* PTT */ | ||
| 82 | GPIO_PTT5, GPIO_PTT4, | ||
| 83 | GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0, | ||
| 84 | |||
| 85 | /* PTU */ | ||
| 86 | GPIO_PTU7, GPIO_PTU6, GPIO_PTU5, GPIO_PTU4, | ||
| 87 | GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0, | ||
| 88 | |||
| 89 | /* PTV */ | ||
| 90 | GPIO_PTV7, GPIO_PTV6, GPIO_PTV5, GPIO_PTV4, | ||
| 91 | GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0, | ||
| 92 | |||
| 93 | /* PTW */ | ||
| 94 | GPIO_PTW7, GPIO_PTW6, GPIO_PTW5, GPIO_PTW4, | ||
| 95 | GPIO_PTW3, GPIO_PTW2, GPIO_PTW1, GPIO_PTW0, | ||
| 96 | |||
| 97 | /* PTX */ | ||
| 98 | GPIO_PTX7, GPIO_PTX6, GPIO_PTX5, GPIO_PTX4, | ||
| 99 | GPIO_PTX3, GPIO_PTX2, GPIO_PTX1, GPIO_PTX0, | ||
| 100 | |||
| 101 | /* PTY */ | ||
| 102 | GPIO_PTY7, GPIO_PTY6, GPIO_PTY5, GPIO_PTY4, | ||
| 103 | GPIO_PTY3, GPIO_PTY2, GPIO_PTY1, GPIO_PTY0, | ||
| 104 | |||
| 105 | /* PTZ */ | ||
| 106 | GPIO_PTZ7, GPIO_PTZ6, GPIO_PTZ5, GPIO_PTZ4, | ||
| 107 | GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1, GPIO_PTZ0, | ||
| 108 | |||
| 109 | |||
| 110 | /* PTA (mobule: LBSC, CPG, LPC) */ | ||
| 111 | GPIO_FN_BS, GPIO_FN_RDWR, GPIO_FN_WE1, GPIO_FN_RDY, | ||
| 112 | GPIO_FN_MD10, GPIO_FN_MD9, GPIO_FN_MD8, | ||
| 113 | GPIO_FN_LGPIO7, GPIO_FN_LGPIO6, GPIO_FN_LGPIO5, GPIO_FN_LGPIO4, | ||
| 114 | GPIO_FN_LGPIO3, GPIO_FN_LGPIO2, GPIO_FN_LGPIO1, GPIO_FN_LGPIO0, | ||
| 115 | |||
| 116 | /* PTB (mobule: LBSC, EtherC, SIM, LPC) */ | ||
| 117 | GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12, | ||
| 118 | GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9, GPIO_FN_D8, | ||
| 119 | GPIO_FN_ET0_MDC, GPIO_FN_ET0_MDIO, | ||
| 120 | GPIO_FN_ET1_MDC, GPIO_FN_ET1_MDIO, | ||
| 121 | GPIO_FN_SIM_D, GPIO_FN_SIM_CLK, GPIO_FN_SIM_RST, | ||
| 122 | GPIO_FN_WPSZ1, GPIO_FN_WPSZ0, GPIO_FN_FWID, GPIO_FN_FLSHSZ, | ||
| 123 | GPIO_FN_LPC_SPIEN, GPIO_FN_BASEL, | ||
| 124 | |||
| 125 | /* PTC (mobule: SD) */ | ||
| 126 | GPIO_FN_SD_WP, GPIO_FN_SD_CD, GPIO_FN_SD_CLK, GPIO_FN_SD_CMD, | ||
| 127 | GPIO_FN_SD_D3, GPIO_FN_SD_D2, GPIO_FN_SD_D1, GPIO_FN_SD_D0, | ||
| 128 | |||
| 129 | /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ | ||
| 130 | GPIO_FN_IRQ7, GPIO_FN_IRQ6, GPIO_FN_IRQ5, GPIO_FN_IRQ4, | ||
| 131 | GPIO_FN_IRQ3, GPIO_FN_IRQ2, GPIO_FN_IRQ1, GPIO_FN_IRQ0, | ||
| 132 | GPIO_FN_MD6, GPIO_FN_MD5, GPIO_FN_MD3, GPIO_FN_MD2, | ||
| 133 | GPIO_FN_MD1, GPIO_FN_MD0, GPIO_FN_ADTRG1, GPIO_FN_ADTRG0, | ||
| 134 | |||
| 135 | /* PTE (mobule: EtherC) */ | ||
| 136 | GPIO_FN_ET0_CRS_DV, GPIO_FN_ET0_TXD1, | ||
| 137 | GPIO_FN_ET0_TXD0, GPIO_FN_ET0_TX_EN, | ||
| 138 | GPIO_FN_ET0_REF_CLK, GPIO_FN_ET0_RXD1, | ||
| 139 | GPIO_FN_ET0_RXD0, GPIO_FN_ET0_RX_ER, | ||
| 140 | |||
| 141 | /* PTF (mobule: EtherC) */ | ||
| 142 | GPIO_FN_ET1_CRS_DV, GPIO_FN_ET1_TXD1, | ||
| 143 | GPIO_FN_ET1_TXD0, GPIO_FN_ET1_TX_EN, | ||
| 144 | GPIO_FN_ET1_REF_CLK, GPIO_FN_ET1_RXD1, | ||
| 145 | GPIO_FN_ET1_RXD0, GPIO_FN_ET1_RX_ER, | ||
| 146 | |||
| 147 | /* PTG (mobule: SYSTEM, PWMX, LPC) */ | ||
| 148 | GPIO_FN_STATUS0, GPIO_FN_STATUS1, | ||
| 149 | GPIO_FN_PWX0, GPIO_FN_PWX1, GPIO_FN_PWX2, GPIO_FN_PWX3, | ||
| 150 | GPIO_FN_SERIRQ, GPIO_FN_CLKRUN, GPIO_FN_LPCPD, GPIO_FN_LDRQ, | ||
| 151 | |||
| 152 | /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ | ||
| 153 | GPIO_FN_TCLK, GPIO_FN_RXD4, GPIO_FN_TXD4, | ||
| 154 | GPIO_FN_SP1_MOSI, GPIO_FN_SP1_MISO, | ||
| 155 | GPIO_FN_SP1_SCK, GPIO_FN_SP1_SCK_FB, | ||
| 156 | GPIO_FN_SP1_SS0, GPIO_FN_SP1_SS1, | ||
| 157 | GPIO_FN_SP0_SS1, | ||
| 158 | |||
| 159 | /* PTI (mobule: INTC) */ | ||
| 160 | GPIO_FN_IRQ15, GPIO_FN_IRQ14, GPIO_FN_IRQ13, GPIO_FN_IRQ12, | ||
| 161 | GPIO_FN_IRQ11, GPIO_FN_IRQ10, GPIO_FN_IRQ9, GPIO_FN_IRQ8, | ||
| 162 | |||
| 163 | /* PTJ (mobule: SCIF234, SERMUX) */ | ||
| 164 | GPIO_FN_RXD3, GPIO_FN_TXD3, GPIO_FN_RXD2, GPIO_FN_TXD2, | ||
| 165 | GPIO_FN_COM1_TXD, GPIO_FN_COM1_RXD, | ||
| 166 | GPIO_FN_COM1_RTS, GPIO_FN_COM1_CTS, | ||
| 167 | |||
| 168 | /* PTK (mobule: SERMUX) */ | ||
| 169 | GPIO_FN_COM2_TXD, GPIO_FN_COM2_RXD, | ||
| 170 | GPIO_FN_COM2_RTS, GPIO_FN_COM2_CTS, | ||
| 171 | GPIO_FN_COM2_DTR, GPIO_FN_COM2_DSR, | ||
| 172 | GPIO_FN_COM2_DCD, GPIO_FN_COM2_RI, | ||
| 173 | |||
| 174 | /* PTL (mobule: SERMUX) */ | ||
| 175 | GPIO_FN_RAC_TXD, GPIO_FN_RAC_RXD, | ||
| 176 | GPIO_FN_RAC_RTS, GPIO_FN_RAC_CTS, | ||
| 177 | GPIO_FN_RAC_DTR, GPIO_FN_RAC_DSR, | ||
| 178 | GPIO_FN_RAC_DCD, GPIO_FN_RAC_RI, | ||
| 179 | |||
| 180 | /* PTM (mobule: IIC, LPC) */ | ||
| 181 | GPIO_FN_SDA6, GPIO_FN_SCL6, GPIO_FN_SDA7, GPIO_FN_SCL7, | ||
| 182 | GPIO_FN_WP, GPIO_FN_FMS0, GPIO_FN_FMS1, | ||
| 183 | |||
| 184 | /* PTN (mobule: SCIF234, EVC) */ | ||
| 185 | GPIO_FN_SCK2, GPIO_FN_RTS4, GPIO_FN_RTS3, GPIO_FN_RTS2, | ||
| 186 | GPIO_FN_CTS4, GPIO_FN_CTS3, GPIO_FN_CTS2, | ||
| 187 | GPIO_FN_EVENT7, GPIO_FN_EVENT6, GPIO_FN_EVENT5, GPIO_FN_EVENT4, | ||
| 188 | GPIO_FN_EVENT3, GPIO_FN_EVENT2, GPIO_FN_EVENT1, GPIO_FN_EVENT0, | ||
| 189 | |||
| 190 | /* PTO (mobule: SGPIO) */ | ||
| 191 | GPIO_FN_SGPIO0_CLK, GPIO_FN_SGPIO0_LOAD, | ||
| 192 | GPIO_FN_SGPIO0_DI, GPIO_FN_SGPIO0_DO, | ||
| 193 | GPIO_FN_SGPIO1_CLK, GPIO_FN_SGPIO1_LOAD, | ||
| 194 | GPIO_FN_SGPIO1_DI, GPIO_FN_SGPIO1_DO, | ||
| 195 | |||
| 196 | /* PTP (mobule: JMC, SCIF234) */ | ||
| 197 | GPIO_FN_JMCTCK, GPIO_FN_JMCTMS, GPIO_FN_JMCTDO, GPIO_FN_JMCTDI, | ||
| 198 | GPIO_FN_JMCRST, GPIO_FN_SCK4, GPIO_FN_SCK3, | ||
| 199 | |||
| 200 | /* PTQ (mobule: LPC) */ | ||
| 201 | GPIO_FN_LAD3, GPIO_FN_LAD2, GPIO_FN_LAD1, GPIO_FN_LAD0, | ||
| 202 | GPIO_FN_LFRAME, GPIO_FN_LRESET, GPIO_FN_LCLK, | ||
| 203 | |||
| 204 | /* PTR (mobule: GRA, IIC) */ | ||
| 205 | GPIO_FN_DDC3, GPIO_FN_DDC2, | ||
| 206 | GPIO_FN_SDA8, GPIO_FN_SCL8, GPIO_FN_SDA2, GPIO_FN_SCL2, | ||
| 207 | GPIO_FN_SDA1, GPIO_FN_SCL1, GPIO_FN_SDA0, GPIO_FN_SCL0, | ||
| 208 | |||
| 209 | /* PTS (mobule: GRA, IIC) */ | ||
| 210 | GPIO_FN_DDC1, GPIO_FN_DDC0, | ||
| 211 | GPIO_FN_SDA9, GPIO_FN_SCL9, GPIO_FN_SDA5, GPIO_FN_SCL5, | ||
| 212 | GPIO_FN_SDA4, GPIO_FN_SCL4, GPIO_FN_SDA3, GPIO_FN_SCL3, | ||
| 213 | |||
| 214 | /* PTT (mobule: SYSTEM, PWMX) */ | ||
| 215 | GPIO_FN_AUDSYNC, GPIO_FN_AUDCK, | ||
| 216 | GPIO_FN_AUDATA3, GPIO_FN_AUDATA2, | ||
| 217 | GPIO_FN_AUDATA1, GPIO_FN_AUDATA0, | ||
| 218 | GPIO_FN_PWX7, GPIO_FN_PWX6, GPIO_FN_PWX5, GPIO_FN_PWX4, | ||
| 219 | |||
| 220 | /* PTU (mobule: LBSC, DMAC) */ | ||
| 221 | GPIO_FN_CS6, GPIO_FN_CS5, GPIO_FN_CS4, GPIO_FN_CS0, | ||
| 222 | GPIO_FN_RD, GPIO_FN_WE0, GPIO_FN_A25, GPIO_FN_A24, | ||
| 223 | GPIO_FN_DREQ0, GPIO_FN_DACK0, | ||
| 224 | |||
| 225 | /* PTV (mobule: LBSC, DMAC) */ | ||
| 226 | GPIO_FN_A23, GPIO_FN_A22, GPIO_FN_A21, GPIO_FN_A20, | ||
| 227 | GPIO_FN_A19, GPIO_FN_A18, GPIO_FN_A17, GPIO_FN_A16, | ||
| 228 | GPIO_FN_TEND0, GPIO_FN_DREQ1, GPIO_FN_DACK1, GPIO_FN_TEND1, | ||
| 229 | |||
| 230 | /* PTW (mobule: LBSC) */ | ||
| 231 | GPIO_FN_A15, GPIO_FN_A14, GPIO_FN_A13, GPIO_FN_A12, | ||
| 232 | GPIO_FN_A11, GPIO_FN_A10, GPIO_FN_A9, GPIO_FN_A8, | ||
| 233 | |||
| 234 | /* PTX (mobule: LBSC) */ | ||
| 235 | GPIO_FN_A7, GPIO_FN_A6, GPIO_FN_A5, GPIO_FN_A4, | ||
| 236 | GPIO_FN_A3, GPIO_FN_A2, GPIO_FN_A1, GPIO_FN_A0, | ||
| 237 | |||
| 238 | /* PTY (mobule: LBSC) */ | ||
| 239 | GPIO_FN_D7, GPIO_FN_D6, GPIO_FN_D5, GPIO_FN_D4, | ||
| 240 | GPIO_FN_D3, GPIO_FN_D2, GPIO_FN_D1, GPIO_FN_D0, | ||
| 241 | }; | ||
| 242 | |||
| 243 | #endif /* __ASM_SH7757_H__ */ | ||
diff --git a/arch/sh/include/cpu-sh5/cpu/cacheflush.h b/arch/sh/include/cpu-sh5/cpu/cacheflush.h deleted file mode 100644 index 5a11f0b7e66a..000000000000 --- a/arch/sh/include/cpu-sh5/cpu/cacheflush.h +++ /dev/null | |||
| @@ -1,33 +0,0 @@ | |||
| 1 | #ifndef __ASM_SH_CPU_SH5_CACHEFLUSH_H | ||
| 2 | #define __ASM_SH_CPU_SH5_CACHEFLUSH_H | ||
| 3 | |||
| 4 | #ifndef __ASSEMBLY__ | ||
| 5 | |||
| 6 | struct vm_area_struct; | ||
| 7 | struct page; | ||
| 8 | struct mm_struct; | ||
| 9 | |||
| 10 | extern void flush_cache_all(void); | ||
| 11 | extern void flush_cache_mm(struct mm_struct *mm); | ||
| 12 | extern void flush_cache_sigtramp(unsigned long vaddr); | ||
| 13 | extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
| 14 | unsigned long end); | ||
| 15 | extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); | ||
| 16 | extern void flush_dcache_page(struct page *pg); | ||
| 17 | extern void flush_icache_range(unsigned long start, unsigned long end); | ||
| 18 | extern void flush_icache_user_range(struct vm_area_struct *vma, | ||
| 19 | struct page *page, unsigned long addr, | ||
| 20 | int len); | ||
| 21 | |||
| 22 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) | ||
| 23 | |||
| 24 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
| 25 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
| 26 | |||
| 27 | #define flush_icache_page(vma, page) do { } while (0) | ||
| 28 | void p3_cache_init(void); | ||
| 29 | |||
| 30 | #endif /* __ASSEMBLY__ */ | ||
| 31 | |||
| 32 | #endif /* __ASM_SH_CPU_SH5_CACHEFLUSH_H */ | ||
| 33 | |||
diff --git a/arch/sh/include/mach-common/mach/migor.h b/arch/sh/include/mach-common/mach/migor.h deleted file mode 100644 index e451f0229e00..000000000000 --- a/arch/sh/include/mach-common/mach/migor.h +++ /dev/null | |||
| @@ -1,64 +0,0 @@ | |||
| 1 | #ifndef __ASM_SH_MIGOR_H | ||
| 2 | #define __ASM_SH_MIGOR_H | ||
| 3 | |||
| 4 | /* | ||
| 5 | * linux/include/asm-sh/migor.h | ||
| 6 | * | ||
| 7 | * Copyright (C) 2008 Renesas Solutions | ||
| 8 | * | ||
| 9 | * Portions Copyright (C) 2007 Nobuhiro Iwamatsu | ||
| 10 | * | ||
| 11 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 12 | * License. See the file "COPYING" in the main directory of this archive | ||
| 13 | * for more details. | ||
| 14 | * | ||
| 15 | */ | ||
| 16 | #include <asm/addrspace.h> | ||
| 17 | |||
| 18 | /* GPIO */ | ||
| 19 | #define PORT_PACR 0xa4050100 | ||
| 20 | #define PORT_PDCR 0xa4050106 | ||
| 21 | #define PORT_PECR 0xa4050108 | ||
| 22 | #define PORT_PHCR 0xa405010e | ||
| 23 | #define PORT_PJCR 0xa4050110 | ||
| 24 | #define PORT_PKCR 0xa4050112 | ||
| 25 | #define PORT_PLCR 0xa4050114 | ||
| 26 | #define PORT_PMCR 0xa4050116 | ||
| 27 | #define PORT_PRCR 0xa405011c | ||
| 28 | #define PORT_PTCR 0xa4050140 | ||
| 29 | #define PORT_PUCR 0xa4050142 | ||
| 30 | #define PORT_PVCR 0xa4050144 | ||
| 31 | #define PORT_PWCR 0xa4050146 | ||
| 32 | #define PORT_PXCR 0xa4050148 | ||
| 33 | #define PORT_PYCR 0xa405014a | ||
| 34 | #define PORT_PZCR 0xa405014c | ||
| 35 | #define PORT_PADR 0xa4050120 | ||
| 36 | #define PORT_PHDR 0xa405012e | ||
| 37 | #define PORT_PTDR 0xa4050160 | ||
| 38 | #define PORT_PWDR 0xa4050166 | ||
| 39 | |||
| 40 | #define PORT_HIZCRA 0xa4050158 | ||
| 41 | #define PORT_HIZCRC 0xa405015c | ||
| 42 | |||
| 43 | #define PORT_MSELCRB 0xa4050182 | ||
| 44 | |||
| 45 | #define PORT_PSELA 0xa405014e | ||
| 46 | #define PORT_PSELB 0xa4050150 | ||
| 47 | #define PORT_PSELC 0xa4050152 | ||
| 48 | #define PORT_PSELD 0xa4050154 | ||
| 49 | #define PORT_PSELE 0xa4050156 | ||
| 50 | |||
| 51 | #define PORT_HIZCRA 0xa4050158 | ||
| 52 | #define PORT_HIZCRB 0xa405015a | ||
| 53 | #define PORT_HIZCRC 0xa405015c | ||
| 54 | |||
| 55 | #define BSC_CS4BCR 0xfec10010 | ||
| 56 | #define BSC_CS6ABCR 0xfec1001c | ||
| 57 | #define BSC_CS4WCR 0xfec10030 | ||
| 58 | |||
| 59 | #include <video/sh_mobile_lcdc.h> | ||
| 60 | |||
| 61 | int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle, | ||
| 62 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); | ||
| 63 | |||
| 64 | #endif /* __ASM_SH_MIGOR_H */ | ||
diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h new file mode 100644 index 000000000000..267e24112d82 --- /dev/null +++ b/arch/sh/include/mach-common/mach/romimage.h | |||
| @@ -0,0 +1 @@ | |||
| /* do nothing here by default */ | |||
diff --git a/arch/sh/include/mach-common/mach/sh7785lcr.h b/arch/sh/include/mach-common/mach/sh7785lcr.h index 90011d435f30..1292ae5c21b3 100644 --- a/arch/sh/include/mach-common/mach/sh7785lcr.h +++ b/arch/sh/include/mach-common/mach/sh7785lcr.h | |||
| @@ -35,6 +35,8 @@ | |||
| 35 | #define PCA9564_ADDR 0x06000000 /* I2C */ | 35 | #define PCA9564_ADDR 0x06000000 /* I2C */ |
| 36 | #define PCA9564_SIZE 0x00000100 | 36 | #define PCA9564_SIZE 0x00000100 |
| 37 | 37 | ||
| 38 | #define PCA9564_PROTO_32BIT_ADDR 0x14000000 | ||
| 39 | |||
| 38 | #define SM107_MEM_ADDR 0x10000000 | 40 | #define SM107_MEM_ADDR 0x10000000 |
| 39 | #define SM107_MEM_SIZE 0x00e00000 | 41 | #define SM107_MEM_SIZE 0x00e00000 |
| 40 | #define SM107_REG_ADDR 0x13e00000 | 42 | #define SM107_REG_ADDR 0x13e00000 |
diff --git a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt new file mode 100644 index 000000000000..8b8e4fa1fee9 --- /dev/null +++ b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt | |||
| @@ -0,0 +1,82 @@ | |||
| 1 | LIST "partner-jet-setup.txt" | ||
| 2 | LIST "(C) Copyright 2009 Renesas Solutions Corp" | ||
| 3 | LIST "Kuninori Morimoto <morimoto.kuninori@renesas.com>" | ||
| 4 | LIST "--------------------------------" | ||
| 5 | LIST "zImage (RAM boot)" | ||
| 6 | LIST "This script can be used to boot the kernel from RAM via JTAG:" | ||
| 7 | LIST "> < partner-jet-setup.txt" | ||
| 8 | LIST "> RD zImage, 0xa8800000" | ||
| 9 | LIST "> G=0xa8800000" | ||
| 10 | LIST "--------------------------------" | ||
| 11 | LIST "romImage (Flash boot)" | ||
| 12 | LIST "Use the following command to burn the zImage to flash via JTAG:" | ||
| 13 | LIST "> RD romImage, 0" | ||
| 14 | LIST "--------------------------------" | ||
| 15 | |||
| 16 | LIST "disable watchdog" | ||
| 17 | EW 0xa4520004, 0xa507 | ||
| 18 | |||
| 19 | LIST "MMU" | ||
| 20 | ED 0xff000010, 0x00000004 | ||
| 21 | |||
| 22 | LIST "setup clocks" | ||
| 23 | ED 0xa4150024, 0x00004000 | ||
| 24 | ED 0xa4150000, 0x8E003508 | ||
| 25 | ED 0xa4150004, 0x00000000 | ||
| 26 | |||
| 27 | WAIT 1 | ||
| 28 | |||
| 29 | LIST "BSC" | ||
| 30 | ED 0xff800020, 0xa5a50000 | ||
| 31 | ED 0xfec10000, 0x00000013 | ||
| 32 | ED 0xfec10004, 0x11110400 | ||
| 33 | ED 0xfec10024, 0x00000440 | ||
| 34 | |||
| 35 | WAIT 1 | ||
| 36 | |||
| 37 | LIST "setup sdram" | ||
| 38 | ED 0xfd000108, 0x00000181 | ||
| 39 | ED 0xfd000020, 0x015B0002 | ||
| 40 | ED 0xfd000030, 0x03061502 | ||
| 41 | ED 0xfd000034, 0x02020102 | ||
| 42 | ED 0xfd000038, 0x01090305 | ||
| 43 | ED 0xfd00003c, 0x00000002 | ||
| 44 | ED 0xfd000008, 0x00000005 | ||
| 45 | ED 0xfd000018, 0x00000001 | ||
| 46 | |||
| 47 | WAIT 1 | ||
| 48 | |||
| 49 | ED 0xfd000014, 0x00000002 | ||
| 50 | ED 0xfd000060, 0x00020000 | ||
| 51 | ED 0xfd000060, 0x00030000 | ||
| 52 | ED 0xfd000060, 0x00010040 | ||
| 53 | ED 0xfd000060, 0x00000532 | ||
| 54 | ED 0xfd000014, 0x00000002 | ||
| 55 | ED 0xfd000014, 0x00000004 | ||
| 56 | ED 0xfd000014, 0x00000004 | ||
| 57 | ED 0xfd000060, 0x00000432 | ||
| 58 | ED 0xfd000060, 0x000103C0 | ||
| 59 | ED 0xfd000060, 0x00010040 | ||
| 60 | |||
| 61 | WAIT 1 | ||
| 62 | |||
| 63 | ED 0xfd000010, 0x00000001 | ||
| 64 | ED 0xfd000044, 0x00000613 | ||
| 65 | ED 0xfd000048, 0x238C003A | ||
| 66 | ED 0xfd000014, 0x00000002 | ||
| 67 | |||
| 68 | LIST "Dummy read" | ||
| 69 | DD 0x0c400000, 0x0c400000 | ||
| 70 | |||
| 71 | ED 0xfd000014, 0x00000002 | ||
| 72 | ED 0xfd000014, 0x00000004 | ||
| 73 | ED 0xfd000108, 0x00000080 | ||
| 74 | ED 0xfd000040, 0x00010000 | ||
| 75 | |||
| 76 | WAIT 1 | ||
| 77 | |||
| 78 | LIST "setup cache" | ||
| 79 | ED 0xff00001c, 0x0000090b | ||
| 80 | |||
| 81 | LIST "disable USB" | ||
| 82 | EW 0xA4D80000, 0x0000 | ||
diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h new file mode 100644 index 000000000000..1c8787ecb1c1 --- /dev/null +++ b/arch/sh/include/mach-ecovec24/mach/romimage.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* EcoVec board specific boot code: | ||
| 2 | * converts the "partner-jet-script.txt" script into assembly | ||
| 3 | * the assembly code is the first code to be executed in the romImage | ||
| 4 | */ | ||
| 5 | |||
| 6 | #include <asm/romimage-macros.h> | ||
| 7 | #include "partner-jet-setup.txt" | ||
| 8 | |||
| 9 | /* execute icbi after enabling cache */ | ||
| 10 | mov.l 1f, r0 | ||
| 11 | icbi @r0 | ||
| 12 | |||
| 13 | /* jump to cached area */ | ||
| 14 | mova 2f, r0 | ||
| 15 | jmp @r0 | ||
| 16 | nop | ||
| 17 | |||
| 18 | .align 2 | ||
| 19 | 1 : .long 0xa8000000 | ||
| 20 | 2 : | ||
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h new file mode 100644 index 000000000000..174374e19547 --- /dev/null +++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | #ifndef __ASM_SH_KFR2R09_H | ||
| 2 | #define __ASM_SH_KFR2R09_H | ||
| 3 | |||
| 4 | #include <video/sh_mobile_lcdc.h> | ||
| 5 | |||
| 6 | #ifdef CONFIG_FB_SH_MOBILE_LCDC | ||
| 7 | void kfr2r09_lcd_on(void *board_data); | ||
| 8 | void kfr2r09_lcd_off(void *board_data); | ||
| 9 | int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, | ||
| 10 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); | ||
| 11 | #else | ||
| 12 | static inline void kfr2r09_lcd_on(void *board_data) {} | ||
| 13 | static inline void kfr2r09_lcd_off(void *board_data) {} | ||
| 14 | static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle, | ||
| 15 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops) | ||
| 16 | { | ||
| 17 | return -ENODEV; | ||
| 18 | } | ||
| 19 | #endif | ||
| 20 | |||
| 21 | #endif /* __ASM_SH_KFR2R09_H */ | ||
diff --git a/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt new file mode 100644 index 000000000000..3a65503714ee --- /dev/null +++ b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt | |||
| @@ -0,0 +1,143 @@ | |||
| 1 | LIST "partner-jet-setup.txt - 20090729 Magnus Damm" | ||
| 2 | LIST "set up enough of the kfr2r09 hardware to boot the kernel" | ||
| 3 | |||
| 4 | LIST "zImage (RAM boot)" | ||
| 5 | LIST "This script can be used to boot the kernel from RAM via JTAG:" | ||
| 6 | LIST "> < partner-jet-setup.txt" | ||
| 7 | LIST "> RD zImage, 0xa8800000" | ||
| 8 | LIST "> G=0xa8800000" | ||
| 9 | |||
| 10 | LIST "romImage (Flash boot)" | ||
| 11 | LIST "Use the following command to burn the zImage to flash via JTAG:" | ||
| 12 | LIST "> RD romImage, 0" | ||
| 13 | |||
| 14 | LIST "--------------------------------" | ||
| 15 | |||
| 16 | LIST "disable watchdog" | ||
| 17 | EW 0xa4520004, 0xa507 | ||
| 18 | |||
| 19 | LIST "invalidate instruction cache" | ||
| 20 | ED 0xff00001c, 0x00000800 | ||
| 21 | |||
| 22 | LIST "invalidate TLBs" | ||
| 23 | ED 0xff000010, 0x00000004 | ||
| 24 | |||
| 25 | LIST "select mode for cs5 + cs6" | ||
| 26 | ED 0xff800020, 0xa5a50001 | ||
| 27 | ED 0xfec10000, 0x0000001b | ||
| 28 | |||
| 29 | LIST "setup clocks" | ||
| 30 | LIST "The PLL and FLL values are updated here for the optimal" | ||
| 31 | LIST "RF frequency and improved reception sensitivity." | ||
| 32 | ED 0xa4150004, 0x00000050 | ||
| 33 | ED 0xa4150000, 0x91053508 | ||
| 34 | WAIT 1 | ||
| 35 | ED 0xa4150050, 0x00000340 | ||
| 36 | ED 0xa4150024, 0x00005000 | ||
| 37 | |||
| 38 | LIST "setup pins" | ||
| 39 | EB 0xa4050120, 0x00 | ||
| 40 | EB 0xa4050122, 0x00 | ||
| 41 | EB 0xa4050124, 0x00 | ||
| 42 | EB 0xa4050126, 0x00 | ||
| 43 | EB 0xa4050128, 0xA0 | ||
| 44 | EB 0xa405012A, 0x10 | ||
| 45 | EB 0xa405012C, 0x00 | ||
| 46 | EB 0xa405012E, 0x00 | ||
| 47 | EB 0xa4050130, 0x00 | ||
| 48 | EB 0xa4050132, 0x00 | ||
| 49 | EB 0xa4050134, 0x01 | ||
| 50 | EB 0xa4050136, 0x40 | ||
| 51 | EB 0xa4050138, 0x00 | ||
| 52 | EB 0xa405013A, 0x00 | ||
| 53 | EB 0xa405013C, 0x00 | ||
| 54 | EB 0xa405013E, 0x20 | ||
| 55 | EB 0xa4050160, 0x00 | ||
| 56 | EB 0xa4050162, 0x40 | ||
| 57 | EB 0xa4050164, 0x03 | ||
| 58 | EB 0xa4050166, 0x00 | ||
| 59 | EB 0xa4050168, 0x00 | ||
| 60 | EB 0xa405016A, 0x00 | ||
| 61 | EB 0xa405016C, 0x00 | ||
| 62 | |||
| 63 | EW 0xa405014E, 0x5660 | ||
| 64 | EW 0xa4050150, 0x0145 | ||
| 65 | EW 0xa4050152, 0x1550 | ||
| 66 | EW 0xa4050154, 0x0200 | ||
| 67 | EW 0xa4050156, 0x0040 | ||
| 68 | |||
| 69 | EW 0xa4050158, 0x0000 | ||
| 70 | EW 0xa405015a, 0x0000 | ||
| 71 | EW 0xa405015c, 0x0000 | ||
| 72 | EW 0xa405015e, 0x0000 | ||
| 73 | |||
| 74 | EW 0xa4050180, 0x0000 | ||
| 75 | EW 0xa4050182, 0x8002 | ||
| 76 | EW 0xa4050184, 0x0000 | ||
| 77 | |||
| 78 | EW 0xa405018a, 0x9991 | ||
| 79 | EW 0xa405018c, 0x8011 | ||
| 80 | EW 0xa405018e, 0x9550 | ||
| 81 | |||
| 82 | EW 0xa4050100, 0x0000 | ||
| 83 | EW 0xa4050102, 0x5540 | ||
| 84 | EW 0xa4050104, 0x0000 | ||
| 85 | EW 0xa4050106, 0x0000 | ||
| 86 | EW 0xa4050108, 0x4550 | ||
| 87 | EW 0xa405010a, 0x0130 | ||
| 88 | EW 0xa405010c, 0x0555 | ||
| 89 | EW 0xa405010e, 0x0000 | ||
| 90 | EW 0xa4050110, 0x0000 | ||
| 91 | EW 0xa4050112, 0xAAA8 | ||
| 92 | EW 0xa4050114, 0x8305 | ||
| 93 | EW 0xa4050116, 0x10F0 | ||
| 94 | EW 0xa4050118, 0x0F50 | ||
| 95 | EW 0xa405011a, 0x0000 | ||
| 96 | EW 0xa405011c, 0x0000 | ||
| 97 | EW 0xa405011e, 0x0555 | ||
| 98 | EW 0xa4050140, 0x0000 | ||
| 99 | EW 0xa4050142, 0x5141 | ||
| 100 | EW 0xa4050144, 0x5005 | ||
| 101 | EW 0xa4050146, 0xAAA9 | ||
| 102 | EW 0xa4050148, 0xFAA9 | ||
| 103 | EW 0xa405014a, 0x3000 | ||
| 104 | EW 0xa405014c, 0x0000 | ||
| 105 | |||
| 106 | LIST "setup sdram" | ||
| 107 | ED 0xFD000108, 0x40000301 | ||
| 108 | ED 0xFD000020, 0x011B0002 | ||
| 109 | ED 0xFD000030, 0x03060E02 | ||
| 110 | ED 0xFD000034, 0x01020102 | ||
| 111 | ED 0xFD000038, 0x01090406 | ||
| 112 | ED 0xFD000008, 0x00000004 | ||
| 113 | ED 0xFD000040, 0x00000001 | ||
| 114 | ED 0xFD000040, 0x00000000 | ||
| 115 | ED 0xFD000018, 0x00000001 | ||
| 116 | |||
| 117 | WAIT 1 | ||
| 118 | |||
| 119 | ED 0xFD000014, 0x00000002 | ||
| 120 | ED 0xFD000060, 0x00000032 | ||
| 121 | ED 0xFD000060, 0x00020000 | ||
| 122 | ED 0xFD000014, 0x00000004 | ||
| 123 | ED 0xFD000014, 0x00000004 | ||
| 124 | ED 0xFD000010, 0x00000001 | ||
| 125 | ED 0xFD000044, 0x000004AF | ||
| 126 | ED 0xFD000048, 0x20CF0037 | ||
| 127 | |||
| 128 | LIST "read 16 bytes from sdram" | ||
| 129 | DD 0xa8000000, 0xa8000000, 1 | ||
| 130 | DD 0xa8000004, 0xa8000004, 1 | ||
| 131 | DD 0xa8000008, 0xa8000008, 1 | ||
| 132 | DD 0xa800000c, 0xa800000c, 1 | ||
| 133 | |||
| 134 | ED 0xFD000014, 0x00000002 | ||
| 135 | ED 0xFD000014, 0x00000004 | ||
| 136 | ED 0xFD000108, 0x40000300 | ||
| 137 | ED 0xFD000040, 0x00010000 | ||
| 138 | |||
| 139 | LIST "write to internal ram" | ||
| 140 | ED 0xfd8007fc, 0 | ||
| 141 | |||
| 142 | LIST "setup cache" | ||
| 143 | ED 0xff00001c, 0x0000090b | ||
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h new file mode 100644 index 000000000000..a110823f2bde --- /dev/null +++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* kfr2r09 board specific boot code: | ||
| 2 | * converts the "partner-jet-script.txt" script into assembly | ||
| 3 | * the assembly code is the first code to be executed in the romImage | ||
| 4 | */ | ||
| 5 | |||
| 6 | #include <asm/romimage-macros.h> | ||
| 7 | #include "partner-jet-setup.txt" | ||
| 8 | |||
| 9 | /* execute icbi after enabling cache */ | ||
| 10 | mov.l 1f, r0 | ||
| 11 | icbi @r0 | ||
| 12 | |||
| 13 | /* jump to cached area */ | ||
| 14 | mova 2f, r0 | ||
| 15 | jmp @r0 | ||
| 16 | nop | ||
| 17 | |||
| 18 | .align 2 | ||
| 19 | 1: .long 0xa8000000 | ||
| 20 | 2: | ||
diff --git a/arch/sh/include/mach-migor/mach/migor.h b/arch/sh/include/mach-migor/mach/migor.h new file mode 100644 index 000000000000..cee6cb88e020 --- /dev/null +++ b/arch/sh/include/mach-migor/mach/migor.h | |||
| @@ -0,0 +1,14 @@ | |||
| 1 | #ifndef __ASM_SH_MIGOR_H | ||
| 2 | #define __ASM_SH_MIGOR_H | ||
| 3 | |||
| 4 | #define PORT_MSELCRB 0xa4050182 | ||
| 5 | #define BSC_CS4BCR 0xfec10010 | ||
| 6 | #define BSC_CS6ABCR 0xfec1001c | ||
| 7 | #define BSC_CS4WCR 0xfec10030 | ||
| 8 | |||
| 9 | #include <video/sh_mobile_lcdc.h> | ||
| 10 | |||
| 11 | int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle, | ||
| 12 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); | ||
| 13 | |||
| 14 | #endif /* __ASM_SH_MIGOR_H */ | ||
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 349d833deab5..a2d0a40f3848 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile | |||
| @@ -1,5 +1,41 @@ | |||
| 1 | ifeq ($(CONFIG_SUPERH32),y) | 1 | # |
| 2 | include ${srctree}/arch/sh/kernel/Makefile_32 | 2 | # Makefile for the Linux/SuperH kernel. |
| 3 | else | 3 | # |
| 4 | include ${srctree}/arch/sh/kernel/Makefile_64 | 4 | |
| 5 | extra-y := head_$(BITS).o init_task.o vmlinux.lds | ||
| 6 | |||
| 7 | ifdef CONFIG_FUNCTION_TRACER | ||
| 8 | # Do not profile debug and lowlevel utilities | ||
| 9 | CFLAGS_REMOVE_ftrace.o = -pg | ||
| 5 | endif | 10 | endif |
| 11 | |||
| 12 | obj-y := debugtraps.o dumpstack.o idle.o io.o io_generic.o irq.o \ | ||
| 13 | machvec.o nmi_debug.o process_$(BITS).o ptrace_$(BITS).o \ | ||
| 14 | setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \ | ||
| 15 | syscalls_$(BITS).o time.o topology.o traps.o \ | ||
| 16 | traps_$(BITS).o unwinder.o | ||
| 17 | |||
| 18 | obj-y += cpu/ | ||
| 19 | obj-$(CONFIG_VSYSCALL) += vsyscall/ | ||
| 20 | obj-$(CONFIG_SMP) += smp.o | ||
| 21 | obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o | ||
| 22 | obj-$(CONFIG_KGDB) += kgdb.o | ||
| 23 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o | ||
| 24 | obj-$(CONFIG_MODULES) += sh_ksyms_$(BITS).o module.o | ||
| 25 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | ||
| 26 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | ||
| 27 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | ||
| 28 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | ||
| 29 | obj-$(CONFIG_IO_TRAPPED) += io_trapped.o | ||
| 30 | obj-$(CONFIG_KPROBES) += kprobes.o | ||
| 31 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o | ||
| 32 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o | ||
| 33 | obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o | ||
| 34 | obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o | ||
| 35 | obj-$(CONFIG_DUMP_CODE) += disassemble.o | ||
| 36 | obj-$(CONFIG_HIBERNATION) += swsusp.o | ||
| 37 | obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o | ||
| 38 | |||
| 39 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o | ||
| 40 | |||
| 41 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32 deleted file mode 100644 index 9411e3e31e68..000000000000 --- a/arch/sh/kernel/Makefile_32 +++ /dev/null | |||
| @@ -1,37 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the Linux/SuperH kernel. | ||
| 3 | # | ||
| 4 | |||
| 5 | extra-y := head_32.o init_task.o vmlinux.lds | ||
| 6 | |||
| 7 | ifdef CONFIG_FUNCTION_TRACER | ||
| 8 | # Do not profile debug and lowlevel utilities | ||
| 9 | CFLAGS_REMOVE_ftrace.o = -pg | ||
| 10 | endif | ||
| 11 | |||
| 12 | obj-y := debugtraps.o idle.o io.o io_generic.o irq.o \ | ||
| 13 | machvec.o process_32.o ptrace_32.o setup.o signal_32.o \ | ||
| 14 | sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o \ | ||
| 15 | traps.o traps_32.o | ||
| 16 | |||
| 17 | obj-y += cpu/ | ||
| 18 | obj-$(CONFIG_VSYSCALL) += vsyscall/ | ||
| 19 | obj-$(CONFIG_SMP) += smp.o | ||
| 20 | obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o | ||
| 21 | obj-$(CONFIG_KGDB) += kgdb.o | ||
| 22 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o | ||
| 23 | obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o | ||
| 24 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | ||
| 25 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | ||
| 26 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | ||
| 27 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | ||
| 28 | obj-$(CONFIG_IO_TRAPPED) += io_trapped.o | ||
| 29 | obj-$(CONFIG_KPROBES) += kprobes.o | ||
| 30 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o | ||
| 31 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o | ||
| 32 | obj-$(CONFIG_DUMP_CODE) += disassemble.o | ||
| 33 | obj-$(CONFIG_HIBERNATION) += swsusp.o | ||
| 34 | |||
| 35 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o | ||
| 36 | |||
| 37 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64 deleted file mode 100644 index 67b9f6c6326b..000000000000 --- a/arch/sh/kernel/Makefile_64 +++ /dev/null | |||
| @@ -1,19 +0,0 @@ | |||
| 1 | extra-y := head_64.o init_task.o vmlinux.lds | ||
| 2 | |||
| 3 | obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \ | ||
| 4 | ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \ | ||
| 5 | syscalls_64.o time.o topology.o traps.o traps_64.o | ||
| 6 | |||
| 7 | obj-y += cpu/ | ||
| 8 | obj-$(CONFIG_SMP) += smp.o | ||
| 9 | obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o | ||
| 10 | obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o | ||
| 11 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | ||
| 12 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | ||
| 13 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | ||
| 14 | obj-$(CONFIG_IO_TRAPPED) += io_trapped.o | ||
| 15 | obj-$(CONFIG_GENERIC_GPIO) += gpio.o | ||
| 16 | |||
| 17 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o | ||
| 18 | |||
| 19 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c index 99aceb28ee24..d218e808294e 100644 --- a/arch/sh/kernel/asm-offsets.c +++ b/arch/sh/kernel/asm-offsets.c | |||
| @@ -26,6 +26,7 @@ int main(void) | |||
| 26 | DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); | 26 | DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); |
| 27 | DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); | 27 | DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); |
| 28 | DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block)); | 28 | DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block)); |
| 29 | DEFINE(TI_SIZE, sizeof(struct thread_info)); | ||
| 29 | 30 | ||
| 30 | #ifdef CONFIG_HIBERNATION | 31 | #ifdef CONFIG_HIBERNATION |
| 31 | DEFINE(PBE_ADDRESS, offsetof(struct pbe, address)); | 32 | DEFINE(PBE_ADDRESS, offsetof(struct pbe, address)); |
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index eecad7cbd61e..3d6b9312dc47 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile | |||
| @@ -19,4 +19,4 @@ obj-$(CONFIG_UBC_WAKEUP) += ubc.o | |||
| 19 | obj-$(CONFIG_SH_ADC) += adc.o | 19 | obj-$(CONFIG_SH_ADC) += adc.o |
| 20 | obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o | 20 | obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o |
| 21 | 21 | ||
| 22 | obj-y += irq/ init.o clock.o | 22 | obj-y += irq/ init.o clock.o hwblk.o |
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c new file mode 100644 index 000000000000..c0ad7d46e784 --- /dev/null +++ b/arch/sh/kernel/cpu/hwblk.c | |||
| @@ -0,0 +1,155 @@ | |||
| 1 | #include <linux/clk.h> | ||
| 2 | #include <linux/compiler.h> | ||
| 3 | #include <linux/slab.h> | ||
| 4 | #include <linux/io.h> | ||
| 5 | #include <linux/spinlock.h> | ||
| 6 | #include <asm/suspend.h> | ||
| 7 | #include <asm/hwblk.h> | ||
| 8 | #include <asm/clock.h> | ||
| 9 | |||
| 10 | static DEFINE_SPINLOCK(hwblk_lock); | ||
| 11 | |||
| 12 | static void hwblk_area_mod_cnt(struct hwblk_info *info, | ||
| 13 | int area, int counter, int value, int goal) | ||
| 14 | { | ||
| 15 | struct hwblk_area *hap = info->areas + area; | ||
| 16 | |||
| 17 | hap->cnt[counter] += value; | ||
| 18 | |||
| 19 | if (hap->cnt[counter] != goal) | ||
| 20 | return; | ||
| 21 | |||
| 22 | if (hap->flags & HWBLK_AREA_FLAG_PARENT) | ||
| 23 | hwblk_area_mod_cnt(info, hap->parent, counter, value, goal); | ||
| 24 | } | ||
| 25 | |||
| 26 | |||
| 27 | static int __hwblk_mod_cnt(struct hwblk_info *info, int hwblk, | ||
| 28 | int counter, int value, int goal) | ||
| 29 | { | ||
| 30 | struct hwblk *hp = info->hwblks + hwblk; | ||
| 31 | |||
| 32 | hp->cnt[counter] += value; | ||
| 33 | if (hp->cnt[counter] == goal) | ||
| 34 | hwblk_area_mod_cnt(info, hp->area, counter, value, goal); | ||
| 35 | |||
| 36 | return hp->cnt[counter]; | ||
| 37 | } | ||
| 38 | |||
| 39 | static void hwblk_mod_cnt(struct hwblk_info *info, int hwblk, | ||
| 40 | int counter, int value, int goal) | ||
| 41 | { | ||
| 42 | unsigned long flags; | ||
| 43 | |||
| 44 | spin_lock_irqsave(&hwblk_lock, flags); | ||
| 45 | __hwblk_mod_cnt(info, hwblk, counter, value, goal); | ||
| 46 | spin_unlock_irqrestore(&hwblk_lock, flags); | ||
| 47 | } | ||
| 48 | |||
| 49 | void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int counter) | ||
| 50 | { | ||
| 51 | hwblk_mod_cnt(info, hwblk, counter, 1, 1); | ||
| 52 | } | ||
| 53 | |||
| 54 | void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int counter) | ||
| 55 | { | ||
| 56 | hwblk_mod_cnt(info, hwblk, counter, -1, 0); | ||
| 57 | } | ||
| 58 | |||
| 59 | void hwblk_enable(struct hwblk_info *info, int hwblk) | ||
| 60 | { | ||
| 61 | struct hwblk *hp = info->hwblks + hwblk; | ||
| 62 | unsigned long tmp; | ||
| 63 | unsigned long flags; | ||
| 64 | int ret; | ||
| 65 | |||
| 66 | spin_lock_irqsave(&hwblk_lock, flags); | ||
| 67 | |||
| 68 | ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, 1, 1); | ||
| 69 | if (ret == 1) { | ||
| 70 | tmp = __raw_readl(hp->mstp); | ||
| 71 | tmp &= ~(1 << hp->bit); | ||
| 72 | __raw_writel(tmp, hp->mstp); | ||
| 73 | } | ||
| 74 | |||
| 75 | spin_unlock_irqrestore(&hwblk_lock, flags); | ||
| 76 | } | ||
| 77 | |||
| 78 | void hwblk_disable(struct hwblk_info *info, int hwblk) | ||
| 79 | { | ||
| 80 | struct hwblk *hp = info->hwblks + hwblk; | ||
| 81 | unsigned long tmp; | ||
| 82 | unsigned long flags; | ||
| 83 | int ret; | ||
| 84 | |||
| 85 | spin_lock_irqsave(&hwblk_lock, flags); | ||
| 86 | |||
| 87 | ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, -1, 0); | ||
| 88 | if (ret == 0) { | ||
| 89 | tmp = __raw_readl(hp->mstp); | ||
| 90 | tmp |= 1 << hp->bit; | ||
| 91 | __raw_writel(tmp, hp->mstp); | ||
| 92 | } | ||
| 93 | |||
| 94 | spin_unlock_irqrestore(&hwblk_lock, flags); | ||
| 95 | } | ||
| 96 | |||
| 97 | struct hwblk_info *hwblk_info; | ||
| 98 | |||
| 99 | int __init hwblk_register(struct hwblk_info *info) | ||
| 100 | { | ||
| 101 | hwblk_info = info; | ||
| 102 | return 0; | ||
| 103 | } | ||
| 104 | |||
| 105 | int __init __weak arch_hwblk_init(void) | ||
| 106 | { | ||
| 107 | return 0; | ||
| 108 | } | ||
| 109 | |||
| 110 | int __weak arch_hwblk_sleep_mode(void) | ||
| 111 | { | ||
| 112 | return SUSP_SH_SLEEP; | ||
| 113 | } | ||
| 114 | |||
| 115 | int __init hwblk_init(void) | ||
| 116 | { | ||
| 117 | return arch_hwblk_init(); | ||
| 118 | } | ||
| 119 | |||
| 120 | /* allow clocks to enable and disable hardware blocks */ | ||
| 121 | static int sh_hwblk_clk_enable(struct clk *clk) | ||
| 122 | { | ||
| 123 | if (!hwblk_info) | ||
| 124 | return -ENOENT; | ||
| 125 | |||
| 126 | hwblk_enable(hwblk_info, clk->arch_flags); | ||
| 127 | return 0; | ||
| 128 | } | ||
| 129 | |||
| 130 | static void sh_hwblk_clk_disable(struct clk *clk) | ||
| 131 | { | ||
| 132 | if (hwblk_info) | ||
| 133 | hwblk_disable(hwblk_info, clk->arch_flags); | ||
| 134 | } | ||
| 135 | |||
| 136 | static struct clk_ops sh_hwblk_clk_ops = { | ||
| 137 | .enable = sh_hwblk_clk_enable, | ||
| 138 | .disable = sh_hwblk_clk_disable, | ||
| 139 | .recalc = followparent_recalc, | ||
| 140 | }; | ||
| 141 | |||
| 142 | int __init sh_hwblk_clk_register(struct clk *clks, int nr) | ||
| 143 | { | ||
| 144 | struct clk *clkp; | ||
| 145 | int ret = 0; | ||
| 146 | int k; | ||
| 147 | |||
| 148 | for (k = 0; !ret && (k < nr); k++) { | ||
| 149 | clkp = clks + k; | ||
| 150 | clkp->ops = &sh_hwblk_clk_ops; | ||
| 151 | ret |= clk_register(clkp); | ||
| 152 | } | ||
| 153 | |||
| 154 | return ret; | ||
| 155 | } | ||
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index ad85421099cd..e932ebef4738 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * | 3 | * |
| 4 | * CPU init code | 4 | * CPU init code |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2002 - 2007 Paul Mundt | 6 | * Copyright (C) 2002 - 2009 Paul Mundt |
| 7 | * Copyright (C) 2003 Richard Curnow | 7 | * Copyright (C) 2003 Richard Curnow |
| 8 | * | 8 | * |
| 9 | * This file is subject to the terms and conditions of the GNU General Public | 9 | * This file is subject to the terms and conditions of the GNU General Public |
| @@ -62,6 +62,37 @@ static void __init speculative_execution_init(void) | |||
| 62 | #define speculative_execution_init() do { } while (0) | 62 | #define speculative_execution_init() do { } while (0) |
| 63 | #endif | 63 | #endif |
| 64 | 64 | ||
| 65 | #ifdef CONFIG_CPU_SH4A | ||
| 66 | #define EXPMASK 0xff2f0004 | ||
| 67 | #define EXPMASK_RTEDS (1 << 0) | ||
| 68 | #define EXPMASK_BRDSSLP (1 << 1) | ||
| 69 | #define EXPMASK_MMCAW (1 << 4) | ||
| 70 | |||
| 71 | static void __init expmask_init(void) | ||
| 72 | { | ||
| 73 | unsigned long expmask = __raw_readl(EXPMASK); | ||
| 74 | |||
| 75 | /* | ||
| 76 | * Future proofing. | ||
| 77 | * | ||
| 78 | * Disable support for slottable sleep instruction | ||
| 79 | * and non-nop instructions in the rte delay slot. | ||
| 80 | */ | ||
| 81 | expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP); | ||
| 82 | |||
| 83 | /* | ||
| 84 | * Enable associative writes to the memory-mapped cache array | ||
| 85 | * until the cache flush ops have been rewritten. | ||
| 86 | */ | ||
| 87 | expmask |= EXPMASK_MMCAW; | ||
| 88 | |||
| 89 | __raw_writel(expmask, EXPMASK); | ||
| 90 | ctrl_barrier(); | ||
| 91 | } | ||
| 92 | #else | ||
| 93 | #define expmask_init() do { } while (0) | ||
| 94 | #endif | ||
| 95 | |||
| 65 | /* 2nd-level cache init */ | 96 | /* 2nd-level cache init */ |
| 66 | void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void) | 97 | void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void) |
| 67 | { | 98 | { |
| @@ -268,11 +299,9 @@ asmlinkage void __init sh_cpu_init(void) | |||
| 268 | cache_init(); | 299 | cache_init(); |
| 269 | 300 | ||
| 270 | if (raw_smp_processor_id() == 0) { | 301 | if (raw_smp_processor_id() == 0) { |
| 271 | #ifdef CONFIG_MMU | ||
| 272 | shm_align_mask = max_t(unsigned long, | 302 | shm_align_mask = max_t(unsigned long, |
| 273 | current_cpu_data.dcache.way_size - 1, | 303 | current_cpu_data.dcache.way_size - 1, |
| 274 | PAGE_SIZE - 1); | 304 | PAGE_SIZE - 1); |
| 275 | #endif | ||
| 276 | 305 | ||
| 277 | /* Boot CPU sets the cache shape */ | 306 | /* Boot CPU sets the cache shape */ |
| 278 | detect_cache_shape(); | 307 | detect_cache_shape(); |
| @@ -321,4 +350,5 @@ asmlinkage void __init sh_cpu_init(void) | |||
| 321 | #endif | 350 | #endif |
| 322 | 351 | ||
| 323 | speculative_execution_init(); | 352 | speculative_execution_init(); |
| 353 | expmask_init(); | ||
| 324 | } | 354 | } |
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index 808d99a48efb..c1508a90fc6a 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c | |||
| @@ -35,6 +35,7 @@ static void disable_ipr_irq(unsigned int irq) | |||
| 35 | unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx]; | 35 | unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx]; |
| 36 | /* Set the priority in IPR to 0 */ | 36 | /* Set the priority in IPR to 0 */ |
| 37 | __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); | 37 | __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); |
| 38 | (void)__raw_readw(addr); /* Read back to flush write posting */ | ||
| 38 | } | 39 | } |
| 39 | 40 | ||
| 40 | static void enable_ipr_irq(unsigned int irq) | 41 | static void enable_ipr_irq(unsigned int irq) |
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S index becc54c45692..c8a4331d9b8d 100644 --- a/arch/sh/kernel/cpu/sh2/entry.S +++ b/arch/sh/kernel/cpu/sh2/entry.S | |||
| @@ -227,8 +227,9 @@ ENTRY(sh_bios_handler) | |||
| 227 | mov.l @r15+, r14 | 227 | mov.l @r15+, r14 |
| 228 | add #8,r15 | 228 | add #8,r15 |
| 229 | lds.l @r15+, pr | 229 | lds.l @r15+, pr |
| 230 | mov.l @r15+,r15 | ||
| 230 | rte | 231 | rte |
| 231 | mov.l @r15+,r15 | 232 | nop |
| 232 | .align 2 | 233 | .align 2 |
| 233 | 1: .long gdb_vbr_vector | 234 | 1: .long gdb_vbr_vector |
| 234 | #endif /* CONFIG_SH_STANDARD_BIOS */ | 235 | #endif /* CONFIG_SH_STANDARD_BIOS */ |
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c index 5916d9096b99..1db6d8883888 100644 --- a/arch/sh/kernel/cpu/sh2/probe.c +++ b/arch/sh/kernel/cpu/sh2/probe.c | |||
| @@ -29,6 +29,7 @@ int __init detect_cpu_and_cache_system(void) | |||
| 29 | */ | 29 | */ |
| 30 | boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; | 30 | boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; |
| 31 | boot_cpu_data.icache = boot_cpu_data.dcache; | 31 | boot_cpu_data.icache = boot_cpu_data.dcache; |
| 32 | boot_cpu_data.family = CPU_FAMILY_SH2; | ||
| 32 | 33 | ||
| 33 | return 0; | 34 | return 0; |
| 34 | } | 35 | } |
diff --git a/arch/sh/kernel/cpu/sh2a/entry.S b/arch/sh/kernel/cpu/sh2a/entry.S index ab3903eeda5c..222742ddc0d6 100644 --- a/arch/sh/kernel/cpu/sh2a/entry.S +++ b/arch/sh/kernel/cpu/sh2a/entry.S | |||
| @@ -176,8 +176,9 @@ ENTRY(sh_bios_handler) | |||
| 176 | movml.l @r15+,r14 | 176 | movml.l @r15+,r14 |
| 177 | add #8,r15 | 177 | add #8,r15 |
| 178 | lds.l @r15+, pr | 178 | lds.l @r15+, pr |
| 179 | mov.l @r15+,r15 | ||
| 179 | rte | 180 | rte |
| 180 | mov.l @r15+,r15 | 181 | nop |
| 181 | .align 2 | 182 | .align 2 |
| 182 | 1: .long gdb_vbr_vector | 183 | 1: .long gdb_vbr_vector |
| 183 | #endif /* CONFIG_SH_STANDARD_BIOS */ | 184 | #endif /* CONFIG_SH_STANDARD_BIOS */ |
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c index e098e2f6aa08..6825d6507164 100644 --- a/arch/sh/kernel/cpu/sh2a/probe.c +++ b/arch/sh/kernel/cpu/sh2a/probe.c | |||
| @@ -15,6 +15,8 @@ | |||
| 15 | 15 | ||
| 16 | int __init detect_cpu_and_cache_system(void) | 16 | int __init detect_cpu_and_cache_system(void) |
| 17 | { | 17 | { |
| 18 | boot_cpu_data.family = CPU_FAMILY_SH2A; | ||
| 19 | |||
| 18 | /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ | 20 | /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ |
| 19 | boot_cpu_data.flags |= CPU_HAS_OP32; | 21 | boot_cpu_data.flags |= CPU_HAS_OP32; |
| 20 | 22 | ||
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c index fa30b6017730..e8749505bd2a 100644 --- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c +++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c | |||
| @@ -22,13 +22,6 @@ static int stc_multipliers[] = { 1, 2, 4, 8, 3, 6, 1, 1 }; | |||
| 22 | static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 }; | 22 | static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 }; |
| 23 | static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; | 23 | static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; |
| 24 | 24 | ||
| 25 | static void set_bus_parent(struct clk *clk) | ||
| 26 | { | ||
| 27 | struct clk *bus_clk = clk_get(NULL, "bus_clk"); | ||
| 28 | clk->parent = bus_clk; | ||
| 29 | clk_put(bus_clk); | ||
| 30 | } | ||
| 31 | |||
| 32 | static void master_clk_init(struct clk *clk) | 25 | static void master_clk_init(struct clk *clk) |
| 33 | { | 26 | { |
| 34 | int frqcr = ctrl_inw(FRQCR); | 27 | int frqcr = ctrl_inw(FRQCR); |
| @@ -50,9 +43,6 @@ static unsigned long module_clk_recalc(struct clk *clk) | |||
| 50 | } | 43 | } |
| 51 | 44 | ||
| 52 | static struct clk_ops sh7709_module_clk_ops = { | 45 | static struct clk_ops sh7709_module_clk_ops = { |
| 53 | #ifdef CLOCK_MODE_0_1_2_7 | ||
| 54 | .init = set_bus_parent, | ||
| 55 | #endif | ||
| 56 | .recalc = module_clk_recalc, | 46 | .recalc = module_clk_recalc, |
| 57 | }; | 47 | }; |
| 58 | 48 | ||
| @@ -78,7 +68,6 @@ static unsigned long cpu_clk_recalc(struct clk *clk) | |||
| 78 | } | 68 | } |
| 79 | 69 | ||
| 80 | static struct clk_ops sh7709_cpu_clk_ops = { | 70 | static struct clk_ops sh7709_cpu_clk_ops = { |
| 81 | .init = set_bus_parent, | ||
| 82 | .recalc = cpu_clk_recalc, | 71 | .recalc = cpu_clk_recalc, |
| 83 | }; | 72 | }; |
| 84 | 73 | ||
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S index 3cb531f233f2..0151933e5253 100644 --- a/arch/sh/kernel/cpu/sh3/entry.S +++ b/arch/sh/kernel/cpu/sh3/entry.S | |||
| @@ -53,10 +53,6 @@ | |||
| 53 | * syscall # | 53 | * syscall # |
| 54 | * | 54 | * |
| 55 | */ | 55 | */ |
| 56 | #if defined(CONFIG_KGDB) | ||
| 57 | NMI_VEC = 0x1c0 ! Must catch early for debounce | ||
| 58 | #endif | ||
| 59 | |||
| 60 | /* Offsets to the stack */ | 56 | /* Offsets to the stack */ |
| 61 | OFF_R0 = 0 /* Return value. New ABI also arg4 */ | 57 | OFF_R0 = 0 /* Return value. New ABI also arg4 */ |
| 62 | OFF_R1 = 4 /* New ABI: arg5 */ | 58 | OFF_R1 = 4 /* New ABI: arg5 */ |
| @@ -71,7 +67,6 @@ OFF_PC = (16*4) | |||
| 71 | OFF_SR = (16*4+8) | 67 | OFF_SR = (16*4+8) |
| 72 | OFF_TRA = (16*4+6*4) | 68 | OFF_TRA = (16*4+6*4) |
| 73 | 69 | ||
| 74 | |||
| 75 | #define k0 r0 | 70 | #define k0 r0 |
| 76 | #define k1 r1 | 71 | #define k1 r1 |
| 77 | #define k2 r2 | 72 | #define k2 r2 |
| @@ -113,34 +108,34 @@ OFF_TRA = (16*4+6*4) | |||
| 113 | #if defined(CONFIG_MMU) | 108 | #if defined(CONFIG_MMU) |
| 114 | .align 2 | 109 | .align 2 |
| 115 | ENTRY(tlb_miss_load) | 110 | ENTRY(tlb_miss_load) |
| 116 | bra call_dpf | 111 | bra call_handle_tlbmiss |
| 117 | mov #0, r5 | 112 | mov #0, r5 |
| 118 | 113 | ||
| 119 | .align 2 | 114 | .align 2 |
| 120 | ENTRY(tlb_miss_store) | 115 | ENTRY(tlb_miss_store) |
| 121 | bra call_dpf | 116 | bra call_handle_tlbmiss |
| 122 | mov #1, r5 | 117 | mov #1, r5 |
| 123 | 118 | ||
| 124 | .align 2 | 119 | .align 2 |
| 125 | ENTRY(initial_page_write) | 120 | ENTRY(initial_page_write) |
| 126 | bra call_dpf | 121 | bra call_handle_tlbmiss |
| 127 | mov #1, r5 | 122 | mov #2, r5 |
| 128 | 123 | ||
| 129 | .align 2 | 124 | .align 2 |
| 130 | ENTRY(tlb_protection_violation_load) | 125 | ENTRY(tlb_protection_violation_load) |
| 131 | bra call_dpf | 126 | bra call_do_page_fault |
| 132 | mov #0, r5 | 127 | mov #0, r5 |
| 133 | 128 | ||
| 134 | .align 2 | 129 | .align 2 |
| 135 | ENTRY(tlb_protection_violation_store) | 130 | ENTRY(tlb_protection_violation_store) |
| 136 | bra call_dpf | 131 | bra call_do_page_fault |
| 137 | mov #1, r5 | 132 | mov #1, r5 |
| 138 | 133 | ||
| 139 | call_dpf: | 134 | call_handle_tlbmiss: |
| 135 | setup_frame_reg | ||
| 140 | mov.l 1f, r0 | 136 | mov.l 1f, r0 |
| 141 | mov r5, r8 | 137 | mov r5, r8 |
| 142 | mov.l @r0, r6 | 138 | mov.l @r0, r6 |
| 143 | mov r6, r9 | ||
| 144 | mov.l 2f, r0 | 139 | mov.l 2f, r0 |
| 145 | sts pr, r10 | 140 | sts pr, r10 |
| 146 | jsr @r0 | 141 | jsr @r0 |
| @@ -151,16 +146,25 @@ call_dpf: | |||
| 151 | lds r10, pr | 146 | lds r10, pr |
| 152 | rts | 147 | rts |
| 153 | nop | 148 | nop |
| 154 | 0: mov.l 3f, r0 | 149 | 0: |
| 155 | mov r9, r6 | ||
| 156 | mov r8, r5 | 150 | mov r8, r5 |
| 151 | call_do_page_fault: | ||
| 152 | mov.l 1f, r0 | ||
| 153 | mov.l @r0, r6 | ||
| 154 | |||
| 155 | sti | ||
| 156 | |||
| 157 | mov.l 3f, r0 | ||
| 158 | mov.l 4f, r1 | ||
| 159 | mov r15, r4 | ||
| 157 | jmp @r0 | 160 | jmp @r0 |
| 158 | mov r15, r4 | 161 | lds r1, pr |
| 159 | 162 | ||
| 160 | .align 2 | 163 | .align 2 |
| 161 | 1: .long MMU_TEA | 164 | 1: .long MMU_TEA |
| 162 | 2: .long __do_page_fault | 165 | 2: .long handle_tlbmiss |
| 163 | 3: .long do_page_fault | 166 | 3: .long do_page_fault |
| 167 | 4: .long ret_from_exception | ||
| 164 | 168 | ||
| 165 | .align 2 | 169 | .align 2 |
| 166 | ENTRY(address_error_load) | 170 | ENTRY(address_error_load) |
| @@ -256,7 +260,7 @@ restore_all: | |||
| 256 | ! | 260 | ! |
| 257 | ! Calculate new SR value | 261 | ! Calculate new SR value |
| 258 | mov k3, k2 ! original SR value | 262 | mov k3, k2 ! original SR value |
| 259 | mov #0xf0, k1 | 263 | mov #0xfffffff0, k1 |
| 260 | extu.b k1, k1 | 264 | extu.b k1, k1 |
| 261 | not k1, k1 | 265 | not k1, k1 |
| 262 | and k1, k2 ! Mask original SR value | 266 | and k1, k2 ! Mask original SR value |
| @@ -272,21 +276,12 @@ restore_all: | |||
| 272 | 6: or k0, k2 ! Set the IMASK-bits | 276 | 6: or k0, k2 ! Set the IMASK-bits |
| 273 | ldc k2, ssr | 277 | ldc k2, ssr |
| 274 | ! | 278 | ! |
| 275 | #if defined(CONFIG_KGDB) | ||
| 276 | ! Clear in_nmi | ||
| 277 | mov.l 6f, k0 | ||
| 278 | mov #0, k1 | ||
| 279 | mov.b k1, @k0 | ||
| 280 | #endif | ||
| 281 | mov k4, r15 | 279 | mov k4, r15 |
| 282 | rte | 280 | rte |
| 283 | nop | 281 | nop |
| 284 | 282 | ||
| 285 | .align 2 | 283 | .align 2 |
| 286 | 5: .long 0x00001000 ! DSP | 284 | 5: .long 0x00001000 ! DSP |
| 287 | #ifdef CONFIG_KGDB | ||
| 288 | 6: .long in_nmi | ||
| 289 | #endif | ||
| 290 | 7: .long 0x30000000 | 285 | 7: .long 0x30000000 |
| 291 | 286 | ||
| 292 | ! common exception handler | 287 | ! common exception handler |
| @@ -478,23 +473,6 @@ ENTRY(save_low_regs) | |||
| 478 | ! | 473 | ! |
| 479 | .balign 512,0,512 | 474 | .balign 512,0,512 |
| 480 | ENTRY(handle_interrupt) | 475 | ENTRY(handle_interrupt) |
| 481 | #if defined(CONFIG_KGDB) | ||
| 482 | mov.l 2f, k2 | ||
| 483 | ! Debounce (filter nested NMI) | ||
| 484 | mov.l @k2, k0 | ||
| 485 | mov.l 9f, k1 | ||
| 486 | cmp/eq k1, k0 | ||
| 487 | bf 11f | ||
| 488 | mov.l 10f, k1 | ||
| 489 | tas.b @k1 | ||
| 490 | bt 11f | ||
| 491 | rte | ||
| 492 | nop | ||
| 493 | .align 2 | ||
| 494 | 9: .long NMI_VEC | ||
| 495 | 10: .long in_nmi | ||
| 496 | 11: | ||
| 497 | #endif /* defined(CONFIG_KGDB) */ | ||
| 498 | sts pr, k3 ! save original pr value in k3 | 476 | sts pr, k3 ! save original pr value in k3 |
| 499 | mova exception_data, k0 | 477 | mova exception_data, k0 |
| 500 | 478 | ||
| @@ -507,13 +485,49 @@ ENTRY(handle_interrupt) | |||
| 507 | bsr save_regs ! needs original pr value in k3 | 485 | bsr save_regs ! needs original pr value in k3 |
| 508 | mov #-1, k2 ! default vector kept in k2 | 486 | mov #-1, k2 ! default vector kept in k2 |
| 509 | 487 | ||
| 488 | setup_frame_reg | ||
| 489 | |||
| 490 | stc sr, r0 ! get status register | ||
| 491 | shlr2 r0 | ||
| 492 | and #0x3c, r0 | ||
| 493 | cmp/eq #0x3c, r0 | ||
| 494 | bf 9f | ||
| 495 | TRACE_IRQS_OFF | ||
| 496 | 9: | ||
| 497 | |||
| 510 | ! Setup return address and jump to do_IRQ | 498 | ! Setup return address and jump to do_IRQ |
| 511 | mov.l 4f, r9 ! fetch return address | 499 | mov.l 4f, r9 ! fetch return address |
| 512 | lds r9, pr ! put return address in pr | 500 | lds r9, pr ! put return address in pr |
| 513 | mov.l 2f, r4 | 501 | mov.l 2f, r4 |
| 514 | mov.l 3f, r9 | 502 | mov.l 3f, r9 |
| 515 | mov.l @r4, r4 ! pass INTEVT vector as arg0 | 503 | mov.l @r4, r4 ! pass INTEVT vector as arg0 |
| 504 | |||
| 505 | shlr2 r4 | ||
| 506 | shlr r4 | ||
| 507 | mov r4, r0 ! save vector->jmp table offset for later | ||
| 508 | |||
| 509 | shlr2 r4 ! vector to IRQ# conversion | ||
| 510 | add #-0x10, r4 | ||
| 511 | |||
| 512 | cmp/pz r4 ! is it a valid IRQ? | ||
| 513 | bt 10f | ||
| 514 | |||
| 515 | /* | ||
| 516 | * We got here as a result of taking the INTEVT path for something | ||
| 517 | * that isn't a valid hard IRQ, therefore we bypass the do_IRQ() | ||
| 518 | * path and special case the event dispatch instead. This is the | ||
| 519 | * expected path for the NMI (and any other brilliantly implemented | ||
| 520 | * exception), which effectively wants regular exception dispatch | ||
| 521 | * but is unfortunately reported through INTEVT rather than | ||
| 522 | * EXPEVT. Grr. | ||
| 523 | */ | ||
| 524 | mov.l 6f, r9 | ||
| 525 | mov.l @(r0, r9), r9 | ||
| 516 | jmp @r9 | 526 | jmp @r9 |
| 527 | mov r15, r8 ! trap handlers take saved regs in r8 | ||
| 528 | |||
| 529 | 10: | ||
| 530 | jmp @r9 ! Off to do_IRQ() we go. | ||
| 517 | mov r15, r5 ! pass saved registers as arg1 | 531 | mov r15, r5 ! pass saved registers as arg1 |
| 518 | 532 | ||
| 519 | ENTRY(exception_none) | 533 | ENTRY(exception_none) |
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index e5a0de39a2db..46610c35c232 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S | |||
| @@ -48,9 +48,7 @@ ENTRY(exception_handling_table) | |||
| 48 | .long system_call ! Unconditional Trap /* 160 */ | 48 | .long system_call ! Unconditional Trap /* 160 */ |
| 49 | .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ | 49 | .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ |
| 50 | .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ | 50 | .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ |
| 51 | ENTRY(nmi_slot) | 51 | .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger |
| 52 | .long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger | ||
| 53 | ENTRY(user_break_point_trap) | ||
| 54 | .long break_point_trap /* 1E0 */ | 52 | .long break_point_trap /* 1E0 */ |
| 55 | 53 | ||
| 56 | /* | 54 | /* |
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c index 10f2a760c5ee..f9c7df64eb01 100644 --- a/arch/sh/kernel/cpu/sh3/probe.c +++ b/arch/sh/kernel/cpu/sh3/probe.c | |||
| @@ -107,5 +107,7 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void) | |||
| 107 | boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; | 107 | boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; |
| 108 | boot_cpu_data.icache = boot_cpu_data.dcache; | 108 | boot_cpu_data.icache = boot_cpu_data.dcache; |
| 109 | 109 | ||
| 110 | boot_cpu_data.family = CPU_FAMILY_SH3; | ||
| 111 | |||
| 110 | return 0; | 112 | return 0; |
| 111 | } | 113 | } |
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 6c78d0a9c857..d36f0c45f55f 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c | |||
| @@ -57,8 +57,12 @@ int __init detect_cpu_and_cache_system(void) | |||
| 57 | * Setup some generic flags we can probe on SH-4A parts | 57 | * Setup some generic flags we can probe on SH-4A parts |
| 58 | */ | 58 | */ |
| 59 | if (((pvr >> 16) & 0xff) == 0x10) { | 59 | if (((pvr >> 16) & 0xff) == 0x10) { |
| 60 | if ((cvr & 0x10000000) == 0) | 60 | boot_cpu_data.family = CPU_FAMILY_SH4A; |
| 61 | |||
| 62 | if ((cvr & 0x10000000) == 0) { | ||
| 61 | boot_cpu_data.flags |= CPU_HAS_DSP; | 63 | boot_cpu_data.flags |= CPU_HAS_DSP; |
| 64 | boot_cpu_data.family = CPU_FAMILY_SH4AL_DSP; | ||
| 65 | } | ||
| 62 | 66 | ||
| 63 | boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER; | 67 | boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER; |
| 64 | boot_cpu_data.cut_major = pvr & 0x7f; | 68 | boot_cpu_data.cut_major = pvr & 0x7f; |
| @@ -68,6 +72,7 @@ int __init detect_cpu_and_cache_system(void) | |||
| 68 | } else { | 72 | } else { |
| 69 | /* And some SH-4 defaults.. */ | 73 | /* And some SH-4 defaults.. */ |
| 70 | boot_cpu_data.flags |= CPU_HAS_PTEA; | 74 | boot_cpu_data.flags |= CPU_HAS_PTEA; |
| 75 | boot_cpu_data.family = CPU_FAMILY_SH4; | ||
| 71 | } | 76 | } |
| 72 | 77 | ||
| 73 | /* FPU detection works for everyone */ | 78 | /* FPU detection works for everyone */ |
| @@ -139,8 +144,15 @@ int __init detect_cpu_and_cache_system(void) | |||
| 139 | } | 144 | } |
| 140 | break; | 145 | break; |
| 141 | case 0x300b: | 146 | case 0x300b: |
| 142 | boot_cpu_data.type = CPU_SH7724; | 147 | switch (prr) { |
| 143 | boot_cpu_data.flags |= CPU_HAS_L2_CACHE; | 148 | case 0x20: |
| 149 | boot_cpu_data.type = CPU_SH7724; | ||
| 150 | boot_cpu_data.flags |= CPU_HAS_L2_CACHE; | ||
| 151 | break; | ||
| 152 | case 0x50: | ||
| 153 | boot_cpu_data.type = CPU_SH7757; | ||
| 154 | break; | ||
| 155 | } | ||
| 144 | break; | 156 | break; |
| 145 | case 0x4000: /* 1st cut */ | 157 | case 0x4000: /* 1st cut */ |
| 146 | case 0x4001: /* 2nd cut */ | 158 | case 0x4001: /* 2nd cut */ |
| @@ -173,9 +185,6 @@ int __init detect_cpu_and_cache_system(void) | |||
| 173 | boot_cpu_data.dcache.ways = 2; | 185 | boot_cpu_data.dcache.ways = 2; |
| 174 | 186 | ||
| 175 | break; | 187 | break; |
| 176 | default: | ||
| 177 | boot_cpu_data.type = CPU_SH_NONE; | ||
| 178 | break; | ||
| 179 | } | 188 | } |
| 180 | 189 | ||
| 181 | /* | 190 | /* |
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index ebdd391d5f42..490d5dc9e372 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | # CPU subtype setup | 5 | # CPU subtype setup |
| 6 | obj-$(CONFIG_CPU_SUBTYPE_SH7757) += setup-sh7757.o | ||
| 6 | obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o | 7 | obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o |
| 7 | obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o | 8 | obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o |
| 8 | obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o | 9 | obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o |
| @@ -19,15 +20,16 @@ obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o | |||
| 19 | smp-$(CONFIG_CPU_SHX3) := smp-shx3.o | 20 | smp-$(CONFIG_CPU_SHX3) := smp-shx3.o |
| 20 | 21 | ||
| 21 | # Primary on-chip clocks (common) | 22 | # Primary on-chip clocks (common) |
| 23 | clock-$(CONFIG_CPU_SUBTYPE_SH7757) := clock-sh7757.o | ||
| 22 | clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o | 24 | clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o |
| 23 | clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o | 25 | clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o |
| 24 | clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o | 26 | clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o |
| 25 | clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o | 27 | clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o |
| 26 | clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o | 28 | clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o |
| 27 | clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o | 29 | clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o |
| 28 | clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o | 30 | clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o |
| 29 | clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o | 31 | clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o |
| 30 | clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o | 32 | clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o hwblk-sh7724.o |
| 31 | clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o | 33 | clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o |
| 32 | clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o | 34 | clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o |
| 33 | 35 | ||
| @@ -35,6 +37,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o | |||
| 35 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7722) := pinmux-sh7722.o | 37 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7722) := pinmux-sh7722.o |
| 36 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7723) := pinmux-sh7723.o | 38 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7723) := pinmux-sh7723.o |
| 37 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7724) := pinmux-sh7724.o | 39 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7724) := pinmux-sh7724.o |
| 40 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7757) := pinmux-sh7757.o | ||
| 38 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o | 41 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o |
| 39 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o | 42 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o |
| 40 | 43 | ||
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index 40f859354f79..ea38b554dc05 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | #include <asm/clock.h> | 24 | #include <asm/clock.h> |
| 25 | #include <asm/hwblk.h> | ||
| 26 | #include <cpu/sh7722.h> | ||
| 25 | 27 | ||
| 26 | /* SH7722 registers */ | 28 | /* SH7722 registers */ |
| 27 | #define FRQCR 0xa4150000 | 29 | #define FRQCR 0xa4150000 |
| @@ -30,9 +32,6 @@ | |||
| 30 | #define SCLKBCR 0xa415000c | 32 | #define SCLKBCR 0xa415000c |
| 31 | #define IRDACLKCR 0xa4150018 | 33 | #define IRDACLKCR 0xa4150018 |
| 32 | #define PLLCR 0xa4150024 | 34 | #define PLLCR 0xa4150024 |
| 33 | #define MSTPCR0 0xa4150030 | ||
| 34 | #define MSTPCR1 0xa4150034 | ||
| 35 | #define MSTPCR2 0xa4150038 | ||
| 36 | #define DLLFRQ 0xa4150050 | 35 | #define DLLFRQ 0xa4150050 |
| 37 | 36 | ||
| 38 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ | 37 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ |
| @@ -140,35 +139,37 @@ struct clk div6_clks[] = { | |||
| 140 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | 139 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), |
| 141 | }; | 140 | }; |
| 142 | 141 | ||
| 143 | #define MSTP(_str, _parent, _reg, _bit, _flags) \ | 142 | #define R_CLK &r_clk |
| 144 | SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags) | 143 | #define P_CLK &div4_clks[DIV4_P] |
| 144 | #define B_CLK &div4_clks[DIV4_B] | ||
| 145 | #define U_CLK &div4_clks[DIV4_U] | ||
| 145 | 146 | ||
| 146 | static struct clk mstp_clks[] = { | 147 | static struct clk mstp_clks[] = { |
| 147 | MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT), | 148 | SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT), |
| 148 | MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT), | 149 | SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT), |
| 149 | MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0), | 150 | SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0), |
| 150 | MSTP("cmt0", &r_clk, MSTPCR0, 14, 0), | 151 | SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), |
| 151 | MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0), | 152 | SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), |
| 152 | MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0), | 153 | SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), |
| 153 | MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0), | 154 | SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), |
| 154 | MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0), | 155 | SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), |
| 155 | MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0), | 156 | SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), |
| 156 | 157 | ||
| 157 | MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0), | 158 | SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0), |
| 158 | MSTP("rtc0", &r_clk, MSTPCR1, 8, 0), | 159 | SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), |
| 159 | 160 | ||
| 160 | MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0), | 161 | SH_HWBLK_CLK("sdhi0", -1, P_CLK, HWBLK_SDHI, 0), |
| 161 | MSTP("keysc0", &r_clk, MSTPCR2, 14, 0), | 162 | SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0), |
| 162 | MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0), | 163 | SH_HWBLK_CLK("usbf0", -1, P_CLK, HWBLK_USBF, 0), |
| 163 | MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 9, 0), | 164 | SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), |
| 164 | MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0), | 165 | SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0), |
| 165 | MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0), | 166 | SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), |
| 166 | MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT), | 167 | SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0), |
| 167 | MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0), | 168 | SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0), |
| 168 | MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0), | 169 | SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0), |
| 169 | MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT), | 170 | SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, 0), |
| 170 | MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT), | 171 | SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0), |
| 171 | MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), | 172 | SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0), |
| 172 | }; | 173 | }; |
| 173 | 174 | ||
| 174 | int __init arch_clk_init(void) | 175 | int __init arch_clk_init(void) |
| @@ -191,7 +192,7 @@ int __init arch_clk_init(void) | |||
| 191 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 192 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); |
| 192 | 193 | ||
| 193 | if (!ret) | 194 | if (!ret) |
| 194 | ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 195 | ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); |
| 195 | 196 | ||
| 196 | return ret; | 197 | return ret; |
| 197 | } | 198 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c index e67c2678b8ae..20a31c2255a8 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | #include <asm/clock.h> | 24 | #include <asm/clock.h> |
| 25 | #include <asm/hwblk.h> | ||
| 26 | #include <cpu/sh7723.h> | ||
| 25 | 27 | ||
| 26 | /* SH7723 registers */ | 28 | /* SH7723 registers */ |
| 27 | #define FRQCR 0xa4150000 | 29 | #define FRQCR 0xa4150000 |
| @@ -30,9 +32,6 @@ | |||
| 30 | #define SCLKBCR 0xa415000c | 32 | #define SCLKBCR 0xa415000c |
| 31 | #define IRDACLKCR 0xa4150018 | 33 | #define IRDACLKCR 0xa4150018 |
| 32 | #define PLLCR 0xa4150024 | 34 | #define PLLCR 0xa4150024 |
| 33 | #define MSTPCR0 0xa4150030 | ||
| 34 | #define MSTPCR1 0xa4150034 | ||
| 35 | #define MSTPCR2 0xa4150038 | ||
| 36 | #define DLLFRQ 0xa4150050 | 35 | #define DLLFRQ 0xa4150050 |
| 37 | 36 | ||
| 38 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ | 37 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ |
| @@ -140,60 +139,64 @@ struct clk div6_clks[] = { | |||
| 140 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), | 139 | SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), |
| 141 | }; | 140 | }; |
| 142 | 141 | ||
| 143 | #define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \ | 142 | #define R_CLK (&r_clk) |
| 144 | SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT) | 143 | #define P_CLK (&div4_clks[DIV4_P]) |
| 144 | #define B_CLK (&div4_clks[DIV4_B]) | ||
| 145 | #define U_CLK (&div4_clks[DIV4_U]) | ||
| 146 | #define I_CLK (&div4_clks[DIV4_I]) | ||
| 147 | #define SH_CLK (&div4_clks[DIV4_SH]) | ||
| 145 | 148 | ||
| 146 | static struct clk mstp_clks[] = { | 149 | static struct clk mstp_clks[] = { |
| 147 | /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */ | 150 | /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */ |
| 148 | MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0), | 151 | SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT), |
| 149 | MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0), | 152 | SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT), |
| 150 | MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0), | 153 | SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT), |
| 151 | MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 28, 1, 1, 0), | 154 | SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT), |
| 152 | MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0), | 155 | SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT), |
| 153 | MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0), | 156 | SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT), |
| 154 | MSTP("intc0", &div4_clks[DIV4_I], MSTPCR0, 22, 1, 1, 0), | 157 | SH_HWBLK_CLK("intc0", -1, I_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT), |
| 155 | MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1), | 158 | SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0), |
| 156 | MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0), | 159 | SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), |
| 157 | MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0), | 160 | SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), |
| 158 | MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0), | 161 | SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), |
| 159 | MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0), | 162 | SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0), |
| 160 | MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0), | 163 | SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), |
| 161 | MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0), | 164 | SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), |
| 162 | MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1), | 165 | SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), |
| 163 | MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 11, 0, 1, 0), | 166 | SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), |
| 164 | MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0), | 167 | SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), |
| 165 | MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0), | 168 | SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), |
| 166 | MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0), | 169 | SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), |
| 167 | MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0), | 170 | SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), |
| 168 | MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0), | 171 | SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0), |
| 169 | MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0), | 172 | SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0), |
| 170 | MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0), | 173 | SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0), |
| 171 | MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0), | 174 | SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), |
| 172 | MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0), | 175 | SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), |
| 173 | MSTP("meram0", &div4_clks[DIV4_SH], MSTPCR0, 0, 1, 1, 0), | 176 | SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0), |
| 174 | 177 | ||
| 175 | MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0), | 178 | SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0), |
| 176 | MSTP("rtc0", &r_clk, MSTPCR1, 8, 0, 0, 0), | 179 | SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), |
| 177 | 180 | ||
| 178 | MSTP("atapi0", &div4_clks[DIV4_SH], MSTPCR2, 28, 0, 1, 0), | 181 | SH_HWBLK_CLK("atapi0", -1, SH_CLK, HWBLK_ATAPI, 0), |
| 179 | MSTP("adc0", &div4_clks[DIV4_P], MSTPCR2, 27, 0, 1, 0), | 182 | SH_HWBLK_CLK("adc0", -1, P_CLK, HWBLK_ADC, 0), |
| 180 | MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0), | 183 | SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0), |
| 181 | MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0), | 184 | SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0), |
| 182 | MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0), | 185 | SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0), |
| 183 | MSTP("icb0", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1), | 186 | SH_HWBLK_CLK("icb0", -1, B_CLK, HWBLK_ICB, CLK_ENABLE_ON_INIT), |
| 184 | MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0), | 187 | SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0), |
| 185 | MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0), | 188 | SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0), |
| 186 | MSTP("keysc0", &r_clk, MSTPCR2, 14, 0, 0, 0), | 189 | SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0), |
| 187 | MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 11, 0, 1, 0), | 190 | SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0), |
| 188 | MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 10, 0, 1, 1), | 191 | SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), |
| 189 | MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0, 1, 0), | 192 | SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0), |
| 190 | MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1), | 193 | SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, 0), |
| 191 | MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1), | 194 | SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), |
| 192 | MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1), | 195 | SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0), |
| 193 | MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1), | 196 | SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0), |
| 194 | MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1), | 197 | SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, 0), |
| 195 | MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1), | 198 | SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0), |
| 196 | MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1), | 199 | SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), |
| 197 | }; | 200 | }; |
| 198 | 201 | ||
| 199 | int __init arch_clk_init(void) | 202 | int __init arch_clk_init(void) |
| @@ -216,7 +219,7 @@ int __init arch_clk_init(void) | |||
| 216 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 219 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); |
| 217 | 220 | ||
| 218 | if (!ret) | 221 | if (!ret) |
| 219 | ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 222 | ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); |
| 220 | 223 | ||
| 221 | return ret; | 224 | return ret; |
| 222 | } | 225 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 5d5c9b952883..dfe9192be63e 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | #include <asm/clock.h> | 24 | #include <asm/clock.h> |
| 25 | #include <asm/hwblk.h> | ||
| 26 | #include <cpu/sh7724.h> | ||
| 25 | 27 | ||
| 26 | /* SH7724 registers */ | 28 | /* SH7724 registers */ |
| 27 | #define FRQCRA 0xa4150000 | 29 | #define FRQCRA 0xa4150000 |
| @@ -31,9 +33,6 @@ | |||
| 31 | #define FCLKBCR 0xa415000c | 33 | #define FCLKBCR 0xa415000c |
| 32 | #define IRDACLKCR 0xa4150018 | 34 | #define IRDACLKCR 0xa4150018 |
| 33 | #define PLLCR 0xa4150024 | 35 | #define PLLCR 0xa4150024 |
| 34 | #define MSTPCR0 0xa4150030 | ||
| 35 | #define MSTPCR1 0xa4150034 | ||
| 36 | #define MSTPCR2 0xa4150038 | ||
| 37 | #define SPUCLKCR 0xa415003c | 36 | #define SPUCLKCR 0xa415003c |
| 38 | #define FLLFRQ 0xa4150050 | 37 | #define FLLFRQ 0xa4150050 |
| 39 | #define LSTATS 0xa4150060 | 38 | #define LSTATS 0xa4150060 |
| @@ -128,7 +127,7 @@ struct clk *main_clks[] = { | |||
| 128 | &div3_clk, | 127 | &div3_clk, |
| 129 | }; | 128 | }; |
| 130 | 129 | ||
| 131 | static int divisors[] = { 2, 0, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; | 130 | static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; |
| 132 | 131 | ||
| 133 | static struct clk_div_mult_table div4_table = { | 132 | static struct clk_div_mult_table div4_table = { |
| 134 | .divisors = divisors, | 133 | .divisors = divisors, |
| @@ -156,64 +155,67 @@ struct clk div6_clks[] = { | |||
| 156 | SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0), | 155 | SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0), |
| 157 | }; | 156 | }; |
| 158 | 157 | ||
| 159 | #define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \ | 158 | #define R_CLK (&r_clk) |
| 160 | SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT) | 159 | #define P_CLK (&div4_clks[DIV4_P]) |
| 160 | #define B_CLK (&div4_clks[DIV4_B]) | ||
| 161 | #define I_CLK (&div4_clks[DIV4_I]) | ||
| 162 | #define SH_CLK (&div4_clks[DIV4_SH]) | ||
| 161 | 163 | ||
| 162 | static struct clk mstp_clks[] = { | 164 | static struct clk mstp_clks[] = { |
| 163 | MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0), | 165 | SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT), |
| 164 | MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0), | 166 | SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT), |
| 165 | MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0), | 167 | SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT), |
| 166 | MSTP("rs0", &div4_clks[DIV4_B], MSTPCR0, 28, 1, 1, 0), | 168 | SH_HWBLK_CLK("rs0", -1, B_CLK, HWBLK_RSMEM, CLK_ENABLE_ON_INIT), |
| 167 | MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0), | 169 | SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT), |
| 168 | MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 26, 1, 1, 0), | 170 | SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT), |
| 169 | MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0), | 171 | SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT), |
| 170 | MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 1, 1, 0), | 172 | SH_HWBLK_CLK("intc0", -1, P_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT), |
| 171 | MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1), | 173 | SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0), |
| 172 | MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0), | 174 | SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), |
| 173 | MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0), | 175 | SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), |
| 174 | MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0), | 176 | SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), |
| 175 | MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0), | 177 | SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0), |
| 176 | MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0), | 178 | SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), |
| 177 | MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0), | 179 | SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), |
| 178 | MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1), | 180 | SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), |
| 179 | MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0), | 181 | SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), |
| 180 | MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0), | 182 | SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), |
| 181 | MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0), | 183 | SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), |
| 182 | MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0), | 184 | SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), |
| 183 | MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0), | 185 | SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0), |
| 184 | MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0), | 186 | SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0), |
| 185 | MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0), | 187 | SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0), |
| 186 | MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0), | 188 | SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), |
| 187 | MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0), | 189 | SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), |
| 188 | 190 | ||
| 189 | MSTP("keysc0", &r_clk, MSTPCR1, 12, 0, 0, 0), | 191 | SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0), |
| 190 | MSTP("rtc0", &r_clk, MSTPCR1, 11, 0, 0, 0), | 192 | SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), |
| 191 | MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0), | 193 | SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC0, 0), |
| 192 | MSTP("i2c1", &div4_clks[DIV4_P], MSTPCR1, 8, 0, 1, 0), | 194 | SH_HWBLK_CLK("i2c1", -1, P_CLK, HWBLK_IIC1, 0), |
| 193 | 195 | ||
| 194 | MSTP("mmc0", &div4_clks[DIV4_B], MSTPCR2, 29, 0, 1, 0), | 196 | SH_HWBLK_CLK("mmc0", -1, B_CLK, HWBLK_MMC, 0), |
| 195 | MSTP("eth0", &div4_clks[DIV4_B], MSTPCR2, 28, 0, 1, 0), | 197 | SH_HWBLK_CLK("eth0", -1, B_CLK, HWBLK_ETHER, 0), |
| 196 | MSTP("atapi0", &div4_clks[DIV4_B], MSTPCR2, 26, 0, 1, 0), | 198 | SH_HWBLK_CLK("atapi0", -1, B_CLK, HWBLK_ATAPI, 0), |
| 197 | MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0), | 199 | SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0), |
| 198 | MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0), | 200 | SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0), |
| 199 | MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0), | 201 | SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0), |
| 200 | MSTP("usb1", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1), | 202 | SH_HWBLK_CLK("usb1", -1, B_CLK, HWBLK_USB1, 0), |
| 201 | MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 20, 0, 1, 1), | 203 | SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB0, 0), |
| 202 | MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 19, 0, 1, 1), | 204 | SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), |
| 203 | MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0), | 205 | SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0), |
| 204 | MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0), | 206 | SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0), |
| 205 | MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 15, 1, 1, 1), | 207 | SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, 0), |
| 206 | MSTP("ceu1", &div4_clks[DIV4_B], MSTPCR2, 13, 0, 1, 1), | 208 | SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0), |
| 207 | MSTP("beu1", &div4_clks[DIV4_B], MSTPCR2, 12, 0, 1, 1), | 209 | SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0), |
| 208 | MSTP("2ddmac0", &div4_clks[DIV4_SH], MSTPCR2, 10, 0, 1, 1), | 210 | SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0), |
| 209 | MSTP("spu0", &div4_clks[DIV4_B], MSTPCR2, 9, 0, 1, 0), | 211 | SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0), |
| 210 | MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1), | 212 | SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0), |
| 211 | MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1), | 213 | SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), |
| 212 | MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1), | 214 | SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0), |
| 213 | MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1), | 215 | SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0), |
| 214 | MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1), | 216 | SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, 0), |
| 215 | MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1), | 217 | SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0), |
| 216 | MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1), | 218 | SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), |
| 217 | }; | 219 | }; |
| 218 | 220 | ||
| 219 | int __init arch_clk_init(void) | 221 | int __init arch_clk_init(void) |
| @@ -236,7 +238,7 @@ int __init arch_clk_init(void) | |||
| 236 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); | 238 | ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); |
| 237 | 239 | ||
| 238 | if (!ret) | 240 | if (!ret) |
| 239 | ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); | 241 | ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks)); |
| 240 | 242 | ||
| 241 | return ret; | 243 | return ret; |
| 242 | } | 244 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c new file mode 100644 index 000000000000..ddc235ca9664 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c | |||
| @@ -0,0 +1,130 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/kernel/cpu/sh4/clock-sh7757.c | ||
| 3 | * | ||
| 4 | * SH7757 support for the clock framework | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Renesas Solutions Corp. | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/io.h> | ||
| 15 | #include <asm/clock.h> | ||
| 16 | #include <asm/freq.h> | ||
| 17 | |||
| 18 | static int ifc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, | ||
| 19 | 16, 1, 1, 32, 1, 1, 1, 1 }; | ||
| 20 | static int sfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, | ||
| 21 | 16, 1, 1, 32, 1, 1, 1, 1 }; | ||
| 22 | static int bfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, | ||
| 23 | 16, 1, 1, 32, 1, 1, 1, 1 }; | ||
| 24 | static int p1fc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1, | ||
| 25 | 16, 1, 1, 32, 1, 1, 1, 1 }; | ||
| 26 | |||
| 27 | static void master_clk_init(struct clk *clk) | ||
| 28 | { | ||
| 29 | clk->rate = CONFIG_SH_PCLK_FREQ * 16; | ||
| 30 | } | ||
| 31 | |||
| 32 | static struct clk_ops sh7757_master_clk_ops = { | ||
| 33 | .init = master_clk_init, | ||
| 34 | }; | ||
| 35 | |||
| 36 | static void module_clk_recalc(struct clk *clk) | ||
| 37 | { | ||
| 38 | int idx = ctrl_inl(FRQCR) & 0x0000000f; | ||
| 39 | clk->rate = clk->parent->rate / p1fc_divisors[idx]; | ||
| 40 | } | ||
| 41 | |||
| 42 | static struct clk_ops sh7757_module_clk_ops = { | ||
| 43 | .recalc = module_clk_recalc, | ||
| 44 | }; | ||
| 45 | |||
| 46 | static void bus_clk_recalc(struct clk *clk) | ||
| 47 | { | ||
| 48 | int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f; | ||
| 49 | clk->rate = clk->parent->rate / bfc_divisors[idx]; | ||
| 50 | } | ||
| 51 | |||
| 52 | static struct clk_ops sh7757_bus_clk_ops = { | ||
| 53 | .recalc = bus_clk_recalc, | ||
| 54 | }; | ||
| 55 | |||
| 56 | static void cpu_clk_recalc(struct clk *clk) | ||
| 57 | { | ||
| 58 | int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f; | ||
| 59 | clk->rate = clk->parent->rate / ifc_divisors[idx]; | ||
| 60 | } | ||
| 61 | |||
| 62 | static struct clk_ops sh7757_cpu_clk_ops = { | ||
| 63 | .recalc = cpu_clk_recalc, | ||
| 64 | }; | ||
| 65 | |||
| 66 | static struct clk_ops *sh7757_clk_ops[] = { | ||
| 67 | &sh7757_master_clk_ops, | ||
| 68 | &sh7757_module_clk_ops, | ||
| 69 | &sh7757_bus_clk_ops, | ||
| 70 | &sh7757_cpu_clk_ops, | ||
| 71 | }; | ||
| 72 | |||
| 73 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | ||
| 74 | { | ||
| 75 | if (idx < ARRAY_SIZE(sh7757_clk_ops)) | ||
| 76 | *ops = sh7757_clk_ops[idx]; | ||
| 77 | } | ||
| 78 | |||
| 79 | static void shyway_clk_recalc(struct clk *clk) | ||
| 80 | { | ||
| 81 | int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f; | ||
| 82 | clk->rate = clk->parent->rate / sfc_divisors[idx]; | ||
| 83 | } | ||
| 84 | |||
| 85 | static struct clk_ops sh7757_shyway_clk_ops = { | ||
| 86 | .recalc = shyway_clk_recalc, | ||
| 87 | }; | ||
| 88 | |||
| 89 | static struct clk sh7757_shyway_clk = { | ||
| 90 | .name = "shyway_clk", | ||
| 91 | .flags = CLK_ENABLE_ON_INIT, | ||
| 92 | .ops = &sh7757_shyway_clk_ops, | ||
| 93 | }; | ||
| 94 | |||
| 95 | /* | ||
| 96 | * Additional sh7757-specific on-chip clocks that aren't already part of the | ||
| 97 | * clock framework | ||
| 98 | */ | ||
| 99 | static struct clk *sh7757_onchip_clocks[] = { | ||
| 100 | &sh7757_shyway_clk, | ||
| 101 | }; | ||
| 102 | |||
| 103 | static int __init sh7757_clk_init(void) | ||
| 104 | { | ||
| 105 | struct clk *clk = clk_get(NULL, "master_clk"); | ||
| 106 | int i; | ||
| 107 | |||
| 108 | for (i = 0; i < ARRAY_SIZE(sh7757_onchip_clocks); i++) { | ||
| 109 | struct clk *clkp = sh7757_onchip_clocks[i]; | ||
| 110 | |||
| 111 | clkp->parent = clk; | ||
| 112 | clk_register(clkp); | ||
| 113 | clk_enable(clkp); | ||
| 114 | } | ||
| 115 | |||
| 116 | /* | ||
| 117 | * Now that we have the rest of the clocks registered, we need to | ||
| 118 | * force the parent clock to propagate so that these clocks will | ||
| 119 | * automatically figure out their rate. We cheat by handing the | ||
| 120 | * parent clock its current rate and forcing child propagation. | ||
| 121 | */ | ||
| 122 | clk_set_rate(clk, clk_get_rate(clk)); | ||
| 123 | |||
| 124 | clk_put(clk); | ||
| 125 | |||
| 126 | return 0; | ||
| 127 | } | ||
| 128 | |||
| 129 | arch_initcall(sh7757_clk_init); | ||
| 130 | |||
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c new file mode 100644 index 000000000000..a288b5d92341 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | |||
| @@ -0,0 +1,106 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | ||
| 3 | * | ||
| 4 | * SH7722 hardware block support | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Magnus Damm | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | */ | ||
| 21 | #include <linux/init.h> | ||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/io.h> | ||
| 24 | #include <asm/suspend.h> | ||
| 25 | #include <asm/hwblk.h> | ||
| 26 | #include <cpu/sh7722.h> | ||
| 27 | |||
| 28 | /* SH7722 registers */ | ||
| 29 | #define MSTPCR0 0xa4150030 | ||
| 30 | #define MSTPCR1 0xa4150034 | ||
| 31 | #define MSTPCR2 0xa4150038 | ||
| 32 | |||
| 33 | /* SH7722 Power Domains */ | ||
| 34 | enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; | ||
| 35 | static struct hwblk_area sh7722_hwblk_area[] = { | ||
| 36 | [CORE_AREA] = HWBLK_AREA(0, 0), | ||
| 37 | [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), | ||
| 38 | [SUB_AREA] = HWBLK_AREA(0, 0), | ||
| 39 | }; | ||
| 40 | |||
| 41 | /* Table mapping HWBLK to Module Stop Bit and Power Domain */ | ||
| 42 | static struct hwblk sh7722_hwblk[HWBLK_NR] = { | ||
| 43 | [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), | ||
| 44 | [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), | ||
| 45 | [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), | ||
| 46 | [HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA), | ||
| 47 | [HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA), | ||
| 48 | [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), | ||
| 49 | [HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), | ||
| 50 | [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), | ||
| 51 | [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), | ||
| 52 | [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), | ||
| 53 | [HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA), | ||
| 54 | [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), | ||
| 55 | [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), | ||
| 56 | [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA), | ||
| 57 | [HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA), | ||
| 58 | [HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA), | ||
| 59 | [HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA), | ||
| 60 | [HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA), | ||
| 61 | [HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), | ||
| 62 | [HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), | ||
| 63 | |||
| 64 | [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA), | ||
| 65 | [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA), | ||
| 66 | |||
| 67 | [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), | ||
| 68 | [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), | ||
| 69 | [HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA), | ||
| 70 | [HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA), | ||
| 71 | [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA), | ||
| 72 | [HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA), | ||
| 73 | [HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA), | ||
| 74 | [HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM), | ||
| 75 | [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA), | ||
| 76 | [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), | ||
| 77 | [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), | ||
| 78 | [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), | ||
| 79 | [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), | ||
| 80 | [HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), | ||
| 81 | [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), | ||
| 82 | [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct hwblk_info sh7722_hwblk_info = { | ||
| 86 | .areas = sh7722_hwblk_area, | ||
| 87 | .nr_areas = ARRAY_SIZE(sh7722_hwblk_area), | ||
| 88 | .hwblks = sh7722_hwblk, | ||
| 89 | .nr_hwblks = ARRAY_SIZE(sh7722_hwblk), | ||
| 90 | }; | ||
| 91 | |||
| 92 | int arch_hwblk_sleep_mode(void) | ||
| 93 | { | ||
| 94 | if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) | ||
| 95 | return SUSP_SH_STANDBY | SUSP_SH_SF; | ||
| 96 | |||
| 97 | if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) | ||
| 98 | return SUSP_SH_SLEEP | SUSP_SH_SF; | ||
| 99 | |||
| 100 | return SUSP_SH_SLEEP; | ||
| 101 | } | ||
| 102 | |||
| 103 | int __init arch_hwblk_init(void) | ||
| 104 | { | ||
| 105 | return hwblk_register(&sh7722_hwblk_info); | ||
| 106 | } | ||
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c new file mode 100644 index 000000000000..a7f4684d2032 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c | |||
| @@ -0,0 +1,117 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c | ||
| 3 | * | ||
| 4 | * SH7723 hardware block support | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Magnus Damm | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | */ | ||
| 21 | #include <linux/init.h> | ||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/io.h> | ||
| 24 | #include <asm/suspend.h> | ||
| 25 | #include <asm/hwblk.h> | ||
| 26 | #include <cpu/sh7723.h> | ||
| 27 | |||
| 28 | /* SH7723 registers */ | ||
| 29 | #define MSTPCR0 0xa4150030 | ||
| 30 | #define MSTPCR1 0xa4150034 | ||
| 31 | #define MSTPCR2 0xa4150038 | ||
| 32 | |||
| 33 | /* SH7723 Power Domains */ | ||
| 34 | enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; | ||
| 35 | static struct hwblk_area sh7723_hwblk_area[] = { | ||
| 36 | [CORE_AREA] = HWBLK_AREA(0, 0), | ||
| 37 | [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), | ||
| 38 | [SUB_AREA] = HWBLK_AREA(0, 0), | ||
| 39 | }; | ||
| 40 | |||
| 41 | /* Table mapping HWBLK to Module Stop Bit and Power Domain */ | ||
| 42 | static struct hwblk sh7723_hwblk[HWBLK_NR] = { | ||
| 43 | [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), | ||
| 44 | [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), | ||
| 45 | [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), | ||
| 46 | [HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA), | ||
| 47 | [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA), | ||
| 48 | [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA), | ||
| 49 | [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), | ||
| 50 | [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), | ||
| 51 | [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), | ||
| 52 | [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), | ||
| 53 | [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA), | ||
| 54 | [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), | ||
| 55 | [HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA), | ||
| 56 | [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA), | ||
| 57 | [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), | ||
| 58 | [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), | ||
| 59 | [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM), | ||
| 60 | [HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA), | ||
| 61 | [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA), | ||
| 62 | [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA), | ||
| 63 | [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA), | ||
| 64 | [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA), | ||
| 65 | [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA), | ||
| 66 | [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA), | ||
| 67 | [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA), | ||
| 68 | [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), | ||
| 69 | [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), | ||
| 70 | [HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA), | ||
| 71 | |||
| 72 | [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA), | ||
| 73 | [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA), | ||
| 74 | |||
| 75 | [HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM), | ||
| 76 | [HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA), | ||
| 77 | [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), | ||
| 78 | [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), | ||
| 79 | [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA), | ||
| 80 | [HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM), | ||
| 81 | [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA), | ||
| 82 | [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA), | ||
| 83 | [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA), | ||
| 84 | [HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA), | ||
| 85 | [HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM), | ||
| 86 | [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA), | ||
| 87 | [HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), | ||
| 88 | [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), | ||
| 89 | [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), | ||
| 90 | [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), | ||
| 91 | [HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), | ||
| 92 | [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), | ||
| 93 | [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), | ||
| 94 | }; | ||
| 95 | |||
| 96 | static struct hwblk_info sh7723_hwblk_info = { | ||
| 97 | .areas = sh7723_hwblk_area, | ||
| 98 | .nr_areas = ARRAY_SIZE(sh7723_hwblk_area), | ||
| 99 | .hwblks = sh7723_hwblk, | ||
| 100 | .nr_hwblks = ARRAY_SIZE(sh7723_hwblk), | ||
| 101 | }; | ||
| 102 | |||
| 103 | int arch_hwblk_sleep_mode(void) | ||
| 104 | { | ||
| 105 | if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) | ||
| 106 | return SUSP_SH_STANDBY | SUSP_SH_SF; | ||
| 107 | |||
| 108 | if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) | ||
| 109 | return SUSP_SH_SLEEP | SUSP_SH_SF; | ||
| 110 | |||
| 111 | return SUSP_SH_SLEEP; | ||
| 112 | } | ||
| 113 | |||
| 114 | int __init arch_hwblk_init(void) | ||
| 115 | { | ||
| 116 | return hwblk_register(&sh7723_hwblk_info); | ||
| 117 | } | ||
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c new file mode 100644 index 000000000000..1613ad6013c3 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c | |||
| @@ -0,0 +1,121 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c | ||
| 3 | * | ||
| 4 | * SH7724 hardware block support | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Magnus Damm | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 20 | */ | ||
| 21 | #include <linux/init.h> | ||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/io.h> | ||
| 24 | #include <asm/suspend.h> | ||
| 25 | #include <asm/hwblk.h> | ||
| 26 | #include <cpu/sh7724.h> | ||
| 27 | |||
| 28 | /* SH7724 registers */ | ||
| 29 | #define MSTPCR0 0xa4150030 | ||
| 30 | #define MSTPCR1 0xa4150034 | ||
| 31 | #define MSTPCR2 0xa4150038 | ||
| 32 | |||
| 33 | /* SH7724 Power Domains */ | ||
| 34 | enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; | ||
| 35 | static struct hwblk_area sh7724_hwblk_area[] = { | ||
| 36 | [CORE_AREA] = HWBLK_AREA(0, 0), | ||
| 37 | [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), | ||
| 38 | [SUB_AREA] = HWBLK_AREA(0, 0), | ||
| 39 | }; | ||
| 40 | |||
| 41 | /* Table mapping HWBLK to Module Stop Bit and Power Domain */ | ||
| 42 | static struct hwblk sh7724_hwblk[HWBLK_NR] = { | ||
| 43 | [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), | ||
| 44 | [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), | ||
| 45 | [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), | ||
| 46 | [HWBLK_RSMEM] = HWBLK(MSTPCR0, 28, CORE_AREA), | ||
| 47 | [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA), | ||
| 48 | [HWBLK_L2C] = HWBLK(MSTPCR0, 26, CORE_AREA), | ||
| 49 | [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA), | ||
| 50 | [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), | ||
| 51 | [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), | ||
| 52 | [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), | ||
| 53 | [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), | ||
| 54 | [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA), | ||
| 55 | [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), | ||
| 56 | [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA), | ||
| 57 | [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), | ||
| 58 | [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), | ||
| 59 | [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM), | ||
| 60 | [HWBLK_TMU1] = HWBLK(MSTPCR0, 10, CORE_AREA), | ||
| 61 | [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA), | ||
| 62 | [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA), | ||
| 63 | [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA), | ||
| 64 | [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA), | ||
| 65 | [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA), | ||
| 66 | [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA), | ||
| 67 | [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), | ||
| 68 | [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), | ||
| 69 | |||
| 70 | [HWBLK_KEYSC] = HWBLK(MSTPCR1, 12, SUB_AREA), | ||
| 71 | [HWBLK_RTC] = HWBLK(MSTPCR1, 11, SUB_AREA), | ||
| 72 | [HWBLK_IIC0] = HWBLK(MSTPCR1, 9, CORE_AREA), | ||
| 73 | [HWBLK_IIC1] = HWBLK(MSTPCR1, 8, CORE_AREA), | ||
| 74 | |||
| 75 | [HWBLK_MMC] = HWBLK(MSTPCR2, 29, CORE_AREA), | ||
| 76 | [HWBLK_ETHER] = HWBLK(MSTPCR2, 28, CORE_AREA_BM), | ||
| 77 | [HWBLK_ATAPI] = HWBLK(MSTPCR2, 26, CORE_AREA_BM), | ||
| 78 | [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), | ||
| 79 | [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), | ||
| 80 | [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA), | ||
| 81 | [HWBLK_USB1] = HWBLK(MSTPCR2, 21, CORE_AREA), | ||
| 82 | [HWBLK_USB0] = HWBLK(MSTPCR2, 20, CORE_AREA), | ||
| 83 | [HWBLK_2DG] = HWBLK(MSTPCR2, 19, CORE_AREA_BM), | ||
| 84 | [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA), | ||
| 85 | [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA), | ||
| 86 | [HWBLK_VEU1] = HWBLK(MSTPCR2, 15, CORE_AREA_BM), | ||
| 87 | [HWBLK_CEU1] = HWBLK(MSTPCR2, 13, CORE_AREA_BM), | ||
| 88 | [HWBLK_BEU1] = HWBLK(MSTPCR2, 12, CORE_AREA_BM), | ||
| 89 | [HWBLK_2DDMAC] = HWBLK(MSTPCR2, 10, CORE_AREA_BM), | ||
| 90 | [HWBLK_SPU] = HWBLK(MSTPCR2, 9, CORE_AREA_BM), | ||
| 91 | [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), | ||
| 92 | [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), | ||
| 93 | [HWBLK_BEU0] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), | ||
| 94 | [HWBLK_CEU0] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), | ||
| 95 | [HWBLK_VEU0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), | ||
| 96 | [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), | ||
| 97 | [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), | ||
| 98 | }; | ||
| 99 | |||
| 100 | static struct hwblk_info sh7724_hwblk_info = { | ||
| 101 | .areas = sh7724_hwblk_area, | ||
| 102 | .nr_areas = ARRAY_SIZE(sh7724_hwblk_area), | ||
| 103 | .hwblks = sh7724_hwblk, | ||
| 104 | .nr_hwblks = ARRAY_SIZE(sh7724_hwblk), | ||
| 105 | }; | ||
| 106 | |||
| 107 | int arch_hwblk_sleep_mode(void) | ||
| 108 | { | ||
| 109 | if (!sh7724_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) | ||
| 110 | return SUSP_SH_STANDBY | SUSP_SH_SF; | ||
| 111 | |||
| 112 | if (!sh7724_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) | ||
| 113 | return SUSP_SH_SLEEP | SUSP_SH_SF; | ||
| 114 | |||
| 115 | return SUSP_SH_SLEEP; | ||
| 116 | } | ||
| 117 | |||
| 118 | int __init arch_hwblk_init(void) | ||
| 119 | { | ||
| 120 | return hwblk_register(&sh7724_hwblk_info); | ||
| 121 | } | ||
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c new file mode 100644 index 000000000000..ed23b155c097 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c | |||
| @@ -0,0 +1,2019 @@ | |||
| 1 | /* | ||
| 2 | * SH7757 (A0 step) Pinmux | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Renesas Solutions Corp. | ||
| 5 | * | ||
| 6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | ||
| 7 | * | ||
| 8 | * Based on SH7757 Pinmux | ||
| 9 | * Copyright (C) 2008 Magnus Damm | ||
| 10 | * | ||
| 11 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 12 | * License. See the file "COPYING" in the main directory of this archive | ||
| 13 | * for more details. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/gpio.h> | ||
| 19 | #include <cpu/sh7757.h> | ||
| 20 | |||
| 21 | enum { | ||
| 22 | PINMUX_RESERVED = 0, | ||
| 23 | |||
| 24 | PINMUX_DATA_BEGIN, | ||
| 25 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, | ||
| 26 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA, | ||
| 27 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, | ||
| 28 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA, | ||
| 29 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, | ||
| 30 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA, | ||
| 31 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, | ||
| 32 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA, | ||
| 33 | PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, | ||
| 34 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA, | ||
| 35 | PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA, | ||
| 36 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA, | ||
| 37 | PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA, | ||
| 38 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA, | ||
| 39 | PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA, | ||
| 40 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA, | ||
| 41 | PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA, | ||
| 42 | PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA, | ||
| 43 | PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, | ||
| 44 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA, | ||
| 45 | PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, | ||
| 46 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA, | ||
| 47 | PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, | ||
| 48 | PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA, | ||
| 49 | PTM6_DATA, PTM5_DATA, PTM4_DATA, | ||
| 50 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA, | ||
| 51 | PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, | ||
| 52 | PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA, | ||
| 53 | PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA, | ||
| 54 | PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA, | ||
| 55 | PTP6_DATA, PTP5_DATA, PTP4_DATA, | ||
| 56 | PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA, | ||
| 57 | PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, | ||
| 58 | PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA, | ||
| 59 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, | ||
| 60 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA, | ||
| 61 | PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA, | ||
| 62 | PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA, | ||
| 63 | PTT5_DATA, PTT4_DATA, | ||
| 64 | PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA, | ||
| 65 | PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, | ||
| 66 | PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA, | ||
| 67 | PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA, | ||
| 68 | PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA, | ||
| 69 | PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA, | ||
| 70 | PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA, | ||
| 71 | PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA, | ||
| 72 | PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA, | ||
| 73 | PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA, | ||
| 74 | PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA, | ||
| 75 | PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA, | ||
| 76 | PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA, | ||
| 77 | PINMUX_DATA_END, | ||
| 78 | |||
| 79 | PINMUX_INPUT_BEGIN, | ||
| 80 | PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN, | ||
| 81 | PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN, | ||
| 82 | PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN, | ||
| 83 | PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN, | ||
| 84 | PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN, | ||
| 85 | PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN, | ||
| 86 | PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, | ||
| 87 | PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN, | ||
| 88 | PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, | ||
| 89 | PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN, | ||
| 90 | PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN, | ||
| 91 | PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN, | ||
| 92 | PTG7_IN, PTG6_IN, PTG5_IN, PTG4_IN, | ||
| 93 | PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN, | ||
| 94 | PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN, | ||
| 95 | PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN, | ||
| 96 | PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN, | ||
| 97 | PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN, | ||
| 98 | PTJ7_IN, PTJ6_IN, PTJ5_IN, PTJ4_IN, | ||
| 99 | PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN, | ||
| 100 | PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN, | ||
| 101 | PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN, | ||
| 102 | PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, | ||
| 103 | PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN, | ||
| 104 | PTM6_IN, PTM5_IN, PTM4_IN, | ||
| 105 | PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN, | ||
| 106 | PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN, | ||
| 107 | PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN, | ||
| 108 | PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN, | ||
| 109 | PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN, | ||
| 110 | PTP6_IN, PTP5_IN, PTP4_IN, | ||
| 111 | PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN, | ||
| 112 | PTQ6_IN, PTQ5_IN, PTQ4_IN, | ||
| 113 | PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN, | ||
| 114 | PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN, | ||
| 115 | PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN, | ||
| 116 | PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN, | ||
| 117 | PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN, | ||
| 118 | PTT5_IN, PTT4_IN, | ||
| 119 | PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN, | ||
| 120 | PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN, | ||
| 121 | PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN, | ||
| 122 | PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN, | ||
| 123 | PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN, | ||
| 124 | PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN, | ||
| 125 | PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN, | ||
| 126 | PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN, | ||
| 127 | PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN, | ||
| 128 | PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN, | ||
| 129 | PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN, | ||
| 130 | PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN, | ||
| 131 | PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN, | ||
| 132 | PINMUX_INPUT_END, | ||
| 133 | |||
| 134 | PINMUX_INPUT_PULLUP_BEGIN, | ||
| 135 | PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU, | ||
| 136 | PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU, | ||
| 137 | PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU, | ||
| 138 | PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU, | ||
| 139 | PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU, | ||
| 140 | PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU, | ||
| 141 | PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU, | ||
| 142 | PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU, | ||
| 143 | PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU, | ||
| 144 | PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU, | ||
| 145 | PINMUX_INPUT_PULLUP_END, | ||
| 146 | |||
| 147 | PINMUX_OUTPUT_BEGIN, | ||
| 148 | PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT, | ||
| 149 | PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT, | ||
| 150 | PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT, | ||
| 151 | PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT, | ||
| 152 | PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT, | ||
| 153 | PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT, | ||
| 154 | PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT, | ||
| 155 | PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT, | ||
| 156 | PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, | ||
| 157 | PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT, | ||
| 158 | PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT, | ||
| 159 | PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT, | ||
| 160 | PTG7_OUT, PTG6_OUT, PTG5_OUT, PTG4_OUT, | ||
| 161 | PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT, | ||
| 162 | PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT, | ||
| 163 | PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT, | ||
| 164 | PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT, | ||
| 165 | PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT, | ||
| 166 | PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ4_OUT, | ||
| 167 | PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT, | ||
| 168 | PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT, | ||
| 169 | PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT, | ||
| 170 | PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, | ||
| 171 | PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT, | ||
| 172 | PTM6_OUT, PTM5_OUT, PTM4_OUT, | ||
| 173 | PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT, | ||
| 174 | PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT, | ||
| 175 | PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, | ||
| 176 | PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT, | ||
| 177 | PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT, | ||
| 178 | PTP6_OUT, PTP5_OUT, PTP4_OUT, | ||
| 179 | PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT, | ||
| 180 | PTQ6_OUT, PTQ5_OUT, PTQ4_OUT, | ||
| 181 | PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT, | ||
| 182 | PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT, | ||
| 183 | PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT, | ||
| 184 | PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT, | ||
| 185 | PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT, | ||
| 186 | PTT5_OUT, PTT4_OUT, | ||
| 187 | PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT, | ||
| 188 | PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT, | ||
| 189 | PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT, | ||
| 190 | PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT, | ||
| 191 | PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT, | ||
| 192 | PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT, | ||
| 193 | PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT, | ||
| 194 | PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT, | ||
| 195 | PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT, | ||
| 196 | PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT, | ||
| 197 | PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT, | ||
| 198 | PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT, | ||
| 199 | PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT, | ||
| 200 | PINMUX_OUTPUT_END, | ||
| 201 | |||
| 202 | PINMUX_FUNCTION_BEGIN, | ||
| 203 | PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN, | ||
| 204 | PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN, | ||
| 205 | PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN, | ||
| 206 | PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN, | ||
| 207 | PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN, | ||
| 208 | PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN, | ||
| 209 | PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN, | ||
| 210 | PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN, | ||
| 211 | PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN, | ||
| 212 | PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN, | ||
| 213 | PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN, | ||
| 214 | PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN, | ||
| 215 | PTG7_FN, PTG6_FN, PTG5_FN, PTG4_FN, | ||
| 216 | PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN, | ||
| 217 | PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN, | ||
| 218 | PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN, | ||
| 219 | PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN, | ||
| 220 | PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN, | ||
| 221 | PTJ7_FN, PTJ6_FN, PTJ5_FN, PTJ4_FN, | ||
| 222 | PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN, | ||
| 223 | PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN, | ||
| 224 | PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN, | ||
| 225 | PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, | ||
| 226 | PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN, | ||
| 227 | PTM6_FN, PTM5_FN, PTM4_FN, | ||
| 228 | PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN, | ||
| 229 | PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN, | ||
| 230 | PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN, | ||
| 231 | PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN, | ||
| 232 | PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN, | ||
| 233 | PTP6_FN, PTP5_FN, PTP4_FN, | ||
| 234 | PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN, | ||
| 235 | PTQ6_FN, PTQ5_FN, PTQ4_FN, | ||
| 236 | PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN, | ||
| 237 | PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN, | ||
| 238 | PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN, | ||
| 239 | PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN, | ||
| 240 | PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN, | ||
| 241 | PTT5_FN, PTT4_FN, | ||
| 242 | PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN, | ||
| 243 | PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN, | ||
| 244 | PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN, | ||
| 245 | PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN, | ||
| 246 | PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN, | ||
| 247 | PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN, | ||
| 248 | PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN, | ||
| 249 | PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN, | ||
| 250 | PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN, | ||
| 251 | PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN, | ||
| 252 | PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN, | ||
| 253 | PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN, | ||
| 254 | PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN, | ||
| 255 | |||
| 256 | PS0_15_FN1, PS0_15_FN3, | ||
| 257 | PS0_14_FN1, PS0_14_FN3, | ||
| 258 | PS0_13_FN1, PS0_13_FN3, | ||
| 259 | PS0_12_FN1, PS0_12_FN3, | ||
| 260 | PS0_7_FN1, PS0_7_FN2, | ||
| 261 | PS0_6_FN1, PS0_6_FN2, | ||
| 262 | PS0_5_FN1, PS0_5_FN2, | ||
| 263 | PS0_4_FN1, PS0_4_FN2, | ||
| 264 | PS0_3_FN1, PS0_3_FN2, | ||
| 265 | PS0_2_FN1, PS0_2_FN2, | ||
| 266 | PS0_1_FN1, PS0_1_FN2, | ||
| 267 | |||
| 268 | PS1_7_FN1, PS1_7_FN3, | ||
| 269 | PS1_6_FN1, PS1_6_FN3, | ||
| 270 | |||
| 271 | PS2_13_FN1, PS2_13_FN3, | ||
| 272 | PS2_12_FN1, PS2_12_FN3, | ||
| 273 | PS2_1_FN1, PS2_1_FN2, | ||
| 274 | PS2_0_FN1, PS2_0_FN2, | ||
| 275 | |||
| 276 | PS4_15_FN1, PS4_15_FN2, | ||
| 277 | PS4_14_FN1, PS4_14_FN2, | ||
| 278 | PS4_13_FN1, PS4_13_FN2, | ||
| 279 | PS4_12_FN1, PS4_12_FN2, | ||
| 280 | PS4_11_FN1, PS4_11_FN2, | ||
| 281 | PS4_10_FN1, PS4_10_FN2, | ||
| 282 | PS4_9_FN1, PS4_9_FN2, | ||
| 283 | PS4_3_FN1, PS4_3_FN2, | ||
| 284 | PS4_2_FN1, PS4_2_FN2, | ||
| 285 | PS4_1_FN1, PS4_1_FN2, | ||
| 286 | PS4_0_FN1, PS4_0_FN2, | ||
| 287 | |||
| 288 | PS5_9_FN1, PS5_9_FN2, | ||
| 289 | PS5_8_FN1, PS5_8_FN2, | ||
| 290 | PS5_7_FN1, PS5_7_FN2, | ||
| 291 | PS5_6_FN1, PS5_6_FN2, | ||
| 292 | PS5_5_FN1, PS5_5_FN2, | ||
| 293 | PS5_4_FN1, PS5_4_FN2, | ||
| 294 | |||
| 295 | /* AN15 to 8 : EVENT15 to 8 */ | ||
| 296 | PS6_7_FN_AN, PS6_7_FN_EV, | ||
| 297 | PS6_6_FN_AN, PS6_6_FN_EV, | ||
| 298 | PS6_5_FN_AN, PS6_5_FN_EV, | ||
| 299 | PS6_4_FN_AN, PS6_4_FN_EV, | ||
| 300 | PS6_3_FN_AN, PS6_3_FN_EV, | ||
| 301 | PS6_2_FN_AN, PS6_2_FN_EV, | ||
| 302 | PS6_1_FN_AN, PS6_1_FN_EV, | ||
| 303 | PS6_0_FN_AN, PS6_0_FN_EV, | ||
| 304 | |||
| 305 | PINMUX_FUNCTION_END, | ||
| 306 | |||
| 307 | PINMUX_MARK_BEGIN, | ||
| 308 | /* PTA (mobule: LBSC, CPG, LPC) */ | ||
| 309 | BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK, | ||
| 310 | MD10_MARK, MD9_MARK, MD8_MARK, | ||
| 311 | LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK, | ||
| 312 | LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK, | ||
| 313 | |||
| 314 | /* PTB (mobule: LBSC, EtherC, SIM, LPC) */ | ||
| 315 | D15_MARK, D14_MARK, D13_MARK, D12_MARK, | ||
| 316 | D11_MARK, D10_MARK, D9_MARK, D8_MARK, | ||
| 317 | ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK, | ||
| 318 | SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK, | ||
| 319 | WPSZ1_MARK, WPSZ0_MARK, FWID_MARK, FLSHSZ_MARK, | ||
| 320 | LPC_SPIEN_MARK, BASEL_MARK, | ||
| 321 | |||
| 322 | /* PTC (mobule: SD) */ | ||
| 323 | SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK, | ||
| 324 | SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK, | ||
| 325 | |||
| 326 | /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ | ||
| 327 | IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK, | ||
| 328 | IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK, | ||
| 329 | MD6_MARK, MD5_MARK, MD3_MARK, MD2_MARK, | ||
| 330 | MD1_MARK, MD0_MARK, ADTRG1_MARK, ADTRG0_MARK, | ||
| 331 | |||
| 332 | /* PTE (mobule: EtherC) */ | ||
| 333 | ET0_CRS_DV_MARK, ET0_TXD1_MARK, | ||
| 334 | ET0_TXD0_MARK, ET0_TX_EN_MARK, | ||
| 335 | ET0_REF_CLK_MARK, ET0_RXD1_MARK, | ||
| 336 | ET0_RXD0_MARK, ET0_RX_ER_MARK, | ||
| 337 | |||
| 338 | /* PTF (mobule: EtherC) */ | ||
| 339 | ET1_CRS_DV_MARK, ET1_TXD1_MARK, | ||
| 340 | ET1_TXD0_MARK, ET1_TX_EN_MARK, | ||
| 341 | ET1_REF_CLK_MARK, ET1_RXD1_MARK, | ||
| 342 | ET1_RXD0_MARK, ET1_RX_ER_MARK, | ||
| 343 | |||
| 344 | /* PTG (mobule: SYSTEM, PWMX, LPC) */ | ||
| 345 | STATUS0_MARK, STATUS1_MARK, | ||
| 346 | PWX0_MARK, PWX1_MARK, PWX2_MARK, PWX3_MARK, | ||
| 347 | SERIRQ_MARK, CLKRUN_MARK, LPCPD_MARK, LDRQ_MARK, | ||
| 348 | |||
| 349 | /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ | ||
| 350 | TCLK_MARK, RXD4_MARK, TXD4_MARK, | ||
| 351 | SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK, | ||
| 352 | SP1_SS0_MARK, SP1_SS1_MARK, SP0_SS1_MARK, | ||
| 353 | |||
| 354 | /* PTI (mobule: INTC) */ | ||
| 355 | IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK, | ||
| 356 | IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK, | ||
| 357 | |||
| 358 | /* PTJ (mobule: SCIF234, SERMUX) */ | ||
| 359 | RXD3_MARK, TXD3_MARK, RXD2_MARK, TXD2_MARK, | ||
| 360 | COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK, | ||
| 361 | |||
| 362 | /* PTK (mobule: SERMUX) */ | ||
| 363 | COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK, | ||
| 364 | COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, COM2_RI_MARK, | ||
| 365 | |||
| 366 | /* PTL (mobule: SERMUX) */ | ||
| 367 | RAC_TXD_MARK, RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, | ||
| 368 | RAC_DTR_MARK, RAC_DSR_MARK, RAC_DCD_MARK, RAC_RI_MARK, | ||
| 369 | |||
| 370 | /* PTM (mobule: IIC, LPC) */ | ||
| 371 | SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK, | ||
| 372 | WP_MARK, FMS0_MARK, FMS1_MARK, | ||
| 373 | |||
| 374 | /* PTN (mobule: SCIF234, EVC) */ | ||
| 375 | SCK2_MARK, RTS4_MARK, RTS3_MARK, RTS2_MARK, | ||
| 376 | CTS4_MARK, CTS3_MARK, CTS2_MARK, | ||
| 377 | EVENT7_MARK, EVENT6_MARK, EVENT5_MARK, EVENT4_MARK, | ||
| 378 | EVENT3_MARK, EVENT2_MARK, EVENT1_MARK, EVENT0_MARK, | ||
| 379 | |||
| 380 | /* PTO (mobule: SGPIO) */ | ||
| 381 | SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, | ||
| 382 | SGPIO0_DI_MARK, SGPIO0_DO_MARK, | ||
| 383 | SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, | ||
| 384 | SGPIO1_DI_MARK, SGPIO1_DO_MARK, | ||
| 385 | |||
| 386 | /* PTP (mobule: JMC, SCIF234) */ | ||
| 387 | JMCTCK_MARK, JMCTMS_MARK, JMCTDO_MARK, JMCTDI_MARK, | ||
| 388 | JMCRST_MARK, SCK4_MARK, SCK3_MARK, | ||
| 389 | |||
| 390 | /* PTQ (mobule: LPC) */ | ||
| 391 | LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK, | ||
| 392 | LFRAME_MARK, LRESET_MARK, LCLK_MARK, | ||
| 393 | |||
| 394 | /* PTR (mobule: GRA, IIC) */ | ||
| 395 | DDC3_MARK, DDC2_MARK, | ||
| 396 | SDA8_MARK, SCL8_MARK, SDA2_MARK, SCL2_MARK, | ||
| 397 | SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK, | ||
| 398 | |||
| 399 | /* PTS (mobule: GRA, IIC) */ | ||
| 400 | DDC1_MARK, DDC0_MARK, | ||
| 401 | SDA9_MARK, SCL9_MARK, SDA5_MARK, SCL5_MARK, | ||
| 402 | SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK, | ||
| 403 | |||
| 404 | /* PTT (mobule: SYSTEM, PWMX) */ | ||
| 405 | AUDSYNC_MARK, AUDCK_MARK, | ||
| 406 | AUDATA3_MARK, AUDATA2_MARK, | ||
| 407 | AUDATA1_MARK, AUDATA0_MARK, | ||
| 408 | PWX7_MARK, PWX6_MARK, PWX5_MARK, PWX4_MARK, | ||
| 409 | |||
| 410 | /* PTU (mobule: LBSC, DMAC) */ | ||
| 411 | CS6_MARK, CS5_MARK, CS4_MARK, CS0_MARK, | ||
| 412 | RD_MARK, WE0_MARK, A25_MARK, A24_MARK, | ||
| 413 | DREQ0_MARK, DACK0_MARK, | ||
| 414 | |||
| 415 | /* PTV (mobule: LBSC, DMAC) */ | ||
| 416 | A23_MARK, A22_MARK, A21_MARK, A20_MARK, | ||
| 417 | A19_MARK, A18_MARK, A17_MARK, A16_MARK, | ||
| 418 | TEND0_MARK, DREQ1_MARK, DACK1_MARK, TEND1_MARK, | ||
| 419 | |||
| 420 | /* PTW (mobule: LBSC) */ | ||
| 421 | A15_MARK, A14_MARK, A13_MARK, A12_MARK, | ||
| 422 | A11_MARK, A10_MARK, A9_MARK, A8_MARK, | ||
| 423 | |||
| 424 | /* PTX (mobule: LBSC) */ | ||
| 425 | A7_MARK, A6_MARK, A5_MARK, A4_MARK, | ||
| 426 | A3_MARK, A2_MARK, A1_MARK, A0_MARK, | ||
| 427 | |||
| 428 | /* PTY (mobule: LBSC) */ | ||
| 429 | D7_MARK, D6_MARK, D5_MARK, D4_MARK, | ||
| 430 | D3_MARK, D2_MARK, D1_MARK, D0_MARK, | ||
| 431 | PINMUX_MARK_END, | ||
| 432 | }; | ||
| 433 | |||
| 434 | static pinmux_enum_t pinmux_data[] = { | ||
| 435 | /* PTA GPIO */ | ||
| 436 | PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), | ||
| 437 | PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), | ||
| 438 | PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT), | ||
| 439 | PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT), | ||
| 440 | PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT), | ||
| 441 | PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT), | ||
| 442 | PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT), | ||
| 443 | PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT), | ||
| 444 | |||
| 445 | /* PTB GPIO */ | ||
| 446 | PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT), | ||
| 447 | PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT), | ||
| 448 | PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT), | ||
| 449 | PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT), | ||
| 450 | PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT), | ||
| 451 | PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT), | ||
| 452 | PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT), | ||
| 453 | PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT), | ||
| 454 | |||
| 455 | /* PTC GPIO */ | ||
| 456 | PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT), | ||
| 457 | PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT), | ||
| 458 | PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT), | ||
| 459 | PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT), | ||
| 460 | PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT), | ||
| 461 | PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT), | ||
| 462 | PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT), | ||
| 463 | PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT), | ||
| 464 | |||
| 465 | /* PTD GPIO */ | ||
| 466 | PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT), | ||
| 467 | PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT), | ||
| 468 | PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT), | ||
| 469 | PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT), | ||
| 470 | PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT), | ||
| 471 | PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT), | ||
| 472 | PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT), | ||
| 473 | PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT), | ||
| 474 | |||
| 475 | /* PTE GPIO */ | ||
| 476 | PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT), | ||
| 477 | PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT), | ||
| 478 | PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT), | ||
| 479 | PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT), | ||
| 480 | PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT), | ||
| 481 | PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT), | ||
| 482 | |||
| 483 | /* PTF GPIO */ | ||
| 484 | PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT), | ||
| 485 | PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT), | ||
| 486 | PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT), | ||
| 487 | PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT), | ||
| 488 | PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT), | ||
| 489 | PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT), | ||
| 490 | PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT), | ||
| 491 | PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT), | ||
| 492 | |||
| 493 | /* PTG GPIO */ | ||
| 494 | PINMUX_DATA(PTG7_DATA, PTG7_IN, PTG7_OUT), | ||
| 495 | PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT), | ||
| 496 | PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT), | ||
| 497 | PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT), | ||
| 498 | PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT), | ||
| 499 | PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT), | ||
| 500 | PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT), | ||
| 501 | PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT), | ||
| 502 | |||
| 503 | /* PTH GPIO */ | ||
| 504 | PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT), | ||
| 505 | PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT), | ||
| 506 | PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT), | ||
| 507 | PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT), | ||
| 508 | PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT), | ||
| 509 | PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT), | ||
| 510 | PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT), | ||
| 511 | PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT), | ||
| 512 | |||
| 513 | /* PTI GPIO */ | ||
| 514 | PINMUX_DATA(PTI7_DATA, PTI7_IN, PTI7_OUT), | ||
| 515 | PINMUX_DATA(PTI6_DATA, PTI6_IN, PTI6_OUT), | ||
| 516 | PINMUX_DATA(PTI5_DATA, PTI5_IN, PTI5_OUT), | ||
| 517 | PINMUX_DATA(PTI4_DATA, PTI4_IN, PTI4_OUT), | ||
| 518 | PINMUX_DATA(PTI3_DATA, PTI3_IN, PTI3_OUT), | ||
| 519 | PINMUX_DATA(PTI2_DATA, PTI2_IN, PTI2_OUT), | ||
| 520 | PINMUX_DATA(PTI1_DATA, PTI1_IN, PTI1_OUT), | ||
| 521 | PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT), | ||
| 522 | |||
| 523 | /* PTJ GPIO */ | ||
| 524 | PINMUX_DATA(PTJ7_DATA, PTJ7_IN, PTJ7_OUT), | ||
| 525 | PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT), | ||
| 526 | PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT), | ||
| 527 | PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT), | ||
| 528 | PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT), | ||
| 529 | PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT), | ||
| 530 | PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT), | ||
| 531 | PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT), | ||
| 532 | |||
| 533 | /* PTK GPIO */ | ||
| 534 | PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT), | ||
| 535 | PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT), | ||
| 536 | PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT), | ||
| 537 | PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT), | ||
| 538 | PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT), | ||
| 539 | PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT), | ||
| 540 | PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT), | ||
| 541 | PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT), | ||
| 542 | |||
| 543 | /* PTL GPIO */ | ||
| 544 | PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT), | ||
| 545 | PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT), | ||
| 546 | PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT), | ||
| 547 | PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT), | ||
| 548 | PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT), | ||
| 549 | PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT), | ||
| 550 | PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT), | ||
| 551 | PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT), | ||
| 552 | |||
| 553 | /* PTM GPIO */ | ||
| 554 | PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT), | ||
| 555 | PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT), | ||
| 556 | PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT), | ||
| 557 | PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT), | ||
| 558 | PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT), | ||
| 559 | PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT), | ||
| 560 | PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT), | ||
| 561 | |||
| 562 | /* PTN GPIO */ | ||
| 563 | PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT), | ||
| 564 | PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT), | ||
| 565 | PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT), | ||
| 566 | PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT), | ||
| 567 | PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT), | ||
| 568 | PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT), | ||
| 569 | PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT), | ||
| 570 | PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT), | ||
| 571 | |||
| 572 | /* PTO GPIO */ | ||
| 573 | PINMUX_DATA(PTO7_DATA, PTO7_IN, PTO7_OUT), | ||
| 574 | PINMUX_DATA(PTO6_DATA, PTO6_IN, PTO6_OUT), | ||
| 575 | PINMUX_DATA(PTO5_DATA, PTO5_IN, PTO5_OUT), | ||
| 576 | PINMUX_DATA(PTO4_DATA, PTO4_IN, PTO4_OUT), | ||
| 577 | PINMUX_DATA(PTO3_DATA, PTO3_IN, PTO3_OUT), | ||
| 578 | PINMUX_DATA(PTO2_DATA, PTO2_IN, PTO2_OUT), | ||
| 579 | PINMUX_DATA(PTO1_DATA, PTO1_IN, PTO1_OUT), | ||
| 580 | PINMUX_DATA(PTO0_DATA, PTO0_IN, PTO0_OUT), | ||
| 581 | |||
| 582 | /* PTQ GPIO */ | ||
| 583 | PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT), | ||
| 584 | PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT), | ||
| 585 | PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT), | ||
| 586 | PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT), | ||
| 587 | PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT), | ||
| 588 | PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT), | ||
| 589 | PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT), | ||
| 590 | |||
| 591 | /* PTR GPIO */ | ||
| 592 | PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT), | ||
| 593 | PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT), | ||
| 594 | PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT), | ||
| 595 | PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT), | ||
| 596 | PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT), | ||
| 597 | PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT), | ||
| 598 | PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT), | ||
| 599 | PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT), | ||
| 600 | |||
| 601 | /* PTS GPIO */ | ||
| 602 | PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT), | ||
| 603 | PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT), | ||
| 604 | PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT), | ||
| 605 | PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT), | ||
| 606 | PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT), | ||
| 607 | PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT), | ||
| 608 | PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT), | ||
| 609 | PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT), | ||
| 610 | |||
| 611 | /* PTT GPIO */ | ||
| 612 | PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT), | ||
| 613 | PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT), | ||
| 614 | PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT), | ||
| 615 | PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT), | ||
| 616 | PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT), | ||
| 617 | PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT), | ||
| 618 | |||
| 619 | /* PTU GPIO */ | ||
| 620 | PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT), | ||
| 621 | PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT), | ||
| 622 | PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT), | ||
| 623 | PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT), | ||
| 624 | PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT), | ||
| 625 | PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT), | ||
| 626 | PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT), | ||
| 627 | PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT), | ||
| 628 | |||
| 629 | /* PTV GPIO */ | ||
| 630 | PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT), | ||
| 631 | PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT), | ||
| 632 | PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT), | ||
| 633 | PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT), | ||
| 634 | PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT), | ||
| 635 | PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT), | ||
| 636 | PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT), | ||
| 637 | PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT), | ||
| 638 | |||
| 639 | /* PTW GPIO */ | ||
| 640 | PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT), | ||
| 641 | PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT), | ||
| 642 | PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT), | ||
| 643 | PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT), | ||
| 644 | PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT), | ||
| 645 | PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT), | ||
| 646 | PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT), | ||
| 647 | PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT), | ||
| 648 | |||
| 649 | /* PTX GPIO */ | ||
| 650 | PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT), | ||
| 651 | PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT), | ||
| 652 | PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT), | ||
| 653 | PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT), | ||
| 654 | PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT), | ||
| 655 | PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT), | ||
| 656 | PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT), | ||
| 657 | PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT), | ||
| 658 | |||
| 659 | /* PTY GPIO */ | ||
| 660 | PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT), | ||
| 661 | PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT), | ||
| 662 | PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT), | ||
| 663 | PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT), | ||
| 664 | PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT), | ||
| 665 | PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT), | ||
| 666 | PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT), | ||
| 667 | PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT), | ||
| 668 | |||
| 669 | /* PTZ GPIO */ | ||
| 670 | PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT), | ||
| 671 | PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT), | ||
| 672 | PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT), | ||
| 673 | PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT), | ||
| 674 | PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT), | ||
| 675 | PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT), | ||
| 676 | PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT), | ||
| 677 | PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT), | ||
| 678 | |||
| 679 | /* PTA FN */ | ||
| 680 | PINMUX_DATA(BS_MARK, PS0_15_FN1, PTA7_FN), | ||
| 681 | PINMUX_DATA(LGPIO7_MARK, PS0_15_FN3, PTA7_FN), | ||
| 682 | PINMUX_DATA(RDWR_MARK, PS0_14_FN1, PTA6_FN), | ||
| 683 | PINMUX_DATA(LGPIO6_MARK, PS0_14_FN3, PTA6_FN), | ||
| 684 | PINMUX_DATA(WE1_MARK, PS0_13_FN1, PTA5_FN), | ||
| 685 | PINMUX_DATA(LGPIO5_MARK, PS0_13_FN3, PTA5_FN), | ||
| 686 | PINMUX_DATA(RDY_MARK, PS0_12_FN1, PTA4_FN), | ||
| 687 | PINMUX_DATA(LGPIO4_MARK, PS0_12_FN3, PTA4_FN), | ||
| 688 | PINMUX_DATA(LGPIO3_MARK, PTA3_FN), | ||
| 689 | PINMUX_DATA(LGPIO2_MARK, PTA2_FN), | ||
| 690 | PINMUX_DATA(LGPIO1_MARK, PTA1_FN), | ||
| 691 | PINMUX_DATA(LGPIO0_MARK, PTA0_FN), | ||
| 692 | |||
| 693 | /* PTB FN */ | ||
| 694 | PINMUX_DATA(D15_MARK, PS0_7_FN1, PTB7_FN), | ||
| 695 | PINMUX_DATA(ET0_MDC_MARK, PS0_7_FN2, PTB7_FN), | ||
| 696 | PINMUX_DATA(D14_MARK, PS0_6_FN1, PTB6_FN), | ||
| 697 | PINMUX_DATA(ET0_MDIO_MARK, PS0_6_FN2, PTB6_FN), | ||
| 698 | PINMUX_DATA(D13_MARK, PS0_5_FN1, PTB5_FN), | ||
| 699 | PINMUX_DATA(ET1_MDC_MARK, PS0_5_FN2, PTB5_FN), | ||
| 700 | PINMUX_DATA(D12_MARK, PS0_4_FN1, PTB4_FN), | ||
| 701 | PINMUX_DATA(ET1_MDIO_MARK, PS0_4_FN2, PTB4_FN), | ||
| 702 | PINMUX_DATA(D11_MARK, PS0_3_FN1, PTB3_FN), | ||
| 703 | PINMUX_DATA(SIM_D_MARK, PS0_3_FN2, PTB3_FN), | ||
| 704 | PINMUX_DATA(D10_MARK, PS0_2_FN1, PTB2_FN), | ||
| 705 | PINMUX_DATA(SIM_CLK_MARK, PS0_2_FN2, PTB2_FN), | ||
| 706 | PINMUX_DATA(D9_MARK, PS0_1_FN1, PTB1_FN), | ||
| 707 | PINMUX_DATA(SIM_RST_MARK, PS0_1_FN2, PTB1_FN), | ||
| 708 | PINMUX_DATA(D8_MARK, PTB0_FN), | ||
| 709 | |||
| 710 | /* PTC FN */ | ||
| 711 | PINMUX_DATA(SD_WP_MARK, PTC7_FN), | ||
| 712 | PINMUX_DATA(SD_CD_MARK, PTC6_FN), | ||
| 713 | PINMUX_DATA(SD_CLK_MARK, PTC5_FN), | ||
| 714 | PINMUX_DATA(SD_CMD_MARK, PTC4_FN), | ||
| 715 | PINMUX_DATA(SD_D3_MARK, PTC3_FN), | ||
| 716 | PINMUX_DATA(SD_D2_MARK, PTC2_FN), | ||
| 717 | PINMUX_DATA(SD_D1_MARK, PTC1_FN), | ||
| 718 | PINMUX_DATA(SD_D0_MARK, PTC0_FN), | ||
| 719 | |||
| 720 | /* PTD FN */ | ||
| 721 | PINMUX_DATA(IRQ7_MARK, PS1_7_FN1, PTD7_FN), | ||
| 722 | PINMUX_DATA(ADTRG1_MARK, PS1_7_FN3, PTD7_FN), | ||
| 723 | PINMUX_DATA(IRQ6_MARK, PS1_6_FN1, PTD6_FN), | ||
| 724 | PINMUX_DATA(ADTRG0_MARK, PS1_6_FN3, PTD6_FN), | ||
| 725 | PINMUX_DATA(IRQ5_MARK, PTD5_FN), | ||
| 726 | PINMUX_DATA(IRQ4_MARK, PTD4_FN), | ||
| 727 | PINMUX_DATA(IRQ3_MARK, PTD3_FN), | ||
| 728 | PINMUX_DATA(IRQ2_MARK, PTD2_FN), | ||
| 729 | PINMUX_DATA(IRQ1_MARK, PTD1_FN), | ||
| 730 | PINMUX_DATA(IRQ0_MARK, PTD0_FN), | ||
| 731 | |||
| 732 | /* PTE FN */ | ||
| 733 | PINMUX_DATA(ET0_CRS_DV_MARK, PTE7_FN), | ||
| 734 | PINMUX_DATA(ET0_TXD1_MARK, PTE6_FN), | ||
| 735 | PINMUX_DATA(ET0_TXD0_MARK, PTE5_FN), | ||
| 736 | PINMUX_DATA(ET0_TX_EN_MARK, PTE4_FN), | ||
| 737 | PINMUX_DATA(ET0_REF_CLK_MARK, PTE3_FN), | ||
| 738 | PINMUX_DATA(ET0_RXD1_MARK, PTE2_FN), | ||
| 739 | PINMUX_DATA(ET0_RXD0_MARK, PTE1_FN), | ||
| 740 | PINMUX_DATA(ET0_RX_ER_MARK, PTE0_FN), | ||
| 741 | |||
| 742 | /* PTF FN */ | ||
| 743 | PINMUX_DATA(ET1_CRS_DV_MARK, PTF7_FN), | ||
| 744 | PINMUX_DATA(ET1_TXD1_MARK, PTF6_FN), | ||
| 745 | PINMUX_DATA(ET1_TXD0_MARK, PTF5_FN), | ||
| 746 | PINMUX_DATA(ET1_TX_EN_MARK, PTF4_FN), | ||
| 747 | PINMUX_DATA(ET1_REF_CLK_MARK, PTF3_FN), | ||
| 748 | PINMUX_DATA(ET1_RXD1_MARK, PTF2_FN), | ||
| 749 | PINMUX_DATA(ET1_RXD0_MARK, PTF1_FN), | ||
| 750 | PINMUX_DATA(ET1_RX_ER_MARK, PTF0_FN), | ||
| 751 | |||
| 752 | /* PTG FN */ | ||
| 753 | PINMUX_DATA(PWX0_MARK, PTG7_FN), | ||
| 754 | PINMUX_DATA(PWX1_MARK, PTG6_FN), | ||
| 755 | PINMUX_DATA(STATUS0_MARK, PS2_13_FN1, PTG5_FN), | ||
| 756 | PINMUX_DATA(PWX2_MARK, PS2_13_FN3, PTG5_FN), | ||
| 757 | PINMUX_DATA(STATUS1_MARK, PS2_12_FN1, PTG4_FN), | ||
| 758 | PINMUX_DATA(PWX3_MARK, PS2_12_FN3, PTG4_FN), | ||
| 759 | PINMUX_DATA(SERIRQ_MARK, PTG3_FN), | ||
| 760 | PINMUX_DATA(CLKRUN_MARK, PTG2_FN), | ||
| 761 | PINMUX_DATA(LPCPD_MARK, PTG1_FN), | ||
| 762 | PINMUX_DATA(LDRQ_MARK, PTG0_FN), | ||
| 763 | |||
| 764 | /* PTH FN */ | ||
| 765 | PINMUX_DATA(SP1_MOSI_MARK, PTH7_FN), | ||
| 766 | PINMUX_DATA(SP1_MISO_MARK, PTH6_FN), | ||
| 767 | PINMUX_DATA(SP1_SCK_MARK, PTH5_FN), | ||
| 768 | PINMUX_DATA(SP1_SCK_FB_MARK, PTH4_FN), | ||
| 769 | PINMUX_DATA(SP1_SS0_MARK, PTH3_FN), | ||
| 770 | PINMUX_DATA(TCLK_MARK, PTH2_FN), | ||
| 771 | PINMUX_DATA(RXD4_MARK, PS2_1_FN1, PTH1_FN), | ||
| 772 | PINMUX_DATA(SP1_SS1_MARK, PS2_1_FN2, PTH1_FN), | ||
| 773 | PINMUX_DATA(TXD4_MARK, PS2_0_FN1, PTH0_FN), | ||
| 774 | PINMUX_DATA(SP0_SS1_MARK, PS2_0_FN2, PTH0_FN), | ||
| 775 | |||
| 776 | /* PTI FN */ | ||
| 777 | PINMUX_DATA(IRQ15_MARK, PTI7_FN), | ||
| 778 | PINMUX_DATA(IRQ14_MARK, PTI6_FN), | ||
| 779 | PINMUX_DATA(IRQ13_MARK, PTI5_FN), | ||
| 780 | PINMUX_DATA(IRQ12_MARK, PTI4_FN), | ||
| 781 | PINMUX_DATA(IRQ11_MARK, PTI3_FN), | ||
| 782 | PINMUX_DATA(IRQ10_MARK, PTI2_FN), | ||
| 783 | PINMUX_DATA(IRQ9_MARK, PTI1_FN), | ||
| 784 | PINMUX_DATA(IRQ8_MARK, PTI0_FN), | ||
| 785 | |||
| 786 | /* PTJ FN */ | ||
| 787 | PINMUX_DATA(RXD3_MARK, PTJ7_FN), | ||
| 788 | PINMUX_DATA(TXD3_MARK, PTJ6_FN), | ||
| 789 | PINMUX_DATA(RXD2_MARK, PTJ5_FN), | ||
| 790 | PINMUX_DATA(TXD2_MARK, PTJ4_FN), | ||
| 791 | PINMUX_DATA(COM1_TXD_MARK, PTJ3_FN), | ||
| 792 | PINMUX_DATA(COM1_RXD_MARK, PTJ2_FN), | ||
| 793 | PINMUX_DATA(COM1_RTS_MARK, PTJ1_FN), | ||
| 794 | PINMUX_DATA(COM1_CTS_MARK, PTJ0_FN), | ||
| 795 | |||
| 796 | /* PTK FN */ | ||
| 797 | PINMUX_DATA(COM2_TXD_MARK, PTK7_FN), | ||
| 798 | PINMUX_DATA(COM2_RXD_MARK, PTK6_FN), | ||
| 799 | PINMUX_DATA(COM2_RTS_MARK, PTK5_FN), | ||
| 800 | PINMUX_DATA(COM2_CTS_MARK, PTK4_FN), | ||
| 801 | PINMUX_DATA(COM2_DTR_MARK, PTK3_FN), | ||
| 802 | PINMUX_DATA(COM2_DSR_MARK, PTK2_FN), | ||
| 803 | PINMUX_DATA(COM2_DCD_MARK, PTK1_FN), | ||
| 804 | PINMUX_DATA(COM2_RI_MARK, PTK0_FN), | ||
| 805 | |||
| 806 | /* PTL FN */ | ||
| 807 | PINMUX_DATA(RAC_TXD_MARK, PTL7_FN), | ||
| 808 | PINMUX_DATA(RAC_RXD_MARK, PTL6_FN), | ||
| 809 | PINMUX_DATA(RAC_RTS_MARK, PTL5_FN), | ||
| 810 | PINMUX_DATA(RAC_CTS_MARK, PTL4_FN), | ||
| 811 | PINMUX_DATA(RAC_DTR_MARK, PTL3_FN), | ||
| 812 | PINMUX_DATA(RAC_DSR_MARK, PTL2_FN), | ||
| 813 | PINMUX_DATA(RAC_DCD_MARK, PTL1_FN), | ||
| 814 | PINMUX_DATA(RAC_RI_MARK, PTL0_FN), | ||
| 815 | |||
| 816 | /* PTM FN */ | ||
| 817 | PINMUX_DATA(WP_MARK, PTM6_FN), | ||
| 818 | PINMUX_DATA(FMS0_MARK, PTM5_FN), | ||
| 819 | PINMUX_DATA(FMS1_MARK, PTM4_FN), | ||
| 820 | PINMUX_DATA(SDA6_MARK, PTM3_FN), | ||
| 821 | PINMUX_DATA(SCL6_MARK, PTM2_FN), | ||
| 822 | PINMUX_DATA(SDA7_MARK, PTM1_FN), | ||
| 823 | PINMUX_DATA(SCL7_MARK, PTM0_FN), | ||
| 824 | |||
| 825 | /* PTN FN */ | ||
| 826 | PINMUX_DATA(SCK2_MARK, PS4_15_FN1, PTN7_FN), | ||
| 827 | PINMUX_DATA(EVENT7_MARK, PS4_15_FN2, PTN7_FN), | ||
| 828 | PINMUX_DATA(RTS4_MARK, PS4_14_FN1, PTN6_FN), | ||
| 829 | PINMUX_DATA(EVENT6_MARK, PS4_14_FN2, PTN6_FN), | ||
| 830 | PINMUX_DATA(RTS3_MARK, PS4_13_FN1, PTN5_FN), | ||
| 831 | PINMUX_DATA(EVENT5_MARK, PS4_13_FN2, PTN5_FN), | ||
| 832 | PINMUX_DATA(RTS2_MARK, PS4_12_FN1, PTN4_FN), | ||
| 833 | PINMUX_DATA(EVENT4_MARK, PS4_12_FN2, PTN4_FN), | ||
| 834 | PINMUX_DATA(CTS4_MARK, PS4_11_FN1, PTN3_FN), | ||
| 835 | PINMUX_DATA(EVENT3_MARK, PS4_11_FN2, PTN3_FN), | ||
| 836 | PINMUX_DATA(CTS3_MARK, PS4_10_FN1, PTN2_FN), | ||
| 837 | PINMUX_DATA(EVENT2_MARK, PS4_10_FN2, PTN2_FN), | ||
| 838 | PINMUX_DATA(CTS2_MARK, PS4_9_FN1, PTN1_FN), | ||
| 839 | PINMUX_DATA(EVENT1_MARK, PS4_9_FN2, PTN1_FN), | ||
| 840 | PINMUX_DATA(EVENT0_MARK, PTN0_FN), | ||
| 841 | |||
| 842 | /* PTO FN */ | ||
| 843 | PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN), | ||
| 844 | PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN), | ||
| 845 | PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN), | ||
| 846 | PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN), | ||
| 847 | PINMUX_DATA(SGPIO1_CLK_MARK, PTO3_FN), | ||
| 848 | PINMUX_DATA(SGPIO1_LOAD_MARK, PTO2_FN), | ||
| 849 | PINMUX_DATA(SGPIO1_DI_MARK, PTO1_FN), | ||
| 850 | PINMUX_DATA(SGPIO1_DO_MARK, PTO0_FN), | ||
| 851 | |||
| 852 | /* PTP FN */ | ||
| 853 | PINMUX_DATA(JMCTCK_MARK, PTP6_FN), | ||
| 854 | PINMUX_DATA(JMCTMS_MARK, PTP5_FN), | ||
| 855 | PINMUX_DATA(JMCTDO_MARK, PTP4_FN), | ||
| 856 | PINMUX_DATA(JMCTDI_MARK, PTP3_FN), | ||
| 857 | PINMUX_DATA(JMCRST_MARK, PTP2_FN), | ||
| 858 | PINMUX_DATA(SCK4_MARK, PTP1_FN), | ||
| 859 | PINMUX_DATA(SCK3_MARK, PTP0_FN), | ||
| 860 | |||
| 861 | /* PTQ FN */ | ||
| 862 | PINMUX_DATA(LAD3_MARK, PTQ6_FN), | ||
| 863 | PINMUX_DATA(LAD2_MARK, PTQ5_FN), | ||
| 864 | PINMUX_DATA(LAD1_MARK, PTQ4_FN), | ||
| 865 | PINMUX_DATA(LAD0_MARK, PTQ3_FN), | ||
| 866 | PINMUX_DATA(LFRAME_MARK, PTQ2_FN), | ||
| 867 | PINMUX_DATA(SCK4_MARK, PTQ1_FN), | ||
| 868 | PINMUX_DATA(SCK3_MARK, PTQ0_FN), | ||
| 869 | |||
| 870 | /* PTR FN */ | ||
| 871 | PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */ | ||
| 872 | PINMUX_DATA(SCL8_MARK, PTR6_FN), /* DDC2? */ | ||
| 873 | PINMUX_DATA(SDA2_MARK, PTR5_FN), | ||
| 874 | PINMUX_DATA(SCL2_MARK, PTR4_FN), | ||
| 875 | PINMUX_DATA(SDA1_MARK, PTR3_FN), | ||
| 876 | PINMUX_DATA(SCL1_MARK, PTR2_FN), | ||
| 877 | PINMUX_DATA(SDA0_MARK, PTR1_FN), | ||
| 878 | PINMUX_DATA(SCL0_MARK, PTR0_FN), | ||
| 879 | |||
| 880 | /* PTS FN */ | ||
| 881 | PINMUX_DATA(SDA9_MARK, PTS7_FN), /* DDC1? */ | ||
| 882 | PINMUX_DATA(SCL9_MARK, PTS6_FN), /* DDC0? */ | ||
| 883 | PINMUX_DATA(SDA5_MARK, PTS5_FN), | ||
| 884 | PINMUX_DATA(SCL5_MARK, PTS4_FN), | ||
| 885 | PINMUX_DATA(SDA4_MARK, PTS3_FN), | ||
| 886 | PINMUX_DATA(SCL4_MARK, PTS2_FN), | ||
| 887 | PINMUX_DATA(SDA3_MARK, PTS1_FN), | ||
| 888 | PINMUX_DATA(SCL3_MARK, PTS0_FN), | ||
| 889 | |||
| 890 | /* PTT FN */ | ||
| 891 | PINMUX_DATA(AUDSYNC_MARK, PTS5_FN), | ||
| 892 | PINMUX_DATA(AUDCK_MARK, PTS4_FN), | ||
| 893 | PINMUX_DATA(AUDATA3_MARK, PS4_3_FN1, PTS3_FN), | ||
| 894 | PINMUX_DATA(PWX7_MARK, PS4_3_FN2, PTS3_FN), | ||
| 895 | PINMUX_DATA(AUDATA2_MARK, PS4_2_FN1, PTS2_FN), | ||
| 896 | PINMUX_DATA(PWX6_MARK, PS4_2_FN2, PTS2_FN), | ||
| 897 | PINMUX_DATA(AUDATA1_MARK, PS4_1_FN1, PTS1_FN), | ||
| 898 | PINMUX_DATA(PWX5_MARK, PS4_1_FN2, PTS1_FN), | ||
| 899 | PINMUX_DATA(AUDATA0_MARK, PS4_0_FN1, PTS0_FN), | ||
| 900 | PINMUX_DATA(PWX4_MARK, PS4_0_FN2, PTS0_FN), | ||
| 901 | |||
| 902 | /* PTU FN */ | ||
| 903 | PINMUX_DATA(CS6_MARK, PTU7_FN), | ||
| 904 | PINMUX_DATA(CS5_MARK, PTU6_FN), | ||
| 905 | PINMUX_DATA(CS4_MARK, PTU5_FN), | ||
| 906 | PINMUX_DATA(CS0_MARK, PTU4_FN), | ||
| 907 | PINMUX_DATA(RD_MARK, PTU3_FN), | ||
| 908 | PINMUX_DATA(WE0_MARK, PTU2_FN), | ||
| 909 | PINMUX_DATA(A25_MARK, PS5_9_FN1, PTU1_FN), | ||
| 910 | PINMUX_DATA(DREQ0_MARK, PS5_9_FN2, PTU1_FN), | ||
| 911 | PINMUX_DATA(A24_MARK, PS5_8_FN1, PTU0_FN), | ||
| 912 | PINMUX_DATA(DACK0_MARK, PS5_8_FN2, PTU0_FN), | ||
| 913 | |||
| 914 | /* PTV FN */ | ||
| 915 | PINMUX_DATA(A23_MARK, PS5_7_FN1, PTV7_FN), | ||
| 916 | PINMUX_DATA(TEND0_MARK, PS5_7_FN2, PTV7_FN), | ||
| 917 | PINMUX_DATA(A22_MARK, PS5_6_FN1, PTV6_FN), | ||
| 918 | PINMUX_DATA(DREQ1_MARK, PS5_6_FN2, PTV6_FN), | ||
| 919 | PINMUX_DATA(A21_MARK, PS5_5_FN1, PTV5_FN), | ||
| 920 | PINMUX_DATA(DACK1_MARK, PS5_5_FN2, PTV5_FN), | ||
| 921 | PINMUX_DATA(A20_MARK, PS5_4_FN1, PTV4_FN), | ||
| 922 | PINMUX_DATA(TEND1_MARK, PS5_4_FN2, PTV4_FN), | ||
| 923 | PINMUX_DATA(A19_MARK, PTV3_FN), | ||
| 924 | PINMUX_DATA(A18_MARK, PTV2_FN), | ||
| 925 | PINMUX_DATA(A17_MARK, PTV1_FN), | ||
| 926 | PINMUX_DATA(A16_MARK, PTV0_FN), | ||
| 927 | |||
| 928 | /* PTW FN */ | ||
| 929 | PINMUX_DATA(A15_MARK, PTW7_FN), | ||
| 930 | PINMUX_DATA(A14_MARK, PTW6_FN), | ||
| 931 | PINMUX_DATA(A13_MARK, PTW5_FN), | ||
| 932 | PINMUX_DATA(A12_MARK, PTW4_FN), | ||
| 933 | PINMUX_DATA(A11_MARK, PTW3_FN), | ||
| 934 | PINMUX_DATA(A10_MARK, PTW2_FN), | ||
| 935 | PINMUX_DATA(A9_MARK, PTW1_FN), | ||
| 936 | PINMUX_DATA(A8_MARK, PTW0_FN), | ||
| 937 | |||
| 938 | /* PTX FN */ | ||
| 939 | PINMUX_DATA(A7_MARK, PTX7_FN), | ||
| 940 | PINMUX_DATA(A6_MARK, PTX6_FN), | ||
| 941 | PINMUX_DATA(A5_MARK, PTX5_FN), | ||
| 942 | PINMUX_DATA(A4_MARK, PTX4_FN), | ||
| 943 | PINMUX_DATA(A3_MARK, PTX3_FN), | ||
| 944 | PINMUX_DATA(A2_MARK, PTX2_FN), | ||
| 945 | PINMUX_DATA(A1_MARK, PTX1_FN), | ||
| 946 | PINMUX_DATA(A0_MARK, PTX0_FN), | ||
| 947 | |||
| 948 | /* PTY FN */ | ||
| 949 | PINMUX_DATA(D7_MARK, PTY7_FN), | ||
| 950 | PINMUX_DATA(D6_MARK, PTY6_FN), | ||
| 951 | PINMUX_DATA(D5_MARK, PTY5_FN), | ||
| 952 | PINMUX_DATA(D4_MARK, PTY4_FN), | ||
| 953 | PINMUX_DATA(D3_MARK, PTY3_FN), | ||
| 954 | PINMUX_DATA(D2_MARK, PTY2_FN), | ||
| 955 | PINMUX_DATA(D1_MARK, PTY1_FN), | ||
| 956 | PINMUX_DATA(D0_MARK, PTY0_FN), | ||
| 957 | }; | ||
| 958 | |||
| 959 | static struct pinmux_gpio pinmux_gpios[] = { | ||
| 960 | /* PTA */ | ||
| 961 | PINMUX_GPIO(GPIO_PTA7, PTA7_DATA), | ||
| 962 | PINMUX_GPIO(GPIO_PTA6, PTA6_DATA), | ||
| 963 | PINMUX_GPIO(GPIO_PTA5, PTA5_DATA), | ||
| 964 | PINMUX_GPIO(GPIO_PTA4, PTA4_DATA), | ||
| 965 | PINMUX_GPIO(GPIO_PTA3, PTA3_DATA), | ||
| 966 | PINMUX_GPIO(GPIO_PTA2, PTA2_DATA), | ||
| 967 | PINMUX_GPIO(GPIO_PTA1, PTA1_DATA), | ||
| 968 | PINMUX_GPIO(GPIO_PTA0, PTA0_DATA), | ||
| 969 | |||
| 970 | /* PTB */ | ||
| 971 | PINMUX_GPIO(GPIO_PTB7, PTB7_DATA), | ||
| 972 | PINMUX_GPIO(GPIO_PTB6, PTB6_DATA), | ||
| 973 | PINMUX_GPIO(GPIO_PTB5, PTB5_DATA), | ||
| 974 | PINMUX_GPIO(GPIO_PTB4, PTB4_DATA), | ||
| 975 | PINMUX_GPIO(GPIO_PTB3, PTB3_DATA), | ||
| 976 | PINMUX_GPIO(GPIO_PTB2, PTB2_DATA), | ||
| 977 | PINMUX_GPIO(GPIO_PTB1, PTB1_DATA), | ||
| 978 | PINMUX_GPIO(GPIO_PTB0, PTB0_DATA), | ||
| 979 | |||
| 980 | /* PTC */ | ||
| 981 | PINMUX_GPIO(GPIO_PTC7, PTC7_DATA), | ||
| 982 | PINMUX_GPIO(GPIO_PTC6, PTC6_DATA), | ||
| 983 | PINMUX_GPIO(GPIO_PTC5, PTC5_DATA), | ||
| 984 | PINMUX_GPIO(GPIO_PTC4, PTC4_DATA), | ||
| 985 | PINMUX_GPIO(GPIO_PTC3, PTC3_DATA), | ||
| 986 | PINMUX_GPIO(GPIO_PTC2, PTC2_DATA), | ||
| 987 | PINMUX_GPIO(GPIO_PTC1, PTC1_DATA), | ||
| 988 | PINMUX_GPIO(GPIO_PTC0, PTC0_DATA), | ||
| 989 | |||
| 990 | /* PTD */ | ||
| 991 | PINMUX_GPIO(GPIO_PTD7, PTD7_DATA), | ||
| 992 | PINMUX_GPIO(GPIO_PTD6, PTD6_DATA), | ||
| 993 | PINMUX_GPIO(GPIO_PTD5, PTD5_DATA), | ||
| 994 | PINMUX_GPIO(GPIO_PTD4, PTD4_DATA), | ||
| 995 | PINMUX_GPIO(GPIO_PTD3, PTD3_DATA), | ||
| 996 | PINMUX_GPIO(GPIO_PTD2, PTD2_DATA), | ||
| 997 | PINMUX_GPIO(GPIO_PTD1, PTD1_DATA), | ||
| 998 | PINMUX_GPIO(GPIO_PTD0, PTD0_DATA), | ||
| 999 | |||
| 1000 | /* PTE */ | ||
| 1001 | PINMUX_GPIO(GPIO_PTE7, PTE7_DATA), | ||
| 1002 | PINMUX_GPIO(GPIO_PTE6, PTE6_DATA), | ||
| 1003 | PINMUX_GPIO(GPIO_PTE5, PTE5_DATA), | ||
| 1004 | PINMUX_GPIO(GPIO_PTE4, PTE4_DATA), | ||
| 1005 | PINMUX_GPIO(GPIO_PTE3, PTE3_DATA), | ||
| 1006 | PINMUX_GPIO(GPIO_PTE2, PTE2_DATA), | ||
| 1007 | PINMUX_GPIO(GPIO_PTE1, PTE1_DATA), | ||
| 1008 | PINMUX_GPIO(GPIO_PTE0, PTE0_DATA), | ||
| 1009 | |||
| 1010 | /* PTF */ | ||
| 1011 | PINMUX_GPIO(GPIO_PTF7, PTF7_DATA), | ||
| 1012 | PINMUX_GPIO(GPIO_PTF6, PTF6_DATA), | ||
| 1013 | PINMUX_GPIO(GPIO_PTF5, PTF5_DATA), | ||
| 1014 | PINMUX_GPIO(GPIO_PTF4, PTF4_DATA), | ||
| 1015 | PINMUX_GPIO(GPIO_PTF3, PTF3_DATA), | ||
| 1016 | PINMUX_GPIO(GPIO_PTF2, PTF2_DATA), | ||
| 1017 | PINMUX_GPIO(GPIO_PTF1, PTF1_DATA), | ||
| 1018 | PINMUX_GPIO(GPIO_PTF0, PTF0_DATA), | ||
| 1019 | |||
| 1020 | /* PTG */ | ||
| 1021 | PINMUX_GPIO(GPIO_PTG7, PTG7_DATA), | ||
| 1022 | PINMUX_GPIO(GPIO_PTG6, PTG6_DATA), | ||
| 1023 | PINMUX_GPIO(GPIO_PTG5, PTG5_DATA), | ||
| 1024 | PINMUX_GPIO(GPIO_PTG4, PTG4_DATA), | ||
| 1025 | PINMUX_GPIO(GPIO_PTG3, PTG3_DATA), | ||
| 1026 | PINMUX_GPIO(GPIO_PTG2, PTG2_DATA), | ||
| 1027 | PINMUX_GPIO(GPIO_PTG1, PTG1_DATA), | ||
| 1028 | PINMUX_GPIO(GPIO_PTG0, PTG0_DATA), | ||
| 1029 | |||
| 1030 | /* PTH */ | ||
| 1031 | PINMUX_GPIO(GPIO_PTH7, PTH7_DATA), | ||
| 1032 | PINMUX_GPIO(GPIO_PTH6, PTH6_DATA), | ||
| 1033 | PINMUX_GPIO(GPIO_PTH5, PTH5_DATA), | ||
| 1034 | PINMUX_GPIO(GPIO_PTH4, PTH4_DATA), | ||
| 1035 | PINMUX_GPIO(GPIO_PTH3, PTH3_DATA), | ||
| 1036 | PINMUX_GPIO(GPIO_PTH2, PTH2_DATA), | ||
| 1037 | PINMUX_GPIO(GPIO_PTH1, PTH1_DATA), | ||
| 1038 | PINMUX_GPIO(GPIO_PTH0, PTH0_DATA), | ||
| 1039 | |||
| 1040 | /* PTI */ | ||
| 1041 | PINMUX_GPIO(GPIO_PTI7, PTI7_DATA), | ||
| 1042 | PINMUX_GPIO(GPIO_PTI6, PTI6_DATA), | ||
| 1043 | PINMUX_GPIO(GPIO_PTI5, PTI5_DATA), | ||
| 1044 | PINMUX_GPIO(GPIO_PTI4, PTI4_DATA), | ||
| 1045 | PINMUX_GPIO(GPIO_PTI3, PTI3_DATA), | ||
| 1046 | PINMUX_GPIO(GPIO_PTI2, PTI2_DATA), | ||
| 1047 | PINMUX_GPIO(GPIO_PTI1, PTI1_DATA), | ||
| 1048 | PINMUX_GPIO(GPIO_PTI0, PTI0_DATA), | ||
| 1049 | |||
| 1050 | /* PTJ */ | ||
| 1051 | PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA), | ||
| 1052 | PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA), | ||
| 1053 | PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA), | ||
| 1054 | PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA), | ||
| 1055 | PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA), | ||
| 1056 | PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA), | ||
| 1057 | PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA), | ||
| 1058 | PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA), | ||
| 1059 | |||
| 1060 | /* PTK */ | ||
| 1061 | PINMUX_GPIO(GPIO_PTK7, PTK7_DATA), | ||
| 1062 | PINMUX_GPIO(GPIO_PTK6, PTK6_DATA), | ||
| 1063 | PINMUX_GPIO(GPIO_PTK5, PTK5_DATA), | ||
| 1064 | PINMUX_GPIO(GPIO_PTK4, PTK4_DATA), | ||
| 1065 | PINMUX_GPIO(GPIO_PTK3, PTK3_DATA), | ||
| 1066 | PINMUX_GPIO(GPIO_PTK2, PTK2_DATA), | ||
| 1067 | PINMUX_GPIO(GPIO_PTK1, PTK1_DATA), | ||
| 1068 | PINMUX_GPIO(GPIO_PTK0, PTK0_DATA), | ||
| 1069 | |||
| 1070 | /* PTL */ | ||
| 1071 | PINMUX_GPIO(GPIO_PTL7, PTL7_DATA), | ||
| 1072 | PINMUX_GPIO(GPIO_PTL6, PTL6_DATA), | ||
| 1073 | PINMUX_GPIO(GPIO_PTL5, PTL5_DATA), | ||
| 1074 | PINMUX_GPIO(GPIO_PTL4, PTL4_DATA), | ||
| 1075 | PINMUX_GPIO(GPIO_PTL3, PTL3_DATA), | ||
| 1076 | PINMUX_GPIO(GPIO_PTL2, PTL2_DATA), | ||
| 1077 | PINMUX_GPIO(GPIO_PTL1, PTL1_DATA), | ||
| 1078 | PINMUX_GPIO(GPIO_PTL0, PTL0_DATA), | ||
| 1079 | |||
| 1080 | /* PTM */ | ||
| 1081 | PINMUX_GPIO(GPIO_PTM6, PTM6_DATA), | ||
| 1082 | PINMUX_GPIO(GPIO_PTM5, PTM5_DATA), | ||
| 1083 | PINMUX_GPIO(GPIO_PTM4, PTM4_DATA), | ||
| 1084 | PINMUX_GPIO(GPIO_PTM3, PTM3_DATA), | ||
| 1085 | PINMUX_GPIO(GPIO_PTM2, PTM2_DATA), | ||
| 1086 | PINMUX_GPIO(GPIO_PTM1, PTM1_DATA), | ||
| 1087 | PINMUX_GPIO(GPIO_PTM0, PTM0_DATA), | ||
| 1088 | |||
| 1089 | /* PTN */ | ||
| 1090 | PINMUX_GPIO(GPIO_PTN7, PTN7_DATA), | ||
| 1091 | PINMUX_GPIO(GPIO_PTN6, PTN6_DATA), | ||
| 1092 | PINMUX_GPIO(GPIO_PTN5, PTN5_DATA), | ||
| 1093 | PINMUX_GPIO(GPIO_PTN4, PTN4_DATA), | ||
| 1094 | PINMUX_GPIO(GPIO_PTN3, PTN3_DATA), | ||
| 1095 | PINMUX_GPIO(GPIO_PTN2, PTN2_DATA), | ||
| 1096 | PINMUX_GPIO(GPIO_PTN1, PTN1_DATA), | ||
| 1097 | PINMUX_GPIO(GPIO_PTN0, PTN0_DATA), | ||
| 1098 | |||
| 1099 | /* PTO */ | ||
| 1100 | PINMUX_GPIO(GPIO_PTO7, PTO7_DATA), | ||
| 1101 | PINMUX_GPIO(GPIO_PTO6, PTO6_DATA), | ||
| 1102 | PINMUX_GPIO(GPIO_PTO5, PTO5_DATA), | ||
| 1103 | PINMUX_GPIO(GPIO_PTO4, PTO4_DATA), | ||
| 1104 | PINMUX_GPIO(GPIO_PTO3, PTO3_DATA), | ||
| 1105 | PINMUX_GPIO(GPIO_PTO2, PTO2_DATA), | ||
| 1106 | PINMUX_GPIO(GPIO_PTO1, PTO1_DATA), | ||
| 1107 | PINMUX_GPIO(GPIO_PTO0, PTO0_DATA), | ||
| 1108 | |||
| 1109 | /* PTP */ | ||
| 1110 | PINMUX_GPIO(GPIO_PTP6, PTP6_DATA), | ||
| 1111 | PINMUX_GPIO(GPIO_PTP5, PTP5_DATA), | ||
| 1112 | PINMUX_GPIO(GPIO_PTP4, PTP4_DATA), | ||
| 1113 | PINMUX_GPIO(GPIO_PTP3, PTP3_DATA), | ||
| 1114 | PINMUX_GPIO(GPIO_PTP2, PTP2_DATA), | ||
| 1115 | PINMUX_GPIO(GPIO_PTP1, PTP1_DATA), | ||
| 1116 | PINMUX_GPIO(GPIO_PTP0, PTP0_DATA), | ||
| 1117 | |||
| 1118 | /* PTQ */ | ||
| 1119 | PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA), | ||
| 1120 | PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA), | ||
| 1121 | PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA), | ||
| 1122 | PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA), | ||
| 1123 | PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA), | ||
| 1124 | PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA), | ||
| 1125 | PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA), | ||
| 1126 | |||
| 1127 | /* PTR */ | ||
| 1128 | PINMUX_GPIO(GPIO_PTR7, PTR7_DATA), | ||
| 1129 | PINMUX_GPIO(GPIO_PTR6, PTR6_DATA), | ||
| 1130 | PINMUX_GPIO(GPIO_PTR5, PTR5_DATA), | ||
| 1131 | PINMUX_GPIO(GPIO_PTR4, PTR4_DATA), | ||
| 1132 | PINMUX_GPIO(GPIO_PTR3, PTR3_DATA), | ||
| 1133 | PINMUX_GPIO(GPIO_PTR2, PTR2_DATA), | ||
| 1134 | PINMUX_GPIO(GPIO_PTR1, PTR1_DATA), | ||
| 1135 | PINMUX_GPIO(GPIO_PTR0, PTR0_DATA), | ||
| 1136 | |||
| 1137 | /* PTS */ | ||
| 1138 | PINMUX_GPIO(GPIO_PTS7, PTS7_DATA), | ||
| 1139 | PINMUX_GPIO(GPIO_PTS6, PTS6_DATA), | ||
| 1140 | PINMUX_GPIO(GPIO_PTS5, PTS5_DATA), | ||
| 1141 | PINMUX_GPIO(GPIO_PTS4, PTS4_DATA), | ||
| 1142 | PINMUX_GPIO(GPIO_PTS3, PTS3_DATA), | ||
| 1143 | PINMUX_GPIO(GPIO_PTS2, PTS2_DATA), | ||
| 1144 | PINMUX_GPIO(GPIO_PTS1, PTS1_DATA), | ||
| 1145 | PINMUX_GPIO(GPIO_PTS0, PTS0_DATA), | ||
| 1146 | |||
| 1147 | /* PTT */ | ||
| 1148 | PINMUX_GPIO(GPIO_PTT5, PTT5_DATA), | ||
| 1149 | PINMUX_GPIO(GPIO_PTT4, PTT4_DATA), | ||
| 1150 | PINMUX_GPIO(GPIO_PTT3, PTT3_DATA), | ||
| 1151 | PINMUX_GPIO(GPIO_PTT2, PTT2_DATA), | ||
| 1152 | PINMUX_GPIO(GPIO_PTT1, PTT1_DATA), | ||
| 1153 | PINMUX_GPIO(GPIO_PTT0, PTT0_DATA), | ||
| 1154 | |||
| 1155 | /* PTU */ | ||
| 1156 | PINMUX_GPIO(GPIO_PTU7, PTU7_DATA), | ||
| 1157 | PINMUX_GPIO(GPIO_PTU6, PTU6_DATA), | ||
| 1158 | PINMUX_GPIO(GPIO_PTU5, PTU5_DATA), | ||
| 1159 | PINMUX_GPIO(GPIO_PTU4, PTU4_DATA), | ||
| 1160 | PINMUX_GPIO(GPIO_PTU3, PTU3_DATA), | ||
| 1161 | PINMUX_GPIO(GPIO_PTU2, PTU2_DATA), | ||
| 1162 | PINMUX_GPIO(GPIO_PTU1, PTU1_DATA), | ||
| 1163 | PINMUX_GPIO(GPIO_PTU0, PTU0_DATA), | ||
| 1164 | |||
| 1165 | /* PTV */ | ||
| 1166 | PINMUX_GPIO(GPIO_PTV7, PTV7_DATA), | ||
| 1167 | PINMUX_GPIO(GPIO_PTV6, PTV6_DATA), | ||
| 1168 | PINMUX_GPIO(GPIO_PTV5, PTV5_DATA), | ||
| 1169 | PINMUX_GPIO(GPIO_PTV4, PTV4_DATA), | ||
| 1170 | PINMUX_GPIO(GPIO_PTV3, PTV3_DATA), | ||
| 1171 | PINMUX_GPIO(GPIO_PTV2, PTV2_DATA), | ||
| 1172 | PINMUX_GPIO(GPIO_PTV1, PTV1_DATA), | ||
| 1173 | PINMUX_GPIO(GPIO_PTV0, PTV0_DATA), | ||
| 1174 | |||
| 1175 | /* PTW */ | ||
| 1176 | PINMUX_GPIO(GPIO_PTW7, PTW7_DATA), | ||
| 1177 | PINMUX_GPIO(GPIO_PTW6, PTW6_DATA), | ||
| 1178 | PINMUX_GPIO(GPIO_PTW5, PTW5_DATA), | ||
| 1179 | PINMUX_GPIO(GPIO_PTW4, PTW4_DATA), | ||
| 1180 | PINMUX_GPIO(GPIO_PTW3, PTW3_DATA), | ||
| 1181 | PINMUX_GPIO(GPIO_PTW2, PTW2_DATA), | ||
| 1182 | PINMUX_GPIO(GPIO_PTW1, PTW1_DATA), | ||
| 1183 | PINMUX_GPIO(GPIO_PTW0, PTW0_DATA), | ||
| 1184 | |||
| 1185 | /* PTX */ | ||
| 1186 | PINMUX_GPIO(GPIO_PTX7, PTX7_DATA), | ||
| 1187 | PINMUX_GPIO(GPIO_PTX6, PTX6_DATA), | ||
| 1188 | PINMUX_GPIO(GPIO_PTX5, PTX5_DATA), | ||
| 1189 | PINMUX_GPIO(GPIO_PTX4, PTX4_DATA), | ||
| 1190 | PINMUX_GPIO(GPIO_PTX3, PTX3_DATA), | ||
| 1191 | PINMUX_GPIO(GPIO_PTX2, PTX2_DATA), | ||
| 1192 | PINMUX_GPIO(GPIO_PTX1, PTX1_DATA), | ||
| 1193 | PINMUX_GPIO(GPIO_PTX0, PTX0_DATA), | ||
| 1194 | |||
| 1195 | /* PTY */ | ||
| 1196 | PINMUX_GPIO(GPIO_PTY7, PTY7_DATA), | ||
| 1197 | PINMUX_GPIO(GPIO_PTY6, PTY6_DATA), | ||
| 1198 | PINMUX_GPIO(GPIO_PTY5, PTY5_DATA), | ||
| 1199 | PINMUX_GPIO(GPIO_PTY4, PTY4_DATA), | ||
| 1200 | PINMUX_GPIO(GPIO_PTY3, PTY3_DATA), | ||
| 1201 | PINMUX_GPIO(GPIO_PTY2, PTY2_DATA), | ||
| 1202 | PINMUX_GPIO(GPIO_PTY1, PTY1_DATA), | ||
| 1203 | PINMUX_GPIO(GPIO_PTY0, PTY0_DATA), | ||
| 1204 | |||
| 1205 | /* PTZ */ | ||
| 1206 | PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA), | ||
| 1207 | PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA), | ||
| 1208 | PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA), | ||
| 1209 | PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA), | ||
| 1210 | PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA), | ||
| 1211 | PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA), | ||
| 1212 | PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA), | ||
| 1213 | PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA), | ||
| 1214 | |||
| 1215 | /* PTA (mobule: LBSC, CPG, LPC) */ | ||
| 1216 | PINMUX_GPIO(GPIO_FN_BS, BS_MARK), | ||
| 1217 | PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), | ||
| 1218 | PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK), | ||
| 1219 | PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK), | ||
| 1220 | PINMUX_GPIO(GPIO_FN_MD10, MD10_MARK), | ||
| 1221 | PINMUX_GPIO(GPIO_FN_MD9, MD9_MARK), | ||
| 1222 | PINMUX_GPIO(GPIO_FN_MD8, MD8_MARK), | ||
| 1223 | PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK), | ||
| 1224 | PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK), | ||
| 1225 | PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK), | ||
| 1226 | PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK), | ||
| 1227 | PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK), | ||
| 1228 | PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK), | ||
| 1229 | PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK), | ||
| 1230 | PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK), | ||
| 1231 | |||
| 1232 | /* PTB (mobule: LBSC, EtherC, SIM, LPC) */ | ||
| 1233 | PINMUX_GPIO(GPIO_FN_D15, D15_MARK), | ||
| 1234 | PINMUX_GPIO(GPIO_FN_D14, D14_MARK), | ||
| 1235 | PINMUX_GPIO(GPIO_FN_D13, D13_MARK), | ||
| 1236 | PINMUX_GPIO(GPIO_FN_D12, D12_MARK), | ||
| 1237 | PINMUX_GPIO(GPIO_FN_D11, D11_MARK), | ||
| 1238 | PINMUX_GPIO(GPIO_FN_D10, D10_MARK), | ||
| 1239 | PINMUX_GPIO(GPIO_FN_D9, D9_MARK), | ||
| 1240 | PINMUX_GPIO(GPIO_FN_D8, D8_MARK), | ||
| 1241 | PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK), | ||
| 1242 | PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK), | ||
| 1243 | PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK), | ||
| 1244 | PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK), | ||
| 1245 | PINMUX_GPIO(GPIO_FN_WPSZ1, WPSZ1_MARK), | ||
| 1246 | PINMUX_GPIO(GPIO_FN_WPSZ0, WPSZ0_MARK), | ||
| 1247 | PINMUX_GPIO(GPIO_FN_FWID, FWID_MARK), | ||
| 1248 | PINMUX_GPIO(GPIO_FN_FLSHSZ, FLSHSZ_MARK), | ||
| 1249 | PINMUX_GPIO(GPIO_FN_LPC_SPIEN, LPC_SPIEN_MARK), | ||
| 1250 | PINMUX_GPIO(GPIO_FN_BASEL, BASEL_MARK), | ||
| 1251 | |||
| 1252 | /* PTC (mobule: SD) */ | ||
| 1253 | PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK), | ||
| 1254 | PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK), | ||
| 1255 | PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK), | ||
| 1256 | PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK), | ||
| 1257 | PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK), | ||
| 1258 | PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK), | ||
| 1259 | PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK), | ||
| 1260 | PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK), | ||
| 1261 | |||
| 1262 | /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */ | ||
| 1263 | PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK), | ||
| 1264 | PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK), | ||
| 1265 | PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), | ||
| 1266 | PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK), | ||
| 1267 | PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK), | ||
| 1268 | PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK), | ||
| 1269 | PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK), | ||
| 1270 | PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK), | ||
| 1271 | PINMUX_GPIO(GPIO_FN_MD6, MD6_MARK), | ||
| 1272 | PINMUX_GPIO(GPIO_FN_MD5, MD5_MARK), | ||
| 1273 | PINMUX_GPIO(GPIO_FN_MD3, MD3_MARK), | ||
| 1274 | PINMUX_GPIO(GPIO_FN_MD2, MD2_MARK), | ||
| 1275 | PINMUX_GPIO(GPIO_FN_MD1, MD1_MARK), | ||
| 1276 | PINMUX_GPIO(GPIO_FN_MD0, MD0_MARK), | ||
| 1277 | PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK), | ||
| 1278 | PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK), | ||
| 1279 | |||
| 1280 | /* PTE (mobule: EtherC) */ | ||
| 1281 | PINMUX_GPIO(GPIO_FN_ET0_CRS_DV, ET0_CRS_DV_MARK), | ||
| 1282 | PINMUX_GPIO(GPIO_FN_ET0_TXD1, ET0_TXD1_MARK), | ||
| 1283 | PINMUX_GPIO(GPIO_FN_ET0_TXD0, ET0_TXD0_MARK), | ||
| 1284 | PINMUX_GPIO(GPIO_FN_ET0_TX_EN, ET0_TX_EN_MARK), | ||
| 1285 | PINMUX_GPIO(GPIO_FN_ET0_REF_CLK, ET0_REF_CLK_MARK), | ||
| 1286 | PINMUX_GPIO(GPIO_FN_ET0_RXD1, ET0_RXD1_MARK), | ||
| 1287 | PINMUX_GPIO(GPIO_FN_ET0_RXD0, ET0_RXD0_MARK), | ||
| 1288 | PINMUX_GPIO(GPIO_FN_ET0_RX_ER, ET0_RX_ER_MARK), | ||
| 1289 | |||
| 1290 | /* PTF (mobule: EtherC) */ | ||
| 1291 | PINMUX_GPIO(GPIO_FN_ET1_CRS_DV, ET1_CRS_DV_MARK), | ||
| 1292 | PINMUX_GPIO(GPIO_FN_ET1_TXD1, ET1_TXD1_MARK), | ||
| 1293 | PINMUX_GPIO(GPIO_FN_ET1_TXD0, ET1_TXD0_MARK), | ||
| 1294 | PINMUX_GPIO(GPIO_FN_ET1_TX_EN, ET1_TX_EN_MARK), | ||
| 1295 | PINMUX_GPIO(GPIO_FN_ET1_REF_CLK, ET1_REF_CLK_MARK), | ||
| 1296 | PINMUX_GPIO(GPIO_FN_ET1_RXD1, ET1_RXD1_MARK), | ||
| 1297 | PINMUX_GPIO(GPIO_FN_ET1_RXD0, ET1_RXD0_MARK), | ||
| 1298 | PINMUX_GPIO(GPIO_FN_ET1_RX_ER, ET1_RX_ER_MARK), | ||
| 1299 | |||
| 1300 | /* PTG (mobule: SYSTEM, PWMX, LPC) */ | ||
| 1301 | PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), | ||
| 1302 | PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), | ||
| 1303 | PINMUX_GPIO(GPIO_FN_PWX0, PWX0_MARK), | ||
| 1304 | PINMUX_GPIO(GPIO_FN_PWX1, PWX1_MARK), | ||
| 1305 | PINMUX_GPIO(GPIO_FN_PWX2, PWX2_MARK), | ||
| 1306 | PINMUX_GPIO(GPIO_FN_PWX3, PWX3_MARK), | ||
| 1307 | PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK), | ||
| 1308 | PINMUX_GPIO(GPIO_FN_CLKRUN, CLKRUN_MARK), | ||
| 1309 | PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK), | ||
| 1310 | PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK), | ||
| 1311 | |||
| 1312 | /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */ | ||
| 1313 | PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK), | ||
| 1314 | PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK), | ||
| 1315 | PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK), | ||
| 1316 | PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK), | ||
| 1317 | PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK), | ||
| 1318 | PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK), | ||
| 1319 | PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK), | ||
| 1320 | PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK), | ||
| 1321 | PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK), | ||
| 1322 | PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK), | ||
| 1323 | |||
| 1324 | /* PTI (mobule: INTC) */ | ||
| 1325 | PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK), | ||
| 1326 | PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK), | ||
| 1327 | PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK), | ||
| 1328 | PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK), | ||
| 1329 | PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK), | ||
| 1330 | PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK), | ||
| 1331 | PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK), | ||
| 1332 | PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK), | ||
| 1333 | |||
| 1334 | /* PTJ (mobule: SCIF234, SERMUX) */ | ||
| 1335 | PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), | ||
| 1336 | PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), | ||
| 1337 | PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), | ||
| 1338 | PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), | ||
| 1339 | PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK), | ||
| 1340 | PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK), | ||
| 1341 | PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK), | ||
| 1342 | PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK), | ||
| 1343 | |||
| 1344 | /* PTK (mobule: SERMUX) */ | ||
| 1345 | PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK), | ||
| 1346 | PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK), | ||
| 1347 | PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK), | ||
| 1348 | PINMUX_GPIO(GPIO_FN_COM2_CTS, COM2_CTS_MARK), | ||
| 1349 | PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK), | ||
| 1350 | PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK), | ||
| 1351 | PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK), | ||
| 1352 | PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK), | ||
| 1353 | |||
| 1354 | /* PTL (mobule: SERMUX) */ | ||
| 1355 | PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK), | ||
| 1356 | PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK), | ||
| 1357 | PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK), | ||
| 1358 | PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK), | ||
| 1359 | PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK), | ||
| 1360 | PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK), | ||
| 1361 | PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK), | ||
| 1362 | PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK), | ||
| 1363 | |||
| 1364 | /* PTM (mobule: IIC, LPC) */ | ||
| 1365 | PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK), | ||
| 1366 | PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK), | ||
| 1367 | PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK), | ||
| 1368 | PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK), | ||
| 1369 | PINMUX_GPIO(GPIO_FN_WP, WP_MARK), | ||
| 1370 | PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK), | ||
| 1371 | PINMUX_GPIO(GPIO_FN_FMS1, FMS1_MARK), | ||
| 1372 | |||
| 1373 | /* PTN (mobule: SCIF234, EVC) */ | ||
| 1374 | PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), | ||
| 1375 | PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK), | ||
| 1376 | PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK), | ||
| 1377 | PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK), | ||
| 1378 | PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK), | ||
| 1379 | PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK), | ||
| 1380 | PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK), | ||
| 1381 | PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK), | ||
| 1382 | PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK), | ||
| 1383 | PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK), | ||
| 1384 | PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK), | ||
| 1385 | PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK), | ||
| 1386 | PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK), | ||
| 1387 | PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK), | ||
| 1388 | PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK), | ||
| 1389 | |||
| 1390 | /* PTO (mobule: SGPIO) */ | ||
| 1391 | PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK), | ||
| 1392 | PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK), | ||
| 1393 | PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK), | ||
| 1394 | PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK), | ||
| 1395 | PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK), | ||
| 1396 | PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK), | ||
| 1397 | PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK), | ||
| 1398 | PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK), | ||
| 1399 | |||
| 1400 | /* PTP (mobule: JMC, SCIF234) */ | ||
| 1401 | PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK), | ||
| 1402 | PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK), | ||
| 1403 | PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK), | ||
| 1404 | PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK), | ||
| 1405 | PINMUX_GPIO(GPIO_FN_JMCRST, JMCRST_MARK), | ||
| 1406 | PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK), | ||
| 1407 | PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), | ||
| 1408 | |||
| 1409 | /* PTQ (mobule: LPC) */ | ||
| 1410 | PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK), | ||
| 1411 | PINMUX_GPIO(GPIO_FN_LAD2, LAD2_MARK), | ||
| 1412 | PINMUX_GPIO(GPIO_FN_LAD1, LAD1_MARK), | ||
| 1413 | PINMUX_GPIO(GPIO_FN_LAD0, LAD0_MARK), | ||
| 1414 | PINMUX_GPIO(GPIO_FN_LFRAME, LFRAME_MARK), | ||
| 1415 | PINMUX_GPIO(GPIO_FN_LRESET, LRESET_MARK), | ||
| 1416 | PINMUX_GPIO(GPIO_FN_LCLK, LCLK_MARK), | ||
| 1417 | |||
| 1418 | /* PTR (mobule: GRA, IIC) */ | ||
| 1419 | PINMUX_GPIO(GPIO_FN_DDC3, DDC3_MARK), | ||
| 1420 | PINMUX_GPIO(GPIO_FN_DDC2, DDC2_MARK), | ||
| 1421 | PINMUX_GPIO(GPIO_FN_SDA8, SDA8_MARK), | ||
| 1422 | PINMUX_GPIO(GPIO_FN_SCL8, SCL8_MARK), | ||
| 1423 | PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK), | ||
| 1424 | PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK), | ||
| 1425 | PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK), | ||
| 1426 | PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK), | ||
| 1427 | PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK), | ||
| 1428 | PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK), | ||
| 1429 | |||
| 1430 | /* PTS (mobule: GRA, IIC) */ | ||
| 1431 | PINMUX_GPIO(GPIO_FN_DDC1, DDC1_MARK), | ||
| 1432 | PINMUX_GPIO(GPIO_FN_DDC0, DDC0_MARK), | ||
| 1433 | PINMUX_GPIO(GPIO_FN_SDA9, SDA9_MARK), | ||
| 1434 | PINMUX_GPIO(GPIO_FN_SCL9, SCL9_MARK), | ||
| 1435 | PINMUX_GPIO(GPIO_FN_SDA5, SDA5_MARK), | ||
| 1436 | PINMUX_GPIO(GPIO_FN_SCL5, SCL5_MARK), | ||
| 1437 | PINMUX_GPIO(GPIO_FN_SDA4, SDA4_MARK), | ||
| 1438 | PINMUX_GPIO(GPIO_FN_SCL4, SCL4_MARK), | ||
| 1439 | PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK), | ||
| 1440 | PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK), | ||
| 1441 | |||
| 1442 | /* PTT (mobule: SYSTEM, PWMX) */ | ||
| 1443 | PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), | ||
| 1444 | PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), | ||
| 1445 | PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), | ||
| 1446 | PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), | ||
| 1447 | PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), | ||
| 1448 | PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), | ||
| 1449 | PINMUX_GPIO(GPIO_FN_PWX7, PWX7_MARK), | ||
| 1450 | PINMUX_GPIO(GPIO_FN_PWX6, PWX6_MARK), | ||
| 1451 | PINMUX_GPIO(GPIO_FN_PWX5, PWX5_MARK), | ||
| 1452 | PINMUX_GPIO(GPIO_FN_PWX4, PWX4_MARK), | ||
| 1453 | |||
| 1454 | /* PTU (mobule: LBSC, DMAC) */ | ||
| 1455 | PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK), | ||
| 1456 | PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK), | ||
| 1457 | PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), | ||
| 1458 | PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK), | ||
| 1459 | PINMUX_GPIO(GPIO_FN_RD, RD_MARK), | ||
| 1460 | PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK), | ||
| 1461 | PINMUX_GPIO(GPIO_FN_A25, A25_MARK), | ||
| 1462 | PINMUX_GPIO(GPIO_FN_A24, A24_MARK), | ||
| 1463 | PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), | ||
| 1464 | PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), | ||
| 1465 | |||
| 1466 | /* PTV (mobule: LBSC, DMAC) */ | ||
| 1467 | PINMUX_GPIO(GPIO_FN_A23, A23_MARK), | ||
| 1468 | PINMUX_GPIO(GPIO_FN_A22, A22_MARK), | ||
| 1469 | PINMUX_GPIO(GPIO_FN_A21, A21_MARK), | ||
| 1470 | PINMUX_GPIO(GPIO_FN_A20, A20_MARK), | ||
| 1471 | PINMUX_GPIO(GPIO_FN_A19, A19_MARK), | ||
| 1472 | PINMUX_GPIO(GPIO_FN_A18, A18_MARK), | ||
| 1473 | PINMUX_GPIO(GPIO_FN_A17, A17_MARK), | ||
| 1474 | PINMUX_GPIO(GPIO_FN_A16, A16_MARK), | ||
| 1475 | PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), | ||
| 1476 | PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), | ||
| 1477 | PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), | ||
| 1478 | PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), | ||
| 1479 | |||
| 1480 | /* PTW (mobule: LBSC) */ | ||
| 1481 | PINMUX_GPIO(GPIO_FN_A16, A16_MARK), | ||
| 1482 | PINMUX_GPIO(GPIO_FN_A15, A15_MARK), | ||
| 1483 | PINMUX_GPIO(GPIO_FN_A14, A14_MARK), | ||
| 1484 | PINMUX_GPIO(GPIO_FN_A13, A13_MARK), | ||
| 1485 | PINMUX_GPIO(GPIO_FN_A12, A12_MARK), | ||
| 1486 | PINMUX_GPIO(GPIO_FN_A11, A11_MARK), | ||
| 1487 | PINMUX_GPIO(GPIO_FN_A10, A10_MARK), | ||
| 1488 | PINMUX_GPIO(GPIO_FN_A9, A9_MARK), | ||
| 1489 | PINMUX_GPIO(GPIO_FN_A8, A8_MARK), | ||
| 1490 | |||
| 1491 | /* PTX (mobule: LBSC) */ | ||
| 1492 | PINMUX_GPIO(GPIO_FN_A7, A7_MARK), | ||
| 1493 | PINMUX_GPIO(GPIO_FN_A6, A6_MARK), | ||
| 1494 | PINMUX_GPIO(GPIO_FN_A5, A5_MARK), | ||
| 1495 | PINMUX_GPIO(GPIO_FN_A4, A4_MARK), | ||
| 1496 | PINMUX_GPIO(GPIO_FN_A3, A3_MARK), | ||
| 1497 | PINMUX_GPIO(GPIO_FN_A2, A2_MARK), | ||
| 1498 | PINMUX_GPIO(GPIO_FN_A1, A1_MARK), | ||
| 1499 | PINMUX_GPIO(GPIO_FN_A0, A0_MARK), | ||
| 1500 | |||
| 1501 | /* PTY (mobule: LBSC) */ | ||
| 1502 | PINMUX_GPIO(GPIO_FN_D7, D7_MARK), | ||
| 1503 | PINMUX_GPIO(GPIO_FN_D6, D6_MARK), | ||
| 1504 | PINMUX_GPIO(GPIO_FN_D5, D5_MARK), | ||
| 1505 | PINMUX_GPIO(GPIO_FN_D4, D4_MARK), | ||
| 1506 | PINMUX_GPIO(GPIO_FN_D3, D3_MARK), | ||
| 1507 | PINMUX_GPIO(GPIO_FN_D2, D2_MARK), | ||
| 1508 | PINMUX_GPIO(GPIO_FN_D1, D1_MARK), | ||
| 1509 | PINMUX_GPIO(GPIO_FN_D0, D0_MARK), | ||
| 1510 | }; | ||
| 1511 | |||
| 1512 | static struct pinmux_cfg_reg pinmux_config_regs[] = { | ||
| 1513 | { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) { | ||
| 1514 | PTA7_FN, PTA7_OUT, PTA7_IN, 0, | ||
| 1515 | PTA6_FN, PTA6_OUT, PTA6_IN, 0, | ||
| 1516 | PTA5_FN, PTA5_OUT, PTA5_IN, 0, | ||
| 1517 | PTA4_FN, PTA4_OUT, PTA4_IN, 0, | ||
| 1518 | PTA3_FN, PTA3_OUT, PTA3_IN, 0, | ||
| 1519 | PTA2_FN, PTA2_OUT, PTA2_IN, 0, | ||
| 1520 | PTA1_FN, PTA1_OUT, PTA1_IN, 0, | ||
| 1521 | PTA0_FN, PTA0_OUT, PTA0_IN, 0 } | ||
| 1522 | }, | ||
| 1523 | { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) { | ||
| 1524 | PTB7_FN, PTB7_OUT, PTB7_IN, 0, | ||
| 1525 | PTB6_FN, PTB6_OUT, PTB6_IN, 0, | ||
| 1526 | PTB5_FN, PTB5_OUT, PTB5_IN, 0, | ||
| 1527 | PTB4_FN, PTB4_OUT, PTB4_IN, 0, | ||
| 1528 | PTB3_FN, PTB3_OUT, PTB3_IN, 0, | ||
| 1529 | PTB2_FN, PTB2_OUT, PTB2_IN, 0, | ||
| 1530 | PTB1_FN, PTB1_OUT, PTB1_IN, 0, | ||
| 1531 | PTB0_FN, PTB0_OUT, PTB0_IN, 0 } | ||
| 1532 | }, | ||
| 1533 | { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2) { | ||
| 1534 | PTC7_FN, PTC7_OUT, PTC7_IN, 0, | ||
| 1535 | PTC6_FN, PTC6_OUT, PTC6_IN, 0, | ||
| 1536 | PTC5_FN, PTC5_OUT, PTC5_IN, 0, | ||
| 1537 | PTC4_FN, PTC4_OUT, PTC4_IN, 0, | ||
| 1538 | PTC3_FN, PTC3_OUT, PTC3_IN, 0, | ||
| 1539 | PTC2_FN, PTC2_OUT, PTC2_IN, 0, | ||
| 1540 | PTC1_FN, PTC1_OUT, PTC1_IN, 0, | ||
| 1541 | PTC0_FN, PTC0_OUT, PTC0_IN, 0 } | ||
| 1542 | }, | ||
| 1543 | { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) { | ||
| 1544 | PTD7_FN, PTD7_OUT, PTD7_IN, 0, | ||
| 1545 | PTD6_FN, PTD6_OUT, PTD6_IN, 0, | ||
| 1546 | PTD5_FN, PTD5_OUT, PTD5_IN, 0, | ||
| 1547 | PTD4_FN, PTD4_OUT, PTD4_IN, 0, | ||
| 1548 | PTD3_FN, PTD3_OUT, PTD3_IN, 0, | ||
| 1549 | PTD2_FN, PTD2_OUT, PTD2_IN, 0, | ||
| 1550 | PTD1_FN, PTD1_OUT, PTD1_IN, 0, | ||
| 1551 | PTD0_FN, PTD0_OUT, PTD0_IN, 0 } | ||
| 1552 | }, | ||
| 1553 | { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) { | ||
| 1554 | PTE7_FN, PTE7_OUT, PTE7_IN, 0, | ||
| 1555 | PTE6_FN, PTE6_OUT, PTE6_IN, 0, | ||
| 1556 | PTE5_FN, PTE5_OUT, PTE5_IN, 0, | ||
| 1557 | PTE4_FN, PTE4_OUT, PTE4_IN, 0, | ||
| 1558 | PTE3_FN, PTE3_OUT, PTE3_IN, 0, | ||
| 1559 | PTE2_FN, PTE2_OUT, PTE2_IN, 0, | ||
| 1560 | PTE1_FN, PTE1_OUT, PTE1_IN, 0, | ||
| 1561 | PTE0_FN, PTE0_OUT, PTE0_IN, 0 } | ||
| 1562 | }, | ||
| 1563 | { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) { | ||
| 1564 | PTF7_FN, PTF7_OUT, PTF7_IN, 0, | ||
| 1565 | PTF6_FN, PTF6_OUT, PTF6_IN, 0, | ||
| 1566 | PTF5_FN, PTF5_OUT, PTF5_IN, 0, | ||
| 1567 | PTF4_FN, PTF4_OUT, PTF4_IN, 0, | ||
| 1568 | PTF3_FN, PTF3_OUT, PTF3_IN, 0, | ||
| 1569 | PTF2_FN, PTF2_OUT, PTF2_IN, 0, | ||
| 1570 | PTF1_FN, PTF1_OUT, PTF1_IN, 0, | ||
| 1571 | PTF0_FN, PTF0_OUT, PTF0_IN, 0 } | ||
| 1572 | }, | ||
| 1573 | { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) { | ||
| 1574 | PTG7_FN, PTG7_OUT, PTG7_IN, 0, | ||
| 1575 | PTG6_FN, PTG6_OUT, PTG6_IN, 0, | ||
| 1576 | PTG5_FN, PTG5_OUT, PTG5_IN, 0, | ||
| 1577 | PTG4_FN, PTG4_OUT, PTG4_IN, 0, | ||
| 1578 | PTG3_FN, PTG3_OUT, PTG3_IN, 0, | ||
| 1579 | PTG2_FN, PTG2_OUT, PTG2_IN, 0, | ||
| 1580 | PTG1_FN, PTG1_OUT, PTG1_IN, 0, | ||
| 1581 | PTG0_FN, PTG0_OUT, PTG0_IN, 0 } | ||
| 1582 | }, | ||
| 1583 | { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) { | ||
| 1584 | PTH7_FN, PTH7_OUT, PTH7_IN, 0, | ||
| 1585 | PTH6_FN, PTH6_OUT, PTH6_IN, 0, | ||
| 1586 | PTH5_FN, PTH5_OUT, PTH5_IN, 0, | ||
| 1587 | PTH4_FN, PTH4_OUT, PTH4_IN, 0, | ||
| 1588 | PTH3_FN, PTH3_OUT, PTH3_IN, 0, | ||
| 1589 | PTH2_FN, PTH2_OUT, PTH2_IN, 0, | ||
| 1590 | PTH1_FN, PTH1_OUT, PTH1_IN, 0, | ||
| 1591 | PTH0_FN, PTH0_OUT, PTH0_IN, 0 } | ||
| 1592 | }, | ||
| 1593 | { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) { | ||
| 1594 | PTI7_FN, PTI7_OUT, PTI7_IN, 0, | ||
| 1595 | PTI6_FN, PTI6_OUT, PTI6_IN, 0, | ||
| 1596 | PTI5_FN, PTI5_OUT, PTI5_IN, 0, | ||
| 1597 | PTI4_FN, PTI4_OUT, PTI4_IN, 0, | ||
| 1598 | PTI3_FN, PTI3_OUT, PTI3_IN, 0, | ||
| 1599 | PTI2_FN, PTI2_OUT, PTI2_IN, 0, | ||
| 1600 | PTI1_FN, PTI1_OUT, PTI1_IN, 0, | ||
| 1601 | PTI0_FN, PTI0_OUT, PTI0_IN, 0 } | ||
| 1602 | }, | ||
| 1603 | { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) { | ||
| 1604 | PTJ7_FN, PTJ7_OUT, PTJ7_IN, 0, | ||
| 1605 | PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0, | ||
| 1606 | PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0, | ||
| 1607 | PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0, | ||
| 1608 | PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0, | ||
| 1609 | PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0, | ||
| 1610 | PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0, | ||
| 1611 | PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 } | ||
| 1612 | }, | ||
| 1613 | { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) { | ||
| 1614 | PTK7_FN, PTK7_OUT, PTK7_IN, 0, | ||
| 1615 | PTK6_FN, PTK6_OUT, PTK6_IN, 0, | ||
| 1616 | PTK5_FN, PTK5_OUT, PTK5_IN, 0, | ||
| 1617 | PTK4_FN, PTK4_OUT, PTK4_IN, 0, | ||
| 1618 | PTK3_FN, PTK3_OUT, PTK3_IN, 0, | ||
| 1619 | PTK2_FN, PTK2_OUT, PTK2_IN, 0, | ||
| 1620 | PTK1_FN, PTK1_OUT, PTK1_IN, 0, | ||
| 1621 | PTK0_FN, PTK0_OUT, PTK0_IN, 0 } | ||
| 1622 | }, | ||
| 1623 | { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) { | ||
| 1624 | PTL7_FN, PTL7_OUT, PTL7_IN, 0, | ||
| 1625 | PTL6_FN, PTL6_OUT, PTL6_IN, 0, | ||
| 1626 | PTL5_FN, PTL5_OUT, PTL5_IN, 0, | ||
| 1627 | PTL4_FN, PTL4_OUT, PTL4_IN, 0, | ||
| 1628 | PTL3_FN, PTL3_OUT, PTL3_IN, 0, | ||
| 1629 | PTL2_FN, PTL2_OUT, PTL2_IN, 0, | ||
| 1630 | PTL1_FN, PTL1_OUT, PTL1_IN, 0, | ||
| 1631 | PTL0_FN, PTL0_OUT, PTL0_IN, 0 } | ||
| 1632 | }, | ||
| 1633 | { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) { | ||
| 1634 | 0, 0, 0, 0, /* reserved: always set 1 */ | ||
| 1635 | PTM6_FN, PTM6_OUT, PTM6_IN, 0, | ||
| 1636 | PTM5_FN, PTM5_OUT, PTM5_IN, 0, | ||
| 1637 | PTM4_FN, PTM4_OUT, PTM4_IN, 0, | ||
| 1638 | PTM3_FN, PTM3_OUT, PTM3_IN, 0, | ||
| 1639 | PTM2_FN, PTM2_OUT, PTM2_IN, 0, | ||
| 1640 | PTM1_FN, PTM1_OUT, PTM1_IN, 0, | ||
| 1641 | PTM0_FN, PTM0_OUT, PTM0_IN, 0 } | ||
| 1642 | }, | ||
| 1643 | { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) { | ||
| 1644 | PTN7_FN, PTN7_OUT, PTN7_IN, 0, | ||
| 1645 | PTN6_FN, PTN6_OUT, PTN6_IN, 0, | ||
| 1646 | PTN5_FN, PTN5_OUT, PTN5_IN, 0, | ||
| 1647 | PTN4_FN, PTN4_OUT, PTN4_IN, 0, | ||
| 1648 | PTN3_FN, PTN3_OUT, PTN3_IN, 0, | ||
| 1649 | PTN2_FN, PTN2_OUT, PTN2_IN, 0, | ||
| 1650 | PTN1_FN, PTN1_OUT, PTN1_IN, 0, | ||
| 1651 | PTN0_FN, PTN0_OUT, PTN0_IN, 0 } | ||
| 1652 | }, | ||
| 1653 | { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) { | ||
| 1654 | PTO7_FN, PTO7_OUT, PTO7_IN, 0, | ||
| 1655 | PTO6_FN, PTO6_OUT, PTO6_IN, 0, | ||
| 1656 | PTO5_FN, PTO5_OUT, PTO5_IN, 0, | ||
| 1657 | PTO4_FN, PTO4_OUT, PTO4_IN, 0, | ||
| 1658 | PTO3_FN, PTO3_OUT, PTO3_IN, 0, | ||
| 1659 | PTO2_FN, PTO2_OUT, PTO2_IN, 0, | ||
| 1660 | PTO1_FN, PTO1_OUT, PTO1_IN, 0, | ||
| 1661 | PTO0_FN, PTO0_OUT, PTO0_IN, 0 } | ||
| 1662 | }, | ||
| 1663 | { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) { | ||
| 1664 | 0, 0, 0, 0, /* reserved: always set 1 */ | ||
| 1665 | PTP6_FN, PTP6_OUT, PTP6_IN, 0, | ||
| 1666 | PTP5_FN, PTP5_OUT, PTP5_IN, 0, | ||
| 1667 | PTP4_FN, PTP4_OUT, PTP4_IN, 0, | ||
| 1668 | PTP3_FN, PTP3_OUT, PTP3_IN, 0, | ||
| 1669 | PTP2_FN, PTP2_OUT, PTP2_IN, 0, | ||
| 1670 | PTP1_FN, PTP1_OUT, PTP1_IN, 0, | ||
| 1671 | PTP0_FN, PTP0_OUT, PTP0_IN, 0 } | ||
| 1672 | }, | ||
| 1673 | { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) { | ||
| 1674 | 0, 0, 0, 0, /* reserved: always set 1 */ | ||
| 1675 | PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0, | ||
| 1676 | PTQ5_FN, PTQ5_OUT, PTQ5_IN, 0, | ||
| 1677 | PTQ4_FN, PTQ4_OUT, PTQ4_IN, 0, | ||
| 1678 | PTQ3_FN, PTQ3_OUT, PTQ3_IN, 0, | ||
| 1679 | PTQ2_FN, PTQ2_OUT, PTQ2_IN, 0, | ||
| 1680 | PTQ1_FN, PTQ1_OUT, PTQ1_IN, 0, | ||
| 1681 | PTQ0_FN, PTQ0_OUT, PTQ0_IN, 0 } | ||
| 1682 | }, | ||
| 1683 | { PINMUX_CFG_REG("PRCR", 0xffec0022, 16, 2) { | ||
| 1684 | PTR7_FN, PTR7_OUT, PTR7_IN, 0, | ||
| 1685 | PTR6_FN, PTR6_OUT, PTR6_IN, 0, | ||
| 1686 | PTR5_FN, PTR5_OUT, PTR5_IN, 0, | ||
| 1687 | PTR4_FN, PTR4_OUT, PTR4_IN, 0, | ||
| 1688 | PTR3_FN, PTR3_OUT, PTR3_IN, 0, | ||
| 1689 | PTR2_FN, PTR2_OUT, PTR2_IN, 0, | ||
| 1690 | PTR1_FN, PTR1_OUT, PTR1_IN, 0, | ||
| 1691 | PTR0_FN, PTR0_OUT, PTR0_IN, 0 } | ||
| 1692 | }, | ||
| 1693 | { PINMUX_CFG_REG("PSCR", 0xffec0024, 16, 2) { | ||
| 1694 | PTS7_FN, PTS7_OUT, PTS7_IN, 0, | ||
| 1695 | PTS6_FN, PTS6_OUT, PTS6_IN, 0, | ||
| 1696 | PTS5_FN, PTS5_OUT, PTS5_IN, 0, | ||
| 1697 | PTS4_FN, PTS4_OUT, PTS4_IN, 0, | ||
| 1698 | PTS3_FN, PTS3_OUT, PTS3_IN, 0, | ||
| 1699 | PTS2_FN, PTS2_OUT, PTS2_IN, 0, | ||
| 1700 | PTS1_FN, PTS1_OUT, PTS1_IN, 0, | ||
| 1701 | PTS0_FN, PTS0_OUT, PTS0_IN, 0 } | ||
| 1702 | }, | ||
| 1703 | { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) { | ||
| 1704 | 0, 0, 0, 0, /* reserved: always set 1 */ | ||
| 1705 | 0, 0, 0, 0, /* reserved: always set 1 */ | ||
| 1706 | PTT5_FN, PTT5_OUT, PTT5_IN, 0, | ||
| 1707 | PTT4_FN, PTT4_OUT, PTT4_IN, 0, | ||
| 1708 | PTT3_FN, PTT3_OUT, PTT3_IN, 0, | ||
| 1709 | PTT2_FN, PTT2_OUT, PTT2_IN, 0, | ||
| 1710 | PTT1_FN, PTT1_OUT, PTT1_IN, 0, | ||
| 1711 | PTT0_FN, PTT0_OUT, PTT0_IN, 0 } | ||
| 1712 | }, | ||
| 1713 | { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) { | ||
| 1714 | PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU, | ||
| 1715 | PTU6_FN, PTU6_OUT, PTU6_IN, PTU6_IN_PU, | ||
| 1716 | PTU5_FN, PTU5_OUT, PTU5_IN, PTU5_IN_PU, | ||
| 1717 | PTU4_FN, PTU4_OUT, PTU4_IN, PTU4_IN_PU, | ||
| 1718 | PTU3_FN, PTU3_OUT, PTU3_IN, PTU3_IN_PU, | ||
| 1719 | PTU2_FN, PTU2_OUT, PTU2_IN, PTU2_IN_PU, | ||
| 1720 | PTU1_FN, PTU1_OUT, PTU1_IN, PTU1_IN_PU, | ||
| 1721 | PTU0_FN, PTU0_OUT, PTU0_IN, PTU0_IN_PU } | ||
| 1722 | }, | ||
| 1723 | { PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) { | ||
| 1724 | PTV7_FN, PTV7_OUT, PTV7_IN, PTV7_IN_PU, | ||
| 1725 | PTV6_FN, PTV6_OUT, PTV6_IN, PTV6_IN_PU, | ||
| 1726 | PTV5_FN, PTV5_OUT, PTV5_IN, PTV5_IN_PU, | ||
| 1727 | PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU, | ||
| 1728 | PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU, | ||
| 1729 | PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU, | ||
| 1730 | PTV1_FN, PTV1_OUT, PTV1_IN, PTV1_IN_PU, | ||
| 1731 | PTV0_FN, PTV0_OUT, PTV0_IN, PTV0_IN_PU } | ||
| 1732 | }, | ||
| 1733 | { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) { | ||
| 1734 | PTW7_FN, PTW7_OUT, PTW7_IN, PTW7_IN_PU, | ||
| 1735 | PTW6_FN, PTW6_OUT, PTW6_IN, PTW6_IN_PU, | ||
| 1736 | PTW5_FN, PTW5_OUT, PTW5_IN, PTW5_IN_PU, | ||
| 1737 | PTW4_FN, PTW4_OUT, PTW4_IN, PTW4_IN_PU, | ||
| 1738 | PTW3_FN, PTW3_OUT, PTW3_IN, PTW3_IN_PU, | ||
| 1739 | PTW2_FN, PTW2_OUT, PTW2_IN, PTW2_IN_PU, | ||
| 1740 | PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU, | ||
| 1741 | PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU } | ||
| 1742 | }, | ||
| 1743 | { PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) { | ||
| 1744 | PTX7_FN, PTX7_OUT, PTX7_IN, PTX7_IN_PU, | ||
| 1745 | PTX6_FN, PTX6_OUT, PTX6_IN, PTX6_IN_PU, | ||
| 1746 | PTX5_FN, PTX5_OUT, PTX5_IN, PTX5_IN_PU, | ||
| 1747 | PTX4_FN, PTX4_OUT, PTX4_IN, PTX4_IN_PU, | ||
| 1748 | PTX3_FN, PTX3_OUT, PTX3_IN, PTX3_IN_PU, | ||
| 1749 | PTX2_FN, PTX2_OUT, PTX2_IN, PTX2_IN_PU, | ||
| 1750 | PTX1_FN, PTX1_OUT, PTX1_IN, PTX1_IN_PU, | ||
| 1751 | PTX0_FN, PTX0_OUT, PTX0_IN, PTX0_IN_PU } | ||
| 1752 | }, | ||
| 1753 | { PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) { | ||
| 1754 | PTY7_FN, PTY7_OUT, PTY7_IN, PTY7_IN_PU, | ||
| 1755 | PTY6_FN, PTY6_OUT, PTY6_IN, PTY6_IN_PU, | ||
| 1756 | PTY5_FN, PTY5_OUT, PTY5_IN, PTY5_IN_PU, | ||
| 1757 | PTY4_FN, PTY4_OUT, PTY4_IN, PTY4_IN_PU, | ||
| 1758 | PTY3_FN, PTY3_OUT, PTY3_IN, PTY3_IN_PU, | ||
| 1759 | PTY2_FN, PTY2_OUT, PTY2_IN, PTY2_IN_PU, | ||
| 1760 | PTY1_FN, PTY1_OUT, PTY1_IN, PTY1_IN_PU, | ||
| 1761 | PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU } | ||
| 1762 | }, | ||
| 1763 | { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) { | ||
| 1764 | 0, PTZ7_OUT, PTZ7_IN, 0, | ||
| 1765 | 0, PTZ6_OUT, PTZ6_IN, 0, | ||
| 1766 | 0, PTZ5_OUT, PTZ5_IN, 0, | ||
| 1767 | 0, PTZ4_OUT, PTZ4_IN, 0, | ||
| 1768 | 0, PTZ3_OUT, PTZ3_IN, 0, | ||
| 1769 | 0, PTZ2_OUT, PTZ2_IN, 0, | ||
| 1770 | 0, PTZ1_OUT, PTZ1_IN, 0, | ||
| 1771 | 0, PTZ0_OUT, PTZ0_IN, 0 } | ||
| 1772 | }, | ||
| 1773 | |||
| 1774 | { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) { | ||
| 1775 | PS0_15_FN3, PS0_15_FN1, | ||
| 1776 | PS0_14_FN3, PS0_14_FN1, | ||
| 1777 | PS0_13_FN3, PS0_13_FN1, | ||
| 1778 | PS0_12_FN3, PS0_12_FN1, | ||
| 1779 | 0, 0, | ||
| 1780 | 0, 0, | ||
| 1781 | 0, 0, | ||
| 1782 | 0, 0, | ||
| 1783 | PS0_7_FN2, PS0_7_FN1, | ||
| 1784 | PS0_6_FN2, PS0_6_FN1, | ||
| 1785 | PS0_5_FN2, PS0_5_FN1, | ||
| 1786 | PS0_4_FN2, PS0_4_FN1, | ||
| 1787 | PS0_3_FN2, PS0_3_FN1, | ||
| 1788 | PS0_2_FN2, PS0_2_FN1, | ||
| 1789 | PS0_1_FN2, PS0_1_FN1, | ||
| 1790 | 0, 0, } | ||
| 1791 | }, | ||
| 1792 | { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) { | ||
| 1793 | 0, 0, | ||
| 1794 | 0, 0, | ||
| 1795 | 0, 0, | ||
| 1796 | 0, 0, | ||
| 1797 | 0, 0, | ||
| 1798 | 0, 0, | ||
| 1799 | 0, 0, | ||
| 1800 | 0, 0, | ||
| 1801 | PS1_7_FN1, PS1_7_FN3, | ||
| 1802 | PS1_6_FN1, PS1_6_FN3, | ||
| 1803 | 0, 0, | ||
| 1804 | 0, 0, | ||
| 1805 | 0, 0, | ||
| 1806 | 0, 0, | ||
| 1807 | 0, 0, | ||
| 1808 | 0, 0, } | ||
| 1809 | }, | ||
| 1810 | { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) { | ||
| 1811 | 0, 0, | ||
| 1812 | 0, 0, | ||
| 1813 | PS2_13_FN3, PS2_13_FN1, | ||
| 1814 | PS2_12_FN3, PS2_12_FN1, | ||
| 1815 | 0, 0, | ||
| 1816 | 0, 0, | ||
| 1817 | 0, 0, | ||
| 1818 | 0, 0, | ||
| 1819 | 0, 0, | ||
| 1820 | 0, 0, | ||
| 1821 | 0, 0, | ||
| 1822 | 0, 0, | ||
| 1823 | 0, 0, | ||
| 1824 | 0, 0, | ||
| 1825 | PS2_1_FN1, PS2_1_FN2, | ||
| 1826 | PS2_0_FN1, PS2_0_FN2, } | ||
| 1827 | }, | ||
| 1828 | { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) { | ||
| 1829 | PS4_15_FN2, PS4_15_FN1, | ||
| 1830 | PS4_14_FN2, PS4_14_FN1, | ||
| 1831 | PS4_13_FN2, PS4_13_FN1, | ||
| 1832 | PS4_12_FN2, PS4_12_FN1, | ||
| 1833 | PS4_11_FN2, PS4_11_FN1, | ||
| 1834 | PS4_10_FN2, PS4_10_FN1, | ||
| 1835 | PS4_9_FN2, PS4_9_FN1, | ||
| 1836 | 0, 0, | ||
| 1837 | 0, 0, | ||
| 1838 | 0, 0, | ||
| 1839 | 0, 0, | ||
| 1840 | 0, 0, | ||
| 1841 | PS4_3_FN2, PS4_3_FN1, | ||
| 1842 | PS4_2_FN2, PS4_2_FN1, | ||
| 1843 | PS4_1_FN2, PS4_1_FN1, | ||
| 1844 | PS4_0_FN2, PS4_0_FN1, } | ||
| 1845 | }, | ||
| 1846 | { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) { | ||
| 1847 | 0, 0, | ||
| 1848 | 0, 0, | ||
| 1849 | 0, 0, | ||
| 1850 | 0, 0, | ||
| 1851 | 0, 0, | ||
| 1852 | 0, 0, | ||
| 1853 | PS5_9_FN1, PS5_9_FN2, | ||
| 1854 | PS5_8_FN1, PS5_8_FN2, | ||
| 1855 | PS5_7_FN1, PS5_7_FN2, | ||
| 1856 | PS5_6_FN1, PS5_6_FN2, | ||
| 1857 | PS5_5_FN1, PS5_5_FN2, | ||
| 1858 | 0, 0, | ||
| 1859 | 0, 0, | ||
| 1860 | 0, 0, | ||
| 1861 | 0, 0, | ||
| 1862 | 0, 0, } | ||
| 1863 | }, | ||
| 1864 | { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) { | ||
| 1865 | 0, 0, | ||
| 1866 | 0, 0, | ||
| 1867 | 0, 0, | ||
| 1868 | 0, 0, | ||
| 1869 | 0, 0, | ||
| 1870 | 0, 0, | ||
| 1871 | 0, 0, | ||
| 1872 | 0, 0, | ||
| 1873 | PS6_7_FN_AN, PS6_7_FN_EV, | ||
| 1874 | PS6_6_FN_AN, PS6_6_FN_EV, | ||
| 1875 | PS6_5_FN_AN, PS6_5_FN_EV, | ||
| 1876 | PS6_4_FN_AN, PS6_4_FN_EV, | ||
| 1877 | PS6_3_FN_AN, PS6_3_FN_EV, | ||
| 1878 | PS6_2_FN_AN, PS6_2_FN_EV, | ||
| 1879 | PS6_1_FN_AN, PS6_1_FN_EV, | ||
| 1880 | PS6_0_FN_AN, PS6_0_FN_EV, } | ||
| 1881 | }, | ||
| 1882 | {} | ||
| 1883 | }; | ||
| 1884 | |||
| 1885 | static struct pinmux_data_reg pinmux_data_regs[] = { | ||
| 1886 | { PINMUX_DATA_REG("PADR", 0xffec0034, 8) { | ||
| 1887 | PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, | ||
| 1888 | PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } | ||
| 1889 | }, | ||
| 1890 | { PINMUX_DATA_REG("PBDR", 0xffec0036, 8) { | ||
| 1891 | PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA, | ||
| 1892 | PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA } | ||
| 1893 | }, | ||
| 1894 | { PINMUX_DATA_REG("PCDR", 0xffec0038, 8) { | ||
| 1895 | PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA, | ||
| 1896 | PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA } | ||
| 1897 | }, | ||
| 1898 | { PINMUX_DATA_REG("PDDR", 0xffec003a, 8) { | ||
| 1899 | PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA, | ||
| 1900 | PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA } | ||
| 1901 | }, | ||
| 1902 | { PINMUX_DATA_REG("PEDR", 0xffec003c, 8) { | ||
| 1903 | PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, | ||
| 1904 | PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA } | ||
| 1905 | }, | ||
| 1906 | { PINMUX_DATA_REG("PFDR", 0xffec003e, 8) { | ||
| 1907 | PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA, | ||
| 1908 | PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA } | ||
| 1909 | }, | ||
| 1910 | { PINMUX_DATA_REG("PGDR", 0xffec0040, 8) { | ||
| 1911 | PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA, | ||
| 1912 | PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA } | ||
| 1913 | }, | ||
| 1914 | { PINMUX_DATA_REG("PHDR", 0xffec0042, 8) { | ||
| 1915 | PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA, | ||
| 1916 | PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA } | ||
| 1917 | }, | ||
| 1918 | { PINMUX_DATA_REG("PIDR", 0xffec0044, 8) { | ||
| 1919 | PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA, | ||
| 1920 | PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA } | ||
| 1921 | }, | ||
| 1922 | { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) { | ||
| 1923 | PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA, | ||
| 1924 | PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA } | ||
| 1925 | }, | ||
| 1926 | { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) { | ||
| 1927 | PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA, | ||
| 1928 | PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA } | ||
| 1929 | }, | ||
| 1930 | { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) { | ||
| 1931 | PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, | ||
| 1932 | PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA } | ||
| 1933 | }, | ||
| 1934 | { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) { | ||
| 1935 | 0, PTM6_DATA, PTM5_DATA, PTM4_DATA, | ||
| 1936 | PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA } | ||
| 1937 | }, | ||
| 1938 | { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) { | ||
| 1939 | PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA, | ||
| 1940 | PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA } | ||
| 1941 | }, | ||
| 1942 | { PINMUX_DATA_REG("PODR", 0xffec0050, 8) { | ||
| 1943 | PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA, | ||
| 1944 | PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA } | ||
| 1945 | }, | ||
| 1946 | { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) { | ||
| 1947 | 0, PTP6_DATA, PTP5_DATA, PTP4_DATA, | ||
| 1948 | PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA } | ||
| 1949 | }, | ||
| 1950 | { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) { | ||
| 1951 | 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA, | ||
| 1952 | PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA } | ||
| 1953 | }, | ||
| 1954 | { PINMUX_DATA_REG("PRDR", 0xffec0056, 8) { | ||
| 1955 | PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA, | ||
| 1956 | PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA } | ||
| 1957 | }, | ||
| 1958 | { PINMUX_DATA_REG("PSDR", 0xffec0058, 8) { | ||
| 1959 | PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA, | ||
| 1960 | PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA } | ||
| 1961 | }, | ||
| 1962 | { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) { | ||
| 1963 | 0, 0, PTT5_DATA, PTT4_DATA, | ||
| 1964 | PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA } | ||
| 1965 | }, | ||
| 1966 | { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) { | ||
| 1967 | PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA, | ||
| 1968 | PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA } | ||
| 1969 | }, | ||
| 1970 | { PINMUX_DATA_REG("PVDR", 0xffec005e, 8) { | ||
| 1971 | PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA, | ||
| 1972 | PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA } | ||
| 1973 | }, | ||
| 1974 | { PINMUX_DATA_REG("PWDR", 0xffec0060, 8) { | ||
| 1975 | PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA, | ||
| 1976 | PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA } | ||
| 1977 | }, | ||
| 1978 | { PINMUX_DATA_REG("PXDR", 0xffec0062, 8) { | ||
| 1979 | PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA, | ||
| 1980 | PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA } | ||
| 1981 | }, | ||
| 1982 | { PINMUX_DATA_REG("PYDR", 0xffec0064, 8) { | ||
| 1983 | PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA, | ||
| 1984 | PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA } | ||
| 1985 | }, | ||
| 1986 | { PINMUX_DATA_REG("PZDR", 0xffec0066, 8) { | ||
| 1987 | PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA, | ||
| 1988 | PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA } | ||
| 1989 | }, | ||
| 1990 | { }, | ||
| 1991 | }; | ||
| 1992 | |||
| 1993 | static struct pinmux_info sh7757_pinmux_info = { | ||
| 1994 | .name = "sh7757_pfc", | ||
| 1995 | .reserved_id = PINMUX_RESERVED, | ||
| 1996 | .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, | ||
| 1997 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, | ||
| 1998 | .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, | ||
| 1999 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, | ||
| 2000 | .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, | ||
| 2001 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | ||
| 2002 | |||
| 2003 | .first_gpio = GPIO_PTA7, | ||
| 2004 | .last_gpio = GPIO_FN_D0, | ||
| 2005 | |||
| 2006 | .gpios = pinmux_gpios, | ||
| 2007 | .cfg_regs = pinmux_config_regs, | ||
| 2008 | .data_regs = pinmux_data_regs, | ||
| 2009 | |||
| 2010 | .gpio_data = pinmux_data, | ||
| 2011 | .gpio_data_size = ARRAY_SIZE(pinmux_data), | ||
| 2012 | }; | ||
| 2013 | |||
| 2014 | static int __init plat_pinmux_setup(void) | ||
| 2015 | { | ||
| 2016 | return register_pinmux(&sh7757_pinmux_info); | ||
| 2017 | } | ||
| 2018 | |||
| 2019 | arch_initcall(plat_pinmux_setup); | ||
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 1a956b1beccc..4a9010bf4fd3 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | |||
| @@ -40,7 +40,7 @@ static struct platform_device iic_device = { | |||
| 40 | }; | 40 | }; |
| 41 | 41 | ||
| 42 | static struct r8a66597_platdata r8a66597_data = { | 42 | static struct r8a66597_platdata r8a66597_data = { |
| 43 | /* This set zero to all members */ | 43 | .on_chip = 1, |
| 44 | }; | 44 | }; |
| 45 | 45 | ||
| 46 | static struct resource usb_host_resources[] = { | 46 | static struct resource usb_host_resources[] = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index cda76ebf87c3..35097753456c 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
| @@ -13,9 +13,11 @@ | |||
| 13 | #include <linux/serial_sci.h> | 13 | #include <linux/serial_sci.h> |
| 14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
| 15 | #include <linux/uio_driver.h> | 15 | #include <linux/uio_driver.h> |
| 16 | #include <linux/usb/m66592.h> | ||
| 16 | #include <linux/sh_timer.h> | 17 | #include <linux/sh_timer.h> |
| 17 | #include <asm/clock.h> | 18 | #include <asm/clock.h> |
| 18 | #include <asm/mmzone.h> | 19 | #include <asm/mmzone.h> |
| 20 | #include <cpu/sh7722.h> | ||
| 19 | 21 | ||
| 20 | static struct resource rtc_resources[] = { | 22 | static struct resource rtc_resources[] = { |
| 21 | [0] = { | 23 | [0] = { |
| @@ -45,11 +47,18 @@ static struct platform_device rtc_device = { | |||
| 45 | .id = -1, | 47 | .id = -1, |
| 46 | .num_resources = ARRAY_SIZE(rtc_resources), | 48 | .num_resources = ARRAY_SIZE(rtc_resources), |
| 47 | .resource = rtc_resources, | 49 | .resource = rtc_resources, |
| 50 | .archdata = { | ||
| 51 | .hwblk_id = HWBLK_RTC, | ||
| 52 | }, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct m66592_platdata usbf_platdata = { | ||
| 56 | .on_chip = 1, | ||
| 48 | }; | 57 | }; |
| 49 | 58 | ||
| 50 | static struct resource usbf_resources[] = { | 59 | static struct resource usbf_resources[] = { |
| 51 | [0] = { | 60 | [0] = { |
| 52 | .name = "m66592_udc", | 61 | .name = "USBF", |
| 53 | .start = 0x04480000, | 62 | .start = 0x04480000, |
| 54 | .end = 0x044800FF, | 63 | .end = 0x044800FF, |
| 55 | .flags = IORESOURCE_MEM, | 64 | .flags = IORESOURCE_MEM, |
| @@ -67,9 +76,13 @@ static struct platform_device usbf_device = { | |||
| 67 | .dev = { | 76 | .dev = { |
| 68 | .dma_mask = NULL, | 77 | .dma_mask = NULL, |
| 69 | .coherent_dma_mask = 0xffffffff, | 78 | .coherent_dma_mask = 0xffffffff, |
| 79 | .platform_data = &usbf_platdata, | ||
| 70 | }, | 80 | }, |
| 71 | .num_resources = ARRAY_SIZE(usbf_resources), | 81 | .num_resources = ARRAY_SIZE(usbf_resources), |
| 72 | .resource = usbf_resources, | 82 | .resource = usbf_resources, |
| 83 | .archdata = { | ||
| 84 | .hwblk_id = HWBLK_USBF, | ||
| 85 | }, | ||
| 73 | }; | 86 | }; |
| 74 | 87 | ||
| 75 | static struct resource iic_resources[] = { | 88 | static struct resource iic_resources[] = { |
| @@ -91,6 +104,9 @@ static struct platform_device iic_device = { | |||
| 91 | .id = 0, /* "i2c0" clock */ | 104 | .id = 0, /* "i2c0" clock */ |
| 92 | .num_resources = ARRAY_SIZE(iic_resources), | 105 | .num_resources = ARRAY_SIZE(iic_resources), |
| 93 | .resource = iic_resources, | 106 | .resource = iic_resources, |
| 107 | .archdata = { | ||
| 108 | .hwblk_id = HWBLK_IIC, | ||
| 109 | }, | ||
| 94 | }; | 110 | }; |
| 95 | 111 | ||
| 96 | static struct uio_info vpu_platform_data = { | 112 | static struct uio_info vpu_platform_data = { |
| @@ -119,6 +135,9 @@ static struct platform_device vpu_device = { | |||
| 119 | }, | 135 | }, |
| 120 | .resource = vpu_resources, | 136 | .resource = vpu_resources, |
| 121 | .num_resources = ARRAY_SIZE(vpu_resources), | 137 | .num_resources = ARRAY_SIZE(vpu_resources), |
| 138 | .archdata = { | ||
| 139 | .hwblk_id = HWBLK_VPU, | ||
| 140 | }, | ||
| 122 | }; | 141 | }; |
| 123 | 142 | ||
| 124 | static struct uio_info veu_platform_data = { | 143 | static struct uio_info veu_platform_data = { |
| @@ -147,6 +166,9 @@ static struct platform_device veu_device = { | |||
| 147 | }, | 166 | }, |
| 148 | .resource = veu_resources, | 167 | .resource = veu_resources, |
| 149 | .num_resources = ARRAY_SIZE(veu_resources), | 168 | .num_resources = ARRAY_SIZE(veu_resources), |
| 169 | .archdata = { | ||
| 170 | .hwblk_id = HWBLK_VEU, | ||
| 171 | }, | ||
| 150 | }; | 172 | }; |
| 151 | 173 | ||
| 152 | static struct uio_info jpu_platform_data = { | 174 | static struct uio_info jpu_platform_data = { |
| @@ -175,6 +197,9 @@ static struct platform_device jpu_device = { | |||
| 175 | }, | 197 | }, |
| 176 | .resource = jpu_resources, | 198 | .resource = jpu_resources, |
| 177 | .num_resources = ARRAY_SIZE(jpu_resources), | 199 | .num_resources = ARRAY_SIZE(jpu_resources), |
| 200 | .archdata = { | ||
| 201 | .hwblk_id = HWBLK_JPU, | ||
| 202 | }, | ||
| 178 | }; | 203 | }; |
| 179 | 204 | ||
| 180 | static struct sh_timer_config cmt_platform_data = { | 205 | static struct sh_timer_config cmt_platform_data = { |
| @@ -207,6 +232,9 @@ static struct platform_device cmt_device = { | |||
| 207 | }, | 232 | }, |
| 208 | .resource = cmt_resources, | 233 | .resource = cmt_resources, |
| 209 | .num_resources = ARRAY_SIZE(cmt_resources), | 234 | .num_resources = ARRAY_SIZE(cmt_resources), |
| 235 | .archdata = { | ||
| 236 | .hwblk_id = HWBLK_CMT, | ||
| 237 | }, | ||
| 210 | }; | 238 | }; |
| 211 | 239 | ||
| 212 | static struct sh_timer_config tmu0_platform_data = { | 240 | static struct sh_timer_config tmu0_platform_data = { |
| @@ -238,6 +266,9 @@ static struct platform_device tmu0_device = { | |||
| 238 | }, | 266 | }, |
| 239 | .resource = tmu0_resources, | 267 | .resource = tmu0_resources, |
| 240 | .num_resources = ARRAY_SIZE(tmu0_resources), | 268 | .num_resources = ARRAY_SIZE(tmu0_resources), |
| 269 | .archdata = { | ||
| 270 | .hwblk_id = HWBLK_TMU, | ||
| 271 | }, | ||
| 241 | }; | 272 | }; |
| 242 | 273 | ||
| 243 | static struct sh_timer_config tmu1_platform_data = { | 274 | static struct sh_timer_config tmu1_platform_data = { |
| @@ -269,6 +300,9 @@ static struct platform_device tmu1_device = { | |||
| 269 | }, | 300 | }, |
| 270 | .resource = tmu1_resources, | 301 | .resource = tmu1_resources, |
| 271 | .num_resources = ARRAY_SIZE(tmu1_resources), | 302 | .num_resources = ARRAY_SIZE(tmu1_resources), |
| 303 | .archdata = { | ||
| 304 | .hwblk_id = HWBLK_TMU, | ||
| 305 | }, | ||
| 272 | }; | 306 | }; |
| 273 | 307 | ||
| 274 | static struct sh_timer_config tmu2_platform_data = { | 308 | static struct sh_timer_config tmu2_platform_data = { |
| @@ -299,6 +333,9 @@ static struct platform_device tmu2_device = { | |||
| 299 | }, | 333 | }, |
| 300 | .resource = tmu2_resources, | 334 | .resource = tmu2_resources, |
| 301 | .num_resources = ARRAY_SIZE(tmu2_resources), | 335 | .num_resources = ARRAY_SIZE(tmu2_resources), |
| 336 | .archdata = { | ||
| 337 | .hwblk_id = HWBLK_TMU, | ||
| 338 | }, | ||
| 302 | }; | 339 | }; |
| 303 | 340 | ||
| 304 | static struct plat_sci_port sci_platform_data[] = { | 341 | static struct plat_sci_port sci_platform_data[] = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index b45dace9539f..4caa5a7ca86e 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c | |||
| @@ -18,6 +18,7 @@ | |||
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <asm/clock.h> | 19 | #include <asm/clock.h> |
| 20 | #include <asm/mmzone.h> | 20 | #include <asm/mmzone.h> |
| 21 | #include <cpu/sh7723.h> | ||
| 21 | 22 | ||
| 22 | static struct uio_info vpu_platform_data = { | 23 | static struct uio_info vpu_platform_data = { |
| 23 | .name = "VPU5", | 24 | .name = "VPU5", |
| @@ -45,6 +46,9 @@ static struct platform_device vpu_device = { | |||
| 45 | }, | 46 | }, |
| 46 | .resource = vpu_resources, | 47 | .resource = vpu_resources, |
| 47 | .num_resources = ARRAY_SIZE(vpu_resources), | 48 | .num_resources = ARRAY_SIZE(vpu_resources), |
| 49 | .archdata = { | ||
| 50 | .hwblk_id = HWBLK_VPU, | ||
| 51 | }, | ||
| 48 | }; | 52 | }; |
| 49 | 53 | ||
| 50 | static struct uio_info veu0_platform_data = { | 54 | static struct uio_info veu0_platform_data = { |
| @@ -73,6 +77,9 @@ static struct platform_device veu0_device = { | |||
| 73 | }, | 77 | }, |
| 74 | .resource = veu0_resources, | 78 | .resource = veu0_resources, |
| 75 | .num_resources = ARRAY_SIZE(veu0_resources), | 79 | .num_resources = ARRAY_SIZE(veu0_resources), |
| 80 | .archdata = { | ||
| 81 | .hwblk_id = HWBLK_VEU2H0, | ||
| 82 | }, | ||
| 76 | }; | 83 | }; |
| 77 | 84 | ||
| 78 | static struct uio_info veu1_platform_data = { | 85 | static struct uio_info veu1_platform_data = { |
| @@ -101,6 +108,9 @@ static struct platform_device veu1_device = { | |||
| 101 | }, | 108 | }, |
| 102 | .resource = veu1_resources, | 109 | .resource = veu1_resources, |
| 103 | .num_resources = ARRAY_SIZE(veu1_resources), | 110 | .num_resources = ARRAY_SIZE(veu1_resources), |
| 111 | .archdata = { | ||
| 112 | .hwblk_id = HWBLK_VEU2H1, | ||
| 113 | }, | ||
| 104 | }; | 114 | }; |
| 105 | 115 | ||
| 106 | static struct sh_timer_config cmt_platform_data = { | 116 | static struct sh_timer_config cmt_platform_data = { |
| @@ -133,6 +143,9 @@ static struct platform_device cmt_device = { | |||
| 133 | }, | 143 | }, |
| 134 | .resource = cmt_resources, | 144 | .resource = cmt_resources, |
| 135 | .num_resources = ARRAY_SIZE(cmt_resources), | 145 | .num_resources = ARRAY_SIZE(cmt_resources), |
| 146 | .archdata = { | ||
| 147 | .hwblk_id = HWBLK_CMT, | ||
| 148 | }, | ||
| 136 | }; | 149 | }; |
| 137 | 150 | ||
| 138 | static struct sh_timer_config tmu0_platform_data = { | 151 | static struct sh_timer_config tmu0_platform_data = { |
| @@ -164,6 +177,9 @@ static struct platform_device tmu0_device = { | |||
| 164 | }, | 177 | }, |
| 165 | .resource = tmu0_resources, | 178 | .resource = tmu0_resources, |
| 166 | .num_resources = ARRAY_SIZE(tmu0_resources), | 179 | .num_resources = ARRAY_SIZE(tmu0_resources), |
| 180 | .archdata = { | ||
| 181 | .hwblk_id = HWBLK_TMU0, | ||
| 182 | }, | ||
| 167 | }; | 183 | }; |
| 168 | 184 | ||
| 169 | static struct sh_timer_config tmu1_platform_data = { | 185 | static struct sh_timer_config tmu1_platform_data = { |
| @@ -195,6 +211,9 @@ static struct platform_device tmu1_device = { | |||
| 195 | }, | 211 | }, |
| 196 | .resource = tmu1_resources, | 212 | .resource = tmu1_resources, |
| 197 | .num_resources = ARRAY_SIZE(tmu1_resources), | 213 | .num_resources = ARRAY_SIZE(tmu1_resources), |
| 214 | .archdata = { | ||
| 215 | .hwblk_id = HWBLK_TMU0, | ||
| 216 | }, | ||
| 198 | }; | 217 | }; |
| 199 | 218 | ||
| 200 | static struct sh_timer_config tmu2_platform_data = { | 219 | static struct sh_timer_config tmu2_platform_data = { |
| @@ -225,6 +244,9 @@ static struct platform_device tmu2_device = { | |||
| 225 | }, | 244 | }, |
| 226 | .resource = tmu2_resources, | 245 | .resource = tmu2_resources, |
| 227 | .num_resources = ARRAY_SIZE(tmu2_resources), | 246 | .num_resources = ARRAY_SIZE(tmu2_resources), |
| 247 | .archdata = { | ||
| 248 | .hwblk_id = HWBLK_TMU0, | ||
| 249 | }, | ||
| 228 | }; | 250 | }; |
| 229 | 251 | ||
| 230 | static struct sh_timer_config tmu3_platform_data = { | 252 | static struct sh_timer_config tmu3_platform_data = { |
| @@ -255,6 +277,9 @@ static struct platform_device tmu3_device = { | |||
| 255 | }, | 277 | }, |
| 256 | .resource = tmu3_resources, | 278 | .resource = tmu3_resources, |
| 257 | .num_resources = ARRAY_SIZE(tmu3_resources), | 279 | .num_resources = ARRAY_SIZE(tmu3_resources), |
| 280 | .archdata = { | ||
| 281 | .hwblk_id = HWBLK_TMU1, | ||
| 282 | }, | ||
| 258 | }; | 283 | }; |
| 259 | 284 | ||
| 260 | static struct sh_timer_config tmu4_platform_data = { | 285 | static struct sh_timer_config tmu4_platform_data = { |
| @@ -285,6 +310,9 @@ static struct platform_device tmu4_device = { | |||
| 285 | }, | 310 | }, |
| 286 | .resource = tmu4_resources, | 311 | .resource = tmu4_resources, |
| 287 | .num_resources = ARRAY_SIZE(tmu4_resources), | 312 | .num_resources = ARRAY_SIZE(tmu4_resources), |
| 313 | .archdata = { | ||
| 314 | .hwblk_id = HWBLK_TMU1, | ||
| 315 | }, | ||
| 288 | }; | 316 | }; |
| 289 | 317 | ||
| 290 | static struct sh_timer_config tmu5_platform_data = { | 318 | static struct sh_timer_config tmu5_platform_data = { |
| @@ -315,6 +343,9 @@ static struct platform_device tmu5_device = { | |||
| 315 | }, | 343 | }, |
| 316 | .resource = tmu5_resources, | 344 | .resource = tmu5_resources, |
| 317 | .num_resources = ARRAY_SIZE(tmu5_resources), | 345 | .num_resources = ARRAY_SIZE(tmu5_resources), |
| 346 | .archdata = { | ||
| 347 | .hwblk_id = HWBLK_TMU1, | ||
| 348 | }, | ||
| 318 | }; | 349 | }; |
| 319 | 350 | ||
| 320 | static struct plat_sci_port sci_platform_data[] = { | 351 | static struct plat_sci_port sci_platform_data[] = { |
| @@ -395,10 +426,13 @@ static struct platform_device rtc_device = { | |||
| 395 | .id = -1, | 426 | .id = -1, |
| 396 | .num_resources = ARRAY_SIZE(rtc_resources), | 427 | .num_resources = ARRAY_SIZE(rtc_resources), |
| 397 | .resource = rtc_resources, | 428 | .resource = rtc_resources, |
| 429 | .archdata = { | ||
| 430 | .hwblk_id = HWBLK_RTC, | ||
| 431 | }, | ||
| 398 | }; | 432 | }; |
| 399 | 433 | ||
| 400 | static struct r8a66597_platdata r8a66597_data = { | 434 | static struct r8a66597_platdata r8a66597_data = { |
| 401 | /* This set zero to all members */ | 435 | .on_chip = 1, |
| 402 | }; | 436 | }; |
| 403 | 437 | ||
| 404 | static struct resource sh7723_usb_host_resources[] = { | 438 | static struct resource sh7723_usb_host_resources[] = { |
| @@ -424,6 +458,9 @@ static struct platform_device sh7723_usb_host_device = { | |||
| 424 | }, | 458 | }, |
| 425 | .num_resources = ARRAY_SIZE(sh7723_usb_host_resources), | 459 | .num_resources = ARRAY_SIZE(sh7723_usb_host_resources), |
| 426 | .resource = sh7723_usb_host_resources, | 460 | .resource = sh7723_usb_host_resources, |
| 461 | .archdata = { | ||
| 462 | .hwblk_id = HWBLK_USB, | ||
| 463 | }, | ||
| 427 | }; | 464 | }; |
| 428 | 465 | ||
| 429 | static struct resource iic_resources[] = { | 466 | static struct resource iic_resources[] = { |
| @@ -445,6 +482,9 @@ static struct platform_device iic_device = { | |||
| 445 | .id = 0, /* "i2c0" clock */ | 482 | .id = 0, /* "i2c0" clock */ |
| 446 | .num_resources = ARRAY_SIZE(iic_resources), | 483 | .num_resources = ARRAY_SIZE(iic_resources), |
| 447 | .resource = iic_resources, | 484 | .resource = iic_resources, |
| 485 | .archdata = { | ||
| 486 | .hwblk_id = HWBLK_IIC, | ||
| 487 | }, | ||
| 448 | }; | 488 | }; |
| 449 | 489 | ||
| 450 | static struct platform_device *sh7723_devices[] __initdata = { | 490 | static struct platform_device *sh7723_devices[] __initdata = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index a04edaab9a29..f3851fd757ec 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
| 23 | #include <asm/clock.h> | 23 | #include <asm/clock.h> |
| 24 | #include <asm/mmzone.h> | 24 | #include <asm/mmzone.h> |
| 25 | #include <cpu/sh7724.h> | ||
| 25 | 26 | ||
| 26 | /* Serial */ | 27 | /* Serial */ |
| 27 | static struct plat_sci_port sci_platform_data[] = { | 28 | static struct plat_sci_port sci_platform_data[] = { |
| @@ -103,6 +104,9 @@ static struct platform_device rtc_device = { | |||
| 103 | .id = -1, | 104 | .id = -1, |
| 104 | .num_resources = ARRAY_SIZE(rtc_resources), | 105 | .num_resources = ARRAY_SIZE(rtc_resources), |
| 105 | .resource = rtc_resources, | 106 | .resource = rtc_resources, |
| 107 | .archdata = { | ||
| 108 | .hwblk_id = HWBLK_RTC, | ||
| 109 | }, | ||
| 106 | }; | 110 | }; |
| 107 | 111 | ||
| 108 | /* I2C0 */ | 112 | /* I2C0 */ |
| @@ -125,6 +129,9 @@ static struct platform_device iic0_device = { | |||
| 125 | .id = 0, /* "i2c0" clock */ | 129 | .id = 0, /* "i2c0" clock */ |
| 126 | .num_resources = ARRAY_SIZE(iic0_resources), | 130 | .num_resources = ARRAY_SIZE(iic0_resources), |
| 127 | .resource = iic0_resources, | 131 | .resource = iic0_resources, |
| 132 | .archdata = { | ||
| 133 | .hwblk_id = HWBLK_IIC0, | ||
| 134 | }, | ||
| 128 | }; | 135 | }; |
| 129 | 136 | ||
| 130 | /* I2C1 */ | 137 | /* I2C1 */ |
| @@ -147,6 +154,9 @@ static struct platform_device iic1_device = { | |||
| 147 | .id = 1, /* "i2c1" clock */ | 154 | .id = 1, /* "i2c1" clock */ |
| 148 | .num_resources = ARRAY_SIZE(iic1_resources), | 155 | .num_resources = ARRAY_SIZE(iic1_resources), |
| 149 | .resource = iic1_resources, | 156 | .resource = iic1_resources, |
| 157 | .archdata = { | ||
| 158 | .hwblk_id = HWBLK_IIC1, | ||
| 159 | }, | ||
| 150 | }; | 160 | }; |
| 151 | 161 | ||
| 152 | /* VPU */ | 162 | /* VPU */ |
| @@ -176,6 +186,9 @@ static struct platform_device vpu_device = { | |||
| 176 | }, | 186 | }, |
| 177 | .resource = vpu_resources, | 187 | .resource = vpu_resources, |
| 178 | .num_resources = ARRAY_SIZE(vpu_resources), | 188 | .num_resources = ARRAY_SIZE(vpu_resources), |
| 189 | .archdata = { | ||
| 190 | .hwblk_id = HWBLK_VPU, | ||
| 191 | }, | ||
| 179 | }; | 192 | }; |
| 180 | 193 | ||
| 181 | /* VEU0 */ | 194 | /* VEU0 */ |
| @@ -205,6 +218,9 @@ static struct platform_device veu0_device = { | |||
| 205 | }, | 218 | }, |
| 206 | .resource = veu0_resources, | 219 | .resource = veu0_resources, |
| 207 | .num_resources = ARRAY_SIZE(veu0_resources), | 220 | .num_resources = ARRAY_SIZE(veu0_resources), |
| 221 | .archdata = { | ||
| 222 | .hwblk_id = HWBLK_VEU0, | ||
| 223 | }, | ||
| 208 | }; | 224 | }; |
| 209 | 225 | ||
| 210 | /* VEU1 */ | 226 | /* VEU1 */ |
| @@ -234,6 +250,9 @@ static struct platform_device veu1_device = { | |||
| 234 | }, | 250 | }, |
| 235 | .resource = veu1_resources, | 251 | .resource = veu1_resources, |
| 236 | .num_resources = ARRAY_SIZE(veu1_resources), | 252 | .num_resources = ARRAY_SIZE(veu1_resources), |
| 253 | .archdata = { | ||
| 254 | .hwblk_id = HWBLK_VEU1, | ||
| 255 | }, | ||
| 237 | }; | 256 | }; |
| 238 | 257 | ||
| 239 | static struct sh_timer_config cmt_platform_data = { | 258 | static struct sh_timer_config cmt_platform_data = { |
| @@ -266,6 +285,9 @@ static struct platform_device cmt_device = { | |||
| 266 | }, | 285 | }, |
| 267 | .resource = cmt_resources, | 286 | .resource = cmt_resources, |
| 268 | .num_resources = ARRAY_SIZE(cmt_resources), | 287 | .num_resources = ARRAY_SIZE(cmt_resources), |
| 288 | .archdata = { | ||
| 289 | .hwblk_id = HWBLK_CMT, | ||
| 290 | }, | ||
| 269 | }; | 291 | }; |
| 270 | 292 | ||
| 271 | static struct sh_timer_config tmu0_platform_data = { | 293 | static struct sh_timer_config tmu0_platform_data = { |
| @@ -297,6 +319,9 @@ static struct platform_device tmu0_device = { | |||
| 297 | }, | 319 | }, |
| 298 | .resource = tmu0_resources, | 320 | .resource = tmu0_resources, |
| 299 | .num_resources = ARRAY_SIZE(tmu0_resources), | 321 | .num_resources = ARRAY_SIZE(tmu0_resources), |
| 322 | .archdata = { | ||
| 323 | .hwblk_id = HWBLK_TMU0, | ||
| 324 | }, | ||
| 300 | }; | 325 | }; |
| 301 | 326 | ||
| 302 | static struct sh_timer_config tmu1_platform_data = { | 327 | static struct sh_timer_config tmu1_platform_data = { |
| @@ -328,6 +353,9 @@ static struct platform_device tmu1_device = { | |||
| 328 | }, | 353 | }, |
| 329 | .resource = tmu1_resources, | 354 | .resource = tmu1_resources, |
| 330 | .num_resources = ARRAY_SIZE(tmu1_resources), | 355 | .num_resources = ARRAY_SIZE(tmu1_resources), |
| 356 | .archdata = { | ||
| 357 | .hwblk_id = HWBLK_TMU0, | ||
| 358 | }, | ||
| 331 | }; | 359 | }; |
| 332 | 360 | ||
| 333 | static struct sh_timer_config tmu2_platform_data = { | 361 | static struct sh_timer_config tmu2_platform_data = { |
| @@ -358,6 +386,9 @@ static struct platform_device tmu2_device = { | |||
| 358 | }, | 386 | }, |
| 359 | .resource = tmu2_resources, | 387 | .resource = tmu2_resources, |
| 360 | .num_resources = ARRAY_SIZE(tmu2_resources), | 388 | .num_resources = ARRAY_SIZE(tmu2_resources), |
| 389 | .archdata = { | ||
| 390 | .hwblk_id = HWBLK_TMU0, | ||
| 391 | }, | ||
| 361 | }; | 392 | }; |
| 362 | 393 | ||
| 363 | 394 | ||
| @@ -389,6 +420,9 @@ static struct platform_device tmu3_device = { | |||
| 389 | }, | 420 | }, |
| 390 | .resource = tmu3_resources, | 421 | .resource = tmu3_resources, |
| 391 | .num_resources = ARRAY_SIZE(tmu3_resources), | 422 | .num_resources = ARRAY_SIZE(tmu3_resources), |
| 423 | .archdata = { | ||
| 424 | .hwblk_id = HWBLK_TMU1, | ||
| 425 | }, | ||
| 392 | }; | 426 | }; |
| 393 | 427 | ||
| 394 | static struct sh_timer_config tmu4_platform_data = { | 428 | static struct sh_timer_config tmu4_platform_data = { |
| @@ -419,6 +453,9 @@ static struct platform_device tmu4_device = { | |||
| 419 | }, | 453 | }, |
| 420 | .resource = tmu4_resources, | 454 | .resource = tmu4_resources, |
| 421 | .num_resources = ARRAY_SIZE(tmu4_resources), | 455 | .num_resources = ARRAY_SIZE(tmu4_resources), |
| 456 | .archdata = { | ||
| 457 | .hwblk_id = HWBLK_TMU1, | ||
| 458 | }, | ||
| 422 | }; | 459 | }; |
| 423 | 460 | ||
| 424 | static struct sh_timer_config tmu5_platform_data = { | 461 | static struct sh_timer_config tmu5_platform_data = { |
| @@ -449,6 +486,9 @@ static struct platform_device tmu5_device = { | |||
| 449 | }, | 486 | }, |
| 450 | .resource = tmu5_resources, | 487 | .resource = tmu5_resources, |
| 451 | .num_resources = ARRAY_SIZE(tmu5_resources), | 488 | .num_resources = ARRAY_SIZE(tmu5_resources), |
| 489 | .archdata = { | ||
| 490 | .hwblk_id = HWBLK_TMU1, | ||
| 491 | }, | ||
| 452 | }; | 492 | }; |
| 453 | 493 | ||
| 454 | /* JPU */ | 494 | /* JPU */ |
| @@ -478,6 +518,9 @@ static struct platform_device jpu_device = { | |||
| 478 | }, | 518 | }, |
| 479 | .resource = jpu_resources, | 519 | .resource = jpu_resources, |
| 480 | .num_resources = ARRAY_SIZE(jpu_resources), | 520 | .num_resources = ARRAY_SIZE(jpu_resources), |
| 521 | .archdata = { | ||
| 522 | .hwblk_id = HWBLK_JPU, | ||
| 523 | }, | ||
| 481 | }; | 524 | }; |
| 482 | 525 | ||
| 483 | static struct platform_device *sh7724_devices[] __initdata = { | 526 | static struct platform_device *sh7724_devices[] __initdata = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c new file mode 100644 index 000000000000..c470e15f2e03 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c | |||
| @@ -0,0 +1,513 @@ | |||
| 1 | /* | ||
| 2 | * SH7757 Setup | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Renesas Solutions Corp. | ||
| 5 | * | ||
| 6 | * based on setup-sh7785.c : Copyright (C) 2007 Paul Mundt | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #include <linux/platform_device.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/serial.h> | ||
| 15 | #include <linux/serial_sci.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/mm.h> | ||
| 18 | #include <linux/sh_timer.h> | ||
| 19 | |||
| 20 | static struct sh_timer_config tmu0_platform_data = { | ||
| 21 | .name = "TMU0", | ||
| 22 | .channel_offset = 0x04, | ||
| 23 | .timer_bit = 0, | ||
| 24 | .clk = "peripheral_clk", | ||
| 25 | .clockevent_rating = 200, | ||
| 26 | }; | ||
| 27 | |||
| 28 | static struct resource tmu0_resources[] = { | ||
| 29 | [0] = { | ||
| 30 | .name = "TMU0", | ||
| 31 | .start = 0xfe430008, | ||
| 32 | .end = 0xfe430013, | ||
| 33 | .flags = IORESOURCE_MEM, | ||
| 34 | }, | ||
| 35 | [1] = { | ||
| 36 | .start = 28, | ||
| 37 | .flags = IORESOURCE_IRQ, | ||
| 38 | }, | ||
| 39 | }; | ||
| 40 | |||
| 41 | static struct platform_device tmu0_device = { | ||
| 42 | .name = "sh_tmu", | ||
| 43 | .id = 0, | ||
| 44 | .dev = { | ||
| 45 | .platform_data = &tmu0_platform_data, | ||
| 46 | }, | ||
| 47 | .resource = tmu0_resources, | ||
| 48 | .num_resources = ARRAY_SIZE(tmu0_resources), | ||
| 49 | }; | ||
| 50 | |||
| 51 | static struct sh_timer_config tmu1_platform_data = { | ||
| 52 | .name = "TMU1", | ||
| 53 | .channel_offset = 0x10, | ||
| 54 | .timer_bit = 1, | ||
| 55 | .clk = "peripheral_clk", | ||
| 56 | .clocksource_rating = 200, | ||
| 57 | }; | ||
| 58 | |||
| 59 | static struct resource tmu1_resources[] = { | ||
| 60 | [0] = { | ||
| 61 | .name = "TMU1", | ||
| 62 | .start = 0xfe430014, | ||
| 63 | .end = 0xfe43001f, | ||
| 64 | .flags = IORESOURCE_MEM, | ||
| 65 | }, | ||
| 66 | [1] = { | ||
| 67 | .start = 29, | ||
| 68 | .flags = IORESOURCE_IRQ, | ||
| 69 | }, | ||
| 70 | }; | ||
| 71 | |||
| 72 | static struct platform_device tmu1_device = { | ||
| 73 | .name = "sh_tmu", | ||
| 74 | .id = 1, | ||
| 75 | .dev = { | ||
| 76 | .platform_data = &tmu1_platform_data, | ||
| 77 | }, | ||
| 78 | .resource = tmu1_resources, | ||
| 79 | .num_resources = ARRAY_SIZE(tmu1_resources), | ||
| 80 | }; | ||
| 81 | |||
| 82 | static struct plat_sci_port sci_platform_data[] = { | ||
| 83 | { | ||
| 84 | .mapbase = 0xfe4b0000, /* SCIF2 */ | ||
| 85 | .flags = UPF_BOOT_AUTOCONF, | ||
| 86 | .type = PORT_SCIF, | ||
| 87 | .irqs = { 40, 40, 40, 40 }, | ||
| 88 | }, { | ||
| 89 | .mapbase = 0xfe4c0000, /* SCIF3 */ | ||
| 90 | .flags = UPF_BOOT_AUTOCONF, | ||
| 91 | .type = PORT_SCIF, | ||
| 92 | .irqs = { 76, 76, 76, 76 }, | ||
| 93 | }, { | ||
| 94 | .mapbase = 0xfe4d0000, /* SCIF4 */ | ||
| 95 | .flags = UPF_BOOT_AUTOCONF, | ||
| 96 | .type = PORT_SCIF, | ||
| 97 | .irqs = { 104, 104, 104, 104 }, | ||
| 98 | }, { | ||
| 99 | .flags = 0, | ||
| 100 | } | ||
| 101 | }; | ||
| 102 | |||
| 103 | static struct platform_device sci_device = { | ||
| 104 | .name = "sh-sci", | ||
| 105 | .id = -1, | ||
| 106 | .dev = { | ||
| 107 | .platform_data = sci_platform_data, | ||
| 108 | }, | ||
| 109 | }; | ||
| 110 | |||
| 111 | static struct platform_device *sh7757_devices[] __initdata = { | ||
| 112 | &tmu0_device, | ||
| 113 | &tmu1_device, | ||
| 114 | &sci_device, | ||
| 115 | }; | ||
| 116 | |||
| 117 | static int __init sh7757_devices_setup(void) | ||
| 118 | { | ||
| 119 | return platform_add_devices(sh7757_devices, | ||
| 120 | ARRAY_SIZE(sh7757_devices)); | ||
| 121 | } | ||
| 122 | arch_initcall(sh7757_devices_setup); | ||
| 123 | |||
| 124 | enum { | ||
| 125 | UNUSED = 0, | ||
| 126 | |||
| 127 | /* interrupt sources */ | ||
| 128 | |||
| 129 | IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH, | ||
| 130 | IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH, | ||
| 131 | IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH, | ||
| 132 | IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, | ||
| 133 | |||
| 134 | IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH, | ||
| 135 | IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH, | ||
| 136 | IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH, | ||
| 137 | IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, | ||
| 138 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | ||
| 139 | |||
| 140 | SDHI, | ||
| 141 | DVC, | ||
| 142 | IRQ8, IRQ9, IRQ10, | ||
| 143 | WDT0, | ||
| 144 | TMU0, TMU1, TMU2, TMU2_TICPI, | ||
| 145 | HUDI, | ||
| 146 | |||
| 147 | ARC4, | ||
| 148 | DMAC0, | ||
| 149 | IRQ11, | ||
| 150 | SCIF2, | ||
| 151 | DMAC1_6, | ||
| 152 | USB0, | ||
| 153 | IRQ12, | ||
| 154 | JMC, | ||
| 155 | SPI1, | ||
| 156 | IRQ13, IRQ14, | ||
| 157 | USB1, | ||
| 158 | TMR01, TMR23, TMR45, | ||
| 159 | WDT1, | ||
| 160 | FRT, | ||
| 161 | LPC, | ||
| 162 | SCIF0, SCIF1, SCIF3, | ||
| 163 | PECI0I, PECI1I, PECI2I, | ||
| 164 | IRQ15, | ||
| 165 | ETHERC, | ||
| 166 | SPI0, | ||
| 167 | ADC1, | ||
| 168 | DMAC1_8, | ||
| 169 | SIM, | ||
| 170 | TMU3, TMU4, TMU5, | ||
| 171 | ADC0, | ||
| 172 | SCIF4, | ||
| 173 | IIC0_0, IIC0_1, IIC0_2, IIC0_3, | ||
| 174 | IIC1_0, IIC1_1, IIC1_2, IIC1_3, | ||
| 175 | IIC2_0, IIC2_1, IIC2_2, IIC2_3, | ||
| 176 | IIC3_0, IIC3_1, IIC3_2, IIC3_3, | ||
| 177 | IIC4_0, IIC4_1, IIC4_2, IIC4_3, | ||
| 178 | IIC5_0, IIC5_1, IIC5_2, IIC5_3, | ||
| 179 | IIC6_0, IIC6_1, IIC6_2, IIC6_3, | ||
| 180 | IIC7_0, IIC7_1, IIC7_2, IIC7_3, | ||
| 181 | IIC8_0, IIC8_1, IIC8_2, IIC8_3, | ||
| 182 | IIC9_0, IIC9_1, IIC9_2, IIC9_3, | ||
| 183 | PCIINTA, | ||
| 184 | PCIE, | ||
| 185 | SGPIO, | ||
| 186 | |||
| 187 | /* interrupt groups */ | ||
| 188 | |||
| 189 | TMU012, TMU345, | ||
| 190 | }; | ||
| 191 | |||
| 192 | static struct intc_vect vectors[] __initdata = { | ||
| 193 | INTC_VECT(SDHI, 0x480), INTC_VECT(SDHI, 0x04a0), | ||
| 194 | INTC_VECT(SDHI, 0x4c0), | ||
| 195 | INTC_VECT(DVC, 0x4e0), | ||
| 196 | INTC_VECT(IRQ8, 0x500), INTC_VECT(IRQ9, 0x520), | ||
| 197 | INTC_VECT(IRQ10, 0x540), | ||
| 198 | INTC_VECT(WDT0, 0x560), | ||
| 199 | INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0), | ||
| 200 | INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0), | ||
| 201 | INTC_VECT(HUDI, 0x600), | ||
| 202 | INTC_VECT(ARC4, 0x620), | ||
| 203 | INTC_VECT(DMAC0, 0x640), INTC_VECT(DMAC0, 0x660), | ||
| 204 | INTC_VECT(DMAC0, 0x680), INTC_VECT(DMAC0, 0x6a0), | ||
| 205 | INTC_VECT(DMAC0, 0x6c0), | ||
| 206 | INTC_VECT(IRQ11, 0x6e0), | ||
| 207 | INTC_VECT(SCIF2, 0x700), INTC_VECT(SCIF2, 0x720), | ||
| 208 | INTC_VECT(SCIF2, 0x740), INTC_VECT(SCIF2, 0x760), | ||
| 209 | INTC_VECT(DMAC0, 0x780), INTC_VECT(DMAC0, 0x7a0), | ||
| 210 | INTC_VECT(DMAC1_6, 0x7c0), INTC_VECT(DMAC1_6, 0x7e0), | ||
| 211 | INTC_VECT(USB0, 0x840), | ||
| 212 | INTC_VECT(IRQ12, 0x880), | ||
| 213 | INTC_VECT(JMC, 0x8a0), | ||
| 214 | INTC_VECT(SPI1, 0x8c0), | ||
| 215 | INTC_VECT(IRQ13, 0x8e0), INTC_VECT(IRQ14, 0x900), | ||
| 216 | INTC_VECT(USB1, 0x920), | ||
| 217 | INTC_VECT(TMR01, 0xa00), INTC_VECT(TMR23, 0xa20), | ||
| 218 | INTC_VECT(TMR45, 0xa40), | ||
| 219 | INTC_VECT(WDT1, 0xa60), | ||
| 220 | INTC_VECT(FRT, 0xa80), | ||
| 221 | INTC_VECT(LPC, 0xaa0), INTC_VECT(LPC, 0xac0), | ||
| 222 | INTC_VECT(LPC, 0xae0), INTC_VECT(LPC, 0xb00), | ||
| 223 | INTC_VECT(LPC, 0xb20), | ||
| 224 | INTC_VECT(SCIF0, 0xb40), INTC_VECT(SCIF1, 0xb60), | ||
| 225 | INTC_VECT(SCIF3, 0xb80), INTC_VECT(SCIF3, 0xba0), | ||
| 226 | INTC_VECT(SCIF3, 0xbc0), INTC_VECT(SCIF3, 0xbe0), | ||
| 227 | INTC_VECT(PECI0I, 0xc00), INTC_VECT(PECI1I, 0xc20), | ||
| 228 | INTC_VECT(PECI2I, 0xc40), | ||
| 229 | INTC_VECT(IRQ15, 0xc60), | ||
| 230 | INTC_VECT(ETHERC, 0xc80), INTC_VECT(ETHERC, 0xca0), | ||
| 231 | INTC_VECT(SPI0, 0xcc0), | ||
| 232 | INTC_VECT(ADC1, 0xce0), | ||
| 233 | INTC_VECT(DMAC1_8, 0xd00), INTC_VECT(DMAC1_8, 0xd20), | ||
| 234 | INTC_VECT(DMAC1_8, 0xd40), INTC_VECT(DMAC1_8, 0xd60), | ||
| 235 | INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0), | ||
| 236 | INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0), | ||
| 237 | INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20), | ||
| 238 | INTC_VECT(TMU5, 0xe40), | ||
| 239 | INTC_VECT(ADC0, 0xe60), | ||
| 240 | INTC_VECT(SCIF4, 0xf00), INTC_VECT(SCIF4, 0xf20), | ||
| 241 | INTC_VECT(SCIF4, 0xf40), INTC_VECT(SCIF4, 0xf60), | ||
| 242 | INTC_VECT(IIC0_0, 0x1400), INTC_VECT(IIC0_1, 0x1420), | ||
| 243 | INTC_VECT(IIC0_2, 0x1440), INTC_VECT(IIC0_3, 0x1460), | ||
| 244 | INTC_VECT(IIC1_0, 0x1480), INTC_VECT(IIC1_1, 0x14e0), | ||
| 245 | INTC_VECT(IIC1_2, 0x1500), INTC_VECT(IIC1_3, 0x1520), | ||
| 246 | INTC_VECT(IIC2_0, 0x1540), INTC_VECT(IIC2_1, 0x1560), | ||
| 247 | INTC_VECT(IIC2_2, 0x1580), INTC_VECT(IIC2_3, 0x1600), | ||
| 248 | INTC_VECT(IIC3_0, 0x1620), INTC_VECT(IIC3_1, 0x1640), | ||
| 249 | INTC_VECT(IIC3_2, 0x16e0), INTC_VECT(IIC3_3, 0x1700), | ||
| 250 | INTC_VECT(IIC4_0, 0x17c0), INTC_VECT(IIC4_1, 0x1800), | ||
| 251 | INTC_VECT(IIC4_2, 0x1820), INTC_VECT(IIC4_3, 0x1840), | ||
| 252 | INTC_VECT(IIC5_0, 0x1860), INTC_VECT(IIC5_1, 0x1880), | ||
| 253 | INTC_VECT(IIC5_2, 0x18a0), INTC_VECT(IIC5_3, 0x18c0), | ||
| 254 | INTC_VECT(IIC6_0, 0x18e0), INTC_VECT(IIC6_1, 0x1900), | ||
| 255 | INTC_VECT(IIC6_2, 0x1920), INTC_VECT(IIC6_3, 0x1980), | ||
| 256 | INTC_VECT(IIC7_0, 0x19a0), INTC_VECT(IIC7_1, 0x1a00), | ||
| 257 | INTC_VECT(IIC7_2, 0x1a20), INTC_VECT(IIC7_3, 0x1a40), | ||
| 258 | INTC_VECT(IIC8_0, 0x1a60), INTC_VECT(IIC8_1, 0x1a80), | ||
| 259 | INTC_VECT(IIC8_2, 0x1aa0), INTC_VECT(IIC8_3, 0x1b40), | ||
| 260 | INTC_VECT(IIC9_0, 0x1b60), INTC_VECT(IIC9_1, 0x1b80), | ||
| 261 | INTC_VECT(IIC9_2, 0x1c00), INTC_VECT(IIC9_3, 0x1c20), | ||
| 262 | INTC_VECT(PCIINTA, 0x1ce0), | ||
| 263 | INTC_VECT(PCIE, 0x1e00), | ||
| 264 | INTC_VECT(SGPIO, 0x1f80), | ||
| 265 | INTC_VECT(SGPIO, 0x1fa0), | ||
| 266 | }; | ||
| 267 | |||
| 268 | static struct intc_group groups[] __initdata = { | ||
| 269 | INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), | ||
| 270 | INTC_GROUP(TMU345, TMU3, TMU4, TMU5), | ||
| 271 | }; | ||
| 272 | |||
| 273 | static struct intc_mask_reg mask_registers[] __initdata = { | ||
| 274 | { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ | ||
| 275 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
| 276 | |||
| 277 | { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */ | ||
| 278 | { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH, | ||
| 279 | IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH, | ||
| 280 | IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH, | ||
| 281 | IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, 0, | ||
| 282 | IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH, | ||
| 283 | IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH, | ||
| 284 | IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH, | ||
| 285 | IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } }, | ||
| 286 | |||
| 287 | { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ | ||
| 288 | { 0, 0, 0, 0, 0, 0, 0, 0, | ||
| 289 | 0, DMAC1_8, 0, PECI0I, LPC, FRT, WDT1, TMR45, | ||
| 290 | TMR23, TMR01, 0, 0, 0, 0, 0, DMAC0, | ||
| 291 | HUDI, 0, WDT0, SCIF3, SCIF2, SDHI, TMU345, TMU012 | ||
| 292 | } }, | ||
| 293 | |||
| 294 | { 0xffd400d0, 0xffd400d4, 32, /* INT2MSKR1 / INT2MSKCR1 */ | ||
| 295 | { IRQ15, IRQ14, IRQ13, IRQ12, IRQ11, IRQ10, SCIF4, ETHERC, | ||
| 296 | IRQ9, IRQ8, SCIF1, SCIF0, USB0, 0, 0, USB1, | ||
| 297 | ADC1, 0, DMAC1_6, ADC0, SPI0, SIM, PECI2I, PECI1I, | ||
| 298 | ARC4, 0, SPI1, JMC, 0, 0, 0, DVC | ||
| 299 | } }, | ||
| 300 | |||
| 301 | { 0xffd10038, 0xffd1003c, 32, /* INT2MSKR2 / INT2MSKCR2 */ | ||
| 302 | { IIC4_1, IIC4_2, IIC5_0, 0, 0, 0, SGPIO, 0, | ||
| 303 | 0, 0, 0, IIC9_2, IIC8_2, IIC8_1, IIC8_0, IIC7_3, | ||
| 304 | IIC7_2, IIC7_1, IIC6_3, IIC0_0, IIC0_1, IIC0_2, IIC0_3, IIC3_1, | ||
| 305 | IIC2_3, 0, IIC2_1, IIC9_1, IIC3_3, IIC1_0, PCIE, IIC2_2 | ||
| 306 | } }, | ||
| 307 | |||
| 308 | { 0xffd100d0, 0xff1400d4, 32, /* INT2MSKR3 / INT2MSKCR4 */ | ||
| 309 | { 0, IIC6_1, IIC6_0, IIC5_1, IIC3_2, IIC2_0, 0, 0, | ||
| 310 | IIC1_3, IIC1_2, IIC9_0, IIC8_3, IIC4_3, IIC7_0, 0, IIC6_2, | ||
| 311 | PCIINTA, 0, IIC4_0, 0, 0, 0, 0, IIC9_3, | ||
| 312 | IIC3_0, 0, IIC5_3, IIC5_2, 0, 0, 0, IIC1_1 | ||
| 313 | } }, | ||
| 314 | }; | ||
| 315 | |||
| 316 | #define INTPRI 0xffd00010 | ||
| 317 | #define INT2PRI0 0xffd40000 | ||
| 318 | #define INT2PRI1 0xffd40004 | ||
| 319 | #define INT2PRI2 0xffd40008 | ||
| 320 | #define INT2PRI3 0xffd4000c | ||
| 321 | #define INT2PRI4 0xffd40010 | ||
| 322 | #define INT2PRI5 0xffd40014 | ||
| 323 | #define INT2PRI6 0xffd40018 | ||
| 324 | #define INT2PRI7 0xffd4001c | ||
| 325 | #define INT2PRI8 0xffd400a0 | ||
| 326 | #define INT2PRI9 0xffd400a4 | ||
| 327 | #define INT2PRI10 0xffd400a8 | ||
| 328 | #define INT2PRI11 0xffd400ac | ||
| 329 | #define INT2PRI12 0xffd400b0 | ||
| 330 | #define INT2PRI13 0xffd400b4 | ||
| 331 | #define INT2PRI14 0xffd400b8 | ||
| 332 | #define INT2PRI15 0xffd400bc | ||
| 333 | #define INT2PRI16 0xffd10000 | ||
| 334 | #define INT2PRI17 0xffd10004 | ||
| 335 | #define INT2PRI18 0xffd10008 | ||
| 336 | #define INT2PRI19 0xffd1000c | ||
| 337 | #define INT2PRI20 0xffd10010 | ||
| 338 | #define INT2PRI21 0xffd10014 | ||
| 339 | #define INT2PRI22 0xffd10018 | ||
| 340 | #define INT2PRI23 0xffd1001c | ||
| 341 | #define INT2PRI24 0xffd100a0 | ||
| 342 | #define INT2PRI25 0xffd100a4 | ||
| 343 | #define INT2PRI26 0xffd100a8 | ||
| 344 | #define INT2PRI27 0xffd100ac | ||
| 345 | #define INT2PRI28 0xffd100b0 | ||
| 346 | #define INT2PRI29 0xffd100b4 | ||
| 347 | #define INT2PRI30 0xffd100b8 | ||
| 348 | #define INT2PRI31 0xffd100bc | ||
| 349 | |||
| 350 | static struct intc_prio_reg prio_registers[] __initdata = { | ||
| 351 | { INTPRI, 0, 32, 4, { IRQ0, IRQ1, IRQ2, IRQ3, | ||
| 352 | IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
| 353 | |||
| 354 | { INT2PRI0, 0, 32, 8, { TMU0, TMU1, TMU2, TMU2_TICPI } }, | ||
| 355 | { INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } }, | ||
| 356 | { INT2PRI2, 0, 32, 8, { SCIF2, SCIF3, WDT0, IRQ8 } }, | ||
| 357 | { INT2PRI3, 0, 32, 8, { HUDI, DMAC0, ADC0, IRQ9 } }, | ||
| 358 | { INT2PRI4, 0, 32, 8, { IRQ10, 0, TMR01, TMR23 } }, | ||
| 359 | { INT2PRI5, 0, 32, 8, { TMR45, WDT1, FRT, LPC } }, | ||
| 360 | { INT2PRI6, 0, 32, 8, { PECI0I, ETHERC, DMAC1_8, 0 } }, | ||
| 361 | { INT2PRI7, 0, 32, 8, { SCIF4, 0, IRQ11, IRQ12 } }, | ||
| 362 | { INT2PRI8, 0, 32, 8, { 0, 0, 0, DVC } }, | ||
| 363 | { INT2PRI9, 0, 32, 8, { ARC4, 0, SPI1, JMC } }, | ||
| 364 | { INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2I, PECI1I } }, | ||
| 365 | { INT2PRI11, 0, 32, 8, { ADC1, IRQ13, DMAC1_6, IRQ14 } }, | ||
| 366 | { INT2PRI12, 0, 32, 8, { USB0, 0, IRQ15, USB1 } }, | ||
| 367 | { INT2PRI13, 0, 32, 8, { 0, 0, SCIF1, SCIF0 } }, | ||
| 368 | |||
| 369 | { INT2PRI16, 0, 32, 8, { IIC2_2, 0, 0, 0 } }, | ||
| 370 | { INT2PRI17, 0, 32, 8, { PCIE, 0, 0, IIC1_0 } }, | ||
| 371 | { INT2PRI18, 0, 32, 8, { IIC3_3, IIC9_1, IIC2_1, IIC1_2 } }, | ||
| 372 | { INT2PRI19, 0, 32, 8, { IIC2_3, IIC3_1, 0, IIC1_3 } }, | ||
| 373 | { INT2PRI20, 0, 32, 8, { IIC2_0, IIC6_3, IIC7_1, IIC7_2 } }, | ||
| 374 | { INT2PRI21, 0, 32, 8, { IIC7_3, IIC8_0, IIC8_1, IIC8_2 } }, | ||
| 375 | { INT2PRI22, 0, 32, 8, { IIC9_2, 0, 0, 0 } }, | ||
| 376 | { INT2PRI23, 0, 32, 8, { 0, SGPIO, IIC3_2, IIC5_1 } }, | ||
| 377 | { INT2PRI24, 0, 32, 8, { 0, 0, 0, IIC1_1 } }, | ||
| 378 | { INT2PRI25, 0, 32, 8, { IIC3_0, 0, IIC5_3, IIC5_2 } }, | ||
| 379 | { INT2PRI26, 0, 32, 8, { 0, 0, 0, IIC9_3 } }, | ||
| 380 | { INT2PRI27, 0, 32, 8, { PCIINTA, IIC6_0, IIC4_0, IIC6_1 } }, | ||
| 381 | { INT2PRI28, 0, 32, 8, { IIC4_3, IIC7_0, 0, IIC6_2 } }, | ||
| 382 | { INT2PRI29, 0, 32, 8, { 0, 0, IIC9_0, IIC8_3 } }, | ||
| 383 | { INT2PRI30, 0, 32, 8, { IIC4_1, IIC4_2, IIC5_0, 0 } }, | ||
| 384 | { INT2PRI31, 0, 32, 8, { IIC0_0, IIC0_1, IIC0_2, IIC0_3 } }, | ||
| 385 | }; | ||
| 386 | |||
| 387 | static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups, | ||
| 388 | mask_registers, prio_registers, NULL); | ||
| 389 | |||
| 390 | /* Support for external interrupt pins in IRQ mode */ | ||
| 391 | static struct intc_vect vectors_irq0123[] __initdata = { | ||
| 392 | INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), | ||
| 393 | INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), | ||
| 394 | }; | ||
| 395 | |||
| 396 | static struct intc_vect vectors_irq4567[] __initdata = { | ||
| 397 | INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), | ||
| 398 | INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), | ||
| 399 | }; | ||
| 400 | |||
| 401 | static struct intc_sense_reg sense_registers[] __initdata = { | ||
| 402 | { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3, | ||
| 403 | IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
| 404 | }; | ||
| 405 | |||
| 406 | static struct intc_mask_reg ack_registers[] __initdata = { | ||
| 407 | { 0xffd00024, 0, 32, /* INTREQ */ | ||
| 408 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
| 409 | }; | ||
| 410 | |||
| 411 | static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7757-irq0123", | ||
| 412 | vectors_irq0123, NULL, mask_registers, | ||
| 413 | prio_registers, sense_registers, ack_registers); | ||
| 414 | |||
| 415 | static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7757-irq4567", | ||
| 416 | vectors_irq4567, NULL, mask_registers, | ||
| 417 | prio_registers, sense_registers, ack_registers); | ||
| 418 | |||
| 419 | /* External interrupt pins in IRL mode */ | ||
| 420 | static struct intc_vect vectors_irl0123[] __initdata = { | ||
| 421 | INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220), | ||
| 422 | INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260), | ||
| 423 | INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0), | ||
| 424 | INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0), | ||
| 425 | INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320), | ||
| 426 | INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360), | ||
| 427 | INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0), | ||
| 428 | INTC_VECT(IRL0_HHHL, 0x3c0), | ||
| 429 | }; | ||
| 430 | |||
| 431 | static struct intc_vect vectors_irl4567[] __initdata = { | ||
| 432 | INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20), | ||
| 433 | INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60), | ||
| 434 | INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0), | ||
| 435 | INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0), | ||
| 436 | INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20), | ||
| 437 | INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60), | ||
| 438 | INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0), | ||
| 439 | INTC_VECT(IRL4_HHHL, 0xcc0), | ||
| 440 | }; | ||
| 441 | |||
| 442 | static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123, | ||
| 443 | NULL, mask_registers, NULL, NULL); | ||
| 444 | |||
| 445 | static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567, | ||
| 446 | NULL, mask_registers, NULL, NULL); | ||
| 447 | |||
| 448 | #define INTC_ICR0 0xffd00000 | ||
| 449 | #define INTC_INTMSK0 0xffd00044 | ||
| 450 | #define INTC_INTMSK1 0xffd00048 | ||
| 451 | #define INTC_INTMSK2 0xffd40080 | ||
| 452 | #define INTC_INTMSKCLR1 0xffd00068 | ||
| 453 | #define INTC_INTMSKCLR2 0xffd40084 | ||
| 454 | |||
| 455 | void __init plat_irq_setup(void) | ||
| 456 | { | ||
| 457 | /* disable IRQ3-0 + IRQ7-4 */ | ||
| 458 | ctrl_outl(0xff000000, INTC_INTMSK0); | ||
| 459 | |||
| 460 | /* disable IRL3-0 + IRL7-4 */ | ||
| 461 | ctrl_outl(0xc0000000, INTC_INTMSK1); | ||
| 462 | ctrl_outl(0xfffefffe, INTC_INTMSK2); | ||
| 463 | |||
| 464 | /* select IRL mode for IRL3-0 + IRL7-4 */ | ||
| 465 | ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); | ||
| 466 | |||
| 467 | /* disable holding function, ie enable "SH-4 Mode" */ | ||
| 468 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); | ||
| 469 | |||
| 470 | register_intc_controller(&intc_desc); | ||
| 471 | } | ||
| 472 | |||
| 473 | void __init plat_irq_setup_pins(int mode) | ||
| 474 | { | ||
| 475 | switch (mode) { | ||
| 476 | case IRQ_MODE_IRQ7654: | ||
| 477 | /* select IRQ mode for IRL7-4 */ | ||
| 478 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); | ||
| 479 | register_intc_controller(&intc_desc_irq4567); | ||
| 480 | break; | ||
| 481 | case IRQ_MODE_IRQ3210: | ||
| 482 | /* select IRQ mode for IRL3-0 */ | ||
| 483 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); | ||
| 484 | register_intc_controller(&intc_desc_irq0123); | ||
| 485 | break; | ||
| 486 | case IRQ_MODE_IRL7654: | ||
| 487 | /* enable IRL7-4 but don't provide any masking */ | ||
| 488 | ctrl_outl(0x40000000, INTC_INTMSKCLR1); | ||
| 489 | ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); | ||
| 490 | break; | ||
| 491 | case IRQ_MODE_IRL3210: | ||
| 492 | /* enable IRL0-3 but don't provide any masking */ | ||
| 493 | ctrl_outl(0x80000000, INTC_INTMSKCLR1); | ||
| 494 | ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); | ||
| 495 | break; | ||
| 496 | case IRQ_MODE_IRL7654_MASK: | ||
| 497 | /* enable IRL7-4 and mask using cpu intc controller */ | ||
| 498 | ctrl_outl(0x40000000, INTC_INTMSKCLR1); | ||
| 499 | register_intc_controller(&intc_desc_irl4567); | ||
| 500 | break; | ||
| 501 | case IRQ_MODE_IRL3210_MASK: | ||
| 502 | /* enable IRL0-3 and mask using cpu intc controller */ | ||
| 503 | ctrl_outl(0x80000000, INTC_INTMSKCLR1); | ||
| 504 | register_intc_controller(&intc_desc_irl0123); | ||
| 505 | break; | ||
| 506 | default: | ||
| 507 | BUG(); | ||
| 508 | } | ||
| 509 | } | ||
| 510 | |||
| 511 | void __init plat_mem_setup(void) | ||
| 512 | { | ||
| 513 | } | ||
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c index 07f078961c71..e848443deeb9 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c | |||
| @@ -268,11 +268,7 @@ enum { | |||
| 268 | UNUSED = 0, | 268 | UNUSED = 0, |
| 269 | 269 | ||
| 270 | /* interrupt sources */ | 270 | /* interrupt sources */ |
| 271 | IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, | 271 | IRL, IRQ0, IRQ1, IRQ2, IRQ3, |
| 272 | IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, | ||
| 273 | IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH, | ||
| 274 | IRL_HHLL, IRL_HHLH, IRL_HHHL, | ||
| 275 | IRQ0, IRQ1, IRQ2, IRQ3, | ||
| 276 | HUDII, | 272 | HUDII, |
| 277 | TMU0, TMU1, TMU2, TMU3, TMU4, TMU5, | 273 | TMU0, TMU1, TMU2, TMU3, TMU4, TMU5, |
| 278 | PCII0, PCII1, PCII2, PCII3, PCII4, | 274 | PCII0, PCII1, PCII2, PCII3, PCII4, |
| @@ -287,10 +283,7 @@ enum { | |||
| 287 | DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, DMAC1_DMINT9, | 283 | DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, DMAC1_DMINT9, |
| 288 | DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE, | 284 | DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE, |
| 289 | IIC, VIN0, VIN1, VCORE0, ATAPI, | 285 | IIC, VIN0, VIN1, VCORE0, ATAPI, |
| 290 | DTU0_TEND, DTU0_AE, DTU0_TMISS, | 286 | DTU0, DTU1, DTU2, DTU3, |
| 291 | DTU1_TEND, DTU1_AE, DTU1_TMISS, | ||
| 292 | DTU2_TEND, DTU2_AE, DTU2_TMISS, | ||
| 293 | DTU3_TEND, DTU3_AE, DTU3_TMISS, | ||
| 294 | FE0, FE1, | 287 | FE0, FE1, |
| 295 | GPIO0, GPIO1, GPIO2, GPIO3, | 288 | GPIO0, GPIO1, GPIO2, GPIO3, |
| 296 | PAM, IRM, | 289 | PAM, IRM, |
| @@ -298,8 +291,8 @@ enum { | |||
| 298 | INTICI4, INTICI5, INTICI6, INTICI7, | 291 | INTICI4, INTICI5, INTICI6, INTICI7, |
| 299 | 292 | ||
| 300 | /* interrupt groups */ | 293 | /* interrupt groups */ |
| 301 | IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3, | 294 | PCII56789, SCIF0, SCIF1, SCIF2, SCIF3, |
| 302 | DMAC0, DMAC1, DTU0, DTU1, DTU2, DTU3, | 295 | DMAC0, DMAC1, |
| 303 | }; | 296 | }; |
| 304 | 297 | ||
| 305 | static struct intc_vect vectors[] __initdata = { | 298 | static struct intc_vect vectors[] __initdata = { |
| @@ -332,14 +325,14 @@ static struct intc_vect vectors[] __initdata = { | |||
| 332 | INTC_VECT(IIC, 0xae0), | 325 | INTC_VECT(IIC, 0xae0), |
| 333 | INTC_VECT(VIN0, 0xb00), INTC_VECT(VIN1, 0xb20), | 326 | INTC_VECT(VIN0, 0xb00), INTC_VECT(VIN1, 0xb20), |
| 334 | INTC_VECT(VCORE0, 0xb00), INTC_VECT(ATAPI, 0xb60), | 327 | INTC_VECT(VCORE0, 0xb00), INTC_VECT(ATAPI, 0xb60), |
| 335 | INTC_VECT(DTU0_TEND, 0xc00), INTC_VECT(DTU0_AE, 0xc20), | 328 | INTC_VECT(DTU0, 0xc00), INTC_VECT(DTU0, 0xc20), |
| 336 | INTC_VECT(DTU0_TMISS, 0xc40), | 329 | INTC_VECT(DTU0, 0xc40), |
| 337 | INTC_VECT(DTU1_TEND, 0xc60), INTC_VECT(DTU1_AE, 0xc80), | 330 | INTC_VECT(DTU1, 0xc60), INTC_VECT(DTU1, 0xc80), |
| 338 | INTC_VECT(DTU1_TMISS, 0xca0), | 331 | INTC_VECT(DTU1, 0xca0), |
| 339 | INTC_VECT(DTU2_TEND, 0xcc0), INTC_VECT(DTU2_AE, 0xce0), | 332 | INTC_VECT(DTU2, 0xcc0), INTC_VECT(DTU2, 0xce0), |
| 340 | INTC_VECT(DTU2_TMISS, 0xd00), | 333 | INTC_VECT(DTU2, 0xd00), |
| 341 | INTC_VECT(DTU3_TEND, 0xd20), INTC_VECT(DTU3_AE, 0xd40), | 334 | INTC_VECT(DTU3, 0xd20), INTC_VECT(DTU3, 0xd40), |
| 342 | INTC_VECT(DTU3_TMISS, 0xd60), | 335 | INTC_VECT(DTU3, 0xd60), |
| 343 | INTC_VECT(FE0, 0xe00), INTC_VECT(FE1, 0xe20), | 336 | INTC_VECT(FE0, 0xe00), INTC_VECT(FE1, 0xe20), |
| 344 | INTC_VECT(GPIO0, 0xe40), INTC_VECT(GPIO1, 0xe60), | 337 | INTC_VECT(GPIO0, 0xe40), INTC_VECT(GPIO1, 0xe60), |
| 345 | INTC_VECT(GPIO2, 0xe80), INTC_VECT(GPIO3, 0xea0), | 338 | INTC_VECT(GPIO2, 0xe80), INTC_VECT(GPIO3, 0xea0), |
| @@ -351,10 +344,6 @@ static struct intc_vect vectors[] __initdata = { | |||
| 351 | }; | 344 | }; |
| 352 | 345 | ||
| 353 | static struct intc_group groups[] __initdata = { | 346 | static struct intc_group groups[] __initdata = { |
| 354 | INTC_GROUP(IRL, IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, | ||
| 355 | IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, | ||
| 356 | IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH, | ||
| 357 | IRL_HHLL, IRL_HHLH, IRL_HHHL), | ||
| 358 | INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9), | 347 | INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9), |
| 359 | INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), | 348 | INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), |
| 360 | INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), | 349 | INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), |
| @@ -364,10 +353,6 @@ static struct intc_group groups[] __initdata = { | |||
| 364 | DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE), | 353 | DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE), |
| 365 | INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, | 354 | INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, |
| 366 | DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11), | 355 | DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11), |
| 367 | INTC_GROUP(DTU0, DTU0_TEND, DTU0_AE, DTU0_TMISS), | ||
| 368 | INTC_GROUP(DTU1, DTU1_TEND, DTU1_AE, DTU1_TMISS), | ||
| 369 | INTC_GROUP(DTU2, DTU2_TEND, DTU2_AE, DTU2_TMISS), | ||
| 370 | INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS), | ||
| 371 | }; | 356 | }; |
| 372 | 357 | ||
| 373 | static struct intc_mask_reg mask_registers[] __initdata = { | 358 | static struct intc_mask_reg mask_registers[] __initdata = { |
| @@ -434,14 +419,14 @@ static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups, | |||
| 434 | 419 | ||
| 435 | /* External interrupt pins in IRL mode */ | 420 | /* External interrupt pins in IRL mode */ |
| 436 | static struct intc_vect vectors_irl[] __initdata = { | 421 | static struct intc_vect vectors_irl[] __initdata = { |
| 437 | INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220), | 422 | INTC_VECT(IRL, 0x200), INTC_VECT(IRL, 0x220), |
| 438 | INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260), | 423 | INTC_VECT(IRL, 0x240), INTC_VECT(IRL, 0x260), |
| 439 | INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0), | 424 | INTC_VECT(IRL, 0x280), INTC_VECT(IRL, 0x2a0), |
| 440 | INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0), | 425 | INTC_VECT(IRL, 0x2c0), INTC_VECT(IRL, 0x2e0), |
| 441 | INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320), | 426 | INTC_VECT(IRL, 0x300), INTC_VECT(IRL, 0x320), |
| 442 | INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360), | 427 | INTC_VECT(IRL, 0x340), INTC_VECT(IRL, 0x360), |
| 443 | INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0), | 428 | INTC_VECT(IRL, 0x380), INTC_VECT(IRL, 0x3a0), |
| 444 | INTC_VECT(IRL_HHHL, 0x3c0), | 429 | INTC_VECT(IRL, 0x3c0), |
| 445 | }; | 430 | }; |
| 446 | 431 | ||
| 447 | static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, | 432 | static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, |
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c index 2b6b0d50c576..185ec3976a25 100644 --- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c | |||
| @@ -57,6 +57,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus) | |||
| 57 | { | 57 | { |
| 58 | int i; | 58 | int i; |
| 59 | 59 | ||
| 60 | local_timer_setup(0); | ||
| 61 | |||
| 60 | BUILD_BUG_ON(SMP_MSG_NR >= 8); | 62 | BUILD_BUG_ON(SMP_MSG_NR >= 8); |
| 61 | 63 | ||
| 62 | for (i = 0; i < SMP_MSG_NR; i++) | 64 | for (i = 0; i < SMP_MSG_NR; i++) |
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c index 92ad844b5c12..521d05b3f7ba 100644 --- a/arch/sh/kernel/cpu/sh5/probe.c +++ b/arch/sh/kernel/cpu/sh5/probe.c | |||
| @@ -34,6 +34,8 @@ int __init detect_cpu_and_cache_system(void) | |||
| 34 | /* CPU.VCR aliased at CIR address on SH5-101 */ | 34 | /* CPU.VCR aliased at CIR address on SH5-101 */ |
| 35 | boot_cpu_data.type = CPU_SH5_101; | 35 | boot_cpu_data.type = CPU_SH5_101; |
| 36 | 36 | ||
| 37 | boot_cpu_data.family = CPU_FAMILY_SH5; | ||
| 38 | |||
| 37 | /* | 39 | /* |
| 38 | * First, setup some sane values for the I-cache. | 40 | * First, setup some sane values for the I-cache. |
| 39 | */ | 41 | */ |
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile index 08bfa7c7db29..a39f88ea1a85 100644 --- a/arch/sh/kernel/cpu/shmobile/Makefile +++ b/arch/sh/kernel/cpu/shmobile/Makefile | |||
| @@ -4,3 +4,5 @@ | |||
| 4 | 4 | ||
| 5 | # Power Management & Sleep mode | 5 | # Power Management & Sleep mode |
| 6 | obj-$(CONFIG_PM) += pm.o sleep.o | 6 | obj-$(CONFIG_PM) += pm.o sleep.o |
| 7 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | ||
| 8 | obj-$(CONFIG_PM_RUNTIME) += pm_runtime.o | ||
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c new file mode 100644 index 000000000000..1c504bd972c3 --- /dev/null +++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c | |||
| @@ -0,0 +1,113 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/kernel/cpu/shmobile/cpuidle.c | ||
| 3 | * | ||
| 4 | * Cpuidle support code for SuperH Mobile | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Magnus Damm | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/io.h> | ||
| 15 | #include <linux/suspend.h> | ||
| 16 | #include <linux/cpuidle.h> | ||
| 17 | #include <asm/suspend.h> | ||
| 18 | #include <asm/uaccess.h> | ||
| 19 | #include <asm/hwblk.h> | ||
| 20 | |||
| 21 | static unsigned long cpuidle_mode[] = { | ||
| 22 | SUSP_SH_SLEEP, /* regular sleep mode */ | ||
| 23 | SUSP_SH_SLEEP | SUSP_SH_SF, /* sleep mode + self refresh */ | ||
| 24 | SUSP_SH_STANDBY | SUSP_SH_SF, /* software standby mode + self refresh */ | ||
| 25 | }; | ||
| 26 | |||
| 27 | static int cpuidle_sleep_enter(struct cpuidle_device *dev, | ||
| 28 | struct cpuidle_state *state) | ||
| 29 | { | ||
| 30 | unsigned long allowed_mode = arch_hwblk_sleep_mode(); | ||
| 31 | ktime_t before, after; | ||
| 32 | int requested_state = state - &dev->states[0]; | ||
| 33 | int allowed_state; | ||
| 34 | int k; | ||
| 35 | |||
| 36 | /* convert allowed mode to allowed state */ | ||
| 37 | for (k = ARRAY_SIZE(cpuidle_mode) - 1; k > 0; k--) | ||
| 38 | if (cpuidle_mode[k] == allowed_mode) | ||
| 39 | break; | ||
| 40 | |||
| 41 | allowed_state = k; | ||
| 42 | |||
| 43 | /* take the following into account for sleep mode selection: | ||
| 44 | * - allowed_state: best mode allowed by hardware (clock deps) | ||
| 45 | * - requested_state: best mode allowed by software (latencies) | ||
| 46 | */ | ||
| 47 | k = min_t(int, allowed_state, requested_state); | ||
| 48 | |||
| 49 | dev->last_state = &dev->states[k]; | ||
| 50 | before = ktime_get(); | ||
| 51 | sh_mobile_call_standby(cpuidle_mode[k]); | ||
| 52 | after = ktime_get(); | ||
| 53 | return ktime_to_ns(ktime_sub(after, before)) >> 10; | ||
| 54 | } | ||
| 55 | |||
| 56 | static struct cpuidle_device cpuidle_dev; | ||
| 57 | static struct cpuidle_driver cpuidle_driver = { | ||
| 58 | .name = "sh_idle", | ||
| 59 | .owner = THIS_MODULE, | ||
| 60 | }; | ||
| 61 | |||
| 62 | void sh_mobile_setup_cpuidle(void) | ||
| 63 | { | ||
| 64 | struct cpuidle_device *dev = &cpuidle_dev; | ||
| 65 | struct cpuidle_state *state; | ||
| 66 | int i; | ||
| 67 | |||
| 68 | cpuidle_register_driver(&cpuidle_driver); | ||
| 69 | |||
| 70 | for (i = 0; i < CPUIDLE_STATE_MAX; i++) { | ||
| 71 | dev->states[i].name[0] = '\0'; | ||
| 72 | dev->states[i].desc[0] = '\0'; | ||
| 73 | } | ||
| 74 | |||
| 75 | i = CPUIDLE_DRIVER_STATE_START; | ||
| 76 | |||
| 77 | state = &dev->states[i++]; | ||
| 78 | snprintf(state->name, CPUIDLE_NAME_LEN, "C0"); | ||
| 79 | strncpy(state->desc, "SuperH Sleep Mode", CPUIDLE_DESC_LEN); | ||
| 80 | state->exit_latency = 1; | ||
| 81 | state->target_residency = 1 * 2; | ||
| 82 | state->power_usage = 3; | ||
| 83 | state->flags = 0; | ||
| 84 | state->flags |= CPUIDLE_FLAG_SHALLOW; | ||
| 85 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | ||
| 86 | state->enter = cpuidle_sleep_enter; | ||
| 87 | |||
| 88 | dev->safe_state = state; | ||
| 89 | |||
| 90 | state = &dev->states[i++]; | ||
| 91 | snprintf(state->name, CPUIDLE_NAME_LEN, "C1"); | ||
| 92 | strncpy(state->desc, "SuperH Sleep Mode [SF]", CPUIDLE_DESC_LEN); | ||
| 93 | state->exit_latency = 100; | ||
| 94 | state->target_residency = 1 * 2; | ||
| 95 | state->power_usage = 1; | ||
| 96 | state->flags = 0; | ||
| 97 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | ||
| 98 | state->enter = cpuidle_sleep_enter; | ||
| 99 | |||
| 100 | state = &dev->states[i++]; | ||
| 101 | snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); | ||
| 102 | strncpy(state->desc, "SuperH Mobile Standby Mode [SF]", CPUIDLE_DESC_LEN); | ||
| 103 | state->exit_latency = 2300; | ||
| 104 | state->target_residency = 1 * 2; | ||
| 105 | state->power_usage = 1; | ||
| 106 | state->flags = 0; | ||
| 107 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | ||
| 108 | state->enter = cpuidle_sleep_enter; | ||
| 109 | |||
| 110 | dev->state_count = i; | ||
| 111 | |||
| 112 | cpuidle_register_device(dev); | ||
| 113 | } | ||
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c index 8c067adf6830..ee3c2aaf66fb 100644 --- a/arch/sh/kernel/cpu/shmobile/pm.c +++ b/arch/sh/kernel/cpu/shmobile/pm.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c | 2 | * arch/sh/kernel/cpu/shmobile/pm.c |
| 3 | * | 3 | * |
| 4 | * Power management support code for SuperH Mobile | 4 | * Power management support code for SuperH Mobile |
| 5 | * | 5 | * |
| @@ -32,40 +32,20 @@ | |||
| 32 | * | 32 | * |
| 33 | * R-standby mode is unsupported, but will be added in the future | 33 | * R-standby mode is unsupported, but will be added in the future |
| 34 | * U-standby mode is low priority since it needs bootloader hacks | 34 | * U-standby mode is low priority since it needs bootloader hacks |
| 35 | * | ||
| 36 | * All modes should be tied in with cpuidle. But before that can | ||
| 37 | * happen we need to keep track of enabled hardware blocks so we | ||
| 38 | * can avoid entering sleep modes that stop clocks to hardware | ||
| 39 | * blocks that are in use even though the cpu core is idle. | ||
| 40 | */ | 35 | */ |
| 41 | 36 | ||
| 37 | #define ILRAM_BASE 0xe5200000 | ||
| 38 | |||
| 42 | extern const unsigned char sh_mobile_standby[]; | 39 | extern const unsigned char sh_mobile_standby[]; |
| 43 | extern const unsigned int sh_mobile_standby_size; | 40 | extern const unsigned int sh_mobile_standby_size; |
| 44 | 41 | ||
| 45 | static void sh_mobile_call_standby(unsigned long mode) | 42 | void sh_mobile_call_standby(unsigned long mode) |
| 46 | { | 43 | { |
| 47 | extern void *vbr_base; | 44 | void *onchip_mem = (void *)ILRAM_BASE; |
| 48 | void *onchip_mem = (void *)0xe5200000; /* ILRAM */ | 45 | void (*standby_onchip_mem)(unsigned long, unsigned long) = onchip_mem; |
| 49 | void (*standby_onchip_mem)(unsigned long) = onchip_mem; | ||
| 50 | |||
| 51 | /* Note: Wake up from sleep may generate exceptions! | ||
| 52 | * Setup VBR to point to on-chip ram if self-refresh is | ||
| 53 | * going to be used. | ||
| 54 | */ | ||
| 55 | if (mode & SUSP_SH_SF) | ||
| 56 | asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory"); | ||
| 57 | |||
| 58 | /* Copy the assembly snippet to the otherwise ununsed ILRAM */ | ||
| 59 | memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size); | ||
| 60 | wmb(); | ||
| 61 | ctrl_barrier(); | ||
| 62 | 46 | ||
| 63 | /* Let assembly snippet in on-chip memory handle the rest */ | 47 | /* Let assembly snippet in on-chip memory handle the rest */ |
| 64 | standby_onchip_mem(mode); | 48 | standby_onchip_mem(mode, ILRAM_BASE); |
| 65 | |||
| 66 | /* Put VBR back in System RAM again */ | ||
| 67 | if (mode & SUSP_SH_SF) | ||
| 68 | asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory"); | ||
| 69 | } | 49 | } |
| 70 | 50 | ||
| 71 | static int sh_pm_enter(suspend_state_t state) | 51 | static int sh_pm_enter(suspend_state_t state) |
| @@ -85,7 +65,15 @@ static struct platform_suspend_ops sh_pm_ops = { | |||
| 85 | 65 | ||
| 86 | static int __init sh_pm_init(void) | 66 | static int __init sh_pm_init(void) |
| 87 | { | 67 | { |
| 68 | void *onchip_mem = (void *)ILRAM_BASE; | ||
| 69 | |||
| 70 | /* Copy the assembly snippet to the otherwise ununsed ILRAM */ | ||
| 71 | memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size); | ||
| 72 | wmb(); | ||
| 73 | ctrl_barrier(); | ||
| 74 | |||
| 88 | suspend_set_ops(&sh_pm_ops); | 75 | suspend_set_ops(&sh_pm_ops); |
| 76 | sh_mobile_setup_cpuidle(); | ||
| 89 | return 0; | 77 | return 0; |
| 90 | } | 78 | } |
| 91 | 79 | ||
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c new file mode 100644 index 000000000000..7c615b17e209 --- /dev/null +++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c | |||
| @@ -0,0 +1,303 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/kernel/cpu/shmobile/pm_runtime.c | ||
| 3 | * | ||
| 4 | * Runtime PM support code for SuperH Mobile | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009 Magnus Damm | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/io.h> | ||
| 15 | #include <linux/pm_runtime.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/mutex.h> | ||
| 18 | #include <asm/hwblk.h> | ||
| 19 | |||
| 20 | static DEFINE_SPINLOCK(hwblk_lock); | ||
| 21 | static LIST_HEAD(hwblk_idle_list); | ||
| 22 | static struct work_struct hwblk_work; | ||
| 23 | |||
| 24 | extern struct hwblk_info *hwblk_info; | ||
| 25 | |||
| 26 | static void platform_pm_runtime_not_idle(struct platform_device *pdev) | ||
| 27 | { | ||
| 28 | unsigned long flags; | ||
| 29 | |||
| 30 | /* remove device from idle list */ | ||
| 31 | spin_lock_irqsave(&hwblk_lock, flags); | ||
| 32 | if (test_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags)) { | ||
| 33 | list_del(&pdev->archdata.entry); | ||
| 34 | __clear_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags); | ||
| 35 | } | ||
| 36 | spin_unlock_irqrestore(&hwblk_lock, flags); | ||
| 37 | } | ||
| 38 | |||
| 39 | static int __platform_pm_runtime_resume(struct platform_device *pdev) | ||
| 40 | { | ||
| 41 | struct device *d = &pdev->dev; | ||
| 42 | struct pdev_archdata *ad = &pdev->archdata; | ||
| 43 | int hwblk = ad->hwblk_id; | ||
| 44 | int ret = -ENOSYS; | ||
| 45 | |||
| 46 | dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk); | ||
| 47 | |||
| 48 | if (d->driver && d->driver->pm && d->driver->pm->runtime_resume) { | ||
| 49 | hwblk_enable(hwblk_info, hwblk); | ||
| 50 | ret = 0; | ||
| 51 | |||
| 52 | if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) { | ||
| 53 | ret = d->driver->pm->runtime_resume(d); | ||
| 54 | if (!ret) | ||
| 55 | clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags); | ||
| 56 | else | ||
| 57 | hwblk_disable(hwblk_info, hwblk); | ||
| 58 | } | ||
| 59 | } | ||
| 60 | |||
| 61 | dev_dbg(d, "__platform_pm_runtime_resume() [%d] - returns %d\n", | ||
| 62 | hwblk, ret); | ||
| 63 | |||
| 64 | return ret; | ||
| 65 | } | ||
| 66 | |||
| 67 | static int __platform_pm_runtime_suspend(struct platform_device *pdev) | ||
| 68 | { | ||
| 69 | struct device *d = &pdev->dev; | ||
| 70 | struct pdev_archdata *ad = &pdev->archdata; | ||
| 71 | int hwblk = ad->hwblk_id; | ||
| 72 | int ret = -ENOSYS; | ||
| 73 | |||
| 74 | dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk); | ||
| 75 | |||
| 76 | if (d->driver && d->driver->pm && d->driver->pm->runtime_suspend) { | ||
| 77 | BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags)); | ||
| 78 | |||
| 79 | hwblk_enable(hwblk_info, hwblk); | ||
| 80 | ret = d->driver->pm->runtime_suspend(d); | ||
| 81 | hwblk_disable(hwblk_info, hwblk); | ||
| 82 | |||
| 83 | if (!ret) { | ||
| 84 | set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags); | ||
| 85 | platform_pm_runtime_not_idle(pdev); | ||
| 86 | hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE); | ||
| 87 | } | ||
| 88 | } | ||
| 89 | |||
| 90 | dev_dbg(d, "__platform_pm_runtime_suspend() [%d] - returns %d\n", | ||
| 91 | hwblk, ret); | ||
| 92 | |||
| 93 | return ret; | ||
| 94 | } | ||
| 95 | |||
| 96 | static void platform_pm_runtime_work(struct work_struct *work) | ||
| 97 | { | ||
| 98 | struct platform_device *pdev; | ||
| 99 | unsigned long flags; | ||
| 100 | int ret; | ||
| 101 | |||
| 102 | /* go through the idle list and suspend one device at a time */ | ||
| 103 | do { | ||
| 104 | spin_lock_irqsave(&hwblk_lock, flags); | ||
| 105 | if (list_empty(&hwblk_idle_list)) | ||
| 106 | pdev = NULL; | ||
| 107 | else | ||
| 108 | pdev = list_first_entry(&hwblk_idle_list, | ||
| 109 | struct platform_device, | ||
| 110 | archdata.entry); | ||
| 111 | spin_unlock_irqrestore(&hwblk_lock, flags); | ||
| 112 | |||
| 113 | if (pdev) { | ||
| 114 | mutex_lock(&pdev->archdata.mutex); | ||
| 115 | ret = __platform_pm_runtime_suspend(pdev); | ||
| 116 | |||
| 117 | /* at this point the platform device may be: | ||
| 118 | * suspended: ret = 0, FLAG_SUSP set, clock stopped | ||
| 119 | * failed: ret < 0, FLAG_IDLE set, clock stopped | ||
| 120 | */ | ||
| 121 | mutex_unlock(&pdev->archdata.mutex); | ||
| 122 | } else { | ||
| 123 | ret = -ENODEV; | ||
| 124 | } | ||
| 125 | } while (!ret); | ||
| 126 | } | ||
| 127 | |||
| 128 | /* this function gets called from cpuidle context when all devices in the | ||
| 129 | * main power domain are unused but some are counted as idle, ie the hwblk | ||
| 130 | * counter values are (HWBLK_CNT_USAGE == 0) && (HWBLK_CNT_IDLE != 0) | ||
| 131 | */ | ||
| 132 | void platform_pm_runtime_suspend_idle(void) | ||
| 133 | { | ||
| 134 | queue_work(pm_wq, &hwblk_work); | ||
| 135 | } | ||
| 136 | |||
| 137 | int platform_pm_runtime_suspend(struct device *dev) | ||
| 138 | { | ||
| 139 | struct platform_device *pdev = to_platform_device(dev); | ||
| 140 | struct pdev_archdata *ad = &pdev->archdata; | ||
| 141 | unsigned long flags; | ||
| 142 | int hwblk = ad->hwblk_id; | ||
| 143 | int ret = 0; | ||
| 144 | |||
| 145 | dev_dbg(dev, "platform_pm_runtime_suspend() [%d]\n", hwblk); | ||
| 146 | |||
| 147 | /* ignore off-chip platform devices */ | ||
| 148 | if (!hwblk) | ||
| 149 | goto out; | ||
| 150 | |||
| 151 | /* interrupt context not allowed */ | ||
| 152 | might_sleep(); | ||
| 153 | |||
| 154 | /* catch misconfigured drivers not starting with resume */ | ||
| 155 | if (test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags)) { | ||
| 156 | ret = -EINVAL; | ||
| 157 | goto out; | ||
| 158 | } | ||
| 159 | |||
| 160 | /* serialize */ | ||
| 161 | mutex_lock(&ad->mutex); | ||
| 162 | |||
| 163 | /* disable clock */ | ||
| 164 | hwblk_disable(hwblk_info, hwblk); | ||
| 165 | |||
| 166 | /* put device on idle list */ | ||
| 167 | spin_lock_irqsave(&hwblk_lock, flags); | ||
| 168 | list_add_tail(&pdev->archdata.entry, &hwblk_idle_list); | ||
| 169 | __set_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags); | ||
| 170 | spin_unlock_irqrestore(&hwblk_lock, flags); | ||
| 171 | |||
| 172 | /* increase idle count */ | ||
| 173 | hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_IDLE); | ||
| 174 | |||
| 175 | /* at this point the platform device is: | ||
| 176 | * idle: ret = 0, FLAG_IDLE set, clock stopped | ||
| 177 | */ | ||
| 178 | mutex_unlock(&ad->mutex); | ||
| 179 | |||
| 180 | out: | ||
| 181 | dev_dbg(dev, "platform_pm_runtime_suspend() [%d] returns %d\n", | ||
| 182 | hwblk, ret); | ||
| 183 | |||
| 184 | return ret; | ||
| 185 | } | ||
| 186 | |||
| 187 | int platform_pm_runtime_resume(struct device *dev) | ||
| 188 | { | ||
| 189 | struct platform_device *pdev = to_platform_device(dev); | ||
| 190 | struct pdev_archdata *ad = &pdev->archdata; | ||
| 191 | int hwblk = ad->hwblk_id; | ||
| 192 | int ret = 0; | ||
| 193 | |||
| 194 | dev_dbg(dev, "platform_pm_runtime_resume() [%d]\n", hwblk); | ||
| 195 | |||
| 196 | /* ignore off-chip platform devices */ | ||
| 197 | if (!hwblk) | ||
| 198 | goto out; | ||
| 199 | |||
| 200 | /* interrupt context not allowed */ | ||
| 201 | might_sleep(); | ||
| 202 | |||
| 203 | /* serialize */ | ||
| 204 | mutex_lock(&ad->mutex); | ||
| 205 | |||
| 206 | /* make sure device is removed from idle list */ | ||
| 207 | platform_pm_runtime_not_idle(pdev); | ||
| 208 | |||
| 209 | /* decrease idle count */ | ||
| 210 | if (!test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags) && | ||
| 211 | !test_bit(PDEV_ARCHDATA_FLAG_SUSP, &pdev->archdata.flags)) | ||
| 212 | hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE); | ||
| 213 | |||
| 214 | /* resume the device if needed */ | ||
| 215 | ret = __platform_pm_runtime_resume(pdev); | ||
| 216 | |||
| 217 | /* the driver has been initialized now, so clear the init flag */ | ||
| 218 | clear_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags); | ||
| 219 | |||
| 220 | /* at this point the platform device may be: | ||
| 221 | * resumed: ret = 0, flags = 0, clock started | ||
| 222 | * failed: ret < 0, FLAG_SUSP set, clock stopped | ||
| 223 | */ | ||
| 224 | mutex_unlock(&ad->mutex); | ||
| 225 | out: | ||
| 226 | dev_dbg(dev, "platform_pm_runtime_resume() [%d] returns %d\n", | ||
| 227 | hwblk, ret); | ||
| 228 | |||
| 229 | return ret; | ||
| 230 | } | ||
| 231 | |||
| 232 | int platform_pm_runtime_idle(struct device *dev) | ||
| 233 | { | ||
| 234 | struct platform_device *pdev = to_platform_device(dev); | ||
| 235 | int hwblk = pdev->archdata.hwblk_id; | ||
| 236 | int ret = 0; | ||
| 237 | |||
| 238 | dev_dbg(dev, "platform_pm_runtime_idle() [%d]\n", hwblk); | ||
| 239 | |||
| 240 | /* ignore off-chip platform devices */ | ||
| 241 | if (!hwblk) | ||
| 242 | goto out; | ||
| 243 | |||
| 244 | /* interrupt context not allowed, use pm_runtime_put()! */ | ||
| 245 | might_sleep(); | ||
| 246 | |||
| 247 | /* suspend synchronously to disable clocks immediately */ | ||
| 248 | ret = pm_runtime_suspend(dev); | ||
| 249 | out: | ||
| 250 | dev_dbg(dev, "platform_pm_runtime_idle() [%d] done!\n", hwblk); | ||
| 251 | return ret; | ||
| 252 | } | ||
| 253 | |||
| 254 | static int platform_bus_notify(struct notifier_block *nb, | ||
| 255 | unsigned long action, void *data) | ||
| 256 | { | ||
| 257 | struct device *dev = data; | ||
| 258 | struct platform_device *pdev = to_platform_device(dev); | ||
| 259 | int hwblk = pdev->archdata.hwblk_id; | ||
| 260 | |||
| 261 | /* ignore off-chip platform devices */ | ||
| 262 | if (!hwblk) | ||
| 263 | return 0; | ||
| 264 | |||
| 265 | switch (action) { | ||
| 266 | case BUS_NOTIFY_ADD_DEVICE: | ||
| 267 | INIT_LIST_HEAD(&pdev->archdata.entry); | ||
| 268 | mutex_init(&pdev->archdata.mutex); | ||
| 269 | /* platform devices without drivers should be disabled */ | ||
| 270 | hwblk_enable(hwblk_info, hwblk); | ||
| 271 | hwblk_disable(hwblk_info, hwblk); | ||
| 272 | /* make sure driver re-inits itself once */ | ||
| 273 | __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags); | ||
| 274 | break; | ||
| 275 | /* TODO: add BUS_NOTIFY_BIND_DRIVER and increase idle count */ | ||
| 276 | case BUS_NOTIFY_BOUND_DRIVER: | ||
| 277 | /* keep track of number of devices in use per hwblk */ | ||
| 278 | hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_DEVICES); | ||
| 279 | break; | ||
| 280 | case BUS_NOTIFY_UNBOUND_DRIVER: | ||
| 281 | /* keep track of number of devices in use per hwblk */ | ||
| 282 | hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_DEVICES); | ||
| 283 | /* make sure driver re-inits itself once */ | ||
| 284 | __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags); | ||
| 285 | break; | ||
| 286 | case BUS_NOTIFY_DEL_DEVICE: | ||
| 287 | break; | ||
| 288 | } | ||
| 289 | return 0; | ||
| 290 | } | ||
| 291 | |||
| 292 | static struct notifier_block platform_bus_notifier = { | ||
| 293 | .notifier_call = platform_bus_notify | ||
| 294 | }; | ||
| 295 | |||
| 296 | static int __init sh_pm_runtime_init(void) | ||
| 297 | { | ||
| 298 | INIT_WORK(&hwblk_work, platform_pm_runtime_work); | ||
| 299 | |||
| 300 | bus_register_notifier(&platform_bus_type, &platform_bus_notifier); | ||
| 301 | return 0; | ||
| 302 | } | ||
| 303 | core_initcall(sh_pm_runtime_init); | ||
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S index baf2d7d46b05..a439e6c7824f 100644 --- a/arch/sh/kernel/cpu/shmobile/sleep.S +++ b/arch/sh/kernel/cpu/shmobile/sleep.S | |||
| @@ -16,19 +16,52 @@ | |||
| 16 | #include <asm/asm-offsets.h> | 16 | #include <asm/asm-offsets.h> |
| 17 | #include <asm/suspend.h> | 17 | #include <asm/suspend.h> |
| 18 | 18 | ||
| 19 | /* | ||
| 20 | * Kernel mode register usage, see entry.S: | ||
| 21 | * k0 scratch | ||
| 22 | * k1 scratch | ||
| 23 | * k4 scratch | ||
| 24 | */ | ||
| 25 | #define k0 r0 | ||
| 26 | #define k1 r1 | ||
| 27 | #define k4 r4 | ||
| 28 | |||
| 19 | /* manage self-refresh and enter standby mode. | 29 | /* manage self-refresh and enter standby mode. |
| 20 | * this code will be copied to on-chip memory and executed from there. | 30 | * this code will be copied to on-chip memory and executed from there. |
| 21 | */ | 31 | */ |
| 22 | 32 | ||
| 23 | .balign 4096,0,4096 | 33 | .balign 4096,0,4096 |
| 24 | ENTRY(sh_mobile_standby) | 34 | ENTRY(sh_mobile_standby) |
| 35 | |||
| 36 | /* save original vbr */ | ||
| 37 | stc vbr, r1 | ||
| 38 | mova saved_vbr, r0 | ||
| 39 | mov.l r1, @r0 | ||
| 40 | |||
| 41 | /* point vbr to our on-chip memory page */ | ||
| 42 | ldc r5, vbr | ||
| 43 | |||
| 44 | /* save return address */ | ||
| 45 | mova saved_spc, r0 | ||
| 46 | sts pr, r5 | ||
| 47 | mov.l r5, @r0 | ||
| 48 | |||
| 49 | /* save sr */ | ||
| 50 | mova saved_sr, r0 | ||
| 51 | stc sr, r5 | ||
| 52 | mov.l r5, @r0 | ||
| 53 | |||
| 54 | /* save mode flags */ | ||
| 55 | mova saved_mode, r0 | ||
| 56 | mov.l r4, @r0 | ||
| 57 | |||
| 58 | /* put mode flags in r0 */ | ||
| 25 | mov r4, r0 | 59 | mov r4, r0 |
| 26 | 60 | ||
| 27 | tst #SUSP_SH_SF, r0 | 61 | tst #SUSP_SH_SF, r0 |
| 28 | bt skip_set_sf | 62 | bt skip_set_sf |
| 29 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 | 63 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 |
| 30 | /* DBSC: put memory in self-refresh mode */ | 64 | /* DBSC: put memory in self-refresh mode */ |
| 31 | |||
| 32 | mov.l dben_reg, r4 | 65 | mov.l dben_reg, r4 |
| 33 | mov.l dben_data0, r1 | 66 | mov.l dben_data0, r1 |
| 34 | mov.l r1, @r4 | 67 | mov.l r1, @r4 |
| @@ -60,14 +93,6 @@ ENTRY(sh_mobile_standby) | |||
| 60 | #endif | 93 | #endif |
| 61 | 94 | ||
| 62 | skip_set_sf: | 95 | skip_set_sf: |
| 63 | tst #SUSP_SH_SLEEP, r0 | ||
| 64 | bt test_standby | ||
| 65 | |||
| 66 | /* set mode to "sleep mode" */ | ||
| 67 | bra do_sleep | ||
| 68 | mov #0x00, r1 | ||
| 69 | |||
| 70 | test_standby: | ||
| 71 | tst #SUSP_SH_STANDBY, r0 | 96 | tst #SUSP_SH_STANDBY, r0 |
| 72 | bt test_rstandby | 97 | bt test_rstandby |
| 73 | 98 | ||
| @@ -85,77 +110,107 @@ test_rstandby: | |||
| 85 | 110 | ||
| 86 | test_ustandby: | 111 | test_ustandby: |
| 87 | tst #SUSP_SH_USTANDBY, r0 | 112 | tst #SUSP_SH_USTANDBY, r0 |
| 88 | bt done_sleep | 113 | bt force_sleep |
| 89 | 114 | ||
| 90 | /* set mode to "u-standby mode" */ | 115 | /* set mode to "u-standby mode" */ |
| 91 | mov #0x10, r1 | 116 | bra do_sleep |
| 117 | mov #0x10, r1 | ||
| 92 | 118 | ||
| 93 | /* fall-through */ | 119 | force_sleep: |
| 120 | |||
| 121 | /* set mode to "sleep mode" */ | ||
| 122 | mov #0x00, r1 | ||
| 94 | 123 | ||
| 95 | do_sleep: | 124 | do_sleep: |
| 96 | /* setup and enter selected standby mode */ | 125 | /* setup and enter selected standby mode */ |
| 97 | mov.l 5f, r4 | 126 | mov.l 5f, r4 |
| 98 | mov.l r1, @r4 | 127 | mov.l r1, @r4 |
| 128 | again: | ||
| 99 | sleep | 129 | sleep |
| 130 | bra again | ||
| 131 | nop | ||
| 132 | |||
| 133 | restore_jump_vbr: | ||
| 134 | /* setup spc with return address to c code */ | ||
| 135 | mov.l saved_spc, k0 | ||
| 136 | ldc k0, spc | ||
| 137 | |||
| 138 | /* restore vbr */ | ||
| 139 | mov.l saved_vbr, k0 | ||
| 140 | ldc k0, vbr | ||
| 141 | |||
| 142 | /* setup ssr with saved sr */ | ||
| 143 | mov.l saved_sr, k0 | ||
| 144 | ldc k0, ssr | ||
| 145 | |||
| 146 | /* get mode flags */ | ||
| 147 | mov.l saved_mode, k0 | ||
| 100 | 148 | ||
| 101 | done_sleep: | 149 | done_sleep: |
| 102 | /* reset standby mode to sleep mode */ | 150 | /* reset standby mode to sleep mode */ |
| 103 | mov.l 5f, r4 | 151 | mov.l 5f, k4 |
| 104 | mov #0x00, r1 | 152 | mov #0x00, k1 |
| 105 | mov.l r1, @r4 | 153 | mov.l k1, @k4 |
| 106 | 154 | ||
| 107 | tst #SUSP_SH_SF, r0 | 155 | tst #SUSP_SH_SF, k0 |
| 108 | bt skip_restore_sf | 156 | bt skip_restore_sf |
| 109 | 157 | ||
| 110 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 | 158 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 |
| 111 | /* DBSC: put memory in auto-refresh mode */ | 159 | /* DBSC: put memory in auto-refresh mode */ |
| 160 | mov.l dbrfpdn0_reg, k4 | ||
| 161 | mov.l dbrfpdn0_data0, k1 | ||
| 162 | mov.l k1, @k4 | ||
| 112 | 163 | ||
| 113 | mov.l dbrfpdn0_reg, r4 | 164 | nop /* sleep 140 ns */ |
| 114 | mov.l dbrfpdn0_data0, r1 | ||
| 115 | mov.l r1, @r4 | ||
| 116 | |||
| 117 | /* sleep 140 ns */ | ||
| 118 | nop | ||
| 119 | nop | 165 | nop |
| 120 | nop | 166 | nop |
| 121 | nop | 167 | nop |
| 122 | 168 | ||
| 123 | mov.l dbcmdcnt_reg, r4 | 169 | mov.l dbcmdcnt_reg, k4 |
| 124 | mov.l dbcmdcnt_data0, r1 | 170 | mov.l dbcmdcnt_data0, k1 |
| 125 | mov.l r1, @r4 | 171 | mov.l k1, @k4 |
| 126 | 172 | ||
| 127 | mov.l dbcmdcnt_reg, r4 | 173 | mov.l dbcmdcnt_reg, k4 |
| 128 | mov.l dbcmdcnt_data1, r1 | 174 | mov.l dbcmdcnt_data1, k1 |
| 129 | mov.l r1, @r4 | 175 | mov.l k1, @k4 |
| 130 | 176 | ||
| 131 | mov.l dben_reg, r4 | 177 | mov.l dben_reg, k4 |
| 132 | mov.l dben_data1, r1 | 178 | mov.l dben_data1, k1 |
| 133 | mov.l r1, @r4 | 179 | mov.l k1, @k4 |
| 134 | 180 | ||
| 135 | mov.l dbrfpdn0_reg, r4 | 181 | mov.l dbrfpdn0_reg, k4 |
| 136 | mov.l dbrfpdn0_data2, r1 | 182 | mov.l dbrfpdn0_data2, k1 |
| 137 | mov.l r1, @r4 | 183 | mov.l k1, @k4 |
| 138 | #else | 184 | #else |
| 139 | /* SBSC: set auto-refresh mode */ | 185 | /* SBSC: set auto-refresh mode */ |
| 140 | mov.l 1f, r4 | 186 | mov.l 1f, k4 |
| 141 | mov.l @r4, r2 | 187 | mov.l @k4, k0 |
| 142 | mov.l 4f, r3 | 188 | mov.l 4f, k1 |
| 143 | and r3, r2 | 189 | and k1, k0 |
| 144 | mov.l r2, @r4 | 190 | mov.l k0, @k4 |
| 145 | mov.l 6f, r4 | 191 | mov.l 6f, k4 |
| 146 | mov.l 7f, r1 | 192 | mov.l 8f, k0 |
| 147 | mov.l 8f, r2 | 193 | mov.l @k4, k1 |
| 148 | mov.l @r4, r3 | 194 | mov #-1, k4 |
| 149 | mov #-1, r4 | 195 | add k4, k1 |
| 150 | add r4, r3 | 196 | or k1, k0 |
| 151 | or r2, r3 | 197 | mov.l 7f, k1 |
| 152 | mov.l r3, @r1 | 198 | mov.l k0, @k1 |
| 153 | #endif | 199 | #endif |
| 154 | skip_restore_sf: | 200 | skip_restore_sf: |
| 155 | rts | 201 | /* jump to vbr vector */ |
| 202 | mov.l saved_vbr, k0 | ||
| 203 | mov.l offset_vbr, k4 | ||
| 204 | add k4, k0 | ||
| 205 | jmp @k0 | ||
| 156 | nop | 206 | nop |
| 157 | 207 | ||
| 158 | .balign 4 | 208 | .balign 4 |
| 209 | saved_mode: .long 0 | ||
| 210 | saved_spc: .long 0 | ||
| 211 | saved_sr: .long 0 | ||
| 212 | saved_vbr: .long 0 | ||
| 213 | offset_vbr: .long 0x600 | ||
| 159 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 | 214 | #ifdef CONFIG_CPU_SUBTYPE_SH7724 |
| 160 | dben_reg: .long 0xfd000010 /* DBEN */ | 215 | dben_reg: .long 0xfd000010 /* DBEN */ |
| 161 | dben_data0: .long 0 | 216 | dben_data0: .long 0 |
| @@ -178,12 +233,12 @@ dbcmdcnt_data1: .long 4 | |||
| 178 | 7: .long 0xfe400018 /* RTCNT */ | 233 | 7: .long 0xfe400018 /* RTCNT */ |
| 179 | 8: .long 0xa55a0000 | 234 | 8: .long 0xa55a0000 |
| 180 | 235 | ||
| 236 | |||
| 181 | /* interrupt vector @ 0x600 */ | 237 | /* interrupt vector @ 0x600 */ |
| 182 | .balign 0x400,0,0x400 | 238 | .balign 0x400,0,0x400 |
| 183 | .long 0xdeadbeef | 239 | .long 0xdeadbeef |
| 184 | .balign 0x200,0,0x200 | 240 | .balign 0x200,0,0x200 |
| 185 | /* sh7722 will end up here in sleep mode */ | 241 | bra restore_jump_vbr |
| 186 | rte | ||
| 187 | nop | 242 | nop |
| 188 | sh_mobile_standby_end: | 243 | sh_mobile_standby_end: |
| 189 | 244 | ||
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c index e0590ffebd73..dce4f3ff0932 100644 --- a/arch/sh/kernel/cpufreq.c +++ b/arch/sh/kernel/cpufreq.c | |||
| @@ -82,7 +82,8 @@ static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy) | |||
| 82 | 82 | ||
| 83 | cpuclk = clk_get(NULL, "cpu_clk"); | 83 | cpuclk = clk_get(NULL, "cpu_clk"); |
| 84 | if (IS_ERR(cpuclk)) { | 84 | if (IS_ERR(cpuclk)) { |
| 85 | printk(KERN_ERR "cpufreq: couldn't get CPU clk\n"); | 85 | printk(KERN_ERR "cpufreq: couldn't get CPU#%d clk\n", |
| 86 | policy->cpu); | ||
| 86 | return PTR_ERR(cpuclk); | 87 | return PTR_ERR(cpuclk); |
| 87 | } | 88 | } |
| 88 | 89 | ||
| @@ -95,22 +96,21 @@ static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy) | |||
| 95 | policy->min = policy->cpuinfo.min_freq; | 96 | policy->min = policy->cpuinfo.min_freq; |
| 96 | policy->max = policy->cpuinfo.max_freq; | 97 | policy->max = policy->cpuinfo.max_freq; |
| 97 | 98 | ||
| 98 | |||
| 99 | /* | 99 | /* |
| 100 | * Catch the cases where the clock framework hasn't been wired up | 100 | * Catch the cases where the clock framework hasn't been wired up |
| 101 | * properly to support scaling. | 101 | * properly to support scaling. |
| 102 | */ | 102 | */ |
| 103 | if (unlikely(policy->min == policy->max)) { | 103 | if (unlikely(policy->min == policy->max)) { |
| 104 | printk(KERN_ERR "cpufreq: clock framework rate rounding " | 104 | printk(KERN_ERR "cpufreq: clock framework rate rounding " |
| 105 | "not supported on this CPU.\n"); | 105 | "not supported on CPU#%d.\n", policy->cpu); |
| 106 | 106 | ||
| 107 | clk_put(cpuclk); | 107 | clk_put(cpuclk); |
| 108 | return -EINVAL; | 108 | return -EINVAL; |
| 109 | } | 109 | } |
| 110 | 110 | ||
| 111 | printk(KERN_INFO "cpufreq: Frequencies - Minimum %u.%03u MHz, " | 111 | printk(KERN_INFO "cpufreq: CPU#%d Frequencies - Minimum %u.%03u MHz, " |
| 112 | "Maximum %u.%03u MHz.\n", | 112 | "Maximum %u.%03u MHz.\n", |
| 113 | policy->min / 1000, policy->min % 1000, | 113 | policy->cpu, policy->min / 1000, policy->min % 1000, |
| 114 | policy->max / 1000, policy->max % 1000); | 114 | policy->max / 1000, policy->max % 1000); |
| 115 | 115 | ||
| 116 | return 0; | 116 | return 0; |
diff --git a/arch/sh/kernel/dumpstack.c b/arch/sh/kernel/dumpstack.c new file mode 100644 index 000000000000..6f5ad1513409 --- /dev/null +++ b/arch/sh/kernel/dumpstack.c | |||
| @@ -0,0 +1,123 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 1991, 1992 Linus Torvalds | ||
| 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs | ||
| 4 | * Copyright (C) 2009 Matt Fleming | ||
| 5 | */ | ||
| 6 | #include <linux/kallsyms.h> | ||
| 7 | #include <linux/ftrace.h> | ||
| 8 | #include <linux/debug_locks.h> | ||
| 9 | #include <asm/unwinder.h> | ||
| 10 | #include <asm/stacktrace.h> | ||
| 11 | |||
| 12 | void printk_address(unsigned long address, int reliable) | ||
| 13 | { | ||
| 14 | printk(" [<%p>] %s%pS\n", (void *) address, | ||
| 15 | reliable ? "" : "? ", (void *) address); | ||
| 16 | } | ||
| 17 | |||
| 18 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
| 19 | static void | ||
| 20 | print_ftrace_graph_addr(unsigned long addr, void *data, | ||
| 21 | const struct stacktrace_ops *ops, | ||
| 22 | struct thread_info *tinfo, int *graph) | ||
| 23 | { | ||
| 24 | struct task_struct *task = tinfo->task; | ||
| 25 | unsigned long ret_addr; | ||
| 26 | int index = task->curr_ret_stack; | ||
| 27 | |||
| 28 | if (addr != (unsigned long)return_to_handler) | ||
| 29 | return; | ||
| 30 | |||
| 31 | if (!task->ret_stack || index < *graph) | ||
| 32 | return; | ||
| 33 | |||
| 34 | index -= *graph; | ||
| 35 | ret_addr = task->ret_stack[index].ret; | ||
| 36 | |||
| 37 | ops->address(data, ret_addr, 1); | ||
| 38 | |||
| 39 | (*graph)++; | ||
| 40 | } | ||
| 41 | #else | ||
| 42 | static inline void | ||
| 43 | print_ftrace_graph_addr(unsigned long addr, void *data, | ||
| 44 | const struct stacktrace_ops *ops, | ||
| 45 | struct thread_info *tinfo, int *graph) | ||
| 46 | { } | ||
| 47 | #endif | ||
| 48 | |||
| 49 | void | ||
| 50 | stack_reader_dump(struct task_struct *task, struct pt_regs *regs, | ||
| 51 | unsigned long *sp, const struct stacktrace_ops *ops, | ||
| 52 | void *data) | ||
| 53 | { | ||
| 54 | struct thread_info *context; | ||
| 55 | int graph = 0; | ||
| 56 | |||
| 57 | context = (struct thread_info *) | ||
| 58 | ((unsigned long)sp & (~(THREAD_SIZE - 1))); | ||
| 59 | |||
| 60 | while (!kstack_end(sp)) { | ||
| 61 | unsigned long addr = *sp++; | ||
| 62 | |||
| 63 | if (__kernel_text_address(addr)) { | ||
| 64 | ops->address(data, addr, 1); | ||
| 65 | |||
| 66 | print_ftrace_graph_addr(addr, data, ops, | ||
| 67 | context, &graph); | ||
| 68 | } | ||
| 69 | } | ||
| 70 | } | ||
| 71 | |||
| 72 | static void | ||
| 73 | print_trace_warning_symbol(void *data, char *msg, unsigned long symbol) | ||
| 74 | { | ||
| 75 | printk(data); | ||
| 76 | print_symbol(msg, symbol); | ||
| 77 | printk("\n"); | ||
| 78 | } | ||
| 79 | |||
| 80 | static void print_trace_warning(void *data, char *msg) | ||
| 81 | { | ||
| 82 | printk("%s%s\n", (char *)data, msg); | ||
| 83 | } | ||
| 84 | |||
| 85 | static int print_trace_stack(void *data, char *name) | ||
| 86 | { | ||
| 87 | printk("%s <%s> ", (char *)data, name); | ||
| 88 | return 0; | ||
| 89 | } | ||
| 90 | |||
| 91 | /* | ||
| 92 | * Print one address/symbol entries per line. | ||
| 93 | */ | ||
| 94 | static void print_trace_address(void *data, unsigned long addr, int reliable) | ||
| 95 | { | ||
| 96 | printk(data); | ||
| 97 | printk_address(addr, reliable); | ||
| 98 | } | ||
| 99 | |||
| 100 | static const struct stacktrace_ops print_trace_ops = { | ||
| 101 | .warning = print_trace_warning, | ||
| 102 | .warning_symbol = print_trace_warning_symbol, | ||
| 103 | .stack = print_trace_stack, | ||
| 104 | .address = print_trace_address, | ||
| 105 | }; | ||
| 106 | |||
| 107 | void show_trace(struct task_struct *tsk, unsigned long *sp, | ||
| 108 | struct pt_regs *regs) | ||
| 109 | { | ||
| 110 | if (regs && user_mode(regs)) | ||
| 111 | return; | ||
| 112 | |||
| 113 | printk("\nCall trace:\n"); | ||
| 114 | |||
| 115 | unwind_stack(tsk, regs, sp, &print_trace_ops, ""); | ||
| 116 | |||
| 117 | printk("\n"); | ||
| 118 | |||
| 119 | if (!tsk) | ||
| 120 | tsk = current; | ||
| 121 | |||
| 122 | debug_show_held_locks(tsk); | ||
| 123 | } | ||
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c new file mode 100644 index 000000000000..bc4d8d75332b --- /dev/null +++ b/arch/sh/kernel/dwarf.c | |||
| @@ -0,0 +1,972 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Matt Fleming <matt@console-pimps.org> | ||
| 3 | * | ||
| 4 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 5 | * License. See the file "COPYING" in the main directory of this archive | ||
| 6 | * for more details. | ||
| 7 | * | ||
| 8 | * This is an implementation of a DWARF unwinder. Its main purpose is | ||
| 9 | * for generating stacktrace information. Based on the DWARF 3 | ||
| 10 | * specification from http://www.dwarfstd.org. | ||
| 11 | * | ||
| 12 | * TODO: | ||
| 13 | * - DWARF64 doesn't work. | ||
| 14 | * - Registers with DWARF_VAL_OFFSET rules aren't handled properly. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* #define DEBUG */ | ||
| 18 | #include <linux/kernel.h> | ||
| 19 | #include <linux/io.h> | ||
| 20 | #include <linux/list.h> | ||
| 21 | #include <linux/mempool.h> | ||
| 22 | #include <linux/mm.h> | ||
| 23 | #include <asm/dwarf.h> | ||
| 24 | #include <asm/unwinder.h> | ||
| 25 | #include <asm/sections.h> | ||
| 26 | #include <asm/unaligned.h> | ||
| 27 | #include <asm/dwarf.h> | ||
| 28 | #include <asm/stacktrace.h> | ||
| 29 | |||
| 30 | /* Reserve enough memory for two stack frames */ | ||
| 31 | #define DWARF_FRAME_MIN_REQ 2 | ||
| 32 | /* ... with 4 registers per frame. */ | ||
| 33 | #define DWARF_REG_MIN_REQ (DWARF_FRAME_MIN_REQ * 4) | ||
| 34 | |||
| 35 | static struct kmem_cache *dwarf_frame_cachep; | ||
| 36 | static mempool_t *dwarf_frame_pool; | ||
| 37 | |||
| 38 | static struct kmem_cache *dwarf_reg_cachep; | ||
| 39 | static mempool_t *dwarf_reg_pool; | ||
| 40 | |||
| 41 | static LIST_HEAD(dwarf_cie_list); | ||
| 42 | static DEFINE_SPINLOCK(dwarf_cie_lock); | ||
| 43 | |||
| 44 | static LIST_HEAD(dwarf_fde_list); | ||
| 45 | static DEFINE_SPINLOCK(dwarf_fde_lock); | ||
| 46 | |||
| 47 | static struct dwarf_cie *cached_cie; | ||
| 48 | |||
| 49 | /** | ||
| 50 | * dwarf_frame_alloc_reg - allocate memory for a DWARF register | ||
| 51 | * @frame: the DWARF frame whose list of registers we insert on | ||
| 52 | * @reg_num: the register number | ||
| 53 | * | ||
| 54 | * Allocate space for, and initialise, a dwarf reg from | ||
| 55 | * dwarf_reg_pool and insert it onto the (unsorted) linked-list of | ||
| 56 | * dwarf registers for @frame. | ||
| 57 | * | ||
| 58 | * Return the initialised DWARF reg. | ||
| 59 | */ | ||
| 60 | static struct dwarf_reg *dwarf_frame_alloc_reg(struct dwarf_frame *frame, | ||
| 61 | unsigned int reg_num) | ||
| 62 | { | ||
| 63 | struct dwarf_reg *reg; | ||
| 64 | |||
| 65 | reg = mempool_alloc(dwarf_reg_pool, GFP_ATOMIC); | ||
| 66 | if (!reg) { | ||
| 67 | printk(KERN_WARNING "Unable to allocate a DWARF register\n"); | ||
| 68 | /* | ||
| 69 | * Let's just bomb hard here, we have no way to | ||
| 70 | * gracefully recover. | ||
| 71 | */ | ||
| 72 | UNWINDER_BUG(); | ||
| 73 | } | ||
| 74 | |||
| 75 | reg->number = reg_num; | ||
| 76 | reg->addr = 0; | ||
| 77 | reg->flags = 0; | ||
| 78 | |||
| 79 | list_add(®->link, &frame->reg_list); | ||
| 80 | |||
| 81 | return reg; | ||
| 82 | } | ||
| 83 | |||
| 84 | static void dwarf_frame_free_regs(struct dwarf_frame *frame) | ||
| 85 | { | ||
| 86 | struct dwarf_reg *reg, *n; | ||
| 87 | |||
| 88 | list_for_each_entry_safe(reg, n, &frame->reg_list, link) { | ||
| 89 | list_del(®->link); | ||
| 90 | mempool_free(reg, dwarf_reg_pool); | ||
| 91 | } | ||
| 92 | } | ||
| 93 | |||
| 94 | /** | ||
| 95 | * dwarf_frame_reg - return a DWARF register | ||
| 96 | * @frame: the DWARF frame to search in for @reg_num | ||
| 97 | * @reg_num: the register number to search for | ||
| 98 | * | ||
| 99 | * Lookup and return the dwarf reg @reg_num for this frame. Return | ||
| 100 | * NULL if @reg_num is an register invalid number. | ||
| 101 | */ | ||
| 102 | static struct dwarf_reg *dwarf_frame_reg(struct dwarf_frame *frame, | ||
| 103 | unsigned int reg_num) | ||
| 104 | { | ||
| 105 | struct dwarf_reg *reg; | ||
| 106 | |||
| 107 | list_for_each_entry(reg, &frame->reg_list, link) { | ||
| 108 | if (reg->number == reg_num) | ||
| 109 | return reg; | ||
| 110 | } | ||
| 111 | |||
| 112 | return NULL; | ||
| 113 | } | ||
| 114 | |||
| 115 | /** | ||
| 116 | * dwarf_read_addr - read dwarf data | ||
| 117 | * @src: source address of data | ||
| 118 | * @dst: destination address to store the data to | ||
| 119 | * | ||
| 120 | * Read 'n' bytes from @src, where 'n' is the size of an address on | ||
| 121 | * the native machine. We return the number of bytes read, which | ||
| 122 | * should always be 'n'. We also have to be careful when reading | ||
| 123 | * from @src and writing to @dst, because they can be arbitrarily | ||
| 124 | * aligned. Return 'n' - the number of bytes read. | ||
| 125 | */ | ||
| 126 | static inline int dwarf_read_addr(unsigned long *src, unsigned long *dst) | ||
| 127 | { | ||
| 128 | u32 val = get_unaligned(src); | ||
| 129 | put_unaligned(val, dst); | ||
| 130 | return sizeof(unsigned long *); | ||
| 131 | } | ||
| 132 | |||
| 133 | /** | ||
| 134 | * dwarf_read_uleb128 - read unsigned LEB128 data | ||
| 135 | * @addr: the address where the ULEB128 data is stored | ||
| 136 | * @ret: address to store the result | ||
| 137 | * | ||
| 138 | * Decode an unsigned LEB128 encoded datum. The algorithm is taken | ||
| 139 | * from Appendix C of the DWARF 3 spec. For information on the | ||
| 140 | * encodings refer to section "7.6 - Variable Length Data". Return | ||
| 141 | * the number of bytes read. | ||
| 142 | */ | ||
| 143 | static inline unsigned long dwarf_read_uleb128(char *addr, unsigned int *ret) | ||
| 144 | { | ||
| 145 | unsigned int result; | ||
| 146 | unsigned char byte; | ||
| 147 | int shift, count; | ||
| 148 | |||
| 149 | result = 0; | ||
| 150 | shift = 0; | ||
| 151 | count = 0; | ||
| 152 | |||
| 153 | while (1) { | ||
| 154 | byte = __raw_readb(addr); | ||
| 155 | addr++; | ||
| 156 | count++; | ||
| 157 | |||
| 158 | result |= (byte & 0x7f) << shift; | ||
| 159 | shift += 7; | ||
| 160 | |||
| 161 | if (!(byte & 0x80)) | ||
| 162 | break; | ||
| 163 | } | ||
| 164 | |||
| 165 | *ret = result; | ||
| 166 | |||
| 167 | return count; | ||
| 168 | } | ||
| 169 | |||
| 170 | /** | ||
| 171 | * dwarf_read_leb128 - read signed LEB128 data | ||
| 172 | * @addr: the address of the LEB128 encoded data | ||
| 173 | * @ret: address to store the result | ||
| 174 | * | ||
| 175 | * Decode signed LEB128 data. The algorithm is taken from Appendix | ||
| 176 | * C of the DWARF 3 spec. Return the number of bytes read. | ||
| 177 | */ | ||
| 178 | static inline unsigned long dwarf_read_leb128(char *addr, int *ret) | ||
| 179 | { | ||
| 180 | unsigned char byte; | ||
| 181 | int result, shift; | ||
| 182 | int num_bits; | ||
| 183 | int count; | ||
| 184 | |||
| 185 | result = 0; | ||
| 186 | shift = 0; | ||
| 187 | count = 0; | ||
| 188 | |||
| 189 | while (1) { | ||
| 190 | byte = __raw_readb(addr); | ||
| 191 | addr++; | ||
| 192 | result |= (byte & 0x7f) << shift; | ||
| 193 | shift += 7; | ||
| 194 | count++; | ||
| 195 | |||
| 196 | if (!(byte & 0x80)) | ||
| 197 | break; | ||
| 198 | } | ||
| 199 | |||
| 200 | /* The number of bits in a signed integer. */ | ||
| 201 | num_bits = 8 * sizeof(result); | ||
| 202 | |||
| 203 | if ((shift < num_bits) && (byte & 0x40)) | ||
| 204 | result |= (-1 << shift); | ||
| 205 | |||
| 206 | *ret = result; | ||
| 207 | |||
| 208 | return count; | ||
| 209 | } | ||
| 210 | |||
| 211 | /** | ||
| 212 | * dwarf_read_encoded_value - return the decoded value at @addr | ||
| 213 | * @addr: the address of the encoded value | ||
| 214 | * @val: where to write the decoded value | ||
| 215 | * @encoding: the encoding with which we can decode @addr | ||
| 216 | * | ||
| 217 | * GCC emits encoded address in the .eh_frame FDE entries. Decode | ||
| 218 | * the value at @addr using @encoding. The decoded value is written | ||
| 219 | * to @val and the number of bytes read is returned. | ||
| 220 | */ | ||
| 221 | static int dwarf_read_encoded_value(char *addr, unsigned long *val, | ||
| 222 | char encoding) | ||
| 223 | { | ||
| 224 | unsigned long decoded_addr = 0; | ||
| 225 | int count = 0; | ||
| 226 | |||
| 227 | switch (encoding & 0x70) { | ||
| 228 | case DW_EH_PE_absptr: | ||
| 229 | break; | ||
| 230 | case DW_EH_PE_pcrel: | ||
| 231 | decoded_addr = (unsigned long)addr; | ||
| 232 | break; | ||
| 233 | default: | ||
| 234 | pr_debug("encoding=0x%x\n", (encoding & 0x70)); | ||
| 235 | UNWINDER_BUG(); | ||
| 236 | } | ||
| 237 | |||
| 238 | if ((encoding & 0x07) == 0x00) | ||
| 239 | encoding |= DW_EH_PE_udata4; | ||
| 240 | |||
| 241 | switch (encoding & 0x0f) { | ||
| 242 | case DW_EH_PE_sdata4: | ||
| 243 | case DW_EH_PE_udata4: | ||
| 244 | count += 4; | ||
| 245 | decoded_addr += get_unaligned((u32 *)addr); | ||
| 246 | __raw_writel(decoded_addr, val); | ||
| 247 | break; | ||
| 248 | default: | ||
| 249 | pr_debug("encoding=0x%x\n", encoding); | ||
| 250 | UNWINDER_BUG(); | ||
| 251 | } | ||
| 252 | |||
| 253 | return count; | ||
| 254 | } | ||
| 255 | |||
| 256 | /** | ||
| 257 | * dwarf_entry_len - return the length of an FDE or CIE | ||
| 258 | * @addr: the address of the entry | ||
| 259 | * @len: the length of the entry | ||
| 260 | * | ||
| 261 | * Read the initial_length field of the entry and store the size of | ||
| 262 | * the entry in @len. We return the number of bytes read. Return a | ||
| 263 | * count of 0 on error. | ||
| 264 | */ | ||
| 265 | static inline int dwarf_entry_len(char *addr, unsigned long *len) | ||
| 266 | { | ||
| 267 | u32 initial_len; | ||
| 268 | int count; | ||
| 269 | |||
| 270 | initial_len = get_unaligned((u32 *)addr); | ||
| 271 | count = 4; | ||
| 272 | |||
| 273 | /* | ||
| 274 | * An initial length field value in the range DW_LEN_EXT_LO - | ||
| 275 | * DW_LEN_EXT_HI indicates an extension, and should not be | ||
| 276 | * interpreted as a length. The only extension that we currently | ||
| 277 | * understand is the use of DWARF64 addresses. | ||
| 278 | */ | ||
| 279 | if (initial_len >= DW_EXT_LO && initial_len <= DW_EXT_HI) { | ||
| 280 | /* | ||
| 281 | * The 64-bit length field immediately follows the | ||
| 282 | * compulsory 32-bit length field. | ||
| 283 | */ | ||
| 284 | if (initial_len == DW_EXT_DWARF64) { | ||
| 285 | *len = get_unaligned((u64 *)addr + 4); | ||
| 286 | count = 12; | ||
| 287 | } else { | ||
| 288 | printk(KERN_WARNING "Unknown DWARF extension\n"); | ||
| 289 | count = 0; | ||
| 290 | } | ||
| 291 | } else | ||
| 292 | *len = initial_len; | ||
| 293 | |||
| 294 | return count; | ||
| 295 | } | ||
| 296 | |||
| 297 | /** | ||
| 298 | * dwarf_lookup_cie - locate the cie | ||
| 299 | * @cie_ptr: pointer to help with lookup | ||
| 300 | */ | ||
| 301 | static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr) | ||
| 302 | { | ||
| 303 | struct dwarf_cie *cie; | ||
| 304 | unsigned long flags; | ||
| 305 | |||
| 306 | spin_lock_irqsave(&dwarf_cie_lock, flags); | ||
| 307 | |||
| 308 | /* | ||
| 309 | * We've cached the last CIE we looked up because chances are | ||
| 310 | * that the FDE wants this CIE. | ||
| 311 | */ | ||
| 312 | if (cached_cie && cached_cie->cie_pointer == cie_ptr) { | ||
| 313 | cie = cached_cie; | ||
| 314 | goto out; | ||
| 315 | } | ||
| 316 | |||
| 317 | list_for_each_entry(cie, &dwarf_cie_list, link) { | ||
| 318 | if (cie->cie_pointer == cie_ptr) { | ||
| 319 | cached_cie = cie; | ||
| 320 | break; | ||
| 321 | } | ||
| 322 | } | ||
| 323 | |||
| 324 | /* Couldn't find the entry in the list. */ | ||
| 325 | if (&cie->link == &dwarf_cie_list) | ||
| 326 | cie = NULL; | ||
| 327 | out: | ||
| 328 | spin_unlock_irqrestore(&dwarf_cie_lock, flags); | ||
| 329 | return cie; | ||
| 330 | } | ||
| 331 | |||
| 332 | /** | ||
| 333 | * dwarf_lookup_fde - locate the FDE that covers pc | ||
| 334 | * @pc: the program counter | ||
| 335 | */ | ||
| 336 | struct dwarf_fde *dwarf_lookup_fde(unsigned long pc) | ||
| 337 | { | ||
| 338 | struct dwarf_fde *fde; | ||
| 339 | unsigned long flags; | ||
| 340 | |||
| 341 | spin_lock_irqsave(&dwarf_fde_lock, flags); | ||
| 342 | |||
| 343 | list_for_each_entry(fde, &dwarf_fde_list, link) { | ||
| 344 | unsigned long start, end; | ||
| 345 | |||
| 346 | start = fde->initial_location; | ||
| 347 | end = fde->initial_location + fde->address_range; | ||
| 348 | |||
| 349 | if (pc >= start && pc < end) | ||
| 350 | break; | ||
| 351 | } | ||
| 352 | |||
| 353 | /* Couldn't find the entry in the list. */ | ||
| 354 | if (&fde->link == &dwarf_fde_list) | ||
| 355 | fde = NULL; | ||
| 356 | |||
| 357 | spin_unlock_irqrestore(&dwarf_fde_lock, flags); | ||
| 358 | |||
| 359 | return fde; | ||
| 360 | } | ||
| 361 | |||
| 362 | /** | ||
| 363 | * dwarf_cfa_execute_insns - execute instructions to calculate a CFA | ||
| 364 | * @insn_start: address of the first instruction | ||
| 365 | * @insn_end: address of the last instruction | ||
| 366 | * @cie: the CIE for this function | ||
| 367 | * @fde: the FDE for this function | ||
| 368 | * @frame: the instructions calculate the CFA for this frame | ||
| 369 | * @pc: the program counter of the address we're interested in | ||
| 370 | * | ||
| 371 | * Execute the Call Frame instruction sequence starting at | ||
| 372 | * @insn_start and ending at @insn_end. The instructions describe | ||
| 373 | * how to calculate the Canonical Frame Address of a stackframe. | ||
| 374 | * Store the results in @frame. | ||
| 375 | */ | ||
| 376 | static int dwarf_cfa_execute_insns(unsigned char *insn_start, | ||
| 377 | unsigned char *insn_end, | ||
| 378 | struct dwarf_cie *cie, | ||
| 379 | struct dwarf_fde *fde, | ||
| 380 | struct dwarf_frame *frame, | ||
| 381 | unsigned long pc) | ||
| 382 | { | ||
| 383 | unsigned char insn; | ||
| 384 | unsigned char *current_insn; | ||
| 385 | unsigned int count, delta, reg, expr_len, offset; | ||
| 386 | struct dwarf_reg *regp; | ||
| 387 | |||
| 388 | current_insn = insn_start; | ||
| 389 | |||
| 390 | while (current_insn < insn_end && frame->pc <= pc) { | ||
| 391 | insn = __raw_readb(current_insn++); | ||
| 392 | |||
| 393 | /* | ||
| 394 | * Firstly, handle the opcodes that embed their operands | ||
| 395 | * in the instructions. | ||
| 396 | */ | ||
| 397 | switch (DW_CFA_opcode(insn)) { | ||
| 398 | case DW_CFA_advance_loc: | ||
| 399 | delta = DW_CFA_operand(insn); | ||
| 400 | delta *= cie->code_alignment_factor; | ||
| 401 | frame->pc += delta; | ||
| 402 | continue; | ||
| 403 | /* NOTREACHED */ | ||
| 404 | case DW_CFA_offset: | ||
| 405 | reg = DW_CFA_operand(insn); | ||
| 406 | count = dwarf_read_uleb128(current_insn, &offset); | ||
| 407 | current_insn += count; | ||
| 408 | offset *= cie->data_alignment_factor; | ||
| 409 | regp = dwarf_frame_alloc_reg(frame, reg); | ||
| 410 | regp->addr = offset; | ||
| 411 | regp->flags |= DWARF_REG_OFFSET; | ||
| 412 | continue; | ||
| 413 | /* NOTREACHED */ | ||
| 414 | case DW_CFA_restore: | ||
| 415 | reg = DW_CFA_operand(insn); | ||
| 416 | continue; | ||
| 417 | /* NOTREACHED */ | ||
| 418 | } | ||
| 419 | |||
| 420 | /* | ||
| 421 | * Secondly, handle the opcodes that don't embed their | ||
| 422 | * operands in the instruction. | ||
| 423 | */ | ||
| 424 | switch (insn) { | ||
| 425 | case DW_CFA_nop: | ||
| 426 | continue; | ||
| 427 | case DW_CFA_advance_loc1: | ||
| 428 | delta = *current_insn++; | ||
| 429 | frame->pc += delta * cie->code_alignment_factor; | ||
| 430 | break; | ||
| 431 | case DW_CFA_advance_loc2: | ||
| 432 | delta = get_unaligned((u16 *)current_insn); | ||
| 433 | current_insn += 2; | ||
| 434 | frame->pc += delta * cie->code_alignment_factor; | ||
| 435 | break; | ||
| 436 | case DW_CFA_advance_loc4: | ||
| 437 | delta = get_unaligned((u32 *)current_insn); | ||
| 438 | current_insn += 4; | ||
| 439 | frame->pc += delta * cie->code_alignment_factor; | ||
| 440 | break; | ||
| 441 | case DW_CFA_offset_extended: | ||
| 442 | count = dwarf_read_uleb128(current_insn, ®); | ||
| 443 | current_insn += count; | ||
| 444 | count = dwarf_read_uleb128(current_insn, &offset); | ||
| 445 | current_insn += count; | ||
| 446 | offset *= cie->data_alignment_factor; | ||
| 447 | break; | ||
| 448 | case DW_CFA_restore_extended: | ||
| 449 | count = dwarf_read_uleb128(current_insn, ®); | ||
| 450 | current_insn += count; | ||
| 451 | break; | ||
| 452 | case DW_CFA_undefined: | ||
| 453 | count = dwarf_read_uleb128(current_insn, ®); | ||
| 454 | current_insn += count; | ||
| 455 | regp = dwarf_frame_alloc_reg(frame, reg); | ||
| 456 | regp->flags |= DWARF_UNDEFINED; | ||
| 457 | break; | ||
| 458 | case DW_CFA_def_cfa: | ||
| 459 | count = dwarf_read_uleb128(current_insn, | ||
| 460 | &frame->cfa_register); | ||
| 461 | current_insn += count; | ||
| 462 | count = dwarf_read_uleb128(current_insn, | ||
| 463 | &frame->cfa_offset); | ||
| 464 | current_insn += count; | ||
| 465 | |||
| 466 | frame->flags |= DWARF_FRAME_CFA_REG_OFFSET; | ||
| 467 | break; | ||
| 468 | case DW_CFA_def_cfa_register: | ||
| 469 | count = dwarf_read_uleb128(current_insn, | ||
| 470 | &frame->cfa_register); | ||
| 471 | current_insn += count; | ||
| 472 | frame->flags |= DWARF_FRAME_CFA_REG_OFFSET; | ||
| 473 | break; | ||
| 474 | case DW_CFA_def_cfa_offset: | ||
| 475 | count = dwarf_read_uleb128(current_insn, &offset); | ||
| 476 | current_insn += count; | ||
| 477 | frame->cfa_offset = offset; | ||
| 478 | break; | ||
| 479 | case DW_CFA_def_cfa_expression: | ||
| 480 | count = dwarf_read_uleb128(current_insn, &expr_len); | ||
| 481 | current_insn += count; | ||
| 482 | |||
| 483 | frame->cfa_expr = current_insn; | ||
| 484 | frame->cfa_expr_len = expr_len; | ||
| 485 | current_insn += expr_len; | ||
| 486 | |||
| 487 | frame->flags |= DWARF_FRAME_CFA_REG_EXP; | ||
| 488 | break; | ||
| 489 | case DW_CFA_offset_extended_sf: | ||
| 490 | count = dwarf_read_uleb128(current_insn, ®); | ||
| 491 | current_insn += count; | ||
| 492 | count = dwarf_read_leb128(current_insn, &offset); | ||
| 493 | current_insn += count; | ||
| 494 | offset *= cie->data_alignment_factor; | ||
| 495 | regp = dwarf_frame_alloc_reg(frame, reg); | ||
| 496 | regp->flags |= DWARF_REG_OFFSET; | ||
| 497 | regp->addr = offset; | ||
| 498 | break; | ||
| 499 | case DW_CFA_val_offset: | ||
| 500 | count = dwarf_read_uleb128(current_insn, ®); | ||
| 501 | current_insn += count; | ||
| 502 | count = dwarf_read_leb128(current_insn, &offset); | ||
| 503 | offset *= cie->data_alignment_factor; | ||
| 504 | regp = dwarf_frame_alloc_reg(frame, reg); | ||
| 505 | regp->flags |= DWARF_VAL_OFFSET; | ||
| 506 | regp->addr = offset; | ||
| 507 | break; | ||
| 508 | case DW_CFA_GNU_args_size: | ||
| 509 | count = dwarf_read_uleb128(current_insn, &offset); | ||
| 510 | current_insn += count; | ||
| 511 | break; | ||
| 512 | case DW_CFA_GNU_negative_offset_extended: | ||
| 513 | count = dwarf_read_uleb128(current_insn, ®); | ||
| 514 | current_insn += count; | ||
| 515 | count = dwarf_read_uleb128(current_insn, &offset); | ||
| 516 | offset *= cie->data_alignment_factor; | ||
| 517 | |||
| 518 | regp = dwarf_frame_alloc_reg(frame, reg); | ||
| 519 | regp->flags |= DWARF_REG_OFFSET; | ||
| 520 | regp->addr = -offset; | ||
| 521 | break; | ||
| 522 | default: | ||
| 523 | pr_debug("unhandled DWARF instruction 0x%x\n", insn); | ||
| 524 | UNWINDER_BUG(); | ||
| 525 | break; | ||
| 526 | } | ||
| 527 | } | ||
| 528 | |||
| 529 | return 0; | ||
| 530 | } | ||
| 531 | |||
| 532 | /** | ||
| 533 | * dwarf_unwind_stack - recursively unwind the stack | ||
| 534 | * @pc: address of the function to unwind | ||
| 535 | * @prev: struct dwarf_frame of the previous stackframe on the callstack | ||
| 536 | * | ||
| 537 | * Return a struct dwarf_frame representing the most recent frame | ||
| 538 | * on the callstack. Each of the lower (older) stack frames are | ||
| 539 | * linked via the "prev" member. | ||
| 540 | */ | ||
| 541 | struct dwarf_frame * dwarf_unwind_stack(unsigned long pc, | ||
| 542 | struct dwarf_frame *prev) | ||
| 543 | { | ||
| 544 | struct dwarf_frame *frame; | ||
| 545 | struct dwarf_cie *cie; | ||
| 546 | struct dwarf_fde *fde; | ||
| 547 | struct dwarf_reg *reg; | ||
| 548 | unsigned long addr; | ||
| 549 | |||
| 550 | /* | ||
| 551 | * If this is the first invocation of this recursive function we | ||
| 552 | * need get the contents of a physical register to get the CFA | ||
| 553 | * in order to begin the virtual unwinding of the stack. | ||
| 554 | * | ||
| 555 | * NOTE: the return address is guaranteed to be setup by the | ||
| 556 | * time this function makes its first function call. | ||
| 557 | */ | ||
| 558 | if (!pc && !prev) | ||
| 559 | pc = (unsigned long)current_text_addr(); | ||
| 560 | |||
| 561 | frame = mempool_alloc(dwarf_frame_pool, GFP_ATOMIC); | ||
| 562 | if (!frame) { | ||
| 563 | printk(KERN_ERR "Unable to allocate a dwarf frame\n"); | ||
| 564 | UNWINDER_BUG(); | ||
| 565 | } | ||
| 566 | |||
| 567 | INIT_LIST_HEAD(&frame->reg_list); | ||
| 568 | frame->flags = 0; | ||
| 569 | frame->prev = prev; | ||
| 570 | frame->return_addr = 0; | ||
| 571 | |||
| 572 | fde = dwarf_lookup_fde(pc); | ||
| 573 | if (!fde) { | ||
| 574 | /* | ||
| 575 | * This is our normal exit path - the one that stops the | ||
| 576 | * recursion. There's two reasons why we might exit | ||
| 577 | * here, | ||
| 578 | * | ||
| 579 | * a) pc has no asscociated DWARF frame info and so | ||
| 580 | * we don't know how to unwind this frame. This is | ||
| 581 | * usually the case when we're trying to unwind a | ||
| 582 | * frame that was called from some assembly code | ||
| 583 | * that has no DWARF info, e.g. syscalls. | ||
| 584 | * | ||
| 585 | * b) the DEBUG info for pc is bogus. There's | ||
| 586 | * really no way to distinguish this case from the | ||
| 587 | * case above, which sucks because we could print a | ||
| 588 | * warning here. | ||
| 589 | */ | ||
| 590 | goto bail; | ||
| 591 | } | ||
| 592 | |||
| 593 | cie = dwarf_lookup_cie(fde->cie_pointer); | ||
| 594 | |||
| 595 | frame->pc = fde->initial_location; | ||
| 596 | |||
| 597 | /* CIE initial instructions */ | ||
| 598 | dwarf_cfa_execute_insns(cie->initial_instructions, | ||
| 599 | cie->instructions_end, cie, fde, | ||
| 600 | frame, pc); | ||
| 601 | |||
| 602 | /* FDE instructions */ | ||
| 603 | dwarf_cfa_execute_insns(fde->instructions, fde->end, cie, | ||
| 604 | fde, frame, pc); | ||
| 605 | |||
| 606 | /* Calculate the CFA */ | ||
| 607 | switch (frame->flags) { | ||
| 608 | case DWARF_FRAME_CFA_REG_OFFSET: | ||
| 609 | if (prev) { | ||
| 610 | reg = dwarf_frame_reg(prev, frame->cfa_register); | ||
| 611 | UNWINDER_BUG_ON(!reg); | ||
| 612 | UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET); | ||
| 613 | |||
| 614 | addr = prev->cfa + reg->addr; | ||
| 615 | frame->cfa = __raw_readl(addr); | ||
| 616 | |||
| 617 | } else { | ||
| 618 | /* | ||
| 619 | * Again, this is the first invocation of this | ||
| 620 | * recurisve function. We need to physically | ||
| 621 | * read the contents of a register in order to | ||
| 622 | * get the Canonical Frame Address for this | ||
| 623 | * function. | ||
| 624 | */ | ||
| 625 | frame->cfa = dwarf_read_arch_reg(frame->cfa_register); | ||
| 626 | } | ||
| 627 | |||
| 628 | frame->cfa += frame->cfa_offset; | ||
| 629 | break; | ||
| 630 | default: | ||
| 631 | UNWINDER_BUG(); | ||
| 632 | } | ||
| 633 | |||
| 634 | reg = dwarf_frame_reg(frame, DWARF_ARCH_RA_REG); | ||
| 635 | |||
| 636 | /* | ||
| 637 | * If we haven't seen the return address register or the return | ||
| 638 | * address column is undefined then we must assume that this is | ||
| 639 | * the end of the callstack. | ||
| 640 | */ | ||
| 641 | if (!reg || reg->flags == DWARF_UNDEFINED) | ||
| 642 | goto bail; | ||
| 643 | |||
| 644 | UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET); | ||
| 645 | |||
| 646 | addr = frame->cfa + reg->addr; | ||
| 647 | frame->return_addr = __raw_readl(addr); | ||
| 648 | |||
| 649 | return frame; | ||
| 650 | |||
| 651 | bail: | ||
| 652 | dwarf_frame_free_regs(frame); | ||
| 653 | mempool_free(frame, dwarf_frame_pool); | ||
| 654 | return NULL; | ||
| 655 | } | ||
| 656 | |||
| 657 | static int dwarf_parse_cie(void *entry, void *p, unsigned long len, | ||
| 658 | unsigned char *end) | ||
| 659 | { | ||
| 660 | struct dwarf_cie *cie; | ||
| 661 | unsigned long flags; | ||
| 662 | int count; | ||
| 663 | |||
| 664 | cie = kzalloc(sizeof(*cie), GFP_KERNEL); | ||
| 665 | if (!cie) | ||
| 666 | return -ENOMEM; | ||
| 667 | |||
| 668 | cie->length = len; | ||
| 669 | |||
| 670 | /* | ||
| 671 | * Record the offset into the .eh_frame section | ||
| 672 | * for this CIE. It allows this CIE to be | ||
| 673 | * quickly and easily looked up from the | ||
| 674 | * corresponding FDE. | ||
| 675 | */ | ||
| 676 | cie->cie_pointer = (unsigned long)entry; | ||
| 677 | |||
| 678 | cie->version = *(char *)p++; | ||
| 679 | UNWINDER_BUG_ON(cie->version != 1); | ||
| 680 | |||
| 681 | cie->augmentation = p; | ||
| 682 | p += strlen(cie->augmentation) + 1; | ||
| 683 | |||
| 684 | count = dwarf_read_uleb128(p, &cie->code_alignment_factor); | ||
| 685 | p += count; | ||
| 686 | |||
| 687 | count = dwarf_read_leb128(p, &cie->data_alignment_factor); | ||
| 688 | p += count; | ||
| 689 | |||
| 690 | /* | ||
| 691 | * Which column in the rule table contains the | ||
| 692 | * return address? | ||
| 693 | */ | ||
| 694 | if (cie->version == 1) { | ||
| 695 | cie->return_address_reg = __raw_readb(p); | ||
| 696 | p++; | ||
| 697 | } else { | ||
| 698 | count = dwarf_read_uleb128(p, &cie->return_address_reg); | ||
| 699 | p += count; | ||
| 700 | } | ||
| 701 | |||
| 702 | if (cie->augmentation[0] == 'z') { | ||
| 703 | unsigned int length, count; | ||
| 704 | cie->flags |= DWARF_CIE_Z_AUGMENTATION; | ||
| 705 | |||
| 706 | count = dwarf_read_uleb128(p, &length); | ||
| 707 | p += count; | ||
| 708 | |||
| 709 | UNWINDER_BUG_ON((unsigned char *)p > end); | ||
| 710 | |||
| 711 | cie->initial_instructions = p + length; | ||
| 712 | cie->augmentation++; | ||
| 713 | } | ||
| 714 | |||
| 715 | while (*cie->augmentation) { | ||
| 716 | /* | ||
| 717 | * "L" indicates a byte showing how the | ||
| 718 | * LSDA pointer is encoded. Skip it. | ||
| 719 | */ | ||
| 720 | if (*cie->augmentation == 'L') { | ||
| 721 | p++; | ||
| 722 | cie->augmentation++; | ||
| 723 | } else if (*cie->augmentation == 'R') { | ||
| 724 | /* | ||
| 725 | * "R" indicates a byte showing | ||
| 726 | * how FDE addresses are | ||
| 727 | * encoded. | ||
| 728 | */ | ||
| 729 | cie->encoding = *(char *)p++; | ||
| 730 | cie->augmentation++; | ||
| 731 | } else if (*cie->augmentation == 'P') { | ||
| 732 | /* | ||
| 733 | * "R" indicates a personality | ||
| 734 | * routine in the CIE | ||
| 735 | * augmentation. | ||
| 736 | */ | ||
| 737 | UNWINDER_BUG(); | ||
| 738 | } else if (*cie->augmentation == 'S') { | ||
| 739 | UNWINDER_BUG(); | ||
| 740 | } else { | ||
| 741 | /* | ||
| 742 | * Unknown augmentation. Assume | ||
| 743 | * 'z' augmentation. | ||
| 744 | */ | ||
| 745 | p = cie->initial_instructions; | ||
| 746 | UNWINDER_BUG_ON(!p); | ||
| 747 | break; | ||
| 748 | } | ||
| 749 | } | ||
| 750 | |||
| 751 | cie->initial_instructions = p; | ||
| 752 | cie->instructions_end = end; | ||
| 753 | |||
| 754 | /* Add to list */ | ||
| 755 | spin_lock_irqsave(&dwarf_cie_lock, flags); | ||
| 756 | list_add_tail(&cie->link, &dwarf_cie_list); | ||
| 757 | spin_unlock_irqrestore(&dwarf_cie_lock, flags); | ||
| 758 | |||
| 759 | return 0; | ||
| 760 | } | ||
| 761 | |||
| 762 | static int dwarf_parse_fde(void *entry, u32 entry_type, | ||
| 763 | void *start, unsigned long len, | ||
| 764 | unsigned char *end) | ||
| 765 | { | ||
| 766 | struct dwarf_fde *fde; | ||
| 767 | struct dwarf_cie *cie; | ||
| 768 | unsigned long flags; | ||
| 769 | int count; | ||
| 770 | void *p = start; | ||
| 771 | |||
| 772 | fde = kzalloc(sizeof(*fde), GFP_KERNEL); | ||
| 773 | if (!fde) | ||
| 774 | return -ENOMEM; | ||
| 775 | |||
| 776 | fde->length = len; | ||
| 777 | |||
| 778 | /* | ||
| 779 | * In a .eh_frame section the CIE pointer is the | ||
| 780 | * delta between the address within the FDE | ||
| 781 | */ | ||
| 782 | fde->cie_pointer = (unsigned long)(p - entry_type - 4); | ||
| 783 | |||
| 784 | cie = dwarf_lookup_cie(fde->cie_pointer); | ||
| 785 | fde->cie = cie; | ||
| 786 | |||
| 787 | if (cie->encoding) | ||
| 788 | count = dwarf_read_encoded_value(p, &fde->initial_location, | ||
| 789 | cie->encoding); | ||
| 790 | else | ||
| 791 | count = dwarf_read_addr(p, &fde->initial_location); | ||
| 792 | |||
| 793 | p += count; | ||
| 794 | |||
| 795 | if (cie->encoding) | ||
| 796 | count = dwarf_read_encoded_value(p, &fde->address_range, | ||
| 797 | cie->encoding & 0x0f); | ||
| 798 | else | ||
| 799 | count = dwarf_read_addr(p, &fde->address_range); | ||
| 800 | |||
| 801 | p += count; | ||
| 802 | |||
| 803 | if (fde->cie->flags & DWARF_CIE_Z_AUGMENTATION) { | ||
| 804 | unsigned int length; | ||
| 805 | count = dwarf_read_uleb128(p, &length); | ||
| 806 | p += count + length; | ||
| 807 | } | ||
| 808 | |||
| 809 | /* Call frame instructions. */ | ||
| 810 | fde->instructions = p; | ||
| 811 | fde->end = end; | ||
| 812 | |||
| 813 | /* Add to list. */ | ||
| 814 | spin_lock_irqsave(&dwarf_fde_lock, flags); | ||
| 815 | list_add_tail(&fde->link, &dwarf_fde_list); | ||
| 816 | spin_unlock_irqrestore(&dwarf_fde_lock, flags); | ||
| 817 | |||
| 818 | return 0; | ||
| 819 | } | ||
| 820 | |||
| 821 | static void dwarf_unwinder_dump(struct task_struct *task, | ||
| 822 | struct pt_regs *regs, | ||
| 823 | unsigned long *sp, | ||
| 824 | const struct stacktrace_ops *ops, | ||
| 825 | void *data) | ||
| 826 | { | ||
| 827 | struct dwarf_frame *frame, *_frame; | ||
| 828 | unsigned long return_addr; | ||
| 829 | |||
| 830 | _frame = NULL; | ||
| 831 | return_addr = 0; | ||
| 832 | |||
| 833 | while (1) { | ||
| 834 | frame = dwarf_unwind_stack(return_addr, _frame); | ||
| 835 | |||
| 836 | if (_frame) { | ||
| 837 | dwarf_frame_free_regs(_frame); | ||
| 838 | mempool_free(_frame, dwarf_frame_pool); | ||
| 839 | } | ||
| 840 | |||
| 841 | _frame = frame; | ||
| 842 | |||
| 843 | if (!frame || !frame->return_addr) | ||
| 844 | break; | ||
| 845 | |||
| 846 | return_addr = frame->return_addr; | ||
| 847 | ops->address(data, return_addr, 1); | ||
| 848 | } | ||
| 849 | } | ||
| 850 | |||
| 851 | static struct unwinder dwarf_unwinder = { | ||
| 852 | .name = "dwarf-unwinder", | ||
| 853 | .dump = dwarf_unwinder_dump, | ||
| 854 | .rating = 150, | ||
| 855 | }; | ||
| 856 | |||
| 857 | static void dwarf_unwinder_cleanup(void) | ||
| 858 | { | ||
| 859 | struct dwarf_cie *cie; | ||
| 860 | struct dwarf_fde *fde; | ||
| 861 | |||
| 862 | /* | ||
| 863 | * Deallocate all the memory allocated for the DWARF unwinder. | ||
| 864 | * Traverse all the FDE/CIE lists and remove and free all the | ||
| 865 | * memory associated with those data structures. | ||
| 866 | */ | ||
| 867 | list_for_each_entry(cie, &dwarf_cie_list, link) | ||
| 868 | kfree(cie); | ||
| 869 | |||
| 870 | list_for_each_entry(fde, &dwarf_fde_list, link) | ||
| 871 | kfree(fde); | ||
| 872 | |||
| 873 | kmem_cache_destroy(dwarf_reg_cachep); | ||
| 874 | kmem_cache_destroy(dwarf_frame_cachep); | ||
| 875 | } | ||
| 876 | |||
| 877 | /** | ||
| 878 | * dwarf_unwinder_init - initialise the dwarf unwinder | ||
| 879 | * | ||
| 880 | * Build the data structures describing the .dwarf_frame section to | ||
| 881 | * make it easier to lookup CIE and FDE entries. Because the | ||
| 882 | * .eh_frame section is packed as tightly as possible it is not | ||
| 883 | * easy to lookup the FDE for a given PC, so we build a list of FDE | ||
| 884 | * and CIE entries that make it easier. | ||
| 885 | */ | ||
| 886 | static int __init dwarf_unwinder_init(void) | ||
| 887 | { | ||
| 888 | u32 entry_type; | ||
| 889 | void *p, *entry; | ||
| 890 | int count, err = 0; | ||
| 891 | unsigned long len; | ||
| 892 | unsigned int c_entries, f_entries; | ||
| 893 | unsigned char *end; | ||
| 894 | INIT_LIST_HEAD(&dwarf_cie_list); | ||
| 895 | INIT_LIST_HEAD(&dwarf_fde_list); | ||
| 896 | |||
| 897 | c_entries = 0; | ||
| 898 | f_entries = 0; | ||
| 899 | entry = &__start_eh_frame; | ||
| 900 | |||
| 901 | dwarf_frame_cachep = kmem_cache_create("dwarf_frames", | ||
| 902 | sizeof(struct dwarf_frame), 0, | ||
| 903 | SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL); | ||
| 904 | |||
| 905 | dwarf_reg_cachep = kmem_cache_create("dwarf_regs", | ||
| 906 | sizeof(struct dwarf_reg), 0, | ||
| 907 | SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL); | ||
| 908 | |||
| 909 | dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ, | ||
| 910 | mempool_alloc_slab, | ||
| 911 | mempool_free_slab, | ||
| 912 | dwarf_frame_cachep); | ||
| 913 | |||
| 914 | dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ, | ||
| 915 | mempool_alloc_slab, | ||
| 916 | mempool_free_slab, | ||
| 917 | dwarf_reg_cachep); | ||
| 918 | |||
| 919 | while ((char *)entry < __stop_eh_frame) { | ||
| 920 | p = entry; | ||
| 921 | |||
| 922 | count = dwarf_entry_len(p, &len); | ||
| 923 | if (count == 0) { | ||
| 924 | /* | ||
| 925 | * We read a bogus length field value. There is | ||
| 926 | * nothing we can do here apart from disabling | ||
| 927 | * the DWARF unwinder. We can't even skip this | ||
| 928 | * entry and move to the next one because 'len' | ||
| 929 | * tells us where our next entry is. | ||
| 930 | */ | ||
| 931 | goto out; | ||
| 932 | } else | ||
| 933 | p += count; | ||
| 934 | |||
| 935 | /* initial length does not include itself */ | ||
| 936 | end = p + len; | ||
| 937 | |||
| 938 | entry_type = get_unaligned((u32 *)p); | ||
| 939 | p += 4; | ||
| 940 | |||
| 941 | if (entry_type == DW_EH_FRAME_CIE) { | ||
| 942 | err = dwarf_parse_cie(entry, p, len, end); | ||
| 943 | if (err < 0) | ||
| 944 | goto out; | ||
| 945 | else | ||
| 946 | c_entries++; | ||
| 947 | } else { | ||
| 948 | err = dwarf_parse_fde(entry, entry_type, p, len, end); | ||
| 949 | if (err < 0) | ||
| 950 | goto out; | ||
| 951 | else | ||
| 952 | f_entries++; | ||
| 953 | } | ||
| 954 | |||
| 955 | entry = (char *)entry + len + 4; | ||
| 956 | } | ||
| 957 | |||
| 958 | printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n", | ||
| 959 | c_entries, f_entries); | ||
| 960 | |||
| 961 | err = unwinder_register(&dwarf_unwinder); | ||
| 962 | if (err) | ||
| 963 | goto out; | ||
| 964 | |||
| 965 | return 0; | ||
| 966 | |||
| 967 | out: | ||
| 968 | printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err); | ||
| 969 | dwarf_unwinder_cleanup(); | ||
| 970 | return -EINVAL; | ||
| 971 | } | ||
| 972 | early_initcall(dwarf_unwinder_init); | ||
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c index a952dcf9999d..81a46145ffa5 100644 --- a/arch/sh/kernel/early_printk.c +++ b/arch/sh/kernel/early_printk.c | |||
| @@ -134,7 +134,7 @@ static void scif_sercon_init(char *s) | |||
| 134 | sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */ | 134 | sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */ |
| 135 | sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */ | 135 | sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */ |
| 136 | } | 136 | } |
| 137 | #elif defined(CONFIG_CPU_SH4) | 137 | #elif defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3) |
| 138 | #define DEFAULT_BAUD 115200 | 138 | #define DEFAULT_BAUD 115200 |
| 139 | /* | 139 | /* |
| 140 | * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4 | 140 | * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4 |
| @@ -220,8 +220,7 @@ static int __init setup_early_printk(char *buf) | |||
| 220 | early_console = &scif_console; | 220 | early_console = &scif_console; |
| 221 | 221 | ||
| 222 | #if !defined(CONFIG_SH_STANDARD_BIOS) | 222 | #if !defined(CONFIG_SH_STANDARD_BIOS) |
| 223 | #if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 223 | #if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3) |
| 224 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
| 225 | scif_sercon_init(buf + 6); | 224 | scif_sercon_init(buf + 6); |
| 226 | #endif | 225 | #endif |
| 227 | #endif | 226 | #endif |
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S index d62359cfbbe2..68d9223b145e 100644 --- a/arch/sh/kernel/entry-common.S +++ b/arch/sh/kernel/entry-common.S | |||
| @@ -43,9 +43,10 @@ | |||
| 43 | * syscall # | 43 | * syscall # |
| 44 | * | 44 | * |
| 45 | */ | 45 | */ |
| 46 | #include <asm/dwarf.h> | ||
| 46 | 47 | ||
| 47 | #if defined(CONFIG_PREEMPT) | 48 | #if defined(CONFIG_PREEMPT) |
| 48 | # define preempt_stop() cli | 49 | # define preempt_stop() cli ; TRACE_IRQS_OFF |
| 49 | #else | 50 | #else |
| 50 | # define preempt_stop() | 51 | # define preempt_stop() |
| 51 | # define resume_kernel __restore_all | 52 | # define resume_kernel __restore_all |
| @@ -55,11 +56,7 @@ | |||
| 55 | .align 2 | 56 | .align 2 |
| 56 | ENTRY(exception_error) | 57 | ENTRY(exception_error) |
| 57 | ! | 58 | ! |
| 58 | #ifdef CONFIG_TRACE_IRQFLAGS | 59 | TRACE_IRQS_ON |
| 59 | mov.l 2f, r0 | ||
| 60 | jsr @r0 | ||
| 61 | nop | ||
| 62 | #endif | ||
| 63 | sti | 60 | sti |
| 64 | mov.l 1f, r0 | 61 | mov.l 1f, r0 |
| 65 | jmp @r0 | 62 | jmp @r0 |
| @@ -67,18 +64,15 @@ ENTRY(exception_error) | |||
| 67 | 64 | ||
| 68 | .align 2 | 65 | .align 2 |
| 69 | 1: .long do_exception_error | 66 | 1: .long do_exception_error |
| 70 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
| 71 | 2: .long trace_hardirqs_on | ||
| 72 | #endif | ||
| 73 | 67 | ||
| 74 | .align 2 | 68 | .align 2 |
| 75 | ret_from_exception: | 69 | ret_from_exception: |
| 70 | CFI_STARTPROC simple | ||
| 71 | CFI_DEF_CFA r14, 0 | ||
| 72 | CFI_REL_OFFSET 17, 64 | ||
| 73 | CFI_REL_OFFSET 15, 0 | ||
| 74 | CFI_REL_OFFSET 14, 56 | ||
| 76 | preempt_stop() | 75 | preempt_stop() |
| 77 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
| 78 | mov.l 4f, r0 | ||
| 79 | jsr @r0 | ||
| 80 | nop | ||
| 81 | #endif | ||
| 82 | ENTRY(ret_from_irq) | 76 | ENTRY(ret_from_irq) |
| 83 | ! | 77 | ! |
| 84 | mov #OFF_SR, r0 | 78 | mov #OFF_SR, r0 |
| @@ -93,6 +87,7 @@ ENTRY(ret_from_irq) | |||
| 93 | nop | 87 | nop |
| 94 | ENTRY(resume_kernel) | 88 | ENTRY(resume_kernel) |
| 95 | cli | 89 | cli |
| 90 | TRACE_IRQS_OFF | ||
| 96 | mov.l @(TI_PRE_COUNT,r8), r0 ! current_thread_info->preempt_count | 91 | mov.l @(TI_PRE_COUNT,r8), r0 ! current_thread_info->preempt_count |
| 97 | tst r0, r0 | 92 | tst r0, r0 |
| 98 | bf noresched | 93 | bf noresched |
| @@ -103,8 +98,9 @@ need_resched: | |||
| 103 | 98 | ||
| 104 | mov #OFF_SR, r0 | 99 | mov #OFF_SR, r0 |
| 105 | mov.l @(r0,r15), r0 ! get status register | 100 | mov.l @(r0,r15), r0 ! get status register |
| 106 | and #0xf0, r0 ! interrupts off (exception path)? | 101 | shlr r0 |
| 107 | cmp/eq #0xf0, r0 | 102 | and #(0xf0>>1), r0 ! interrupts off (exception path)? |
| 103 | cmp/eq #(0xf0>>1), r0 | ||
| 108 | bt noresched | 104 | bt noresched |
| 109 | mov.l 3f, r0 | 105 | mov.l 3f, r0 |
| 110 | jsr @r0 ! call preempt_schedule_irq | 106 | jsr @r0 ! call preempt_schedule_irq |
| @@ -125,13 +121,9 @@ noresched: | |||
| 125 | ENTRY(resume_userspace) | 121 | ENTRY(resume_userspace) |
| 126 | ! r8: current_thread_info | 122 | ! r8: current_thread_info |
| 127 | cli | 123 | cli |
| 128 | #ifdef CONFIG_TRACE_IRQFLAGS | 124 | TRACE_IRQS_OfF |
| 129 | mov.l 5f, r0 | ||
| 130 | jsr @r0 | ||
| 131 | nop | ||
| 132 | #endif | ||
| 133 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags | 125 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags |
| 134 | tst #_TIF_WORK_MASK, r0 | 126 | tst #(_TIF_WORK_MASK & 0xff), r0 |
| 135 | bt/s __restore_all | 127 | bt/s __restore_all |
| 136 | tst #_TIF_NEED_RESCHED, r0 | 128 | tst #_TIF_NEED_RESCHED, r0 |
| 137 | 129 | ||
| @@ -156,14 +148,10 @@ work_resched: | |||
| 156 | jsr @r1 ! schedule | 148 | jsr @r1 ! schedule |
| 157 | nop | 149 | nop |
| 158 | cli | 150 | cli |
| 159 | #ifdef CONFIG_TRACE_IRQFLAGS | 151 | TRACE_IRQS_OFF |
| 160 | mov.l 5f, r0 | ||
| 161 | jsr @r0 | ||
| 162 | nop | ||
| 163 | #endif | ||
| 164 | ! | 152 | ! |
| 165 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags | 153 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags |
| 166 | tst #_TIF_WORK_MASK, r0 | 154 | tst #(_TIF_WORK_MASK & 0xff), r0 |
| 167 | bt __restore_all | 155 | bt __restore_all |
| 168 | bra work_pending | 156 | bra work_pending |
| 169 | tst #_TIF_NEED_RESCHED, r0 | 157 | tst #_TIF_NEED_RESCHED, r0 |
| @@ -172,23 +160,15 @@ work_resched: | |||
| 172 | 1: .long schedule | 160 | 1: .long schedule |
| 173 | 2: .long do_notify_resume | 161 | 2: .long do_notify_resume |
| 174 | 3: .long resume_userspace | 162 | 3: .long resume_userspace |
| 175 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
| 176 | 4: .long trace_hardirqs_on | ||
| 177 | 5: .long trace_hardirqs_off | ||
| 178 | #endif | ||
| 179 | 163 | ||
| 180 | .align 2 | 164 | .align 2 |
| 181 | syscall_exit_work: | 165 | syscall_exit_work: |
| 182 | ! r0: current_thread_info->flags | 166 | ! r0: current_thread_info->flags |
| 183 | ! r8: current_thread_info | 167 | ! r8: current_thread_info |
| 184 | tst #_TIF_WORK_SYSCALL_MASK, r0 | 168 | tst #(_TIF_WORK_SYSCALL_MASK & 0xff), r0 |
| 185 | bt/s work_pending | 169 | bt/s work_pending |
| 186 | tst #_TIF_NEED_RESCHED, r0 | 170 | tst #_TIF_NEED_RESCHED, r0 |
| 187 | #ifdef CONFIG_TRACE_IRQFLAGS | 171 | TRACE_IRQS_ON |
| 188 | mov.l 5f, r0 | ||
| 189 | jsr @r0 | ||
| 190 | nop | ||
| 191 | #endif | ||
| 192 | sti | 172 | sti |
| 193 | mov r15, r4 | 173 | mov r15, r4 |
| 194 | mov.l 8f, r0 ! do_syscall_trace_leave | 174 | mov.l 8f, r0 ! do_syscall_trace_leave |
| @@ -226,12 +206,25 @@ syscall_trace_entry: | |||
| 226 | mov.l r0, @(OFF_R0,r15) ! Return value | 206 | mov.l r0, @(OFF_R0,r15) ! Return value |
| 227 | 207 | ||
| 228 | __restore_all: | 208 | __restore_all: |
| 229 | mov.l 1f, r0 | 209 | mov #OFF_SR, r0 |
| 210 | mov.l @(r0,r15), r0 ! get status register | ||
| 211 | |||
| 212 | shlr2 r0 | ||
| 213 | and #0x3c, r0 | ||
| 214 | cmp/eq #0x3c, r0 | ||
| 215 | bt 1f | ||
| 216 | TRACE_IRQS_ON | ||
| 217 | bra 2f | ||
| 218 | nop | ||
| 219 | 1: | ||
| 220 | TRACE_IRQS_OFF | ||
| 221 | 2: | ||
| 222 | mov.l 3f, r0 | ||
| 230 | jmp @r0 | 223 | jmp @r0 |
| 231 | nop | 224 | nop |
| 232 | 225 | ||
| 233 | .align 2 | 226 | .align 2 |
| 234 | 1: .long restore_all | 227 | 3: .long restore_all |
| 235 | 228 | ||
| 236 | .align 2 | 229 | .align 2 |
| 237 | syscall_badsys: ! Bad syscall number | 230 | syscall_badsys: ! Bad syscall number |
| @@ -259,6 +252,7 @@ debug_trap: | |||
| 259 | nop | 252 | nop |
| 260 | bra __restore_all | 253 | bra __restore_all |
| 261 | nop | 254 | nop |
| 255 | CFI_ENDPROC | ||
| 262 | 256 | ||
| 263 | .align 2 | 257 | .align 2 |
| 264 | 1: .long debug_trap_table | 258 | 1: .long debug_trap_table |
| @@ -304,6 +298,7 @@ ret_from_fork: | |||
| 304 | * system calls and debug traps through their respective jump tables. | 298 | * system calls and debug traps through their respective jump tables. |
| 305 | */ | 299 | */ |
| 306 | ENTRY(system_call) | 300 | ENTRY(system_call) |
| 301 | setup_frame_reg | ||
| 307 | #if !defined(CONFIG_CPU_SH2) | 302 | #if !defined(CONFIG_CPU_SH2) |
| 308 | mov.l 1f, r9 | 303 | mov.l 1f, r9 |
| 309 | mov.l @r9, r8 ! Read from TRA (Trap Address) Register | 304 | mov.l @r9, r8 ! Read from TRA (Trap Address) Register |
| @@ -321,18 +316,18 @@ ENTRY(system_call) | |||
| 321 | bt/s debug_trap ! it's a debug trap.. | 316 | bt/s debug_trap ! it's a debug trap.. |
| 322 | nop | 317 | nop |
| 323 | 318 | ||
| 324 | #ifdef CONFIG_TRACE_IRQFLAGS | 319 | TRACE_IRQS_ON |
| 325 | mov.l 5f, r10 | ||
| 326 | jsr @r10 | ||
| 327 | nop | ||
| 328 | #endif | ||
| 329 | sti | 320 | sti |
| 330 | 321 | ||
| 331 | ! | 322 | ! |
| 332 | get_current_thread_info r8, r10 | 323 | get_current_thread_info r8, r10 |
| 333 | mov.l @(TI_FLAGS,r8), r8 | 324 | mov.l @(TI_FLAGS,r8), r8 |
| 334 | mov #_TIF_WORK_SYSCALL_MASK, r10 | 325 | mov #(_TIF_WORK_SYSCALL_MASK & 0xff), r10 |
| 326 | mov #(_TIF_WORK_SYSCALL_MASK >> 8), r9 | ||
| 335 | tst r10, r8 | 327 | tst r10, r8 |
| 328 | shll8 r9 | ||
| 329 | bf syscall_trace_entry | ||
| 330 | tst r9, r8 | ||
| 336 | bf syscall_trace_entry | 331 | bf syscall_trace_entry |
| 337 | ! | 332 | ! |
| 338 | mov.l 2f, r8 ! Number of syscalls | 333 | mov.l 2f, r8 ! Number of syscalls |
| @@ -351,15 +346,15 @@ syscall_call: | |||
| 351 | ! | 346 | ! |
| 352 | syscall_exit: | 347 | syscall_exit: |
| 353 | cli | 348 | cli |
| 354 | #ifdef CONFIG_TRACE_IRQFLAGS | 349 | TRACE_IRQS_OFF |
| 355 | mov.l 6f, r0 | ||
| 356 | jsr @r0 | ||
| 357 | nop | ||
| 358 | #endif | ||
| 359 | ! | 350 | ! |
| 360 | get_current_thread_info r8, r0 | 351 | get_current_thread_info r8, r0 |
| 361 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags | 352 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags |
| 362 | tst #_TIF_ALLWORK_MASK, r0 | 353 | tst #(_TIF_ALLWORK_MASK & 0xff), r0 |
| 354 | mov #(_TIF_ALLWORK_MASK >> 8), r1 | ||
| 355 | bf syscall_exit_work | ||
| 356 | shlr8 r0 | ||
| 357 | tst r0, r1 | ||
| 363 | bf syscall_exit_work | 358 | bf syscall_exit_work |
| 364 | bra __restore_all | 359 | bra __restore_all |
| 365 | nop | 360 | nop |
| @@ -369,9 +364,5 @@ syscall_exit: | |||
| 369 | #endif | 364 | #endif |
| 370 | 2: .long NR_syscalls | 365 | 2: .long NR_syscalls |
| 371 | 3: .long sys_call_table | 366 | 3: .long sys_call_table |
| 372 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
| 373 | 5: .long trace_hardirqs_on | ||
| 374 | 6: .long trace_hardirqs_off | ||
| 375 | #endif | ||
| 376 | 7: .long do_syscall_trace_enter | 367 | 7: .long do_syscall_trace_enter |
| 377 | 8: .long do_syscall_trace_leave | 368 | 8: .long do_syscall_trace_leave |
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c index 066f37dc32a9..a3dcc6d5d253 100644 --- a/arch/sh/kernel/ftrace.c +++ b/arch/sh/kernel/ftrace.c | |||
| @@ -16,9 +16,13 @@ | |||
| 16 | #include <linux/string.h> | 16 | #include <linux/string.h> |
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <linux/kernel.h> | ||
| 19 | #include <asm/ftrace.h> | 20 | #include <asm/ftrace.h> |
| 20 | #include <asm/cacheflush.h> | 21 | #include <asm/cacheflush.h> |
| 22 | #include <asm/unistd.h> | ||
| 23 | #include <trace/syscall.h> | ||
| 21 | 24 | ||
| 25 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
| 22 | static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE]; | 26 | static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE]; |
| 23 | 27 | ||
| 24 | static unsigned char ftrace_nop[4]; | 28 | static unsigned char ftrace_nop[4]; |
| @@ -131,3 +135,187 @@ int __init ftrace_dyn_arch_init(void *data) | |||
| 131 | 135 | ||
| 132 | return 0; | 136 | return 0; |
| 133 | } | 137 | } |
| 138 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
| 139 | |||
| 140 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
| 141 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
| 142 | extern void ftrace_graph_call(void); | ||
| 143 | |||
| 144 | static int ftrace_mod(unsigned long ip, unsigned long old_addr, | ||
| 145 | unsigned long new_addr) | ||
| 146 | { | ||
| 147 | unsigned char code[MCOUNT_INSN_SIZE]; | ||
| 148 | |||
| 149 | if (probe_kernel_read(code, (void *)ip, MCOUNT_INSN_SIZE)) | ||
| 150 | return -EFAULT; | ||
| 151 | |||
| 152 | if (old_addr != __raw_readl((unsigned long *)code)) | ||
| 153 | return -EINVAL; | ||
| 154 | |||
| 155 | __raw_writel(new_addr, ip); | ||
| 156 | return 0; | ||
| 157 | } | ||
| 158 | |||
| 159 | int ftrace_enable_ftrace_graph_caller(void) | ||
| 160 | { | ||
| 161 | unsigned long ip, old_addr, new_addr; | ||
| 162 | |||
| 163 | ip = (unsigned long)(&ftrace_graph_call) + GRAPH_INSN_OFFSET; | ||
| 164 | old_addr = (unsigned long)(&skip_trace); | ||
| 165 | new_addr = (unsigned long)(&ftrace_graph_caller); | ||
| 166 | |||
| 167 | return ftrace_mod(ip, old_addr, new_addr); | ||
| 168 | } | ||
| 169 | |||
| 170 | int ftrace_disable_ftrace_graph_caller(void) | ||
| 171 | { | ||
| 172 | unsigned long ip, old_addr, new_addr; | ||
| 173 | |||
| 174 | ip = (unsigned long)(&ftrace_graph_call) + GRAPH_INSN_OFFSET; | ||
| 175 | old_addr = (unsigned long)(&ftrace_graph_caller); | ||
| 176 | new_addr = (unsigned long)(&skip_trace); | ||
| 177 | |||
| 178 | return ftrace_mod(ip, old_addr, new_addr); | ||
| 179 | } | ||
| 180 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
| 181 | |||
| 182 | /* | ||
| 183 | * Hook the return address and push it in the stack of return addrs | ||
| 184 | * in the current thread info. | ||
| 185 | * | ||
| 186 | * This is the main routine for the function graph tracer. The function | ||
| 187 | * graph tracer essentially works like this: | ||
| 188 | * | ||
| 189 | * parent is the stack address containing self_addr's return address. | ||
| 190 | * We pull the real return address out of parent and store it in | ||
| 191 | * current's ret_stack. Then, we replace the return address on the stack | ||
| 192 | * with the address of return_to_handler. self_addr is the function that | ||
| 193 | * called mcount. | ||
| 194 | * | ||
| 195 | * When self_addr returns, it will jump to return_to_handler which calls | ||
| 196 | * ftrace_return_to_handler. ftrace_return_to_handler will pull the real | ||
| 197 | * return address off of current's ret_stack and jump to it. | ||
| 198 | */ | ||
| 199 | void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) | ||
| 200 | { | ||
| 201 | unsigned long old; | ||
| 202 | int faulted, err; | ||
| 203 | struct ftrace_graph_ent trace; | ||
| 204 | unsigned long return_hooker = (unsigned long)&return_to_handler; | ||
| 205 | |||
| 206 | if (unlikely(atomic_read(¤t->tracing_graph_pause))) | ||
| 207 | return; | ||
| 208 | |||
| 209 | /* | ||
| 210 | * Protect against fault, even if it shouldn't | ||
| 211 | * happen. This tool is too much intrusive to | ||
| 212 | * ignore such a protection. | ||
| 213 | */ | ||
| 214 | __asm__ __volatile__( | ||
| 215 | "1: \n\t" | ||
| 216 | "mov.l @%2, %0 \n\t" | ||
| 217 | "2: \n\t" | ||
| 218 | "mov.l %3, @%2 \n\t" | ||
| 219 | "mov #0, %1 \n\t" | ||
| 220 | "3: \n\t" | ||
| 221 | ".section .fixup, \"ax\" \n\t" | ||
| 222 | "4: \n\t" | ||
| 223 | "mov.l 5f, %0 \n\t" | ||
| 224 | "jmp @%0 \n\t" | ||
| 225 | " mov #1, %1 \n\t" | ||
| 226 | ".balign 4 \n\t" | ||
| 227 | "5: .long 3b \n\t" | ||
| 228 | ".previous \n\t" | ||
| 229 | ".section __ex_table,\"a\" \n\t" | ||
| 230 | ".long 1b, 4b \n\t" | ||
| 231 | ".long 2b, 4b \n\t" | ||
| 232 | ".previous \n\t" | ||
| 233 | : "=&r" (old), "=r" (faulted) | ||
| 234 | : "r" (parent), "r" (return_hooker) | ||
| 235 | ); | ||
| 236 | |||
| 237 | if (unlikely(faulted)) { | ||
| 238 | ftrace_graph_stop(); | ||
| 239 | WARN_ON(1); | ||
| 240 | return; | ||
| 241 | } | ||
| 242 | |||
| 243 | err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0); | ||
| 244 | if (err == -EBUSY) { | ||
| 245 | __raw_writel(old, parent); | ||
| 246 | return; | ||
| 247 | } | ||
| 248 | |||
| 249 | trace.func = self_addr; | ||
| 250 | |||
| 251 | /* Only trace if the calling function expects to */ | ||
| 252 | if (!ftrace_graph_entry(&trace)) { | ||
| 253 | current->curr_ret_stack--; | ||
| 254 | __raw_writel(old, parent); | ||
| 255 | } | ||
| 256 | } | ||
| 257 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
| 258 | |||
| 259 | #ifdef CONFIG_FTRACE_SYSCALLS | ||
| 260 | |||
| 261 | extern unsigned long __start_syscalls_metadata[]; | ||
| 262 | extern unsigned long __stop_syscalls_metadata[]; | ||
| 263 | extern unsigned long *sys_call_table; | ||
| 264 | |||
| 265 | static struct syscall_metadata **syscalls_metadata; | ||
| 266 | |||
| 267 | static struct syscall_metadata *find_syscall_meta(unsigned long *syscall) | ||
| 268 | { | ||
| 269 | struct syscall_metadata *start; | ||
| 270 | struct syscall_metadata *stop; | ||
| 271 | char str[KSYM_SYMBOL_LEN]; | ||
| 272 | |||
| 273 | |||
| 274 | start = (struct syscall_metadata *)__start_syscalls_metadata; | ||
| 275 | stop = (struct syscall_metadata *)__stop_syscalls_metadata; | ||
| 276 | kallsyms_lookup((unsigned long) syscall, NULL, NULL, NULL, str); | ||
| 277 | |||
| 278 | for ( ; start < stop; start++) { | ||
| 279 | if (start->name && !strcmp(start->name, str)) | ||
| 280 | return start; | ||
| 281 | } | ||
| 282 | |||
| 283 | return NULL; | ||
| 284 | } | ||
| 285 | |||
| 286 | struct syscall_metadata *syscall_nr_to_meta(int nr) | ||
| 287 | { | ||
| 288 | if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0) | ||
| 289 | return NULL; | ||
| 290 | |||
| 291 | return syscalls_metadata[nr]; | ||
| 292 | } | ||
| 293 | |||
| 294 | void arch_init_ftrace_syscalls(void) | ||
| 295 | { | ||
| 296 | int i; | ||
| 297 | struct syscall_metadata *meta; | ||
| 298 | unsigned long **psys_syscall_table = &sys_call_table; | ||
| 299 | static atomic_t refs; | ||
| 300 | |||
| 301 | if (atomic_inc_return(&refs) != 1) | ||
| 302 | goto end; | ||
| 303 | |||
| 304 | syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) * | ||
| 305 | FTRACE_SYSCALL_MAX, GFP_KERNEL); | ||
| 306 | if (!syscalls_metadata) { | ||
| 307 | WARN_ON(1); | ||
| 308 | return; | ||
| 309 | } | ||
| 310 | |||
| 311 | for (i = 0; i < FTRACE_SYSCALL_MAX; i++) { | ||
| 312 | meta = find_syscall_meta(psys_syscall_table[i]); | ||
| 313 | syscalls_metadata[i] = meta; | ||
| 314 | } | ||
| 315 | return; | ||
| 316 | |||
| 317 | /* Paranoid: avoid overflow */ | ||
| 318 | end: | ||
| 319 | atomic_dec(&refs); | ||
| 320 | } | ||
| 321 | #endif /* CONFIG_FTRACE_SYSCALLS */ | ||
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c index 4f85fffaa557..4770c241c679 100644 --- a/arch/sh/kernel/io.c +++ b/arch/sh/kernel/io.c | |||
| @@ -1,12 +1,9 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * linux/arch/sh/kernel/io.c | 2 | * arch/sh/kernel/io.c - Machine independent I/O functions. |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2000 Stuart Menefy | 4 | * Copyright (C) 2000 - 2009 Stuart Menefy |
| 5 | * Copyright (C) 2005 Paul Mundt | 5 | * Copyright (C) 2005 Paul Mundt |
| 6 | * | 6 | * |
| 7 | * Provide real functions which expand to whatever the header file defined. | ||
| 8 | * Also definitions of machine independent IO functions. | ||
| 9 | * | ||
| 10 | * This file is subject to the terms and conditions of the GNU General Public | 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 11 | * License. See the file "COPYING" in the main directory of this archive | 8 | * License. See the file "COPYING" in the main directory of this archive |
| 12 | * for more details. | 9 | * for more details. |
| @@ -18,33 +15,87 @@ | |||
| 18 | 15 | ||
| 19 | /* | 16 | /* |
| 20 | * Copy data from IO memory space to "real" memory space. | 17 | * Copy data from IO memory space to "real" memory space. |
| 21 | * This needs to be optimized. | ||
| 22 | */ | 18 | */ |
| 23 | void memcpy_fromio(void *to, const volatile void __iomem *from, unsigned long count) | 19 | void memcpy_fromio(void *to, const volatile void __iomem *from, unsigned long count) |
| 24 | { | 20 | { |
| 25 | unsigned char *p = to; | 21 | /* |
| 26 | while (count) { | 22 | * Would it be worthwhile doing byte and long transfers first |
| 27 | count--; | 23 | * to try and get aligned? |
| 28 | *p = readb(from); | 24 | */ |
| 29 | p++; | 25 | #ifdef CONFIG_CPU_SH4 |
| 30 | from++; | 26 | if ((count >= 0x20) && |
| 31 | } | 27 | (((u32)to & 0x1f) == 0) && (((u32)from & 0x3) == 0)) { |
| 28 | int tmp2, tmp3, tmp4, tmp5, tmp6; | ||
| 29 | |||
| 30 | __asm__ __volatile__( | ||
| 31 | "1: \n\t" | ||
| 32 | "mov.l @%7+, r0 \n\t" | ||
| 33 | "mov.l @%7+, %2 \n\t" | ||
| 34 | "movca.l r0, @%0 \n\t" | ||
| 35 | "mov.l @%7+, %3 \n\t" | ||
| 36 | "mov.l @%7+, %4 \n\t" | ||
| 37 | "mov.l @%7+, %5 \n\t" | ||
| 38 | "mov.l @%7+, %6 \n\t" | ||
| 39 | "mov.l @%7+, r7 \n\t" | ||
| 40 | "mov.l @%7+, r0 \n\t" | ||
| 41 | "mov.l %2, @(0x04,%0) \n\t" | ||
| 42 | "mov #0x20, %2 \n\t" | ||
| 43 | "mov.l %3, @(0x08,%0) \n\t" | ||
| 44 | "sub %2, %1 \n\t" | ||
| 45 | "mov.l %4, @(0x0c,%0) \n\t" | ||
| 46 | "cmp/hi %1, %2 ! T if 32 > count \n\t" | ||
| 47 | "mov.l %5, @(0x10,%0) \n\t" | ||
| 48 | "mov.l %6, @(0x14,%0) \n\t" | ||
| 49 | "mov.l r7, @(0x18,%0) \n\t" | ||
| 50 | "mov.l r0, @(0x1c,%0) \n\t" | ||
| 51 | "bf.s 1b \n\t" | ||
| 52 | " add #0x20, %0 \n\t" | ||
| 53 | : "=&r" (to), "=&r" (count), | ||
| 54 | "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4), | ||
| 55 | "=&r" (tmp5), "=&r" (tmp6), "=&r" (from) | ||
| 56 | : "7"(from), "0" (to), "1" (count) | ||
| 57 | : "r0", "r7", "t", "memory"); | ||
| 58 | } | ||
| 59 | #endif | ||
| 60 | |||
| 61 | if ((((u32)to | (u32)from) & 0x3) == 0) { | ||
| 62 | for (; count > 3; count -= 4) { | ||
| 63 | *(u32 *)to = *(volatile u32 *)from; | ||
| 64 | to += 4; | ||
| 65 | from += 4; | ||
| 66 | } | ||
| 67 | } | ||
| 68 | |||
| 69 | for (; count > 0; count--) { | ||
| 70 | *(u8 *)to = *(volatile u8 *)from; | ||
| 71 | to++; | ||
| 72 | from++; | ||
| 73 | } | ||
| 74 | |||
| 75 | mb(); | ||
| 32 | } | 76 | } |
| 33 | EXPORT_SYMBOL(memcpy_fromio); | 77 | EXPORT_SYMBOL(memcpy_fromio); |
| 34 | 78 | ||
| 35 | /* | 79 | /* |
| 36 | * Copy data from "real" memory space to IO memory space. | 80 | * Copy data from "real" memory space to IO memory space. |
| 37 | * This needs to be optimized. | ||
| 38 | */ | 81 | */ |
| 39 | void memcpy_toio(volatile void __iomem *to, const void *from, unsigned long count) | 82 | void memcpy_toio(volatile void __iomem *to, const void *from, unsigned long count) |
| 40 | { | 83 | { |
| 41 | const unsigned char *p = from; | 84 | if ((((u32)to | (u32)from) & 0x3) == 0) { |
| 42 | while (count) { | 85 | for ( ; count > 3; count -= 4) { |
| 43 | count--; | 86 | *(volatile u32 *)to = *(u32 *)from; |
| 44 | writeb(*p, to); | 87 | to += 4; |
| 45 | p++; | 88 | from += 4; |
| 46 | to++; | 89 | } |
| 47 | } | 90 | } |
| 91 | |||
| 92 | for (; count > 0; count--) { | ||
| 93 | *(volatile u8 *)to = *(u8 *)from; | ||
| 94 | to++; | ||
| 95 | from++; | ||
| 96 | } | ||
| 97 | |||
| 98 | mb(); | ||
| 48 | } | 99 | } |
| 49 | EXPORT_SYMBOL(memcpy_toio); | 100 | EXPORT_SYMBOL(memcpy_toio); |
| 50 | 101 | ||
| @@ -62,6 +113,8 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count) | |||
| 62 | } | 113 | } |
| 63 | EXPORT_SYMBOL(memset_io); | 114 | EXPORT_SYMBOL(memset_io); |
| 64 | 115 | ||
| 116 | #ifndef CONFIG_GENERIC_IOMAP | ||
| 117 | |||
| 65 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | 118 | void __iomem *ioport_map(unsigned long port, unsigned int nr) |
| 66 | { | 119 | { |
| 67 | void __iomem *ret; | 120 | void __iomem *ret; |
| @@ -79,3 +132,5 @@ void ioport_unmap(void __iomem *addr) | |||
| 79 | sh_mv.mv_ioport_unmap(addr); | 132 | sh_mv.mv_ioport_unmap(addr); |
| 80 | } | 133 | } |
| 81 | EXPORT_SYMBOL(ioport_unmap); | 134 | EXPORT_SYMBOL(ioport_unmap); |
| 135 | |||
| 136 | #endif /* CONFIG_GENERIC_IOMAP */ | ||
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c index 5a7f554d9ca1..4ff507239286 100644 --- a/arch/sh/kernel/io_generic.c +++ b/arch/sh/kernel/io_generic.c | |||
| @@ -73,35 +73,19 @@ u32 generic_inl_p(unsigned long port) | |||
| 73 | 73 | ||
| 74 | void generic_insb(unsigned long port, void *dst, unsigned long count) | 74 | void generic_insb(unsigned long port, void *dst, unsigned long count) |
| 75 | { | 75 | { |
| 76 | volatile u8 *port_addr; | 76 | __raw_readsb(__ioport_map(port, 1), dst, count); |
| 77 | u8 *buf = dst; | 77 | dummy_read(); |
| 78 | |||
| 79 | port_addr = (volatile u8 __force *)__ioport_map(port, 1); | ||
| 80 | while (count--) | ||
| 81 | *buf++ = *port_addr; | ||
| 82 | } | 78 | } |
| 83 | 79 | ||
| 84 | void generic_insw(unsigned long port, void *dst, unsigned long count) | 80 | void generic_insw(unsigned long port, void *dst, unsigned long count) |
| 85 | { | 81 | { |
| 86 | volatile u16 *port_addr; | 82 | __raw_readsw(__ioport_map(port, 2), dst, count); |
| 87 | u16 *buf = dst; | ||
| 88 | |||
| 89 | port_addr = (volatile u16 __force *)__ioport_map(port, 2); | ||
| 90 | while (count--) | ||
| 91 | *buf++ = *port_addr; | ||
| 92 | |||
| 93 | dummy_read(); | 83 | dummy_read(); |
| 94 | } | 84 | } |
| 95 | 85 | ||
| 96 | void generic_insl(unsigned long port, void *dst, unsigned long count) | 86 | void generic_insl(unsigned long port, void *dst, unsigned long count) |
| 97 | { | 87 | { |
| 98 | volatile u32 *port_addr; | 88 | __raw_readsl(__ioport_map(port, 4), dst, count); |
| 99 | u32 *buf = dst; | ||
| 100 | |||
| 101 | port_addr = (volatile u32 __force *)__ioport_map(port, 4); | ||
| 102 | while (count--) | ||
| 103 | *buf++ = *port_addr; | ||
| 104 | |||
| 105 | dummy_read(); | 89 | dummy_read(); |
| 106 | } | 90 | } |
| 107 | 91 | ||
| @@ -145,37 +129,19 @@ void generic_outl_p(u32 b, unsigned long port) | |||
| 145 | */ | 129 | */ |
| 146 | void generic_outsb(unsigned long port, const void *src, unsigned long count) | 130 | void generic_outsb(unsigned long port, const void *src, unsigned long count) |
| 147 | { | 131 | { |
| 148 | volatile u8 *port_addr; | 132 | __raw_writesb(__ioport_map(port, 1), src, count); |
| 149 | const u8 *buf = src; | 133 | dummy_read(); |
| 150 | |||
| 151 | port_addr = (volatile u8 __force *)__ioport_map(port, 1); | ||
| 152 | |||
| 153 | while (count--) | ||
| 154 | *port_addr = *buf++; | ||
| 155 | } | 134 | } |
| 156 | 135 | ||
| 157 | void generic_outsw(unsigned long port, const void *src, unsigned long count) | 136 | void generic_outsw(unsigned long port, const void *src, unsigned long count) |
| 158 | { | 137 | { |
| 159 | volatile u16 *port_addr; | 138 | __raw_writesw(__ioport_map(port, 2), src, count); |
| 160 | const u16 *buf = src; | ||
| 161 | |||
| 162 | port_addr = (volatile u16 __force *)__ioport_map(port, 2); | ||
| 163 | |||
| 164 | while (count--) | ||
| 165 | *port_addr = *buf++; | ||
| 166 | |||
| 167 | dummy_read(); | 139 | dummy_read(); |
| 168 | } | 140 | } |
| 169 | 141 | ||
| 170 | void generic_outsl(unsigned long port, const void *src, unsigned long count) | 142 | void generic_outsl(unsigned long port, const void *src, unsigned long count) |
| 171 | { | 143 | { |
| 172 | volatile u32 *port_addr; | 144 | __raw_writesl(__ioport_map(port, 4), src, count); |
| 173 | const u32 *buf = src; | ||
| 174 | |||
| 175 | port_addr = (volatile u32 __force *)__ioport_map(port, 4); | ||
| 176 | while (count--) | ||
| 177 | *port_addr = *buf++; | ||
| 178 | |||
| 179 | dummy_read(); | 145 | dummy_read(); |
| 180 | } | 146 | } |
| 181 | 147 | ||
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c index 77dfecb64373..69be603aa2d7 100644 --- a/arch/sh/kernel/io_trapped.c +++ b/arch/sh/kernel/io_trapped.c | |||
| @@ -112,14 +112,15 @@ void __iomem *match_trapped_io_handler(struct list_head *list, | |||
| 112 | struct trapped_io *tiop; | 112 | struct trapped_io *tiop; |
| 113 | struct resource *res; | 113 | struct resource *res; |
| 114 | int k, len; | 114 | int k, len; |
| 115 | unsigned long flags; | ||
| 115 | 116 | ||
| 116 | spin_lock_irq(&trapped_lock); | 117 | spin_lock_irqsave(&trapped_lock, flags); |
| 117 | list_for_each_entry(tiop, list, list) { | 118 | list_for_each_entry(tiop, list, list) { |
| 118 | voffs = 0; | 119 | voffs = 0; |
| 119 | for (k = 0; k < tiop->num_resources; k++) { | 120 | for (k = 0; k < tiop->num_resources; k++) { |
| 120 | res = tiop->resource + k; | 121 | res = tiop->resource + k; |
| 121 | if (res->start == offset) { | 122 | if (res->start == offset) { |
| 122 | spin_unlock_irq(&trapped_lock); | 123 | spin_unlock_irqrestore(&trapped_lock, flags); |
| 123 | return tiop->virt_base + voffs; | 124 | return tiop->virt_base + voffs; |
| 124 | } | 125 | } |
| 125 | 126 | ||
| @@ -127,7 +128,7 @@ void __iomem *match_trapped_io_handler(struct list_head *list, | |||
| 127 | voffs += roundup(len, PAGE_SIZE); | 128 | voffs += roundup(len, PAGE_SIZE); |
| 128 | } | 129 | } |
| 129 | } | 130 | } |
| 130 | spin_unlock_irq(&trapped_lock); | 131 | spin_unlock_irqrestore(&trapped_lock, flags); |
| 131 | return NULL; | 132 | return NULL; |
| 132 | } | 133 | } |
| 133 | EXPORT_SYMBOL_GPL(match_trapped_io_handler); | 134 | EXPORT_SYMBOL_GPL(match_trapped_io_handler); |
| @@ -283,7 +284,8 @@ int handle_trapped_io(struct pt_regs *regs, unsigned long address) | |||
| 283 | return 0; | 284 | return 0; |
| 284 | } | 285 | } |
| 285 | 286 | ||
| 286 | tmp = handle_unaligned_access(instruction, regs, &trapped_io_access); | 287 | tmp = handle_unaligned_access(instruction, regs, |
| 288 | &trapped_io_access, 1); | ||
| 287 | set_fs(oldfs); | 289 | set_fs(oldfs); |
| 288 | return tmp == 0; | 290 | return tmp == 0; |
| 289 | } | 291 | } |
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index 3d09062f4682..60f8af4497c7 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c | |||
| @@ -114,24 +114,7 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs) | |||
| 114 | #endif | 114 | #endif |
| 115 | 115 | ||
| 116 | irq_enter(); | 116 | irq_enter(); |
| 117 | 117 | irq = irq_demux(irq); | |
| 118 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | ||
| 119 | /* Debugging check for stack overflow: is there less than 1KB free? */ | ||
| 120 | { | ||
| 121 | long sp; | ||
| 122 | |||
| 123 | __asm__ __volatile__ ("and r15, %0" : | ||
| 124 | "=r" (sp) : "0" (THREAD_SIZE - 1)); | ||
| 125 | |||
| 126 | if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) { | ||
| 127 | printk("do_IRQ: stack overflow: %ld\n", | ||
| 128 | sp - sizeof(struct thread_info)); | ||
| 129 | dump_stack(); | ||
| 130 | } | ||
| 131 | } | ||
| 132 | #endif | ||
| 133 | |||
| 134 | irq = irq_demux(intc_evt2irq(irq)); | ||
| 135 | 118 | ||
| 136 | #ifdef CONFIG_IRQSTACKS | 119 | #ifdef CONFIG_IRQSTACKS |
| 137 | curctx = (union irq_ctx *)current_thread_info(); | 120 | curctx = (union irq_ctx *)current_thread_info(); |
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c index 305aad742aec..3e532d0d4a5c 100644 --- a/arch/sh/kernel/kgdb.c +++ b/arch/sh/kernel/kgdb.c | |||
| @@ -15,8 +15,6 @@ | |||
| 15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
| 16 | #include <asm/cacheflush.h> | 16 | #include <asm/cacheflush.h> |
| 17 | 17 | ||
| 18 | char in_nmi = 0; /* Set during NMI to prevent re-entry */ | ||
| 19 | |||
| 20 | /* Macros for single step instruction identification */ | 18 | /* Macros for single step instruction identification */ |
| 21 | #define OPCODE_BT(op) (((op) & 0xff00) == 0x8900) | 19 | #define OPCODE_BT(op) (((op) & 0xff00) == 0x8900) |
| 22 | #define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00) | 20 | #define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00) |
| @@ -195,8 +193,6 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) | |||
| 195 | regs->gbr = gdb_regs[GDB_GBR]; | 193 | regs->gbr = gdb_regs[GDB_GBR]; |
| 196 | regs->mach = gdb_regs[GDB_MACH]; | 194 | regs->mach = gdb_regs[GDB_MACH]; |
| 197 | regs->macl = gdb_regs[GDB_MACL]; | 195 | regs->macl = gdb_regs[GDB_MACL]; |
| 198 | |||
| 199 | __asm__ __volatile__ ("ldc %0, vbr" : : "r" (gdb_regs[GDB_VBR])); | ||
| 200 | } | 196 | } |
| 201 | 197 | ||
| 202 | void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) | 198 | void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) |
diff --git a/arch/sh/kernel/localtimer.c b/arch/sh/kernel/localtimer.c index 96e8eaea1e62..0b04e7d4a9b9 100644 --- a/arch/sh/kernel/localtimer.c +++ b/arch/sh/kernel/localtimer.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/jiffies.h> | 22 | #include <linux/jiffies.h> |
| 23 | #include <linux/percpu.h> | 23 | #include <linux/percpu.h> |
| 24 | #include <linux/clockchips.h> | 24 | #include <linux/clockchips.h> |
| 25 | #include <linux/hardirq.h> | ||
| 25 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
| 26 | 27 | ||
| 27 | static DEFINE_PER_CPU(struct clock_event_device, local_clockevent); | 28 | static DEFINE_PER_CPU(struct clock_event_device, local_clockevent); |
| @@ -33,7 +34,9 @@ void local_timer_interrupt(void) | |||
| 33 | { | 34 | { |
| 34 | struct clock_event_device *clk = &__get_cpu_var(local_clockevent); | 35 | struct clock_event_device *clk = &__get_cpu_var(local_clockevent); |
| 35 | 36 | ||
| 37 | irq_enter(); | ||
| 36 | clk->event_handler(clk); | 38 | clk->event_handler(clk); |
| 39 | irq_exit(); | ||
| 37 | } | 40 | } |
| 38 | 41 | ||
| 39 | static void dummy_timer_set_mode(enum clock_event_mode mode, | 42 | static void dummy_timer_set_mode(enum clock_event_mode mode, |
| @@ -46,8 +49,10 @@ void __cpuinit local_timer_setup(unsigned int cpu) | |||
| 46 | struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); | 49 | struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); |
| 47 | 50 | ||
| 48 | clk->name = "dummy_timer"; | 51 | clk->name = "dummy_timer"; |
| 49 | clk->features = CLOCK_EVT_FEAT_DUMMY; | 52 | clk->features = CLOCK_EVT_FEAT_ONESHOT | |
| 50 | clk->rating = 200; | 53 | CLOCK_EVT_FEAT_PERIODIC | |
| 54 | CLOCK_EVT_FEAT_DUMMY; | ||
| 55 | clk->rating = 400; | ||
| 51 | clk->mult = 1; | 56 | clk->mult = 1; |
| 52 | clk->set_mode = dummy_timer_set_mode; | 57 | clk->set_mode = dummy_timer_set_mode; |
| 53 | clk->broadcast = smp_timer_broadcast; | 58 | clk->broadcast = smp_timer_broadcast; |
diff --git a/arch/sh/kernel/nmi_debug.c b/arch/sh/kernel/nmi_debug.c new file mode 100644 index 000000000000..ff0abbd1e652 --- /dev/null +++ b/arch/sh/kernel/nmi_debug.c | |||
| @@ -0,0 +1,77 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2007 Atmel Corporation | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | */ | ||
| 8 | #include <linux/delay.h> | ||
| 9 | #include <linux/kdebug.h> | ||
| 10 | #include <linux/notifier.h> | ||
| 11 | #include <linux/sched.h> | ||
| 12 | #include <linux/hardirq.h> | ||
| 13 | |||
| 14 | enum nmi_action { | ||
| 15 | NMI_SHOW_STATE = 1 << 0, | ||
| 16 | NMI_SHOW_REGS = 1 << 1, | ||
| 17 | NMI_DIE = 1 << 2, | ||
| 18 | NMI_DEBOUNCE = 1 << 3, | ||
| 19 | }; | ||
| 20 | |||
| 21 | static unsigned long nmi_actions; | ||
| 22 | |||
| 23 | static int nmi_debug_notify(struct notifier_block *self, | ||
| 24 | unsigned long val, void *data) | ||
| 25 | { | ||
| 26 | struct die_args *args = data; | ||
| 27 | |||
| 28 | if (likely(val != DIE_NMI)) | ||
| 29 | return NOTIFY_DONE; | ||
| 30 | |||
| 31 | if (nmi_actions & NMI_SHOW_STATE) | ||
| 32 | show_state(); | ||
| 33 | if (nmi_actions & NMI_SHOW_REGS) | ||
| 34 | show_regs(args->regs); | ||
| 35 | if (nmi_actions & NMI_DEBOUNCE) | ||
| 36 | mdelay(10); | ||
| 37 | if (nmi_actions & NMI_DIE) | ||
| 38 | return NOTIFY_BAD; | ||
| 39 | |||
| 40 | return NOTIFY_OK; | ||
| 41 | } | ||
| 42 | |||
| 43 | static struct notifier_block nmi_debug_nb = { | ||
| 44 | .notifier_call = nmi_debug_notify, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static int __init nmi_debug_setup(char *str) | ||
| 48 | { | ||
| 49 | char *p, *sep; | ||
| 50 | |||
| 51 | register_die_notifier(&nmi_debug_nb); | ||
| 52 | |||
| 53 | if (*str != '=') | ||
| 54 | return 0; | ||
| 55 | |||
| 56 | for (p = str + 1; *p; p = sep + 1) { | ||
| 57 | sep = strchr(p, ','); | ||
| 58 | if (sep) | ||
| 59 | *sep = 0; | ||
| 60 | if (strcmp(p, "state") == 0) | ||
| 61 | nmi_actions |= NMI_SHOW_STATE; | ||
| 62 | else if (strcmp(p, "regs") == 0) | ||
| 63 | nmi_actions |= NMI_SHOW_REGS; | ||
| 64 | else if (strcmp(p, "debounce") == 0) | ||
| 65 | nmi_actions |= NMI_DEBOUNCE; | ||
| 66 | else if (strcmp(p, "die") == 0) | ||
| 67 | nmi_actions |= NMI_DIE; | ||
| 68 | else | ||
| 69 | printk(KERN_WARNING "NMI: Unrecognized action `%s'\n", | ||
| 70 | p); | ||
| 71 | if (!sep) | ||
| 72 | break; | ||
| 73 | } | ||
| 74 | |||
| 75 | return 0; | ||
| 76 | } | ||
| 77 | __setup("nmi_debug", nmi_debug_setup); | ||
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c index 92d7740faab1..0673c4746be3 100644 --- a/arch/sh/kernel/process_32.c +++ b/arch/sh/kernel/process_32.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | #include <linux/tick.h> | 23 | #include <linux/tick.h> |
| 24 | #include <linux/reboot.h> | 24 | #include <linux/reboot.h> |
| 25 | #include <linux/fs.h> | 25 | #include <linux/fs.h> |
| 26 | #include <linux/ftrace.h> | ||
| 26 | #include <linux/preempt.h> | 27 | #include <linux/preempt.h> |
| 27 | #include <asm/uaccess.h> | 28 | #include <asm/uaccess.h> |
| 28 | #include <asm/mmu_context.h> | 29 | #include <asm/mmu_context.h> |
| @@ -31,15 +32,35 @@ | |||
| 31 | #include <asm/ubc.h> | 32 | #include <asm/ubc.h> |
| 32 | #include <asm/fpu.h> | 33 | #include <asm/fpu.h> |
| 33 | #include <asm/syscalls.h> | 34 | #include <asm/syscalls.h> |
| 35 | #include <asm/watchdog.h> | ||
| 34 | 36 | ||
| 35 | int ubc_usercnt = 0; | 37 | int ubc_usercnt = 0; |
| 36 | 38 | ||
| 39 | #ifdef CONFIG_32BIT | ||
| 40 | static void watchdog_trigger_immediate(void) | ||
| 41 | { | ||
| 42 | sh_wdt_write_cnt(0xFF); | ||
| 43 | sh_wdt_write_csr(0xC2); | ||
| 44 | } | ||
| 45 | |||
| 46 | void machine_restart(char * __unused) | ||
| 47 | { | ||
| 48 | local_irq_disable(); | ||
| 49 | |||
| 50 | /* Use watchdog timer to trigger reset */ | ||
| 51 | watchdog_trigger_immediate(); | ||
| 52 | |||
| 53 | while (1) | ||
| 54 | cpu_sleep(); | ||
| 55 | } | ||
| 56 | #else | ||
| 37 | void machine_restart(char * __unused) | 57 | void machine_restart(char * __unused) |
| 38 | { | 58 | { |
| 39 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ | 59 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ |
| 40 | asm volatile("ldc %0, sr\n\t" | 60 | asm volatile("ldc %0, sr\n\t" |
| 41 | "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); | 61 | "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); |
| 42 | } | 62 | } |
| 63 | #endif | ||
| 43 | 64 | ||
| 44 | void machine_halt(void) | 65 | void machine_halt(void) |
| 45 | { | 66 | { |
| @@ -264,8 +285,8 @@ static void ubc_set_tracing(int asid, unsigned long pc) | |||
| 264 | * switch_to(x,y) should switch tasks from x to y. | 285 | * switch_to(x,y) should switch tasks from x to y. |
| 265 | * | 286 | * |
| 266 | */ | 287 | */ |
| 267 | struct task_struct *__switch_to(struct task_struct *prev, | 288 | __notrace_funcgraph struct task_struct * |
| 268 | struct task_struct *next) | 289 | __switch_to(struct task_struct *prev, struct task_struct *next) |
| 269 | { | 290 | { |
| 270 | #if defined(CONFIG_SH_FPU) | 291 | #if defined(CONFIG_SH_FPU) |
| 271 | unlazy_fpu(prev, task_pt_regs(prev)); | 292 | unlazy_fpu(prev, task_pt_regs(prev)); |
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c index 24de74214940..1192398ef582 100644 --- a/arch/sh/kernel/process_64.c +++ b/arch/sh/kernel/process_64.c | |||
| @@ -425,7 +425,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
| 425 | struct task_struct *p, struct pt_regs *regs) | 425 | struct task_struct *p, struct pt_regs *regs) |
| 426 | { | 426 | { |
| 427 | struct pt_regs *childregs; | 427 | struct pt_regs *childregs; |
| 428 | unsigned long long se; /* Sign extension */ | ||
| 429 | 428 | ||
| 430 | #ifdef CONFIG_SH_FPU | 429 | #ifdef CONFIG_SH_FPU |
| 431 | if(last_task_used_math == current) { | 430 | if(last_task_used_math == current) { |
| @@ -441,11 +440,19 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
| 441 | 440 | ||
| 442 | *childregs = *regs; | 441 | *childregs = *regs; |
| 443 | 442 | ||
| 443 | /* | ||
| 444 | * Sign extend the edited stack. | ||
| 445 | * Note that thread.pc and thread.pc will stay | ||
| 446 | * 32-bit wide and context switch must take care | ||
| 447 | * of NEFF sign extension. | ||
| 448 | */ | ||
| 444 | if (user_mode(regs)) { | 449 | if (user_mode(regs)) { |
| 445 | childregs->regs[15] = usp; | 450 | childregs->regs[15] = neff_sign_extend(usp); |
| 446 | p->thread.uregs = childregs; | 451 | p->thread.uregs = childregs; |
| 447 | } else { | 452 | } else { |
| 448 | childregs->regs[15] = (unsigned long)task_stack_page(p) + THREAD_SIZE; | 453 | childregs->regs[15] = |
| 454 | neff_sign_extend((unsigned long)task_stack_page(p) + | ||
| 455 | THREAD_SIZE); | ||
| 449 | } | 456 | } |
| 450 | 457 | ||
| 451 | childregs->regs[9] = 0; /* Set return value for child */ | 458 | childregs->regs[9] = 0; /* Set return value for child */ |
| @@ -454,17 +461,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
| 454 | p->thread.sp = (unsigned long) childregs; | 461 | p->thread.sp = (unsigned long) childregs; |
| 455 | p->thread.pc = (unsigned long) ret_from_fork; | 462 | p->thread.pc = (unsigned long) ret_from_fork; |
| 456 | 463 | ||
| 457 | /* | ||
| 458 | * Sign extend the edited stack. | ||
| 459 | * Note that thread.pc and thread.pc will stay | ||
| 460 | * 32-bit wide and context switch must take care | ||
| 461 | * of NEFF sign extension. | ||
| 462 | */ | ||
| 463 | |||
| 464 | se = childregs->regs[15]; | ||
| 465 | se = (se & NEFF_SIGN) ? (se | NEFF_MASK) : se; | ||
| 466 | childregs->regs[15] = se; | ||
| 467 | |||
| 468 | return 0; | 464 | return 0; |
| 469 | } | 465 | } |
| 470 | 466 | ||
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index 3392e835a374..9be35f348093 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c | |||
| @@ -34,6 +34,9 @@ | |||
| 34 | #include <asm/syscalls.h> | 34 | #include <asm/syscalls.h> |
| 35 | #include <asm/fpu.h> | 35 | #include <asm/fpu.h> |
| 36 | 36 | ||
| 37 | #define CREATE_TRACE_POINTS | ||
| 38 | #include <trace/events/syscalls.h> | ||
| 39 | |||
| 37 | /* | 40 | /* |
| 38 | * This routine will get a word off of the process kernel stack. | 41 | * This routine will get a word off of the process kernel stack. |
| 39 | */ | 42 | */ |
| @@ -459,6 +462,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs) | |||
| 459 | */ | 462 | */ |
| 460 | ret = -1L; | 463 | ret = -1L; |
| 461 | 464 | ||
| 465 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) | ||
| 466 | trace_sys_enter(regs, regs->regs[0]); | ||
| 467 | |||
| 462 | if (unlikely(current->audit_context)) | 468 | if (unlikely(current->audit_context)) |
| 463 | audit_syscall_entry(audit_arch(), regs->regs[3], | 469 | audit_syscall_entry(audit_arch(), regs->regs[3], |
| 464 | regs->regs[4], regs->regs[5], | 470 | regs->regs[4], regs->regs[5], |
| @@ -475,6 +481,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) | |||
| 475 | audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]), | 481 | audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]), |
| 476 | regs->regs[0]); | 482 | regs->regs[0]); |
| 477 | 483 | ||
| 484 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) | ||
| 485 | trace_sys_exit(regs, regs->regs[0]); | ||
| 486 | |||
| 478 | step = test_thread_flag(TIF_SINGLESTEP); | 487 | step = test_thread_flag(TIF_SINGLESTEP); |
| 479 | if (step || test_thread_flag(TIF_SYSCALL_TRACE)) | 488 | if (step || test_thread_flag(TIF_SYSCALL_TRACE)) |
| 480 | tracehook_report_syscall_exit(regs, step); | 489 | tracehook_report_syscall_exit(regs, step); |
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c index 695097438f02..952da83903da 100644 --- a/arch/sh/kernel/ptrace_64.c +++ b/arch/sh/kernel/ptrace_64.c | |||
| @@ -40,6 +40,9 @@ | |||
| 40 | #include <asm/syscalls.h> | 40 | #include <asm/syscalls.h> |
| 41 | #include <asm/fpu.h> | 41 | #include <asm/fpu.h> |
| 42 | 42 | ||
| 43 | #define CREATE_TRACE_POINTS | ||
| 44 | #include <trace/events/syscalls.h> | ||
| 45 | |||
| 43 | /* This mask defines the bits of the SR which the user is not allowed to | 46 | /* This mask defines the bits of the SR which the user is not allowed to |
| 44 | change, which are everything except S, Q, M, PR, SZ, FR. */ | 47 | change, which are everything except S, Q, M, PR, SZ, FR. */ |
| 45 | #define SR_MASK (0xffff8cfd) | 48 | #define SR_MASK (0xffff8cfd) |
| @@ -438,6 +441,9 @@ asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs) | |||
| 438 | */ | 441 | */ |
| 439 | ret = -1LL; | 442 | ret = -1LL; |
| 440 | 443 | ||
| 444 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) | ||
| 445 | trace_sys_enter(regs, regs->regs[9]); | ||
| 446 | |||
| 441 | if (unlikely(current->audit_context)) | 447 | if (unlikely(current->audit_context)) |
| 442 | audit_syscall_entry(audit_arch(), regs->regs[1], | 448 | audit_syscall_entry(audit_arch(), regs->regs[1], |
| 443 | regs->regs[2], regs->regs[3], | 449 | regs->regs[2], regs->regs[3], |
| @@ -452,6 +458,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs) | |||
| 452 | audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]), | 458 | audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]), |
| 453 | regs->regs[9]); | 459 | regs->regs[9]); |
| 454 | 460 | ||
| 461 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) | ||
| 462 | trace_sys_exit(regs, regs->regs[9]); | ||
| 463 | |||
| 455 | if (test_thread_flag(TIF_SYSCALL_TRACE)) | 464 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
| 456 | tracehook_report_syscall_exit(regs, 0); | 465 | tracehook_report_syscall_exit(regs, 0); |
| 457 | } | 466 | } |
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index dd38338553ef..f9d44f8e0df6 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <linux/clk.h> | 30 | #include <linux/clk.h> |
| 31 | #include <linux/delay.h> | 31 | #include <linux/delay.h> |
| 32 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
| 33 | #include <linux/lmb.h> | ||
| 33 | #include <asm/uaccess.h> | 34 | #include <asm/uaccess.h> |
| 34 | #include <asm/io.h> | 35 | #include <asm/io.h> |
| 35 | #include <asm/page.h> | 36 | #include <asm/page.h> |
| @@ -48,6 +49,7 @@ | |||
| 48 | struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = { | 49 | struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = { |
| 49 | [0] = { | 50 | [0] = { |
| 50 | .type = CPU_SH_NONE, | 51 | .type = CPU_SH_NONE, |
| 52 | .family = CPU_FAMILY_UNKNOWN, | ||
| 51 | .loops_per_jiffy = 10000000, | 53 | .loops_per_jiffy = 10000000, |
| 52 | }, | 54 | }, |
| 53 | }; | 55 | }; |
| @@ -233,39 +235,45 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn, | |||
| 233 | void __init setup_bootmem_allocator(unsigned long free_pfn) | 235 | void __init setup_bootmem_allocator(unsigned long free_pfn) |
| 234 | { | 236 | { |
| 235 | unsigned long bootmap_size; | 237 | unsigned long bootmap_size; |
| 238 | unsigned long bootmap_pages, bootmem_paddr; | ||
| 239 | u64 total_pages = (lmb_end_of_DRAM() - __MEMORY_START) >> PAGE_SHIFT; | ||
| 240 | int i; | ||
| 241 | |||
| 242 | bootmap_pages = bootmem_bootmap_pages(total_pages); | ||
| 243 | |||
| 244 | bootmem_paddr = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE); | ||
| 236 | 245 | ||
| 237 | /* | 246 | /* |
| 238 | * Find a proper area for the bootmem bitmap. After this | 247 | * Find a proper area for the bootmem bitmap. After this |
| 239 | * bootstrap step all allocations (until the page allocator | 248 | * bootstrap step all allocations (until the page allocator |
| 240 | * is intact) must be done via bootmem_alloc(). | 249 | * is intact) must be done via bootmem_alloc(). |
| 241 | */ | 250 | */ |
| 242 | bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn, | 251 | bootmap_size = init_bootmem_node(NODE_DATA(0), |
| 252 | bootmem_paddr >> PAGE_SHIFT, | ||
| 243 | min_low_pfn, max_low_pfn); | 253 | min_low_pfn, max_low_pfn); |
| 244 | 254 | ||
| 245 | __add_active_range(0, min_low_pfn, max_low_pfn); | 255 | /* Add active regions with valid PFNs. */ |
| 246 | register_bootmem_low_pages(); | 256 | for (i = 0; i < lmb.memory.cnt; i++) { |
| 247 | 257 | unsigned long start_pfn, end_pfn; | |
| 248 | node_set_online(0); | 258 | start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT; |
| 259 | end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i); | ||
| 260 | __add_active_range(0, start_pfn, end_pfn); | ||
| 261 | } | ||
| 249 | 262 | ||
| 250 | /* | 263 | /* |
| 251 | * Reserve the kernel text and | 264 | * Add all physical memory to the bootmem map and mark each |
| 252 | * Reserve the bootmem bitmap. We do this in two steps (first step | 265 | * area as present. |
| 253 | * was init_bootmem()), because this catches the (definitely buggy) | ||
| 254 | * case of us accidentally initializing the bootmem allocator with | ||
| 255 | * an invalid RAM area. | ||
| 256 | */ | 266 | */ |
| 257 | reserve_bootmem(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET, | 267 | register_bootmem_low_pages(); |
| 258 | (PFN_PHYS(free_pfn) + bootmap_size + PAGE_SIZE - 1) - | ||
| 259 | (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET), | ||
| 260 | BOOTMEM_DEFAULT); | ||
| 261 | 268 | ||
| 262 | /* | 269 | /* Reserve the sections we're already using. */ |
| 263 | * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET. | 270 | for (i = 0; i < lmb.reserved.cnt; i++) |
| 264 | */ | 271 | reserve_bootmem(lmb.reserved.region[i].base, |
| 265 | if (CONFIG_ZERO_PAGE_OFFSET != 0) | 272 | lmb_size_bytes(&lmb.reserved, i), |
| 266 | reserve_bootmem(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET, | ||
| 267 | BOOTMEM_DEFAULT); | 273 | BOOTMEM_DEFAULT); |
| 268 | 274 | ||
| 275 | node_set_online(0); | ||
| 276 | |||
| 269 | sparse_memory_present_with_active_regions(0); | 277 | sparse_memory_present_with_active_regions(0); |
| 270 | 278 | ||
| 271 | #ifdef CONFIG_BLK_DEV_INITRD | 279 | #ifdef CONFIG_BLK_DEV_INITRD |
| @@ -296,12 +304,37 @@ void __init setup_bootmem_allocator(unsigned long free_pfn) | |||
| 296 | static void __init setup_memory(void) | 304 | static void __init setup_memory(void) |
| 297 | { | 305 | { |
| 298 | unsigned long start_pfn; | 306 | unsigned long start_pfn; |
| 307 | u64 base = min_low_pfn << PAGE_SHIFT; | ||
| 308 | u64 size = (max_low_pfn << PAGE_SHIFT) - base; | ||
| 299 | 309 | ||
| 300 | /* | 310 | /* |
| 301 | * Partially used pages are not usable - thus | 311 | * Partially used pages are not usable - thus |
| 302 | * we are rounding upwards: | 312 | * we are rounding upwards: |
| 303 | */ | 313 | */ |
| 304 | start_pfn = PFN_UP(__pa(_end)); | 314 | start_pfn = PFN_UP(__pa(_end)); |
| 315 | |||
| 316 | lmb_add(base, size); | ||
| 317 | |||
| 318 | /* | ||
| 319 | * Reserve the kernel text and | ||
| 320 | * Reserve the bootmem bitmap. We do this in two steps (first step | ||
| 321 | * was init_bootmem()), because this catches the (definitely buggy) | ||
| 322 | * case of us accidentally initializing the bootmem allocator with | ||
| 323 | * an invalid RAM area. | ||
| 324 | */ | ||
| 325 | lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET, | ||
| 326 | (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) - | ||
| 327 | (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET)); | ||
| 328 | |||
| 329 | /* | ||
| 330 | * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET. | ||
| 331 | */ | ||
| 332 | if (CONFIG_ZERO_PAGE_OFFSET != 0) | ||
| 333 | lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET); | ||
| 334 | |||
| 335 | lmb_analyze(); | ||
| 336 | lmb_dump_all(); | ||
| 337 | |||
| 305 | setup_bootmem_allocator(start_pfn); | 338 | setup_bootmem_allocator(start_pfn); |
| 306 | } | 339 | } |
| 307 | #else | 340 | #else |
| @@ -372,10 +405,14 @@ void __init setup_arch(char **cmdline_p) | |||
| 372 | if (!memory_end) | 405 | if (!memory_end) |
| 373 | memory_end = memory_start + __MEMORY_SIZE; | 406 | memory_end = memory_start + __MEMORY_SIZE; |
| 374 | 407 | ||
| 375 | #ifdef CONFIG_CMDLINE_BOOL | 408 | #ifdef CONFIG_CMDLINE_OVERWRITE |
| 376 | strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); | 409 | strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); |
| 377 | #else | 410 | #else |
| 378 | strlcpy(command_line, COMMAND_LINE, sizeof(command_line)); | 411 | strlcpy(command_line, COMMAND_LINE, sizeof(command_line)); |
| 412 | #ifdef CONFIG_CMDLINE_EXTEND | ||
| 413 | strlcat(command_line, " ", sizeof(command_line)); | ||
| 414 | strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line)); | ||
| 415 | #endif | ||
| 379 | #endif | 416 | #endif |
| 380 | 417 | ||
| 381 | /* Save unparsed command line copy for /proc/cmdline */ | 418 | /* Save unparsed command line copy for /proc/cmdline */ |
| @@ -402,6 +439,7 @@ void __init setup_arch(char **cmdline_p) | |||
| 402 | nodes_clear(node_online_map); | 439 | nodes_clear(node_online_map); |
| 403 | 440 | ||
| 404 | /* Setup bootmem with available RAM */ | 441 | /* Setup bootmem with available RAM */ |
| 442 | lmb_init(); | ||
| 405 | setup_memory(); | 443 | setup_memory(); |
| 406 | sparse_init(); | 444 | sparse_init(); |
| 407 | 445 | ||
| @@ -448,7 +486,7 @@ static const char *cpu_name[] = { | |||
| 448 | [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", | 486 | [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", |
| 449 | [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", | 487 | [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", |
| 450 | [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", | 488 | [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", |
| 451 | [CPU_SH7786] = "SH7786", | 489 | [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757", |
| 452 | [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", | 490 | [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", |
| 453 | [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", | 491 | [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", |
| 454 | [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", | 492 | [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", |
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c index fcc5de31f83b..8dbe26b17c44 100644 --- a/arch/sh/kernel/sh_ksyms_32.c +++ b/arch/sh/kernel/sh_ksyms_32.c | |||
| @@ -101,20 +101,14 @@ EXPORT_SYMBOL(flush_cache_range); | |||
| 101 | EXPORT_SYMBOL(flush_dcache_page); | 101 | EXPORT_SYMBOL(flush_dcache_page); |
| 102 | #endif | 102 | #endif |
| 103 | 103 | ||
| 104 | #if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \ | 104 | #ifdef CONFIG_MCOUNT |
| 105 | (defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)) | 105 | DECLARE_EXPORT(mcount); |
| 106 | EXPORT_SYMBOL(clear_user_page); | ||
| 107 | #endif | ||
| 108 | |||
| 109 | #ifdef CONFIG_FUNCTION_TRACER | ||
| 110 | EXPORT_SYMBOL(mcount); | ||
| 111 | #endif | 106 | #endif |
| 112 | EXPORT_SYMBOL(csum_partial); | 107 | EXPORT_SYMBOL(csum_partial); |
| 113 | EXPORT_SYMBOL(csum_partial_copy_generic); | 108 | EXPORT_SYMBOL(csum_partial_copy_generic); |
| 114 | #ifdef CONFIG_IPV6 | 109 | #ifdef CONFIG_IPV6 |
| 115 | EXPORT_SYMBOL(csum_ipv6_magic); | 110 | EXPORT_SYMBOL(csum_ipv6_magic); |
| 116 | #endif | 111 | #endif |
| 117 | EXPORT_SYMBOL(clear_page); | ||
| 118 | EXPORT_SYMBOL(copy_page); | 112 | EXPORT_SYMBOL(copy_page); |
| 119 | EXPORT_SYMBOL(__clear_user); | 113 | EXPORT_SYMBOL(__clear_user); |
| 120 | EXPORT_SYMBOL(_ebss); | 114 | EXPORT_SYMBOL(_ebss); |
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c index f5bd156ea504..d008e17eb257 100644 --- a/arch/sh/kernel/sh_ksyms_64.c +++ b/arch/sh/kernel/sh_ksyms_64.c | |||
| @@ -30,14 +30,6 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); | |||
| 30 | EXPORT_SYMBOL(dump_fpu); | 30 | EXPORT_SYMBOL(dump_fpu); |
| 31 | EXPORT_SYMBOL(kernel_thread); | 31 | EXPORT_SYMBOL(kernel_thread); |
| 32 | 32 | ||
| 33 | #if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) | ||
| 34 | EXPORT_SYMBOL(clear_user_page); | ||
| 35 | #endif | ||
| 36 | |||
| 37 | #ifndef CONFIG_CACHE_OFF | ||
| 38 | EXPORT_SYMBOL(flush_dcache_page); | ||
| 39 | #endif | ||
| 40 | |||
| 41 | #ifdef CONFIG_VT | 33 | #ifdef CONFIG_VT |
| 42 | EXPORT_SYMBOL(screen_info); | 34 | EXPORT_SYMBOL(screen_info); |
| 43 | #endif | 35 | #endif |
| @@ -52,7 +44,6 @@ EXPORT_SYMBOL(__get_user_asm_l); | |||
| 52 | EXPORT_SYMBOL(__get_user_asm_q); | 44 | EXPORT_SYMBOL(__get_user_asm_q); |
| 53 | EXPORT_SYMBOL(__strnlen_user); | 45 | EXPORT_SYMBOL(__strnlen_user); |
| 54 | EXPORT_SYMBOL(__strncpy_from_user); | 46 | EXPORT_SYMBOL(__strncpy_from_user); |
| 55 | EXPORT_SYMBOL(clear_page); | ||
| 56 | EXPORT_SYMBOL(__clear_user); | 47 | EXPORT_SYMBOL(__clear_user); |
| 57 | EXPORT_SYMBOL(copy_page); | 48 | EXPORT_SYMBOL(copy_page); |
| 58 | EXPORT_SYMBOL(__copy_user); | 49 | EXPORT_SYMBOL(__copy_user); |
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c index 04a21883f327..6729703547a1 100644 --- a/arch/sh/kernel/signal_32.c +++ b/arch/sh/kernel/signal_32.c | |||
| @@ -41,6 +41,16 @@ struct fdpic_func_descriptor { | |||
| 41 | }; | 41 | }; |
| 42 | 42 | ||
| 43 | /* | 43 | /* |
| 44 | * The following define adds a 64 byte gap between the signal | ||
| 45 | * stack frame and previous contents of the stack. This allows | ||
| 46 | * frame unwinding in a function epilogue but only if a frame | ||
| 47 | * pointer is used in the function. This is necessary because | ||
| 48 | * current gcc compilers (<4.3) do not generate unwind info on | ||
| 49 | * SH for function epilogues. | ||
| 50 | */ | ||
| 51 | #define UNWINDGUARD 64 | ||
| 52 | |||
| 53 | /* | ||
| 44 | * Atomically swap in the new signal mask, and wait for a signal. | 54 | * Atomically swap in the new signal mask, and wait for a signal. |
| 45 | */ | 55 | */ |
| 46 | asmlinkage int | 56 | asmlinkage int |
| @@ -327,7 +337,7 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) | |||
| 327 | sp = current->sas_ss_sp + current->sas_ss_size; | 337 | sp = current->sas_ss_sp + current->sas_ss_size; |
| 328 | } | 338 | } |
| 329 | 339 | ||
| 330 | return (void __user *)((sp - frame_size) & -8ul); | 340 | return (void __user *)((sp - (frame_size+UNWINDGUARD)) & -8ul); |
| 331 | } | 341 | } |
| 332 | 342 | ||
| 333 | /* These symbols are defined with the addresses in the vsyscall page. | 343 | /* These symbols are defined with the addresses in the vsyscall page. |
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c index 9e5c9b1d7e98..74793c80a57a 100644 --- a/arch/sh/kernel/signal_64.c +++ b/arch/sh/kernel/signal_64.c | |||
| @@ -561,13 +561,11 @@ static int setup_frame(int sig, struct k_sigaction *ka, | |||
| 561 | /* Set up to return from userspace. If provided, use a stub | 561 | /* Set up to return from userspace. If provided, use a stub |
| 562 | already in userspace. */ | 562 | already in userspace. */ |
| 563 | if (ka->sa.sa_flags & SA_RESTORER) { | 563 | if (ka->sa.sa_flags & SA_RESTORER) { |
| 564 | DEREF_REG_PR = (unsigned long) ka->sa.sa_restorer | 0x1; | ||
| 565 | |||
| 566 | /* | 564 | /* |
| 567 | * On SH5 all edited pointers are subject to NEFF | 565 | * On SH5 all edited pointers are subject to NEFF |
| 568 | */ | 566 | */ |
| 569 | DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ? | 567 | DEREF_REG_PR = neff_sign_extend((unsigned long) |
| 570 | (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR; | 568 | ka->sa.sa_restorer | 0x1); |
| 571 | } else { | 569 | } else { |
| 572 | /* | 570 | /* |
| 573 | * Different approach on SH5. | 571 | * Different approach on SH5. |
| @@ -580,9 +578,8 @@ static int setup_frame(int sig, struct k_sigaction *ka, | |||
| 580 | * . being code, linker turns ShMedia bit on, always | 578 | * . being code, linker turns ShMedia bit on, always |
| 581 | * dereference index -1. | 579 | * dereference index -1. |
| 582 | */ | 580 | */ |
| 583 | DEREF_REG_PR = (unsigned long) frame->retcode | 0x01; | 581 | DEREF_REG_PR = neff_sign_extend((unsigned long) |
| 584 | DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ? | 582 | frame->retcode | 0x01); |
| 585 | (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR; | ||
| 586 | 583 | ||
| 587 | if (__copy_to_user(frame->retcode, | 584 | if (__copy_to_user(frame->retcode, |
| 588 | (void *)((unsigned long)sa_default_restorer & (~1)), 16) != 0) | 585 | (void *)((unsigned long)sa_default_restorer & (~1)), 16) != 0) |
| @@ -596,9 +593,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, | |||
| 596 | * Set up registers for signal handler. | 593 | * Set up registers for signal handler. |
| 597 | * All edited pointers are subject to NEFF. | 594 | * All edited pointers are subject to NEFF. |
| 598 | */ | 595 | */ |
| 599 | regs->regs[REG_SP] = (unsigned long) frame; | 596 | regs->regs[REG_SP] = neff_sign_extend((unsigned long)frame); |
| 600 | regs->regs[REG_SP] = (regs->regs[REG_SP] & NEFF_SIGN) ? | ||
| 601 | (regs->regs[REG_SP] | NEFF_MASK) : regs->regs[REG_SP]; | ||
| 602 | regs->regs[REG_ARG1] = signal; /* Arg for signal handler */ | 597 | regs->regs[REG_ARG1] = signal; /* Arg for signal handler */ |
| 603 | 598 | ||
| 604 | /* FIXME: | 599 | /* FIXME: |
| @@ -613,8 +608,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, | |||
| 613 | regs->regs[REG_ARG2] = (unsigned long long)(unsigned long)(signed long)&frame->sc; | 608 | regs->regs[REG_ARG2] = (unsigned long long)(unsigned long)(signed long)&frame->sc; |
| 614 | regs->regs[REG_ARG3] = (unsigned long long)(unsigned long)(signed long)&frame->sc; | 609 | regs->regs[REG_ARG3] = (unsigned long long)(unsigned long)(signed long)&frame->sc; |
| 615 | 610 | ||
| 616 | regs->pc = (unsigned long) ka->sa.sa_handler; | 611 | regs->pc = neff_sign_extend((unsigned long)ka->sa.sa_handler); |
| 617 | regs->pc = (regs->pc & NEFF_SIGN) ? (regs->pc | NEFF_MASK) : regs->pc; | ||
| 618 | 612 | ||
| 619 | set_fs(USER_DS); | 613 | set_fs(USER_DS); |
| 620 | 614 | ||
| @@ -676,13 +670,11 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
| 676 | /* Set up to return from userspace. If provided, use a stub | 670 | /* Set up to return from userspace. If provided, use a stub |
| 677 | already in userspace. */ | 671 | already in userspace. */ |
| 678 | if (ka->sa.sa_flags & SA_RESTORER) { | 672 | if (ka->sa.sa_flags & SA_RESTORER) { |
| 679 | DEREF_REG_PR = (unsigned long) ka->sa.sa_restorer | 0x1; | ||
| 680 | |||
| 681 | /* | 673 | /* |
| 682 | * On SH5 all edited pointers are subject to NEFF | 674 | * On SH5 all edited pointers are subject to NEFF |
| 683 | */ | 675 | */ |
| 684 | DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ? | 676 | DEREF_REG_PR = neff_sign_extend((unsigned long) |
| 685 | (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR; | 677 | ka->sa.sa_restorer | 0x1); |
| 686 | } else { | 678 | } else { |
| 687 | /* | 679 | /* |
| 688 | * Different approach on SH5. | 680 | * Different approach on SH5. |
| @@ -695,15 +687,14 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
| 695 | * . being code, linker turns ShMedia bit on, always | 687 | * . being code, linker turns ShMedia bit on, always |
| 696 | * dereference index -1. | 688 | * dereference index -1. |
| 697 | */ | 689 | */ |
| 698 | 690 | DEREF_REG_PR = neff_sign_extend((unsigned long) | |
| 699 | DEREF_REG_PR = (unsigned long) frame->retcode | 0x01; | 691 | frame->retcode | 0x01); |
| 700 | DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ? | ||
| 701 | (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR; | ||
| 702 | 692 | ||
| 703 | if (__copy_to_user(frame->retcode, | 693 | if (__copy_to_user(frame->retcode, |
| 704 | (void *)((unsigned long)sa_default_rt_restorer & (~1)), 16) != 0) | 694 | (void *)((unsigned long)sa_default_rt_restorer & (~1)), 16) != 0) |
| 705 | goto give_sigsegv; | 695 | goto give_sigsegv; |
| 706 | 696 | ||
| 697 | /* Cohere the trampoline with the I-cache. */ | ||
| 707 | flush_icache_range(DEREF_REG_PR-1, DEREF_REG_PR-1+15); | 698 | flush_icache_range(DEREF_REG_PR-1, DEREF_REG_PR-1+15); |
| 708 | } | 699 | } |
| 709 | 700 | ||
| @@ -711,14 +702,11 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
| 711 | * Set up registers for signal handler. | 702 | * Set up registers for signal handler. |
| 712 | * All edited pointers are subject to NEFF. | 703 | * All edited pointers are subject to NEFF. |
| 713 | */ | 704 | */ |
| 714 | regs->regs[REG_SP] = (unsigned long) frame; | 705 | regs->regs[REG_SP] = neff_sign_extend((unsigned long)frame); |
| 715 | regs->regs[REG_SP] = (regs->regs[REG_SP] & NEFF_SIGN) ? | ||
| 716 | (regs->regs[REG_SP] | NEFF_MASK) : regs->regs[REG_SP]; | ||
| 717 | regs->regs[REG_ARG1] = signal; /* Arg for signal handler */ | 706 | regs->regs[REG_ARG1] = signal; /* Arg for signal handler */ |
| 718 | regs->regs[REG_ARG2] = (unsigned long long)(unsigned long)(signed long)&frame->info; | 707 | regs->regs[REG_ARG2] = (unsigned long long)(unsigned long)(signed long)&frame->info; |
| 719 | regs->regs[REG_ARG3] = (unsigned long long)(unsigned long)(signed long)&frame->uc.uc_mcontext; | 708 | regs->regs[REG_ARG3] = (unsigned long long)(unsigned long)(signed long)&frame->uc.uc_mcontext; |
| 720 | regs->pc = (unsigned long) ka->sa.sa_handler; | 709 | regs->pc = neff_sign_extend((unsigned long)ka->sa.sa_handler); |
| 721 | regs->pc = (regs->pc & NEFF_SIGN) ? (regs->pc | NEFF_MASK) : regs->pc; | ||
| 722 | 710 | ||
| 723 | set_fs(USER_DS); | 711 | set_fs(USER_DS); |
| 724 | 712 | ||
diff --git a/arch/sh/kernel/stacktrace.c b/arch/sh/kernel/stacktrace.c index 1a2a5eb76e41..c2e45c48409c 100644 --- a/arch/sh/kernel/stacktrace.c +++ b/arch/sh/kernel/stacktrace.c | |||
| @@ -13,47 +13,93 @@ | |||
| 13 | #include <linux/stacktrace.h> | 13 | #include <linux/stacktrace.h> |
| 14 | #include <linux/thread_info.h> | 14 | #include <linux/thread_info.h> |
| 15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
| 16 | #include <asm/unwinder.h> | ||
| 16 | #include <asm/ptrace.h> | 17 | #include <asm/ptrace.h> |
| 18 | #include <asm/stacktrace.h> | ||
| 19 | |||
| 20 | static void save_stack_warning(void *data, char *msg) | ||
| 21 | { | ||
| 22 | } | ||
| 23 | |||
| 24 | static void | ||
| 25 | save_stack_warning_symbol(void *data, char *msg, unsigned long symbol) | ||
| 26 | { | ||
| 27 | } | ||
| 28 | |||
| 29 | static int save_stack_stack(void *data, char *name) | ||
| 30 | { | ||
| 31 | return 0; | ||
| 32 | } | ||
| 17 | 33 | ||
| 18 | /* | 34 | /* |
| 19 | * Save stack-backtrace addresses into a stack_trace buffer. | 35 | * Save stack-backtrace addresses into a stack_trace buffer. |
| 20 | */ | 36 | */ |
| 37 | static void save_stack_address(void *data, unsigned long addr, int reliable) | ||
| 38 | { | ||
| 39 | struct stack_trace *trace = data; | ||
| 40 | |||
| 41 | if (!reliable) | ||
| 42 | return; | ||
| 43 | |||
| 44 | if (trace->skip > 0) { | ||
| 45 | trace->skip--; | ||
| 46 | return; | ||
| 47 | } | ||
| 48 | |||
| 49 | if (trace->nr_entries < trace->max_entries) | ||
| 50 | trace->entries[trace->nr_entries++] = addr; | ||
| 51 | } | ||
| 52 | |||
| 53 | static const struct stacktrace_ops save_stack_ops = { | ||
| 54 | .warning = save_stack_warning, | ||
| 55 | .warning_symbol = save_stack_warning_symbol, | ||
| 56 | .stack = save_stack_stack, | ||
| 57 | .address = save_stack_address, | ||
| 58 | }; | ||
| 59 | |||
| 21 | void save_stack_trace(struct stack_trace *trace) | 60 | void save_stack_trace(struct stack_trace *trace) |
| 22 | { | 61 | { |
| 23 | unsigned long *sp = (unsigned long *)current_stack_pointer; | 62 | unsigned long *sp = (unsigned long *)current_stack_pointer; |
| 24 | 63 | ||
| 25 | while (!kstack_end(sp)) { | 64 | unwind_stack(current, NULL, sp, &save_stack_ops, trace); |
| 26 | unsigned long addr = *sp++; | 65 | if (trace->nr_entries < trace->max_entries) |
| 27 | 66 | trace->entries[trace->nr_entries++] = ULONG_MAX; | |
| 28 | if (__kernel_text_address(addr)) { | ||
| 29 | if (trace->skip > 0) | ||
| 30 | trace->skip--; | ||
| 31 | else | ||
| 32 | trace->entries[trace->nr_entries++] = addr; | ||
| 33 | if (trace->nr_entries >= trace->max_entries) | ||
| 34 | break; | ||
| 35 | } | ||
| 36 | } | ||
| 37 | } | 67 | } |
| 38 | EXPORT_SYMBOL_GPL(save_stack_trace); | 68 | EXPORT_SYMBOL_GPL(save_stack_trace); |
| 39 | 69 | ||
| 70 | static void | ||
| 71 | save_stack_address_nosched(void *data, unsigned long addr, int reliable) | ||
| 72 | { | ||
| 73 | struct stack_trace *trace = (struct stack_trace *)data; | ||
| 74 | |||
| 75 | if (!reliable) | ||
| 76 | return; | ||
| 77 | |||
| 78 | if (in_sched_functions(addr)) | ||
| 79 | return; | ||
| 80 | |||
| 81 | if (trace->skip > 0) { | ||
| 82 | trace->skip--; | ||
| 83 | return; | ||
| 84 | } | ||
| 85 | |||
| 86 | if (trace->nr_entries < trace->max_entries) | ||
| 87 | trace->entries[trace->nr_entries++] = addr; | ||
| 88 | } | ||
| 89 | |||
| 90 | static const struct stacktrace_ops save_stack_ops_nosched = { | ||
| 91 | .warning = save_stack_warning, | ||
| 92 | .warning_symbol = save_stack_warning_symbol, | ||
| 93 | .stack = save_stack_stack, | ||
| 94 | .address = save_stack_address_nosched, | ||
| 95 | }; | ||
| 96 | |||
| 40 | void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) | 97 | void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) |
| 41 | { | 98 | { |
| 42 | unsigned long *sp = (unsigned long *)tsk->thread.sp; | 99 | unsigned long *sp = (unsigned long *)tsk->thread.sp; |
| 43 | 100 | ||
| 44 | while (!kstack_end(sp)) { | 101 | unwind_stack(current, NULL, sp, &save_stack_ops_nosched, trace); |
| 45 | unsigned long addr = *sp++; | 102 | if (trace->nr_entries < trace->max_entries) |
| 46 | 103 | trace->entries[trace->nr_entries++] = ULONG_MAX; | |
| 47 | if (__kernel_text_address(addr)) { | ||
| 48 | if (in_sched_functions(addr)) | ||
| 49 | break; | ||
| 50 | if (trace->skip > 0) | ||
| 51 | trace->skip--; | ||
| 52 | else | ||
| 53 | trace->entries[trace->nr_entries++] = addr; | ||
| 54 | if (trace->nr_entries >= trace->max_entries) | ||
| 55 | break; | ||
| 56 | } | ||
| 57 | } | ||
| 58 | } | 104 | } |
| 59 | EXPORT_SYMBOL_GPL(save_stack_trace_tsk); | 105 | EXPORT_SYMBOL_GPL(save_stack_trace_tsk); |
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c index 90d00e47264d..8aa5d1ceaf14 100644 --- a/arch/sh/kernel/sys_sh.c +++ b/arch/sh/kernel/sys_sh.c | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <asm/syscalls.h> | 25 | #include <asm/syscalls.h> |
| 26 | #include <asm/uaccess.h> | 26 | #include <asm/uaccess.h> |
| 27 | #include <asm/unistd.h> | 27 | #include <asm/unistd.h> |
| 28 | #include <asm/cacheflush.h> | ||
| 29 | #include <asm/cachectl.h> | ||
| 28 | 30 | ||
| 29 | static inline long | 31 | static inline long |
| 30 | do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, | 32 | do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, |
| @@ -179,6 +181,47 @@ asmlinkage int sys_ipc(uint call, int first, int second, | |||
| 179 | return -EINVAL; | 181 | return -EINVAL; |
| 180 | } | 182 | } |
| 181 | 183 | ||
| 184 | /* sys_cacheflush -- flush (part of) the processor cache. */ | ||
| 185 | asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op) | ||
| 186 | { | ||
| 187 | struct vm_area_struct *vma; | ||
| 188 | |||
| 189 | if ((op <= 0) || (op > (CACHEFLUSH_D_PURGE|CACHEFLUSH_I))) | ||
| 190 | return -EINVAL; | ||
| 191 | |||
| 192 | /* | ||
| 193 | * Verify that the specified address region actually belongs | ||
| 194 | * to this process. | ||
| 195 | */ | ||
| 196 | if (addr + len < addr) | ||
| 197 | return -EFAULT; | ||
| 198 | |||
| 199 | down_read(¤t->mm->mmap_sem); | ||
| 200 | vma = find_vma (current->mm, addr); | ||
| 201 | if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end) { | ||
| 202 | up_read(¤t->mm->mmap_sem); | ||
| 203 | return -EFAULT; | ||
| 204 | } | ||
| 205 | |||
| 206 | switch (op & CACHEFLUSH_D_PURGE) { | ||
| 207 | case CACHEFLUSH_D_INVAL: | ||
| 208 | __flush_invalidate_region((void *)addr, len); | ||
| 209 | break; | ||
| 210 | case CACHEFLUSH_D_WB: | ||
| 211 | __flush_wback_region((void *)addr, len); | ||
| 212 | break; | ||
| 213 | case CACHEFLUSH_D_PURGE: | ||
| 214 | __flush_purge_region((void *)addr, len); | ||
| 215 | break; | ||
| 216 | } | ||
| 217 | |||
| 218 | if (op & CACHEFLUSH_I) | ||
| 219 | flush_cache_all(); | ||
| 220 | |||
| 221 | up_read(¤t->mm->mmap_sem); | ||
| 222 | return 0; | ||
| 223 | } | ||
| 224 | |||
| 182 | asmlinkage int sys_uname(struct old_utsname __user *name) | 225 | asmlinkage int sys_uname(struct old_utsname __user *name) |
| 183 | { | 226 | { |
| 184 | int err; | 227 | int err; |
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S index f9e21fa2f592..16ba225ede89 100644 --- a/arch/sh/kernel/syscalls_32.S +++ b/arch/sh/kernel/syscalls_32.S | |||
| @@ -139,7 +139,7 @@ ENTRY(sys_call_table) | |||
| 139 | .long sys_clone /* 120 */ | 139 | .long sys_clone /* 120 */ |
| 140 | .long sys_setdomainname | 140 | .long sys_setdomainname |
| 141 | .long sys_newuname | 141 | .long sys_newuname |
| 142 | .long sys_ni_syscall /* sys_modify_ldt */ | 142 | .long sys_cacheflush /* x86: sys_modify_ldt */ |
| 143 | .long sys_adjtimex | 143 | .long sys_adjtimex |
| 144 | .long sys_mprotect /* 125 */ | 144 | .long sys_mprotect /* 125 */ |
| 145 | .long sys_sigprocmask | 145 | .long sys_sigprocmask |
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S index bf420b616ae0..af6fb7410c21 100644 --- a/arch/sh/kernel/syscalls_64.S +++ b/arch/sh/kernel/syscalls_64.S | |||
| @@ -143,7 +143,7 @@ sys_call_table: | |||
| 143 | .long sys_clone /* 120 */ | 143 | .long sys_clone /* 120 */ |
| 144 | .long sys_setdomainname | 144 | .long sys_setdomainname |
| 145 | .long sys_newuname | 145 | .long sys_newuname |
| 146 | .long sys_ni_syscall /* sys_modify_ldt */ | 146 | .long sys_cacheflush /* x86: sys_modify_ldt */ |
| 147 | .long sys_adjtimex | 147 | .long sys_adjtimex |
| 148 | .long sys_mprotect /* 125 */ | 148 | .long sys_mprotect /* 125 */ |
| 149 | .long sys_sigprocmask | 149 | .long sys_sigprocmask |
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index 9b352a1e3fb4..953fa1613312 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #include <linux/smp.h> | 21 | #include <linux/smp.h> |
| 22 | #include <linux/rtc.h> | 22 | #include <linux/rtc.h> |
| 23 | #include <asm/clock.h> | 23 | #include <asm/clock.h> |
| 24 | #include <asm/hwblk.h> | ||
| 24 | #include <asm/rtc.h> | 25 | #include <asm/rtc.h> |
| 25 | 26 | ||
| 26 | /* Dummy RTC ops */ | 27 | /* Dummy RTC ops */ |
| @@ -39,11 +40,9 @@ void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time; | |||
| 39 | int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time; | 40 | int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time; |
| 40 | 41 | ||
| 41 | #ifdef CONFIG_GENERIC_CMOS_UPDATE | 42 | #ifdef CONFIG_GENERIC_CMOS_UPDATE |
| 42 | unsigned long read_persistent_clock(void) | 43 | void read_persistent_clock(struct timespec *ts) |
| 43 | { | 44 | { |
| 44 | struct timespec tv; | 45 | rtc_sh_get_time(ts); |
| 45 | rtc_sh_get_time(&tv); | ||
| 46 | return tv.tv_sec; | ||
| 47 | } | 46 | } |
| 48 | 47 | ||
| 49 | int update_persistent_clock(struct timespec now) | 48 | int update_persistent_clock(struct timespec now) |
| @@ -91,21 +90,8 @@ module_init(rtc_generic_init); | |||
| 91 | 90 | ||
| 92 | void (*board_time_init)(void); | 91 | void (*board_time_init)(void); |
| 93 | 92 | ||
| 94 | void __init time_init(void) | 93 | static void __init sh_late_time_init(void) |
| 95 | { | 94 | { |
| 96 | if (board_time_init) | ||
| 97 | board_time_init(); | ||
| 98 | |||
| 99 | clk_init(); | ||
| 100 | |||
| 101 | rtc_sh_get_time(&xtime); | ||
| 102 | set_normalized_timespec(&wall_to_monotonic, | ||
| 103 | -xtime.tv_sec, -xtime.tv_nsec); | ||
| 104 | |||
| 105 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST | ||
| 106 | local_timer_setup(smp_processor_id()); | ||
| 107 | #endif | ||
| 108 | |||
| 109 | /* | 95 | /* |
| 110 | * Make sure all compiled-in early timers register themselves. | 96 | * Make sure all compiled-in early timers register themselves. |
| 111 | * | 97 | * |
| @@ -118,3 +104,18 @@ void __init time_init(void) | |||
| 118 | early_platform_driver_register_all("earlytimer"); | 104 | early_platform_driver_register_all("earlytimer"); |
| 119 | early_platform_driver_probe("earlytimer", 2, 0); | 105 | early_platform_driver_probe("earlytimer", 2, 0); |
| 120 | } | 106 | } |
| 107 | |||
| 108 | void __init time_init(void) | ||
| 109 | { | ||
| 110 | if (board_time_init) | ||
| 111 | board_time_init(); | ||
| 112 | |||
| 113 | hwblk_init(); | ||
| 114 | clk_init(); | ||
| 115 | |||
| 116 | rtc_sh_get_time(&xtime); | ||
| 117 | set_normalized_timespec(&wall_to_monotonic, | ||
| 118 | -xtime.tv_sec, -xtime.tv_nsec); | ||
| 119 | |||
| 120 | late_time_init = sh_late_time_init; | ||
| 121 | } | ||
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index b3e0067db358..a8396f36bd14 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c | |||
| @@ -5,18 +5,33 @@ | |||
| 5 | #include <linux/signal.h> | 5 | #include <linux/signal.h> |
| 6 | #include <linux/sched.h> | 6 | #include <linux/sched.h> |
| 7 | #include <linux/uaccess.h> | 7 | #include <linux/uaccess.h> |
| 8 | #include <linux/hardirq.h> | ||
| 9 | #include <asm/unwinder.h> | ||
| 8 | #include <asm/system.h> | 10 | #include <asm/system.h> |
| 9 | 11 | ||
| 10 | #ifdef CONFIG_BUG | 12 | #ifdef CONFIG_BUG |
| 11 | static void handle_BUG(struct pt_regs *regs) | 13 | void handle_BUG(struct pt_regs *regs) |
| 12 | { | 14 | { |
| 15 | const struct bug_entry *bug; | ||
| 16 | unsigned long bugaddr = regs->pc; | ||
| 13 | enum bug_trap_type tt; | 17 | enum bug_trap_type tt; |
| 14 | tt = report_bug(regs->pc, regs); | 18 | |
| 19 | if (!is_valid_bugaddr(bugaddr)) | ||
| 20 | goto invalid; | ||
| 21 | |||
| 22 | bug = find_bug(bugaddr); | ||
| 23 | |||
| 24 | /* Switch unwinders when unwind_stack() is called */ | ||
| 25 | if (bug->flags & BUGFLAG_UNWINDER) | ||
| 26 | unwinder_faulted = 1; | ||
| 27 | |||
| 28 | tt = report_bug(bugaddr, regs); | ||
| 15 | if (tt == BUG_TRAP_TYPE_WARN) { | 29 | if (tt == BUG_TRAP_TYPE_WARN) { |
| 16 | regs->pc += instruction_size(regs->pc); | 30 | regs->pc += instruction_size(bugaddr); |
| 17 | return; | 31 | return; |
| 18 | } | 32 | } |
| 19 | 33 | ||
| 34 | invalid: | ||
| 20 | die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff); | 35 | die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff); |
| 21 | } | 36 | } |
| 22 | 37 | ||
| @@ -28,8 +43,10 @@ int is_valid_bugaddr(unsigned long addr) | |||
| 28 | return 0; | 43 | return 0; |
| 29 | if (probe_kernel_address((insn_size_t *)addr, opcode)) | 44 | if (probe_kernel_address((insn_size_t *)addr, opcode)) |
| 30 | return 0; | 45 | return 0; |
| 46 | if (opcode == TRAPA_BUG_OPCODE) | ||
| 47 | return 1; | ||
| 31 | 48 | ||
| 32 | return opcode == TRAPA_BUG_OPCODE; | 49 | return 0; |
| 33 | } | 50 | } |
| 34 | #endif | 51 | #endif |
| 35 | 52 | ||
| @@ -75,3 +92,23 @@ BUILD_TRAP_HANDLER(bug) | |||
| 75 | 92 | ||
| 76 | force_sig(SIGTRAP, current); | 93 | force_sig(SIGTRAP, current); |
| 77 | } | 94 | } |
| 95 | |||
| 96 | BUILD_TRAP_HANDLER(nmi) | ||
| 97 | { | ||
| 98 | TRAP_HANDLER_DECL; | ||
| 99 | |||
| 100 | nmi_enter(); | ||
| 101 | |||
| 102 | switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) { | ||
| 103 | case NOTIFY_OK: | ||
| 104 | case NOTIFY_STOP: | ||
| 105 | break; | ||
| 106 | case NOTIFY_BAD: | ||
| 107 | die("Fatal Non-Maskable Interrupt", regs, SIGINT); | ||
| 108 | default: | ||
| 109 | printk(KERN_ALERT "Got NMI, but nobody cared. Ignoring...\n"); | ||
| 110 | break; | ||
| 111 | } | ||
| 112 | |||
| 113 | nmi_exit(); | ||
| 114 | } | ||
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c index 2b772776fcda..6aba9af79eaf 100644 --- a/arch/sh/kernel/traps_32.c +++ b/arch/sh/kernel/traps_32.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include <linux/kdebug.h> | 24 | #include <linux/kdebug.h> |
| 25 | #include <linux/kexec.h> | 25 | #include <linux/kexec.h> |
| 26 | #include <linux/limits.h> | 26 | #include <linux/limits.h> |
| 27 | #include <linux/proc_fs.h> | ||
| 27 | #include <asm/system.h> | 28 | #include <asm/system.h> |
| 28 | #include <asm/uaccess.h> | 29 | #include <asm/uaccess.h> |
| 29 | #include <asm/fpu.h> | 30 | #include <asm/fpu.h> |
| @@ -44,6 +45,85 @@ | |||
| 44 | #define TRAP_ILLEGAL_SLOT_INST 13 | 45 | #define TRAP_ILLEGAL_SLOT_INST 13 |
| 45 | #endif | 46 | #endif |
| 46 | 47 | ||
| 48 | static unsigned long se_user; | ||
| 49 | static unsigned long se_sys; | ||
| 50 | static unsigned long se_half; | ||
| 51 | static unsigned long se_word; | ||
| 52 | static unsigned long se_dword; | ||
| 53 | static unsigned long se_multi; | ||
| 54 | /* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not | ||
| 55 | valid! */ | ||
| 56 | static int se_usermode = 3; | ||
| 57 | /* 0: no warning 1: print a warning message */ | ||
| 58 | static int se_kernmode_warn = 1; | ||
| 59 | |||
| 60 | #ifdef CONFIG_PROC_FS | ||
| 61 | static const char *se_usermode_action[] = { | ||
| 62 | "ignored", | ||
| 63 | "warn", | ||
| 64 | "fixup", | ||
| 65 | "fixup+warn", | ||
| 66 | "signal", | ||
| 67 | "signal+warn" | ||
| 68 | }; | ||
| 69 | |||
| 70 | static int | ||
| 71 | proc_alignment_read(char *page, char **start, off_t off, int count, int *eof, | ||
| 72 | void *data) | ||
| 73 | { | ||
| 74 | char *p = page; | ||
| 75 | int len; | ||
| 76 | |||
| 77 | p += sprintf(p, "User:\t\t%lu\n", se_user); | ||
| 78 | p += sprintf(p, "System:\t\t%lu\n", se_sys); | ||
| 79 | p += sprintf(p, "Half:\t\t%lu\n", se_half); | ||
| 80 | p += sprintf(p, "Word:\t\t%lu\n", se_word); | ||
| 81 | p += sprintf(p, "DWord:\t\t%lu\n", se_dword); | ||
| 82 | p += sprintf(p, "Multi:\t\t%lu\n", se_multi); | ||
| 83 | p += sprintf(p, "User faults:\t%i (%s)\n", se_usermode, | ||
| 84 | se_usermode_action[se_usermode]); | ||
| 85 | p += sprintf(p, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn, | ||
| 86 | se_kernmode_warn ? "+warn" : ""); | ||
| 87 | |||
| 88 | len = (p - page) - off; | ||
| 89 | if (len < 0) | ||
| 90 | len = 0; | ||
| 91 | |||
| 92 | *eof = (len <= count) ? 1 : 0; | ||
| 93 | *start = page + off; | ||
| 94 | |||
| 95 | return len; | ||
| 96 | } | ||
| 97 | |||
| 98 | static int proc_alignment_write(struct file *file, const char __user *buffer, | ||
| 99 | unsigned long count, void *data) | ||
| 100 | { | ||
| 101 | char mode; | ||
| 102 | |||
| 103 | if (count > 0) { | ||
| 104 | if (get_user(mode, buffer)) | ||
| 105 | return -EFAULT; | ||
| 106 | if (mode >= '0' && mode <= '5') | ||
| 107 | se_usermode = mode - '0'; | ||
| 108 | } | ||
| 109 | return count; | ||
| 110 | } | ||
| 111 | |||
| 112 | static int proc_alignment_kern_write(struct file *file, const char __user *buffer, | ||
| 113 | unsigned long count, void *data) | ||
| 114 | { | ||
| 115 | char mode; | ||
| 116 | |||
| 117 | if (count > 0) { | ||
| 118 | if (get_user(mode, buffer)) | ||
| 119 | return -EFAULT; | ||
| 120 | if (mode >= '0' && mode <= '1') | ||
| 121 | se_kernmode_warn = mode - '0'; | ||
| 122 | } | ||
| 123 | return count; | ||
| 124 | } | ||
| 125 | #endif | ||
| 126 | |||
| 47 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top) | 127 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top) |
| 48 | { | 128 | { |
| 49 | unsigned long p; | 129 | unsigned long p; |
| @@ -136,6 +216,7 @@ static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err) | |||
| 136 | regs->pc = fixup->fixup; | 216 | regs->pc = fixup->fixup; |
| 137 | return; | 217 | return; |
| 138 | } | 218 | } |
| 219 | |||
| 139 | die(str, regs, err); | 220 | die(str, regs, err); |
| 140 | } | 221 | } |
| 141 | } | 222 | } |
| @@ -193,6 +274,13 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs, | |||
| 193 | 274 | ||
| 194 | count = 1<<(instruction&3); | 275 | count = 1<<(instruction&3); |
| 195 | 276 | ||
| 277 | switch (count) { | ||
| 278 | case 1: se_half += 1; break; | ||
| 279 | case 2: se_word += 1; break; | ||
| 280 | case 4: se_dword += 1; break; | ||
| 281 | case 8: se_multi += 1; break; /* ??? */ | ||
| 282 | } | ||
| 283 | |||
| 196 | ret = -EFAULT; | 284 | ret = -EFAULT; |
| 197 | switch (instruction>>12) { | 285 | switch (instruction>>12) { |
| 198 | case 0: /* mov.[bwl] to/from memory via r0+rn */ | 286 | case 0: /* mov.[bwl] to/from memory via r0+rn */ |
| @@ -358,15 +446,8 @@ static inline int handle_delayslot(struct pt_regs *regs, | |||
| 358 | #define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4) | 446 | #define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4) |
| 359 | #define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4) | 447 | #define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4) |
| 360 | 448 | ||
| 361 | /* | ||
| 362 | * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit | ||
| 363 | * opcodes.. | ||
| 364 | */ | ||
| 365 | |||
| 366 | static int handle_unaligned_notify_count = 10; | ||
| 367 | |||
| 368 | int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, | 449 | int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, |
| 369 | struct mem_access *ma) | 450 | struct mem_access *ma, int expected) |
| 370 | { | 451 | { |
| 371 | u_int rm; | 452 | u_int rm; |
| 372 | int ret, index; | 453 | int ret, index; |
| @@ -374,15 +455,13 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, | |||
| 374 | index = (instruction>>8)&15; /* 0x0F00 */ | 455 | index = (instruction>>8)&15; /* 0x0F00 */ |
| 375 | rm = regs->regs[index]; | 456 | rm = regs->regs[index]; |
| 376 | 457 | ||
| 377 | /* shout about the first ten userspace fixups */ | 458 | /* shout about fixups */ |
| 378 | if (user_mode(regs) && handle_unaligned_notify_count>0) { | 459 | if (!expected && printk_ratelimit()) |
| 379 | handle_unaligned_notify_count--; | 460 | printk(KERN_NOTICE "Fixing up unaligned %s access " |
| 380 | |||
| 381 | printk(KERN_NOTICE "Fixing up unaligned userspace access " | ||
| 382 | "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", | 461 | "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", |
| 462 | user_mode(regs) ? "userspace" : "kernel", | ||
| 383 | current->comm, task_pid_nr(current), | 463 | current->comm, task_pid_nr(current), |
| 384 | (void *)regs->pc, instruction); | 464 | (void *)regs->pc, instruction); |
| 385 | } | ||
| 386 | 465 | ||
| 387 | ret = -EFAULT; | 466 | ret = -EFAULT; |
| 388 | switch (instruction&0xF000) { | 467 | switch (instruction&0xF000) { |
| @@ -538,6 +617,36 @@ asmlinkage void do_address_error(struct pt_regs *regs, | |||
| 538 | 617 | ||
| 539 | local_irq_enable(); | 618 | local_irq_enable(); |
| 540 | 619 | ||
| 620 | se_user += 1; | ||
| 621 | |||
| 622 | #ifndef CONFIG_CPU_SH2A | ||
| 623 | set_fs(USER_DS); | ||
| 624 | if (copy_from_user(&instruction, (u16 *)(regs->pc & ~1), 2)) { | ||
| 625 | set_fs(oldfs); | ||
| 626 | goto uspace_segv; | ||
| 627 | } | ||
| 628 | set_fs(oldfs); | ||
| 629 | |||
| 630 | /* shout about userspace fixups */ | ||
| 631 | if (se_usermode & 1) | ||
| 632 | printk(KERN_NOTICE "Unaligned userspace access " | ||
| 633 | "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", | ||
| 634 | current->comm, current->pid, (void *)regs->pc, | ||
| 635 | instruction); | ||
| 636 | #endif | ||
| 637 | |||
| 638 | if (se_usermode & 2) | ||
| 639 | goto fixup; | ||
| 640 | |||
| 641 | if (se_usermode & 4) | ||
| 642 | goto uspace_segv; | ||
| 643 | else { | ||
| 644 | /* ignore */ | ||
| 645 | regs->pc += instruction_size(instruction); | ||
| 646 | return; | ||
| 647 | } | ||
| 648 | |||
| 649 | fixup: | ||
| 541 | /* bad PC is not something we can fix */ | 650 | /* bad PC is not something we can fix */ |
| 542 | if (regs->pc & 1) { | 651 | if (regs->pc & 1) { |
| 543 | si_code = BUS_ADRALN; | 652 | si_code = BUS_ADRALN; |
| @@ -545,17 +654,8 @@ asmlinkage void do_address_error(struct pt_regs *regs, | |||
| 545 | } | 654 | } |
| 546 | 655 | ||
| 547 | set_fs(USER_DS); | 656 | set_fs(USER_DS); |
| 548 | if (copy_from_user(&instruction, (void __user *)(regs->pc), | ||
| 549 | sizeof(instruction))) { | ||
| 550 | /* Argh. Fault on the instruction itself. | ||
| 551 | This should never happen non-SMP | ||
| 552 | */ | ||
| 553 | set_fs(oldfs); | ||
| 554 | goto uspace_segv; | ||
| 555 | } | ||
| 556 | |||
| 557 | tmp = handle_unaligned_access(instruction, regs, | 657 | tmp = handle_unaligned_access(instruction, regs, |
| 558 | &user_mem_access); | 658 | &user_mem_access, 0); |
| 559 | set_fs(oldfs); | 659 | set_fs(oldfs); |
| 560 | 660 | ||
| 561 | if (tmp==0) | 661 | if (tmp==0) |
| @@ -571,6 +671,14 @@ uspace_segv: | |||
| 571 | info.si_addr = (void __user *)address; | 671 | info.si_addr = (void __user *)address; |
| 572 | force_sig_info(SIGBUS, &info, current); | 672 | force_sig_info(SIGBUS, &info, current); |
| 573 | } else { | 673 | } else { |
| 674 | se_sys += 1; | ||
| 675 | |||
| 676 | if (se_kernmode_warn) | ||
| 677 | printk(KERN_NOTICE "Unaligned kernel access " | ||
| 678 | "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", | ||
| 679 | current->comm, current->pid, (void *)regs->pc, | ||
| 680 | instruction); | ||
| 681 | |||
| 574 | if (regs->pc & 1) | 682 | if (regs->pc & 1) |
| 575 | die("unaligned program counter", regs, error_code); | 683 | die("unaligned program counter", regs, error_code); |
| 576 | 684 | ||
| @@ -584,7 +692,8 @@ uspace_segv: | |||
| 584 | die("insn faulting in do_address_error", regs, 0); | 692 | die("insn faulting in do_address_error", regs, 0); |
| 585 | } | 693 | } |
| 586 | 694 | ||
| 587 | handle_unaligned_access(instruction, regs, &user_mem_access); | 695 | handle_unaligned_access(instruction, regs, |
| 696 | &user_mem_access, 0); | ||
| 588 | set_fs(oldfs); | 697 | set_fs(oldfs); |
| 589 | } | 698 | } |
| 590 | } | 699 | } |
| @@ -858,30 +967,6 @@ void __init trap_init(void) | |||
| 858 | per_cpu_trap_init(); | 967 | per_cpu_trap_init(); |
| 859 | } | 968 | } |
| 860 | 969 | ||
| 861 | void show_trace(struct task_struct *tsk, unsigned long *sp, | ||
| 862 | struct pt_regs *regs) | ||
| 863 | { | ||
| 864 | unsigned long addr; | ||
| 865 | |||
| 866 | if (regs && user_mode(regs)) | ||
| 867 | return; | ||
| 868 | |||
| 869 | printk("\nCall trace:\n"); | ||
| 870 | |||
| 871 | while (!kstack_end(sp)) { | ||
| 872 | addr = *sp++; | ||
| 873 | if (kernel_text_address(addr)) | ||
| 874 | print_ip_sym(addr); | ||
| 875 | } | ||
| 876 | |||
| 877 | printk("\n"); | ||
| 878 | |||
| 879 | if (!tsk) | ||
| 880 | tsk = current; | ||
| 881 | |||
| 882 | debug_show_held_locks(tsk); | ||
| 883 | } | ||
| 884 | |||
| 885 | void show_stack(struct task_struct *tsk, unsigned long *sp) | 970 | void show_stack(struct task_struct *tsk, unsigned long *sp) |
| 886 | { | 971 | { |
| 887 | unsigned long stack; | 972 | unsigned long stack; |
| @@ -904,3 +989,38 @@ void dump_stack(void) | |||
| 904 | show_stack(NULL, NULL); | 989 | show_stack(NULL, NULL); |
| 905 | } | 990 | } |
| 906 | EXPORT_SYMBOL(dump_stack); | 991 | EXPORT_SYMBOL(dump_stack); |
| 992 | |||
| 993 | #ifdef CONFIG_PROC_FS | ||
| 994 | /* | ||
| 995 | * This needs to be done after sysctl_init, otherwise sys/ will be | ||
| 996 | * overwritten. Actually, this shouldn't be in sys/ at all since | ||
| 997 | * it isn't a sysctl, and it doesn't contain sysctl information. | ||
| 998 | * We now locate it in /proc/cpu/alignment instead. | ||
| 999 | */ | ||
| 1000 | static int __init alignment_init(void) | ||
| 1001 | { | ||
| 1002 | struct proc_dir_entry *dir, *res; | ||
| 1003 | |||
| 1004 | dir = proc_mkdir("cpu", NULL); | ||
| 1005 | if (!dir) | ||
| 1006 | return -ENOMEM; | ||
| 1007 | |||
| 1008 | res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, dir); | ||
| 1009 | if (!res) | ||
| 1010 | return -ENOMEM; | ||
| 1011 | |||
| 1012 | res->read_proc = proc_alignment_read; | ||
| 1013 | res->write_proc = proc_alignment_write; | ||
| 1014 | |||
| 1015 | res = create_proc_entry("kernel_alignment", S_IWUSR | S_IRUGO, dir); | ||
| 1016 | if (!res) | ||
| 1017 | return -ENOMEM; | ||
| 1018 | |||
| 1019 | res->read_proc = proc_alignment_read; | ||
| 1020 | res->write_proc = proc_alignment_kern_write; | ||
| 1021 | |||
| 1022 | return 0; | ||
| 1023 | } | ||
| 1024 | |||
| 1025 | fs_initcall(alignment_init); | ||
| 1026 | #endif | ||
diff --git a/arch/sh/kernel/unwinder.c b/arch/sh/kernel/unwinder.c new file mode 100644 index 000000000000..468889d958f4 --- /dev/null +++ b/arch/sh/kernel/unwinder.c | |||
| @@ -0,0 +1,164 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Matt Fleming | ||
| 3 | * | ||
| 4 | * Based, in part, on kernel/time/clocksource.c. | ||
| 5 | * | ||
| 6 | * This file provides arbitration code for stack unwinders. | ||
| 7 | * | ||
| 8 | * Multiple stack unwinders can be available on a system, usually with | ||
| 9 | * the most accurate unwinder being the currently active one. | ||
| 10 | */ | ||
| 11 | #include <linux/errno.h> | ||
| 12 | #include <linux/list.h> | ||
| 13 | #include <linux/spinlock.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | #include <asm/unwinder.h> | ||
| 16 | #include <asm/atomic.h> | ||
| 17 | |||
| 18 | /* | ||
| 19 | * This is the most basic stack unwinder an architecture can | ||
| 20 | * provide. For architectures without reliable frame pointers, e.g. | ||
| 21 | * RISC CPUs, it can be implemented by looking through the stack for | ||
| 22 | * addresses that lie within the kernel text section. | ||
| 23 | * | ||
| 24 | * Other CPUs, e.g. x86, can use their frame pointer register to | ||
| 25 | * construct more accurate stack traces. | ||
| 26 | */ | ||
| 27 | static struct list_head unwinder_list; | ||
| 28 | static struct unwinder stack_reader = { | ||
| 29 | .name = "stack-reader", | ||
| 30 | .dump = stack_reader_dump, | ||
| 31 | .rating = 50, | ||
| 32 | .list = { | ||
| 33 | .next = &unwinder_list, | ||
| 34 | .prev = &unwinder_list, | ||
| 35 | }, | ||
| 36 | }; | ||
| 37 | |||
| 38 | /* | ||
| 39 | * "curr_unwinder" points to the stack unwinder currently in use. This | ||
| 40 | * is the unwinder with the highest rating. | ||
| 41 | * | ||
| 42 | * "unwinder_list" is a linked-list of all available unwinders, sorted | ||
| 43 | * by rating. | ||
| 44 | * | ||
| 45 | * All modifications of "curr_unwinder" and "unwinder_list" must be | ||
| 46 | * performed whilst holding "unwinder_lock". | ||
| 47 | */ | ||
| 48 | static struct unwinder *curr_unwinder = &stack_reader; | ||
| 49 | |||
| 50 | static struct list_head unwinder_list = { | ||
| 51 | .next = &stack_reader.list, | ||
| 52 | .prev = &stack_reader.list, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static DEFINE_SPINLOCK(unwinder_lock); | ||
| 56 | |||
| 57 | /** | ||
| 58 | * select_unwinder - Select the best registered stack unwinder. | ||
| 59 | * | ||
| 60 | * Private function. Must hold unwinder_lock when called. | ||
| 61 | * | ||
| 62 | * Select the stack unwinder with the best rating. This is useful for | ||
| 63 | * setting up curr_unwinder. | ||
| 64 | */ | ||
| 65 | static struct unwinder *select_unwinder(void) | ||
| 66 | { | ||
| 67 | struct unwinder *best; | ||
| 68 | |||
| 69 | if (list_empty(&unwinder_list)) | ||
| 70 | return NULL; | ||
| 71 | |||
| 72 | best = list_entry(unwinder_list.next, struct unwinder, list); | ||
| 73 | if (best == curr_unwinder) | ||
| 74 | return NULL; | ||
| 75 | |||
| 76 | return best; | ||
| 77 | } | ||
| 78 | |||
| 79 | /* | ||
| 80 | * Enqueue the stack unwinder sorted by rating. | ||
| 81 | */ | ||
| 82 | static int unwinder_enqueue(struct unwinder *ops) | ||
| 83 | { | ||
| 84 | struct list_head *tmp, *entry = &unwinder_list; | ||
| 85 | |||
| 86 | list_for_each(tmp, &unwinder_list) { | ||
| 87 | struct unwinder *o; | ||
| 88 | |||
| 89 | o = list_entry(tmp, struct unwinder, list); | ||
| 90 | if (o == ops) | ||
| 91 | return -EBUSY; | ||
| 92 | /* Keep track of the place, where to insert */ | ||
| 93 | if (o->rating >= ops->rating) | ||
| 94 | entry = tmp; | ||
| 95 | } | ||
| 96 | list_add(&ops->list, entry); | ||
| 97 | |||
| 98 | return 0; | ||
| 99 | } | ||
| 100 | |||
| 101 | /** | ||
| 102 | * unwinder_register - Used to install new stack unwinder | ||
| 103 | * @u: unwinder to be registered | ||
| 104 | * | ||
| 105 | * Install the new stack unwinder on the unwinder list, which is sorted | ||
| 106 | * by rating. | ||
| 107 | * | ||
| 108 | * Returns -EBUSY if registration fails, zero otherwise. | ||
| 109 | */ | ||
| 110 | int unwinder_register(struct unwinder *u) | ||
| 111 | { | ||
| 112 | unsigned long flags; | ||
| 113 | int ret; | ||
| 114 | |||
| 115 | spin_lock_irqsave(&unwinder_lock, flags); | ||
| 116 | ret = unwinder_enqueue(u); | ||
| 117 | if (!ret) | ||
| 118 | curr_unwinder = select_unwinder(); | ||
| 119 | spin_unlock_irqrestore(&unwinder_lock, flags); | ||
| 120 | |||
| 121 | return ret; | ||
| 122 | } | ||
| 123 | |||
| 124 | int unwinder_faulted = 0; | ||
| 125 | |||
| 126 | /* | ||
| 127 | * Unwind the call stack and pass information to the stacktrace_ops | ||
| 128 | * functions. Also handle the case where we need to switch to a new | ||
| 129 | * stack dumper because the current one faulted unexpectedly. | ||
| 130 | */ | ||
| 131 | void unwind_stack(struct task_struct *task, struct pt_regs *regs, | ||
| 132 | unsigned long *sp, const struct stacktrace_ops *ops, | ||
| 133 | void *data) | ||
| 134 | { | ||
| 135 | unsigned long flags; | ||
| 136 | |||
| 137 | /* | ||
| 138 | * The problem with unwinders with high ratings is that they are | ||
| 139 | * inherently more complicated than the simple ones with lower | ||
| 140 | * ratings. We are therefore more likely to fault in the | ||
| 141 | * complicated ones, e.g. hitting BUG()s. If we fault in the | ||
| 142 | * code for the current stack unwinder we try to downgrade to | ||
| 143 | * one with a lower rating. | ||
| 144 | * | ||
| 145 | * Hopefully this will give us a semi-reliable stacktrace so we | ||
| 146 | * can diagnose why curr_unwinder->dump() faulted. | ||
| 147 | */ | ||
| 148 | if (unwinder_faulted) { | ||
| 149 | spin_lock_irqsave(&unwinder_lock, flags); | ||
| 150 | |||
| 151 | /* Make sure no one beat us to changing the unwinder */ | ||
| 152 | if (unwinder_faulted && !list_is_singular(&unwinder_list)) { | ||
| 153 | list_del(&curr_unwinder->list); | ||
| 154 | curr_unwinder = select_unwinder(); | ||
| 155 | |||
| 156 | unwinder_faulted = 0; | ||
| 157 | } | ||
| 158 | |||
| 159 | spin_unlock_irqrestore(&unwinder_lock, flags); | ||
| 160 | } | ||
| 161 | |||
| 162 | curr_unwinder->dump(task, regs, sp, ops, data); | ||
| 163 | } | ||
| 164 | EXPORT_SYMBOL_GPL(unwind_stack); | ||
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index 0ce254bca92f..a1e4ec24f1f5 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S | |||
| @@ -12,7 +12,7 @@ OUTPUT_ARCH(sh) | |||
| 12 | 12 | ||
| 13 | #include <asm/thread_info.h> | 13 | #include <asm/thread_info.h> |
| 14 | #include <asm/cache.h> | 14 | #include <asm/cache.h> |
| 15 | #include <asm-generic/vmlinux.lds.h> | 15 | #include <asm/vmlinux.lds.h> |
| 16 | 16 | ||
| 17 | ENTRY(_start) | 17 | ENTRY(_start) |
| 18 | SECTIONS | 18 | SECTIONS |
| @@ -50,12 +50,7 @@ SECTIONS | |||
| 50 | _etext = .; /* End of text section */ | 50 | _etext = .; /* End of text section */ |
| 51 | } = 0x0009 | 51 | } = 0x0009 |
| 52 | 52 | ||
| 53 | . = ALIGN(16); /* Exception table */ | 53 | EXCEPTION_TABLE(16) |
| 54 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { | ||
| 55 | __start___ex_table = .; | ||
| 56 | *(__ex_table) | ||
| 57 | __stop___ex_table = .; | ||
| 58 | } | ||
| 59 | 54 | ||
| 60 | NOTES | 55 | NOTES |
| 61 | RO_DATA(PAGE_SIZE) | 56 | RO_DATA(PAGE_SIZE) |
| @@ -71,69 +66,16 @@ SECTIONS | |||
| 71 | __uncached_end = .; | 66 | __uncached_end = .; |
| 72 | } | 67 | } |
| 73 | 68 | ||
| 74 | . = ALIGN(THREAD_SIZE); | 69 | RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) |
| 75 | .data : AT(ADDR(.data) - LOAD_OFFSET) { /* Data */ | ||
| 76 | *(.data.init_task) | ||
| 77 | |||
| 78 | . = ALIGN(L1_CACHE_BYTES); | ||
| 79 | *(.data.cacheline_aligned) | ||
| 80 | |||
| 81 | . = ALIGN(L1_CACHE_BYTES); | ||
| 82 | *(.data.read_mostly) | ||
| 83 | |||
| 84 | . = ALIGN(PAGE_SIZE); | ||
| 85 | *(.data.page_aligned) | ||
| 86 | |||
| 87 | __nosave_begin = .; | ||
| 88 | *(.data.nosave) | ||
| 89 | . = ALIGN(PAGE_SIZE); | ||
| 90 | __nosave_end = .; | ||
| 91 | |||
| 92 | DATA_DATA | ||
| 93 | CONSTRUCTORS | ||
| 94 | } | ||
| 95 | 70 | ||
| 96 | _edata = .; /* End of data section */ | 71 | _edata = .; /* End of data section */ |
| 97 | 72 | ||
| 98 | . = ALIGN(PAGE_SIZE); /* Init code and data */ | 73 | DWARF_EH_FRAME |
| 99 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { | ||
| 100 | __init_begin = .; | ||
| 101 | _sinittext = .; | ||
| 102 | INIT_TEXT | ||
| 103 | _einittext = .; | ||
| 104 | } | ||
| 105 | |||
| 106 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { INIT_DATA } | ||
| 107 | |||
| 108 | . = ALIGN(16); | ||
| 109 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { | ||
| 110 | __setup_start = .; | ||
| 111 | *(.init.setup) | ||
| 112 | __setup_end = .; | ||
| 113 | } | ||
| 114 | |||
| 115 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) { | ||
| 116 | __initcall_start = .; | ||
| 117 | INITCALLS | ||
| 118 | __initcall_end = .; | ||
| 119 | } | ||
| 120 | |||
| 121 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { | ||
| 122 | __con_initcall_start = .; | ||
| 123 | *(.con_initcall.init) | ||
| 124 | __con_initcall_end = .; | ||
| 125 | } | ||
| 126 | |||
| 127 | SECURITY_INIT | ||
| 128 | 74 | ||
| 129 | #ifdef CONFIG_BLK_DEV_INITRD | 75 | . = ALIGN(PAGE_SIZE); /* Init code and data */ |
| 130 | . = ALIGN(PAGE_SIZE); | 76 | __init_begin = .; |
| 131 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { | 77 | INIT_TEXT_SECTION(PAGE_SIZE) |
| 132 | __initramfs_start = .; | 78 | INIT_DATA_SECTION(16) |
| 133 | *(.init.ramfs) | ||
| 134 | __initramfs_end = .; | ||
| 135 | } | ||
| 136 | #endif | ||
| 137 | 79 | ||
| 138 | . = ALIGN(4); | 80 | . = ALIGN(4); |
| 139 | .machvec.init : AT(ADDR(.machvec.init) - LOAD_OFFSET) { | 81 | .machvec.init : AT(ADDR(.machvec.init) - LOAD_OFFSET) { |
| @@ -152,25 +94,13 @@ SECTIONS | |||
| 152 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { EXIT_DATA } | 94 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { EXIT_DATA } |
| 153 | 95 | ||
| 154 | . = ALIGN(PAGE_SIZE); | 96 | . = ALIGN(PAGE_SIZE); |
| 155 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | 97 | __init_end = .; |
| 156 | __init_end = .; | 98 | BSS_SECTION(0, PAGE_SIZE, 4) |
| 157 | __bss_start = .; /* BSS */ | 99 | _ebss = .; /* uClinux MTD sucks */ |
| 158 | *(.bss.page_aligned) | 100 | _end = . ; |
| 159 | *(.bss) | ||
| 160 | *(COMMON) | ||
| 161 | . = ALIGN(4); | ||
| 162 | _ebss = .; /* uClinux MTD sucks */ | ||
| 163 | _end = . ; | ||
| 164 | } | ||
| 165 | 101 | ||
| 166 | STABS_DEBUG | 102 | STABS_DEBUG |
| 167 | DWARF_DEBUG | 103 | DWARF_DEBUG |
| 168 | 104 | ||
| 169 | /* | ||
| 170 | * When something in the kernel is NOT compiled as a module, the | ||
| 171 | * module cleanup code and data are put into these segments. Both | ||
| 172 | * can then be thrown away, as cleanup code is never called unless | ||
| 173 | * it's a module. | ||
| 174 | */ | ||
| 175 | DISCARDS | 105 | DISCARDS |
| 176 | } | 106 | } |
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index aaea580b65bb..a969b47c5463 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile | |||
| @@ -23,8 +23,8 @@ obj-y += io.o | |||
| 23 | memcpy-y := memcpy.o | 23 | memcpy-y := memcpy.o |
| 24 | memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o | 24 | memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o |
| 25 | 25 | ||
| 26 | lib-$(CONFIG_MMU) += copy_page.o clear_page.o | 26 | lib-$(CONFIG_MMU) += copy_page.o __clear_user.o |
| 27 | lib-$(CONFIG_FUNCTION_TRACER) += mcount.o | 27 | lib-$(CONFIG_MCOUNT) += mcount.o |
| 28 | lib-y += $(memcpy-y) $(udivsi3-y) | 28 | lib-y += $(memcpy-y) $(udivsi3-y) |
| 29 | 29 | ||
| 30 | EXTRA_CFLAGS += -Werror | 30 | EXTRA_CFLAGS += -Werror |
diff --git a/arch/sh/lib/clear_page.S b/arch/sh/lib/__clear_user.S index 8342bfbde64c..db1dca7aad14 100644 --- a/arch/sh/lib/clear_page.S +++ b/arch/sh/lib/__clear_user.S | |||
| @@ -8,56 +8,10 @@ | |||
| 8 | #include <linux/linkage.h> | 8 | #include <linux/linkage.h> |
| 9 | #include <asm/page.h> | 9 | #include <asm/page.h> |
| 10 | 10 | ||
| 11 | /* | ||
| 12 | * clear_page | ||
| 13 | * @to: P1 address | ||
| 14 | * | ||
| 15 | * void clear_page(void *to) | ||
| 16 | */ | ||
| 17 | |||
| 18 | /* | ||
| 19 | * r0 --- scratch | ||
| 20 | * r4 --- to | ||
| 21 | * r5 --- to + PAGE_SIZE | ||
| 22 | */ | ||
| 23 | ENTRY(clear_page) | ||
| 24 | mov r4,r5 | ||
| 25 | mov.l .Llimit,r0 | ||
| 26 | add r0,r5 | ||
| 27 | mov #0,r0 | ||
| 28 | ! | ||
| 29 | 1: | ||
| 30 | #if defined(CONFIG_CPU_SH4) | ||
| 31 | movca.l r0,@r4 | ||
| 32 | mov r4,r1 | ||
| 33 | #else | ||
| 34 | mov.l r0,@r4 | ||
| 35 | #endif | ||
| 36 | add #32,r4 | ||
| 37 | mov.l r0,@-r4 | ||
| 38 | mov.l r0,@-r4 | ||
| 39 | mov.l r0,@-r4 | ||
| 40 | mov.l r0,@-r4 | ||
| 41 | mov.l r0,@-r4 | ||
| 42 | mov.l r0,@-r4 | ||
| 43 | mov.l r0,@-r4 | ||
| 44 | #if defined(CONFIG_CPU_SH4) | ||
| 45 | ocbwb @r1 | ||
| 46 | #endif | ||
| 47 | cmp/eq r5,r4 | ||
| 48 | bf/s 1b | ||
| 49 | add #28,r4 | ||
| 50 | ! | ||
| 51 | rts | ||
| 52 | nop | ||
| 53 | |||
| 54 | .balign 4 | ||
| 55 | .Llimit: .long (PAGE_SIZE-28) | ||
| 56 | |||
| 57 | ENTRY(__clear_user) | 11 | ENTRY(__clear_user) |
| 58 | ! | 12 | ! |
| 59 | mov #0, r0 | 13 | mov #0, r0 |
| 60 | mov #0xe0, r1 ! 0xffffffe0 | 14 | mov #0xffffffe0, r1 |
| 61 | ! | 15 | ! |
| 62 | ! r4..(r4+31)&~32 -------- not aligned [ Area 0 ] | 16 | ! r4..(r4+31)&~32 -------- not aligned [ Area 0 ] |
| 63 | ! (r4+31)&~32..(r4+r5)&~32 -------- aligned [ Area 1 ] | 17 | ! (r4+31)&~32..(r4+r5)&~32 -------- aligned [ Area 1 ] |
diff --git a/arch/sh/lib/copy_page.S b/arch/sh/lib/copy_page.S index 43de7e8e4e17..9d7b8bc51866 100644 --- a/arch/sh/lib/copy_page.S +++ b/arch/sh/lib/copy_page.S | |||
| @@ -30,7 +30,9 @@ ENTRY(copy_page) | |||
| 30 | mov r4,r10 | 30 | mov r4,r10 |
| 31 | mov r5,r11 | 31 | mov r5,r11 |
| 32 | mov r5,r8 | 32 | mov r5,r8 |
| 33 | mov.l .Lpsz,r0 | 33 | mov #(PAGE_SIZE >> 10), r0 |
| 34 | shll8 r0 | ||
| 35 | shll2 r0 | ||
| 34 | add r0,r8 | 36 | add r0,r8 |
| 35 | ! | 37 | ! |
| 36 | 1: mov.l @r11+,r0 | 38 | 1: mov.l @r11+,r0 |
| @@ -43,7 +45,6 @@ ENTRY(copy_page) | |||
| 43 | mov.l @r11+,r7 | 45 | mov.l @r11+,r7 |
| 44 | #if defined(CONFIG_CPU_SH4) | 46 | #if defined(CONFIG_CPU_SH4) |
| 45 | movca.l r0,@r10 | 47 | movca.l r0,@r10 |
| 46 | mov r10,r0 | ||
| 47 | #else | 48 | #else |
| 48 | mov.l r0,@r10 | 49 | mov.l r0,@r10 |
| 49 | #endif | 50 | #endif |
| @@ -55,9 +56,6 @@ ENTRY(copy_page) | |||
| 55 | mov.l r3,@-r10 | 56 | mov.l r3,@-r10 |
| 56 | mov.l r2,@-r10 | 57 | mov.l r2,@-r10 |
| 57 | mov.l r1,@-r10 | 58 | mov.l r1,@-r10 |
| 58 | #if defined(CONFIG_CPU_SH4) | ||
| 59 | ocbwb @r0 | ||
| 60 | #endif | ||
| 61 | cmp/eq r11,r8 | 59 | cmp/eq r11,r8 |
| 62 | bf/s 1b | 60 | bf/s 1b |
| 63 | add #28,r10 | 61 | add #28,r10 |
| @@ -68,9 +66,6 @@ ENTRY(copy_page) | |||
| 68 | rts | 66 | rts |
| 69 | nop | 67 | nop |
| 70 | 68 | ||
| 71 | .balign 4 | ||
| 72 | .Lpsz: .long PAGE_SIZE | ||
| 73 | |||
| 74 | /* | 69 | /* |
| 75 | * __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); | 70 | * __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); |
| 76 | * Return the number of bytes NOT copied | 71 | * Return the number of bytes NOT copied |
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c index f3ddd2133e6f..faa8f86c0db4 100644 --- a/arch/sh/lib/delay.c +++ b/arch/sh/lib/delay.c | |||
| @@ -21,13 +21,14 @@ void __delay(unsigned long loops) | |||
| 21 | 21 | ||
| 22 | inline void __const_udelay(unsigned long xloops) | 22 | inline void __const_udelay(unsigned long xloops) |
| 23 | { | 23 | { |
| 24 | xloops *= 4; | ||
| 24 | __asm__("dmulu.l %0, %2\n\t" | 25 | __asm__("dmulu.l %0, %2\n\t" |
| 25 | "sts mach, %0" | 26 | "sts mach, %0" |
| 26 | : "=r" (xloops) | 27 | : "=r" (xloops) |
| 27 | : "0" (xloops), | 28 | : "0" (xloops), |
| 28 | "r" (HZ * cpu_data[raw_smp_processor_id()].loops_per_jiffy) | 29 | "r" (cpu_data[raw_smp_processor_id()].loops_per_jiffy * (HZ/4)) |
| 29 | : "macl", "mach"); | 30 | : "macl", "mach"); |
| 30 | __delay(xloops); | 31 | __delay(++xloops); |
| 31 | } | 32 | } |
| 32 | 33 | ||
| 33 | void __udelay(unsigned long usecs) | 34 | void __udelay(unsigned long usecs) |
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S index 110fbfe1831f..84a57761f17e 100644 --- a/arch/sh/lib/mcount.S +++ b/arch/sh/lib/mcount.S | |||
| @@ -1,14 +1,16 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/sh/lib/mcount.S | 2 | * arch/sh/lib/mcount.S |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2008 Paul Mundt | 4 | * Copyright (C) 2008, 2009 Paul Mundt |
| 5 | * Copyright (C) 2008 Matt Fleming | 5 | * Copyright (C) 2008, 2009 Matt Fleming |
| 6 | * | 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public | 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file "COPYING" in the main directory of this archive | 8 | * License. See the file "COPYING" in the main directory of this archive |
| 9 | * for more details. | 9 | * for more details. |
| 10 | */ | 10 | */ |
| 11 | #include <asm/ftrace.h> | 11 | #include <asm/ftrace.h> |
| 12 | #include <asm/thread_info.h> | ||
| 13 | #include <asm/asm-offsets.h> | ||
| 12 | 14 | ||
| 13 | #define MCOUNT_ENTER() \ | 15 | #define MCOUNT_ENTER() \ |
| 14 | mov.l r4, @-r15; \ | 16 | mov.l r4, @-r15; \ |
| @@ -28,6 +30,55 @@ | |||
| 28 | rts; \ | 30 | rts; \ |
| 29 | mov.l @r15+, r4 | 31 | mov.l @r15+, r4 |
| 30 | 32 | ||
| 33 | #ifdef CONFIG_STACK_DEBUG | ||
| 34 | /* | ||
| 35 | * Perform diagnostic checks on the state of the kernel stack. | ||
| 36 | * | ||
| 37 | * Check for stack overflow. If there is less than 1KB free | ||
| 38 | * then it has overflowed. | ||
| 39 | * | ||
| 40 | * Make sure the stack pointer contains a valid address. Valid | ||
| 41 | * addresses for kernel stacks are anywhere after the bss | ||
| 42 | * (after _ebss) and anywhere in init_thread_union (init_stack). | ||
| 43 | */ | ||
| 44 | #define STACK_CHECK() \ | ||
| 45 | mov #(THREAD_SIZE >> 10), r0; \ | ||
| 46 | shll8 r0; \ | ||
| 47 | shll2 r0; \ | ||
| 48 | \ | ||
| 49 | /* r1 = sp & (THREAD_SIZE - 1) */ \ | ||
| 50 | mov #-1, r1; \ | ||
| 51 | add r0, r1; \ | ||
| 52 | and r15, r1; \ | ||
| 53 | \ | ||
| 54 | mov #TI_SIZE, r3; \ | ||
| 55 | mov #(STACK_WARN >> 8), r2; \ | ||
| 56 | shll8 r2; \ | ||
| 57 | add r3, r2; \ | ||
| 58 | \ | ||
| 59 | /* Is the stack overflowing? */ \ | ||
| 60 | cmp/hi r2, r1; \ | ||
| 61 | bf stack_panic; \ | ||
| 62 | \ | ||
| 63 | /* If sp > _ebss then we're OK. */ \ | ||
| 64 | mov.l .L_ebss, r1; \ | ||
| 65 | cmp/hi r1, r15; \ | ||
| 66 | bt 1f; \ | ||
| 67 | \ | ||
| 68 | /* If sp < init_stack, we're not OK. */ \ | ||
| 69 | mov.l .L_init_thread_union, r1; \ | ||
| 70 | cmp/hs r1, r15; \ | ||
| 71 | bf stack_panic; \ | ||
| 72 | \ | ||
| 73 | /* If sp > init_stack && sp < _ebss, not OK. */ \ | ||
| 74 | add r0, r1; \ | ||
| 75 | cmp/hs r1, r15; \ | ||
| 76 | bt stack_panic; \ | ||
| 77 | 1: | ||
| 78 | #else | ||
| 79 | #define STACK_CHECK() | ||
| 80 | #endif /* CONFIG_STACK_DEBUG */ | ||
| 81 | |||
| 31 | .align 2 | 82 | .align 2 |
| 32 | .globl _mcount | 83 | .globl _mcount |
| 33 | .type _mcount,@function | 84 | .type _mcount,@function |
| @@ -35,6 +86,19 @@ | |||
| 35 | .type mcount,@function | 86 | .type mcount,@function |
| 36 | _mcount: | 87 | _mcount: |
| 37 | mcount: | 88 | mcount: |
| 89 | STACK_CHECK() | ||
| 90 | |||
| 91 | #ifndef CONFIG_FUNCTION_TRACER | ||
| 92 | rts | ||
| 93 | nop | ||
| 94 | #else | ||
| 95 | #ifndef CONFIG_DYNAMIC_FTRACE | ||
| 96 | mov.l .Lfunction_trace_stop, r0 | ||
| 97 | mov.l @r0, r0 | ||
| 98 | tst r0, r0 | ||
| 99 | bf ftrace_stub | ||
| 100 | #endif | ||
| 101 | |||
| 38 | MCOUNT_ENTER() | 102 | MCOUNT_ENTER() |
| 39 | 103 | ||
| 40 | #ifdef CONFIG_DYNAMIC_FTRACE | 104 | #ifdef CONFIG_DYNAMIC_FTRACE |
| @@ -52,16 +116,69 @@ mcount_call: | |||
| 52 | jsr @r6 | 116 | jsr @r6 |
| 53 | nop | 117 | nop |
| 54 | 118 | ||
| 119 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
| 120 | mov.l .Lftrace_graph_return, r6 | ||
| 121 | mov.l .Lftrace_stub, r7 | ||
| 122 | cmp/eq r6, r7 | ||
| 123 | bt 1f | ||
| 124 | |||
| 125 | mov.l .Lftrace_graph_caller, r0 | ||
| 126 | jmp @r0 | ||
| 127 | nop | ||
| 128 | |||
| 129 | 1: | ||
| 130 | mov.l .Lftrace_graph_entry, r6 | ||
| 131 | mov.l .Lftrace_graph_entry_stub, r7 | ||
| 132 | cmp/eq r6, r7 | ||
| 133 | bt skip_trace | ||
| 134 | |||
| 135 | mov.l .Lftrace_graph_caller, r0 | ||
| 136 | jmp @r0 | ||
| 137 | nop | ||
| 138 | |||
| 139 | .align 2 | ||
| 140 | .Lftrace_graph_return: | ||
| 141 | .long ftrace_graph_return | ||
| 142 | .Lftrace_graph_entry: | ||
| 143 | .long ftrace_graph_entry | ||
| 144 | .Lftrace_graph_entry_stub: | ||
| 145 | .long ftrace_graph_entry_stub | ||
| 146 | .Lftrace_graph_caller: | ||
| 147 | .long ftrace_graph_caller | ||
| 148 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
| 149 | |||
| 150 | .globl skip_trace | ||
| 55 | skip_trace: | 151 | skip_trace: |
| 56 | MCOUNT_LEAVE() | 152 | MCOUNT_LEAVE() |
| 57 | 153 | ||
| 58 | .align 2 | 154 | .align 2 |
| 59 | .Lftrace_trace_function: | 155 | .Lftrace_trace_function: |
| 60 | .long ftrace_trace_function | 156 | .long ftrace_trace_function |
| 61 | 157 | ||
| 62 | #ifdef CONFIG_DYNAMIC_FTRACE | 158 | #ifdef CONFIG_DYNAMIC_FTRACE |
| 159 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
| 160 | /* | ||
| 161 | * NOTE: Do not move either ftrace_graph_call or ftrace_caller | ||
| 162 | * as this will affect the calculation of GRAPH_INSN_OFFSET. | ||
| 163 | */ | ||
| 164 | .globl ftrace_graph_call | ||
| 165 | ftrace_graph_call: | ||
| 166 | mov.l .Lskip_trace, r0 | ||
| 167 | jmp @r0 | ||
| 168 | nop | ||
| 169 | |||
| 170 | .align 2 | ||
| 171 | .Lskip_trace: | ||
| 172 | .long skip_trace | ||
| 173 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
| 174 | |||
| 63 | .globl ftrace_caller | 175 | .globl ftrace_caller |
| 64 | ftrace_caller: | 176 | ftrace_caller: |
| 177 | mov.l .Lfunction_trace_stop, r0 | ||
| 178 | mov.l @r0, r0 | ||
| 179 | tst r0, r0 | ||
| 180 | bf ftrace_stub | ||
| 181 | |||
| 65 | MCOUNT_ENTER() | 182 | MCOUNT_ENTER() |
| 66 | 183 | ||
| 67 | .globl ftrace_call | 184 | .globl ftrace_call |
| @@ -70,9 +187,18 @@ ftrace_call: | |||
| 70 | jsr @r6 | 187 | jsr @r6 |
| 71 | nop | 188 | nop |
| 72 | 189 | ||
| 190 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
| 191 | bra ftrace_graph_call | ||
| 192 | nop | ||
| 193 | #else | ||
| 73 | MCOUNT_LEAVE() | 194 | MCOUNT_LEAVE() |
| 195 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
| 74 | #endif /* CONFIG_DYNAMIC_FTRACE */ | 196 | #endif /* CONFIG_DYNAMIC_FTRACE */ |
| 75 | 197 | ||
| 198 | .align 2 | ||
| 199 | .Lfunction_trace_stop: | ||
| 200 | .long function_trace_stop | ||
| 201 | |||
| 76 | /* | 202 | /* |
| 77 | * NOTE: From here on the locations of the .Lftrace_stub label and | 203 | * NOTE: From here on the locations of the .Lftrace_stub label and |
| 78 | * ftrace_stub itself are fixed. Adding additional data here will skew | 204 | * ftrace_stub itself are fixed. Adding additional data here will skew |
| @@ -80,7 +206,6 @@ ftrace_call: | |||
| 80 | * Place new labels either after the ftrace_stub body, or before | 206 | * Place new labels either after the ftrace_stub body, or before |
| 81 | * ftrace_caller. You have been warned. | 207 | * ftrace_caller. You have been warned. |
| 82 | */ | 208 | */ |
| 83 | .align 2 | ||
| 84 | .Lftrace_stub: | 209 | .Lftrace_stub: |
| 85 | .long ftrace_stub | 210 | .long ftrace_stub |
| 86 | 211 | ||
| @@ -88,3 +213,98 @@ ftrace_call: | |||
| 88 | ftrace_stub: | 213 | ftrace_stub: |
| 89 | rts | 214 | rts |
| 90 | nop | 215 | nop |
| 216 | |||
| 217 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
| 218 | .globl ftrace_graph_caller | ||
| 219 | ftrace_graph_caller: | ||
| 220 | mov.l 2f, r0 | ||
| 221 | mov.l @r0, r0 | ||
| 222 | tst r0, r0 | ||
| 223 | bt 1f | ||
| 224 | |||
| 225 | mov.l 3f, r1 | ||
| 226 | jmp @r1 | ||
| 227 | nop | ||
| 228 | 1: | ||
| 229 | /* | ||
| 230 | * MCOUNT_ENTER() pushed 5 registers onto the stack, so | ||
| 231 | * the stack address containing our return address is | ||
| 232 | * r15 + 20. | ||
| 233 | */ | ||
| 234 | mov #20, r0 | ||
| 235 | add r15, r0 | ||
| 236 | mov r0, r4 | ||
| 237 | |||
| 238 | mov.l .Lprepare_ftrace_return, r0 | ||
| 239 | jsr @r0 | ||
| 240 | nop | ||
| 241 | |||
| 242 | MCOUNT_LEAVE() | ||
| 243 | |||
| 244 | .align 2 | ||
| 245 | 2: .long function_trace_stop | ||
| 246 | 3: .long skip_trace | ||
| 247 | .Lprepare_ftrace_return: | ||
| 248 | .long prepare_ftrace_return | ||
| 249 | |||
| 250 | .globl return_to_handler | ||
| 251 | return_to_handler: | ||
| 252 | /* | ||
| 253 | * Save the return values. | ||
| 254 | */ | ||
| 255 | mov.l r0, @-r15 | ||
| 256 | mov.l r1, @-r15 | ||
| 257 | |||
| 258 | mov #0, r4 | ||
| 259 | |||
| 260 | mov.l .Lftrace_return_to_handler, r0 | ||
| 261 | jsr @r0 | ||
| 262 | nop | ||
| 263 | |||
| 264 | /* | ||
| 265 | * The return value from ftrace_return_handler has the real | ||
| 266 | * address that we should return to. | ||
| 267 | */ | ||
| 268 | lds r0, pr | ||
| 269 | mov.l @r15+, r1 | ||
| 270 | rts | ||
| 271 | mov.l @r15+, r0 | ||
| 272 | |||
| 273 | |||
| 274 | .align 2 | ||
| 275 | .Lftrace_return_to_handler: | ||
| 276 | .long ftrace_return_to_handler | ||
| 277 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
| 278 | #endif /* CONFIG_FUNCTION_TRACER */ | ||
| 279 | |||
| 280 | #ifdef CONFIG_STACK_DEBUG | ||
| 281 | .globl stack_panic | ||
| 282 | stack_panic: | ||
| 283 | mov.l .Ldump_stack, r0 | ||
| 284 | jsr @r0 | ||
| 285 | nop | ||
| 286 | |||
| 287 | mov.l .Lpanic, r0 | ||
| 288 | jsr @r0 | ||
| 289 | mov.l .Lpanic_s, r4 | ||
| 290 | |||
| 291 | rts | ||
| 292 | nop | ||
| 293 | |||
| 294 | .align 2 | ||
| 295 | .L_ebss: | ||
| 296 | .long _ebss | ||
| 297 | .L_init_thread_union: | ||
| 298 | .long init_thread_union | ||
| 299 | .Lpanic: | ||
| 300 | .long panic | ||
| 301 | .Lpanic_s: | ||
| 302 | .long .Lpanic_str | ||
| 303 | .Ldump_stack: | ||
| 304 | .long dump_stack | ||
| 305 | |||
| 306 | .section .rodata | ||
| 307 | .align 2 | ||
| 308 | .Lpanic_str: | ||
| 309 | .string "Stack error" | ||
| 310 | #endif /* CONFIG_STACK_DEBUG */ | ||
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile index 334bb2da36ea..1fee75aa1f98 100644 --- a/arch/sh/lib64/Makefile +++ b/arch/sh/lib64/Makefile | |||
| @@ -11,7 +11,7 @@ | |||
| 11 | 11 | ||
| 12 | # Panic should really be compiled as PIC | 12 | # Panic should really be compiled as PIC |
| 13 | lib-y := udelay.o dbg.o panic.o memcpy.o memset.o \ | 13 | lib-y := udelay.o dbg.o panic.o memcpy.o memset.o \ |
| 14 | copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o | 14 | copy_user_memcpy.o copy_page.o strcpy.o strlen.o |
| 15 | 15 | ||
| 16 | # Extracted from libgcc | 16 | # Extracted from libgcc |
| 17 | lib-y += udivsi3.o udivdi3.o sdivsi3.o | 17 | lib-y += udivsi3.o udivdi3.o sdivsi3.o |
diff --git a/arch/sh/lib64/clear_page.S b/arch/sh/lib64/clear_page.S deleted file mode 100644 index 007ab48ecc1c..000000000000 --- a/arch/sh/lib64/clear_page.S +++ /dev/null | |||
| @@ -1,54 +0,0 @@ | |||
| 1 | /* | ||
| 2 | Copyright 2003 Richard Curnow, SuperH (UK) Ltd. | ||
| 3 | |||
| 4 | This file is subject to the terms and conditions of the GNU General Public | ||
| 5 | License. See the file "COPYING" in the main directory of this archive | ||
| 6 | for more details. | ||
| 7 | |||
| 8 | Tight version of memset for the case of just clearing a page. It turns out | ||
| 9 | that having the alloco's spaced out slightly due to the increment/branch | ||
| 10 | pair causes them to contend less for access to the cache. Similarly, | ||
| 11 | keeping the stores apart from the allocos causes less contention. => Do two | ||
| 12 | separate loops. Do multiple stores per loop to amortise the | ||
| 13 | increment/branch cost a little. | ||
| 14 | |||
| 15 | Parameters: | ||
| 16 | r2 : source effective address (start of page) | ||
| 17 | |||
| 18 | Always clears 4096 bytes. | ||
| 19 | |||
| 20 | Note : alloco guarded by synco to avoid TAKum03020 erratum | ||
| 21 | |||
| 22 | */ | ||
| 23 | |||
| 24 | .section .text..SHmedia32,"ax" | ||
| 25 | .little | ||
| 26 | |||
| 27 | .balign 8 | ||
| 28 | .global clear_page | ||
| 29 | clear_page: | ||
| 30 | pta/l 1f, tr1 | ||
| 31 | pta/l 2f, tr2 | ||
| 32 | ptabs/l r18, tr0 | ||
| 33 | |||
| 34 | movi 4096, r7 | ||
| 35 | add r2, r7, r7 | ||
| 36 | add r2, r63, r6 | ||
| 37 | 1: | ||
| 38 | alloco r6, 0 | ||
| 39 | synco ! TAKum03020 | ||
| 40 | addi r6, 32, r6 | ||
| 41 | bgt/l r7, r6, tr1 | ||
| 42 | |||
| 43 | add r2, r63, r6 | ||
| 44 | 2: | ||
| 45 | st.q r6, 0, r63 | ||
| 46 | st.q r6, 8, r63 | ||
| 47 | st.q r6, 16, r63 | ||
| 48 | st.q r6, 24, r63 | ||
| 49 | addi r6, 32, r6 | ||
| 50 | bgt/l r7, r6, tr2 | ||
| 51 | |||
| 52 | blink tr0, r63 | ||
| 53 | |||
| 54 | |||
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 2795618e4f07..64dc1ad59801 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig | |||
| @@ -82,7 +82,7 @@ config 32BIT | |||
| 82 | 82 | ||
| 83 | config PMB_ENABLE | 83 | config PMB_ENABLE |
| 84 | bool "Support 32-bit physical addressing through PMB" | 84 | bool "Support 32-bit physical addressing through PMB" |
| 85 | depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) | 85 | depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) |
| 86 | select 32BIT | 86 | select 32BIT |
| 87 | default y | 87 | default y |
| 88 | help | 88 | help |
| @@ -97,7 +97,7 @@ choice | |||
| 97 | 97 | ||
| 98 | config PMB | 98 | config PMB |
| 99 | bool "PMB" | 99 | bool "PMB" |
| 100 | depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) | 100 | depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) |
| 101 | select 32BIT | 101 | select 32BIT |
| 102 | help | 102 | help |
| 103 | If you say Y here, physical addressing will be extended to | 103 | If you say Y here, physical addressing will be extended to |
| @@ -106,7 +106,8 @@ config PMB | |||
| 106 | 106 | ||
| 107 | config PMB_FIXED | 107 | config PMB_FIXED |
| 108 | bool "fixed PMB" | 108 | bool "fixed PMB" |
| 109 | depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || \ | 109 | depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || \ |
| 110 | CPU_SUBTYPE_SH7780 || \ | ||
| 110 | CPU_SUBTYPE_SH7785) | 111 | CPU_SUBTYPE_SH7785) |
| 111 | select 32BIT | 112 | select 32BIT |
| 112 | help | 113 | help |
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile index 9f4bc3d90b1e..3759bf853293 100644 --- a/arch/sh/mm/Makefile +++ b/arch/sh/mm/Makefile | |||
| @@ -1,5 +1,65 @@ | |||
| 1 | ifeq ($(CONFIG_SUPERH32),y) | 1 | # |
| 2 | include ${srctree}/arch/sh/mm/Makefile_32 | 2 | # Makefile for the Linux SuperH-specific parts of the memory manager. |
| 3 | else | 3 | # |
| 4 | include ${srctree}/arch/sh/mm/Makefile_64 | 4 | |
| 5 | obj-y := cache.o init.o consistent.o mmap.o | ||
| 6 | |||
| 7 | cacheops-$(CONFIG_CPU_SH2) := cache-sh2.o | ||
| 8 | cacheops-$(CONFIG_CPU_SH2A) := cache-sh2a.o | ||
| 9 | cacheops-$(CONFIG_CPU_SH3) := cache-sh3.o | ||
| 10 | cacheops-$(CONFIG_CPU_SH4) := cache-sh4.o flush-sh4.o | ||
| 11 | cacheops-$(CONFIG_CPU_SH5) := cache-sh5.o flush-sh4.o | ||
| 12 | cacheops-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o | ||
| 13 | |||
| 14 | obj-y += $(cacheops-y) | ||
| 15 | |||
| 16 | mmu-y := nommu.o extable_32.o | ||
| 17 | mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \ | ||
| 18 | ioremap_$(BITS).o kmap.o tlbflush_$(BITS).o | ||
| 19 | |||
| 20 | obj-y += $(mmu-y) | ||
| 21 | obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o | ||
| 22 | |||
| 23 | ifdef CONFIG_DEBUG_FS | ||
| 24 | obj-$(CONFIG_CPU_SH4) += cache-debugfs.o | ||
| 5 | endif | 25 | endif |
| 26 | |||
| 27 | ifdef CONFIG_MMU | ||
| 28 | tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o | ||
| 29 | tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o | ||
| 30 | tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o | ||
| 31 | tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o | ||
| 32 | obj-y += $(tlb-y) | ||
| 33 | endif | ||
| 34 | |||
| 35 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o | ||
| 36 | obj-$(CONFIG_PMB) += pmb.o | ||
| 37 | obj-$(CONFIG_PMB_FIXED) += pmb-fixed.o | ||
| 38 | obj-$(CONFIG_NUMA) += numa.o | ||
| 39 | |||
| 40 | # Special flags for fault_64.o. This puts restrictions on the number of | ||
| 41 | # caller-save registers that the compiler can target when building this file. | ||
| 42 | # This is required because the code is called from a context in entry.S where | ||
| 43 | # very few registers have been saved in the exception handler (for speed | ||
| 44 | # reasons). | ||
| 45 | # The caller save registers that have been saved and which can be used are | ||
| 46 | # r2,r3,r4,r5 : argument passing | ||
| 47 | # r15, r18 : SP and LINK | ||
| 48 | # tr0-4 : allow all caller-save TR's. The compiler seems to be able to make | ||
| 49 | # use of them, so it's probably beneficial to performance to save them | ||
| 50 | # and have them available for it. | ||
| 51 | # | ||
| 52 | # The resources not listed below are callee save, i.e. the compiler is free to | ||
| 53 | # use any of them and will spill them to the stack itself. | ||
| 54 | |||
| 55 | CFLAGS_fault_64.o += -ffixed-r7 \ | ||
| 56 | -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \ | ||
| 57 | -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \ | ||
| 58 | -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \ | ||
| 59 | -ffixed-r24 -ffixed-r25 -ffixed-r26 -ffixed-r27 \ | ||
| 60 | -ffixed-r36 -ffixed-r37 -ffixed-r38 -ffixed-r39 -ffixed-r40 \ | ||
| 61 | -ffixed-r41 -ffixed-r42 -ffixed-r43 \ | ||
| 62 | -ffixed-r60 -ffixed-r61 -ffixed-r62 \ | ||
| 63 | -fomit-frame-pointer | ||
| 64 | |||
| 65 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32 deleted file mode 100644 index 986a1e055834..000000000000 --- a/arch/sh/mm/Makefile_32 +++ /dev/null | |||
| @@ -1,43 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the Linux SuperH-specific parts of the memory manager. | ||
| 3 | # | ||
| 4 | |||
| 5 | obj-y := init.o extable_32.o consistent.o mmap.o | ||
| 6 | |||
| 7 | ifndef CONFIG_CACHE_OFF | ||
| 8 | cache-$(CONFIG_CPU_SH2) := cache-sh2.o | ||
| 9 | cache-$(CONFIG_CPU_SH2A) := cache-sh2a.o | ||
| 10 | cache-$(CONFIG_CPU_SH3) := cache-sh3.o | ||
| 11 | cache-$(CONFIG_CPU_SH4) := cache-sh4.o | ||
| 12 | cache-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o | ||
| 13 | endif | ||
| 14 | |||
| 15 | obj-y += $(cache-y) | ||
| 16 | |||
| 17 | mmu-y := tlb-nommu.o pg-nommu.o | ||
| 18 | mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o | ||
| 19 | |||
| 20 | obj-y += $(mmu-y) | ||
| 21 | obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o | ||
| 22 | |||
| 23 | ifdef CONFIG_DEBUG_FS | ||
| 24 | obj-$(CONFIG_CPU_SH4) += cache-debugfs.o | ||
| 25 | endif | ||
| 26 | |||
| 27 | ifdef CONFIG_MMU | ||
| 28 | tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o | ||
| 29 | tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o | ||
| 30 | tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o | ||
| 31 | obj-y += $(tlb-y) | ||
| 32 | ifndef CONFIG_CACHE_OFF | ||
| 33 | obj-$(CONFIG_CPU_SH4) += pg-sh4.o | ||
| 34 | obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o | ||
| 35 | endif | ||
| 36 | endif | ||
| 37 | |||
| 38 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o | ||
| 39 | obj-$(CONFIG_PMB) += pmb.o | ||
| 40 | obj-$(CONFIG_PMB_FIXED) += pmb-fixed.o | ||
| 41 | obj-$(CONFIG_NUMA) += numa.o | ||
| 42 | |||
| 43 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64 deleted file mode 100644 index 2863ffb7006d..000000000000 --- a/arch/sh/mm/Makefile_64 +++ /dev/null | |||
| @@ -1,46 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the Linux SuperH-specific parts of the memory manager. | ||
| 3 | # | ||
| 4 | |||
| 5 | obj-y := init.o consistent.o mmap.o | ||
| 6 | |||
| 7 | mmu-y := tlb-nommu.o pg-nommu.o extable_32.o | ||
| 8 | mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \ | ||
| 9 | extable_64.o | ||
| 10 | |||
| 11 | ifndef CONFIG_CACHE_OFF | ||
| 12 | obj-y += cache-sh5.o | ||
| 13 | endif | ||
| 14 | |||
| 15 | obj-y += $(mmu-y) | ||
| 16 | obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o | ||
| 17 | |||
| 18 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o | ||
| 19 | obj-$(CONFIG_NUMA) += numa.o | ||
| 20 | |||
| 21 | EXTRA_CFLAGS += -Werror | ||
| 22 | |||
| 23 | # Special flags for fault_64.o. This puts restrictions on the number of | ||
| 24 | # caller-save registers that the compiler can target when building this file. | ||
| 25 | # This is required because the code is called from a context in entry.S where | ||
| 26 | # very few registers have been saved in the exception handler (for speed | ||
| 27 | # reasons). | ||
| 28 | # The caller save registers that have been saved and which can be used are | ||
| 29 | # r2,r3,r4,r5 : argument passing | ||
| 30 | # r15, r18 : SP and LINK | ||
| 31 | # tr0-4 : allow all caller-save TR's. The compiler seems to be able to make | ||
| 32 | # use of them, so it's probably beneficial to performance to save them | ||
| 33 | # and have them available for it. | ||
| 34 | # | ||
| 35 | # The resources not listed below are callee save, i.e. the compiler is free to | ||
| 36 | # use any of them and will spill them to the stack itself. | ||
| 37 | |||
| 38 | CFLAGS_fault_64.o += -ffixed-r7 \ | ||
| 39 | -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \ | ||
| 40 | -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \ | ||
| 41 | -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \ | ||
| 42 | -ffixed-r24 -ffixed-r25 -ffixed-r26 -ffixed-r27 \ | ||
| 43 | -ffixed-r36 -ffixed-r37 -ffixed-r38 -ffixed-r39 -ffixed-r40 \ | ||
| 44 | -ffixed-r41 -ffixed-r42 -ffixed-r43 \ | ||
| 45 | -ffixed-r60 -ffixed-r61 -ffixed-r62 \ | ||
| 46 | -fomit-frame-pointer | ||
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c index c4e80d2b764b..699a71f46327 100644 --- a/arch/sh/mm/cache-sh2.c +++ b/arch/sh/mm/cache-sh2.c | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | #include <asm/cacheflush.h> | 16 | #include <asm/cacheflush.h> |
| 17 | #include <asm/io.h> | 17 | #include <asm/io.h> |
| 18 | 18 | ||
| 19 | void __flush_wback_region(void *start, int size) | 19 | static void sh2__flush_wback_region(void *start, int size) |
| 20 | { | 20 | { |
| 21 | unsigned long v; | 21 | unsigned long v; |
| 22 | unsigned long begin, end; | 22 | unsigned long begin, end; |
| @@ -37,7 +37,7 @@ void __flush_wback_region(void *start, int size) | |||
| 37 | } | 37 | } |
| 38 | } | 38 | } |
| 39 | 39 | ||
| 40 | void __flush_purge_region(void *start, int size) | 40 | static void sh2__flush_purge_region(void *start, int size) |
| 41 | { | 41 | { |
| 42 | unsigned long v; | 42 | unsigned long v; |
| 43 | unsigned long begin, end; | 43 | unsigned long begin, end; |
| @@ -51,7 +51,7 @@ void __flush_purge_region(void *start, int size) | |||
| 51 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); | 51 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); |
| 52 | } | 52 | } |
| 53 | 53 | ||
| 54 | void __flush_invalidate_region(void *start, int size) | 54 | static void sh2__flush_invalidate_region(void *start, int size) |
| 55 | { | 55 | { |
| 56 | #ifdef CONFIG_CACHE_WRITEBACK | 56 | #ifdef CONFIG_CACHE_WRITEBACK |
| 57 | /* | 57 | /* |
| @@ -82,3 +82,10 @@ void __flush_invalidate_region(void *start, int size) | |||
| 82 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); | 82 | CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008); |
| 83 | #endif | 83 | #endif |
| 84 | } | 84 | } |
| 85 | |||
| 86 | void __init sh2_cache_init(void) | ||
| 87 | { | ||
| 88 | __flush_wback_region = sh2__flush_wback_region; | ||
| 89 | __flush_purge_region = sh2__flush_purge_region; | ||
| 90 | __flush_invalidate_region = sh2__flush_invalidate_region; | ||
| 91 | } | ||
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c index 24d86a794065..975899d83564 100644 --- a/arch/sh/mm/cache-sh2a.c +++ b/arch/sh/mm/cache-sh2a.c | |||
| @@ -15,7 +15,7 @@ | |||
| 15 | #include <asm/cacheflush.h> | 15 | #include <asm/cacheflush.h> |
| 16 | #include <asm/io.h> | 16 | #include <asm/io.h> |
| 17 | 17 | ||
| 18 | void __flush_wback_region(void *start, int size) | 18 | static void sh2a__flush_wback_region(void *start, int size) |
| 19 | { | 19 | { |
| 20 | unsigned long v; | 20 | unsigned long v; |
| 21 | unsigned long begin, end; | 21 | unsigned long begin, end; |
| @@ -44,7 +44,7 @@ void __flush_wback_region(void *start, int size) | |||
| 44 | local_irq_restore(flags); | 44 | local_irq_restore(flags); |
| 45 | } | 45 | } |
| 46 | 46 | ||
| 47 | void __flush_purge_region(void *start, int size) | 47 | static void sh2a__flush_purge_region(void *start, int size) |
| 48 | { | 48 | { |
| 49 | unsigned long v; | 49 | unsigned long v; |
| 50 | unsigned long begin, end; | 50 | unsigned long begin, end; |
| @@ -65,7 +65,7 @@ void __flush_purge_region(void *start, int size) | |||
| 65 | local_irq_restore(flags); | 65 | local_irq_restore(flags); |
| 66 | } | 66 | } |
| 67 | 67 | ||
| 68 | void __flush_invalidate_region(void *start, int size) | 68 | static void sh2a__flush_invalidate_region(void *start, int size) |
| 69 | { | 69 | { |
| 70 | unsigned long v; | 70 | unsigned long v; |
| 71 | unsigned long begin, end; | 71 | unsigned long begin, end; |
| @@ -97,13 +97,15 @@ void __flush_invalidate_region(void *start, int size) | |||
| 97 | } | 97 | } |
| 98 | 98 | ||
| 99 | /* WBack O-Cache and flush I-Cache */ | 99 | /* WBack O-Cache and flush I-Cache */ |
| 100 | void flush_icache_range(unsigned long start, unsigned long end) | 100 | static void sh2a_flush_icache_range(void *args) |
| 101 | { | 101 | { |
| 102 | struct flusher_data *data = args; | ||
| 103 | unsigned long start, end; | ||
| 102 | unsigned long v; | 104 | unsigned long v; |
| 103 | unsigned long flags; | 105 | unsigned long flags; |
| 104 | 106 | ||
| 105 | start = start & ~(L1_CACHE_BYTES-1); | 107 | start = data->addr1 & ~(L1_CACHE_BYTES-1); |
| 106 | end = (end + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1); | 108 | end = (data->addr2 + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1); |
| 107 | 109 | ||
| 108 | local_irq_save(flags); | 110 | local_irq_save(flags); |
| 109 | jump_to_uncached(); | 111 | jump_to_uncached(); |
| @@ -127,3 +129,12 @@ void flush_icache_range(unsigned long start, unsigned long end) | |||
| 127 | back_to_cached(); | 129 | back_to_cached(); |
| 128 | local_irq_restore(flags); | 130 | local_irq_restore(flags); |
| 129 | } | 131 | } |
| 132 | |||
| 133 | void __init sh2a_cache_init(void) | ||
| 134 | { | ||
| 135 | local_flush_icache_range = sh2a_flush_icache_range; | ||
| 136 | |||
| 137 | __flush_wback_region = sh2a__flush_wback_region; | ||
| 138 | __flush_purge_region = sh2a__flush_purge_region; | ||
| 139 | __flush_invalidate_region = sh2a__flush_invalidate_region; | ||
| 140 | } | ||
diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c index 6d1dbec08ad4..faef80c98134 100644 --- a/arch/sh/mm/cache-sh3.c +++ b/arch/sh/mm/cache-sh3.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | * SIZE: Size of the region. | 32 | * SIZE: Size of the region. |
| 33 | */ | 33 | */ |
| 34 | 34 | ||
| 35 | void __flush_wback_region(void *start, int size) | 35 | static void sh3__flush_wback_region(void *start, int size) |
| 36 | { | 36 | { |
| 37 | unsigned long v, j; | 37 | unsigned long v, j; |
| 38 | unsigned long begin, end; | 38 | unsigned long begin, end; |
| @@ -71,7 +71,7 @@ void __flush_wback_region(void *start, int size) | |||
| 71 | * START: Virtual Address (U0, P1, or P3) | 71 | * START: Virtual Address (U0, P1, or P3) |
| 72 | * SIZE: Size of the region. | 72 | * SIZE: Size of the region. |
| 73 | */ | 73 | */ |
| 74 | void __flush_purge_region(void *start, int size) | 74 | static void sh3__flush_purge_region(void *start, int size) |
| 75 | { | 75 | { |
| 76 | unsigned long v; | 76 | unsigned long v; |
| 77 | unsigned long begin, end; | 77 | unsigned long begin, end; |
| @@ -90,11 +90,16 @@ void __flush_purge_region(void *start, int size) | |||
| 90 | } | 90 | } |
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | /* | 93 | void __init sh3_cache_init(void) |
| 94 | * No write back please | 94 | { |
| 95 | * | 95 | __flush_wback_region = sh3__flush_wback_region; |
| 96 | * Except I don't think there's any way to avoid the writeback. So we | 96 | __flush_purge_region = sh3__flush_purge_region; |
| 97 | * just alias it to __flush_purge_region(). dwmw2. | 97 | |
| 98 | */ | 98 | /* |
| 99 | void __flush_invalidate_region(void *start, int size) | 99 | * No write back please |
| 100 | __attribute__((alias("__flush_purge_region"))); | 100 | * |
| 101 | * Except I don't think there's any way to avoid the writeback. | ||
| 102 | * So we just alias it to sh3__flush_purge_region(). dwmw2. | ||
| 103 | */ | ||
| 104 | __flush_invalidate_region = sh3__flush_purge_region; | ||
| 105 | } | ||
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 5cfe08dbb59e..b2453bbef4cd 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
| 15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
| 16 | #include <linux/mutex.h> | 16 | #include <linux/mutex.h> |
| 17 | #include <linux/fs.h> | ||
| 17 | #include <asm/mmu_context.h> | 18 | #include <asm/mmu_context.h> |
| 18 | #include <asm/cacheflush.h> | 19 | #include <asm/cacheflush.h> |
| 19 | 20 | ||
| @@ -25,13 +26,6 @@ | |||
| 25 | #define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */ | 26 | #define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */ |
| 26 | #define MAX_ICACHE_PAGES 32 | 27 | #define MAX_ICACHE_PAGES 32 |
| 27 | 28 | ||
| 28 | static void __flush_dcache_segment_1way(unsigned long start, | ||
| 29 | unsigned long extent); | ||
| 30 | static void __flush_dcache_segment_2way(unsigned long start, | ||
| 31 | unsigned long extent); | ||
| 32 | static void __flush_dcache_segment_4way(unsigned long start, | ||
| 33 | unsigned long extent); | ||
| 34 | |||
| 35 | static void __flush_cache_4096(unsigned long addr, unsigned long phys, | 29 | static void __flush_cache_4096(unsigned long addr, unsigned long phys, |
| 36 | unsigned long exec_offset); | 30 | unsigned long exec_offset); |
| 37 | 31 | ||
| @@ -43,182 +37,56 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys, | |||
| 43 | static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) = | 37 | static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) = |
| 44 | (void (*)(unsigned long, unsigned long))0xdeadbeef; | 38 | (void (*)(unsigned long, unsigned long))0xdeadbeef; |
| 45 | 39 | ||
| 46 | static void compute_alias(struct cache_info *c) | 40 | /* |
| 41 | * Write back the range of D-cache, and purge the I-cache. | ||
| 42 | * | ||
| 43 | * Called from kernel/module.c:sys_init_module and routine for a.out format, | ||
| 44 | * signal handler code and kprobes code | ||
| 45 | */ | ||
| 46 | static void sh4_flush_icache_range(void *args) | ||
| 47 | { | 47 | { |
| 48 | c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1); | 48 | struct flusher_data *data = args; |
| 49 | c->n_aliases = c->alias_mask ? (c->alias_mask >> PAGE_SHIFT) + 1 : 0; | 49 | unsigned long start, end; |
| 50 | } | 50 | unsigned long flags, v; |
| 51 | int i; | ||
| 51 | 52 | ||
| 52 | static void __init emit_cache_params(void) | 53 | start = data->addr1; |
| 53 | { | 54 | end = data->addr2; |
| 54 | printk("PVR=%08x CVR=%08x PRR=%08x\n", | ||
| 55 | ctrl_inl(CCN_PVR), | ||
| 56 | ctrl_inl(CCN_CVR), | ||
| 57 | ctrl_inl(CCN_PRR)); | ||
| 58 | printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n", | ||
| 59 | boot_cpu_data.icache.ways, | ||
| 60 | boot_cpu_data.icache.sets, | ||
| 61 | boot_cpu_data.icache.way_incr); | ||
| 62 | printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", | ||
| 63 | boot_cpu_data.icache.entry_mask, | ||
| 64 | boot_cpu_data.icache.alias_mask, | ||
| 65 | boot_cpu_data.icache.n_aliases); | ||
| 66 | printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n", | ||
| 67 | boot_cpu_data.dcache.ways, | ||
| 68 | boot_cpu_data.dcache.sets, | ||
| 69 | boot_cpu_data.dcache.way_incr); | ||
| 70 | printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", | ||
| 71 | boot_cpu_data.dcache.entry_mask, | ||
| 72 | boot_cpu_data.dcache.alias_mask, | ||
| 73 | boot_cpu_data.dcache.n_aliases); | ||
| 74 | 55 | ||
| 75 | /* | 56 | /* If there are too many pages then just blow away the caches */ |
| 76 | * Emit Secondary Cache parameters if the CPU has a probed L2. | 57 | if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) { |
| 77 | */ | 58 | local_flush_cache_all(NULL); |
| 78 | if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) { | 59 | return; |
| 79 | printk("S-cache : n_ways=%d n_sets=%d way_incr=%d\n", | ||
| 80 | boot_cpu_data.scache.ways, | ||
| 81 | boot_cpu_data.scache.sets, | ||
| 82 | boot_cpu_data.scache.way_incr); | ||
| 83 | printk("S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", | ||
| 84 | boot_cpu_data.scache.entry_mask, | ||
| 85 | boot_cpu_data.scache.alias_mask, | ||
| 86 | boot_cpu_data.scache.n_aliases); | ||
| 87 | } | 60 | } |
| 88 | 61 | ||
| 89 | if (!__flush_dcache_segment_fn) | 62 | /* |
| 90 | panic("unknown number of cache ways\n"); | 63 | * Selectively flush d-cache then invalidate the i-cache. |
| 91 | } | 64 | * This is inefficient, so only use this for small ranges. |
| 65 | */ | ||
| 66 | start &= ~(L1_CACHE_BYTES-1); | ||
| 67 | end += L1_CACHE_BYTES-1; | ||
| 68 | end &= ~(L1_CACHE_BYTES-1); | ||
| 92 | 69 | ||
| 93 | /* | 70 | local_irq_save(flags); |
| 94 | * SH-4 has virtually indexed and physically tagged cache. | 71 | jump_to_uncached(); |
| 95 | */ | ||
| 96 | void __init p3_cache_init(void) | ||
| 97 | { | ||
| 98 | compute_alias(&boot_cpu_data.icache); | ||
| 99 | compute_alias(&boot_cpu_data.dcache); | ||
| 100 | compute_alias(&boot_cpu_data.scache); | ||
| 101 | |||
| 102 | switch (boot_cpu_data.dcache.ways) { | ||
| 103 | case 1: | ||
| 104 | __flush_dcache_segment_fn = __flush_dcache_segment_1way; | ||
| 105 | break; | ||
| 106 | case 2: | ||
| 107 | __flush_dcache_segment_fn = __flush_dcache_segment_2way; | ||
| 108 | break; | ||
| 109 | case 4: | ||
| 110 | __flush_dcache_segment_fn = __flush_dcache_segment_4way; | ||
| 111 | break; | ||
| 112 | default: | ||
| 113 | __flush_dcache_segment_fn = NULL; | ||
| 114 | break; | ||
| 115 | } | ||
| 116 | 72 | ||
| 117 | emit_cache_params(); | 73 | for (v = start; v < end; v += L1_CACHE_BYTES) { |
| 118 | } | 74 | unsigned long icacheaddr; |
| 119 | 75 | ||
| 120 | /* | 76 | __ocbwb(v); |
| 121 | * Write back the dirty D-caches, but not invalidate them. | ||
| 122 | * | ||
| 123 | * START: Virtual Address (U0, P1, or P3) | ||
| 124 | * SIZE: Size of the region. | ||
| 125 | */ | ||
| 126 | void __flush_wback_region(void *start, int size) | ||
| 127 | { | ||
| 128 | unsigned long v; | ||
| 129 | unsigned long begin, end; | ||
| 130 | |||
| 131 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | ||
| 132 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | ||
| 133 | & ~(L1_CACHE_BYTES-1); | ||
| 134 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | ||
| 135 | asm volatile("ocbwb %0" | ||
| 136 | : /* no output */ | ||
| 137 | : "m" (__m(v))); | ||
| 138 | } | ||
| 139 | } | ||
| 140 | 77 | ||
| 141 | /* | 78 | icacheaddr = CACHE_IC_ADDRESS_ARRAY | (v & |
| 142 | * Write back the dirty D-caches and invalidate them. | 79 | cpu_data->icache.entry_mask); |
| 143 | * | ||
| 144 | * START: Virtual Address (U0, P1, or P3) | ||
| 145 | * SIZE: Size of the region. | ||
| 146 | */ | ||
| 147 | void __flush_purge_region(void *start, int size) | ||
| 148 | { | ||
| 149 | unsigned long v; | ||
| 150 | unsigned long begin, end; | ||
| 151 | |||
| 152 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | ||
| 153 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | ||
| 154 | & ~(L1_CACHE_BYTES-1); | ||
| 155 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | ||
| 156 | asm volatile("ocbp %0" | ||
| 157 | : /* no output */ | ||
| 158 | : "m" (__m(v))); | ||
| 159 | } | ||
| 160 | } | ||
| 161 | 80 | ||
| 162 | /* | 81 | /* Clear i-cache line valid-bit */ |
| 163 | * No write back please | 82 | for (i = 0; i < cpu_data->icache.ways; i++) { |
| 164 | */ | 83 | __raw_writel(0, icacheaddr); |
| 165 | void __flush_invalidate_region(void *start, int size) | 84 | icacheaddr += cpu_data->icache.way_incr; |
| 166 | { | 85 | } |
| 167 | unsigned long v; | ||
| 168 | unsigned long begin, end; | ||
| 169 | |||
| 170 | begin = (unsigned long)start & ~(L1_CACHE_BYTES-1); | ||
| 171 | end = ((unsigned long)start + size + L1_CACHE_BYTES-1) | ||
| 172 | & ~(L1_CACHE_BYTES-1); | ||
| 173 | for (v = begin; v < end; v+=L1_CACHE_BYTES) { | ||
| 174 | asm volatile("ocbi %0" | ||
| 175 | : /* no output */ | ||
| 176 | : "m" (__m(v))); | ||
| 177 | } | 86 | } |
| 178 | } | ||
| 179 | |||
| 180 | /* | ||
| 181 | * Write back the range of D-cache, and purge the I-cache. | ||
| 182 | * | ||
| 183 | * Called from kernel/module.c:sys_init_module and routine for a.out format, | ||
| 184 | * signal handler code and kprobes code | ||
| 185 | */ | ||
| 186 | void flush_icache_range(unsigned long start, unsigned long end) | ||
| 187 | { | ||
| 188 | int icacheaddr; | ||
| 189 | unsigned long flags, v; | ||
| 190 | int i; | ||
| 191 | 87 | ||
| 192 | /* If there are too many pages then just blow the caches */ | 88 | back_to_cached(); |
| 193 | if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) { | 89 | local_irq_restore(flags); |
| 194 | flush_cache_all(); | ||
| 195 | } else { | ||
| 196 | /* selectively flush d-cache then invalidate the i-cache */ | ||
| 197 | /* this is inefficient, so only use for small ranges */ | ||
| 198 | start &= ~(L1_CACHE_BYTES-1); | ||
| 199 | end += L1_CACHE_BYTES-1; | ||
| 200 | end &= ~(L1_CACHE_BYTES-1); | ||
| 201 | |||
| 202 | local_irq_save(flags); | ||
| 203 | jump_to_uncached(); | ||
| 204 | |||
| 205 | for (v = start; v < end; v+=L1_CACHE_BYTES) { | ||
| 206 | asm volatile("ocbwb %0" | ||
| 207 | : /* no output */ | ||
| 208 | : "m" (__m(v))); | ||
| 209 | |||
| 210 | icacheaddr = CACHE_IC_ADDRESS_ARRAY | ( | ||
| 211 | v & cpu_data->icache.entry_mask); | ||
| 212 | |||
| 213 | for (i = 0; i < cpu_data->icache.ways; | ||
| 214 | i++, icacheaddr += cpu_data->icache.way_incr) | ||
| 215 | /* Clear i-cache line valid-bit */ | ||
| 216 | ctrl_outl(0, icacheaddr); | ||
| 217 | } | ||
| 218 | |||
| 219 | back_to_cached(); | ||
| 220 | local_irq_restore(flags); | ||
| 221 | } | ||
| 222 | } | 90 | } |
| 223 | 91 | ||
| 224 | static inline void flush_cache_4096(unsigned long start, | 92 | static inline void flush_cache_4096(unsigned long start, |
| @@ -244,9 +112,17 @@ static inline void flush_cache_4096(unsigned long start, | |||
| 244 | * Write back & invalidate the D-cache of the page. | 112 | * Write back & invalidate the D-cache of the page. |
| 245 | * (To avoid "alias" issues) | 113 | * (To avoid "alias" issues) |
| 246 | */ | 114 | */ |
| 247 | void flush_dcache_page(struct page *page) | 115 | static void sh4_flush_dcache_page(void *arg) |
| 248 | { | 116 | { |
| 249 | if (test_bit(PG_mapped, &page->flags)) { | 117 | struct page *page = arg; |
| 118 | #ifndef CONFIG_SMP | ||
| 119 | struct address_space *mapping = page_mapping(page); | ||
| 120 | |||
| 121 | if (mapping && !mapping_mapped(mapping)) | ||
| 122 | set_bit(PG_dcache_dirty, &page->flags); | ||
| 123 | else | ||
| 124 | #endif | ||
| 125 | { | ||
| 250 | unsigned long phys = PHYSADDR(page_address(page)); | 126 | unsigned long phys = PHYSADDR(page_address(page)); |
| 251 | unsigned long addr = CACHE_OC_ADDRESS_ARRAY; | 127 | unsigned long addr = CACHE_OC_ADDRESS_ARRAY; |
| 252 | int i, n; | 128 | int i, n; |
| @@ -282,13 +158,13 @@ static void __uses_jump_to_uncached flush_icache_all(void) | |||
| 282 | local_irq_restore(flags); | 158 | local_irq_restore(flags); |
| 283 | } | 159 | } |
| 284 | 160 | ||
| 285 | void flush_dcache_all(void) | 161 | static inline void flush_dcache_all(void) |
| 286 | { | 162 | { |
| 287 | (*__flush_dcache_segment_fn)(0UL, boot_cpu_data.dcache.way_size); | 163 | (*__flush_dcache_segment_fn)(0UL, boot_cpu_data.dcache.way_size); |
| 288 | wmb(); | 164 | wmb(); |
| 289 | } | 165 | } |
| 290 | 166 | ||
| 291 | void flush_cache_all(void) | 167 | static void sh4_flush_cache_all(void *unused) |
| 292 | { | 168 | { |
| 293 | flush_dcache_all(); | 169 | flush_dcache_all(); |
| 294 | flush_icache_all(); | 170 | flush_icache_all(); |
| @@ -380,8 +256,13 @@ loop_exit: | |||
| 380 | * | 256 | * |
| 381 | * Caller takes mm->mmap_sem. | 257 | * Caller takes mm->mmap_sem. |
| 382 | */ | 258 | */ |
| 383 | void flush_cache_mm(struct mm_struct *mm) | 259 | static void sh4_flush_cache_mm(void *arg) |
| 384 | { | 260 | { |
| 261 | struct mm_struct *mm = arg; | ||
| 262 | |||
| 263 | if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT) | ||
| 264 | return; | ||
| 265 | |||
| 385 | /* | 266 | /* |
| 386 | * If cache is only 4k-per-way, there are never any 'aliases'. Since | 267 | * If cache is only 4k-per-way, there are never any 'aliases'. Since |
| 387 | * the cache is physically tagged, the data can just be left in there. | 268 | * the cache is physically tagged, the data can just be left in there. |
| @@ -417,12 +298,21 @@ void flush_cache_mm(struct mm_struct *mm) | |||
| 417 | * ADDR: Virtual Address (U0 address) | 298 | * ADDR: Virtual Address (U0 address) |
| 418 | * PFN: Physical page number | 299 | * PFN: Physical page number |
| 419 | */ | 300 | */ |
| 420 | void flush_cache_page(struct vm_area_struct *vma, unsigned long address, | 301 | static void sh4_flush_cache_page(void *args) |
| 421 | unsigned long pfn) | ||
| 422 | { | 302 | { |
| 423 | unsigned long phys = pfn << PAGE_SHIFT; | 303 | struct flusher_data *data = args; |
| 304 | struct vm_area_struct *vma; | ||
| 305 | unsigned long address, pfn, phys; | ||
| 424 | unsigned int alias_mask; | 306 | unsigned int alias_mask; |
| 425 | 307 | ||
| 308 | vma = data->vma; | ||
| 309 | address = data->addr1; | ||
| 310 | pfn = data->addr2; | ||
| 311 | phys = pfn << PAGE_SHIFT; | ||
| 312 | |||
| 313 | if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) | ||
| 314 | return; | ||
| 315 | |||
| 426 | alias_mask = boot_cpu_data.dcache.alias_mask; | 316 | alias_mask = boot_cpu_data.dcache.alias_mask; |
| 427 | 317 | ||
| 428 | /* We only need to flush D-cache when we have alias */ | 318 | /* We only need to flush D-cache when we have alias */ |
| @@ -462,9 +352,19 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address, | |||
| 462 | * Flushing the cache lines for U0 only isn't enough. | 352 | * Flushing the cache lines for U0 only isn't enough. |
| 463 | * We need to flush for P1 too, which may contain aliases. | 353 | * We need to flush for P1 too, which may contain aliases. |
| 464 | */ | 354 | */ |
| 465 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | 355 | static void sh4_flush_cache_range(void *args) |
| 466 | unsigned long end) | ||
| 467 | { | 356 | { |
| 357 | struct flusher_data *data = args; | ||
| 358 | struct vm_area_struct *vma; | ||
| 359 | unsigned long start, end; | ||
| 360 | |||
| 361 | vma = data->vma; | ||
| 362 | start = data->addr1; | ||
| 363 | end = data->addr2; | ||
| 364 | |||
| 365 | if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) | ||
| 366 | return; | ||
| 367 | |||
| 468 | /* | 368 | /* |
| 469 | * If cache is only 4k-per-way, there are never any 'aliases'. Since | 369 | * If cache is only 4k-per-way, there are never any 'aliases'. Since |
| 470 | * the cache is physically tagged, the data can just be left in there. | 370 | * the cache is physically tagged, the data can just be left in there. |
| @@ -492,20 +392,6 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | |||
| 492 | } | 392 | } |
| 493 | } | 393 | } |
| 494 | 394 | ||
| 495 | /* | ||
| 496 | * flush_icache_user_range | ||
| 497 | * @vma: VMA of the process | ||
| 498 | * @page: page | ||
| 499 | * @addr: U0 address | ||
| 500 | * @len: length of the range (< page size) | ||
| 501 | */ | ||
| 502 | void flush_icache_user_range(struct vm_area_struct *vma, | ||
| 503 | struct page *page, unsigned long addr, int len) | ||
| 504 | { | ||
| 505 | flush_cache_page(vma, addr, page_to_pfn(page)); | ||
| 506 | mb(); | ||
| 507 | } | ||
| 508 | |||
| 509 | /** | 395 | /** |
| 510 | * __flush_cache_4096 | 396 | * __flush_cache_4096 |
| 511 | * | 397 | * |
| @@ -581,7 +467,49 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys, | |||
| 581 | * Break the 1, 2 and 4 way variants of this out into separate functions to | 467 | * Break the 1, 2 and 4 way variants of this out into separate functions to |
| 582 | * avoid nearly all the overhead of having the conditional stuff in the function | 468 | * avoid nearly all the overhead of having the conditional stuff in the function |
| 583 | * bodies (+ the 1 and 2 way cases avoid saving any registers too). | 469 | * bodies (+ the 1 and 2 way cases avoid saving any registers too). |
| 470 | * | ||
| 471 | * We want to eliminate unnecessary bus transactions, so this code uses | ||
| 472 | * a non-obvious technique. | ||
| 473 | * | ||
| 474 | * Loop over a cache way sized block of, one cache line at a time. For each | ||
| 475 | * line, use movca.a to cause the current cache line contents to be written | ||
| 476 | * back, but without reading anything from main memory. However this has the | ||
| 477 | * side effect that the cache is now caching that memory location. So follow | ||
| 478 | * this with a cache invalidate to mark the cache line invalid. And do all | ||
| 479 | * this with interrupts disabled, to avoid the cache line being accidently | ||
| 480 | * evicted while it is holding garbage. | ||
| 481 | * | ||
| 482 | * This also breaks in a number of circumstances: | ||
| 483 | * - if there are modifications to the region of memory just above | ||
| 484 | * empty_zero_page (for example because a breakpoint has been placed | ||
| 485 | * there), then these can be lost. | ||
| 486 | * | ||
| 487 | * This is because the the memory address which the cache temporarily | ||
| 488 | * caches in the above description is empty_zero_page. So the | ||
| 489 | * movca.l hits the cache (it is assumed that it misses, or at least | ||
| 490 | * isn't dirty), modifies the line and then invalidates it, losing the | ||
| 491 | * required change. | ||
| 492 | * | ||
| 493 | * - If caches are disabled or configured in write-through mode, then | ||
| 494 | * the movca.l writes garbage directly into memory. | ||
| 584 | */ | 495 | */ |
| 496 | static void __flush_dcache_segment_writethrough(unsigned long start, | ||
| 497 | unsigned long extent_per_way) | ||
| 498 | { | ||
| 499 | unsigned long addr; | ||
| 500 | int i; | ||
| 501 | |||
| 502 | addr = CACHE_OC_ADDRESS_ARRAY | (start & cpu_data->dcache.entry_mask); | ||
| 503 | |||
| 504 | while (extent_per_way) { | ||
| 505 | for (i = 0; i < cpu_data->dcache.ways; i++) | ||
| 506 | __raw_writel(0, addr + cpu_data->dcache.way_incr * i); | ||
| 507 | |||
| 508 | addr += cpu_data->dcache.linesz; | ||
| 509 | extent_per_way -= cpu_data->dcache.linesz; | ||
| 510 | } | ||
| 511 | } | ||
| 512 | |||
| 585 | static void __flush_dcache_segment_1way(unsigned long start, | 513 | static void __flush_dcache_segment_1way(unsigned long start, |
| 586 | unsigned long extent_per_way) | 514 | unsigned long extent_per_way) |
| 587 | { | 515 | { |
| @@ -773,3 +701,47 @@ static void __flush_dcache_segment_4way(unsigned long start, | |||
| 773 | a3 += linesz; | 701 | a3 += linesz; |
| 774 | } while (a0 < a0e); | 702 | } while (a0 < a0e); |
| 775 | } | 703 | } |
| 704 | |||
| 705 | extern void __weak sh4__flush_region_init(void); | ||
| 706 | |||
| 707 | /* | ||
| 708 | * SH-4 has virtually indexed and physically tagged cache. | ||
| 709 | */ | ||
| 710 | void __init sh4_cache_init(void) | ||
| 711 | { | ||
| 712 | unsigned int wt_enabled = !!(__raw_readl(CCR) & CCR_CACHE_WT); | ||
| 713 | |||
| 714 | printk("PVR=%08x CVR=%08x PRR=%08x\n", | ||
| 715 | ctrl_inl(CCN_PVR), | ||
| 716 | ctrl_inl(CCN_CVR), | ||
| 717 | ctrl_inl(CCN_PRR)); | ||
| 718 | |||
| 719 | if (wt_enabled) | ||
| 720 | __flush_dcache_segment_fn = __flush_dcache_segment_writethrough; | ||
| 721 | else { | ||
| 722 | switch (boot_cpu_data.dcache.ways) { | ||
| 723 | case 1: | ||
| 724 | __flush_dcache_segment_fn = __flush_dcache_segment_1way; | ||
| 725 | break; | ||
| 726 | case 2: | ||
| 727 | __flush_dcache_segment_fn = __flush_dcache_segment_2way; | ||
| 728 | break; | ||
| 729 | case 4: | ||
| 730 | __flush_dcache_segment_fn = __flush_dcache_segment_4way; | ||
| 731 | break; | ||
| 732 | default: | ||
| 733 | panic("unknown number of cache ways\n"); | ||
| 734 | break; | ||
| 735 | } | ||
| 736 | } | ||
| 737 | |||
| 738 | local_flush_icache_range = sh4_flush_icache_range; | ||
| 739 | local_flush_dcache_page = sh4_flush_dcache_page; | ||
| 740 | local_flush_cache_all = sh4_flush_cache_all; | ||
| 741 | local_flush_cache_mm = sh4_flush_cache_mm; | ||
| 742 | local_flush_cache_dup_mm = sh4_flush_cache_mm; | ||
| 743 | local_flush_cache_page = sh4_flush_cache_page; | ||
| 744 | local_flush_cache_range = sh4_flush_cache_range; | ||
| 745 | |||
| 746 | sh4__flush_region_init(); | ||
| 747 | } | ||
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c index 86762092508c..467ff8e260f7 100644 --- a/arch/sh/mm/cache-sh5.c +++ b/arch/sh/mm/cache-sh5.c | |||
| @@ -20,23 +20,11 @@ | |||
| 20 | #include <asm/uaccess.h> | 20 | #include <asm/uaccess.h> |
| 21 | #include <asm/mmu_context.h> | 21 | #include <asm/mmu_context.h> |
| 22 | 22 | ||
| 23 | extern void __weak sh4__flush_region_init(void); | ||
| 24 | |||
| 23 | /* Wired TLB entry for the D-cache */ | 25 | /* Wired TLB entry for the D-cache */ |
| 24 | static unsigned long long dtlb_cache_slot; | 26 | static unsigned long long dtlb_cache_slot; |
| 25 | 27 | ||
| 26 | void __init p3_cache_init(void) | ||
| 27 | { | ||
| 28 | /* Reserve a slot for dcache colouring in the DTLB */ | ||
| 29 | dtlb_cache_slot = sh64_get_wired_dtlb_entry(); | ||
| 30 | } | ||
| 31 | |||
| 32 | #ifdef CONFIG_DCACHE_DISABLED | ||
| 33 | #define sh64_dcache_purge_all() do { } while (0) | ||
| 34 | #define sh64_dcache_purge_coloured_phy_page(paddr, eaddr) do { } while (0) | ||
| 35 | #define sh64_dcache_purge_user_range(mm, start, end) do { } while (0) | ||
| 36 | #define sh64_dcache_purge_phy_page(paddr) do { } while (0) | ||
| 37 | #define sh64_dcache_purge_virt_page(mm, eaddr) do { } while (0) | ||
| 38 | #endif | ||
| 39 | |||
| 40 | /* | 28 | /* |
| 41 | * The following group of functions deal with mapping and unmapping a | 29 | * The following group of functions deal with mapping and unmapping a |
| 42 | * temporary page into a DTLB slot that has been set aside for exclusive | 30 | * temporary page into a DTLB slot that has been set aside for exclusive |
| @@ -56,7 +44,6 @@ static inline void sh64_teardown_dtlb_cache_slot(void) | |||
| 56 | local_irq_enable(); | 44 | local_irq_enable(); |
| 57 | } | 45 | } |
| 58 | 46 | ||
| 59 | #ifndef CONFIG_ICACHE_DISABLED | ||
| 60 | static inline void sh64_icache_inv_all(void) | 47 | static inline void sh64_icache_inv_all(void) |
| 61 | { | 48 | { |
| 62 | unsigned long long addr, flag, data; | 49 | unsigned long long addr, flag, data; |
| @@ -214,52 +201,6 @@ static void sh64_icache_inv_user_page_range(struct mm_struct *mm, | |||
| 214 | } | 201 | } |
| 215 | } | 202 | } |
| 216 | 203 | ||
| 217 | /* | ||
| 218 | * Invalidate a small range of user context I-cache, not necessarily page | ||
| 219 | * (or even cache-line) aligned. | ||
| 220 | * | ||
| 221 | * Since this is used inside ptrace, the ASID in the mm context typically | ||
| 222 | * won't match current_asid. We'll have to switch ASID to do this. For | ||
| 223 | * safety, and given that the range will be small, do all this under cli. | ||
| 224 | * | ||
| 225 | * Note, there is a hazard that the ASID in mm->context is no longer | ||
| 226 | * actually associated with mm, i.e. if the mm->context has started a new | ||
| 227 | * cycle since mm was last active. However, this is just a performance | ||
| 228 | * issue: all that happens is that we invalidate lines belonging to | ||
| 229 | * another mm, so the owning process has to refill them when that mm goes | ||
| 230 | * live again. mm itself can't have any cache entries because there will | ||
| 231 | * have been a flush_cache_all when the new mm->context cycle started. | ||
| 232 | */ | ||
| 233 | static void sh64_icache_inv_user_small_range(struct mm_struct *mm, | ||
| 234 | unsigned long start, int len) | ||
| 235 | { | ||
| 236 | unsigned long long eaddr = start; | ||
| 237 | unsigned long long eaddr_end = start + len; | ||
| 238 | unsigned long current_asid, mm_asid; | ||
| 239 | unsigned long flags; | ||
| 240 | unsigned long long epage_start; | ||
| 241 | |||
| 242 | /* | ||
| 243 | * Align to start of cache line. Otherwise, suppose len==8 and | ||
| 244 | * start was at 32N+28 : the last 4 bytes wouldn't get invalidated. | ||
| 245 | */ | ||
| 246 | eaddr = L1_CACHE_ALIGN(start); | ||
| 247 | eaddr_end = start + len; | ||
| 248 | |||
| 249 | mm_asid = cpu_asid(smp_processor_id(), mm); | ||
| 250 | local_irq_save(flags); | ||
| 251 | current_asid = switch_and_save_asid(mm_asid); | ||
| 252 | |||
| 253 | epage_start = eaddr & PAGE_MASK; | ||
| 254 | |||
| 255 | while (eaddr < eaddr_end) { | ||
| 256 | __asm__ __volatile__("icbi %0, 0" : : "r" (eaddr)); | ||
| 257 | eaddr += L1_CACHE_BYTES; | ||
| 258 | } | ||
| 259 | switch_and_save_asid(current_asid); | ||
| 260 | local_irq_restore(flags); | ||
| 261 | } | ||
| 262 | |||
| 263 | static void sh64_icache_inv_current_user_range(unsigned long start, unsigned long end) | 204 | static void sh64_icache_inv_current_user_range(unsigned long start, unsigned long end) |
| 264 | { | 205 | { |
| 265 | /* The icbi instruction never raises ITLBMISS. i.e. if there's not a | 206 | /* The icbi instruction never raises ITLBMISS. i.e. if there's not a |
| @@ -287,9 +228,7 @@ static void sh64_icache_inv_current_user_range(unsigned long start, unsigned lon | |||
| 287 | addr += L1_CACHE_BYTES; | 228 | addr += L1_CACHE_BYTES; |
| 288 | } | 229 | } |
| 289 | } | 230 | } |
| 290 | #endif /* !CONFIG_ICACHE_DISABLED */ | ||
| 291 | 231 | ||
| 292 | #ifndef CONFIG_DCACHE_DISABLED | ||
| 293 | /* Buffer used as the target of alloco instructions to purge data from cache | 232 | /* Buffer used as the target of alloco instructions to purge data from cache |
| 294 | sets by natural eviction. -- RPC */ | 233 | sets by natural eviction. -- RPC */ |
| 295 | #define DUMMY_ALLOCO_AREA_SIZE ((L1_CACHE_BYTES << 10) + (1024 * 4)) | 234 | #define DUMMY_ALLOCO_AREA_SIZE ((L1_CACHE_BYTES << 10) + (1024 * 4)) |
| @@ -541,59 +480,10 @@ static void sh64_dcache_purge_user_range(struct mm_struct *mm, | |||
| 541 | } | 480 | } |
| 542 | 481 | ||
| 543 | /* | 482 | /* |
| 544 | * Purge the range of addresses from the D-cache. | ||
| 545 | * | ||
| 546 | * The addresses lie in the superpage mapping. There's no harm if we | ||
| 547 | * overpurge at either end - just a small performance loss. | ||
| 548 | */ | ||
| 549 | void __flush_purge_region(void *start, int size) | ||
| 550 | { | ||
| 551 | unsigned long long ullend, addr, aligned_start; | ||
| 552 | |||
| 553 | aligned_start = (unsigned long long)(signed long long)(signed long) start; | ||
| 554 | addr = L1_CACHE_ALIGN(aligned_start); | ||
| 555 | ullend = (unsigned long long) (signed long long) (signed long) start + size; | ||
| 556 | |||
| 557 | while (addr <= ullend) { | ||
| 558 | __asm__ __volatile__ ("ocbp %0, 0" : : "r" (addr)); | ||
| 559 | addr += L1_CACHE_BYTES; | ||
| 560 | } | ||
| 561 | } | ||
| 562 | |||
| 563 | void __flush_wback_region(void *start, int size) | ||
| 564 | { | ||
| 565 | unsigned long long ullend, addr, aligned_start; | ||
| 566 | |||
| 567 | aligned_start = (unsigned long long)(signed long long)(signed long) start; | ||
| 568 | addr = L1_CACHE_ALIGN(aligned_start); | ||
| 569 | ullend = (unsigned long long) (signed long long) (signed long) start + size; | ||
| 570 | |||
| 571 | while (addr < ullend) { | ||
| 572 | __asm__ __volatile__ ("ocbwb %0, 0" : : "r" (addr)); | ||
| 573 | addr += L1_CACHE_BYTES; | ||
| 574 | } | ||
| 575 | } | ||
| 576 | |||
| 577 | void __flush_invalidate_region(void *start, int size) | ||
| 578 | { | ||
| 579 | unsigned long long ullend, addr, aligned_start; | ||
| 580 | |||
| 581 | aligned_start = (unsigned long long)(signed long long)(signed long) start; | ||
| 582 | addr = L1_CACHE_ALIGN(aligned_start); | ||
| 583 | ullend = (unsigned long long) (signed long long) (signed long) start + size; | ||
| 584 | |||
| 585 | while (addr < ullend) { | ||
| 586 | __asm__ __volatile__ ("ocbi %0, 0" : : "r" (addr)); | ||
| 587 | addr += L1_CACHE_BYTES; | ||
| 588 | } | ||
| 589 | } | ||
| 590 | #endif /* !CONFIG_DCACHE_DISABLED */ | ||
| 591 | |||
| 592 | /* | ||
| 593 | * Invalidate the entire contents of both caches, after writing back to | 483 | * Invalidate the entire contents of both caches, after writing back to |
| 594 | * memory any dirty data from the D-cache. | 484 | * memory any dirty data from the D-cache. |
| 595 | */ | 485 | */ |
| 596 | void flush_cache_all(void) | 486 | static void sh5_flush_cache_all(void *unused) |
| 597 | { | 487 | { |
| 598 | sh64_dcache_purge_all(); | 488 | sh64_dcache_purge_all(); |
| 599 | sh64_icache_inv_all(); | 489 | sh64_icache_inv_all(); |
| @@ -620,7 +510,7 @@ void flush_cache_all(void) | |||
| 620 | * I-cache. This is similar to the lack of action needed in | 510 | * I-cache. This is similar to the lack of action needed in |
| 621 | * flush_tlb_mm - see fault.c. | 511 | * flush_tlb_mm - see fault.c. |
| 622 | */ | 512 | */ |
| 623 | void flush_cache_mm(struct mm_struct *mm) | 513 | static void sh5_flush_cache_mm(void *unused) |
| 624 | { | 514 | { |
| 625 | sh64_dcache_purge_all(); | 515 | sh64_dcache_purge_all(); |
| 626 | } | 516 | } |
| @@ -632,13 +522,18 @@ void flush_cache_mm(struct mm_struct *mm) | |||
| 632 | * | 522 | * |
| 633 | * Note, 'end' is 1 byte beyond the end of the range to flush. | 523 | * Note, 'end' is 1 byte beyond the end of the range to flush. |
| 634 | */ | 524 | */ |
| 635 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | 525 | static void sh5_flush_cache_range(void *args) |
| 636 | unsigned long end) | ||
| 637 | { | 526 | { |
| 638 | struct mm_struct *mm = vma->vm_mm; | 527 | struct flusher_data *data = args; |
| 528 | struct vm_area_struct *vma; | ||
| 529 | unsigned long start, end; | ||
| 530 | |||
| 531 | vma = data->vma; | ||
| 532 | start = data->addr1; | ||
| 533 | end = data->addr2; | ||
| 639 | 534 | ||
| 640 | sh64_dcache_purge_user_range(mm, start, end); | 535 | sh64_dcache_purge_user_range(vma->vm_mm, start, end); |
| 641 | sh64_icache_inv_user_page_range(mm, start, end); | 536 | sh64_icache_inv_user_page_range(vma->vm_mm, start, end); |
| 642 | } | 537 | } |
| 643 | 538 | ||
| 644 | /* | 539 | /* |
| @@ -650,16 +545,23 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | |||
| 650 | * | 545 | * |
| 651 | * Note, this is called with pte lock held. | 546 | * Note, this is called with pte lock held. |
| 652 | */ | 547 | */ |
| 653 | void flush_cache_page(struct vm_area_struct *vma, unsigned long eaddr, | 548 | static void sh5_flush_cache_page(void *args) |
| 654 | unsigned long pfn) | ||
| 655 | { | 549 | { |
| 550 | struct flusher_data *data = args; | ||
| 551 | struct vm_area_struct *vma; | ||
| 552 | unsigned long eaddr, pfn; | ||
| 553 | |||
| 554 | vma = data->vma; | ||
| 555 | eaddr = data->addr1; | ||
| 556 | pfn = data->addr2; | ||
| 557 | |||
| 656 | sh64_dcache_purge_phy_page(pfn << PAGE_SHIFT); | 558 | sh64_dcache_purge_phy_page(pfn << PAGE_SHIFT); |
| 657 | 559 | ||
| 658 | if (vma->vm_flags & VM_EXEC) | 560 | if (vma->vm_flags & VM_EXEC) |
| 659 | sh64_icache_inv_user_page(vma, eaddr); | 561 | sh64_icache_inv_user_page(vma, eaddr); |
| 660 | } | 562 | } |
| 661 | 563 | ||
| 662 | void flush_dcache_page(struct page *page) | 564 | static void sh5_flush_dcache_page(void *page) |
| 663 | { | 565 | { |
| 664 | sh64_dcache_purge_phy_page(page_to_phys(page)); | 566 | sh64_dcache_purge_phy_page(page_to_phys(page)); |
| 665 | wmb(); | 567 | wmb(); |
| @@ -673,162 +575,47 @@ void flush_dcache_page(struct page *page) | |||
| 673 | * mapping, therefore it's guaranteed that there no cache entries for | 575 | * mapping, therefore it's guaranteed that there no cache entries for |
| 674 | * the range in cache sets of the wrong colour. | 576 | * the range in cache sets of the wrong colour. |
| 675 | */ | 577 | */ |
| 676 | void flush_icache_range(unsigned long start, unsigned long end) | 578 | static void sh5_flush_icache_range(void *args) |
| 677 | { | 579 | { |
| 580 | struct flusher_data *data = args; | ||
| 581 | unsigned long start, end; | ||
| 582 | |||
| 583 | start = data->addr1; | ||
| 584 | end = data->addr2; | ||
| 585 | |||
| 678 | __flush_purge_region((void *)start, end); | 586 | __flush_purge_region((void *)start, end); |
| 679 | wmb(); | 587 | wmb(); |
| 680 | sh64_icache_inv_kernel_range(start, end); | 588 | sh64_icache_inv_kernel_range(start, end); |
| 681 | } | 589 | } |
| 682 | 590 | ||
| 683 | /* | 591 | /* |
| 684 | * Flush the range of user (defined by vma->vm_mm) address space starting | ||
| 685 | * at 'addr' for 'len' bytes from the cache. The range does not straddle | ||
| 686 | * a page boundary, the unique physical page containing the range is | ||
| 687 | * 'page'. This seems to be used mainly for invalidating an address | ||
| 688 | * range following a poke into the program text through the ptrace() call | ||
| 689 | * from another process (e.g. for BRK instruction insertion). | ||
| 690 | */ | ||
| 691 | void flush_icache_user_range(struct vm_area_struct *vma, | ||
| 692 | struct page *page, unsigned long addr, int len) | ||
| 693 | { | ||
| 694 | |||
| 695 | sh64_dcache_purge_coloured_phy_page(page_to_phys(page), addr); | ||
| 696 | mb(); | ||
| 697 | |||
| 698 | if (vma->vm_flags & VM_EXEC) | ||
| 699 | sh64_icache_inv_user_small_range(vma->vm_mm, addr, len); | ||
| 700 | } | ||
| 701 | |||
| 702 | /* | ||
| 703 | * For the address range [start,end), write back the data from the | 592 | * For the address range [start,end), write back the data from the |
| 704 | * D-cache and invalidate the corresponding region of the I-cache for the | 593 | * D-cache and invalidate the corresponding region of the I-cache for the |
| 705 | * current process. Used to flush signal trampolines on the stack to | 594 | * current process. Used to flush signal trampolines on the stack to |
| 706 | * make them executable. | 595 | * make them executable. |
| 707 | */ | 596 | */ |
| 708 | void flush_cache_sigtramp(unsigned long vaddr) | 597 | static void sh5_flush_cache_sigtramp(void *vaddr) |
| 709 | { | 598 | { |
| 710 | unsigned long end = vaddr + L1_CACHE_BYTES; | 599 | unsigned long end = (unsigned long)vaddr + L1_CACHE_BYTES; |
| 711 | 600 | ||
| 712 | __flush_wback_region((void *)vaddr, L1_CACHE_BYTES); | 601 | __flush_wback_region(vaddr, L1_CACHE_BYTES); |
| 713 | wmb(); | 602 | wmb(); |
| 714 | sh64_icache_inv_current_user_range(vaddr, end); | 603 | sh64_icache_inv_current_user_range((unsigned long)vaddr, end); |
| 715 | } | 604 | } |
| 716 | 605 | ||
| 717 | #ifdef CONFIG_MMU | 606 | void __init sh5_cache_init(void) |
| 718 | /* | ||
| 719 | * These *MUST* lie in an area of virtual address space that's otherwise | ||
| 720 | * unused. | ||
| 721 | */ | ||
| 722 | #define UNIQUE_EADDR_START 0xe0000000UL | ||
| 723 | #define UNIQUE_EADDR_END 0xe8000000UL | ||
| 724 | |||
| 725 | /* | ||
| 726 | * Given a physical address paddr, and a user virtual address user_eaddr | ||
| 727 | * which will eventually be mapped to it, create a one-off kernel-private | ||
| 728 | * eaddr mapped to the same paddr. This is used for creating special | ||
| 729 | * destination pages for copy_user_page and clear_user_page. | ||
| 730 | */ | ||
| 731 | static unsigned long sh64_make_unique_eaddr(unsigned long user_eaddr, | ||
| 732 | unsigned long paddr) | ||
| 733 | { | ||
| 734 | static unsigned long current_pointer = UNIQUE_EADDR_START; | ||
| 735 | unsigned long coloured_pointer; | ||
| 736 | |||
| 737 | if (current_pointer == UNIQUE_EADDR_END) { | ||
| 738 | sh64_dcache_purge_all(); | ||
| 739 | current_pointer = UNIQUE_EADDR_START; | ||
| 740 | } | ||
| 741 | |||
| 742 | coloured_pointer = (current_pointer & ~CACHE_OC_SYN_MASK) | | ||
| 743 | (user_eaddr & CACHE_OC_SYN_MASK); | ||
| 744 | sh64_setup_dtlb_cache_slot(coloured_pointer, get_asid(), paddr); | ||
| 745 | |||
| 746 | current_pointer += (PAGE_SIZE << CACHE_OC_N_SYNBITS); | ||
| 747 | |||
| 748 | return coloured_pointer; | ||
| 749 | } | ||
| 750 | |||
| 751 | static void sh64_copy_user_page_coloured(void *to, void *from, | ||
| 752 | unsigned long address) | ||
| 753 | { | 607 | { |
| 754 | void *coloured_to; | 608 | local_flush_cache_all = sh5_flush_cache_all; |
| 609 | local_flush_cache_mm = sh5_flush_cache_mm; | ||
| 610 | local_flush_cache_dup_mm = sh5_flush_cache_mm; | ||
| 611 | local_flush_cache_page = sh5_flush_cache_page; | ||
| 612 | local_flush_cache_range = sh5_flush_cache_range; | ||
| 613 | local_flush_dcache_page = sh5_flush_dcache_page; | ||
| 614 | local_flush_icache_range = sh5_flush_icache_range; | ||
| 615 | local_flush_cache_sigtramp = sh5_flush_cache_sigtramp; | ||
| 755 | 616 | ||
| 756 | /* | 617 | /* Reserve a slot for dcache colouring in the DTLB */ |
| 757 | * Discard any existing cache entries of the wrong colour. These are | 618 | dtlb_cache_slot = sh64_get_wired_dtlb_entry(); |
| 758 | * present quite often, if the kernel has recently used the page | ||
| 759 | * internally, then given it up, then it's been allocated to the user. | ||
| 760 | */ | ||
| 761 | sh64_dcache_purge_coloured_phy_page(__pa(to), (unsigned long)to); | ||
| 762 | |||
| 763 | coloured_to = (void *)sh64_make_unique_eaddr(address, __pa(to)); | ||
| 764 | copy_page(from, coloured_to); | ||
| 765 | |||
| 766 | sh64_teardown_dtlb_cache_slot(); | ||
| 767 | } | ||
| 768 | |||
| 769 | static void sh64_clear_user_page_coloured(void *to, unsigned long address) | ||
| 770 | { | ||
| 771 | void *coloured_to; | ||
| 772 | |||
| 773 | /* | ||
| 774 | * Discard any existing kernel-originated lines of the wrong | ||
| 775 | * colour (as above) | ||
| 776 | */ | ||
| 777 | sh64_dcache_purge_coloured_phy_page(__pa(to), (unsigned long)to); | ||
| 778 | |||
| 779 | coloured_to = (void *)sh64_make_unique_eaddr(address, __pa(to)); | ||
| 780 | clear_page(coloured_to); | ||
| 781 | |||
| 782 | sh64_teardown_dtlb_cache_slot(); | ||
| 783 | } | ||
| 784 | |||
| 785 | /* | ||
| 786 | * 'from' and 'to' are kernel virtual addresses (within the superpage | ||
| 787 | * mapping of the physical RAM). 'address' is the user virtual address | ||
| 788 | * where the copy 'to' will be mapped after. This allows a custom | ||
| 789 | * mapping to be used to ensure that the new copy is placed in the | ||
| 790 | * right cache sets for the user to see it without having to bounce it | ||
| 791 | * out via memory. Note however : the call to flush_page_to_ram in | ||
| 792 | * (generic)/mm/memory.c:(break_cow) undoes all this good work in that one | ||
| 793 | * very important case! | ||
| 794 | * | ||
| 795 | * TBD : can we guarantee that on every call, any cache entries for | ||
| 796 | * 'from' are in the same colour sets as 'address' also? i.e. is this | ||
| 797 | * always used just to deal with COW? (I suspect not). | ||
| 798 | * | ||
| 799 | * There are two possibilities here for when the page 'from' was last accessed: | ||
| 800 | * - by the kernel : this is OK, no purge required. | ||
| 801 | * - by the/a user (e.g. for break_COW) : need to purge. | ||
| 802 | * | ||
| 803 | * If the potential user mapping at 'address' is the same colour as | ||
| 804 | * 'from' there is no need to purge any cache lines from the 'from' | ||
| 805 | * page mapped into cache sets of colour 'address'. (The copy will be | ||
| 806 | * accessing the page through 'from'). | ||
| 807 | */ | ||
| 808 | void copy_user_page(void *to, void *from, unsigned long address, | ||
| 809 | struct page *page) | ||
| 810 | { | ||
| 811 | if (((address ^ (unsigned long) from) & CACHE_OC_SYN_MASK) != 0) | ||
| 812 | sh64_dcache_purge_coloured_phy_page(__pa(from), address); | ||
| 813 | |||
| 814 | if (((address ^ (unsigned long) to) & CACHE_OC_SYN_MASK) == 0) | ||
| 815 | copy_page(to, from); | ||
| 816 | else | ||
| 817 | sh64_copy_user_page_coloured(to, from, address); | ||
| 818 | } | ||
| 819 | 619 | ||
| 820 | /* | 620 | sh4__flush_region_init(); |
| 821 | * 'to' is a kernel virtual address (within the superpage mapping of the | ||
| 822 | * physical RAM). 'address' is the user virtual address where the 'to' | ||
| 823 | * page will be mapped after. This allows a custom mapping to be used to | ||
| 824 | * ensure that the new copy is placed in the right cache sets for the | ||
| 825 | * user to see it without having to bounce it out via memory. | ||
| 826 | */ | ||
| 827 | void clear_user_page(void *to, unsigned long address, struct page *page) | ||
| 828 | { | ||
| 829 | if (((address ^ (unsigned long) to) & CACHE_OC_SYN_MASK) == 0) | ||
| 830 | clear_page(to); | ||
| 831 | else | ||
| 832 | sh64_clear_user_page_coloured(to, address); | ||
| 833 | } | 621 | } |
| 834 | #endif | ||
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c index 22dacc778823..2cadee2037ac 100644 --- a/arch/sh/mm/cache-sh7705.c +++ b/arch/sh/mm/cache-sh7705.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 13 | #include <linux/mman.h> | 13 | #include <linux/mman.h> |
| 14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
| 15 | #include <linux/fs.h> | ||
| 15 | #include <linux/threads.h> | 16 | #include <linux/threads.h> |
| 16 | #include <asm/addrspace.h> | 17 | #include <asm/addrspace.h> |
| 17 | #include <asm/page.h> | 18 | #include <asm/page.h> |
| @@ -63,15 +64,21 @@ static inline void cache_wback_all(void) | |||
| 63 | * | 64 | * |
| 64 | * Called from kernel/module.c:sys_init_module and routine for a.out format. | 65 | * Called from kernel/module.c:sys_init_module and routine for a.out format. |
| 65 | */ | 66 | */ |
| 66 | void flush_icache_range(unsigned long start, unsigned long end) | 67 | static void sh7705_flush_icache_range(void *args) |
| 67 | { | 68 | { |
| 69 | struct flusher_data *data = args; | ||
| 70 | unsigned long start, end; | ||
| 71 | |||
| 72 | start = data->addr1; | ||
| 73 | end = data->addr2; | ||
| 74 | |||
| 68 | __flush_wback_region((void *)start, end - start); | 75 | __flush_wback_region((void *)start, end - start); |
| 69 | } | 76 | } |
| 70 | 77 | ||
| 71 | /* | 78 | /* |
| 72 | * Writeback&Invalidate the D-cache of the page | 79 | * Writeback&Invalidate the D-cache of the page |
| 73 | */ | 80 | */ |
| 74 | static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys) | 81 | static void __flush_dcache_page(unsigned long phys) |
| 75 | { | 82 | { |
| 76 | unsigned long ways, waysize, addrstart; | 83 | unsigned long ways, waysize, addrstart; |
| 77 | unsigned long flags; | 84 | unsigned long flags; |
| @@ -126,13 +133,18 @@ static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys) | |||
| 126 | * Write back & invalidate the D-cache of the page. | 133 | * Write back & invalidate the D-cache of the page. |
| 127 | * (To avoid "alias" issues) | 134 | * (To avoid "alias" issues) |
| 128 | */ | 135 | */ |
| 129 | void flush_dcache_page(struct page *page) | 136 | static void sh7705_flush_dcache_page(void *arg) |
| 130 | { | 137 | { |
| 131 | if (test_bit(PG_mapped, &page->flags)) | 138 | struct page *page = arg; |
| 139 | struct address_space *mapping = page_mapping(page); | ||
| 140 | |||
| 141 | if (mapping && !mapping_mapped(mapping)) | ||
| 142 | set_bit(PG_dcache_dirty, &page->flags); | ||
| 143 | else | ||
| 132 | __flush_dcache_page(PHYSADDR(page_address(page))); | 144 | __flush_dcache_page(PHYSADDR(page_address(page))); |
| 133 | } | 145 | } |
| 134 | 146 | ||
| 135 | void __uses_jump_to_uncached flush_cache_all(void) | 147 | static void sh7705_flush_cache_all(void *args) |
| 136 | { | 148 | { |
| 137 | unsigned long flags; | 149 | unsigned long flags; |
| 138 | 150 | ||
| @@ -144,44 +156,16 @@ void __uses_jump_to_uncached flush_cache_all(void) | |||
| 144 | local_irq_restore(flags); | 156 | local_irq_restore(flags); |
| 145 | } | 157 | } |
| 146 | 158 | ||
| 147 | void flush_cache_mm(struct mm_struct *mm) | ||
| 148 | { | ||
| 149 | /* Is there any good way? */ | ||
| 150 | /* XXX: possibly call flush_cache_range for each vm area */ | ||
| 151 | flush_cache_all(); | ||
| 152 | } | ||
| 153 | |||
| 154 | /* | ||
| 155 | * Write back and invalidate D-caches. | ||
| 156 | * | ||
| 157 | * START, END: Virtual Address (U0 address) | ||
| 158 | * | ||
| 159 | * NOTE: We need to flush the _physical_ page entry. | ||
| 160 | * Flushing the cache lines for U0 only isn't enough. | ||
| 161 | * We need to flush for P1 too, which may contain aliases. | ||
| 162 | */ | ||
| 163 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
| 164 | unsigned long end) | ||
| 165 | { | ||
| 166 | |||
| 167 | /* | ||
| 168 | * We could call flush_cache_page for the pages of these range, | ||
| 169 | * but it's not efficient (scan the caches all the time...). | ||
| 170 | * | ||
| 171 | * We can't use A-bit magic, as there's the case we don't have | ||
| 172 | * valid entry on TLB. | ||
| 173 | */ | ||
| 174 | flush_cache_all(); | ||
| 175 | } | ||
| 176 | |||
| 177 | /* | 159 | /* |
| 178 | * Write back and invalidate I/D-caches for the page. | 160 | * Write back and invalidate I/D-caches for the page. |
| 179 | * | 161 | * |
| 180 | * ADDRESS: Virtual Address (U0 address) | 162 | * ADDRESS: Virtual Address (U0 address) |
| 181 | */ | 163 | */ |
| 182 | void flush_cache_page(struct vm_area_struct *vma, unsigned long address, | 164 | static void sh7705_flush_cache_page(void *args) |
| 183 | unsigned long pfn) | ||
| 184 | { | 165 | { |
| 166 | struct flusher_data *data = args; | ||
| 167 | unsigned long pfn = data->addr2; | ||
| 168 | |||
| 185 | __flush_dcache_page(pfn << PAGE_SHIFT); | 169 | __flush_dcache_page(pfn << PAGE_SHIFT); |
| 186 | } | 170 | } |
| 187 | 171 | ||
| @@ -193,7 +177,19 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address, | |||
| 193 | * Not entirely sure why this is necessary on SH3 with 32K cache but | 177 | * Not entirely sure why this is necessary on SH3 with 32K cache but |
| 194 | * without it we get occasional "Memory fault" when loading a program. | 178 | * without it we get occasional "Memory fault" when loading a program. |
| 195 | */ | 179 | */ |
| 196 | void flush_icache_page(struct vm_area_struct *vma, struct page *page) | 180 | static void sh7705_flush_icache_page(void *page) |
| 197 | { | 181 | { |
| 198 | __flush_purge_region(page_address(page), PAGE_SIZE); | 182 | __flush_purge_region(page_address(page), PAGE_SIZE); |
| 199 | } | 183 | } |
| 184 | |||
| 185 | void __init sh7705_cache_init(void) | ||
| 186 | { | ||
| 187 | local_flush_icache_range = sh7705_flush_icache_range; | ||
| 188 | local_flush_dcache_page = sh7705_flush_dcache_page; | ||
| 189 | local_flush_cache_all = sh7705_flush_cache_all; | ||
| 190 | local_flush_cache_mm = sh7705_flush_cache_all; | ||
| 191 | local_flush_cache_dup_mm = sh7705_flush_cache_all; | ||
| 192 | local_flush_cache_range = sh7705_flush_cache_all; | ||
| 193 | local_flush_cache_page = sh7705_flush_cache_page; | ||
| 194 | local_flush_icache_page = sh7705_flush_icache_page; | ||
| 195 | } | ||
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c new file mode 100644 index 000000000000..35c37b7f717a --- /dev/null +++ b/arch/sh/mm/cache.c | |||
| @@ -0,0 +1,316 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/mm/cache.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999, 2000, 2002 Niibe Yutaka | ||
| 5 | * Copyright (C) 2002 - 2009 Paul Mundt | ||
| 6 | * | ||
| 7 | * Released under the terms of the GNU GPL v2.0. | ||
| 8 | */ | ||
| 9 | #include <linux/mm.h> | ||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/mutex.h> | ||
| 12 | #include <linux/fs.h> | ||
| 13 | #include <linux/smp.h> | ||
| 14 | #include <linux/highmem.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <asm/mmu_context.h> | ||
| 17 | #include <asm/cacheflush.h> | ||
| 18 | |||
| 19 | void (*local_flush_cache_all)(void *args) = cache_noop; | ||
| 20 | void (*local_flush_cache_mm)(void *args) = cache_noop; | ||
| 21 | void (*local_flush_cache_dup_mm)(void *args) = cache_noop; | ||
| 22 | void (*local_flush_cache_page)(void *args) = cache_noop; | ||
| 23 | void (*local_flush_cache_range)(void *args) = cache_noop; | ||
| 24 | void (*local_flush_dcache_page)(void *args) = cache_noop; | ||
| 25 | void (*local_flush_icache_range)(void *args) = cache_noop; | ||
| 26 | void (*local_flush_icache_page)(void *args) = cache_noop; | ||
| 27 | void (*local_flush_cache_sigtramp)(void *args) = cache_noop; | ||
| 28 | |||
| 29 | void (*__flush_wback_region)(void *start, int size); | ||
| 30 | void (*__flush_purge_region)(void *start, int size); | ||
| 31 | void (*__flush_invalidate_region)(void *start, int size); | ||
| 32 | |||
| 33 | static inline void noop__flush_region(void *start, int size) | ||
| 34 | { | ||
| 35 | } | ||
| 36 | |||
| 37 | static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info, | ||
| 38 | int wait) | ||
| 39 | { | ||
| 40 | preempt_disable(); | ||
| 41 | smp_call_function(func, info, wait); | ||
| 42 | func(info); | ||
| 43 | preempt_enable(); | ||
| 44 | } | ||
| 45 | |||
| 46 | void copy_to_user_page(struct vm_area_struct *vma, struct page *page, | ||
| 47 | unsigned long vaddr, void *dst, const void *src, | ||
| 48 | unsigned long len) | ||
| 49 | { | ||
| 50 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && | ||
| 51 | !test_bit(PG_dcache_dirty, &page->flags)) { | ||
| 52 | void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); | ||
| 53 | memcpy(vto, src, len); | ||
| 54 | kunmap_coherent(vto); | ||
| 55 | } else { | ||
| 56 | memcpy(dst, src, len); | ||
| 57 | if (boot_cpu_data.dcache.n_aliases) | ||
| 58 | set_bit(PG_dcache_dirty, &page->flags); | ||
| 59 | } | ||
| 60 | |||
| 61 | if (vma->vm_flags & VM_EXEC) | ||
| 62 | flush_cache_page(vma, vaddr, page_to_pfn(page)); | ||
| 63 | } | ||
| 64 | |||
| 65 | void copy_from_user_page(struct vm_area_struct *vma, struct page *page, | ||
| 66 | unsigned long vaddr, void *dst, const void *src, | ||
| 67 | unsigned long len) | ||
| 68 | { | ||
| 69 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && | ||
| 70 | !test_bit(PG_dcache_dirty, &page->flags)) { | ||
| 71 | void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); | ||
| 72 | memcpy(dst, vfrom, len); | ||
| 73 | kunmap_coherent(vfrom); | ||
| 74 | } else { | ||
| 75 | memcpy(dst, src, len); | ||
| 76 | if (boot_cpu_data.dcache.n_aliases) | ||
| 77 | set_bit(PG_dcache_dirty, &page->flags); | ||
| 78 | } | ||
| 79 | } | ||
| 80 | |||
| 81 | void copy_user_highpage(struct page *to, struct page *from, | ||
| 82 | unsigned long vaddr, struct vm_area_struct *vma) | ||
| 83 | { | ||
| 84 | void *vfrom, *vto; | ||
| 85 | |||
| 86 | vto = kmap_atomic(to, KM_USER1); | ||
| 87 | |||
| 88 | if (boot_cpu_data.dcache.n_aliases && page_mapped(from) && | ||
| 89 | !test_bit(PG_dcache_dirty, &from->flags)) { | ||
| 90 | vfrom = kmap_coherent(from, vaddr); | ||
| 91 | copy_page(vto, vfrom); | ||
| 92 | kunmap_coherent(vfrom); | ||
| 93 | } else { | ||
| 94 | vfrom = kmap_atomic(from, KM_USER0); | ||
| 95 | copy_page(vto, vfrom); | ||
| 96 | kunmap_atomic(vfrom, KM_USER0); | ||
| 97 | } | ||
| 98 | |||
| 99 | if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) | ||
| 100 | __flush_purge_region(vto, PAGE_SIZE); | ||
| 101 | |||
| 102 | kunmap_atomic(vto, KM_USER1); | ||
| 103 | /* Make sure this page is cleared on other CPU's too before using it */ | ||
| 104 | smp_wmb(); | ||
| 105 | } | ||
| 106 | EXPORT_SYMBOL(copy_user_highpage); | ||
| 107 | |||
| 108 | void clear_user_highpage(struct page *page, unsigned long vaddr) | ||
| 109 | { | ||
| 110 | void *kaddr = kmap_atomic(page, KM_USER0); | ||
| 111 | |||
| 112 | clear_page(kaddr); | ||
| 113 | |||
| 114 | if (pages_do_alias((unsigned long)kaddr, vaddr & PAGE_MASK)) | ||
| 115 | __flush_purge_region(kaddr, PAGE_SIZE); | ||
| 116 | |||
| 117 | kunmap_atomic(kaddr, KM_USER0); | ||
| 118 | } | ||
| 119 | EXPORT_SYMBOL(clear_user_highpage); | ||
| 120 | |||
| 121 | void __update_cache(struct vm_area_struct *vma, | ||
| 122 | unsigned long address, pte_t pte) | ||
| 123 | { | ||
| 124 | struct page *page; | ||
| 125 | unsigned long pfn = pte_pfn(pte); | ||
| 126 | |||
| 127 | if (!boot_cpu_data.dcache.n_aliases) | ||
| 128 | return; | ||
| 129 | |||
| 130 | page = pfn_to_page(pfn); | ||
| 131 | if (pfn_valid(pfn) && page_mapping(page)) { | ||
| 132 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); | ||
| 133 | if (dirty) { | ||
| 134 | unsigned long addr = (unsigned long)page_address(page); | ||
| 135 | |||
| 136 | if (pages_do_alias(addr, address & PAGE_MASK)) | ||
| 137 | __flush_purge_region((void *)addr, PAGE_SIZE); | ||
| 138 | } | ||
| 139 | } | ||
| 140 | } | ||
| 141 | |||
| 142 | void __flush_anon_page(struct page *page, unsigned long vmaddr) | ||
| 143 | { | ||
| 144 | unsigned long addr = (unsigned long) page_address(page); | ||
| 145 | |||
| 146 | if (pages_do_alias(addr, vmaddr)) { | ||
| 147 | if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && | ||
| 148 | !test_bit(PG_dcache_dirty, &page->flags)) { | ||
| 149 | void *kaddr; | ||
| 150 | |||
| 151 | kaddr = kmap_coherent(page, vmaddr); | ||
| 152 | /* XXX.. For now kunmap_coherent() does a purge */ | ||
| 153 | /* __flush_purge_region((void *)kaddr, PAGE_SIZE); */ | ||
| 154 | kunmap_coherent(kaddr); | ||
| 155 | } else | ||
| 156 | __flush_purge_region((void *)addr, PAGE_SIZE); | ||
| 157 | } | ||
| 158 | } | ||
| 159 | |||
| 160 | void flush_cache_all(void) | ||
| 161 | { | ||
| 162 | cacheop_on_each_cpu(local_flush_cache_all, NULL, 1); | ||
| 163 | } | ||
| 164 | |||
| 165 | void flush_cache_mm(struct mm_struct *mm) | ||
| 166 | { | ||
| 167 | cacheop_on_each_cpu(local_flush_cache_mm, mm, 1); | ||
| 168 | } | ||
| 169 | |||
| 170 | void flush_cache_dup_mm(struct mm_struct *mm) | ||
| 171 | { | ||
| 172 | cacheop_on_each_cpu(local_flush_cache_dup_mm, mm, 1); | ||
| 173 | } | ||
| 174 | |||
| 175 | void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, | ||
| 176 | unsigned long pfn) | ||
| 177 | { | ||
| 178 | struct flusher_data data; | ||
| 179 | |||
| 180 | data.vma = vma; | ||
| 181 | data.addr1 = addr; | ||
| 182 | data.addr2 = pfn; | ||
| 183 | |||
| 184 | cacheop_on_each_cpu(local_flush_cache_page, (void *)&data, 1); | ||
| 185 | } | ||
| 186 | |||
| 187 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
| 188 | unsigned long end) | ||
| 189 | { | ||
| 190 | struct flusher_data data; | ||
| 191 | |||
| 192 | data.vma = vma; | ||
| 193 | data.addr1 = start; | ||
| 194 | data.addr2 = end; | ||
| 195 | |||
| 196 | cacheop_on_each_cpu(local_flush_cache_range, (void *)&data, 1); | ||
| 197 | } | ||
| 198 | |||
| 199 | void flush_dcache_page(struct page *page) | ||
| 200 | { | ||
| 201 | cacheop_on_each_cpu(local_flush_dcache_page, page, 1); | ||
| 202 | } | ||
| 203 | |||
| 204 | void flush_icache_range(unsigned long start, unsigned long end) | ||
| 205 | { | ||
| 206 | struct flusher_data data; | ||
| 207 | |||
| 208 | data.vma = NULL; | ||
| 209 | data.addr1 = start; | ||
| 210 | data.addr2 = end; | ||
| 211 | |||
| 212 | cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1); | ||
| 213 | } | ||
| 214 | |||
| 215 | void flush_icache_page(struct vm_area_struct *vma, struct page *page) | ||
| 216 | { | ||
| 217 | /* Nothing uses the VMA, so just pass the struct page along */ | ||
| 218 | cacheop_on_each_cpu(local_flush_icache_page, page, 1); | ||
| 219 | } | ||
| 220 | |||
| 221 | void flush_cache_sigtramp(unsigned long address) | ||
| 222 | { | ||
| 223 | cacheop_on_each_cpu(local_flush_cache_sigtramp, (void *)address, 1); | ||
| 224 | } | ||
| 225 | |||
| 226 | static void compute_alias(struct cache_info *c) | ||
| 227 | { | ||
| 228 | c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1); | ||
| 229 | c->n_aliases = c->alias_mask ? (c->alias_mask >> PAGE_SHIFT) + 1 : 0; | ||
| 230 | } | ||
| 231 | |||
| 232 | static void __init emit_cache_params(void) | ||
| 233 | { | ||
| 234 | printk(KERN_NOTICE "I-cache : n_ways=%d n_sets=%d way_incr=%d\n", | ||
| 235 | boot_cpu_data.icache.ways, | ||
| 236 | boot_cpu_data.icache.sets, | ||
| 237 | boot_cpu_data.icache.way_incr); | ||
| 238 | printk(KERN_NOTICE "I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", | ||
| 239 | boot_cpu_data.icache.entry_mask, | ||
| 240 | boot_cpu_data.icache.alias_mask, | ||
| 241 | boot_cpu_data.icache.n_aliases); | ||
| 242 | printk(KERN_NOTICE "D-cache : n_ways=%d n_sets=%d way_incr=%d\n", | ||
| 243 | boot_cpu_data.dcache.ways, | ||
| 244 | boot_cpu_data.dcache.sets, | ||
| 245 | boot_cpu_data.dcache.way_incr); | ||
| 246 | printk(KERN_NOTICE "D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", | ||
| 247 | boot_cpu_data.dcache.entry_mask, | ||
| 248 | boot_cpu_data.dcache.alias_mask, | ||
| 249 | boot_cpu_data.dcache.n_aliases); | ||
| 250 | |||
| 251 | /* | ||
| 252 | * Emit Secondary Cache parameters if the CPU has a probed L2. | ||
| 253 | */ | ||
| 254 | if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) { | ||
| 255 | printk(KERN_NOTICE "S-cache : n_ways=%d n_sets=%d way_incr=%d\n", | ||
| 256 | boot_cpu_data.scache.ways, | ||
| 257 | boot_cpu_data.scache.sets, | ||
| 258 | boot_cpu_data.scache.way_incr); | ||
| 259 | printk(KERN_NOTICE "S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", | ||
| 260 | boot_cpu_data.scache.entry_mask, | ||
| 261 | boot_cpu_data.scache.alias_mask, | ||
| 262 | boot_cpu_data.scache.n_aliases); | ||
| 263 | } | ||
| 264 | } | ||
| 265 | |||
| 266 | void __init cpu_cache_init(void) | ||
| 267 | { | ||
| 268 | compute_alias(&boot_cpu_data.icache); | ||
| 269 | compute_alias(&boot_cpu_data.dcache); | ||
| 270 | compute_alias(&boot_cpu_data.scache); | ||
| 271 | |||
| 272 | __flush_wback_region = noop__flush_region; | ||
| 273 | __flush_purge_region = noop__flush_region; | ||
| 274 | __flush_invalidate_region = noop__flush_region; | ||
| 275 | |||
| 276 | if (boot_cpu_data.family == CPU_FAMILY_SH2) { | ||
| 277 | extern void __weak sh2_cache_init(void); | ||
| 278 | |||
| 279 | sh2_cache_init(); | ||
| 280 | } | ||
| 281 | |||
| 282 | if (boot_cpu_data.family == CPU_FAMILY_SH2A) { | ||
| 283 | extern void __weak sh2a_cache_init(void); | ||
| 284 | |||
| 285 | sh2a_cache_init(); | ||
| 286 | } | ||
| 287 | |||
| 288 | if (boot_cpu_data.family == CPU_FAMILY_SH3) { | ||
| 289 | extern void __weak sh3_cache_init(void); | ||
| 290 | |||
| 291 | sh3_cache_init(); | ||
| 292 | |||
| 293 | if ((boot_cpu_data.type == CPU_SH7705) && | ||
| 294 | (boot_cpu_data.dcache.sets == 512)) { | ||
| 295 | extern void __weak sh7705_cache_init(void); | ||
| 296 | |||
| 297 | sh7705_cache_init(); | ||
| 298 | } | ||
| 299 | } | ||
| 300 | |||
| 301 | if ((boot_cpu_data.family == CPU_FAMILY_SH4) || | ||
| 302 | (boot_cpu_data.family == CPU_FAMILY_SH4A) || | ||
| 303 | (boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) { | ||
| 304 | extern void __weak sh4_cache_init(void); | ||
| 305 | |||
| 306 | sh4_cache_init(); | ||
| 307 | } | ||
| 308 | |||
| 309 | if (boot_cpu_data.family == CPU_FAMILY_SH5) { | ||
| 310 | extern void __weak sh5_cache_init(void); | ||
| 311 | |||
| 312 | sh5_cache_init(); | ||
| 313 | } | ||
| 314 | |||
| 315 | emit_cache_params(); | ||
| 316 | } | ||
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c index 71925946f1e1..781b413ff82d 100644 --- a/arch/sh/mm/fault_32.c +++ b/arch/sh/mm/fault_32.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * Page fault handler for SH with an MMU. | 2 | * Page fault handler for SH with an MMU. |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 1999 Niibe Yutaka | 4 | * Copyright (C) 1999 Niibe Yutaka |
| 5 | * Copyright (C) 2003 - 2008 Paul Mundt | 5 | * Copyright (C) 2003 - 2009 Paul Mundt |
| 6 | * | 6 | * |
| 7 | * Based on linux/arch/i386/mm/fault.c: | 7 | * Based on linux/arch/i386/mm/fault.c: |
| 8 | * Copyright (C) 1995 Linus Torvalds | 8 | * Copyright (C) 1995 Linus Torvalds |
| @@ -25,18 +25,91 @@ static inline int notify_page_fault(struct pt_regs *regs, int trap) | |||
| 25 | { | 25 | { |
| 26 | int ret = 0; | 26 | int ret = 0; |
| 27 | 27 | ||
| 28 | #ifdef CONFIG_KPROBES | 28 | if (kprobes_built_in() && !user_mode(regs)) { |
| 29 | if (!user_mode(regs)) { | ||
| 30 | preempt_disable(); | 29 | preempt_disable(); |
| 31 | if (kprobe_running() && kprobe_fault_handler(regs, trap)) | 30 | if (kprobe_running() && kprobe_fault_handler(regs, trap)) |
| 32 | ret = 1; | 31 | ret = 1; |
| 33 | preempt_enable(); | 32 | preempt_enable(); |
| 34 | } | 33 | } |
| 35 | #endif | ||
| 36 | 34 | ||
| 37 | return ret; | 35 | return ret; |
| 38 | } | 36 | } |
| 39 | 37 | ||
| 38 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | ||
| 39 | { | ||
| 40 | unsigned index = pgd_index(address); | ||
| 41 | pgd_t *pgd_k; | ||
| 42 | pud_t *pud, *pud_k; | ||
| 43 | pmd_t *pmd, *pmd_k; | ||
| 44 | |||
| 45 | pgd += index; | ||
| 46 | pgd_k = init_mm.pgd + index; | ||
| 47 | |||
| 48 | if (!pgd_present(*pgd_k)) | ||
| 49 | return NULL; | ||
| 50 | |||
| 51 | pud = pud_offset(pgd, address); | ||
| 52 | pud_k = pud_offset(pgd_k, address); | ||
| 53 | if (!pud_present(*pud_k)) | ||
| 54 | return NULL; | ||
| 55 | |||
| 56 | pmd = pmd_offset(pud, address); | ||
| 57 | pmd_k = pmd_offset(pud_k, address); | ||
| 58 | if (!pmd_present(*pmd_k)) | ||
| 59 | return NULL; | ||
| 60 | |||
| 61 | if (!pmd_present(*pmd)) | ||
| 62 | set_pmd(pmd, *pmd_k); | ||
| 63 | else { | ||
| 64 | /* | ||
| 65 | * The page tables are fully synchronised so there must | ||
| 66 | * be another reason for the fault. Return NULL here to | ||
| 67 | * signal that we have not taken care of the fault. | ||
| 68 | */ | ||
| 69 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | ||
| 70 | return NULL; | ||
| 71 | } | ||
| 72 | |||
| 73 | return pmd_k; | ||
| 74 | } | ||
| 75 | |||
| 76 | /* | ||
| 77 | * Handle a fault on the vmalloc or module mapping area | ||
| 78 | */ | ||
| 79 | static noinline int vmalloc_fault(unsigned long address) | ||
| 80 | { | ||
| 81 | pgd_t *pgd_k; | ||
| 82 | pmd_t *pmd_k; | ||
| 83 | pte_t *pte_k; | ||
| 84 | |||
| 85 | /* Make sure we are in vmalloc/module/P3 area: */ | ||
| 86 | if (!(address >= VMALLOC_START && address < P3_ADDR_MAX)) | ||
| 87 | return -1; | ||
| 88 | |||
| 89 | /* | ||
| 90 | * Synchronize this task's top level page-table | ||
| 91 | * with the 'reference' page table. | ||
| 92 | * | ||
| 93 | * Do _not_ use "current" here. We might be inside | ||
| 94 | * an interrupt in the middle of a task switch.. | ||
| 95 | */ | ||
| 96 | pgd_k = get_TTB(); | ||
| 97 | pmd_k = vmalloc_sync_one(pgd_k, address); | ||
| 98 | if (!pmd_k) | ||
| 99 | return -1; | ||
| 100 | |||
| 101 | pte_k = pte_offset_kernel(pmd_k, address); | ||
| 102 | if (!pte_present(*pte_k)) | ||
| 103 | return -1; | ||
| 104 | |||
| 105 | return 0; | ||
| 106 | } | ||
| 107 | |||
| 108 | static int fault_in_kernel_space(unsigned long address) | ||
| 109 | { | ||
| 110 | return address >= TASK_SIZE; | ||
| 111 | } | ||
| 112 | |||
| 40 | /* | 113 | /* |
| 41 | * This routine handles page faults. It determines the address, | 114 | * This routine handles page faults. It determines the address, |
| 42 | * and the problem, and then passes it off to one of the appropriate | 115 | * and the problem, and then passes it off to one of the appropriate |
| @@ -46,6 +119,7 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, | |||
| 46 | unsigned long writeaccess, | 119 | unsigned long writeaccess, |
| 47 | unsigned long address) | 120 | unsigned long address) |
| 48 | { | 121 | { |
| 122 | unsigned long vec; | ||
| 49 | struct task_struct *tsk; | 123 | struct task_struct *tsk; |
| 50 | struct mm_struct *mm; | 124 | struct mm_struct *mm; |
| 51 | struct vm_area_struct * vma; | 125 | struct vm_area_struct * vma; |
| @@ -53,59 +127,30 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, | |||
| 53 | int fault; | 127 | int fault; |
| 54 | siginfo_t info; | 128 | siginfo_t info; |
| 55 | 129 | ||
| 56 | /* | ||
| 57 | * We don't bother with any notifier callbacks here, as they are | ||
| 58 | * all handled through the __do_page_fault() fast-path. | ||
| 59 | */ | ||
| 60 | |||
| 61 | tsk = current; | 130 | tsk = current; |
| 131 | mm = tsk->mm; | ||
| 62 | si_code = SEGV_MAPERR; | 132 | si_code = SEGV_MAPERR; |
| 133 | vec = lookup_exception_vector(); | ||
| 63 | 134 | ||
| 64 | if (unlikely(address >= TASK_SIZE)) { | 135 | /* |
| 65 | /* | 136 | * We fault-in kernel-space virtual memory on-demand. The |
| 66 | * Synchronize this task's top level page-table | 137 | * 'reference' page table is init_mm.pgd. |
| 67 | * with the 'reference' page table. | 138 | * |
| 68 | * | 139 | * NOTE! We MUST NOT take any locks for this case. We may |
| 69 | * Do _not_ use "tsk" here. We might be inside | 140 | * be in an interrupt or a critical region, and should |
| 70 | * an interrupt in the middle of a task switch.. | 141 | * only copy the information from the master page table, |
| 71 | */ | 142 | * nothing more. |
| 72 | int offset = pgd_index(address); | 143 | */ |
| 73 | pgd_t *pgd, *pgd_k; | 144 | if (unlikely(fault_in_kernel_space(address))) { |
| 74 | pud_t *pud, *pud_k; | 145 | if (vmalloc_fault(address) >= 0) |
| 75 | pmd_t *pmd, *pmd_k; | ||
| 76 | |||
| 77 | pgd = get_TTB() + offset; | ||
| 78 | pgd_k = swapper_pg_dir + offset; | ||
| 79 | |||
| 80 | if (!pgd_present(*pgd)) { | ||
| 81 | if (!pgd_present(*pgd_k)) | ||
| 82 | goto bad_area_nosemaphore; | ||
| 83 | set_pgd(pgd, *pgd_k); | ||
| 84 | return; | 146 | return; |
| 85 | } | 147 | if (notify_page_fault(regs, vec)) |
| 86 | |||
| 87 | pud = pud_offset(pgd, address); | ||
| 88 | pud_k = pud_offset(pgd_k, address); | ||
| 89 | |||
| 90 | if (!pud_present(*pud)) { | ||
| 91 | if (!pud_present(*pud_k)) | ||
| 92 | goto bad_area_nosemaphore; | ||
| 93 | set_pud(pud, *pud_k); | ||
| 94 | return; | 148 | return; |
| 95 | } | ||
| 96 | 149 | ||
| 97 | pmd = pmd_offset(pud, address); | 150 | goto bad_area_nosemaphore; |
| 98 | pmd_k = pmd_offset(pud_k, address); | ||
| 99 | if (pmd_present(*pmd) || !pmd_present(*pmd_k)) | ||
| 100 | goto bad_area_nosemaphore; | ||
| 101 | set_pmd(pmd, *pmd_k); | ||
| 102 | |||
| 103 | return; | ||
| 104 | } | 151 | } |
| 105 | 152 | ||
| 106 | mm = tsk->mm; | 153 | if (unlikely(notify_page_fault(regs, vec))) |
| 107 | |||
| 108 | if (unlikely(notify_page_fault(regs, lookup_exception_vector()))) | ||
| 109 | return; | 154 | return; |
| 110 | 155 | ||
| 111 | /* Only enable interrupts if they were on before the fault */ | 156 | /* Only enable interrupts if they were on before the fault */ |
| @@ -115,8 +160,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, | |||
| 115 | perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); | 160 | perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); |
| 116 | 161 | ||
| 117 | /* | 162 | /* |
| 118 | * If we're in an interrupt or have no user | 163 | * If we're in an interrupt, have no user context or are running |
| 119 | * context, we must not take the fault.. | 164 | * in an atomic region then we must not take the fault: |
| 120 | */ | 165 | */ |
| 121 | if (in_atomic() || !mm) | 166 | if (in_atomic() || !mm) |
| 122 | goto no_context; | 167 | goto no_context; |
| @@ -132,10 +177,11 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, | |||
| 132 | goto bad_area; | 177 | goto bad_area; |
| 133 | if (expand_stack(vma, address)) | 178 | if (expand_stack(vma, address)) |
| 134 | goto bad_area; | 179 | goto bad_area; |
| 135 | /* | 180 | |
| 136 | * Ok, we have a good vm_area for this memory access, so | 181 | /* |
| 137 | * we can handle it.. | 182 | * Ok, we have a good vm_area for this memory access, so |
| 138 | */ | 183 | * we can handle it.. |
| 184 | */ | ||
| 139 | good_area: | 185 | good_area: |
| 140 | si_code = SEGV_ACCERR; | 186 | si_code = SEGV_ACCERR; |
| 141 | if (writeaccess) { | 187 | if (writeaccess) { |
| @@ -173,10 +219,10 @@ survive: | |||
| 173 | up_read(&mm->mmap_sem); | 219 | up_read(&mm->mmap_sem); |
| 174 | return; | 220 | return; |
| 175 | 221 | ||
| 176 | /* | 222 | /* |
| 177 | * Something tried to access memory that isn't in our memory map.. | 223 | * Something tried to access memory that isn't in our memory map.. |
| 178 | * Fix it, but check if it's kernel or user first.. | 224 | * Fix it, but check if it's kernel or user first.. |
| 179 | */ | 225 | */ |
| 180 | bad_area: | 226 | bad_area: |
| 181 | up_read(&mm->mmap_sem); | 227 | up_read(&mm->mmap_sem); |
| 182 | 228 | ||
| @@ -272,16 +318,15 @@ do_sigbus: | |||
| 272 | /* | 318 | /* |
| 273 | * Called with interrupts disabled. | 319 | * Called with interrupts disabled. |
| 274 | */ | 320 | */ |
| 275 | asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs, | 321 | asmlinkage int __kprobes |
| 276 | unsigned long writeaccess, | 322 | handle_tlbmiss(struct pt_regs *regs, unsigned long writeaccess, |
| 277 | unsigned long address) | 323 | unsigned long address) |
| 278 | { | 324 | { |
| 279 | pgd_t *pgd; | 325 | pgd_t *pgd; |
| 280 | pud_t *pud; | 326 | pud_t *pud; |
| 281 | pmd_t *pmd; | 327 | pmd_t *pmd; |
| 282 | pte_t *pte; | 328 | pte_t *pte; |
| 283 | pte_t entry; | 329 | pte_t entry; |
| 284 | int ret = 1; | ||
| 285 | 330 | ||
| 286 | /* | 331 | /* |
| 287 | * We don't take page faults for P1, P2, and parts of P4, these | 332 | * We don't take page faults for P1, P2, and parts of P4, these |
| @@ -292,40 +337,41 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs, | |||
| 292 | pgd = pgd_offset_k(address); | 337 | pgd = pgd_offset_k(address); |
| 293 | } else { | 338 | } else { |
| 294 | if (unlikely(address >= TASK_SIZE || !current->mm)) | 339 | if (unlikely(address >= TASK_SIZE || !current->mm)) |
| 295 | goto out; | 340 | return 1; |
| 296 | 341 | ||
| 297 | pgd = pgd_offset(current->mm, address); | 342 | pgd = pgd_offset(current->mm, address); |
| 298 | } | 343 | } |
| 299 | 344 | ||
| 300 | pud = pud_offset(pgd, address); | 345 | pud = pud_offset(pgd, address); |
| 301 | if (pud_none_or_clear_bad(pud)) | 346 | if (pud_none_or_clear_bad(pud)) |
| 302 | goto out; | 347 | return 1; |
| 303 | pmd = pmd_offset(pud, address); | 348 | pmd = pmd_offset(pud, address); |
| 304 | if (pmd_none_or_clear_bad(pmd)) | 349 | if (pmd_none_or_clear_bad(pmd)) |
| 305 | goto out; | 350 | return 1; |
| 306 | pte = pte_offset_kernel(pmd, address); | 351 | pte = pte_offset_kernel(pmd, address); |
| 307 | entry = *pte; | 352 | entry = *pte; |
| 308 | if (unlikely(pte_none(entry) || pte_not_present(entry))) | 353 | if (unlikely(pte_none(entry) || pte_not_present(entry))) |
| 309 | goto out; | 354 | return 1; |
| 310 | if (unlikely(writeaccess && !pte_write(entry))) | 355 | if (unlikely(writeaccess && !pte_write(entry))) |
| 311 | goto out; | 356 | return 1; |
| 312 | 357 | ||
| 313 | if (writeaccess) | 358 | if (writeaccess) |
| 314 | entry = pte_mkdirty(entry); | 359 | entry = pte_mkdirty(entry); |
| 315 | entry = pte_mkyoung(entry); | 360 | entry = pte_mkyoung(entry); |
| 316 | 361 | ||
| 362 | set_pte(pte, entry); | ||
| 363 | |||
| 317 | #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP) | 364 | #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP) |
| 318 | /* | 365 | /* |
| 319 | * ITLB is not affected by "ldtlb" instruction. | 366 | * SH-4 does not set MMUCR.RC to the corresponding TLB entry in |
| 320 | * So, we need to flush the entry by ourselves. | 367 | * the case of an initial page write exception, so we need to |
| 368 | * flush it in order to avoid potential TLB entry duplication. | ||
| 321 | */ | 369 | */ |
| 322 | local_flush_tlb_one(get_asid(), address & PAGE_MASK); | 370 | if (writeaccess == 2) |
| 371 | local_flush_tlb_one(get_asid(), address & PAGE_MASK); | ||
| 323 | #endif | 372 | #endif |
| 324 | 373 | ||
| 325 | set_pte(pte, entry); | ||
| 326 | update_mmu_cache(NULL, address, entry); | 374 | update_mmu_cache(NULL, address, entry); |
| 327 | 375 | ||
| 328 | ret = 0; | 376 | return 0; |
| 329 | out: | ||
| 330 | return ret; | ||
| 331 | } | 377 | } |
diff --git a/arch/sh/mm/fault_64.c b/arch/sh/mm/fault_64.c index bd63b961b2a9..2b356cec2489 100644 --- a/arch/sh/mm/fault_64.c +++ b/arch/sh/mm/fault_64.c | |||
| @@ -56,16 +56,7 @@ inline void __do_tlb_refill(unsigned long address, | |||
| 56 | /* | 56 | /* |
| 57 | * Set PTEH register | 57 | * Set PTEH register |
| 58 | */ | 58 | */ |
| 59 | pteh = address & MMU_VPN_MASK; | 59 | pteh = neff_sign_extend(address & MMU_VPN_MASK); |
| 60 | |||
| 61 | /* Sign extend based on neff. */ | ||
| 62 | #if (NEFF == 32) | ||
| 63 | /* Faster sign extension */ | ||
| 64 | pteh = (unsigned long long)(signed long long)(signed long)pteh; | ||
| 65 | #else | ||
| 66 | /* General case */ | ||
| 67 | pteh = (pteh & NEFF_SIGN) ? (pteh | NEFF_MASK) : pteh; | ||
| 68 | #endif | ||
| 69 | 60 | ||
| 70 | /* Set the ASID. */ | 61 | /* Set the ASID. */ |
| 71 | pteh |= get_asid() << PTEH_ASID_SHIFT; | 62 | pteh |= get_asid() << PTEH_ASID_SHIFT; |
diff --git a/arch/sh/mm/flush-sh4.c b/arch/sh/mm/flush-sh4.c new file mode 100644 index 000000000000..cef402678f42 --- /dev/null +++ b/arch/sh/mm/flush-sh4.c | |||
| @@ -0,0 +1,108 @@ | |||
| 1 | #include <linux/mm.h> | ||
| 2 | #include <asm/mmu_context.h> | ||
| 3 | #include <asm/cacheflush.h> | ||
| 4 | |||
| 5 | /* | ||
| 6 | * Write back the dirty D-caches, but not invalidate them. | ||
| 7 | * | ||
| 8 | * START: Virtual Address (U0, P1, or P3) | ||
| 9 | * SIZE: Size of the region. | ||
| 10 | */ | ||
| 11 | static void sh4__flush_wback_region(void *start, int size) | ||
| 12 | { | ||
| 13 | reg_size_t aligned_start, v, cnt, end; | ||
| 14 | |||
| 15 | aligned_start = register_align(start); | ||
| 16 | v = aligned_start & ~(L1_CACHE_BYTES-1); | ||
| 17 | end = (aligned_start + size + L1_CACHE_BYTES-1) | ||
| 18 | & ~(L1_CACHE_BYTES-1); | ||
| 19 | cnt = (end - v) / L1_CACHE_BYTES; | ||
| 20 | |||
| 21 | while (cnt >= 8) { | ||
| 22 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 23 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 24 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 25 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 26 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 27 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 28 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 29 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 30 | cnt -= 8; | ||
| 31 | } | ||
| 32 | |||
| 33 | while (cnt) { | ||
| 34 | __ocbwb(v); v += L1_CACHE_BYTES; | ||
| 35 | cnt--; | ||
| 36 | } | ||
| 37 | } | ||
| 38 | |||
| 39 | /* | ||
| 40 | * Write back the dirty D-caches and invalidate them. | ||
| 41 | * | ||
| 42 | * START: Virtual Address (U0, P1, or P3) | ||
| 43 | * SIZE: Size of the region. | ||
| 44 | */ | ||
| 45 | static void sh4__flush_purge_region(void *start, int size) | ||
| 46 | { | ||
| 47 | reg_size_t aligned_start, v, cnt, end; | ||
| 48 | |||
| 49 | aligned_start = register_align(start); | ||
| 50 | v = aligned_start & ~(L1_CACHE_BYTES-1); | ||
| 51 | end = (aligned_start + size + L1_CACHE_BYTES-1) | ||
| 52 | & ~(L1_CACHE_BYTES-1); | ||
| 53 | cnt = (end - v) / L1_CACHE_BYTES; | ||
| 54 | |||
| 55 | while (cnt >= 8) { | ||
| 56 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 57 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 58 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 59 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 60 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 61 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 62 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 63 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 64 | cnt -= 8; | ||
| 65 | } | ||
| 66 | while (cnt) { | ||
| 67 | __ocbp(v); v += L1_CACHE_BYTES; | ||
| 68 | cnt--; | ||
| 69 | } | ||
| 70 | } | ||
| 71 | |||
| 72 | /* | ||
| 73 | * No write back please | ||
| 74 | */ | ||
| 75 | static void sh4__flush_invalidate_region(void *start, int size) | ||
| 76 | { | ||
| 77 | reg_size_t aligned_start, v, cnt, end; | ||
| 78 | |||
| 79 | aligned_start = register_align(start); | ||
| 80 | v = aligned_start & ~(L1_CACHE_BYTES-1); | ||
| 81 | end = (aligned_start + size + L1_CACHE_BYTES-1) | ||
| 82 | & ~(L1_CACHE_BYTES-1); | ||
| 83 | cnt = (end - v) / L1_CACHE_BYTES; | ||
| 84 | |||
| 85 | while (cnt >= 8) { | ||
| 86 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 87 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 88 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 89 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 90 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 91 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 92 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 93 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 94 | cnt -= 8; | ||
| 95 | } | ||
| 96 | |||
| 97 | while (cnt) { | ||
| 98 | __ocbi(v); v += L1_CACHE_BYTES; | ||
| 99 | cnt--; | ||
| 100 | } | ||
| 101 | } | ||
| 102 | |||
| 103 | void __init sh4__flush_region_init(void) | ||
| 104 | { | ||
| 105 | __flush_wback_region = sh4__flush_wback_region; | ||
| 106 | __flush_invalidate_region = sh4__flush_invalidate_region; | ||
| 107 | __flush_purge_region = sh4__flush_purge_region; | ||
| 108 | } | ||
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index fe532aeaa16d..edc842ff61ed 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c | |||
| @@ -106,27 +106,31 @@ void __init page_table_range_init(unsigned long start, unsigned long end, | |||
| 106 | pgd_t *pgd; | 106 | pgd_t *pgd; |
| 107 | pud_t *pud; | 107 | pud_t *pud; |
| 108 | pmd_t *pmd; | 108 | pmd_t *pmd; |
| 109 | int pgd_idx; | 109 | pte_t *pte; |
| 110 | int i, j, k; | ||
| 110 | unsigned long vaddr; | 111 | unsigned long vaddr; |
| 111 | 112 | ||
| 112 | vaddr = start & PMD_MASK; | 113 | vaddr = start; |
| 113 | end = (end + PMD_SIZE - 1) & PMD_MASK; | 114 | i = __pgd_offset(vaddr); |
| 114 | pgd_idx = pgd_index(vaddr); | 115 | j = __pud_offset(vaddr); |
| 115 | pgd = pgd_base + pgd_idx; | 116 | k = __pmd_offset(vaddr); |
| 116 | 117 | pgd = pgd_base + i; | |
| 117 | for ( ; (pgd_idx < PTRS_PER_PGD) && (vaddr != end); pgd++, pgd_idx++) { | 118 | |
| 118 | BUG_ON(pgd_none(*pgd)); | 119 | for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { |
| 119 | pud = pud_offset(pgd, 0); | 120 | pud = (pud_t *)pgd; |
| 120 | BUG_ON(pud_none(*pud)); | 121 | for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) { |
| 121 | pmd = pmd_offset(pud, 0); | 122 | pmd = (pmd_t *)pud; |
| 122 | 123 | for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { | |
| 123 | if (!pmd_present(*pmd)) { | 124 | if (pmd_none(*pmd)) { |
| 124 | pte_t *pte_table; | 125 | pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); |
| 125 | pte_table = (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE); | 126 | pmd_populate_kernel(&init_mm, pmd, pte); |
| 126 | pmd_populate_kernel(&init_mm, pmd, pte_table); | 127 | BUG_ON(pte != pte_offset_kernel(pmd, 0)); |
| 128 | } | ||
| 129 | vaddr += PMD_SIZE; | ||
| 130 | } | ||
| 131 | k = 0; | ||
| 127 | } | 132 | } |
| 128 | 133 | j = 0; | |
| 129 | vaddr += PMD_SIZE; | ||
| 130 | } | 134 | } |
| 131 | } | 135 | } |
| 132 | #endif /* CONFIG_MMU */ | 136 | #endif /* CONFIG_MMU */ |
| @@ -137,7 +141,7 @@ void __init page_table_range_init(unsigned long start, unsigned long end, | |||
| 137 | void __init paging_init(void) | 141 | void __init paging_init(void) |
| 138 | { | 142 | { |
| 139 | unsigned long max_zone_pfns[MAX_NR_ZONES]; | 143 | unsigned long max_zone_pfns[MAX_NR_ZONES]; |
| 140 | unsigned long vaddr; | 144 | unsigned long vaddr, end; |
| 141 | int nid; | 145 | int nid; |
| 142 | 146 | ||
| 143 | /* We don't need to map the kernel through the TLB, as | 147 | /* We don't need to map the kernel through the TLB, as |
| @@ -155,7 +159,8 @@ void __init paging_init(void) | |||
| 155 | * pte's will be filled in by __set_fixmap(). | 159 | * pte's will be filled in by __set_fixmap(). |
| 156 | */ | 160 | */ |
| 157 | vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; | 161 | vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; |
| 158 | page_table_range_init(vaddr, 0, swapper_pg_dir); | 162 | end = (FIXADDR_TOP + PMD_SIZE - 1) & PMD_MASK; |
| 163 | page_table_range_init(vaddr, end, swapper_pg_dir); | ||
| 159 | 164 | ||
| 160 | kmap_coherent_init(); | 165 | kmap_coherent_init(); |
| 161 | 166 | ||
| @@ -210,6 +215,9 @@ void __init mem_init(void) | |||
| 210 | high_memory = node_high_memory; | 215 | high_memory = node_high_memory; |
| 211 | } | 216 | } |
| 212 | 217 | ||
| 218 | /* Set this up early, so we can take care of the zero page */ | ||
| 219 | cpu_cache_init(); | ||
| 220 | |||
| 213 | /* clear the zero-page */ | 221 | /* clear the zero-page */ |
| 214 | memset(empty_zero_page, 0, PAGE_SIZE); | 222 | memset(empty_zero_page, 0, PAGE_SIZE); |
| 215 | __flush_wback_region(empty_zero_page, PAGE_SIZE); | 223 | __flush_wback_region(empty_zero_page, PAGE_SIZE); |
| @@ -230,8 +238,6 @@ void __init mem_init(void) | |||
| 230 | datasize >> 10, | 238 | datasize >> 10, |
| 231 | initsize >> 10); | 239 | initsize >> 10); |
| 232 | 240 | ||
| 233 | p3_cache_init(); | ||
| 234 | |||
| 235 | /* Initialize the vDSO */ | 241 | /* Initialize the vDSO */ |
| 236 | vsyscall_init(); | 242 | vsyscall_init(); |
| 237 | } | 243 | } |
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c index da2f4186f2cd..c3250614e3ae 100644 --- a/arch/sh/mm/ioremap_32.c +++ b/arch/sh/mm/ioremap_32.c | |||
| @@ -57,14 +57,6 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size, | |||
| 57 | if (is_pci_memory_fixed_range(phys_addr, size)) | 57 | if (is_pci_memory_fixed_range(phys_addr, size)) |
| 58 | return (void __iomem *)phys_addr; | 58 | return (void __iomem *)phys_addr; |
| 59 | 59 | ||
| 60 | #if !defined(CONFIG_PMB_FIXED) | ||
| 61 | /* | ||
| 62 | * Don't allow anybody to remap normal RAM that we're using.. | ||
| 63 | */ | ||
| 64 | if (phys_addr < virt_to_phys(high_memory)) | ||
| 65 | return NULL; | ||
| 66 | #endif | ||
| 67 | |||
| 68 | /* | 60 | /* |
| 69 | * Mappings have to be page-aligned | 61 | * Mappings have to be page-aligned |
| 70 | */ | 62 | */ |
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c index 828c8597219d..b16843d02b76 100644 --- a/arch/sh/mm/ioremap_64.c +++ b/arch/sh/mm/ioremap_64.c | |||
| @@ -94,7 +94,6 @@ static struct resource *shmedia_find_resource(struct resource *root, | |||
| 94 | static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size, | 94 | static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size, |
| 95 | const char *name, unsigned long flags) | 95 | const char *name, unsigned long flags) |
| 96 | { | 96 | { |
| 97 | static int printed_full; | ||
| 98 | struct xresource *xres; | 97 | struct xresource *xres; |
| 99 | struct resource *res; | 98 | struct resource *res; |
| 100 | char *tack; | 99 | char *tack; |
| @@ -108,11 +107,8 @@ static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size, | |||
| 108 | tack = xres->xname; | 107 | tack = xres->xname; |
| 109 | res = &xres->xres; | 108 | res = &xres->xres; |
| 110 | } else { | 109 | } else { |
| 111 | if (!printed_full) { | 110 | printk_once(KERN_NOTICE "%s: done with statics, " |
| 112 | printk(KERN_NOTICE "%s: done with statics, " | ||
| 113 | "switching to kmalloc\n", __func__); | 111 | "switching to kmalloc\n", __func__); |
| 114 | printed_full = 1; | ||
| 115 | } | ||
| 116 | tlen = strlen(name); | 112 | tlen = strlen(name); |
| 117 | tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL); | 113 | tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL); |
| 118 | if (!tack) | 114 | if (!tack) |
diff --git a/arch/sh/mm/kmap.c b/arch/sh/mm/kmap.c new file mode 100644 index 000000000000..16e01b5fed04 --- /dev/null +++ b/arch/sh/mm/kmap.c | |||
| @@ -0,0 +1,65 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/mm/kmap.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999, 2000, 2002 Niibe Yutaka | ||
| 5 | * Copyright (C) 2002 - 2009 Paul Mundt | ||
| 6 | * | ||
| 7 | * Released under the terms of the GNU GPL v2.0. | ||
| 8 | */ | ||
| 9 | #include <linux/mm.h> | ||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/mutex.h> | ||
| 12 | #include <linux/fs.h> | ||
| 13 | #include <linux/highmem.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | #include <asm/mmu_context.h> | ||
| 16 | #include <asm/cacheflush.h> | ||
| 17 | |||
| 18 | #define kmap_get_fixmap_pte(vaddr) \ | ||
| 19 | pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr)) | ||
| 20 | |||
| 21 | static pte_t *kmap_coherent_pte; | ||
| 22 | |||
| 23 | void __init kmap_coherent_init(void) | ||
| 24 | { | ||
| 25 | unsigned long vaddr; | ||
| 26 | |||
| 27 | /* cache the first coherent kmap pte */ | ||
| 28 | vaddr = __fix_to_virt(FIX_CMAP_BEGIN); | ||
| 29 | kmap_coherent_pte = kmap_get_fixmap_pte(vaddr); | ||
| 30 | } | ||
| 31 | |||
| 32 | void *kmap_coherent(struct page *page, unsigned long addr) | ||
| 33 | { | ||
| 34 | enum fixed_addresses idx; | ||
| 35 | unsigned long vaddr; | ||
| 36 | |||
| 37 | BUG_ON(test_bit(PG_dcache_dirty, &page->flags)); | ||
| 38 | |||
| 39 | pagefault_disable(); | ||
| 40 | |||
| 41 | idx = FIX_CMAP_END - | ||
| 42 | ((addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT); | ||
| 43 | vaddr = __fix_to_virt(idx); | ||
| 44 | |||
| 45 | BUG_ON(!pte_none(*(kmap_coherent_pte - idx))); | ||
| 46 | set_pte(kmap_coherent_pte - idx, mk_pte(page, PAGE_KERNEL)); | ||
| 47 | |||
| 48 | return (void *)vaddr; | ||
| 49 | } | ||
| 50 | |||
| 51 | void kunmap_coherent(void *kvaddr) | ||
| 52 | { | ||
| 53 | if (kvaddr >= (void *)FIXADDR_START) { | ||
| 54 | unsigned long vaddr = (unsigned long)kvaddr & PAGE_MASK; | ||
| 55 | enum fixed_addresses idx = __virt_to_fix(vaddr); | ||
| 56 | |||
| 57 | /* XXX.. Kill this later, here for sanity at the moment.. */ | ||
| 58 | __flush_purge_region((void *)vaddr, PAGE_SIZE); | ||
| 59 | |||
| 60 | pte_clear(&init_mm, vaddr, kmap_coherent_pte - idx); | ||
| 61 | local_flush_tlb_one(get_asid(), vaddr); | ||
| 62 | } | ||
| 63 | |||
| 64 | pagefault_enable(); | ||
| 65 | } | ||
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c index 1b5fdfb4e0c2..d2984fa42d3d 100644 --- a/arch/sh/mm/mmap.c +++ b/arch/sh/mm/mmap.c | |||
| @@ -14,10 +14,10 @@ | |||
| 14 | #include <asm/page.h> | 14 | #include <asm/page.h> |
| 15 | #include <asm/processor.h> | 15 | #include <asm/processor.h> |
| 16 | 16 | ||
| 17 | #ifdef CONFIG_MMU | ||
| 18 | unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ | 17 | unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ |
| 19 | EXPORT_SYMBOL(shm_align_mask); | 18 | EXPORT_SYMBOL(shm_align_mask); |
| 20 | 19 | ||
| 20 | #ifdef CONFIG_MMU | ||
| 21 | /* | 21 | /* |
| 22 | * To avoid cache aliases, we map the shared page with same color. | 22 | * To avoid cache aliases, we map the shared page with same color. |
| 23 | */ | 23 | */ |
diff --git a/arch/sh/mm/tlb-nommu.c b/arch/sh/mm/nommu.c index 71c742b5aee3..ac16c05917ef 100644 --- a/arch/sh/mm/tlb-nommu.c +++ b/arch/sh/mm/nommu.c | |||
| @@ -1,20 +1,41 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/sh/mm/tlb-nommu.c | 2 | * arch/sh/mm/nommu.c |
| 3 | * | 3 | * |
| 4 | * TLB Operations for MMUless SH. | 4 | * Various helper routines and stubs for MMUless SH. |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2002 Paul Mundt | 6 | * Copyright (C) 2002 - 2009 Paul Mundt |
| 7 | * | 7 | * |
| 8 | * Released under the terms of the GNU GPL v2.0. | 8 | * Released under the terms of the GNU GPL v2.0. |
| 9 | */ | 9 | */ |
| 10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/string.h> | ||
| 11 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
| 12 | #include <asm/pgtable.h> | 14 | #include <asm/pgtable.h> |
| 13 | #include <asm/tlbflush.h> | 15 | #include <asm/tlbflush.h> |
| 16 | #include <asm/page.h> | ||
| 17 | #include <asm/uaccess.h> | ||
| 14 | 18 | ||
| 15 | /* | 19 | /* |
| 16 | * Nothing too terribly exciting here .. | 20 | * Nothing too terribly exciting here .. |
| 17 | */ | 21 | */ |
| 22 | void copy_page(void *to, void *from) | ||
| 23 | { | ||
| 24 | memcpy(to, from, PAGE_SIZE); | ||
| 25 | } | ||
| 26 | |||
| 27 | __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n) | ||
| 28 | { | ||
| 29 | memcpy(to, from, n); | ||
| 30 | return 0; | ||
| 31 | } | ||
| 32 | |||
| 33 | __kernel_size_t __clear_user(void *to, __kernel_size_t n) | ||
| 34 | { | ||
| 35 | memset(to, 0, n); | ||
| 36 | return 0; | ||
| 37 | } | ||
| 38 | |||
| 18 | void local_flush_tlb_all(void) | 39 | void local_flush_tlb_all(void) |
| 19 | { | 40 | { |
| 20 | BUG(); | 41 | BUG(); |
| @@ -46,8 +67,21 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) | |||
| 46 | BUG(); | 67 | BUG(); |
| 47 | } | 68 | } |
| 48 | 69 | ||
| 49 | void update_mmu_cache(struct vm_area_struct * vma, | 70 | void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) |
| 50 | unsigned long address, pte_t pte) | 71 | { |
| 72 | } | ||
| 73 | |||
| 74 | void __init kmap_coherent_init(void) | ||
| 75 | { | ||
| 76 | } | ||
| 77 | |||
| 78 | void *kmap_coherent(struct page *page, unsigned long addr) | ||
| 79 | { | ||
| 80 | BUG(); | ||
| 81 | return NULL; | ||
| 82 | } | ||
| 83 | |||
| 84 | void kunmap_coherent(void *kvaddr) | ||
| 51 | { | 85 | { |
| 52 | BUG(); | 86 | BUG(); |
| 53 | } | 87 | } |
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c index 095d93bec7cd..9b784fdb947c 100644 --- a/arch/sh/mm/numa.c +++ b/arch/sh/mm/numa.c | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | */ | 9 | */ |
| 10 | #include <linux/module.h> | 10 | #include <linux/module.h> |
| 11 | #include <linux/bootmem.h> | 11 | #include <linux/bootmem.h> |
| 12 | #include <linux/lmb.h> | ||
| 12 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
| 13 | #include <linux/numa.h> | 14 | #include <linux/numa.h> |
| 14 | #include <linux/pfn.h> | 15 | #include <linux/pfn.h> |
| @@ -26,6 +27,15 @@ EXPORT_SYMBOL_GPL(node_data); | |||
| 26 | void __init setup_memory(void) | 27 | void __init setup_memory(void) |
| 27 | { | 28 | { |
| 28 | unsigned long free_pfn = PFN_UP(__pa(_end)); | 29 | unsigned long free_pfn = PFN_UP(__pa(_end)); |
| 30 | u64 base = min_low_pfn << PAGE_SHIFT; | ||
| 31 | u64 size = (max_low_pfn << PAGE_SHIFT) - min_low_pfn; | ||
| 32 | |||
| 33 | lmb_add(base, size); | ||
| 34 | |||
| 35 | /* Reserve the LMB regions used by the kernel, initrd, etc.. */ | ||
| 36 | lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET, | ||
| 37 | (PFN_PHYS(free_pfn) + PAGE_SIZE - 1) - | ||
| 38 | (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET)); | ||
| 29 | 39 | ||
| 30 | /* | 40 | /* |
| 31 | * Node 0 sets up its pgdat at the first available pfn, | 41 | * Node 0 sets up its pgdat at the first available pfn, |
| @@ -45,24 +55,23 @@ void __init setup_memory(void) | |||
| 45 | 55 | ||
| 46 | void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end) | 56 | void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end) |
| 47 | { | 57 | { |
| 48 | unsigned long bootmap_pages, bootmap_start, bootmap_size; | 58 | unsigned long bootmap_pages; |
| 49 | unsigned long start_pfn, free_pfn, end_pfn; | 59 | unsigned long start_pfn, end_pfn; |
| 60 | unsigned long bootmem_paddr; | ||
| 50 | 61 | ||
| 51 | /* Don't allow bogus node assignment */ | 62 | /* Don't allow bogus node assignment */ |
| 52 | BUG_ON(nid > MAX_NUMNODES || nid == 0); | 63 | BUG_ON(nid > MAX_NUMNODES || nid == 0); |
| 53 | 64 | ||
| 54 | /* | 65 | start_pfn = start >> PAGE_SHIFT; |
| 55 | * The free pfn starts at the beginning of the range, and is | ||
| 56 | * advanced as necessary for pgdat and node map allocations. | ||
| 57 | */ | ||
| 58 | free_pfn = start_pfn = start >> PAGE_SHIFT; | ||
| 59 | end_pfn = end >> PAGE_SHIFT; | 66 | end_pfn = end >> PAGE_SHIFT; |
| 60 | 67 | ||
| 68 | lmb_add(start, end - start); | ||
| 69 | |||
| 61 | __add_active_range(nid, start_pfn, end_pfn); | 70 | __add_active_range(nid, start_pfn, end_pfn); |
| 62 | 71 | ||
| 63 | /* Node-local pgdat */ | 72 | /* Node-local pgdat */ |
| 64 | NODE_DATA(nid) = pfn_to_kaddr(free_pfn); | 73 | NODE_DATA(nid) = __va(lmb_alloc_base(sizeof(struct pglist_data), |
| 65 | free_pfn += PFN_UP(sizeof(struct pglist_data)); | 74 | SMP_CACHE_BYTES, end_pfn)); |
| 66 | memset(NODE_DATA(nid), 0, sizeof(struct pglist_data)); | 75 | memset(NODE_DATA(nid), 0, sizeof(struct pglist_data)); |
| 67 | 76 | ||
| 68 | NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; | 77 | NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; |
| @@ -71,16 +80,17 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end) | |||
| 71 | 80 | ||
| 72 | /* Node-local bootmap */ | 81 | /* Node-local bootmap */ |
| 73 | bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn); | 82 | bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn); |
| 74 | bootmap_start = (unsigned long)pfn_to_kaddr(free_pfn); | 83 | bootmem_paddr = lmb_alloc_base(bootmap_pages << PAGE_SHIFT, |
| 75 | bootmap_size = init_bootmem_node(NODE_DATA(nid), free_pfn, start_pfn, | 84 | PAGE_SIZE, end_pfn); |
| 76 | end_pfn); | 85 | init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT, |
| 86 | start_pfn, end_pfn); | ||
| 77 | 87 | ||
| 78 | free_bootmem_with_active_regions(nid, end_pfn); | 88 | free_bootmem_with_active_regions(nid, end_pfn); |
| 79 | 89 | ||
| 80 | /* Reserve the pgdat and bootmap space with the bootmem allocator */ | 90 | /* Reserve the pgdat and bootmap space with the bootmem allocator */ |
| 81 | reserve_bootmem_node(NODE_DATA(nid), start_pfn << PAGE_SHIFT, | 91 | reserve_bootmem_node(NODE_DATA(nid), start_pfn << PAGE_SHIFT, |
| 82 | sizeof(struct pglist_data), BOOTMEM_DEFAULT); | 92 | sizeof(struct pglist_data), BOOTMEM_DEFAULT); |
| 83 | reserve_bootmem_node(NODE_DATA(nid), free_pfn << PAGE_SHIFT, | 93 | reserve_bootmem_node(NODE_DATA(nid), bootmem_paddr, |
| 84 | bootmap_pages << PAGE_SHIFT, BOOTMEM_DEFAULT); | 94 | bootmap_pages << PAGE_SHIFT, BOOTMEM_DEFAULT); |
| 85 | 95 | ||
| 86 | /* It's up */ | 96 | /* It's up */ |
diff --git a/arch/sh/mm/pg-nommu.c b/arch/sh/mm/pg-nommu.c deleted file mode 100644 index 91ed4e695ff7..000000000000 --- a/arch/sh/mm/pg-nommu.c +++ /dev/null | |||
| @@ -1,38 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/mm/pg-nommu.c | ||
| 3 | * | ||
| 4 | * clear_page()/copy_page() implementation for MMUless SH. | ||
| 5 | * | ||
| 6 | * Copyright (C) 2003 Paul Mundt | ||
| 7 | * | ||
| 8 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 9 | * License. See the file "COPYING" in the main directory of this archive | ||
| 10 | * for more details. | ||
| 11 | */ | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/string.h> | ||
| 15 | #include <asm/page.h> | ||
| 16 | #include <asm/uaccess.h> | ||
| 17 | |||
| 18 | void copy_page(void *to, void *from) | ||
| 19 | { | ||
| 20 | memcpy(to, from, PAGE_SIZE); | ||
| 21 | } | ||
| 22 | |||
| 23 | void clear_page(void *to) | ||
| 24 | { | ||
| 25 | memset(to, 0, PAGE_SIZE); | ||
| 26 | } | ||
| 27 | |||
| 28 | __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n) | ||
| 29 | { | ||
| 30 | memcpy(to, from, n); | ||
| 31 | return 0; | ||
| 32 | } | ||
| 33 | |||
| 34 | __kernel_size_t __clear_user(void *to, __kernel_size_t n) | ||
| 35 | { | ||
| 36 | memset(to, 0, n); | ||
| 37 | return 0; | ||
| 38 | } | ||
diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c deleted file mode 100644 index 2fe14da1f839..000000000000 --- a/arch/sh/mm/pg-sh4.c +++ /dev/null | |||
| @@ -1,146 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/mm/pg-sh4.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999, 2000, 2002 Niibe Yutaka | ||
| 5 | * Copyright (C) 2002 - 2007 Paul Mundt | ||
| 6 | * | ||
| 7 | * Released under the terms of the GNU GPL v2.0. | ||
| 8 | */ | ||
| 9 | #include <linux/mm.h> | ||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/mutex.h> | ||
| 12 | #include <linux/fs.h> | ||
| 13 | #include <linux/highmem.h> | ||
| 14 | #include <linux/module.h> | ||
| 15 | #include <asm/mmu_context.h> | ||
| 16 | #include <asm/cacheflush.h> | ||
| 17 | |||
| 18 | #define CACHE_ALIAS (current_cpu_data.dcache.alias_mask) | ||
| 19 | |||
| 20 | #define kmap_get_fixmap_pte(vaddr) \ | ||
| 21 | pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr)) | ||
| 22 | |||
| 23 | static pte_t *kmap_coherent_pte; | ||
| 24 | |||
| 25 | void __init kmap_coherent_init(void) | ||
| 26 | { | ||
| 27 | unsigned long vaddr; | ||
| 28 | |||
| 29 | /* cache the first coherent kmap pte */ | ||
| 30 | vaddr = __fix_to_virt(FIX_CMAP_BEGIN); | ||
| 31 | kmap_coherent_pte = kmap_get_fixmap_pte(vaddr); | ||
| 32 | } | ||
| 33 | |||
| 34 | static inline void *kmap_coherent(struct page *page, unsigned long addr) | ||
| 35 | { | ||
| 36 | enum fixed_addresses idx; | ||
| 37 | unsigned long vaddr, flags; | ||
| 38 | pte_t pte; | ||
| 39 | |||
| 40 | inc_preempt_count(); | ||
| 41 | |||
| 42 | idx = (addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT; | ||
| 43 | vaddr = __fix_to_virt(FIX_CMAP_END - idx); | ||
| 44 | pte = mk_pte(page, PAGE_KERNEL); | ||
| 45 | |||
| 46 | local_irq_save(flags); | ||
| 47 | flush_tlb_one(get_asid(), vaddr); | ||
| 48 | local_irq_restore(flags); | ||
| 49 | |||
| 50 | update_mmu_cache(NULL, vaddr, pte); | ||
| 51 | |||
| 52 | set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte); | ||
| 53 | |||
| 54 | return (void *)vaddr; | ||
| 55 | } | ||
| 56 | |||
| 57 | static inline void kunmap_coherent(struct page *page) | ||
| 58 | { | ||
| 59 | dec_preempt_count(); | ||
| 60 | preempt_check_resched(); | ||
| 61 | } | ||
| 62 | |||
| 63 | /* | ||
| 64 | * clear_user_page | ||
| 65 | * @to: P1 address | ||
| 66 | * @address: U0 address to be mapped | ||
| 67 | * @page: page (virt_to_page(to)) | ||
| 68 | */ | ||
| 69 | void clear_user_page(void *to, unsigned long address, struct page *page) | ||
| 70 | { | ||
| 71 | __set_bit(PG_mapped, &page->flags); | ||
| 72 | |||
| 73 | clear_page(to); | ||
| 74 | if ((((address & PAGE_MASK) ^ (unsigned long)to) & CACHE_ALIAS)) | ||
| 75 | __flush_wback_region(to, PAGE_SIZE); | ||
| 76 | } | ||
| 77 | |||
| 78 | void copy_to_user_page(struct vm_area_struct *vma, struct page *page, | ||
| 79 | unsigned long vaddr, void *dst, const void *src, | ||
| 80 | unsigned long len) | ||
| 81 | { | ||
| 82 | void *vto; | ||
| 83 | |||
| 84 | __set_bit(PG_mapped, &page->flags); | ||
| 85 | |||
| 86 | vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); | ||
| 87 | memcpy(vto, src, len); | ||
| 88 | kunmap_coherent(vto); | ||
| 89 | |||
| 90 | if (vma->vm_flags & VM_EXEC) | ||
| 91 | flush_cache_page(vma, vaddr, page_to_pfn(page)); | ||
| 92 | } | ||
| 93 | |||
| 94 | void copy_from_user_page(struct vm_area_struct *vma, struct page *page, | ||
| 95 | unsigned long vaddr, void *dst, const void *src, | ||
| 96 | unsigned long len) | ||
| 97 | { | ||
| 98 | void *vfrom; | ||
| 99 | |||
| 100 | __set_bit(PG_mapped, &page->flags); | ||
| 101 | |||
| 102 | vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); | ||
| 103 | memcpy(dst, vfrom, len); | ||
| 104 | kunmap_coherent(vfrom); | ||
| 105 | } | ||
| 106 | |||
| 107 | void copy_user_highpage(struct page *to, struct page *from, | ||
| 108 | unsigned long vaddr, struct vm_area_struct *vma) | ||
| 109 | { | ||
| 110 | void *vfrom, *vto; | ||
| 111 | |||
| 112 | __set_bit(PG_mapped, &to->flags); | ||
| 113 | |||
| 114 | vto = kmap_atomic(to, KM_USER1); | ||
| 115 | vfrom = kmap_coherent(from, vaddr); | ||
| 116 | copy_page(vto, vfrom); | ||
| 117 | kunmap_coherent(vfrom); | ||
| 118 | |||
| 119 | if (((vaddr ^ (unsigned long)vto) & CACHE_ALIAS)) | ||
| 120 | __flush_wback_region(vto, PAGE_SIZE); | ||
| 121 | |||
| 122 | kunmap_atomic(vto, KM_USER1); | ||
| 123 | /* Make sure this page is cleared on other CPU's too before using it */ | ||
| 124 | smp_wmb(); | ||
| 125 | } | ||
| 126 | EXPORT_SYMBOL(copy_user_highpage); | ||
| 127 | |||
| 128 | /* | ||
| 129 | * For SH-4, we have our own implementation for ptep_get_and_clear | ||
| 130 | */ | ||
| 131 | pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | ||
| 132 | { | ||
| 133 | pte_t pte = *ptep; | ||
| 134 | |||
| 135 | pte_clear(mm, addr, ptep); | ||
| 136 | if (!pte_not_present(pte)) { | ||
| 137 | unsigned long pfn = pte_pfn(pte); | ||
| 138 | if (pfn_valid(pfn)) { | ||
| 139 | struct page *page = pfn_to_page(pfn); | ||
| 140 | struct address_space *mapping = page_mapping(page); | ||
| 141 | if (!mapping || !mapping_writably_mapped(mapping)) | ||
| 142 | __clear_bit(PG_mapped, &page->flags); | ||
| 143 | } | ||
| 144 | } | ||
| 145 | return pte; | ||
| 146 | } | ||
diff --git a/arch/sh/mm/pg-sh7705.c b/arch/sh/mm/pg-sh7705.c deleted file mode 100644 index eaf25147194c..000000000000 --- a/arch/sh/mm/pg-sh7705.c +++ /dev/null | |||
| @@ -1,138 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/sh/mm/pg-sh7705.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 1999, 2000 Niibe Yutaka | ||
| 5 | * Copyright (C) 2004 Alex Song | ||
| 6 | * | ||
| 7 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 8 | * License. See the file "COPYING" in the main directory of this archive | ||
| 9 | * for more details. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/mman.h> | ||
| 15 | #include <linux/mm.h> | ||
| 16 | #include <linux/threads.h> | ||
| 17 | #include <linux/fs.h> | ||
| 18 | #include <asm/addrspace.h> | ||
| 19 | #include <asm/page.h> | ||
| 20 | #include <asm/pgtable.h> | ||
| 21 | #include <asm/processor.h> | ||
| 22 | #include <asm/cache.h> | ||
| 23 | #include <asm/io.h> | ||
| 24 | #include <asm/uaccess.h> | ||
| 25 | #include <asm/pgalloc.h> | ||
| 26 | #include <asm/mmu_context.h> | ||
| 27 | #include <asm/cacheflush.h> | ||
| 28 | |||
| 29 | static inline void __flush_purge_virtual_region(void *p1, void *virt, int size) | ||
| 30 | { | ||
| 31 | unsigned long v; | ||
| 32 | unsigned long begin, end; | ||
| 33 | unsigned long p1_begin; | ||
| 34 | |||
| 35 | |||
| 36 | begin = L1_CACHE_ALIGN((unsigned long)virt); | ||
| 37 | end = L1_CACHE_ALIGN((unsigned long)virt + size); | ||
| 38 | |||
| 39 | p1_begin = (unsigned long)p1 & ~(L1_CACHE_BYTES - 1); | ||
| 40 | |||
| 41 | /* do this the slow way as we may not have TLB entries | ||
| 42 | * for virt yet. */ | ||
| 43 | for (v = begin; v < end; v += L1_CACHE_BYTES) { | ||
| 44 | unsigned long p; | ||
| 45 | unsigned long ways, addr; | ||
| 46 | |||
| 47 | p = __pa(p1_begin); | ||
| 48 | |||
| 49 | ways = current_cpu_data.dcache.ways; | ||
| 50 | addr = CACHE_OC_ADDRESS_ARRAY; | ||
| 51 | |||
| 52 | do { | ||
| 53 | unsigned long data; | ||
| 54 | |||
| 55 | addr |= (v & current_cpu_data.dcache.entry_mask); | ||
| 56 | |||
| 57 | data = ctrl_inl(addr); | ||
| 58 | if ((data & CACHE_PHYSADDR_MASK) == | ||
| 59 | (p & CACHE_PHYSADDR_MASK)) { | ||
| 60 | data &= ~(SH_CACHE_UPDATED|SH_CACHE_VALID); | ||
| 61 | ctrl_outl(data, addr); | ||
| 62 | } | ||
| 63 | |||
| 64 | addr += current_cpu_data.dcache.way_incr; | ||
| 65 | } while (--ways); | ||
| 66 | |||
| 67 | p1_begin += L1_CACHE_BYTES; | ||
| 68 | } | ||
| 69 | } | ||
| 70 | |||
| 71 | /* | ||
| 72 | * clear_user_page | ||
| 73 | * @to: P1 address | ||
| 74 | * @address: U0 address to be mapped | ||
| 75 | */ | ||
| 76 | void clear_user_page(void *to, unsigned long address, struct page *pg) | ||
| 77 | { | ||
| 78 | struct page *page = virt_to_page(to); | ||
| 79 | |||
| 80 | __set_bit(PG_mapped, &page->flags); | ||
| 81 | if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) { | ||
| 82 | clear_page(to); | ||
| 83 | __flush_wback_region(to, PAGE_SIZE); | ||
| 84 | } else { | ||
| 85 | __flush_purge_virtual_region(to, | ||
| 86 | (void *)(address & 0xfffff000), | ||
| 87 | PAGE_SIZE); | ||
| 88 | clear_page(to); | ||
| 89 | __flush_wback_region(to, PAGE_SIZE); | ||
| 90 | } | ||
| 91 | } | ||
| 92 | |||
| 93 | /* | ||
| 94 | * copy_user_page | ||
| 95 | * @to: P1 address | ||
| 96 | * @from: P1 address | ||
| 97 | * @address: U0 address to be mapped | ||
| 98 | */ | ||
| 99 | void copy_user_page(void *to, void *from, unsigned long address, struct page *pg) | ||
| 100 | { | ||
| 101 | struct page *page = virt_to_page(to); | ||
| 102 | |||
| 103 | |||
| 104 | __set_bit(PG_mapped, &page->flags); | ||
| 105 | if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) { | ||
| 106 | copy_page(to, from); | ||
| 107 | __flush_wback_region(to, PAGE_SIZE); | ||
| 108 | } else { | ||
| 109 | __flush_purge_virtual_region(to, | ||
| 110 | (void *)(address & 0xfffff000), | ||
| 111 | PAGE_SIZE); | ||
| 112 | copy_page(to, from); | ||
| 113 | __flush_wback_region(to, PAGE_SIZE); | ||
| 114 | } | ||
| 115 | } | ||
| 116 | |||
| 117 | /* | ||
| 118 | * For SH7705, we have our own implementation for ptep_get_and_clear | ||
| 119 | * Copied from pg-sh4.c | ||
| 120 | */ | ||
| 121 | pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | ||
| 122 | { | ||
| 123 | pte_t pte = *ptep; | ||
| 124 | |||
| 125 | pte_clear(mm, addr, ptep); | ||
| 126 | if (!pte_not_present(pte)) { | ||
| 127 | unsigned long pfn = pte_pfn(pte); | ||
| 128 | if (pfn_valid(pfn)) { | ||
| 129 | struct page *page = pfn_to_page(pfn); | ||
| 130 | struct address_space *mapping = page_mapping(page); | ||
| 131 | if (!mapping || !mapping_writably_mapped(mapping)) | ||
| 132 | __clear_bit(PG_mapped, &page->flags); | ||
| 133 | } | ||
| 134 | } | ||
| 135 | |||
| 136 | return pte; | ||
| 137 | } | ||
| 138 | |||
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c index 2aab3ea934d7..409b7c2b4b9d 100644 --- a/arch/sh/mm/tlb-pteaex.c +++ b/arch/sh/mm/tlb-pteaex.c | |||
| @@ -16,34 +16,16 @@ | |||
| 16 | #include <asm/mmu_context.h> | 16 | #include <asm/mmu_context.h> |
| 17 | #include <asm/cacheflush.h> | 17 | #include <asm/cacheflush.h> |
| 18 | 18 | ||
| 19 | void update_mmu_cache(struct vm_area_struct * vma, | 19 | void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) |
| 20 | unsigned long address, pte_t pte) | ||
| 21 | { | 20 | { |
| 22 | unsigned long flags; | 21 | unsigned long flags, pteval, vpn; |
| 23 | unsigned long pteval; | ||
| 24 | unsigned long vpn; | ||
| 25 | 22 | ||
| 26 | /* Ptrace may call this routine. */ | 23 | /* |
| 24 | * Handle debugger faulting in for debugee. | ||
| 25 | */ | ||
| 27 | if (vma && current->active_mm != vma->vm_mm) | 26 | if (vma && current->active_mm != vma->vm_mm) |
| 28 | return; | 27 | return; |
| 29 | 28 | ||
| 30 | #ifndef CONFIG_CACHE_OFF | ||
| 31 | { | ||
| 32 | unsigned long pfn = pte_pfn(pte); | ||
| 33 | |||
| 34 | if (pfn_valid(pfn)) { | ||
| 35 | struct page *page = pfn_to_page(pfn); | ||
| 36 | |||
| 37 | if (!test_bit(PG_mapped, &page->flags)) { | ||
| 38 | unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; | ||
| 39 | __flush_wback_region((void *)P1SEGADDR(phys), | ||
| 40 | PAGE_SIZE); | ||
| 41 | __set_bit(PG_mapped, &page->flags); | ||
| 42 | } | ||
| 43 | } | ||
| 44 | } | ||
| 45 | #endif | ||
| 46 | |||
| 47 | local_irq_save(flags); | 29 | local_irq_save(flags); |
| 48 | 30 | ||
| 49 | /* Set PTEH register */ | 31 | /* Set PTEH register */ |
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c index 17cb7c3adf22..ace8e6d2f59d 100644 --- a/arch/sh/mm/tlb-sh3.c +++ b/arch/sh/mm/tlb-sh3.c | |||
| @@ -27,32 +27,16 @@ | |||
| 27 | #include <asm/mmu_context.h> | 27 | #include <asm/mmu_context.h> |
| 28 | #include <asm/cacheflush.h> | 28 | #include <asm/cacheflush.h> |
| 29 | 29 | ||
| 30 | void update_mmu_cache(struct vm_area_struct * vma, | 30 | void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) |
| 31 | unsigned long address, pte_t pte) | ||
| 32 | { | 31 | { |
| 33 | unsigned long flags; | 32 | unsigned long flags, pteval, vpn; |
| 34 | unsigned long pteval; | ||
| 35 | unsigned long vpn; | ||
| 36 | 33 | ||
| 37 | /* Ptrace may call this routine. */ | 34 | /* |
| 35 | * Handle debugger faulting in for debugee. | ||
| 36 | */ | ||
| 38 | if (vma && current->active_mm != vma->vm_mm) | 37 | if (vma && current->active_mm != vma->vm_mm) |
| 39 | return; | 38 | return; |
| 40 | 39 | ||
| 41 | #if defined(CONFIG_SH7705_CACHE_32KB) | ||
| 42 | { | ||
| 43 | struct page *page = pte_page(pte); | ||
| 44 | unsigned long pfn = pte_pfn(pte); | ||
| 45 | |||
| 46 | if (pfn_valid(pfn) && !test_bit(PG_mapped, &page->flags)) { | ||
| 47 | unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; | ||
| 48 | |||
| 49 | __flush_wback_region((void *)P1SEGADDR(phys), | ||
| 50 | PAGE_SIZE); | ||
| 51 | __set_bit(PG_mapped, &page->flags); | ||
| 52 | } | ||
| 53 | } | ||
| 54 | #endif | ||
| 55 | |||
| 56 | local_irq_save(flags); | 40 | local_irq_save(flags); |
| 57 | 41 | ||
| 58 | /* Set PTEH register */ | 42 | /* Set PTEH register */ |
| @@ -93,4 +77,3 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page) | |||
| 93 | for (i = 0; i < ways; i++) | 77 | for (i = 0; i < ways; i++) |
| 94 | ctrl_outl(data, addr + (i << 8)); | 78 | ctrl_outl(data, addr + (i << 8)); |
| 95 | } | 79 | } |
| 96 | |||
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c index f0c7b7397fa6..8cf550e2570f 100644 --- a/arch/sh/mm/tlb-sh4.c +++ b/arch/sh/mm/tlb-sh4.c | |||
| @@ -15,34 +15,16 @@ | |||
| 15 | #include <asm/mmu_context.h> | 15 | #include <asm/mmu_context.h> |
| 16 | #include <asm/cacheflush.h> | 16 | #include <asm/cacheflush.h> |
| 17 | 17 | ||
| 18 | void update_mmu_cache(struct vm_area_struct * vma, | 18 | void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) |
| 19 | unsigned long address, pte_t pte) | ||
| 20 | { | 19 | { |
| 21 | unsigned long flags; | 20 | unsigned long flags, pteval, vpn; |
| 22 | unsigned long pteval; | ||
| 23 | unsigned long vpn; | ||
| 24 | 21 | ||
| 25 | /* Ptrace may call this routine. */ | 22 | /* |
| 23 | * Handle debugger faulting in for debugee. | ||
| 24 | */ | ||
| 26 | if (vma && current->active_mm != vma->vm_mm) | 25 | if (vma && current->active_mm != vma->vm_mm) |
| 27 | return; | 26 | return; |
| 28 | 27 | ||
| 29 | #ifndef CONFIG_CACHE_OFF | ||
| 30 | { | ||
| 31 | unsigned long pfn = pte_pfn(pte); | ||
| 32 | |||
| 33 | if (pfn_valid(pfn)) { | ||
| 34 | struct page *page = pfn_to_page(pfn); | ||
| 35 | |||
| 36 | if (!test_bit(PG_mapped, &page->flags)) { | ||
| 37 | unsigned long phys = pte_val(pte) & PTE_PHYS_MASK; | ||
| 38 | __flush_wback_region((void *)P1SEGADDR(phys), | ||
| 39 | PAGE_SIZE); | ||
| 40 | __set_bit(PG_mapped, &page->flags); | ||
| 41 | } | ||
| 42 | } | ||
| 43 | } | ||
| 44 | #endif | ||
| 45 | |||
| 46 | local_irq_save(flags); | 28 | local_irq_save(flags); |
| 47 | 29 | ||
| 48 | /* Set PTEH register */ | 30 | /* Set PTEH register */ |
| @@ -61,9 +43,12 @@ void update_mmu_cache(struct vm_area_struct * vma, | |||
| 61 | */ | 43 | */ |
| 62 | ctrl_outl(pte.pte_high, MMU_PTEA); | 44 | ctrl_outl(pte.pte_high, MMU_PTEA); |
| 63 | #else | 45 | #else |
| 64 | if (cpu_data->flags & CPU_HAS_PTEA) | 46 | if (cpu_data->flags & CPU_HAS_PTEA) { |
| 65 | /* TODO: make this look less hacky */ | 47 | /* The last 3 bits and the first one of pteval contains |
| 66 | ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA); | 48 | * the PTEA timing control and space attribute bits |
| 49 | */ | ||
| 50 | ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA); | ||
| 51 | } | ||
| 67 | #endif | 52 | #endif |
| 68 | 53 | ||
| 69 | /* Set PTEL register */ | 54 | /* Set PTEL register */ |
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c index dae131243bcc..fdb64e41ec50 100644 --- a/arch/sh/mm/tlb-sh5.c +++ b/arch/sh/mm/tlb-sh5.c | |||
| @@ -117,26 +117,15 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry) | |||
| 117 | * Load up a virtual<->physical translation for @eaddr<->@paddr in the | 117 | * Load up a virtual<->physical translation for @eaddr<->@paddr in the |
| 118 | * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry). | 118 | * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry). |
| 119 | */ | 119 | */ |
| 120 | inline void sh64_setup_tlb_slot(unsigned long long config_addr, | 120 | void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, |
| 121 | unsigned long eaddr, | 121 | unsigned long asid, unsigned long paddr) |
| 122 | unsigned long asid, | ||
| 123 | unsigned long paddr) | ||
| 124 | { | 122 | { |
| 125 | unsigned long long pteh, ptel; | 123 | unsigned long long pteh, ptel; |
| 126 | 124 | ||
| 127 | /* Sign extension */ | 125 | pteh = neff_sign_extend(eaddr); |
| 128 | #if (NEFF == 32) | ||
| 129 | pteh = (unsigned long long)(signed long long)(signed long) eaddr; | ||
| 130 | #else | ||
| 131 | #error "Can't sign extend more than 32 bits yet" | ||
| 132 | #endif | ||
| 133 | pteh &= PAGE_MASK; | 126 | pteh &= PAGE_MASK; |
| 134 | pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID; | 127 | pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID; |
| 135 | #if (NEFF == 32) | 128 | ptel = neff_sign_extend(paddr); |
| 136 | ptel = (unsigned long long)(signed long long)(signed long) paddr; | ||
| 137 | #else | ||
| 138 | #error "Can't sign extend more than 32 bits yet" | ||
| 139 | #endif | ||
| 140 | ptel &= PAGE_MASK; | 129 | ptel &= PAGE_MASK; |
| 141 | ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE); | 130 | ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE); |
| 142 | 131 | ||
| @@ -152,5 +141,5 @@ inline void sh64_setup_tlb_slot(unsigned long long config_addr, | |||
| 152 | * | 141 | * |
| 153 | * Teardown any existing mapping in the TLB slot @config_addr. | 142 | * Teardown any existing mapping in the TLB slot @config_addr. |
| 154 | */ | 143 | */ |
| 155 | inline void sh64_teardown_tlb_slot(unsigned long long config_addr) | 144 | void sh64_teardown_tlb_slot(unsigned long long config_addr) |
| 156 | __attribute__ ((alias("__flush_tlb_slot"))); | 145 | __attribute__ ((alias("__flush_tlb_slot"))); |
diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c index 3ce40ea34824..2dcc48528f7a 100644 --- a/arch/sh/mm/tlbflush_64.c +++ b/arch/sh/mm/tlbflush_64.c | |||
| @@ -329,22 +329,6 @@ do_sigbus: | |||
| 329 | goto no_context; | 329 | goto no_context; |
| 330 | } | 330 | } |
| 331 | 331 | ||
| 332 | void update_mmu_cache(struct vm_area_struct * vma, | ||
| 333 | unsigned long address, pte_t pte) | ||
| 334 | { | ||
| 335 | /* | ||
| 336 | * This appears to get called once for every pte entry that gets | ||
| 337 | * established => I don't think it's efficient to try refilling the | ||
| 338 | * TLBs with the pages - some may not get accessed even. Also, for | ||
| 339 | * executable pages, it is impossible to determine reliably here which | ||
| 340 | * TLB they should be mapped into (or both even). | ||
| 341 | * | ||
| 342 | * So, just do nothing here and handle faults on demand. In the | ||
| 343 | * TLBMISS handling case, the refill is now done anyway after the pte | ||
| 344 | * has been fixed up, so that deals with most useful cases. | ||
| 345 | */ | ||
| 346 | } | ||
| 347 | |||
| 348 | void local_flush_tlb_one(unsigned long asid, unsigned long page) | 332 | void local_flush_tlb_one(unsigned long asid, unsigned long page) |
| 349 | { | 333 | { |
| 350 | unsigned long long match, pteh=0, lpage; | 334 | unsigned long long match, pteh=0, lpage; |
| @@ -353,7 +337,7 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page) | |||
| 353 | /* | 337 | /* |
| 354 | * Sign-extend based on neff. | 338 | * Sign-extend based on neff. |
| 355 | */ | 339 | */ |
| 356 | lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page; | 340 | lpage = neff_sign_extend(page); |
| 357 | match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID; | 341 | match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID; |
| 358 | match |= lpage; | 342 | match |= lpage; |
| 359 | 343 | ||
| @@ -482,3 +466,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) | |||
| 482 | /* FIXME: Optimize this later.. */ | 466 | /* FIXME: Optimize this later.. */ |
| 483 | flush_tlb_all(); | 467 | flush_tlb_all(); |
| 484 | } | 468 | } |
| 469 | |||
| 470 | void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) | ||
| 471 | { | ||
| 472 | } | ||
diff --git a/arch/sh/oprofile/backtrace.c b/arch/sh/oprofile/backtrace.c index 9499a2914f89..2bc74de23f08 100644 --- a/arch/sh/oprofile/backtrace.c +++ b/arch/sh/oprofile/backtrace.c | |||
| @@ -17,9 +17,43 @@ | |||
| 17 | #include <linux/sched.h> | 17 | #include <linux/sched.h> |
| 18 | #include <linux/kallsyms.h> | 18 | #include <linux/kallsyms.h> |
| 19 | #include <linux/mm.h> | 19 | #include <linux/mm.h> |
| 20 | #include <asm/unwinder.h> | ||
| 20 | #include <asm/ptrace.h> | 21 | #include <asm/ptrace.h> |
| 21 | #include <asm/uaccess.h> | 22 | #include <asm/uaccess.h> |
| 22 | #include <asm/sections.h> | 23 | #include <asm/sections.h> |
| 24 | #include <asm/stacktrace.h> | ||
| 25 | |||
| 26 | static void backtrace_warning_symbol(void *data, char *msg, | ||
| 27 | unsigned long symbol) | ||
| 28 | { | ||
| 29 | /* Ignore warnings */ | ||
| 30 | } | ||
| 31 | |||
| 32 | static void backtrace_warning(void *data, char *msg) | ||
| 33 | { | ||
| 34 | /* Ignore warnings */ | ||
| 35 | } | ||
| 36 | |||
| 37 | static int backtrace_stack(void *data, char *name) | ||
| 38 | { | ||
| 39 | /* Yes, we want all stacks */ | ||
| 40 | return 0; | ||
| 41 | } | ||
| 42 | |||
| 43 | static void backtrace_address(void *data, unsigned long addr, int reliable) | ||
| 44 | { | ||
| 45 | unsigned int *depth = data; | ||
| 46 | |||
| 47 | if ((*depth)--) | ||
| 48 | oprofile_add_trace(addr); | ||
| 49 | } | ||
| 50 | |||
| 51 | static struct stacktrace_ops backtrace_ops = { | ||
| 52 | .warning = backtrace_warning, | ||
| 53 | .warning_symbol = backtrace_warning_symbol, | ||
| 54 | .stack = backtrace_stack, | ||
| 55 | .address = backtrace_address, | ||
| 56 | }; | ||
| 23 | 57 | ||
| 24 | /* Limit to stop backtracing too far. */ | 58 | /* Limit to stop backtracing too far. */ |
| 25 | static int backtrace_limit = 20; | 59 | static int backtrace_limit = 20; |
| @@ -47,50 +81,6 @@ user_backtrace(unsigned long *stackaddr, struct pt_regs *regs) | |||
| 47 | return stackaddr; | 81 | return stackaddr; |
| 48 | } | 82 | } |
| 49 | 83 | ||
| 50 | /* | ||
| 51 | * | | /\ Higher addresses | ||
| 52 | * | | | ||
| 53 | * --------------- stack base (address of current_thread_info) | ||
| 54 | * | thread info | | ||
| 55 | * . . | ||
| 56 | * | stack | | ||
| 57 | * --------------- saved regs->regs[15] value if valid | ||
| 58 | * . . | ||
| 59 | * --------------- struct pt_regs stored on stack (struct pt_regs *) | ||
| 60 | * | | | ||
| 61 | * . . | ||
| 62 | * | | | ||
| 63 | * --------------- ??? | ||
| 64 | * | | | ||
| 65 | * | | \/ Lower addresses | ||
| 66 | * | ||
| 67 | * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values | ||
| 68 | */ | ||
| 69 | static int valid_kernel_stack(unsigned long *stackaddr, struct pt_regs *regs) | ||
| 70 | { | ||
| 71 | unsigned long stack = (unsigned long)regs; | ||
| 72 | unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE; | ||
| 73 | |||
| 74 | return ((unsigned long)stackaddr > stack) && ((unsigned long)stackaddr < stack_base); | ||
| 75 | } | ||
| 76 | |||
| 77 | static unsigned long * | ||
| 78 | kernel_backtrace(unsigned long *stackaddr, struct pt_regs *regs) | ||
| 79 | { | ||
| 80 | unsigned long addr; | ||
| 81 | |||
| 82 | /* | ||
| 83 | * If not a valid kernel address, keep going till we find one | ||
| 84 | * or the SP stops being a valid address. | ||
| 85 | */ | ||
| 86 | do { | ||
| 87 | addr = *stackaddr++; | ||
| 88 | oprofile_add_trace(addr); | ||
| 89 | } while (valid_kernel_stack(stackaddr, regs)); | ||
| 90 | |||
| 91 | return stackaddr; | ||
| 92 | } | ||
| 93 | |||
| 94 | void sh_backtrace(struct pt_regs * const regs, unsigned int depth) | 84 | void sh_backtrace(struct pt_regs * const regs, unsigned int depth) |
| 95 | { | 85 | { |
| 96 | unsigned long *stackaddr; | 86 | unsigned long *stackaddr; |
| @@ -103,9 +93,9 @@ void sh_backtrace(struct pt_regs * const regs, unsigned int depth) | |||
| 103 | 93 | ||
| 104 | stackaddr = (unsigned long *)regs->regs[15]; | 94 | stackaddr = (unsigned long *)regs->regs[15]; |
| 105 | if (!user_mode(regs)) { | 95 | if (!user_mode(regs)) { |
| 106 | while (depth-- && valid_kernel_stack(stackaddr, regs)) | 96 | if (depth) |
| 107 | stackaddr = kernel_backtrace(stackaddr, regs); | 97 | unwind_stack(NULL, regs, stackaddr, |
| 108 | 98 | &backtrace_ops, &depth); | |
| 109 | return; | 99 | return; |
| 110 | } | 100 | } |
| 111 | 101 | ||
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index fec3a53b8650..6639b25d8d57 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types | |||
| @@ -53,6 +53,9 @@ RSK7203 SH_RSK7203 | |||
| 53 | AP325RXA SH_AP325RXA | 53 | AP325RXA SH_AP325RXA |
| 54 | SH7763RDP SH_SH7763RDP | 54 | SH7763RDP SH_SH7763RDP |
| 55 | SH7785LCR SH_SH7785LCR | 55 | SH7785LCR SH_SH7785LCR |
| 56 | SH7785LCR_PT SH_SH7785LCR_PT | ||
| 56 | URQUELL SH_URQUELL | 57 | URQUELL SH_URQUELL |
| 57 | ESPT SH_ESPT | 58 | ESPT SH_ESPT |
| 58 | POLARIS SH_POLARIS | 59 | POLARIS SH_POLARIS |
| 60 | KFR2R09 SH_KFR2R09 | ||
| 61 | ECOVEC SH_ECOVEC | ||
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S index 866390feb683..4e5992593967 100644 --- a/arch/sparc/kernel/vmlinux.lds.S +++ b/arch/sparc/kernel/vmlinux.lds.S | |||
| @@ -51,70 +51,27 @@ SECTIONS | |||
| 51 | _etext = .; | 51 | _etext = .; |
| 52 | 52 | ||
| 53 | RO_DATA(PAGE_SIZE) | 53 | RO_DATA(PAGE_SIZE) |
| 54 | .data : { | ||
| 55 | DATA_DATA | ||
| 56 | CONSTRUCTORS | ||
| 57 | } | ||
| 58 | .data1 : { | 54 | .data1 : { |
| 59 | *(.data1) | 55 | *(.data1) |
| 60 | } | 56 | } |
| 61 | . = ALIGN(SMP_CACHE_BYTES); | 57 | RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE) |
| 62 | .data.cacheline_aligned : { | 58 | |
| 63 | *(.data.cacheline_aligned) | ||
| 64 | } | ||
| 65 | . = ALIGN(SMP_CACHE_BYTES); | ||
| 66 | .data.read_mostly : { | ||
| 67 | *(.data.read_mostly) | ||
| 68 | } | ||
| 69 | /* End of data section */ | 59 | /* End of data section */ |
| 70 | _edata = .; | 60 | _edata = .; |
| 71 | 61 | ||
| 72 | /* init_task */ | ||
| 73 | . = ALIGN(THREAD_SIZE); | ||
| 74 | .data.init_task : { | ||
| 75 | *(.data.init_task) | ||
| 76 | } | ||
| 77 | .fixup : { | 62 | .fixup : { |
| 78 | __start___fixup = .; | 63 | __start___fixup = .; |
| 79 | *(.fixup) | 64 | *(.fixup) |
| 80 | __stop___fixup = .; | 65 | __stop___fixup = .; |
| 81 | } | 66 | } |
| 82 | . = ALIGN(16); | 67 | EXCEPTION_TABLE(16) |
| 83 | __ex_table : { | ||
| 84 | __start___ex_table = .; | ||
| 85 | *(__ex_table) | ||
| 86 | __stop___ex_table = .; | ||
| 87 | } | ||
| 88 | NOTES | 68 | NOTES |
| 89 | 69 | ||
| 90 | . = ALIGN(PAGE_SIZE); | 70 | . = ALIGN(PAGE_SIZE); |
| 91 | .init.text : { | 71 | __init_begin = ALIGN(PAGE_SIZE); |
| 92 | __init_begin = .; | 72 | INIT_TEXT_SECTION(PAGE_SIZE) |
| 93 | _sinittext = .; | ||
| 94 | INIT_TEXT | ||
| 95 | _einittext = .; | ||
| 96 | } | ||
| 97 | __init_text_end = .; | 73 | __init_text_end = .; |
| 98 | .init.data : { | 74 | INIT_DATA_SECTION(16) |
| 99 | INIT_DATA | ||
| 100 | } | ||
| 101 | . = ALIGN(16); | ||
| 102 | .init.setup : { | ||
| 103 | __setup_start = .; | ||
| 104 | *(.init.setup) | ||
| 105 | __setup_end = .; | ||
| 106 | } | ||
| 107 | .initcall.init : { | ||
| 108 | __initcall_start = .; | ||
| 109 | INITCALLS | ||
| 110 | __initcall_end = .; | ||
| 111 | } | ||
| 112 | .con_initcall.init : { | ||
| 113 | __con_initcall_start = .; | ||
| 114 | *(.con_initcall.init) | ||
| 115 | __con_initcall_end = .; | ||
| 116 | } | ||
| 117 | SECURITY_INIT | ||
| 118 | 75 | ||
| 119 | . = ALIGN(4); | 76 | . = ALIGN(4); |
| 120 | .tsb_ldquad_phys_patch : { | 77 | .tsb_ldquad_phys_patch : { |
| @@ -146,29 +103,11 @@ SECTIONS | |||
| 146 | __sun4v_2insn_patch_end = .; | 103 | __sun4v_2insn_patch_end = .; |
| 147 | } | 104 | } |
| 148 | 105 | ||
| 149 | #ifdef CONFIG_BLK_DEV_INITRD | ||
| 150 | . = ALIGN(PAGE_SIZE); | ||
| 151 | .init.ramfs : { | ||
| 152 | __initramfs_start = .; | ||
| 153 | *(.init.ramfs) | ||
| 154 | __initramfs_end = .; | ||
| 155 | } | ||
| 156 | #endif | ||
| 157 | |||
| 158 | PERCPU(PAGE_SIZE) | 106 | PERCPU(PAGE_SIZE) |
| 159 | 107 | ||
| 160 | . = ALIGN(PAGE_SIZE); | 108 | . = ALIGN(PAGE_SIZE); |
| 161 | __init_end = .; | 109 | __init_end = .; |
| 162 | __bss_start = .; | 110 | BSS_SECTION(0, 0, 0) |
| 163 | .sbss : { | ||
| 164 | *(.sbss) | ||
| 165 | *(.scommon) | ||
| 166 | } | ||
| 167 | .bss : { | ||
| 168 | *(.dynbss) | ||
| 169 | *(.bss) | ||
| 170 | *(COMMON) | ||
| 171 | } | ||
| 172 | _end = . ; | 111 | _end = . ; |
| 173 | 112 | ||
| 174 | STABS_DEBUG | 113 | STABS_DEBUG |
diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c index 30860b89ec58..b6b1096152aa 100644 --- a/arch/um/os-Linux/helper.c +++ b/arch/um/os-Linux/helper.c | |||
| @@ -15,7 +15,6 @@ | |||
| 15 | #include "os.h" | 15 | #include "os.h" |
| 16 | #include "um_malloc.h" | 16 | #include "um_malloc.h" |
| 17 | #include "user.h" | 17 | #include "user.h" |
| 18 | #include <linux/limits.h> | ||
| 19 | 18 | ||
| 20 | struct helper_data { | 19 | struct helper_data { |
| 21 | void (*pre_exec)(void*); | 20 | void (*pre_exec)(void*); |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index e5deee2dfcfe..51c59015b280 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
| @@ -325,6 +325,7 @@ config X86_EXTENDED_PLATFORM | |||
| 325 | SGI 320/540 (Visual Workstation) | 325 | SGI 320/540 (Visual Workstation) |
| 326 | Summit/EXA (IBM x440) | 326 | Summit/EXA (IBM x440) |
| 327 | Unisys ES7000 IA32 series | 327 | Unisys ES7000 IA32 series |
| 328 | Moorestown MID devices | ||
| 328 | 329 | ||
| 329 | If you have one of these systems, or if you want to build a | 330 | If you have one of these systems, or if you want to build a |
| 330 | generic distribution kernel, say Y here - otherwise say N. | 331 | generic distribution kernel, say Y here - otherwise say N. |
| @@ -384,6 +385,18 @@ config X86_ELAN | |||
| 384 | 385 | ||
| 385 | If unsure, choose "PC-compatible" instead. | 386 | If unsure, choose "PC-compatible" instead. |
| 386 | 387 | ||
| 388 | config X86_MRST | ||
| 389 | bool "Moorestown MID platform" | ||
| 390 | depends on X86_32 | ||
| 391 | depends on X86_EXTENDED_PLATFORM | ||
| 392 | ---help--- | ||
| 393 | Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin | ||
| 394 | Internet Device(MID) platform. Moorestown consists of two chips: | ||
| 395 | Lincroft (CPU core, graphics, and memory controller) and Langwell IOH. | ||
| 396 | Unlike standard x86 PCs, Moorestown does not have many legacy devices | ||
| 397 | nor standard legacy replacement devices/features. e.g. Moorestown does | ||
| 398 | not contain i8259, i8254, HPET, legacy BIOS, most of the io ports. | ||
| 399 | |||
| 387 | config X86_RDC321X | 400 | config X86_RDC321X |
| 388 | bool "RDC R-321x SoC" | 401 | bool "RDC R-321x SoC" |
| 389 | depends on X86_32 | 402 | depends on X86_32 |
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 586b7adb8e53..c6d21b18806c 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
| @@ -70,9 +70,6 @@ static inline void default_inquire_remote_apic(int apicid) | |||
| 70 | */ | 70 | */ |
| 71 | #ifdef CONFIG_PARAVIRT | 71 | #ifdef CONFIG_PARAVIRT |
| 72 | #include <asm/paravirt.h> | 72 | #include <asm/paravirt.h> |
| 73 | #else | ||
| 74 | #define setup_boot_clock setup_boot_APIC_clock | ||
| 75 | #define setup_secondary_clock setup_secondary_APIC_clock | ||
| 76 | #endif | 73 | #endif |
| 77 | 74 | ||
| 78 | #ifdef CONFIG_X86_64 | 75 | #ifdef CONFIG_X86_64 |
| @@ -252,6 +249,8 @@ static inline void lapic_shutdown(void) { } | |||
| 252 | static inline void init_apic_mappings(void) { } | 249 | static inline void init_apic_mappings(void) { } |
| 253 | static inline void disable_local_APIC(void) { } | 250 | static inline void disable_local_APIC(void) { } |
| 254 | static inline void apic_disable(void) { } | 251 | static inline void apic_disable(void) { } |
| 252 | # define setup_boot_APIC_clock x86_init_noop | ||
| 253 | # define setup_secondary_APIC_clock x86_init_noop | ||
| 255 | #endif /* !CONFIG_X86_LOCAL_APIC */ | 254 | #endif /* !CONFIG_X86_LOCAL_APIC */ |
| 256 | 255 | ||
| 257 | #ifdef CONFIG_X86_64 | 256 | #ifdef CONFIG_X86_64 |
| @@ -300,7 +299,7 @@ struct apic { | |||
| 300 | int (*cpu_present_to_apicid)(int mps_cpu); | 299 | int (*cpu_present_to_apicid)(int mps_cpu); |
| 301 | physid_mask_t (*apicid_to_cpu_present)(int phys_apicid); | 300 | physid_mask_t (*apicid_to_cpu_present)(int phys_apicid); |
| 302 | void (*setup_portio_remap)(void); | 301 | void (*setup_portio_remap)(void); |
| 303 | int (*check_phys_apicid_present)(int boot_cpu_physical_apicid); | 302 | int (*check_phys_apicid_present)(int phys_apicid); |
| 304 | void (*enable_apic_mode)(void); | 303 | void (*enable_apic_mode)(void); |
| 305 | int (*phys_pkg_id)(int cpuid_apic, int index_msb); | 304 | int (*phys_pkg_id)(int cpuid_apic, int index_msb); |
| 306 | 305 | ||
| @@ -434,7 +433,7 @@ extern struct apic apic_x2apic_uv_x; | |||
| 434 | DECLARE_PER_CPU(int, x2apic_extra_bits); | 433 | DECLARE_PER_CPU(int, x2apic_extra_bits); |
| 435 | 434 | ||
| 436 | extern int default_cpu_present_to_apicid(int mps_cpu); | 435 | extern int default_cpu_present_to_apicid(int mps_cpu); |
| 437 | extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid); | 436 | extern int default_check_phys_apicid_present(int phys_apicid); |
| 438 | #endif | 437 | #endif |
| 439 | 438 | ||
| 440 | static inline void default_wait_for_init_deassert(atomic_t *deassert) | 439 | static inline void default_wait_for_init_deassert(atomic_t *deassert) |
| @@ -550,9 +549,9 @@ static inline int __default_cpu_present_to_apicid(int mps_cpu) | |||
| 550 | } | 549 | } |
| 551 | 550 | ||
| 552 | static inline int | 551 | static inline int |
| 553 | __default_check_phys_apicid_present(int boot_cpu_physical_apicid) | 552 | __default_check_phys_apicid_present(int phys_apicid) |
| 554 | { | 553 | { |
| 555 | return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); | 554 | return physid_isset(phys_apicid, phys_cpu_present_map); |
| 556 | } | 555 | } |
| 557 | 556 | ||
| 558 | #ifdef CONFIG_X86_32 | 557 | #ifdef CONFIG_X86_32 |
| @@ -562,13 +561,13 @@ static inline int default_cpu_present_to_apicid(int mps_cpu) | |||
| 562 | } | 561 | } |
| 563 | 562 | ||
| 564 | static inline int | 563 | static inline int |
| 565 | default_check_phys_apicid_present(int boot_cpu_physical_apicid) | 564 | default_check_phys_apicid_present(int phys_apicid) |
| 566 | { | 565 | { |
| 567 | return __default_check_phys_apicid_present(boot_cpu_physical_apicid); | 566 | return __default_check_phys_apicid_present(phys_apicid); |
| 568 | } | 567 | } |
| 569 | #else | 568 | #else |
| 570 | extern int default_cpu_present_to_apicid(int mps_cpu); | 569 | extern int default_cpu_present_to_apicid(int mps_cpu); |
| 571 | extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid); | 570 | extern int default_check_phys_apicid_present(int phys_apicid); |
| 572 | #endif | 571 | #endif |
| 573 | 572 | ||
| 574 | static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid) | 573 | static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid) |
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h index 6ca20218dd72..6be33d83c716 100644 --- a/arch/x86/include/asm/bootparam.h +++ b/arch/x86/include/asm/bootparam.h | |||
| @@ -110,4 +110,14 @@ struct boot_params { | |||
| 110 | __u8 _pad9[276]; /* 0xeec */ | 110 | __u8 _pad9[276]; /* 0xeec */ |
| 111 | } __attribute__((packed)); | 111 | } __attribute__((packed)); |
| 112 | 112 | ||
| 113 | enum { | ||
| 114 | X86_SUBARCH_PC = 0, | ||
| 115 | X86_SUBARCH_LGUEST, | ||
| 116 | X86_SUBARCH_XEN, | ||
| 117 | X86_SUBARCH_MRST, | ||
| 118 | X86_NR_SUBARCHS, | ||
| 119 | }; | ||
| 120 | |||
| 121 | |||
| 122 | |||
| 113 | #endif /* _ASM_X86_BOOTPARAM_H */ | 123 | #endif /* _ASM_X86_BOOTPARAM_H */ |
diff --git a/arch/x86/include/asm/do_timer.h b/arch/x86/include/asm/do_timer.h deleted file mode 100644 index 23ecda0b28a0..000000000000 --- a/arch/x86/include/asm/do_timer.h +++ /dev/null | |||
| @@ -1,16 +0,0 @@ | |||
| 1 | /* defines for inline arch setup functions */ | ||
| 2 | #include <linux/clockchips.h> | ||
| 3 | |||
| 4 | #include <asm/i8259.h> | ||
| 5 | #include <asm/i8253.h> | ||
| 6 | |||
| 7 | /** | ||
| 8 | * do_timer_interrupt_hook - hook into timer tick | ||
| 9 | * | ||
| 10 | * Call the pit clock event handler. see asm/i8253.h | ||
| 11 | **/ | ||
| 12 | |||
| 13 | static inline void do_timer_interrupt_hook(void) | ||
| 14 | { | ||
| 15 | global_clock_event->event_handler(global_clock_event); | ||
| 16 | } | ||
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h index 7ecba4d85089..40b4e614fe71 100644 --- a/arch/x86/include/asm/e820.h +++ b/arch/x86/include/asm/e820.h | |||
| @@ -126,8 +126,6 @@ extern void e820_reserve_resources(void); | |||
| 126 | extern void e820_reserve_resources_late(void); | 126 | extern void e820_reserve_resources_late(void); |
| 127 | extern void setup_memory_map(void); | 127 | extern void setup_memory_map(void); |
| 128 | extern char *default_machine_specific_memory_setup(void); | 128 | extern char *default_machine_specific_memory_setup(void); |
| 129 | extern char *machine_specific_memory_setup(void); | ||
| 130 | extern char *memory_setup(void); | ||
| 131 | #endif /* __KERNEL__ */ | 129 | #endif /* __KERNEL__ */ |
| 132 | #endif /* __ASSEMBLY__ */ | 130 | #endif /* __ASSEMBLY__ */ |
| 133 | 131 | ||
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h index 369f5c5d09a1..b78c0941e422 100644 --- a/arch/x86/include/asm/hypervisor.h +++ b/arch/x86/include/asm/hypervisor.h | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | #ifndef ASM_X86__HYPERVISOR_H | 20 | #ifndef ASM_X86__HYPERVISOR_H |
| 21 | #define ASM_X86__HYPERVISOR_H | 21 | #define ASM_X86__HYPERVISOR_H |
| 22 | 22 | ||
| 23 | extern unsigned long get_hypervisor_tsc_freq(void); | ||
| 24 | extern void init_hypervisor(struct cpuinfo_x86 *c); | 23 | extern void init_hypervisor(struct cpuinfo_x86 *c); |
| 24 | extern void init_hypervisor_platform(void); | ||
| 25 | 25 | ||
| 26 | #endif | 26 | #endif |
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 85232d32fcb8..7c7c16cde1f8 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h | |||
| @@ -143,6 +143,8 @@ extern int noioapicreroute; | |||
| 143 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ | 143 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ |
| 144 | extern int timer_through_8259; | 144 | extern int timer_through_8259; |
| 145 | 145 | ||
| 146 | extern void io_apic_disable_legacy(void); | ||
| 147 | |||
| 146 | /* | 148 | /* |
| 147 | * If we use the IO-APIC for IRQ routing, disable automatic | 149 | * If we use the IO-APIC for IRQ routing, disable automatic |
| 148 | * assignment of PCI IRQ's. | 150 | * assignment of PCI IRQ's. |
| @@ -176,6 +178,7 @@ extern int setup_ioapic_entry(int apic, int irq, | |||
| 176 | int polarity, int vector, int pin); | 178 | int polarity, int vector, int pin); |
| 177 | extern void ioapic_write_entry(int apic, int pin, | 179 | extern void ioapic_write_entry(int apic, int pin, |
| 178 | struct IO_APIC_route_entry e); | 180 | struct IO_APIC_route_entry e); |
| 181 | extern void setup_ioapic_ids_from_mpc(void); | ||
| 179 | 182 | ||
| 180 | struct mp_ioapic_gsi{ | 183 | struct mp_ioapic_gsi{ |
| 181 | int gsi_base; | 184 | int gsi_base; |
| @@ -187,12 +190,14 @@ int mp_find_ioapic_pin(int ioapic, int gsi); | |||
| 187 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); | 190 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); |
| 188 | 191 | ||
| 189 | #else /* !CONFIG_X86_IO_APIC */ | 192 | #else /* !CONFIG_X86_IO_APIC */ |
| 193 | |||
| 190 | #define io_apic_assign_pci_irqs 0 | 194 | #define io_apic_assign_pci_irqs 0 |
| 195 | #define setup_ioapic_ids_from_mpc x86_init_noop | ||
| 191 | static const int timer_through_8259 = 0; | 196 | static const int timer_through_8259 = 0; |
| 192 | static inline void ioapic_init_mappings(void) { } | 197 | static inline void ioapic_init_mappings(void) { } |
| 193 | static inline void ioapic_insert_resources(void) { } | 198 | static inline void ioapic_insert_resources(void) { } |
| 194 | |||
| 195 | static inline void probe_nr_irqs_gsi(void) { } | 199 | static inline void probe_nr_irqs_gsi(void) { } |
| 200 | |||
| 196 | #endif | 201 | #endif |
| 197 | 202 | ||
| 198 | #endif /* _ASM_X86_IO_APIC_H */ | 203 | #endif /* _ASM_X86_IO_APIC_H */ |
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h index f38481bcd455..ddda6cbed6f4 100644 --- a/arch/x86/include/asm/irq.h +++ b/arch/x86/include/asm/irq.h | |||
| @@ -37,7 +37,6 @@ extern void fixup_irqs(void); | |||
| 37 | #endif | 37 | #endif |
| 38 | 38 | ||
| 39 | extern void (*generic_interrupt_extension)(void); | 39 | extern void (*generic_interrupt_extension)(void); |
| 40 | extern void init_IRQ(void); | ||
| 41 | extern void native_init_IRQ(void); | 40 | extern void native_init_IRQ(void); |
| 42 | extern bool handle_irq(unsigned irq, struct pt_regs *regs); | 41 | extern bool handle_irq(unsigned irq, struct pt_regs *regs); |
| 43 | 42 | ||
| @@ -47,4 +46,6 @@ extern unsigned int do_IRQ(struct pt_regs *regs); | |||
| 47 | extern DECLARE_BITMAP(used_vectors, NR_VECTORS); | 46 | extern DECLARE_BITMAP(used_vectors, NR_VECTORS); |
| 48 | extern int vector_used_by_percpu_irq(unsigned int vector); | 47 | extern int vector_used_by_percpu_irq(unsigned int vector); |
| 49 | 48 | ||
| 49 | extern void init_ISA_irqs(void); | ||
| 50 | |||
| 50 | #endif /* _ASM_X86_IRQ_H */ | 51 | #endif /* _ASM_X86_IRQ_H */ |
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h index e2a1bb6d71ea..79c94500c0bb 100644 --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | #include <linux/init.h> | 4 | #include <linux/init.h> |
| 5 | 5 | ||
| 6 | #include <asm/mpspec_def.h> | 6 | #include <asm/mpspec_def.h> |
| 7 | #include <asm/x86_init.h> | ||
| 7 | 8 | ||
| 8 | extern int apic_version[MAX_APICS]; | 9 | extern int apic_version[MAX_APICS]; |
| 9 | extern int pic_mode; | 10 | extern int pic_mode; |
| @@ -41,9 +42,6 @@ extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; | |||
| 41 | 42 | ||
| 42 | #endif /* CONFIG_X86_64 */ | 43 | #endif /* CONFIG_X86_64 */ |
| 43 | 44 | ||
| 44 | extern void early_find_smp_config(void); | ||
| 45 | extern void early_get_smp_config(void); | ||
| 46 | |||
| 47 | #if defined(CONFIG_MCA) || defined(CONFIG_EISA) | 45 | #if defined(CONFIG_MCA) || defined(CONFIG_EISA) |
| 48 | extern int mp_bus_id_to_type[MAX_MP_BUSSES]; | 46 | extern int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 49 | #endif | 47 | #endif |
| @@ -52,20 +50,55 @@ extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); | |||
| 52 | 50 | ||
| 53 | extern unsigned int boot_cpu_physical_apicid; | 51 | extern unsigned int boot_cpu_physical_apicid; |
| 54 | extern unsigned int max_physical_apicid; | 52 | extern unsigned int max_physical_apicid; |
| 55 | extern int smp_found_config; | ||
| 56 | extern int mpc_default_type; | 53 | extern int mpc_default_type; |
| 57 | extern unsigned long mp_lapic_addr; | 54 | extern unsigned long mp_lapic_addr; |
| 58 | 55 | ||
| 59 | extern void get_smp_config(void); | 56 | #ifdef CONFIG_X86_LOCAL_APIC |
| 57 | extern int smp_found_config; | ||
| 58 | #else | ||
| 59 | # define smp_found_config 0 | ||
| 60 | #endif | ||
| 61 | |||
| 62 | static inline void get_smp_config(void) | ||
| 63 | { | ||
| 64 | x86_init.mpparse.get_smp_config(0); | ||
| 65 | } | ||
| 66 | |||
| 67 | static inline void early_get_smp_config(void) | ||
| 68 | { | ||
| 69 | x86_init.mpparse.get_smp_config(1); | ||
| 70 | } | ||
| 71 | |||
| 72 | static inline void find_smp_config(void) | ||
| 73 | { | ||
| 74 | x86_init.mpparse.find_smp_config(1); | ||
| 75 | } | ||
| 76 | |||
| 77 | static inline void early_find_smp_config(void) | ||
| 78 | { | ||
| 79 | x86_init.mpparse.find_smp_config(0); | ||
| 80 | } | ||
| 60 | 81 | ||
| 61 | #ifdef CONFIG_X86_MPPARSE | 82 | #ifdef CONFIG_X86_MPPARSE |
| 62 | extern void find_smp_config(void); | ||
| 63 | extern void early_reserve_e820_mpc_new(void); | 83 | extern void early_reserve_e820_mpc_new(void); |
| 64 | extern int enable_update_mptable; | 84 | extern int enable_update_mptable; |
| 85 | extern int default_mpc_apic_id(struct mpc_cpu *m); | ||
| 86 | extern void default_smp_read_mpc_oem(struct mpc_table *mpc); | ||
| 87 | # ifdef CONFIG_X86_IO_APIC | ||
| 88 | extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str); | ||
| 89 | # else | ||
| 90 | # define default_mpc_oem_bus_info NULL | ||
| 91 | # endif | ||
| 92 | extern void default_find_smp_config(unsigned int reserve); | ||
| 93 | extern void default_get_smp_config(unsigned int early); | ||
| 65 | #else | 94 | #else |
| 66 | static inline void find_smp_config(void) { } | ||
| 67 | static inline void early_reserve_e820_mpc_new(void) { } | 95 | static inline void early_reserve_e820_mpc_new(void) { } |
| 68 | #define enable_update_mptable 0 | 96 | #define enable_update_mptable 0 |
| 97 | #define default_mpc_apic_id NULL | ||
| 98 | #define default_smp_read_mpc_oem NULL | ||
| 99 | #define default_mpc_oem_bus_info NULL | ||
| 100 | #define default_find_smp_config x86_init_uint_noop | ||
| 101 | #define default_get_smp_config x86_init_uint_noop | ||
| 69 | #endif | 102 | #endif |
| 70 | 103 | ||
| 71 | void __cpuinit generic_processor_info(int apicid, int version); | 104 | void __cpuinit generic_processor_info(int apicid, int version); |
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h index 40d6586af25b..8aebcc41041d 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h | |||
| @@ -24,22 +24,6 @@ static inline void load_sp0(struct tss_struct *tss, | |||
| 24 | PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread); | 24 | PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread); |
| 25 | } | 25 | } |
| 26 | 26 | ||
| 27 | #define ARCH_SETUP pv_init_ops.arch_setup(); | ||
| 28 | static inline unsigned long get_wallclock(void) | ||
| 29 | { | ||
| 30 | return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock); | ||
| 31 | } | ||
| 32 | |||
| 33 | static inline int set_wallclock(unsigned long nowtime) | ||
| 34 | { | ||
| 35 | return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime); | ||
| 36 | } | ||
| 37 | |||
| 38 | static inline void (*choose_time_init(void))(void) | ||
| 39 | { | ||
| 40 | return pv_time_ops.time_init; | ||
| 41 | } | ||
| 42 | |||
| 43 | /* The paravirtualized CPUID instruction. */ | 27 | /* The paravirtualized CPUID instruction. */ |
| 44 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, | 28 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, |
| 45 | unsigned int *ecx, unsigned int *edx) | 29 | unsigned int *ecx, unsigned int *edx) |
| @@ -245,7 +229,6 @@ static inline unsigned long long paravirt_sched_clock(void) | |||
| 245 | { | 229 | { |
| 246 | return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock); | 230 | return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock); |
| 247 | } | 231 | } |
| 248 | #define calibrate_tsc() (pv_time_ops.get_tsc_khz()) | ||
| 249 | 232 | ||
| 250 | static inline unsigned long long paravirt_read_pmc(int counter) | 233 | static inline unsigned long long paravirt_read_pmc(int counter) |
| 251 | { | 234 | { |
| @@ -363,34 +346,6 @@ static inline void slow_down_io(void) | |||
| 363 | #endif | 346 | #endif |
| 364 | } | 347 | } |
| 365 | 348 | ||
| 366 | #ifdef CONFIG_X86_LOCAL_APIC | ||
| 367 | static inline void setup_boot_clock(void) | ||
| 368 | { | ||
| 369 | PVOP_VCALL0(pv_apic_ops.setup_boot_clock); | ||
| 370 | } | ||
| 371 | |||
| 372 | static inline void setup_secondary_clock(void) | ||
| 373 | { | ||
| 374 | PVOP_VCALL0(pv_apic_ops.setup_secondary_clock); | ||
| 375 | } | ||
| 376 | #endif | ||
| 377 | |||
| 378 | static inline void paravirt_post_allocator_init(void) | ||
| 379 | { | ||
| 380 | if (pv_init_ops.post_allocator_init) | ||
| 381 | (*pv_init_ops.post_allocator_init)(); | ||
| 382 | } | ||
| 383 | |||
| 384 | static inline void paravirt_pagetable_setup_start(pgd_t *base) | ||
| 385 | { | ||
| 386 | (*pv_mmu_ops.pagetable_setup_start)(base); | ||
| 387 | } | ||
| 388 | |||
| 389 | static inline void paravirt_pagetable_setup_done(pgd_t *base) | ||
| 390 | { | ||
| 391 | (*pv_mmu_ops.pagetable_setup_done)(base); | ||
| 392 | } | ||
| 393 | |||
| 394 | #ifdef CONFIG_SMP | 349 | #ifdef CONFIG_SMP |
| 395 | static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip, | 350 | static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip, |
| 396 | unsigned long start_esp) | 351 | unsigned long start_esp) |
| @@ -948,6 +903,8 @@ static inline unsigned long __raw_local_irq_save(void) | |||
| 948 | #undef PVOP_VCALL4 | 903 | #undef PVOP_VCALL4 |
| 949 | #undef PVOP_CALL4 | 904 | #undef PVOP_CALL4 |
| 950 | 905 | ||
| 906 | extern void default_banner(void); | ||
| 907 | |||
| 951 | #else /* __ASSEMBLY__ */ | 908 | #else /* __ASSEMBLY__ */ |
| 952 | 909 | ||
| 953 | #define _PVSITE(ptype, clobbers, ops, word, algn) \ | 910 | #define _PVSITE(ptype, clobbers, ops, word, algn) \ |
| @@ -1088,5 +1045,7 @@ static inline unsigned long __raw_local_irq_save(void) | |||
| 1088 | #endif /* CONFIG_X86_32 */ | 1045 | #endif /* CONFIG_X86_32 */ |
| 1089 | 1046 | ||
| 1090 | #endif /* __ASSEMBLY__ */ | 1047 | #endif /* __ASSEMBLY__ */ |
| 1091 | #endif /* CONFIG_PARAVIRT */ | 1048 | #else /* CONFIG_PARAVIRT */ |
| 1049 | # define default_banner x86_init_noop | ||
| 1050 | #endif /* !CONFIG_PARAVIRT */ | ||
| 1092 | #endif /* _ASM_X86_PARAVIRT_H */ | 1051 | #endif /* _ASM_X86_PARAVIRT_H */ |
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h index 25402d0006e7..dd0f5b32489d 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h | |||
| @@ -78,14 +78,6 @@ struct pv_init_ops { | |||
| 78 | */ | 78 | */ |
| 79 | unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, | 79 | unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, |
| 80 | unsigned long addr, unsigned len); | 80 | unsigned long addr, unsigned len); |
| 81 | |||
| 82 | /* Basic arch-specific setup */ | ||
| 83 | void (*arch_setup)(void); | ||
| 84 | char *(*memory_setup)(void); | ||
| 85 | void (*post_allocator_init)(void); | ||
| 86 | |||
| 87 | /* Print a banner to identify the environment */ | ||
| 88 | void (*banner)(void); | ||
| 89 | }; | 81 | }; |
| 90 | 82 | ||
| 91 | 83 | ||
| @@ -96,12 +88,6 @@ struct pv_lazy_ops { | |||
| 96 | }; | 88 | }; |
| 97 | 89 | ||
| 98 | struct pv_time_ops { | 90 | struct pv_time_ops { |
| 99 | void (*time_init)(void); | ||
| 100 | |||
| 101 | /* Set and set time of day */ | ||
| 102 | unsigned long (*get_wallclock)(void); | ||
| 103 | int (*set_wallclock)(unsigned long); | ||
| 104 | |||
| 105 | unsigned long long (*sched_clock)(void); | 91 | unsigned long long (*sched_clock)(void); |
| 106 | unsigned long (*get_tsc_khz)(void); | 92 | unsigned long (*get_tsc_khz)(void); |
| 107 | }; | 93 | }; |
| @@ -203,8 +189,6 @@ struct pv_cpu_ops { | |||
| 203 | }; | 189 | }; |
| 204 | 190 | ||
| 205 | struct pv_irq_ops { | 191 | struct pv_irq_ops { |
| 206 | void (*init_IRQ)(void); | ||
| 207 | |||
| 208 | /* | 192 | /* |
| 209 | * Get/set interrupt state. save_fl and restore_fl are only | 193 | * Get/set interrupt state. save_fl and restore_fl are only |
| 210 | * expected to use X86_EFLAGS_IF; all other bits | 194 | * expected to use X86_EFLAGS_IF; all other bits |
| @@ -229,9 +213,6 @@ struct pv_irq_ops { | |||
| 229 | 213 | ||
| 230 | struct pv_apic_ops { | 214 | struct pv_apic_ops { |
| 231 | #ifdef CONFIG_X86_LOCAL_APIC | 215 | #ifdef CONFIG_X86_LOCAL_APIC |
| 232 | void (*setup_boot_clock)(void); | ||
| 233 | void (*setup_secondary_clock)(void); | ||
| 234 | |||
| 235 | void (*startup_ipi_hook)(int phys_apicid, | 216 | void (*startup_ipi_hook)(int phys_apicid, |
| 236 | unsigned long start_eip, | 217 | unsigned long start_eip, |
| 237 | unsigned long start_esp); | 218 | unsigned long start_esp); |
| @@ -239,15 +220,6 @@ struct pv_apic_ops { | |||
| 239 | }; | 220 | }; |
| 240 | 221 | ||
| 241 | struct pv_mmu_ops { | 222 | struct pv_mmu_ops { |
| 242 | /* | ||
| 243 | * Called before/after init_mm pagetable setup. setup_start | ||
| 244 | * may reset %cr3, and may pre-install parts of the pagetable; | ||
| 245 | * pagetable setup is expected to preserve any existing | ||
| 246 | * mapping. | ||
| 247 | */ | ||
| 248 | void (*pagetable_setup_start)(pgd_t *pgd_base); | ||
| 249 | void (*pagetable_setup_done)(pgd_t *pgd_base); | ||
| 250 | |||
| 251 | unsigned long (*read_cr2)(void); | 223 | unsigned long (*read_cr2)(void); |
| 252 | void (*write_cr2)(unsigned long); | 224 | void (*write_cr2)(unsigned long); |
| 253 | 225 | ||
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 4c5b51fdc788..af6fd360ab35 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h | |||
| @@ -56,16 +56,6 @@ extern struct list_head pgd_list; | |||
| 56 | #define pte_update(mm, addr, ptep) do { } while (0) | 56 | #define pte_update(mm, addr, ptep) do { } while (0) |
| 57 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | 57 | #define pte_update_defer(mm, addr, ptep) do { } while (0) |
| 58 | 58 | ||
| 59 | static inline void __init paravirt_pagetable_setup_start(pgd_t *base) | ||
| 60 | { | ||
| 61 | native_pagetable_setup_start(base); | ||
| 62 | } | ||
| 63 | |||
| 64 | static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | ||
| 65 | { | ||
| 66 | native_pagetable_setup_done(base); | ||
| 67 | } | ||
| 68 | |||
| 69 | #define pgd_val(x) native_pgd_val(x) | 59 | #define pgd_val(x) native_pgd_val(x) |
| 70 | #define __pgd(x) native_make_pgd(x) | 60 | #define __pgd(x) native_make_pgd(x) |
| 71 | 61 | ||
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h index 54cb697f4900..7b467bf3c680 100644 --- a/arch/x86/include/asm/pgtable_types.h +++ b/arch/x86/include/asm/pgtable_types.h | |||
| @@ -299,8 +299,8 @@ void set_pte_vaddr(unsigned long vaddr, pte_t pte); | |||
| 299 | extern void native_pagetable_setup_start(pgd_t *base); | 299 | extern void native_pagetable_setup_start(pgd_t *base); |
| 300 | extern void native_pagetable_setup_done(pgd_t *base); | 300 | extern void native_pagetable_setup_done(pgd_t *base); |
| 301 | #else | 301 | #else |
| 302 | static inline void native_pagetable_setup_start(pgd_t *base) {} | 302 | #define native_pagetable_setup_start x86_init_pgd_noop |
| 303 | static inline void native_pagetable_setup_done(pgd_t *base) {} | 303 | #define native_pagetable_setup_done x86_init_pgd_noop |
| 304 | #endif | 304 | #endif |
| 305 | 305 | ||
| 306 | struct seq_file; | 306 | struct seq_file; |
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h index 4093d1ed6db2..18e496c98ff0 100644 --- a/arch/x86/include/asm/setup.h +++ b/arch/x86/include/asm/setup.h | |||
| @@ -5,43 +5,6 @@ | |||
| 5 | 5 | ||
| 6 | #define COMMAND_LINE_SIZE 2048 | 6 | #define COMMAND_LINE_SIZE 2048 |
| 7 | 7 | ||
| 8 | #ifndef __ASSEMBLY__ | ||
| 9 | |||
| 10 | /* | ||
| 11 | * Any setup quirks to be performed? | ||
| 12 | */ | ||
| 13 | struct mpc_cpu; | ||
| 14 | struct mpc_bus; | ||
| 15 | struct mpc_oemtable; | ||
| 16 | |||
| 17 | struct x86_quirks { | ||
| 18 | int (*arch_pre_time_init)(void); | ||
| 19 | int (*arch_time_init)(void); | ||
| 20 | int (*arch_pre_intr_init)(void); | ||
| 21 | int (*arch_intr_init)(void); | ||
| 22 | int (*arch_trap_init)(void); | ||
| 23 | char * (*arch_memory_setup)(void); | ||
| 24 | int (*mach_get_smp_config)(unsigned int early); | ||
| 25 | int (*mach_find_smp_config)(unsigned int reserve); | ||
| 26 | |||
| 27 | int *mpc_record; | ||
| 28 | int (*mpc_apic_id)(struct mpc_cpu *m); | ||
| 29 | void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name); | ||
| 30 | void (*mpc_oem_pci_bus)(struct mpc_bus *m); | ||
| 31 | void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable, | ||
| 32 | unsigned short oemsize); | ||
| 33 | int (*setup_ioapic_ids)(void); | ||
| 34 | }; | ||
| 35 | |||
| 36 | extern void x86_quirk_intr_init(void); | ||
| 37 | |||
| 38 | extern void x86_quirk_trap_init(void); | ||
| 39 | |||
| 40 | extern void x86_quirk_pre_time_init(void); | ||
| 41 | extern void x86_quirk_time_init(void); | ||
| 42 | |||
| 43 | #endif /* __ASSEMBLY__ */ | ||
| 44 | |||
| 45 | #ifdef __i386__ | 8 | #ifdef __i386__ |
| 46 | 9 | ||
| 47 | #include <linux/pfn.h> | 10 | #include <linux/pfn.h> |
| @@ -61,6 +24,7 @@ extern void x86_quirk_time_init(void); | |||
| 61 | 24 | ||
| 62 | #ifndef __ASSEMBLY__ | 25 | #ifndef __ASSEMBLY__ |
| 63 | #include <asm/bootparam.h> | 26 | #include <asm/bootparam.h> |
| 27 | #include <asm/x86_init.h> | ||
| 64 | 28 | ||
| 65 | /* Interrupt control for vSMPowered x86_64 systems */ | 29 | /* Interrupt control for vSMPowered x86_64 systems */ |
| 66 | #ifdef CONFIG_X86_64 | 30 | #ifdef CONFIG_X86_64 |
| @@ -79,11 +43,16 @@ static inline void visws_early_detect(void) { } | |||
| 79 | static inline int is_visws_box(void) { return 0; } | 43 | static inline int is_visws_box(void) { return 0; } |
| 80 | #endif | 44 | #endif |
| 81 | 45 | ||
| 82 | extern struct x86_quirks *x86_quirks; | ||
| 83 | extern unsigned long saved_video_mode; | 46 | extern unsigned long saved_video_mode; |
| 84 | 47 | ||
| 85 | #ifndef CONFIG_PARAVIRT | 48 | extern void reserve_standard_io_resources(void); |
| 86 | #define paravirt_post_allocator_init() do {} while (0) | 49 | extern void i386_reserve_resources(void); |
| 50 | extern void setup_default_timer_irq(void); | ||
| 51 | |||
| 52 | #ifdef CONFIG_X86_MRST | ||
| 53 | extern void x86_mrst_early_setup(void); | ||
| 54 | #else | ||
| 55 | static inline void x86_mrst_early_setup(void) { } | ||
| 87 | #endif | 56 | #endif |
| 88 | 57 | ||
| 89 | #ifndef _SETUP | 58 | #ifndef _SETUP |
diff --git a/arch/x86/include/asm/time.h b/arch/x86/include/asm/time.h index 50c733aac421..7bdec4e9b739 100644 --- a/arch/x86/include/asm/time.h +++ b/arch/x86/include/asm/time.h | |||
| @@ -4,60 +4,7 @@ | |||
| 4 | extern void hpet_time_init(void); | 4 | extern void hpet_time_init(void); |
| 5 | 5 | ||
| 6 | #include <asm/mc146818rtc.h> | 6 | #include <asm/mc146818rtc.h> |
| 7 | #ifdef CONFIG_X86_32 | ||
| 8 | #include <linux/efi.h> | ||
| 9 | |||
| 10 | static inline unsigned long native_get_wallclock(void) | ||
| 11 | { | ||
| 12 | unsigned long retval; | ||
| 13 | |||
| 14 | if (efi_enabled) | ||
| 15 | retval = efi_get_time(); | ||
| 16 | else | ||
| 17 | retval = mach_get_cmos_time(); | ||
| 18 | |||
| 19 | return retval; | ||
| 20 | } | ||
| 21 | |||
| 22 | static inline int native_set_wallclock(unsigned long nowtime) | ||
| 23 | { | ||
| 24 | int retval; | ||
| 25 | |||
| 26 | if (efi_enabled) | ||
| 27 | retval = efi_set_rtc_mmss(nowtime); | ||
| 28 | else | ||
| 29 | retval = mach_set_rtc_mmss(nowtime); | ||
| 30 | |||
| 31 | return retval; | ||
| 32 | } | ||
| 33 | |||
| 34 | #else | ||
| 35 | extern void native_time_init_hook(void); | ||
| 36 | |||
| 37 | static inline unsigned long native_get_wallclock(void) | ||
| 38 | { | ||
| 39 | return mach_get_cmos_time(); | ||
| 40 | } | ||
| 41 | |||
| 42 | static inline int native_set_wallclock(unsigned long nowtime) | ||
| 43 | { | ||
| 44 | return mach_set_rtc_mmss(nowtime); | ||
| 45 | } | ||
| 46 | |||
| 47 | #endif | ||
| 48 | 7 | ||
| 49 | extern void time_init(void); | 8 | extern void time_init(void); |
| 50 | 9 | ||
| 51 | #ifdef CONFIG_PARAVIRT | ||
| 52 | #include <asm/paravirt.h> | ||
| 53 | #else /* !CONFIG_PARAVIRT */ | ||
| 54 | |||
| 55 | #define get_wallclock() native_get_wallclock() | ||
| 56 | #define set_wallclock(x) native_set_wallclock(x) | ||
| 57 | #define choose_time_init() hpet_time_init | ||
| 58 | |||
| 59 | #endif /* CONFIG_PARAVIRT */ | ||
| 60 | |||
| 61 | extern unsigned long __init calibrate_cpu(void); | ||
| 62 | |||
| 63 | #endif /* _ASM_X86_TIME_H */ | 10 | #endif /* _ASM_X86_TIME_H */ |
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index 20ca9c4d4686..5469630b27f5 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h | |||
| @@ -8,20 +8,16 @@ | |||
| 8 | #define TICK_SIZE (tick_nsec / 1000) | 8 | #define TICK_SIZE (tick_nsec / 1000) |
| 9 | 9 | ||
| 10 | unsigned long long native_sched_clock(void); | 10 | unsigned long long native_sched_clock(void); |
| 11 | unsigned long native_calibrate_tsc(void); | 11 | extern int recalibrate_cpu_khz(void); |
| 12 | 12 | ||
| 13 | #ifdef CONFIG_X86_32 | 13 | #if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC) |
| 14 | extern int timer_ack; | 14 | extern int timer_ack; |
| 15 | extern irqreturn_t timer_interrupt(int irq, void *dev_id); | 15 | #else |
| 16 | #endif /* CONFIG_X86_32 */ | 16 | # define timer_ack (0) |
| 17 | extern int recalibrate_cpu_khz(void); | 17 | #endif |
| 18 | 18 | ||
| 19 | extern int no_timer_check; | 19 | extern int no_timer_check; |
| 20 | 20 | ||
| 21 | #ifndef CONFIG_PARAVIRT | ||
| 22 | #define calibrate_tsc() native_calibrate_tsc() | ||
| 23 | #endif | ||
| 24 | |||
| 25 | /* Accelerators for sched_clock() | 21 | /* Accelerators for sched_clock() |
| 26 | * convert from cycles(64bits) => nanoseconds (64bits) | 22 | * convert from cycles(64bits) => nanoseconds (64bits) |
| 27 | * basic equation: | 23 | * basic equation: |
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 38ae163cc91b..c0427295e8f5 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h | |||
| @@ -48,7 +48,8 @@ static __always_inline cycles_t vget_cycles(void) | |||
| 48 | extern void tsc_init(void); | 48 | extern void tsc_init(void); |
| 49 | extern void mark_tsc_unstable(char *reason); | 49 | extern void mark_tsc_unstable(char *reason); |
| 50 | extern int unsynchronized_tsc(void); | 50 | extern int unsynchronized_tsc(void); |
| 51 | int check_tsc_unstable(void); | 51 | extern int check_tsc_unstable(void); |
| 52 | extern unsigned long native_calibrate_tsc(void); | ||
| 52 | 53 | ||
| 53 | /* | 54 | /* |
| 54 | * Boot-time check whether the TSCs are synchronized across | 55 | * Boot-time check whether the TSCs are synchronized across |
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h index dc27a69e5d2a..3d61e204826f 100644 --- a/arch/x86/include/asm/vgtod.h +++ b/arch/x86/include/asm/vgtod.h | |||
| @@ -21,6 +21,7 @@ struct vsyscall_gtod_data { | |||
| 21 | u32 shift; | 21 | u32 shift; |
| 22 | } clock; | 22 | } clock; |
| 23 | struct timespec wall_to_monotonic; | 23 | struct timespec wall_to_monotonic; |
| 24 | struct timespec wall_time_coarse; | ||
| 24 | }; | 25 | }; |
| 25 | extern struct vsyscall_gtod_data __vsyscall_gtod_data | 26 | extern struct vsyscall_gtod_data __vsyscall_gtod_data |
| 26 | __section_vsyscall_gtod_data; | 27 | __section_vsyscall_gtod_data; |
diff --git a/arch/x86/include/asm/vmware.h b/arch/x86/include/asm/vmware.h index c11b7e100d83..e49ed6d2fd4e 100644 --- a/arch/x86/include/asm/vmware.h +++ b/arch/x86/include/asm/vmware.h | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | #ifndef ASM_X86__VMWARE_H | 20 | #ifndef ASM_X86__VMWARE_H |
| 21 | #define ASM_X86__VMWARE_H | 21 | #define ASM_X86__VMWARE_H |
| 22 | 22 | ||
| 23 | extern unsigned long vmware_get_tsc_khz(void); | 23 | extern void vmware_platform_setup(void); |
| 24 | extern int vmware_platform(void); | 24 | extern int vmware_platform(void); |
| 25 | extern void vmware_set_feature_bits(struct cpuinfo_x86 *c); | 25 | extern void vmware_set_feature_bits(struct cpuinfo_x86 *c); |
| 26 | 26 | ||
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h new file mode 100644 index 000000000000..2c756fd4ab0e --- /dev/null +++ b/arch/x86/include/asm/x86_init.h | |||
| @@ -0,0 +1,133 @@ | |||
| 1 | #ifndef _ASM_X86_PLATFORM_H | ||
| 2 | #define _ASM_X86_PLATFORM_H | ||
| 3 | |||
| 4 | #include <asm/pgtable_types.h> | ||
| 5 | #include <asm/bootparam.h> | ||
| 6 | |||
| 7 | struct mpc_bus; | ||
| 8 | struct mpc_cpu; | ||
| 9 | struct mpc_table; | ||
| 10 | |||
| 11 | /** | ||
| 12 | * struct x86_init_mpparse - platform specific mpparse ops | ||
| 13 | * @mpc_record: platform specific mpc record accounting | ||
| 14 | * @setup_ioapic_ids: platform specific ioapic id override | ||
| 15 | * @mpc_apic_id: platform specific mpc apic id assignment | ||
| 16 | * @smp_read_mpc_oem: platform specific oem mpc table setup | ||
| 17 | * @mpc_oem_pci_bus: platform specific pci bus setup (default NULL) | ||
| 18 | * @mpc_oem_bus_info: platform specific mpc bus info | ||
| 19 | * @find_smp_config: find the smp configuration | ||
| 20 | * @get_smp_config: get the smp configuration | ||
| 21 | */ | ||
| 22 | struct x86_init_mpparse { | ||
| 23 | void (*mpc_record)(unsigned int mode); | ||
| 24 | void (*setup_ioapic_ids)(void); | ||
| 25 | int (*mpc_apic_id)(struct mpc_cpu *m); | ||
| 26 | void (*smp_read_mpc_oem)(struct mpc_table *mpc); | ||
| 27 | void (*mpc_oem_pci_bus)(struct mpc_bus *m); | ||
| 28 | void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name); | ||
| 29 | void (*find_smp_config)(unsigned int reserve); | ||
| 30 | void (*get_smp_config)(unsigned int early); | ||
| 31 | }; | ||
| 32 | |||
| 33 | /** | ||
| 34 | * struct x86_init_resources - platform specific resource related ops | ||
| 35 | * @probe_roms: probe BIOS roms | ||
| 36 | * @reserve_resources: reserve the standard resources for the | ||
| 37 | * platform | ||
| 38 | * @memory_setup: platform specific memory setup | ||
| 39 | * | ||
| 40 | */ | ||
| 41 | struct x86_init_resources { | ||
| 42 | void (*probe_roms)(void); | ||
| 43 | void (*reserve_resources)(void); | ||
| 44 | char *(*memory_setup)(void); | ||
| 45 | }; | ||
| 46 | |||
| 47 | /** | ||
| 48 | * struct x86_init_irqs - platform specific interrupt setup | ||
| 49 | * @pre_vector_init: init code to run before interrupt vectors | ||
| 50 | * are set up. | ||
| 51 | * @intr_init: interrupt init code | ||
| 52 | * @trap_init: platform specific trap setup | ||
| 53 | */ | ||
| 54 | struct x86_init_irqs { | ||
| 55 | void (*pre_vector_init)(void); | ||
| 56 | void (*intr_init)(void); | ||
| 57 | void (*trap_init)(void); | ||
| 58 | }; | ||
| 59 | |||
| 60 | /** | ||
| 61 | * struct x86_init_oem - oem platform specific customizing functions | ||
| 62 | * @arch_setup: platform specific architecure setup | ||
| 63 | * @banner: print a platform specific banner | ||
| 64 | */ | ||
| 65 | struct x86_init_oem { | ||
| 66 | void (*arch_setup)(void); | ||
| 67 | void (*banner)(void); | ||
| 68 | }; | ||
| 69 | |||
| 70 | /** | ||
| 71 | * struct x86_init_paging - platform specific paging functions | ||
| 72 | * @pagetable_setup_start: platform specific pre paging_init() call | ||
| 73 | * @pagetable_setup_done: platform specific post paging_init() call | ||
| 74 | */ | ||
| 75 | struct x86_init_paging { | ||
| 76 | void (*pagetable_setup_start)(pgd_t *base); | ||
| 77 | void (*pagetable_setup_done)(pgd_t *base); | ||
| 78 | }; | ||
| 79 | |||
| 80 | /** | ||
| 81 | * struct x86_init_timers - platform specific timer setup | ||
| 82 | * @setup_perpcu_clockev: set up the per cpu clock event device for the | ||
| 83 | * boot cpu | ||
| 84 | * @tsc_pre_init: platform function called before TSC init | ||
| 85 | * @timer_init: initialize the platform timer (default PIT/HPET) | ||
| 86 | */ | ||
| 87 | struct x86_init_timers { | ||
| 88 | void (*setup_percpu_clockev)(void); | ||
| 89 | void (*tsc_pre_init)(void); | ||
| 90 | void (*timer_init)(void); | ||
| 91 | }; | ||
| 92 | |||
| 93 | /** | ||
| 94 | * struct x86_init_ops - functions for platform specific setup | ||
| 95 | * | ||
| 96 | */ | ||
| 97 | struct x86_init_ops { | ||
| 98 | struct x86_init_resources resources; | ||
| 99 | struct x86_init_mpparse mpparse; | ||
| 100 | struct x86_init_irqs irqs; | ||
| 101 | struct x86_init_oem oem; | ||
| 102 | struct x86_init_paging paging; | ||
| 103 | struct x86_init_timers timers; | ||
| 104 | }; | ||
| 105 | |||
| 106 | /** | ||
| 107 | * struct x86_cpuinit_ops - platform specific cpu hotplug setups | ||
| 108 | * @setup_percpu_clockev: set up the per cpu clock event device | ||
| 109 | */ | ||
| 110 | struct x86_cpuinit_ops { | ||
| 111 | void (*setup_percpu_clockev)(void); | ||
| 112 | }; | ||
| 113 | |||
| 114 | /** | ||
| 115 | * struct x86_platform_ops - platform specific runtime functions | ||
| 116 | * @calibrate_tsc: calibrate TSC | ||
| 117 | * @get_wallclock: get time from HW clock like RTC etc. | ||
| 118 | * @set_wallclock: set time back to HW clock | ||
| 119 | */ | ||
| 120 | struct x86_platform_ops { | ||
| 121 | unsigned long (*calibrate_tsc)(void); | ||
| 122 | unsigned long (*get_wallclock)(void); | ||
| 123 | int (*set_wallclock)(unsigned long nowtime); | ||
| 124 | }; | ||
| 125 | |||
| 126 | extern struct x86_init_ops x86_init; | ||
| 127 | extern struct x86_cpuinit_ops x86_cpuinit; | ||
| 128 | extern struct x86_platform_ops x86_platform; | ||
| 129 | |||
| 130 | extern void x86_init_noop(void); | ||
| 131 | extern void x86_init_uint_noop(unsigned int unused); | ||
| 132 | |||
| 133 | #endif | ||
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 832cb838cb48..4ba419b668a5 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile | |||
| @@ -31,8 +31,8 @@ GCOV_PROFILE_paravirt.o := n | |||
| 31 | 31 | ||
| 32 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o | 32 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o |
| 33 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o | 33 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o |
| 34 | obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o | 34 | obj-y += time.o ioport.o ldt.o dumpstack.o |
| 35 | obj-y += setup.o i8259.o irqinit.o | 35 | obj-y += setup.o x86_init.o i8259.o irqinit.o |
| 36 | obj-$(CONFIG_X86_VISWS) += visws_quirks.o | 36 | obj-$(CONFIG_X86_VISWS) += visws_quirks.o |
| 37 | obj-$(CONFIG_X86_32) += probe_roms_32.o | 37 | obj-$(CONFIG_X86_32) += probe_roms_32.o |
| 38 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o | 38 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o |
| @@ -105,6 +105,7 @@ obj-$(CONFIG_SCx200) += scx200.o | |||
| 105 | scx200-y += scx200_32.o | 105 | scx200-y += scx200_32.o |
| 106 | 106 | ||
| 107 | obj-$(CONFIG_OLPC) += olpc.o | 107 | obj-$(CONFIG_OLPC) += olpc.o |
| 108 | obj-$(CONFIG_X86_MRST) += mrst.o | ||
| 108 | 109 | ||
| 109 | microcode-y := microcode_core.o | 110 | microcode-y := microcode_core.o |
| 110 | microcode-$(CONFIG_MICROCODE_INTEL) += microcode_intel.o | 111 | microcode-$(CONFIG_MICROCODE_INTEL) += microcode_intel.o |
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 159740decc41..a34601f52987 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | #include <linux/mm.h> | 36 | #include <linux/mm.h> |
| 37 | 37 | ||
| 38 | #include <asm/perf_counter.h> | 38 | #include <asm/perf_counter.h> |
| 39 | #include <asm/x86_init.h> | ||
| 39 | #include <asm/pgalloc.h> | 40 | #include <asm/pgalloc.h> |
| 40 | #include <asm/atomic.h> | 41 | #include <asm/atomic.h> |
| 41 | #include <asm/mpspec.h> | 42 | #include <asm/mpspec.h> |
| @@ -1709,7 +1710,7 @@ int __init APIC_init_uniprocessor(void) | |||
| 1709 | localise_nmi_watchdog(); | 1710 | localise_nmi_watchdog(); |
| 1710 | #endif | 1711 | #endif |
| 1711 | 1712 | ||
| 1712 | setup_boot_clock(); | 1713 | x86_init.timers.setup_percpu_clockev(); |
| 1713 | #ifdef CONFIG_X86_64 | 1714 | #ifdef CONFIG_X86_64 |
| 1714 | check_nmi_watchdog(); | 1715 | check_nmi_watchdog(); |
| 1715 | #endif | 1716 | #endif |
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c index 676cdac385c0..77a06413b6b2 100644 --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c | |||
| @@ -112,7 +112,7 @@ static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map) | |||
| 112 | return physids_promote(0xFFL); | 112 | return physids_promote(0xFFL); |
| 113 | } | 113 | } |
| 114 | 114 | ||
| 115 | static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid) | 115 | static int bigsmp_check_phys_apicid_present(int phys_apicid) |
| 116 | { | 116 | { |
| 117 | return 1; | 117 | return 1; |
| 118 | } | 118 | } |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 3c8f9e75d038..809e1cf86d6b 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
| @@ -96,6 +96,11 @@ struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; | |||
| 96 | /* # of MP IRQ source entries */ | 96 | /* # of MP IRQ source entries */ |
| 97 | int mp_irq_entries; | 97 | int mp_irq_entries; |
| 98 | 98 | ||
| 99 | /* Number of legacy interrupts */ | ||
| 100 | static int nr_legacy_irqs __read_mostly = NR_IRQS_LEGACY; | ||
| 101 | /* GSI interrupts */ | ||
| 102 | static int nr_irqs_gsi = NR_IRQS_LEGACY; | ||
| 103 | |||
| 99 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | 104 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) |
| 100 | int mp_bus_id_to_type[MAX_MP_BUSSES]; | 105 | int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 101 | #endif | 106 | #endif |
| @@ -173,6 +178,12 @@ static struct irq_cfg irq_cfgx[NR_IRQS] = { | |||
| 173 | [15] = { .vector = IRQ15_VECTOR, }, | 178 | [15] = { .vector = IRQ15_VECTOR, }, |
| 174 | }; | 179 | }; |
| 175 | 180 | ||
| 181 | void __init io_apic_disable_legacy(void) | ||
| 182 | { | ||
| 183 | nr_legacy_irqs = 0; | ||
| 184 | nr_irqs_gsi = 0; | ||
| 185 | } | ||
| 186 | |||
| 176 | int __init arch_early_irq_init(void) | 187 | int __init arch_early_irq_init(void) |
| 177 | { | 188 | { |
| 178 | struct irq_cfg *cfg; | 189 | struct irq_cfg *cfg; |
| @@ -190,7 +201,7 @@ int __init arch_early_irq_init(void) | |||
| 190 | desc->chip_data = &cfg[i]; | 201 | desc->chip_data = &cfg[i]; |
| 191 | zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node); | 202 | zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node); |
| 192 | zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node); | 203 | zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node); |
| 193 | if (i < NR_IRQS_LEGACY) | 204 | if (i < nr_legacy_irqs) |
| 194 | cpumask_setall(cfg[i].domain); | 205 | cpumask_setall(cfg[i].domain); |
| 195 | } | 206 | } |
| 196 | 207 | ||
| @@ -867,7 +878,7 @@ static int __init find_isa_irq_apic(int irq, int type) | |||
| 867 | */ | 878 | */ |
| 868 | static int EISA_ELCR(unsigned int irq) | 879 | static int EISA_ELCR(unsigned int irq) |
| 869 | { | 880 | { |
| 870 | if (irq < NR_IRQS_LEGACY) { | 881 | if (irq < nr_legacy_irqs) { |
| 871 | unsigned int port = 0x4d0 + (irq >> 3); | 882 | unsigned int port = 0x4d0 + (irq >> 3); |
| 872 | return (inb(port) >> (irq & 7)) & 1; | 883 | return (inb(port) >> (irq & 7)) & 1; |
| 873 | } | 884 | } |
| @@ -1464,7 +1475,7 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq | |||
| 1464 | } | 1475 | } |
| 1465 | 1476 | ||
| 1466 | ioapic_register_intr(irq, desc, trigger); | 1477 | ioapic_register_intr(irq, desc, trigger); |
| 1467 | if (irq < NR_IRQS_LEGACY) | 1478 | if (irq < nr_legacy_irqs) |
| 1468 | disable_8259A_irq(irq); | 1479 | disable_8259A_irq(irq); |
| 1469 | 1480 | ||
| 1470 | ioapic_write_entry(apic_id, pin, entry); | 1481 | ioapic_write_entry(apic_id, pin, entry); |
| @@ -1831,7 +1842,7 @@ __apicdebuginit(void) print_PIC(void) | |||
| 1831 | unsigned int v; | 1842 | unsigned int v; |
| 1832 | unsigned long flags; | 1843 | unsigned long flags; |
| 1833 | 1844 | ||
| 1834 | if (apic_verbosity == APIC_QUIET) | 1845 | if (apic_verbosity == APIC_QUIET || !nr_legacy_irqs) |
| 1835 | return; | 1846 | return; |
| 1836 | 1847 | ||
| 1837 | printk(KERN_DEBUG "\nprinting PIC contents\n"); | 1848 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
| @@ -1894,6 +1905,10 @@ void __init enable_IO_APIC(void) | |||
| 1894 | spin_unlock_irqrestore(&ioapic_lock, flags); | 1905 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 1895 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; | 1906 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
| 1896 | } | 1907 | } |
| 1908 | |||
| 1909 | if (!nr_legacy_irqs) | ||
| 1910 | return; | ||
| 1911 | |||
| 1897 | for(apic = 0; apic < nr_ioapics; apic++) { | 1912 | for(apic = 0; apic < nr_ioapics; apic++) { |
| 1898 | int pin; | 1913 | int pin; |
| 1899 | /* See if any of the pins is in ExtINT mode */ | 1914 | /* See if any of the pins is in ExtINT mode */ |
| @@ -1948,6 +1963,9 @@ void disable_IO_APIC(void) | |||
| 1948 | */ | 1963 | */ |
| 1949 | clear_IO_APIC(); | 1964 | clear_IO_APIC(); |
| 1950 | 1965 | ||
| 1966 | if (!nr_legacy_irqs) | ||
| 1967 | return; | ||
| 1968 | |||
| 1951 | /* | 1969 | /* |
| 1952 | * If the i8259 is routed through an IOAPIC | 1970 | * If the i8259 is routed through an IOAPIC |
| 1953 | * Put that IOAPIC in virtual wire mode | 1971 | * Put that IOAPIC in virtual wire mode |
| @@ -1994,7 +2012,7 @@ void disable_IO_APIC(void) | |||
| 1994 | * by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999 | 2012 | * by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999 |
| 1995 | */ | 2013 | */ |
| 1996 | 2014 | ||
| 1997 | static void __init setup_ioapic_ids_from_mpc(void) | 2015 | void __init setup_ioapic_ids_from_mpc(void) |
| 1998 | { | 2016 | { |
| 1999 | union IO_APIC_reg_00 reg_00; | 2017 | union IO_APIC_reg_00 reg_00; |
| 2000 | physid_mask_t phys_id_present_map; | 2018 | physid_mask_t phys_id_present_map; |
| @@ -2003,9 +2021,8 @@ static void __init setup_ioapic_ids_from_mpc(void) | |||
| 2003 | unsigned char old_id; | 2021 | unsigned char old_id; |
| 2004 | unsigned long flags; | 2022 | unsigned long flags; |
| 2005 | 2023 | ||
| 2006 | if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids()) | 2024 | if (acpi_ioapic) |
| 2007 | return; | 2025 | return; |
| 2008 | |||
| 2009 | /* | 2026 | /* |
| 2010 | * Don't check I/O APIC IDs for xAPIC systems. They have | 2027 | * Don't check I/O APIC IDs for xAPIC systems. They have |
| 2011 | * no meaning without the serial APIC bus. | 2028 | * no meaning without the serial APIC bus. |
| @@ -2179,7 +2196,7 @@ static unsigned int startup_ioapic_irq(unsigned int irq) | |||
| 2179 | struct irq_cfg *cfg; | 2196 | struct irq_cfg *cfg; |
| 2180 | 2197 | ||
| 2181 | spin_lock_irqsave(&ioapic_lock, flags); | 2198 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2182 | if (irq < NR_IRQS_LEGACY) { | 2199 | if (irq < nr_legacy_irqs) { |
| 2183 | disable_8259A_irq(irq); | 2200 | disable_8259A_irq(irq); |
| 2184 | if (i8259A_irq_pending(irq)) | 2201 | if (i8259A_irq_pending(irq)) |
| 2185 | was_pending = 1; | 2202 | was_pending = 1; |
| @@ -2657,7 +2674,7 @@ static inline void init_IO_APIC_traps(void) | |||
| 2657 | * so default to an old-fashioned 8259 | 2674 | * so default to an old-fashioned 8259 |
| 2658 | * interrupt if we can.. | 2675 | * interrupt if we can.. |
| 2659 | */ | 2676 | */ |
| 2660 | if (irq < NR_IRQS_LEGACY) | 2677 | if (irq < nr_legacy_irqs) |
| 2661 | make_8259A_irq(irq); | 2678 | make_8259A_irq(irq); |
| 2662 | else | 2679 | else |
| 2663 | /* Strange. Oh, well.. */ | 2680 | /* Strange. Oh, well.. */ |
| @@ -2993,7 +3010,7 @@ out: | |||
| 2993 | * the I/O APIC in all cases now. No actual device should request | 3010 | * the I/O APIC in all cases now. No actual device should request |
| 2994 | * it anyway. --macro | 3011 | * it anyway. --macro |
| 2995 | */ | 3012 | */ |
| 2996 | #define PIC_IRQS (1 << PIC_CASCADE_IR) | 3013 | #define PIC_IRQS (1UL << PIC_CASCADE_IR) |
| 2997 | 3014 | ||
| 2998 | void __init setup_IO_APIC(void) | 3015 | void __init setup_IO_APIC(void) |
| 2999 | { | 3016 | { |
| @@ -3001,21 +3018,19 @@ void __init setup_IO_APIC(void) | |||
| 3001 | /* | 3018 | /* |
| 3002 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP | 3019 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
| 3003 | */ | 3020 | */ |
| 3004 | 3021 | io_apic_irqs = nr_legacy_irqs ? ~PIC_IRQS : ~0UL; | |
| 3005 | io_apic_irqs = ~PIC_IRQS; | ||
| 3006 | 3022 | ||
| 3007 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); | 3023 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); |
| 3008 | /* | 3024 | /* |
| 3009 | * Set up IO-APIC IRQ routing. | 3025 | * Set up IO-APIC IRQ routing. |
| 3010 | */ | 3026 | */ |
| 3011 | #ifdef CONFIG_X86_32 | 3027 | x86_init.mpparse.setup_ioapic_ids(); |
| 3012 | if (!acpi_ioapic) | 3028 | |
| 3013 | setup_ioapic_ids_from_mpc(); | ||
| 3014 | #endif | ||
| 3015 | sync_Arb_IDs(); | 3029 | sync_Arb_IDs(); |
| 3016 | setup_IO_APIC_irqs(); | 3030 | setup_IO_APIC_irqs(); |
| 3017 | init_IO_APIC_traps(); | 3031 | init_IO_APIC_traps(); |
| 3018 | check_timer(); | 3032 | if (nr_legacy_irqs) |
| 3033 | check_timer(); | ||
| 3019 | } | 3034 | } |
| 3020 | 3035 | ||
| 3021 | /* | 3036 | /* |
| @@ -3116,7 +3131,6 @@ static int __init ioapic_init_sysfs(void) | |||
| 3116 | 3131 | ||
| 3117 | device_initcall(ioapic_init_sysfs); | 3132 | device_initcall(ioapic_init_sysfs); |
| 3118 | 3133 | ||
| 3119 | static int nr_irqs_gsi = NR_IRQS_LEGACY; | ||
| 3120 | /* | 3134 | /* |
| 3121 | * Dynamic irq allocate and deallocation | 3135 | * Dynamic irq allocate and deallocation |
| 3122 | */ | 3136 | */ |
| @@ -3856,7 +3870,7 @@ static int __io_apic_set_pci_routing(struct device *dev, int irq, | |||
| 3856 | /* | 3870 | /* |
| 3857 | * IRQs < 16 are already in the irq_2_pin[] map | 3871 | * IRQs < 16 are already in the irq_2_pin[] map |
| 3858 | */ | 3872 | */ |
| 3859 | if (irq >= NR_IRQS_LEGACY) { | 3873 | if (irq >= nr_legacy_irqs) { |
| 3860 | cfg = desc->chip_data; | 3874 | cfg = desc->chip_data; |
| 3861 | if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) { | 3875 | if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) { |
| 3862 | printk(KERN_INFO "can not add pin %d for irq %d\n", | 3876 | printk(KERN_INFO "can not add pin %d for irq %d\n", |
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c index ca96e68f0d23..efa00e2b8505 100644 --- a/arch/x86/kernel/apic/numaq_32.c +++ b/arch/x86/kernel/apic/numaq_32.c | |||
| @@ -66,7 +66,6 @@ struct mpc_trans { | |||
| 66 | unsigned short trans_reserved; | 66 | unsigned short trans_reserved; |
| 67 | }; | 67 | }; |
| 68 | 68 | ||
| 69 | /* x86_quirks member */ | ||
| 70 | static int mpc_record; | 69 | static int mpc_record; |
| 71 | 70 | ||
| 72 | static struct mpc_trans *translation_table[MAX_MPC_ENTRY]; | 71 | static struct mpc_trans *translation_table[MAX_MPC_ENTRY]; |
| @@ -130,10 +129,9 @@ void __cpuinit numaq_tsc_disable(void) | |||
| 130 | } | 129 | } |
| 131 | } | 130 | } |
| 132 | 131 | ||
| 133 | static int __init numaq_pre_time_init(void) | 132 | static void __init numaq_tsc_init(void) |
| 134 | { | 133 | { |
| 135 | numaq_tsc_disable(); | 134 | numaq_tsc_disable(); |
| 136 | return 0; | ||
| 137 | } | 135 | } |
| 138 | 136 | ||
| 139 | static inline int generate_logical_apicid(int quad, int phys_apicid) | 137 | static inline int generate_logical_apicid(int quad, int phys_apicid) |
| @@ -177,6 +175,19 @@ static void mpc_oem_pci_bus(struct mpc_bus *m) | |||
| 177 | quad_local_to_mp_bus_id[quad][local] = m->busid; | 175 | quad_local_to_mp_bus_id[quad][local] = m->busid; |
| 178 | } | 176 | } |
| 179 | 177 | ||
| 178 | /* | ||
| 179 | * Called from mpparse code. | ||
| 180 | * mode = 0: prescan | ||
| 181 | * mode = 1: one mpc entry scanned | ||
| 182 | */ | ||
| 183 | static void numaq_mpc_record(unsigned int mode) | ||
| 184 | { | ||
| 185 | if (!mode) | ||
| 186 | mpc_record = 0; | ||
| 187 | else | ||
| 188 | mpc_record++; | ||
| 189 | } | ||
| 190 | |||
| 180 | static void __init MP_translation_info(struct mpc_trans *m) | 191 | static void __init MP_translation_info(struct mpc_trans *m) |
| 181 | { | 192 | { |
| 182 | printk(KERN_INFO | 193 | printk(KERN_INFO |
| @@ -206,9 +217,9 @@ static int __init mpf_checksum(unsigned char *mp, int len) | |||
| 206 | /* | 217 | /* |
| 207 | * Read/parse the MPC oem tables | 218 | * Read/parse the MPC oem tables |
| 208 | */ | 219 | */ |
| 209 | static void __init | 220 | static void __init smp_read_mpc_oem(struct mpc_table *mpc) |
| 210 | smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize) | ||
| 211 | { | 221 | { |
| 222 | struct mpc_oemtable *oemtable = (void *)(long)mpc->oemptr; | ||
| 212 | int count = sizeof(*oemtable); /* the header size */ | 223 | int count = sizeof(*oemtable); /* the header size */ |
| 213 | unsigned char *oemptr = ((unsigned char *)oemtable) + count; | 224 | unsigned char *oemptr = ((unsigned char *)oemtable) + count; |
| 214 | 225 | ||
| @@ -250,29 +261,6 @@ static void __init | |||
| 250 | } | 261 | } |
| 251 | } | 262 | } |
| 252 | 263 | ||
| 253 | static int __init numaq_setup_ioapic_ids(void) | ||
| 254 | { | ||
| 255 | /* so can skip it */ | ||
| 256 | return 1; | ||
| 257 | } | ||
| 258 | |||
| 259 | static struct x86_quirks numaq_x86_quirks __initdata = { | ||
| 260 | .arch_pre_time_init = numaq_pre_time_init, | ||
| 261 | .arch_time_init = NULL, | ||
| 262 | .arch_pre_intr_init = NULL, | ||
| 263 | .arch_memory_setup = NULL, | ||
| 264 | .arch_intr_init = NULL, | ||
| 265 | .arch_trap_init = NULL, | ||
| 266 | .mach_get_smp_config = NULL, | ||
| 267 | .mach_find_smp_config = NULL, | ||
| 268 | .mpc_record = &mpc_record, | ||
| 269 | .mpc_apic_id = mpc_apic_id, | ||
| 270 | .mpc_oem_bus_info = mpc_oem_bus_info, | ||
| 271 | .mpc_oem_pci_bus = mpc_oem_pci_bus, | ||
| 272 | .smp_read_mpc_oem = smp_read_mpc_oem, | ||
| 273 | .setup_ioapic_ids = numaq_setup_ioapic_ids, | ||
| 274 | }; | ||
| 275 | |||
| 276 | static __init void early_check_numaq(void) | 264 | static __init void early_check_numaq(void) |
| 277 | { | 265 | { |
| 278 | /* | 266 | /* |
| @@ -286,8 +274,15 @@ static __init void early_check_numaq(void) | |||
| 286 | if (smp_found_config) | 274 | if (smp_found_config) |
| 287 | early_get_smp_config(); | 275 | early_get_smp_config(); |
| 288 | 276 | ||
| 289 | if (found_numaq) | 277 | if (found_numaq) { |
| 290 | x86_quirks = &numaq_x86_quirks; | 278 | x86_init.mpparse.mpc_record = numaq_mpc_record; |
| 279 | x86_init.mpparse.setup_ioapic_ids = x86_init_noop; | ||
| 280 | x86_init.mpparse.mpc_apic_id = mpc_apic_id; | ||
| 281 | x86_init.mpparse.smp_read_mpc_oem = smp_read_mpc_oem; | ||
| 282 | x86_init.mpparse.mpc_oem_pci_bus = mpc_oem_pci_bus; | ||
| 283 | x86_init.mpparse.mpc_oem_bus_info = mpc_oem_bus_info; | ||
| 284 | x86_init.timers.tsc_pre_init = numaq_tsc_init; | ||
| 285 | } | ||
| 291 | } | 286 | } |
| 292 | 287 | ||
| 293 | int __init get_memcfg_numaq(void) | 288 | int __init get_memcfg_numaq(void) |
| @@ -418,7 +413,7 @@ static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid) | |||
| 418 | /* Where the IO area was mapped on multiquad, always 0 otherwise */ | 413 | /* Where the IO area was mapped on multiquad, always 0 otherwise */ |
| 419 | void *xquad_portio; | 414 | void *xquad_portio; |
| 420 | 415 | ||
| 421 | static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid) | 416 | static inline int numaq_check_phys_apicid_present(int phys_apicid) |
| 422 | { | 417 | { |
| 423 | return 1; | 418 | return 1; |
| 424 | } | 419 | } |
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c index eafdfbd1ea95..645ecc4ff0be 100644 --- a/arch/x86/kernel/apic/summit_32.c +++ b/arch/x86/kernel/apic/summit_32.c | |||
| @@ -272,7 +272,7 @@ static physid_mask_t summit_apicid_to_cpu_present(int apicid) | |||
| 272 | return physid_mask_of_physid(0); | 272 | return physid_mask_of_physid(0); |
| 273 | } | 273 | } |
| 274 | 274 | ||
| 275 | static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid) | 275 | static int summit_check_phys_apicid_present(int physical_apicid) |
| 276 | { | 276 | { |
| 277 | return 1; | 277 | return 1; |
| 278 | } | 278 | } |
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 2055fc2b2e6b..2fea97eccf77 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
| @@ -34,7 +34,6 @@ | |||
| 34 | #include <asm/mce.h> | 34 | #include <asm/mce.h> |
| 35 | #include <asm/msr.h> | 35 | #include <asm/msr.h> |
| 36 | #include <asm/pat.h> | 36 | #include <asm/pat.h> |
| 37 | #include <linux/smp.h> | ||
| 38 | 37 | ||
| 39 | #ifdef CONFIG_X86_LOCAL_APIC | 38 | #ifdef CONFIG_X86_LOCAL_APIC |
| 40 | #include <asm/uv/uv.h> | 39 | #include <asm/uv/uv.h> |
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c index 479cc8c418c1..7d5c3b0ea8da 100644 --- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c | |||
| @@ -523,6 +523,21 @@ static const struct dmi_system_id sw_any_bug_dmi_table[] = { | |||
| 523 | }, | 523 | }, |
| 524 | { } | 524 | { } |
| 525 | }; | 525 | }; |
| 526 | |||
| 527 | static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) | ||
| 528 | { | ||
| 529 | /* http://www.intel.com/Assets/PDF/specupdate/314554.pdf | ||
| 530 | * AL30: A Machine Check Exception (MCE) Occurring during an | ||
| 531 | * Enhanced Intel SpeedStep Technology Ratio Change May Cause | ||
| 532 | * Both Processor Cores to Lock Up when HT is enabled*/ | ||
| 533 | if (c->x86_vendor == X86_VENDOR_INTEL) { | ||
| 534 | if ((c->x86 == 15) && | ||
| 535 | (c->x86_model == 6) && | ||
| 536 | (c->x86_mask == 8) && smt_capable()) | ||
| 537 | return -ENODEV; | ||
| 538 | } | ||
| 539 | return 0; | ||
| 540 | } | ||
| 526 | #endif | 541 | #endif |
| 527 | 542 | ||
| 528 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) | 543 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
| @@ -537,6 +552,12 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) | |||
| 537 | 552 | ||
| 538 | dprintk("acpi_cpufreq_cpu_init\n"); | 553 | dprintk("acpi_cpufreq_cpu_init\n"); |
| 539 | 554 | ||
| 555 | #ifdef CONFIG_SMP | ||
| 556 | result = acpi_cpufreq_blacklist(c); | ||
| 557 | if (result) | ||
| 558 | return result; | ||
| 559 | #endif | ||
| 560 | |||
| 540 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); | 561 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
| 541 | if (!data) | 562 | if (!data) |
| 542 | return -ENOMEM; | 563 | return -ENOMEM; |
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index 2a50ef891000..6394aa5c7985 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
| @@ -605,9 +605,10 @@ static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, | |||
| 605 | return 0; | 605 | return 0; |
| 606 | } | 606 | } |
| 607 | 607 | ||
| 608 | static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry) | 608 | static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, |
| 609 | unsigned int entry) | ||
| 609 | { | 610 | { |
| 610 | data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; | 611 | powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; |
| 611 | } | 612 | } |
| 612 | 613 | ||
| 613 | static void print_basics(struct powernow_k8_data *data) | 614 | static void print_basics(struct powernow_k8_data *data) |
| @@ -854,6 +855,10 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |||
| 854 | goto err_out; | 855 | goto err_out; |
| 855 | } | 856 | } |
| 856 | 857 | ||
| 858 | /* fill in data */ | ||
| 859 | data->numps = data->acpi_data.state_count; | ||
| 860 | powernow_k8_acpi_pst_values(data, 0); | ||
| 861 | |||
| 857 | if (cpu_family == CPU_HW_PSTATE) | 862 | if (cpu_family == CPU_HW_PSTATE) |
| 858 | ret_val = fill_powernow_table_pstate(data, powernow_table); | 863 | ret_val = fill_powernow_table_pstate(data, powernow_table); |
| 859 | else | 864 | else |
| @@ -866,11 +871,8 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |||
| 866 | powernow_table[data->acpi_data.state_count].index = 0; | 871 | powernow_table[data->acpi_data.state_count].index = 0; |
| 867 | data->powernow_table = powernow_table; | 872 | data->powernow_table = powernow_table; |
| 868 | 873 | ||
| 869 | /* fill in data */ | ||
| 870 | data->numps = data->acpi_data.state_count; | ||
| 871 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) | 874 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) |
| 872 | print_basics(data); | 875 | print_basics(data); |
| 873 | powernow_k8_acpi_pst_values(data, 0); | ||
| 874 | 876 | ||
| 875 | /* notify BIOS that we exist */ | 877 | /* notify BIOS that we exist */ |
| 876 | acpi_processor_notify_smm(THIS_MODULE); | 878 | acpi_processor_notify_smm(THIS_MODULE); |
| @@ -914,13 +916,13 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data, | |||
| 914 | "bad value %d.\n", i, index); | 916 | "bad value %d.\n", i, index); |
| 915 | printk(KERN_ERR PFX "Please report to BIOS " | 917 | printk(KERN_ERR PFX "Please report to BIOS " |
| 916 | "manufacturer\n"); | 918 | "manufacturer\n"); |
| 917 | invalidate_entry(data, i); | 919 | invalidate_entry(powernow_table, i); |
| 918 | continue; | 920 | continue; |
| 919 | } | 921 | } |
| 920 | rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); | 922 | rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); |
| 921 | if (!(hi & HW_PSTATE_VALID_MASK)) { | 923 | if (!(hi & HW_PSTATE_VALID_MASK)) { |
| 922 | dprintk("invalid pstate %d, ignoring\n", index); | 924 | dprintk("invalid pstate %d, ignoring\n", index); |
| 923 | invalidate_entry(data, i); | 925 | invalidate_entry(powernow_table, i); |
| 924 | continue; | 926 | continue; |
| 925 | } | 927 | } |
| 926 | 928 | ||
| @@ -941,7 +943,6 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, | |||
| 941 | struct cpufreq_frequency_table *powernow_table) | 943 | struct cpufreq_frequency_table *powernow_table) |
| 942 | { | 944 | { |
| 943 | int i; | 945 | int i; |
| 944 | int cntlofreq = 0; | ||
| 945 | 946 | ||
| 946 | for (i = 0; i < data->acpi_data.state_count; i++) { | 947 | for (i = 0; i < data->acpi_data.state_count; i++) { |
| 947 | u32 fid; | 948 | u32 fid; |
| @@ -970,7 +971,7 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, | |||
| 970 | /* verify frequency is OK */ | 971 | /* verify frequency is OK */ |
| 971 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { | 972 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
| 972 | dprintk("invalid freq %u kHz, ignoring\n", freq); | 973 | dprintk("invalid freq %u kHz, ignoring\n", freq); |
| 973 | invalidate_entry(data, i); | 974 | invalidate_entry(powernow_table, i); |
| 974 | continue; | 975 | continue; |
| 975 | } | 976 | } |
| 976 | 977 | ||
| @@ -978,38 +979,17 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, | |||
| 978 | * BIOSs are using "off" to indicate invalid */ | 979 | * BIOSs are using "off" to indicate invalid */ |
| 979 | if (vid == VID_OFF) { | 980 | if (vid == VID_OFF) { |
| 980 | dprintk("invalid vid %u, ignoring\n", vid); | 981 | dprintk("invalid vid %u, ignoring\n", vid); |
| 981 | invalidate_entry(data, i); | 982 | invalidate_entry(powernow_table, i); |
| 982 | continue; | 983 | continue; |
| 983 | } | 984 | } |
| 984 | 985 | ||
| 985 | /* verify only 1 entry from the lo frequency table */ | ||
| 986 | if (fid < HI_FID_TABLE_BOTTOM) { | ||
| 987 | if (cntlofreq) { | ||
| 988 | /* if both entries are the same, | ||
| 989 | * ignore this one ... */ | ||
| 990 | if ((freq != powernow_table[cntlofreq].frequency) || | ||
| 991 | (index != powernow_table[cntlofreq].index)) { | ||
| 992 | printk(KERN_ERR PFX | ||
| 993 | "Too many lo freq table " | ||
| 994 | "entries\n"); | ||
| 995 | return 1; | ||
| 996 | } | ||
| 997 | |||
| 998 | dprintk("double low frequency table entry, " | ||
| 999 | "ignoring it.\n"); | ||
| 1000 | invalidate_entry(data, i); | ||
| 1001 | continue; | ||
| 1002 | } else | ||
| 1003 | cntlofreq = i; | ||
| 1004 | } | ||
| 1005 | |||
| 1006 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { | 986 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
| 1007 | printk(KERN_INFO PFX "invalid freq entries " | 987 | printk(KERN_INFO PFX "invalid freq entries " |
| 1008 | "%u kHz vs. %u kHz\n", freq, | 988 | "%u kHz vs. %u kHz\n", freq, |
| 1009 | (unsigned int) | 989 | (unsigned int) |
| 1010 | (data->acpi_data.states[i].core_frequency | 990 | (data->acpi_data.states[i].core_frequency |
| 1011 | * 1000)); | 991 | * 1000)); |
| 1012 | invalidate_entry(data, i); | 992 | invalidate_entry(powernow_table, i); |
| 1013 | continue; | 993 | continue; |
| 1014 | } | 994 | } |
| 1015 | } | 995 | } |
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c index 93ba8eeb100a..08be922de33a 100644 --- a/arch/x86/kernel/cpu/hypervisor.c +++ b/arch/x86/kernel/cpu/hypervisor.c | |||
| @@ -34,13 +34,6 @@ detect_hypervisor_vendor(struct cpuinfo_x86 *c) | |||
| 34 | c->x86_hyper_vendor = X86_HYPER_VENDOR_NONE; | 34 | c->x86_hyper_vendor = X86_HYPER_VENDOR_NONE; |
| 35 | } | 35 | } |
| 36 | 36 | ||
| 37 | unsigned long get_hypervisor_tsc_freq(void) | ||
| 38 | { | ||
| 39 | if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE) | ||
| 40 | return vmware_get_tsc_khz(); | ||
| 41 | return 0; | ||
| 42 | } | ||
| 43 | |||
| 44 | static inline void __cpuinit | 37 | static inline void __cpuinit |
| 45 | hypervisor_set_feature_bits(struct cpuinfo_x86 *c) | 38 | hypervisor_set_feature_bits(struct cpuinfo_x86 *c) |
| 46 | { | 39 | { |
| @@ -55,3 +48,10 @@ void __cpuinit init_hypervisor(struct cpuinfo_x86 *c) | |||
| 55 | detect_hypervisor_vendor(c); | 48 | detect_hypervisor_vendor(c); |
| 56 | hypervisor_set_feature_bits(c); | 49 | hypervisor_set_feature_bits(c); |
| 57 | } | 50 | } |
| 51 | |||
| 52 | void __init init_hypervisor_platform(void) | ||
| 53 | { | ||
| 54 | init_hypervisor(&boot_cpu_data); | ||
| 55 | if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE) | ||
| 56 | vmware_platform_setup(); | ||
| 57 | } | ||
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index bc24f514ec93..0a46b4df5d80 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include <linux/dmi.h> | 24 | #include <linux/dmi.h> |
| 25 | #include <asm/div64.h> | 25 | #include <asm/div64.h> |
| 26 | #include <asm/vmware.h> | 26 | #include <asm/vmware.h> |
| 27 | #include <asm/x86_init.h> | ||
| 27 | 28 | ||
| 28 | #define CPUID_VMWARE_INFO_LEAF 0x40000000 | 29 | #define CPUID_VMWARE_INFO_LEAF 0x40000000 |
| 29 | #define VMWARE_HYPERVISOR_MAGIC 0x564D5868 | 30 | #define VMWARE_HYPERVISOR_MAGIC 0x564D5868 |
| @@ -47,21 +48,29 @@ static inline int __vmware_platform(void) | |||
| 47 | return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC; | 48 | return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC; |
| 48 | } | 49 | } |
| 49 | 50 | ||
| 50 | static unsigned long __vmware_get_tsc_khz(void) | 51 | static unsigned long vmware_get_tsc_khz(void) |
| 51 | { | 52 | { |
| 52 | uint64_t tsc_hz; | 53 | uint64_t tsc_hz; |
| 53 | uint32_t eax, ebx, ecx, edx; | 54 | uint32_t eax, ebx, ecx, edx; |
| 54 | 55 | ||
| 55 | VMWARE_PORT(GETHZ, eax, ebx, ecx, edx); | 56 | VMWARE_PORT(GETHZ, eax, ebx, ecx, edx); |
| 56 | 57 | ||
| 57 | if (ebx == UINT_MAX) | ||
| 58 | return 0; | ||
| 59 | tsc_hz = eax | (((uint64_t)ebx) << 32); | 58 | tsc_hz = eax | (((uint64_t)ebx) << 32); |
| 60 | do_div(tsc_hz, 1000); | 59 | do_div(tsc_hz, 1000); |
| 61 | BUG_ON(tsc_hz >> 32); | 60 | BUG_ON(tsc_hz >> 32); |
| 62 | return tsc_hz; | 61 | return tsc_hz; |
| 63 | } | 62 | } |
| 64 | 63 | ||
| 64 | void __init vmware_platform_setup(void) | ||
| 65 | { | ||
| 66 | uint32_t eax, ebx, ecx, edx; | ||
| 67 | |||
| 68 | VMWARE_PORT(GETHZ, eax, ebx, ecx, edx); | ||
| 69 | |||
| 70 | if (ebx != UINT_MAX) | ||
| 71 | x86_platform.calibrate_tsc = vmware_get_tsc_khz; | ||
| 72 | } | ||
| 73 | |||
| 65 | /* | 74 | /* |
| 66 | * While checking the dmi string infomation, just checking the product | 75 | * While checking the dmi string infomation, just checking the product |
| 67 | * serial key should be enough, as this will always have a VMware | 76 | * serial key should be enough, as this will always have a VMware |
| @@ -87,12 +96,6 @@ int vmware_platform(void) | |||
| 87 | return 0; | 96 | return 0; |
| 88 | } | 97 | } |
| 89 | 98 | ||
| 90 | unsigned long vmware_get_tsc_khz(void) | ||
| 91 | { | ||
| 92 | BUG_ON(!vmware_platform()); | ||
| 93 | return __vmware_get_tsc_khz(); | ||
| 94 | } | ||
| 95 | |||
| 96 | /* | 99 | /* |
| 97 | * VMware hypervisor takes care of exporting a reliable TSC to the guest. | 100 | * VMware hypervisor takes care of exporting a reliable TSC to the guest. |
| 98 | * Still, due to timing difference when running on virtual cpus, the TSC can | 101 | * Still, due to timing difference when running on virtual cpus, the TSC can |
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index b07af8861244..6a52d4b36a30 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c | |||
| @@ -182,7 +182,7 @@ static struct notifier_block __refdata cpuid_class_cpu_notifier = | |||
| 182 | .notifier_call = cpuid_class_cpu_callback, | 182 | .notifier_call = cpuid_class_cpu_callback, |
| 183 | }; | 183 | }; |
| 184 | 184 | ||
| 185 | static char *cpuid_nodename(struct device *dev) | 185 | static char *cpuid_devnode(struct device *dev, mode_t *mode) |
| 186 | { | 186 | { |
| 187 | return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt)); | 187 | return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt)); |
| 188 | } | 188 | } |
| @@ -203,7 +203,7 @@ static int __init cpuid_init(void) | |||
| 203 | err = PTR_ERR(cpuid_class); | 203 | err = PTR_ERR(cpuid_class); |
| 204 | goto out_chrdev; | 204 | goto out_chrdev; |
| 205 | } | 205 | } |
| 206 | cpuid_class->nodename = cpuid_nodename; | 206 | cpuid_class->devnode = cpuid_devnode; |
| 207 | for_each_online_cpu(i) { | 207 | for_each_online_cpu(i) { |
| 208 | err = cpuid_device_create(i); | 208 | err = cpuid_device_create(i); |
| 209 | if (err != 0) | 209 | if (err != 0) |
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index 147005a1cc3c..a3210ce1eccd 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c | |||
| @@ -1455,28 +1455,11 @@ char *__init default_machine_specific_memory_setup(void) | |||
| 1455 | return who; | 1455 | return who; |
| 1456 | } | 1456 | } |
| 1457 | 1457 | ||
| 1458 | char *__init __attribute__((weak)) machine_specific_memory_setup(void) | ||
| 1459 | { | ||
| 1460 | if (x86_quirks->arch_memory_setup) { | ||
| 1461 | char *who = x86_quirks->arch_memory_setup(); | ||
| 1462 | |||
| 1463 | if (who) | ||
| 1464 | return who; | ||
| 1465 | } | ||
| 1466 | return default_machine_specific_memory_setup(); | ||
| 1467 | } | ||
| 1468 | |||
| 1469 | /* Overridden in paravirt.c if CONFIG_PARAVIRT */ | ||
| 1470 | char * __init __attribute__((weak)) memory_setup(void) | ||
| 1471 | { | ||
| 1472 | return machine_specific_memory_setup(); | ||
| 1473 | } | ||
| 1474 | |||
| 1475 | void __init setup_memory_map(void) | 1458 | void __init setup_memory_map(void) |
| 1476 | { | 1459 | { |
| 1477 | char *who; | 1460 | char *who; |
| 1478 | 1461 | ||
| 1479 | who = memory_setup(); | 1462 | who = x86_init.resources.memory_setup(); |
| 1480 | memcpy(&e820_saved, &e820, sizeof(struct e820map)); | 1463 | memcpy(&e820_saved, &e820, sizeof(struct e820map)); |
| 1481 | printk(KERN_INFO "BIOS-provided physical RAM map:\n"); | 1464 | printk(KERN_INFO "BIOS-provided physical RAM map:\n"); |
| 1482 | e820_print_map(who); | 1465 | e820_print_map(who); |
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c index fe26ba3e3451..ad5bd988fb79 100644 --- a/arch/x86/kernel/efi.c +++ b/arch/x86/kernel/efi.c | |||
| @@ -42,6 +42,7 @@ | |||
| 42 | #include <asm/time.h> | 42 | #include <asm/time.h> |
| 43 | #include <asm/cacheflush.h> | 43 | #include <asm/cacheflush.h> |
| 44 | #include <asm/tlbflush.h> | 44 | #include <asm/tlbflush.h> |
| 45 | #include <asm/x86_init.h> | ||
| 45 | 46 | ||
| 46 | #define EFI_DEBUG 1 | 47 | #define EFI_DEBUG 1 |
| 47 | #define PFX "EFI: " | 48 | #define PFX "EFI: " |
| @@ -453,6 +454,9 @@ void __init efi_init(void) | |||
| 453 | if (add_efi_memmap) | 454 | if (add_efi_memmap) |
| 454 | do_add_efi_memmap(); | 455 | do_add_efi_memmap(); |
| 455 | 456 | ||
| 457 | x86_platform.get_wallclock = efi_get_time; | ||
| 458 | x86_platform.set_wallclock = efi_set_rtc_mmss; | ||
| 459 | |||
| 456 | /* Setup for EFI runtime service */ | 460 | /* Setup for EFI runtime service */ |
| 457 | reboot_type = BOOT_EFI; | 461 | reboot_type = BOOT_EFI; |
| 458 | 462 | ||
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c index 3f8579f8d42c..4f8e2507e8f3 100644 --- a/arch/x86/kernel/head32.c +++ b/arch/x86/kernel/head32.c | |||
| @@ -11,8 +11,21 @@ | |||
| 11 | #include <asm/setup.h> | 11 | #include <asm/setup.h> |
| 12 | #include <asm/sections.h> | 12 | #include <asm/sections.h> |
| 13 | #include <asm/e820.h> | 13 | #include <asm/e820.h> |
| 14 | #include <asm/bios_ebda.h> | 14 | #include <asm/page.h> |
| 15 | #include <asm/trampoline.h> | 15 | #include <asm/trampoline.h> |
| 16 | #include <asm/apic.h> | ||
| 17 | #include <asm/io_apic.h> | ||
| 18 | #include <asm/bios_ebda.h> | ||
| 19 | |||
| 20 | static void __init i386_default_early_setup(void) | ||
| 21 | { | ||
| 22 | /* Initilize 32bit specific setup functions */ | ||
| 23 | x86_init.resources.probe_roms = probe_roms; | ||
| 24 | x86_init.resources.reserve_resources = i386_reserve_resources; | ||
| 25 | x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc; | ||
| 26 | |||
| 27 | reserve_ebda_region(); | ||
| 28 | } | ||
| 16 | 29 | ||
| 17 | void __init i386_start_kernel(void) | 30 | void __init i386_start_kernel(void) |
| 18 | { | 31 | { |
| @@ -29,7 +42,16 @@ void __init i386_start_kernel(void) | |||
| 29 | reserve_early(ramdisk_image, ramdisk_end, "RAMDISK"); | 42 | reserve_early(ramdisk_image, ramdisk_end, "RAMDISK"); |
| 30 | } | 43 | } |
| 31 | #endif | 44 | #endif |
| 32 | reserve_ebda_region(); | 45 | |
| 46 | /* Call the subarch specific early setup function */ | ||
| 47 | switch (boot_params.hdr.hardware_subarch) { | ||
| 48 | case X86_SUBARCH_MRST: | ||
| 49 | x86_mrst_early_setup(); | ||
| 50 | break; | ||
| 51 | default: | ||
| 52 | i386_default_early_setup(); | ||
| 53 | break; | ||
| 54 | } | ||
| 33 | 55 | ||
| 34 | /* | 56 | /* |
| 35 | * At this point everything still needed from the boot loader | 57 | * At this point everything still needed from the boot loader |
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 70eaa852c732..0b06cd778fd9 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c | |||
| @@ -23,8 +23,8 @@ | |||
| 23 | #include <asm/sections.h> | 23 | #include <asm/sections.h> |
| 24 | #include <asm/kdebug.h> | 24 | #include <asm/kdebug.h> |
| 25 | #include <asm/e820.h> | 25 | #include <asm/e820.h> |
| 26 | #include <asm/bios_ebda.h> | ||
| 27 | #include <asm/trampoline.h> | 26 | #include <asm/trampoline.h> |
| 27 | #include <asm/bios_ebda.h> | ||
| 28 | 28 | ||
| 29 | static void __init zap_identity_mappings(void) | 29 | static void __init zap_identity_mappings(void) |
| 30 | { | 30 | { |
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S index 7ffec6b3b331..b766e8c7252d 100644 --- a/arch/x86/kernel/head_32.S +++ b/arch/x86/kernel/head_32.S | |||
| @@ -157,6 +157,7 @@ subarch_entries: | |||
| 157 | .long default_entry /* normal x86/PC */ | 157 | .long default_entry /* normal x86/PC */ |
| 158 | .long lguest_entry /* lguest hypervisor */ | 158 | .long lguest_entry /* lguest hypervisor */ |
| 159 | .long xen_entry /* Xen hypervisor */ | 159 | .long xen_entry /* Xen hypervisor */ |
| 160 | .long default_entry /* Moorestown MID */ | ||
| 160 | num_subarch_entries = (. - subarch_entries) / 4 | 161 | num_subarch_entries = (. - subarch_entries) / 4 |
| 161 | .previous | 162 | .previous |
| 162 | #endif /* CONFIG_PARAVIRT */ | 163 | #endif /* CONFIG_PARAVIRT */ |
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c index 5cf36c053ac4..23c167925a5c 100644 --- a/arch/x86/kernel/i8253.c +++ b/arch/x86/kernel/i8253.c | |||
| @@ -19,12 +19,6 @@ | |||
| 19 | DEFINE_SPINLOCK(i8253_lock); | 19 | DEFINE_SPINLOCK(i8253_lock); |
| 20 | EXPORT_SYMBOL(i8253_lock); | 20 | EXPORT_SYMBOL(i8253_lock); |
| 21 | 21 | ||
| 22 | #ifdef CONFIG_X86_32 | ||
| 23 | static void pit_disable_clocksource(void); | ||
| 24 | #else | ||
| 25 | static inline void pit_disable_clocksource(void) { } | ||
| 26 | #endif | ||
| 27 | |||
| 28 | /* | 22 | /* |
| 29 | * HPET replaces the PIT, when enabled. So we need to know, which of | 23 | * HPET replaces the PIT, when enabled. So we need to know, which of |
| 30 | * the two timers is used | 24 | * the two timers is used |
| @@ -57,12 +51,10 @@ static void init_pit_timer(enum clock_event_mode mode, | |||
| 57 | outb_pit(0, PIT_CH0); | 51 | outb_pit(0, PIT_CH0); |
| 58 | outb_pit(0, PIT_CH0); | 52 | outb_pit(0, PIT_CH0); |
| 59 | } | 53 | } |
| 60 | pit_disable_clocksource(); | ||
| 61 | break; | 54 | break; |
| 62 | 55 | ||
| 63 | case CLOCK_EVT_MODE_ONESHOT: | 56 | case CLOCK_EVT_MODE_ONESHOT: |
| 64 | /* One shot setup */ | 57 | /* One shot setup */ |
| 65 | pit_disable_clocksource(); | ||
| 66 | outb_pit(0x38, PIT_MODE); | 58 | outb_pit(0x38, PIT_MODE); |
| 67 | break; | 59 | break; |
| 68 | 60 | ||
| @@ -200,17 +192,6 @@ static struct clocksource pit_cs = { | |||
| 200 | .shift = 20, | 192 | .shift = 20, |
| 201 | }; | 193 | }; |
| 202 | 194 | ||
| 203 | static void pit_disable_clocksource(void) | ||
| 204 | { | ||
| 205 | /* | ||
| 206 | * Use mult to check whether it is registered or not | ||
| 207 | */ | ||
| 208 | if (pit_cs.mult) { | ||
| 209 | clocksource_unregister(&pit_cs); | ||
| 210 | pit_cs.mult = 0; | ||
| 211 | } | ||
| 212 | } | ||
| 213 | |||
| 214 | static int __init init_pit_clocksource(void) | 195 | static int __init init_pit_clocksource(void) |
| 215 | { | 196 | { |
| 216 | /* | 197 | /* |
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c index ccf8ab54f31a..300883112e3d 100644 --- a/arch/x86/kernel/irqinit.c +++ b/arch/x86/kernel/irqinit.c | |||
| @@ -116,7 +116,7 @@ int vector_used_by_percpu_irq(unsigned int vector) | |||
| 116 | return 0; | 116 | return 0; |
| 117 | } | 117 | } |
| 118 | 118 | ||
| 119 | static void __init init_ISA_irqs(void) | 119 | void __init init_ISA_irqs(void) |
| 120 | { | 120 | { |
| 121 | int i; | 121 | int i; |
| 122 | 122 | ||
| @@ -140,8 +140,10 @@ static void __init init_ISA_irqs(void) | |||
| 140 | } | 140 | } |
| 141 | } | 141 | } |
| 142 | 142 | ||
| 143 | /* Overridden in paravirt.c */ | 143 | void __init init_IRQ(void) |
| 144 | void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); | 144 | { |
| 145 | x86_init.irqs.intr_init(); | ||
| 146 | } | ||
| 145 | 147 | ||
| 146 | static void __init smp_intr_init(void) | 148 | static void __init smp_intr_init(void) |
| 147 | { | 149 | { |
| @@ -213,32 +215,12 @@ static void __init apic_intr_init(void) | |||
| 213 | #endif | 215 | #endif |
| 214 | } | 216 | } |
| 215 | 217 | ||
| 216 | /** | ||
| 217 | * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors | ||
| 218 | * | ||
| 219 | * Description: | ||
| 220 | * Perform any necessary interrupt initialisation prior to setting up | ||
| 221 | * the "ordinary" interrupt call gates. For legacy reasons, the ISA | ||
| 222 | * interrupts should be initialised here if the machine emulates a PC | ||
| 223 | * in any way. | ||
| 224 | **/ | ||
| 225 | static void __init x86_quirk_pre_intr_init(void) | ||
| 226 | { | ||
| 227 | #ifdef CONFIG_X86_32 | ||
| 228 | if (x86_quirks->arch_pre_intr_init) { | ||
| 229 | if (x86_quirks->arch_pre_intr_init()) | ||
| 230 | return; | ||
| 231 | } | ||
| 232 | #endif | ||
| 233 | init_ISA_irqs(); | ||
| 234 | } | ||
| 235 | |||
| 236 | void __init native_init_IRQ(void) | 218 | void __init native_init_IRQ(void) |
| 237 | { | 219 | { |
| 238 | int i; | 220 | int i; |
| 239 | 221 | ||
| 240 | /* Execute any quirks before the call gates are initialised: */ | 222 | /* Execute any quirks before the call gates are initialised: */ |
| 241 | x86_quirk_pre_intr_init(); | 223 | x86_init.irqs.pre_vector_init(); |
| 242 | 224 | ||
| 243 | apic_intr_init(); | 225 | apic_intr_init(); |
| 244 | 226 | ||
| @@ -258,12 +240,6 @@ void __init native_init_IRQ(void) | |||
| 258 | 240 | ||
| 259 | #ifdef CONFIG_X86_32 | 241 | #ifdef CONFIG_X86_32 |
| 260 | /* | 242 | /* |
| 261 | * Call quirks after call gates are initialised (usually add in | ||
| 262 | * the architecture specific gates): | ||
| 263 | */ | ||
| 264 | x86_quirk_intr_init(); | ||
| 265 | |||
| 266 | /* | ||
| 267 | * External FPU? Set up irq13 if so, for | 243 | * External FPU? Set up irq13 if so, for |
| 268 | * original braindamaged IBM FERR coupling. | 244 | * original braindamaged IBM FERR coupling. |
| 269 | */ | 245 | */ |
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index e5efcdcca31b..feaeb0d3aa4f 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | #include <asm/msr.h> | 22 | #include <asm/msr.h> |
| 23 | #include <asm/apic.h> | 23 | #include <asm/apic.h> |
| 24 | #include <linux/percpu.h> | 24 | #include <linux/percpu.h> |
| 25 | |||
| 26 | #include <asm/x86_init.h> | ||
| 25 | #include <asm/reboot.h> | 27 | #include <asm/reboot.h> |
| 26 | 28 | ||
| 27 | #define KVM_SCALE 22 | 29 | #define KVM_SCALE 22 |
| @@ -182,12 +184,13 @@ void __init kvmclock_init(void) | |||
| 182 | if (kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE)) { | 184 | if (kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE)) { |
| 183 | if (kvm_register_clock("boot clock")) | 185 | if (kvm_register_clock("boot clock")) |
| 184 | return; | 186 | return; |
| 185 | pv_time_ops.get_wallclock = kvm_get_wallclock; | ||
| 186 | pv_time_ops.set_wallclock = kvm_set_wallclock; | ||
| 187 | pv_time_ops.sched_clock = kvm_clock_read; | 187 | pv_time_ops.sched_clock = kvm_clock_read; |
| 188 | pv_time_ops.get_tsc_khz = kvm_get_tsc_khz; | 188 | x86_platform.calibrate_tsc = kvm_get_tsc_khz; |
| 189 | x86_platform.get_wallclock = kvm_get_wallclock; | ||
| 190 | x86_platform.set_wallclock = kvm_set_wallclock; | ||
| 189 | #ifdef CONFIG_X86_LOCAL_APIC | 191 | #ifdef CONFIG_X86_LOCAL_APIC |
| 190 | pv_apic_ops.setup_secondary_clock = kvm_setup_secondary_clock; | 192 | x86_cpuinit.setup_percpu_clockev = |
| 193 | kvm_setup_secondary_clock; | ||
| 191 | #endif | 194 | #endif |
| 192 | #ifdef CONFIG_SMP | 195 | #ifdef CONFIG_SMP |
| 193 | smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu; | 196 | smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu; |
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c index 9371448290ac..0db7969b0dde 100644 --- a/arch/x86/kernel/microcode_core.c +++ b/arch/x86/kernel/microcode_core.c | |||
| @@ -236,7 +236,7 @@ static const struct file_operations microcode_fops = { | |||
| 236 | static struct miscdevice microcode_dev = { | 236 | static struct miscdevice microcode_dev = { |
| 237 | .minor = MICROCODE_MINOR, | 237 | .minor = MICROCODE_MINOR, |
| 238 | .name = "microcode", | 238 | .name = "microcode", |
| 239 | .devnode = "cpu/microcode", | 239 | .nodename = "cpu/microcode", |
| 240 | .fops = µcode_fops, | 240 | .fops = µcode_fops, |
| 241 | }; | 241 | }; |
| 242 | 242 | ||
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index fcd513bf2846..5be95ef4ffec 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c | |||
| @@ -45,6 +45,11 @@ static int __init mpf_checksum(unsigned char *mp, int len) | |||
| 45 | return sum & 0xFF; | 45 | return sum & 0xFF; |
| 46 | } | 46 | } |
| 47 | 47 | ||
| 48 | int __init default_mpc_apic_id(struct mpc_cpu *m) | ||
| 49 | { | ||
| 50 | return m->apicid; | ||
| 51 | } | ||
| 52 | |||
| 48 | static void __init MP_processor_info(struct mpc_cpu *m) | 53 | static void __init MP_processor_info(struct mpc_cpu *m) |
| 49 | { | 54 | { |
| 50 | int apicid; | 55 | int apicid; |
| @@ -55,10 +60,7 @@ static void __init MP_processor_info(struct mpc_cpu *m) | |||
| 55 | return; | 60 | return; |
| 56 | } | 61 | } |
| 57 | 62 | ||
| 58 | if (x86_quirks->mpc_apic_id) | 63 | apicid = x86_init.mpparse.mpc_apic_id(m); |
| 59 | apicid = x86_quirks->mpc_apic_id(m); | ||
| 60 | else | ||
| 61 | apicid = m->apicid; | ||
| 62 | 64 | ||
| 63 | if (m->cpuflag & CPU_BOOTPROCESSOR) { | 65 | if (m->cpuflag & CPU_BOOTPROCESSOR) { |
| 64 | bootup_cpu = " (Bootup-CPU)"; | 66 | bootup_cpu = " (Bootup-CPU)"; |
| @@ -70,16 +72,18 @@ static void __init MP_processor_info(struct mpc_cpu *m) | |||
| 70 | } | 72 | } |
| 71 | 73 | ||
| 72 | #ifdef CONFIG_X86_IO_APIC | 74 | #ifdef CONFIG_X86_IO_APIC |
| 73 | static void __init MP_bus_info(struct mpc_bus *m) | 75 | void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str) |
| 74 | { | 76 | { |
| 75 | char str[7]; | ||
| 76 | memcpy(str, m->bustype, 6); | 77 | memcpy(str, m->bustype, 6); |
| 77 | str[6] = 0; | 78 | str[6] = 0; |
| 79 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); | ||
| 80 | } | ||
| 78 | 81 | ||
| 79 | if (x86_quirks->mpc_oem_bus_info) | 82 | static void __init MP_bus_info(struct mpc_bus *m) |
| 80 | x86_quirks->mpc_oem_bus_info(m, str); | 83 | { |
| 81 | else | 84 | char str[7]; |
| 82 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); | 85 | |
| 86 | x86_init.mpparse.mpc_oem_bus_info(m, str); | ||
| 83 | 87 | ||
| 84 | #if MAX_MP_BUSSES < 256 | 88 | #if MAX_MP_BUSSES < 256 |
| 85 | if (m->busid >= MAX_MP_BUSSES) { | 89 | if (m->busid >= MAX_MP_BUSSES) { |
| @@ -96,8 +100,8 @@ static void __init MP_bus_info(struct mpc_bus *m) | |||
| 96 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; | 100 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; |
| 97 | #endif | 101 | #endif |
| 98 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | 102 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { |
| 99 | if (x86_quirks->mpc_oem_pci_bus) | 103 | if (x86_init.mpparse.mpc_oem_pci_bus) |
| 100 | x86_quirks->mpc_oem_pci_bus(m); | 104 | x86_init.mpparse.mpc_oem_pci_bus(m); |
| 101 | 105 | ||
| 102 | clear_bit(m->busid, mp_bus_not_pci); | 106 | clear_bit(m->busid, mp_bus_not_pci); |
| 103 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) | 107 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
| @@ -291,6 +295,8 @@ static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) | |||
| 291 | 1, mpc, mpc->length, 1); | 295 | 1, mpc, mpc->length, 1); |
| 292 | } | 296 | } |
| 293 | 297 | ||
| 298 | void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } | ||
| 299 | |||
| 294 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | 300 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
| 295 | { | 301 | { |
| 296 | char str[16]; | 302 | char str[16]; |
| @@ -312,16 +318,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | |||
| 312 | if (early) | 318 | if (early) |
| 313 | return 1; | 319 | return 1; |
| 314 | 320 | ||
| 315 | if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) { | 321 | if (mpc->oemptr) |
| 316 | struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr; | 322 | x86_init.mpparse.smp_read_mpc_oem(mpc); |
| 317 | x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize); | ||
| 318 | } | ||
| 319 | 323 | ||
| 320 | /* | 324 | /* |
| 321 | * Now process the configuration blocks. | 325 | * Now process the configuration blocks. |
| 322 | */ | 326 | */ |
| 323 | if (x86_quirks->mpc_record) | 327 | x86_init.mpparse.mpc_record(0); |
| 324 | *x86_quirks->mpc_record = 0; | ||
| 325 | 328 | ||
| 326 | while (count < mpc->length) { | 329 | while (count < mpc->length) { |
| 327 | switch (*mpt) { | 330 | switch (*mpt) { |
| @@ -353,8 +356,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | |||
| 353 | count = mpc->length; | 356 | count = mpc->length; |
| 354 | break; | 357 | break; |
| 355 | } | 358 | } |
| 356 | if (x86_quirks->mpc_record) | 359 | x86_init.mpparse.mpc_record(1); |
| 357 | (*x86_quirks->mpc_record)++; | ||
| 358 | } | 360 | } |
| 359 | 361 | ||
| 360 | #ifdef CONFIG_X86_BIGSMP | 362 | #ifdef CONFIG_X86_BIGSMP |
| @@ -608,7 +610,7 @@ static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) | |||
| 608 | /* | 610 | /* |
| 609 | * Scan the memory blocks for an SMP configuration block. | 611 | * Scan the memory blocks for an SMP configuration block. |
| 610 | */ | 612 | */ |
| 611 | static void __init __get_smp_config(unsigned int early) | 613 | void __init default_get_smp_config(unsigned int early) |
| 612 | { | 614 | { |
| 613 | struct mpf_intel *mpf = mpf_found; | 615 | struct mpf_intel *mpf = mpf_found; |
| 614 | 616 | ||
| @@ -625,11 +627,6 @@ static void __init __get_smp_config(unsigned int early) | |||
| 625 | if (acpi_lapic && acpi_ioapic) | 627 | if (acpi_lapic && acpi_ioapic) |
| 626 | return; | 628 | return; |
| 627 | 629 | ||
| 628 | if (x86_quirks->mach_get_smp_config) { | ||
| 629 | if (x86_quirks->mach_get_smp_config(early)) | ||
| 630 | return; | ||
| 631 | } | ||
| 632 | |||
| 633 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", | 630 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
| 634 | mpf->specification); | 631 | mpf->specification); |
| 635 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) | 632 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
| @@ -670,16 +667,6 @@ static void __init __get_smp_config(unsigned int early) | |||
| 670 | */ | 667 | */ |
| 671 | } | 668 | } |
| 672 | 669 | ||
| 673 | void __init early_get_smp_config(void) | ||
| 674 | { | ||
| 675 | __get_smp_config(1); | ||
| 676 | } | ||
| 677 | |||
| 678 | void __init get_smp_config(void) | ||
| 679 | { | ||
| 680 | __get_smp_config(0); | ||
| 681 | } | ||
| 682 | |||
| 683 | static void __init smp_reserve_bootmem(struct mpf_intel *mpf) | 670 | static void __init smp_reserve_bootmem(struct mpf_intel *mpf) |
| 684 | { | 671 | { |
| 685 | unsigned long size = get_mpc_size(mpf->physptr); | 672 | unsigned long size = get_mpc_size(mpf->physptr); |
| @@ -745,14 +732,10 @@ static int __init smp_scan_config(unsigned long base, unsigned long length, | |||
| 745 | return 0; | 732 | return 0; |
| 746 | } | 733 | } |
| 747 | 734 | ||
| 748 | static void __init __find_smp_config(unsigned int reserve) | 735 | void __init default_find_smp_config(unsigned int reserve) |
| 749 | { | 736 | { |
| 750 | unsigned int address; | 737 | unsigned int address; |
| 751 | 738 | ||
| 752 | if (x86_quirks->mach_find_smp_config) { | ||
| 753 | if (x86_quirks->mach_find_smp_config(reserve)) | ||
| 754 | return; | ||
| 755 | } | ||
| 756 | /* | 739 | /* |
| 757 | * FIXME: Linux assumes you have 640K of base ram.. | 740 | * FIXME: Linux assumes you have 640K of base ram.. |
| 758 | * this continues the error... | 741 | * this continues the error... |
| @@ -787,16 +770,6 @@ static void __init __find_smp_config(unsigned int reserve) | |||
| 787 | smp_scan_config(address, 0x400, reserve); | 770 | smp_scan_config(address, 0x400, reserve); |
| 788 | } | 771 | } |
| 789 | 772 | ||
| 790 | void __init early_find_smp_config(void) | ||
| 791 | { | ||
| 792 | __find_smp_config(0); | ||
| 793 | } | ||
| 794 | |||
| 795 | void __init find_smp_config(void) | ||
| 796 | { | ||
| 797 | __find_smp_config(1); | ||
| 798 | } | ||
| 799 | |||
| 800 | #ifdef CONFIG_X86_IO_APIC | 773 | #ifdef CONFIG_X86_IO_APIC |
| 801 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; | 774 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; |
| 802 | 775 | ||
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c new file mode 100644 index 000000000000..3b7078abc871 --- /dev/null +++ b/arch/x86/kernel/mrst.c | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | /* | ||
| 2 | * mrst.c: Intel Moorestown platform specific setup code | ||
| 3 | * | ||
| 4 | * (C) Copyright 2008 Intel Corporation | ||
| 5 | * Author: Jacob Pan (jacob.jun.pan@intel.com) | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or | ||
| 8 | * modify it under the terms of the GNU General Public License | ||
| 9 | * as published by the Free Software Foundation; version 2 | ||
| 10 | * of the License. | ||
| 11 | */ | ||
| 12 | #include <linux/init.h> | ||
| 13 | |||
| 14 | #include <asm/setup.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * Moorestown specific x86_init function overrides and early setup | ||
| 18 | * calls. | ||
| 19 | */ | ||
| 20 | void __init x86_mrst_early_setup(void) | ||
| 21 | { | ||
| 22 | x86_init.resources.probe_roms = x86_init_noop; | ||
| 23 | x86_init.resources.reserve_resources = x86_init_noop; | ||
| 24 | } | ||
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c index 7dd950094178..6a3cefc7dda1 100644 --- a/arch/x86/kernel/msr.c +++ b/arch/x86/kernel/msr.c | |||
| @@ -241,7 +241,7 @@ static struct notifier_block __refdata msr_class_cpu_notifier = { | |||
| 241 | .notifier_call = msr_class_cpu_callback, | 241 | .notifier_call = msr_class_cpu_callback, |
| 242 | }; | 242 | }; |
| 243 | 243 | ||
| 244 | static char *msr_nodename(struct device *dev) | 244 | static char *msr_devnode(struct device *dev, mode_t *mode) |
| 245 | { | 245 | { |
| 246 | return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt)); | 246 | return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt)); |
| 247 | } | 247 | } |
| @@ -262,7 +262,7 @@ static int __init msr_init(void) | |||
| 262 | err = PTR_ERR(msr_class); | 262 | err = PTR_ERR(msr_class); |
| 263 | goto out_chrdev; | 263 | goto out_chrdev; |
| 264 | } | 264 | } |
| 265 | msr_class->nodename = msr_nodename; | 265 | msr_class->devnode = msr_devnode; |
| 266 | for_each_online_cpu(i) { | 266 | for_each_online_cpu(i) { |
| 267 | err = msr_device_create(i); | 267 | err = msr_device_create(i); |
| 268 | if (err != 0) | 268 | if (err != 0) |
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index f5b0b4a01fb2..1b1739d16310 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c | |||
| @@ -54,17 +54,12 @@ u64 _paravirt_ident_64(u64 x) | |||
| 54 | return x; | 54 | return x; |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | static void __init default_banner(void) | 57 | void __init default_banner(void) |
| 58 | { | 58 | { |
| 59 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", | 59 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
| 60 | pv_info.name); | 60 | pv_info.name); |
| 61 | } | 61 | } |
| 62 | 62 | ||
| 63 | char *memory_setup(void) | ||
| 64 | { | ||
| 65 | return pv_init_ops.memory_setup(); | ||
| 66 | } | ||
| 67 | |||
| 68 | /* Simple instruction patching code. */ | 63 | /* Simple instruction patching code. */ |
| 69 | #define DEF_NATIVE(ops, name, code) \ | 64 | #define DEF_NATIVE(ops, name, code) \ |
| 70 | extern const char start_##ops##_##name[], end_##ops##_##name[]; \ | 65 | extern const char start_##ops##_##name[], end_##ops##_##name[]; \ |
| @@ -188,11 +183,6 @@ unsigned paravirt_patch_insns(void *insnbuf, unsigned len, | |||
| 188 | return insn_len; | 183 | return insn_len; |
| 189 | } | 184 | } |
| 190 | 185 | ||
| 191 | void init_IRQ(void) | ||
| 192 | { | ||
| 193 | pv_irq_ops.init_IRQ(); | ||
| 194 | } | ||
| 195 | |||
| 196 | static void native_flush_tlb(void) | 186 | static void native_flush_tlb(void) |
| 197 | { | 187 | { |
| 198 | __native_flush_tlb(); | 188 | __native_flush_tlb(); |
| @@ -218,13 +208,6 @@ extern void native_irq_enable_sysexit(void); | |||
| 218 | extern void native_usergs_sysret32(void); | 208 | extern void native_usergs_sysret32(void); |
| 219 | extern void native_usergs_sysret64(void); | 209 | extern void native_usergs_sysret64(void); |
| 220 | 210 | ||
| 221 | static int __init print_banner(void) | ||
| 222 | { | ||
| 223 | pv_init_ops.banner(); | ||
| 224 | return 0; | ||
| 225 | } | ||
| 226 | core_initcall(print_banner); | ||
| 227 | |||
| 228 | static struct resource reserve_ioports = { | 211 | static struct resource reserve_ioports = { |
| 229 | .start = 0, | 212 | .start = 0, |
| 230 | .end = IO_SPACE_LIMIT, | 213 | .end = IO_SPACE_LIMIT, |
| @@ -320,21 +303,13 @@ struct pv_info pv_info = { | |||
| 320 | 303 | ||
| 321 | struct pv_init_ops pv_init_ops = { | 304 | struct pv_init_ops pv_init_ops = { |
| 322 | .patch = native_patch, | 305 | .patch = native_patch, |
| 323 | .banner = default_banner, | ||
| 324 | .arch_setup = paravirt_nop, | ||
| 325 | .memory_setup = machine_specific_memory_setup, | ||
| 326 | }; | 306 | }; |
| 327 | 307 | ||
| 328 | struct pv_time_ops pv_time_ops = { | 308 | struct pv_time_ops pv_time_ops = { |
| 329 | .time_init = hpet_time_init, | ||
| 330 | .get_wallclock = native_get_wallclock, | ||
| 331 | .set_wallclock = native_set_wallclock, | ||
| 332 | .sched_clock = native_sched_clock, | 309 | .sched_clock = native_sched_clock, |
| 333 | .get_tsc_khz = native_calibrate_tsc, | ||
| 334 | }; | 310 | }; |
| 335 | 311 | ||
| 336 | struct pv_irq_ops pv_irq_ops = { | 312 | struct pv_irq_ops pv_irq_ops = { |
| 337 | .init_IRQ = native_init_IRQ, | ||
| 338 | .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl), | 313 | .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl), |
| 339 | .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl), | 314 | .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl), |
| 340 | .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable), | 315 | .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable), |
| @@ -409,8 +384,6 @@ struct pv_cpu_ops pv_cpu_ops = { | |||
| 409 | 384 | ||
| 410 | struct pv_apic_ops pv_apic_ops = { | 385 | struct pv_apic_ops pv_apic_ops = { |
| 411 | #ifdef CONFIG_X86_LOCAL_APIC | 386 | #ifdef CONFIG_X86_LOCAL_APIC |
| 412 | .setup_boot_clock = setup_boot_APIC_clock, | ||
| 413 | .setup_secondary_clock = setup_secondary_APIC_clock, | ||
| 414 | .startup_ipi_hook = paravirt_nop, | 387 | .startup_ipi_hook = paravirt_nop, |
| 415 | #endif | 388 | #endif |
| 416 | }; | 389 | }; |
| @@ -424,13 +397,6 @@ struct pv_apic_ops pv_apic_ops = { | |||
| 424 | #endif | 397 | #endif |
| 425 | 398 | ||
| 426 | struct pv_mmu_ops pv_mmu_ops = { | 399 | struct pv_mmu_ops pv_mmu_ops = { |
| 427 | #ifndef CONFIG_X86_64 | ||
| 428 | .pagetable_setup_start = native_pagetable_setup_start, | ||
| 429 | .pagetable_setup_done = native_pagetable_setup_done, | ||
| 430 | #else | ||
| 431 | .pagetable_setup_start = paravirt_nop, | ||
| 432 | .pagetable_setup_done = paravirt_nop, | ||
| 433 | #endif | ||
| 434 | 400 | ||
| 435 | .read_cr2 = native_read_cr2, | 401 | .read_cr2 = native_read_cr2, |
| 436 | .write_cr2 = native_write_cr2, | 402 | .write_cr2 = native_write_cr2, |
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c index 5d465b207e72..1cfbbfc3ae26 100644 --- a/arch/x86/kernel/rtc.c +++ b/arch/x86/kernel/rtc.c | |||
| @@ -8,6 +8,7 @@ | |||
| 8 | #include <linux/pnp.h> | 8 | #include <linux/pnp.h> |
| 9 | 9 | ||
| 10 | #include <asm/vsyscall.h> | 10 | #include <asm/vsyscall.h> |
| 11 | #include <asm/x86_init.h> | ||
| 11 | #include <asm/time.h> | 12 | #include <asm/time.h> |
| 12 | 13 | ||
| 13 | #ifdef CONFIG_X86_32 | 14 | #ifdef CONFIG_X86_32 |
| @@ -165,33 +166,29 @@ void rtc_cmos_write(unsigned char val, unsigned char addr) | |||
| 165 | } | 166 | } |
| 166 | EXPORT_SYMBOL(rtc_cmos_write); | 167 | EXPORT_SYMBOL(rtc_cmos_write); |
| 167 | 168 | ||
| 168 | static int set_rtc_mmss(unsigned long nowtime) | 169 | int update_persistent_clock(struct timespec now) |
| 169 | { | 170 | { |
| 170 | unsigned long flags; | 171 | unsigned long flags; |
| 171 | int retval; | 172 | int retval; |
| 172 | 173 | ||
| 173 | spin_lock_irqsave(&rtc_lock, flags); | 174 | spin_lock_irqsave(&rtc_lock, flags); |
| 174 | retval = set_wallclock(nowtime); | 175 | retval = x86_platform.set_wallclock(now.tv_sec); |
| 175 | spin_unlock_irqrestore(&rtc_lock, flags); | 176 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 176 | 177 | ||
| 177 | return retval; | 178 | return retval; |
| 178 | } | 179 | } |
| 179 | 180 | ||
| 180 | /* not static: needed by APM */ | 181 | /* not static: needed by APM */ |
| 181 | unsigned long read_persistent_clock(void) | 182 | void read_persistent_clock(struct timespec *ts) |
| 182 | { | 183 | { |
| 183 | unsigned long retval, flags; | 184 | unsigned long retval, flags; |
| 184 | 185 | ||
| 185 | spin_lock_irqsave(&rtc_lock, flags); | 186 | spin_lock_irqsave(&rtc_lock, flags); |
| 186 | retval = get_wallclock(); | 187 | retval = x86_platform.get_wallclock(); |
| 187 | spin_unlock_irqrestore(&rtc_lock, flags); | 188 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 188 | 189 | ||
| 189 | return retval; | 190 | ts->tv_sec = retval; |
| 190 | } | 191 | ts->tv_nsec = 0; |
| 191 | |||
| 192 | int update_persistent_clock(struct timespec now) | ||
| 193 | { | ||
| 194 | return set_rtc_mmss(now.tv_sec); | ||
| 195 | } | 192 | } |
| 196 | 193 | ||
| 197 | unsigned long long native_read_tsc(void) | 194 | unsigned long long native_read_tsc(void) |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 19f15c4076fb..a55f6609fe1f 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
| @@ -109,10 +109,6 @@ | |||
| 109 | #include <asm/numa_64.h> | 109 | #include <asm/numa_64.h> |
| 110 | #endif | 110 | #endif |
| 111 | 111 | ||
| 112 | #ifndef ARCH_SETUP | ||
| 113 | #define ARCH_SETUP | ||
| 114 | #endif | ||
| 115 | |||
| 116 | /* | 112 | /* |
| 117 | * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries. | 113 | * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries. |
| 118 | * The direct mapping extends to max_pfn_mapped, so that we can directly access | 114 | * The direct mapping extends to max_pfn_mapped, so that we can directly access |
| @@ -134,9 +130,9 @@ int default_cpu_present_to_apicid(int mps_cpu) | |||
| 134 | return __default_cpu_present_to_apicid(mps_cpu); | 130 | return __default_cpu_present_to_apicid(mps_cpu); |
| 135 | } | 131 | } |
| 136 | 132 | ||
| 137 | int default_check_phys_apicid_present(int boot_cpu_physical_apicid) | 133 | int default_check_phys_apicid_present(int phys_apicid) |
| 138 | { | 134 | { |
| 139 | return __default_check_phys_apicid_present(boot_cpu_physical_apicid); | 135 | return __default_check_phys_apicid_present(phys_apicid); |
| 140 | } | 136 | } |
| 141 | #endif | 137 | #endif |
| 142 | 138 | ||
| @@ -172,13 +168,6 @@ static struct resource bss_resource = { | |||
| 172 | 168 | ||
| 173 | 169 | ||
| 174 | #ifdef CONFIG_X86_32 | 170 | #ifdef CONFIG_X86_32 |
| 175 | static struct resource video_ram_resource = { | ||
| 176 | .name = "Video RAM area", | ||
| 177 | .start = 0xa0000, | ||
| 178 | .end = 0xbffff, | ||
| 179 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM | ||
| 180 | }; | ||
| 181 | |||
| 182 | /* cpu data as detected by the assembly code in head.S */ | 171 | /* cpu data as detected by the assembly code in head.S */ |
| 183 | struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1}; | 172 | struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1}; |
| 184 | /* common cpu data for all cpus */ | 173 | /* common cpu data for all cpus */ |
| @@ -606,7 +595,7 @@ static struct resource standard_io_resources[] = { | |||
| 606 | .flags = IORESOURCE_BUSY | IORESOURCE_IO } | 595 | .flags = IORESOURCE_BUSY | IORESOURCE_IO } |
| 607 | }; | 596 | }; |
| 608 | 597 | ||
| 609 | static void __init reserve_standard_io_resources(void) | 598 | void __init reserve_standard_io_resources(void) |
| 610 | { | 599 | { |
| 611 | int i; | 600 | int i; |
| 612 | 601 | ||
| @@ -638,10 +627,6 @@ static int __init setup_elfcorehdr(char *arg) | |||
| 638 | early_param("elfcorehdr", setup_elfcorehdr); | 627 | early_param("elfcorehdr", setup_elfcorehdr); |
| 639 | #endif | 628 | #endif |
| 640 | 629 | ||
| 641 | static struct x86_quirks default_x86_quirks __initdata; | ||
| 642 | |||
| 643 | struct x86_quirks *x86_quirks __initdata = &default_x86_quirks; | ||
| 644 | |||
| 645 | #ifdef CONFIG_X86_RESERVE_LOW_64K | 630 | #ifdef CONFIG_X86_RESERVE_LOW_64K |
| 646 | static int __init dmi_low_memory_corruption(const struct dmi_system_id *d) | 631 | static int __init dmi_low_memory_corruption(const struct dmi_system_id *d) |
| 647 | { | 632 | { |
| @@ -773,7 +758,7 @@ void __init setup_arch(char **cmdline_p) | |||
| 773 | } | 758 | } |
| 774 | #endif | 759 | #endif |
| 775 | 760 | ||
| 776 | ARCH_SETUP | 761 | x86_init.oem.arch_setup(); |
| 777 | 762 | ||
| 778 | setup_memory_map(); | 763 | setup_memory_map(); |
| 779 | parse_setup_data(); | 764 | parse_setup_data(); |
| @@ -844,11 +829,9 @@ void __init setup_arch(char **cmdline_p) | |||
| 844 | * VMware detection requires dmi to be available, so this | 829 | * VMware detection requires dmi to be available, so this |
| 845 | * needs to be done after dmi_scan_machine, for the BP. | 830 | * needs to be done after dmi_scan_machine, for the BP. |
| 846 | */ | 831 | */ |
| 847 | init_hypervisor(&boot_cpu_data); | 832 | init_hypervisor_platform(); |
| 848 | 833 | ||
| 849 | #ifdef CONFIG_X86_32 | 834 | x86_init.resources.probe_roms(); |
| 850 | probe_roms(); | ||
| 851 | #endif | ||
| 852 | 835 | ||
| 853 | /* after parse_early_param, so could debug it */ | 836 | /* after parse_early_param, so could debug it */ |
| 854 | insert_resource(&iomem_resource, &code_resource); | 837 | insert_resource(&iomem_resource, &code_resource); |
| @@ -983,10 +966,9 @@ void __init setup_arch(char **cmdline_p) | |||
| 983 | kvmclock_init(); | 966 | kvmclock_init(); |
| 984 | #endif | 967 | #endif |
| 985 | 968 | ||
| 986 | paravirt_pagetable_setup_start(swapper_pg_dir); | 969 | x86_init.paging.pagetable_setup_start(swapper_pg_dir); |
| 987 | paging_init(); | 970 | paging_init(); |
| 988 | paravirt_pagetable_setup_done(swapper_pg_dir); | 971 | x86_init.paging.pagetable_setup_done(swapper_pg_dir); |
| 989 | paravirt_post_allocator_init(); | ||
| 990 | 972 | ||
| 991 | tboot_probe(); | 973 | tboot_probe(); |
| 992 | 974 | ||
| @@ -1003,13 +985,11 @@ void __init setup_arch(char **cmdline_p) | |||
| 1003 | */ | 985 | */ |
| 1004 | acpi_boot_init(); | 986 | acpi_boot_init(); |
| 1005 | 987 | ||
| 1006 | #if defined(CONFIG_X86_MPPARSE) || defined(CONFIG_X86_VISWS) | ||
| 1007 | /* | 988 | /* |
| 1008 | * get boot-time SMP configuration: | 989 | * get boot-time SMP configuration: |
| 1009 | */ | 990 | */ |
| 1010 | if (smp_found_config) | 991 | if (smp_found_config) |
| 1011 | get_smp_config(); | 992 | get_smp_config(); |
| 1012 | #endif | ||
| 1013 | 993 | ||
| 1014 | prefill_possible_map(); | 994 | prefill_possible_map(); |
| 1015 | 995 | ||
| @@ -1028,10 +1008,7 @@ void __init setup_arch(char **cmdline_p) | |||
| 1028 | e820_reserve_resources(); | 1008 | e820_reserve_resources(); |
| 1029 | e820_mark_nosave_regions(max_low_pfn); | 1009 | e820_mark_nosave_regions(max_low_pfn); |
| 1030 | 1010 | ||
| 1031 | #ifdef CONFIG_X86_32 | 1011 | x86_init.resources.reserve_resources(); |
| 1032 | request_resource(&iomem_resource, &video_ram_resource); | ||
| 1033 | #endif | ||
| 1034 | reserve_standard_io_resources(); | ||
| 1035 | 1012 | ||
| 1036 | e820_setup_gap(); | 1013 | e820_setup_gap(); |
| 1037 | 1014 | ||
| @@ -1043,78 +1020,22 @@ void __init setup_arch(char **cmdline_p) | |||
| 1043 | conswitchp = &dummy_con; | 1020 | conswitchp = &dummy_con; |
| 1044 | #endif | 1021 | #endif |
| 1045 | #endif | 1022 | #endif |
| 1023 | x86_init.oem.banner(); | ||
| 1046 | } | 1024 | } |
| 1047 | 1025 | ||
| 1048 | #ifdef CONFIG_X86_32 | 1026 | #ifdef CONFIG_X86_32 |
| 1049 | 1027 | ||
| 1050 | /** | 1028 | static struct resource video_ram_resource = { |
| 1051 | * x86_quirk_intr_init - post gate setup interrupt initialisation | 1029 | .name = "Video RAM area", |
| 1052 | * | 1030 | .start = 0xa0000, |
| 1053 | * Description: | 1031 | .end = 0xbffff, |
| 1054 | * Fill in any interrupts that may have been left out by the general | 1032 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM |
| 1055 | * init_IRQ() routine. interrupts having to do with the machine rather | ||
| 1056 | * than the devices on the I/O bus (like APIC interrupts in intel MP | ||
| 1057 | * systems) are started here. | ||
| 1058 | **/ | ||
| 1059 | void __init x86_quirk_intr_init(void) | ||
| 1060 | { | ||
| 1061 | if (x86_quirks->arch_intr_init) { | ||
| 1062 | if (x86_quirks->arch_intr_init()) | ||
| 1063 | return; | ||
| 1064 | } | ||
| 1065 | } | ||
| 1066 | |||
| 1067 | /** | ||
| 1068 | * x86_quirk_trap_init - initialise system specific traps | ||
| 1069 | * | ||
| 1070 | * Description: | ||
| 1071 | * Called as the final act of trap_init(). Used in VISWS to initialise | ||
| 1072 | * the various board specific APIC traps. | ||
| 1073 | **/ | ||
| 1074 | void __init x86_quirk_trap_init(void) | ||
| 1075 | { | ||
| 1076 | if (x86_quirks->arch_trap_init) { | ||
| 1077 | if (x86_quirks->arch_trap_init()) | ||
| 1078 | return; | ||
| 1079 | } | ||
| 1080 | } | ||
| 1081 | |||
| 1082 | static struct irqaction irq0 = { | ||
| 1083 | .handler = timer_interrupt, | ||
| 1084 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, | ||
| 1085 | .name = "timer" | ||
| 1086 | }; | 1033 | }; |
| 1087 | 1034 | ||
| 1088 | /** | 1035 | void __init i386_reserve_resources(void) |
| 1089 | * x86_quirk_pre_time_init - do any specific initialisations before. | ||
| 1090 | * | ||
| 1091 | **/ | ||
| 1092 | void __init x86_quirk_pre_time_init(void) | ||
| 1093 | { | 1036 | { |
| 1094 | if (x86_quirks->arch_pre_time_init) | 1037 | request_resource(&iomem_resource, &video_ram_resource); |
| 1095 | x86_quirks->arch_pre_time_init(); | 1038 | reserve_standard_io_resources(); |
| 1096 | } | 1039 | } |
| 1097 | 1040 | ||
| 1098 | /** | ||
| 1099 | * x86_quirk_time_init - do any specific initialisations for the system timer. | ||
| 1100 | * | ||
| 1101 | * Description: | ||
| 1102 | * Must plug the system timer interrupt source at HZ into the IRQ listed | ||
| 1103 | * in irq_vectors.h:TIMER_IRQ | ||
| 1104 | **/ | ||
| 1105 | void __init x86_quirk_time_init(void) | ||
| 1106 | { | ||
| 1107 | if (x86_quirks->arch_time_init) { | ||
| 1108 | /* | ||
| 1109 | * A nonzero return code does not mean failure, it means | ||
| 1110 | * that the architecture quirk does not want any | ||
| 1111 | * generic (timer) setup to be performed after this: | ||
| 1112 | */ | ||
| 1113 | if (x86_quirks->arch_time_init()) | ||
| 1114 | return; | ||
| 1115 | } | ||
| 1116 | |||
| 1117 | irq0.mask = cpumask_of_cpu(0); | ||
| 1118 | setup_irq(0, &irq0); | ||
| 1119 | } | ||
| 1120 | #endif /* CONFIG_X86_32 */ | 1041 | #endif /* CONFIG_X86_32 */ |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index a25eeec00080..09c5e077dff7 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
| @@ -324,7 +324,7 @@ notrace static void __cpuinit start_secondary(void *unused) | |||
| 324 | /* enable local interrupts */ | 324 | /* enable local interrupts */ |
| 325 | local_irq_enable(); | 325 | local_irq_enable(); |
| 326 | 326 | ||
| 327 | setup_secondary_clock(); | 327 | x86_cpuinit.setup_percpu_clockev(); |
| 328 | 328 | ||
| 329 | wmb(); | 329 | wmb(); |
| 330 | cpu_idle(); | 330 | cpu_idle(); |
| @@ -1114,7 +1114,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) | |||
| 1114 | 1114 | ||
| 1115 | printk(KERN_INFO "CPU%d: ", 0); | 1115 | printk(KERN_INFO "CPU%d: ", 0); |
| 1116 | print_cpu_info(&cpu_data(0)); | 1116 | print_cpu_info(&cpu_data(0)); |
| 1117 | setup_boot_clock(); | 1117 | x86_init.timers.setup_percpu_clockev(); |
| 1118 | 1118 | ||
| 1119 | if (is_uv_system()) | 1119 | if (is_uv_system()) |
| 1120 | uv_system_init(); | 1120 | uv_system_init(); |
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c new file mode 100644 index 000000000000..e293ac56c723 --- /dev/null +++ b/arch/x86/kernel/time.c | |||
| @@ -0,0 +1,121 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 1991,1992,1995 Linus Torvalds | ||
| 3 | * Copyright (c) 1994 Alan Modra | ||
| 4 | * Copyright (c) 1995 Markus Kuhn | ||
| 5 | * Copyright (c) 1996 Ingo Molnar | ||
| 6 | * Copyright (c) 1998 Andrea Arcangeli | ||
| 7 | * Copyright (c) 2002,2006 Vojtech Pavlik | ||
| 8 | * Copyright (c) 2003 Andi Kleen | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/clockchips.h> | ||
| 13 | #include <linux/interrupt.h> | ||
| 14 | #include <linux/time.h> | ||
| 15 | #include <linux/mca.h> | ||
| 16 | |||
| 17 | #include <asm/vsyscall.h> | ||
| 18 | #include <asm/x86_init.h> | ||
| 19 | #include <asm/i8259.h> | ||
| 20 | #include <asm/i8253.h> | ||
| 21 | #include <asm/timer.h> | ||
| 22 | #include <asm/hpet.h> | ||
| 23 | #include <asm/time.h> | ||
| 24 | |||
| 25 | #if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC) | ||
| 26 | int timer_ack; | ||
| 27 | #endif | ||
| 28 | |||
| 29 | #ifdef CONFIG_X86_64 | ||
| 30 | volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES; | ||
| 31 | #endif | ||
| 32 | |||
| 33 | unsigned long profile_pc(struct pt_regs *regs) | ||
| 34 | { | ||
| 35 | unsigned long pc = instruction_pointer(regs); | ||
| 36 | |||
| 37 | if (!user_mode_vm(regs) && in_lock_functions(pc)) { | ||
| 38 | #ifdef CONFIG_FRAME_POINTER | ||
| 39 | return *(unsigned long *)(regs->bp + sizeof(long)); | ||
| 40 | #else | ||
| 41 | unsigned long *sp = (unsigned long *)regs->sp; | ||
| 42 | /* | ||
| 43 | * Return address is either directly at stack pointer | ||
| 44 | * or above a saved flags. Eflags has bits 22-31 zero, | ||
| 45 | * kernel addresses don't. | ||
| 46 | */ | ||
| 47 | if (sp[0] >> 22) | ||
| 48 | return sp[0]; | ||
| 49 | if (sp[1] >> 22) | ||
| 50 | return sp[1]; | ||
| 51 | #endif | ||
| 52 | } | ||
| 53 | return pc; | ||
| 54 | } | ||
| 55 | EXPORT_SYMBOL(profile_pc); | ||
| 56 | |||
| 57 | /* | ||
| 58 | * Default timer interrupt handler for PIT/HPET | ||
| 59 | */ | ||
| 60 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
| 61 | { | ||
| 62 | /* Keep nmi watchdog up to date */ | ||
| 63 | inc_irq_stat(irq0_irqs); | ||
| 64 | |||
| 65 | /* Optimized out for !IO_APIC and x86_64 */ | ||
| 66 | if (timer_ack) { | ||
| 67 | /* | ||
| 68 | * Subtle, when I/O APICs are used we have to ack timer IRQ | ||
| 69 | * manually to deassert NMI lines for the watchdog if run | ||
| 70 | * on an 82489DX-based system. | ||
| 71 | */ | ||
| 72 | spin_lock(&i8259A_lock); | ||
| 73 | outb(0x0c, PIC_MASTER_OCW3); | ||
| 74 | /* Ack the IRQ; AEOI will end it automatically. */ | ||
| 75 | inb(PIC_MASTER_POLL); | ||
| 76 | spin_unlock(&i8259A_lock); | ||
| 77 | } | ||
| 78 | |||
| 79 | global_clock_event->event_handler(global_clock_event); | ||
| 80 | |||
| 81 | /* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */ | ||
| 82 | if (MCA_bus) | ||
| 83 | outb_p(inb_p(0x61)| 0x80, 0x61); | ||
| 84 | |||
| 85 | return IRQ_HANDLED; | ||
| 86 | } | ||
| 87 | |||
| 88 | static struct irqaction irq0 = { | ||
| 89 | .handler = timer_interrupt, | ||
| 90 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, | ||
| 91 | .name = "timer" | ||
| 92 | }; | ||
| 93 | |||
| 94 | void __init setup_default_timer_irq(void) | ||
| 95 | { | ||
| 96 | irq0.mask = cpumask_of_cpu(0); | ||
| 97 | setup_irq(0, &irq0); | ||
| 98 | } | ||
| 99 | |||
| 100 | /* Default timer init function */ | ||
| 101 | void __init hpet_time_init(void) | ||
| 102 | { | ||
| 103 | if (!hpet_enable()) | ||
| 104 | setup_pit_timer(); | ||
| 105 | setup_default_timer_irq(); | ||
| 106 | } | ||
| 107 | |||
| 108 | static __init void x86_late_time_init(void) | ||
| 109 | { | ||
| 110 | x86_init.timers.timer_init(); | ||
| 111 | tsc_init(); | ||
| 112 | } | ||
| 113 | |||
| 114 | /* | ||
| 115 | * Initialize TSC and delay the periodic timer init to | ||
| 116 | * late x86_late_time_init() so ioremap works. | ||
| 117 | */ | ||
| 118 | void __init time_init(void) | ||
| 119 | { | ||
| 120 | late_time_init = x86_late_time_init; | ||
| 121 | } | ||
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c deleted file mode 100644 index 5c5d87f0b2e1..000000000000 --- a/arch/x86/kernel/time_32.c +++ /dev/null | |||
| @@ -1,137 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | ||
| 3 | * | ||
| 4 | * This file contains the PC-specific time handling details: | ||
| 5 | * reading the RTC at bootup, etc.. | ||
| 6 | * 1994-07-02 Alan Modra | ||
| 7 | * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | ||
| 8 | * 1995-03-26 Markus Kuhn | ||
| 9 | * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887 | ||
| 10 | * precision CMOS clock update | ||
| 11 | * 1996-05-03 Ingo Molnar | ||
| 12 | * fixed time warps in do_[slow|fast]_gettimeoffset() | ||
| 13 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | ||
| 14 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | ||
| 15 | * 1998-09-05 (Various) | ||
| 16 | * More robust do_fast_gettimeoffset() algorithm implemented | ||
| 17 | * (works with APM, Cyrix 6x86MX and Centaur C6), | ||
| 18 | * monotonic gettimeofday() with fast_get_timeoffset(), | ||
| 19 | * drift-proof precision TSC calibration on boot | ||
| 20 | * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D. | ||
| 21 | * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>; | ||
| 22 | * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>). | ||
| 23 | * 1998-12-16 Andrea Arcangeli | ||
| 24 | * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy | ||
| 25 | * because was not accounting lost_ticks. | ||
| 26 | * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli | ||
| 27 | * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to | ||
| 28 | * serialize accesses to xtime/lost_ticks). | ||
| 29 | */ | ||
| 30 | |||
| 31 | #include <linux/init.h> | ||
| 32 | #include <linux/interrupt.h> | ||
| 33 | #include <linux/time.h> | ||
| 34 | #include <linux/mca.h> | ||
| 35 | |||
| 36 | #include <asm/setup.h> | ||
| 37 | #include <asm/hpet.h> | ||
| 38 | #include <asm/time.h> | ||
| 39 | #include <asm/timer.h> | ||
| 40 | |||
| 41 | #include <asm/do_timer.h> | ||
| 42 | |||
| 43 | int timer_ack; | ||
| 44 | |||
| 45 | unsigned long profile_pc(struct pt_regs *regs) | ||
| 46 | { | ||
| 47 | unsigned long pc = instruction_pointer(regs); | ||
| 48 | |||
| 49 | #ifdef CONFIG_SMP | ||
| 50 | if (!user_mode_vm(regs) && in_lock_functions(pc)) { | ||
| 51 | #ifdef CONFIG_FRAME_POINTER | ||
| 52 | return *(unsigned long *)(regs->bp + sizeof(long)); | ||
| 53 | #else | ||
| 54 | unsigned long *sp = (unsigned long *)®s->sp; | ||
| 55 | |||
| 56 | /* Return address is either directly at stack pointer | ||
| 57 | or above a saved flags. Eflags has bits 22-31 zero, | ||
| 58 | kernel addresses don't. */ | ||
| 59 | if (sp[0] >> 22) | ||
| 60 | return sp[0]; | ||
| 61 | if (sp[1] >> 22) | ||
| 62 | return sp[1]; | ||
| 63 | #endif | ||
| 64 | } | ||
| 65 | #endif | ||
| 66 | return pc; | ||
| 67 | } | ||
| 68 | EXPORT_SYMBOL(profile_pc); | ||
| 69 | |||
| 70 | /* | ||
| 71 | * This is the same as the above, except we _also_ save the current | ||
| 72 | * Time Stamp Counter value at the time of the timer interrupt, so that | ||
| 73 | * we later on can estimate the time of day more exactly. | ||
| 74 | */ | ||
| 75 | irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
| 76 | { | ||
| 77 | /* Keep nmi watchdog up to date */ | ||
| 78 | inc_irq_stat(irq0_irqs); | ||
| 79 | |||
| 80 | #ifdef CONFIG_X86_IO_APIC | ||
| 81 | if (timer_ack) { | ||
| 82 | /* | ||
| 83 | * Subtle, when I/O APICs are used we have to ack timer IRQ | ||
| 84 | * manually to deassert NMI lines for the watchdog if run | ||
| 85 | * on an 82489DX-based system. | ||
| 86 | */ | ||
| 87 | spin_lock(&i8259A_lock); | ||
| 88 | outb(0x0c, PIC_MASTER_OCW3); | ||
| 89 | /* Ack the IRQ; AEOI will end it automatically. */ | ||
| 90 | inb(PIC_MASTER_POLL); | ||
| 91 | spin_unlock(&i8259A_lock); | ||
| 92 | } | ||
| 93 | #endif | ||
| 94 | |||
| 95 | do_timer_interrupt_hook(); | ||
| 96 | |||
| 97 | #ifdef CONFIG_MCA | ||
| 98 | if (MCA_bus) { | ||
| 99 | /* The PS/2 uses level-triggered interrupts. You can't | ||
| 100 | turn them off, nor would you want to (any attempt to | ||
| 101 | enable edge-triggered interrupts usually gets intercepted by a | ||
| 102 | special hardware circuit). Hence we have to acknowledge | ||
| 103 | the timer interrupt. Through some incredibly stupid | ||
| 104 | design idea, the reset for IRQ 0 is done by setting the | ||
| 105 | high bit of the PPI port B (0x61). Note that some PS/2s, | ||
| 106 | notably the 55SX, work fine if this is removed. */ | ||
| 107 | |||
| 108 | u8 irq_v = inb_p(0x61); /* read the current state */ | ||
| 109 | outb_p(irq_v | 0x80, 0x61); /* reset the IRQ */ | ||
| 110 | } | ||
| 111 | #endif | ||
| 112 | |||
| 113 | return IRQ_HANDLED; | ||
| 114 | } | ||
| 115 | |||
| 116 | /* Duplicate of time_init() below, with hpet_enable part added */ | ||
| 117 | void __init hpet_time_init(void) | ||
| 118 | { | ||
| 119 | if (!hpet_enable()) | ||
| 120 | setup_pit_timer(); | ||
| 121 | x86_quirk_time_init(); | ||
| 122 | } | ||
| 123 | |||
| 124 | /* | ||
| 125 | * This is called directly from init code; we must delay timer setup in the | ||
| 126 | * HPET case as we can't make the decision to turn on HPET this early in the | ||
| 127 | * boot process. | ||
| 128 | * | ||
| 129 | * The chosen time_init function will usually be hpet_time_init, above, but | ||
| 130 | * in the case of virtual hardware, an alternative function may be substituted. | ||
| 131 | */ | ||
| 132 | void __init time_init(void) | ||
| 133 | { | ||
| 134 | x86_quirk_pre_time_init(); | ||
| 135 | tsc_init(); | ||
| 136 | late_time_init = choose_time_init(); | ||
| 137 | } | ||
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c deleted file mode 100644 index 5ba343e61844..000000000000 --- a/arch/x86/kernel/time_64.c +++ /dev/null | |||
| @@ -1,135 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * "High Precision Event Timer" based timekeeping. | ||
| 3 | * | ||
| 4 | * Copyright (c) 1991,1992,1995 Linus Torvalds | ||
| 5 | * Copyright (c) 1994 Alan Modra | ||
| 6 | * Copyright (c) 1995 Markus Kuhn | ||
| 7 | * Copyright (c) 1996 Ingo Molnar | ||
| 8 | * Copyright (c) 1998 Andrea Arcangeli | ||
| 9 | * Copyright (c) 2002,2006 Vojtech Pavlik | ||
| 10 | * Copyright (c) 2003 Andi Kleen | ||
| 11 | * RTC support code taken from arch/i386/kernel/timers/time_hpet.c | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/clockchips.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/module.h> | ||
| 18 | #include <linux/time.h> | ||
| 19 | #include <linux/mca.h> | ||
| 20 | #include <linux/nmi.h> | ||
| 21 | |||
| 22 | #include <asm/i8253.h> | ||
| 23 | #include <asm/hpet.h> | ||
| 24 | #include <asm/vgtod.h> | ||
| 25 | #include <asm/time.h> | ||
| 26 | #include <asm/timer.h> | ||
| 27 | |||
| 28 | volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES; | ||
| 29 | |||
| 30 | unsigned long profile_pc(struct pt_regs *regs) | ||
| 31 | { | ||
| 32 | unsigned long pc = instruction_pointer(regs); | ||
| 33 | |||
| 34 | /* Assume the lock function has either no stack frame or a copy | ||
| 35 | of flags from PUSHF | ||
| 36 | Eflags always has bits 22 and up cleared unlike kernel addresses. */ | ||
| 37 | if (!user_mode_vm(regs) && in_lock_functions(pc)) { | ||
| 38 | #ifdef CONFIG_FRAME_POINTER | ||
| 39 | return *(unsigned long *)(regs->bp + sizeof(long)); | ||
| 40 | #else | ||
| 41 | unsigned long *sp = (unsigned long *)regs->sp; | ||
| 42 | if (sp[0] >> 22) | ||
| 43 | return sp[0]; | ||
| 44 | if (sp[1] >> 22) | ||
| 45 | return sp[1]; | ||
| 46 | #endif | ||
| 47 | } | ||
| 48 | return pc; | ||
| 49 | } | ||
| 50 | EXPORT_SYMBOL(profile_pc); | ||
| 51 | |||
| 52 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
| 53 | { | ||
| 54 | inc_irq_stat(irq0_irqs); | ||
| 55 | |||
| 56 | global_clock_event->event_handler(global_clock_event); | ||
| 57 | |||
| 58 | #ifdef CONFIG_MCA | ||
| 59 | if (MCA_bus) { | ||
| 60 | u8 irq_v = inb_p(0x61); /* read the current state */ | ||
| 61 | outb_p(irq_v|0x80, 0x61); /* reset the IRQ */ | ||
| 62 | } | ||
| 63 | #endif | ||
| 64 | |||
| 65 | return IRQ_HANDLED; | ||
| 66 | } | ||
| 67 | |||
| 68 | /* calibrate_cpu is used on systems with fixed rate TSCs to determine | ||
| 69 | * processor frequency */ | ||
| 70 | #define TICK_COUNT 100000000 | ||
| 71 | unsigned long __init calibrate_cpu(void) | ||
| 72 | { | ||
| 73 | int tsc_start, tsc_now; | ||
| 74 | int i, no_ctr_free; | ||
| 75 | unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0; | ||
| 76 | unsigned long flags; | ||
| 77 | |||
| 78 | for (i = 0; i < 4; i++) | ||
| 79 | if (avail_to_resrv_perfctr_nmi_bit(i)) | ||
| 80 | break; | ||
| 81 | no_ctr_free = (i == 4); | ||
| 82 | if (no_ctr_free) { | ||
| 83 | WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... " | ||
| 84 | "cpu_khz value may be incorrect.\n"); | ||
| 85 | i = 3; | ||
| 86 | rdmsrl(MSR_K7_EVNTSEL3, evntsel3); | ||
| 87 | wrmsrl(MSR_K7_EVNTSEL3, 0); | ||
| 88 | rdmsrl(MSR_K7_PERFCTR3, pmc3); | ||
| 89 | } else { | ||
| 90 | reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i); | ||
| 91 | reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i); | ||
| 92 | } | ||
| 93 | local_irq_save(flags); | ||
| 94 | /* start measuring cycles, incrementing from 0 */ | ||
| 95 | wrmsrl(MSR_K7_PERFCTR0 + i, 0); | ||
| 96 | wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76); | ||
| 97 | rdtscl(tsc_start); | ||
| 98 | do { | ||
| 99 | rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now); | ||
| 100 | tsc_now = get_cycles(); | ||
| 101 | } while ((tsc_now - tsc_start) < TICK_COUNT); | ||
| 102 | |||
| 103 | local_irq_restore(flags); | ||
| 104 | if (no_ctr_free) { | ||
| 105 | wrmsrl(MSR_K7_EVNTSEL3, 0); | ||
| 106 | wrmsrl(MSR_K7_PERFCTR3, pmc3); | ||
| 107 | wrmsrl(MSR_K7_EVNTSEL3, evntsel3); | ||
| 108 | } else { | ||
| 109 | release_perfctr_nmi(MSR_K7_PERFCTR0 + i); | ||
| 110 | release_evntsel_nmi(MSR_K7_EVNTSEL0 + i); | ||
| 111 | } | ||
| 112 | |||
| 113 | return pmc_now * tsc_khz / (tsc_now - tsc_start); | ||
| 114 | } | ||
| 115 | |||
| 116 | static struct irqaction irq0 = { | ||
| 117 | .handler = timer_interrupt, | ||
| 118 | .flags = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER, | ||
| 119 | .name = "timer" | ||
| 120 | }; | ||
| 121 | |||
| 122 | void __init hpet_time_init(void) | ||
| 123 | { | ||
| 124 | if (!hpet_enable()) | ||
| 125 | setup_pit_timer(); | ||
| 126 | |||
| 127 | setup_irq(0, &irq0); | ||
| 128 | } | ||
| 129 | |||
| 130 | void __init time_init(void) | ||
| 131 | { | ||
| 132 | tsc_init(); | ||
| 133 | |||
| 134 | late_time_init = choose_time_init(); | ||
| 135 | } | ||
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 83264922a878..9346e102338d 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c | |||
| @@ -59,12 +59,12 @@ | |||
| 59 | #include <asm/mach_traps.h> | 59 | #include <asm/mach_traps.h> |
| 60 | 60 | ||
| 61 | #ifdef CONFIG_X86_64 | 61 | #ifdef CONFIG_X86_64 |
| 62 | #include <asm/x86_init.h> | ||
| 62 | #include <asm/pgalloc.h> | 63 | #include <asm/pgalloc.h> |
| 63 | #include <asm/proto.h> | 64 | #include <asm/proto.h> |
| 64 | #else | 65 | #else |
| 65 | #include <asm/processor-flags.h> | 66 | #include <asm/processor-flags.h> |
| 66 | #include <asm/setup.h> | 67 | #include <asm/setup.h> |
| 67 | #include <asm/traps.h> | ||
| 68 | 68 | ||
| 69 | asmlinkage int system_call(void); | 69 | asmlinkage int system_call(void); |
| 70 | 70 | ||
| @@ -972,7 +972,5 @@ void __init trap_init(void) | |||
| 972 | */ | 972 | */ |
| 973 | cpu_init(); | 973 | cpu_init(); |
| 974 | 974 | ||
| 975 | #ifdef CONFIG_X86_32 | 975 | x86_init.irqs.trap_init(); |
| 976 | x86_quirk_trap_init(); | ||
| 977 | #endif | ||
| 978 | } | 976 | } |
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 71f4368b357e..17409e8d1097 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c | |||
| @@ -17,6 +17,8 @@ | |||
| 17 | #include <asm/time.h> | 17 | #include <asm/time.h> |
| 18 | #include <asm/delay.h> | 18 | #include <asm/delay.h> |
| 19 | #include <asm/hypervisor.h> | 19 | #include <asm/hypervisor.h> |
| 20 | #include <asm/nmi.h> | ||
| 21 | #include <asm/x86_init.h> | ||
| 20 | 22 | ||
| 21 | unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ | 23 | unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ |
| 22 | EXPORT_SYMBOL(cpu_khz); | 24 | EXPORT_SYMBOL(cpu_khz); |
| @@ -400,15 +402,9 @@ unsigned long native_calibrate_tsc(void) | |||
| 400 | { | 402 | { |
| 401 | u64 tsc1, tsc2, delta, ref1, ref2; | 403 | u64 tsc1, tsc2, delta, ref1, ref2; |
| 402 | unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; | 404 | unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; |
| 403 | unsigned long flags, latch, ms, fast_calibrate, hv_tsc_khz; | 405 | unsigned long flags, latch, ms, fast_calibrate; |
| 404 | int hpet = is_hpet_enabled(), i, loopmin; | 406 | int hpet = is_hpet_enabled(), i, loopmin; |
| 405 | 407 | ||
| 406 | hv_tsc_khz = get_hypervisor_tsc_freq(); | ||
| 407 | if (hv_tsc_khz) { | ||
| 408 | printk(KERN_INFO "TSC: Frequency read from the hypervisor\n"); | ||
| 409 | return hv_tsc_khz; | ||
| 410 | } | ||
| 411 | |||
| 412 | local_irq_save(flags); | 408 | local_irq_save(flags); |
| 413 | fast_calibrate = quick_pit_calibrate(); | 409 | fast_calibrate = quick_pit_calibrate(); |
| 414 | local_irq_restore(flags); | 410 | local_irq_restore(flags); |
| @@ -566,7 +562,7 @@ int recalibrate_cpu_khz(void) | |||
| 566 | unsigned long cpu_khz_old = cpu_khz; | 562 | unsigned long cpu_khz_old = cpu_khz; |
| 567 | 563 | ||
| 568 | if (cpu_has_tsc) { | 564 | if (cpu_has_tsc) { |
| 569 | tsc_khz = calibrate_tsc(); | 565 | tsc_khz = x86_platform.calibrate_tsc(); |
| 570 | cpu_khz = tsc_khz; | 566 | cpu_khz = tsc_khz; |
| 571 | cpu_data(0).loops_per_jiffy = | 567 | cpu_data(0).loops_per_jiffy = |
| 572 | cpufreq_scale(cpu_data(0).loops_per_jiffy, | 568 | cpufreq_scale(cpu_data(0).loops_per_jiffy, |
| @@ -744,10 +740,16 @@ static cycle_t __vsyscall_fn vread_tsc(void) | |||
| 744 | } | 740 | } |
| 745 | #endif | 741 | #endif |
| 746 | 742 | ||
| 743 | static void resume_tsc(void) | ||
| 744 | { | ||
| 745 | clocksource_tsc.cycle_last = 0; | ||
| 746 | } | ||
| 747 | |||
| 747 | static struct clocksource clocksource_tsc = { | 748 | static struct clocksource clocksource_tsc = { |
| 748 | .name = "tsc", | 749 | .name = "tsc", |
| 749 | .rating = 300, | 750 | .rating = 300, |
| 750 | .read = read_tsc, | 751 | .read = read_tsc, |
| 752 | .resume = resume_tsc, | ||
| 751 | .mask = CLOCKSOURCE_MASK(64), | 753 | .mask = CLOCKSOURCE_MASK(64), |
| 752 | .shift = 22, | 754 | .shift = 22, |
| 753 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | | 755 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | |
| @@ -761,12 +763,14 @@ void mark_tsc_unstable(char *reason) | |||
| 761 | { | 763 | { |
| 762 | if (!tsc_unstable) { | 764 | if (!tsc_unstable) { |
| 763 | tsc_unstable = 1; | 765 | tsc_unstable = 1; |
| 764 | printk("Marking TSC unstable due to %s\n", reason); | 766 | printk(KERN_INFO "Marking TSC unstable due to %s\n", reason); |
| 765 | /* Change only the rating, when not registered */ | 767 | /* Change only the rating, when not registered */ |
| 766 | if (clocksource_tsc.mult) | 768 | if (clocksource_tsc.mult) |
| 767 | clocksource_change_rating(&clocksource_tsc, 0); | 769 | clocksource_mark_unstable(&clocksource_tsc); |
| 768 | else | 770 | else { |
| 771 | clocksource_tsc.flags |= CLOCK_SOURCE_UNSTABLE; | ||
| 769 | clocksource_tsc.rating = 0; | 772 | clocksource_tsc.rating = 0; |
| 773 | } | ||
| 770 | } | 774 | } |
| 771 | } | 775 | } |
| 772 | 776 | ||
| @@ -852,15 +856,71 @@ static void __init init_tsc_clocksource(void) | |||
| 852 | clocksource_register(&clocksource_tsc); | 856 | clocksource_register(&clocksource_tsc); |
| 853 | } | 857 | } |
| 854 | 858 | ||
| 859 | #ifdef CONFIG_X86_64 | ||
| 860 | /* | ||
| 861 | * calibrate_cpu is used on systems with fixed rate TSCs to determine | ||
| 862 | * processor frequency | ||
| 863 | */ | ||
| 864 | #define TICK_COUNT 100000000 | ||
| 865 | static unsigned long __init calibrate_cpu(void) | ||
| 866 | { | ||
| 867 | int tsc_start, tsc_now; | ||
| 868 | int i, no_ctr_free; | ||
| 869 | unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0; | ||
| 870 | unsigned long flags; | ||
| 871 | |||
| 872 | for (i = 0; i < 4; i++) | ||
| 873 | if (avail_to_resrv_perfctr_nmi_bit(i)) | ||
| 874 | break; | ||
| 875 | no_ctr_free = (i == 4); | ||
| 876 | if (no_ctr_free) { | ||
| 877 | WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... " | ||
| 878 | "cpu_khz value may be incorrect.\n"); | ||
| 879 | i = 3; | ||
| 880 | rdmsrl(MSR_K7_EVNTSEL3, evntsel3); | ||
| 881 | wrmsrl(MSR_K7_EVNTSEL3, 0); | ||
| 882 | rdmsrl(MSR_K7_PERFCTR3, pmc3); | ||
| 883 | } else { | ||
| 884 | reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i); | ||
| 885 | reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i); | ||
| 886 | } | ||
| 887 | local_irq_save(flags); | ||
| 888 | /* start measuring cycles, incrementing from 0 */ | ||
| 889 | wrmsrl(MSR_K7_PERFCTR0 + i, 0); | ||
| 890 | wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76); | ||
| 891 | rdtscl(tsc_start); | ||
| 892 | do { | ||
| 893 | rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now); | ||
| 894 | tsc_now = get_cycles(); | ||
| 895 | } while ((tsc_now - tsc_start) < TICK_COUNT); | ||
| 896 | |||
| 897 | local_irq_restore(flags); | ||
| 898 | if (no_ctr_free) { | ||
| 899 | wrmsrl(MSR_K7_EVNTSEL3, 0); | ||
| 900 | wrmsrl(MSR_K7_PERFCTR3, pmc3); | ||
| 901 | wrmsrl(MSR_K7_EVNTSEL3, evntsel3); | ||
| 902 | } else { | ||
| 903 | release_perfctr_nmi(MSR_K7_PERFCTR0 + i); | ||
| 904 | release_evntsel_nmi(MSR_K7_EVNTSEL0 + i); | ||
| 905 | } | ||
| 906 | |||
| 907 | return pmc_now * tsc_khz / (tsc_now - tsc_start); | ||
| 908 | } | ||
| 909 | #else | ||
| 910 | static inline unsigned long calibrate_cpu(void) { return cpu_khz; } | ||
| 911 | #endif | ||
| 912 | |||
| 855 | void __init tsc_init(void) | 913 | void __init tsc_init(void) |
| 856 | { | 914 | { |
| 857 | u64 lpj; | 915 | u64 lpj; |
| 858 | int cpu; | 916 | int cpu; |
| 859 | 917 | ||
| 918 | x86_init.timers.tsc_pre_init(); | ||
| 919 | |||
| 860 | if (!cpu_has_tsc) | 920 | if (!cpu_has_tsc) |
| 861 | return; | 921 | return; |
| 862 | 922 | ||
| 863 | tsc_khz = calibrate_tsc(); | 923 | tsc_khz = x86_platform.calibrate_tsc(); |
| 864 | cpu_khz = tsc_khz; | 924 | cpu_khz = tsc_khz; |
| 865 | 925 | ||
| 866 | if (!tsc_khz) { | 926 | if (!tsc_khz) { |
| @@ -868,11 +928,9 @@ void __init tsc_init(void) | |||
| 868 | return; | 928 | return; |
| 869 | } | 929 | } |
| 870 | 930 | ||
| 871 | #ifdef CONFIG_X86_64 | ||
| 872 | if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) && | 931 | if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) && |
| 873 | (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)) | 932 | (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)) |
| 874 | cpu_khz = calibrate_cpu(); | 933 | cpu_khz = calibrate_cpu(); |
| 875 | #endif | ||
| 876 | 934 | ||
| 877 | printk("Detected %lu.%03lu MHz processor.\n", | 935 | printk("Detected %lu.%03lu MHz processor.\n", |
| 878 | (unsigned long)cpu_khz / 1000, | 936 | (unsigned long)cpu_khz / 1000, |
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c index 31ffc24eec4d..f068553a1b17 100644 --- a/arch/x86/kernel/visws_quirks.c +++ b/arch/x86/kernel/visws_quirks.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
| 31 | #include <asm/apic.h> | 31 | #include <asm/apic.h> |
| 32 | #include <asm/e820.h> | 32 | #include <asm/e820.h> |
| 33 | #include <asm/time.h> | ||
| 33 | #include <asm/io.h> | 34 | #include <asm/io.h> |
| 34 | 35 | ||
| 35 | #include <linux/kernel_stat.h> | 36 | #include <linux/kernel_stat.h> |
| @@ -53,7 +54,7 @@ int is_visws_box(void) | |||
| 53 | return visws_board_type >= 0; | 54 | return visws_board_type >= 0; |
| 54 | } | 55 | } |
| 55 | 56 | ||
| 56 | static int __init visws_time_init(void) | 57 | static void __init visws_time_init(void) |
| 57 | { | 58 | { |
| 58 | printk(KERN_INFO "Starting Cobalt Timer system clock\n"); | 59 | printk(KERN_INFO "Starting Cobalt Timer system clock\n"); |
| 59 | 60 | ||
| @@ -66,21 +67,13 @@ static int __init visws_time_init(void) | |||
| 66 | /* Enable (unmask) the timer interrupt */ | 67 | /* Enable (unmask) the timer interrupt */ |
| 67 | co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK); | 68 | co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK); |
| 68 | 69 | ||
| 69 | /* | 70 | setup_default_timer_irq(); |
| 70 | * Zero return means the generic timer setup code will set up | ||
| 71 | * the standard vector: | ||
| 72 | */ | ||
| 73 | return 0; | ||
| 74 | } | 71 | } |
| 75 | 72 | ||
| 76 | static int __init visws_pre_intr_init(void) | 73 | /* Replaces the default init_ISA_irqs in the generic setup */ |
| 74 | static void __init visws_pre_intr_init(void) | ||
| 77 | { | 75 | { |
| 78 | init_VISWS_APIC_irqs(); | 76 | init_VISWS_APIC_irqs(); |
| 79 | |||
| 80 | /* | ||
| 81 | * We dont want ISA irqs to be set up by the generic code: | ||
| 82 | */ | ||
| 83 | return 1; | ||
| 84 | } | 77 | } |
| 85 | 78 | ||
| 86 | /* Quirk for machine specific memory setup. */ | 79 | /* Quirk for machine specific memory setup. */ |
| @@ -156,12 +149,8 @@ static void visws_machine_power_off(void) | |||
| 156 | outl(PIIX_SPECIAL_STOP, 0xCFC); | 149 | outl(PIIX_SPECIAL_STOP, 0xCFC); |
| 157 | } | 150 | } |
| 158 | 151 | ||
| 159 | static int __init visws_get_smp_config(unsigned int early) | 152 | static void __init visws_get_smp_config(unsigned int early) |
| 160 | { | 153 | { |
| 161 | /* | ||
| 162 | * Prevent MP-table parsing by the generic code: | ||
| 163 | */ | ||
| 164 | return 1; | ||
| 165 | } | 154 | } |
| 166 | 155 | ||
| 167 | /* | 156 | /* |
| @@ -208,7 +197,7 @@ static void __init MP_processor_info(struct mpc_cpu *m) | |||
| 208 | apic_version[m->apicid] = ver; | 197 | apic_version[m->apicid] = ver; |
| 209 | } | 198 | } |
| 210 | 199 | ||
| 211 | static int __init visws_find_smp_config(unsigned int reserve) | 200 | static void __init visws_find_smp_config(unsigned int reserve) |
| 212 | { | 201 | { |
| 213 | struct mpc_cpu *mp = phys_to_virt(CO_CPU_TAB_PHYS); | 202 | struct mpc_cpu *mp = phys_to_virt(CO_CPU_TAB_PHYS); |
| 214 | unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS)); | 203 | unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS)); |
| @@ -230,21 +219,9 @@ static int __init visws_find_smp_config(unsigned int reserve) | |||
| 230 | MP_processor_info(mp++); | 219 | MP_processor_info(mp++); |
| 231 | 220 | ||
| 232 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | 221 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; |
| 233 | |||
| 234 | return 1; | ||
| 235 | } | 222 | } |
| 236 | 223 | ||
| 237 | static int visws_trap_init(void); | 224 | static void visws_trap_init(void); |
| 238 | |||
| 239 | static struct x86_quirks visws_x86_quirks __initdata = { | ||
| 240 | .arch_time_init = visws_time_init, | ||
| 241 | .arch_pre_intr_init = visws_pre_intr_init, | ||
| 242 | .arch_memory_setup = visws_memory_setup, | ||
| 243 | .arch_intr_init = NULL, | ||
| 244 | .arch_trap_init = visws_trap_init, | ||
| 245 | .mach_get_smp_config = visws_get_smp_config, | ||
| 246 | .mach_find_smp_config = visws_find_smp_config, | ||
| 247 | }; | ||
| 248 | 225 | ||
| 249 | void __init visws_early_detect(void) | 226 | void __init visws_early_detect(void) |
| 250 | { | 227 | { |
| @@ -257,11 +234,14 @@ void __init visws_early_detect(void) | |||
| 257 | return; | 234 | return; |
| 258 | 235 | ||
| 259 | /* | 236 | /* |
| 260 | * Install special quirks for timer, interrupt and memory setup: | 237 | * Override the default platform setup functions |
| 261 | * Fall back to generic behavior for traps: | ||
| 262 | * Override generic MP-table parsing: | ||
| 263 | */ | 238 | */ |
| 264 | x86_quirks = &visws_x86_quirks; | 239 | x86_init.resources.memory_setup = visws_memory_setup; |
| 240 | x86_init.mpparse.get_smp_config = visws_get_smp_config; | ||
| 241 | x86_init.mpparse.find_smp_config = visws_find_smp_config; | ||
| 242 | x86_init.irqs.pre_vector_init = visws_pre_intr_init; | ||
| 243 | x86_init.irqs.trap_init = visws_trap_init; | ||
| 244 | x86_init.timers.timer_init = visws_time_init; | ||
| 265 | 245 | ||
| 266 | /* | 246 | /* |
| 267 | * Install reboot quirks: | 247 | * Install reboot quirks: |
| @@ -400,12 +380,10 @@ static __init void cobalt_init(void) | |||
| 400 | co_apic_read(CO_APIC_ID)); | 380 | co_apic_read(CO_APIC_ID)); |
| 401 | } | 381 | } |
| 402 | 382 | ||
| 403 | static int __init visws_trap_init(void) | 383 | static void __init visws_trap_init(void) |
| 404 | { | 384 | { |
| 405 | lithium_init(); | 385 | lithium_init(); |
| 406 | cobalt_init(); | 386 | cobalt_init(); |
| 407 | |||
| 408 | return 1; | ||
| 409 | } | 387 | } |
| 410 | 388 | ||
| 411 | /* | 389 | /* |
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c index 95a7289e4b0c..31e6f6cfe53e 100644 --- a/arch/x86/kernel/vmi_32.c +++ b/arch/x86/kernel/vmi_32.c | |||
| @@ -817,15 +817,15 @@ static inline int __init activate_vmi(void) | |||
| 817 | vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm); | 817 | vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm); |
| 818 | vmi_timer_ops.cancel_alarm = | 818 | vmi_timer_ops.cancel_alarm = |
| 819 | vmi_get_function(VMI_CALL_CancelAlarm); | 819 | vmi_get_function(VMI_CALL_CancelAlarm); |
| 820 | pv_time_ops.time_init = vmi_time_init; | 820 | x86_init.timers.timer_init = vmi_time_init; |
| 821 | pv_time_ops.get_wallclock = vmi_get_wallclock; | ||
| 822 | pv_time_ops.set_wallclock = vmi_set_wallclock; | ||
| 823 | #ifdef CONFIG_X86_LOCAL_APIC | 821 | #ifdef CONFIG_X86_LOCAL_APIC |
| 824 | pv_apic_ops.setup_boot_clock = vmi_time_bsp_init; | 822 | x86_init.timers.setup_percpu_clockev = vmi_time_bsp_init; |
| 825 | pv_apic_ops.setup_secondary_clock = vmi_time_ap_init; | 823 | x86_cpuinit.setup_percpu_clockev = vmi_time_ap_init; |
| 826 | #endif | 824 | #endif |
| 827 | pv_time_ops.sched_clock = vmi_sched_clock; | 825 | pv_time_ops.sched_clock = vmi_sched_clock; |
| 828 | pv_time_ops.get_tsc_khz = vmi_tsc_khz; | 826 | x86_platform.calibrate_tsc = vmi_tsc_khz; |
| 827 | x86_platform.get_wallclock = vmi_get_wallclock; | ||
| 828 | x86_platform.set_wallclock = vmi_set_wallclock; | ||
| 829 | 829 | ||
| 830 | /* We have true wallclock functions; disable CMOS clock sync */ | 830 | /* We have true wallclock functions; disable CMOS clock sync */ |
| 831 | no_sync_cmos_clock = 1; | 831 | no_sync_cmos_clock = 1; |
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c index 2b3eb82efeeb..611b9e2360d3 100644 --- a/arch/x86/kernel/vmiclock_32.c +++ b/arch/x86/kernel/vmiclock_32.c | |||
| @@ -68,7 +68,7 @@ unsigned long long vmi_sched_clock(void) | |||
| 68 | return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE)); | 68 | return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE)); |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | /* paravirt_ops.get_tsc_khz = vmi_tsc_khz */ | 71 | /* x86_platform.calibrate_tsc = vmi_tsc_khz */ |
| 72 | unsigned long vmi_tsc_khz(void) | 72 | unsigned long vmi_tsc_khz(void) |
| 73 | { | 73 | { |
| 74 | unsigned long long khz; | 74 | unsigned long long khz; |
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c index 25ee06a80aad..cf53a78e2dcf 100644 --- a/arch/x86/kernel/vsyscall_64.c +++ b/arch/x86/kernel/vsyscall_64.c | |||
| @@ -87,6 +87,7 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock) | |||
| 87 | vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec; | 87 | vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec; |
| 88 | vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec; | 88 | vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec; |
| 89 | vsyscall_gtod_data.wall_to_monotonic = wall_to_monotonic; | 89 | vsyscall_gtod_data.wall_to_monotonic = wall_to_monotonic; |
| 90 | vsyscall_gtod_data.wall_time_coarse = __current_kernel_time(); | ||
| 90 | write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags); | 91 | write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags); |
| 91 | } | 92 | } |
| 92 | 93 | ||
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c new file mode 100644 index 000000000000..4449a4a2c2ed --- /dev/null +++ b/arch/x86/kernel/x86_init.c | |||
| @@ -0,0 +1,75 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de> | ||
| 3 | * | ||
| 4 | * For licencing details see kernel-base/COPYING | ||
| 5 | */ | ||
| 6 | #include <linux/init.h> | ||
| 7 | |||
| 8 | #include <asm/bios_ebda.h> | ||
| 9 | #include <asm/paravirt.h> | ||
| 10 | #include <asm/mpspec.h> | ||
| 11 | #include <asm/setup.h> | ||
| 12 | #include <asm/apic.h> | ||
| 13 | #include <asm/e820.h> | ||
| 14 | #include <asm/time.h> | ||
| 15 | #include <asm/irq.h> | ||
| 16 | #include <asm/tsc.h> | ||
| 17 | |||
| 18 | void __cpuinit x86_init_noop(void) { } | ||
| 19 | void __init x86_init_uint_noop(unsigned int unused) { } | ||
| 20 | void __init x86_init_pgd_noop(pgd_t *unused) { } | ||
| 21 | |||
| 22 | /* | ||
| 23 | * The platform setup functions are preset with the default functions | ||
| 24 | * for standard PC hardware. | ||
| 25 | */ | ||
| 26 | struct x86_init_ops x86_init __initdata = { | ||
| 27 | |||
| 28 | .resources = { | ||
| 29 | .probe_roms = x86_init_noop, | ||
| 30 | .reserve_resources = reserve_standard_io_resources, | ||
| 31 | .memory_setup = default_machine_specific_memory_setup, | ||
| 32 | }, | ||
| 33 | |||
| 34 | .mpparse = { | ||
| 35 | .mpc_record = x86_init_uint_noop, | ||
| 36 | .setup_ioapic_ids = x86_init_noop, | ||
| 37 | .mpc_apic_id = default_mpc_apic_id, | ||
| 38 | .smp_read_mpc_oem = default_smp_read_mpc_oem, | ||
| 39 | .mpc_oem_bus_info = default_mpc_oem_bus_info, | ||
| 40 | .find_smp_config = default_find_smp_config, | ||
| 41 | .get_smp_config = default_get_smp_config, | ||
| 42 | }, | ||
| 43 | |||
| 44 | .irqs = { | ||
| 45 | .pre_vector_init = init_ISA_irqs, | ||
| 46 | .intr_init = native_init_IRQ, | ||
| 47 | .trap_init = x86_init_noop, | ||
| 48 | }, | ||
| 49 | |||
| 50 | .oem = { | ||
| 51 | .arch_setup = x86_init_noop, | ||
| 52 | .banner = default_banner, | ||
| 53 | }, | ||
| 54 | |||
| 55 | .paging = { | ||
| 56 | .pagetable_setup_start = native_pagetable_setup_start, | ||
| 57 | .pagetable_setup_done = native_pagetable_setup_done, | ||
| 58 | }, | ||
| 59 | |||
| 60 | .timers = { | ||
| 61 | .setup_percpu_clockev = setup_boot_APIC_clock, | ||
| 62 | .tsc_pre_init = x86_init_noop, | ||
| 63 | .timer_init = hpet_time_init, | ||
| 64 | }, | ||
| 65 | }; | ||
| 66 | |||
| 67 | struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = { | ||
| 68 | .setup_percpu_clockev = setup_secondary_APIC_clock, | ||
| 69 | }; | ||
| 70 | |||
| 71 | struct x86_platform_ops x86_platform = { | ||
| 72 | .calibrate_tsc = native_calibrate_tsc, | ||
| 73 | .get_wallclock = mach_get_cmos_time, | ||
| 74 | .set_wallclock = mach_set_rtc_mmss, | ||
| 75 | }; | ||
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index d677fa9ca650..4cb7d5d18b8e 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
| @@ -1262,7 +1262,6 @@ __init void lguest_init(void) | |||
| 1262 | */ | 1262 | */ |
| 1263 | 1263 | ||
| 1264 | /* Interrupt-related operations */ | 1264 | /* Interrupt-related operations */ |
| 1265 | pv_irq_ops.init_IRQ = lguest_init_IRQ; | ||
| 1266 | pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl); | 1265 | pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl); |
| 1267 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(lg_restore_fl); | 1266 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(lg_restore_fl); |
| 1268 | pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable); | 1267 | pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable); |
| @@ -1270,7 +1269,6 @@ __init void lguest_init(void) | |||
| 1270 | pv_irq_ops.safe_halt = lguest_safe_halt; | 1269 | pv_irq_ops.safe_halt = lguest_safe_halt; |
| 1271 | 1270 | ||
| 1272 | /* Setup operations */ | 1271 | /* Setup operations */ |
| 1273 | pv_init_ops.memory_setup = lguest_memory_setup; | ||
| 1274 | pv_init_ops.patch = lguest_patch; | 1272 | pv_init_ops.patch = lguest_patch; |
| 1275 | 1273 | ||
| 1276 | /* Intercepts of various CPU instructions */ | 1274 | /* Intercepts of various CPU instructions */ |
| @@ -1320,10 +1318,11 @@ __init void lguest_init(void) | |||
| 1320 | set_lguest_basic_apic_ops(); | 1318 | set_lguest_basic_apic_ops(); |
| 1321 | #endif | 1319 | #endif |
| 1322 | 1320 | ||
| 1323 | /* Time operations */ | 1321 | x86_init.resources.memory_setup = lguest_memory_setup; |
| 1324 | pv_time_ops.get_wallclock = lguest_get_wallclock; | 1322 | x86_init.irqs.intr_init = lguest_init_IRQ; |
| 1325 | pv_time_ops.time_init = lguest_time_init; | 1323 | x86_init.timers.timer_init = lguest_time_init; |
| 1326 | pv_time_ops.get_tsc_khz = lguest_tsc_khz; | 1324 | x86_platform.calibrate_tsc = lguest_tsc_khz; |
| 1325 | x86_platform.get_wallclock = lguest_get_wallclock; | ||
| 1327 | 1326 | ||
| 1328 | /* | 1327 | /* |
| 1329 | * Now is a good time to look at the implementations of these functions | 1328 | * Now is a good time to look at the implementations of these functions |
diff --git a/arch/x86/mm/kmemcheck/shadow.c b/arch/x86/mm/kmemcheck/shadow.c index e773b6bd0079..3f66b82076a3 100644 --- a/arch/x86/mm/kmemcheck/shadow.c +++ b/arch/x86/mm/kmemcheck/shadow.c | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | #include <linux/kmemcheck.h> | 1 | #include <linux/kmemcheck.h> |
| 2 | #include <linux/module.h> | 2 | #include <linux/module.h> |
| 3 | #include <linux/mm.h> | 3 | #include <linux/mm.h> |
| 4 | #include <linux/module.h> | ||
| 5 | 4 | ||
| 6 | #include <asm/page.h> | 5 | #include <asm/page.h> |
| 7 | #include <asm/pgtable.h> | 6 | #include <asm/pgtable.h> |
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c index 6a40b78b46aa..ee55754cc3c5 100644 --- a/arch/x86/vdso/vclock_gettime.c +++ b/arch/x86/vdso/vclock_gettime.c | |||
| @@ -86,14 +86,47 @@ notrace static noinline int do_monotonic(struct timespec *ts) | |||
| 86 | return 0; | 86 | return 0; |
| 87 | } | 87 | } |
| 88 | 88 | ||
| 89 | notrace static noinline int do_realtime_coarse(struct timespec *ts) | ||
| 90 | { | ||
| 91 | unsigned long seq; | ||
| 92 | do { | ||
| 93 | seq = read_seqbegin(>od->lock); | ||
| 94 | ts->tv_sec = gtod->wall_time_coarse.tv_sec; | ||
| 95 | ts->tv_nsec = gtod->wall_time_coarse.tv_nsec; | ||
| 96 | } while (unlikely(read_seqretry(>od->lock, seq))); | ||
| 97 | return 0; | ||
| 98 | } | ||
| 99 | |||
| 100 | notrace static noinline int do_monotonic_coarse(struct timespec *ts) | ||
| 101 | { | ||
| 102 | unsigned long seq, ns, secs; | ||
| 103 | do { | ||
| 104 | seq = read_seqbegin(>od->lock); | ||
| 105 | secs = gtod->wall_time_coarse.tv_sec; | ||
| 106 | ns = gtod->wall_time_coarse.tv_nsec; | ||
| 107 | secs += gtod->wall_to_monotonic.tv_sec; | ||
| 108 | ns += gtod->wall_to_monotonic.tv_nsec; | ||
| 109 | } while (unlikely(read_seqretry(>od->lock, seq))); | ||
| 110 | vset_normalized_timespec(ts, secs, ns); | ||
| 111 | return 0; | ||
| 112 | } | ||
| 113 | |||
| 89 | notrace int __vdso_clock_gettime(clockid_t clock, struct timespec *ts) | 114 | notrace int __vdso_clock_gettime(clockid_t clock, struct timespec *ts) |
| 90 | { | 115 | { |
| 91 | if (likely(gtod->sysctl_enabled && gtod->clock.vread)) | 116 | if (likely(gtod->sysctl_enabled)) |
| 92 | switch (clock) { | 117 | switch (clock) { |
| 93 | case CLOCK_REALTIME: | 118 | case CLOCK_REALTIME: |
| 94 | return do_realtime(ts); | 119 | if (likely(gtod->clock.vread)) |
| 120 | return do_realtime(ts); | ||
| 121 | break; | ||
| 95 | case CLOCK_MONOTONIC: | 122 | case CLOCK_MONOTONIC: |
| 96 | return do_monotonic(ts); | 123 | if (likely(gtod->clock.vread)) |
| 124 | return do_monotonic(ts); | ||
| 125 | break; | ||
| 126 | case CLOCK_REALTIME_COARSE: | ||
| 127 | return do_realtime_coarse(ts); | ||
| 128 | case CLOCK_MONOTONIC_COARSE: | ||
| 129 | return do_monotonic_coarse(ts); | ||
| 97 | } | 130 | } |
| 98 | return vdso_fallback_gettime(clock, ts); | 131 | return vdso_fallback_gettime(clock, ts); |
| 99 | } | 132 | } |
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index 0dd0c2c6cae0..544eb7496531 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
| @@ -912,19 +912,9 @@ static const struct pv_info xen_info __initdata = { | |||
| 912 | 912 | ||
| 913 | static const struct pv_init_ops xen_init_ops __initdata = { | 913 | static const struct pv_init_ops xen_init_ops __initdata = { |
| 914 | .patch = xen_patch, | 914 | .patch = xen_patch, |
| 915 | |||
| 916 | .banner = xen_banner, | ||
| 917 | .memory_setup = xen_memory_setup, | ||
| 918 | .arch_setup = xen_arch_setup, | ||
| 919 | .post_allocator_init = xen_post_allocator_init, | ||
| 920 | }; | 915 | }; |
| 921 | 916 | ||
| 922 | static const struct pv_time_ops xen_time_ops __initdata = { | 917 | static const struct pv_time_ops xen_time_ops __initdata = { |
| 923 | .time_init = xen_time_init, | ||
| 924 | |||
| 925 | .set_wallclock = xen_set_wallclock, | ||
| 926 | .get_wallclock = xen_get_wallclock, | ||
| 927 | .get_tsc_khz = xen_tsc_khz, | ||
| 928 | .sched_clock = xen_sched_clock, | 918 | .sched_clock = xen_sched_clock, |
| 929 | }; | 919 | }; |
| 930 | 920 | ||
| @@ -990,8 +980,6 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = { | |||
| 990 | 980 | ||
| 991 | static const struct pv_apic_ops xen_apic_ops __initdata = { | 981 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
| 992 | #ifdef CONFIG_X86_LOCAL_APIC | 982 | #ifdef CONFIG_X86_LOCAL_APIC |
| 993 | .setup_boot_clock = paravirt_nop, | ||
| 994 | .setup_secondary_clock = paravirt_nop, | ||
| 995 | .startup_ipi_hook = paravirt_nop, | 983 | .startup_ipi_hook = paravirt_nop, |
| 996 | #endif | 984 | #endif |
| 997 | }; | 985 | }; |
| @@ -1070,7 +1058,18 @@ asmlinkage void __init xen_start_kernel(void) | |||
| 1070 | pv_time_ops = xen_time_ops; | 1058 | pv_time_ops = xen_time_ops; |
| 1071 | pv_cpu_ops = xen_cpu_ops; | 1059 | pv_cpu_ops = xen_cpu_ops; |
| 1072 | pv_apic_ops = xen_apic_ops; | 1060 | pv_apic_ops = xen_apic_ops; |
| 1073 | pv_mmu_ops = xen_mmu_ops; | 1061 | |
| 1062 | x86_init.resources.memory_setup = xen_memory_setup; | ||
| 1063 | x86_init.oem.arch_setup = xen_arch_setup; | ||
| 1064 | x86_init.oem.banner = xen_banner; | ||
| 1065 | |||
| 1066 | x86_init.timers.timer_init = xen_time_init; | ||
| 1067 | x86_init.timers.setup_percpu_clockev = x86_init_noop; | ||
| 1068 | x86_cpuinit.setup_percpu_clockev = x86_init_noop; | ||
| 1069 | |||
| 1070 | x86_platform.calibrate_tsc = xen_tsc_khz; | ||
| 1071 | x86_platform.get_wallclock = xen_get_wallclock; | ||
| 1072 | x86_platform.set_wallclock = xen_set_wallclock; | ||
| 1074 | 1073 | ||
| 1075 | /* | 1074 | /* |
| 1076 | * Set up some pagetable state before starting to set any ptes. | 1075 | * Set up some pagetable state before starting to set any ptes. |
| @@ -1095,6 +1094,7 @@ asmlinkage void __init xen_start_kernel(void) | |||
| 1095 | */ | 1094 | */ |
| 1096 | xen_setup_stackprotector(); | 1095 | xen_setup_stackprotector(); |
| 1097 | 1096 | ||
| 1097 | xen_init_mmu_ops(); | ||
| 1098 | xen_init_irq_ops(); | 1098 | xen_init_irq_ops(); |
| 1099 | xen_init_cpuid_mask(); | 1099 | xen_init_cpuid_mask(); |
| 1100 | 1100 | ||
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c index cfd17799bd6d..9d30105a0c4a 100644 --- a/arch/x86/xen/irq.c +++ b/arch/x86/xen/irq.c | |||
| @@ -1,5 +1,7 @@ | |||
| 1 | #include <linux/hardirq.h> | 1 | #include <linux/hardirq.h> |
| 2 | 2 | ||
| 3 | #include <asm/x86_init.h> | ||
| 4 | |||
| 3 | #include <xen/interface/xen.h> | 5 | #include <xen/interface/xen.h> |
| 4 | #include <xen/interface/sched.h> | 6 | #include <xen/interface/sched.h> |
| 5 | #include <xen/interface/vcpu.h> | 7 | #include <xen/interface/vcpu.h> |
| @@ -112,8 +114,6 @@ static void xen_halt(void) | |||
| 112 | } | 114 | } |
| 113 | 115 | ||
| 114 | static const struct pv_irq_ops xen_irq_ops __initdata = { | 116 | static const struct pv_irq_ops xen_irq_ops __initdata = { |
| 115 | .init_IRQ = xen_init_IRQ, | ||
| 116 | |||
| 117 | .save_fl = PV_CALLEE_SAVE(xen_save_fl), | 117 | .save_fl = PV_CALLEE_SAVE(xen_save_fl), |
| 118 | .restore_fl = PV_CALLEE_SAVE(xen_restore_fl), | 118 | .restore_fl = PV_CALLEE_SAVE(xen_restore_fl), |
| 119 | .irq_disable = PV_CALLEE_SAVE(xen_irq_disable), | 119 | .irq_disable = PV_CALLEE_SAVE(xen_irq_disable), |
| @@ -129,4 +129,5 @@ static const struct pv_irq_ops xen_irq_ops __initdata = { | |||
| 129 | void __init xen_init_irq_ops() | 129 | void __init xen_init_irq_ops() |
| 130 | { | 130 | { |
| 131 | pv_irq_ops = xen_irq_ops; | 131 | pv_irq_ops = xen_irq_ops; |
| 132 | x86_init.irqs.intr_init = xen_init_IRQ; | ||
| 132 | } | 133 | } |
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 4ceb28581652..093dd59b5385 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c | |||
| @@ -1229,9 +1229,12 @@ static __init void xen_pagetable_setup_start(pgd_t *base) | |||
| 1229 | { | 1229 | { |
| 1230 | } | 1230 | } |
| 1231 | 1231 | ||
| 1232 | static void xen_post_allocator_init(void); | ||
| 1233 | |||
| 1232 | static __init void xen_pagetable_setup_done(pgd_t *base) | 1234 | static __init void xen_pagetable_setup_done(pgd_t *base) |
| 1233 | { | 1235 | { |
| 1234 | xen_setup_shared_info(); | 1236 | xen_setup_shared_info(); |
| 1237 | xen_post_allocator_init(); | ||
| 1235 | } | 1238 | } |
| 1236 | 1239 | ||
| 1237 | static void xen_write_cr2(unsigned long cr2) | 1240 | static void xen_write_cr2(unsigned long cr2) |
| @@ -1841,7 +1844,7 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) | |||
| 1841 | #endif | 1844 | #endif |
| 1842 | } | 1845 | } |
| 1843 | 1846 | ||
| 1844 | __init void xen_post_allocator_init(void) | 1847 | static __init void xen_post_allocator_init(void) |
| 1845 | { | 1848 | { |
| 1846 | pv_mmu_ops.set_pte = xen_set_pte; | 1849 | pv_mmu_ops.set_pte = xen_set_pte; |
| 1847 | pv_mmu_ops.set_pmd = xen_set_pmd; | 1850 | pv_mmu_ops.set_pmd = xen_set_pmd; |
| @@ -1875,10 +1878,7 @@ static void xen_leave_lazy_mmu(void) | |||
| 1875 | preempt_enable(); | 1878 | preempt_enable(); |
| 1876 | } | 1879 | } |
| 1877 | 1880 | ||
| 1878 | const struct pv_mmu_ops xen_mmu_ops __initdata = { | 1881 | static const struct pv_mmu_ops xen_mmu_ops __initdata = { |
| 1879 | .pagetable_setup_start = xen_pagetable_setup_start, | ||
| 1880 | .pagetable_setup_done = xen_pagetable_setup_done, | ||
| 1881 | |||
| 1882 | .read_cr2 = xen_read_cr2, | 1882 | .read_cr2 = xen_read_cr2, |
| 1883 | .write_cr2 = xen_write_cr2, | 1883 | .write_cr2 = xen_write_cr2, |
| 1884 | 1884 | ||
| @@ -1954,6 +1954,12 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = { | |||
| 1954 | .set_fixmap = xen_set_fixmap, | 1954 | .set_fixmap = xen_set_fixmap, |
| 1955 | }; | 1955 | }; |
| 1956 | 1956 | ||
| 1957 | void __init xen_init_mmu_ops(void) | ||
| 1958 | { | ||
| 1959 | x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start; | ||
| 1960 | x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done; | ||
| 1961 | pv_mmu_ops = xen_mmu_ops; | ||
| 1962 | } | ||
| 1957 | 1963 | ||
| 1958 | #ifdef CONFIG_XEN_DEBUG_FS | 1964 | #ifdef CONFIG_XEN_DEBUG_FS |
| 1959 | 1965 | ||
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h index da7302624897..5fe6bc7f5ecf 100644 --- a/arch/x86/xen/mmu.h +++ b/arch/x86/xen/mmu.h | |||
| @@ -59,5 +59,5 @@ void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | |||
| 59 | 59 | ||
| 60 | unsigned long xen_read_cr2_direct(void); | 60 | unsigned long xen_read_cr2_direct(void); |
| 61 | 61 | ||
| 62 | extern const struct pv_mmu_ops xen_mmu_ops; | 62 | extern void xen_init_mmu_ops(void); |
| 63 | #endif /* _XEN_MMU_H */ | 63 | #endif /* _XEN_MMU_H */ |
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index 22494fd4c9b5..355fa6b99c9c 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h | |||
| @@ -30,8 +30,6 @@ pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn); | |||
| 30 | void xen_ident_map_ISA(void); | 30 | void xen_ident_map_ISA(void); |
| 31 | void xen_reserve_top(void); | 31 | void xen_reserve_top(void); |
| 32 | 32 | ||
| 33 | void xen_post_allocator_init(void); | ||
| 34 | |||
| 35 | char * __init xen_memory_setup(void); | 33 | char * __init xen_memory_setup(void); |
| 36 | void __init xen_arch_setup(void); | 34 | void __init xen_arch_setup(void); |
| 37 | void __init xen_init_IRQ(void); | 35 | void __init xen_init_IRQ(void); |
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c index 8848120d291b..19085ff0484a 100644 --- a/arch/xtensa/kernel/time.c +++ b/arch/xtensa/kernel/time.c | |||
| @@ -59,9 +59,8 @@ static struct irqaction timer_irqaction = { | |||
| 59 | 59 | ||
| 60 | void __init time_init(void) | 60 | void __init time_init(void) |
| 61 | { | 61 | { |
| 62 | xtime.tv_nsec = 0; | 62 | /* FIXME: xtime&wall_to_monotonic are set in timekeeping_init. */ |
| 63 | xtime.tv_sec = read_persistent_clock(); | 63 | read_persistent_clock(&xtime); |
| 64 | |||
| 65 | set_normalized_timespec(&wall_to_monotonic, | 64 | set_normalized_timespec(&wall_to_monotonic, |
| 66 | -xtime.tv_sec, -xtime.tv_nsec); | 65 | -xtime.tv_sec, -xtime.tv_nsec); |
| 67 | 66 | ||
diff --git a/block/bsg.c b/block/bsg.c index 5f184bb3ff9e..0676301f16d0 100644 --- a/block/bsg.c +++ b/block/bsg.c | |||
| @@ -1062,7 +1062,7 @@ EXPORT_SYMBOL_GPL(bsg_register_queue); | |||
| 1062 | 1062 | ||
| 1063 | static struct cdev bsg_cdev; | 1063 | static struct cdev bsg_cdev; |
| 1064 | 1064 | ||
| 1065 | static char *bsg_nodename(struct device *dev) | 1065 | static char *bsg_devnode(struct device *dev, mode_t *mode) |
| 1066 | { | 1066 | { |
| 1067 | return kasprintf(GFP_KERNEL, "bsg/%s", dev_name(dev)); | 1067 | return kasprintf(GFP_KERNEL, "bsg/%s", dev_name(dev)); |
| 1068 | } | 1068 | } |
| @@ -1087,7 +1087,7 @@ static int __init bsg_init(void) | |||
| 1087 | ret = PTR_ERR(bsg_class); | 1087 | ret = PTR_ERR(bsg_class); |
| 1088 | goto destroy_kmemcache; | 1088 | goto destroy_kmemcache; |
| 1089 | } | 1089 | } |
| 1090 | bsg_class->nodename = bsg_nodename; | 1090 | bsg_class->devnode = bsg_devnode; |
| 1091 | 1091 | ||
| 1092 | ret = alloc_chrdev_region(&devid, 0, BSG_MAX_DEVS, "bsg"); | 1092 | ret = alloc_chrdev_region(&devid, 0, BSG_MAX_DEVS, "bsg"); |
| 1093 | if (ret) | 1093 | if (ret) |
diff --git a/block/genhd.c b/block/genhd.c index 2ad91ddad8e2..517e4332cb37 100644 --- a/block/genhd.c +++ b/block/genhd.c | |||
| @@ -998,12 +998,12 @@ struct class block_class = { | |||
| 998 | .name = "block", | 998 | .name = "block", |
| 999 | }; | 999 | }; |
| 1000 | 1000 | ||
| 1001 | static char *block_nodename(struct device *dev) | 1001 | static char *block_devnode(struct device *dev, mode_t *mode) |
| 1002 | { | 1002 | { |
| 1003 | struct gendisk *disk = dev_to_disk(dev); | 1003 | struct gendisk *disk = dev_to_disk(dev); |
| 1004 | 1004 | ||
| 1005 | if (disk->nodename) | 1005 | if (disk->devnode) |
| 1006 | return disk->nodename(disk); | 1006 | return disk->devnode(disk, mode); |
| 1007 | return NULL; | 1007 | return NULL; |
| 1008 | } | 1008 | } |
| 1009 | 1009 | ||
| @@ -1011,7 +1011,7 @@ static struct device_type disk_type = { | |||
| 1011 | .name = "disk", | 1011 | .name = "disk", |
| 1012 | .groups = disk_attr_groups, | 1012 | .groups = disk_attr_groups, |
| 1013 | .release = disk_release, | 1013 | .release = disk_release, |
| 1014 | .nodename = block_nodename, | 1014 | .devnode = block_devnode, |
| 1015 | }; | 1015 | }; |
| 1016 | 1016 | ||
| 1017 | #ifdef CONFIG_PROC_FS | 1017 | #ifdef CONFIG_PROC_FS |
diff --git a/drivers/base/core.c b/drivers/base/core.c index 390e664ec1c7..6bee6af8d8e1 100644 --- a/drivers/base/core.c +++ b/drivers/base/core.c | |||
| @@ -166,13 +166,16 @@ static int dev_uevent(struct kset *kset, struct kobject *kobj, | |||
| 166 | if (MAJOR(dev->devt)) { | 166 | if (MAJOR(dev->devt)) { |
| 167 | const char *tmp; | 167 | const char *tmp; |
| 168 | const char *name; | 168 | const char *name; |
| 169 | mode_t mode = 0; | ||
| 169 | 170 | ||
| 170 | add_uevent_var(env, "MAJOR=%u", MAJOR(dev->devt)); | 171 | add_uevent_var(env, "MAJOR=%u", MAJOR(dev->devt)); |
| 171 | add_uevent_var(env, "MINOR=%u", MINOR(dev->devt)); | 172 | add_uevent_var(env, "MINOR=%u", MINOR(dev->devt)); |
| 172 | name = device_get_nodename(dev, &tmp); | 173 | name = device_get_devnode(dev, &mode, &tmp); |
| 173 | if (name) { | 174 | if (name) { |
| 174 | add_uevent_var(env, "DEVNAME=%s", name); | 175 | add_uevent_var(env, "DEVNAME=%s", name); |
| 175 | kfree(tmp); | 176 | kfree(tmp); |
| 177 | if (mode) | ||
| 178 | add_uevent_var(env, "DEVMODE=%#o", mode & 0777); | ||
| 176 | } | 179 | } |
| 177 | } | 180 | } |
| 178 | 181 | ||
| @@ -1148,8 +1151,9 @@ static struct device *next_device(struct klist_iter *i) | |||
| 1148 | } | 1151 | } |
| 1149 | 1152 | ||
| 1150 | /** | 1153 | /** |
| 1151 | * device_get_nodename - path of device node file | 1154 | * device_get_devnode - path of device node file |
| 1152 | * @dev: device | 1155 | * @dev: device |
| 1156 | * @mode: returned file access mode | ||
| 1153 | * @tmp: possibly allocated string | 1157 | * @tmp: possibly allocated string |
| 1154 | * | 1158 | * |
| 1155 | * Return the relative path of a possible device node. | 1159 | * Return the relative path of a possible device node. |
| @@ -1157,21 +1161,22 @@ static struct device *next_device(struct klist_iter *i) | |||
| 1157 | * a name. This memory is returned in tmp and needs to be | 1161 | * a name. This memory is returned in tmp and needs to be |
| 1158 | * freed by the caller. | 1162 | * freed by the caller. |
| 1159 | */ | 1163 | */ |
| 1160 | const char *device_get_nodename(struct device *dev, const char **tmp) | 1164 | const char *device_get_devnode(struct device *dev, |
| 1165 | mode_t *mode, const char **tmp) | ||
| 1161 | { | 1166 | { |
| 1162 | char *s; | 1167 | char *s; |
| 1163 | 1168 | ||
| 1164 | *tmp = NULL; | 1169 | *tmp = NULL; |
| 1165 | 1170 | ||
| 1166 | /* the device type may provide a specific name */ | 1171 | /* the device type may provide a specific name */ |
| 1167 | if (dev->type && dev->type->nodename) | 1172 | if (dev->type && dev->type->devnode) |
| 1168 | *tmp = dev->type->nodename(dev); | 1173 | *tmp = dev->type->devnode(dev, mode); |
| 1169 | if (*tmp) | 1174 | if (*tmp) |
| 1170 | return *tmp; | 1175 | return *tmp; |
| 1171 | 1176 | ||
| 1172 | /* the class may provide a specific name */ | 1177 | /* the class may provide a specific name */ |
| 1173 | if (dev->class && dev->class->nodename) | 1178 | if (dev->class && dev->class->devnode) |
| 1174 | *tmp = dev->class->nodename(dev); | 1179 | *tmp = dev->class->devnode(dev, mode); |
| 1175 | if (*tmp) | 1180 | if (*tmp) |
| 1176 | return *tmp; | 1181 | return *tmp; |
| 1177 | 1182 | ||
diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c index fd488ad4263a..a1cb5afe6801 100644 --- a/drivers/base/devtmpfs.c +++ b/drivers/base/devtmpfs.c | |||
| @@ -6,9 +6,10 @@ | |||
| 6 | * During bootup, before any driver core device is registered, | 6 | * During bootup, before any driver core device is registered, |
| 7 | * devtmpfs, a tmpfs-based filesystem is created. Every driver-core | 7 | * devtmpfs, a tmpfs-based filesystem is created. Every driver-core |
| 8 | * device which requests a device node, will add a node in this | 8 | * device which requests a device node, will add a node in this |
| 9 | * filesystem. The node is named after the the name of the device, | 9 | * filesystem. |
| 10 | * or the susbsytem can provide a custom name. All devices are | 10 | * By default, all devices are named after the the name of the |
| 11 | * owned by root and have a mode of 0600. | 11 | * device, owned by root and have a default mode of 0600. Subsystems |
| 12 | * can overwrite the default setting if needed. | ||
| 12 | */ | 13 | */ |
| 13 | 14 | ||
| 14 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
| @@ -20,6 +21,7 @@ | |||
| 20 | #include <linux/fs.h> | 21 | #include <linux/fs.h> |
| 21 | #include <linux/shmem_fs.h> | 22 | #include <linux/shmem_fs.h> |
| 22 | #include <linux/cred.h> | 23 | #include <linux/cred.h> |
| 24 | #include <linux/sched.h> | ||
| 23 | #include <linux/init_task.h> | 25 | #include <linux/init_task.h> |
| 24 | 26 | ||
| 25 | static struct vfsmount *dev_mnt; | 27 | static struct vfsmount *dev_mnt; |
| @@ -134,7 +136,7 @@ int devtmpfs_create_node(struct device *dev) | |||
| 134 | const char *tmp = NULL; | 136 | const char *tmp = NULL; |
| 135 | const char *nodename; | 137 | const char *nodename; |
| 136 | const struct cred *curr_cred; | 138 | const struct cred *curr_cred; |
| 137 | mode_t mode; | 139 | mode_t mode = 0; |
| 138 | struct nameidata nd; | 140 | struct nameidata nd; |
| 139 | struct dentry *dentry; | 141 | struct dentry *dentry; |
| 140 | int err; | 142 | int err; |
| @@ -142,14 +144,16 @@ int devtmpfs_create_node(struct device *dev) | |||
| 142 | if (!dev_mnt) | 144 | if (!dev_mnt) |
| 143 | return 0; | 145 | return 0; |
| 144 | 146 | ||
| 145 | nodename = device_get_nodename(dev, &tmp); | 147 | nodename = device_get_devnode(dev, &mode, &tmp); |
| 146 | if (!nodename) | 148 | if (!nodename) |
| 147 | return -ENOMEM; | 149 | return -ENOMEM; |
| 148 | 150 | ||
| 151 | if (mode == 0) | ||
| 152 | mode = 0600; | ||
| 149 | if (is_blockdev(dev)) | 153 | if (is_blockdev(dev)) |
| 150 | mode = S_IFBLK|0600; | 154 | mode |= S_IFBLK; |
| 151 | else | 155 | else |
| 152 | mode = S_IFCHR|0600; | 156 | mode |= S_IFCHR; |
| 153 | 157 | ||
| 154 | curr_cred = override_creds(&init_cred); | 158 | curr_cred = override_creds(&init_cred); |
| 155 | err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, | 159 | err = vfs_path_lookup(dev_mnt->mnt_root, dev_mnt, |
| @@ -165,8 +169,12 @@ int devtmpfs_create_node(struct device *dev) | |||
| 165 | 169 | ||
| 166 | dentry = lookup_create(&nd, 0); | 170 | dentry = lookup_create(&nd, 0); |
| 167 | if (!IS_ERR(dentry)) { | 171 | if (!IS_ERR(dentry)) { |
| 172 | int umask; | ||
| 173 | |||
| 174 | umask = sys_umask(0000); | ||
| 168 | err = vfs_mknod(nd.path.dentry->d_inode, | 175 | err = vfs_mknod(nd.path.dentry->d_inode, |
| 169 | dentry, mode, dev->devt); | 176 | dentry, mode, dev->devt); |
| 177 | sys_umask(umask); | ||
| 170 | /* mark as kernel created inode */ | 178 | /* mark as kernel created inode */ |
| 171 | if (!err) | 179 | if (!err) |
| 172 | dentry->d_inode->i_private = &dev_mnt; | 180 | dentry->d_inode->i_private = &dev_mnt; |
| @@ -271,7 +279,7 @@ int devtmpfs_delete_node(struct device *dev) | |||
| 271 | if (!dev_mnt) | 279 | if (!dev_mnt) |
| 272 | return 0; | 280 | return 0; |
| 273 | 281 | ||
| 274 | nodename = device_get_nodename(dev, &tmp); | 282 | nodename = device_get_devnode(dev, NULL, &tmp); |
| 275 | if (!nodename) | 283 | if (!nodename) |
| 276 | return -ENOMEM; | 284 | return -ENOMEM; |
| 277 | 285 | ||
diff --git a/drivers/block/aoe/aoechr.c b/drivers/block/aoe/aoechr.c index 19888354188f..62141ec09a22 100644 --- a/drivers/block/aoe/aoechr.c +++ b/drivers/block/aoe/aoechr.c | |||
| @@ -266,7 +266,7 @@ static const struct file_operations aoe_fops = { | |||
| 266 | .owner = THIS_MODULE, | 266 | .owner = THIS_MODULE, |
| 267 | }; | 267 | }; |
| 268 | 268 | ||
| 269 | static char *aoe_nodename(struct device *dev) | 269 | static char *aoe_devnode(struct device *dev, mode_t *mode) |
| 270 | { | 270 | { |
| 271 | return kasprintf(GFP_KERNEL, "etherd/%s", dev_name(dev)); | 271 | return kasprintf(GFP_KERNEL, "etherd/%s", dev_name(dev)); |
| 272 | } | 272 | } |
| @@ -288,7 +288,7 @@ aoechr_init(void) | |||
| 288 | unregister_chrdev(AOE_MAJOR, "aoechr"); | 288 | unregister_chrdev(AOE_MAJOR, "aoechr"); |
| 289 | return PTR_ERR(aoe_class); | 289 | return PTR_ERR(aoe_class); |
| 290 | } | 290 | } |
| 291 | aoe_class->nodename = aoe_nodename; | 291 | aoe_class->devnode = aoe_devnode; |
| 292 | 292 | ||
| 293 | for (i = 0; i < ARRAY_SIZE(chardevs); ++i) | 293 | for (i = 0; i < ARRAY_SIZE(chardevs); ++i) |
| 294 | device_create(aoe_class, NULL, | 294 | device_create(aoe_class, NULL, |
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c index 95f11cdef203..fd5bb8ad59a9 100644 --- a/drivers/block/pktcdvd.c +++ b/drivers/block/pktcdvd.c | |||
| @@ -2857,7 +2857,7 @@ static struct block_device_operations pktcdvd_ops = { | |||
| 2857 | .media_changed = pkt_media_changed, | 2857 | .media_changed = pkt_media_changed, |
| 2858 | }; | 2858 | }; |
| 2859 | 2859 | ||
| 2860 | static char *pktcdvd_nodename(struct gendisk *gd) | 2860 | static char *pktcdvd_devnode(struct gendisk *gd, mode_t *mode) |
| 2861 | { | 2861 | { |
| 2862 | return kasprintf(GFP_KERNEL, "pktcdvd/%s", gd->disk_name); | 2862 | return kasprintf(GFP_KERNEL, "pktcdvd/%s", gd->disk_name); |
| 2863 | } | 2863 | } |
| @@ -2914,7 +2914,7 @@ static int pkt_setup_dev(dev_t dev, dev_t* pkt_dev) | |||
| 2914 | disk->fops = &pktcdvd_ops; | 2914 | disk->fops = &pktcdvd_ops; |
| 2915 | disk->flags = GENHD_FL_REMOVABLE; | 2915 | disk->flags = GENHD_FL_REMOVABLE; |
| 2916 | strcpy(disk->disk_name, pd->name); | 2916 | strcpy(disk->disk_name, pd->name); |
| 2917 | disk->nodename = pktcdvd_nodename; | 2917 | disk->devnode = pktcdvd_devnode; |
| 2918 | disk->private_data = pd; | 2918 | disk->private_data = pd; |
| 2919 | disk->queue = blk_alloc_queue(GFP_KERNEL); | 2919 | disk->queue = blk_alloc_queue(GFP_KERNEL); |
| 2920 | if (!disk->queue) | 2920 | if (!disk->queue) |
| @@ -3070,7 +3070,7 @@ static const struct file_operations pkt_ctl_fops = { | |||
| 3070 | static struct miscdevice pkt_misc = { | 3070 | static struct miscdevice pkt_misc = { |
| 3071 | .minor = MISC_DYNAMIC_MINOR, | 3071 | .minor = MISC_DYNAMIC_MINOR, |
| 3072 | .name = DRIVER_NAME, | 3072 | .name = DRIVER_NAME, |
| 3073 | .name = "pktcdvd/control", | 3073 | .nodename = "pktcdvd/control", |
| 3074 | .fops = &pkt_ctl_fops | 3074 | .fops = &pkt_ctl_fops |
| 3075 | }; | 3075 | }; |
| 3076 | 3076 | ||
diff --git a/drivers/char/cyclades.c b/drivers/char/cyclades.c index 2dafc2da0648..df5038bbcbc2 100644 --- a/drivers/char/cyclades.c +++ b/drivers/char/cyclades.c | |||
| @@ -11,7 +11,7 @@ | |||
| 11 | * Initially written by Randolph Bentson <bentson@grieg.seaslug.org>. | 11 | * Initially written by Randolph Bentson <bentson@grieg.seaslug.org>. |
| 12 | * Modified and maintained by Marcio Saito <marcio@cyclades.com>. | 12 | * Modified and maintained by Marcio Saito <marcio@cyclades.com>. |
| 13 | * | 13 | * |
| 14 | * Copyright (C) 2007 Jiri Slaby <jirislaby@gmail.com> | 14 | * Copyright (C) 2007-2009 Jiri Slaby <jirislaby@gmail.com> |
| 15 | * | 15 | * |
| 16 | * Much of the design and some of the code came from serial.c | 16 | * Much of the design and some of the code came from serial.c |
| 17 | * which was copyright (C) 1991, 1992 Linus Torvalds. It was | 17 | * which was copyright (C) 1991, 1992 Linus Torvalds. It was |
| @@ -19,577 +19,9 @@ | |||
| 19 | * and then fixed as suggested by Michael K. Johnson 12/12/92. | 19 | * and then fixed as suggested by Michael K. Johnson 12/12/92. |
| 20 | * Converted to pci probing and cleaned up by Jiri Slaby. | 20 | * Converted to pci probing and cleaned up by Jiri Slaby. |
| 21 | * | 21 | * |
| 22 | * This version supports shared IRQ's (only for PCI boards). | ||
| 23 | * | ||
| 24 | * Prevent users from opening non-existing Z ports. | ||
| 25 | * | ||
| 26 | * Revision 2.3.2.8 2000/07/06 18:14:16 ivan | ||
| 27 | * Fixed the PCI detection function to work properly on Alpha systems. | ||
| 28 | * Implemented support for TIOCSERGETLSR ioctl. | ||
| 29 | * Implemented full support for non-standard baud rates. | ||
| 30 | * | ||
| 31 | * Revision 2.3.2.7 2000/06/01 18:26:34 ivan | ||
| 32 | * Request PLX I/O region, although driver doesn't use it, to avoid | ||
| 33 | * problems with other drivers accessing it. | ||
| 34 | * Removed count for on-board buffer characters in cy_chars_in_buffer | ||
| 35 | * (Cyclades-Z only). | ||
| 36 | * | ||
| 37 | * Revision 2.3.2.6 2000/05/05 13:56:05 ivan | ||
| 38 | * Driver now reports physical instead of virtual memory addresses. | ||
| 39 | * Masks were added to some Cyclades-Z read accesses. | ||
| 40 | * Implemented workaround for PLX9050 bug that would cause a system lockup | ||
| 41 | * in certain systems, depending on the MMIO addresses allocated to the | ||
| 42 | * board. | ||
| 43 | * Changed the Tx interrupt programming in the CD1400 chips to boost up | ||
| 44 | * performance (Cyclom-Y only). | ||
| 45 | * Code is now compliant with the new module interface (module_[init|exit]). | ||
| 46 | * Make use of the PCI helper functions to access PCI resources. | ||
| 47 | * Did some code "housekeeping". | ||
| 48 | * | ||
| 49 | * Revision 2.3.2.5 2000/01/19 14:35:33 ivan | ||
| 50 | * Fixed bug in cy_set_termios on CRTSCTS flag turnoff. | ||
| 51 | * | ||
| 52 | * Revision 2.3.2.4 2000/01/17 09:19:40 ivan | ||
| 53 | * Fixed SMP locking in Cyclom-Y interrupt handler. | ||
| 54 | * | ||
| 55 | * Revision 2.3.2.3 1999/12/28 12:11:39 ivan | ||
| 56 | * Added a new cyclades_card field called nports to allow the driver to | ||
| 57 | * know the exact number of ports found by the Z firmware after its load; | ||
| 58 | * RX buffer contention prevention logic on interrupt op mode revisited | ||
| 59 | * (Cyclades-Z only); | ||
| 60 | * Revisited printk's for Z debug; | ||
| 61 | * Driver now makes sure that the constant SERIAL_XMIT_SIZE is defined; | ||
| 62 | * | ||
| 63 | * Revision 2.3.2.2 1999/10/01 11:27:43 ivan | ||
| 64 | * Fixed bug in cyz_poll that would make all ports but port 0 | ||
| 65 | * unable to transmit/receive data (Cyclades-Z only); | ||
| 66 | * Implemented logic to prevent the RX buffer from being stuck with data | ||
| 67 | * due to a driver / firmware race condition in interrupt op mode | ||
| 68 | * (Cyclades-Z only); | ||
| 69 | * Fixed bug in block_til_ready logic that would lead to a system crash; | ||
| 70 | * Revisited cy_close spinlock usage; | ||
| 71 | * | ||
| 72 | * Revision 2.3.2.1 1999/09/28 11:01:22 ivan | ||
| 73 | * Revisited CONFIG_PCI conditional compilation for PCI board support; | ||
| 74 | * Implemented TIOCGICOUNT and TIOCMIWAIT ioctl support; | ||
| 75 | * _Major_ cleanup on the Cyclades-Z interrupt support code / logic; | ||
| 76 | * Removed CTS handling from the driver -- this is now completely handled | ||
| 77 | * by the firmware (Cyclades-Z only); | ||
| 78 | * Flush RX on-board buffers on a port open (Cyclades-Z only); | ||
| 79 | * Fixed handling of ASYNC_SPD_* TTY flags; | ||
| 80 | * Module unload now unmaps all memory area allocated by ioremap; | ||
| 81 | * | ||
| 82 | * Revision 2.3.1.1 1999/07/15 16:45:53 ivan | ||
| 83 | * Removed CY_PROC conditional compilation; | ||
| 84 | * Implemented SMP-awareness for the driver; | ||
| 85 | * Implemented a new ISA IRQ autoprobe that uses the irq_probe_[on|off] | ||
| 86 | * functions; | ||
| 87 | * The driver now accepts memory addresses (maddr=0xMMMMM) and IRQs | ||
| 88 | * (irq=NN) as parameters (only for ISA boards); | ||
| 89 | * Fixed bug in set_line_char that would prevent the Cyclades-Z | ||
| 90 | * ports from being configured at speeds above 115.2Kbps; | ||
| 91 | * Fixed bug in cy_set_termios that would prevent XON/XOFF flow control | ||
| 92 | * switching from working properly; | ||
| 93 | * The driver now only prints IRQ info for the Cyclades-Z if it's | ||
| 94 | * configured to work in interrupt mode; | ||
| 95 | * | ||
| 96 | * Revision 2.2.2.3 1999/06/28 11:13:29 ivan | ||
| 97 | * Added support for interrupt mode operation for the Z cards; | ||
| 98 | * Removed the driver inactivity control for the Z; | ||
| 99 | * Added a missing MOD_DEC_USE_COUNT in the cy_open function for when | ||
| 100 | * the Z firmware is not loaded yet; | ||
| 101 | * Replaced the "manual" Z Tx flush buffer by a call to a FW command of | ||
| 102 | * same functionality; | ||
| 103 | * Implemented workaround for IRQ setting loss on the PCI configuration | ||
| 104 | * registers after a PCI bridge EEPROM reload (affects PLX9060 only); | ||
| 105 | * | ||
| 106 | * Revision 2.2.2.2 1999/05/14 17:18:15 ivan | ||
| 107 | * /proc entry location changed to /proc/tty/driver/cyclades; | ||
| 108 | * Added support to shared IRQ's (only for PCI boards); | ||
| 109 | * Added support for Cobalt Qube2 systems; | ||
| 110 | * IRQ [de]allocation scheme revisited; | ||
| 111 | * BREAK implementation changed in order to make use of the 'break_ctl' | ||
| 112 | * TTY facility; | ||
| 113 | * Fixed typo in TTY structure field 'driver_name'; | ||
| 114 | * Included a PCI bridge reset and EEPROM reload in the board | ||
| 115 | * initialization code (for both Y and Z series). | ||
| 116 | * | ||
| 117 | * Revision 2.2.2.1 1999/04/08 16:17:43 ivan | ||
| 118 | * Fixed a bug in cy_wait_until_sent that was preventing the port to be | ||
| 119 | * closed properly after a SIGINT; | ||
| 120 | * Module usage counter scheme revisited; | ||
| 121 | * Added support to the upcoming Y PCI boards (i.e., support to additional | ||
| 122 | * PCI Device ID's). | ||
| 123 | * | ||
| 124 | * Revision 2.2.1.10 1999/01/20 16:14:29 ivan | ||
| 125 | * Removed all unnecessary page-alignement operations in ioremap calls | ||
| 126 | * (ioremap is currently safe for these operations). | ||
| 127 | * | ||
| 128 | * Revision 2.2.1.9 1998/12/30 18:18:30 ivan | ||
| 129 | * Changed access to PLX PCI bridge registers from I/O to MMIO, in | ||
| 130 | * order to make PLX9050-based boards work with certain motherboards. | ||
| 131 | * | ||
| 132 | * Revision 2.2.1.8 1998/11/13 12:46:20 ivan | ||
| 133 | * cy_close function now resets (correctly) the tty->closing flag; | ||
| 134 | * JIFFIES_DIFF macro fixed. | ||
| 135 | * | ||
| 136 | * Revision 2.2.1.7 1998/09/03 12:07:28 ivan | ||
| 137 | * Fixed bug in cy_close function, which was not informing HW of | ||
| 138 | * which port should have the reception disabled before doing so; | ||
| 139 | * fixed Cyclom-8YoP hardware detection bug. | ||
| 140 | * | ||
| 141 | * Revision 2.2.1.6 1998/08/20 17:15:39 ivan | ||
| 142 | * Fixed bug in cy_close function, which causes malfunction | ||
| 143 | * of one of the first 4 ports when a higher port is closed | ||
| 144 | * (Cyclom-Y only). | ||
| 145 | * | ||
| 146 | * Revision 2.2.1.5 1998/08/10 18:10:28 ivan | ||
| 147 | * Fixed Cyclom-4Yo hardware detection bug. | ||
| 148 | * | ||
| 149 | * Revision 2.2.1.4 1998/08/04 11:02:50 ivan | ||
| 150 | * /proc/cyclades implementation with great collaboration of | ||
| 151 | * Marc Lewis <marc@blarg.net>; | ||
| 152 | * cyy_interrupt was changed to avoid occurrence of kernel oopses | ||
| 153 | * during PPP operation. | ||
| 154 | * | ||
| 155 | * Revision 2.2.1.3 1998/06/01 12:09:10 ivan | ||
| 156 | * General code review in order to comply with 2.1 kernel standards; | ||
| 157 | * data loss prevention for slow devices revisited (cy_wait_until_sent | ||
| 158 | * was created); | ||
| 159 | * removed conditional compilation for new/old PCI structure support | ||
| 160 | * (now the driver only supports the new PCI structure). | ||
| 161 | * | ||
| 162 | * Revision 2.2.1.1 1998/03/19 16:43:12 ivan | ||
| 163 | * added conditional compilation for new/old PCI structure support; | ||
| 164 | * removed kernel series (2.0.x / 2.1.x) conditional compilation. | ||
| 165 | * | ||
| 166 | * Revision 2.1.1.3 1998/03/16 18:01:12 ivan | ||
| 167 | * cleaned up the data loss fix; | ||
| 168 | * fixed XON/XOFF handling once more (Cyclades-Z); | ||
| 169 | * general review of the driver routines; | ||
| 170 | * introduction of a mechanism to prevent data loss with slow | ||
| 171 | * printers, by forcing a delay before closing the port. | ||
| 172 | * | ||
| 173 | * Revision 2.1.1.2 1998/02/17 16:50:00 ivan | ||
| 174 | * fixed detection/handling of new CD1400 in Ye boards; | ||
| 175 | * fixed XON/XOFF handling (Cyclades-Z); | ||
| 176 | * fixed data loss caused by a premature port close; | ||
| 177 | * introduction of a flag that holds the CD1400 version ID per port | ||
| 178 | * (used by the CYGETCD1400VER new ioctl). | ||
| 179 | * | ||
| 180 | * Revision 2.1.1.1 1997/12/03 17:31:19 ivan | ||
| 181 | * Code review for the module cleanup routine; | ||
| 182 | * fixed RTS and DTR status report for new CD1400's in get_modem_info; | ||
| 183 | * includes anonymous changes regarding signal_pending. | ||
| 184 | * | ||
| 185 | * Revision 2.1 1997/11/01 17:42:41 ivan | ||
| 186 | * Changes in the driver to support Alpha systems (except 8Zo V_1); | ||
| 187 | * BREAK fix for the Cyclades-Z boards; | ||
| 188 | * driver inactivity control by FW implemented; | ||
| 189 | * introduction of flag that allows driver to take advantage of | ||
| 190 | * a special CD1400 feature related to HW flow control; | ||
| 191 | * added support for the CD1400 rev. J (Cyclom-Y boards); | ||
| 192 | * introduction of ioctls to: | ||
| 193 | * - control the rtsdtr_inv flag (Cyclom-Y); | ||
| 194 | * - control the rflow flag (Cyclom-Y); | ||
| 195 | * - adjust the polling interval (Cyclades-Z); | ||
| 196 | * | ||
| 197 | * Revision 1.36.4.33 1997/06/27 19:00:00 ivan | ||
| 198 | * Fixes related to kernel version conditional | ||
| 199 | * compilation. | ||
| 200 | * | ||
| 201 | * Revision 1.36.4.32 1997/06/14 19:30:00 ivan | ||
| 202 | * Compatibility issues between kernels 2.0.x and | ||
| 203 | * 2.1.x (mainly related to clear_bit function). | ||
| 204 | * | ||
| 205 | * Revision 1.36.4.31 1997/06/03 15:30:00 ivan | ||
| 206 | * Changes to define the memory window according to the | ||
| 207 | * board type. | ||
| 208 | * | ||
| 209 | * Revision 1.36.4.30 1997/05/16 15:30:00 daniel | ||
| 210 | * Changes to support new cycladesZ boards. | ||
| 211 | * | ||
| 212 | * Revision 1.36.4.29 1997/05/12 11:30:00 daniel | ||
| 213 | * Merge of Bentson's and Daniel's version 1.36.4.28. | ||
| 214 | * Corrects bug in cy_detect_pci: check if there are more | ||
| 215 | * ports than the number of static structs allocated. | ||
| 216 | * Warning message during initialization if this driver is | ||
| 217 | * used with the new generation of cycladesZ boards. Those | ||
| 218 | * will be supported only in next release of the driver. | ||
| 219 | * Corrects bug in cy_detect_pci and cy_detect_isa that | ||
| 220 | * returned wrong number of VALID boards, when a cyclomY | ||
| 221 | * was found with no serial modules connected. | ||
| 222 | * Changes to use current (2.1.x) kernel subroutine names | ||
| 223 | * and created macros for compilation with 2.0.x kernel, | ||
| 224 | * instead of the other way around. | ||
| 225 | * | ||
| 226 | * Revision 1.36.4.28 1997/05/?? ??:00:00 bentson | ||
| 227 | * Change queue_task_irq_off to queue_task_irq. | ||
| 228 | * The inline function queue_task_irq_off (tqueue.h) | ||
| 229 | * was removed from latest releases of 2.1.x kernel. | ||
| 230 | * Use of macro __init to mark the initialization | ||
| 231 | * routines, so memory can be reused. | ||
| 232 | * Also incorporate implementation of critical region | ||
| 233 | * in function cleanup_module() created by anonymous | ||
| 234 | * linuxer. | ||
| 235 | * | ||
| 236 | * Revision 1.36.4.28 1997/04/25 16:00:00 daniel | ||
| 237 | * Change to support new firmware that solves DCD problem: | ||
| 238 | * application could fail to receive SIGHUP signal when DCD | ||
| 239 | * varying too fast. | ||
| 240 | * | ||
| 241 | * Revision 1.36.4.27 1997/03/26 10:30:00 daniel | ||
| 242 | * Changed for support linux versions 2.1.X. | ||
| 243 | * Backward compatible with linux versions 2.0.X. | ||
| 244 | * Corrected illegal use of filler field in | ||
| 245 | * CH_CTRL struct. | ||
| 246 | * Deleted some debug messages. | ||
| 247 | * | ||
| 248 | * Revision 1.36.4.26 1997/02/27 12:00:00 daniel | ||
| 249 | * Included check for NULL tty pointer in cyz_poll. | ||
| 250 | * | ||
| 251 | * Revision 1.36.4.25 1997/02/26 16:28:30 bentson | ||
| 252 | * Bill Foster at Blarg! Online services noticed that | ||
| 253 | * some of the switch elements of -Z modem control | ||
| 254 | * lacked a closing "break;" | ||
| 255 | * | ||
| 256 | * Revision 1.36.4.24 1997/02/24 11:00:00 daniel | ||
| 257 | * Changed low water threshold for buffer xmit_buf | ||
| 258 | * | ||
| 259 | * Revision 1.36.4.23 1996/12/02 21:50:16 bentson | ||
| 260 | * Marcio provided fix to modem status fetch for -Z | ||
| 261 | * | ||
| 262 | * Revision 1.36.4.22 1996/10/28 22:41:17 bentson | ||
| 263 | * improve mapping of -Z control page (thanks to Steve | ||
| 264 | * Price <stevep@fa.tdktca.com> for help on this) | ||
| 265 | * | ||
| 266 | * Revision 1.36.4.21 1996/09/10 17:00:10 bentson | ||
| 267 | * shift from CPU-bound to memcopy in cyz_polling operation | ||
| 268 | * | ||
| 269 | * Revision 1.36.4.20 1996/09/09 18:30:32 Bentson | ||
| 270 | * Added support to set and report higher speeds. | ||
| 271 | * | ||
| 272 | * Revision 1.36.4.19c 1996/08/09 10:00:00 Marcio Saito | ||
| 273 | * Some fixes in the HW flow control for the BETA release. | ||
| 274 | * Don't try to register the IRQ. | ||
| 275 | * | ||
| 276 | * Revision 1.36.4.19 1996/08/08 16:23:18 Bentson | ||
| 277 | * make sure "cyc" appears in all kernel messages; all soft interrupts | ||
| 278 | * handled by same routine; recognize out-of-band reception; comment | ||
| 279 | * out some diagnostic messages; leave RTS/CTS flow control to hardware; | ||
| 280 | * fix race condition in -Z buffer management; only -Y needs to explicitly | ||
| 281 | * flush chars; tidy up some startup messages; | ||
| 282 | * | ||
| 283 | * Revision 1.36.4.18 1996/07/25 18:57:31 bentson | ||
| 284 | * shift MOD_INC_USE_COUNT location to match | ||
| 285 | * serial.c; purge some diagnostic messages; | ||
| 286 | * | ||
| 287 | * Revision 1.36.4.17 1996/07/25 18:01:08 bentson | ||
| 288 | * enable modem status messages and fetch & process them; note | ||
| 289 | * time of last activity type for each port; set_line_char now | ||
| 290 | * supports more than line 0 and treats 0 baud correctly; | ||
| 291 | * get_modem_info senses rs_status; | ||
| 292 | * | ||
| 293 | * Revision 1.36.4.16 1996/07/20 08:43:15 bentson | ||
| 294 | * barely works--now's time to turn on | ||
| 295 | * more features 'til it breaks | ||
| 296 | * | ||
| 297 | * Revision 1.36.4.15 1996/07/19 22:30:06 bentson | ||
| 298 | * check more -Z board status; shorten boot message | ||
| 299 | * | ||
| 300 | * Revision 1.36.4.14 1996/07/19 22:20:37 bentson | ||
| 301 | * fix reference to ch_ctrl in startup; verify return | ||
| 302 | * values from cyz_issue_cmd and cyz_update_channel; | ||
| 303 | * more stuff to get modem control correct; | ||
| 304 | * | ||
| 305 | * Revision 1.36.4.13 1996/07/11 19:53:33 bentson | ||
| 306 | * more -Z stuff folded in; re-order changes to put -Z stuff | ||
| 307 | * after -Y stuff (to make changes clearer) | ||
| 308 | * | ||
| 309 | * Revision 1.36.4.12 1996/07/11 15:40:55 bentson | ||
| 310 | * Add code to poll Cyclades-Z. Add code to get & set RS-232 control. | ||
| 311 | * Add code to send break. Clear firmware ID word at startup (so | ||
| 312 | * that other code won't talk to inactive board). | ||
| 313 | * | ||
| 314 | * Revision 1.36.4.11 1996/07/09 05:28:29 bentson | ||
| 315 | * add code for -Z in set_line_char | ||
| 316 | * | ||
| 317 | * Revision 1.36.4.10 1996/07/08 19:28:37 bentson | ||
| 318 | * fold more -Z stuff (or in some cases, error messages) | ||
| 319 | * into driver; add text to "don't know what to do" messages. | ||
| 320 | * | ||
| 321 | * Revision 1.36.4.9 1996/07/08 18:38:38 bentson | ||
| 322 | * moved compile-time flags near top of file; cosmetic changes | ||
| 323 | * to narrow text (to allow 2-up printing); changed many declarations | ||
| 324 | * to "static" to limit external symbols; shuffled code order to | ||
| 325 | * coalesce -Y and -Z specific code, also to put internal functions | ||
| 326 | * in order of tty_driver structure; added code to recognize -Z | ||
| 327 | * ports (and for moment, do nothing or report error); add cy_startup | ||
| 328 | * to parse boot command line for extra base addresses for ISA probes; | ||
| 329 | * | ||
| 330 | * Revision 1.36.4.8 1996/06/25 17:40:19 bentson | ||
| 331 | * reorder some code, fix types of some vars (int vs. long), | ||
| 332 | * add cy_setup to support user declared ISA addresses | ||
| 333 | * | ||
| 334 | * Revision 1.36.4.7 1996/06/21 23:06:18 bentson | ||
| 335 | * dump ioctl based firmware load (it's now a user level | ||
| 336 | * program); ensure uninitialzed ports cannot be used | ||
| 337 | * | ||
| 338 | * Revision 1.36.4.6 1996/06/20 23:17:19 bentson | ||
| 339 | * rename vars and restructure some code | ||
| 340 | * | ||
| 341 | * Revision 1.36.4.5 1996/06/14 15:09:44 bentson | ||
| 342 | * get right status back after boot load | ||
| 343 | * | ||
| 344 | * Revision 1.36.4.4 1996/06/13 19:51:44 bentson | ||
| 345 | * successfully loads firmware | ||
| 346 | * | ||
| 347 | * Revision 1.36.4.3 1996/06/13 06:08:33 bentson | ||
| 348 | * add more of the code for the boot/load ioctls | ||
| 349 | * | ||
| 350 | * Revision 1.36.4.2 1996/06/11 21:00:51 bentson | ||
| 351 | * start to add Z functionality--starting with ioctl | ||
| 352 | * for loading firmware | ||
| 353 | * | ||
| 354 | * Revision 1.36.4.1 1996/06/10 18:03:02 bentson | ||
| 355 | * added code to recognize Z/PCI card at initialization; report | ||
| 356 | * presence, but card is not initialized (because firmware needs | ||
| 357 | * to be loaded) | ||
| 358 | * | ||
| 359 | * Revision 1.36.3.8 1996/06/07 16:29:00 bentson | ||
| 360 | * starting minor number at zero; added missing verify_area | ||
| 361 | * as noted by Heiko Eißfeldt <heiko@colossus.escape.de> | ||
| 362 | * | ||
| 363 | * Revision 1.36.3.7 1996/04/19 21:06:18 bentson | ||
| 364 | * remove unneeded boot message & fix CLOCAL hardware flow | ||
| 365 | * control (Miquel van Smoorenburg <miquels@Q.cistron.nl>); | ||
| 366 | * remove unused diagnostic statements; minor 0 is first; | ||
| 367 | * | ||
| 368 | * Revision 1.36.3.6 1996/03/13 13:21:17 marcio | ||
| 369 | * The kernel function vremap (available only in later 1.3.xx kernels) | ||
| 370 | * allows the access to memory addresses above the RAM. This revision | ||
| 371 | * of the driver supports PCI boards below 1Mb (device id 0x100) and | ||
| 372 | * above 1Mb (device id 0x101). | ||
| 373 | * | ||
| 374 | * Revision 1.36.3.5 1996/03/07 15:20:17 bentson | ||
| 375 | * Some global changes to interrupt handling spilled into | ||
| 376 | * this driver--mostly unused arguments in system function | ||
| 377 | * calls. Also added change by Marcio Saito which should | ||
| 378 | * reduce lost interrupts at startup by fast processors. | ||
| 379 | * | ||
| 380 | * Revision 1.36.3.4 1995/11/13 20:45:10 bentson | ||
| 381 | * Changes by Corey Minyard <minyard@wf-rch.cirr.com> distributed | ||
| 382 | * in 1.3.41 kernel to remove a possible race condition, extend | ||
| 383 | * some error messages, and let the driver run as a loadable module | ||
| 384 | * Change by Alan Wendt <alan@ez0.ezlink.com> to remove a | ||
| 385 | * possible race condition. | ||
| 386 | * Change by Marcio Saito <marcio@cyclades.com> to fix PCI addressing. | ||
| 387 | * | ||
| 388 | * Revision 1.36.3.3 1995/11/13 19:44:48 bentson | ||
| 389 | * Changes by Linus Torvalds in 1.3.33 kernel distribution | ||
| 390 | * required due to reordering of driver initialization. | ||
| 391 | * Drivers are now initialized *after* memory management. | ||
| 392 | * | ||
| 393 | * Revision 1.36.3.2 1995/09/08 22:07:14 bentson | ||
| 394 | * remove printk from ISR; fix typo | ||
| 395 | * | ||
| 396 | * Revision 1.36.3.1 1995/09/01 12:00:42 marcio | ||
| 397 | * Minor fixes in the PCI board support. PCI function calls in | ||
| 398 | * conditional compilation (CONFIG_PCI). Thanks to Jim Duncan | ||
| 399 | * <duncan@okay.com>. "bad serial count" message removed. | ||
| 400 | * | ||
| 401 | * Revision 1.36.3 1995/08/22 09:19:42 marcio | ||
| 402 | * Cyclom-Y/PCI support added. Changes in the cy_init routine and | ||
| 403 | * board initialization. Changes in the boot messages. The driver | ||
| 404 | * supports up to 4 boards and 64 ports by default. | ||
| 405 | * | ||
| 406 | * Revision 1.36.1.4 1995/03/29 06:14:14 bentson | ||
| 407 | * disambiguate between Cyclom-16Y and Cyclom-32Ye; | ||
| 408 | * | ||
| 409 | * Revision 1.36.1.3 1995/03/23 22:15:35 bentson | ||
| 410 | * add missing break in modem control block in ioctl switch statement | ||
| 411 | * (discovered by Michael Edward Chastain <mec@jobe.shell.portal.com>); | ||
| 412 | * | ||
| 413 | * Revision 1.36.1.2 1995/03/22 19:16:22 bentson | ||
| 414 | * make sure CTS flow control is set as soon as possible (thanks | ||
| 415 | * to note from David Lambert <lambert@chesapeake.rps.slb.com>); | ||
| 416 | * | ||
| 417 | * Revision 1.36.1.1 1995/03/13 15:44:43 bentson | ||
| 418 | * initialize defaults for receive threshold and stale data timeout; | ||
| 419 | * cosmetic changes; | ||
| 420 | * | ||
| 421 | * Revision 1.36 1995/03/10 23:33:53 bentson | ||
| 422 | * added support of chips 4-7 in 32 port Cyclom-Ye; | ||
| 423 | * fix cy_interrupt pointer dereference problem | ||
| 424 | * (Joe Portman <baron@aa.net>); | ||
| 425 | * give better error response if open is attempted on non-existent port | ||
| 426 | * (Zachariah Vaum <jchryslr@netcom.com>); | ||
| 427 | * correct command timeout (Kenneth Lerman <lerman@@seltd.newnet.com>); | ||
| 428 | * conditional compilation for -16Y on systems with fast, noisy bus; | ||
| 429 | * comment out diagnostic print function; | ||
| 430 | * cleaned up table of base addresses; | ||
| 431 | * set receiver time-out period register to correct value, | ||
| 432 | * set receive threshold to better default values, | ||
| 433 | * set chip timer to more accurate 200 Hz ticking, | ||
| 434 | * add code to monitor and modify receive parameters | ||
| 435 | * (Rik Faith <faith@cs.unc.edu> Nick Simicich | ||
| 436 | * <njs@scifi.emi.net>); | ||
| 437 | * | ||
| 438 | * Revision 1.35 1994/12/16 13:54:18 steffen | ||
| 439 | * additional patch by Marcio Saito for board detection | ||
| 440 | * Accidently left out in 1.34 | ||
| 441 | * | ||
| 442 | * Revision 1.34 1994/12/10 12:37:12 steffen | ||
| 443 | * This is the corrected version as suggested by Marcio Saito | ||
| 444 | * | ||
| 445 | * Revision 1.33 1994/12/01 22:41:18 bentson | ||
| 446 | * add hooks to support more high speeds directly; add tytso | ||
| 447 | * patch regarding CLOCAL wakeups | ||
| 448 | * | ||
| 449 | * Revision 1.32 1994/11/23 19:50:04 bentson | ||
| 450 | * allow direct kernel control of higher signalling rates; | ||
| 451 | * look for cards at additional locations | ||
| 452 | * | ||
| 453 | * Revision 1.31 1994/11/16 04:33:28 bentson | ||
| 454 | * ANOTHER fix from Corey Minyard, minyard@wf-rch.cirr.com-- | ||
| 455 | * a problem in chars_in_buffer has been resolved by some | ||
| 456 | * small changes; this should yield smoother output | ||
| 457 | * | ||
| 458 | * Revision 1.30 1994/11/16 04:28:05 bentson | ||
| 459 | * Fix from Corey Minyard, Internet: minyard@metronet.com, | ||
| 460 | * UUCP: minyard@wf-rch.cirr.com, WORK: minyardbnr.ca, to | ||
| 461 | * cy_hangup that appears to clear up much (all?) of the | ||
| 462 | * DTR glitches; also he's added/cleaned-up diagnostic messages | ||
| 463 | * | ||
| 464 | * Revision 1.29 1994/11/16 04:16:07 bentson | ||
| 465 | * add change proposed by Ralph Sims, ralphs@halcyon.com, to | ||
| 466 | * operate higher speeds in same way as other serial ports; | ||
| 467 | * add more serial ports (for up to two 16-port muxes). | ||
| 468 | * | ||
| 469 | * Revision 1.28 1994/11/04 00:13:16 root | ||
| 470 | * turn off diagnostic messages | ||
| 471 | * | ||
| 472 | * Revision 1.27 1994/11/03 23:46:37 root | ||
| 473 | * bunch of changes to bring driver into greater conformance | ||
| 474 | * with the serial.c driver (looking for missed fixes) | ||
| 475 | * | ||
| 476 | * Revision 1.26 1994/11/03 22:40:36 root | ||
| 477 | * automatic interrupt probing fixed. | ||
| 478 | * | ||
| 479 | * Revision 1.25 1994/11/03 20:17:02 root | ||
| 480 | * start to implement auto-irq | ||
| 481 | * | ||
| 482 | * Revision 1.24 1994/11/03 18:01:55 root | ||
| 483 | * still working on modem signals--trying not to drop DTR | ||
| 484 | * during the getty/login processes | ||
| 485 | * | ||
| 486 | * Revision 1.23 1994/11/03 17:51:36 root | ||
| 487 | * extend baud rate support; set receive threshold as function | ||
| 488 | * of baud rate; fix some problems with RTS/CTS; | ||
| 489 | * | ||
| 490 | * Revision 1.22 1994/11/02 18:05:35 root | ||
| 491 | * changed arguments to udelay to type long to get | ||
| 492 | * delays to be of correct duration | ||
| 493 | * | ||
| 494 | * Revision 1.21 1994/11/02 17:37:30 root | ||
| 495 | * employ udelay (after calibrating loops_per_second earlier | ||
| 496 | * in init/main.c) instead of using home-grown delay routines | ||
| 497 | * | ||
| 498 | * Revision 1.20 1994/11/02 03:11:38 root | ||
| 499 | * cy_chars_in_buffer forces a return value of 0 to let | ||
| 500 | * login work (don't know why it does); some functions | ||
| 501 | * that were returning EFAULT, now executes the code; | ||
| 502 | * more work on deciding when to disable xmit interrupts; | ||
| 503 | * | ||
| 504 | * Revision 1.19 1994/11/01 20:10:14 root | ||
| 505 | * define routine to start transmission interrupts (by enabling | ||
| 506 | * transmit interrupts); directly enable/disable modem interrupts; | ||
| 507 | * | ||
| 508 | * Revision 1.18 1994/11/01 18:40:45 bentson | ||
| 509 | * Don't always enable transmit interrupts in startup; interrupt on | ||
| 510 | * TxMpty instead of TxRdy to help characters get out before shutdown; | ||
| 511 | * restructure xmit interrupt to check for chars first and quit if | ||
| 512 | * none are ready to go; modem status (MXVRx) is upright, _not_ inverted | ||
| 513 | * (to my view); | ||
| 514 | * | ||
| 515 | * Revision 1.17 1994/10/30 04:39:45 bentson | ||
| 516 | * rename serial_driver and callout_driver to cy_serial_driver and | ||
| 517 | * cy_callout_driver to avoid linkage interference; initialize | ||
| 518 | * info->type to PORT_CIRRUS; ruggedize paranoia test; elide ->port | ||
| 519 | * from cyclades_port structure; add paranoia check to cy_close; | ||
| 520 | * | ||
| 521 | * Revision 1.16 1994/10/30 01:14:33 bentson | ||
| 522 | * change major numbers; add some _early_ return statements; | ||
| 523 | * | ||
| 524 | * Revision 1.15 1994/10/29 06:43:15 bentson | ||
| 525 | * final tidying up for clean compile; enable some error reporting | ||
| 526 | * | ||
| 527 | * Revision 1.14 1994/10/28 20:30:22 Bentson | ||
| 528 | * lots of changes to drag the driver towards the new tty_io | ||
| 529 | * structures and operation. not expected to work, but may | ||
| 530 | * compile cleanly. | ||
| 531 | * | ||
| 532 | * Revision 1.13 1994/07/21 23:08:57 Bentson | ||
| 533 | * add some diagnostic cruft; support 24 lines (for testing | ||
| 534 | * both -8Y and -16Y cards; be more thorough in servicing all | ||
| 535 | * chips during interrupt; add "volatile" a few places to | ||
| 536 | * circumvent compiler optimizations; fix base & offset | ||
| 537 | * computations in block_til_ready (was causing chip 0 to | ||
| 538 | * stop operation) | ||
| 539 | * | ||
| 540 | * Revision 1.12 1994/07/19 16:42:11 Bentson | ||
| 541 | * add some hackery for kernel version 1.1.8; expand | ||
| 542 | * error messages; refine timing for delay loops and | ||
| 543 | * declare loop params volatile | ||
| 544 | * | ||
| 545 | * Revision 1.11 1994/06/11 21:53:10 bentson | ||
| 546 | * get use of save_car right in transmit interrupt service | ||
| 547 | * | ||
| 548 | * Revision 1.10.1.1 1994/06/11 21:31:18 bentson | ||
| 549 | * add some diagnostic printing; try to fix save_car stuff | ||
| 550 | * | ||
| 551 | * Revision 1.10 1994/06/11 20:36:08 bentson | ||
| 552 | * clean up compiler warnings | ||
| 553 | * | ||
| 554 | * Revision 1.9 1994/06/11 19:42:46 bentson | ||
| 555 | * added a bunch of code to support modem signalling | ||
| 556 | * | ||
| 557 | * Revision 1.8 1994/06/11 17:57:07 bentson | ||
| 558 | * recognize break & parity error | ||
| 559 | * | ||
| 560 | * Revision 1.7 1994/06/05 05:51:34 bentson | ||
| 561 | * Reorder baud table to be monotonic; add cli to CP; discard | ||
| 562 | * incoming characters and status if the line isn't open; start to | ||
| 563 | * fold code into cy_throttle; start to port get_serial_info, | ||
| 564 | * set_serial_info, get_modem_info, set_modem_info, and send_break | ||
| 565 | * from serial.c; expand cy_ioctl; relocate and expand config_setup; | ||
| 566 | * get flow control characters from tty struct; invalidate ports w/o | ||
| 567 | * hardware; | ||
| 568 | * | ||
| 569 | * Revision 1.6 1994/05/31 18:42:21 bentson | ||
| 570 | * add a loop-breaker in the interrupt service routine; | ||
| 571 | * note when port is initialized so that it can be shut | ||
| 572 | * down under the right conditions; receive works without | ||
| 573 | * any obvious errors | ||
| 574 | * | ||
| 575 | * Revision 1.5 1994/05/30 00:55:02 bentson | ||
| 576 | * transmit works without obvious errors | ||
| 577 | * | ||
| 578 | * Revision 1.4 1994/05/27 18:46:27 bentson | ||
| 579 | * incorporated more code from lib_y.c; can now print short | ||
| 580 | * strings under interrupt control to port zero; seems to | ||
| 581 | * select ports/channels/lines correctly | ||
| 582 | * | ||
| 583 | * Revision 1.3 1994/05/25 22:12:44 bentson | ||
| 584 | * shifting from multi-port on a card to proper multiplexor | ||
| 585 | * data structures; added skeletons of most routines | ||
| 586 | * | ||
| 587 | * Revision 1.2 1994/05/19 13:21:43 bentson | ||
| 588 | * start to crib from other sources | ||
| 589 | * | ||
| 590 | */ | 22 | */ |
| 591 | 23 | ||
| 592 | #define CY_VERSION "2.5" | 24 | #define CY_VERSION "2.6" |
| 593 | 25 | ||
| 594 | /* If you need to install more boards than NR_CARDS, change the constant | 26 | /* If you need to install more boards than NR_CARDS, change the constant |
| 595 | in the definition below. No other change is necessary to support up to | 27 | in the definition below. No other change is necessary to support up to |
| @@ -648,9 +80,7 @@ | |||
| 648 | #include <linux/firmware.h> | 80 | #include <linux/firmware.h> |
| 649 | #include <linux/device.h> | 81 | #include <linux/device.h> |
| 650 | 82 | ||
| 651 | #include <asm/system.h> | ||
| 652 | #include <linux/io.h> | 83 | #include <linux/io.h> |
| 653 | #include <asm/irq.h> | ||
| 654 | #include <linux/uaccess.h> | 84 | #include <linux/uaccess.h> |
| 655 | 85 | ||
| 656 | #include <linux/kernel.h> | 86 | #include <linux/kernel.h> |
| @@ -660,13 +90,11 @@ | |||
| 660 | #include <linux/proc_fs.h> | 90 | #include <linux/proc_fs.h> |
| 661 | #include <linux/seq_file.h> | 91 | #include <linux/seq_file.h> |
| 662 | 92 | ||
| 663 | static void cy_throttle(struct tty_struct *tty); | ||
| 664 | static void cy_send_xchar(struct tty_struct *tty, char ch); | 93 | static void cy_send_xchar(struct tty_struct *tty, char ch); |
| 665 | 94 | ||
| 666 | #ifndef SERIAL_XMIT_SIZE | 95 | #ifndef SERIAL_XMIT_SIZE |
| 667 | #define SERIAL_XMIT_SIZE (min(PAGE_SIZE, 4096)) | 96 | #define SERIAL_XMIT_SIZE (min(PAGE_SIZE, 4096)) |
| 668 | #endif | 97 | #endif |
| 669 | #define WAKEUP_CHARS 256 | ||
| 670 | 98 | ||
| 671 | #define STD_COM_FLAGS (0) | 99 | #define STD_COM_FLAGS (0) |
| 672 | 100 | ||
| @@ -756,25 +184,25 @@ static int cy_next_channel; /* next minor available */ | |||
| 756 | * HI VHI | 184 | * HI VHI |
| 757 | * 20 | 185 | * 20 |
| 758 | */ | 186 | */ |
| 759 | static int baud_table[] = { | 187 | static const int baud_table[] = { |
| 760 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, | 188 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, |
| 761 | 1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000, | 189 | 1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000, |
| 762 | 230400, 0 | 190 | 230400, 0 |
| 763 | }; | 191 | }; |
| 764 | 192 | ||
| 765 | static char baud_co_25[] = { /* 25 MHz clock option table */ | 193 | static const char baud_co_25[] = { /* 25 MHz clock option table */ |
| 766 | /* value => 00 01 02 03 04 */ | 194 | /* value => 00 01 02 03 04 */ |
| 767 | /* divide by 8 32 128 512 2048 */ | 195 | /* divide by 8 32 128 512 2048 */ |
| 768 | 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, | 196 | 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, |
| 769 | 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | 197 | 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
| 770 | }; | 198 | }; |
| 771 | 199 | ||
| 772 | static char baud_bpr_25[] = { /* 25 MHz baud rate period table */ | 200 | static const char baud_bpr_25[] = { /* 25 MHz baud rate period table */ |
| 773 | 0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3, | 201 | 0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3, |
| 774 | 0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15 | 202 | 0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15 |
| 775 | }; | 203 | }; |
| 776 | 204 | ||
| 777 | static char baud_co_60[] = { /* 60 MHz clock option table (CD1400 J) */ | 205 | static const char baud_co_60[] = { /* 60 MHz clock option table (CD1400 J) */ |
| 778 | /* value => 00 01 02 03 04 */ | 206 | /* value => 00 01 02 03 04 */ |
| 779 | /* divide by 8 32 128 512 2048 */ | 207 | /* divide by 8 32 128 512 2048 */ |
| 780 | 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, | 208 | 0x00, 0x00, 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, |
| @@ -782,13 +210,13 @@ static char baud_co_60[] = { /* 60 MHz clock option table (CD1400 J) */ | |||
| 782 | 0x00 | 210 | 0x00 |
| 783 | }; | 211 | }; |
| 784 | 212 | ||
| 785 | static char baud_bpr_60[] = { /* 60 MHz baud rate period table (CD1400 J) */ | 213 | static const char baud_bpr_60[] = { /* 60 MHz baud rate period table (CD1400 J) */ |
| 786 | 0x00, 0x82, 0x21, 0xff, 0xdb, 0xc3, 0x92, 0x62, 0xc3, 0x62, | 214 | 0x00, 0x82, 0x21, 0xff, 0xdb, 0xc3, 0x92, 0x62, 0xc3, 0x62, |
| 787 | 0x41, 0xc3, 0x62, 0xc3, 0x62, 0xc3, 0x82, 0x62, 0x41, 0x32, | 215 | 0x41, 0xc3, 0x62, 0xc3, 0x62, 0xc3, 0x82, 0x62, 0x41, 0x32, |
| 788 | 0x21 | 216 | 0x21 |
| 789 | }; | 217 | }; |
| 790 | 218 | ||
| 791 | static char baud_cor3[] = { /* receive threshold */ | 219 | static const char baud_cor3[] = { /* receive threshold */ |
| 792 | 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, | 220 | 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, |
| 793 | 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07, | 221 | 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07, |
| 794 | 0x07 | 222 | 0x07 |
| @@ -805,7 +233,7 @@ static char baud_cor3[] = { /* receive threshold */ | |||
| 805 | * cables. | 233 | * cables. |
| 806 | */ | 234 | */ |
| 807 | 235 | ||
| 808 | static char rflow_thr[] = { /* rflow threshold */ | 236 | static const char rflow_thr[] = { /* rflow threshold */ |
| 809 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 237 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 810 | 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, | 238 | 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, |
| 811 | 0x0a | 239 | 0x0a |
| @@ -814,7 +242,7 @@ static char rflow_thr[] = { /* rflow threshold */ | |||
| 814 | /* The Cyclom-Ye has placed the sequential chips in non-sequential | 242 | /* The Cyclom-Ye has placed the sequential chips in non-sequential |
| 815 | * address order. This look-up table overcomes that problem. | 243 | * address order. This look-up table overcomes that problem. |
| 816 | */ | 244 | */ |
| 817 | static int cy_chip_offset[] = { 0x0000, | 245 | static const unsigned int cy_chip_offset[] = { 0x0000, |
| 818 | 0x0400, | 246 | 0x0400, |
| 819 | 0x0800, | 247 | 0x0800, |
| 820 | 0x0C00, | 248 | 0x0C00, |
| @@ -827,7 +255,7 @@ static int cy_chip_offset[] = { 0x0000, | |||
| 827 | /* PCI related definitions */ | 255 | /* PCI related definitions */ |
| 828 | 256 | ||
| 829 | #ifdef CONFIG_PCI | 257 | #ifdef CONFIG_PCI |
| 830 | static struct pci_device_id cy_pci_dev_id[] __devinitdata = { | 258 | static const struct pci_device_id cy_pci_dev_id[] = { |
| 831 | /* PCI < 1Mb */ | 259 | /* PCI < 1Mb */ |
| 832 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_Y_Lo) }, | 260 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_Y_Lo) }, |
| 833 | /* PCI > 1Mb */ | 261 | /* PCI > 1Mb */ |
| @@ -850,7 +278,7 @@ MODULE_DEVICE_TABLE(pci, cy_pci_dev_id); | |||
| 850 | #endif | 278 | #endif |
| 851 | 279 | ||
| 852 | static void cy_start(struct tty_struct *); | 280 | static void cy_start(struct tty_struct *); |
| 853 | static void set_line_char(struct cyclades_port *); | 281 | static void cy_set_line_char(struct cyclades_port *, struct tty_struct *); |
| 854 | static int cyz_issue_cmd(struct cyclades_card *, __u32, __u8, __u32); | 282 | static int cyz_issue_cmd(struct cyclades_card *, __u32, __u8, __u32); |
| 855 | #ifdef CONFIG_ISA | 283 | #ifdef CONFIG_ISA |
| 856 | static unsigned detect_isa_irq(void __iomem *); | 284 | static unsigned detect_isa_irq(void __iomem *); |
| @@ -869,6 +297,20 @@ static void cyz_rx_restart(unsigned long); | |||
| 869 | static struct timer_list cyz_rx_full_timer[NR_PORTS]; | 297 | static struct timer_list cyz_rx_full_timer[NR_PORTS]; |
| 870 | #endif /* CONFIG_CYZ_INTR */ | 298 | #endif /* CONFIG_CYZ_INTR */ |
| 871 | 299 | ||
| 300 | static inline void cyy_writeb(struct cyclades_port *port, u32 reg, u8 val) | ||
| 301 | { | ||
| 302 | struct cyclades_card *card = port->card; | ||
| 303 | |||
| 304 | cy_writeb(port->u.cyy.base_addr + (reg << card->bus_index), val); | ||
| 305 | } | ||
| 306 | |||
| 307 | static inline u8 cyy_readb(struct cyclades_port *port, u32 reg) | ||
| 308 | { | ||
| 309 | struct cyclades_card *card = port->card; | ||
| 310 | |||
| 311 | return readb(port->u.cyy.base_addr + (reg << card->bus_index)); | ||
| 312 | } | ||
| 313 | |||
| 872 | static inline bool cy_is_Z(struct cyclades_card *card) | 314 | static inline bool cy_is_Z(struct cyclades_card *card) |
| 873 | { | 315 | { |
| 874 | return card->num_chips == (unsigned int)-1; | 316 | return card->num_chips == (unsigned int)-1; |
| @@ -893,7 +335,7 @@ static inline bool cyz_is_loaded(struct cyclades_card *card) | |||
| 893 | } | 335 | } |
| 894 | 336 | ||
| 895 | static inline int serial_paranoia_check(struct cyclades_port *info, | 337 | static inline int serial_paranoia_check(struct cyclades_port *info, |
| 896 | char *name, const char *routine) | 338 | const char *name, const char *routine) |
| 897 | { | 339 | { |
| 898 | #ifdef SERIAL_PARANOIA_CHECK | 340 | #ifdef SERIAL_PARANOIA_CHECK |
| 899 | if (!info) { | 341 | if (!info) { |
| @@ -909,7 +351,7 @@ static inline int serial_paranoia_check(struct cyclades_port *info, | |||
| 909 | } | 351 | } |
| 910 | #endif | 352 | #endif |
| 911 | return 0; | 353 | return 0; |
| 912 | } /* serial_paranoia_check */ | 354 | } |
| 913 | 355 | ||
| 914 | /***********************************************************/ | 356 | /***********************************************************/ |
| 915 | /********* Start of block of Cyclom-Y specific code ********/ | 357 | /********* Start of block of Cyclom-Y specific code ********/ |
| @@ -921,13 +363,14 @@ static inline int serial_paranoia_check(struct cyclades_port *info, | |||
| 921 | 363 | ||
| 922 | This function is only called from inside spinlock-protected code. | 364 | This function is only called from inside spinlock-protected code. |
| 923 | */ | 365 | */ |
| 924 | static int cyy_issue_cmd(void __iomem *base_addr, u_char cmd, int index) | 366 | static int __cyy_issue_cmd(void __iomem *base_addr, u8 cmd, int index) |
| 925 | { | 367 | { |
| 368 | void __iomem *ccr = base_addr + (CyCCR << index); | ||
| 926 | unsigned int i; | 369 | unsigned int i; |
| 927 | 370 | ||
| 928 | /* Check to see that the previous command has completed */ | 371 | /* Check to see that the previous command has completed */ |
| 929 | for (i = 0; i < 100; i++) { | 372 | for (i = 0; i < 100; i++) { |
| 930 | if (readb(base_addr + (CyCCR << index)) == 0) | 373 | if (readb(ccr) == 0) |
| 931 | break; | 374 | break; |
| 932 | udelay(10L); | 375 | udelay(10L); |
| 933 | } | 376 | } |
| @@ -937,10 +380,16 @@ static int cyy_issue_cmd(void __iomem *base_addr, u_char cmd, int index) | |||
| 937 | return -1; | 380 | return -1; |
| 938 | 381 | ||
| 939 | /* Issue the new command */ | 382 | /* Issue the new command */ |
| 940 | cy_writeb(base_addr + (CyCCR << index), cmd); | 383 | cy_writeb(ccr, cmd); |
| 941 | 384 | ||
| 942 | return 0; | 385 | return 0; |
| 943 | } /* cyy_issue_cmd */ | 386 | } |
| 387 | |||
| 388 | static inline int cyy_issue_cmd(struct cyclades_port *port, u8 cmd) | ||
| 389 | { | ||
| 390 | return __cyy_issue_cmd(port->u.cyy.base_addr, cmd, | ||
| 391 | port->card->bus_index); | ||
| 392 | } | ||
| 944 | 393 | ||
| 945 | #ifdef CONFIG_ISA | 394 | #ifdef CONFIG_ISA |
| 946 | /* ISA interrupt detection code */ | 395 | /* ISA interrupt detection code */ |
| @@ -960,12 +409,12 @@ static unsigned detect_isa_irq(void __iomem *address) | |||
| 960 | 409 | ||
| 961 | irqs = probe_irq_on(); | 410 | irqs = probe_irq_on(); |
| 962 | /* Wait ... */ | 411 | /* Wait ... */ |
| 963 | udelay(5000L); | 412 | msleep(5); |
| 964 | 413 | ||
| 965 | /* Enable the Tx interrupts on the CD1400 */ | 414 | /* Enable the Tx interrupts on the CD1400 */ |
| 966 | local_irq_save(flags); | 415 | local_irq_save(flags); |
| 967 | cy_writeb(address + (CyCAR << index), 0); | 416 | cy_writeb(address + (CyCAR << index), 0); |
| 968 | cyy_issue_cmd(address, CyCHAN_CTL | CyENB_XMTR, index); | 417 | __cyy_issue_cmd(address, CyCHAN_CTL | CyENB_XMTR, index); |
| 969 | 418 | ||
| 970 | cy_writeb(address + (CyCAR << index), 0); | 419 | cy_writeb(address + (CyCAR << index), 0); |
| 971 | cy_writeb(address + (CySRER << index), | 420 | cy_writeb(address + (CySRER << index), |
| @@ -973,7 +422,7 @@ static unsigned detect_isa_irq(void __iomem *address) | |||
| 973 | local_irq_restore(flags); | 422 | local_irq_restore(flags); |
| 974 | 423 | ||
| 975 | /* Wait ... */ | 424 | /* Wait ... */ |
| 976 | udelay(5000L); | 425 | msleep(5); |
| 977 | 426 | ||
| 978 | /* Check which interrupt is in use */ | 427 | /* Check which interrupt is in use */ |
| 979 | irq = probe_irq_off(irqs); | 428 | irq = probe_irq_off(irqs); |
| @@ -999,7 +448,7 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, | |||
| 999 | struct cyclades_port *info; | 448 | struct cyclades_port *info; |
| 1000 | struct tty_struct *tty; | 449 | struct tty_struct *tty; |
| 1001 | int len, index = cinfo->bus_index; | 450 | int len, index = cinfo->bus_index; |
| 1002 | u8 save_xir, channel, save_car, data, char_count; | 451 | u8 ivr, save_xir, channel, save_car, data, char_count; |
| 1003 | 452 | ||
| 1004 | #ifdef CY_DEBUG_INTERRUPTS | 453 | #ifdef CY_DEBUG_INTERRUPTS |
| 1005 | printk(KERN_DEBUG "cyy_interrupt: rcvd intr, chip %d\n", chip); | 454 | printk(KERN_DEBUG "cyy_interrupt: rcvd intr, chip %d\n", chip); |
| @@ -1008,26 +457,25 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, | |||
| 1008 | save_xir = readb(base_addr + (CyRIR << index)); | 457 | save_xir = readb(base_addr + (CyRIR << index)); |
| 1009 | channel = save_xir & CyIRChannel; | 458 | channel = save_xir & CyIRChannel; |
| 1010 | info = &cinfo->ports[channel + chip * 4]; | 459 | info = &cinfo->ports[channel + chip * 4]; |
| 1011 | save_car = readb(base_addr + (CyCAR << index)); | 460 | save_car = cyy_readb(info, CyCAR); |
| 1012 | cy_writeb(base_addr + (CyCAR << index), save_xir); | 461 | cyy_writeb(info, CyCAR, save_xir); |
| 462 | ivr = cyy_readb(info, CyRIVR) & CyIVRMask; | ||
| 1013 | 463 | ||
| 464 | tty = tty_port_tty_get(&info->port); | ||
| 1014 | /* if there is nowhere to put the data, discard it */ | 465 | /* if there is nowhere to put the data, discard it */ |
| 1015 | if (info->port.tty == NULL) { | 466 | if (tty == NULL) { |
| 1016 | if ((readb(base_addr + (CyRIVR << index)) & CyIVRMask) == | 467 | if (ivr == CyIVRRxEx) { /* exception */ |
| 1017 | CyIVRRxEx) { /* exception */ | 468 | data = cyy_readb(info, CyRDSR); |
| 1018 | data = readb(base_addr + (CyRDSR << index)); | ||
| 1019 | } else { /* normal character reception */ | 469 | } else { /* normal character reception */ |
| 1020 | char_count = readb(base_addr + (CyRDCR << index)); | 470 | char_count = cyy_readb(info, CyRDCR); |
| 1021 | while (char_count--) | 471 | while (char_count--) |
| 1022 | data = readb(base_addr + (CyRDSR << index)); | 472 | data = cyy_readb(info, CyRDSR); |
| 1023 | } | 473 | } |
| 1024 | goto end; | 474 | goto end; |
| 1025 | } | 475 | } |
| 1026 | /* there is an open port for this data */ | 476 | /* there is an open port for this data */ |
| 1027 | tty = info->port.tty; | 477 | if (ivr == CyIVRRxEx) { /* exception */ |
| 1028 | if ((readb(base_addr + (CyRIVR << index)) & CyIVRMask) == | 478 | data = cyy_readb(info, CyRDSR); |
| 1029 | CyIVRRxEx) { /* exception */ | ||
| 1030 | data = readb(base_addr + (CyRDSR << index)); | ||
| 1031 | 479 | ||
| 1032 | /* For statistics only */ | 480 | /* For statistics only */ |
| 1033 | if (data & CyBREAK) | 481 | if (data & CyBREAK) |
| @@ -1041,28 +489,29 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, | |||
| 1041 | 489 | ||
| 1042 | if (data & info->ignore_status_mask) { | 490 | if (data & info->ignore_status_mask) { |
| 1043 | info->icount.rx++; | 491 | info->icount.rx++; |
| 492 | tty_kref_put(tty); | ||
| 1044 | return; | 493 | return; |
| 1045 | } | 494 | } |
| 1046 | if (tty_buffer_request_room(tty, 1)) { | 495 | if (tty_buffer_request_room(tty, 1)) { |
| 1047 | if (data & info->read_status_mask) { | 496 | if (data & info->read_status_mask) { |
| 1048 | if (data & CyBREAK) { | 497 | if (data & CyBREAK) { |
| 1049 | tty_insert_flip_char(tty, | 498 | tty_insert_flip_char(tty, |
| 1050 | readb(base_addr + (CyRDSR << | 499 | cyy_readb(info, CyRDSR), |
| 1051 | index)), TTY_BREAK); | 500 | TTY_BREAK); |
| 1052 | info->icount.rx++; | 501 | info->icount.rx++; |
| 1053 | if (info->port.flags & ASYNC_SAK) | 502 | if (info->port.flags & ASYNC_SAK) |
| 1054 | do_SAK(tty); | 503 | do_SAK(tty); |
| 1055 | } else if (data & CyFRAME) { | 504 | } else if (data & CyFRAME) { |
| 1056 | tty_insert_flip_char(tty, | 505 | tty_insert_flip_char(tty, |
| 1057 | readb(base_addr + (CyRDSR << | 506 | cyy_readb(info, CyRDSR), |
| 1058 | index)), TTY_FRAME); | 507 | TTY_FRAME); |
| 1059 | info->icount.rx++; | 508 | info->icount.rx++; |
| 1060 | info->idle_stats.frame_errs++; | 509 | info->idle_stats.frame_errs++; |
| 1061 | } else if (data & CyPARITY) { | 510 | } else if (data & CyPARITY) { |
| 1062 | /* Pieces of seven... */ | 511 | /* Pieces of seven... */ |
| 1063 | tty_insert_flip_char(tty, | 512 | tty_insert_flip_char(tty, |
| 1064 | readb(base_addr + (CyRDSR << | 513 | cyy_readb(info, CyRDSR), |
| 1065 | index)), TTY_PARITY); | 514 | TTY_PARITY); |
| 1066 | info->icount.rx++; | 515 | info->icount.rx++; |
| 1067 | info->idle_stats.parity_errs++; | 516 | info->idle_stats.parity_errs++; |
| 1068 | } else if (data & CyOVERRUN) { | 517 | } else if (data & CyOVERRUN) { |
| @@ -1074,8 +523,8 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, | |||
| 1074 | the next incoming character. | 523 | the next incoming character. |
| 1075 | */ | 524 | */ |
| 1076 | tty_insert_flip_char(tty, | 525 | tty_insert_flip_char(tty, |
| 1077 | readb(base_addr + (CyRDSR << | 526 | cyy_readb(info, CyRDSR), |
| 1078 | index)), TTY_FRAME); | 527 | TTY_FRAME); |
| 1079 | info->icount.rx++; | 528 | info->icount.rx++; |
| 1080 | info->idle_stats.overruns++; | 529 | info->idle_stats.overruns++; |
| 1081 | /* These two conditions may imply */ | 530 | /* These two conditions may imply */ |
| @@ -1099,7 +548,7 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, | |||
| 1099 | } | 548 | } |
| 1100 | } else { /* normal character reception */ | 549 | } else { /* normal character reception */ |
| 1101 | /* load # chars available from the chip */ | 550 | /* load # chars available from the chip */ |
| 1102 | char_count = readb(base_addr + (CyRDCR << index)); | 551 | char_count = cyy_readb(info, CyRDCR); |
| 1103 | 552 | ||
| 1104 | #ifdef CY_ENABLE_MONITORING | 553 | #ifdef CY_ENABLE_MONITORING |
| 1105 | ++info->mon.int_count; | 554 | ++info->mon.int_count; |
| @@ -1110,7 +559,7 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, | |||
| 1110 | #endif | 559 | #endif |
| 1111 | len = tty_buffer_request_room(tty, char_count); | 560 | len = tty_buffer_request_room(tty, char_count); |
| 1112 | while (len--) { | 561 | while (len--) { |
| 1113 | data = readb(base_addr + (CyRDSR << index)); | 562 | data = cyy_readb(info, CyRDSR); |
| 1114 | tty_insert_flip_char(tty, data, TTY_NORMAL); | 563 | tty_insert_flip_char(tty, data, TTY_NORMAL); |
| 1115 | info->idle_stats.recv_bytes++; | 564 | info->idle_stats.recv_bytes++; |
| 1116 | info->icount.rx++; | 565 | info->icount.rx++; |
| @@ -1121,16 +570,18 @@ static void cyy_chip_rx(struct cyclades_card *cinfo, int chip, | |||
| 1121 | info->idle_stats.recv_idle = jiffies; | 570 | info->idle_stats.recv_idle = jiffies; |
| 1122 | } | 571 | } |
| 1123 | tty_schedule_flip(tty); | 572 | tty_schedule_flip(tty); |
| 573 | tty_kref_put(tty); | ||
| 1124 | end: | 574 | end: |
| 1125 | /* end of service */ | 575 | /* end of service */ |
| 1126 | cy_writeb(base_addr + (CyRIR << index), save_xir & 0x3f); | 576 | cyy_writeb(info, CyRIR, save_xir & 0x3f); |
| 1127 | cy_writeb(base_addr + (CyCAR << index), save_car); | 577 | cyy_writeb(info, CyCAR, save_car); |
| 1128 | } | 578 | } |
| 1129 | 579 | ||
| 1130 | static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, | 580 | static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, |
| 1131 | void __iomem *base_addr) | 581 | void __iomem *base_addr) |
| 1132 | { | 582 | { |
| 1133 | struct cyclades_port *info; | 583 | struct cyclades_port *info; |
| 584 | struct tty_struct *tty; | ||
| 1134 | int char_count, index = cinfo->bus_index; | 585 | int char_count, index = cinfo->bus_index; |
| 1135 | u8 save_xir, channel, save_car, outch; | 586 | u8 save_xir, channel, save_car, outch; |
| 1136 | 587 | ||
| @@ -1154,9 +605,9 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, | |||
| 1154 | goto end; | 605 | goto end; |
| 1155 | } | 606 | } |
| 1156 | info = &cinfo->ports[channel + chip * 4]; | 607 | info = &cinfo->ports[channel + chip * 4]; |
| 1157 | if (info->port.tty == NULL) { | 608 | tty = tty_port_tty_get(&info->port); |
| 1158 | cy_writeb(base_addr + (CySRER << index), | 609 | if (tty == NULL) { |
| 1159 | readb(base_addr + (CySRER << index)) & ~CyTxRdy); | 610 | cyy_writeb(info, CySRER, cyy_readb(info, CySRER) & ~CyTxRdy); |
| 1160 | goto end; | 611 | goto end; |
| 1161 | } | 612 | } |
| 1162 | 613 | ||
| @@ -1165,7 +616,7 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, | |||
| 1165 | 616 | ||
| 1166 | if (info->x_char) { /* send special char */ | 617 | if (info->x_char) { /* send special char */ |
| 1167 | outch = info->x_char; | 618 | outch = info->x_char; |
| 1168 | cy_writeb(base_addr + (CyTDR << index), outch); | 619 | cyy_writeb(info, CyTDR, outch); |
| 1169 | char_count--; | 620 | char_count--; |
| 1170 | info->icount.tx++; | 621 | info->icount.tx++; |
| 1171 | info->x_char = 0; | 622 | info->x_char = 0; |
| @@ -1173,14 +624,14 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, | |||
| 1173 | 624 | ||
| 1174 | if (info->breakon || info->breakoff) { | 625 | if (info->breakon || info->breakoff) { |
| 1175 | if (info->breakon) { | 626 | if (info->breakon) { |
| 1176 | cy_writeb(base_addr + (CyTDR << index), 0); | 627 | cyy_writeb(info, CyTDR, 0); |
| 1177 | cy_writeb(base_addr + (CyTDR << index), 0x81); | 628 | cyy_writeb(info, CyTDR, 0x81); |
| 1178 | info->breakon = 0; | 629 | info->breakon = 0; |
| 1179 | char_count -= 2; | 630 | char_count -= 2; |
| 1180 | } | 631 | } |
| 1181 | if (info->breakoff) { | 632 | if (info->breakoff) { |
| 1182 | cy_writeb(base_addr + (CyTDR << index), 0); | 633 | cyy_writeb(info, CyTDR, 0); |
| 1183 | cy_writeb(base_addr + (CyTDR << index), 0x83); | 634 | cyy_writeb(info, CyTDR, 0x83); |
| 1184 | info->breakoff = 0; | 635 | info->breakoff = 0; |
| 1185 | char_count -= 2; | 636 | char_count -= 2; |
| 1186 | } | 637 | } |
| @@ -1188,27 +639,23 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, | |||
| 1188 | 639 | ||
| 1189 | while (char_count-- > 0) { | 640 | while (char_count-- > 0) { |
| 1190 | if (!info->xmit_cnt) { | 641 | if (!info->xmit_cnt) { |
| 1191 | if (readb(base_addr + (CySRER << index)) & CyTxMpty) { | 642 | if (cyy_readb(info, CySRER) & CyTxMpty) { |
| 1192 | cy_writeb(base_addr + (CySRER << index), | 643 | cyy_writeb(info, CySRER, |
| 1193 | readb(base_addr + (CySRER << index)) & | 644 | cyy_readb(info, CySRER) & ~CyTxMpty); |
| 1194 | ~CyTxMpty); | ||
| 1195 | } else { | 645 | } else { |
| 1196 | cy_writeb(base_addr + (CySRER << index), | 646 | cyy_writeb(info, CySRER, CyTxMpty | |
| 1197 | (readb(base_addr + (CySRER << index)) & | 647 | (cyy_readb(info, CySRER) & ~CyTxRdy)); |
| 1198 | ~CyTxRdy) | CyTxMpty); | ||
| 1199 | } | 648 | } |
| 1200 | goto done; | 649 | goto done; |
| 1201 | } | 650 | } |
| 1202 | if (info->port.xmit_buf == NULL) { | 651 | if (info->port.xmit_buf == NULL) { |
| 1203 | cy_writeb(base_addr + (CySRER << index), | 652 | cyy_writeb(info, CySRER, |
| 1204 | readb(base_addr + (CySRER << index)) & | 653 | cyy_readb(info, CySRER) & ~CyTxRdy); |
| 1205 | ~CyTxRdy); | ||
| 1206 | goto done; | 654 | goto done; |
| 1207 | } | 655 | } |
| 1208 | if (info->port.tty->stopped || info->port.tty->hw_stopped) { | 656 | if (tty->stopped || tty->hw_stopped) { |
| 1209 | cy_writeb(base_addr + (CySRER << index), | 657 | cyy_writeb(info, CySRER, |
| 1210 | readb(base_addr + (CySRER << index)) & | 658 | cyy_readb(info, CySRER) & ~CyTxRdy); |
| 1211 | ~CyTxRdy); | ||
| 1212 | goto done; | 659 | goto done; |
| 1213 | } | 660 | } |
| 1214 | /* Because the Embedded Transmit Commands have been enabled, | 661 | /* Because the Embedded Transmit Commands have been enabled, |
| @@ -1225,15 +672,15 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, | |||
| 1225 | info->xmit_cnt--; | 672 | info->xmit_cnt--; |
| 1226 | info->xmit_tail = (info->xmit_tail + 1) & | 673 | info->xmit_tail = (info->xmit_tail + 1) & |
| 1227 | (SERIAL_XMIT_SIZE - 1); | 674 | (SERIAL_XMIT_SIZE - 1); |
| 1228 | cy_writeb(base_addr + (CyTDR << index), outch); | 675 | cyy_writeb(info, CyTDR, outch); |
| 1229 | info->icount.tx++; | 676 | info->icount.tx++; |
| 1230 | } else { | 677 | } else { |
| 1231 | if (char_count > 1) { | 678 | if (char_count > 1) { |
| 1232 | info->xmit_cnt--; | 679 | info->xmit_cnt--; |
| 1233 | info->xmit_tail = (info->xmit_tail + 1) & | 680 | info->xmit_tail = (info->xmit_tail + 1) & |
| 1234 | (SERIAL_XMIT_SIZE - 1); | 681 | (SERIAL_XMIT_SIZE - 1); |
| 1235 | cy_writeb(base_addr + (CyTDR << index), outch); | 682 | cyy_writeb(info, CyTDR, outch); |
| 1236 | cy_writeb(base_addr + (CyTDR << index), 0); | 683 | cyy_writeb(info, CyTDR, 0); |
| 1237 | info->icount.tx++; | 684 | info->icount.tx++; |
| 1238 | char_count--; | 685 | char_count--; |
| 1239 | } | 686 | } |
| @@ -1241,17 +688,19 @@ static void cyy_chip_tx(struct cyclades_card *cinfo, unsigned int chip, | |||
| 1241 | } | 688 | } |
| 1242 | 689 | ||
| 1243 | done: | 690 | done: |
| 1244 | tty_wakeup(info->port.tty); | 691 | tty_wakeup(tty); |
| 692 | tty_kref_put(tty); | ||
| 1245 | end: | 693 | end: |
| 1246 | /* end of service */ | 694 | /* end of service */ |
| 1247 | cy_writeb(base_addr + (CyTIR << index), save_xir & 0x3f); | 695 | cyy_writeb(info, CyTIR, save_xir & 0x3f); |
| 1248 | cy_writeb(base_addr + (CyCAR << index), save_car); | 696 | cyy_writeb(info, CyCAR, save_car); |
| 1249 | } | 697 | } |
| 1250 | 698 | ||
| 1251 | static void cyy_chip_modem(struct cyclades_card *cinfo, int chip, | 699 | static void cyy_chip_modem(struct cyclades_card *cinfo, int chip, |
| 1252 | void __iomem *base_addr) | 700 | void __iomem *base_addr) |
| 1253 | { | 701 | { |
| 1254 | struct cyclades_port *info; | 702 | struct cyclades_port *info; |
| 703 | struct tty_struct *tty; | ||
| 1255 | int index = cinfo->bus_index; | 704 | int index = cinfo->bus_index; |
| 1256 | u8 save_xir, channel, save_car, mdm_change, mdm_status; | 705 | u8 save_xir, channel, save_car, mdm_change, mdm_status; |
| 1257 | 706 | ||
| @@ -1259,13 +708,14 @@ static void cyy_chip_modem(struct cyclades_card *cinfo, int chip, | |||
| 1259 | save_xir = readb(base_addr + (CyMIR << index)); | 708 | save_xir = readb(base_addr + (CyMIR << index)); |
| 1260 | channel = save_xir & CyIRChannel; | 709 | channel = save_xir & CyIRChannel; |
| 1261 | info = &cinfo->ports[channel + chip * 4]; | 710 | info = &cinfo->ports[channel + chip * 4]; |
| 1262 | save_car = readb(base_addr + (CyCAR << index)); | 711 | save_car = cyy_readb(info, CyCAR); |
| 1263 | cy_writeb(base_addr + (CyCAR << index), save_xir); | 712 | cyy_writeb(info, CyCAR, save_xir); |
| 1264 | 713 | ||
| 1265 | mdm_change = readb(base_addr + (CyMISR << index)); | 714 | mdm_change = cyy_readb(info, CyMISR); |
| 1266 | mdm_status = readb(base_addr + (CyMSVR1 << index)); | 715 | mdm_status = cyy_readb(info, CyMSVR1); |
| 1267 | 716 | ||
| 1268 | if (!info->port.tty) | 717 | tty = tty_port_tty_get(&info->port); |
| 718 | if (!tty) | ||
| 1269 | goto end; | 719 | goto end; |
| 1270 | 720 | ||
| 1271 | if (mdm_change & CyANY_DELTA) { | 721 | if (mdm_change & CyANY_DELTA) { |
| @@ -1279,35 +729,32 @@ static void cyy_chip_modem(struct cyclades_card *cinfo, int chip, | |||
| 1279 | if (mdm_change & CyRI) | 729 | if (mdm_change & CyRI) |
| 1280 | info->icount.rng++; | 730 | info->icount.rng++; |
| 1281 | 731 | ||
| 1282 | wake_up_interruptible(&info->delta_msr_wait); | 732 | wake_up_interruptible(&info->port.delta_msr_wait); |
| 1283 | } | 733 | } |
| 1284 | 734 | ||
| 1285 | if ((mdm_change & CyDCD) && (info->port.flags & ASYNC_CHECK_CD)) { | 735 | if ((mdm_change & CyDCD) && (info->port.flags & ASYNC_CHECK_CD)) { |
| 1286 | if (!(mdm_status & CyDCD)) { | 736 | if (mdm_status & CyDCD) |
| 1287 | tty_hangup(info->port.tty); | 737 | wake_up_interruptible(&info->port.open_wait); |
| 1288 | info->port.flags &= ~ASYNC_NORMAL_ACTIVE; | 738 | else |
| 1289 | } | 739 | tty_hangup(tty); |
| 1290 | wake_up_interruptible(&info->port.open_wait); | ||
| 1291 | } | 740 | } |
| 1292 | if ((mdm_change & CyCTS) && (info->port.flags & ASYNC_CTS_FLOW)) { | 741 | if ((mdm_change & CyCTS) && (info->port.flags & ASYNC_CTS_FLOW)) { |
| 1293 | if (info->port.tty->hw_stopped) { | 742 | if (tty->hw_stopped) { |
| 1294 | if (mdm_status & CyCTS) { | 743 | if (mdm_status & CyCTS) { |
| 1295 | /* cy_start isn't used | 744 | /* cy_start isn't used |
| 1296 | because... !!! */ | 745 | because... !!! */ |
| 1297 | info->port.tty->hw_stopped = 0; | 746 | tty->hw_stopped = 0; |
| 1298 | cy_writeb(base_addr + (CySRER << index), | 747 | cyy_writeb(info, CySRER, |
| 1299 | readb(base_addr + (CySRER << index)) | | 748 | cyy_readb(info, CySRER) | CyTxRdy); |
| 1300 | CyTxRdy); | 749 | tty_wakeup(tty); |
| 1301 | tty_wakeup(info->port.tty); | ||
| 1302 | } | 750 | } |
| 1303 | } else { | 751 | } else { |
| 1304 | if (!(mdm_status & CyCTS)) { | 752 | if (!(mdm_status & CyCTS)) { |
| 1305 | /* cy_stop isn't used | 753 | /* cy_stop isn't used |
| 1306 | because ... !!! */ | 754 | because ... !!! */ |
| 1307 | info->port.tty->hw_stopped = 1; | 755 | tty->hw_stopped = 1; |
| 1308 | cy_writeb(base_addr + (CySRER << index), | 756 | cyy_writeb(info, CySRER, |
| 1309 | readb(base_addr + (CySRER << index)) & | 757 | cyy_readb(info, CySRER) & ~CyTxRdy); |
| 1310 | ~CyTxRdy); | ||
| 1311 | } | 758 | } |
| 1312 | } | 759 | } |
| 1313 | } | 760 | } |
| @@ -1315,10 +762,11 @@ static void cyy_chip_modem(struct cyclades_card *cinfo, int chip, | |||
| 1315 | } | 762 | } |
| 1316 | if (mdm_change & CyRI) { | 763 | if (mdm_change & CyRI) { |
| 1317 | }*/ | 764 | }*/ |
| 765 | tty_kref_put(tty); | ||
| 1318 | end: | 766 | end: |
| 1319 | /* end of service */ | 767 | /* end of service */ |
| 1320 | cy_writeb(base_addr + (CyMIR << index), save_xir & 0x3f); | 768 | cyy_writeb(info, CyMIR, save_xir & 0x3f); |
| 1321 | cy_writeb(base_addr + (CyCAR << index), save_car); | 769 | cyy_writeb(info, CyCAR, save_car); |
| 1322 | } | 770 | } |
| 1323 | 771 | ||
| 1324 | /* The real interrupt service routine is called | 772 | /* The real interrupt service routine is called |
| @@ -1389,6 +837,56 @@ static irqreturn_t cyy_interrupt(int irq, void *dev_id) | |||
| 1389 | return IRQ_HANDLED; | 837 | return IRQ_HANDLED; |
| 1390 | } /* cyy_interrupt */ | 838 | } /* cyy_interrupt */ |
| 1391 | 839 | ||
| 840 | static void cyy_change_rts_dtr(struct cyclades_port *info, unsigned int set, | ||
| 841 | unsigned int clear) | ||
| 842 | { | ||
| 843 | struct cyclades_card *card = info->card; | ||
| 844 | int channel = info->line - card->first_line; | ||
| 845 | u32 rts, dtr, msvrr, msvrd; | ||
| 846 | |||
| 847 | channel &= 0x03; | ||
| 848 | |||
| 849 | if (info->rtsdtr_inv) { | ||
| 850 | msvrr = CyMSVR2; | ||
| 851 | msvrd = CyMSVR1; | ||
| 852 | rts = CyDTR; | ||
| 853 | dtr = CyRTS; | ||
| 854 | } else { | ||
| 855 | msvrr = CyMSVR1; | ||
| 856 | msvrd = CyMSVR2; | ||
| 857 | rts = CyRTS; | ||
| 858 | dtr = CyDTR; | ||
| 859 | } | ||
| 860 | if (set & TIOCM_RTS) { | ||
| 861 | cyy_writeb(info, CyCAR, channel); | ||
| 862 | cyy_writeb(info, msvrr, rts); | ||
| 863 | } | ||
| 864 | if (clear & TIOCM_RTS) { | ||
| 865 | cyy_writeb(info, CyCAR, channel); | ||
| 866 | cyy_writeb(info, msvrr, ~rts); | ||
| 867 | } | ||
| 868 | if (set & TIOCM_DTR) { | ||
| 869 | cyy_writeb(info, CyCAR, channel); | ||
| 870 | cyy_writeb(info, msvrd, dtr); | ||
| 871 | #ifdef CY_DEBUG_DTR | ||
| 872 | printk(KERN_DEBUG "cyc:set_modem_info raising DTR\n"); | ||
| 873 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 874 | cyy_readb(info, CyMSVR1), | ||
| 875 | cyy_readb(info, CyMSVR2)); | ||
| 876 | #endif | ||
| 877 | } | ||
| 878 | if (clear & TIOCM_DTR) { | ||
| 879 | cyy_writeb(info, CyCAR, channel); | ||
| 880 | cyy_writeb(info, msvrd, ~dtr); | ||
| 881 | #ifdef CY_DEBUG_DTR | ||
| 882 | printk(KERN_DEBUG "cyc:set_modem_info dropping DTR\n"); | ||
| 883 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 884 | cyy_readb(info, CyMSVR1), | ||
| 885 | cyy_readb(info, CyMSVR2)); | ||
| 886 | #endif | ||
| 887 | } | ||
| 888 | } | ||
| 889 | |||
| 1392 | /***********************************************************/ | 890 | /***********************************************************/ |
| 1393 | /********* End of block of Cyclom-Y specific code **********/ | 891 | /********* End of block of Cyclom-Y specific code **********/ |
| 1394 | /******** Start of block of Cyclades-Z specific code *******/ | 892 | /******** Start of block of Cyclades-Z specific code *******/ |
| @@ -1398,15 +896,9 @@ static int | |||
| 1398 | cyz_fetch_msg(struct cyclades_card *cinfo, | 896 | cyz_fetch_msg(struct cyclades_card *cinfo, |
| 1399 | __u32 *channel, __u8 *cmd, __u32 *param) | 897 | __u32 *channel, __u8 *cmd, __u32 *param) |
| 1400 | { | 898 | { |
| 1401 | struct FIRM_ID __iomem *firm_id; | 899 | struct BOARD_CTRL __iomem *board_ctrl = cinfo->board_ctrl; |
| 1402 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 1403 | struct BOARD_CTRL __iomem *board_ctrl; | ||
| 1404 | unsigned long loc_doorbell; | 900 | unsigned long loc_doorbell; |
| 1405 | 901 | ||
| 1406 | firm_id = cinfo->base_addr + ID_ADDRESS; | ||
| 1407 | zfw_ctrl = cinfo->base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 1408 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 1409 | |||
| 1410 | loc_doorbell = readl(&cinfo->ctl_addr.p9060->loc_doorbell); | 902 | loc_doorbell = readl(&cinfo->ctl_addr.p9060->loc_doorbell); |
| 1411 | if (loc_doorbell) { | 903 | if (loc_doorbell) { |
| 1412 | *cmd = (char)(0xff & loc_doorbell); | 904 | *cmd = (char)(0xff & loc_doorbell); |
| @@ -1422,19 +914,13 @@ static int | |||
| 1422 | cyz_issue_cmd(struct cyclades_card *cinfo, | 914 | cyz_issue_cmd(struct cyclades_card *cinfo, |
| 1423 | __u32 channel, __u8 cmd, __u32 param) | 915 | __u32 channel, __u8 cmd, __u32 param) |
| 1424 | { | 916 | { |
| 1425 | struct FIRM_ID __iomem *firm_id; | 917 | struct BOARD_CTRL __iomem *board_ctrl = cinfo->board_ctrl; |
| 1426 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 1427 | struct BOARD_CTRL __iomem *board_ctrl; | ||
| 1428 | __u32 __iomem *pci_doorbell; | 918 | __u32 __iomem *pci_doorbell; |
| 1429 | unsigned int index; | 919 | unsigned int index; |
| 1430 | 920 | ||
| 1431 | firm_id = cinfo->base_addr + ID_ADDRESS; | ||
| 1432 | if (!cyz_is_loaded(cinfo)) | 921 | if (!cyz_is_loaded(cinfo)) |
| 1433 | return -1; | 922 | return -1; |
| 1434 | 923 | ||
| 1435 | zfw_ctrl = cinfo->base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 1436 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 1437 | |||
| 1438 | index = 0; | 924 | index = 0; |
| 1439 | pci_doorbell = &cinfo->ctl_addr.p9060->pci_doorbell; | 925 | pci_doorbell = &cinfo->ctl_addr.p9060->pci_doorbell; |
| 1440 | while ((readl(pci_doorbell) & 0xff) != 0) { | 926 | while ((readl(pci_doorbell) & 0xff) != 0) { |
| @@ -1449,11 +935,10 @@ cyz_issue_cmd(struct cyclades_card *cinfo, | |||
| 1449 | return 0; | 935 | return 0; |
| 1450 | } /* cyz_issue_cmd */ | 936 | } /* cyz_issue_cmd */ |
| 1451 | 937 | ||
| 1452 | static void cyz_handle_rx(struct cyclades_port *info, | 938 | static void cyz_handle_rx(struct cyclades_port *info, struct tty_struct *tty) |
| 1453 | struct BUF_CTRL __iomem *buf_ctrl) | ||
| 1454 | { | 939 | { |
| 940 | struct BUF_CTRL __iomem *buf_ctrl = info->u.cyz.buf_ctrl; | ||
| 1455 | struct cyclades_card *cinfo = info->card; | 941 | struct cyclades_card *cinfo = info->card; |
| 1456 | struct tty_struct *tty = info->port.tty; | ||
| 1457 | unsigned int char_count; | 942 | unsigned int char_count; |
| 1458 | int len; | 943 | int len; |
| 1459 | #ifdef BLOCKMOVE | 944 | #ifdef BLOCKMOVE |
| @@ -1542,11 +1027,10 @@ static void cyz_handle_rx(struct cyclades_port *info, | |||
| 1542 | } | 1027 | } |
| 1543 | } | 1028 | } |
| 1544 | 1029 | ||
| 1545 | static void cyz_handle_tx(struct cyclades_port *info, | 1030 | static void cyz_handle_tx(struct cyclades_port *info, struct tty_struct *tty) |
| 1546 | struct BUF_CTRL __iomem *buf_ctrl) | ||
| 1547 | { | 1031 | { |
| 1032 | struct BUF_CTRL __iomem *buf_ctrl = info->u.cyz.buf_ctrl; | ||
| 1548 | struct cyclades_card *cinfo = info->card; | 1033 | struct cyclades_card *cinfo = info->card; |
| 1549 | struct tty_struct *tty = info->port.tty; | ||
| 1550 | u8 data; | 1034 | u8 data; |
| 1551 | unsigned int char_count; | 1035 | unsigned int char_count; |
| 1552 | #ifdef BLOCKMOVE | 1036 | #ifdef BLOCKMOVE |
| @@ -1621,34 +1105,24 @@ ztxdone: | |||
| 1621 | 1105 | ||
| 1622 | static void cyz_handle_cmd(struct cyclades_card *cinfo) | 1106 | static void cyz_handle_cmd(struct cyclades_card *cinfo) |
| 1623 | { | 1107 | { |
| 1108 | struct BOARD_CTRL __iomem *board_ctrl = cinfo->board_ctrl; | ||
| 1624 | struct tty_struct *tty; | 1109 | struct tty_struct *tty; |
| 1625 | struct cyclades_port *info; | 1110 | struct cyclades_port *info; |
| 1626 | static struct FIRM_ID __iomem *firm_id; | ||
| 1627 | static struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 1628 | static struct BOARD_CTRL __iomem *board_ctrl; | ||
| 1629 | static struct CH_CTRL __iomem *ch_ctrl; | ||
| 1630 | static struct BUF_CTRL __iomem *buf_ctrl; | ||
| 1631 | __u32 channel, param, fw_ver; | 1111 | __u32 channel, param, fw_ver; |
| 1632 | __u8 cmd; | 1112 | __u8 cmd; |
| 1633 | int special_count; | 1113 | int special_count; |
| 1634 | int delta_count; | 1114 | int delta_count; |
| 1635 | 1115 | ||
| 1636 | firm_id = cinfo->base_addr + ID_ADDRESS; | ||
| 1637 | zfw_ctrl = cinfo->base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 1638 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 1639 | fw_ver = readl(&board_ctrl->fw_version); | 1116 | fw_ver = readl(&board_ctrl->fw_version); |
| 1640 | 1117 | ||
| 1641 | while (cyz_fetch_msg(cinfo, &channel, &cmd, ¶m) == 1) { | 1118 | while (cyz_fetch_msg(cinfo, &channel, &cmd, ¶m) == 1) { |
| 1642 | special_count = 0; | 1119 | special_count = 0; |
| 1643 | delta_count = 0; | 1120 | delta_count = 0; |
| 1644 | info = &cinfo->ports[channel]; | 1121 | info = &cinfo->ports[channel]; |
| 1645 | tty = info->port.tty; | 1122 | tty = tty_port_tty_get(&info->port); |
| 1646 | if (tty == NULL) | 1123 | if (tty == NULL) |
| 1647 | continue; | 1124 | continue; |
| 1648 | 1125 | ||
| 1649 | ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]); | ||
| 1650 | buf_ctrl = &(zfw_ctrl->buf_ctrl[channel]); | ||
| 1651 | |||
| 1652 | switch (cmd) { | 1126 | switch (cmd) { |
| 1653 | case C_CM_PR_ERROR: | 1127 | case C_CM_PR_ERROR: |
| 1654 | tty_insert_flip_char(tty, 0, TTY_PARITY); | 1128 | tty_insert_flip_char(tty, 0, TTY_PARITY); |
| @@ -1669,15 +1143,12 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo) | |||
| 1669 | info->icount.dcd++; | 1143 | info->icount.dcd++; |
| 1670 | delta_count++; | 1144 | delta_count++; |
| 1671 | if (info->port.flags & ASYNC_CHECK_CD) { | 1145 | if (info->port.flags & ASYNC_CHECK_CD) { |
| 1672 | if ((fw_ver > 241 ? ((u_long) param) : | 1146 | u32 dcd = fw_ver > 241 ? param : |
| 1673 | readl(&ch_ctrl->rs_status)) & | 1147 | readl(&info->u.cyz.ch_ctrl->rs_status); |
| 1674 | C_RS_DCD) { | 1148 | if (dcd & C_RS_DCD) |
| 1675 | wake_up_interruptible(&info->port.open_wait); | 1149 | wake_up_interruptible(&info->port.open_wait); |
| 1676 | } else { | 1150 | else |
| 1677 | tty_hangup(info->port.tty); | 1151 | tty_hangup(tty); |
| 1678 | wake_up_interruptible(&info->port.open_wait); | ||
| 1679 | info->port.flags &= ~ASYNC_NORMAL_ACTIVE; | ||
| 1680 | } | ||
| 1681 | } | 1152 | } |
| 1682 | break; | 1153 | break; |
| 1683 | case C_CM_MCTS: | 1154 | case C_CM_MCTS: |
| @@ -1706,7 +1177,7 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo) | |||
| 1706 | printk(KERN_DEBUG "cyz_interrupt: rcvd intr, card %d, " | 1177 | printk(KERN_DEBUG "cyz_interrupt: rcvd intr, card %d, " |
| 1707 | "port %ld\n", info->card, channel); | 1178 | "port %ld\n", info->card, channel); |
| 1708 | #endif | 1179 | #endif |
| 1709 | cyz_handle_rx(info, buf_ctrl); | 1180 | cyz_handle_rx(info, tty); |
| 1710 | break; | 1181 | break; |
| 1711 | case C_CM_TXBEMPTY: | 1182 | case C_CM_TXBEMPTY: |
| 1712 | case C_CM_TXLOWWM: | 1183 | case C_CM_TXLOWWM: |
| @@ -1716,7 +1187,7 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo) | |||
| 1716 | printk(KERN_DEBUG "cyz_interrupt: xmit intr, card %d, " | 1187 | printk(KERN_DEBUG "cyz_interrupt: xmit intr, card %d, " |
| 1717 | "port %ld\n", info->card, channel); | 1188 | "port %ld\n", info->card, channel); |
| 1718 | #endif | 1189 | #endif |
| 1719 | cyz_handle_tx(info, buf_ctrl); | 1190 | cyz_handle_tx(info, tty); |
| 1720 | break; | 1191 | break; |
| 1721 | #endif /* CONFIG_CYZ_INTR */ | 1192 | #endif /* CONFIG_CYZ_INTR */ |
| 1722 | case C_CM_FATAL: | 1193 | case C_CM_FATAL: |
| @@ -1726,9 +1197,10 @@ static void cyz_handle_cmd(struct cyclades_card *cinfo) | |||
| 1726 | break; | 1197 | break; |
| 1727 | } | 1198 | } |
| 1728 | if (delta_count) | 1199 | if (delta_count) |
| 1729 | wake_up_interruptible(&info->delta_msr_wait); | 1200 | wake_up_interruptible(&info->port.delta_msr_wait); |
| 1730 | if (special_count) | 1201 | if (special_count) |
| 1731 | tty_schedule_flip(tty); | 1202 | tty_schedule_flip(tty); |
| 1203 | tty_kref_put(tty); | ||
| 1732 | } | 1204 | } |
| 1733 | } | 1205 | } |
| 1734 | 1206 | ||
| @@ -1774,10 +1246,6 @@ static void cyz_poll(unsigned long arg) | |||
| 1774 | { | 1246 | { |
| 1775 | struct cyclades_card *cinfo; | 1247 | struct cyclades_card *cinfo; |
| 1776 | struct cyclades_port *info; | 1248 | struct cyclades_port *info; |
| 1777 | struct tty_struct *tty; | ||
| 1778 | struct FIRM_ID __iomem *firm_id; | ||
| 1779 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 1780 | struct BUF_CTRL __iomem *buf_ctrl; | ||
| 1781 | unsigned long expires = jiffies + HZ; | 1249 | unsigned long expires = jiffies + HZ; |
| 1782 | unsigned int port, card; | 1250 | unsigned int port, card; |
| 1783 | 1251 | ||
| @@ -1789,10 +1257,6 @@ static void cyz_poll(unsigned long arg) | |||
| 1789 | if (!cyz_is_loaded(cinfo)) | 1257 | if (!cyz_is_loaded(cinfo)) |
| 1790 | continue; | 1258 | continue; |
| 1791 | 1259 | ||
| 1792 | firm_id = cinfo->base_addr + ID_ADDRESS; | ||
| 1793 | zfw_ctrl = cinfo->base_addr + | ||
| 1794 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 1795 | |||
| 1796 | /* Skip first polling cycle to avoid racing conditions with the FW */ | 1260 | /* Skip first polling cycle to avoid racing conditions with the FW */ |
| 1797 | if (!cinfo->intr_enabled) { | 1261 | if (!cinfo->intr_enabled) { |
| 1798 | cinfo->intr_enabled = 1; | 1262 | cinfo->intr_enabled = 1; |
| @@ -1802,13 +1266,17 @@ static void cyz_poll(unsigned long arg) | |||
| 1802 | cyz_handle_cmd(cinfo); | 1266 | cyz_handle_cmd(cinfo); |
| 1803 | 1267 | ||
| 1804 | for (port = 0; port < cinfo->nports; port++) { | 1268 | for (port = 0; port < cinfo->nports; port++) { |
| 1269 | struct tty_struct *tty; | ||
| 1270 | |||
| 1805 | info = &cinfo->ports[port]; | 1271 | info = &cinfo->ports[port]; |
| 1806 | tty = info->port.tty; | 1272 | tty = tty_port_tty_get(&info->port); |
| 1807 | buf_ctrl = &(zfw_ctrl->buf_ctrl[port]); | 1273 | /* OK to pass NULL to the handle functions below. |
| 1274 | They need to drop the data in that case. */ | ||
| 1808 | 1275 | ||
| 1809 | if (!info->throttle) | 1276 | if (!info->throttle) |
| 1810 | cyz_handle_rx(info, buf_ctrl); | 1277 | cyz_handle_rx(info, tty); |
| 1811 | cyz_handle_tx(info, buf_ctrl); | 1278 | cyz_handle_tx(info, tty); |
| 1279 | tty_kref_put(tty); | ||
| 1812 | } | 1280 | } |
| 1813 | /* poll every 'cyz_polling_cycle' period */ | 1281 | /* poll every 'cyz_polling_cycle' period */ |
| 1814 | expires = jiffies + cyz_polling_cycle; | 1282 | expires = jiffies + cyz_polling_cycle; |
| @@ -1824,13 +1292,12 @@ static void cyz_poll(unsigned long arg) | |||
| 1824 | /* This is called whenever a port becomes active; | 1292 | /* This is called whenever a port becomes active; |
| 1825 | interrupts are enabled and DTR & RTS are turned on. | 1293 | interrupts are enabled and DTR & RTS are turned on. |
| 1826 | */ | 1294 | */ |
| 1827 | static int startup(struct cyclades_port *info) | 1295 | static int cy_startup(struct cyclades_port *info, struct tty_struct *tty) |
| 1828 | { | 1296 | { |
| 1829 | struct cyclades_card *card; | 1297 | struct cyclades_card *card; |
| 1830 | unsigned long flags; | 1298 | unsigned long flags; |
| 1831 | int retval = 0; | 1299 | int retval = 0; |
| 1832 | void __iomem *base_addr; | 1300 | int channel; |
| 1833 | int chip, channel, index; | ||
| 1834 | unsigned long page; | 1301 | unsigned long page; |
| 1835 | 1302 | ||
| 1836 | card = info->card; | 1303 | card = info->card; |
| @@ -1842,15 +1309,11 @@ static int startup(struct cyclades_port *info) | |||
| 1842 | 1309 | ||
| 1843 | spin_lock_irqsave(&card->card_lock, flags); | 1310 | spin_lock_irqsave(&card->card_lock, flags); |
| 1844 | 1311 | ||
| 1845 | if (info->port.flags & ASYNC_INITIALIZED) { | 1312 | if (info->port.flags & ASYNC_INITIALIZED) |
| 1846 | free_page(page); | ||
| 1847 | goto errout; | 1313 | goto errout; |
| 1848 | } | ||
| 1849 | 1314 | ||
| 1850 | if (!info->type) { | 1315 | if (!info->type) { |
| 1851 | if (info->port.tty) | 1316 | set_bit(TTY_IO_ERROR, &tty->flags); |
| 1852 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | ||
| 1853 | free_page(page); | ||
| 1854 | goto errout; | 1317 | goto errout; |
| 1855 | } | 1318 | } |
| 1856 | 1319 | ||
| @@ -1861,96 +1324,53 @@ static int startup(struct cyclades_port *info) | |||
| 1861 | 1324 | ||
| 1862 | spin_unlock_irqrestore(&card->card_lock, flags); | 1325 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 1863 | 1326 | ||
| 1864 | set_line_char(info); | 1327 | cy_set_line_char(info, tty); |
| 1865 | 1328 | ||
| 1866 | if (!cy_is_Z(card)) { | 1329 | if (!cy_is_Z(card)) { |
| 1867 | chip = channel >> 2; | ||
| 1868 | channel &= 0x03; | 1330 | channel &= 0x03; |
| 1869 | index = card->bus_index; | ||
| 1870 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 1871 | 1331 | ||
| 1872 | #ifdef CY_DEBUG_OPEN | ||
| 1873 | printk(KERN_DEBUG "cyc startup card %d, chip %d, channel %d, " | ||
| 1874 | "base_addr %p\n", | ||
| 1875 | card, chip, channel, base_addr); | ||
| 1876 | #endif | ||
| 1877 | spin_lock_irqsave(&card->card_lock, flags); | 1332 | spin_lock_irqsave(&card->card_lock, flags); |
| 1878 | 1333 | ||
| 1879 | cy_writeb(base_addr + (CyCAR << index), (u_char) channel); | 1334 | cyy_writeb(info, CyCAR, channel); |
| 1880 | 1335 | ||
| 1881 | cy_writeb(base_addr + (CyRTPR << index), | 1336 | cyy_writeb(info, CyRTPR, |
| 1882 | (info->default_timeout ? info->default_timeout : 0x02)); | 1337 | (info->default_timeout ? info->default_timeout : 0x02)); |
| 1883 | /* 10ms rx timeout */ | 1338 | /* 10ms rx timeout */ |
| 1884 | 1339 | ||
| 1885 | cyy_issue_cmd(base_addr, CyCHAN_CTL | CyENB_RCVR | CyENB_XMTR, | 1340 | cyy_issue_cmd(info, CyCHAN_CTL | CyENB_RCVR | CyENB_XMTR); |
| 1886 | index); | ||
| 1887 | |||
| 1888 | cy_writeb(base_addr + (CyCAR << index), (u_char) channel); | ||
| 1889 | cy_writeb(base_addr + (CyMSVR1 << index), CyRTS); | ||
| 1890 | cy_writeb(base_addr + (CyMSVR2 << index), CyDTR); | ||
| 1891 | |||
| 1892 | #ifdef CY_DEBUG_DTR | ||
| 1893 | printk(KERN_DEBUG "cyc:startup raising DTR\n"); | ||
| 1894 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 1895 | readb(base_addr + (CyMSVR1 << index)), | ||
| 1896 | readb(base_addr + (CyMSVR2 << index))); | ||
| 1897 | #endif | ||
| 1898 | |||
| 1899 | cy_writeb(base_addr + (CySRER << index), | ||
| 1900 | readb(base_addr + (CySRER << index)) | CyRxData); | ||
| 1901 | info->port.flags |= ASYNC_INITIALIZED; | ||
| 1902 | |||
| 1903 | if (info->port.tty) | ||
| 1904 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | ||
| 1905 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | ||
| 1906 | info->breakon = info->breakoff = 0; | ||
| 1907 | memset((char *)&info->idle_stats, 0, sizeof(info->idle_stats)); | ||
| 1908 | info->idle_stats.in_use = | ||
| 1909 | info->idle_stats.recv_idle = | ||
| 1910 | info->idle_stats.xmit_idle = jiffies; | ||
| 1911 | 1341 | ||
| 1912 | spin_unlock_irqrestore(&card->card_lock, flags); | 1342 | cyy_change_rts_dtr(info, TIOCM_RTS | TIOCM_DTR, 0); |
| 1913 | 1343 | ||
| 1344 | cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyRxData); | ||
| 1914 | } else { | 1345 | } else { |
| 1915 | struct FIRM_ID __iomem *firm_id; | 1346 | struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl; |
| 1916 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 1917 | struct BOARD_CTRL __iomem *board_ctrl; | ||
| 1918 | struct CH_CTRL __iomem *ch_ctrl; | ||
| 1919 | 1347 | ||
| 1920 | base_addr = card->base_addr; | ||
| 1921 | |||
| 1922 | firm_id = base_addr + ID_ADDRESS; | ||
| 1923 | if (!cyz_is_loaded(card)) | 1348 | if (!cyz_is_loaded(card)) |
| 1924 | return -ENODEV; | 1349 | return -ENODEV; |
| 1925 | 1350 | ||
| 1926 | zfw_ctrl = card->base_addr + | ||
| 1927 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 1928 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 1929 | ch_ctrl = zfw_ctrl->ch_ctrl; | ||
| 1930 | |||
| 1931 | #ifdef CY_DEBUG_OPEN | 1351 | #ifdef CY_DEBUG_OPEN |
| 1932 | printk(KERN_DEBUG "cyc startup Z card %d, channel %d, " | 1352 | printk(KERN_DEBUG "cyc startup Z card %d, channel %d, " |
| 1933 | "base_addr %p\n", card, channel, base_addr); | 1353 | "base_addr %p\n", card, channel, card->base_addr); |
| 1934 | #endif | 1354 | #endif |
| 1935 | spin_lock_irqsave(&card->card_lock, flags); | 1355 | spin_lock_irqsave(&card->card_lock, flags); |
| 1936 | 1356 | ||
| 1937 | cy_writel(&ch_ctrl[channel].op_mode, C_CH_ENABLE); | 1357 | cy_writel(&ch_ctrl->op_mode, C_CH_ENABLE); |
| 1938 | #ifdef Z_WAKE | 1358 | #ifdef Z_WAKE |
| 1939 | #ifdef CONFIG_CYZ_INTR | 1359 | #ifdef CONFIG_CYZ_INTR |
| 1940 | cy_writel(&ch_ctrl[channel].intr_enable, | 1360 | cy_writel(&ch_ctrl->intr_enable, |
| 1941 | C_IN_TXBEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM | | 1361 | C_IN_TXBEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM | |
| 1942 | C_IN_RXNNDT | C_IN_IOCTLW | C_IN_MDCD); | 1362 | C_IN_RXNNDT | C_IN_IOCTLW | C_IN_MDCD); |
| 1943 | #else | 1363 | #else |
| 1944 | cy_writel(&ch_ctrl[channel].intr_enable, | 1364 | cy_writel(&ch_ctrl->intr_enable, |
| 1945 | C_IN_IOCTLW | C_IN_MDCD); | 1365 | C_IN_IOCTLW | C_IN_MDCD); |
| 1946 | #endif /* CONFIG_CYZ_INTR */ | 1366 | #endif /* CONFIG_CYZ_INTR */ |
| 1947 | #else | 1367 | #else |
| 1948 | #ifdef CONFIG_CYZ_INTR | 1368 | #ifdef CONFIG_CYZ_INTR |
| 1949 | cy_writel(&ch_ctrl[channel].intr_enable, | 1369 | cy_writel(&ch_ctrl->intr_enable, |
| 1950 | C_IN_TXBEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM | | 1370 | C_IN_TXBEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM | |
| 1951 | C_IN_RXNNDT | C_IN_MDCD); | 1371 | C_IN_RXNNDT | C_IN_MDCD); |
| 1952 | #else | 1372 | #else |
| 1953 | cy_writel(&ch_ctrl[channel].intr_enable, C_IN_MDCD); | 1373 | cy_writel(&ch_ctrl->intr_enable, C_IN_MDCD); |
| 1954 | #endif /* CONFIG_CYZ_INTR */ | 1374 | #endif /* CONFIG_CYZ_INTR */ |
| 1955 | #endif /* Z_WAKE */ | 1375 | #endif /* Z_WAKE */ |
| 1956 | 1376 | ||
| @@ -1969,32 +1389,22 @@ static int startup(struct cyclades_port *info) | |||
| 1969 | 1389 | ||
| 1970 | /* set timeout !!! */ | 1390 | /* set timeout !!! */ |
| 1971 | /* set RTS and DTR !!! */ | 1391 | /* set RTS and DTR !!! */ |
| 1972 | cy_writel(&ch_ctrl[channel].rs_control, | 1392 | tty_port_raise_dtr_rts(&info->port); |
| 1973 | readl(&ch_ctrl[channel].rs_control) | C_RS_RTS | | ||
| 1974 | C_RS_DTR); | ||
| 1975 | retval = cyz_issue_cmd(card, channel, C_CM_IOCTLM, 0L); | ||
| 1976 | if (retval != 0) { | ||
| 1977 | printk(KERN_ERR "cyc:startup(3) retval on ttyC%d was " | ||
| 1978 | "%x\n", info->line, retval); | ||
| 1979 | } | ||
| 1980 | #ifdef CY_DEBUG_DTR | ||
| 1981 | printk(KERN_DEBUG "cyc:startup raising Z DTR\n"); | ||
| 1982 | #endif | ||
| 1983 | 1393 | ||
| 1984 | /* enable send, recv, modem !!! */ | 1394 | /* enable send, recv, modem !!! */ |
| 1395 | } | ||
| 1985 | 1396 | ||
| 1986 | info->port.flags |= ASYNC_INITIALIZED; | 1397 | info->port.flags |= ASYNC_INITIALIZED; |
| 1987 | if (info->port.tty) | ||
| 1988 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | ||
| 1989 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | ||
| 1990 | info->breakon = info->breakoff = 0; | ||
| 1991 | memset((char *)&info->idle_stats, 0, sizeof(info->idle_stats)); | ||
| 1992 | info->idle_stats.in_use = | ||
| 1993 | info->idle_stats.recv_idle = | ||
| 1994 | info->idle_stats.xmit_idle = jiffies; | ||
| 1995 | 1398 | ||
| 1996 | spin_unlock_irqrestore(&card->card_lock, flags); | 1399 | clear_bit(TTY_IO_ERROR, &tty->flags); |
| 1997 | } | 1400 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
| 1401 | info->breakon = info->breakoff = 0; | ||
| 1402 | memset((char *)&info->idle_stats, 0, sizeof(info->idle_stats)); | ||
| 1403 | info->idle_stats.in_use = | ||
| 1404 | info->idle_stats.recv_idle = | ||
| 1405 | info->idle_stats.xmit_idle = jiffies; | ||
| 1406 | |||
| 1407 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 1998 | 1408 | ||
| 1999 | #ifdef CY_DEBUG_OPEN | 1409 | #ifdef CY_DEBUG_OPEN |
| 2000 | printk(KERN_DEBUG "cyc startup done\n"); | 1410 | printk(KERN_DEBUG "cyc startup done\n"); |
| @@ -2003,28 +1413,20 @@ static int startup(struct cyclades_port *info) | |||
| 2003 | 1413 | ||
| 2004 | errout: | 1414 | errout: |
| 2005 | spin_unlock_irqrestore(&card->card_lock, flags); | 1415 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 1416 | free_page(page); | ||
| 2006 | return retval; | 1417 | return retval; |
| 2007 | } /* startup */ | 1418 | } /* startup */ |
| 2008 | 1419 | ||
| 2009 | static void start_xmit(struct cyclades_port *info) | 1420 | static void start_xmit(struct cyclades_port *info) |
| 2010 | { | 1421 | { |
| 2011 | struct cyclades_card *card; | 1422 | struct cyclades_card *card = info->card; |
| 2012 | unsigned long flags; | 1423 | unsigned long flags; |
| 2013 | void __iomem *base_addr; | 1424 | int channel = info->line - card->first_line; |
| 2014 | int chip, channel, index; | ||
| 2015 | 1425 | ||
| 2016 | card = info->card; | ||
| 2017 | channel = info->line - card->first_line; | ||
| 2018 | if (!cy_is_Z(card)) { | 1426 | if (!cy_is_Z(card)) { |
| 2019 | chip = channel >> 2; | ||
| 2020 | channel &= 0x03; | ||
| 2021 | index = card->bus_index; | ||
| 2022 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 2023 | |||
| 2024 | spin_lock_irqsave(&card->card_lock, flags); | 1427 | spin_lock_irqsave(&card->card_lock, flags); |
| 2025 | cy_writeb(base_addr + (CyCAR << index), channel); | 1428 | cyy_writeb(info, CyCAR, channel & 0x03); |
| 2026 | cy_writeb(base_addr + (CySRER << index), | 1429 | cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyTxRdy); |
| 2027 | readb(base_addr + (CySRER << index)) | CyTxRdy); | ||
| 2028 | spin_unlock_irqrestore(&card->card_lock, flags); | 1430 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 2029 | } else { | 1431 | } else { |
| 2030 | #ifdef CONFIG_CYZ_INTR | 1432 | #ifdef CONFIG_CYZ_INTR |
| @@ -2047,12 +1449,11 @@ static void start_xmit(struct cyclades_port *info) | |||
| 2047 | * This routine shuts down a serial port; interrupts are disabled, | 1449 | * This routine shuts down a serial port; interrupts are disabled, |
| 2048 | * and DTR is dropped if the hangup on close termio flag is on. | 1450 | * and DTR is dropped if the hangup on close termio flag is on. |
| 2049 | */ | 1451 | */ |
| 2050 | static void shutdown(struct cyclades_port *info) | 1452 | static void cy_shutdown(struct cyclades_port *info, struct tty_struct *tty) |
| 2051 | { | 1453 | { |
| 2052 | struct cyclades_card *card; | 1454 | struct cyclades_card *card; |
| 2053 | unsigned long flags; | 1455 | unsigned long flags; |
| 2054 | void __iomem *base_addr; | 1456 | int channel; |
| 2055 | int chip, channel, index; | ||
| 2056 | 1457 | ||
| 2057 | if (!(info->port.flags & ASYNC_INITIALIZED)) | 1458 | if (!(info->port.flags & ASYNC_INITIALIZED)) |
| 2058 | return; | 1459 | return; |
| @@ -2060,21 +1461,10 @@ static void shutdown(struct cyclades_port *info) | |||
| 2060 | card = info->card; | 1461 | card = info->card; |
| 2061 | channel = info->line - card->first_line; | 1462 | channel = info->line - card->first_line; |
| 2062 | if (!cy_is_Z(card)) { | 1463 | if (!cy_is_Z(card)) { |
| 2063 | chip = channel >> 2; | ||
| 2064 | channel &= 0x03; | ||
| 2065 | index = card->bus_index; | ||
| 2066 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 2067 | |||
| 2068 | #ifdef CY_DEBUG_OPEN | ||
| 2069 | printk(KERN_DEBUG "cyc shutdown Y card %d, chip %d, " | ||
| 2070 | "channel %d, base_addr %p\n", | ||
| 2071 | card, chip, channel, base_addr); | ||
| 2072 | #endif | ||
| 2073 | |||
| 2074 | spin_lock_irqsave(&card->card_lock, flags); | 1464 | spin_lock_irqsave(&card->card_lock, flags); |
| 2075 | 1465 | ||
| 2076 | /* Clear delta_msr_wait queue to avoid mem leaks. */ | 1466 | /* Clear delta_msr_wait queue to avoid mem leaks. */ |
| 2077 | wake_up_interruptible(&info->delta_msr_wait); | 1467 | wake_up_interruptible(&info->port.delta_msr_wait); |
| 2078 | 1468 | ||
| 2079 | if (info->port.xmit_buf) { | 1469 | if (info->port.xmit_buf) { |
| 2080 | unsigned char *temp; | 1470 | unsigned char *temp; |
| @@ -2082,47 +1472,25 @@ static void shutdown(struct cyclades_port *info) | |||
| 2082 | info->port.xmit_buf = NULL; | 1472 | info->port.xmit_buf = NULL; |
| 2083 | free_page((unsigned long)temp); | 1473 | free_page((unsigned long)temp); |
| 2084 | } | 1474 | } |
| 2085 | cy_writeb(base_addr + (CyCAR << index), (u_char) channel); | 1475 | if (tty->termios->c_cflag & HUPCL) |
| 2086 | if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) { | 1476 | cyy_change_rts_dtr(info, 0, TIOCM_RTS | TIOCM_DTR); |
| 2087 | cy_writeb(base_addr + (CyMSVR1 << index), ~CyRTS); | 1477 | |
| 2088 | cy_writeb(base_addr + (CyMSVR2 << index), ~CyDTR); | 1478 | cyy_issue_cmd(info, CyCHAN_CTL | CyDIS_RCVR); |
| 2089 | #ifdef CY_DEBUG_DTR | ||
| 2090 | printk(KERN_DEBUG "cyc shutdown dropping DTR\n"); | ||
| 2091 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 2092 | readb(base_addr + (CyMSVR1 << index)), | ||
| 2093 | readb(base_addr + (CyMSVR2 << index))); | ||
| 2094 | #endif | ||
| 2095 | } | ||
| 2096 | cyy_issue_cmd(base_addr, CyCHAN_CTL | CyDIS_RCVR, index); | ||
| 2097 | /* it may be appropriate to clear _XMIT at | 1479 | /* it may be appropriate to clear _XMIT at |
| 2098 | some later date (after testing)!!! */ | 1480 | some later date (after testing)!!! */ |
| 2099 | 1481 | ||
| 2100 | if (info->port.tty) | 1482 | set_bit(TTY_IO_ERROR, &tty->flags); |
| 2101 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | ||
| 2102 | info->port.flags &= ~ASYNC_INITIALIZED; | 1483 | info->port.flags &= ~ASYNC_INITIALIZED; |
| 2103 | spin_unlock_irqrestore(&card->card_lock, flags); | 1484 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 2104 | } else { | 1485 | } else { |
| 2105 | struct FIRM_ID __iomem *firm_id; | ||
| 2106 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 2107 | struct BOARD_CTRL __iomem *board_ctrl; | ||
| 2108 | struct CH_CTRL __iomem *ch_ctrl; | ||
| 2109 | int retval; | ||
| 2110 | |||
| 2111 | base_addr = card->base_addr; | ||
| 2112 | #ifdef CY_DEBUG_OPEN | 1486 | #ifdef CY_DEBUG_OPEN |
| 2113 | printk(KERN_DEBUG "cyc shutdown Z card %d, channel %d, " | 1487 | printk(KERN_DEBUG "cyc shutdown Z card %d, channel %d, " |
| 2114 | "base_addr %p\n", card, channel, base_addr); | 1488 | "base_addr %p\n", card, channel, card->base_addr); |
| 2115 | #endif | 1489 | #endif |
| 2116 | 1490 | ||
| 2117 | firm_id = base_addr + ID_ADDRESS; | ||
| 2118 | if (!cyz_is_loaded(card)) | 1491 | if (!cyz_is_loaded(card)) |
| 2119 | return; | 1492 | return; |
| 2120 | 1493 | ||
| 2121 | zfw_ctrl = card->base_addr + | ||
| 2122 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 2123 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 2124 | ch_ctrl = zfw_ctrl->ch_ctrl; | ||
| 2125 | |||
| 2126 | spin_lock_irqsave(&card->card_lock, flags); | 1494 | spin_lock_irqsave(&card->card_lock, flags); |
| 2127 | 1495 | ||
| 2128 | if (info->port.xmit_buf) { | 1496 | if (info->port.xmit_buf) { |
| @@ -2132,23 +1500,10 @@ static void shutdown(struct cyclades_port *info) | |||
| 2132 | free_page((unsigned long)temp); | 1500 | free_page((unsigned long)temp); |
| 2133 | } | 1501 | } |
| 2134 | 1502 | ||
| 2135 | if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL)) { | 1503 | if (tty->termios->c_cflag & HUPCL) |
| 2136 | cy_writel(&ch_ctrl[channel].rs_control, | 1504 | tty_port_lower_dtr_rts(&info->port); |
| 2137 | (__u32)(readl(&ch_ctrl[channel].rs_control) & | ||
| 2138 | ~(C_RS_RTS | C_RS_DTR))); | ||
| 2139 | retval = cyz_issue_cmd(info->card, channel, | ||
| 2140 | C_CM_IOCTLM, 0L); | ||
| 2141 | if (retval != 0) { | ||
| 2142 | printk(KERN_ERR"cyc:shutdown retval on ttyC%d " | ||
| 2143 | "was %x\n", info->line, retval); | ||
| 2144 | } | ||
| 2145 | #ifdef CY_DEBUG_DTR | ||
| 2146 | printk(KERN_DEBUG "cyc:shutdown dropping Z DTR\n"); | ||
| 2147 | #endif | ||
| 2148 | } | ||
| 2149 | 1505 | ||
| 2150 | if (info->port.tty) | 1506 | set_bit(TTY_IO_ERROR, &tty->flags); |
| 2151 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | ||
| 2152 | info->port.flags &= ~ASYNC_INITIALIZED; | 1507 | info->port.flags &= ~ASYNC_INITIALIZED; |
| 2153 | 1508 | ||
| 2154 | spin_unlock_irqrestore(&card->card_lock, flags); | 1509 | spin_unlock_irqrestore(&card->card_lock, flags); |
| @@ -2165,199 +1520,6 @@ static void shutdown(struct cyclades_port *info) | |||
| 2165 | * ------------------------------------------------------------ | 1520 | * ------------------------------------------------------------ |
| 2166 | */ | 1521 | */ |
| 2167 | 1522 | ||
| 2168 | static int | ||
| 2169 | block_til_ready(struct tty_struct *tty, struct file *filp, | ||
| 2170 | struct cyclades_port *info) | ||
| 2171 | { | ||
| 2172 | DECLARE_WAITQUEUE(wait, current); | ||
| 2173 | struct cyclades_card *cinfo; | ||
| 2174 | unsigned long flags; | ||
| 2175 | int chip, channel, index; | ||
| 2176 | int retval; | ||
| 2177 | void __iomem *base_addr; | ||
| 2178 | |||
| 2179 | cinfo = info->card; | ||
| 2180 | channel = info->line - cinfo->first_line; | ||
| 2181 | |||
| 2182 | /* | ||
| 2183 | * If the device is in the middle of being closed, then block | ||
| 2184 | * until it's done, and then try again. | ||
| 2185 | */ | ||
| 2186 | if (tty_hung_up_p(filp) || (info->port.flags & ASYNC_CLOSING)) { | ||
| 2187 | wait_event_interruptible(info->port.close_wait, | ||
| 2188 | !(info->port.flags & ASYNC_CLOSING)); | ||
| 2189 | return (info->port.flags & ASYNC_HUP_NOTIFY) ? -EAGAIN: -ERESTARTSYS; | ||
| 2190 | } | ||
| 2191 | |||
| 2192 | /* | ||
| 2193 | * If non-blocking mode is set, then make the check up front | ||
| 2194 | * and then exit. | ||
| 2195 | */ | ||
| 2196 | if ((filp->f_flags & O_NONBLOCK) || | ||
| 2197 | (tty->flags & (1 << TTY_IO_ERROR))) { | ||
| 2198 | info->port.flags |= ASYNC_NORMAL_ACTIVE; | ||
| 2199 | return 0; | ||
| 2200 | } | ||
| 2201 | |||
| 2202 | /* | ||
| 2203 | * Block waiting for the carrier detect and the line to become | ||
| 2204 | * free (i.e., not in use by the callout). While we are in | ||
| 2205 | * this loop, info->port.count is dropped by one, so that | ||
| 2206 | * cy_close() knows when to free things. We restore it upon | ||
| 2207 | * exit, either normal or abnormal. | ||
| 2208 | */ | ||
| 2209 | retval = 0; | ||
| 2210 | add_wait_queue(&info->port.open_wait, &wait); | ||
| 2211 | #ifdef CY_DEBUG_OPEN | ||
| 2212 | printk(KERN_DEBUG "cyc block_til_ready before block: ttyC%d, " | ||
| 2213 | "count = %d\n", info->line, info->port.count); | ||
| 2214 | #endif | ||
| 2215 | spin_lock_irqsave(&cinfo->card_lock, flags); | ||
| 2216 | if (!tty_hung_up_p(filp)) | ||
| 2217 | info->port.count--; | ||
| 2218 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | ||
| 2219 | #ifdef CY_DEBUG_COUNT | ||
| 2220 | printk(KERN_DEBUG "cyc block_til_ready: (%d): decrementing count to " | ||
| 2221 | "%d\n", current->pid, info->port.count); | ||
| 2222 | #endif | ||
| 2223 | info->port.blocked_open++; | ||
| 2224 | |||
| 2225 | if (!cy_is_Z(cinfo)) { | ||
| 2226 | chip = channel >> 2; | ||
| 2227 | channel &= 0x03; | ||
| 2228 | index = cinfo->bus_index; | ||
| 2229 | base_addr = cinfo->base_addr + (cy_chip_offset[chip] << index); | ||
| 2230 | |||
| 2231 | while (1) { | ||
| 2232 | spin_lock_irqsave(&cinfo->card_lock, flags); | ||
| 2233 | if ((tty->termios->c_cflag & CBAUD)) { | ||
| 2234 | cy_writeb(base_addr + (CyCAR << index), | ||
| 2235 | (u_char) channel); | ||
| 2236 | cy_writeb(base_addr + (CyMSVR1 << index), | ||
| 2237 | CyRTS); | ||
| 2238 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 2239 | CyDTR); | ||
| 2240 | #ifdef CY_DEBUG_DTR | ||
| 2241 | printk(KERN_DEBUG "cyc:block_til_ready raising " | ||
| 2242 | "DTR\n"); | ||
| 2243 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 2244 | readb(base_addr + (CyMSVR1 << index)), | ||
| 2245 | readb(base_addr + (CyMSVR2 << index))); | ||
| 2246 | #endif | ||
| 2247 | } | ||
| 2248 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | ||
| 2249 | |||
| 2250 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 2251 | if (tty_hung_up_p(filp) || | ||
| 2252 | !(info->port.flags & ASYNC_INITIALIZED)) { | ||
| 2253 | retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ? | ||
| 2254 | -EAGAIN : -ERESTARTSYS); | ||
| 2255 | break; | ||
| 2256 | } | ||
| 2257 | |||
| 2258 | spin_lock_irqsave(&cinfo->card_lock, flags); | ||
| 2259 | cy_writeb(base_addr + (CyCAR << index), | ||
| 2260 | (u_char) channel); | ||
| 2261 | if (!(info->port.flags & ASYNC_CLOSING) && (C_CLOCAL(tty) || | ||
| 2262 | (readb(base_addr + | ||
| 2263 | (CyMSVR1 << index)) & CyDCD))) { | ||
| 2264 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | ||
| 2265 | break; | ||
| 2266 | } | ||
| 2267 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | ||
| 2268 | |||
| 2269 | if (signal_pending(current)) { | ||
| 2270 | retval = -ERESTARTSYS; | ||
| 2271 | break; | ||
| 2272 | } | ||
| 2273 | #ifdef CY_DEBUG_OPEN | ||
| 2274 | printk(KERN_DEBUG "cyc block_til_ready blocking: " | ||
| 2275 | "ttyC%d, count = %d\n", | ||
| 2276 | info->line, info->port.count); | ||
| 2277 | #endif | ||
| 2278 | schedule(); | ||
| 2279 | } | ||
| 2280 | } else { | ||
| 2281 | struct FIRM_ID __iomem *firm_id; | ||
| 2282 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 2283 | struct BOARD_CTRL __iomem *board_ctrl; | ||
| 2284 | struct CH_CTRL __iomem *ch_ctrl; | ||
| 2285 | |||
| 2286 | base_addr = cinfo->base_addr; | ||
| 2287 | firm_id = base_addr + ID_ADDRESS; | ||
| 2288 | if (!cyz_is_loaded(cinfo)) { | ||
| 2289 | __set_current_state(TASK_RUNNING); | ||
| 2290 | remove_wait_queue(&info->port.open_wait, &wait); | ||
| 2291 | return -EINVAL; | ||
| 2292 | } | ||
| 2293 | |||
| 2294 | zfw_ctrl = base_addr + (readl(&firm_id->zfwctrl_addr) | ||
| 2295 | & 0xfffff); | ||
| 2296 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 2297 | ch_ctrl = zfw_ctrl->ch_ctrl; | ||
| 2298 | |||
| 2299 | while (1) { | ||
| 2300 | if ((tty->termios->c_cflag & CBAUD)) { | ||
| 2301 | cy_writel(&ch_ctrl[channel].rs_control, | ||
| 2302 | readl(&ch_ctrl[channel].rs_control) | | ||
| 2303 | C_RS_RTS | C_RS_DTR); | ||
| 2304 | retval = cyz_issue_cmd(cinfo, | ||
| 2305 | channel, C_CM_IOCTLM, 0L); | ||
| 2306 | if (retval != 0) { | ||
| 2307 | printk(KERN_ERR "cyc:block_til_ready " | ||
| 2308 | "retval on ttyC%d was %x\n", | ||
| 2309 | info->line, retval); | ||
| 2310 | } | ||
| 2311 | #ifdef CY_DEBUG_DTR | ||
| 2312 | printk(KERN_DEBUG "cyc:block_til_ready raising " | ||
| 2313 | "Z DTR\n"); | ||
| 2314 | #endif | ||
| 2315 | } | ||
| 2316 | |||
| 2317 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 2318 | if (tty_hung_up_p(filp) || | ||
| 2319 | !(info->port.flags & ASYNC_INITIALIZED)) { | ||
| 2320 | retval = ((info->port.flags & ASYNC_HUP_NOTIFY) ? | ||
| 2321 | -EAGAIN : -ERESTARTSYS); | ||
| 2322 | break; | ||
| 2323 | } | ||
| 2324 | if (!(info->port.flags & ASYNC_CLOSING) && (C_CLOCAL(tty) || | ||
| 2325 | (readl(&ch_ctrl[channel].rs_status) & | ||
| 2326 | C_RS_DCD))) { | ||
| 2327 | break; | ||
| 2328 | } | ||
| 2329 | if (signal_pending(current)) { | ||
| 2330 | retval = -ERESTARTSYS; | ||
| 2331 | break; | ||
| 2332 | } | ||
| 2333 | #ifdef CY_DEBUG_OPEN | ||
| 2334 | printk(KERN_DEBUG "cyc block_til_ready blocking: " | ||
| 2335 | "ttyC%d, count = %d\n", | ||
| 2336 | info->line, info->port.count); | ||
| 2337 | #endif | ||
| 2338 | schedule(); | ||
| 2339 | } | ||
| 2340 | } | ||
| 2341 | __set_current_state(TASK_RUNNING); | ||
| 2342 | remove_wait_queue(&info->port.open_wait, &wait); | ||
| 2343 | if (!tty_hung_up_p(filp)) { | ||
| 2344 | info->port.count++; | ||
| 2345 | #ifdef CY_DEBUG_COUNT | ||
| 2346 | printk(KERN_DEBUG "cyc:block_til_ready (%d): incrementing " | ||
| 2347 | "count to %d\n", current->pid, info->port.count); | ||
| 2348 | #endif | ||
| 2349 | } | ||
| 2350 | info->port.blocked_open--; | ||
| 2351 | #ifdef CY_DEBUG_OPEN | ||
| 2352 | printk(KERN_DEBUG "cyc:block_til_ready after blocking: ttyC%d, " | ||
| 2353 | "count = %d\n", info->line, info->port.count); | ||
| 2354 | #endif | ||
| 2355 | if (retval) | ||
| 2356 | return retval; | ||
| 2357 | info->port.flags |= ASYNC_NORMAL_ACTIVE; | ||
| 2358 | return 0; | ||
| 2359 | } /* block_til_ready */ | ||
| 2360 | |||
| 2361 | /* | 1523 | /* |
| 2362 | * This routine is called whenever a serial port is opened. It | 1524 | * This routine is called whenever a serial port is opened. It |
| 2363 | * performs the serial-specific initialization for the tty structure. | 1525 | * performs the serial-specific initialization for the tty structure. |
| @@ -2436,7 +1598,6 @@ static int cy_open(struct tty_struct *tty, struct file *filp) | |||
| 2436 | printk(KERN_DEBUG "cyc:cy_open ttyC%d\n", info->line); | 1598 | printk(KERN_DEBUG "cyc:cy_open ttyC%d\n", info->line); |
| 2437 | #endif | 1599 | #endif |
| 2438 | tty->driver_data = info; | 1600 | tty->driver_data = info; |
| 2439 | info->port.tty = tty; | ||
| 2440 | if (serial_paranoia_check(info, tty->name, "cy_open")) | 1601 | if (serial_paranoia_check(info, tty->name, "cy_open")) |
| 2441 | return -ENODEV; | 1602 | return -ENODEV; |
| 2442 | 1603 | ||
| @@ -2462,11 +1623,11 @@ static int cy_open(struct tty_struct *tty, struct file *filp) | |||
| 2462 | /* | 1623 | /* |
| 2463 | * Start up serial port | 1624 | * Start up serial port |
| 2464 | */ | 1625 | */ |
| 2465 | retval = startup(info); | 1626 | retval = cy_startup(info, tty); |
| 2466 | if (retval) | 1627 | if (retval) |
| 2467 | return retval; | 1628 | return retval; |
| 2468 | 1629 | ||
| 2469 | retval = block_til_ready(tty, filp, info); | 1630 | retval = tty_port_block_til_ready(&info->port, tty, filp); |
| 2470 | if (retval) { | 1631 | if (retval) { |
| 2471 | #ifdef CY_DEBUG_OPEN | 1632 | #ifdef CY_DEBUG_OPEN |
| 2472 | printk(KERN_DEBUG "cyc:cy_open returning after block_til_ready " | 1633 | printk(KERN_DEBUG "cyc:cy_open returning after block_til_ready " |
| @@ -2476,6 +1637,7 @@ static int cy_open(struct tty_struct *tty, struct file *filp) | |||
| 2476 | } | 1637 | } |
| 2477 | 1638 | ||
| 2478 | info->throttle = 0; | 1639 | info->throttle = 0; |
| 1640 | tty_port_tty_set(&info->port, tty); | ||
| 2479 | 1641 | ||
| 2480 | #ifdef CY_DEBUG_OPEN | 1642 | #ifdef CY_DEBUG_OPEN |
| 2481 | printk(KERN_DEBUG "cyc:cy_open done\n"); | 1643 | printk(KERN_DEBUG "cyc:cy_open done\n"); |
| @@ -2490,8 +1652,6 @@ static void cy_wait_until_sent(struct tty_struct *tty, int timeout) | |||
| 2490 | { | 1652 | { |
| 2491 | struct cyclades_card *card; | 1653 | struct cyclades_card *card; |
| 2492 | struct cyclades_port *info = tty->driver_data; | 1654 | struct cyclades_port *info = tty->driver_data; |
| 2493 | void __iomem *base_addr; | ||
| 2494 | int chip, channel, index; | ||
| 2495 | unsigned long orig_jiffies; | 1655 | unsigned long orig_jiffies; |
| 2496 | int char_time; | 1656 | int char_time; |
| 2497 | 1657 | ||
| @@ -2535,13 +1695,8 @@ static void cy_wait_until_sent(struct tty_struct *tty, int timeout) | |||
| 2535 | timeout, char_time, jiffies); | 1695 | timeout, char_time, jiffies); |
| 2536 | #endif | 1696 | #endif |
| 2537 | card = info->card; | 1697 | card = info->card; |
| 2538 | channel = (info->line) - (card->first_line); | ||
| 2539 | if (!cy_is_Z(card)) { | 1698 | if (!cy_is_Z(card)) { |
| 2540 | chip = channel >> 2; | 1699 | while (cyy_readb(info, CySRER) & CyTxRdy) { |
| 2541 | channel &= 0x03; | ||
| 2542 | index = card->bus_index; | ||
| 2543 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 2544 | while (readb(base_addr + (CySRER << index)) & CyTxRdy) { | ||
| 2545 | #ifdef CY_DEBUG_WAIT_UNTIL_SENT | 1700 | #ifdef CY_DEBUG_WAIT_UNTIL_SENT |
| 2546 | printk(KERN_DEBUG "Not clean (jiff=%lu)...", jiffies); | 1701 | printk(KERN_DEBUG "Not clean (jiff=%lu)...", jiffies); |
| 2547 | #endif | 1702 | #endif |
| @@ -2595,103 +1750,37 @@ static void cy_flush_buffer(struct tty_struct *tty) | |||
| 2595 | } /* cy_flush_buffer */ | 1750 | } /* cy_flush_buffer */ |
| 2596 | 1751 | ||
| 2597 | 1752 | ||
| 2598 | /* | 1753 | static void cy_do_close(struct tty_port *port) |
| 2599 | * This routine is called when a particular tty device is closed. | ||
| 2600 | */ | ||
| 2601 | static void cy_close(struct tty_struct *tty, struct file *filp) | ||
| 2602 | { | 1754 | { |
| 2603 | struct cyclades_port *info = tty->driver_data; | 1755 | struct cyclades_port *info = container_of(port, struct cyclades_port, |
| 1756 | port); | ||
| 2604 | struct cyclades_card *card; | 1757 | struct cyclades_card *card; |
| 2605 | unsigned long flags; | 1758 | unsigned long flags; |
| 2606 | 1759 | int channel; | |
| 2607 | #ifdef CY_DEBUG_OTHER | ||
| 2608 | printk(KERN_DEBUG "cyc:cy_close ttyC%d\n", info->line); | ||
| 2609 | #endif | ||
| 2610 | |||
| 2611 | if (!info || serial_paranoia_check(info, tty->name, "cy_close")) | ||
| 2612 | return; | ||
| 2613 | 1760 | ||
| 2614 | card = info->card; | 1761 | card = info->card; |
| 2615 | 1762 | channel = info->line - card->first_line; | |
| 2616 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 2617 | /* If the TTY is being hung up, nothing to do */ | ||
| 2618 | if (tty_hung_up_p(filp)) { | ||
| 2619 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 2620 | return; | ||
| 2621 | } | ||
| 2622 | #ifdef CY_DEBUG_OPEN | ||
| 2623 | printk(KERN_DEBUG "cyc:cy_close ttyC%d, count = %d\n", info->line, | ||
| 2624 | info->port.count); | ||
| 2625 | #endif | ||
| 2626 | if ((tty->count == 1) && (info->port.count != 1)) { | ||
| 2627 | /* | ||
| 2628 | * Uh, oh. tty->count is 1, which means that the tty | ||
| 2629 | * structure will be freed. Info->count should always | ||
| 2630 | * be one in these conditions. If it's greater than | ||
| 2631 | * one, we've got real problems, since it means the | ||
| 2632 | * serial port won't be shutdown. | ||
| 2633 | */ | ||
| 2634 | printk(KERN_ERR "cyc:cy_close: bad serial port count; " | ||
| 2635 | "tty->count is 1, info->port.count is %d\n", info->port.count); | ||
| 2636 | info->port.count = 1; | ||
| 2637 | } | ||
| 2638 | #ifdef CY_DEBUG_COUNT | ||
| 2639 | printk(KERN_DEBUG "cyc:cy_close at (%d): decrementing count to %d\n", | ||
| 2640 | current->pid, info->port.count - 1); | ||
| 2641 | #endif | ||
| 2642 | if (--info->port.count < 0) { | ||
| 2643 | #ifdef CY_DEBUG_COUNT | ||
| 2644 | printk(KERN_DEBUG "cyc:cyc_close setting count to 0\n"); | ||
| 2645 | #endif | ||
| 2646 | info->port.count = 0; | ||
| 2647 | } | ||
| 2648 | if (info->port.count) { | ||
| 2649 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 2650 | return; | ||
| 2651 | } | ||
| 2652 | info->port.flags |= ASYNC_CLOSING; | ||
| 2653 | |||
| 2654 | /* | ||
| 2655 | * Now we wait for the transmit buffer to clear; and we notify | ||
| 2656 | * the line discipline to only process XON/XOFF characters. | ||
| 2657 | */ | ||
| 2658 | tty->closing = 1; | ||
| 2659 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 2660 | if (info->port.closing_wait != CY_CLOSING_WAIT_NONE) | ||
| 2661 | tty_wait_until_sent(tty, info->port.closing_wait); | ||
| 2662 | |||
| 2663 | spin_lock_irqsave(&card->card_lock, flags); | 1763 | spin_lock_irqsave(&card->card_lock, flags); |
| 2664 | 1764 | ||
| 2665 | if (!cy_is_Z(card)) { | 1765 | if (!cy_is_Z(card)) { |
| 2666 | int channel = info->line - card->first_line; | ||
| 2667 | int index = card->bus_index; | ||
| 2668 | void __iomem *base_addr = card->base_addr + | ||
| 2669 | (cy_chip_offset[channel >> 2] << index); | ||
| 2670 | /* Stop accepting input */ | 1766 | /* Stop accepting input */ |
| 2671 | channel &= 0x03; | 1767 | cyy_writeb(info, CyCAR, channel & 0x03); |
| 2672 | cy_writeb(base_addr + (CyCAR << index), (u_char) channel); | 1768 | cyy_writeb(info, CySRER, cyy_readb(info, CySRER) & ~CyRxData); |
| 2673 | cy_writeb(base_addr + (CySRER << index), | ||
| 2674 | readb(base_addr + (CySRER << index)) & ~CyRxData); | ||
| 2675 | if (info->port.flags & ASYNC_INITIALIZED) { | 1769 | if (info->port.flags & ASYNC_INITIALIZED) { |
| 2676 | /* Waiting for on-board buffers to be empty before | 1770 | /* Waiting for on-board buffers to be empty before |
| 2677 | closing the port */ | 1771 | closing the port */ |
| 2678 | spin_unlock_irqrestore(&card->card_lock, flags); | 1772 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 2679 | cy_wait_until_sent(tty, info->timeout); | 1773 | cy_wait_until_sent(port->tty, info->timeout); |
| 2680 | spin_lock_irqsave(&card->card_lock, flags); | 1774 | spin_lock_irqsave(&card->card_lock, flags); |
| 2681 | } | 1775 | } |
| 2682 | } else { | 1776 | } else { |
| 2683 | #ifdef Z_WAKE | 1777 | #ifdef Z_WAKE |
| 2684 | /* Waiting for on-board buffers to be empty before closing | 1778 | /* Waiting for on-board buffers to be empty before closing |
| 2685 | the port */ | 1779 | the port */ |
| 2686 | void __iomem *base_addr = card->base_addr; | 1780 | struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl; |
| 2687 | struct FIRM_ID __iomem *firm_id = base_addr + ID_ADDRESS; | ||
| 2688 | struct ZFW_CTRL __iomem *zfw_ctrl = | ||
| 2689 | base_addr + (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 2690 | struct CH_CTRL __iomem *ch_ctrl = zfw_ctrl->ch_ctrl; | ||
| 2691 | int channel = info->line - card->first_line; | ||
| 2692 | int retval; | 1781 | int retval; |
| 2693 | 1782 | ||
| 2694 | if (readl(&ch_ctrl[channel].flow_status) != C_FS_TXIDLE) { | 1783 | if (readl(&ch_ctrl->flow_status) != C_FS_TXIDLE) { |
| 2695 | retval = cyz_issue_cmd(card, channel, C_CM_IOCTLW, 0L); | 1784 | retval = cyz_issue_cmd(card, channel, C_CM_IOCTLW, 0L); |
| 2696 | if (retval != 0) { | 1785 | if (retval != 0) { |
| 2697 | printk(KERN_DEBUG "cyc:cy_close retval on " | 1786 | printk(KERN_DEBUG "cyc:cy_close retval on " |
| @@ -2703,32 +1792,19 @@ static void cy_close(struct tty_struct *tty, struct file *filp) | |||
| 2703 | } | 1792 | } |
| 2704 | #endif | 1793 | #endif |
| 2705 | } | 1794 | } |
| 2706 | |||
| 2707 | spin_unlock_irqrestore(&card->card_lock, flags); | 1795 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 2708 | shutdown(info); | 1796 | cy_shutdown(info, port->tty); |
| 2709 | cy_flush_buffer(tty); | 1797 | } |
| 2710 | tty_ldisc_flush(tty); | ||
| 2711 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 2712 | |||
| 2713 | tty->closing = 0; | ||
| 2714 | info->port.tty = NULL; | ||
| 2715 | if (info->port.blocked_open) { | ||
| 2716 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 2717 | if (info->port.close_delay) { | ||
| 2718 | msleep_interruptible(jiffies_to_msecs | ||
| 2719 | (info->port.close_delay)); | ||
| 2720 | } | ||
| 2721 | wake_up_interruptible(&info->port.open_wait); | ||
| 2722 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 2723 | } | ||
| 2724 | info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); | ||
| 2725 | wake_up_interruptible(&info->port.close_wait); | ||
| 2726 | |||
| 2727 | #ifdef CY_DEBUG_OTHER | ||
| 2728 | printk(KERN_DEBUG "cyc:cy_close done\n"); | ||
| 2729 | #endif | ||
| 2730 | 1798 | ||
| 2731 | spin_unlock_irqrestore(&card->card_lock, flags); | 1799 | /* |
| 1800 | * This routine is called when a particular tty device is closed. | ||
| 1801 | */ | ||
| 1802 | static void cy_close(struct tty_struct *tty, struct file *filp) | ||
| 1803 | { | ||
| 1804 | struct cyclades_port *info = tty->driver_data; | ||
| 1805 | if (!info || serial_paranoia_check(info, tty->name, "cy_close")) | ||
| 1806 | return; | ||
| 1807 | tty_port_close(&info->port, tty, filp); | ||
| 2732 | } /* cy_close */ | 1808 | } /* cy_close */ |
| 2733 | 1809 | ||
| 2734 | /* This routine gets called when tty_write has put something into | 1810 | /* This routine gets called when tty_write has put something into |
| @@ -2871,18 +1947,13 @@ static int cy_write_room(struct tty_struct *tty) | |||
| 2871 | 1947 | ||
| 2872 | static int cy_chars_in_buffer(struct tty_struct *tty) | 1948 | static int cy_chars_in_buffer(struct tty_struct *tty) |
| 2873 | { | 1949 | { |
| 2874 | struct cyclades_card *card; | ||
| 2875 | struct cyclades_port *info = tty->driver_data; | 1950 | struct cyclades_port *info = tty->driver_data; |
| 2876 | int channel; | ||
| 2877 | 1951 | ||
| 2878 | if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer")) | 1952 | if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer")) |
| 2879 | return 0; | 1953 | return 0; |
| 2880 | 1954 | ||
| 2881 | card = info->card; | ||
| 2882 | channel = (info->line) - (card->first_line); | ||
| 2883 | |||
| 2884 | #ifdef Z_EXT_CHARS_IN_BUFFER | 1955 | #ifdef Z_EXT_CHARS_IN_BUFFER |
| 2885 | if (!cy_is_Z(card)) { | 1956 | if (!cy_is_Z(info->card)) { |
| 2886 | #endif /* Z_EXT_CHARS_IN_BUFFER */ | 1957 | #endif /* Z_EXT_CHARS_IN_BUFFER */ |
| 2887 | #ifdef CY_DEBUG_IO | 1958 | #ifdef CY_DEBUG_IO |
| 2888 | printk(KERN_DEBUG "cyc:cy_chars_in_buffer ttyC%d %d\n", | 1959 | printk(KERN_DEBUG "cyc:cy_chars_in_buffer ttyC%d %d\n", |
| @@ -2891,20 +1962,11 @@ static int cy_chars_in_buffer(struct tty_struct *tty) | |||
| 2891 | return info->xmit_cnt; | 1962 | return info->xmit_cnt; |
| 2892 | #ifdef Z_EXT_CHARS_IN_BUFFER | 1963 | #ifdef Z_EXT_CHARS_IN_BUFFER |
| 2893 | } else { | 1964 | } else { |
| 2894 | static struct FIRM_ID *firm_id; | 1965 | struct BUF_CTRL __iomem *buf_ctrl = info->u.cyz.buf_ctrl; |
| 2895 | static struct ZFW_CTRL *zfw_ctrl; | ||
| 2896 | static struct CH_CTRL *ch_ctrl; | ||
| 2897 | static struct BUF_CTRL *buf_ctrl; | ||
| 2898 | int char_count; | 1966 | int char_count; |
| 2899 | __u32 tx_put, tx_get, tx_bufsize; | 1967 | __u32 tx_put, tx_get, tx_bufsize; |
| 2900 | 1968 | ||
| 2901 | lock_kernel(); | 1969 | lock_kernel(); |
| 2902 | firm_id = card->base_addr + ID_ADDRESS; | ||
| 2903 | zfw_ctrl = card->base_addr + | ||
| 2904 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 2905 | ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]); | ||
| 2906 | buf_ctrl = &(zfw_ctrl->buf_ctrl[channel]); | ||
| 2907 | |||
| 2908 | tx_get = readl(&buf_ctrl->tx_get); | 1970 | tx_get = readl(&buf_ctrl->tx_get); |
| 2909 | tx_put = readl(&buf_ctrl->tx_put); | 1971 | tx_put = readl(&buf_ctrl->tx_put); |
| 2910 | tx_bufsize = readl(&buf_ctrl->tx_bufsize); | 1972 | tx_bufsize = readl(&buf_ctrl->tx_bufsize); |
| @@ -2957,48 +2019,44 @@ static void cyy_baud_calc(struct cyclades_port *info, __u32 baud) | |||
| 2957 | * This routine finds or computes the various line characteristics. | 2019 | * This routine finds or computes the various line characteristics. |
| 2958 | * It used to be called config_setup | 2020 | * It used to be called config_setup |
| 2959 | */ | 2021 | */ |
| 2960 | static void set_line_char(struct cyclades_port *info) | 2022 | static void cy_set_line_char(struct cyclades_port *info, struct tty_struct *tty) |
| 2961 | { | 2023 | { |
| 2962 | struct cyclades_card *card; | 2024 | struct cyclades_card *card; |
| 2963 | unsigned long flags; | 2025 | unsigned long flags; |
| 2964 | void __iomem *base_addr; | 2026 | int channel; |
| 2965 | int chip, channel, index; | ||
| 2966 | unsigned cflag, iflag; | 2027 | unsigned cflag, iflag; |
| 2967 | int baud, baud_rate = 0; | 2028 | int baud, baud_rate = 0; |
| 2968 | int i; | 2029 | int i; |
| 2969 | 2030 | ||
| 2970 | if (!info->port.tty || !info->port.tty->termios) | 2031 | if (!tty->termios) /* XXX can this happen at all? */ |
| 2971 | return; | 2032 | return; |
| 2972 | 2033 | ||
| 2973 | if (info->line == -1) | 2034 | if (info->line == -1) |
| 2974 | return; | 2035 | return; |
| 2975 | 2036 | ||
| 2976 | cflag = info->port.tty->termios->c_cflag; | 2037 | cflag = tty->termios->c_cflag; |
| 2977 | iflag = info->port.tty->termios->c_iflag; | 2038 | iflag = tty->termios->c_iflag; |
| 2978 | 2039 | ||
| 2979 | /* | 2040 | /* |
| 2980 | * Set up the tty->alt_speed kludge | 2041 | * Set up the tty->alt_speed kludge |
| 2981 | */ | 2042 | */ |
| 2982 | if (info->port.tty) { | 2043 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) |
| 2983 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) | 2044 | tty->alt_speed = 57600; |
| 2984 | info->port.tty->alt_speed = 57600; | 2045 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) |
| 2985 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) | 2046 | tty->alt_speed = 115200; |
| 2986 | info->port.tty->alt_speed = 115200; | 2047 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) |
| 2987 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) | 2048 | tty->alt_speed = 230400; |
| 2988 | info->port.tty->alt_speed = 230400; | 2049 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) |
| 2989 | if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) | 2050 | tty->alt_speed = 460800; |
| 2990 | info->port.tty->alt_speed = 460800; | ||
| 2991 | } | ||
| 2992 | 2051 | ||
| 2993 | card = info->card; | 2052 | card = info->card; |
| 2994 | channel = info->line - card->first_line; | 2053 | channel = info->line - card->first_line; |
| 2995 | 2054 | ||
| 2996 | if (!cy_is_Z(card)) { | 2055 | if (!cy_is_Z(card)) { |
| 2997 | 2056 | u32 cflags; | |
| 2998 | index = card->bus_index; | ||
| 2999 | 2057 | ||
| 3000 | /* baud rate */ | 2058 | /* baud rate */ |
| 3001 | baud = tty_get_baud_rate(info->port.tty); | 2059 | baud = tty_get_baud_rate(tty); |
| 3002 | if (baud == 38400 && (info->port.flags & ASYNC_SPD_MASK) == | 2060 | if (baud == 38400 && (info->port.flags & ASYNC_SPD_MASK) == |
| 3003 | ASYNC_SPD_CUST) { | 2061 | ASYNC_SPD_CUST) { |
| 3004 | if (info->custom_divisor) | 2062 | if (info->custom_divisor) |
| @@ -3107,124 +2165,68 @@ static void set_line_char(struct cyclades_port *info) | |||
| 3107 | cable. Contact Marcio Saito for details. | 2165 | cable. Contact Marcio Saito for details. |
| 3108 | ***********************************************/ | 2166 | ***********************************************/ |
| 3109 | 2167 | ||
| 3110 | chip = channel >> 2; | ||
| 3111 | channel &= 0x03; | 2168 | channel &= 0x03; |
| 3112 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 3113 | 2169 | ||
| 3114 | spin_lock_irqsave(&card->card_lock, flags); | 2170 | spin_lock_irqsave(&card->card_lock, flags); |
| 3115 | cy_writeb(base_addr + (CyCAR << index), (u_char) channel); | 2171 | cyy_writeb(info, CyCAR, channel); |
| 3116 | 2172 | ||
| 3117 | /* tx and rx baud rate */ | 2173 | /* tx and rx baud rate */ |
| 3118 | 2174 | ||
| 3119 | cy_writeb(base_addr + (CyTCOR << index), info->tco); | 2175 | cyy_writeb(info, CyTCOR, info->tco); |
| 3120 | cy_writeb(base_addr + (CyTBPR << index), info->tbpr); | 2176 | cyy_writeb(info, CyTBPR, info->tbpr); |
| 3121 | cy_writeb(base_addr + (CyRCOR << index), info->rco); | 2177 | cyy_writeb(info, CyRCOR, info->rco); |
| 3122 | cy_writeb(base_addr + (CyRBPR << index), info->rbpr); | 2178 | cyy_writeb(info, CyRBPR, info->rbpr); |
| 3123 | 2179 | ||
| 3124 | /* set line characteristics according configuration */ | 2180 | /* set line characteristics according configuration */ |
| 3125 | 2181 | ||
| 3126 | cy_writeb(base_addr + (CySCHR1 << index), | 2182 | cyy_writeb(info, CySCHR1, START_CHAR(tty)); |
| 3127 | START_CHAR(info->port.tty)); | 2183 | cyy_writeb(info, CySCHR2, STOP_CHAR(tty)); |
| 3128 | cy_writeb(base_addr + (CySCHR2 << index), STOP_CHAR(info->port.tty)); | 2184 | cyy_writeb(info, CyCOR1, info->cor1); |
| 3129 | cy_writeb(base_addr + (CyCOR1 << index), info->cor1); | 2185 | cyy_writeb(info, CyCOR2, info->cor2); |
| 3130 | cy_writeb(base_addr + (CyCOR2 << index), info->cor2); | 2186 | cyy_writeb(info, CyCOR3, info->cor3); |
| 3131 | cy_writeb(base_addr + (CyCOR3 << index), info->cor3); | 2187 | cyy_writeb(info, CyCOR4, info->cor4); |
| 3132 | cy_writeb(base_addr + (CyCOR4 << index), info->cor4); | 2188 | cyy_writeb(info, CyCOR5, info->cor5); |
| 3133 | cy_writeb(base_addr + (CyCOR5 << index), info->cor5); | ||
| 3134 | 2189 | ||
| 3135 | cyy_issue_cmd(base_addr, CyCOR_CHANGE | CyCOR1ch | CyCOR2ch | | 2190 | cyy_issue_cmd(info, CyCOR_CHANGE | CyCOR1ch | CyCOR2ch | |
| 3136 | CyCOR3ch, index); | 2191 | CyCOR3ch); |
| 3137 | 2192 | ||
| 3138 | /* !!! Is this needed? */ | 2193 | /* !!! Is this needed? */ |
| 3139 | cy_writeb(base_addr + (CyCAR << index), (u_char) channel); | 2194 | cyy_writeb(info, CyCAR, channel); |
| 3140 | cy_writeb(base_addr + (CyRTPR << index), | 2195 | cyy_writeb(info, CyRTPR, |
| 3141 | (info->default_timeout ? info->default_timeout : 0x02)); | 2196 | (info->default_timeout ? info->default_timeout : 0x02)); |
| 3142 | /* 10ms rx timeout */ | 2197 | /* 10ms rx timeout */ |
| 3143 | 2198 | ||
| 3144 | if (C_CLOCAL(info->port.tty)) { | 2199 | cflags = CyCTS; |
| 3145 | /* without modem intr */ | 2200 | if (!C_CLOCAL(tty)) |
| 3146 | cy_writeb(base_addr + (CySRER << index), | 2201 | cflags |= CyDSR | CyRI | CyDCD; |
| 3147 | readb(base_addr + (CySRER << index)) | CyMdmCh); | 2202 | /* without modem intr */ |
| 3148 | /* act on 1->0 modem transitions */ | 2203 | cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyMdmCh); |
| 3149 | if ((cflag & CRTSCTS) && info->rflow) { | 2204 | /* act on 1->0 modem transitions */ |
| 3150 | cy_writeb(base_addr + (CyMCOR1 << index), | 2205 | if ((cflag & CRTSCTS) && info->rflow) |
| 3151 | (CyCTS | rflow_thr[i])); | 2206 | cyy_writeb(info, CyMCOR1, cflags | rflow_thr[i]); |
| 3152 | } else { | 2207 | else |
| 3153 | cy_writeb(base_addr + (CyMCOR1 << index), | 2208 | cyy_writeb(info, CyMCOR1, cflags); |
| 3154 | CyCTS); | 2209 | /* act on 0->1 modem transitions */ |
| 3155 | } | 2210 | cyy_writeb(info, CyMCOR2, cflags); |
| 3156 | /* act on 0->1 modem transitions */ | ||
| 3157 | cy_writeb(base_addr + (CyMCOR2 << index), CyCTS); | ||
| 3158 | } else { | ||
| 3159 | /* without modem intr */ | ||
| 3160 | cy_writeb(base_addr + (CySRER << index), | ||
| 3161 | readb(base_addr + | ||
| 3162 | (CySRER << index)) | CyMdmCh); | ||
| 3163 | /* act on 1->0 modem transitions */ | ||
| 3164 | if ((cflag & CRTSCTS) && info->rflow) { | ||
| 3165 | cy_writeb(base_addr + (CyMCOR1 << index), | ||
| 3166 | (CyDSR | CyCTS | CyRI | CyDCD | | ||
| 3167 | rflow_thr[i])); | ||
| 3168 | } else { | ||
| 3169 | cy_writeb(base_addr + (CyMCOR1 << index), | ||
| 3170 | CyDSR | CyCTS | CyRI | CyDCD); | ||
| 3171 | } | ||
| 3172 | /* act on 0->1 modem transitions */ | ||
| 3173 | cy_writeb(base_addr + (CyMCOR2 << index), | ||
| 3174 | CyDSR | CyCTS | CyRI | CyDCD); | ||
| 3175 | } | ||
| 3176 | 2211 | ||
| 3177 | if (i == 0) { /* baud rate is zero, turn off line */ | 2212 | if (i == 0) /* baud rate is zero, turn off line */ |
| 3178 | if (info->rtsdtr_inv) { | 2213 | cyy_change_rts_dtr(info, 0, TIOCM_DTR); |
| 3179 | cy_writeb(base_addr + (CyMSVR1 << index), | 2214 | else |
| 3180 | ~CyRTS); | 2215 | cyy_change_rts_dtr(info, TIOCM_DTR, 0); |
| 3181 | } else { | ||
| 3182 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 3183 | ~CyDTR); | ||
| 3184 | } | ||
| 3185 | #ifdef CY_DEBUG_DTR | ||
| 3186 | printk(KERN_DEBUG "cyc:set_line_char dropping DTR\n"); | ||
| 3187 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 3188 | readb(base_addr + (CyMSVR1 << index)), | ||
| 3189 | readb(base_addr + (CyMSVR2 << index))); | ||
| 3190 | #endif | ||
| 3191 | } else { | ||
| 3192 | if (info->rtsdtr_inv) { | ||
| 3193 | cy_writeb(base_addr + (CyMSVR1 << index), | ||
| 3194 | CyRTS); | ||
| 3195 | } else { | ||
| 3196 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 3197 | CyDTR); | ||
| 3198 | } | ||
| 3199 | #ifdef CY_DEBUG_DTR | ||
| 3200 | printk(KERN_DEBUG "cyc:set_line_char raising DTR\n"); | ||
| 3201 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 3202 | readb(base_addr + (CyMSVR1 << index)), | ||
| 3203 | readb(base_addr + (CyMSVR2 << index))); | ||
| 3204 | #endif | ||
| 3205 | } | ||
| 3206 | 2216 | ||
| 3207 | if (info->port.tty) | 2217 | clear_bit(TTY_IO_ERROR, &tty->flags); |
| 3208 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | ||
| 3209 | spin_unlock_irqrestore(&card->card_lock, flags); | 2218 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 3210 | 2219 | ||
| 3211 | } else { | 2220 | } else { |
| 3212 | struct FIRM_ID __iomem *firm_id; | 2221 | struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl; |
| 3213 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 3214 | struct CH_CTRL __iomem *ch_ctrl; | ||
| 3215 | __u32 sw_flow; | 2222 | __u32 sw_flow; |
| 3216 | int retval; | 2223 | int retval; |
| 3217 | 2224 | ||
| 3218 | firm_id = card->base_addr + ID_ADDRESS; | ||
| 3219 | if (!cyz_is_loaded(card)) | 2225 | if (!cyz_is_loaded(card)) |
| 3220 | return; | 2226 | return; |
| 3221 | 2227 | ||
| 3222 | zfw_ctrl = card->base_addr + | ||
| 3223 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 3224 | ch_ctrl = &(zfw_ctrl->ch_ctrl[channel]); | ||
| 3225 | |||
| 3226 | /* baud rate */ | 2228 | /* baud rate */ |
| 3227 | baud = tty_get_baud_rate(info->port.tty); | 2229 | baud = tty_get_baud_rate(tty); |
| 3228 | if (baud == 38400 && (info->port.flags & ASYNC_SPD_MASK) == | 2230 | if (baud == 38400 && (info->port.flags & ASYNC_SPD_MASK) == |
| 3229 | ASYNC_SPD_CUST) { | 2231 | ASYNC_SPD_CUST) { |
| 3230 | if (info->custom_divisor) | 2232 | if (info->custom_divisor) |
| @@ -3335,45 +2337,38 @@ static void set_line_char(struct cyclades_port *info) | |||
| 3335 | "was %x\n", info->line, retval); | 2337 | "was %x\n", info->line, retval); |
| 3336 | } | 2338 | } |
| 3337 | 2339 | ||
| 3338 | if (info->port.tty) | 2340 | clear_bit(TTY_IO_ERROR, &tty->flags); |
| 3339 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | ||
| 3340 | } | 2341 | } |
| 3341 | } /* set_line_char */ | 2342 | } /* set_line_char */ |
| 3342 | 2343 | ||
| 3343 | static int | 2344 | static int cy_get_serial_info(struct cyclades_port *info, |
| 3344 | get_serial_info(struct cyclades_port *info, | ||
| 3345 | struct serial_struct __user *retinfo) | 2345 | struct serial_struct __user *retinfo) |
| 3346 | { | 2346 | { |
| 3347 | struct serial_struct tmp; | ||
| 3348 | struct cyclades_card *cinfo = info->card; | 2347 | struct cyclades_card *cinfo = info->card; |
| 3349 | 2348 | struct serial_struct tmp = { | |
| 3350 | if (!retinfo) | 2349 | .type = info->type, |
| 3351 | return -EFAULT; | 2350 | .line = info->line, |
| 3352 | memset(&tmp, 0, sizeof(tmp)); | 2351 | .port = (info->card - cy_card) * 0x100 + info->line - |
| 3353 | tmp.type = info->type; | 2352 | cinfo->first_line, |
| 3354 | tmp.line = info->line; | 2353 | .irq = cinfo->irq, |
| 3355 | tmp.port = (info->card - cy_card) * 0x100 + info->line - | 2354 | .flags = info->port.flags, |
| 3356 | cinfo->first_line; | 2355 | .close_delay = info->port.close_delay, |
| 3357 | tmp.irq = cinfo->irq; | 2356 | .closing_wait = info->port.closing_wait, |
| 3358 | tmp.flags = info->port.flags; | 2357 | .baud_base = info->baud, |
| 3359 | tmp.close_delay = info->port.close_delay; | 2358 | .custom_divisor = info->custom_divisor, |
| 3360 | tmp.closing_wait = info->port.closing_wait; | 2359 | .hub6 = 0, /*!!! */ |
| 3361 | tmp.baud_base = info->baud; | 2360 | }; |
| 3362 | tmp.custom_divisor = info->custom_divisor; | ||
| 3363 | tmp.hub6 = 0; /*!!! */ | ||
| 3364 | return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0; | 2361 | return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0; |
| 3365 | } /* get_serial_info */ | 2362 | } |
| 3366 | 2363 | ||
| 3367 | static int | 2364 | static int |
| 3368 | set_serial_info(struct cyclades_port *info, | 2365 | cy_set_serial_info(struct cyclades_port *info, struct tty_struct *tty, |
| 3369 | struct serial_struct __user *new_info) | 2366 | struct serial_struct __user *new_info) |
| 3370 | { | 2367 | { |
| 3371 | struct serial_struct new_serial; | 2368 | struct serial_struct new_serial; |
| 3372 | struct cyclades_port old_info; | ||
| 3373 | 2369 | ||
| 3374 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) | 2370 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) |
| 3375 | return -EFAULT; | 2371 | return -EFAULT; |
| 3376 | old_info = *info; | ||
| 3377 | 2372 | ||
| 3378 | if (!capable(CAP_SYS_ADMIN)) { | 2373 | if (!capable(CAP_SYS_ADMIN)) { |
| 3379 | if (new_serial.close_delay != info->port.close_delay || | 2374 | if (new_serial.close_delay != info->port.close_delay || |
| @@ -3403,10 +2398,10 @@ set_serial_info(struct cyclades_port *info, | |||
| 3403 | 2398 | ||
| 3404 | check_and_exit: | 2399 | check_and_exit: |
| 3405 | if (info->port.flags & ASYNC_INITIALIZED) { | 2400 | if (info->port.flags & ASYNC_INITIALIZED) { |
| 3406 | set_line_char(info); | 2401 | cy_set_line_char(info, tty); |
| 3407 | return 0; | 2402 | return 0; |
| 3408 | } else { | 2403 | } else { |
| 3409 | return startup(info); | 2404 | return cy_startup(info, tty); |
| 3410 | } | 2405 | } |
| 3411 | } /* set_serial_info */ | 2406 | } /* set_serial_info */ |
| 3412 | 2407 | ||
| @@ -3422,24 +2417,14 @@ check_and_exit: | |||
| 3422 | */ | 2417 | */ |
| 3423 | static int get_lsr_info(struct cyclades_port *info, unsigned int __user *value) | 2418 | static int get_lsr_info(struct cyclades_port *info, unsigned int __user *value) |
| 3424 | { | 2419 | { |
| 3425 | struct cyclades_card *card; | 2420 | struct cyclades_card *card = info->card; |
| 3426 | int chip, channel, index; | ||
| 3427 | unsigned char status; | ||
| 3428 | unsigned int result; | 2421 | unsigned int result; |
| 3429 | unsigned long flags; | 2422 | unsigned long flags; |
| 3430 | void __iomem *base_addr; | 2423 | u8 status; |
| 3431 | 2424 | ||
| 3432 | card = info->card; | ||
| 3433 | channel = (info->line) - (card->first_line); | ||
| 3434 | if (!cy_is_Z(card)) { | 2425 | if (!cy_is_Z(card)) { |
| 3435 | chip = channel >> 2; | ||
| 3436 | channel &= 0x03; | ||
| 3437 | index = card->bus_index; | ||
| 3438 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 3439 | |||
| 3440 | spin_lock_irqsave(&card->card_lock, flags); | 2426 | spin_lock_irqsave(&card->card_lock, flags); |
| 3441 | status = readb(base_addr + (CySRER << index)) & | 2427 | status = cyy_readb(info, CySRER) & (CyTxRdy | CyTxMpty); |
| 3442 | (CyTxRdy | CyTxMpty); | ||
| 3443 | spin_unlock_irqrestore(&card->card_lock, flags); | 2428 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 3444 | result = (status ? 0 : TIOCSER_TEMT); | 2429 | result = (status ? 0 : TIOCSER_TEMT); |
| 3445 | } else { | 2430 | } else { |
| @@ -3453,34 +2438,23 @@ static int cy_tiocmget(struct tty_struct *tty, struct file *file) | |||
| 3453 | { | 2438 | { |
| 3454 | struct cyclades_port *info = tty->driver_data; | 2439 | struct cyclades_port *info = tty->driver_data; |
| 3455 | struct cyclades_card *card; | 2440 | struct cyclades_card *card; |
| 3456 | int chip, channel, index; | 2441 | int result; |
| 3457 | void __iomem *base_addr; | ||
| 3458 | unsigned long flags; | ||
| 3459 | unsigned char status; | ||
| 3460 | unsigned long lstatus; | ||
| 3461 | unsigned int result; | ||
| 3462 | struct FIRM_ID __iomem *firm_id; | ||
| 3463 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 3464 | struct BOARD_CTRL __iomem *board_ctrl; | ||
| 3465 | struct CH_CTRL __iomem *ch_ctrl; | ||
| 3466 | 2442 | ||
| 3467 | if (serial_paranoia_check(info, tty->name, __func__)) | 2443 | if (serial_paranoia_check(info, tty->name, __func__)) |
| 3468 | return -ENODEV; | 2444 | return -ENODEV; |
| 3469 | 2445 | ||
| 3470 | lock_kernel(); | ||
| 3471 | |||
| 3472 | card = info->card; | 2446 | card = info->card; |
| 3473 | channel = info->line - card->first_line; | 2447 | |
| 2448 | lock_kernel(); | ||
| 3474 | if (!cy_is_Z(card)) { | 2449 | if (!cy_is_Z(card)) { |
| 3475 | chip = channel >> 2; | 2450 | unsigned long flags; |
| 3476 | channel &= 0x03; | 2451 | int channel = info->line - card->first_line; |
| 3477 | index = card->bus_index; | 2452 | u8 status; |
| 3478 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 3479 | 2453 | ||
| 3480 | spin_lock_irqsave(&card->card_lock, flags); | 2454 | spin_lock_irqsave(&card->card_lock, flags); |
| 3481 | cy_writeb(base_addr + (CyCAR << index), (u_char) channel); | 2455 | cyy_writeb(info, CyCAR, channel & 0x03); |
| 3482 | status = readb(base_addr + (CyMSVR1 << index)); | 2456 | status = cyy_readb(info, CyMSVR1); |
| 3483 | status |= readb(base_addr + (CyMSVR2 << index)); | 2457 | status |= cyy_readb(info, CyMSVR2); |
| 3484 | spin_unlock_irqrestore(&card->card_lock, flags); | 2458 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 3485 | 2459 | ||
| 3486 | if (info->rtsdtr_inv) { | 2460 | if (info->rtsdtr_inv) { |
| @@ -3495,27 +2469,22 @@ static int cy_tiocmget(struct tty_struct *tty, struct file *file) | |||
| 3495 | ((status & CyDSR) ? TIOCM_DSR : 0) | | 2469 | ((status & CyDSR) ? TIOCM_DSR : 0) | |
| 3496 | ((status & CyCTS) ? TIOCM_CTS : 0); | 2470 | ((status & CyCTS) ? TIOCM_CTS : 0); |
| 3497 | } else { | 2471 | } else { |
| 3498 | base_addr = card->base_addr; | 2472 | u32 lstatus; |
| 3499 | firm_id = card->base_addr + ID_ADDRESS; | 2473 | |
| 3500 | if (cyz_is_loaded(card)) { | 2474 | if (!cyz_is_loaded(card)) { |
| 3501 | zfw_ctrl = card->base_addr + | 2475 | result = -ENODEV; |
| 3502 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | 2476 | goto end; |
| 3503 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 3504 | ch_ctrl = zfw_ctrl->ch_ctrl; | ||
| 3505 | lstatus = readl(&ch_ctrl[channel].rs_status); | ||
| 3506 | result = ((lstatus & C_RS_RTS) ? TIOCM_RTS : 0) | | ||
| 3507 | ((lstatus & C_RS_DTR) ? TIOCM_DTR : 0) | | ||
| 3508 | ((lstatus & C_RS_DCD) ? TIOCM_CAR : 0) | | ||
| 3509 | ((lstatus & C_RS_RI) ? TIOCM_RNG : 0) | | ||
| 3510 | ((lstatus & C_RS_DSR) ? TIOCM_DSR : 0) | | ||
| 3511 | ((lstatus & C_RS_CTS) ? TIOCM_CTS : 0); | ||
| 3512 | } else { | ||
| 3513 | result = 0; | ||
| 3514 | unlock_kernel(); | ||
| 3515 | return -ENODEV; | ||
| 3516 | } | 2477 | } |
| 3517 | 2478 | ||
| 2479 | lstatus = readl(&info->u.cyz.ch_ctrl->rs_status); | ||
| 2480 | result = ((lstatus & C_RS_RTS) ? TIOCM_RTS : 0) | | ||
| 2481 | ((lstatus & C_RS_DTR) ? TIOCM_DTR : 0) | | ||
| 2482 | ((lstatus & C_RS_DCD) ? TIOCM_CAR : 0) | | ||
| 2483 | ((lstatus & C_RS_RI) ? TIOCM_RNG : 0) | | ||
| 2484 | ((lstatus & C_RS_DSR) ? TIOCM_DSR : 0) | | ||
| 2485 | ((lstatus & C_RS_CTS) ? TIOCM_CTS : 0); | ||
| 3518 | } | 2486 | } |
| 2487 | end: | ||
| 3519 | unlock_kernel(); | 2488 | unlock_kernel(); |
| 3520 | return result; | 2489 | return result; |
| 3521 | } /* cy_tiomget */ | 2490 | } /* cy_tiomget */ |
| @@ -3526,150 +2495,53 @@ cy_tiocmset(struct tty_struct *tty, struct file *file, | |||
| 3526 | { | 2495 | { |
| 3527 | struct cyclades_port *info = tty->driver_data; | 2496 | struct cyclades_port *info = tty->driver_data; |
| 3528 | struct cyclades_card *card; | 2497 | struct cyclades_card *card; |
| 3529 | int chip, channel, index; | ||
| 3530 | void __iomem *base_addr; | ||
| 3531 | unsigned long flags; | 2498 | unsigned long flags; |
| 3532 | struct FIRM_ID __iomem *firm_id; | ||
| 3533 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 3534 | struct BOARD_CTRL __iomem *board_ctrl; | ||
| 3535 | struct CH_CTRL __iomem *ch_ctrl; | ||
| 3536 | int retval; | ||
| 3537 | 2499 | ||
| 3538 | if (serial_paranoia_check(info, tty->name, __func__)) | 2500 | if (serial_paranoia_check(info, tty->name, __func__)) |
| 3539 | return -ENODEV; | 2501 | return -ENODEV; |
| 3540 | 2502 | ||
| 3541 | card = info->card; | 2503 | card = info->card; |
| 3542 | channel = (info->line) - (card->first_line); | ||
| 3543 | if (!cy_is_Z(card)) { | 2504 | if (!cy_is_Z(card)) { |
| 3544 | chip = channel >> 2; | 2505 | spin_lock_irqsave(&card->card_lock, flags); |
| 3545 | channel &= 0x03; | 2506 | cyy_change_rts_dtr(info, set, clear); |
| 3546 | index = card->bus_index; | 2507 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 3547 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | 2508 | } else { |
| 2509 | struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl; | ||
| 2510 | int retval, channel = info->line - card->first_line; | ||
| 2511 | u32 rs; | ||
| 3548 | 2512 | ||
| 3549 | if (set & TIOCM_RTS) { | 2513 | if (!cyz_is_loaded(card)) |
| 3550 | spin_lock_irqsave(&card->card_lock, flags); | 2514 | return -ENODEV; |
| 3551 | cy_writeb(base_addr + (CyCAR << index), | 2515 | |
| 3552 | (u_char) channel); | 2516 | spin_lock_irqsave(&card->card_lock, flags); |
| 3553 | if (info->rtsdtr_inv) { | 2517 | rs = readl(&ch_ctrl->rs_control); |
| 3554 | cy_writeb(base_addr + (CyMSVR2 << index), | 2518 | if (set & TIOCM_RTS) |
| 3555 | CyDTR); | 2519 | rs |= C_RS_RTS; |
| 3556 | } else { | 2520 | if (clear & TIOCM_RTS) |
| 3557 | cy_writeb(base_addr + (CyMSVR1 << index), | 2521 | rs &= ~C_RS_RTS; |
| 3558 | CyRTS); | ||
| 3559 | } | ||
| 3560 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3561 | } | ||
| 3562 | if (clear & TIOCM_RTS) { | ||
| 3563 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 3564 | cy_writeb(base_addr + (CyCAR << index), | ||
| 3565 | (u_char) channel); | ||
| 3566 | if (info->rtsdtr_inv) { | ||
| 3567 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 3568 | ~CyDTR); | ||
| 3569 | } else { | ||
| 3570 | cy_writeb(base_addr + (CyMSVR1 << index), | ||
| 3571 | ~CyRTS); | ||
| 3572 | } | ||
| 3573 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3574 | } | ||
| 3575 | if (set & TIOCM_DTR) { | 2522 | if (set & TIOCM_DTR) { |
| 3576 | spin_lock_irqsave(&card->card_lock, flags); | 2523 | rs |= C_RS_DTR; |
| 3577 | cy_writeb(base_addr + (CyCAR << index), | ||
| 3578 | (u_char) channel); | ||
| 3579 | if (info->rtsdtr_inv) { | ||
| 3580 | cy_writeb(base_addr + (CyMSVR1 << index), | ||
| 3581 | CyRTS); | ||
| 3582 | } else { | ||
| 3583 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 3584 | CyDTR); | ||
| 3585 | } | ||
| 3586 | #ifdef CY_DEBUG_DTR | 2524 | #ifdef CY_DEBUG_DTR |
| 3587 | printk(KERN_DEBUG "cyc:set_modem_info raising DTR\n"); | 2525 | printk(KERN_DEBUG "cyc:set_modem_info raising Z DTR\n"); |
| 3588 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | ||
| 3589 | readb(base_addr + (CyMSVR1 << index)), | ||
| 3590 | readb(base_addr + (CyMSVR2 << index))); | ||
| 3591 | #endif | 2526 | #endif |
| 3592 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3593 | } | 2527 | } |
| 3594 | if (clear & TIOCM_DTR) { | 2528 | if (clear & TIOCM_DTR) { |
| 3595 | spin_lock_irqsave(&card->card_lock, flags); | 2529 | rs &= ~C_RS_DTR; |
| 3596 | cy_writeb(base_addr + (CyCAR << index), | ||
| 3597 | (u_char) channel); | ||
| 3598 | if (info->rtsdtr_inv) { | ||
| 3599 | cy_writeb(base_addr + (CyMSVR1 << index), | ||
| 3600 | ~CyRTS); | ||
| 3601 | } else { | ||
| 3602 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 3603 | ~CyDTR); | ||
| 3604 | } | ||
| 3605 | |||
| 3606 | #ifdef CY_DEBUG_DTR | 2530 | #ifdef CY_DEBUG_DTR |
| 3607 | printk(KERN_DEBUG "cyc:set_modem_info dropping DTR\n"); | 2531 | printk(KERN_DEBUG "cyc:set_modem_info clearing " |
| 3608 | printk(KERN_DEBUG " status: 0x%x, 0x%x\n", | 2532 | "Z DTR\n"); |
| 3609 | readb(base_addr + (CyMSVR1 << index)), | ||
| 3610 | readb(base_addr + (CyMSVR2 << index))); | ||
| 3611 | #endif | 2533 | #endif |
| 3612 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3613 | } | 2534 | } |
| 3614 | } else { | 2535 | cy_writel(&ch_ctrl->rs_control, rs); |
| 3615 | base_addr = card->base_addr; | ||
| 3616 | |||
| 3617 | firm_id = card->base_addr + ID_ADDRESS; | ||
| 3618 | if (cyz_is_loaded(card)) { | ||
| 3619 | zfw_ctrl = card->base_addr + | ||
| 3620 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 3621 | board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 3622 | ch_ctrl = zfw_ctrl->ch_ctrl; | ||
| 3623 | |||
| 3624 | if (set & TIOCM_RTS) { | ||
| 3625 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 3626 | cy_writel(&ch_ctrl[channel].rs_control, | ||
| 3627 | readl(&ch_ctrl[channel].rs_control) | | ||
| 3628 | C_RS_RTS); | ||
| 3629 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3630 | } | ||
| 3631 | if (clear & TIOCM_RTS) { | ||
| 3632 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 3633 | cy_writel(&ch_ctrl[channel].rs_control, | ||
| 3634 | readl(&ch_ctrl[channel].rs_control) & | ||
| 3635 | ~C_RS_RTS); | ||
| 3636 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3637 | } | ||
| 3638 | if (set & TIOCM_DTR) { | ||
| 3639 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 3640 | cy_writel(&ch_ctrl[channel].rs_control, | ||
| 3641 | readl(&ch_ctrl[channel].rs_control) | | ||
| 3642 | C_RS_DTR); | ||
| 3643 | #ifdef CY_DEBUG_DTR | ||
| 3644 | printk(KERN_DEBUG "cyc:set_modem_info raising " | ||
| 3645 | "Z DTR\n"); | ||
| 3646 | #endif | ||
| 3647 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3648 | } | ||
| 3649 | if (clear & TIOCM_DTR) { | ||
| 3650 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 3651 | cy_writel(&ch_ctrl[channel].rs_control, | ||
| 3652 | readl(&ch_ctrl[channel].rs_control) & | ||
| 3653 | ~C_RS_DTR); | ||
| 3654 | #ifdef CY_DEBUG_DTR | ||
| 3655 | printk(KERN_DEBUG "cyc:set_modem_info clearing " | ||
| 3656 | "Z DTR\n"); | ||
| 3657 | #endif | ||
| 3658 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3659 | } | ||
| 3660 | } else { | ||
| 3661 | return -ENODEV; | ||
| 3662 | } | ||
| 3663 | spin_lock_irqsave(&card->card_lock, flags); | ||
| 3664 | retval = cyz_issue_cmd(card, channel, C_CM_IOCTLM, 0L); | 2536 | retval = cyz_issue_cmd(card, channel, C_CM_IOCTLM, 0L); |
| 2537 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3665 | if (retval != 0) { | 2538 | if (retval != 0) { |
| 3666 | printk(KERN_ERR "cyc:set_modem_info retval on ttyC%d " | 2539 | printk(KERN_ERR "cyc:set_modem_info retval on ttyC%d " |
| 3667 | "was %x\n", info->line, retval); | 2540 | "was %x\n", info->line, retval); |
| 3668 | } | 2541 | } |
| 3669 | spin_unlock_irqrestore(&card->card_lock, flags); | ||
| 3670 | } | 2542 | } |
| 3671 | return 0; | 2543 | return 0; |
| 3672 | } /* cy_tiocmset */ | 2544 | } |
| 3673 | 2545 | ||
| 3674 | /* | 2546 | /* |
| 3675 | * cy_break() --- routine which turns the break handling on or off | 2547 | * cy_break() --- routine which turns the break handling on or off |
| @@ -3734,41 +2606,18 @@ static int cy_break(struct tty_struct *tty, int break_state) | |||
| 3734 | return retval; | 2606 | return retval; |
| 3735 | } /* cy_break */ | 2607 | } /* cy_break */ |
| 3736 | 2608 | ||
| 3737 | static int get_mon_info(struct cyclades_port *info, | ||
| 3738 | struct cyclades_monitor __user *mon) | ||
| 3739 | { | ||
| 3740 | |||
| 3741 | if (copy_to_user(mon, &info->mon, sizeof(struct cyclades_monitor))) | ||
| 3742 | return -EFAULT; | ||
| 3743 | info->mon.int_count = 0; | ||
| 3744 | info->mon.char_count = 0; | ||
| 3745 | info->mon.char_max = 0; | ||
| 3746 | info->mon.char_last = 0; | ||
| 3747 | return 0; | ||
| 3748 | } /* get_mon_info */ | ||
| 3749 | |||
| 3750 | static int set_threshold(struct cyclades_port *info, unsigned long value) | 2609 | static int set_threshold(struct cyclades_port *info, unsigned long value) |
| 3751 | { | 2610 | { |
| 3752 | struct cyclades_card *card; | 2611 | struct cyclades_card *card = info->card; |
| 3753 | void __iomem *base_addr; | ||
| 3754 | int channel, chip, index; | ||
| 3755 | unsigned long flags; | 2612 | unsigned long flags; |
| 3756 | 2613 | ||
| 3757 | card = info->card; | ||
| 3758 | channel = info->line - card->first_line; | ||
| 3759 | if (!cy_is_Z(card)) { | 2614 | if (!cy_is_Z(card)) { |
| 3760 | chip = channel >> 2; | ||
| 3761 | channel &= 0x03; | ||
| 3762 | index = card->bus_index; | ||
| 3763 | base_addr = | ||
| 3764 | card->base_addr + (cy_chip_offset[chip] << index); | ||
| 3765 | |||
| 3766 | info->cor3 &= ~CyREC_FIFO; | 2615 | info->cor3 &= ~CyREC_FIFO; |
| 3767 | info->cor3 |= value & CyREC_FIFO; | 2616 | info->cor3 |= value & CyREC_FIFO; |
| 3768 | 2617 | ||
| 3769 | spin_lock_irqsave(&card->card_lock, flags); | 2618 | spin_lock_irqsave(&card->card_lock, flags); |
| 3770 | cy_writeb(base_addr + (CyCOR3 << index), info->cor3); | 2619 | cyy_writeb(info, CyCOR3, info->cor3); |
| 3771 | cyy_issue_cmd(base_addr, CyCOR_CHANGE | CyCOR3ch, index); | 2620 | cyy_issue_cmd(info, CyCOR_CHANGE | CyCOR3ch); |
| 3772 | spin_unlock_irqrestore(&card->card_lock, flags); | 2621 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 3773 | } | 2622 | } |
| 3774 | return 0; | 2623 | return 0; |
| @@ -3777,55 +2626,23 @@ static int set_threshold(struct cyclades_port *info, unsigned long value) | |||
| 3777 | static int get_threshold(struct cyclades_port *info, | 2626 | static int get_threshold(struct cyclades_port *info, |
| 3778 | unsigned long __user *value) | 2627 | unsigned long __user *value) |
| 3779 | { | 2628 | { |
| 3780 | struct cyclades_card *card; | 2629 | struct cyclades_card *card = info->card; |
| 3781 | void __iomem *base_addr; | ||
| 3782 | int channel, chip, index; | ||
| 3783 | unsigned long tmp; | ||
| 3784 | 2630 | ||
| 3785 | card = info->card; | ||
| 3786 | channel = info->line - card->first_line; | ||
| 3787 | if (!cy_is_Z(card)) { | 2631 | if (!cy_is_Z(card)) { |
| 3788 | chip = channel >> 2; | 2632 | u8 tmp = cyy_readb(info, CyCOR3) & CyREC_FIFO; |
| 3789 | channel &= 0x03; | ||
| 3790 | index = card->bus_index; | ||
| 3791 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 3792 | |||
| 3793 | tmp = readb(base_addr + (CyCOR3 << index)) & CyREC_FIFO; | ||
| 3794 | return put_user(tmp, value); | 2633 | return put_user(tmp, value); |
| 3795 | } | 2634 | } |
| 3796 | return 0; | 2635 | return 0; |
| 3797 | } /* get_threshold */ | 2636 | } /* get_threshold */ |
| 3798 | 2637 | ||
| 3799 | static int set_default_threshold(struct cyclades_port *info, | ||
| 3800 | unsigned long value) | ||
| 3801 | { | ||
| 3802 | info->default_threshold = value & 0x0f; | ||
| 3803 | return 0; | ||
| 3804 | } /* set_default_threshold */ | ||
| 3805 | |||
| 3806 | static int get_default_threshold(struct cyclades_port *info, | ||
| 3807 | unsigned long __user *value) | ||
| 3808 | { | ||
| 3809 | return put_user(info->default_threshold, value); | ||
| 3810 | } /* get_default_threshold */ | ||
| 3811 | |||
| 3812 | static int set_timeout(struct cyclades_port *info, unsigned long value) | 2638 | static int set_timeout(struct cyclades_port *info, unsigned long value) |
| 3813 | { | 2639 | { |
| 3814 | struct cyclades_card *card; | 2640 | struct cyclades_card *card = info->card; |
| 3815 | void __iomem *base_addr; | ||
| 3816 | int channel, chip, index; | ||
| 3817 | unsigned long flags; | 2641 | unsigned long flags; |
| 3818 | 2642 | ||
| 3819 | card = info->card; | ||
| 3820 | channel = info->line - card->first_line; | ||
| 3821 | if (!cy_is_Z(card)) { | 2643 | if (!cy_is_Z(card)) { |
| 3822 | chip = channel >> 2; | ||
| 3823 | channel &= 0x03; | ||
| 3824 | index = card->bus_index; | ||
| 3825 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 3826 | |||
| 3827 | spin_lock_irqsave(&card->card_lock, flags); | 2644 | spin_lock_irqsave(&card->card_lock, flags); |
| 3828 | cy_writeb(base_addr + (CyRTPR << index), value & 0xff); | 2645 | cyy_writeb(info, CyRTPR, value & 0xff); |
| 3829 | spin_unlock_irqrestore(&card->card_lock, flags); | 2646 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 3830 | } | 2647 | } |
| 3831 | return 0; | 2648 | return 0; |
| @@ -3834,36 +2651,35 @@ static int set_timeout(struct cyclades_port *info, unsigned long value) | |||
| 3834 | static int get_timeout(struct cyclades_port *info, | 2651 | static int get_timeout(struct cyclades_port *info, |
| 3835 | unsigned long __user *value) | 2652 | unsigned long __user *value) |
| 3836 | { | 2653 | { |
| 3837 | struct cyclades_card *card; | 2654 | struct cyclades_card *card = info->card; |
| 3838 | void __iomem *base_addr; | ||
| 3839 | int channel, chip, index; | ||
| 3840 | unsigned long tmp; | ||
| 3841 | 2655 | ||
| 3842 | card = info->card; | ||
| 3843 | channel = info->line - card->first_line; | ||
| 3844 | if (!cy_is_Z(card)) { | 2656 | if (!cy_is_Z(card)) { |
| 3845 | chip = channel >> 2; | 2657 | u8 tmp = cyy_readb(info, CyRTPR); |
| 3846 | channel &= 0x03; | ||
| 3847 | index = card->bus_index; | ||
| 3848 | base_addr = card->base_addr + (cy_chip_offset[chip] << index); | ||
| 3849 | |||
| 3850 | tmp = readb(base_addr + (CyRTPR << index)); | ||
| 3851 | return put_user(tmp, value); | 2658 | return put_user(tmp, value); |
| 3852 | } | 2659 | } |
| 3853 | return 0; | 2660 | return 0; |
| 3854 | } /* get_timeout */ | 2661 | } /* get_timeout */ |
| 3855 | 2662 | ||
| 3856 | static int set_default_timeout(struct cyclades_port *info, unsigned long value) | 2663 | static int cy_cflags_changed(struct cyclades_port *info, unsigned long arg, |
| 2664 | struct cyclades_icount *cprev) | ||
| 3857 | { | 2665 | { |
| 3858 | info->default_timeout = value & 0xff; | 2666 | struct cyclades_icount cnow; |
| 3859 | return 0; | 2667 | unsigned long flags; |
| 3860 | } /* set_default_timeout */ | 2668 | int ret; |
| 3861 | 2669 | ||
| 3862 | static int get_default_timeout(struct cyclades_port *info, | 2670 | spin_lock_irqsave(&info->card->card_lock, flags); |
| 3863 | unsigned long __user *value) | 2671 | cnow = info->icount; /* atomic copy */ |
| 3864 | { | 2672 | spin_unlock_irqrestore(&info->card->card_lock, flags); |
| 3865 | return put_user(info->default_timeout, value); | 2673 | |
| 3866 | } /* get_default_timeout */ | 2674 | ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || |
| 2675 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || | ||
| 2676 | ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || | ||
| 2677 | ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); | ||
| 2678 | |||
| 2679 | *cprev = cnow; | ||
| 2680 | |||
| 2681 | return ret; | ||
| 2682 | } | ||
| 3867 | 2683 | ||
| 3868 | /* | 2684 | /* |
| 3869 | * This routine allows the tty driver to implement device- | 2685 | * This routine allows the tty driver to implement device- |
| @@ -3875,8 +2691,7 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3875 | unsigned int cmd, unsigned long arg) | 2691 | unsigned int cmd, unsigned long arg) |
| 3876 | { | 2692 | { |
| 3877 | struct cyclades_port *info = tty->driver_data; | 2693 | struct cyclades_port *info = tty->driver_data; |
| 3878 | struct cyclades_icount cprev, cnow; /* kernel counter temps */ | 2694 | struct cyclades_icount cnow; /* kernel counter temps */ |
| 3879 | struct serial_icounter_struct __user *p_cuser; /* user space */ | ||
| 3880 | int ret_val = 0; | 2695 | int ret_val = 0; |
| 3881 | unsigned long flags; | 2696 | unsigned long flags; |
| 3882 | void __user *argp = (void __user *)arg; | 2697 | void __user *argp = (void __user *)arg; |
| @@ -3892,7 +2707,11 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3892 | 2707 | ||
| 3893 | switch (cmd) { | 2708 | switch (cmd) { |
| 3894 | case CYGETMON: | 2709 | case CYGETMON: |
| 3895 | ret_val = get_mon_info(info, argp); | 2710 | if (copy_to_user(argp, &info->mon, sizeof(info->mon))) { |
| 2711 | ret_val = -EFAULT; | ||
| 2712 | break; | ||
| 2713 | } | ||
| 2714 | memset(&info->mon, 0, sizeof(info->mon)); | ||
| 3896 | break; | 2715 | break; |
| 3897 | case CYGETTHRESH: | 2716 | case CYGETTHRESH: |
| 3898 | ret_val = get_threshold(info, argp); | 2717 | ret_val = get_threshold(info, argp); |
| @@ -3901,10 +2720,11 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3901 | ret_val = set_threshold(info, arg); | 2720 | ret_val = set_threshold(info, arg); |
| 3902 | break; | 2721 | break; |
| 3903 | case CYGETDEFTHRESH: | 2722 | case CYGETDEFTHRESH: |
| 3904 | ret_val = get_default_threshold(info, argp); | 2723 | ret_val = put_user(info->default_threshold, |
| 2724 | (unsigned long __user *)argp); | ||
| 3905 | break; | 2725 | break; |
| 3906 | case CYSETDEFTHRESH: | 2726 | case CYSETDEFTHRESH: |
| 3907 | ret_val = set_default_threshold(info, arg); | 2727 | info->default_threshold = arg & 0x0f; |
| 3908 | break; | 2728 | break; |
| 3909 | case CYGETTIMEOUT: | 2729 | case CYGETTIMEOUT: |
| 3910 | ret_val = get_timeout(info, argp); | 2730 | ret_val = get_timeout(info, argp); |
| @@ -3913,21 +2733,20 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3913 | ret_val = set_timeout(info, arg); | 2733 | ret_val = set_timeout(info, arg); |
| 3914 | break; | 2734 | break; |
| 3915 | case CYGETDEFTIMEOUT: | 2735 | case CYGETDEFTIMEOUT: |
| 3916 | ret_val = get_default_timeout(info, argp); | 2736 | ret_val = put_user(info->default_timeout, |
| 2737 | (unsigned long __user *)argp); | ||
| 3917 | break; | 2738 | break; |
| 3918 | case CYSETDEFTIMEOUT: | 2739 | case CYSETDEFTIMEOUT: |
| 3919 | ret_val = set_default_timeout(info, arg); | 2740 | info->default_timeout = arg & 0xff; |
| 3920 | break; | 2741 | break; |
| 3921 | case CYSETRFLOW: | 2742 | case CYSETRFLOW: |
| 3922 | info->rflow = (int)arg; | 2743 | info->rflow = (int)arg; |
| 3923 | ret_val = 0; | ||
| 3924 | break; | 2744 | break; |
| 3925 | case CYGETRFLOW: | 2745 | case CYGETRFLOW: |
| 3926 | ret_val = info->rflow; | 2746 | ret_val = info->rflow; |
| 3927 | break; | 2747 | break; |
| 3928 | case CYSETRTSDTR_INV: | 2748 | case CYSETRTSDTR_INV: |
| 3929 | info->rtsdtr_inv = (int)arg; | 2749 | info->rtsdtr_inv = (int)arg; |
| 3930 | ret_val = 0; | ||
| 3931 | break; | 2750 | break; |
| 3932 | case CYGETRTSDTR_INV: | 2751 | case CYGETRTSDTR_INV: |
| 3933 | ret_val = info->rtsdtr_inv; | 2752 | ret_val = info->rtsdtr_inv; |
| @@ -3938,7 +2757,6 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3938 | #ifndef CONFIG_CYZ_INTR | 2757 | #ifndef CONFIG_CYZ_INTR |
| 3939 | case CYZSETPOLLCYCLE: | 2758 | case CYZSETPOLLCYCLE: |
| 3940 | cyz_polling_cycle = (arg * HZ) / 1000; | 2759 | cyz_polling_cycle = (arg * HZ) / 1000; |
| 3941 | ret_val = 0; | ||
| 3942 | break; | 2760 | break; |
| 3943 | case CYZGETPOLLCYCLE: | 2761 | case CYZGETPOLLCYCLE: |
| 3944 | ret_val = (cyz_polling_cycle * 1000) / HZ; | 2762 | ret_val = (cyz_polling_cycle * 1000) / HZ; |
| @@ -3946,16 +2764,15 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3946 | #endif /* CONFIG_CYZ_INTR */ | 2764 | #endif /* CONFIG_CYZ_INTR */ |
| 3947 | case CYSETWAIT: | 2765 | case CYSETWAIT: |
| 3948 | info->port.closing_wait = (unsigned short)arg * HZ / 100; | 2766 | info->port.closing_wait = (unsigned short)arg * HZ / 100; |
| 3949 | ret_val = 0; | ||
| 3950 | break; | 2767 | break; |
| 3951 | case CYGETWAIT: | 2768 | case CYGETWAIT: |
| 3952 | ret_val = info->port.closing_wait / (HZ / 100); | 2769 | ret_val = info->port.closing_wait / (HZ / 100); |
| 3953 | break; | 2770 | break; |
| 3954 | case TIOCGSERIAL: | 2771 | case TIOCGSERIAL: |
| 3955 | ret_val = get_serial_info(info, argp); | 2772 | ret_val = cy_get_serial_info(info, argp); |
| 3956 | break; | 2773 | break; |
| 3957 | case TIOCSSERIAL: | 2774 | case TIOCSSERIAL: |
| 3958 | ret_val = set_serial_info(info, argp); | 2775 | ret_val = cy_set_serial_info(info, tty, argp); |
| 3959 | break; | 2776 | break; |
| 3960 | case TIOCSERGETLSR: /* Get line status register */ | 2777 | case TIOCSERGETLSR: /* Get line status register */ |
| 3961 | ret_val = get_lsr_info(info, argp); | 2778 | ret_val = get_lsr_info(info, argp); |
| @@ -3971,17 +2788,8 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3971 | /* note the counters on entry */ | 2788 | /* note the counters on entry */ |
| 3972 | cnow = info->icount; | 2789 | cnow = info->icount; |
| 3973 | spin_unlock_irqrestore(&info->card->card_lock, flags); | 2790 | spin_unlock_irqrestore(&info->card->card_lock, flags); |
| 3974 | ret_val = wait_event_interruptible(info->delta_msr_wait, ({ | 2791 | ret_val = wait_event_interruptible(info->port.delta_msr_wait, |
| 3975 | cprev = cnow; | 2792 | cy_cflags_changed(info, arg, &cnow)); |
| 3976 | spin_lock_irqsave(&info->card->card_lock, flags); | ||
| 3977 | cnow = info->icount; /* atomic copy */ | ||
| 3978 | spin_unlock_irqrestore(&info->card->card_lock, flags); | ||
| 3979 | |||
| 3980 | ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || | ||
| 3981 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || | ||
| 3982 | ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || | ||
| 3983 | ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)); | ||
| 3984 | })); | ||
| 3985 | break; | 2793 | break; |
| 3986 | 2794 | ||
| 3987 | /* | 2795 | /* |
| @@ -3990,46 +2798,29 @@ cy_ioctl(struct tty_struct *tty, struct file *file, | |||
| 3990 | * NB: both 1->0 and 0->1 transitions are counted except for | 2798 | * NB: both 1->0 and 0->1 transitions are counted except for |
| 3991 | * RI where only 0->1 is counted. | 2799 | * RI where only 0->1 is counted. |
| 3992 | */ | 2800 | */ |
| 3993 | case TIOCGICOUNT: | 2801 | case TIOCGICOUNT: { |
| 2802 | struct serial_icounter_struct sic = { }; | ||
| 2803 | |||
| 3994 | spin_lock_irqsave(&info->card->card_lock, flags); | 2804 | spin_lock_irqsave(&info->card->card_lock, flags); |
| 3995 | cnow = info->icount; | 2805 | cnow = info->icount; |
| 3996 | spin_unlock_irqrestore(&info->card->card_lock, flags); | 2806 | spin_unlock_irqrestore(&info->card->card_lock, flags); |
| 3997 | p_cuser = argp; | 2807 | |
| 3998 | ret_val = put_user(cnow.cts, &p_cuser->cts); | 2808 | sic.cts = cnow.cts; |
| 3999 | if (ret_val) | 2809 | sic.dsr = cnow.dsr; |
| 4000 | break; | 2810 | sic.rng = cnow.rng; |
| 4001 | ret_val = put_user(cnow.dsr, &p_cuser->dsr); | 2811 | sic.dcd = cnow.dcd; |
| 4002 | if (ret_val) | 2812 | sic.rx = cnow.rx; |
| 4003 | break; | 2813 | sic.tx = cnow.tx; |
| 4004 | ret_val = put_user(cnow.rng, &p_cuser->rng); | 2814 | sic.frame = cnow.frame; |
| 4005 | if (ret_val) | 2815 | sic.overrun = cnow.overrun; |
| 4006 | break; | 2816 | sic.parity = cnow.parity; |
| 4007 | ret_val = put_user(cnow.dcd, &p_cuser->dcd); | 2817 | sic.brk = cnow.brk; |
| 4008 | if (ret_val) | 2818 | sic.buf_overrun = cnow.buf_overrun; |
| 4009 | break; | 2819 | |
| 4010 | ret_val = put_user(cnow.rx, &p_cuser->rx); | 2820 | if (copy_to_user(argp, &sic, sizeof(sic))) |
| 4011 | if (ret_val) | 2821 | ret_val = -EFAULT; |
| 4012 | break; | ||
| 4013 | ret_val = put_user(cnow.tx, &p_cuser->tx); | ||
| 4014 | if (ret_val) | ||
| 4015 | break; | ||
| 4016 | ret_val = put_user(cnow.frame, &p_cuser->frame); | ||
| 4017 | if (ret_val) | ||
| 4018 | break; | ||
| 4019 | ret_val = put_user(cnow.overrun, &p_cuser->overrun); | ||
| 4020 | if (ret_val) | ||
| 4021 | break; | ||
| 4022 | ret_val = put_user(cnow.parity, &p_cuser->parity); | ||
| 4023 | if (ret_val) | ||
| 4024 | break; | ||
| 4025 | ret_val = put_user(cnow.brk, &p_cuser->brk); | ||
| 4026 | if (ret_val) | ||
| 4027 | break; | ||
| 4028 | ret_val = put_user(cnow.buf_overrun, &p_cuser->buf_overrun); | ||
| 4029 | if (ret_val) | ||
| 4030 | break; | ||
| 4031 | ret_val = 0; | ||
| 4032 | break; | 2822 | break; |
| 2823 | } | ||
| 4033 | default: | 2824 | default: |
| 4034 | ret_val = -ENOIOCTLCMD; | 2825 | ret_val = -ENOIOCTLCMD; |
| 4035 | } | 2826 | } |
| @@ -4055,7 +2846,7 @@ static void cy_set_termios(struct tty_struct *tty, struct ktermios *old_termios) | |||
| 4055 | printk(KERN_DEBUG "cyc:cy_set_termios ttyC%d\n", info->line); | 2846 | printk(KERN_DEBUG "cyc:cy_set_termios ttyC%d\n", info->line); |
| 4056 | #endif | 2847 | #endif |
| 4057 | 2848 | ||
| 4058 | set_line_char(info); | 2849 | cy_set_line_char(info, tty); |
| 4059 | 2850 | ||
| 4060 | if ((old_termios->c_cflag & CRTSCTS) && | 2851 | if ((old_termios->c_cflag & CRTSCTS) && |
| 4061 | !(tty->termios->c_cflag & CRTSCTS)) { | 2852 | !(tty->termios->c_cflag & CRTSCTS)) { |
| @@ -4112,8 +2903,6 @@ static void cy_throttle(struct tty_struct *tty) | |||
| 4112 | struct cyclades_port *info = tty->driver_data; | 2903 | struct cyclades_port *info = tty->driver_data; |
| 4113 | struct cyclades_card *card; | 2904 | struct cyclades_card *card; |
| 4114 | unsigned long flags; | 2905 | unsigned long flags; |
| 4115 | void __iomem *base_addr; | ||
| 4116 | int chip, channel, index; | ||
| 4117 | 2906 | ||
| 4118 | #ifdef CY_DEBUG_THROTTLE | 2907 | #ifdef CY_DEBUG_THROTTLE |
| 4119 | char buf[64]; | 2908 | char buf[64]; |
| @@ -4135,24 +2924,9 @@ static void cy_throttle(struct tty_struct *tty) | |||
| 4135 | } | 2924 | } |
| 4136 | 2925 | ||
| 4137 | if (tty->termios->c_cflag & CRTSCTS) { | 2926 | if (tty->termios->c_cflag & CRTSCTS) { |
| 4138 | channel = info->line - card->first_line; | ||
| 4139 | if (!cy_is_Z(card)) { | 2927 | if (!cy_is_Z(card)) { |
| 4140 | chip = channel >> 2; | ||
| 4141 | channel &= 0x03; | ||
| 4142 | index = card->bus_index; | ||
| 4143 | base_addr = card->base_addr + | ||
| 4144 | (cy_chip_offset[chip] << index); | ||
| 4145 | |||
| 4146 | spin_lock_irqsave(&card->card_lock, flags); | 2928 | spin_lock_irqsave(&card->card_lock, flags); |
| 4147 | cy_writeb(base_addr + (CyCAR << index), | 2929 | cyy_change_rts_dtr(info, 0, TIOCM_RTS); |
| 4148 | (u_char) channel); | ||
| 4149 | if (info->rtsdtr_inv) { | ||
| 4150 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 4151 | ~CyDTR); | ||
| 4152 | } else { | ||
| 4153 | cy_writeb(base_addr + (CyMSVR1 << index), | ||
| 4154 | ~CyRTS); | ||
| 4155 | } | ||
| 4156 | spin_unlock_irqrestore(&card->card_lock, flags); | 2930 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 4157 | } else { | 2931 | } else { |
| 4158 | info->throttle = 1; | 2932 | info->throttle = 1; |
| @@ -4170,8 +2944,6 @@ static void cy_unthrottle(struct tty_struct *tty) | |||
| 4170 | struct cyclades_port *info = tty->driver_data; | 2944 | struct cyclades_port *info = tty->driver_data; |
| 4171 | struct cyclades_card *card; | 2945 | struct cyclades_card *card; |
| 4172 | unsigned long flags; | 2946 | unsigned long flags; |
| 4173 | void __iomem *base_addr; | ||
| 4174 | int chip, channel, index; | ||
| 4175 | 2947 | ||
| 4176 | #ifdef CY_DEBUG_THROTTLE | 2948 | #ifdef CY_DEBUG_THROTTLE |
| 4177 | char buf[64]; | 2949 | char buf[64]; |
| @@ -4192,24 +2964,9 @@ static void cy_unthrottle(struct tty_struct *tty) | |||
| 4192 | 2964 | ||
| 4193 | if (tty->termios->c_cflag & CRTSCTS) { | 2965 | if (tty->termios->c_cflag & CRTSCTS) { |
| 4194 | card = info->card; | 2966 | card = info->card; |
| 4195 | channel = info->line - card->first_line; | ||
| 4196 | if (!cy_is_Z(card)) { | 2967 | if (!cy_is_Z(card)) { |
| 4197 | chip = channel >> 2; | ||
| 4198 | channel &= 0x03; | ||
| 4199 | index = card->bus_index; | ||
| 4200 | base_addr = card->base_addr + | ||
| 4201 | (cy_chip_offset[chip] << index); | ||
| 4202 | |||
| 4203 | spin_lock_irqsave(&card->card_lock, flags); | 2968 | spin_lock_irqsave(&card->card_lock, flags); |
| 4204 | cy_writeb(base_addr + (CyCAR << index), | 2969 | cyy_change_rts_dtr(info, TIOCM_RTS, 0); |
| 4205 | (u_char) channel); | ||
| 4206 | if (info->rtsdtr_inv) { | ||
| 4207 | cy_writeb(base_addr + (CyMSVR2 << index), | ||
| 4208 | CyDTR); | ||
| 4209 | } else { | ||
| 4210 | cy_writeb(base_addr + (CyMSVR1 << index), | ||
| 4211 | CyRTS); | ||
| 4212 | } | ||
| 4213 | spin_unlock_irqrestore(&card->card_lock, flags); | 2970 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 4214 | } else { | 2971 | } else { |
| 4215 | info->throttle = 0; | 2972 | info->throttle = 0; |
| @@ -4224,8 +2981,7 @@ static void cy_stop(struct tty_struct *tty) | |||
| 4224 | { | 2981 | { |
| 4225 | struct cyclades_card *cinfo; | 2982 | struct cyclades_card *cinfo; |
| 4226 | struct cyclades_port *info = tty->driver_data; | 2983 | struct cyclades_port *info = tty->driver_data; |
| 4227 | void __iomem *base_addr; | 2984 | int channel; |
| 4228 | int chip, channel, index; | ||
| 4229 | unsigned long flags; | 2985 | unsigned long flags; |
| 4230 | 2986 | ||
| 4231 | #ifdef CY_DEBUG_OTHER | 2987 | #ifdef CY_DEBUG_OTHER |
| @@ -4238,16 +2994,9 @@ static void cy_stop(struct tty_struct *tty) | |||
| 4238 | cinfo = info->card; | 2994 | cinfo = info->card; |
| 4239 | channel = info->line - cinfo->first_line; | 2995 | channel = info->line - cinfo->first_line; |
| 4240 | if (!cy_is_Z(cinfo)) { | 2996 | if (!cy_is_Z(cinfo)) { |
| 4241 | index = cinfo->bus_index; | ||
| 4242 | chip = channel >> 2; | ||
| 4243 | channel &= 0x03; | ||
| 4244 | base_addr = cinfo->base_addr + (cy_chip_offset[chip] << index); | ||
| 4245 | |||
| 4246 | spin_lock_irqsave(&cinfo->card_lock, flags); | 2997 | spin_lock_irqsave(&cinfo->card_lock, flags); |
| 4247 | cy_writeb(base_addr + (CyCAR << index), | 2998 | cyy_writeb(info, CyCAR, channel & 0x03); |
| 4248 | (u_char)(channel & 0x0003)); /* index channel */ | 2999 | cyy_writeb(info, CySRER, cyy_readb(info, CySRER) & ~CyTxRdy); |
| 4249 | cy_writeb(base_addr + (CySRER << index), | ||
| 4250 | readb(base_addr + (CySRER << index)) & ~CyTxRdy); | ||
| 4251 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | 3000 | spin_unlock_irqrestore(&cinfo->card_lock, flags); |
| 4252 | } | 3001 | } |
| 4253 | } /* cy_stop */ | 3002 | } /* cy_stop */ |
| @@ -4256,8 +3005,7 @@ static void cy_start(struct tty_struct *tty) | |||
| 4256 | { | 3005 | { |
| 4257 | struct cyclades_card *cinfo; | 3006 | struct cyclades_card *cinfo; |
| 4258 | struct cyclades_port *info = tty->driver_data; | 3007 | struct cyclades_port *info = tty->driver_data; |
| 4259 | void __iomem *base_addr; | 3008 | int channel; |
| 4260 | int chip, channel, index; | ||
| 4261 | unsigned long flags; | 3009 | unsigned long flags; |
| 4262 | 3010 | ||
| 4263 | #ifdef CY_DEBUG_OTHER | 3011 | #ifdef CY_DEBUG_OTHER |
| @@ -4269,17 +3017,10 @@ static void cy_start(struct tty_struct *tty) | |||
| 4269 | 3017 | ||
| 4270 | cinfo = info->card; | 3018 | cinfo = info->card; |
| 4271 | channel = info->line - cinfo->first_line; | 3019 | channel = info->line - cinfo->first_line; |
| 4272 | index = cinfo->bus_index; | ||
| 4273 | if (!cy_is_Z(cinfo)) { | 3020 | if (!cy_is_Z(cinfo)) { |
| 4274 | chip = channel >> 2; | ||
| 4275 | channel &= 0x03; | ||
| 4276 | base_addr = cinfo->base_addr + (cy_chip_offset[chip] << index); | ||
| 4277 | |||
| 4278 | spin_lock_irqsave(&cinfo->card_lock, flags); | 3021 | spin_lock_irqsave(&cinfo->card_lock, flags); |
| 4279 | cy_writeb(base_addr + (CyCAR << index), | 3022 | cyy_writeb(info, CyCAR, channel & 0x03); |
| 4280 | (u_char) (channel & 0x0003)); /* index channel */ | 3023 | cyy_writeb(info, CySRER, cyy_readb(info, CySRER) | CyTxRdy); |
| 4281 | cy_writeb(base_addr + (CySRER << index), | ||
| 4282 | readb(base_addr + (CySRER << index)) | CyTxRdy); | ||
| 4283 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | 3024 | spin_unlock_irqrestore(&cinfo->card_lock, flags); |
| 4284 | } | 3025 | } |
| 4285 | } /* cy_start */ | 3026 | } /* cy_start */ |
| @@ -4299,17 +3040,84 @@ static void cy_hangup(struct tty_struct *tty) | |||
| 4299 | return; | 3040 | return; |
| 4300 | 3041 | ||
| 4301 | cy_flush_buffer(tty); | 3042 | cy_flush_buffer(tty); |
| 4302 | shutdown(info); | 3043 | cy_shutdown(info, tty); |
| 4303 | info->port.count = 0; | 3044 | tty_port_hangup(&info->port); |
| 4304 | #ifdef CY_DEBUG_COUNT | ||
| 4305 | printk(KERN_DEBUG "cyc:cy_hangup (%d): setting count to 0\n", | ||
| 4306 | current->pid); | ||
| 4307 | #endif | ||
| 4308 | info->port.tty = NULL; | ||
| 4309 | info->port.flags &= ~ASYNC_NORMAL_ACTIVE; | ||
| 4310 | wake_up_interruptible(&info->port.open_wait); | ||
| 4311 | } /* cy_hangup */ | 3045 | } /* cy_hangup */ |
| 4312 | 3046 | ||
| 3047 | static int cyy_carrier_raised(struct tty_port *port) | ||
| 3048 | { | ||
| 3049 | struct cyclades_port *info = container_of(port, struct cyclades_port, | ||
| 3050 | port); | ||
| 3051 | struct cyclades_card *cinfo = info->card; | ||
| 3052 | unsigned long flags; | ||
| 3053 | int channel = info->line - cinfo->first_line; | ||
| 3054 | u32 cd; | ||
| 3055 | |||
| 3056 | spin_lock_irqsave(&cinfo->card_lock, flags); | ||
| 3057 | cyy_writeb(info, CyCAR, channel & 0x03); | ||
| 3058 | cd = cyy_readb(info, CyMSVR1) & CyDCD; | ||
| 3059 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | ||
| 3060 | |||
| 3061 | return cd; | ||
| 3062 | } | ||
| 3063 | |||
| 3064 | static void cyy_dtr_rts(struct tty_port *port, int raise) | ||
| 3065 | { | ||
| 3066 | struct cyclades_port *info = container_of(port, struct cyclades_port, | ||
| 3067 | port); | ||
| 3068 | struct cyclades_card *cinfo = info->card; | ||
| 3069 | unsigned long flags; | ||
| 3070 | |||
| 3071 | spin_lock_irqsave(&cinfo->card_lock, flags); | ||
| 3072 | cyy_change_rts_dtr(info, raise ? TIOCM_RTS | TIOCM_DTR : 0, | ||
| 3073 | raise ? 0 : TIOCM_RTS | TIOCM_DTR); | ||
| 3074 | spin_unlock_irqrestore(&cinfo->card_lock, flags); | ||
| 3075 | } | ||
| 3076 | |||
| 3077 | static int cyz_carrier_raised(struct tty_port *port) | ||
| 3078 | { | ||
| 3079 | struct cyclades_port *info = container_of(port, struct cyclades_port, | ||
| 3080 | port); | ||
| 3081 | |||
| 3082 | return readl(&info->u.cyz.ch_ctrl->rs_status) & C_RS_DCD; | ||
| 3083 | } | ||
| 3084 | |||
| 3085 | static void cyz_dtr_rts(struct tty_port *port, int raise) | ||
| 3086 | { | ||
| 3087 | struct cyclades_port *info = container_of(port, struct cyclades_port, | ||
| 3088 | port); | ||
| 3089 | struct cyclades_card *cinfo = info->card; | ||
| 3090 | struct CH_CTRL __iomem *ch_ctrl = info->u.cyz.ch_ctrl; | ||
| 3091 | int ret, channel = info->line - cinfo->first_line; | ||
| 3092 | u32 rs; | ||
| 3093 | |||
| 3094 | rs = readl(&ch_ctrl->rs_control); | ||
| 3095 | if (raise) | ||
| 3096 | rs |= C_RS_RTS | C_RS_DTR; | ||
| 3097 | else | ||
| 3098 | rs &= ~(C_RS_RTS | C_RS_DTR); | ||
| 3099 | cy_writel(&ch_ctrl->rs_control, rs); | ||
| 3100 | ret = cyz_issue_cmd(cinfo, channel, C_CM_IOCTLM, 0L); | ||
| 3101 | if (ret != 0) | ||
| 3102 | printk(KERN_ERR "%s: retval on ttyC%d was %x\n", | ||
| 3103 | __func__, info->line, ret); | ||
| 3104 | #ifdef CY_DEBUG_DTR | ||
| 3105 | printk(KERN_DEBUG "%s: raising Z DTR\n", __func__); | ||
| 3106 | #endif | ||
| 3107 | } | ||
| 3108 | |||
| 3109 | static const struct tty_port_operations cyy_port_ops = { | ||
| 3110 | .carrier_raised = cyy_carrier_raised, | ||
| 3111 | .dtr_rts = cyy_dtr_rts, | ||
| 3112 | .shutdown = cy_do_close, | ||
| 3113 | }; | ||
| 3114 | |||
| 3115 | static const struct tty_port_operations cyz_port_ops = { | ||
| 3116 | .carrier_raised = cyz_carrier_raised, | ||
| 3117 | .dtr_rts = cyz_dtr_rts, | ||
| 3118 | .shutdown = cy_do_close, | ||
| 3119 | }; | ||
| 3120 | |||
| 4313 | /* | 3121 | /* |
| 4314 | * --------------------------------------------------------------------- | 3122 | * --------------------------------------------------------------------- |
| 4315 | * cy_init() and friends | 3123 | * cy_init() and friends |
| @@ -4321,8 +3129,7 @@ static void cy_hangup(struct tty_struct *tty) | |||
| 4321 | static int __devinit cy_init_card(struct cyclades_card *cinfo) | 3129 | static int __devinit cy_init_card(struct cyclades_card *cinfo) |
| 4322 | { | 3130 | { |
| 4323 | struct cyclades_port *info; | 3131 | struct cyclades_port *info; |
| 4324 | unsigned int port; | 3132 | unsigned int channel, port; |
| 4325 | unsigned short chip_number; | ||
| 4326 | 3133 | ||
| 4327 | spin_lock_init(&cinfo->card_lock); | 3134 | spin_lock_init(&cinfo->card_lock); |
| 4328 | cinfo->intr_enabled = 0; | 3135 | cinfo->intr_enabled = 0; |
| @@ -4334,9 +3141,9 @@ static int __devinit cy_init_card(struct cyclades_card *cinfo) | |||
| 4334 | return -ENOMEM; | 3141 | return -ENOMEM; |
| 4335 | } | 3142 | } |
| 4336 | 3143 | ||
| 4337 | for (port = cinfo->first_line; port < cinfo->first_line + cinfo->nports; | 3144 | for (channel = 0, port = cinfo->first_line; channel < cinfo->nports; |
| 4338 | port++) { | 3145 | channel++, port++) { |
| 4339 | info = &cinfo->ports[port - cinfo->first_line]; | 3146 | info = &cinfo->ports[channel]; |
| 4340 | tty_port_init(&info->port); | 3147 | tty_port_init(&info->port); |
| 4341 | info->magic = CYCLADES_MAGIC; | 3148 | info->magic = CYCLADES_MAGIC; |
| 4342 | info->card = cinfo; | 3149 | info->card = cinfo; |
| @@ -4346,10 +3153,19 @@ static int __devinit cy_init_card(struct cyclades_card *cinfo) | |||
| 4346 | info->port.close_delay = 5 * HZ / 10; | 3153 | info->port.close_delay = 5 * HZ / 10; |
| 4347 | info->port.flags = STD_COM_FLAGS; | 3154 | info->port.flags = STD_COM_FLAGS; |
| 4348 | init_completion(&info->shutdown_wait); | 3155 | init_completion(&info->shutdown_wait); |
| 4349 | init_waitqueue_head(&info->delta_msr_wait); | ||
| 4350 | 3156 | ||
| 4351 | if (cy_is_Z(cinfo)) { | 3157 | if (cy_is_Z(cinfo)) { |
| 3158 | struct FIRM_ID *firm_id = cinfo->base_addr + ID_ADDRESS; | ||
| 3159 | struct ZFW_CTRL *zfw_ctrl; | ||
| 3160 | |||
| 3161 | info->port.ops = &cyz_port_ops; | ||
| 4352 | info->type = PORT_STARTECH; | 3162 | info->type = PORT_STARTECH; |
| 3163 | |||
| 3164 | zfw_ctrl = cinfo->base_addr + | ||
| 3165 | (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 3166 | info->u.cyz.ch_ctrl = &zfw_ctrl->ch_ctrl[channel]; | ||
| 3167 | info->u.cyz.buf_ctrl = &zfw_ctrl->buf_ctrl[channel]; | ||
| 3168 | |||
| 4353 | if (cinfo->hw_ver == ZO_V1) | 3169 | if (cinfo->hw_ver == ZO_V1) |
| 4354 | info->xmit_fifo_size = CYZ_FIFO_SIZE; | 3170 | info->xmit_fifo_size = CYZ_FIFO_SIZE; |
| 4355 | else | 3171 | else |
| @@ -4359,17 +3175,20 @@ static int __devinit cy_init_card(struct cyclades_card *cinfo) | |||
| 4359 | cyz_rx_restart, (unsigned long)info); | 3175 | cyz_rx_restart, (unsigned long)info); |
| 4360 | #endif | 3176 | #endif |
| 4361 | } else { | 3177 | } else { |
| 3178 | unsigned short chip_number; | ||
| 4362 | int index = cinfo->bus_index; | 3179 | int index = cinfo->bus_index; |
| 3180 | |||
| 3181 | info->port.ops = &cyy_port_ops; | ||
| 4363 | info->type = PORT_CIRRUS; | 3182 | info->type = PORT_CIRRUS; |
| 4364 | info->xmit_fifo_size = CyMAX_CHAR_FIFO; | 3183 | info->xmit_fifo_size = CyMAX_CHAR_FIFO; |
| 4365 | info->cor1 = CyPARITY_NONE | Cy_1_STOP | Cy_8_BITS; | 3184 | info->cor1 = CyPARITY_NONE | Cy_1_STOP | Cy_8_BITS; |
| 4366 | info->cor2 = CyETC; | 3185 | info->cor2 = CyETC; |
| 4367 | info->cor3 = 0x08; /* _very_ small rcv threshold */ | 3186 | info->cor3 = 0x08; /* _very_ small rcv threshold */ |
| 4368 | 3187 | ||
| 4369 | chip_number = (port - cinfo->first_line) / 4; | 3188 | chip_number = channel / CyPORTS_PER_CHIP; |
| 4370 | info->chip_rev = readb(cinfo->base_addr + | 3189 | info->u.cyy.base_addr = cinfo->base_addr + |
| 4371 | (cy_chip_offset[chip_number] << index) + | 3190 | (cy_chip_offset[chip_number] << index); |
| 4372 | (CyGFRCR << index)); | 3191 | info->chip_rev = cyy_readb(info, CyGFRCR); |
| 4373 | 3192 | ||
| 4374 | if (info->chip_rev >= CD1400_REV_J) { | 3193 | if (info->chip_rev >= CD1400_REV_J) { |
| 4375 | /* It is a CD1400 rev. J or later */ | 3194 | /* It is a CD1400 rev. J or later */ |
| @@ -5060,8 +3879,14 @@ static int __devinit cy_pci_probe(struct pci_dev *pdev, | |||
| 5060 | } | 3879 | } |
| 5061 | cy_card[card_no].num_chips = nchan / CyPORTS_PER_CHIP; | 3880 | cy_card[card_no].num_chips = nchan / CyPORTS_PER_CHIP; |
| 5062 | } else { | 3881 | } else { |
| 3882 | struct FIRM_ID __iomem *firm_id = addr2 + ID_ADDRESS; | ||
| 3883 | struct ZFW_CTRL __iomem *zfw_ctrl; | ||
| 3884 | |||
| 3885 | zfw_ctrl = addr2 + (readl(&firm_id->zfwctrl_addr) & 0xfffff); | ||
| 3886 | |||
| 5063 | cy_card[card_no].hw_ver = mailbox; | 3887 | cy_card[card_no].hw_ver = mailbox; |
| 5064 | cy_card[card_no].num_chips = (unsigned int)-1; | 3888 | cy_card[card_no].num_chips = (unsigned int)-1; |
| 3889 | cy_card[card_no].board_ctrl = &zfw_ctrl->board_ctrl; | ||
| 5065 | #ifdef CONFIG_CYZ_INTR | 3890 | #ifdef CONFIG_CYZ_INTR |
| 5066 | /* allocate IRQ only if board has an IRQ */ | 3891 | /* allocate IRQ only if board has an IRQ */ |
| 5067 | if (irq != 0 && irq != 255) { | 3892 | if (irq != 0 && irq != 255) { |
| @@ -5191,18 +4016,30 @@ static int cyclades_proc_show(struct seq_file *m, void *v) | |||
| 5191 | for (j = 0; j < cy_card[i].nports; j++) { | 4016 | for (j = 0; j < cy_card[i].nports; j++) { |
| 5192 | info = &cy_card[i].ports[j]; | 4017 | info = &cy_card[i].ports[j]; |
| 5193 | 4018 | ||
| 5194 | if (info->port.count) | 4019 | if (info->port.count) { |
| 4020 | /* XXX is the ldisc num worth this? */ | ||
| 4021 | struct tty_struct *tty; | ||
| 4022 | struct tty_ldisc *ld; | ||
| 4023 | int num = 0; | ||
| 4024 | tty = tty_port_tty_get(&info->port); | ||
| 4025 | if (tty) { | ||
| 4026 | ld = tty_ldisc_ref(tty); | ||
| 4027 | if (ld) { | ||
| 4028 | num = ld->ops->num; | ||
| 4029 | tty_ldisc_deref(ld); | ||
| 4030 | } | ||
| 4031 | tty_kref_put(tty); | ||
| 4032 | } | ||
| 5195 | seq_printf(m, "%3d %8lu %10lu %8lu " | 4033 | seq_printf(m, "%3d %8lu %10lu %8lu " |
| 5196 | "%10lu %8lu %9lu %6ld\n", info->line, | 4034 | "%10lu %8lu %9lu %6d\n", info->line, |
| 5197 | (cur_jifs - info->idle_stats.in_use) / | 4035 | (cur_jifs - info->idle_stats.in_use) / |
| 5198 | HZ, info->idle_stats.xmit_bytes, | 4036 | HZ, info->idle_stats.xmit_bytes, |
| 5199 | (cur_jifs - info->idle_stats.xmit_idle)/ | 4037 | (cur_jifs - info->idle_stats.xmit_idle)/ |
| 5200 | HZ, info->idle_stats.recv_bytes, | 4038 | HZ, info->idle_stats.recv_bytes, |
| 5201 | (cur_jifs - info->idle_stats.recv_idle)/ | 4039 | (cur_jifs - info->idle_stats.recv_idle)/ |
| 5202 | HZ, info->idle_stats.overruns, | 4040 | HZ, info->idle_stats.overruns, |
| 5203 | /* FIXME: double check locking */ | 4041 | num); |
| 5204 | (long)info->port.tty->ldisc->ops->num); | 4042 | } else |
| 5205 | else | ||
| 5206 | seq_printf(m, "%3d %8lu %10lu %8lu " | 4043 | seq_printf(m, "%3d %8lu %10lu %8lu " |
| 5207 | "%10lu %8lu %9lu %6ld\n", | 4044 | "%10lu %8lu %9lu %6ld\n", |
| 5208 | info->line, 0L, 0L, 0L, 0L, 0L, 0L, 0L); | 4045 | info->line, 0L, 0L, 0L, 0L, 0L, 0L, 0L); |
diff --git a/drivers/char/esp.c b/drivers/char/esp.c index a5c59fc2b0ff..b19d43cd9542 100644 --- a/drivers/char/esp.c +++ b/drivers/char/esp.c | |||
| @@ -572,7 +572,7 @@ static void check_modem_status(struct esp_struct *info) | |||
| 572 | info->icount.dcd++; | 572 | info->icount.dcd++; |
| 573 | if (status & UART_MSR_DCTS) | 573 | if (status & UART_MSR_DCTS) |
| 574 | info->icount.cts++; | 574 | info->icount.cts++; |
| 575 | wake_up_interruptible(&info->delta_msr_wait); | 575 | wake_up_interruptible(&info->port.delta_msr_wait); |
| 576 | } | 576 | } |
| 577 | 577 | ||
| 578 | if ((info->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { | 578 | if ((info->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
| @@ -927,7 +927,7 @@ static void shutdown(struct esp_struct *info) | |||
| 927 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | 927 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq |
| 928 | * here so the queue might never be waken up | 928 | * here so the queue might never be waken up |
| 929 | */ | 929 | */ |
| 930 | wake_up_interruptible(&info->delta_msr_wait); | 930 | wake_up_interruptible(&info->port.delta_msr_wait); |
| 931 | wake_up_interruptible(&info->break_wait); | 931 | wake_up_interruptible(&info->break_wait); |
| 932 | 932 | ||
| 933 | /* stop a DMA transfer on the port being closed */ | 933 | /* stop a DMA transfer on the port being closed */ |
| @@ -1800,7 +1800,7 @@ static int rs_ioctl(struct tty_struct *tty, struct file *file, | |||
| 1800 | spin_unlock_irqrestore(&info->lock, flags); | 1800 | spin_unlock_irqrestore(&info->lock, flags); |
| 1801 | while (1) { | 1801 | while (1) { |
| 1802 | /* FIXME: convert to new style wakeup */ | 1802 | /* FIXME: convert to new style wakeup */ |
| 1803 | interruptible_sleep_on(&info->delta_msr_wait); | 1803 | interruptible_sleep_on(&info->port.delta_msr_wait); |
| 1804 | /* see if a signal did it */ | 1804 | /* see if a signal did it */ |
| 1805 | if (signal_pending(current)) | 1805 | if (signal_pending(current)) |
| 1806 | return -ERESTARTSYS; | 1806 | return -ERESTARTSYS; |
| @@ -2452,7 +2452,6 @@ static int __init espserial_init(void) | |||
| 2452 | info->config.flow_off = flow_off; | 2452 | info->config.flow_off = flow_off; |
| 2453 | info->config.pio_threshold = pio_threshold; | 2453 | info->config.pio_threshold = pio_threshold; |
| 2454 | info->next_port = ports; | 2454 | info->next_port = ports; |
| 2455 | init_waitqueue_head(&info->delta_msr_wait); | ||
| 2456 | init_waitqueue_head(&info->break_wait); | 2455 | init_waitqueue_head(&info->break_wait); |
| 2457 | ports = info; | 2456 | ports = info; |
| 2458 | printk(KERN_INFO "ttyP%d at 0x%04x (irq = %d) is an ESP ", | 2457 | printk(KERN_INFO "ttyP%d at 0x%04x (irq = %d) is an ESP ", |
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c index fc93e2fc7c71..1573aebd54b5 100644 --- a/drivers/char/hw_random/core.c +++ b/drivers/char/hw_random/core.c | |||
| @@ -153,7 +153,7 @@ static const struct file_operations rng_chrdev_ops = { | |||
| 153 | static struct miscdevice rng_miscdev = { | 153 | static struct miscdevice rng_miscdev = { |
| 154 | .minor = RNG_MISCDEV_MINOR, | 154 | .minor = RNG_MISCDEV_MINOR, |
| 155 | .name = RNG_MODULE_NAME, | 155 | .name = RNG_MODULE_NAME, |
| 156 | .devnode = "hwrng", | 156 | .nodename = "hwrng", |
| 157 | .fops = &rng_chrdev_ops, | 157 | .fops = &rng_chrdev_ops, |
| 158 | }; | 158 | }; |
| 159 | 159 | ||
diff --git a/drivers/char/isicom.c b/drivers/char/isicom.c index 4f1f4cd670da..426bfdd7f3e0 100644 --- a/drivers/char/isicom.c +++ b/drivers/char/isicom.c | |||
| @@ -846,37 +846,53 @@ static int isicom_carrier_raised(struct tty_port *port) | |||
| 846 | return (ip->status & ISI_DCD)?1 : 0; | 846 | return (ip->status & ISI_DCD)?1 : 0; |
| 847 | } | 847 | } |
| 848 | 848 | ||
| 849 | static int isicom_open(struct tty_struct *tty, struct file *filp) | 849 | static struct tty_port *isicom_find_port(struct tty_struct *tty) |
| 850 | { | 850 | { |
| 851 | struct isi_port *port; | 851 | struct isi_port *port; |
| 852 | struct isi_board *card; | 852 | struct isi_board *card; |
| 853 | unsigned int board; | 853 | unsigned int board; |
| 854 | int error, line; | 854 | int line = tty->index; |
| 855 | 855 | ||
| 856 | line = tty->index; | ||
| 857 | if (line < 0 || line > PORT_COUNT-1) | 856 | if (line < 0 || line > PORT_COUNT-1) |
| 858 | return -ENODEV; | 857 | return NULL; |
| 859 | board = BOARD(line); | 858 | board = BOARD(line); |
| 860 | card = &isi_card[board]; | 859 | card = &isi_card[board]; |
| 861 | 860 | ||
| 862 | if (!(card->status & FIRMWARE_LOADED)) | 861 | if (!(card->status & FIRMWARE_LOADED)) |
| 863 | return -ENODEV; | 862 | return NULL; |
| 864 | 863 | ||
| 865 | /* open on a port greater than the port count for the card !!! */ | 864 | /* open on a port greater than the port count for the card !!! */ |
| 866 | if (line > ((board * 16) + card->port_count - 1)) | 865 | if (line > ((board * 16) + card->port_count - 1)) |
| 867 | return -ENODEV; | 866 | return NULL; |
| 868 | 867 | ||
| 869 | port = &isi_ports[line]; | 868 | port = &isi_ports[line]; |
| 870 | if (isicom_paranoia_check(port, tty->name, "isicom_open")) | 869 | if (isicom_paranoia_check(port, tty->name, "isicom_open")) |
| 871 | return -ENODEV; | 870 | return NULL; |
| 872 | 871 | ||
| 872 | return &port->port; | ||
| 873 | } | ||
| 874 | |||
| 875 | static int isicom_open(struct tty_struct *tty, struct file *filp) | ||
| 876 | { | ||
| 877 | struct isi_port *port; | ||
| 878 | struct isi_board *card; | ||
| 879 | struct tty_port *tport; | ||
| 880 | int error = 0; | ||
| 881 | |||
| 882 | tport = isicom_find_port(tty); | ||
| 883 | if (tport == NULL) | ||
| 884 | return -ENODEV; | ||
| 885 | port = container_of(tport, struct isi_port, port); | ||
| 886 | card = &isi_card[BOARD(tty->index)]; | ||
| 873 | isicom_setup_board(card); | 887 | isicom_setup_board(card); |
| 874 | 888 | ||
| 875 | /* FIXME: locking on port.count etc */ | 889 | /* FIXME: locking on port.count etc */ |
| 876 | port->port.count++; | 890 | port->port.count++; |
| 877 | tty->driver_data = port; | 891 | tty->driver_data = port; |
| 878 | tty_port_tty_set(&port->port, tty); | 892 | tty_port_tty_set(&port->port, tty); |
| 879 | error = isicom_setup_port(tty); | 893 | /* FIXME: Locking on Initialized flag */ |
| 894 | if (!test_bit(ASYNCB_INITIALIZED, &tport->flags)) | ||
| 895 | error = isicom_setup_port(tty); | ||
| 880 | if (error == 0) | 896 | if (error == 0) |
| 881 | error = tty_port_block_til_ready(&port->port, tty, filp); | 897 | error = tty_port_block_til_ready(&port->port, tty, filp); |
| 882 | return error; | 898 | return error; |
| @@ -952,19 +968,12 @@ static void isicom_flush_buffer(struct tty_struct *tty) | |||
| 952 | tty_wakeup(tty); | 968 | tty_wakeup(tty); |
| 953 | } | 969 | } |
| 954 | 970 | ||
| 955 | static void isicom_close(struct tty_struct *tty, struct file *filp) | 971 | static void isicom_close_port(struct tty_port *port) |
| 956 | { | 972 | { |
| 957 | struct isi_port *ip = tty->driver_data; | 973 | struct isi_port *ip = container_of(port, struct isi_port, port); |
| 958 | struct tty_port *port = &ip->port; | 974 | struct isi_board *card = ip->card; |
| 959 | struct isi_board *card; | ||
| 960 | unsigned long flags; | 975 | unsigned long flags; |
| 961 | 976 | ||
| 962 | BUG_ON(!ip); | ||
| 963 | |||
| 964 | card = ip->card; | ||
| 965 | if (isicom_paranoia_check(ip, tty->name, "isicom_close")) | ||
| 966 | return; | ||
| 967 | |||
| 968 | /* indicate to the card that no more data can be received | 977 | /* indicate to the card that no more data can be received |
| 969 | on this port */ | 978 | on this port */ |
| 970 | spin_lock_irqsave(&card->card_lock, flags); | 979 | spin_lock_irqsave(&card->card_lock, flags); |
| @@ -974,9 +983,19 @@ static void isicom_close(struct tty_struct *tty, struct file *filp) | |||
| 974 | } | 983 | } |
| 975 | isicom_shutdown_port(ip); | 984 | isicom_shutdown_port(ip); |
| 976 | spin_unlock_irqrestore(&card->card_lock, flags); | 985 | spin_unlock_irqrestore(&card->card_lock, flags); |
| 986 | } | ||
| 987 | |||
| 988 | static void isicom_close(struct tty_struct *tty, struct file *filp) | ||
| 989 | { | ||
| 990 | struct isi_port *ip = tty->driver_data; | ||
| 991 | struct tty_port *port = &ip->port; | ||
| 992 | if (isicom_paranoia_check(ip, tty->name, "isicom_close")) | ||
| 993 | return; | ||
| 977 | 994 | ||
| 995 | if (tty_port_close_start(port, tty, filp) == 0) | ||
| 996 | return; | ||
| 997 | isicom_close_port(port); | ||
| 978 | isicom_flush_buffer(tty); | 998 | isicom_flush_buffer(tty); |
| 979 | |||
| 980 | tty_port_close_end(port, tty); | 999 | tty_port_close_end(port, tty); |
| 981 | } | 1000 | } |
| 982 | 1001 | ||
diff --git a/drivers/char/mbcs.c b/drivers/char/mbcs.c index acd8e9ed474a..87c67b42bc08 100644 --- a/drivers/char/mbcs.c +++ b/drivers/char/mbcs.c | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | #include <linux/moduleparam.h> | 15 | #include <linux/moduleparam.h> |
| 16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
| 17 | #include <linux/ioport.h> | 17 | #include <linux/ioport.h> |
| 18 | #include <linux/kernel.h> | ||
| 18 | #include <linux/notifier.h> | 19 | #include <linux/notifier.h> |
| 19 | #include <linux/reboot.h> | 20 | #include <linux/reboot.h> |
| 20 | #include <linux/init.h> | 21 | #include <linux/init.h> |
| @@ -715,8 +716,8 @@ static ssize_t show_algo(struct device *dev, struct device_attribute *attr, char | |||
| 715 | */ | 716 | */ |
| 716 | debug0 = *(uint64_t *) soft->debug_addr; | 717 | debug0 = *(uint64_t *) soft->debug_addr; |
| 717 | 718 | ||
| 718 | return sprintf(buf, "0x%lx 0x%lx\n", | 719 | return sprintf(buf, "0x%x 0x%x\n", |
| 719 | (debug0 >> 32), (debug0 & 0xffffffff)); | 720 | upper_32_bits(debug0), lower_32_bits(debug0)); |
| 720 | } | 721 | } |
| 721 | 722 | ||
| 722 | static ssize_t store_algo(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) | 723 | static ssize_t store_algo(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) |
diff --git a/drivers/char/mem.c b/drivers/char/mem.c index 0491cdf63f2a..0aede1d6a9ea 100644 --- a/drivers/char/mem.c +++ b/drivers/char/mem.c | |||
| @@ -866,24 +866,25 @@ static const struct file_operations kmsg_fops = { | |||
| 866 | 866 | ||
| 867 | static const struct memdev { | 867 | static const struct memdev { |
| 868 | const char *name; | 868 | const char *name; |
| 869 | mode_t mode; | ||
| 869 | const struct file_operations *fops; | 870 | const struct file_operations *fops; |
| 870 | struct backing_dev_info *dev_info; | 871 | struct backing_dev_info *dev_info; |
| 871 | } devlist[] = { | 872 | } devlist[] = { |
| 872 | [ 1] = { "mem", &mem_fops, &directly_mappable_cdev_bdi }, | 873 | [1] = { "mem", 0, &mem_fops, &directly_mappable_cdev_bdi }, |
| 873 | #ifdef CONFIG_DEVKMEM | 874 | #ifdef CONFIG_DEVKMEM |
| 874 | [ 2] = { "kmem", &kmem_fops, &directly_mappable_cdev_bdi }, | 875 | [2] = { "kmem", 0, &kmem_fops, &directly_mappable_cdev_bdi }, |
| 875 | #endif | 876 | #endif |
| 876 | [ 3] = {"null", &null_fops, NULL }, | 877 | [3] = { "null", 0666, &null_fops, NULL }, |
| 877 | #ifdef CONFIG_DEVPORT | 878 | #ifdef CONFIG_DEVPORT |
| 878 | [ 4] = { "port", &port_fops, NULL }, | 879 | [4] = { "port", 0, &port_fops, NULL }, |
| 879 | #endif | 880 | #endif |
| 880 | [ 5] = { "zero", &zero_fops, &zero_bdi }, | 881 | [5] = { "zero", 0666, &zero_fops, &zero_bdi }, |
| 881 | [ 7] = { "full", &full_fops, NULL }, | 882 | [7] = { "full", 0666, &full_fops, NULL }, |
| 882 | [ 8] = { "random", &random_fops, NULL }, | 883 | [8] = { "random", 0666, &random_fops, NULL }, |
| 883 | [ 9] = { "urandom", &urandom_fops, NULL }, | 884 | [9] = { "urandom", 0666, &urandom_fops, NULL }, |
| 884 | [11] = { "kmsg", &kmsg_fops, NULL }, | 885 | [11] = { "kmsg", 0, &kmsg_fops, NULL }, |
| 885 | #ifdef CONFIG_CRASH_DUMP | 886 | #ifdef CONFIG_CRASH_DUMP |
| 886 | [12] = { "oldmem", &oldmem_fops, NULL }, | 887 | [12] = { "oldmem", 0, &oldmem_fops, NULL }, |
| 887 | #endif | 888 | #endif |
| 888 | }; | 889 | }; |
| 889 | 890 | ||
| @@ -920,6 +921,13 @@ static const struct file_operations memory_fops = { | |||
| 920 | .open = memory_open, | 921 | .open = memory_open, |
| 921 | }; | 922 | }; |
| 922 | 923 | ||
| 924 | static char *mem_devnode(struct device *dev, mode_t *mode) | ||
| 925 | { | ||
| 926 | if (mode && devlist[MINOR(dev->devt)].mode) | ||
| 927 | *mode = devlist[MINOR(dev->devt)].mode; | ||
| 928 | return NULL; | ||
| 929 | } | ||
| 930 | |||
| 923 | static struct class *mem_class; | 931 | static struct class *mem_class; |
| 924 | 932 | ||
| 925 | static int __init chr_dev_init(void) | 933 | static int __init chr_dev_init(void) |
| @@ -935,6 +943,7 @@ static int __init chr_dev_init(void) | |||
| 935 | printk("unable to get major %d for memory devs\n", MEM_MAJOR); | 943 | printk("unable to get major %d for memory devs\n", MEM_MAJOR); |
| 936 | 944 | ||
| 937 | mem_class = class_create(THIS_MODULE, "mem"); | 945 | mem_class = class_create(THIS_MODULE, "mem"); |
| 946 | mem_class->devnode = mem_devnode; | ||
| 938 | for (minor = 1; minor < ARRAY_SIZE(devlist); minor++) { | 947 | for (minor = 1; minor < ARRAY_SIZE(devlist); minor++) { |
| 939 | if (!devlist[minor].name) | 948 | if (!devlist[minor].name) |
| 940 | continue; | 949 | continue; |
diff --git a/drivers/char/misc.c b/drivers/char/misc.c index 62c99fa59e2b..1ee27cc23426 100644 --- a/drivers/char/misc.c +++ b/drivers/char/misc.c | |||
| @@ -263,12 +263,14 @@ int misc_deregister(struct miscdevice *misc) | |||
| 263 | EXPORT_SYMBOL(misc_register); | 263 | EXPORT_SYMBOL(misc_register); |
| 264 | EXPORT_SYMBOL(misc_deregister); | 264 | EXPORT_SYMBOL(misc_deregister); |
| 265 | 265 | ||
| 266 | static char *misc_nodename(struct device *dev) | 266 | static char *misc_devnode(struct device *dev, mode_t *mode) |
| 267 | { | 267 | { |
| 268 | struct miscdevice *c = dev_get_drvdata(dev); | 268 | struct miscdevice *c = dev_get_drvdata(dev); |
| 269 | 269 | ||
| 270 | if (c->devnode) | 270 | if (mode && c->mode) |
| 271 | return kstrdup(c->devnode, GFP_KERNEL); | 271 | *mode = c->mode; |
| 272 | if (c->nodename) | ||
| 273 | return kstrdup(c->nodename, GFP_KERNEL); | ||
| 272 | return NULL; | 274 | return NULL; |
| 273 | } | 275 | } |
| 274 | 276 | ||
| @@ -287,7 +289,7 @@ static int __init misc_init(void) | |||
| 287 | err = -EIO; | 289 | err = -EIO; |
| 288 | if (register_chrdev(MISC_MAJOR,"misc",&misc_fops)) | 290 | if (register_chrdev(MISC_MAJOR,"misc",&misc_fops)) |
| 289 | goto fail_printk; | 291 | goto fail_printk; |
| 290 | misc_class->nodename = misc_nodename; | 292 | misc_class->devnode = misc_devnode; |
| 291 | return 0; | 293 | return 0; |
| 292 | 294 | ||
| 293 | fail_printk: | 295 | fail_printk: |
diff --git a/drivers/char/mxser.c b/drivers/char/mxser.c index dbf8d52f31d0..5e28d39b9e81 100644 --- a/drivers/char/mxser.c +++ b/drivers/char/mxser.c | |||
| @@ -48,7 +48,7 @@ | |||
| 48 | 48 | ||
| 49 | #include "mxser.h" | 49 | #include "mxser.h" |
| 50 | 50 | ||
| 51 | #define MXSER_VERSION "2.0.4" /* 1.12 */ | 51 | #define MXSER_VERSION "2.0.5" /* 1.14 */ |
| 52 | #define MXSERMAJOR 174 | 52 | #define MXSERMAJOR 174 |
| 53 | 53 | ||
| 54 | #define MXSER_BOARDS 4 /* Max. boards */ | 54 | #define MXSER_BOARDS 4 /* Max. boards */ |
| @@ -69,6 +69,7 @@ | |||
| 69 | #define PCI_DEVICE_ID_POS104UL 0x1044 | 69 | #define PCI_DEVICE_ID_POS104UL 0x1044 |
| 70 | #define PCI_DEVICE_ID_CB108 0x1080 | 70 | #define PCI_DEVICE_ID_CB108 0x1080 |
| 71 | #define PCI_DEVICE_ID_CP102UF 0x1023 | 71 | #define PCI_DEVICE_ID_CP102UF 0x1023 |
| 72 | #define PCI_DEVICE_ID_CP112UL 0x1120 | ||
| 72 | #define PCI_DEVICE_ID_CB114 0x1142 | 73 | #define PCI_DEVICE_ID_CB114 0x1142 |
| 73 | #define PCI_DEVICE_ID_CP114UL 0x1143 | 74 | #define PCI_DEVICE_ID_CP114UL 0x1143 |
| 74 | #define PCI_DEVICE_ID_CB134I 0x1341 | 75 | #define PCI_DEVICE_ID_CB134I 0x1341 |
| @@ -139,7 +140,8 @@ static const struct mxser_cardinfo mxser_cards[] = { | |||
| 139 | { "CP-138U series", 8, }, | 140 | { "CP-138U series", 8, }, |
| 140 | { "POS-104UL series", 4, }, | 141 | { "POS-104UL series", 4, }, |
| 141 | { "CP-114UL series", 4, }, | 142 | { "CP-114UL series", 4, }, |
| 142 | /*30*/ { "CP-102UF series", 2, } | 143 | /*30*/ { "CP-102UF series", 2, }, |
| 144 | { "CP-112UL series", 2, }, | ||
| 143 | }; | 145 | }; |
| 144 | 146 | ||
| 145 | /* driver_data correspond to the lines in the structure above | 147 | /* driver_data correspond to the lines in the structure above |
| @@ -170,6 +172,7 @@ static struct pci_device_id mxser_pcibrds[] = { | |||
| 170 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, | 172 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, |
| 171 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, | 173 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, |
| 172 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, | 174 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, |
| 175 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, | ||
| 173 | { } | 176 | { } |
| 174 | }; | 177 | }; |
| 175 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); | 178 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
| @@ -258,7 +261,6 @@ struct mxser_port { | |||
| 258 | struct mxser_mon mon_data; | 261 | struct mxser_mon mon_data; |
| 259 | 262 | ||
| 260 | spinlock_t slock; | 263 | spinlock_t slock; |
| 261 | wait_queue_head_t delta_msr_wait; | ||
| 262 | }; | 264 | }; |
| 263 | 265 | ||
| 264 | struct mxser_board { | 266 | struct mxser_board { |
| @@ -818,7 +820,7 @@ static void mxser_check_modem_status(struct tty_struct *tty, | |||
| 818 | if (status & UART_MSR_DCTS) | 820 | if (status & UART_MSR_DCTS) |
| 819 | port->icount.cts++; | 821 | port->icount.cts++; |
| 820 | port->mon_data.modem_status = status; | 822 | port->mon_data.modem_status = status; |
| 821 | wake_up_interruptible(&port->delta_msr_wait); | 823 | wake_up_interruptible(&port->port.delta_msr_wait); |
| 822 | 824 | ||
| 823 | if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { | 825 | if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
| 824 | if (status & UART_MSR_DCD) | 826 | if (status & UART_MSR_DCD) |
| @@ -973,7 +975,7 @@ static void mxser_shutdown(struct tty_struct *tty) | |||
| 973 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | 975 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq |
| 974 | * here so the queue might never be waken up | 976 | * here so the queue might never be waken up |
| 975 | */ | 977 | */ |
| 976 | wake_up_interruptible(&info->delta_msr_wait); | 978 | wake_up_interruptible(&info->port.delta_msr_wait); |
| 977 | 979 | ||
| 978 | /* | 980 | /* |
| 979 | * Free the IRQ, if necessary | 981 | * Free the IRQ, if necessary |
| @@ -1073,34 +1075,17 @@ static void mxser_flush_buffer(struct tty_struct *tty) | |||
| 1073 | } | 1075 | } |
| 1074 | 1076 | ||
| 1075 | 1077 | ||
| 1076 | /* | 1078 | static void mxser_close_port(struct tty_struct *tty, struct tty_port *port) |
| 1077 | * This routine is called when the serial port gets closed. First, we | ||
| 1078 | * wait for the last remaining data to be sent. Then, we unlink its | ||
| 1079 | * async structure from the interrupt chain if necessary, and we free | ||
| 1080 | * that IRQ if nothing is left in the chain. | ||
| 1081 | */ | ||
| 1082 | static void mxser_close(struct tty_struct *tty, struct file *filp) | ||
| 1083 | { | 1079 | { |
| 1084 | struct mxser_port *info = tty->driver_data; | 1080 | struct mxser_port *info = container_of(port, struct mxser_port, port); |
| 1085 | struct tty_port *port = &info->port; | ||
| 1086 | |||
| 1087 | unsigned long timeout; | 1081 | unsigned long timeout; |
| 1088 | |||
| 1089 | if (tty->index == MXSER_PORTS) | ||
| 1090 | return; | ||
| 1091 | if (!info) | ||
| 1092 | return; | ||
| 1093 | |||
| 1094 | if (tty_port_close_start(port, tty, filp) == 0) | ||
| 1095 | return; | ||
| 1096 | |||
| 1097 | /* | 1082 | /* |
| 1098 | * Save the termios structure, since this port may have | 1083 | * Save the termios structure, since this port may have |
| 1099 | * separate termios for callout and dialin. | 1084 | * separate termios for callout and dialin. |
| 1100 | * | 1085 | * |
| 1101 | * FIXME: Can this go ? | 1086 | * FIXME: Can this go ? |
| 1102 | */ | 1087 | */ |
| 1103 | if (info->port.flags & ASYNC_NORMAL_ACTIVE) | 1088 | if (port->flags & ASYNC_NORMAL_ACTIVE) |
| 1104 | info->normal_termios = *tty->termios; | 1089 | info->normal_termios = *tty->termios; |
| 1105 | /* | 1090 | /* |
| 1106 | * At this point we stop accepting input. To do this, we | 1091 | * At this point we stop accepting input. To do this, we |
| @@ -1112,7 +1097,7 @@ static void mxser_close(struct tty_struct *tty, struct file *filp) | |||
| 1112 | if (info->board->chip_flag) | 1097 | if (info->board->chip_flag) |
| 1113 | info->IER &= ~MOXA_MUST_RECV_ISR; | 1098 | info->IER &= ~MOXA_MUST_RECV_ISR; |
| 1114 | 1099 | ||
| 1115 | if (info->port.flags & ASYNC_INITIALIZED) { | 1100 | if (port->flags & ASYNC_INITIALIZED) { |
| 1116 | outb(info->IER, info->ioaddr + UART_IER); | 1101 | outb(info->IER, info->ioaddr + UART_IER); |
| 1117 | /* | 1102 | /* |
| 1118 | * Before we drop DTR, make sure the UART transmitter | 1103 | * Before we drop DTR, make sure the UART transmitter |
| @@ -1127,8 +1112,26 @@ static void mxser_close(struct tty_struct *tty, struct file *filp) | |||
| 1127 | } | 1112 | } |
| 1128 | } | 1113 | } |
| 1129 | mxser_shutdown(tty); | 1114 | mxser_shutdown(tty); |
| 1130 | mxser_flush_buffer(tty); | ||
| 1131 | 1115 | ||
| 1116 | } | ||
| 1117 | |||
| 1118 | /* | ||
| 1119 | * This routine is called when the serial port gets closed. First, we | ||
| 1120 | * wait for the last remaining data to be sent. Then, we unlink its | ||
| 1121 | * async structure from the interrupt chain if necessary, and we free | ||
| 1122 | * that IRQ if nothing is left in the chain. | ||
| 1123 | */ | ||
| 1124 | static void mxser_close(struct tty_struct *tty, struct file *filp) | ||
| 1125 | { | ||
| 1126 | struct mxser_port *info = tty->driver_data; | ||
| 1127 | struct tty_port *port = &info->port; | ||
| 1128 | |||
| 1129 | if (tty->index == MXSER_PORTS) | ||
| 1130 | return; | ||
| 1131 | if (tty_port_close_start(port, tty, filp) == 0) | ||
| 1132 | return; | ||
| 1133 | mxser_close_port(tty, port); | ||
| 1134 | mxser_flush_buffer(tty); | ||
| 1132 | /* Right now the tty_port set is done outside of the close_end helper | 1135 | /* Right now the tty_port set is done outside of the close_end helper |
| 1133 | as we don't yet have everyone using refcounts */ | 1136 | as we don't yet have everyone using refcounts */ |
| 1134 | tty_port_close_end(port, tty); | 1137 | tty_port_close_end(port, tty); |
| @@ -1761,7 +1764,7 @@ static int mxser_ioctl(struct tty_struct *tty, struct file *file, | |||
| 1761 | cnow = info->icount; /* note the counters on entry */ | 1764 | cnow = info->icount; /* note the counters on entry */ |
| 1762 | spin_unlock_irqrestore(&info->slock, flags); | 1765 | spin_unlock_irqrestore(&info->slock, flags); |
| 1763 | 1766 | ||
| 1764 | return wait_event_interruptible(info->delta_msr_wait, | 1767 | return wait_event_interruptible(info->port.delta_msr_wait, |
| 1765 | mxser_cflags_changed(info, arg, &cnow)); | 1768 | mxser_cflags_changed(info, arg, &cnow)); |
| 1766 | /* | 1769 | /* |
| 1767 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | 1770 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) |
| @@ -1803,7 +1806,7 @@ static int mxser_ioctl(struct tty_struct *tty, struct file *file, | |||
| 1803 | 1806 | ||
| 1804 | lock_kernel(); | 1807 | lock_kernel(); |
| 1805 | len = mxser_chars_in_buffer(tty); | 1808 | len = mxser_chars_in_buffer(tty); |
| 1806 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT; | 1809 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; |
| 1807 | len += (lsr ? 0 : 1); | 1810 | len += (lsr ? 0 : 1); |
| 1808 | unlock_kernel(); | 1811 | unlock_kernel(); |
| 1809 | 1812 | ||
| @@ -2413,7 +2416,6 @@ static int __devinit mxser_initbrd(struct mxser_board *brd, | |||
| 2413 | info->port.close_delay = 5 * HZ / 10; | 2416 | info->port.close_delay = 5 * HZ / 10; |
| 2414 | info->port.closing_wait = 30 * HZ; | 2417 | info->port.closing_wait = 30 * HZ; |
| 2415 | info->normal_termios = mxvar_sdriver->init_termios; | 2418 | info->normal_termios = mxvar_sdriver->init_termios; |
| 2416 | init_waitqueue_head(&info->delta_msr_wait); | ||
| 2417 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); | 2419 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); |
| 2418 | info->err_shadow = 0; | 2420 | info->err_shadow = 0; |
| 2419 | spin_lock_init(&info->slock); | 2421 | spin_lock_init(&info->slock); |
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c index 4e28b35024ec..2e50f4dfc79c 100644 --- a/drivers/char/n_tty.c +++ b/drivers/char/n_tty.c | |||
| @@ -272,7 +272,8 @@ static inline int is_continuation(unsigned char c, struct tty_struct *tty) | |||
| 272 | * | 272 | * |
| 273 | * This is a helper function that handles one output character | 273 | * This is a helper function that handles one output character |
| 274 | * (including special characters like TAB, CR, LF, etc.), | 274 | * (including special characters like TAB, CR, LF, etc.), |
| 275 | * putting the results in the tty driver's write buffer. | 275 | * doing OPOST processing and putting the results in the |
| 276 | * tty driver's write buffer. | ||
| 276 | * | 277 | * |
| 277 | * Note that Linux currently ignores TABDLY, CRDLY, VTDLY, FFDLY | 278 | * Note that Linux currently ignores TABDLY, CRDLY, VTDLY, FFDLY |
| 278 | * and NLDLY. They simply aren't relevant in the world today. | 279 | * and NLDLY. They simply aren't relevant in the world today. |
| @@ -350,8 +351,9 @@ static int do_output_char(unsigned char c, struct tty_struct *tty, int space) | |||
| 350 | * @c: character (or partial unicode symbol) | 351 | * @c: character (or partial unicode symbol) |
| 351 | * @tty: terminal device | 352 | * @tty: terminal device |
| 352 | * | 353 | * |
| 353 | * Perform OPOST processing. Returns -1 when the output device is | 354 | * Output one character with OPOST processing. |
| 354 | * full and the character must be retried. | 355 | * Returns -1 when the output device is full and the character |
| 356 | * must be retried. | ||
| 355 | * | 357 | * |
| 356 | * Locking: output_lock to protect column state and space left | 358 | * Locking: output_lock to protect column state and space left |
| 357 | * (also, this is called from n_tty_write under the | 359 | * (also, this is called from n_tty_write under the |
| @@ -377,8 +379,11 @@ static int process_output(unsigned char c, struct tty_struct *tty) | |||
| 377 | /** | 379 | /** |
| 378 | * process_output_block - block post processor | 380 | * process_output_block - block post processor |
| 379 | * @tty: terminal device | 381 | * @tty: terminal device |
| 380 | * @inbuf: user buffer | 382 | * @buf: character buffer |
| 381 | * @nr: number of bytes | 383 | * @nr: number of bytes to output |
| 384 | * | ||
| 385 | * Output a block of characters with OPOST processing. | ||
| 386 | * Returns the number of characters output. | ||
| 382 | * | 387 | * |
| 383 | * This path is used to speed up block console writes, among other | 388 | * This path is used to speed up block console writes, among other |
| 384 | * things when processing blocks of output data. It handles only | 389 | * things when processing blocks of output data. It handles only |
| @@ -571,33 +576,23 @@ static void process_echoes(struct tty_struct *tty) | |||
| 571 | break; | 576 | break; |
| 572 | 577 | ||
| 573 | default: | 578 | default: |
| 574 | if (iscntrl(op)) { | ||
| 575 | if (L_ECHOCTL(tty)) { | ||
| 576 | /* | ||
| 577 | * Ensure there is enough space | ||
| 578 | * for the whole ctrl pair. | ||
| 579 | */ | ||
| 580 | if (space < 2) { | ||
| 581 | no_space_left = 1; | ||
| 582 | break; | ||
| 583 | } | ||
| 584 | tty_put_char(tty, '^'); | ||
| 585 | tty_put_char(tty, op ^ 0100); | ||
| 586 | tty->column += 2; | ||
| 587 | space -= 2; | ||
| 588 | } else { | ||
| 589 | if (!space) { | ||
| 590 | no_space_left = 1; | ||
| 591 | break; | ||
| 592 | } | ||
| 593 | tty_put_char(tty, op); | ||
| 594 | space--; | ||
| 595 | } | ||
| 596 | } | ||
| 597 | /* | 579 | /* |
| 598 | * If above falls through, this was an | 580 | * If the op is not a special byte code, |
| 599 | * undefined op. | 581 | * it is a ctrl char tagged to be echoed |
| 582 | * as "^X" (where X is the letter | ||
| 583 | * representing the control char). | ||
| 584 | * Note that we must ensure there is | ||
| 585 | * enough space for the whole ctrl pair. | ||
| 586 | * | ||
| 600 | */ | 587 | */ |
| 588 | if (space < 2) { | ||
| 589 | no_space_left = 1; | ||
| 590 | break; | ||
| 591 | } | ||
| 592 | tty_put_char(tty, '^'); | ||
| 593 | tty_put_char(tty, op ^ 0100); | ||
| 594 | tty->column += 2; | ||
| 595 | space -= 2; | ||
| 601 | cp += 2; | 596 | cp += 2; |
| 602 | nr -= 2; | 597 | nr -= 2; |
| 603 | } | 598 | } |
| @@ -605,12 +600,18 @@ static void process_echoes(struct tty_struct *tty) | |||
| 605 | if (no_space_left) | 600 | if (no_space_left) |
| 606 | break; | 601 | break; |
| 607 | } else { | 602 | } else { |
| 608 | int retval; | 603 | if (O_OPOST(tty) && |
| 609 | 604 | !(test_bit(TTY_HW_COOK_OUT, &tty->flags))) { | |
| 610 | retval = do_output_char(c, tty, space); | 605 | int retval = do_output_char(c, tty, space); |
| 611 | if (retval < 0) | 606 | if (retval < 0) |
| 612 | break; | 607 | break; |
| 613 | space -= retval; | 608 | space -= retval; |
| 609 | } else { | ||
| 610 | if (!space) | ||
| 611 | break; | ||
| 612 | tty_put_char(tty, c); | ||
| 613 | space -= 1; | ||
| 614 | } | ||
| 614 | cp += 1; | 615 | cp += 1; |
| 615 | nr -= 1; | 616 | nr -= 1; |
| 616 | } | 617 | } |
| @@ -798,8 +799,8 @@ static void echo_char_raw(unsigned char c, struct tty_struct *tty) | |||
| 798 | * Echo user input back onto the screen. This must be called only when | 799 | * Echo user input back onto the screen. This must be called only when |
| 799 | * L_ECHO(tty) is true. Called from the driver receive_buf path. | 800 | * L_ECHO(tty) is true. Called from the driver receive_buf path. |
| 800 | * | 801 | * |
| 801 | * This variant tags control characters to be possibly echoed as | 802 | * This variant tags control characters to be echoed as "^X" |
| 802 | * as "^X" (where X is the letter representing the control char). | 803 | * (where X is the letter representing the control char). |
| 803 | * | 804 | * |
| 804 | * Locking: echo_lock to protect the echo buffer | 805 | * Locking: echo_lock to protect the echo buffer |
| 805 | */ | 806 | */ |
| @@ -812,7 +813,7 @@ static void echo_char(unsigned char c, struct tty_struct *tty) | |||
| 812 | add_echo_byte(ECHO_OP_START, tty); | 813 | add_echo_byte(ECHO_OP_START, tty); |
| 813 | add_echo_byte(ECHO_OP_START, tty); | 814 | add_echo_byte(ECHO_OP_START, tty); |
| 814 | } else { | 815 | } else { |
| 815 | if (iscntrl(c) && c != '\t') | 816 | if (L_ECHOCTL(tty) && iscntrl(c) && c != '\t') |
| 816 | add_echo_byte(ECHO_OP_START, tty); | 817 | add_echo_byte(ECHO_OP_START, tty); |
| 817 | add_echo_byte(c, tty); | 818 | add_echo_byte(c, tty); |
| 818 | } | 819 | } |
diff --git a/drivers/char/raw.c b/drivers/char/raw.c index 40268db02e22..64acd05f71c8 100644 --- a/drivers/char/raw.c +++ b/drivers/char/raw.c | |||
| @@ -261,7 +261,7 @@ static const struct file_operations raw_ctl_fops = { | |||
| 261 | 261 | ||
| 262 | static struct cdev raw_cdev; | 262 | static struct cdev raw_cdev; |
| 263 | 263 | ||
| 264 | static char *raw_nodename(struct device *dev) | 264 | static char *raw_devnode(struct device *dev, mode_t *mode) |
| 265 | { | 265 | { |
| 266 | return kasprintf(GFP_KERNEL, "raw/%s", dev_name(dev)); | 266 | return kasprintf(GFP_KERNEL, "raw/%s", dev_name(dev)); |
| 267 | } | 267 | } |
| @@ -289,7 +289,7 @@ static int __init raw_init(void) | |||
| 289 | ret = PTR_ERR(raw_class); | 289 | ret = PTR_ERR(raw_class); |
| 290 | goto error_region; | 290 | goto error_region; |
| 291 | } | 291 | } |
| 292 | raw_class->nodename = raw_nodename; | 292 | raw_class->devnode = raw_devnode; |
| 293 | device_create(raw_class, NULL, MKDEV(RAW_MAJOR, 0), NULL, "rawctl"); | 293 | device_create(raw_class, NULL, MKDEV(RAW_MAJOR, 0), NULL, "rawctl"); |
| 294 | 294 | ||
| 295 | return 0; | 295 | return 0; |
diff --git a/drivers/char/riscom8.c b/drivers/char/riscom8.c index 171711acf5cd..3cfa22d469e0 100644 --- a/drivers/char/riscom8.c +++ b/drivers/char/riscom8.c | |||
| @@ -343,7 +343,7 @@ static void rc_receive_exc(struct riscom_board const *bp) | |||
| 343 | if (port == NULL) | 343 | if (port == NULL) |
| 344 | return; | 344 | return; |
| 345 | 345 | ||
| 346 | tty = port->port.tty; | 346 | tty = tty_port_tty_get(&port->port); |
| 347 | 347 | ||
| 348 | #ifdef RC_REPORT_OVERRUN | 348 | #ifdef RC_REPORT_OVERRUN |
| 349 | status = rc_in(bp, CD180_RCSR); | 349 | status = rc_in(bp, CD180_RCSR); |
| @@ -355,18 +355,18 @@ static void rc_receive_exc(struct riscom_board const *bp) | |||
| 355 | #endif | 355 | #endif |
| 356 | ch = rc_in(bp, CD180_RDR); | 356 | ch = rc_in(bp, CD180_RDR); |
| 357 | if (!status) | 357 | if (!status) |
| 358 | return; | 358 | goto out; |
| 359 | if (status & RCSR_TOUT) { | 359 | if (status & RCSR_TOUT) { |
| 360 | printk(KERN_WARNING "rc%d: port %d: Receiver timeout. " | 360 | printk(KERN_WARNING "rc%d: port %d: Receiver timeout. " |
| 361 | "Hardware problems ?\n", | 361 | "Hardware problems ?\n", |
| 362 | board_No(bp), port_No(port)); | 362 | board_No(bp), port_No(port)); |
| 363 | return; | 363 | goto out; |
| 364 | 364 | ||
| 365 | } else if (status & RCSR_BREAK) { | 365 | } else if (status & RCSR_BREAK) { |
| 366 | printk(KERN_INFO "rc%d: port %d: Handling break...\n", | 366 | printk(KERN_INFO "rc%d: port %d: Handling break...\n", |
| 367 | board_No(bp), port_No(port)); | 367 | board_No(bp), port_No(port)); |
| 368 | flag = TTY_BREAK; | 368 | flag = TTY_BREAK; |
| 369 | if (port->port.flags & ASYNC_SAK) | 369 | if (tty && (port->port.flags & ASYNC_SAK)) |
| 370 | do_SAK(tty); | 370 | do_SAK(tty); |
| 371 | 371 | ||
| 372 | } else if (status & RCSR_PE) | 372 | } else if (status & RCSR_PE) |
| @@ -380,8 +380,12 @@ static void rc_receive_exc(struct riscom_board const *bp) | |||
| 380 | else | 380 | else |
| 381 | flag = TTY_NORMAL; | 381 | flag = TTY_NORMAL; |
| 382 | 382 | ||
| 383 | tty_insert_flip_char(tty, ch, flag); | 383 | if (tty) { |
| 384 | tty_flip_buffer_push(tty); | 384 | tty_insert_flip_char(tty, ch, flag); |
| 385 | tty_flip_buffer_push(tty); | ||
| 386 | } | ||
| 387 | out: | ||
| 388 | tty_kref_put(tty); | ||
| 385 | } | 389 | } |
| 386 | 390 | ||
| 387 | static void rc_receive(struct riscom_board const *bp) | 391 | static void rc_receive(struct riscom_board const *bp) |
| @@ -394,7 +398,7 @@ static void rc_receive(struct riscom_board const *bp) | |||
| 394 | if (port == NULL) | 398 | if (port == NULL) |
| 395 | return; | 399 | return; |
| 396 | 400 | ||
| 397 | tty = port->port.tty; | 401 | tty = tty_port_tty_get(&port->port); |
| 398 | 402 | ||
| 399 | count = rc_in(bp, CD180_RDCR); | 403 | count = rc_in(bp, CD180_RDCR); |
| 400 | 404 | ||
| @@ -403,15 +407,14 @@ static void rc_receive(struct riscom_board const *bp) | |||
| 403 | #endif | 407 | #endif |
| 404 | 408 | ||
| 405 | while (count--) { | 409 | while (count--) { |
| 406 | if (tty_buffer_request_room(tty, 1) == 0) { | 410 | u8 ch = rc_in(bp, CD180_RDR); |
| 407 | printk(KERN_WARNING "rc%d: port %d: Working around " | 411 | if (tty) |
| 408 | "flip buffer overflow.\n", | 412 | tty_insert_flip_char(tty, ch, TTY_NORMAL); |
| 409 | board_No(bp), port_No(port)); | 413 | } |
| 410 | break; | 414 | if (tty) { |
| 411 | } | 415 | tty_flip_buffer_push(tty); |
| 412 | tty_insert_flip_char(tty, rc_in(bp, CD180_RDR), TTY_NORMAL); | 416 | tty_kref_put(tty); |
| 413 | } | 417 | } |
| 414 | tty_flip_buffer_push(tty); | ||
| 415 | } | 418 | } |
| 416 | 419 | ||
| 417 | static void rc_transmit(struct riscom_board const *bp) | 420 | static void rc_transmit(struct riscom_board const *bp) |
| @@ -424,22 +427,22 @@ static void rc_transmit(struct riscom_board const *bp) | |||
| 424 | if (port == NULL) | 427 | if (port == NULL) |
| 425 | return; | 428 | return; |
| 426 | 429 | ||
| 427 | tty = port->port.tty; | 430 | tty = tty_port_tty_get(&port->port); |
| 428 | 431 | ||
| 429 | if (port->IER & IER_TXEMPTY) { | 432 | if (port->IER & IER_TXEMPTY) { |
| 430 | /* FIFO drained */ | 433 | /* FIFO drained */ |
| 431 | rc_out(bp, CD180_CAR, port_No(port)); | 434 | rc_out(bp, CD180_CAR, port_No(port)); |
| 432 | port->IER &= ~IER_TXEMPTY; | 435 | port->IER &= ~IER_TXEMPTY; |
| 433 | rc_out(bp, CD180_IER, port->IER); | 436 | rc_out(bp, CD180_IER, port->IER); |
| 434 | return; | 437 | goto out; |
| 435 | } | 438 | } |
| 436 | 439 | ||
| 437 | if ((port->xmit_cnt <= 0 && !port->break_length) | 440 | if ((port->xmit_cnt <= 0 && !port->break_length) |
| 438 | || tty->stopped || tty->hw_stopped) { | 441 | || (tty && (tty->stopped || tty->hw_stopped))) { |
| 439 | rc_out(bp, CD180_CAR, port_No(port)); | 442 | rc_out(bp, CD180_CAR, port_No(port)); |
| 440 | port->IER &= ~IER_TXRDY; | 443 | port->IER &= ~IER_TXRDY; |
| 441 | rc_out(bp, CD180_IER, port->IER); | 444 | rc_out(bp, CD180_IER, port->IER); |
| 442 | return; | 445 | goto out; |
| 443 | } | 446 | } |
| 444 | 447 | ||
| 445 | if (port->break_length) { | 448 | if (port->break_length) { |
| @@ -464,7 +467,7 @@ static void rc_transmit(struct riscom_board const *bp) | |||
| 464 | rc_out(bp, CD180_CCR, CCR_CORCHG2); | 467 | rc_out(bp, CD180_CCR, CCR_CORCHG2); |
| 465 | port->break_length = 0; | 468 | port->break_length = 0; |
| 466 | } | 469 | } |
| 467 | return; | 470 | goto out; |
| 468 | } | 471 | } |
| 469 | 472 | ||
| 470 | count = CD180_NFIFO; | 473 | count = CD180_NFIFO; |
| @@ -480,8 +483,10 @@ static void rc_transmit(struct riscom_board const *bp) | |||
| 480 | port->IER &= ~IER_TXRDY; | 483 | port->IER &= ~IER_TXRDY; |
| 481 | rc_out(bp, CD180_IER, port->IER); | 484 | rc_out(bp, CD180_IER, port->IER); |
| 482 | } | 485 | } |
| 483 | if (port->xmit_cnt <= port->wakeup_chars) | 486 | if (tty && port->xmit_cnt <= port->wakeup_chars) |
| 484 | tty_wakeup(tty); | 487 | tty_wakeup(tty); |
| 488 | out: | ||
| 489 | tty_kref_put(tty); | ||
| 485 | } | 490 | } |
| 486 | 491 | ||
| 487 | static void rc_check_modem(struct riscom_board const *bp) | 492 | static void rc_check_modem(struct riscom_board const *bp) |
| @@ -494,37 +499,43 @@ static void rc_check_modem(struct riscom_board const *bp) | |||
| 494 | if (port == NULL) | 499 | if (port == NULL) |
| 495 | return; | 500 | return; |
| 496 | 501 | ||
| 497 | tty = port->port.tty; | 502 | tty = tty_port_tty_get(&port->port); |
| 498 | 503 | ||
| 499 | mcr = rc_in(bp, CD180_MCR); | 504 | mcr = rc_in(bp, CD180_MCR); |
| 500 | if (mcr & MCR_CDCHG) { | 505 | if (mcr & MCR_CDCHG) { |
| 501 | if (rc_in(bp, CD180_MSVR) & MSVR_CD) | 506 | if (rc_in(bp, CD180_MSVR) & MSVR_CD) |
| 502 | wake_up_interruptible(&port->port.open_wait); | 507 | wake_up_interruptible(&port->port.open_wait); |
| 503 | else | 508 | else if (tty) |
| 504 | tty_hangup(tty); | 509 | tty_hangup(tty); |
| 505 | } | 510 | } |
| 506 | 511 | ||
| 507 | #ifdef RISCOM_BRAIN_DAMAGED_CTS | 512 | #ifdef RISCOM_BRAIN_DAMAGED_CTS |
| 508 | if (mcr & MCR_CTSCHG) { | 513 | if (mcr & MCR_CTSCHG) { |
| 509 | if (rc_in(bp, CD180_MSVR) & MSVR_CTS) { | 514 | if (rc_in(bp, CD180_MSVR) & MSVR_CTS) { |
| 510 | tty->hw_stopped = 0; | ||
| 511 | port->IER |= IER_TXRDY; | 515 | port->IER |= IER_TXRDY; |
| 512 | if (port->xmit_cnt <= port->wakeup_chars) | 516 | if (tty) { |
| 513 | tty_wakeup(tty); | 517 | tty->hw_stopped = 0; |
| 518 | if (port->xmit_cnt <= port->wakeup_chars) | ||
| 519 | tty_wakeup(tty); | ||
| 520 | } | ||
| 514 | } else { | 521 | } else { |
| 515 | tty->hw_stopped = 1; | 522 | if (tty) |
| 523 | tty->hw_stopped = 1; | ||
| 516 | port->IER &= ~IER_TXRDY; | 524 | port->IER &= ~IER_TXRDY; |
| 517 | } | 525 | } |
| 518 | rc_out(bp, CD180_IER, port->IER); | 526 | rc_out(bp, CD180_IER, port->IER); |
| 519 | } | 527 | } |
| 520 | if (mcr & MCR_DSRCHG) { | 528 | if (mcr & MCR_DSRCHG) { |
| 521 | if (rc_in(bp, CD180_MSVR) & MSVR_DSR) { | 529 | if (rc_in(bp, CD180_MSVR) & MSVR_DSR) { |
| 522 | tty->hw_stopped = 0; | ||
| 523 | port->IER |= IER_TXRDY; | 530 | port->IER |= IER_TXRDY; |
| 524 | if (port->xmit_cnt <= port->wakeup_chars) | 531 | if (tty) { |
| 525 | tty_wakeup(tty); | 532 | tty->hw_stopped = 0; |
| 533 | if (port->xmit_cnt <= port->wakeup_chars) | ||
| 534 | tty_wakeup(tty); | ||
| 535 | } | ||
| 526 | } else { | 536 | } else { |
| 527 | tty->hw_stopped = 1; | 537 | if (tty) |
| 538 | tty->hw_stopped = 1; | ||
| 528 | port->IER &= ~IER_TXRDY; | 539 | port->IER &= ~IER_TXRDY; |
| 529 | } | 540 | } |
| 530 | rc_out(bp, CD180_IER, port->IER); | 541 | rc_out(bp, CD180_IER, port->IER); |
| @@ -533,6 +544,7 @@ static void rc_check_modem(struct riscom_board const *bp) | |||
| 533 | 544 | ||
| 534 | /* Clear change bits */ | 545 | /* Clear change bits */ |
| 535 | rc_out(bp, CD180_MCR, 0); | 546 | rc_out(bp, CD180_MCR, 0); |
| 547 | tty_kref_put(tty); | ||
| 536 | } | 548 | } |
| 537 | 549 | ||
| 538 | /* The main interrupt processing routine */ | 550 | /* The main interrupt processing routine */ |
| @@ -632,9 +644,9 @@ static void rc_shutdown_board(struct riscom_board *bp) | |||
| 632 | * Setting up port characteristics. | 644 | * Setting up port characteristics. |
| 633 | * Must be called with disabled interrupts | 645 | * Must be called with disabled interrupts |
| 634 | */ | 646 | */ |
| 635 | static void rc_change_speed(struct riscom_board *bp, struct riscom_port *port) | 647 | static void rc_change_speed(struct tty_struct *tty, struct riscom_board *bp, |
| 648 | struct riscom_port *port) | ||
| 636 | { | 649 | { |
| 637 | struct tty_struct *tty = port->port.tty; | ||
| 638 | unsigned long baud; | 650 | unsigned long baud; |
| 639 | long tmp; | 651 | long tmp; |
| 640 | unsigned char cor1 = 0, cor3 = 0; | 652 | unsigned char cor1 = 0, cor3 = 0; |
| @@ -781,7 +793,8 @@ static void rc_change_speed(struct riscom_board *bp, struct riscom_port *port) | |||
| 781 | } | 793 | } |
| 782 | 794 | ||
| 783 | /* Must be called with interrupts enabled */ | 795 | /* Must be called with interrupts enabled */ |
| 784 | static int rc_setup_port(struct riscom_board *bp, struct riscom_port *port) | 796 | static int rc_setup_port(struct tty_struct *tty, struct riscom_board *bp, |
| 797 | struct riscom_port *port) | ||
| 785 | { | 798 | { |
| 786 | unsigned long flags; | 799 | unsigned long flags; |
| 787 | 800 | ||
| @@ -793,11 +806,11 @@ static int rc_setup_port(struct riscom_board *bp, struct riscom_port *port) | |||
| 793 | 806 | ||
| 794 | spin_lock_irqsave(&riscom_lock, flags); | 807 | spin_lock_irqsave(&riscom_lock, flags); |
| 795 | 808 | ||
| 796 | clear_bit(TTY_IO_ERROR, &port->port.tty->flags); | 809 | clear_bit(TTY_IO_ERROR, &tty->flags); |
| 797 | if (port->port.count == 1) | 810 | if (port->port.count == 1) |
| 798 | bp->count++; | 811 | bp->count++; |
| 799 | port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; | 812 | port->xmit_cnt = port->xmit_head = port->xmit_tail = 0; |
| 800 | rc_change_speed(bp, port); | 813 | rc_change_speed(tty, bp, port); |
| 801 | port->port.flags |= ASYNC_INITIALIZED; | 814 | port->port.flags |= ASYNC_INITIALIZED; |
| 802 | 815 | ||
| 803 | spin_unlock_irqrestore(&riscom_lock, flags); | 816 | spin_unlock_irqrestore(&riscom_lock, flags); |
| @@ -898,9 +911,9 @@ static int rc_open(struct tty_struct *tty, struct file *filp) | |||
| 898 | 911 | ||
| 899 | port->port.count++; | 912 | port->port.count++; |
| 900 | tty->driver_data = port; | 913 | tty->driver_data = port; |
| 901 | port->port.tty = tty; | 914 | tty_port_tty_set(&port->port, tty); |
| 902 | 915 | ||
| 903 | error = rc_setup_port(bp, port); | 916 | error = rc_setup_port(tty, bp, port); |
| 904 | if (error == 0) | 917 | if (error == 0) |
| 905 | error = tty_port_block_til_ready(&port->port, tty, filp); | 918 | error = tty_port_block_til_ready(&port->port, tty, filp); |
| 906 | return error; | 919 | return error; |
| @@ -921,20 +934,12 @@ static void rc_flush_buffer(struct tty_struct *tty) | |||
| 921 | tty_wakeup(tty); | 934 | tty_wakeup(tty); |
| 922 | } | 935 | } |
| 923 | 936 | ||
| 924 | static void rc_close(struct tty_struct *tty, struct file *filp) | 937 | static void rc_close_port(struct tty_port *port) |
| 925 | { | 938 | { |
| 926 | struct riscom_port *port = tty->driver_data; | ||
| 927 | struct riscom_board *bp; | ||
| 928 | unsigned long flags; | 939 | unsigned long flags; |
| 940 | struct riscom_port *rp = container_of(port, struct riscom_port, port); | ||
| 941 | struct riscom_board *bp = port_Board(rp); | ||
| 929 | unsigned long timeout; | 942 | unsigned long timeout; |
| 930 | |||
| 931 | if (!port || rc_paranoia_check(port, tty->name, "close")) | ||
| 932 | return; | ||
| 933 | |||
| 934 | bp = port_Board(port); | ||
| 935 | |||
| 936 | if (tty_port_close_start(&port->port, tty, filp) == 0) | ||
| 937 | return; | ||
| 938 | 943 | ||
| 939 | /* | 944 | /* |
| 940 | * At this point we stop accepting input. To do this, we | 945 | * At this point we stop accepting input. To do this, we |
| @@ -944,31 +949,37 @@ static void rc_close(struct tty_struct *tty, struct file *filp) | |||
| 944 | */ | 949 | */ |
| 945 | 950 | ||
| 946 | spin_lock_irqsave(&riscom_lock, flags); | 951 | spin_lock_irqsave(&riscom_lock, flags); |
| 947 | port->IER &= ~IER_RXD; | 952 | rp->IER &= ~IER_RXD; |
| 948 | if (port->port.flags & ASYNC_INITIALIZED) { | 953 | if (port->flags & ASYNC_INITIALIZED) { |
| 949 | port->IER &= ~IER_TXRDY; | 954 | rp->IER &= ~IER_TXRDY; |
| 950 | port->IER |= IER_TXEMPTY; | 955 | rp->IER |= IER_TXEMPTY; |
| 951 | rc_out(bp, CD180_CAR, port_No(port)); | 956 | rc_out(bp, CD180_CAR, port_No(rp)); |
| 952 | rc_out(bp, CD180_IER, port->IER); | 957 | rc_out(bp, CD180_IER, rp->IER); |
| 953 | /* | 958 | /* |
| 954 | * Before we drop DTR, make sure the UART transmitter | 959 | * Before we drop DTR, make sure the UART transmitter |
| 955 | * has completely drained; this is especially | 960 | * has completely drained; this is especially |
| 956 | * important if there is a transmit FIFO! | 961 | * important if there is a transmit FIFO! |
| 957 | */ | 962 | */ |
| 958 | timeout = jiffies + HZ; | 963 | timeout = jiffies + HZ; |
| 959 | while (port->IER & IER_TXEMPTY) { | 964 | while (rp->IER & IER_TXEMPTY) { |
| 960 | spin_unlock_irqrestore(&riscom_lock, flags); | 965 | spin_unlock_irqrestore(&riscom_lock, flags); |
| 961 | msleep_interruptible(jiffies_to_msecs(port->timeout)); | 966 | msleep_interruptible(jiffies_to_msecs(rp->timeout)); |
| 962 | spin_lock_irqsave(&riscom_lock, flags); | 967 | spin_lock_irqsave(&riscom_lock, flags); |
| 963 | if (time_after(jiffies, timeout)) | 968 | if (time_after(jiffies, timeout)) |
| 964 | break; | 969 | break; |
| 965 | } | 970 | } |
| 966 | } | 971 | } |
| 967 | rc_shutdown_port(tty, bp, port); | 972 | rc_shutdown_port(port->tty, bp, rp); |
| 968 | rc_flush_buffer(tty); | ||
| 969 | spin_unlock_irqrestore(&riscom_lock, flags); | 973 | spin_unlock_irqrestore(&riscom_lock, flags); |
| 974 | } | ||
| 975 | |||
| 976 | static void rc_close(struct tty_struct *tty, struct file *filp) | ||
| 977 | { | ||
| 978 | struct riscom_port *port = tty->driver_data; | ||
| 970 | 979 | ||
| 971 | tty_port_close_end(&port->port, tty); | 980 | if (!port || rc_paranoia_check(port, tty->name, "close")) |
| 981 | return; | ||
| 982 | tty_port_close(&port->port, tty, filp); | ||
| 972 | } | 983 | } |
| 973 | 984 | ||
| 974 | static int rc_write(struct tty_struct *tty, | 985 | static int rc_write(struct tty_struct *tty, |
| @@ -1170,7 +1181,7 @@ static int rc_send_break(struct tty_struct *tty, int length) | |||
| 1170 | return 0; | 1181 | return 0; |
| 1171 | } | 1182 | } |
| 1172 | 1183 | ||
| 1173 | static int rc_set_serial_info(struct riscom_port *port, | 1184 | static int rc_set_serial_info(struct tty_struct *tty, struct riscom_port *port, |
| 1174 | struct serial_struct __user *newinfo) | 1185 | struct serial_struct __user *newinfo) |
| 1175 | { | 1186 | { |
| 1176 | struct serial_struct tmp; | 1187 | struct serial_struct tmp; |
| @@ -1180,17 +1191,6 @@ static int rc_set_serial_info(struct riscom_port *port, | |||
| 1180 | if (copy_from_user(&tmp, newinfo, sizeof(tmp))) | 1191 | if (copy_from_user(&tmp, newinfo, sizeof(tmp))) |
| 1181 | return -EFAULT; | 1192 | return -EFAULT; |
| 1182 | 1193 | ||
| 1183 | #if 0 | ||
| 1184 | if ((tmp.irq != bp->irq) || | ||
| 1185 | (tmp.port != bp->base) || | ||
| 1186 | (tmp.type != PORT_CIRRUS) || | ||
| 1187 | (tmp.baud_base != (RC_OSCFREQ + CD180_TPC/2) / CD180_TPC) || | ||
| 1188 | (tmp.custom_divisor != 0) || | ||
| 1189 | (tmp.xmit_fifo_size != CD180_NFIFO) || | ||
| 1190 | (tmp.flags & ~RISCOM_LEGAL_FLAGS)) | ||
| 1191 | return -EINVAL; | ||
| 1192 | #endif | ||
| 1193 | |||
| 1194 | change_speed = ((port->port.flags & ASYNC_SPD_MASK) != | 1194 | change_speed = ((port->port.flags & ASYNC_SPD_MASK) != |
| 1195 | (tmp.flags & ASYNC_SPD_MASK)); | 1195 | (tmp.flags & ASYNC_SPD_MASK)); |
| 1196 | 1196 | ||
| @@ -1212,7 +1212,7 @@ static int rc_set_serial_info(struct riscom_port *port, | |||
| 1212 | unsigned long flags; | 1212 | unsigned long flags; |
| 1213 | 1213 | ||
| 1214 | spin_lock_irqsave(&riscom_lock, flags); | 1214 | spin_lock_irqsave(&riscom_lock, flags); |
| 1215 | rc_change_speed(bp, port); | 1215 | rc_change_speed(tty, bp, port); |
| 1216 | spin_unlock_irqrestore(&riscom_lock, flags); | 1216 | spin_unlock_irqrestore(&riscom_lock, flags); |
| 1217 | } | 1217 | } |
| 1218 | return 0; | 1218 | return 0; |
| @@ -1255,7 +1255,7 @@ static int rc_ioctl(struct tty_struct *tty, struct file *filp, | |||
| 1255 | break; | 1255 | break; |
| 1256 | case TIOCSSERIAL: | 1256 | case TIOCSSERIAL: |
| 1257 | lock_kernel(); | 1257 | lock_kernel(); |
| 1258 | retval = rc_set_serial_info(port, argp); | 1258 | retval = rc_set_serial_info(tty, port, argp); |
| 1259 | unlock_kernel(); | 1259 | unlock_kernel(); |
| 1260 | break; | 1260 | break; |
| 1261 | default: | 1261 | default: |
| @@ -1350,21 +1350,12 @@ static void rc_start(struct tty_struct *tty) | |||
| 1350 | static void rc_hangup(struct tty_struct *tty) | 1350 | static void rc_hangup(struct tty_struct *tty) |
| 1351 | { | 1351 | { |
| 1352 | struct riscom_port *port = tty->driver_data; | 1352 | struct riscom_port *port = tty->driver_data; |
| 1353 | struct riscom_board *bp; | ||
| 1354 | unsigned long flags; | ||
| 1355 | 1353 | ||
| 1356 | if (rc_paranoia_check(port, tty->name, "rc_hangup")) | 1354 | if (rc_paranoia_check(port, tty->name, "rc_hangup")) |
| 1357 | return; | 1355 | return; |
| 1358 | 1356 | ||
| 1359 | bp = port_Board(port); | 1357 | rc_shutdown_port(tty, port_Board(port), port); |
| 1360 | 1358 | tty_port_hangup(&port->port); | |
| 1361 | rc_shutdown_port(tty, bp, port); | ||
| 1362 | spin_lock_irqsave(&port->port.lock, flags); | ||
| 1363 | port->port.count = 0; | ||
| 1364 | port->port.flags &= ~ASYNC_NORMAL_ACTIVE; | ||
| 1365 | port->port.tty = NULL; | ||
| 1366 | wake_up_interruptible(&port->port.open_wait); | ||
| 1367 | spin_unlock_irqrestore(&port->port.lock, flags); | ||
| 1368 | } | 1359 | } |
| 1369 | 1360 | ||
| 1370 | static void rc_set_termios(struct tty_struct *tty, | 1361 | static void rc_set_termios(struct tty_struct *tty, |
| @@ -1377,7 +1368,7 @@ static void rc_set_termios(struct tty_struct *tty, | |||
| 1377 | return; | 1368 | return; |
| 1378 | 1369 | ||
| 1379 | spin_lock_irqsave(&riscom_lock, flags); | 1370 | spin_lock_irqsave(&riscom_lock, flags); |
| 1380 | rc_change_speed(port_Board(port), port); | 1371 | rc_change_speed(tty, port_Board(port), port); |
| 1381 | spin_unlock_irqrestore(&riscom_lock, flags); | 1372 | spin_unlock_irqrestore(&riscom_lock, flags); |
| 1382 | 1373 | ||
| 1383 | if ((old_termios->c_cflag & CRTSCTS) && | 1374 | if ((old_termios->c_cflag & CRTSCTS) && |
| @@ -1410,6 +1401,7 @@ static const struct tty_operations riscom_ops = { | |||
| 1410 | 1401 | ||
| 1411 | static const struct tty_port_operations riscom_port_ops = { | 1402 | static const struct tty_port_operations riscom_port_ops = { |
| 1412 | .carrier_raised = carrier_raised, | 1403 | .carrier_raised = carrier_raised, |
| 1404 | .shutdown = rc_close_port, | ||
| 1413 | }; | 1405 | }; |
| 1414 | 1406 | ||
| 1415 | 1407 | ||
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c index a3afa0c387cd..ea18a129b0b5 100644 --- a/drivers/char/tty_io.c +++ b/drivers/char/tty_io.c | |||
| @@ -1184,6 +1184,7 @@ int tty_init_termios(struct tty_struct *tty) | |||
| 1184 | tty->termios->c_ospeed = tty_termios_baud_rate(tty->termios); | 1184 | tty->termios->c_ospeed = tty_termios_baud_rate(tty->termios); |
| 1185 | return 0; | 1185 | return 0; |
| 1186 | } | 1186 | } |
| 1187 | EXPORT_SYMBOL_GPL(tty_init_termios); | ||
| 1187 | 1188 | ||
| 1188 | /** | 1189 | /** |
| 1189 | * tty_driver_install_tty() - install a tty entry in the driver | 1190 | * tty_driver_install_tty() - install a tty entry in the driver |
| @@ -1386,10 +1387,14 @@ EXPORT_SYMBOL(tty_shutdown); | |||
| 1386 | * tty_mutex - sometimes only | 1387 | * tty_mutex - sometimes only |
| 1387 | * takes the file list lock internally when working on the list | 1388 | * takes the file list lock internally when working on the list |
| 1388 | * of ttys that the driver keeps. | 1389 | * of ttys that the driver keeps. |
| 1390 | * | ||
| 1391 | * This method gets called from a work queue so that the driver private | ||
| 1392 | * shutdown ops can sleep (needed for USB at least) | ||
| 1389 | */ | 1393 | */ |
| 1390 | static void release_one_tty(struct kref *kref) | 1394 | static void release_one_tty(struct work_struct *work) |
| 1391 | { | 1395 | { |
| 1392 | struct tty_struct *tty = container_of(kref, struct tty_struct, kref); | 1396 | struct tty_struct *tty = |
| 1397 | container_of(work, struct tty_struct, hangup_work); | ||
| 1393 | struct tty_driver *driver = tty->driver; | 1398 | struct tty_driver *driver = tty->driver; |
| 1394 | 1399 | ||
| 1395 | if (tty->ops->shutdown) | 1400 | if (tty->ops->shutdown) |
| @@ -1407,6 +1412,15 @@ static void release_one_tty(struct kref *kref) | |||
| 1407 | free_tty_struct(tty); | 1412 | free_tty_struct(tty); |
| 1408 | } | 1413 | } |
| 1409 | 1414 | ||
| 1415 | static void queue_release_one_tty(struct kref *kref) | ||
| 1416 | { | ||
| 1417 | struct tty_struct *tty = container_of(kref, struct tty_struct, kref); | ||
| 1418 | /* The hangup queue is now free so we can reuse it rather than | ||
| 1419 | waste a chunk of memory for each port */ | ||
| 1420 | INIT_WORK(&tty->hangup_work, release_one_tty); | ||
| 1421 | schedule_work(&tty->hangup_work); | ||
| 1422 | } | ||
| 1423 | |||
| 1410 | /** | 1424 | /** |
| 1411 | * tty_kref_put - release a tty kref | 1425 | * tty_kref_put - release a tty kref |
| 1412 | * @tty: tty device | 1426 | * @tty: tty device |
| @@ -1418,7 +1432,7 @@ static void release_one_tty(struct kref *kref) | |||
| 1418 | void tty_kref_put(struct tty_struct *tty) | 1432 | void tty_kref_put(struct tty_struct *tty) |
| 1419 | { | 1433 | { |
| 1420 | if (tty) | 1434 | if (tty) |
| 1421 | kref_put(&tty->kref, release_one_tty); | 1435 | kref_put(&tty->kref, queue_release_one_tty); |
| 1422 | } | 1436 | } |
| 1423 | EXPORT_SYMBOL(tty_kref_put); | 1437 | EXPORT_SYMBOL(tty_kref_put); |
| 1424 | 1438 | ||
| @@ -2085,7 +2099,7 @@ static int tioccons(struct file *file) | |||
| 2085 | * the generic functionality existed. This piece of history is preserved | 2099 | * the generic functionality existed. This piece of history is preserved |
| 2086 | * in the expected tty API of posix OS's. | 2100 | * in the expected tty API of posix OS's. |
| 2087 | * | 2101 | * |
| 2088 | * Locking: none, the open fle handle ensures it won't go away. | 2102 | * Locking: none, the open file handle ensures it won't go away. |
| 2089 | */ | 2103 | */ |
| 2090 | 2104 | ||
| 2091 | static int fionbio(struct file *file, int __user *p) | 2105 | static int fionbio(struct file *file, int __user *p) |
| @@ -3056,11 +3070,22 @@ void __init console_init(void) | |||
| 3056 | } | 3070 | } |
| 3057 | } | 3071 | } |
| 3058 | 3072 | ||
| 3073 | static char *tty_devnode(struct device *dev, mode_t *mode) | ||
| 3074 | { | ||
| 3075 | if (!mode) | ||
| 3076 | return NULL; | ||
| 3077 | if (dev->devt == MKDEV(TTYAUX_MAJOR, 0) || | ||
| 3078 | dev->devt == MKDEV(TTYAUX_MAJOR, 2)) | ||
| 3079 | *mode = 0666; | ||
| 3080 | return NULL; | ||
| 3081 | } | ||
| 3082 | |||
| 3059 | static int __init tty_class_init(void) | 3083 | static int __init tty_class_init(void) |
| 3060 | { | 3084 | { |
| 3061 | tty_class = class_create(THIS_MODULE, "tty"); | 3085 | tty_class = class_create(THIS_MODULE, "tty"); |
| 3062 | if (IS_ERR(tty_class)) | 3086 | if (IS_ERR(tty_class)) |
| 3063 | return PTR_ERR(tty_class); | 3087 | return PTR_ERR(tty_class); |
| 3088 | tty_class->devnode = tty_devnode; | ||
| 3064 | return 0; | 3089 | return 0; |
| 3065 | } | 3090 | } |
| 3066 | 3091 | ||
diff --git a/drivers/char/tty_ioctl.c b/drivers/char/tty_ioctl.c index ad6ba4ed2808..8e67d5c642a4 100644 --- a/drivers/char/tty_ioctl.c +++ b/drivers/char/tty_ioctl.c | |||
| @@ -393,9 +393,7 @@ void tty_termios_encode_baud_rate(struct ktermios *termios, | |||
| 393 | termios->c_cflag |= (BOTHER << IBSHIFT); | 393 | termios->c_cflag |= (BOTHER << IBSHIFT); |
| 394 | #else | 394 | #else |
| 395 | if (ifound == -1 || ofound == -1) { | 395 | if (ifound == -1 || ofound == -1) { |
| 396 | static int warned; | 396 | printk_once(KERN_WARNING "tty: Unable to return correct " |
| 397 | if (!warned++) | ||
| 398 | printk(KERN_WARNING "tty: Unable to return correct " | ||
| 399 | "speed data as your architecture needs updating.\n"); | 397 | "speed data as your architecture needs updating.\n"); |
| 400 | } | 398 | } |
| 401 | #endif | 399 | #endif |
diff --git a/drivers/char/tty_ldisc.c b/drivers/char/tty_ldisc.c index e48af9f79219..aafdbaebc16a 100644 --- a/drivers/char/tty_ldisc.c +++ b/drivers/char/tty_ldisc.c | |||
| @@ -145,48 +145,33 @@ int tty_unregister_ldisc(int disc) | |||
| 145 | } | 145 | } |
| 146 | EXPORT_SYMBOL(tty_unregister_ldisc); | 146 | EXPORT_SYMBOL(tty_unregister_ldisc); |
| 147 | 147 | ||
| 148 | 148 | static struct tty_ldisc_ops *get_ldops(int disc) | |
| 149 | /** | ||
| 150 | * tty_ldisc_try_get - try and reference an ldisc | ||
| 151 | * @disc: ldisc number | ||
| 152 | * | ||
| 153 | * Attempt to open and lock a line discipline into place. Return | ||
| 154 | * the line discipline refcounted or an error. | ||
| 155 | */ | ||
| 156 | |||
| 157 | static struct tty_ldisc *tty_ldisc_try_get(int disc) | ||
| 158 | { | 149 | { |
| 159 | unsigned long flags; | 150 | unsigned long flags; |
| 160 | struct tty_ldisc *ld; | 151 | struct tty_ldisc_ops *ldops, *ret; |
| 161 | struct tty_ldisc_ops *ldops; | ||
| 162 | int err = -EINVAL; | ||
| 163 | |||
| 164 | ld = kmalloc(sizeof(struct tty_ldisc), GFP_KERNEL); | ||
| 165 | if (ld == NULL) | ||
| 166 | return ERR_PTR(-ENOMEM); | ||
| 167 | 152 | ||
| 168 | spin_lock_irqsave(&tty_ldisc_lock, flags); | 153 | spin_lock_irqsave(&tty_ldisc_lock, flags); |
| 169 | ld->ops = NULL; | 154 | ret = ERR_PTR(-EINVAL); |
| 170 | ldops = tty_ldiscs[disc]; | 155 | ldops = tty_ldiscs[disc]; |
| 171 | /* Check the entry is defined */ | ||
| 172 | if (ldops) { | 156 | if (ldops) { |
| 173 | /* If the module is being unloaded we can't use it */ | 157 | ret = ERR_PTR(-EAGAIN); |
| 174 | if (!try_module_get(ldops->owner)) | 158 | if (try_module_get(ldops->owner)) { |
| 175 | err = -EAGAIN; | ||
| 176 | else { | ||
| 177 | /* lock it */ | ||
| 178 | ldops->refcount++; | 159 | ldops->refcount++; |
| 179 | ld->ops = ldops; | 160 | ret = ldops; |
| 180 | atomic_set(&ld->users, 1); | ||
| 181 | err = 0; | ||
| 182 | } | 161 | } |
| 183 | } | 162 | } |
| 184 | spin_unlock_irqrestore(&tty_ldisc_lock, flags); | 163 | spin_unlock_irqrestore(&tty_ldisc_lock, flags); |
| 185 | if (err) { | 164 | return ret; |
| 186 | kfree(ld); | 165 | } |
| 187 | return ERR_PTR(err); | 166 | |
| 188 | } | 167 | static void put_ldops(struct tty_ldisc_ops *ldops) |
| 189 | return ld; | 168 | { |
| 169 | unsigned long flags; | ||
| 170 | |||
| 171 | spin_lock_irqsave(&tty_ldisc_lock, flags); | ||
| 172 | ldops->refcount--; | ||
| 173 | module_put(ldops->owner); | ||
| 174 | spin_unlock_irqrestore(&tty_ldisc_lock, flags); | ||
| 190 | } | 175 | } |
| 191 | 176 | ||
| 192 | /** | 177 | /** |
| @@ -205,14 +190,31 @@ static struct tty_ldisc *tty_ldisc_try_get(int disc) | |||
| 205 | static struct tty_ldisc *tty_ldisc_get(int disc) | 190 | static struct tty_ldisc *tty_ldisc_get(int disc) |
| 206 | { | 191 | { |
| 207 | struct tty_ldisc *ld; | 192 | struct tty_ldisc *ld; |
| 193 | struct tty_ldisc_ops *ldops; | ||
| 208 | 194 | ||
| 209 | if (disc < N_TTY || disc >= NR_LDISCS) | 195 | if (disc < N_TTY || disc >= NR_LDISCS) |
| 210 | return ERR_PTR(-EINVAL); | 196 | return ERR_PTR(-EINVAL); |
| 211 | ld = tty_ldisc_try_get(disc); | 197 | |
| 212 | if (IS_ERR(ld)) { | 198 | /* |
| 199 | * Get the ldisc ops - we may need to request them to be loaded | ||
| 200 | * dynamically and try again. | ||
| 201 | */ | ||
| 202 | ldops = get_ldops(disc); | ||
| 203 | if (IS_ERR(ldops)) { | ||
| 213 | request_module("tty-ldisc-%d", disc); | 204 | request_module("tty-ldisc-%d", disc); |
| 214 | ld = tty_ldisc_try_get(disc); | 205 | ldops = get_ldops(disc); |
| 206 | if (IS_ERR(ldops)) | ||
| 207 | return ERR_CAST(ldops); | ||
| 215 | } | 208 | } |
| 209 | |||
| 210 | ld = kmalloc(sizeof(struct tty_ldisc), GFP_KERNEL); | ||
| 211 | if (ld == NULL) { | ||
| 212 | put_ldops(ldops); | ||
| 213 | return ERR_PTR(-ENOMEM); | ||
| 214 | } | ||
| 215 | |||
| 216 | ld->ops = ldops; | ||
| 217 | atomic_set(&ld->users, 1); | ||
| 216 | return ld; | 218 | return ld; |
| 217 | } | 219 | } |
| 218 | 220 | ||
| @@ -234,13 +236,13 @@ static void tty_ldiscs_seq_stop(struct seq_file *m, void *v) | |||
| 234 | static int tty_ldiscs_seq_show(struct seq_file *m, void *v) | 236 | static int tty_ldiscs_seq_show(struct seq_file *m, void *v) |
| 235 | { | 237 | { |
| 236 | int i = *(loff_t *)v; | 238 | int i = *(loff_t *)v; |
| 237 | struct tty_ldisc *ld; | 239 | struct tty_ldisc_ops *ldops; |
| 238 | 240 | ||
| 239 | ld = tty_ldisc_try_get(i); | 241 | ldops = get_ldops(i); |
| 240 | if (IS_ERR(ld)) | 242 | if (IS_ERR(ldops)) |
| 241 | return 0; | 243 | return 0; |
| 242 | seq_printf(m, "%-10s %2d\n", ld->ops->name ? ld->ops->name : "???", i); | 244 | seq_printf(m, "%-10s %2d\n", ldops->name ? ldops->name : "???", i); |
| 243 | put_ldisc(ld); | 245 | put_ldops(ldops); |
| 244 | return 0; | 246 | return 0; |
| 245 | } | 247 | } |
| 246 | 248 | ||
diff --git a/drivers/char/tty_port.c b/drivers/char/tty_port.c index 9769b1149f76..a4bbb28f10be 100644 --- a/drivers/char/tty_port.c +++ b/drivers/char/tty_port.c | |||
| @@ -23,6 +23,7 @@ void tty_port_init(struct tty_port *port) | |||
| 23 | memset(port, 0, sizeof(*port)); | 23 | memset(port, 0, sizeof(*port)); |
| 24 | init_waitqueue_head(&port->open_wait); | 24 | init_waitqueue_head(&port->open_wait); |
| 25 | init_waitqueue_head(&port->close_wait); | 25 | init_waitqueue_head(&port->close_wait); |
| 26 | init_waitqueue_head(&port->delta_msr_wait); | ||
| 26 | mutex_init(&port->mutex); | 27 | mutex_init(&port->mutex); |
| 27 | spin_lock_init(&port->lock); | 28 | spin_lock_init(&port->lock); |
| 28 | port->close_delay = (50 * HZ) / 100; | 29 | port->close_delay = (50 * HZ) / 100; |
| @@ -96,6 +97,14 @@ void tty_port_tty_set(struct tty_port *port, struct tty_struct *tty) | |||
| 96 | } | 97 | } |
| 97 | EXPORT_SYMBOL(tty_port_tty_set); | 98 | EXPORT_SYMBOL(tty_port_tty_set); |
| 98 | 99 | ||
| 100 | static void tty_port_shutdown(struct tty_port *port) | ||
| 101 | { | ||
| 102 | if (port->ops->shutdown && | ||
| 103 | test_and_clear_bit(ASYNCB_INITIALIZED, &port->flags)) | ||
| 104 | port->ops->shutdown(port); | ||
| 105 | |||
| 106 | } | ||
| 107 | |||
| 99 | /** | 108 | /** |
| 100 | * tty_port_hangup - hangup helper | 109 | * tty_port_hangup - hangup helper |
| 101 | * @port: tty port | 110 | * @port: tty port |
| @@ -116,6 +125,8 @@ void tty_port_hangup(struct tty_port *port) | |||
| 116 | port->tty = NULL; | 125 | port->tty = NULL; |
| 117 | spin_unlock_irqrestore(&port->lock, flags); | 126 | spin_unlock_irqrestore(&port->lock, flags); |
| 118 | wake_up_interruptible(&port->open_wait); | 127 | wake_up_interruptible(&port->open_wait); |
| 128 | wake_up_interruptible(&port->delta_msr_wait); | ||
| 129 | tty_port_shutdown(port); | ||
| 119 | } | 130 | } |
| 120 | EXPORT_SYMBOL(tty_port_hangup); | 131 | EXPORT_SYMBOL(tty_port_hangup); |
| 121 | 132 | ||
| @@ -296,15 +307,17 @@ int tty_port_close_start(struct tty_port *port, struct tty_struct *tty, struct f | |||
| 296 | 307 | ||
| 297 | if (port->count) { | 308 | if (port->count) { |
| 298 | spin_unlock_irqrestore(&port->lock, flags); | 309 | spin_unlock_irqrestore(&port->lock, flags); |
| 310 | if (port->ops->drop) | ||
| 311 | port->ops->drop(port); | ||
| 299 | return 0; | 312 | return 0; |
| 300 | } | 313 | } |
| 301 | port->flags |= ASYNC_CLOSING; | 314 | set_bit(ASYNCB_CLOSING, &port->flags); |
| 302 | tty->closing = 1; | 315 | tty->closing = 1; |
| 303 | spin_unlock_irqrestore(&port->lock, flags); | 316 | spin_unlock_irqrestore(&port->lock, flags); |
| 304 | /* Don't block on a stalled port, just pull the chain */ | 317 | /* Don't block on a stalled port, just pull the chain */ |
| 305 | if (tty->flow_stopped) | 318 | if (tty->flow_stopped) |
| 306 | tty_driver_flush_buffer(tty); | 319 | tty_driver_flush_buffer(tty); |
| 307 | if (port->flags & ASYNC_INITIALIZED && | 320 | if (test_bit(ASYNCB_INITIALIZED, &port->flags) && |
| 308 | port->closing_wait != ASYNC_CLOSING_WAIT_NONE) | 321 | port->closing_wait != ASYNC_CLOSING_WAIT_NONE) |
| 309 | tty_wait_until_sent(tty, port->closing_wait); | 322 | tty_wait_until_sent(tty, port->closing_wait); |
| 310 | if (port->drain_delay) { | 323 | if (port->drain_delay) { |
| @@ -318,6 +331,9 @@ int tty_port_close_start(struct tty_port *port, struct tty_struct *tty, struct f | |||
| 318 | timeout = 2 * HZ; | 331 | timeout = 2 * HZ; |
| 319 | schedule_timeout_interruptible(timeout); | 332 | schedule_timeout_interruptible(timeout); |
| 320 | } | 333 | } |
| 334 | /* Don't call port->drop for the last reference. Callers will want | ||
| 335 | to drop the last active reference in ->shutdown() or the tty | ||
| 336 | shutdown path */ | ||
| 321 | return 1; | 337 | return 1; |
| 322 | } | 338 | } |
| 323 | EXPORT_SYMBOL(tty_port_close_start); | 339 | EXPORT_SYMBOL(tty_port_close_start); |
| @@ -348,3 +364,14 @@ void tty_port_close_end(struct tty_port *port, struct tty_struct *tty) | |||
| 348 | spin_unlock_irqrestore(&port->lock, flags); | 364 | spin_unlock_irqrestore(&port->lock, flags); |
| 349 | } | 365 | } |
| 350 | EXPORT_SYMBOL(tty_port_close_end); | 366 | EXPORT_SYMBOL(tty_port_close_end); |
| 367 | |||
| 368 | void tty_port_close(struct tty_port *port, struct tty_struct *tty, | ||
| 369 | struct file *filp) | ||
| 370 | { | ||
| 371 | if (tty_port_close_start(port, tty, filp) == 0) | ||
| 372 | return; | ||
| 373 | tty_port_shutdown(port); | ||
| 374 | tty_port_close_end(port, tty); | ||
| 375 | tty_port_tty_set(port, NULL); | ||
| 376 | } | ||
| 377 | EXPORT_SYMBOL(tty_port_close); | ||
diff --git a/drivers/char/vt.c b/drivers/char/vt.c index 6aa88f50b039..0c80c68cd047 100644 --- a/drivers/char/vt.c +++ b/drivers/char/vt.c | |||
| @@ -252,7 +252,6 @@ static void notify_update(struct vc_data *vc) | |||
| 252 | struct vt_notifier_param param = { .vc = vc }; | 252 | struct vt_notifier_param param = { .vc = vc }; |
| 253 | atomic_notifier_call_chain(&vt_notifier_list, VT_UPDATE, ¶m); | 253 | atomic_notifier_call_chain(&vt_notifier_list, VT_UPDATE, ¶m); |
| 254 | } | 254 | } |
| 255 | |||
| 256 | /* | 255 | /* |
| 257 | * Low-Level Functions | 256 | * Low-Level Functions |
| 258 | */ | 257 | */ |
| @@ -935,6 +934,7 @@ static int vc_do_resize(struct tty_struct *tty, struct vc_data *vc, | |||
| 935 | 934 | ||
| 936 | if (CON_IS_VISIBLE(vc)) | 935 | if (CON_IS_VISIBLE(vc)) |
| 937 | update_screen(vc); | 936 | update_screen(vc); |
| 937 | vt_event_post(VT_EVENT_RESIZE, vc->vc_num, vc->vc_num); | ||
| 938 | return err; | 938 | return err; |
| 939 | } | 939 | } |
| 940 | 940 | ||
| @@ -2129,11 +2129,7 @@ static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int co | |||
| 2129 | currcons = vc->vc_num; | 2129 | currcons = vc->vc_num; |
| 2130 | if (!vc_cons_allocated(currcons)) { | 2130 | if (!vc_cons_allocated(currcons)) { |
| 2131 | /* could this happen? */ | 2131 | /* could this happen? */ |
| 2132 | static int error = 0; | 2132 | printk_once("con_write: tty %d not allocated\n", currcons+1); |
| 2133 | if (!error) { | ||
| 2134 | error = 1; | ||
| 2135 | printk("con_write: tty %d not allocated\n", currcons+1); | ||
| 2136 | } | ||
| 2137 | release_console_sem(); | 2133 | release_console_sem(); |
| 2138 | return 0; | 2134 | return 0; |
| 2139 | } | 2135 | } |
| @@ -2910,6 +2906,9 @@ static const struct tty_operations con_ops = { | |||
| 2910 | .flush_chars = con_flush_chars, | 2906 | .flush_chars = con_flush_chars, |
| 2911 | .chars_in_buffer = con_chars_in_buffer, | 2907 | .chars_in_buffer = con_chars_in_buffer, |
| 2912 | .ioctl = vt_ioctl, | 2908 | .ioctl = vt_ioctl, |
| 2909 | #ifdef CONFIG_COMPAT | ||
| 2910 | .compat_ioctl = vt_compat_ioctl, | ||
| 2911 | #endif | ||
| 2913 | .stop = con_stop, | 2912 | .stop = con_stop, |
| 2914 | .start = con_start, | 2913 | .start = con_start, |
| 2915 | .throttle = con_throttle, | 2914 | .throttle = con_throttle, |
| @@ -2955,7 +2954,6 @@ int __init vty_init(const struct file_operations *console_fops) | |||
| 2955 | } | 2954 | } |
| 2956 | 2955 | ||
| 2957 | #ifndef VT_SINGLE_DRIVER | 2956 | #ifndef VT_SINGLE_DRIVER |
| 2958 | #include <linux/device.h> | ||
| 2959 | 2957 | ||
| 2960 | static struct class *vtconsole_class; | 2958 | static struct class *vtconsole_class; |
| 2961 | 2959 | ||
| @@ -3638,6 +3636,7 @@ void do_blank_screen(int entering_gfx) | |||
| 3638 | blank_state = blank_vesa_wait; | 3636 | blank_state = blank_vesa_wait; |
| 3639 | mod_timer(&console_timer, jiffies + vesa_off_interval); | 3637 | mod_timer(&console_timer, jiffies + vesa_off_interval); |
| 3640 | } | 3638 | } |
| 3639 | vt_event_post(VT_EVENT_BLANK, vc->vc_num, vc->vc_num); | ||
| 3641 | } | 3640 | } |
| 3642 | EXPORT_SYMBOL(do_blank_screen); | 3641 | EXPORT_SYMBOL(do_blank_screen); |
| 3643 | 3642 | ||
| @@ -3682,6 +3681,7 @@ void do_unblank_screen(int leaving_gfx) | |||
| 3682 | console_blank_hook(0); | 3681 | console_blank_hook(0); |
| 3683 | set_palette(vc); | 3682 | set_palette(vc); |
| 3684 | set_cursor(vc); | 3683 | set_cursor(vc); |
| 3684 | vt_event_post(VT_EVENT_UNBLANK, vc->vc_num, vc->vc_num); | ||
| 3685 | } | 3685 | } |
| 3686 | EXPORT_SYMBOL(do_unblank_screen); | 3686 | EXPORT_SYMBOL(do_unblank_screen); |
| 3687 | 3687 | ||
diff --git a/drivers/char/vt_ioctl.c b/drivers/char/vt_ioctl.c index 95189f288f8c..29c651ab0d78 100644 --- a/drivers/char/vt_ioctl.c +++ b/drivers/char/vt_ioctl.c | |||
| @@ -16,6 +16,8 @@ | |||
| 16 | #include <linux/tty.h> | 16 | #include <linux/tty.h> |
| 17 | #include <linux/timer.h> | 17 | #include <linux/timer.h> |
| 18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
| 19 | #include <linux/compat.h> | ||
| 20 | #include <linux/module.h> | ||
| 19 | #include <linux/kd.h> | 21 | #include <linux/kd.h> |
| 20 | #include <linux/vt.h> | 22 | #include <linux/vt.h> |
| 21 | #include <linux/string.h> | 23 | #include <linux/string.h> |
| @@ -62,6 +64,133 @@ extern struct tty_driver *console_driver; | |||
| 62 | static void complete_change_console(struct vc_data *vc); | 64 | static void complete_change_console(struct vc_data *vc); |
| 63 | 65 | ||
| 64 | /* | 66 | /* |
| 67 | * User space VT_EVENT handlers | ||
| 68 | */ | ||
| 69 | |||
| 70 | struct vt_event_wait { | ||
| 71 | struct list_head list; | ||
| 72 | struct vt_event event; | ||
| 73 | int done; | ||
| 74 | }; | ||
| 75 | |||
| 76 | static LIST_HEAD(vt_events); | ||
| 77 | static DEFINE_SPINLOCK(vt_event_lock); | ||
| 78 | static DECLARE_WAIT_QUEUE_HEAD(vt_event_waitqueue); | ||
| 79 | |||
| 80 | /** | ||
| 81 | * vt_event_post | ||
| 82 | * @event: the event that occurred | ||
| 83 | * @old: old console | ||
| 84 | * @new: new console | ||
| 85 | * | ||
| 86 | * Post an VT event to interested VT handlers | ||
| 87 | */ | ||
| 88 | |||
| 89 | void vt_event_post(unsigned int event, unsigned int old, unsigned int new) | ||
| 90 | { | ||
| 91 | struct list_head *pos, *head; | ||
| 92 | unsigned long flags; | ||
| 93 | int wake = 0; | ||
| 94 | |||
| 95 | spin_lock_irqsave(&vt_event_lock, flags); | ||
| 96 | head = &vt_events; | ||
| 97 | |||
| 98 | list_for_each(pos, head) { | ||
| 99 | struct vt_event_wait *ve = list_entry(pos, | ||
| 100 | struct vt_event_wait, list); | ||
| 101 | if (!(ve->event.event & event)) | ||
| 102 | continue; | ||
| 103 | ve->event.event = event; | ||
| 104 | /* kernel view is consoles 0..n-1, user space view is | ||
| 105 | console 1..n with 0 meaning current, so we must bias */ | ||
| 106 | ve->event.old = old + 1; | ||
| 107 | ve->event.new = new + 1; | ||
| 108 | wake = 1; | ||
| 109 | ve->done = 1; | ||
| 110 | } | ||
| 111 | spin_unlock_irqrestore(&vt_event_lock, flags); | ||
| 112 | if (wake) | ||
| 113 | wake_up_interruptible(&vt_event_waitqueue); | ||
| 114 | } | ||
| 115 | |||
| 116 | /** | ||
| 117 | * vt_event_wait - wait for an event | ||
| 118 | * @vw: our event | ||
| 119 | * | ||
| 120 | * Waits for an event to occur which completes our vt_event_wait | ||
| 121 | * structure. On return the structure has wv->done set to 1 for success | ||
| 122 | * or 0 if some event such as a signal ended the wait. | ||
| 123 | */ | ||
| 124 | |||
| 125 | static void vt_event_wait(struct vt_event_wait *vw) | ||
| 126 | { | ||
| 127 | unsigned long flags; | ||
| 128 | /* Prepare the event */ | ||
| 129 | INIT_LIST_HEAD(&vw->list); | ||
| 130 | vw->done = 0; | ||
| 131 | /* Queue our event */ | ||
| 132 | spin_lock_irqsave(&vt_event_lock, flags); | ||
| 133 | list_add(&vw->list, &vt_events); | ||
| 134 | spin_unlock_irqrestore(&vt_event_lock, flags); | ||
| 135 | /* Wait for it to pass */ | ||
| 136 | wait_event_interruptible(vt_event_waitqueue, vw->done); | ||
| 137 | /* Dequeue it */ | ||
| 138 | spin_lock_irqsave(&vt_event_lock, flags); | ||
| 139 | list_del(&vw->list); | ||
| 140 | spin_unlock_irqrestore(&vt_event_lock, flags); | ||
| 141 | } | ||
| 142 | |||
| 143 | /** | ||
| 144 | * vt_event_wait_ioctl - event ioctl handler | ||
| 145 | * @arg: argument to ioctl | ||
| 146 | * | ||
| 147 | * Implement the VT_WAITEVENT ioctl using the VT event interface | ||
| 148 | */ | ||
| 149 | |||
| 150 | static int vt_event_wait_ioctl(struct vt_event __user *event) | ||
| 151 | { | ||
| 152 | struct vt_event_wait vw; | ||
| 153 | |||
| 154 | if (copy_from_user(&vw.event, event, sizeof(struct vt_event))) | ||
| 155 | return -EFAULT; | ||
| 156 | /* Highest supported event for now */ | ||
| 157 | if (vw.event.event & ~VT_MAX_EVENT) | ||
| 158 | return -EINVAL; | ||
| 159 | |||
| 160 | vt_event_wait(&vw); | ||
| 161 | /* If it occurred report it */ | ||
| 162 | if (vw.done) { | ||
| 163 | if (copy_to_user(event, &vw.event, sizeof(struct vt_event))) | ||
| 164 | return -EFAULT; | ||
| 165 | return 0; | ||
| 166 | } | ||
| 167 | return -EINTR; | ||
| 168 | } | ||
| 169 | |||
| 170 | /** | ||
| 171 | * vt_waitactive - active console wait | ||
| 172 | * @event: event code | ||
| 173 | * @n: new console | ||
| 174 | * | ||
| 175 | * Helper for event waits. Used to implement the legacy | ||
| 176 | * event waiting ioctls in terms of events | ||
| 177 | */ | ||
| 178 | |||
| 179 | int vt_waitactive(int n) | ||
| 180 | { | ||
| 181 | struct vt_event_wait vw; | ||
| 182 | do { | ||
| 183 | if (n == fg_console + 1) | ||
| 184 | break; | ||
| 185 | vw.event.event = VT_EVENT_SWITCH; | ||
| 186 | vt_event_wait(&vw); | ||
| 187 | if (vw.done == 0) | ||
| 188 | return -EINTR; | ||
| 189 | } while (vw.event.new != n); | ||
| 190 | return 0; | ||
| 191 | } | ||
| 192 | |||
| 193 | /* | ||
| 65 | * these are the valid i/o ports we're allowed to change. they map all the | 194 | * these are the valid i/o ports we're allowed to change. they map all the |
| 66 | * video ports | 195 | * video ports |
| 67 | */ | 196 | */ |
| @@ -360,6 +489,8 @@ do_unimap_ioctl(int cmd, struct unimapdesc __user *user_ud, int perm, struct vc_ | |||
| 360 | return 0; | 489 | return 0; |
| 361 | } | 490 | } |
| 362 | 491 | ||
| 492 | |||
| 493 | |||
| 363 | /* | 494 | /* |
| 364 | * We handle the console-specific ioctl's here. We allow the | 495 | * We handle the console-specific ioctl's here. We allow the |
| 365 | * capability to modify any console, not just the fg_console. | 496 | * capability to modify any console, not just the fg_console. |
| @@ -842,6 +973,41 @@ int vt_ioctl(struct tty_struct *tty, struct file * file, | |||
| 842 | } | 973 | } |
| 843 | break; | 974 | break; |
| 844 | 975 | ||
| 976 | case VT_SETACTIVATE: | ||
| 977 | { | ||
| 978 | struct vt_setactivate vsa; | ||
| 979 | |||
| 980 | if (!perm) | ||
| 981 | goto eperm; | ||
| 982 | |||
| 983 | if (copy_from_user(&vsa, (struct vt_setactivate __user *)arg, | ||
| 984 | sizeof(struct vt_setactivate))) | ||
| 985 | return -EFAULT; | ||
| 986 | if (vsa.console == 0 || vsa.console > MAX_NR_CONSOLES) | ||
| 987 | ret = -ENXIO; | ||
| 988 | else { | ||
| 989 | vsa.console--; | ||
| 990 | acquire_console_sem(); | ||
| 991 | ret = vc_allocate(vsa.console); | ||
| 992 | if (ret == 0) { | ||
| 993 | struct vc_data *nvc; | ||
| 994 | /* This is safe providing we don't drop the | ||
| 995 | console sem between vc_allocate and | ||
| 996 | finishing referencing nvc */ | ||
| 997 | nvc = vc_cons[vsa.console].d; | ||
| 998 | nvc->vt_mode = vsa.mode; | ||
| 999 | nvc->vt_mode.frsig = 0; | ||
| 1000 | put_pid(nvc->vt_pid); | ||
| 1001 | nvc->vt_pid = get_pid(task_pid(current)); | ||
| 1002 | } | ||
| 1003 | release_console_sem(); | ||
| 1004 | if (ret) | ||
| 1005 | break; | ||
| 1006 | /* Commence switch and lock */ | ||
| 1007 | set_console(arg); | ||
| 1008 | } | ||
| 1009 | } | ||
| 1010 | |||
| 845 | /* | 1011 | /* |
| 846 | * wait until the specified VT has been activated | 1012 | * wait until the specified VT has been activated |
| 847 | */ | 1013 | */ |
| @@ -851,7 +1017,7 @@ int vt_ioctl(struct tty_struct *tty, struct file * file, | |||
| 851 | if (arg == 0 || arg > MAX_NR_CONSOLES) | 1017 | if (arg == 0 || arg > MAX_NR_CONSOLES) |
| 852 | ret = -ENXIO; | 1018 | ret = -ENXIO; |
| 853 | else | 1019 | else |
| 854 | ret = vt_waitactive(arg - 1); | 1020 | ret = vt_waitactive(arg); |
| 855 | break; | 1021 | break; |
| 856 | 1022 | ||
| 857 | /* | 1023 | /* |
| @@ -1159,6 +1325,9 @@ int vt_ioctl(struct tty_struct *tty, struct file * file, | |||
| 1159 | ret = put_user(vc->vc_hi_font_mask, | 1325 | ret = put_user(vc->vc_hi_font_mask, |
| 1160 | (unsigned short __user *)arg); | 1326 | (unsigned short __user *)arg); |
| 1161 | break; | 1327 | break; |
| 1328 | case VT_WAITEVENT: | ||
| 1329 | ret = vt_event_wait_ioctl((struct vt_event __user *)arg); | ||
| 1330 | break; | ||
| 1162 | default: | 1331 | default: |
| 1163 | ret = -ENOIOCTLCMD; | 1332 | ret = -ENOIOCTLCMD; |
| 1164 | } | 1333 | } |
| @@ -1170,54 +1339,6 @@ eperm: | |||
| 1170 | goto out; | 1339 | goto out; |
| 1171 | } | 1340 | } |
| 1172 | 1341 | ||
| 1173 | /* | ||
| 1174 | * Sometimes we want to wait until a particular VT has been activated. We | ||
| 1175 | * do it in a very simple manner. Everybody waits on a single queue and | ||
| 1176 | * get woken up at once. Those that are satisfied go on with their business, | ||
| 1177 | * while those not ready go back to sleep. Seems overkill to add a wait | ||
| 1178 | * to each vt just for this - usually this does nothing! | ||
| 1179 | */ | ||
| 1180 | static DECLARE_WAIT_QUEUE_HEAD(vt_activate_queue); | ||
| 1181 | |||
| 1182 | /* | ||
| 1183 | * Sleeps until a vt is activated, or the task is interrupted. Returns | ||
| 1184 | * 0 if activation, -EINTR if interrupted by a signal handler. | ||
| 1185 | */ | ||
| 1186 | int vt_waitactive(int vt) | ||
| 1187 | { | ||
| 1188 | int retval; | ||
| 1189 | DECLARE_WAITQUEUE(wait, current); | ||
| 1190 | |||
| 1191 | add_wait_queue(&vt_activate_queue, &wait); | ||
| 1192 | for (;;) { | ||
| 1193 | retval = 0; | ||
| 1194 | |||
| 1195 | /* | ||
| 1196 | * Synchronize with redraw_screen(). By acquiring the console | ||
| 1197 | * semaphore we make sure that the console switch is completed | ||
| 1198 | * before we return. If we didn't wait for the semaphore, we | ||
| 1199 | * could return at a point where fg_console has already been | ||
| 1200 | * updated, but the console switch hasn't been completed. | ||
| 1201 | */ | ||
| 1202 | acquire_console_sem(); | ||
| 1203 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 1204 | if (vt == fg_console) { | ||
| 1205 | release_console_sem(); | ||
| 1206 | break; | ||
| 1207 | } | ||
| 1208 | release_console_sem(); | ||
| 1209 | retval = -ERESTARTNOHAND; | ||
| 1210 | if (signal_pending(current)) | ||
| 1211 | break; | ||
| 1212 | schedule(); | ||
| 1213 | } | ||
| 1214 | remove_wait_queue(&vt_activate_queue, &wait); | ||
| 1215 | __set_current_state(TASK_RUNNING); | ||
| 1216 | return retval; | ||
| 1217 | } | ||
| 1218 | |||
| 1219 | #define vt_wake_waitactive() wake_up(&vt_activate_queue) | ||
| 1220 | |||
| 1221 | void reset_vc(struct vc_data *vc) | 1342 | void reset_vc(struct vc_data *vc) |
| 1222 | { | 1343 | { |
| 1223 | vc->vc_mode = KD_TEXT; | 1344 | vc->vc_mode = KD_TEXT; |
| @@ -1256,12 +1377,216 @@ void vc_SAK(struct work_struct *work) | |||
| 1256 | release_console_sem(); | 1377 | release_console_sem(); |
| 1257 | } | 1378 | } |
| 1258 | 1379 | ||
| 1380 | #ifdef CONFIG_COMPAT | ||
| 1381 | |||
| 1382 | struct compat_consolefontdesc { | ||
| 1383 | unsigned short charcount; /* characters in font (256 or 512) */ | ||
| 1384 | unsigned short charheight; /* scan lines per character (1-32) */ | ||
| 1385 | compat_caddr_t chardata; /* font data in expanded form */ | ||
| 1386 | }; | ||
| 1387 | |||
| 1388 | static inline int | ||
| 1389 | compat_fontx_ioctl(int cmd, struct compat_consolefontdesc __user *user_cfd, | ||
| 1390 | int perm, struct console_font_op *op) | ||
| 1391 | { | ||
| 1392 | struct compat_consolefontdesc cfdarg; | ||
| 1393 | int i; | ||
| 1394 | |||
| 1395 | if (copy_from_user(&cfdarg, user_cfd, sizeof(struct compat_consolefontdesc))) | ||
| 1396 | return -EFAULT; | ||
| 1397 | |||
| 1398 | switch (cmd) { | ||
| 1399 | case PIO_FONTX: | ||
| 1400 | if (!perm) | ||
| 1401 | return -EPERM; | ||
| 1402 | op->op = KD_FONT_OP_SET; | ||
| 1403 | op->flags = KD_FONT_FLAG_OLD; | ||
| 1404 | op->width = 8; | ||
| 1405 | op->height = cfdarg.charheight; | ||
| 1406 | op->charcount = cfdarg.charcount; | ||
| 1407 | op->data = compat_ptr(cfdarg.chardata); | ||
| 1408 | return con_font_op(vc_cons[fg_console].d, op); | ||
| 1409 | case GIO_FONTX: | ||
| 1410 | op->op = KD_FONT_OP_GET; | ||
| 1411 | op->flags = KD_FONT_FLAG_OLD; | ||
| 1412 | op->width = 8; | ||
| 1413 | op->height = cfdarg.charheight; | ||
| 1414 | op->charcount = cfdarg.charcount; | ||
| 1415 | op->data = compat_ptr(cfdarg.chardata); | ||
| 1416 | i = con_font_op(vc_cons[fg_console].d, op); | ||
| 1417 | if (i) | ||
| 1418 | return i; | ||
| 1419 | cfdarg.charheight = op->height; | ||
| 1420 | cfdarg.charcount = op->charcount; | ||
| 1421 | if (copy_to_user(user_cfd, &cfdarg, sizeof(struct compat_consolefontdesc))) | ||
| 1422 | return -EFAULT; | ||
| 1423 | return 0; | ||
| 1424 | } | ||
| 1425 | return -EINVAL; | ||
| 1426 | } | ||
| 1427 | |||
| 1428 | struct compat_console_font_op { | ||
| 1429 | compat_uint_t op; /* operation code KD_FONT_OP_* */ | ||
| 1430 | compat_uint_t flags; /* KD_FONT_FLAG_* */ | ||
| 1431 | compat_uint_t width, height; /* font size */ | ||
| 1432 | compat_uint_t charcount; | ||
| 1433 | compat_caddr_t data; /* font data with height fixed to 32 */ | ||
| 1434 | }; | ||
| 1435 | |||
| 1436 | static inline int | ||
| 1437 | compat_kdfontop_ioctl(struct compat_console_font_op __user *fontop, | ||
| 1438 | int perm, struct console_font_op *op, struct vc_data *vc) | ||
| 1439 | { | ||
| 1440 | int i; | ||
| 1441 | |||
| 1442 | if (copy_from_user(op, fontop, sizeof(struct compat_console_font_op))) | ||
| 1443 | return -EFAULT; | ||
| 1444 | if (!perm && op->op != KD_FONT_OP_GET) | ||
| 1445 | return -EPERM; | ||
| 1446 | op->data = compat_ptr(((struct compat_console_font_op *)op)->data); | ||
| 1447 | op->flags |= KD_FONT_FLAG_OLD; | ||
| 1448 | i = con_font_op(vc, op); | ||
| 1449 | if (i) | ||
| 1450 | return i; | ||
| 1451 | ((struct compat_console_font_op *)op)->data = (unsigned long)op->data; | ||
| 1452 | if (copy_to_user(fontop, op, sizeof(struct compat_console_font_op))) | ||
| 1453 | return -EFAULT; | ||
| 1454 | return 0; | ||
| 1455 | } | ||
| 1456 | |||
| 1457 | struct compat_unimapdesc { | ||
| 1458 | unsigned short entry_ct; | ||
| 1459 | compat_caddr_t entries; | ||
| 1460 | }; | ||
| 1461 | |||
| 1462 | static inline int | ||
| 1463 | compat_unimap_ioctl(unsigned int cmd, struct compat_unimapdesc __user *user_ud, | ||
| 1464 | int perm, struct vc_data *vc) | ||
| 1465 | { | ||
| 1466 | struct compat_unimapdesc tmp; | ||
| 1467 | struct unipair __user *tmp_entries; | ||
| 1468 | |||
| 1469 | if (copy_from_user(&tmp, user_ud, sizeof tmp)) | ||
| 1470 | return -EFAULT; | ||
| 1471 | tmp_entries = compat_ptr(tmp.entries); | ||
| 1472 | if (tmp_entries) | ||
| 1473 | if (!access_ok(VERIFY_WRITE, tmp_entries, | ||
| 1474 | tmp.entry_ct*sizeof(struct unipair))) | ||
| 1475 | return -EFAULT; | ||
| 1476 | switch (cmd) { | ||
| 1477 | case PIO_UNIMAP: | ||
| 1478 | if (!perm) | ||
| 1479 | return -EPERM; | ||
| 1480 | return con_set_unimap(vc, tmp.entry_ct, tmp_entries); | ||
| 1481 | case GIO_UNIMAP: | ||
| 1482 | if (!perm && fg_console != vc->vc_num) | ||
| 1483 | return -EPERM; | ||
| 1484 | return con_get_unimap(vc, tmp.entry_ct, &(user_ud->entry_ct), tmp_entries); | ||
| 1485 | } | ||
| 1486 | return 0; | ||
| 1487 | } | ||
| 1488 | |||
| 1489 | long vt_compat_ioctl(struct tty_struct *tty, struct file * file, | ||
| 1490 | unsigned int cmd, unsigned long arg) | ||
| 1491 | { | ||
| 1492 | struct vc_data *vc = tty->driver_data; | ||
| 1493 | struct console_font_op op; /* used in multiple places here */ | ||
| 1494 | struct kbd_struct *kbd; | ||
| 1495 | unsigned int console; | ||
| 1496 | void __user *up = (void __user *)arg; | ||
| 1497 | int perm; | ||
| 1498 | int ret = 0; | ||
| 1499 | |||
| 1500 | console = vc->vc_num; | ||
| 1501 | |||
| 1502 | lock_kernel(); | ||
| 1503 | |||
| 1504 | if (!vc_cons_allocated(console)) { /* impossible? */ | ||
| 1505 | ret = -ENOIOCTLCMD; | ||
| 1506 | goto out; | ||
| 1507 | } | ||
| 1508 | |||
| 1509 | /* | ||
| 1510 | * To have permissions to do most of the vt ioctls, we either have | ||
| 1511 | * to be the owner of the tty, or have CAP_SYS_TTY_CONFIG. | ||
| 1512 | */ | ||
| 1513 | perm = 0; | ||
| 1514 | if (current->signal->tty == tty || capable(CAP_SYS_TTY_CONFIG)) | ||
| 1515 | perm = 1; | ||
| 1516 | |||
| 1517 | kbd = kbd_table + console; | ||
| 1518 | switch (cmd) { | ||
| 1519 | /* | ||
| 1520 | * these need special handlers for incompatible data structures | ||
| 1521 | */ | ||
| 1522 | case PIO_FONTX: | ||
| 1523 | case GIO_FONTX: | ||
| 1524 | ret = compat_fontx_ioctl(cmd, up, perm, &op); | ||
| 1525 | break; | ||
| 1526 | |||
| 1527 | case KDFONTOP: | ||
| 1528 | ret = compat_kdfontop_ioctl(up, perm, &op, vc); | ||
| 1529 | break; | ||
| 1530 | |||
| 1531 | case PIO_UNIMAP: | ||
| 1532 | case GIO_UNIMAP: | ||
| 1533 | ret = do_unimap_ioctl(cmd, up, perm, vc); | ||
| 1534 | break; | ||
| 1535 | |||
| 1536 | /* | ||
| 1537 | * all these treat 'arg' as an integer | ||
| 1538 | */ | ||
| 1539 | case KIOCSOUND: | ||
| 1540 | case KDMKTONE: | ||
| 1541 | #ifdef CONFIG_X86 | ||
| 1542 | case KDADDIO: | ||
| 1543 | case KDDELIO: | ||
| 1544 | #endif | ||
| 1545 | case KDSETMODE: | ||
| 1546 | case KDMAPDISP: | ||
| 1547 | case KDUNMAPDISP: | ||
| 1548 | case KDSKBMODE: | ||
| 1549 | case KDSKBMETA: | ||
| 1550 | case KDSKBLED: | ||
| 1551 | case KDSETLED: | ||
| 1552 | case KDSIGACCEPT: | ||
| 1553 | case VT_ACTIVATE: | ||
| 1554 | case VT_WAITACTIVE: | ||
| 1555 | case VT_RELDISP: | ||
| 1556 | case VT_DISALLOCATE: | ||
| 1557 | case VT_RESIZE: | ||
| 1558 | case VT_RESIZEX: | ||
| 1559 | goto fallback; | ||
| 1560 | |||
| 1561 | /* | ||
| 1562 | * the rest has a compatible data structure behind arg, | ||
| 1563 | * but we have to convert it to a proper 64 bit pointer. | ||
| 1564 | */ | ||
| 1565 | default: | ||
| 1566 | arg = (unsigned long)compat_ptr(arg); | ||
| 1567 | goto fallback; | ||
| 1568 | } | ||
| 1569 | out: | ||
| 1570 | unlock_kernel(); | ||
| 1571 | return ret; | ||
| 1572 | |||
| 1573 | fallback: | ||
| 1574 | unlock_kernel(); | ||
| 1575 | return vt_ioctl(tty, file, cmd, arg); | ||
| 1576 | } | ||
| 1577 | |||
| 1578 | |||
| 1579 | #endif /* CONFIG_COMPAT */ | ||
| 1580 | |||
| 1581 | |||
| 1259 | /* | 1582 | /* |
| 1260 | * Performs the back end of a vt switch | 1583 | * Performs the back end of a vt switch. Called under the console |
| 1584 | * semaphore. | ||
| 1261 | */ | 1585 | */ |
| 1262 | static void complete_change_console(struct vc_data *vc) | 1586 | static void complete_change_console(struct vc_data *vc) |
| 1263 | { | 1587 | { |
| 1264 | unsigned char old_vc_mode; | 1588 | unsigned char old_vc_mode; |
| 1589 | int old = fg_console; | ||
| 1265 | 1590 | ||
| 1266 | last_console = fg_console; | 1591 | last_console = fg_console; |
| 1267 | 1592 | ||
| @@ -1325,7 +1650,7 @@ static void complete_change_console(struct vc_data *vc) | |||
| 1325 | /* | 1650 | /* |
| 1326 | * Wake anyone waiting for their VT to activate | 1651 | * Wake anyone waiting for their VT to activate |
| 1327 | */ | 1652 | */ |
| 1328 | vt_wake_waitactive(); | 1653 | vt_event_post(VT_EVENT_SWITCH, old, vc->vc_num); |
| 1329 | return; | 1654 | return; |
| 1330 | } | 1655 | } |
| 1331 | 1656 | ||
| @@ -1398,3 +1723,58 @@ void change_console(struct vc_data *new_vc) | |||
| 1398 | 1723 | ||
| 1399 | complete_change_console(new_vc); | 1724 | complete_change_console(new_vc); |
| 1400 | } | 1725 | } |
| 1726 | |||
| 1727 | /* Perform a kernel triggered VT switch for suspend/resume */ | ||
| 1728 | |||
| 1729 | static int disable_vt_switch; | ||
| 1730 | |||
| 1731 | int vt_move_to_console(unsigned int vt, int alloc) | ||
| 1732 | { | ||
| 1733 | int prev; | ||
| 1734 | |||
| 1735 | acquire_console_sem(); | ||
| 1736 | /* Graphics mode - up to X */ | ||
| 1737 | if (disable_vt_switch) { | ||
| 1738 | release_console_sem(); | ||
| 1739 | return 0; | ||
| 1740 | } | ||
| 1741 | prev = fg_console; | ||
| 1742 | |||
| 1743 | if (alloc && vc_allocate(vt)) { | ||
| 1744 | /* we can't have a free VC for now. Too bad, | ||
| 1745 | * we don't want to mess the screen for now. */ | ||
| 1746 | release_console_sem(); | ||
| 1747 | return -ENOSPC; | ||
| 1748 | } | ||
| 1749 | |||
| 1750 | if (set_console(vt)) { | ||
| 1751 | /* | ||
| 1752 | * We're unable to switch to the SUSPEND_CONSOLE. | ||
| 1753 | * Let the calling function know so it can decide | ||
| 1754 | * what to do. | ||
| 1755 | */ | ||
| 1756 | release_console_sem(); | ||
| 1757 | return -EIO; | ||
| 1758 | } | ||
| 1759 | release_console_sem(); | ||
| 1760 | if (vt_waitactive(vt + 1)) { | ||
| 1761 | pr_debug("Suspend: Can't switch VCs."); | ||
| 1762 | return -EINTR; | ||
| 1763 | } | ||
| 1764 | return prev; | ||
| 1765 | } | ||
| 1766 | |||
| 1767 | /* | ||
| 1768 | * Normally during a suspend, we allocate a new console and switch to it. | ||
| 1769 | * When we resume, we switch back to the original console. This switch | ||
| 1770 | * can be slow, so on systems where the framebuffer can handle restoration | ||
| 1771 | * of video registers anyways, there's little point in doing the console | ||
| 1772 | * switch. This function allows you to disable it by passing it '0'. | ||
| 1773 | */ | ||
| 1774 | void pm_set_vt_switch(int do_switch) | ||
| 1775 | { | ||
| 1776 | acquire_console_sem(); | ||
| 1777 | disable_vt_switch = !do_switch; | ||
| 1778 | release_console_sem(); | ||
| 1779 | } | ||
| 1780 | EXPORT_SYMBOL(pm_set_vt_switch); | ||
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c index 2968ed6a9c49..3938c7817095 100644 --- a/drivers/cpufreq/cpufreq.c +++ b/drivers/cpufreq/cpufreq.c | |||
| @@ -61,6 +61,8 @@ static DEFINE_SPINLOCK(cpufreq_driver_lock); | |||
| 61 | * are concerned with are online after they get the lock. | 61 | * are concerned with are online after they get the lock. |
| 62 | * - Governor routines that can be called in cpufreq hotplug path should not | 62 | * - Governor routines that can be called in cpufreq hotplug path should not |
| 63 | * take this sem as top level hotplug notifier handler takes this. | 63 | * take this sem as top level hotplug notifier handler takes this. |
| 64 | * - Lock should not be held across | ||
| 65 | * __cpufreq_governor(data, CPUFREQ_GOV_STOP); | ||
| 64 | */ | 66 | */ |
| 65 | static DEFINE_PER_CPU(int, policy_cpu); | 67 | static DEFINE_PER_CPU(int, policy_cpu); |
| 66 | static DEFINE_PER_CPU(struct rw_semaphore, cpu_policy_rwsem); | 68 | static DEFINE_PER_CPU(struct rw_semaphore, cpu_policy_rwsem); |
| @@ -686,6 +688,9 @@ static struct attribute *default_attrs[] = { | |||
| 686 | NULL | 688 | NULL |
| 687 | }; | 689 | }; |
| 688 | 690 | ||
| 691 | struct kobject *cpufreq_global_kobject; | ||
| 692 | EXPORT_SYMBOL(cpufreq_global_kobject); | ||
| 693 | |||
| 689 | #define to_policy(k) container_of(k, struct cpufreq_policy, kobj) | 694 | #define to_policy(k) container_of(k, struct cpufreq_policy, kobj) |
| 690 | #define to_attr(a) container_of(a, struct freq_attr, attr) | 695 | #define to_attr(a) container_of(a, struct freq_attr, attr) |
| 691 | 696 | ||
| @@ -756,92 +761,20 @@ static struct kobj_type ktype_cpufreq = { | |||
| 756 | .release = cpufreq_sysfs_release, | 761 | .release = cpufreq_sysfs_release, |
| 757 | }; | 762 | }; |
| 758 | 763 | ||
| 759 | 764 | /* | |
| 760 | /** | 765 | * Returns: |
| 761 | * cpufreq_add_dev - add a CPU device | 766 | * Negative: Failure |
| 762 | * | 767 | * 0: Success |
| 763 | * Adds the cpufreq interface for a CPU device. | 768 | * Positive: When we have a managed CPU and the sysfs got symlinked |
| 764 | * | ||
| 765 | * The Oracle says: try running cpufreq registration/unregistration concurrently | ||
| 766 | * with with cpu hotplugging and all hell will break loose. Tried to clean this | ||
| 767 | * mess up, but more thorough testing is needed. - Mathieu | ||
| 768 | */ | 769 | */ |
| 769 | static int cpufreq_add_dev(struct sys_device *sys_dev) | 770 | int cpufreq_add_dev_policy(unsigned int cpu, struct cpufreq_policy *policy, |
| 771 | struct sys_device *sys_dev) | ||
| 770 | { | 772 | { |
| 771 | unsigned int cpu = sys_dev->id; | ||
| 772 | int ret = 0; | 773 | int ret = 0; |
| 773 | struct cpufreq_policy new_policy; | 774 | #ifdef CONFIG_SMP |
| 774 | struct cpufreq_policy *policy; | ||
| 775 | struct freq_attr **drv_attr; | ||
| 776 | struct sys_device *cpu_sys_dev; | ||
| 777 | unsigned long flags; | 775 | unsigned long flags; |
| 778 | unsigned int j; | 776 | unsigned int j; |
| 779 | 777 | ||
| 780 | if (cpu_is_offline(cpu)) | ||
| 781 | return 0; | ||
| 782 | |||
| 783 | cpufreq_debug_disable_ratelimit(); | ||
| 784 | dprintk("adding CPU %u\n", cpu); | ||
| 785 | |||
| 786 | #ifdef CONFIG_SMP | ||
| 787 | /* check whether a different CPU already registered this | ||
| 788 | * CPU because it is in the same boat. */ | ||
| 789 | policy = cpufreq_cpu_get(cpu); | ||
| 790 | if (unlikely(policy)) { | ||
| 791 | cpufreq_cpu_put(policy); | ||
| 792 | cpufreq_debug_enable_ratelimit(); | ||
| 793 | return 0; | ||
| 794 | } | ||
| 795 | #endif | ||
| 796 | |||
| 797 | if (!try_module_get(cpufreq_driver->owner)) { | ||
| 798 | ret = -EINVAL; | ||
| 799 | goto module_out; | ||
| 800 | } | ||
| 801 | |||
| 802 | policy = kzalloc(sizeof(struct cpufreq_policy), GFP_KERNEL); | ||
| 803 | if (!policy) { | ||
| 804 | ret = -ENOMEM; | ||
| 805 | goto nomem_out; | ||
| 806 | } | ||
| 807 | if (!alloc_cpumask_var(&policy->cpus, GFP_KERNEL)) { | ||
| 808 | ret = -ENOMEM; | ||
| 809 | goto err_free_policy; | ||
| 810 | } | ||
| 811 | if (!zalloc_cpumask_var(&policy->related_cpus, GFP_KERNEL)) { | ||
| 812 | ret = -ENOMEM; | ||
| 813 | goto err_free_cpumask; | ||
| 814 | } | ||
| 815 | |||
| 816 | policy->cpu = cpu; | ||
| 817 | cpumask_copy(policy->cpus, cpumask_of(cpu)); | ||
| 818 | |||
| 819 | /* Initially set CPU itself as the policy_cpu */ | ||
| 820 | per_cpu(policy_cpu, cpu) = cpu; | ||
| 821 | ret = (lock_policy_rwsem_write(cpu) < 0); | ||
| 822 | WARN_ON(ret); | ||
| 823 | |||
| 824 | init_completion(&policy->kobj_unregister); | ||
| 825 | INIT_WORK(&policy->update, handle_update); | ||
| 826 | |||
| 827 | /* Set governor before ->init, so that driver could check it */ | ||
| 828 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | ||
| 829 | /* call driver. From then on the cpufreq must be able | ||
| 830 | * to accept all calls to ->verify and ->setpolicy for this CPU | ||
| 831 | */ | ||
| 832 | ret = cpufreq_driver->init(policy); | ||
| 833 | if (ret) { | ||
| 834 | dprintk("initialization failed\n"); | ||
| 835 | goto err_unlock_policy; | ||
| 836 | } | ||
| 837 | policy->user_policy.min = policy->min; | ||
| 838 | policy->user_policy.max = policy->max; | ||
| 839 | |||
| 840 | blocking_notifier_call_chain(&cpufreq_policy_notifier_list, | ||
| 841 | CPUFREQ_START, policy); | ||
| 842 | |||
| 843 | #ifdef CONFIG_SMP | ||
| 844 | |||
| 845 | #ifdef CONFIG_HOTPLUG_CPU | 778 | #ifdef CONFIG_HOTPLUG_CPU |
| 846 | if (per_cpu(cpufreq_cpu_governor, cpu)) { | 779 | if (per_cpu(cpufreq_cpu_governor, cpu)) { |
| 847 | policy->governor = per_cpu(cpufreq_cpu_governor, cpu); | 780 | policy->governor = per_cpu(cpufreq_cpu_governor, cpu); |
| @@ -872,9 +805,8 @@ static int cpufreq_add_dev(struct sys_device *sys_dev) | |||
| 872 | /* Should not go through policy unlock path */ | 805 | /* Should not go through policy unlock path */ |
| 873 | if (cpufreq_driver->exit) | 806 | if (cpufreq_driver->exit) |
| 874 | cpufreq_driver->exit(policy); | 807 | cpufreq_driver->exit(policy); |
| 875 | ret = -EBUSY; | ||
| 876 | cpufreq_cpu_put(managed_policy); | 808 | cpufreq_cpu_put(managed_policy); |
| 877 | goto err_free_cpumask; | 809 | return -EBUSY; |
| 878 | } | 810 | } |
| 879 | 811 | ||
| 880 | spin_lock_irqsave(&cpufreq_driver_lock, flags); | 812 | spin_lock_irqsave(&cpufreq_driver_lock, flags); |
| @@ -893,17 +825,62 @@ static int cpufreq_add_dev(struct sys_device *sys_dev) | |||
| 893 | * Call driver->exit() because only the cpu parent of | 825 | * Call driver->exit() because only the cpu parent of |
| 894 | * the kobj needed to call init(). | 826 | * the kobj needed to call init(). |
| 895 | */ | 827 | */ |
| 896 | goto out_driver_exit; /* call driver->exit() */ | 828 | if (cpufreq_driver->exit) |
| 829 | cpufreq_driver->exit(policy); | ||
| 830 | |||
| 831 | if (!ret) | ||
| 832 | return 1; | ||
| 833 | else | ||
| 834 | return ret; | ||
| 897 | } | 835 | } |
| 898 | } | 836 | } |
| 899 | #endif | 837 | #endif |
| 900 | memcpy(&new_policy, policy, sizeof(struct cpufreq_policy)); | 838 | return ret; |
| 839 | } | ||
| 840 | |||
| 841 | |||
| 842 | /* symlink affected CPUs */ | ||
| 843 | int cpufreq_add_dev_symlink(unsigned int cpu, struct cpufreq_policy *policy) | ||
| 844 | { | ||
| 845 | unsigned int j; | ||
| 846 | int ret = 0; | ||
| 847 | |||
| 848 | for_each_cpu(j, policy->cpus) { | ||
| 849 | struct cpufreq_policy *managed_policy; | ||
| 850 | struct sys_device *cpu_sys_dev; | ||
| 851 | |||
| 852 | if (j == cpu) | ||
| 853 | continue; | ||
| 854 | if (!cpu_online(j)) | ||
| 855 | continue; | ||
| 856 | |||
| 857 | dprintk("CPU %u already managed, adding link\n", j); | ||
| 858 | managed_policy = cpufreq_cpu_get(cpu); | ||
| 859 | cpu_sys_dev = get_cpu_sysdev(j); | ||
| 860 | ret = sysfs_create_link(&cpu_sys_dev->kobj, &policy->kobj, | ||
| 861 | "cpufreq"); | ||
| 862 | if (ret) { | ||
| 863 | cpufreq_cpu_put(managed_policy); | ||
| 864 | return ret; | ||
| 865 | } | ||
| 866 | } | ||
| 867 | return ret; | ||
| 868 | } | ||
| 869 | |||
| 870 | int cpufreq_add_dev_interface(unsigned int cpu, struct cpufreq_policy *policy, | ||
| 871 | struct sys_device *sys_dev) | ||
| 872 | { | ||
| 873 | struct cpufreq_policy new_policy; | ||
| 874 | struct freq_attr **drv_attr; | ||
| 875 | unsigned long flags; | ||
| 876 | int ret = 0; | ||
| 877 | unsigned int j; | ||
| 901 | 878 | ||
| 902 | /* prepare interface data */ | 879 | /* prepare interface data */ |
| 903 | ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq, &sys_dev->kobj, | 880 | ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq, |
| 904 | "cpufreq"); | 881 | &sys_dev->kobj, "cpufreq"); |
| 905 | if (ret) | 882 | if (ret) |
| 906 | goto out_driver_exit; | 883 | return ret; |
| 907 | 884 | ||
| 908 | /* set up files for this cpu device */ | 885 | /* set up files for this cpu device */ |
| 909 | drv_attr = cpufreq_driver->attr; | 886 | drv_attr = cpufreq_driver->attr; |
| @@ -926,35 +903,20 @@ static int cpufreq_add_dev(struct sys_device *sys_dev) | |||
| 926 | 903 | ||
| 927 | spin_lock_irqsave(&cpufreq_driver_lock, flags); | 904 | spin_lock_irqsave(&cpufreq_driver_lock, flags); |
| 928 | for_each_cpu(j, policy->cpus) { | 905 | for_each_cpu(j, policy->cpus) { |
| 929 | if (!cpu_online(j)) | 906 | if (!cpu_online(j)) |
| 930 | continue; | 907 | continue; |
| 931 | per_cpu(cpufreq_cpu_data, j) = policy; | 908 | per_cpu(cpufreq_cpu_data, j) = policy; |
| 932 | per_cpu(policy_cpu, j) = policy->cpu; | 909 | per_cpu(policy_cpu, j) = policy->cpu; |
| 933 | } | 910 | } |
| 934 | spin_unlock_irqrestore(&cpufreq_driver_lock, flags); | 911 | spin_unlock_irqrestore(&cpufreq_driver_lock, flags); |
| 935 | 912 | ||
| 936 | /* symlink affected CPUs */ | 913 | ret = cpufreq_add_dev_symlink(cpu, policy); |
| 937 | for_each_cpu(j, policy->cpus) { | 914 | if (ret) |
| 938 | struct cpufreq_policy *managed_policy; | 915 | goto err_out_kobj_put; |
| 939 | |||
| 940 | if (j == cpu) | ||
| 941 | continue; | ||
| 942 | if (!cpu_online(j)) | ||
| 943 | continue; | ||
| 944 | |||
| 945 | dprintk("CPU %u already managed, adding link\n", j); | ||
| 946 | managed_policy = cpufreq_cpu_get(cpu); | ||
| 947 | cpu_sys_dev = get_cpu_sysdev(j); | ||
| 948 | ret = sysfs_create_link(&cpu_sys_dev->kobj, &policy->kobj, | ||
| 949 | "cpufreq"); | ||
| 950 | if (ret) { | ||
| 951 | cpufreq_cpu_put(managed_policy); | ||
| 952 | goto err_out_unregister; | ||
| 953 | } | ||
| 954 | } | ||
| 955 | 916 | ||
| 956 | policy->governor = NULL; /* to assure that the starting sequence is | 917 | memcpy(&new_policy, policy, sizeof(struct cpufreq_policy)); |
| 957 | * run in cpufreq_set_policy */ | 918 | /* assure that the starting sequence is run in __cpufreq_set_policy */ |
| 919 | policy->governor = NULL; | ||
| 958 | 920 | ||
| 959 | /* set default policy */ | 921 | /* set default policy */ |
| 960 | ret = __cpufreq_set_policy(policy, &new_policy); | 922 | ret = __cpufreq_set_policy(policy, &new_policy); |
| @@ -963,8 +925,107 @@ static int cpufreq_add_dev(struct sys_device *sys_dev) | |||
| 963 | 925 | ||
| 964 | if (ret) { | 926 | if (ret) { |
| 965 | dprintk("setting policy failed\n"); | 927 | dprintk("setting policy failed\n"); |
| 966 | goto err_out_unregister; | 928 | if (cpufreq_driver->exit) |
| 929 | cpufreq_driver->exit(policy); | ||
| 930 | } | ||
| 931 | return ret; | ||
| 932 | |||
| 933 | err_out_kobj_put: | ||
| 934 | kobject_put(&policy->kobj); | ||
| 935 | wait_for_completion(&policy->kobj_unregister); | ||
| 936 | return ret; | ||
| 937 | } | ||
| 938 | |||
| 939 | |||
| 940 | /** | ||
| 941 | * cpufreq_add_dev - add a CPU device | ||
| 942 | * | ||
| 943 | * Adds the cpufreq interface for a CPU device. | ||
| 944 | * | ||
| 945 | * The Oracle says: try running cpufreq registration/unregistration concurrently | ||
| 946 | * with with cpu hotplugging and all hell will break loose. Tried to clean this | ||
| 947 | * mess up, but more thorough testing is needed. - Mathieu | ||
| 948 | */ | ||
| 949 | static int cpufreq_add_dev(struct sys_device *sys_dev) | ||
| 950 | { | ||
| 951 | unsigned int cpu = sys_dev->id; | ||
| 952 | int ret = 0; | ||
| 953 | struct cpufreq_policy *policy; | ||
| 954 | unsigned long flags; | ||
| 955 | unsigned int j; | ||
| 956 | |||
| 957 | if (cpu_is_offline(cpu)) | ||
| 958 | return 0; | ||
| 959 | |||
| 960 | cpufreq_debug_disable_ratelimit(); | ||
| 961 | dprintk("adding CPU %u\n", cpu); | ||
| 962 | |||
| 963 | #ifdef CONFIG_SMP | ||
| 964 | /* check whether a different CPU already registered this | ||
| 965 | * CPU because it is in the same boat. */ | ||
| 966 | policy = cpufreq_cpu_get(cpu); | ||
| 967 | if (unlikely(policy)) { | ||
| 968 | cpufreq_cpu_put(policy); | ||
| 969 | cpufreq_debug_enable_ratelimit(); | ||
| 970 | return 0; | ||
| 971 | } | ||
| 972 | #endif | ||
| 973 | |||
| 974 | if (!try_module_get(cpufreq_driver->owner)) { | ||
| 975 | ret = -EINVAL; | ||
| 976 | goto module_out; | ||
| 977 | } | ||
| 978 | |||
| 979 | ret = -ENOMEM; | ||
| 980 | policy = kzalloc(sizeof(struct cpufreq_policy), GFP_KERNEL); | ||
| 981 | if (!policy) | ||
| 982 | goto nomem_out; | ||
| 983 | |||
| 984 | if (!alloc_cpumask_var(&policy->cpus, GFP_KERNEL)) | ||
| 985 | goto err_free_policy; | ||
| 986 | |||
| 987 | if (!zalloc_cpumask_var(&policy->related_cpus, GFP_KERNEL)) | ||
| 988 | goto err_free_cpumask; | ||
| 989 | |||
| 990 | policy->cpu = cpu; | ||
| 991 | cpumask_copy(policy->cpus, cpumask_of(cpu)); | ||
| 992 | |||
| 993 | /* Initially set CPU itself as the policy_cpu */ | ||
| 994 | per_cpu(policy_cpu, cpu) = cpu; | ||
| 995 | ret = (lock_policy_rwsem_write(cpu) < 0); | ||
| 996 | WARN_ON(ret); | ||
| 997 | |||
| 998 | init_completion(&policy->kobj_unregister); | ||
| 999 | INIT_WORK(&policy->update, handle_update); | ||
| 1000 | |||
| 1001 | /* Set governor before ->init, so that driver could check it */ | ||
| 1002 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | ||
| 1003 | /* call driver. From then on the cpufreq must be able | ||
| 1004 | * to accept all calls to ->verify and ->setpolicy for this CPU | ||
| 1005 | */ | ||
| 1006 | ret = cpufreq_driver->init(policy); | ||
| 1007 | if (ret) { | ||
| 1008 | dprintk("initialization failed\n"); | ||
| 1009 | goto err_unlock_policy; | ||
| 967 | } | 1010 | } |
| 1011 | policy->user_policy.min = policy->min; | ||
| 1012 | policy->user_policy.max = policy->max; | ||
| 1013 | |||
| 1014 | blocking_notifier_call_chain(&cpufreq_policy_notifier_list, | ||
| 1015 | CPUFREQ_START, policy); | ||
| 1016 | |||
| 1017 | ret = cpufreq_add_dev_policy(cpu, policy, sys_dev); | ||
| 1018 | if (ret) { | ||
| 1019 | if (ret > 0) | ||
| 1020 | /* This is a managed cpu, symlink created, | ||
| 1021 | exit with 0 */ | ||
| 1022 | ret = 0; | ||
| 1023 | goto err_unlock_policy; | ||
| 1024 | } | ||
| 1025 | |||
| 1026 | ret = cpufreq_add_dev_interface(cpu, policy, sys_dev); | ||
| 1027 | if (ret) | ||
| 1028 | goto err_out_unregister; | ||
| 968 | 1029 | ||
| 969 | unlock_policy_rwsem_write(cpu); | 1030 | unlock_policy_rwsem_write(cpu); |
| 970 | 1031 | ||
| @@ -982,14 +1043,9 @@ err_out_unregister: | |||
| 982 | per_cpu(cpufreq_cpu_data, j) = NULL; | 1043 | per_cpu(cpufreq_cpu_data, j) = NULL; |
| 983 | spin_unlock_irqrestore(&cpufreq_driver_lock, flags); | 1044 | spin_unlock_irqrestore(&cpufreq_driver_lock, flags); |
| 984 | 1045 | ||
| 985 | err_out_kobj_put: | ||
| 986 | kobject_put(&policy->kobj); | 1046 | kobject_put(&policy->kobj); |
| 987 | wait_for_completion(&policy->kobj_unregister); | 1047 | wait_for_completion(&policy->kobj_unregister); |
| 988 | 1048 | ||
| 989 | out_driver_exit: | ||
| 990 | if (cpufreq_driver->exit) | ||
| 991 | cpufreq_driver->exit(policy); | ||
| 992 | |||
| 993 | err_unlock_policy: | 1049 | err_unlock_policy: |
| 994 | unlock_policy_rwsem_write(cpu); | 1050 | unlock_policy_rwsem_write(cpu); |
| 995 | err_free_cpumask: | 1051 | err_free_cpumask: |
| @@ -1653,8 +1709,17 @@ static int __cpufreq_set_policy(struct cpufreq_policy *data, | |||
| 1653 | dprintk("governor switch\n"); | 1709 | dprintk("governor switch\n"); |
| 1654 | 1710 | ||
| 1655 | /* end old governor */ | 1711 | /* end old governor */ |
| 1656 | if (data->governor) | 1712 | if (data->governor) { |
| 1713 | /* | ||
| 1714 | * Need to release the rwsem around governor | ||
| 1715 | * stop due to lock dependency between | ||
| 1716 | * cancel_delayed_work_sync and the read lock | ||
| 1717 | * taken in the delayed work handler. | ||
| 1718 | */ | ||
| 1719 | unlock_policy_rwsem_write(data->cpu); | ||
| 1657 | __cpufreq_governor(data, CPUFREQ_GOV_STOP); | 1720 | __cpufreq_governor(data, CPUFREQ_GOV_STOP); |
| 1721 | lock_policy_rwsem_write(data->cpu); | ||
| 1722 | } | ||
| 1658 | 1723 | ||
| 1659 | /* start new governor */ | 1724 | /* start new governor */ |
| 1660 | data->governor = policy->governor; | 1725 | data->governor = policy->governor; |
| @@ -1884,7 +1949,11 @@ static int __init cpufreq_core_init(void) | |||
| 1884 | per_cpu(policy_cpu, cpu) = -1; | 1949 | per_cpu(policy_cpu, cpu) = -1; |
| 1885 | init_rwsem(&per_cpu(cpu_policy_rwsem, cpu)); | 1950 | init_rwsem(&per_cpu(cpu_policy_rwsem, cpu)); |
| 1886 | } | 1951 | } |
| 1952 | |||
| 1953 | cpufreq_global_kobject = kobject_create_and_add("cpufreq", | ||
| 1954 | &cpu_sysdev_class.kset.kobj); | ||
| 1955 | BUG_ON(!cpufreq_global_kobject); | ||
| 1956 | |||
| 1887 | return 0; | 1957 | return 0; |
| 1888 | } | 1958 | } |
| 1889 | |||
| 1890 | core_initcall(cpufreq_core_init); | 1959 | core_initcall(cpufreq_core_init); |
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c index d7a528c80de8..071699de50ee 100644 --- a/drivers/cpufreq/cpufreq_ondemand.c +++ b/drivers/cpufreq/cpufreq_ondemand.c | |||
| @@ -55,6 +55,18 @@ static unsigned int min_sampling_rate; | |||
| 55 | #define TRANSITION_LATENCY_LIMIT (10 * 1000 * 1000) | 55 | #define TRANSITION_LATENCY_LIMIT (10 * 1000 * 1000) |
| 56 | 56 | ||
| 57 | static void do_dbs_timer(struct work_struct *work); | 57 | static void do_dbs_timer(struct work_struct *work); |
| 58 | static int cpufreq_governor_dbs(struct cpufreq_policy *policy, | ||
| 59 | unsigned int event); | ||
| 60 | |||
| 61 | #ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND | ||
| 62 | static | ||
| 63 | #endif | ||
| 64 | struct cpufreq_governor cpufreq_gov_ondemand = { | ||
| 65 | .name = "ondemand", | ||
| 66 | .governor = cpufreq_governor_dbs, | ||
| 67 | .max_transition_latency = TRANSITION_LATENCY_LIMIT, | ||
| 68 | .owner = THIS_MODULE, | ||
| 69 | }; | ||
| 58 | 70 | ||
| 59 | /* Sampling types */ | 71 | /* Sampling types */ |
| 60 | enum {DBS_NORMAL_SAMPLE, DBS_SUB_SAMPLE}; | 72 | enum {DBS_NORMAL_SAMPLE, DBS_SUB_SAMPLE}; |
| @@ -207,20 +219,23 @@ static void ondemand_powersave_bias_init(void) | |||
| 207 | } | 219 | } |
| 208 | 220 | ||
| 209 | /************************** sysfs interface ************************/ | 221 | /************************** sysfs interface ************************/ |
| 210 | static ssize_t show_sampling_rate_max(struct cpufreq_policy *policy, char *buf) | 222 | |
| 223 | static ssize_t show_sampling_rate_max(struct kobject *kobj, | ||
| 224 | struct attribute *attr, char *buf) | ||
| 211 | { | 225 | { |
| 212 | printk_once(KERN_INFO "CPUFREQ: ondemand sampling_rate_max " | 226 | printk_once(KERN_INFO "CPUFREQ: ondemand sampling_rate_max " |
| 213 | "sysfs file is deprecated - used by: %s\n", current->comm); | 227 | "sysfs file is deprecated - used by: %s\n", current->comm); |
| 214 | return sprintf(buf, "%u\n", -1U); | 228 | return sprintf(buf, "%u\n", -1U); |
| 215 | } | 229 | } |
| 216 | 230 | ||
| 217 | static ssize_t show_sampling_rate_min(struct cpufreq_policy *policy, char *buf) | 231 | static ssize_t show_sampling_rate_min(struct kobject *kobj, |
| 232 | struct attribute *attr, char *buf) | ||
| 218 | { | 233 | { |
| 219 | return sprintf(buf, "%u\n", min_sampling_rate); | 234 | return sprintf(buf, "%u\n", min_sampling_rate); |
| 220 | } | 235 | } |
| 221 | 236 | ||
| 222 | #define define_one_ro(_name) \ | 237 | #define define_one_ro(_name) \ |
| 223 | static struct freq_attr _name = \ | 238 | static struct global_attr _name = \ |
| 224 | __ATTR(_name, 0444, show_##_name, NULL) | 239 | __ATTR(_name, 0444, show_##_name, NULL) |
| 225 | 240 | ||
| 226 | define_one_ro(sampling_rate_max); | 241 | define_one_ro(sampling_rate_max); |
| @@ -229,7 +244,7 @@ define_one_ro(sampling_rate_min); | |||
| 229 | /* cpufreq_ondemand Governor Tunables */ | 244 | /* cpufreq_ondemand Governor Tunables */ |
| 230 | #define show_one(file_name, object) \ | 245 | #define show_one(file_name, object) \ |
| 231 | static ssize_t show_##file_name \ | 246 | static ssize_t show_##file_name \ |
| 232 | (struct cpufreq_policy *unused, char *buf) \ | 247 | (struct kobject *kobj, struct attribute *attr, char *buf) \ |
| 233 | { \ | 248 | { \ |
| 234 | return sprintf(buf, "%u\n", dbs_tuners_ins.object); \ | 249 | return sprintf(buf, "%u\n", dbs_tuners_ins.object); \ |
| 235 | } | 250 | } |
| @@ -238,8 +253,38 @@ show_one(up_threshold, up_threshold); | |||
| 238 | show_one(ignore_nice_load, ignore_nice); | 253 | show_one(ignore_nice_load, ignore_nice); |
| 239 | show_one(powersave_bias, powersave_bias); | 254 | show_one(powersave_bias, powersave_bias); |
| 240 | 255 | ||
| 241 | static ssize_t store_sampling_rate(struct cpufreq_policy *unused, | 256 | /*** delete after deprecation time ***/ |
| 242 | const char *buf, size_t count) | 257 | |
| 258 | #define DEPRECATION_MSG(file_name) \ | ||
| 259 | printk_once(KERN_INFO "CPUFREQ: Per core ondemand sysfs " \ | ||
| 260 | "interface is deprecated - " #file_name "\n"); | ||
| 261 | |||
| 262 | #define show_one_old(file_name) \ | ||
| 263 | static ssize_t show_##file_name##_old \ | ||
| 264 | (struct cpufreq_policy *unused, char *buf) \ | ||
| 265 | { \ | ||
| 266 | printk_once(KERN_INFO "CPUFREQ: Per core ondemand sysfs " \ | ||
| 267 | "interface is deprecated - " #file_name "\n"); \ | ||
| 268 | return show_##file_name(NULL, NULL, buf); \ | ||
| 269 | } | ||
| 270 | show_one_old(sampling_rate); | ||
| 271 | show_one_old(up_threshold); | ||
| 272 | show_one_old(ignore_nice_load); | ||
| 273 | show_one_old(powersave_bias); | ||
| 274 | show_one_old(sampling_rate_min); | ||
| 275 | show_one_old(sampling_rate_max); | ||
| 276 | |||
| 277 | #define define_one_ro_old(object, _name) \ | ||
| 278 | static struct freq_attr object = \ | ||
| 279 | __ATTR(_name, 0444, show_##_name##_old, NULL) | ||
| 280 | |||
| 281 | define_one_ro_old(sampling_rate_min_old, sampling_rate_min); | ||
| 282 | define_one_ro_old(sampling_rate_max_old, sampling_rate_max); | ||
| 283 | |||
| 284 | /*** delete after deprecation time ***/ | ||
| 285 | |||
| 286 | static ssize_t store_sampling_rate(struct kobject *a, struct attribute *b, | ||
| 287 | const char *buf, size_t count) | ||
| 243 | { | 288 | { |
| 244 | unsigned int input; | 289 | unsigned int input; |
| 245 | int ret; | 290 | int ret; |
| @@ -254,8 +299,8 @@ static ssize_t store_sampling_rate(struct cpufreq_policy *unused, | |||
| 254 | return count; | 299 | return count; |
| 255 | } | 300 | } |
| 256 | 301 | ||
| 257 | static ssize_t store_up_threshold(struct cpufreq_policy *unused, | 302 | static ssize_t store_up_threshold(struct kobject *a, struct attribute *b, |
| 258 | const char *buf, size_t count) | 303 | const char *buf, size_t count) |
| 259 | { | 304 | { |
| 260 | unsigned int input; | 305 | unsigned int input; |
| 261 | int ret; | 306 | int ret; |
| @@ -273,8 +318,8 @@ static ssize_t store_up_threshold(struct cpufreq_policy *unused, | |||
| 273 | return count; | 318 | return count; |
| 274 | } | 319 | } |
| 275 | 320 | ||
| 276 | static ssize_t store_ignore_nice_load(struct cpufreq_policy *policy, | 321 | static ssize_t store_ignore_nice_load(struct kobject *a, struct attribute *b, |
| 277 | const char *buf, size_t count) | 322 | const char *buf, size_t count) |
| 278 | { | 323 | { |
| 279 | unsigned int input; | 324 | unsigned int input; |
| 280 | int ret; | 325 | int ret; |
| @@ -310,8 +355,8 @@ static ssize_t store_ignore_nice_load(struct cpufreq_policy *policy, | |||
| 310 | return count; | 355 | return count; |
| 311 | } | 356 | } |
| 312 | 357 | ||
| 313 | static ssize_t store_powersave_bias(struct cpufreq_policy *unused, | 358 | static ssize_t store_powersave_bias(struct kobject *a, struct attribute *b, |
| 314 | const char *buf, size_t count) | 359 | const char *buf, size_t count) |
| 315 | { | 360 | { |
| 316 | unsigned int input; | 361 | unsigned int input; |
| 317 | int ret; | 362 | int ret; |
| @@ -332,7 +377,7 @@ static ssize_t store_powersave_bias(struct cpufreq_policy *unused, | |||
| 332 | } | 377 | } |
| 333 | 378 | ||
| 334 | #define define_one_rw(_name) \ | 379 | #define define_one_rw(_name) \ |
| 335 | static struct freq_attr _name = \ | 380 | static struct global_attr _name = \ |
| 336 | __ATTR(_name, 0644, show_##_name, store_##_name) | 381 | __ATTR(_name, 0644, show_##_name, store_##_name) |
| 337 | 382 | ||
| 338 | define_one_rw(sampling_rate); | 383 | define_one_rw(sampling_rate); |
| @@ -355,6 +400,47 @@ static struct attribute_group dbs_attr_group = { | |||
| 355 | .name = "ondemand", | 400 | .name = "ondemand", |
| 356 | }; | 401 | }; |
| 357 | 402 | ||
| 403 | /*** delete after deprecation time ***/ | ||
| 404 | |||
| 405 | #define write_one_old(file_name) \ | ||
| 406 | static ssize_t store_##file_name##_old \ | ||
| 407 | (struct cpufreq_policy *unused, const char *buf, size_t count) \ | ||
| 408 | { \ | ||
| 409 | printk_once(KERN_INFO "CPUFREQ: Per core ondemand sysfs " \ | ||
| 410 | "interface is deprecated - " #file_name "\n"); \ | ||
| 411 | return store_##file_name(NULL, NULL, buf, count); \ | ||
| 412 | } | ||
| 413 | write_one_old(sampling_rate); | ||
| 414 | write_one_old(up_threshold); | ||
| 415 | write_one_old(ignore_nice_load); | ||
| 416 | write_one_old(powersave_bias); | ||
| 417 | |||
| 418 | #define define_one_rw_old(object, _name) \ | ||
| 419 | static struct freq_attr object = \ | ||
| 420 | __ATTR(_name, 0644, show_##_name##_old, store_##_name##_old) | ||
| 421 | |||
| 422 | define_one_rw_old(sampling_rate_old, sampling_rate); | ||
| 423 | define_one_rw_old(up_threshold_old, up_threshold); | ||
| 424 | define_one_rw_old(ignore_nice_load_old, ignore_nice_load); | ||
| 425 | define_one_rw_old(powersave_bias_old, powersave_bias); | ||
| 426 | |||
| 427 | static struct attribute *dbs_attributes_old[] = { | ||
| 428 | &sampling_rate_max_old.attr, | ||
| 429 | &sampling_rate_min_old.attr, | ||
| 430 | &sampling_rate_old.attr, | ||
| 431 | &up_threshold_old.attr, | ||
| 432 | &ignore_nice_load_old.attr, | ||
| 433 | &powersave_bias_old.attr, | ||
| 434 | NULL | ||
| 435 | }; | ||
| 436 | |||
| 437 | static struct attribute_group dbs_attr_group_old = { | ||
| 438 | .attrs = dbs_attributes_old, | ||
| 439 | .name = "ondemand", | ||
| 440 | }; | ||
| 441 | |||
| 442 | /*** delete after deprecation time ***/ | ||
| 443 | |||
| 358 | /************************** sysfs end ************************/ | 444 | /************************** sysfs end ************************/ |
| 359 | 445 | ||
| 360 | static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info) | 446 | static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info) |
| @@ -545,7 +631,7 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy, | |||
| 545 | 631 | ||
| 546 | mutex_lock(&dbs_mutex); | 632 | mutex_lock(&dbs_mutex); |
| 547 | 633 | ||
| 548 | rc = sysfs_create_group(&policy->kobj, &dbs_attr_group); | 634 | rc = sysfs_create_group(&policy->kobj, &dbs_attr_group_old); |
| 549 | if (rc) { | 635 | if (rc) { |
| 550 | mutex_unlock(&dbs_mutex); | 636 | mutex_unlock(&dbs_mutex); |
| 551 | return rc; | 637 | return rc; |
| @@ -566,13 +652,20 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy, | |||
| 566 | } | 652 | } |
| 567 | this_dbs_info->cpu = cpu; | 653 | this_dbs_info->cpu = cpu; |
| 568 | ondemand_powersave_bias_init_cpu(cpu); | 654 | ondemand_powersave_bias_init_cpu(cpu); |
| 569 | mutex_init(&this_dbs_info->timer_mutex); | ||
| 570 | /* | 655 | /* |
| 571 | * Start the timerschedule work, when this governor | 656 | * Start the timerschedule work, when this governor |
| 572 | * is used for first time | 657 | * is used for first time |
| 573 | */ | 658 | */ |
| 574 | if (dbs_enable == 1) { | 659 | if (dbs_enable == 1) { |
| 575 | unsigned int latency; | 660 | unsigned int latency; |
| 661 | |||
| 662 | rc = sysfs_create_group(cpufreq_global_kobject, | ||
| 663 | &dbs_attr_group); | ||
| 664 | if (rc) { | ||
| 665 | mutex_unlock(&dbs_mutex); | ||
| 666 | return rc; | ||
| 667 | } | ||
| 668 | |||
| 576 | /* policy latency is in nS. Convert it to uS first */ | 669 | /* policy latency is in nS. Convert it to uS first */ |
| 577 | latency = policy->cpuinfo.transition_latency / 1000; | 670 | latency = policy->cpuinfo.transition_latency / 1000; |
| 578 | if (latency == 0) | 671 | if (latency == 0) |
| @@ -586,6 +679,7 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy, | |||
| 586 | } | 679 | } |
| 587 | mutex_unlock(&dbs_mutex); | 680 | mutex_unlock(&dbs_mutex); |
| 588 | 681 | ||
| 682 | mutex_init(&this_dbs_info->timer_mutex); | ||
| 589 | dbs_timer_init(this_dbs_info); | 683 | dbs_timer_init(this_dbs_info); |
| 590 | break; | 684 | break; |
| 591 | 685 | ||
| @@ -593,10 +687,13 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy, | |||
| 593 | dbs_timer_exit(this_dbs_info); | 687 | dbs_timer_exit(this_dbs_info); |
| 594 | 688 | ||
| 595 | mutex_lock(&dbs_mutex); | 689 | mutex_lock(&dbs_mutex); |
| 596 | sysfs_remove_group(&policy->kobj, &dbs_attr_group); | 690 | sysfs_remove_group(&policy->kobj, &dbs_attr_group_old); |
| 597 | mutex_destroy(&this_dbs_info->timer_mutex); | 691 | mutex_destroy(&this_dbs_info->timer_mutex); |
| 598 | dbs_enable--; | 692 | dbs_enable--; |
| 599 | mutex_unlock(&dbs_mutex); | 693 | mutex_unlock(&dbs_mutex); |
| 694 | if (!dbs_enable) | ||
| 695 | sysfs_remove_group(cpufreq_global_kobject, | ||
| 696 | &dbs_attr_group); | ||
| 600 | 697 | ||
| 601 | break; | 698 | break; |
| 602 | 699 | ||
| @@ -614,16 +711,6 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy, | |||
| 614 | return 0; | 711 | return 0; |
| 615 | } | 712 | } |
| 616 | 713 | ||
| 617 | #ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND | ||
| 618 | static | ||
| 619 | #endif | ||
| 620 | struct cpufreq_governor cpufreq_gov_ondemand = { | ||
| 621 | .name = "ondemand", | ||
| 622 | .governor = cpufreq_governor_dbs, | ||
| 623 | .max_transition_latency = TRANSITION_LATENCY_LIMIT, | ||
| 624 | .owner = THIS_MODULE, | ||
| 625 | }; | ||
| 626 | |||
| 627 | static int __init cpufreq_gov_dbs_init(void) | 714 | static int __init cpufreq_gov_dbs_init(void) |
| 628 | { | 715 | { |
| 629 | int err; | 716 | int err; |
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 96dda81c9228..6b4c484a699a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
| @@ -155,6 +155,13 @@ config GPIO_TWL4030 | |||
| 155 | Say yes here to access the GPIO signals of various multi-function | 155 | Say yes here to access the GPIO signals of various multi-function |
| 156 | power management chips from Texas Instruments. | 156 | power management chips from Texas Instruments. |
| 157 | 157 | ||
| 158 | config GPIO_WM831X | ||
| 159 | tristate "WM831x GPIOs" | ||
| 160 | depends on MFD_WM831X | ||
| 161 | help | ||
| 162 | Say yes here to access the GPIO signals of WM831x power management | ||
| 163 | chips from Wolfson Microelectronics. | ||
| 164 | |||
| 158 | comment "PCI GPIO expanders:" | 165 | comment "PCI GPIO expanders:" |
| 159 | 166 | ||
| 160 | config GPIO_BT8XX | 167 | config GPIO_BT8XX |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 9244c6fcd8be..ea7c745f26a8 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
| @@ -14,3 +14,4 @@ obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o | |||
| 14 | obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o | 14 | obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o |
| 15 | obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o | 15 | obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o |
| 16 | obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o | 16 | obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o |
| 17 | obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o | ||
diff --git a/drivers/gpio/wm831x-gpio.c b/drivers/gpio/wm831x-gpio.c new file mode 100644 index 000000000000..f9c09a54ec7f --- /dev/null +++ b/drivers/gpio/wm831x-gpio.c | |||
| @@ -0,0 +1,252 @@ | |||
| 1 | /* | ||
| 2 | * wm831x-gpio.c -- gpiolib support for Wolfson WM831x PMICs | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/gpio.h> | ||
| 18 | #include <linux/mfd/core.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | #include <linux/seq_file.h> | ||
| 21 | |||
| 22 | #include <linux/mfd/wm831x/core.h> | ||
| 23 | #include <linux/mfd/wm831x/pdata.h> | ||
| 24 | #include <linux/mfd/wm831x/gpio.h> | ||
| 25 | |||
| 26 | #define WM831X_GPIO_MAX 16 | ||
| 27 | |||
| 28 | struct wm831x_gpio { | ||
| 29 | struct wm831x *wm831x; | ||
| 30 | struct gpio_chip gpio_chip; | ||
| 31 | }; | ||
| 32 | |||
| 33 | static inline struct wm831x_gpio *to_wm831x_gpio(struct gpio_chip *chip) | ||
| 34 | { | ||
| 35 | return container_of(chip, struct wm831x_gpio, gpio_chip); | ||
| 36 | } | ||
| 37 | |||
| 38 | static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) | ||
| 39 | { | ||
| 40 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | ||
| 41 | struct wm831x *wm831x = wm831x_gpio->wm831x; | ||
| 42 | |||
| 43 | return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, | ||
| 44 | WM831X_GPN_DIR | WM831X_GPN_TRI, | ||
| 45 | WM831X_GPN_DIR); | ||
| 46 | } | ||
| 47 | |||
| 48 | static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset) | ||
| 49 | { | ||
| 50 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | ||
| 51 | struct wm831x *wm831x = wm831x_gpio->wm831x; | ||
| 52 | int ret; | ||
| 53 | |||
| 54 | ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL); | ||
| 55 | if (ret < 0) | ||
| 56 | return ret; | ||
| 57 | |||
| 58 | if (ret & 1 << offset) | ||
| 59 | return 1; | ||
| 60 | else | ||
| 61 | return 0; | ||
| 62 | } | ||
| 63 | |||
| 64 | static int wm831x_gpio_direction_out(struct gpio_chip *chip, | ||
| 65 | unsigned offset, int value) | ||
| 66 | { | ||
| 67 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | ||
| 68 | struct wm831x *wm831x = wm831x_gpio->wm831x; | ||
| 69 | |||
| 70 | return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset, | ||
| 71 | WM831X_GPN_DIR | WM831X_GPN_TRI, 0); | ||
| 72 | } | ||
| 73 | |||
| 74 | static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | ||
| 75 | { | ||
| 76 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | ||
| 77 | struct wm831x *wm831x = wm831x_gpio->wm831x; | ||
| 78 | |||
| 79 | wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset, | ||
| 80 | value << offset); | ||
| 81 | } | ||
| 82 | |||
| 83 | #ifdef CONFIG_DEBUG_FS | ||
| 84 | static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) | ||
| 85 | { | ||
| 86 | struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip); | ||
| 87 | struct wm831x *wm831x = wm831x_gpio->wm831x; | ||
| 88 | int i; | ||
| 89 | |||
| 90 | for (i = 0; i < chip->ngpio; i++) { | ||
| 91 | int gpio = i + chip->base; | ||
| 92 | int reg; | ||
| 93 | const char *label, *pull, *powerdomain; | ||
| 94 | |||
| 95 | /* We report the GPIO even if it's not requested since | ||
| 96 | * we're also reporting things like alternate | ||
| 97 | * functions which apply even when the GPIO is not in | ||
| 98 | * use as a GPIO. | ||
| 99 | */ | ||
| 100 | label = gpiochip_is_requested(chip, i); | ||
| 101 | if (!label) | ||
| 102 | label = "Unrequested"; | ||
| 103 | |||
| 104 | seq_printf(s, " gpio-%-3d (%-20.20s) ", gpio, label); | ||
| 105 | |||
| 106 | reg = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL + i); | ||
| 107 | if (reg < 0) { | ||
| 108 | dev_err(wm831x->dev, | ||
| 109 | "GPIO control %d read failed: %d\n", | ||
| 110 | gpio, reg); | ||
| 111 | seq_printf(s, "\n"); | ||
| 112 | continue; | ||
| 113 | } | ||
| 114 | |||
| 115 | switch (reg & WM831X_GPN_PULL_MASK) { | ||
| 116 | case WM831X_GPIO_PULL_NONE: | ||
| 117 | pull = "nopull"; | ||
| 118 | break; | ||
| 119 | case WM831X_GPIO_PULL_DOWN: | ||
| 120 | pull = "pulldown"; | ||
| 121 | break; | ||
| 122 | case WM831X_GPIO_PULL_UP: | ||
| 123 | pull = "pullup"; | ||
| 124 | default: | ||
| 125 | pull = "INVALID PULL"; | ||
| 126 | break; | ||
| 127 | } | ||
| 128 | |||
| 129 | switch (i + 1) { | ||
| 130 | case 1 ... 3: | ||
| 131 | case 7 ... 9: | ||
| 132 | if (reg & WM831X_GPN_PWR_DOM) | ||
| 133 | powerdomain = "VPMIC"; | ||
| 134 | else | ||
| 135 | powerdomain = "DBVDD"; | ||
| 136 | break; | ||
| 137 | |||
| 138 | case 4 ... 6: | ||
| 139 | case 10 ... 12: | ||
| 140 | if (reg & WM831X_GPN_PWR_DOM) | ||
| 141 | powerdomain = "SYSVDD"; | ||
| 142 | else | ||
| 143 | powerdomain = "DBVDD"; | ||
| 144 | break; | ||
| 145 | |||
| 146 | case 13 ... 16: | ||
| 147 | powerdomain = "TPVDD"; | ||
| 148 | break; | ||
| 149 | |||
| 150 | default: | ||
| 151 | BUG(); | ||
| 152 | break; | ||
| 153 | } | ||
| 154 | |||
| 155 | seq_printf(s, " %s %s %s %s%s\n" | ||
| 156 | " %s%s (0x%4x)\n", | ||
| 157 | reg & WM831X_GPN_DIR ? "in" : "out", | ||
| 158 | wm831x_gpio_get(chip, i) ? "high" : "low", | ||
| 159 | pull, | ||
| 160 | powerdomain, | ||
| 161 | reg & WM831X_GPN_POL ? " inverted" : "", | ||
| 162 | reg & WM831X_GPN_OD ? "open-drain" : "CMOS", | ||
| 163 | reg & WM831X_GPN_TRI ? " tristated" : "", | ||
| 164 | reg); | ||
| 165 | } | ||
| 166 | } | ||
| 167 | #else | ||
| 168 | #define wm831x_gpio_dbg_show NULL | ||
| 169 | #endif | ||
| 170 | |||
| 171 | static struct gpio_chip template_chip = { | ||
| 172 | .label = "wm831x", | ||
| 173 | .owner = THIS_MODULE, | ||
| 174 | .direction_input = wm831x_gpio_direction_in, | ||
| 175 | .get = wm831x_gpio_get, | ||
| 176 | .direction_output = wm831x_gpio_direction_out, | ||
| 177 | .set = wm831x_gpio_set, | ||
| 178 | .dbg_show = wm831x_gpio_dbg_show, | ||
| 179 | .can_sleep = 1, | ||
| 180 | }; | ||
| 181 | |||
| 182 | static int __devinit wm831x_gpio_probe(struct platform_device *pdev) | ||
| 183 | { | ||
| 184 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 185 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 186 | struct wm831x_gpio *wm831x_gpio; | ||
| 187 | int ret; | ||
| 188 | |||
| 189 | wm831x_gpio = kzalloc(sizeof(*wm831x_gpio), GFP_KERNEL); | ||
| 190 | if (wm831x_gpio == NULL) | ||
| 191 | return -ENOMEM; | ||
| 192 | |||
| 193 | wm831x_gpio->wm831x = wm831x; | ||
| 194 | wm831x_gpio->gpio_chip = template_chip; | ||
| 195 | wm831x_gpio->gpio_chip.ngpio = WM831X_GPIO_MAX; | ||
| 196 | wm831x_gpio->gpio_chip.dev = &pdev->dev; | ||
| 197 | if (pdata && pdata->gpio_base) | ||
| 198 | wm831x_gpio->gpio_chip.base = pdata->gpio_base; | ||
| 199 | else | ||
| 200 | wm831x_gpio->gpio_chip.base = -1; | ||
| 201 | |||
| 202 | ret = gpiochip_add(&wm831x_gpio->gpio_chip); | ||
| 203 | if (ret < 0) { | ||
| 204 | dev_err(&pdev->dev, "Could not register gpiochip, %d\n", | ||
| 205 | ret); | ||
| 206 | goto err; | ||
| 207 | } | ||
| 208 | |||
| 209 | platform_set_drvdata(pdev, wm831x_gpio); | ||
| 210 | |||
| 211 | return ret; | ||
| 212 | |||
| 213 | err: | ||
| 214 | kfree(wm831x_gpio); | ||
| 215 | return ret; | ||
| 216 | } | ||
| 217 | |||
| 218 | static int __devexit wm831x_gpio_remove(struct platform_device *pdev) | ||
| 219 | { | ||
| 220 | struct wm831x_gpio *wm831x_gpio = platform_get_drvdata(pdev); | ||
| 221 | int ret; | ||
| 222 | |||
| 223 | ret = gpiochip_remove(&wm831x_gpio->gpio_chip); | ||
| 224 | if (ret == 0) | ||
| 225 | kfree(wm831x_gpio); | ||
| 226 | |||
| 227 | return ret; | ||
| 228 | } | ||
| 229 | |||
| 230 | static struct platform_driver wm831x_gpio_driver = { | ||
| 231 | .driver.name = "wm831x-gpio", | ||
| 232 | .driver.owner = THIS_MODULE, | ||
| 233 | .probe = wm831x_gpio_probe, | ||
| 234 | .remove = __devexit_p(wm831x_gpio_remove), | ||
| 235 | }; | ||
| 236 | |||
| 237 | static int __init wm831x_gpio_init(void) | ||
| 238 | { | ||
| 239 | return platform_driver_register(&wm831x_gpio_driver); | ||
| 240 | } | ||
| 241 | subsys_initcall(wm831x_gpio_init); | ||
| 242 | |||
| 243 | static void __exit wm831x_gpio_exit(void) | ||
| 244 | { | ||
| 245 | platform_driver_unregister(&wm831x_gpio_driver); | ||
| 246 | } | ||
| 247 | module_exit(wm831x_gpio_exit); | ||
| 248 | |||
| 249 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | ||
| 250 | MODULE_DESCRIPTION("GPIO interface for WM831x PMICs"); | ||
| 251 | MODULE_LICENSE("GPL"); | ||
| 252 | MODULE_ALIAS("platform:wm831x-gpio"); | ||
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c index f7a615b80c70..5301f226cb1c 100644 --- a/drivers/gpu/drm/drm_sysfs.c +++ b/drivers/gpu/drm/drm_sysfs.c | |||
| @@ -76,7 +76,7 @@ static ssize_t version_show(struct class *dev, char *buf) | |||
| 76 | CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE); | 76 | CORE_MINOR, CORE_PATCHLEVEL, CORE_DATE); |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | static char *drm_nodename(struct device *dev) | 79 | static char *drm_devnode(struct device *dev, mode_t *mode) |
| 80 | { | 80 | { |
| 81 | return kasprintf(GFP_KERNEL, "dri/%s", dev_name(dev)); | 81 | return kasprintf(GFP_KERNEL, "dri/%s", dev_name(dev)); |
| 82 | } | 82 | } |
| @@ -112,7 +112,7 @@ struct class *drm_sysfs_create(struct module *owner, char *name) | |||
| 112 | if (err) | 112 | if (err) |
| 113 | goto err_out_class; | 113 | goto err_out_class; |
| 114 | 114 | ||
| 115 | class->nodename = drm_nodename; | 115 | class->devnode = drm_devnode; |
| 116 | 116 | ||
| 117 | return class; | 117 | return class; |
| 118 | 118 | ||
diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c index 4d1dc0cf1401..8b6ee247bfe4 100644 --- a/drivers/hid/usbhid/hiddev.c +++ b/drivers/hid/usbhid/hiddev.c | |||
| @@ -852,14 +852,14 @@ static const struct file_operations hiddev_fops = { | |||
| 852 | #endif | 852 | #endif |
| 853 | }; | 853 | }; |
| 854 | 854 | ||
| 855 | static char *hiddev_nodename(struct device *dev) | 855 | static char *hiddev_devnode(struct device *dev, mode_t *mode) |
| 856 | { | 856 | { |
| 857 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); | 857 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); |
| 858 | } | 858 | } |
| 859 | 859 | ||
| 860 | static struct usb_class_driver hiddev_class = { | 860 | static struct usb_class_driver hiddev_class = { |
| 861 | .name = "hiddev%d", | 861 | .name = "hiddev%d", |
| 862 | .nodename = hiddev_nodename, | 862 | .devnode = hiddev_devnode, |
| 863 | .fops = &hiddev_fops, | 863 | .fops = &hiddev_fops, |
| 864 | .minor_base = HIDDEV_MINOR_BASE, | 864 | .minor_base = HIDDEV_MINOR_BASE, |
| 865 | }; | 865 | }; |
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 461abb1e273a..ed7711d11ae8 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig | |||
| @@ -946,6 +946,27 @@ config SENSORS_W83627EHF | |||
| 946 | This driver can also be built as a module. If so, the module | 946 | This driver can also be built as a module. If so, the module |
| 947 | will be called w83627ehf. | 947 | will be called w83627ehf. |
| 948 | 948 | ||
| 949 | config SENSORS_WM831X | ||
| 950 | tristate "WM831x PMICs" | ||
| 951 | depends on MFD_WM831X | ||
| 952 | help | ||
| 953 | If you say yes here you get support for the hardware | ||
| 954 | monitoring functionality of the Wolfson Microelectronics | ||
| 955 | WM831x series of PMICs. | ||
| 956 | |||
| 957 | This driver can also be built as a module. If so, the module | ||
| 958 | will be called wm831x-hwmon. | ||
| 959 | |||
| 960 | config SENSORS_WM8350 | ||
| 961 | tristate "Wolfson Microelectronics WM835x" | ||
| 962 | depends on MFD_WM8350 | ||
| 963 | help | ||
| 964 | If you say yes here you get support for the hardware | ||
| 965 | monitoring features of the WM835x series of PMICs. | ||
| 966 | |||
| 967 | This driver can also be built as a module. If so, the module | ||
| 968 | will be called wm8350-hwmon. | ||
| 969 | |||
| 949 | config SENSORS_ULTRA45 | 970 | config SENSORS_ULTRA45 |
| 950 | tristate "Sun Ultra45 PIC16F747" | 971 | tristate "Sun Ultra45 PIC16F747" |
| 951 | depends on SPARC64 | 972 | depends on SPARC64 |
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 2e547881bc0a..bcf73a9bb619 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile | |||
| @@ -93,6 +93,8 @@ obj-$(CONFIG_SENSORS_VT8231) += vt8231.o | |||
| 93 | obj-$(CONFIG_SENSORS_W83627EHF) += w83627ehf.o | 93 | obj-$(CONFIG_SENSORS_W83627EHF) += w83627ehf.o |
| 94 | obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o | 94 | obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o |
| 95 | obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o | 95 | obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o |
| 96 | obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o | ||
| 97 | obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o | ||
| 96 | 98 | ||
| 97 | ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y) | 99 | ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y) |
| 98 | EXTRA_CFLAGS += -DDEBUG | 100 | EXTRA_CFLAGS += -DDEBUG |
diff --git a/drivers/hwmon/wm831x-hwmon.c b/drivers/hwmon/wm831x-hwmon.c new file mode 100644 index 000000000000..c16e9e74c356 --- /dev/null +++ b/drivers/hwmon/wm831x-hwmon.c | |||
| @@ -0,0 +1,226 @@ | |||
| 1 | /* | ||
| 2 | * drivers/hwmon/wm831x-hwmon.c - Wolfson Microelectronics WM831x PMIC | ||
| 3 | * hardware monitoring features. | ||
| 4 | * | ||
| 5 | * Copyright (C) 2009 Wolfson Microelectronics plc | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify it | ||
| 8 | * under the terms of the GNU General Public License v2 as published by the | ||
| 9 | * Free Software Foundation. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 14 | * more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License along with | ||
| 17 | * this program; if not, write to the Free Software Foundation, Inc., | ||
| 18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/kernel.h> | ||
| 22 | #include <linux/module.h> | ||
| 23 | #include <linux/platform_device.h> | ||
| 24 | #include <linux/err.h> | ||
| 25 | #include <linux/hwmon.h> | ||
| 26 | #include <linux/hwmon-sysfs.h> | ||
| 27 | |||
| 28 | #include <linux/mfd/wm831x/core.h> | ||
| 29 | #include <linux/mfd/wm831x/auxadc.h> | ||
| 30 | |||
| 31 | struct wm831x_hwmon { | ||
| 32 | struct wm831x *wm831x; | ||
| 33 | struct device *classdev; | ||
| 34 | }; | ||
| 35 | |||
| 36 | static ssize_t show_name(struct device *dev, | ||
| 37 | struct device_attribute *attr, char *buf) | ||
| 38 | { | ||
| 39 | return sprintf(buf, "wm831x\n"); | ||
| 40 | } | ||
| 41 | |||
| 42 | static const char *input_names[] = { | ||
| 43 | [WM831X_AUX_SYSVDD] = "SYSVDD", | ||
| 44 | [WM831X_AUX_USB] = "USB", | ||
| 45 | [WM831X_AUX_BKUP_BATT] = "Backup battery", | ||
| 46 | [WM831X_AUX_BATT] = "Battery", | ||
| 47 | [WM831X_AUX_WALL] = "WALL", | ||
| 48 | [WM831X_AUX_CHIP_TEMP] = "PMIC", | ||
| 49 | [WM831X_AUX_BATT_TEMP] = "Battery", | ||
| 50 | }; | ||
| 51 | |||
| 52 | |||
| 53 | static ssize_t show_voltage(struct device *dev, | ||
| 54 | struct device_attribute *attr, char *buf) | ||
| 55 | { | ||
| 56 | struct wm831x_hwmon *hwmon = dev_get_drvdata(dev); | ||
| 57 | int channel = to_sensor_dev_attr(attr)->index; | ||
| 58 | int ret; | ||
| 59 | |||
| 60 | ret = wm831x_auxadc_read_uv(hwmon->wm831x, channel); | ||
| 61 | if (ret < 0) | ||
| 62 | return ret; | ||
| 63 | |||
| 64 | return sprintf(buf, "%d\n", DIV_ROUND_CLOSEST(ret, 1000)); | ||
| 65 | } | ||
| 66 | |||
| 67 | static ssize_t show_chip_temp(struct device *dev, | ||
| 68 | struct device_attribute *attr, char *buf) | ||
| 69 | { | ||
| 70 | struct wm831x_hwmon *hwmon = dev_get_drvdata(dev); | ||
| 71 | int channel = to_sensor_dev_attr(attr)->index; | ||
| 72 | int ret; | ||
| 73 | |||
| 74 | ret = wm831x_auxadc_read(hwmon->wm831x, channel); | ||
| 75 | if (ret < 0) | ||
| 76 | return ret; | ||
| 77 | |||
| 78 | /* Degrees celsius = (512.18-ret) / 1.0983 */ | ||
| 79 | ret = 512180 - (ret * 1000); | ||
| 80 | ret = DIV_ROUND_CLOSEST(ret * 10000, 10983); | ||
| 81 | |||
| 82 | return sprintf(buf, "%d\n", ret); | ||
| 83 | } | ||
| 84 | |||
| 85 | static ssize_t show_label(struct device *dev, | ||
| 86 | struct device_attribute *attr, char *buf) | ||
| 87 | { | ||
| 88 | int channel = to_sensor_dev_attr(attr)->index; | ||
| 89 | |||
| 90 | return sprintf(buf, "%s\n", input_names[channel]); | ||
| 91 | } | ||
| 92 | |||
| 93 | #define WM831X_VOLTAGE(id, name) \ | ||
| 94 | static SENSOR_DEVICE_ATTR(in##id##_input, S_IRUGO, show_voltage, \ | ||
| 95 | NULL, name) | ||
| 96 | |||
| 97 | #define WM831X_NAMED_VOLTAGE(id, name) \ | ||
| 98 | WM831X_VOLTAGE(id, name); \ | ||
| 99 | static SENSOR_DEVICE_ATTR(in##id##_label, S_IRUGO, show_label, \ | ||
| 100 | NULL, name) | ||
| 101 | |||
| 102 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | ||
| 103 | |||
| 104 | WM831X_VOLTAGE(0, WM831X_AUX_AUX1); | ||
| 105 | WM831X_VOLTAGE(1, WM831X_AUX_AUX2); | ||
| 106 | WM831X_VOLTAGE(2, WM831X_AUX_AUX3); | ||
| 107 | WM831X_VOLTAGE(3, WM831X_AUX_AUX4); | ||
| 108 | |||
| 109 | WM831X_NAMED_VOLTAGE(4, WM831X_AUX_SYSVDD); | ||
| 110 | WM831X_NAMED_VOLTAGE(5, WM831X_AUX_USB); | ||
| 111 | WM831X_NAMED_VOLTAGE(6, WM831X_AUX_BATT); | ||
| 112 | WM831X_NAMED_VOLTAGE(7, WM831X_AUX_WALL); | ||
| 113 | WM831X_NAMED_VOLTAGE(8, WM831X_AUX_BKUP_BATT); | ||
| 114 | |||
| 115 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_chip_temp, NULL, | ||
| 116 | WM831X_AUX_CHIP_TEMP); | ||
| 117 | static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_label, NULL, | ||
| 118 | WM831X_AUX_CHIP_TEMP); | ||
| 119 | /* Report as a voltage since conversion depends on external components | ||
| 120 | * and that's what the ABI wants. */ | ||
| 121 | static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_voltage, NULL, | ||
| 122 | WM831X_AUX_BATT_TEMP); | ||
| 123 | static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, show_label, NULL, | ||
| 124 | WM831X_AUX_BATT_TEMP); | ||
| 125 | |||
| 126 | static struct attribute *wm831x_attributes[] = { | ||
| 127 | &dev_attr_name.attr, | ||
| 128 | |||
| 129 | &sensor_dev_attr_in0_input.dev_attr.attr, | ||
| 130 | &sensor_dev_attr_in1_input.dev_attr.attr, | ||
| 131 | &sensor_dev_attr_in2_input.dev_attr.attr, | ||
| 132 | &sensor_dev_attr_in3_input.dev_attr.attr, | ||
| 133 | |||
| 134 | &sensor_dev_attr_in4_input.dev_attr.attr, | ||
| 135 | &sensor_dev_attr_in4_label.dev_attr.attr, | ||
| 136 | &sensor_dev_attr_in5_input.dev_attr.attr, | ||
| 137 | &sensor_dev_attr_in5_label.dev_attr.attr, | ||
| 138 | &sensor_dev_attr_in6_input.dev_attr.attr, | ||
| 139 | &sensor_dev_attr_in6_label.dev_attr.attr, | ||
| 140 | &sensor_dev_attr_in7_input.dev_attr.attr, | ||
| 141 | &sensor_dev_attr_in7_label.dev_attr.attr, | ||
| 142 | &sensor_dev_attr_in8_input.dev_attr.attr, | ||
| 143 | &sensor_dev_attr_in8_label.dev_attr.attr, | ||
| 144 | |||
| 145 | &sensor_dev_attr_temp1_input.dev_attr.attr, | ||
| 146 | &sensor_dev_attr_temp1_label.dev_attr.attr, | ||
| 147 | &sensor_dev_attr_temp2_input.dev_attr.attr, | ||
| 148 | &sensor_dev_attr_temp2_label.dev_attr.attr, | ||
| 149 | |||
| 150 | NULL | ||
| 151 | }; | ||
| 152 | |||
| 153 | static const struct attribute_group wm831x_attr_group = { | ||
| 154 | .attrs = wm831x_attributes, | ||
| 155 | }; | ||
| 156 | |||
| 157 | static int __devinit wm831x_hwmon_probe(struct platform_device *pdev) | ||
| 158 | { | ||
| 159 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 160 | struct wm831x_hwmon *hwmon; | ||
| 161 | int ret; | ||
| 162 | |||
| 163 | hwmon = kzalloc(sizeof(struct wm831x_hwmon), GFP_KERNEL); | ||
| 164 | if (!hwmon) | ||
| 165 | return -ENOMEM; | ||
| 166 | |||
| 167 | hwmon->wm831x = wm831x; | ||
| 168 | |||
| 169 | ret = sysfs_create_group(&pdev->dev.kobj, &wm831x_attr_group); | ||
| 170 | if (ret) | ||
| 171 | goto err; | ||
| 172 | |||
| 173 | hwmon->classdev = hwmon_device_register(&pdev->dev); | ||
| 174 | if (IS_ERR(hwmon->classdev)) { | ||
| 175 | ret = PTR_ERR(hwmon->classdev); | ||
| 176 | goto err_sysfs; | ||
| 177 | } | ||
| 178 | |||
| 179 | platform_set_drvdata(pdev, hwmon); | ||
| 180 | |||
| 181 | return 0; | ||
| 182 | |||
| 183 | err_sysfs: | ||
| 184 | sysfs_remove_group(&pdev->dev.kobj, &wm831x_attr_group); | ||
| 185 | err: | ||
| 186 | kfree(hwmon); | ||
| 187 | return ret; | ||
| 188 | } | ||
| 189 | |||
| 190 | static int __devexit wm831x_hwmon_remove(struct platform_device *pdev) | ||
| 191 | { | ||
| 192 | struct wm831x_hwmon *hwmon = platform_get_drvdata(pdev); | ||
| 193 | |||
| 194 | hwmon_device_unregister(hwmon->classdev); | ||
| 195 | sysfs_remove_group(&pdev->dev.kobj, &wm831x_attr_group); | ||
| 196 | platform_set_drvdata(pdev, NULL); | ||
| 197 | kfree(hwmon); | ||
| 198 | |||
| 199 | return 0; | ||
| 200 | } | ||
| 201 | |||
| 202 | static struct platform_driver wm831x_hwmon_driver = { | ||
| 203 | .probe = wm831x_hwmon_probe, | ||
| 204 | .remove = __devexit_p(wm831x_hwmon_remove), | ||
| 205 | .driver = { | ||
| 206 | .name = "wm831x-hwmon", | ||
| 207 | .owner = THIS_MODULE, | ||
| 208 | }, | ||
| 209 | }; | ||
| 210 | |||
| 211 | static int __init wm831x_hwmon_init(void) | ||
| 212 | { | ||
| 213 | return platform_driver_register(&wm831x_hwmon_driver); | ||
| 214 | } | ||
| 215 | module_init(wm831x_hwmon_init); | ||
| 216 | |||
| 217 | static void __exit wm831x_hwmon_exit(void) | ||
| 218 | { | ||
| 219 | platform_driver_unregister(&wm831x_hwmon_driver); | ||
| 220 | } | ||
| 221 | module_exit(wm831x_hwmon_exit); | ||
| 222 | |||
| 223 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | ||
| 224 | MODULE_DESCRIPTION("WM831x Hardware Monitoring"); | ||
| 225 | MODULE_LICENSE("GPL"); | ||
| 226 | MODULE_ALIAS("platform:wm831x-hwmon"); | ||
diff --git a/drivers/hwmon/wm8350-hwmon.c b/drivers/hwmon/wm8350-hwmon.c new file mode 100644 index 000000000000..13290595ca86 --- /dev/null +++ b/drivers/hwmon/wm8350-hwmon.c | |||
| @@ -0,0 +1,151 @@ | |||
| 1 | /* | ||
| 2 | * drivers/hwmon/wm8350-hwmon.c - Wolfson Microelectronics WM8350 PMIC | ||
| 3 | * hardware monitoring features. | ||
| 4 | * | ||
| 5 | * Copyright (C) 2009 Wolfson Microelectronics plc | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify it | ||
| 8 | * under the terms of the GNU General Public License v2 as published by the | ||
| 9 | * Free Software Foundation. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 14 | * more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License along with | ||
| 17 | * this program; if not, write to the Free Software Foundation, Inc., | ||
| 18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/kernel.h> | ||
| 22 | #include <linux/module.h> | ||
| 23 | #include <linux/err.h> | ||
| 24 | #include <linux/platform_device.h> | ||
| 25 | #include <linux/hwmon.h> | ||
| 26 | #include <linux/hwmon-sysfs.h> | ||
| 27 | |||
| 28 | #include <linux/mfd/wm8350/core.h> | ||
| 29 | #include <linux/mfd/wm8350/comparator.h> | ||
| 30 | |||
| 31 | static ssize_t show_name(struct device *dev, | ||
| 32 | struct device_attribute *attr, char *buf) | ||
| 33 | { | ||
| 34 | return sprintf(buf, "wm8350\n"); | ||
| 35 | } | ||
| 36 | |||
| 37 | static const char *input_names[] = { | ||
| 38 | [WM8350_AUXADC_USB] = "USB", | ||
| 39 | [WM8350_AUXADC_LINE] = "Line", | ||
| 40 | [WM8350_AUXADC_BATT] = "Battery", | ||
| 41 | }; | ||
| 42 | |||
| 43 | |||
| 44 | static ssize_t show_voltage(struct device *dev, | ||
| 45 | struct device_attribute *attr, char *buf) | ||
| 46 | { | ||
| 47 | struct wm8350 *wm8350 = dev_get_drvdata(dev); | ||
| 48 | int channel = to_sensor_dev_attr(attr)->index; | ||
| 49 | int val; | ||
| 50 | |||
| 51 | val = wm8350_read_auxadc(wm8350, channel, 0, 0) * WM8350_AUX_COEFF; | ||
| 52 | val = DIV_ROUND_CLOSEST(val, 1000); | ||
| 53 | |||
| 54 | return sprintf(buf, "%d\n", val); | ||
| 55 | } | ||
| 56 | |||
| 57 | static ssize_t show_label(struct device *dev, | ||
| 58 | struct device_attribute *attr, char *buf) | ||
| 59 | { | ||
| 60 | int channel = to_sensor_dev_attr(attr)->index; | ||
| 61 | |||
| 62 | return sprintf(buf, "%s\n", input_names[channel]); | ||
| 63 | } | ||
| 64 | |||
| 65 | #define WM8350_NAMED_VOLTAGE(id, name) \ | ||
| 66 | static SENSOR_DEVICE_ATTR(in##id##_input, S_IRUGO, show_voltage,\ | ||
| 67 | NULL, name); \ | ||
| 68 | static SENSOR_DEVICE_ATTR(in##id##_label, S_IRUGO, show_label, \ | ||
| 69 | NULL, name) | ||
| 70 | |||
| 71 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | ||
| 72 | |||
| 73 | WM8350_NAMED_VOLTAGE(0, WM8350_AUXADC_USB); | ||
| 74 | WM8350_NAMED_VOLTAGE(1, WM8350_AUXADC_BATT); | ||
| 75 | WM8350_NAMED_VOLTAGE(2, WM8350_AUXADC_LINE); | ||
| 76 | |||
| 77 | static struct attribute *wm8350_attributes[] = { | ||
| 78 | &dev_attr_name.attr, | ||
| 79 | |||
| 80 | &sensor_dev_attr_in0_input.dev_attr.attr, | ||
| 81 | &sensor_dev_attr_in0_label.dev_attr.attr, | ||
| 82 | &sensor_dev_attr_in1_input.dev_attr.attr, | ||
| 83 | &sensor_dev_attr_in1_label.dev_attr.attr, | ||
| 84 | &sensor_dev_attr_in2_input.dev_attr.attr, | ||
| 85 | &sensor_dev_attr_in2_label.dev_attr.attr, | ||
| 86 | |||
| 87 | NULL, | ||
| 88 | }; | ||
| 89 | |||
| 90 | static const struct attribute_group wm8350_attr_group = { | ||
| 91 | .attrs = wm8350_attributes, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static int __devinit wm8350_hwmon_probe(struct platform_device *pdev) | ||
| 95 | { | ||
| 96 | struct wm8350 *wm8350 = platform_get_drvdata(pdev); | ||
| 97 | int ret; | ||
| 98 | |||
| 99 | ret = sysfs_create_group(&pdev->dev.kobj, &wm8350_attr_group); | ||
| 100 | if (ret) | ||
| 101 | goto err; | ||
| 102 | |||
| 103 | wm8350->hwmon.classdev = hwmon_device_register(&pdev->dev); | ||
| 104 | if (IS_ERR(wm8350->hwmon.classdev)) { | ||
| 105 | ret = PTR_ERR(wm8350->hwmon.classdev); | ||
| 106 | goto err_group; | ||
| 107 | } | ||
| 108 | |||
| 109 | return 0; | ||
| 110 | |||
| 111 | err_group: | ||
| 112 | sysfs_remove_group(&pdev->dev.kobj, &wm8350_attr_group); | ||
| 113 | err: | ||
| 114 | return ret; | ||
| 115 | } | ||
| 116 | |||
| 117 | static int __devexit wm8350_hwmon_remove(struct platform_device *pdev) | ||
| 118 | { | ||
| 119 | struct wm8350 *wm8350 = platform_get_drvdata(pdev); | ||
| 120 | |||
| 121 | hwmon_device_unregister(wm8350->hwmon.classdev); | ||
| 122 | sysfs_remove_group(&pdev->dev.kobj, &wm8350_attr_group); | ||
| 123 | |||
| 124 | return 0; | ||
| 125 | } | ||
| 126 | |||
| 127 | static struct platform_driver wm8350_hwmon_driver = { | ||
| 128 | .probe = wm8350_hwmon_probe, | ||
| 129 | .remove = __devexit_p(wm8350_hwmon_remove), | ||
| 130 | .driver = { | ||
| 131 | .name = "wm8350-hwmon", | ||
| 132 | .owner = THIS_MODULE, | ||
| 133 | }, | ||
| 134 | }; | ||
| 135 | |||
| 136 | static int __init wm8350_hwmon_init(void) | ||
| 137 | { | ||
| 138 | return platform_driver_register(&wm8350_hwmon_driver); | ||
| 139 | } | ||
| 140 | module_init(wm8350_hwmon_init); | ||
| 141 | |||
| 142 | static void __exit wm8350_hwmon_exit(void) | ||
| 143 | { | ||
| 144 | platform_driver_unregister(&wm8350_hwmon_driver); | ||
| 145 | } | ||
| 146 | module_exit(wm8350_hwmon_exit); | ||
| 147 | |||
| 148 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | ||
| 149 | MODULE_DESCRIPTION("WM8350 Hardware Monitoring"); | ||
| 150 | MODULE_LICENSE("GPL"); | ||
| 151 | MODULE_ALIAS("platform:wm8350-hwmon"); | ||
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 0b486a63460d..4afba3ec2a61 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c | |||
| @@ -609,13 +609,12 @@ static int __init i2c_adap_imx_init(void) | |||
| 609 | { | 609 | { |
| 610 | return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); | 610 | return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe); |
| 611 | } | 611 | } |
| 612 | subsys_initcall(i2c_adap_imx_init); | ||
| 612 | 613 | ||
| 613 | static void __exit i2c_adap_imx_exit(void) | 614 | static void __exit i2c_adap_imx_exit(void) |
| 614 | { | 615 | { |
| 615 | platform_driver_unregister(&i2c_imx_driver); | 616 | platform_driver_unregister(&i2c_imx_driver); |
| 616 | } | 617 | } |
| 617 | |||
| 618 | module_init(i2c_adap_imx_init); | ||
| 619 | module_exit(i2c_adap_imx_exit); | 618 | module_exit(i2c_adap_imx_exit); |
| 620 | 619 | ||
| 621 | MODULE_LICENSE("GPL"); | 620 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index c3869d94ad42..bbab0e166630 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c | |||
| @@ -293,13 +293,13 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data) | |||
| 293 | } | 293 | } |
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | static int | 296 | static irqreturn_t |
| 297 | mv64xxx_i2c_intr(int irq, void *dev_id) | 297 | mv64xxx_i2c_intr(int irq, void *dev_id) |
| 298 | { | 298 | { |
| 299 | struct mv64xxx_i2c_data *drv_data = dev_id; | 299 | struct mv64xxx_i2c_data *drv_data = dev_id; |
| 300 | unsigned long flags; | 300 | unsigned long flags; |
| 301 | u32 status; | 301 | u32 status; |
| 302 | int rc = IRQ_NONE; | 302 | irqreturn_t rc = IRQ_NONE; |
| 303 | 303 | ||
| 304 | spin_lock_irqsave(&drv_data->lock, flags); | 304 | spin_lock_irqsave(&drv_data->lock, flags); |
| 305 | while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) & | 305 | while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) & |
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c index 820487d0d5c7..86a9d4e81472 100644 --- a/drivers/i2c/busses/i2c-sh_mobile.c +++ b/drivers/i2c/busses/i2c-sh_mobile.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
| 30 | #include <linux/err.h> | 30 | #include <linux/err.h> |
| 31 | #include <linux/pm_runtime.h> | ||
| 31 | #include <linux/clk.h> | 32 | #include <linux/clk.h> |
| 32 | #include <linux/io.h> | 33 | #include <linux/io.h> |
| 33 | 34 | ||
| @@ -165,7 +166,8 @@ static void activate_ch(struct sh_mobile_i2c_data *pd) | |||
| 165 | u_int32_t denom; | 166 | u_int32_t denom; |
| 166 | u_int32_t tmp; | 167 | u_int32_t tmp; |
| 167 | 168 | ||
| 168 | /* Make sure the clock is enabled */ | 169 | /* Wake up device and enable clock */ |
| 170 | pm_runtime_get_sync(pd->dev); | ||
| 169 | clk_enable(pd->clk); | 171 | clk_enable(pd->clk); |
| 170 | 172 | ||
| 171 | /* Get clock rate after clock is enabled */ | 173 | /* Get clock rate after clock is enabled */ |
| @@ -213,8 +215,9 @@ static void deactivate_ch(struct sh_mobile_i2c_data *pd) | |||
| 213 | /* Disable channel */ | 215 | /* Disable channel */ |
| 214 | iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd)); | 216 | iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd)); |
| 215 | 217 | ||
| 216 | /* Disable clock */ | 218 | /* Disable clock and mark device as idle */ |
| 217 | clk_disable(pd->clk); | 219 | clk_disable(pd->clk); |
| 220 | pm_runtime_put_sync(pd->dev); | ||
| 218 | } | 221 | } |
| 219 | 222 | ||
| 220 | static unsigned char i2c_op(struct sh_mobile_i2c_data *pd, | 223 | static unsigned char i2c_op(struct sh_mobile_i2c_data *pd, |
| @@ -572,6 +575,19 @@ static int sh_mobile_i2c_probe(struct platform_device *dev) | |||
| 572 | goto err_irq; | 575 | goto err_irq; |
| 573 | } | 576 | } |
| 574 | 577 | ||
| 578 | /* Enable Runtime PM for this device. | ||
| 579 | * | ||
| 580 | * Also tell the Runtime PM core to ignore children | ||
| 581 | * for this device since it is valid for us to suspend | ||
| 582 | * this I2C master driver even though the slave devices | ||
| 583 | * on the I2C bus may not be suspended. | ||
| 584 | * | ||
| 585 | * The state of the I2C hardware bus is unaffected by | ||
| 586 | * the Runtime PM state. | ||
| 587 | */ | ||
| 588 | pm_suspend_ignore_children(&dev->dev, true); | ||
| 589 | pm_runtime_enable(&dev->dev); | ||
| 590 | |||
| 575 | /* setup the private data */ | 591 | /* setup the private data */ |
| 576 | adap = &pd->adap; | 592 | adap = &pd->adap; |
| 577 | i2c_set_adapdata(adap, pd); | 593 | i2c_set_adapdata(adap, pd); |
| @@ -614,14 +630,33 @@ static int sh_mobile_i2c_remove(struct platform_device *dev) | |||
| 614 | iounmap(pd->reg); | 630 | iounmap(pd->reg); |
| 615 | sh_mobile_i2c_hook_irqs(dev, 0); | 631 | sh_mobile_i2c_hook_irqs(dev, 0); |
| 616 | clk_put(pd->clk); | 632 | clk_put(pd->clk); |
| 633 | pm_runtime_disable(&dev->dev); | ||
| 617 | kfree(pd); | 634 | kfree(pd); |
| 618 | return 0; | 635 | return 0; |
| 619 | } | 636 | } |
| 620 | 637 | ||
| 638 | static int sh_mobile_i2c_runtime_nop(struct device *dev) | ||
| 639 | { | ||
| 640 | /* Runtime PM callback shared between ->runtime_suspend() | ||
| 641 | * and ->runtime_resume(). Simply returns success. | ||
| 642 | * | ||
| 643 | * This driver re-initializes all registers after | ||
| 644 | * pm_runtime_get_sync() anyway so there is no need | ||
| 645 | * to save and restore registers here. | ||
| 646 | */ | ||
| 647 | return 0; | ||
| 648 | } | ||
| 649 | |||
| 650 | static struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = { | ||
| 651 | .runtime_suspend = sh_mobile_i2c_runtime_nop, | ||
| 652 | .runtime_resume = sh_mobile_i2c_runtime_nop, | ||
| 653 | }; | ||
| 654 | |||
| 621 | static struct platform_driver sh_mobile_i2c_driver = { | 655 | static struct platform_driver sh_mobile_i2c_driver = { |
| 622 | .driver = { | 656 | .driver = { |
| 623 | .name = "i2c-sh_mobile", | 657 | .name = "i2c-sh_mobile", |
| 624 | .owner = THIS_MODULE, | 658 | .owner = THIS_MODULE, |
| 659 | .pm = &sh_mobile_i2c_dev_pm_ops, | ||
| 625 | }, | 660 | }, |
| 626 | .probe = sh_mobile_i2c_probe, | 661 | .probe = sh_mobile_i2c_probe, |
| 627 | .remove = sh_mobile_i2c_remove, | 662 | .remove = sh_mobile_i2c_remove, |
diff --git a/drivers/input/input.c b/drivers/input/input.c index 851791d955f3..556539d617a4 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c | |||
| @@ -1265,14 +1265,14 @@ static struct device_type input_dev_type = { | |||
| 1265 | .uevent = input_dev_uevent, | 1265 | .uevent = input_dev_uevent, |
| 1266 | }; | 1266 | }; |
| 1267 | 1267 | ||
| 1268 | static char *input_nodename(struct device *dev) | 1268 | static char *input_devnode(struct device *dev, mode_t *mode) |
| 1269 | { | 1269 | { |
| 1270 | return kasprintf(GFP_KERNEL, "input/%s", dev_name(dev)); | 1270 | return kasprintf(GFP_KERNEL, "input/%s", dev_name(dev)); |
| 1271 | } | 1271 | } |
| 1272 | 1272 | ||
| 1273 | struct class input_class = { | 1273 | struct class input_class = { |
| 1274 | .name = "input", | 1274 | .name = "input", |
| 1275 | .nodename = input_nodename, | 1275 | .devnode = input_devnode, |
| 1276 | }; | 1276 | }; |
| 1277 | EXPORT_SYMBOL_GPL(input_class); | 1277 | EXPORT_SYMBOL_GPL(input_class); |
| 1278 | 1278 | ||
diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c index 87ec7b18ac69..bba85add35a3 100644 --- a/drivers/input/keyboard/omap-keypad.c +++ b/drivers/input/keyboard/omap-keypad.c | |||
| @@ -116,7 +116,7 @@ static irqreturn_t omap_kp_interrupt(int irq, void *dev_id) | |||
| 116 | } | 116 | } |
| 117 | } else | 117 | } else |
| 118 | /* disable keyboard interrupt and schedule for handling */ | 118 | /* disable keyboard interrupt and schedule for handling */ |
| 119 | omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); | 119 | omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); |
| 120 | 120 | ||
| 121 | tasklet_schedule(&kp_tasklet); | 121 | tasklet_schedule(&kp_tasklet); |
| 122 | 122 | ||
| @@ -143,20 +143,20 @@ static void omap_kp_scan_keypad(struct omap_kp *omap_kp, unsigned char *state) | |||
| 143 | 143 | ||
| 144 | } else { | 144 | } else { |
| 145 | /* disable keyboard interrupt and schedule for handling */ | 145 | /* disable keyboard interrupt and schedule for handling */ |
| 146 | omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); | 146 | omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); |
| 147 | 147 | ||
| 148 | /* read the keypad status */ | 148 | /* read the keypad status */ |
| 149 | omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); | 149 | omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC); |
| 150 | for (col = 0; col < omap_kp->cols; col++) { | 150 | for (col = 0; col < omap_kp->cols; col++) { |
| 151 | omap_writew(~(1 << col) & 0xff, | 151 | omap_writew(~(1 << col) & 0xff, |
| 152 | OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); | 152 | OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC); |
| 153 | 153 | ||
| 154 | udelay(omap_kp->delay); | 154 | udelay(omap_kp->delay); |
| 155 | 155 | ||
| 156 | state[col] = ~omap_readw(OMAP_MPUIO_BASE + | 156 | state[col] = ~omap_readw(OMAP1_MPUIO_BASE + |
| 157 | OMAP_MPUIO_KBR_LATCH) & 0xff; | 157 | OMAP_MPUIO_KBR_LATCH) & 0xff; |
| 158 | } | 158 | } |
| 159 | omap_writew(0x00, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); | 159 | omap_writew(0x00, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC); |
| 160 | udelay(2); | 160 | udelay(2); |
| 161 | } | 161 | } |
| 162 | } | 162 | } |
| @@ -234,7 +234,7 @@ static void omap_kp_tasklet(unsigned long data) | |||
| 234 | for (i = 0; i < omap_kp_data->rows; i++) | 234 | for (i = 0; i < omap_kp_data->rows; i++) |
| 235 | enable_irq(gpio_to_irq(row_gpios[i])); | 235 | enable_irq(gpio_to_irq(row_gpios[i])); |
| 236 | } else { | 236 | } else { |
| 237 | omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); | 237 | omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); |
| 238 | kp_cur_group = -1; | 238 | kp_cur_group = -1; |
| 239 | } | 239 | } |
| 240 | } | 240 | } |
| @@ -317,7 +317,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev) | |||
| 317 | 317 | ||
| 318 | /* Disable the interrupt for the MPUIO keyboard */ | 318 | /* Disable the interrupt for the MPUIO keyboard */ |
| 319 | if (!cpu_is_omap24xx()) | 319 | if (!cpu_is_omap24xx()) |
| 320 | omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); | 320 | omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); |
| 321 | 321 | ||
| 322 | keymap = pdata->keymap; | 322 | keymap = pdata->keymap; |
| 323 | 323 | ||
| @@ -391,7 +391,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev) | |||
| 391 | } | 391 | } |
| 392 | 392 | ||
| 393 | if (pdata->dbounce) | 393 | if (pdata->dbounce) |
| 394 | omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING); | 394 | omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING); |
| 395 | 395 | ||
| 396 | /* scan current status and enable interrupt */ | 396 | /* scan current status and enable interrupt */ |
| 397 | omap_kp_scan_keypad(omap_kp, keypad_state); | 397 | omap_kp_scan_keypad(omap_kp, keypad_state); |
| @@ -402,7 +402,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev) | |||
| 402 | "omap-keypad", omap_kp) < 0) | 402 | "omap-keypad", omap_kp) < 0) |
| 403 | goto err4; | 403 | goto err4; |
| 404 | } | 404 | } |
| 405 | omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); | 405 | omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); |
| 406 | } else { | 406 | } else { |
| 407 | for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) { | 407 | for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) { |
| 408 | if (request_irq(gpio_to_irq(row_gpios[irq_idx]), | 408 | if (request_irq(gpio_to_irq(row_gpios[irq_idx]), |
| @@ -449,7 +449,7 @@ static int __devexit omap_kp_remove(struct platform_device *pdev) | |||
| 449 | free_irq(gpio_to_irq(row_gpios[i]), 0); | 449 | free_irq(gpio_to_irq(row_gpios[i]), 0); |
| 450 | } | 450 | } |
| 451 | } else { | 451 | } else { |
| 452 | omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); | 452 | omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); |
| 453 | free_irq(omap_kp->irq, 0); | 453 | free_irq(omap_kp->irq, 0); |
| 454 | } | 454 | } |
| 455 | 455 | ||
diff --git a/drivers/input/keyboard/sh_keysc.c b/drivers/input/keyboard/sh_keysc.c index 0714bf2c28fc..887af79b7bff 100644 --- a/drivers/input/keyboard/sh_keysc.c +++ b/drivers/input/keyboard/sh_keysc.c | |||
| @@ -80,6 +80,9 @@ static irqreturn_t sh_keysc_isr(int irq, void *dev_id) | |||
| 80 | iowrite16(KYCR2_IRQ_LEVEL | (keyin_set << 8), | 80 | iowrite16(KYCR2_IRQ_LEVEL | (keyin_set << 8), |
| 81 | priv->iomem_base + KYCR2_OFFS); | 81 | priv->iomem_base + KYCR2_OFFS); |
| 82 | 82 | ||
| 83 | if (pdata->kycr2_delay) | ||
| 84 | udelay(pdata->kycr2_delay); | ||
| 85 | |||
| 83 | keys ^= ~0; | 86 | keys ^= ~0; |
| 84 | keys &= (1 << (sh_keysc_mode[pdata->mode].keyin * | 87 | keys &= (1 << (sh_keysc_mode[pdata->mode].keyin * |
| 85 | sh_keysc_mode[pdata->mode].keyout)) - 1; | 88 | sh_keysc_mode[pdata->mode].keyout)) - 1; |
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index cbe21bc96b52..1a50be379cbc 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig | |||
| @@ -279,4 +279,24 @@ config INPUT_BFIN_ROTARY | |||
| 279 | To compile this driver as a module, choose M here: the | 279 | To compile this driver as a module, choose M here: the |
| 280 | module will be called bfin-rotary. | 280 | module will be called bfin-rotary. |
| 281 | 281 | ||
| 282 | config INPUT_WM831X_ON | ||
| 283 | tristate "WM831X ON pin" | ||
| 284 | depends on MFD_WM831X | ||
| 285 | help | ||
| 286 | Support the ON pin of WM831X PMICs as an input device | ||
| 287 | reporting power button status. | ||
| 288 | |||
| 289 | To compile this driver as a module, choose M here: the module | ||
| 290 | will be called wm831x_on. | ||
| 291 | |||
| 292 | config INPUT_PCAP | ||
| 293 | tristate "Motorola EZX PCAP misc input events" | ||
| 294 | depends on EZX_PCAP | ||
| 295 | help | ||
| 296 | Say Y here if you want to use Power key and Headphone button | ||
| 297 | on Motorola EZX phones. | ||
| 298 | |||
| 299 | To compile this driver as a module, choose M here: the | ||
| 300 | module will be called pcap_keys. | ||
| 301 | |||
| 282 | endif | 302 | endif |
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 79c1e9a5ea31..bf4db626c313 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile | |||
| @@ -16,6 +16,7 @@ obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o | |||
| 16 | obj-$(CONFIG_INPUT_IXP4XX_BEEPER) += ixp4xx-beeper.o | 16 | obj-$(CONFIG_INPUT_IXP4XX_BEEPER) += ixp4xx-beeper.o |
| 17 | obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o | 17 | obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o |
| 18 | obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o | 18 | obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o |
| 19 | obj-$(CONFIG_INPUT_PCAP) += pcap_keys.o | ||
| 19 | obj-$(CONFIG_INPUT_PCF50633_PMU) += pcf50633-input.o | 20 | obj-$(CONFIG_INPUT_PCF50633_PMU) += pcf50633-input.o |
| 20 | obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o | 21 | obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o |
| 21 | obj-$(CONFIG_INPUT_POWERMATE) += powermate.o | 22 | obj-$(CONFIG_INPUT_POWERMATE) += powermate.o |
| @@ -26,4 +27,6 @@ obj-$(CONFIG_INPUT_SPARCSPKR) += sparcspkr.o | |||
| 26 | obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o | 27 | obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o |
| 27 | obj-$(CONFIG_INPUT_UINPUT) += uinput.o | 28 | obj-$(CONFIG_INPUT_UINPUT) += uinput.o |
| 28 | obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o | 29 | obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o |
| 30 | obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o | ||
| 29 | obj-$(CONFIG_INPUT_YEALINK) += yealink.o | 31 | obj-$(CONFIG_INPUT_YEALINK) += yealink.o |
| 32 | |||
diff --git a/drivers/input/misc/pcap_keys.c b/drivers/input/misc/pcap_keys.c new file mode 100644 index 000000000000..7ea969347ca9 --- /dev/null +++ b/drivers/input/misc/pcap_keys.c | |||
| @@ -0,0 +1,144 @@ | |||
| 1 | /* | ||
| 2 | * Input driver for PCAP events: | ||
| 3 | * * Power key | ||
| 4 | * * Headphone button | ||
| 5 | * | ||
| 6 | * Copyright (c) 2008,2009 Ilya Petrov <ilya.muromec@gmail.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/input.h> | ||
| 19 | #include <linux/mfd/ezx-pcap.h> | ||
| 20 | |||
| 21 | struct pcap_keys { | ||
| 22 | struct pcap_chip *pcap; | ||
| 23 | struct input_dev *input; | ||
| 24 | }; | ||
| 25 | |||
| 26 | /* PCAP2 interrupts us on keypress */ | ||
| 27 | static irqreturn_t pcap_keys_handler(int irq, void *_pcap_keys) | ||
| 28 | { | ||
| 29 | struct pcap_keys *pcap_keys = _pcap_keys; | ||
| 30 | int pirq = irq_to_pcap(pcap_keys->pcap, irq); | ||
| 31 | u32 pstat; | ||
| 32 | |||
| 33 | ezx_pcap_read(pcap_keys->pcap, PCAP_REG_PSTAT, &pstat); | ||
| 34 | pstat &= 1 << pirq; | ||
| 35 | |||
| 36 | switch (pirq) { | ||
| 37 | case PCAP_IRQ_ONOFF: | ||
| 38 | input_report_key(pcap_keys->input, KEY_POWER, !pstat); | ||
| 39 | break; | ||
| 40 | case PCAP_IRQ_MIC: | ||
| 41 | input_report_key(pcap_keys->input, KEY_HP, !pstat); | ||
| 42 | break; | ||
| 43 | } | ||
| 44 | |||
| 45 | input_sync(pcap_keys->input); | ||
| 46 | |||
| 47 | return IRQ_HANDLED; | ||
| 48 | } | ||
| 49 | |||
| 50 | static int __devinit pcap_keys_probe(struct platform_device *pdev) | ||
| 51 | { | ||
| 52 | int err = -ENOMEM; | ||
| 53 | struct pcap_keys *pcap_keys; | ||
| 54 | struct input_dev *input_dev; | ||
| 55 | |||
| 56 | pcap_keys = kmalloc(sizeof(struct pcap_keys), GFP_KERNEL); | ||
| 57 | if (!pcap_keys) | ||
| 58 | return err; | ||
| 59 | |||
| 60 | pcap_keys->pcap = dev_get_drvdata(pdev->dev.parent); | ||
| 61 | |||
| 62 | input_dev = input_allocate_device(); | ||
| 63 | if (!input_dev) | ||
| 64 | goto fail; | ||
| 65 | |||
| 66 | pcap_keys->input = input_dev; | ||
| 67 | |||
| 68 | platform_set_drvdata(pdev, pcap_keys); | ||
| 69 | input_dev->name = pdev->name; | ||
| 70 | input_dev->phys = "pcap-keys/input0"; | ||
| 71 | input_dev->id.bustype = BUS_HOST; | ||
| 72 | input_dev->dev.parent = &pdev->dev; | ||
| 73 | |||
| 74 | __set_bit(EV_KEY, input_dev->evbit); | ||
| 75 | __set_bit(KEY_POWER, input_dev->keybit); | ||
| 76 | __set_bit(KEY_HP, input_dev->keybit); | ||
| 77 | |||
| 78 | err = input_register_device(input_dev); | ||
| 79 | if (err) | ||
| 80 | goto fail_allocate; | ||
| 81 | |||
| 82 | err = request_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_ONOFF), | ||
| 83 | pcap_keys_handler, 0, "Power key", pcap_keys); | ||
| 84 | if (err) | ||
| 85 | goto fail_register; | ||
| 86 | |||
| 87 | err = request_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_MIC), | ||
| 88 | pcap_keys_handler, 0, "Headphone button", pcap_keys); | ||
| 89 | if (err) | ||
| 90 | goto fail_pwrkey; | ||
| 91 | |||
| 92 | return 0; | ||
| 93 | |||
| 94 | fail_pwrkey: | ||
| 95 | free_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_ONOFF), pcap_keys); | ||
| 96 | fail_register: | ||
| 97 | input_unregister_device(input_dev); | ||
| 98 | goto fail; | ||
| 99 | fail_allocate: | ||
| 100 | input_free_device(input_dev); | ||
| 101 | fail: | ||
| 102 | kfree(pcap_keys); | ||
| 103 | return err; | ||
| 104 | } | ||
| 105 | |||
| 106 | static int __devexit pcap_keys_remove(struct platform_device *pdev) | ||
| 107 | { | ||
| 108 | struct pcap_keys *pcap_keys = platform_get_drvdata(pdev); | ||
| 109 | |||
| 110 | free_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_ONOFF), pcap_keys); | ||
| 111 | free_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_MIC), pcap_keys); | ||
| 112 | |||
| 113 | input_unregister_device(pcap_keys->input); | ||
| 114 | kfree(pcap_keys); | ||
| 115 | |||
| 116 | return 0; | ||
| 117 | } | ||
| 118 | |||
| 119 | static struct platform_driver pcap_keys_device_driver = { | ||
| 120 | .probe = pcap_keys_probe, | ||
| 121 | .remove = __devexit_p(pcap_keys_remove), | ||
| 122 | .driver = { | ||
| 123 | .name = "pcap-keys", | ||
| 124 | .owner = THIS_MODULE, | ||
| 125 | } | ||
| 126 | }; | ||
| 127 | |||
| 128 | static int __init pcap_keys_init(void) | ||
| 129 | { | ||
| 130 | return platform_driver_register(&pcap_keys_device_driver); | ||
| 131 | }; | ||
| 132 | |||
| 133 | static void __exit pcap_keys_exit(void) | ||
| 134 | { | ||
| 135 | platform_driver_unregister(&pcap_keys_device_driver); | ||
| 136 | }; | ||
| 137 | |||
| 138 | module_init(pcap_keys_init); | ||
| 139 | module_exit(pcap_keys_exit); | ||
| 140 | |||
| 141 | MODULE_DESCRIPTION("Motorola PCAP2 input events driver"); | ||
| 142 | MODULE_AUTHOR("Ilya Petrov <ilya.muromec@gmail.com>"); | ||
| 143 | MODULE_LICENSE("GPL"); | ||
| 144 | MODULE_ALIAS("platform:pcap_keys"); | ||
diff --git a/drivers/input/misc/wm831x-on.c b/drivers/input/misc/wm831x-on.c new file mode 100644 index 000000000000..ba4f5dd7c60e --- /dev/null +++ b/drivers/input/misc/wm831x-on.c | |||
| @@ -0,0 +1,163 @@ | |||
| 1 | /** | ||
| 2 | * wm831x-on.c - WM831X ON pin driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Wolfson Microelectronics plc | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General | ||
| 7 | * Public License. See the file "COPYING" in the main directory of this | ||
| 8 | * archive for more details. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/init.h> | ||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/errno.h> | ||
| 24 | #include <linux/input.h> | ||
| 25 | #include <linux/interrupt.h> | ||
| 26 | #include <linux/platform_device.h> | ||
| 27 | #include <linux/workqueue.h> | ||
| 28 | #include <linux/mfd/wm831x/core.h> | ||
| 29 | |||
| 30 | struct wm831x_on { | ||
| 31 | struct input_dev *dev; | ||
| 32 | struct delayed_work work; | ||
| 33 | struct wm831x *wm831x; | ||
| 34 | }; | ||
| 35 | |||
| 36 | /* | ||
| 37 | * The chip gives us an interrupt when the ON pin is asserted but we | ||
| 38 | * then need to poll to see when the pin is deasserted. | ||
| 39 | */ | ||
| 40 | static void wm831x_poll_on(struct work_struct *work) | ||
| 41 | { | ||
| 42 | struct wm831x_on *wm831x_on = container_of(work, struct wm831x_on, | ||
| 43 | work.work); | ||
| 44 | struct wm831x *wm831x = wm831x_on->wm831x; | ||
| 45 | int poll, ret; | ||
| 46 | |||
| 47 | ret = wm831x_reg_read(wm831x, WM831X_ON_PIN_CONTROL); | ||
| 48 | if (ret >= 0) { | ||
| 49 | poll = !(ret & WM831X_ON_PIN_STS); | ||
| 50 | |||
| 51 | input_report_key(wm831x_on->dev, KEY_POWER, poll); | ||
| 52 | input_sync(wm831x_on->dev); | ||
| 53 | } else { | ||
| 54 | dev_err(wm831x->dev, "Failed to read ON status: %d\n", ret); | ||
| 55 | poll = 1; | ||
| 56 | } | ||
| 57 | |||
| 58 | if (poll) | ||
| 59 | schedule_delayed_work(&wm831x_on->work, 100); | ||
| 60 | } | ||
| 61 | |||
| 62 | static irqreturn_t wm831x_on_irq(int irq, void *data) | ||
| 63 | { | ||
| 64 | struct wm831x_on *wm831x_on = data; | ||
| 65 | |||
| 66 | schedule_delayed_work(&wm831x_on->work, 0); | ||
| 67 | |||
| 68 | return IRQ_HANDLED; | ||
| 69 | } | ||
| 70 | |||
| 71 | static int __devinit wm831x_on_probe(struct platform_device *pdev) | ||
| 72 | { | ||
| 73 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 74 | struct wm831x_on *wm831x_on; | ||
| 75 | int irq = platform_get_irq(pdev, 0); | ||
| 76 | int ret; | ||
| 77 | |||
| 78 | wm831x_on = kzalloc(sizeof(struct wm831x_on), GFP_KERNEL); | ||
| 79 | if (!wm831x_on) { | ||
| 80 | dev_err(&pdev->dev, "Can't allocate data\n"); | ||
| 81 | return -ENOMEM; | ||
| 82 | } | ||
| 83 | |||
| 84 | wm831x_on->wm831x = wm831x; | ||
| 85 | INIT_DELAYED_WORK(&wm831x_on->work, wm831x_poll_on); | ||
| 86 | |||
| 87 | wm831x_on->dev = input_allocate_device(); | ||
| 88 | if (!wm831x_on->dev) { | ||
| 89 | dev_err(&pdev->dev, "Can't allocate input dev\n"); | ||
| 90 | ret = -ENOMEM; | ||
| 91 | goto err; | ||
| 92 | } | ||
| 93 | |||
| 94 | wm831x_on->dev->evbit[0] = BIT_MASK(EV_KEY); | ||
| 95 | wm831x_on->dev->keybit[BIT_WORD(KEY_POWER)] = BIT_MASK(KEY_POWER); | ||
| 96 | wm831x_on->dev->name = "wm831x_on"; | ||
| 97 | wm831x_on->dev->phys = "wm831x_on/input0"; | ||
| 98 | wm831x_on->dev->dev.parent = &pdev->dev; | ||
| 99 | |||
| 100 | ret = wm831x_request_irq(wm831x, irq, wm831x_on_irq, | ||
| 101 | IRQF_TRIGGER_RISING, "wm831x_on", wm831x_on); | ||
| 102 | if (ret < 0) { | ||
| 103 | dev_err(&pdev->dev, "Unable to request IRQ: %d\n", ret); | ||
| 104 | goto err_input_dev; | ||
| 105 | } | ||
| 106 | ret = input_register_device(wm831x_on->dev); | ||
| 107 | if (ret) { | ||
| 108 | dev_dbg(&pdev->dev, "Can't register input device: %d\n", ret); | ||
| 109 | goto err_irq; | ||
| 110 | } | ||
| 111 | |||
| 112 | platform_set_drvdata(pdev, wm831x_on); | ||
| 113 | |||
| 114 | return 0; | ||
| 115 | |||
| 116 | err_irq: | ||
| 117 | wm831x_free_irq(wm831x, irq, NULL); | ||
| 118 | err_input_dev: | ||
| 119 | input_free_device(wm831x_on->dev); | ||
| 120 | err: | ||
| 121 | kfree(wm831x_on); | ||
| 122 | return ret; | ||
| 123 | } | ||
| 124 | |||
| 125 | static int __devexit wm831x_on_remove(struct platform_device *pdev) | ||
| 126 | { | ||
| 127 | struct wm831x_on *wm831x_on = platform_get_drvdata(pdev); | ||
| 128 | int irq = platform_get_irq(pdev, 0); | ||
| 129 | |||
| 130 | wm831x_free_irq(wm831x_on->wm831x, irq, wm831x_on); | ||
| 131 | cancel_delayed_work_sync(&wm831x_on->work); | ||
| 132 | input_unregister_device(wm831x_on->dev); | ||
| 133 | kfree(wm831x_on); | ||
| 134 | |||
| 135 | return 0; | ||
| 136 | } | ||
| 137 | |||
| 138 | static struct platform_driver wm831x_on_driver = { | ||
| 139 | .probe = wm831x_on_probe, | ||
| 140 | .remove = __devexit_p(wm831x_on_remove), | ||
| 141 | .driver = { | ||
| 142 | .name = "wm831x-on", | ||
| 143 | .owner = THIS_MODULE, | ||
| 144 | }, | ||
| 145 | }; | ||
| 146 | |||
| 147 | static int __init wm831x_on_init(void) | ||
| 148 | { | ||
| 149 | return platform_driver_register(&wm831x_on_driver); | ||
| 150 | } | ||
| 151 | module_init(wm831x_on_init); | ||
| 152 | |||
| 153 | static void __exit wm831x_on_exit(void) | ||
| 154 | { | ||
| 155 | platform_driver_unregister(&wm831x_on_driver); | ||
| 156 | } | ||
| 157 | module_exit(wm831x_on_exit); | ||
| 158 | |||
| 159 | MODULE_ALIAS("platform:wm831x-on"); | ||
| 160 | MODULE_DESCRIPTION("WM831x ON pin"); | ||
| 161 | MODULE_LICENSE("GPL"); | ||
| 162 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | ||
| 163 | |||
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig index 87a1ae63bcc4..ab02d72afbf3 100644 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig | |||
| @@ -510,4 +510,13 @@ config TOUCHSCREEN_W90X900 | |||
| 510 | To compile this driver as a module, choose M here: the | 510 | To compile this driver as a module, choose M here: the |
| 511 | module will be called w90p910_ts. | 511 | module will be called w90p910_ts. |
| 512 | 512 | ||
| 513 | config TOUCHSCREEN_PCAP | ||
| 514 | tristate "Motorola PCAP touchscreen" | ||
| 515 | depends on EZX_PCAP | ||
| 516 | help | ||
| 517 | Say Y here if you have a Motorola EZX telephone and | ||
| 518 | want to enable support for the built-in touchscreen. | ||
| 519 | |||
| 520 | To compile this driver as a module, choose M here: the | ||
| 521 | module will be called pcap_ts. | ||
| 513 | endif | 522 | endif |
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile index 3e1c5e0b952f..4599bf7ad819 100644 --- a/drivers/input/touchscreen/Makefile +++ b/drivers/input/touchscreen/Makefile | |||
| @@ -40,3 +40,4 @@ obj-$(CONFIG_TOUCHSCREEN_WM97XX_ATMEL) += atmel-wm97xx.o | |||
| 40 | obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE) += mainstone-wm97xx.o | 40 | obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE) += mainstone-wm97xx.o |
| 41 | obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o | 41 | obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o |
| 42 | obj-$(CONFIG_TOUCHSCREEN_W90X900) += w90p910_ts.o | 42 | obj-$(CONFIG_TOUCHSCREEN_W90X900) += w90p910_ts.o |
| 43 | obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o | ||
diff --git a/drivers/input/touchscreen/pcap_ts.c b/drivers/input/touchscreen/pcap_ts.c new file mode 100644 index 000000000000..67fcd33595de --- /dev/null +++ b/drivers/input/touchscreen/pcap_ts.c | |||
| @@ -0,0 +1,271 @@ | |||
| 1 | /* | ||
| 2 | * Driver for Motorola PCAP2 touchscreen as found in the EZX phone platform. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006 Harald Welte <laforge@openezx.org> | ||
| 5 | * Copyright (C) 2009 Daniel Ribeiro <drwyrm@gmail.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/fs.h> | ||
| 16 | #include <linux/string.h> | ||
| 17 | #include <linux/pm.h> | ||
| 18 | #include <linux/timer.h> | ||
| 19 | #include <linux/interrupt.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/input.h> | ||
| 22 | #include <linux/mfd/ezx-pcap.h> | ||
| 23 | |||
| 24 | struct pcap_ts { | ||
| 25 | struct pcap_chip *pcap; | ||
| 26 | struct input_dev *input; | ||
| 27 | struct delayed_work work; | ||
| 28 | u16 x, y; | ||
| 29 | u16 pressure; | ||
| 30 | u8 read_state; | ||
| 31 | }; | ||
| 32 | |||
| 33 | #define SAMPLE_DELAY 20 /* msecs */ | ||
| 34 | |||
| 35 | #define X_AXIS_MIN 0 | ||
| 36 | #define X_AXIS_MAX 1023 | ||
| 37 | #define Y_AXIS_MAX X_AXIS_MAX | ||
| 38 | #define Y_AXIS_MIN X_AXIS_MIN | ||
| 39 | #define PRESSURE_MAX X_AXIS_MAX | ||
| 40 | #define PRESSURE_MIN X_AXIS_MIN | ||
| 41 | |||
| 42 | static void pcap_ts_read_xy(void *data, u16 res[2]) | ||
| 43 | { | ||
| 44 | struct pcap_ts *pcap_ts = data; | ||
| 45 | |||
| 46 | switch (pcap_ts->read_state) { | ||
| 47 | case PCAP_ADC_TS_M_PRESSURE: | ||
| 48 | /* pressure reading is unreliable */ | ||
| 49 | if (res[0] > PRESSURE_MIN && res[0] < PRESSURE_MAX) | ||
| 50 | pcap_ts->pressure = res[0]; | ||
| 51 | pcap_ts->read_state = PCAP_ADC_TS_M_XY; | ||
| 52 | schedule_delayed_work(&pcap_ts->work, 0); | ||
| 53 | break; | ||
| 54 | case PCAP_ADC_TS_M_XY: | ||
| 55 | pcap_ts->y = res[0]; | ||
| 56 | pcap_ts->x = res[1]; | ||
| 57 | if (pcap_ts->x <= X_AXIS_MIN || pcap_ts->x >= X_AXIS_MAX || | ||
| 58 | pcap_ts->y <= Y_AXIS_MIN || pcap_ts->y >= Y_AXIS_MAX) { | ||
| 59 | /* pen has been released */ | ||
| 60 | input_report_abs(pcap_ts->input, ABS_PRESSURE, 0); | ||
| 61 | input_report_key(pcap_ts->input, BTN_TOUCH, 0); | ||
| 62 | |||
| 63 | pcap_ts->read_state = PCAP_ADC_TS_M_STANDBY; | ||
| 64 | schedule_delayed_work(&pcap_ts->work, 0); | ||
| 65 | } else { | ||
| 66 | /* pen is touching the screen */ | ||
| 67 | input_report_abs(pcap_ts->input, ABS_X, pcap_ts->x); | ||
| 68 | input_report_abs(pcap_ts->input, ABS_Y, pcap_ts->y); | ||
| 69 | input_report_key(pcap_ts->input, BTN_TOUCH, 1); | ||
| 70 | input_report_abs(pcap_ts->input, ABS_PRESSURE, | ||
| 71 | pcap_ts->pressure); | ||
| 72 | |||
| 73 | /* switch back to pressure read mode */ | ||
| 74 | pcap_ts->read_state = PCAP_ADC_TS_M_PRESSURE; | ||
| 75 | schedule_delayed_work(&pcap_ts->work, | ||
| 76 | msecs_to_jiffies(SAMPLE_DELAY)); | ||
| 77 | } | ||
| 78 | input_sync(pcap_ts->input); | ||
| 79 | break; | ||
| 80 | default: | ||
| 81 | dev_warn(&pcap_ts->input->dev, | ||
| 82 | "pcap_ts: Warning, unhandled read_state %d\n", | ||
| 83 | pcap_ts->read_state); | ||
| 84 | break; | ||
| 85 | } | ||
| 86 | } | ||
| 87 | |||
| 88 | static void pcap_ts_work(struct work_struct *work) | ||
| 89 | { | ||
| 90 | struct delayed_work *dw = container_of(work, struct delayed_work, work); | ||
| 91 | struct pcap_ts *pcap_ts = container_of(dw, struct pcap_ts, work); | ||
| 92 | u8 ch[2]; | ||
| 93 | |||
| 94 | pcap_set_ts_bits(pcap_ts->pcap, | ||
| 95 | pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT); | ||
| 96 | |||
| 97 | if (pcap_ts->read_state == PCAP_ADC_TS_M_STANDBY) | ||
| 98 | return; | ||
| 99 | |||
| 100 | /* start adc conversion */ | ||
| 101 | ch[0] = PCAP_ADC_CH_TS_X1; | ||
| 102 | ch[1] = PCAP_ADC_CH_TS_Y1; | ||
| 103 | pcap_adc_async(pcap_ts->pcap, PCAP_ADC_BANK_1, 0, ch, | ||
| 104 | pcap_ts_read_xy, pcap_ts); | ||
| 105 | } | ||
| 106 | |||
| 107 | static irqreturn_t pcap_ts_event_touch(int pirq, void *data) | ||
| 108 | { | ||
| 109 | struct pcap_ts *pcap_ts = data; | ||
| 110 | |||
| 111 | if (pcap_ts->read_state == PCAP_ADC_TS_M_STANDBY) { | ||
| 112 | pcap_ts->read_state = PCAP_ADC_TS_M_PRESSURE; | ||
| 113 | schedule_delayed_work(&pcap_ts->work, 0); | ||
| 114 | } | ||
| 115 | return IRQ_HANDLED; | ||
| 116 | } | ||
| 117 | |||
| 118 | static int pcap_ts_open(struct input_dev *dev) | ||
| 119 | { | ||
| 120 | struct pcap_ts *pcap_ts = input_get_drvdata(dev); | ||
| 121 | |||
| 122 | pcap_ts->read_state = PCAP_ADC_TS_M_STANDBY; | ||
| 123 | schedule_delayed_work(&pcap_ts->work, 0); | ||
| 124 | |||
| 125 | return 0; | ||
| 126 | } | ||
| 127 | |||
| 128 | static void pcap_ts_close(struct input_dev *dev) | ||
| 129 | { | ||
| 130 | struct pcap_ts *pcap_ts = input_get_drvdata(dev); | ||
| 131 | |||
| 132 | cancel_delayed_work_sync(&pcap_ts->work); | ||
| 133 | |||
| 134 | pcap_ts->read_state = PCAP_ADC_TS_M_NONTS; | ||
| 135 | pcap_set_ts_bits(pcap_ts->pcap, | ||
| 136 | pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT); | ||
| 137 | } | ||
| 138 | |||
| 139 | static int __devinit pcap_ts_probe(struct platform_device *pdev) | ||
| 140 | { | ||
| 141 | struct input_dev *input_dev; | ||
| 142 | struct pcap_ts *pcap_ts; | ||
| 143 | int err = -ENOMEM; | ||
| 144 | |||
| 145 | pcap_ts = kzalloc(sizeof(*pcap_ts), GFP_KERNEL); | ||
| 146 | if (!pcap_ts) | ||
| 147 | return err; | ||
| 148 | |||
| 149 | pcap_ts->pcap = dev_get_drvdata(pdev->dev.parent); | ||
| 150 | platform_set_drvdata(pdev, pcap_ts); | ||
| 151 | |||
| 152 | input_dev = input_allocate_device(); | ||
| 153 | if (!input_dev) | ||
| 154 | goto fail; | ||
| 155 | |||
| 156 | INIT_DELAYED_WORK(&pcap_ts->work, pcap_ts_work); | ||
| 157 | |||
| 158 | pcap_ts->read_state = PCAP_ADC_TS_M_NONTS; | ||
| 159 | pcap_set_ts_bits(pcap_ts->pcap, | ||
| 160 | pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT); | ||
| 161 | |||
| 162 | pcap_ts->input = input_dev; | ||
| 163 | input_set_drvdata(input_dev, pcap_ts); | ||
| 164 | |||
| 165 | input_dev->name = "pcap-touchscreen"; | ||
| 166 | input_dev->phys = "pcap_ts/input0"; | ||
| 167 | input_dev->id.bustype = BUS_HOST; | ||
| 168 | input_dev->id.vendor = 0x0001; | ||
| 169 | input_dev->id.product = 0x0002; | ||
| 170 | input_dev->id.version = 0x0100; | ||
| 171 | input_dev->dev.parent = &pdev->dev; | ||
| 172 | input_dev->open = pcap_ts_open; | ||
| 173 | input_dev->close = pcap_ts_close; | ||
| 174 | |||
| 175 | input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); | ||
| 176 | input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); | ||
| 177 | input_set_abs_params(input_dev, ABS_X, X_AXIS_MIN, X_AXIS_MAX, 0, 0); | ||
| 178 | input_set_abs_params(input_dev, ABS_Y, Y_AXIS_MIN, Y_AXIS_MAX, 0, 0); | ||
| 179 | input_set_abs_params(input_dev, ABS_PRESSURE, PRESSURE_MIN, | ||
| 180 | PRESSURE_MAX, 0, 0); | ||
| 181 | |||
| 182 | err = input_register_device(pcap_ts->input); | ||
| 183 | if (err) | ||
| 184 | goto fail_allocate; | ||
| 185 | |||
| 186 | err = request_irq(pcap_to_irq(pcap_ts->pcap, PCAP_IRQ_TS), | ||
| 187 | pcap_ts_event_touch, 0, "Touch Screen", pcap_ts); | ||
| 188 | if (err) | ||
| 189 | goto fail_register; | ||
| 190 | |||
| 191 | return 0; | ||
| 192 | |||
| 193 | fail_register: | ||
| 194 | input_unregister_device(input_dev); | ||
| 195 | goto fail; | ||
| 196 | fail_allocate: | ||
| 197 | input_free_device(input_dev); | ||
| 198 | fail: | ||
| 199 | kfree(pcap_ts); | ||
| 200 | |||
| 201 | return err; | ||
| 202 | } | ||
| 203 | |||
| 204 | static int __devexit pcap_ts_remove(struct platform_device *pdev) | ||
| 205 | { | ||
| 206 | struct pcap_ts *pcap_ts = platform_get_drvdata(pdev); | ||
| 207 | |||
| 208 | free_irq(pcap_to_irq(pcap_ts->pcap, PCAP_IRQ_TS), pcap_ts); | ||
| 209 | cancel_delayed_work_sync(&pcap_ts->work); | ||
| 210 | |||
| 211 | input_unregister_device(pcap_ts->input); | ||
| 212 | |||
| 213 | kfree(pcap_ts); | ||
| 214 | |||
| 215 | return 0; | ||
| 216 | } | ||
| 217 | |||
| 218 | #ifdef CONFIG_PM | ||
| 219 | static int pcap_ts_suspend(struct device *dev) | ||
| 220 | { | ||
| 221 | struct pcap_ts *pcap_ts = dev_get_drvdata(dev); | ||
| 222 | |||
| 223 | pcap_set_ts_bits(pcap_ts->pcap, PCAP_ADC_TS_REF_LOWPWR); | ||
| 224 | return 0; | ||
| 225 | } | ||
| 226 | |||
| 227 | static int pcap_ts_resume(struct device *dev) | ||
| 228 | { | ||
| 229 | struct pcap_ts *pcap_ts = dev_get_drvdata(dev); | ||
| 230 | |||
| 231 | pcap_set_ts_bits(pcap_ts->pcap, | ||
| 232 | pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT); | ||
| 233 | return 0; | ||
| 234 | } | ||
| 235 | |||
| 236 | static struct dev_pm_ops pcap_ts_pm_ops = { | ||
| 237 | .suspend = pcap_ts_suspend, | ||
| 238 | .resume = pcap_ts_resume, | ||
| 239 | }; | ||
| 240 | #define PCAP_TS_PM_OPS (&pcap_ts_pm_ops) | ||
| 241 | #else | ||
| 242 | #define PCAP_TS_PM_OPS NULL | ||
| 243 | #endif | ||
| 244 | |||
| 245 | static struct platform_driver pcap_ts_driver = { | ||
| 246 | .probe = pcap_ts_probe, | ||
| 247 | .remove = __devexit_p(pcap_ts_remove), | ||
| 248 | .driver = { | ||
| 249 | .name = "pcap-ts", | ||
| 250 | .owner = THIS_MODULE, | ||
| 251 | .pm = PCAP_TS_PM_OPS, | ||
| 252 | }, | ||
| 253 | }; | ||
| 254 | |||
| 255 | static int __init pcap_ts_init(void) | ||
| 256 | { | ||
| 257 | return platform_driver_register(&pcap_ts_driver); | ||
| 258 | } | ||
| 259 | |||
| 260 | static void __exit pcap_ts_exit(void) | ||
| 261 | { | ||
| 262 | platform_driver_unregister(&pcap_ts_driver); | ||
| 263 | } | ||
| 264 | |||
| 265 | module_init(pcap_ts_init); | ||
| 266 | module_exit(pcap_ts_exit); | ||
| 267 | |||
| 268 | MODULE_DESCRIPTION("Motorola PCAP2 touchscreen driver"); | ||
| 269 | MODULE_AUTHOR("Daniel Ribeiro / Harald Welte"); | ||
| 270 | MODULE_LICENSE("GPL"); | ||
| 271 | MODULE_ALIAS("platform:pcap_ts"); | ||
diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c index 8ff7e35c7069..f33ac27de643 100644 --- a/drivers/isdn/gigaset/interface.c +++ b/drivers/isdn/gigaset/interface.c | |||
| @@ -408,33 +408,28 @@ static int if_write_room(struct tty_struct *tty) | |||
| 408 | return retval; | 408 | return retval; |
| 409 | } | 409 | } |
| 410 | 410 | ||
| 411 | /* FIXME: This function does not have error returns */ | ||
| 412 | |||
| 413 | static int if_chars_in_buffer(struct tty_struct *tty) | 411 | static int if_chars_in_buffer(struct tty_struct *tty) |
| 414 | { | 412 | { |
| 415 | struct cardstate *cs; | 413 | struct cardstate *cs; |
| 416 | int retval = -ENODEV; | 414 | int retval = 0; |
| 417 | 415 | ||
| 418 | cs = (struct cardstate *) tty->driver_data; | 416 | cs = (struct cardstate *) tty->driver_data; |
| 419 | if (!cs) { | 417 | if (!cs) { |
| 420 | pr_err("%s: no cardstate\n", __func__); | 418 | pr_err("%s: no cardstate\n", __func__); |
| 421 | return -ENODEV; | 419 | return 0; |
| 422 | } | 420 | } |
| 423 | 421 | ||
| 424 | gig_dbg(DEBUG_IF, "%u: %s()", cs->minor_index, __func__); | 422 | gig_dbg(DEBUG_IF, "%u: %s()", cs->minor_index, __func__); |
| 425 | 423 | ||
| 426 | if (mutex_lock_interruptible(&cs->mutex)) | 424 | mutex_lock(&cs->mutex); |
| 427 | return -ERESTARTSYS; // FIXME -EINTR? | ||
| 428 | 425 | ||
| 429 | if (!cs->connected) { | 426 | if (!cs->connected) |
| 430 | gig_dbg(DEBUG_IF, "not connected"); | 427 | gig_dbg(DEBUG_IF, "not connected"); |
| 431 | retval = -ENODEV; | 428 | else if (!cs->open_count) |
| 432 | } else if (!cs->open_count) | ||
| 433 | dev_warn(cs->dev, "%s: device not opened\n", __func__); | 429 | dev_warn(cs->dev, "%s: device not opened\n", __func__); |
| 434 | else if (cs->mstate != MS_LOCKED) { | 430 | else if (cs->mstate != MS_LOCKED) |
| 435 | dev_warn(cs->dev, "can't write to unlocked device\n"); | 431 | dev_warn(cs->dev, "can't write to unlocked device\n"); |
| 436 | retval = -EBUSY; | 432 | else |
| 437 | } else | ||
| 438 | retval = cs->ops->chars_in_buffer(cs); | 433 | retval = cs->ops->chars_in_buffer(cs); |
| 439 | 434 | ||
| 440 | mutex_unlock(&cs->mutex); | 435 | mutex_unlock(&cs->mutex); |
diff --git a/drivers/md/dm-ioctl.c b/drivers/md/dm-ioctl.c index 7f77f18fcafa..a67942931582 100644 --- a/drivers/md/dm-ioctl.c +++ b/drivers/md/dm-ioctl.c | |||
| @@ -1532,7 +1532,7 @@ static const struct file_operations _ctl_fops = { | |||
| 1532 | static struct miscdevice _dm_misc = { | 1532 | static struct miscdevice _dm_misc = { |
| 1533 | .minor = MISC_DYNAMIC_MINOR, | 1533 | .minor = MISC_DYNAMIC_MINOR, |
| 1534 | .name = DM_NAME, | 1534 | .name = DM_NAME, |
| 1535 | .devnode = "mapper/control", | 1535 | .nodename = "mapper/control", |
| 1536 | .fops = &_ctl_fops | 1536 | .fops = &_ctl_fops |
| 1537 | }; | 1537 | }; |
| 1538 | 1538 | ||
diff --git a/drivers/media/dvb/dvb-core/dvbdev.c b/drivers/media/dvb/dvb-core/dvbdev.c index 479dd05762a5..94159b90f733 100644 --- a/drivers/media/dvb/dvb-core/dvbdev.c +++ b/drivers/media/dvb/dvb-core/dvbdev.c | |||
| @@ -447,7 +447,7 @@ static int dvb_uevent(struct device *dev, struct kobj_uevent_env *env) | |||
| 447 | return 0; | 447 | return 0; |
| 448 | } | 448 | } |
| 449 | 449 | ||
| 450 | static char *dvb_nodename(struct device *dev) | 450 | static char *dvb_devnode(struct device *dev, mode_t *mode) |
| 451 | { | 451 | { |
| 452 | struct dvb_device *dvbdev = dev_get_drvdata(dev); | 452 | struct dvb_device *dvbdev = dev_get_drvdata(dev); |
| 453 | 453 | ||
| @@ -478,7 +478,7 @@ static int __init init_dvbdev(void) | |||
| 478 | goto error; | 478 | goto error; |
| 479 | } | 479 | } |
| 480 | dvb_class->dev_uevent = dvb_uevent; | 480 | dvb_class->dev_uevent = dvb_uevent; |
| 481 | dvb_class->nodename = dvb_nodename; | 481 | dvb_class->devnode = dvb_devnode; |
| 482 | return 0; | 482 | return 0; |
| 483 | 483 | ||
| 484 | error: | 484 | error: |
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c index e86878deea71..61c47b824083 100644 --- a/drivers/media/video/sh_mobile_ceu_camera.c +++ b/drivers/media/video/sh_mobile_ceu_camera.c | |||
| @@ -30,7 +30,7 @@ | |||
| 30 | #include <linux/device.h> | 30 | #include <linux/device.h> |
| 31 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
| 32 | #include <linux/videodev2.h> | 32 | #include <linux/videodev2.h> |
| 33 | #include <linux/clk.h> | 33 | #include <linux/pm_runtime.h> |
| 34 | 34 | ||
| 35 | #include <media/v4l2-common.h> | 35 | #include <media/v4l2-common.h> |
| 36 | #include <media/v4l2-dev.h> | 36 | #include <media/v4l2-dev.h> |
| @@ -86,7 +86,6 @@ struct sh_mobile_ceu_dev { | |||
| 86 | 86 | ||
| 87 | unsigned int irq; | 87 | unsigned int irq; |
| 88 | void __iomem *base; | 88 | void __iomem *base; |
| 89 | struct clk *clk; | ||
| 90 | unsigned long video_limit; | 89 | unsigned long video_limit; |
| 91 | 90 | ||
| 92 | /* lock used to protect videobuf */ | 91 | /* lock used to protect videobuf */ |
| @@ -361,7 +360,7 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) | |||
| 361 | if (ret) | 360 | if (ret) |
| 362 | goto err; | 361 | goto err; |
| 363 | 362 | ||
| 364 | clk_enable(pcdev->clk); | 363 | pm_runtime_get_sync(ici->dev); |
| 365 | 364 | ||
| 366 | ceu_write(pcdev, CAPSR, 1 << 16); /* reset */ | 365 | ceu_write(pcdev, CAPSR, 1 << 16); /* reset */ |
| 367 | while (ceu_read(pcdev, CSTSR) & 1) | 366 | while (ceu_read(pcdev, CSTSR) & 1) |
| @@ -395,7 +394,7 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd) | |||
| 395 | } | 394 | } |
| 396 | spin_unlock_irqrestore(&pcdev->lock, flags); | 395 | spin_unlock_irqrestore(&pcdev->lock, flags); |
| 397 | 396 | ||
| 398 | clk_disable(pcdev->clk); | 397 | pm_runtime_put_sync(ici->dev); |
| 399 | 398 | ||
| 400 | icd->ops->release(icd); | 399 | icd->ops->release(icd); |
| 401 | 400 | ||
| @@ -798,7 +797,6 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 798 | struct sh_mobile_ceu_dev *pcdev; | 797 | struct sh_mobile_ceu_dev *pcdev; |
| 799 | struct resource *res; | 798 | struct resource *res; |
| 800 | void __iomem *base; | 799 | void __iomem *base; |
| 801 | char clk_name[8]; | ||
| 802 | unsigned int irq; | 800 | unsigned int irq; |
| 803 | int err = 0; | 801 | int err = 0; |
| 804 | 802 | ||
| @@ -862,13 +860,9 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 862 | goto exit_release_mem; | 860 | goto exit_release_mem; |
| 863 | } | 861 | } |
| 864 | 862 | ||
| 865 | snprintf(clk_name, sizeof(clk_name), "ceu%d", pdev->id); | 863 | pm_suspend_ignore_children(&pdev->dev, true); |
| 866 | pcdev->clk = clk_get(&pdev->dev, clk_name); | 864 | pm_runtime_enable(&pdev->dev); |
| 867 | if (IS_ERR(pcdev->clk)) { | 865 | pm_runtime_resume(&pdev->dev); |
| 868 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | ||
| 869 | err = PTR_ERR(pcdev->clk); | ||
| 870 | goto exit_free_irq; | ||
| 871 | } | ||
| 872 | 866 | ||
| 873 | pcdev->ici.priv = pcdev; | 867 | pcdev->ici.priv = pcdev; |
| 874 | pcdev->ici.dev = &pdev->dev; | 868 | pcdev->ici.dev = &pdev->dev; |
| @@ -878,12 +872,10 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 878 | 872 | ||
| 879 | err = soc_camera_host_register(&pcdev->ici); | 873 | err = soc_camera_host_register(&pcdev->ici); |
| 880 | if (err) | 874 | if (err) |
| 881 | goto exit_free_clk; | 875 | goto exit_free_irq; |
| 882 | 876 | ||
| 883 | return 0; | 877 | return 0; |
| 884 | 878 | ||
| 885 | exit_free_clk: | ||
| 886 | clk_put(pcdev->clk); | ||
| 887 | exit_free_irq: | 879 | exit_free_irq: |
| 888 | free_irq(pcdev->irq, pcdev); | 880 | free_irq(pcdev->irq, pcdev); |
| 889 | exit_release_mem: | 881 | exit_release_mem: |
| @@ -904,7 +896,6 @@ static int sh_mobile_ceu_remove(struct platform_device *pdev) | |||
| 904 | struct sh_mobile_ceu_dev, ici); | 896 | struct sh_mobile_ceu_dev, ici); |
| 905 | 897 | ||
| 906 | soc_camera_host_unregister(soc_host); | 898 | soc_camera_host_unregister(soc_host); |
| 907 | clk_put(pcdev->clk); | ||
| 908 | free_irq(pcdev->irq, pcdev); | 899 | free_irq(pcdev->irq, pcdev); |
| 909 | if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) | 900 | if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) |
| 910 | dma_release_declared_memory(&pdev->dev); | 901 | dma_release_declared_memory(&pdev->dev); |
| @@ -913,9 +904,27 @@ static int sh_mobile_ceu_remove(struct platform_device *pdev) | |||
| 913 | return 0; | 904 | return 0; |
| 914 | } | 905 | } |
| 915 | 906 | ||
| 907 | static int sh_mobile_ceu_runtime_nop(struct device *dev) | ||
| 908 | { | ||
| 909 | /* Runtime PM callback shared between ->runtime_suspend() | ||
| 910 | * and ->runtime_resume(). Simply returns success. | ||
| 911 | * | ||
| 912 | * This driver re-initializes all registers after | ||
| 913 | * pm_runtime_get_sync() anyway so there is no need | ||
| 914 | * to save and restore registers here. | ||
| 915 | */ | ||
| 916 | return 0; | ||
| 917 | } | ||
| 918 | |||
| 919 | static struct dev_pm_ops sh_mobile_ceu_dev_pm_ops = { | ||
| 920 | .runtime_suspend = sh_mobile_ceu_runtime_nop, | ||
| 921 | .runtime_resume = sh_mobile_ceu_runtime_nop, | ||
| 922 | }; | ||
| 923 | |||
| 916 | static struct platform_driver sh_mobile_ceu_driver = { | 924 | static struct platform_driver sh_mobile_ceu_driver = { |
| 917 | .driver = { | 925 | .driver = { |
| 918 | .name = "sh_mobile_ceu", | 926 | .name = "sh_mobile_ceu", |
| 927 | .pm = &sh_mobile_ceu_dev_pm_ops, | ||
| 919 | }, | 928 | }, |
| 920 | .probe = sh_mobile_ceu_probe, | 929 | .probe = sh_mobile_ceu_probe, |
| 921 | .remove = sh_mobile_ceu_remove, | 930 | .remove = sh_mobile_ceu_remove, |
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 491ac0f800d2..570be139f9df 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig | |||
| @@ -108,6 +108,19 @@ config TWL4030_CORE | |||
| 108 | high speed USB OTG transceiver, an audio codec (on most | 108 | high speed USB OTG transceiver, an audio codec (on most |
| 109 | versions) and many other features. | 109 | versions) and many other features. |
| 110 | 110 | ||
| 111 | config TWL4030_POWER | ||
| 112 | bool "Support power resources on TWL4030 family chips" | ||
| 113 | depends on TWL4030_CORE && ARM | ||
| 114 | help | ||
| 115 | Say yes here if you want to use the power resources on the | ||
| 116 | TWL4030 family chips. Most of these resources are regulators, | ||
| 117 | which have a separate driver; some are control signals, such | ||
| 118 | as clock request handshaking. | ||
| 119 | |||
| 120 | This driver uses board-specific data to initialize the resources | ||
| 121 | and load scripts controling which resources are switched off/on | ||
| 122 | or reset when a sleep, wakeup or warm reset event occurs. | ||
| 123 | |||
| 111 | config MFD_TMIO | 124 | config MFD_TMIO |
| 112 | bool | 125 | bool |
| 113 | default n | 126 | default n |
| @@ -157,6 +170,16 @@ config MFD_WM8400 | |||
| 157 | the device, additional drivers must be enabled in order to use | 170 | the device, additional drivers must be enabled in order to use |
| 158 | the functionality of the device. | 171 | the functionality of the device. |
| 159 | 172 | ||
| 173 | config MFD_WM831X | ||
| 174 | tristate "Support Wolfson Microelectronics WM831x PMICs" | ||
| 175 | select MFD_CORE | ||
| 176 | depends on I2C | ||
| 177 | help | ||
| 178 | Support for the Wolfson Microelecronics WM831x PMICs. This | ||
| 179 | driver provides common support for accessing the device, | ||
| 180 | additional drivers must be enabled in order to use the | ||
| 181 | functionality of the device. | ||
| 182 | |||
| 160 | config MFD_WM8350 | 183 | config MFD_WM8350 |
| 161 | tristate | 184 | tristate |
| 162 | 185 | ||
| @@ -228,6 +251,16 @@ config MFD_PCF50633 | |||
| 228 | facilities, and registers devices for the various functions | 251 | facilities, and registers devices for the various functions |
| 229 | so that function-specific drivers can bind to them. | 252 | so that function-specific drivers can bind to them. |
| 230 | 253 | ||
| 254 | config MFD_MC13783 | ||
| 255 | tristate "Support Freescale MC13783" | ||
| 256 | depends on SPI_MASTER | ||
| 257 | select MFD_CORE | ||
| 258 | help | ||
| 259 | Support for the Freescale (Atlas) MC13783 PMIC and audio CODEC. | ||
| 260 | This driver provides common support for accessing the device, | ||
| 261 | additional drivers must be enabled in order to use the | ||
| 262 | functionality of the device. | ||
| 263 | |||
| 231 | config PCF50633_ADC | 264 | config PCF50633_ADC |
| 232 | tristate "Support for NXP PCF50633 ADC" | 265 | tristate "Support for NXP PCF50633 ADC" |
| 233 | depends on MFD_PCF50633 | 266 | depends on MFD_PCF50633 |
| @@ -256,6 +289,15 @@ config AB3100_CORE | |||
| 256 | LEDs, vibrator, system power and temperature, power management | 289 | LEDs, vibrator, system power and temperature, power management |
| 257 | and ALSA sound. | 290 | and ALSA sound. |
| 258 | 291 | ||
| 292 | config AB3100_OTP | ||
| 293 | tristate "ST-Ericsson AB3100 OTP functions" | ||
| 294 | depends on AB3100_CORE | ||
| 295 | default y if AB3100_CORE | ||
| 296 | help | ||
| 297 | Select this to enable the AB3100 Mixed Signal IC OTP (one-time | ||
| 298 | programmable memory) support. This exposes a sysfs file to read | ||
| 299 | out OTP values. | ||
| 300 | |||
| 259 | config EZX_PCAP | 301 | config EZX_PCAP |
| 260 | bool "PCAP Support" | 302 | bool "PCAP Support" |
| 261 | depends on GENERIC_HARDIRQS && SPI_MASTER | 303 | depends on GENERIC_HARDIRQS && SPI_MASTER |
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 6f8a9a1af20b..f3b277b90d40 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile | |||
| @@ -15,6 +15,8 @@ obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o | |||
| 15 | obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o | 15 | obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o |
| 16 | 16 | ||
| 17 | obj-$(CONFIG_MFD_WM8400) += wm8400-core.o | 17 | obj-$(CONFIG_MFD_WM8400) += wm8400-core.o |
| 18 | wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o | ||
| 19 | obj-$(CONFIG_MFD_WM831X) += wm831x.o | ||
| 18 | wm8350-objs := wm8350-core.o wm8350-regmap.o wm8350-gpio.o | 20 | wm8350-objs := wm8350-core.o wm8350-regmap.o wm8350-gpio.o |
| 19 | obj-$(CONFIG_MFD_WM8350) += wm8350.o | 21 | obj-$(CONFIG_MFD_WM8350) += wm8350.o |
| 20 | obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o | 22 | obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o |
| @@ -23,6 +25,9 @@ obj-$(CONFIG_TPS65010) += tps65010.o | |||
| 23 | obj-$(CONFIG_MENELAUS) += menelaus.o | 25 | obj-$(CONFIG_MENELAUS) += menelaus.o |
| 24 | 26 | ||
| 25 | obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o | 27 | obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o |
| 28 | obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o | ||
| 29 | |||
| 30 | obj-$(CONFIG_MFD_MC13783) += mc13783-core.o | ||
| 26 | 31 | ||
| 27 | obj-$(CONFIG_MFD_CORE) += mfd-core.o | 32 | obj-$(CONFIG_MFD_CORE) += mfd-core.o |
| 28 | 33 | ||
| @@ -44,3 +49,4 @@ obj-$(CONFIG_MFD_PCF50633) += pcf50633-core.o | |||
| 44 | obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o | 49 | obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o |
| 45 | obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o | 50 | obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o |
| 46 | obj-$(CONFIG_AB3100_CORE) += ab3100-core.o | 51 | obj-$(CONFIG_AB3100_CORE) += ab3100-core.o |
| 52 | obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o | ||
diff --git a/drivers/mfd/ab3100-core.c b/drivers/mfd/ab3100-core.c index 13e7d7bfe85f..c533f86ff5ea 100644 --- a/drivers/mfd/ab3100-core.c +++ b/drivers/mfd/ab3100-core.c | |||
| @@ -14,7 +14,6 @@ | |||
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/device.h> | 15 | #include <linux/device.h> |
| 16 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/workqueue.h> | ||
| 18 | #include <linux/debugfs.h> | 17 | #include <linux/debugfs.h> |
| 19 | #include <linux/seq_file.h> | 18 | #include <linux/seq_file.h> |
| 20 | #include <linux/uaccess.h> | 19 | #include <linux/uaccess.h> |
| @@ -77,7 +76,7 @@ u8 ab3100_get_chip_type(struct ab3100 *ab3100) | |||
| 77 | } | 76 | } |
| 78 | EXPORT_SYMBOL(ab3100_get_chip_type); | 77 | EXPORT_SYMBOL(ab3100_get_chip_type); |
| 79 | 78 | ||
| 80 | int ab3100_set_register(struct ab3100 *ab3100, u8 reg, u8 regval) | 79 | int ab3100_set_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 regval) |
| 81 | { | 80 | { |
| 82 | u8 regandval[2] = {reg, regval}; | 81 | u8 regandval[2] = {reg, regval}; |
| 83 | int err; | 82 | int err; |
| @@ -107,9 +106,10 @@ int ab3100_set_register(struct ab3100 *ab3100, u8 reg, u8 regval) | |||
| 107 | err = 0; | 106 | err = 0; |
| 108 | } | 107 | } |
| 109 | mutex_unlock(&ab3100->access_mutex); | 108 | mutex_unlock(&ab3100->access_mutex); |
| 110 | return 0; | 109 | return err; |
| 111 | } | 110 | } |
| 112 | EXPORT_SYMBOL(ab3100_set_register); | 111 | EXPORT_SYMBOL(ab3100_set_register_interruptible); |
| 112 | |||
| 113 | 113 | ||
| 114 | /* | 114 | /* |
| 115 | * The test registers exist at an I2C bus address up one | 115 | * The test registers exist at an I2C bus address up one |
| @@ -118,7 +118,7 @@ EXPORT_SYMBOL(ab3100_set_register); | |||
| 118 | * anyway. It's currently only used from this file so declare | 118 | * anyway. It's currently only used from this file so declare |
| 119 | * it static and do not export. | 119 | * it static and do not export. |
| 120 | */ | 120 | */ |
| 121 | static int ab3100_set_test_register(struct ab3100 *ab3100, | 121 | static int ab3100_set_test_register_interruptible(struct ab3100 *ab3100, |
| 122 | u8 reg, u8 regval) | 122 | u8 reg, u8 regval) |
| 123 | { | 123 | { |
| 124 | u8 regandval[2] = {reg, regval}; | 124 | u8 regandval[2] = {reg, regval}; |
| @@ -148,7 +148,8 @@ static int ab3100_set_test_register(struct ab3100 *ab3100, | |||
| 148 | return err; | 148 | return err; |
| 149 | } | 149 | } |
| 150 | 150 | ||
| 151 | int ab3100_get_register(struct ab3100 *ab3100, u8 reg, u8 *regval) | 151 | |
| 152 | int ab3100_get_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 *regval) | ||
| 152 | { | 153 | { |
| 153 | int err; | 154 | int err; |
| 154 | 155 | ||
| @@ -202,9 +203,10 @@ int ab3100_get_register(struct ab3100 *ab3100, u8 reg, u8 *regval) | |||
| 202 | mutex_unlock(&ab3100->access_mutex); | 203 | mutex_unlock(&ab3100->access_mutex); |
| 203 | return err; | 204 | return err; |
| 204 | } | 205 | } |
| 205 | EXPORT_SYMBOL(ab3100_get_register); | 206 | EXPORT_SYMBOL(ab3100_get_register_interruptible); |
| 206 | 207 | ||
| 207 | int ab3100_get_register_page(struct ab3100 *ab3100, | 208 | |
| 209 | int ab3100_get_register_page_interruptible(struct ab3100 *ab3100, | ||
| 208 | u8 first_reg, u8 *regvals, u8 numregs) | 210 | u8 first_reg, u8 *regvals, u8 numregs) |
| 209 | { | 211 | { |
| 210 | int err; | 212 | int err; |
| @@ -258,9 +260,10 @@ int ab3100_get_register_page(struct ab3100 *ab3100, | |||
| 258 | mutex_unlock(&ab3100->access_mutex); | 260 | mutex_unlock(&ab3100->access_mutex); |
| 259 | return err; | 261 | return err; |
| 260 | } | 262 | } |
| 261 | EXPORT_SYMBOL(ab3100_get_register_page); | 263 | EXPORT_SYMBOL(ab3100_get_register_page_interruptible); |
| 264 | |||
| 262 | 265 | ||
| 263 | int ab3100_mask_and_set_register(struct ab3100 *ab3100, | 266 | int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100, |
| 264 | u8 reg, u8 andmask, u8 ormask) | 267 | u8 reg, u8 andmask, u8 ormask) |
| 265 | { | 268 | { |
| 266 | u8 regandval[2] = {reg, 0}; | 269 | u8 regandval[2] = {reg, 0}; |
| @@ -328,7 +331,8 @@ int ab3100_mask_and_set_register(struct ab3100 *ab3100, | |||
| 328 | mutex_unlock(&ab3100->access_mutex); | 331 | mutex_unlock(&ab3100->access_mutex); |
| 329 | return err; | 332 | return err; |
| 330 | } | 333 | } |
| 331 | EXPORT_SYMBOL(ab3100_mask_and_set_register); | 334 | EXPORT_SYMBOL(ab3100_mask_and_set_register_interruptible); |
| 335 | |||
| 332 | 336 | ||
| 333 | /* | 337 | /* |
| 334 | * Register a simple callback for handling any AB3100 events. | 338 | * Register a simple callback for handling any AB3100 events. |
| @@ -371,7 +375,7 @@ static void ab3100_work(struct work_struct *work) | |||
| 371 | u32 fatevent; | 375 | u32 fatevent; |
| 372 | int err; | 376 | int err; |
| 373 | 377 | ||
| 374 | err = ab3100_get_register_page(ab3100, AB3100_EVENTA1, | 378 | err = ab3100_get_register_page_interruptible(ab3100, AB3100_EVENTA1, |
| 375 | event_regs, 3); | 379 | event_regs, 3); |
| 376 | if (err) | 380 | if (err) |
| 377 | goto err_event_wq; | 381 | goto err_event_wq; |
| @@ -417,7 +421,7 @@ static irqreturn_t ab3100_irq_handler(int irq, void *data) | |||
| 417 | * stuff and we will re-enable the interrupts once th | 421 | * stuff and we will re-enable the interrupts once th |
| 418 | * worker has finished. | 422 | * worker has finished. |
| 419 | */ | 423 | */ |
| 420 | disable_irq(ab3100->i2c_client->irq); | 424 | disable_irq_nosync(irq); |
| 421 | schedule_work(&ab3100->work); | 425 | schedule_work(&ab3100->work); |
| 422 | return IRQ_HANDLED; | 426 | return IRQ_HANDLED; |
| 423 | } | 427 | } |
| @@ -435,7 +439,7 @@ static int ab3100_registers_print(struct seq_file *s, void *p) | |||
| 435 | seq_printf(s, "AB3100 registers:\n"); | 439 | seq_printf(s, "AB3100 registers:\n"); |
| 436 | 440 | ||
| 437 | for (reg = 0; reg < 0xff; reg++) { | 441 | for (reg = 0; reg < 0xff; reg++) { |
| 438 | ab3100_get_register(ab3100, reg, &value); | 442 | ab3100_get_register_interruptible(ab3100, reg, &value); |
| 439 | seq_printf(s, "[0x%x]: 0x%x\n", reg, value); | 443 | seq_printf(s, "[0x%x]: 0x%x\n", reg, value); |
| 440 | } | 444 | } |
| 441 | return 0; | 445 | return 0; |
| @@ -465,14 +469,14 @@ static int ab3100_get_set_reg_open_file(struct inode *inode, struct file *file) | |||
| 465 | return 0; | 469 | return 0; |
| 466 | } | 470 | } |
| 467 | 471 | ||
| 468 | static int ab3100_get_set_reg(struct file *file, | 472 | static ssize_t ab3100_get_set_reg(struct file *file, |
| 469 | const char __user *user_buf, | 473 | const char __user *user_buf, |
| 470 | size_t count, loff_t *ppos) | 474 | size_t count, loff_t *ppos) |
| 471 | { | 475 | { |
| 472 | struct ab3100_get_set_reg_priv *priv = file->private_data; | 476 | struct ab3100_get_set_reg_priv *priv = file->private_data; |
| 473 | struct ab3100 *ab3100 = priv->ab3100; | 477 | struct ab3100 *ab3100 = priv->ab3100; |
| 474 | char buf[32]; | 478 | char buf[32]; |
| 475 | int buf_size; | 479 | ssize_t buf_size; |
| 476 | int regp; | 480 | int regp; |
| 477 | unsigned long user_reg; | 481 | unsigned long user_reg; |
| 478 | int err; | 482 | int err; |
| @@ -515,7 +519,7 @@ static int ab3100_get_set_reg(struct file *file, | |||
| 515 | u8 reg = (u8) user_reg; | 519 | u8 reg = (u8) user_reg; |
| 516 | u8 regvalue; | 520 | u8 regvalue; |
| 517 | 521 | ||
| 518 | ab3100_get_register(ab3100, reg, ®value); | 522 | ab3100_get_register_interruptible(ab3100, reg, ®value); |
| 519 | 523 | ||
| 520 | dev_info(ab3100->dev, | 524 | dev_info(ab3100->dev, |
| 521 | "debug read AB3100 reg[0x%02x]: 0x%02x\n", | 525 | "debug read AB3100 reg[0x%02x]: 0x%02x\n", |
| @@ -547,8 +551,8 @@ static int ab3100_get_set_reg(struct file *file, | |||
| 547 | return -EINVAL; | 551 | return -EINVAL; |
| 548 | 552 | ||
| 549 | value = (u8) user_value; | 553 | value = (u8) user_value; |
| 550 | ab3100_set_register(ab3100, reg, value); | 554 | ab3100_set_register_interruptible(ab3100, reg, value); |
| 551 | ab3100_get_register(ab3100, reg, ®value); | 555 | ab3100_get_register_interruptible(ab3100, reg, ®value); |
| 552 | 556 | ||
| 553 | dev_info(ab3100->dev, | 557 | dev_info(ab3100->dev, |
| 554 | "debug write reg[0x%02x] with 0x%02x, " | 558 | "debug write reg[0x%02x] with 0x%02x, " |
| @@ -662,7 +666,7 @@ ab3100_init_settings[] = { | |||
| 662 | .setting = 0x01 | 666 | .setting = 0x01 |
| 663 | }, { | 667 | }, { |
| 664 | .abreg = AB3100_IMRB1, | 668 | .abreg = AB3100_IMRB1, |
| 665 | .setting = 0xFF | 669 | .setting = 0xBF |
| 666 | }, { | 670 | }, { |
| 667 | .abreg = AB3100_IMRB2, | 671 | .abreg = AB3100_IMRB2, |
| 668 | .setting = 0xFF | 672 | .setting = 0xFF |
| @@ -696,7 +700,7 @@ static int __init ab3100_setup(struct ab3100 *ab3100) | |||
| 696 | int i; | 700 | int i; |
| 697 | 701 | ||
| 698 | for (i = 0; i < ARRAY_SIZE(ab3100_init_settings); i++) { | 702 | for (i = 0; i < ARRAY_SIZE(ab3100_init_settings); i++) { |
| 699 | err = ab3100_set_register(ab3100, | 703 | err = ab3100_set_register_interruptible(ab3100, |
| 700 | ab3100_init_settings[i].abreg, | 704 | ab3100_init_settings[i].abreg, |
| 701 | ab3100_init_settings[i].setting); | 705 | ab3100_init_settings[i].setting); |
| 702 | if (err) | 706 | if (err) |
| @@ -705,14 +709,14 @@ static int __init ab3100_setup(struct ab3100 *ab3100) | |||
| 705 | 709 | ||
| 706 | /* | 710 | /* |
| 707 | * Special trick to make the AB3100 use the 32kHz clock (RTC) | 711 | * Special trick to make the AB3100 use the 32kHz clock (RTC) |
| 708 | * bit 3 in test registe 0x02 is a special, undocumented test | 712 | * bit 3 in test register 0x02 is a special, undocumented test |
| 709 | * register bit that only exist in AB3100 P1E | 713 | * register bit that only exist in AB3100 P1E |
| 710 | */ | 714 | */ |
| 711 | if (ab3100->chip_id == 0xc4) { | 715 | if (ab3100->chip_id == 0xc4) { |
| 712 | dev_warn(ab3100->dev, | 716 | dev_warn(ab3100->dev, |
| 713 | "AB3100 P1E variant detected, " | 717 | "AB3100 P1E variant detected, " |
| 714 | "forcing chip to 32KHz\n"); | 718 | "forcing chip to 32KHz\n"); |
| 715 | err = ab3100_set_test_register(ab3100, 0x02, 0x08); | 719 | err = ab3100_set_test_register_interruptible(ab3100, 0x02, 0x08); |
| 716 | } | 720 | } |
| 717 | 721 | ||
| 718 | exit_no_setup: | 722 | exit_no_setup: |
| @@ -833,6 +837,8 @@ static int __init ab3100_probe(struct i2c_client *client, | |||
| 833 | const struct i2c_device_id *id) | 837 | const struct i2c_device_id *id) |
| 834 | { | 838 | { |
| 835 | struct ab3100 *ab3100; | 839 | struct ab3100 *ab3100; |
| 840 | struct ab3100_platform_data *ab3100_plf_data = | ||
| 841 | client->dev.platform_data; | ||
| 836 | int err; | 842 | int err; |
| 837 | int i; | 843 | int i; |
| 838 | 844 | ||
| @@ -852,8 +858,8 @@ static int __init ab3100_probe(struct i2c_client *client, | |||
| 852 | i2c_set_clientdata(client, ab3100); | 858 | i2c_set_clientdata(client, ab3100); |
| 853 | 859 | ||
| 854 | /* Read chip ID register */ | 860 | /* Read chip ID register */ |
| 855 | err = ab3100_get_register(ab3100, AB3100_CID, | 861 | err = ab3100_get_register_interruptible(ab3100, AB3100_CID, |
| 856 | &ab3100->chip_id); | 862 | &ab3100->chip_id); |
| 857 | if (err) { | 863 | if (err) { |
| 858 | dev_err(&client->dev, | 864 | dev_err(&client->dev, |
| 859 | "could not communicate with the AB3100 analog " | 865 | "could not communicate with the AB3100 analog " |
| @@ -916,6 +922,8 @@ static int __init ab3100_probe(struct i2c_client *client, | |||
| 916 | for (i = 0; i < ARRAY_SIZE(ab3100_platform_devs); i++) { | 922 | for (i = 0; i < ARRAY_SIZE(ab3100_platform_devs); i++) { |
| 917 | ab3100_platform_devs[i]->dev.parent = | 923 | ab3100_platform_devs[i]->dev.parent = |
| 918 | &client->dev; | 924 | &client->dev; |
| 925 | ab3100_platform_devs[i]->dev.platform_data = | ||
| 926 | ab3100_plf_data; | ||
| 919 | platform_set_drvdata(ab3100_platform_devs[i], ab3100); | 927 | platform_set_drvdata(ab3100_platform_devs[i], ab3100); |
| 920 | } | 928 | } |
| 921 | 929 | ||
diff --git a/drivers/mfd/ab3100-otp.c b/drivers/mfd/ab3100-otp.c new file mode 100644 index 000000000000..0499b2031a2c --- /dev/null +++ b/drivers/mfd/ab3100-otp.c | |||
| @@ -0,0 +1,268 @@ | |||
| 1 | /* | ||
| 2 | * drivers/mfd/ab3100_otp.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007-2009 ST-Ericsson AB | ||
| 5 | * License terms: GNU General Public License (GPL) version 2 | ||
| 6 | * Driver to read out OTP from the AB3100 Mixed-signal circuit | ||
| 7 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include <linux/module.h> | ||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/init.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/mfd/ab3100.h> | ||
| 15 | #include <linux/debugfs.h> | ||
| 16 | |||
| 17 | /* The OTP registers */ | ||
| 18 | #define AB3100_OTP0 0xb0 | ||
| 19 | #define AB3100_OTP1 0xb1 | ||
| 20 | #define AB3100_OTP2 0xb2 | ||
| 21 | #define AB3100_OTP3 0xb3 | ||
| 22 | #define AB3100_OTP4 0xb4 | ||
| 23 | #define AB3100_OTP5 0xb5 | ||
| 24 | #define AB3100_OTP6 0xb6 | ||
| 25 | #define AB3100_OTP7 0xb7 | ||
| 26 | #define AB3100_OTPP 0xbf | ||
| 27 | |||
| 28 | /** | ||
| 29 | * struct ab3100_otp | ||
| 30 | * @dev containing device | ||
| 31 | * @ab3100 a pointer to the parent ab3100 device struct | ||
| 32 | * @locked whether the OTP is locked, after locking, no more bits | ||
| 33 | * can be changed but before locking it is still possible | ||
| 34 | * to change bits from 1->0. | ||
| 35 | * @freq clocking frequency for the OTP, this frequency is either | ||
| 36 | * 32768Hz or 1MHz/30 | ||
| 37 | * @paf product activation flag, indicates whether this is a real | ||
| 38 | * product (paf true) or a lab board etc (paf false) | ||
| 39 | * @imeich if this is set it is possible to override the | ||
| 40 | * IMEI number found in the tac, fac and svn fields with | ||
| 41 | * (secured) software | ||
| 42 | * @cid customer ID | ||
| 43 | * @tac type allocation code of the IMEI | ||
| 44 | * @fac final assembly code of the IMEI | ||
| 45 | * @svn software version number of the IMEI | ||
| 46 | * @debugfs a debugfs file used when dumping to file | ||
| 47 | */ | ||
| 48 | struct ab3100_otp { | ||
| 49 | struct device *dev; | ||
| 50 | struct ab3100 *ab3100; | ||
| 51 | bool locked; | ||
| 52 | u32 freq; | ||
| 53 | bool paf; | ||
| 54 | bool imeich; | ||
| 55 | u16 cid:14; | ||
| 56 | u32 tac:20; | ||
| 57 | u8 fac; | ||
| 58 | u32 svn:20; | ||
| 59 | struct dentry *debugfs; | ||
| 60 | }; | ||
| 61 | |||
| 62 | static int __init ab3100_otp_read(struct ab3100_otp *otp) | ||
| 63 | { | ||
| 64 | struct ab3100 *ab = otp->ab3100; | ||
| 65 | u8 otpval[8]; | ||
| 66 | u8 otpp; | ||
| 67 | int err; | ||
| 68 | |||
| 69 | err = ab3100_get_register_interruptible(ab, AB3100_OTPP, &otpp); | ||
| 70 | if (err) { | ||
| 71 | dev_err(otp->dev, "unable to read OTPP register\n"); | ||
| 72 | return err; | ||
| 73 | } | ||
| 74 | |||
| 75 | err = ab3100_get_register_page_interruptible(ab, AB3100_OTP0, | ||
| 76 | otpval, 8); | ||
| 77 | if (err) { | ||
| 78 | dev_err(otp->dev, "unable to read OTP register page\n"); | ||
| 79 | return err; | ||
| 80 | } | ||
| 81 | |||
| 82 | /* Cache OTP properties, they never change by nature */ | ||
| 83 | otp->locked = (otpp & 0x80); | ||
| 84 | otp->freq = (otpp & 0x40) ? 32768 : 34100; | ||
| 85 | otp->paf = (otpval[1] & 0x80); | ||
| 86 | otp->imeich = (otpval[1] & 0x40); | ||
| 87 | otp->cid = ((otpval[1] << 8) | otpval[0]) & 0x3fff; | ||
| 88 | otp->tac = ((otpval[4] & 0x0f) << 16) | (otpval[3] << 8) | otpval[2]; | ||
| 89 | otp->fac = ((otpval[5] & 0x0f) << 4) | (otpval[4] >> 4); | ||
| 90 | otp->svn = (otpval[7] << 12) | (otpval[6] << 4) | (otpval[5] >> 4); | ||
| 91 | return 0; | ||
| 92 | } | ||
| 93 | |||
| 94 | /* | ||
| 95 | * This is a simple debugfs human-readable file that dumps out | ||
| 96 | * the contents of the OTP. | ||
| 97 | */ | ||
| 98 | #ifdef CONFIG_DEBUGFS | ||
| 99 | static int show_otp(struct seq_file *s, void *v) | ||
| 100 | { | ||
| 101 | struct ab3100_otp *otp = s->private; | ||
| 102 | int err; | ||
| 103 | |||
| 104 | seq_printf(s, "OTP is %s\n", otp->locked ? "LOCKED" : "UNLOCKED"); | ||
| 105 | seq_printf(s, "OTP clock switch startup is %uHz\n", otp->freq); | ||
| 106 | seq_printf(s, "PAF is %s\n", otp->paf ? "SET" : "NOT SET"); | ||
| 107 | seq_printf(s, "IMEI is %s\n", otp->imeich ? | ||
| 108 | "CHANGEABLE" : "NOT CHANGEABLE"); | ||
| 109 | seq_printf(s, "CID: 0x%04x (decimal: %d)\n", otp->cid, otp->cid); | ||
| 110 | seq_printf(s, "IMEI: %u-%u-%u\n", otp->tac, otp->fac, otp->svn); | ||
| 111 | return 0; | ||
| 112 | } | ||
| 113 | |||
| 114 | static int ab3100_otp_open(struct inode *inode, struct file *file) | ||
| 115 | { | ||
| 116 | return single_open(file, ab3100_otp_show, inode->i_private); | ||
| 117 | } | ||
| 118 | |||
| 119 | static const struct file_operations ab3100_otp_operations = { | ||
| 120 | .open = ab3100_otp_open, | ||
| 121 | .read = seq_read, | ||
| 122 | .llseek = seq_lseek, | ||
| 123 | .release = single_release, | ||
| 124 | }; | ||
| 125 | |||
| 126 | static int __init ab3100_otp_init_debugfs(struct device *dev, | ||
| 127 | struct ab3100_otp *otp) | ||
| 128 | { | ||
| 129 | otp->debugfs = debugfs_create_file("ab3100_otp", S_IFREG | S_IRUGO, | ||
| 130 | NULL, otp, | ||
| 131 | &ab3100_otp_operations); | ||
| 132 | if (!otp->debugfs) { | ||
| 133 | dev_err(dev, "AB3100 debugfs OTP file registration failed!\n"); | ||
| 134 | return err; | ||
| 135 | } | ||
| 136 | } | ||
| 137 | |||
| 138 | static void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp) | ||
| 139 | { | ||
| 140 | debugfs_remove_file(otp->debugfs); | ||
| 141 | } | ||
| 142 | #else | ||
| 143 | /* Compile this out if debugfs not selected */ | ||
| 144 | static inline int __init ab3100_otp_init_debugfs(struct device *dev, | ||
| 145 | struct ab3100_otp *otp) | ||
| 146 | { | ||
| 147 | return 0; | ||
| 148 | } | ||
| 149 | |||
| 150 | static inline void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp) | ||
| 151 | { | ||
| 152 | } | ||
| 153 | #endif | ||
| 154 | |||
| 155 | #define SHOW_AB3100_ATTR(name) \ | ||
| 156 | static ssize_t ab3100_otp_##name##_show(struct device *dev, \ | ||
| 157 | struct device_attribute *attr, \ | ||
| 158 | char *buf) \ | ||
| 159 | {\ | ||
| 160 | struct ab3100_otp *otp = dev_get_drvdata(dev); \ | ||
| 161 | return sprintf(buf, "%u\n", otp->name); \ | ||
| 162 | } | ||
| 163 | |||
| 164 | SHOW_AB3100_ATTR(locked) | ||
| 165 | SHOW_AB3100_ATTR(freq) | ||
| 166 | SHOW_AB3100_ATTR(paf) | ||
| 167 | SHOW_AB3100_ATTR(imeich) | ||
| 168 | SHOW_AB3100_ATTR(cid) | ||
| 169 | SHOW_AB3100_ATTR(fac) | ||
| 170 | SHOW_AB3100_ATTR(tac) | ||
| 171 | SHOW_AB3100_ATTR(svn) | ||
| 172 | |||
| 173 | static struct device_attribute ab3100_otp_attrs[] = { | ||
| 174 | __ATTR(locked, S_IRUGO, ab3100_otp_locked_show, NULL), | ||
| 175 | __ATTR(freq, S_IRUGO, ab3100_otp_freq_show, NULL), | ||
| 176 | __ATTR(paf, S_IRUGO, ab3100_otp_paf_show, NULL), | ||
| 177 | __ATTR(imeich, S_IRUGO, ab3100_otp_imeich_show, NULL), | ||
| 178 | __ATTR(cid, S_IRUGO, ab3100_otp_cid_show, NULL), | ||
| 179 | __ATTR(fac, S_IRUGO, ab3100_otp_fac_show, NULL), | ||
| 180 | __ATTR(tac, S_IRUGO, ab3100_otp_tac_show, NULL), | ||
| 181 | __ATTR(svn, S_IRUGO, ab3100_otp_svn_show, NULL), | ||
| 182 | }; | ||
| 183 | |||
| 184 | static int __init ab3100_otp_probe(struct platform_device *pdev) | ||
| 185 | { | ||
| 186 | struct ab3100_otp *otp; | ||
| 187 | int err = 0; | ||
| 188 | int i; | ||
| 189 | |||
| 190 | otp = kzalloc(sizeof(struct ab3100_otp), GFP_KERNEL); | ||
| 191 | if (!otp) { | ||
| 192 | dev_err(&pdev->dev, "could not allocate AB3100 OTP device\n"); | ||
| 193 | return -ENOMEM; | ||
| 194 | } | ||
| 195 | otp->dev = &pdev->dev; | ||
| 196 | |||
| 197 | /* Replace platform data coming in with a local struct */ | ||
| 198 | otp->ab3100 = platform_get_drvdata(pdev); | ||
| 199 | platform_set_drvdata(pdev, otp); | ||
| 200 | |||
| 201 | err = ab3100_otp_read(otp); | ||
| 202 | if (err) | ||
| 203 | return err; | ||
| 204 | |||
| 205 | dev_info(&pdev->dev, "AB3100 OTP readout registered\n"); | ||
| 206 | |||
| 207 | /* sysfs entries */ | ||
| 208 | for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++) { | ||
| 209 | err = device_create_file(&pdev->dev, | ||
| 210 | &ab3100_otp_attrs[i]); | ||
| 211 | if (err) | ||
| 212 | goto out_no_sysfs; | ||
| 213 | } | ||
| 214 | |||
| 215 | /* debugfs entries */ | ||
| 216 | err = ab3100_otp_init_debugfs(&pdev->dev, otp); | ||
| 217 | if (err) | ||
| 218 | goto out_no_debugfs; | ||
| 219 | |||
| 220 | return 0; | ||
| 221 | |||
| 222 | out_no_sysfs: | ||
| 223 | for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++) | ||
| 224 | device_remove_file(&pdev->dev, | ||
| 225 | &ab3100_otp_attrs[i]); | ||
| 226 | out_no_debugfs: | ||
| 227 | kfree(otp); | ||
| 228 | return err; | ||
| 229 | } | ||
| 230 | |||
| 231 | static int __exit ab3100_otp_remove(struct platform_device *pdev) | ||
| 232 | { | ||
| 233 | struct ab3100_otp *otp = platform_get_drvdata(pdev); | ||
| 234 | int i; | ||
| 235 | |||
| 236 | for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++) | ||
| 237 | device_remove_file(&pdev->dev, | ||
| 238 | &ab3100_otp_attrs[i]); | ||
| 239 | ab3100_otp_exit_debugfs(otp); | ||
| 240 | kfree(otp); | ||
| 241 | return 0; | ||
| 242 | } | ||
| 243 | |||
| 244 | static struct platform_driver ab3100_otp_driver = { | ||
| 245 | .driver = { | ||
| 246 | .name = "ab3100-otp", | ||
| 247 | .owner = THIS_MODULE, | ||
| 248 | }, | ||
| 249 | .remove = __exit_p(ab3100_otp_remove), | ||
| 250 | }; | ||
| 251 | |||
| 252 | static int __init ab3100_otp_init(void) | ||
| 253 | { | ||
| 254 | return platform_driver_probe(&ab3100_otp_driver, | ||
| 255 | ab3100_otp_probe); | ||
| 256 | } | ||
| 257 | |||
| 258 | static void __exit ab3100_otp_exit(void) | ||
| 259 | { | ||
| 260 | platform_driver_unregister(&ab3100_otp_driver); | ||
| 261 | } | ||
| 262 | |||
| 263 | module_init(ab3100_otp_init); | ||
| 264 | module_exit(ab3100_otp_exit); | ||
| 265 | |||
| 266 | MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>"); | ||
| 267 | MODULE_DESCRIPTION("AB3100 OTP Readout Driver"); | ||
| 268 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c index 5b6e58a3ba46..3d4a861976ca 100644 --- a/drivers/mfd/dm355evm_msp.c +++ b/drivers/mfd/dm355evm_msp.c | |||
| @@ -107,8 +107,16 @@ static const u8 msp_gpios[] = { | |||
| 107 | MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1), | 107 | MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1), |
| 108 | MSP_GPIO(4, SWITCH1), | 108 | MSP_GPIO(4, SWITCH1), |
| 109 | /* switches on MMC/SD sockets */ | 109 | /* switches on MMC/SD sockets */ |
| 110 | MSP_GPIO(1, SDMMC), MSP_GPIO(2, SDMMC), /* mmc0 WP, nCD */ | 110 | /* |
| 111 | MSP_GPIO(3, SDMMC), MSP_GPIO(4, SDMMC), /* mmc1 WP, nCD */ | 111 | * Note: EVMDM355_ECP_VA4.pdf suggests that Bit 2 and 4 should be |
| 112 | * checked for card detection. However on the EVM bit 1 and 3 gives | ||
| 113 | * this status, for 0 and 1 instance respectively. The pdf also | ||
| 114 | * suggests that Bit 1 and 3 should be checked for write protection. | ||
| 115 | * However on the EVM bit 2 and 4 gives this status,for 0 and 1 | ||
| 116 | * instance respectively. | ||
| 117 | */ | ||
| 118 | MSP_GPIO(2, SDMMC), MSP_GPIO(1, SDMMC), /* mmc0 WP, nCD */ | ||
| 119 | MSP_GPIO(4, SDMMC), MSP_GPIO(3, SDMMC), /* mmc1 WP, nCD */ | ||
| 112 | }; | 120 | }; |
| 113 | 121 | ||
| 114 | #define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3) | 122 | #define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3) |
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c index c1de4afa89a6..016be4938e4c 100644 --- a/drivers/mfd/ezx-pcap.c +++ b/drivers/mfd/ezx-pcap.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/irq.h> | 17 | #include <linux/irq.h> |
| 18 | #include <linux/mfd/ezx-pcap.h> | 18 | #include <linux/mfd/ezx-pcap.h> |
| 19 | #include <linux/spi/spi.h> | 19 | #include <linux/spi/spi.h> |
| 20 | #include <linux/gpio.h> | ||
| 20 | 21 | ||
| 21 | #define PCAP_ADC_MAXQ 8 | 22 | #define PCAP_ADC_MAXQ 8 |
| 22 | struct pcap_adc_request { | 23 | struct pcap_adc_request { |
| @@ -106,11 +107,35 @@ int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value) | |||
| 106 | } | 107 | } |
| 107 | EXPORT_SYMBOL_GPL(ezx_pcap_read); | 108 | EXPORT_SYMBOL_GPL(ezx_pcap_read); |
| 108 | 109 | ||
| 110 | int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val) | ||
| 111 | { | ||
| 112 | int ret; | ||
| 113 | u32 tmp = PCAP_REGISTER_READ_OP_BIT | | ||
| 114 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); | ||
| 115 | |||
| 116 | mutex_lock(&pcap->io_mutex); | ||
| 117 | ret = ezx_pcap_putget(pcap, &tmp); | ||
| 118 | if (ret) | ||
| 119 | goto out_unlock; | ||
| 120 | |||
| 121 | tmp &= (PCAP_REGISTER_VALUE_MASK & ~mask); | ||
| 122 | tmp |= (val & mask) | PCAP_REGISTER_WRITE_OP_BIT | | ||
| 123 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT); | ||
| 124 | |||
| 125 | ret = ezx_pcap_putget(pcap, &tmp); | ||
| 126 | out_unlock: | ||
| 127 | mutex_unlock(&pcap->io_mutex); | ||
| 128 | |||
| 129 | return ret; | ||
| 130 | } | ||
| 131 | EXPORT_SYMBOL_GPL(ezx_pcap_set_bits); | ||
| 132 | |||
| 109 | /* IRQ */ | 133 | /* IRQ */ |
| 110 | static inline unsigned int irq2pcap(struct pcap_chip *pcap, int irq) | 134 | int irq_to_pcap(struct pcap_chip *pcap, int irq) |
| 111 | { | 135 | { |
| 112 | return 1 << (irq - pcap->irq_base); | 136 | return irq - pcap->irq_base; |
| 113 | } | 137 | } |
| 138 | EXPORT_SYMBOL_GPL(irq_to_pcap); | ||
| 114 | 139 | ||
| 115 | int pcap_to_irq(struct pcap_chip *pcap, int irq) | 140 | int pcap_to_irq(struct pcap_chip *pcap, int irq) |
| 116 | { | 141 | { |
| @@ -122,7 +147,7 @@ static void pcap_mask_irq(unsigned int irq) | |||
| 122 | { | 147 | { |
| 123 | struct pcap_chip *pcap = get_irq_chip_data(irq); | 148 | struct pcap_chip *pcap = get_irq_chip_data(irq); |
| 124 | 149 | ||
| 125 | pcap->msr |= irq2pcap(pcap, irq); | 150 | pcap->msr |= 1 << irq_to_pcap(pcap, irq); |
| 126 | queue_work(pcap->workqueue, &pcap->msr_work); | 151 | queue_work(pcap->workqueue, &pcap->msr_work); |
| 127 | } | 152 | } |
| 128 | 153 | ||
| @@ -130,7 +155,7 @@ static void pcap_unmask_irq(unsigned int irq) | |||
| 130 | { | 155 | { |
| 131 | struct pcap_chip *pcap = get_irq_chip_data(irq); | 156 | struct pcap_chip *pcap = get_irq_chip_data(irq); |
| 132 | 157 | ||
| 133 | pcap->msr &= ~irq2pcap(pcap, irq); | 158 | pcap->msr &= ~(1 << irq_to_pcap(pcap, irq)); |
| 134 | queue_work(pcap->workqueue, &pcap->msr_work); | 159 | queue_work(pcap->workqueue, &pcap->msr_work); |
| 135 | } | 160 | } |
| 136 | 161 | ||
| @@ -154,34 +179,38 @@ static void pcap_isr_work(struct work_struct *work) | |||
| 154 | u32 msr, isr, int_sel, service; | 179 | u32 msr, isr, int_sel, service; |
| 155 | int irq; | 180 | int irq; |
| 156 | 181 | ||
| 157 | ezx_pcap_read(pcap, PCAP_REG_MSR, &msr); | 182 | do { |
| 158 | ezx_pcap_read(pcap, PCAP_REG_ISR, &isr); | 183 | ezx_pcap_read(pcap, PCAP_REG_MSR, &msr); |
| 184 | ezx_pcap_read(pcap, PCAP_REG_ISR, &isr); | ||
| 159 | 185 | ||
| 160 | /* We cant service/ack irqs that are assigned to port 2 */ | 186 | /* We cant service/ack irqs that are assigned to port 2 */ |
| 161 | if (!(pdata->config & PCAP_SECOND_PORT)) { | 187 | if (!(pdata->config & PCAP_SECOND_PORT)) { |
| 162 | ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel); | 188 | ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel); |
| 163 | isr &= ~int_sel; | 189 | isr &= ~int_sel; |
| 164 | } | 190 | } |
| 165 | ezx_pcap_write(pcap, PCAP_REG_ISR, isr); | ||
| 166 | 191 | ||
| 167 | local_irq_disable(); | 192 | ezx_pcap_write(pcap, PCAP_REG_MSR, isr | msr); |
| 168 | service = isr & ~msr; | 193 | ezx_pcap_write(pcap, PCAP_REG_ISR, isr); |
| 169 | 194 | ||
| 170 | for (irq = pcap->irq_base; service; service >>= 1, irq++) { | 195 | local_irq_disable(); |
| 171 | if (service & 1) { | 196 | service = isr & ~msr; |
| 172 | struct irq_desc *desc = irq_to_desc(irq); | 197 | for (irq = pcap->irq_base; service; service >>= 1, irq++) { |
| 198 | if (service & 1) { | ||
| 199 | struct irq_desc *desc = irq_to_desc(irq); | ||
| 173 | 200 | ||
| 174 | if (WARN(!desc, KERN_WARNING | 201 | if (WARN(!desc, KERN_WARNING |
| 175 | "Invalid PCAP IRQ %d\n", irq)) | 202 | "Invalid PCAP IRQ %d\n", irq)) |
| 176 | break; | 203 | break; |
| 177 | 204 | ||
| 178 | if (desc->status & IRQ_DISABLED) | 205 | if (desc->status & IRQ_DISABLED) |
| 179 | note_interrupt(irq, desc, IRQ_NONE); | 206 | note_interrupt(irq, desc, IRQ_NONE); |
| 180 | else | 207 | else |
| 181 | desc->handle_irq(irq, desc); | 208 | desc->handle_irq(irq, desc); |
| 209 | } | ||
| 182 | } | 210 | } |
| 183 | } | 211 | local_irq_enable(); |
| 184 | local_irq_enable(); | 212 | ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr); |
| 213 | } while (gpio_get_value(irq_to_gpio(pcap->spi->irq))); | ||
| 185 | } | 214 | } |
| 186 | 215 | ||
| 187 | static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) | 216 | static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) |
| @@ -194,6 +223,19 @@ static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 194 | } | 223 | } |
| 195 | 224 | ||
| 196 | /* ADC */ | 225 | /* ADC */ |
| 226 | void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits) | ||
| 227 | { | ||
| 228 | u32 tmp; | ||
| 229 | |||
| 230 | mutex_lock(&pcap->adc_mutex); | ||
| 231 | ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); | ||
| 232 | tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); | ||
| 233 | tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); | ||
| 234 | ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); | ||
| 235 | mutex_unlock(&pcap->adc_mutex); | ||
| 236 | } | ||
| 237 | EXPORT_SYMBOL_GPL(pcap_set_ts_bits); | ||
| 238 | |||
| 197 | static void pcap_disable_adc(struct pcap_chip *pcap) | 239 | static void pcap_disable_adc(struct pcap_chip *pcap) |
| 198 | { | 240 | { |
| 199 | u32 tmp; | 241 | u32 tmp; |
| @@ -216,15 +258,16 @@ static void pcap_adc_trigger(struct pcap_chip *pcap) | |||
| 216 | mutex_unlock(&pcap->adc_mutex); | 258 | mutex_unlock(&pcap->adc_mutex); |
| 217 | return; | 259 | return; |
| 218 | } | 260 | } |
| 219 | mutex_unlock(&pcap->adc_mutex); | 261 | /* start conversion on requested bank, save TS_M bits */ |
| 220 | 262 | ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); | |
| 221 | /* start conversion on requested bank */ | 263 | tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR); |
| 222 | tmp = pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; | 264 | tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; |
| 223 | 265 | ||
| 224 | if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) | 266 | if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) |
| 225 | tmp |= PCAP_ADC_AD_SEL1; | 267 | tmp |= PCAP_ADC_AD_SEL1; |
| 226 | 268 | ||
| 227 | ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); | 269 | ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); |
| 270 | mutex_unlock(&pcap->adc_mutex); | ||
| 228 | ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); | 271 | ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); |
| 229 | } | 272 | } |
| 230 | 273 | ||
| @@ -499,7 +542,7 @@ static void __exit ezx_pcap_exit(void) | |||
| 499 | spi_unregister_driver(&ezxpcap_driver); | 542 | spi_unregister_driver(&ezxpcap_driver); |
| 500 | } | 543 | } |
| 501 | 544 | ||
| 502 | module_init(ezx_pcap_init); | 545 | subsys_initcall(ezx_pcap_init); |
| 503 | module_exit(ezx_pcap_exit); | 546 | module_exit(ezx_pcap_exit); |
| 504 | 547 | ||
| 505 | MODULE_LICENSE("GPL"); | 548 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/mfd/mc13783-core.c b/drivers/mfd/mc13783-core.c new file mode 100644 index 000000000000..e354d2912ef1 --- /dev/null +++ b/drivers/mfd/mc13783-core.c | |||
| @@ -0,0 +1,427 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
| 3 | * | ||
| 4 | * This code is in parts based on wm8350-core.c and pcf50633-core.c | ||
| 5 | * | ||
| 6 | * Initial development of this code was funded by | ||
| 7 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License as published by | ||
| 11 | * the Free Software Foundation; either version 2 of the License, or | ||
| 12 | * (at your option) any later version. | ||
| 13 | * | ||
| 14 | * This program is distributed in the hope that it will be useful, | ||
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 17 | * GNU General Public License for more details. | ||
| 18 | * | ||
| 19 | * You should have received a copy of the GNU General Public License | ||
| 20 | * along with this program; if not, write to the Free Software | ||
| 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 22 | */ | ||
| 23 | |||
| 24 | #include <linux/mfd/mc13783-private.h> | ||
| 25 | #include <linux/platform_device.h> | ||
| 26 | #include <linux/mfd/mc13783.h> | ||
| 27 | #include <linux/completion.h> | ||
| 28 | #include <linux/interrupt.h> | ||
| 29 | #include <linux/mfd/core.h> | ||
| 30 | #include <linux/spi/spi.h> | ||
| 31 | #include <linux/uaccess.h> | ||
| 32 | #include <linux/kernel.h> | ||
| 33 | #include <linux/module.h> | ||
| 34 | #include <linux/init.h> | ||
| 35 | #include <linux/slab.h> | ||
| 36 | #include <linux/irq.h> | ||
| 37 | |||
| 38 | #define MC13783_MAX_REG_NUM 0x3f | ||
| 39 | #define MC13783_FRAME_MASK 0x00ffffff | ||
| 40 | #define MC13783_MAX_REG_NUM 0x3f | ||
| 41 | #define MC13783_REG_NUM_SHIFT 0x19 | ||
| 42 | #define MC13783_WRITE_BIT_SHIFT 31 | ||
| 43 | |||
| 44 | static inline int spi_rw(struct spi_device *spi, u8 * buf, size_t len) | ||
| 45 | { | ||
| 46 | struct spi_transfer t = { | ||
| 47 | .tx_buf = (const void *)buf, | ||
| 48 | .rx_buf = buf, | ||
| 49 | .len = len, | ||
| 50 | .cs_change = 0, | ||
| 51 | .delay_usecs = 0, | ||
| 52 | }; | ||
| 53 | struct spi_message m; | ||
| 54 | |||
| 55 | spi_message_init(&m); | ||
| 56 | spi_message_add_tail(&t, &m); | ||
| 57 | if (spi_sync(spi, &m) != 0 || m.status != 0) | ||
| 58 | return -EINVAL; | ||
| 59 | return len - m.actual_length; | ||
| 60 | } | ||
| 61 | |||
| 62 | static int mc13783_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val) | ||
| 63 | { | ||
| 64 | unsigned int frame = 0; | ||
| 65 | int ret = 0; | ||
| 66 | |||
| 67 | if (reg_num > MC13783_MAX_REG_NUM) | ||
| 68 | return -EINVAL; | ||
| 69 | |||
| 70 | frame |= reg_num << MC13783_REG_NUM_SHIFT; | ||
| 71 | |||
| 72 | ret = spi_rw(mc13783->spi_device, (u8 *)&frame, 4); | ||
| 73 | |||
| 74 | *reg_val = frame & MC13783_FRAME_MASK; | ||
| 75 | |||
| 76 | return ret; | ||
| 77 | } | ||
| 78 | |||
| 79 | static int mc13783_write(struct mc13783 *mc13783, int reg_num, u32 reg_val) | ||
| 80 | { | ||
| 81 | unsigned int frame = 0; | ||
| 82 | |||
| 83 | if (reg_num > MC13783_MAX_REG_NUM) | ||
| 84 | return -EINVAL; | ||
| 85 | |||
| 86 | frame |= (1 << MC13783_WRITE_BIT_SHIFT); | ||
| 87 | frame |= reg_num << MC13783_REG_NUM_SHIFT; | ||
| 88 | frame |= reg_val & MC13783_FRAME_MASK; | ||
| 89 | |||
| 90 | return spi_rw(mc13783->spi_device, (u8 *)&frame, 4); | ||
| 91 | } | ||
| 92 | |||
| 93 | int mc13783_reg_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val) | ||
| 94 | { | ||
| 95 | int ret; | ||
| 96 | |||
| 97 | mutex_lock(&mc13783->io_lock); | ||
| 98 | ret = mc13783_read(mc13783, reg_num, reg_val); | ||
| 99 | mutex_unlock(&mc13783->io_lock); | ||
| 100 | |||
| 101 | return ret; | ||
| 102 | } | ||
| 103 | EXPORT_SYMBOL_GPL(mc13783_reg_read); | ||
| 104 | |||
| 105 | int mc13783_reg_write(struct mc13783 *mc13783, int reg_num, u32 reg_val) | ||
| 106 | { | ||
| 107 | int ret; | ||
| 108 | |||
| 109 | mutex_lock(&mc13783->io_lock); | ||
| 110 | ret = mc13783_write(mc13783, reg_num, reg_val); | ||
| 111 | mutex_unlock(&mc13783->io_lock); | ||
| 112 | |||
| 113 | return ret; | ||
| 114 | } | ||
| 115 | EXPORT_SYMBOL_GPL(mc13783_reg_write); | ||
| 116 | |||
| 117 | /** | ||
| 118 | * mc13783_set_bits - Bitmask write | ||
| 119 | * | ||
| 120 | * @mc13783: Pointer to mc13783 control structure | ||
| 121 | * @reg: Register to access | ||
| 122 | * @mask: Mask of bits to change | ||
| 123 | * @val: Value to set for masked bits | ||
| 124 | */ | ||
| 125 | int mc13783_set_bits(struct mc13783 *mc13783, int reg, u32 mask, u32 val) | ||
| 126 | { | ||
| 127 | u32 tmp; | ||
| 128 | int ret; | ||
| 129 | |||
| 130 | mutex_lock(&mc13783->io_lock); | ||
| 131 | |||
| 132 | ret = mc13783_read(mc13783, reg, &tmp); | ||
| 133 | tmp = (tmp & ~mask) | val; | ||
| 134 | if (ret == 0) | ||
| 135 | ret = mc13783_write(mc13783, reg, tmp); | ||
| 136 | |||
| 137 | mutex_unlock(&mc13783->io_lock); | ||
| 138 | |||
| 139 | return ret; | ||
| 140 | } | ||
| 141 | EXPORT_SYMBOL_GPL(mc13783_set_bits); | ||
| 142 | |||
| 143 | int mc13783_register_irq(struct mc13783 *mc13783, int irq, | ||
| 144 | void (*handler) (int, void *), void *data) | ||
| 145 | { | ||
| 146 | if (irq < 0 || irq > MC13783_NUM_IRQ || !handler) | ||
| 147 | return -EINVAL; | ||
| 148 | |||
| 149 | if (WARN_ON(mc13783->irq_handler[irq].handler)) | ||
| 150 | return -EBUSY; | ||
| 151 | |||
| 152 | mutex_lock(&mc13783->io_lock); | ||
| 153 | mc13783->irq_handler[irq].handler = handler; | ||
| 154 | mc13783->irq_handler[irq].data = data; | ||
| 155 | mutex_unlock(&mc13783->io_lock); | ||
| 156 | |||
| 157 | return 0; | ||
| 158 | } | ||
| 159 | EXPORT_SYMBOL_GPL(mc13783_register_irq); | ||
| 160 | |||
| 161 | int mc13783_free_irq(struct mc13783 *mc13783, int irq) | ||
| 162 | { | ||
| 163 | if (irq < 0 || irq > MC13783_NUM_IRQ) | ||
| 164 | return -EINVAL; | ||
| 165 | |||
| 166 | mutex_lock(&mc13783->io_lock); | ||
| 167 | mc13783->irq_handler[irq].handler = NULL; | ||
| 168 | mutex_unlock(&mc13783->io_lock); | ||
| 169 | |||
| 170 | return 0; | ||
| 171 | } | ||
| 172 | EXPORT_SYMBOL_GPL(mc13783_free_irq); | ||
| 173 | |||
| 174 | static void mc13783_irq_work(struct work_struct *work) | ||
| 175 | { | ||
| 176 | struct mc13783 *mc13783 = container_of(work, struct mc13783, work); | ||
| 177 | int i; | ||
| 178 | unsigned int adc_sts; | ||
| 179 | |||
| 180 | /* check if the adc has finished any completion */ | ||
| 181 | mc13783_reg_read(mc13783, MC13783_REG_INTERRUPT_STATUS_0, &adc_sts); | ||
| 182 | mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0, | ||
| 183 | adc_sts & MC13783_INT_STAT_ADCDONEI); | ||
| 184 | |||
| 185 | if (adc_sts & MC13783_INT_STAT_ADCDONEI) | ||
| 186 | complete_all(&mc13783->adc_done); | ||
| 187 | |||
| 188 | for (i = 0; i < MC13783_NUM_IRQ; i++) | ||
| 189 | if (mc13783->irq_handler[i].handler) | ||
| 190 | mc13783->irq_handler[i].handler(i, | ||
| 191 | mc13783->irq_handler[i].data); | ||
| 192 | enable_irq(mc13783->irq); | ||
| 193 | } | ||
| 194 | |||
| 195 | static irqreturn_t mc13783_interrupt(int irq, void *dev_id) | ||
| 196 | { | ||
| 197 | struct mc13783 *mc13783 = dev_id; | ||
| 198 | |||
| 199 | disable_irq_nosync(irq); | ||
| 200 | |||
| 201 | schedule_work(&mc13783->work); | ||
| 202 | return IRQ_HANDLED; | ||
| 203 | } | ||
| 204 | |||
| 205 | /* set adc to ts interrupt mode, which generates touchscreen wakeup interrupt */ | ||
| 206 | static inline void mc13783_adc_set_ts_irq_mode(struct mc13783 *mc13783) | ||
| 207 | { | ||
| 208 | unsigned int reg_adc0, reg_adc1; | ||
| 209 | |||
| 210 | reg_adc0 = MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE | ||
| 211 | | MC13783_ADC0_TSMOD0; | ||
| 212 | reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN; | ||
| 213 | |||
| 214 | mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0); | ||
| 215 | mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1); | ||
| 216 | } | ||
| 217 | |||
| 218 | int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode, | ||
| 219 | unsigned int channel, unsigned int *sample) | ||
| 220 | { | ||
| 221 | unsigned int reg_adc0, reg_adc1; | ||
| 222 | int i; | ||
| 223 | |||
| 224 | mutex_lock(&mc13783->adc_conv_lock); | ||
| 225 | |||
| 226 | /* set up auto incrementing anyway to make quick read */ | ||
| 227 | reg_adc0 = MC13783_ADC0_ADINC1 | MC13783_ADC0_ADINC2; | ||
| 228 | /* enable the adc, ignore external triggering and set ASC to trigger | ||
| 229 | * conversion */ | ||
| 230 | reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN | ||
| 231 | | MC13783_ADC1_ASC; | ||
| 232 | |||
| 233 | /* setup channel number */ | ||
| 234 | if (channel > 7) | ||
| 235 | reg_adc1 |= MC13783_ADC1_ADSEL; | ||
| 236 | |||
| 237 | switch (mode) { | ||
| 238 | case MC13783_ADC_MODE_TS: | ||
| 239 | /* enables touch screen reference mode and set touchscreen mode | ||
| 240 | * to position mode */ | ||
| 241 | reg_adc0 |= MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE | ||
| 242 | | MC13783_ADC0_TSMOD0 | MC13783_ADC0_TSMOD1; | ||
| 243 | reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT; | ||
| 244 | break; | ||
| 245 | case MC13783_ADC_MODE_SINGLE_CHAN: | ||
| 246 | reg_adc1 |= (channel & 0x7) << MC13783_ADC1_CHAN0_SHIFT; | ||
| 247 | reg_adc1 |= MC13783_ADC1_RAND; | ||
| 248 | break; | ||
| 249 | case MC13783_ADC_MODE_MULT_CHAN: | ||
| 250 | reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT; | ||
| 251 | break; | ||
| 252 | default: | ||
| 253 | return -EINVAL; | ||
| 254 | } | ||
| 255 | |||
| 256 | mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0); | ||
| 257 | mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1); | ||
| 258 | |||
| 259 | wait_for_completion_interruptible(&mc13783->adc_done); | ||
| 260 | |||
| 261 | for (i = 0; i < 4; i++) | ||
| 262 | mc13783_reg_read(mc13783, MC13783_REG_ADC_2, &sample[i]); | ||
| 263 | |||
| 264 | if (mc13783->ts_active) | ||
| 265 | mc13783_adc_set_ts_irq_mode(mc13783); | ||
| 266 | |||
| 267 | mutex_unlock(&mc13783->adc_conv_lock); | ||
| 268 | |||
| 269 | return 0; | ||
| 270 | } | ||
| 271 | EXPORT_SYMBOL_GPL(mc13783_adc_do_conversion); | ||
| 272 | |||
| 273 | void mc13783_adc_set_ts_status(struct mc13783 *mc13783, unsigned int status) | ||
| 274 | { | ||
| 275 | mc13783->ts_active = status; | ||
| 276 | } | ||
| 277 | EXPORT_SYMBOL_GPL(mc13783_adc_set_ts_status); | ||
| 278 | |||
| 279 | static int mc13783_check_revision(struct mc13783 *mc13783) | ||
| 280 | { | ||
| 281 | u32 rev_id, rev1, rev2, finid, icid; | ||
| 282 | |||
| 283 | mc13783_read(mc13783, MC13783_REG_REVISION, &rev_id); | ||
| 284 | |||
| 285 | rev1 = (rev_id & 0x018) >> 3; | ||
| 286 | rev2 = (rev_id & 0x007); | ||
| 287 | icid = (rev_id & 0x01C0) >> 6; | ||
| 288 | finid = (rev_id & 0x01E00) >> 9; | ||
| 289 | |||
| 290 | /* Ver 0.2 is actually 3.2a. Report as 3.2 */ | ||
| 291 | if ((rev1 == 0) && (rev2 == 2)) | ||
| 292 | rev1 = 3; | ||
| 293 | |||
| 294 | if (rev1 == 0 || icid != 2) { | ||
| 295 | dev_err(mc13783->dev, "No MC13783 detected.\n"); | ||
| 296 | return -ENODEV; | ||
| 297 | } | ||
| 298 | |||
| 299 | mc13783->revision = ((rev1 * 10) + rev2); | ||
| 300 | dev_info(mc13783->dev, "MC13783 Rev %d.%d FinVer %x detected\n", rev1, | ||
| 301 | rev2, finid); | ||
| 302 | |||
| 303 | return 0; | ||
| 304 | } | ||
| 305 | |||
| 306 | /* | ||
| 307 | * Register a client device. This is non-fatal since there is no need to | ||
| 308 | * fail the entire device init due to a single platform device failing. | ||
| 309 | */ | ||
| 310 | static void mc13783_client_dev_register(struct mc13783 *mc13783, | ||
| 311 | const char *name) | ||
| 312 | { | ||
| 313 | struct mfd_cell cell = {}; | ||
| 314 | |||
| 315 | cell.name = name; | ||
| 316 | |||
| 317 | mfd_add_devices(mc13783->dev, -1, &cell, 1, NULL, 0); | ||
| 318 | } | ||
| 319 | |||
| 320 | static int __devinit mc13783_probe(struct spi_device *spi) | ||
| 321 | { | ||
| 322 | struct mc13783 *mc13783; | ||
| 323 | struct mc13783_platform_data *pdata = spi->dev.platform_data; | ||
| 324 | int ret; | ||
| 325 | |||
| 326 | mc13783 = kzalloc(sizeof(struct mc13783), GFP_KERNEL); | ||
| 327 | if (!mc13783) | ||
| 328 | return -ENOMEM; | ||
| 329 | |||
| 330 | dev_set_drvdata(&spi->dev, mc13783); | ||
| 331 | spi->mode = SPI_MODE_0 | SPI_CS_HIGH; | ||
| 332 | spi->bits_per_word = 32; | ||
| 333 | spi_setup(spi); | ||
| 334 | |||
| 335 | mc13783->spi_device = spi; | ||
| 336 | mc13783->dev = &spi->dev; | ||
| 337 | mc13783->irq = spi->irq; | ||
| 338 | |||
| 339 | INIT_WORK(&mc13783->work, mc13783_irq_work); | ||
| 340 | mutex_init(&mc13783->io_lock); | ||
| 341 | mutex_init(&mc13783->adc_conv_lock); | ||
| 342 | init_completion(&mc13783->adc_done); | ||
| 343 | |||
| 344 | if (pdata) { | ||
| 345 | mc13783->flags = pdata->flags; | ||
| 346 | mc13783->regulators = pdata->regulators; | ||
| 347 | mc13783->num_regulators = pdata->num_regulators; | ||
| 348 | } | ||
| 349 | |||
| 350 | if (mc13783_check_revision(mc13783)) { | ||
| 351 | ret = -ENODEV; | ||
| 352 | goto err_out; | ||
| 353 | } | ||
| 354 | |||
| 355 | /* clear and mask all interrupts */ | ||
| 356 | mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0, 0x00ffffff); | ||
| 357 | mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_0, 0x00ffffff); | ||
| 358 | mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_1, 0x00ffffff); | ||
| 359 | mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_1, 0x00ffffff); | ||
| 360 | |||
| 361 | /* unmask adcdone interrupts */ | ||
| 362 | mc13783_set_bits(mc13783, MC13783_REG_INTERRUPT_MASK_0, | ||
| 363 | MC13783_INT_MASK_ADCDONEM, 0); | ||
| 364 | |||
| 365 | ret = request_irq(mc13783->irq, mc13783_interrupt, | ||
| 366 | IRQF_DISABLED | IRQF_TRIGGER_HIGH, "mc13783", | ||
| 367 | mc13783); | ||
| 368 | if (ret) | ||
| 369 | goto err_out; | ||
| 370 | |||
| 371 | if (mc13783->flags & MC13783_USE_CODEC) | ||
| 372 | mc13783_client_dev_register(mc13783, "mc13783-codec"); | ||
| 373 | if (mc13783->flags & MC13783_USE_ADC) | ||
| 374 | mc13783_client_dev_register(mc13783, "mc13783-adc"); | ||
| 375 | if (mc13783->flags & MC13783_USE_RTC) | ||
| 376 | mc13783_client_dev_register(mc13783, "mc13783-rtc"); | ||
| 377 | if (mc13783->flags & MC13783_USE_REGULATOR) | ||
| 378 | mc13783_client_dev_register(mc13783, "mc13783-regulator"); | ||
| 379 | if (mc13783->flags & MC13783_USE_TOUCHSCREEN) | ||
| 380 | mc13783_client_dev_register(mc13783, "mc13783-ts"); | ||
| 381 | |||
| 382 | return 0; | ||
| 383 | |||
| 384 | err_out: | ||
| 385 | kfree(mc13783); | ||
| 386 | return ret; | ||
| 387 | } | ||
| 388 | |||
| 389 | static int __devexit mc13783_remove(struct spi_device *spi) | ||
| 390 | { | ||
| 391 | struct mc13783 *mc13783; | ||
| 392 | |||
| 393 | mc13783 = dev_get_drvdata(&spi->dev); | ||
| 394 | |||
| 395 | free_irq(mc13783->irq, mc13783); | ||
| 396 | |||
| 397 | mfd_remove_devices(&spi->dev); | ||
| 398 | |||
| 399 | return 0; | ||
| 400 | } | ||
| 401 | |||
| 402 | static struct spi_driver pmic_driver = { | ||
| 403 | .driver = { | ||
| 404 | .name = "mc13783", | ||
| 405 | .bus = &spi_bus_type, | ||
| 406 | .owner = THIS_MODULE, | ||
| 407 | }, | ||
| 408 | .probe = mc13783_probe, | ||
| 409 | .remove = __devexit_p(mc13783_remove), | ||
| 410 | }; | ||
| 411 | |||
| 412 | static int __init pmic_init(void) | ||
| 413 | { | ||
| 414 | return spi_register_driver(&pmic_driver); | ||
| 415 | } | ||
| 416 | subsys_initcall(pmic_init); | ||
| 417 | |||
| 418 | static void __exit pmic_exit(void) | ||
| 419 | { | ||
| 420 | spi_unregister_driver(&pmic_driver); | ||
| 421 | } | ||
| 422 | module_exit(pmic_exit); | ||
| 423 | |||
| 424 | MODULE_DESCRIPTION("Core/Protocol driver for Freescale MC13783 PMIC"); | ||
| 425 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); | ||
| 426 | MODULE_LICENSE("GPL"); | ||
| 427 | |||
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index 54ddf3772e0c..ae15e495e20e 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c | |||
| @@ -25,7 +25,7 @@ static int mfd_add_device(struct device *parent, int id, | |||
| 25 | int ret = -ENOMEM; | 25 | int ret = -ENOMEM; |
| 26 | int r; | 26 | int r; |
| 27 | 27 | ||
| 28 | pdev = platform_device_alloc(cell->name, id); | 28 | pdev = platform_device_alloc(cell->name, id + cell->id); |
| 29 | if (!pdev) | 29 | if (!pdev) |
| 30 | goto fail_alloc; | 30 | goto fail_alloc; |
| 31 | 31 | ||
diff --git a/drivers/mfd/pcf50633-adc.c b/drivers/mfd/pcf50633-adc.c index c2d05becfa97..3d31e97d6a45 100644 --- a/drivers/mfd/pcf50633-adc.c +++ b/drivers/mfd/pcf50633-adc.c | |||
| @@ -73,15 +73,10 @@ static void trigger_next_adc_job_if_any(struct pcf50633 *pcf) | |||
| 73 | struct pcf50633_adc *adc = __to_adc(pcf); | 73 | struct pcf50633_adc *adc = __to_adc(pcf); |
| 74 | int head; | 74 | int head; |
| 75 | 75 | ||
| 76 | mutex_lock(&adc->queue_mutex); | ||
| 77 | |||
| 78 | head = adc->queue_head; | 76 | head = adc->queue_head; |
| 79 | 77 | ||
| 80 | if (!adc->queue[head]) { | 78 | if (!adc->queue[head]) |
| 81 | mutex_unlock(&adc->queue_mutex); | ||
| 82 | return; | 79 | return; |
| 83 | } | ||
| 84 | mutex_unlock(&adc->queue_mutex); | ||
| 85 | 80 | ||
| 86 | adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg); | 81 | adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg); |
| 87 | } | 82 | } |
| @@ -99,16 +94,17 @@ adc_enqueue_request(struct pcf50633 *pcf, struct pcf50633_adc_request *req) | |||
| 99 | 94 | ||
| 100 | if (adc->queue[tail]) { | 95 | if (adc->queue[tail]) { |
| 101 | mutex_unlock(&adc->queue_mutex); | 96 | mutex_unlock(&adc->queue_mutex); |
| 97 | dev_err(pcf->dev, "ADC queue is full, dropping request\n"); | ||
| 102 | return -EBUSY; | 98 | return -EBUSY; |
| 103 | } | 99 | } |
| 104 | 100 | ||
| 105 | adc->queue[tail] = req; | 101 | adc->queue[tail] = req; |
| 102 | if (head == tail) | ||
| 103 | trigger_next_adc_job_if_any(pcf); | ||
| 106 | adc->queue_tail = (tail + 1) & (PCF50633_MAX_ADC_FIFO_DEPTH - 1); | 104 | adc->queue_tail = (tail + 1) & (PCF50633_MAX_ADC_FIFO_DEPTH - 1); |
| 107 | 105 | ||
| 108 | mutex_unlock(&adc->queue_mutex); | 106 | mutex_unlock(&adc->queue_mutex); |
| 109 | 107 | ||
| 110 | trigger_next_adc_job_if_any(pcf); | ||
| 111 | |||
| 112 | return 0; | 108 | return 0; |
| 113 | } | 109 | } |
| 114 | 110 | ||
| @@ -124,6 +120,7 @@ pcf50633_adc_sync_read_callback(struct pcf50633 *pcf, void *param, int result) | |||
| 124 | int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg) | 120 | int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg) |
| 125 | { | 121 | { |
| 126 | struct pcf50633_adc_request *req; | 122 | struct pcf50633_adc_request *req; |
| 123 | int err; | ||
| 127 | 124 | ||
| 128 | /* req is freed when the result is ready, in interrupt handler */ | 125 | /* req is freed when the result is ready, in interrupt handler */ |
| 129 | req = kzalloc(sizeof(*req), GFP_KERNEL); | 126 | req = kzalloc(sizeof(*req), GFP_KERNEL); |
| @@ -136,9 +133,13 @@ int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg) | |||
| 136 | req->callback_param = req; | 133 | req->callback_param = req; |
| 137 | 134 | ||
| 138 | init_completion(&req->completion); | 135 | init_completion(&req->completion); |
| 139 | adc_enqueue_request(pcf, req); | 136 | err = adc_enqueue_request(pcf, req); |
| 137 | if (err) | ||
| 138 | return err; | ||
| 139 | |||
| 140 | wait_for_completion(&req->completion); | 140 | wait_for_completion(&req->completion); |
| 141 | 141 | ||
| 142 | /* FIXME by this time req might be already freed */ | ||
| 142 | return req->result; | 143 | return req->result; |
| 143 | } | 144 | } |
| 144 | EXPORT_SYMBOL_GPL(pcf50633_adc_sync_read); | 145 | EXPORT_SYMBOL_GPL(pcf50633_adc_sync_read); |
| @@ -159,9 +160,7 @@ int pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg, | |||
| 159 | req->callback = callback; | 160 | req->callback = callback; |
| 160 | req->callback_param = callback_param; | 161 | req->callback_param = callback_param; |
| 161 | 162 | ||
| 162 | adc_enqueue_request(pcf, req); | 163 | return adc_enqueue_request(pcf, req); |
| 163 | |||
| 164 | return 0; | ||
| 165 | } | 164 | } |
| 166 | EXPORT_SYMBOL_GPL(pcf50633_adc_async_read); | 165 | EXPORT_SYMBOL_GPL(pcf50633_adc_async_read); |
| 167 | 166 | ||
| @@ -184,7 +183,7 @@ static void pcf50633_adc_irq(int irq, void *data) | |||
| 184 | struct pcf50633_adc *adc = data; | 183 | struct pcf50633_adc *adc = data; |
| 185 | struct pcf50633 *pcf = adc->pcf; | 184 | struct pcf50633 *pcf = adc->pcf; |
| 186 | struct pcf50633_adc_request *req; | 185 | struct pcf50633_adc_request *req; |
| 187 | int head; | 186 | int head, res; |
| 188 | 187 | ||
| 189 | mutex_lock(&adc->queue_mutex); | 188 | mutex_lock(&adc->queue_mutex); |
| 190 | head = adc->queue_head; | 189 | head = adc->queue_head; |
| @@ -199,12 +198,13 @@ static void pcf50633_adc_irq(int irq, void *data) | |||
| 199 | adc->queue_head = (head + 1) & | 198 | adc->queue_head = (head + 1) & |
| 200 | (PCF50633_MAX_ADC_FIFO_DEPTH - 1); | 199 | (PCF50633_MAX_ADC_FIFO_DEPTH - 1); |
| 201 | 200 | ||
| 201 | res = adc_result(pcf); | ||
| 202 | trigger_next_adc_job_if_any(pcf); | ||
| 203 | |||
| 202 | mutex_unlock(&adc->queue_mutex); | 204 | mutex_unlock(&adc->queue_mutex); |
| 203 | 205 | ||
| 204 | req->callback(pcf, req->callback_param, adc_result(pcf)); | 206 | req->callback(pcf, req->callback_param, res); |
| 205 | kfree(req); | 207 | kfree(req); |
| 206 | |||
| 207 | trigger_next_adc_job_if_any(pcf); | ||
| 208 | } | 208 | } |
| 209 | 209 | ||
| 210 | static int __devinit pcf50633_adc_probe(struct platform_device *pdev) | 210 | static int __devinit pcf50633_adc_probe(struct platform_device *pdev) |
diff --git a/drivers/mfd/pcf50633-core.c b/drivers/mfd/pcf50633-core.c index 8d3c38bf9714..d26d7747175e 100644 --- a/drivers/mfd/pcf50633-core.c +++ b/drivers/mfd/pcf50633-core.c | |||
| @@ -444,7 +444,7 @@ static irqreturn_t pcf50633_irq(int irq, void *data) | |||
| 444 | 444 | ||
| 445 | get_device(pcf->dev); | 445 | get_device(pcf->dev); |
| 446 | disable_irq_nosync(pcf->irq); | 446 | disable_irq_nosync(pcf->irq); |
| 447 | schedule_work(&pcf->irq_work); | 447 | queue_work(pcf->work_queue, &pcf->irq_work); |
| 448 | 448 | ||
| 449 | return IRQ_HANDLED; | 449 | return IRQ_HANDLED; |
| 450 | } | 450 | } |
| @@ -575,6 +575,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client, | |||
| 575 | pcf->dev = &client->dev; | 575 | pcf->dev = &client->dev; |
| 576 | pcf->i2c_client = client; | 576 | pcf->i2c_client = client; |
| 577 | pcf->irq = client->irq; | 577 | pcf->irq = client->irq; |
| 578 | pcf->work_queue = create_singlethread_workqueue("pcf50633"); | ||
| 578 | 579 | ||
| 579 | INIT_WORK(&pcf->irq_work, pcf50633_irq_worker); | 580 | INIT_WORK(&pcf->irq_work, pcf50633_irq_worker); |
| 580 | 581 | ||
| @@ -651,6 +652,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client, | |||
| 651 | return 0; | 652 | return 0; |
| 652 | 653 | ||
| 653 | err: | 654 | err: |
| 655 | destroy_workqueue(pcf->work_queue); | ||
| 654 | kfree(pcf); | 656 | kfree(pcf); |
| 655 | return ret; | 657 | return ret; |
| 656 | } | 658 | } |
| @@ -661,6 +663,7 @@ static int __devexit pcf50633_remove(struct i2c_client *client) | |||
| 661 | int i; | 663 | int i; |
| 662 | 664 | ||
| 663 | free_irq(pcf->irq, pcf); | 665 | free_irq(pcf->irq, pcf); |
| 666 | destroy_workqueue(pcf->work_queue); | ||
| 664 | 667 | ||
| 665 | platform_device_unregister(pcf->input_pdev); | 668 | platform_device_unregister(pcf->input_pdev); |
| 666 | platform_device_unregister(pcf->rtc_pdev); | 669 | platform_device_unregister(pcf->rtc_pdev); |
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c index ca54996ffd0e..e424cf6d8e9e 100644 --- a/drivers/mfd/twl4030-core.c +++ b/drivers/mfd/twl4030-core.c | |||
| @@ -89,6 +89,12 @@ | |||
| 89 | #define twl_has_madc() false | 89 | #define twl_has_madc() false |
| 90 | #endif | 90 | #endif |
| 91 | 91 | ||
| 92 | #ifdef CONFIG_TWL4030_POWER | ||
| 93 | #define twl_has_power() true | ||
| 94 | #else | ||
| 95 | #define twl_has_power() false | ||
| 96 | #endif | ||
| 97 | |||
| 92 | #if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE) | 98 | #if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE) |
| 93 | #define twl_has_rtc() true | 99 | #define twl_has_rtc() true |
| 94 | #else | 100 | #else |
| @@ -115,6 +121,12 @@ | |||
| 115 | 121 | ||
| 116 | #define TWL4030_NUM_SLAVES 4 | 122 | #define TWL4030_NUM_SLAVES 4 |
| 117 | 123 | ||
| 124 | #if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \ | ||
| 125 | || defined(CONFIG_INPUT_TWL4030_PWBUTTON_MODULE) | ||
| 126 | #define twl_has_pwrbutton() true | ||
| 127 | #else | ||
| 128 | #define twl_has_pwrbutton() false | ||
| 129 | #endif | ||
| 118 | 130 | ||
| 119 | /* Base Address defns for twl4030_map[] */ | 131 | /* Base Address defns for twl4030_map[] */ |
| 120 | 132 | ||
| @@ -538,6 +550,13 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features) | |||
| 538 | return PTR_ERR(child); | 550 | return PTR_ERR(child); |
| 539 | } | 551 | } |
| 540 | 552 | ||
| 553 | if (twl_has_pwrbutton()) { | ||
| 554 | child = add_child(1, "twl4030_pwrbutton", | ||
| 555 | NULL, 0, true, pdata->irq_base + 8 + 0, 0); | ||
| 556 | if (IS_ERR(child)) | ||
| 557 | return PTR_ERR(child); | ||
| 558 | } | ||
| 559 | |||
| 541 | if (twl_has_regulator()) { | 560 | if (twl_has_regulator()) { |
| 542 | /* | 561 | /* |
| 543 | child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1); | 562 | child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1); |
| @@ -788,6 +807,10 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) | |||
| 788 | /* setup clock framework */ | 807 | /* setup clock framework */ |
| 789 | clocks_init(&client->dev); | 808 | clocks_init(&client->dev); |
| 790 | 809 | ||
| 810 | /* load power event scripts */ | ||
| 811 | if (twl_has_power() && pdata->power) | ||
| 812 | twl4030_power_init(pdata->power); | ||
| 813 | |||
| 791 | /* Maybe init the T2 Interrupt subsystem */ | 814 | /* Maybe init the T2 Interrupt subsystem */ |
| 792 | if (client->irq | 815 | if (client->irq |
| 793 | && pdata->irq_base | 816 | && pdata->irq_base |
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c index 7d430835655f..fb194fe244c1 100644 --- a/drivers/mfd/twl4030-irq.c +++ b/drivers/mfd/twl4030-irq.c | |||
| @@ -424,7 +424,7 @@ static void twl4030_sih_do_edge(struct work_struct *work) | |||
| 424 | /* see what work we have */ | 424 | /* see what work we have */ |
| 425 | spin_lock_irq(&sih_agent_lock); | 425 | spin_lock_irq(&sih_agent_lock); |
| 426 | edge_change = agent->edge_change; | 426 | edge_change = agent->edge_change; |
| 427 | agent->edge_change = 0;; | 427 | agent->edge_change = 0; |
| 428 | sih = edge_change ? agent->sih : NULL; | 428 | sih = edge_change ? agent->sih : NULL; |
| 429 | spin_unlock_irq(&sih_agent_lock); | 429 | spin_unlock_irq(&sih_agent_lock); |
| 430 | if (!sih) | 430 | if (!sih) |
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c new file mode 100644 index 000000000000..d423e0c4176b --- /dev/null +++ b/drivers/mfd/twl4030-power.c | |||
| @@ -0,0 +1,472 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/i2c/chips/twl4030-power.c | ||
| 3 | * | ||
| 4 | * Handle TWL4030 Power initialization | ||
| 5 | * | ||
| 6 | * Copyright (C) 2008 Nokia Corporation | ||
| 7 | * Copyright (C) 2006 Texas Instruments, Inc | ||
| 8 | * | ||
| 9 | * Written by Kalle Jokiniemi | ||
| 10 | * Peter De Schrijver <peter.de-schrijver@nokia.com> | ||
| 11 | * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com> | ||
| 12 | * | ||
| 13 | * This file is subject to the terms and conditions of the GNU General | ||
| 14 | * Public License. See the file "COPYING" in the main directory of this | ||
| 15 | * archive for more details. | ||
| 16 | * | ||
| 17 | * This program is distributed in the hope that it will be useful, | ||
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 20 | * GNU General Public License for more details. | ||
| 21 | * | ||
| 22 | * You should have received a copy of the GNU General Public License | ||
| 23 | * along with this program; if not, write to the Free Software | ||
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 25 | */ | ||
| 26 | |||
| 27 | #include <linux/module.h> | ||
| 28 | #include <linux/pm.h> | ||
| 29 | #include <linux/i2c/twl4030.h> | ||
| 30 | #include <linux/platform_device.h> | ||
| 31 | |||
| 32 | #include <asm/mach-types.h> | ||
| 33 | |||
| 34 | static u8 twl4030_start_script_address = 0x2b; | ||
| 35 | |||
| 36 | #define PWR_P1_SW_EVENTS 0x10 | ||
| 37 | #define PWR_DEVOFF (1<<0) | ||
| 38 | |||
| 39 | #define PHY_TO_OFF_PM_MASTER(p) (p - 0x36) | ||
| 40 | #define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b) | ||
| 41 | |||
| 42 | /* resource - hfclk */ | ||
| 43 | #define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6) | ||
| 44 | |||
| 45 | /* PM events */ | ||
| 46 | #define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46) | ||
| 47 | #define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47) | ||
| 48 | #define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48) | ||
| 49 | #define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36) | ||
| 50 | #define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37) | ||
| 51 | #define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38) | ||
| 52 | |||
| 53 | #define LVL_WAKEUP 0x08 | ||
| 54 | |||
| 55 | #define ENABLE_WARMRESET (1<<4) | ||
| 56 | |||
| 57 | #define END_OF_SCRIPT 0x3f | ||
| 58 | |||
| 59 | #define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55) | ||
| 60 | #define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56) | ||
| 61 | #define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57) | ||
| 62 | #define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58) | ||
| 63 | #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) | ||
| 64 | #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) | ||
| 65 | |||
| 66 | #define R_PROTECT_KEY 0x0E | ||
| 67 | #define R_KEY_1 0xC0 | ||
| 68 | #define R_KEY_2 0x0C | ||
| 69 | |||
| 70 | /* resource configuration registers */ | ||
| 71 | |||
| 72 | #define DEVGROUP_OFFSET 0 | ||
| 73 | #define TYPE_OFFSET 1 | ||
| 74 | |||
| 75 | /* Bit positions */ | ||
| 76 | #define DEVGROUP_SHIFT 5 | ||
| 77 | #define DEVGROUP_MASK (7 << DEVGROUP_SHIFT) | ||
| 78 | #define TYPE_SHIFT 0 | ||
| 79 | #define TYPE_MASK (7 << TYPE_SHIFT) | ||
| 80 | #define TYPE2_SHIFT 3 | ||
| 81 | #define TYPE2_MASK (3 << TYPE2_SHIFT) | ||
| 82 | |||
| 83 | static u8 res_config_addrs[] = { | ||
| 84 | [RES_VAUX1] = 0x17, | ||
| 85 | [RES_VAUX2] = 0x1b, | ||
| 86 | [RES_VAUX3] = 0x1f, | ||
| 87 | [RES_VAUX4] = 0x23, | ||
| 88 | [RES_VMMC1] = 0x27, | ||
| 89 | [RES_VMMC2] = 0x2b, | ||
| 90 | [RES_VPLL1] = 0x2f, | ||
| 91 | [RES_VPLL2] = 0x33, | ||
| 92 | [RES_VSIM] = 0x37, | ||
| 93 | [RES_VDAC] = 0x3b, | ||
| 94 | [RES_VINTANA1] = 0x3f, | ||
| 95 | [RES_VINTANA2] = 0x43, | ||
| 96 | [RES_VINTDIG] = 0x47, | ||
| 97 | [RES_VIO] = 0x4b, | ||
| 98 | [RES_VDD1] = 0x55, | ||
| 99 | [RES_VDD2] = 0x63, | ||
| 100 | [RES_VUSB_1V5] = 0x71, | ||
| 101 | [RES_VUSB_1V8] = 0x74, | ||
| 102 | [RES_VUSB_3V1] = 0x77, | ||
| 103 | [RES_VUSBCP] = 0x7a, | ||
| 104 | [RES_REGEN] = 0x7f, | ||
| 105 | [RES_NRES_PWRON] = 0x82, | ||
| 106 | [RES_CLKEN] = 0x85, | ||
| 107 | [RES_SYSEN] = 0x88, | ||
| 108 | [RES_HFCLKOUT] = 0x8b, | ||
| 109 | [RES_32KCLKOUT] = 0x8e, | ||
| 110 | [RES_RESET] = 0x91, | ||
| 111 | [RES_Main_Ref] = 0x94, | ||
| 112 | }; | ||
| 113 | |||
| 114 | static int __init twl4030_write_script_byte(u8 address, u8 byte) | ||
| 115 | { | ||
| 116 | int err; | ||
| 117 | |||
| 118 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address, | ||
| 119 | R_MEMORY_ADDRESS); | ||
| 120 | if (err) | ||
| 121 | goto out; | ||
| 122 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, byte, | ||
| 123 | R_MEMORY_DATA); | ||
| 124 | out: | ||
| 125 | return err; | ||
| 126 | } | ||
| 127 | |||
| 128 | static int __init twl4030_write_script_ins(u8 address, u16 pmb_message, | ||
| 129 | u8 delay, u8 next) | ||
| 130 | { | ||
| 131 | int err; | ||
| 132 | |||
| 133 | address *= 4; | ||
| 134 | err = twl4030_write_script_byte(address++, pmb_message >> 8); | ||
| 135 | if (err) | ||
| 136 | goto out; | ||
| 137 | err = twl4030_write_script_byte(address++, pmb_message & 0xff); | ||
| 138 | if (err) | ||
| 139 | goto out; | ||
| 140 | err = twl4030_write_script_byte(address++, delay); | ||
| 141 | if (err) | ||
| 142 | goto out; | ||
| 143 | err = twl4030_write_script_byte(address++, next); | ||
| 144 | out: | ||
| 145 | return err; | ||
| 146 | } | ||
| 147 | |||
| 148 | static int __init twl4030_write_script(u8 address, struct twl4030_ins *script, | ||
| 149 | int len) | ||
| 150 | { | ||
| 151 | int err; | ||
| 152 | |||
| 153 | for (; len; len--, address++, script++) { | ||
| 154 | if (len == 1) { | ||
| 155 | err = twl4030_write_script_ins(address, | ||
| 156 | script->pmb_message, | ||
| 157 | script->delay, | ||
| 158 | END_OF_SCRIPT); | ||
| 159 | if (err) | ||
| 160 | break; | ||
| 161 | } else { | ||
| 162 | err = twl4030_write_script_ins(address, | ||
| 163 | script->pmb_message, | ||
| 164 | script->delay, | ||
| 165 | address + 1); | ||
| 166 | if (err) | ||
| 167 | break; | ||
| 168 | } | ||
| 169 | } | ||
| 170 | return err; | ||
| 171 | } | ||
| 172 | |||
| 173 | static int __init twl4030_config_wakeup3_sequence(u8 address) | ||
| 174 | { | ||
| 175 | int err; | ||
| 176 | u8 data; | ||
| 177 | |||
| 178 | /* Set SLEEP to ACTIVE SEQ address for P3 */ | ||
| 179 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address, | ||
| 180 | R_SEQ_ADD_S2A3); | ||
| 181 | if (err) | ||
| 182 | goto out; | ||
| 183 | |||
| 184 | /* P3 LVL_WAKEUP should be on LEVEL */ | ||
| 185 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data, | ||
| 186 | R_P3_SW_EVENTS); | ||
| 187 | if (err) | ||
| 188 | goto out; | ||
| 189 | data |= LVL_WAKEUP; | ||
| 190 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data, | ||
| 191 | R_P3_SW_EVENTS); | ||
| 192 | out: | ||
| 193 | if (err) | ||
| 194 | pr_err("TWL4030 wakeup sequence for P3 config error\n"); | ||
| 195 | return err; | ||
| 196 | } | ||
| 197 | |||
| 198 | static int __init twl4030_config_wakeup12_sequence(u8 address) | ||
| 199 | { | ||
| 200 | int err = 0; | ||
| 201 | u8 data; | ||
| 202 | |||
| 203 | /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */ | ||
| 204 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address, | ||
| 205 | R_SEQ_ADD_S2A12); | ||
| 206 | if (err) | ||
| 207 | goto out; | ||
| 208 | |||
| 209 | /* P1/P2 LVL_WAKEUP should be on LEVEL */ | ||
| 210 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data, | ||
| 211 | R_P1_SW_EVENTS); | ||
| 212 | if (err) | ||
| 213 | goto out; | ||
| 214 | |||
| 215 | data |= LVL_WAKEUP; | ||
| 216 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data, | ||
| 217 | R_P1_SW_EVENTS); | ||
| 218 | if (err) | ||
| 219 | goto out; | ||
| 220 | |||
| 221 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data, | ||
| 222 | R_P2_SW_EVENTS); | ||
| 223 | if (err) | ||
| 224 | goto out; | ||
| 225 | |||
| 226 | data |= LVL_WAKEUP; | ||
| 227 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data, | ||
| 228 | R_P2_SW_EVENTS); | ||
| 229 | if (err) | ||
| 230 | goto out; | ||
| 231 | |||
| 232 | if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) { | ||
| 233 | /* Disabling AC charger effect on sleep-active transitions */ | ||
| 234 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data, | ||
| 235 | R_CFG_P1_TRANSITION); | ||
| 236 | if (err) | ||
| 237 | goto out; | ||
| 238 | data &= ~(1<<1); | ||
| 239 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data , | ||
| 240 | R_CFG_P1_TRANSITION); | ||
| 241 | if (err) | ||
| 242 | goto out; | ||
| 243 | } | ||
| 244 | |||
| 245 | out: | ||
| 246 | if (err) | ||
| 247 | pr_err("TWL4030 wakeup sequence for P1 and P2" \ | ||
| 248 | "config error\n"); | ||
| 249 | return err; | ||
| 250 | } | ||
| 251 | |||
| 252 | static int __init twl4030_config_sleep_sequence(u8 address) | ||
| 253 | { | ||
| 254 | int err; | ||
| 255 | |||
| 256 | /* Set ACTIVE to SLEEP SEQ address in T2 memory*/ | ||
| 257 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address, | ||
| 258 | R_SEQ_ADD_A2S); | ||
| 259 | |||
| 260 | if (err) | ||
| 261 | pr_err("TWL4030 sleep sequence config error\n"); | ||
| 262 | |||
| 263 | return err; | ||
| 264 | } | ||
| 265 | |||
| 266 | static int __init twl4030_config_warmreset_sequence(u8 address) | ||
| 267 | { | ||
| 268 | int err; | ||
| 269 | u8 rd_data; | ||
| 270 | |||
| 271 | /* Set WARM RESET SEQ address for P1 */ | ||
| 272 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address, | ||
| 273 | R_SEQ_ADD_WARM); | ||
| 274 | if (err) | ||
| 275 | goto out; | ||
| 276 | |||
| 277 | /* P1/P2/P3 enable WARMRESET */ | ||
| 278 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data, | ||
| 279 | R_P1_SW_EVENTS); | ||
| 280 | if (err) | ||
| 281 | goto out; | ||
| 282 | |||
| 283 | rd_data |= ENABLE_WARMRESET; | ||
| 284 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data, | ||
| 285 | R_P1_SW_EVENTS); | ||
| 286 | if (err) | ||
| 287 | goto out; | ||
| 288 | |||
| 289 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data, | ||
| 290 | R_P2_SW_EVENTS); | ||
| 291 | if (err) | ||
| 292 | goto out; | ||
| 293 | |||
| 294 | rd_data |= ENABLE_WARMRESET; | ||
| 295 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data, | ||
| 296 | R_P2_SW_EVENTS); | ||
| 297 | if (err) | ||
| 298 | goto out; | ||
| 299 | |||
| 300 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data, | ||
| 301 | R_P3_SW_EVENTS); | ||
| 302 | if (err) | ||
| 303 | goto out; | ||
| 304 | |||
| 305 | rd_data |= ENABLE_WARMRESET; | ||
| 306 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data, | ||
| 307 | R_P3_SW_EVENTS); | ||
| 308 | out: | ||
| 309 | if (err) | ||
| 310 | pr_err("TWL4030 warmreset seq config error\n"); | ||
| 311 | return err; | ||
| 312 | } | ||
| 313 | |||
| 314 | static int __init twl4030_configure_resource(struct twl4030_resconfig *rconfig) | ||
| 315 | { | ||
| 316 | int rconfig_addr; | ||
| 317 | int err; | ||
| 318 | u8 type; | ||
| 319 | u8 grp; | ||
| 320 | |||
| 321 | if (rconfig->resource > TOTAL_RESOURCES) { | ||
| 322 | pr_err("TWL4030 Resource %d does not exist\n", | ||
| 323 | rconfig->resource); | ||
| 324 | return -EINVAL; | ||
| 325 | } | ||
| 326 | |||
| 327 | rconfig_addr = res_config_addrs[rconfig->resource]; | ||
| 328 | |||
| 329 | /* Set resource group */ | ||
| 330 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &grp, | ||
| 331 | rconfig_addr + DEVGROUP_OFFSET); | ||
| 332 | if (err) { | ||
| 333 | pr_err("TWL4030 Resource %d group could not be read\n", | ||
| 334 | rconfig->resource); | ||
| 335 | return err; | ||
| 336 | } | ||
| 337 | |||
| 338 | if (rconfig->devgroup >= 0) { | ||
| 339 | grp &= ~DEVGROUP_MASK; | ||
| 340 | grp |= rconfig->devgroup << DEVGROUP_SHIFT; | ||
| 341 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, | ||
| 342 | grp, rconfig_addr + DEVGROUP_OFFSET); | ||
| 343 | if (err < 0) { | ||
| 344 | pr_err("TWL4030 failed to program devgroup\n"); | ||
| 345 | return err; | ||
| 346 | } | ||
| 347 | } | ||
| 348 | |||
| 349 | /* Set resource types */ | ||
| 350 | err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &type, | ||
| 351 | rconfig_addr + TYPE_OFFSET); | ||
| 352 | if (err < 0) { | ||
| 353 | pr_err("TWL4030 Resource %d type could not be read\n", | ||
| 354 | rconfig->resource); | ||
| 355 | return err; | ||
| 356 | } | ||
| 357 | |||
| 358 | if (rconfig->type >= 0) { | ||
| 359 | type &= ~TYPE_MASK; | ||
| 360 | type |= rconfig->type << TYPE_SHIFT; | ||
| 361 | } | ||
| 362 | |||
| 363 | if (rconfig->type2 >= 0) { | ||
| 364 | type &= ~TYPE2_MASK; | ||
| 365 | type |= rconfig->type2 << TYPE2_SHIFT; | ||
| 366 | } | ||
| 367 | |||
| 368 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, | ||
| 369 | type, rconfig_addr + TYPE_OFFSET); | ||
| 370 | if (err < 0) { | ||
| 371 | pr_err("TWL4030 failed to program resource type\n"); | ||
| 372 | return err; | ||
| 373 | } | ||
| 374 | |||
| 375 | return 0; | ||
| 376 | } | ||
| 377 | |||
| 378 | static int __init load_twl4030_script(struct twl4030_script *tscript, | ||
| 379 | u8 address) | ||
| 380 | { | ||
| 381 | int err; | ||
| 382 | static int order; | ||
| 383 | |||
| 384 | /* Make sure the script isn't going beyond last valid address (0x3f) */ | ||
| 385 | if ((address + tscript->size) > END_OF_SCRIPT) { | ||
| 386 | pr_err("TWL4030 scripts too big error\n"); | ||
| 387 | return -EINVAL; | ||
| 388 | } | ||
| 389 | |||
| 390 | err = twl4030_write_script(address, tscript->script, tscript->size); | ||
| 391 | if (err) | ||
| 392 | goto out; | ||
| 393 | |||
| 394 | if (tscript->flags & TWL4030_WRST_SCRIPT) { | ||
| 395 | err = twl4030_config_warmreset_sequence(address); | ||
| 396 | if (err) | ||
| 397 | goto out; | ||
| 398 | } | ||
| 399 | if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) { | ||
| 400 | err = twl4030_config_wakeup12_sequence(address); | ||
| 401 | if (err) | ||
| 402 | goto out; | ||
| 403 | order = 1; | ||
| 404 | } | ||
| 405 | if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) { | ||
| 406 | err = twl4030_config_wakeup3_sequence(address); | ||
| 407 | if (err) | ||
| 408 | goto out; | ||
| 409 | } | ||
| 410 | if (tscript->flags & TWL4030_SLEEP_SCRIPT) | ||
| 411 | if (order) | ||
| 412 | pr_warning("TWL4030: Bad order of scripts (sleep "\ | ||
| 413 | "script before wakeup) Leads to boot"\ | ||
| 414 | "failure on some boards\n"); | ||
| 415 | err = twl4030_config_sleep_sequence(address); | ||
| 416 | out: | ||
| 417 | return err; | ||
| 418 | } | ||
| 419 | |||
| 420 | void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts) | ||
| 421 | { | ||
| 422 | int err = 0; | ||
| 423 | int i; | ||
| 424 | struct twl4030_resconfig *resconfig; | ||
| 425 | u8 address = twl4030_start_script_address; | ||
| 426 | |||
| 427 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, R_KEY_1, | ||
| 428 | R_PROTECT_KEY); | ||
| 429 | if (err) | ||
| 430 | goto unlock; | ||
| 431 | |||
| 432 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, R_KEY_2, | ||
| 433 | R_PROTECT_KEY); | ||
| 434 | if (err) | ||
| 435 | goto unlock; | ||
| 436 | |||
| 437 | for (i = 0; i < twl4030_scripts->num; i++) { | ||
| 438 | err = load_twl4030_script(twl4030_scripts->scripts[i], address); | ||
| 439 | if (err) | ||
| 440 | goto load; | ||
| 441 | address += twl4030_scripts->scripts[i]->size; | ||
| 442 | } | ||
| 443 | |||
| 444 | resconfig = twl4030_scripts->resource_config; | ||
| 445 | if (resconfig) { | ||
| 446 | while (resconfig->resource) { | ||
| 447 | err = twl4030_configure_resource(resconfig); | ||
| 448 | if (err) | ||
| 449 | goto resource; | ||
| 450 | resconfig++; | ||
| 451 | |||
| 452 | } | ||
| 453 | } | ||
| 454 | |||
| 455 | err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, R_PROTECT_KEY); | ||
| 456 | if (err) | ||
| 457 | pr_err("TWL4030 Unable to relock registers\n"); | ||
| 458 | return; | ||
| 459 | |||
| 460 | unlock: | ||
| 461 | if (err) | ||
| 462 | pr_err("TWL4030 Unable to unlock registers\n"); | ||
| 463 | return; | ||
| 464 | load: | ||
| 465 | if (err) | ||
| 466 | pr_err("TWL4030 failed to load scripts\n"); | ||
| 467 | return; | ||
| 468 | resource: | ||
| 469 | if (err) | ||
| 470 | pr_err("TWL4030 failed to configure resource\n"); | ||
| 471 | return; | ||
| 472 | } | ||
diff --git a/drivers/mfd/wm831x-core.c b/drivers/mfd/wm831x-core.c new file mode 100644 index 000000000000..49b7885c2702 --- /dev/null +++ b/drivers/mfd/wm831x-core.c | |||
| @@ -0,0 +1,1549 @@ | |||
| 1 | /* | ||
| 2 | * wm831x-core.c -- Device access for Wolfson WM831x PMICs | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/i2c.h> | ||
| 18 | #include <linux/bcd.h> | ||
| 19 | #include <linux/delay.h> | ||
| 20 | #include <linux/mfd/core.h> | ||
| 21 | |||
| 22 | #include <linux/mfd/wm831x/core.h> | ||
| 23 | #include <linux/mfd/wm831x/pdata.h> | ||
| 24 | #include <linux/mfd/wm831x/irq.h> | ||
| 25 | #include <linux/mfd/wm831x/auxadc.h> | ||
| 26 | #include <linux/mfd/wm831x/otp.h> | ||
| 27 | #include <linux/mfd/wm831x/regulator.h> | ||
| 28 | |||
| 29 | /* Current settings - values are 2*2^(reg_val/4) microamps. These are | ||
| 30 | * exported since they are used by multiple drivers. | ||
| 31 | */ | ||
| 32 | int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL] = { | ||
| 33 | 2, | ||
| 34 | 2, | ||
| 35 | 3, | ||
| 36 | 3, | ||
| 37 | 4, | ||
| 38 | 5, | ||
| 39 | 6, | ||
| 40 | 7, | ||
| 41 | 8, | ||
| 42 | 10, | ||
| 43 | 11, | ||
| 44 | 13, | ||
| 45 | 16, | ||
| 46 | 19, | ||
| 47 | 23, | ||
| 48 | 27, | ||
| 49 | 32, | ||
| 50 | 38, | ||
| 51 | 45, | ||
| 52 | 54, | ||
| 53 | 64, | ||
| 54 | 76, | ||
| 55 | 91, | ||
| 56 | 108, | ||
| 57 | 128, | ||
| 58 | 152, | ||
| 59 | 181, | ||
| 60 | 215, | ||
| 61 | 256, | ||
| 62 | 304, | ||
| 63 | 362, | ||
| 64 | 431, | ||
| 65 | 512, | ||
| 66 | 609, | ||
| 67 | 724, | ||
| 68 | 861, | ||
| 69 | 1024, | ||
| 70 | 1218, | ||
| 71 | 1448, | ||
| 72 | 1722, | ||
| 73 | 2048, | ||
| 74 | 2435, | ||
| 75 | 2896, | ||
| 76 | 3444, | ||
| 77 | 4096, | ||
| 78 | 4871, | ||
| 79 | 5793, | ||
| 80 | 6889, | ||
| 81 | 8192, | ||
| 82 | 9742, | ||
| 83 | 11585, | ||
| 84 | 13777, | ||
| 85 | 16384, | ||
| 86 | 19484, | ||
| 87 | 23170, | ||
| 88 | 27554, | ||
| 89 | }; | ||
| 90 | EXPORT_SYMBOL_GPL(wm831x_isinkv_values); | ||
| 91 | |||
| 92 | enum wm831x_parent { | ||
| 93 | WM8310 = 0, | ||
| 94 | WM8311 = 1, | ||
| 95 | WM8312 = 2, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg) | ||
| 99 | { | ||
| 100 | if (!wm831x->locked) | ||
| 101 | return 0; | ||
| 102 | |||
| 103 | switch (reg) { | ||
| 104 | case WM831X_WATCHDOG: | ||
| 105 | case WM831X_DC4_CONTROL: | ||
| 106 | case WM831X_ON_PIN_CONTROL: | ||
| 107 | case WM831X_BACKUP_CHARGER_CONTROL: | ||
| 108 | case WM831X_CHARGER_CONTROL_1: | ||
| 109 | case WM831X_CHARGER_CONTROL_2: | ||
| 110 | return 1; | ||
| 111 | |||
| 112 | default: | ||
| 113 | return 0; | ||
| 114 | } | ||
| 115 | } | ||
| 116 | |||
| 117 | /** | ||
| 118 | * wm831x_reg_unlock: Unlock user keyed registers | ||
| 119 | * | ||
| 120 | * The WM831x has a user key preventing writes to particularly | ||
| 121 | * critical registers. This function locks those registers, | ||
| 122 | * allowing writes to them. | ||
| 123 | */ | ||
| 124 | void wm831x_reg_lock(struct wm831x *wm831x) | ||
| 125 | { | ||
| 126 | int ret; | ||
| 127 | |||
| 128 | ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0); | ||
| 129 | if (ret == 0) { | ||
| 130 | dev_vdbg(wm831x->dev, "Registers locked\n"); | ||
| 131 | |||
| 132 | mutex_lock(&wm831x->io_lock); | ||
| 133 | WARN_ON(wm831x->locked); | ||
| 134 | wm831x->locked = 1; | ||
| 135 | mutex_unlock(&wm831x->io_lock); | ||
| 136 | } else { | ||
| 137 | dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret); | ||
| 138 | } | ||
| 139 | |||
| 140 | } | ||
| 141 | EXPORT_SYMBOL_GPL(wm831x_reg_lock); | ||
| 142 | |||
| 143 | /** | ||
| 144 | * wm831x_reg_unlock: Unlock user keyed registers | ||
| 145 | * | ||
| 146 | * The WM831x has a user key preventing writes to particularly | ||
| 147 | * critical registers. This function locks those registers, | ||
| 148 | * preventing spurious writes. | ||
| 149 | */ | ||
| 150 | int wm831x_reg_unlock(struct wm831x *wm831x) | ||
| 151 | { | ||
| 152 | int ret; | ||
| 153 | |||
| 154 | /* 0x9716 is the value required to unlock the registers */ | ||
| 155 | ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716); | ||
| 156 | if (ret == 0) { | ||
| 157 | dev_vdbg(wm831x->dev, "Registers unlocked\n"); | ||
| 158 | |||
| 159 | mutex_lock(&wm831x->io_lock); | ||
| 160 | WARN_ON(!wm831x->locked); | ||
| 161 | wm831x->locked = 0; | ||
| 162 | mutex_unlock(&wm831x->io_lock); | ||
| 163 | } | ||
| 164 | |||
| 165 | return ret; | ||
| 166 | } | ||
| 167 | EXPORT_SYMBOL_GPL(wm831x_reg_unlock); | ||
| 168 | |||
| 169 | static int wm831x_read(struct wm831x *wm831x, unsigned short reg, | ||
| 170 | int bytes, void *dest) | ||
| 171 | { | ||
| 172 | int ret, i; | ||
| 173 | u16 *buf = dest; | ||
| 174 | |||
| 175 | BUG_ON(bytes % 2); | ||
| 176 | BUG_ON(bytes <= 0); | ||
| 177 | |||
| 178 | ret = wm831x->read_dev(wm831x, reg, bytes, dest); | ||
| 179 | if (ret < 0) | ||
| 180 | return ret; | ||
| 181 | |||
| 182 | for (i = 0; i < bytes / 2; i++) { | ||
| 183 | buf[i] = be16_to_cpu(buf[i]); | ||
| 184 | |||
| 185 | dev_vdbg(wm831x->dev, "Read %04x from R%d(0x%x)\n", | ||
| 186 | buf[i], reg + i, reg + i); | ||
| 187 | } | ||
| 188 | |||
| 189 | return 0; | ||
| 190 | } | ||
| 191 | |||
| 192 | /** | ||
| 193 | * wm831x_reg_read: Read a single WM831x register. | ||
| 194 | * | ||
| 195 | * @wm831x: Device to read from. | ||
| 196 | * @reg: Register to read. | ||
| 197 | */ | ||
| 198 | int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg) | ||
| 199 | { | ||
| 200 | unsigned short val; | ||
| 201 | int ret; | ||
| 202 | |||
| 203 | mutex_lock(&wm831x->io_lock); | ||
| 204 | |||
| 205 | ret = wm831x_read(wm831x, reg, 2, &val); | ||
| 206 | |||
| 207 | mutex_unlock(&wm831x->io_lock); | ||
| 208 | |||
| 209 | if (ret < 0) | ||
| 210 | return ret; | ||
| 211 | else | ||
| 212 | return val; | ||
| 213 | } | ||
| 214 | EXPORT_SYMBOL_GPL(wm831x_reg_read); | ||
| 215 | |||
| 216 | /** | ||
| 217 | * wm831x_bulk_read: Read multiple WM831x registers | ||
| 218 | * | ||
| 219 | * @wm831x: Device to read from | ||
| 220 | * @reg: First register | ||
| 221 | * @count: Number of registers | ||
| 222 | * @buf: Buffer to fill. | ||
| 223 | */ | ||
| 224 | int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg, | ||
| 225 | int count, u16 *buf) | ||
| 226 | { | ||
| 227 | int ret; | ||
| 228 | |||
| 229 | mutex_lock(&wm831x->io_lock); | ||
| 230 | |||
| 231 | ret = wm831x_read(wm831x, reg, count * 2, buf); | ||
| 232 | |||
| 233 | mutex_unlock(&wm831x->io_lock); | ||
| 234 | |||
| 235 | return ret; | ||
| 236 | } | ||
| 237 | EXPORT_SYMBOL_GPL(wm831x_bulk_read); | ||
| 238 | |||
| 239 | static int wm831x_write(struct wm831x *wm831x, unsigned short reg, | ||
| 240 | int bytes, void *src) | ||
| 241 | { | ||
| 242 | u16 *buf = src; | ||
| 243 | int i; | ||
| 244 | |||
| 245 | BUG_ON(bytes % 2); | ||
| 246 | BUG_ON(bytes <= 0); | ||
| 247 | |||
| 248 | for (i = 0; i < bytes / 2; i++) { | ||
| 249 | if (wm831x_reg_locked(wm831x, reg)) | ||
| 250 | return -EPERM; | ||
| 251 | |||
| 252 | dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n", | ||
| 253 | buf[i], reg + i, reg + i); | ||
| 254 | |||
| 255 | buf[i] = cpu_to_be16(buf[i]); | ||
| 256 | } | ||
| 257 | |||
| 258 | return wm831x->write_dev(wm831x, reg, bytes, src); | ||
| 259 | } | ||
| 260 | |||
| 261 | /** | ||
| 262 | * wm831x_reg_write: Write a single WM831x register. | ||
| 263 | * | ||
| 264 | * @wm831x: Device to write to. | ||
| 265 | * @reg: Register to write to. | ||
| 266 | * @val: Value to write. | ||
| 267 | */ | ||
| 268 | int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg, | ||
| 269 | unsigned short val) | ||
| 270 | { | ||
| 271 | int ret; | ||
| 272 | |||
| 273 | mutex_lock(&wm831x->io_lock); | ||
| 274 | |||
| 275 | ret = wm831x_write(wm831x, reg, 2, &val); | ||
| 276 | |||
| 277 | mutex_unlock(&wm831x->io_lock); | ||
| 278 | |||
| 279 | return ret; | ||
| 280 | } | ||
| 281 | EXPORT_SYMBOL_GPL(wm831x_reg_write); | ||
| 282 | |||
| 283 | /** | ||
| 284 | * wm831x_set_bits: Set the value of a bitfield in a WM831x register | ||
| 285 | * | ||
| 286 | * @wm831x: Device to write to. | ||
| 287 | * @reg: Register to write to. | ||
| 288 | * @mask: Mask of bits to set. | ||
| 289 | * @val: Value to set (unshifted) | ||
| 290 | */ | ||
| 291 | int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg, | ||
| 292 | unsigned short mask, unsigned short val) | ||
| 293 | { | ||
| 294 | int ret; | ||
| 295 | u16 r; | ||
| 296 | |||
| 297 | mutex_lock(&wm831x->io_lock); | ||
| 298 | |||
| 299 | ret = wm831x_read(wm831x, reg, 2, &r); | ||
| 300 | if (ret < 0) | ||
| 301 | goto out; | ||
| 302 | |||
| 303 | r &= ~mask; | ||
| 304 | r |= val; | ||
| 305 | |||
| 306 | ret = wm831x_write(wm831x, reg, 2, &r); | ||
| 307 | |||
| 308 | out: | ||
| 309 | mutex_unlock(&wm831x->io_lock); | ||
| 310 | |||
| 311 | return ret; | ||
| 312 | } | ||
| 313 | EXPORT_SYMBOL_GPL(wm831x_set_bits); | ||
| 314 | |||
| 315 | /** | ||
| 316 | * wm831x_auxadc_read: Read a value from the WM831x AUXADC | ||
| 317 | * | ||
| 318 | * @wm831x: Device to read from. | ||
| 319 | * @input: AUXADC input to read. | ||
| 320 | */ | ||
| 321 | int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input) | ||
| 322 | { | ||
| 323 | int tries = 10; | ||
| 324 | int ret, src; | ||
| 325 | |||
| 326 | mutex_lock(&wm831x->auxadc_lock); | ||
| 327 | |||
| 328 | ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, | ||
| 329 | WM831X_AUX_ENA, WM831X_AUX_ENA); | ||
| 330 | if (ret < 0) { | ||
| 331 | dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", ret); | ||
| 332 | goto out; | ||
| 333 | } | ||
| 334 | |||
| 335 | /* We force a single source at present */ | ||
| 336 | src = input; | ||
| 337 | ret = wm831x_reg_write(wm831x, WM831X_AUXADC_SOURCE, | ||
| 338 | 1 << src); | ||
| 339 | if (ret < 0) { | ||
| 340 | dev_err(wm831x->dev, "Failed to set AUXADC source: %d\n", ret); | ||
| 341 | goto out; | ||
| 342 | } | ||
| 343 | |||
| 344 | ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, | ||
| 345 | WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA); | ||
| 346 | if (ret < 0) { | ||
| 347 | dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", ret); | ||
| 348 | goto disable; | ||
| 349 | } | ||
| 350 | |||
| 351 | do { | ||
| 352 | msleep(1); | ||
| 353 | |||
| 354 | ret = wm831x_reg_read(wm831x, WM831X_AUXADC_CONTROL); | ||
| 355 | if (ret < 0) | ||
| 356 | ret = WM831X_AUX_CVT_ENA; | ||
| 357 | } while ((ret & WM831X_AUX_CVT_ENA) && --tries); | ||
| 358 | |||
| 359 | if (ret & WM831X_AUX_CVT_ENA) { | ||
| 360 | dev_err(wm831x->dev, "Timed out reading AUXADC\n"); | ||
| 361 | ret = -EBUSY; | ||
| 362 | goto disable; | ||
| 363 | } | ||
| 364 | |||
| 365 | ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA); | ||
| 366 | if (ret < 0) { | ||
| 367 | dev_err(wm831x->dev, "Failed to read AUXADC data: %d\n", ret); | ||
| 368 | } else { | ||
| 369 | src = ((ret & WM831X_AUX_DATA_SRC_MASK) | ||
| 370 | >> WM831X_AUX_DATA_SRC_SHIFT) - 1; | ||
| 371 | |||
| 372 | if (src == 14) | ||
| 373 | src = WM831X_AUX_CAL; | ||
| 374 | |||
| 375 | if (src != input) { | ||
| 376 | dev_err(wm831x->dev, "Data from source %d not %d\n", | ||
| 377 | src, input); | ||
| 378 | ret = -EINVAL; | ||
| 379 | } else { | ||
| 380 | ret &= WM831X_AUX_DATA_MASK; | ||
| 381 | } | ||
| 382 | } | ||
| 383 | |||
| 384 | disable: | ||
| 385 | wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, WM831X_AUX_ENA, 0); | ||
| 386 | out: | ||
| 387 | mutex_unlock(&wm831x->auxadc_lock); | ||
| 388 | return ret; | ||
| 389 | } | ||
| 390 | EXPORT_SYMBOL_GPL(wm831x_auxadc_read); | ||
| 391 | |||
| 392 | /** | ||
| 393 | * wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC | ||
| 394 | * | ||
| 395 | * @wm831x: Device to read from. | ||
| 396 | * @input: AUXADC input to read. | ||
| 397 | */ | ||
| 398 | int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input) | ||
| 399 | { | ||
| 400 | int ret; | ||
| 401 | |||
| 402 | ret = wm831x_auxadc_read(wm831x, input); | ||
| 403 | if (ret < 0) | ||
| 404 | return ret; | ||
| 405 | |||
| 406 | ret *= 1465; | ||
| 407 | |||
| 408 | return ret; | ||
| 409 | } | ||
| 410 | EXPORT_SYMBOL_GPL(wm831x_auxadc_read_uv); | ||
| 411 | |||
| 412 | static struct resource wm831x_dcdc1_resources[] = { | ||
| 413 | { | ||
| 414 | .start = WM831X_DC1_CONTROL_1, | ||
| 415 | .end = WM831X_DC1_DVS_CONTROL, | ||
| 416 | .flags = IORESOURCE_IO, | ||
| 417 | }, | ||
| 418 | { | ||
| 419 | .name = "UV", | ||
| 420 | .start = WM831X_IRQ_UV_DC1, | ||
| 421 | .end = WM831X_IRQ_UV_DC1, | ||
| 422 | .flags = IORESOURCE_IRQ, | ||
| 423 | }, | ||
| 424 | { | ||
| 425 | .name = "HC", | ||
| 426 | .start = WM831X_IRQ_HC_DC1, | ||
| 427 | .end = WM831X_IRQ_HC_DC1, | ||
| 428 | .flags = IORESOURCE_IRQ, | ||
| 429 | }, | ||
| 430 | }; | ||
| 431 | |||
| 432 | |||
| 433 | static struct resource wm831x_dcdc2_resources[] = { | ||
| 434 | { | ||
| 435 | .start = WM831X_DC2_CONTROL_1, | ||
| 436 | .end = WM831X_DC2_DVS_CONTROL, | ||
| 437 | .flags = IORESOURCE_IO, | ||
| 438 | }, | ||
| 439 | { | ||
| 440 | .name = "UV", | ||
| 441 | .start = WM831X_IRQ_UV_DC2, | ||
| 442 | .end = WM831X_IRQ_UV_DC2, | ||
| 443 | .flags = IORESOURCE_IRQ, | ||
| 444 | }, | ||
| 445 | { | ||
| 446 | .name = "HC", | ||
| 447 | .start = WM831X_IRQ_HC_DC2, | ||
| 448 | .end = WM831X_IRQ_HC_DC2, | ||
| 449 | .flags = IORESOURCE_IRQ, | ||
| 450 | }, | ||
| 451 | }; | ||
| 452 | |||
| 453 | static struct resource wm831x_dcdc3_resources[] = { | ||
| 454 | { | ||
| 455 | .start = WM831X_DC3_CONTROL_1, | ||
| 456 | .end = WM831X_DC3_SLEEP_CONTROL, | ||
| 457 | .flags = IORESOURCE_IO, | ||
| 458 | }, | ||
| 459 | { | ||
| 460 | .name = "UV", | ||
| 461 | .start = WM831X_IRQ_UV_DC3, | ||
| 462 | .end = WM831X_IRQ_UV_DC3, | ||
| 463 | .flags = IORESOURCE_IRQ, | ||
| 464 | }, | ||
| 465 | }; | ||
| 466 | |||
| 467 | static struct resource wm831x_dcdc4_resources[] = { | ||
| 468 | { | ||
| 469 | .start = WM831X_DC4_CONTROL, | ||
| 470 | .end = WM831X_DC4_SLEEP_CONTROL, | ||
| 471 | .flags = IORESOURCE_IO, | ||
| 472 | }, | ||
| 473 | { | ||
| 474 | .name = "UV", | ||
| 475 | .start = WM831X_IRQ_UV_DC4, | ||
| 476 | .end = WM831X_IRQ_UV_DC4, | ||
| 477 | .flags = IORESOURCE_IRQ, | ||
| 478 | }, | ||
| 479 | }; | ||
| 480 | |||
| 481 | static struct resource wm831x_gpio_resources[] = { | ||
| 482 | { | ||
| 483 | .start = WM831X_IRQ_GPIO_1, | ||
| 484 | .end = WM831X_IRQ_GPIO_16, | ||
| 485 | .flags = IORESOURCE_IRQ, | ||
| 486 | }, | ||
| 487 | }; | ||
| 488 | |||
| 489 | static struct resource wm831x_isink1_resources[] = { | ||
| 490 | { | ||
| 491 | .start = WM831X_CURRENT_SINK_1, | ||
| 492 | .end = WM831X_CURRENT_SINK_1, | ||
| 493 | .flags = IORESOURCE_IO, | ||
| 494 | }, | ||
| 495 | { | ||
| 496 | .start = WM831X_IRQ_CS1, | ||
| 497 | .end = WM831X_IRQ_CS1, | ||
| 498 | .flags = IORESOURCE_IRQ, | ||
| 499 | }, | ||
| 500 | }; | ||
| 501 | |||
| 502 | static struct resource wm831x_isink2_resources[] = { | ||
| 503 | { | ||
| 504 | .start = WM831X_CURRENT_SINK_2, | ||
| 505 | .end = WM831X_CURRENT_SINK_2, | ||
| 506 | .flags = IORESOURCE_IO, | ||
| 507 | }, | ||
| 508 | { | ||
| 509 | .start = WM831X_IRQ_CS2, | ||
| 510 | .end = WM831X_IRQ_CS2, | ||
| 511 | .flags = IORESOURCE_IRQ, | ||
| 512 | }, | ||
| 513 | }; | ||
| 514 | |||
| 515 | static struct resource wm831x_ldo1_resources[] = { | ||
| 516 | { | ||
| 517 | .start = WM831X_LDO1_CONTROL, | ||
| 518 | .end = WM831X_LDO1_SLEEP_CONTROL, | ||
| 519 | .flags = IORESOURCE_IO, | ||
| 520 | }, | ||
| 521 | { | ||
| 522 | .name = "UV", | ||
| 523 | .start = WM831X_IRQ_UV_LDO1, | ||
| 524 | .end = WM831X_IRQ_UV_LDO1, | ||
| 525 | .flags = IORESOURCE_IRQ, | ||
| 526 | }, | ||
| 527 | }; | ||
| 528 | |||
| 529 | static struct resource wm831x_ldo2_resources[] = { | ||
| 530 | { | ||
| 531 | .start = WM831X_LDO2_CONTROL, | ||
| 532 | .end = WM831X_LDO2_SLEEP_CONTROL, | ||
| 533 | .flags = IORESOURCE_IO, | ||
| 534 | }, | ||
| 535 | { | ||
| 536 | .name = "UV", | ||
| 537 | .start = WM831X_IRQ_UV_LDO2, | ||
| 538 | .end = WM831X_IRQ_UV_LDO2, | ||
| 539 | .flags = IORESOURCE_IRQ, | ||
| 540 | }, | ||
| 541 | }; | ||
| 542 | |||
| 543 | static struct resource wm831x_ldo3_resources[] = { | ||
| 544 | { | ||
| 545 | .start = WM831X_LDO3_CONTROL, | ||
| 546 | .end = WM831X_LDO3_SLEEP_CONTROL, | ||
| 547 | .flags = IORESOURCE_IO, | ||
| 548 | }, | ||
| 549 | { | ||
| 550 | .name = "UV", | ||
| 551 | .start = WM831X_IRQ_UV_LDO3, | ||
| 552 | .end = WM831X_IRQ_UV_LDO3, | ||
| 553 | .flags = IORESOURCE_IRQ, | ||
| 554 | }, | ||
| 555 | }; | ||
| 556 | |||
| 557 | static struct resource wm831x_ldo4_resources[] = { | ||
| 558 | { | ||
| 559 | .start = WM831X_LDO4_CONTROL, | ||
| 560 | .end = WM831X_LDO4_SLEEP_CONTROL, | ||
| 561 | .flags = IORESOURCE_IO, | ||
| 562 | }, | ||
| 563 | { | ||
| 564 | .name = "UV", | ||
| 565 | .start = WM831X_IRQ_UV_LDO4, | ||
| 566 | .end = WM831X_IRQ_UV_LDO4, | ||
| 567 | .flags = IORESOURCE_IRQ, | ||
| 568 | }, | ||
| 569 | }; | ||
| 570 | |||
| 571 | static struct resource wm831x_ldo5_resources[] = { | ||
| 572 | { | ||
| 573 | .start = WM831X_LDO5_CONTROL, | ||
| 574 | .end = WM831X_LDO5_SLEEP_CONTROL, | ||
| 575 | .flags = IORESOURCE_IO, | ||
| 576 | }, | ||
| 577 | { | ||
| 578 | .name = "UV", | ||
| 579 | .start = WM831X_IRQ_UV_LDO5, | ||
| 580 | .end = WM831X_IRQ_UV_LDO5, | ||
| 581 | .flags = IORESOURCE_IRQ, | ||
| 582 | }, | ||
| 583 | }; | ||
| 584 | |||
| 585 | static struct resource wm831x_ldo6_resources[] = { | ||
| 586 | { | ||
| 587 | .start = WM831X_LDO6_CONTROL, | ||
| 588 | .end = WM831X_LDO6_SLEEP_CONTROL, | ||
| 589 | .flags = IORESOURCE_IO, | ||
| 590 | }, | ||
| 591 | { | ||
| 592 | .name = "UV", | ||
| 593 | .start = WM831X_IRQ_UV_LDO6, | ||
| 594 | .end = WM831X_IRQ_UV_LDO6, | ||
| 595 | .flags = IORESOURCE_IRQ, | ||
| 596 | }, | ||
| 597 | }; | ||
| 598 | |||
| 599 | static struct resource wm831x_ldo7_resources[] = { | ||
| 600 | { | ||
| 601 | .start = WM831X_LDO7_CONTROL, | ||
| 602 | .end = WM831X_LDO7_SLEEP_CONTROL, | ||
| 603 | .flags = IORESOURCE_IO, | ||
| 604 | }, | ||
| 605 | { | ||
| 606 | .name = "UV", | ||
| 607 | .start = WM831X_IRQ_UV_LDO7, | ||
| 608 | .end = WM831X_IRQ_UV_LDO7, | ||
| 609 | .flags = IORESOURCE_IRQ, | ||
| 610 | }, | ||
| 611 | }; | ||
| 612 | |||
| 613 | static struct resource wm831x_ldo8_resources[] = { | ||
| 614 | { | ||
| 615 | .start = WM831X_LDO8_CONTROL, | ||
| 616 | .end = WM831X_LDO8_SLEEP_CONTROL, | ||
| 617 | .flags = IORESOURCE_IO, | ||
| 618 | }, | ||
| 619 | { | ||
| 620 | .name = "UV", | ||
| 621 | .start = WM831X_IRQ_UV_LDO8, | ||
| 622 | .end = WM831X_IRQ_UV_LDO8, | ||
| 623 | .flags = IORESOURCE_IRQ, | ||
| 624 | }, | ||
| 625 | }; | ||
| 626 | |||
| 627 | static struct resource wm831x_ldo9_resources[] = { | ||
| 628 | { | ||
| 629 | .start = WM831X_LDO9_CONTROL, | ||
| 630 | .end = WM831X_LDO9_SLEEP_CONTROL, | ||
| 631 | .flags = IORESOURCE_IO, | ||
| 632 | }, | ||
| 633 | { | ||
| 634 | .name = "UV", | ||
| 635 | .start = WM831X_IRQ_UV_LDO9, | ||
| 636 | .end = WM831X_IRQ_UV_LDO9, | ||
| 637 | .flags = IORESOURCE_IRQ, | ||
| 638 | }, | ||
| 639 | }; | ||
| 640 | |||
| 641 | static struct resource wm831x_ldo10_resources[] = { | ||
| 642 | { | ||
| 643 | .start = WM831X_LDO10_CONTROL, | ||
| 644 | .end = WM831X_LDO10_SLEEP_CONTROL, | ||
| 645 | .flags = IORESOURCE_IO, | ||
| 646 | }, | ||
| 647 | { | ||
| 648 | .name = "UV", | ||
| 649 | .start = WM831X_IRQ_UV_LDO10, | ||
| 650 | .end = WM831X_IRQ_UV_LDO10, | ||
| 651 | .flags = IORESOURCE_IRQ, | ||
| 652 | }, | ||
| 653 | }; | ||
| 654 | |||
| 655 | static struct resource wm831x_ldo11_resources[] = { | ||
| 656 | { | ||
| 657 | .start = WM831X_LDO11_ON_CONTROL, | ||
| 658 | .end = WM831X_LDO11_SLEEP_CONTROL, | ||
| 659 | .flags = IORESOURCE_IO, | ||
| 660 | }, | ||
| 661 | }; | ||
| 662 | |||
| 663 | static struct resource wm831x_on_resources[] = { | ||
| 664 | { | ||
| 665 | .start = WM831X_IRQ_ON, | ||
| 666 | .end = WM831X_IRQ_ON, | ||
| 667 | .flags = IORESOURCE_IRQ, | ||
| 668 | }, | ||
| 669 | }; | ||
| 670 | |||
| 671 | |||
| 672 | static struct resource wm831x_power_resources[] = { | ||
| 673 | { | ||
| 674 | .name = "SYSLO", | ||
| 675 | .start = WM831X_IRQ_PPM_SYSLO, | ||
| 676 | .end = WM831X_IRQ_PPM_SYSLO, | ||
| 677 | .flags = IORESOURCE_IRQ, | ||
| 678 | }, | ||
| 679 | { | ||
| 680 | .name = "PWR SRC", | ||
| 681 | .start = WM831X_IRQ_PPM_PWR_SRC, | ||
| 682 | .end = WM831X_IRQ_PPM_PWR_SRC, | ||
| 683 | .flags = IORESOURCE_IRQ, | ||
| 684 | }, | ||
| 685 | { | ||
| 686 | .name = "USB CURR", | ||
| 687 | .start = WM831X_IRQ_PPM_USB_CURR, | ||
| 688 | .end = WM831X_IRQ_PPM_USB_CURR, | ||
| 689 | .flags = IORESOURCE_IRQ, | ||
| 690 | }, | ||
| 691 | { | ||
| 692 | .name = "BATT HOT", | ||
| 693 | .start = WM831X_IRQ_CHG_BATT_HOT, | ||
| 694 | .end = WM831X_IRQ_CHG_BATT_HOT, | ||
| 695 | .flags = IORESOURCE_IRQ, | ||
| 696 | }, | ||
| 697 | { | ||
| 698 | .name = "BATT COLD", | ||
| 699 | .start = WM831X_IRQ_CHG_BATT_COLD, | ||
| 700 | .end = WM831X_IRQ_CHG_BATT_COLD, | ||
| 701 | .flags = IORESOURCE_IRQ, | ||
| 702 | }, | ||
| 703 | { | ||
| 704 | .name = "BATT FAIL", | ||
| 705 | .start = WM831X_IRQ_CHG_BATT_FAIL, | ||
| 706 | .end = WM831X_IRQ_CHG_BATT_FAIL, | ||
| 707 | .flags = IORESOURCE_IRQ, | ||
| 708 | }, | ||
| 709 | { | ||
| 710 | .name = "OV", | ||
| 711 | .start = WM831X_IRQ_CHG_OV, | ||
| 712 | .end = WM831X_IRQ_CHG_OV, | ||
| 713 | .flags = IORESOURCE_IRQ, | ||
| 714 | }, | ||
| 715 | { | ||
| 716 | .name = "END", | ||
| 717 | .start = WM831X_IRQ_CHG_END, | ||
| 718 | .end = WM831X_IRQ_CHG_END, | ||
| 719 | .flags = IORESOURCE_IRQ, | ||
| 720 | }, | ||
| 721 | { | ||
| 722 | .name = "TO", | ||
| 723 | .start = WM831X_IRQ_CHG_TO, | ||
| 724 | .end = WM831X_IRQ_CHG_TO, | ||
| 725 | .flags = IORESOURCE_IRQ, | ||
| 726 | }, | ||
| 727 | { | ||
| 728 | .name = "MODE", | ||
| 729 | .start = WM831X_IRQ_CHG_MODE, | ||
| 730 | .end = WM831X_IRQ_CHG_MODE, | ||
| 731 | .flags = IORESOURCE_IRQ, | ||
| 732 | }, | ||
| 733 | { | ||
| 734 | .name = "START", | ||
| 735 | .start = WM831X_IRQ_CHG_START, | ||
| 736 | .end = WM831X_IRQ_CHG_START, | ||
| 737 | .flags = IORESOURCE_IRQ, | ||
| 738 | }, | ||
| 739 | }; | ||
| 740 | |||
| 741 | static struct resource wm831x_rtc_resources[] = { | ||
| 742 | { | ||
| 743 | .name = "PER", | ||
| 744 | .start = WM831X_IRQ_RTC_PER, | ||
| 745 | .end = WM831X_IRQ_RTC_PER, | ||
| 746 | .flags = IORESOURCE_IRQ, | ||
| 747 | }, | ||
| 748 | { | ||
| 749 | .name = "ALM", | ||
| 750 | .start = WM831X_IRQ_RTC_ALM, | ||
| 751 | .end = WM831X_IRQ_RTC_ALM, | ||
| 752 | .flags = IORESOURCE_IRQ, | ||
| 753 | }, | ||
| 754 | }; | ||
| 755 | |||
| 756 | static struct resource wm831x_status1_resources[] = { | ||
| 757 | { | ||
| 758 | .start = WM831X_STATUS_LED_1, | ||
| 759 | .end = WM831X_STATUS_LED_1, | ||
| 760 | .flags = IORESOURCE_IO, | ||
| 761 | }, | ||
| 762 | }; | ||
| 763 | |||
| 764 | static struct resource wm831x_status2_resources[] = { | ||
| 765 | { | ||
| 766 | .start = WM831X_STATUS_LED_2, | ||
| 767 | .end = WM831X_STATUS_LED_2, | ||
| 768 | .flags = IORESOURCE_IO, | ||
| 769 | }, | ||
| 770 | }; | ||
| 771 | |||
| 772 | static struct resource wm831x_touch_resources[] = { | ||
| 773 | { | ||
| 774 | .name = "TCHPD", | ||
| 775 | .start = WM831X_IRQ_TCHPD, | ||
| 776 | .end = WM831X_IRQ_TCHPD, | ||
| 777 | .flags = IORESOURCE_IRQ, | ||
| 778 | }, | ||
| 779 | { | ||
| 780 | .name = "TCHDATA", | ||
| 781 | .start = WM831X_IRQ_TCHDATA, | ||
| 782 | .end = WM831X_IRQ_TCHDATA, | ||
| 783 | .flags = IORESOURCE_IRQ, | ||
| 784 | }, | ||
| 785 | }; | ||
| 786 | |||
| 787 | static struct resource wm831x_wdt_resources[] = { | ||
| 788 | { | ||
| 789 | .start = WM831X_IRQ_WDOG_TO, | ||
| 790 | .end = WM831X_IRQ_WDOG_TO, | ||
| 791 | .flags = IORESOURCE_IRQ, | ||
| 792 | }, | ||
| 793 | }; | ||
| 794 | |||
| 795 | static struct mfd_cell wm8310_devs[] = { | ||
| 796 | { | ||
| 797 | .name = "wm831x-buckv", | ||
| 798 | .id = 1, | ||
| 799 | .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources), | ||
| 800 | .resources = wm831x_dcdc1_resources, | ||
| 801 | }, | ||
| 802 | { | ||
| 803 | .name = "wm831x-buckv", | ||
| 804 | .id = 2, | ||
| 805 | .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources), | ||
| 806 | .resources = wm831x_dcdc2_resources, | ||
| 807 | }, | ||
| 808 | { | ||
| 809 | .name = "wm831x-buckp", | ||
| 810 | .id = 3, | ||
| 811 | .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources), | ||
| 812 | .resources = wm831x_dcdc3_resources, | ||
| 813 | }, | ||
| 814 | { | ||
| 815 | .name = "wm831x-boostp", | ||
| 816 | .id = 4, | ||
| 817 | .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources), | ||
| 818 | .resources = wm831x_dcdc4_resources, | ||
| 819 | }, | ||
| 820 | { | ||
| 821 | .name = "wm831x-epe", | ||
| 822 | .id = 1, | ||
| 823 | }, | ||
| 824 | { | ||
| 825 | .name = "wm831x-epe", | ||
| 826 | .id = 2, | ||
| 827 | }, | ||
| 828 | { | ||
| 829 | .name = "wm831x-gpio", | ||
| 830 | .num_resources = ARRAY_SIZE(wm831x_gpio_resources), | ||
| 831 | .resources = wm831x_gpio_resources, | ||
| 832 | }, | ||
| 833 | { | ||
| 834 | .name = "wm831x-hwmon", | ||
| 835 | }, | ||
| 836 | { | ||
| 837 | .name = "wm831x-isink", | ||
| 838 | .id = 1, | ||
| 839 | .num_resources = ARRAY_SIZE(wm831x_isink1_resources), | ||
| 840 | .resources = wm831x_isink1_resources, | ||
| 841 | }, | ||
| 842 | { | ||
| 843 | .name = "wm831x-isink", | ||
| 844 | .id = 2, | ||
| 845 | .num_resources = ARRAY_SIZE(wm831x_isink2_resources), | ||
| 846 | .resources = wm831x_isink2_resources, | ||
| 847 | }, | ||
| 848 | { | ||
| 849 | .name = "wm831x-ldo", | ||
| 850 | .id = 1, | ||
| 851 | .num_resources = ARRAY_SIZE(wm831x_ldo1_resources), | ||
| 852 | .resources = wm831x_ldo1_resources, | ||
| 853 | }, | ||
| 854 | { | ||
| 855 | .name = "wm831x-ldo", | ||
| 856 | .id = 2, | ||
| 857 | .num_resources = ARRAY_SIZE(wm831x_ldo2_resources), | ||
| 858 | .resources = wm831x_ldo2_resources, | ||
| 859 | }, | ||
| 860 | { | ||
| 861 | .name = "wm831x-ldo", | ||
| 862 | .id = 3, | ||
| 863 | .num_resources = ARRAY_SIZE(wm831x_ldo3_resources), | ||
| 864 | .resources = wm831x_ldo3_resources, | ||
| 865 | }, | ||
| 866 | { | ||
| 867 | .name = "wm831x-ldo", | ||
| 868 | .id = 4, | ||
| 869 | .num_resources = ARRAY_SIZE(wm831x_ldo4_resources), | ||
| 870 | .resources = wm831x_ldo4_resources, | ||
| 871 | }, | ||
| 872 | { | ||
| 873 | .name = "wm831x-ldo", | ||
| 874 | .id = 5, | ||
| 875 | .num_resources = ARRAY_SIZE(wm831x_ldo5_resources), | ||
| 876 | .resources = wm831x_ldo5_resources, | ||
| 877 | }, | ||
| 878 | { | ||
| 879 | .name = "wm831x-ldo", | ||
| 880 | .id = 6, | ||
| 881 | .num_resources = ARRAY_SIZE(wm831x_ldo6_resources), | ||
| 882 | .resources = wm831x_ldo6_resources, | ||
| 883 | }, | ||
| 884 | { | ||
| 885 | .name = "wm831x-aldo", | ||
| 886 | .id = 7, | ||
| 887 | .num_resources = ARRAY_SIZE(wm831x_ldo7_resources), | ||
| 888 | .resources = wm831x_ldo7_resources, | ||
| 889 | }, | ||
| 890 | { | ||
| 891 | .name = "wm831x-aldo", | ||
| 892 | .id = 8, | ||
| 893 | .num_resources = ARRAY_SIZE(wm831x_ldo8_resources), | ||
| 894 | .resources = wm831x_ldo8_resources, | ||
| 895 | }, | ||
| 896 | { | ||
| 897 | .name = "wm831x-aldo", | ||
| 898 | .id = 9, | ||
| 899 | .num_resources = ARRAY_SIZE(wm831x_ldo9_resources), | ||
| 900 | .resources = wm831x_ldo9_resources, | ||
| 901 | }, | ||
| 902 | { | ||
| 903 | .name = "wm831x-aldo", | ||
| 904 | .id = 10, | ||
| 905 | .num_resources = ARRAY_SIZE(wm831x_ldo10_resources), | ||
| 906 | .resources = wm831x_ldo10_resources, | ||
| 907 | }, | ||
| 908 | { | ||
| 909 | .name = "wm831x-alive-ldo", | ||
| 910 | .id = 11, | ||
| 911 | .num_resources = ARRAY_SIZE(wm831x_ldo11_resources), | ||
| 912 | .resources = wm831x_ldo11_resources, | ||
| 913 | }, | ||
| 914 | { | ||
| 915 | .name = "wm831x-on", | ||
| 916 | .num_resources = ARRAY_SIZE(wm831x_on_resources), | ||
| 917 | .resources = wm831x_on_resources, | ||
| 918 | }, | ||
| 919 | { | ||
| 920 | .name = "wm831x-power", | ||
| 921 | .num_resources = ARRAY_SIZE(wm831x_power_resources), | ||
| 922 | .resources = wm831x_power_resources, | ||
| 923 | }, | ||
| 924 | { | ||
| 925 | .name = "wm831x-rtc", | ||
| 926 | .num_resources = ARRAY_SIZE(wm831x_rtc_resources), | ||
| 927 | .resources = wm831x_rtc_resources, | ||
| 928 | }, | ||
| 929 | { | ||
| 930 | .name = "wm831x-status", | ||
| 931 | .id = 1, | ||
| 932 | .num_resources = ARRAY_SIZE(wm831x_status1_resources), | ||
| 933 | .resources = wm831x_status1_resources, | ||
| 934 | }, | ||
| 935 | { | ||
| 936 | .name = "wm831x-status", | ||
| 937 | .id = 2, | ||
| 938 | .num_resources = ARRAY_SIZE(wm831x_status2_resources), | ||
| 939 | .resources = wm831x_status2_resources, | ||
| 940 | }, | ||
| 941 | { | ||
| 942 | .name = "wm831x-watchdog", | ||
| 943 | .num_resources = ARRAY_SIZE(wm831x_wdt_resources), | ||
| 944 | .resources = wm831x_wdt_resources, | ||
| 945 | }, | ||
| 946 | }; | ||
| 947 | |||
| 948 | static struct mfd_cell wm8311_devs[] = { | ||
| 949 | { | ||
| 950 | .name = "wm831x-buckv", | ||
| 951 | .id = 1, | ||
| 952 | .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources), | ||
| 953 | .resources = wm831x_dcdc1_resources, | ||
| 954 | }, | ||
| 955 | { | ||
| 956 | .name = "wm831x-buckv", | ||
| 957 | .id = 2, | ||
| 958 | .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources), | ||
| 959 | .resources = wm831x_dcdc2_resources, | ||
| 960 | }, | ||
| 961 | { | ||
| 962 | .name = "wm831x-buckp", | ||
| 963 | .id = 3, | ||
| 964 | .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources), | ||
| 965 | .resources = wm831x_dcdc3_resources, | ||
| 966 | }, | ||
| 967 | { | ||
| 968 | .name = "wm831x-boostp", | ||
| 969 | .id = 4, | ||
| 970 | .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources), | ||
| 971 | .resources = wm831x_dcdc4_resources, | ||
| 972 | }, | ||
| 973 | { | ||
| 974 | .name = "wm831x-epe", | ||
| 975 | .id = 1, | ||
| 976 | }, | ||
| 977 | { | ||
| 978 | .name = "wm831x-epe", | ||
| 979 | .id = 2, | ||
| 980 | }, | ||
| 981 | { | ||
| 982 | .name = "wm831x-gpio", | ||
| 983 | .num_resources = ARRAY_SIZE(wm831x_gpio_resources), | ||
| 984 | .resources = wm831x_gpio_resources, | ||
| 985 | }, | ||
| 986 | { | ||
| 987 | .name = "wm831x-hwmon", | ||
| 988 | }, | ||
| 989 | { | ||
| 990 | .name = "wm831x-isink", | ||
| 991 | .id = 1, | ||
| 992 | .num_resources = ARRAY_SIZE(wm831x_isink1_resources), | ||
| 993 | .resources = wm831x_isink1_resources, | ||
| 994 | }, | ||
| 995 | { | ||
| 996 | .name = "wm831x-isink", | ||
| 997 | .id = 2, | ||
| 998 | .num_resources = ARRAY_SIZE(wm831x_isink2_resources), | ||
| 999 | .resources = wm831x_isink2_resources, | ||
| 1000 | }, | ||
| 1001 | { | ||
| 1002 | .name = "wm831x-ldo", | ||
| 1003 | .id = 1, | ||
| 1004 | .num_resources = ARRAY_SIZE(wm831x_ldo1_resources), | ||
| 1005 | .resources = wm831x_ldo1_resources, | ||
| 1006 | }, | ||
| 1007 | { | ||
| 1008 | .name = "wm831x-ldo", | ||
| 1009 | .id = 2, | ||
| 1010 | .num_resources = ARRAY_SIZE(wm831x_ldo2_resources), | ||
| 1011 | .resources = wm831x_ldo2_resources, | ||
| 1012 | }, | ||
| 1013 | { | ||
| 1014 | .name = "wm831x-ldo", | ||
| 1015 | .id = 3, | ||
| 1016 | .num_resources = ARRAY_SIZE(wm831x_ldo3_resources), | ||
| 1017 | .resources = wm831x_ldo3_resources, | ||
| 1018 | }, | ||
| 1019 | { | ||
| 1020 | .name = "wm831x-ldo", | ||
| 1021 | .id = 4, | ||
| 1022 | .num_resources = ARRAY_SIZE(wm831x_ldo4_resources), | ||
| 1023 | .resources = wm831x_ldo4_resources, | ||
| 1024 | }, | ||
| 1025 | { | ||
| 1026 | .name = "wm831x-ldo", | ||
| 1027 | .id = 5, | ||
| 1028 | .num_resources = ARRAY_SIZE(wm831x_ldo5_resources), | ||
| 1029 | .resources = wm831x_ldo5_resources, | ||
| 1030 | }, | ||
| 1031 | { | ||
| 1032 | .name = "wm831x-aldo", | ||
| 1033 | .id = 7, | ||
| 1034 | .num_resources = ARRAY_SIZE(wm831x_ldo7_resources), | ||
| 1035 | .resources = wm831x_ldo7_resources, | ||
| 1036 | }, | ||
| 1037 | { | ||
| 1038 | .name = "wm831x-alive-ldo", | ||
| 1039 | .id = 11, | ||
| 1040 | .num_resources = ARRAY_SIZE(wm831x_ldo11_resources), | ||
| 1041 | .resources = wm831x_ldo11_resources, | ||
| 1042 | }, | ||
| 1043 | { | ||
| 1044 | .name = "wm831x-on", | ||
| 1045 | .num_resources = ARRAY_SIZE(wm831x_on_resources), | ||
| 1046 | .resources = wm831x_on_resources, | ||
| 1047 | }, | ||
| 1048 | { | ||
| 1049 | .name = "wm831x-power", | ||
| 1050 | .num_resources = ARRAY_SIZE(wm831x_power_resources), | ||
| 1051 | .resources = wm831x_power_resources, | ||
| 1052 | }, | ||
| 1053 | { | ||
| 1054 | .name = "wm831x-rtc", | ||
| 1055 | .num_resources = ARRAY_SIZE(wm831x_rtc_resources), | ||
| 1056 | .resources = wm831x_rtc_resources, | ||
| 1057 | }, | ||
| 1058 | { | ||
| 1059 | .name = "wm831x-status", | ||
| 1060 | .id = 1, | ||
| 1061 | .num_resources = ARRAY_SIZE(wm831x_status1_resources), | ||
| 1062 | .resources = wm831x_status1_resources, | ||
| 1063 | }, | ||
| 1064 | { | ||
| 1065 | .name = "wm831x-status", | ||
| 1066 | .id = 2, | ||
| 1067 | .num_resources = ARRAY_SIZE(wm831x_status2_resources), | ||
| 1068 | .resources = wm831x_status2_resources, | ||
| 1069 | }, | ||
| 1070 | { | ||
| 1071 | .name = "wm831x-touch", | ||
| 1072 | .num_resources = ARRAY_SIZE(wm831x_touch_resources), | ||
| 1073 | .resources = wm831x_touch_resources, | ||
| 1074 | }, | ||
| 1075 | { | ||
| 1076 | .name = "wm831x-watchdog", | ||
| 1077 | .num_resources = ARRAY_SIZE(wm831x_wdt_resources), | ||
| 1078 | .resources = wm831x_wdt_resources, | ||
| 1079 | }, | ||
| 1080 | }; | ||
| 1081 | |||
| 1082 | static struct mfd_cell wm8312_devs[] = { | ||
| 1083 | { | ||
| 1084 | .name = "wm831x-buckv", | ||
| 1085 | .id = 1, | ||
| 1086 | .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources), | ||
| 1087 | .resources = wm831x_dcdc1_resources, | ||
| 1088 | }, | ||
| 1089 | { | ||
| 1090 | .name = "wm831x-buckv", | ||
| 1091 | .id = 2, | ||
| 1092 | .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources), | ||
| 1093 | .resources = wm831x_dcdc2_resources, | ||
| 1094 | }, | ||
| 1095 | { | ||
| 1096 | .name = "wm831x-buckp", | ||
| 1097 | .id = 3, | ||
| 1098 | .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources), | ||
| 1099 | .resources = wm831x_dcdc3_resources, | ||
| 1100 | }, | ||
| 1101 | { | ||
| 1102 | .name = "wm831x-boostp", | ||
| 1103 | .id = 4, | ||
| 1104 | .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources), | ||
| 1105 | .resources = wm831x_dcdc4_resources, | ||
| 1106 | }, | ||
| 1107 | { | ||
| 1108 | .name = "wm831x-epe", | ||
| 1109 | .id = 1, | ||
| 1110 | }, | ||
| 1111 | { | ||
| 1112 | .name = "wm831x-epe", | ||
| 1113 | .id = 2, | ||
| 1114 | }, | ||
| 1115 | { | ||
| 1116 | .name = "wm831x-gpio", | ||
| 1117 | .num_resources = ARRAY_SIZE(wm831x_gpio_resources), | ||
| 1118 | .resources = wm831x_gpio_resources, | ||
| 1119 | }, | ||
| 1120 | { | ||
| 1121 | .name = "wm831x-hwmon", | ||
| 1122 | }, | ||
| 1123 | { | ||
| 1124 | .name = "wm831x-isink", | ||
| 1125 | .id = 1, | ||
| 1126 | .num_resources = ARRAY_SIZE(wm831x_isink1_resources), | ||
| 1127 | .resources = wm831x_isink1_resources, | ||
| 1128 | }, | ||
| 1129 | { | ||
| 1130 | .name = "wm831x-isink", | ||
| 1131 | .id = 2, | ||
| 1132 | .num_resources = ARRAY_SIZE(wm831x_isink2_resources), | ||
| 1133 | .resources = wm831x_isink2_resources, | ||
| 1134 | }, | ||
| 1135 | { | ||
| 1136 | .name = "wm831x-ldo", | ||
| 1137 | .id = 1, | ||
| 1138 | .num_resources = ARRAY_SIZE(wm831x_ldo1_resources), | ||
| 1139 | .resources = wm831x_ldo1_resources, | ||
| 1140 | }, | ||
| 1141 | { | ||
| 1142 | .name = "wm831x-ldo", | ||
| 1143 | .id = 2, | ||
| 1144 | .num_resources = ARRAY_SIZE(wm831x_ldo2_resources), | ||
| 1145 | .resources = wm831x_ldo2_resources, | ||
| 1146 | }, | ||
| 1147 | { | ||
| 1148 | .name = "wm831x-ldo", | ||
| 1149 | .id = 3, | ||
| 1150 | .num_resources = ARRAY_SIZE(wm831x_ldo3_resources), | ||
| 1151 | .resources = wm831x_ldo3_resources, | ||
| 1152 | }, | ||
| 1153 | { | ||
| 1154 | .name = "wm831x-ldo", | ||
| 1155 | .id = 4, | ||
| 1156 | .num_resources = ARRAY_SIZE(wm831x_ldo4_resources), | ||
| 1157 | .resources = wm831x_ldo4_resources, | ||
| 1158 | }, | ||
| 1159 | { | ||
| 1160 | .name = "wm831x-ldo", | ||
| 1161 | .id = 5, | ||
| 1162 | .num_resources = ARRAY_SIZE(wm831x_ldo5_resources), | ||
| 1163 | .resources = wm831x_ldo5_resources, | ||
| 1164 | }, | ||
| 1165 | { | ||
| 1166 | .name = "wm831x-ldo", | ||
| 1167 | .id = 6, | ||
| 1168 | .num_resources = ARRAY_SIZE(wm831x_ldo6_resources), | ||
| 1169 | .resources = wm831x_ldo6_resources, | ||
| 1170 | }, | ||
| 1171 | { | ||
| 1172 | .name = "wm831x-aldo", | ||
| 1173 | .id = 7, | ||
| 1174 | .num_resources = ARRAY_SIZE(wm831x_ldo7_resources), | ||
| 1175 | .resources = wm831x_ldo7_resources, | ||
| 1176 | }, | ||
| 1177 | { | ||
| 1178 | .name = "wm831x-aldo", | ||
| 1179 | .id = 8, | ||
| 1180 | .num_resources = ARRAY_SIZE(wm831x_ldo8_resources), | ||
| 1181 | .resources = wm831x_ldo8_resources, | ||
| 1182 | }, | ||
| 1183 | { | ||
| 1184 | .name = "wm831x-aldo", | ||
| 1185 | .id = 9, | ||
| 1186 | .num_resources = ARRAY_SIZE(wm831x_ldo9_resources), | ||
| 1187 | .resources = wm831x_ldo9_resources, | ||
| 1188 | }, | ||
| 1189 | { | ||
| 1190 | .name = "wm831x-aldo", | ||
| 1191 | .id = 10, | ||
| 1192 | .num_resources = ARRAY_SIZE(wm831x_ldo10_resources), | ||
| 1193 | .resources = wm831x_ldo10_resources, | ||
| 1194 | }, | ||
| 1195 | { | ||
| 1196 | .name = "wm831x-alive-ldo", | ||
| 1197 | .id = 11, | ||
| 1198 | .num_resources = ARRAY_SIZE(wm831x_ldo11_resources), | ||
| 1199 | .resources = wm831x_ldo11_resources, | ||
| 1200 | }, | ||
| 1201 | { | ||
| 1202 | .name = "wm831x-on", | ||
| 1203 | .num_resources = ARRAY_SIZE(wm831x_on_resources), | ||
| 1204 | .resources = wm831x_on_resources, | ||
| 1205 | }, | ||
| 1206 | { | ||
| 1207 | .name = "wm831x-power", | ||
| 1208 | .num_resources = ARRAY_SIZE(wm831x_power_resources), | ||
| 1209 | .resources = wm831x_power_resources, | ||
| 1210 | }, | ||
| 1211 | { | ||
| 1212 | .name = "wm831x-rtc", | ||
| 1213 | .num_resources = ARRAY_SIZE(wm831x_rtc_resources), | ||
| 1214 | .resources = wm831x_rtc_resources, | ||
| 1215 | }, | ||
| 1216 | { | ||
| 1217 | .name = "wm831x-status", | ||
| 1218 | .id = 1, | ||
| 1219 | .num_resources = ARRAY_SIZE(wm831x_status1_resources), | ||
| 1220 | .resources = wm831x_status1_resources, | ||
| 1221 | }, | ||
| 1222 | { | ||
| 1223 | .name = "wm831x-status", | ||
| 1224 | .id = 2, | ||
| 1225 | .num_resources = ARRAY_SIZE(wm831x_status2_resources), | ||
| 1226 | .resources = wm831x_status2_resources, | ||
| 1227 | }, | ||
| 1228 | { | ||
| 1229 | .name = "wm831x-touch", | ||
| 1230 | .num_resources = ARRAY_SIZE(wm831x_touch_resources), | ||
| 1231 | .resources = wm831x_touch_resources, | ||
| 1232 | }, | ||
| 1233 | { | ||
| 1234 | .name = "wm831x-watchdog", | ||
| 1235 | .num_resources = ARRAY_SIZE(wm831x_wdt_resources), | ||
| 1236 | .resources = wm831x_wdt_resources, | ||
| 1237 | }, | ||
| 1238 | }; | ||
| 1239 | |||
| 1240 | static struct mfd_cell backlight_devs[] = { | ||
| 1241 | { | ||
| 1242 | .name = "wm831x-backlight", | ||
| 1243 | }, | ||
| 1244 | }; | ||
| 1245 | |||
| 1246 | /* | ||
| 1247 | * Instantiate the generic non-control parts of the device. | ||
| 1248 | */ | ||
| 1249 | static int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq) | ||
| 1250 | { | ||
| 1251 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 1252 | int rev; | ||
| 1253 | enum wm831x_parent parent; | ||
| 1254 | int ret; | ||
| 1255 | |||
| 1256 | mutex_init(&wm831x->io_lock); | ||
| 1257 | mutex_init(&wm831x->key_lock); | ||
| 1258 | mutex_init(&wm831x->auxadc_lock); | ||
| 1259 | dev_set_drvdata(wm831x->dev, wm831x); | ||
| 1260 | |||
| 1261 | ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID); | ||
| 1262 | if (ret < 0) { | ||
| 1263 | dev_err(wm831x->dev, "Failed to read parent ID: %d\n", ret); | ||
| 1264 | goto err; | ||
| 1265 | } | ||
| 1266 | if (ret != 0x6204) { | ||
| 1267 | dev_err(wm831x->dev, "Device is not a WM831x: ID %x\n", ret); | ||
| 1268 | ret = -EINVAL; | ||
| 1269 | goto err; | ||
| 1270 | } | ||
| 1271 | |||
| 1272 | ret = wm831x_reg_read(wm831x, WM831X_REVISION); | ||
| 1273 | if (ret < 0) { | ||
| 1274 | dev_err(wm831x->dev, "Failed to read revision: %d\n", ret); | ||
| 1275 | goto err; | ||
| 1276 | } | ||
| 1277 | rev = (ret & WM831X_PARENT_REV_MASK) >> WM831X_PARENT_REV_SHIFT; | ||
| 1278 | |||
| 1279 | ret = wm831x_reg_read(wm831x, WM831X_RESET_ID); | ||
| 1280 | if (ret < 0) { | ||
| 1281 | dev_err(wm831x->dev, "Failed to read device ID: %d\n", ret); | ||
| 1282 | goto err; | ||
| 1283 | } | ||
| 1284 | |||
| 1285 | switch (ret) { | ||
| 1286 | case 0x8310: | ||
| 1287 | parent = WM8310; | ||
| 1288 | switch (rev) { | ||
| 1289 | case 0: | ||
| 1290 | dev_info(wm831x->dev, "WM8310 revision %c\n", | ||
| 1291 | 'A' + rev); | ||
| 1292 | break; | ||
| 1293 | } | ||
| 1294 | break; | ||
| 1295 | |||
| 1296 | case 0x8311: | ||
| 1297 | parent = WM8311; | ||
| 1298 | switch (rev) { | ||
| 1299 | case 0: | ||
| 1300 | dev_info(wm831x->dev, "WM8311 revision %c\n", | ||
| 1301 | 'A' + rev); | ||
| 1302 | break; | ||
| 1303 | } | ||
| 1304 | break; | ||
| 1305 | |||
| 1306 | case 0x8312: | ||
| 1307 | parent = WM8312; | ||
| 1308 | switch (rev) { | ||
| 1309 | case 0: | ||
| 1310 | dev_info(wm831x->dev, "WM8312 revision %c\n", | ||
| 1311 | 'A' + rev); | ||
| 1312 | break; | ||
| 1313 | } | ||
| 1314 | break; | ||
| 1315 | |||
| 1316 | case 0: | ||
| 1317 | /* Some engineering samples do not have the ID set, | ||
| 1318 | * rely on the device being registered correctly. | ||
| 1319 | * This will need revisiting for future devices with | ||
| 1320 | * multiple dies. | ||
| 1321 | */ | ||
| 1322 | parent = id; | ||
| 1323 | switch (rev) { | ||
| 1324 | case 0: | ||
| 1325 | dev_info(wm831x->dev, "WM831%d ES revision %c\n", | ||
| 1326 | parent, 'A' + rev); | ||
| 1327 | break; | ||
| 1328 | } | ||
| 1329 | break; | ||
| 1330 | |||
| 1331 | default: | ||
| 1332 | dev_err(wm831x->dev, "Unknown WM831x device %04x\n", ret); | ||
| 1333 | ret = -EINVAL; | ||
| 1334 | goto err; | ||
| 1335 | } | ||
| 1336 | |||
| 1337 | /* This will need revisiting in future but is OK for all | ||
| 1338 | * current parts. | ||
| 1339 | */ | ||
| 1340 | if (parent != id) | ||
| 1341 | dev_warn(wm831x->dev, "Device was registered as a WM831%lu\n", | ||
| 1342 | id); | ||
| 1343 | |||
| 1344 | /* Bootstrap the user key */ | ||
| 1345 | ret = wm831x_reg_read(wm831x, WM831X_SECURITY_KEY); | ||
| 1346 | if (ret < 0) { | ||
| 1347 | dev_err(wm831x->dev, "Failed to read security key: %d\n", ret); | ||
| 1348 | goto err; | ||
| 1349 | } | ||
| 1350 | if (ret != 0) { | ||
| 1351 | dev_warn(wm831x->dev, "Security key had non-zero value %x\n", | ||
| 1352 | ret); | ||
| 1353 | wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0); | ||
| 1354 | } | ||
| 1355 | wm831x->locked = 1; | ||
| 1356 | |||
| 1357 | if (pdata && pdata->pre_init) { | ||
| 1358 | ret = pdata->pre_init(wm831x); | ||
| 1359 | if (ret != 0) { | ||
| 1360 | dev_err(wm831x->dev, "pre_init() failed: %d\n", ret); | ||
| 1361 | goto err; | ||
| 1362 | } | ||
| 1363 | } | ||
| 1364 | |||
| 1365 | ret = wm831x_irq_init(wm831x, irq); | ||
| 1366 | if (ret != 0) | ||
| 1367 | goto err; | ||
| 1368 | |||
| 1369 | /* The core device is up, instantiate the subdevices. */ | ||
| 1370 | switch (parent) { | ||
| 1371 | case WM8310: | ||
| 1372 | ret = mfd_add_devices(wm831x->dev, -1, | ||
| 1373 | wm8310_devs, ARRAY_SIZE(wm8310_devs), | ||
| 1374 | NULL, 0); | ||
| 1375 | break; | ||
| 1376 | |||
| 1377 | case WM8311: | ||
| 1378 | ret = mfd_add_devices(wm831x->dev, -1, | ||
| 1379 | wm8311_devs, ARRAY_SIZE(wm8311_devs), | ||
| 1380 | NULL, 0); | ||
| 1381 | break; | ||
| 1382 | |||
| 1383 | case WM8312: | ||
| 1384 | ret = mfd_add_devices(wm831x->dev, -1, | ||
| 1385 | wm8312_devs, ARRAY_SIZE(wm8312_devs), | ||
| 1386 | NULL, 0); | ||
| 1387 | break; | ||
| 1388 | |||
| 1389 | default: | ||
| 1390 | /* If this happens the bus probe function is buggy */ | ||
| 1391 | BUG(); | ||
| 1392 | } | ||
| 1393 | |||
| 1394 | if (ret != 0) { | ||
| 1395 | dev_err(wm831x->dev, "Failed to add children\n"); | ||
| 1396 | goto err_irq; | ||
| 1397 | } | ||
| 1398 | |||
| 1399 | if (pdata && pdata->backlight) { | ||
| 1400 | /* Treat errors as non-critical */ | ||
| 1401 | ret = mfd_add_devices(wm831x->dev, -1, backlight_devs, | ||
| 1402 | ARRAY_SIZE(backlight_devs), NULL, 0); | ||
| 1403 | if (ret < 0) | ||
| 1404 | dev_err(wm831x->dev, "Failed to add backlight: %d\n", | ||
| 1405 | ret); | ||
| 1406 | } | ||
| 1407 | |||
| 1408 | wm831x_otp_init(wm831x); | ||
| 1409 | |||
| 1410 | if (pdata && pdata->post_init) { | ||
| 1411 | ret = pdata->post_init(wm831x); | ||
| 1412 | if (ret != 0) { | ||
| 1413 | dev_err(wm831x->dev, "post_init() failed: %d\n", ret); | ||
| 1414 | goto err_irq; | ||
| 1415 | } | ||
| 1416 | } | ||
| 1417 | |||
| 1418 | return 0; | ||
| 1419 | |||
| 1420 | err_irq: | ||
| 1421 | wm831x_irq_exit(wm831x); | ||
| 1422 | err: | ||
| 1423 | mfd_remove_devices(wm831x->dev); | ||
| 1424 | kfree(wm831x); | ||
| 1425 | return ret; | ||
| 1426 | } | ||
| 1427 | |||
| 1428 | static void wm831x_device_exit(struct wm831x *wm831x) | ||
| 1429 | { | ||
| 1430 | wm831x_otp_exit(wm831x); | ||
| 1431 | mfd_remove_devices(wm831x->dev); | ||
| 1432 | wm831x_irq_exit(wm831x); | ||
| 1433 | kfree(wm831x); | ||
| 1434 | } | ||
| 1435 | |||
| 1436 | static int wm831x_i2c_read_device(struct wm831x *wm831x, unsigned short reg, | ||
| 1437 | int bytes, void *dest) | ||
| 1438 | { | ||
| 1439 | struct i2c_client *i2c = wm831x->control_data; | ||
| 1440 | int ret; | ||
| 1441 | u16 r = cpu_to_be16(reg); | ||
| 1442 | |||
| 1443 | ret = i2c_master_send(i2c, (unsigned char *)&r, 2); | ||
| 1444 | if (ret < 0) | ||
| 1445 | return ret; | ||
| 1446 | if (ret != 2) | ||
| 1447 | return -EIO; | ||
| 1448 | |||
| 1449 | ret = i2c_master_recv(i2c, dest, bytes); | ||
| 1450 | if (ret < 0) | ||
| 1451 | return ret; | ||
| 1452 | if (ret != bytes) | ||
| 1453 | return -EIO; | ||
| 1454 | return 0; | ||
| 1455 | } | ||
| 1456 | |||
| 1457 | /* Currently we allocate the write buffer on the stack; this is OK for | ||
| 1458 | * small writes - if we need to do large writes this will need to be | ||
| 1459 | * revised. | ||
| 1460 | */ | ||
| 1461 | static int wm831x_i2c_write_device(struct wm831x *wm831x, unsigned short reg, | ||
| 1462 | int bytes, void *src) | ||
| 1463 | { | ||
| 1464 | struct i2c_client *i2c = wm831x->control_data; | ||
| 1465 | unsigned char msg[bytes + 2]; | ||
| 1466 | int ret; | ||
| 1467 | |||
| 1468 | reg = cpu_to_be16(reg); | ||
| 1469 | memcpy(&msg[0], ®, 2); | ||
| 1470 | memcpy(&msg[2], src, bytes); | ||
| 1471 | |||
| 1472 | ret = i2c_master_send(i2c, msg, bytes + 2); | ||
| 1473 | if (ret < 0) | ||
| 1474 | return ret; | ||
| 1475 | if (ret < bytes + 2) | ||
| 1476 | return -EIO; | ||
| 1477 | |||
| 1478 | return 0; | ||
| 1479 | } | ||
| 1480 | |||
| 1481 | static int wm831x_i2c_probe(struct i2c_client *i2c, | ||
| 1482 | const struct i2c_device_id *id) | ||
| 1483 | { | ||
| 1484 | struct wm831x *wm831x; | ||
| 1485 | |||
| 1486 | wm831x = kzalloc(sizeof(struct wm831x), GFP_KERNEL); | ||
| 1487 | if (wm831x == NULL) { | ||
| 1488 | kfree(i2c); | ||
| 1489 | return -ENOMEM; | ||
| 1490 | } | ||
| 1491 | |||
| 1492 | i2c_set_clientdata(i2c, wm831x); | ||
| 1493 | wm831x->dev = &i2c->dev; | ||
| 1494 | wm831x->control_data = i2c; | ||
| 1495 | wm831x->read_dev = wm831x_i2c_read_device; | ||
| 1496 | wm831x->write_dev = wm831x_i2c_write_device; | ||
| 1497 | |||
| 1498 | return wm831x_device_init(wm831x, id->driver_data, i2c->irq); | ||
| 1499 | } | ||
| 1500 | |||
| 1501 | static int wm831x_i2c_remove(struct i2c_client *i2c) | ||
| 1502 | { | ||
| 1503 | struct wm831x *wm831x = i2c_get_clientdata(i2c); | ||
| 1504 | |||
| 1505 | wm831x_device_exit(wm831x); | ||
| 1506 | |||
| 1507 | return 0; | ||
| 1508 | } | ||
| 1509 | |||
| 1510 | static const struct i2c_device_id wm831x_i2c_id[] = { | ||
| 1511 | { "wm8310", WM8310 }, | ||
| 1512 | { "wm8311", WM8311 }, | ||
| 1513 | { "wm8312", WM8312 }, | ||
| 1514 | { } | ||
| 1515 | }; | ||
| 1516 | MODULE_DEVICE_TABLE(i2c, wm831x_i2c_id); | ||
| 1517 | |||
| 1518 | |||
| 1519 | static struct i2c_driver wm831x_i2c_driver = { | ||
| 1520 | .driver = { | ||
| 1521 | .name = "wm831x", | ||
| 1522 | .owner = THIS_MODULE, | ||
| 1523 | }, | ||
| 1524 | .probe = wm831x_i2c_probe, | ||
| 1525 | .remove = wm831x_i2c_remove, | ||
| 1526 | .id_table = wm831x_i2c_id, | ||
| 1527 | }; | ||
| 1528 | |||
| 1529 | static int __init wm831x_i2c_init(void) | ||
| 1530 | { | ||
| 1531 | int ret; | ||
| 1532 | |||
| 1533 | ret = i2c_add_driver(&wm831x_i2c_driver); | ||
| 1534 | if (ret != 0) | ||
| 1535 | pr_err("Failed to register wm831x I2C driver: %d\n", ret); | ||
| 1536 | |||
| 1537 | return ret; | ||
| 1538 | } | ||
| 1539 | subsys_initcall(wm831x_i2c_init); | ||
| 1540 | |||
| 1541 | static void __exit wm831x_i2c_exit(void) | ||
| 1542 | { | ||
| 1543 | i2c_del_driver(&wm831x_i2c_driver); | ||
| 1544 | } | ||
| 1545 | module_exit(wm831x_i2c_exit); | ||
| 1546 | |||
| 1547 | MODULE_DESCRIPTION("I2C support for the WM831X AudioPlus PMIC"); | ||
| 1548 | MODULE_LICENSE("GPL"); | ||
| 1549 | MODULE_AUTHOR("Mark Brown"); | ||
diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c new file mode 100644 index 000000000000..d3015dfb9134 --- /dev/null +++ b/drivers/mfd/wm831x-irq.c | |||
| @@ -0,0 +1,559 @@ | |||
| 1 | /* | ||
| 2 | * wm831x-irq.c -- Interrupt controller support for Wolfson WM831x PMICs | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/i2c.h> | ||
| 18 | #include <linux/mfd/core.h> | ||
| 19 | #include <linux/interrupt.h> | ||
| 20 | |||
| 21 | #include <linux/mfd/wm831x/core.h> | ||
| 22 | #include <linux/mfd/wm831x/pdata.h> | ||
| 23 | #include <linux/mfd/wm831x/irq.h> | ||
| 24 | |||
| 25 | #include <linux/delay.h> | ||
| 26 | |||
| 27 | /* | ||
| 28 | * Since generic IRQs don't currently support interrupt controllers on | ||
| 29 | * interrupt driven buses we don't use genirq but instead provide an | ||
| 30 | * interface that looks very much like the standard ones. This leads | ||
| 31 | * to some bodges, including storing interrupt handler information in | ||
| 32 | * the static irq_data table we use to look up the data for individual | ||
| 33 | * interrupts, but hopefully won't last too long. | ||
| 34 | */ | ||
| 35 | |||
| 36 | struct wm831x_irq_data { | ||
| 37 | int primary; | ||
| 38 | int reg; | ||
| 39 | int mask; | ||
| 40 | irq_handler_t handler; | ||
| 41 | void *handler_data; | ||
| 42 | }; | ||
| 43 | |||
| 44 | static struct wm831x_irq_data wm831x_irqs[] = { | ||
| 45 | [WM831X_IRQ_TEMP_THW] = { | ||
| 46 | .primary = WM831X_TEMP_INT, | ||
| 47 | .reg = 1, | ||
| 48 | .mask = WM831X_TEMP_THW_EINT, | ||
| 49 | }, | ||
| 50 | [WM831X_IRQ_GPIO_1] = { | ||
| 51 | .primary = WM831X_GP_INT, | ||
| 52 | .reg = 5, | ||
| 53 | .mask = WM831X_GP1_EINT, | ||
| 54 | }, | ||
| 55 | [WM831X_IRQ_GPIO_2] = { | ||
| 56 | .primary = WM831X_GP_INT, | ||
| 57 | .reg = 5, | ||
| 58 | .mask = WM831X_GP2_EINT, | ||
| 59 | }, | ||
| 60 | [WM831X_IRQ_GPIO_3] = { | ||
| 61 | .primary = WM831X_GP_INT, | ||
| 62 | .reg = 5, | ||
| 63 | .mask = WM831X_GP3_EINT, | ||
| 64 | }, | ||
| 65 | [WM831X_IRQ_GPIO_4] = { | ||
| 66 | .primary = WM831X_GP_INT, | ||
| 67 | .reg = 5, | ||
| 68 | .mask = WM831X_GP4_EINT, | ||
| 69 | }, | ||
| 70 | [WM831X_IRQ_GPIO_5] = { | ||
| 71 | .primary = WM831X_GP_INT, | ||
| 72 | .reg = 5, | ||
| 73 | .mask = WM831X_GP5_EINT, | ||
| 74 | }, | ||
| 75 | [WM831X_IRQ_GPIO_6] = { | ||
| 76 | .primary = WM831X_GP_INT, | ||
| 77 | .reg = 5, | ||
| 78 | .mask = WM831X_GP6_EINT, | ||
| 79 | }, | ||
| 80 | [WM831X_IRQ_GPIO_7] = { | ||
| 81 | .primary = WM831X_GP_INT, | ||
| 82 | .reg = 5, | ||
| 83 | .mask = WM831X_GP7_EINT, | ||
| 84 | }, | ||
| 85 | [WM831X_IRQ_GPIO_8] = { | ||
| 86 | .primary = WM831X_GP_INT, | ||
| 87 | .reg = 5, | ||
| 88 | .mask = WM831X_GP8_EINT, | ||
| 89 | }, | ||
| 90 | [WM831X_IRQ_GPIO_9] = { | ||
| 91 | .primary = WM831X_GP_INT, | ||
| 92 | .reg = 5, | ||
| 93 | .mask = WM831X_GP9_EINT, | ||
| 94 | }, | ||
| 95 | [WM831X_IRQ_GPIO_10] = { | ||
| 96 | .primary = WM831X_GP_INT, | ||
| 97 | .reg = 5, | ||
| 98 | .mask = WM831X_GP10_EINT, | ||
| 99 | }, | ||
| 100 | [WM831X_IRQ_GPIO_11] = { | ||
| 101 | .primary = WM831X_GP_INT, | ||
| 102 | .reg = 5, | ||
| 103 | .mask = WM831X_GP11_EINT, | ||
| 104 | }, | ||
| 105 | [WM831X_IRQ_GPIO_12] = { | ||
| 106 | .primary = WM831X_GP_INT, | ||
| 107 | .reg = 5, | ||
| 108 | .mask = WM831X_GP12_EINT, | ||
| 109 | }, | ||
| 110 | [WM831X_IRQ_GPIO_13] = { | ||
| 111 | .primary = WM831X_GP_INT, | ||
| 112 | .reg = 5, | ||
| 113 | .mask = WM831X_GP13_EINT, | ||
| 114 | }, | ||
| 115 | [WM831X_IRQ_GPIO_14] = { | ||
| 116 | .primary = WM831X_GP_INT, | ||
| 117 | .reg = 5, | ||
| 118 | .mask = WM831X_GP14_EINT, | ||
| 119 | }, | ||
| 120 | [WM831X_IRQ_GPIO_15] = { | ||
| 121 | .primary = WM831X_GP_INT, | ||
| 122 | .reg = 5, | ||
| 123 | .mask = WM831X_GP15_EINT, | ||
| 124 | }, | ||
| 125 | [WM831X_IRQ_GPIO_16] = { | ||
| 126 | .primary = WM831X_GP_INT, | ||
| 127 | .reg = 5, | ||
| 128 | .mask = WM831X_GP16_EINT, | ||
| 129 | }, | ||
| 130 | [WM831X_IRQ_ON] = { | ||
| 131 | .primary = WM831X_ON_PIN_INT, | ||
| 132 | .reg = 1, | ||
| 133 | .mask = WM831X_ON_PIN_EINT, | ||
| 134 | }, | ||
| 135 | [WM831X_IRQ_PPM_SYSLO] = { | ||
| 136 | .primary = WM831X_PPM_INT, | ||
| 137 | .reg = 1, | ||
| 138 | .mask = WM831X_PPM_SYSLO_EINT, | ||
| 139 | }, | ||
| 140 | [WM831X_IRQ_PPM_PWR_SRC] = { | ||
| 141 | .primary = WM831X_PPM_INT, | ||
| 142 | .reg = 1, | ||
| 143 | .mask = WM831X_PPM_PWR_SRC_EINT, | ||
| 144 | }, | ||
| 145 | [WM831X_IRQ_PPM_USB_CURR] = { | ||
| 146 | .primary = WM831X_PPM_INT, | ||
| 147 | .reg = 1, | ||
| 148 | .mask = WM831X_PPM_USB_CURR_EINT, | ||
| 149 | }, | ||
| 150 | [WM831X_IRQ_WDOG_TO] = { | ||
| 151 | .primary = WM831X_WDOG_INT, | ||
| 152 | .reg = 1, | ||
| 153 | .mask = WM831X_WDOG_TO_EINT, | ||
| 154 | }, | ||
| 155 | [WM831X_IRQ_RTC_PER] = { | ||
| 156 | .primary = WM831X_RTC_INT, | ||
| 157 | .reg = 1, | ||
| 158 | .mask = WM831X_RTC_PER_EINT, | ||
| 159 | }, | ||
| 160 | [WM831X_IRQ_RTC_ALM] = { | ||
| 161 | .primary = WM831X_RTC_INT, | ||
| 162 | .reg = 1, | ||
| 163 | .mask = WM831X_RTC_ALM_EINT, | ||
| 164 | }, | ||
| 165 | [WM831X_IRQ_CHG_BATT_HOT] = { | ||
| 166 | .primary = WM831X_CHG_INT, | ||
| 167 | .reg = 2, | ||
| 168 | .mask = WM831X_CHG_BATT_HOT_EINT, | ||
| 169 | }, | ||
| 170 | [WM831X_IRQ_CHG_BATT_COLD] = { | ||
| 171 | .primary = WM831X_CHG_INT, | ||
| 172 | .reg = 2, | ||
| 173 | .mask = WM831X_CHG_BATT_COLD_EINT, | ||
| 174 | }, | ||
| 175 | [WM831X_IRQ_CHG_BATT_FAIL] = { | ||
| 176 | .primary = WM831X_CHG_INT, | ||
| 177 | .reg = 2, | ||
| 178 | .mask = WM831X_CHG_BATT_FAIL_EINT, | ||
| 179 | }, | ||
| 180 | [WM831X_IRQ_CHG_OV] = { | ||
| 181 | .primary = WM831X_CHG_INT, | ||
| 182 | .reg = 2, | ||
| 183 | .mask = WM831X_CHG_OV_EINT, | ||
| 184 | }, | ||
| 185 | [WM831X_IRQ_CHG_END] = { | ||
| 186 | .primary = WM831X_CHG_INT, | ||
| 187 | .reg = 2, | ||
| 188 | .mask = WM831X_CHG_END_EINT, | ||
| 189 | }, | ||
| 190 | [WM831X_IRQ_CHG_TO] = { | ||
| 191 | .primary = WM831X_CHG_INT, | ||
| 192 | .reg = 2, | ||
| 193 | .mask = WM831X_CHG_TO_EINT, | ||
| 194 | }, | ||
| 195 | [WM831X_IRQ_CHG_MODE] = { | ||
| 196 | .primary = WM831X_CHG_INT, | ||
| 197 | .reg = 2, | ||
| 198 | .mask = WM831X_CHG_MODE_EINT, | ||
| 199 | }, | ||
| 200 | [WM831X_IRQ_CHG_START] = { | ||
| 201 | .primary = WM831X_CHG_INT, | ||
| 202 | .reg = 2, | ||
| 203 | .mask = WM831X_CHG_START_EINT, | ||
| 204 | }, | ||
| 205 | [WM831X_IRQ_TCHDATA] = { | ||
| 206 | .primary = WM831X_TCHDATA_INT, | ||
| 207 | .reg = 1, | ||
| 208 | .mask = WM831X_TCHDATA_EINT, | ||
| 209 | }, | ||
| 210 | [WM831X_IRQ_TCHPD] = { | ||
| 211 | .primary = WM831X_TCHPD_INT, | ||
| 212 | .reg = 1, | ||
| 213 | .mask = WM831X_TCHPD_EINT, | ||
| 214 | }, | ||
| 215 | [WM831X_IRQ_AUXADC_DATA] = { | ||
| 216 | .primary = WM831X_AUXADC_INT, | ||
| 217 | .reg = 1, | ||
| 218 | .mask = WM831X_AUXADC_DATA_EINT, | ||
| 219 | }, | ||
| 220 | [WM831X_IRQ_AUXADC_DCOMP1] = { | ||
| 221 | .primary = WM831X_AUXADC_INT, | ||
| 222 | .reg = 1, | ||
| 223 | .mask = WM831X_AUXADC_DCOMP1_EINT, | ||
| 224 | }, | ||
| 225 | [WM831X_IRQ_AUXADC_DCOMP2] = { | ||
| 226 | .primary = WM831X_AUXADC_INT, | ||
| 227 | .reg = 1, | ||
| 228 | .mask = WM831X_AUXADC_DCOMP2_EINT, | ||
| 229 | }, | ||
| 230 | [WM831X_IRQ_AUXADC_DCOMP3] = { | ||
| 231 | .primary = WM831X_AUXADC_INT, | ||
| 232 | .reg = 1, | ||
| 233 | .mask = WM831X_AUXADC_DCOMP3_EINT, | ||
| 234 | }, | ||
| 235 | [WM831X_IRQ_AUXADC_DCOMP4] = { | ||
| 236 | .primary = WM831X_AUXADC_INT, | ||
| 237 | .reg = 1, | ||
| 238 | .mask = WM831X_AUXADC_DCOMP4_EINT, | ||
| 239 | }, | ||
| 240 | [WM831X_IRQ_CS1] = { | ||
| 241 | .primary = WM831X_CS_INT, | ||
| 242 | .reg = 2, | ||
| 243 | .mask = WM831X_CS1_EINT, | ||
| 244 | }, | ||
| 245 | [WM831X_IRQ_CS2] = { | ||
| 246 | .primary = WM831X_CS_INT, | ||
| 247 | .reg = 2, | ||
| 248 | .mask = WM831X_CS2_EINT, | ||
| 249 | }, | ||
| 250 | [WM831X_IRQ_HC_DC1] = { | ||
| 251 | .primary = WM831X_HC_INT, | ||
| 252 | .reg = 4, | ||
| 253 | .mask = WM831X_HC_DC1_EINT, | ||
| 254 | }, | ||
| 255 | [WM831X_IRQ_HC_DC2] = { | ||
| 256 | .primary = WM831X_HC_INT, | ||
| 257 | .reg = 4, | ||
| 258 | .mask = WM831X_HC_DC2_EINT, | ||
| 259 | }, | ||
| 260 | [WM831X_IRQ_UV_LDO1] = { | ||
| 261 | .primary = WM831X_UV_INT, | ||
| 262 | .reg = 3, | ||
| 263 | .mask = WM831X_UV_LDO1_EINT, | ||
| 264 | }, | ||
| 265 | [WM831X_IRQ_UV_LDO2] = { | ||
| 266 | .primary = WM831X_UV_INT, | ||
| 267 | .reg = 3, | ||
| 268 | .mask = WM831X_UV_LDO2_EINT, | ||
| 269 | }, | ||
| 270 | [WM831X_IRQ_UV_LDO3] = { | ||
| 271 | .primary = WM831X_UV_INT, | ||
| 272 | .reg = 3, | ||
| 273 | .mask = WM831X_UV_LDO3_EINT, | ||
| 274 | }, | ||
| 275 | [WM831X_IRQ_UV_LDO4] = { | ||
| 276 | .primary = WM831X_UV_INT, | ||
| 277 | .reg = 3, | ||
| 278 | .mask = WM831X_UV_LDO4_EINT, | ||
| 279 | }, | ||
| 280 | [WM831X_IRQ_UV_LDO5] = { | ||
| 281 | .primary = WM831X_UV_INT, | ||
| 282 | .reg = 3, | ||
| 283 | .mask = WM831X_UV_LDO5_EINT, | ||
| 284 | }, | ||
| 285 | [WM831X_IRQ_UV_LDO6] = { | ||
| 286 | .primary = WM831X_UV_INT, | ||
| 287 | .reg = 3, | ||
| 288 | .mask = WM831X_UV_LDO6_EINT, | ||
| 289 | }, | ||
| 290 | [WM831X_IRQ_UV_LDO7] = { | ||
| 291 | .primary = WM831X_UV_INT, | ||
| 292 | .reg = 3, | ||
| 293 | .mask = WM831X_UV_LDO7_EINT, | ||
| 294 | }, | ||
| 295 | [WM831X_IRQ_UV_LDO8] = { | ||
| 296 | .primary = WM831X_UV_INT, | ||
| 297 | .reg = 3, | ||
| 298 | .mask = WM831X_UV_LDO8_EINT, | ||
| 299 | }, | ||
| 300 | [WM831X_IRQ_UV_LDO9] = { | ||
| 301 | .primary = WM831X_UV_INT, | ||
| 302 | .reg = 3, | ||
| 303 | .mask = WM831X_UV_LDO9_EINT, | ||
| 304 | }, | ||
| 305 | [WM831X_IRQ_UV_LDO10] = { | ||
| 306 | .primary = WM831X_UV_INT, | ||
| 307 | .reg = 3, | ||
| 308 | .mask = WM831X_UV_LDO10_EINT, | ||
| 309 | }, | ||
| 310 | [WM831X_IRQ_UV_DC1] = { | ||
| 311 | .primary = WM831X_UV_INT, | ||
| 312 | .reg = 4, | ||
| 313 | .mask = WM831X_UV_DC1_EINT, | ||
| 314 | }, | ||
| 315 | [WM831X_IRQ_UV_DC2] = { | ||
| 316 | .primary = WM831X_UV_INT, | ||
| 317 | .reg = 4, | ||
| 318 | .mask = WM831X_UV_DC2_EINT, | ||
| 319 | }, | ||
| 320 | [WM831X_IRQ_UV_DC3] = { | ||
| 321 | .primary = WM831X_UV_INT, | ||
| 322 | .reg = 4, | ||
| 323 | .mask = WM831X_UV_DC3_EINT, | ||
| 324 | }, | ||
| 325 | [WM831X_IRQ_UV_DC4] = { | ||
| 326 | .primary = WM831X_UV_INT, | ||
| 327 | .reg = 4, | ||
| 328 | .mask = WM831X_UV_DC4_EINT, | ||
| 329 | }, | ||
| 330 | }; | ||
| 331 | |||
| 332 | static inline int irq_data_to_status_reg(struct wm831x_irq_data *irq_data) | ||
| 333 | { | ||
| 334 | return WM831X_INTERRUPT_STATUS_1 - 1 + irq_data->reg; | ||
| 335 | } | ||
| 336 | |||
| 337 | static inline int irq_data_to_mask_reg(struct wm831x_irq_data *irq_data) | ||
| 338 | { | ||
| 339 | return WM831X_INTERRUPT_STATUS_1_MASK - 1 + irq_data->reg; | ||
| 340 | } | ||
| 341 | |||
| 342 | static void __wm831x_enable_irq(struct wm831x *wm831x, int irq) | ||
| 343 | { | ||
| 344 | struct wm831x_irq_data *irq_data = &wm831x_irqs[irq]; | ||
| 345 | |||
| 346 | wm831x->irq_masks[irq_data->reg - 1] &= ~irq_data->mask; | ||
| 347 | wm831x_reg_write(wm831x, irq_data_to_mask_reg(irq_data), | ||
| 348 | wm831x->irq_masks[irq_data->reg - 1]); | ||
| 349 | } | ||
| 350 | |||
| 351 | void wm831x_enable_irq(struct wm831x *wm831x, int irq) | ||
| 352 | { | ||
| 353 | mutex_lock(&wm831x->irq_lock); | ||
| 354 | __wm831x_enable_irq(wm831x, irq); | ||
| 355 | mutex_unlock(&wm831x->irq_lock); | ||
| 356 | } | ||
| 357 | EXPORT_SYMBOL_GPL(wm831x_enable_irq); | ||
| 358 | |||
| 359 | static void __wm831x_disable_irq(struct wm831x *wm831x, int irq) | ||
| 360 | { | ||
| 361 | struct wm831x_irq_data *irq_data = &wm831x_irqs[irq]; | ||
| 362 | |||
| 363 | wm831x->irq_masks[irq_data->reg - 1] |= irq_data->mask; | ||
| 364 | wm831x_reg_write(wm831x, irq_data_to_mask_reg(irq_data), | ||
| 365 | wm831x->irq_masks[irq_data->reg - 1]); | ||
| 366 | } | ||
| 367 | |||
| 368 | void wm831x_disable_irq(struct wm831x *wm831x, int irq) | ||
| 369 | { | ||
| 370 | mutex_lock(&wm831x->irq_lock); | ||
| 371 | __wm831x_disable_irq(wm831x, irq); | ||
| 372 | mutex_unlock(&wm831x->irq_lock); | ||
| 373 | } | ||
| 374 | EXPORT_SYMBOL_GPL(wm831x_disable_irq); | ||
| 375 | |||
| 376 | int wm831x_request_irq(struct wm831x *wm831x, | ||
| 377 | unsigned int irq, irq_handler_t handler, | ||
| 378 | unsigned long flags, const char *name, | ||
| 379 | void *dev) | ||
| 380 | { | ||
| 381 | int ret = 0; | ||
| 382 | |||
| 383 | if (irq < 0 || irq >= WM831X_NUM_IRQS) | ||
| 384 | return -EINVAL; | ||
| 385 | |||
| 386 | mutex_lock(&wm831x->irq_lock); | ||
| 387 | |||
| 388 | if (wm831x_irqs[irq].handler) { | ||
| 389 | dev_err(wm831x->dev, "Already have handler for IRQ %d\n", irq); | ||
| 390 | ret = -EINVAL; | ||
| 391 | goto out; | ||
| 392 | } | ||
| 393 | |||
| 394 | wm831x_irqs[irq].handler = handler; | ||
| 395 | wm831x_irqs[irq].handler_data = dev; | ||
| 396 | |||
| 397 | __wm831x_enable_irq(wm831x, irq); | ||
| 398 | |||
| 399 | out: | ||
| 400 | mutex_unlock(&wm831x->irq_lock); | ||
| 401 | |||
| 402 | return ret; | ||
| 403 | } | ||
| 404 | EXPORT_SYMBOL_GPL(wm831x_request_irq); | ||
| 405 | |||
| 406 | void wm831x_free_irq(struct wm831x *wm831x, unsigned int irq, void *data) | ||
| 407 | { | ||
| 408 | if (irq < 0 || irq >= WM831X_NUM_IRQS) | ||
| 409 | return; | ||
| 410 | |||
| 411 | mutex_lock(&wm831x->irq_lock); | ||
| 412 | |||
| 413 | wm831x_irqs[irq].handler = NULL; | ||
| 414 | wm831x_irqs[irq].handler_data = NULL; | ||
| 415 | |||
| 416 | __wm831x_disable_irq(wm831x, irq); | ||
| 417 | |||
| 418 | mutex_unlock(&wm831x->irq_lock); | ||
| 419 | } | ||
| 420 | EXPORT_SYMBOL_GPL(wm831x_free_irq); | ||
| 421 | |||
| 422 | |||
| 423 | static void wm831x_handle_irq(struct wm831x *wm831x, int irq, int status) | ||
| 424 | { | ||
| 425 | struct wm831x_irq_data *irq_data = &wm831x_irqs[irq]; | ||
| 426 | |||
| 427 | if (irq_data->handler) { | ||
| 428 | irq_data->handler(irq, irq_data->handler_data); | ||
| 429 | wm831x_reg_write(wm831x, irq_data_to_status_reg(irq_data), | ||
| 430 | irq_data->mask); | ||
| 431 | } else { | ||
| 432 | dev_err(wm831x->dev, "Unhandled IRQ %d, masking\n", irq); | ||
| 433 | __wm831x_disable_irq(wm831x, irq); | ||
| 434 | } | ||
| 435 | } | ||
| 436 | |||
| 437 | /* Main interrupt handling occurs in a workqueue since we need | ||
| 438 | * interrupts enabled to interact with the chip. */ | ||
| 439 | static void wm831x_irq_worker(struct work_struct *work) | ||
| 440 | { | ||
| 441 | struct wm831x *wm831x = container_of(work, struct wm831x, irq_work); | ||
| 442 | unsigned int i; | ||
| 443 | int primary; | ||
| 444 | int status_regs[5]; | ||
| 445 | int read[5] = { 0 }; | ||
| 446 | int *status; | ||
| 447 | |||
| 448 | primary = wm831x_reg_read(wm831x, WM831X_SYSTEM_INTERRUPTS); | ||
| 449 | if (primary < 0) { | ||
| 450 | dev_err(wm831x->dev, "Failed to read system interrupt: %d\n", | ||
| 451 | primary); | ||
| 452 | goto out; | ||
| 453 | } | ||
| 454 | |||
| 455 | mutex_lock(&wm831x->irq_lock); | ||
| 456 | |||
| 457 | for (i = 0; i < ARRAY_SIZE(wm831x_irqs); i++) { | ||
| 458 | int offset = wm831x_irqs[i].reg - 1; | ||
| 459 | |||
| 460 | if (!(primary & wm831x_irqs[i].primary)) | ||
| 461 | continue; | ||
| 462 | |||
| 463 | status = &status_regs[offset]; | ||
| 464 | |||
| 465 | /* Hopefully there should only be one register to read | ||
| 466 | * each time otherwise we ought to do a block read. */ | ||
| 467 | if (!read[offset]) { | ||
| 468 | *status = wm831x_reg_read(wm831x, | ||
| 469 | irq_data_to_status_reg(&wm831x_irqs[i])); | ||
| 470 | if (*status < 0) { | ||
| 471 | dev_err(wm831x->dev, | ||
| 472 | "Failed to read IRQ status: %d\n", | ||
| 473 | *status); | ||
| 474 | goto out_lock; | ||
| 475 | } | ||
| 476 | |||
| 477 | /* Mask out the disabled IRQs */ | ||
| 478 | *status &= ~wm831x->irq_masks[offset]; | ||
| 479 | read[offset] = 1; | ||
| 480 | } | ||
| 481 | |||
| 482 | if (*status & wm831x_irqs[i].mask) | ||
| 483 | wm831x_handle_irq(wm831x, i, *status); | ||
| 484 | } | ||
| 485 | |||
| 486 | out_lock: | ||
| 487 | mutex_unlock(&wm831x->irq_lock); | ||
| 488 | out: | ||
| 489 | enable_irq(wm831x->irq); | ||
| 490 | } | ||
| 491 | |||
| 492 | |||
| 493 | static irqreturn_t wm831x_cpu_irq(int irq, void *data) | ||
| 494 | { | ||
| 495 | struct wm831x *wm831x = data; | ||
| 496 | |||
| 497 | /* Shut the interrupt to the CPU up and schedule the actual | ||
| 498 | * handler; we can't check that the IRQ is asserted. */ | ||
| 499 | disable_irq_nosync(irq); | ||
| 500 | |||
| 501 | queue_work(wm831x->irq_wq, &wm831x->irq_work); | ||
| 502 | |||
| 503 | return IRQ_HANDLED; | ||
| 504 | } | ||
| 505 | |||
| 506 | int wm831x_irq_init(struct wm831x *wm831x, int irq) | ||
| 507 | { | ||
| 508 | int i, ret; | ||
| 509 | |||
| 510 | if (!irq) { | ||
| 511 | dev_warn(wm831x->dev, | ||
| 512 | "No interrupt specified - functionality limited\n"); | ||
| 513 | return 0; | ||
| 514 | } | ||
| 515 | |||
| 516 | |||
| 517 | wm831x->irq_wq = create_singlethread_workqueue("wm831x-irq"); | ||
| 518 | if (!wm831x->irq_wq) { | ||
| 519 | dev_err(wm831x->dev, "Failed to allocate IRQ worker\n"); | ||
| 520 | return -ESRCH; | ||
| 521 | } | ||
| 522 | |||
| 523 | wm831x->irq = irq; | ||
| 524 | mutex_init(&wm831x->irq_lock); | ||
| 525 | INIT_WORK(&wm831x->irq_work, wm831x_irq_worker); | ||
| 526 | |||
| 527 | /* Mask the individual interrupt sources */ | ||
| 528 | for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks); i++) { | ||
| 529 | wm831x->irq_masks[i] = 0xffff; | ||
| 530 | wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_1_MASK + i, | ||
| 531 | 0xffff); | ||
| 532 | } | ||
| 533 | |||
| 534 | /* Enable top level interrupts, we mask at secondary level */ | ||
| 535 | wm831x_reg_write(wm831x, WM831X_SYSTEM_INTERRUPTS_MASK, 0); | ||
| 536 | |||
| 537 | /* We're good to go. We set IRQF_SHARED since there's a | ||
| 538 | * chance the driver will interoperate with another driver but | ||
| 539 | * the need to disable the IRQ while handing via I2C/SPI means | ||
| 540 | * that this may break and performance will be impacted. If | ||
| 541 | * this does happen it's a hardware design issue and the only | ||
| 542 | * other alternative would be polling. | ||
| 543 | */ | ||
| 544 | ret = request_irq(irq, wm831x_cpu_irq, IRQF_TRIGGER_LOW | IRQF_SHARED, | ||
| 545 | "wm831x", wm831x); | ||
| 546 | if (ret != 0) { | ||
| 547 | dev_err(wm831x->dev, "Failed to request IRQ %d: %d\n", | ||
| 548 | irq, ret); | ||
| 549 | return ret; | ||
| 550 | } | ||
| 551 | |||
| 552 | return 0; | ||
| 553 | } | ||
| 554 | |||
| 555 | void wm831x_irq_exit(struct wm831x *wm831x) | ||
| 556 | { | ||
| 557 | if (wm831x->irq) | ||
| 558 | free_irq(wm831x->irq, wm831x); | ||
| 559 | } | ||
diff --git a/drivers/mfd/wm831x-otp.c b/drivers/mfd/wm831x-otp.c new file mode 100644 index 000000000000..f742745ff354 --- /dev/null +++ b/drivers/mfd/wm831x-otp.c | |||
| @@ -0,0 +1,83 @@ | |||
| 1 | /* | ||
| 2 | * wm831x-otp.c -- OTP for Wolfson WM831x PMICs | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/i2c.h> | ||
| 18 | #include <linux/bcd.h> | ||
| 19 | #include <linux/delay.h> | ||
| 20 | #include <linux/mfd/core.h> | ||
| 21 | |||
| 22 | #include <linux/mfd/wm831x/core.h> | ||
| 23 | #include <linux/mfd/wm831x/otp.h> | ||
| 24 | |||
| 25 | /* In bytes */ | ||
| 26 | #define WM831X_UNIQUE_ID_LEN 16 | ||
| 27 | |||
| 28 | /* Read the unique ID from the chip into id */ | ||
| 29 | static int wm831x_unique_id_read(struct wm831x *wm831x, char *id) | ||
| 30 | { | ||
| 31 | int i, val; | ||
| 32 | |||
| 33 | for (i = 0; i < WM831X_UNIQUE_ID_LEN / 2; i++) { | ||
| 34 | val = wm831x_reg_read(wm831x, WM831X_UNIQUE_ID_1 + i); | ||
| 35 | if (val < 0) | ||
| 36 | return val; | ||
| 37 | |||
| 38 | id[i * 2] = (val >> 8) & 0xff; | ||
| 39 | id[(i * 2) + 1] = val & 0xff; | ||
| 40 | } | ||
| 41 | |||
| 42 | return 0; | ||
| 43 | } | ||
| 44 | |||
| 45 | static ssize_t wm831x_unique_id_show(struct device *dev, | ||
| 46 | struct device_attribute *attr, char *buf) | ||
| 47 | { | ||
| 48 | struct wm831x *wm831x = dev_get_drvdata(dev); | ||
| 49 | int i, rval; | ||
| 50 | char id[WM831X_UNIQUE_ID_LEN]; | ||
| 51 | ssize_t ret = 0; | ||
| 52 | |||
| 53 | rval = wm831x_unique_id_read(wm831x, id); | ||
| 54 | if (rval < 0) | ||
| 55 | return 0; | ||
| 56 | |||
| 57 | for (i = 0; i < WM831X_UNIQUE_ID_LEN; i++) | ||
| 58 | ret += sprintf(&buf[ret], "%02x", buf[i]); | ||
| 59 | |||
| 60 | ret += sprintf(&buf[ret], "\n"); | ||
| 61 | |||
| 62 | return ret; | ||
| 63 | } | ||
| 64 | |||
| 65 | static DEVICE_ATTR(unique_id, 0444, wm831x_unique_id_show, NULL); | ||
| 66 | |||
| 67 | int wm831x_otp_init(struct wm831x *wm831x) | ||
| 68 | { | ||
| 69 | int ret; | ||
| 70 | |||
| 71 | ret = device_create_file(wm831x->dev, &dev_attr_unique_id); | ||
| 72 | if (ret != 0) | ||
| 73 | dev_err(wm831x->dev, "Unique ID attribute not created: %d\n", | ||
| 74 | ret); | ||
| 75 | |||
| 76 | return ret; | ||
| 77 | } | ||
| 78 | |||
| 79 | void wm831x_otp_exit(struct wm831x *wm831x) | ||
| 80 | { | ||
| 81 | device_remove_file(wm831x->dev, &dev_attr_unique_id); | ||
| 82 | } | ||
| 83 | |||
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c index fe24079387c5..ba27c9dc1ad3 100644 --- a/drivers/mfd/wm8350-core.c +++ b/drivers/mfd/wm8350-core.c | |||
| @@ -353,15 +353,15 @@ static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq) | |||
| 353 | } | 353 | } |
| 354 | 354 | ||
| 355 | /* | 355 | /* |
| 356 | * wm8350_irq_worker actually handles the interrupts. Since all | 356 | * This is a threaded IRQ handler so can access I2C/SPI. Since all |
| 357 | * interrupts are clear on read the IRQ line will be reasserted and | 357 | * interrupts are clear on read the IRQ line will be reasserted and |
| 358 | * the physical IRQ will be handled again if another interrupt is | 358 | * the physical IRQ will be handled again if another interrupt is |
| 359 | * asserted while we run - in the normal course of events this is a | 359 | * asserted while we run - in the normal course of events this is a |
| 360 | * rare occurrence so we save I2C/SPI reads. | 360 | * rare occurrence so we save I2C/SPI reads. |
| 361 | */ | 361 | */ |
| 362 | static void wm8350_irq_worker(struct work_struct *work) | 362 | static irqreturn_t wm8350_irq(int irq, void *data) |
| 363 | { | 363 | { |
| 364 | struct wm8350 *wm8350 = container_of(work, struct wm8350, irq_work); | 364 | struct wm8350 *wm8350 = data; |
| 365 | u16 level_one, status1, status2, comp; | 365 | u16 level_one, status1, status2, comp; |
| 366 | 366 | ||
| 367 | /* TODO: Use block reads to improve performance? */ | 367 | /* TODO: Use block reads to improve performance? */ |
| @@ -552,16 +552,6 @@ static void wm8350_irq_worker(struct work_struct *work) | |||
| 552 | } | 552 | } |
| 553 | } | 553 | } |
| 554 | 554 | ||
| 555 | enable_irq(wm8350->chip_irq); | ||
| 556 | } | ||
| 557 | |||
| 558 | static irqreturn_t wm8350_irq(int irq, void *data) | ||
| 559 | { | ||
| 560 | struct wm8350 *wm8350 = data; | ||
| 561 | |||
| 562 | disable_irq_nosync(irq); | ||
| 563 | schedule_work(&wm8350->irq_work); | ||
| 564 | |||
| 565 | return IRQ_HANDLED; | 555 | return IRQ_HANDLED; |
| 566 | } | 556 | } |
| 567 | 557 | ||
| @@ -1428,9 +1418,8 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq, | |||
| 1428 | 1418 | ||
| 1429 | mutex_init(&wm8350->auxadc_mutex); | 1419 | mutex_init(&wm8350->auxadc_mutex); |
| 1430 | mutex_init(&wm8350->irq_mutex); | 1420 | mutex_init(&wm8350->irq_mutex); |
| 1431 | INIT_WORK(&wm8350->irq_work, wm8350_irq_worker); | ||
| 1432 | if (irq) { | 1421 | if (irq) { |
| 1433 | int flags = 0; | 1422 | int flags = IRQF_ONESHOT; |
| 1434 | 1423 | ||
| 1435 | if (pdata && pdata->irq_high) { | 1424 | if (pdata && pdata->irq_high) { |
| 1436 | flags |= IRQF_TRIGGER_HIGH; | 1425 | flags |= IRQF_TRIGGER_HIGH; |
| @@ -1444,8 +1433,8 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq, | |||
| 1444 | WM8350_IRQ_POL); | 1433 | WM8350_IRQ_POL); |
| 1445 | } | 1434 | } |
| 1446 | 1435 | ||
| 1447 | ret = request_irq(irq, wm8350_irq, flags, | 1436 | ret = request_threaded_irq(irq, NULL, wm8350_irq, flags, |
| 1448 | "wm8350", wm8350); | 1437 | "wm8350", wm8350); |
| 1449 | if (ret != 0) { | 1438 | if (ret != 0) { |
| 1450 | dev_err(wm8350->dev, "Failed to request IRQ: %d\n", | 1439 | dev_err(wm8350->dev, "Failed to request IRQ: %d\n", |
| 1451 | ret); | 1440 | ret); |
| @@ -1472,6 +1461,8 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq, | |||
| 1472 | &(wm8350->codec.pdev)); | 1461 | &(wm8350->codec.pdev)); |
| 1473 | wm8350_client_dev_register(wm8350, "wm8350-gpio", | 1462 | wm8350_client_dev_register(wm8350, "wm8350-gpio", |
| 1474 | &(wm8350->gpio.pdev)); | 1463 | &(wm8350->gpio.pdev)); |
| 1464 | wm8350_client_dev_register(wm8350, "wm8350-hwmon", | ||
| 1465 | &(wm8350->hwmon.pdev)); | ||
| 1475 | wm8350_client_dev_register(wm8350, "wm8350-power", | 1466 | wm8350_client_dev_register(wm8350, "wm8350-power", |
| 1476 | &(wm8350->power.pdev)); | 1467 | &(wm8350->power.pdev)); |
| 1477 | wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev)); | 1468 | wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev)); |
| @@ -1498,11 +1489,11 @@ void wm8350_device_exit(struct wm8350 *wm8350) | |||
| 1498 | platform_device_unregister(wm8350->wdt.pdev); | 1489 | platform_device_unregister(wm8350->wdt.pdev); |
| 1499 | platform_device_unregister(wm8350->rtc.pdev); | 1490 | platform_device_unregister(wm8350->rtc.pdev); |
| 1500 | platform_device_unregister(wm8350->power.pdev); | 1491 | platform_device_unregister(wm8350->power.pdev); |
| 1492 | platform_device_unregister(wm8350->hwmon.pdev); | ||
| 1501 | platform_device_unregister(wm8350->gpio.pdev); | 1493 | platform_device_unregister(wm8350->gpio.pdev); |
| 1502 | platform_device_unregister(wm8350->codec.pdev); | 1494 | platform_device_unregister(wm8350->codec.pdev); |
| 1503 | 1495 | ||
| 1504 | free_irq(wm8350->chip_irq, wm8350); | 1496 | free_irq(wm8350->chip_irq, wm8350); |
| 1505 | flush_work(&wm8350->irq_work); | ||
| 1506 | kfree(wm8350->reg_cache); | 1497 | kfree(wm8350->reg_cache); |
| 1507 | } | 1498 | } |
| 1508 | EXPORT_SYMBOL_GPL(wm8350_device_exit); | 1499 | EXPORT_SYMBOL_GPL(wm8350_device_exit); |
diff --git a/drivers/misc/sgi-xp/xpc_sn2.c b/drivers/misc/sgi-xp/xpc_sn2.c index 915a3b495da5..8b70e03f939f 100644 --- a/drivers/misc/sgi-xp/xpc_sn2.c +++ b/drivers/misc/sgi-xp/xpc_sn2.c | |||
| @@ -279,7 +279,7 @@ xpc_check_for_sent_chctl_flags_sn2(struct xpc_partition *part) | |||
| 279 | spin_unlock_irqrestore(&part->chctl_lock, irq_flags); | 279 | spin_unlock_irqrestore(&part->chctl_lock, irq_flags); |
| 280 | 280 | ||
| 281 | dev_dbg(xpc_chan, "received notify IRQ from partid=%d, chctl.all_flags=" | 281 | dev_dbg(xpc_chan, "received notify IRQ from partid=%d, chctl.all_flags=" |
| 282 | "0x%lx\n", XPC_PARTID(part), chctl.all_flags); | 282 | "0x%llx\n", XPC_PARTID(part), chctl.all_flags); |
| 283 | 283 | ||
| 284 | xpc_wakeup_channel_mgr(part); | 284 | xpc_wakeup_channel_mgr(part); |
| 285 | } | 285 | } |
| @@ -615,7 +615,8 @@ xpc_get_partition_rsvd_page_pa_sn2(void *buf, u64 *cookie, unsigned long *rp_pa, | |||
| 615 | s64 status; | 615 | s64 status; |
| 616 | enum xp_retval ret; | 616 | enum xp_retval ret; |
| 617 | 617 | ||
| 618 | status = sn_partition_reserved_page_pa((u64)buf, cookie, rp_pa, len); | 618 | status = sn_partition_reserved_page_pa((u64)buf, cookie, |
| 619 | (u64 *)rp_pa, (u64 *)len); | ||
| 619 | if (status == SALRET_OK) | 620 | if (status == SALRET_OK) |
| 620 | ret = xpSuccess; | 621 | ret = xpSuccess; |
| 621 | else if (status == SALRET_MORE_PASSES) | 622 | else if (status == SALRET_MORE_PASSES) |
| @@ -777,8 +778,8 @@ xpc_get_remote_heartbeat_sn2(struct xpc_partition *part) | |||
| 777 | if (ret != xpSuccess) | 778 | if (ret != xpSuccess) |
| 778 | return ret; | 779 | return ret; |
| 779 | 780 | ||
| 780 | dev_dbg(xpc_part, "partid=%d, heartbeat=%ld, last_heartbeat=%ld, " | 781 | dev_dbg(xpc_part, "partid=%d, heartbeat=%lld, last_heartbeat=%lld, " |
| 781 | "heartbeat_offline=%ld, HB_mask[0]=0x%lx\n", XPC_PARTID(part), | 782 | "heartbeat_offline=%lld, HB_mask[0]=0x%lx\n", XPC_PARTID(part), |
| 782 | remote_vars->heartbeat, part->last_heartbeat, | 783 | remote_vars->heartbeat, part->last_heartbeat, |
| 783 | remote_vars->heartbeat_offline, | 784 | remote_vars->heartbeat_offline, |
| 784 | remote_vars->heartbeating_to_mask[0]); | 785 | remote_vars->heartbeating_to_mask[0]); |
| @@ -940,7 +941,7 @@ xpc_update_partition_info_sn2(struct xpc_partition *part, u8 remote_rp_version, | |||
| 940 | part_sn2->remote_vars_pa); | 941 | part_sn2->remote_vars_pa); |
| 941 | 942 | ||
| 942 | part->last_heartbeat = remote_vars->heartbeat - 1; | 943 | part->last_heartbeat = remote_vars->heartbeat - 1; |
| 943 | dev_dbg(xpc_part, " last_heartbeat = 0x%016lx\n", | 944 | dev_dbg(xpc_part, " last_heartbeat = 0x%016llx\n", |
| 944 | part->last_heartbeat); | 945 | part->last_heartbeat); |
| 945 | 946 | ||
| 946 | part_sn2->remote_vars_part_pa = remote_vars->vars_part_pa; | 947 | part_sn2->remote_vars_part_pa = remote_vars->vars_part_pa; |
| @@ -1029,7 +1030,8 @@ xpc_identify_activate_IRQ_req_sn2(int nasid) | |||
| 1029 | part->activate_IRQ_rcvd++; | 1030 | part->activate_IRQ_rcvd++; |
| 1030 | 1031 | ||
| 1031 | dev_dbg(xpc_part, "partid for nasid %d is %d; IRQs = %d; HB = " | 1032 | dev_dbg(xpc_part, "partid for nasid %d is %d; IRQs = %d; HB = " |
| 1032 | "%ld:0x%lx\n", (int)nasid, (int)partid, part->activate_IRQ_rcvd, | 1033 | "%lld:0x%lx\n", (int)nasid, (int)partid, |
| 1034 | part->activate_IRQ_rcvd, | ||
| 1033 | remote_vars->heartbeat, remote_vars->heartbeating_to_mask[0]); | 1035 | remote_vars->heartbeat, remote_vars->heartbeating_to_mask[0]); |
| 1034 | 1036 | ||
| 1035 | if (xpc_partition_disengaged(part) && | 1037 | if (xpc_partition_disengaged(part) && |
| @@ -1129,7 +1131,7 @@ xpc_identify_activate_IRQ_sender_sn2(void) | |||
| 1129 | do { | 1131 | do { |
| 1130 | n_IRQs_detected++; | 1132 | n_IRQs_detected++; |
| 1131 | nasid = (l * BITS_PER_LONG + b) * 2; | 1133 | nasid = (l * BITS_PER_LONG + b) * 2; |
| 1132 | dev_dbg(xpc_part, "interrupt from nasid %ld\n", nasid); | 1134 | dev_dbg(xpc_part, "interrupt from nasid %lld\n", nasid); |
| 1133 | xpc_identify_activate_IRQ_req_sn2(nasid); | 1135 | xpc_identify_activate_IRQ_req_sn2(nasid); |
| 1134 | 1136 | ||
| 1135 | b = find_next_bit(&nasid_mask_long, BITS_PER_LONG, | 1137 | b = find_next_bit(&nasid_mask_long, BITS_PER_LONG, |
| @@ -1386,7 +1388,7 @@ xpc_pull_remote_vars_part_sn2(struct xpc_partition *part) | |||
| 1386 | 1388 | ||
| 1387 | if (pulled_entry->magic != 0) { | 1389 | if (pulled_entry->magic != 0) { |
| 1388 | dev_dbg(xpc_chan, "partition %d's XPC vars_part for " | 1390 | dev_dbg(xpc_chan, "partition %d's XPC vars_part for " |
| 1389 | "partition %d has bad magic value (=0x%lx)\n", | 1391 | "partition %d has bad magic value (=0x%llx)\n", |
| 1390 | partid, sn_partition_id, pulled_entry->magic); | 1392 | partid, sn_partition_id, pulled_entry->magic); |
| 1391 | return xpBadMagic; | 1393 | return xpBadMagic; |
| 1392 | } | 1394 | } |
| @@ -1730,14 +1732,14 @@ xpc_notify_senders_sn2(struct xpc_channel *ch, enum xp_retval reason, s64 put) | |||
| 1730 | 1732 | ||
| 1731 | if (notify->func != NULL) { | 1733 | if (notify->func != NULL) { |
| 1732 | dev_dbg(xpc_chan, "notify->func() called, notify=0x%p " | 1734 | dev_dbg(xpc_chan, "notify->func() called, notify=0x%p " |
| 1733 | "msg_number=%ld partid=%d channel=%d\n", | 1735 | "msg_number=%lld partid=%d channel=%d\n", |
| 1734 | (void *)notify, get, ch->partid, ch->number); | 1736 | (void *)notify, get, ch->partid, ch->number); |
| 1735 | 1737 | ||
| 1736 | notify->func(reason, ch->partid, ch->number, | 1738 | notify->func(reason, ch->partid, ch->number, |
| 1737 | notify->key); | 1739 | notify->key); |
| 1738 | 1740 | ||
| 1739 | dev_dbg(xpc_chan, "notify->func() returned, notify=0x%p" | 1741 | dev_dbg(xpc_chan, "notify->func() returned, notify=0x%p" |
| 1740 | " msg_number=%ld partid=%d channel=%d\n", | 1742 | " msg_number=%lld partid=%d channel=%d\n", |
| 1741 | (void *)notify, get, ch->partid, ch->number); | 1743 | (void *)notify, get, ch->partid, ch->number); |
| 1742 | } | 1744 | } |
| 1743 | } | 1745 | } |
| @@ -1858,7 +1860,7 @@ xpc_process_msg_chctl_flags_sn2(struct xpc_partition *part, int ch_number) | |||
| 1858 | 1860 | ||
| 1859 | ch_sn2->w_remote_GP.get = ch_sn2->remote_GP.get; | 1861 | ch_sn2->w_remote_GP.get = ch_sn2->remote_GP.get; |
| 1860 | 1862 | ||
| 1861 | dev_dbg(xpc_chan, "w_remote_GP.get changed to %ld, partid=%d, " | 1863 | dev_dbg(xpc_chan, "w_remote_GP.get changed to %lld, partid=%d, " |
| 1862 | "channel=%d\n", ch_sn2->w_remote_GP.get, ch->partid, | 1864 | "channel=%d\n", ch_sn2->w_remote_GP.get, ch->partid, |
| 1863 | ch->number); | 1865 | ch->number); |
| 1864 | 1866 | ||
| @@ -1885,7 +1887,7 @@ xpc_process_msg_chctl_flags_sn2(struct xpc_partition *part, int ch_number) | |||
| 1885 | smp_wmb(); /* ensure flags have been cleared before bte_copy */ | 1887 | smp_wmb(); /* ensure flags have been cleared before bte_copy */ |
| 1886 | ch_sn2->w_remote_GP.put = ch_sn2->remote_GP.put; | 1888 | ch_sn2->w_remote_GP.put = ch_sn2->remote_GP.put; |
| 1887 | 1889 | ||
| 1888 | dev_dbg(xpc_chan, "w_remote_GP.put changed to %ld, partid=%d, " | 1890 | dev_dbg(xpc_chan, "w_remote_GP.put changed to %lld, partid=%d, " |
| 1889 | "channel=%d\n", ch_sn2->w_remote_GP.put, ch->partid, | 1891 | "channel=%d\n", ch_sn2->w_remote_GP.put, ch->partid, |
| 1890 | ch->number); | 1892 | ch->number); |
| 1891 | 1893 | ||
| @@ -1943,7 +1945,7 @@ xpc_pull_remote_msg_sn2(struct xpc_channel *ch, s64 get) | |||
| 1943 | if (ret != xpSuccess) { | 1945 | if (ret != xpSuccess) { |
| 1944 | 1946 | ||
| 1945 | dev_dbg(xpc_chan, "failed to pull %d msgs starting with" | 1947 | dev_dbg(xpc_chan, "failed to pull %d msgs starting with" |
| 1946 | " msg %ld from partition %d, channel=%d, " | 1948 | " msg %lld from partition %d, channel=%d, " |
| 1947 | "ret=%d\n", nmsgs, ch_sn2->next_msg_to_pull, | 1949 | "ret=%d\n", nmsgs, ch_sn2->next_msg_to_pull, |
| 1948 | ch->partid, ch->number, ret); | 1950 | ch->partid, ch->number, ret); |
| 1949 | 1951 | ||
| @@ -1995,7 +1997,7 @@ xpc_get_deliverable_payload_sn2(struct xpc_channel *ch) | |||
| 1995 | if (cmpxchg(&ch_sn2->w_local_GP.get, get, get + 1) == get) { | 1997 | if (cmpxchg(&ch_sn2->w_local_GP.get, get, get + 1) == get) { |
| 1996 | /* we got the entry referenced by get */ | 1998 | /* we got the entry referenced by get */ |
| 1997 | 1999 | ||
| 1998 | dev_dbg(xpc_chan, "w_local_GP.get changed to %ld, " | 2000 | dev_dbg(xpc_chan, "w_local_GP.get changed to %lld, " |
| 1999 | "partid=%d, channel=%d\n", get + 1, | 2001 | "partid=%d, channel=%d\n", get + 1, |
| 2000 | ch->partid, ch->number); | 2002 | ch->partid, ch->number); |
| 2001 | 2003 | ||
| @@ -2062,7 +2064,7 @@ xpc_send_msgs_sn2(struct xpc_channel *ch, s64 initial_put) | |||
| 2062 | 2064 | ||
| 2063 | /* we just set the new value of local_GP->put */ | 2065 | /* we just set the new value of local_GP->put */ |
| 2064 | 2066 | ||
| 2065 | dev_dbg(xpc_chan, "local_GP->put changed to %ld, partid=%d, " | 2067 | dev_dbg(xpc_chan, "local_GP->put changed to %lld, partid=%d, " |
| 2066 | "channel=%d\n", put, ch->partid, ch->number); | 2068 | "channel=%d\n", put, ch->partid, ch->number); |
| 2067 | 2069 | ||
| 2068 | send_msgrequest = 1; | 2070 | send_msgrequest = 1; |
| @@ -2147,8 +2149,8 @@ xpc_allocate_msg_sn2(struct xpc_channel *ch, u32 flags, | |||
| 2147 | DBUG_ON(msg->flags != 0); | 2149 | DBUG_ON(msg->flags != 0); |
| 2148 | msg->number = put; | 2150 | msg->number = put; |
| 2149 | 2151 | ||
| 2150 | dev_dbg(xpc_chan, "w_local_GP.put changed to %ld; msg=0x%p, " | 2152 | dev_dbg(xpc_chan, "w_local_GP.put changed to %lld; msg=0x%p, " |
| 2151 | "msg_number=%ld, partid=%d, channel=%d\n", put + 1, | 2153 | "msg_number=%lld, partid=%d, channel=%d\n", put + 1, |
| 2152 | (void *)msg, msg->number, ch->partid, ch->number); | 2154 | (void *)msg, msg->number, ch->partid, ch->number); |
| 2153 | 2155 | ||
| 2154 | *address_of_msg = msg; | 2156 | *address_of_msg = msg; |
| @@ -2296,7 +2298,7 @@ xpc_acknowledge_msgs_sn2(struct xpc_channel *ch, s64 initial_get, u8 msg_flags) | |||
| 2296 | 2298 | ||
| 2297 | /* we just set the new value of local_GP->get */ | 2299 | /* we just set the new value of local_GP->get */ |
| 2298 | 2300 | ||
| 2299 | dev_dbg(xpc_chan, "local_GP->get changed to %ld, partid=%d, " | 2301 | dev_dbg(xpc_chan, "local_GP->get changed to %lld, partid=%d, " |
| 2300 | "channel=%d\n", get, ch->partid, ch->number); | 2302 | "channel=%d\n", get, ch->partid, ch->number); |
| 2301 | 2303 | ||
| 2302 | send_msgrequest = (msg_flags & XPC_M_SN2_INTERRUPT); | 2304 | send_msgrequest = (msg_flags & XPC_M_SN2_INTERRUPT); |
| @@ -2323,7 +2325,7 @@ xpc_received_payload_sn2(struct xpc_channel *ch, void *payload) | |||
| 2323 | msg = container_of(payload, struct xpc_msg_sn2, payload); | 2325 | msg = container_of(payload, struct xpc_msg_sn2, payload); |
| 2324 | msg_number = msg->number; | 2326 | msg_number = msg->number; |
| 2325 | 2327 | ||
| 2326 | dev_dbg(xpc_chan, "msg=0x%p, msg_number=%ld, partid=%d, channel=%d\n", | 2328 | dev_dbg(xpc_chan, "msg=0x%p, msg_number=%lld, partid=%d, channel=%d\n", |
| 2327 | (void *)msg, msg_number, ch->partid, ch->number); | 2329 | (void *)msg, msg_number, ch->partid, ch->number); |
| 2328 | 2330 | ||
| 2329 | DBUG_ON((((u64)msg - (u64)ch->sn.sn2.remote_msgqueue) / ch->entry_size) != | 2331 | DBUG_ON((((u64)msg - (u64)ch->sn.sn2.remote_msgqueue) / ch->entry_size) != |
diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c index 782994ead0e8..005b91f096f2 100644 --- a/drivers/mtd/nand/ams-delta.c +++ b/drivers/mtd/nand/ams-delta.c | |||
| @@ -63,7 +63,7 @@ static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) | |||
| 63 | { | 63 | { |
| 64 | struct nand_chip *this = mtd->priv; | 64 | struct nand_chip *this = mtd->priv; |
| 65 | 65 | ||
| 66 | omap_writew(0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); | 66 | omap_writew(0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); |
| 67 | omap_writew(byte, this->IO_ADDR_W); | 67 | omap_writew(byte, this->IO_ADDR_W); |
| 68 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); | 68 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); |
| 69 | ndelay(40); | 69 | ndelay(40); |
| @@ -78,7 +78,7 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd) | |||
| 78 | 78 | ||
| 79 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); | 79 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); |
| 80 | ndelay(40); | 80 | ndelay(40); |
| 81 | omap_writew(~0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); | 81 | omap_writew(~0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); |
| 82 | res = omap_readw(this->IO_ADDR_R); | 82 | res = omap_readw(this->IO_ADDR_R); |
| 83 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, | 83 | ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, |
| 84 | AMS_DELTA_LATCH2_NAND_NRE); | 84 | AMS_DELTA_LATCH2_NAND_NRE); |
| @@ -178,8 +178,8 @@ static int __init ams_delta_init(void) | |||
| 178 | ams_delta_mtd->priv = this; | 178 | ams_delta_mtd->priv = this; |
| 179 | 179 | ||
| 180 | /* Set address of NAND IO lines */ | 180 | /* Set address of NAND IO lines */ |
| 181 | this->IO_ADDR_R = (OMAP_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH); | 181 | this->IO_ADDR_R = (OMAP1_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH); |
| 182 | this->IO_ADDR_W = (OMAP_MPUIO_BASE + OMAP_MPUIO_OUTPUT); | 182 | this->IO_ADDR_W = (OMAP1_MPUIO_BASE + OMAP_MPUIO_OUTPUT); |
| 183 | this->read_byte = ams_delta_read_byte; | 183 | this->read_byte = ams_delta_read_byte; |
| 184 | this->write_buf = ams_delta_write_buf; | 184 | this->write_buf = ams_delta_write_buf; |
| 185 | this->read_buf = ams_delta_read_buf; | 185 | this->read_buf = ams_delta_read_buf; |
diff --git a/drivers/net/slip.c b/drivers/net/slip.c index 26f6ee93a064..e17c535a577e 100644 --- a/drivers/net/slip.c +++ b/drivers/net/slip.c | |||
| @@ -616,6 +616,14 @@ static void sl_uninit(struct net_device *dev) | |||
| 616 | sl_free_bufs(sl); | 616 | sl_free_bufs(sl); |
| 617 | } | 617 | } |
| 618 | 618 | ||
| 619 | /* Hook the destructor so we can free slip devices at the right point in time */ | ||
| 620 | static void sl_free_netdev(struct net_device *dev) | ||
| 621 | { | ||
| 622 | int i = dev->base_addr; | ||
| 623 | free_netdev(dev); | ||
| 624 | slip_devs[i] = NULL; | ||
| 625 | } | ||
| 626 | |||
| 619 | static const struct net_device_ops sl_netdev_ops = { | 627 | static const struct net_device_ops sl_netdev_ops = { |
| 620 | .ndo_init = sl_init, | 628 | .ndo_init = sl_init, |
| 621 | .ndo_uninit = sl_uninit, | 629 | .ndo_uninit = sl_uninit, |
| @@ -634,7 +642,7 @@ static const struct net_device_ops sl_netdev_ops = { | |||
| 634 | static void sl_setup(struct net_device *dev) | 642 | static void sl_setup(struct net_device *dev) |
| 635 | { | 643 | { |
| 636 | dev->netdev_ops = &sl_netdev_ops; | 644 | dev->netdev_ops = &sl_netdev_ops; |
| 637 | dev->destructor = free_netdev; | 645 | dev->destructor = sl_free_netdev; |
| 638 | 646 | ||
| 639 | dev->hard_header_len = 0; | 647 | dev->hard_header_len = 0; |
| 640 | dev->addr_len = 0; | 648 | dev->addr_len = 0; |
| @@ -712,8 +720,6 @@ static void sl_sync(void) | |||
| 712 | static struct slip *sl_alloc(dev_t line) | 720 | static struct slip *sl_alloc(dev_t line) |
| 713 | { | 721 | { |
| 714 | int i; | 722 | int i; |
| 715 | int sel = -1; | ||
| 716 | int score = -1; | ||
| 717 | struct net_device *dev = NULL; | 723 | struct net_device *dev = NULL; |
| 718 | struct slip *sl; | 724 | struct slip *sl; |
| 719 | 725 | ||
| @@ -724,55 +730,7 @@ static struct slip *sl_alloc(dev_t line) | |||
| 724 | dev = slip_devs[i]; | 730 | dev = slip_devs[i]; |
| 725 | if (dev == NULL) | 731 | if (dev == NULL) |
| 726 | break; | 732 | break; |
| 727 | |||
| 728 | sl = netdev_priv(dev); | ||
| 729 | if (sl->leased) { | ||
| 730 | if (sl->line != line) | ||
| 731 | continue; | ||
| 732 | if (sl->tty) | ||
| 733 | return NULL; | ||
| 734 | |||
| 735 | /* Clear ESCAPE & ERROR flags */ | ||
| 736 | sl->flags &= (1 << SLF_INUSE); | ||
| 737 | return sl; | ||
| 738 | } | ||
| 739 | |||
| 740 | if (sl->tty) | ||
| 741 | continue; | ||
| 742 | |||
| 743 | if (current->pid == sl->pid) { | ||
| 744 | if (sl->line == line && score < 3) { | ||
| 745 | sel = i; | ||
| 746 | score = 3; | ||
| 747 | continue; | ||
| 748 | } | ||
| 749 | if (score < 2) { | ||
| 750 | sel = i; | ||
| 751 | score = 2; | ||
| 752 | } | ||
| 753 | continue; | ||
| 754 | } | ||
| 755 | if (sl->line == line && score < 1) { | ||
| 756 | sel = i; | ||
| 757 | score = 1; | ||
| 758 | continue; | ||
| 759 | } | ||
| 760 | if (score < 0) { | ||
| 761 | sel = i; | ||
| 762 | score = 0; | ||
| 763 | } | ||
| 764 | } | ||
| 765 | |||
| 766 | if (sel >= 0) { | ||
| 767 | i = sel; | ||
| 768 | dev = slip_devs[i]; | ||
| 769 | if (score > 1) { | ||
| 770 | sl = netdev_priv(dev); | ||
| 771 | sl->flags &= (1 << SLF_INUSE); | ||
| 772 | return sl; | ||
| 773 | } | ||
| 774 | } | 733 | } |
| 775 | |||
| 776 | /* Sorry, too many, all slots in use */ | 734 | /* Sorry, too many, all slots in use */ |
| 777 | if (i >= slip_maxdev) | 735 | if (i >= slip_maxdev) |
| 778 | return NULL; | 736 | return NULL; |
| @@ -909,30 +867,13 @@ err_exit: | |||
| 909 | } | 867 | } |
| 910 | 868 | ||
| 911 | /* | 869 | /* |
| 912 | |||
| 913 | FIXME: 1,2 are fixed 3 was never true anyway. | ||
| 914 | |||
| 915 | Let me to blame a bit. | ||
| 916 | 1. TTY module calls this funstion on soft interrupt. | ||
| 917 | 2. TTY module calls this function WITH MASKED INTERRUPTS! | ||
| 918 | 3. TTY module does not notify us about line discipline | ||
| 919 | shutdown, | ||
| 920 | |||
| 921 | Seems, now it is clean. The solution is to consider netdevice and | ||
| 922 | line discipline sides as two independent threads. | ||
| 923 | |||
| 924 | By-product (not desired): sl? does not feel hangups and remains open. | ||
| 925 | It is supposed, that user level program (dip, diald, slattach...) | ||
| 926 | will catch SIGHUP and make the rest of work. | ||
| 927 | |||
| 928 | I see no way to make more with current tty code. --ANK | ||
| 929 | */ | ||
| 930 | |||
| 931 | /* | ||
| 932 | * Close down a SLIP channel. | 870 | * Close down a SLIP channel. |
| 933 | * This means flushing out any pending queues, and then returning. This | 871 | * This means flushing out any pending queues, and then returning. This |
| 934 | * call is serialized against other ldisc functions. | 872 | * call is serialized against other ldisc functions. |
| 873 | * | ||
| 874 | * We also use this method fo a hangup event | ||
| 935 | */ | 875 | */ |
| 876 | |||
| 936 | static void slip_close(struct tty_struct *tty) | 877 | static void slip_close(struct tty_struct *tty) |
| 937 | { | 878 | { |
| 938 | struct slip *sl = tty->disc_data; | 879 | struct slip *sl = tty->disc_data; |
| @@ -951,10 +892,16 @@ static void slip_close(struct tty_struct *tty) | |||
| 951 | del_timer_sync(&sl->keepalive_timer); | 892 | del_timer_sync(&sl->keepalive_timer); |
| 952 | del_timer_sync(&sl->outfill_timer); | 893 | del_timer_sync(&sl->outfill_timer); |
| 953 | #endif | 894 | #endif |
| 954 | 895 | /* Flush network side */ | |
| 955 | /* Count references from TTY module */ | 896 | unregister_netdev(sl->dev); |
| 897 | /* This will complete via sl_free_netdev */ | ||
| 956 | } | 898 | } |
| 957 | 899 | ||
| 900 | static int slip_hangup(struct tty_struct *tty) | ||
| 901 | { | ||
| 902 | slip_close(tty); | ||
| 903 | return 0; | ||
| 904 | } | ||
| 958 | /************************************************************************ | 905 | /************************************************************************ |
| 959 | * STANDARD SLIP ENCAPSULATION * | 906 | * STANDARD SLIP ENCAPSULATION * |
| 960 | ************************************************************************/ | 907 | ************************************************************************/ |
| @@ -1311,6 +1258,7 @@ static struct tty_ldisc_ops sl_ldisc = { | |||
| 1311 | .name = "slip", | 1258 | .name = "slip", |
| 1312 | .open = slip_open, | 1259 | .open = slip_open, |
| 1313 | .close = slip_close, | 1260 | .close = slip_close, |
| 1261 | .hangup = slip_hangup, | ||
| 1314 | .ioctl = slip_ioctl, | 1262 | .ioctl = slip_ioctl, |
| 1315 | .receive_buf = slip_receive_buf, | 1263 | .receive_buf = slip_receive_buf, |
| 1316 | .write_wakeup = slip_write_wakeup, | 1264 | .write_wakeup = slip_write_wakeup, |
| @@ -1384,6 +1332,8 @@ static void __exit slip_exit(void) | |||
| 1384 | } | 1332 | } |
| 1385 | } while (busy && time_before(jiffies, timeout)); | 1333 | } while (busy && time_before(jiffies, timeout)); |
| 1386 | 1334 | ||
| 1335 | /* FIXME: hangup is async so we should wait when doing this second | ||
| 1336 | phase */ | ||
| 1387 | 1337 | ||
| 1388 | for (i = 0; i < slip_maxdev; i++) { | 1338 | for (i = 0; i < slip_maxdev; i++) { |
| 1389 | dev = slip_devs[i]; | 1339 | dev = slip_devs[i]; |
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 3f5d28851aa2..d3ee1994b02f 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
| @@ -1370,7 +1370,7 @@ static const struct file_operations tun_fops = { | |||
| 1370 | static struct miscdevice tun_miscdev = { | 1370 | static struct miscdevice tun_miscdev = { |
| 1371 | .minor = TUN_MINOR, | 1371 | .minor = TUN_MINOR, |
| 1372 | .name = "tun", | 1372 | .name = "tun", |
| 1373 | .devnode = "net/tun", | 1373 | .nodename = "net/tun", |
| 1374 | .fops = &tun_fops, | 1374 | .fops = &tun_fops, |
| 1375 | }; | 1375 | }; |
| 1376 | 1376 | ||
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index f4317798e47c..2dc42bbf6fe9 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig | |||
| @@ -82,6 +82,13 @@ config REGULATOR_TWL4030 | |||
| 82 | This driver supports the voltage regulators provided by | 82 | This driver supports the voltage regulators provided by |
| 83 | this family of companion chips. | 83 | this family of companion chips. |
| 84 | 84 | ||
| 85 | config REGULATOR_WM831X | ||
| 86 | tristate "Wolfson Microelcronics WM831x PMIC regulators" | ||
| 87 | depends on MFD_WM831X | ||
| 88 | help | ||
| 89 | Support the voltage and current regulators of the WM831x series | ||
| 90 | of PMIC devices. | ||
| 91 | |||
| 85 | config REGULATOR_WM8350 | 92 | config REGULATOR_WM8350 |
| 86 | tristate "Wolfson Microelectroncis WM8350 AudioPlus PMIC" | 93 | tristate "Wolfson Microelectroncis WM8350 AudioPlus PMIC" |
| 87 | depends on MFD_WM8350 | 94 | depends on MFD_WM8350 |
| @@ -117,4 +124,28 @@ config REGULATOR_LP3971 | |||
| 117 | Say Y here to support the voltage regulators and convertors | 124 | Say Y here to support the voltage regulators and convertors |
| 118 | on National Semiconductors LP3971 PMIC | 125 | on National Semiconductors LP3971 PMIC |
| 119 | 126 | ||
| 127 | config REGULATOR_PCAP | ||
| 128 | tristate "PCAP2 regulator driver" | ||
| 129 | depends on EZX_PCAP | ||
| 130 | help | ||
| 131 | This driver provides support for the voltage regulators of the | ||
| 132 | PCAP2 PMIC. | ||
| 133 | |||
| 134 | config REGULATOR_MC13783 | ||
| 135 | tristate "Support regulators on Freescale MC13783 PMIC" | ||
| 136 | depends on MFD_MC13783 | ||
| 137 | help | ||
| 138 | Say y here to support the regulators found on the Freescale MC13783 | ||
| 139 | PMIC. | ||
| 140 | |||
| 141 | config REGULATOR_AB3100 | ||
| 142 | tristate "ST-Ericsson AB3100 Regulator functions" | ||
| 143 | depends on AB3100_CORE | ||
| 144 | default y if AB3100_CORE | ||
| 145 | help | ||
| 146 | These regulators correspond to functionality in the | ||
| 147 | AB3100 analog baseband dealing with power regulators | ||
| 148 | for the system. | ||
| 149 | |||
| 120 | endif | 150 | endif |
| 151 | |||
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 4d762c4cccfd..768b3316d6eb 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile | |||
| @@ -12,9 +12,15 @@ obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o | |||
| 12 | obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o | 12 | obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o |
| 13 | obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o | 13 | obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o |
| 14 | obj-$(CONFIG_REGULATOR_TWL4030) += twl4030-regulator.o | 14 | obj-$(CONFIG_REGULATOR_TWL4030) += twl4030-regulator.o |
| 15 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o | ||
| 16 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o | ||
| 17 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o | ||
| 15 | obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o | 18 | obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o |
| 16 | obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o | 19 | obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o |
| 17 | obj-$(CONFIG_REGULATOR_DA903X) += da903x.o | 20 | obj-$(CONFIG_REGULATOR_DA903X) += da903x.o |
| 18 | obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o | 21 | obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o |
| 22 | obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o | ||
| 23 | obj-$(CONFIG_REGULATOR_MC13783) += mc13783.o | ||
| 24 | obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o | ||
| 19 | 25 | ||
| 20 | ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG | 26 | ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG |
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c new file mode 100644 index 000000000000..49aeee823a25 --- /dev/null +++ b/drivers/regulator/ab3100.c | |||
| @@ -0,0 +1,700 @@ | |||
| 1 | /* | ||
| 2 | * drivers/regulator/ab3100.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008-2009 ST-Ericsson AB | ||
| 5 | * License terms: GNU General Public License (GPL) version 2 | ||
| 6 | * Low-level control of the AB3100 IC Low Dropout (LDO) | ||
| 7 | * regulators, external regulator and buck converter | ||
| 8 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> | ||
| 9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/module.h> | ||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/err.h> | ||
| 16 | #include <linux/delay.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/regulator/driver.h> | ||
| 19 | #include <linux/mfd/ab3100.h> | ||
| 20 | |||
| 21 | /* LDO registers and some handy masking definitions for AB3100 */ | ||
| 22 | #define AB3100_LDO_A 0x40 | ||
| 23 | #define AB3100_LDO_C 0x41 | ||
| 24 | #define AB3100_LDO_D 0x42 | ||
| 25 | #define AB3100_LDO_E 0x43 | ||
| 26 | #define AB3100_LDO_E_SLEEP 0x44 | ||
| 27 | #define AB3100_LDO_F 0x45 | ||
| 28 | #define AB3100_LDO_G 0x46 | ||
| 29 | #define AB3100_LDO_H 0x47 | ||
| 30 | #define AB3100_LDO_H_SLEEP_MODE 0 | ||
| 31 | #define AB3100_LDO_H_SLEEP_EN 2 | ||
| 32 | #define AB3100_LDO_ON 4 | ||
| 33 | #define AB3100_LDO_H_VSEL_AC 5 | ||
| 34 | #define AB3100_LDO_K 0x48 | ||
| 35 | #define AB3100_LDO_EXT 0x49 | ||
| 36 | #define AB3100_BUCK 0x4A | ||
| 37 | #define AB3100_BUCK_SLEEP 0x4B | ||
| 38 | #define AB3100_REG_ON_MASK 0x10 | ||
| 39 | |||
| 40 | /** | ||
| 41 | * struct ab3100_regulator | ||
| 42 | * A struct passed around the individual regulator functions | ||
| 43 | * @platform_device: platform device holding this regulator | ||
| 44 | * @ab3100: handle to the AB3100 parent chip | ||
| 45 | * @plfdata: AB3100 platform data passed in at probe time | ||
| 46 | * @regreg: regulator register number in the AB3100 | ||
| 47 | * @fixed_voltage: a fixed voltage for this regulator, if this | ||
| 48 | * 0 the voltages array is used instead. | ||
| 49 | * @typ_voltages: an array of available typical voltages for | ||
| 50 | * this regulator | ||
| 51 | * @voltages_len: length of the array of available voltages | ||
| 52 | */ | ||
| 53 | struct ab3100_regulator { | ||
| 54 | struct regulator_dev *rdev; | ||
| 55 | struct ab3100 *ab3100; | ||
| 56 | struct ab3100_platform_data *plfdata; | ||
| 57 | u8 regreg; | ||
| 58 | int fixed_voltage; | ||
| 59 | int const *typ_voltages; | ||
| 60 | u8 voltages_len; | ||
| 61 | }; | ||
| 62 | |||
| 63 | /* The order in which registers are initialized */ | ||
| 64 | static const u8 ab3100_reg_init_order[AB3100_NUM_REGULATORS+2] = { | ||
| 65 | AB3100_LDO_A, | ||
| 66 | AB3100_LDO_C, | ||
| 67 | AB3100_LDO_E, | ||
| 68 | AB3100_LDO_E_SLEEP, | ||
| 69 | AB3100_LDO_F, | ||
| 70 | AB3100_LDO_G, | ||
| 71 | AB3100_LDO_H, | ||
| 72 | AB3100_LDO_K, | ||
| 73 | AB3100_LDO_EXT, | ||
| 74 | AB3100_BUCK, | ||
| 75 | AB3100_BUCK_SLEEP, | ||
| 76 | AB3100_LDO_D, | ||
| 77 | }; | ||
| 78 | |||
| 79 | /* Preset (hardware defined) voltages for these regulators */ | ||
| 80 | #define LDO_A_VOLTAGE 2750000 | ||
| 81 | #define LDO_C_VOLTAGE 2650000 | ||
| 82 | #define LDO_D_VOLTAGE 2650000 | ||
| 83 | |||
| 84 | static const int const ldo_e_buck_typ_voltages[] = { | ||
| 85 | 1800000, | ||
| 86 | 1400000, | ||
| 87 | 1300000, | ||
| 88 | 1200000, | ||
| 89 | 1100000, | ||
| 90 | 1050000, | ||
| 91 | 900000, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static const int const ldo_f_typ_voltages[] = { | ||
| 95 | 1800000, | ||
| 96 | 1400000, | ||
| 97 | 1300000, | ||
| 98 | 1200000, | ||
| 99 | 1100000, | ||
| 100 | 1050000, | ||
| 101 | 2500000, | ||
| 102 | 2650000, | ||
| 103 | }; | ||
| 104 | |||
| 105 | static const int const ldo_g_typ_voltages[] = { | ||
| 106 | 2850000, | ||
| 107 | 2750000, | ||
| 108 | 1800000, | ||
| 109 | 1500000, | ||
| 110 | }; | ||
| 111 | |||
| 112 | static const int const ldo_h_typ_voltages[] = { | ||
| 113 | 2750000, | ||
| 114 | 1800000, | ||
| 115 | 1500000, | ||
| 116 | 1200000, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static const int const ldo_k_typ_voltages[] = { | ||
| 120 | 2750000, | ||
| 121 | 1800000, | ||
| 122 | }; | ||
| 123 | |||
| 124 | |||
| 125 | /* The regulator devices */ | ||
| 126 | static struct ab3100_regulator | ||
| 127 | ab3100_regulators[AB3100_NUM_REGULATORS] = { | ||
| 128 | { | ||
| 129 | .regreg = AB3100_LDO_A, | ||
| 130 | .fixed_voltage = LDO_A_VOLTAGE, | ||
| 131 | }, | ||
| 132 | { | ||
| 133 | .regreg = AB3100_LDO_C, | ||
| 134 | .fixed_voltage = LDO_C_VOLTAGE, | ||
| 135 | }, | ||
| 136 | { | ||
| 137 | .regreg = AB3100_LDO_D, | ||
| 138 | .fixed_voltage = LDO_D_VOLTAGE, | ||
| 139 | }, | ||
| 140 | { | ||
| 141 | .regreg = AB3100_LDO_E, | ||
| 142 | .typ_voltages = ldo_e_buck_typ_voltages, | ||
| 143 | .voltages_len = ARRAY_SIZE(ldo_e_buck_typ_voltages), | ||
| 144 | }, | ||
| 145 | { | ||
| 146 | .regreg = AB3100_LDO_F, | ||
| 147 | .typ_voltages = ldo_f_typ_voltages, | ||
| 148 | .voltages_len = ARRAY_SIZE(ldo_f_typ_voltages), | ||
| 149 | }, | ||
| 150 | { | ||
| 151 | .regreg = AB3100_LDO_G, | ||
| 152 | .typ_voltages = ldo_g_typ_voltages, | ||
| 153 | .voltages_len = ARRAY_SIZE(ldo_g_typ_voltages), | ||
| 154 | }, | ||
| 155 | { | ||
| 156 | .regreg = AB3100_LDO_H, | ||
| 157 | .typ_voltages = ldo_h_typ_voltages, | ||
| 158 | .voltages_len = ARRAY_SIZE(ldo_h_typ_voltages), | ||
| 159 | }, | ||
| 160 | { | ||
| 161 | .regreg = AB3100_LDO_K, | ||
| 162 | .typ_voltages = ldo_k_typ_voltages, | ||
| 163 | .voltages_len = ARRAY_SIZE(ldo_k_typ_voltages), | ||
| 164 | }, | ||
| 165 | { | ||
| 166 | .regreg = AB3100_LDO_EXT, | ||
| 167 | /* No voltages for the external regulator */ | ||
| 168 | }, | ||
| 169 | { | ||
| 170 | .regreg = AB3100_BUCK, | ||
| 171 | .typ_voltages = ldo_e_buck_typ_voltages, | ||
| 172 | .voltages_len = ARRAY_SIZE(ldo_e_buck_typ_voltages), | ||
| 173 | }, | ||
| 174 | }; | ||
| 175 | |||
| 176 | /* | ||
| 177 | * General functions for enable, disable and is_enabled used for | ||
| 178 | * LDO: A,C,E,F,G,H,K,EXT and BUCK | ||
| 179 | */ | ||
| 180 | static int ab3100_enable_regulator(struct regulator_dev *reg) | ||
| 181 | { | ||
| 182 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 183 | int err; | ||
| 184 | u8 regval; | ||
| 185 | |||
| 186 | err = ab3100_get_register_interruptible(abreg->ab3100, abreg->regreg, | ||
| 187 | ®val); | ||
| 188 | if (err) { | ||
| 189 | dev_warn(®->dev, "failed to get regid %d value\n", | ||
| 190 | abreg->regreg); | ||
| 191 | return err; | ||
| 192 | } | ||
| 193 | |||
| 194 | /* The regulator is already on, no reason to go further */ | ||
| 195 | if (regval & AB3100_REG_ON_MASK) | ||
| 196 | return 0; | ||
| 197 | |||
| 198 | regval |= AB3100_REG_ON_MASK; | ||
| 199 | |||
| 200 | err = ab3100_set_register_interruptible(abreg->ab3100, abreg->regreg, | ||
| 201 | regval); | ||
| 202 | if (err) { | ||
| 203 | dev_warn(®->dev, "failed to set regid %d value\n", | ||
| 204 | abreg->regreg); | ||
| 205 | return err; | ||
| 206 | } | ||
| 207 | |||
| 208 | /* Per-regulator power on delay from spec */ | ||
| 209 | switch (abreg->regreg) { | ||
| 210 | case AB3100_LDO_A: /* Fallthrough */ | ||
| 211 | case AB3100_LDO_C: /* Fallthrough */ | ||
| 212 | case AB3100_LDO_D: /* Fallthrough */ | ||
| 213 | case AB3100_LDO_E: /* Fallthrough */ | ||
| 214 | case AB3100_LDO_H: /* Fallthrough */ | ||
| 215 | case AB3100_LDO_K: | ||
| 216 | udelay(200); | ||
| 217 | break; | ||
| 218 | case AB3100_LDO_F: | ||
| 219 | udelay(600); | ||
| 220 | break; | ||
| 221 | case AB3100_LDO_G: | ||
| 222 | udelay(400); | ||
| 223 | break; | ||
| 224 | case AB3100_BUCK: | ||
| 225 | mdelay(1); | ||
| 226 | break; | ||
| 227 | default: | ||
| 228 | break; | ||
| 229 | } | ||
| 230 | |||
| 231 | return 0; | ||
| 232 | } | ||
| 233 | |||
| 234 | static int ab3100_disable_regulator(struct regulator_dev *reg) | ||
| 235 | { | ||
| 236 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 237 | int err; | ||
| 238 | u8 regval; | ||
| 239 | |||
| 240 | /* | ||
| 241 | * LDO D is a special regulator. When it is disabled, the entire | ||
| 242 | * system is shut down. So this is handled specially. | ||
| 243 | */ | ||
| 244 | if (abreg->regreg == AB3100_LDO_D) { | ||
| 245 | int i; | ||
| 246 | |||
| 247 | dev_info(®->dev, "disabling LDO D - shut down system\n"); | ||
| 248 | /* | ||
| 249 | * Set regulators to default values, ignore any errors, | ||
| 250 | * we're going DOWN | ||
| 251 | */ | ||
| 252 | for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) { | ||
| 253 | (void) ab3100_set_register_interruptible(abreg->ab3100, | ||
| 254 | ab3100_reg_init_order[i], | ||
| 255 | abreg->plfdata->reg_initvals[i]); | ||
| 256 | } | ||
| 257 | |||
| 258 | /* Setting LDO D to 0x00 cuts the power to the SoC */ | ||
| 259 | return ab3100_set_register_interruptible(abreg->ab3100, | ||
| 260 | AB3100_LDO_D, 0x00U); | ||
| 261 | |||
| 262 | } | ||
| 263 | |||
| 264 | /* | ||
| 265 | * All other regulators are handled here | ||
| 266 | */ | ||
| 267 | err = ab3100_get_register_interruptible(abreg->ab3100, abreg->regreg, | ||
| 268 | ®val); | ||
| 269 | if (err) { | ||
| 270 | dev_err(®->dev, "unable to get register 0x%x\n", | ||
| 271 | abreg->regreg); | ||
| 272 | return err; | ||
| 273 | } | ||
| 274 | regval &= ~AB3100_REG_ON_MASK; | ||
| 275 | return ab3100_set_register_interruptible(abreg->ab3100, abreg->regreg, | ||
| 276 | regval); | ||
| 277 | } | ||
| 278 | |||
| 279 | static int ab3100_is_enabled_regulator(struct regulator_dev *reg) | ||
| 280 | { | ||
| 281 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 282 | u8 regval; | ||
| 283 | int err; | ||
| 284 | |||
| 285 | err = ab3100_get_register_interruptible(abreg->ab3100, abreg->regreg, | ||
| 286 | ®val); | ||
| 287 | if (err) { | ||
| 288 | dev_err(®->dev, "unable to get register 0x%x\n", | ||
| 289 | abreg->regreg); | ||
| 290 | return err; | ||
| 291 | } | ||
| 292 | |||
| 293 | return regval & AB3100_REG_ON_MASK; | ||
| 294 | } | ||
| 295 | |||
| 296 | static int ab3100_list_voltage_regulator(struct regulator_dev *reg, | ||
| 297 | unsigned selector) | ||
| 298 | { | ||
| 299 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 300 | |||
| 301 | if (selector > abreg->voltages_len) | ||
| 302 | return -EINVAL; | ||
| 303 | return abreg->typ_voltages[selector]; | ||
| 304 | } | ||
| 305 | |||
| 306 | static int ab3100_get_voltage_regulator(struct regulator_dev *reg) | ||
| 307 | { | ||
| 308 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 309 | u8 regval; | ||
| 310 | int err; | ||
| 311 | |||
| 312 | /* Return the voltage for fixed regulators immediately */ | ||
| 313 | if (abreg->fixed_voltage) | ||
| 314 | return abreg->fixed_voltage; | ||
| 315 | |||
| 316 | /* | ||
| 317 | * For variable types, read out setting and index into | ||
| 318 | * supplied voltage list. | ||
| 319 | */ | ||
| 320 | err = ab3100_get_register_interruptible(abreg->ab3100, | ||
| 321 | abreg->regreg, ®val); | ||
| 322 | if (err) { | ||
| 323 | dev_warn(®->dev, | ||
| 324 | "failed to get regulator value in register %02x\n", | ||
| 325 | abreg->regreg); | ||
| 326 | return err; | ||
| 327 | } | ||
| 328 | |||
| 329 | /* The 3 highest bits index voltages */ | ||
| 330 | regval &= 0xE0; | ||
| 331 | regval >>= 5; | ||
| 332 | |||
| 333 | if (regval > abreg->voltages_len) { | ||
| 334 | dev_err(®->dev, | ||
| 335 | "regulator register %02x contains an illegal voltage setting\n", | ||
| 336 | abreg->regreg); | ||
| 337 | return -EINVAL; | ||
| 338 | } | ||
| 339 | |||
| 340 | return abreg->typ_voltages[regval]; | ||
| 341 | } | ||
| 342 | |||
| 343 | static int ab3100_get_best_voltage_index(struct regulator_dev *reg, | ||
| 344 | int min_uV, int max_uV) | ||
| 345 | { | ||
| 346 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 347 | int i; | ||
| 348 | int bestmatch; | ||
| 349 | int bestindex; | ||
| 350 | |||
| 351 | /* | ||
| 352 | * Locate the minimum voltage fitting the criteria on | ||
| 353 | * this regulator. The switchable voltages are not | ||
| 354 | * in strict falling order so we need to check them | ||
| 355 | * all for the best match. | ||
| 356 | */ | ||
| 357 | bestmatch = INT_MAX; | ||
| 358 | bestindex = -1; | ||
| 359 | for (i = 0; i < abreg->voltages_len; i++) { | ||
| 360 | if (abreg->typ_voltages[i] <= max_uV && | ||
| 361 | abreg->typ_voltages[i] >= min_uV && | ||
| 362 | abreg->typ_voltages[i] < bestmatch) { | ||
| 363 | bestmatch = abreg->typ_voltages[i]; | ||
| 364 | bestindex = i; | ||
| 365 | } | ||
| 366 | } | ||
| 367 | |||
| 368 | if (bestindex < 0) { | ||
| 369 | dev_warn(®->dev, "requested %d<=x<=%d uV, out of range!\n", | ||
| 370 | min_uV, max_uV); | ||
| 371 | return -EINVAL; | ||
| 372 | } | ||
| 373 | return bestindex; | ||
| 374 | } | ||
| 375 | |||
| 376 | static int ab3100_set_voltage_regulator(struct regulator_dev *reg, | ||
| 377 | int min_uV, int max_uV) | ||
| 378 | { | ||
| 379 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 380 | u8 regval; | ||
| 381 | int err; | ||
| 382 | int bestindex; | ||
| 383 | |||
| 384 | bestindex = ab3100_get_best_voltage_index(reg, min_uV, max_uV); | ||
| 385 | if (bestindex < 0) | ||
| 386 | return bestindex; | ||
| 387 | |||
| 388 | err = ab3100_get_register_interruptible(abreg->ab3100, | ||
| 389 | abreg->regreg, ®val); | ||
| 390 | if (err) { | ||
| 391 | dev_warn(®->dev, | ||
| 392 | "failed to get regulator register %02x\n", | ||
| 393 | abreg->regreg); | ||
| 394 | return err; | ||
| 395 | } | ||
| 396 | |||
| 397 | /* The highest three bits control the variable regulators */ | ||
| 398 | regval &= ~0xE0; | ||
| 399 | regval |= (bestindex << 5); | ||
| 400 | |||
| 401 | err = ab3100_set_register_interruptible(abreg->ab3100, | ||
| 402 | abreg->regreg, regval); | ||
| 403 | if (err) | ||
| 404 | dev_warn(®->dev, "failed to set regulator register %02x\n", | ||
| 405 | abreg->regreg); | ||
| 406 | |||
| 407 | return err; | ||
| 408 | } | ||
| 409 | |||
| 410 | static int ab3100_set_suspend_voltage_regulator(struct regulator_dev *reg, | ||
| 411 | int uV) | ||
| 412 | { | ||
| 413 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 414 | u8 regval; | ||
| 415 | int err; | ||
| 416 | int bestindex; | ||
| 417 | u8 targetreg; | ||
| 418 | |||
| 419 | if (abreg->regreg == AB3100_LDO_E) | ||
| 420 | targetreg = AB3100_LDO_E_SLEEP; | ||
| 421 | else if (abreg->regreg == AB3100_BUCK) | ||
| 422 | targetreg = AB3100_BUCK_SLEEP; | ||
| 423 | else | ||
| 424 | return -EINVAL; | ||
| 425 | |||
| 426 | /* LDO E and BUCK have special suspend voltages you can set */ | ||
| 427 | bestindex = ab3100_get_best_voltage_index(reg, uV, uV); | ||
| 428 | |||
| 429 | err = ab3100_get_register_interruptible(abreg->ab3100, | ||
| 430 | targetreg, ®val); | ||
| 431 | if (err) { | ||
| 432 | dev_warn(®->dev, | ||
| 433 | "failed to get regulator register %02x\n", | ||
| 434 | targetreg); | ||
| 435 | return err; | ||
| 436 | } | ||
| 437 | |||
| 438 | /* The highest three bits control the variable regulators */ | ||
| 439 | regval &= ~0xE0; | ||
| 440 | regval |= (bestindex << 5); | ||
| 441 | |||
| 442 | err = ab3100_set_register_interruptible(abreg->ab3100, | ||
| 443 | targetreg, regval); | ||
| 444 | if (err) | ||
| 445 | dev_warn(®->dev, "failed to set regulator register %02x\n", | ||
| 446 | abreg->regreg); | ||
| 447 | |||
| 448 | return err; | ||
| 449 | } | ||
| 450 | |||
| 451 | /* | ||
| 452 | * The external regulator can just define a fixed voltage. | ||
| 453 | */ | ||
| 454 | static int ab3100_get_voltage_regulator_external(struct regulator_dev *reg) | ||
| 455 | { | ||
| 456 | struct ab3100_regulator *abreg = reg->reg_data; | ||
| 457 | |||
| 458 | return abreg->plfdata->external_voltage; | ||
| 459 | } | ||
| 460 | |||
| 461 | static struct regulator_ops regulator_ops_fixed = { | ||
| 462 | .enable = ab3100_enable_regulator, | ||
| 463 | .disable = ab3100_disable_regulator, | ||
| 464 | .is_enabled = ab3100_is_enabled_regulator, | ||
| 465 | .get_voltage = ab3100_get_voltage_regulator, | ||
| 466 | }; | ||
| 467 | |||
| 468 | static struct regulator_ops regulator_ops_variable = { | ||
| 469 | .enable = ab3100_enable_regulator, | ||
| 470 | .disable = ab3100_disable_regulator, | ||
| 471 | .is_enabled = ab3100_is_enabled_regulator, | ||
| 472 | .get_voltage = ab3100_get_voltage_regulator, | ||
| 473 | .set_voltage = ab3100_set_voltage_regulator, | ||
| 474 | .list_voltage = ab3100_list_voltage_regulator, | ||
| 475 | }; | ||
| 476 | |||
| 477 | static struct regulator_ops regulator_ops_variable_sleepable = { | ||
| 478 | .enable = ab3100_enable_regulator, | ||
| 479 | .disable = ab3100_disable_regulator, | ||
| 480 | .is_enabled = ab3100_is_enabled_regulator, | ||
| 481 | .get_voltage = ab3100_get_voltage_regulator, | ||
| 482 | .set_voltage = ab3100_set_voltage_regulator, | ||
| 483 | .set_suspend_voltage = ab3100_set_suspend_voltage_regulator, | ||
| 484 | .list_voltage = ab3100_list_voltage_regulator, | ||
| 485 | }; | ||
| 486 | |||
| 487 | /* | ||
| 488 | * LDO EXT is an external regulator so it is really | ||
| 489 | * not possible to set any voltage locally here, AB3100 | ||
| 490 | * is an on/off switch plain an simple. The external | ||
| 491 | * voltage is defined in the board set-up if any. | ||
| 492 | */ | ||
| 493 | static struct regulator_ops regulator_ops_external = { | ||
| 494 | .enable = ab3100_enable_regulator, | ||
| 495 | .disable = ab3100_disable_regulator, | ||
| 496 | .is_enabled = ab3100_is_enabled_regulator, | ||
| 497 | .get_voltage = ab3100_get_voltage_regulator_external, | ||
| 498 | }; | ||
| 499 | |||
| 500 | static struct regulator_desc | ||
| 501 | ab3100_regulator_desc[AB3100_NUM_REGULATORS] = { | ||
| 502 | { | ||
| 503 | .name = "LDO_A", | ||
| 504 | .id = AB3100_LDO_A, | ||
| 505 | .ops = ®ulator_ops_fixed, | ||
| 506 | .type = REGULATOR_VOLTAGE, | ||
| 507 | }, | ||
| 508 | { | ||
| 509 | .name = "LDO_C", | ||
| 510 | .id = AB3100_LDO_C, | ||
| 511 | .ops = ®ulator_ops_fixed, | ||
| 512 | .type = REGULATOR_VOLTAGE, | ||
| 513 | }, | ||
| 514 | { | ||
| 515 | .name = "LDO_D", | ||
| 516 | .id = AB3100_LDO_D, | ||
| 517 | .ops = ®ulator_ops_fixed, | ||
| 518 | .type = REGULATOR_VOLTAGE, | ||
| 519 | }, | ||
| 520 | { | ||
| 521 | .name = "LDO_E", | ||
| 522 | .id = AB3100_LDO_E, | ||
| 523 | .ops = ®ulator_ops_variable_sleepable, | ||
| 524 | .n_voltages = ARRAY_SIZE(ldo_e_buck_typ_voltages), | ||
| 525 | .type = REGULATOR_VOLTAGE, | ||
| 526 | }, | ||
| 527 | { | ||
| 528 | .name = "LDO_F", | ||
| 529 | .id = AB3100_LDO_F, | ||
| 530 | .ops = ®ulator_ops_variable, | ||
| 531 | .n_voltages = ARRAY_SIZE(ldo_f_typ_voltages), | ||
| 532 | .type = REGULATOR_VOLTAGE, | ||
| 533 | }, | ||
| 534 | { | ||
| 535 | .name = "LDO_G", | ||
| 536 | .id = AB3100_LDO_G, | ||
| 537 | .ops = ®ulator_ops_variable, | ||
| 538 | .n_voltages = ARRAY_SIZE(ldo_g_typ_voltages), | ||
| 539 | .type = REGULATOR_VOLTAGE, | ||
| 540 | }, | ||
| 541 | { | ||
| 542 | .name = "LDO_H", | ||
| 543 | .id = AB3100_LDO_H, | ||
| 544 | .ops = ®ulator_ops_variable, | ||
| 545 | .n_voltages = ARRAY_SIZE(ldo_h_typ_voltages), | ||
| 546 | .type = REGULATOR_VOLTAGE, | ||
| 547 | }, | ||
| 548 | { | ||
| 549 | .name = "LDO_K", | ||
| 550 | .id = AB3100_LDO_K, | ||
| 551 | .ops = ®ulator_ops_variable, | ||
| 552 | .n_voltages = ARRAY_SIZE(ldo_k_typ_voltages), | ||
| 553 | .type = REGULATOR_VOLTAGE, | ||
| 554 | }, | ||
| 555 | { | ||
| 556 | .name = "LDO_EXT", | ||
| 557 | .id = AB3100_LDO_EXT, | ||
| 558 | .ops = ®ulator_ops_external, | ||
| 559 | .type = REGULATOR_VOLTAGE, | ||
| 560 | }, | ||
| 561 | { | ||
| 562 | .name = "BUCK", | ||
| 563 | .id = AB3100_BUCK, | ||
| 564 | .ops = ®ulator_ops_variable_sleepable, | ||
| 565 | .n_voltages = ARRAY_SIZE(ldo_e_buck_typ_voltages), | ||
| 566 | .type = REGULATOR_VOLTAGE, | ||
| 567 | }, | ||
| 568 | }; | ||
| 569 | |||
| 570 | /* | ||
| 571 | * NOTE: the following functions are regulators pluralis - it is the | ||
| 572 | * binding to the AB3100 core driver and the parent platform device | ||
| 573 | * for all the different regulators. | ||
| 574 | */ | ||
| 575 | |||
| 576 | static int __init ab3100_regulators_probe(struct platform_device *pdev) | ||
| 577 | { | ||
| 578 | struct ab3100_platform_data *plfdata = pdev->dev.platform_data; | ||
| 579 | struct ab3100 *ab3100 = platform_get_drvdata(pdev); | ||
| 580 | int err = 0; | ||
| 581 | u8 data; | ||
| 582 | int i; | ||
| 583 | |||
| 584 | /* Check chip state */ | ||
| 585 | err = ab3100_get_register_interruptible(ab3100, | ||
| 586 | AB3100_LDO_D, &data); | ||
| 587 | if (err) { | ||
| 588 | dev_err(&pdev->dev, "could not read initial status of LDO_D\n"); | ||
| 589 | return err; | ||
| 590 | } | ||
| 591 | if (data & 0x10) | ||
| 592 | dev_notice(&pdev->dev, | ||
| 593 | "chip is already in active mode (Warm start)\n"); | ||
| 594 | else | ||
| 595 | dev_notice(&pdev->dev, | ||
| 596 | "chip is in inactive mode (Cold start)\n"); | ||
| 597 | |||
| 598 | /* Set up regulators */ | ||
| 599 | for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) { | ||
| 600 | err = ab3100_set_register_interruptible(ab3100, | ||
| 601 | ab3100_reg_init_order[i], | ||
| 602 | plfdata->reg_initvals[i]); | ||
| 603 | if (err) { | ||
| 604 | dev_err(&pdev->dev, "regulator initialization failed with error %d\n", | ||
| 605 | err); | ||
| 606 | return err; | ||
| 607 | } | ||
| 608 | } | ||
| 609 | |||
| 610 | if (err) { | ||
| 611 | dev_err(&pdev->dev, | ||
| 612 | "LDO D regulator initialization failed with error %d\n", | ||
| 613 | err); | ||
| 614 | return err; | ||
| 615 | } | ||
| 616 | |||
| 617 | /* Register the regulators */ | ||
| 618 | for (i = 0; i < AB3100_NUM_REGULATORS; i++) { | ||
| 619 | struct ab3100_regulator *reg = &ab3100_regulators[i]; | ||
| 620 | struct regulator_dev *rdev; | ||
| 621 | |||
| 622 | /* | ||
| 623 | * Initialize per-regulator struct. | ||
| 624 | * Inherit platform data, this comes down from the | ||
| 625 | * i2c boarddata, from the machine. So if you want to | ||
| 626 | * see what it looks like for a certain machine, go | ||
| 627 | * into the machine I2C setup. | ||
| 628 | */ | ||
| 629 | reg->ab3100 = ab3100; | ||
| 630 | reg->plfdata = plfdata; | ||
| 631 | |||
| 632 | /* | ||
| 633 | * Register the regulator, pass around | ||
| 634 | * the ab3100_regulator struct | ||
| 635 | */ | ||
| 636 | rdev = regulator_register(&ab3100_regulator_desc[i], | ||
| 637 | &pdev->dev, | ||
| 638 | &plfdata->reg_constraints[i], | ||
| 639 | reg); | ||
| 640 | |||
| 641 | if (IS_ERR(rdev)) { | ||
| 642 | err = PTR_ERR(rdev); | ||
| 643 | dev_err(&pdev->dev, | ||
| 644 | "%s: failed to register regulator %s err %d\n", | ||
| 645 | __func__, ab3100_regulator_desc[i].name, | ||
| 646 | err); | ||
| 647 | i--; | ||
| 648 | /* remove the already registered regulators */ | ||
| 649 | while (i > 0) { | ||
| 650 | regulator_unregister(ab3100_regulators[i].rdev); | ||
| 651 | i--; | ||
| 652 | } | ||
| 653 | return err; | ||
| 654 | } | ||
| 655 | |||
| 656 | /* Then set a pointer back to the registered regulator */ | ||
| 657 | reg->rdev = rdev; | ||
| 658 | } | ||
| 659 | |||
| 660 | return 0; | ||
| 661 | } | ||
| 662 | |||
| 663 | static int __exit ab3100_regulators_remove(struct platform_device *pdev) | ||
| 664 | { | ||
| 665 | int i; | ||
| 666 | |||
| 667 | for (i = 0; i < AB3100_NUM_REGULATORS; i++) { | ||
| 668 | struct ab3100_regulator *reg = &ab3100_regulators[i]; | ||
| 669 | |||
| 670 | regulator_unregister(reg->rdev); | ||
| 671 | } | ||
| 672 | return 0; | ||
| 673 | } | ||
| 674 | |||
| 675 | static struct platform_driver ab3100_regulators_driver = { | ||
| 676 | .driver = { | ||
| 677 | .name = "ab3100-regulators", | ||
| 678 | .owner = THIS_MODULE, | ||
| 679 | }, | ||
| 680 | .probe = ab3100_regulators_probe, | ||
| 681 | .remove = __exit_p(ab3100_regulators_remove), | ||
| 682 | }; | ||
| 683 | |||
| 684 | static __init int ab3100_regulators_init(void) | ||
| 685 | { | ||
| 686 | return platform_driver_register(&ab3100_regulators_driver); | ||
| 687 | } | ||
| 688 | |||
| 689 | static __exit void ab3100_regulators_exit(void) | ||
| 690 | { | ||
| 691 | platform_driver_register(&ab3100_regulators_driver); | ||
| 692 | } | ||
| 693 | |||
| 694 | subsys_initcall(ab3100_regulators_init); | ||
| 695 | module_exit(ab3100_regulators_exit); | ||
| 696 | |||
| 697 | MODULE_AUTHOR("Mattias Wallin <mattias.wallin@stericsson.com>"); | ||
| 698 | MODULE_DESCRIPTION("AB3100 Regulator driver"); | ||
| 699 | MODULE_LICENSE("GPL"); | ||
| 700 | MODULE_ALIAS("platform:ab3100-regulators"); | ||
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 98c3a74e9949..91ba9bfaa706 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c | |||
| @@ -1864,6 +1864,30 @@ int regulator_notifier_call_chain(struct regulator_dev *rdev, | |||
| 1864 | } | 1864 | } |
| 1865 | EXPORT_SYMBOL_GPL(regulator_notifier_call_chain); | 1865 | EXPORT_SYMBOL_GPL(regulator_notifier_call_chain); |
| 1866 | 1866 | ||
| 1867 | /** | ||
| 1868 | * regulator_mode_to_status - convert a regulator mode into a status | ||
| 1869 | * | ||
| 1870 | * @mode: Mode to convert | ||
| 1871 | * | ||
| 1872 | * Convert a regulator mode into a status. | ||
| 1873 | */ | ||
| 1874 | int regulator_mode_to_status(unsigned int mode) | ||
| 1875 | { | ||
| 1876 | switch (mode) { | ||
| 1877 | case REGULATOR_MODE_FAST: | ||
| 1878 | return REGULATOR_STATUS_FAST; | ||
| 1879 | case REGULATOR_MODE_NORMAL: | ||
| 1880 | return REGULATOR_STATUS_NORMAL; | ||
| 1881 | case REGULATOR_MODE_IDLE: | ||
| 1882 | return REGULATOR_STATUS_IDLE; | ||
| 1883 | case REGULATOR_STATUS_STANDBY: | ||
| 1884 | return REGULATOR_STATUS_STANDBY; | ||
| 1885 | default: | ||
| 1886 | return 0; | ||
| 1887 | } | ||
| 1888 | } | ||
| 1889 | EXPORT_SYMBOL_GPL(regulator_mode_to_status); | ||
| 1890 | |||
| 1867 | /* | 1891 | /* |
| 1868 | * To avoid cluttering sysfs (and memory) with useless state, only | 1892 | * To avoid cluttering sysfs (and memory) with useless state, only |
| 1869 | * create attributes that can be meaningfully displayed. | 1893 | * create attributes that can be meaningfully displayed. |
diff --git a/drivers/regulator/mc13783.c b/drivers/regulator/mc13783.c new file mode 100644 index 000000000000..710211f67449 --- /dev/null +++ b/drivers/regulator/mc13783.c | |||
| @@ -0,0 +1,410 @@ | |||
| 1 | /* | ||
| 2 | * Regulator Driver for Freescale MC13783 PMIC | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/mfd/mc13783-private.h> | ||
| 12 | #include <linux/regulator/machine.h> | ||
| 13 | #include <linux/regulator/driver.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | #include <linux/mfd/mc13783.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/init.h> | ||
| 18 | #include <linux/err.h> | ||
| 19 | |||
| 20 | struct mc13783_regulator { | ||
| 21 | struct regulator_desc desc; | ||
| 22 | int reg; | ||
| 23 | int enable_bit; | ||
| 24 | }; | ||
| 25 | |||
| 26 | static struct regulator_ops mc13783_regulator_ops; | ||
| 27 | |||
| 28 | static struct mc13783_regulator mc13783_regulators[] = { | ||
| 29 | [MC13783_SW_SW3] = { | ||
| 30 | .desc = { | ||
| 31 | .name = "SW_SW3", | ||
| 32 | .ops = &mc13783_regulator_ops, | ||
| 33 | .type = REGULATOR_VOLTAGE, | ||
| 34 | .id = MC13783_SW_SW3, | ||
| 35 | .owner = THIS_MODULE, | ||
| 36 | }, | ||
| 37 | .reg = MC13783_REG_SWITCHERS_5, | ||
| 38 | .enable_bit = MC13783_SWCTRL_SW3_EN, | ||
| 39 | }, | ||
| 40 | [MC13783_SW_PLL] = { | ||
| 41 | .desc = { | ||
| 42 | .name = "SW_PLL", | ||
| 43 | .ops = &mc13783_regulator_ops, | ||
| 44 | .type = REGULATOR_VOLTAGE, | ||
| 45 | .id = MC13783_SW_PLL, | ||
| 46 | .owner = THIS_MODULE, | ||
| 47 | }, | ||
| 48 | .reg = MC13783_REG_SWITCHERS_4, | ||
| 49 | .enable_bit = MC13783_SWCTRL_PLL_EN, | ||
| 50 | }, | ||
| 51 | [MC13783_REGU_VAUDIO] = { | ||
| 52 | .desc = { | ||
| 53 | .name = "REGU_VAUDIO", | ||
| 54 | .ops = &mc13783_regulator_ops, | ||
| 55 | .type = REGULATOR_VOLTAGE, | ||
| 56 | .id = MC13783_REGU_VAUDIO, | ||
| 57 | .owner = THIS_MODULE, | ||
| 58 | }, | ||
| 59 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 60 | .enable_bit = MC13783_REGCTRL_VAUDIO_EN, | ||
| 61 | }, | ||
| 62 | [MC13783_REGU_VIOHI] = { | ||
| 63 | .desc = { | ||
| 64 | .name = "REGU_VIOHI", | ||
| 65 | .ops = &mc13783_regulator_ops, | ||
| 66 | .type = REGULATOR_VOLTAGE, | ||
| 67 | .id = MC13783_REGU_VIOHI, | ||
| 68 | .owner = THIS_MODULE, | ||
| 69 | }, | ||
| 70 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 71 | .enable_bit = MC13783_REGCTRL_VIOHI_EN, | ||
| 72 | }, | ||
| 73 | [MC13783_REGU_VIOLO] = { | ||
| 74 | .desc = { | ||
| 75 | .name = "REGU_VIOLO", | ||
| 76 | .ops = &mc13783_regulator_ops, | ||
| 77 | .type = REGULATOR_VOLTAGE, | ||
| 78 | .id = MC13783_REGU_VIOLO, | ||
| 79 | .owner = THIS_MODULE, | ||
| 80 | }, | ||
| 81 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 82 | .enable_bit = MC13783_REGCTRL_VIOLO_EN, | ||
| 83 | }, | ||
| 84 | [MC13783_REGU_VDIG] = { | ||
| 85 | .desc = { | ||
| 86 | .name = "REGU_VDIG", | ||
| 87 | .ops = &mc13783_regulator_ops, | ||
| 88 | .type = REGULATOR_VOLTAGE, | ||
| 89 | .id = MC13783_REGU_VDIG, | ||
| 90 | .owner = THIS_MODULE, | ||
| 91 | }, | ||
| 92 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 93 | .enable_bit = MC13783_REGCTRL_VDIG_EN, | ||
| 94 | }, | ||
| 95 | [MC13783_REGU_VGEN] = { | ||
| 96 | .desc = { | ||
| 97 | .name = "REGU_VGEN", | ||
| 98 | .ops = &mc13783_regulator_ops, | ||
| 99 | .type = REGULATOR_VOLTAGE, | ||
| 100 | .id = MC13783_REGU_VGEN, | ||
| 101 | .owner = THIS_MODULE, | ||
| 102 | }, | ||
| 103 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 104 | .enable_bit = MC13783_REGCTRL_VGEN_EN, | ||
| 105 | }, | ||
| 106 | [MC13783_REGU_VRFDIG] = { | ||
| 107 | .desc = { | ||
| 108 | .name = "REGU_VRFDIG", | ||
| 109 | .ops = &mc13783_regulator_ops, | ||
| 110 | .type = REGULATOR_VOLTAGE, | ||
| 111 | .id = MC13783_REGU_VRFDIG, | ||
| 112 | .owner = THIS_MODULE, | ||
| 113 | }, | ||
| 114 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 115 | .enable_bit = MC13783_REGCTRL_VRFDIG_EN, | ||
| 116 | }, | ||
| 117 | [MC13783_REGU_VRFREF] = { | ||
| 118 | .desc = { | ||
| 119 | .name = "REGU_VRFREF", | ||
| 120 | .ops = &mc13783_regulator_ops, | ||
| 121 | .type = REGULATOR_VOLTAGE, | ||
| 122 | .id = MC13783_REGU_VRFREF, | ||
| 123 | .owner = THIS_MODULE, | ||
| 124 | }, | ||
| 125 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 126 | .enable_bit = MC13783_REGCTRL_VRFREF_EN, | ||
| 127 | }, | ||
| 128 | [MC13783_REGU_VRFCP] = { | ||
| 129 | .desc = { | ||
| 130 | .name = "REGU_VRFCP", | ||
| 131 | .ops = &mc13783_regulator_ops, | ||
| 132 | .type = REGULATOR_VOLTAGE, | ||
| 133 | .id = MC13783_REGU_VRFCP, | ||
| 134 | .owner = THIS_MODULE, | ||
| 135 | }, | ||
| 136 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
| 137 | .enable_bit = MC13783_REGCTRL_VRFCP_EN, | ||
| 138 | }, | ||
| 139 | [MC13783_REGU_VSIM] = { | ||
| 140 | .desc = { | ||
| 141 | .name = "REGU_VSIM", | ||
| 142 | .ops = &mc13783_regulator_ops, | ||
| 143 | .type = REGULATOR_VOLTAGE, | ||
| 144 | .id = MC13783_REGU_VSIM, | ||
| 145 | .owner = THIS_MODULE, | ||
| 146 | }, | ||
| 147 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 148 | .enable_bit = MC13783_REGCTRL_VSIM_EN, | ||
| 149 | }, | ||
| 150 | [MC13783_REGU_VESIM] = { | ||
| 151 | .desc = { | ||
| 152 | .name = "REGU_VESIM", | ||
| 153 | .ops = &mc13783_regulator_ops, | ||
| 154 | .type = REGULATOR_VOLTAGE, | ||
| 155 | .id = MC13783_REGU_VESIM, | ||
| 156 | .owner = THIS_MODULE, | ||
| 157 | }, | ||
| 158 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 159 | .enable_bit = MC13783_REGCTRL_VESIM_EN, | ||
| 160 | }, | ||
| 161 | [MC13783_REGU_VCAM] = { | ||
| 162 | .desc = { | ||
| 163 | .name = "REGU_VCAM", | ||
| 164 | .ops = &mc13783_regulator_ops, | ||
| 165 | .type = REGULATOR_VOLTAGE, | ||
| 166 | .id = MC13783_REGU_VCAM, | ||
| 167 | .owner = THIS_MODULE, | ||
| 168 | }, | ||
| 169 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 170 | .enable_bit = MC13783_REGCTRL_VCAM_EN, | ||
| 171 | }, | ||
| 172 | [MC13783_REGU_VRFBG] = { | ||
| 173 | .desc = { | ||
| 174 | .name = "REGU_VRFBG", | ||
| 175 | .ops = &mc13783_regulator_ops, | ||
| 176 | .type = REGULATOR_VOLTAGE, | ||
| 177 | .id = MC13783_REGU_VRFBG, | ||
| 178 | .owner = THIS_MODULE, | ||
| 179 | }, | ||
| 180 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 181 | .enable_bit = MC13783_REGCTRL_VRFBG_EN, | ||
| 182 | }, | ||
| 183 | [MC13783_REGU_VVIB] = { | ||
| 184 | .desc = { | ||
| 185 | .name = "REGU_VVIB", | ||
| 186 | .ops = &mc13783_regulator_ops, | ||
| 187 | .type = REGULATOR_VOLTAGE, | ||
| 188 | .id = MC13783_REGU_VVIB, | ||
| 189 | .owner = THIS_MODULE, | ||
| 190 | }, | ||
| 191 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 192 | .enable_bit = MC13783_REGCTRL_VVIB_EN, | ||
| 193 | }, | ||
| 194 | [MC13783_REGU_VRF1] = { | ||
| 195 | .desc = { | ||
| 196 | .name = "REGU_VRF1", | ||
| 197 | .ops = &mc13783_regulator_ops, | ||
| 198 | .type = REGULATOR_VOLTAGE, | ||
| 199 | .id = MC13783_REGU_VRF1, | ||
| 200 | .owner = THIS_MODULE, | ||
| 201 | }, | ||
| 202 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 203 | .enable_bit = MC13783_REGCTRL_VRF1_EN, | ||
| 204 | }, | ||
| 205 | [MC13783_REGU_VRF2] = { | ||
| 206 | .desc = { | ||
| 207 | .name = "REGU_VRF2", | ||
| 208 | .ops = &mc13783_regulator_ops, | ||
| 209 | .type = REGULATOR_VOLTAGE, | ||
| 210 | .id = MC13783_REGU_VRF2, | ||
| 211 | .owner = THIS_MODULE, | ||
| 212 | }, | ||
| 213 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 214 | .enable_bit = MC13783_REGCTRL_VRF2_EN, | ||
| 215 | }, | ||
| 216 | [MC13783_REGU_VMMC1] = { | ||
| 217 | .desc = { | ||
| 218 | .name = "REGU_VMMC1", | ||
| 219 | .ops = &mc13783_regulator_ops, | ||
| 220 | .type = REGULATOR_VOLTAGE, | ||
| 221 | .id = MC13783_REGU_VMMC1, | ||
| 222 | .owner = THIS_MODULE, | ||
| 223 | }, | ||
| 224 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 225 | .enable_bit = MC13783_REGCTRL_VMMC1_EN, | ||
| 226 | }, | ||
| 227 | [MC13783_REGU_VMMC2] = { | ||
| 228 | .desc = { | ||
| 229 | .name = "REGU_VMMC2", | ||
| 230 | .ops = &mc13783_regulator_ops, | ||
| 231 | .type = REGULATOR_VOLTAGE, | ||
| 232 | .id = MC13783_REGU_VMMC2, | ||
| 233 | .owner = THIS_MODULE, | ||
| 234 | }, | ||
| 235 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
| 236 | .enable_bit = MC13783_REGCTRL_VMMC2_EN, | ||
| 237 | }, | ||
| 238 | [MC13783_REGU_GPO1] = { | ||
| 239 | .desc = { | ||
| 240 | .name = "REGU_GPO1", | ||
| 241 | .ops = &mc13783_regulator_ops, | ||
| 242 | .type = REGULATOR_VOLTAGE, | ||
| 243 | .id = MC13783_REGU_GPO1, | ||
| 244 | .owner = THIS_MODULE, | ||
| 245 | }, | ||
| 246 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
| 247 | .enable_bit = MC13783_REGCTRL_GPO1_EN, | ||
| 248 | }, | ||
| 249 | [MC13783_REGU_GPO2] = { | ||
| 250 | .desc = { | ||
| 251 | .name = "REGU_GPO2", | ||
| 252 | .ops = &mc13783_regulator_ops, | ||
| 253 | .type = REGULATOR_VOLTAGE, | ||
| 254 | .id = MC13783_REGU_GPO2, | ||
| 255 | .owner = THIS_MODULE, | ||
| 256 | }, | ||
| 257 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
| 258 | .enable_bit = MC13783_REGCTRL_GPO2_EN, | ||
| 259 | }, | ||
| 260 | [MC13783_REGU_GPO3] = { | ||
| 261 | .desc = { | ||
| 262 | .name = "REGU_GPO3", | ||
| 263 | .ops = &mc13783_regulator_ops, | ||
| 264 | .type = REGULATOR_VOLTAGE, | ||
| 265 | .id = MC13783_REGU_GPO3, | ||
| 266 | .owner = THIS_MODULE, | ||
| 267 | }, | ||
| 268 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
| 269 | .enable_bit = MC13783_REGCTRL_GPO3_EN, | ||
| 270 | }, | ||
| 271 | [MC13783_REGU_GPO4] = { | ||
| 272 | .desc = { | ||
| 273 | .name = "REGU_GPO4", | ||
| 274 | .ops = &mc13783_regulator_ops, | ||
| 275 | .type = REGULATOR_VOLTAGE, | ||
| 276 | .id = MC13783_REGU_GPO4, | ||
| 277 | .owner = THIS_MODULE, | ||
| 278 | }, | ||
| 279 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
| 280 | .enable_bit = MC13783_REGCTRL_GPO4_EN, | ||
| 281 | }, | ||
| 282 | }; | ||
| 283 | |||
| 284 | struct mc13783_priv { | ||
| 285 | struct regulator_desc desc[ARRAY_SIZE(mc13783_regulators)]; | ||
| 286 | struct mc13783 *mc13783; | ||
| 287 | struct regulator_dev *regulators[0]; | ||
| 288 | }; | ||
| 289 | |||
| 290 | static int mc13783_enable(struct regulator_dev *rdev) | ||
| 291 | { | ||
| 292 | struct mc13783_priv *priv = rdev_get_drvdata(rdev); | ||
| 293 | int id = rdev_get_id(rdev); | ||
| 294 | |||
| 295 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
| 296 | |||
| 297 | return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg, | ||
| 298 | mc13783_regulators[id].enable_bit, | ||
| 299 | mc13783_regulators[id].enable_bit); | ||
| 300 | } | ||
| 301 | |||
| 302 | static int mc13783_disable(struct regulator_dev *rdev) | ||
| 303 | { | ||
| 304 | struct mc13783_priv *priv = rdev_get_drvdata(rdev); | ||
| 305 | int id = rdev_get_id(rdev); | ||
| 306 | |||
| 307 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
| 308 | |||
| 309 | return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg, | ||
| 310 | mc13783_regulators[id].enable_bit, 0); | ||
| 311 | } | ||
| 312 | |||
| 313 | static int mc13783_is_enabled(struct regulator_dev *rdev) | ||
| 314 | { | ||
| 315 | struct mc13783_priv *priv = rdev_get_drvdata(rdev); | ||
| 316 | int ret, id = rdev_get_id(rdev); | ||
| 317 | unsigned int val; | ||
| 318 | |||
| 319 | ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val); | ||
| 320 | if (ret) | ||
| 321 | return ret; | ||
| 322 | |||
| 323 | return (val & mc13783_regulators[id].enable_bit) != 0; | ||
| 324 | } | ||
| 325 | |||
| 326 | static struct regulator_ops mc13783_regulator_ops = { | ||
| 327 | .enable = mc13783_enable, | ||
| 328 | .disable = mc13783_disable, | ||
| 329 | .is_enabled = mc13783_is_enabled, | ||
| 330 | }; | ||
| 331 | |||
| 332 | static int __devinit mc13783_regulator_probe(struct platform_device *pdev) | ||
| 333 | { | ||
| 334 | struct mc13783_priv *priv; | ||
| 335 | struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent); | ||
| 336 | struct mc13783_regulator_init_data *init_data; | ||
| 337 | int i, ret; | ||
| 338 | |||
| 339 | dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id); | ||
| 340 | |||
| 341 | priv = kzalloc(sizeof(*priv) + mc13783->num_regulators * sizeof(void *), | ||
| 342 | GFP_KERNEL); | ||
| 343 | if (!priv) | ||
| 344 | return -ENOMEM; | ||
| 345 | |||
| 346 | priv->mc13783 = mc13783; | ||
| 347 | |||
| 348 | for (i = 0; i < mc13783->num_regulators; i++) { | ||
| 349 | init_data = &mc13783->regulators[i]; | ||
| 350 | priv->regulators[i] = regulator_register( | ||
| 351 | &mc13783_regulators[init_data->id].desc, | ||
| 352 | &pdev->dev, init_data->init_data, priv); | ||
| 353 | |||
| 354 | if (IS_ERR(priv->regulators[i])) { | ||
| 355 | dev_err(&pdev->dev, "failed to register regulator %s\n", | ||
| 356 | mc13783_regulators[i].desc.name); | ||
| 357 | ret = PTR_ERR(priv->regulators[i]); | ||
| 358 | goto err; | ||
| 359 | } | ||
| 360 | } | ||
| 361 | |||
| 362 | platform_set_drvdata(pdev, priv); | ||
| 363 | |||
| 364 | return 0; | ||
| 365 | err: | ||
| 366 | while (--i >= 0) | ||
| 367 | regulator_unregister(priv->regulators[i]); | ||
| 368 | |||
| 369 | kfree(priv); | ||
| 370 | |||
| 371 | return ret; | ||
| 372 | } | ||
| 373 | |||
| 374 | static int __devexit mc13783_regulator_remove(struct platform_device *pdev) | ||
| 375 | { | ||
| 376 | struct mc13783_priv *priv = platform_get_drvdata(pdev); | ||
| 377 | struct mc13783 *mc13783 = priv->mc13783; | ||
| 378 | int i; | ||
| 379 | |||
| 380 | for (i = 0; i < mc13783->num_regulators; i++) | ||
| 381 | regulator_unregister(priv->regulators[i]); | ||
| 382 | |||
| 383 | return 0; | ||
| 384 | } | ||
| 385 | |||
| 386 | static struct platform_driver mc13783_regulator_driver = { | ||
| 387 | .driver = { | ||
| 388 | .name = "mc13783-regulator", | ||
| 389 | .owner = THIS_MODULE, | ||
| 390 | }, | ||
| 391 | .remove = __devexit_p(mc13783_regulator_remove), | ||
| 392 | }; | ||
| 393 | |||
| 394 | static int __init mc13783_regulator_init(void) | ||
| 395 | { | ||
| 396 | return platform_driver_probe(&mc13783_regulator_driver, | ||
| 397 | mc13783_regulator_probe); | ||
| 398 | } | ||
| 399 | subsys_initcall(mc13783_regulator_init); | ||
| 400 | |||
| 401 | static void __exit mc13783_regulator_exit(void) | ||
| 402 | { | ||
| 403 | platform_driver_unregister(&mc13783_regulator_driver); | ||
| 404 | } | ||
| 405 | module_exit(mc13783_regulator_exit); | ||
| 406 | |||
| 407 | MODULE_LICENSE("GPL"); | ||
| 408 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de"); | ||
| 409 | MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC"); | ||
| 410 | MODULE_ALIAS("platform:mc13783-regulator"); | ||
diff --git a/drivers/regulator/pcap-regulator.c b/drivers/regulator/pcap-regulator.c new file mode 100644 index 000000000000..33d7d899e030 --- /dev/null +++ b/drivers/regulator/pcap-regulator.c | |||
| @@ -0,0 +1,318 @@ | |||
| 1 | /* | ||
| 2 | * PCAP2 Regulator Driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2009 Daniel Ribeiro <drwyrm@gmail.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify it | ||
| 7 | * under the terms of the GNU General Public License as published by the | ||
| 8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 9 | * option) any later version. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/err.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/regulator/driver.h> | ||
| 18 | #include <linux/regulator/machine.h> | ||
| 19 | #include <linux/mfd/ezx-pcap.h> | ||
| 20 | |||
| 21 | static const u16 V1_table[] = { | ||
| 22 | 2775, 1275, 1600, 1725, 1825, 1925, 2075, 2275, | ||
| 23 | }; | ||
| 24 | |||
| 25 | static const u16 V2_table[] = { | ||
| 26 | 2500, 2775, | ||
| 27 | }; | ||
| 28 | |||
| 29 | static const u16 V3_table[] = { | ||
| 30 | 1075, 1275, 1550, 1725, 1876, 1950, 2075, 2275, | ||
| 31 | }; | ||
| 32 | |||
| 33 | static const u16 V4_table[] = { | ||
| 34 | 1275, 1550, 1725, 1875, 1950, 2075, 2275, 2775, | ||
| 35 | }; | ||
| 36 | |||
| 37 | static const u16 V5_table[] = { | ||
| 38 | 1875, 2275, 2475, 2775, | ||
| 39 | }; | ||
| 40 | |||
| 41 | static const u16 V6_table[] = { | ||
| 42 | 2475, 2775, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static const u16 V7_table[] = { | ||
| 46 | 1875, 2775, | ||
| 47 | }; | ||
| 48 | |||
| 49 | #define V8_table V4_table | ||
| 50 | |||
| 51 | static const u16 V9_table[] = { | ||
| 52 | 1575, 1875, 2475, 2775, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static const u16 V10_table[] = { | ||
| 56 | 5000, | ||
| 57 | }; | ||
| 58 | |||
| 59 | static const u16 VAUX1_table[] = { | ||
| 60 | 1875, 2475, 2775, 3000, | ||
| 61 | }; | ||
| 62 | |||
| 63 | #define VAUX2_table VAUX1_table | ||
| 64 | |||
| 65 | static const u16 VAUX3_table[] = { | ||
| 66 | 1200, 1200, 1200, 1200, 1400, 1600, 1800, 2000, | ||
| 67 | 2200, 2400, 2600, 2800, 3000, 3200, 3400, 3600, | ||
| 68 | }; | ||
| 69 | |||
| 70 | static const u16 VAUX4_table[] = { | ||
| 71 | 1800, 1800, 3000, 5000, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static const u16 VSIM_table[] = { | ||
| 75 | 1875, 3000, | ||
| 76 | }; | ||
| 77 | |||
| 78 | static const u16 VSIM2_table[] = { | ||
| 79 | 1875, | ||
| 80 | }; | ||
| 81 | |||
| 82 | static const u16 VVIB_table[] = { | ||
| 83 | 1300, 1800, 2000, 3000, | ||
| 84 | }; | ||
| 85 | |||
| 86 | static const u16 SW1_table[] = { | ||
| 87 | 900, 950, 1000, 1050, 1100, 1150, 1200, 1250, | ||
| 88 | 1300, 1350, 1400, 1450, 1500, 1600, 1875, 2250, | ||
| 89 | }; | ||
| 90 | |||
| 91 | #define SW2_table SW1_table | ||
| 92 | |||
| 93 | static const u16 SW3_table[] = { | ||
| 94 | 4000, 4500, 5000, 5500, | ||
| 95 | }; | ||
| 96 | |||
| 97 | struct pcap_regulator { | ||
| 98 | const u8 reg; | ||
| 99 | const u8 en; | ||
| 100 | const u8 index; | ||
| 101 | const u8 stby; | ||
| 102 | const u8 lowpwr; | ||
| 103 | const u8 n_voltages; | ||
| 104 | const u16 *voltage_table; | ||
| 105 | }; | ||
| 106 | |||
| 107 | #define NA 0xff | ||
| 108 | |||
| 109 | #define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \ | ||
| 110 | [_vreg] = { \ | ||
| 111 | .reg = _reg, \ | ||
| 112 | .en = _en, \ | ||
| 113 | .index = _index, \ | ||
| 114 | .stby = _stby, \ | ||
| 115 | .lowpwr = _lowpwr, \ | ||
| 116 | .n_voltages = ARRAY_SIZE(_vreg##_table), \ | ||
| 117 | .voltage_table = _vreg##_table, \ | ||
| 118 | } | ||
| 119 | |||
| 120 | static struct pcap_regulator vreg_table[] = { | ||
| 121 | VREG_INFO(V1, PCAP_REG_VREG1, 1, 2, 18, 0), | ||
| 122 | VREG_INFO(V2, PCAP_REG_VREG1, 5, 6, 19, 22), | ||
| 123 | VREG_INFO(V3, PCAP_REG_VREG1, 7, 8, 20, 23), | ||
| 124 | VREG_INFO(V4, PCAP_REG_VREG1, 11, 12, 21, 24), | ||
| 125 | /* V5 STBY and LOWPWR are on PCAP_REG_VREG2 */ | ||
| 126 | VREG_INFO(V5, PCAP_REG_VREG1, 15, 16, 12, 19), | ||
| 127 | |||
| 128 | VREG_INFO(V6, PCAP_REG_VREG2, 1, 2, 14, 20), | ||
| 129 | VREG_INFO(V7, PCAP_REG_VREG2, 3, 4, 15, 21), | ||
| 130 | VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22), | ||
| 131 | VREG_INFO(V9, PCAP_REG_VREG2, 9, 10, 17, 23), | ||
| 132 | VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24), | ||
| 133 | |||
| 134 | VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1, 2, 22, 23), | ||
| 135 | /* VAUX2 ... VSIM2 STBY and LOWPWR are on PCAP_REG_LOWPWR */ | ||
| 136 | VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4, 5, 0, 1), | ||
| 137 | VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7, 8, 2, 3), | ||
| 138 | VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4, 5), | ||
| 139 | VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6), | ||
| 140 | VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7), | ||
| 141 | VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA), | ||
| 142 | |||
| 143 | VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA), | ||
| 144 | VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA), | ||
| 145 | /* SW3 STBY is on PCAP_REG_AUXVREG */ | ||
| 146 | VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA), | ||
| 147 | |||
| 148 | /* SWxS used to control SWx voltage on standby */ | ||
| 149 | /* VREG_INFO(SW1S, PCAP_REG_LOWPWR, NA, 12, NA, NA), | ||
| 150 | VREG_INFO(SW2S, PCAP_REG_LOWPWR, NA, 20, NA, NA), */ | ||
| 151 | }; | ||
| 152 | |||
| 153 | static int pcap_regulator_set_voltage(struct regulator_dev *rdev, | ||
| 154 | int min_uV, int max_uV) | ||
| 155 | { | ||
| 156 | struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; | ||
| 157 | void *pcap = rdev_get_drvdata(rdev); | ||
| 158 | int uV; | ||
| 159 | u8 i; | ||
| 160 | |||
| 161 | /* the regulator doesn't support voltage switching */ | ||
| 162 | if (vreg->n_voltages == 1) | ||
| 163 | return -EINVAL; | ||
| 164 | |||
| 165 | for (i = 0; i < vreg->n_voltages; i++) { | ||
| 166 | /* For V1 the first is not the best match */ | ||
| 167 | if (i == 0 && rdev_get_id(rdev) == V1) | ||
| 168 | i = 1; | ||
| 169 | else if (i + 1 == vreg->n_voltages && rdev_get_id(rdev) == V1) | ||
| 170 | i = 0; | ||
| 171 | |||
| 172 | uV = vreg->voltage_table[i] * 1000; | ||
| 173 | if (min_uV <= uV && uV <= max_uV) | ||
| 174 | return ezx_pcap_set_bits(pcap, vreg->reg, | ||
| 175 | (vreg->n_voltages - 1) << vreg->index, | ||
| 176 | i << vreg->index); | ||
| 177 | |||
| 178 | if (i == 0 && rdev_get_id(rdev) == V1) | ||
| 179 | i = vreg->n_voltages - 1; | ||
| 180 | } | ||
| 181 | |||
| 182 | /* the requested voltage range is not supported by this regulator */ | ||
| 183 | return -EINVAL; | ||
| 184 | } | ||
| 185 | |||
| 186 | static int pcap_regulator_get_voltage(struct regulator_dev *rdev) | ||
| 187 | { | ||
| 188 | struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; | ||
| 189 | void *pcap = rdev_get_drvdata(rdev); | ||
| 190 | u32 tmp; | ||
| 191 | int mV; | ||
| 192 | |||
| 193 | if (vreg->n_voltages == 1) | ||
| 194 | return vreg->voltage_table[0] * 1000; | ||
| 195 | |||
| 196 | ezx_pcap_read(pcap, vreg->reg, &tmp); | ||
| 197 | tmp = ((tmp >> vreg->index) & (vreg->n_voltages - 1)); | ||
| 198 | mV = vreg->voltage_table[tmp]; | ||
| 199 | |||
| 200 | return mV * 1000; | ||
| 201 | } | ||
| 202 | |||
| 203 | static int pcap_regulator_enable(struct regulator_dev *rdev) | ||
| 204 | { | ||
| 205 | struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; | ||
| 206 | void *pcap = rdev_get_drvdata(rdev); | ||
| 207 | |||
| 208 | if (vreg->en == NA) | ||
| 209 | return -EINVAL; | ||
| 210 | |||
| 211 | return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en); | ||
| 212 | } | ||
| 213 | |||
| 214 | static int pcap_regulator_disable(struct regulator_dev *rdev) | ||
| 215 | { | ||
| 216 | struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; | ||
| 217 | void *pcap = rdev_get_drvdata(rdev); | ||
| 218 | |||
| 219 | if (vreg->en == NA) | ||
| 220 | return -EINVAL; | ||
| 221 | |||
| 222 | return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0); | ||
| 223 | } | ||
| 224 | |||
| 225 | static int pcap_regulator_is_enabled(struct regulator_dev *rdev) | ||
| 226 | { | ||
| 227 | struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; | ||
| 228 | void *pcap = rdev_get_drvdata(rdev); | ||
| 229 | u32 tmp; | ||
| 230 | |||
| 231 | if (vreg->en == NA) | ||
| 232 | return -EINVAL; | ||
| 233 | |||
| 234 | ezx_pcap_read(pcap, vreg->reg, &tmp); | ||
| 235 | return (tmp >> vreg->en) & 1; | ||
| 236 | } | ||
| 237 | |||
| 238 | static int pcap_regulator_list_voltage(struct regulator_dev *rdev, | ||
| 239 | unsigned int index) | ||
| 240 | { | ||
| 241 | struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; | ||
| 242 | |||
| 243 | return vreg->voltage_table[index] * 1000; | ||
| 244 | } | ||
| 245 | |||
| 246 | static struct regulator_ops pcap_regulator_ops = { | ||
| 247 | .list_voltage = pcap_regulator_list_voltage, | ||
| 248 | .set_voltage = pcap_regulator_set_voltage, | ||
| 249 | .get_voltage = pcap_regulator_get_voltage, | ||
| 250 | .enable = pcap_regulator_enable, | ||
| 251 | .disable = pcap_regulator_disable, | ||
| 252 | .is_enabled = pcap_regulator_is_enabled, | ||
| 253 | }; | ||
| 254 | |||
| 255 | #define VREG(_vreg) \ | ||
| 256 | [_vreg] = { \ | ||
| 257 | .name = #_vreg, \ | ||
| 258 | .id = _vreg, \ | ||
| 259 | .n_voltages = ARRAY_SIZE(_vreg##_table), \ | ||
| 260 | .ops = &pcap_regulator_ops, \ | ||
| 261 | .type = REGULATOR_VOLTAGE, \ | ||
| 262 | .owner = THIS_MODULE, \ | ||
| 263 | } | ||
| 264 | |||
| 265 | static struct regulator_desc pcap_regulators[] = { | ||
| 266 | VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7), | ||
| 267 | VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3), | ||
| 268 | VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2), | ||
| 269 | }; | ||
| 270 | |||
| 271 | static int __devinit pcap_regulator_probe(struct platform_device *pdev) | ||
| 272 | { | ||
| 273 | struct regulator_dev *rdev; | ||
| 274 | void *pcap = dev_get_drvdata(pdev->dev.parent); | ||
| 275 | |||
| 276 | rdev = regulator_register(&pcap_regulators[pdev->id], &pdev->dev, | ||
| 277 | pdev->dev.platform_data, pcap); | ||
| 278 | if (IS_ERR(rdev)) | ||
| 279 | return PTR_ERR(rdev); | ||
| 280 | |||
| 281 | platform_set_drvdata(pdev, rdev); | ||
| 282 | |||
| 283 | return 0; | ||
| 284 | } | ||
| 285 | |||
| 286 | static int __devexit pcap_regulator_remove(struct platform_device *pdev) | ||
| 287 | { | ||
| 288 | struct regulator_dev *rdev = platform_get_drvdata(pdev); | ||
| 289 | |||
| 290 | regulator_unregister(rdev); | ||
| 291 | |||
| 292 | return 0; | ||
| 293 | } | ||
| 294 | |||
| 295 | static struct platform_driver pcap_regulator_driver = { | ||
| 296 | .driver = { | ||
| 297 | .name = "pcap-regulator", | ||
| 298 | }, | ||
| 299 | .probe = pcap_regulator_probe, | ||
| 300 | .remove = __devexit_p(pcap_regulator_remove), | ||
| 301 | }; | ||
| 302 | |||
| 303 | static int __init pcap_regulator_init(void) | ||
| 304 | { | ||
| 305 | return platform_driver_register(&pcap_regulator_driver); | ||
| 306 | } | ||
| 307 | |||
| 308 | static void __exit pcap_regulator_exit(void) | ||
| 309 | { | ||
| 310 | platform_driver_unregister(&pcap_regulator_driver); | ||
| 311 | } | ||
| 312 | |||
| 313 | subsys_initcall(pcap_regulator_init); | ||
| 314 | module_exit(pcap_regulator_exit); | ||
| 315 | |||
| 316 | MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>"); | ||
| 317 | MODULE_DESCRIPTION("PCAP2 Regulator Driver"); | ||
| 318 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c new file mode 100644 index 000000000000..2eefc1a0cf08 --- /dev/null +++ b/drivers/regulator/wm831x-dcdc.c | |||
| @@ -0,0 +1,862 @@ | |||
| 1 | /* | ||
| 2 | * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/moduleparam.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/bitops.h> | ||
| 18 | #include <linux/err.h> | ||
| 19 | #include <linux/i2c.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/regulator/driver.h> | ||
| 22 | |||
| 23 | #include <linux/mfd/wm831x/core.h> | ||
| 24 | #include <linux/mfd/wm831x/regulator.h> | ||
| 25 | #include <linux/mfd/wm831x/pdata.h> | ||
| 26 | |||
| 27 | #define WM831X_BUCKV_MAX_SELECTOR 0x68 | ||
| 28 | #define WM831X_BUCKP_MAX_SELECTOR 0x66 | ||
| 29 | |||
| 30 | #define WM831X_DCDC_MODE_FAST 0 | ||
| 31 | #define WM831X_DCDC_MODE_NORMAL 1 | ||
| 32 | #define WM831X_DCDC_MODE_IDLE 2 | ||
| 33 | #define WM831X_DCDC_MODE_STANDBY 3 | ||
| 34 | |||
| 35 | #define WM831X_DCDC_MAX_NAME 6 | ||
| 36 | |||
| 37 | /* Register offsets in control block */ | ||
| 38 | #define WM831X_DCDC_CONTROL_1 0 | ||
| 39 | #define WM831X_DCDC_CONTROL_2 1 | ||
| 40 | #define WM831X_DCDC_ON_CONFIG 2 | ||
| 41 | #define WM831X_DCDC_SLEEP_CONTROL 3 | ||
| 42 | |||
| 43 | /* | ||
| 44 | * Shared | ||
| 45 | */ | ||
| 46 | |||
| 47 | struct wm831x_dcdc { | ||
| 48 | char name[WM831X_DCDC_MAX_NAME]; | ||
| 49 | struct regulator_desc desc; | ||
| 50 | int base; | ||
| 51 | struct wm831x *wm831x; | ||
| 52 | struct regulator_dev *regulator; | ||
| 53 | }; | ||
| 54 | |||
| 55 | static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev) | ||
| 56 | { | ||
| 57 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 58 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 59 | int mask = 1 << rdev_get_id(rdev); | ||
| 60 | int reg; | ||
| 61 | |||
| 62 | reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE); | ||
| 63 | if (reg < 0) | ||
| 64 | return reg; | ||
| 65 | |||
| 66 | if (reg & mask) | ||
| 67 | return 1; | ||
| 68 | else | ||
| 69 | return 0; | ||
| 70 | } | ||
| 71 | |||
| 72 | static int wm831x_dcdc_enable(struct regulator_dev *rdev) | ||
| 73 | { | ||
| 74 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 75 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 76 | int mask = 1 << rdev_get_id(rdev); | ||
| 77 | |||
| 78 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask); | ||
| 79 | } | ||
| 80 | |||
| 81 | static int wm831x_dcdc_disable(struct regulator_dev *rdev) | ||
| 82 | { | ||
| 83 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 84 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 85 | int mask = 1 << rdev_get_id(rdev); | ||
| 86 | |||
| 87 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0); | ||
| 88 | } | ||
| 89 | |||
| 90 | static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev) | ||
| 91 | |||
| 92 | { | ||
| 93 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 94 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 95 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
| 96 | int val; | ||
| 97 | |||
| 98 | val = wm831x_reg_read(wm831x, reg); | ||
| 99 | if (val < 0) | ||
| 100 | return val; | ||
| 101 | |||
| 102 | val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT; | ||
| 103 | |||
| 104 | switch (val) { | ||
| 105 | case WM831X_DCDC_MODE_FAST: | ||
| 106 | return REGULATOR_MODE_FAST; | ||
| 107 | case WM831X_DCDC_MODE_NORMAL: | ||
| 108 | return REGULATOR_MODE_NORMAL; | ||
| 109 | case WM831X_DCDC_MODE_STANDBY: | ||
| 110 | return REGULATOR_MODE_STANDBY; | ||
| 111 | case WM831X_DCDC_MODE_IDLE: | ||
| 112 | return REGULATOR_MODE_IDLE; | ||
| 113 | default: | ||
| 114 | BUG(); | ||
| 115 | } | ||
| 116 | } | ||
| 117 | |||
| 118 | static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg, | ||
| 119 | unsigned int mode) | ||
| 120 | { | ||
| 121 | int val; | ||
| 122 | |||
| 123 | switch (mode) { | ||
| 124 | case REGULATOR_MODE_FAST: | ||
| 125 | val = WM831X_DCDC_MODE_FAST; | ||
| 126 | break; | ||
| 127 | case REGULATOR_MODE_NORMAL: | ||
| 128 | val = WM831X_DCDC_MODE_NORMAL; | ||
| 129 | break; | ||
| 130 | case REGULATOR_MODE_STANDBY: | ||
| 131 | val = WM831X_DCDC_MODE_STANDBY; | ||
| 132 | break; | ||
| 133 | case REGULATOR_MODE_IDLE: | ||
| 134 | val = WM831X_DCDC_MODE_IDLE; | ||
| 135 | break; | ||
| 136 | default: | ||
| 137 | return -EINVAL; | ||
| 138 | } | ||
| 139 | |||
| 140 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK, | ||
| 141 | val << WM831X_DC1_ON_MODE_SHIFT); | ||
| 142 | } | ||
| 143 | |||
| 144 | static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) | ||
| 145 | { | ||
| 146 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 147 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 148 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
| 149 | |||
| 150 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | ||
| 151 | } | ||
| 152 | |||
| 153 | static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev, | ||
| 154 | unsigned int mode) | ||
| 155 | { | ||
| 156 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 157 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 158 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | ||
| 159 | |||
| 160 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | ||
| 161 | } | ||
| 162 | |||
| 163 | static int wm831x_dcdc_get_status(struct regulator_dev *rdev) | ||
| 164 | { | ||
| 165 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 166 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 167 | int ret; | ||
| 168 | |||
| 169 | /* First, check for errors */ | ||
| 170 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | ||
| 171 | if (ret < 0) | ||
| 172 | return ret; | ||
| 173 | |||
| 174 | if (ret & (1 << rdev_get_id(rdev))) { | ||
| 175 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | ||
| 176 | rdev_get_id(rdev) + 1); | ||
| 177 | return REGULATOR_STATUS_ERROR; | ||
| 178 | } | ||
| 179 | |||
| 180 | /* DCDC1 and DCDC2 can additionally detect high voltage/current */ | ||
| 181 | if (rdev_get_id(rdev) < 2) { | ||
| 182 | if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) { | ||
| 183 | dev_dbg(wm831x->dev, "DCDC%d over voltage\n", | ||
| 184 | rdev_get_id(rdev) + 1); | ||
| 185 | return REGULATOR_STATUS_ERROR; | ||
| 186 | } | ||
| 187 | |||
| 188 | if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) { | ||
| 189 | dev_dbg(wm831x->dev, "DCDC%d over current\n", | ||
| 190 | rdev_get_id(rdev) + 1); | ||
| 191 | return REGULATOR_STATUS_ERROR; | ||
| 192 | } | ||
| 193 | } | ||
| 194 | |||
| 195 | /* Is the regulator on? */ | ||
| 196 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | ||
| 197 | if (ret < 0) | ||
| 198 | return ret; | ||
| 199 | if (!(ret & (1 << rdev_get_id(rdev)))) | ||
| 200 | return REGULATOR_STATUS_OFF; | ||
| 201 | |||
| 202 | /* TODO: When we handle hardware control modes so we can report the | ||
| 203 | * current mode. */ | ||
| 204 | return REGULATOR_STATUS_ON; | ||
| 205 | } | ||
| 206 | |||
| 207 | static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data) | ||
| 208 | { | ||
| 209 | struct wm831x_dcdc *dcdc = data; | ||
| 210 | |||
| 211 | regulator_notifier_call_chain(dcdc->regulator, | ||
| 212 | REGULATOR_EVENT_UNDER_VOLTAGE, | ||
| 213 | NULL); | ||
| 214 | |||
| 215 | return IRQ_HANDLED; | ||
| 216 | } | ||
| 217 | |||
| 218 | static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data) | ||
| 219 | { | ||
| 220 | struct wm831x_dcdc *dcdc = data; | ||
| 221 | |||
| 222 | regulator_notifier_call_chain(dcdc->regulator, | ||
| 223 | REGULATOR_EVENT_OVER_CURRENT, | ||
| 224 | NULL); | ||
| 225 | |||
| 226 | return IRQ_HANDLED; | ||
| 227 | } | ||
| 228 | |||
| 229 | /* | ||
| 230 | * BUCKV specifics | ||
| 231 | */ | ||
| 232 | |||
| 233 | static int wm831x_buckv_list_voltage(struct regulator_dev *rdev, | ||
| 234 | unsigned selector) | ||
| 235 | { | ||
| 236 | if (selector <= 0x8) | ||
| 237 | return 600000; | ||
| 238 | if (selector <= WM831X_BUCKV_MAX_SELECTOR) | ||
| 239 | return 600000 + ((selector - 0x8) * 12500); | ||
| 240 | return -EINVAL; | ||
| 241 | } | ||
| 242 | |||
| 243 | static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg, | ||
| 244 | int min_uV, int max_uV) | ||
| 245 | { | ||
| 246 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 247 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 248 | u16 vsel; | ||
| 249 | |||
| 250 | if (min_uV < 600000) | ||
| 251 | vsel = 0; | ||
| 252 | else if (min_uV <= 1800000) | ||
| 253 | vsel = ((min_uV - 600000) / 12500) + 8; | ||
| 254 | else | ||
| 255 | return -EINVAL; | ||
| 256 | |||
| 257 | if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV) | ||
| 258 | return -EINVAL; | ||
| 259 | |||
| 260 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_VSEL_MASK, vsel); | ||
| 261 | } | ||
| 262 | |||
| 263 | static int wm831x_buckv_set_voltage(struct regulator_dev *rdev, | ||
| 264 | int min_uV, int max_uV) | ||
| 265 | { | ||
| 266 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 267 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
| 268 | |||
| 269 | return wm831x_buckv_set_voltage_int(rdev, reg, min_uV, max_uV); | ||
| 270 | } | ||
| 271 | |||
| 272 | static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, | ||
| 273 | int uV) | ||
| 274 | { | ||
| 275 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 276 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | ||
| 277 | |||
| 278 | return wm831x_buckv_set_voltage_int(rdev, reg, uV, uV); | ||
| 279 | } | ||
| 280 | |||
| 281 | static int wm831x_buckv_get_voltage(struct regulator_dev *rdev) | ||
| 282 | { | ||
| 283 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 284 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 285 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
| 286 | int val; | ||
| 287 | |||
| 288 | val = wm831x_reg_read(wm831x, reg); | ||
| 289 | if (val < 0) | ||
| 290 | return val; | ||
| 291 | |||
| 292 | return wm831x_buckv_list_voltage(rdev, val & WM831X_DC1_ON_VSEL_MASK); | ||
| 293 | } | ||
| 294 | |||
| 295 | /* Current limit options */ | ||
| 296 | static u16 wm831x_dcdc_ilim[] = { | ||
| 297 | 125, 250, 375, 500, 625, 750, 875, 1000 | ||
| 298 | }; | ||
| 299 | |||
| 300 | static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev, | ||
| 301 | int min_uA, int max_uA) | ||
| 302 | { | ||
| 303 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 304 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 305 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | ||
| 306 | int i; | ||
| 307 | |||
| 308 | for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) { | ||
| 309 | if (max_uA <= wm831x_dcdc_ilim[i]) | ||
| 310 | break; | ||
| 311 | } | ||
| 312 | if (i == ARRAY_SIZE(wm831x_dcdc_ilim)) | ||
| 313 | return -EINVAL; | ||
| 314 | |||
| 315 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i); | ||
| 316 | } | ||
| 317 | |||
| 318 | static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev) | ||
| 319 | { | ||
| 320 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 321 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 322 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | ||
| 323 | int val; | ||
| 324 | |||
| 325 | val = wm831x_reg_read(wm831x, reg); | ||
| 326 | if (val < 0) | ||
| 327 | return val; | ||
| 328 | |||
| 329 | return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK]; | ||
| 330 | } | ||
| 331 | |||
| 332 | static struct regulator_ops wm831x_buckv_ops = { | ||
| 333 | .set_voltage = wm831x_buckv_set_voltage, | ||
| 334 | .get_voltage = wm831x_buckv_get_voltage, | ||
| 335 | .list_voltage = wm831x_buckv_list_voltage, | ||
| 336 | .set_suspend_voltage = wm831x_buckv_set_suspend_voltage, | ||
| 337 | .set_current_limit = wm831x_buckv_set_current_limit, | ||
| 338 | .get_current_limit = wm831x_buckv_get_current_limit, | ||
| 339 | |||
| 340 | .is_enabled = wm831x_dcdc_is_enabled, | ||
| 341 | .enable = wm831x_dcdc_enable, | ||
| 342 | .disable = wm831x_dcdc_disable, | ||
| 343 | .get_status = wm831x_dcdc_get_status, | ||
| 344 | .get_mode = wm831x_dcdc_get_mode, | ||
| 345 | .set_mode = wm831x_dcdc_set_mode, | ||
| 346 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | ||
| 347 | }; | ||
| 348 | |||
| 349 | static __devinit int wm831x_buckv_probe(struct platform_device *pdev) | ||
| 350 | { | ||
| 351 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 352 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 353 | int id = pdev->id % ARRAY_SIZE(pdata->dcdc); | ||
| 354 | struct wm831x_dcdc *dcdc; | ||
| 355 | struct resource *res; | ||
| 356 | int ret, irq; | ||
| 357 | |||
| 358 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); | ||
| 359 | |||
| 360 | if (pdata == NULL || pdata->dcdc[id] == NULL) | ||
| 361 | return -ENODEV; | ||
| 362 | |||
| 363 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | ||
| 364 | if (dcdc == NULL) { | ||
| 365 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 366 | return -ENOMEM; | ||
| 367 | } | ||
| 368 | |||
| 369 | dcdc->wm831x = wm831x; | ||
| 370 | |||
| 371 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | ||
| 372 | if (res == NULL) { | ||
| 373 | dev_err(&pdev->dev, "No I/O resource\n"); | ||
| 374 | ret = -EINVAL; | ||
| 375 | goto err; | ||
| 376 | } | ||
| 377 | dcdc->base = res->start; | ||
| 378 | |||
| 379 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | ||
| 380 | dcdc->desc.name = dcdc->name; | ||
| 381 | dcdc->desc.id = id; | ||
| 382 | dcdc->desc.type = REGULATOR_VOLTAGE; | ||
| 383 | dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1; | ||
| 384 | dcdc->desc.ops = &wm831x_buckv_ops; | ||
| 385 | dcdc->desc.owner = THIS_MODULE; | ||
| 386 | |||
| 387 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | ||
| 388 | pdata->dcdc[id], dcdc); | ||
| 389 | if (IS_ERR(dcdc->regulator)) { | ||
| 390 | ret = PTR_ERR(dcdc->regulator); | ||
| 391 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | ||
| 392 | id + 1, ret); | ||
| 393 | goto err; | ||
| 394 | } | ||
| 395 | |||
| 396 | irq = platform_get_irq_byname(pdev, "UV"); | ||
| 397 | ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq, | ||
| 398 | IRQF_TRIGGER_RISING, dcdc->name, | ||
| 399 | dcdc); | ||
| 400 | if (ret != 0) { | ||
| 401 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | ||
| 402 | irq, ret); | ||
| 403 | goto err_regulator; | ||
| 404 | } | ||
| 405 | |||
| 406 | irq = platform_get_irq_byname(pdev, "HC"); | ||
| 407 | ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_oc_irq, | ||
| 408 | IRQF_TRIGGER_RISING, dcdc->name, | ||
| 409 | dcdc); | ||
| 410 | if (ret != 0) { | ||
| 411 | dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n", | ||
| 412 | irq, ret); | ||
| 413 | goto err_uv; | ||
| 414 | } | ||
| 415 | |||
| 416 | platform_set_drvdata(pdev, dcdc); | ||
| 417 | |||
| 418 | return 0; | ||
| 419 | |||
| 420 | err_uv: | ||
| 421 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc); | ||
| 422 | err_regulator: | ||
| 423 | regulator_unregister(dcdc->regulator); | ||
| 424 | err: | ||
| 425 | kfree(dcdc); | ||
| 426 | return ret; | ||
| 427 | } | ||
| 428 | |||
| 429 | static __devexit int wm831x_buckv_remove(struct platform_device *pdev) | ||
| 430 | { | ||
| 431 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | ||
| 432 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 433 | |||
| 434 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc); | ||
| 435 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc); | ||
| 436 | regulator_unregister(dcdc->regulator); | ||
| 437 | kfree(dcdc); | ||
| 438 | |||
| 439 | return 0; | ||
| 440 | } | ||
| 441 | |||
| 442 | static struct platform_driver wm831x_buckv_driver = { | ||
| 443 | .probe = wm831x_buckv_probe, | ||
| 444 | .remove = __devexit_p(wm831x_buckv_remove), | ||
| 445 | .driver = { | ||
| 446 | .name = "wm831x-buckv", | ||
| 447 | }, | ||
| 448 | }; | ||
| 449 | |||
| 450 | /* | ||
| 451 | * BUCKP specifics | ||
| 452 | */ | ||
| 453 | |||
| 454 | static int wm831x_buckp_list_voltage(struct regulator_dev *rdev, | ||
| 455 | unsigned selector) | ||
| 456 | { | ||
| 457 | if (selector <= WM831X_BUCKP_MAX_SELECTOR) | ||
| 458 | return 850000 + (selector * 25000); | ||
| 459 | else | ||
| 460 | return -EINVAL; | ||
| 461 | } | ||
| 462 | |||
| 463 | static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg, | ||
| 464 | int min_uV, int max_uV) | ||
| 465 | { | ||
| 466 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 467 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 468 | u16 vsel; | ||
| 469 | |||
| 470 | if (min_uV <= 34000000) | ||
| 471 | vsel = (min_uV - 850000) / 25000; | ||
| 472 | else | ||
| 473 | return -EINVAL; | ||
| 474 | |||
| 475 | if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV) | ||
| 476 | return -EINVAL; | ||
| 477 | |||
| 478 | return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel); | ||
| 479 | } | ||
| 480 | |||
| 481 | static int wm831x_buckp_set_voltage(struct regulator_dev *rdev, | ||
| 482 | int min_uV, int max_uV) | ||
| 483 | { | ||
| 484 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 485 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
| 486 | |||
| 487 | return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV); | ||
| 488 | } | ||
| 489 | |||
| 490 | static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, | ||
| 491 | int uV) | ||
| 492 | { | ||
| 493 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 494 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | ||
| 495 | |||
| 496 | return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV); | ||
| 497 | } | ||
| 498 | |||
| 499 | static int wm831x_buckp_get_voltage(struct regulator_dev *rdev) | ||
| 500 | { | ||
| 501 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 502 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 503 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
| 504 | int val; | ||
| 505 | |||
| 506 | val = wm831x_reg_read(wm831x, reg); | ||
| 507 | if (val < 0) | ||
| 508 | return val; | ||
| 509 | |||
| 510 | return wm831x_buckp_list_voltage(rdev, val & WM831X_DC3_ON_VSEL_MASK); | ||
| 511 | } | ||
| 512 | |||
| 513 | static struct regulator_ops wm831x_buckp_ops = { | ||
| 514 | .set_voltage = wm831x_buckp_set_voltage, | ||
| 515 | .get_voltage = wm831x_buckp_get_voltage, | ||
| 516 | .list_voltage = wm831x_buckp_list_voltage, | ||
| 517 | .set_suspend_voltage = wm831x_buckp_set_suspend_voltage, | ||
| 518 | |||
| 519 | .is_enabled = wm831x_dcdc_is_enabled, | ||
| 520 | .enable = wm831x_dcdc_enable, | ||
| 521 | .disable = wm831x_dcdc_disable, | ||
| 522 | .get_status = wm831x_dcdc_get_status, | ||
| 523 | .get_mode = wm831x_dcdc_get_mode, | ||
| 524 | .set_mode = wm831x_dcdc_set_mode, | ||
| 525 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | ||
| 526 | }; | ||
| 527 | |||
| 528 | static __devinit int wm831x_buckp_probe(struct platform_device *pdev) | ||
| 529 | { | ||
| 530 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 531 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 532 | int id = pdev->id % ARRAY_SIZE(pdata->dcdc); | ||
| 533 | struct wm831x_dcdc *dcdc; | ||
| 534 | struct resource *res; | ||
| 535 | int ret, irq; | ||
| 536 | |||
| 537 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); | ||
| 538 | |||
| 539 | if (pdata == NULL || pdata->dcdc[id] == NULL) | ||
| 540 | return -ENODEV; | ||
| 541 | |||
| 542 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | ||
| 543 | if (dcdc == NULL) { | ||
| 544 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 545 | return -ENOMEM; | ||
| 546 | } | ||
| 547 | |||
| 548 | dcdc->wm831x = wm831x; | ||
| 549 | |||
| 550 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | ||
| 551 | if (res == NULL) { | ||
| 552 | dev_err(&pdev->dev, "No I/O resource\n"); | ||
| 553 | ret = -EINVAL; | ||
| 554 | goto err; | ||
| 555 | } | ||
| 556 | dcdc->base = res->start; | ||
| 557 | |||
| 558 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | ||
| 559 | dcdc->desc.name = dcdc->name; | ||
| 560 | dcdc->desc.id = id; | ||
| 561 | dcdc->desc.type = REGULATOR_VOLTAGE; | ||
| 562 | dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1; | ||
| 563 | dcdc->desc.ops = &wm831x_buckp_ops; | ||
| 564 | dcdc->desc.owner = THIS_MODULE; | ||
| 565 | |||
| 566 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | ||
| 567 | pdata->dcdc[id], dcdc); | ||
| 568 | if (IS_ERR(dcdc->regulator)) { | ||
| 569 | ret = PTR_ERR(dcdc->regulator); | ||
| 570 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | ||
| 571 | id + 1, ret); | ||
| 572 | goto err; | ||
| 573 | } | ||
| 574 | |||
| 575 | irq = platform_get_irq_byname(pdev, "UV"); | ||
| 576 | ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq, | ||
| 577 | IRQF_TRIGGER_RISING, dcdc->name, | ||
| 578 | dcdc); | ||
| 579 | if (ret != 0) { | ||
| 580 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | ||
| 581 | irq, ret); | ||
| 582 | goto err_regulator; | ||
| 583 | } | ||
| 584 | |||
| 585 | platform_set_drvdata(pdev, dcdc); | ||
| 586 | |||
| 587 | return 0; | ||
| 588 | |||
| 589 | err_regulator: | ||
| 590 | regulator_unregister(dcdc->regulator); | ||
| 591 | err: | ||
| 592 | kfree(dcdc); | ||
| 593 | return ret; | ||
| 594 | } | ||
| 595 | |||
| 596 | static __devexit int wm831x_buckp_remove(struct platform_device *pdev) | ||
| 597 | { | ||
| 598 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | ||
| 599 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 600 | |||
| 601 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc); | ||
| 602 | regulator_unregister(dcdc->regulator); | ||
| 603 | kfree(dcdc); | ||
| 604 | |||
| 605 | return 0; | ||
| 606 | } | ||
| 607 | |||
| 608 | static struct platform_driver wm831x_buckp_driver = { | ||
| 609 | .probe = wm831x_buckp_probe, | ||
| 610 | .remove = __devexit_p(wm831x_buckp_remove), | ||
| 611 | .driver = { | ||
| 612 | .name = "wm831x-buckp", | ||
| 613 | }, | ||
| 614 | }; | ||
| 615 | |||
| 616 | /* | ||
| 617 | * DCDC boost convertors | ||
| 618 | */ | ||
| 619 | |||
| 620 | static int wm831x_boostp_get_status(struct regulator_dev *rdev) | ||
| 621 | { | ||
| 622 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
| 623 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 624 | int ret; | ||
| 625 | |||
| 626 | /* First, check for errors */ | ||
| 627 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | ||
| 628 | if (ret < 0) | ||
| 629 | return ret; | ||
| 630 | |||
| 631 | if (ret & (1 << rdev_get_id(rdev))) { | ||
| 632 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | ||
| 633 | rdev_get_id(rdev) + 1); | ||
| 634 | return REGULATOR_STATUS_ERROR; | ||
| 635 | } | ||
| 636 | |||
| 637 | /* Is the regulator on? */ | ||
| 638 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | ||
| 639 | if (ret < 0) | ||
| 640 | return ret; | ||
| 641 | if (ret & (1 << rdev_get_id(rdev))) | ||
| 642 | return REGULATOR_STATUS_ON; | ||
| 643 | else | ||
| 644 | return REGULATOR_STATUS_OFF; | ||
| 645 | } | ||
| 646 | |||
| 647 | static struct regulator_ops wm831x_boostp_ops = { | ||
| 648 | .get_status = wm831x_boostp_get_status, | ||
| 649 | |||
| 650 | .is_enabled = wm831x_dcdc_is_enabled, | ||
| 651 | .enable = wm831x_dcdc_enable, | ||
| 652 | .disable = wm831x_dcdc_disable, | ||
| 653 | }; | ||
| 654 | |||
| 655 | static __devinit int wm831x_boostp_probe(struct platform_device *pdev) | ||
| 656 | { | ||
| 657 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 658 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 659 | int id = pdev->id % ARRAY_SIZE(pdata->dcdc); | ||
| 660 | struct wm831x_dcdc *dcdc; | ||
| 661 | struct resource *res; | ||
| 662 | int ret, irq; | ||
| 663 | |||
| 664 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); | ||
| 665 | |||
| 666 | if (pdata == NULL || pdata->dcdc[id] == NULL) | ||
| 667 | return -ENODEV; | ||
| 668 | |||
| 669 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | ||
| 670 | if (dcdc == NULL) { | ||
| 671 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 672 | return -ENOMEM; | ||
| 673 | } | ||
| 674 | |||
| 675 | dcdc->wm831x = wm831x; | ||
| 676 | |||
| 677 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | ||
| 678 | if (res == NULL) { | ||
| 679 | dev_err(&pdev->dev, "No I/O resource\n"); | ||
| 680 | ret = -EINVAL; | ||
| 681 | goto err; | ||
| 682 | } | ||
| 683 | dcdc->base = res->start; | ||
| 684 | |||
| 685 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | ||
| 686 | dcdc->desc.name = dcdc->name; | ||
| 687 | dcdc->desc.id = id; | ||
| 688 | dcdc->desc.type = REGULATOR_VOLTAGE; | ||
| 689 | dcdc->desc.ops = &wm831x_boostp_ops; | ||
| 690 | dcdc->desc.owner = THIS_MODULE; | ||
| 691 | |||
| 692 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | ||
| 693 | pdata->dcdc[id], dcdc); | ||
| 694 | if (IS_ERR(dcdc->regulator)) { | ||
| 695 | ret = PTR_ERR(dcdc->regulator); | ||
| 696 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | ||
| 697 | id + 1, ret); | ||
| 698 | goto err; | ||
| 699 | } | ||
| 700 | |||
| 701 | irq = platform_get_irq_byname(pdev, "UV"); | ||
| 702 | ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq, | ||
| 703 | IRQF_TRIGGER_RISING, dcdc->name, | ||
| 704 | dcdc); | ||
| 705 | if (ret != 0) { | ||
| 706 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | ||
| 707 | irq, ret); | ||
| 708 | goto err_regulator; | ||
| 709 | } | ||
| 710 | |||
| 711 | platform_set_drvdata(pdev, dcdc); | ||
| 712 | |||
| 713 | return 0; | ||
| 714 | |||
| 715 | err_regulator: | ||
| 716 | regulator_unregister(dcdc->regulator); | ||
| 717 | err: | ||
| 718 | kfree(dcdc); | ||
| 719 | return ret; | ||
| 720 | } | ||
| 721 | |||
| 722 | static __devexit int wm831x_boostp_remove(struct platform_device *pdev) | ||
| 723 | { | ||
| 724 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | ||
| 725 | struct wm831x *wm831x = dcdc->wm831x; | ||
| 726 | |||
| 727 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc); | ||
| 728 | regulator_unregister(dcdc->regulator); | ||
| 729 | kfree(dcdc); | ||
| 730 | |||
| 731 | return 0; | ||
| 732 | } | ||
| 733 | |||
| 734 | static struct platform_driver wm831x_boostp_driver = { | ||
| 735 | .probe = wm831x_boostp_probe, | ||
| 736 | .remove = __devexit_p(wm831x_boostp_remove), | ||
| 737 | .driver = { | ||
| 738 | .name = "wm831x-boostp", | ||
| 739 | }, | ||
| 740 | }; | ||
| 741 | |||
| 742 | /* | ||
| 743 | * External Power Enable | ||
| 744 | * | ||
| 745 | * These aren't actually DCDCs but look like them in hardware so share | ||
| 746 | * code. | ||
| 747 | */ | ||
| 748 | |||
| 749 | #define WM831X_EPE_BASE 6 | ||
| 750 | |||
| 751 | static struct regulator_ops wm831x_epe_ops = { | ||
| 752 | .is_enabled = wm831x_dcdc_is_enabled, | ||
| 753 | .enable = wm831x_dcdc_enable, | ||
| 754 | .disable = wm831x_dcdc_disable, | ||
| 755 | .get_status = wm831x_dcdc_get_status, | ||
| 756 | }; | ||
| 757 | |||
| 758 | static __devinit int wm831x_epe_probe(struct platform_device *pdev) | ||
| 759 | { | ||
| 760 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 761 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 762 | int id = pdev->id % ARRAY_SIZE(pdata->epe); | ||
| 763 | struct wm831x_dcdc *dcdc; | ||
| 764 | int ret; | ||
| 765 | |||
| 766 | dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1); | ||
| 767 | |||
| 768 | if (pdata == NULL || pdata->epe[id] == NULL) | ||
| 769 | return -ENODEV; | ||
| 770 | |||
| 771 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | ||
| 772 | if (dcdc == NULL) { | ||
| 773 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 774 | return -ENOMEM; | ||
| 775 | } | ||
| 776 | |||
| 777 | dcdc->wm831x = wm831x; | ||
| 778 | |||
| 779 | /* For current parts this is correct; probably need to revisit | ||
| 780 | * in future. | ||
| 781 | */ | ||
| 782 | snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1); | ||
| 783 | dcdc->desc.name = dcdc->name; | ||
| 784 | dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */ | ||
| 785 | dcdc->desc.ops = &wm831x_epe_ops; | ||
| 786 | dcdc->desc.type = REGULATOR_VOLTAGE; | ||
| 787 | dcdc->desc.owner = THIS_MODULE; | ||
| 788 | |||
| 789 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | ||
| 790 | pdata->epe[id], dcdc); | ||
| 791 | if (IS_ERR(dcdc->regulator)) { | ||
| 792 | ret = PTR_ERR(dcdc->regulator); | ||
| 793 | dev_err(wm831x->dev, "Failed to register EPE%d: %d\n", | ||
| 794 | id + 1, ret); | ||
| 795 | goto err; | ||
| 796 | } | ||
| 797 | |||
| 798 | platform_set_drvdata(pdev, dcdc); | ||
| 799 | |||
| 800 | return 0; | ||
| 801 | |||
| 802 | err: | ||
| 803 | kfree(dcdc); | ||
| 804 | return ret; | ||
| 805 | } | ||
| 806 | |||
| 807 | static __devexit int wm831x_epe_remove(struct platform_device *pdev) | ||
| 808 | { | ||
| 809 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | ||
| 810 | |||
| 811 | regulator_unregister(dcdc->regulator); | ||
| 812 | kfree(dcdc); | ||
| 813 | |||
| 814 | return 0; | ||
| 815 | } | ||
| 816 | |||
| 817 | static struct platform_driver wm831x_epe_driver = { | ||
| 818 | .probe = wm831x_epe_probe, | ||
| 819 | .remove = __devexit_p(wm831x_epe_remove), | ||
| 820 | .driver = { | ||
| 821 | .name = "wm831x-epe", | ||
| 822 | }, | ||
| 823 | }; | ||
| 824 | |||
| 825 | static int __init wm831x_dcdc_init(void) | ||
| 826 | { | ||
| 827 | int ret; | ||
| 828 | ret = platform_driver_register(&wm831x_buckv_driver); | ||
| 829 | if (ret != 0) | ||
| 830 | pr_err("Failed to register WM831x BUCKV driver: %d\n", ret); | ||
| 831 | |||
| 832 | ret = platform_driver_register(&wm831x_buckp_driver); | ||
| 833 | if (ret != 0) | ||
| 834 | pr_err("Failed to register WM831x BUCKP driver: %d\n", ret); | ||
| 835 | |||
| 836 | ret = platform_driver_register(&wm831x_boostp_driver); | ||
| 837 | if (ret != 0) | ||
| 838 | pr_err("Failed to register WM831x BOOST driver: %d\n", ret); | ||
| 839 | |||
| 840 | ret = platform_driver_register(&wm831x_epe_driver); | ||
| 841 | if (ret != 0) | ||
| 842 | pr_err("Failed to register WM831x EPE driver: %d\n", ret); | ||
| 843 | |||
| 844 | return 0; | ||
| 845 | } | ||
| 846 | subsys_initcall(wm831x_dcdc_init); | ||
| 847 | |||
| 848 | static void __exit wm831x_dcdc_exit(void) | ||
| 849 | { | ||
| 850 | platform_driver_unregister(&wm831x_epe_driver); | ||
| 851 | platform_driver_unregister(&wm831x_boostp_driver); | ||
| 852 | platform_driver_unregister(&wm831x_buckp_driver); | ||
| 853 | platform_driver_unregister(&wm831x_buckv_driver); | ||
| 854 | } | ||
| 855 | module_exit(wm831x_dcdc_exit); | ||
| 856 | |||
| 857 | /* Module information */ | ||
| 858 | MODULE_AUTHOR("Mark Brown"); | ||
| 859 | MODULE_DESCRIPTION("WM831x DC-DC convertor driver"); | ||
| 860 | MODULE_LICENSE("GPL"); | ||
| 861 | MODULE_ALIAS("platform:wm831x-buckv"); | ||
| 862 | MODULE_ALIAS("platform:wm831x-buckp"); | ||
diff --git a/drivers/regulator/wm831x-isink.c b/drivers/regulator/wm831x-isink.c new file mode 100644 index 000000000000..1d8d9879d3a1 --- /dev/null +++ b/drivers/regulator/wm831x-isink.c | |||
| @@ -0,0 +1,260 @@ | |||
| 1 | /* | ||
| 2 | * wm831x-isink.c -- Current sink driver for the WM831x series | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/moduleparam.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/bitops.h> | ||
| 18 | #include <linux/err.h> | ||
| 19 | #include <linux/i2c.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/regulator/driver.h> | ||
| 22 | |||
| 23 | #include <linux/mfd/wm831x/core.h> | ||
| 24 | #include <linux/mfd/wm831x/regulator.h> | ||
| 25 | #include <linux/mfd/wm831x/pdata.h> | ||
| 26 | |||
| 27 | #define WM831X_ISINK_MAX_NAME 7 | ||
| 28 | |||
| 29 | struct wm831x_isink { | ||
| 30 | char name[WM831X_ISINK_MAX_NAME]; | ||
| 31 | struct regulator_desc desc; | ||
| 32 | int reg; | ||
| 33 | struct wm831x *wm831x; | ||
| 34 | struct regulator_dev *regulator; | ||
| 35 | }; | ||
| 36 | |||
| 37 | static int wm831x_isink_enable(struct regulator_dev *rdev) | ||
| 38 | { | ||
| 39 | struct wm831x_isink *isink = rdev_get_drvdata(rdev); | ||
| 40 | struct wm831x *wm831x = isink->wm831x; | ||
| 41 | int ret; | ||
| 42 | |||
| 43 | /* We have a two stage enable: first start the ISINK... */ | ||
| 44 | ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, | ||
| 45 | WM831X_CS1_ENA); | ||
| 46 | if (ret != 0) | ||
| 47 | return ret; | ||
| 48 | |||
| 49 | /* ...then enable drive */ | ||
| 50 | ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE, | ||
| 51 | WM831X_CS1_DRIVE); | ||
| 52 | if (ret != 0) | ||
| 53 | wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0); | ||
| 54 | |||
| 55 | return ret; | ||
| 56 | |||
| 57 | } | ||
| 58 | |||
| 59 | static int wm831x_isink_disable(struct regulator_dev *rdev) | ||
| 60 | { | ||
| 61 | struct wm831x_isink *isink = rdev_get_drvdata(rdev); | ||
| 62 | struct wm831x *wm831x = isink->wm831x; | ||
| 63 | int ret; | ||
| 64 | |||
| 65 | ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE, 0); | ||
| 66 | if (ret < 0) | ||
| 67 | return ret; | ||
| 68 | |||
| 69 | ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0); | ||
| 70 | if (ret < 0) | ||
| 71 | return ret; | ||
| 72 | |||
| 73 | return ret; | ||
| 74 | |||
| 75 | } | ||
| 76 | |||
| 77 | static int wm831x_isink_is_enabled(struct regulator_dev *rdev) | ||
| 78 | { | ||
| 79 | struct wm831x_isink *isink = rdev_get_drvdata(rdev); | ||
| 80 | struct wm831x *wm831x = isink->wm831x; | ||
| 81 | int ret; | ||
| 82 | |||
| 83 | ret = wm831x_reg_read(wm831x, isink->reg); | ||
| 84 | if (ret < 0) | ||
| 85 | return ret; | ||
| 86 | |||
| 87 | if ((ret & (WM831X_CS1_ENA | WM831X_CS1_DRIVE)) == | ||
| 88 | (WM831X_CS1_ENA | WM831X_CS1_DRIVE)) | ||
| 89 | return 1; | ||
| 90 | else | ||
| 91 | return 0; | ||
| 92 | } | ||
| 93 | |||
| 94 | static int wm831x_isink_set_current(struct regulator_dev *rdev, | ||
| 95 | int min_uA, int max_uA) | ||
| 96 | { | ||
| 97 | struct wm831x_isink *isink = rdev_get_drvdata(rdev); | ||
| 98 | struct wm831x *wm831x = isink->wm831x; | ||
| 99 | int ret, i; | ||
| 100 | |||
| 101 | for (i = 0; i < ARRAY_SIZE(wm831x_isinkv_values); i++) { | ||
| 102 | int val = wm831x_isinkv_values[i]; | ||
| 103 | if (min_uA >= val && val <= max_uA) { | ||
| 104 | ret = wm831x_set_bits(wm831x, isink->reg, | ||
| 105 | WM831X_CS1_ISEL_MASK, i); | ||
| 106 | return ret; | ||
| 107 | } | ||
| 108 | } | ||
| 109 | |||
| 110 | return -EINVAL; | ||
| 111 | } | ||
| 112 | |||
| 113 | static int wm831x_isink_get_current(struct regulator_dev *rdev) | ||
| 114 | { | ||
| 115 | struct wm831x_isink *isink = rdev_get_drvdata(rdev); | ||
| 116 | struct wm831x *wm831x = isink->wm831x; | ||
| 117 | int ret; | ||
| 118 | |||
| 119 | ret = wm831x_reg_read(wm831x, isink->reg); | ||
| 120 | if (ret < 0) | ||
| 121 | return ret; | ||
| 122 | |||
| 123 | ret &= WM831X_CS1_ISEL_MASK; | ||
| 124 | if (ret > WM831X_ISINK_MAX_ISEL) | ||
| 125 | ret = WM831X_ISINK_MAX_ISEL; | ||
| 126 | |||
| 127 | return wm831x_isinkv_values[ret]; | ||
| 128 | } | ||
| 129 | |||
| 130 | static struct regulator_ops wm831x_isink_ops = { | ||
| 131 | .is_enabled = wm831x_isink_is_enabled, | ||
| 132 | .enable = wm831x_isink_enable, | ||
| 133 | .disable = wm831x_isink_disable, | ||
| 134 | .set_current_limit = wm831x_isink_set_current, | ||
| 135 | .get_current_limit = wm831x_isink_get_current, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static irqreturn_t wm831x_isink_irq(int irq, void *data) | ||
| 139 | { | ||
| 140 | struct wm831x_isink *isink = data; | ||
| 141 | |||
| 142 | regulator_notifier_call_chain(isink->regulator, | ||
| 143 | REGULATOR_EVENT_OVER_CURRENT, | ||
| 144 | NULL); | ||
| 145 | |||
| 146 | return IRQ_HANDLED; | ||
| 147 | } | ||
| 148 | |||
| 149 | |||
| 150 | static __devinit int wm831x_isink_probe(struct platform_device *pdev) | ||
| 151 | { | ||
| 152 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 153 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 154 | struct wm831x_isink *isink; | ||
| 155 | int id = pdev->id % ARRAY_SIZE(pdata->isink); | ||
| 156 | struct resource *res; | ||
| 157 | int ret, irq; | ||
| 158 | |||
| 159 | dev_dbg(&pdev->dev, "Probing ISINK%d\n", id + 1); | ||
| 160 | |||
| 161 | if (pdata == NULL || pdata->isink[id] == NULL) | ||
| 162 | return -ENODEV; | ||
| 163 | |||
| 164 | isink = kzalloc(sizeof(struct wm831x_isink), GFP_KERNEL); | ||
| 165 | if (isink == NULL) { | ||
| 166 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 167 | return -ENOMEM; | ||
| 168 | } | ||
| 169 | |||
| 170 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | ||
| 171 | if (res == NULL) { | ||
| 172 | dev_err(&pdev->dev, "No I/O resource\n"); | ||
| 173 | ret = -EINVAL; | ||
| 174 | goto err; | ||
| 175 | } | ||
| 176 | isink->reg = res->start; | ||
| 177 | |||
| 178 | /* For current parts this is correct; probably need to revisit | ||
| 179 | * in future. | ||
| 180 | */ | ||
| 181 | snprintf(isink->name, sizeof(isink->name), "ISINK%d", id + 1); | ||
| 182 | isink->desc.name = isink->name; | ||
| 183 | isink->desc.id = id; | ||
| 184 | isink->desc.ops = &wm831x_isink_ops; | ||
| 185 | isink->desc.type = REGULATOR_CURRENT; | ||
| 186 | isink->desc.owner = THIS_MODULE; | ||
| 187 | |||
| 188 | isink->regulator = regulator_register(&isink->desc, &pdev->dev, | ||
| 189 | pdata->isink[id], isink); | ||
| 190 | if (IS_ERR(isink->regulator)) { | ||
| 191 | ret = PTR_ERR(isink->regulator); | ||
| 192 | dev_err(wm831x->dev, "Failed to register ISINK%d: %d\n", | ||
| 193 | id + 1, ret); | ||
| 194 | goto err; | ||
| 195 | } | ||
| 196 | |||
| 197 | irq = platform_get_irq(pdev, 0); | ||
| 198 | ret = wm831x_request_irq(wm831x, irq, wm831x_isink_irq, | ||
| 199 | IRQF_TRIGGER_RISING, isink->name, | ||
| 200 | isink); | ||
| 201 | if (ret != 0) { | ||
| 202 | dev_err(&pdev->dev, "Failed to request ISINK IRQ %d: %d\n", | ||
| 203 | irq, ret); | ||
| 204 | goto err_regulator; | ||
| 205 | } | ||
| 206 | |||
| 207 | platform_set_drvdata(pdev, isink); | ||
| 208 | |||
| 209 | return 0; | ||
| 210 | |||
| 211 | err_regulator: | ||
| 212 | regulator_unregister(isink->regulator); | ||
| 213 | err: | ||
| 214 | kfree(isink); | ||
| 215 | return ret; | ||
| 216 | } | ||
| 217 | |||
| 218 | static __devexit int wm831x_isink_remove(struct platform_device *pdev) | ||
| 219 | { | ||
| 220 | struct wm831x_isink *isink = platform_get_drvdata(pdev); | ||
| 221 | struct wm831x *wm831x = isink->wm831x; | ||
| 222 | |||
| 223 | wm831x_free_irq(wm831x, platform_get_irq(pdev, 0), isink); | ||
| 224 | |||
| 225 | regulator_unregister(isink->regulator); | ||
| 226 | kfree(isink); | ||
| 227 | |||
| 228 | return 0; | ||
| 229 | } | ||
| 230 | |||
| 231 | static struct platform_driver wm831x_isink_driver = { | ||
| 232 | .probe = wm831x_isink_probe, | ||
| 233 | .remove = __devexit_p(wm831x_isink_remove), | ||
| 234 | .driver = { | ||
| 235 | .name = "wm831x-isink", | ||
| 236 | }, | ||
| 237 | }; | ||
| 238 | |||
| 239 | static int __init wm831x_isink_init(void) | ||
| 240 | { | ||
| 241 | int ret; | ||
| 242 | ret = platform_driver_register(&wm831x_isink_driver); | ||
| 243 | if (ret != 0) | ||
| 244 | pr_err("Failed to register WM831x ISINK driver: %d\n", ret); | ||
| 245 | |||
| 246 | return ret; | ||
| 247 | } | ||
| 248 | subsys_initcall(wm831x_isink_init); | ||
| 249 | |||
| 250 | static void __exit wm831x_isink_exit(void) | ||
| 251 | { | ||
| 252 | platform_driver_unregister(&wm831x_isink_driver); | ||
| 253 | } | ||
| 254 | module_exit(wm831x_isink_exit); | ||
| 255 | |||
| 256 | /* Module information */ | ||
| 257 | MODULE_AUTHOR("Mark Brown"); | ||
| 258 | MODULE_DESCRIPTION("WM831x current sink driver"); | ||
| 259 | MODULE_LICENSE("GPL"); | ||
| 260 | MODULE_ALIAS("platform:wm831x-isink"); | ||
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c new file mode 100644 index 000000000000..bb61aede4801 --- /dev/null +++ b/drivers/regulator/wm831x-ldo.c | |||
| @@ -0,0 +1,852 @@ | |||
| 1 | /* | ||
| 2 | * wm831x-ldo.c -- LDO driver for the WM831x series | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/module.h> | ||
| 15 | #include <linux/moduleparam.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/bitops.h> | ||
| 18 | #include <linux/err.h> | ||
| 19 | #include <linux/i2c.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/regulator/driver.h> | ||
| 22 | |||
| 23 | #include <linux/mfd/wm831x/core.h> | ||
| 24 | #include <linux/mfd/wm831x/regulator.h> | ||
| 25 | #include <linux/mfd/wm831x/pdata.h> | ||
| 26 | |||
| 27 | #define WM831X_LDO_MAX_NAME 6 | ||
| 28 | |||
| 29 | #define WM831X_LDO_CONTROL 0 | ||
| 30 | #define WM831X_LDO_ON_CONTROL 1 | ||
| 31 | #define WM831X_LDO_SLEEP_CONTROL 2 | ||
| 32 | |||
| 33 | #define WM831X_ALIVE_LDO_ON_CONTROL 0 | ||
| 34 | #define WM831X_ALIVE_LDO_SLEEP_CONTROL 1 | ||
| 35 | |||
| 36 | struct wm831x_ldo { | ||
| 37 | char name[WM831X_LDO_MAX_NAME]; | ||
| 38 | struct regulator_desc desc; | ||
| 39 | int base; | ||
| 40 | struct wm831x *wm831x; | ||
| 41 | struct regulator_dev *regulator; | ||
| 42 | }; | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Shared | ||
| 46 | */ | ||
| 47 | |||
| 48 | static int wm831x_ldo_is_enabled(struct regulator_dev *rdev) | ||
| 49 | { | ||
| 50 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 51 | struct wm831x *wm831x = ldo->wm831x; | ||
| 52 | int mask = 1 << rdev_get_id(rdev); | ||
| 53 | int reg; | ||
| 54 | |||
| 55 | reg = wm831x_reg_read(wm831x, WM831X_LDO_ENABLE); | ||
| 56 | if (reg < 0) | ||
| 57 | return reg; | ||
| 58 | |||
| 59 | if (reg & mask) | ||
| 60 | return 1; | ||
| 61 | else | ||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | static int wm831x_ldo_enable(struct regulator_dev *rdev) | ||
| 66 | { | ||
| 67 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 68 | struct wm831x *wm831x = ldo->wm831x; | ||
| 69 | int mask = 1 << rdev_get_id(rdev); | ||
| 70 | |||
| 71 | return wm831x_set_bits(wm831x, WM831X_LDO_ENABLE, mask, mask); | ||
| 72 | } | ||
| 73 | |||
| 74 | static int wm831x_ldo_disable(struct regulator_dev *rdev) | ||
| 75 | { | ||
| 76 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 77 | struct wm831x *wm831x = ldo->wm831x; | ||
| 78 | int mask = 1 << rdev_get_id(rdev); | ||
| 79 | |||
| 80 | return wm831x_set_bits(wm831x, WM831X_LDO_ENABLE, mask, 0); | ||
| 81 | } | ||
| 82 | |||
| 83 | static irqreturn_t wm831x_ldo_uv_irq(int irq, void *data) | ||
| 84 | { | ||
| 85 | struct wm831x_ldo *ldo = data; | ||
| 86 | |||
| 87 | regulator_notifier_call_chain(ldo->regulator, | ||
| 88 | REGULATOR_EVENT_UNDER_VOLTAGE, | ||
| 89 | NULL); | ||
| 90 | |||
| 91 | return IRQ_HANDLED; | ||
| 92 | } | ||
| 93 | |||
| 94 | /* | ||
| 95 | * General purpose LDOs | ||
| 96 | */ | ||
| 97 | |||
| 98 | #define WM831X_GP_LDO_SELECTOR_LOW 0xe | ||
| 99 | #define WM831X_GP_LDO_MAX_SELECTOR 0x1f | ||
| 100 | |||
| 101 | static int wm831x_gp_ldo_list_voltage(struct regulator_dev *rdev, | ||
| 102 | unsigned int selector) | ||
| 103 | { | ||
| 104 | /* 0.9-1.6V in 50mV steps */ | ||
| 105 | if (selector <= WM831X_GP_LDO_SELECTOR_LOW) | ||
| 106 | return 900000 + (selector * 50000); | ||
| 107 | /* 1.7-3.3V in 50mV steps */ | ||
| 108 | if (selector <= WM831X_GP_LDO_MAX_SELECTOR) | ||
| 109 | return 1600000 + ((selector - WM831X_GP_LDO_SELECTOR_LOW) | ||
| 110 | * 100000); | ||
| 111 | return -EINVAL; | ||
| 112 | } | ||
| 113 | |||
| 114 | static int wm831x_gp_ldo_set_voltage_int(struct regulator_dev *rdev, int reg, | ||
| 115 | int min_uV, int max_uV) | ||
| 116 | { | ||
| 117 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 118 | struct wm831x *wm831x = ldo->wm831x; | ||
| 119 | int vsel, ret; | ||
| 120 | |||
| 121 | if (min_uV < 900000) | ||
| 122 | vsel = 0; | ||
| 123 | else if (min_uV < 1700000) | ||
| 124 | vsel = ((min_uV - 900000) / 50000); | ||
| 125 | else | ||
| 126 | vsel = ((min_uV - 1700000) / 100000) | ||
| 127 | + WM831X_GP_LDO_SELECTOR_LOW + 1; | ||
| 128 | |||
| 129 | ret = wm831x_gp_ldo_list_voltage(rdev, vsel); | ||
| 130 | if (ret < 0) | ||
| 131 | return ret; | ||
| 132 | if (ret < min_uV || ret > max_uV) | ||
| 133 | return -EINVAL; | ||
| 134 | |||
| 135 | return wm831x_set_bits(wm831x, reg, WM831X_LDO1_ON_VSEL_MASK, vsel); | ||
| 136 | } | ||
| 137 | |||
| 138 | static int wm831x_gp_ldo_set_voltage(struct regulator_dev *rdev, | ||
| 139 | int min_uV, int max_uV) | ||
| 140 | { | ||
| 141 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 142 | int reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 143 | |||
| 144 | return wm831x_gp_ldo_set_voltage_int(rdev, reg, min_uV, max_uV); | ||
| 145 | } | ||
| 146 | |||
| 147 | static int wm831x_gp_ldo_set_suspend_voltage(struct regulator_dev *rdev, | ||
| 148 | int uV) | ||
| 149 | { | ||
| 150 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 151 | int reg = ldo->base + WM831X_LDO_SLEEP_CONTROL; | ||
| 152 | |||
| 153 | return wm831x_gp_ldo_set_voltage_int(rdev, reg, uV, uV); | ||
| 154 | } | ||
| 155 | |||
| 156 | static int wm831x_gp_ldo_get_voltage(struct regulator_dev *rdev) | ||
| 157 | { | ||
| 158 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 159 | struct wm831x *wm831x = ldo->wm831x; | ||
| 160 | int reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 161 | int ret; | ||
| 162 | |||
| 163 | ret = wm831x_reg_read(wm831x, reg); | ||
| 164 | if (ret < 0) | ||
| 165 | return ret; | ||
| 166 | |||
| 167 | ret &= WM831X_LDO1_ON_VSEL_MASK; | ||
| 168 | |||
| 169 | return wm831x_gp_ldo_list_voltage(rdev, ret); | ||
| 170 | } | ||
| 171 | |||
| 172 | static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev) | ||
| 173 | { | ||
| 174 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 175 | struct wm831x *wm831x = ldo->wm831x; | ||
| 176 | int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; | ||
| 177 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 178 | unsigned int ret; | ||
| 179 | |||
| 180 | ret = wm831x_reg_read(wm831x, on_reg); | ||
| 181 | if (ret < 0) | ||
| 182 | return 0; | ||
| 183 | |||
| 184 | if (!(ret & WM831X_LDO1_ON_MODE)) | ||
| 185 | return REGULATOR_MODE_NORMAL; | ||
| 186 | |||
| 187 | ret = wm831x_reg_read(wm831x, ctrl_reg); | ||
| 188 | if (ret < 0) | ||
| 189 | return 0; | ||
| 190 | |||
| 191 | if (ret & WM831X_LDO1_LP_MODE) | ||
| 192 | return REGULATOR_MODE_STANDBY; | ||
| 193 | else | ||
| 194 | return REGULATOR_MODE_IDLE; | ||
| 195 | } | ||
| 196 | |||
| 197 | static int wm831x_gp_ldo_set_mode(struct regulator_dev *rdev, | ||
| 198 | unsigned int mode) | ||
| 199 | { | ||
| 200 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 201 | struct wm831x *wm831x = ldo->wm831x; | ||
| 202 | int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; | ||
| 203 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 204 | int ret; | ||
| 205 | |||
| 206 | |||
| 207 | switch (mode) { | ||
| 208 | case REGULATOR_MODE_NORMAL: | ||
| 209 | ret = wm831x_set_bits(wm831x, on_reg, | ||
| 210 | WM831X_LDO1_ON_MODE, 0); | ||
| 211 | if (ret < 0) | ||
| 212 | return ret; | ||
| 213 | break; | ||
| 214 | |||
| 215 | case REGULATOR_MODE_IDLE: | ||
| 216 | ret = wm831x_set_bits(wm831x, ctrl_reg, | ||
| 217 | WM831X_LDO1_LP_MODE, | ||
| 218 | WM831X_LDO1_LP_MODE); | ||
| 219 | if (ret < 0) | ||
| 220 | return ret; | ||
| 221 | |||
| 222 | ret = wm831x_set_bits(wm831x, on_reg, | ||
| 223 | WM831X_LDO1_ON_MODE, | ||
| 224 | WM831X_LDO1_ON_MODE); | ||
| 225 | if (ret < 0) | ||
| 226 | return ret; | ||
| 227 | |||
| 228 | case REGULATOR_MODE_STANDBY: | ||
| 229 | ret = wm831x_set_bits(wm831x, ctrl_reg, | ||
| 230 | WM831X_LDO1_LP_MODE, 0); | ||
| 231 | if (ret < 0) | ||
| 232 | return ret; | ||
| 233 | |||
| 234 | ret = wm831x_set_bits(wm831x, on_reg, | ||
| 235 | WM831X_LDO1_ON_MODE, | ||
| 236 | WM831X_LDO1_ON_MODE); | ||
| 237 | if (ret < 0) | ||
| 238 | return ret; | ||
| 239 | break; | ||
| 240 | |||
| 241 | default: | ||
| 242 | return -EINVAL; | ||
| 243 | } | ||
| 244 | |||
| 245 | return 0; | ||
| 246 | } | ||
| 247 | |||
| 248 | static int wm831x_gp_ldo_get_status(struct regulator_dev *rdev) | ||
| 249 | { | ||
| 250 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 251 | struct wm831x *wm831x = ldo->wm831x; | ||
| 252 | int mask = 1 << rdev_get_id(rdev); | ||
| 253 | int ret; | ||
| 254 | |||
| 255 | /* Is the regulator on? */ | ||
| 256 | ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS); | ||
| 257 | if (ret < 0) | ||
| 258 | return ret; | ||
| 259 | if (!(ret & mask)) | ||
| 260 | return REGULATOR_STATUS_OFF; | ||
| 261 | |||
| 262 | /* Is it reporting under voltage? */ | ||
| 263 | ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS); | ||
| 264 | if (ret & mask) | ||
| 265 | return REGULATOR_STATUS_ERROR; | ||
| 266 | |||
| 267 | ret = wm831x_gp_ldo_get_mode(rdev); | ||
| 268 | if (ret < 0) | ||
| 269 | return ret; | ||
| 270 | else | ||
| 271 | return regulator_mode_to_status(ret); | ||
| 272 | } | ||
| 273 | |||
| 274 | static unsigned int wm831x_gp_ldo_get_optimum_mode(struct regulator_dev *rdev, | ||
| 275 | int input_uV, | ||
| 276 | int output_uV, int load_uA) | ||
| 277 | { | ||
| 278 | if (load_uA < 20000) | ||
| 279 | return REGULATOR_MODE_STANDBY; | ||
| 280 | if (load_uA < 50000) | ||
| 281 | return REGULATOR_MODE_IDLE; | ||
| 282 | return REGULATOR_MODE_NORMAL; | ||
| 283 | } | ||
| 284 | |||
| 285 | |||
| 286 | static struct regulator_ops wm831x_gp_ldo_ops = { | ||
| 287 | .list_voltage = wm831x_gp_ldo_list_voltage, | ||
| 288 | .get_voltage = wm831x_gp_ldo_get_voltage, | ||
| 289 | .set_voltage = wm831x_gp_ldo_set_voltage, | ||
| 290 | .set_suspend_voltage = wm831x_gp_ldo_set_suspend_voltage, | ||
| 291 | .get_mode = wm831x_gp_ldo_get_mode, | ||
| 292 | .set_mode = wm831x_gp_ldo_set_mode, | ||
| 293 | .get_status = wm831x_gp_ldo_get_status, | ||
| 294 | .get_optimum_mode = wm831x_gp_ldo_get_optimum_mode, | ||
| 295 | |||
| 296 | .is_enabled = wm831x_ldo_is_enabled, | ||
| 297 | .enable = wm831x_ldo_enable, | ||
| 298 | .disable = wm831x_ldo_disable, | ||
| 299 | }; | ||
| 300 | |||
| 301 | static __devinit int wm831x_gp_ldo_probe(struct platform_device *pdev) | ||
| 302 | { | ||
| 303 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 304 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 305 | int id = pdev->id % ARRAY_SIZE(pdata->ldo); | ||
| 306 | struct wm831x_ldo *ldo; | ||
| 307 | struct resource *res; | ||
| 308 | int ret, irq; | ||
| 309 | |||
| 310 | dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1); | ||
| 311 | |||
| 312 | if (pdata == NULL || pdata->ldo[id] == NULL) | ||
| 313 | return -ENODEV; | ||
| 314 | |||
| 315 | ldo = kzalloc(sizeof(struct wm831x_ldo), GFP_KERNEL); | ||
| 316 | if (ldo == NULL) { | ||
| 317 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 318 | return -ENOMEM; | ||
| 319 | } | ||
| 320 | |||
| 321 | ldo->wm831x = wm831x; | ||
| 322 | |||
| 323 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | ||
| 324 | if (res == NULL) { | ||
| 325 | dev_err(&pdev->dev, "No I/O resource\n"); | ||
| 326 | ret = -EINVAL; | ||
| 327 | goto err; | ||
| 328 | } | ||
| 329 | ldo->base = res->start; | ||
| 330 | |||
| 331 | snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1); | ||
| 332 | ldo->desc.name = ldo->name; | ||
| 333 | ldo->desc.id = id; | ||
| 334 | ldo->desc.type = REGULATOR_VOLTAGE; | ||
| 335 | ldo->desc.n_voltages = WM831X_GP_LDO_MAX_SELECTOR + 1; | ||
| 336 | ldo->desc.ops = &wm831x_gp_ldo_ops; | ||
| 337 | ldo->desc.owner = THIS_MODULE; | ||
| 338 | |||
| 339 | ldo->regulator = regulator_register(&ldo->desc, &pdev->dev, | ||
| 340 | pdata->ldo[id], ldo); | ||
| 341 | if (IS_ERR(ldo->regulator)) { | ||
| 342 | ret = PTR_ERR(ldo->regulator); | ||
| 343 | dev_err(wm831x->dev, "Failed to register LDO%d: %d\n", | ||
| 344 | id + 1, ret); | ||
| 345 | goto err; | ||
| 346 | } | ||
| 347 | |||
| 348 | irq = platform_get_irq_byname(pdev, "UV"); | ||
| 349 | ret = wm831x_request_irq(wm831x, irq, wm831x_ldo_uv_irq, | ||
| 350 | IRQF_TRIGGER_RISING, ldo->name, | ||
| 351 | ldo); | ||
| 352 | if (ret != 0) { | ||
| 353 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | ||
| 354 | irq, ret); | ||
| 355 | goto err_regulator; | ||
| 356 | } | ||
| 357 | |||
| 358 | platform_set_drvdata(pdev, ldo); | ||
| 359 | |||
| 360 | return 0; | ||
| 361 | |||
| 362 | err_regulator: | ||
| 363 | regulator_unregister(ldo->regulator); | ||
| 364 | err: | ||
| 365 | kfree(ldo); | ||
| 366 | return ret; | ||
| 367 | } | ||
| 368 | |||
| 369 | static __devexit int wm831x_gp_ldo_remove(struct platform_device *pdev) | ||
| 370 | { | ||
| 371 | struct wm831x_ldo *ldo = platform_get_drvdata(pdev); | ||
| 372 | struct wm831x *wm831x = ldo->wm831x; | ||
| 373 | |||
| 374 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), ldo); | ||
| 375 | regulator_unregister(ldo->regulator); | ||
| 376 | kfree(ldo); | ||
| 377 | |||
| 378 | return 0; | ||
| 379 | } | ||
| 380 | |||
| 381 | static struct platform_driver wm831x_gp_ldo_driver = { | ||
| 382 | .probe = wm831x_gp_ldo_probe, | ||
| 383 | .remove = __devexit_p(wm831x_gp_ldo_remove), | ||
| 384 | .driver = { | ||
| 385 | .name = "wm831x-ldo", | ||
| 386 | }, | ||
| 387 | }; | ||
| 388 | |||
| 389 | /* | ||
| 390 | * Analogue LDOs | ||
| 391 | */ | ||
| 392 | |||
| 393 | |||
| 394 | #define WM831X_ALDO_SELECTOR_LOW 0xc | ||
| 395 | #define WM831X_ALDO_MAX_SELECTOR 0x1f | ||
| 396 | |||
| 397 | static int wm831x_aldo_list_voltage(struct regulator_dev *rdev, | ||
| 398 | unsigned int selector) | ||
| 399 | { | ||
| 400 | /* 1-1.6V in 50mV steps */ | ||
| 401 | if (selector <= WM831X_ALDO_SELECTOR_LOW) | ||
| 402 | return 1000000 + (selector * 50000); | ||
| 403 | /* 1.7-3.5V in 50mV steps */ | ||
| 404 | if (selector <= WM831X_ALDO_MAX_SELECTOR) | ||
| 405 | return 1600000 + ((selector - WM831X_ALDO_SELECTOR_LOW) | ||
| 406 | * 100000); | ||
| 407 | return -EINVAL; | ||
| 408 | } | ||
| 409 | |||
| 410 | static int wm831x_aldo_set_voltage_int(struct regulator_dev *rdev, int reg, | ||
| 411 | int min_uV, int max_uV) | ||
| 412 | { | ||
| 413 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 414 | struct wm831x *wm831x = ldo->wm831x; | ||
| 415 | int vsel, ret; | ||
| 416 | |||
| 417 | if (min_uV < 1000000) | ||
| 418 | vsel = 0; | ||
| 419 | else if (min_uV < 1700000) | ||
| 420 | vsel = ((min_uV - 1000000) / 50000); | ||
| 421 | else | ||
| 422 | vsel = ((min_uV - 1700000) / 100000) | ||
| 423 | + WM831X_ALDO_SELECTOR_LOW + 1; | ||
| 424 | |||
| 425 | ret = wm831x_aldo_list_voltage(rdev, vsel); | ||
| 426 | if (ret < 0) | ||
| 427 | return ret; | ||
| 428 | if (ret < min_uV || ret > max_uV) | ||
| 429 | return -EINVAL; | ||
| 430 | |||
| 431 | return wm831x_set_bits(wm831x, reg, WM831X_LDO7_ON_VSEL_MASK, vsel); | ||
| 432 | } | ||
| 433 | |||
| 434 | static int wm831x_aldo_set_voltage(struct regulator_dev *rdev, | ||
| 435 | int min_uV, int max_uV) | ||
| 436 | { | ||
| 437 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 438 | int reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 439 | |||
| 440 | return wm831x_aldo_set_voltage_int(rdev, reg, min_uV, max_uV); | ||
| 441 | } | ||
| 442 | |||
| 443 | static int wm831x_aldo_set_suspend_voltage(struct regulator_dev *rdev, | ||
| 444 | int uV) | ||
| 445 | { | ||
| 446 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 447 | int reg = ldo->base + WM831X_LDO_SLEEP_CONTROL; | ||
| 448 | |||
| 449 | return wm831x_aldo_set_voltage_int(rdev, reg, uV, uV); | ||
| 450 | } | ||
| 451 | |||
| 452 | static int wm831x_aldo_get_voltage(struct regulator_dev *rdev) | ||
| 453 | { | ||
| 454 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 455 | struct wm831x *wm831x = ldo->wm831x; | ||
| 456 | int reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 457 | int ret; | ||
| 458 | |||
| 459 | ret = wm831x_reg_read(wm831x, reg); | ||
| 460 | if (ret < 0) | ||
| 461 | return ret; | ||
| 462 | |||
| 463 | ret &= WM831X_LDO7_ON_VSEL_MASK; | ||
| 464 | |||
| 465 | return wm831x_aldo_list_voltage(rdev, ret); | ||
| 466 | } | ||
| 467 | |||
| 468 | static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev) | ||
| 469 | { | ||
| 470 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 471 | struct wm831x *wm831x = ldo->wm831x; | ||
| 472 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 473 | unsigned int ret; | ||
| 474 | |||
| 475 | ret = wm831x_reg_read(wm831x, on_reg); | ||
| 476 | if (ret < 0) | ||
| 477 | return 0; | ||
| 478 | |||
| 479 | if (ret & WM831X_LDO7_ON_MODE) | ||
| 480 | return REGULATOR_MODE_IDLE; | ||
| 481 | else | ||
| 482 | return REGULATOR_MODE_NORMAL; | ||
| 483 | } | ||
| 484 | |||
| 485 | static int wm831x_aldo_set_mode(struct regulator_dev *rdev, | ||
| 486 | unsigned int mode) | ||
| 487 | { | ||
| 488 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 489 | struct wm831x *wm831x = ldo->wm831x; | ||
| 490 | int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; | ||
| 491 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; | ||
| 492 | int ret; | ||
| 493 | |||
| 494 | |||
| 495 | switch (mode) { | ||
| 496 | case REGULATOR_MODE_NORMAL: | ||
| 497 | ret = wm831x_set_bits(wm831x, on_reg, | ||
| 498 | WM831X_LDO7_ON_MODE, 0); | ||
| 499 | if (ret < 0) | ||
| 500 | return ret; | ||
| 501 | break; | ||
| 502 | |||
| 503 | case REGULATOR_MODE_IDLE: | ||
| 504 | ret = wm831x_set_bits(wm831x, ctrl_reg, | ||
| 505 | WM831X_LDO7_ON_MODE, | ||
| 506 | WM831X_LDO7_ON_MODE); | ||
| 507 | if (ret < 0) | ||
| 508 | return ret; | ||
| 509 | break; | ||
| 510 | |||
| 511 | default: | ||
| 512 | return -EINVAL; | ||
| 513 | } | ||
| 514 | |||
| 515 | return 0; | ||
| 516 | } | ||
| 517 | |||
| 518 | static int wm831x_aldo_get_status(struct regulator_dev *rdev) | ||
| 519 | { | ||
| 520 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 521 | struct wm831x *wm831x = ldo->wm831x; | ||
| 522 | int mask = 1 << rdev_get_id(rdev); | ||
| 523 | int ret; | ||
| 524 | |||
| 525 | /* Is the regulator on? */ | ||
| 526 | ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS); | ||
| 527 | if (ret < 0) | ||
| 528 | return ret; | ||
| 529 | if (!(ret & mask)) | ||
| 530 | return REGULATOR_STATUS_OFF; | ||
| 531 | |||
| 532 | /* Is it reporting under voltage? */ | ||
| 533 | ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS); | ||
| 534 | if (ret & mask) | ||
| 535 | return REGULATOR_STATUS_ERROR; | ||
| 536 | |||
| 537 | ret = wm831x_aldo_get_mode(rdev); | ||
| 538 | if (ret < 0) | ||
| 539 | return ret; | ||
| 540 | else | ||
| 541 | return regulator_mode_to_status(ret); | ||
| 542 | } | ||
| 543 | |||
| 544 | static struct regulator_ops wm831x_aldo_ops = { | ||
| 545 | .list_voltage = wm831x_aldo_list_voltage, | ||
| 546 | .get_voltage = wm831x_aldo_get_voltage, | ||
| 547 | .set_voltage = wm831x_aldo_set_voltage, | ||
| 548 | .set_suspend_voltage = wm831x_aldo_set_suspend_voltage, | ||
| 549 | .get_mode = wm831x_aldo_get_mode, | ||
| 550 | .set_mode = wm831x_aldo_set_mode, | ||
| 551 | .get_status = wm831x_aldo_get_status, | ||
| 552 | |||
| 553 | .is_enabled = wm831x_ldo_is_enabled, | ||
| 554 | .enable = wm831x_ldo_enable, | ||
| 555 | .disable = wm831x_ldo_disable, | ||
| 556 | }; | ||
| 557 | |||
| 558 | static __devinit int wm831x_aldo_probe(struct platform_device *pdev) | ||
| 559 | { | ||
| 560 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 561 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 562 | int id = pdev->id % ARRAY_SIZE(pdata->ldo); | ||
| 563 | struct wm831x_ldo *ldo; | ||
| 564 | struct resource *res; | ||
| 565 | int ret, irq; | ||
| 566 | |||
| 567 | dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1); | ||
| 568 | |||
| 569 | if (pdata == NULL || pdata->ldo[id] == NULL) | ||
| 570 | return -ENODEV; | ||
| 571 | |||
| 572 | ldo = kzalloc(sizeof(struct wm831x_ldo), GFP_KERNEL); | ||
| 573 | if (ldo == NULL) { | ||
| 574 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 575 | return -ENOMEM; | ||
| 576 | } | ||
| 577 | |||
| 578 | ldo->wm831x = wm831x; | ||
| 579 | |||
| 580 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | ||
| 581 | if (res == NULL) { | ||
| 582 | dev_err(&pdev->dev, "No I/O resource\n"); | ||
| 583 | ret = -EINVAL; | ||
| 584 | goto err; | ||
| 585 | } | ||
| 586 | ldo->base = res->start; | ||
| 587 | |||
| 588 | snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1); | ||
| 589 | ldo->desc.name = ldo->name; | ||
| 590 | ldo->desc.id = id; | ||
| 591 | ldo->desc.type = REGULATOR_VOLTAGE; | ||
| 592 | ldo->desc.n_voltages = WM831X_ALDO_MAX_SELECTOR + 1; | ||
| 593 | ldo->desc.ops = &wm831x_aldo_ops; | ||
| 594 | ldo->desc.owner = THIS_MODULE; | ||
| 595 | |||
| 596 | ldo->regulator = regulator_register(&ldo->desc, &pdev->dev, | ||
| 597 | pdata->ldo[id], ldo); | ||
| 598 | if (IS_ERR(ldo->regulator)) { | ||
| 599 | ret = PTR_ERR(ldo->regulator); | ||
| 600 | dev_err(wm831x->dev, "Failed to register LDO%d: %d\n", | ||
| 601 | id + 1, ret); | ||
| 602 | goto err; | ||
| 603 | } | ||
| 604 | |||
| 605 | irq = platform_get_irq_byname(pdev, "UV"); | ||
| 606 | ret = wm831x_request_irq(wm831x, irq, wm831x_ldo_uv_irq, | ||
| 607 | IRQF_TRIGGER_RISING, ldo->name, | ||
| 608 | ldo); | ||
| 609 | if (ret != 0) { | ||
| 610 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | ||
| 611 | irq, ret); | ||
| 612 | goto err_regulator; | ||
| 613 | } | ||
| 614 | |||
| 615 | platform_set_drvdata(pdev, ldo); | ||
| 616 | |||
| 617 | return 0; | ||
| 618 | |||
| 619 | err_regulator: | ||
| 620 | regulator_unregister(ldo->regulator); | ||
| 621 | err: | ||
| 622 | kfree(ldo); | ||
| 623 | return ret; | ||
| 624 | } | ||
| 625 | |||
| 626 | static __devexit int wm831x_aldo_remove(struct platform_device *pdev) | ||
| 627 | { | ||
| 628 | struct wm831x_ldo *ldo = platform_get_drvdata(pdev); | ||
| 629 | struct wm831x *wm831x = ldo->wm831x; | ||
| 630 | |||
| 631 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), ldo); | ||
| 632 | regulator_unregister(ldo->regulator); | ||
| 633 | kfree(ldo); | ||
| 634 | |||
| 635 | return 0; | ||
| 636 | } | ||
| 637 | |||
| 638 | static struct platform_driver wm831x_aldo_driver = { | ||
| 639 | .probe = wm831x_aldo_probe, | ||
| 640 | .remove = __devexit_p(wm831x_aldo_remove), | ||
| 641 | .driver = { | ||
| 642 | .name = "wm831x-aldo", | ||
| 643 | }, | ||
| 644 | }; | ||
| 645 | |||
| 646 | /* | ||
| 647 | * Alive LDO | ||
| 648 | */ | ||
| 649 | |||
| 650 | #define WM831X_ALIVE_LDO_MAX_SELECTOR 0xf | ||
| 651 | |||
| 652 | static int wm831x_alive_ldo_list_voltage(struct regulator_dev *rdev, | ||
| 653 | unsigned int selector) | ||
| 654 | { | ||
| 655 | /* 0.8-1.55V in 50mV steps */ | ||
| 656 | if (selector <= WM831X_ALIVE_LDO_MAX_SELECTOR) | ||
| 657 | return 800000 + (selector * 50000); | ||
| 658 | return -EINVAL; | ||
| 659 | } | ||
| 660 | |||
| 661 | static int wm831x_alive_ldo_set_voltage_int(struct regulator_dev *rdev, | ||
| 662 | int reg, | ||
| 663 | int min_uV, int max_uV) | ||
| 664 | { | ||
| 665 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 666 | struct wm831x *wm831x = ldo->wm831x; | ||
| 667 | int vsel, ret; | ||
| 668 | |||
| 669 | vsel = (min_uV - 800000) / 50000; | ||
| 670 | |||
| 671 | ret = wm831x_alive_ldo_list_voltage(rdev, vsel); | ||
| 672 | if (ret < 0) | ||
| 673 | return ret; | ||
| 674 | if (ret < min_uV || ret > max_uV) | ||
| 675 | return -EINVAL; | ||
| 676 | |||
| 677 | return wm831x_set_bits(wm831x, reg, WM831X_LDO11_ON_VSEL_MASK, vsel); | ||
| 678 | } | ||
| 679 | |||
| 680 | static int wm831x_alive_ldo_set_voltage(struct regulator_dev *rdev, | ||
| 681 | int min_uV, int max_uV) | ||
| 682 | { | ||
| 683 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 684 | int reg = ldo->base + WM831X_ALIVE_LDO_ON_CONTROL; | ||
| 685 | |||
| 686 | return wm831x_alive_ldo_set_voltage_int(rdev, reg, min_uV, max_uV); | ||
| 687 | } | ||
| 688 | |||
| 689 | static int wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev *rdev, | ||
| 690 | int uV) | ||
| 691 | { | ||
| 692 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 693 | int reg = ldo->base + WM831X_ALIVE_LDO_SLEEP_CONTROL; | ||
| 694 | |||
| 695 | return wm831x_alive_ldo_set_voltage_int(rdev, reg, uV, uV); | ||
| 696 | } | ||
| 697 | |||
| 698 | static int wm831x_alive_ldo_get_voltage(struct regulator_dev *rdev) | ||
| 699 | { | ||
| 700 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 701 | struct wm831x *wm831x = ldo->wm831x; | ||
| 702 | int reg = ldo->base + WM831X_ALIVE_LDO_ON_CONTROL; | ||
| 703 | int ret; | ||
| 704 | |||
| 705 | ret = wm831x_reg_read(wm831x, reg); | ||
| 706 | if (ret < 0) | ||
| 707 | return ret; | ||
| 708 | |||
| 709 | ret &= WM831X_LDO11_ON_VSEL_MASK; | ||
| 710 | |||
| 711 | return wm831x_alive_ldo_list_voltage(rdev, ret); | ||
| 712 | } | ||
| 713 | |||
| 714 | static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev) | ||
| 715 | { | ||
| 716 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | ||
| 717 | struct wm831x *wm831x = ldo->wm831x; | ||
| 718 | int mask = 1 << rdev_get_id(rdev); | ||
| 719 | int ret; | ||
| 720 | |||
| 721 | /* Is the regulator on? */ | ||
| 722 | ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS); | ||
| 723 | if (ret < 0) | ||
| 724 | return ret; | ||
| 725 | if (ret & mask) | ||
| 726 | return REGULATOR_STATUS_ON; | ||
| 727 | else | ||
| 728 | return REGULATOR_STATUS_OFF; | ||
| 729 | } | ||
| 730 | |||
| 731 | static struct regulator_ops wm831x_alive_ldo_ops = { | ||
| 732 | .list_voltage = wm831x_alive_ldo_list_voltage, | ||
| 733 | .get_voltage = wm831x_alive_ldo_get_voltage, | ||
| 734 | .set_voltage = wm831x_alive_ldo_set_voltage, | ||
| 735 | .set_suspend_voltage = wm831x_alive_ldo_set_suspend_voltage, | ||
| 736 | .get_status = wm831x_alive_ldo_get_status, | ||
| 737 | |||
| 738 | .is_enabled = wm831x_ldo_is_enabled, | ||
| 739 | .enable = wm831x_ldo_enable, | ||
| 740 | .disable = wm831x_ldo_disable, | ||
| 741 | }; | ||
| 742 | |||
| 743 | static __devinit int wm831x_alive_ldo_probe(struct platform_device *pdev) | ||
| 744 | { | ||
| 745 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 746 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | ||
| 747 | int id = pdev->id % ARRAY_SIZE(pdata->ldo); | ||
| 748 | struct wm831x_ldo *ldo; | ||
| 749 | struct resource *res; | ||
| 750 | int ret; | ||
| 751 | |||
| 752 | dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1); | ||
| 753 | |||
| 754 | if (pdata == NULL || pdata->ldo[id] == NULL) | ||
| 755 | return -ENODEV; | ||
| 756 | |||
| 757 | ldo = kzalloc(sizeof(struct wm831x_ldo), GFP_KERNEL); | ||
| 758 | if (ldo == NULL) { | ||
| 759 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | ||
| 760 | return -ENOMEM; | ||
| 761 | } | ||
| 762 | |||
| 763 | ldo->wm831x = wm831x; | ||
| 764 | |||
| 765 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | ||
| 766 | if (res == NULL) { | ||
| 767 | dev_err(&pdev->dev, "No I/O resource\n"); | ||
| 768 | ret = -EINVAL; | ||
| 769 | goto err; | ||
| 770 | } | ||
| 771 | ldo->base = res->start; | ||
| 772 | |||
| 773 | snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1); | ||
| 774 | ldo->desc.name = ldo->name; | ||
| 775 | ldo->desc.id = id; | ||
| 776 | ldo->desc.type = REGULATOR_VOLTAGE; | ||
| 777 | ldo->desc.n_voltages = WM831X_ALIVE_LDO_MAX_SELECTOR + 1; | ||
| 778 | ldo->desc.ops = &wm831x_alive_ldo_ops; | ||
| 779 | ldo->desc.owner = THIS_MODULE; | ||
| 780 | |||
| 781 | ldo->regulator = regulator_register(&ldo->desc, &pdev->dev, | ||
| 782 | pdata->ldo[id], ldo); | ||
| 783 | if (IS_ERR(ldo->regulator)) { | ||
| 784 | ret = PTR_ERR(ldo->regulator); | ||
| 785 | dev_err(wm831x->dev, "Failed to register LDO%d: %d\n", | ||
| 786 | id + 1, ret); | ||
| 787 | goto err; | ||
| 788 | } | ||
| 789 | |||
| 790 | platform_set_drvdata(pdev, ldo); | ||
| 791 | |||
| 792 | return 0; | ||
| 793 | |||
| 794 | err: | ||
| 795 | kfree(ldo); | ||
| 796 | return ret; | ||
| 797 | } | ||
| 798 | |||
| 799 | static __devexit int wm831x_alive_ldo_remove(struct platform_device *pdev) | ||
| 800 | { | ||
| 801 | struct wm831x_ldo *ldo = platform_get_drvdata(pdev); | ||
| 802 | |||
| 803 | regulator_unregister(ldo->regulator); | ||
| 804 | kfree(ldo); | ||
| 805 | |||
| 806 | return 0; | ||
| 807 | } | ||
| 808 | |||
| 809 | static struct platform_driver wm831x_alive_ldo_driver = { | ||
| 810 | .probe = wm831x_alive_ldo_probe, | ||
| 811 | .remove = __devexit_p(wm831x_alive_ldo_remove), | ||
| 812 | .driver = { | ||
| 813 | .name = "wm831x-alive-ldo", | ||
| 814 | }, | ||
| 815 | }; | ||
| 816 | |||
| 817 | static int __init wm831x_ldo_init(void) | ||
| 818 | { | ||
| 819 | int ret; | ||
| 820 | |||
| 821 | ret = platform_driver_register(&wm831x_gp_ldo_driver); | ||
| 822 | if (ret != 0) | ||
| 823 | pr_err("Failed to register WM831x GP LDO driver: %d\n", ret); | ||
| 824 | |||
| 825 | ret = platform_driver_register(&wm831x_aldo_driver); | ||
| 826 | if (ret != 0) | ||
| 827 | pr_err("Failed to register WM831x ALDO driver: %d\n", ret); | ||
| 828 | |||
| 829 | ret = platform_driver_register(&wm831x_alive_ldo_driver); | ||
| 830 | if (ret != 0) | ||
| 831 | pr_err("Failed to register WM831x alive LDO driver: %d\n", | ||
| 832 | ret); | ||
| 833 | |||
| 834 | return 0; | ||
| 835 | } | ||
| 836 | subsys_initcall(wm831x_ldo_init); | ||
| 837 | |||
| 838 | static void __exit wm831x_ldo_exit(void) | ||
| 839 | { | ||
| 840 | platform_driver_unregister(&wm831x_alive_ldo_driver); | ||
| 841 | platform_driver_unregister(&wm831x_aldo_driver); | ||
| 842 | platform_driver_unregister(&wm831x_gp_ldo_driver); | ||
| 843 | } | ||
| 844 | module_exit(wm831x_ldo_exit); | ||
| 845 | |||
| 846 | /* Module information */ | ||
| 847 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | ||
| 848 | MODULE_DESCRIPTION("WM831x LDO driver"); | ||
| 849 | MODULE_LICENSE("GPL"); | ||
| 850 | MODULE_ALIAS("platform:wm831x-ldo"); | ||
| 851 | MODULE_ALIAS("platform:wm831x-aldo"); | ||
| 852 | MODULE_ALIAS("platform:wm831x-aliveldo"); | ||
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 81adbdbd5042..73771b09fbd3 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
| @@ -518,6 +518,16 @@ config RTC_DRV_V3020 | |||
| 518 | This driver can also be built as a module. If so, the module | 518 | This driver can also be built as a module. If so, the module |
| 519 | will be called rtc-v3020. | 519 | will be called rtc-v3020. |
| 520 | 520 | ||
| 521 | config RTC_DRV_WM831X | ||
| 522 | tristate "Wolfson Microelectronics WM831x RTC" | ||
| 523 | depends on MFD_WM831X | ||
| 524 | help | ||
| 525 | If you say yes here you will get support for the RTC subsystem | ||
| 526 | of the Wolfson Microelectronics WM831X series PMICs. | ||
| 527 | |||
| 528 | This driver can also be built as a module. If so, the module | ||
| 529 | will be called "rtc-wm831x". | ||
| 530 | |||
| 521 | config RTC_DRV_WM8350 | 531 | config RTC_DRV_WM8350 |
| 522 | tristate "Wolfson Microelectronics WM8350 RTC" | 532 | tristate "Wolfson Microelectronics WM8350 RTC" |
| 523 | depends on MFD_WM8350 | 533 | depends on MFD_WM8350 |
| @@ -535,6 +545,15 @@ config RTC_DRV_PCF50633 | |||
| 535 | If you say yes here you get support for the RTC subsystem of the | 545 | If you say yes here you get support for the RTC subsystem of the |
| 536 | NXP PCF50633 used in embedded systems. | 546 | NXP PCF50633 used in embedded systems. |
| 537 | 547 | ||
| 548 | config RTC_DRV_AB3100 | ||
| 549 | tristate "ST-Ericsson AB3100 RTC" | ||
| 550 | depends on AB3100_CORE | ||
| 551 | default y if AB3100_CORE | ||
| 552 | help | ||
| 553 | Select this to enable the ST-Ericsson AB3100 Mixed Signal IC RTC | ||
| 554 | support. This chip contains a battery- and capacitor-backed RTC. | ||
| 555 | |||
| 556 | |||
| 538 | comment "on-CPU RTC drivers" | 557 | comment "on-CPU RTC drivers" |
| 539 | 558 | ||
| 540 | config RTC_DRV_OMAP | 559 | config RTC_DRV_OMAP |
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 3c0f2b2ac927..5e152ffe5058 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile | |||
| @@ -17,6 +17,7 @@ rtc-core-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o | |||
| 17 | 17 | ||
| 18 | # Keep the list ordered. | 18 | # Keep the list ordered. |
| 19 | 19 | ||
| 20 | obj-$(CONFIG_RTC_DRV_AB3100) += rtc-ab3100.o | ||
| 20 | obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o | 21 | obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o |
| 21 | obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o | 22 | obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o |
| 22 | obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o | 23 | obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o |
| @@ -74,6 +75,7 @@ obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl4030.o | |||
| 74 | obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o | 75 | obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o |
| 75 | obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o | 76 | obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o |
| 76 | obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o | 77 | obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o |
| 78 | obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o | ||
| 77 | obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o | 79 | obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o |
| 78 | obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o | 80 | obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o |
| 79 | obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o | 81 | obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o |
diff --git a/drivers/rtc/rtc-ab3100.c b/drivers/rtc/rtc-ab3100.c new file mode 100644 index 000000000000..4704aac2b5af --- /dev/null +++ b/drivers/rtc/rtc-ab3100.c | |||
| @@ -0,0 +1,281 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2007-2009 ST-Ericsson AB | ||
| 3 | * License terms: GNU General Public License (GPL) version 2 | ||
| 4 | * RTC clock driver for the AB3100 Analog Baseband Chip | ||
| 5 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
| 6 | */ | ||
| 7 | #include <linux/module.h> | ||
| 8 | #include <linux/kernel.h> | ||
| 9 | #include <linux/init.h> | ||
| 10 | #include <linux/platform_device.h> | ||
| 11 | #include <linux/rtc.h> | ||
| 12 | #include <linux/mfd/ab3100.h> | ||
| 13 | |||
| 14 | /* Clock rate in Hz */ | ||
| 15 | #define AB3100_RTC_CLOCK_RATE 32768 | ||
| 16 | |||
| 17 | /* | ||
| 18 | * The AB3100 RTC registers. These are the same for | ||
| 19 | * AB3000 and AB3100. | ||
| 20 | * Control register: | ||
| 21 | * Bit 0: RTC Monitor cleared=0, active=1, if you set it | ||
| 22 | * to 1 it remains active until RTC power is lost. | ||
| 23 | * Bit 1: 32 kHz Oscillator, 0 = on, 1 = bypass | ||
| 24 | * Bit 2: Alarm on, 0 = off, 1 = on | ||
| 25 | * Bit 3: 32 kHz buffer disabling, 0 = enabled, 1 = disabled | ||
| 26 | */ | ||
| 27 | #define AB3100_RTC 0x53 | ||
| 28 | /* default setting, buffer disabled, alarm on */ | ||
| 29 | #define RTC_SETTING 0x30 | ||
| 30 | /* Alarm when AL0-AL3 == TI0-TI3 */ | ||
| 31 | #define AB3100_AL0 0x56 | ||
| 32 | #define AB3100_AL1 0x57 | ||
| 33 | #define AB3100_AL2 0x58 | ||
| 34 | #define AB3100_AL3 0x59 | ||
| 35 | /* This 48-bit register that counts up at 32768 Hz */ | ||
| 36 | #define AB3100_TI0 0x5a | ||
| 37 | #define AB3100_TI1 0x5b | ||
| 38 | #define AB3100_TI2 0x5c | ||
| 39 | #define AB3100_TI3 0x5d | ||
| 40 | #define AB3100_TI4 0x5e | ||
| 41 | #define AB3100_TI5 0x5f | ||
| 42 | |||
| 43 | /* | ||
| 44 | * RTC clock functions and device struct declaration | ||
| 45 | */ | ||
| 46 | static int ab3100_rtc_set_mmss(struct device *dev, unsigned long secs) | ||
| 47 | { | ||
| 48 | struct ab3100 *ab3100_data = dev_get_drvdata(dev); | ||
| 49 | u8 regs[] = {AB3100_TI0, AB3100_TI1, AB3100_TI2, | ||
| 50 | AB3100_TI3, AB3100_TI4, AB3100_TI5}; | ||
| 51 | unsigned char buf[6]; | ||
| 52 | u64 fat_time = (u64) secs * AB3100_RTC_CLOCK_RATE * 2; | ||
| 53 | int err = 0; | ||
| 54 | int i; | ||
| 55 | |||
| 56 | buf[0] = (fat_time) & 0xFF; | ||
| 57 | buf[1] = (fat_time >> 8) & 0xFF; | ||
| 58 | buf[2] = (fat_time >> 16) & 0xFF; | ||
| 59 | buf[3] = (fat_time >> 24) & 0xFF; | ||
| 60 | buf[4] = (fat_time >> 32) & 0xFF; | ||
| 61 | buf[5] = (fat_time >> 40) & 0xFF; | ||
| 62 | |||
| 63 | for (i = 0; i < 6; i++) { | ||
| 64 | err = ab3100_set_register_interruptible(ab3100_data, | ||
| 65 | regs[i], buf[i]); | ||
| 66 | if (err) | ||
| 67 | return err; | ||
| 68 | } | ||
| 69 | |||
| 70 | /* Set the flag to mark that the clock is now set */ | ||
| 71 | return ab3100_mask_and_set_register_interruptible(ab3100_data, | ||
| 72 | AB3100_RTC, | ||
| 73 | 0xFE, 0x01); | ||
| 74 | |||
| 75 | } | ||
| 76 | |||
| 77 | static int ab3100_rtc_read_time(struct device *dev, struct rtc_time *tm) | ||
| 78 | { | ||
| 79 | struct ab3100 *ab3100_data = dev_get_drvdata(dev); | ||
| 80 | unsigned long time; | ||
| 81 | u8 rtcval; | ||
| 82 | int err; | ||
| 83 | |||
| 84 | err = ab3100_get_register_interruptible(ab3100_data, | ||
| 85 | AB3100_RTC, &rtcval); | ||
| 86 | if (err) | ||
| 87 | return err; | ||
| 88 | |||
| 89 | if (!(rtcval & 0x01)) { | ||
| 90 | dev_info(dev, "clock not set (lost power)"); | ||
| 91 | return -EINVAL; | ||
| 92 | } else { | ||
| 93 | u64 fat_time; | ||
| 94 | u8 buf[6]; | ||
| 95 | |||
| 96 | /* Read out time registers */ | ||
| 97 | err = ab3100_get_register_page_interruptible(ab3100_data, | ||
| 98 | AB3100_TI0, | ||
| 99 | buf, 6); | ||
| 100 | if (err != 0) | ||
| 101 | return err; | ||
| 102 | |||
| 103 | fat_time = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) | | ||
| 104 | ((u64) buf[3] << 24) | ((u64) buf[2] << 16) | | ||
| 105 | ((u64) buf[1] << 8) | (u64) buf[0]; | ||
| 106 | time = (unsigned long) (fat_time / | ||
| 107 | (u64) (AB3100_RTC_CLOCK_RATE * 2)); | ||
| 108 | } | ||
| 109 | |||
| 110 | rtc_time_to_tm(time, tm); | ||
| 111 | |||
| 112 | return rtc_valid_tm(tm); | ||
| 113 | } | ||
| 114 | |||
| 115 | static int ab3100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | ||
| 116 | { | ||
| 117 | struct ab3100 *ab3100_data = dev_get_drvdata(dev); | ||
| 118 | unsigned long time; | ||
| 119 | u64 fat_time; | ||
| 120 | u8 buf[6]; | ||
| 121 | u8 rtcval; | ||
| 122 | int err; | ||
| 123 | |||
| 124 | /* Figure out if alarm is enabled or not */ | ||
| 125 | err = ab3100_get_register_interruptible(ab3100_data, | ||
| 126 | AB3100_RTC, &rtcval); | ||
| 127 | if (err) | ||
| 128 | return err; | ||
| 129 | if (rtcval & 0x04) | ||
| 130 | alarm->enabled = 1; | ||
| 131 | else | ||
| 132 | alarm->enabled = 0; | ||
| 133 | /* No idea how this could be represented */ | ||
| 134 | alarm->pending = 0; | ||
| 135 | /* Read out alarm registers, only 4 bytes */ | ||
| 136 | err = ab3100_get_register_page_interruptible(ab3100_data, | ||
| 137 | AB3100_AL0, buf, 4); | ||
| 138 | if (err) | ||
| 139 | return err; | ||
| 140 | fat_time = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) | | ||
| 141 | ((u64) buf[1] << 24) | ((u64) buf[0] << 16); | ||
| 142 | time = (unsigned long) (fat_time / (u64) (AB3100_RTC_CLOCK_RATE * 2)); | ||
| 143 | |||
| 144 | rtc_time_to_tm(time, &alarm->time); | ||
| 145 | |||
| 146 | return rtc_valid_tm(&alarm->time); | ||
| 147 | } | ||
| 148 | |||
| 149 | static int ab3100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | ||
| 150 | { | ||
| 151 | struct ab3100 *ab3100_data = dev_get_drvdata(dev); | ||
| 152 | u8 regs[] = {AB3100_AL0, AB3100_AL1, AB3100_AL2, AB3100_AL3}; | ||
| 153 | unsigned char buf[4]; | ||
| 154 | unsigned long secs; | ||
| 155 | u64 fat_time; | ||
| 156 | int err; | ||
| 157 | int i; | ||
| 158 | |||
| 159 | rtc_tm_to_time(&alarm->time, &secs); | ||
| 160 | fat_time = (u64) secs * AB3100_RTC_CLOCK_RATE * 2; | ||
| 161 | buf[0] = (fat_time >> 16) & 0xFF; | ||
| 162 | buf[1] = (fat_time >> 24) & 0xFF; | ||
| 163 | buf[2] = (fat_time >> 32) & 0xFF; | ||
| 164 | buf[3] = (fat_time >> 40) & 0xFF; | ||
| 165 | |||
| 166 | /* Set the alarm */ | ||
| 167 | for (i = 0; i < 4; i++) { | ||
| 168 | err = ab3100_set_register_interruptible(ab3100_data, | ||
| 169 | regs[i], buf[i]); | ||
| 170 | if (err) | ||
| 171 | return err; | ||
| 172 | } | ||
| 173 | /* Then enable the alarm */ | ||
| 174 | return ab3100_mask_and_set_register_interruptible(ab3100_data, | ||
| 175 | AB3100_RTC, ~(1 << 2), | ||
| 176 | alarm->enabled << 2); | ||
| 177 | } | ||
| 178 | |||
| 179 | static int ab3100_rtc_irq_enable(struct device *dev, unsigned int enabled) | ||
| 180 | { | ||
| 181 | struct ab3100 *ab3100_data = dev_get_drvdata(dev); | ||
| 182 | |||
| 183 | /* | ||
| 184 | * It's not possible to enable/disable the alarm IRQ for this RTC. | ||
| 185 | * It does not actually trigger any IRQ: instead its only function is | ||
| 186 | * to power up the system, if it wasn't on. This will manifest as | ||
| 187 | * a "power up cause" in the AB3100 power driver (battery charging etc) | ||
| 188 | * and need to be handled there instead. | ||
| 189 | */ | ||
| 190 | if (enabled) | ||
| 191 | return ab3100_mask_and_set_register_interruptible(ab3100_data, | ||
| 192 | AB3100_RTC, ~(1 << 2), | ||
| 193 | 1 << 2); | ||
| 194 | else | ||
| 195 | return ab3100_mask_and_set_register_interruptible(ab3100_data, | ||
| 196 | AB3100_RTC, ~(1 << 2), | ||
| 197 | 0); | ||
| 198 | } | ||
| 199 | |||
| 200 | static const struct rtc_class_ops ab3100_rtc_ops = { | ||
| 201 | .read_time = ab3100_rtc_read_time, | ||
| 202 | .set_mmss = ab3100_rtc_set_mmss, | ||
| 203 | .read_alarm = ab3100_rtc_read_alarm, | ||
| 204 | .set_alarm = ab3100_rtc_set_alarm, | ||
| 205 | .alarm_irq_enable = ab3100_rtc_irq_enable, | ||
| 206 | }; | ||
| 207 | |||
| 208 | static int __init ab3100_rtc_probe(struct platform_device *pdev) | ||
| 209 | { | ||
| 210 | int err; | ||
| 211 | u8 regval; | ||
| 212 | struct rtc_device *rtc; | ||
| 213 | struct ab3100 *ab3100_data = platform_get_drvdata(pdev); | ||
| 214 | |||
| 215 | /* The first RTC register needs special treatment */ | ||
| 216 | err = ab3100_get_register_interruptible(ab3100_data, | ||
| 217 | AB3100_RTC, ®val); | ||
| 218 | if (err) { | ||
| 219 | dev_err(&pdev->dev, "unable to read RTC register\n"); | ||
| 220 | return -ENODEV; | ||
| 221 | } | ||
| 222 | |||
| 223 | if ((regval & 0xFE) != RTC_SETTING) { | ||
| 224 | dev_warn(&pdev->dev, "not default value in RTC reg 0x%x\n", | ||
| 225 | regval); | ||
| 226 | } | ||
| 227 | |||
| 228 | if ((regval & 1) == 0) { | ||
| 229 | /* | ||
| 230 | * Set bit to detect power loss. | ||
| 231 | * This bit remains until RTC power is lost. | ||
| 232 | */ | ||
| 233 | regval = 1 | RTC_SETTING; | ||
| 234 | err = ab3100_set_register_interruptible(ab3100_data, | ||
| 235 | AB3100_RTC, regval); | ||
| 236 | /* Ignore any error on this write */ | ||
| 237 | } | ||
| 238 | |||
| 239 | rtc = rtc_device_register("ab3100-rtc", &pdev->dev, &ab3100_rtc_ops, | ||
| 240 | THIS_MODULE); | ||
| 241 | if (IS_ERR(rtc)) { | ||
| 242 | err = PTR_ERR(rtc); | ||
| 243 | return err; | ||
| 244 | } | ||
| 245 | |||
| 246 | return 0; | ||
| 247 | } | ||
| 248 | |||
| 249 | static int __exit ab3100_rtc_remove(struct platform_device *pdev) | ||
| 250 | { | ||
| 251 | struct rtc_device *rtc = platform_get_drvdata(pdev); | ||
| 252 | |||
| 253 | rtc_device_unregister(rtc); | ||
| 254 | return 0; | ||
| 255 | } | ||
| 256 | |||
| 257 | static struct platform_driver ab3100_rtc_driver = { | ||
| 258 | .driver = { | ||
| 259 | .name = "ab3100-rtc", | ||
| 260 | .owner = THIS_MODULE, | ||
| 261 | }, | ||
| 262 | .remove = __exit_p(ab3100_rtc_remove), | ||
| 263 | }; | ||
| 264 | |||
| 265 | static int __init ab3100_rtc_init(void) | ||
| 266 | { | ||
| 267 | return platform_driver_probe(&ab3100_rtc_driver, | ||
| 268 | ab3100_rtc_probe); | ||
| 269 | } | ||
| 270 | |||
| 271 | static void __exit ab3100_rtc_exit(void) | ||
| 272 | { | ||
| 273 | platform_driver_unregister(&ab3100_rtc_driver); | ||
| 274 | } | ||
| 275 | |||
| 276 | module_init(ab3100_rtc_init); | ||
| 277 | module_exit(ab3100_rtc_exit); | ||
| 278 | |||
| 279 | MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>"); | ||
| 280 | MODULE_DESCRIPTION("AB3100 RTC Driver"); | ||
| 281 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c index 184556620778..d490628b64da 100644 --- a/drivers/rtc/rtc-ds1302.c +++ b/drivers/rtc/rtc-ds1302.c | |||
| @@ -1,26 +1,25 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Dallas DS1302 RTC Support | 2 | * Dallas DS1302 RTC Support |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2002 David McCullough | 4 | * Copyright (C) 2002 David McCullough |
| 5 | * Copyright (C) 2003 - 2007 Paul Mundt | 5 | * Copyright (C) 2003 - 2007 Paul Mundt |
| 6 | * | 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public | 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License version 2. See the file "COPYING" in the main directory of | 8 | * License version 2. See the file "COPYING" in the main directory of |
| 9 | * this archive for more details. | 9 | * this archive for more details. |
| 10 | */ | 10 | */ |
| 11 | |||
| 11 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 12 | #include <linux/module.h> | 13 | #include <linux/module.h> |
| 13 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
| 14 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
| 15 | #include <linux/time.h> | ||
| 16 | #include <linux/rtc.h> | 16 | #include <linux/rtc.h> |
| 17 | #include <linux/spinlock.h> | ||
| 18 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 19 | #include <linux/bcd.h> | 18 | #include <linux/bcd.h> |
| 20 | #include <asm/rtc.h> | 19 | #include <asm/rtc.h> |
| 21 | 20 | ||
| 22 | #define DRV_NAME "rtc-ds1302" | 21 | #define DRV_NAME "rtc-ds1302" |
| 23 | #define DRV_VERSION "0.1.0" | 22 | #define DRV_VERSION "0.1.1" |
| 24 | 23 | ||
| 25 | #define RTC_CMD_READ 0x81 /* Read command */ | 24 | #define RTC_CMD_READ 0x81 /* Read command */ |
| 26 | #define RTC_CMD_WRITE 0x80 /* Write command */ | 25 | #define RTC_CMD_WRITE 0x80 /* Write command */ |
| @@ -47,11 +46,6 @@ | |||
| 47 | #error "Add support for your platform" | 46 | #error "Add support for your platform" |
| 48 | #endif | 47 | #endif |
| 49 | 48 | ||
| 50 | struct ds1302_rtc { | ||
| 51 | struct rtc_device *rtc_dev; | ||
| 52 | spinlock_t lock; | ||
| 53 | }; | ||
| 54 | |||
| 55 | static void ds1302_sendbits(unsigned int val) | 49 | static void ds1302_sendbits(unsigned int val) |
| 56 | { | 50 | { |
| 57 | int i; | 51 | int i; |
| @@ -103,10 +97,6 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val) | |||
| 103 | 97 | ||
| 104 | static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) | 98 | static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 105 | { | 99 | { |
| 106 | struct ds1302_rtc *rtc = dev_get_drvdata(dev); | ||
| 107 | |||
| 108 | spin_lock_irq(&rtc->lock); | ||
| 109 | |||
| 110 | tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC)); | 100 | tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC)); |
| 111 | tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN)); | 101 | tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN)); |
| 112 | tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR)); | 102 | tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR)); |
| @@ -118,26 +108,17 @@ static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
| 118 | if (tm->tm_year < 70) | 108 | if (tm->tm_year < 70) |
| 119 | tm->tm_year += 100; | 109 | tm->tm_year += 100; |
| 120 | 110 | ||
| 121 | spin_unlock_irq(&rtc->lock); | ||
| 122 | |||
| 123 | dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | 111 | dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
| 124 | "mday=%d, mon=%d, year=%d, wday=%d\n", | 112 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
| 125 | __func__, | 113 | __func__, |
| 126 | tm->tm_sec, tm->tm_min, tm->tm_hour, | 114 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
| 127 | tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); | 115 | tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); |
| 128 | 116 | ||
| 129 | if (rtc_valid_tm(tm) < 0) | 117 | return rtc_valid_tm(tm); |
| 130 | dev_err(dev, "invalid date\n"); | ||
| 131 | |||
| 132 | return 0; | ||
| 133 | } | 118 | } |
| 134 | 119 | ||
| 135 | static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) | 120 | static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 136 | { | 121 | { |
| 137 | struct ds1302_rtc *rtc = dev_get_drvdata(dev); | ||
| 138 | |||
| 139 | spin_lock_irq(&rtc->lock); | ||
| 140 | |||
| 141 | /* Stop RTC */ | 122 | /* Stop RTC */ |
| 142 | ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); | 123 | ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); |
| 143 | 124 | ||
| @@ -152,8 +133,6 @@ static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
| 152 | /* Start RTC */ | 133 | /* Start RTC */ |
| 153 | ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); | 134 | ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); |
| 154 | 135 | ||
| 155 | spin_unlock_irq(&rtc->lock); | ||
| 156 | |||
| 157 | return 0; | 136 | return 0; |
| 158 | } | 137 | } |
| 159 | 138 | ||
| @@ -170,9 +149,7 @@ static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
| 170 | if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int))) | 149 | if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int))) |
| 171 | return -EFAULT; | 150 | return -EFAULT; |
| 172 | 151 | ||
| 173 | spin_lock_irq(&rtc->lock); | ||
| 174 | ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf)); | 152 | ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf)); |
| 175 | spin_unlock_irq(&rtc->lock); | ||
| 176 | return 0; | 153 | return 0; |
| 177 | } | 154 | } |
| 178 | #endif | 155 | #endif |
| @@ -187,10 +164,9 @@ static struct rtc_class_ops ds1302_rtc_ops = { | |||
| 187 | .ioctl = ds1302_rtc_ioctl, | 164 | .ioctl = ds1302_rtc_ioctl, |
| 188 | }; | 165 | }; |
| 189 | 166 | ||
| 190 | static int __devinit ds1302_rtc_probe(struct platform_device *pdev) | 167 | static int __init ds1302_rtc_probe(struct platform_device *pdev) |
| 191 | { | 168 | { |
| 192 | struct ds1302_rtc *rtc; | 169 | struct rtc_device *rtc; |
| 193 | int ret; | ||
| 194 | 170 | ||
| 195 | /* Reset */ | 171 | /* Reset */ |
| 196 | set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); | 172 | set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); |
| @@ -200,37 +176,23 @@ static int __devinit ds1302_rtc_probe(struct platform_device *pdev) | |||
| 200 | if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) | 176 | if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) |
| 201 | return -ENODEV; | 177 | return -ENODEV; |
| 202 | 178 | ||
| 203 | rtc = kzalloc(sizeof(struct ds1302_rtc), GFP_KERNEL); | 179 | rtc = rtc_device_register("ds1302", &pdev->dev, |
| 204 | if (unlikely(!rtc)) | ||
| 205 | return -ENOMEM; | ||
| 206 | |||
| 207 | spin_lock_init(&rtc->lock); | ||
| 208 | rtc->rtc_dev = rtc_device_register("ds1302", &pdev->dev, | ||
| 209 | &ds1302_rtc_ops, THIS_MODULE); | 180 | &ds1302_rtc_ops, THIS_MODULE); |
| 210 | if (IS_ERR(rtc->rtc_dev)) { | 181 | if (IS_ERR(rtc)) |
| 211 | ret = PTR_ERR(rtc->rtc_dev); | 182 | return PTR_ERR(rtc); |
| 212 | goto out; | ||
| 213 | } | ||
| 214 | 183 | ||
| 215 | platform_set_drvdata(pdev, rtc); | 184 | platform_set_drvdata(pdev, rtc); |
| 216 | 185 | ||
| 217 | return 0; | 186 | return 0; |
| 218 | out: | ||
| 219 | kfree(rtc); | ||
| 220 | return ret; | ||
| 221 | } | 187 | } |
| 222 | 188 | ||
| 223 | static int __devexit ds1302_rtc_remove(struct platform_device *pdev) | 189 | static int __devexit ds1302_rtc_remove(struct platform_device *pdev) |
| 224 | { | 190 | { |
| 225 | struct ds1302_rtc *rtc = platform_get_drvdata(pdev); | 191 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
| 226 | |||
| 227 | if (likely(rtc->rtc_dev)) | ||
| 228 | rtc_device_unregister(rtc->rtc_dev); | ||
| 229 | 192 | ||
| 193 | rtc_device_unregister(rtc); | ||
| 230 | platform_set_drvdata(pdev, NULL); | 194 | platform_set_drvdata(pdev, NULL); |
| 231 | 195 | ||
| 232 | kfree(rtc); | ||
| 233 | |||
| 234 | return 0; | 196 | return 0; |
| 235 | } | 197 | } |
| 236 | 198 | ||
| @@ -239,13 +201,12 @@ static struct platform_driver ds1302_platform_driver = { | |||
| 239 | .name = DRV_NAME, | 201 | .name = DRV_NAME, |
| 240 | .owner = THIS_MODULE, | 202 | .owner = THIS_MODULE, |
| 241 | }, | 203 | }, |
| 242 | .probe = ds1302_rtc_probe, | 204 | .remove = __exit_p(ds1302_rtc_remove), |
| 243 | .remove = __devexit_p(ds1302_rtc_remove), | ||
| 244 | }; | 205 | }; |
| 245 | 206 | ||
| 246 | static int __init ds1302_rtc_init(void) | 207 | static int __init ds1302_rtc_init(void) |
| 247 | { | 208 | { |
| 248 | return platform_driver_register(&ds1302_platform_driver); | 209 | return platform_driver_probe(&ds1302_platform_driver, ds1302_rtc_probe); |
| 249 | } | 210 | } |
| 250 | 211 | ||
| 251 | static void __exit ds1302_rtc_exit(void) | 212 | static void __exit ds1302_rtc_exit(void) |
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c index d7310adb7152..e6ed5404bca0 100644 --- a/drivers/rtc/rtc-sh.c +++ b/drivers/rtc/rtc-sh.c | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | #include <asm/rtc.h> | 29 | #include <asm/rtc.h> |
| 30 | 30 | ||
| 31 | #define DRV_NAME "sh-rtc" | 31 | #define DRV_NAME "sh-rtc" |
| 32 | #define DRV_VERSION "0.2.2" | 32 | #define DRV_VERSION "0.2.3" |
| 33 | 33 | ||
| 34 | #define RTC_REG(r) ((r) * rtc_reg_size) | 34 | #define RTC_REG(r) ((r) * rtc_reg_size) |
| 35 | 35 | ||
| @@ -215,7 +215,7 @@ static irqreturn_t sh_rtc_shared(int irq, void *dev_id) | |||
| 215 | return IRQ_RETVAL(ret); | 215 | return IRQ_RETVAL(ret); |
| 216 | } | 216 | } |
| 217 | 217 | ||
| 218 | static inline void sh_rtc_setpie(struct device *dev, unsigned int enable) | 218 | static int sh_rtc_irq_set_state(struct device *dev, int enable) |
| 219 | { | 219 | { |
| 220 | struct sh_rtc *rtc = dev_get_drvdata(dev); | 220 | struct sh_rtc *rtc = dev_get_drvdata(dev); |
| 221 | unsigned int tmp; | 221 | unsigned int tmp; |
| @@ -225,17 +225,22 @@ static inline void sh_rtc_setpie(struct device *dev, unsigned int enable) | |||
| 225 | tmp = readb(rtc->regbase + RCR2); | 225 | tmp = readb(rtc->regbase + RCR2); |
| 226 | 226 | ||
| 227 | if (enable) { | 227 | if (enable) { |
| 228 | rtc->periodic_freq |= PF_KOU; | ||
| 228 | tmp &= ~RCR2_PEF; /* Clear PES bit */ | 229 | tmp &= ~RCR2_PEF; /* Clear PES bit */ |
| 229 | tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */ | 230 | tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */ |
| 230 | } else | 231 | } else { |
| 232 | rtc->periodic_freq &= ~PF_KOU; | ||
| 231 | tmp &= ~(RCR2_PESMASK | RCR2_PEF); | 233 | tmp &= ~(RCR2_PESMASK | RCR2_PEF); |
| 234 | } | ||
| 232 | 235 | ||
| 233 | writeb(tmp, rtc->regbase + RCR2); | 236 | writeb(tmp, rtc->regbase + RCR2); |
| 234 | 237 | ||
| 235 | spin_unlock_irq(&rtc->lock); | 238 | spin_unlock_irq(&rtc->lock); |
| 239 | |||
| 240 | return 0; | ||
| 236 | } | 241 | } |
| 237 | 242 | ||
| 238 | static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq) | 243 | static int sh_rtc_irq_set_freq(struct device *dev, int freq) |
| 239 | { | 244 | { |
| 240 | struct sh_rtc *rtc = dev_get_drvdata(dev); | 245 | struct sh_rtc *rtc = dev_get_drvdata(dev); |
| 241 | int tmp, ret = 0; | 246 | int tmp, ret = 0; |
| @@ -278,10 +283,8 @@ static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq) | |||
| 278 | ret = -ENOTSUPP; | 283 | ret = -ENOTSUPP; |
| 279 | } | 284 | } |
| 280 | 285 | ||
| 281 | if (ret == 0) { | 286 | if (ret == 0) |
| 282 | rtc->periodic_freq |= tmp; | 287 | rtc->periodic_freq |= tmp; |
| 283 | rtc->rtc_dev->irq_freq = freq; | ||
| 284 | } | ||
| 285 | 288 | ||
| 286 | spin_unlock_irq(&rtc->lock); | 289 | spin_unlock_irq(&rtc->lock); |
| 287 | return ret; | 290 | return ret; |
| @@ -346,10 +349,6 @@ static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
| 346 | unsigned int ret = 0; | 349 | unsigned int ret = 0; |
| 347 | 350 | ||
| 348 | switch (cmd) { | 351 | switch (cmd) { |
| 349 | case RTC_PIE_OFF: | ||
| 350 | case RTC_PIE_ON: | ||
| 351 | sh_rtc_setpie(dev, cmd == RTC_PIE_ON); | ||
| 352 | break; | ||
| 353 | case RTC_AIE_OFF: | 352 | case RTC_AIE_OFF: |
| 354 | case RTC_AIE_ON: | 353 | case RTC_AIE_ON: |
| 355 | sh_rtc_setaie(dev, cmd == RTC_AIE_ON); | 354 | sh_rtc_setaie(dev, cmd == RTC_AIE_ON); |
| @@ -362,13 +361,6 @@ static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
| 362 | rtc->periodic_freq |= PF_OXS; | 361 | rtc->periodic_freq |= PF_OXS; |
| 363 | sh_rtc_setcie(dev, 1); | 362 | sh_rtc_setcie(dev, 1); |
| 364 | break; | 363 | break; |
| 365 | case RTC_IRQP_READ: | ||
| 366 | ret = put_user(rtc->rtc_dev->irq_freq, | ||
| 367 | (unsigned long __user *)arg); | ||
| 368 | break; | ||
| 369 | case RTC_IRQP_SET: | ||
| 370 | ret = sh_rtc_setfreq(dev, arg); | ||
| 371 | break; | ||
| 372 | default: | 364 | default: |
| 373 | ret = -ENOIOCTLCMD; | 365 | ret = -ENOIOCTLCMD; |
| 374 | } | 366 | } |
| @@ -602,28 +594,6 @@ static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) | |||
| 602 | return 0; | 594 | return 0; |
| 603 | } | 595 | } |
| 604 | 596 | ||
| 605 | static int sh_rtc_irq_set_state(struct device *dev, int enabled) | ||
| 606 | { | ||
| 607 | struct platform_device *pdev = to_platform_device(dev); | ||
| 608 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | ||
| 609 | |||
| 610 | if (enabled) { | ||
| 611 | rtc->periodic_freq |= PF_KOU; | ||
| 612 | return sh_rtc_ioctl(dev, RTC_PIE_ON, 0); | ||
| 613 | } else { | ||
| 614 | rtc->periodic_freq &= ~PF_KOU; | ||
| 615 | return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0); | ||
| 616 | } | ||
| 617 | } | ||
| 618 | |||
| 619 | static int sh_rtc_irq_set_freq(struct device *dev, int freq) | ||
| 620 | { | ||
| 621 | if (!is_power_of_2(freq)) | ||
| 622 | return -EINVAL; | ||
| 623 | |||
| 624 | return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq); | ||
| 625 | } | ||
| 626 | |||
| 627 | static struct rtc_class_ops sh_rtc_ops = { | 597 | static struct rtc_class_ops sh_rtc_ops = { |
| 628 | .ioctl = sh_rtc_ioctl, | 598 | .ioctl = sh_rtc_ioctl, |
| 629 | .read_time = sh_rtc_read_time, | 599 | .read_time = sh_rtc_read_time, |
| @@ -635,7 +605,7 @@ static struct rtc_class_ops sh_rtc_ops = { | |||
| 635 | .proc = sh_rtc_proc, | 605 | .proc = sh_rtc_proc, |
| 636 | }; | 606 | }; |
| 637 | 607 | ||
| 638 | static int __devinit sh_rtc_probe(struct platform_device *pdev) | 608 | static int __init sh_rtc_probe(struct platform_device *pdev) |
| 639 | { | 609 | { |
| 640 | struct sh_rtc *rtc; | 610 | struct sh_rtc *rtc; |
| 641 | struct resource *res; | 611 | struct resource *res; |
| @@ -702,13 +672,6 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) | |||
| 702 | 672 | ||
| 703 | clk_enable(rtc->clk); | 673 | clk_enable(rtc->clk); |
| 704 | 674 | ||
| 705 | rtc->rtc_dev = rtc_device_register("sh", &pdev->dev, | ||
| 706 | &sh_rtc_ops, THIS_MODULE); | ||
| 707 | if (IS_ERR(rtc->rtc_dev)) { | ||
| 708 | ret = PTR_ERR(rtc->rtc_dev); | ||
| 709 | goto err_unmap; | ||
| 710 | } | ||
| 711 | |||
| 712 | rtc->capabilities = RTC_DEF_CAPABILITIES; | 675 | rtc->capabilities = RTC_DEF_CAPABILITIES; |
| 713 | if (pdev->dev.platform_data) { | 676 | if (pdev->dev.platform_data) { |
| 714 | struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data; | 677 | struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data; |
| @@ -720,10 +683,6 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) | |||
| 720 | rtc->capabilities |= pinfo->capabilities; | 683 | rtc->capabilities |= pinfo->capabilities; |
| 721 | } | 684 | } |
| 722 | 685 | ||
| 723 | rtc->rtc_dev->max_user_freq = 256; | ||
| 724 | |||
| 725 | platform_set_drvdata(pdev, rtc); | ||
| 726 | |||
| 727 | if (rtc->carry_irq <= 0) { | 686 | if (rtc->carry_irq <= 0) { |
| 728 | /* register shared periodic/carry/alarm irq */ | 687 | /* register shared periodic/carry/alarm irq */ |
| 729 | ret = request_irq(rtc->periodic_irq, sh_rtc_shared, | 688 | ret = request_irq(rtc->periodic_irq, sh_rtc_shared, |
| @@ -767,13 +726,26 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) | |||
| 767 | } | 726 | } |
| 768 | } | 727 | } |
| 769 | 728 | ||
| 729 | platform_set_drvdata(pdev, rtc); | ||
| 730 | |||
| 770 | /* everything disabled by default */ | 731 | /* everything disabled by default */ |
| 771 | rtc->periodic_freq = 0; | 732 | sh_rtc_irq_set_freq(&pdev->dev, 0); |
| 772 | rtc->rtc_dev->irq_freq = 0; | 733 | sh_rtc_irq_set_state(&pdev->dev, 0); |
| 773 | sh_rtc_setpie(&pdev->dev, 0); | ||
| 774 | sh_rtc_setaie(&pdev->dev, 0); | 734 | sh_rtc_setaie(&pdev->dev, 0); |
| 775 | sh_rtc_setcie(&pdev->dev, 0); | 735 | sh_rtc_setcie(&pdev->dev, 0); |
| 776 | 736 | ||
| 737 | rtc->rtc_dev = rtc_device_register("sh", &pdev->dev, | ||
| 738 | &sh_rtc_ops, THIS_MODULE); | ||
| 739 | if (IS_ERR(rtc->rtc_dev)) { | ||
| 740 | ret = PTR_ERR(rtc->rtc_dev); | ||
| 741 | free_irq(rtc->periodic_irq, rtc); | ||
| 742 | free_irq(rtc->carry_irq, rtc); | ||
| 743 | free_irq(rtc->alarm_irq, rtc); | ||
| 744 | goto err_unmap; | ||
| 745 | } | ||
| 746 | |||
| 747 | rtc->rtc_dev->max_user_freq = 256; | ||
| 748 | |||
| 777 | /* reset rtc to epoch 0 if time is invalid */ | 749 | /* reset rtc to epoch 0 if time is invalid */ |
| 778 | if (rtc_read_time(rtc->rtc_dev, &r) < 0) { | 750 | if (rtc_read_time(rtc->rtc_dev, &r) < 0) { |
| 779 | rtc_time_to_tm(0, &r); | 751 | rtc_time_to_tm(0, &r); |
| @@ -795,14 +767,13 @@ err_badres: | |||
| 795 | return ret; | 767 | return ret; |
| 796 | } | 768 | } |
| 797 | 769 | ||
| 798 | static int __devexit sh_rtc_remove(struct platform_device *pdev) | 770 | static int __exit sh_rtc_remove(struct platform_device *pdev) |
| 799 | { | 771 | { |
| 800 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | 772 | struct sh_rtc *rtc = platform_get_drvdata(pdev); |
| 801 | 773 | ||
| 802 | if (likely(rtc->rtc_dev)) | 774 | rtc_device_unregister(rtc->rtc_dev); |
| 803 | rtc_device_unregister(rtc->rtc_dev); | 775 | sh_rtc_irq_set_state(&pdev->dev, 0); |
| 804 | 776 | ||
| 805 | sh_rtc_setpie(&pdev->dev, 0); | ||
| 806 | sh_rtc_setaie(&pdev->dev, 0); | 777 | sh_rtc_setaie(&pdev->dev, 0); |
| 807 | sh_rtc_setcie(&pdev->dev, 0); | 778 | sh_rtc_setcie(&pdev->dev, 0); |
| 808 | 779 | ||
| @@ -813,9 +784,8 @@ static int __devexit sh_rtc_remove(struct platform_device *pdev) | |||
| 813 | free_irq(rtc->alarm_irq, rtc); | 784 | free_irq(rtc->alarm_irq, rtc); |
| 814 | } | 785 | } |
| 815 | 786 | ||
| 816 | release_resource(rtc->res); | ||
| 817 | |||
| 818 | iounmap(rtc->regbase); | 787 | iounmap(rtc->regbase); |
| 788 | release_resource(rtc->res); | ||
| 819 | 789 | ||
| 820 | clk_disable(rtc->clk); | 790 | clk_disable(rtc->clk); |
| 821 | clk_put(rtc->clk); | 791 | clk_put(rtc->clk); |
| @@ -867,13 +837,12 @@ static struct platform_driver sh_rtc_platform_driver = { | |||
| 867 | .owner = THIS_MODULE, | 837 | .owner = THIS_MODULE, |
| 868 | .pm = &sh_rtc_dev_pm_ops, | 838 | .pm = &sh_rtc_dev_pm_ops, |
| 869 | }, | 839 | }, |
| 870 | .probe = sh_rtc_probe, | 840 | .remove = __exit_p(sh_rtc_remove), |
| 871 | .remove = __devexit_p(sh_rtc_remove), | ||
| 872 | }; | 841 | }; |
| 873 | 842 | ||
| 874 | static int __init sh_rtc_init(void) | 843 | static int __init sh_rtc_init(void) |
| 875 | { | 844 | { |
| 876 | return platform_driver_register(&sh_rtc_platform_driver); | 845 | return platform_driver_probe(&sh_rtc_platform_driver, sh_rtc_probe); |
| 877 | } | 846 | } |
| 878 | 847 | ||
| 879 | static void __exit sh_rtc_exit(void) | 848 | static void __exit sh_rtc_exit(void) |
diff --git a/drivers/rtc/rtc-wm831x.c b/drivers/rtc/rtc-wm831x.c new file mode 100644 index 000000000000..79795cdf6ed8 --- /dev/null +++ b/drivers/rtc/rtc-wm831x.c | |||
| @@ -0,0 +1,523 @@ | |||
| 1 | /* | ||
| 2 | * Real Time Clock driver for Wolfson Microelectronics WM831x | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/time.h> | ||
| 18 | #include <linux/rtc.h> | ||
| 19 | #include <linux/bcd.h> | ||
| 20 | #include <linux/interrupt.h> | ||
| 21 | #include <linux/ioctl.h> | ||
| 22 | #include <linux/completion.h> | ||
| 23 | #include <linux/mfd/wm831x/core.h> | ||
| 24 | #include <linux/delay.h> | ||
| 25 | #include <linux/platform_device.h> | ||
| 26 | |||
| 27 | |||
| 28 | /* | ||
| 29 | * R16416 (0x4020) - RTC Write Counter | ||
| 30 | */ | ||
| 31 | #define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */ | ||
| 32 | #define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */ | ||
| 33 | #define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */ | ||
| 34 | |||
| 35 | /* | ||
| 36 | * R16417 (0x4021) - RTC Time 1 | ||
| 37 | */ | ||
| 38 | #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */ | ||
| 39 | #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */ | ||
| 40 | #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */ | ||
| 41 | |||
| 42 | /* | ||
| 43 | * R16418 (0x4022) - RTC Time 2 | ||
| 44 | */ | ||
| 45 | #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */ | ||
| 46 | #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */ | ||
| 47 | #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */ | ||
| 48 | |||
| 49 | /* | ||
| 50 | * R16419 (0x4023) - RTC Alarm 1 | ||
| 51 | */ | ||
| 52 | #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */ | ||
| 53 | #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */ | ||
| 54 | #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */ | ||
| 55 | |||
| 56 | /* | ||
| 57 | * R16420 (0x4024) - RTC Alarm 2 | ||
| 58 | */ | ||
| 59 | #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */ | ||
| 60 | #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */ | ||
| 61 | #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */ | ||
| 62 | |||
| 63 | /* | ||
| 64 | * R16421 (0x4025) - RTC Control | ||
| 65 | */ | ||
| 66 | #define WM831X_RTC_VALID 0x8000 /* RTC_VALID */ | ||
| 67 | #define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */ | ||
| 68 | #define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */ | ||
| 69 | #define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */ | ||
| 70 | #define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */ | ||
| 71 | #define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */ | ||
| 72 | #define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */ | ||
| 73 | #define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */ | ||
| 74 | #define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */ | ||
| 75 | #define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */ | ||
| 76 | #define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */ | ||
| 77 | #define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */ | ||
| 78 | #define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */ | ||
| 79 | #define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */ | ||
| 80 | #define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */ | ||
| 81 | |||
| 82 | /* | ||
| 83 | * R16422 (0x4026) - RTC Trim | ||
| 84 | */ | ||
| 85 | #define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */ | ||
| 86 | #define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */ | ||
| 87 | #define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */ | ||
| 88 | |||
| 89 | #define WM831X_SET_TIME_RETRIES 5 | ||
| 90 | #define WM831X_GET_TIME_RETRIES 5 | ||
| 91 | |||
| 92 | struct wm831x_rtc { | ||
| 93 | struct wm831x *wm831x; | ||
| 94 | struct rtc_device *rtc; | ||
| 95 | unsigned int alarm_enabled:1; | ||
| 96 | }; | ||
| 97 | |||
| 98 | /* | ||
| 99 | * Read current time and date in RTC | ||
| 100 | */ | ||
| 101 | static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm) | ||
| 102 | { | ||
| 103 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | ||
| 104 | struct wm831x *wm831x = wm831x_rtc->wm831x; | ||
| 105 | u16 time1[2], time2[2]; | ||
| 106 | int ret; | ||
| 107 | int count = 0; | ||
| 108 | |||
| 109 | /* Has the RTC been programmed? */ | ||
| 110 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | ||
| 111 | if (ret < 0) { | ||
| 112 | dev_err(dev, "Failed to read RTC control: %d\n", ret); | ||
| 113 | return ret; | ||
| 114 | } | ||
| 115 | if (!(ret & WM831X_RTC_VALID)) { | ||
| 116 | dev_dbg(dev, "RTC not yet configured\n"); | ||
| 117 | return -EINVAL; | ||
| 118 | } | ||
| 119 | |||
| 120 | /* Read twice to make sure we don't read a corrupt, partially | ||
| 121 | * incremented, value. | ||
| 122 | */ | ||
| 123 | do { | ||
| 124 | ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1, | ||
| 125 | 2, time1); | ||
| 126 | if (ret != 0) | ||
| 127 | continue; | ||
| 128 | |||
| 129 | ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1, | ||
| 130 | 2, time2); | ||
| 131 | if (ret != 0) | ||
| 132 | continue; | ||
| 133 | |||
| 134 | if (memcmp(time1, time2, sizeof(time1)) == 0) { | ||
| 135 | u32 time = (time1[0] << 16) | time1[1]; | ||
| 136 | |||
| 137 | rtc_time_to_tm(time, tm); | ||
| 138 | return rtc_valid_tm(tm); | ||
| 139 | } | ||
| 140 | |||
| 141 | } while (++count < WM831X_GET_TIME_RETRIES); | ||
| 142 | |||
| 143 | dev_err(dev, "Timed out reading current time\n"); | ||
| 144 | |||
| 145 | return -EIO; | ||
| 146 | } | ||
| 147 | |||
| 148 | /* | ||
| 149 | * Set current time and date in RTC | ||
| 150 | */ | ||
| 151 | static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time) | ||
| 152 | { | ||
| 153 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | ||
| 154 | struct wm831x *wm831x = wm831x_rtc->wm831x; | ||
| 155 | struct rtc_time new_tm; | ||
| 156 | unsigned long new_time; | ||
| 157 | int ret; | ||
| 158 | int count = 0; | ||
| 159 | |||
| 160 | ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1, | ||
| 161 | (time >> 16) & 0xffff); | ||
| 162 | if (ret < 0) { | ||
| 163 | dev_err(dev, "Failed to write TIME_1: %d\n", ret); | ||
| 164 | return ret; | ||
| 165 | } | ||
| 166 | |||
| 167 | ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff); | ||
| 168 | if (ret < 0) { | ||
| 169 | dev_err(dev, "Failed to write TIME_2: %d\n", ret); | ||
| 170 | return ret; | ||
| 171 | } | ||
| 172 | |||
| 173 | /* Wait for the update to complete - should happen first time | ||
| 174 | * round but be conservative. | ||
| 175 | */ | ||
| 176 | do { | ||
| 177 | msleep(1); | ||
| 178 | |||
| 179 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | ||
| 180 | if (ret < 0) | ||
| 181 | ret = WM831X_RTC_SYNC_BUSY; | ||
| 182 | } while (!(ret & WM831X_RTC_SYNC_BUSY) && | ||
| 183 | ++count < WM831X_SET_TIME_RETRIES); | ||
| 184 | |||
| 185 | if (ret & WM831X_RTC_SYNC_BUSY) { | ||
| 186 | dev_err(dev, "Timed out writing RTC update\n"); | ||
| 187 | return -EIO; | ||
| 188 | } | ||
| 189 | |||
| 190 | /* Check that the update was accepted; security features may | ||
| 191 | * have caused the update to be ignored. | ||
| 192 | */ | ||
| 193 | ret = wm831x_rtc_readtime(dev, &new_tm); | ||
| 194 | if (ret < 0) | ||
| 195 | return ret; | ||
| 196 | |||
| 197 | ret = rtc_tm_to_time(&new_tm, &new_time); | ||
| 198 | if (ret < 0) { | ||
| 199 | dev_err(dev, "Failed to convert time: %d\n", ret); | ||
| 200 | return ret; | ||
| 201 | } | ||
| 202 | |||
| 203 | /* Allow a second of change in case of tick */ | ||
| 204 | if (new_time - time > 1) { | ||
| 205 | dev_err(dev, "RTC update not permitted by hardware\n"); | ||
| 206 | return -EPERM; | ||
| 207 | } | ||
| 208 | |||
| 209 | return 0; | ||
| 210 | } | ||
| 211 | |||
| 212 | /* | ||
| 213 | * Read alarm time and date in RTC | ||
| 214 | */ | ||
| 215 | static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
| 216 | { | ||
| 217 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | ||
| 218 | int ret; | ||
| 219 | u16 data[2]; | ||
| 220 | u32 time; | ||
| 221 | |||
| 222 | ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1, | ||
| 223 | 2, data); | ||
| 224 | if (ret != 0) { | ||
| 225 | dev_err(dev, "Failed to read alarm time: %d\n", ret); | ||
| 226 | return ret; | ||
| 227 | } | ||
| 228 | |||
| 229 | time = (data[0] << 16) | data[1]; | ||
| 230 | |||
| 231 | rtc_time_to_tm(time, &alrm->time); | ||
| 232 | |||
| 233 | ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL); | ||
| 234 | if (ret < 0) { | ||
| 235 | dev_err(dev, "Failed to read RTC control: %d\n", ret); | ||
| 236 | return ret; | ||
| 237 | } | ||
| 238 | |||
| 239 | if (ret & WM831X_RTC_ALM_ENA) | ||
| 240 | alrm->enabled = 1; | ||
| 241 | else | ||
| 242 | alrm->enabled = 0; | ||
| 243 | |||
| 244 | return 0; | ||
| 245 | } | ||
| 246 | |||
| 247 | static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc) | ||
| 248 | { | ||
| 249 | wm831x_rtc->alarm_enabled = 0; | ||
| 250 | |||
| 251 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | ||
| 252 | WM831X_RTC_ALM_ENA, 0); | ||
| 253 | } | ||
| 254 | |||
| 255 | static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc) | ||
| 256 | { | ||
| 257 | wm831x_rtc->alarm_enabled = 1; | ||
| 258 | |||
| 259 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | ||
| 260 | WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA); | ||
| 261 | } | ||
| 262 | |||
| 263 | static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
| 264 | { | ||
| 265 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | ||
| 266 | struct wm831x *wm831x = wm831x_rtc->wm831x; | ||
| 267 | int ret; | ||
| 268 | unsigned long time; | ||
| 269 | |||
| 270 | ret = rtc_tm_to_time(&alrm->time, &time); | ||
| 271 | if (ret < 0) { | ||
| 272 | dev_err(dev, "Failed to convert time: %d\n", ret); | ||
| 273 | return ret; | ||
| 274 | } | ||
| 275 | |||
| 276 | ret = wm831x_rtc_stop_alarm(wm831x_rtc); | ||
| 277 | if (ret < 0) { | ||
| 278 | dev_err(dev, "Failed to stop alarm: %d\n", ret); | ||
| 279 | return ret; | ||
| 280 | } | ||
| 281 | |||
| 282 | ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1, | ||
| 283 | (time >> 16) & 0xffff); | ||
| 284 | if (ret < 0) { | ||
| 285 | dev_err(dev, "Failed to write ALARM_1: %d\n", ret); | ||
| 286 | return ret; | ||
| 287 | } | ||
| 288 | |||
| 289 | ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff); | ||
| 290 | if (ret < 0) { | ||
| 291 | dev_err(dev, "Failed to write ALARM_2: %d\n", ret); | ||
| 292 | return ret; | ||
| 293 | } | ||
| 294 | |||
| 295 | if (alrm->enabled) { | ||
| 296 | ret = wm831x_rtc_start_alarm(wm831x_rtc); | ||
| 297 | if (ret < 0) { | ||
| 298 | dev_err(dev, "Failed to start alarm: %d\n", ret); | ||
| 299 | return ret; | ||
| 300 | } | ||
| 301 | } | ||
| 302 | |||
| 303 | return 0; | ||
| 304 | } | ||
| 305 | |||
| 306 | static int wm831x_rtc_alarm_irq_enable(struct device *dev, | ||
| 307 | unsigned int enabled) | ||
| 308 | { | ||
| 309 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | ||
| 310 | |||
| 311 | if (enabled) | ||
| 312 | return wm831x_rtc_start_alarm(wm831x_rtc); | ||
| 313 | else | ||
| 314 | return wm831x_rtc_stop_alarm(wm831x_rtc); | ||
| 315 | } | ||
| 316 | |||
| 317 | static int wm831x_rtc_update_irq_enable(struct device *dev, | ||
| 318 | unsigned int enabled) | ||
| 319 | { | ||
| 320 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev); | ||
| 321 | int val; | ||
| 322 | |||
| 323 | if (enabled) | ||
| 324 | val = 1 << WM831X_RTC_PINT_FREQ_SHIFT; | ||
| 325 | else | ||
| 326 | val = 0; | ||
| 327 | |||
| 328 | return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | ||
| 329 | WM831X_RTC_PINT_FREQ_MASK, val); | ||
| 330 | } | ||
| 331 | |||
| 332 | static irqreturn_t wm831x_alm_irq(int irq, void *data) | ||
| 333 | { | ||
| 334 | struct wm831x_rtc *wm831x_rtc = data; | ||
| 335 | |||
| 336 | rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF); | ||
| 337 | |||
| 338 | return IRQ_HANDLED; | ||
| 339 | } | ||
| 340 | |||
| 341 | static irqreturn_t wm831x_per_irq(int irq, void *data) | ||
| 342 | { | ||
| 343 | struct wm831x_rtc *wm831x_rtc = data; | ||
| 344 | |||
| 345 | rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_UF); | ||
| 346 | |||
| 347 | return IRQ_HANDLED; | ||
| 348 | } | ||
| 349 | |||
| 350 | static const struct rtc_class_ops wm831x_rtc_ops = { | ||
| 351 | .read_time = wm831x_rtc_readtime, | ||
| 352 | .set_mmss = wm831x_rtc_set_mmss, | ||
| 353 | .read_alarm = wm831x_rtc_readalarm, | ||
| 354 | .set_alarm = wm831x_rtc_setalarm, | ||
| 355 | .alarm_irq_enable = wm831x_rtc_alarm_irq_enable, | ||
| 356 | .update_irq_enable = wm831x_rtc_update_irq_enable, | ||
| 357 | }; | ||
| 358 | |||
| 359 | #ifdef CONFIG_PM | ||
| 360 | /* Turn off the alarm if it should not be a wake source. */ | ||
| 361 | static int wm831x_rtc_suspend(struct device *dev) | ||
| 362 | { | ||
| 363 | struct platform_device *pdev = to_platform_device(dev); | ||
| 364 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | ||
| 365 | int ret, enable; | ||
| 366 | |||
| 367 | if (wm831x_rtc->alarm_enabled && device_may_wakeup(&pdev->dev)) | ||
| 368 | enable = WM831X_RTC_ALM_ENA; | ||
| 369 | else | ||
| 370 | enable = 0; | ||
| 371 | |||
| 372 | ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | ||
| 373 | WM831X_RTC_ALM_ENA, enable); | ||
| 374 | if (ret != 0) | ||
| 375 | dev_err(&pdev->dev, "Failed to update RTC alarm: %d\n", ret); | ||
| 376 | |||
| 377 | return 0; | ||
| 378 | } | ||
| 379 | |||
| 380 | /* Enable the alarm if it should be enabled (in case it was disabled to | ||
| 381 | * prevent use as a wake source). | ||
| 382 | */ | ||
| 383 | static int wm831x_rtc_resume(struct device *dev) | ||
| 384 | { | ||
| 385 | struct platform_device *pdev = to_platform_device(dev); | ||
| 386 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | ||
| 387 | int ret; | ||
| 388 | |||
| 389 | if (wm831x_rtc->alarm_enabled) { | ||
| 390 | ret = wm831x_rtc_start_alarm(wm831x_rtc); | ||
| 391 | if (ret != 0) | ||
| 392 | dev_err(&pdev->dev, | ||
| 393 | "Failed to restart RTC alarm: %d\n", ret); | ||
| 394 | } | ||
| 395 | |||
| 396 | return 0; | ||
| 397 | } | ||
| 398 | |||
| 399 | /* Unconditionally disable the alarm */ | ||
| 400 | static int wm831x_rtc_freeze(struct device *dev) | ||
| 401 | { | ||
| 402 | struct platform_device *pdev = to_platform_device(dev); | ||
| 403 | struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev); | ||
| 404 | int ret; | ||
| 405 | |||
| 406 | ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL, | ||
| 407 | WM831X_RTC_ALM_ENA, 0); | ||
| 408 | if (ret != 0) | ||
| 409 | dev_err(&pdev->dev, "Failed to stop RTC alarm: %d\n", ret); | ||
| 410 | |||
| 411 | return 0; | ||
| 412 | } | ||
| 413 | #else | ||
| 414 | #define wm831x_rtc_suspend NULL | ||
| 415 | #define wm831x_rtc_resume NULL | ||
| 416 | #define wm831x_rtc_freeze NULL | ||
| 417 | #endif | ||
| 418 | |||
| 419 | static int wm831x_rtc_probe(struct platform_device *pdev) | ||
| 420 | { | ||
| 421 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 422 | struct wm831x_rtc *wm831x_rtc; | ||
| 423 | int per_irq = platform_get_irq_byname(pdev, "PER"); | ||
| 424 | int alm_irq = platform_get_irq_byname(pdev, "ALM"); | ||
| 425 | int ret = 0; | ||
| 426 | |||
| 427 | wm831x_rtc = kzalloc(sizeof(*wm831x_rtc), GFP_KERNEL); | ||
| 428 | if (wm831x_rtc == NULL) | ||
| 429 | return -ENOMEM; | ||
| 430 | |||
| 431 | platform_set_drvdata(pdev, wm831x_rtc); | ||
| 432 | wm831x_rtc->wm831x = wm831x; | ||
| 433 | |||
| 434 | ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL); | ||
| 435 | if (ret < 0) { | ||
| 436 | dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret); | ||
| 437 | goto err; | ||
| 438 | } | ||
| 439 | if (ret & WM831X_RTC_ALM_ENA) | ||
| 440 | wm831x_rtc->alarm_enabled = 1; | ||
| 441 | |||
| 442 | device_init_wakeup(&pdev->dev, 1); | ||
| 443 | |||
| 444 | wm831x_rtc->rtc = rtc_device_register("wm831x", &pdev->dev, | ||
| 445 | &wm831x_rtc_ops, THIS_MODULE); | ||
| 446 | if (IS_ERR(wm831x_rtc->rtc)) { | ||
| 447 | ret = PTR_ERR(wm831x_rtc->rtc); | ||
| 448 | goto err; | ||
| 449 | } | ||
| 450 | |||
| 451 | ret = wm831x_request_irq(wm831x, per_irq, wm831x_per_irq, | ||
| 452 | IRQF_TRIGGER_RISING, "wm831x_rtc_per", | ||
| 453 | wm831x_rtc); | ||
| 454 | if (ret != 0) { | ||
| 455 | dev_err(&pdev->dev, "Failed to request periodic IRQ %d: %d\n", | ||
| 456 | per_irq, ret); | ||
| 457 | } | ||
| 458 | |||
| 459 | ret = wm831x_request_irq(wm831x, alm_irq, wm831x_alm_irq, | ||
| 460 | IRQF_TRIGGER_RISING, "wm831x_rtc_alm", | ||
| 461 | wm831x_rtc); | ||
| 462 | if (ret != 0) { | ||
| 463 | dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n", | ||
| 464 | alm_irq, ret); | ||
| 465 | } | ||
| 466 | |||
| 467 | return 0; | ||
| 468 | |||
| 469 | err: | ||
| 470 | kfree(wm831x_rtc); | ||
| 471 | return ret; | ||
| 472 | } | ||
| 473 | |||
| 474 | static int __devexit wm831x_rtc_remove(struct platform_device *pdev) | ||
| 475 | { | ||
| 476 | struct wm831x_rtc *wm831x_rtc = platform_get_drvdata(pdev); | ||
| 477 | int per_irq = platform_get_irq_byname(pdev, "PER"); | ||
| 478 | int alm_irq = platform_get_irq_byname(pdev, "ALM"); | ||
| 479 | |||
| 480 | wm831x_free_irq(wm831x_rtc->wm831x, alm_irq, wm831x_rtc); | ||
| 481 | wm831x_free_irq(wm831x_rtc->wm831x, per_irq, wm831x_rtc); | ||
| 482 | rtc_device_unregister(wm831x_rtc->rtc); | ||
| 483 | kfree(wm831x_rtc); | ||
| 484 | |||
| 485 | return 0; | ||
| 486 | } | ||
| 487 | |||
| 488 | static struct dev_pm_ops wm831x_rtc_pm_ops = { | ||
| 489 | .suspend = wm831x_rtc_suspend, | ||
| 490 | .resume = wm831x_rtc_resume, | ||
| 491 | |||
| 492 | .freeze = wm831x_rtc_freeze, | ||
| 493 | .thaw = wm831x_rtc_resume, | ||
| 494 | .restore = wm831x_rtc_resume, | ||
| 495 | |||
| 496 | .poweroff = wm831x_rtc_suspend, | ||
| 497 | }; | ||
| 498 | |||
| 499 | static struct platform_driver wm831x_rtc_driver = { | ||
| 500 | .probe = wm831x_rtc_probe, | ||
| 501 | .remove = __devexit_p(wm831x_rtc_remove), | ||
| 502 | .driver = { | ||
| 503 | .name = "wm831x-rtc", | ||
| 504 | .pm = &wm831x_rtc_pm_ops, | ||
| 505 | }, | ||
| 506 | }; | ||
| 507 | |||
| 508 | static int __init wm831x_rtc_init(void) | ||
| 509 | { | ||
| 510 | return platform_driver_register(&wm831x_rtc_driver); | ||
| 511 | } | ||
| 512 | module_init(wm831x_rtc_init); | ||
| 513 | |||
| 514 | static void __exit wm831x_rtc_exit(void) | ||
| 515 | { | ||
| 516 | platform_driver_unregister(&wm831x_rtc_driver); | ||
| 517 | } | ||
| 518 | module_exit(wm831x_rtc_exit); | ||
| 519 | |||
| 520 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | ||
| 521 | MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs"); | ||
| 522 | MODULE_LICENSE("GPL"); | ||
| 523 | MODULE_ALIAS("platform:wm831x-rtc"); | ||
diff --git a/drivers/scsi/fcoe/libfcoe.c b/drivers/scsi/fcoe/libfcoe.c index 62a4c2026072..11ae5c94608b 100644 --- a/drivers/scsi/fcoe/libfcoe.c +++ b/drivers/scsi/fcoe/libfcoe.c | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | #include <linux/ethtool.h> | 29 | #include <linux/ethtool.h> |
| 30 | #include <linux/if_ether.h> | 30 | #include <linux/if_ether.h> |
| 31 | #include <linux/if_vlan.h> | 31 | #include <linux/if_vlan.h> |
| 32 | #include <linux/netdevice.h> | ||
| 33 | #include <linux/errno.h> | 32 | #include <linux/errno.h> |
| 34 | #include <linux/bitops.h> | 33 | #include <linux/bitops.h> |
| 35 | #include <net/rtnetlink.h> | 34 | #include <net/rtnetlink.h> |
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c index 9928704e235f..d9b0e9d31983 100644 --- a/drivers/scsi/ibmvscsi/ibmvscsi.c +++ b/drivers/scsi/ibmvscsi/ibmvscsi.c | |||
| @@ -73,7 +73,6 @@ | |||
| 73 | #include <linux/of.h> | 73 | #include <linux/of.h> |
| 74 | #include <asm/firmware.h> | 74 | #include <asm/firmware.h> |
| 75 | #include <asm/vio.h> | 75 | #include <asm/vio.h> |
| 76 | #include <asm/firmware.h> | ||
| 77 | #include <scsi/scsi.h> | 76 | #include <scsi/scsi.h> |
| 78 | #include <scsi/scsi_cmnd.h> | 77 | #include <scsi/scsi_cmnd.h> |
| 79 | #include <scsi/scsi_host.h> | 78 | #include <scsi/scsi_host.h> |
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c index cb6d85d7ff43..1e3d19397a59 100644 --- a/drivers/serial/21285.c +++ b/drivers/serial/21285.c | |||
| @@ -86,7 +86,7 @@ static void serial21285_enable_ms(struct uart_port *port) | |||
| 86 | static irqreturn_t serial21285_rx_chars(int irq, void *dev_id) | 86 | static irqreturn_t serial21285_rx_chars(int irq, void *dev_id) |
| 87 | { | 87 | { |
| 88 | struct uart_port *port = dev_id; | 88 | struct uart_port *port = dev_id; |
| 89 | struct tty_struct *tty = port->info->port.tty; | 89 | struct tty_struct *tty = port->state->port.tty; |
| 90 | unsigned int status, ch, flag, rxs, max_count = 256; | 90 | unsigned int status, ch, flag, rxs, max_count = 256; |
| 91 | 91 | ||
| 92 | status = *CSR_UARTFLG; | 92 | status = *CSR_UARTFLG; |
| @@ -124,7 +124,7 @@ static irqreturn_t serial21285_rx_chars(int irq, void *dev_id) | |||
| 124 | static irqreturn_t serial21285_tx_chars(int irq, void *dev_id) | 124 | static irqreturn_t serial21285_tx_chars(int irq, void *dev_id) |
| 125 | { | 125 | { |
| 126 | struct uart_port *port = dev_id; | 126 | struct uart_port *port = dev_id; |
| 127 | struct circ_buf *xmit = &port->info->xmit; | 127 | struct circ_buf *xmit = &port->state->xmit; |
| 128 | int count = 256; | 128 | int count = 256; |
| 129 | 129 | ||
| 130 | if (port->x_char) { | 130 | if (port->x_char) { |
| @@ -235,8 +235,8 @@ serial21285_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 235 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 235 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); |
| 236 | quot = uart_get_divisor(port, baud); | 236 | quot = uart_get_divisor(port, baud); |
| 237 | 237 | ||
| 238 | if (port->info && port->info->port.tty) { | 238 | if (port->state && port->state->port.tty) { |
| 239 | struct tty_struct *tty = port->info->port.tty; | 239 | struct tty_struct *tty = port->state->port.tty; |
| 240 | unsigned int b = port->uartclk / (16 * quot); | 240 | unsigned int b = port->uartclk / (16 * quot); |
| 241 | tty_encode_baud_rate(tty, b, b); | 241 | tty_encode_baud_rate(tty, b, b); |
| 242 | } | 242 | } |
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index fb867a9f55e9..2209620d2349 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c | |||
| @@ -1382,7 +1382,7 @@ static void serial8250_enable_ms(struct uart_port *port) | |||
| 1382 | static void | 1382 | static void |
| 1383 | receive_chars(struct uart_8250_port *up, unsigned int *status) | 1383 | receive_chars(struct uart_8250_port *up, unsigned int *status) |
| 1384 | { | 1384 | { |
| 1385 | struct tty_struct *tty = up->port.info->port.tty; | 1385 | struct tty_struct *tty = up->port.state->port.tty; |
| 1386 | unsigned char ch, lsr = *status; | 1386 | unsigned char ch, lsr = *status; |
| 1387 | int max_count = 256; | 1387 | int max_count = 256; |
| 1388 | char flag; | 1388 | char flag; |
| @@ -1457,7 +1457,7 @@ ignore_char: | |||
| 1457 | 1457 | ||
| 1458 | static void transmit_chars(struct uart_8250_port *up) | 1458 | static void transmit_chars(struct uart_8250_port *up) |
| 1459 | { | 1459 | { |
| 1460 | struct circ_buf *xmit = &up->port.info->xmit; | 1460 | struct circ_buf *xmit = &up->port.state->xmit; |
| 1461 | int count; | 1461 | int count; |
| 1462 | 1462 | ||
| 1463 | if (up->port.x_char) { | 1463 | if (up->port.x_char) { |
| @@ -1500,7 +1500,7 @@ static unsigned int check_modem_status(struct uart_8250_port *up) | |||
| 1500 | status |= up->msr_saved_flags; | 1500 | status |= up->msr_saved_flags; |
| 1501 | up->msr_saved_flags = 0; | 1501 | up->msr_saved_flags = 0; |
| 1502 | if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && | 1502 | if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && |
| 1503 | up->port.info != NULL) { | 1503 | up->port.state != NULL) { |
| 1504 | if (status & UART_MSR_TERI) | 1504 | if (status & UART_MSR_TERI) |
| 1505 | up->port.icount.rng++; | 1505 | up->port.icount.rng++; |
| 1506 | if (status & UART_MSR_DDSR) | 1506 | if (status & UART_MSR_DDSR) |
| @@ -1510,7 +1510,7 @@ static unsigned int check_modem_status(struct uart_8250_port *up) | |||
| 1510 | if (status & UART_MSR_DCTS) | 1510 | if (status & UART_MSR_DCTS) |
| 1511 | uart_handle_cts_change(&up->port, status & UART_MSR_CTS); | 1511 | uart_handle_cts_change(&up->port, status & UART_MSR_CTS); |
| 1512 | 1512 | ||
| 1513 | wake_up_interruptible(&up->port.info->delta_msr_wait); | 1513 | wake_up_interruptible(&up->port.state->port.delta_msr_wait); |
| 1514 | } | 1514 | } |
| 1515 | 1515 | ||
| 1516 | return status; | 1516 | return status; |
| @@ -1677,7 +1677,7 @@ static int serial_link_irq_chain(struct uart_8250_port *up) | |||
| 1677 | INIT_LIST_HEAD(&up->list); | 1677 | INIT_LIST_HEAD(&up->list); |
| 1678 | i->head = &up->list; | 1678 | i->head = &up->list; |
| 1679 | spin_unlock_irq(&i->lock); | 1679 | spin_unlock_irq(&i->lock); |
| 1680 | 1680 | irq_flags |= up->port.irqflags; | |
| 1681 | ret = request_irq(up->port.irq, serial8250_interrupt, | 1681 | ret = request_irq(up->port.irq, serial8250_interrupt, |
| 1682 | irq_flags, "serial", i); | 1682 | irq_flags, "serial", i); |
| 1683 | if (ret < 0) | 1683 | if (ret < 0) |
| @@ -1764,7 +1764,7 @@ static void serial8250_backup_timeout(unsigned long data) | |||
| 1764 | up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; | 1764 | up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; |
| 1765 | spin_unlock_irqrestore(&up->port.lock, flags); | 1765 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 1766 | if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) && | 1766 | if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) && |
| 1767 | (!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) && | 1767 | (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) && |
| 1768 | (lsr & UART_LSR_THRE)) { | 1768 | (lsr & UART_LSR_THRE)) { |
| 1769 | iir &= ~(UART_IIR_ID | UART_IIR_NO_INT); | 1769 | iir &= ~(UART_IIR_ID | UART_IIR_NO_INT); |
| 1770 | iir |= UART_IIR_THRI; | 1770 | iir |= UART_IIR_THRI; |
| @@ -2026,7 +2026,7 @@ static int serial8250_startup(struct uart_port *port) | |||
| 2026 | * allow register changes to become visible. | 2026 | * allow register changes to become visible. |
| 2027 | */ | 2027 | */ |
| 2028 | spin_lock_irqsave(&up->port.lock, flags); | 2028 | spin_lock_irqsave(&up->port.lock, flags); |
| 2029 | if (up->port.flags & UPF_SHARE_IRQ) | 2029 | if (up->port.irqflags & IRQF_SHARED) |
| 2030 | disable_irq_nosync(up->port.irq); | 2030 | disable_irq_nosync(up->port.irq); |
| 2031 | 2031 | ||
| 2032 | wait_for_xmitr(up, UART_LSR_THRE); | 2032 | wait_for_xmitr(up, UART_LSR_THRE); |
| @@ -2039,7 +2039,7 @@ static int serial8250_startup(struct uart_port *port) | |||
| 2039 | iir = serial_in(up, UART_IIR); | 2039 | iir = serial_in(up, UART_IIR); |
| 2040 | serial_out(up, UART_IER, 0); | 2040 | serial_out(up, UART_IER, 0); |
| 2041 | 2041 | ||
| 2042 | if (up->port.flags & UPF_SHARE_IRQ) | 2042 | if (up->port.irqflags & IRQF_SHARED) |
| 2043 | enable_irq(up->port.irq); | 2043 | enable_irq(up->port.irq); |
| 2044 | spin_unlock_irqrestore(&up->port.lock, flags); | 2044 | spin_unlock_irqrestore(&up->port.lock, flags); |
| 2045 | 2045 | ||
| @@ -2272,7 +2272,9 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 2272 | /* | 2272 | /* |
| 2273 | * Ask the core to calculate the divisor for us. | 2273 | * Ask the core to calculate the divisor for us. |
| 2274 | */ | 2274 | */ |
| 2275 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 2275 | baud = uart_get_baud_rate(port, termios, old, |
| 2276 | port->uartclk / 16 / 0xffff, | ||
| 2277 | port->uartclk / 16); | ||
| 2276 | quot = serial8250_get_divisor(port, baud); | 2278 | quot = serial8250_get_divisor(port, baud); |
| 2277 | 2279 | ||
| 2278 | /* | 2280 | /* |
| @@ -2671,6 +2673,7 @@ static void __init serial8250_isa_init_ports(void) | |||
| 2671 | i++, up++) { | 2673 | i++, up++) { |
| 2672 | up->port.iobase = old_serial_port[i].port; | 2674 | up->port.iobase = old_serial_port[i].port; |
| 2673 | up->port.irq = irq_canonicalize(old_serial_port[i].irq); | 2675 | up->port.irq = irq_canonicalize(old_serial_port[i].irq); |
| 2676 | up->port.irqflags = old_serial_port[i].irqflags; | ||
| 2674 | up->port.uartclk = old_serial_port[i].baud_base * 16; | 2677 | up->port.uartclk = old_serial_port[i].baud_base * 16; |
| 2675 | up->port.flags = old_serial_port[i].flags; | 2678 | up->port.flags = old_serial_port[i].flags; |
| 2676 | up->port.hub6 = old_serial_port[i].hub6; | 2679 | up->port.hub6 = old_serial_port[i].hub6; |
| @@ -2679,7 +2682,7 @@ static void __init serial8250_isa_init_ports(void) | |||
| 2679 | up->port.regshift = old_serial_port[i].iomem_reg_shift; | 2682 | up->port.regshift = old_serial_port[i].iomem_reg_shift; |
| 2680 | set_io_from_upio(&up->port); | 2683 | set_io_from_upio(&up->port); |
| 2681 | if (share_irqs) | 2684 | if (share_irqs) |
| 2682 | up->port.flags |= UPF_SHARE_IRQ; | 2685 | up->port.irqflags |= IRQF_SHARED; |
| 2683 | } | 2686 | } |
| 2684 | } | 2687 | } |
| 2685 | 2688 | ||
| @@ -2869,6 +2872,7 @@ int __init early_serial_setup(struct uart_port *port) | |||
| 2869 | p->iobase = port->iobase; | 2872 | p->iobase = port->iobase; |
| 2870 | p->membase = port->membase; | 2873 | p->membase = port->membase; |
| 2871 | p->irq = port->irq; | 2874 | p->irq = port->irq; |
| 2875 | p->irqflags = port->irqflags; | ||
| 2872 | p->uartclk = port->uartclk; | 2876 | p->uartclk = port->uartclk; |
| 2873 | p->fifosize = port->fifosize; | 2877 | p->fifosize = port->fifosize; |
| 2874 | p->regshift = port->regshift; | 2878 | p->regshift = port->regshift; |
| @@ -2942,6 +2946,7 @@ static int __devinit serial8250_probe(struct platform_device *dev) | |||
| 2942 | port.iobase = p->iobase; | 2946 | port.iobase = p->iobase; |
| 2943 | port.membase = p->membase; | 2947 | port.membase = p->membase; |
| 2944 | port.irq = p->irq; | 2948 | port.irq = p->irq; |
| 2949 | port.irqflags = p->irqflags; | ||
| 2945 | port.uartclk = p->uartclk; | 2950 | port.uartclk = p->uartclk; |
| 2946 | port.regshift = p->regshift; | 2951 | port.regshift = p->regshift; |
| 2947 | port.iotype = p->iotype; | 2952 | port.iotype = p->iotype; |
| @@ -2954,7 +2959,7 @@ static int __devinit serial8250_probe(struct platform_device *dev) | |||
| 2954 | port.serial_out = p->serial_out; | 2959 | port.serial_out = p->serial_out; |
| 2955 | port.dev = &dev->dev; | 2960 | port.dev = &dev->dev; |
| 2956 | if (share_irqs) | 2961 | if (share_irqs) |
| 2957 | port.flags |= UPF_SHARE_IRQ; | 2962 | port.irqflags |= IRQF_SHARED; |
| 2958 | ret = serial8250_register_port(&port); | 2963 | ret = serial8250_register_port(&port); |
| 2959 | if (ret < 0) { | 2964 | if (ret < 0) { |
| 2960 | dev_err(&dev->dev, "unable to register port at index %d " | 2965 | dev_err(&dev->dev, "unable to register port at index %d " |
| @@ -3096,6 +3101,7 @@ int serial8250_register_port(struct uart_port *port) | |||
| 3096 | uart->port.iobase = port->iobase; | 3101 | uart->port.iobase = port->iobase; |
| 3097 | uart->port.membase = port->membase; | 3102 | uart->port.membase = port->membase; |
| 3098 | uart->port.irq = port->irq; | 3103 | uart->port.irq = port->irq; |
| 3104 | uart->port.irqflags = port->irqflags; | ||
| 3099 | uart->port.uartclk = port->uartclk; | 3105 | uart->port.uartclk = port->uartclk; |
| 3100 | uart->port.fifosize = port->fifosize; | 3106 | uart->port.fifosize = port->fifosize; |
| 3101 | uart->port.regshift = port->regshift; | 3107 | uart->port.regshift = port->regshift; |
diff --git a/drivers/serial/8250.h b/drivers/serial/8250.h index 520260326f3d..6e19ea3e48d5 100644 --- a/drivers/serial/8250.h +++ b/drivers/serial/8250.h | |||
| @@ -25,6 +25,7 @@ struct old_serial_port { | |||
| 25 | unsigned char io_type; | 25 | unsigned char io_type; |
| 26 | unsigned char *iomem_base; | 26 | unsigned char *iomem_base; |
| 27 | unsigned short iomem_reg_shift; | 27 | unsigned short iomem_reg_shift; |
| 28 | unsigned long irqflags; | ||
| 28 | }; | 29 | }; |
| 29 | 30 | ||
| 30 | /* | 31 | /* |
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index 58a4879c7e48..429a8ae86933 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c | |||
| @@ -117,7 +117,7 @@ static void pl010_enable_ms(struct uart_port *port) | |||
| 117 | 117 | ||
| 118 | static void pl010_rx_chars(struct uart_amba_port *uap) | 118 | static void pl010_rx_chars(struct uart_amba_port *uap) |
| 119 | { | 119 | { |
| 120 | struct tty_struct *tty = uap->port.info->port.tty; | 120 | struct tty_struct *tty = uap->port.state->port.tty; |
| 121 | unsigned int status, ch, flag, rsr, max_count = 256; | 121 | unsigned int status, ch, flag, rsr, max_count = 256; |
| 122 | 122 | ||
| 123 | status = readb(uap->port.membase + UART01x_FR); | 123 | status = readb(uap->port.membase + UART01x_FR); |
| @@ -172,7 +172,7 @@ static void pl010_rx_chars(struct uart_amba_port *uap) | |||
| 172 | 172 | ||
| 173 | static void pl010_tx_chars(struct uart_amba_port *uap) | 173 | static void pl010_tx_chars(struct uart_amba_port *uap) |
| 174 | { | 174 | { |
| 175 | struct circ_buf *xmit = &uap->port.info->xmit; | 175 | struct circ_buf *xmit = &uap->port.state->xmit; |
| 176 | int count; | 176 | int count; |
| 177 | 177 | ||
| 178 | if (uap->port.x_char) { | 178 | if (uap->port.x_char) { |
| @@ -225,7 +225,7 @@ static void pl010_modem_status(struct uart_amba_port *uap) | |||
| 225 | if (delta & UART01x_FR_CTS) | 225 | if (delta & UART01x_FR_CTS) |
| 226 | uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); | 226 | uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); |
| 227 | 227 | ||
| 228 | wake_up_interruptible(&uap->port.info->delta_msr_wait); | 228 | wake_up_interruptible(&uap->port.state->port.delta_msr_wait); |
| 229 | } | 229 | } |
| 230 | 230 | ||
| 231 | static irqreturn_t pl010_int(int irq, void *dev_id) | 231 | static irqreturn_t pl010_int(int irq, void *dev_id) |
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index 72ba0c6d3551..ef7adc8135dd 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c | |||
| @@ -124,7 +124,7 @@ static void pl011_enable_ms(struct uart_port *port) | |||
| 124 | 124 | ||
| 125 | static void pl011_rx_chars(struct uart_amba_port *uap) | 125 | static void pl011_rx_chars(struct uart_amba_port *uap) |
| 126 | { | 126 | { |
| 127 | struct tty_struct *tty = uap->port.info->port.tty; | 127 | struct tty_struct *tty = uap->port.state->port.tty; |
| 128 | unsigned int status, ch, flag, max_count = 256; | 128 | unsigned int status, ch, flag, max_count = 256; |
| 129 | 129 | ||
| 130 | status = readw(uap->port.membase + UART01x_FR); | 130 | status = readw(uap->port.membase + UART01x_FR); |
| @@ -175,7 +175,7 @@ static void pl011_rx_chars(struct uart_amba_port *uap) | |||
| 175 | 175 | ||
| 176 | static void pl011_tx_chars(struct uart_amba_port *uap) | 176 | static void pl011_tx_chars(struct uart_amba_port *uap) |
| 177 | { | 177 | { |
| 178 | struct circ_buf *xmit = &uap->port.info->xmit; | 178 | struct circ_buf *xmit = &uap->port.state->xmit; |
| 179 | int count; | 179 | int count; |
| 180 | 180 | ||
| 181 | if (uap->port.x_char) { | 181 | if (uap->port.x_char) { |
| @@ -226,7 +226,7 @@ static void pl011_modem_status(struct uart_amba_port *uap) | |||
| 226 | if (delta & UART01x_FR_CTS) | 226 | if (delta & UART01x_FR_CTS) |
| 227 | uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); | 227 | uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); |
| 228 | 228 | ||
| 229 | wake_up_interruptible(&uap->port.info->delta_msr_wait); | 229 | wake_up_interruptible(&uap->port.state->port.delta_msr_wait); |
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | static irqreturn_t pl011_int(int irq, void *dev_id) | 232 | static irqreturn_t pl011_int(int irq, void *dev_id) |
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c index 607d43a31048..3551c5cb7094 100644 --- a/drivers/serial/atmel_serial.c +++ b/drivers/serial/atmel_serial.c | |||
| @@ -427,7 +427,7 @@ static void atmel_rx_chars(struct uart_port *port) | |||
| 427 | */ | 427 | */ |
| 428 | static void atmel_tx_chars(struct uart_port *port) | 428 | static void atmel_tx_chars(struct uart_port *port) |
| 429 | { | 429 | { |
| 430 | struct circ_buf *xmit = &port->info->xmit; | 430 | struct circ_buf *xmit = &port->state->xmit; |
| 431 | 431 | ||
| 432 | if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) { | 432 | if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) { |
| 433 | UART_PUT_CHAR(port, port->x_char); | 433 | UART_PUT_CHAR(port, port->x_char); |
| @@ -560,7 +560,7 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id) | |||
| 560 | static void atmel_tx_dma(struct uart_port *port) | 560 | static void atmel_tx_dma(struct uart_port *port) |
| 561 | { | 561 | { |
| 562 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | 562 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
| 563 | struct circ_buf *xmit = &port->info->xmit; | 563 | struct circ_buf *xmit = &port->state->xmit; |
| 564 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; | 564 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; |
| 565 | int count; | 565 | int count; |
| 566 | 566 | ||
| @@ -663,14 +663,14 @@ static void atmel_rx_from_ring(struct uart_port *port) | |||
| 663 | * uart_start(), which takes the lock. | 663 | * uart_start(), which takes the lock. |
| 664 | */ | 664 | */ |
| 665 | spin_unlock(&port->lock); | 665 | spin_unlock(&port->lock); |
| 666 | tty_flip_buffer_push(port->info->port.tty); | 666 | tty_flip_buffer_push(port->state->port.tty); |
| 667 | spin_lock(&port->lock); | 667 | spin_lock(&port->lock); |
| 668 | } | 668 | } |
| 669 | 669 | ||
| 670 | static void atmel_rx_from_dma(struct uart_port *port) | 670 | static void atmel_rx_from_dma(struct uart_port *port) |
| 671 | { | 671 | { |
| 672 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | 672 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
| 673 | struct tty_struct *tty = port->info->port.tty; | 673 | struct tty_struct *tty = port->state->port.tty; |
| 674 | struct atmel_dma_buffer *pdc; | 674 | struct atmel_dma_buffer *pdc; |
| 675 | int rx_idx = atmel_port->pdc_rx_idx; | 675 | int rx_idx = atmel_port->pdc_rx_idx; |
| 676 | unsigned int head; | 676 | unsigned int head; |
| @@ -776,7 +776,7 @@ static void atmel_tasklet_func(unsigned long data) | |||
| 776 | if (status_change & ATMEL_US_CTS) | 776 | if (status_change & ATMEL_US_CTS) |
| 777 | uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); | 777 | uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); |
| 778 | 778 | ||
| 779 | wake_up_interruptible(&port->info->delta_msr_wait); | 779 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
| 780 | 780 | ||
| 781 | atmel_port->irq_status_prev = status; | 781 | atmel_port->irq_status_prev = status; |
| 782 | } | 782 | } |
| @@ -795,7 +795,7 @@ static void atmel_tasklet_func(unsigned long data) | |||
| 795 | static int atmel_startup(struct uart_port *port) | 795 | static int atmel_startup(struct uart_port *port) |
| 796 | { | 796 | { |
| 797 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | 797 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
| 798 | struct tty_struct *tty = port->info->port.tty; | 798 | struct tty_struct *tty = port->state->port.tty; |
| 799 | int retval; | 799 | int retval; |
| 800 | 800 | ||
| 801 | /* | 801 | /* |
| @@ -854,7 +854,7 @@ static int atmel_startup(struct uart_port *port) | |||
| 854 | } | 854 | } |
| 855 | if (atmel_use_dma_tx(port)) { | 855 | if (atmel_use_dma_tx(port)) { |
| 856 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; | 856 | struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; |
| 857 | struct circ_buf *xmit = &port->info->xmit; | 857 | struct circ_buf *xmit = &port->state->xmit; |
| 858 | 858 | ||
| 859 | pdc->buf = xmit->buf; | 859 | pdc->buf = xmit->buf; |
| 860 | pdc->dma_addr = dma_map_single(port->dev, | 860 | pdc->dma_addr = dma_map_single(port->dev, |
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c index b4a7650af696..50abb7e557f4 100644 --- a/drivers/serial/bfin_5xx.c +++ b/drivers/serial/bfin_5xx.c | |||
| @@ -42,6 +42,10 @@ | |||
| 42 | # undef CONFIG_EARLY_PRINTK | 42 | # undef CONFIG_EARLY_PRINTK |
| 43 | #endif | 43 | #endif |
| 44 | 44 | ||
| 45 | #ifdef CONFIG_SERIAL_BFIN_MODULE | ||
| 46 | # undef CONFIG_EARLY_PRINTK | ||
| 47 | #endif | ||
| 48 | |||
| 45 | /* UART name and device definitions */ | 49 | /* UART name and device definitions */ |
| 46 | #define BFIN_SERIAL_NAME "ttyBF" | 50 | #define BFIN_SERIAL_NAME "ttyBF" |
| 47 | #define BFIN_SERIAL_MAJOR 204 | 51 | #define BFIN_SERIAL_MAJOR 204 |
| @@ -140,7 +144,7 @@ static void bfin_serial_stop_tx(struct uart_port *port) | |||
| 140 | { | 144 | { |
| 141 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | 145 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; |
| 142 | #ifdef CONFIG_SERIAL_BFIN_DMA | 146 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 143 | struct circ_buf *xmit = &uart->port.info->xmit; | 147 | struct circ_buf *xmit = &uart->port.state->xmit; |
| 144 | #endif | 148 | #endif |
| 145 | 149 | ||
| 146 | while (!(UART_GET_LSR(uart) & TEMT)) | 150 | while (!(UART_GET_LSR(uart) & TEMT)) |
| @@ -167,7 +171,7 @@ static void bfin_serial_stop_tx(struct uart_port *port) | |||
| 167 | static void bfin_serial_start_tx(struct uart_port *port) | 171 | static void bfin_serial_start_tx(struct uart_port *port) |
| 168 | { | 172 | { |
| 169 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | 173 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; |
| 170 | struct tty_struct *tty = uart->port.info->port.tty; | 174 | struct tty_struct *tty = uart->port.state->port.tty; |
| 171 | 175 | ||
| 172 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | 176 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS |
| 173 | if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) { | 177 | if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) { |
| @@ -239,10 +243,10 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart) | |||
| 239 | return; | 243 | return; |
| 240 | } | 244 | } |
| 241 | 245 | ||
| 242 | if (!uart->port.info || !uart->port.info->port.tty) | 246 | if (!uart->port.state || !uart->port.state->port.tty) |
| 243 | return; | 247 | return; |
| 244 | #endif | 248 | #endif |
| 245 | tty = uart->port.info->port.tty; | 249 | tty = uart->port.state->port.tty; |
| 246 | 250 | ||
| 247 | if (ANOMALY_05000363) { | 251 | if (ANOMALY_05000363) { |
| 248 | /* The BF533 (and BF561) family of processors have a nice anomaly | 252 | /* The BF533 (and BF561) family of processors have a nice anomaly |
| @@ -327,7 +331,7 @@ static void bfin_serial_rx_chars(struct bfin_serial_port *uart) | |||
| 327 | 331 | ||
| 328 | static void bfin_serial_tx_chars(struct bfin_serial_port *uart) | 332 | static void bfin_serial_tx_chars(struct bfin_serial_port *uart) |
| 329 | { | 333 | { |
| 330 | struct circ_buf *xmit = &uart->port.info->xmit; | 334 | struct circ_buf *xmit = &uart->port.state->xmit; |
| 331 | 335 | ||
| 332 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { | 336 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { |
| 333 | #ifdef CONFIG_BF54x | 337 | #ifdef CONFIG_BF54x |
| @@ -394,7 +398,7 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id) | |||
| 394 | #ifdef CONFIG_SERIAL_BFIN_DMA | 398 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 395 | static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) | 399 | static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) |
| 396 | { | 400 | { |
| 397 | struct circ_buf *xmit = &uart->port.info->xmit; | 401 | struct circ_buf *xmit = &uart->port.state->xmit; |
| 398 | 402 | ||
| 399 | uart->tx_done = 0; | 403 | uart->tx_done = 0; |
| 400 | 404 | ||
| @@ -432,7 +436,7 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) | |||
| 432 | 436 | ||
| 433 | static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart) | 437 | static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart) |
| 434 | { | 438 | { |
| 435 | struct tty_struct *tty = uart->port.info->port.tty; | 439 | struct tty_struct *tty = uart->port.state->port.tty; |
| 436 | int i, flg, status; | 440 | int i, flg, status; |
| 437 | 441 | ||
| 438 | status = UART_GET_LSR(uart); | 442 | status = UART_GET_LSR(uart); |
| @@ -525,7 +529,7 @@ void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart) | |||
| 525 | static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id) | 529 | static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id) |
| 526 | { | 530 | { |
| 527 | struct bfin_serial_port *uart = dev_id; | 531 | struct bfin_serial_port *uart = dev_id; |
| 528 | struct circ_buf *xmit = &uart->port.info->xmit; | 532 | struct circ_buf *xmit = &uart->port.state->xmit; |
| 529 | 533 | ||
| 530 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | 534 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS |
| 531 | if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { | 535 | if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { |
| @@ -961,10 +965,10 @@ static void bfin_serial_set_ldisc(struct uart_port *port) | |||
| 961 | int line = port->line; | 965 | int line = port->line; |
| 962 | unsigned short val; | 966 | unsigned short val; |
| 963 | 967 | ||
| 964 | if (line >= port->info->port.tty->driver->num) | 968 | if (line >= port->state->port.tty->driver->num) |
| 965 | return; | 969 | return; |
| 966 | 970 | ||
| 967 | switch (port->info->port.tty->termios->c_line) { | 971 | switch (port->state->port.tty->termios->c_line) { |
| 968 | case N_IRDA: | 972 | case N_IRDA: |
| 969 | val = UART_GET_GCTL(&bfin_serial_ports[line]); | 973 | val = UART_GET_GCTL(&bfin_serial_ports[line]); |
| 970 | val |= (IREN | RPOLC); | 974 | val |= (IREN | RPOLC); |
diff --git a/drivers/serial/bfin_sport_uart.c b/drivers/serial/bfin_sport_uart.c index c108b1a0ce98..088bb35475f1 100644 --- a/drivers/serial/bfin_sport_uart.c +++ b/drivers/serial/bfin_sport_uart.c | |||
| @@ -178,7 +178,7 @@ static int sport_uart_setup(struct sport_uart_port *up, int sclk, int baud_rate) | |||
| 178 | static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id) | 178 | static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id) |
| 179 | { | 179 | { |
| 180 | struct sport_uart_port *up = dev_id; | 180 | struct sport_uart_port *up = dev_id; |
| 181 | struct tty_struct *tty = up->port.info->port.tty; | 181 | struct tty_struct *tty = up->port.state->port.tty; |
| 182 | unsigned int ch; | 182 | unsigned int ch; |
| 183 | 183 | ||
| 184 | do { | 184 | do { |
| @@ -205,7 +205,7 @@ static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id) | |||
| 205 | static irqreturn_t sport_uart_err_irq(int irq, void *dev_id) | 205 | static irqreturn_t sport_uart_err_irq(int irq, void *dev_id) |
| 206 | { | 206 | { |
| 207 | struct sport_uart_port *up = dev_id; | 207 | struct sport_uart_port *up = dev_id; |
| 208 | struct tty_struct *tty = up->port.info->port.tty; | 208 | struct tty_struct *tty = up->port.state->port.tty; |
| 209 | unsigned int stat = SPORT_GET_STAT(up); | 209 | unsigned int stat = SPORT_GET_STAT(up); |
| 210 | 210 | ||
| 211 | /* Overflow in RX FIFO */ | 211 | /* Overflow in RX FIFO */ |
| @@ -290,7 +290,7 @@ fail1: | |||
| 290 | 290 | ||
| 291 | static void sport_uart_tx_chars(struct sport_uart_port *up) | 291 | static void sport_uart_tx_chars(struct sport_uart_port *up) |
| 292 | { | 292 | { |
| 293 | struct circ_buf *xmit = &up->port.info->xmit; | 293 | struct circ_buf *xmit = &up->port.state->xmit; |
| 294 | 294 | ||
| 295 | if (SPORT_GET_STAT(up) & TXF) | 295 | if (SPORT_GET_STAT(up) & TXF) |
| 296 | return; | 296 | return; |
diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c index 80e76426131d..b6acd19b458e 100644 --- a/drivers/serial/clps711x.c +++ b/drivers/serial/clps711x.c | |||
| @@ -93,7 +93,7 @@ static void clps711xuart_enable_ms(struct uart_port *port) | |||
| 93 | static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id) | 93 | static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id) |
| 94 | { | 94 | { |
| 95 | struct uart_port *port = dev_id; | 95 | struct uart_port *port = dev_id; |
| 96 | struct tty_struct *tty = port->info->port.tty; | 96 | struct tty_struct *tty = port->state->port.tty; |
| 97 | unsigned int status, ch, flg; | 97 | unsigned int status, ch, flg; |
| 98 | 98 | ||
| 99 | status = clps_readl(SYSFLG(port)); | 99 | status = clps_readl(SYSFLG(port)); |
| @@ -147,7 +147,7 @@ static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id) | |||
| 147 | static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id) | 147 | static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id) |
| 148 | { | 148 | { |
| 149 | struct uart_port *port = dev_id; | 149 | struct uart_port *port = dev_id; |
| 150 | struct circ_buf *xmit = &port->info->xmit; | 150 | struct circ_buf *xmit = &port->state->xmit; |
| 151 | int count; | 151 | int count; |
| 152 | 152 | ||
| 153 | if (port->x_char) { | 153 | if (port->x_char) { |
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index f8df0681e160..8d349b23249a 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c | |||
| @@ -244,7 +244,7 @@ static void cpm_uart_int_rx(struct uart_port *port) | |||
| 244 | int i; | 244 | int i; |
| 245 | unsigned char ch; | 245 | unsigned char ch; |
| 246 | u8 *cp; | 246 | u8 *cp; |
| 247 | struct tty_struct *tty = port->info->port.tty; | 247 | struct tty_struct *tty = port->state->port.tty; |
| 248 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 248 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
| 249 | cbd_t __iomem *bdp; | 249 | cbd_t __iomem *bdp; |
| 250 | u16 status; | 250 | u16 status; |
diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c index 6042b87797a1..57421d776329 100644 --- a/drivers/serial/dz.c +++ b/drivers/serial/dz.c | |||
| @@ -197,7 +197,7 @@ static inline void dz_receive_chars(struct dz_mux *mux) | |||
| 197 | while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) { | 197 | while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) { |
| 198 | dport = &mux->dport[LINE(status)]; | 198 | dport = &mux->dport[LINE(status)]; |
| 199 | uport = &dport->port; | 199 | uport = &dport->port; |
| 200 | tty = uport->info->port.tty; /* point to the proper dev */ | 200 | tty = uport->state->port.tty; /* point to the proper dev */ |
| 201 | 201 | ||
| 202 | ch = UCHAR(status); /* grab the char */ | 202 | ch = UCHAR(status); /* grab the char */ |
| 203 | flag = TTY_NORMAL; | 203 | flag = TTY_NORMAL; |
| @@ -249,7 +249,7 @@ static inline void dz_receive_chars(struct dz_mux *mux) | |||
| 249 | } | 249 | } |
| 250 | for (i = 0; i < DZ_NB_PORT; i++) | 250 | for (i = 0; i < DZ_NB_PORT; i++) |
| 251 | if (lines_rx[i]) | 251 | if (lines_rx[i]) |
| 252 | tty_flip_buffer_push(mux->dport[i].port.info->port.tty); | 252 | tty_flip_buffer_push(mux->dport[i].port.state->port.tty); |
| 253 | } | 253 | } |
| 254 | 254 | ||
| 255 | /* | 255 | /* |
| @@ -268,7 +268,7 @@ static inline void dz_transmit_chars(struct dz_mux *mux) | |||
| 268 | 268 | ||
| 269 | status = dz_in(dport, DZ_CSR); | 269 | status = dz_in(dport, DZ_CSR); |
| 270 | dport = &mux->dport[LINE(status)]; | 270 | dport = &mux->dport[LINE(status)]; |
| 271 | xmit = &dport->port.info->xmit; | 271 | xmit = &dport->port.state->xmit; |
| 272 | 272 | ||
| 273 | if (dport->port.x_char) { /* XON/XOFF chars */ | 273 | if (dport->port.x_char) { /* XON/XOFF chars */ |
| 274 | dz_out(dport, DZ_TDR, dport->port.x_char); | 274 | dz_out(dport, DZ_TDR, dport->port.x_char); |
diff --git a/drivers/serial/icom.c b/drivers/serial/icom.c index cd1b6a45bb82..2d7feecaf492 100644 --- a/drivers/serial/icom.c +++ b/drivers/serial/icom.c | |||
| @@ -617,7 +617,7 @@ static void shutdown(struct icom_port *icom_port) | |||
| 617 | * disable break condition | 617 | * disable break condition |
| 618 | */ | 618 | */ |
| 619 | cmdReg = readb(&icom_port->dram->CmdReg); | 619 | cmdReg = readb(&icom_port->dram->CmdReg); |
| 620 | if ((cmdReg | CMD_SND_BREAK) == CMD_SND_BREAK) { | 620 | if (cmdReg & CMD_SND_BREAK) { |
| 621 | writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg); | 621 | writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg); |
| 622 | } | 622 | } |
| 623 | } | 623 | } |
| @@ -627,7 +627,7 @@ static int icom_write(struct uart_port *port) | |||
| 627 | unsigned long data_count; | 627 | unsigned long data_count; |
| 628 | unsigned char cmdReg; | 628 | unsigned char cmdReg; |
| 629 | unsigned long offset; | 629 | unsigned long offset; |
| 630 | int temp_tail = port->info->xmit.tail; | 630 | int temp_tail = port->state->xmit.tail; |
| 631 | 631 | ||
| 632 | trace(ICOM_PORT, "WRITE", 0); | 632 | trace(ICOM_PORT, "WRITE", 0); |
| 633 | 633 | ||
| @@ -638,11 +638,11 @@ static int icom_write(struct uart_port *port) | |||
| 638 | } | 638 | } |
| 639 | 639 | ||
| 640 | data_count = 0; | 640 | data_count = 0; |
| 641 | while ((port->info->xmit.head != temp_tail) && | 641 | while ((port->state->xmit.head != temp_tail) && |
| 642 | (data_count <= XMIT_BUFF_SZ)) { | 642 | (data_count <= XMIT_BUFF_SZ)) { |
| 643 | 643 | ||
| 644 | ICOM_PORT->xmit_buf[data_count++] = | 644 | ICOM_PORT->xmit_buf[data_count++] = |
| 645 | port->info->xmit.buf[temp_tail]; | 645 | port->state->xmit.buf[temp_tail]; |
| 646 | 646 | ||
| 647 | temp_tail++; | 647 | temp_tail++; |
| 648 | temp_tail &= (UART_XMIT_SIZE - 1); | 648 | temp_tail &= (UART_XMIT_SIZE - 1); |
| @@ -694,8 +694,8 @@ static inline void check_modem_status(struct icom_port *icom_port) | |||
| 694 | uart_handle_cts_change(&icom_port->uart_port, | 694 | uart_handle_cts_change(&icom_port->uart_port, |
| 695 | delta_status & ICOM_CTS); | 695 | delta_status & ICOM_CTS); |
| 696 | 696 | ||
| 697 | wake_up_interruptible(&icom_port->uart_port.info-> | 697 | wake_up_interruptible(&icom_port->uart_port.state-> |
| 698 | delta_msr_wait); | 698 | port.delta_msr_wait); |
| 699 | old_status = status; | 699 | old_status = status; |
| 700 | } | 700 | } |
| 701 | spin_unlock(&icom_port->uart_port.lock); | 701 | spin_unlock(&icom_port->uart_port.lock); |
| @@ -718,10 +718,10 @@ static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port) | |||
| 718 | icom_port->uart_port.icount.tx += count; | 718 | icom_port->uart_port.icount.tx += count; |
| 719 | 719 | ||
| 720 | for (i=0; i<count && | 720 | for (i=0; i<count && |
| 721 | !uart_circ_empty(&icom_port->uart_port.info->xmit); i++) { | 721 | !uart_circ_empty(&icom_port->uart_port.state->xmit); i++) { |
| 722 | 722 | ||
| 723 | icom_port->uart_port.info->xmit.tail++; | 723 | icom_port->uart_port.state->xmit.tail++; |
| 724 | icom_port->uart_port.info->xmit.tail &= | 724 | icom_port->uart_port.state->xmit.tail &= |
| 725 | (UART_XMIT_SIZE - 1); | 725 | (UART_XMIT_SIZE - 1); |
| 726 | } | 726 | } |
| 727 | 727 | ||
| @@ -735,7 +735,7 @@ static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port) | |||
| 735 | static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port) | 735 | static void recv_interrupt(u16 port_int_reg, struct icom_port *icom_port) |
| 736 | { | 736 | { |
| 737 | short int count, rcv_buff; | 737 | short int count, rcv_buff; |
| 738 | struct tty_struct *tty = icom_port->uart_port.info->port.tty; | 738 | struct tty_struct *tty = icom_port->uart_port.state->port.tty; |
| 739 | unsigned short int status; | 739 | unsigned short int status; |
| 740 | struct uart_icount *icount; | 740 | struct uart_icount *icount; |
| 741 | unsigned long offset; | 741 | unsigned long offset; |
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 7485afd0df4c..18130f11238e 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
| @@ -224,7 +224,7 @@ static void imx_mctrl_check(struct imx_port *sport) | |||
| 224 | if (changed & TIOCM_CTS) | 224 | if (changed & TIOCM_CTS) |
| 225 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); | 225 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); |
| 226 | 226 | ||
| 227 | wake_up_interruptible(&sport->port.info->delta_msr_wait); | 227 | wake_up_interruptible(&sport->port.state->port.delta_msr_wait); |
| 228 | } | 228 | } |
| 229 | 229 | ||
| 230 | /* | 230 | /* |
| @@ -236,7 +236,7 @@ static void imx_timeout(unsigned long data) | |||
| 236 | struct imx_port *sport = (struct imx_port *)data; | 236 | struct imx_port *sport = (struct imx_port *)data; |
| 237 | unsigned long flags; | 237 | unsigned long flags; |
| 238 | 238 | ||
| 239 | if (sport->port.info) { | 239 | if (sport->port.state) { |
| 240 | spin_lock_irqsave(&sport->port.lock, flags); | 240 | spin_lock_irqsave(&sport->port.lock, flags); |
| 241 | imx_mctrl_check(sport); | 241 | imx_mctrl_check(sport); |
| 242 | spin_unlock_irqrestore(&sport->port.lock, flags); | 242 | spin_unlock_irqrestore(&sport->port.lock, flags); |
| @@ -323,7 +323,7 @@ static void imx_enable_ms(struct uart_port *port) | |||
| 323 | 323 | ||
| 324 | static inline void imx_transmit_buffer(struct imx_port *sport) | 324 | static inline void imx_transmit_buffer(struct imx_port *sport) |
| 325 | { | 325 | { |
| 326 | struct circ_buf *xmit = &sport->port.info->xmit; | 326 | struct circ_buf *xmit = &sport->port.state->xmit; |
| 327 | 327 | ||
| 328 | while (!(readl(sport->port.membase + UTS) & UTS_TXFULL)) { | 328 | while (!(readl(sport->port.membase + UTS) & UTS_TXFULL)) { |
| 329 | /* send xmit->buf[xmit->tail] | 329 | /* send xmit->buf[xmit->tail] |
| @@ -388,7 +388,7 @@ static irqreturn_t imx_rtsint(int irq, void *dev_id) | |||
| 388 | 388 | ||
| 389 | writel(USR1_RTSD, sport->port.membase + USR1); | 389 | writel(USR1_RTSD, sport->port.membase + USR1); |
| 390 | uart_handle_cts_change(&sport->port, !!val); | 390 | uart_handle_cts_change(&sport->port, !!val); |
| 391 | wake_up_interruptible(&sport->port.info->delta_msr_wait); | 391 | wake_up_interruptible(&sport->port.state->port.delta_msr_wait); |
| 392 | 392 | ||
| 393 | spin_unlock_irqrestore(&sport->port.lock, flags); | 393 | spin_unlock_irqrestore(&sport->port.lock, flags); |
| 394 | return IRQ_HANDLED; | 394 | return IRQ_HANDLED; |
| @@ -397,7 +397,7 @@ static irqreturn_t imx_rtsint(int irq, void *dev_id) | |||
| 397 | static irqreturn_t imx_txint(int irq, void *dev_id) | 397 | static irqreturn_t imx_txint(int irq, void *dev_id) |
| 398 | { | 398 | { |
| 399 | struct imx_port *sport = dev_id; | 399 | struct imx_port *sport = dev_id; |
| 400 | struct circ_buf *xmit = &sport->port.info->xmit; | 400 | struct circ_buf *xmit = &sport->port.state->xmit; |
| 401 | unsigned long flags; | 401 | unsigned long flags; |
| 402 | 402 | ||
| 403 | spin_lock_irqsave(&sport->port.lock,flags); | 403 | spin_lock_irqsave(&sport->port.lock,flags); |
| @@ -427,7 +427,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id) | |||
| 427 | { | 427 | { |
| 428 | struct imx_port *sport = dev_id; | 428 | struct imx_port *sport = dev_id; |
| 429 | unsigned int rx,flg,ignored = 0; | 429 | unsigned int rx,flg,ignored = 0; |
| 430 | struct tty_struct *tty = sport->port.info->port.tty; | 430 | struct tty_struct *tty = sport->port.state->port.tty; |
| 431 | unsigned long flags, temp; | 431 | unsigned long flags, temp; |
| 432 | 432 | ||
| 433 | spin_lock_irqsave(&sport->port.lock,flags); | 433 | spin_lock_irqsave(&sport->port.lock,flags); |
| @@ -900,11 +900,11 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 900 | rational_best_approximation(16 * div * baud, sport->port.uartclk, | 900 | rational_best_approximation(16 * div * baud, sport->port.uartclk, |
| 901 | 1 << 16, 1 << 16, &num, &denom); | 901 | 1 << 16, 1 << 16, &num, &denom); |
| 902 | 902 | ||
| 903 | if (port->info && port->info->port.tty) { | 903 | if (port->state && port->state->port.tty) { |
| 904 | tdiv64 = sport->port.uartclk; | 904 | tdiv64 = sport->port.uartclk; |
| 905 | tdiv64 *= num; | 905 | tdiv64 *= num; |
| 906 | do_div(tdiv64, denom * 16 * div); | 906 | do_div(tdiv64, denom * 16 * div); |
| 907 | tty_encode_baud_rate(sport->port.info->port.tty, | 907 | tty_encode_baud_rate(sport->port.state->port.tty, |
| 908 | (speed_t)tdiv64, (speed_t)tdiv64); | 908 | (speed_t)tdiv64, (speed_t)tdiv64); |
| 909 | } | 909 | } |
| 910 | 910 | ||
diff --git a/drivers/serial/ioc3_serial.c b/drivers/serial/ioc3_serial.c index ae3699d77dd0..d8983dd5c4b2 100644 --- a/drivers/serial/ioc3_serial.c +++ b/drivers/serial/ioc3_serial.c | |||
| @@ -897,25 +897,25 @@ static void transmit_chars(struct uart_port *the_port) | |||
| 897 | char *start; | 897 | char *start; |
| 898 | struct tty_struct *tty; | 898 | struct tty_struct *tty; |
| 899 | struct ioc3_port *port = get_ioc3_port(the_port); | 899 | struct ioc3_port *port = get_ioc3_port(the_port); |
| 900 | struct uart_info *info; | 900 | struct uart_state *state; |
| 901 | 901 | ||
| 902 | if (!the_port) | 902 | if (!the_port) |
| 903 | return; | 903 | return; |
| 904 | if (!port) | 904 | if (!port) |
| 905 | return; | 905 | return; |
| 906 | 906 | ||
| 907 | info = the_port->info; | 907 | state = the_port->state; |
| 908 | tty = info->port.tty; | 908 | tty = state->port.tty; |
| 909 | 909 | ||
| 910 | if (uart_circ_empty(&info->xmit) || uart_tx_stopped(the_port)) { | 910 | if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) { |
| 911 | /* Nothing to do or hw stopped */ | 911 | /* Nothing to do or hw stopped */ |
| 912 | set_notification(port, N_ALL_OUTPUT, 0); | 912 | set_notification(port, N_ALL_OUTPUT, 0); |
| 913 | return; | 913 | return; |
| 914 | } | 914 | } |
| 915 | 915 | ||
| 916 | head = info->xmit.head; | 916 | head = state->xmit.head; |
| 917 | tail = info->xmit.tail; | 917 | tail = state->xmit.tail; |
| 918 | start = (char *)&info->xmit.buf[tail]; | 918 | start = (char *)&state->xmit.buf[tail]; |
| 919 | 919 | ||
| 920 | /* write out all the data or until the end of the buffer */ | 920 | /* write out all the data or until the end of the buffer */ |
| 921 | xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail); | 921 | xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail); |
| @@ -928,14 +928,14 @@ static void transmit_chars(struct uart_port *the_port) | |||
| 928 | /* advance the pointers */ | 928 | /* advance the pointers */ |
| 929 | tail += result; | 929 | tail += result; |
| 930 | tail &= UART_XMIT_SIZE - 1; | 930 | tail &= UART_XMIT_SIZE - 1; |
| 931 | info->xmit.tail = tail; | 931 | state->xmit.tail = tail; |
| 932 | start = (char *)&info->xmit.buf[tail]; | 932 | start = (char *)&state->xmit.buf[tail]; |
| 933 | } | 933 | } |
| 934 | } | 934 | } |
| 935 | if (uart_circ_chars_pending(&info->xmit) < WAKEUP_CHARS) | 935 | if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS) |
| 936 | uart_write_wakeup(the_port); | 936 | uart_write_wakeup(the_port); |
| 937 | 937 | ||
| 938 | if (uart_circ_empty(&info->xmit)) { | 938 | if (uart_circ_empty(&state->xmit)) { |
| 939 | set_notification(port, N_OUTPUT_LOWAT, 0); | 939 | set_notification(port, N_OUTPUT_LOWAT, 0); |
| 940 | } else { | 940 | } else { |
| 941 | set_notification(port, N_OUTPUT_LOWAT, 1); | 941 | set_notification(port, N_OUTPUT_LOWAT, 1); |
| @@ -956,7 +956,7 @@ ioc3_change_speed(struct uart_port *the_port, | |||
| 956 | unsigned int cflag; | 956 | unsigned int cflag; |
| 957 | int baud; | 957 | int baud; |
| 958 | int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; | 958 | int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; |
| 959 | struct uart_info *info = the_port->info; | 959 | struct uart_state *state = the_port->state; |
| 960 | 960 | ||
| 961 | cflag = new_termios->c_cflag; | 961 | cflag = new_termios->c_cflag; |
| 962 | 962 | ||
| @@ -997,14 +997,14 @@ ioc3_change_speed(struct uart_port *the_port, | |||
| 997 | 997 | ||
| 998 | the_port->ignore_status_mask = N_ALL_INPUT; | 998 | the_port->ignore_status_mask = N_ALL_INPUT; |
| 999 | 999 | ||
| 1000 | info->port.tty->low_latency = 1; | 1000 | state->port.tty->low_latency = 1; |
| 1001 | 1001 | ||
| 1002 | if (I_IGNPAR(info->port.tty)) | 1002 | if (I_IGNPAR(state->port.tty)) |
| 1003 | the_port->ignore_status_mask &= ~(N_PARITY_ERROR | 1003 | the_port->ignore_status_mask &= ~(N_PARITY_ERROR |
| 1004 | | N_FRAMING_ERROR); | 1004 | | N_FRAMING_ERROR); |
| 1005 | if (I_IGNBRK(info->port.tty)) { | 1005 | if (I_IGNBRK(state->port.tty)) { |
| 1006 | the_port->ignore_status_mask &= ~N_BREAK; | 1006 | the_port->ignore_status_mask &= ~N_BREAK; |
| 1007 | if (I_IGNPAR(info->port.tty)) | 1007 | if (I_IGNPAR(state->port.tty)) |
| 1008 | the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; | 1008 | the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; |
| 1009 | } | 1009 | } |
| 1010 | if (!(cflag & CREAD)) { | 1010 | if (!(cflag & CREAD)) { |
| @@ -1286,8 +1286,8 @@ static inline int do_read(struct uart_port *the_port, char *buf, int len) | |||
| 1286 | uart_handle_dcd_change | 1286 | uart_handle_dcd_change |
| 1287 | (port->ip_port, 0); | 1287 | (port->ip_port, 0); |
| 1288 | wake_up_interruptible | 1288 | wake_up_interruptible |
| 1289 | (&the_port->info-> | 1289 | (&the_port->state-> |
| 1290 | delta_msr_wait); | 1290 | port.delta_msr_wait); |
| 1291 | } | 1291 | } |
| 1292 | 1292 | ||
| 1293 | /* If we had any data to return, we | 1293 | /* If we had any data to return, we |
| @@ -1392,21 +1392,21 @@ static int receive_chars(struct uart_port *the_port) | |||
| 1392 | struct tty_struct *tty; | 1392 | struct tty_struct *tty; |
| 1393 | unsigned char ch[MAX_CHARS]; | 1393 | unsigned char ch[MAX_CHARS]; |
| 1394 | int read_count = 0, read_room, flip = 0; | 1394 | int read_count = 0, read_room, flip = 0; |
| 1395 | struct uart_info *info = the_port->info; | 1395 | struct uart_state *state = the_port->state; |
| 1396 | struct ioc3_port *port = get_ioc3_port(the_port); | 1396 | struct ioc3_port *port = get_ioc3_port(the_port); |
| 1397 | unsigned long pflags; | 1397 | unsigned long pflags; |
| 1398 | 1398 | ||
| 1399 | /* Make sure all the pointers are "good" ones */ | 1399 | /* Make sure all the pointers are "good" ones */ |
| 1400 | if (!info) | 1400 | if (!state) |
| 1401 | return 0; | 1401 | return 0; |
| 1402 | if (!info->port.tty) | 1402 | if (!state->port.tty) |
| 1403 | return 0; | 1403 | return 0; |
| 1404 | 1404 | ||
| 1405 | if (!(port->ip_flags & INPUT_ENABLE)) | 1405 | if (!(port->ip_flags & INPUT_ENABLE)) |
| 1406 | return 0; | 1406 | return 0; |
| 1407 | 1407 | ||
| 1408 | spin_lock_irqsave(&the_port->lock, pflags); | 1408 | spin_lock_irqsave(&the_port->lock, pflags); |
| 1409 | tty = info->port.tty; | 1409 | tty = state->port.tty; |
| 1410 | 1410 | ||
| 1411 | read_count = do_read(the_port, ch, MAX_CHARS); | 1411 | read_count = do_read(the_port, ch, MAX_CHARS); |
| 1412 | if (read_count > 0) { | 1412 | if (read_count > 0) { |
| @@ -1491,7 +1491,7 @@ ioc3uart_intr_one(struct ioc3_submodule *is, | |||
| 1491 | uart_handle_dcd_change(the_port, | 1491 | uart_handle_dcd_change(the_port, |
| 1492 | shadow & SHADOW_DCD); | 1492 | shadow & SHADOW_DCD); |
| 1493 | wake_up_interruptible | 1493 | wake_up_interruptible |
| 1494 | (&the_port->info->delta_msr_wait); | 1494 | (&the_port->state->port.delta_msr_wait); |
| 1495 | } else if ((port->ip_notify & N_DDCD) | 1495 | } else if ((port->ip_notify & N_DDCD) |
| 1496 | && !(shadow & SHADOW_DCD)) { | 1496 | && !(shadow & SHADOW_DCD)) { |
| 1497 | /* Flag delta DCD/no DCD */ | 1497 | /* Flag delta DCD/no DCD */ |
| @@ -1511,7 +1511,7 @@ ioc3uart_intr_one(struct ioc3_submodule *is, | |||
| 1511 | uart_handle_cts_change(the_port, shadow | 1511 | uart_handle_cts_change(the_port, shadow |
| 1512 | & SHADOW_CTS); | 1512 | & SHADOW_CTS); |
| 1513 | wake_up_interruptible | 1513 | wake_up_interruptible |
| 1514 | (&the_port->info->delta_msr_wait); | 1514 | (&the_port->state->port.delta_msr_wait); |
| 1515 | } | 1515 | } |
| 1516 | } | 1516 | } |
| 1517 | 1517 | ||
| @@ -1721,14 +1721,14 @@ static void ic3_shutdown(struct uart_port *the_port) | |||
| 1721 | { | 1721 | { |
| 1722 | unsigned long port_flags; | 1722 | unsigned long port_flags; |
| 1723 | struct ioc3_port *port; | 1723 | struct ioc3_port *port; |
| 1724 | struct uart_info *info; | 1724 | struct uart_state *state; |
| 1725 | 1725 | ||
| 1726 | port = get_ioc3_port(the_port); | 1726 | port = get_ioc3_port(the_port); |
| 1727 | if (!port) | 1727 | if (!port) |
| 1728 | return; | 1728 | return; |
| 1729 | 1729 | ||
| 1730 | info = the_port->info; | 1730 | state = the_port->state; |
| 1731 | wake_up_interruptible(&info->delta_msr_wait); | 1731 | wake_up_interruptible(&state->port.delta_msr_wait); |
| 1732 | 1732 | ||
| 1733 | spin_lock_irqsave(&the_port->lock, port_flags); | 1733 | spin_lock_irqsave(&the_port->lock, port_flags); |
| 1734 | set_notification(port, N_ALL, 0); | 1734 | set_notification(port, N_ALL, 0); |
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c index 6bab63cd5b29..2e02c3026d24 100644 --- a/drivers/serial/ioc4_serial.c +++ b/drivers/serial/ioc4_serial.c | |||
| @@ -930,7 +930,7 @@ static void handle_dma_error_intr(void *arg, uint32_t other_ir) | |||
| 930 | 930 | ||
| 931 | if (readl(&port->ip_mem->pci_err_addr_l.raw) & IOC4_PCI_ERR_ADDR_VLD) { | 931 | if (readl(&port->ip_mem->pci_err_addr_l.raw) & IOC4_PCI_ERR_ADDR_VLD) { |
| 932 | printk(KERN_ERR | 932 | printk(KERN_ERR |
| 933 | "PCI error address is 0x%lx, " | 933 | "PCI error address is 0x%llx, " |
| 934 | "master is serial port %c %s\n", | 934 | "master is serial port %c %s\n", |
| 935 | (((uint64_t)readl(&port->ip_mem->pci_err_addr_h) | 935 | (((uint64_t)readl(&port->ip_mem->pci_err_addr_h) |
| 936 | << 32) | 936 | << 32) |
| @@ -1627,25 +1627,25 @@ static void transmit_chars(struct uart_port *the_port) | |||
| 1627 | char *start; | 1627 | char *start; |
| 1628 | struct tty_struct *tty; | 1628 | struct tty_struct *tty; |
| 1629 | struct ioc4_port *port = get_ioc4_port(the_port, 0); | 1629 | struct ioc4_port *port = get_ioc4_port(the_port, 0); |
| 1630 | struct uart_info *info; | 1630 | struct uart_state *state; |
| 1631 | 1631 | ||
| 1632 | if (!the_port) | 1632 | if (!the_port) |
| 1633 | return; | 1633 | return; |
| 1634 | if (!port) | 1634 | if (!port) |
| 1635 | return; | 1635 | return; |
| 1636 | 1636 | ||
| 1637 | info = the_port->info; | 1637 | state = the_port->state; |
| 1638 | tty = info->port.tty; | 1638 | tty = state->port.tty; |
| 1639 | 1639 | ||
| 1640 | if (uart_circ_empty(&info->xmit) || uart_tx_stopped(the_port)) { | 1640 | if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) { |
| 1641 | /* Nothing to do or hw stopped */ | 1641 | /* Nothing to do or hw stopped */ |
| 1642 | set_notification(port, N_ALL_OUTPUT, 0); | 1642 | set_notification(port, N_ALL_OUTPUT, 0); |
| 1643 | return; | 1643 | return; |
| 1644 | } | 1644 | } |
| 1645 | 1645 | ||
| 1646 | head = info->xmit.head; | 1646 | head = state->xmit.head; |
| 1647 | tail = info->xmit.tail; | 1647 | tail = state->xmit.tail; |
| 1648 | start = (char *)&info->xmit.buf[tail]; | 1648 | start = (char *)&state->xmit.buf[tail]; |
| 1649 | 1649 | ||
| 1650 | /* write out all the data or until the end of the buffer */ | 1650 | /* write out all the data or until the end of the buffer */ |
| 1651 | xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail); | 1651 | xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail); |
| @@ -1658,14 +1658,14 @@ static void transmit_chars(struct uart_port *the_port) | |||
| 1658 | /* advance the pointers */ | 1658 | /* advance the pointers */ |
| 1659 | tail += result; | 1659 | tail += result; |
| 1660 | tail &= UART_XMIT_SIZE - 1; | 1660 | tail &= UART_XMIT_SIZE - 1; |
| 1661 | info->xmit.tail = tail; | 1661 | state->xmit.tail = tail; |
| 1662 | start = (char *)&info->xmit.buf[tail]; | 1662 | start = (char *)&state->xmit.buf[tail]; |
| 1663 | } | 1663 | } |
| 1664 | } | 1664 | } |
| 1665 | if (uart_circ_chars_pending(&info->xmit) < WAKEUP_CHARS) | 1665 | if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS) |
| 1666 | uart_write_wakeup(the_port); | 1666 | uart_write_wakeup(the_port); |
| 1667 | 1667 | ||
| 1668 | if (uart_circ_empty(&info->xmit)) { | 1668 | if (uart_circ_empty(&state->xmit)) { |
| 1669 | set_notification(port, N_OUTPUT_LOWAT, 0); | 1669 | set_notification(port, N_OUTPUT_LOWAT, 0); |
| 1670 | } else { | 1670 | } else { |
| 1671 | set_notification(port, N_OUTPUT_LOWAT, 1); | 1671 | set_notification(port, N_OUTPUT_LOWAT, 1); |
| @@ -1686,7 +1686,7 @@ ioc4_change_speed(struct uart_port *the_port, | |||
| 1686 | int baud, bits; | 1686 | int baud, bits; |
| 1687 | unsigned cflag; | 1687 | unsigned cflag; |
| 1688 | int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; | 1688 | int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; |
| 1689 | struct uart_info *info = the_port->info; | 1689 | struct uart_state *state = the_port->state; |
| 1690 | 1690 | ||
| 1691 | cflag = new_termios->c_cflag; | 1691 | cflag = new_termios->c_cflag; |
| 1692 | 1692 | ||
| @@ -1738,14 +1738,14 @@ ioc4_change_speed(struct uart_port *the_port, | |||
| 1738 | 1738 | ||
| 1739 | the_port->ignore_status_mask = N_ALL_INPUT; | 1739 | the_port->ignore_status_mask = N_ALL_INPUT; |
| 1740 | 1740 | ||
| 1741 | info->port.tty->low_latency = 1; | 1741 | state->port.tty->low_latency = 1; |
| 1742 | 1742 | ||
| 1743 | if (I_IGNPAR(info->port.tty)) | 1743 | if (I_IGNPAR(state->port.tty)) |
| 1744 | the_port->ignore_status_mask &= ~(N_PARITY_ERROR | 1744 | the_port->ignore_status_mask &= ~(N_PARITY_ERROR |
| 1745 | | N_FRAMING_ERROR); | 1745 | | N_FRAMING_ERROR); |
| 1746 | if (I_IGNBRK(info->port.tty)) { | 1746 | if (I_IGNBRK(state->port.tty)) { |
| 1747 | the_port->ignore_status_mask &= ~N_BREAK; | 1747 | the_port->ignore_status_mask &= ~N_BREAK; |
| 1748 | if (I_IGNPAR(info->port.tty)) | 1748 | if (I_IGNPAR(state->port.tty)) |
| 1749 | the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; | 1749 | the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; |
| 1750 | } | 1750 | } |
| 1751 | if (!(cflag & CREAD)) { | 1751 | if (!(cflag & CREAD)) { |
| @@ -1784,7 +1784,7 @@ ioc4_change_speed(struct uart_port *the_port, | |||
| 1784 | static inline int ic4_startup_local(struct uart_port *the_port) | 1784 | static inline int ic4_startup_local(struct uart_port *the_port) |
| 1785 | { | 1785 | { |
| 1786 | struct ioc4_port *port; | 1786 | struct ioc4_port *port; |
| 1787 | struct uart_info *info; | 1787 | struct uart_state *state; |
| 1788 | 1788 | ||
| 1789 | if (!the_port) | 1789 | if (!the_port) |
| 1790 | return -1; | 1790 | return -1; |
| @@ -1793,7 +1793,7 @@ static inline int ic4_startup_local(struct uart_port *the_port) | |||
| 1793 | if (!port) | 1793 | if (!port) |
| 1794 | return -1; | 1794 | return -1; |
| 1795 | 1795 | ||
| 1796 | info = the_port->info; | 1796 | state = the_port->state; |
| 1797 | 1797 | ||
| 1798 | local_open(port); | 1798 | local_open(port); |
| 1799 | 1799 | ||
| @@ -1801,7 +1801,7 @@ static inline int ic4_startup_local(struct uart_port *the_port) | |||
| 1801 | ioc4_set_proto(port, the_port->mapbase); | 1801 | ioc4_set_proto(port, the_port->mapbase); |
| 1802 | 1802 | ||
| 1803 | /* set the speed of the serial port */ | 1803 | /* set the speed of the serial port */ |
| 1804 | ioc4_change_speed(the_port, info->port.tty->termios, | 1804 | ioc4_change_speed(the_port, state->port.tty->termios, |
| 1805 | (struct ktermios *)0); | 1805 | (struct ktermios *)0); |
| 1806 | 1806 | ||
| 1807 | return 0; | 1807 | return 0; |
| @@ -1882,7 +1882,7 @@ static void handle_intr(void *arg, uint32_t sio_ir) | |||
| 1882 | the_port = port->ip_port; | 1882 | the_port = port->ip_port; |
| 1883 | the_port->icount.dcd = 1; | 1883 | the_port->icount.dcd = 1; |
| 1884 | wake_up_interruptible | 1884 | wake_up_interruptible |
| 1885 | (&the_port-> info->delta_msr_wait); | 1885 | (&the_port->state->port.delta_msr_wait); |
| 1886 | } else if ((port->ip_notify & N_DDCD) | 1886 | } else if ((port->ip_notify & N_DDCD) |
| 1887 | && !(shadow & IOC4_SHADOW_DCD)) { | 1887 | && !(shadow & IOC4_SHADOW_DCD)) { |
| 1888 | /* Flag delta DCD/no DCD */ | 1888 | /* Flag delta DCD/no DCD */ |
| @@ -1904,7 +1904,7 @@ static void handle_intr(void *arg, uint32_t sio_ir) | |||
| 1904 | the_port->icount.cts = | 1904 | the_port->icount.cts = |
| 1905 | (shadow & IOC4_SHADOW_CTS) ? 1 : 0; | 1905 | (shadow & IOC4_SHADOW_CTS) ? 1 : 0; |
| 1906 | wake_up_interruptible | 1906 | wake_up_interruptible |
| 1907 | (&the_port->info->delta_msr_wait); | 1907 | (&the_port->state->port.delta_msr_wait); |
| 1908 | } | 1908 | } |
| 1909 | } | 1909 | } |
| 1910 | 1910 | ||
| @@ -2236,8 +2236,8 @@ static inline int do_read(struct uart_port *the_port, unsigned char *buf, | |||
| 2236 | && port->ip_port) { | 2236 | && port->ip_port) { |
| 2237 | the_port->icount.dcd = 0; | 2237 | the_port->icount.dcd = 0; |
| 2238 | wake_up_interruptible | 2238 | wake_up_interruptible |
| 2239 | (&the_port->info-> | 2239 | (&the_port->state-> |
| 2240 | delta_msr_wait); | 2240 | port.delta_msr_wait); |
| 2241 | } | 2241 | } |
| 2242 | 2242 | ||
| 2243 | /* If we had any data to return, we | 2243 | /* If we had any data to return, we |
| @@ -2341,17 +2341,17 @@ static void receive_chars(struct uart_port *the_port) | |||
| 2341 | unsigned char ch[IOC4_MAX_CHARS]; | 2341 | unsigned char ch[IOC4_MAX_CHARS]; |
| 2342 | int read_count, request_count = IOC4_MAX_CHARS; | 2342 | int read_count, request_count = IOC4_MAX_CHARS; |
| 2343 | struct uart_icount *icount; | 2343 | struct uart_icount *icount; |
| 2344 | struct uart_info *info = the_port->info; | 2344 | struct uart_state *state = the_port->state; |
| 2345 | unsigned long pflags; | 2345 | unsigned long pflags; |
| 2346 | 2346 | ||
| 2347 | /* Make sure all the pointers are "good" ones */ | 2347 | /* Make sure all the pointers are "good" ones */ |
| 2348 | if (!info) | 2348 | if (!state) |
| 2349 | return; | 2349 | return; |
| 2350 | if (!info->port.tty) | 2350 | if (!state->port.tty) |
| 2351 | return; | 2351 | return; |
| 2352 | 2352 | ||
| 2353 | spin_lock_irqsave(&the_port->lock, pflags); | 2353 | spin_lock_irqsave(&the_port->lock, pflags); |
| 2354 | tty = info->port.tty; | 2354 | tty = state->port.tty; |
| 2355 | 2355 | ||
| 2356 | request_count = tty_buffer_request_room(tty, IOC4_MAX_CHARS); | 2356 | request_count = tty_buffer_request_room(tty, IOC4_MAX_CHARS); |
| 2357 | 2357 | ||
| @@ -2430,19 +2430,19 @@ static void ic4_shutdown(struct uart_port *the_port) | |||
| 2430 | { | 2430 | { |
| 2431 | unsigned long port_flags; | 2431 | unsigned long port_flags; |
| 2432 | struct ioc4_port *port; | 2432 | struct ioc4_port *port; |
| 2433 | struct uart_info *info; | 2433 | struct uart_state *state; |
| 2434 | 2434 | ||
| 2435 | port = get_ioc4_port(the_port, 0); | 2435 | port = get_ioc4_port(the_port, 0); |
| 2436 | if (!port) | 2436 | if (!port) |
| 2437 | return; | 2437 | return; |
| 2438 | 2438 | ||
| 2439 | info = the_port->info; | 2439 | state = the_port->state; |
| 2440 | port->ip_port = NULL; | 2440 | port->ip_port = NULL; |
| 2441 | 2441 | ||
| 2442 | wake_up_interruptible(&info->delta_msr_wait); | 2442 | wake_up_interruptible(&state->port.delta_msr_wait); |
| 2443 | 2443 | ||
| 2444 | if (info->port.tty) | 2444 | if (state->port.tty) |
| 2445 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | 2445 | set_bit(TTY_IO_ERROR, &state->port.tty->flags); |
| 2446 | 2446 | ||
| 2447 | spin_lock_irqsave(&the_port->lock, port_flags); | 2447 | spin_lock_irqsave(&the_port->lock, port_flags); |
| 2448 | set_notification(port, N_ALL, 0); | 2448 | set_notification(port, N_ALL, 0); |
| @@ -2538,7 +2538,7 @@ static int ic4_startup(struct uart_port *the_port) | |||
| 2538 | int retval; | 2538 | int retval; |
| 2539 | struct ioc4_port *port; | 2539 | struct ioc4_port *port; |
| 2540 | struct ioc4_control *control; | 2540 | struct ioc4_control *control; |
| 2541 | struct uart_info *info; | 2541 | struct uart_state *state; |
| 2542 | unsigned long port_flags; | 2542 | unsigned long port_flags; |
| 2543 | 2543 | ||
| 2544 | if (!the_port) | 2544 | if (!the_port) |
| @@ -2546,7 +2546,7 @@ static int ic4_startup(struct uart_port *the_port) | |||
| 2546 | port = get_ioc4_port(the_port, 1); | 2546 | port = get_ioc4_port(the_port, 1); |
| 2547 | if (!port) | 2547 | if (!port) |
| 2548 | return -ENODEV; | 2548 | return -ENODEV; |
| 2549 | info = the_port->info; | 2549 | state = the_port->state; |
| 2550 | 2550 | ||
| 2551 | control = port->ip_control; | 2551 | control = port->ip_control; |
| 2552 | if (!control) { | 2552 | if (!control) { |
diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c index 0d9acbd0bb70..ebff4a1d4bcc 100644 --- a/drivers/serial/ip22zilog.c +++ b/drivers/serial/ip22zilog.c | |||
| @@ -256,9 +256,9 @@ static struct tty_struct *ip22zilog_receive_chars(struct uart_ip22zilog_port *up | |||
| 256 | unsigned int r1; | 256 | unsigned int r1; |
| 257 | 257 | ||
| 258 | tty = NULL; | 258 | tty = NULL; |
| 259 | if (up->port.info != NULL && | 259 | if (up->port.state != NULL && |
| 260 | up->port.info->port.tty != NULL) | 260 | up->port.state->port.tty != NULL) |
| 261 | tty = up->port.info->port.tty; | 261 | tty = up->port.state->port.tty; |
| 262 | 262 | ||
| 263 | for (;;) { | 263 | for (;;) { |
| 264 | ch = readb(&channel->control); | 264 | ch = readb(&channel->control); |
| @@ -354,7 +354,7 @@ static void ip22zilog_status_handle(struct uart_ip22zilog_port *up, | |||
| 354 | uart_handle_cts_change(&up->port, | 354 | uart_handle_cts_change(&up->port, |
| 355 | (status & CTS)); | 355 | (status & CTS)); |
| 356 | 356 | ||
| 357 | wake_up_interruptible(&up->port.info->delta_msr_wait); | 357 | wake_up_interruptible(&up->port.state->port.delta_msr_wait); |
| 358 | } | 358 | } |
| 359 | 359 | ||
| 360 | up->prev_status = status; | 360 | up->prev_status = status; |
| @@ -404,9 +404,9 @@ static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up, | |||
| 404 | return; | 404 | return; |
| 405 | } | 405 | } |
| 406 | 406 | ||
| 407 | if (up->port.info == NULL) | 407 | if (up->port.state == NULL) |
| 408 | goto ack_tx_int; | 408 | goto ack_tx_int; |
| 409 | xmit = &up->port.info->xmit; | 409 | xmit = &up->port.state->xmit; |
| 410 | if (uart_circ_empty(xmit)) | 410 | if (uart_circ_empty(xmit)) |
| 411 | goto ack_tx_int; | 411 | goto ack_tx_int; |
| 412 | if (uart_tx_stopped(&up->port)) | 412 | if (uart_tx_stopped(&up->port)) |
| @@ -607,7 +607,7 @@ static void ip22zilog_start_tx(struct uart_port *port) | |||
| 607 | port->icount.tx++; | 607 | port->icount.tx++; |
| 608 | port->x_char = 0; | 608 | port->x_char = 0; |
| 609 | } else { | 609 | } else { |
| 610 | struct circ_buf *xmit = &port->info->xmit; | 610 | struct circ_buf *xmit = &port->state->xmit; |
| 611 | 611 | ||
| 612 | writeb(xmit->buf[xmit->tail], &channel->data); | 612 | writeb(xmit->buf[xmit->tail], &channel->data); |
| 613 | ZSDELAY(); | 613 | ZSDELAY(); |
diff --git a/drivers/serial/jsm/jsm_neo.c b/drivers/serial/jsm/jsm_neo.c index 9dadaa11d266..b4b124e4828f 100644 --- a/drivers/serial/jsm/jsm_neo.c +++ b/drivers/serial/jsm/jsm_neo.c | |||
| @@ -989,7 +989,7 @@ static void neo_param(struct jsm_channel *ch) | |||
| 989 | { 50, B50 }, | 989 | { 50, B50 }, |
| 990 | }; | 990 | }; |
| 991 | 991 | ||
| 992 | cflag = C_BAUD(ch->uart_port.info->port.tty); | 992 | cflag = C_BAUD(ch->uart_port.state->port.tty); |
| 993 | baud = 9600; | 993 | baud = 9600; |
| 994 | for (i = 0; i < ARRAY_SIZE(baud_rates); i++) { | 994 | for (i = 0; i < ARRAY_SIZE(baud_rates); i++) { |
| 995 | if (baud_rates[i].cflag == cflag) { | 995 | if (baud_rates[i].cflag == cflag) { |
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c index 00f4577d2f7f..7439c0373620 100644 --- a/drivers/serial/jsm/jsm_tty.c +++ b/drivers/serial/jsm/jsm_tty.c | |||
| @@ -147,7 +147,7 @@ static void jsm_tty_send_xchar(struct uart_port *port, char ch) | |||
| 147 | struct ktermios *termios; | 147 | struct ktermios *termios; |
| 148 | 148 | ||
| 149 | spin_lock_irqsave(&port->lock, lock_flags); | 149 | spin_lock_irqsave(&port->lock, lock_flags); |
| 150 | termios = port->info->port.tty->termios; | 150 | termios = port->state->port.tty->termios; |
| 151 | if (ch == termios->c_cc[VSTART]) | 151 | if (ch == termios->c_cc[VSTART]) |
| 152 | channel->ch_bd->bd_ops->send_start_character(channel); | 152 | channel->ch_bd->bd_ops->send_start_character(channel); |
| 153 | 153 | ||
| @@ -245,7 +245,7 @@ static int jsm_tty_open(struct uart_port *port) | |||
| 245 | channel->ch_cached_lsr = 0; | 245 | channel->ch_cached_lsr = 0; |
| 246 | channel->ch_stops_sent = 0; | 246 | channel->ch_stops_sent = 0; |
| 247 | 247 | ||
| 248 | termios = port->info->port.tty->termios; | 248 | termios = port->state->port.tty->termios; |
| 249 | channel->ch_c_cflag = termios->c_cflag; | 249 | channel->ch_c_cflag = termios->c_cflag; |
| 250 | channel->ch_c_iflag = termios->c_iflag; | 250 | channel->ch_c_iflag = termios->c_iflag; |
| 251 | channel->ch_c_oflag = termios->c_oflag; | 251 | channel->ch_c_oflag = termios->c_oflag; |
| @@ -278,7 +278,7 @@ static void jsm_tty_close(struct uart_port *port) | |||
| 278 | jsm_printk(CLOSE, INFO, &channel->ch_bd->pci_dev, "start\n"); | 278 | jsm_printk(CLOSE, INFO, &channel->ch_bd->pci_dev, "start\n"); |
| 279 | 279 | ||
| 280 | bd = channel->ch_bd; | 280 | bd = channel->ch_bd; |
| 281 | ts = port->info->port.tty->termios; | 281 | ts = port->state->port.tty->termios; |
| 282 | 282 | ||
| 283 | channel->ch_flags &= ~(CH_STOPI); | 283 | channel->ch_flags &= ~(CH_STOPI); |
| 284 | 284 | ||
| @@ -530,7 +530,7 @@ void jsm_input(struct jsm_channel *ch) | |||
| 530 | if (!ch) | 530 | if (!ch) |
| 531 | return; | 531 | return; |
| 532 | 532 | ||
| 533 | tp = ch->uart_port.info->port.tty; | 533 | tp = ch->uart_port.state->port.tty; |
| 534 | 534 | ||
| 535 | bd = ch->ch_bd; | 535 | bd = ch->ch_bd; |
| 536 | if(!bd) | 536 | if(!bd) |
| @@ -849,7 +849,7 @@ int jsm_tty_write(struct uart_port *port) | |||
| 849 | u16 tail; | 849 | u16 tail; |
| 850 | u16 tmask; | 850 | u16 tmask; |
| 851 | u32 remain; | 851 | u32 remain; |
| 852 | int temp_tail = port->info->xmit.tail; | 852 | int temp_tail = port->state->xmit.tail; |
| 853 | struct jsm_channel *channel = (struct jsm_channel *)port; | 853 | struct jsm_channel *channel = (struct jsm_channel *)port; |
| 854 | 854 | ||
| 855 | tmask = WQUEUEMASK; | 855 | tmask = WQUEUEMASK; |
| @@ -865,10 +865,10 @@ int jsm_tty_write(struct uart_port *port) | |||
| 865 | data_count = 0; | 865 | data_count = 0; |
| 866 | if (bufcount >= remain) { | 866 | if (bufcount >= remain) { |
| 867 | bufcount -= remain; | 867 | bufcount -= remain; |
| 868 | while ((port->info->xmit.head != temp_tail) && | 868 | while ((port->state->xmit.head != temp_tail) && |
| 869 | (data_count < remain)) { | 869 | (data_count < remain)) { |
| 870 | channel->ch_wqueue[head++] = | 870 | channel->ch_wqueue[head++] = |
| 871 | port->info->xmit.buf[temp_tail]; | 871 | port->state->xmit.buf[temp_tail]; |
| 872 | 872 | ||
| 873 | temp_tail++; | 873 | temp_tail++; |
| 874 | temp_tail &= (UART_XMIT_SIZE - 1); | 874 | temp_tail &= (UART_XMIT_SIZE - 1); |
| @@ -880,10 +880,10 @@ int jsm_tty_write(struct uart_port *port) | |||
| 880 | data_count1 = 0; | 880 | data_count1 = 0; |
| 881 | if (bufcount > 0) { | 881 | if (bufcount > 0) { |
| 882 | remain = bufcount; | 882 | remain = bufcount; |
| 883 | while ((port->info->xmit.head != temp_tail) && | 883 | while ((port->state->xmit.head != temp_tail) && |
| 884 | (data_count1 < remain)) { | 884 | (data_count1 < remain)) { |
| 885 | channel->ch_wqueue[head++] = | 885 | channel->ch_wqueue[head++] = |
| 886 | port->info->xmit.buf[temp_tail]; | 886 | port->state->xmit.buf[temp_tail]; |
| 887 | 887 | ||
| 888 | temp_tail++; | 888 | temp_tail++; |
| 889 | temp_tail &= (UART_XMIT_SIZE - 1); | 889 | temp_tail &= (UART_XMIT_SIZE - 1); |
| @@ -892,7 +892,7 @@ int jsm_tty_write(struct uart_port *port) | |||
| 892 | } | 892 | } |
| 893 | } | 893 | } |
| 894 | 894 | ||
| 895 | port->info->xmit.tail = temp_tail; | 895 | port->state->xmit.tail = temp_tail; |
| 896 | 896 | ||
| 897 | data_count += data_count1; | 897 | data_count += data_count1; |
| 898 | if (data_count) { | 898 | if (data_count) { |
diff --git a/drivers/serial/m32r_sio.c b/drivers/serial/m32r_sio.c index 611c97a15654..bea5c215460c 100644 --- a/drivers/serial/m32r_sio.c +++ b/drivers/serial/m32r_sio.c | |||
| @@ -286,7 +286,7 @@ static void m32r_sio_start_tx(struct uart_port *port) | |||
| 286 | { | 286 | { |
| 287 | #ifdef CONFIG_SERIAL_M32R_PLDSIO | 287 | #ifdef CONFIG_SERIAL_M32R_PLDSIO |
| 288 | struct uart_sio_port *up = (struct uart_sio_port *)port; | 288 | struct uart_sio_port *up = (struct uart_sio_port *)port; |
| 289 | struct circ_buf *xmit = &up->port.info->xmit; | 289 | struct circ_buf *xmit = &up->port.state->xmit; |
| 290 | 290 | ||
| 291 | if (!(up->ier & UART_IER_THRI)) { | 291 | if (!(up->ier & UART_IER_THRI)) { |
| 292 | up->ier |= UART_IER_THRI; | 292 | up->ier |= UART_IER_THRI; |
| @@ -325,7 +325,7 @@ static void m32r_sio_enable_ms(struct uart_port *port) | |||
| 325 | 325 | ||
| 326 | static void receive_chars(struct uart_sio_port *up, int *status) | 326 | static void receive_chars(struct uart_sio_port *up, int *status) |
| 327 | { | 327 | { |
| 328 | struct tty_struct *tty = up->port.info->port.tty; | 328 | struct tty_struct *tty = up->port.state->port.tty; |
| 329 | unsigned char ch; | 329 | unsigned char ch; |
| 330 | unsigned char flag; | 330 | unsigned char flag; |
| 331 | int max_count = 256; | 331 | int max_count = 256; |
| @@ -398,7 +398,7 @@ static void receive_chars(struct uart_sio_port *up, int *status) | |||
| 398 | 398 | ||
| 399 | static void transmit_chars(struct uart_sio_port *up) | 399 | static void transmit_chars(struct uart_sio_port *up) |
| 400 | { | 400 | { |
| 401 | struct circ_buf *xmit = &up->port.info->xmit; | 401 | struct circ_buf *xmit = &up->port.state->xmit; |
| 402 | int count; | 402 | int count; |
| 403 | 403 | ||
| 404 | if (up->port.x_char) { | 404 | if (up->port.x_char) { |
diff --git a/drivers/serial/max3100.c b/drivers/serial/max3100.c index 9fd33e5622bd..75ab00631c41 100644 --- a/drivers/serial/max3100.c +++ b/drivers/serial/max3100.c | |||
| @@ -184,7 +184,7 @@ static void max3100_timeout(unsigned long data) | |||
| 184 | { | 184 | { |
| 185 | struct max3100_port *s = (struct max3100_port *)data; | 185 | struct max3100_port *s = (struct max3100_port *)data; |
| 186 | 186 | ||
| 187 | if (s->port.info) { | 187 | if (s->port.state) { |
| 188 | max3100_dowork(s); | 188 | max3100_dowork(s); |
| 189 | mod_timer(&s->timer, jiffies + s->poll_time); | 189 | mod_timer(&s->timer, jiffies + s->poll_time); |
| 190 | } | 190 | } |
| @@ -261,7 +261,7 @@ static void max3100_work(struct work_struct *w) | |||
| 261 | int rxchars; | 261 | int rxchars; |
| 262 | u16 tx, rx; | 262 | u16 tx, rx; |
| 263 | int conf, cconf, rts, crts; | 263 | int conf, cconf, rts, crts; |
| 264 | struct circ_buf *xmit = &s->port.info->xmit; | 264 | struct circ_buf *xmit = &s->port.state->xmit; |
| 265 | 265 | ||
| 266 | dev_dbg(&s->spi->dev, "%s\n", __func__); | 266 | dev_dbg(&s->spi->dev, "%s\n", __func__); |
| 267 | 267 | ||
| @@ -307,8 +307,8 @@ static void max3100_work(struct work_struct *w) | |||
| 307 | } | 307 | } |
| 308 | } | 308 | } |
| 309 | 309 | ||
| 310 | if (rxchars > 16 && s->port.info->port.tty != NULL) { | 310 | if (rxchars > 16 && s->port.state->port.tty != NULL) { |
| 311 | tty_flip_buffer_push(s->port.info->port.tty); | 311 | tty_flip_buffer_push(s->port.state->port.tty); |
| 312 | rxchars = 0; | 312 | rxchars = 0; |
| 313 | } | 313 | } |
| 314 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | 314 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| @@ -320,8 +320,8 @@ static void max3100_work(struct work_struct *w) | |||
| 320 | (!uart_circ_empty(xmit) && | 320 | (!uart_circ_empty(xmit) && |
| 321 | !uart_tx_stopped(&s->port)))); | 321 | !uart_tx_stopped(&s->port)))); |
| 322 | 322 | ||
| 323 | if (rxchars > 0 && s->port.info->port.tty != NULL) | 323 | if (rxchars > 0 && s->port.state->port.tty != NULL) |
| 324 | tty_flip_buffer_push(s->port.info->port.tty); | 324 | tty_flip_buffer_push(s->port.state->port.tty); |
| 325 | } | 325 | } |
| 326 | 326 | ||
| 327 | static irqreturn_t max3100_irq(int irqno, void *dev_id) | 327 | static irqreturn_t max3100_irq(int irqno, void *dev_id) |
| @@ -429,7 +429,7 @@ max3100_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 429 | int baud = 0; | 429 | int baud = 0; |
| 430 | unsigned cflag; | 430 | unsigned cflag; |
| 431 | u32 param_new, param_mask, parity = 0; | 431 | u32 param_new, param_mask, parity = 0; |
| 432 | struct tty_struct *tty = s->port.info->port.tty; | 432 | struct tty_struct *tty = s->port.state->port.tty; |
| 433 | 433 | ||
| 434 | dev_dbg(&s->spi->dev, "%s\n", __func__); | 434 | dev_dbg(&s->spi->dev, "%s\n", __func__); |
| 435 | if (!tty) | 435 | if (!tty) |
| @@ -529,7 +529,7 @@ max3100_set_termios(struct uart_port *port, struct ktermios *termios, | |||
| 529 | MAX3100_STATUS_OE; | 529 | MAX3100_STATUS_OE; |
| 530 | 530 | ||
| 531 | /* we are sending char from a workqueue so enable */ | 531 | /* we are sending char from a workqueue so enable */ |
| 532 | s->port.info->port.tty->low_latency = 1; | 532 | s->port.state->port.tty->low_latency = 1; |
| 533 | 533 | ||
| 534 | if (s->poll_time > 0) | 534 | if (s->poll_time > 0) |
| 535 | del_timer_sync(&s->timer); | 535 | del_timer_sync(&s->timer); |
diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c index 0eefb07bebaf..b44382442bf1 100644 --- a/drivers/serial/mcf.c +++ b/drivers/serial/mcf.c | |||
| @@ -323,7 +323,7 @@ static void mcf_rx_chars(struct mcf_uart *pp) | |||
| 323 | uart_insert_char(port, status, MCFUART_USR_RXOVERRUN, ch, flag); | 323 | uart_insert_char(port, status, MCFUART_USR_RXOVERRUN, ch, flag); |
| 324 | } | 324 | } |
| 325 | 325 | ||
| 326 | tty_flip_buffer_push(port->info->port.tty); | 326 | tty_flip_buffer_push(port->state->port.tty); |
| 327 | } | 327 | } |
| 328 | 328 | ||
| 329 | /****************************************************************************/ | 329 | /****************************************************************************/ |
| @@ -331,7 +331,7 @@ static void mcf_rx_chars(struct mcf_uart *pp) | |||
| 331 | static void mcf_tx_chars(struct mcf_uart *pp) | 331 | static void mcf_tx_chars(struct mcf_uart *pp) |
| 332 | { | 332 | { |
| 333 | struct uart_port *port = &pp->port; | 333 | struct uart_port *port = &pp->port; |
| 334 | struct circ_buf *xmit = &port->info->xmit; | 334 | struct circ_buf *xmit = &port->state->xmit; |
| 335 | 335 | ||
| 336 | if (port->x_char) { | 336 | if (port->x_char) { |
| 337 | /* Send special char - probably flow control */ | 337 | /* Send special char - probably flow control */ |
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index abbd146c50d9..d7bcd074d383 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
| @@ -745,7 +745,7 @@ static struct uart_ops mpc52xx_uart_ops = { | |||
| 745 | static inline int | 745 | static inline int |
| 746 | mpc52xx_uart_int_rx_chars(struct uart_port *port) | 746 | mpc52xx_uart_int_rx_chars(struct uart_port *port) |
| 747 | { | 747 | { |
| 748 | struct tty_struct *tty = port->info->port.tty; | 748 | struct tty_struct *tty = port->state->port.tty; |
| 749 | unsigned char ch, flag; | 749 | unsigned char ch, flag; |
| 750 | unsigned short status; | 750 | unsigned short status; |
| 751 | 751 | ||
| @@ -812,7 +812,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port) | |||
| 812 | static inline int | 812 | static inline int |
| 813 | mpc52xx_uart_int_tx_chars(struct uart_port *port) | 813 | mpc52xx_uart_int_tx_chars(struct uart_port *port) |
| 814 | { | 814 | { |
| 815 | struct circ_buf *xmit = &port->info->xmit; | 815 | struct circ_buf *xmit = &port->state->xmit; |
| 816 | 816 | ||
| 817 | /* Process out of band chars */ | 817 | /* Process out of band chars */ |
| 818 | if (port->x_char) { | 818 | if (port->x_char) { |
diff --git a/drivers/serial/mpsc.c b/drivers/serial/mpsc.c index 61d3ade5286c..b5496c28e60b 100644 --- a/drivers/serial/mpsc.c +++ b/drivers/serial/mpsc.c | |||
| @@ -936,7 +936,7 @@ static int serial_polled; | |||
| 936 | static int mpsc_rx_intr(struct mpsc_port_info *pi) | 936 | static int mpsc_rx_intr(struct mpsc_port_info *pi) |
| 937 | { | 937 | { |
| 938 | struct mpsc_rx_desc *rxre; | 938 | struct mpsc_rx_desc *rxre; |
| 939 | struct tty_struct *tty = pi->port.info->port.tty; | 939 | struct tty_struct *tty = pi->port.state->port.tty; |
| 940 | u32 cmdstat, bytes_in, i; | 940 | u32 cmdstat, bytes_in, i; |
| 941 | int rc = 0; | 941 | int rc = 0; |
| 942 | u8 *bp; | 942 | u8 *bp; |
| @@ -1109,7 +1109,7 @@ static void mpsc_setup_tx_desc(struct mpsc_port_info *pi, u32 count, u32 intr) | |||
| 1109 | 1109 | ||
| 1110 | static void mpsc_copy_tx_data(struct mpsc_port_info *pi) | 1110 | static void mpsc_copy_tx_data(struct mpsc_port_info *pi) |
| 1111 | { | 1111 | { |
| 1112 | struct circ_buf *xmit = &pi->port.info->xmit; | 1112 | struct circ_buf *xmit = &pi->port.state->xmit; |
| 1113 | u8 *bp; | 1113 | u8 *bp; |
| 1114 | u32 i; | 1114 | u32 i; |
| 1115 | 1115 | ||
diff --git a/drivers/serial/msm_serial.c b/drivers/serial/msm_serial.c index f7c24baa1416..b05c5aa02cb4 100644 --- a/drivers/serial/msm_serial.c +++ b/drivers/serial/msm_serial.c | |||
| @@ -88,7 +88,7 @@ static void msm_enable_ms(struct uart_port *port) | |||
| 88 | 88 | ||
| 89 | static void handle_rx(struct uart_port *port) | 89 | static void handle_rx(struct uart_port *port) |
| 90 | { | 90 | { |
| 91 | struct tty_struct *tty = port->info->port.tty; | 91 | struct tty_struct *tty = port->state->port.tty; |
| 92 | unsigned int sr; | 92 | unsigned int sr; |
| 93 | 93 | ||
| 94 | /* | 94 | /* |
| @@ -136,7 +136,7 @@ static void handle_rx(struct uart_port *port) | |||
| 136 | 136 | ||
| 137 | static void handle_tx(struct uart_port *port) | 137 | static void handle_tx(struct uart_port *port) |
| 138 | { | 138 | { |
| 139 | struct circ_buf *xmit = &port->info->xmit; | 139 | struct circ_buf *xmit = &port->state->xmit; |
| 140 | struct msm_port *msm_port = UART_TO_MSM(port); | 140 | struct msm_port *msm_port = UART_TO_MSM(port); |
| 141 | int sent_tx; | 141 | int sent_tx; |
| 142 | 142 | ||
| @@ -169,7 +169,7 @@ static void handle_delta_cts(struct uart_port *port) | |||
| 169 | { | 169 | { |
| 170 | msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); | 170 | msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); |
| 171 | port->icount.cts++; | 171 | port->icount.cts++; |
| 172 | wake_up_interruptible(&port->info->delta_msr_wait); | 172 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | static irqreturn_t msm_irq(int irq, void *dev_id) | 175 | static irqreturn_t msm_irq(int irq, void *dev_id) |
diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c index 953a5ffa9b44..7571aaa138b0 100644 --- a/drivers/serial/mux.c +++ b/drivers/serial/mux.c | |||
| @@ -199,7 +199,7 @@ static void mux_break_ctl(struct uart_port *port, int break_state) | |||
| 199 | static void mux_write(struct uart_port *port) | 199 | static void mux_write(struct uart_port *port) |
| 200 | { | 200 | { |
| 201 | int count; | 201 | int count; |
| 202 | struct circ_buf *xmit = &port->info->xmit; | 202 | struct circ_buf *xmit = &port->state->xmit; |
| 203 | 203 | ||
| 204 | if(port->x_char) { | 204 | if(port->x_char) { |
| 205 | UART_PUT_CHAR(port, port->x_char); | 205 | UART_PUT_CHAR(port, port->x_char); |
| @@ -243,7 +243,7 @@ static void mux_write(struct uart_port *port) | |||
| 243 | static void mux_read(struct uart_port *port) | 243 | static void mux_read(struct uart_port *port) |
| 244 | { | 244 | { |
| 245 | int data; | 245 | int data; |
| 246 | struct tty_struct *tty = port->info->port.tty; | 246 | struct tty_struct *tty = port->state->port.tty; |
| 247 | __u32 start_count = port->icount.rx; | 247 | __u32 start_count = port->icount.rx; |
| 248 | 248 | ||
| 249 | while(1) { | 249 | while(1) { |
diff --git a/drivers/serial/netx-serial.c b/drivers/serial/netx-serial.c index 3e5dda8518b7..7735c9f35fa0 100644 --- a/drivers/serial/netx-serial.c +++ b/drivers/serial/netx-serial.c | |||
| @@ -140,7 +140,7 @@ static void netx_enable_ms(struct uart_port *port) | |||
| 140 | 140 | ||
| 141 | static inline void netx_transmit_buffer(struct uart_port *port) | 141 | static inline void netx_transmit_buffer(struct uart_port *port) |
| 142 | { | 142 | { |
| 143 | struct circ_buf *xmit = &port->info->xmit; | 143 | struct circ_buf *xmit = &port->state->xmit; |
| 144 | 144 | ||
| 145 | if (port->x_char) { | 145 | if (port->x_char) { |
| 146 | writel(port->x_char, port->membase + UART_DR); | 146 | writel(port->x_char, port->membase + UART_DR); |
| @@ -185,7 +185,7 @@ static unsigned int netx_tx_empty(struct uart_port *port) | |||
| 185 | 185 | ||
| 186 | static void netx_txint(struct uart_port *port) | 186 | static void netx_txint(struct uart_port *port) |
| 187 | { | 187 | { |
| 188 | struct circ_buf *xmit = &port->info->xmit; | 188 | struct circ_buf *xmit = &port->state->xmit; |
| 189 | 189 | ||
| 190 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 190 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
| 191 | netx_stop_tx(port); | 191 | netx_stop_tx(port); |
| @@ -201,7 +201,7 @@ static void netx_txint(struct uart_port *port) | |||
| 201 | static void netx_rxint(struct uart_port *port) | 201 | static void netx_rxint(struct uart_port *port) |
| 202 | { | 202 | { |
| 203 | unsigned char rx, flg, status; | 203 | unsigned char rx, flg, status; |
| 204 | struct tty_struct *tty = port->info->port.tty; | 204 | struct tty_struct *tty = port->state->port.tty; |
| 205 | 205 | ||
| 206 | while (!(readl(port->membase + UART_FR) & FR_RXFE)) { | 206 | while (!(readl(port->membase + UART_FR) & FR_RXFE)) { |
| 207 | rx = readl(port->membase + UART_DR); | 207 | rx = readl(port->membase + UART_DR); |
diff --git a/drivers/serial/nwpserial.c b/drivers/serial/nwpserial.c index 9e150b19d726..e1ab8ec0a4a6 100644 --- a/drivers/serial/nwpserial.c +++ b/drivers/serial/nwpserial.c | |||
| @@ -126,7 +126,7 @@ static void nwpserial_config_port(struct uart_port *port, int flags) | |||
| 126 | static irqreturn_t nwpserial_interrupt(int irq, void *dev_id) | 126 | static irqreturn_t nwpserial_interrupt(int irq, void *dev_id) |
| 127 | { | 127 | { |
| 128 | struct nwpserial_port *up = dev_id; | 128 | struct nwpserial_port *up = dev_id; |
| 129 | struct tty_struct *tty = up->port.info->port.tty; | 129 | struct tty_struct *tty = up->port.state->port.tty; |
| 130 | irqreturn_t ret; | 130 | irqreturn_t ret; |
| 131 | unsigned int iir; | 131 | unsigned int iir; |
| 132 | unsigned char ch; | 132 | unsigned char ch; |
| @@ -261,7 +261,7 @@ static void nwpserial_start_tx(struct uart_port *port) | |||
| 261 | struct nwpserial_port *up; | 261 | struct nwpserial_port *up; |
| 262 | struct circ_buf *xmit; | 262 | struct circ_buf *xmit; |
| 263 | up = container_of(port, struct nwpserial_port, port); | 263 | up = container_of(port, struct nwpserial_port, port); |
| 264 | xmit = &up->port.info->xmit; | 264 | xmit = &up->port.state->xmit; |
| 265 | 265 | ||
| 266 | if (port->x_char) { | 266 | if (port->x_char) { |
| 267 | nwpserial_putchar(up, up->port.x_char); | 267 | nwpserial_putchar(up, up->port.x_char); |
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c index 9c1243fbd512..0700cd10b97c 100644 --- a/drivers/serial/pmac_zilog.c +++ b/drivers/serial/pmac_zilog.c | |||
| @@ -242,12 +242,12 @@ static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap) | |||
| 242 | } | 242 | } |
| 243 | 243 | ||
| 244 | /* Sanity check, make sure the old bug is no longer happening */ | 244 | /* Sanity check, make sure the old bug is no longer happening */ |
| 245 | if (uap->port.info == NULL || uap->port.info->port.tty == NULL) { | 245 | if (uap->port.state == NULL || uap->port.state->port.tty == NULL) { |
| 246 | WARN_ON(1); | 246 | WARN_ON(1); |
| 247 | (void)read_zsdata(uap); | 247 | (void)read_zsdata(uap); |
| 248 | return NULL; | 248 | return NULL; |
| 249 | } | 249 | } |
| 250 | tty = uap->port.info->port.tty; | 250 | tty = uap->port.state->port.tty; |
| 251 | 251 | ||
| 252 | while (1) { | 252 | while (1) { |
| 253 | error = 0; | 253 | error = 0; |
| @@ -369,7 +369,7 @@ static void pmz_status_handle(struct uart_pmac_port *uap) | |||
| 369 | uart_handle_cts_change(&uap->port, | 369 | uart_handle_cts_change(&uap->port, |
| 370 | !(status & CTS)); | 370 | !(status & CTS)); |
| 371 | 371 | ||
| 372 | wake_up_interruptible(&uap->port.info->delta_msr_wait); | 372 | wake_up_interruptible(&uap->port.state->port.delta_msr_wait); |
| 373 | } | 373 | } |
| 374 | 374 | ||
| 375 | if (status & BRK_ABRT) | 375 | if (status & BRK_ABRT) |
| @@ -420,9 +420,9 @@ static void pmz_transmit_chars(struct uart_pmac_port *uap) | |||
| 420 | return; | 420 | return; |
| 421 | } | 421 | } |
| 422 | 422 | ||
| 423 | if (uap->port.info == NULL) | 423 | if (uap->port.state == NULL) |
| 424 | goto ack_tx_int; | 424 | goto ack_tx_int; |
| 425 | xmit = &uap->port.info->xmit; | 425 | xmit = &uap->port.state->xmit; |
| 426 | if (uart_circ_empty(xmit)) { | 426 | if (uart_circ_empty(xmit)) { |
| 427 | uart_write_wakeup(&uap->port); | 427 | uart_write_wakeup(&uap->port); |
| 428 | goto ack_tx_int; | 428 | goto ack_tx_int; |
| @@ -655,7 +655,7 @@ static void pmz_start_tx(struct uart_port *port) | |||
| 655 | port->icount.tx++; | 655 | port->icount.tx++; |
| 656 | port->x_char = 0; | 656 | port->x_char = 0; |
| 657 | } else { | 657 | } else { |
| 658 | struct circ_buf *xmit = &port->info->xmit; | 658 | struct circ_buf *xmit = &port->state->xmit; |
| 659 | 659 | ||
| 660 | write_zsdata(uap, xmit->buf[xmit->tail]); | 660 | write_zsdata(uap, xmit->buf[xmit->tail]); |
| 661 | zssync(uap); | 661 | zssync(uap); |
| @@ -1645,7 +1645,7 @@ static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state) | |||
| 1645 | state = pmz_uart_reg.state + uap->port.line; | 1645 | state = pmz_uart_reg.state + uap->port.line; |
| 1646 | 1646 | ||
| 1647 | mutex_lock(&pmz_irq_mutex); | 1647 | mutex_lock(&pmz_irq_mutex); |
| 1648 | mutex_lock(&state->mutex); | 1648 | mutex_lock(&state->port.mutex); |
| 1649 | 1649 | ||
| 1650 | spin_lock_irqsave(&uap->port.lock, flags); | 1650 | spin_lock_irqsave(&uap->port.lock, flags); |
| 1651 | 1651 | ||
| @@ -1676,7 +1676,7 @@ static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state) | |||
| 1676 | /* Shut the chip down */ | 1676 | /* Shut the chip down */ |
| 1677 | pmz_set_scc_power(uap, 0); | 1677 | pmz_set_scc_power(uap, 0); |
| 1678 | 1678 | ||
| 1679 | mutex_unlock(&state->mutex); | 1679 | mutex_unlock(&state->port.mutex); |
| 1680 | mutex_unlock(&pmz_irq_mutex); | 1680 | mutex_unlock(&pmz_irq_mutex); |
| 1681 | 1681 | ||
| 1682 | pmz_debug("suspend, switching complete\n"); | 1682 | pmz_debug("suspend, switching complete\n"); |
| @@ -1705,7 +1705,7 @@ static int pmz_resume(struct macio_dev *mdev) | |||
| 1705 | state = pmz_uart_reg.state + uap->port.line; | 1705 | state = pmz_uart_reg.state + uap->port.line; |
| 1706 | 1706 | ||
| 1707 | mutex_lock(&pmz_irq_mutex); | 1707 | mutex_lock(&pmz_irq_mutex); |
| 1708 | mutex_lock(&state->mutex); | 1708 | mutex_lock(&state->port.mutex); |
| 1709 | 1709 | ||
| 1710 | spin_lock_irqsave(&uap->port.lock, flags); | 1710 | spin_lock_irqsave(&uap->port.lock, flags); |
| 1711 | if (!ZS_IS_OPEN(uap) && !ZS_IS_CONS(uap)) { | 1711 | if (!ZS_IS_OPEN(uap) && !ZS_IS_CONS(uap)) { |
| @@ -1737,7 +1737,7 @@ static int pmz_resume(struct macio_dev *mdev) | |||
| 1737 | } | 1737 | } |
| 1738 | 1738 | ||
| 1739 | bail: | 1739 | bail: |
| 1740 | mutex_unlock(&state->mutex); | 1740 | mutex_unlock(&state->port.mutex); |
| 1741 | mutex_unlock(&pmz_irq_mutex); | 1741 | mutex_unlock(&pmz_irq_mutex); |
| 1742 | 1742 | ||
| 1743 | /* Right now, we deal with delay by blocking here, I'll be | 1743 | /* Right now, we deal with delay by blocking here, I'll be |
diff --git a/drivers/serial/pnx8xxx_uart.c b/drivers/serial/pnx8xxx_uart.c index 1bb8f1b45767..0aa75a97531c 100644 --- a/drivers/serial/pnx8xxx_uart.c +++ b/drivers/serial/pnx8xxx_uart.c | |||
| @@ -100,7 +100,7 @@ static void pnx8xxx_mctrl_check(struct pnx8xxx_port *sport) | |||
| 100 | if (changed & TIOCM_CTS) | 100 | if (changed & TIOCM_CTS) |
| 101 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); | 101 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); |
| 102 | 102 | ||
| 103 | wake_up_interruptible(&sport->port.info->delta_msr_wait); | 103 | wake_up_interruptible(&sport->port.state->port.delta_msr_wait); |
| 104 | } | 104 | } |
| 105 | 105 | ||
| 106 | /* | 106 | /* |
| @@ -112,7 +112,7 @@ static void pnx8xxx_timeout(unsigned long data) | |||
| 112 | struct pnx8xxx_port *sport = (struct pnx8xxx_port *)data; | 112 | struct pnx8xxx_port *sport = (struct pnx8xxx_port *)data; |
| 113 | unsigned long flags; | 113 | unsigned long flags; |
| 114 | 114 | ||
| 115 | if (sport->port.info) { | 115 | if (sport->port.state) { |
| 116 | spin_lock_irqsave(&sport->port.lock, flags); | 116 | spin_lock_irqsave(&sport->port.lock, flags); |
| 117 | pnx8xxx_mctrl_check(sport); | 117 | pnx8xxx_mctrl_check(sport); |
| 118 | spin_unlock_irqrestore(&sport->port.lock, flags); | 118 | spin_unlock_irqrestore(&sport->port.lock, flags); |
| @@ -181,7 +181,7 @@ static void pnx8xxx_enable_ms(struct uart_port *port) | |||
| 181 | 181 | ||
| 182 | static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport) | 182 | static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport) |
| 183 | { | 183 | { |
| 184 | struct tty_struct *tty = sport->port.info->port.tty; | 184 | struct tty_struct *tty = sport->port.state->port.tty; |
| 185 | unsigned int status, ch, flg; | 185 | unsigned int status, ch, flg; |
| 186 | 186 | ||
| 187 | status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) | | 187 | status = FIFO_TO_SM(serial_in(sport, PNX8XXX_FIFO)) | |
| @@ -243,7 +243,7 @@ static void pnx8xxx_rx_chars(struct pnx8xxx_port *sport) | |||
| 243 | 243 | ||
| 244 | static void pnx8xxx_tx_chars(struct pnx8xxx_port *sport) | 244 | static void pnx8xxx_tx_chars(struct pnx8xxx_port *sport) |
| 245 | { | 245 | { |
| 246 | struct circ_buf *xmit = &sport->port.info->xmit; | 246 | struct circ_buf *xmit = &sport->port.state->xmit; |
| 247 | 247 | ||
| 248 | if (sport->port.x_char) { | 248 | if (sport->port.x_char) { |
| 249 | serial_out(sport, PNX8XXX_FIFO, sport->port.x_char); | 249 | serial_out(sport, PNX8XXX_FIFO, sport->port.x_char); |
diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c index a48a8a13d87b..6443b7ff274a 100644 --- a/drivers/serial/pxa.c +++ b/drivers/serial/pxa.c | |||
| @@ -96,7 +96,7 @@ static void serial_pxa_stop_rx(struct uart_port *port) | |||
| 96 | 96 | ||
| 97 | static inline void receive_chars(struct uart_pxa_port *up, int *status) | 97 | static inline void receive_chars(struct uart_pxa_port *up, int *status) |
| 98 | { | 98 | { |
| 99 | struct tty_struct *tty = up->port.info->port.tty; | 99 | struct tty_struct *tty = up->port.state->port.tty; |
| 100 | unsigned int ch, flag; | 100 | unsigned int ch, flag; |
| 101 | int max_count = 256; | 101 | int max_count = 256; |
| 102 | 102 | ||
| @@ -161,7 +161,7 @@ static inline void receive_chars(struct uart_pxa_port *up, int *status) | |||
| 161 | 161 | ||
| 162 | static void transmit_chars(struct uart_pxa_port *up) | 162 | static void transmit_chars(struct uart_pxa_port *up) |
| 163 | { | 163 | { |
| 164 | struct circ_buf *xmit = &up->port.info->xmit; | 164 | struct circ_buf *xmit = &up->port.state->xmit; |
| 165 | int count; | 165 | int count; |
| 166 | 166 | ||
| 167 | if (up->port.x_char) { | 167 | if (up->port.x_char) { |
| @@ -220,7 +220,7 @@ static inline void check_modem_status(struct uart_pxa_port *up) | |||
| 220 | if (status & UART_MSR_DCTS) | 220 | if (status & UART_MSR_DCTS) |
| 221 | uart_handle_cts_change(&up->port, status & UART_MSR_CTS); | 221 | uart_handle_cts_change(&up->port, status & UART_MSR_CTS); |
| 222 | 222 | ||
| 223 | wake_up_interruptible(&up->port.info->delta_msr_wait); | 223 | wake_up_interruptible(&up->port.state->port.delta_msr_wait); |
| 224 | } | 224 | } |
| 225 | 225 | ||
| 226 | /* | 226 | /* |
diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c index 94530f01521e..7f5e26873220 100644 --- a/drivers/serial/sa1100.c +++ b/drivers/serial/sa1100.c | |||
| @@ -117,7 +117,7 @@ static void sa1100_mctrl_check(struct sa1100_port *sport) | |||
| 117 | if (changed & TIOCM_CTS) | 117 | if (changed & TIOCM_CTS) |
| 118 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); | 118 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); |
| 119 | 119 | ||
| 120 | wake_up_interruptible(&sport->port.info->delta_msr_wait); | 120 | wake_up_interruptible(&sport->port.state->port.delta_msr_wait); |
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | /* | 123 | /* |
| @@ -129,7 +129,7 @@ static void sa1100_timeout(unsigned long data) | |||
| 129 | struct sa1100_port *sport = (struct sa1100_port *)data; | 129 | struct sa1100_port *sport = (struct sa1100_port *)data; |
| 130 | unsigned long flags; | 130 | unsigned long flags; |
| 131 | 131 | ||
| 132 | if (sport->port.info) { | 132 | if (sport->port.state) { |
| 133 | spin_lock_irqsave(&sport->port.lock, flags); | 133 | spin_lock_irqsave(&sport->port.lock, flags); |
| 134 | sa1100_mctrl_check(sport); | 134 | sa1100_mctrl_check(sport); |
| 135 | spin_unlock_irqrestore(&sport->port.lock, flags); | 135 | spin_unlock_irqrestore(&sport->port.lock, flags); |
| @@ -189,7 +189,7 @@ static void sa1100_enable_ms(struct uart_port *port) | |||
| 189 | static void | 189 | static void |
| 190 | sa1100_rx_chars(struct sa1100_port *sport) | 190 | sa1100_rx_chars(struct sa1100_port *sport) |
| 191 | { | 191 | { |
| 192 | struct tty_struct *tty = sport->port.info->port.tty; | 192 | struct tty_struct *tty = sport->port.state->port.tty; |
| 193 | unsigned int status, ch, flg; | 193 | unsigned int status, ch, flg; |
| 194 | 194 | ||
| 195 | status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) | | 195 | status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) | |
| @@ -239,7 +239,7 @@ sa1100_rx_chars(struct sa1100_port *sport) | |||
| 239 | 239 | ||
| 240 | static void sa1100_tx_chars(struct sa1100_port *sport) | 240 | static void sa1100_tx_chars(struct sa1100_port *sport) |
| 241 | { | 241 | { |
| 242 | struct circ_buf *xmit = &sport->port.info->xmit; | 242 | struct circ_buf *xmit = &sport->port.state->xmit; |
| 243 | 243 | ||
| 244 | if (sport->port.x_char) { | 244 | if (sport->port.x_char) { |
| 245 | UART_PUT_CHAR(sport, sport->port.x_char); | 245 | UART_PUT_CHAR(sport, sport->port.x_char); |
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index c8851a0db63a..1523e8d9ae77 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c | |||
| @@ -196,7 +196,7 @@ s3c24xx_serial_rx_chars(int irq, void *dev_id) | |||
| 196 | { | 196 | { |
| 197 | struct s3c24xx_uart_port *ourport = dev_id; | 197 | struct s3c24xx_uart_port *ourport = dev_id; |
| 198 | struct uart_port *port = &ourport->port; | 198 | struct uart_port *port = &ourport->port; |
| 199 | struct tty_struct *tty = port->info->port.tty; | 199 | struct tty_struct *tty = port->state->port.tty; |
| 200 | unsigned int ufcon, ch, flag, ufstat, uerstat; | 200 | unsigned int ufcon, ch, flag, ufstat, uerstat; |
| 201 | int max_count = 64; | 201 | int max_count = 64; |
| 202 | 202 | ||
| @@ -281,7 +281,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) | |||
| 281 | { | 281 | { |
| 282 | struct s3c24xx_uart_port *ourport = id; | 282 | struct s3c24xx_uart_port *ourport = id; |
| 283 | struct uart_port *port = &ourport->port; | 283 | struct uart_port *port = &ourport->port; |
| 284 | struct circ_buf *xmit = &port->info->xmit; | 284 | struct circ_buf *xmit = &port->state->xmit; |
| 285 | int count = 256; | 285 | int count = 256; |
| 286 | 286 | ||
| 287 | if (port->x_char) { | 287 | if (port->x_char) { |
| @@ -992,10 +992,10 @@ static int s3c24xx_serial_cpufreq_transition(struct notifier_block *nb, | |||
| 992 | struct ktermios *termios; | 992 | struct ktermios *termios; |
| 993 | struct tty_struct *tty; | 993 | struct tty_struct *tty; |
| 994 | 994 | ||
| 995 | if (uport->info == NULL) | 995 | if (uport->state == NULL) |
| 996 | goto exit; | 996 | goto exit; |
| 997 | 997 | ||
| 998 | tty = uport->info->port.tty; | 998 | tty = uport->state->port.tty; |
| 999 | 999 | ||
| 1000 | if (tty == NULL) | 1000 | if (tty == NULL) |
| 1001 | goto exit; | 1001 | goto exit; |
diff --git a/drivers/serial/sb1250-duart.c b/drivers/serial/sb1250-duart.c index 319e8b83f6be..a2f2b3254499 100644 --- a/drivers/serial/sb1250-duart.c +++ b/drivers/serial/sb1250-duart.c | |||
| @@ -384,13 +384,13 @@ static void sbd_receive_chars(struct sbd_port *sport) | |||
| 384 | uart_insert_char(uport, status, M_DUART_OVRUN_ERR, ch, flag); | 384 | uart_insert_char(uport, status, M_DUART_OVRUN_ERR, ch, flag); |
| 385 | } | 385 | } |
| 386 | 386 | ||
| 387 | tty_flip_buffer_push(uport->info->port.tty); | 387 | tty_flip_buffer_push(uport->state->port.tty); |
| 388 | } | 388 | } |
| 389 | 389 | ||
| 390 | static void sbd_transmit_chars(struct sbd_port *sport) | 390 | static void sbd_transmit_chars(struct sbd_port *sport) |
| 391 | { | 391 | { |
| 392 | struct uart_port *uport = &sport->port; | 392 | struct uart_port *uport = &sport->port; |
| 393 | struct circ_buf *xmit = &sport->port.info->xmit; | 393 | struct circ_buf *xmit = &sport->port.state->xmit; |
| 394 | unsigned int mask; | 394 | unsigned int mask; |
| 395 | int stop_tx; | 395 | int stop_tx; |
| 396 | 396 | ||
| @@ -440,7 +440,7 @@ static void sbd_status_handle(struct sbd_port *sport) | |||
| 440 | 440 | ||
| 441 | if (delta & ((M_DUART_IN_PIN2_VAL | M_DUART_IN_PIN0_VAL) << | 441 | if (delta & ((M_DUART_IN_PIN2_VAL | M_DUART_IN_PIN0_VAL) << |
| 442 | S_DUART_IN_PIN_CHNG)) | 442 | S_DUART_IN_PIN_CHNG)) |
| 443 | wake_up_interruptible(&uport->info->delta_msr_wait); | 443 | wake_up_interruptible(&uport->state->port.delta_msr_wait); |
| 444 | } | 444 | } |
| 445 | 445 | ||
| 446 | static irqreturn_t sbd_interrupt(int irq, void *dev_id) | 446 | static irqreturn_t sbd_interrupt(int irq, void *dev_id) |
diff --git a/drivers/serial/sc26xx.c b/drivers/serial/sc26xx.c index e0be11ceaa25..75038ad2b242 100644 --- a/drivers/serial/sc26xx.c +++ b/drivers/serial/sc26xx.c | |||
| @@ -140,8 +140,8 @@ static struct tty_struct *receive_chars(struct uart_port *port) | |||
| 140 | char flag; | 140 | char flag; |
| 141 | u8 status; | 141 | u8 status; |
| 142 | 142 | ||
| 143 | if (port->info != NULL) /* Unopened serial console */ | 143 | if (port->state != NULL) /* Unopened serial console */ |
| 144 | tty = port->info->port.tty; | 144 | tty = port->state->port.tty; |
| 145 | 145 | ||
| 146 | while (limit-- > 0) { | 146 | while (limit-- > 0) { |
| 147 | status = READ_SC_PORT(port, SR); | 147 | status = READ_SC_PORT(port, SR); |
| @@ -190,10 +190,10 @@ static void transmit_chars(struct uart_port *port) | |||
| 190 | { | 190 | { |
| 191 | struct circ_buf *xmit; | 191 | struct circ_buf *xmit; |
| 192 | 192 | ||
| 193 | if (!port->info) | 193 | if (!port->state) |
| 194 | return; | 194 | return; |
| 195 | 195 | ||
| 196 | xmit = &port->info->xmit; | 196 | xmit = &port->state->xmit; |
| 197 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | 197 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
| 198 | sc26xx_disable_irq(port, IMR_TXRDY); | 198 | sc26xx_disable_irq(port, IMR_TXRDY); |
| 199 | return; | 199 | return; |
| @@ -316,7 +316,7 @@ static void sc26xx_stop_tx(struct uart_port *port) | |||
| 316 | /* port->lock held by caller. */ | 316 | /* port->lock held by caller. */ |
| 317 | static void sc26xx_start_tx(struct uart_port *port) | 317 | static void sc26xx_start_tx(struct uart_port *port) |
| 318 | { | 318 | { |
| 319 | struct circ_buf *xmit = &port->info->xmit; | 319 | struct circ_buf *xmit = &port->state->xmit; |
| 320 | 320 | ||
| 321 | while (!uart_circ_empty(xmit)) { | 321 | while (!uart_circ_empty(xmit)) { |
| 322 | if (!(READ_SC_PORT(port, SR) & SR_TXRDY)) { | 322 | if (!(READ_SC_PORT(port, SR) & SR_TXRDY)) { |
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c index b0bb29d804ae..2514d00c0f6f 100644 --- a/drivers/serial/serial_core.c +++ b/drivers/serial/serial_core.c | |||
| @@ -29,10 +29,10 @@ | |||
| 29 | #include <linux/console.h> | 29 | #include <linux/console.h> |
| 30 | #include <linux/proc_fs.h> | 30 | #include <linux/proc_fs.h> |
| 31 | #include <linux/seq_file.h> | 31 | #include <linux/seq_file.h> |
| 32 | #include <linux/serial_core.h> | ||
| 33 | #include <linux/smp_lock.h> | 32 | #include <linux/smp_lock.h> |
| 34 | #include <linux/device.h> | 33 | #include <linux/device.h> |
| 35 | #include <linux/serial.h> /* for serial_state and serial_icounter_struct */ | 34 | #include <linux/serial.h> /* for serial_state and serial_icounter_struct */ |
| 35 | #include <linux/serial_core.h> | ||
| 36 | #include <linux/delay.h> | 36 | #include <linux/delay.h> |
| 37 | #include <linux/mutex.h> | 37 | #include <linux/mutex.h> |
| 38 | 38 | ||
| @@ -52,8 +52,6 @@ static struct lock_class_key port_lock_key; | |||
| 52 | 52 | ||
| 53 | #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) | 53 | #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) |
| 54 | 54 | ||
| 55 | #define uart_users(state) ((state)->count + (state)->info.port.blocked_open) | ||
| 56 | |||
| 57 | #ifdef CONFIG_SERIAL_CORE_CONSOLE | 55 | #ifdef CONFIG_SERIAL_CORE_CONSOLE |
| 58 | #define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line) | 56 | #define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line) |
| 59 | #else | 57 | #else |
| @@ -71,19 +69,19 @@ static void uart_change_pm(struct uart_state *state, int pm_state); | |||
| 71 | */ | 69 | */ |
| 72 | void uart_write_wakeup(struct uart_port *port) | 70 | void uart_write_wakeup(struct uart_port *port) |
| 73 | { | 71 | { |
| 74 | struct uart_info *info = port->info; | 72 | struct uart_state *state = port->state; |
| 75 | /* | 73 | /* |
| 76 | * This means you called this function _after_ the port was | 74 | * This means you called this function _after_ the port was |
| 77 | * closed. No cookie for you. | 75 | * closed. No cookie for you. |
| 78 | */ | 76 | */ |
| 79 | BUG_ON(!info); | 77 | BUG_ON(!state); |
| 80 | tasklet_schedule(&info->tlet); | 78 | tasklet_schedule(&state->tlet); |
| 81 | } | 79 | } |
| 82 | 80 | ||
| 83 | static void uart_stop(struct tty_struct *tty) | 81 | static void uart_stop(struct tty_struct *tty) |
| 84 | { | 82 | { |
| 85 | struct uart_state *state = tty->driver_data; | 83 | struct uart_state *state = tty->driver_data; |
| 86 | struct uart_port *port = state->port; | 84 | struct uart_port *port = state->uart_port; |
| 87 | unsigned long flags; | 85 | unsigned long flags; |
| 88 | 86 | ||
| 89 | spin_lock_irqsave(&port->lock, flags); | 87 | spin_lock_irqsave(&port->lock, flags); |
| @@ -94,9 +92,9 @@ static void uart_stop(struct tty_struct *tty) | |||
| 94 | static void __uart_start(struct tty_struct *tty) | 92 | static void __uart_start(struct tty_struct *tty) |
| 95 | { | 93 | { |
| 96 | struct uart_state *state = tty->driver_data; | 94 | struct uart_state *state = tty->driver_data; |
| 97 | struct uart_port *port = state->port; | 95 | struct uart_port *port = state->uart_port; |
| 98 | 96 | ||
| 99 | if (!uart_circ_empty(&state->info.xmit) && state->info.xmit.buf && | 97 | if (!uart_circ_empty(&state->xmit) && state->xmit.buf && |
| 100 | !tty->stopped && !tty->hw_stopped) | 98 | !tty->stopped && !tty->hw_stopped) |
| 101 | port->ops->start_tx(port); | 99 | port->ops->start_tx(port); |
| 102 | } | 100 | } |
| @@ -104,7 +102,7 @@ static void __uart_start(struct tty_struct *tty) | |||
| 104 | static void uart_start(struct tty_struct *tty) | 102 | static void uart_start(struct tty_struct *tty) |
| 105 | { | 103 | { |
| 106 | struct uart_state *state = tty->driver_data; | 104 | struct uart_state *state = tty->driver_data; |
| 107 | struct uart_port *port = state->port; | 105 | struct uart_port *port = state->uart_port; |
| 108 | unsigned long flags; | 106 | unsigned long flags; |
| 109 | 107 | ||
| 110 | spin_lock_irqsave(&port->lock, flags); | 108 | spin_lock_irqsave(&port->lock, flags); |
| @@ -115,7 +113,7 @@ static void uart_start(struct tty_struct *tty) | |||
| 115 | static void uart_tasklet_action(unsigned long data) | 113 | static void uart_tasklet_action(unsigned long data) |
| 116 | { | 114 | { |
| 117 | struct uart_state *state = (struct uart_state *)data; | 115 | struct uart_state *state = (struct uart_state *)data; |
| 118 | tty_wakeup(state->info.port.tty); | 116 | tty_wakeup(state->port.tty); |
| 119 | } | 117 | } |
| 120 | 118 | ||
| 121 | static inline void | 119 | static inline void |
| @@ -141,12 +139,12 @@ uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear) | |||
| 141 | */ | 139 | */ |
| 142 | static int uart_startup(struct uart_state *state, int init_hw) | 140 | static int uart_startup(struct uart_state *state, int init_hw) |
| 143 | { | 141 | { |
| 144 | struct uart_info *info = &state->info; | 142 | struct uart_port *uport = state->uart_port; |
| 145 | struct uart_port *port = state->port; | 143 | struct tty_port *port = &state->port; |
| 146 | unsigned long page; | 144 | unsigned long page; |
| 147 | int retval = 0; | 145 | int retval = 0; |
| 148 | 146 | ||
| 149 | if (info->flags & UIF_INITIALIZED) | 147 | if (port->flags & ASYNC_INITIALIZED) |
| 150 | return 0; | 148 | return 0; |
| 151 | 149 | ||
| 152 | /* | 150 | /* |
| @@ -154,26 +152,26 @@ static int uart_startup(struct uart_state *state, int init_hw) | |||
| 154 | * once we have successfully opened the port. Also set | 152 | * once we have successfully opened the port. Also set |
| 155 | * up the tty->alt_speed kludge | 153 | * up the tty->alt_speed kludge |
| 156 | */ | 154 | */ |
| 157 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | 155 | set_bit(TTY_IO_ERROR, &port->tty->flags); |
| 158 | 156 | ||
| 159 | if (port->type == PORT_UNKNOWN) | 157 | if (uport->type == PORT_UNKNOWN) |
| 160 | return 0; | 158 | return 0; |
| 161 | 159 | ||
| 162 | /* | 160 | /* |
| 163 | * Initialise and allocate the transmit and temporary | 161 | * Initialise and allocate the transmit and temporary |
| 164 | * buffer. | 162 | * buffer. |
| 165 | */ | 163 | */ |
| 166 | if (!info->xmit.buf) { | 164 | if (!state->xmit.buf) { |
| 167 | /* This is protected by the per port mutex */ | 165 | /* This is protected by the per port mutex */ |
| 168 | page = get_zeroed_page(GFP_KERNEL); | 166 | page = get_zeroed_page(GFP_KERNEL); |
| 169 | if (!page) | 167 | if (!page) |
| 170 | return -ENOMEM; | 168 | return -ENOMEM; |
| 171 | 169 | ||
| 172 | info->xmit.buf = (unsigned char *) page; | 170 | state->xmit.buf = (unsigned char *) page; |
| 173 | uart_circ_clear(&info->xmit); | 171 | uart_circ_clear(&state->xmit); |
| 174 | } | 172 | } |
| 175 | 173 | ||
| 176 | retval = port->ops->startup(port); | 174 | retval = uport->ops->startup(uport); |
| 177 | if (retval == 0) { | 175 | if (retval == 0) { |
| 178 | if (init_hw) { | 176 | if (init_hw) { |
| 179 | /* | 177 | /* |
| @@ -185,20 +183,20 @@ static int uart_startup(struct uart_state *state, int init_hw) | |||
| 185 | * Setup the RTS and DTR signals once the | 183 | * Setup the RTS and DTR signals once the |
| 186 | * port is open and ready to respond. | 184 | * port is open and ready to respond. |
| 187 | */ | 185 | */ |
| 188 | if (info->port.tty->termios->c_cflag & CBAUD) | 186 | if (port->tty->termios->c_cflag & CBAUD) |
| 189 | uart_set_mctrl(port, TIOCM_RTS | TIOCM_DTR); | 187 | uart_set_mctrl(uport, TIOCM_RTS | TIOCM_DTR); |
| 190 | } | 188 | } |
| 191 | 189 | ||
| 192 | if (info->flags & UIF_CTS_FLOW) { | 190 | if (port->flags & ASYNC_CTS_FLOW) { |
| 193 | spin_lock_irq(&port->lock); | 191 | spin_lock_irq(&uport->lock); |
| 194 | if (!(port->ops->get_mctrl(port) & TIOCM_CTS)) | 192 | if (!(uport->ops->get_mctrl(uport) & TIOCM_CTS)) |
| 195 | info->port.tty->hw_stopped = 1; | 193 | port->tty->hw_stopped = 1; |
| 196 | spin_unlock_irq(&port->lock); | 194 | spin_unlock_irq(&uport->lock); |
| 197 | } | 195 | } |
| 198 | 196 | ||
| 199 | info->flags |= UIF_INITIALIZED; | 197 | set_bit(ASYNCB_INITIALIZED, &port->flags); |
| 200 | 198 | ||
| 201 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | 199 | clear_bit(TTY_IO_ERROR, &port->tty->flags); |
| 202 | } | 200 | } |
| 203 | 201 | ||
| 204 | if (retval && capable(CAP_SYS_ADMIN)) | 202 | if (retval && capable(CAP_SYS_ADMIN)) |
| @@ -214,9 +212,9 @@ static int uart_startup(struct uart_state *state, int init_hw) | |||
| 214 | */ | 212 | */ |
| 215 | static void uart_shutdown(struct uart_state *state) | 213 | static void uart_shutdown(struct uart_state *state) |
| 216 | { | 214 | { |
| 217 | struct uart_info *info = &state->info; | 215 | struct uart_port *uport = state->uart_port; |
| 218 | struct uart_port *port = state->port; | 216 | struct tty_port *port = &state->port; |
| 219 | struct tty_struct *tty = info->port.tty; | 217 | struct tty_struct *tty = port->tty; |
| 220 | 218 | ||
| 221 | /* | 219 | /* |
| 222 | * Set the TTY IO error marker | 220 | * Set the TTY IO error marker |
| @@ -224,14 +222,12 @@ static void uart_shutdown(struct uart_state *state) | |||
| 224 | if (tty) | 222 | if (tty) |
| 225 | set_bit(TTY_IO_ERROR, &tty->flags); | 223 | set_bit(TTY_IO_ERROR, &tty->flags); |
| 226 | 224 | ||
| 227 | if (info->flags & UIF_INITIALIZED) { | 225 | if (test_and_clear_bit(ASYNCB_INITIALIZED, &port->flags)) { |
| 228 | info->flags &= ~UIF_INITIALIZED; | ||
| 229 | |||
| 230 | /* | 226 | /* |
| 231 | * Turn off DTR and RTS early. | 227 | * Turn off DTR and RTS early. |
| 232 | */ | 228 | */ |
| 233 | if (!tty || (tty->termios->c_cflag & HUPCL)) | 229 | if (!tty || (tty->termios->c_cflag & HUPCL)) |
| 234 | uart_clear_mctrl(port, TIOCM_DTR | TIOCM_RTS); | 230 | uart_clear_mctrl(uport, TIOCM_DTR | TIOCM_RTS); |
| 235 | 231 | ||
| 236 | /* | 232 | /* |
| 237 | * clear delta_msr_wait queue to avoid mem leaks: we may free | 233 | * clear delta_msr_wait queue to avoid mem leaks: we may free |
| @@ -240,30 +236,30 @@ static void uart_shutdown(struct uart_state *state) | |||
| 240 | * any outstanding file descriptors should be pointing at | 236 | * any outstanding file descriptors should be pointing at |
| 241 | * hung_up_tty_fops now. | 237 | * hung_up_tty_fops now. |
| 242 | */ | 238 | */ |
| 243 | wake_up_interruptible(&info->delta_msr_wait); | 239 | wake_up_interruptible(&port->delta_msr_wait); |
| 244 | 240 | ||
| 245 | /* | 241 | /* |
| 246 | * Free the IRQ and disable the port. | 242 | * Free the IRQ and disable the port. |
| 247 | */ | 243 | */ |
| 248 | port->ops->shutdown(port); | 244 | uport->ops->shutdown(uport); |
| 249 | 245 | ||
| 250 | /* | 246 | /* |
| 251 | * Ensure that the IRQ handler isn't running on another CPU. | 247 | * Ensure that the IRQ handler isn't running on another CPU. |
| 252 | */ | 248 | */ |
| 253 | synchronize_irq(port->irq); | 249 | synchronize_irq(uport->irq); |
| 254 | } | 250 | } |
| 255 | 251 | ||
| 256 | /* | 252 | /* |
| 257 | * kill off our tasklet | 253 | * kill off our tasklet |
| 258 | */ | 254 | */ |
| 259 | tasklet_kill(&info->tlet); | 255 | tasklet_kill(&state->tlet); |
| 260 | 256 | ||
| 261 | /* | 257 | /* |
| 262 | * Free the transmit buffer page. | 258 | * Free the transmit buffer page. |
| 263 | */ | 259 | */ |
| 264 | if (info->xmit.buf) { | 260 | if (state->xmit.buf) { |
| 265 | free_page((unsigned long)info->xmit.buf); | 261 | free_page((unsigned long)state->xmit.buf); |
| 266 | info->xmit.buf = NULL; | 262 | state->xmit.buf = NULL; |
| 267 | } | 263 | } |
| 268 | } | 264 | } |
| 269 | 265 | ||
| @@ -430,15 +426,16 @@ EXPORT_SYMBOL(uart_get_divisor); | |||
| 430 | static void | 426 | static void |
| 431 | uart_change_speed(struct uart_state *state, struct ktermios *old_termios) | 427 | uart_change_speed(struct uart_state *state, struct ktermios *old_termios) |
| 432 | { | 428 | { |
| 433 | struct tty_struct *tty = state->info.port.tty; | 429 | struct tty_port *port = &state->port; |
| 434 | struct uart_port *port = state->port; | 430 | struct tty_struct *tty = port->tty; |
| 431 | struct uart_port *uport = state->uart_port; | ||
| 435 | struct ktermios *termios; | 432 | struct ktermios *termios; |
| 436 | 433 | ||
| 437 | /* | 434 | /* |
| 438 | * If we have no tty, termios, or the port does not exist, | 435 | * If we have no tty, termios, or the port does not exist, |
| 439 | * then we can't set the parameters for this port. | 436 | * then we can't set the parameters for this port. |
| 440 | */ | 437 | */ |
| 441 | if (!tty || !tty->termios || port->type == PORT_UNKNOWN) | 438 | if (!tty || !tty->termios || uport->type == PORT_UNKNOWN) |
| 442 | return; | 439 | return; |
| 443 | 440 | ||
| 444 | termios = tty->termios; | 441 | termios = tty->termios; |
| @@ -447,16 +444,16 @@ uart_change_speed(struct uart_state *state, struct ktermios *old_termios) | |||
| 447 | * Set flags based on termios cflag | 444 | * Set flags based on termios cflag |
| 448 | */ | 445 | */ |
| 449 | if (termios->c_cflag & CRTSCTS) | 446 | if (termios->c_cflag & CRTSCTS) |
| 450 | state->info.flags |= UIF_CTS_FLOW; | 447 | set_bit(ASYNCB_CTS_FLOW, &port->flags); |
| 451 | else | 448 | else |
| 452 | state->info.flags &= ~UIF_CTS_FLOW; | 449 | clear_bit(ASYNCB_CTS_FLOW, &port->flags); |
| 453 | 450 | ||
| 454 | if (termios->c_cflag & CLOCAL) | 451 | if (termios->c_cflag & CLOCAL) |
| 455 | state->info.flags &= ~UIF_CHECK_CD; | 452 | clear_bit(ASYNCB_CHECK_CD, &port->flags); |
| 456 | else | 453 | else |
| 457 | state->info.flags |= UIF_CHECK_CD; | 454 | set_bit(ASYNCB_CHECK_CD, &port->flags); |
| 458 | 455 | ||
| 459 | port->ops->set_termios(port, termios, old_termios); | 456 | uport->ops->set_termios(uport, termios, old_termios); |
| 460 | } | 457 | } |
| 461 | 458 | ||
| 462 | static inline int | 459 | static inline int |
| @@ -482,7 +479,7 @@ static int uart_put_char(struct tty_struct *tty, unsigned char ch) | |||
| 482 | { | 479 | { |
| 483 | struct uart_state *state = tty->driver_data; | 480 | struct uart_state *state = tty->driver_data; |
| 484 | 481 | ||
| 485 | return __uart_put_char(state->port, &state->info.xmit, ch); | 482 | return __uart_put_char(state->uart_port, &state->xmit, ch); |
| 486 | } | 483 | } |
| 487 | 484 | ||
| 488 | static void uart_flush_chars(struct tty_struct *tty) | 485 | static void uart_flush_chars(struct tty_struct *tty) |
| @@ -508,8 +505,8 @@ uart_write(struct tty_struct *tty, const unsigned char *buf, int count) | |||
| 508 | return -EL3HLT; | 505 | return -EL3HLT; |
| 509 | } | 506 | } |
| 510 | 507 | ||
| 511 | port = state->port; | 508 | port = state->uart_port; |
| 512 | circ = &state->info.xmit; | 509 | circ = &state->xmit; |
| 513 | 510 | ||
| 514 | if (!circ->buf) | 511 | if (!circ->buf) |
| 515 | return 0; | 512 | return 0; |
| @@ -539,9 +536,9 @@ static int uart_write_room(struct tty_struct *tty) | |||
| 539 | unsigned long flags; | 536 | unsigned long flags; |
| 540 | int ret; | 537 | int ret; |
| 541 | 538 | ||
| 542 | spin_lock_irqsave(&state->port->lock, flags); | 539 | spin_lock_irqsave(&state->uart_port->lock, flags); |
| 543 | ret = uart_circ_chars_free(&state->info.xmit); | 540 | ret = uart_circ_chars_free(&state->xmit); |
| 544 | spin_unlock_irqrestore(&state->port->lock, flags); | 541 | spin_unlock_irqrestore(&state->uart_port->lock, flags); |
| 545 | return ret; | 542 | return ret; |
| 546 | } | 543 | } |
| 547 | 544 | ||
| @@ -551,9 +548,9 @@ static int uart_chars_in_buffer(struct tty_struct *tty) | |||
| 551 | unsigned long flags; | 548 | unsigned long flags; |
| 552 | int ret; | 549 | int ret; |
| 553 | 550 | ||
| 554 | spin_lock_irqsave(&state->port->lock, flags); | 551 | spin_lock_irqsave(&state->uart_port->lock, flags); |
| 555 | ret = uart_circ_chars_pending(&state->info.xmit); | 552 | ret = uart_circ_chars_pending(&state->xmit); |
| 556 | spin_unlock_irqrestore(&state->port->lock, flags); | 553 | spin_unlock_irqrestore(&state->uart_port->lock, flags); |
| 557 | return ret; | 554 | return ret; |
| 558 | } | 555 | } |
| 559 | 556 | ||
| @@ -572,11 +569,11 @@ static void uart_flush_buffer(struct tty_struct *tty) | |||
| 572 | return; | 569 | return; |
| 573 | } | 570 | } |
| 574 | 571 | ||
| 575 | port = state->port; | 572 | port = state->uart_port; |
| 576 | pr_debug("uart_flush_buffer(%d) called\n", tty->index); | 573 | pr_debug("uart_flush_buffer(%d) called\n", tty->index); |
| 577 | 574 | ||
| 578 | spin_lock_irqsave(&port->lock, flags); | 575 | spin_lock_irqsave(&port->lock, flags); |
| 579 | uart_circ_clear(&state->info.xmit); | 576 | uart_circ_clear(&state->xmit); |
| 580 | if (port->ops->flush_buffer) | 577 | if (port->ops->flush_buffer) |
| 581 | port->ops->flush_buffer(port); | 578 | port->ops->flush_buffer(port); |
| 582 | spin_unlock_irqrestore(&port->lock, flags); | 579 | spin_unlock_irqrestore(&port->lock, flags); |
| @@ -590,7 +587,7 @@ static void uart_flush_buffer(struct tty_struct *tty) | |||
| 590 | static void uart_send_xchar(struct tty_struct *tty, char ch) | 587 | static void uart_send_xchar(struct tty_struct *tty, char ch) |
| 591 | { | 588 | { |
| 592 | struct uart_state *state = tty->driver_data; | 589 | struct uart_state *state = tty->driver_data; |
| 593 | struct uart_port *port = state->port; | 590 | struct uart_port *port = state->uart_port; |
| 594 | unsigned long flags; | 591 | unsigned long flags; |
| 595 | 592 | ||
| 596 | if (port->ops->send_xchar) | 593 | if (port->ops->send_xchar) |
| @@ -613,13 +610,13 @@ static void uart_throttle(struct tty_struct *tty) | |||
| 613 | uart_send_xchar(tty, STOP_CHAR(tty)); | 610 | uart_send_xchar(tty, STOP_CHAR(tty)); |
| 614 | 611 | ||
| 615 | if (tty->termios->c_cflag & CRTSCTS) | 612 | if (tty->termios->c_cflag & CRTSCTS) |
| 616 | uart_clear_mctrl(state->port, TIOCM_RTS); | 613 | uart_clear_mctrl(state->uart_port, TIOCM_RTS); |
| 617 | } | 614 | } |
| 618 | 615 | ||
| 619 | static void uart_unthrottle(struct tty_struct *tty) | 616 | static void uart_unthrottle(struct tty_struct *tty) |
| 620 | { | 617 | { |
| 621 | struct uart_state *state = tty->driver_data; | 618 | struct uart_state *state = tty->driver_data; |
| 622 | struct uart_port *port = state->port; | 619 | struct uart_port *port = state->uart_port; |
| 623 | 620 | ||
| 624 | if (I_IXOFF(tty)) { | 621 | if (I_IXOFF(tty)) { |
| 625 | if (port->x_char) | 622 | if (port->x_char) |
| @@ -635,35 +632,36 @@ static void uart_unthrottle(struct tty_struct *tty) | |||
| 635 | static int uart_get_info(struct uart_state *state, | 632 | static int uart_get_info(struct uart_state *state, |
| 636 | struct serial_struct __user *retinfo) | 633 | struct serial_struct __user *retinfo) |
| 637 | { | 634 | { |
| 638 | struct uart_port *port = state->port; | 635 | struct uart_port *uport = state->uart_port; |
| 636 | struct tty_port *port = &state->port; | ||
| 639 | struct serial_struct tmp; | 637 | struct serial_struct tmp; |
| 640 | 638 | ||
| 641 | memset(&tmp, 0, sizeof(tmp)); | 639 | memset(&tmp, 0, sizeof(tmp)); |
| 642 | 640 | ||
| 643 | /* Ensure the state we copy is consistent and no hardware changes | 641 | /* Ensure the state we copy is consistent and no hardware changes |
| 644 | occur as we go */ | 642 | occur as we go */ |
| 645 | mutex_lock(&state->mutex); | 643 | mutex_lock(&port->mutex); |
| 646 | 644 | ||
| 647 | tmp.type = port->type; | 645 | tmp.type = uport->type; |
| 648 | tmp.line = port->line; | 646 | tmp.line = uport->line; |
| 649 | tmp.port = port->iobase; | 647 | tmp.port = uport->iobase; |
| 650 | if (HIGH_BITS_OFFSET) | 648 | if (HIGH_BITS_OFFSET) |
| 651 | tmp.port_high = (long) port->iobase >> HIGH_BITS_OFFSET; | 649 | tmp.port_high = (long) uport->iobase >> HIGH_BITS_OFFSET; |
| 652 | tmp.irq = port->irq; | 650 | tmp.irq = uport->irq; |
| 653 | tmp.flags = port->flags; | 651 | tmp.flags = uport->flags; |
| 654 | tmp.xmit_fifo_size = port->fifosize; | 652 | tmp.xmit_fifo_size = uport->fifosize; |
| 655 | tmp.baud_base = port->uartclk / 16; | 653 | tmp.baud_base = uport->uartclk / 16; |
| 656 | tmp.close_delay = state->close_delay / 10; | 654 | tmp.close_delay = port->close_delay / 10; |
| 657 | tmp.closing_wait = state->closing_wait == USF_CLOSING_WAIT_NONE ? | 655 | tmp.closing_wait = port->closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
| 658 | ASYNC_CLOSING_WAIT_NONE : | 656 | ASYNC_CLOSING_WAIT_NONE : |
| 659 | state->closing_wait / 10; | 657 | port->closing_wait / 10; |
| 660 | tmp.custom_divisor = port->custom_divisor; | 658 | tmp.custom_divisor = uport->custom_divisor; |
| 661 | tmp.hub6 = port->hub6; | 659 | tmp.hub6 = uport->hub6; |
| 662 | tmp.io_type = port->iotype; | 660 | tmp.io_type = uport->iotype; |
| 663 | tmp.iomem_reg_shift = port->regshift; | 661 | tmp.iomem_reg_shift = uport->regshift; |
| 664 | tmp.iomem_base = (void *)(unsigned long)port->mapbase; | 662 | tmp.iomem_base = (void *)(unsigned long)uport->mapbase; |
| 665 | 663 | ||
| 666 | mutex_unlock(&state->mutex); | 664 | mutex_unlock(&port->mutex); |
| 667 | 665 | ||
| 668 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | 666 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) |
| 669 | return -EFAULT; | 667 | return -EFAULT; |
| @@ -674,7 +672,8 @@ static int uart_set_info(struct uart_state *state, | |||
| 674 | struct serial_struct __user *newinfo) | 672 | struct serial_struct __user *newinfo) |
| 675 | { | 673 | { |
| 676 | struct serial_struct new_serial; | 674 | struct serial_struct new_serial; |
| 677 | struct uart_port *port = state->port; | 675 | struct uart_port *uport = state->uart_port; |
| 676 | struct tty_port *port = &state->port; | ||
| 678 | unsigned long new_port; | 677 | unsigned long new_port; |
| 679 | unsigned int change_irq, change_port, closing_wait; | 678 | unsigned int change_irq, change_port, closing_wait; |
| 680 | unsigned int old_custom_divisor, close_delay; | 679 | unsigned int old_custom_divisor, close_delay; |
| @@ -691,58 +690,58 @@ static int uart_set_info(struct uart_state *state, | |||
| 691 | new_serial.irq = irq_canonicalize(new_serial.irq); | 690 | new_serial.irq = irq_canonicalize(new_serial.irq); |
| 692 | close_delay = new_serial.close_delay * 10; | 691 | close_delay = new_serial.close_delay * 10; |
| 693 | closing_wait = new_serial.closing_wait == ASYNC_CLOSING_WAIT_NONE ? | 692 | closing_wait = new_serial.closing_wait == ASYNC_CLOSING_WAIT_NONE ? |
| 694 | USF_CLOSING_WAIT_NONE : new_serial.closing_wait * 10; | 693 | ASYNC_CLOSING_WAIT_NONE : new_serial.closing_wait * 10; |
| 695 | 694 | ||
| 696 | /* | 695 | /* |
| 697 | * This semaphore protects state->count. It is also | 696 | * This semaphore protects port->count. It is also |
| 698 | * very useful to prevent opens. Also, take the | 697 | * very useful to prevent opens. Also, take the |
| 699 | * port configuration semaphore to make sure that a | 698 | * port configuration semaphore to make sure that a |
| 700 | * module insertion/removal doesn't change anything | 699 | * module insertion/removal doesn't change anything |
| 701 | * under us. | 700 | * under us. |
| 702 | */ | 701 | */ |
| 703 | mutex_lock(&state->mutex); | 702 | mutex_lock(&port->mutex); |
| 704 | 703 | ||
| 705 | change_irq = !(port->flags & UPF_FIXED_PORT) | 704 | change_irq = !(uport->flags & UPF_FIXED_PORT) |
| 706 | && new_serial.irq != port->irq; | 705 | && new_serial.irq != uport->irq; |
| 707 | 706 | ||
| 708 | /* | 707 | /* |
| 709 | * Since changing the 'type' of the port changes its resource | 708 | * Since changing the 'type' of the port changes its resource |
| 710 | * allocations, we should treat type changes the same as | 709 | * allocations, we should treat type changes the same as |
| 711 | * IO port changes. | 710 | * IO port changes. |
| 712 | */ | 711 | */ |
| 713 | change_port = !(port->flags & UPF_FIXED_PORT) | 712 | change_port = !(uport->flags & UPF_FIXED_PORT) |
| 714 | && (new_port != port->iobase || | 713 | && (new_port != uport->iobase || |
| 715 | (unsigned long)new_serial.iomem_base != port->mapbase || | 714 | (unsigned long)new_serial.iomem_base != uport->mapbase || |
| 716 | new_serial.hub6 != port->hub6 || | 715 | new_serial.hub6 != uport->hub6 || |
| 717 | new_serial.io_type != port->iotype || | 716 | new_serial.io_type != uport->iotype || |
| 718 | new_serial.iomem_reg_shift != port->regshift || | 717 | new_serial.iomem_reg_shift != uport->regshift || |
| 719 | new_serial.type != port->type); | 718 | new_serial.type != uport->type); |
| 720 | 719 | ||
| 721 | old_flags = port->flags; | 720 | old_flags = uport->flags; |
| 722 | new_flags = new_serial.flags; | 721 | new_flags = new_serial.flags; |
| 723 | old_custom_divisor = port->custom_divisor; | 722 | old_custom_divisor = uport->custom_divisor; |
| 724 | 723 | ||
| 725 | if (!capable(CAP_SYS_ADMIN)) { | 724 | if (!capable(CAP_SYS_ADMIN)) { |
| 726 | retval = -EPERM; | 725 | retval = -EPERM; |
| 727 | if (change_irq || change_port || | 726 | if (change_irq || change_port || |
| 728 | (new_serial.baud_base != port->uartclk / 16) || | 727 | (new_serial.baud_base != uport->uartclk / 16) || |
| 729 | (close_delay != state->close_delay) || | 728 | (close_delay != port->close_delay) || |
| 730 | (closing_wait != state->closing_wait) || | 729 | (closing_wait != port->closing_wait) || |
| 731 | (new_serial.xmit_fifo_size && | 730 | (new_serial.xmit_fifo_size && |
| 732 | new_serial.xmit_fifo_size != port->fifosize) || | 731 | new_serial.xmit_fifo_size != uport->fifosize) || |
| 733 | (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0)) | 732 | (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0)) |
| 734 | goto exit; | 733 | goto exit; |
| 735 | port->flags = ((port->flags & ~UPF_USR_MASK) | | 734 | uport->flags = ((uport->flags & ~UPF_USR_MASK) | |
| 736 | (new_flags & UPF_USR_MASK)); | 735 | (new_flags & UPF_USR_MASK)); |
| 737 | port->custom_divisor = new_serial.custom_divisor; | 736 | uport->custom_divisor = new_serial.custom_divisor; |
| 738 | goto check_and_exit; | 737 | goto check_and_exit; |
| 739 | } | 738 | } |
| 740 | 739 | ||
| 741 | /* | 740 | /* |
| 742 | * Ask the low level driver to verify the settings. | 741 | * Ask the low level driver to verify the settings. |
| 743 | */ | 742 | */ |
| 744 | if (port->ops->verify_port) | 743 | if (uport->ops->verify_port) |
| 745 | retval = port->ops->verify_port(port, &new_serial); | 744 | retval = uport->ops->verify_port(uport, &new_serial); |
| 746 | 745 | ||
| 747 | if ((new_serial.irq >= nr_irqs) || (new_serial.irq < 0) || | 746 | if ((new_serial.irq >= nr_irqs) || (new_serial.irq < 0) || |
| 748 | (new_serial.baud_base < 9600)) | 747 | (new_serial.baud_base < 9600)) |
| @@ -757,7 +756,7 @@ static int uart_set_info(struct uart_state *state, | |||
| 757 | /* | 756 | /* |
| 758 | * Make sure that we are the sole user of this port. | 757 | * Make sure that we are the sole user of this port. |
| 759 | */ | 758 | */ |
| 760 | if (uart_users(state) > 1) | 759 | if (tty_port_users(port) > 1) |
| 761 | goto exit; | 760 | goto exit; |
| 762 | 761 | ||
| 763 | /* | 762 | /* |
| @@ -771,31 +770,31 @@ static int uart_set_info(struct uart_state *state, | |||
| 771 | unsigned long old_iobase, old_mapbase; | 770 | unsigned long old_iobase, old_mapbase; |
| 772 | unsigned int old_type, old_iotype, old_hub6, old_shift; | 771 | unsigned int old_type, old_iotype, old_hub6, old_shift; |
| 773 | 772 | ||
| 774 | old_iobase = port->iobase; | 773 | old_iobase = uport->iobase; |
| 775 | old_mapbase = port->mapbase; | 774 | old_mapbase = uport->mapbase; |
| 776 | old_type = port->type; | 775 | old_type = uport->type; |
| 777 | old_hub6 = port->hub6; | 776 | old_hub6 = uport->hub6; |
| 778 | old_iotype = port->iotype; | 777 | old_iotype = uport->iotype; |
| 779 | old_shift = port->regshift; | 778 | old_shift = uport->regshift; |
| 780 | 779 | ||
| 781 | /* | 780 | /* |
| 782 | * Free and release old regions | 781 | * Free and release old regions |
| 783 | */ | 782 | */ |
| 784 | if (old_type != PORT_UNKNOWN) | 783 | if (old_type != PORT_UNKNOWN) |
| 785 | port->ops->release_port(port); | 784 | uport->ops->release_port(uport); |
| 786 | 785 | ||
| 787 | port->iobase = new_port; | 786 | uport->iobase = new_port; |
| 788 | port->type = new_serial.type; | 787 | uport->type = new_serial.type; |
| 789 | port->hub6 = new_serial.hub6; | 788 | uport->hub6 = new_serial.hub6; |
| 790 | port->iotype = new_serial.io_type; | 789 | uport->iotype = new_serial.io_type; |
| 791 | port->regshift = new_serial.iomem_reg_shift; | 790 | uport->regshift = new_serial.iomem_reg_shift; |
| 792 | port->mapbase = (unsigned long)new_serial.iomem_base; | 791 | uport->mapbase = (unsigned long)new_serial.iomem_base; |
| 793 | 792 | ||
| 794 | /* | 793 | /* |
| 795 | * Claim and map the new regions | 794 | * Claim and map the new regions |
| 796 | */ | 795 | */ |
| 797 | if (port->type != PORT_UNKNOWN) { | 796 | if (uport->type != PORT_UNKNOWN) { |
| 798 | retval = port->ops->request_port(port); | 797 | retval = uport->ops->request_port(uport); |
| 799 | } else { | 798 | } else { |
| 800 | /* Always success - Jean II */ | 799 | /* Always success - Jean II */ |
| 801 | retval = 0; | 800 | retval = 0; |
| @@ -806,19 +805,19 @@ static int uart_set_info(struct uart_state *state, | |||
| 806 | * new port, try to restore the old settings. | 805 | * new port, try to restore the old settings. |
| 807 | */ | 806 | */ |
| 808 | if (retval && old_type != PORT_UNKNOWN) { | 807 | if (retval && old_type != PORT_UNKNOWN) { |
| 809 | port->iobase = old_iobase; | 808 | uport->iobase = old_iobase; |
| 810 | port->type = old_type; | 809 | uport->type = old_type; |
| 811 | port->hub6 = old_hub6; | 810 | uport->hub6 = old_hub6; |
| 812 | port->iotype = old_iotype; | 811 | uport->iotype = old_iotype; |
| 813 | port->regshift = old_shift; | 812 | uport->regshift = old_shift; |
| 814 | port->mapbase = old_mapbase; | 813 | uport->mapbase = old_mapbase; |
| 815 | retval = port->ops->request_port(port); | 814 | retval = uport->ops->request_port(uport); |
| 816 | /* | 815 | /* |
| 817 | * If we failed to restore the old settings, | 816 | * If we failed to restore the old settings, |
| 818 | * we fail like this. | 817 | * we fail like this. |
| 819 | */ | 818 | */ |
| 820 | if (retval) | 819 | if (retval) |
| 821 | port->type = PORT_UNKNOWN; | 820 | uport->type = PORT_UNKNOWN; |
| 822 | 821 | ||
| 823 | /* | 822 | /* |
| 824 | * We failed anyway. | 823 | * We failed anyway. |
| @@ -830,45 +829,45 @@ static int uart_set_info(struct uart_state *state, | |||
| 830 | } | 829 | } |
| 831 | 830 | ||
| 832 | if (change_irq) | 831 | if (change_irq) |
| 833 | port->irq = new_serial.irq; | 832 | uport->irq = new_serial.irq; |
| 834 | if (!(port->flags & UPF_FIXED_PORT)) | 833 | if (!(uport->flags & UPF_FIXED_PORT)) |
| 835 | port->uartclk = new_serial.baud_base * 16; | 834 | uport->uartclk = new_serial.baud_base * 16; |
| 836 | port->flags = (port->flags & ~UPF_CHANGE_MASK) | | 835 | uport->flags = (uport->flags & ~UPF_CHANGE_MASK) | |
| 837 | (new_flags & UPF_CHANGE_MASK); | 836 | (new_flags & UPF_CHANGE_MASK); |
| 838 | port->custom_divisor = new_serial.custom_divisor; | 837 | uport->custom_divisor = new_serial.custom_divisor; |
| 839 | state->close_delay = close_delay; | 838 | port->close_delay = close_delay; |
| 840 | state->closing_wait = closing_wait; | 839 | port->closing_wait = closing_wait; |
| 841 | if (new_serial.xmit_fifo_size) | 840 | if (new_serial.xmit_fifo_size) |
| 842 | port->fifosize = new_serial.xmit_fifo_size; | 841 | uport->fifosize = new_serial.xmit_fifo_size; |
| 843 | if (state->info.port.tty) | 842 | if (port->tty) |
| 844 | state->info.port.tty->low_latency = | 843 | port->tty->low_latency = |
| 845 | (port->flags & UPF_LOW_LATENCY) ? 1 : 0; | 844 | (uport->flags & UPF_LOW_LATENCY) ? 1 : 0; |
| 846 | 845 | ||
| 847 | check_and_exit: | 846 | check_and_exit: |
| 848 | retval = 0; | 847 | retval = 0; |
| 849 | if (port->type == PORT_UNKNOWN) | 848 | if (uport->type == PORT_UNKNOWN) |
| 850 | goto exit; | 849 | goto exit; |
| 851 | if (state->info.flags & UIF_INITIALIZED) { | 850 | if (port->flags & ASYNC_INITIALIZED) { |
| 852 | if (((old_flags ^ port->flags) & UPF_SPD_MASK) || | 851 | if (((old_flags ^ uport->flags) & UPF_SPD_MASK) || |
| 853 | old_custom_divisor != port->custom_divisor) { | 852 | old_custom_divisor != uport->custom_divisor) { |
| 854 | /* | 853 | /* |
| 855 | * If they're setting up a custom divisor or speed, | 854 | * If they're setting up a custom divisor or speed, |
| 856 | * instead of clearing it, then bitch about it. No | 855 | * instead of clearing it, then bitch about it. No |
| 857 | * need to rate-limit; it's CAP_SYS_ADMIN only. | 856 | * need to rate-limit; it's CAP_SYS_ADMIN only. |
| 858 | */ | 857 | */ |
| 859 | if (port->flags & UPF_SPD_MASK) { | 858 | if (uport->flags & UPF_SPD_MASK) { |
| 860 | char buf[64]; | 859 | char buf[64]; |
| 861 | printk(KERN_NOTICE | 860 | printk(KERN_NOTICE |
| 862 | "%s sets custom speed on %s. This " | 861 | "%s sets custom speed on %s. This " |
| 863 | "is deprecated.\n", current->comm, | 862 | "is deprecated.\n", current->comm, |
| 864 | tty_name(state->info.port.tty, buf)); | 863 | tty_name(port->tty, buf)); |
| 865 | } | 864 | } |
| 866 | uart_change_speed(state, NULL); | 865 | uart_change_speed(state, NULL); |
| 867 | } | 866 | } |
| 868 | } else | 867 | } else |
| 869 | retval = uart_startup(state, 1); | 868 | retval = uart_startup(state, 1); |
| 870 | exit: | 869 | exit: |
| 871 | mutex_unlock(&state->mutex); | 870 | mutex_unlock(&port->mutex); |
| 872 | return retval; | 871 | return retval; |
| 873 | } | 872 | } |
| 874 | 873 | ||
| @@ -880,10 +879,11 @@ static int uart_set_info(struct uart_state *state, | |||
| 880 | static int uart_get_lsr_info(struct uart_state *state, | 879 | static int uart_get_lsr_info(struct uart_state *state, |
| 881 | unsigned int __user *value) | 880 | unsigned int __user *value) |
| 882 | { | 881 | { |
| 883 | struct uart_port *port = state->port; | 882 | struct uart_port *uport = state->uart_port; |
| 883 | struct tty_port *port = &state->port; | ||
| 884 | unsigned int result; | 884 | unsigned int result; |
| 885 | 885 | ||
| 886 | result = port->ops->tx_empty(port); | 886 | result = uport->ops->tx_empty(uport); |
| 887 | 887 | ||
| 888 | /* | 888 | /* |
| 889 | * If we're about to load something into the transmit | 889 | * If we're about to load something into the transmit |
| @@ -891,9 +891,9 @@ static int uart_get_lsr_info(struct uart_state *state, | |||
| 891 | * avoid a race condition (depending on when the transmit | 891 | * avoid a race condition (depending on when the transmit |
| 892 | * interrupt happens). | 892 | * interrupt happens). |
| 893 | */ | 893 | */ |
| 894 | if (port->x_char || | 894 | if (uport->x_char || |
| 895 | ((uart_circ_chars_pending(&state->info.xmit) > 0) && | 895 | ((uart_circ_chars_pending(&state->xmit) > 0) && |
| 896 | !state->info.port.tty->stopped && !state->info.port.tty->hw_stopped)) | 896 | !port->tty->stopped && !port->tty->hw_stopped)) |
| 897 | result &= ~TIOCSER_TEMT; | 897 | result &= ~TIOCSER_TEMT; |
| 898 | 898 | ||
| 899 | return put_user(result, value); | 899 | return put_user(result, value); |
| @@ -902,19 +902,20 @@ static int uart_get_lsr_info(struct uart_state *state, | |||
| 902 | static int uart_tiocmget(struct tty_struct *tty, struct file *file) | 902 | static int uart_tiocmget(struct tty_struct *tty, struct file *file) |
| 903 | { | 903 | { |
| 904 | struct uart_state *state = tty->driver_data; | 904 | struct uart_state *state = tty->driver_data; |
| 905 | struct uart_port *port = state->port; | 905 | struct tty_port *port = &state->port; |
| 906 | struct uart_port *uport = state->uart_port; | ||
| 906 | int result = -EIO; | 907 | int result = -EIO; |
| 907 | 908 | ||
| 908 | mutex_lock(&state->mutex); | 909 | mutex_lock(&port->mutex); |
| 909 | if ((!file || !tty_hung_up_p(file)) && | 910 | if ((!file || !tty_hung_up_p(file)) && |
| 910 | !(tty->flags & (1 << TTY_IO_ERROR))) { | 911 | !(tty->flags & (1 << TTY_IO_ERROR))) { |
| 911 | result = port->mctrl; | 912 | result = uport->mctrl; |
| 912 | 913 | ||
| 913 | spin_lock_irq(&port->lock); | 914 | spin_lock_irq(&uport->lock); |
| 914 | result |= port->ops->get_mctrl(port); | 915 | result |= uport->ops->get_mctrl(uport); |
| 915 | spin_unlock_irq(&port->lock); | 916 | spin_unlock_irq(&uport->lock); |
| 916 | } | 917 | } |
| 917 | mutex_unlock(&state->mutex); | 918 | mutex_unlock(&port->mutex); |
| 918 | 919 | ||
| 919 | return result; | 920 | return result; |
| 920 | } | 921 | } |
| @@ -924,36 +925,39 @@ uart_tiocmset(struct tty_struct *tty, struct file *file, | |||
| 924 | unsigned int set, unsigned int clear) | 925 | unsigned int set, unsigned int clear) |
| 925 | { | 926 | { |
| 926 | struct uart_state *state = tty->driver_data; | 927 | struct uart_state *state = tty->driver_data; |
| 927 | struct uart_port *port = state->port; | 928 | struct uart_port *uport = state->uart_port; |
| 929 | struct tty_port *port = &state->port; | ||
| 928 | int ret = -EIO; | 930 | int ret = -EIO; |
| 929 | 931 | ||
| 930 | mutex_lock(&state->mutex); | 932 | mutex_lock(&port->mutex); |
| 931 | if ((!file || !tty_hung_up_p(file)) && | 933 | if ((!file || !tty_hung_up_p(file)) && |
| 932 | !(tty->flags & (1 << TTY_IO_ERROR))) { | 934 | !(tty->flags & (1 << TTY_IO_ERROR))) { |
| 933 | uart_update_mctrl(port, set, clear); | 935 | uart_update_mctrl(uport, set, clear); |
| 934 | ret = 0; | 936 | ret = 0; |
| 935 | } | 937 | } |
| 936 | mutex_unlock(&state->mutex); | 938 | mutex_unlock(&port->mutex); |
| 937 | return ret; | 939 | return ret; |
| 938 | } | 940 | } |
| 939 | 941 | ||
| 940 | static int uart_break_ctl(struct tty_struct *tty, int break_state) | 942 | static int uart_break_ctl(struct tty_struct *tty, int break_state) |
| 941 | { | 943 | { |
| 942 | struct uart_state *state = tty->driver_data; | 944 | struct uart_state *state = tty->driver_data; |
| 943 | struct uart_port *port = state->port; | 945 | struct tty_port *port = &state->port; |
| 946 | struct uart_port *uport = state->uart_port; | ||
| 944 | 947 | ||
| 945 | mutex_lock(&state->mutex); | 948 | mutex_lock(&port->mutex); |
| 946 | 949 | ||
| 947 | if (port->type != PORT_UNKNOWN) | 950 | if (uport->type != PORT_UNKNOWN) |
| 948 | port->ops->break_ctl(port, break_state); | 951 | uport->ops->break_ctl(uport, break_state); |
| 949 | 952 | ||
| 950 | mutex_unlock(&state->mutex); | 953 | mutex_unlock(&port->mutex); |
| 951 | return 0; | 954 | return 0; |
| 952 | } | 955 | } |
| 953 | 956 | ||
| 954 | static int uart_do_autoconfig(struct uart_state *state) | 957 | static int uart_do_autoconfig(struct uart_state *state) |
| 955 | { | 958 | { |
| 956 | struct uart_port *port = state->port; | 959 | struct uart_port *uport = state->uart_port; |
| 960 | struct tty_port *port = &state->port; | ||
| 957 | int flags, ret; | 961 | int flags, ret; |
| 958 | 962 | ||
| 959 | if (!capable(CAP_SYS_ADMIN)) | 963 | if (!capable(CAP_SYS_ADMIN)) |
| @@ -964,33 +968,33 @@ static int uart_do_autoconfig(struct uart_state *state) | |||
| 964 | * changing, and hence any extra opens of the port while | 968 | * changing, and hence any extra opens of the port while |
| 965 | * we're auto-configuring. | 969 | * we're auto-configuring. |
| 966 | */ | 970 | */ |
| 967 | if (mutex_lock_interruptible(&state->mutex)) | 971 | if (mutex_lock_interruptible(&port->mutex)) |
| 968 | return -ERESTARTSYS; | 972 | return -ERESTARTSYS; |
| 969 | 973 | ||
| 970 | ret = -EBUSY; | 974 | ret = -EBUSY; |
| 971 | if (uart_users(state) == 1) { | 975 | if (tty_port_users(port) == 1) { |
| 972 | uart_shutdown(state); | 976 | uart_shutdown(state); |
| 973 | 977 | ||
| 974 | /* | 978 | /* |
| 975 | * If we already have a port type configured, | 979 | * If we already have a port type configured, |
| 976 | * we must release its resources. | 980 | * we must release its resources. |
| 977 | */ | 981 | */ |
| 978 | if (port->type != PORT_UNKNOWN) | 982 | if (uport->type != PORT_UNKNOWN) |
| 979 | port->ops->release_port(port); | 983 | uport->ops->release_port(uport); |
| 980 | 984 | ||
| 981 | flags = UART_CONFIG_TYPE; | 985 | flags = UART_CONFIG_TYPE; |
| 982 | if (port->flags & UPF_AUTO_IRQ) | 986 | if (uport->flags & UPF_AUTO_IRQ) |
| 983 | flags |= UART_CONFIG_IRQ; | 987 | flags |= UART_CONFIG_IRQ; |
| 984 | 988 | ||
| 985 | /* | 989 | /* |
| 986 | * This will claim the ports resources if | 990 | * This will claim the ports resources if |
| 987 | * a port is found. | 991 | * a port is found. |
| 988 | */ | 992 | */ |
| 989 | port->ops->config_port(port, flags); | 993 | uport->ops->config_port(uport, flags); |
| 990 | 994 | ||
| 991 | ret = uart_startup(state, 1); | 995 | ret = uart_startup(state, 1); |
| 992 | } | 996 | } |
| 993 | mutex_unlock(&state->mutex); | 997 | mutex_unlock(&port->mutex); |
| 994 | return ret; | 998 | return ret; |
| 995 | } | 999 | } |
| 996 | 1000 | ||
| @@ -999,11 +1003,15 @@ static int uart_do_autoconfig(struct uart_state *state) | |||
| 999 | * - mask passed in arg for lines of interest | 1003 | * - mask passed in arg for lines of interest |
| 1000 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | 1004 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) |
| 1001 | * Caller should use TIOCGICOUNT to see which one it was | 1005 | * Caller should use TIOCGICOUNT to see which one it was |
| 1006 | * | ||
| 1007 | * FIXME: This wants extracting into a common all driver implementation | ||
| 1008 | * of TIOCMWAIT using tty_port. | ||
| 1002 | */ | 1009 | */ |
| 1003 | static int | 1010 | static int |
| 1004 | uart_wait_modem_status(struct uart_state *state, unsigned long arg) | 1011 | uart_wait_modem_status(struct uart_state *state, unsigned long arg) |
| 1005 | { | 1012 | { |
| 1006 | struct uart_port *port = state->port; | 1013 | struct uart_port *uport = state->uart_port; |
| 1014 | struct tty_port *port = &state->port; | ||
| 1007 | DECLARE_WAITQUEUE(wait, current); | 1015 | DECLARE_WAITQUEUE(wait, current); |
| 1008 | struct uart_icount cprev, cnow; | 1016 | struct uart_icount cprev, cnow; |
| 1009 | int ret; | 1017 | int ret; |
| @@ -1011,20 +1019,20 @@ uart_wait_modem_status(struct uart_state *state, unsigned long arg) | |||
| 1011 | /* | 1019 | /* |
| 1012 | * note the counters on entry | 1020 | * note the counters on entry |
| 1013 | */ | 1021 | */ |
| 1014 | spin_lock_irq(&port->lock); | 1022 | spin_lock_irq(&uport->lock); |
| 1015 | memcpy(&cprev, &port->icount, sizeof(struct uart_icount)); | 1023 | memcpy(&cprev, &uport->icount, sizeof(struct uart_icount)); |
| 1016 | 1024 | ||
| 1017 | /* | 1025 | /* |
| 1018 | * Force modem status interrupts on | 1026 | * Force modem status interrupts on |
| 1019 | */ | 1027 | */ |
| 1020 | port->ops->enable_ms(port); | 1028 | uport->ops->enable_ms(uport); |
| 1021 | spin_unlock_irq(&port->lock); | 1029 | spin_unlock_irq(&uport->lock); |
| 1022 | 1030 | ||
| 1023 | add_wait_queue(&state->info.delta_msr_wait, &wait); | 1031 | add_wait_queue(&port->delta_msr_wait, &wait); |
| 1024 | for (;;) { | 1032 | for (;;) { |
| 1025 | spin_lock_irq(&port->lock); | 1033 | spin_lock_irq(&uport->lock); |
| 1026 | memcpy(&cnow, &port->icount, sizeof(struct uart_icount)); | 1034 | memcpy(&cnow, &uport->icount, sizeof(struct uart_icount)); |
| 1027 | spin_unlock_irq(&port->lock); | 1035 | spin_unlock_irq(&uport->lock); |
| 1028 | 1036 | ||
| 1029 | set_current_state(TASK_INTERRUPTIBLE); | 1037 | set_current_state(TASK_INTERRUPTIBLE); |
| 1030 | 1038 | ||
| @@ -1048,7 +1056,7 @@ uart_wait_modem_status(struct uart_state *state, unsigned long arg) | |||
| 1048 | } | 1056 | } |
| 1049 | 1057 | ||
| 1050 | current->state = TASK_RUNNING; | 1058 | current->state = TASK_RUNNING; |
| 1051 | remove_wait_queue(&state->info.delta_msr_wait, &wait); | 1059 | remove_wait_queue(&port->delta_msr_wait, &wait); |
| 1052 | 1060 | ||
| 1053 | return ret; | 1061 | return ret; |
| 1054 | } | 1062 | } |
| @@ -1064,11 +1072,11 @@ static int uart_get_count(struct uart_state *state, | |||
| 1064 | { | 1072 | { |
| 1065 | struct serial_icounter_struct icount; | 1073 | struct serial_icounter_struct icount; |
| 1066 | struct uart_icount cnow; | 1074 | struct uart_icount cnow; |
| 1067 | struct uart_port *port = state->port; | 1075 | struct uart_port *uport = state->uart_port; |
| 1068 | 1076 | ||
| 1069 | spin_lock_irq(&port->lock); | 1077 | spin_lock_irq(&uport->lock); |
| 1070 | memcpy(&cnow, &port->icount, sizeof(struct uart_icount)); | 1078 | memcpy(&cnow, &uport->icount, sizeof(struct uart_icount)); |
| 1071 | spin_unlock_irq(&port->lock); | 1079 | spin_unlock_irq(&uport->lock); |
| 1072 | 1080 | ||
| 1073 | icount.cts = cnow.cts; | 1081 | icount.cts = cnow.cts; |
| 1074 | icount.dsr = cnow.dsr; | 1082 | icount.dsr = cnow.dsr; |
| @@ -1093,6 +1101,7 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd, | |||
| 1093 | unsigned long arg) | 1101 | unsigned long arg) |
| 1094 | { | 1102 | { |
| 1095 | struct uart_state *state = tty->driver_data; | 1103 | struct uart_state *state = tty->driver_data; |
| 1104 | struct tty_port *port = &state->port; | ||
| 1096 | void __user *uarg = (void __user *)arg; | 1105 | void __user *uarg = (void __user *)arg; |
| 1097 | int ret = -ENOIOCTLCMD; | 1106 | int ret = -ENOIOCTLCMD; |
| 1098 | 1107 | ||
| @@ -1143,7 +1152,7 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd, | |||
| 1143 | if (ret != -ENOIOCTLCMD) | 1152 | if (ret != -ENOIOCTLCMD) |
| 1144 | goto out; | 1153 | goto out; |
| 1145 | 1154 | ||
| 1146 | mutex_lock(&state->mutex); | 1155 | mutex_lock(&port->mutex); |
| 1147 | 1156 | ||
| 1148 | if (tty_hung_up_p(filp)) { | 1157 | if (tty_hung_up_p(filp)) { |
| 1149 | ret = -EIO; | 1158 | ret = -EIO; |
| @@ -1160,14 +1169,14 @@ uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd, | |||
| 1160 | break; | 1169 | break; |
| 1161 | 1170 | ||
| 1162 | default: { | 1171 | default: { |
| 1163 | struct uart_port *port = state->port; | 1172 | struct uart_port *uport = state->uart_port; |
| 1164 | if (port->ops->ioctl) | 1173 | if (uport->ops->ioctl) |
| 1165 | ret = port->ops->ioctl(port, cmd, arg); | 1174 | ret = uport->ops->ioctl(uport, cmd, arg); |
| 1166 | break; | 1175 | break; |
| 1167 | } | 1176 | } |
| 1168 | } | 1177 | } |
| 1169 | out_up: | 1178 | out_up: |
| 1170 | mutex_unlock(&state->mutex); | 1179 | mutex_unlock(&port->mutex); |
| 1171 | out: | 1180 | out: |
| 1172 | return ret; | 1181 | return ret; |
| 1173 | } | 1182 | } |
| @@ -1175,10 +1184,10 @@ out: | |||
| 1175 | static void uart_set_ldisc(struct tty_struct *tty) | 1184 | static void uart_set_ldisc(struct tty_struct *tty) |
| 1176 | { | 1185 | { |
| 1177 | struct uart_state *state = tty->driver_data; | 1186 | struct uart_state *state = tty->driver_data; |
| 1178 | struct uart_port *port = state->port; | 1187 | struct uart_port *uport = state->uart_port; |
| 1179 | 1188 | ||
| 1180 | if (port->ops->set_ldisc) | 1189 | if (uport->ops->set_ldisc) |
| 1181 | port->ops->set_ldisc(port); | 1190 | uport->ops->set_ldisc(uport); |
| 1182 | } | 1191 | } |
| 1183 | 1192 | ||
| 1184 | static void uart_set_termios(struct tty_struct *tty, | 1193 | static void uart_set_termios(struct tty_struct *tty, |
| @@ -1207,7 +1216,7 @@ static void uart_set_termios(struct tty_struct *tty, | |||
| 1207 | 1216 | ||
| 1208 | /* Handle transition to B0 status */ | 1217 | /* Handle transition to B0 status */ |
| 1209 | if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD)) | 1218 | if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD)) |
| 1210 | uart_clear_mctrl(state->port, TIOCM_RTS | TIOCM_DTR); | 1219 | uart_clear_mctrl(state->uart_port, TIOCM_RTS | TIOCM_DTR); |
| 1211 | 1220 | ||
| 1212 | /* Handle transition away from B0 status */ | 1221 | /* Handle transition away from B0 status */ |
| 1213 | if (!(old_termios->c_cflag & CBAUD) && (cflag & CBAUD)) { | 1222 | if (!(old_termios->c_cflag & CBAUD) && (cflag & CBAUD)) { |
| @@ -1215,25 +1224,25 @@ static void uart_set_termios(struct tty_struct *tty, | |||
| 1215 | if (!(cflag & CRTSCTS) || | 1224 | if (!(cflag & CRTSCTS) || |
| 1216 | !test_bit(TTY_THROTTLED, &tty->flags)) | 1225 | !test_bit(TTY_THROTTLED, &tty->flags)) |
| 1217 | mask |= TIOCM_RTS; | 1226 | mask |= TIOCM_RTS; |
| 1218 | uart_set_mctrl(state->port, mask); | 1227 | uart_set_mctrl(state->uart_port, mask); |
| 1219 | } | 1228 | } |
| 1220 | 1229 | ||
| 1221 | /* Handle turning off CRTSCTS */ | 1230 | /* Handle turning off CRTSCTS */ |
| 1222 | if ((old_termios->c_cflag & CRTSCTS) && !(cflag & CRTSCTS)) { | 1231 | if ((old_termios->c_cflag & CRTSCTS) && !(cflag & CRTSCTS)) { |
| 1223 | spin_lock_irqsave(&state->port->lock, flags); | 1232 | spin_lock_irqsave(&state->uart_port->lock, flags); |
| 1224 | tty->hw_stopped = 0; | 1233 | tty->hw_stopped = 0; |
| 1225 | __uart_start(tty); | 1234 | __uart_start(tty); |
| 1226 | spin_unlock_irqrestore(&state->port->lock, flags); | 1235 | spin_unlock_irqrestore(&state->uart_port->lock, flags); |
| 1227 | } | 1236 | } |
| 1228 | 1237 | ||
| 1229 | /* Handle turning on CRTSCTS */ | 1238 | /* Handle turning on CRTSCTS */ |
| 1230 | if (!(old_termios->c_cflag & CRTSCTS) && (cflag & CRTSCTS)) { | 1239 | if (!(old_termios->c_cflag & CRTSCTS) && (cflag & CRTSCTS)) { |
| 1231 | spin_lock_irqsave(&state->port->lock, flags); | 1240 | spin_lock_irqsave(&state->uart_port->lock, flags); |
| 1232 | if (!(state->port->ops->get_mctrl(state->port) & TIOCM_CTS)) { | 1241 | if (!(state->uart_port->ops->get_mctrl(state->uart_port) & TIOCM_CTS)) { |
| 1233 | tty->hw_stopped = 1; | 1242 | tty->hw_stopped = 1; |
| 1234 | state->port->ops->stop_tx(state->port); | 1243 | state->uart_port->ops->stop_tx(state->uart_port); |
| 1235 | } | 1244 | } |
| 1236 | spin_unlock_irqrestore(&state->port->lock, flags); | 1245 | spin_unlock_irqrestore(&state->uart_port->lock, flags); |
| 1237 | } | 1246 | } |
| 1238 | #if 0 | 1247 | #if 0 |
| 1239 | /* | 1248 | /* |
| @@ -1244,7 +1253,7 @@ static void uart_set_termios(struct tty_struct *tty, | |||
| 1244 | */ | 1253 | */ |
| 1245 | if (!(old_termios->c_cflag & CLOCAL) && | 1254 | if (!(old_termios->c_cflag & CLOCAL) && |
| 1246 | (tty->termios->c_cflag & CLOCAL)) | 1255 | (tty->termios->c_cflag & CLOCAL)) |
| 1247 | wake_up_interruptible(&info->port.open_wait); | 1256 | wake_up_interruptible(&state->uart_port.open_wait); |
| 1248 | #endif | 1257 | #endif |
| 1249 | } | 1258 | } |
| 1250 | 1259 | ||
| @@ -1256,40 +1265,39 @@ static void uart_set_termios(struct tty_struct *tty, | |||
| 1256 | static void uart_close(struct tty_struct *tty, struct file *filp) | 1265 | static void uart_close(struct tty_struct *tty, struct file *filp) |
| 1257 | { | 1266 | { |
| 1258 | struct uart_state *state = tty->driver_data; | 1267 | struct uart_state *state = tty->driver_data; |
| 1259 | struct uart_port *port; | 1268 | struct tty_port *port; |
| 1269 | struct uart_port *uport; | ||
| 1260 | 1270 | ||
| 1261 | BUG_ON(!kernel_locked()); | 1271 | BUG_ON(!kernel_locked()); |
| 1262 | 1272 | ||
| 1263 | if (!state || !state->port) | 1273 | uport = state->uart_port; |
| 1264 | return; | 1274 | port = &state->port; |
| 1265 | 1275 | ||
| 1266 | port = state->port; | 1276 | pr_debug("uart_close(%d) called\n", uport->line); |
| 1267 | 1277 | ||
| 1268 | pr_debug("uart_close(%d) called\n", port->line); | 1278 | mutex_lock(&port->mutex); |
| 1269 | |||
| 1270 | mutex_lock(&state->mutex); | ||
| 1271 | 1279 | ||
| 1272 | if (tty_hung_up_p(filp)) | 1280 | if (tty_hung_up_p(filp)) |
| 1273 | goto done; | 1281 | goto done; |
| 1274 | 1282 | ||
| 1275 | if ((tty->count == 1) && (state->count != 1)) { | 1283 | if ((tty->count == 1) && (port->count != 1)) { |
| 1276 | /* | 1284 | /* |
| 1277 | * Uh, oh. tty->count is 1, which means that the tty | 1285 | * Uh, oh. tty->count is 1, which means that the tty |
| 1278 | * structure will be freed. state->count should always | 1286 | * structure will be freed. port->count should always |
| 1279 | * be one in these conditions. If it's greater than | 1287 | * be one in these conditions. If it's greater than |
| 1280 | * one, we've got real problems, since it means the | 1288 | * one, we've got real problems, since it means the |
| 1281 | * serial port won't be shutdown. | 1289 | * serial port won't be shutdown. |
| 1282 | */ | 1290 | */ |
| 1283 | printk(KERN_ERR "uart_close: bad serial port count; tty->count is 1, " | 1291 | printk(KERN_ERR "uart_close: bad serial port count; tty->count is 1, " |
| 1284 | "state->count is %d\n", state->count); | 1292 | "port->count is %d\n", port->count); |
| 1285 | state->count = 1; | 1293 | port->count = 1; |
| 1286 | } | 1294 | } |
| 1287 | if (--state->count < 0) { | 1295 | if (--port->count < 0) { |
| 1288 | printk(KERN_ERR "uart_close: bad serial port count for %s: %d\n", | 1296 | printk(KERN_ERR "uart_close: bad serial port count for %s: %d\n", |
| 1289 | tty->name, state->count); | 1297 | tty->name, port->count); |
| 1290 | state->count = 0; | 1298 | port->count = 0; |
| 1291 | } | 1299 | } |
| 1292 | if (state->count) | 1300 | if (port->count) |
| 1293 | goto done; | 1301 | goto done; |
| 1294 | 1302 | ||
| 1295 | /* | 1303 | /* |
| @@ -1299,24 +1307,24 @@ static void uart_close(struct tty_struct *tty, struct file *filp) | |||
| 1299 | */ | 1307 | */ |
| 1300 | tty->closing = 1; | 1308 | tty->closing = 1; |
| 1301 | 1309 | ||
| 1302 | if (state->closing_wait != USF_CLOSING_WAIT_NONE) | 1310 | if (port->closing_wait != ASYNC_CLOSING_WAIT_NONE) |
| 1303 | tty_wait_until_sent(tty, msecs_to_jiffies(state->closing_wait)); | 1311 | tty_wait_until_sent(tty, msecs_to_jiffies(port->closing_wait)); |
| 1304 | 1312 | ||
| 1305 | /* | 1313 | /* |
| 1306 | * At this point, we stop accepting input. To do this, we | 1314 | * At this point, we stop accepting input. To do this, we |
| 1307 | * disable the receive line status interrupts. | 1315 | * disable the receive line status interrupts. |
| 1308 | */ | 1316 | */ |
| 1309 | if (state->info.flags & UIF_INITIALIZED) { | 1317 | if (port->flags & ASYNC_INITIALIZED) { |
| 1310 | unsigned long flags; | 1318 | unsigned long flags; |
| 1311 | spin_lock_irqsave(&port->lock, flags); | 1319 | spin_lock_irqsave(&port->lock, flags); |
| 1312 | port->ops->stop_rx(port); | 1320 | uport->ops->stop_rx(uport); |
| 1313 | spin_unlock_irqrestore(&port->lock, flags); | 1321 | spin_unlock_irqrestore(&port->lock, flags); |
| 1314 | /* | 1322 | /* |
| 1315 | * Before we drop DTR, make sure the UART transmitter | 1323 | * Before we drop DTR, make sure the UART transmitter |
| 1316 | * has completely drained; this is especially | 1324 | * has completely drained; this is especially |
| 1317 | * important if there is a transmit FIFO! | 1325 | * important if there is a transmit FIFO! |
| 1318 | */ | 1326 | */ |
| 1319 | uart_wait_until_sent(tty, port->timeout); | 1327 | uart_wait_until_sent(tty, uport->timeout); |
| 1320 | } | 1328 | } |
| 1321 | 1329 | ||
| 1322 | uart_shutdown(state); | 1330 | uart_shutdown(state); |
| @@ -1325,29 +1333,29 @@ static void uart_close(struct tty_struct *tty, struct file *filp) | |||
| 1325 | tty_ldisc_flush(tty); | 1333 | tty_ldisc_flush(tty); |
| 1326 | 1334 | ||
| 1327 | tty->closing = 0; | 1335 | tty->closing = 0; |
| 1328 | state->info.port.tty = NULL; | 1336 | tty_port_tty_set(port, NULL); |
| 1329 | 1337 | ||
| 1330 | if (state->info.port.blocked_open) { | 1338 | if (port->blocked_open) { |
| 1331 | if (state->close_delay) | 1339 | if (port->close_delay) |
| 1332 | msleep_interruptible(state->close_delay); | 1340 | msleep_interruptible(port->close_delay); |
| 1333 | } else if (!uart_console(port)) { | 1341 | } else if (!uart_console(uport)) { |
| 1334 | uart_change_pm(state, 3); | 1342 | uart_change_pm(state, 3); |
| 1335 | } | 1343 | } |
| 1336 | 1344 | ||
| 1337 | /* | 1345 | /* |
| 1338 | * Wake up anyone trying to open this port. | 1346 | * Wake up anyone trying to open this port. |
| 1339 | */ | 1347 | */ |
| 1340 | state->info.flags &= ~UIF_NORMAL_ACTIVE; | 1348 | clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags); |
| 1341 | wake_up_interruptible(&state->info.port.open_wait); | 1349 | wake_up_interruptible(&port->open_wait); |
| 1342 | 1350 | ||
| 1343 | done: | 1351 | done: |
| 1344 | mutex_unlock(&state->mutex); | 1352 | mutex_unlock(&port->mutex); |
| 1345 | } | 1353 | } |
| 1346 | 1354 | ||
| 1347 | static void uart_wait_until_sent(struct tty_struct *tty, int timeout) | 1355 | static void uart_wait_until_sent(struct tty_struct *tty, int timeout) |
| 1348 | { | 1356 | { |
| 1349 | struct uart_state *state = tty->driver_data; | 1357 | struct uart_state *state = tty->driver_data; |
| 1350 | struct uart_port *port = state->port; | 1358 | struct uart_port *port = state->uart_port; |
| 1351 | unsigned long char_time, expire; | 1359 | unsigned long char_time, expire; |
| 1352 | 1360 | ||
| 1353 | if (port->type == PORT_UNKNOWN || port->fifosize == 0) | 1361 | if (port->type == PORT_UNKNOWN || port->fifosize == 0) |
| @@ -1412,22 +1420,22 @@ static void uart_wait_until_sent(struct tty_struct *tty, int timeout) | |||
| 1412 | static void uart_hangup(struct tty_struct *tty) | 1420 | static void uart_hangup(struct tty_struct *tty) |
| 1413 | { | 1421 | { |
| 1414 | struct uart_state *state = tty->driver_data; | 1422 | struct uart_state *state = tty->driver_data; |
| 1415 | struct uart_info *info = &state->info; | 1423 | struct tty_port *port = &state->port; |
| 1416 | 1424 | ||
| 1417 | BUG_ON(!kernel_locked()); | 1425 | BUG_ON(!kernel_locked()); |
| 1418 | pr_debug("uart_hangup(%d)\n", state->port->line); | 1426 | pr_debug("uart_hangup(%d)\n", state->uart_port->line); |
| 1419 | 1427 | ||
| 1420 | mutex_lock(&state->mutex); | 1428 | mutex_lock(&port->mutex); |
| 1421 | if (info->flags & UIF_NORMAL_ACTIVE) { | 1429 | if (port->flags & ASYNC_NORMAL_ACTIVE) { |
| 1422 | uart_flush_buffer(tty); | 1430 | uart_flush_buffer(tty); |
| 1423 | uart_shutdown(state); | 1431 | uart_shutdown(state); |
| 1424 | state->count = 0; | 1432 | port->count = 0; |
| 1425 | info->flags &= ~UIF_NORMAL_ACTIVE; | 1433 | clear_bit(ASYNCB_NORMAL_ACTIVE, &port->flags); |
| 1426 | info->port.tty = NULL; | 1434 | tty_port_tty_set(port, NULL); |
| 1427 | wake_up_interruptible(&info->port.open_wait); | 1435 | wake_up_interruptible(&port->open_wait); |
| 1428 | wake_up_interruptible(&info->delta_msr_wait); | 1436 | wake_up_interruptible(&port->delta_msr_wait); |
| 1429 | } | 1437 | } |
| 1430 | mutex_unlock(&state->mutex); | 1438 | mutex_unlock(&port->mutex); |
| 1431 | } | 1439 | } |
| 1432 | 1440 | ||
| 1433 | /* | 1441 | /* |
| @@ -1438,8 +1446,8 @@ static void uart_hangup(struct tty_struct *tty) | |||
| 1438 | */ | 1446 | */ |
| 1439 | static void uart_update_termios(struct uart_state *state) | 1447 | static void uart_update_termios(struct uart_state *state) |
| 1440 | { | 1448 | { |
| 1441 | struct tty_struct *tty = state->info.port.tty; | 1449 | struct tty_struct *tty = state->port.tty; |
| 1442 | struct uart_port *port = state->port; | 1450 | struct uart_port *port = state->uart_port; |
| 1443 | 1451 | ||
| 1444 | if (uart_console(port) && port->cons->cflag) { | 1452 | if (uart_console(port) && port->cons->cflag) { |
| 1445 | tty->termios->c_cflag = port->cons->cflag; | 1453 | tty->termios->c_cflag = port->cons->cflag; |
| @@ -1473,27 +1481,27 @@ static int | |||
| 1473 | uart_block_til_ready(struct file *filp, struct uart_state *state) | 1481 | uart_block_til_ready(struct file *filp, struct uart_state *state) |
| 1474 | { | 1482 | { |
| 1475 | DECLARE_WAITQUEUE(wait, current); | 1483 | DECLARE_WAITQUEUE(wait, current); |
| 1476 | struct uart_info *info = &state->info; | 1484 | struct uart_port *uport = state->uart_port; |
| 1477 | struct uart_port *port = state->port; | 1485 | struct tty_port *port = &state->port; |
| 1478 | unsigned int mctrl; | 1486 | unsigned int mctrl; |
| 1479 | 1487 | ||
| 1480 | info->port.blocked_open++; | 1488 | port->blocked_open++; |
| 1481 | state->count--; | 1489 | port->count--; |
| 1482 | 1490 | ||
| 1483 | add_wait_queue(&info->port.open_wait, &wait); | 1491 | add_wait_queue(&port->open_wait, &wait); |
| 1484 | while (1) { | 1492 | while (1) { |
| 1485 | set_current_state(TASK_INTERRUPTIBLE); | 1493 | set_current_state(TASK_INTERRUPTIBLE); |
| 1486 | 1494 | ||
| 1487 | /* | 1495 | /* |
| 1488 | * If we have been hung up, tell userspace/restart open. | 1496 | * If we have been hung up, tell userspace/restart open. |
| 1489 | */ | 1497 | */ |
| 1490 | if (tty_hung_up_p(filp) || info->port.tty == NULL) | 1498 | if (tty_hung_up_p(filp) || port->tty == NULL) |
| 1491 | break; | 1499 | break; |
| 1492 | 1500 | ||
| 1493 | /* | 1501 | /* |
| 1494 | * If the port has been closed, tell userspace/restart open. | 1502 | * If the port has been closed, tell userspace/restart open. |
| 1495 | */ | 1503 | */ |
| 1496 | if (!(info->flags & UIF_INITIALIZED)) | 1504 | if (!(port->flags & ASYNC_INITIALIZED)) |
| 1497 | break; | 1505 | break; |
| 1498 | 1506 | ||
| 1499 | /* | 1507 | /* |
| @@ -1506,8 +1514,8 @@ uart_block_til_ready(struct file *filp, struct uart_state *state) | |||
| 1506 | * have set TTY_IO_ERROR for a non-existant port. | 1514 | * have set TTY_IO_ERROR for a non-existant port. |
| 1507 | */ | 1515 | */ |
| 1508 | if ((filp->f_flags & O_NONBLOCK) || | 1516 | if ((filp->f_flags & O_NONBLOCK) || |
| 1509 | (info->port.tty->termios->c_cflag & CLOCAL) || | 1517 | (port->tty->termios->c_cflag & CLOCAL) || |
| 1510 | (info->port.tty->flags & (1 << TTY_IO_ERROR))) | 1518 | (port->tty->flags & (1 << TTY_IO_ERROR))) |
| 1511 | break; | 1519 | break; |
| 1512 | 1520 | ||
| 1513 | /* | 1521 | /* |
| @@ -1515,37 +1523,37 @@ uart_block_til_ready(struct file *filp, struct uart_state *state) | |||
| 1515 | * not set RTS here - we want to make sure we catch | 1523 | * not set RTS here - we want to make sure we catch |
| 1516 | * the data from the modem. | 1524 | * the data from the modem. |
| 1517 | */ | 1525 | */ |
| 1518 | if (info->port.tty->termios->c_cflag & CBAUD) | 1526 | if (port->tty->termios->c_cflag & CBAUD) |
| 1519 | uart_set_mctrl(port, TIOCM_DTR); | 1527 | uart_set_mctrl(uport, TIOCM_DTR); |
| 1520 | 1528 | ||
| 1521 | /* | 1529 | /* |
| 1522 | * and wait for the carrier to indicate that the | 1530 | * and wait for the carrier to indicate that the |
| 1523 | * modem is ready for us. | 1531 | * modem is ready for us. |
| 1524 | */ | 1532 | */ |
| 1525 | spin_lock_irq(&port->lock); | 1533 | spin_lock_irq(&uport->lock); |
| 1526 | port->ops->enable_ms(port); | 1534 | uport->ops->enable_ms(uport); |
| 1527 | mctrl = port->ops->get_mctrl(port); | 1535 | mctrl = uport->ops->get_mctrl(uport); |
| 1528 | spin_unlock_irq(&port->lock); | 1536 | spin_unlock_irq(&uport->lock); |
| 1529 | if (mctrl & TIOCM_CAR) | 1537 | if (mctrl & TIOCM_CAR) |
| 1530 | break; | 1538 | break; |
| 1531 | 1539 | ||
| 1532 | mutex_unlock(&state->mutex); | 1540 | mutex_unlock(&port->mutex); |
| 1533 | schedule(); | 1541 | schedule(); |
| 1534 | mutex_lock(&state->mutex); | 1542 | mutex_lock(&port->mutex); |
| 1535 | 1543 | ||
| 1536 | if (signal_pending(current)) | 1544 | if (signal_pending(current)) |
| 1537 | break; | 1545 | break; |
| 1538 | } | 1546 | } |
| 1539 | set_current_state(TASK_RUNNING); | 1547 | set_current_state(TASK_RUNNING); |
| 1540 | remove_wait_queue(&info->port.open_wait, &wait); | 1548 | remove_wait_queue(&port->open_wait, &wait); |
| 1541 | 1549 | ||
| 1542 | state->count++; | 1550 | port->count++; |
| 1543 | info->port.blocked_open--; | 1551 | port->blocked_open--; |
| 1544 | 1552 | ||
| 1545 | if (signal_pending(current)) | 1553 | if (signal_pending(current)) |
| 1546 | return -ERESTARTSYS; | 1554 | return -ERESTARTSYS; |
| 1547 | 1555 | ||
| 1548 | if (!info->port.tty || tty_hung_up_p(filp)) | 1556 | if (!port->tty || tty_hung_up_p(filp)) |
| 1549 | return -EAGAIN; | 1557 | return -EAGAIN; |
| 1550 | 1558 | ||
| 1551 | return 0; | 1559 | return 0; |
| @@ -1554,24 +1562,26 @@ uart_block_til_ready(struct file *filp, struct uart_state *state) | |||
| 1554 | static struct uart_state *uart_get(struct uart_driver *drv, int line) | 1562 | static struct uart_state *uart_get(struct uart_driver *drv, int line) |
| 1555 | { | 1563 | { |
| 1556 | struct uart_state *state; | 1564 | struct uart_state *state; |
| 1565 | struct tty_port *port; | ||
| 1557 | int ret = 0; | 1566 | int ret = 0; |
| 1558 | 1567 | ||
| 1559 | state = drv->state + line; | 1568 | state = drv->state + line; |
| 1560 | if (mutex_lock_interruptible(&state->mutex)) { | 1569 | port = &state->port; |
| 1570 | if (mutex_lock_interruptible(&port->mutex)) { | ||
| 1561 | ret = -ERESTARTSYS; | 1571 | ret = -ERESTARTSYS; |
| 1562 | goto err; | 1572 | goto err; |
| 1563 | } | 1573 | } |
| 1564 | 1574 | ||
| 1565 | state->count++; | 1575 | port->count++; |
| 1566 | if (!state->port || state->port->flags & UPF_DEAD) { | 1576 | if (!state->uart_port || state->uart_port->flags & UPF_DEAD) { |
| 1567 | ret = -ENXIO; | 1577 | ret = -ENXIO; |
| 1568 | goto err_unlock; | 1578 | goto err_unlock; |
| 1569 | } | 1579 | } |
| 1570 | return state; | 1580 | return state; |
| 1571 | 1581 | ||
| 1572 | err_unlock: | 1582 | err_unlock: |
| 1573 | state->count--; | 1583 | port->count--; |
| 1574 | mutex_unlock(&state->mutex); | 1584 | mutex_unlock(&port->mutex); |
| 1575 | err: | 1585 | err: |
| 1576 | return ERR_PTR(ret); | 1586 | return ERR_PTR(ret); |
| 1577 | } | 1587 | } |
| @@ -1590,6 +1600,7 @@ static int uart_open(struct tty_struct *tty, struct file *filp) | |||
| 1590 | { | 1600 | { |
| 1591 | struct uart_driver *drv = (struct uart_driver *)tty->driver->driver_state; | 1601 | struct uart_driver *drv = (struct uart_driver *)tty->driver->driver_state; |
| 1592 | struct uart_state *state; | 1602 | struct uart_state *state; |
| 1603 | struct tty_port *port; | ||
| 1593 | int retval, line = tty->index; | 1604 | int retval, line = tty->index; |
| 1594 | 1605 | ||
| 1595 | BUG_ON(!kernel_locked()); | 1606 | BUG_ON(!kernel_locked()); |
| @@ -1606,16 +1617,18 @@ static int uart_open(struct tty_struct *tty, struct file *filp) | |||
| 1606 | 1617 | ||
| 1607 | /* | 1618 | /* |
| 1608 | * We take the semaphore inside uart_get to guarantee that we won't | 1619 | * We take the semaphore inside uart_get to guarantee that we won't |
| 1609 | * be re-entered while allocating the info structure, or while we | 1620 | * be re-entered while allocating the state structure, or while we |
| 1610 | * request any IRQs that the driver may need. This also has the nice | 1621 | * request any IRQs that the driver may need. This also has the nice |
| 1611 | * side-effect that it delays the action of uart_hangup, so we can | 1622 | * side-effect that it delays the action of uart_hangup, so we can |
| 1612 | * guarantee that info->port.tty will always contain something reasonable. | 1623 | * guarantee that state->port.tty will always contain something |
| 1624 | * reasonable. | ||
| 1613 | */ | 1625 | */ |
| 1614 | state = uart_get(drv, line); | 1626 | state = uart_get(drv, line); |
| 1615 | if (IS_ERR(state)) { | 1627 | if (IS_ERR(state)) { |
| 1616 | retval = PTR_ERR(state); | 1628 | retval = PTR_ERR(state); |
| 1617 | goto fail; | 1629 | goto fail; |
| 1618 | } | 1630 | } |
| 1631 | port = &state->port; | ||
| 1619 | 1632 | ||
| 1620 | /* | 1633 | /* |
| 1621 | * Once we set tty->driver_data here, we are guaranteed that | 1634 | * Once we set tty->driver_data here, we are guaranteed that |
| @@ -1623,25 +1636,25 @@ static int uart_open(struct tty_struct *tty, struct file *filp) | |||
| 1623 | * Any failures from here onwards should not touch the count. | 1636 | * Any failures from here onwards should not touch the count. |
| 1624 | */ | 1637 | */ |
| 1625 | tty->driver_data = state; | 1638 | tty->driver_data = state; |
| 1626 | state->port->info = &state->info; | 1639 | state->uart_port->state = state; |
| 1627 | tty->low_latency = (state->port->flags & UPF_LOW_LATENCY) ? 1 : 0; | 1640 | tty->low_latency = (state->uart_port->flags & UPF_LOW_LATENCY) ? 1 : 0; |
| 1628 | tty->alt_speed = 0; | 1641 | tty->alt_speed = 0; |
| 1629 | state->info.port.tty = tty; | 1642 | tty_port_tty_set(port, tty); |
| 1630 | 1643 | ||
| 1631 | /* | 1644 | /* |
| 1632 | * If the port is in the middle of closing, bail out now. | 1645 | * If the port is in the middle of closing, bail out now. |
| 1633 | */ | 1646 | */ |
| 1634 | if (tty_hung_up_p(filp)) { | 1647 | if (tty_hung_up_p(filp)) { |
| 1635 | retval = -EAGAIN; | 1648 | retval = -EAGAIN; |
| 1636 | state->count--; | 1649 | port->count--; |
| 1637 | mutex_unlock(&state->mutex); | 1650 | mutex_unlock(&port->mutex); |
| 1638 | goto fail; | 1651 | goto fail; |
| 1639 | } | 1652 | } |
| 1640 | 1653 | ||
| 1641 | /* | 1654 | /* |
| 1642 | * Make sure the device is in D0 state. | 1655 | * Make sure the device is in D0 state. |
| 1643 | */ | 1656 | */ |
| 1644 | if (state->count == 1) | 1657 | if (port->count == 1) |
| 1645 | uart_change_pm(state, 0); | 1658 | uart_change_pm(state, 0); |
| 1646 | 1659 | ||
| 1647 | /* | 1660 | /* |
| @@ -1654,18 +1667,18 @@ static int uart_open(struct tty_struct *tty, struct file *filp) | |||
| 1654 | */ | 1667 | */ |
| 1655 | if (retval == 0) | 1668 | if (retval == 0) |
| 1656 | retval = uart_block_til_ready(filp, state); | 1669 | retval = uart_block_til_ready(filp, state); |
| 1657 | mutex_unlock(&state->mutex); | 1670 | mutex_unlock(&port->mutex); |
| 1658 | 1671 | ||
| 1659 | /* | 1672 | /* |
| 1660 | * If this is the first open to succeed, adjust things to suit. | 1673 | * If this is the first open to succeed, adjust things to suit. |
| 1661 | */ | 1674 | */ |
| 1662 | if (retval == 0 && !(state->info.flags & UIF_NORMAL_ACTIVE)) { | 1675 | if (retval == 0 && !(port->flags & ASYNC_NORMAL_ACTIVE)) { |
| 1663 | state->info.flags |= UIF_NORMAL_ACTIVE; | 1676 | set_bit(ASYNCB_NORMAL_ACTIVE, &port->flags); |
| 1664 | 1677 | ||
| 1665 | uart_update_termios(state); | 1678 | uart_update_termios(state); |
| 1666 | } | 1679 | } |
| 1667 | 1680 | ||
| 1668 | fail: | 1681 | fail: |
| 1669 | return retval; | 1682 | return retval; |
| 1670 | } | 1683 | } |
| 1671 | 1684 | ||
| @@ -1687,57 +1700,58 @@ static const char *uart_type(struct uart_port *port) | |||
| 1687 | static void uart_line_info(struct seq_file *m, struct uart_driver *drv, int i) | 1700 | static void uart_line_info(struct seq_file *m, struct uart_driver *drv, int i) |
| 1688 | { | 1701 | { |
| 1689 | struct uart_state *state = drv->state + i; | 1702 | struct uart_state *state = drv->state + i; |
| 1703 | struct tty_port *port = &state->port; | ||
| 1690 | int pm_state; | 1704 | int pm_state; |
| 1691 | struct uart_port *port = state->port; | 1705 | struct uart_port *uport = state->uart_port; |
| 1692 | char stat_buf[32]; | 1706 | char stat_buf[32]; |
| 1693 | unsigned int status; | 1707 | unsigned int status; |
| 1694 | int mmio; | 1708 | int mmio; |
| 1695 | 1709 | ||
| 1696 | if (!port) | 1710 | if (!uport) |
| 1697 | return; | 1711 | return; |
| 1698 | 1712 | ||
| 1699 | mmio = port->iotype >= UPIO_MEM; | 1713 | mmio = uport->iotype >= UPIO_MEM; |
| 1700 | seq_printf(m, "%d: uart:%s %s%08llX irq:%d", | 1714 | seq_printf(m, "%d: uart:%s %s%08llX irq:%d", |
| 1701 | port->line, uart_type(port), | 1715 | uport->line, uart_type(uport), |
| 1702 | mmio ? "mmio:0x" : "port:", | 1716 | mmio ? "mmio:0x" : "port:", |
| 1703 | mmio ? (unsigned long long)port->mapbase | 1717 | mmio ? (unsigned long long)uport->mapbase |
| 1704 | : (unsigned long long) port->iobase, | 1718 | : (unsigned long long)uport->iobase, |
| 1705 | port->irq); | 1719 | uport->irq); |
| 1706 | 1720 | ||
| 1707 | if (port->type == PORT_UNKNOWN) { | 1721 | if (uport->type == PORT_UNKNOWN) { |
| 1708 | seq_putc(m, '\n'); | 1722 | seq_putc(m, '\n'); |
| 1709 | return; | 1723 | return; |
| 1710 | } | 1724 | } |
| 1711 | 1725 | ||
| 1712 | if (capable(CAP_SYS_ADMIN)) { | 1726 | if (capable(CAP_SYS_ADMIN)) { |
| 1713 | mutex_lock(&state->mutex); | 1727 | mutex_lock(&port->mutex); |
| 1714 | pm_state = state->pm_state; | 1728 | pm_state = state->pm_state; |
| 1715 | if (pm_state) | 1729 | if (pm_state) |
| 1716 | uart_change_pm(state, 0); | 1730 | uart_change_pm(state, 0); |
| 1717 | spin_lock_irq(&port->lock); | 1731 | spin_lock_irq(&uport->lock); |
| 1718 | status = port->ops->get_mctrl(port); | 1732 | status = uport->ops->get_mctrl(uport); |
| 1719 | spin_unlock_irq(&port->lock); | 1733 | spin_unlock_irq(&uport->lock); |
| 1720 | if (pm_state) | 1734 | if (pm_state) |
| 1721 | uart_change_pm(state, pm_state); | 1735 | uart_change_pm(state, pm_state); |
| 1722 | mutex_unlock(&state->mutex); | 1736 | mutex_unlock(&port->mutex); |
| 1723 | 1737 | ||
| 1724 | seq_printf(m, " tx:%d rx:%d", | 1738 | seq_printf(m, " tx:%d rx:%d", |
| 1725 | port->icount.tx, port->icount.rx); | 1739 | uport->icount.tx, uport->icount.rx); |
| 1726 | if (port->icount.frame) | 1740 | if (uport->icount.frame) |
| 1727 | seq_printf(m, " fe:%d", | 1741 | seq_printf(m, " fe:%d", |
| 1728 | port->icount.frame); | 1742 | uport->icount.frame); |
| 1729 | if (port->icount.parity) | 1743 | if (uport->icount.parity) |
| 1730 | seq_printf(m, " pe:%d", | 1744 | seq_printf(m, " pe:%d", |
| 1731 | port->icount.parity); | 1745 | uport->icount.parity); |
| 1732 | if (port->icount.brk) | 1746 | if (uport->icount.brk) |
| 1733 | seq_printf(m, " brk:%d", | 1747 | seq_printf(m, " brk:%d", |
| 1734 | port->icount.brk); | 1748 | uport->icount.brk); |
| 1735 | if (port->icount.overrun) | 1749 | if (uport->icount.overrun) |
| 1736 | seq_printf(m, " oe:%d", | 1750 | seq_printf(m, " oe:%d", |
| 1737 | port->icount.overrun); | 1751 | uport->icount.overrun); |
| 1738 | 1752 | ||
| 1739 | #define INFOBIT(bit, str) \ | 1753 | #define INFOBIT(bit, str) \ |
| 1740 | if (port->mctrl & (bit)) \ | 1754 | if (uport->mctrl & (bit)) \ |
| 1741 | strncat(stat_buf, (str), sizeof(stat_buf) - \ | 1755 | strncat(stat_buf, (str), sizeof(stat_buf) - \ |
| 1742 | strlen(stat_buf) - 2) | 1756 | strlen(stat_buf) - 2) |
| 1743 | #define STATBIT(bit, str) \ | 1757 | #define STATBIT(bit, str) \ |
| @@ -1958,7 +1972,7 @@ EXPORT_SYMBOL_GPL(uart_set_options); | |||
| 1958 | 1972 | ||
| 1959 | static void uart_change_pm(struct uart_state *state, int pm_state) | 1973 | static void uart_change_pm(struct uart_state *state, int pm_state) |
| 1960 | { | 1974 | { |
| 1961 | struct uart_port *port = state->port; | 1975 | struct uart_port *port = state->uart_port; |
| 1962 | 1976 | ||
| 1963 | if (state->pm_state != pm_state) { | 1977 | if (state->pm_state != pm_state) { |
| 1964 | if (port->ops->pm) | 1978 | if (port->ops->pm) |
| @@ -1982,132 +1996,138 @@ static int serial_match_port(struct device *dev, void *data) | |||
| 1982 | return dev->devt == devt; /* Actually, only one tty per port */ | 1996 | return dev->devt == devt; /* Actually, only one tty per port */ |
| 1983 | } | 1997 | } |
| 1984 | 1998 | ||
| 1985 | int uart_suspend_port(struct uart_driver *drv, struct uart_port *port) | 1999 | int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport) |
| 1986 | { | 2000 | { |
| 1987 | struct uart_state *state = drv->state + port->line; | 2001 | struct uart_state *state = drv->state + uport->line; |
| 2002 | struct tty_port *port = &state->port; | ||
| 1988 | struct device *tty_dev; | 2003 | struct device *tty_dev; |
| 1989 | struct uart_match match = {port, drv}; | 2004 | struct uart_match match = {uport, drv}; |
| 1990 | 2005 | ||
| 1991 | mutex_lock(&state->mutex); | 2006 | mutex_lock(&port->mutex); |
| 1992 | 2007 | ||
| 1993 | if (!console_suspend_enabled && uart_console(port)) { | 2008 | if (!console_suspend_enabled && uart_console(uport)) { |
| 1994 | /* we're going to avoid suspending serial console */ | 2009 | /* we're going to avoid suspending serial console */ |
| 1995 | mutex_unlock(&state->mutex); | 2010 | mutex_unlock(&port->mutex); |
| 1996 | return 0; | 2011 | return 0; |
| 1997 | } | 2012 | } |
| 1998 | 2013 | ||
| 1999 | tty_dev = device_find_child(port->dev, &match, serial_match_port); | 2014 | tty_dev = device_find_child(uport->dev, &match, serial_match_port); |
| 2000 | if (device_may_wakeup(tty_dev)) { | 2015 | if (device_may_wakeup(tty_dev)) { |
| 2001 | enable_irq_wake(port->irq); | 2016 | enable_irq_wake(uport->irq); |
| 2002 | put_device(tty_dev); | 2017 | put_device(tty_dev); |
| 2003 | mutex_unlock(&state->mutex); | 2018 | mutex_unlock(&port->mutex); |
| 2004 | return 0; | 2019 | return 0; |
| 2005 | } | 2020 | } |
| 2006 | port->suspended = 1; | 2021 | uport->suspended = 1; |
| 2007 | 2022 | ||
| 2008 | if (state->info.flags & UIF_INITIALIZED) { | 2023 | if (port->flags & ASYNC_INITIALIZED) { |
| 2009 | const struct uart_ops *ops = port->ops; | 2024 | const struct uart_ops *ops = uport->ops; |
| 2010 | int tries; | 2025 | int tries; |
| 2011 | 2026 | ||
| 2012 | state->info.flags = (state->info.flags & ~UIF_INITIALIZED) | 2027 | set_bit(ASYNCB_SUSPENDED, &port->flags); |
| 2013 | | UIF_SUSPENDED; | 2028 | clear_bit(ASYNCB_INITIALIZED, &port->flags); |
| 2014 | 2029 | ||
| 2015 | spin_lock_irq(&port->lock); | 2030 | spin_lock_irq(&uport->lock); |
| 2016 | ops->stop_tx(port); | 2031 | ops->stop_tx(uport); |
| 2017 | ops->set_mctrl(port, 0); | 2032 | ops->set_mctrl(uport, 0); |
| 2018 | ops->stop_rx(port); | 2033 | ops->stop_rx(uport); |
| 2019 | spin_unlock_irq(&port->lock); | 2034 | spin_unlock_irq(&uport->lock); |
| 2020 | 2035 | ||
| 2021 | /* | 2036 | /* |
| 2022 | * Wait for the transmitter to empty. | 2037 | * Wait for the transmitter to empty. |
| 2023 | */ | 2038 | */ |
| 2024 | for (tries = 3; !ops->tx_empty(port) && tries; tries--) | 2039 | for (tries = 3; !ops->tx_empty(uport) && tries; tries--) |
| 2025 | msleep(10); | 2040 | msleep(10); |
| 2026 | if (!tries) | 2041 | if (!tries) |
| 2027 | printk(KERN_ERR "%s%s%s%d: Unable to drain " | 2042 | printk(KERN_ERR "%s%s%s%d: Unable to drain " |
| 2028 | "transmitter\n", | 2043 | "transmitter\n", |
| 2029 | port->dev ? dev_name(port->dev) : "", | 2044 | uport->dev ? dev_name(uport->dev) : "", |
| 2030 | port->dev ? ": " : "", | 2045 | uport->dev ? ": " : "", |
| 2031 | drv->dev_name, | 2046 | drv->dev_name, |
| 2032 | drv->tty_driver->name_base + port->line); | 2047 | drv->tty_driver->name_base + uport->line); |
| 2033 | 2048 | ||
| 2034 | ops->shutdown(port); | 2049 | ops->shutdown(uport); |
| 2035 | } | 2050 | } |
| 2036 | 2051 | ||
| 2037 | /* | 2052 | /* |
| 2038 | * Disable the console device before suspending. | 2053 | * Disable the console device before suspending. |
| 2039 | */ | 2054 | */ |
| 2040 | if (uart_console(port)) | 2055 | if (uart_console(uport)) |
| 2041 | console_stop(port->cons); | 2056 | console_stop(uport->cons); |
| 2042 | 2057 | ||
| 2043 | uart_change_pm(state, 3); | 2058 | uart_change_pm(state, 3); |
| 2044 | 2059 | ||
| 2045 | mutex_unlock(&state->mutex); | 2060 | mutex_unlock(&port->mutex); |
| 2046 | 2061 | ||
| 2047 | return 0; | 2062 | return 0; |
| 2048 | } | 2063 | } |
| 2049 | 2064 | ||
| 2050 | int uart_resume_port(struct uart_driver *drv, struct uart_port *port) | 2065 | int uart_resume_port(struct uart_driver *drv, struct uart_port *uport) |
| 2051 | { | 2066 | { |
| 2052 | struct uart_state *state = drv->state + port->line; | 2067 | struct uart_state *state = drv->state + uport->line; |
| 2068 | struct tty_port *port = &state->port; | ||
| 2053 | struct device *tty_dev; | 2069 | struct device *tty_dev; |
| 2054 | struct uart_match match = {port, drv}; | 2070 | struct uart_match match = {uport, drv}; |
| 2071 | struct ktermios termios; | ||
| 2055 | 2072 | ||
| 2056 | mutex_lock(&state->mutex); | 2073 | mutex_lock(&port->mutex); |
| 2057 | 2074 | ||
| 2058 | if (!console_suspend_enabled && uart_console(port)) { | 2075 | if (!console_suspend_enabled && uart_console(uport)) { |
| 2059 | /* no need to resume serial console, it wasn't suspended */ | 2076 | /* no need to resume serial console, it wasn't suspended */ |
| 2060 | mutex_unlock(&state->mutex); | 2077 | /* |
| 2078 | * First try to use the console cflag setting. | ||
| 2079 | */ | ||
| 2080 | memset(&termios, 0, sizeof(struct ktermios)); | ||
| 2081 | termios.c_cflag = uport->cons->cflag; | ||
| 2082 | /* | ||
| 2083 | * If that's unset, use the tty termios setting. | ||
| 2084 | */ | ||
| 2085 | if (termios.c_cflag == 0) | ||
| 2086 | termios = *state->port.tty->termios; | ||
| 2087 | else { | ||
| 2088 | termios.c_ispeed = termios.c_ospeed = | ||
| 2089 | tty_termios_input_baud_rate(&termios); | ||
| 2090 | termios.c_ispeed = termios.c_ospeed = | ||
| 2091 | tty_termios_baud_rate(&termios); | ||
| 2092 | } | ||
| 2093 | uport->ops->set_termios(uport, &termios, NULL); | ||
| 2094 | mutex_unlock(&port->mutex); | ||
| 2061 | return 0; | 2095 | return 0; |
| 2062 | } | 2096 | } |
| 2063 | 2097 | ||
| 2064 | tty_dev = device_find_child(port->dev, &match, serial_match_port); | 2098 | tty_dev = device_find_child(uport->dev, &match, serial_match_port); |
| 2065 | if (!port->suspended && device_may_wakeup(tty_dev)) { | 2099 | if (!uport->suspended && device_may_wakeup(tty_dev)) { |
| 2066 | disable_irq_wake(port->irq); | 2100 | disable_irq_wake(uport->irq); |
| 2067 | mutex_unlock(&state->mutex); | 2101 | mutex_unlock(&port->mutex); |
| 2068 | return 0; | 2102 | return 0; |
| 2069 | } | 2103 | } |
| 2070 | port->suspended = 0; | 2104 | uport->suspended = 0; |
| 2071 | 2105 | ||
| 2072 | /* | 2106 | /* |
| 2073 | * Re-enable the console device after suspending. | 2107 | * Re-enable the console device after suspending. |
| 2074 | */ | 2108 | */ |
| 2075 | if (uart_console(port)) { | 2109 | if (uart_console(uport)) { |
| 2076 | struct ktermios termios; | ||
| 2077 | |||
| 2078 | /* | ||
| 2079 | * First try to use the console cflag setting. | ||
| 2080 | */ | ||
| 2081 | memset(&termios, 0, sizeof(struct ktermios)); | ||
| 2082 | termios.c_cflag = port->cons->cflag; | ||
| 2083 | |||
| 2084 | /* | ||
| 2085 | * If that's unset, use the tty termios setting. | ||
| 2086 | */ | ||
| 2087 | if (state->info.port.tty && termios.c_cflag == 0) | ||
| 2088 | termios = *state->info.port.tty->termios; | ||
| 2089 | |||
| 2090 | uart_change_pm(state, 0); | 2110 | uart_change_pm(state, 0); |
| 2091 | port->ops->set_termios(port, &termios, NULL); | 2111 | uport->ops->set_termios(uport, &termios, NULL); |
| 2092 | console_start(port->cons); | 2112 | console_start(uport->cons); |
| 2093 | } | 2113 | } |
| 2094 | 2114 | ||
| 2095 | if (state->info.flags & UIF_SUSPENDED) { | 2115 | if (port->flags & ASYNC_SUSPENDED) { |
| 2096 | const struct uart_ops *ops = port->ops; | 2116 | const struct uart_ops *ops = uport->ops; |
| 2097 | int ret; | 2117 | int ret; |
| 2098 | 2118 | ||
| 2099 | uart_change_pm(state, 0); | 2119 | uart_change_pm(state, 0); |
| 2100 | spin_lock_irq(&port->lock); | 2120 | spin_lock_irq(&uport->lock); |
| 2101 | ops->set_mctrl(port, 0); | 2121 | ops->set_mctrl(uport, 0); |
| 2102 | spin_unlock_irq(&port->lock); | 2122 | spin_unlock_irq(&uport->lock); |
| 2103 | ret = ops->startup(port); | 2123 | ret = ops->startup(uport); |
| 2104 | if (ret == 0) { | 2124 | if (ret == 0) { |
| 2105 | uart_change_speed(state, NULL); | 2125 | uart_change_speed(state, NULL); |
| 2106 | spin_lock_irq(&port->lock); | 2126 | spin_lock_irq(&uport->lock); |
| 2107 | ops->set_mctrl(port, port->mctrl); | 2127 | ops->set_mctrl(uport, uport->mctrl); |
| 2108 | ops->start_tx(port); | 2128 | ops->start_tx(uport); |
| 2109 | spin_unlock_irq(&port->lock); | 2129 | spin_unlock_irq(&uport->lock); |
| 2110 | state->info.flags |= UIF_INITIALIZED; | 2130 | set_bit(ASYNCB_INITIALIZED, &port->flags); |
| 2111 | } else { | 2131 | } else { |
| 2112 | /* | 2132 | /* |
| 2113 | * Failed to resume - maybe hardware went away? | 2133 | * Failed to resume - maybe hardware went away? |
| @@ -2117,10 +2137,10 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port) | |||
| 2117 | uart_shutdown(state); | 2137 | uart_shutdown(state); |
| 2118 | } | 2138 | } |
| 2119 | 2139 | ||
| 2120 | state->info.flags &= ~UIF_SUSPENDED; | 2140 | clear_bit(ASYNCB_SUSPENDED, &port->flags); |
| 2121 | } | 2141 | } |
| 2122 | 2142 | ||
| 2123 | mutex_unlock(&state->mutex); | 2143 | mutex_unlock(&port->mutex); |
| 2124 | 2144 | ||
| 2125 | return 0; | 2145 | return 0; |
| 2126 | } | 2146 | } |
| @@ -2232,10 +2252,10 @@ static int uart_poll_init(struct tty_driver *driver, int line, char *options) | |||
| 2232 | int parity = 'n'; | 2252 | int parity = 'n'; |
| 2233 | int flow = 'n'; | 2253 | int flow = 'n'; |
| 2234 | 2254 | ||
| 2235 | if (!state || !state->port) | 2255 | if (!state || !state->uart_port) |
| 2236 | return -1; | 2256 | return -1; |
| 2237 | 2257 | ||
| 2238 | port = state->port; | 2258 | port = state->uart_port; |
| 2239 | if (!(port->ops->poll_get_char && port->ops->poll_put_char)) | 2259 | if (!(port->ops->poll_get_char && port->ops->poll_put_char)) |
| 2240 | return -1; | 2260 | return -1; |
| 2241 | 2261 | ||
| @@ -2253,10 +2273,10 @@ static int uart_poll_get_char(struct tty_driver *driver, int line) | |||
| 2253 | struct uart_state *state = drv->state + line; | 2273 | struct uart_state *state = drv->state + line; |
| 2254 | struct uart_port *port; | 2274 | struct uart_port *port; |
| 2255 | 2275 | ||
| 2256 | if (!state || !state->port) | 2276 | if (!state || !state->uart_port) |
| 2257 | return -1; | 2277 | return -1; |
| 2258 | 2278 | ||
| 2259 | port = state->port; | 2279 | port = state->uart_port; |
| 2260 | return port->ops->poll_get_char(port); | 2280 | return port->ops->poll_get_char(port); |
| 2261 | } | 2281 | } |
| 2262 | 2282 | ||
| @@ -2266,10 +2286,10 @@ static void uart_poll_put_char(struct tty_driver *driver, int line, char ch) | |||
| 2266 | struct uart_state *state = drv->state + line; | 2286 | struct uart_state *state = drv->state + line; |
| 2267 | struct uart_port *port; | 2287 | struct uart_port *port; |
| 2268 | 2288 | ||
| 2269 | if (!state || !state->port) | 2289 | if (!state || !state->uart_port) |
| 2270 | return; | 2290 | return; |
| 2271 | 2291 | ||
| 2272 | port = state->port; | 2292 | port = state->uart_port; |
| 2273 | port->ops->poll_put_char(port, ch); | 2293 | port->ops->poll_put_char(port, ch); |
| 2274 | } | 2294 | } |
| 2275 | #endif | 2295 | #endif |
| @@ -2360,14 +2380,12 @@ int uart_register_driver(struct uart_driver *drv) | |||
| 2360 | */ | 2380 | */ |
| 2361 | for (i = 0; i < drv->nr; i++) { | 2381 | for (i = 0; i < drv->nr; i++) { |
| 2362 | struct uart_state *state = drv->state + i; | 2382 | struct uart_state *state = drv->state + i; |
| 2383 | struct tty_port *port = &state->port; | ||
| 2363 | 2384 | ||
| 2364 | state->close_delay = 500; /* .5 seconds */ | 2385 | tty_port_init(port); |
| 2365 | state->closing_wait = 30000; /* 30 seconds */ | 2386 | port->close_delay = 500; /* .5 seconds */ |
| 2366 | mutex_init(&state->mutex); | 2387 | port->closing_wait = 30000; /* 30 seconds */ |
| 2367 | 2388 | tasklet_init(&state->tlet, uart_tasklet_action, | |
| 2368 | tty_port_init(&state->info.port); | ||
| 2369 | init_waitqueue_head(&state->info.delta_msr_wait); | ||
| 2370 | tasklet_init(&state->info.tlet, uart_tasklet_action, | ||
| 2371 | (unsigned long)state); | 2389 | (unsigned long)state); |
| 2372 | } | 2390 | } |
| 2373 | 2391 | ||
| @@ -2415,62 +2433,64 @@ struct tty_driver *uart_console_device(struct console *co, int *index) | |||
| 2415 | * level uart drivers to expand uart_port, rather than having yet | 2433 | * level uart drivers to expand uart_port, rather than having yet |
| 2416 | * more levels of structures. | 2434 | * more levels of structures. |
| 2417 | */ | 2435 | */ |
| 2418 | int uart_add_one_port(struct uart_driver *drv, struct uart_port *port) | 2436 | int uart_add_one_port(struct uart_driver *drv, struct uart_port *uport) |
| 2419 | { | 2437 | { |
| 2420 | struct uart_state *state; | 2438 | struct uart_state *state; |
| 2439 | struct tty_port *port; | ||
| 2421 | int ret = 0; | 2440 | int ret = 0; |
| 2422 | struct device *tty_dev; | 2441 | struct device *tty_dev; |
| 2423 | 2442 | ||
| 2424 | BUG_ON(in_interrupt()); | 2443 | BUG_ON(in_interrupt()); |
| 2425 | 2444 | ||
| 2426 | if (port->line >= drv->nr) | 2445 | if (uport->line >= drv->nr) |
| 2427 | return -EINVAL; | 2446 | return -EINVAL; |
| 2428 | 2447 | ||
| 2429 | state = drv->state + port->line; | 2448 | state = drv->state + uport->line; |
| 2449 | port = &state->port; | ||
| 2430 | 2450 | ||
| 2431 | mutex_lock(&port_mutex); | 2451 | mutex_lock(&port_mutex); |
| 2432 | mutex_lock(&state->mutex); | 2452 | mutex_lock(&port->mutex); |
| 2433 | if (state->port) { | 2453 | if (state->uart_port) { |
| 2434 | ret = -EINVAL; | 2454 | ret = -EINVAL; |
| 2435 | goto out; | 2455 | goto out; |
| 2436 | } | 2456 | } |
| 2437 | 2457 | ||
| 2438 | state->port = port; | 2458 | state->uart_port = uport; |
| 2439 | state->pm_state = -1; | 2459 | state->pm_state = -1; |
| 2440 | 2460 | ||
| 2441 | port->cons = drv->cons; | 2461 | uport->cons = drv->cons; |
| 2442 | port->info = &state->info; | 2462 | uport->state = state; |
| 2443 | 2463 | ||
| 2444 | /* | 2464 | /* |
| 2445 | * If this port is a console, then the spinlock is already | 2465 | * If this port is a console, then the spinlock is already |
| 2446 | * initialised. | 2466 | * initialised. |
| 2447 | */ | 2467 | */ |
| 2448 | if (!(uart_console(port) && (port->cons->flags & CON_ENABLED))) { | 2468 | if (!(uart_console(uport) && (uport->cons->flags & CON_ENABLED))) { |
| 2449 | spin_lock_init(&port->lock); | 2469 | spin_lock_init(&uport->lock); |
| 2450 | lockdep_set_class(&port->lock, &port_lock_key); | 2470 | lockdep_set_class(&uport->lock, &port_lock_key); |
| 2451 | } | 2471 | } |
| 2452 | 2472 | ||
| 2453 | uart_configure_port(drv, state, port); | 2473 | uart_configure_port(drv, state, uport); |
| 2454 | 2474 | ||
| 2455 | /* | 2475 | /* |
| 2456 | * Register the port whether it's detected or not. This allows | 2476 | * Register the port whether it's detected or not. This allows |
| 2457 | * setserial to be used to alter this ports parameters. | 2477 | * setserial to be used to alter this ports parameters. |
| 2458 | */ | 2478 | */ |
| 2459 | tty_dev = tty_register_device(drv->tty_driver, port->line, port->dev); | 2479 | tty_dev = tty_register_device(drv->tty_driver, uport->line, uport->dev); |
| 2460 | if (likely(!IS_ERR(tty_dev))) { | 2480 | if (likely(!IS_ERR(tty_dev))) { |
| 2461 | device_init_wakeup(tty_dev, 1); | 2481 | device_init_wakeup(tty_dev, 1); |
| 2462 | device_set_wakeup_enable(tty_dev, 0); | 2482 | device_set_wakeup_enable(tty_dev, 0); |
| 2463 | } else | 2483 | } else |
| 2464 | printk(KERN_ERR "Cannot register tty device on line %d\n", | 2484 | printk(KERN_ERR "Cannot register tty device on line %d\n", |
| 2465 | port->line); | 2485 | uport->line); |
| 2466 | 2486 | ||
| 2467 | /* | 2487 | /* |
| 2468 | * Ensure UPF_DEAD is not set. | 2488 | * Ensure UPF_DEAD is not set. |
| 2469 | */ | 2489 | */ |
| 2470 | port->flags &= ~UPF_DEAD; | 2490 | uport->flags &= ~UPF_DEAD; |
| 2471 | 2491 | ||
| 2472 | out: | 2492 | out: |
| 2473 | mutex_unlock(&state->mutex); | 2493 | mutex_unlock(&port->mutex); |
| 2474 | mutex_unlock(&port_mutex); | 2494 | mutex_unlock(&port_mutex); |
| 2475 | 2495 | ||
| 2476 | return ret; | 2496 | return ret; |
| @@ -2485,16 +2505,16 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *port) | |||
| 2485 | * core driver. No further calls will be made to the low-level code | 2505 | * core driver. No further calls will be made to the low-level code |
| 2486 | * for this port. | 2506 | * for this port. |
| 2487 | */ | 2507 | */ |
| 2488 | int uart_remove_one_port(struct uart_driver *drv, struct uart_port *port) | 2508 | int uart_remove_one_port(struct uart_driver *drv, struct uart_port *uport) |
| 2489 | { | 2509 | { |
| 2490 | struct uart_state *state = drv->state + port->line; | 2510 | struct uart_state *state = drv->state + uport->line; |
| 2491 | struct uart_info *info; | 2511 | struct tty_port *port = &state->port; |
| 2492 | 2512 | ||
| 2493 | BUG_ON(in_interrupt()); | 2513 | BUG_ON(in_interrupt()); |
| 2494 | 2514 | ||
| 2495 | if (state->port != port) | 2515 | if (state->uart_port != uport) |
| 2496 | printk(KERN_ALERT "Removing wrong port: %p != %p\n", | 2516 | printk(KERN_ALERT "Removing wrong port: %p != %p\n", |
| 2497 | state->port, port); | 2517 | state->uart_port, uport); |
| 2498 | 2518 | ||
| 2499 | mutex_lock(&port_mutex); | 2519 | mutex_lock(&port_mutex); |
| 2500 | 2520 | ||
| @@ -2502,37 +2522,35 @@ int uart_remove_one_port(struct uart_driver *drv, struct uart_port *port) | |||
| 2502 | * Mark the port "dead" - this prevents any opens from | 2522 | * Mark the port "dead" - this prevents any opens from |
| 2503 | * succeeding while we shut down the port. | 2523 | * succeeding while we shut down the port. |
| 2504 | */ | 2524 | */ |
| 2505 | mutex_lock(&state->mutex); | 2525 | mutex_lock(&port->mutex); |
| 2506 | port->flags |= UPF_DEAD; | 2526 | uport->flags |= UPF_DEAD; |
| 2507 | mutex_unlock(&state->mutex); | 2527 | mutex_unlock(&port->mutex); |
| 2508 | 2528 | ||
| 2509 | /* | 2529 | /* |
| 2510 | * Remove the devices from the tty layer | 2530 | * Remove the devices from the tty layer |
| 2511 | */ | 2531 | */ |
| 2512 | tty_unregister_device(drv->tty_driver, port->line); | 2532 | tty_unregister_device(drv->tty_driver, uport->line); |
| 2513 | 2533 | ||
| 2514 | info = &state->info; | 2534 | if (port->tty) |
| 2515 | if (info && info->port.tty) | 2535 | tty_vhangup(port->tty); |
| 2516 | tty_vhangup(info->port.tty); | ||
| 2517 | 2536 | ||
| 2518 | /* | 2537 | /* |
| 2519 | * Free the port IO and memory resources, if any. | 2538 | * Free the port IO and memory resources, if any. |
| 2520 | */ | 2539 | */ |
| 2521 | if (port->type != PORT_UNKNOWN) | 2540 | if (uport->type != PORT_UNKNOWN) |
| 2522 | port->ops->release_port(port); | 2541 | uport->ops->release_port(uport); |
| 2523 | 2542 | ||
| 2524 | /* | 2543 | /* |
| 2525 | * Indicate that there isn't a port here anymore. | 2544 | * Indicate that there isn't a port here anymore. |
| 2526 | */ | 2545 | */ |
| 2527 | port->type = PORT_UNKNOWN; | 2546 | uport->type = PORT_UNKNOWN; |
| 2528 | 2547 | ||
| 2529 | /* | 2548 | /* |
| 2530 | * Kill the tasklet, and free resources. | 2549 | * Kill the tasklet, and free resources. |
| 2531 | */ | 2550 | */ |
| 2532 | if (info) | 2551 | tasklet_kill(&state->tlet); |
| 2533 | tasklet_kill(&info->tlet); | ||
| 2534 | 2552 | ||
| 2535 | state->port = NULL; | 2553 | state->uart_port = NULL; |
| 2536 | mutex_unlock(&port_mutex); | 2554 | mutex_unlock(&port_mutex); |
| 2537 | 2555 | ||
| 2538 | return 0; | 2556 | return 0; |
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c index ed4648b556c7..a3bb49031a7f 100644 --- a/drivers/serial/serial_cs.c +++ b/drivers/serial/serial_cs.c | |||
| @@ -884,6 +884,7 @@ static struct pcmcia_device_id serial_ids[] = { | |||
| 884 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ | 884 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ |
| 885 | PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ | 885 | PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ |
| 886 | PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"), | 886 | PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"), |
| 887 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "COMpad2.cis"), | ||
| 887 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "COMpad4.cis"), | 888 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "COMpad4.cis"), |
| 888 | PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "COMpad2.cis"), | 889 | PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "COMpad2.cis"), |
| 889 | PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"), | 890 | PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"), |
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c index 52db5cc3f900..2e71bbc04dac 100644 --- a/drivers/serial/serial_ks8695.c +++ b/drivers/serial/serial_ks8695.c | |||
| @@ -154,7 +154,7 @@ static void ks8695uart_disable_ms(struct uart_port *port) | |||
| 154 | static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id) | 154 | static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id) |
| 155 | { | 155 | { |
| 156 | struct uart_port *port = dev_id; | 156 | struct uart_port *port = dev_id; |
| 157 | struct tty_struct *tty = port->info->port.tty; | 157 | struct tty_struct *tty = port->state->port.tty; |
| 158 | unsigned int status, ch, lsr, flg, max_count = 256; | 158 | unsigned int status, ch, lsr, flg, max_count = 256; |
| 159 | 159 | ||
| 160 | status = UART_GET_LSR(port); /* clears pending LSR interrupts */ | 160 | status = UART_GET_LSR(port); /* clears pending LSR interrupts */ |
| @@ -210,7 +210,7 @@ ignore_char: | |||
| 210 | static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id) | 210 | static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id) |
| 211 | { | 211 | { |
| 212 | struct uart_port *port = dev_id; | 212 | struct uart_port *port = dev_id; |
| 213 | struct circ_buf *xmit = &port->info->xmit; | 213 | struct circ_buf *xmit = &port->state->xmit; |
| 214 | unsigned int count; | 214 | unsigned int count; |
| 215 | 215 | ||
| 216 | if (port->x_char) { | 216 | if (port->x_char) { |
| @@ -266,7 +266,7 @@ static irqreturn_t ks8695uart_modem_status(int irq, void *dev_id) | |||
| 266 | if (status & URMS_URTERI) | 266 | if (status & URMS_URTERI) |
| 267 | port->icount.rng++; | 267 | port->icount.rng++; |
| 268 | 268 | ||
| 269 | wake_up_interruptible(&port->info->delta_msr_wait); | 269 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
| 270 | 270 | ||
| 271 | return IRQ_HANDLED; | 271 | return IRQ_HANDLED; |
| 272 | } | 272 | } |
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c index a7bf024a8286..ea744707c4d6 100644 --- a/drivers/serial/serial_lh7a40x.c +++ b/drivers/serial/serial_lh7a40x.c | |||
| @@ -138,7 +138,7 @@ static void lh7a40xuart_enable_ms (struct uart_port* port) | |||
| 138 | 138 | ||
| 139 | static void lh7a40xuart_rx_chars (struct uart_port* port) | 139 | static void lh7a40xuart_rx_chars (struct uart_port* port) |
| 140 | { | 140 | { |
| 141 | struct tty_struct* tty = port->info->port.tty; | 141 | struct tty_struct* tty = port->state->port.tty; |
| 142 | int cbRxMax = 256; /* (Gross) limit on receive */ | 142 | int cbRxMax = 256; /* (Gross) limit on receive */ |
| 143 | unsigned int data; /* Received data and status */ | 143 | unsigned int data; /* Received data and status */ |
| 144 | unsigned int flag; | 144 | unsigned int flag; |
| @@ -184,7 +184,7 @@ static void lh7a40xuart_rx_chars (struct uart_port* port) | |||
| 184 | 184 | ||
| 185 | static void lh7a40xuart_tx_chars (struct uart_port* port) | 185 | static void lh7a40xuart_tx_chars (struct uart_port* port) |
| 186 | { | 186 | { |
| 187 | struct circ_buf* xmit = &port->info->xmit; | 187 | struct circ_buf* xmit = &port->state->xmit; |
| 188 | int cbTxMax = port->fifosize; | 188 | int cbTxMax = port->fifosize; |
| 189 | 189 | ||
| 190 | if (port->x_char) { | 190 | if (port->x_char) { |
| @@ -241,7 +241,7 @@ static void lh7a40xuart_modem_status (struct uart_port* port) | |||
| 241 | if (delta & CTS) | 241 | if (delta & CTS) |
| 242 | uart_handle_cts_change (port, status & CTS); | 242 | uart_handle_cts_change (port, status & CTS); |
| 243 | 243 | ||
| 244 | wake_up_interruptible (&port->info->delta_msr_wait); | 244 | wake_up_interruptible (&port->state->port.delta_msr_wait); |
| 245 | } | 245 | } |
| 246 | 246 | ||
| 247 | static irqreturn_t lh7a40xuart_int (int irq, void* dev_id) | 247 | static irqreturn_t lh7a40xuart_int (int irq, void* dev_id) |
diff --git a/drivers/serial/serial_txx9.c b/drivers/serial/serial_txx9.c index 54dd16d66a4b..0f7cf4c453e6 100644 --- a/drivers/serial/serial_txx9.c +++ b/drivers/serial/serial_txx9.c | |||
| @@ -272,7 +272,7 @@ static void serial_txx9_initialize(struct uart_port *port) | |||
| 272 | static inline void | 272 | static inline void |
| 273 | receive_chars(struct uart_txx9_port *up, unsigned int *status) | 273 | receive_chars(struct uart_txx9_port *up, unsigned int *status) |
| 274 | { | 274 | { |
| 275 | struct tty_struct *tty = up->port.info->port.tty; | 275 | struct tty_struct *tty = up->port.state->port.tty; |
| 276 | unsigned char ch; | 276 | unsigned char ch; |
| 277 | unsigned int disr = *status; | 277 | unsigned int disr = *status; |
| 278 | int max_count = 256; | 278 | int max_count = 256; |
| @@ -348,7 +348,7 @@ receive_chars(struct uart_txx9_port *up, unsigned int *status) | |||
| 348 | 348 | ||
| 349 | static inline void transmit_chars(struct uart_txx9_port *up) | 349 | static inline void transmit_chars(struct uart_txx9_port *up) |
| 350 | { | 350 | { |
| 351 | struct circ_buf *xmit = &up->port.info->xmit; | 351 | struct circ_buf *xmit = &up->port.state->xmit; |
| 352 | int count; | 352 | int count; |
| 353 | 353 | ||
| 354 | if (up->port.x_char) { | 354 | if (up->port.x_char) { |
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 8e2feb563347..85119fb7cb50 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
| @@ -272,7 +272,8 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag) | |||
| 272 | __raw_writew(data, PSCR); | 272 | __raw_writew(data, PSCR); |
| 273 | } | 273 | } |
| 274 | } | 274 | } |
| 275 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | 275 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \ |
| 276 | defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | ||
| 276 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 277 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
| 277 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 278 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
| 278 | defined(CONFIG_CPU_SUBTYPE_SH7786) || \ | 279 | defined(CONFIG_CPU_SUBTYPE_SH7786) || \ |
| @@ -360,7 +361,7 @@ static inline int sci_rxroom(struct uart_port *port) | |||
| 360 | 361 | ||
| 361 | static void sci_transmit_chars(struct uart_port *port) | 362 | static void sci_transmit_chars(struct uart_port *port) |
| 362 | { | 363 | { |
| 363 | struct circ_buf *xmit = &port->info->xmit; | 364 | struct circ_buf *xmit = &port->state->xmit; |
| 364 | unsigned int stopped = uart_tx_stopped(port); | 365 | unsigned int stopped = uart_tx_stopped(port); |
| 365 | unsigned short status; | 366 | unsigned short status; |
| 366 | unsigned short ctrl; | 367 | unsigned short ctrl; |
| @@ -425,7 +426,7 @@ static void sci_transmit_chars(struct uart_port *port) | |||
| 425 | static inline void sci_receive_chars(struct uart_port *port) | 426 | static inline void sci_receive_chars(struct uart_port *port) |
| 426 | { | 427 | { |
| 427 | struct sci_port *sci_port = to_sci_port(port); | 428 | struct sci_port *sci_port = to_sci_port(port); |
| 428 | struct tty_struct *tty = port->info->port.tty; | 429 | struct tty_struct *tty = port->state->port.tty; |
| 429 | int i, count, copied = 0; | 430 | int i, count, copied = 0; |
| 430 | unsigned short status; | 431 | unsigned short status; |
| 431 | unsigned char flag; | 432 | unsigned char flag; |
| @@ -545,7 +546,7 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
| 545 | { | 546 | { |
| 546 | int copied = 0; | 547 | int copied = 0; |
| 547 | unsigned short status = sci_in(port, SCxSR); | 548 | unsigned short status = sci_in(port, SCxSR); |
| 548 | struct tty_struct *tty = port->info->port.tty; | 549 | struct tty_struct *tty = port->state->port.tty; |
| 549 | 550 | ||
| 550 | if (status & SCxSR_ORER(port)) { | 551 | if (status & SCxSR_ORER(port)) { |
| 551 | /* overrun error */ | 552 | /* overrun error */ |
| @@ -599,7 +600,7 @@ static inline int sci_handle_errors(struct uart_port *port) | |||
| 599 | 600 | ||
| 600 | static inline int sci_handle_fifo_overrun(struct uart_port *port) | 601 | static inline int sci_handle_fifo_overrun(struct uart_port *port) |
| 601 | { | 602 | { |
| 602 | struct tty_struct *tty = port->info->port.tty; | 603 | struct tty_struct *tty = port->state->port.tty; |
| 603 | int copied = 0; | 604 | int copied = 0; |
| 604 | 605 | ||
| 605 | if (port->type != PORT_SCIF) | 606 | if (port->type != PORT_SCIF) |
| @@ -622,7 +623,7 @@ static inline int sci_handle_breaks(struct uart_port *port) | |||
| 622 | { | 623 | { |
| 623 | int copied = 0; | 624 | int copied = 0; |
| 624 | unsigned short status = sci_in(port, SCxSR); | 625 | unsigned short status = sci_in(port, SCxSR); |
| 625 | struct tty_struct *tty = port->info->port.tty; | 626 | struct tty_struct *tty = port->state->port.tty; |
| 626 | struct sci_port *s = to_sci_port(port); | 627 | struct sci_port *s = to_sci_port(port); |
| 627 | 628 | ||
| 628 | if (uart_handle_break(port)) | 629 | if (uart_handle_break(port)) |
| @@ -662,10 +663,11 @@ static irqreturn_t sci_rx_interrupt(int irq, void *port) | |||
| 662 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) | 663 | static irqreturn_t sci_tx_interrupt(int irq, void *ptr) |
| 663 | { | 664 | { |
| 664 | struct uart_port *port = ptr; | 665 | struct uart_port *port = ptr; |
| 666 | unsigned long flags; | ||
| 665 | 667 | ||
| 666 | spin_lock_irq(&port->lock); | 668 | spin_lock_irqsave(&port->lock, flags); |
| 667 | sci_transmit_chars(port); | 669 | sci_transmit_chars(port); |
| 668 | spin_unlock_irq(&port->lock); | 670 | spin_unlock_irqrestore(&port->lock, flags); |
| 669 | 671 | ||
| 670 | return IRQ_HANDLED; | 672 | return IRQ_HANDLED; |
| 671 | } | 673 | } |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 38072c15b845..3e2fcf93b42e 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
| @@ -112,6 +112,13 @@ | |||
| 112 | #elif defined(CONFIG_H8S2678) | 112 | #elif defined(CONFIG_H8S2678) |
| 113 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ | 113 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ |
| 114 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) | 114 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) |
| 115 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) | ||
| 116 | # define SCSPTR0 0xfe4b0020 | ||
| 117 | # define SCSPTR1 0xfe4b0020 | ||
| 118 | # define SCSPTR2 0xfe4b0020 | ||
| 119 | # define SCIF_ORER 0x0001 | ||
| 120 | # define SCSCR_INIT(port) 0x38 | ||
| 121 | # define SCIF_ONLY | ||
| 115 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | 122 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
| 116 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | 123 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ |
| 117 | # define SCSPTR1 0xffe08024 /* 16 bit SCIF */ | 124 | # define SCSPTR1 0xffe08024 /* 16 bit SCIF */ |
| @@ -562,6 +569,16 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
| 562 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | 569 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ |
| 563 | return 1; | 570 | return 1; |
| 564 | } | 571 | } |
| 572 | #elif defined(CONFIG_CPU_SUBTYPE_SH7757) | ||
| 573 | static inline int sci_rxd_in(struct uart_port *port) | ||
| 574 | { | ||
| 575 | if (port->mapbase == 0xfe4b0000) | ||
| 576 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; | ||
| 577 | if (port->mapbase == 0xfe4c0000) | ||
| 578 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; | ||
| 579 | if (port->mapbase == 0xfe4d0000) | ||
| 580 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; | ||
| 581 | } | ||
| 565 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | 582 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) |
| 566 | static inline int sci_rxd_in(struct uart_port *port) | 583 | static inline int sci_rxd_in(struct uart_port *port) |
| 567 | { | 584 | { |
diff --git a/drivers/serial/sn_console.c b/drivers/serial/sn_console.c index d5276c012f78..9794e0cd3dcc 100644 --- a/drivers/serial/sn_console.c +++ b/drivers/serial/sn_console.c | |||
| @@ -469,9 +469,9 @@ sn_receive_chars(struct sn_cons_port *port, unsigned long flags) | |||
| 469 | return; | 469 | return; |
| 470 | } | 470 | } |
| 471 | 471 | ||
| 472 | if (port->sc_port.info) { | 472 | if (port->sc_port.state) { |
| 473 | /* The serial_core stuffs are initilized, use them */ | 473 | /* The serial_core stuffs are initilized, use them */ |
| 474 | tty = port->sc_port.info->port.tty; | 474 | tty = port->sc_port.state->port.tty; |
| 475 | } | 475 | } |
| 476 | else { | 476 | else { |
| 477 | /* Not registered yet - can't pass to tty layer. */ | 477 | /* Not registered yet - can't pass to tty layer. */ |
| @@ -550,9 +550,9 @@ static void sn_transmit_chars(struct sn_cons_port *port, int raw) | |||
| 550 | 550 | ||
| 551 | BUG_ON(!port->sc_is_asynch); | 551 | BUG_ON(!port->sc_is_asynch); |
| 552 | 552 | ||
| 553 | if (port->sc_port.info) { | 553 | if (port->sc_port.state) { |
| 554 | /* We're initilized, using serial core infrastructure */ | 554 | /* We're initilized, using serial core infrastructure */ |
| 555 | xmit = &port->sc_port.info->xmit; | 555 | xmit = &port->sc_port.state->xmit; |
| 556 | } else { | 556 | } else { |
| 557 | /* Probably sn_sal_switch_to_asynch has been run but serial core isn't | 557 | /* Probably sn_sal_switch_to_asynch has been run but serial core isn't |
| 558 | * initilized yet. Just return. Writes are going through | 558 | * initilized yet. Just return. Writes are going through |
| @@ -927,7 +927,7 @@ sn_sal_console_write(struct console *co, const char *s, unsigned count) | |||
| 927 | /* We can't look at the xmit buffer if we're not registered with serial core | 927 | /* We can't look at the xmit buffer if we're not registered with serial core |
| 928 | * yet. So only do the fancy recovery after registering | 928 | * yet. So only do the fancy recovery after registering |
| 929 | */ | 929 | */ |
| 930 | if (!port->sc_port.info) { | 930 | if (!port->sc_port.state) { |
| 931 | /* Not yet registered with serial core - simple case */ | 931 | /* Not yet registered with serial core - simple case */ |
| 932 | puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count); | 932 | puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count); |
| 933 | return; | 933 | return; |
| @@ -936,8 +936,8 @@ sn_sal_console_write(struct console *co, const char *s, unsigned count) | |||
| 936 | /* somebody really wants this output, might be an | 936 | /* somebody really wants this output, might be an |
| 937 | * oops, kdb, panic, etc. make sure they get it. */ | 937 | * oops, kdb, panic, etc. make sure they get it. */ |
| 938 | if (spin_is_locked(&port->sc_port.lock)) { | 938 | if (spin_is_locked(&port->sc_port.lock)) { |
| 939 | int lhead = port->sc_port.info->xmit.head; | 939 | int lhead = port->sc_port.state->xmit.head; |
| 940 | int ltail = port->sc_port.info->xmit.tail; | 940 | int ltail = port->sc_port.state->xmit.tail; |
| 941 | int counter, got_lock = 0; | 941 | int counter, got_lock = 0; |
| 942 | 942 | ||
| 943 | /* | 943 | /* |
| @@ -962,13 +962,13 @@ sn_sal_console_write(struct console *co, const char *s, unsigned count) | |||
| 962 | break; | 962 | break; |
| 963 | } else { | 963 | } else { |
| 964 | /* still locked */ | 964 | /* still locked */ |
| 965 | if ((lhead != port->sc_port.info->xmit.head) | 965 | if ((lhead != port->sc_port.state->xmit.head) |
| 966 | || (ltail != | 966 | || (ltail != |
| 967 | port->sc_port.info->xmit.tail)) { | 967 | port->sc_port.state->xmit.tail)) { |
| 968 | lhead = | 968 | lhead = |
| 969 | port->sc_port.info->xmit.head; | 969 | port->sc_port.state->xmit.head; |
| 970 | ltail = | 970 | ltail = |
| 971 | port->sc_port.info->xmit.tail; | 971 | port->sc_port.state->xmit.tail; |
| 972 | counter = 0; | 972 | counter = 0; |
| 973 | } | 973 | } |
| 974 | } | 974 | } |
diff --git a/drivers/serial/sunhv.c b/drivers/serial/sunhv.c index 1df5325faab2..d548652dee50 100644 --- a/drivers/serial/sunhv.c +++ b/drivers/serial/sunhv.c | |||
| @@ -184,8 +184,8 @@ static struct tty_struct *receive_chars(struct uart_port *port) | |||
| 184 | { | 184 | { |
| 185 | struct tty_struct *tty = NULL; | 185 | struct tty_struct *tty = NULL; |
| 186 | 186 | ||
| 187 | if (port->info != NULL) /* Unopened serial console */ | 187 | if (port->state != NULL) /* Unopened serial console */ |
| 188 | tty = port->info->port.tty; | 188 | tty = port->state->port.tty; |
| 189 | 189 | ||
| 190 | if (sunhv_ops->receive_chars(port, tty)) | 190 | if (sunhv_ops->receive_chars(port, tty)) |
| 191 | sun_do_break(); | 191 | sun_do_break(); |
| @@ -197,10 +197,10 @@ static void transmit_chars(struct uart_port *port) | |||
| 197 | { | 197 | { |
| 198 | struct circ_buf *xmit; | 198 | struct circ_buf *xmit; |
| 199 | 199 | ||
| 200 | if (!port->info) | 200 | if (!port->state) |
| 201 | return; | 201 | return; |
| 202 | 202 | ||
| 203 | xmit = &port->info->xmit; | 203 | xmit = &port->state->xmit; |
| 204 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) | 204 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
| 205 | return; | 205 | return; |
| 206 | 206 | ||
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c index 0355efe115d9..d1ad34128635 100644 --- a/drivers/serial/sunsab.c +++ b/drivers/serial/sunsab.c | |||
| @@ -117,8 +117,8 @@ receive_chars(struct uart_sunsab_port *up, | |||
| 117 | int count = 0; | 117 | int count = 0; |
| 118 | int i; | 118 | int i; |
| 119 | 119 | ||
| 120 | if (up->port.info != NULL) /* Unopened serial console */ | 120 | if (up->port.state != NULL) /* Unopened serial console */ |
| 121 | tty = up->port.info->port.tty; | 121 | tty = up->port.state->port.tty; |
| 122 | 122 | ||
| 123 | /* Read number of BYTES (Character + Status) available. */ | 123 | /* Read number of BYTES (Character + Status) available. */ |
| 124 | if (stat->sreg.isr0 & SAB82532_ISR0_RPF) { | 124 | if (stat->sreg.isr0 & SAB82532_ISR0_RPF) { |
| @@ -229,7 +229,7 @@ static void sunsab_tx_idle(struct uart_sunsab_port *); | |||
| 229 | static void transmit_chars(struct uart_sunsab_port *up, | 229 | static void transmit_chars(struct uart_sunsab_port *up, |
| 230 | union sab82532_irq_status *stat) | 230 | union sab82532_irq_status *stat) |
| 231 | { | 231 | { |
| 232 | struct circ_buf *xmit = &up->port.info->xmit; | 232 | struct circ_buf *xmit = &up->port.state->xmit; |
| 233 | int i; | 233 | int i; |
| 234 | 234 | ||
| 235 | if (stat->sreg.isr1 & SAB82532_ISR1_ALLS) { | 235 | if (stat->sreg.isr1 & SAB82532_ISR1_ALLS) { |
| @@ -297,7 +297,7 @@ static void check_status(struct uart_sunsab_port *up, | |||
| 297 | up->port.icount.dsr++; | 297 | up->port.icount.dsr++; |
| 298 | } | 298 | } |
| 299 | 299 | ||
| 300 | wake_up_interruptible(&up->port.info->delta_msr_wait); | 300 | wake_up_interruptible(&up->port.state->port.delta_msr_wait); |
| 301 | } | 301 | } |
| 302 | 302 | ||
| 303 | static irqreturn_t sunsab_interrupt(int irq, void *dev_id) | 303 | static irqreturn_t sunsab_interrupt(int irq, void *dev_id) |
| @@ -429,7 +429,7 @@ static void sunsab_tx_idle(struct uart_sunsab_port *up) | |||
| 429 | static void sunsab_start_tx(struct uart_port *port) | 429 | static void sunsab_start_tx(struct uart_port *port) |
| 430 | { | 430 | { |
| 431 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; | 431 | struct uart_sunsab_port *up = (struct uart_sunsab_port *) port; |
| 432 | struct circ_buf *xmit = &up->port.info->xmit; | 432 | struct circ_buf *xmit = &up->port.state->xmit; |
| 433 | int i; | 433 | int i; |
| 434 | 434 | ||
| 435 | up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR); | 435 | up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR); |
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c index 47c6837850b1..68d262b15749 100644 --- a/drivers/serial/sunsu.c +++ b/drivers/serial/sunsu.c | |||
| @@ -311,7 +311,7 @@ static void sunsu_enable_ms(struct uart_port *port) | |||
| 311 | static struct tty_struct * | 311 | static struct tty_struct * |
| 312 | receive_chars(struct uart_sunsu_port *up, unsigned char *status) | 312 | receive_chars(struct uart_sunsu_port *up, unsigned char *status) |
| 313 | { | 313 | { |
| 314 | struct tty_struct *tty = up->port.info->port.tty; | 314 | struct tty_struct *tty = up->port.state->port.tty; |
| 315 | unsigned char ch, flag; | 315 | unsigned char ch, flag; |
| 316 | int max_count = 256; | 316 | int max_count = 256; |
| 317 | int saw_console_brk = 0; | 317 | int saw_console_brk = 0; |
| @@ -389,7 +389,7 @@ receive_chars(struct uart_sunsu_port *up, unsigned char *status) | |||
| 389 | 389 | ||
| 390 | static void transmit_chars(struct uart_sunsu_port *up) | 390 | static void transmit_chars(struct uart_sunsu_port *up) |
| 391 | { | 391 | { |
| 392 | struct circ_buf *xmit = &up->port.info->xmit; | 392 | struct circ_buf *xmit = &up->port.state->xmit; |
| 393 | int count; | 393 | int count; |
| 394 | 394 | ||
| 395 | if (up->port.x_char) { | 395 | if (up->port.x_char) { |
| @@ -441,7 +441,7 @@ static void check_modem_status(struct uart_sunsu_port *up) | |||
| 441 | if (status & UART_MSR_DCTS) | 441 | if (status & UART_MSR_DCTS) |
| 442 | uart_handle_cts_change(&up->port, status & UART_MSR_CTS); | 442 | uart_handle_cts_change(&up->port, status & UART_MSR_CTS); |
| 443 | 443 | ||
| 444 | wake_up_interruptible(&up->port.info->delta_msr_wait); | 444 | wake_up_interruptible(&up->port.state->port.delta_msr_wait); |
| 445 | } | 445 | } |
| 446 | 446 | ||
| 447 | static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id) | 447 | static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id) |
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c index e09d3cebb4fb..ef693ae22e7f 100644 --- a/drivers/serial/sunzilog.c +++ b/drivers/serial/sunzilog.c | |||
| @@ -328,9 +328,9 @@ sunzilog_receive_chars(struct uart_sunzilog_port *up, | |||
| 328 | unsigned char ch, r1, flag; | 328 | unsigned char ch, r1, flag; |
| 329 | 329 | ||
| 330 | tty = NULL; | 330 | tty = NULL; |
| 331 | if (up->port.info != NULL && /* Unopened serial console */ | 331 | if (up->port.state != NULL && /* Unopened serial console */ |
| 332 | up->port.info->port.tty != NULL) /* Keyboard || mouse */ | 332 | up->port.state->port.tty != NULL) /* Keyboard || mouse */ |
| 333 | tty = up->port.info->port.tty; | 333 | tty = up->port.state->port.tty; |
| 334 | 334 | ||
| 335 | for (;;) { | 335 | for (;;) { |
| 336 | 336 | ||
| @@ -451,7 +451,7 @@ static void sunzilog_status_handle(struct uart_sunzilog_port *up, | |||
| 451 | uart_handle_cts_change(&up->port, | 451 | uart_handle_cts_change(&up->port, |
| 452 | (status & CTS)); | 452 | (status & CTS)); |
| 453 | 453 | ||
| 454 | wake_up_interruptible(&up->port.info->delta_msr_wait); | 454 | wake_up_interruptible(&up->port.state->port.delta_msr_wait); |
| 455 | } | 455 | } |
| 456 | 456 | ||
| 457 | up->prev_status = status; | 457 | up->prev_status = status; |
| @@ -501,9 +501,9 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up, | |||
| 501 | return; | 501 | return; |
| 502 | } | 502 | } |
| 503 | 503 | ||
| 504 | if (up->port.info == NULL) | 504 | if (up->port.state == NULL) |
| 505 | goto ack_tx_int; | 505 | goto ack_tx_int; |
| 506 | xmit = &up->port.info->xmit; | 506 | xmit = &up->port.state->xmit; |
| 507 | if (uart_circ_empty(xmit)) | 507 | if (uart_circ_empty(xmit)) |
| 508 | goto ack_tx_int; | 508 | goto ack_tx_int; |
| 509 | 509 | ||
| @@ -705,7 +705,7 @@ static void sunzilog_start_tx(struct uart_port *port) | |||
| 705 | port->icount.tx++; | 705 | port->icount.tx++; |
| 706 | port->x_char = 0; | 706 | port->x_char = 0; |
| 707 | } else { | 707 | } else { |
| 708 | struct circ_buf *xmit = &port->info->xmit; | 708 | struct circ_buf *xmit = &port->state->xmit; |
| 709 | 709 | ||
| 710 | writeb(xmit->buf[xmit->tail], &channel->data); | 710 | writeb(xmit->buf[xmit->tail], &channel->data); |
| 711 | ZSDELAY(); | 711 | ZSDELAY(); |
diff --git a/drivers/serial/timbuart.c b/drivers/serial/timbuart.c index 063a313b755c..34b31da01d09 100644 --- a/drivers/serial/timbuart.c +++ b/drivers/serial/timbuart.c | |||
| @@ -77,7 +77,7 @@ static void timbuart_flush_buffer(struct uart_port *port) | |||
| 77 | 77 | ||
| 78 | static void timbuart_rx_chars(struct uart_port *port) | 78 | static void timbuart_rx_chars(struct uart_port *port) |
| 79 | { | 79 | { |
| 80 | struct tty_struct *tty = port->info->port.tty; | 80 | struct tty_struct *tty = port->state->port.tty; |
| 81 | 81 | ||
| 82 | while (ioread32(port->membase + TIMBUART_ISR) & RXDP) { | 82 | while (ioread32(port->membase + TIMBUART_ISR) & RXDP) { |
| 83 | u8 ch = ioread8(port->membase + TIMBUART_RXFIFO); | 83 | u8 ch = ioread8(port->membase + TIMBUART_RXFIFO); |
| @@ -86,7 +86,7 @@ static void timbuart_rx_chars(struct uart_port *port) | |||
| 86 | } | 86 | } |
| 87 | 87 | ||
| 88 | spin_unlock(&port->lock); | 88 | spin_unlock(&port->lock); |
| 89 | tty_flip_buffer_push(port->info->port.tty); | 89 | tty_flip_buffer_push(port->state->port.tty); |
| 90 | spin_lock(&port->lock); | 90 | spin_lock(&port->lock); |
| 91 | 91 | ||
| 92 | dev_dbg(port->dev, "%s - total read %d bytes\n", | 92 | dev_dbg(port->dev, "%s - total read %d bytes\n", |
| @@ -95,7 +95,7 @@ static void timbuart_rx_chars(struct uart_port *port) | |||
| 95 | 95 | ||
| 96 | static void timbuart_tx_chars(struct uart_port *port) | 96 | static void timbuart_tx_chars(struct uart_port *port) |
| 97 | { | 97 | { |
| 98 | struct circ_buf *xmit = &port->info->xmit; | 98 | struct circ_buf *xmit = &port->state->xmit; |
| 99 | 99 | ||
| 100 | while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) && | 100 | while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) && |
| 101 | !uart_circ_empty(xmit)) { | 101 | !uart_circ_empty(xmit)) { |
| @@ -118,7 +118,7 @@ static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier) | |||
| 118 | { | 118 | { |
| 119 | struct timbuart_port *uart = | 119 | struct timbuart_port *uart = |
| 120 | container_of(port, struct timbuart_port, port); | 120 | container_of(port, struct timbuart_port, port); |
| 121 | struct circ_buf *xmit = &port->info->xmit; | 121 | struct circ_buf *xmit = &port->state->xmit; |
| 122 | 122 | ||
| 123 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) | 123 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
| 124 | return; | 124 | return; |
| @@ -231,7 +231,7 @@ static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier) | |||
| 231 | iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR); | 231 | iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR); |
| 232 | cts = timbuart_get_mctrl(port); | 232 | cts = timbuart_get_mctrl(port); |
| 233 | uart_handle_cts_change(port, cts & TIOCM_CTS); | 233 | uart_handle_cts_change(port, cts & TIOCM_CTS); |
| 234 | wake_up_interruptible(&port->info->delta_msr_wait); | 234 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
| 235 | } | 235 | } |
| 236 | 236 | ||
| 237 | *ier |= CTS_DELTA; | 237 | *ier |= CTS_DELTA; |
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c index 3317148a4b93..377f2712289e 100644 --- a/drivers/serial/uartlite.c +++ b/drivers/serial/uartlite.c | |||
| @@ -75,7 +75,7 @@ static struct uart_port ulite_ports[ULITE_NR_UARTS]; | |||
| 75 | 75 | ||
| 76 | static int ulite_receive(struct uart_port *port, int stat) | 76 | static int ulite_receive(struct uart_port *port, int stat) |
| 77 | { | 77 | { |
| 78 | struct tty_struct *tty = port->info->port.tty; | 78 | struct tty_struct *tty = port->state->port.tty; |
| 79 | unsigned char ch = 0; | 79 | unsigned char ch = 0; |
| 80 | char flag = TTY_NORMAL; | 80 | char flag = TTY_NORMAL; |
| 81 | 81 | ||
| @@ -125,7 +125,7 @@ static int ulite_receive(struct uart_port *port, int stat) | |||
| 125 | 125 | ||
| 126 | static int ulite_transmit(struct uart_port *port, int stat) | 126 | static int ulite_transmit(struct uart_port *port, int stat) |
| 127 | { | 127 | { |
| 128 | struct circ_buf *xmit = &port->info->xmit; | 128 | struct circ_buf *xmit = &port->state->xmit; |
| 129 | 129 | ||
| 130 | if (stat & ULITE_STATUS_TXFULL) | 130 | if (stat & ULITE_STATUS_TXFULL) |
| 131 | return 0; | 131 | return 0; |
| @@ -154,17 +154,22 @@ static int ulite_transmit(struct uart_port *port, int stat) | |||
| 154 | static irqreturn_t ulite_isr(int irq, void *dev_id) | 154 | static irqreturn_t ulite_isr(int irq, void *dev_id) |
| 155 | { | 155 | { |
| 156 | struct uart_port *port = dev_id; | 156 | struct uart_port *port = dev_id; |
| 157 | int busy; | 157 | int busy, n = 0; |
| 158 | 158 | ||
| 159 | do { | 159 | do { |
| 160 | int stat = readb(port->membase + ULITE_STATUS); | 160 | int stat = readb(port->membase + ULITE_STATUS); |
| 161 | busy = ulite_receive(port, stat); | 161 | busy = ulite_receive(port, stat); |
| 162 | busy |= ulite_transmit(port, stat); | 162 | busy |= ulite_transmit(port, stat); |
| 163 | n++; | ||
| 163 | } while (busy); | 164 | } while (busy); |
| 164 | 165 | ||
| 165 | tty_flip_buffer_push(port->info->port.tty); | 166 | /* work done? */ |
| 166 | 167 | if (n > 1) { | |
| 167 | return IRQ_HANDLED; | 168 | tty_flip_buffer_push(port->state->port.tty); |
| 169 | return IRQ_HANDLED; | ||
| 170 | } else { | ||
| 171 | return IRQ_NONE; | ||
| 172 | } | ||
| 168 | } | 173 | } |
| 169 | 174 | ||
| 170 | static unsigned int ulite_tx_empty(struct uart_port *port) | 175 | static unsigned int ulite_tx_empty(struct uart_port *port) |
| @@ -221,7 +226,7 @@ static int ulite_startup(struct uart_port *port) | |||
| 221 | int ret; | 226 | int ret; |
| 222 | 227 | ||
| 223 | ret = request_irq(port->irq, ulite_isr, | 228 | ret = request_irq(port->irq, ulite_isr, |
| 224 | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port); | 229 | IRQF_SHARED | IRQF_SAMPLE_RANDOM, "uartlite", port); |
| 225 | if (ret) | 230 | if (ret) |
| 226 | return ret; | 231 | return ret; |
| 227 | 232 | ||
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c index e945e780b5c9..0c08f286a2ef 100644 --- a/drivers/serial/ucc_uart.c +++ b/drivers/serial/ucc_uart.c | |||
| @@ -327,7 +327,7 @@ static int qe_uart_tx_pump(struct uart_qe_port *qe_port) | |||
| 327 | unsigned char *p; | 327 | unsigned char *p; |
| 328 | unsigned int count; | 328 | unsigned int count; |
| 329 | struct uart_port *port = &qe_port->port; | 329 | struct uart_port *port = &qe_port->port; |
| 330 | struct circ_buf *xmit = &port->info->xmit; | 330 | struct circ_buf *xmit = &port->state->xmit; |
| 331 | 331 | ||
| 332 | bdp = qe_port->rx_cur; | 332 | bdp = qe_port->rx_cur; |
| 333 | 333 | ||
| @@ -466,7 +466,7 @@ static void qe_uart_int_rx(struct uart_qe_port *qe_port) | |||
| 466 | int i; | 466 | int i; |
| 467 | unsigned char ch, *cp; | 467 | unsigned char ch, *cp; |
| 468 | struct uart_port *port = &qe_port->port; | 468 | struct uart_port *port = &qe_port->port; |
| 469 | struct tty_struct *tty = port->info->port.tty; | 469 | struct tty_struct *tty = port->state->port.tty; |
| 470 | struct qe_bd *bdp; | 470 | struct qe_bd *bdp; |
| 471 | u16 status; | 471 | u16 status; |
| 472 | unsigned int flg; | 472 | unsigned int flg; |
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c index dac550e57c29..3beb6ab4fa68 100644 --- a/drivers/serial/vr41xx_siu.c +++ b/drivers/serial/vr41xx_siu.c | |||
| @@ -318,7 +318,7 @@ static inline void receive_chars(struct uart_port *port, uint8_t *status) | |||
| 318 | char flag; | 318 | char flag; |
| 319 | int max_count = RX_MAX_COUNT; | 319 | int max_count = RX_MAX_COUNT; |
| 320 | 320 | ||
| 321 | tty = port->info->port.tty; | 321 | tty = port->state->port.tty; |
| 322 | lsr = *status; | 322 | lsr = *status; |
| 323 | 323 | ||
| 324 | do { | 324 | do { |
| @@ -386,7 +386,7 @@ static inline void check_modem_status(struct uart_port *port) | |||
| 386 | if (msr & UART_MSR_DCTS) | 386 | if (msr & UART_MSR_DCTS) |
| 387 | uart_handle_cts_change(port, msr & UART_MSR_CTS); | 387 | uart_handle_cts_change(port, msr & UART_MSR_CTS); |
| 388 | 388 | ||
| 389 | wake_up_interruptible(&port->info->delta_msr_wait); | 389 | wake_up_interruptible(&port->state->port.delta_msr_wait); |
| 390 | } | 390 | } |
| 391 | 391 | ||
| 392 | static inline void transmit_chars(struct uart_port *port) | 392 | static inline void transmit_chars(struct uart_port *port) |
| @@ -394,7 +394,7 @@ static inline void transmit_chars(struct uart_port *port) | |||
| 394 | struct circ_buf *xmit; | 394 | struct circ_buf *xmit; |
| 395 | int max_count = TX_MAX_COUNT; | 395 | int max_count = TX_MAX_COUNT; |
| 396 | 396 | ||
| 397 | xmit = &port->info->xmit; | 397 | xmit = &port->state->xmit; |
| 398 | 398 | ||
| 399 | if (port->x_char) { | 399 | if (port->x_char) { |
| 400 | siu_write(port, UART_TX, port->x_char); | 400 | siu_write(port, UART_TX, port->x_char); |
diff --git a/drivers/serial/zs.c b/drivers/serial/zs.c index d8c2809b1ab6..1a7fd3e70315 100644 --- a/drivers/serial/zs.c +++ b/drivers/serial/zs.c | |||
| @@ -602,12 +602,12 @@ static void zs_receive_chars(struct zs_port *zport) | |||
| 602 | uart_insert_char(uport, status, Rx_OVR, ch, flag); | 602 | uart_insert_char(uport, status, Rx_OVR, ch, flag); |
| 603 | } | 603 | } |
| 604 | 604 | ||
| 605 | tty_flip_buffer_push(uport->info->port.tty); | 605 | tty_flip_buffer_push(uport->state->port.tty); |
| 606 | } | 606 | } |
| 607 | 607 | ||
| 608 | static void zs_raw_transmit_chars(struct zs_port *zport) | 608 | static void zs_raw_transmit_chars(struct zs_port *zport) |
| 609 | { | 609 | { |
| 610 | struct circ_buf *xmit = &zport->port.info->xmit; | 610 | struct circ_buf *xmit = &zport->port.state->xmit; |
| 611 | 611 | ||
| 612 | /* XON/XOFF chars. */ | 612 | /* XON/XOFF chars. */ |
| 613 | if (zport->port.x_char) { | 613 | if (zport->port.x_char) { |
| @@ -686,7 +686,7 @@ static void zs_status_handle(struct zs_port *zport, struct zs_port *zport_a) | |||
| 686 | uport->icount.rng++; | 686 | uport->icount.rng++; |
| 687 | 687 | ||
| 688 | if (delta) | 688 | if (delta) |
| 689 | wake_up_interruptible(&uport->info->delta_msr_wait); | 689 | wake_up_interruptible(&uport->state->port.delta_msr_wait); |
| 690 | 690 | ||
| 691 | spin_lock(&scc->zlock); | 691 | spin_lock(&scc->zlock); |
| 692 | } | 692 | } |
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c index 3dd231a643b5..559b5fe9dc0f 100644 --- a/drivers/sh/intc.c +++ b/drivers/sh/intc.c | |||
| @@ -77,7 +77,7 @@ static unsigned long ack_handle[NR_IRQS]; | |||
| 77 | static inline struct intc_desc_int *get_intc_desc(unsigned int irq) | 77 | static inline struct intc_desc_int *get_intc_desc(unsigned int irq) |
| 78 | { | 78 | { |
| 79 | struct irq_chip *chip = get_irq_chip(irq); | 79 | struct irq_chip *chip = get_irq_chip(irq); |
| 80 | return (void *)((char *)chip - offsetof(struct intc_desc_int, chip)); | 80 | return container_of(chip, struct intc_desc_int, chip); |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | static inline unsigned int set_field(unsigned int value, | 83 | static inline unsigned int set_field(unsigned int value, |
| @@ -95,16 +95,19 @@ static inline unsigned int set_field(unsigned int value, | |||
| 95 | static void write_8(unsigned long addr, unsigned long h, unsigned long data) | 95 | static void write_8(unsigned long addr, unsigned long h, unsigned long data) |
| 96 | { | 96 | { |
| 97 | __raw_writeb(set_field(0, data, h), addr); | 97 | __raw_writeb(set_field(0, data, h), addr); |
| 98 | (void)__raw_readb(addr); /* Defeat write posting */ | ||
| 98 | } | 99 | } |
| 99 | 100 | ||
| 100 | static void write_16(unsigned long addr, unsigned long h, unsigned long data) | 101 | static void write_16(unsigned long addr, unsigned long h, unsigned long data) |
| 101 | { | 102 | { |
| 102 | __raw_writew(set_field(0, data, h), addr); | 103 | __raw_writew(set_field(0, data, h), addr); |
| 104 | (void)__raw_readw(addr); /* Defeat write posting */ | ||
| 103 | } | 105 | } |
| 104 | 106 | ||
| 105 | static void write_32(unsigned long addr, unsigned long h, unsigned long data) | 107 | static void write_32(unsigned long addr, unsigned long h, unsigned long data) |
| 106 | { | 108 | { |
| 107 | __raw_writel(set_field(0, data, h), addr); | 109 | __raw_writel(set_field(0, data, h), addr); |
| 110 | (void)__raw_readl(addr); /* Defeat write posting */ | ||
| 108 | } | 111 | } |
| 109 | 112 | ||
| 110 | static void modify_8(unsigned long addr, unsigned long h, unsigned long data) | 113 | static void modify_8(unsigned long addr, unsigned long h, unsigned long data) |
| @@ -112,6 +115,7 @@ static void modify_8(unsigned long addr, unsigned long h, unsigned long data) | |||
| 112 | unsigned long flags; | 115 | unsigned long flags; |
| 113 | local_irq_save(flags); | 116 | local_irq_save(flags); |
| 114 | __raw_writeb(set_field(__raw_readb(addr), data, h), addr); | 117 | __raw_writeb(set_field(__raw_readb(addr), data, h), addr); |
| 118 | (void)__raw_readb(addr); /* Defeat write posting */ | ||
| 115 | local_irq_restore(flags); | 119 | local_irq_restore(flags); |
| 116 | } | 120 | } |
| 117 | 121 | ||
| @@ -120,6 +124,7 @@ static void modify_16(unsigned long addr, unsigned long h, unsigned long data) | |||
| 120 | unsigned long flags; | 124 | unsigned long flags; |
| 121 | local_irq_save(flags); | 125 | local_irq_save(flags); |
| 122 | __raw_writew(set_field(__raw_readw(addr), data, h), addr); | 126 | __raw_writew(set_field(__raw_readw(addr), data, h), addr); |
| 127 | (void)__raw_readw(addr); /* Defeat write posting */ | ||
| 123 | local_irq_restore(flags); | 128 | local_irq_restore(flags); |
| 124 | } | 129 | } |
| 125 | 130 | ||
| @@ -128,6 +133,7 @@ static void modify_32(unsigned long addr, unsigned long h, unsigned long data) | |||
| 128 | unsigned long flags; | 133 | unsigned long flags; |
| 129 | local_irq_save(flags); | 134 | local_irq_save(flags); |
| 130 | __raw_writel(set_field(__raw_readl(addr), data, h), addr); | 135 | __raw_writel(set_field(__raw_readl(addr), data, h), addr); |
| 136 | (void)__raw_readl(addr); /* Defeat write posting */ | ||
| 131 | local_irq_restore(flags); | 137 | local_irq_restore(flags); |
| 132 | } | 138 | } |
| 133 | 139 | ||
| @@ -657,16 +663,9 @@ static unsigned int __init save_reg(struct intc_desc_int *d, | |||
| 657 | return 0; | 663 | return 0; |
| 658 | } | 664 | } |
| 659 | 665 | ||
| 660 | static unsigned char *intc_evt2irq_table; | 666 | static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc) |
| 661 | |||
| 662 | unsigned int intc_evt2irq(unsigned int vector) | ||
| 663 | { | 667 | { |
| 664 | unsigned int irq = evt2irq(vector); | 668 | generic_handle_irq((unsigned int)get_irq_data(irq)); |
| 665 | |||
| 666 | if (intc_evt2irq_table && intc_evt2irq_table[irq]) | ||
| 667 | irq = intc_evt2irq_table[irq]; | ||
| 668 | |||
| 669 | return irq; | ||
| 670 | } | 669 | } |
| 671 | 670 | ||
| 672 | void __init register_intc_controller(struct intc_desc *desc) | 671 | void __init register_intc_controller(struct intc_desc *desc) |
| @@ -739,50 +738,48 @@ void __init register_intc_controller(struct intc_desc *desc) | |||
| 739 | 738 | ||
| 740 | BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ | 739 | BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ |
| 741 | 740 | ||
| 742 | /* keep the first vector only if same enum is used multiple times */ | 741 | /* register the vectors one by one */ |
| 743 | for (i = 0; i < desc->nr_vectors; i++) { | 742 | for (i = 0; i < desc->nr_vectors; i++) { |
| 744 | struct intc_vect *vect = desc->vectors + i; | 743 | struct intc_vect *vect = desc->vectors + i; |
| 745 | int first_irq = evt2irq(vect->vect); | 744 | unsigned int irq = evt2irq(vect->vect); |
| 745 | struct irq_desc *irq_desc; | ||
| 746 | 746 | ||
| 747 | if (!vect->enum_id) | 747 | if (!vect->enum_id) |
| 748 | continue; | 748 | continue; |
| 749 | 749 | ||
| 750 | irq_desc = irq_to_desc_alloc_node(irq, numa_node_id()); | ||
| 751 | if (unlikely(!irq_desc)) { | ||
| 752 | pr_info("can't get irq_desc for %d\n", irq); | ||
| 753 | continue; | ||
| 754 | } | ||
| 755 | |||
| 756 | intc_register_irq(desc, d, vect->enum_id, irq); | ||
| 757 | |||
| 750 | for (k = i + 1; k < desc->nr_vectors; k++) { | 758 | for (k = i + 1; k < desc->nr_vectors; k++) { |
| 751 | struct intc_vect *vect2 = desc->vectors + k; | 759 | struct intc_vect *vect2 = desc->vectors + k; |
| 760 | unsigned int irq2 = evt2irq(vect2->vect); | ||
| 752 | 761 | ||
| 753 | if (vect->enum_id != vect2->enum_id) | 762 | if (vect->enum_id != vect2->enum_id) |
| 754 | continue; | 763 | continue; |
| 755 | 764 | ||
| 756 | vect2->enum_id = 0; | 765 | /* |
| 757 | 766 | * In the case of multi-evt handling and sparse | |
| 758 | if (!intc_evt2irq_table) | 767 | * IRQ support, each vector still needs to have |
| 759 | intc_evt2irq_table = kzalloc(NR_IRQS, GFP_NOWAIT); | 768 | * its own backing irq_desc. |
| 760 | 769 | */ | |
| 761 | if (!intc_evt2irq_table) { | 770 | irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id()); |
| 762 | pr_warning("intc: cannot allocate evt2irq!\n"); | 771 | if (unlikely(!irq_desc)) { |
| 772 | pr_info("can't get irq_desc for %d\n", irq2); | ||
| 763 | continue; | 773 | continue; |
| 764 | } | 774 | } |
| 765 | 775 | ||
| 766 | intc_evt2irq_table[evt2irq(vect2->vect)] = first_irq; | 776 | vect2->enum_id = 0; |
| 767 | } | ||
| 768 | } | ||
| 769 | |||
| 770 | /* register the vectors one by one */ | ||
| 771 | for (i = 0; i < desc->nr_vectors; i++) { | ||
| 772 | struct intc_vect *vect = desc->vectors + i; | ||
| 773 | unsigned int irq = evt2irq(vect->vect); | ||
| 774 | struct irq_desc *irq_desc; | ||
| 775 | |||
| 776 | if (!vect->enum_id) | ||
| 777 | continue; | ||
| 778 | 777 | ||
| 779 | irq_desc = irq_to_desc_alloc_node(irq, numa_node_id()); | 778 | /* redirect this interrupts to the first one */ |
| 780 | if (unlikely(!irq_desc)) { | 779 | set_irq_chip_and_handler_name(irq2, &d->chip, |
| 781 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); | 780 | intc_redirect_irq, "redirect"); |
| 782 | continue; | 781 | set_irq_data(irq2, (void *)irq); |
| 783 | } | 782 | } |
| 784 | |||
| 785 | intc_register_irq(desc, d, vect->enum_id, irq); | ||
| 786 | } | 783 | } |
| 787 | } | 784 | } |
| 788 | 785 | ||
diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c index 3f06818cf9fa..02347c57357d 100644 --- a/drivers/uio/uio_pdrv_genirq.c +++ b/drivers/uio/uio_pdrv_genirq.c | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | #include <linux/bitops.h> | 20 | #include <linux/bitops.h> |
| 21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/stringify.h> | 22 | #include <linux/stringify.h> |
| 23 | #include <linux/pm_runtime.h> | ||
| 23 | 24 | ||
| 24 | #define DRIVER_NAME "uio_pdrv_genirq" | 25 | #define DRIVER_NAME "uio_pdrv_genirq" |
| 25 | 26 | ||
| @@ -27,8 +28,27 @@ struct uio_pdrv_genirq_platdata { | |||
| 27 | struct uio_info *uioinfo; | 28 | struct uio_info *uioinfo; |
| 28 | spinlock_t lock; | 29 | spinlock_t lock; |
| 29 | unsigned long flags; | 30 | unsigned long flags; |
| 31 | struct platform_device *pdev; | ||
| 30 | }; | 32 | }; |
| 31 | 33 | ||
| 34 | static int uio_pdrv_genirq_open(struct uio_info *info, struct inode *inode) | ||
| 35 | { | ||
| 36 | struct uio_pdrv_genirq_platdata *priv = info->priv; | ||
| 37 | |||
| 38 | /* Wait until the Runtime PM code has woken up the device */ | ||
| 39 | pm_runtime_get_sync(&priv->pdev->dev); | ||
| 40 | return 0; | ||
| 41 | } | ||
| 42 | |||
| 43 | static int uio_pdrv_genirq_release(struct uio_info *info, struct inode *inode) | ||
| 44 | { | ||
| 45 | struct uio_pdrv_genirq_platdata *priv = info->priv; | ||
| 46 | |||
| 47 | /* Tell the Runtime PM code that the device has become idle */ | ||
| 48 | pm_runtime_put_sync(&priv->pdev->dev); | ||
| 49 | return 0; | ||
| 50 | } | ||
| 51 | |||
| 32 | static irqreturn_t uio_pdrv_genirq_handler(int irq, struct uio_info *dev_info) | 52 | static irqreturn_t uio_pdrv_genirq_handler(int irq, struct uio_info *dev_info) |
| 33 | { | 53 | { |
| 34 | struct uio_pdrv_genirq_platdata *priv = dev_info->priv; | 54 | struct uio_pdrv_genirq_platdata *priv = dev_info->priv; |
| @@ -97,6 +117,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev) | |||
| 97 | priv->uioinfo = uioinfo; | 117 | priv->uioinfo = uioinfo; |
| 98 | spin_lock_init(&priv->lock); | 118 | spin_lock_init(&priv->lock); |
| 99 | priv->flags = 0; /* interrupt is enabled to begin with */ | 119 | priv->flags = 0; /* interrupt is enabled to begin with */ |
| 120 | priv->pdev = pdev; | ||
| 100 | 121 | ||
| 101 | uiomem = &uioinfo->mem[0]; | 122 | uiomem = &uioinfo->mem[0]; |
| 102 | 123 | ||
| @@ -136,8 +157,17 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev) | |||
| 136 | uioinfo->irq_flags |= IRQF_DISABLED; | 157 | uioinfo->irq_flags |= IRQF_DISABLED; |
| 137 | uioinfo->handler = uio_pdrv_genirq_handler; | 158 | uioinfo->handler = uio_pdrv_genirq_handler; |
| 138 | uioinfo->irqcontrol = uio_pdrv_genirq_irqcontrol; | 159 | uioinfo->irqcontrol = uio_pdrv_genirq_irqcontrol; |
| 160 | uioinfo->open = uio_pdrv_genirq_open; | ||
| 161 | uioinfo->release = uio_pdrv_genirq_release; | ||
| 139 | uioinfo->priv = priv; | 162 | uioinfo->priv = priv; |
| 140 | 163 | ||
| 164 | /* Enable Runtime PM for this device: | ||
| 165 | * The device starts in suspended state to allow the hardware to be | ||
| 166 | * turned off by default. The Runtime PM bus code should power on the | ||
| 167 | * hardware and enable clocks at open(). | ||
| 168 | */ | ||
| 169 | pm_runtime_enable(&pdev->dev); | ||
| 170 | |||
| 141 | ret = uio_register_device(&pdev->dev, priv->uioinfo); | 171 | ret = uio_register_device(&pdev->dev, priv->uioinfo); |
| 142 | if (ret) { | 172 | if (ret) { |
| 143 | dev_err(&pdev->dev, "unable to register uio device\n"); | 173 | dev_err(&pdev->dev, "unable to register uio device\n"); |
| @@ -157,16 +187,40 @@ static int uio_pdrv_genirq_remove(struct platform_device *pdev) | |||
| 157 | struct uio_pdrv_genirq_platdata *priv = platform_get_drvdata(pdev); | 187 | struct uio_pdrv_genirq_platdata *priv = platform_get_drvdata(pdev); |
| 158 | 188 | ||
| 159 | uio_unregister_device(priv->uioinfo); | 189 | uio_unregister_device(priv->uioinfo); |
| 190 | pm_runtime_disable(&pdev->dev); | ||
| 160 | kfree(priv); | 191 | kfree(priv); |
| 161 | return 0; | 192 | return 0; |
| 162 | } | 193 | } |
| 163 | 194 | ||
| 195 | static int uio_pdrv_genirq_runtime_nop(struct device *dev) | ||
| 196 | { | ||
| 197 | /* Runtime PM callback shared between ->runtime_suspend() | ||
| 198 | * and ->runtime_resume(). Simply returns success. | ||
| 199 | * | ||
| 200 | * In this driver pm_runtime_get_sync() and pm_runtime_put_sync() | ||
| 201 | * are used at open() and release() time. This allows the | ||
| 202 | * Runtime PM code to turn off power to the device while the | ||
| 203 | * device is unused, ie before open() and after release(). | ||
| 204 | * | ||
| 205 | * This Runtime PM callback does not need to save or restore | ||
| 206 | * any registers since user space is responsbile for hardware | ||
| 207 | * register reinitialization after open(). | ||
| 208 | */ | ||
| 209 | return 0; | ||
| 210 | } | ||
| 211 | |||
| 212 | static struct dev_pm_ops uio_pdrv_genirq_dev_pm_ops = { | ||
| 213 | .runtime_suspend = uio_pdrv_genirq_runtime_nop, | ||
| 214 | .runtime_resume = uio_pdrv_genirq_runtime_nop, | ||
| 215 | }; | ||
| 216 | |||
| 164 | static struct platform_driver uio_pdrv_genirq = { | 217 | static struct platform_driver uio_pdrv_genirq = { |
| 165 | .probe = uio_pdrv_genirq_probe, | 218 | .probe = uio_pdrv_genirq_probe, |
| 166 | .remove = uio_pdrv_genirq_remove, | 219 | .remove = uio_pdrv_genirq_remove, |
| 167 | .driver = { | 220 | .driver = { |
| 168 | .name = DRIVER_NAME, | 221 | .name = DRIVER_NAME, |
| 169 | .owner = THIS_MODULE, | 222 | .owner = THIS_MODULE, |
| 223 | .pm = &uio_pdrv_genirq_dev_pm_ops, | ||
| 170 | }, | 224 | }, |
| 171 | }; | 225 | }; |
| 172 | 226 | ||
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c index 2bfc41ece0e1..85a1a55815cf 100644 --- a/drivers/usb/class/cdc-acm.c +++ b/drivers/usb/class/cdc-acm.c | |||
| @@ -858,10 +858,7 @@ static void acm_tty_set_termios(struct tty_struct *tty, | |||
| 858 | if (!ACM_READY(acm)) | 858 | if (!ACM_READY(acm)) |
| 859 | return; | 859 | return; |
| 860 | 860 | ||
| 861 | /* FIXME: Needs to support the tty_baud interface */ | 861 | newline.dwDTERate = cpu_to_le32(tty_get_baud_rate(tty)); |
| 862 | /* FIXME: Broken on sparc */ | ||
| 863 | newline.dwDTERate = cpu_to_le32p(acm_tty_speed + | ||
| 864 | (termios->c_cflag & CBAUD & ~CBAUDEX) + (termios->c_cflag & CBAUDEX ? 15 : 0)); | ||
| 865 | newline.bCharFormat = termios->c_cflag & CSTOPB ? 2 : 0; | 862 | newline.bCharFormat = termios->c_cflag & CSTOPB ? 2 : 0; |
| 866 | newline.bParityType = termios->c_cflag & PARENB ? | 863 | newline.bParityType = termios->c_cflag & PARENB ? |
| 867 | (termios->c_cflag & PARODD ? 1 : 2) + | 864 | (termios->c_cflag & PARODD ? 1 : 2) + |
diff --git a/drivers/usb/class/usblp.c b/drivers/usb/class/usblp.c index 26c09f0257db..9bc112ee7803 100644 --- a/drivers/usb/class/usblp.c +++ b/drivers/usb/class/usblp.c | |||
| @@ -1057,14 +1057,14 @@ static const struct file_operations usblp_fops = { | |||
| 1057 | .release = usblp_release, | 1057 | .release = usblp_release, |
| 1058 | }; | 1058 | }; |
| 1059 | 1059 | ||
| 1060 | static char *usblp_nodename(struct device *dev) | 1060 | static char *usblp_devnode(struct device *dev, mode_t *mode) |
| 1061 | { | 1061 | { |
| 1062 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); | 1062 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); |
| 1063 | } | 1063 | } |
| 1064 | 1064 | ||
| 1065 | static struct usb_class_driver usblp_class = { | 1065 | static struct usb_class_driver usblp_class = { |
| 1066 | .name = "lp%d", | 1066 | .name = "lp%d", |
| 1067 | .nodename = usblp_nodename, | 1067 | .devnode = usblp_devnode, |
| 1068 | .fops = &usblp_fops, | 1068 | .fops = &usblp_fops, |
| 1069 | .minor_base = USBLP_MINOR_BASE, | 1069 | .minor_base = USBLP_MINOR_BASE, |
| 1070 | }; | 1070 | }; |
diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c index 5cef88929b3e..222ee07ea680 100644 --- a/drivers/usb/core/file.c +++ b/drivers/usb/core/file.c | |||
| @@ -67,14 +67,14 @@ static struct usb_class { | |||
| 67 | struct class *class; | 67 | struct class *class; |
| 68 | } *usb_class; | 68 | } *usb_class; |
| 69 | 69 | ||
| 70 | static char *usb_nodename(struct device *dev) | 70 | static char *usb_devnode(struct device *dev, mode_t *mode) |
| 71 | { | 71 | { |
| 72 | struct usb_class_driver *drv; | 72 | struct usb_class_driver *drv; |
| 73 | 73 | ||
| 74 | drv = dev_get_drvdata(dev); | 74 | drv = dev_get_drvdata(dev); |
| 75 | if (!drv || !drv->nodename) | 75 | if (!drv || !drv->devnode) |
| 76 | return NULL; | 76 | return NULL; |
| 77 | return drv->nodename(dev); | 77 | return drv->devnode(dev, mode); |
| 78 | } | 78 | } |
| 79 | 79 | ||
| 80 | static int init_usb_class(void) | 80 | static int init_usb_class(void) |
| @@ -100,7 +100,7 @@ static int init_usb_class(void) | |||
| 100 | kfree(usb_class); | 100 | kfree(usb_class); |
| 101 | usb_class = NULL; | 101 | usb_class = NULL; |
| 102 | } | 102 | } |
| 103 | usb_class->class->nodename = usb_nodename; | 103 | usb_class->class->devnode = usb_devnode; |
| 104 | 104 | ||
| 105 | exit: | 105 | exit: |
| 106 | return result; | 106 | return result; |
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c index a26f73880c32..43ee943d757a 100644 --- a/drivers/usb/core/usb.c +++ b/drivers/usb/core/usb.c | |||
| @@ -311,7 +311,7 @@ static struct dev_pm_ops usb_device_pm_ops = { | |||
| 311 | #endif /* CONFIG_PM */ | 311 | #endif /* CONFIG_PM */ |
| 312 | 312 | ||
| 313 | 313 | ||
| 314 | static char *usb_nodename(struct device *dev) | 314 | static char *usb_devnode(struct device *dev, mode_t *mode) |
| 315 | { | 315 | { |
| 316 | struct usb_device *usb_dev; | 316 | struct usb_device *usb_dev; |
| 317 | 317 | ||
| @@ -324,7 +324,7 @@ struct device_type usb_device_type = { | |||
| 324 | .name = "usb_device", | 324 | .name = "usb_device", |
| 325 | .release = usb_release_dev, | 325 | .release = usb_release_dev, |
| 326 | .uevent = usb_dev_uevent, | 326 | .uevent = usb_dev_uevent, |
| 327 | .nodename = usb_nodename, | 327 | .devnode = usb_devnode, |
| 328 | .pm = &usb_device_pm_ops, | 328 | .pm = &usb_device_pm_ops, |
| 329 | }; | 329 | }; |
| 330 | 330 | ||
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 7f8e83a954ac..9f986b417c5b 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig | |||
| @@ -251,6 +251,24 @@ config USB_PXA25X_SMALL | |||
| 251 | default y if USB_ETH | 251 | default y if USB_ETH |
| 252 | default y if USB_G_SERIAL | 252 | default y if USB_G_SERIAL |
| 253 | 253 | ||
| 254 | config USB_GADGET_R8A66597 | ||
| 255 | boolean "Renesas R8A66597 USB Peripheral Controller" | ||
| 256 | select USB_GADGET_DUALSPEED | ||
| 257 | help | ||
| 258 | R8A66597 is a discrete USB host and peripheral controller chip that | ||
| 259 | supports both full and high speed USB 2.0 data transfers. | ||
| 260 | It has nine configurable endpoints, and endpoint zero. | ||
| 261 | |||
| 262 | Say "y" to link the driver statically, or "m" to build a | ||
| 263 | dynamically linked module called "r8a66597_udc" and force all | ||
| 264 | gadget drivers to also be dynamically linked. | ||
| 265 | |||
| 266 | config USB_R8A66597 | ||
| 267 | tristate | ||
| 268 | depends on USB_GADGET_R8A66597 | ||
| 269 | default USB_GADGET | ||
| 270 | select USB_GADGET_SELECTED | ||
| 271 | |||
| 254 | config USB_GADGET_PXA27X | 272 | config USB_GADGET_PXA27X |
| 255 | boolean "PXA 27x" | 273 | boolean "PXA 27x" |
| 256 | depends on ARCH_PXA && (PXA27x || PXA3xx) | 274 | depends on ARCH_PXA && (PXA27x || PXA3xx) |
| @@ -360,16 +378,6 @@ config USB_M66592 | |||
| 360 | default USB_GADGET | 378 | default USB_GADGET |
| 361 | select USB_GADGET_SELECTED | 379 | select USB_GADGET_SELECTED |
| 362 | 380 | ||
| 363 | config SUPERH_BUILT_IN_M66592 | ||
| 364 | boolean "Enable SuperH built-in USB like the M66592" | ||
| 365 | depends on USB_GADGET_M66592 && CPU_SUBTYPE_SH7722 | ||
| 366 | help | ||
| 367 | SH7722 has USB like the M66592. | ||
| 368 | |||
| 369 | The transfer rate is very slow when use "Ethernet Gadget". | ||
| 370 | However, this problem is improved if change a value of | ||
| 371 | NET_IP_ALIGN to 4. | ||
| 372 | |||
| 373 | # | 381 | # |
| 374 | # Controllers available only in discrete form (and all PCI controllers) | 382 | # Controllers available only in discrete form (and all PCI controllers) |
| 375 | # | 383 | # |
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index e6017e6bf6da..9d7b87c52e9f 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile | |||
| @@ -23,6 +23,7 @@ ifeq ($(CONFIG_ARCH_MXC),y) | |||
| 23 | fsl_usb2_udc-objs += fsl_mx3_udc.o | 23 | fsl_usb2_udc-objs += fsl_mx3_udc.o |
| 24 | endif | 24 | endif |
| 25 | obj-$(CONFIG_USB_M66592) += m66592-udc.o | 25 | obj-$(CONFIG_USB_M66592) += m66592-udc.o |
| 26 | obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o | ||
| 26 | obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o | 27 | obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o |
| 27 | obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o | 28 | obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o |
| 28 | obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o | 29 | obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o |
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index 8e0e9a0b7364..f2d270b202f2 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h | |||
| @@ -173,6 +173,12 @@ | |||
| 173 | // CONFIG_USB_GADGET_AU1X00 | 173 | // CONFIG_USB_GADGET_AU1X00 |
| 174 | // ... | 174 | // ... |
| 175 | 175 | ||
| 176 | #ifdef CONFIG_USB_GADGET_R8A66597 | ||
| 177 | #define gadget_is_r8a66597(g) !strcmp("r8a66597_udc", (g)->name) | ||
| 178 | #else | ||
| 179 | #define gadget_is_r8a66597(g) 0 | ||
| 180 | #endif | ||
| 181 | |||
| 176 | 182 | ||
| 177 | /** | 183 | /** |
| 178 | * usb_gadget_controller_number - support bcdDevice id convention | 184 | * usb_gadget_controller_number - support bcdDevice id convention |
| @@ -239,6 +245,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) | |||
| 239 | return 0x23; | 245 | return 0x23; |
| 240 | else if (gadget_is_langwell(gadget)) | 246 | else if (gadget_is_langwell(gadget)) |
| 241 | return 0x24; | 247 | return 0x24; |
| 248 | else if (gadget_is_r8a66597(gadget)) | ||
| 249 | return 0x25; | ||
| 242 | return -ENOENT; | 250 | return -ENOENT; |
| 243 | } | 251 | } |
| 244 | 252 | ||
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c index 43dcf9e1af6b..a8c8543d1b08 100644 --- a/drivers/usb/gadget/m66592-udc.c +++ b/drivers/usb/gadget/m66592-udc.c | |||
| @@ -25,44 +25,18 @@ | |||
| 25 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
| 26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
| 27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
| 28 | 28 | #include <linux/err.h> | |
| 29 | #include <linux/usb/ch9.h> | 29 | #include <linux/usb/ch9.h> |
| 30 | #include <linux/usb/gadget.h> | 30 | #include <linux/usb/gadget.h> |
| 31 | 31 | ||
| 32 | #include "m66592-udc.h" | 32 | #include "m66592-udc.h" |
| 33 | 33 | ||
| 34 | |||
| 35 | MODULE_DESCRIPTION("M66592 USB gadget driver"); | 34 | MODULE_DESCRIPTION("M66592 USB gadget driver"); |
| 36 | MODULE_LICENSE("GPL"); | 35 | MODULE_LICENSE("GPL"); |
| 37 | MODULE_AUTHOR("Yoshihiro Shimoda"); | 36 | MODULE_AUTHOR("Yoshihiro Shimoda"); |
| 38 | MODULE_ALIAS("platform:m66592_udc"); | 37 | MODULE_ALIAS("platform:m66592_udc"); |
| 39 | 38 | ||
| 40 | #define DRIVER_VERSION "18 Oct 2007" | 39 | #define DRIVER_VERSION "21 July 2009" |
| 41 | |||
| 42 | /* module parameters */ | ||
| 43 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | ||
| 44 | static unsigned short endian = M66592_LITTLE; | ||
| 45 | module_param(endian, ushort, 0644); | ||
| 46 | MODULE_PARM_DESC(endian, "data endian: big=0, little=0 (default=0)"); | ||
| 47 | #else | ||
| 48 | static unsigned short clock = M66592_XTAL24; | ||
| 49 | module_param(clock, ushort, 0644); | ||
| 50 | MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0 " | ||
| 51 | "(default=16384)"); | ||
| 52 | |||
| 53 | static unsigned short vif = M66592_LDRV; | ||
| 54 | module_param(vif, ushort, 0644); | ||
| 55 | MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0 (default=32768)"); | ||
| 56 | |||
| 57 | static unsigned short endian; | ||
| 58 | module_param(endian, ushort, 0644); | ||
| 59 | MODULE_PARM_DESC(endian, "data endian: big=256, little=0 (default=0)"); | ||
| 60 | |||
| 61 | static unsigned short irq_sense = M66592_INTL; | ||
| 62 | module_param(irq_sense, ushort, 0644); | ||
| 63 | MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0 " | ||
| 64 | "(default=2)"); | ||
| 65 | #endif | ||
| 66 | 40 | ||
| 67 | static const char udc_name[] = "m66592_udc"; | 41 | static const char udc_name[] = "m66592_udc"; |
| 68 | static const char *m66592_ep_name[] = { | 42 | static const char *m66592_ep_name[] = { |
| @@ -244,6 +218,7 @@ static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum) | |||
| 244 | static inline void pipe_change(struct m66592 *m66592, u16 pipenum) | 218 | static inline void pipe_change(struct m66592 *m66592, u16 pipenum) |
| 245 | { | 219 | { |
| 246 | struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; | 220 | struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; |
| 221 | unsigned short mbw; | ||
| 247 | 222 | ||
| 248 | if (ep->use_dma) | 223 | if (ep->use_dma) |
| 249 | return; | 224 | return; |
| @@ -252,7 +227,12 @@ static inline void pipe_change(struct m66592 *m66592, u16 pipenum) | |||
| 252 | 227 | ||
| 253 | ndelay(450); | 228 | ndelay(450); |
| 254 | 229 | ||
| 255 | m66592_bset(m66592, M66592_MBW, ep->fifosel); | 230 | if (m66592->pdata->on_chip) |
| 231 | mbw = M66592_MBW_32; | ||
| 232 | else | ||
| 233 | mbw = M66592_MBW_16; | ||
| 234 | |||
| 235 | m66592_bset(m66592, mbw, ep->fifosel); | ||
| 256 | } | 236 | } |
| 257 | 237 | ||
| 258 | static int pipe_buffer_setting(struct m66592 *m66592, | 238 | static int pipe_buffer_setting(struct m66592 *m66592, |
| @@ -276,24 +256,27 @@ static int pipe_buffer_setting(struct m66592 *m66592, | |||
| 276 | buf_bsize = 0; | 256 | buf_bsize = 0; |
| 277 | break; | 257 | break; |
| 278 | case M66592_BULK: | 258 | case M66592_BULK: |
| 279 | bufnum = m66592->bi_bufnum + | 259 | /* isochronous pipes may be used as bulk pipes */ |
| 280 | (info->pipe - M66592_BASE_PIPENUM_BULK) * 16; | 260 | if (info->pipe > M66592_BASE_PIPENUM_BULK) |
| 281 | m66592->bi_bufnum += 16; | 261 | bufnum = info->pipe - M66592_BASE_PIPENUM_BULK; |
| 262 | else | ||
| 263 | bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC; | ||
| 264 | |||
| 265 | bufnum = M66592_BASE_BUFNUM + (bufnum * 16); | ||
| 282 | buf_bsize = 7; | 266 | buf_bsize = 7; |
| 283 | pipecfg |= M66592_DBLB; | 267 | pipecfg |= M66592_DBLB; |
| 284 | if (!info->dir_in) | 268 | if (!info->dir_in) |
| 285 | pipecfg |= M66592_SHTNAK; | 269 | pipecfg |= M66592_SHTNAK; |
| 286 | break; | 270 | break; |
| 287 | case M66592_ISO: | 271 | case M66592_ISO: |
| 288 | bufnum = m66592->bi_bufnum + | 272 | bufnum = M66592_BASE_BUFNUM + |
| 289 | (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; | 273 | (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; |
| 290 | m66592->bi_bufnum += 16; | ||
| 291 | buf_bsize = 7; | 274 | buf_bsize = 7; |
| 292 | break; | 275 | break; |
| 293 | } | 276 | } |
| 294 | if (m66592->bi_bufnum > M66592_MAX_BUFNUM) { | 277 | |
| 295 | pr_err("m66592 pipe memory is insufficient(%d)\n", | 278 | if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) { |
| 296 | m66592->bi_bufnum); | 279 | pr_err("m66592 pipe memory is insufficient\n"); |
| 297 | return -ENOMEM; | 280 | return -ENOMEM; |
| 298 | } | 281 | } |
| 299 | 282 | ||
| @@ -313,17 +296,6 @@ static void pipe_buffer_release(struct m66592 *m66592, | |||
| 313 | if (info->pipe == 0) | 296 | if (info->pipe == 0) |
| 314 | return; | 297 | return; |
| 315 | 298 | ||
| 316 | switch (info->type) { | ||
| 317 | case M66592_BULK: | ||
| 318 | if (is_bulk_pipe(info->pipe)) | ||
| 319 | m66592->bi_bufnum -= 16; | ||
| 320 | break; | ||
| 321 | case M66592_ISO: | ||
| 322 | if (is_isoc_pipe(info->pipe)) | ||
| 323 | m66592->bi_bufnum -= 16; | ||
| 324 | break; | ||
| 325 | } | ||
| 326 | |||
| 327 | if (is_bulk_pipe(info->pipe)) { | 299 | if (is_bulk_pipe(info->pipe)) { |
| 328 | m66592->bulk--; | 300 | m66592->bulk--; |
| 329 | } else if (is_interrupt_pipe(info->pipe)) | 301 | } else if (is_interrupt_pipe(info->pipe)) |
| @@ -340,6 +312,7 @@ static void pipe_buffer_release(struct m66592 *m66592, | |||
| 340 | static void pipe_initialize(struct m66592_ep *ep) | 312 | static void pipe_initialize(struct m66592_ep *ep) |
| 341 | { | 313 | { |
| 342 | struct m66592 *m66592 = ep->m66592; | 314 | struct m66592 *m66592 = ep->m66592; |
| 315 | unsigned short mbw; | ||
| 343 | 316 | ||
| 344 | m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); | 317 | m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); |
| 345 | 318 | ||
| @@ -351,7 +324,12 @@ static void pipe_initialize(struct m66592_ep *ep) | |||
| 351 | 324 | ||
| 352 | ndelay(450); | 325 | ndelay(450); |
| 353 | 326 | ||
| 354 | m66592_bset(m66592, M66592_MBW, ep->fifosel); | 327 | if (m66592->pdata->on_chip) |
| 328 | mbw = M66592_MBW_32; | ||
| 329 | else | ||
| 330 | mbw = M66592_MBW_16; | ||
| 331 | |||
| 332 | m66592_bset(m66592, mbw, ep->fifosel); | ||
| 355 | } | 333 | } |
| 356 | } | 334 | } |
| 357 | 335 | ||
| @@ -367,15 +345,13 @@ static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep, | |||
| 367 | ep->fifosel = M66592_D0FIFOSEL; | 345 | ep->fifosel = M66592_D0FIFOSEL; |
| 368 | ep->fifoctr = M66592_D0FIFOCTR; | 346 | ep->fifoctr = M66592_D0FIFOCTR; |
| 369 | ep->fifotrn = M66592_D0FIFOTRN; | 347 | ep->fifotrn = M66592_D0FIFOTRN; |
| 370 | #if !defined(CONFIG_SUPERH_BUILT_IN_M66592) | 348 | } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) { |
| 371 | } else if (m66592->num_dma == 1) { | ||
| 372 | m66592->num_dma++; | 349 | m66592->num_dma++; |
| 373 | ep->use_dma = 1; | 350 | ep->use_dma = 1; |
| 374 | ep->fifoaddr = M66592_D1FIFO; | 351 | ep->fifoaddr = M66592_D1FIFO; |
| 375 | ep->fifosel = M66592_D1FIFOSEL; | 352 | ep->fifosel = M66592_D1FIFOSEL; |
| 376 | ep->fifoctr = M66592_D1FIFOCTR; | 353 | ep->fifoctr = M66592_D1FIFOCTR; |
| 377 | ep->fifotrn = M66592_D1FIFOTRN; | 354 | ep->fifotrn = M66592_D1FIFOTRN; |
| 378 | #endif | ||
| 379 | } else { | 355 | } else { |
| 380 | ep->use_dma = 0; | 356 | ep->use_dma = 0; |
| 381 | ep->fifoaddr = M66592_CFIFO; | 357 | ep->fifoaddr = M66592_CFIFO; |
| @@ -620,76 +596,120 @@ static void start_ep0(struct m66592_ep *ep, struct m66592_request *req) | |||
| 620 | } | 596 | } |
| 621 | } | 597 | } |
| 622 | 598 | ||
| 623 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | ||
| 624 | static void init_controller(struct m66592 *m66592) | 599 | static void init_controller(struct m66592 *m66592) |
| 625 | { | 600 | { |
| 626 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ | 601 | unsigned int endian; |
| 627 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); | ||
| 628 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | ||
| 629 | m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); | ||
| 630 | 602 | ||
| 631 | /* This is a workaound for SH7722 2nd cut */ | 603 | if (m66592->pdata->on_chip) { |
| 632 | m66592_bset(m66592, 0x8000, M66592_DVSTCTR); | 604 | if (m66592->pdata->endian) |
| 633 | m66592_bset(m66592, 0x1000, M66592_TESTMODE); | 605 | endian = 0; /* big endian */ |
| 634 | m66592_bclr(m66592, 0x8000, M66592_DVSTCTR); | 606 | else |
| 607 | endian = M66592_LITTLE; /* little endian */ | ||
| 635 | 608 | ||
| 636 | m66592_bset(m66592, M66592_INTL, M66592_INTENB1); | 609 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ |
| 610 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); | ||
| 611 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | ||
| 612 | m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); | ||
| 637 | 613 | ||
| 638 | m66592_write(m66592, 0, M66592_CFBCFG); | 614 | /* This is a workaound for SH7722 2nd cut */ |
| 639 | m66592_write(m66592, 0, M66592_D0FBCFG); | 615 | m66592_bset(m66592, 0x8000, M66592_DVSTCTR); |
| 640 | m66592_bset(m66592, endian, M66592_CFBCFG); | 616 | m66592_bset(m66592, 0x1000, M66592_TESTMODE); |
| 641 | m66592_bset(m66592, endian, M66592_D0FBCFG); | 617 | m66592_bclr(m66592, 0x8000, M66592_DVSTCTR); |
| 642 | } | ||
| 643 | #else /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */ | ||
| 644 | static void init_controller(struct m66592 *m66592) | ||
| 645 | { | ||
| 646 | m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND), | ||
| 647 | M66592_PINCFG); | ||
| 648 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ | ||
| 649 | m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG); | ||
| 650 | 618 | ||
| 651 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); | 619 | m66592_bset(m66592, M66592_INTL, M66592_INTENB1); |
| 652 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | 620 | |
| 653 | m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); | 621 | m66592_write(m66592, 0, M66592_CFBCFG); |
| 622 | m66592_write(m66592, 0, M66592_D0FBCFG); | ||
| 623 | m66592_bset(m66592, endian, M66592_CFBCFG); | ||
| 624 | m66592_bset(m66592, endian, M66592_D0FBCFG); | ||
| 625 | } else { | ||
| 626 | unsigned int clock, vif, irq_sense; | ||
| 627 | |||
| 628 | if (m66592->pdata->endian) | ||
| 629 | endian = M66592_BIGEND; /* big endian */ | ||
| 630 | else | ||
| 631 | endian = 0; /* little endian */ | ||
| 632 | |||
| 633 | if (m66592->pdata->vif) | ||
| 634 | vif = M66592_LDRV; /* 3.3v */ | ||
| 635 | else | ||
| 636 | vif = 0; /* 1.5v */ | ||
| 637 | |||
| 638 | switch (m66592->pdata->xtal) { | ||
| 639 | case M66592_PLATDATA_XTAL_12MHZ: | ||
| 640 | clock = M66592_XTAL12; | ||
| 641 | break; | ||
| 642 | case M66592_PLATDATA_XTAL_24MHZ: | ||
| 643 | clock = M66592_XTAL24; | ||
| 644 | break; | ||
| 645 | case M66592_PLATDATA_XTAL_48MHZ: | ||
| 646 | clock = M66592_XTAL48; | ||
| 647 | break; | ||
| 648 | default: | ||
| 649 | pr_warning("m66592-udc: xtal configuration error\n"); | ||
| 650 | clock = 0; | ||
| 651 | } | ||
| 652 | |||
| 653 | switch (m66592->irq_trigger) { | ||
| 654 | case IRQF_TRIGGER_LOW: | ||
| 655 | irq_sense = M66592_INTL; | ||
| 656 | break; | ||
| 657 | case IRQF_TRIGGER_FALLING: | ||
| 658 | irq_sense = 0; | ||
| 659 | break; | ||
| 660 | default: | ||
| 661 | pr_warning("m66592-udc: irq trigger config error\n"); | ||
| 662 | irq_sense = 0; | ||
| 663 | } | ||
| 654 | 664 | ||
| 655 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); | 665 | m66592_bset(m66592, |
| 666 | (vif & M66592_LDRV) | (endian & M66592_BIGEND), | ||
| 667 | M66592_PINCFG); | ||
| 668 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ | ||
| 669 | m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, | ||
| 670 | M66592_SYSCFG); | ||
| 671 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); | ||
| 672 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | ||
| 673 | m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); | ||
| 674 | |||
| 675 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); | ||
| 656 | 676 | ||
| 657 | msleep(3); | 677 | msleep(3); |
| 658 | 678 | ||
| 659 | m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); | 679 | m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); |
| 660 | 680 | ||
| 661 | msleep(1); | 681 | msleep(1); |
| 662 | 682 | ||
| 663 | m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); | 683 | m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); |
| 664 | 684 | ||
| 665 | m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); | 685 | m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); |
| 666 | m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, | 686 | m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, |
| 667 | M66592_DMA0CFG); | 687 | M66592_DMA0CFG); |
| 688 | } | ||
| 668 | } | 689 | } |
| 669 | #endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */ | ||
| 670 | 690 | ||
| 671 | static void disable_controller(struct m66592 *m66592) | 691 | static void disable_controller(struct m66592 *m66592) |
| 672 | { | 692 | { |
| 673 | #if !defined(CONFIG_SUPERH_BUILT_IN_M66592) | 693 | if (!m66592->pdata->on_chip) { |
| 674 | m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); | 694 | m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); |
| 675 | udelay(1); | 695 | udelay(1); |
| 676 | m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); | 696 | m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); |
| 677 | udelay(1); | 697 | udelay(1); |
| 678 | m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); | 698 | m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); |
| 679 | udelay(1); | 699 | udelay(1); |
| 680 | m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); | 700 | m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); |
| 681 | #endif | 701 | } |
| 682 | } | 702 | } |
| 683 | 703 | ||
| 684 | static void m66592_start_xclock(struct m66592 *m66592) | 704 | static void m66592_start_xclock(struct m66592 *m66592) |
| 685 | { | 705 | { |
| 686 | #if !defined(CONFIG_SUPERH_BUILT_IN_M66592) | ||
| 687 | u16 tmp; | 706 | u16 tmp; |
| 688 | 707 | ||
| 689 | tmp = m66592_read(m66592, M66592_SYSCFG); | 708 | if (!m66592->pdata->on_chip) { |
| 690 | if (!(tmp & M66592_XCKE)) | 709 | tmp = m66592_read(m66592, M66592_SYSCFG); |
| 691 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); | 710 | if (!(tmp & M66592_XCKE)) |
| 692 | #endif | 711 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); |
| 712 | } | ||
| 693 | } | 713 | } |
| 694 | 714 | ||
| 695 | /*-------------------------------------------------------------------------*/ | 715 | /*-------------------------------------------------------------------------*/ |
| @@ -1177,8 +1197,7 @@ static irqreturn_t m66592_irq(int irq, void *_m66592) | |||
| 1177 | intsts0 = m66592_read(m66592, M66592_INTSTS0); | 1197 | intsts0 = m66592_read(m66592, M66592_INTSTS0); |
| 1178 | intenb0 = m66592_read(m66592, M66592_INTENB0); | 1198 | intenb0 = m66592_read(m66592, M66592_INTENB0); |
| 1179 | 1199 | ||
| 1180 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 1200 | if (m66592->pdata->on_chip && !intsts0 && !intenb0) { |
| 1181 | if (!intsts0 && !intenb0) { | ||
| 1182 | /* | 1201 | /* |
| 1183 | * When USB clock stops, it cannot read register. Even if a | 1202 | * When USB clock stops, it cannot read register. Even if a |
| 1184 | * clock stops, the interrupt occurs. So this driver turn on | 1203 | * clock stops, the interrupt occurs. So this driver turn on |
| @@ -1188,7 +1207,6 @@ static irqreturn_t m66592_irq(int irq, void *_m66592) | |||
| 1188 | intsts0 = m66592_read(m66592, M66592_INTSTS0); | 1207 | intsts0 = m66592_read(m66592, M66592_INTSTS0); |
| 1189 | intenb0 = m66592_read(m66592, M66592_INTENB0); | 1208 | intenb0 = m66592_read(m66592, M66592_INTENB0); |
| 1190 | } | 1209 | } |
| 1191 | #endif | ||
| 1192 | 1210 | ||
| 1193 | savepipe = m66592_read(m66592, M66592_CFIFOSEL); | 1211 | savepipe = m66592_read(m66592, M66592_CFIFOSEL); |
| 1194 | 1212 | ||
| @@ -1534,9 +1552,11 @@ static int __exit m66592_remove(struct platform_device *pdev) | |||
| 1534 | iounmap(m66592->reg); | 1552 | iounmap(m66592->reg); |
| 1535 | free_irq(platform_get_irq(pdev, 0), m66592); | 1553 | free_irq(platform_get_irq(pdev, 0), m66592); |
| 1536 | m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); | 1554 | m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); |
| 1537 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | 1555 | #ifdef CONFIG_HAVE_CLK |
| 1538 | clk_disable(m66592->clk); | 1556 | if (m66592->pdata->on_chip) { |
| 1539 | clk_put(m66592->clk); | 1557 | clk_disable(m66592->clk); |
| 1558 | clk_put(m66592->clk); | ||
| 1559 | } | ||
| 1540 | #endif | 1560 | #endif |
| 1541 | kfree(m66592); | 1561 | kfree(m66592); |
| 1542 | return 0; | 1562 | return 0; |
| @@ -1548,11 +1568,10 @@ static void nop_completion(struct usb_ep *ep, struct usb_request *r) | |||
| 1548 | 1568 | ||
| 1549 | static int __init m66592_probe(struct platform_device *pdev) | 1569 | static int __init m66592_probe(struct platform_device *pdev) |
| 1550 | { | 1570 | { |
| 1551 | struct resource *res; | 1571 | struct resource *res, *ires; |
| 1552 | int irq; | ||
| 1553 | void __iomem *reg = NULL; | 1572 | void __iomem *reg = NULL; |
| 1554 | struct m66592 *m66592 = NULL; | 1573 | struct m66592 *m66592 = NULL; |
| 1555 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | 1574 | #ifdef CONFIG_HAVE_CLK |
| 1556 | char clk_name[8]; | 1575 | char clk_name[8]; |
| 1557 | #endif | 1576 | #endif |
| 1558 | int ret = 0; | 1577 | int ret = 0; |
| @@ -1565,10 +1584,11 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1565 | goto clean_up; | 1584 | goto clean_up; |
| 1566 | } | 1585 | } |
| 1567 | 1586 | ||
| 1568 | irq = platform_get_irq(pdev, 0); | 1587 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 1569 | if (irq < 0) { | 1588 | if (!ires) { |
| 1570 | ret = -ENODEV; | 1589 | ret = -ENODEV; |
| 1571 | pr_err("platform_get_irq error.\n"); | 1590 | dev_err(&pdev->dev, |
| 1591 | "platform_get_resource IORESOURCE_IRQ error.\n"); | ||
| 1572 | goto clean_up; | 1592 | goto clean_up; |
| 1573 | } | 1593 | } |
| 1574 | 1594 | ||
| @@ -1579,6 +1599,12 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1579 | goto clean_up; | 1599 | goto clean_up; |
| 1580 | } | 1600 | } |
| 1581 | 1601 | ||
| 1602 | if (pdev->dev.platform_data == NULL) { | ||
| 1603 | dev_err(&pdev->dev, "no platform data\n"); | ||
| 1604 | ret = -ENODEV; | ||
| 1605 | goto clean_up; | ||
| 1606 | } | ||
| 1607 | |||
| 1582 | /* initialize ucd */ | 1608 | /* initialize ucd */ |
| 1583 | m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); | 1609 | m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); |
| 1584 | if (m66592 == NULL) { | 1610 | if (m66592 == NULL) { |
| @@ -1586,6 +1612,9 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1586 | goto clean_up; | 1612 | goto clean_up; |
| 1587 | } | 1613 | } |
| 1588 | 1614 | ||
| 1615 | m66592->pdata = pdev->dev.platform_data; | ||
| 1616 | m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK; | ||
| 1617 | |||
| 1589 | spin_lock_init(&m66592->lock); | 1618 | spin_lock_init(&m66592->lock); |
| 1590 | dev_set_drvdata(&pdev->dev, m66592); | 1619 | dev_set_drvdata(&pdev->dev, m66592); |
| 1591 | 1620 | ||
| @@ -1603,24 +1632,25 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1603 | m66592->timer.data = (unsigned long)m66592; | 1632 | m66592->timer.data = (unsigned long)m66592; |
| 1604 | m66592->reg = reg; | 1633 | m66592->reg = reg; |
| 1605 | 1634 | ||
| 1606 | m66592->bi_bufnum = M66592_BASE_BUFNUM; | 1635 | ret = request_irq(ires->start, m66592_irq, IRQF_DISABLED | IRQF_SHARED, |
| 1607 | |||
| 1608 | ret = request_irq(irq, m66592_irq, IRQF_DISABLED | IRQF_SHARED, | ||
| 1609 | udc_name, m66592); | 1636 | udc_name, m66592); |
| 1610 | if (ret < 0) { | 1637 | if (ret < 0) { |
| 1611 | pr_err("request_irq error (%d)\n", ret); | 1638 | pr_err("request_irq error (%d)\n", ret); |
| 1612 | goto clean_up; | 1639 | goto clean_up; |
| 1613 | } | 1640 | } |
| 1614 | 1641 | ||
| 1615 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | 1642 | #ifdef CONFIG_HAVE_CLK |
| 1616 | snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); | 1643 | if (m66592->pdata->on_chip) { |
| 1617 | m66592->clk = clk_get(&pdev->dev, clk_name); | 1644 | snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); |
| 1618 | if (IS_ERR(m66592->clk)) { | 1645 | m66592->clk = clk_get(&pdev->dev, clk_name); |
| 1619 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | 1646 | if (IS_ERR(m66592->clk)) { |
| 1620 | ret = PTR_ERR(m66592->clk); | 1647 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", |
| 1621 | goto clean_up2; | 1648 | clk_name); |
| 1649 | ret = PTR_ERR(m66592->clk); | ||
| 1650 | goto clean_up2; | ||
| 1651 | } | ||
| 1652 | clk_enable(m66592->clk); | ||
| 1622 | } | 1653 | } |
| 1623 | clk_enable(m66592->clk); | ||
| 1624 | #endif | 1654 | #endif |
| 1625 | INIT_LIST_HEAD(&m66592->gadget.ep_list); | 1655 | INIT_LIST_HEAD(&m66592->gadget.ep_list); |
| 1626 | m66592->gadget.ep0 = &m66592->ep[0].ep; | 1656 | m66592->gadget.ep0 = &m66592->ep[0].ep; |
| @@ -1662,12 +1692,14 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
| 1662 | return 0; | 1692 | return 0; |
| 1663 | 1693 | ||
| 1664 | clean_up3: | 1694 | clean_up3: |
| 1665 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | 1695 | #ifdef CONFIG_HAVE_CLK |
| 1666 | clk_disable(m66592->clk); | 1696 | if (m66592->pdata->on_chip) { |
| 1667 | clk_put(m66592->clk); | 1697 | clk_disable(m66592->clk); |
| 1698 | clk_put(m66592->clk); | ||
| 1699 | } | ||
| 1668 | clean_up2: | 1700 | clean_up2: |
| 1669 | #endif | 1701 | #endif |
| 1670 | free_irq(irq, m66592); | 1702 | free_irq(ires->start, m66592); |
| 1671 | clean_up: | 1703 | clean_up: |
| 1672 | if (m66592) { | 1704 | if (m66592) { |
| 1673 | if (m66592->ep0_req) | 1705 | if (m66592->ep0_req) |
diff --git a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h index 286ce07e7960..8b960deed680 100644 --- a/drivers/usb/gadget/m66592-udc.h +++ b/drivers/usb/gadget/m66592-udc.h | |||
| @@ -23,10 +23,12 @@ | |||
| 23 | #ifndef __M66592_UDC_H__ | 23 | #ifndef __M66592_UDC_H__ |
| 24 | #define __M66592_UDC_H__ | 24 | #define __M66592_UDC_H__ |
| 25 | 25 | ||
| 26 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | 26 | #ifdef CONFIG_HAVE_CLK |
| 27 | #include <linux/clk.h> | 27 | #include <linux/clk.h> |
| 28 | #endif | 28 | #endif |
| 29 | 29 | ||
| 30 | #include <linux/usb/m66592.h> | ||
| 31 | |||
| 30 | #define M66592_SYSCFG 0x00 | 32 | #define M66592_SYSCFG 0x00 |
| 31 | #define M66592_XTAL 0xC000 /* b15-14: Crystal selection */ | 33 | #define M66592_XTAL 0xC000 /* b15-14: Crystal selection */ |
| 32 | #define M66592_XTAL48 0x8000 /* 48MHz */ | 34 | #define M66592_XTAL48 0x8000 /* 48MHz */ |
| @@ -76,11 +78,11 @@ | |||
| 76 | #define M66592_P_TST_J 0x0001 /* PERI TEST J */ | 78 | #define M66592_P_TST_J 0x0001 /* PERI TEST J */ |
| 77 | #define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */ | 79 | #define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */ |
| 78 | 80 | ||
| 79 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 81 | /* built-in registers */ |
| 80 | #define M66592_CFBCFG 0x0A | 82 | #define M66592_CFBCFG 0x0A |
| 81 | #define M66592_D0FBCFG 0x0C | 83 | #define M66592_D0FBCFG 0x0C |
| 82 | #define M66592_LITTLE 0x0100 /* b8: Little endian mode */ | 84 | #define M66592_LITTLE 0x0100 /* b8: Little endian mode */ |
| 83 | #else | 85 | /* external chip case */ |
| 84 | #define M66592_PINCFG 0x0A | 86 | #define M66592_PINCFG 0x0A |
| 85 | #define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */ | 87 | #define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */ |
| 86 | #define M66592_BIGEND 0x0100 /* b8: Big endian mode */ | 88 | #define M66592_BIGEND 0x0100 /* b8: Big endian mode */ |
| @@ -100,8 +102,8 @@ | |||
| 100 | #define M66592_PKTM 0x0020 /* b5: Packet mode */ | 102 | #define M66592_PKTM 0x0020 /* b5: Packet mode */ |
| 101 | #define M66592_DENDE 0x0010 /* b4: Dend enable */ | 103 | #define M66592_DENDE 0x0010 /* b4: Dend enable */ |
| 102 | #define M66592_OBUS 0x0004 /* b2: OUTbus mode */ | 104 | #define M66592_OBUS 0x0004 /* b2: OUTbus mode */ |
| 103 | #endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */ | ||
| 104 | 105 | ||
| 106 | /* common case */ | ||
| 105 | #define M66592_CFIFO 0x10 | 107 | #define M66592_CFIFO 0x10 |
| 106 | #define M66592_D0FIFO 0x14 | 108 | #define M66592_D0FIFO 0x14 |
| 107 | #define M66592_D1FIFO 0x18 | 109 | #define M66592_D1FIFO 0x18 |
| @@ -113,13 +115,9 @@ | |||
| 113 | #define M66592_REW 0x4000 /* b14: Buffer rewind */ | 115 | #define M66592_REW 0x4000 /* b14: Buffer rewind */ |
| 114 | #define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */ | 116 | #define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */ |
| 115 | #define M66592_DREQE 0x1000 /* b12: DREQ output enable */ | 117 | #define M66592_DREQE 0x1000 /* b12: DREQ output enable */ |
| 116 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 118 | #define M66592_MBW_8 0x0000 /* 8bit */ |
| 117 | #define M66592_MBW 0x0800 /* b11: Maximum bit width for FIFO */ | 119 | #define M66592_MBW_16 0x0400 /* 16bit */ |
| 118 | #else | 120 | #define M66592_MBW_32 0x0800 /* 32bit */ |
| 119 | #define M66592_MBW 0x0400 /* b10: Maximum bit width for FIFO */ | ||
| 120 | #define M66592_MBW_8 0x0000 /* 8bit */ | ||
| 121 | #define M66592_MBW_16 0x0400 /* 16bit */ | ||
| 122 | #endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */ | ||
| 123 | #define M66592_TRENB 0x0200 /* b9: Transaction counter enable */ | 121 | #define M66592_TRENB 0x0200 /* b9: Transaction counter enable */ |
| 124 | #define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */ | 122 | #define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */ |
| 125 | #define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */ | 123 | #define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */ |
| @@ -480,9 +478,11 @@ struct m66592_ep { | |||
| 480 | struct m66592 { | 478 | struct m66592 { |
| 481 | spinlock_t lock; | 479 | spinlock_t lock; |
| 482 | void __iomem *reg; | 480 | void __iomem *reg; |
| 483 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) | 481 | #ifdef CONFIG_HAVE_CLK |
| 484 | struct clk *clk; | 482 | struct clk *clk; |
| 485 | #endif | 483 | #endif |
| 484 | struct m66592_platdata *pdata; | ||
| 485 | unsigned long irq_trigger; | ||
| 486 | 486 | ||
| 487 | struct usb_gadget gadget; | 487 | struct usb_gadget gadget; |
| 488 | struct usb_gadget_driver *driver; | 488 | struct usb_gadget_driver *driver; |
| @@ -506,7 +506,6 @@ struct m66592 { | |||
| 506 | int interrupt; | 506 | int interrupt; |
| 507 | int isochronous; | 507 | int isochronous; |
| 508 | int num_dma; | 508 | int num_dma; |
| 509 | int bi_bufnum; /* bulk and isochronous's bufnum */ | ||
| 510 | }; | 509 | }; |
| 511 | 510 | ||
| 512 | #define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget) | 511 | #define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget) |
| @@ -547,13 +546,13 @@ static inline void m66592_read_fifo(struct m66592 *m66592, | |||
| 547 | { | 546 | { |
| 548 | unsigned long fifoaddr = (unsigned long)m66592->reg + offset; | 547 | unsigned long fifoaddr = (unsigned long)m66592->reg + offset; |
| 549 | 548 | ||
| 550 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 549 | if (m66592->pdata->on_chip) { |
| 551 | len = (len + 3) / 4; | 550 | len = (len + 3) / 4; |
| 552 | insl(fifoaddr, buf, len); | 551 | insl(fifoaddr, buf, len); |
| 553 | #else | 552 | } else { |
| 554 | len = (len + 1) / 2; | 553 | len = (len + 1) / 2; |
| 555 | insw(fifoaddr, buf, len); | 554 | insw(fifoaddr, buf, len); |
| 556 | #endif | 555 | } |
| 557 | } | 556 | } |
| 558 | 557 | ||
| 559 | static inline void m66592_write(struct m66592 *m66592, u16 val, | 558 | static inline void m66592_write(struct m66592 *m66592, u16 val, |
| @@ -567,33 +566,34 @@ static inline void m66592_write_fifo(struct m66592 *m66592, | |||
| 567 | void *buf, unsigned long len) | 566 | void *buf, unsigned long len) |
| 568 | { | 567 | { |
| 569 | unsigned long fifoaddr = (unsigned long)m66592->reg + offset; | 568 | unsigned long fifoaddr = (unsigned long)m66592->reg + offset; |
| 570 | #if defined(CONFIG_SUPERH_BUILT_IN_M66592) | 569 | |
| 571 | unsigned long count; | 570 | if (m66592->pdata->on_chip) { |
| 572 | unsigned char *pb; | 571 | unsigned long count; |
| 573 | int i; | 572 | unsigned char *pb; |
| 574 | 573 | int i; | |
| 575 | count = len / 4; | 574 | |
| 576 | outsl(fifoaddr, buf, count); | 575 | count = len / 4; |
| 577 | 576 | outsl(fifoaddr, buf, count); | |
| 578 | if (len & 0x00000003) { | 577 | |
| 579 | pb = buf + count * 4; | 578 | if (len & 0x00000003) { |
| 580 | for (i = 0; i < (len & 0x00000003); i++) { | 579 | pb = buf + count * 4; |
| 581 | if (m66592_read(m66592, M66592_CFBCFG)) /* little */ | 580 | for (i = 0; i < (len & 0x00000003); i++) { |
| 582 | outb(pb[i], fifoaddr + (3 - i)); | 581 | if (m66592_read(m66592, M66592_CFBCFG)) /* le */ |
| 583 | else | 582 | outb(pb[i], fifoaddr + (3 - i)); |
| 584 | outb(pb[i], fifoaddr + i); | 583 | else |
| 584 | outb(pb[i], fifoaddr + i); | ||
| 585 | } | ||
| 586 | } | ||
| 587 | } else { | ||
| 588 | unsigned long odd = len & 0x0001; | ||
| 589 | |||
| 590 | len = len / 2; | ||
| 591 | outsw(fifoaddr, buf, len); | ||
| 592 | if (odd) { | ||
| 593 | unsigned char *p = buf + len*2; | ||
| 594 | outb(*p, fifoaddr); | ||
| 585 | } | 595 | } |
| 586 | } | 596 | } |
| 587 | #else | ||
| 588 | unsigned long odd = len & 0x0001; | ||
| 589 | |||
| 590 | len = len / 2; | ||
| 591 | outsw(fifoaddr, buf, len); | ||
| 592 | if (odd) { | ||
| 593 | unsigned char *p = buf + len*2; | ||
| 594 | outb(*p, fifoaddr); | ||
| 595 | } | ||
| 596 | #endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */ | ||
| 597 | } | 597 | } |
| 598 | 598 | ||
| 599 | static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, | 599 | static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, |
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c new file mode 100644 index 000000000000..e220fb8091a3 --- /dev/null +++ b/drivers/usb/gadget/r8a66597-udc.c | |||
| @@ -0,0 +1,1689 @@ | |||
| 1 | /* | ||
| 2 | * R8A66597 UDC (USB gadget) | ||
| 3 | * | ||
| 4 | * Copyright (C) 2006-2009 Renesas Solutions Corp. | ||
| 5 | * | ||
| 6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; version 2 of the License. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #include <linux/module.h> | ||
| 24 | #include <linux/interrupt.h> | ||
| 25 | #include <linux/delay.h> | ||
| 26 | #include <linux/io.h> | ||
| 27 | #include <linux/platform_device.h> | ||
| 28 | #include <linux/clk.h> | ||
| 29 | |||
| 30 | #include <linux/usb/ch9.h> | ||
| 31 | #include <linux/usb/gadget.h> | ||
| 32 | |||
| 33 | #include "r8a66597-udc.h" | ||
| 34 | |||
| 35 | #define DRIVER_VERSION "2009-08-18" | ||
| 36 | |||
| 37 | static const char udc_name[] = "r8a66597_udc"; | ||
| 38 | static const char *r8a66597_ep_name[] = { | ||
| 39 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", | ||
| 40 | "ep8", "ep9", | ||
| 41 | }; | ||
| 42 | |||
| 43 | static void disable_controller(struct r8a66597 *r8a66597); | ||
| 44 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req); | ||
| 45 | static void irq_packet_write(struct r8a66597_ep *ep, | ||
| 46 | struct r8a66597_request *req); | ||
| 47 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | ||
| 48 | gfp_t gfp_flags); | ||
| 49 | |||
| 50 | static void transfer_complete(struct r8a66597_ep *ep, | ||
| 51 | struct r8a66597_request *req, int status); | ||
| 52 | |||
| 53 | /*-------------------------------------------------------------------------*/ | ||
| 54 | static inline u16 get_usb_speed(struct r8a66597 *r8a66597) | ||
| 55 | { | ||
| 56 | return r8a66597_read(r8a66597, DVSTCTR0) & RHST; | ||
| 57 | } | ||
| 58 | |||
| 59 | static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | ||
| 60 | unsigned long reg) | ||
| 61 | { | ||
| 62 | u16 tmp; | ||
| 63 | |||
| 64 | tmp = r8a66597_read(r8a66597, INTENB0); | ||
| 65 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | ||
| 66 | INTENB0); | ||
| 67 | r8a66597_bset(r8a66597, (1 << pipenum), reg); | ||
| 68 | r8a66597_write(r8a66597, tmp, INTENB0); | ||
| 69 | } | ||
| 70 | |||
| 71 | static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, | ||
| 72 | unsigned long reg) | ||
| 73 | { | ||
| 74 | u16 tmp; | ||
| 75 | |||
| 76 | tmp = r8a66597_read(r8a66597, INTENB0); | ||
| 77 | r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, | ||
| 78 | INTENB0); | ||
| 79 | r8a66597_bclr(r8a66597, (1 << pipenum), reg); | ||
| 80 | r8a66597_write(r8a66597, tmp, INTENB0); | ||
| 81 | } | ||
| 82 | |||
| 83 | static void r8a66597_usb_connect(struct r8a66597 *r8a66597) | ||
| 84 | { | ||
| 85 | r8a66597_bset(r8a66597, CTRE, INTENB0); | ||
| 86 | r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0); | ||
| 87 | |||
| 88 | r8a66597_bset(r8a66597, DPRPU, SYSCFG0); | ||
| 89 | } | ||
| 90 | |||
| 91 | static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597) | ||
| 92 | __releases(r8a66597->lock) | ||
| 93 | __acquires(r8a66597->lock) | ||
| 94 | { | ||
| 95 | r8a66597_bclr(r8a66597, CTRE, INTENB0); | ||
| 96 | r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0); | ||
| 97 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | ||
| 98 | |||
| 99 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | ||
| 100 | spin_unlock(&r8a66597->lock); | ||
| 101 | r8a66597->driver->disconnect(&r8a66597->gadget); | ||
| 102 | spin_lock(&r8a66597->lock); | ||
| 103 | |||
| 104 | disable_controller(r8a66597); | ||
| 105 | INIT_LIST_HEAD(&r8a66597->ep[0].queue); | ||
| 106 | } | ||
| 107 | |||
| 108 | static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 109 | { | ||
| 110 | u16 pid = 0; | ||
| 111 | unsigned long offset; | ||
| 112 | |||
| 113 | if (pipenum == 0) | ||
| 114 | pid = r8a66597_read(r8a66597, DCPCTR) & PID; | ||
| 115 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
| 116 | offset = get_pipectr_addr(pipenum); | ||
| 117 | pid = r8a66597_read(r8a66597, offset) & PID; | ||
| 118 | } else | ||
| 119 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
| 120 | |||
| 121 | return pid; | ||
| 122 | } | ||
| 123 | |||
| 124 | static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum, | ||
| 125 | u16 pid) | ||
| 126 | { | ||
| 127 | unsigned long offset; | ||
| 128 | |||
| 129 | if (pipenum == 0) | ||
| 130 | r8a66597_mdfy(r8a66597, pid, PID, DCPCTR); | ||
| 131 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
| 132 | offset = get_pipectr_addr(pipenum); | ||
| 133 | r8a66597_mdfy(r8a66597, pid, PID, offset); | ||
| 134 | } else | ||
| 135 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
| 136 | } | ||
| 137 | |||
| 138 | static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 139 | { | ||
| 140 | control_reg_set_pid(r8a66597, pipenum, PID_BUF); | ||
| 141 | } | ||
| 142 | |||
| 143 | static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 144 | { | ||
| 145 | control_reg_set_pid(r8a66597, pipenum, PID_NAK); | ||
| 146 | } | ||
| 147 | |||
| 148 | static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 149 | { | ||
| 150 | control_reg_set_pid(r8a66597, pipenum, PID_STALL); | ||
| 151 | } | ||
| 152 | |||
| 153 | static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 154 | { | ||
| 155 | u16 ret = 0; | ||
| 156 | unsigned long offset; | ||
| 157 | |||
| 158 | if (pipenum == 0) | ||
| 159 | ret = r8a66597_read(r8a66597, DCPCTR); | ||
| 160 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
| 161 | offset = get_pipectr_addr(pipenum); | ||
| 162 | ret = r8a66597_read(r8a66597, offset); | ||
| 163 | } else | ||
| 164 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | ||
| 165 | |||
| 166 | return ret; | ||
| 167 | } | ||
| 168 | |||
| 169 | static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 170 | { | ||
| 171 | unsigned long offset; | ||
| 172 | |||
| 173 | pipe_stop(r8a66597, pipenum); | ||
| 174 | |||
| 175 | if (pipenum == 0) | ||
| 176 | r8a66597_bset(r8a66597, SQCLR, DCPCTR); | ||
| 177 | else if (pipenum < R8A66597_MAX_NUM_PIPE) { | ||
| 178 | offset = get_pipectr_addr(pipenum); | ||
| 179 | r8a66597_bset(r8a66597, SQCLR, offset); | ||
| 180 | } else | ||
| 181 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | ||
| 182 | } | ||
| 183 | |||
| 184 | static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 185 | { | ||
| 186 | u16 tmp; | ||
| 187 | int size; | ||
| 188 | |||
| 189 | if (pipenum == 0) { | ||
| 190 | tmp = r8a66597_read(r8a66597, DCPCFG); | ||
| 191 | if ((tmp & R8A66597_CNTMD) != 0) | ||
| 192 | size = 256; | ||
| 193 | else { | ||
| 194 | tmp = r8a66597_read(r8a66597, DCPMAXP); | ||
| 195 | size = tmp & MAXP; | ||
| 196 | } | ||
| 197 | } else { | ||
| 198 | r8a66597_write(r8a66597, pipenum, PIPESEL); | ||
| 199 | tmp = r8a66597_read(r8a66597, PIPECFG); | ||
| 200 | if ((tmp & R8A66597_CNTMD) != 0) { | ||
| 201 | tmp = r8a66597_read(r8a66597, PIPEBUF); | ||
| 202 | size = ((tmp >> 10) + 1) * 64; | ||
| 203 | } else { | ||
| 204 | tmp = r8a66597_read(r8a66597, PIPEMAXP); | ||
| 205 | size = tmp & MXPS; | ||
| 206 | } | ||
| 207 | } | ||
| 208 | |||
| 209 | return size; | ||
| 210 | } | ||
| 211 | |||
| 212 | static inline unsigned short mbw_value(struct r8a66597 *r8a66597) | ||
| 213 | { | ||
| 214 | if (r8a66597->pdata->on_chip) | ||
| 215 | return MBW_32; | ||
| 216 | else | ||
| 217 | return MBW_16; | ||
| 218 | } | ||
| 219 | |||
| 220 | static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 221 | { | ||
| 222 | struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum]; | ||
| 223 | |||
| 224 | if (ep->use_dma) | ||
| 225 | return; | ||
| 226 | |||
| 227 | r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel); | ||
| 228 | |||
| 229 | ndelay(450); | ||
| 230 | |||
| 231 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | ||
| 232 | } | ||
| 233 | |||
| 234 | static int pipe_buffer_setting(struct r8a66597 *r8a66597, | ||
| 235 | struct r8a66597_pipe_info *info) | ||
| 236 | { | ||
| 237 | u16 bufnum = 0, buf_bsize = 0; | ||
| 238 | u16 pipecfg = 0; | ||
| 239 | |||
| 240 | if (info->pipe == 0) | ||
| 241 | return -EINVAL; | ||
| 242 | |||
| 243 | r8a66597_write(r8a66597, info->pipe, PIPESEL); | ||
| 244 | |||
| 245 | if (info->dir_in) | ||
| 246 | pipecfg |= R8A66597_DIR; | ||
| 247 | pipecfg |= info->type; | ||
| 248 | pipecfg |= info->epnum; | ||
| 249 | switch (info->type) { | ||
| 250 | case R8A66597_INT: | ||
| 251 | bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT); | ||
| 252 | buf_bsize = 0; | ||
| 253 | break; | ||
| 254 | case R8A66597_BULK: | ||
| 255 | /* isochronous pipes may be used as bulk pipes */ | ||
| 256 | if (info->pipe > R8A66597_BASE_PIPENUM_BULK) | ||
| 257 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; | ||
| 258 | else | ||
| 259 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; | ||
| 260 | |||
| 261 | bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16); | ||
| 262 | buf_bsize = 7; | ||
| 263 | pipecfg |= R8A66597_DBLB; | ||
| 264 | if (!info->dir_in) | ||
| 265 | pipecfg |= R8A66597_SHTNAK; | ||
| 266 | break; | ||
| 267 | case R8A66597_ISO: | ||
| 268 | bufnum = R8A66597_BASE_BUFNUM + | ||
| 269 | (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16; | ||
| 270 | buf_bsize = 7; | ||
| 271 | break; | ||
| 272 | } | ||
| 273 | |||
| 274 | if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) { | ||
| 275 | pr_err(KERN_ERR "r8a66597 pipe memory is insufficient\n"); | ||
| 276 | return -ENOMEM; | ||
| 277 | } | ||
| 278 | |||
| 279 | r8a66597_write(r8a66597, pipecfg, PIPECFG); | ||
| 280 | r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF); | ||
| 281 | r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP); | ||
| 282 | if (info->interval) | ||
| 283 | info->interval--; | ||
| 284 | r8a66597_write(r8a66597, info->interval, PIPEPERI); | ||
| 285 | |||
| 286 | return 0; | ||
| 287 | } | ||
| 288 | |||
| 289 | static void pipe_buffer_release(struct r8a66597 *r8a66597, | ||
| 290 | struct r8a66597_pipe_info *info) | ||
| 291 | { | ||
| 292 | if (info->pipe == 0) | ||
| 293 | return; | ||
| 294 | |||
| 295 | if (is_bulk_pipe(info->pipe)) | ||
| 296 | r8a66597->bulk--; | ||
| 297 | else if (is_interrupt_pipe(info->pipe)) | ||
| 298 | r8a66597->interrupt--; | ||
| 299 | else if (is_isoc_pipe(info->pipe)) { | ||
| 300 | r8a66597->isochronous--; | ||
| 301 | if (info->type == R8A66597_BULK) | ||
| 302 | r8a66597->bulk--; | ||
| 303 | } else | ||
| 304 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | ||
| 305 | info->pipe); | ||
| 306 | } | ||
| 307 | |||
| 308 | static void pipe_initialize(struct r8a66597_ep *ep) | ||
| 309 | { | ||
| 310 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 311 | |||
| 312 | r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel); | ||
| 313 | |||
| 314 | r8a66597_write(r8a66597, ACLRM, ep->pipectr); | ||
| 315 | r8a66597_write(r8a66597, 0, ep->pipectr); | ||
| 316 | r8a66597_write(r8a66597, SQCLR, ep->pipectr); | ||
| 317 | if (ep->use_dma) { | ||
| 318 | r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel); | ||
| 319 | |||
| 320 | ndelay(450); | ||
| 321 | |||
| 322 | r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); | ||
| 323 | } | ||
| 324 | } | ||
| 325 | |||
| 326 | static void r8a66597_ep_setting(struct r8a66597 *r8a66597, | ||
| 327 | struct r8a66597_ep *ep, | ||
| 328 | const struct usb_endpoint_descriptor *desc, | ||
| 329 | u16 pipenum, int dma) | ||
| 330 | { | ||
| 331 | ep->use_dma = 0; | ||
| 332 | ep->fifoaddr = CFIFO; | ||
| 333 | ep->fifosel = CFIFOSEL; | ||
| 334 | ep->fifoctr = CFIFOCTR; | ||
| 335 | ep->fifotrn = 0; | ||
| 336 | |||
| 337 | ep->pipectr = get_pipectr_addr(pipenum); | ||
| 338 | ep->pipenum = pipenum; | ||
| 339 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | ||
| 340 | r8a66597->pipenum2ep[pipenum] = ep; | ||
| 341 | r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK] | ||
| 342 | = ep; | ||
| 343 | INIT_LIST_HEAD(&ep->queue); | ||
| 344 | } | ||
| 345 | |||
| 346 | static void r8a66597_ep_release(struct r8a66597_ep *ep) | ||
| 347 | { | ||
| 348 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 349 | u16 pipenum = ep->pipenum; | ||
| 350 | |||
| 351 | if (pipenum == 0) | ||
| 352 | return; | ||
| 353 | |||
| 354 | if (ep->use_dma) | ||
| 355 | r8a66597->num_dma--; | ||
| 356 | ep->pipenum = 0; | ||
| 357 | ep->busy = 0; | ||
| 358 | ep->use_dma = 0; | ||
| 359 | } | ||
| 360 | |||
| 361 | static int alloc_pipe_config(struct r8a66597_ep *ep, | ||
| 362 | const struct usb_endpoint_descriptor *desc) | ||
| 363 | { | ||
| 364 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 365 | struct r8a66597_pipe_info info; | ||
| 366 | int dma = 0; | ||
| 367 | unsigned char *counter; | ||
| 368 | int ret; | ||
| 369 | |||
| 370 | ep->desc = desc; | ||
| 371 | |||
| 372 | if (ep->pipenum) /* already allocated pipe */ | ||
| 373 | return 0; | ||
| 374 | |||
| 375 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | ||
| 376 | case USB_ENDPOINT_XFER_BULK: | ||
| 377 | if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) { | ||
| 378 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | ||
| 379 | printk(KERN_ERR "bulk pipe is insufficient\n"); | ||
| 380 | return -ENODEV; | ||
| 381 | } else { | ||
| 382 | info.pipe = R8A66597_BASE_PIPENUM_ISOC | ||
| 383 | + r8a66597->isochronous; | ||
| 384 | counter = &r8a66597->isochronous; | ||
| 385 | } | ||
| 386 | } else { | ||
| 387 | info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk; | ||
| 388 | counter = &r8a66597->bulk; | ||
| 389 | } | ||
| 390 | info.type = R8A66597_BULK; | ||
| 391 | dma = 1; | ||
| 392 | break; | ||
| 393 | case USB_ENDPOINT_XFER_INT: | ||
| 394 | if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) { | ||
| 395 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | ||
| 396 | return -ENODEV; | ||
| 397 | } | ||
| 398 | info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt; | ||
| 399 | info.type = R8A66597_INT; | ||
| 400 | counter = &r8a66597->interrupt; | ||
| 401 | break; | ||
| 402 | case USB_ENDPOINT_XFER_ISOC: | ||
| 403 | if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { | ||
| 404 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | ||
| 405 | return -ENODEV; | ||
| 406 | } | ||
| 407 | info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous; | ||
| 408 | info.type = R8A66597_ISO; | ||
| 409 | counter = &r8a66597->isochronous; | ||
| 410 | break; | ||
| 411 | default: | ||
| 412 | printk(KERN_ERR "unexpect xfer type\n"); | ||
| 413 | return -EINVAL; | ||
| 414 | } | ||
| 415 | ep->type = info.type; | ||
| 416 | |||
| 417 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | ||
| 418 | info.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | ||
| 419 | info.interval = desc->bInterval; | ||
| 420 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | ||
| 421 | info.dir_in = 1; | ||
| 422 | else | ||
| 423 | info.dir_in = 0; | ||
| 424 | |||
| 425 | ret = pipe_buffer_setting(r8a66597, &info); | ||
| 426 | if (ret < 0) { | ||
| 427 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | ||
| 428 | return ret; | ||
| 429 | } | ||
| 430 | |||
| 431 | (*counter)++; | ||
| 432 | if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK) | ||
| 433 | r8a66597->bulk++; | ||
| 434 | |||
| 435 | r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma); | ||
| 436 | pipe_initialize(ep); | ||
| 437 | |||
| 438 | return 0; | ||
| 439 | } | ||
| 440 | |||
| 441 | static int free_pipe_config(struct r8a66597_ep *ep) | ||
| 442 | { | ||
| 443 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 444 | struct r8a66597_pipe_info info; | ||
| 445 | |||
| 446 | info.pipe = ep->pipenum; | ||
| 447 | info.type = ep->type; | ||
| 448 | pipe_buffer_release(r8a66597, &info); | ||
| 449 | r8a66597_ep_release(ep); | ||
| 450 | |||
| 451 | return 0; | ||
| 452 | } | ||
| 453 | |||
| 454 | /*-------------------------------------------------------------------------*/ | ||
| 455 | static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 456 | { | ||
| 457 | enable_irq_ready(r8a66597, pipenum); | ||
| 458 | enable_irq_nrdy(r8a66597, pipenum); | ||
| 459 | } | ||
| 460 | |||
| 461 | static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum) | ||
| 462 | { | ||
| 463 | disable_irq_ready(r8a66597, pipenum); | ||
| 464 | disable_irq_nrdy(r8a66597, pipenum); | ||
| 465 | } | ||
| 466 | |||
| 467 | /* if complete is true, gadget driver complete function is not call */ | ||
| 468 | static void control_end(struct r8a66597 *r8a66597, unsigned ccpl) | ||
| 469 | { | ||
| 470 | r8a66597->ep[0].internal_ccpl = ccpl; | ||
| 471 | pipe_start(r8a66597, 0); | ||
| 472 | r8a66597_bset(r8a66597, CCPL, DCPCTR); | ||
| 473 | } | ||
| 474 | |||
| 475 | static void start_ep0_write(struct r8a66597_ep *ep, | ||
| 476 | struct r8a66597_request *req) | ||
| 477 | { | ||
| 478 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 479 | |||
| 480 | pipe_change(r8a66597, ep->pipenum); | ||
| 481 | r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL); | ||
| 482 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | ||
| 483 | if (req->req.length == 0) { | ||
| 484 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | ||
| 485 | pipe_start(r8a66597, 0); | ||
| 486 | transfer_complete(ep, req, 0); | ||
| 487 | } else { | ||
| 488 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | ||
| 489 | irq_ep0_write(ep, req); | ||
| 490 | } | ||
| 491 | } | ||
| 492 | |||
| 493 | static void start_packet_write(struct r8a66597_ep *ep, | ||
| 494 | struct r8a66597_request *req) | ||
| 495 | { | ||
| 496 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 497 | u16 tmp; | ||
| 498 | |||
| 499 | pipe_change(r8a66597, ep->pipenum); | ||
| 500 | disable_irq_empty(r8a66597, ep->pipenum); | ||
| 501 | pipe_start(r8a66597, ep->pipenum); | ||
| 502 | |||
| 503 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
| 504 | if (unlikely((tmp & FRDY) == 0)) | ||
| 505 | pipe_irq_enable(r8a66597, ep->pipenum); | ||
| 506 | else | ||
| 507 | irq_packet_write(ep, req); | ||
| 508 | } | ||
| 509 | |||
| 510 | static void start_packet_read(struct r8a66597_ep *ep, | ||
| 511 | struct r8a66597_request *req) | ||
| 512 | { | ||
| 513 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 514 | u16 pipenum = ep->pipenum; | ||
| 515 | |||
| 516 | if (ep->pipenum == 0) { | ||
| 517 | r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL); | ||
| 518 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | ||
| 519 | pipe_start(r8a66597, pipenum); | ||
| 520 | pipe_irq_enable(r8a66597, pipenum); | ||
| 521 | } else { | ||
| 522 | if (ep->use_dma) { | ||
| 523 | r8a66597_bset(r8a66597, TRCLR, ep->fifosel); | ||
| 524 | pipe_change(r8a66597, pipenum); | ||
| 525 | r8a66597_bset(r8a66597, TRENB, ep->fifosel); | ||
| 526 | r8a66597_write(r8a66597, | ||
| 527 | (req->req.length + ep->ep.maxpacket - 1) | ||
| 528 | / ep->ep.maxpacket, | ||
| 529 | ep->fifotrn); | ||
| 530 | } | ||
| 531 | pipe_start(r8a66597, pipenum); /* trigger once */ | ||
| 532 | pipe_irq_enable(r8a66597, pipenum); | ||
| 533 | } | ||
| 534 | } | ||
| 535 | |||
| 536 | static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req) | ||
| 537 | { | ||
| 538 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | ||
| 539 | start_packet_write(ep, req); | ||
| 540 | else | ||
| 541 | start_packet_read(ep, req); | ||
| 542 | } | ||
| 543 | |||
| 544 | static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req) | ||
| 545 | { | ||
| 546 | u16 ctsq; | ||
| 547 | |||
| 548 | ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ; | ||
| 549 | |||
| 550 | switch (ctsq) { | ||
| 551 | case CS_RDDS: | ||
| 552 | start_ep0_write(ep, req); | ||
| 553 | break; | ||
| 554 | case CS_WRDS: | ||
| 555 | start_packet_read(ep, req); | ||
| 556 | break; | ||
| 557 | |||
| 558 | case CS_WRND: | ||
| 559 | control_end(ep->r8a66597, 0); | ||
| 560 | break; | ||
| 561 | default: | ||
| 562 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | ||
| 563 | break; | ||
| 564 | } | ||
| 565 | } | ||
| 566 | |||
| 567 | static void init_controller(struct r8a66597 *r8a66597) | ||
| 568 | { | ||
| 569 | u16 vif = r8a66597->pdata->vif ? LDRV : 0; | ||
| 570 | u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0; | ||
| 571 | u16 endian = r8a66597->pdata->endian ? BIGEND : 0; | ||
| 572 | |||
| 573 | if (r8a66597->pdata->on_chip) { | ||
| 574 | r8a66597_bset(r8a66597, 0x04, SYSCFG1); | ||
| 575 | r8a66597_bset(r8a66597, HSE, SYSCFG0); | ||
| 576 | |||
| 577 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
| 578 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | ||
| 579 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | ||
| 580 | |||
| 581 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | ||
| 582 | |||
| 583 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | ||
| 584 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | ||
| 585 | DMA0CFG); | ||
| 586 | } else { | ||
| 587 | r8a66597_bset(r8a66597, vif | endian, PINCFG); | ||
| 588 | r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */ | ||
| 589 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), | ||
| 590 | XTAL, SYSCFG0); | ||
| 591 | |||
| 592 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
| 593 | r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); | ||
| 594 | r8a66597_bset(r8a66597, USBE, SYSCFG0); | ||
| 595 | |||
| 596 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | ||
| 597 | |||
| 598 | msleep(3); | ||
| 599 | |||
| 600 | r8a66597_bset(r8a66597, PLLC, SYSCFG0); | ||
| 601 | |||
| 602 | msleep(1); | ||
| 603 | |||
| 604 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | ||
| 605 | |||
| 606 | r8a66597_bset(r8a66597, irq_sense, INTENB1); | ||
| 607 | r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, | ||
| 608 | DMA0CFG); | ||
| 609 | } | ||
| 610 | } | ||
| 611 | |||
| 612 | static void disable_controller(struct r8a66597 *r8a66597) | ||
| 613 | { | ||
| 614 | if (r8a66597->pdata->on_chip) { | ||
| 615 | r8a66597_bset(r8a66597, SCKE, SYSCFG0); | ||
| 616 | |||
| 617 | /* disable interrupts */ | ||
| 618 | r8a66597_write(r8a66597, 0, INTENB0); | ||
| 619 | r8a66597_write(r8a66597, 0, INTENB1); | ||
| 620 | r8a66597_write(r8a66597, 0, BRDYENB); | ||
| 621 | r8a66597_write(r8a66597, 0, BEMPENB); | ||
| 622 | r8a66597_write(r8a66597, 0, NRDYENB); | ||
| 623 | |||
| 624 | /* clear status */ | ||
| 625 | r8a66597_write(r8a66597, 0, BRDYSTS); | ||
| 626 | r8a66597_write(r8a66597, 0, NRDYSTS); | ||
| 627 | r8a66597_write(r8a66597, 0, BEMPSTS); | ||
| 628 | |||
| 629 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
| 630 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | ||
| 631 | |||
| 632 | } else { | ||
| 633 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | ||
| 634 | udelay(1); | ||
| 635 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | ||
| 636 | udelay(1); | ||
| 637 | udelay(1); | ||
| 638 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | ||
| 639 | } | ||
| 640 | } | ||
| 641 | |||
| 642 | static void r8a66597_start_xclock(struct r8a66597 *r8a66597) | ||
| 643 | { | ||
| 644 | u16 tmp; | ||
| 645 | |||
| 646 | if (!r8a66597->pdata->on_chip) { | ||
| 647 | tmp = r8a66597_read(r8a66597, SYSCFG0); | ||
| 648 | if (!(tmp & XCKE)) | ||
| 649 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | ||
| 650 | } | ||
| 651 | } | ||
| 652 | |||
| 653 | static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep) | ||
| 654 | { | ||
| 655 | return list_entry(ep->queue.next, struct r8a66597_request, queue); | ||
| 656 | } | ||
| 657 | |||
| 658 | /*-------------------------------------------------------------------------*/ | ||
| 659 | static void transfer_complete(struct r8a66597_ep *ep, | ||
| 660 | struct r8a66597_request *req, int status) | ||
| 661 | __releases(r8a66597->lock) | ||
| 662 | __acquires(r8a66597->lock) | ||
| 663 | { | ||
| 664 | int restart = 0; | ||
| 665 | |||
| 666 | if (unlikely(ep->pipenum == 0)) { | ||
| 667 | if (ep->internal_ccpl) { | ||
| 668 | ep->internal_ccpl = 0; | ||
| 669 | return; | ||
| 670 | } | ||
| 671 | } | ||
| 672 | |||
| 673 | list_del_init(&req->queue); | ||
| 674 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | ||
| 675 | req->req.status = -ESHUTDOWN; | ||
| 676 | else | ||
| 677 | req->req.status = status; | ||
| 678 | |||
| 679 | if (!list_empty(&ep->queue)) | ||
| 680 | restart = 1; | ||
| 681 | |||
| 682 | spin_unlock(&ep->r8a66597->lock); | ||
| 683 | req->req.complete(&ep->ep, &req->req); | ||
| 684 | spin_lock(&ep->r8a66597->lock); | ||
| 685 | |||
| 686 | if (restart) { | ||
| 687 | req = get_request_from_ep(ep); | ||
| 688 | if (ep->desc) | ||
| 689 | start_packet(ep, req); | ||
| 690 | } | ||
| 691 | } | ||
| 692 | |||
| 693 | static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req) | ||
| 694 | { | ||
| 695 | int i; | ||
| 696 | u16 tmp; | ||
| 697 | unsigned bufsize; | ||
| 698 | size_t size; | ||
| 699 | void *buf; | ||
| 700 | u16 pipenum = ep->pipenum; | ||
| 701 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 702 | |||
| 703 | pipe_change(r8a66597, pipenum); | ||
| 704 | r8a66597_bset(r8a66597, ISEL, ep->fifosel); | ||
| 705 | |||
| 706 | i = 0; | ||
| 707 | do { | ||
| 708 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
| 709 | if (i++ > 100000) { | ||
| 710 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | ||
| 711 | "conflict. please power off this controller."); | ||
| 712 | return; | ||
| 713 | } | ||
| 714 | ndelay(1); | ||
| 715 | } while ((tmp & FRDY) == 0); | ||
| 716 | |||
| 717 | /* prepare parameters */ | ||
| 718 | bufsize = get_buffer_size(r8a66597, pipenum); | ||
| 719 | buf = req->req.buf + req->req.actual; | ||
| 720 | size = min(bufsize, req->req.length - req->req.actual); | ||
| 721 | |||
| 722 | /* write fifo */ | ||
| 723 | if (req->req.buf) { | ||
| 724 | if (size > 0) | ||
| 725 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | ||
| 726 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | ||
| 727 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | ||
| 728 | } | ||
| 729 | |||
| 730 | /* update parameters */ | ||
| 731 | req->req.actual += size; | ||
| 732 | |||
| 733 | /* check transfer finish */ | ||
| 734 | if ((!req->req.zero && (req->req.actual == req->req.length)) | ||
| 735 | || (size % ep->ep.maxpacket) | ||
| 736 | || (size == 0)) { | ||
| 737 | disable_irq_ready(r8a66597, pipenum); | ||
| 738 | disable_irq_empty(r8a66597, pipenum); | ||
| 739 | } else { | ||
| 740 | disable_irq_ready(r8a66597, pipenum); | ||
| 741 | enable_irq_empty(r8a66597, pipenum); | ||
| 742 | } | ||
| 743 | pipe_start(r8a66597, pipenum); | ||
| 744 | } | ||
| 745 | |||
| 746 | static void irq_packet_write(struct r8a66597_ep *ep, | ||
| 747 | struct r8a66597_request *req) | ||
| 748 | { | ||
| 749 | u16 tmp; | ||
| 750 | unsigned bufsize; | ||
| 751 | size_t size; | ||
| 752 | void *buf; | ||
| 753 | u16 pipenum = ep->pipenum; | ||
| 754 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 755 | |||
| 756 | pipe_change(r8a66597, pipenum); | ||
| 757 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
| 758 | if (unlikely((tmp & FRDY) == 0)) { | ||
| 759 | pipe_stop(r8a66597, pipenum); | ||
| 760 | pipe_irq_disable(r8a66597, pipenum); | ||
| 761 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | ||
| 762 | return; | ||
| 763 | } | ||
| 764 | |||
| 765 | /* prepare parameters */ | ||
| 766 | bufsize = get_buffer_size(r8a66597, pipenum); | ||
| 767 | buf = req->req.buf + req->req.actual; | ||
| 768 | size = min(bufsize, req->req.length - req->req.actual); | ||
| 769 | |||
| 770 | /* write fifo */ | ||
| 771 | if (req->req.buf) { | ||
| 772 | r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); | ||
| 773 | if ((size == 0) | ||
| 774 | || ((size % ep->ep.maxpacket) != 0) | ||
| 775 | || ((bufsize != ep->ep.maxpacket) | ||
| 776 | && (bufsize > size))) | ||
| 777 | r8a66597_bset(r8a66597, BVAL, ep->fifoctr); | ||
| 778 | } | ||
| 779 | |||
| 780 | /* update parameters */ | ||
| 781 | req->req.actual += size; | ||
| 782 | /* check transfer finish */ | ||
| 783 | if ((!req->req.zero && (req->req.actual == req->req.length)) | ||
| 784 | || (size % ep->ep.maxpacket) | ||
| 785 | || (size == 0)) { | ||
| 786 | disable_irq_ready(r8a66597, pipenum); | ||
| 787 | enable_irq_empty(r8a66597, pipenum); | ||
| 788 | } else { | ||
| 789 | disable_irq_empty(r8a66597, pipenum); | ||
| 790 | pipe_irq_enable(r8a66597, pipenum); | ||
| 791 | } | ||
| 792 | } | ||
| 793 | |||
| 794 | static void irq_packet_read(struct r8a66597_ep *ep, | ||
| 795 | struct r8a66597_request *req) | ||
| 796 | { | ||
| 797 | u16 tmp; | ||
| 798 | int rcv_len, bufsize, req_len; | ||
| 799 | int size; | ||
| 800 | void *buf; | ||
| 801 | u16 pipenum = ep->pipenum; | ||
| 802 | struct r8a66597 *r8a66597 = ep->r8a66597; | ||
| 803 | int finish = 0; | ||
| 804 | |||
| 805 | pipe_change(r8a66597, pipenum); | ||
| 806 | tmp = r8a66597_read(r8a66597, ep->fifoctr); | ||
| 807 | if (unlikely((tmp & FRDY) == 0)) { | ||
| 808 | req->req.status = -EPIPE; | ||
| 809 | pipe_stop(r8a66597, pipenum); | ||
| 810 | pipe_irq_disable(r8a66597, pipenum); | ||
| 811 | printk(KERN_ERR "read fifo not ready"); | ||
| 812 | return; | ||
| 813 | } | ||
| 814 | |||
| 815 | /* prepare parameters */ | ||
| 816 | rcv_len = tmp & DTLN; | ||
| 817 | bufsize = get_buffer_size(r8a66597, pipenum); | ||
| 818 | |||
| 819 | buf = req->req.buf + req->req.actual; | ||
| 820 | req_len = req->req.length - req->req.actual; | ||
| 821 | if (rcv_len < bufsize) | ||
| 822 | size = min(rcv_len, req_len); | ||
| 823 | else | ||
| 824 | size = min(bufsize, req_len); | ||
| 825 | |||
| 826 | /* update parameters */ | ||
| 827 | req->req.actual += size; | ||
| 828 | |||
| 829 | /* check transfer finish */ | ||
| 830 | if ((!req->req.zero && (req->req.actual == req->req.length)) | ||
| 831 | || (size % ep->ep.maxpacket) | ||
| 832 | || (size == 0)) { | ||
| 833 | pipe_stop(r8a66597, pipenum); | ||
| 834 | pipe_irq_disable(r8a66597, pipenum); | ||
| 835 | finish = 1; | ||
| 836 | } | ||
| 837 | |||
| 838 | /* read fifo */ | ||
| 839 | if (req->req.buf) { | ||
| 840 | if (size == 0) | ||
| 841 | r8a66597_write(r8a66597, BCLR, ep->fifoctr); | ||
| 842 | else | ||
| 843 | r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size); | ||
| 844 | |||
| 845 | } | ||
| 846 | |||
| 847 | if ((ep->pipenum != 0) && finish) | ||
| 848 | transfer_complete(ep, req, 0); | ||
| 849 | } | ||
| 850 | |||
| 851 | static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb) | ||
| 852 | { | ||
| 853 | u16 check; | ||
| 854 | u16 pipenum; | ||
| 855 | struct r8a66597_ep *ep; | ||
| 856 | struct r8a66597_request *req; | ||
| 857 | |||
| 858 | if ((status & BRDY0) && (enb & BRDY0)) { | ||
| 859 | r8a66597_write(r8a66597, ~BRDY0, BRDYSTS); | ||
| 860 | r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL); | ||
| 861 | |||
| 862 | ep = &r8a66597->ep[0]; | ||
| 863 | req = get_request_from_ep(ep); | ||
| 864 | irq_packet_read(ep, req); | ||
| 865 | } else { | ||
| 866 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | ||
| 867 | check = 1 << pipenum; | ||
| 868 | if ((status & check) && (enb & check)) { | ||
| 869 | r8a66597_write(r8a66597, ~check, BRDYSTS); | ||
| 870 | ep = r8a66597->pipenum2ep[pipenum]; | ||
| 871 | req = get_request_from_ep(ep); | ||
| 872 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | ||
| 873 | irq_packet_write(ep, req); | ||
| 874 | else | ||
| 875 | irq_packet_read(ep, req); | ||
| 876 | } | ||
| 877 | } | ||
| 878 | } | ||
| 879 | } | ||
| 880 | |||
| 881 | static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb) | ||
| 882 | { | ||
| 883 | u16 tmp; | ||
| 884 | u16 check; | ||
| 885 | u16 pipenum; | ||
| 886 | struct r8a66597_ep *ep; | ||
| 887 | struct r8a66597_request *req; | ||
| 888 | |||
| 889 | if ((status & BEMP0) && (enb & BEMP0)) { | ||
| 890 | r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); | ||
| 891 | |||
| 892 | ep = &r8a66597->ep[0]; | ||
| 893 | req = get_request_from_ep(ep); | ||
| 894 | irq_ep0_write(ep, req); | ||
| 895 | } else { | ||
| 896 | for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { | ||
| 897 | check = 1 << pipenum; | ||
| 898 | if ((status & check) && (enb & check)) { | ||
| 899 | r8a66597_write(r8a66597, ~check, BEMPSTS); | ||
| 900 | tmp = control_reg_get(r8a66597, pipenum); | ||
| 901 | if ((tmp & INBUFM) == 0) { | ||
| 902 | disable_irq_empty(r8a66597, pipenum); | ||
| 903 | pipe_irq_disable(r8a66597, pipenum); | ||
| 904 | pipe_stop(r8a66597, pipenum); | ||
| 905 | ep = r8a66597->pipenum2ep[pipenum]; | ||
| 906 | req = get_request_from_ep(ep); | ||
| 907 | if (!list_empty(&ep->queue)) | ||
| 908 | transfer_complete(ep, req, 0); | ||
| 909 | } | ||
| 910 | } | ||
| 911 | } | ||
| 912 | } | ||
| 913 | } | ||
| 914 | |||
| 915 | static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | ||
| 916 | __releases(r8a66597->lock) | ||
| 917 | __acquires(r8a66597->lock) | ||
| 918 | { | ||
| 919 | struct r8a66597_ep *ep; | ||
| 920 | u16 pid; | ||
| 921 | u16 status = 0; | ||
| 922 | u16 w_index = le16_to_cpu(ctrl->wIndex); | ||
| 923 | |||
| 924 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
| 925 | case USB_RECIP_DEVICE: | ||
| 926 | status = 1 << USB_DEVICE_SELF_POWERED; | ||
| 927 | break; | ||
| 928 | case USB_RECIP_INTERFACE: | ||
| 929 | status = 0; | ||
| 930 | break; | ||
| 931 | case USB_RECIP_ENDPOINT: | ||
| 932 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | ||
| 933 | pid = control_reg_get_pid(r8a66597, ep->pipenum); | ||
| 934 | if (pid == PID_STALL) | ||
| 935 | status = 1 << USB_ENDPOINT_HALT; | ||
| 936 | else | ||
| 937 | status = 0; | ||
| 938 | break; | ||
| 939 | default: | ||
| 940 | pipe_stall(r8a66597, 0); | ||
| 941 | return; /* exit */ | ||
| 942 | } | ||
| 943 | |||
| 944 | r8a66597->ep0_data = cpu_to_le16(status); | ||
| 945 | r8a66597->ep0_req->buf = &r8a66597->ep0_data; | ||
| 946 | r8a66597->ep0_req->length = 2; | ||
| 947 | /* AV: what happens if we get called again before that gets through? */ | ||
| 948 | spin_unlock(&r8a66597->lock); | ||
| 949 | r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL); | ||
| 950 | spin_lock(&r8a66597->lock); | ||
| 951 | } | ||
| 952 | |||
| 953 | static void clear_feature(struct r8a66597 *r8a66597, | ||
| 954 | struct usb_ctrlrequest *ctrl) | ||
| 955 | { | ||
| 956 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
| 957 | case USB_RECIP_DEVICE: | ||
| 958 | control_end(r8a66597, 1); | ||
| 959 | break; | ||
| 960 | case USB_RECIP_INTERFACE: | ||
| 961 | control_end(r8a66597, 1); | ||
| 962 | break; | ||
| 963 | case USB_RECIP_ENDPOINT: { | ||
| 964 | struct r8a66597_ep *ep; | ||
| 965 | struct r8a66597_request *req; | ||
| 966 | u16 w_index = le16_to_cpu(ctrl->wIndex); | ||
| 967 | |||
| 968 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | ||
| 969 | if (!ep->wedge) { | ||
| 970 | pipe_stop(r8a66597, ep->pipenum); | ||
| 971 | control_reg_sqclr(r8a66597, ep->pipenum); | ||
| 972 | spin_unlock(&r8a66597->lock); | ||
| 973 | usb_ep_clear_halt(&ep->ep); | ||
| 974 | spin_lock(&r8a66597->lock); | ||
| 975 | } | ||
| 976 | |||
| 977 | control_end(r8a66597, 1); | ||
| 978 | |||
| 979 | req = get_request_from_ep(ep); | ||
| 980 | if (ep->busy) { | ||
| 981 | ep->busy = 0; | ||
| 982 | if (list_empty(&ep->queue)) | ||
| 983 | break; | ||
| 984 | start_packet(ep, req); | ||
| 985 | } else if (!list_empty(&ep->queue)) | ||
| 986 | pipe_start(r8a66597, ep->pipenum); | ||
| 987 | } | ||
| 988 | break; | ||
| 989 | default: | ||
| 990 | pipe_stall(r8a66597, 0); | ||
| 991 | break; | ||
| 992 | } | ||
| 993 | } | ||
| 994 | |||
| 995 | static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | ||
| 996 | { | ||
| 997 | |||
| 998 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | ||
| 999 | case USB_RECIP_DEVICE: | ||
| 1000 | control_end(r8a66597, 1); | ||
| 1001 | break; | ||
| 1002 | case USB_RECIP_INTERFACE: | ||
| 1003 | control_end(r8a66597, 1); | ||
| 1004 | break; | ||
| 1005 | case USB_RECIP_ENDPOINT: { | ||
| 1006 | struct r8a66597_ep *ep; | ||
| 1007 | u16 w_index = le16_to_cpu(ctrl->wIndex); | ||
| 1008 | |||
| 1009 | ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; | ||
| 1010 | pipe_stall(r8a66597, ep->pipenum); | ||
| 1011 | |||
| 1012 | control_end(r8a66597, 1); | ||
| 1013 | } | ||
| 1014 | break; | ||
| 1015 | default: | ||
| 1016 | pipe_stall(r8a66597, 0); | ||
| 1017 | break; | ||
| 1018 | } | ||
| 1019 | } | ||
| 1020 | |||
| 1021 | /* if return value is true, call class driver's setup() */ | ||
| 1022 | static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) | ||
| 1023 | { | ||
| 1024 | u16 *p = (u16 *)ctrl; | ||
| 1025 | unsigned long offset = USBREQ; | ||
| 1026 | int i, ret = 0; | ||
| 1027 | |||
| 1028 | /* read fifo */ | ||
| 1029 | r8a66597_write(r8a66597, ~VALID, INTSTS0); | ||
| 1030 | |||
| 1031 | for (i = 0; i < 4; i++) | ||
| 1032 | p[i] = r8a66597_read(r8a66597, offset + i*2); | ||
| 1033 | |||
| 1034 | /* check request */ | ||
| 1035 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | ||
| 1036 | switch (ctrl->bRequest) { | ||
| 1037 | case USB_REQ_GET_STATUS: | ||
| 1038 | get_status(r8a66597, ctrl); | ||
| 1039 | break; | ||
| 1040 | case USB_REQ_CLEAR_FEATURE: | ||
| 1041 | clear_feature(r8a66597, ctrl); | ||
| 1042 | break; | ||
| 1043 | case USB_REQ_SET_FEATURE: | ||
| 1044 | set_feature(r8a66597, ctrl); | ||
| 1045 | break; | ||
| 1046 | default: | ||
| 1047 | ret = 1; | ||
| 1048 | break; | ||
| 1049 | } | ||
| 1050 | } else | ||
| 1051 | ret = 1; | ||
| 1052 | return ret; | ||
| 1053 | } | ||
| 1054 | |||
| 1055 | static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597) | ||
| 1056 | { | ||
| 1057 | u16 speed = get_usb_speed(r8a66597); | ||
| 1058 | |||
| 1059 | switch (speed) { | ||
| 1060 | case HSMODE: | ||
| 1061 | r8a66597->gadget.speed = USB_SPEED_HIGH; | ||
| 1062 | break; | ||
| 1063 | case FSMODE: | ||
| 1064 | r8a66597->gadget.speed = USB_SPEED_FULL; | ||
| 1065 | break; | ||
| 1066 | default: | ||
| 1067 | r8a66597->gadget.speed = USB_SPEED_UNKNOWN; | ||
| 1068 | printk(KERN_ERR "USB speed unknown\n"); | ||
| 1069 | } | ||
| 1070 | } | ||
| 1071 | |||
| 1072 | static void irq_device_state(struct r8a66597 *r8a66597) | ||
| 1073 | { | ||
| 1074 | u16 dvsq; | ||
| 1075 | |||
| 1076 | dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ; | ||
| 1077 | r8a66597_write(r8a66597, ~DVST, INTSTS0); | ||
| 1078 | |||
| 1079 | if (dvsq == DS_DFLT) { | ||
| 1080 | /* bus reset */ | ||
| 1081 | r8a66597->driver->disconnect(&r8a66597->gadget); | ||
| 1082 | r8a66597_update_usb_speed(r8a66597); | ||
| 1083 | } | ||
| 1084 | if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG) | ||
| 1085 | r8a66597_update_usb_speed(r8a66597); | ||
| 1086 | if ((dvsq == DS_CNFG || dvsq == DS_ADDS) | ||
| 1087 | && r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | ||
| 1088 | r8a66597_update_usb_speed(r8a66597); | ||
| 1089 | |||
| 1090 | r8a66597->old_dvsq = dvsq; | ||
| 1091 | } | ||
| 1092 | |||
| 1093 | static void irq_control_stage(struct r8a66597 *r8a66597) | ||
| 1094 | __releases(r8a66597->lock) | ||
| 1095 | __acquires(r8a66597->lock) | ||
| 1096 | { | ||
| 1097 | struct usb_ctrlrequest ctrl; | ||
| 1098 | u16 ctsq; | ||
| 1099 | |||
| 1100 | ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ; | ||
| 1101 | r8a66597_write(r8a66597, ~CTRT, INTSTS0); | ||
| 1102 | |||
| 1103 | switch (ctsq) { | ||
| 1104 | case CS_IDST: { | ||
| 1105 | struct r8a66597_ep *ep; | ||
| 1106 | struct r8a66597_request *req; | ||
| 1107 | ep = &r8a66597->ep[0]; | ||
| 1108 | req = get_request_from_ep(ep); | ||
| 1109 | transfer_complete(ep, req, 0); | ||
| 1110 | } | ||
| 1111 | break; | ||
| 1112 | |||
| 1113 | case CS_RDDS: | ||
| 1114 | case CS_WRDS: | ||
| 1115 | case CS_WRND: | ||
| 1116 | if (setup_packet(r8a66597, &ctrl)) { | ||
| 1117 | spin_unlock(&r8a66597->lock); | ||
| 1118 | if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl) | ||
| 1119 | < 0) | ||
| 1120 | pipe_stall(r8a66597, 0); | ||
| 1121 | spin_lock(&r8a66597->lock); | ||
| 1122 | } | ||
| 1123 | break; | ||
| 1124 | case CS_RDSS: | ||
| 1125 | case CS_WRSS: | ||
| 1126 | control_end(r8a66597, 0); | ||
| 1127 | break; | ||
| 1128 | default: | ||
| 1129 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | ||
| 1130 | break; | ||
| 1131 | } | ||
| 1132 | } | ||
| 1133 | |||
| 1134 | static irqreturn_t r8a66597_irq(int irq, void *_r8a66597) | ||
| 1135 | { | ||
| 1136 | struct r8a66597 *r8a66597 = _r8a66597; | ||
| 1137 | u16 intsts0; | ||
| 1138 | u16 intenb0; | ||
| 1139 | u16 brdysts, nrdysts, bempsts; | ||
| 1140 | u16 brdyenb, nrdyenb, bempenb; | ||
| 1141 | u16 savepipe; | ||
| 1142 | u16 mask0; | ||
| 1143 | |||
| 1144 | spin_lock(&r8a66597->lock); | ||
| 1145 | |||
| 1146 | intsts0 = r8a66597_read(r8a66597, INTSTS0); | ||
| 1147 | intenb0 = r8a66597_read(r8a66597, INTENB0); | ||
| 1148 | |||
| 1149 | savepipe = r8a66597_read(r8a66597, CFIFOSEL); | ||
| 1150 | |||
| 1151 | mask0 = intsts0 & intenb0; | ||
| 1152 | if (mask0) { | ||
| 1153 | brdysts = r8a66597_read(r8a66597, BRDYSTS); | ||
| 1154 | nrdysts = r8a66597_read(r8a66597, NRDYSTS); | ||
| 1155 | bempsts = r8a66597_read(r8a66597, BEMPSTS); | ||
| 1156 | brdyenb = r8a66597_read(r8a66597, BRDYENB); | ||
| 1157 | nrdyenb = r8a66597_read(r8a66597, NRDYENB); | ||
| 1158 | bempenb = r8a66597_read(r8a66597, BEMPENB); | ||
| 1159 | |||
| 1160 | if (mask0 & VBINT) { | ||
| 1161 | r8a66597_write(r8a66597, 0xffff & ~VBINT, | ||
| 1162 | INTSTS0); | ||
| 1163 | r8a66597_start_xclock(r8a66597); | ||
| 1164 | |||
| 1165 | /* start vbus sampling */ | ||
| 1166 | r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0) | ||
| 1167 | & VBSTS; | ||
| 1168 | r8a66597->scount = R8A66597_MAX_SAMPLING; | ||
| 1169 | |||
| 1170 | mod_timer(&r8a66597->timer, | ||
| 1171 | jiffies + msecs_to_jiffies(50)); | ||
| 1172 | } | ||
| 1173 | if (intsts0 & DVSQ) | ||
| 1174 | irq_device_state(r8a66597); | ||
| 1175 | |||
| 1176 | if ((intsts0 & BRDY) && (intenb0 & BRDYE) | ||
| 1177 | && (brdysts & brdyenb)) | ||
| 1178 | irq_pipe_ready(r8a66597, brdysts, brdyenb); | ||
| 1179 | if ((intsts0 & BEMP) && (intenb0 & BEMPE) | ||
| 1180 | && (bempsts & bempenb)) | ||
| 1181 | irq_pipe_empty(r8a66597, bempsts, bempenb); | ||
| 1182 | |||
| 1183 | if (intsts0 & CTRT) | ||
| 1184 | irq_control_stage(r8a66597); | ||
| 1185 | } | ||
| 1186 | |||
| 1187 | r8a66597_write(r8a66597, savepipe, CFIFOSEL); | ||
| 1188 | |||
| 1189 | spin_unlock(&r8a66597->lock); | ||
| 1190 | return IRQ_HANDLED; | ||
| 1191 | } | ||
| 1192 | |||
| 1193 | static void r8a66597_timer(unsigned long _r8a66597) | ||
| 1194 | { | ||
| 1195 | struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597; | ||
| 1196 | unsigned long flags; | ||
| 1197 | u16 tmp; | ||
| 1198 | |||
| 1199 | spin_lock_irqsave(&r8a66597->lock, flags); | ||
| 1200 | tmp = r8a66597_read(r8a66597, SYSCFG0); | ||
| 1201 | if (r8a66597->scount > 0) { | ||
| 1202 | tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS; | ||
| 1203 | if (tmp == r8a66597->old_vbus) { | ||
| 1204 | r8a66597->scount--; | ||
| 1205 | if (r8a66597->scount == 0) { | ||
| 1206 | if (tmp == VBSTS) | ||
| 1207 | r8a66597_usb_connect(r8a66597); | ||
| 1208 | else | ||
| 1209 | r8a66597_usb_disconnect(r8a66597); | ||
| 1210 | } else { | ||
| 1211 | mod_timer(&r8a66597->timer, | ||
| 1212 | jiffies + msecs_to_jiffies(50)); | ||
| 1213 | } | ||
| 1214 | } else { | ||
| 1215 | r8a66597->scount = R8A66597_MAX_SAMPLING; | ||
| 1216 | r8a66597->old_vbus = tmp; | ||
| 1217 | mod_timer(&r8a66597->timer, | ||
| 1218 | jiffies + msecs_to_jiffies(50)); | ||
| 1219 | } | ||
| 1220 | } | ||
| 1221 | spin_unlock_irqrestore(&r8a66597->lock, flags); | ||
| 1222 | } | ||
| 1223 | |||
| 1224 | /*-------------------------------------------------------------------------*/ | ||
| 1225 | static int r8a66597_enable(struct usb_ep *_ep, | ||
| 1226 | const struct usb_endpoint_descriptor *desc) | ||
| 1227 | { | ||
| 1228 | struct r8a66597_ep *ep; | ||
| 1229 | |||
| 1230 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
| 1231 | return alloc_pipe_config(ep, desc); | ||
| 1232 | } | ||
| 1233 | |||
| 1234 | static int r8a66597_disable(struct usb_ep *_ep) | ||
| 1235 | { | ||
| 1236 | struct r8a66597_ep *ep; | ||
| 1237 | struct r8a66597_request *req; | ||
| 1238 | unsigned long flags; | ||
| 1239 | |||
| 1240 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
| 1241 | BUG_ON(!ep); | ||
| 1242 | |||
| 1243 | while (!list_empty(&ep->queue)) { | ||
| 1244 | req = get_request_from_ep(ep); | ||
| 1245 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
| 1246 | transfer_complete(ep, req, -ECONNRESET); | ||
| 1247 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
| 1248 | } | ||
| 1249 | |||
| 1250 | pipe_irq_disable(ep->r8a66597, ep->pipenum); | ||
| 1251 | return free_pipe_config(ep); | ||
| 1252 | } | ||
| 1253 | |||
| 1254 | static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep, | ||
| 1255 | gfp_t gfp_flags) | ||
| 1256 | { | ||
| 1257 | struct r8a66597_request *req; | ||
| 1258 | |||
| 1259 | req = kzalloc(sizeof(struct r8a66597_request), gfp_flags); | ||
| 1260 | if (!req) | ||
| 1261 | return NULL; | ||
| 1262 | |||
| 1263 | INIT_LIST_HEAD(&req->queue); | ||
| 1264 | |||
| 1265 | return &req->req; | ||
| 1266 | } | ||
| 1267 | |||
| 1268 | static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req) | ||
| 1269 | { | ||
| 1270 | struct r8a66597_request *req; | ||
| 1271 | |||
| 1272 | req = container_of(_req, struct r8a66597_request, req); | ||
| 1273 | kfree(req); | ||
| 1274 | } | ||
| 1275 | |||
| 1276 | static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, | ||
| 1277 | gfp_t gfp_flags) | ||
| 1278 | { | ||
| 1279 | struct r8a66597_ep *ep; | ||
| 1280 | struct r8a66597_request *req; | ||
| 1281 | unsigned long flags; | ||
| 1282 | int request = 0; | ||
| 1283 | |||
| 1284 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
| 1285 | req = container_of(_req, struct r8a66597_request, req); | ||
| 1286 | |||
| 1287 | if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) | ||
| 1288 | return -ESHUTDOWN; | ||
| 1289 | |||
| 1290 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
| 1291 | |||
| 1292 | if (list_empty(&ep->queue)) | ||
| 1293 | request = 1; | ||
| 1294 | |||
| 1295 | list_add_tail(&req->queue, &ep->queue); | ||
| 1296 | req->req.actual = 0; | ||
| 1297 | req->req.status = -EINPROGRESS; | ||
| 1298 | |||
| 1299 | if (ep->desc == NULL) /* control */ | ||
| 1300 | start_ep0(ep, req); | ||
| 1301 | else { | ||
| 1302 | if (request && !ep->busy) | ||
| 1303 | start_packet(ep, req); | ||
| 1304 | } | ||
| 1305 | |||
| 1306 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
| 1307 | |||
| 1308 | return 0; | ||
| 1309 | } | ||
| 1310 | |||
| 1311 | static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req) | ||
| 1312 | { | ||
| 1313 | struct r8a66597_ep *ep; | ||
| 1314 | struct r8a66597_request *req; | ||
| 1315 | unsigned long flags; | ||
| 1316 | |||
| 1317 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
| 1318 | req = container_of(_req, struct r8a66597_request, req); | ||
| 1319 | |||
| 1320 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
| 1321 | if (!list_empty(&ep->queue)) | ||
| 1322 | transfer_complete(ep, req, -ECONNRESET); | ||
| 1323 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
| 1324 | |||
| 1325 | return 0; | ||
| 1326 | } | ||
| 1327 | |||
| 1328 | static int r8a66597_set_halt(struct usb_ep *_ep, int value) | ||
| 1329 | { | ||
| 1330 | struct r8a66597_ep *ep; | ||
| 1331 | struct r8a66597_request *req; | ||
| 1332 | unsigned long flags; | ||
| 1333 | int ret = 0; | ||
| 1334 | |||
| 1335 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
| 1336 | req = get_request_from_ep(ep); | ||
| 1337 | |||
| 1338 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
| 1339 | if (!list_empty(&ep->queue)) { | ||
| 1340 | ret = -EAGAIN; | ||
| 1341 | goto out; | ||
| 1342 | } | ||
| 1343 | if (value) { | ||
| 1344 | ep->busy = 1; | ||
| 1345 | pipe_stall(ep->r8a66597, ep->pipenum); | ||
| 1346 | } else { | ||
| 1347 | ep->busy = 0; | ||
| 1348 | ep->wedge = 0; | ||
| 1349 | pipe_stop(ep->r8a66597, ep->pipenum); | ||
| 1350 | } | ||
| 1351 | |||
| 1352 | out: | ||
| 1353 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
| 1354 | return ret; | ||
| 1355 | } | ||
| 1356 | |||
| 1357 | static int r8a66597_set_wedge(struct usb_ep *_ep) | ||
| 1358 | { | ||
| 1359 | struct r8a66597_ep *ep; | ||
| 1360 | unsigned long flags; | ||
| 1361 | |||
| 1362 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
| 1363 | |||
| 1364 | if (!ep || !ep->desc) | ||
| 1365 | return -EINVAL; | ||
| 1366 | |||
| 1367 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
| 1368 | ep->wedge = 1; | ||
| 1369 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
| 1370 | |||
| 1371 | return usb_ep_set_halt(_ep); | ||
| 1372 | } | ||
| 1373 | |||
| 1374 | static void r8a66597_fifo_flush(struct usb_ep *_ep) | ||
| 1375 | { | ||
| 1376 | struct r8a66597_ep *ep; | ||
| 1377 | unsigned long flags; | ||
| 1378 | |||
| 1379 | ep = container_of(_ep, struct r8a66597_ep, ep); | ||
| 1380 | spin_lock_irqsave(&ep->r8a66597->lock, flags); | ||
| 1381 | if (list_empty(&ep->queue) && !ep->busy) { | ||
| 1382 | pipe_stop(ep->r8a66597, ep->pipenum); | ||
| 1383 | r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr); | ||
| 1384 | } | ||
| 1385 | spin_unlock_irqrestore(&ep->r8a66597->lock, flags); | ||
| 1386 | } | ||
| 1387 | |||
| 1388 | static struct usb_ep_ops r8a66597_ep_ops = { | ||
| 1389 | .enable = r8a66597_enable, | ||
| 1390 | .disable = r8a66597_disable, | ||
| 1391 | |||
| 1392 | .alloc_request = r8a66597_alloc_request, | ||
| 1393 | .free_request = r8a66597_free_request, | ||
| 1394 | |||
| 1395 | .queue = r8a66597_queue, | ||
| 1396 | .dequeue = r8a66597_dequeue, | ||
| 1397 | |||
| 1398 | .set_halt = r8a66597_set_halt, | ||
| 1399 | .set_wedge = r8a66597_set_wedge, | ||
| 1400 | .fifo_flush = r8a66597_fifo_flush, | ||
| 1401 | }; | ||
| 1402 | |||
| 1403 | /*-------------------------------------------------------------------------*/ | ||
| 1404 | static struct r8a66597 *the_controller; | ||
| 1405 | |||
| 1406 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | ||
| 1407 | { | ||
| 1408 | struct r8a66597 *r8a66597 = the_controller; | ||
| 1409 | int retval; | ||
| 1410 | |||
| 1411 | if (!driver | ||
| 1412 | || driver->speed != USB_SPEED_HIGH | ||
| 1413 | || !driver->bind | ||
| 1414 | || !driver->setup) | ||
| 1415 | return -EINVAL; | ||
| 1416 | if (!r8a66597) | ||
| 1417 | return -ENODEV; | ||
| 1418 | if (r8a66597->driver) | ||
| 1419 | return -EBUSY; | ||
| 1420 | |||
| 1421 | /* hook up the driver */ | ||
| 1422 | driver->driver.bus = NULL; | ||
| 1423 | r8a66597->driver = driver; | ||
| 1424 | r8a66597->gadget.dev.driver = &driver->driver; | ||
| 1425 | |||
| 1426 | retval = device_add(&r8a66597->gadget.dev); | ||
| 1427 | if (retval) { | ||
| 1428 | printk(KERN_ERR "device_add error (%d)\n", retval); | ||
| 1429 | goto error; | ||
| 1430 | } | ||
| 1431 | |||
| 1432 | retval = driver->bind(&r8a66597->gadget); | ||
| 1433 | if (retval) { | ||
| 1434 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | ||
| 1435 | device_del(&r8a66597->gadget.dev); | ||
| 1436 | goto error; | ||
| 1437 | } | ||
| 1438 | |||
| 1439 | r8a66597_bset(r8a66597, VBSE, INTENB0); | ||
| 1440 | if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { | ||
| 1441 | r8a66597_start_xclock(r8a66597); | ||
| 1442 | /* start vbus sampling */ | ||
| 1443 | r8a66597->old_vbus = r8a66597_read(r8a66597, | ||
| 1444 | INTSTS0) & VBSTS; | ||
| 1445 | r8a66597->scount = R8A66597_MAX_SAMPLING; | ||
| 1446 | mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50)); | ||
| 1447 | } | ||
| 1448 | |||
| 1449 | return 0; | ||
| 1450 | |||
| 1451 | error: | ||
| 1452 | r8a66597->driver = NULL; | ||
| 1453 | r8a66597->gadget.dev.driver = NULL; | ||
| 1454 | |||
| 1455 | return retval; | ||
| 1456 | } | ||
| 1457 | EXPORT_SYMBOL(usb_gadget_register_driver); | ||
| 1458 | |||
| 1459 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | ||
| 1460 | { | ||
| 1461 | struct r8a66597 *r8a66597 = the_controller; | ||
| 1462 | unsigned long flags; | ||
| 1463 | |||
| 1464 | if (driver != r8a66597->driver || !driver->unbind) | ||
| 1465 | return -EINVAL; | ||
| 1466 | |||
| 1467 | spin_lock_irqsave(&r8a66597->lock, flags); | ||
| 1468 | if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) | ||
| 1469 | r8a66597_usb_disconnect(r8a66597); | ||
| 1470 | spin_unlock_irqrestore(&r8a66597->lock, flags); | ||
| 1471 | |||
| 1472 | r8a66597_bclr(r8a66597, VBSE, INTENB0); | ||
| 1473 | |||
| 1474 | driver->unbind(&r8a66597->gadget); | ||
| 1475 | |||
| 1476 | init_controller(r8a66597); | ||
| 1477 | disable_controller(r8a66597); | ||
| 1478 | |||
| 1479 | device_del(&r8a66597->gadget.dev); | ||
| 1480 | r8a66597->driver = NULL; | ||
| 1481 | return 0; | ||
| 1482 | } | ||
| 1483 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | ||
| 1484 | |||
| 1485 | /*-------------------------------------------------------------------------*/ | ||
| 1486 | static int r8a66597_get_frame(struct usb_gadget *_gadget) | ||
| 1487 | { | ||
| 1488 | struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget); | ||
| 1489 | return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; | ||
| 1490 | } | ||
| 1491 | |||
| 1492 | static struct usb_gadget_ops r8a66597_gadget_ops = { | ||
| 1493 | .get_frame = r8a66597_get_frame, | ||
| 1494 | }; | ||
| 1495 | |||
| 1496 | static int __exit r8a66597_remove(struct platform_device *pdev) | ||
| 1497 | { | ||
| 1498 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | ||
| 1499 | |||
| 1500 | del_timer_sync(&r8a66597->timer); | ||
| 1501 | iounmap((void *)r8a66597->reg); | ||
| 1502 | free_irq(platform_get_irq(pdev, 0), r8a66597); | ||
| 1503 | r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); | ||
| 1504 | #ifdef CONFIG_HAVE_CLK | ||
| 1505 | if (r8a66597->pdata->on_chip) { | ||
| 1506 | clk_disable(r8a66597->clk); | ||
| 1507 | clk_put(r8a66597->clk); | ||
| 1508 | } | ||
| 1509 | #endif | ||
| 1510 | kfree(r8a66597); | ||
| 1511 | return 0; | ||
| 1512 | } | ||
| 1513 | |||
| 1514 | static void nop_completion(struct usb_ep *ep, struct usb_request *r) | ||
| 1515 | { | ||
| 1516 | } | ||
| 1517 | |||
| 1518 | static int __init r8a66597_probe(struct platform_device *pdev) | ||
| 1519 | { | ||
| 1520 | #ifdef CONFIG_HAVE_CLK | ||
| 1521 | char clk_name[8]; | ||
| 1522 | #endif | ||
| 1523 | struct resource *res, *ires; | ||
| 1524 | int irq; | ||
| 1525 | void __iomem *reg = NULL; | ||
| 1526 | struct r8a66597 *r8a66597 = NULL; | ||
| 1527 | int ret = 0; | ||
| 1528 | int i; | ||
| 1529 | unsigned long irq_trigger; | ||
| 1530 | |||
| 1531 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 1532 | if (!res) { | ||
| 1533 | ret = -ENODEV; | ||
| 1534 | printk(KERN_ERR "platform_get_resource error.\n"); | ||
| 1535 | goto clean_up; | ||
| 1536 | } | ||
| 1537 | |||
| 1538 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
| 1539 | irq = ires->start; | ||
| 1540 | irq_trigger = ires->flags & IRQF_TRIGGER_MASK; | ||
| 1541 | |||
| 1542 | if (irq < 0) { | ||
| 1543 | ret = -ENODEV; | ||
| 1544 | printk(KERN_ERR "platform_get_irq error.\n"); | ||
| 1545 | goto clean_up; | ||
| 1546 | } | ||
| 1547 | |||
| 1548 | reg = ioremap(res->start, resource_size(res)); | ||
| 1549 | if (reg == NULL) { | ||
| 1550 | ret = -ENOMEM; | ||
| 1551 | printk(KERN_ERR "ioremap error.\n"); | ||
| 1552 | goto clean_up; | ||
| 1553 | } | ||
| 1554 | |||
| 1555 | /* initialize ucd */ | ||
| 1556 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); | ||
| 1557 | if (r8a66597 == NULL) { | ||
| 1558 | printk(KERN_ERR "kzalloc error\n"); | ||
| 1559 | goto clean_up; | ||
| 1560 | } | ||
| 1561 | |||
| 1562 | spin_lock_init(&r8a66597->lock); | ||
| 1563 | dev_set_drvdata(&pdev->dev, r8a66597); | ||
| 1564 | r8a66597->pdata = pdev->dev.platform_data; | ||
| 1565 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; | ||
| 1566 | |||
| 1567 | r8a66597->gadget.ops = &r8a66597_gadget_ops; | ||
| 1568 | device_initialize(&r8a66597->gadget.dev); | ||
| 1569 | dev_set_name(&r8a66597->gadget.dev, "gadget"); | ||
| 1570 | r8a66597->gadget.is_dualspeed = 1; | ||
| 1571 | r8a66597->gadget.dev.parent = &pdev->dev; | ||
| 1572 | r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; | ||
| 1573 | r8a66597->gadget.dev.release = pdev->dev.release; | ||
| 1574 | r8a66597->gadget.name = udc_name; | ||
| 1575 | |||
| 1576 | init_timer(&r8a66597->timer); | ||
| 1577 | r8a66597->timer.function = r8a66597_timer; | ||
| 1578 | r8a66597->timer.data = (unsigned long)r8a66597; | ||
| 1579 | r8a66597->reg = (unsigned long)reg; | ||
| 1580 | |||
| 1581 | #ifdef CONFIG_HAVE_CLK | ||
| 1582 | if (r8a66597->pdata->on_chip) { | ||
| 1583 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | ||
| 1584 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | ||
| 1585 | if (IS_ERR(r8a66597->clk)) { | ||
| 1586 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", | ||
| 1587 | clk_name); | ||
| 1588 | ret = PTR_ERR(r8a66597->clk); | ||
| 1589 | goto clean_up; | ||
| 1590 | } | ||
| 1591 | clk_enable(r8a66597->clk); | ||
| 1592 | } | ||
| 1593 | #endif | ||
| 1594 | |||
| 1595 | disable_controller(r8a66597); /* make sure controller is disabled */ | ||
| 1596 | |||
| 1597 | ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED, | ||
| 1598 | udc_name, r8a66597); | ||
| 1599 | if (ret < 0) { | ||
| 1600 | printk(KERN_ERR "request_irq error (%d)\n", ret); | ||
| 1601 | goto clean_up2; | ||
| 1602 | } | ||
| 1603 | |||
| 1604 | INIT_LIST_HEAD(&r8a66597->gadget.ep_list); | ||
| 1605 | r8a66597->gadget.ep0 = &r8a66597->ep[0].ep; | ||
| 1606 | INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list); | ||
| 1607 | for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { | ||
| 1608 | struct r8a66597_ep *ep = &r8a66597->ep[i]; | ||
| 1609 | |||
| 1610 | if (i != 0) { | ||
| 1611 | INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list); | ||
| 1612 | list_add_tail(&r8a66597->ep[i].ep.ep_list, | ||
| 1613 | &r8a66597->gadget.ep_list); | ||
| 1614 | } | ||
| 1615 | ep->r8a66597 = r8a66597; | ||
| 1616 | INIT_LIST_HEAD(&ep->queue); | ||
| 1617 | ep->ep.name = r8a66597_ep_name[i]; | ||
| 1618 | ep->ep.ops = &r8a66597_ep_ops; | ||
| 1619 | ep->ep.maxpacket = 512; | ||
| 1620 | } | ||
| 1621 | r8a66597->ep[0].ep.maxpacket = 64; | ||
| 1622 | r8a66597->ep[0].pipenum = 0; | ||
| 1623 | r8a66597->ep[0].fifoaddr = CFIFO; | ||
| 1624 | r8a66597->ep[0].fifosel = CFIFOSEL; | ||
| 1625 | r8a66597->ep[0].fifoctr = CFIFOCTR; | ||
| 1626 | r8a66597->ep[0].fifotrn = 0; | ||
| 1627 | r8a66597->ep[0].pipectr = get_pipectr_addr(0); | ||
| 1628 | r8a66597->pipenum2ep[0] = &r8a66597->ep[0]; | ||
| 1629 | r8a66597->epaddr2ep[0] = &r8a66597->ep[0]; | ||
| 1630 | |||
| 1631 | the_controller = r8a66597; | ||
| 1632 | |||
| 1633 | r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep, | ||
| 1634 | GFP_KERNEL); | ||
| 1635 | if (r8a66597->ep0_req == NULL) | ||
| 1636 | goto clean_up3; | ||
| 1637 | r8a66597->ep0_req->complete = nop_completion; | ||
| 1638 | |||
| 1639 | init_controller(r8a66597); | ||
| 1640 | |||
| 1641 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); | ||
| 1642 | return 0; | ||
| 1643 | |||
| 1644 | clean_up3: | ||
| 1645 | free_irq(irq, r8a66597); | ||
| 1646 | clean_up2: | ||
| 1647 | #ifdef CONFIG_HAVE_CLK | ||
| 1648 | if (r8a66597->pdata->on_chip) { | ||
| 1649 | clk_disable(r8a66597->clk); | ||
| 1650 | clk_put(r8a66597->clk); | ||
| 1651 | } | ||
| 1652 | #endif | ||
| 1653 | clean_up: | ||
| 1654 | if (r8a66597) { | ||
| 1655 | if (r8a66597->ep0_req) | ||
| 1656 | r8a66597_free_request(&r8a66597->ep[0].ep, | ||
| 1657 | r8a66597->ep0_req); | ||
| 1658 | kfree(r8a66597); | ||
| 1659 | } | ||
| 1660 | if (reg) | ||
| 1661 | iounmap(reg); | ||
| 1662 | |||
| 1663 | return ret; | ||
| 1664 | } | ||
| 1665 | |||
| 1666 | /*-------------------------------------------------------------------------*/ | ||
| 1667 | static struct platform_driver r8a66597_driver = { | ||
| 1668 | .remove = __exit_p(r8a66597_remove), | ||
| 1669 | .driver = { | ||
| 1670 | .name = (char *) udc_name, | ||
| 1671 | }, | ||
| 1672 | }; | ||
| 1673 | |||
| 1674 | static int __init r8a66597_udc_init(void) | ||
| 1675 | { | ||
| 1676 | return platform_driver_probe(&r8a66597_driver, r8a66597_probe); | ||
| 1677 | } | ||
| 1678 | module_init(r8a66597_udc_init); | ||
| 1679 | |||
| 1680 | static void __exit r8a66597_udc_cleanup(void) | ||
| 1681 | { | ||
| 1682 | platform_driver_unregister(&r8a66597_driver); | ||
| 1683 | } | ||
| 1684 | module_exit(r8a66597_udc_cleanup); | ||
| 1685 | |||
| 1686 | MODULE_DESCRIPTION("R8A66597 USB gadget driver"); | ||
| 1687 | MODULE_LICENSE("GPL"); | ||
| 1688 | MODULE_AUTHOR("Yoshihiro Shimoda"); | ||
| 1689 | |||
diff --git a/drivers/usb/gadget/r8a66597-udc.h b/drivers/usb/gadget/r8a66597-udc.h new file mode 100644 index 000000000000..03087e7b9190 --- /dev/null +++ b/drivers/usb/gadget/r8a66597-udc.h | |||
| @@ -0,0 +1,256 @@ | |||
| 1 | /* | ||
| 2 | * R8A66597 UDC | ||
| 3 | * | ||
| 4 | * Copyright (C) 2007-2009 Renesas Solutions Corp. | ||
| 5 | * | ||
| 6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; version 2 of the License. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 20 | * | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef __R8A66597_H__ | ||
| 24 | #define __R8A66597_H__ | ||
| 25 | |||
| 26 | #ifdef CONFIG_HAVE_CLK | ||
| 27 | #include <linux/clk.h> | ||
| 28 | #endif | ||
| 29 | |||
| 30 | #include <linux/usb/r8a66597.h> | ||
| 31 | |||
| 32 | #define R8A66597_MAX_SAMPLING 10 | ||
| 33 | |||
| 34 | #define R8A66597_MAX_NUM_PIPE 8 | ||
| 35 | #define R8A66597_MAX_NUM_BULK 3 | ||
| 36 | #define R8A66597_MAX_NUM_ISOC 2 | ||
| 37 | #define R8A66597_MAX_NUM_INT 2 | ||
| 38 | |||
| 39 | #define R8A66597_BASE_PIPENUM_BULK 3 | ||
| 40 | #define R8A66597_BASE_PIPENUM_ISOC 1 | ||
| 41 | #define R8A66597_BASE_PIPENUM_INT 6 | ||
| 42 | |||
| 43 | #define R8A66597_BASE_BUFNUM 6 | ||
| 44 | #define R8A66597_MAX_BUFNUM 0x4F | ||
| 45 | |||
| 46 | #define is_bulk_pipe(pipenum) \ | ||
| 47 | ((pipenum >= R8A66597_BASE_PIPENUM_BULK) && \ | ||
| 48 | (pipenum < (R8A66597_BASE_PIPENUM_BULK + R8A66597_MAX_NUM_BULK))) | ||
| 49 | #define is_interrupt_pipe(pipenum) \ | ||
| 50 | ((pipenum >= R8A66597_BASE_PIPENUM_INT) && \ | ||
| 51 | (pipenum < (R8A66597_BASE_PIPENUM_INT + R8A66597_MAX_NUM_INT))) | ||
| 52 | #define is_isoc_pipe(pipenum) \ | ||
| 53 | ((pipenum >= R8A66597_BASE_PIPENUM_ISOC) && \ | ||
| 54 | (pipenum < (R8A66597_BASE_PIPENUM_ISOC + R8A66597_MAX_NUM_ISOC))) | ||
| 55 | |||
| 56 | struct r8a66597_pipe_info { | ||
| 57 | u16 pipe; | ||
| 58 | u16 epnum; | ||
| 59 | u16 maxpacket; | ||
| 60 | u16 type; | ||
| 61 | u16 interval; | ||
| 62 | u16 dir_in; | ||
| 63 | }; | ||
| 64 | |||
| 65 | struct r8a66597_request { | ||
| 66 | struct usb_request req; | ||
| 67 | struct list_head queue; | ||
| 68 | }; | ||
| 69 | |||
| 70 | struct r8a66597_ep { | ||
| 71 | struct usb_ep ep; | ||
| 72 | struct r8a66597 *r8a66597; | ||
| 73 | |||
| 74 | struct list_head queue; | ||
| 75 | unsigned busy:1; | ||
| 76 | unsigned wedge:1; | ||
| 77 | unsigned internal_ccpl:1; /* use only control */ | ||
| 78 | |||
| 79 | /* this member can able to after r8a66597_enable */ | ||
| 80 | unsigned use_dma:1; | ||
| 81 | u16 pipenum; | ||
| 82 | u16 type; | ||
| 83 | const struct usb_endpoint_descriptor *desc; | ||
| 84 | /* register address */ | ||
| 85 | unsigned char fifoaddr; | ||
| 86 | unsigned char fifosel; | ||
| 87 | unsigned char fifoctr; | ||
| 88 | unsigned char fifotrn; | ||
| 89 | unsigned char pipectr; | ||
| 90 | }; | ||
| 91 | |||
| 92 | struct r8a66597 { | ||
| 93 | spinlock_t lock; | ||
| 94 | unsigned long reg; | ||
| 95 | |||
| 96 | #ifdef CONFIG_HAVE_CLK | ||
| 97 | struct clk *clk; | ||
| 98 | #endif | ||
| 99 | struct r8a66597_platdata *pdata; | ||
| 100 | |||
| 101 | struct usb_gadget gadget; | ||
| 102 | struct usb_gadget_driver *driver; | ||
| 103 | |||
| 104 | struct r8a66597_ep ep[R8A66597_MAX_NUM_PIPE]; | ||
| 105 | struct r8a66597_ep *pipenum2ep[R8A66597_MAX_NUM_PIPE]; | ||
| 106 | struct r8a66597_ep *epaddr2ep[16]; | ||
| 107 | |||
| 108 | struct timer_list timer; | ||
| 109 | struct usb_request *ep0_req; /* for internal request */ | ||
| 110 | u16 ep0_data; /* for internal request */ | ||
| 111 | u16 old_vbus; | ||
| 112 | u16 scount; | ||
| 113 | u16 old_dvsq; | ||
| 114 | |||
| 115 | /* pipe config */ | ||
| 116 | unsigned char bulk; | ||
| 117 | unsigned char interrupt; | ||
| 118 | unsigned char isochronous; | ||
| 119 | unsigned char num_dma; | ||
| 120 | |||
| 121 | unsigned irq_sense_low:1; | ||
| 122 | }; | ||
| 123 | |||
| 124 | #define gadget_to_r8a66597(_gadget) \ | ||
| 125 | container_of(_gadget, struct r8a66597, gadget) | ||
| 126 | #define r8a66597_to_gadget(r8a66597) (&r8a66597->gadget) | ||
| 127 | |||
| 128 | static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset) | ||
| 129 | { | ||
| 130 | return inw(r8a66597->reg + offset); | ||
| 131 | } | ||
| 132 | |||
| 133 | static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, | ||
| 134 | unsigned long offset, u16 *buf, | ||
| 135 | int len) | ||
| 136 | { | ||
| 137 | if (r8a66597->pdata->on_chip) { | ||
| 138 | unsigned long fifoaddr = r8a66597->reg + offset; | ||
| 139 | unsigned long count; | ||
| 140 | union { | ||
| 141 | unsigned long dword; | ||
| 142 | unsigned char byte[4]; | ||
| 143 | } data; | ||
| 144 | unsigned char *pb; | ||
| 145 | int i; | ||
| 146 | |||
| 147 | count = len / 4; | ||
| 148 | insl(fifoaddr, buf, count); | ||
| 149 | |||
| 150 | if (len & 0x00000003) { | ||
| 151 | data.dword = inl(fifoaddr); | ||
| 152 | pb = (unsigned char *)buf + count * 4; | ||
| 153 | for (i = 0; i < (len & 0x00000003); i++) | ||
| 154 | pb[i] = data.byte[i]; | ||
| 155 | } | ||
| 156 | } else { | ||
| 157 | len = (len + 1) / 2; | ||
| 158 | insw(r8a66597->reg + offset, buf, len); | ||
| 159 | } | ||
| 160 | } | ||
| 161 | |||
| 162 | static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, | ||
| 163 | unsigned long offset) | ||
| 164 | { | ||
| 165 | outw(val, r8a66597->reg + offset); | ||
| 166 | } | ||
| 167 | |||
| 168 | static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, | ||
| 169 | unsigned long offset, u16 *buf, | ||
| 170 | int len) | ||
| 171 | { | ||
| 172 | unsigned long fifoaddr = r8a66597->reg + offset; | ||
| 173 | |||
| 174 | if (r8a66597->pdata->on_chip) { | ||
| 175 | unsigned long count; | ||
| 176 | unsigned char *pb; | ||
| 177 | int i; | ||
| 178 | |||
| 179 | count = len / 4; | ||
| 180 | outsl(fifoaddr, buf, count); | ||
| 181 | |||
| 182 | if (len & 0x00000003) { | ||
| 183 | pb = (unsigned char *)buf + count * 4; | ||
| 184 | for (i = 0; i < (len & 0x00000003); i++) { | ||
| 185 | if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) | ||
| 186 | outb(pb[i], fifoaddr + i); | ||
| 187 | else | ||
| 188 | outb(pb[i], fifoaddr + 3 - i); | ||
| 189 | } | ||
| 190 | } | ||
| 191 | } else { | ||
| 192 | int odd = len & 0x0001; | ||
| 193 | |||
| 194 | len = len / 2; | ||
| 195 | outsw(fifoaddr, buf, len); | ||
| 196 | if (unlikely(odd)) { | ||
| 197 | buf = &buf[len]; | ||
| 198 | outb((unsigned char)*buf, fifoaddr); | ||
| 199 | } | ||
| 200 | } | ||
| 201 | } | ||
| 202 | |||
| 203 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, | ||
| 204 | u16 val, u16 pat, unsigned long offset) | ||
| 205 | { | ||
| 206 | u16 tmp; | ||
| 207 | tmp = r8a66597_read(r8a66597, offset); | ||
| 208 | tmp = tmp & (~pat); | ||
| 209 | tmp = tmp | val; | ||
| 210 | r8a66597_write(r8a66597, tmp, offset); | ||
| 211 | } | ||
| 212 | |||
| 213 | static inline u16 get_xtal_from_pdata(struct r8a66597_platdata *pdata) | ||
| 214 | { | ||
| 215 | u16 clock = 0; | ||
| 216 | |||
| 217 | switch (pdata->xtal) { | ||
| 218 | case R8A66597_PLATDATA_XTAL_12MHZ: | ||
| 219 | clock = XTAL12; | ||
| 220 | break; | ||
| 221 | case R8A66597_PLATDATA_XTAL_24MHZ: | ||
| 222 | clock = XTAL24; | ||
| 223 | break; | ||
| 224 | case R8A66597_PLATDATA_XTAL_48MHZ: | ||
| 225 | clock = XTAL48; | ||
| 226 | break; | ||
| 227 | default: | ||
| 228 | printk(KERN_ERR "r8a66597: platdata clock is wrong.\n"); | ||
| 229 | break; | ||
| 230 | } | ||
| 231 | |||
| 232 | return clock; | ||
| 233 | } | ||
| 234 | |||
| 235 | #define r8a66597_bclr(r8a66597, val, offset) \ | ||
| 236 | r8a66597_mdfy(r8a66597, 0, val, offset) | ||
| 237 | #define r8a66597_bset(r8a66597, val, offset) \ | ||
| 238 | r8a66597_mdfy(r8a66597, val, 0, offset) | ||
| 239 | |||
| 240 | #define get_pipectr_addr(pipenum) (PIPE1CTR + (pipenum - 1) * 2) | ||
| 241 | |||
| 242 | #define enable_irq_ready(r8a66597, pipenum) \ | ||
| 243 | enable_pipe_irq(r8a66597, pipenum, BRDYENB) | ||
| 244 | #define disable_irq_ready(r8a66597, pipenum) \ | ||
| 245 | disable_pipe_irq(r8a66597, pipenum, BRDYENB) | ||
| 246 | #define enable_irq_empty(r8a66597, pipenum) \ | ||
| 247 | enable_pipe_irq(r8a66597, pipenum, BEMPENB) | ||
| 248 | #define disable_irq_empty(r8a66597, pipenum) \ | ||
| 249 | disable_pipe_irq(r8a66597, pipenum, BEMPENB) | ||
| 250 | #define enable_irq_nrdy(r8a66597, pipenum) \ | ||
| 251 | enable_pipe_irq(r8a66597, pipenum, NRDYENB) | ||
| 252 | #define disable_irq_nrdy(r8a66597, pipenum) \ | ||
| 253 | disable_pipe_irq(r8a66597, pipenum, NRDYENB) | ||
| 254 | |||
| 255 | #endif /* __R8A66597_H__ */ | ||
| 256 | |||
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 1a920c70b5a1..f21ca7d27a43 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig | |||
| @@ -336,13 +336,6 @@ config USB_R8A66597_HCD | |||
| 336 | To compile this driver as a module, choose M here: the | 336 | To compile this driver as a module, choose M here: the |
| 337 | module will be called r8a66597-hcd. | 337 | module will be called r8a66597-hcd. |
| 338 | 338 | ||
| 339 | config SUPERH_ON_CHIP_R8A66597 | ||
| 340 | boolean "Enable SuperH on-chip R8A66597 USB" | ||
| 341 | depends on USB_R8A66597_HCD && (CPU_SUBTYPE_SH7366 || CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724) | ||
| 342 | help | ||
| 343 | This driver enables support for the on-chip R8A66597 in the | ||
| 344 | SH7366, SH7723 and SH7724 processors. | ||
| 345 | |||
| 346 | config USB_WHCI_HCD | 339 | config USB_WHCI_HCD |
| 347 | tristate "Wireless USB Host Controller Interface (WHCI) driver (EXPERIMENTAL)" | 340 | tristate "Wireless USB Host Controller Interface (WHCI) driver (EXPERIMENTAL)" |
| 348 | depends on EXPERIMENTAL | 341 | depends on EXPERIMENTAL |
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index e18f74946e68..749b53742828 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c | |||
| @@ -91,43 +91,43 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) | |||
| 91 | u16 tmp; | 91 | u16 tmp; |
| 92 | int i = 0; | 92 | int i = 0; |
| 93 | 93 | ||
| 94 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | 94 | if (r8a66597->pdata->on_chip) { |
| 95 | #if defined(CONFIG_HAVE_CLK) | 95 | #ifdef CONFIG_HAVE_CLK |
| 96 | clk_enable(r8a66597->clk); | 96 | clk_enable(r8a66597->clk); |
| 97 | #endif | 97 | #endif |
| 98 | do { | 98 | do { |
| 99 | r8a66597_write(r8a66597, SCKE, SYSCFG0); | 99 | r8a66597_write(r8a66597, SCKE, SYSCFG0); |
| 100 | tmp = r8a66597_read(r8a66597, SYSCFG0); | 100 | tmp = r8a66597_read(r8a66597, SYSCFG0); |
| 101 | if (i++ > 1000) { | 101 | if (i++ > 1000) { |
| 102 | printk(KERN_ERR "r8a66597: register access fail.\n"); | 102 | printk(KERN_ERR "r8a66597: reg access fail.\n"); |
| 103 | return -ENXIO; | 103 | return -ENXIO; |
| 104 | } | 104 | } |
| 105 | } while ((tmp & SCKE) != SCKE); | 105 | } while ((tmp & SCKE) != SCKE); |
| 106 | r8a66597_write(r8a66597, 0x04, 0x02); | 106 | r8a66597_write(r8a66597, 0x04, 0x02); |
| 107 | #else | 107 | } else { |
| 108 | do { | 108 | do { |
| 109 | r8a66597_write(r8a66597, USBE, SYSCFG0); | 109 | r8a66597_write(r8a66597, USBE, SYSCFG0); |
| 110 | tmp = r8a66597_read(r8a66597, SYSCFG0); | 110 | tmp = r8a66597_read(r8a66597, SYSCFG0); |
| 111 | if (i++ > 1000) { | 111 | if (i++ > 1000) { |
| 112 | printk(KERN_ERR "r8a66597: register access fail.\n"); | 112 | printk(KERN_ERR "r8a66597: reg access fail.\n"); |
| 113 | return -ENXIO; | 113 | return -ENXIO; |
| 114 | } | 114 | } |
| 115 | } while ((tmp & USBE) != USBE); | 115 | } while ((tmp & USBE) != USBE); |
| 116 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | 116 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); |
| 117 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), XTAL, | 117 | r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), |
| 118 | SYSCFG0); | 118 | XTAL, SYSCFG0); |
| 119 | 119 | ||
| 120 | i = 0; | 120 | i = 0; |
| 121 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); | 121 | r8a66597_bset(r8a66597, XCKE, SYSCFG0); |
| 122 | do { | 122 | do { |
| 123 | msleep(1); | 123 | msleep(1); |
| 124 | tmp = r8a66597_read(r8a66597, SYSCFG0); | 124 | tmp = r8a66597_read(r8a66597, SYSCFG0); |
| 125 | if (i++ > 500) { | 125 | if (i++ > 500) { |
| 126 | printk(KERN_ERR "r8a66597: register access fail.\n"); | 126 | printk(KERN_ERR "r8a66597: reg access fail.\n"); |
| 127 | return -ENXIO; | 127 | return -ENXIO; |
| 128 | } | 128 | } |
| 129 | } while ((tmp & SCKE) != SCKE); | 129 | } while ((tmp & SCKE) != SCKE); |
| 130 | #endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */ | 130 | } |
| 131 | 131 | ||
| 132 | return 0; | 132 | return 0; |
| 133 | } | 133 | } |
| @@ -136,15 +136,16 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597) | |||
| 136 | { | 136 | { |
| 137 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); | 137 | r8a66597_bclr(r8a66597, SCKE, SYSCFG0); |
| 138 | udelay(1); | 138 | udelay(1); |
| 139 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | 139 | |
| 140 | #if defined(CONFIG_HAVE_CLK) | 140 | if (r8a66597->pdata->on_chip) { |
| 141 | clk_disable(r8a66597->clk); | 141 | #ifdef CONFIG_HAVE_CLK |
| 142 | #endif | 142 | clk_disable(r8a66597->clk); |
| 143 | #else | ||
| 144 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | ||
| 145 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | ||
| 146 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
| 147 | #endif | 143 | #endif |
| 144 | } else { | ||
| 145 | r8a66597_bclr(r8a66597, PLLC, SYSCFG0); | ||
| 146 | r8a66597_bclr(r8a66597, XCKE, SYSCFG0); | ||
| 147 | r8a66597_bclr(r8a66597, USBE, SYSCFG0); | ||
| 148 | } | ||
| 148 | } | 149 | } |
| 149 | 150 | ||
| 150 | static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) | 151 | static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) |
| @@ -205,7 +206,7 @@ static int enable_controller(struct r8a66597 *r8a66597) | |||
| 205 | 206 | ||
| 206 | r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1); | 207 | r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1); |
| 207 | 208 | ||
| 208 | for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) | 209 | for (port = 0; port < r8a66597->max_root_hub; port++) |
| 209 | r8a66597_enable_port(r8a66597, port); | 210 | r8a66597_enable_port(r8a66597, port); |
| 210 | 211 | ||
| 211 | return 0; | 212 | return 0; |
| @@ -218,7 +219,7 @@ static void disable_controller(struct r8a66597 *r8a66597) | |||
| 218 | r8a66597_write(r8a66597, 0, INTENB0); | 219 | r8a66597_write(r8a66597, 0, INTENB0); |
| 219 | r8a66597_write(r8a66597, 0, INTSTS0); | 220 | r8a66597_write(r8a66597, 0, INTSTS0); |
| 220 | 221 | ||
| 221 | for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) | 222 | for (port = 0; port < r8a66597->max_root_hub; port++) |
| 222 | r8a66597_disable_port(r8a66597, port); | 223 | r8a66597_disable_port(r8a66597, port); |
| 223 | 224 | ||
| 224 | r8a66597_clock_disable(r8a66597); | 225 | r8a66597_clock_disable(r8a66597); |
| @@ -249,11 +250,12 @@ static int is_hub_limit(char *devpath) | |||
| 249 | return ((strlen(devpath) >= 4) ? 1 : 0); | 250 | return ((strlen(devpath) >= 4) ? 1 : 0); |
| 250 | } | 251 | } |
| 251 | 252 | ||
| 252 | static void get_port_number(char *devpath, u16 *root_port, u16 *hub_port) | 253 | static void get_port_number(struct r8a66597 *r8a66597, |
| 254 | char *devpath, u16 *root_port, u16 *hub_port) | ||
| 253 | { | 255 | { |
| 254 | if (root_port) { | 256 | if (root_port) { |
| 255 | *root_port = (devpath[0] & 0x0F) - 1; | 257 | *root_port = (devpath[0] & 0x0F) - 1; |
| 256 | if (*root_port >= R8A66597_MAX_ROOT_HUB) | 258 | if (*root_port >= r8a66597->max_root_hub) |
| 257 | printk(KERN_ERR "r8a66597: Illegal root port number.\n"); | 259 | printk(KERN_ERR "r8a66597: Illegal root port number.\n"); |
| 258 | } | 260 | } |
| 259 | if (hub_port) | 261 | if (hub_port) |
| @@ -355,7 +357,8 @@ static int make_r8a66597_device(struct r8a66597 *r8a66597, | |||
| 355 | INIT_LIST_HEAD(&dev->device_list); | 357 | INIT_LIST_HEAD(&dev->device_list); |
| 356 | list_add_tail(&dev->device_list, &r8a66597->child_device); | 358 | list_add_tail(&dev->device_list, &r8a66597->child_device); |
| 357 | 359 | ||
| 358 | get_port_number(urb->dev->devpath, &dev->root_port, &dev->hub_port); | 360 | get_port_number(r8a66597, urb->dev->devpath, |
| 361 | &dev->root_port, &dev->hub_port); | ||
| 359 | if (!is_child_device(urb->dev->devpath)) | 362 | if (!is_child_device(urb->dev->devpath)) |
| 360 | r8a66597->root_hub[dev->root_port].dev = dev; | 363 | r8a66597->root_hub[dev->root_port].dev = dev; |
| 361 | 364 | ||
| @@ -420,7 +423,7 @@ static void free_usb_address(struct r8a66597 *r8a66597, | |||
| 420 | list_del(&dev->device_list); | 423 | list_del(&dev->device_list); |
| 421 | kfree(dev); | 424 | kfree(dev); |
| 422 | 425 | ||
| 423 | for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { | 426 | for (port = 0; port < r8a66597->max_root_hub; port++) { |
| 424 | if (r8a66597->root_hub[port].dev == dev) { | 427 | if (r8a66597->root_hub[port].dev == dev) { |
| 425 | r8a66597->root_hub[port].dev = NULL; | 428 | r8a66597->root_hub[port].dev = NULL; |
| 426 | break; | 429 | break; |
| @@ -495,10 +498,20 @@ static void r8a66597_pipe_toggle(struct r8a66597 *r8a66597, | |||
| 495 | r8a66597_bset(r8a66597, SQCLR, pipe->pipectr); | 498 | r8a66597_bset(r8a66597, SQCLR, pipe->pipectr); |
| 496 | } | 499 | } |
| 497 | 500 | ||
| 501 | static inline unsigned short mbw_value(struct r8a66597 *r8a66597) | ||
| 502 | { | ||
| 503 | if (r8a66597->pdata->on_chip) | ||
| 504 | return MBW_32; | ||
| 505 | else | ||
| 506 | return MBW_16; | ||
| 507 | } | ||
| 508 | |||
| 498 | /* this function must be called with interrupt disabled */ | 509 | /* this function must be called with interrupt disabled */ |
| 499 | static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum) | 510 | static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum) |
| 500 | { | 511 | { |
| 501 | r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL); | 512 | unsigned short mbw = mbw_value(r8a66597); |
| 513 | |||
| 514 | r8a66597_mdfy(r8a66597, mbw | pipenum, mbw | CURPIPE, CFIFOSEL); | ||
| 502 | r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum); | 515 | r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum); |
| 503 | } | 516 | } |
| 504 | 517 | ||
| @@ -506,11 +519,13 @@ static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum) | |||
| 506 | static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597, | 519 | static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597, |
| 507 | struct r8a66597_pipe *pipe) | 520 | struct r8a66597_pipe *pipe) |
| 508 | { | 521 | { |
| 522 | unsigned short mbw = mbw_value(r8a66597); | ||
| 523 | |||
| 509 | cfifo_change(r8a66597, 0); | 524 | cfifo_change(r8a66597, 0); |
| 510 | r8a66597_mdfy(r8a66597, MBW | 0, MBW | CURPIPE, D0FIFOSEL); | 525 | r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D0FIFOSEL); |
| 511 | r8a66597_mdfy(r8a66597, MBW | 0, MBW | CURPIPE, D1FIFOSEL); | 526 | r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D1FIFOSEL); |
| 512 | 527 | ||
| 513 | r8a66597_mdfy(r8a66597, MBW | pipe->info.pipenum, MBW | CURPIPE, | 528 | r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, mbw | CURPIPE, |
| 514 | pipe->fifosel); | 529 | pipe->fifosel); |
| 515 | r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum); | 530 | r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum); |
| 516 | } | 531 | } |
| @@ -742,9 +757,13 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597, | |||
| 742 | struct r8a66597_pipe *pipe, | 757 | struct r8a66597_pipe *pipe, |
| 743 | struct urb *urb) | 758 | struct urb *urb) |
| 744 | { | 759 | { |
| 745 | #if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
| 746 | int i; | 760 | int i; |
| 747 | struct r8a66597_pipe_info *info = &pipe->info; | 761 | struct r8a66597_pipe_info *info = &pipe->info; |
| 762 | unsigned short mbw = mbw_value(r8a66597); | ||
| 763 | |||
| 764 | /* pipe dma is only for external controlles */ | ||
| 765 | if (r8a66597->pdata->on_chip) | ||
| 766 | return; | ||
| 748 | 767 | ||
| 749 | if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) { | 768 | if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) { |
| 750 | for (i = 0; i < R8A66597_MAX_DMA_CHANNEL; i++) { | 769 | for (i = 0; i < R8A66597_MAX_DMA_CHANNEL; i++) { |
| @@ -763,8 +782,8 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597, | |||
| 763 | set_pipe_reg_addr(pipe, i); | 782 | set_pipe_reg_addr(pipe, i); |
| 764 | 783 | ||
| 765 | cfifo_change(r8a66597, 0); | 784 | cfifo_change(r8a66597, 0); |
| 766 | r8a66597_mdfy(r8a66597, MBW | pipe->info.pipenum, | 785 | r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, |
| 767 | MBW | CURPIPE, pipe->fifosel); | 786 | mbw | CURPIPE, pipe->fifosel); |
| 768 | 787 | ||
| 769 | r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, | 788 | r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, |
| 770 | pipe->info.pipenum); | 789 | pipe->info.pipenum); |
| @@ -772,7 +791,6 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597, | |||
| 772 | break; | 791 | break; |
| 773 | } | 792 | } |
| 774 | } | 793 | } |
| 775 | #endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */ | ||
| 776 | } | 794 | } |
| 777 | 795 | ||
| 778 | /* this function must be called with interrupt disabled */ | 796 | /* this function must be called with interrupt disabled */ |
| @@ -1769,7 +1787,7 @@ static void r8a66597_timer(unsigned long _r8a66597) | |||
| 1769 | 1787 | ||
| 1770 | spin_lock_irqsave(&r8a66597->lock, flags); | 1788 | spin_lock_irqsave(&r8a66597->lock, flags); |
| 1771 | 1789 | ||
| 1772 | for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) | 1790 | for (port = 0; port < r8a66597->max_root_hub; port++) |
| 1773 | r8a66597_root_hub_control(r8a66597, port); | 1791 | r8a66597_root_hub_control(r8a66597, port); |
| 1774 | 1792 | ||
| 1775 | spin_unlock_irqrestore(&r8a66597->lock, flags); | 1793 | spin_unlock_irqrestore(&r8a66597->lock, flags); |
| @@ -1807,7 +1825,7 @@ static void set_address_zero(struct r8a66597 *r8a66597, struct urb *urb) | |||
| 1807 | u16 root_port, hub_port; | 1825 | u16 root_port, hub_port; |
| 1808 | 1826 | ||
| 1809 | if (usb_address == 0) { | 1827 | if (usb_address == 0) { |
| 1810 | get_port_number(urb->dev->devpath, | 1828 | get_port_number(r8a66597, urb->dev->devpath, |
| 1811 | &root_port, &hub_port); | 1829 | &root_port, &hub_port); |
| 1812 | set_devadd_reg(r8a66597, 0, | 1830 | set_devadd_reg(r8a66597, 0, |
| 1813 | get_r8a66597_usb_speed(urb->dev->speed), | 1831 | get_r8a66597_usb_speed(urb->dev->speed), |
| @@ -2082,7 +2100,7 @@ static int r8a66597_hub_status_data(struct usb_hcd *hcd, char *buf) | |||
| 2082 | 2100 | ||
| 2083 | *buf = 0; /* initialize (no change) */ | 2101 | *buf = 0; /* initialize (no change) */ |
| 2084 | 2102 | ||
| 2085 | for (i = 0; i < R8A66597_MAX_ROOT_HUB; i++) { | 2103 | for (i = 0; i < r8a66597->max_root_hub; i++) { |
| 2086 | if (r8a66597->root_hub[i].port & 0xffff0000) | 2104 | if (r8a66597->root_hub[i].port & 0xffff0000) |
| 2087 | *buf |= 1 << (i + 1); | 2105 | *buf |= 1 << (i + 1); |
| 2088 | } | 2106 | } |
| @@ -2097,11 +2115,11 @@ static void r8a66597_hub_descriptor(struct r8a66597 *r8a66597, | |||
| 2097 | { | 2115 | { |
| 2098 | desc->bDescriptorType = 0x29; | 2116 | desc->bDescriptorType = 0x29; |
| 2099 | desc->bHubContrCurrent = 0; | 2117 | desc->bHubContrCurrent = 0; |
| 2100 | desc->bNbrPorts = R8A66597_MAX_ROOT_HUB; | 2118 | desc->bNbrPorts = r8a66597->max_root_hub; |
| 2101 | desc->bDescLength = 9; | 2119 | desc->bDescLength = 9; |
| 2102 | desc->bPwrOn2PwrGood = 0; | 2120 | desc->bPwrOn2PwrGood = 0; |
| 2103 | desc->wHubCharacteristics = cpu_to_le16(0x0011); | 2121 | desc->wHubCharacteristics = cpu_to_le16(0x0011); |
| 2104 | desc->bitmap[0] = ((1 << R8A66597_MAX_ROOT_HUB) - 1) << 1; | 2122 | desc->bitmap[0] = ((1 << r8a66597->max_root_hub) - 1) << 1; |
| 2105 | desc->bitmap[1] = ~0; | 2123 | desc->bitmap[1] = ~0; |
| 2106 | } | 2124 | } |
| 2107 | 2125 | ||
| @@ -2129,7 +2147,7 @@ static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
| 2129 | } | 2147 | } |
| 2130 | break; | 2148 | break; |
| 2131 | case ClearPortFeature: | 2149 | case ClearPortFeature: |
| 2132 | if (wIndex > R8A66597_MAX_ROOT_HUB) | 2150 | if (wIndex > r8a66597->max_root_hub) |
| 2133 | goto error; | 2151 | goto error; |
| 2134 | if (wLength != 0) | 2152 | if (wLength != 0) |
| 2135 | goto error; | 2153 | goto error; |
| @@ -2162,12 +2180,12 @@ static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
| 2162 | *buf = 0x00; | 2180 | *buf = 0x00; |
| 2163 | break; | 2181 | break; |
| 2164 | case GetPortStatus: | 2182 | case GetPortStatus: |
| 2165 | if (wIndex > R8A66597_MAX_ROOT_HUB) | 2183 | if (wIndex > r8a66597->max_root_hub) |
| 2166 | goto error; | 2184 | goto error; |
| 2167 | *(__le32 *)buf = cpu_to_le32(rh->port); | 2185 | *(__le32 *)buf = cpu_to_le32(rh->port); |
| 2168 | break; | 2186 | break; |
| 2169 | case SetPortFeature: | 2187 | case SetPortFeature: |
| 2170 | if (wIndex > R8A66597_MAX_ROOT_HUB) | 2188 | if (wIndex > r8a66597->max_root_hub) |
| 2171 | goto error; | 2189 | goto error; |
| 2172 | if (wLength != 0) | 2190 | if (wLength != 0) |
| 2173 | goto error; | 2191 | goto error; |
| @@ -2216,7 +2234,7 @@ static int r8a66597_bus_suspend(struct usb_hcd *hcd) | |||
| 2216 | 2234 | ||
| 2217 | dbg("%s", __func__); | 2235 | dbg("%s", __func__); |
| 2218 | 2236 | ||
| 2219 | for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { | 2237 | for (port = 0; port < r8a66597->max_root_hub; port++) { |
| 2220 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; | 2238 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; |
| 2221 | unsigned long dvstctr_reg = get_dvstctr_reg(port); | 2239 | unsigned long dvstctr_reg = get_dvstctr_reg(port); |
| 2222 | 2240 | ||
| @@ -2247,7 +2265,7 @@ static int r8a66597_bus_resume(struct usb_hcd *hcd) | |||
| 2247 | 2265 | ||
| 2248 | dbg("%s", __func__); | 2266 | dbg("%s", __func__); |
| 2249 | 2267 | ||
| 2250 | for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { | 2268 | for (port = 0; port < r8a66597->max_root_hub; port++) { |
| 2251 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; | 2269 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; |
| 2252 | unsigned long dvstctr_reg = get_dvstctr_reg(port); | 2270 | unsigned long dvstctr_reg = get_dvstctr_reg(port); |
| 2253 | 2271 | ||
| @@ -2305,16 +2323,16 @@ static struct hc_driver r8a66597_hc_driver = { | |||
| 2305 | }; | 2323 | }; |
| 2306 | 2324 | ||
| 2307 | #if defined(CONFIG_PM) | 2325 | #if defined(CONFIG_PM) |
| 2308 | static int r8a66597_suspend(struct platform_device *pdev, pm_message_t state) | 2326 | static int r8a66597_suspend(struct device *dev) |
| 2309 | { | 2327 | { |
| 2310 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | 2328 | struct r8a66597 *r8a66597 = dev_get_drvdata(dev); |
| 2311 | int port; | 2329 | int port; |
| 2312 | 2330 | ||
| 2313 | dbg("%s", __func__); | 2331 | dbg("%s", __func__); |
| 2314 | 2332 | ||
| 2315 | disable_controller(r8a66597); | 2333 | disable_controller(r8a66597); |
| 2316 | 2334 | ||
| 2317 | for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { | 2335 | for (port = 0; port < r8a66597->max_root_hub; port++) { |
| 2318 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; | 2336 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; |
| 2319 | 2337 | ||
| 2320 | rh->port = 0x00000000; | 2338 | rh->port = 0x00000000; |
| @@ -2323,9 +2341,9 @@ static int r8a66597_suspend(struct platform_device *pdev, pm_message_t state) | |||
| 2323 | return 0; | 2341 | return 0; |
| 2324 | } | 2342 | } |
| 2325 | 2343 | ||
| 2326 | static int r8a66597_resume(struct platform_device *pdev) | 2344 | static int r8a66597_resume(struct device *dev) |
| 2327 | { | 2345 | { |
| 2328 | struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); | 2346 | struct r8a66597 *r8a66597 = dev_get_drvdata(dev); |
| 2329 | struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597); | 2347 | struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597); |
| 2330 | 2348 | ||
| 2331 | dbg("%s", __func__); | 2349 | dbg("%s", __func__); |
| @@ -2335,9 +2353,17 @@ static int r8a66597_resume(struct platform_device *pdev) | |||
| 2335 | 2353 | ||
| 2336 | return 0; | 2354 | return 0; |
| 2337 | } | 2355 | } |
| 2356 | |||
| 2357 | static struct dev_pm_ops r8a66597_dev_pm_ops = { | ||
| 2358 | .suspend = r8a66597_suspend, | ||
| 2359 | .resume = r8a66597_resume, | ||
| 2360 | .poweroff = r8a66597_suspend, | ||
| 2361 | .restore = r8a66597_resume, | ||
| 2362 | }; | ||
| 2363 | |||
| 2364 | #define R8A66597_DEV_PM_OPS (&r8a66597_dev_pm_ops) | ||
| 2338 | #else /* if defined(CONFIG_PM) */ | 2365 | #else /* if defined(CONFIG_PM) */ |
| 2339 | #define r8a66597_suspend NULL | 2366 | #define R8A66597_DEV_PM_OPS NULL |
| 2340 | #define r8a66597_resume NULL | ||
| 2341 | #endif | 2367 | #endif |
| 2342 | 2368 | ||
| 2343 | static int __init_or_module r8a66597_remove(struct platform_device *pdev) | 2369 | static int __init_or_module r8a66597_remove(struct platform_device *pdev) |
| @@ -2348,8 +2374,9 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev) | |||
| 2348 | del_timer_sync(&r8a66597->rh_timer); | 2374 | del_timer_sync(&r8a66597->rh_timer); |
| 2349 | usb_remove_hcd(hcd); | 2375 | usb_remove_hcd(hcd); |
| 2350 | iounmap((void *)r8a66597->reg); | 2376 | iounmap((void *)r8a66597->reg); |
| 2351 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | 2377 | #ifdef CONFIG_HAVE_CLK |
| 2352 | clk_put(r8a66597->clk); | 2378 | if (r8a66597->pdata->on_chip) |
| 2379 | clk_put(r8a66597->clk); | ||
| 2353 | #endif | 2380 | #endif |
| 2354 | usb_put_hcd(hcd); | 2381 | usb_put_hcd(hcd); |
| 2355 | return 0; | 2382 | return 0; |
| @@ -2357,7 +2384,7 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev) | |||
| 2357 | 2384 | ||
| 2358 | static int __devinit r8a66597_probe(struct platform_device *pdev) | 2385 | static int __devinit r8a66597_probe(struct platform_device *pdev) |
| 2359 | { | 2386 | { |
| 2360 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | 2387 | #ifdef CONFIG_HAVE_CLK |
| 2361 | char clk_name[8]; | 2388 | char clk_name[8]; |
| 2362 | #endif | 2389 | #endif |
| 2363 | struct resource *res = NULL, *ires; | 2390 | struct resource *res = NULL, *ires; |
| @@ -2419,15 +2446,20 @@ static int __devinit r8a66597_probe(struct platform_device *pdev) | |||
| 2419 | r8a66597->pdata = pdev->dev.platform_data; | 2446 | r8a66597->pdata = pdev->dev.platform_data; |
| 2420 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; | 2447 | r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; |
| 2421 | 2448 | ||
| 2422 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | 2449 | if (r8a66597->pdata->on_chip) { |
| 2423 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); | 2450 | #ifdef CONFIG_HAVE_CLK |
| 2424 | r8a66597->clk = clk_get(&pdev->dev, clk_name); | 2451 | snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); |
| 2425 | if (IS_ERR(r8a66597->clk)) { | 2452 | r8a66597->clk = clk_get(&pdev->dev, clk_name); |
| 2426 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | 2453 | if (IS_ERR(r8a66597->clk)) { |
| 2427 | ret = PTR_ERR(r8a66597->clk); | 2454 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", |
| 2428 | goto clean_up2; | 2455 | clk_name); |
| 2429 | } | 2456 | ret = PTR_ERR(r8a66597->clk); |
| 2457 | goto clean_up2; | ||
| 2458 | } | ||
| 2430 | #endif | 2459 | #endif |
| 2460 | r8a66597->max_root_hub = 1; | ||
| 2461 | } else | ||
| 2462 | r8a66597->max_root_hub = 2; | ||
| 2431 | 2463 | ||
| 2432 | spin_lock_init(&r8a66597->lock); | 2464 | spin_lock_init(&r8a66597->lock); |
| 2433 | init_timer(&r8a66597->rh_timer); | 2465 | init_timer(&r8a66597->rh_timer); |
| @@ -2457,8 +2489,9 @@ static int __devinit r8a66597_probe(struct platform_device *pdev) | |||
| 2457 | return 0; | 2489 | return 0; |
| 2458 | 2490 | ||
| 2459 | clean_up3: | 2491 | clean_up3: |
| 2460 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | 2492 | #ifdef CONFIG_HAVE_CLK |
| 2461 | clk_put(r8a66597->clk); | 2493 | if (r8a66597->pdata->on_chip) |
| 2494 | clk_put(r8a66597->clk); | ||
| 2462 | clean_up2: | 2495 | clean_up2: |
| 2463 | #endif | 2496 | #endif |
| 2464 | usb_put_hcd(hcd); | 2497 | usb_put_hcd(hcd); |
| @@ -2473,11 +2506,10 @@ clean_up: | |||
| 2473 | static struct platform_driver r8a66597_driver = { | 2506 | static struct platform_driver r8a66597_driver = { |
| 2474 | .probe = r8a66597_probe, | 2507 | .probe = r8a66597_probe, |
| 2475 | .remove = r8a66597_remove, | 2508 | .remove = r8a66597_remove, |
| 2476 | .suspend = r8a66597_suspend, | ||
| 2477 | .resume = r8a66597_resume, | ||
| 2478 | .driver = { | 2509 | .driver = { |
| 2479 | .name = (char *) hcd_name, | 2510 | .name = (char *) hcd_name, |
| 2480 | .owner = THIS_MODULE, | 2511 | .owner = THIS_MODULE, |
| 2512 | .pm = R8A66597_DEV_PM_OPS, | ||
| 2481 | }, | 2513 | }, |
| 2482 | }; | 2514 | }; |
| 2483 | 2515 | ||
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index d72680b433f9..228e3fb23854 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h | |||
| @@ -26,390 +26,16 @@ | |||
| 26 | #ifndef __R8A66597_H__ | 26 | #ifndef __R8A66597_H__ |
| 27 | #define __R8A66597_H__ | 27 | #define __R8A66597_H__ |
| 28 | 28 | ||
| 29 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | 29 | #ifdef CONFIG_HAVE_CLK |
| 30 | #include <linux/clk.h> | 30 | #include <linux/clk.h> |
| 31 | #endif | 31 | #endif |
| 32 | 32 | ||
| 33 | #include <linux/usb/r8a66597.h> | 33 | #include <linux/usb/r8a66597.h> |
| 34 | 34 | ||
| 35 | #define SYSCFG0 0x00 | ||
| 36 | #define SYSCFG1 0x02 | ||
| 37 | #define SYSSTS0 0x04 | ||
| 38 | #define SYSSTS1 0x06 | ||
| 39 | #define DVSTCTR0 0x08 | ||
| 40 | #define DVSTCTR1 0x0A | ||
| 41 | #define TESTMODE 0x0C | ||
| 42 | #define PINCFG 0x0E | ||
| 43 | #define DMA0CFG 0x10 | ||
| 44 | #define DMA1CFG 0x12 | ||
| 45 | #define CFIFO 0x14 | ||
| 46 | #define D0FIFO 0x18 | ||
| 47 | #define D1FIFO 0x1C | ||
| 48 | #define CFIFOSEL 0x20 | ||
| 49 | #define CFIFOCTR 0x22 | ||
| 50 | #define CFIFOSIE 0x24 | ||
| 51 | #define D0FIFOSEL 0x28 | ||
| 52 | #define D0FIFOCTR 0x2A | ||
| 53 | #define D1FIFOSEL 0x2C | ||
| 54 | #define D1FIFOCTR 0x2E | ||
| 55 | #define INTENB0 0x30 | ||
| 56 | #define INTENB1 0x32 | ||
| 57 | #define INTENB2 0x34 | ||
| 58 | #define BRDYENB 0x36 | ||
| 59 | #define NRDYENB 0x38 | ||
| 60 | #define BEMPENB 0x3A | ||
| 61 | #define SOFCFG 0x3C | ||
| 62 | #define INTSTS0 0x40 | ||
| 63 | #define INTSTS1 0x42 | ||
| 64 | #define INTSTS2 0x44 | ||
| 65 | #define BRDYSTS 0x46 | ||
| 66 | #define NRDYSTS 0x48 | ||
| 67 | #define BEMPSTS 0x4A | ||
| 68 | #define FRMNUM 0x4C | ||
| 69 | #define UFRMNUM 0x4E | ||
| 70 | #define USBADDR 0x50 | ||
| 71 | #define USBREQ 0x54 | ||
| 72 | #define USBVAL 0x56 | ||
| 73 | #define USBINDX 0x58 | ||
| 74 | #define USBLENG 0x5A | ||
| 75 | #define DCPCFG 0x5C | ||
| 76 | #define DCPMAXP 0x5E | ||
| 77 | #define DCPCTR 0x60 | ||
| 78 | #define PIPESEL 0x64 | ||
| 79 | #define PIPECFG 0x68 | ||
| 80 | #define PIPEBUF 0x6A | ||
| 81 | #define PIPEMAXP 0x6C | ||
| 82 | #define PIPEPERI 0x6E | ||
| 83 | #define PIPE1CTR 0x70 | ||
| 84 | #define PIPE2CTR 0x72 | ||
| 85 | #define PIPE3CTR 0x74 | ||
| 86 | #define PIPE4CTR 0x76 | ||
| 87 | #define PIPE5CTR 0x78 | ||
| 88 | #define PIPE6CTR 0x7A | ||
| 89 | #define PIPE7CTR 0x7C | ||
| 90 | #define PIPE8CTR 0x7E | ||
| 91 | #define PIPE9CTR 0x80 | ||
| 92 | #define PIPE1TRE 0x90 | ||
| 93 | #define PIPE1TRN 0x92 | ||
| 94 | #define PIPE2TRE 0x94 | ||
| 95 | #define PIPE2TRN 0x96 | ||
| 96 | #define PIPE3TRE 0x98 | ||
| 97 | #define PIPE3TRN 0x9A | ||
| 98 | #define PIPE4TRE 0x9C | ||
| 99 | #define PIPE4TRN 0x9E | ||
| 100 | #define PIPE5TRE 0xA0 | ||
| 101 | #define PIPE5TRN 0xA2 | ||
| 102 | #define DEVADD0 0xD0 | ||
| 103 | #define DEVADD1 0xD2 | ||
| 104 | #define DEVADD2 0xD4 | ||
| 105 | #define DEVADD3 0xD6 | ||
| 106 | #define DEVADD4 0xD8 | ||
| 107 | #define DEVADD5 0xDA | ||
| 108 | #define DEVADD6 0xDC | ||
| 109 | #define DEVADD7 0xDE | ||
| 110 | #define DEVADD8 0xE0 | ||
| 111 | #define DEVADD9 0xE2 | ||
| 112 | #define DEVADDA 0xE4 | ||
| 113 | |||
| 114 | /* System Configuration Control Register */ | ||
| 115 | #define XTAL 0xC000 /* b15-14: Crystal selection */ | ||
| 116 | #define XTAL48 0x8000 /* 48MHz */ | ||
| 117 | #define XTAL24 0x4000 /* 24MHz */ | ||
| 118 | #define XTAL12 0x0000 /* 12MHz */ | ||
| 119 | #define XCKE 0x2000 /* b13: External clock enable */ | ||
| 120 | #define PLLC 0x0800 /* b11: PLL control */ | ||
| 121 | #define SCKE 0x0400 /* b10: USB clock enable */ | ||
| 122 | #define PCSDIS 0x0200 /* b9: not CS wakeup */ | ||
| 123 | #define LPSME 0x0100 /* b8: Low power sleep mode */ | ||
| 124 | #define HSE 0x0080 /* b7: Hi-speed enable */ | ||
| 125 | #define DCFM 0x0040 /* b6: Controller function select */ | ||
| 126 | #define DRPD 0x0020 /* b5: D+/- pull down control */ | ||
| 127 | #define DPRPU 0x0010 /* b4: D+ pull up control */ | ||
| 128 | #define USBE 0x0001 /* b0: USB module operation enable */ | ||
| 129 | |||
| 130 | /* System Configuration Status Register */ | ||
| 131 | #define OVCBIT 0x8000 /* b15-14: Over-current bit */ | ||
| 132 | #define OVCMON 0xC000 /* b15-14: Over-current monitor */ | ||
| 133 | #define SOFEA 0x0020 /* b5: SOF monitor */ | ||
| 134 | #define IDMON 0x0004 /* b3: ID-pin monitor */ | ||
| 135 | #define LNST 0x0003 /* b1-0: D+, D- line status */ | ||
| 136 | #define SE1 0x0003 /* SE1 */ | ||
| 137 | #define FS_KSTS 0x0002 /* Full-Speed K State */ | ||
| 138 | #define FS_JSTS 0x0001 /* Full-Speed J State */ | ||
| 139 | #define LS_JSTS 0x0002 /* Low-Speed J State */ | ||
| 140 | #define LS_KSTS 0x0001 /* Low-Speed K State */ | ||
| 141 | #define SE0 0x0000 /* SE0 */ | ||
| 142 | |||
| 143 | /* Device State Control Register */ | ||
| 144 | #define EXTLP0 0x0400 /* b10: External port */ | ||
| 145 | #define VBOUT 0x0200 /* b9: VBUS output */ | ||
| 146 | #define WKUP 0x0100 /* b8: Remote wakeup */ | ||
| 147 | #define RWUPE 0x0080 /* b7: Remote wakeup sense */ | ||
| 148 | #define USBRST 0x0040 /* b6: USB reset enable */ | ||
| 149 | #define RESUME 0x0020 /* b5: Resume enable */ | ||
| 150 | #define UACT 0x0010 /* b4: USB bus enable */ | ||
| 151 | #define RHST 0x0007 /* b1-0: Reset handshake status */ | ||
| 152 | #define HSPROC 0x0004 /* HS handshake is processing */ | ||
| 153 | #define HSMODE 0x0003 /* Hi-Speed mode */ | ||
| 154 | #define FSMODE 0x0002 /* Full-Speed mode */ | ||
| 155 | #define LSMODE 0x0001 /* Low-Speed mode */ | ||
| 156 | #define UNDECID 0x0000 /* Undecided */ | ||
| 157 | |||
| 158 | /* Test Mode Register */ | ||
| 159 | #define UTST 0x000F /* b3-0: Test select */ | ||
| 160 | #define H_TST_PACKET 0x000C /* HOST TEST Packet */ | ||
| 161 | #define H_TST_SE0_NAK 0x000B /* HOST TEST SE0 NAK */ | ||
| 162 | #define H_TST_K 0x000A /* HOST TEST K */ | ||
| 163 | #define H_TST_J 0x0009 /* HOST TEST J */ | ||
| 164 | #define H_TST_NORMAL 0x0000 /* HOST Normal Mode */ | ||
| 165 | #define P_TST_PACKET 0x0004 /* PERI TEST Packet */ | ||
| 166 | #define P_TST_SE0_NAK 0x0003 /* PERI TEST SE0 NAK */ | ||
| 167 | #define P_TST_K 0x0002 /* PERI TEST K */ | ||
| 168 | #define P_TST_J 0x0001 /* PERI TEST J */ | ||
| 169 | #define P_TST_NORMAL 0x0000 /* PERI Normal Mode */ | ||
| 170 | |||
| 171 | /* Data Pin Configuration Register */ | ||
| 172 | #define LDRV 0x8000 /* b15: Drive Current Adjust */ | ||
| 173 | #define VIF1 0x0000 /* VIF = 1.8V */ | ||
| 174 | #define VIF3 0x8000 /* VIF = 3.3V */ | ||
| 175 | #define INTA 0x0001 /* b1: USB INT-pin active */ | ||
| 176 | |||
| 177 | /* DMAx Pin Configuration Register */ | ||
| 178 | #define DREQA 0x4000 /* b14: Dreq active select */ | ||
| 179 | #define BURST 0x2000 /* b13: Burst mode */ | ||
| 180 | #define DACKA 0x0400 /* b10: Dack active select */ | ||
| 181 | #define DFORM 0x0380 /* b9-7: DMA mode select */ | ||
| 182 | #define CPU_ADR_RD_WR 0x0000 /* Address + RD/WR mode (CPU bus) */ | ||
| 183 | #define CPU_DACK_RD_WR 0x0100 /* DACK + RD/WR mode (CPU bus) */ | ||
| 184 | #define CPU_DACK_ONLY 0x0180 /* DACK only mode (CPU bus) */ | ||
| 185 | #define SPLIT_DACK_ONLY 0x0200 /* DACK only mode (SPLIT bus) */ | ||
| 186 | #define DENDA 0x0040 /* b6: Dend active select */ | ||
| 187 | #define PKTM 0x0020 /* b5: Packet mode */ | ||
| 188 | #define DENDE 0x0010 /* b4: Dend enable */ | ||
| 189 | #define OBUS 0x0004 /* b2: OUTbus mode */ | ||
| 190 | |||
| 191 | /* CFIFO/DxFIFO Port Select Register */ | ||
| 192 | #define RCNT 0x8000 /* b15: Read count mode */ | ||
| 193 | #define REW 0x4000 /* b14: Buffer rewind */ | ||
| 194 | #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ | ||
| 195 | #define DREQE 0x1000 /* b12: DREQ output enable */ | ||
| 196 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
| 197 | #define MBW 0x0800 | ||
| 198 | #else | ||
| 199 | #define MBW 0x0400 /* b10: Maximum bit width for FIFO access */ | ||
| 200 | #endif | ||
| 201 | #define MBW_8 0x0000 /* 8bit */ | ||
| 202 | #define MBW_16 0x0400 /* 16bit */ | ||
| 203 | #define BIGEND 0x0100 /* b8: Big endian mode */ | ||
| 204 | #define BYTE_LITTLE 0x0000 /* little dendian */ | ||
| 205 | #define BYTE_BIG 0x0100 /* big endifan */ | ||
| 206 | #define ISEL 0x0020 /* b5: DCP FIFO port direction select */ | ||
| 207 | #define CURPIPE 0x000F /* b2-0: PIPE select */ | ||
| 208 | |||
| 209 | /* CFIFO/DxFIFO Port Control Register */ | ||
| 210 | #define BVAL 0x8000 /* b15: Buffer valid flag */ | ||
| 211 | #define BCLR 0x4000 /* b14: Buffer clear */ | ||
| 212 | #define FRDY 0x2000 /* b13: FIFO ready */ | ||
| 213 | #define DTLN 0x0FFF /* b11-0: FIFO received data length */ | ||
| 214 | |||
| 215 | /* Interrupt Enable Register 0 */ | ||
| 216 | #define VBSE 0x8000 /* b15: VBUS interrupt */ | ||
| 217 | #define RSME 0x4000 /* b14: Resume interrupt */ | ||
| 218 | #define SOFE 0x2000 /* b13: Frame update interrupt */ | ||
| 219 | #define DVSE 0x1000 /* b12: Device state transition interrupt */ | ||
| 220 | #define CTRE 0x0800 /* b11: Control transfer stage transition interrupt */ | ||
| 221 | #define BEMPE 0x0400 /* b10: Buffer empty interrupt */ | ||
| 222 | #define NRDYE 0x0200 /* b9: Buffer not ready interrupt */ | ||
| 223 | #define BRDYE 0x0100 /* b8: Buffer ready interrupt */ | ||
| 224 | |||
| 225 | /* Interrupt Enable Register 1 */ | ||
| 226 | #define OVRCRE 0x8000 /* b15: Over-current interrupt */ | ||
| 227 | #define BCHGE 0x4000 /* b14: USB us chenge interrupt */ | ||
| 228 | #define DTCHE 0x1000 /* b12: Detach sense interrupt */ | ||
| 229 | #define ATTCHE 0x0800 /* b11: Attach sense interrupt */ | ||
| 230 | #define EOFERRE 0x0040 /* b6: EOF error interrupt */ | ||
| 231 | #define SIGNE 0x0020 /* b5: SETUP IGNORE interrupt */ | ||
| 232 | #define SACKE 0x0010 /* b4: SETUP ACK interrupt */ | ||
| 233 | |||
| 234 | /* BRDY Interrupt Enable/Status Register */ | ||
| 235 | #define BRDY9 0x0200 /* b9: PIPE9 */ | ||
| 236 | #define BRDY8 0x0100 /* b8: PIPE8 */ | ||
| 237 | #define BRDY7 0x0080 /* b7: PIPE7 */ | ||
| 238 | #define BRDY6 0x0040 /* b6: PIPE6 */ | ||
| 239 | #define BRDY5 0x0020 /* b5: PIPE5 */ | ||
| 240 | #define BRDY4 0x0010 /* b4: PIPE4 */ | ||
| 241 | #define BRDY3 0x0008 /* b3: PIPE3 */ | ||
| 242 | #define BRDY2 0x0004 /* b2: PIPE2 */ | ||
| 243 | #define BRDY1 0x0002 /* b1: PIPE1 */ | ||
| 244 | #define BRDY0 0x0001 /* b1: PIPE0 */ | ||
| 245 | |||
| 246 | /* NRDY Interrupt Enable/Status Register */ | ||
| 247 | #define NRDY9 0x0200 /* b9: PIPE9 */ | ||
| 248 | #define NRDY8 0x0100 /* b8: PIPE8 */ | ||
| 249 | #define NRDY7 0x0080 /* b7: PIPE7 */ | ||
| 250 | #define NRDY6 0x0040 /* b6: PIPE6 */ | ||
| 251 | #define NRDY5 0x0020 /* b5: PIPE5 */ | ||
| 252 | #define NRDY4 0x0010 /* b4: PIPE4 */ | ||
| 253 | #define NRDY3 0x0008 /* b3: PIPE3 */ | ||
| 254 | #define NRDY2 0x0004 /* b2: PIPE2 */ | ||
| 255 | #define NRDY1 0x0002 /* b1: PIPE1 */ | ||
| 256 | #define NRDY0 0x0001 /* b1: PIPE0 */ | ||
| 257 | |||
| 258 | /* BEMP Interrupt Enable/Status Register */ | ||
| 259 | #define BEMP9 0x0200 /* b9: PIPE9 */ | ||
| 260 | #define BEMP8 0x0100 /* b8: PIPE8 */ | ||
| 261 | #define BEMP7 0x0080 /* b7: PIPE7 */ | ||
| 262 | #define BEMP6 0x0040 /* b6: PIPE6 */ | ||
| 263 | #define BEMP5 0x0020 /* b5: PIPE5 */ | ||
| 264 | #define BEMP4 0x0010 /* b4: PIPE4 */ | ||
| 265 | #define BEMP3 0x0008 /* b3: PIPE3 */ | ||
| 266 | #define BEMP2 0x0004 /* b2: PIPE2 */ | ||
| 267 | #define BEMP1 0x0002 /* b1: PIPE1 */ | ||
| 268 | #define BEMP0 0x0001 /* b0: PIPE0 */ | ||
| 269 | |||
| 270 | /* SOF Pin Configuration Register */ | ||
| 271 | #define TRNENSEL 0x0100 /* b8: Select transaction enable period */ | ||
| 272 | #define BRDYM 0x0040 /* b6: BRDY clear timing */ | ||
| 273 | #define INTL 0x0020 /* b5: Interrupt sense select */ | ||
| 274 | #define EDGESTS 0x0010 /* b4: */ | ||
| 275 | #define SOFMODE 0x000C /* b3-2: SOF pin select */ | ||
| 276 | #define SOF_125US 0x0008 /* SOF OUT 125us Frame Signal */ | ||
| 277 | #define SOF_1MS 0x0004 /* SOF OUT 1ms Frame Signal */ | ||
| 278 | #define SOF_DISABLE 0x0000 /* SOF OUT Disable */ | ||
| 279 | |||
| 280 | /* Interrupt Status Register 0 */ | ||
| 281 | #define VBINT 0x8000 /* b15: VBUS interrupt */ | ||
| 282 | #define RESM 0x4000 /* b14: Resume interrupt */ | ||
| 283 | #define SOFR 0x2000 /* b13: SOF frame update interrupt */ | ||
| 284 | #define DVST 0x1000 /* b12: Device state transition interrupt */ | ||
| 285 | #define CTRT 0x0800 /* b11: Control transfer stage transition interrupt */ | ||
| 286 | #define BEMP 0x0400 /* b10: Buffer empty interrupt */ | ||
| 287 | #define NRDY 0x0200 /* b9: Buffer not ready interrupt */ | ||
| 288 | #define BRDY 0x0100 /* b8: Buffer ready interrupt */ | ||
| 289 | #define VBSTS 0x0080 /* b7: VBUS input port */ | ||
| 290 | #define DVSQ 0x0070 /* b6-4: Device state */ | ||
| 291 | #define DS_SPD_CNFG 0x0070 /* Suspend Configured */ | ||
| 292 | #define DS_SPD_ADDR 0x0060 /* Suspend Address */ | ||
| 293 | #define DS_SPD_DFLT 0x0050 /* Suspend Default */ | ||
| 294 | #define DS_SPD_POWR 0x0040 /* Suspend Powered */ | ||
| 295 | #define DS_SUSP 0x0040 /* Suspend */ | ||
| 296 | #define DS_CNFG 0x0030 /* Configured */ | ||
| 297 | #define DS_ADDS 0x0020 /* Address */ | ||
| 298 | #define DS_DFLT 0x0010 /* Default */ | ||
| 299 | #define DS_POWR 0x0000 /* Powered */ | ||
| 300 | #define DVSQS 0x0030 /* b5-4: Device state */ | ||
| 301 | #define VALID 0x0008 /* b3: Setup packet detected flag */ | ||
| 302 | #define CTSQ 0x0007 /* b2-0: Control transfer stage */ | ||
| 303 | #define CS_SQER 0x0006 /* Sequence error */ | ||
| 304 | #define CS_WRND 0x0005 /* Control write nodata status stage */ | ||
| 305 | #define CS_WRSS 0x0004 /* Control write status stage */ | ||
| 306 | #define CS_WRDS 0x0003 /* Control write data stage */ | ||
| 307 | #define CS_RDSS 0x0002 /* Control read status stage */ | ||
| 308 | #define CS_RDDS 0x0001 /* Control read data stage */ | ||
| 309 | #define CS_IDST 0x0000 /* Idle or setup stage */ | ||
| 310 | |||
| 311 | /* Interrupt Status Register 1 */ | ||
| 312 | #define OVRCR 0x8000 /* b15: Over-current interrupt */ | ||
| 313 | #define BCHG 0x4000 /* b14: USB bus chenge interrupt */ | ||
| 314 | #define DTCH 0x1000 /* b12: Detach sense interrupt */ | ||
| 315 | #define ATTCH 0x0800 /* b11: Attach sense interrupt */ | ||
| 316 | #define EOFERR 0x0040 /* b6: EOF-error interrupt */ | ||
| 317 | #define SIGN 0x0020 /* b5: Setup ignore interrupt */ | ||
| 318 | #define SACK 0x0010 /* b4: Setup acknowledge interrupt */ | ||
| 319 | |||
| 320 | /* Frame Number Register */ | ||
| 321 | #define OVRN 0x8000 /* b15: Overrun error */ | ||
| 322 | #define CRCE 0x4000 /* b14: Received data error */ | ||
| 323 | #define FRNM 0x07FF /* b10-0: Frame number */ | ||
| 324 | |||
| 325 | /* Micro Frame Number Register */ | ||
| 326 | #define UFRNM 0x0007 /* b2-0: Micro frame number */ | ||
| 327 | |||
| 328 | /* Default Control Pipe Maxpacket Size Register */ | ||
| 329 | /* Pipe Maxpacket Size Register */ | ||
| 330 | #define DEVSEL 0xF000 /* b15-14: Device address select */ | ||
| 331 | #define MAXP 0x007F /* b6-0: Maxpacket size of default control pipe */ | ||
| 332 | |||
| 333 | /* Default Control Pipe Control Register */ | ||
| 334 | #define BSTS 0x8000 /* b15: Buffer status */ | ||
| 335 | #define SUREQ 0x4000 /* b14: Send USB request */ | ||
| 336 | #define CSCLR 0x2000 /* b13: complete-split status clear */ | ||
| 337 | #define CSSTS 0x1000 /* b12: complete-split status */ | ||
| 338 | #define SUREQCLR 0x0800 /* b11: stop setup request */ | ||
| 339 | #define SQCLR 0x0100 /* b8: Sequence toggle bit clear */ | ||
| 340 | #define SQSET 0x0080 /* b7: Sequence toggle bit set */ | ||
| 341 | #define SQMON 0x0040 /* b6: Sequence toggle bit monitor */ | ||
| 342 | #define PBUSY 0x0020 /* b5: pipe busy */ | ||
| 343 | #define PINGE 0x0010 /* b4: ping enable */ | ||
| 344 | #define CCPL 0x0004 /* b2: Enable control transfer complete */ | ||
| 345 | #define PID 0x0003 /* b1-0: Response PID */ | ||
| 346 | #define PID_STALL11 0x0003 /* STALL */ | ||
| 347 | #define PID_STALL 0x0002 /* STALL */ | ||
| 348 | #define PID_BUF 0x0001 /* BUF */ | ||
| 349 | #define PID_NAK 0x0000 /* NAK */ | ||
| 350 | |||
| 351 | /* Pipe Window Select Register */ | ||
| 352 | #define PIPENM 0x0007 /* b2-0: Pipe select */ | ||
| 353 | |||
| 354 | /* Pipe Configuration Register */ | ||
| 355 | #define R8A66597_TYP 0xC000 /* b15-14: Transfer type */ | ||
| 356 | #define R8A66597_ISO 0xC000 /* Isochronous */ | ||
| 357 | #define R8A66597_INT 0x8000 /* Interrupt */ | ||
| 358 | #define R8A66597_BULK 0x4000 /* Bulk */ | ||
| 359 | #define R8A66597_BFRE 0x0400 /* b10: Buffer ready interrupt mode select */ | ||
| 360 | #define R8A66597_DBLB 0x0200 /* b9: Double buffer mode select */ | ||
| 361 | #define R8A66597_CNTMD 0x0100 /* b8: Continuous transfer mode select */ | ||
| 362 | #define R8A66597_SHTNAK 0x0080 /* b7: Transfer end NAK */ | ||
| 363 | #define R8A66597_DIR 0x0010 /* b4: Transfer direction select */ | ||
| 364 | #define R8A66597_EPNUM 0x000F /* b3-0: Eendpoint number select */ | ||
| 365 | |||
| 366 | /* Pipe Buffer Configuration Register */ | ||
| 367 | #define BUFSIZE 0x7C00 /* b14-10: Pipe buffer size */ | ||
| 368 | #define BUFNMB 0x007F /* b6-0: Pipe buffer number */ | ||
| 369 | #define PIPE0BUF 256 | ||
| 370 | #define PIPExBUF 64 | ||
| 371 | |||
| 372 | /* Pipe Maxpacket Size Register */ | ||
| 373 | #define MXPS 0x07FF /* b10-0: Maxpacket size */ | ||
| 374 | |||
| 375 | /* Pipe Cycle Configuration Register */ | ||
| 376 | #define IFIS 0x1000 /* b12: Isochronous in-buffer flush mode select */ | ||
| 377 | #define IITV 0x0007 /* b2-0: Isochronous interval */ | ||
| 378 | |||
| 379 | /* Pipex Control Register */ | ||
| 380 | #define BSTS 0x8000 /* b15: Buffer status */ | ||
| 381 | #define INBUFM 0x4000 /* b14: IN buffer monitor (Only for PIPE1 to 5) */ | ||
| 382 | #define CSCLR 0x2000 /* b13: complete-split status clear */ | ||
| 383 | #define CSSTS 0x1000 /* b12: complete-split status */ | ||
| 384 | #define ATREPM 0x0400 /* b10: Auto repeat mode */ | ||
| 385 | #define ACLRM 0x0200 /* b9: Out buffer auto clear mode */ | ||
| 386 | #define SQCLR 0x0100 /* b8: Sequence toggle bit clear */ | ||
| 387 | #define SQSET 0x0080 /* b7: Sequence toggle bit set */ | ||
| 388 | #define SQMON 0x0040 /* b6: Sequence toggle bit monitor */ | ||
| 389 | #define PBUSY 0x0020 /* b5: pipe busy */ | ||
| 390 | #define PID 0x0003 /* b1-0: Response PID */ | ||
| 391 | |||
| 392 | /* PIPExTRE */ | ||
| 393 | #define TRENB 0x0200 /* b9: Transaction counter enable */ | ||
| 394 | #define TRCLR 0x0100 /* b8: Transaction counter clear */ | ||
| 395 | |||
| 396 | /* PIPExTRN */ | ||
| 397 | #define TRNCNT 0xFFFF /* b15-0: Transaction counter */ | ||
| 398 | |||
| 399 | /* DEVADDx */ | ||
| 400 | #define UPPHUB 0x7800 | ||
| 401 | #define HUBPORT 0x0700 | ||
| 402 | #define USBSPD 0x00C0 | ||
| 403 | #define RTPORT 0x0001 | ||
| 404 | |||
| 405 | #define R8A66597_MAX_NUM_PIPE 10 | 35 | #define R8A66597_MAX_NUM_PIPE 10 |
| 406 | #define R8A66597_BUF_BSIZE 8 | 36 | #define R8A66597_BUF_BSIZE 8 |
| 407 | #define R8A66597_MAX_DEVICE 10 | 37 | #define R8A66597_MAX_DEVICE 10 |
| 408 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
| 409 | #define R8A66597_MAX_ROOT_HUB 1 | ||
| 410 | #else | ||
| 411 | #define R8A66597_MAX_ROOT_HUB 2 | 38 | #define R8A66597_MAX_ROOT_HUB 2 |
| 412 | #endif | ||
| 413 | #define R8A66597_MAX_SAMPLING 5 | 39 | #define R8A66597_MAX_SAMPLING 5 |
| 414 | #define R8A66597_RH_POLL_TIME 10 | 40 | #define R8A66597_RH_POLL_TIME 10 |
| 415 | #define R8A66597_MAX_DMA_CHANNEL 2 | 41 | #define R8A66597_MAX_DMA_CHANNEL 2 |
| @@ -487,7 +113,7 @@ struct r8a66597_root_hub { | |||
| 487 | struct r8a66597 { | 113 | struct r8a66597 { |
| 488 | spinlock_t lock; | 114 | spinlock_t lock; |
| 489 | unsigned long reg; | 115 | unsigned long reg; |
| 490 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) | 116 | #ifdef CONFIG_HAVE_CLK |
| 491 | struct clk *clk; | 117 | struct clk *clk; |
| 492 | #endif | 118 | #endif |
| 493 | struct r8a66597_platdata *pdata; | 119 | struct r8a66597_platdata *pdata; |
| @@ -504,6 +130,7 @@ struct r8a66597 { | |||
| 504 | unsigned short interval_map; | 130 | unsigned short interval_map; |
| 505 | unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; | 131 | unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; |
| 506 | unsigned char dma_map; | 132 | unsigned char dma_map; |
| 133 | unsigned int max_root_hub; | ||
| 507 | 134 | ||
| 508 | struct list_head child_device; | 135 | struct list_head child_device; |
| 509 | unsigned long child_connect_map[4]; | 136 | unsigned long child_connect_map[4]; |
| @@ -550,21 +177,22 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, | |||
| 550 | unsigned long offset, u16 *buf, | 177 | unsigned long offset, u16 *buf, |
| 551 | int len) | 178 | int len) |
| 552 | { | 179 | { |
| 553 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
| 554 | unsigned long fifoaddr = r8a66597->reg + offset; | 180 | unsigned long fifoaddr = r8a66597->reg + offset; |
| 555 | unsigned long count; | 181 | unsigned long count; |
| 556 | 182 | ||
| 557 | count = len / 4; | 183 | if (r8a66597->pdata->on_chip) { |
| 558 | insl(fifoaddr, buf, count); | 184 | count = len / 4; |
| 185 | insl(fifoaddr, buf, count); | ||
| 559 | 186 | ||
| 560 | if (len & 0x00000003) { | 187 | if (len & 0x00000003) { |
| 561 | unsigned long tmp = inl(fifoaddr); | 188 | unsigned long tmp = inl(fifoaddr); |
| 562 | memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03); | 189 | memcpy((unsigned char *)buf + count * 4, &tmp, |
| 190 | len & 0x03); | ||
| 191 | } | ||
| 192 | } else { | ||
| 193 | len = (len + 1) / 2; | ||
| 194 | insw(fifoaddr, buf, len); | ||
| 563 | } | 195 | } |
| 564 | #else | ||
| 565 | len = (len + 1) / 2; | ||
| 566 | insw(r8a66597->reg + offset, buf, len); | ||
| 567 | #endif | ||
| 568 | } | 196 | } |
| 569 | 197 | ||
| 570 | static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, | 198 | static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, |
| @@ -578,33 +206,33 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, | |||
| 578 | int len) | 206 | int len) |
| 579 | { | 207 | { |
| 580 | unsigned long fifoaddr = r8a66597->reg + offset; | 208 | unsigned long fifoaddr = r8a66597->reg + offset; |
| 581 | #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) | ||
| 582 | unsigned long count; | 209 | unsigned long count; |
| 583 | unsigned char *pb; | 210 | unsigned char *pb; |
| 584 | int i; | 211 | int i; |
| 585 | 212 | ||
| 586 | count = len / 4; | 213 | if (r8a66597->pdata->on_chip) { |
| 587 | outsl(fifoaddr, buf, count); | 214 | count = len / 4; |
| 215 | outsl(fifoaddr, buf, count); | ||
| 216 | |||
| 217 | if (len & 0x00000003) { | ||
| 218 | pb = (unsigned char *)buf + count * 4; | ||
| 219 | for (i = 0; i < (len & 0x00000003); i++) { | ||
| 220 | if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) | ||
| 221 | outb(pb[i], fifoaddr + i); | ||
| 222 | else | ||
| 223 | outb(pb[i], fifoaddr + 3 - i); | ||
| 224 | } | ||
| 225 | } | ||
| 226 | } else { | ||
| 227 | int odd = len & 0x0001; | ||
| 588 | 228 | ||
| 589 | if (len & 0x00000003) { | 229 | len = len / 2; |
| 590 | pb = (unsigned char *)buf + count * 4; | 230 | outsw(fifoaddr, buf, len); |
| 591 | for (i = 0; i < (len & 0x00000003); i++) { | 231 | if (unlikely(odd)) { |
| 592 | if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) | 232 | buf = &buf[len]; |
| 593 | outb(pb[i], fifoaddr + i); | 233 | outb((unsigned char)*buf, fifoaddr); |
| 594 | else | ||
| 595 | outb(pb[i], fifoaddr + 3 - i); | ||
| 596 | } | 234 | } |
| 597 | } | 235 | } |
| 598 | #else | ||
| 599 | int odd = len & 0x0001; | ||
| 600 | |||
| 601 | len = len / 2; | ||
| 602 | outsw(fifoaddr, buf, len); | ||
| 603 | if (unlikely(odd)) { | ||
| 604 | buf = &buf[len]; | ||
| 605 | outb((unsigned char)*buf, fifoaddr); | ||
| 606 | } | ||
| 607 | #endif | ||
| 608 | } | 236 | } |
| 609 | 237 | ||
| 610 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, | 238 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, |
diff --git a/drivers/usb/misc/iowarrior.c b/drivers/usb/misc/iowarrior.c index 90e1a8dedfa9..e75bb87ee92b 100644 --- a/drivers/usb/misc/iowarrior.c +++ b/drivers/usb/misc/iowarrior.c | |||
| @@ -727,7 +727,7 @@ static const struct file_operations iowarrior_fops = { | |||
| 727 | .poll = iowarrior_poll, | 727 | .poll = iowarrior_poll, |
| 728 | }; | 728 | }; |
| 729 | 729 | ||
| 730 | static char *iowarrior_nodename(struct device *dev) | 730 | static char *iowarrior_devnode(struct device *dev, mode_t *mode) |
| 731 | { | 731 | { |
| 732 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); | 732 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); |
| 733 | } | 733 | } |
| @@ -738,7 +738,7 @@ static char *iowarrior_nodename(struct device *dev) | |||
| 738 | */ | 738 | */ |
| 739 | static struct usb_class_driver iowarrior_class = { | 739 | static struct usb_class_driver iowarrior_class = { |
| 740 | .name = "iowarrior%d", | 740 | .name = "iowarrior%d", |
| 741 | .nodename = iowarrior_nodename, | 741 | .devnode = iowarrior_devnode, |
| 742 | .fops = &iowarrior_fops, | 742 | .fops = &iowarrior_fops, |
| 743 | .minor_base = IOWARRIOR_MINOR_BASE, | 743 | .minor_base = IOWARRIOR_MINOR_BASE, |
| 744 | }; | 744 | }; |
diff --git a/drivers/usb/misc/legousbtower.c b/drivers/usb/misc/legousbtower.c index c1e2433f640d..97efeaec4d52 100644 --- a/drivers/usb/misc/legousbtower.c +++ b/drivers/usb/misc/legousbtower.c | |||
| @@ -266,7 +266,7 @@ static const struct file_operations tower_fops = { | |||
| 266 | .llseek = tower_llseek, | 266 | .llseek = tower_llseek, |
| 267 | }; | 267 | }; |
| 268 | 268 | ||
| 269 | static char *legousbtower_nodename(struct device *dev) | 269 | static char *legousbtower_devnode(struct device *dev, mode_t *mode) |
| 270 | { | 270 | { |
| 271 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); | 271 | return kasprintf(GFP_KERNEL, "usb/%s", dev_name(dev)); |
| 272 | } | 272 | } |
| @@ -277,7 +277,7 @@ static char *legousbtower_nodename(struct device *dev) | |||
| 277 | */ | 277 | */ |
| 278 | static struct usb_class_driver tower_class = { | 278 | static struct usb_class_driver tower_class = { |
| 279 | .name = "legousbtower%d", | 279 | .name = "legousbtower%d", |
| 280 | .nodename = legousbtower_nodename, | 280 | .devnode = legousbtower_devnode, |
| 281 | .fops = &tower_fops, | 281 | .fops = &tower_fops, |
| 282 | .minor_base = LEGO_USB_TOWER_MINOR_BASE, | 282 | .minor_base = LEGO_USB_TOWER_MINOR_BASE, |
| 283 | }; | 283 | }; |
diff --git a/drivers/usb/serial/ark3116.c b/drivers/usb/serial/ark3116.c index aec61880f36c..5d25d3e52bf6 100644 --- a/drivers/usb/serial/ark3116.c +++ b/drivers/usb/serial/ark3116.c | |||
| @@ -35,11 +35,6 @@ static struct usb_device_id id_table [] = { | |||
| 35 | }; | 35 | }; |
| 36 | MODULE_DEVICE_TABLE(usb, id_table); | 36 | MODULE_DEVICE_TABLE(usb, id_table); |
| 37 | 37 | ||
| 38 | struct ark3116_private { | ||
| 39 | spinlock_t lock; | ||
| 40 | u8 termios_initialized; | ||
| 41 | }; | ||
| 42 | |||
| 43 | static inline void ARK3116_SND(struct usb_serial *serial, int seq, | 38 | static inline void ARK3116_SND(struct usb_serial *serial, int seq, |
| 44 | __u8 request, __u8 requesttype, | 39 | __u8 request, __u8 requesttype, |
| 45 | __u16 value, __u16 index) | 40 | __u16 value, __u16 index) |
| @@ -82,22 +77,11 @@ static inline void ARK3116_RCV_QUIET(struct usb_serial *serial, | |||
| 82 | static int ark3116_attach(struct usb_serial *serial) | 77 | static int ark3116_attach(struct usb_serial *serial) |
| 83 | { | 78 | { |
| 84 | char *buf; | 79 | char *buf; |
| 85 | struct ark3116_private *priv; | ||
| 86 | int i; | ||
| 87 | |||
| 88 | for (i = 0; i < serial->num_ports; ++i) { | ||
| 89 | priv = kzalloc(sizeof(struct ark3116_private), GFP_KERNEL); | ||
| 90 | if (!priv) | ||
| 91 | goto cleanup; | ||
| 92 | spin_lock_init(&priv->lock); | ||
| 93 | |||
| 94 | usb_set_serial_port_data(serial->port[i], priv); | ||
| 95 | } | ||
| 96 | 80 | ||
| 97 | buf = kmalloc(1, GFP_KERNEL); | 81 | buf = kmalloc(1, GFP_KERNEL); |
| 98 | if (!buf) { | 82 | if (!buf) { |
| 99 | dbg("error kmalloc -> out of mem?"); | 83 | dbg("error kmalloc -> out of mem?"); |
| 100 | goto cleanup; | 84 | return -ENOMEM; |
| 101 | } | 85 | } |
| 102 | 86 | ||
| 103 | /* 3 */ | 87 | /* 3 */ |
| @@ -149,13 +133,16 @@ static int ark3116_attach(struct usb_serial *serial) | |||
| 149 | 133 | ||
| 150 | kfree(buf); | 134 | kfree(buf); |
| 151 | return 0; | 135 | return 0; |
| 136 | } | ||
| 152 | 137 | ||
| 153 | cleanup: | 138 | static void ark3116_init_termios(struct tty_struct *tty) |
| 154 | for (--i; i >= 0; --i) { | 139 | { |
| 155 | kfree(usb_get_serial_port_data(serial->port[i])); | 140 | struct ktermios *termios = tty->termios; |
| 156 | usb_set_serial_port_data(serial->port[i], NULL); | 141 | *termios = tty_std_termios; |
| 157 | } | 142 | termios->c_cflag = B9600 | CS8 |
| 158 | return -ENOMEM; | 143 | | CREAD | HUPCL | CLOCAL; |
| 144 | termios->c_ispeed = 9600; | ||
| 145 | termios->c_ospeed = 9600; | ||
| 159 | } | 146 | } |
| 160 | 147 | ||
| 161 | static void ark3116_set_termios(struct tty_struct *tty, | 148 | static void ark3116_set_termios(struct tty_struct *tty, |
| @@ -163,10 +150,8 @@ static void ark3116_set_termios(struct tty_struct *tty, | |||
| 163 | struct ktermios *old_termios) | 150 | struct ktermios *old_termios) |
| 164 | { | 151 | { |
| 165 | struct usb_serial *serial = port->serial; | 152 | struct usb_serial *serial = port->serial; |
| 166 | struct ark3116_private *priv = usb_get_serial_port_data(port); | ||
| 167 | struct ktermios *termios = tty->termios; | 153 | struct ktermios *termios = tty->termios; |
| 168 | unsigned int cflag = termios->c_cflag; | 154 | unsigned int cflag = termios->c_cflag; |
| 169 | unsigned long flags; | ||
| 170 | int baud; | 155 | int baud; |
| 171 | int ark3116_baud; | 156 | int ark3116_baud; |
| 172 | char *buf; | 157 | char *buf; |
| @@ -176,16 +161,6 @@ static void ark3116_set_termios(struct tty_struct *tty, | |||
| 176 | 161 | ||
| 177 | dbg("%s - port %d", __func__, port->number); | 162 | dbg("%s - port %d", __func__, port->number); |
| 178 | 163 | ||
| 179 | spin_lock_irqsave(&priv->lock, flags); | ||
| 180 | if (!priv->termios_initialized) { | ||
| 181 | *termios = tty_std_termios; | ||
| 182 | termios->c_cflag = B9600 | CS8 | ||
| 183 | | CREAD | HUPCL | CLOCAL; | ||
| 184 | termios->c_ispeed = 9600; | ||
| 185 | termios->c_ospeed = 9600; | ||
| 186 | priv->termios_initialized = 1; | ||
| 187 | } | ||
| 188 | spin_unlock_irqrestore(&priv->lock, flags); | ||
| 189 | 164 | ||
| 190 | cflag = termios->c_cflag; | 165 | cflag = termios->c_cflag; |
| 191 | termios->c_cflag &= ~(CMSPAR|CRTSCTS); | 166 | termios->c_cflag &= ~(CMSPAR|CRTSCTS); |
| @@ -318,8 +293,7 @@ static void ark3116_set_termios(struct tty_struct *tty, | |||
| 318 | return; | 293 | return; |
| 319 | } | 294 | } |
| 320 | 295 | ||
| 321 | static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port, | 296 | static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 322 | struct file *filp) | ||
| 323 | { | 297 | { |
| 324 | struct ktermios tmp_termios; | 298 | struct ktermios tmp_termios; |
| 325 | struct usb_serial *serial = port->serial; | 299 | struct usb_serial *serial = port->serial; |
| @@ -334,7 +308,7 @@ static int ark3116_open(struct tty_struct *tty, struct usb_serial_port *port, | |||
| 334 | return -ENOMEM; | 308 | return -ENOMEM; |
| 335 | } | 309 | } |
| 336 | 310 | ||
| 337 | result = usb_serial_generic_open(tty, port, filp); | 311 | result = usb_serial_generic_open(tty, port); |
| 338 | if (result) | 312 | if (result) |
| 339 | goto err_out; | 313 | goto err_out; |
| 340 | 314 | ||
| @@ -455,6 +429,7 @@ static struct usb_serial_driver ark3116_device = { | |||
| 455 | .num_ports = 1, | 429 | .num_ports = 1, |
| 456 | .attach = ark3116_attach, | 430 | .attach = ark3116_attach, |
| 457 | .set_termios = ark3116_set_termios, | 431 | .set_termios = ark3116_set_termios, |
| 432 | .init_termios = ark3116_init_termios, | ||
| 458 | .ioctl = ark3116_ioctl, | 433 | .ioctl = ark3116_ioctl, |
| 459 | .tiocmget = ark3116_tiocmget, | 434 | .tiocmget = ark3116_tiocmget, |
| 460 | .open = ark3116_open, | 435 | .open = ark3116_open, |
diff --git a/drivers/usb/serial/belkin_sa.c b/drivers/usb/serial/belkin_sa.c index 7033b031b443..a0467bc61627 100644 --- a/drivers/usb/serial/belkin_sa.c +++ b/drivers/usb/serial/belkin_sa.c | |||
| @@ -92,7 +92,7 @@ static int debug; | |||
| 92 | static int belkin_sa_startup(struct usb_serial *serial); | 92 | static int belkin_sa_startup(struct usb_serial *serial); |
| 93 | static void belkin_sa_release(struct usb_serial *serial); | 93 | static void belkin_sa_release(struct usb_serial *serial); |
| 94 | static int belkin_sa_open(struct tty_struct *tty, | 94 | static int belkin_sa_open(struct tty_struct *tty, |
| 95 | struct usb_serial_port *port, struct file *filp); | 95 | struct usb_serial_port *port); |
| 96 | static void belkin_sa_close(struct usb_serial_port *port); | 96 | static void belkin_sa_close(struct usb_serial_port *port); |
| 97 | static void belkin_sa_read_int_callback(struct urb *urb); | 97 | static void belkin_sa_read_int_callback(struct urb *urb); |
| 98 | static void belkin_sa_set_termios(struct tty_struct *tty, | 98 | static void belkin_sa_set_termios(struct tty_struct *tty, |
| @@ -213,7 +213,7 @@ static void belkin_sa_release(struct usb_serial *serial) | |||
| 213 | 213 | ||
| 214 | 214 | ||
| 215 | static int belkin_sa_open(struct tty_struct *tty, | 215 | static int belkin_sa_open(struct tty_struct *tty, |
| 216 | struct usb_serial_port *port, struct file *filp) | 216 | struct usb_serial_port *port) |
| 217 | { | 217 | { |
| 218 | int retval = 0; | 218 | int retval = 0; |
| 219 | 219 | ||
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c index 2830766f5b39..8c894a7d5dcf 100644 --- a/drivers/usb/serial/ch341.c +++ b/drivers/usb/serial/ch341.c | |||
| @@ -300,8 +300,7 @@ static void ch341_close(struct usb_serial_port *port) | |||
| 300 | 300 | ||
| 301 | 301 | ||
| 302 | /* open this device, set default parameters */ | 302 | /* open this device, set default parameters */ |
| 303 | static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port, | 303 | static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 304 | struct file *filp) | ||
| 305 | { | 304 | { |
| 306 | struct usb_serial *serial = port->serial; | 305 | struct usb_serial *serial = port->serial; |
| 307 | struct ch341_private *priv = usb_get_serial_port_data(serial->port[0]); | 306 | struct ch341_private *priv = usb_get_serial_port_data(serial->port[0]); |
| @@ -333,7 +332,7 @@ static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port, | |||
| 333 | return -EPROTO; | 332 | return -EPROTO; |
| 334 | } | 333 | } |
| 335 | 334 | ||
| 336 | r = usb_serial_generic_open(tty, port, filp); | 335 | r = usb_serial_generic_open(tty, port); |
| 337 | 336 | ||
| 338 | out: return r; | 337 | out: return r; |
| 339 | } | 338 | } |
diff --git a/drivers/usb/serial/console.c b/drivers/usb/serial/console.c index 0e4f2e41ace5..b22ac3258523 100644 --- a/drivers/usb/serial/console.c +++ b/drivers/usb/serial/console.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | #include <linux/slab.h> | 16 | #include <linux/slab.h> |
| 17 | #include <linux/tty.h> | 17 | #include <linux/tty.h> |
| 18 | #include <linux/console.h> | 18 | #include <linux/console.h> |
| 19 | #include <linux/serial.h> | ||
| 19 | #include <linux/usb.h> | 20 | #include <linux/usb.h> |
| 20 | #include <linux/usb/serial.h> | 21 | #include <linux/usb/serial.h> |
| 21 | 22 | ||
| @@ -63,7 +64,7 @@ static int usb_console_setup(struct console *co, char *options) | |||
| 63 | char *s; | 64 | char *s; |
| 64 | struct usb_serial *serial; | 65 | struct usb_serial *serial; |
| 65 | struct usb_serial_port *port; | 66 | struct usb_serial_port *port; |
| 66 | int retval = 0; | 67 | int retval; |
| 67 | struct tty_struct *tty = NULL; | 68 | struct tty_struct *tty = NULL; |
| 68 | struct ktermios *termios = NULL, dummy; | 69 | struct ktermios *termios = NULL, dummy; |
| 69 | 70 | ||
| @@ -116,13 +117,17 @@ static int usb_console_setup(struct console *co, char *options) | |||
| 116 | return -ENODEV; | 117 | return -ENODEV; |
| 117 | } | 118 | } |
| 118 | 119 | ||
| 119 | port = serial->port[0]; | 120 | retval = usb_autopm_get_interface(serial->interface); |
| 121 | if (retval) | ||
| 122 | goto error_get_interface; | ||
| 123 | |||
| 124 | port = serial->port[co->index - serial->minor]; | ||
| 120 | tty_port_tty_set(&port->port, NULL); | 125 | tty_port_tty_set(&port->port, NULL); |
| 121 | 126 | ||
| 122 | info->port = port; | 127 | info->port = port; |
| 123 | 128 | ||
| 124 | ++port->port.count; | 129 | ++port->port.count; |
| 125 | if (port->port.count == 1) { | 130 | if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags)) { |
| 126 | if (serial->type->set_termios) { | 131 | if (serial->type->set_termios) { |
| 127 | /* | 132 | /* |
| 128 | * allocate a fake tty so the driver can initialize | 133 | * allocate a fake tty so the driver can initialize |
| @@ -150,9 +155,9 @@ static int usb_console_setup(struct console *co, char *options) | |||
| 150 | /* only call the device specific open if this | 155 | /* only call the device specific open if this |
| 151 | * is the first time the port is opened */ | 156 | * is the first time the port is opened */ |
| 152 | if (serial->type->open) | 157 | if (serial->type->open) |
| 153 | retval = serial->type->open(NULL, port, NULL); | 158 | retval = serial->type->open(NULL, port); |
| 154 | else | 159 | else |
| 155 | retval = usb_serial_generic_open(NULL, port, NULL); | 160 | retval = usb_serial_generic_open(NULL, port); |
| 156 | 161 | ||
| 157 | if (retval) { | 162 | if (retval) { |
| 158 | err("could not open USB console port"); | 163 | err("could not open USB console port"); |
| @@ -168,6 +173,7 @@ static int usb_console_setup(struct console *co, char *options) | |||
| 168 | kfree(termios); | 173 | kfree(termios); |
| 169 | kfree(tty); | 174 | kfree(tty); |
| 170 | } | 175 | } |
| 176 | set_bit(ASYNCB_INITIALIZED, &port->port.flags); | ||
| 171 | } | 177 | } |
| 172 | /* Now that any required fake tty operations are completed restore | 178 | /* Now that any required fake tty operations are completed restore |
| 173 | * the tty port count */ | 179 | * the tty port count */ |
| @@ -175,18 +181,22 @@ static int usb_console_setup(struct console *co, char *options) | |||
| 175 | /* The console is special in terms of closing the device so | 181 | /* The console is special in terms of closing the device so |
| 176 | * indicate this port is now acting as a system console. */ | 182 | * indicate this port is now acting as a system console. */ |
| 177 | port->console = 1; | 183 | port->console = 1; |
| 178 | retval = 0; | ||
| 179 | 184 | ||
| 180 | out: | 185 | mutex_unlock(&serial->disc_mutex); |
| 181 | return retval; | 186 | return retval; |
| 182 | free_termios: | 187 | |
| 188 | free_termios: | ||
| 183 | kfree(termios); | 189 | kfree(termios); |
| 184 | tty_port_tty_set(&port->port, NULL); | 190 | tty_port_tty_set(&port->port, NULL); |
| 185 | free_tty: | 191 | free_tty: |
| 186 | kfree(tty); | 192 | kfree(tty); |
| 187 | reset_open_count: | 193 | reset_open_count: |
| 188 | port->port.count = 0; | 194 | port->port.count = 0; |
| 189 | goto out; | 195 | usb_autopm_put_interface(serial->interface); |
| 196 | error_get_interface: | ||
| 197 | usb_serial_put(serial); | ||
| 198 | mutex_unlock(&serial->disc_mutex); | ||
| 199 | return retval; | ||
| 190 | } | 200 | } |
| 191 | 201 | ||
| 192 | static void usb_console_write(struct console *co, | 202 | static void usb_console_write(struct console *co, |
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c index 985cbcf48bda..4a208fe85bc9 100644 --- a/drivers/usb/serial/cp210x.c +++ b/drivers/usb/serial/cp210x.c | |||
| @@ -33,8 +33,7 @@ | |||
| 33 | /* | 33 | /* |
| 34 | * Function Prototypes | 34 | * Function Prototypes |
| 35 | */ | 35 | */ |
| 36 | static int cp210x_open(struct tty_struct *, struct usb_serial_port *, | 36 | static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *); |
| 37 | struct file *); | ||
| 38 | static void cp210x_cleanup(struct usb_serial_port *); | 37 | static void cp210x_cleanup(struct usb_serial_port *); |
| 39 | static void cp210x_close(struct usb_serial_port *); | 38 | static void cp210x_close(struct usb_serial_port *); |
| 40 | static void cp210x_get_termios(struct tty_struct *, | 39 | static void cp210x_get_termios(struct tty_struct *, |
| @@ -368,8 +367,7 @@ static unsigned int cp210x_quantise_baudrate(unsigned int baud) { | |||
| 368 | return baud; | 367 | return baud; |
| 369 | } | 368 | } |
| 370 | 369 | ||
| 371 | static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port, | 370 | static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 372 | struct file *filp) | ||
| 373 | { | 371 | { |
| 374 | struct usb_serial *serial = port->serial; | 372 | struct usb_serial *serial = port->serial; |
| 375 | int result; | 373 | int result; |
| @@ -399,12 +397,6 @@ static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port, | |||
| 399 | 397 | ||
| 400 | /* Configure the termios structure */ | 398 | /* Configure the termios structure */ |
| 401 | cp210x_get_termios(tty, port); | 399 | cp210x_get_termios(tty, port); |
| 402 | |||
| 403 | /* Set the DTR and RTS pins low */ | ||
| 404 | cp210x_tiocmset_port(tty ? (struct usb_serial_port *) tty->driver_data | ||
| 405 | : port, | ||
| 406 | NULL, TIOCM_DTR | TIOCM_RTS, 0); | ||
| 407 | |||
| 408 | return 0; | 400 | return 0; |
| 409 | } | 401 | } |
| 410 | 402 | ||
diff --git a/drivers/usb/serial/cyberjack.c b/drivers/usb/serial/cyberjack.c index 336523fd7366..b0f6402a91ca 100644 --- a/drivers/usb/serial/cyberjack.c +++ b/drivers/usb/serial/cyberjack.c | |||
| @@ -61,7 +61,7 @@ static int cyberjack_startup(struct usb_serial *serial); | |||
| 61 | static void cyberjack_disconnect(struct usb_serial *serial); | 61 | static void cyberjack_disconnect(struct usb_serial *serial); |
| 62 | static void cyberjack_release(struct usb_serial *serial); | 62 | static void cyberjack_release(struct usb_serial *serial); |
| 63 | static int cyberjack_open(struct tty_struct *tty, | 63 | static int cyberjack_open(struct tty_struct *tty, |
| 64 | struct usb_serial_port *port, struct file *filp); | 64 | struct usb_serial_port *port); |
| 65 | static void cyberjack_close(struct usb_serial_port *port); | 65 | static void cyberjack_close(struct usb_serial_port *port); |
| 66 | static int cyberjack_write(struct tty_struct *tty, | 66 | static int cyberjack_write(struct tty_struct *tty, |
| 67 | struct usb_serial_port *port, const unsigned char *buf, int count); | 67 | struct usb_serial_port *port, const unsigned char *buf, int count); |
| @@ -173,7 +173,7 @@ static void cyberjack_release(struct usb_serial *serial) | |||
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | static int cyberjack_open(struct tty_struct *tty, | 175 | static int cyberjack_open(struct tty_struct *tty, |
| 176 | struct usb_serial_port *port, struct file *filp) | 176 | struct usb_serial_port *port) |
| 177 | { | 177 | { |
| 178 | struct cyberjack_private *priv; | 178 | struct cyberjack_private *priv; |
| 179 | unsigned long flags; | 179 | unsigned long flags; |
diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c index 59adfe123110..e0a8b715f2f2 100644 --- a/drivers/usb/serial/cypress_m8.c +++ b/drivers/usb/serial/cypress_m8.c | |||
| @@ -172,8 +172,7 @@ static int cypress_earthmate_startup(struct usb_serial *serial); | |||
| 172 | static int cypress_hidcom_startup(struct usb_serial *serial); | 172 | static int cypress_hidcom_startup(struct usb_serial *serial); |
| 173 | static int cypress_ca42v2_startup(struct usb_serial *serial); | 173 | static int cypress_ca42v2_startup(struct usb_serial *serial); |
| 174 | static void cypress_release(struct usb_serial *serial); | 174 | static void cypress_release(struct usb_serial *serial); |
| 175 | static int cypress_open(struct tty_struct *tty, | 175 | static int cypress_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 176 | struct usb_serial_port *port, struct file *filp); | ||
| 177 | static void cypress_close(struct usb_serial_port *port); | 176 | static void cypress_close(struct usb_serial_port *port); |
| 178 | static void cypress_dtr_rts(struct usb_serial_port *port, int on); | 177 | static void cypress_dtr_rts(struct usb_serial_port *port, int on); |
| 179 | static int cypress_write(struct tty_struct *tty, struct usb_serial_port *port, | 178 | static int cypress_write(struct tty_struct *tty, struct usb_serial_port *port, |
| @@ -633,8 +632,7 @@ static void cypress_release(struct usb_serial *serial) | |||
| 633 | } | 632 | } |
| 634 | 633 | ||
| 635 | 634 | ||
| 636 | static int cypress_open(struct tty_struct *tty, | 635 | static int cypress_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 637 | struct usb_serial_port *port, struct file *filp) | ||
| 638 | { | 636 | { |
| 639 | struct cypress_private *priv = usb_get_serial_port_data(port); | 637 | struct cypress_private *priv = usb_get_serial_port_data(port); |
| 640 | struct usb_serial *serial = port->serial; | 638 | struct usb_serial *serial = port->serial; |
| @@ -659,15 +657,7 @@ static int cypress_open(struct tty_struct *tty, | |||
| 659 | spin_unlock_irqrestore(&priv->lock, flags); | 657 | spin_unlock_irqrestore(&priv->lock, flags); |
| 660 | 658 | ||
| 661 | /* Set termios */ | 659 | /* Set termios */ |
| 662 | result = cypress_write(tty, port, NULL, 0); | 660 | cypress_send(port); |
| 663 | |||
| 664 | if (result) { | ||
| 665 | dev_err(&port->dev, | ||
| 666 | "%s - failed setting the control lines - error %d\n", | ||
| 667 | __func__, result); | ||
| 668 | return result; | ||
| 669 | } else | ||
| 670 | dbg("%s - success setting the control lines", __func__); | ||
| 671 | 661 | ||
| 672 | if (tty) | 662 | if (tty) |
| 673 | cypress_set_termios(tty, port, &priv->tmp_termios); | 663 | cypress_set_termios(tty, port, &priv->tmp_termios); |
| @@ -1005,6 +995,8 @@ static void cypress_set_termios(struct tty_struct *tty, | |||
| 1005 | dbg("%s - port %d", __func__, port->number); | 995 | dbg("%s - port %d", __func__, port->number); |
| 1006 | 996 | ||
| 1007 | spin_lock_irqsave(&priv->lock, flags); | 997 | spin_lock_irqsave(&priv->lock, flags); |
| 998 | /* We can't clean this one up as we don't know the device type | ||
| 999 | early enough */ | ||
| 1008 | if (!priv->termios_initialized) { | 1000 | if (!priv->termios_initialized) { |
| 1009 | if (priv->chiptype == CT_EARTHMATE) { | 1001 | if (priv->chiptype == CT_EARTHMATE) { |
| 1010 | *(tty->termios) = tty_std_termios; | 1002 | *(tty->termios) = tty_std_termios; |
diff --git a/drivers/usb/serial/digi_acceleport.c b/drivers/usb/serial/digi_acceleport.c index f4808091c47c..ab3dd991586b 100644 --- a/drivers/usb/serial/digi_acceleport.c +++ b/drivers/usb/serial/digi_acceleport.c | |||
| @@ -453,8 +453,7 @@ static int digi_write(struct tty_struct *tty, struct usb_serial_port *port, | |||
| 453 | static void digi_write_bulk_callback(struct urb *urb); | 453 | static void digi_write_bulk_callback(struct urb *urb); |
| 454 | static int digi_write_room(struct tty_struct *tty); | 454 | static int digi_write_room(struct tty_struct *tty); |
| 455 | static int digi_chars_in_buffer(struct tty_struct *tty); | 455 | static int digi_chars_in_buffer(struct tty_struct *tty); |
| 456 | static int digi_open(struct tty_struct *tty, struct usb_serial_port *port, | 456 | static int digi_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 457 | struct file *filp); | ||
| 458 | static void digi_close(struct usb_serial_port *port); | 457 | static void digi_close(struct usb_serial_port *port); |
| 459 | static int digi_carrier_raised(struct usb_serial_port *port); | 458 | static int digi_carrier_raised(struct usb_serial_port *port); |
| 460 | static void digi_dtr_rts(struct usb_serial_port *port, int on); | 459 | static void digi_dtr_rts(struct usb_serial_port *port, int on); |
| @@ -1347,8 +1346,7 @@ static int digi_carrier_raised(struct usb_serial_port *port) | |||
| 1347 | return 0; | 1346 | return 0; |
| 1348 | } | 1347 | } |
| 1349 | 1348 | ||
| 1350 | static int digi_open(struct tty_struct *tty, struct usb_serial_port *port, | 1349 | static int digi_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 1351 | struct file *filp) | ||
| 1352 | { | 1350 | { |
| 1353 | int ret; | 1351 | int ret; |
| 1354 | unsigned char buf[32]; | 1352 | unsigned char buf[32]; |
diff --git a/drivers/usb/serial/empeg.c b/drivers/usb/serial/empeg.c index 80cb3471adbe..33c9e9cf9eb2 100644 --- a/drivers/usb/serial/empeg.c +++ b/drivers/usb/serial/empeg.c | |||
| @@ -79,8 +79,7 @@ static int debug; | |||
| 79 | #define EMPEG_PRODUCT_ID 0x0001 | 79 | #define EMPEG_PRODUCT_ID 0x0001 |
| 80 | 80 | ||
| 81 | /* function prototypes for an empeg-car player */ | 81 | /* function prototypes for an empeg-car player */ |
| 82 | static int empeg_open(struct tty_struct *tty, struct usb_serial_port *port, | 82 | static int empeg_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 83 | struct file *filp); | ||
| 84 | static void empeg_close(struct usb_serial_port *port); | 83 | static void empeg_close(struct usb_serial_port *port); |
| 85 | static int empeg_write(struct tty_struct *tty, struct usb_serial_port *port, | 84 | static int empeg_write(struct tty_struct *tty, struct usb_serial_port *port, |
| 86 | const unsigned char *buf, | 85 | const unsigned char *buf, |
| @@ -90,8 +89,7 @@ static int empeg_chars_in_buffer(struct tty_struct *tty); | |||
| 90 | static void empeg_throttle(struct tty_struct *tty); | 89 | static void empeg_throttle(struct tty_struct *tty); |
| 91 | static void empeg_unthrottle(struct tty_struct *tty); | 90 | static void empeg_unthrottle(struct tty_struct *tty); |
| 92 | static int empeg_startup(struct usb_serial *serial); | 91 | static int empeg_startup(struct usb_serial *serial); |
| 93 | static void empeg_set_termios(struct tty_struct *tty, | 92 | static void empeg_init_termios(struct tty_struct *tty); |
| 94 | struct usb_serial_port *port, struct ktermios *old_termios); | ||
| 95 | static void empeg_write_bulk_callback(struct urb *urb); | 93 | static void empeg_write_bulk_callback(struct urb *urb); |
| 96 | static void empeg_read_bulk_callback(struct urb *urb); | 94 | static void empeg_read_bulk_callback(struct urb *urb); |
| 97 | 95 | ||
| @@ -123,7 +121,7 @@ static struct usb_serial_driver empeg_device = { | |||
| 123 | .throttle = empeg_throttle, | 121 | .throttle = empeg_throttle, |
| 124 | .unthrottle = empeg_unthrottle, | 122 | .unthrottle = empeg_unthrottle, |
| 125 | .attach = empeg_startup, | 123 | .attach = empeg_startup, |
| 126 | .set_termios = empeg_set_termios, | 124 | .init_termios = empeg_init_termios, |
| 127 | .write = empeg_write, | 125 | .write = empeg_write, |
| 128 | .write_room = empeg_write_room, | 126 | .write_room = empeg_write_room, |
| 129 | .chars_in_buffer = empeg_chars_in_buffer, | 127 | .chars_in_buffer = empeg_chars_in_buffer, |
| @@ -142,17 +140,13 @@ static int bytes_out; | |||
| 142 | /****************************************************************************** | 140 | /****************************************************************************** |
| 143 | * Empeg specific driver functions | 141 | * Empeg specific driver functions |
| 144 | ******************************************************************************/ | 142 | ******************************************************************************/ |
| 145 | static int empeg_open(struct tty_struct *tty, struct usb_serial_port *port, | 143 | static int empeg_open(struct tty_struct *tty,struct usb_serial_port *port) |
| 146 | struct file *filp) | ||
| 147 | { | 144 | { |
| 148 | struct usb_serial *serial = port->serial; | 145 | struct usb_serial *serial = port->serial; |
| 149 | int result = 0; | 146 | int result = 0; |
| 150 | 147 | ||
| 151 | dbg("%s - port %d", __func__, port->number); | 148 | dbg("%s - port %d", __func__, port->number); |
| 152 | 149 | ||
| 153 | /* Force default termio settings */ | ||
| 154 | empeg_set_termios(tty, port, NULL) ; | ||
| 155 | |||
| 156 | bytes_in = 0; | 150 | bytes_in = 0; |
| 157 | bytes_out = 0; | 151 | bytes_out = 0; |
| 158 | 152 | ||
| @@ -425,11 +419,9 @@ static int empeg_startup(struct usb_serial *serial) | |||
| 425 | } | 419 | } |
| 426 | 420 | ||
| 427 | 421 | ||
| 428 | static void empeg_set_termios(struct tty_struct *tty, | 422 | static void empeg_init_termios(struct tty_struct *tty) |
| 429 | struct usb_serial_port *port, struct ktermios *old_termios) | ||
| 430 | { | 423 | { |
| 431 | struct ktermios *termios = tty->termios; | 424 | struct ktermios *termios = tty->termios; |
| 432 | dbg("%s - port %d", __func__, port->number); | ||
| 433 | 425 | ||
| 434 | /* | 426 | /* |
| 435 | * The empeg-car player wants these particular tty settings. | 427 | * The empeg-car player wants these particular tty settings. |
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c index 8fec5d4455c9..76a17f915eef 100644 --- a/drivers/usb/serial/ftdi_sio.c +++ b/drivers/usb/serial/ftdi_sio.c | |||
| @@ -747,8 +747,7 @@ static int ftdi_sio_probe(struct usb_serial *serial, | |||
| 747 | const struct usb_device_id *id); | 747 | const struct usb_device_id *id); |
| 748 | static int ftdi_sio_port_probe(struct usb_serial_port *port); | 748 | static int ftdi_sio_port_probe(struct usb_serial_port *port); |
| 749 | static int ftdi_sio_port_remove(struct usb_serial_port *port); | 749 | static int ftdi_sio_port_remove(struct usb_serial_port *port); |
| 750 | static int ftdi_open(struct tty_struct *tty, | 750 | static int ftdi_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 751 | struct usb_serial_port *port, struct file *filp); | ||
| 752 | static void ftdi_close(struct usb_serial_port *port); | 751 | static void ftdi_close(struct usb_serial_port *port); |
| 753 | static void ftdi_dtr_rts(struct usb_serial_port *port, int on); | 752 | static void ftdi_dtr_rts(struct usb_serial_port *port, int on); |
| 754 | static int ftdi_write(struct tty_struct *tty, struct usb_serial_port *port, | 753 | static int ftdi_write(struct tty_struct *tty, struct usb_serial_port *port, |
| @@ -1680,8 +1679,7 @@ static int ftdi_sio_port_remove(struct usb_serial_port *port) | |||
| 1680 | return 0; | 1679 | return 0; |
| 1681 | } | 1680 | } |
| 1682 | 1681 | ||
| 1683 | static int ftdi_open(struct tty_struct *tty, | 1682 | static int ftdi_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 1684 | struct usb_serial_port *port, struct file *filp) | ||
| 1685 | { /* ftdi_open */ | 1683 | { /* ftdi_open */ |
| 1686 | struct usb_device *dev = port->serial->dev; | 1684 | struct usb_device *dev = port->serial->dev; |
| 1687 | struct ftdi_private *priv = usb_get_serial_port_data(port); | 1685 | struct ftdi_private *priv = usb_get_serial_port_data(port); |
diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c index 8839f1c70b7f..20432d345529 100644 --- a/drivers/usb/serial/garmin_gps.c +++ b/drivers/usb/serial/garmin_gps.c | |||
| @@ -933,8 +933,7 @@ static int garmin_init_session(struct usb_serial_port *port) | |||
| 933 | 933 | ||
| 934 | 934 | ||
| 935 | 935 | ||
| 936 | static int garmin_open(struct tty_struct *tty, | 936 | static int garmin_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 937 | struct usb_serial_port *port, struct file *filp) | ||
| 938 | { | 937 | { |
| 939 | unsigned long flags; | 938 | unsigned long flags; |
| 940 | int status = 0; | 939 | int status = 0; |
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c index ce57f6a32bdf..d9398e9f30ce 100644 --- a/drivers/usb/serial/generic.c +++ b/drivers/usb/serial/generic.c | |||
| @@ -114,8 +114,7 @@ void usb_serial_generic_deregister(void) | |||
| 114 | #endif | 114 | #endif |
| 115 | } | 115 | } |
| 116 | 116 | ||
| 117 | int usb_serial_generic_open(struct tty_struct *tty, | 117 | int usb_serial_generic_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 118 | struct usb_serial_port *port, struct file *filp) | ||
| 119 | { | 118 | { |
| 120 | struct usb_serial *serial = port->serial; | 119 | struct usb_serial *serial = port->serial; |
| 121 | int result = 0; | 120 | int result = 0; |
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c index 0191693625d6..dc0f832657e6 100644 --- a/drivers/usb/serial/io_edgeport.c +++ b/drivers/usb/serial/io_edgeport.c | |||
| @@ -205,8 +205,7 @@ static void edge_bulk_out_data_callback(struct urb *urb); | |||
| 205 | static void edge_bulk_out_cmd_callback(struct urb *urb); | 205 | static void edge_bulk_out_cmd_callback(struct urb *urb); |
| 206 | 206 | ||
| 207 | /* function prototypes for the usbserial callbacks */ | 207 | /* function prototypes for the usbserial callbacks */ |
| 208 | static int edge_open(struct tty_struct *tty, struct usb_serial_port *port, | 208 | static int edge_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 209 | struct file *filp); | ||
| 210 | static void edge_close(struct usb_serial_port *port); | 209 | static void edge_close(struct usb_serial_port *port); |
| 211 | static int edge_write(struct tty_struct *tty, struct usb_serial_port *port, | 210 | static int edge_write(struct tty_struct *tty, struct usb_serial_port *port, |
| 212 | const unsigned char *buf, int count); | 211 | const unsigned char *buf, int count); |
| @@ -852,8 +851,7 @@ static void edge_bulk_out_cmd_callback(struct urb *urb) | |||
| 852 | * If successful, we return 0 | 851 | * If successful, we return 0 |
| 853 | * Otherwise we return a negative error number. | 852 | * Otherwise we return a negative error number. |
| 854 | *****************************************************************************/ | 853 | *****************************************************************************/ |
| 855 | static int edge_open(struct tty_struct *tty, | 854 | static int edge_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 856 | struct usb_serial_port *port, struct file *filp) | ||
| 857 | { | 855 | { |
| 858 | struct edgeport_port *edge_port = usb_get_serial_port_data(port); | 856 | struct edgeport_port *edge_port = usb_get_serial_port_data(port); |
| 859 | struct usb_serial *serial; | 857 | struct usb_serial *serial; |
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c index e8bc42f92e79..d4cc0f7af400 100644 --- a/drivers/usb/serial/io_ti.c +++ b/drivers/usb/serial/io_ti.c | |||
| @@ -1831,8 +1831,7 @@ static void edge_bulk_out_callback(struct urb *urb) | |||
| 1831 | tty_kref_put(tty); | 1831 | tty_kref_put(tty); |
| 1832 | } | 1832 | } |
| 1833 | 1833 | ||
| 1834 | static int edge_open(struct tty_struct *tty, | 1834 | static int edge_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 1835 | struct usb_serial_port *port, struct file *filp) | ||
| 1836 | { | 1835 | { |
| 1837 | struct edgeport_port *edge_port = usb_get_serial_port_data(port); | 1836 | struct edgeport_port *edge_port = usb_get_serial_port_data(port); |
| 1838 | struct edgeport_serial *edge_serial; | 1837 | struct edgeport_serial *edge_serial; |
diff --git a/drivers/usb/serial/ipaq.c b/drivers/usb/serial/ipaq.c index 2545d45ce16f..24fcc64b837d 100644 --- a/drivers/usb/serial/ipaq.c +++ b/drivers/usb/serial/ipaq.c | |||
| @@ -75,7 +75,7 @@ static int initial_wait; | |||
| 75 | 75 | ||
| 76 | /* Function prototypes for an ipaq */ | 76 | /* Function prototypes for an ipaq */ |
| 77 | static int ipaq_open(struct tty_struct *tty, | 77 | static int ipaq_open(struct tty_struct *tty, |
| 78 | struct usb_serial_port *port, struct file *filp); | 78 | struct usb_serial_port *port); |
| 79 | static void ipaq_close(struct usb_serial_port *port); | 79 | static void ipaq_close(struct usb_serial_port *port); |
| 80 | static int ipaq_calc_num_ports(struct usb_serial *serial); | 80 | static int ipaq_calc_num_ports(struct usb_serial *serial); |
| 81 | static int ipaq_startup(struct usb_serial *serial); | 81 | static int ipaq_startup(struct usb_serial *serial); |
| @@ -587,7 +587,7 @@ static int bytes_in; | |||
| 587 | static int bytes_out; | 587 | static int bytes_out; |
| 588 | 588 | ||
| 589 | static int ipaq_open(struct tty_struct *tty, | 589 | static int ipaq_open(struct tty_struct *tty, |
| 590 | struct usb_serial_port *port, struct file *filp) | 590 | struct usb_serial_port *port) |
| 591 | { | 591 | { |
| 592 | struct usb_serial *serial = port->serial; | 592 | struct usb_serial *serial = port->serial; |
| 593 | struct ipaq_private *priv; | 593 | struct ipaq_private *priv; |
| @@ -628,11 +628,6 @@ static int ipaq_open(struct tty_struct *tty, | |||
| 628 | priv->free_len += PACKET_SIZE; | 628 | priv->free_len += PACKET_SIZE; |
| 629 | } | 629 | } |
| 630 | 630 | ||
| 631 | if (tty) { | ||
| 632 | /* FIXME: These two are bogus */ | ||
| 633 | tty->raw = 1; | ||
| 634 | tty->real_raw = 1; | ||
| 635 | } | ||
| 636 | /* | 631 | /* |
| 637 | * Lose the small buffers usbserial provides. Make larger ones. | 632 | * Lose the small buffers usbserial provides. Make larger ones. |
| 638 | */ | 633 | */ |
diff --git a/drivers/usb/serial/ipw.c b/drivers/usb/serial/ipw.c index 29ad038b9c8d..727d323f092a 100644 --- a/drivers/usb/serial/ipw.c +++ b/drivers/usb/serial/ipw.c | |||
| @@ -193,8 +193,7 @@ static void ipw_read_bulk_callback(struct urb *urb) | |||
| 193 | return; | 193 | return; |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | static int ipw_open(struct tty_struct *tty, | 196 | static int ipw_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 197 | struct usb_serial_port *port, struct file *filp) | ||
| 198 | { | 197 | { |
| 199 | struct usb_device *dev = port->serial->dev; | 198 | struct usb_device *dev = port->serial->dev; |
| 200 | u8 buf_flow_static[16] = IPW_BYTES_FLOWINIT; | 199 | u8 buf_flow_static[16] = IPW_BYTES_FLOWINIT; |
diff --git a/drivers/usb/serial/ir-usb.c b/drivers/usb/serial/ir-usb.c index 66009b6b763a..95d8d26b9a44 100644 --- a/drivers/usb/serial/ir-usb.c +++ b/drivers/usb/serial/ir-usb.c | |||
| @@ -86,8 +86,7 @@ static int buffer_size; | |||
| 86 | static int xbof = -1; | 86 | static int xbof = -1; |
| 87 | 87 | ||
| 88 | static int ir_startup (struct usb_serial *serial); | 88 | static int ir_startup (struct usb_serial *serial); |
| 89 | static int ir_open(struct tty_struct *tty, struct usb_serial_port *port, | 89 | static int ir_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 90 | struct file *filep); | ||
| 91 | static void ir_close(struct usb_serial_port *port); | 90 | static void ir_close(struct usb_serial_port *port); |
| 92 | static int ir_write(struct tty_struct *tty, struct usb_serial_port *port, | 91 | static int ir_write(struct tty_struct *tty, struct usb_serial_port *port, |
| 93 | const unsigned char *buf, int count); | 92 | const unsigned char *buf, int count); |
| @@ -296,8 +295,7 @@ static int ir_startup(struct usb_serial *serial) | |||
| 296 | return 0; | 295 | return 0; |
| 297 | } | 296 | } |
| 298 | 297 | ||
| 299 | static int ir_open(struct tty_struct *tty, | 298 | static int ir_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 300 | struct usb_serial_port *port, struct file *filp) | ||
| 301 | { | 299 | { |
| 302 | char *buffer; | 300 | char *buffer; |
| 303 | int result = 0; | 301 | int result = 0; |
diff --git a/drivers/usb/serial/iuu_phoenix.c b/drivers/usb/serial/iuu_phoenix.c index 96873a7a32b0..6138c1cda35f 100644 --- a/drivers/usb/serial/iuu_phoenix.c +++ b/drivers/usb/serial/iuu_phoenix.c | |||
| @@ -71,7 +71,6 @@ struct iuu_private { | |||
| 71 | spinlock_t lock; /* store irq state */ | 71 | spinlock_t lock; /* store irq state */ |
| 72 | wait_queue_head_t delta_msr_wait; | 72 | wait_queue_head_t delta_msr_wait; |
| 73 | u8 line_status; | 73 | u8 line_status; |
| 74 | u8 termios_initialized; | ||
| 75 | int tiostatus; /* store IUART SIGNAL for tiocmget call */ | 74 | int tiostatus; /* store IUART SIGNAL for tiocmget call */ |
| 76 | u8 reset; /* if 1 reset is needed */ | 75 | u8 reset; /* if 1 reset is needed */ |
| 77 | int poll; /* number of poll */ | 76 | int poll; /* number of poll */ |
| @@ -1018,14 +1017,24 @@ static void iuu_close(struct usb_serial_port *port) | |||
| 1018 | } | 1017 | } |
| 1019 | } | 1018 | } |
| 1020 | 1019 | ||
| 1021 | static int iuu_open(struct tty_struct *tty, | 1020 | static void iuu_init_termios(struct tty_struct *tty) |
| 1022 | struct usb_serial_port *port, struct file *filp) | 1021 | { |
| 1022 | *(tty->termios) = tty_std_termios; | ||
| 1023 | tty->termios->c_cflag = CLOCAL | CREAD | CS8 | B9600 | ||
| 1024 | | TIOCM_CTS | CSTOPB | PARENB; | ||
| 1025 | tty->termios->c_ispeed = 9600; | ||
| 1026 | tty->termios->c_ospeed = 9600; | ||
| 1027 | tty->termios->c_lflag = 0; | ||
| 1028 | tty->termios->c_oflag = 0; | ||
| 1029 | tty->termios->c_iflag = 0; | ||
| 1030 | } | ||
| 1031 | |||
| 1032 | static int iuu_open(struct tty_struct *tty, struct usb_serial_port *port) | ||
| 1023 | { | 1033 | { |
| 1024 | struct usb_serial *serial = port->serial; | 1034 | struct usb_serial *serial = port->serial; |
| 1025 | u8 *buf; | 1035 | u8 *buf; |
| 1026 | int result; | 1036 | int result; |
| 1027 | u32 actual; | 1037 | u32 actual; |
| 1028 | unsigned long flags; | ||
| 1029 | struct iuu_private *priv = usb_get_serial_port_data(port); | 1038 | struct iuu_private *priv = usb_get_serial_port_data(port); |
| 1030 | 1039 | ||
| 1031 | dbg("%s - port %d", __func__, port->number); | 1040 | dbg("%s - port %d", __func__, port->number); |
| @@ -1064,21 +1073,7 @@ static int iuu_open(struct tty_struct *tty, | |||
| 1064 | port->bulk_in_buffer, 512, | 1073 | port->bulk_in_buffer, 512, |
| 1065 | NULL, NULL); | 1074 | NULL, NULL); |
| 1066 | 1075 | ||
| 1067 | /* set the termios structure */ | 1076 | priv->poll = 0; |
| 1068 | spin_lock_irqsave(&priv->lock, flags); | ||
| 1069 | if (tty && !priv->termios_initialized) { | ||
| 1070 | *(tty->termios) = tty_std_termios; | ||
| 1071 | tty->termios->c_cflag = CLOCAL | CREAD | CS8 | B9600 | ||
| 1072 | | TIOCM_CTS | CSTOPB | PARENB; | ||
| 1073 | tty->termios->c_ispeed = 9600; | ||
| 1074 | tty->termios->c_ospeed = 9600; | ||
| 1075 | tty->termios->c_lflag = 0; | ||
| 1076 | tty->termios->c_oflag = 0; | ||
| 1077 | tty->termios->c_iflag = 0; | ||
| 1078 | priv->termios_initialized = 1; | ||
| 1079 | priv->poll = 0; | ||
| 1080 | } | ||
| 1081 | spin_unlock_irqrestore(&priv->lock, flags); | ||
| 1082 | 1077 | ||
| 1083 | /* initialize writebuf */ | 1078 | /* initialize writebuf */ |
| 1084 | #define FISH(a, b, c, d) do { \ | 1079 | #define FISH(a, b, c, d) do { \ |
| @@ -1201,6 +1196,7 @@ static struct usb_serial_driver iuu_device = { | |||
| 1201 | .tiocmget = iuu_tiocmget, | 1196 | .tiocmget = iuu_tiocmget, |
| 1202 | .tiocmset = iuu_tiocmset, | 1197 | .tiocmset = iuu_tiocmset, |
| 1203 | .set_termios = iuu_set_termios, | 1198 | .set_termios = iuu_set_termios, |
| 1199 | .init_termios = iuu_init_termios, | ||
| 1204 | .attach = iuu_startup, | 1200 | .attach = iuu_startup, |
| 1205 | .release = iuu_release, | 1201 | .release = iuu_release, |
| 1206 | }; | 1202 | }; |
diff --git a/drivers/usb/serial/keyspan.c b/drivers/usb/serial/keyspan.c index 2594b8743d3f..f8c4b07033ff 100644 --- a/drivers/usb/serial/keyspan.c +++ b/drivers/usb/serial/keyspan.c | |||
| @@ -1209,8 +1209,7 @@ static int keyspan_write_room(struct tty_struct *tty) | |||
| 1209 | } | 1209 | } |
| 1210 | 1210 | ||
| 1211 | 1211 | ||
| 1212 | static int keyspan_open(struct tty_struct *tty, | 1212 | static int keyspan_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 1213 | struct usb_serial_port *port, struct file *filp) | ||
| 1214 | { | 1213 | { |
| 1215 | struct keyspan_port_private *p_priv; | 1214 | struct keyspan_port_private *p_priv; |
| 1216 | struct keyspan_serial_private *s_priv; | 1215 | struct keyspan_serial_private *s_priv; |
diff --git a/drivers/usb/serial/keyspan.h b/drivers/usb/serial/keyspan.h index 3107ed15af64..30771e5b3973 100644 --- a/drivers/usb/serial/keyspan.h +++ b/drivers/usb/serial/keyspan.h | |||
| @@ -36,8 +36,7 @@ | |||
| 36 | 36 | ||
| 37 | /* Function prototypes for Keyspan serial converter */ | 37 | /* Function prototypes for Keyspan serial converter */ |
| 38 | static int keyspan_open (struct tty_struct *tty, | 38 | static int keyspan_open (struct tty_struct *tty, |
| 39 | struct usb_serial_port *port, | 39 | struct usb_serial_port *port); |
| 40 | struct file *filp); | ||
| 41 | static void keyspan_close (struct usb_serial_port *port); | 40 | static void keyspan_close (struct usb_serial_port *port); |
| 42 | static void keyspan_dtr_rts (struct usb_serial_port *port, int on); | 41 | static void keyspan_dtr_rts (struct usb_serial_port *port, int on); |
| 43 | static int keyspan_startup (struct usb_serial *serial); | 42 | static int keyspan_startup (struct usb_serial *serial); |
diff --git a/drivers/usb/serial/keyspan_pda.c b/drivers/usb/serial/keyspan_pda.c index d0b12e40c2b1..257c16cc6b2a 100644 --- a/drivers/usb/serial/keyspan_pda.c +++ b/drivers/usb/serial/keyspan_pda.c | |||
| @@ -681,7 +681,7 @@ static int keyspan_pda_carrier_raised(struct usb_serial_port *port) | |||
| 681 | 681 | ||
| 682 | 682 | ||
| 683 | static int keyspan_pda_open(struct tty_struct *tty, | 683 | static int keyspan_pda_open(struct tty_struct *tty, |
| 684 | struct usb_serial_port *port, struct file *filp) | 684 | struct usb_serial_port *port) |
| 685 | { | 685 | { |
| 686 | struct usb_serial *serial = port->serial; | 686 | struct usb_serial *serial = port->serial; |
| 687 | unsigned char room; | 687 | unsigned char room; |
diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c index 0f44bb8e8d4f..a61673133d7d 100644 --- a/drivers/usb/serial/kl5kusb105.c +++ b/drivers/usb/serial/kl5kusb105.c | |||
| @@ -75,8 +75,7 @@ static int debug; | |||
| 75 | static int klsi_105_startup(struct usb_serial *serial); | 75 | static int klsi_105_startup(struct usb_serial *serial); |
| 76 | static void klsi_105_disconnect(struct usb_serial *serial); | 76 | static void klsi_105_disconnect(struct usb_serial *serial); |
| 77 | static void klsi_105_release(struct usb_serial *serial); | 77 | static void klsi_105_release(struct usb_serial *serial); |
| 78 | static int klsi_105_open(struct tty_struct *tty, | 78 | static int klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 79 | struct usb_serial_port *port, struct file *filp); | ||
| 80 | static void klsi_105_close(struct usb_serial_port *port); | 79 | static void klsi_105_close(struct usb_serial_port *port); |
| 81 | static int klsi_105_write(struct tty_struct *tty, | 80 | static int klsi_105_write(struct tty_struct *tty, |
| 82 | struct usb_serial_port *port, const unsigned char *buf, int count); | 81 | struct usb_serial_port *port, const unsigned char *buf, int count); |
| @@ -358,8 +357,7 @@ static void klsi_105_release(struct usb_serial *serial) | |||
| 358 | } | 357 | } |
| 359 | } /* klsi_105_release */ | 358 | } /* klsi_105_release */ |
| 360 | 359 | ||
| 361 | static int klsi_105_open(struct tty_struct *tty, | 360 | static int klsi_105_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 362 | struct usb_serial_port *port, struct file *filp) | ||
| 363 | { | 361 | { |
| 364 | struct klsi_105_private *priv = usb_get_serial_port_data(port); | 362 | struct klsi_105_private *priv = usb_get_serial_port_data(port); |
| 365 | int retval = 0; | 363 | int retval = 0; |
| @@ -371,10 +369,6 @@ static int klsi_105_open(struct tty_struct *tty, | |||
| 371 | 369 | ||
| 372 | dbg("%s port %d", __func__, port->number); | 370 | dbg("%s port %d", __func__, port->number); |
| 373 | 371 | ||
| 374 | /* force low_latency on so that our tty_push actually forces | ||
| 375 | * the data through | ||
| 376 | * tty->low_latency = 1; */ | ||
| 377 | |||
| 378 | /* Do a defined restart: | 372 | /* Do a defined restart: |
| 379 | * Set up sane default baud rate and send the 'READ_ON' | 373 | * Set up sane default baud rate and send the 'READ_ON' |
| 380 | * vendor command. | 374 | * vendor command. |
diff --git a/drivers/usb/serial/kobil_sct.c b/drivers/usb/serial/kobil_sct.c index 6db0e561f680..45ea694b3ae6 100644 --- a/drivers/usb/serial/kobil_sct.c +++ b/drivers/usb/serial/kobil_sct.c | |||
| @@ -70,8 +70,7 @@ static int debug; | |||
| 70 | /* Function prototypes */ | 70 | /* Function prototypes */ |
| 71 | static int kobil_startup(struct usb_serial *serial); | 71 | static int kobil_startup(struct usb_serial *serial); |
| 72 | static void kobil_release(struct usb_serial *serial); | 72 | static void kobil_release(struct usb_serial *serial); |
| 73 | static int kobil_open(struct tty_struct *tty, | 73 | static int kobil_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 74 | struct usb_serial_port *port, struct file *filp); | ||
| 75 | static void kobil_close(struct usb_serial_port *port); | 74 | static void kobil_close(struct usb_serial_port *port); |
| 76 | static int kobil_write(struct tty_struct *tty, struct usb_serial_port *port, | 75 | static int kobil_write(struct tty_struct *tty, struct usb_serial_port *port, |
| 77 | const unsigned char *buf, int count); | 76 | const unsigned char *buf, int count); |
| @@ -85,7 +84,7 @@ static void kobil_read_int_callback(struct urb *urb); | |||
| 85 | static void kobil_write_callback(struct urb *purb); | 84 | static void kobil_write_callback(struct urb *purb); |
| 86 | static void kobil_set_termios(struct tty_struct *tty, | 85 | static void kobil_set_termios(struct tty_struct *tty, |
| 87 | struct usb_serial_port *port, struct ktermios *old); | 86 | struct usb_serial_port *port, struct ktermios *old); |
| 88 | 87 | static void kobil_init_termios(struct tty_struct *tty); | |
| 89 | 88 | ||
| 90 | static struct usb_device_id id_table [] = { | 89 | static struct usb_device_id id_table [] = { |
| 91 | { USB_DEVICE(KOBIL_VENDOR_ID, KOBIL_ADAPTER_B_PRODUCT_ID) }, | 90 | { USB_DEVICE(KOBIL_VENDOR_ID, KOBIL_ADAPTER_B_PRODUCT_ID) }, |
| @@ -120,6 +119,7 @@ static struct usb_serial_driver kobil_device = { | |||
| 120 | .release = kobil_release, | 119 | .release = kobil_release, |
| 121 | .ioctl = kobil_ioctl, | 120 | .ioctl = kobil_ioctl, |
| 122 | .set_termios = kobil_set_termios, | 121 | .set_termios = kobil_set_termios, |
| 122 | .init_termios = kobil_init_termios, | ||
| 123 | .tiocmget = kobil_tiocmget, | 123 | .tiocmget = kobil_tiocmget, |
| 124 | .tiocmset = kobil_tiocmset, | 124 | .tiocmset = kobil_tiocmset, |
| 125 | .open = kobil_open, | 125 | .open = kobil_open, |
| @@ -210,9 +210,17 @@ static void kobil_release(struct usb_serial *serial) | |||
| 210 | kfree(usb_get_serial_port_data(serial->port[i])); | 210 | kfree(usb_get_serial_port_data(serial->port[i])); |
| 211 | } | 211 | } |
| 212 | 212 | ||
| 213 | static void kobil_init_termios(struct tty_struct *tty) | ||
| 214 | { | ||
| 215 | /* Default to echo off and other sane device settings */ | ||
| 216 | tty->termios->c_lflag = 0; | ||
| 217 | tty->termios->c_lflag &= ~(ISIG | ICANON | ECHO | IEXTEN | XCASE); | ||
| 218 | tty->termios->c_iflag = IGNBRK | IGNPAR | IXOFF; | ||
| 219 | /* do NOT translate CR to CR-NL (0x0A -> 0x0A 0x0D) */ | ||
| 220 | tty->termios->c_oflag &= ~ONLCR; | ||
| 221 | } | ||
| 213 | 222 | ||
| 214 | static int kobil_open(struct tty_struct *tty, | 223 | static int kobil_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 215 | struct usb_serial_port *port, struct file *filp) | ||
| 216 | { | 224 | { |
| 217 | int result = 0; | 225 | int result = 0; |
| 218 | struct kobil_private *priv; | 226 | struct kobil_private *priv; |
| @@ -226,16 +234,6 @@ static int kobil_open(struct tty_struct *tty, | |||
| 226 | /* someone sets the dev to 0 if the close method has been called */ | 234 | /* someone sets the dev to 0 if the close method has been called */ |
| 227 | port->interrupt_in_urb->dev = port->serial->dev; | 235 | port->interrupt_in_urb->dev = port->serial->dev; |
| 228 | 236 | ||
| 229 | if (tty) { | ||
| 230 | |||
| 231 | /* Default to echo off and other sane device settings */ | ||
| 232 | tty->termios->c_lflag = 0; | ||
| 233 | tty->termios->c_lflag &= ~(ISIG | ICANON | ECHO | IEXTEN | | ||
| 234 | XCASE); | ||
| 235 | tty->termios->c_iflag = IGNBRK | IGNPAR | IXOFF; | ||
| 236 | /* do NOT translate CR to CR-NL (0x0A -> 0x0A 0x0D) */ | ||
| 237 | tty->termios->c_oflag &= ~ONLCR; | ||
| 238 | } | ||
| 239 | /* allocate memory for transfer buffer */ | 237 | /* allocate memory for transfer buffer */ |
| 240 | transfer_buffer = kzalloc(transfer_buffer_length, GFP_KERNEL); | 238 | transfer_buffer = kzalloc(transfer_buffer_length, GFP_KERNEL); |
| 241 | if (!transfer_buffer) | 239 | if (!transfer_buffer) |
diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c index d8825e159aa5..ad4998bbf16f 100644 --- a/drivers/usb/serial/mct_u232.c +++ b/drivers/usb/serial/mct_u232.c | |||
| @@ -93,8 +93,7 @@ static int debug; | |||
| 93 | */ | 93 | */ |
| 94 | static int mct_u232_startup(struct usb_serial *serial); | 94 | static int mct_u232_startup(struct usb_serial *serial); |
| 95 | static void mct_u232_release(struct usb_serial *serial); | 95 | static void mct_u232_release(struct usb_serial *serial); |
| 96 | static int mct_u232_open(struct tty_struct *tty, | 96 | static int mct_u232_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 97 | struct usb_serial_port *port, struct file *filp); | ||
| 98 | static void mct_u232_close(struct usb_serial_port *port); | 97 | static void mct_u232_close(struct usb_serial_port *port); |
| 99 | static void mct_u232_dtr_rts(struct usb_serial_port *port, int on); | 98 | static void mct_u232_dtr_rts(struct usb_serial_port *port, int on); |
| 100 | static void mct_u232_read_int_callback(struct urb *urb); | 99 | static void mct_u232_read_int_callback(struct urb *urb); |
| @@ -421,8 +420,7 @@ static void mct_u232_release(struct usb_serial *serial) | |||
| 421 | } | 420 | } |
| 422 | } /* mct_u232_release */ | 421 | } /* mct_u232_release */ |
| 423 | 422 | ||
| 424 | static int mct_u232_open(struct tty_struct *tty, | 423 | static int mct_u232_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 425 | struct usb_serial_port *port, struct file *filp) | ||
| 426 | { | 424 | { |
| 427 | struct usb_serial *serial = port->serial; | 425 | struct usb_serial *serial = port->serial; |
| 428 | struct mct_u232_private *priv = usb_get_serial_port_data(port); | 426 | struct mct_u232_private *priv = usb_get_serial_port_data(port); |
| @@ -568,10 +566,13 @@ static void mct_u232_read_int_callback(struct urb *urb) | |||
| 568 | * Work-a-round: handle the 'usual' bulk-in pipe here | 566 | * Work-a-round: handle the 'usual' bulk-in pipe here |
| 569 | */ | 567 | */ |
| 570 | if (urb->transfer_buffer_length > 2) { | 568 | if (urb->transfer_buffer_length > 2) { |
| 571 | tty = tty_port_tty_get(&port->port); | ||
| 572 | if (urb->actual_length) { | 569 | if (urb->actual_length) { |
| 573 | tty_insert_flip_string(tty, data, urb->actual_length); | 570 | tty = tty_port_tty_get(&port->port); |
| 574 | tty_flip_buffer_push(tty); | 571 | if (tty) { |
| 572 | tty_insert_flip_string(tty, data, | ||
| 573 | urb->actual_length); | ||
| 574 | tty_flip_buffer_push(tty); | ||
| 575 | } | ||
| 575 | tty_kref_put(tty); | 576 | tty_kref_put(tty); |
| 576 | } | 577 | } |
| 577 | goto exit; | 578 | goto exit; |
diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c index ccd4dd340d2c..763e32a44be0 100644 --- a/drivers/usb/serial/mos7720.c +++ b/drivers/usb/serial/mos7720.c | |||
| @@ -85,7 +85,7 @@ static int debug; | |||
| 85 | #define MOSCHIP_DEVICE_ID_7720 0x7720 | 85 | #define MOSCHIP_DEVICE_ID_7720 0x7720 |
| 86 | #define MOSCHIP_DEVICE_ID_7715 0x7715 | 86 | #define MOSCHIP_DEVICE_ID_7715 0x7715 |
| 87 | 87 | ||
| 88 | static struct usb_device_id moschip_port_id_table [] = { | 88 | static struct usb_device_id moschip_port_id_table[] = { |
| 89 | { USB_DEVICE(USB_VENDOR_ID_MOSCHIP, MOSCHIP_DEVICE_ID_7720) }, | 89 | { USB_DEVICE(USB_VENDOR_ID_MOSCHIP, MOSCHIP_DEVICE_ID_7720) }, |
| 90 | { } /* terminating entry */ | 90 | { } /* terminating entry */ |
| 91 | }; | 91 | }; |
| @@ -319,8 +319,7 @@ static int send_mos_cmd(struct usb_serial *serial, __u8 request, __u16 value, | |||
| 319 | return status; | 319 | return status; |
| 320 | } | 320 | } |
| 321 | 321 | ||
| 322 | static int mos7720_open(struct tty_struct *tty, | 322 | static int mos7720_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 323 | struct usb_serial_port *port, struct file *filp) | ||
| 324 | { | 323 | { |
| 325 | struct usb_serial *serial; | 324 | struct usb_serial *serial; |
| 326 | struct usb_serial_port *port0; | 325 | struct usb_serial_port *port0; |
| @@ -378,10 +377,14 @@ static int mos7720_open(struct tty_struct *tty, | |||
| 378 | /* Initialize MCS7720 -- Write Init values to corresponding Registers | 377 | /* Initialize MCS7720 -- Write Init values to corresponding Registers |
| 379 | * | 378 | * |
| 380 | * Register Index | 379 | * Register Index |
| 380 | * 0 : THR/RHR | ||
| 381 | * 1 : IER | 381 | * 1 : IER |
| 382 | * 2 : FCR | 382 | * 2 : FCR |
| 383 | * 3 : LCR | 383 | * 3 : LCR |
| 384 | * 4 : MCR | 384 | * 4 : MCR |
| 385 | * 5 : LSR | ||
| 386 | * 6 : MSR | ||
| 387 | * 7 : SPR | ||
| 385 | * | 388 | * |
| 386 | * 0x08 : SP1/2 Control Reg | 389 | * 0x08 : SP1/2 Control Reg |
| 387 | */ | 390 | */ |
| @@ -1250,20 +1253,88 @@ static void mos7720_set_termios(struct tty_struct *tty, | |||
| 1250 | static int get_lsr_info(struct tty_struct *tty, | 1253 | static int get_lsr_info(struct tty_struct *tty, |
| 1251 | struct moschip_port *mos7720_port, unsigned int __user *value) | 1254 | struct moschip_port *mos7720_port, unsigned int __user *value) |
| 1252 | { | 1255 | { |
| 1253 | int count; | 1256 | struct usb_serial_port *port = tty->driver_data; |
| 1254 | unsigned int result = 0; | 1257 | unsigned int result = 0; |
| 1258 | unsigned char data = 0; | ||
| 1259 | int port_number = port->number - port->serial->minor; | ||
| 1260 | int count; | ||
| 1255 | 1261 | ||
| 1256 | count = mos7720_chars_in_buffer(tty); | 1262 | count = mos7720_chars_in_buffer(tty); |
| 1257 | if (count == 0) { | 1263 | if (count == 0) { |
| 1258 | dbg("%s -- Empty", __func__); | 1264 | send_mos_cmd(port->serial, MOS_READ, port_number, |
| 1259 | result = TIOCSER_TEMT; | 1265 | UART_LSR, &data); |
| 1266 | if ((data & (UART_LSR_TEMT | UART_LSR_THRE)) | ||
| 1267 | == (UART_LSR_TEMT | UART_LSR_THRE)) { | ||
| 1268 | dbg("%s -- Empty", __func__); | ||
| 1269 | result = TIOCSER_TEMT; | ||
| 1270 | } | ||
| 1260 | } | 1271 | } |
| 1261 | |||
| 1262 | if (copy_to_user(value, &result, sizeof(int))) | 1272 | if (copy_to_user(value, &result, sizeof(int))) |
| 1263 | return -EFAULT; | 1273 | return -EFAULT; |
| 1264 | return 0; | 1274 | return 0; |
| 1265 | } | 1275 | } |
| 1266 | 1276 | ||
| 1277 | static int mos7720_tiocmget(struct tty_struct *tty, struct file *file) | ||
| 1278 | { | ||
| 1279 | struct usb_serial_port *port = tty->driver_data; | ||
| 1280 | struct moschip_port *mos7720_port = usb_get_serial_port_data(port); | ||
| 1281 | unsigned int result = 0; | ||
| 1282 | unsigned int mcr ; | ||
| 1283 | unsigned int msr ; | ||
| 1284 | |||
| 1285 | dbg("%s - port %d", __func__, port->number); | ||
| 1286 | |||
| 1287 | mcr = mos7720_port->shadowMCR; | ||
| 1288 | msr = mos7720_port->shadowMSR; | ||
| 1289 | |||
| 1290 | result = ((mcr & UART_MCR_DTR) ? TIOCM_DTR : 0) /* 0x002 */ | ||
| 1291 | | ((mcr & UART_MCR_RTS) ? TIOCM_RTS : 0) /* 0x004 */ | ||
| 1292 | | ((msr & UART_MSR_CTS) ? TIOCM_CTS : 0) /* 0x020 */ | ||
| 1293 | | ((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) /* 0x040 */ | ||
| 1294 | | ((msr & UART_MSR_RI) ? TIOCM_RI : 0) /* 0x080 */ | ||
| 1295 | | ((msr & UART_MSR_DSR) ? TIOCM_DSR : 0); /* 0x100 */ | ||
| 1296 | |||
| 1297 | dbg("%s -- %x", __func__, result); | ||
| 1298 | |||
| 1299 | return result; | ||
| 1300 | } | ||
| 1301 | |||
| 1302 | static int mos7720_tiocmset(struct tty_struct *tty, struct file *file, | ||
| 1303 | unsigned int set, unsigned int clear) | ||
| 1304 | { | ||
| 1305 | struct usb_serial_port *port = tty->driver_data; | ||
| 1306 | struct moschip_port *mos7720_port = usb_get_serial_port_data(port); | ||
| 1307 | unsigned int mcr ; | ||
| 1308 | unsigned char lmcr; | ||
| 1309 | |||
| 1310 | dbg("%s - port %d", __func__, port->number); | ||
| 1311 | dbg("he was at tiocmget"); | ||
| 1312 | |||
| 1313 | mcr = mos7720_port->shadowMCR; | ||
| 1314 | |||
| 1315 | if (set & TIOCM_RTS) | ||
| 1316 | mcr |= UART_MCR_RTS; | ||
| 1317 | if (set & TIOCM_DTR) | ||
| 1318 | mcr |= UART_MCR_DTR; | ||
| 1319 | if (set & TIOCM_LOOP) | ||
| 1320 | mcr |= UART_MCR_LOOP; | ||
| 1321 | |||
| 1322 | if (clear & TIOCM_RTS) | ||
| 1323 | mcr &= ~UART_MCR_RTS; | ||
| 1324 | if (clear & TIOCM_DTR) | ||
| 1325 | mcr &= ~UART_MCR_DTR; | ||
| 1326 | if (clear & TIOCM_LOOP) | ||
| 1327 | mcr &= ~UART_MCR_LOOP; | ||
| 1328 | |||
| 1329 | mos7720_port->shadowMCR = mcr; | ||
| 1330 | lmcr = mos7720_port->shadowMCR; | ||
| 1331 | |||
| 1332 | send_mos_cmd(port->serial, MOS_WRITE, | ||
| 1333 | port->number - port->serial->minor, UART_MCR, &lmcr); | ||
| 1334 | |||
| 1335 | return 0; | ||
| 1336 | } | ||
| 1337 | |||
| 1267 | static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd, | 1338 | static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd, |
| 1268 | unsigned int __user *value) | 1339 | unsigned int __user *value) |
| 1269 | { | 1340 | { |
| @@ -1301,14 +1372,6 @@ static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd, | |||
| 1301 | mcr &= ~UART_MCR_LOOP; | 1372 | mcr &= ~UART_MCR_LOOP; |
| 1302 | break; | 1373 | break; |
| 1303 | 1374 | ||
| 1304 | case TIOCMSET: | ||
| 1305 | /* turn off the RTS and DTR and LOOPBACK | ||
| 1306 | * and then only turn on what was asked to */ | ||
| 1307 | mcr &= ~(UART_MCR_RTS | UART_MCR_DTR | UART_MCR_LOOP); | ||
| 1308 | mcr |= ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0); | ||
| 1309 | mcr |= ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0); | ||
| 1310 | mcr |= ((arg & TIOCM_LOOP) ? UART_MCR_LOOP : 0); | ||
| 1311 | break; | ||
| 1312 | } | 1375 | } |
| 1313 | 1376 | ||
| 1314 | mos7720_port->shadowMCR = mcr; | 1377 | mos7720_port->shadowMCR = mcr; |
| @@ -1320,28 +1383,6 @@ static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd, | |||
| 1320 | return 0; | 1383 | return 0; |
| 1321 | } | 1384 | } |
| 1322 | 1385 | ||
| 1323 | static int get_modem_info(struct moschip_port *mos7720_port, | ||
| 1324 | unsigned int __user *value) | ||
| 1325 | { | ||
| 1326 | unsigned int result = 0; | ||
| 1327 | unsigned int msr = mos7720_port->shadowMSR; | ||
| 1328 | unsigned int mcr = mos7720_port->shadowMCR; | ||
| 1329 | |||
| 1330 | result = ((mcr & UART_MCR_DTR) ? TIOCM_DTR: 0) /* 0x002 */ | ||
| 1331 | | ((mcr & UART_MCR_RTS) ? TIOCM_RTS: 0) /* 0x004 */ | ||
| 1332 | | ((msr & UART_MSR_CTS) ? TIOCM_CTS: 0) /* 0x020 */ | ||
| 1333 | | ((msr & UART_MSR_DCD) ? TIOCM_CAR: 0) /* 0x040 */ | ||
| 1334 | | ((msr & UART_MSR_RI) ? TIOCM_RI: 0) /* 0x080 */ | ||
| 1335 | | ((msr & UART_MSR_DSR) ? TIOCM_DSR: 0); /* 0x100 */ | ||
| 1336 | |||
| 1337 | |||
| 1338 | dbg("%s -- %x", __func__, result); | ||
| 1339 | |||
| 1340 | if (copy_to_user(value, &result, sizeof(int))) | ||
| 1341 | return -EFAULT; | ||
| 1342 | return 0; | ||
| 1343 | } | ||
| 1344 | |||
| 1345 | static int get_serial_info(struct moschip_port *mos7720_port, | 1386 | static int get_serial_info(struct moschip_port *mos7720_port, |
| 1346 | struct serial_struct __user *retinfo) | 1387 | struct serial_struct __user *retinfo) |
| 1347 | { | 1388 | { |
| @@ -1392,17 +1433,11 @@ static int mos7720_ioctl(struct tty_struct *tty, struct file *file, | |||
| 1392 | /* FIXME: These should be using the mode methods */ | 1433 | /* FIXME: These should be using the mode methods */ |
| 1393 | case TIOCMBIS: | 1434 | case TIOCMBIS: |
| 1394 | case TIOCMBIC: | 1435 | case TIOCMBIC: |
| 1395 | case TIOCMSET: | ||
| 1396 | dbg("%s (%d) TIOCMSET/TIOCMBIC/TIOCMSET", | 1436 | dbg("%s (%d) TIOCMSET/TIOCMBIC/TIOCMSET", |
| 1397 | __func__, port->number); | 1437 | __func__, port->number); |
| 1398 | return set_modem_info(mos7720_port, cmd, | 1438 | return set_modem_info(mos7720_port, cmd, |
| 1399 | (unsigned int __user *)arg); | 1439 | (unsigned int __user *)arg); |
| 1400 | 1440 | ||
| 1401 | case TIOCMGET: | ||
| 1402 | dbg("%s (%d) TIOCMGET", __func__, port->number); | ||
| 1403 | return get_modem_info(mos7720_port, | ||
| 1404 | (unsigned int __user *)arg); | ||
| 1405 | |||
| 1406 | case TIOCGSERIAL: | 1441 | case TIOCGSERIAL: |
| 1407 | dbg("%s (%d) TIOCGSERIAL", __func__, port->number); | 1442 | dbg("%s (%d) TIOCGSERIAL", __func__, port->number); |
| 1408 | return get_serial_info(mos7720_port, | 1443 | return get_serial_info(mos7720_port, |
| @@ -1557,6 +1592,8 @@ static struct usb_serial_driver moschip7720_2port_driver = { | |||
| 1557 | .attach = mos7720_startup, | 1592 | .attach = mos7720_startup, |
| 1558 | .release = mos7720_release, | 1593 | .release = mos7720_release, |
| 1559 | .ioctl = mos7720_ioctl, | 1594 | .ioctl = mos7720_ioctl, |
| 1595 | .tiocmget = mos7720_tiocmget, | ||
| 1596 | .tiocmset = mos7720_tiocmset, | ||
| 1560 | .set_termios = mos7720_set_termios, | 1597 | .set_termios = mos7720_set_termios, |
| 1561 | .write = mos7720_write, | 1598 | .write = mos7720_write, |
| 1562 | .write_room = mos7720_write_room, | 1599 | .write_room = mos7720_write_room, |
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c index 270009afdf77..f11abf52be7d 100644 --- a/drivers/usb/serial/mos7840.c +++ b/drivers/usb/serial/mos7840.c | |||
| @@ -824,8 +824,7 @@ static int mos7840_serial_probe(struct usb_serial *serial, | |||
| 824 | * Otherwise we return a negative error number. | 824 | * Otherwise we return a negative error number. |
| 825 | *****************************************************************************/ | 825 | *****************************************************************************/ |
| 826 | 826 | ||
| 827 | static int mos7840_open(struct tty_struct *tty, | 827 | static int mos7840_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 828 | struct usb_serial_port *port, struct file *filp) | ||
| 829 | { | 828 | { |
| 830 | int response; | 829 | int response; |
| 831 | int j; | 830 | int j; |
| @@ -2134,106 +2133,6 @@ static int mos7840_get_lsr_info(struct tty_struct *tty, | |||
| 2134 | } | 2133 | } |
| 2135 | 2134 | ||
| 2136 | /***************************************************************************** | 2135 | /***************************************************************************** |
| 2137 | * mos7840_set_modem_info | ||
| 2138 | * function to set modem info | ||
| 2139 | *****************************************************************************/ | ||
| 2140 | |||
| 2141 | /* FIXME: Should be using the model control hooks */ | ||
| 2142 | |||
| 2143 | static int mos7840_set_modem_info(struct moschip_port *mos7840_port, | ||
| 2144 | unsigned int cmd, unsigned int __user *value) | ||
| 2145 | { | ||
| 2146 | unsigned int mcr; | ||
| 2147 | unsigned int arg; | ||
| 2148 | __u16 Data; | ||
| 2149 | int status; | ||
| 2150 | struct usb_serial_port *port; | ||
| 2151 | |||
| 2152 | if (mos7840_port == NULL) | ||
| 2153 | return -1; | ||
| 2154 | |||
| 2155 | port = (struct usb_serial_port *)mos7840_port->port; | ||
| 2156 | if (mos7840_port_paranoia_check(port, __func__)) { | ||
| 2157 | dbg("%s", "Invalid port"); | ||
| 2158 | return -1; | ||
| 2159 | } | ||
| 2160 | |||
| 2161 | mcr = mos7840_port->shadowMCR; | ||
| 2162 | |||
| 2163 | if (copy_from_user(&arg, value, sizeof(int))) | ||
| 2164 | return -EFAULT; | ||
| 2165 | |||
| 2166 | switch (cmd) { | ||
| 2167 | case TIOCMBIS: | ||
| 2168 | if (arg & TIOCM_RTS) | ||
| 2169 | mcr |= MCR_RTS; | ||
| 2170 | if (arg & TIOCM_DTR) | ||
| 2171 | mcr |= MCR_RTS; | ||
| 2172 | if (arg & TIOCM_LOOP) | ||
| 2173 | mcr |= MCR_LOOPBACK; | ||
| 2174 | break; | ||
| 2175 | |||
| 2176 | case TIOCMBIC: | ||
| 2177 | if (arg & TIOCM_RTS) | ||
| 2178 | mcr &= ~MCR_RTS; | ||
| 2179 | if (arg & TIOCM_DTR) | ||
| 2180 | mcr &= ~MCR_RTS; | ||
| 2181 | if (arg & TIOCM_LOOP) | ||
| 2182 | mcr &= ~MCR_LOOPBACK; | ||
| 2183 | break; | ||
| 2184 | |||
| 2185 | case TIOCMSET: | ||
| 2186 | /* turn off the RTS and DTR and LOOPBACK | ||
| 2187 | * and then only turn on what was asked to */ | ||
| 2188 | mcr &= ~(MCR_RTS | MCR_DTR | MCR_LOOPBACK); | ||
| 2189 | mcr |= ((arg & TIOCM_RTS) ? MCR_RTS : 0); | ||
| 2190 | mcr |= ((arg & TIOCM_DTR) ? MCR_DTR : 0); | ||
| 2191 | mcr |= ((arg & TIOCM_LOOP) ? MCR_LOOPBACK : 0); | ||
| 2192 | break; | ||
| 2193 | } | ||
| 2194 | |||
| 2195 | lock_kernel(); | ||
| 2196 | mos7840_port->shadowMCR = mcr; | ||
| 2197 | |||
| 2198 | Data = mos7840_port->shadowMCR; | ||
| 2199 | status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data); | ||
| 2200 | unlock_kernel(); | ||
| 2201 | if (status < 0) { | ||
| 2202 | dbg("setting MODEM_CONTROL_REGISTER Failed"); | ||
| 2203 | return -1; | ||
| 2204 | } | ||
| 2205 | |||
| 2206 | return 0; | ||
| 2207 | } | ||
| 2208 | |||
| 2209 | /***************************************************************************** | ||
| 2210 | * mos7840_get_modem_info | ||
| 2211 | * function to get modem info | ||
| 2212 | *****************************************************************************/ | ||
| 2213 | |||
| 2214 | static int mos7840_get_modem_info(struct moschip_port *mos7840_port, | ||
| 2215 | unsigned int __user *value) | ||
| 2216 | { | ||
| 2217 | unsigned int result = 0; | ||
| 2218 | __u16 msr; | ||
| 2219 | unsigned int mcr = mos7840_port->shadowMCR; | ||
| 2220 | mos7840_get_uart_reg(mos7840_port->port, | ||
| 2221 | MODEM_STATUS_REGISTER, &msr); | ||
| 2222 | result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0) /* 0x002 */ | ||
| 2223 | |((mcr & MCR_RTS) ? TIOCM_RTS : 0) /* 0x004 */ | ||
| 2224 | |((msr & MOS7840_MSR_CTS) ? TIOCM_CTS : 0) /* 0x020 */ | ||
| 2225 | |((msr & MOS7840_MSR_CD) ? TIOCM_CAR : 0) /* 0x040 */ | ||
| 2226 | |((msr & MOS7840_MSR_RI) ? TIOCM_RI : 0) /* 0x080 */ | ||
| 2227 | |((msr & MOS7840_MSR_DSR) ? TIOCM_DSR : 0); /* 0x100 */ | ||
| 2228 | |||
| 2229 | dbg("%s -- %x", __func__, result); | ||
| 2230 | |||
| 2231 | if (copy_to_user(value, &result, sizeof(int))) | ||
| 2232 | return -EFAULT; | ||
| 2233 | return 0; | ||
| 2234 | } | ||
| 2235 | |||
| 2236 | /***************************************************************************** | ||
| 2237 | * mos7840_get_serial_info | 2136 | * mos7840_get_serial_info |
| 2238 | * function to get information about serial port | 2137 | * function to get information about serial port |
| 2239 | *****************************************************************************/ | 2138 | *****************************************************************************/ |
| @@ -2281,7 +2180,6 @@ static int mos7840_ioctl(struct tty_struct *tty, struct file *file, | |||
| 2281 | struct async_icount cnow; | 2180 | struct async_icount cnow; |
| 2282 | struct async_icount cprev; | 2181 | struct async_icount cprev; |
| 2283 | struct serial_icounter_struct icount; | 2182 | struct serial_icounter_struct icount; |
| 2284 | int mosret = 0; | ||
| 2285 | 2183 | ||
| 2286 | if (mos7840_port_paranoia_check(port, __func__)) { | 2184 | if (mos7840_port_paranoia_check(port, __func__)) { |
| 2287 | dbg("%s", "Invalid port"); | 2185 | dbg("%s", "Invalid port"); |
| @@ -2303,20 +2201,6 @@ static int mos7840_ioctl(struct tty_struct *tty, struct file *file, | |||
| 2303 | return mos7840_get_lsr_info(tty, argp); | 2201 | return mos7840_get_lsr_info(tty, argp); |
| 2304 | return 0; | 2202 | return 0; |
| 2305 | 2203 | ||
| 2306 | /* FIXME: use the modem hooks and remove this */ | ||
| 2307 | case TIOCMBIS: | ||
| 2308 | case TIOCMBIC: | ||
| 2309 | case TIOCMSET: | ||
| 2310 | dbg("%s (%d) TIOCMSET/TIOCMBIC/TIOCMSET", __func__, | ||
| 2311 | port->number); | ||
| 2312 | mosret = | ||
| 2313 | mos7840_set_modem_info(mos7840_port, cmd, argp); | ||
| 2314 | return mosret; | ||
| 2315 | |||
| 2316 | case TIOCMGET: | ||
| 2317 | dbg("%s (%d) TIOCMGET", __func__, port->number); | ||
| 2318 | return mos7840_get_modem_info(mos7840_port, argp); | ||
| 2319 | |||
| 2320 | case TIOCGSERIAL: | 2204 | case TIOCGSERIAL: |
| 2321 | dbg("%s (%d) TIOCGSERIAL", __func__, port->number); | 2205 | dbg("%s (%d) TIOCGSERIAL", __func__, port->number); |
| 2322 | return mos7840_get_serial_info(mos7840_port, argp); | 2206 | return mos7840_get_serial_info(mos7840_port, argp); |
diff --git a/drivers/usb/serial/navman.c b/drivers/usb/serial/navman.c index f5f3751a888c..5ceaa4c6be09 100644 --- a/drivers/usb/serial/navman.c +++ b/drivers/usb/serial/navman.c | |||
| @@ -80,8 +80,7 @@ exit: | |||
| 80 | __func__, result); | 80 | __func__, result); |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | static int navman_open(struct tty_struct *tty, | 83 | static int navman_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 84 | struct usb_serial_port *port, struct file *filp) | ||
| 85 | { | 84 | { |
| 86 | int result = 0; | 85 | int result = 0; |
| 87 | 86 | ||
diff --git a/drivers/usb/serial/omninet.c b/drivers/usb/serial/omninet.c index 56857ddbd70b..062265038bf0 100644 --- a/drivers/usb/serial/omninet.c +++ b/drivers/usb/serial/omninet.c | |||
| @@ -64,8 +64,7 @@ static int debug; | |||
| 64 | #define BT_IGNITIONPRO_ID 0x2000 | 64 | #define BT_IGNITIONPRO_ID 0x2000 |
| 65 | 65 | ||
| 66 | /* function prototypes */ | 66 | /* function prototypes */ |
| 67 | static int omninet_open(struct tty_struct *tty, struct usb_serial_port *port, | 67 | static int omninet_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 68 | struct file *filp); | ||
| 69 | static void omninet_close(struct usb_serial_port *port); | 68 | static void omninet_close(struct usb_serial_port *port); |
| 70 | static void omninet_read_bulk_callback(struct urb *urb); | 69 | static void omninet_read_bulk_callback(struct urb *urb); |
| 71 | static void omninet_write_bulk_callback(struct urb *urb); | 70 | static void omninet_write_bulk_callback(struct urb *urb); |
| @@ -163,8 +162,7 @@ static int omninet_attach(struct usb_serial *serial) | |||
| 163 | return 0; | 162 | return 0; |
| 164 | } | 163 | } |
| 165 | 164 | ||
| 166 | static int omninet_open(struct tty_struct *tty, | 165 | static int omninet_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 167 | struct usb_serial_port *port, struct file *filp) | ||
| 168 | { | 166 | { |
| 169 | struct usb_serial *serial = port->serial; | 167 | struct usb_serial *serial = port->serial; |
| 170 | struct usb_serial_port *wport; | 168 | struct usb_serial_port *wport; |
diff --git a/drivers/usb/serial/opticon.c b/drivers/usb/serial/opticon.c index 336bba79ad32..1085a577c5c1 100644 --- a/drivers/usb/serial/opticon.c +++ b/drivers/usb/serial/opticon.c | |||
| @@ -144,8 +144,7 @@ exit: | |||
| 144 | spin_unlock(&priv->lock); | 144 | spin_unlock(&priv->lock); |
| 145 | } | 145 | } |
| 146 | 146 | ||
| 147 | static int opticon_open(struct tty_struct *tty, struct usb_serial_port *port, | 147 | static int opticon_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 148 | struct file *filp) | ||
| 149 | { | 148 | { |
| 150 | struct opticon_private *priv = usb_get_serial_data(port->serial); | 149 | struct opticon_private *priv = usb_get_serial_data(port->serial); |
| 151 | unsigned long flags; | 150 | unsigned long flags; |
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index c784ddbe7b61..fe47051dbef2 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c | |||
| @@ -45,8 +45,7 @@ | |||
| 45 | /* Function prototypes */ | 45 | /* Function prototypes */ |
| 46 | static int option_probe(struct usb_serial *serial, | 46 | static int option_probe(struct usb_serial *serial, |
| 47 | const struct usb_device_id *id); | 47 | const struct usb_device_id *id); |
| 48 | static int option_open(struct tty_struct *tty, struct usb_serial_port *port, | 48 | static int option_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 49 | struct file *filp); | ||
| 50 | static void option_close(struct usb_serial_port *port); | 49 | static void option_close(struct usb_serial_port *port); |
| 51 | static void option_dtr_rts(struct usb_serial_port *port, int on); | 50 | static void option_dtr_rts(struct usb_serial_port *port, int on); |
| 52 | 51 | ||
| @@ -961,8 +960,7 @@ static int option_chars_in_buffer(struct tty_struct *tty) | |||
| 961 | return data_len; | 960 | return data_len; |
| 962 | } | 961 | } |
| 963 | 962 | ||
| 964 | static int option_open(struct tty_struct *tty, | 963 | static int option_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 965 | struct usb_serial_port *port, struct file *filp) | ||
| 966 | { | 964 | { |
| 967 | struct option_port_private *portdata; | 965 | struct option_port_private *portdata; |
| 968 | int i, err; | 966 | int i, err; |
diff --git a/drivers/usb/serial/oti6858.c b/drivers/usb/serial/oti6858.c index 3cece27325e7..0f4a70ce3823 100644 --- a/drivers/usb/serial/oti6858.c +++ b/drivers/usb/serial/oti6858.c | |||
| @@ -141,11 +141,11 @@ struct oti6858_control_pkt { | |||
| 141 | && ((a)->frame_fmt == (priv)->pending_setup.frame_fmt)) | 141 | && ((a)->frame_fmt == (priv)->pending_setup.frame_fmt)) |
| 142 | 142 | ||
| 143 | /* function prototypes */ | 143 | /* function prototypes */ |
| 144 | static int oti6858_open(struct tty_struct *tty, | 144 | static int oti6858_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 145 | struct usb_serial_port *port, struct file *filp); | ||
| 146 | static void oti6858_close(struct usb_serial_port *port); | 145 | static void oti6858_close(struct usb_serial_port *port); |
| 147 | static void oti6858_set_termios(struct tty_struct *tty, | 146 | static void oti6858_set_termios(struct tty_struct *tty, |
| 148 | struct usb_serial_port *port, struct ktermios *old); | 147 | struct usb_serial_port *port, struct ktermios *old); |
| 148 | static void oti6858_init_termios(struct tty_struct *tty); | ||
| 149 | static int oti6858_ioctl(struct tty_struct *tty, struct file *file, | 149 | static int oti6858_ioctl(struct tty_struct *tty, struct file *file, |
| 150 | unsigned int cmd, unsigned long arg); | 150 | unsigned int cmd, unsigned long arg); |
| 151 | static void oti6858_read_int_callback(struct urb *urb); | 151 | static void oti6858_read_int_callback(struct urb *urb); |
| @@ -186,6 +186,7 @@ static struct usb_serial_driver oti6858_device = { | |||
| 186 | .write = oti6858_write, | 186 | .write = oti6858_write, |
| 187 | .ioctl = oti6858_ioctl, | 187 | .ioctl = oti6858_ioctl, |
| 188 | .set_termios = oti6858_set_termios, | 188 | .set_termios = oti6858_set_termios, |
| 189 | .init_termios = oti6858_init_termios, | ||
| 189 | .tiocmget = oti6858_tiocmget, | 190 | .tiocmget = oti6858_tiocmget, |
| 190 | .tiocmset = oti6858_tiocmset, | 191 | .tiocmset = oti6858_tiocmset, |
| 191 | .read_bulk_callback = oti6858_read_bulk_callback, | 192 | .read_bulk_callback = oti6858_read_bulk_callback, |
| @@ -206,7 +207,6 @@ struct oti6858_private { | |||
| 206 | struct { | 207 | struct { |
| 207 | u8 read_urb_in_use; | 208 | u8 read_urb_in_use; |
| 208 | u8 write_urb_in_use; | 209 | u8 write_urb_in_use; |
| 209 | u8 termios_initialized; | ||
| 210 | } flags; | 210 | } flags; |
| 211 | struct delayed_work delayed_write_work; | 211 | struct delayed_work delayed_write_work; |
| 212 | 212 | ||
| @@ -447,6 +447,14 @@ static int oti6858_chars_in_buffer(struct tty_struct *tty) | |||
| 447 | return chars; | 447 | return chars; |
| 448 | } | 448 | } |
| 449 | 449 | ||
| 450 | static void oti6858_init_termios(struct tty_struct *tty) | ||
| 451 | { | ||
| 452 | *(tty->termios) = tty_std_termios; | ||
| 453 | tty->termios->c_cflag = B38400 | CS8 | CREAD | HUPCL | CLOCAL; | ||
| 454 | tty->termios->c_ispeed = 38400; | ||
| 455 | tty->termios->c_ospeed = 38400; | ||
| 456 | } | ||
| 457 | |||
| 450 | static void oti6858_set_termios(struct tty_struct *tty, | 458 | static void oti6858_set_termios(struct tty_struct *tty, |
| 451 | struct usb_serial_port *port, struct ktermios *old_termios) | 459 | struct usb_serial_port *port, struct ktermios *old_termios) |
| 452 | { | 460 | { |
| @@ -464,16 +472,6 @@ static void oti6858_set_termios(struct tty_struct *tty, | |||
| 464 | return; | 472 | return; |
| 465 | } | 473 | } |
| 466 | 474 | ||
| 467 | spin_lock_irqsave(&priv->lock, flags); | ||
| 468 | if (!priv->flags.termios_initialized) { | ||
| 469 | *(tty->termios) = tty_std_termios; | ||
| 470 | tty->termios->c_cflag = B38400 | CS8 | CREAD | HUPCL | CLOCAL; | ||
| 471 | tty->termios->c_ispeed = 38400; | ||
| 472 | tty->termios->c_ospeed = 38400; | ||
| 473 | priv->flags.termios_initialized = 1; | ||
| 474 | } | ||
| 475 | spin_unlock_irqrestore(&priv->lock, flags); | ||
| 476 | |||
| 477 | cflag = tty->termios->c_cflag; | 475 | cflag = tty->termios->c_cflag; |
| 478 | 476 | ||
| 479 | spin_lock_irqsave(&priv->lock, flags); | 477 | spin_lock_irqsave(&priv->lock, flags); |
| @@ -566,8 +564,7 @@ static void oti6858_set_termios(struct tty_struct *tty, | |||
| 566 | spin_unlock_irqrestore(&priv->lock, flags); | 564 | spin_unlock_irqrestore(&priv->lock, flags); |
| 567 | } | 565 | } |
| 568 | 566 | ||
| 569 | static int oti6858_open(struct tty_struct *tty, | 567 | static int oti6858_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 570 | struct usb_serial_port *port, struct file *filp) | ||
| 571 | { | 568 | { |
| 572 | struct oti6858_private *priv = usb_get_serial_port_data(port); | 569 | struct oti6858_private *priv = usb_get_serial_port_data(port); |
| 573 | struct ktermios tmp_termios; | 570 | struct ktermios tmp_termios; |
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c index 3e86815b2705..a63ea99936f7 100644 --- a/drivers/usb/serial/pl2303.c +++ b/drivers/usb/serial/pl2303.c | |||
| @@ -691,8 +691,7 @@ static void pl2303_close(struct usb_serial_port *port) | |||
| 691 | 691 | ||
| 692 | } | 692 | } |
| 693 | 693 | ||
| 694 | static int pl2303_open(struct tty_struct *tty, | 694 | static int pl2303_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 695 | struct usb_serial_port *port, struct file *filp) | ||
| 696 | { | 695 | { |
| 697 | struct ktermios tmp_termios; | 696 | struct ktermios tmp_termios; |
| 698 | struct usb_serial *serial = port->serial; | 697 | struct usb_serial *serial = port->serial; |
| @@ -714,8 +713,6 @@ static int pl2303_open(struct tty_struct *tty, | |||
| 714 | if (tty) | 713 | if (tty) |
| 715 | pl2303_set_termios(tty, port, &tmp_termios); | 714 | pl2303_set_termios(tty, port, &tmp_termios); |
| 716 | 715 | ||
| 717 | /* FIXME: need to assert RTS and DTR if CRTSCTS off */ | ||
| 718 | |||
| 719 | dbg("%s - submitting read urb", __func__); | 716 | dbg("%s - submitting read urb", __func__); |
| 720 | port->read_urb->dev = serial->dev; | 717 | port->read_urb->dev = serial->dev; |
| 721 | result = usb_submit_urb(port->read_urb, GFP_KERNEL); | 718 | result = usb_submit_urb(port->read_urb, GFP_KERNEL); |
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c index f48d05e0acc1..55391bbe1230 100644 --- a/drivers/usb/serial/sierra.c +++ b/drivers/usb/serial/sierra.c | |||
| @@ -734,8 +734,7 @@ static void sierra_close(struct usb_serial_port *port) | |||
| 734 | } | 734 | } |
| 735 | } | 735 | } |
| 736 | 736 | ||
| 737 | static int sierra_open(struct tty_struct *tty, | 737 | static int sierra_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 738 | struct usb_serial_port *port, struct file *filp) | ||
| 739 | { | 738 | { |
| 740 | struct sierra_port_private *portdata; | 739 | struct sierra_port_private *portdata; |
| 741 | struct usb_serial *serial = port->serial; | 740 | struct usb_serial *serial = port->serial; |
diff --git a/drivers/usb/serial/spcp8x5.c b/drivers/usb/serial/spcp8x5.c index 3c249d8e8b8e..61e7c40b94fb 100644 --- a/drivers/usb/serial/spcp8x5.c +++ b/drivers/usb/serial/spcp8x5.c | |||
| @@ -299,7 +299,6 @@ struct spcp8x5_private { | |||
| 299 | wait_queue_head_t delta_msr_wait; | 299 | wait_queue_head_t delta_msr_wait; |
| 300 | u8 line_control; | 300 | u8 line_control; |
| 301 | u8 line_status; | 301 | u8 line_status; |
| 302 | u8 termios_initialized; | ||
| 303 | }; | 302 | }; |
| 304 | 303 | ||
| 305 | /* desc : when device plug in,this function would be called. | 304 | /* desc : when device plug in,this function would be called. |
| @@ -498,6 +497,15 @@ static void spcp8x5_close(struct usb_serial_port *port) | |||
| 498 | dev_dbg(&port->dev, "usb_unlink_urb(read_urb) = %d\n", result); | 497 | dev_dbg(&port->dev, "usb_unlink_urb(read_urb) = %d\n", result); |
| 499 | } | 498 | } |
| 500 | 499 | ||
| 500 | static void spcp8x5_init_termios(struct tty_struct *tty) | ||
| 501 | { | ||
| 502 | /* for the 1st time call this function */ | ||
| 503 | *(tty->termios) = tty_std_termios; | ||
| 504 | tty->termios->c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL; | ||
| 505 | tty->termios->c_ispeed = 115200; | ||
| 506 | tty->termios->c_ospeed = 115200; | ||
| 507 | } | ||
| 508 | |||
| 501 | /* set the serial param for transfer. we should check if we really need to | 509 | /* set the serial param for transfer. we should check if we really need to |
| 502 | * transfer. if we set flow control we should do this too. */ | 510 | * transfer. if we set flow control we should do this too. */ |
| 503 | static void spcp8x5_set_termios(struct tty_struct *tty, | 511 | static void spcp8x5_set_termios(struct tty_struct *tty, |
| @@ -514,16 +522,6 @@ static void spcp8x5_set_termios(struct tty_struct *tty, | |||
| 514 | int i; | 522 | int i; |
| 515 | u8 control; | 523 | u8 control; |
| 516 | 524 | ||
| 517 | /* for the 1st time call this function */ | ||
| 518 | spin_lock_irqsave(&priv->lock, flags); | ||
| 519 | if (!priv->termios_initialized) { | ||
| 520 | *(tty->termios) = tty_std_termios; | ||
| 521 | tty->termios->c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL; | ||
| 522 | tty->termios->c_ispeed = 115200; | ||
| 523 | tty->termios->c_ospeed = 115200; | ||
| 524 | priv->termios_initialized = 1; | ||
| 525 | } | ||
| 526 | spin_unlock_irqrestore(&priv->lock, flags); | ||
| 527 | 525 | ||
| 528 | /* check that they really want us to change something */ | 526 | /* check that they really want us to change something */ |
| 529 | if (!tty_termios_hw_change(tty->termios, old_termios)) | 527 | if (!tty_termios_hw_change(tty->termios, old_termios)) |
| @@ -623,8 +621,7 @@ static void spcp8x5_set_termios(struct tty_struct *tty, | |||
| 623 | 621 | ||
| 624 | /* open the serial port. do some usb system call. set termios and get the line | 622 | /* open the serial port. do some usb system call. set termios and get the line |
| 625 | * status of the device. then submit the read urb */ | 623 | * status of the device. then submit the read urb */ |
| 626 | static int spcp8x5_open(struct tty_struct *tty, | 624 | static int spcp8x5_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 627 | struct usb_serial_port *port, struct file *filp) | ||
| 628 | { | 625 | { |
| 629 | struct ktermios tmp_termios; | 626 | struct ktermios tmp_termios; |
| 630 | struct usb_serial *serial = port->serial; | 627 | struct usb_serial *serial = port->serial; |
| @@ -658,8 +655,6 @@ static int spcp8x5_open(struct tty_struct *tty, | |||
| 658 | priv->line_status = status & 0xf0 ; | 655 | priv->line_status = status & 0xf0 ; |
| 659 | spin_unlock_irqrestore(&priv->lock, flags); | 656 | spin_unlock_irqrestore(&priv->lock, flags); |
| 660 | 657 | ||
| 661 | /* FIXME: need to assert RTS and DTR if CRTSCTS off */ | ||
| 662 | |||
| 663 | dbg("%s - submitting read urb", __func__); | 658 | dbg("%s - submitting read urb", __func__); |
| 664 | port->read_urb->dev = serial->dev; | 659 | port->read_urb->dev = serial->dev; |
| 665 | ret = usb_submit_urb(port->read_urb, GFP_KERNEL); | 660 | ret = usb_submit_urb(port->read_urb, GFP_KERNEL); |
| @@ -1011,6 +1006,7 @@ static struct usb_serial_driver spcp8x5_device = { | |||
| 1011 | .carrier_raised = spcp8x5_carrier_raised, | 1006 | .carrier_raised = spcp8x5_carrier_raised, |
| 1012 | .write = spcp8x5_write, | 1007 | .write = spcp8x5_write, |
| 1013 | .set_termios = spcp8x5_set_termios, | 1008 | .set_termios = spcp8x5_set_termios, |
| 1009 | .init_termios = spcp8x5_init_termios, | ||
| 1014 | .ioctl = spcp8x5_ioctl, | 1010 | .ioctl = spcp8x5_ioctl, |
| 1015 | .tiocmget = spcp8x5_tiocmget, | 1011 | .tiocmget = spcp8x5_tiocmget, |
| 1016 | .tiocmset = spcp8x5_tiocmset, | 1012 | .tiocmset = spcp8x5_tiocmset, |
diff --git a/drivers/usb/serial/symbolserial.c b/drivers/usb/serial/symbolserial.c index 6157fac9366b..cb7e95f9fcbf 100644 --- a/drivers/usb/serial/symbolserial.c +++ b/drivers/usb/serial/symbolserial.c | |||
| @@ -124,8 +124,7 @@ exit: | |||
| 124 | spin_unlock(&priv->lock); | 124 | spin_unlock(&priv->lock); |
| 125 | } | 125 | } |
| 126 | 126 | ||
| 127 | static int symbol_open(struct tty_struct *tty, struct usb_serial_port *port, | 127 | static int symbol_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 128 | struct file *filp) | ||
| 129 | { | 128 | { |
| 130 | struct symbol_private *priv = usb_get_serial_data(port->serial); | 129 | struct symbol_private *priv = usb_get_serial_data(port->serial); |
| 131 | unsigned long flags; | 130 | unsigned long flags; |
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c index 3bc609fe2242..1e9dc8821698 100644 --- a/drivers/usb/serial/ti_usb_3410_5052.c +++ b/drivers/usb/serial/ti_usb_3410_5052.c | |||
| @@ -98,8 +98,7 @@ struct ti_device { | |||
| 98 | 98 | ||
| 99 | static int ti_startup(struct usb_serial *serial); | 99 | static int ti_startup(struct usb_serial *serial); |
| 100 | static void ti_release(struct usb_serial *serial); | 100 | static void ti_release(struct usb_serial *serial); |
| 101 | static int ti_open(struct tty_struct *tty, struct usb_serial_port *port, | 101 | static int ti_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 102 | struct file *file); | ||
| 103 | static void ti_close(struct usb_serial_port *port); | 102 | static void ti_close(struct usb_serial_port *port); |
| 104 | static int ti_write(struct tty_struct *tty, struct usb_serial_port *port, | 103 | static int ti_write(struct tty_struct *tty, struct usb_serial_port *port, |
| 105 | const unsigned char *data, int count); | 104 | const unsigned char *data, int count); |
| @@ -492,8 +491,7 @@ static void ti_release(struct usb_serial *serial) | |||
| 492 | } | 491 | } |
| 493 | 492 | ||
| 494 | 493 | ||
| 495 | static int ti_open(struct tty_struct *tty, | 494 | static int ti_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 496 | struct usb_serial_port *port, struct file *file) | ||
| 497 | { | 495 | { |
| 498 | struct ti_port *tport = usb_get_serial_port_data(port); | 496 | struct ti_port *tport = usb_get_serial_port_data(port); |
| 499 | struct ti_device *tdev; | 497 | struct ti_device *tdev; |
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c index 99188c92068b..9d7ca4868d37 100644 --- a/drivers/usb/serial/usb-serial.c +++ b/drivers/usb/serial/usb-serial.c | |||
| @@ -43,8 +43,6 @@ | |||
| 43 | #define DRIVER_AUTHOR "Greg Kroah-Hartman, greg@kroah.com, http://www.kroah.com/linux/" | 43 | #define DRIVER_AUTHOR "Greg Kroah-Hartman, greg@kroah.com, http://www.kroah.com/linux/" |
| 44 | #define DRIVER_DESC "USB Serial Driver core" | 44 | #define DRIVER_DESC "USB Serial Driver core" |
| 45 | 45 | ||
| 46 | static void port_free(struct usb_serial_port *port); | ||
| 47 | |||
| 48 | /* Driver structure we register with the USB core */ | 46 | /* Driver structure we register with the USB core */ |
| 49 | static struct usb_driver usb_serial_driver = { | 47 | static struct usb_driver usb_serial_driver = { |
| 50 | .name = "usbserial", | 48 | .name = "usbserial", |
| @@ -68,6 +66,11 @@ static struct usb_serial *serial_table[SERIAL_TTY_MINORS]; | |||
| 68 | static DEFINE_MUTEX(table_lock); | 66 | static DEFINE_MUTEX(table_lock); |
| 69 | static LIST_HEAD(usb_serial_driver_list); | 67 | static LIST_HEAD(usb_serial_driver_list); |
| 70 | 68 | ||
| 69 | /* | ||
| 70 | * Look up the serial structure. If it is found and it hasn't been | ||
| 71 | * disconnected, return with its disc_mutex held and its refcount | ||
| 72 | * incremented. Otherwise return NULL. | ||
| 73 | */ | ||
| 71 | struct usb_serial *usb_serial_get_by_index(unsigned index) | 74 | struct usb_serial *usb_serial_get_by_index(unsigned index) |
| 72 | { | 75 | { |
| 73 | struct usb_serial *serial; | 76 | struct usb_serial *serial; |
| @@ -75,8 +78,15 @@ struct usb_serial *usb_serial_get_by_index(unsigned index) | |||
| 75 | mutex_lock(&table_lock); | 78 | mutex_lock(&table_lock); |
| 76 | serial = serial_table[index]; | 79 | serial = serial_table[index]; |
| 77 | 80 | ||
| 78 | if (serial) | 81 | if (serial) { |
| 79 | kref_get(&serial->kref); | 82 | mutex_lock(&serial->disc_mutex); |
| 83 | if (serial->disconnected) { | ||
| 84 | mutex_unlock(&serial->disc_mutex); | ||
| 85 | serial = NULL; | ||
| 86 | } else { | ||
| 87 | kref_get(&serial->kref); | ||
| 88 | } | ||
| 89 | } | ||
| 80 | mutex_unlock(&table_lock); | 90 | mutex_unlock(&table_lock); |
| 81 | return serial; | 91 | return serial; |
| 82 | } | 92 | } |
| @@ -125,8 +135,10 @@ static void return_serial(struct usb_serial *serial) | |||
| 125 | 135 | ||
| 126 | dbg("%s", __func__); | 136 | dbg("%s", __func__); |
| 127 | 137 | ||
| 138 | mutex_lock(&table_lock); | ||
| 128 | for (i = 0; i < serial->num_ports; ++i) | 139 | for (i = 0; i < serial->num_ports; ++i) |
| 129 | serial_table[serial->minor + i] = NULL; | 140 | serial_table[serial->minor + i] = NULL; |
| 141 | mutex_unlock(&table_lock); | ||
| 130 | } | 142 | } |
| 131 | 143 | ||
| 132 | static void destroy_serial(struct kref *kref) | 144 | static void destroy_serial(struct kref *kref) |
| @@ -145,161 +157,157 @@ static void destroy_serial(struct kref *kref) | |||
| 145 | 157 | ||
| 146 | serial->type->release(serial); | 158 | serial->type->release(serial); |
| 147 | 159 | ||
| 148 | for (i = 0; i < serial->num_ports; ++i) { | 160 | /* Now that nothing is using the ports, they can be freed */ |
| 161 | for (i = 0; i < serial->num_port_pointers; ++i) { | ||
| 149 | port = serial->port[i]; | 162 | port = serial->port[i]; |
| 150 | if (port) | 163 | if (port) { |
| 164 | port->serial = NULL; | ||
| 151 | put_device(&port->dev); | 165 | put_device(&port->dev); |
| 152 | } | ||
| 153 | |||
| 154 | /* If this is a "fake" port, we have to clean it up here, as it will | ||
| 155 | * not get cleaned up in port_release() as it was never registered with | ||
| 156 | * the driver core */ | ||
| 157 | if (serial->num_ports < serial->num_port_pointers) { | ||
| 158 | for (i = serial->num_ports; | ||
| 159 | i < serial->num_port_pointers; ++i) { | ||
| 160 | port = serial->port[i]; | ||
| 161 | if (port) | ||
| 162 | port_free(port); | ||
| 163 | } | 166 | } |
| 164 | } | 167 | } |
| 165 | 168 | ||
| 166 | usb_put_dev(serial->dev); | 169 | usb_put_dev(serial->dev); |
| 167 | |||
| 168 | /* free up any memory that we allocated */ | ||
| 169 | kfree(serial); | 170 | kfree(serial); |
| 170 | } | 171 | } |
| 171 | 172 | ||
| 172 | void usb_serial_put(struct usb_serial *serial) | 173 | void usb_serial_put(struct usb_serial *serial) |
| 173 | { | 174 | { |
| 174 | mutex_lock(&table_lock); | ||
| 175 | kref_put(&serial->kref, destroy_serial); | 175 | kref_put(&serial->kref, destroy_serial); |
| 176 | mutex_unlock(&table_lock); | ||
| 177 | } | 176 | } |
| 178 | 177 | ||
| 179 | /***************************************************************************** | 178 | /***************************************************************************** |
| 180 | * Driver tty interface functions | 179 | * Driver tty interface functions |
| 181 | *****************************************************************************/ | 180 | *****************************************************************************/ |
| 182 | static int serial_open (struct tty_struct *tty, struct file *filp) | 181 | |
| 182 | /** | ||
| 183 | * serial_install - install tty | ||
| 184 | * @driver: the driver (USB in our case) | ||
| 185 | * @tty: the tty being created | ||
| 186 | * | ||
| 187 | * Create the termios objects for this tty. We use the default | ||
| 188 | * USB serial settings but permit them to be overridden by | ||
| 189 | * serial->type->init_termios. | ||
| 190 | * | ||
| 191 | * This is the first place a new tty gets used. Hence this is where we | ||
| 192 | * acquire references to the usb_serial structure and the driver module, | ||
| 193 | * where we store a pointer to the port, and where we do an autoresume. | ||
| 194 | * All these actions are reversed in serial_release(). | ||
| 195 | */ | ||
| 196 | static int serial_install(struct tty_driver *driver, struct tty_struct *tty) | ||
| 183 | { | 197 | { |
| 198 | int idx = tty->index; | ||
| 184 | struct usb_serial *serial; | 199 | struct usb_serial *serial; |
| 185 | struct usb_serial_port *port; | 200 | struct usb_serial_port *port; |
| 186 | unsigned int portNumber; | 201 | int retval = -ENODEV; |
| 187 | int retval = 0; | ||
| 188 | int first = 0; | ||
| 189 | 202 | ||
| 190 | dbg("%s", __func__); | 203 | dbg("%s", __func__); |
| 191 | 204 | ||
| 192 | /* get the serial object associated with this tty pointer */ | 205 | serial = usb_serial_get_by_index(idx); |
| 193 | serial = usb_serial_get_by_index(tty->index); | 206 | if (!serial) |
| 194 | if (!serial) { | 207 | return retval; |
| 195 | tty->driver_data = NULL; | ||
| 196 | return -ENODEV; | ||
| 197 | } | ||
| 198 | 208 | ||
| 199 | mutex_lock(&serial->disc_mutex); | 209 | port = serial->port[idx - serial->minor]; |
| 200 | portNumber = tty->index - serial->minor; | 210 | if (!port) |
| 201 | port = serial->port[portNumber]; | 211 | goto error_no_port; |
| 202 | if (!port || serial->disconnected) | 212 | if (!try_module_get(serial->type->driver.owner)) |
| 203 | retval = -ENODEV; | 213 | goto error_module_get; |
| 204 | else | 214 | |
| 205 | get_device(&port->dev); | 215 | /* perform the standard setup */ |
| 206 | /* | 216 | retval = tty_init_termios(tty); |
| 207 | * Note: Our locking order requirement does not allow port->mutex | ||
| 208 | * to be acquired while serial->disc_mutex is held. | ||
| 209 | */ | ||
| 210 | mutex_unlock(&serial->disc_mutex); | ||
| 211 | if (retval) | 217 | if (retval) |
| 212 | goto bailout_serial_put; | 218 | goto error_init_termios; |
| 213 | 219 | ||
| 214 | if (mutex_lock_interruptible(&port->mutex)) { | 220 | retval = usb_autopm_get_interface(serial->interface); |
| 215 | retval = -ERESTARTSYS; | 221 | if (retval) |
| 216 | goto bailout_port_put; | 222 | goto error_get_interface; |
| 217 | } | 223 | |
| 224 | mutex_unlock(&serial->disc_mutex); | ||
| 218 | 225 | ||
| 219 | ++port->port.count; | 226 | /* allow the driver to update the settings */ |
| 227 | if (serial->type->init_termios) | ||
| 228 | serial->type->init_termios(tty); | ||
| 220 | 229 | ||
| 221 | /* set up our port structure making the tty driver | ||
| 222 | * remember our port object, and us it */ | ||
| 223 | tty->driver_data = port; | 230 | tty->driver_data = port; |
| 224 | tty_port_tty_set(&port->port, tty); | ||
| 225 | 231 | ||
| 226 | /* If the console is attached, the device is already open */ | 232 | /* Final install (we use the default method) */ |
| 227 | if (port->port.count == 1 && !port->console) { | 233 | tty_driver_kref_get(driver); |
| 228 | first = 1; | 234 | tty->count++; |
| 229 | /* lock this module before we call it | 235 | driver->ttys[idx] = tty; |
| 230 | * this may fail, which means we must bail out, | 236 | return retval; |
| 231 | * safe because we are called with BKL held */ | ||
| 232 | if (!try_module_get(serial->type->driver.owner)) { | ||
| 233 | retval = -ENODEV; | ||
| 234 | goto bailout_mutex_unlock; | ||
| 235 | } | ||
| 236 | 237 | ||
| 238 | error_get_interface: | ||
| 239 | error_init_termios: | ||
| 240 | module_put(serial->type->driver.owner); | ||
| 241 | error_module_get: | ||
| 242 | error_no_port: | ||
| 243 | usb_serial_put(serial); | ||
| 244 | mutex_unlock(&serial->disc_mutex); | ||
| 245 | return retval; | ||
| 246 | } | ||
| 247 | |||
| 248 | static int serial_open(struct tty_struct *tty, struct file *filp) | ||
| 249 | { | ||
| 250 | struct usb_serial_port *port = tty->driver_data; | ||
| 251 | struct usb_serial *serial = port->serial; | ||
| 252 | int retval; | ||
| 253 | |||
| 254 | dbg("%s - port %d", __func__, port->number); | ||
| 255 | |||
| 256 | spin_lock_irq(&port->port.lock); | ||
| 257 | if (!tty_hung_up_p(filp)) | ||
| 258 | ++port->port.count; | ||
| 259 | spin_unlock_irq(&port->port.lock); | ||
| 260 | tty_port_tty_set(&port->port, tty); | ||
| 261 | |||
| 262 | /* Do the device-specific open only if the hardware isn't | ||
| 263 | * already initialized. | ||
| 264 | */ | ||
| 265 | if (!test_bit(ASYNCB_INITIALIZED, &port->port.flags)) { | ||
| 266 | if (mutex_lock_interruptible(&port->mutex)) | ||
| 267 | return -ERESTARTSYS; | ||
| 237 | mutex_lock(&serial->disc_mutex); | 268 | mutex_lock(&serial->disc_mutex); |
| 238 | if (serial->disconnected) | 269 | if (serial->disconnected) |
| 239 | retval = -ENODEV; | 270 | retval = -ENODEV; |
| 240 | else | 271 | else |
| 241 | retval = usb_autopm_get_interface(serial->interface); | 272 | retval = port->serial->type->open(tty, port); |
| 242 | if (retval) | ||
| 243 | goto bailout_module_put; | ||
| 244 | |||
| 245 | /* only call the device specific open if this | ||
| 246 | * is the first time the port is opened */ | ||
| 247 | retval = serial->type->open(tty, port, filp); | ||
| 248 | if (retval) | ||
| 249 | goto bailout_interface_put; | ||
| 250 | mutex_unlock(&serial->disc_mutex); | 273 | mutex_unlock(&serial->disc_mutex); |
| 274 | mutex_unlock(&port->mutex); | ||
| 275 | if (retval) | ||
| 276 | return retval; | ||
| 251 | set_bit(ASYNCB_INITIALIZED, &port->port.flags); | 277 | set_bit(ASYNCB_INITIALIZED, &port->port.flags); |
| 252 | } | 278 | } |
| 253 | mutex_unlock(&port->mutex); | 279 | |
| 254 | /* Now do the correct tty layer semantics */ | 280 | /* Now do the correct tty layer semantics */ |
| 255 | retval = tty_port_block_til_ready(&port->port, tty, filp); | 281 | retval = tty_port_block_til_ready(&port->port, tty, filp); |
| 256 | if (retval == 0) { | ||
| 257 | if (!first) | ||
| 258 | usb_serial_put(serial); | ||
| 259 | return 0; | ||
| 260 | } | ||
| 261 | mutex_lock(&port->mutex); | ||
| 262 | if (first == 0) | ||
| 263 | goto bailout_mutex_unlock; | ||
| 264 | /* Undo the initial port actions */ | ||
| 265 | mutex_lock(&serial->disc_mutex); | ||
| 266 | bailout_interface_put: | ||
| 267 | usb_autopm_put_interface(serial->interface); | ||
| 268 | bailout_module_put: | ||
| 269 | mutex_unlock(&serial->disc_mutex); | ||
| 270 | module_put(serial->type->driver.owner); | ||
| 271 | bailout_mutex_unlock: | ||
| 272 | port->port.count = 0; | ||
| 273 | tty->driver_data = NULL; | ||
| 274 | tty_port_tty_set(&port->port, NULL); | ||
| 275 | mutex_unlock(&port->mutex); | ||
| 276 | bailout_port_put: | ||
| 277 | put_device(&port->dev); | ||
| 278 | bailout_serial_put: | ||
| 279 | usb_serial_put(serial); | ||
| 280 | return retval; | 282 | return retval; |
| 281 | } | 283 | } |
| 282 | 284 | ||
| 283 | /** | 285 | /** |
| 284 | * serial_do_down - shut down hardware | 286 | * serial_down - shut down hardware |
| 285 | * @port: port to shut down | 287 | * @port: port to shut down |
| 286 | * | ||
| 287 | * Shut down a USB port unless it is the console. We never shut down the | ||
| 288 | * console hardware as it will always be in use. | ||
| 289 | * | 288 | * |
| 290 | * Don't free any resources at this point | 289 | * Shut down a USB serial port unless it is the console. We never |
| 290 | * shut down the console hardware as it will always be in use. | ||
| 291 | */ | 291 | */ |
| 292 | static void serial_do_down(struct usb_serial_port *port) | 292 | static void serial_down(struct usb_serial_port *port) |
| 293 | { | 293 | { |
| 294 | struct usb_serial_driver *drv = port->serial->type; | 294 | struct usb_serial_driver *drv = port->serial->type; |
| 295 | struct usb_serial *serial; | 295 | struct usb_serial *serial; |
| 296 | struct module *owner; | 296 | struct module *owner; |
| 297 | 297 | ||
| 298 | /* The console is magical, do not hang up the console hardware | 298 | /* |
| 299 | or there will be tears */ | 299 | * The console is magical. Do not hang up the console hardware |
| 300 | * or there will be tears. | ||
| 301 | */ | ||
| 300 | if (port->console) | 302 | if (port->console) |
| 301 | return; | 303 | return; |
| 302 | 304 | ||
| 305 | /* Don't call the close method if the hardware hasn't been | ||
| 306 | * initialized. | ||
| 307 | */ | ||
| 308 | if (!test_and_clear_bit(ASYNCB_INITIALIZED, &port->port.flags)) | ||
| 309 | return; | ||
| 310 | |||
| 303 | mutex_lock(&port->mutex); | 311 | mutex_lock(&port->mutex); |
| 304 | serial = port->serial; | 312 | serial = port->serial; |
| 305 | owner = serial->type->driver.owner; | 313 | owner = serial->type->driver.owner; |
| @@ -310,79 +318,69 @@ static void serial_do_down(struct usb_serial_port *port) | |||
| 310 | mutex_unlock(&port->mutex); | 318 | mutex_unlock(&port->mutex); |
| 311 | } | 319 | } |
| 312 | 320 | ||
| 313 | /** | 321 | static void serial_hangup(struct tty_struct *tty) |
| 314 | * serial_do_free - free resources post close/hangup | ||
| 315 | * @port: port to free up | ||
| 316 | * | ||
| 317 | * Do the resource freeing and refcount dropping for the port. We must | ||
| 318 | * be careful about ordering and we must avoid freeing up the console. | ||
| 319 | */ | ||
| 320 | |||
| 321 | static void serial_do_free(struct usb_serial_port *port) | ||
| 322 | { | 322 | { |
| 323 | struct usb_serial *serial; | 323 | struct usb_serial_port *port = tty->driver_data; |
| 324 | struct module *owner; | ||
| 325 | 324 | ||
| 326 | /* The console is magical, do not hang up the console hardware | 325 | dbg("%s - port %d", __func__, port->number); |
| 327 | or there will be tears */ | ||
| 328 | if (port->console) | ||
| 329 | return; | ||
| 330 | 326 | ||
| 331 | serial = port->serial; | 327 | serial_down(port); |
| 332 | owner = serial->type->driver.owner; | 328 | tty_port_hangup(&port->port); |
| 333 | put_device(&port->dev); | ||
| 334 | /* Mustn't dereference port any more */ | ||
| 335 | mutex_lock(&serial->disc_mutex); | ||
| 336 | if (!serial->disconnected) | ||
| 337 | usb_autopm_put_interface(serial->interface); | ||
| 338 | mutex_unlock(&serial->disc_mutex); | ||
| 339 | usb_serial_put(serial); | ||
| 340 | /* Mustn't dereference serial any more */ | ||
| 341 | module_put(owner); | ||
| 342 | } | 329 | } |
| 343 | 330 | ||
| 344 | static void serial_close(struct tty_struct *tty, struct file *filp) | 331 | static void serial_close(struct tty_struct *tty, struct file *filp) |
| 345 | { | 332 | { |
| 346 | struct usb_serial_port *port = tty->driver_data; | 333 | struct usb_serial_port *port = tty->driver_data; |
| 347 | 334 | ||
| 348 | if (!port) | ||
| 349 | return; | ||
| 350 | |||
| 351 | dbg("%s - port %d", __func__, port->number); | 335 | dbg("%s - port %d", __func__, port->number); |
| 352 | 336 | ||
| 353 | /* FIXME: | 337 | if (tty_hung_up_p(filp)) |
| 354 | This leaves a very narrow race. Really we should do the | ||
| 355 | serial_do_free() on tty->shutdown(), but tty->shutdown can | ||
| 356 | be called from IRQ context and serial_do_free can sleep. | ||
| 357 | |||
| 358 | The right fix is probably to make the tty free (which is rare) | ||
| 359 | and thus tty->shutdown() occur via a work queue and simplify all | ||
| 360 | the drivers that use it. | ||
| 361 | */ | ||
| 362 | if (tty_hung_up_p(filp)) { | ||
| 363 | /* serial_hangup already called serial_down at this point. | ||
| 364 | Another user may have already reopened the port but | ||
| 365 | serial_do_free is refcounted */ | ||
| 366 | serial_do_free(port); | ||
| 367 | return; | 338 | return; |
| 368 | } | ||
| 369 | |||
| 370 | if (tty_port_close_start(&port->port, tty, filp) == 0) | 339 | if (tty_port_close_start(&port->port, tty, filp) == 0) |
| 371 | return; | 340 | return; |
| 372 | 341 | serial_down(port); | |
| 373 | serial_do_down(port); | ||
| 374 | tty_port_close_end(&port->port, tty); | 342 | tty_port_close_end(&port->port, tty); |
| 375 | tty_port_tty_set(&port->port, NULL); | 343 | tty_port_tty_set(&port->port, NULL); |
| 376 | serial_do_free(port); | ||
| 377 | } | 344 | } |
| 378 | 345 | ||
| 379 | static void serial_hangup(struct tty_struct *tty) | 346 | /** |
| 347 | * serial_release - free resources post close/hangup | ||
| 348 | * @port: port to free up | ||
| 349 | * | ||
| 350 | * Do the resource freeing and refcount dropping for the port. | ||
| 351 | * Avoid freeing the console. | ||
| 352 | * | ||
| 353 | * Called when the last tty kref is dropped. | ||
| 354 | */ | ||
| 355 | static void serial_release(struct tty_struct *tty) | ||
| 380 | { | 356 | { |
| 381 | struct usb_serial_port *port = tty->driver_data; | 357 | struct usb_serial_port *port = tty->driver_data; |
| 382 | serial_do_down(port); | 358 | struct usb_serial *serial; |
| 383 | tty_port_hangup(&port->port); | 359 | struct module *owner; |
| 384 | /* We must not free port yet - the USB serial layer depends on it's | 360 | |
| 385 | continued existence */ | 361 | /* The console is magical. Do not hang up the console hardware |
| 362 | * or there will be tears. | ||
| 363 | */ | ||
| 364 | if (port->console) | ||
| 365 | return; | ||
| 366 | |||
| 367 | dbg("%s - port %d", __func__, port->number); | ||
| 368 | |||
| 369 | /* Standard shutdown processing */ | ||
| 370 | tty_shutdown(tty); | ||
| 371 | |||
| 372 | tty->driver_data = NULL; | ||
| 373 | |||
| 374 | serial = port->serial; | ||
| 375 | owner = serial->type->driver.owner; | ||
| 376 | |||
| 377 | mutex_lock(&serial->disc_mutex); | ||
| 378 | if (!serial->disconnected) | ||
| 379 | usb_autopm_put_interface(serial->interface); | ||
| 380 | mutex_unlock(&serial->disc_mutex); | ||
| 381 | |||
| 382 | usb_serial_put(serial); | ||
| 383 | module_put(owner); | ||
| 386 | } | 384 | } |
| 387 | 385 | ||
| 388 | static int serial_write(struct tty_struct *tty, const unsigned char *buf, | 386 | static int serial_write(struct tty_struct *tty, const unsigned char *buf, |
| @@ -527,6 +525,7 @@ static int serial_proc_show(struct seq_file *m, void *v) | |||
| 527 | 525 | ||
| 528 | seq_putc(m, '\n'); | 526 | seq_putc(m, '\n'); |
| 529 | usb_serial_put(serial); | 527 | usb_serial_put(serial); |
| 528 | mutex_unlock(&serial->disc_mutex); | ||
| 530 | } | 529 | } |
| 531 | return 0; | 530 | return 0; |
| 532 | } | 531 | } |
| @@ -596,14 +595,6 @@ static void usb_serial_port_work(struct work_struct *work) | |||
| 596 | tty_kref_put(tty); | 595 | tty_kref_put(tty); |
| 597 | } | 596 | } |
| 598 | 597 | ||
| 599 | static void port_release(struct device *dev) | ||
| 600 | { | ||
| 601 | struct usb_serial_port *port = to_usb_serial_port(dev); | ||
| 602 | |||
| 603 | dbg ("%s - %s", __func__, dev_name(dev)); | ||
| 604 | port_free(port); | ||
| 605 | } | ||
| 606 | |||
| 607 | static void kill_traffic(struct usb_serial_port *port) | 598 | static void kill_traffic(struct usb_serial_port *port) |
| 608 | { | 599 | { |
| 609 | usb_kill_urb(port->read_urb); | 600 | usb_kill_urb(port->read_urb); |
| @@ -623,8 +614,12 @@ static void kill_traffic(struct usb_serial_port *port) | |||
| 623 | usb_kill_urb(port->interrupt_out_urb); | 614 | usb_kill_urb(port->interrupt_out_urb); |
| 624 | } | 615 | } |
| 625 | 616 | ||
| 626 | static void port_free(struct usb_serial_port *port) | 617 | static void port_release(struct device *dev) |
| 627 | { | 618 | { |
| 619 | struct usb_serial_port *port = to_usb_serial_port(dev); | ||
| 620 | |||
| 621 | dbg ("%s - %s", __func__, dev_name(dev)); | ||
| 622 | |||
| 628 | /* | 623 | /* |
| 629 | * Stop all the traffic before cancelling the work, so that | 624 | * Stop all the traffic before cancelling the work, so that |
| 630 | * nobody will restart it by calling usb_serial_port_softint. | 625 | * nobody will restart it by calling usb_serial_port_softint. |
| @@ -935,6 +930,11 @@ int usb_serial_probe(struct usb_interface *interface, | |||
| 935 | mutex_init(&port->mutex); | 930 | mutex_init(&port->mutex); |
| 936 | INIT_WORK(&port->work, usb_serial_port_work); | 931 | INIT_WORK(&port->work, usb_serial_port_work); |
| 937 | serial->port[i] = port; | 932 | serial->port[i] = port; |
| 933 | port->dev.parent = &interface->dev; | ||
| 934 | port->dev.driver = NULL; | ||
| 935 | port->dev.bus = &usb_serial_bus_type; | ||
| 936 | port->dev.release = &port_release; | ||
| 937 | device_initialize(&port->dev); | ||
| 938 | } | 938 | } |
| 939 | 939 | ||
| 940 | /* set up the endpoint information */ | 940 | /* set up the endpoint information */ |
| @@ -1077,15 +1077,10 @@ int usb_serial_probe(struct usb_interface *interface, | |||
| 1077 | /* register all of the individual ports with the driver core */ | 1077 | /* register all of the individual ports with the driver core */ |
| 1078 | for (i = 0; i < num_ports; ++i) { | 1078 | for (i = 0; i < num_ports; ++i) { |
| 1079 | port = serial->port[i]; | 1079 | port = serial->port[i]; |
| 1080 | port->dev.parent = &interface->dev; | ||
| 1081 | port->dev.driver = NULL; | ||
| 1082 | port->dev.bus = &usb_serial_bus_type; | ||
| 1083 | port->dev.release = &port_release; | ||
| 1084 | |||
| 1085 | dev_set_name(&port->dev, "ttyUSB%d", port->number); | 1080 | dev_set_name(&port->dev, "ttyUSB%d", port->number); |
| 1086 | dbg ("%s - registering %s", __func__, dev_name(&port->dev)); | 1081 | dbg ("%s - registering %s", __func__, dev_name(&port->dev)); |
| 1087 | port->dev_state = PORT_REGISTERING; | 1082 | port->dev_state = PORT_REGISTERING; |
| 1088 | retval = device_register(&port->dev); | 1083 | retval = device_add(&port->dev); |
| 1089 | if (retval) { | 1084 | if (retval) { |
| 1090 | dev_err(&port->dev, "Error registering port device, " | 1085 | dev_err(&port->dev, "Error registering port device, " |
| 1091 | "continuing\n"); | 1086 | "continuing\n"); |
| @@ -1103,39 +1098,7 @@ exit: | |||
| 1103 | return 0; | 1098 | return 0; |
| 1104 | 1099 | ||
| 1105 | probe_error: | 1100 | probe_error: |
| 1106 | for (i = 0; i < num_bulk_in; ++i) { | 1101 | usb_serial_put(serial); |
| 1107 | port = serial->port[i]; | ||
| 1108 | if (!port) | ||
| 1109 | continue; | ||
| 1110 | usb_free_urb(port->read_urb); | ||
| 1111 | kfree(port->bulk_in_buffer); | ||
| 1112 | } | ||
| 1113 | for (i = 0; i < num_bulk_out; ++i) { | ||
| 1114 | port = serial->port[i]; | ||
| 1115 | if (!port) | ||
| 1116 | continue; | ||
| 1117 | usb_free_urb(port->write_urb); | ||
| 1118 | kfree(port->bulk_out_buffer); | ||
| 1119 | } | ||
| 1120 | for (i = 0; i < num_interrupt_in; ++i) { | ||
| 1121 | port = serial->port[i]; | ||
| 1122 | if (!port) | ||
| 1123 | continue; | ||
| 1124 | usb_free_urb(port->interrupt_in_urb); | ||
| 1125 | kfree(port->interrupt_in_buffer); | ||
| 1126 | } | ||
| 1127 | for (i = 0; i < num_interrupt_out; ++i) { | ||
| 1128 | port = serial->port[i]; | ||
| 1129 | if (!port) | ||
| 1130 | continue; | ||
| 1131 | usb_free_urb(port->interrupt_out_urb); | ||
| 1132 | kfree(port->interrupt_out_buffer); | ||
| 1133 | } | ||
| 1134 | |||
| 1135 | /* free up any memory that we allocated */ | ||
| 1136 | for (i = 0; i < serial->num_port_pointers; ++i) | ||
| 1137 | kfree(serial->port[i]); | ||
| 1138 | kfree(serial); | ||
| 1139 | return -EIO; | 1102 | return -EIO; |
| 1140 | } | 1103 | } |
| 1141 | EXPORT_SYMBOL_GPL(usb_serial_probe); | 1104 | EXPORT_SYMBOL_GPL(usb_serial_probe); |
| @@ -1161,10 +1124,7 @@ void usb_serial_disconnect(struct usb_interface *interface) | |||
| 1161 | if (port) { | 1124 | if (port) { |
| 1162 | struct tty_struct *tty = tty_port_tty_get(&port->port); | 1125 | struct tty_struct *tty = tty_port_tty_get(&port->port); |
| 1163 | if (tty) { | 1126 | if (tty) { |
| 1164 | /* The hangup will occur asynchronously but | 1127 | tty_vhangup(tty); |
| 1165 | the object refcounts will sort out all the | ||
| 1166 | cleanup */ | ||
| 1167 | tty_hangup(tty); | ||
| 1168 | tty_kref_put(tty); | 1128 | tty_kref_put(tty); |
| 1169 | } | 1129 | } |
| 1170 | kill_traffic(port); | 1130 | kill_traffic(port); |
| @@ -1189,8 +1149,7 @@ void usb_serial_disconnect(struct usb_interface *interface) | |||
| 1189 | } | 1149 | } |
| 1190 | serial->type->disconnect(serial); | 1150 | serial->type->disconnect(serial); |
| 1191 | 1151 | ||
| 1192 | /* let the last holder of this object | 1152 | /* let the last holder of this object cause it to be cleaned up */ |
| 1193 | * cause it to be cleaned up */ | ||
| 1194 | usb_serial_put(serial); | 1153 | usb_serial_put(serial); |
| 1195 | dev_info(dev, "device disconnected\n"); | 1154 | dev_info(dev, "device disconnected\n"); |
| 1196 | } | 1155 | } |
| @@ -1246,6 +1205,8 @@ static const struct tty_operations serial_ops = { | |||
| 1246 | .chars_in_buffer = serial_chars_in_buffer, | 1205 | .chars_in_buffer = serial_chars_in_buffer, |
| 1247 | .tiocmget = serial_tiocmget, | 1206 | .tiocmget = serial_tiocmget, |
| 1248 | .tiocmset = serial_tiocmset, | 1207 | .tiocmset = serial_tiocmset, |
| 1208 | .shutdown = serial_release, | ||
| 1209 | .install = serial_install, | ||
| 1249 | .proc_fops = &serial_proc_fops, | 1210 | .proc_fops = &serial_proc_fops, |
| 1250 | }; | 1211 | }; |
| 1251 | 1212 | ||
diff --git a/drivers/usb/serial/usb_debug.c b/drivers/usb/serial/usb_debug.c index 614800972dc3..7b5bfc4edd3d 100644 --- a/drivers/usb/serial/usb_debug.c +++ b/drivers/usb/serial/usb_debug.c | |||
| @@ -43,11 +43,10 @@ static struct usb_driver debug_driver = { | |||
| 43 | .no_dynamic_id = 1, | 43 | .no_dynamic_id = 1, |
| 44 | }; | 44 | }; |
| 45 | 45 | ||
| 46 | static int usb_debug_open(struct tty_struct *tty, struct usb_serial_port *port, | 46 | static int usb_debug_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 47 | struct file *filp) | ||
| 48 | { | 47 | { |
| 49 | port->bulk_out_size = USB_DEBUG_MAX_PACKET_SIZE; | 48 | port->bulk_out_size = USB_DEBUG_MAX_PACKET_SIZE; |
| 50 | return usb_serial_generic_open(tty, port, filp); | 49 | return usb_serial_generic_open(tty, port); |
| 51 | } | 50 | } |
| 52 | 51 | ||
| 53 | /* This HW really does not support a serial break, so one will be | 52 | /* This HW really does not support a serial break, so one will be |
diff --git a/drivers/usb/serial/visor.c b/drivers/usb/serial/visor.c index f5d0f64dcc52..1aa5d20a5d99 100644 --- a/drivers/usb/serial/visor.c +++ b/drivers/usb/serial/visor.c | |||
| @@ -36,8 +36,7 @@ | |||
| 36 | #define DRIVER_DESC "USB HandSpring Visor / Palm OS driver" | 36 | #define DRIVER_DESC "USB HandSpring Visor / Palm OS driver" |
| 37 | 37 | ||
| 38 | /* function prototypes for a handspring visor */ | 38 | /* function prototypes for a handspring visor */ |
| 39 | static int visor_open(struct tty_struct *tty, struct usb_serial_port *port, | 39 | static int visor_open(struct tty_struct *tty, struct usb_serial_port *port); |
| 40 | struct file *filp); | ||
| 41 | static void visor_close(struct usb_serial_port *port); | 40 | static void visor_close(struct usb_serial_port *port); |
| 42 | static int visor_write(struct tty_struct *tty, struct usb_serial_port *port, | 41 | static int visor_write(struct tty_struct *tty, struct usb_serial_port *port, |
| 43 | const unsigned char *buf, int count); | 42 | const unsigned char *buf, int count); |
| @@ -273,8 +272,7 @@ static int stats; | |||
| 273 | /****************************************************************************** | 272 | /****************************************************************************** |
| 274 | * Handspring Visor specific driver functions | 273 | * Handspring Visor specific driver functions |
| 275 | ******************************************************************************/ | 274 | ******************************************************************************/ |
| 276 | static int visor_open(struct tty_struct *tty, struct usb_serial_port *port, | 275 | static int visor_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 277 | struct file *filp) | ||
| 278 | { | 276 | { |
| 279 | struct usb_serial *serial = port->serial; | 277 | struct usb_serial *serial = port->serial; |
| 280 | struct visor_private *priv = usb_get_serial_port_data(port); | 278 | struct visor_private *priv = usb_get_serial_port_data(port); |
diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c index 8d126dd7a02e..62424eec33ec 100644 --- a/drivers/usb/serial/whiteheat.c +++ b/drivers/usb/serial/whiteheat.c | |||
| @@ -146,7 +146,7 @@ static int whiteheat_firmware_attach(struct usb_serial *serial); | |||
| 146 | static int whiteheat_attach(struct usb_serial *serial); | 146 | static int whiteheat_attach(struct usb_serial *serial); |
| 147 | static void whiteheat_release(struct usb_serial *serial); | 147 | static void whiteheat_release(struct usb_serial *serial); |
| 148 | static int whiteheat_open(struct tty_struct *tty, | 148 | static int whiteheat_open(struct tty_struct *tty, |
| 149 | struct usb_serial_port *port, struct file *filp); | 149 | struct usb_serial_port *port); |
| 150 | static void whiteheat_close(struct usb_serial_port *port); | 150 | static void whiteheat_close(struct usb_serial_port *port); |
| 151 | static int whiteheat_write(struct tty_struct *tty, | 151 | static int whiteheat_write(struct tty_struct *tty, |
| 152 | struct usb_serial_port *port, | 152 | struct usb_serial_port *port, |
| @@ -259,7 +259,7 @@ static int firm_send_command(struct usb_serial_port *port, __u8 command, | |||
| 259 | __u8 *data, __u8 datasize); | 259 | __u8 *data, __u8 datasize); |
| 260 | static int firm_open(struct usb_serial_port *port); | 260 | static int firm_open(struct usb_serial_port *port); |
| 261 | static int firm_close(struct usb_serial_port *port); | 261 | static int firm_close(struct usb_serial_port *port); |
| 262 | static int firm_setup_port(struct tty_struct *tty); | 262 | static void firm_setup_port(struct tty_struct *tty); |
| 263 | static int firm_set_rts(struct usb_serial_port *port, __u8 onoff); | 263 | static int firm_set_rts(struct usb_serial_port *port, __u8 onoff); |
| 264 | static int firm_set_dtr(struct usb_serial_port *port, __u8 onoff); | 264 | static int firm_set_dtr(struct usb_serial_port *port, __u8 onoff); |
| 265 | static int firm_set_break(struct usb_serial_port *port, __u8 onoff); | 265 | static int firm_set_break(struct usb_serial_port *port, __u8 onoff); |
| @@ -659,8 +659,7 @@ static void whiteheat_release(struct usb_serial *serial) | |||
| 659 | return; | 659 | return; |
| 660 | } | 660 | } |
| 661 | 661 | ||
| 662 | static int whiteheat_open(struct tty_struct *tty, | 662 | static int whiteheat_open(struct tty_struct *tty, struct usb_serial_port *port) |
| 663 | struct usb_serial_port *port, struct file *filp) | ||
| 664 | { | 663 | { |
| 665 | int retval = 0; | 664 | int retval = 0; |
| 666 | 665 | ||
| @@ -1211,7 +1210,7 @@ static int firm_close(struct usb_serial_port *port) | |||
| 1211 | } | 1210 | } |
| 1212 | 1211 | ||
| 1213 | 1212 | ||
| 1214 | static int firm_setup_port(struct tty_struct *tty) | 1213 | static void firm_setup_port(struct tty_struct *tty) |
| 1215 | { | 1214 | { |
| 1216 | struct usb_serial_port *port = tty->driver_data; | 1215 | struct usb_serial_port *port = tty->driver_data; |
| 1217 | struct whiteheat_port_settings port_settings; | 1216 | struct whiteheat_port_settings port_settings; |
| @@ -1286,7 +1285,7 @@ static int firm_setup_port(struct tty_struct *tty) | |||
| 1286 | port_settings.lloop = 0; | 1285 | port_settings.lloop = 0; |
| 1287 | 1286 | ||
| 1288 | /* now send the message to the device */ | 1287 | /* now send the message to the device */ |
| 1289 | return firm_send_command(port, WHITEHEAT_SETUP_PORT, | 1288 | firm_send_command(port, WHITEHEAT_SETUP_PORT, |
| 1290 | (__u8 *)&port_settings, sizeof(port_settings)); | 1289 | (__u8 *)&port_settings, sizeof(port_settings)); |
| 1291 | } | 1290 | } |
| 1292 | 1291 | ||
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index cef3e1d9b92e..11af4cb8924e 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
| @@ -1869,7 +1869,7 @@ config FB_W100 | |||
| 1869 | 1869 | ||
| 1870 | config FB_SH_MOBILE_LCDC | 1870 | config FB_SH_MOBILE_LCDC |
| 1871 | tristate "SuperH Mobile LCDC framebuffer support" | 1871 | tristate "SuperH Mobile LCDC framebuffer support" |
| 1872 | depends on FB && SUPERH | 1872 | depends on FB && SUPERH && HAVE_CLK |
| 1873 | select FB_SYS_FILLRECT | 1873 | select FB_SYS_FILLRECT |
| 1874 | select FB_SYS_COPYAREA | 1874 | select FB_SYS_COPYAREA |
| 1875 | select FB_SYS_IMAGEBLIT | 1875 | select FB_SYS_IMAGEBLIT |
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c index 59d7d5ec17a4..74e96cf83b7e 100644 --- a/drivers/video/console/vgacon.c +++ b/drivers/video/console/vgacon.c | |||
| @@ -180,7 +180,6 @@ static inline void vga_set_mem_top(struct vc_data *c) | |||
| 180 | } | 180 | } |
| 181 | 181 | ||
| 182 | #ifdef CONFIG_VGACON_SOFT_SCROLLBACK | 182 | #ifdef CONFIG_VGACON_SOFT_SCROLLBACK |
| 183 | #include <linux/slab.h> | ||
| 184 | /* software scrollback */ | 183 | /* software scrollback */ |
| 185 | static void *vgacon_scrollback; | 184 | static void *vgacon_scrollback; |
| 186 | static int vgacon_scrollback_tail; | 185 | static int vgacon_scrollback_tail; |
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c index 148cbcc39602..915439dc05a0 100644 --- a/drivers/video/omap/dispc.c +++ b/drivers/video/omap/dispc.c | |||
| @@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable) | |||
| 212 | dispc_write_reg(DISPC_CONTROL, l); | 212 | dispc_write_reg(DISPC_CONTROL, l); |
| 213 | 213 | ||
| 214 | /* Set bypass mode in RFBI module */ | 214 | /* Set bypass mode in RFBI module */ |
| 215 | l = __raw_readl(IO_ADDRESS(RFBI_CONTROL)); | 215 | l = __raw_readl(OMAP2_IO_ADDRESS(RFBI_CONTROL)); |
| 216 | l |= enable ? 0 : (1 << 1); | 216 | l |= enable ? 0 : (1 << 1); |
| 217 | __raw_writel(l, IO_ADDRESS(RFBI_CONTROL)); | 217 | __raw_writel(l, OMAP2_IO_ADDRESS(RFBI_CONTROL)); |
| 218 | } | 218 | } |
| 219 | 219 | ||
| 220 | static void set_lcd_data_lines(int data_lines) | 220 | static void set_lcd_data_lines(int data_lines) |
| @@ -1421,7 +1421,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode, | |||
| 1421 | } | 1421 | } |
| 1422 | 1422 | ||
| 1423 | /* L3 firewall setting: enable access to OCM RAM */ | 1423 | /* L3 firewall setting: enable access to OCM RAM */ |
| 1424 | __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0)); | 1424 | __raw_writel(0x402000b0, OMAP2_IO_ADDRESS(0x680050a0)); |
| 1425 | 1425 | ||
| 1426 | if ((r = alloc_palette_ram()) < 0) | 1426 | if ((r = alloc_palette_ram()) < 0) |
| 1427 | goto fail2; | 1427 | goto fail2; |
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c index 07f22b625632..3ad5157f9899 100644 --- a/drivers/video/sh_mobile_lcdcfb.c +++ b/drivers/video/sh_mobile_lcdcfb.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
| 15 | #include <linux/fb.h> | 15 | #include <linux/fb.h> |
| 16 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
| 17 | #include <linux/pm_runtime.h> | ||
| 17 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 18 | #include <linux/dma-mapping.h> | 19 | #include <linux/dma-mapping.h> |
| 19 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
| @@ -22,35 +23,8 @@ | |||
| 22 | #include <asm/atomic.h> | 23 | #include <asm/atomic.h> |
| 23 | 24 | ||
| 24 | #define PALETTE_NR 16 | 25 | #define PALETTE_NR 16 |
| 25 | 26 | #define SIDE_B_OFFSET 0x1000 | |
| 26 | struct sh_mobile_lcdc_priv; | 27 | #define MIRROR_OFFSET 0x2000 |
| 27 | struct sh_mobile_lcdc_chan { | ||
| 28 | struct sh_mobile_lcdc_priv *lcdc; | ||
| 29 | unsigned long *reg_offs; | ||
| 30 | unsigned long ldmt1r_value; | ||
| 31 | unsigned long enabled; /* ME and SE in LDCNT2R */ | ||
| 32 | struct sh_mobile_lcdc_chan_cfg cfg; | ||
| 33 | u32 pseudo_palette[PALETTE_NR]; | ||
| 34 | struct fb_info *info; | ||
| 35 | dma_addr_t dma_handle; | ||
| 36 | struct fb_deferred_io defio; | ||
| 37 | struct scatterlist *sglist; | ||
| 38 | unsigned long frame_end; | ||
| 39 | wait_queue_head_t frame_end_wait; | ||
| 40 | }; | ||
| 41 | |||
| 42 | struct sh_mobile_lcdc_priv { | ||
| 43 | void __iomem *base; | ||
| 44 | int irq; | ||
| 45 | #ifdef CONFIG_HAVE_CLK | ||
| 46 | atomic_t clk_usecnt; | ||
| 47 | struct clk *dot_clk; | ||
| 48 | struct clk *clk; | ||
| 49 | #endif | ||
| 50 | unsigned long lddckr; | ||
| 51 | struct sh_mobile_lcdc_chan ch[2]; | ||
| 52 | int started; | ||
| 53 | }; | ||
| 54 | 28 | ||
| 55 | /* shared registers */ | 29 | /* shared registers */ |
| 56 | #define _LDDCKR 0x410 | 30 | #define _LDDCKR 0x410 |
| @@ -59,17 +33,30 @@ struct sh_mobile_lcdc_priv { | |||
| 59 | #define _LDSR 0x46c | 33 | #define _LDSR 0x46c |
| 60 | #define _LDCNT1R 0x470 | 34 | #define _LDCNT1R 0x470 |
| 61 | #define _LDCNT2R 0x474 | 35 | #define _LDCNT2R 0x474 |
| 36 | #define _LDRCNTR 0x478 | ||
| 62 | #define _LDDDSR 0x47c | 37 | #define _LDDDSR 0x47c |
| 63 | #define _LDDWD0R 0x800 | 38 | #define _LDDWD0R 0x800 |
| 64 | #define _LDDRDR 0x840 | 39 | #define _LDDRDR 0x840 |
| 65 | #define _LDDWAR 0x900 | 40 | #define _LDDWAR 0x900 |
| 66 | #define _LDDRAR 0x904 | 41 | #define _LDDRAR 0x904 |
| 67 | 42 | ||
| 43 | /* shared registers and their order for context save/restore */ | ||
| 44 | static int lcdc_shared_regs[] = { | ||
| 45 | _LDDCKR, | ||
| 46 | _LDDCKSTPR, | ||
| 47 | _LDINTR, | ||
| 48 | _LDDDSR, | ||
| 49 | _LDCNT1R, | ||
| 50 | _LDCNT2R, | ||
| 51 | }; | ||
| 52 | #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs) | ||
| 53 | |||
| 68 | /* per-channel registers */ | 54 | /* per-channel registers */ |
| 69 | enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, | 55 | enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, |
| 70 | LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR }; | 56 | LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR, |
| 57 | NR_CH_REGS }; | ||
| 71 | 58 | ||
| 72 | static unsigned long lcdc_offs_mainlcd[] = { | 59 | static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = { |
| 73 | [LDDCKPAT1R] = 0x400, | 60 | [LDDCKPAT1R] = 0x400, |
| 74 | [LDDCKPAT2R] = 0x404, | 61 | [LDDCKPAT2R] = 0x404, |
| 75 | [LDMT1R] = 0x418, | 62 | [LDMT1R] = 0x418, |
| @@ -87,7 +74,7 @@ static unsigned long lcdc_offs_mainlcd[] = { | |||
| 87 | [LDPMR] = 0x460, | 74 | [LDPMR] = 0x460, |
| 88 | }; | 75 | }; |
| 89 | 76 | ||
| 90 | static unsigned long lcdc_offs_sublcd[] = { | 77 | static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = { |
| 91 | [LDDCKPAT1R] = 0x408, | 78 | [LDDCKPAT1R] = 0x408, |
| 92 | [LDDCKPAT2R] = 0x40c, | 79 | [LDDCKPAT2R] = 0x40c, |
| 93 | [LDMT1R] = 0x600, | 80 | [LDMT1R] = 0x600, |
| @@ -110,12 +97,80 @@ static unsigned long lcdc_offs_sublcd[] = { | |||
| 110 | #define DISPLAY_BEU 0x00000008 | 97 | #define DISPLAY_BEU 0x00000008 |
| 111 | #define LCDC_ENABLE 0x00000001 | 98 | #define LCDC_ENABLE 0x00000001 |
| 112 | #define LDINTR_FE 0x00000400 | 99 | #define LDINTR_FE 0x00000400 |
| 100 | #define LDINTR_VSE 0x00000200 | ||
| 101 | #define LDINTR_VEE 0x00000100 | ||
| 113 | #define LDINTR_FS 0x00000004 | 102 | #define LDINTR_FS 0x00000004 |
| 103 | #define LDINTR_VSS 0x00000002 | ||
| 104 | #define LDINTR_VES 0x00000001 | ||
| 105 | #define LDRCNTR_SRS 0x00020000 | ||
| 106 | #define LDRCNTR_SRC 0x00010000 | ||
| 107 | #define LDRCNTR_MRS 0x00000002 | ||
| 108 | #define LDRCNTR_MRC 0x00000001 | ||
| 109 | |||
| 110 | struct sh_mobile_lcdc_priv; | ||
| 111 | struct sh_mobile_lcdc_chan { | ||
| 112 | struct sh_mobile_lcdc_priv *lcdc; | ||
| 113 | unsigned long *reg_offs; | ||
| 114 | unsigned long ldmt1r_value; | ||
| 115 | unsigned long enabled; /* ME and SE in LDCNT2R */ | ||
| 116 | struct sh_mobile_lcdc_chan_cfg cfg; | ||
| 117 | u32 pseudo_palette[PALETTE_NR]; | ||
| 118 | unsigned long saved_ch_regs[NR_CH_REGS]; | ||
| 119 | struct fb_info *info; | ||
| 120 | dma_addr_t dma_handle; | ||
| 121 | struct fb_deferred_io defio; | ||
| 122 | struct scatterlist *sglist; | ||
| 123 | unsigned long frame_end; | ||
| 124 | unsigned long pan_offset; | ||
| 125 | unsigned long new_pan_offset; | ||
| 126 | wait_queue_head_t frame_end_wait; | ||
| 127 | }; | ||
| 128 | |||
| 129 | struct sh_mobile_lcdc_priv { | ||
| 130 | void __iomem *base; | ||
| 131 | int irq; | ||
| 132 | atomic_t hw_usecnt; | ||
| 133 | struct device *dev; | ||
| 134 | struct clk *dot_clk; | ||
| 135 | unsigned long lddckr; | ||
| 136 | struct sh_mobile_lcdc_chan ch[2]; | ||
| 137 | unsigned long saved_shared_regs[NR_SHARED_REGS]; | ||
| 138 | int started; | ||
| 139 | }; | ||
| 140 | |||
| 141 | static bool banked(int reg_nr) | ||
| 142 | { | ||
| 143 | switch (reg_nr) { | ||
| 144 | case LDMT1R: | ||
| 145 | case LDMT2R: | ||
| 146 | case LDMT3R: | ||
| 147 | case LDDFR: | ||
| 148 | case LDSM1R: | ||
| 149 | case LDSA1R: | ||
| 150 | case LDMLSR: | ||
| 151 | case LDHCNR: | ||
| 152 | case LDHSYNR: | ||
| 153 | case LDVLNR: | ||
| 154 | case LDVSYNR: | ||
| 155 | return true; | ||
| 156 | } | ||
| 157 | return false; | ||
| 158 | } | ||
| 114 | 159 | ||
| 115 | static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, | 160 | static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, |
| 116 | int reg_nr, unsigned long data) | 161 | int reg_nr, unsigned long data) |
| 117 | { | 162 | { |
| 118 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); | 163 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); |
| 164 | if (banked(reg_nr)) | ||
| 165 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | ||
| 166 | SIDE_B_OFFSET); | ||
| 167 | } | ||
| 168 | |||
| 169 | static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan, | ||
| 170 | int reg_nr, unsigned long data) | ||
| 171 | { | ||
| 172 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | ||
| 173 | MIRROR_OFFSET); | ||
| 119 | } | 174 | } |
| 120 | 175 | ||
| 121 | static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan, | 176 | static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan, |
| @@ -156,6 +211,7 @@ static void lcdc_sys_write_index(void *handle, unsigned long data) | |||
| 156 | lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000); | 211 | lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000); |
| 157 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | 212 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); |
| 158 | lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | 213 | lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); |
| 214 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | ||
| 159 | } | 215 | } |
| 160 | 216 | ||
| 161 | static void lcdc_sys_write_data(void *handle, unsigned long data) | 217 | static void lcdc_sys_write_data(void *handle, unsigned long data) |
| @@ -165,6 +221,7 @@ static void lcdc_sys_write_data(void *handle, unsigned long data) | |||
| 165 | lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000); | 221 | lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000); |
| 166 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | 222 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); |
| 167 | lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | 223 | lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); |
| 224 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | ||
| 168 | } | 225 | } |
| 169 | 226 | ||
| 170 | static unsigned long lcdc_sys_read_data(void *handle) | 227 | static unsigned long lcdc_sys_read_data(void *handle) |
| @@ -175,8 +232,9 @@ static unsigned long lcdc_sys_read_data(void *handle) | |||
| 175 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | 232 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); |
| 176 | lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | 233 | lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); |
| 177 | udelay(1); | 234 | udelay(1); |
| 235 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | ||
| 178 | 236 | ||
| 179 | return lcdc_read(ch->lcdc, _LDDRDR) & 0xffff; | 237 | return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff; |
| 180 | } | 238 | } |
| 181 | 239 | ||
| 182 | struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { | 240 | struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { |
| @@ -185,11 +243,10 @@ struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { | |||
| 185 | lcdc_sys_read_data, | 243 | lcdc_sys_read_data, |
| 186 | }; | 244 | }; |
| 187 | 245 | ||
| 188 | #ifdef CONFIG_HAVE_CLK | ||
| 189 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) | 246 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) |
| 190 | { | 247 | { |
| 191 | if (atomic_inc_and_test(&priv->clk_usecnt)) { | 248 | if (atomic_inc_and_test(&priv->hw_usecnt)) { |
| 192 | clk_enable(priv->clk); | 249 | pm_runtime_get_sync(priv->dev); |
| 193 | if (priv->dot_clk) | 250 | if (priv->dot_clk) |
| 194 | clk_enable(priv->dot_clk); | 251 | clk_enable(priv->dot_clk); |
| 195 | } | 252 | } |
| @@ -197,16 +254,12 @@ static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) | |||
| 197 | 254 | ||
| 198 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) | 255 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) |
| 199 | { | 256 | { |
| 200 | if (atomic_sub_return(1, &priv->clk_usecnt) == -1) { | 257 | if (atomic_sub_return(1, &priv->hw_usecnt) == -1) { |
| 201 | if (priv->dot_clk) | 258 | if (priv->dot_clk) |
| 202 | clk_disable(priv->dot_clk); | 259 | clk_disable(priv->dot_clk); |
| 203 | clk_disable(priv->clk); | 260 | pm_runtime_put(priv->dev); |
| 204 | } | 261 | } |
| 205 | } | 262 | } |
| 206 | #else | ||
| 207 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) {} | ||
| 208 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) {} | ||
| 209 | #endif | ||
| 210 | 263 | ||
| 211 | static int sh_mobile_lcdc_sginit(struct fb_info *info, | 264 | static int sh_mobile_lcdc_sginit(struct fb_info *info, |
| 212 | struct list_head *pagelist) | 265 | struct list_head *pagelist) |
| @@ -255,30 +308,52 @@ static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data) | |||
| 255 | struct sh_mobile_lcdc_priv *priv = data; | 308 | struct sh_mobile_lcdc_priv *priv = data; |
| 256 | struct sh_mobile_lcdc_chan *ch; | 309 | struct sh_mobile_lcdc_chan *ch; |
| 257 | unsigned long tmp; | 310 | unsigned long tmp; |
| 311 | unsigned long ldintr; | ||
| 258 | int is_sub; | 312 | int is_sub; |
| 259 | int k; | 313 | int k; |
| 260 | 314 | ||
| 261 | /* acknowledge interrupt */ | 315 | /* acknowledge interrupt */ |
| 262 | tmp = lcdc_read(priv, _LDINTR); | 316 | ldintr = tmp = lcdc_read(priv, _LDINTR); |
| 263 | tmp &= 0xffffff00; /* mask in high 24 bits */ | 317 | /* |
| 264 | tmp |= 0x000000ff ^ LDINTR_FS; /* status in low 8 */ | 318 | * disable further VSYNC End IRQs, preserve all other enabled IRQs, |
| 319 | * write 0 to bits 0-6 to ack all triggered IRQs. | ||
| 320 | */ | ||
| 321 | tmp &= 0xffffff00 & ~LDINTR_VEE; | ||
| 265 | lcdc_write(priv, _LDINTR, tmp); | 322 | lcdc_write(priv, _LDINTR, tmp); |
| 266 | 323 | ||
| 267 | /* figure out if this interrupt is for main or sub lcd */ | 324 | /* figure out if this interrupt is for main or sub lcd */ |
| 268 | is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0; | 325 | is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0; |
| 269 | 326 | ||
| 270 | /* wake up channel and disable clocks*/ | 327 | /* wake up channel and disable clocks */ |
| 271 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | 328 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
| 272 | ch = &priv->ch[k]; | 329 | ch = &priv->ch[k]; |
| 273 | 330 | ||
| 274 | if (!ch->enabled) | 331 | if (!ch->enabled) |
| 275 | continue; | 332 | continue; |
| 276 | 333 | ||
| 277 | if (is_sub == lcdc_chan_is_sublcd(ch)) { | 334 | /* Frame Start */ |
| 278 | ch->frame_end = 1; | 335 | if (ldintr & LDINTR_FS) { |
| 279 | wake_up(&ch->frame_end_wait); | 336 | if (is_sub == lcdc_chan_is_sublcd(ch)) { |
| 337 | ch->frame_end = 1; | ||
| 338 | wake_up(&ch->frame_end_wait); | ||
| 280 | 339 | ||
| 281 | sh_mobile_lcdc_clk_off(priv); | 340 | sh_mobile_lcdc_clk_off(priv); |
| 341 | } | ||
| 342 | } | ||
| 343 | |||
| 344 | /* VSYNC End */ | ||
| 345 | if (ldintr & LDINTR_VES) { | ||
| 346 | unsigned long ldrcntr = lcdc_read(priv, _LDRCNTR); | ||
| 347 | /* Set the source address for the next refresh */ | ||
| 348 | lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + | ||
| 349 | ch->new_pan_offset); | ||
| 350 | if (lcdc_chan_is_sublcd(ch)) | ||
| 351 | lcdc_write(ch->lcdc, _LDRCNTR, | ||
| 352 | ldrcntr ^ LDRCNTR_SRS); | ||
| 353 | else | ||
| 354 | lcdc_write(ch->lcdc, _LDRCNTR, | ||
| 355 | ldrcntr ^ LDRCNTR_MRS); | ||
| 356 | ch->pan_offset = ch->new_pan_offset; | ||
| 282 | } | 357 | } |
| 283 | } | 358 | } |
| 284 | 359 | ||
| @@ -520,7 +595,6 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv) | |||
| 520 | board_cfg = &ch->cfg.board_cfg; | 595 | board_cfg = &ch->cfg.board_cfg; |
| 521 | if (board_cfg->display_off) | 596 | if (board_cfg->display_off) |
| 522 | board_cfg->display_off(board_cfg->board_data); | 597 | board_cfg->display_off(board_cfg->board_data); |
| 523 | |||
| 524 | } | 598 | } |
| 525 | 599 | ||
| 526 | /* stop the lcdc */ | 600 | /* stop the lcdc */ |
| @@ -579,9 +653,6 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev, | |||
| 579 | int clock_source, | 653 | int clock_source, |
| 580 | struct sh_mobile_lcdc_priv *priv) | 654 | struct sh_mobile_lcdc_priv *priv) |
| 581 | { | 655 | { |
| 582 | #ifdef CONFIG_HAVE_CLK | ||
| 583 | char clk_name[8]; | ||
| 584 | #endif | ||
| 585 | char *str; | 656 | char *str; |
| 586 | int icksel; | 657 | int icksel; |
| 587 | 658 | ||
| @@ -595,25 +666,21 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev, | |||
| 595 | 666 | ||
| 596 | priv->lddckr = icksel << 16; | 667 | priv->lddckr = icksel << 16; |
| 597 | 668 | ||
| 598 | #ifdef CONFIG_HAVE_CLK | ||
| 599 | atomic_set(&priv->clk_usecnt, -1); | ||
| 600 | snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id); | ||
| 601 | priv->clk = clk_get(&pdev->dev, clk_name); | ||
| 602 | if (IS_ERR(priv->clk)) { | ||
| 603 | dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); | ||
| 604 | return PTR_ERR(priv->clk); | ||
| 605 | } | ||
| 606 | |||
| 607 | if (str) { | 669 | if (str) { |
| 608 | priv->dot_clk = clk_get(&pdev->dev, str); | 670 | priv->dot_clk = clk_get(&pdev->dev, str); |
| 609 | if (IS_ERR(priv->dot_clk)) { | 671 | if (IS_ERR(priv->dot_clk)) { |
| 610 | dev_err(&pdev->dev, "cannot get dot clock %s\n", str); | 672 | dev_err(&pdev->dev, "cannot get dot clock %s\n", str); |
| 611 | clk_put(priv->clk); | ||
| 612 | return PTR_ERR(priv->dot_clk); | 673 | return PTR_ERR(priv->dot_clk); |
| 613 | } | 674 | } |
| 614 | } | 675 | } |
| 615 | #endif | 676 | atomic_set(&priv->hw_usecnt, -1); |
| 616 | 677 | ||
| 678 | /* Runtime PM support involves two step for this driver: | ||
| 679 | * 1) Enable Runtime PM | ||
| 680 | * 2) Force Runtime PM Resume since hardware is accessed from probe() | ||
| 681 | */ | ||
| 682 | pm_runtime_enable(priv->dev); | ||
| 683 | pm_runtime_resume(priv->dev); | ||
| 617 | return 0; | 684 | return 0; |
| 618 | } | 685 | } |
| 619 | 686 | ||
| @@ -646,6 +713,9 @@ static struct fb_fix_screeninfo sh_mobile_lcdc_fix = { | |||
| 646 | .type = FB_TYPE_PACKED_PIXELS, | 713 | .type = FB_TYPE_PACKED_PIXELS, |
| 647 | .visual = FB_VISUAL_TRUECOLOR, | 714 | .visual = FB_VISUAL_TRUECOLOR, |
| 648 | .accel = FB_ACCEL_NONE, | 715 | .accel = FB_ACCEL_NONE, |
| 716 | .xpanstep = 0, | ||
| 717 | .ypanstep = 1, | ||
| 718 | .ywrapstep = 0, | ||
| 649 | }; | 719 | }; |
| 650 | 720 | ||
| 651 | static void sh_mobile_lcdc_fillrect(struct fb_info *info, | 721 | static void sh_mobile_lcdc_fillrect(struct fb_info *info, |
| @@ -669,13 +739,38 @@ static void sh_mobile_lcdc_imageblit(struct fb_info *info, | |||
| 669 | sh_mobile_lcdc_deferred_io_touch(info); | 739 | sh_mobile_lcdc_deferred_io_touch(info); |
| 670 | } | 740 | } |
| 671 | 741 | ||
| 742 | static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var, | ||
| 743 | struct fb_info *info) | ||
| 744 | { | ||
| 745 | struct sh_mobile_lcdc_chan *ch = info->par; | ||
| 746 | |||
| 747 | if (info->var.xoffset == var->xoffset && | ||
| 748 | info->var.yoffset == var->yoffset) | ||
| 749 | return 0; /* No change, do nothing */ | ||
| 750 | |||
| 751 | ch->new_pan_offset = (var->yoffset * info->fix.line_length) + | ||
| 752 | (var->xoffset * (info->var.bits_per_pixel / 8)); | ||
| 753 | |||
| 754 | if (ch->new_pan_offset != ch->pan_offset) { | ||
| 755 | unsigned long ldintr; | ||
| 756 | ldintr = lcdc_read(ch->lcdc, _LDINTR); | ||
| 757 | ldintr |= LDINTR_VEE; | ||
| 758 | lcdc_write(ch->lcdc, _LDINTR, ldintr); | ||
| 759 | sh_mobile_lcdc_deferred_io_touch(info); | ||
| 760 | } | ||
| 761 | |||
| 762 | return 0; | ||
| 763 | } | ||
| 764 | |||
| 672 | static struct fb_ops sh_mobile_lcdc_ops = { | 765 | static struct fb_ops sh_mobile_lcdc_ops = { |
| 766 | .owner = THIS_MODULE, | ||
| 673 | .fb_setcolreg = sh_mobile_lcdc_setcolreg, | 767 | .fb_setcolreg = sh_mobile_lcdc_setcolreg, |
| 674 | .fb_read = fb_sys_read, | 768 | .fb_read = fb_sys_read, |
| 675 | .fb_write = fb_sys_write, | 769 | .fb_write = fb_sys_write, |
| 676 | .fb_fillrect = sh_mobile_lcdc_fillrect, | 770 | .fb_fillrect = sh_mobile_lcdc_fillrect, |
| 677 | .fb_copyarea = sh_mobile_lcdc_copyarea, | 771 | .fb_copyarea = sh_mobile_lcdc_copyarea, |
| 678 | .fb_imageblit = sh_mobile_lcdc_imageblit, | 772 | .fb_imageblit = sh_mobile_lcdc_imageblit, |
| 773 | .fb_pan_display = sh_mobile_fb_pan_display, | ||
| 679 | }; | 774 | }; |
| 680 | 775 | ||
| 681 | static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp) | 776 | static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp) |
| @@ -731,9 +826,59 @@ static int sh_mobile_lcdc_resume(struct device *dev) | |||
| 731 | return sh_mobile_lcdc_start(platform_get_drvdata(pdev)); | 826 | return sh_mobile_lcdc_start(platform_get_drvdata(pdev)); |
| 732 | } | 827 | } |
| 733 | 828 | ||
| 829 | static int sh_mobile_lcdc_runtime_suspend(struct device *dev) | ||
| 830 | { | ||
| 831 | struct platform_device *pdev = to_platform_device(dev); | ||
| 832 | struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev); | ||
| 833 | struct sh_mobile_lcdc_chan *ch; | ||
| 834 | int k, n; | ||
| 835 | |||
| 836 | /* save per-channel registers */ | ||
| 837 | for (k = 0; k < ARRAY_SIZE(p->ch); k++) { | ||
| 838 | ch = &p->ch[k]; | ||
| 839 | if (!ch->enabled) | ||
| 840 | continue; | ||
| 841 | for (n = 0; n < NR_CH_REGS; n++) | ||
| 842 | ch->saved_ch_regs[n] = lcdc_read_chan(ch, n); | ||
| 843 | } | ||
| 844 | |||
| 845 | /* save shared registers */ | ||
| 846 | for (n = 0; n < NR_SHARED_REGS; n++) | ||
| 847 | p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]); | ||
| 848 | |||
| 849 | /* turn off LCDC hardware */ | ||
| 850 | lcdc_write(p, _LDCNT1R, 0); | ||
| 851 | return 0; | ||
| 852 | } | ||
| 853 | |||
| 854 | static int sh_mobile_lcdc_runtime_resume(struct device *dev) | ||
| 855 | { | ||
| 856 | struct platform_device *pdev = to_platform_device(dev); | ||
| 857 | struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev); | ||
| 858 | struct sh_mobile_lcdc_chan *ch; | ||
| 859 | int k, n; | ||
| 860 | |||
| 861 | /* restore per-channel registers */ | ||
| 862 | for (k = 0; k < ARRAY_SIZE(p->ch); k++) { | ||
| 863 | ch = &p->ch[k]; | ||
| 864 | if (!ch->enabled) | ||
| 865 | continue; | ||
| 866 | for (n = 0; n < NR_CH_REGS; n++) | ||
| 867 | lcdc_write_chan(ch, n, ch->saved_ch_regs[n]); | ||
| 868 | } | ||
| 869 | |||
| 870 | /* restore shared registers */ | ||
| 871 | for (n = 0; n < NR_SHARED_REGS; n++) | ||
| 872 | lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]); | ||
| 873 | |||
| 874 | return 0; | ||
| 875 | } | ||
| 876 | |||
| 734 | static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = { | 877 | static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = { |
| 735 | .suspend = sh_mobile_lcdc_suspend, | 878 | .suspend = sh_mobile_lcdc_suspend, |
| 736 | .resume = sh_mobile_lcdc_resume, | 879 | .resume = sh_mobile_lcdc_resume, |
| 880 | .runtime_suspend = sh_mobile_lcdc_runtime_suspend, | ||
| 881 | .runtime_resume = sh_mobile_lcdc_runtime_resume, | ||
| 737 | }; | 882 | }; |
| 738 | 883 | ||
| 739 | static int sh_mobile_lcdc_remove(struct platform_device *pdev); | 884 | static int sh_mobile_lcdc_remove(struct platform_device *pdev); |
| @@ -778,6 +923,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 778 | } | 923 | } |
| 779 | 924 | ||
| 780 | priv->irq = i; | 925 | priv->irq = i; |
| 926 | priv->dev = &pdev->dev; | ||
| 781 | platform_set_drvdata(pdev, priv); | 927 | platform_set_drvdata(pdev, priv); |
| 782 | pdata = pdev->dev.platform_data; | 928 | pdata = pdev->dev.platform_data; |
| 783 | 929 | ||
| @@ -792,6 +938,8 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 792 | goto err1; | 938 | goto err1; |
| 793 | } | 939 | } |
| 794 | init_waitqueue_head(&priv->ch[i].frame_end_wait); | 940 | init_waitqueue_head(&priv->ch[i].frame_end_wait); |
| 941 | priv->ch[j].pan_offset = 0; | ||
| 942 | priv->ch[j].new_pan_offset = 0; | ||
| 795 | 943 | ||
| 796 | switch (pdata->ch[i].chan) { | 944 | switch (pdata->ch[i].chan) { |
| 797 | case LCDC_CHAN_MAINLCD: | 945 | case LCDC_CHAN_MAINLCD: |
| @@ -834,7 +982,9 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 834 | info = priv->ch[i].info; | 982 | info = priv->ch[i].info; |
| 835 | info->fbops = &sh_mobile_lcdc_ops; | 983 | info->fbops = &sh_mobile_lcdc_ops; |
| 836 | info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres; | 984 | info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres; |
| 837 | info->var.yres = info->var.yres_virtual = cfg->lcd_cfg.yres; | 985 | info->var.yres = cfg->lcd_cfg.yres; |
| 986 | /* Default Y virtual resolution is 2x panel size */ | ||
| 987 | info->var.yres_virtual = info->var.yres * 2; | ||
| 838 | info->var.width = cfg->lcd_size_cfg.width; | 988 | info->var.width = cfg->lcd_size_cfg.width; |
| 839 | info->var.height = cfg->lcd_size_cfg.height; | 989 | info->var.height = cfg->lcd_size_cfg.height; |
| 840 | info->var.activate = FB_ACTIVATE_NOW; | 990 | info->var.activate = FB_ACTIVATE_NOW; |
| @@ -844,7 +994,8 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev) | |||
| 844 | 994 | ||
| 845 | info->fix = sh_mobile_lcdc_fix; | 995 | info->fix = sh_mobile_lcdc_fix; |
| 846 | info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8); | 996 | info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8); |
| 847 | info->fix.smem_len = info->fix.line_length * cfg->lcd_cfg.yres; | 997 | info->fix.smem_len = info->fix.line_length * |
| 998 | info->var.yres_virtual; | ||
| 848 | 999 | ||
| 849 | buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len, | 1000 | buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len, |
| 850 | &priv->ch[i].dma_handle, GFP_KERNEL); | 1001 | &priv->ch[i].dma_handle, GFP_KERNEL); |
| @@ -947,11 +1098,10 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev) | |||
| 947 | framebuffer_release(info); | 1098 | framebuffer_release(info); |
| 948 | } | 1099 | } |
| 949 | 1100 | ||
| 950 | #ifdef CONFIG_HAVE_CLK | ||
| 951 | if (priv->dot_clk) | 1101 | if (priv->dot_clk) |
| 952 | clk_put(priv->dot_clk); | 1102 | clk_put(priv->dot_clk); |
| 953 | clk_put(priv->clk); | 1103 | |
| 954 | #endif | 1104 | pm_runtime_disable(priv->dev); |
| 955 | 1105 | ||
| 956 | if (priv->base) | 1106 | if (priv->base) |
| 957 | iounmap(priv->base); | 1107 | iounmap(priv->base); |
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index b1ccc04f3c9a..ff3eb8ff6bd7 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
| @@ -55,6 +55,13 @@ config SOFT_WATCHDOG | |||
| 55 | To compile this driver as a module, choose M here: the | 55 | To compile this driver as a module, choose M here: the |
| 56 | module will be called softdog. | 56 | module will be called softdog. |
| 57 | 57 | ||
| 58 | config WM831X_WATCHDOG | ||
| 59 | tristate "WM831x watchdog" | ||
| 60 | depends on MFD_WM831X | ||
| 61 | help | ||
| 62 | Support for the watchdog in the WM831x AudioPlus PMICs. When | ||
| 63 | the watchdog triggers the system will be reset. | ||
| 64 | |||
| 58 | config WM8350_WATCHDOG | 65 | config WM8350_WATCHDOG |
| 59 | tristate "WM8350 watchdog" | 66 | tristate "WM8350 watchdog" |
| 60 | depends on MFD_WM8350 | 67 | depends on MFD_WM8350 |
| @@ -266,6 +273,15 @@ config STMP3XXX_WATCHDOG | |||
| 266 | To compile this driver as a module, choose M here: the | 273 | To compile this driver as a module, choose M here: the |
| 267 | module will be called stmp3xxx_wdt. | 274 | module will be called stmp3xxx_wdt. |
| 268 | 275 | ||
| 276 | config NUC900_WATCHDOG | ||
| 277 | tristate "Nuvoton NUC900 watchdog" | ||
| 278 | depends on ARCH_W90X900 | ||
| 279 | help | ||
| 280 | Say Y here if to include support for the watchdog timer | ||
| 281 | for the Nuvoton NUC900 series SoCs. | ||
| 282 | To compile this driver as a module, choose M here: the | ||
| 283 | module will be called nuc900_wdt. | ||
| 284 | |||
| 269 | # AVR32 Architecture | 285 | # AVR32 Architecture |
| 270 | 286 | ||
| 271 | config AT32AP700X_WDT | 287 | config AT32AP700X_WDT |
| @@ -369,6 +385,28 @@ config SC520_WDT | |||
| 369 | You can compile this driver directly into the kernel, or use | 385 | You can compile this driver directly into the kernel, or use |
| 370 | it as a module. The module will be called sc520_wdt. | 386 | it as a module. The module will be called sc520_wdt. |
| 371 | 387 | ||
| 388 | config SBC_FITPC2_WATCHDOG | ||
| 389 | tristate "Compulab SBC-FITPC2 watchdog" | ||
| 390 | depends on X86 | ||
| 391 | ---help--- | ||
| 392 | This is the driver for the built-in watchdog timer on the fit-PC2 | ||
| 393 | Single-board computer made by Compulab. | ||
| 394 | |||
| 395 | It`s possible to enable watchdog timer either from BIOS (F2) or from booted Linux. | ||
| 396 | When "Watchdog Timer Value" enabled one can set 31-255 s operational range. | ||
| 397 | |||
| 398 | Entering BIOS setup temporary disables watchdog operation regardless to current state, | ||
| 399 | so system will not be restarted while user in BIOS setup. | ||
| 400 | |||
| 401 | Once watchdog was enabled the system will be restarted every | ||
| 402 | "Watchdog Timer Value" period, so to prevent it user can restart or | ||
| 403 | disable the watchdog. | ||
| 404 | |||
| 405 | To compile this driver as a module, choose M here: the | ||
| 406 | module will be called sbc_fitpc2_wdt. | ||
| 407 | |||
| 408 | Most people will say N. | ||
| 409 | |||
| 372 | config EUROTECH_WDT | 410 | config EUROTECH_WDT |
| 373 | tristate "Eurotech CPU-1220/1410 Watchdog Timer" | 411 | tristate "Eurotech CPU-1220/1410 Watchdog Timer" |
| 374 | depends on X86 | 412 | depends on X86 |
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 3d774294a2b7..348b3b862c99 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile | |||
| @@ -44,6 +44,7 @@ obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o | |||
| 44 | obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o | 44 | obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o |
| 45 | obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o | 45 | obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o |
| 46 | obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o | 46 | obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o |
| 47 | obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o | ||
| 47 | 48 | ||
| 48 | # AVR32 Architecture | 49 | # AVR32 Architecture |
| 49 | obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o | 50 | obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o |
| @@ -64,6 +65,7 @@ obj-$(CONFIG_ALIM1535_WDT) += alim1535_wdt.o | |||
| 64 | obj-$(CONFIG_ALIM7101_WDT) += alim7101_wdt.o | 65 | obj-$(CONFIG_ALIM7101_WDT) += alim7101_wdt.o |
| 65 | obj-$(CONFIG_GEODE_WDT) += geodewdt.o | 66 | obj-$(CONFIG_GEODE_WDT) += geodewdt.o |
| 66 | obj-$(CONFIG_SC520_WDT) += sc520_wdt.o | 67 | obj-$(CONFIG_SC520_WDT) += sc520_wdt.o |
| 68 | obj-$(CONFIG_SBC_FITPC2_WATCHDOG) += sbc_fitpc2_wdt.o | ||
| 67 | obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o | 69 | obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o |
| 68 | obj-$(CONFIG_IB700_WDT) += ib700wdt.o | 70 | obj-$(CONFIG_IB700_WDT) += ib700wdt.o |
| 69 | obj-$(CONFIG_IBMASR) += ibmasr.o | 71 | obj-$(CONFIG_IBMASR) += ibmasr.o |
| @@ -139,5 +141,6 @@ obj-$(CONFIG_WATCHDOG_CP1XXX) += cpwd.o | |||
| 139 | # XTENSA Architecture | 141 | # XTENSA Architecture |
| 140 | 142 | ||
| 141 | # Architecture Independant | 143 | # Architecture Independant |
| 144 | obj-$(CONFIG_WM831X_WATCHDOG) += wm831x_wdt.o | ||
| 142 | obj-$(CONFIG_WM8350_WATCHDOG) += wm8350_wdt.o | 145 | obj-$(CONFIG_WM8350_WATCHDOG) += wm8350_wdt.o |
| 143 | obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o | 146 | obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o |
diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c index 2f8643efe92c..2e94b71b20d9 100644 --- a/drivers/watchdog/ar7_wdt.c +++ b/drivers/watchdog/ar7_wdt.c | |||
| @@ -28,9 +28,8 @@ | |||
| 28 | #include <linux/errno.h> | 28 | #include <linux/errno.h> |
| 29 | #include <linux/init.h> | 29 | #include <linux/init.h> |
| 30 | #include <linux/miscdevice.h> | 30 | #include <linux/miscdevice.h> |
| 31 | #include <linux/platform_device.h> | ||
| 31 | #include <linux/watchdog.h> | 32 | #include <linux/watchdog.h> |
| 32 | #include <linux/notifier.h> | ||
| 33 | #include <linux/reboot.h> | ||
| 34 | #include <linux/fs.h> | 33 | #include <linux/fs.h> |
| 35 | #include <linux/ioport.h> | 34 | #include <linux/ioport.h> |
| 36 | #include <linux/io.h> | 35 | #include <linux/io.h> |
| @@ -76,24 +75,10 @@ static unsigned expect_close; | |||
| 76 | /* XXX currently fixed, allows max margin ~68.72 secs */ | 75 | /* XXX currently fixed, allows max margin ~68.72 secs */ |
| 77 | #define prescale_value 0xffff | 76 | #define prescale_value 0xffff |
| 78 | 77 | ||
| 79 | /* Offset of the WDT registers */ | 78 | /* Resource of the WDT registers */ |
| 80 | static unsigned long ar7_regs_wdt; | 79 | static struct resource *ar7_regs_wdt; |
| 81 | /* Pointer to the remapped WDT IO space */ | 80 | /* Pointer to the remapped WDT IO space */ |
| 82 | static struct ar7_wdt *ar7_wdt; | 81 | static struct ar7_wdt *ar7_wdt; |
| 83 | static void ar7_wdt_get_regs(void) | ||
| 84 | { | ||
| 85 | u16 chip_id = ar7_chip_id(); | ||
| 86 | switch (chip_id) { | ||
| 87 | case AR7_CHIP_7100: | ||
| 88 | case AR7_CHIP_7200: | ||
| 89 | ar7_regs_wdt = AR7_REGS_WDT; | ||
| 90 | break; | ||
| 91 | default: | ||
| 92 | ar7_regs_wdt = UR8_REGS_WDT; | ||
| 93 | break; | ||
| 94 | } | ||
| 95 | } | ||
| 96 | |||
| 97 | 82 | ||
| 98 | static void ar7_wdt_kick(u32 value) | 83 | static void ar7_wdt_kick(u32 value) |
| 99 | { | 84 | { |
| @@ -202,20 +187,6 @@ static int ar7_wdt_release(struct inode *inode, struct file *file) | |||
| 202 | return 0; | 187 | return 0; |
| 203 | } | 188 | } |
| 204 | 189 | ||
| 205 | static int ar7_wdt_notify_sys(struct notifier_block *this, | ||
| 206 | unsigned long code, void *unused) | ||
| 207 | { | ||
| 208 | if (code == SYS_HALT || code == SYS_POWER_OFF) | ||
| 209 | if (!nowayout) | ||
| 210 | ar7_wdt_disable_wdt(); | ||
| 211 | |||
| 212 | return NOTIFY_DONE; | ||
| 213 | } | ||
| 214 | |||
| 215 | static struct notifier_block ar7_wdt_notifier = { | ||
| 216 | .notifier_call = ar7_wdt_notify_sys, | ||
| 217 | }; | ||
| 218 | |||
| 219 | static ssize_t ar7_wdt_write(struct file *file, const char *data, | 190 | static ssize_t ar7_wdt_write(struct file *file, const char *data, |
| 220 | size_t len, loff_t *ppos) | 191 | size_t len, loff_t *ppos) |
| 221 | { | 192 | { |
| @@ -299,56 +270,86 @@ static struct miscdevice ar7_wdt_miscdev = { | |||
| 299 | .fops = &ar7_wdt_fops, | 270 | .fops = &ar7_wdt_fops, |
| 300 | }; | 271 | }; |
| 301 | 272 | ||
| 302 | static int __init ar7_wdt_init(void) | 273 | static int __devinit ar7_wdt_probe(struct platform_device *pdev) |
| 303 | { | 274 | { |
| 304 | int rc; | 275 | int rc; |
| 305 | 276 | ||
| 306 | spin_lock_init(&wdt_lock); | 277 | spin_lock_init(&wdt_lock); |
| 307 | 278 | ||
| 308 | ar7_wdt_get_regs(); | 279 | ar7_regs_wdt = |
| 280 | platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); | ||
| 281 | if (!ar7_regs_wdt) { | ||
| 282 | printk(KERN_ERR DRVNAME ": could not get registers resource\n"); | ||
| 283 | rc = -ENODEV; | ||
| 284 | goto out; | ||
| 285 | } | ||
| 309 | 286 | ||
| 310 | if (!request_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt), | 287 | if (!request_mem_region(ar7_regs_wdt->start, |
| 311 | LONGNAME)) { | 288 | resource_size(ar7_regs_wdt), LONGNAME)) { |
| 312 | printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n"); | 289 | printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n"); |
| 313 | return -EBUSY; | 290 | rc = -EBUSY; |
| 291 | goto out; | ||
| 314 | } | 292 | } |
| 315 | 293 | ||
| 316 | ar7_wdt = (struct ar7_wdt *) | 294 | ar7_wdt = ioremap(ar7_regs_wdt->start, resource_size(ar7_regs_wdt)); |
| 317 | ioremap(ar7_regs_wdt, sizeof(struct ar7_wdt)); | 295 | if (!ar7_wdt) { |
| 296 | printk(KERN_ERR DRVNAME ": could not ioremap registers\n"); | ||
| 297 | rc = -ENXIO; | ||
| 298 | goto out_mem_region; | ||
| 299 | } | ||
| 318 | 300 | ||
| 319 | ar7_wdt_disable_wdt(); | 301 | ar7_wdt_disable_wdt(); |
| 320 | ar7_wdt_prescale(prescale_value); | 302 | ar7_wdt_prescale(prescale_value); |
| 321 | ar7_wdt_update_margin(margin); | 303 | ar7_wdt_update_margin(margin); |
| 322 | 304 | ||
| 323 | rc = register_reboot_notifier(&ar7_wdt_notifier); | ||
| 324 | if (rc) { | ||
| 325 | printk(KERN_ERR DRVNAME | ||
| 326 | ": unable to register reboot notifier\n"); | ||
| 327 | goto out_alloc; | ||
| 328 | } | ||
| 329 | |||
| 330 | rc = misc_register(&ar7_wdt_miscdev); | 305 | rc = misc_register(&ar7_wdt_miscdev); |
| 331 | if (rc) { | 306 | if (rc) { |
| 332 | printk(KERN_ERR DRVNAME ": unable to register misc device\n"); | 307 | printk(KERN_ERR DRVNAME ": unable to register misc device\n"); |
| 333 | goto out_register; | 308 | goto out_alloc; |
| 334 | } | 309 | } |
| 335 | goto out; | 310 | goto out; |
| 336 | 311 | ||
| 337 | out_register: | ||
| 338 | unregister_reboot_notifier(&ar7_wdt_notifier); | ||
| 339 | out_alloc: | 312 | out_alloc: |
| 340 | iounmap(ar7_wdt); | 313 | iounmap(ar7_wdt); |
| 341 | release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); | 314 | out_mem_region: |
| 315 | release_mem_region(ar7_regs_wdt->start, resource_size(ar7_regs_wdt)); | ||
| 342 | out: | 316 | out: |
| 343 | return rc; | 317 | return rc; |
| 344 | } | 318 | } |
| 345 | 319 | ||
| 346 | static void __exit ar7_wdt_cleanup(void) | 320 | static int __devexit ar7_wdt_remove(struct platform_device *pdev) |
| 347 | { | 321 | { |
| 348 | misc_deregister(&ar7_wdt_miscdev); | 322 | misc_deregister(&ar7_wdt_miscdev); |
| 349 | unregister_reboot_notifier(&ar7_wdt_notifier); | ||
| 350 | iounmap(ar7_wdt); | 323 | iounmap(ar7_wdt); |
| 351 | release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); | 324 | release_mem_region(ar7_regs_wdt->start, resource_size(ar7_regs_wdt)); |
| 325 | |||
| 326 | return 0; | ||
| 327 | } | ||
| 328 | |||
| 329 | static void ar7_wdt_shutdown(struct platform_device *pdev) | ||
| 330 | { | ||
| 331 | if (!nowayout) | ||
| 332 | ar7_wdt_disable_wdt(); | ||
| 333 | } | ||
| 334 | |||
| 335 | static struct platform_driver ar7_wdt_driver = { | ||
| 336 | .probe = ar7_wdt_probe, | ||
| 337 | .remove = __devexit_p(ar7_wdt_remove), | ||
| 338 | .shutdown = ar7_wdt_shutdown, | ||
| 339 | .driver = { | ||
| 340 | .owner = THIS_MODULE, | ||
| 341 | .name = "ar7_wdt", | ||
| 342 | }, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static int __init ar7_wdt_init(void) | ||
| 346 | { | ||
| 347 | return platform_driver_register(&ar7_wdt_driver); | ||
| 348 | } | ||
| 349 | |||
| 350 | static void __exit ar7_wdt_cleanup(void) | ||
| 351 | { | ||
| 352 | platform_driver_unregister(&ar7_wdt_driver); | ||
| 352 | } | 353 | } |
| 353 | 354 | ||
| 354 | module_init(ar7_wdt_init); | 355 | module_init(ar7_wdt_init); |
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c index 225398fd5049..e8380ef65c1c 100644 --- a/drivers/watchdog/booke_wdt.c +++ b/drivers/watchdog/booke_wdt.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | 22 | ||
| 23 | #include <asm/reg_booke.h> | 23 | #include <asm/reg_booke.h> |
| 24 | #include <asm/system.h> | 24 | #include <asm/system.h> |
| 25 | #include <asm/time.h> | ||
| 26 | #include <asm/div64.h> | ||
| 25 | 27 | ||
| 26 | /* If the kernel parameter wdt=1, the watchdog will be enabled at boot. | 28 | /* If the kernel parameter wdt=1, the watchdog will be enabled at boot. |
| 27 | * Also, the wdt_period sets the watchdog timer period timeout. | 29 | * Also, the wdt_period sets the watchdog timer period timeout. |
| @@ -32,7 +34,7 @@ | |||
| 32 | */ | 34 | */ |
| 33 | 35 | ||
| 34 | #ifdef CONFIG_FSL_BOOKE | 36 | #ifdef CONFIG_FSL_BOOKE |
| 35 | #define WDT_PERIOD_DEFAULT 63 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */ | 37 | #define WDT_PERIOD_DEFAULT 38 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */ |
| 36 | #else | 38 | #else |
| 37 | #define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */ | 39 | #define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */ |
| 38 | #endif /* for timing information */ | 40 | #endif /* for timing information */ |
| @@ -41,7 +43,7 @@ u32 booke_wdt_enabled; | |||
| 41 | u32 booke_wdt_period = WDT_PERIOD_DEFAULT; | 43 | u32 booke_wdt_period = WDT_PERIOD_DEFAULT; |
| 42 | 44 | ||
| 43 | #ifdef CONFIG_FSL_BOOKE | 45 | #ifdef CONFIG_FSL_BOOKE |
| 44 | #define WDTP(x) ((((63-x)&0x3)<<30)|(((63-x)&0x3c)<<15)) | 46 | #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15)) |
| 45 | #define WDTP_MASK (WDTP(0)) | 47 | #define WDTP_MASK (WDTP(0)) |
| 46 | #else | 48 | #else |
| 47 | #define WDTP(x) (TCR_WP(x)) | 49 | #define WDTP(x) (TCR_WP(x)) |
| @@ -50,6 +52,45 @@ u32 booke_wdt_period = WDT_PERIOD_DEFAULT; | |||
| 50 | 52 | ||
| 51 | static DEFINE_SPINLOCK(booke_wdt_lock); | 53 | static DEFINE_SPINLOCK(booke_wdt_lock); |
| 52 | 54 | ||
| 55 | /* For the specified period, determine the number of seconds | ||
| 56 | * corresponding to the reset time. There will be a watchdog | ||
| 57 | * exception at approximately 3/5 of this time. | ||
| 58 | * | ||
| 59 | * The formula to calculate this is given by: | ||
| 60 | * 2.5 * (2^(63-period+1)) / timebase_freq | ||
| 61 | * | ||
| 62 | * In order to simplify things, we assume that period is | ||
| 63 | * at least 1. This will still result in a very long timeout. | ||
| 64 | */ | ||
| 65 | static unsigned long long period_to_sec(unsigned int period) | ||
| 66 | { | ||
| 67 | unsigned long long tmp = 1ULL << (64 - period); | ||
| 68 | unsigned long tmp2 = ppc_tb_freq; | ||
| 69 | |||
| 70 | /* tmp may be a very large number and we don't want to overflow, | ||
| 71 | * so divide the timebase freq instead of multiplying tmp | ||
| 72 | */ | ||
| 73 | tmp2 = tmp2 / 5 * 2; | ||
| 74 | |||
| 75 | do_div(tmp, tmp2); | ||
| 76 | return tmp; | ||
| 77 | } | ||
| 78 | |||
| 79 | /* | ||
| 80 | * This procedure will find the highest period which will give a timeout | ||
| 81 | * greater than the one required. e.g. for a bus speed of 66666666 and | ||
| 82 | * and a parameter of 2 secs, then this procedure will return a value of 38. | ||
| 83 | */ | ||
| 84 | static unsigned int sec_to_period(unsigned int secs) | ||
| 85 | { | ||
| 86 | unsigned int period; | ||
| 87 | for (period = 63; period > 0; period--) { | ||
| 88 | if (period_to_sec(period) >= secs) | ||
| 89 | return period; | ||
| 90 | } | ||
| 91 | return 0; | ||
| 92 | } | ||
| 93 | |||
| 53 | static void __booke_wdt_ping(void *data) | 94 | static void __booke_wdt_ping(void *data) |
| 54 | { | 95 | { |
| 55 | mtspr(SPRN_TSR, TSR_ENW|TSR_WIS); | 96 | mtspr(SPRN_TSR, TSR_ENW|TSR_WIS); |
| @@ -93,7 +134,7 @@ static long booke_wdt_ioctl(struct file *file, | |||
| 93 | 134 | ||
| 94 | switch (cmd) { | 135 | switch (cmd) { |
| 95 | case WDIOC_GETSUPPORT: | 136 | case WDIOC_GETSUPPORT: |
| 96 | if (copy_to_user(arg, &ident, sizeof(struct watchdog_info))) | 137 | if (copy_to_user((void *)arg, &ident, sizeof(ident))) |
| 97 | return -EFAULT; | 138 | return -EFAULT; |
| 98 | case WDIOC_GETSTATUS: | 139 | case WDIOC_GETSTATUS: |
| 99 | return put_user(ident.options, p); | 140 | return put_user(ident.options, p); |
| @@ -115,8 +156,16 @@ static long booke_wdt_ioctl(struct file *file, | |||
| 115 | booke_wdt_ping(); | 156 | booke_wdt_ping(); |
| 116 | return 0; | 157 | return 0; |
| 117 | case WDIOC_SETTIMEOUT: | 158 | case WDIOC_SETTIMEOUT: |
| 118 | if (get_user(booke_wdt_period, p)) | 159 | if (get_user(tmp, p)) |
| 119 | return -EFAULT; | 160 | return -EFAULT; |
| 161 | #ifdef CONFIG_FSL_BOOKE | ||
| 162 | /* period of 1 gives the largest possible timeout */ | ||
| 163 | if (tmp > period_to_sec(1)) | ||
| 164 | return -EINVAL; | ||
| 165 | booke_wdt_period = sec_to_period(tmp); | ||
| 166 | #else | ||
| 167 | booke_wdt_period = tmp; | ||
| 168 | #endif | ||
| 120 | mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) | | 169 | mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) | |
| 121 | WDTP(booke_wdt_period)); | 170 | WDTP(booke_wdt_period)); |
| 122 | return 0; | 171 | return 0; |
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c index aec7cefdef21..381026c0bd7b 100644 --- a/drivers/watchdog/coh901327_wdt.c +++ b/drivers/watchdog/coh901327_wdt.c | |||
| @@ -110,7 +110,7 @@ static void coh901327_enable(u16 timeout) | |||
| 110 | * Wait 3 32 kHz cycles for it to take effect | 110 | * Wait 3 32 kHz cycles for it to take effect |
| 111 | */ | 111 | */ |
| 112 | freq = clk_get_rate(clk); | 112 | freq = clk_get_rate(clk); |
| 113 | delay_ns = (1000000000 + freq - 1) / freq; /* Freq to ns and round up */ | 113 | delay_ns = DIV_ROUND_UP(1000000000, freq); /* Freq to ns and round up */ |
| 114 | delay_ns = 3 * delay_ns; /* Wait 3 cycles */ | 114 | delay_ns = 3 * delay_ns; /* Wait 3 cycles */ |
| 115 | ndelay(delay_ns); | 115 | ndelay(delay_ns); |
| 116 | /* Enable the watchdog interrupt */ | 116 | /* Enable the watchdog interrupt */ |
diff --git a/drivers/watchdog/davinci_wdt.c b/drivers/watchdog/davinci_wdt.c index 83e22e7ea4a2..9d7520fa9e9c 100644 --- a/drivers/watchdog/davinci_wdt.c +++ b/drivers/watchdog/davinci_wdt.c | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #include <linux/uaccess.h> | 25 | #include <linux/uaccess.h> |
| 26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
| 27 | #include <linux/device.h> | 27 | #include <linux/device.h> |
| 28 | #include <linux/clk.h> | ||
| 28 | 29 | ||
| 29 | #define MODULE_NAME "DAVINCI-WDT: " | 30 | #define MODULE_NAME "DAVINCI-WDT: " |
| 30 | 31 | ||
| @@ -69,6 +70,7 @@ static unsigned long wdt_status; | |||
| 69 | 70 | ||
| 70 | static struct resource *wdt_mem; | 71 | static struct resource *wdt_mem; |
| 71 | static void __iomem *wdt_base; | 72 | static void __iomem *wdt_base; |
| 73 | struct clk *wdt_clk; | ||
| 72 | 74 | ||
| 73 | static void wdt_service(void) | 75 | static void wdt_service(void) |
| 74 | { | 76 | { |
| @@ -86,6 +88,9 @@ static void wdt_enable(void) | |||
| 86 | { | 88 | { |
| 87 | u32 tgcr; | 89 | u32 tgcr; |
| 88 | u32 timer_margin; | 90 | u32 timer_margin; |
| 91 | unsigned long wdt_freq; | ||
| 92 | |||
| 93 | wdt_freq = clk_get_rate(wdt_clk); | ||
| 89 | 94 | ||
| 90 | spin_lock(&io_lock); | 95 | spin_lock(&io_lock); |
| 91 | 96 | ||
| @@ -99,9 +104,9 @@ static void wdt_enable(void) | |||
| 99 | iowrite32(0, wdt_base + TIM12); | 104 | iowrite32(0, wdt_base + TIM12); |
| 100 | iowrite32(0, wdt_base + TIM34); | 105 | iowrite32(0, wdt_base + TIM34); |
| 101 | /* set timeout period */ | 106 | /* set timeout period */ |
| 102 | timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff); | 107 | timer_margin = (((u64)heartbeat * wdt_freq) & 0xffffffff); |
| 103 | iowrite32(timer_margin, wdt_base + PRD12); | 108 | iowrite32(timer_margin, wdt_base + PRD12); |
| 104 | timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32); | 109 | timer_margin = (((u64)heartbeat * wdt_freq) >> 32); |
| 105 | iowrite32(timer_margin, wdt_base + PRD34); | 110 | iowrite32(timer_margin, wdt_base + PRD34); |
| 106 | /* enable run continuously */ | 111 | /* enable run continuously */ |
| 107 | iowrite32(ENAMODE12_PERIODIC, wdt_base + TCR); | 112 | iowrite32(ENAMODE12_PERIODIC, wdt_base + TCR); |
| @@ -199,6 +204,12 @@ static int __devinit davinci_wdt_probe(struct platform_device *pdev) | |||
| 199 | struct resource *res; | 204 | struct resource *res; |
| 200 | struct device *dev = &pdev->dev; | 205 | struct device *dev = &pdev->dev; |
| 201 | 206 | ||
| 207 | wdt_clk = clk_get(dev, NULL); | ||
| 208 | if (WARN_ON(IS_ERR(wdt_clk))) | ||
| 209 | return PTR_ERR(wdt_clk); | ||
| 210 | |||
| 211 | clk_enable(wdt_clk); | ||
| 212 | |||
| 202 | if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) | 213 | if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) |
| 203 | heartbeat = DEFAULT_HEARTBEAT; | 214 | heartbeat = DEFAULT_HEARTBEAT; |
| 204 | 215 | ||
| @@ -245,6 +256,10 @@ static int __devexit davinci_wdt_remove(struct platform_device *pdev) | |||
| 245 | kfree(wdt_mem); | 256 | kfree(wdt_mem); |
| 246 | wdt_mem = NULL; | 257 | wdt_mem = NULL; |
| 247 | } | 258 | } |
| 259 | |||
| 260 | clk_disable(wdt_clk); | ||
| 261 | clk_put(wdt_clk); | ||
| 262 | |||
| 248 | return 0; | 263 | return 0; |
| 249 | } | 264 | } |
| 250 | 265 | ||
diff --git a/drivers/watchdog/iop_wdt.c b/drivers/watchdog/iop_wdt.c index 0c9059676690..aef94789019f 100644 --- a/drivers/watchdog/iop_wdt.c +++ b/drivers/watchdog/iop_wdt.c | |||
| @@ -139,7 +139,7 @@ static long iop_wdt_ioctl(struct file *file, | |||
| 139 | 139 | ||
| 140 | switch (cmd) { | 140 | switch (cmd) { |
| 141 | case WDIOC_GETSUPPORT: | 141 | case WDIOC_GETSUPPORT: |
| 142 | if (copy_to_user(argp, &ident, sizeof ident)) | 142 | if (copy_to_user(argp, &ident, sizeof(ident))) |
| 143 | ret = -EFAULT; | 143 | ret = -EFAULT; |
| 144 | else | 144 | else |
| 145 | ret = 0; | 145 | ret = 0; |
diff --git a/drivers/watchdog/nuc900_wdt.c b/drivers/watchdog/nuc900_wdt.c new file mode 100644 index 000000000000..adefe3a9d510 --- /dev/null +++ b/drivers/watchdog/nuc900_wdt.c | |||
| @@ -0,0 +1,353 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2009 Nuvoton technology corporation. | ||
| 3 | * | ||
| 4 | * Wan ZongShun <mcuos.com@gmail.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation;version 2 of the License. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/bitops.h> | ||
| 13 | #include <linux/errno.h> | ||
| 14 | #include <linux/fs.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/clk.h> | ||
| 18 | #include <linux/kernel.h> | ||
| 19 | #include <linux/miscdevice.h> | ||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/moduleparam.h> | ||
| 22 | #include <linux/platform_device.h> | ||
| 23 | #include <linux/interrupt.h> | ||
| 24 | #include <linux/types.h> | ||
| 25 | #include <linux/watchdog.h> | ||
| 26 | #include <linux/uaccess.h> | ||
| 27 | |||
| 28 | #define REG_WTCR 0x1c | ||
| 29 | #define WTCLK (0x01 << 10) | ||
| 30 | #define WTE (0x01 << 7) /*wdt enable*/ | ||
| 31 | #define WTIS (0x03 << 4) | ||
| 32 | #define WTIF (0x01 << 3) | ||
| 33 | #define WTRF (0x01 << 2) | ||
| 34 | #define WTRE (0x01 << 1) | ||
| 35 | #define WTR (0x01 << 0) | ||
| 36 | /* | ||
| 37 | * The watchdog time interval can be calculated via following formula: | ||
| 38 | * WTIS real time interval (formula) | ||
| 39 | * 0x00 ((2^ 14 ) * ((external crystal freq) / 256))seconds | ||
| 40 | * 0x01 ((2^ 16 ) * ((external crystal freq) / 256))seconds | ||
| 41 | * 0x02 ((2^ 18 ) * ((external crystal freq) / 256))seconds | ||
| 42 | * 0x03 ((2^ 20 ) * ((external crystal freq) / 256))seconds | ||
| 43 | * | ||
| 44 | * The external crystal freq is 15Mhz in the nuc900 evaluation board. | ||
| 45 | * So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds, | ||
| 46 | * 0x03 = +- 16.92 seconds.. | ||
| 47 | */ | ||
| 48 | #define WDT_HW_TIMEOUT 0x02 | ||
| 49 | #define WDT_TIMEOUT (HZ/2) | ||
| 50 | #define WDT_HEARTBEAT 15 | ||
| 51 | |||
| 52 | static int heartbeat = WDT_HEARTBEAT; | ||
| 53 | module_param(heartbeat, int, 0); | ||
| 54 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. " | ||
| 55 | "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")"); | ||
| 56 | |||
| 57 | static int nowayout = WATCHDOG_NOWAYOUT; | ||
| 58 | module_param(nowayout, int, 0); | ||
| 59 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " | ||
| 60 | "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | ||
| 61 | |||
| 62 | struct nuc900_wdt { | ||
| 63 | struct resource *res; | ||
| 64 | struct clk *wdt_clock; | ||
| 65 | struct platform_device *pdev; | ||
| 66 | void __iomem *wdt_base; | ||
| 67 | char expect_close; | ||
| 68 | struct timer_list timer; | ||
| 69 | spinlock_t wdt_lock; | ||
| 70 | unsigned long next_heartbeat; | ||
| 71 | }; | ||
| 72 | |||
| 73 | static unsigned long nuc900wdt_busy; | ||
| 74 | struct nuc900_wdt *nuc900_wdt; | ||
| 75 | |||
| 76 | static inline void nuc900_wdt_keepalive(void) | ||
| 77 | { | ||
| 78 | unsigned int val; | ||
| 79 | |||
| 80 | spin_lock(&nuc900_wdt->wdt_lock); | ||
| 81 | |||
| 82 | val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR); | ||
| 83 | val |= (WTR | WTIF); | ||
| 84 | __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR); | ||
| 85 | |||
| 86 | spin_unlock(&nuc900_wdt->wdt_lock); | ||
| 87 | } | ||
| 88 | |||
| 89 | static inline void nuc900_wdt_start(void) | ||
| 90 | { | ||
| 91 | unsigned int val; | ||
| 92 | |||
| 93 | spin_lock(&nuc900_wdt->wdt_lock); | ||
| 94 | |||
| 95 | val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR); | ||
| 96 | val |= (WTRE | WTE | WTR | WTCLK | WTIF); | ||
| 97 | val &= ~WTIS; | ||
| 98 | val |= (WDT_HW_TIMEOUT << 0x04); | ||
| 99 | __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR); | ||
| 100 | |||
| 101 | spin_unlock(&nuc900_wdt->wdt_lock); | ||
| 102 | |||
| 103 | nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ; | ||
| 104 | mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT); | ||
| 105 | } | ||
| 106 | |||
| 107 | static inline void nuc900_wdt_stop(void) | ||
| 108 | { | ||
| 109 | unsigned int val; | ||
| 110 | |||
| 111 | del_timer(&nuc900_wdt->timer); | ||
| 112 | |||
| 113 | spin_lock(&nuc900_wdt->wdt_lock); | ||
| 114 | |||
| 115 | val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR); | ||
| 116 | val &= ~WTE; | ||
| 117 | __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR); | ||
| 118 | |||
| 119 | spin_unlock(&nuc900_wdt->wdt_lock); | ||
| 120 | } | ||
| 121 | |||
| 122 | static inline void nuc900_wdt_ping(void) | ||
| 123 | { | ||
| 124 | nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ; | ||
| 125 | } | ||
| 126 | |||
| 127 | static int nuc900_wdt_open(struct inode *inode, struct file *file) | ||
| 128 | { | ||
| 129 | |||
| 130 | if (test_and_set_bit(0, &nuc900wdt_busy)) | ||
| 131 | return -EBUSY; | ||
| 132 | |||
| 133 | nuc900_wdt_start(); | ||
| 134 | |||
| 135 | return nonseekable_open(inode, file); | ||
| 136 | } | ||
| 137 | |||
| 138 | static int nuc900_wdt_close(struct inode *inode, struct file *file) | ||
| 139 | { | ||
| 140 | if (nuc900_wdt->expect_close == 42) | ||
| 141 | nuc900_wdt_stop(); | ||
| 142 | else { | ||
| 143 | dev_crit(&nuc900_wdt->pdev->dev, | ||
| 144 | "Unexpected close, not stopping watchdog!\n"); | ||
| 145 | nuc900_wdt_ping(); | ||
| 146 | } | ||
| 147 | |||
| 148 | nuc900_wdt->expect_close = 0; | ||
| 149 | clear_bit(0, &nuc900wdt_busy); | ||
| 150 | return 0; | ||
| 151 | } | ||
| 152 | |||
| 153 | static const struct watchdog_info nuc900_wdt_info = { | ||
| 154 | .identity = "nuc900 watchdog", | ||
| 155 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | | ||
| 156 | WDIOF_MAGICCLOSE, | ||
| 157 | }; | ||
| 158 | |||
| 159 | static long nuc900_wdt_ioctl(struct file *file, | ||
| 160 | unsigned int cmd, unsigned long arg) | ||
| 161 | { | ||
| 162 | void __user *argp = (void __user *)arg; | ||
| 163 | int __user *p = argp; | ||
| 164 | int new_value; | ||
| 165 | |||
| 166 | switch (cmd) { | ||
| 167 | case WDIOC_GETSUPPORT: | ||
| 168 | return copy_to_user(argp, &nuc900_wdt_info, | ||
| 169 | sizeof(nuc900_wdt_info)) ? -EFAULT : 0; | ||
| 170 | case WDIOC_GETSTATUS: | ||
| 171 | case WDIOC_GETBOOTSTATUS: | ||
| 172 | return put_user(0, p); | ||
| 173 | |||
| 174 | case WDIOC_KEEPALIVE: | ||
| 175 | nuc900_wdt_ping(); | ||
| 176 | return 0; | ||
| 177 | |||
| 178 | case WDIOC_SETTIMEOUT: | ||
| 179 | if (get_user(new_value, p)) | ||
| 180 | return -EFAULT; | ||
| 181 | |||
| 182 | heartbeat = new_value; | ||
| 183 | nuc900_wdt_ping(); | ||
| 184 | |||
| 185 | return put_user(new_value, p); | ||
| 186 | case WDIOC_GETTIMEOUT: | ||
| 187 | return put_user(heartbeat, p); | ||
| 188 | default: | ||
| 189 | return -ENOTTY; | ||
| 190 | } | ||
| 191 | } | ||
| 192 | |||
| 193 | static ssize_t nuc900_wdt_write(struct file *file, const char __user *data, | ||
| 194 | size_t len, loff_t *ppos) | ||
| 195 | { | ||
| 196 | if (!len) | ||
| 197 | return 0; | ||
| 198 | |||
| 199 | /* Scan for magic character */ | ||
| 200 | if (!nowayout) { | ||
| 201 | size_t i; | ||
| 202 | |||
| 203 | nuc900_wdt->expect_close = 0; | ||
| 204 | |||
| 205 | for (i = 0; i < len; i++) { | ||
| 206 | char c; | ||
| 207 | if (get_user(c, data + i)) | ||
| 208 | return -EFAULT; | ||
| 209 | if (c == 'V') { | ||
| 210 | nuc900_wdt->expect_close = 42; | ||
| 211 | break; | ||
| 212 | } | ||
| 213 | } | ||
| 214 | } | ||
| 215 | |||
| 216 | nuc900_wdt_ping(); | ||
| 217 | return len; | ||
| 218 | } | ||
| 219 | |||
| 220 | static void nuc900_wdt_timer_ping(unsigned long data) | ||
| 221 | { | ||
| 222 | if (time_before(jiffies, nuc900_wdt->next_heartbeat)) { | ||
| 223 | nuc900_wdt_keepalive(); | ||
| 224 | mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT); | ||
| 225 | } else | ||
| 226 | dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n"); | ||
| 227 | } | ||
| 228 | |||
| 229 | static const struct file_operations nuc900wdt_fops = { | ||
| 230 | .owner = THIS_MODULE, | ||
| 231 | .llseek = no_llseek, | ||
| 232 | .unlocked_ioctl = nuc900_wdt_ioctl, | ||
| 233 | .open = nuc900_wdt_open, | ||
| 234 | .release = nuc900_wdt_close, | ||
| 235 | .write = nuc900_wdt_write, | ||
| 236 | }; | ||
| 237 | |||
| 238 | static struct miscdevice nuc900wdt_miscdev = { | ||
| 239 | .minor = WATCHDOG_MINOR, | ||
| 240 | .name = "watchdog", | ||
| 241 | .fops = &nuc900wdt_fops, | ||
| 242 | }; | ||
| 243 | |||
| 244 | static int __devinit nuc900wdt_probe(struct platform_device *pdev) | ||
| 245 | { | ||
| 246 | int ret = 0; | ||
| 247 | |||
| 248 | nuc900_wdt = kzalloc(sizeof(struct nuc900_wdt), GFP_KERNEL); | ||
| 249 | if (!nuc900_wdt) | ||
| 250 | return -ENOMEM; | ||
| 251 | |||
| 252 | nuc900_wdt->pdev = pdev; | ||
| 253 | |||
| 254 | spin_lock_init(&nuc900_wdt->wdt_lock); | ||
| 255 | |||
| 256 | nuc900_wdt->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 257 | if (nuc900_wdt->res == NULL) { | ||
| 258 | dev_err(&pdev->dev, "no memory resource specified\n"); | ||
| 259 | ret = -ENOENT; | ||
| 260 | goto err_get; | ||
| 261 | } | ||
| 262 | |||
| 263 | if (!request_mem_region(nuc900_wdt->res->start, | ||
| 264 | resource_size(nuc900_wdt->res), pdev->name)) { | ||
| 265 | dev_err(&pdev->dev, "failed to get memory region\n"); | ||
| 266 | ret = -ENOENT; | ||
| 267 | goto err_get; | ||
| 268 | } | ||
| 269 | |||
| 270 | nuc900_wdt->wdt_base = ioremap(nuc900_wdt->res->start, | ||
| 271 | resource_size(nuc900_wdt->res)); | ||
| 272 | if (nuc900_wdt->wdt_base == NULL) { | ||
| 273 | dev_err(&pdev->dev, "failed to ioremap() region\n"); | ||
| 274 | ret = -EINVAL; | ||
| 275 | goto err_req; | ||
| 276 | } | ||
| 277 | |||
| 278 | nuc900_wdt->wdt_clock = clk_get(&pdev->dev, NULL); | ||
| 279 | if (IS_ERR(nuc900_wdt->wdt_clock)) { | ||
| 280 | dev_err(&pdev->dev, "failed to find watchdog clock source\n"); | ||
| 281 | ret = PTR_ERR(nuc900_wdt->wdt_clock); | ||
| 282 | goto err_map; | ||
| 283 | } | ||
| 284 | |||
| 285 | clk_enable(nuc900_wdt->wdt_clock); | ||
| 286 | |||
| 287 | setup_timer(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0); | ||
| 288 | |||
| 289 | if (misc_register(&nuc900wdt_miscdev)) { | ||
| 290 | dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n", | ||
| 291 | WATCHDOG_MINOR, ret); | ||
| 292 | goto err_clk; | ||
| 293 | } | ||
| 294 | |||
| 295 | return 0; | ||
| 296 | |||
| 297 | err_clk: | ||
| 298 | clk_disable(nuc900_wdt->wdt_clock); | ||
| 299 | clk_put(nuc900_wdt->wdt_clock); | ||
| 300 | err_map: | ||
| 301 | iounmap(nuc900_wdt->wdt_base); | ||
| 302 | err_req: | ||
| 303 | release_mem_region(nuc900_wdt->res->start, | ||
| 304 | resource_size(nuc900_wdt->res)); | ||
| 305 | err_get: | ||
| 306 | kfree(nuc900_wdt); | ||
| 307 | return ret; | ||
| 308 | } | ||
| 309 | |||
| 310 | static int __devexit nuc900wdt_remove(struct platform_device *pdev) | ||
| 311 | { | ||
| 312 | misc_deregister(&nuc900wdt_miscdev); | ||
| 313 | |||
| 314 | clk_disable(nuc900_wdt->wdt_clock); | ||
| 315 | clk_put(nuc900_wdt->wdt_clock); | ||
| 316 | |||
| 317 | iounmap(nuc900_wdt->wdt_base); | ||
| 318 | |||
| 319 | release_mem_region(nuc900_wdt->res->start, | ||
| 320 | resource_size(nuc900_wdt->res)); | ||
| 321 | |||
| 322 | kfree(nuc900_wdt); | ||
| 323 | |||
| 324 | return 0; | ||
| 325 | } | ||
| 326 | |||
| 327 | static struct platform_driver nuc900wdt_driver = { | ||
| 328 | .probe = nuc900wdt_probe, | ||
| 329 | .remove = __devexit_p(nuc900wdt_remove), | ||
| 330 | .driver = { | ||
| 331 | .name = "nuc900-wdt", | ||
| 332 | .owner = THIS_MODULE, | ||
| 333 | }, | ||
| 334 | }; | ||
| 335 | |||
| 336 | static int __init nuc900_wdt_init(void) | ||
| 337 | { | ||
| 338 | return platform_driver_register(&nuc900wdt_driver); | ||
| 339 | } | ||
| 340 | |||
| 341 | static void __exit nuc900_wdt_exit(void) | ||
| 342 | { | ||
| 343 | platform_driver_unregister(&nuc900wdt_driver); | ||
| 344 | } | ||
| 345 | |||
| 346 | module_init(nuc900_wdt_init); | ||
| 347 | module_exit(nuc900_wdt_exit); | ||
| 348 | |||
| 349 | MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>"); | ||
| 350 | MODULE_DESCRIPTION("Watchdog driver for NUC900"); | ||
| 351 | MODULE_LICENSE("GPL"); | ||
| 352 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | ||
| 353 | MODULE_ALIAS("platform:nuc900-wdt"); | ||
diff --git a/drivers/watchdog/rm9k_wdt.c b/drivers/watchdog/rm9k_wdt.c index 2e4442642262..bb66958b9433 100644 --- a/drivers/watchdog/rm9k_wdt.c +++ b/drivers/watchdog/rm9k_wdt.c | |||
| @@ -340,7 +340,7 @@ static const struct resource *wdt_gpi_get_resource(struct platform_device *pdv, | |||
| 340 | const char *name, unsigned int type) | 340 | const char *name, unsigned int type) |
| 341 | { | 341 | { |
| 342 | char buf[80]; | 342 | char buf[80]; |
| 343 | if (snprintf(buf, sizeof buf, "%s_0", name) >= sizeof buf) | 343 | if (snprintf(buf, sizeof(buf), "%s_0", name) >= sizeof(buf)) |
| 344 | return NULL; | 344 | return NULL; |
| 345 | return platform_get_resource_byname(pdv, type, buf); | 345 | return platform_get_resource_byname(pdv, type, buf); |
| 346 | } | 346 | } |
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c new file mode 100644 index 000000000000..852ca1977917 --- /dev/null +++ b/drivers/watchdog/sbc_fitpc2_wdt.c | |||
| @@ -0,0 +1,267 @@ | |||
| 1 | /* | ||
| 2 | * Watchdog driver for SBC-FITPC2 board | ||
| 3 | * | ||
| 4 | * Author: Denis Turischev <denis@compulab.co.il> | ||
| 5 | * | ||
| 6 | * Adapted from the IXP2000 watchdog driver by Deepak Saxena. | ||
| 7 | * | ||
| 8 | * This file is licensed under the terms of the GNU General Public | ||
| 9 | * License version 2. This program is licensed "as is" without any | ||
| 10 | * warranty of any kind, whether express or implied. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #define pr_fmt(fmt) KBUILD_MODNAME " WATCHDOG: " fmt | ||
| 14 | |||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | #include <linux/miscdevice.h> | ||
| 18 | #include <linux/watchdog.h> | ||
| 19 | #include <linux/ioport.h> | ||
| 20 | #include <linux/delay.h> | ||
| 21 | #include <linux/fs.h> | ||
| 22 | #include <linux/init.h> | ||
| 23 | #include <linux/moduleparam.h> | ||
| 24 | #include <linux/dmi.h> | ||
| 25 | #include <linux/io.h> | ||
| 26 | #include <linux/uaccess.h> | ||
| 27 | |||
| 28 | #include <asm/system.h> | ||
| 29 | |||
| 30 | static int nowayout = WATCHDOG_NOWAYOUT; | ||
| 31 | static unsigned int margin = 60; /* (secs) Default is 1 minute */ | ||
| 32 | static unsigned long wdt_status; | ||
| 33 | static DEFINE_SPINLOCK(wdt_lock); | ||
| 34 | |||
| 35 | #define WDT_IN_USE 0 | ||
| 36 | #define WDT_OK_TO_CLOSE 1 | ||
| 37 | |||
| 38 | #define COMMAND_PORT 0x4c | ||
| 39 | #define DATA_PORT 0x48 | ||
| 40 | |||
| 41 | #define IFACE_ON_COMMAND 1 | ||
| 42 | #define REBOOT_COMMAND 2 | ||
| 43 | |||
| 44 | #define WATCHDOG_NAME "SBC-FITPC2 Watchdog" | ||
| 45 | |||
| 46 | static void wdt_send_data(unsigned char command, unsigned char data) | ||
| 47 | { | ||
| 48 | outb(command, COMMAND_PORT); | ||
| 49 | mdelay(100); | ||
| 50 | outb(data, DATA_PORT); | ||
| 51 | mdelay(200); | ||
| 52 | } | ||
| 53 | |||
| 54 | static void wdt_enable(void) | ||
| 55 | { | ||
| 56 | spin_lock(&wdt_lock); | ||
| 57 | wdt_send_data(IFACE_ON_COMMAND, 1); | ||
| 58 | wdt_send_data(REBOOT_COMMAND, margin); | ||
| 59 | spin_unlock(&wdt_lock); | ||
| 60 | } | ||
| 61 | |||
| 62 | static void wdt_disable(void) | ||
| 63 | { | ||
| 64 | spin_lock(&wdt_lock); | ||
| 65 | wdt_send_data(IFACE_ON_COMMAND, 0); | ||
| 66 | wdt_send_data(REBOOT_COMMAND, 0); | ||
| 67 | spin_unlock(&wdt_lock); | ||
| 68 | } | ||
| 69 | |||
| 70 | static int fitpc2_wdt_open(struct inode *inode, struct file *file) | ||
| 71 | { | ||
| 72 | if (test_and_set_bit(WDT_IN_USE, &wdt_status)) | ||
| 73 | return -EBUSY; | ||
| 74 | |||
| 75 | clear_bit(WDT_OK_TO_CLOSE, &wdt_status); | ||
| 76 | |||
| 77 | wdt_enable(); | ||
| 78 | |||
| 79 | return nonseekable_open(inode, file); | ||
| 80 | } | ||
| 81 | |||
| 82 | static ssize_t fitpc2_wdt_write(struct file *file, const char *data, | ||
| 83 | size_t len, loff_t *ppos) | ||
| 84 | { | ||
| 85 | size_t i; | ||
| 86 | |||
| 87 | if (!len) | ||
| 88 | return 0; | ||
| 89 | |||
| 90 | if (nowayout) { | ||
| 91 | len = 0; | ||
| 92 | goto out; | ||
| 93 | } | ||
| 94 | |||
| 95 | clear_bit(WDT_OK_TO_CLOSE, &wdt_status); | ||
| 96 | |||
| 97 | for (i = 0; i != len; i++) { | ||
| 98 | char c; | ||
| 99 | |||
| 100 | if (get_user(c, data + i)) | ||
| 101 | return -EFAULT; | ||
| 102 | |||
| 103 | if (c == 'V') | ||
| 104 | set_bit(WDT_OK_TO_CLOSE, &wdt_status); | ||
| 105 | } | ||
| 106 | |||
| 107 | out: | ||
| 108 | wdt_enable(); | ||
| 109 | |||
| 110 | return len; | ||
| 111 | } | ||
| 112 | |||
| 113 | |||
| 114 | static struct watchdog_info ident = { | ||
| 115 | .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | | ||
| 116 | WDIOF_KEEPALIVEPING, | ||
| 117 | .identity = WATCHDOG_NAME, | ||
| 118 | }; | ||
| 119 | |||
| 120 | |||
| 121 | static long fitpc2_wdt_ioctl(struct file *file, unsigned int cmd, | ||
| 122 | unsigned long arg) | ||
| 123 | { | ||
| 124 | int ret = -ENOTTY; | ||
| 125 | int time; | ||
| 126 | |||
| 127 | switch (cmd) { | ||
| 128 | case WDIOC_GETSUPPORT: | ||
| 129 | ret = copy_to_user((struct watchdog_info *)arg, &ident, | ||
| 130 | sizeof(ident)) ? -EFAULT : 0; | ||
| 131 | break; | ||
| 132 | |||
| 133 | case WDIOC_GETSTATUS: | ||
| 134 | ret = put_user(0, (int *)arg); | ||
| 135 | break; | ||
| 136 | |||
| 137 | case WDIOC_GETBOOTSTATUS: | ||
| 138 | ret = put_user(0, (int *)arg); | ||
| 139 | break; | ||
| 140 | |||
| 141 | case WDIOC_KEEPALIVE: | ||
| 142 | wdt_enable(); | ||
| 143 | ret = 0; | ||
| 144 | break; | ||
| 145 | |||
| 146 | case WDIOC_SETTIMEOUT: | ||
| 147 | ret = get_user(time, (int *)arg); | ||
| 148 | if (ret) | ||
| 149 | break; | ||
| 150 | |||
| 151 | if (time < 31 || time > 255) { | ||
| 152 | ret = -EINVAL; | ||
| 153 | break; | ||
| 154 | } | ||
| 155 | |||
| 156 | margin = time; | ||
| 157 | wdt_enable(); | ||
| 158 | /* Fall through */ | ||
| 159 | |||
| 160 | case WDIOC_GETTIMEOUT: | ||
| 161 | ret = put_user(margin, (int *)arg); | ||
| 162 | break; | ||
| 163 | } | ||
| 164 | |||
| 165 | return ret; | ||
| 166 | } | ||
| 167 | |||
| 168 | static int fitpc2_wdt_release(struct inode *inode, struct file *file) | ||
| 169 | { | ||
| 170 | if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) { | ||
| 171 | wdt_disable(); | ||
| 172 | pr_info("Device disabled\n"); | ||
| 173 | } else { | ||
| 174 | pr_warning("Device closed unexpectedly -" | ||
| 175 | " timer will not stop\n"); | ||
| 176 | wdt_enable(); | ||
| 177 | } | ||
| 178 | |||
| 179 | clear_bit(WDT_IN_USE, &wdt_status); | ||
| 180 | clear_bit(WDT_OK_TO_CLOSE, &wdt_status); | ||
| 181 | |||
| 182 | return 0; | ||
| 183 | } | ||
| 184 | |||
| 185 | |||
| 186 | static const struct file_operations fitpc2_wdt_fops = { | ||
| 187 | .owner = THIS_MODULE, | ||
| 188 | .llseek = no_llseek, | ||
| 189 | .write = fitpc2_wdt_write, | ||
| 190 | .unlocked_ioctl = fitpc2_wdt_ioctl, | ||
| 191 | .open = fitpc2_wdt_open, | ||
| 192 | .release = fitpc2_wdt_release, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct miscdevice fitpc2_wdt_miscdev = { | ||
| 196 | .minor = WATCHDOG_MINOR, | ||
| 197 | .name = "watchdog", | ||
| 198 | .fops = &fitpc2_wdt_fops, | ||
| 199 | }; | ||
| 200 | |||
| 201 | static int __init fitpc2_wdt_init(void) | ||
| 202 | { | ||
| 203 | int err; | ||
| 204 | |||
| 205 | if (strcmp("SBC-FITPC2", dmi_get_system_info(DMI_BOARD_NAME))) { | ||
| 206 | pr_info("board name is: %s. Should be SBC-FITPC2\n", | ||
| 207 | dmi_get_system_info(DMI_BOARD_NAME)); | ||
| 208 | return -ENODEV; | ||
| 209 | } | ||
| 210 | |||
| 211 | if (!request_region(COMMAND_PORT, 1, WATCHDOG_NAME)) { | ||
| 212 | pr_err("I/O address 0x%04x already in use\n", COMMAND_PORT); | ||
| 213 | return -EIO; | ||
| 214 | } | ||
| 215 | |||
| 216 | if (!request_region(DATA_PORT, 1, WATCHDOG_NAME)) { | ||
| 217 | pr_err("I/O address 0x%04x already in use\n", DATA_PORT); | ||
| 218 | err = -EIO; | ||
| 219 | goto err_data_port; | ||
| 220 | } | ||
| 221 | |||
| 222 | if (margin < 31 || margin > 255) { | ||
| 223 | pr_err("margin must be in range 31 - 255" | ||
| 224 | " seconds, you tried to set %d\n", margin); | ||
| 225 | err = -EINVAL; | ||
| 226 | goto err_margin; | ||
| 227 | } | ||
| 228 | |||
| 229 | err = misc_register(&fitpc2_wdt_miscdev); | ||
| 230 | if (!err) { | ||
| 231 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", | ||
| 232 | WATCHDOG_MINOR, err); | ||
| 233 | goto err_margin; | ||
| 234 | } | ||
| 235 | |||
| 236 | return 0; | ||
| 237 | |||
| 238 | err_margin: | ||
| 239 | release_region(DATA_PORT, 1); | ||
| 240 | err_data_port: | ||
| 241 | release_region(COMMAND_PORT, 1); | ||
| 242 | |||
| 243 | return err; | ||
| 244 | } | ||
| 245 | |||
| 246 | static void __exit fitpc2_wdt_exit(void) | ||
| 247 | { | ||
| 248 | misc_deregister(&fitpc2_wdt_miscdev); | ||
| 249 | release_region(DATA_PORT, 1); | ||
| 250 | release_region(COMMAND_PORT, 1); | ||
| 251 | } | ||
| 252 | |||
| 253 | module_init(fitpc2_wdt_init); | ||
| 254 | module_exit(fitpc2_wdt_exit); | ||
| 255 | |||
| 256 | MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>"); | ||
| 257 | MODULE_DESCRIPTION("SBC-FITPC2 Watchdog"); | ||
| 258 | |||
| 259 | module_param(margin, int, 0); | ||
| 260 | MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)"); | ||
| 261 | |||
| 262 | module_param(nowayout, int, 0); | ||
| 263 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"); | ||
| 264 | |||
| 265 | MODULE_LICENSE("GPL"); | ||
| 266 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | ||
| 267 | |||
diff --git a/drivers/watchdog/sc1200wdt.c b/drivers/watchdog/sc1200wdt.c index b5e19c1820a2..c01daca8405a 100644 --- a/drivers/watchdog/sc1200wdt.c +++ b/drivers/watchdog/sc1200wdt.c | |||
| @@ -197,7 +197,7 @@ static long sc1200wdt_ioctl(struct file *file, unsigned int cmd, | |||
| 197 | 197 | ||
| 198 | switch (cmd) { | 198 | switch (cmd) { |
| 199 | case WDIOC_GETSUPPORT: | 199 | case WDIOC_GETSUPPORT: |
| 200 | if (copy_to_user(argp, &ident, sizeof ident)) | 200 | if (copy_to_user(argp, &ident, sizeof(ident))) |
| 201 | return -EFAULT; | 201 | return -EFAULT; |
| 202 | return 0; | 202 | return 0; |
| 203 | 203 | ||
diff --git a/drivers/watchdog/wdt_pci.c b/drivers/watchdog/wdt_pci.c index 7a1bdc7c95a9..f368dd87083a 100644 --- a/drivers/watchdog/wdt_pci.c +++ b/drivers/watchdog/wdt_pci.c | |||
| @@ -80,7 +80,7 @@ static unsigned long open_lock; | |||
| 80 | static DEFINE_SPINLOCK(wdtpci_lock); | 80 | static DEFINE_SPINLOCK(wdtpci_lock); |
| 81 | static char expect_close; | 81 | static char expect_close; |
| 82 | 82 | ||
| 83 | static int io; | 83 | static resource_size_t io; |
| 84 | static int irq; | 84 | static int irq; |
| 85 | 85 | ||
| 86 | /* Default timeout */ | 86 | /* Default timeout */ |
| @@ -647,14 +647,15 @@ static int __devinit wdtpci_init_one(struct pci_dev *dev, | |||
| 647 | goto out_pci; | 647 | goto out_pci; |
| 648 | } | 648 | } |
| 649 | 649 | ||
| 650 | irq = dev->irq; | 650 | if (pci_request_region(dev, 2, "wdt_pci")) { |
| 651 | io = pci_resource_start(dev, 2); | 651 | printk(KERN_ERR PFX "I/O address 0x%llx already in use\n", |
| 652 | 652 | (unsigned long long)pci_resource_start(dev, 2)); | |
| 653 | if (request_region(io, 16, "wdt_pci") == NULL) { | ||
| 654 | printk(KERN_ERR PFX "I/O address 0x%04x already in use\n", io); | ||
| 655 | goto out_pci; | 653 | goto out_pci; |
| 656 | } | 654 | } |
| 657 | 655 | ||
| 656 | irq = dev->irq; | ||
| 657 | io = pci_resource_start(dev, 2); | ||
| 658 | |||
| 658 | if (request_irq(irq, wdtpci_interrupt, IRQF_DISABLED | IRQF_SHARED, | 659 | if (request_irq(irq, wdtpci_interrupt, IRQF_DISABLED | IRQF_SHARED, |
| 659 | "wdt_pci", &wdtpci_miscdev)) { | 660 | "wdt_pci", &wdtpci_miscdev)) { |
| 660 | printk(KERN_ERR PFX "IRQ %d is not free\n", irq); | 661 | printk(KERN_ERR PFX "IRQ %d is not free\n", irq); |
| @@ -662,8 +663,8 @@ static int __devinit wdtpci_init_one(struct pci_dev *dev, | |||
| 662 | } | 663 | } |
| 663 | 664 | ||
| 664 | printk(KERN_INFO | 665 | printk(KERN_INFO |
| 665 | "PCI-WDT500/501 (PCI-WDG-CSM) driver 0.10 at 0x%04x (Interrupt %d)\n", | 666 | "PCI-WDT500/501 (PCI-WDG-CSM) driver 0.10 at 0x%llx (Interrupt %d)\n", |
| 666 | io, irq); | 667 | (unsigned long long)io, irq); |
| 667 | 668 | ||
| 668 | /* Check that the heartbeat value is within its range; | 669 | /* Check that the heartbeat value is within its range; |
| 669 | if not reset to the default */ | 670 | if not reset to the default */ |
| @@ -717,7 +718,7 @@ out_rbt: | |||
| 717 | out_irq: | 718 | out_irq: |
| 718 | free_irq(irq, &wdtpci_miscdev); | 719 | free_irq(irq, &wdtpci_miscdev); |
| 719 | out_reg: | 720 | out_reg: |
| 720 | release_region(io, 16); | 721 | pci_release_region(dev, 2); |
| 721 | out_pci: | 722 | out_pci: |
| 722 | pci_disable_device(dev); | 723 | pci_disable_device(dev); |
| 723 | goto out; | 724 | goto out; |
| @@ -733,7 +734,7 @@ static void __devexit wdtpci_remove_one(struct pci_dev *pdev) | |||
| 733 | misc_deregister(&temp_miscdev); | 734 | misc_deregister(&temp_miscdev); |
| 734 | unregister_reboot_notifier(&wdtpci_notifier); | 735 | unregister_reboot_notifier(&wdtpci_notifier); |
| 735 | free_irq(irq, &wdtpci_miscdev); | 736 | free_irq(irq, &wdtpci_miscdev); |
| 736 | release_region(io, 16); | 737 | pci_release_region(pdev, 2); |
| 737 | pci_disable_device(pdev); | 738 | pci_disable_device(pdev); |
| 738 | dev_count--; | 739 | dev_count--; |
| 739 | } | 740 | } |
diff --git a/drivers/watchdog/wm831x_wdt.c b/drivers/watchdog/wm831x_wdt.c new file mode 100644 index 000000000000..775bcd807f31 --- /dev/null +++ b/drivers/watchdog/wm831x_wdt.c | |||
| @@ -0,0 +1,441 @@ | |||
| 1 | /* | ||
| 2 | * Watchdog driver for the wm831x PMICs | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Wolfson Microelectronics | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * as published by the Free Software Foundation | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/module.h> | ||
| 12 | #include <linux/moduleparam.h> | ||
| 13 | #include <linux/types.h> | ||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/fs.h> | ||
| 16 | #include <linux/miscdevice.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/watchdog.h> | ||
| 19 | #include <linux/uaccess.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 21 | |||
| 22 | #include <linux/mfd/wm831x/core.h> | ||
| 23 | #include <linux/mfd/wm831x/pdata.h> | ||
| 24 | #include <linux/mfd/wm831x/watchdog.h> | ||
| 25 | |||
| 26 | static int nowayout = WATCHDOG_NOWAYOUT; | ||
| 27 | module_param(nowayout, int, 0); | ||
| 28 | MODULE_PARM_DESC(nowayout, | ||
| 29 | "Watchdog cannot be stopped once started (default=" | ||
| 30 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | ||
| 31 | |||
| 32 | static unsigned long wm831x_wdt_users; | ||
| 33 | static struct miscdevice wm831x_wdt_miscdev; | ||
| 34 | static int wm831x_wdt_expect_close; | ||
| 35 | static DEFINE_MUTEX(wdt_mutex); | ||
| 36 | static struct wm831x *wm831x; | ||
| 37 | static unsigned int update_gpio; | ||
| 38 | static unsigned int update_state; | ||
| 39 | |||
| 40 | /* We can't use the sub-second values here but they're included | ||
| 41 | * for completeness. */ | ||
| 42 | static struct { | ||
| 43 | int time; /* Seconds */ | ||
| 44 | u16 val; /* WDOG_TO value */ | ||
| 45 | } wm831x_wdt_cfgs[] = { | ||
| 46 | { 1, 2 }, | ||
| 47 | { 2, 3 }, | ||
| 48 | { 4, 4 }, | ||
| 49 | { 8, 5 }, | ||
| 50 | { 16, 6 }, | ||
| 51 | { 32, 7 }, | ||
| 52 | { 33, 7 }, /* Actually 32.768s so include both, others round down */ | ||
| 53 | }; | ||
| 54 | |||
| 55 | static int wm831x_wdt_set_timeout(struct wm831x *wm831x, u16 value) | ||
| 56 | { | ||
| 57 | int ret; | ||
| 58 | |||
| 59 | mutex_lock(&wdt_mutex); | ||
| 60 | |||
| 61 | ret = wm831x_reg_unlock(wm831x); | ||
| 62 | if (ret == 0) { | ||
| 63 | ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG, | ||
| 64 | WM831X_WDOG_TO_MASK, value); | ||
| 65 | wm831x_reg_lock(wm831x); | ||
| 66 | } else { | ||
| 67 | dev_err(wm831x->dev, "Failed to unlock security key: %d\n", | ||
| 68 | ret); | ||
| 69 | } | ||
| 70 | |||
| 71 | mutex_unlock(&wdt_mutex); | ||
| 72 | |||
| 73 | return ret; | ||
| 74 | } | ||
| 75 | |||
| 76 | static int wm831x_wdt_start(struct wm831x *wm831x) | ||
| 77 | { | ||
| 78 | int ret; | ||
| 79 | |||
| 80 | mutex_lock(&wdt_mutex); | ||
| 81 | |||
| 82 | ret = wm831x_reg_unlock(wm831x); | ||
| 83 | if (ret == 0) { | ||
| 84 | ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG, | ||
| 85 | WM831X_WDOG_ENA, WM831X_WDOG_ENA); | ||
| 86 | wm831x_reg_lock(wm831x); | ||
| 87 | } else { | ||
| 88 | dev_err(wm831x->dev, "Failed to unlock security key: %d\n", | ||
| 89 | ret); | ||
| 90 | } | ||
| 91 | |||
| 92 | mutex_unlock(&wdt_mutex); | ||
| 93 | |||
| 94 | return ret; | ||
| 95 | } | ||
| 96 | |||
| 97 | static int wm831x_wdt_stop(struct wm831x *wm831x) | ||
| 98 | { | ||
| 99 | int ret; | ||
| 100 | |||
| 101 | mutex_lock(&wdt_mutex); | ||
| 102 | |||
| 103 | ret = wm831x_reg_unlock(wm831x); | ||
| 104 | if (ret == 0) { | ||
| 105 | ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG, | ||
| 106 | WM831X_WDOG_ENA, 0); | ||
| 107 | wm831x_reg_lock(wm831x); | ||
| 108 | } else { | ||
| 109 | dev_err(wm831x->dev, "Failed to unlock security key: %d\n", | ||
| 110 | ret); | ||
| 111 | } | ||
| 112 | |||
| 113 | mutex_unlock(&wdt_mutex); | ||
| 114 | |||
| 115 | return ret; | ||
| 116 | } | ||
| 117 | |||
| 118 | static int wm831x_wdt_kick(struct wm831x *wm831x) | ||
| 119 | { | ||
| 120 | int ret; | ||
| 121 | u16 reg; | ||
| 122 | |||
| 123 | mutex_lock(&wdt_mutex); | ||
| 124 | |||
| 125 | if (update_gpio) { | ||
| 126 | gpio_set_value_cansleep(update_gpio, update_state); | ||
| 127 | update_state = !update_state; | ||
| 128 | ret = 0; | ||
| 129 | goto out; | ||
| 130 | } | ||
| 131 | |||
| 132 | |||
| 133 | reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG); | ||
| 134 | |||
| 135 | if (!(reg & WM831X_WDOG_RST_SRC)) { | ||
| 136 | dev_err(wm831x->dev, "Hardware watchdog update unsupported\n"); | ||
| 137 | ret = -EINVAL; | ||
| 138 | goto out; | ||
| 139 | } | ||
| 140 | |||
| 141 | reg |= WM831X_WDOG_RESET; | ||
| 142 | |||
| 143 | ret = wm831x_reg_unlock(wm831x); | ||
| 144 | if (ret == 0) { | ||
| 145 | ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg); | ||
| 146 | wm831x_reg_lock(wm831x); | ||
| 147 | } else { | ||
| 148 | dev_err(wm831x->dev, "Failed to unlock security key: %d\n", | ||
| 149 | ret); | ||
| 150 | } | ||
| 151 | |||
| 152 | out: | ||
| 153 | mutex_unlock(&wdt_mutex); | ||
| 154 | |||
| 155 | return ret; | ||
| 156 | } | ||
| 157 | |||
| 158 | static int wm831x_wdt_open(struct inode *inode, struct file *file) | ||
| 159 | { | ||
| 160 | int ret; | ||
| 161 | |||
| 162 | if (!wm831x) | ||
| 163 | return -ENODEV; | ||
| 164 | |||
| 165 | if (test_and_set_bit(0, &wm831x_wdt_users)) | ||
| 166 | return -EBUSY; | ||
| 167 | |||
| 168 | ret = wm831x_wdt_start(wm831x); | ||
| 169 | if (ret != 0) | ||
| 170 | return ret; | ||
| 171 | |||
| 172 | return nonseekable_open(inode, file); | ||
| 173 | } | ||
| 174 | |||
| 175 | static int wm831x_wdt_release(struct inode *inode, struct file *file) | ||
| 176 | { | ||
| 177 | if (wm831x_wdt_expect_close) | ||
| 178 | wm831x_wdt_stop(wm831x); | ||
| 179 | else { | ||
| 180 | dev_warn(wm831x->dev, "Watchdog device closed uncleanly\n"); | ||
| 181 | wm831x_wdt_kick(wm831x); | ||
| 182 | } | ||
| 183 | |||
| 184 | clear_bit(0, &wm831x_wdt_users); | ||
| 185 | |||
| 186 | return 0; | ||
| 187 | } | ||
| 188 | |||
| 189 | static ssize_t wm831x_wdt_write(struct file *file, | ||
| 190 | const char __user *data, size_t count, | ||
| 191 | loff_t *ppos) | ||
| 192 | { | ||
| 193 | size_t i; | ||
| 194 | |||
| 195 | if (count) { | ||
| 196 | wm831x_wdt_kick(wm831x); | ||
| 197 | |||
| 198 | if (!nowayout) { | ||
| 199 | /* In case it was set long ago */ | ||
| 200 | wm831x_wdt_expect_close = 0; | ||
| 201 | |||
| 202 | /* scan to see whether or not we got the magic | ||
| 203 | character */ | ||
| 204 | for (i = 0; i != count; i++) { | ||
| 205 | char c; | ||
| 206 | if (get_user(c, data + i)) | ||
| 207 | return -EFAULT; | ||
| 208 | if (c == 'V') | ||
| 209 | wm831x_wdt_expect_close = 42; | ||
| 210 | } | ||
| 211 | } | ||
| 212 | } | ||
| 213 | return count; | ||
| 214 | } | ||
| 215 | |||
| 216 | static struct watchdog_info ident = { | ||
| 217 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, | ||
| 218 | .identity = "WM831x Watchdog", | ||
| 219 | }; | ||
| 220 | |||
| 221 | static long wm831x_wdt_ioctl(struct file *file, unsigned int cmd, | ||
| 222 | unsigned long arg) | ||
| 223 | { | ||
| 224 | int ret = -ENOTTY, time, i; | ||
| 225 | void __user *argp = (void __user *)arg; | ||
| 226 | int __user *p = argp; | ||
| 227 | u16 reg; | ||
| 228 | |||
| 229 | switch (cmd) { | ||
| 230 | case WDIOC_GETSUPPORT: | ||
| 231 | ret = copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; | ||
| 232 | break; | ||
| 233 | |||
| 234 | case WDIOC_GETSTATUS: | ||
| 235 | case WDIOC_GETBOOTSTATUS: | ||
| 236 | ret = put_user(0, p); | ||
| 237 | break; | ||
| 238 | |||
| 239 | case WDIOC_SETOPTIONS: | ||
| 240 | { | ||
| 241 | int options; | ||
| 242 | |||
| 243 | if (get_user(options, p)) | ||
| 244 | return -EFAULT; | ||
| 245 | |||
| 246 | ret = -EINVAL; | ||
| 247 | |||
| 248 | /* Setting both simultaneously means at least one must fail */ | ||
| 249 | if (options == WDIOS_DISABLECARD) | ||
| 250 | ret = wm831x_wdt_start(wm831x); | ||
| 251 | |||
| 252 | if (options == WDIOS_ENABLECARD) | ||
| 253 | ret = wm831x_wdt_stop(wm831x); | ||
| 254 | break; | ||
| 255 | } | ||
| 256 | |||
| 257 | case WDIOC_KEEPALIVE: | ||
| 258 | ret = wm831x_wdt_kick(wm831x); | ||
| 259 | break; | ||
| 260 | |||
| 261 | case WDIOC_SETTIMEOUT: | ||
| 262 | ret = get_user(time, p); | ||
| 263 | if (ret) | ||
| 264 | break; | ||
| 265 | |||
| 266 | if (time == 0) { | ||
| 267 | if (nowayout) | ||
| 268 | ret = -EINVAL; | ||
| 269 | else | ||
| 270 | wm831x_wdt_stop(wm831x); | ||
| 271 | break; | ||
| 272 | } | ||
| 273 | |||
| 274 | for (i = 0; i < ARRAY_SIZE(wm831x_wdt_cfgs); i++) | ||
| 275 | if (wm831x_wdt_cfgs[i].time == time) | ||
| 276 | break; | ||
| 277 | if (i == ARRAY_SIZE(wm831x_wdt_cfgs)) | ||
| 278 | ret = -EINVAL; | ||
| 279 | else | ||
| 280 | ret = wm831x_wdt_set_timeout(wm831x, | ||
| 281 | wm831x_wdt_cfgs[i].val); | ||
| 282 | break; | ||
| 283 | |||
| 284 | case WDIOC_GETTIMEOUT: | ||
| 285 | reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG); | ||
| 286 | reg &= WM831X_WDOG_TO_MASK; | ||
| 287 | for (i = 0; i < ARRAY_SIZE(wm831x_wdt_cfgs); i++) | ||
| 288 | if (wm831x_wdt_cfgs[i].val == reg) | ||
| 289 | break; | ||
| 290 | if (i == ARRAY_SIZE(wm831x_wdt_cfgs)) { | ||
| 291 | dev_warn(wm831x->dev, | ||
| 292 | "Unknown watchdog configuration: %x\n", reg); | ||
| 293 | ret = -EINVAL; | ||
| 294 | } else | ||
| 295 | ret = put_user(wm831x_wdt_cfgs[i].time, p); | ||
| 296 | |||
| 297 | } | ||
| 298 | |||
| 299 | return ret; | ||
| 300 | } | ||
| 301 | |||
| 302 | static const struct file_operations wm831x_wdt_fops = { | ||
| 303 | .owner = THIS_MODULE, | ||
| 304 | .llseek = no_llseek, | ||
| 305 | .write = wm831x_wdt_write, | ||
| 306 | .unlocked_ioctl = wm831x_wdt_ioctl, | ||
| 307 | .open = wm831x_wdt_open, | ||
| 308 | .release = wm831x_wdt_release, | ||
| 309 | }; | ||
| 310 | |||
| 311 | static struct miscdevice wm831x_wdt_miscdev = { | ||
| 312 | .minor = WATCHDOG_MINOR, | ||
| 313 | .name = "watchdog", | ||
| 314 | .fops = &wm831x_wdt_fops, | ||
| 315 | }; | ||
| 316 | |||
| 317 | static int __devinit wm831x_wdt_probe(struct platform_device *pdev) | ||
| 318 | { | ||
| 319 | struct wm831x_pdata *chip_pdata; | ||
| 320 | struct wm831x_watchdog_pdata *pdata; | ||
| 321 | int reg, ret; | ||
| 322 | |||
| 323 | wm831x = dev_get_drvdata(pdev->dev.parent); | ||
| 324 | |||
| 325 | ret = wm831x_reg_read(wm831x, WM831X_WATCHDOG); | ||
| 326 | if (ret < 0) { | ||
| 327 | dev_err(wm831x->dev, "Failed to read watchdog status: %d\n", | ||
| 328 | ret); | ||
| 329 | goto err; | ||
| 330 | } | ||
| 331 | reg = ret; | ||
| 332 | |||
| 333 | if (reg & WM831X_WDOG_DEBUG) | ||
| 334 | dev_warn(wm831x->dev, "Watchdog is paused\n"); | ||
| 335 | |||
| 336 | /* Apply any configuration */ | ||
| 337 | if (pdev->dev.parent->platform_data) { | ||
| 338 | chip_pdata = pdev->dev.parent->platform_data; | ||
| 339 | pdata = chip_pdata->watchdog; | ||
| 340 | } else { | ||
| 341 | pdata = NULL; | ||
| 342 | } | ||
| 343 | |||
| 344 | if (pdata) { | ||
| 345 | reg &= ~(WM831X_WDOG_SECACT_MASK | WM831X_WDOG_PRIMACT_MASK | | ||
| 346 | WM831X_WDOG_RST_SRC); | ||
| 347 | |||
| 348 | reg |= pdata->primary << WM831X_WDOG_PRIMACT_SHIFT; | ||
| 349 | reg |= pdata->secondary << WM831X_WDOG_SECACT_SHIFT; | ||
| 350 | reg |= pdata->software << WM831X_WDOG_RST_SRC_SHIFT; | ||
| 351 | |||
| 352 | if (pdata->update_gpio) { | ||
| 353 | ret = gpio_request(pdata->update_gpio, | ||
| 354 | "Watchdog update"); | ||
| 355 | if (ret < 0) { | ||
| 356 | dev_err(wm831x->dev, | ||
| 357 | "Failed to request update GPIO: %d\n", | ||
| 358 | ret); | ||
| 359 | goto err; | ||
| 360 | } | ||
| 361 | |||
| 362 | ret = gpio_direction_output(pdata->update_gpio, 0); | ||
| 363 | if (ret != 0) { | ||
| 364 | dev_err(wm831x->dev, | ||
| 365 | "gpio_direction_output returned: %d\n", | ||
| 366 | ret); | ||
| 367 | goto err_gpio; | ||
| 368 | } | ||
| 369 | |||
| 370 | update_gpio = pdata->update_gpio; | ||
| 371 | |||
| 372 | /* Make sure the watchdog takes hardware updates */ | ||
| 373 | reg |= WM831X_WDOG_RST_SRC; | ||
| 374 | } | ||
| 375 | |||
| 376 | ret = wm831x_reg_unlock(wm831x); | ||
| 377 | if (ret == 0) { | ||
| 378 | ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg); | ||
| 379 | wm831x_reg_lock(wm831x); | ||
| 380 | } else { | ||
| 381 | dev_err(wm831x->dev, | ||
| 382 | "Failed to unlock security key: %d\n", ret); | ||
| 383 | goto err_gpio; | ||
| 384 | } | ||
| 385 | } | ||
| 386 | |||
| 387 | wm831x_wdt_miscdev.parent = &pdev->dev; | ||
| 388 | |||
| 389 | ret = misc_register(&wm831x_wdt_miscdev); | ||
| 390 | if (ret != 0) { | ||
| 391 | dev_err(wm831x->dev, "Failed to register miscdev: %d\n", ret); | ||
| 392 | goto err_gpio; | ||
| 393 | } | ||
| 394 | |||
| 395 | return 0; | ||
| 396 | |||
| 397 | err_gpio: | ||
| 398 | if (update_gpio) { | ||
| 399 | gpio_free(update_gpio); | ||
| 400 | update_gpio = 0; | ||
| 401 | } | ||
| 402 | err: | ||
| 403 | return ret; | ||
| 404 | } | ||
| 405 | |||
| 406 | static int __devexit wm831x_wdt_remove(struct platform_device *pdev) | ||
| 407 | { | ||
| 408 | if (update_gpio) { | ||
| 409 | gpio_free(update_gpio); | ||
| 410 | update_gpio = 0; | ||
| 411 | } | ||
| 412 | |||
| 413 | misc_deregister(&wm831x_wdt_miscdev); | ||
| 414 | |||
| 415 | return 0; | ||
| 416 | } | ||
| 417 | |||
| 418 | static struct platform_driver wm831x_wdt_driver = { | ||
| 419 | .probe = wm831x_wdt_probe, | ||
| 420 | .remove = __devexit_p(wm831x_wdt_remove), | ||
| 421 | .driver = { | ||
| 422 | .name = "wm831x-watchdog", | ||
| 423 | }, | ||
| 424 | }; | ||
| 425 | |||
| 426 | static int __init wm831x_wdt_init(void) | ||
| 427 | { | ||
| 428 | return platform_driver_register(&wm831x_wdt_driver); | ||
| 429 | } | ||
| 430 | module_init(wm831x_wdt_init); | ||
| 431 | |||
| 432 | static void __exit wm831x_wdt_exit(void) | ||
| 433 | { | ||
| 434 | platform_driver_unregister(&wm831x_wdt_driver); | ||
| 435 | } | ||
| 436 | module_exit(wm831x_wdt_exit); | ||
| 437 | |||
| 438 | MODULE_AUTHOR("Mark Brown"); | ||
| 439 | MODULE_DESCRIPTION("WM831x Watchdog"); | ||
| 440 | MODULE_LICENSE("GPL"); | ||
| 441 | MODULE_ALIAS("platform:wm831x-watchdog"); | ||
diff --git a/drivers/xen/evtchn.c b/drivers/xen/evtchn.c index af031950f9b1..79bedba44fee 100644 --- a/drivers/xen/evtchn.c +++ b/drivers/xen/evtchn.c | |||
| @@ -38,7 +38,6 @@ | |||
| 38 | #include <linux/string.h> | 38 | #include <linux/string.h> |
| 39 | #include <linux/errno.h> | 39 | #include <linux/errno.h> |
| 40 | #include <linux/fs.h> | 40 | #include <linux/fs.h> |
| 41 | #include <linux/errno.h> | ||
| 42 | #include <linux/miscdevice.h> | 41 | #include <linux/miscdevice.h> |
| 43 | #include <linux/major.h> | 42 | #include <linux/major.h> |
| 44 | #include <linux/proc_fs.h> | 43 | #include <linux/proc_fs.h> |
diff --git a/fs/dlm/lowcomms.c b/fs/dlm/lowcomms.c index 618a60f03886..240cef14fe58 100644 --- a/fs/dlm/lowcomms.c +++ b/fs/dlm/lowcomms.c | |||
| @@ -106,6 +106,7 @@ struct connection { | |||
| 106 | #define CF_CONNECT_PENDING 3 | 106 | #define CF_CONNECT_PENDING 3 |
| 107 | #define CF_INIT_PENDING 4 | 107 | #define CF_INIT_PENDING 4 |
| 108 | #define CF_IS_OTHERCON 5 | 108 | #define CF_IS_OTHERCON 5 |
| 109 | #define CF_CLOSE 6 | ||
| 109 | struct list_head writequeue; /* List of outgoing writequeue_entries */ | 110 | struct list_head writequeue; /* List of outgoing writequeue_entries */ |
| 110 | spinlock_t writequeue_lock; | 111 | spinlock_t writequeue_lock; |
| 111 | int (*rx_action) (struct connection *); /* What to do when active */ | 112 | int (*rx_action) (struct connection *); /* What to do when active */ |
| @@ -299,6 +300,8 @@ static void lowcomms_write_space(struct sock *sk) | |||
| 299 | 300 | ||
| 300 | static inline void lowcomms_connect_sock(struct connection *con) | 301 | static inline void lowcomms_connect_sock(struct connection *con) |
| 301 | { | 302 | { |
| 303 | if (test_bit(CF_CLOSE, &con->flags)) | ||
| 304 | return; | ||
| 302 | if (!test_and_set_bit(CF_CONNECT_PENDING, &con->flags)) | 305 | if (!test_and_set_bit(CF_CONNECT_PENDING, &con->flags)) |
| 303 | queue_work(send_workqueue, &con->swork); | 306 | queue_work(send_workqueue, &con->swork); |
| 304 | } | 307 | } |
| @@ -926,10 +929,8 @@ static void tcp_connect_to_sock(struct connection *con) | |||
| 926 | goto out_err; | 929 | goto out_err; |
| 927 | 930 | ||
| 928 | memset(&saddr, 0, sizeof(saddr)); | 931 | memset(&saddr, 0, sizeof(saddr)); |
| 929 | if (dlm_nodeid_to_addr(con->nodeid, &saddr)) { | 932 | if (dlm_nodeid_to_addr(con->nodeid, &saddr)) |
| 930 | sock_release(sock); | ||
| 931 | goto out_err; | 933 | goto out_err; |
| 932 | } | ||
| 933 | 934 | ||
| 934 | sock->sk->sk_user_data = con; | 935 | sock->sk->sk_user_data = con; |
| 935 | con->rx_action = receive_from_sock; | 936 | con->rx_action = receive_from_sock; |
| @@ -1284,7 +1285,6 @@ out: | |||
| 1284 | static void send_to_sock(struct connection *con) | 1285 | static void send_to_sock(struct connection *con) |
| 1285 | { | 1286 | { |
| 1286 | int ret = 0; | 1287 | int ret = 0; |
| 1287 | ssize_t(*sendpage) (struct socket *, struct page *, int, size_t, int); | ||
| 1288 | const int msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL; | 1288 | const int msg_flags = MSG_DONTWAIT | MSG_NOSIGNAL; |
| 1289 | struct writequeue_entry *e; | 1289 | struct writequeue_entry *e; |
| 1290 | int len, offset; | 1290 | int len, offset; |
| @@ -1293,8 +1293,6 @@ static void send_to_sock(struct connection *con) | |||
| 1293 | if (con->sock == NULL) | 1293 | if (con->sock == NULL) |
| 1294 | goto out_connect; | 1294 | goto out_connect; |
| 1295 | 1295 | ||
| 1296 | sendpage = con->sock->ops->sendpage; | ||
| 1297 | |||
| 1298 | spin_lock(&con->writequeue_lock); | 1296 | spin_lock(&con->writequeue_lock); |
| 1299 | for (;;) { | 1297 | for (;;) { |
| 1300 | e = list_entry(con->writequeue.next, struct writequeue_entry, | 1298 | e = list_entry(con->writequeue.next, struct writequeue_entry, |
| @@ -1309,8 +1307,8 @@ static void send_to_sock(struct connection *con) | |||
| 1309 | 1307 | ||
| 1310 | ret = 0; | 1308 | ret = 0; |
| 1311 | if (len) { | 1309 | if (len) { |
| 1312 | ret = sendpage(con->sock, e->page, offset, len, | 1310 | ret = kernel_sendpage(con->sock, e->page, offset, len, |
| 1313 | msg_flags); | 1311 | msg_flags); |
| 1314 | if (ret == -EAGAIN || ret == 0) { | 1312 | if (ret == -EAGAIN || ret == 0) { |
| 1315 | cond_resched(); | 1313 | cond_resched(); |
| 1316 | goto out; | 1314 | goto out; |
| @@ -1370,6 +1368,13 @@ int dlm_lowcomms_close(int nodeid) | |||
| 1370 | log_print("closing connection to node %d", nodeid); | 1368 | log_print("closing connection to node %d", nodeid); |
| 1371 | con = nodeid2con(nodeid, 0); | 1369 | con = nodeid2con(nodeid, 0); |
| 1372 | if (con) { | 1370 | if (con) { |
| 1371 | clear_bit(CF_CONNECT_PENDING, &con->flags); | ||
| 1372 | clear_bit(CF_WRITE_PENDING, &con->flags); | ||
| 1373 | set_bit(CF_CLOSE, &con->flags); | ||
| 1374 | if (cancel_work_sync(&con->swork)) | ||
| 1375 | log_print("canceled swork for node %d", nodeid); | ||
| 1376 | if (cancel_work_sync(&con->rwork)) | ||
| 1377 | log_print("canceled rwork for node %d", nodeid); | ||
| 1373 | clean_one_writequeue(con); | 1378 | clean_one_writequeue(con); |
| 1374 | close_connection(con, true); | 1379 | close_connection(con, true); |
| 1375 | } | 1380 | } |
| @@ -1395,9 +1400,10 @@ static void process_send_sockets(struct work_struct *work) | |||
| 1395 | 1400 | ||
| 1396 | if (test_and_clear_bit(CF_CONNECT_PENDING, &con->flags)) { | 1401 | if (test_and_clear_bit(CF_CONNECT_PENDING, &con->flags)) { |
| 1397 | con->connect_action(con); | 1402 | con->connect_action(con); |
| 1403 | set_bit(CF_WRITE_PENDING, &con->flags); | ||
| 1398 | } | 1404 | } |
| 1399 | clear_bit(CF_WRITE_PENDING, &con->flags); | 1405 | if (test_and_clear_bit(CF_WRITE_PENDING, &con->flags)) |
| 1400 | send_to_sock(con); | 1406 | send_to_sock(con); |
| 1401 | } | 1407 | } |
| 1402 | 1408 | ||
| 1403 | 1409 | ||
diff --git a/fs/ext3/fsync.c b/fs/ext3/fsync.c index d33634119e17..451d166bbe93 100644 --- a/fs/ext3/fsync.c +++ b/fs/ext3/fsync.c | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | */ | 23 | */ |
| 24 | 24 | ||
| 25 | #include <linux/time.h> | 25 | #include <linux/time.h> |
| 26 | #include <linux/blkdev.h> | ||
| 26 | #include <linux/fs.h> | 27 | #include <linux/fs.h> |
| 27 | #include <linux/sched.h> | 28 | #include <linux/sched.h> |
| 28 | #include <linux/writeback.h> | 29 | #include <linux/writeback.h> |
| @@ -73,7 +74,7 @@ int ext3_sync_file(struct file * file, struct dentry *dentry, int datasync) | |||
| 73 | } | 74 | } |
| 74 | 75 | ||
| 75 | if (datasync && !(inode->i_state & I_DIRTY_DATASYNC)) | 76 | if (datasync && !(inode->i_state & I_DIRTY_DATASYNC)) |
| 76 | goto out; | 77 | goto flush; |
| 77 | 78 | ||
| 78 | /* | 79 | /* |
| 79 | * The VFS has written the file data. If the inode is unaltered | 80 | * The VFS has written the file data. If the inode is unaltered |
| @@ -85,7 +86,16 @@ int ext3_sync_file(struct file * file, struct dentry *dentry, int datasync) | |||
| 85 | .nr_to_write = 0, /* sys_fsync did this */ | 86 | .nr_to_write = 0, /* sys_fsync did this */ |
| 86 | }; | 87 | }; |
| 87 | ret = sync_inode(inode, &wbc); | 88 | ret = sync_inode(inode, &wbc); |
| 89 | goto out; | ||
| 88 | } | 90 | } |
| 91 | flush: | ||
| 92 | /* | ||
| 93 | * In case we didn't commit a transaction, we have to flush | ||
| 94 | * disk caches manually so that data really is on persistent | ||
| 95 | * storage | ||
| 96 | */ | ||
| 97 | if (test_opt(inode->i_sb, BARRIER)) | ||
| 98 | blkdev_issue_flush(inode->i_sb->s_bdev, NULL); | ||
| 89 | out: | 99 | out: |
| 90 | return ret; | 100 | return ret; |
| 91 | } | 101 | } |
diff --git a/fs/ext3/inode.c b/fs/ext3/inode.c index b49908a167ae..cd098a7b77fc 100644 --- a/fs/ext3/inode.c +++ b/fs/ext3/inode.c | |||
| @@ -172,10 +172,21 @@ static int try_to_extend_transaction(handle_t *handle, struct inode *inode) | |||
| 172 | * so before we call here everything must be consistently dirtied against | 172 | * so before we call here everything must be consistently dirtied against |
| 173 | * this transaction. | 173 | * this transaction. |
| 174 | */ | 174 | */ |
| 175 | static int ext3_journal_test_restart(handle_t *handle, struct inode *inode) | 175 | static int truncate_restart_transaction(handle_t *handle, struct inode *inode) |
| 176 | { | 176 | { |
| 177 | int ret; | ||
| 178 | |||
| 177 | jbd_debug(2, "restarting handle %p\n", handle); | 179 | jbd_debug(2, "restarting handle %p\n", handle); |
| 178 | return ext3_journal_restart(handle, blocks_for_truncate(inode)); | 180 | /* |
| 181 | * Drop truncate_mutex to avoid deadlock with ext3_get_blocks_handle | ||
| 182 | * At this moment, get_block can be called only for blocks inside | ||
| 183 | * i_size since page cache has been already dropped and writes are | ||
| 184 | * blocked by i_mutex. So we can safely drop the truncate_mutex. | ||
| 185 | */ | ||
| 186 | mutex_unlock(&EXT3_I(inode)->truncate_mutex); | ||
| 187 | ret = ext3_journal_restart(handle, blocks_for_truncate(inode)); | ||
| 188 | mutex_lock(&EXT3_I(inode)->truncate_mutex); | ||
| 189 | return ret; | ||
| 179 | } | 190 | } |
| 180 | 191 | ||
| 181 | /* | 192 | /* |
| @@ -2072,7 +2083,7 @@ static void ext3_clear_blocks(handle_t *handle, struct inode *inode, | |||
| 2072 | ext3_journal_dirty_metadata(handle, bh); | 2083 | ext3_journal_dirty_metadata(handle, bh); |
| 2073 | } | 2084 | } |
| 2074 | ext3_mark_inode_dirty(handle, inode); | 2085 | ext3_mark_inode_dirty(handle, inode); |
| 2075 | ext3_journal_test_restart(handle, inode); | 2086 | truncate_restart_transaction(handle, inode); |
| 2076 | if (bh) { | 2087 | if (bh) { |
| 2077 | BUFFER_TRACE(bh, "retaking write access"); | 2088 | BUFFER_TRACE(bh, "retaking write access"); |
| 2078 | ext3_journal_get_write_access(handle, bh); | 2089 | ext3_journal_get_write_access(handle, bh); |
| @@ -2282,7 +2293,7 @@ static void ext3_free_branches(handle_t *handle, struct inode *inode, | |||
| 2282 | return; | 2293 | return; |
| 2283 | if (try_to_extend_transaction(handle, inode)) { | 2294 | if (try_to_extend_transaction(handle, inode)) { |
| 2284 | ext3_mark_inode_dirty(handle, inode); | 2295 | ext3_mark_inode_dirty(handle, inode); |
| 2285 | ext3_journal_test_restart(handle, inode); | 2296 | truncate_restart_transaction(handle, inode); |
| 2286 | } | 2297 | } |
| 2287 | 2298 | ||
| 2288 | ext3_free_blocks(handle, inode, nr, 1); | 2299 | ext3_free_blocks(handle, inode, nr, 1); |
| @@ -2892,6 +2903,10 @@ static int ext3_do_update_inode(handle_t *handle, | |||
| 2892 | struct buffer_head *bh = iloc->bh; | 2903 | struct buffer_head *bh = iloc->bh; |
| 2893 | int err = 0, rc, block; | 2904 | int err = 0, rc, block; |
| 2894 | 2905 | ||
| 2906 | again: | ||
| 2907 | /* we can't allow multiple procs in here at once, its a bit racey */ | ||
| 2908 | lock_buffer(bh); | ||
| 2909 | |||
| 2895 | /* For fields not not tracking in the in-memory inode, | 2910 | /* For fields not not tracking in the in-memory inode, |
| 2896 | * initialise them to zero for new inodes. */ | 2911 | * initialise them to zero for new inodes. */ |
| 2897 | if (ei->i_state & EXT3_STATE_NEW) | 2912 | if (ei->i_state & EXT3_STATE_NEW) |
| @@ -2951,16 +2966,20 @@ static int ext3_do_update_inode(handle_t *handle, | |||
| 2951 | /* If this is the first large file | 2966 | /* If this is the first large file |
| 2952 | * created, add a flag to the superblock. | 2967 | * created, add a flag to the superblock. |
| 2953 | */ | 2968 | */ |
| 2969 | unlock_buffer(bh); | ||
| 2954 | err = ext3_journal_get_write_access(handle, | 2970 | err = ext3_journal_get_write_access(handle, |
| 2955 | EXT3_SB(sb)->s_sbh); | 2971 | EXT3_SB(sb)->s_sbh); |
| 2956 | if (err) | 2972 | if (err) |
| 2957 | goto out_brelse; | 2973 | goto out_brelse; |
| 2974 | |||
| 2958 | ext3_update_dynamic_rev(sb); | 2975 | ext3_update_dynamic_rev(sb); |
| 2959 | EXT3_SET_RO_COMPAT_FEATURE(sb, | 2976 | EXT3_SET_RO_COMPAT_FEATURE(sb, |
| 2960 | EXT3_FEATURE_RO_COMPAT_LARGE_FILE); | 2977 | EXT3_FEATURE_RO_COMPAT_LARGE_FILE); |
| 2961 | handle->h_sync = 1; | 2978 | handle->h_sync = 1; |
| 2962 | err = ext3_journal_dirty_metadata(handle, | 2979 | err = ext3_journal_dirty_metadata(handle, |
| 2963 | EXT3_SB(sb)->s_sbh); | 2980 | EXT3_SB(sb)->s_sbh); |
| 2981 | /* get our lock and start over */ | ||
| 2982 | goto again; | ||
| 2964 | } | 2983 | } |
| 2965 | } | 2984 | } |
| 2966 | } | 2985 | } |
| @@ -2983,6 +3002,7 @@ static int ext3_do_update_inode(handle_t *handle, | |||
| 2983 | raw_inode->i_extra_isize = cpu_to_le16(ei->i_extra_isize); | 3002 | raw_inode->i_extra_isize = cpu_to_le16(ei->i_extra_isize); |
| 2984 | 3003 | ||
| 2985 | BUFFER_TRACE(bh, "call ext3_journal_dirty_metadata"); | 3004 | BUFFER_TRACE(bh, "call ext3_journal_dirty_metadata"); |
| 3005 | unlock_buffer(bh); | ||
| 2986 | rc = ext3_journal_dirty_metadata(handle, bh); | 3006 | rc = ext3_journal_dirty_metadata(handle, bh); |
| 2987 | if (!err) | 3007 | if (!err) |
| 2988 | err = rc; | 3008 | err = rc; |
diff --git a/fs/ext4/Kconfig b/fs/ext4/Kconfig index 418b6f3b0ae8..d5c0ea2e8f2d 100644 --- a/fs/ext4/Kconfig +++ b/fs/ext4/Kconfig | |||
| @@ -37,7 +37,7 @@ config EXT4DEV_COMPAT | |||
| 37 | 37 | ||
| 38 | To enable backwards compatibility so that systems that are | 38 | To enable backwards compatibility so that systems that are |
| 39 | still expecting to mount ext4 filesystems using ext4dev, | 39 | still expecting to mount ext4 filesystems using ext4dev, |
| 40 | chose Y here. This feature will go away by 2.6.31, so | 40 | choose Y here. This feature will go away by 2.6.31, so |
| 41 | please arrange to get your userspace programs fixed! | 41 | please arrange to get your userspace programs fixed! |
| 42 | 42 | ||
| 43 | config EXT4_FS_XATTR | 43 | config EXT4_FS_XATTR |
| @@ -77,3 +77,12 @@ config EXT4_FS_SECURITY | |||
| 77 | 77 | ||
| 78 | If you are not using a security module that requires using | 78 | If you are not using a security module that requires using |
| 79 | extended attributes for file security labels, say N. | 79 | extended attributes for file security labels, say N. |
| 80 | |||
| 81 | config EXT4_DEBUG | ||
| 82 | bool "EXT4 debugging support" | ||
| 83 | depends on EXT4_FS | ||
| 84 | help | ||
| 85 | Enables run-time debugging support for the ext4 filesystem. | ||
| 86 | |||
| 87 | If you select Y here, then you will be able to turn on debugging | ||
| 88 | with a command such as "echo 1 > /sys/kernel/debug/ext4/mballoc-debug" | ||
diff --git a/fs/ext4/balloc.c b/fs/ext4/balloc.c index e2126d70dff5..1d0418980f8d 100644 --- a/fs/ext4/balloc.c +++ b/fs/ext4/balloc.c | |||
| @@ -478,7 +478,7 @@ void ext4_add_groupblocks(handle_t *handle, struct super_block *sb, | |||
| 478 | * new bitmap information | 478 | * new bitmap information |
| 479 | */ | 479 | */ |
| 480 | set_bit(EXT4_GROUP_INFO_NEED_INIT_BIT, &(grp->bb_state)); | 480 | set_bit(EXT4_GROUP_INFO_NEED_INIT_BIT, &(grp->bb_state)); |
| 481 | ext4_mb_update_group_info(grp, blocks_freed); | 481 | grp->bb_free += blocks_freed; |
| 482 | up_write(&grp->alloc_sem); | 482 | up_write(&grp->alloc_sem); |
| 483 | 483 | ||
| 484 | /* We dirtied the bitmap block */ | 484 | /* We dirtied the bitmap block */ |
diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h index 9714db393efe..e227eea23f05 100644 --- a/fs/ext4/ext4.h +++ b/fs/ext4/ext4.h | |||
| @@ -67,27 +67,29 @@ typedef unsigned int ext4_group_t; | |||
| 67 | 67 | ||
| 68 | 68 | ||
| 69 | /* prefer goal again. length */ | 69 | /* prefer goal again. length */ |
| 70 | #define EXT4_MB_HINT_MERGE 1 | 70 | #define EXT4_MB_HINT_MERGE 0x0001 |
| 71 | /* blocks already reserved */ | 71 | /* blocks already reserved */ |
| 72 | #define EXT4_MB_HINT_RESERVED 2 | 72 | #define EXT4_MB_HINT_RESERVED 0x0002 |
| 73 | /* metadata is being allocated */ | 73 | /* metadata is being allocated */ |
| 74 | #define EXT4_MB_HINT_METADATA 4 | 74 | #define EXT4_MB_HINT_METADATA 0x0004 |
| 75 | /* first blocks in the file */ | 75 | /* first blocks in the file */ |
| 76 | #define EXT4_MB_HINT_FIRST 8 | 76 | #define EXT4_MB_HINT_FIRST 0x0008 |
| 77 | /* search for the best chunk */ | 77 | /* search for the best chunk */ |
| 78 | #define EXT4_MB_HINT_BEST 16 | 78 | #define EXT4_MB_HINT_BEST 0x0010 |
| 79 | /* data is being allocated */ | 79 | /* data is being allocated */ |
| 80 | #define EXT4_MB_HINT_DATA 32 | 80 | #define EXT4_MB_HINT_DATA 0x0020 |
| 81 | /* don't preallocate (for tails) */ | 81 | /* don't preallocate (for tails) */ |
| 82 | #define EXT4_MB_HINT_NOPREALLOC 64 | 82 | #define EXT4_MB_HINT_NOPREALLOC 0x0040 |
| 83 | /* allocate for locality group */ | 83 | /* allocate for locality group */ |
| 84 | #define EXT4_MB_HINT_GROUP_ALLOC 128 | 84 | #define EXT4_MB_HINT_GROUP_ALLOC 0x0080 |
| 85 | /* allocate goal blocks or none */ | 85 | /* allocate goal blocks or none */ |
| 86 | #define EXT4_MB_HINT_GOAL_ONLY 256 | 86 | #define EXT4_MB_HINT_GOAL_ONLY 0x0100 |
| 87 | /* goal is meaningful */ | 87 | /* goal is meaningful */ |
| 88 | #define EXT4_MB_HINT_TRY_GOAL 512 | 88 | #define EXT4_MB_HINT_TRY_GOAL 0x0200 |
| 89 | /* blocks already pre-reserved by delayed allocation */ | 89 | /* blocks already pre-reserved by delayed allocation */ |
| 90 | #define EXT4_MB_DELALLOC_RESERVED 1024 | 90 | #define EXT4_MB_DELALLOC_RESERVED 0x0400 |
| 91 | /* We are doing stream allocation */ | ||
| 92 | #define EXT4_MB_STREAM_ALLOC 0x0800 | ||
| 91 | 93 | ||
| 92 | 94 | ||
| 93 | struct ext4_allocation_request { | 95 | struct ext4_allocation_request { |
| @@ -112,6 +114,21 @@ struct ext4_allocation_request { | |||
| 112 | }; | 114 | }; |
| 113 | 115 | ||
| 114 | /* | 116 | /* |
| 117 | * For delayed allocation tracking | ||
| 118 | */ | ||
| 119 | struct mpage_da_data { | ||
| 120 | struct inode *inode; | ||
| 121 | sector_t b_blocknr; /* start block number of extent */ | ||
| 122 | size_t b_size; /* size of extent */ | ||
| 123 | unsigned long b_state; /* state of the extent */ | ||
| 124 | unsigned long first_page, next_page; /* extent of pages */ | ||
| 125 | struct writeback_control *wbc; | ||
| 126 | int io_done; | ||
| 127 | int pages_written; | ||
| 128 | int retval; | ||
| 129 | }; | ||
| 130 | |||
| 131 | /* | ||
| 115 | * Special inodes numbers | 132 | * Special inodes numbers |
| 116 | */ | 133 | */ |
| 117 | #define EXT4_BAD_INO 1 /* Bad blocks inode */ | 134 | #define EXT4_BAD_INO 1 /* Bad blocks inode */ |
| @@ -251,7 +268,6 @@ struct flex_groups { | |||
| 251 | #define EXT4_TOPDIR_FL 0x00020000 /* Top of directory hierarchies*/ | 268 | #define EXT4_TOPDIR_FL 0x00020000 /* Top of directory hierarchies*/ |
| 252 | #define EXT4_HUGE_FILE_FL 0x00040000 /* Set to each huge file */ | 269 | #define EXT4_HUGE_FILE_FL 0x00040000 /* Set to each huge file */ |
| 253 | #define EXT4_EXTENTS_FL 0x00080000 /* Inode uses extents */ | 270 | #define EXT4_EXTENTS_FL 0x00080000 /* Inode uses extents */ |
| 254 | #define EXT4_EXT_MIGRATE 0x00100000 /* Inode is migrating */ | ||
| 255 | #define EXT4_RESERVED_FL 0x80000000 /* reserved for ext4 lib */ | 271 | #define EXT4_RESERVED_FL 0x80000000 /* reserved for ext4 lib */ |
| 256 | 272 | ||
| 257 | #define EXT4_FL_USER_VISIBLE 0x000BDFFF /* User visible flags */ | 273 | #define EXT4_FL_USER_VISIBLE 0x000BDFFF /* User visible flags */ |
| @@ -289,6 +305,7 @@ static inline __u32 ext4_mask_flags(umode_t mode, __u32 flags) | |||
| 289 | #define EXT4_STATE_XATTR 0x00000004 /* has in-inode xattrs */ | 305 | #define EXT4_STATE_XATTR 0x00000004 /* has in-inode xattrs */ |
| 290 | #define EXT4_STATE_NO_EXPAND 0x00000008 /* No space for expansion */ | 306 | #define EXT4_STATE_NO_EXPAND 0x00000008 /* No space for expansion */ |
| 291 | #define EXT4_STATE_DA_ALLOC_CLOSE 0x00000010 /* Alloc DA blks on close */ | 307 | #define EXT4_STATE_DA_ALLOC_CLOSE 0x00000010 /* Alloc DA blks on close */ |
| 308 | #define EXT4_STATE_EXT_MIGRATE 0x00000020 /* Inode is migrating */ | ||
| 292 | 309 | ||
| 293 | /* Used to pass group descriptor data when online resize is done */ | 310 | /* Used to pass group descriptor data when online resize is done */ |
| 294 | struct ext4_new_group_input { | 311 | struct ext4_new_group_input { |
| @@ -386,6 +403,9 @@ struct ext4_mount_options { | |||
| 386 | #endif | 403 | #endif |
| 387 | }; | 404 | }; |
| 388 | 405 | ||
| 406 | /* Max physical block we can addres w/o extents */ | ||
| 407 | #define EXT4_MAX_BLOCK_FILE_PHYS 0xFFFFFFFF | ||
| 408 | |||
| 389 | /* | 409 | /* |
| 390 | * Structure of an inode on the disk | 410 | * Structure of an inode on the disk |
| 391 | */ | 411 | */ |
| @@ -456,7 +476,6 @@ struct move_extent { | |||
| 456 | __u64 len; /* block length to be moved */ | 476 | __u64 len; /* block length to be moved */ |
| 457 | __u64 moved_len; /* moved block length */ | 477 | __u64 moved_len; /* moved block length */ |
| 458 | }; | 478 | }; |
| 459 | #define MAX_DEFRAG_SIZE ((1UL<<31) - 1) | ||
| 460 | 479 | ||
| 461 | #define EXT4_EPOCH_BITS 2 | 480 | #define EXT4_EPOCH_BITS 2 |
| 462 | #define EXT4_EPOCH_MASK ((1 << EXT4_EPOCH_BITS) - 1) | 481 | #define EXT4_EPOCH_MASK ((1 << EXT4_EPOCH_BITS) - 1) |
| @@ -694,7 +713,6 @@ struct ext4_inode_info { | |||
| 694 | #define EXT4_MOUNT_QUOTA 0x80000 /* Some quota option set */ | 713 | #define EXT4_MOUNT_QUOTA 0x80000 /* Some quota option set */ |
| 695 | #define EXT4_MOUNT_USRQUOTA 0x100000 /* "old" user quota */ | 714 | #define EXT4_MOUNT_USRQUOTA 0x100000 /* "old" user quota */ |
| 696 | #define EXT4_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */ | 715 | #define EXT4_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */ |
| 697 | #define EXT4_MOUNT_JOURNAL_CHECKSUM 0x800000 /* Journal checksums */ | ||
| 698 | #define EXT4_MOUNT_JOURNAL_ASYNC_COMMIT 0x1000000 /* Journal Async Commit */ | 716 | #define EXT4_MOUNT_JOURNAL_ASYNC_COMMIT 0x1000000 /* Journal Async Commit */ |
| 699 | #define EXT4_MOUNT_I_VERSION 0x2000000 /* i_version support */ | 717 | #define EXT4_MOUNT_I_VERSION 0x2000000 /* i_version support */ |
| 700 | #define EXT4_MOUNT_DELALLOC 0x8000000 /* Delalloc support */ | 718 | #define EXT4_MOUNT_DELALLOC 0x8000000 /* Delalloc support */ |
| @@ -841,6 +859,7 @@ struct ext4_sb_info { | |||
| 841 | unsigned long s_gdb_count; /* Number of group descriptor blocks */ | 859 | unsigned long s_gdb_count; /* Number of group descriptor blocks */ |
| 842 | unsigned long s_desc_per_block; /* Number of group descriptors per block */ | 860 | unsigned long s_desc_per_block; /* Number of group descriptors per block */ |
| 843 | ext4_group_t s_groups_count; /* Number of groups in the fs */ | 861 | ext4_group_t s_groups_count; /* Number of groups in the fs */ |
| 862 | ext4_group_t s_blockfile_groups;/* Groups acceptable for non-extent files */ | ||
| 844 | unsigned long s_overhead_last; /* Last calculated overhead */ | 863 | unsigned long s_overhead_last; /* Last calculated overhead */ |
| 845 | unsigned long s_blocks_last; /* Last seen block count */ | 864 | unsigned long s_blocks_last; /* Last seen block count */ |
| 846 | loff_t s_bitmap_maxbytes; /* max bytes for bitmap files */ | 865 | loff_t s_bitmap_maxbytes; /* max bytes for bitmap files */ |
| @@ -950,6 +969,7 @@ struct ext4_sb_info { | |||
| 950 | atomic_t s_mb_lost_chunks; | 969 | atomic_t s_mb_lost_chunks; |
| 951 | atomic_t s_mb_preallocated; | 970 | atomic_t s_mb_preallocated; |
| 952 | atomic_t s_mb_discarded; | 971 | atomic_t s_mb_discarded; |
| 972 | atomic_t s_lock_busy; | ||
| 953 | 973 | ||
| 954 | /* locality groups */ | 974 | /* locality groups */ |
| 955 | struct ext4_locality_group *s_locality_groups; | 975 | struct ext4_locality_group *s_locality_groups; |
| @@ -1340,8 +1360,6 @@ extern void ext4_mb_free_blocks(handle_t *, struct inode *, | |||
| 1340 | ext4_fsblk_t, unsigned long, int, unsigned long *); | 1360 | ext4_fsblk_t, unsigned long, int, unsigned long *); |
| 1341 | extern int ext4_mb_add_groupinfo(struct super_block *sb, | 1361 | extern int ext4_mb_add_groupinfo(struct super_block *sb, |
| 1342 | ext4_group_t i, struct ext4_group_desc *desc); | 1362 | ext4_group_t i, struct ext4_group_desc *desc); |
| 1343 | extern void ext4_mb_update_group_info(struct ext4_group_info *grp, | ||
| 1344 | ext4_grpblk_t add); | ||
| 1345 | extern int ext4_mb_get_buddy_cache_lock(struct super_block *, ext4_group_t); | 1363 | extern int ext4_mb_get_buddy_cache_lock(struct super_block *, ext4_group_t); |
| 1346 | extern void ext4_mb_put_buddy_cache_lock(struct super_block *, | 1364 | extern void ext4_mb_put_buddy_cache_lock(struct super_block *, |
| 1347 | ext4_group_t, int); | 1365 | ext4_group_t, int); |
| @@ -1367,6 +1385,7 @@ extern int ext4_change_inode_journal_flag(struct inode *, int); | |||
| 1367 | extern int ext4_get_inode_loc(struct inode *, struct ext4_iloc *); | 1385 | extern int ext4_get_inode_loc(struct inode *, struct ext4_iloc *); |
| 1368 | extern int ext4_can_truncate(struct inode *inode); | 1386 | extern int ext4_can_truncate(struct inode *inode); |
| 1369 | extern void ext4_truncate(struct inode *); | 1387 | extern void ext4_truncate(struct inode *); |
| 1388 | extern int ext4_truncate_restart_trans(handle_t *, struct inode *, int nblocks); | ||
| 1370 | extern void ext4_set_inode_flags(struct inode *); | 1389 | extern void ext4_set_inode_flags(struct inode *); |
| 1371 | extern void ext4_get_inode_flags(struct ext4_inode_info *); | 1390 | extern void ext4_get_inode_flags(struct ext4_inode_info *); |
| 1372 | extern int ext4_alloc_da_blocks(struct inode *inode); | 1391 | extern int ext4_alloc_da_blocks(struct inode *inode); |
| @@ -1575,15 +1594,18 @@ static inline void ext4_update_i_disksize(struct inode *inode, loff_t newsize) | |||
| 1575 | struct ext4_group_info { | 1594 | struct ext4_group_info { |
| 1576 | unsigned long bb_state; | 1595 | unsigned long bb_state; |
| 1577 | struct rb_root bb_free_root; | 1596 | struct rb_root bb_free_root; |
| 1578 | unsigned short bb_first_free; | 1597 | ext4_grpblk_t bb_first_free; /* first free block */ |
| 1579 | unsigned short bb_free; | 1598 | ext4_grpblk_t bb_free; /* total free blocks */ |
| 1580 | unsigned short bb_fragments; | 1599 | ext4_grpblk_t bb_fragments; /* nr of freespace fragments */ |
| 1581 | struct list_head bb_prealloc_list; | 1600 | struct list_head bb_prealloc_list; |
| 1582 | #ifdef DOUBLE_CHECK | 1601 | #ifdef DOUBLE_CHECK |
| 1583 | void *bb_bitmap; | 1602 | void *bb_bitmap; |
| 1584 | #endif | 1603 | #endif |
| 1585 | struct rw_semaphore alloc_sem; | 1604 | struct rw_semaphore alloc_sem; |
| 1586 | unsigned short bb_counters[]; | 1605 | ext4_grpblk_t bb_counters[]; /* Nr of free power-of-two-block |
| 1606 | * regions, index is order. | ||
| 1607 | * bb_counters[3] = 5 means | ||
| 1608 | * 5 free 8-block regions. */ | ||
| 1587 | }; | 1609 | }; |
| 1588 | 1610 | ||
| 1589 | #define EXT4_GROUP_INFO_NEED_INIT_BIT 0 | 1611 | #define EXT4_GROUP_INFO_NEED_INIT_BIT 0 |
| @@ -1591,15 +1613,42 @@ struct ext4_group_info { | |||
| 1591 | #define EXT4_MB_GRP_NEED_INIT(grp) \ | 1613 | #define EXT4_MB_GRP_NEED_INIT(grp) \ |
| 1592 | (test_bit(EXT4_GROUP_INFO_NEED_INIT_BIT, &((grp)->bb_state))) | 1614 | (test_bit(EXT4_GROUP_INFO_NEED_INIT_BIT, &((grp)->bb_state))) |
| 1593 | 1615 | ||
| 1616 | #define EXT4_MAX_CONTENTION 8 | ||
| 1617 | #define EXT4_CONTENTION_THRESHOLD 2 | ||
| 1618 | |||
| 1594 | static inline spinlock_t *ext4_group_lock_ptr(struct super_block *sb, | 1619 | static inline spinlock_t *ext4_group_lock_ptr(struct super_block *sb, |
| 1595 | ext4_group_t group) | 1620 | ext4_group_t group) |
| 1596 | { | 1621 | { |
| 1597 | return bgl_lock_ptr(EXT4_SB(sb)->s_blockgroup_lock, group); | 1622 | return bgl_lock_ptr(EXT4_SB(sb)->s_blockgroup_lock, group); |
| 1598 | } | 1623 | } |
| 1599 | 1624 | ||
| 1625 | /* | ||
| 1626 | * Returns true if the filesystem is busy enough that attempts to | ||
| 1627 | * access the block group locks has run into contention. | ||
| 1628 | */ | ||
| 1629 | static inline int ext4_fs_is_busy(struct ext4_sb_info *sbi) | ||
| 1630 | { | ||
| 1631 | return (atomic_read(&sbi->s_lock_busy) > EXT4_CONTENTION_THRESHOLD); | ||
| 1632 | } | ||
| 1633 | |||
| 1600 | static inline void ext4_lock_group(struct super_block *sb, ext4_group_t group) | 1634 | static inline void ext4_lock_group(struct super_block *sb, ext4_group_t group) |
| 1601 | { | 1635 | { |
| 1602 | spin_lock(ext4_group_lock_ptr(sb, group)); | 1636 | spinlock_t *lock = ext4_group_lock_ptr(sb, group); |
| 1637 | if (spin_trylock(lock)) | ||
| 1638 | /* | ||
| 1639 | * We're able to grab the lock right away, so drop the | ||
| 1640 | * lock contention counter. | ||
| 1641 | */ | ||
| 1642 | atomic_add_unless(&EXT4_SB(sb)->s_lock_busy, -1, 0); | ||
| 1643 | else { | ||
| 1644 | /* | ||
| 1645 | * The lock is busy, so bump the contention counter, | ||
| 1646 | * and then wait on the spin lock. | ||
| 1647 | */ | ||
| 1648 | atomic_add_unless(&EXT4_SB(sb)->s_lock_busy, 1, | ||
| 1649 | EXT4_MAX_CONTENTION); | ||
| 1650 | spin_lock(lock); | ||
| 1651 | } | ||
| 1603 | } | 1652 | } |
| 1604 | 1653 | ||
| 1605 | static inline void ext4_unlock_group(struct super_block *sb, | 1654 | static inline void ext4_unlock_group(struct super_block *sb, |
diff --git a/fs/ext4/ext4_extents.h b/fs/ext4/ext4_extents.h index 20a84105a10b..61652f1d15e6 100644 --- a/fs/ext4/ext4_extents.h +++ b/fs/ext4/ext4_extents.h | |||
| @@ -43,8 +43,7 @@ | |||
| 43 | #define CHECK_BINSEARCH__ | 43 | #define CHECK_BINSEARCH__ |
| 44 | 44 | ||
| 45 | /* | 45 | /* |
| 46 | * If EXT_DEBUG is defined you can use the 'extdebug' mount option | 46 | * Turn on EXT_DEBUG to get lots of info about extents operations. |
| 47 | * to get lots of info about what's going on. | ||
| 48 | */ | 47 | */ |
| 49 | #define EXT_DEBUG__ | 48 | #define EXT_DEBUG__ |
| 50 | #ifdef EXT_DEBUG | 49 | #ifdef EXT_DEBUG |
| @@ -138,6 +137,7 @@ typedef int (*ext_prepare_callback)(struct inode *, struct ext4_ext_path *, | |||
| 138 | #define EXT_BREAK 1 | 137 | #define EXT_BREAK 1 |
| 139 | #define EXT_REPEAT 2 | 138 | #define EXT_REPEAT 2 |
| 140 | 139 | ||
| 140 | /* Maximum logical block in a file; ext4_extent's ee_block is __le32 */ | ||
| 141 | #define EXT_MAX_BLOCK 0xffffffff | 141 | #define EXT_MAX_BLOCK 0xffffffff |
| 142 | 142 | ||
| 143 | /* | 143 | /* |
diff --git a/fs/ext4/ext4_jbd2.c b/fs/ext4/ext4_jbd2.c index eb27fd0f2ee8..6a9409920dee 100644 --- a/fs/ext4/ext4_jbd2.c +++ b/fs/ext4/ext4_jbd2.c | |||
| @@ -44,7 +44,7 @@ int __ext4_journal_forget(const char *where, handle_t *handle, | |||
| 44 | handle, err); | 44 | handle, err); |
| 45 | } | 45 | } |
| 46 | else | 46 | else |
| 47 | brelse(bh); | 47 | bforget(bh); |
| 48 | return err; | 48 | return err; |
| 49 | } | 49 | } |
| 50 | 50 | ||
| @@ -60,7 +60,7 @@ int __ext4_journal_revoke(const char *where, handle_t *handle, | |||
| 60 | handle, err); | 60 | handle, err); |
| 61 | } | 61 | } |
| 62 | else | 62 | else |
| 63 | brelse(bh); | 63 | bforget(bh); |
| 64 | return err; | 64 | return err; |
| 65 | } | 65 | } |
| 66 | 66 | ||
| @@ -89,7 +89,10 @@ int __ext4_handle_dirty_metadata(const char *where, handle_t *handle, | |||
| 89 | ext4_journal_abort_handle(where, __func__, bh, | 89 | ext4_journal_abort_handle(where, __func__, bh, |
| 90 | handle, err); | 90 | handle, err); |
| 91 | } else { | 91 | } else { |
| 92 | mark_buffer_dirty(bh); | 92 | if (inode && bh) |
| 93 | mark_buffer_dirty_inode(bh, inode); | ||
| 94 | else | ||
| 95 | mark_buffer_dirty(bh); | ||
| 93 | if (inode && inode_needs_sync(inode)) { | 96 | if (inode && inode_needs_sync(inode)) { |
| 94 | sync_dirty_buffer(bh); | 97 | sync_dirty_buffer(bh); |
| 95 | if (buffer_req(bh) && !buffer_uptodate(bh)) { | 98 | if (buffer_req(bh) && !buffer_uptodate(bh)) { |
diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c index 73ebfb44ad75..7a3832577923 100644 --- a/fs/ext4/extents.c +++ b/fs/ext4/extents.c | |||
| @@ -93,7 +93,9 @@ static void ext4_idx_store_pblock(struct ext4_extent_idx *ix, ext4_fsblk_t pb) | |||
| 93 | ix->ei_leaf_hi = cpu_to_le16((unsigned long) ((pb >> 31) >> 1) & 0xffff); | 93 | ix->ei_leaf_hi = cpu_to_le16((unsigned long) ((pb >> 31) >> 1) & 0xffff); |
| 94 | } | 94 | } |
| 95 | 95 | ||
| 96 | static int ext4_ext_journal_restart(handle_t *handle, int needed) | 96 | static int ext4_ext_truncate_extend_restart(handle_t *handle, |
| 97 | struct inode *inode, | ||
| 98 | int needed) | ||
| 97 | { | 99 | { |
| 98 | int err; | 100 | int err; |
| 99 | 101 | ||
| @@ -104,7 +106,14 @@ static int ext4_ext_journal_restart(handle_t *handle, int needed) | |||
| 104 | err = ext4_journal_extend(handle, needed); | 106 | err = ext4_journal_extend(handle, needed); |
| 105 | if (err <= 0) | 107 | if (err <= 0) |
| 106 | return err; | 108 | return err; |
| 107 | return ext4_journal_restart(handle, needed); | 109 | err = ext4_truncate_restart_trans(handle, inode, needed); |
| 110 | /* | ||
| 111 | * We have dropped i_data_sem so someone might have cached again | ||
| 112 | * an extent we are going to truncate. | ||
| 113 | */ | ||
| 114 | ext4_ext_invalidate_cache(inode); | ||
| 115 | |||
| 116 | return err; | ||
| 108 | } | 117 | } |
| 109 | 118 | ||
| 110 | /* | 119 | /* |
| @@ -220,57 +229,65 @@ ext4_ext_new_meta_block(handle_t *handle, struct inode *inode, | |||
| 220 | return newblock; | 229 | return newblock; |
| 221 | } | 230 | } |
| 222 | 231 | ||
| 223 | static int ext4_ext_space_block(struct inode *inode) | 232 | static inline int ext4_ext_space_block(struct inode *inode, int check) |
| 224 | { | 233 | { |
| 225 | int size; | 234 | int size; |
| 226 | 235 | ||
| 227 | size = (inode->i_sb->s_blocksize - sizeof(struct ext4_extent_header)) | 236 | size = (inode->i_sb->s_blocksize - sizeof(struct ext4_extent_header)) |
| 228 | / sizeof(struct ext4_extent); | 237 | / sizeof(struct ext4_extent); |
| 238 | if (!check) { | ||
| 229 | #ifdef AGGRESSIVE_TEST | 239 | #ifdef AGGRESSIVE_TEST |
| 230 | if (size > 6) | 240 | if (size > 6) |
| 231 | size = 6; | 241 | size = 6; |
| 232 | #endif | 242 | #endif |
| 243 | } | ||
| 233 | return size; | 244 | return size; |
| 234 | } | 245 | } |
| 235 | 246 | ||
| 236 | static int ext4_ext_space_block_idx(struct inode *inode) | 247 | static inline int ext4_ext_space_block_idx(struct inode *inode, int check) |
| 237 | { | 248 | { |
| 238 | int size; | 249 | int size; |
| 239 | 250 | ||
| 240 | size = (inode->i_sb->s_blocksize - sizeof(struct ext4_extent_header)) | 251 | size = (inode->i_sb->s_blocksize - sizeof(struct ext4_extent_header)) |
| 241 | / sizeof(struct ext4_extent_idx); | 252 | / sizeof(struct ext4_extent_idx); |
| 253 | if (!check) { | ||
| 242 | #ifdef AGGRESSIVE_TEST | 254 | #ifdef AGGRESSIVE_TEST |
| 243 | if (size > 5) | 255 | if (size > 5) |
| 244 | size = 5; | 256 | size = 5; |
| 245 | #endif | 257 | #endif |
| 258 | } | ||
| 246 | return size; | 259 | return size; |
| 247 | } | 260 | } |
| 248 | 261 | ||
| 249 | static int ext4_ext_space_root(struct inode *inode) | 262 | static inline int ext4_ext_space_root(struct inode *inode, int check) |
| 250 | { | 263 | { |
| 251 | int size; | 264 | int size; |
| 252 | 265 | ||
| 253 | size = sizeof(EXT4_I(inode)->i_data); | 266 | size = sizeof(EXT4_I(inode)->i_data); |
| 254 | size -= sizeof(struct ext4_extent_header); | 267 | size -= sizeof(struct ext4_extent_header); |
| 255 | size /= sizeof(struct ext4_extent); | 268 | size /= sizeof(struct ext4_extent); |
| 269 | if (!check) { | ||
| 256 | #ifdef AGGRESSIVE_TEST | 270 | #ifdef AGGRESSIVE_TEST |
| 257 | if (size > 3) | 271 | if (size > 3) |
| 258 | size = 3; | 272 | size = 3; |
| 259 | #endif | 273 | #endif |
| 274 | } | ||
| 260 | return size; | 275 | return size; |
| 261 | } | 276 | } |
| 262 | 277 | ||
| 263 | static int ext4_ext_space_root_idx(struct inode *inode) | 278 | static inline int ext4_ext_space_root_idx(struct inode *inode, int check) |
| 264 | { | 279 | { |
| 265 | int size; | 280 | int size; |
| 266 | 281 | ||
| 267 | size = sizeof(EXT4_I(inode)->i_data); | 282 | size = sizeof(EXT4_I(inode)->i_data); |
| 268 | size -= sizeof(struct ext4_extent_header); | 283 | size -= sizeof(struct ext4_extent_header); |
| 269 | size /= sizeof(struct ext4_extent_idx); | 284 | size /= sizeof(struct ext4_extent_idx); |
| 285 | if (!check) { | ||
| 270 | #ifdef AGGRESSIVE_TEST | 286 | #ifdef AGGRESSIVE_TEST |
| 271 | if (size > 4) | 287 | if (size > 4) |
| 272 | size = 4; | 288 | size = 4; |
| 273 | #endif | 289 | #endif |
| 290 | } | ||
| 274 | return size; | 291 | return size; |
| 275 | } | 292 | } |
| 276 | 293 | ||
| @@ -284,9 +301,9 @@ int ext4_ext_calc_metadata_amount(struct inode *inode, int blocks) | |||
| 284 | int lcap, icap, rcap, leafs, idxs, num; | 301 | int lcap, icap, rcap, leafs, idxs, num; |
| 285 | int newextents = blocks; | 302 | int newextents = blocks; |
| 286 | 303 | ||
| 287 | rcap = ext4_ext_space_root_idx(inode); | 304 | rcap = ext4_ext_space_root_idx(inode, 0); |
| 288 | lcap = ext4_ext_space_block(inode); | 305 | lcap = ext4_ext_space_block(inode, 0); |
| 289 | icap = ext4_ext_space_block_idx(inode); | 306 | icap = ext4_ext_space_block_idx(inode, 0); |
| 290 | 307 | ||
| 291 | /* number of new leaf blocks needed */ | 308 | /* number of new leaf blocks needed */ |
| 292 | num = leafs = (newextents + lcap - 1) / lcap; | 309 | num = leafs = (newextents + lcap - 1) / lcap; |
| @@ -311,14 +328,14 @@ ext4_ext_max_entries(struct inode *inode, int depth) | |||
| 311 | 328 | ||
| 312 | if (depth == ext_depth(inode)) { | 329 | if (depth == ext_depth(inode)) { |
| 313 | if (depth == 0) | 330 | if (depth == 0) |
| 314 | max = ext4_ext_space_root(inode); | 331 | max = ext4_ext_space_root(inode, 1); |
| 315 | else | 332 | else |
| 316 | max = ext4_ext_space_root_idx(inode); | 333 | max = ext4_ext_space_root_idx(inode, 1); |
| 317 | } else { | 334 | } else { |
| 318 | if (depth == 0) | 335 | if (depth == 0) |
| 319 | max = ext4_ext_space_block(inode); | 336 | max = ext4_ext_space_block(inode, 1); |
| 320 | else | 337 | else |
| 321 | max = ext4_ext_space_block_idx(inode); | 338 | max = ext4_ext_space_block_idx(inode, 1); |
| 322 | } | 339 | } |
| 323 | 340 | ||
| 324 | return max; | 341 | return max; |
| @@ -437,8 +454,9 @@ static void ext4_ext_show_path(struct inode *inode, struct ext4_ext_path *path) | |||
| 437 | ext_debug(" %d->%llu", le32_to_cpu(path->p_idx->ei_block), | 454 | ext_debug(" %d->%llu", le32_to_cpu(path->p_idx->ei_block), |
| 438 | idx_pblock(path->p_idx)); | 455 | idx_pblock(path->p_idx)); |
| 439 | } else if (path->p_ext) { | 456 | } else if (path->p_ext) { |
| 440 | ext_debug(" %d:%d:%llu ", | 457 | ext_debug(" %d:[%d]%d:%llu ", |
| 441 | le32_to_cpu(path->p_ext->ee_block), | 458 | le32_to_cpu(path->p_ext->ee_block), |
| 459 | ext4_ext_is_uninitialized(path->p_ext), | ||
| 442 | ext4_ext_get_actual_len(path->p_ext), | 460 | ext4_ext_get_actual_len(path->p_ext), |
| 443 | ext_pblock(path->p_ext)); | 461 | ext_pblock(path->p_ext)); |
| 444 | } else | 462 | } else |
| @@ -460,8 +478,11 @@ static void ext4_ext_show_leaf(struct inode *inode, struct ext4_ext_path *path) | |||
| 460 | eh = path[depth].p_hdr; | 478 | eh = path[depth].p_hdr; |
| 461 | ex = EXT_FIRST_EXTENT(eh); | 479 | ex = EXT_FIRST_EXTENT(eh); |
| 462 | 480 | ||
| 481 | ext_debug("Displaying leaf extents for inode %lu\n", inode->i_ino); | ||
| 482 | |||
| 463 | for (i = 0; i < le16_to_cpu(eh->eh_entries); i++, ex++) { | 483 | for (i = 0; i < le16_to_cpu(eh->eh_entries); i++, ex++) { |
| 464 | ext_debug("%d:%d:%llu ", le32_to_cpu(ex->ee_block), | 484 | ext_debug("%d:[%d]%d:%llu ", le32_to_cpu(ex->ee_block), |
| 485 | ext4_ext_is_uninitialized(ex), | ||
| 465 | ext4_ext_get_actual_len(ex), ext_pblock(ex)); | 486 | ext4_ext_get_actual_len(ex), ext_pblock(ex)); |
| 466 | } | 487 | } |
| 467 | ext_debug("\n"); | 488 | ext_debug("\n"); |
| @@ -580,9 +601,10 @@ ext4_ext_binsearch(struct inode *inode, | |||
| 580 | } | 601 | } |
| 581 | 602 | ||
| 582 | path->p_ext = l - 1; | 603 | path->p_ext = l - 1; |
| 583 | ext_debug(" -> %d:%llu:%d ", | 604 | ext_debug(" -> %d:%llu:[%d]%d ", |
| 584 | le32_to_cpu(path->p_ext->ee_block), | 605 | le32_to_cpu(path->p_ext->ee_block), |
| 585 | ext_pblock(path->p_ext), | 606 | ext_pblock(path->p_ext), |
| 607 | ext4_ext_is_uninitialized(path->p_ext), | ||
| 586 | ext4_ext_get_actual_len(path->p_ext)); | 608 | ext4_ext_get_actual_len(path->p_ext)); |
| 587 | 609 | ||
| 588 | #ifdef CHECK_BINSEARCH | 610 | #ifdef CHECK_BINSEARCH |
| @@ -612,7 +634,7 @@ int ext4_ext_tree_init(handle_t *handle, struct inode *inode) | |||
| 612 | eh->eh_depth = 0; | 634 | eh->eh_depth = 0; |
| 613 | eh->eh_entries = 0; | 635 | eh->eh_entries = 0; |
| 614 | eh->eh_magic = EXT4_EXT_MAGIC; | 636 | eh->eh_magic = EXT4_EXT_MAGIC; |
| 615 | eh->eh_max = cpu_to_le16(ext4_ext_space_root(inode)); | 637 | eh->eh_max = cpu_to_le16(ext4_ext_space_root(inode, 0)); |
| 616 | ext4_mark_inode_dirty(handle, inode); | 638 | ext4_mark_inode_dirty(handle, inode); |
| 617 | ext4_ext_invalidate_cache(inode); | 639 | ext4_ext_invalidate_cache(inode); |
| 618 | return 0; | 640 | return 0; |
| @@ -837,7 +859,7 @@ static int ext4_ext_split(handle_t *handle, struct inode *inode, | |||
| 837 | 859 | ||
| 838 | neh = ext_block_hdr(bh); | 860 | neh = ext_block_hdr(bh); |
| 839 | neh->eh_entries = 0; | 861 | neh->eh_entries = 0; |
| 840 | neh->eh_max = cpu_to_le16(ext4_ext_space_block(inode)); | 862 | neh->eh_max = cpu_to_le16(ext4_ext_space_block(inode, 0)); |
| 841 | neh->eh_magic = EXT4_EXT_MAGIC; | 863 | neh->eh_magic = EXT4_EXT_MAGIC; |
| 842 | neh->eh_depth = 0; | 864 | neh->eh_depth = 0; |
| 843 | ex = EXT_FIRST_EXTENT(neh); | 865 | ex = EXT_FIRST_EXTENT(neh); |
| @@ -850,9 +872,10 @@ static int ext4_ext_split(handle_t *handle, struct inode *inode, | |||
| 850 | path[depth].p_ext++; | 872 | path[depth].p_ext++; |
| 851 | while (path[depth].p_ext <= | 873 | while (path[depth].p_ext <= |
| 852 | EXT_MAX_EXTENT(path[depth].p_hdr)) { | 874 | EXT_MAX_EXTENT(path[depth].p_hdr)) { |
| 853 | ext_debug("move %d:%llu:%d in new leaf %llu\n", | 875 | ext_debug("move %d:%llu:[%d]%d in new leaf %llu\n", |
| 854 | le32_to_cpu(path[depth].p_ext->ee_block), | 876 | le32_to_cpu(path[depth].p_ext->ee_block), |
| 855 | ext_pblock(path[depth].p_ext), | 877 | ext_pblock(path[depth].p_ext), |
| 878 | ext4_ext_is_uninitialized(path[depth].p_ext), | ||
| 856 | ext4_ext_get_actual_len(path[depth].p_ext), | 879 | ext4_ext_get_actual_len(path[depth].p_ext), |
| 857 | newblock); | 880 | newblock); |
| 858 | /*memmove(ex++, path[depth].p_ext++, | 881 | /*memmove(ex++, path[depth].p_ext++, |
| @@ -912,7 +935,7 @@ static int ext4_ext_split(handle_t *handle, struct inode *inode, | |||
| 912 | neh = ext_block_hdr(bh); | 935 | neh = ext_block_hdr(bh); |
| 913 | neh->eh_entries = cpu_to_le16(1); | 936 | neh->eh_entries = cpu_to_le16(1); |
| 914 | neh->eh_magic = EXT4_EXT_MAGIC; | 937 | neh->eh_magic = EXT4_EXT_MAGIC; |
| 915 | neh->eh_max = cpu_to_le16(ext4_ext_space_block_idx(inode)); | 938 | neh->eh_max = cpu_to_le16(ext4_ext_space_block_idx(inode, 0)); |
| 916 | neh->eh_depth = cpu_to_le16(depth - i); | 939 | neh->eh_depth = cpu_to_le16(depth - i); |
| 917 | fidx = EXT_FIRST_INDEX(neh); | 940 | fidx = EXT_FIRST_INDEX(neh); |
| 918 | fidx->ei_block = border; | 941 | fidx->ei_block = border; |
| @@ -1037,9 +1060,9 @@ static int ext4_ext_grow_indepth(handle_t *handle, struct inode *inode, | |||
| 1037 | /* old root could have indexes or leaves | 1060 | /* old root could have indexes or leaves |
| 1038 | * so calculate e_max right way */ | 1061 | * so calculate e_max right way */ |
| 1039 | if (ext_depth(inode)) | 1062 | if (ext_depth(inode)) |
| 1040 | neh->eh_max = cpu_to_le16(ext4_ext_space_block_idx(inode)); | 1063 | neh->eh_max = cpu_to_le16(ext4_ext_space_block_idx(inode, 0)); |
| 1041 | else | 1064 | else |
| 1042 | neh->eh_max = cpu_to_le16(ext4_ext_space_block(inode)); | 1065 | neh->eh_max = cpu_to_le16(ext4_ext_space_block(inode, 0)); |
| 1043 | neh->eh_magic = EXT4_EXT_MAGIC; | 1066 | neh->eh_magic = EXT4_EXT_MAGIC; |
| 1044 | set_buffer_uptodate(bh); | 1067 | set_buffer_uptodate(bh); |
| 1045 | unlock_buffer(bh); | 1068 | unlock_buffer(bh); |
| @@ -1054,7 +1077,7 @@ static int ext4_ext_grow_indepth(handle_t *handle, struct inode *inode, | |||
| 1054 | goto out; | 1077 | goto out; |
| 1055 | 1078 | ||
| 1056 | curp->p_hdr->eh_magic = EXT4_EXT_MAGIC; | 1079 | curp->p_hdr->eh_magic = EXT4_EXT_MAGIC; |
| 1057 | curp->p_hdr->eh_max = cpu_to_le16(ext4_ext_space_root_idx(inode)); | 1080 | curp->p_hdr->eh_max = cpu_to_le16(ext4_ext_space_root_idx(inode, 0)); |
| 1058 | curp->p_hdr->eh_entries = cpu_to_le16(1); | 1081 | curp->p_hdr->eh_entries = cpu_to_le16(1); |
| 1059 | curp->p_idx = EXT_FIRST_INDEX(curp->p_hdr); | 1082 | curp->p_idx = EXT_FIRST_INDEX(curp->p_hdr); |
| 1060 | 1083 | ||
| @@ -1580,9 +1603,11 @@ int ext4_ext_insert_extent(handle_t *handle, struct inode *inode, | |||
| 1580 | 1603 | ||
| 1581 | /* try to insert block into found extent and return */ | 1604 | /* try to insert block into found extent and return */ |
| 1582 | if (ex && ext4_can_extents_be_merged(inode, ex, newext)) { | 1605 | if (ex && ext4_can_extents_be_merged(inode, ex, newext)) { |
| 1583 | ext_debug("append %d block to %d:%d (from %llu)\n", | 1606 | ext_debug("append [%d]%d block to %d:[%d]%d (from %llu)\n", |
| 1607 | ext4_ext_is_uninitialized(newext), | ||
| 1584 | ext4_ext_get_actual_len(newext), | 1608 | ext4_ext_get_actual_len(newext), |
| 1585 | le32_to_cpu(ex->ee_block), | 1609 | le32_to_cpu(ex->ee_block), |
| 1610 | ext4_ext_is_uninitialized(ex), | ||
| 1586 | ext4_ext_get_actual_len(ex), ext_pblock(ex)); | 1611 | ext4_ext_get_actual_len(ex), ext_pblock(ex)); |
| 1587 | err = ext4_ext_get_access(handle, inode, path + depth); | 1612 | err = ext4_ext_get_access(handle, inode, path + depth); |
| 1588 | if (err) | 1613 | if (err) |
| @@ -1651,9 +1676,10 @@ has_space: | |||
| 1651 | 1676 | ||
| 1652 | if (!nearex) { | 1677 | if (!nearex) { |
| 1653 | /* there is no extent in this leaf, create first one */ | 1678 | /* there is no extent in this leaf, create first one */ |
| 1654 | ext_debug("first extent in the leaf: %d:%llu:%d\n", | 1679 | ext_debug("first extent in the leaf: %d:%llu:[%d]%d\n", |
| 1655 | le32_to_cpu(newext->ee_block), | 1680 | le32_to_cpu(newext->ee_block), |
| 1656 | ext_pblock(newext), | 1681 | ext_pblock(newext), |
| 1682 | ext4_ext_is_uninitialized(newext), | ||
| 1657 | ext4_ext_get_actual_len(newext)); | 1683 | ext4_ext_get_actual_len(newext)); |
| 1658 | path[depth].p_ext = EXT_FIRST_EXTENT(eh); | 1684 | path[depth].p_ext = EXT_FIRST_EXTENT(eh); |
| 1659 | } else if (le32_to_cpu(newext->ee_block) | 1685 | } else if (le32_to_cpu(newext->ee_block) |
| @@ -1663,10 +1689,11 @@ has_space: | |||
| 1663 | len = EXT_MAX_EXTENT(eh) - nearex; | 1689 | len = EXT_MAX_EXTENT(eh) - nearex; |
| 1664 | len = (len - 1) * sizeof(struct ext4_extent); | 1690 | len = (len - 1) * sizeof(struct ext4_extent); |
| 1665 | len = len < 0 ? 0 : len; | 1691 | len = len < 0 ? 0 : len; |
| 1666 | ext_debug("insert %d:%llu:%d after: nearest 0x%p, " | 1692 | ext_debug("insert %d:%llu:[%d]%d after: nearest 0x%p, " |
| 1667 | "move %d from 0x%p to 0x%p\n", | 1693 | "move %d from 0x%p to 0x%p\n", |
| 1668 | le32_to_cpu(newext->ee_block), | 1694 | le32_to_cpu(newext->ee_block), |
| 1669 | ext_pblock(newext), | 1695 | ext_pblock(newext), |
| 1696 | ext4_ext_is_uninitialized(newext), | ||
| 1670 | ext4_ext_get_actual_len(newext), | 1697 | ext4_ext_get_actual_len(newext), |
| 1671 | nearex, len, nearex + 1, nearex + 2); | 1698 | nearex, len, nearex + 1, nearex + 2); |
| 1672 | memmove(nearex + 2, nearex + 1, len); | 1699 | memmove(nearex + 2, nearex + 1, len); |
| @@ -1676,10 +1703,11 @@ has_space: | |||
| 1676 | BUG_ON(newext->ee_block == nearex->ee_block); | 1703 | BUG_ON(newext->ee_block == nearex->ee_block); |
| 1677 | len = (EXT_MAX_EXTENT(eh) - nearex) * sizeof(struct ext4_extent); | 1704 | len = (EXT_MAX_EXTENT(eh) - nearex) * sizeof(struct ext4_extent); |
| 1678 | len = len < 0 ? 0 : len; | 1705 | len = len < 0 ? 0 : len; |
| 1679 | ext_debug("insert %d:%llu:%d before: nearest 0x%p, " | 1706 | ext_debug("insert %d:%llu:[%d]%d before: nearest 0x%p, " |
| 1680 | "move %d from 0x%p to 0x%p\n", | 1707 | "move %d from 0x%p to 0x%p\n", |
| 1681 | le32_to_cpu(newext->ee_block), | 1708 | le32_to_cpu(newext->ee_block), |
| 1682 | ext_pblock(newext), | 1709 | ext_pblock(newext), |
| 1710 | ext4_ext_is_uninitialized(newext), | ||
| 1683 | ext4_ext_get_actual_len(newext), | 1711 | ext4_ext_get_actual_len(newext), |
| 1684 | nearex, len, nearex + 1, nearex + 2); | 1712 | nearex, len, nearex + 1, nearex + 2); |
| 1685 | memmove(nearex + 1, nearex, len); | 1713 | memmove(nearex + 1, nearex, len); |
| @@ -2094,7 +2122,8 @@ ext4_ext_rm_leaf(handle_t *handle, struct inode *inode, | |||
| 2094 | else | 2122 | else |
| 2095 | uninitialized = 0; | 2123 | uninitialized = 0; |
| 2096 | 2124 | ||
| 2097 | ext_debug("remove ext %lu:%u\n", ex_ee_block, ex_ee_len); | 2125 | ext_debug("remove ext %u:[%d]%d\n", ex_ee_block, |
| 2126 | uninitialized, ex_ee_len); | ||
| 2098 | path[depth].p_ext = ex; | 2127 | path[depth].p_ext = ex; |
| 2099 | 2128 | ||
| 2100 | a = ex_ee_block > start ? ex_ee_block : start; | 2129 | a = ex_ee_block > start ? ex_ee_block : start; |
| @@ -2138,7 +2167,7 @@ ext4_ext_rm_leaf(handle_t *handle, struct inode *inode, | |||
| 2138 | } | 2167 | } |
| 2139 | credits += 2 * EXT4_QUOTA_TRANS_BLOCKS(inode->i_sb); | 2168 | credits += 2 * EXT4_QUOTA_TRANS_BLOCKS(inode->i_sb); |
| 2140 | 2169 | ||
| 2141 | err = ext4_ext_journal_restart(handle, credits); | 2170 | err = ext4_ext_truncate_extend_restart(handle, inode, credits); |
| 2142 | if (err) | 2171 | if (err) |
| 2143 | goto out; | 2172 | goto out; |
| 2144 | 2173 | ||
| @@ -2327,7 +2356,7 @@ static int ext4_ext_remove_space(struct inode *inode, ext4_lblk_t start) | |||
| 2327 | if (err == 0) { | 2356 | if (err == 0) { |
| 2328 | ext_inode_hdr(inode)->eh_depth = 0; | 2357 | ext_inode_hdr(inode)->eh_depth = 0; |
| 2329 | ext_inode_hdr(inode)->eh_max = | 2358 | ext_inode_hdr(inode)->eh_max = |
| 2330 | cpu_to_le16(ext4_ext_space_root(inode)); | 2359 | cpu_to_le16(ext4_ext_space_root(inode, 0)); |
| 2331 | err = ext4_ext_dirty(handle, inode, path); | 2360 | err = ext4_ext_dirty(handle, inode, path); |
| 2332 | } | 2361 | } |
| 2333 | } | 2362 | } |
| @@ -2743,6 +2772,7 @@ insert: | |||
| 2743 | } else if (err) | 2772 | } else if (err) |
| 2744 | goto fix_extent_len; | 2773 | goto fix_extent_len; |
| 2745 | out: | 2774 | out: |
| 2775 | ext4_ext_show_leaf(inode, path); | ||
| 2746 | return err ? err : allocated; | 2776 | return err ? err : allocated; |
| 2747 | 2777 | ||
| 2748 | fix_extent_len: | 2778 | fix_extent_len: |
| @@ -2786,7 +2816,7 @@ int ext4_ext_get_blocks(handle_t *handle, struct inode *inode, | |||
| 2786 | struct ext4_allocation_request ar; | 2816 | struct ext4_allocation_request ar; |
| 2787 | 2817 | ||
| 2788 | __clear_bit(BH_New, &bh_result->b_state); | 2818 | __clear_bit(BH_New, &bh_result->b_state); |
| 2789 | ext_debug("blocks %u/%u requested for inode %u\n", | 2819 | ext_debug("blocks %u/%u requested for inode %lu\n", |
| 2790 | iblock, max_blocks, inode->i_ino); | 2820 | iblock, max_blocks, inode->i_ino); |
| 2791 | 2821 | ||
| 2792 | /* check in cache */ | 2822 | /* check in cache */ |
| @@ -2849,7 +2879,7 @@ int ext4_ext_get_blocks(handle_t *handle, struct inode *inode, | |||
| 2849 | newblock = iblock - ee_block + ee_start; | 2879 | newblock = iblock - ee_block + ee_start; |
| 2850 | /* number of remaining blocks in the extent */ | 2880 | /* number of remaining blocks in the extent */ |
| 2851 | allocated = ee_len - (iblock - ee_block); | 2881 | allocated = ee_len - (iblock - ee_block); |
| 2852 | ext_debug("%u fit into %lu:%d -> %llu\n", iblock, | 2882 | ext_debug("%u fit into %u:%d -> %llu\n", iblock, |
| 2853 | ee_block, ee_len, newblock); | 2883 | ee_block, ee_len, newblock); |
| 2854 | 2884 | ||
| 2855 | /* Do not put uninitialized extent in the cache */ | 2885 | /* Do not put uninitialized extent in the cache */ |
| @@ -2950,7 +2980,7 @@ int ext4_ext_get_blocks(handle_t *handle, struct inode *inode, | |||
| 2950 | newblock = ext4_mb_new_blocks(handle, &ar, &err); | 2980 | newblock = ext4_mb_new_blocks(handle, &ar, &err); |
| 2951 | if (!newblock) | 2981 | if (!newblock) |
| 2952 | goto out2; | 2982 | goto out2; |
| 2953 | ext_debug("allocate new block: goal %llu, found %llu/%lu\n", | 2983 | ext_debug("allocate new block: goal %llu, found %llu/%u\n", |
| 2954 | ar.goal, newblock, allocated); | 2984 | ar.goal, newblock, allocated); |
| 2955 | 2985 | ||
| 2956 | /* try to insert new extent into found leaf and return */ | 2986 | /* try to insert new extent into found leaf and return */ |
diff --git a/fs/ext4/fsync.c b/fs/ext4/fsync.c index 83cf6415f599..07475740b512 100644 --- a/fs/ext4/fsync.c +++ b/fs/ext4/fsync.c | |||
| @@ -50,7 +50,7 @@ int ext4_sync_file(struct file *file, struct dentry *dentry, int datasync) | |||
| 50 | { | 50 | { |
| 51 | struct inode *inode = dentry->d_inode; | 51 | struct inode *inode = dentry->d_inode; |
| 52 | journal_t *journal = EXT4_SB(inode->i_sb)->s_journal; | 52 | journal_t *journal = EXT4_SB(inode->i_sb)->s_journal; |
| 53 | int ret = 0; | 53 | int err, ret = 0; |
| 54 | 54 | ||
| 55 | J_ASSERT(ext4_journal_current_handle() == NULL); | 55 | J_ASSERT(ext4_journal_current_handle() == NULL); |
| 56 | 56 | ||
| @@ -79,6 +79,9 @@ int ext4_sync_file(struct file *file, struct dentry *dentry, int datasync) | |||
| 79 | goto out; | 79 | goto out; |
| 80 | } | 80 | } |
| 81 | 81 | ||
| 82 | if (!journal) | ||
| 83 | ret = sync_mapping_buffers(inode->i_mapping); | ||
| 84 | |||
| 82 | if (datasync && !(inode->i_state & I_DIRTY_DATASYNC)) | 85 | if (datasync && !(inode->i_state & I_DIRTY_DATASYNC)) |
| 83 | goto out; | 86 | goto out; |
| 84 | 87 | ||
| @@ -91,10 +94,12 @@ int ext4_sync_file(struct file *file, struct dentry *dentry, int datasync) | |||
| 91 | .sync_mode = WB_SYNC_ALL, | 94 | .sync_mode = WB_SYNC_ALL, |
| 92 | .nr_to_write = 0, /* sys_fsync did this */ | 95 | .nr_to_write = 0, /* sys_fsync did this */ |
| 93 | }; | 96 | }; |
| 94 | ret = sync_inode(inode, &wbc); | 97 | err = sync_inode(inode, &wbc); |
| 95 | if (journal && (journal->j_flags & JBD2_BARRIER)) | 98 | if (ret == 0) |
| 96 | blkdev_issue_flush(inode->i_sb->s_bdev, NULL); | 99 | ret = err; |
| 97 | } | 100 | } |
| 98 | out: | 101 | out: |
| 102 | if (journal && (journal->j_flags & JBD2_BARRIER)) | ||
| 103 | blkdev_issue_flush(inode->i_sb->s_bdev, NULL); | ||
| 99 | return ret; | 104 | return ret; |
| 100 | } | 105 | } |
diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c index 29e6dc7299b8..f3624ead4f6c 100644 --- a/fs/ext4/ialloc.c +++ b/fs/ext4/ialloc.c | |||
| @@ -1189,7 +1189,7 @@ unsigned long ext4_count_free_inodes(struct super_block *sb) | |||
| 1189 | 1189 | ||
| 1190 | x = ext4_count_free(bitmap_bh, EXT4_INODES_PER_GROUP(sb) / 8); | 1190 | x = ext4_count_free(bitmap_bh, EXT4_INODES_PER_GROUP(sb) / 8); |
| 1191 | printk(KERN_DEBUG "group %lu: stored = %d, counted = %lu\n", | 1191 | printk(KERN_DEBUG "group %lu: stored = %d, counted = %lu\n", |
| 1192 | i, ext4_free_inodes_count(sb, gdp), x); | 1192 | (unsigned long) i, ext4_free_inodes_count(sb, gdp), x); |
| 1193 | bitmap_count += x; | 1193 | bitmap_count += x; |
| 1194 | } | 1194 | } |
| 1195 | brelse(bitmap_bh); | 1195 | brelse(bitmap_bh); |
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c index f9c642b22efa..4abd683b963d 100644 --- a/fs/ext4/inode.c +++ b/fs/ext4/inode.c | |||
| @@ -192,11 +192,24 @@ static int try_to_extend_transaction(handle_t *handle, struct inode *inode) | |||
| 192 | * so before we call here everything must be consistently dirtied against | 192 | * so before we call here everything must be consistently dirtied against |
| 193 | * this transaction. | 193 | * this transaction. |
| 194 | */ | 194 | */ |
| 195 | static int ext4_journal_test_restart(handle_t *handle, struct inode *inode) | 195 | int ext4_truncate_restart_trans(handle_t *handle, struct inode *inode, |
| 196 | int nblocks) | ||
| 196 | { | 197 | { |
| 198 | int ret; | ||
| 199 | |||
| 200 | /* | ||
| 201 | * Drop i_data_sem to avoid deadlock with ext4_get_blocks At this | ||
| 202 | * moment, get_block can be called only for blocks inside i_size since | ||
| 203 | * page cache has been already dropped and writes are blocked by | ||
| 204 | * i_mutex. So we can safely drop the i_data_sem here. | ||
| 205 | */ | ||
| 197 | BUG_ON(EXT4_JOURNAL(inode) == NULL); | 206 | BUG_ON(EXT4_JOURNAL(inode) == NULL); |
| 198 | jbd_debug(2, "restarting handle %p\n", handle); | 207 | jbd_debug(2, "restarting handle %p\n", handle); |
| 199 | return ext4_journal_restart(handle, blocks_for_truncate(inode)); | 208 | up_write(&EXT4_I(inode)->i_data_sem); |
| 209 | ret = ext4_journal_restart(handle, blocks_for_truncate(inode)); | ||
| 210 | down_write(&EXT4_I(inode)->i_data_sem); | ||
| 211 | |||
| 212 | return ret; | ||
| 200 | } | 213 | } |
| 201 | 214 | ||
| 202 | /* | 215 | /* |
| @@ -341,9 +354,7 @@ static int ext4_block_to_path(struct inode *inode, | |||
| 341 | int n = 0; | 354 | int n = 0; |
| 342 | int final = 0; | 355 | int final = 0; |
| 343 | 356 | ||
| 344 | if (i_block < 0) { | 357 | if (i_block < direct_blocks) { |
| 345 | ext4_warning(inode->i_sb, "ext4_block_to_path", "block < 0"); | ||
| 346 | } else if (i_block < direct_blocks) { | ||
| 347 | offsets[n++] = i_block; | 358 | offsets[n++] = i_block; |
| 348 | final = direct_blocks; | 359 | final = direct_blocks; |
| 349 | } else if ((i_block -= direct_blocks) < indirect_blocks) { | 360 | } else if ((i_block -= direct_blocks) < indirect_blocks) { |
| @@ -551,15 +562,21 @@ static ext4_fsblk_t ext4_find_near(struct inode *inode, Indirect *ind) | |||
| 551 | * | 562 | * |
| 552 | * Normally this function find the preferred place for block allocation, | 563 | * Normally this function find the preferred place for block allocation, |
| 553 | * returns it. | 564 | * returns it. |
| 565 | * Because this is only used for non-extent files, we limit the block nr | ||
| 566 | * to 32 bits. | ||
| 554 | */ | 567 | */ |
| 555 | static ext4_fsblk_t ext4_find_goal(struct inode *inode, ext4_lblk_t block, | 568 | static ext4_fsblk_t ext4_find_goal(struct inode *inode, ext4_lblk_t block, |
| 556 | Indirect *partial) | 569 | Indirect *partial) |
| 557 | { | 570 | { |
| 571 | ext4_fsblk_t goal; | ||
| 572 | |||
| 558 | /* | 573 | /* |
| 559 | * XXX need to get goal block from mballoc's data structures | 574 | * XXX need to get goal block from mballoc's data structures |
| 560 | */ | 575 | */ |
| 561 | 576 | ||
| 562 | return ext4_find_near(inode, partial); | 577 | goal = ext4_find_near(inode, partial); |
| 578 | goal = goal & EXT4_MAX_BLOCK_FILE_PHYS; | ||
| 579 | return goal; | ||
| 563 | } | 580 | } |
| 564 | 581 | ||
| 565 | /** | 582 | /** |
| @@ -640,6 +657,8 @@ static int ext4_alloc_blocks(handle_t *handle, struct inode *inode, | |||
| 640 | if (*err) | 657 | if (*err) |
| 641 | goto failed_out; | 658 | goto failed_out; |
| 642 | 659 | ||
| 660 | BUG_ON(current_block + count > EXT4_MAX_BLOCK_FILE_PHYS); | ||
| 661 | |||
| 643 | target -= count; | 662 | target -= count; |
| 644 | /* allocate blocks for indirect blocks */ | 663 | /* allocate blocks for indirect blocks */ |
| 645 | while (index < indirect_blks && count) { | 664 | while (index < indirect_blks && count) { |
| @@ -674,6 +693,7 @@ static int ext4_alloc_blocks(handle_t *handle, struct inode *inode, | |||
| 674 | ar.flags = EXT4_MB_HINT_DATA; | 693 | ar.flags = EXT4_MB_HINT_DATA; |
| 675 | 694 | ||
| 676 | current_block = ext4_mb_new_blocks(handle, &ar, err); | 695 | current_block = ext4_mb_new_blocks(handle, &ar, err); |
| 696 | BUG_ON(current_block + ar.len > EXT4_MAX_BLOCK_FILE_PHYS); | ||
| 677 | 697 | ||
| 678 | if (*err && (target == blks)) { | 698 | if (*err && (target == blks)) { |
| 679 | /* | 699 | /* |
| @@ -762,8 +782,9 @@ static int ext4_alloc_branch(handle_t *handle, struct inode *inode, | |||
| 762 | BUFFER_TRACE(bh, "call get_create_access"); | 782 | BUFFER_TRACE(bh, "call get_create_access"); |
| 763 | err = ext4_journal_get_create_access(handle, bh); | 783 | err = ext4_journal_get_create_access(handle, bh); |
| 764 | if (err) { | 784 | if (err) { |
| 785 | /* Don't brelse(bh) here; it's done in | ||
| 786 | * ext4_journal_forget() below */ | ||
| 765 | unlock_buffer(bh); | 787 | unlock_buffer(bh); |
| 766 | brelse(bh); | ||
| 767 | goto failed; | 788 | goto failed; |
| 768 | } | 789 | } |
| 769 | 790 | ||
| @@ -1109,16 +1130,15 @@ static void ext4_da_update_reserve_space(struct inode *inode, int used) | |||
| 1109 | ext4_discard_preallocations(inode); | 1130 | ext4_discard_preallocations(inode); |
| 1110 | } | 1131 | } |
| 1111 | 1132 | ||
| 1112 | static int check_block_validity(struct inode *inode, sector_t logical, | 1133 | static int check_block_validity(struct inode *inode, const char *msg, |
| 1113 | sector_t phys, int len) | 1134 | sector_t logical, sector_t phys, int len) |
| 1114 | { | 1135 | { |
| 1115 | if (!ext4_data_block_valid(EXT4_SB(inode->i_sb), phys, len)) { | 1136 | if (!ext4_data_block_valid(EXT4_SB(inode->i_sb), phys, len)) { |
| 1116 | ext4_error(inode->i_sb, "check_block_validity", | 1137 | ext4_error(inode->i_sb, msg, |
| 1117 | "inode #%lu logical block %llu mapped to %llu " | 1138 | "inode #%lu logical block %llu mapped to %llu " |
| 1118 | "(size %d)", inode->i_ino, | 1139 | "(size %d)", inode->i_ino, |
| 1119 | (unsigned long long) logical, | 1140 | (unsigned long long) logical, |
| 1120 | (unsigned long long) phys, len); | 1141 | (unsigned long long) phys, len); |
| 1121 | WARN_ON(1); | ||
| 1122 | return -EIO; | 1142 | return -EIO; |
| 1123 | } | 1143 | } |
| 1124 | return 0; | 1144 | return 0; |
| @@ -1170,8 +1190,8 @@ int ext4_get_blocks(handle_t *handle, struct inode *inode, sector_t block, | |||
| 1170 | up_read((&EXT4_I(inode)->i_data_sem)); | 1190 | up_read((&EXT4_I(inode)->i_data_sem)); |
| 1171 | 1191 | ||
| 1172 | if (retval > 0 && buffer_mapped(bh)) { | 1192 | if (retval > 0 && buffer_mapped(bh)) { |
| 1173 | int ret = check_block_validity(inode, block, | 1193 | int ret = check_block_validity(inode, "file system corruption", |
| 1174 | bh->b_blocknr, retval); | 1194 | block, bh->b_blocknr, retval); |
| 1175 | if (ret != 0) | 1195 | if (ret != 0) |
| 1176 | return ret; | 1196 | return ret; |
| 1177 | } | 1197 | } |
| @@ -1235,8 +1255,7 @@ int ext4_get_blocks(handle_t *handle, struct inode *inode, sector_t block, | |||
| 1235 | * i_data's format changing. Force the migrate | 1255 | * i_data's format changing. Force the migrate |
| 1236 | * to fail by clearing migrate flags | 1256 | * to fail by clearing migrate flags |
| 1237 | */ | 1257 | */ |
| 1238 | EXT4_I(inode)->i_flags = EXT4_I(inode)->i_flags & | 1258 | EXT4_I(inode)->i_state &= ~EXT4_STATE_EXT_MIGRATE; |
| 1239 | ~EXT4_EXT_MIGRATE; | ||
| 1240 | } | 1259 | } |
| 1241 | } | 1260 | } |
| 1242 | 1261 | ||
| @@ -1252,8 +1271,9 @@ int ext4_get_blocks(handle_t *handle, struct inode *inode, sector_t block, | |||
| 1252 | 1271 | ||
| 1253 | up_write((&EXT4_I(inode)->i_data_sem)); | 1272 | up_write((&EXT4_I(inode)->i_data_sem)); |
| 1254 | if (retval > 0 && buffer_mapped(bh)) { | 1273 | if (retval > 0 && buffer_mapped(bh)) { |
| 1255 | int ret = check_block_validity(inode, block, | 1274 | int ret = check_block_validity(inode, "file system " |
| 1256 | bh->b_blocknr, retval); | 1275 | "corruption after allocation", |
| 1276 | block, bh->b_blocknr, retval); | ||
| 1257 | if (ret != 0) | 1277 | if (ret != 0) |
| 1258 | return ret; | 1278 | return ret; |
| 1259 | } | 1279 | } |
| @@ -1863,18 +1883,6 @@ static void ext4_da_page_release_reservation(struct page *page, | |||
| 1863 | * Delayed allocation stuff | 1883 | * Delayed allocation stuff |
| 1864 | */ | 1884 | */ |
| 1865 | 1885 | ||
| 1866 | struct mpage_da_data { | ||
| 1867 | struct inode *inode; | ||
| 1868 | sector_t b_blocknr; /* start block number of extent */ | ||
| 1869 | size_t b_size; /* size of extent */ | ||
| 1870 | unsigned long b_state; /* state of the extent */ | ||
| 1871 | unsigned long first_page, next_page; /* extent of pages */ | ||
| 1872 | struct writeback_control *wbc; | ||
| 1873 | int io_done; | ||
| 1874 | int pages_written; | ||
| 1875 | int retval; | ||
| 1876 | }; | ||
| 1877 | |||
| 1878 | /* | 1886 | /* |
| 1879 | * mpage_da_submit_io - walks through extent of pages and try to write | 1887 | * mpage_da_submit_io - walks through extent of pages and try to write |
| 1880 | * them with writepage() call back | 1888 | * them with writepage() call back |
| @@ -2737,6 +2745,7 @@ static int ext4_da_writepages(struct address_space *mapping, | |||
| 2737 | long pages_skipped; | 2745 | long pages_skipped; |
| 2738 | int range_cyclic, cycled = 1, io_done = 0; | 2746 | int range_cyclic, cycled = 1, io_done = 0; |
| 2739 | int needed_blocks, ret = 0, nr_to_writebump = 0; | 2747 | int needed_blocks, ret = 0, nr_to_writebump = 0; |
| 2748 | loff_t range_start = wbc->range_start; | ||
| 2740 | struct ext4_sb_info *sbi = EXT4_SB(mapping->host->i_sb); | 2749 | struct ext4_sb_info *sbi = EXT4_SB(mapping->host->i_sb); |
| 2741 | 2750 | ||
| 2742 | trace_ext4_da_writepages(inode, wbc); | 2751 | trace_ext4_da_writepages(inode, wbc); |
| @@ -2850,6 +2859,7 @@ retry: | |||
| 2850 | mpd.io_done = 1; | 2859 | mpd.io_done = 1; |
| 2851 | ret = MPAGE_DA_EXTENT_TAIL; | 2860 | ret = MPAGE_DA_EXTENT_TAIL; |
| 2852 | } | 2861 | } |
| 2862 | trace_ext4_da_write_pages(inode, &mpd); | ||
| 2853 | wbc->nr_to_write -= mpd.pages_written; | 2863 | wbc->nr_to_write -= mpd.pages_written; |
| 2854 | 2864 | ||
| 2855 | ext4_journal_stop(handle); | 2865 | ext4_journal_stop(handle); |
| @@ -2905,6 +2915,7 @@ out_writepages: | |||
| 2905 | if (!no_nrwrite_index_update) | 2915 | if (!no_nrwrite_index_update) |
| 2906 | wbc->no_nrwrite_index_update = 0; | 2916 | wbc->no_nrwrite_index_update = 0; |
| 2907 | wbc->nr_to_write -= nr_to_writebump; | 2917 | wbc->nr_to_write -= nr_to_writebump; |
| 2918 | wbc->range_start = range_start; | ||
| 2908 | trace_ext4_da_writepages_result(inode, wbc, ret, pages_written); | 2919 | trace_ext4_da_writepages_result(inode, wbc, ret, pages_written); |
| 2909 | return ret; | 2920 | return ret; |
| 2910 | } | 2921 | } |
| @@ -3117,6 +3128,8 @@ out: | |||
| 3117 | */ | 3128 | */ |
| 3118 | int ext4_alloc_da_blocks(struct inode *inode) | 3129 | int ext4_alloc_da_blocks(struct inode *inode) |
| 3119 | { | 3130 | { |
| 3131 | trace_ext4_alloc_da_blocks(inode); | ||
| 3132 | |||
| 3120 | if (!EXT4_I(inode)->i_reserved_data_blocks && | 3133 | if (!EXT4_I(inode)->i_reserved_data_blocks && |
| 3121 | !EXT4_I(inode)->i_reserved_meta_blocks) | 3134 | !EXT4_I(inode)->i_reserved_meta_blocks) |
| 3122 | return 0; | 3135 | return 0; |
| @@ -3659,7 +3672,8 @@ static void ext4_clear_blocks(handle_t *handle, struct inode *inode, | |||
| 3659 | ext4_handle_dirty_metadata(handle, inode, bh); | 3672 | ext4_handle_dirty_metadata(handle, inode, bh); |
| 3660 | } | 3673 | } |
| 3661 | ext4_mark_inode_dirty(handle, inode); | 3674 | ext4_mark_inode_dirty(handle, inode); |
| 3662 | ext4_journal_test_restart(handle, inode); | 3675 | ext4_truncate_restart_trans(handle, inode, |
| 3676 | blocks_for_truncate(inode)); | ||
| 3663 | if (bh) { | 3677 | if (bh) { |
| 3664 | BUFFER_TRACE(bh, "retaking write access"); | 3678 | BUFFER_TRACE(bh, "retaking write access"); |
| 3665 | ext4_journal_get_write_access(handle, bh); | 3679 | ext4_journal_get_write_access(handle, bh); |
| @@ -3870,7 +3884,8 @@ static void ext4_free_branches(handle_t *handle, struct inode *inode, | |||
| 3870 | return; | 3884 | return; |
| 3871 | if (try_to_extend_transaction(handle, inode)) { | 3885 | if (try_to_extend_transaction(handle, inode)) { |
| 3872 | ext4_mark_inode_dirty(handle, inode); | 3886 | ext4_mark_inode_dirty(handle, inode); |
| 3873 | ext4_journal_test_restart(handle, inode); | 3887 | ext4_truncate_restart_trans(handle, inode, |
| 3888 | blocks_for_truncate(inode)); | ||
| 3874 | } | 3889 | } |
| 3875 | 3890 | ||
| 3876 | ext4_free_blocks(handle, inode, nr, 1, 1); | 3891 | ext4_free_blocks(handle, inode, nr, 1, 1); |
| @@ -3958,8 +3973,7 @@ void ext4_truncate(struct inode *inode) | |||
| 3958 | if (!ext4_can_truncate(inode)) | 3973 | if (!ext4_can_truncate(inode)) |
| 3959 | return; | 3974 | return; |
| 3960 | 3975 | ||
| 3961 | if (ei->i_disksize && inode->i_size == 0 && | 3976 | if (inode->i_size == 0 && !test_opt(inode->i_sb, NO_AUTO_DA_ALLOC)) |
| 3962 | !test_opt(inode->i_sb, NO_AUTO_DA_ALLOC)) | ||
| 3963 | ei->i_state |= EXT4_STATE_DA_ALLOC_CLOSE; | 3977 | ei->i_state |= EXT4_STATE_DA_ALLOC_CLOSE; |
| 3964 | 3978 | ||
| 3965 | if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) { | 3979 | if (EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL) { |
| @@ -4533,7 +4547,8 @@ static int ext4_inode_blocks_set(handle_t *handle, | |||
| 4533 | */ | 4547 | */ |
| 4534 | static int ext4_do_update_inode(handle_t *handle, | 4548 | static int ext4_do_update_inode(handle_t *handle, |
| 4535 | struct inode *inode, | 4549 | struct inode *inode, |
| 4536 | struct ext4_iloc *iloc) | 4550 | struct ext4_iloc *iloc, |
| 4551 | int do_sync) | ||
| 4537 | { | 4552 | { |
| 4538 | struct ext4_inode *raw_inode = ext4_raw_inode(iloc); | 4553 | struct ext4_inode *raw_inode = ext4_raw_inode(iloc); |
| 4539 | struct ext4_inode_info *ei = EXT4_I(inode); | 4554 | struct ext4_inode_info *ei = EXT4_I(inode); |
| @@ -4581,8 +4596,7 @@ static int ext4_do_update_inode(handle_t *handle, | |||
| 4581 | if (ext4_inode_blocks_set(handle, raw_inode, ei)) | 4596 | if (ext4_inode_blocks_set(handle, raw_inode, ei)) |
| 4582 | goto out_brelse; | 4597 | goto out_brelse; |
| 4583 | raw_inode->i_dtime = cpu_to_le32(ei->i_dtime); | 4598 | raw_inode->i_dtime = cpu_to_le32(ei->i_dtime); |
| 4584 | /* clear the migrate flag in the raw_inode */ | 4599 | raw_inode->i_flags = cpu_to_le32(ei->i_flags); |
| 4585 | raw_inode->i_flags = cpu_to_le32(ei->i_flags & ~EXT4_EXT_MIGRATE); | ||
| 4586 | if (EXT4_SB(inode->i_sb)->s_es->s_creator_os != | 4600 | if (EXT4_SB(inode->i_sb)->s_es->s_creator_os != |
| 4587 | cpu_to_le32(EXT4_OS_HURD)) | 4601 | cpu_to_le32(EXT4_OS_HURD)) |
| 4588 | raw_inode->i_file_acl_high = | 4602 | raw_inode->i_file_acl_high = |
| @@ -4635,10 +4649,22 @@ static int ext4_do_update_inode(handle_t *handle, | |||
| 4635 | raw_inode->i_extra_isize = cpu_to_le16(ei->i_extra_isize); | 4649 | raw_inode->i_extra_isize = cpu_to_le16(ei->i_extra_isize); |
| 4636 | } | 4650 | } |
| 4637 | 4651 | ||
| 4638 | BUFFER_TRACE(bh, "call ext4_handle_dirty_metadata"); | 4652 | /* |
| 4639 | rc = ext4_handle_dirty_metadata(handle, inode, bh); | 4653 | * If we're not using a journal and we were called from |
| 4640 | if (!err) | 4654 | * ext4_write_inode() to sync the inode (making do_sync true), |
| 4641 | err = rc; | 4655 | * we can just use sync_dirty_buffer() directly to do our dirty |
| 4656 | * work. Testing s_journal here is a bit redundant but it's | ||
| 4657 | * worth it to avoid potential future trouble. | ||
| 4658 | */ | ||
| 4659 | if (EXT4_SB(inode->i_sb)->s_journal == NULL && do_sync) { | ||
| 4660 | BUFFER_TRACE(bh, "call sync_dirty_buffer"); | ||
| 4661 | sync_dirty_buffer(bh); | ||
| 4662 | } else { | ||
| 4663 | BUFFER_TRACE(bh, "call ext4_handle_dirty_metadata"); | ||
| 4664 | rc = ext4_handle_dirty_metadata(handle, inode, bh); | ||
| 4665 | if (!err) | ||
| 4666 | err = rc; | ||
| 4667 | } | ||
| 4642 | ei->i_state &= ~EXT4_STATE_NEW; | 4668 | ei->i_state &= ~EXT4_STATE_NEW; |
| 4643 | 4669 | ||
| 4644 | out_brelse: | 4670 | out_brelse: |
| @@ -4684,19 +4710,32 @@ out_brelse: | |||
| 4684 | */ | 4710 | */ |
| 4685 | int ext4_write_inode(struct inode *inode, int wait) | 4711 | int ext4_write_inode(struct inode *inode, int wait) |
| 4686 | { | 4712 | { |
| 4713 | int err; | ||
| 4714 | |||
| 4687 | if (current->flags & PF_MEMALLOC) | 4715 | if (current->flags & PF_MEMALLOC) |
| 4688 | return 0; | 4716 | return 0; |
| 4689 | 4717 | ||
| 4690 | if (ext4_journal_current_handle()) { | 4718 | if (EXT4_SB(inode->i_sb)->s_journal) { |
| 4691 | jbd_debug(1, "called recursively, non-PF_MEMALLOC!\n"); | 4719 | if (ext4_journal_current_handle()) { |
| 4692 | dump_stack(); | 4720 | jbd_debug(1, "called recursively, non-PF_MEMALLOC!\n"); |
| 4693 | return -EIO; | 4721 | dump_stack(); |
| 4694 | } | 4722 | return -EIO; |
| 4723 | } | ||
| 4695 | 4724 | ||
| 4696 | if (!wait) | 4725 | if (!wait) |
| 4697 | return 0; | 4726 | return 0; |
| 4727 | |||
| 4728 | err = ext4_force_commit(inode->i_sb); | ||
| 4729 | } else { | ||
| 4730 | struct ext4_iloc iloc; | ||
| 4698 | 4731 | ||
| 4699 | return ext4_force_commit(inode->i_sb); | 4732 | err = ext4_get_inode_loc(inode, &iloc); |
| 4733 | if (err) | ||
| 4734 | return err; | ||
| 4735 | err = ext4_do_update_inode(EXT4_NOJOURNAL_HANDLE, | ||
| 4736 | inode, &iloc, wait); | ||
| 4737 | } | ||
| 4738 | return err; | ||
| 4700 | } | 4739 | } |
| 4701 | 4740 | ||
| 4702 | /* | 4741 | /* |
| @@ -4990,7 +5029,7 @@ int ext4_mark_iloc_dirty(handle_t *handle, | |||
| 4990 | get_bh(iloc->bh); | 5029 | get_bh(iloc->bh); |
| 4991 | 5030 | ||
| 4992 | /* ext4_do_update_inode() does jbd2_journal_dirty_metadata */ | 5031 | /* ext4_do_update_inode() does jbd2_journal_dirty_metadata */ |
| 4993 | err = ext4_do_update_inode(handle, inode, iloc); | 5032 | err = ext4_do_update_inode(handle, inode, iloc, 0); |
| 4994 | put_bh(iloc->bh); | 5033 | put_bh(iloc->bh); |
| 4995 | return err; | 5034 | return err; |
| 4996 | } | 5035 | } |
| @@ -5281,12 +5320,21 @@ int ext4_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
| 5281 | else | 5320 | else |
| 5282 | len = PAGE_CACHE_SIZE; | 5321 | len = PAGE_CACHE_SIZE; |
| 5283 | 5322 | ||
| 5323 | lock_page(page); | ||
| 5324 | /* | ||
| 5325 | * return if we have all the buffers mapped. This avoid | ||
| 5326 | * the need to call write_begin/write_end which does a | ||
| 5327 | * journal_start/journal_stop which can block and take | ||
| 5328 | * long time | ||
| 5329 | */ | ||
| 5284 | if (page_has_buffers(page)) { | 5330 | if (page_has_buffers(page)) { |
| 5285 | /* return if we have all the buffers mapped */ | ||
| 5286 | if (!walk_page_buffers(NULL, page_buffers(page), 0, len, NULL, | 5331 | if (!walk_page_buffers(NULL, page_buffers(page), 0, len, NULL, |
| 5287 | ext4_bh_unmapped)) | 5332 | ext4_bh_unmapped)) { |
| 5333 | unlock_page(page); | ||
| 5288 | goto out_unlock; | 5334 | goto out_unlock; |
| 5335 | } | ||
| 5289 | } | 5336 | } |
| 5337 | unlock_page(page); | ||
| 5290 | /* | 5338 | /* |
| 5291 | * OK, we need to fill the hole... Do write_begin write_end | 5339 | * OK, we need to fill the hole... Do write_begin write_end |
| 5292 | * to do block allocation/reservation.We are not holding | 5340 | * to do block allocation/reservation.We are not holding |
diff --git a/fs/ext4/ioctl.c b/fs/ext4/ioctl.c index 7050a9cd04a4..c1cdf613e725 100644 --- a/fs/ext4/ioctl.c +++ b/fs/ext4/ioctl.c | |||
| @@ -243,10 +243,9 @@ setversion_out: | |||
| 243 | me.donor_start, me.len, &me.moved_len); | 243 | me.donor_start, me.len, &me.moved_len); |
| 244 | fput(donor_filp); | 244 | fput(donor_filp); |
| 245 | 245 | ||
| 246 | if (!err) | 246 | if (copy_to_user((struct move_extent *)arg, &me, sizeof(me))) |
| 247 | if (copy_to_user((struct move_extent *)arg, | 247 | return -EFAULT; |
| 248 | &me, sizeof(me))) | 248 | |
| 249 | return -EFAULT; | ||
| 250 | return err; | 249 | return err; |
| 251 | } | 250 | } |
| 252 | 251 | ||
diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c index cd258463e2a9..e9c61896d605 100644 --- a/fs/ext4/mballoc.c +++ b/fs/ext4/mballoc.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | */ | 22 | */ |
| 23 | 23 | ||
| 24 | #include "mballoc.h" | 24 | #include "mballoc.h" |
| 25 | #include <linux/debugfs.h> | ||
| 25 | #include <trace/events/ext4.h> | 26 | #include <trace/events/ext4.h> |
| 26 | 27 | ||
| 27 | /* | 28 | /* |
| @@ -622,13 +623,13 @@ static int __mb_check_buddy(struct ext4_buddy *e4b, char *file, | |||
| 622 | 623 | ||
| 623 | /* FIXME!! need more doc */ | 624 | /* FIXME!! need more doc */ |
| 624 | static void ext4_mb_mark_free_simple(struct super_block *sb, | 625 | static void ext4_mb_mark_free_simple(struct super_block *sb, |
| 625 | void *buddy, unsigned first, int len, | 626 | void *buddy, ext4_grpblk_t first, ext4_grpblk_t len, |
| 626 | struct ext4_group_info *grp) | 627 | struct ext4_group_info *grp) |
| 627 | { | 628 | { |
| 628 | struct ext4_sb_info *sbi = EXT4_SB(sb); | 629 | struct ext4_sb_info *sbi = EXT4_SB(sb); |
| 629 | unsigned short min; | 630 | ext4_grpblk_t min; |
| 630 | unsigned short max; | 631 | ext4_grpblk_t max; |
| 631 | unsigned short chunk; | 632 | ext4_grpblk_t chunk; |
| 632 | unsigned short border; | 633 | unsigned short border; |
| 633 | 634 | ||
| 634 | BUG_ON(len > EXT4_BLOCKS_PER_GROUP(sb)); | 635 | BUG_ON(len > EXT4_BLOCKS_PER_GROUP(sb)); |
| @@ -662,10 +663,10 @@ void ext4_mb_generate_buddy(struct super_block *sb, | |||
| 662 | void *buddy, void *bitmap, ext4_group_t group) | 663 | void *buddy, void *bitmap, ext4_group_t group) |
| 663 | { | 664 | { |
| 664 | struct ext4_group_info *grp = ext4_get_group_info(sb, group); | 665 | struct ext4_group_info *grp = ext4_get_group_info(sb, group); |
| 665 | unsigned short max = EXT4_BLOCKS_PER_GROUP(sb); | 666 | ext4_grpblk_t max = EXT4_BLOCKS_PER_GROUP(sb); |
| 666 | unsigned short i = 0; | 667 | ext4_grpblk_t i = 0; |
| 667 | unsigned short first; | 668 | ext4_grpblk_t first; |
| 668 | unsigned short len; | 669 | ext4_grpblk_t len; |
| 669 | unsigned free = 0; | 670 | unsigned free = 0; |
| 670 | unsigned fragments = 0; | 671 | unsigned fragments = 0; |
| 671 | unsigned long long period = get_cycles(); | 672 | unsigned long long period = get_cycles(); |
| @@ -743,7 +744,7 @@ static int ext4_mb_init_cache(struct page *page, char *incore) | |||
| 743 | char *data; | 744 | char *data; |
| 744 | char *bitmap; | 745 | char *bitmap; |
| 745 | 746 | ||
| 746 | mb_debug("init page %lu\n", page->index); | 747 | mb_debug(1, "init page %lu\n", page->index); |
| 747 | 748 | ||
| 748 | inode = page->mapping->host; | 749 | inode = page->mapping->host; |
| 749 | sb = inode->i_sb; | 750 | sb = inode->i_sb; |
| @@ -822,7 +823,7 @@ static int ext4_mb_init_cache(struct page *page, char *incore) | |||
| 822 | set_bitmap_uptodate(bh[i]); | 823 | set_bitmap_uptodate(bh[i]); |
| 823 | bh[i]->b_end_io = end_buffer_read_sync; | 824 | bh[i]->b_end_io = end_buffer_read_sync; |
| 824 | submit_bh(READ, bh[i]); | 825 | submit_bh(READ, bh[i]); |
| 825 | mb_debug("read bitmap for group %u\n", first_group + i); | 826 | mb_debug(1, "read bitmap for group %u\n", first_group + i); |
| 826 | } | 827 | } |
| 827 | 828 | ||
| 828 | /* wait for I/O completion */ | 829 | /* wait for I/O completion */ |
| @@ -862,12 +863,13 @@ static int ext4_mb_init_cache(struct page *page, char *incore) | |||
| 862 | if ((first_block + i) & 1) { | 863 | if ((first_block + i) & 1) { |
| 863 | /* this is block of buddy */ | 864 | /* this is block of buddy */ |
| 864 | BUG_ON(incore == NULL); | 865 | BUG_ON(incore == NULL); |
| 865 | mb_debug("put buddy for group %u in page %lu/%x\n", | 866 | mb_debug(1, "put buddy for group %u in page %lu/%x\n", |
| 866 | group, page->index, i * blocksize); | 867 | group, page->index, i * blocksize); |
| 867 | grinfo = ext4_get_group_info(sb, group); | 868 | grinfo = ext4_get_group_info(sb, group); |
| 868 | grinfo->bb_fragments = 0; | 869 | grinfo->bb_fragments = 0; |
| 869 | memset(grinfo->bb_counters, 0, | 870 | memset(grinfo->bb_counters, 0, |
| 870 | sizeof(unsigned short)*(sb->s_blocksize_bits+2)); | 871 | sizeof(*grinfo->bb_counters) * |
| 872 | (sb->s_blocksize_bits+2)); | ||
| 871 | /* | 873 | /* |
| 872 | * incore got set to the group block bitmap below | 874 | * incore got set to the group block bitmap below |
| 873 | */ | 875 | */ |
| @@ -878,7 +880,7 @@ static int ext4_mb_init_cache(struct page *page, char *incore) | |||
| 878 | } else { | 880 | } else { |
| 879 | /* this is block of bitmap */ | 881 | /* this is block of bitmap */ |
| 880 | BUG_ON(incore != NULL); | 882 | BUG_ON(incore != NULL); |
| 881 | mb_debug("put bitmap for group %u in page %lu/%x\n", | 883 | mb_debug(1, "put bitmap for group %u in page %lu/%x\n", |
| 882 | group, page->index, i * blocksize); | 884 | group, page->index, i * blocksize); |
| 883 | 885 | ||
| 884 | /* see comments in ext4_mb_put_pa() */ | 886 | /* see comments in ext4_mb_put_pa() */ |
| @@ -908,6 +910,100 @@ out: | |||
| 908 | return err; | 910 | return err; |
| 909 | } | 911 | } |
| 910 | 912 | ||
| 913 | static noinline_for_stack | ||
| 914 | int ext4_mb_init_group(struct super_block *sb, ext4_group_t group) | ||
| 915 | { | ||
| 916 | |||
| 917 | int ret = 0; | ||
| 918 | void *bitmap; | ||
| 919 | int blocks_per_page; | ||
| 920 | int block, pnum, poff; | ||
| 921 | int num_grp_locked = 0; | ||
| 922 | struct ext4_group_info *this_grp; | ||
| 923 | struct ext4_sb_info *sbi = EXT4_SB(sb); | ||
| 924 | struct inode *inode = sbi->s_buddy_cache; | ||
| 925 | struct page *page = NULL, *bitmap_page = NULL; | ||
| 926 | |||
| 927 | mb_debug(1, "init group %u\n", group); | ||
| 928 | blocks_per_page = PAGE_CACHE_SIZE / sb->s_blocksize; | ||
| 929 | this_grp = ext4_get_group_info(sb, group); | ||
| 930 | /* | ||
| 931 | * This ensures that we don't reinit the buddy cache | ||
| 932 | * page which map to the group from which we are already | ||
| 933 | * allocating. If we are looking at the buddy cache we would | ||
| 934 | * have taken a reference using ext4_mb_load_buddy and that | ||
| 935 | * would have taken the alloc_sem lock. | ||
| 936 | */ | ||
| 937 | num_grp_locked = ext4_mb_get_buddy_cache_lock(sb, group); | ||
| 938 | if (!EXT4_MB_GRP_NEED_INIT(this_grp)) { | ||
| 939 | /* | ||
| 940 | * somebody initialized the group | ||
| 941 | * return without doing anything | ||
| 942 | */ | ||
| 943 | ret = 0; | ||
| 944 | goto err; | ||
| 945 | } | ||
| 946 | /* | ||
| 947 | * the buddy cache inode stores the block bitmap | ||
| 948 | * and buddy information in consecutive blocks. | ||
| 949 | * So for each group we need two blocks. | ||
| 950 | */ | ||
| 951 | block = group * 2; | ||
| 952 | pnum = block / blocks_per_page; | ||
| 953 | poff = block % blocks_per_page; | ||
| 954 | page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); | ||
| 955 | if (page) { | ||
| 956 | BUG_ON(page->mapping != inode->i_mapping); | ||
| 957 | ret = ext4_mb_init_cache(page, NULL); | ||
| 958 | if (ret) { | ||
| 959 | unlock_page(page); | ||
| 960 | goto err; | ||
| 961 | } | ||
| 962 | unlock_page(page); | ||
| 963 | } | ||
| 964 | if (page == NULL || !PageUptodate(page)) { | ||
| 965 | ret = -EIO; | ||
| 966 | goto err; | ||
| 967 | } | ||
| 968 | mark_page_accessed(page); | ||
| 969 | bitmap_page = page; | ||
| 970 | bitmap = page_address(page) + (poff * sb->s_blocksize); | ||
| 971 | |||
| 972 | /* init buddy cache */ | ||
| 973 | block++; | ||
| 974 | pnum = block / blocks_per_page; | ||
| 975 | poff = block % blocks_per_page; | ||
| 976 | page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); | ||
| 977 | if (page == bitmap_page) { | ||
| 978 | /* | ||
| 979 | * If both the bitmap and buddy are in | ||
| 980 | * the same page we don't need to force | ||
| 981 | * init the buddy | ||
| 982 | */ | ||
| 983 | unlock_page(page); | ||
| 984 | } else if (page) { | ||
| 985 | BUG_ON(page->mapping != inode->i_mapping); | ||
| 986 | ret = ext4_mb_init_cache(page, bitmap); | ||
| 987 | if (ret) { | ||
| 988 | unlock_page(page); | ||
| 989 | goto err; | ||
| 990 | } | ||
| 991 | unlock_page(page); | ||
| 992 | } | ||
| 993 | if (page == NULL || !PageUptodate(page)) { | ||
| 994 | ret = -EIO; | ||
| 995 | goto err; | ||
| 996 | } | ||
| 997 | mark_page_accessed(page); | ||
| 998 | err: | ||
| 999 | ext4_mb_put_buddy_cache_lock(sb, group, num_grp_locked); | ||
| 1000 | if (bitmap_page) | ||
| 1001 | page_cache_release(bitmap_page); | ||
| 1002 | if (page) | ||
| 1003 | page_cache_release(page); | ||
| 1004 | return ret; | ||
| 1005 | } | ||
| 1006 | |||
| 911 | static noinline_for_stack int | 1007 | static noinline_for_stack int |
| 912 | ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group, | 1008 | ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group, |
| 913 | struct ext4_buddy *e4b) | 1009 | struct ext4_buddy *e4b) |
| @@ -922,7 +1018,7 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group, | |||
| 922 | struct ext4_sb_info *sbi = EXT4_SB(sb); | 1018 | struct ext4_sb_info *sbi = EXT4_SB(sb); |
| 923 | struct inode *inode = sbi->s_buddy_cache; | 1019 | struct inode *inode = sbi->s_buddy_cache; |
| 924 | 1020 | ||
| 925 | mb_debug("load group %u\n", group); | 1021 | mb_debug(1, "load group %u\n", group); |
| 926 | 1022 | ||
| 927 | blocks_per_page = PAGE_CACHE_SIZE / sb->s_blocksize; | 1023 | blocks_per_page = PAGE_CACHE_SIZE / sb->s_blocksize; |
| 928 | grp = ext4_get_group_info(sb, group); | 1024 | grp = ext4_get_group_info(sb, group); |
| @@ -941,8 +1037,26 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group, | |||
| 941 | * groups mapped by the page is blocked | 1037 | * groups mapped by the page is blocked |
| 942 | * till we are done with allocation | 1038 | * till we are done with allocation |
| 943 | */ | 1039 | */ |
| 1040 | repeat_load_buddy: | ||
| 944 | down_read(e4b->alloc_semp); | 1041 | down_read(e4b->alloc_semp); |
| 945 | 1042 | ||
| 1043 | if (unlikely(EXT4_MB_GRP_NEED_INIT(grp))) { | ||
| 1044 | /* we need to check for group need init flag | ||
| 1045 | * with alloc_semp held so that we can be sure | ||
| 1046 | * that new blocks didn't get added to the group | ||
| 1047 | * when we are loading the buddy cache | ||
| 1048 | */ | ||
| 1049 | up_read(e4b->alloc_semp); | ||
| 1050 | /* | ||
| 1051 | * we need full data about the group | ||
| 1052 | * to make a good selection | ||
| 1053 | */ | ||
| 1054 | ret = ext4_mb_init_group(sb, group); | ||
| 1055 | if (ret) | ||
| 1056 | return ret; | ||
| 1057 | goto repeat_load_buddy; | ||
| 1058 | } | ||
| 1059 | |||
| 946 | /* | 1060 | /* |
| 947 | * the buddy cache inode stores the block bitmap | 1061 | * the buddy cache inode stores the block bitmap |
| 948 | * and buddy information in consecutive blocks. | 1062 | * and buddy information in consecutive blocks. |
| @@ -1360,7 +1474,7 @@ static void ext4_mb_use_best_found(struct ext4_allocation_context *ac, | |||
| 1360 | ac->alloc_semp = e4b->alloc_semp; | 1474 | ac->alloc_semp = e4b->alloc_semp; |
| 1361 | e4b->alloc_semp = NULL; | 1475 | e4b->alloc_semp = NULL; |
| 1362 | /* store last allocated for subsequent stream allocation */ | 1476 | /* store last allocated for subsequent stream allocation */ |
| 1363 | if ((ac->ac_flags & EXT4_MB_HINT_DATA)) { | 1477 | if (ac->ac_flags & EXT4_MB_STREAM_ALLOC) { |
| 1364 | spin_lock(&sbi->s_md_lock); | 1478 | spin_lock(&sbi->s_md_lock); |
| 1365 | sbi->s_mb_last_group = ac->ac_f_ex.fe_group; | 1479 | sbi->s_mb_last_group = ac->ac_f_ex.fe_group; |
| 1366 | sbi->s_mb_last_start = ac->ac_f_ex.fe_start; | 1480 | sbi->s_mb_last_start = ac->ac_f_ex.fe_start; |
| @@ -1837,97 +1951,6 @@ void ext4_mb_put_buddy_cache_lock(struct super_block *sb, | |||
| 1837 | 1951 | ||
| 1838 | } | 1952 | } |
| 1839 | 1953 | ||
| 1840 | static noinline_for_stack | ||
| 1841 | int ext4_mb_init_group(struct super_block *sb, ext4_group_t group) | ||
| 1842 | { | ||
| 1843 | |||
| 1844 | int ret; | ||
| 1845 | void *bitmap; | ||
| 1846 | int blocks_per_page; | ||
| 1847 | int block, pnum, poff; | ||
| 1848 | int num_grp_locked = 0; | ||
| 1849 | struct ext4_group_info *this_grp; | ||
| 1850 | struct ext4_sb_info *sbi = EXT4_SB(sb); | ||
| 1851 | struct inode *inode = sbi->s_buddy_cache; | ||
| 1852 | struct page *page = NULL, *bitmap_page = NULL; | ||
| 1853 | |||
| 1854 | mb_debug("init group %lu\n", group); | ||
| 1855 | blocks_per_page = PAGE_CACHE_SIZE / sb->s_blocksize; | ||
| 1856 | this_grp = ext4_get_group_info(sb, group); | ||
| 1857 | /* | ||
| 1858 | * This ensures we don't add group | ||
| 1859 | * to this buddy cache via resize | ||
| 1860 | */ | ||
| 1861 | num_grp_locked = ext4_mb_get_buddy_cache_lock(sb, group); | ||
| 1862 | if (!EXT4_MB_GRP_NEED_INIT(this_grp)) { | ||
| 1863 | /* | ||
| 1864 | * somebody initialized the group | ||
| 1865 | * return without doing anything | ||
| 1866 | */ | ||
| 1867 | ret = 0; | ||
| 1868 | goto err; | ||
| 1869 | } | ||
| 1870 | /* | ||
| 1871 | * the buddy cache inode stores the block bitmap | ||
| 1872 | * and buddy information in consecutive blocks. | ||
| 1873 | * So for each group we need two blocks. | ||
| 1874 | */ | ||
| 1875 | block = group * 2; | ||
| 1876 | pnum = block / blocks_per_page; | ||
| 1877 | poff = block % blocks_per_page; | ||
| 1878 | page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); | ||
| 1879 | if (page) { | ||
| 1880 | BUG_ON(page->mapping != inode->i_mapping); | ||
| 1881 | ret = ext4_mb_init_cache(page, NULL); | ||
| 1882 | if (ret) { | ||
| 1883 | unlock_page(page); | ||
| 1884 | goto err; | ||
| 1885 | } | ||
| 1886 | unlock_page(page); | ||
| 1887 | } | ||
| 1888 | if (page == NULL || !PageUptodate(page)) { | ||
| 1889 | ret = -EIO; | ||
| 1890 | goto err; | ||
| 1891 | } | ||
| 1892 | mark_page_accessed(page); | ||
| 1893 | bitmap_page = page; | ||
| 1894 | bitmap = page_address(page) + (poff * sb->s_blocksize); | ||
| 1895 | |||
| 1896 | /* init buddy cache */ | ||
| 1897 | block++; | ||
| 1898 | pnum = block / blocks_per_page; | ||
| 1899 | poff = block % blocks_per_page; | ||
| 1900 | page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); | ||
| 1901 | if (page == bitmap_page) { | ||
| 1902 | /* | ||
| 1903 | * If both the bitmap and buddy are in | ||
| 1904 | * the same page we don't need to force | ||
| 1905 | * init the buddy | ||
| 1906 | */ | ||
| 1907 | unlock_page(page); | ||
| 1908 | } else if (page) { | ||
| 1909 | BUG_ON(page->mapping != inode->i_mapping); | ||
| 1910 | ret = ext4_mb_init_cache(page, bitmap); | ||
| 1911 | if (ret) { | ||
| 1912 | unlock_page(page); | ||
| 1913 | goto err; | ||
| 1914 | } | ||
| 1915 | unlock_page(page); | ||
| 1916 | } | ||
| 1917 | if (page == NULL || !PageUptodate(page)) { | ||
| 1918 | ret = -EIO; | ||
| 1919 | goto err; | ||
| 1920 | } | ||
| 1921 | mark_page_accessed(page); | ||
| 1922 | err: | ||
| 1923 | ext4_mb_put_buddy_cache_lock(sb, group, num_grp_locked); | ||
| 1924 | if (bitmap_page) | ||
| 1925 | page_cache_release(bitmap_page); | ||
| 1926 | if (page) | ||
| 1927 | page_cache_release(page); | ||
| 1928 | return ret; | ||
| 1929 | } | ||
| 1930 | |||
| 1931 | static noinline_for_stack int | 1954 | static noinline_for_stack int |
| 1932 | ext4_mb_regular_allocator(struct ext4_allocation_context *ac) | 1955 | ext4_mb_regular_allocator(struct ext4_allocation_context *ac) |
| 1933 | { | 1956 | { |
| @@ -1938,11 +1961,14 @@ ext4_mb_regular_allocator(struct ext4_allocation_context *ac) | |||
| 1938 | struct ext4_sb_info *sbi; | 1961 | struct ext4_sb_info *sbi; |
| 1939 | struct super_block *sb; | 1962 | struct super_block *sb; |
| 1940 | struct ext4_buddy e4b; | 1963 | struct ext4_buddy e4b; |
| 1941 | loff_t size, isize; | ||
| 1942 | 1964 | ||
| 1943 | sb = ac->ac_sb; | 1965 | sb = ac->ac_sb; |
| 1944 | sbi = EXT4_SB(sb); | 1966 | sbi = EXT4_SB(sb); |
| 1945 | ngroups = ext4_get_groups_count(sb); | 1967 | ngroups = ext4_get_groups_count(sb); |
| 1968 | /* non-extent files are limited to low blocks/groups */ | ||
| 1969 | if (!(EXT4_I(ac->ac_inode)->i_flags & EXT4_EXTENTS_FL)) | ||
| 1970 | ngroups = sbi->s_blockfile_groups; | ||
| 1971 | |||
| 1946 | BUG_ON(ac->ac_status == AC_STATUS_FOUND); | 1972 | BUG_ON(ac->ac_status == AC_STATUS_FOUND); |
| 1947 | 1973 | ||
| 1948 | /* first, try the goal */ | 1974 | /* first, try the goal */ |
| @@ -1974,20 +2000,16 @@ ext4_mb_regular_allocator(struct ext4_allocation_context *ac) | |||
| 1974 | } | 2000 | } |
| 1975 | 2001 | ||
| 1976 | bsbits = ac->ac_sb->s_blocksize_bits; | 2002 | bsbits = ac->ac_sb->s_blocksize_bits; |
| 1977 | /* if stream allocation is enabled, use global goal */ | ||
| 1978 | size = ac->ac_o_ex.fe_logical + ac->ac_o_ex.fe_len; | ||
| 1979 | isize = i_size_read(ac->ac_inode) >> bsbits; | ||
| 1980 | if (size < isize) | ||
| 1981 | size = isize; | ||
| 1982 | 2003 | ||
| 1983 | if (size < sbi->s_mb_stream_request && | 2004 | /* if stream allocation is enabled, use global goal */ |
| 1984 | (ac->ac_flags & EXT4_MB_HINT_DATA)) { | 2005 | if (ac->ac_flags & EXT4_MB_STREAM_ALLOC) { |
| 1985 | /* TBD: may be hot point */ | 2006 | /* TBD: may be hot point */ |
| 1986 | spin_lock(&sbi->s_md_lock); | 2007 | spin_lock(&sbi->s_md_lock); |
| 1987 | ac->ac_g_ex.fe_group = sbi->s_mb_last_group; | 2008 | ac->ac_g_ex.fe_group = sbi->s_mb_last_group; |
| 1988 | ac->ac_g_ex.fe_start = sbi->s_mb_last_start; | 2009 | ac->ac_g_ex.fe_start = sbi->s_mb_last_start; |
| 1989 | spin_unlock(&sbi->s_md_lock); | 2010 | spin_unlock(&sbi->s_md_lock); |
| 1990 | } | 2011 | } |
| 2012 | |||
| 1991 | /* Let's just scan groups to find more-less suitable blocks */ | 2013 | /* Let's just scan groups to find more-less suitable blocks */ |
| 1992 | cr = ac->ac_2order ? 0 : 1; | 2014 | cr = ac->ac_2order ? 0 : 1; |
| 1993 | /* | 2015 | /* |
| @@ -2015,27 +2037,6 @@ repeat: | |||
| 2015 | if (grp->bb_free == 0) | 2037 | if (grp->bb_free == 0) |
| 2016 | continue; | 2038 | continue; |
| 2017 | 2039 | ||
| 2018 | /* | ||
| 2019 | * if the group is already init we check whether it is | ||
| 2020 | * a good group and if not we don't load the buddy | ||
| 2021 | */ | ||
| 2022 | if (EXT4_MB_GRP_NEED_INIT(grp)) { | ||
| 2023 | /* | ||
| 2024 | * we need full data about the group | ||
| 2025 | * to make a good selection | ||
| 2026 | */ | ||
| 2027 | err = ext4_mb_init_group(sb, group); | ||
| 2028 | if (err) | ||
| 2029 | goto out; | ||
| 2030 | } | ||
| 2031 | |||
| 2032 | /* | ||
| 2033 | * If the particular group doesn't satisfy our | ||
| 2034 | * criteria we continue with the next group | ||
| 2035 | */ | ||
| 2036 | if (!ext4_mb_good_group(ac, group, cr)) | ||
| 2037 | continue; | ||
| 2038 | |||
| 2039 | err = ext4_mb_load_buddy(sb, group, &e4b); | 2040 | err = ext4_mb_load_buddy(sb, group, &e4b); |
| 2040 | if (err) | 2041 | if (err) |
| 2041 | goto out; | 2042 | goto out; |
| @@ -2156,7 +2157,7 @@ static int ext4_mb_seq_history_show(struct seq_file *seq, void *v) | |||
| 2156 | 2157 | ||
| 2157 | if (v == SEQ_START_TOKEN) { | 2158 | if (v == SEQ_START_TOKEN) { |
| 2158 | seq_printf(seq, "%-5s %-8s %-23s %-23s %-23s %-5s " | 2159 | seq_printf(seq, "%-5s %-8s %-23s %-23s %-23s %-5s " |
| 2159 | "%-5s %-2s %-5s %-5s %-5s %-6s\n", | 2160 | "%-5s %-2s %-6s %-5s %-5s %-6s\n", |
| 2160 | "pid", "inode", "original", "goal", "result", "found", | 2161 | "pid", "inode", "original", "goal", "result", "found", |
| 2161 | "grps", "cr", "flags", "merge", "tail", "broken"); | 2162 | "grps", "cr", "flags", "merge", "tail", "broken"); |
| 2162 | return 0; | 2163 | return 0; |
| @@ -2164,7 +2165,7 @@ static int ext4_mb_seq_history_show(struct seq_file *seq, void *v) | |||
| 2164 | 2165 | ||
| 2165 | if (hs->op == EXT4_MB_HISTORY_ALLOC) { | 2166 | if (hs->op == EXT4_MB_HISTORY_ALLOC) { |
| 2166 | fmt = "%-5u %-8u %-23s %-23s %-23s %-5u %-5u %-2u " | 2167 | fmt = "%-5u %-8u %-23s %-23s %-23s %-5u %-5u %-2u " |
| 2167 | "%-5u %-5s %-5u %-6u\n"; | 2168 | "0x%04x %-5s %-5u %-6u\n"; |
| 2168 | sprintf(buf2, "%u/%d/%u@%u", hs->result.fe_group, | 2169 | sprintf(buf2, "%u/%d/%u@%u", hs->result.fe_group, |
| 2169 | hs->result.fe_start, hs->result.fe_len, | 2170 | hs->result.fe_start, hs->result.fe_len, |
| 2170 | hs->result.fe_logical); | 2171 | hs->result.fe_logical); |
| @@ -2205,7 +2206,7 @@ static void ext4_mb_seq_history_stop(struct seq_file *seq, void *v) | |||
| 2205 | { | 2206 | { |
| 2206 | } | 2207 | } |
| 2207 | 2208 | ||
| 2208 | static struct seq_operations ext4_mb_seq_history_ops = { | 2209 | static const struct seq_operations ext4_mb_seq_history_ops = { |
| 2209 | .start = ext4_mb_seq_history_start, | 2210 | .start = ext4_mb_seq_history_start, |
| 2210 | .next = ext4_mb_seq_history_next, | 2211 | .next = ext4_mb_seq_history_next, |
| 2211 | .stop = ext4_mb_seq_history_stop, | 2212 | .stop = ext4_mb_seq_history_stop, |
| @@ -2287,7 +2288,7 @@ static ssize_t ext4_mb_seq_history_write(struct file *file, | |||
| 2287 | return count; | 2288 | return count; |
| 2288 | } | 2289 | } |
| 2289 | 2290 | ||
| 2290 | static struct file_operations ext4_mb_seq_history_fops = { | 2291 | static const struct file_operations ext4_mb_seq_history_fops = { |
| 2291 | .owner = THIS_MODULE, | 2292 | .owner = THIS_MODULE, |
| 2292 | .open = ext4_mb_seq_history_open, | 2293 | .open = ext4_mb_seq_history_open, |
| 2293 | .read = seq_read, | 2294 | .read = seq_read, |
| @@ -2328,7 +2329,7 @@ static int ext4_mb_seq_groups_show(struct seq_file *seq, void *v) | |||
| 2328 | struct ext4_buddy e4b; | 2329 | struct ext4_buddy e4b; |
| 2329 | struct sg { | 2330 | struct sg { |
| 2330 | struct ext4_group_info info; | 2331 | struct ext4_group_info info; |
| 2331 | unsigned short counters[16]; | 2332 | ext4_grpblk_t counters[16]; |
| 2332 | } sg; | 2333 | } sg; |
| 2333 | 2334 | ||
| 2334 | group--; | 2335 | group--; |
| @@ -2366,7 +2367,7 @@ static void ext4_mb_seq_groups_stop(struct seq_file *seq, void *v) | |||
| 2366 | { | 2367 | { |
| 2367 | } | 2368 | } |
| 2368 | 2369 | ||
| 2369 | static struct seq_operations ext4_mb_seq_groups_ops = { | 2370 | static const struct seq_operations ext4_mb_seq_groups_ops = { |
| 2370 | .start = ext4_mb_seq_groups_start, | 2371 | .start = ext4_mb_seq_groups_start, |
| 2371 | .next = ext4_mb_seq_groups_next, | 2372 | .next = ext4_mb_seq_groups_next, |
| 2372 | .stop = ext4_mb_seq_groups_stop, | 2373 | .stop = ext4_mb_seq_groups_stop, |
| @@ -2387,7 +2388,7 @@ static int ext4_mb_seq_groups_open(struct inode *inode, struct file *file) | |||
| 2387 | 2388 | ||
| 2388 | } | 2389 | } |
| 2389 | 2390 | ||
| 2390 | static struct file_operations ext4_mb_seq_groups_fops = { | 2391 | static const struct file_operations ext4_mb_seq_groups_fops = { |
| 2391 | .owner = THIS_MODULE, | 2392 | .owner = THIS_MODULE, |
| 2392 | .open = ext4_mb_seq_groups_open, | 2393 | .open = ext4_mb_seq_groups_open, |
| 2393 | .read = seq_read, | 2394 | .read = seq_read, |
| @@ -2532,7 +2533,7 @@ int ext4_mb_add_groupinfo(struct super_block *sb, ext4_group_t group, | |||
| 2532 | 2533 | ||
| 2533 | INIT_LIST_HEAD(&meta_group_info[i]->bb_prealloc_list); | 2534 | INIT_LIST_HEAD(&meta_group_info[i]->bb_prealloc_list); |
| 2534 | init_rwsem(&meta_group_info[i]->alloc_sem); | 2535 | init_rwsem(&meta_group_info[i]->alloc_sem); |
| 2535 | meta_group_info[i]->bb_free_root.rb_node = NULL;; | 2536 | meta_group_info[i]->bb_free_root.rb_node = NULL; |
| 2536 | 2537 | ||
| 2537 | #ifdef DOUBLE_CHECK | 2538 | #ifdef DOUBLE_CHECK |
| 2538 | { | 2539 | { |
| @@ -2558,26 +2559,15 @@ exit_meta_group_info: | |||
| 2558 | return -ENOMEM; | 2559 | return -ENOMEM; |
| 2559 | } /* ext4_mb_add_groupinfo */ | 2560 | } /* ext4_mb_add_groupinfo */ |
| 2560 | 2561 | ||
| 2561 | /* | ||
| 2562 | * Update an existing group. | ||
| 2563 | * This function is used for online resize | ||
| 2564 | */ | ||
| 2565 | void ext4_mb_update_group_info(struct ext4_group_info *grp, ext4_grpblk_t add) | ||
| 2566 | { | ||
| 2567 | grp->bb_free += add; | ||
| 2568 | } | ||
| 2569 | |||
| 2570 | static int ext4_mb_init_backend(struct super_block *sb) | 2562 | static int ext4_mb_init_backend(struct super_block *sb) |
| 2571 | { | 2563 | { |
| 2572 | ext4_group_t ngroups = ext4_get_groups_count(sb); | 2564 | ext4_group_t ngroups = ext4_get_groups_count(sb); |
| 2573 | ext4_group_t i; | 2565 | ext4_group_t i; |
| 2574 | int metalen; | ||
| 2575 | struct ext4_sb_info *sbi = EXT4_SB(sb); | 2566 | struct ext4_sb_info *sbi = EXT4_SB(sb); |
| 2576 | struct ext4_super_block *es = sbi->s_es; | 2567 | struct ext4_super_block *es = sbi->s_es; |
| 2577 | int num_meta_group_infos; | 2568 | int num_meta_group_infos; |
| 2578 | int num_meta_group_infos_max; | 2569 | int num_meta_group_infos_max; |
| 2579 | int array_size; | 2570 | int array_size; |
| 2580 | struct ext4_group_info **meta_group_info; | ||
| 2581 | struct ext4_group_desc *desc; | 2571 | struct ext4_group_desc *desc; |
| 2582 | 2572 | ||
| 2583 | /* This is the number of blocks used by GDT */ | 2573 | /* This is the number of blocks used by GDT */ |
| @@ -2622,22 +2612,6 @@ static int ext4_mb_init_backend(struct super_block *sb) | |||
| 2622 | goto err_freesgi; | 2612 | goto err_freesgi; |
| 2623 | } | 2613 | } |
| 2624 | EXT4_I(sbi->s_buddy_cache)->i_disksize = 0; | 2614 | EXT4_I(sbi->s_buddy_cache)->i_disksize = 0; |
| 2625 | |||
| 2626 | metalen = sizeof(*meta_group_info) << EXT4_DESC_PER_BLOCK_BITS(sb); | ||
| 2627 | for (i = 0; i < num_meta_group_infos; i++) { | ||
| 2628 | if ((i + 1) == num_meta_group_infos) | ||
| 2629 | metalen = sizeof(*meta_group_info) * | ||
| 2630 | (ngroups - | ||
| 2631 | (i << EXT4_DESC_PER_BLOCK_BITS(sb))); | ||
| 2632 | meta_group_info = kmalloc(metalen, GFP_KERNEL); | ||
| 2633 | if (meta_group_info == NULL) { | ||
| 2634 | printk(KERN_ERR "EXT4-fs: can't allocate mem for a " | ||
| 2635 | "buddy group\n"); | ||
| 2636 | goto err_freemeta; | ||
| 2637 | } | ||
| 2638 | sbi->s_group_info[i] = meta_group_info; | ||
| 2639 | } | ||
| 2640 | |||
| 2641 | for (i = 0; i < ngroups; i++) { | 2615 | for (i = 0; i < ngroups; i++) { |
| 2642 | desc = ext4_get_group_desc(sb, i, NULL); | 2616 | desc = ext4_get_group_desc(sb, i, NULL); |
| 2643 | if (desc == NULL) { | 2617 | if (desc == NULL) { |
| @@ -2655,7 +2629,6 @@ err_freebuddy: | |||
| 2655 | while (i-- > 0) | 2629 | while (i-- > 0) |
| 2656 | kfree(ext4_get_group_info(sb, i)); | 2630 | kfree(ext4_get_group_info(sb, i)); |
| 2657 | i = num_meta_group_infos; | 2631 | i = num_meta_group_infos; |
| 2658 | err_freemeta: | ||
| 2659 | while (i-- > 0) | 2632 | while (i-- > 0) |
| 2660 | kfree(sbi->s_group_info[i]); | 2633 | kfree(sbi->s_group_info[i]); |
| 2661 | iput(sbi->s_buddy_cache); | 2634 | iput(sbi->s_buddy_cache); |
| @@ -2672,14 +2645,14 @@ int ext4_mb_init(struct super_block *sb, int needs_recovery) | |||
| 2672 | unsigned max; | 2645 | unsigned max; |
| 2673 | int ret; | 2646 | int ret; |
| 2674 | 2647 | ||
| 2675 | i = (sb->s_blocksize_bits + 2) * sizeof(unsigned short); | 2648 | i = (sb->s_blocksize_bits + 2) * sizeof(*sbi->s_mb_offsets); |
| 2676 | 2649 | ||
| 2677 | sbi->s_mb_offsets = kmalloc(i, GFP_KERNEL); | 2650 | sbi->s_mb_offsets = kmalloc(i, GFP_KERNEL); |
| 2678 | if (sbi->s_mb_offsets == NULL) { | 2651 | if (sbi->s_mb_offsets == NULL) { |
| 2679 | return -ENOMEM; | 2652 | return -ENOMEM; |
| 2680 | } | 2653 | } |
| 2681 | 2654 | ||
| 2682 | i = (sb->s_blocksize_bits + 2) * sizeof(unsigned int); | 2655 | i = (sb->s_blocksize_bits + 2) * sizeof(*sbi->s_mb_maxs); |
| 2683 | sbi->s_mb_maxs = kmalloc(i, GFP_KERNEL); | 2656 | sbi->s_mb_maxs = kmalloc(i, GFP_KERNEL); |
| 2684 | if (sbi->s_mb_maxs == NULL) { | 2657 | if (sbi->s_mb_maxs == NULL) { |
| 2685 | kfree(sbi->s_mb_offsets); | 2658 | kfree(sbi->s_mb_offsets); |
| @@ -2758,7 +2731,7 @@ static void ext4_mb_cleanup_pa(struct ext4_group_info *grp) | |||
| 2758 | kmem_cache_free(ext4_pspace_cachep, pa); | 2731 | kmem_cache_free(ext4_pspace_cachep, pa); |
| 2759 | } | 2732 | } |
| 2760 | if (count) | 2733 | if (count) |
| 2761 | mb_debug("mballoc: %u PAs left\n", count); | 2734 | mb_debug(1, "mballoc: %u PAs left\n", count); |
| 2762 | 2735 | ||
| 2763 | } | 2736 | } |
| 2764 | 2737 | ||
| @@ -2839,7 +2812,7 @@ static void release_blocks_on_commit(journal_t *journal, transaction_t *txn) | |||
| 2839 | list_for_each_safe(l, ltmp, &txn->t_private_list) { | 2812 | list_for_each_safe(l, ltmp, &txn->t_private_list) { |
| 2840 | entry = list_entry(l, struct ext4_free_data, list); | 2813 | entry = list_entry(l, struct ext4_free_data, list); |
| 2841 | 2814 | ||
| 2842 | mb_debug("gonna free %u blocks in group %u (0x%p):", | 2815 | mb_debug(1, "gonna free %u blocks in group %u (0x%p):", |
| 2843 | entry->count, entry->group, entry); | 2816 | entry->count, entry->group, entry); |
| 2844 | 2817 | ||
| 2845 | err = ext4_mb_load_buddy(sb, entry->group, &e4b); | 2818 | err = ext4_mb_load_buddy(sb, entry->group, &e4b); |
| @@ -2874,9 +2847,43 @@ static void release_blocks_on_commit(journal_t *journal, transaction_t *txn) | |||
| 2874 | ext4_mb_release_desc(&e4b); | 2847 | ext4_mb_release_desc(&e4b); |
| 2875 | } | 2848 | } |
| 2876 | 2849 | ||
| 2877 | mb_debug("freed %u blocks in %u structures\n", count, count2); | 2850 | mb_debug(1, "freed %u blocks in %u structures\n", count, count2); |
| 2851 | } | ||
| 2852 | |||
| 2853 | #ifdef CONFIG_EXT4_DEBUG | ||
| 2854 | u8 mb_enable_debug __read_mostly; | ||
| 2855 | |||
| 2856 | static struct dentry *debugfs_dir; | ||
| 2857 | static struct dentry *debugfs_debug; | ||
| 2858 | |||
| 2859 | static void __init ext4_create_debugfs_entry(void) | ||
| 2860 | { | ||
| 2861 | debugfs_dir = debugfs_create_dir("ext4", NULL); | ||
| 2862 | if (debugfs_dir) | ||
| 2863 | debugfs_debug = debugfs_create_u8("mballoc-debug", | ||
| 2864 | S_IRUGO | S_IWUSR, | ||
| 2865 | debugfs_dir, | ||
| 2866 | &mb_enable_debug); | ||
| 2867 | } | ||
| 2868 | |||
| 2869 | static void ext4_remove_debugfs_entry(void) | ||
| 2870 | { | ||
| 2871 | debugfs_remove(debugfs_debug); | ||
| 2872 | debugfs_remove(debugfs_dir); | ||
| 2878 | } | 2873 | } |
| 2879 | 2874 | ||
| 2875 | #else | ||
| 2876 | |||
| 2877 | static void __init ext4_create_debugfs_entry(void) | ||
| 2878 | { | ||
| 2879 | } | ||
| 2880 | |||
| 2881 | static void ext4_remove_debugfs_entry(void) | ||
| 2882 | { | ||
| 2883 | } | ||
| 2884 | |||
| 2885 | #endif | ||
| 2886 | |||
| 2880 | int __init init_ext4_mballoc(void) | 2887 | int __init init_ext4_mballoc(void) |
| 2881 | { | 2888 | { |
| 2882 | ext4_pspace_cachep = | 2889 | ext4_pspace_cachep = |
| @@ -2904,6 +2911,7 @@ int __init init_ext4_mballoc(void) | |||
| 2904 | kmem_cache_destroy(ext4_ac_cachep); | 2911 | kmem_cache_destroy(ext4_ac_cachep); |
| 2905 | return -ENOMEM; | 2912 | return -ENOMEM; |
| 2906 | } | 2913 | } |
| 2914 | ext4_create_debugfs_entry(); | ||
| 2907 | return 0; | 2915 | return 0; |
| 2908 | } | 2916 | } |
| 2909 | 2917 | ||
| @@ -2917,6 +2925,7 @@ void exit_ext4_mballoc(void) | |||
| 2917 | kmem_cache_destroy(ext4_pspace_cachep); | 2925 | kmem_cache_destroy(ext4_pspace_cachep); |
| 2918 | kmem_cache_destroy(ext4_ac_cachep); | 2926 | kmem_cache_destroy(ext4_ac_cachep); |
| 2919 | kmem_cache_destroy(ext4_free_ext_cachep); | 2927 | kmem_cache_destroy(ext4_free_ext_cachep); |
| 2928 | ext4_remove_debugfs_entry(); | ||
| 2920 | } | 2929 | } |
| 2921 | 2930 | ||
| 2922 | 2931 | ||
| @@ -3061,7 +3070,7 @@ static void ext4_mb_normalize_group_request(struct ext4_allocation_context *ac) | |||
| 3061 | ac->ac_g_ex.fe_len = EXT4_SB(sb)->s_stripe; | 3070 | ac->ac_g_ex.fe_len = EXT4_SB(sb)->s_stripe; |
| 3062 | else | 3071 | else |
| 3063 | ac->ac_g_ex.fe_len = EXT4_SB(sb)->s_mb_group_prealloc; | 3072 | ac->ac_g_ex.fe_len = EXT4_SB(sb)->s_mb_group_prealloc; |
| 3064 | mb_debug("#%u: goal %u blocks for locality group\n", | 3073 | mb_debug(1, "#%u: goal %u blocks for locality group\n", |
| 3065 | current->pid, ac->ac_g_ex.fe_len); | 3074 | current->pid, ac->ac_g_ex.fe_len); |
| 3066 | } | 3075 | } |
| 3067 | 3076 | ||
| @@ -3180,23 +3189,18 @@ ext4_mb_normalize_request(struct ext4_allocation_context *ac, | |||
| 3180 | BUG_ON(!(ac->ac_o_ex.fe_logical >= pa_end || | 3189 | BUG_ON(!(ac->ac_o_ex.fe_logical >= pa_end || |
| 3181 | ac->ac_o_ex.fe_logical < pa->pa_lstart)); | 3190 | ac->ac_o_ex.fe_logical < pa->pa_lstart)); |
| 3182 | 3191 | ||
| 3183 | /* skip PA normalized request doesn't overlap with */ | 3192 | /* skip PAs this normalized request doesn't overlap with */ |
| 3184 | if (pa->pa_lstart >= end) { | 3193 | if (pa->pa_lstart >= end || pa_end <= start) { |
| 3185 | spin_unlock(&pa->pa_lock); | ||
| 3186 | continue; | ||
| 3187 | } | ||
| 3188 | if (pa_end <= start) { | ||
| 3189 | spin_unlock(&pa->pa_lock); | 3194 | spin_unlock(&pa->pa_lock); |
| 3190 | continue; | 3195 | continue; |
| 3191 | } | 3196 | } |
| 3192 | BUG_ON(pa->pa_lstart <= start && pa_end >= end); | 3197 | BUG_ON(pa->pa_lstart <= start && pa_end >= end); |
| 3193 | 3198 | ||
| 3199 | /* adjust start or end to be adjacent to this pa */ | ||
| 3194 | if (pa_end <= ac->ac_o_ex.fe_logical) { | 3200 | if (pa_end <= ac->ac_o_ex.fe_logical) { |
| 3195 | BUG_ON(pa_end < start); | 3201 | BUG_ON(pa_end < start); |
| 3196 | start = pa_end; | 3202 | start = pa_end; |
| 3197 | } | 3203 | } else if (pa->pa_lstart > ac->ac_o_ex.fe_logical) { |
| 3198 | |||
| 3199 | if (pa->pa_lstart > ac->ac_o_ex.fe_logical) { | ||
| 3200 | BUG_ON(pa->pa_lstart > end); | 3204 | BUG_ON(pa->pa_lstart > end); |
| 3201 | end = pa->pa_lstart; | 3205 | end = pa->pa_lstart; |
| 3202 | } | 3206 | } |
| @@ -3251,7 +3255,7 @@ ext4_mb_normalize_request(struct ext4_allocation_context *ac, | |||
| 3251 | ac->ac_flags |= EXT4_MB_HINT_TRY_GOAL; | 3255 | ac->ac_flags |= EXT4_MB_HINT_TRY_GOAL; |
| 3252 | } | 3256 | } |
| 3253 | 3257 | ||
| 3254 | mb_debug("goal: %u(was %u) blocks at %u\n", (unsigned) size, | 3258 | mb_debug(1, "goal: %u(was %u) blocks at %u\n", (unsigned) size, |
| 3255 | (unsigned) orig_size, (unsigned) start); | 3259 | (unsigned) orig_size, (unsigned) start); |
| 3256 | } | 3260 | } |
| 3257 | 3261 | ||
| @@ -3300,7 +3304,7 @@ static void ext4_mb_use_inode_pa(struct ext4_allocation_context *ac, | |||
| 3300 | BUG_ON(pa->pa_free < len); | 3304 | BUG_ON(pa->pa_free < len); |
| 3301 | pa->pa_free -= len; | 3305 | pa->pa_free -= len; |
| 3302 | 3306 | ||
| 3303 | mb_debug("use %llu/%u from inode pa %p\n", start, len, pa); | 3307 | mb_debug(1, "use %llu/%u from inode pa %p\n", start, len, pa); |
| 3304 | } | 3308 | } |
| 3305 | 3309 | ||
| 3306 | /* | 3310 | /* |
| @@ -3324,7 +3328,7 @@ static void ext4_mb_use_group_pa(struct ext4_allocation_context *ac, | |||
| 3324 | * in on-disk bitmap -- see ext4_mb_release_context() | 3328 | * in on-disk bitmap -- see ext4_mb_release_context() |
| 3325 | * Other CPUs are prevented from allocating from this pa by lg_mutex | 3329 | * Other CPUs are prevented from allocating from this pa by lg_mutex |
| 3326 | */ | 3330 | */ |
| 3327 | mb_debug("use %u/%u from group pa %p\n", pa->pa_lstart-len, len, pa); | 3331 | mb_debug(1, "use %u/%u from group pa %p\n", pa->pa_lstart-len, len, pa); |
| 3328 | } | 3332 | } |
| 3329 | 3333 | ||
| 3330 | /* | 3334 | /* |
| @@ -3382,6 +3386,11 @@ ext4_mb_use_preallocated(struct ext4_allocation_context *ac) | |||
| 3382 | ac->ac_o_ex.fe_logical >= pa->pa_lstart + pa->pa_len) | 3386 | ac->ac_o_ex.fe_logical >= pa->pa_lstart + pa->pa_len) |
| 3383 | continue; | 3387 | continue; |
| 3384 | 3388 | ||
| 3389 | /* non-extent files can't have physical blocks past 2^32 */ | ||
| 3390 | if (!(EXT4_I(ac->ac_inode)->i_flags & EXT4_EXTENTS_FL) && | ||
| 3391 | pa->pa_pstart + pa->pa_len > EXT4_MAX_BLOCK_FILE_PHYS) | ||
| 3392 | continue; | ||
| 3393 | |||
| 3385 | /* found preallocated blocks, use them */ | 3394 | /* found preallocated blocks, use them */ |
| 3386 | spin_lock(&pa->pa_lock); | 3395 | spin_lock(&pa->pa_lock); |
| 3387 | if (pa->pa_deleted == 0 && pa->pa_free) { | 3396 | if (pa->pa_deleted == 0 && pa->pa_free) { |
| @@ -3503,7 +3512,7 @@ void ext4_mb_generate_from_pa(struct super_block *sb, void *bitmap, | |||
| 3503 | preallocated += len; | 3512 | preallocated += len; |
| 3504 | count++; | 3513 | count++; |
| 3505 | } | 3514 | } |
| 3506 | mb_debug("prellocated %u for group %u\n", preallocated, group); | 3515 | mb_debug(1, "prellocated %u for group %u\n", preallocated, group); |
| 3507 | } | 3516 | } |
| 3508 | 3517 | ||
| 3509 | static void ext4_mb_pa_callback(struct rcu_head *head) | 3518 | static void ext4_mb_pa_callback(struct rcu_head *head) |
| @@ -3638,7 +3647,7 @@ ext4_mb_new_inode_pa(struct ext4_allocation_context *ac) | |||
| 3638 | pa->pa_deleted = 0; | 3647 | pa->pa_deleted = 0; |
| 3639 | pa->pa_type = MB_INODE_PA; | 3648 | pa->pa_type = MB_INODE_PA; |
| 3640 | 3649 | ||
| 3641 | mb_debug("new inode pa %p: %llu/%u for %u\n", pa, | 3650 | mb_debug(1, "new inode pa %p: %llu/%u for %u\n", pa, |
| 3642 | pa->pa_pstart, pa->pa_len, pa->pa_lstart); | 3651 | pa->pa_pstart, pa->pa_len, pa->pa_lstart); |
| 3643 | trace_ext4_mb_new_inode_pa(ac, pa); | 3652 | trace_ext4_mb_new_inode_pa(ac, pa); |
| 3644 | 3653 | ||
| @@ -3698,7 +3707,7 @@ ext4_mb_new_group_pa(struct ext4_allocation_context *ac) | |||
| 3698 | pa->pa_deleted = 0; | 3707 | pa->pa_deleted = 0; |
| 3699 | pa->pa_type = MB_GROUP_PA; | 3708 | pa->pa_type = MB_GROUP_PA; |
| 3700 | 3709 | ||
| 3701 | mb_debug("new group pa %p: %llu/%u for %u\n", pa, | 3710 | mb_debug(1, "new group pa %p: %llu/%u for %u\n", pa, |
| 3702 | pa->pa_pstart, pa->pa_len, pa->pa_lstart); | 3711 | pa->pa_pstart, pa->pa_len, pa->pa_lstart); |
| 3703 | trace_ext4_mb_new_group_pa(ac, pa); | 3712 | trace_ext4_mb_new_group_pa(ac, pa); |
| 3704 | 3713 | ||
| @@ -3777,7 +3786,7 @@ ext4_mb_release_inode_pa(struct ext4_buddy *e4b, struct buffer_head *bitmap_bh, | |||
| 3777 | next = mb_find_next_bit(bitmap_bh->b_data, end, bit); | 3786 | next = mb_find_next_bit(bitmap_bh->b_data, end, bit); |
| 3778 | start = group * EXT4_BLOCKS_PER_GROUP(sb) + bit + | 3787 | start = group * EXT4_BLOCKS_PER_GROUP(sb) + bit + |
| 3779 | le32_to_cpu(sbi->s_es->s_first_data_block); | 3788 | le32_to_cpu(sbi->s_es->s_first_data_block); |
| 3780 | mb_debug(" free preallocated %u/%u in group %u\n", | 3789 | mb_debug(1, " free preallocated %u/%u in group %u\n", |
| 3781 | (unsigned) start, (unsigned) next - bit, | 3790 | (unsigned) start, (unsigned) next - bit, |
| 3782 | (unsigned) group); | 3791 | (unsigned) group); |
| 3783 | free += next - bit; | 3792 | free += next - bit; |
| @@ -3868,7 +3877,7 @@ ext4_mb_discard_group_preallocations(struct super_block *sb, | |||
| 3868 | int busy = 0; | 3877 | int busy = 0; |
| 3869 | int free = 0; | 3878 | int free = 0; |
| 3870 | 3879 | ||
| 3871 | mb_debug("discard preallocation for group %u\n", group); | 3880 | mb_debug(1, "discard preallocation for group %u\n", group); |
| 3872 | 3881 | ||
| 3873 | if (list_empty(&grp->bb_prealloc_list)) | 3882 | if (list_empty(&grp->bb_prealloc_list)) |
| 3874 | return 0; | 3883 | return 0; |
| @@ -3992,7 +4001,7 @@ void ext4_discard_preallocations(struct inode *inode) | |||
| 3992 | return; | 4001 | return; |
| 3993 | } | 4002 | } |
| 3994 | 4003 | ||
| 3995 | mb_debug("discard preallocation for inode %lu\n", inode->i_ino); | 4004 | mb_debug(1, "discard preallocation for inode %lu\n", inode->i_ino); |
| 3996 | trace_ext4_discard_preallocations(inode); | 4005 | trace_ext4_discard_preallocations(inode); |
| 3997 | 4006 | ||
| 3998 | INIT_LIST_HEAD(&list); | 4007 | INIT_LIST_HEAD(&list); |
| @@ -4097,7 +4106,7 @@ static void ext4_mb_return_to_preallocation(struct inode *inode, | |||
| 4097 | { | 4106 | { |
| 4098 | BUG_ON(!list_empty(&EXT4_I(inode)->i_prealloc_list)); | 4107 | BUG_ON(!list_empty(&EXT4_I(inode)->i_prealloc_list)); |
| 4099 | } | 4108 | } |
| 4100 | #ifdef MB_DEBUG | 4109 | #ifdef CONFIG_EXT4_DEBUG |
| 4101 | static void ext4_mb_show_ac(struct ext4_allocation_context *ac) | 4110 | static void ext4_mb_show_ac(struct ext4_allocation_context *ac) |
| 4102 | { | 4111 | { |
| 4103 | struct super_block *sb = ac->ac_sb; | 4112 | struct super_block *sb = ac->ac_sb; |
| @@ -4139,14 +4148,14 @@ static void ext4_mb_show_ac(struct ext4_allocation_context *ac) | |||
| 4139 | ext4_get_group_no_and_offset(sb, pa->pa_pstart, | 4148 | ext4_get_group_no_and_offset(sb, pa->pa_pstart, |
| 4140 | NULL, &start); | 4149 | NULL, &start); |
| 4141 | spin_unlock(&pa->pa_lock); | 4150 | spin_unlock(&pa->pa_lock); |
| 4142 | printk(KERN_ERR "PA:%lu:%d:%u \n", i, | 4151 | printk(KERN_ERR "PA:%u:%d:%u \n", i, |
| 4143 | start, pa->pa_len); | 4152 | start, pa->pa_len); |
| 4144 | } | 4153 | } |
| 4145 | ext4_unlock_group(sb, i); | 4154 | ext4_unlock_group(sb, i); |
| 4146 | 4155 | ||
| 4147 | if (grp->bb_free == 0) | 4156 | if (grp->bb_free == 0) |
| 4148 | continue; | 4157 | continue; |
| 4149 | printk(KERN_ERR "%lu: %d/%d \n", | 4158 | printk(KERN_ERR "%u: %d/%d \n", |
| 4150 | i, grp->bb_free, grp->bb_fragments); | 4159 | i, grp->bb_free, grp->bb_fragments); |
| 4151 | } | 4160 | } |
| 4152 | printk(KERN_ERR "\n"); | 4161 | printk(KERN_ERR "\n"); |
| @@ -4174,16 +4183,26 @@ static void ext4_mb_group_or_file(struct ext4_allocation_context *ac) | |||
| 4174 | if (!(ac->ac_flags & EXT4_MB_HINT_DATA)) | 4183 | if (!(ac->ac_flags & EXT4_MB_HINT_DATA)) |
| 4175 | return; | 4184 | return; |
| 4176 | 4185 | ||
| 4186 | if (unlikely(ac->ac_flags & EXT4_MB_HINT_GOAL_ONLY)) | ||
| 4187 | return; | ||
| 4188 | |||
| 4177 | size = ac->ac_o_ex.fe_logical + ac->ac_o_ex.fe_len; | 4189 | size = ac->ac_o_ex.fe_logical + ac->ac_o_ex.fe_len; |
| 4178 | isize = i_size_read(ac->ac_inode) >> bsbits; | 4190 | isize = (i_size_read(ac->ac_inode) + ac->ac_sb->s_blocksize - 1) |
| 4191 | >> bsbits; | ||
| 4179 | size = max(size, isize); | 4192 | size = max(size, isize); |
| 4180 | 4193 | ||
| 4181 | /* don't use group allocation for large files */ | 4194 | if ((size == isize) && |
| 4182 | if (size >= sbi->s_mb_stream_request) | 4195 | !ext4_fs_is_busy(sbi) && |
| 4196 | (atomic_read(&ac->ac_inode->i_writecount) == 0)) { | ||
| 4197 | ac->ac_flags |= EXT4_MB_HINT_NOPREALLOC; | ||
| 4183 | return; | 4198 | return; |
| 4199 | } | ||
| 4184 | 4200 | ||
| 4185 | if (unlikely(ac->ac_flags & EXT4_MB_HINT_GOAL_ONLY)) | 4201 | /* don't use group allocation for large files */ |
| 4202 | if (size >= sbi->s_mb_stream_request) { | ||
| 4203 | ac->ac_flags |= EXT4_MB_STREAM_ALLOC; | ||
| 4186 | return; | 4204 | return; |
| 4205 | } | ||
| 4187 | 4206 | ||
| 4188 | BUG_ON(ac->ac_lg != NULL); | 4207 | BUG_ON(ac->ac_lg != NULL); |
| 4189 | /* | 4208 | /* |
| @@ -4246,7 +4265,7 @@ ext4_mb_initialize_context(struct ext4_allocation_context *ac, | |||
| 4246 | * locality group. this is a policy, actually */ | 4265 | * locality group. this is a policy, actually */ |
| 4247 | ext4_mb_group_or_file(ac); | 4266 | ext4_mb_group_or_file(ac); |
| 4248 | 4267 | ||
| 4249 | mb_debug("init ac: %u blocks @ %u, goal %u, flags %x, 2^%d, " | 4268 | mb_debug(1, "init ac: %u blocks @ %u, goal %u, flags %x, 2^%d, " |
| 4250 | "left: %u/%u, right %u/%u to %swritable\n", | 4269 | "left: %u/%u, right %u/%u to %swritable\n", |
| 4251 | (unsigned) ar->len, (unsigned) ar->logical, | 4270 | (unsigned) ar->len, (unsigned) ar->logical, |
| 4252 | (unsigned) ar->goal, ac->ac_flags, ac->ac_2order, | 4271 | (unsigned) ar->goal, ac->ac_flags, ac->ac_2order, |
| @@ -4268,7 +4287,7 @@ ext4_mb_discard_lg_preallocations(struct super_block *sb, | |||
| 4268 | struct ext4_prealloc_space *pa, *tmp; | 4287 | struct ext4_prealloc_space *pa, *tmp; |
| 4269 | struct ext4_allocation_context *ac; | 4288 | struct ext4_allocation_context *ac; |
| 4270 | 4289 | ||
| 4271 | mb_debug("discard locality group preallocation\n"); | 4290 | mb_debug(1, "discard locality group preallocation\n"); |
| 4272 | 4291 | ||
| 4273 | INIT_LIST_HEAD(&discard_list); | 4292 | INIT_LIST_HEAD(&discard_list); |
| 4274 | ac = kmem_cache_alloc(ext4_ac_cachep, GFP_NOFS); | 4293 | ac = kmem_cache_alloc(ext4_ac_cachep, GFP_NOFS); |
diff --git a/fs/ext4/mballoc.h b/fs/ext4/mballoc.h index c96bb19f58f9..188d3d709b24 100644 --- a/fs/ext4/mballoc.h +++ b/fs/ext4/mballoc.h | |||
| @@ -37,11 +37,19 @@ | |||
| 37 | 37 | ||
| 38 | /* | 38 | /* |
| 39 | */ | 39 | */ |
| 40 | #define MB_DEBUG__ | 40 | #ifdef CONFIG_EXT4_DEBUG |
| 41 | #ifdef MB_DEBUG | 41 | extern u8 mb_enable_debug; |
| 42 | #define mb_debug(fmt, a...) printk(fmt, ##a) | 42 | |
| 43 | #define mb_debug(n, fmt, a...) \ | ||
| 44 | do { \ | ||
| 45 | if ((n) <= mb_enable_debug) { \ | ||
| 46 | printk(KERN_DEBUG "(%s, %d): %s: ", \ | ||
| 47 | __FILE__, __LINE__, __func__); \ | ||
| 48 | printk(fmt, ## a); \ | ||
| 49 | } \ | ||
| 50 | } while (0) | ||
| 43 | #else | 51 | #else |
| 44 | #define mb_debug(fmt, a...) | 52 | #define mb_debug(n, fmt, a...) |
| 45 | #endif | 53 | #endif |
| 46 | 54 | ||
| 47 | /* | 55 | /* |
| @@ -128,8 +136,8 @@ struct ext4_prealloc_space { | |||
| 128 | unsigned pa_deleted; | 136 | unsigned pa_deleted; |
| 129 | ext4_fsblk_t pa_pstart; /* phys. block */ | 137 | ext4_fsblk_t pa_pstart; /* phys. block */ |
| 130 | ext4_lblk_t pa_lstart; /* log. block */ | 138 | ext4_lblk_t pa_lstart; /* log. block */ |
| 131 | unsigned short pa_len; /* len of preallocated chunk */ | 139 | ext4_grpblk_t pa_len; /* len of preallocated chunk */ |
| 132 | unsigned short pa_free; /* how many blocks are free */ | 140 | ext4_grpblk_t pa_free; /* how many blocks are free */ |
| 133 | unsigned short pa_type; /* pa type. inode or group */ | 141 | unsigned short pa_type; /* pa type. inode or group */ |
| 134 | spinlock_t *pa_obj_lock; | 142 | spinlock_t *pa_obj_lock; |
| 135 | struct inode *pa_inode; /* hack, for history only */ | 143 | struct inode *pa_inode; /* hack, for history only */ |
| @@ -144,7 +152,7 @@ struct ext4_free_extent { | |||
| 144 | ext4_lblk_t fe_logical; | 152 | ext4_lblk_t fe_logical; |
| 145 | ext4_grpblk_t fe_start; | 153 | ext4_grpblk_t fe_start; |
| 146 | ext4_group_t fe_group; | 154 | ext4_group_t fe_group; |
| 147 | int fe_len; | 155 | ext4_grpblk_t fe_len; |
| 148 | }; | 156 | }; |
| 149 | 157 | ||
| 150 | /* | 158 | /* |
diff --git a/fs/ext4/migrate.c b/fs/ext4/migrate.c index 313a50b39741..bf519f239ae6 100644 --- a/fs/ext4/migrate.c +++ b/fs/ext4/migrate.c | |||
| @@ -353,17 +353,16 @@ static int ext4_ext_swap_inode_data(handle_t *handle, struct inode *inode, | |||
| 353 | 353 | ||
| 354 | down_write(&EXT4_I(inode)->i_data_sem); | 354 | down_write(&EXT4_I(inode)->i_data_sem); |
| 355 | /* | 355 | /* |
| 356 | * if EXT4_EXT_MIGRATE is cleared a block allocation | 356 | * if EXT4_STATE_EXT_MIGRATE is cleared a block allocation |
| 357 | * happened after we started the migrate. We need to | 357 | * happened after we started the migrate. We need to |
| 358 | * fail the migrate | 358 | * fail the migrate |
| 359 | */ | 359 | */ |
| 360 | if (!(EXT4_I(inode)->i_flags & EXT4_EXT_MIGRATE)) { | 360 | if (!(EXT4_I(inode)->i_state & EXT4_STATE_EXT_MIGRATE)) { |
| 361 | retval = -EAGAIN; | 361 | retval = -EAGAIN; |
| 362 | up_write(&EXT4_I(inode)->i_data_sem); | 362 | up_write(&EXT4_I(inode)->i_data_sem); |
| 363 | goto err_out; | 363 | goto err_out; |
| 364 | } else | 364 | } else |
| 365 | EXT4_I(inode)->i_flags = EXT4_I(inode)->i_flags & | 365 | EXT4_I(inode)->i_state &= ~EXT4_STATE_EXT_MIGRATE; |
| 366 | ~EXT4_EXT_MIGRATE; | ||
| 367 | /* | 366 | /* |
| 368 | * We have the extent map build with the tmp inode. | 367 | * We have the extent map build with the tmp inode. |
| 369 | * Now copy the i_data across | 368 | * Now copy the i_data across |
| @@ -517,14 +516,15 @@ int ext4_ext_migrate(struct inode *inode) | |||
| 517 | * when we add extents we extent the journal | 516 | * when we add extents we extent the journal |
| 518 | */ | 517 | */ |
| 519 | /* | 518 | /* |
| 520 | * Even though we take i_mutex we can still cause block allocation | 519 | * Even though we take i_mutex we can still cause block |
| 521 | * via mmap write to holes. If we have allocated new blocks we fail | 520 | * allocation via mmap write to holes. If we have allocated |
| 522 | * migrate. New block allocation will clear EXT4_EXT_MIGRATE flag. | 521 | * new blocks we fail migrate. New block allocation will |
| 523 | * The flag is updated with i_data_sem held to prevent racing with | 522 | * clear EXT4_STATE_EXT_MIGRATE flag. The flag is updated |
| 524 | * block allocation. | 523 | * with i_data_sem held to prevent racing with block |
| 524 | * allocation. | ||
| 525 | */ | 525 | */ |
| 526 | down_read((&EXT4_I(inode)->i_data_sem)); | 526 | down_read((&EXT4_I(inode)->i_data_sem)); |
| 527 | EXT4_I(inode)->i_flags = EXT4_I(inode)->i_flags | EXT4_EXT_MIGRATE; | 527 | EXT4_I(inode)->i_state |= EXT4_STATE_EXT_MIGRATE; |
| 528 | up_read((&EXT4_I(inode)->i_data_sem)); | 528 | up_read((&EXT4_I(inode)->i_data_sem)); |
| 529 | 529 | ||
| 530 | handle = ext4_journal_start(inode, 1); | 530 | handle = ext4_journal_start(inode, 1); |
| @@ -618,7 +618,7 @@ err_out: | |||
| 618 | tmp_inode->i_nlink = 0; | 618 | tmp_inode->i_nlink = 0; |
| 619 | 619 | ||
| 620 | ext4_journal_stop(handle); | 620 | ext4_journal_stop(handle); |
| 621 | 621 | unlock_new_inode(tmp_inode); | |
| 622 | iput(tmp_inode); | 622 | iput(tmp_inode); |
| 623 | 623 | ||
| 624 | return retval; | 624 | return retval; |
diff --git a/fs/ext4/move_extent.c b/fs/ext4/move_extent.c index bbf2dd9404dc..c07a2915e40b 100644 --- a/fs/ext4/move_extent.c +++ b/fs/ext4/move_extent.c | |||
| @@ -19,14 +19,31 @@ | |||
| 19 | #include "ext4_extents.h" | 19 | #include "ext4_extents.h" |
| 20 | #include "ext4.h" | 20 | #include "ext4.h" |
| 21 | 21 | ||
| 22 | #define get_ext_path(path, inode, block, ret) \ | 22 | /** |
| 23 | do { \ | 23 | * get_ext_path - Find an extent path for designated logical block number. |
| 24 | path = ext4_ext_find_extent(inode, block, path); \ | 24 | * |
| 25 | if (IS_ERR(path)) { \ | 25 | * @inode: an inode which is searched |
| 26 | ret = PTR_ERR(path); \ | 26 | * @lblock: logical block number to find an extent path |
| 27 | path = NULL; \ | 27 | * @path: pointer to an extent path pointer (for output) |
| 28 | } \ | 28 | * |
| 29 | } while (0) | 29 | * ext4_ext_find_extent wrapper. Return 0 on success, or a negative error value |
| 30 | * on failure. | ||
| 31 | */ | ||
| 32 | static inline int | ||
| 33 | get_ext_path(struct inode *inode, ext4_lblk_t lblock, | ||
| 34 | struct ext4_ext_path **path) | ||
| 35 | { | ||
| 36 | int ret = 0; | ||
| 37 | |||
| 38 | *path = ext4_ext_find_extent(inode, lblock, *path); | ||
| 39 | if (IS_ERR(*path)) { | ||
| 40 | ret = PTR_ERR(*path); | ||
| 41 | *path = NULL; | ||
| 42 | } else if ((*path)[ext_depth(inode)].p_ext == NULL) | ||
| 43 | ret = -ENODATA; | ||
| 44 | |||
| 45 | return ret; | ||
| 46 | } | ||
| 30 | 47 | ||
| 31 | /** | 48 | /** |
| 32 | * copy_extent_status - Copy the extent's initialization status | 49 | * copy_extent_status - Copy the extent's initialization status |
| @@ -113,6 +130,31 @@ mext_next_extent(struct inode *inode, struct ext4_ext_path *path, | |||
| 113 | } | 130 | } |
| 114 | 131 | ||
| 115 | /** | 132 | /** |
| 133 | * mext_check_null_inode - NULL check for two inodes | ||
| 134 | * | ||
| 135 | * If inode1 or inode2 is NULL, return -EIO. Otherwise, return 0. | ||
| 136 | */ | ||
| 137 | static int | ||
| 138 | mext_check_null_inode(struct inode *inode1, struct inode *inode2, | ||
| 139 | const char *function) | ||
| 140 | { | ||
| 141 | int ret = 0; | ||
| 142 | |||
| 143 | if (inode1 == NULL) { | ||
| 144 | ext4_error(inode2->i_sb, function, | ||
| 145 | "Both inodes should not be NULL: " | ||
| 146 | "inode1 NULL inode2 %lu", inode2->i_ino); | ||
| 147 | ret = -EIO; | ||
| 148 | } else if (inode2 == NULL) { | ||
| 149 | ext4_error(inode1->i_sb, function, | ||
| 150 | "Both inodes should not be NULL: " | ||
| 151 | "inode1 %lu inode2 NULL", inode1->i_ino); | ||
| 152 | ret = -EIO; | ||
| 153 | } | ||
| 154 | return ret; | ||
| 155 | } | ||
| 156 | |||
| 157 | /** | ||
| 116 | * mext_double_down_read - Acquire two inodes' read semaphore | 158 | * mext_double_down_read - Acquire two inodes' read semaphore |
| 117 | * | 159 | * |
| 118 | * @orig_inode: original inode structure | 160 | * @orig_inode: original inode structure |
| @@ -124,8 +166,6 @@ mext_double_down_read(struct inode *orig_inode, struct inode *donor_inode) | |||
| 124 | { | 166 | { |
| 125 | struct inode *first = orig_inode, *second = donor_inode; | 167 | struct inode *first = orig_inode, *second = donor_inode; |
| 126 | 168 | ||
| 127 | BUG_ON(orig_inode == NULL || donor_inode == NULL); | ||
| 128 | |||
| 129 | /* | 169 | /* |
| 130 | * Use the inode number to provide the stable locking order instead | 170 | * Use the inode number to provide the stable locking order instead |
| 131 | * of its address, because the C language doesn't guarantee you can | 171 | * of its address, because the C language doesn't guarantee you can |
| @@ -152,8 +192,6 @@ mext_double_down_write(struct inode *orig_inode, struct inode *donor_inode) | |||
| 152 | { | 192 | { |
| 153 | struct inode *first = orig_inode, *second = donor_inode; | 193 | struct inode *first = orig_inode, *second = donor_inode; |
| 154 | 194 | ||
| 155 | BUG_ON(orig_inode == NULL || donor_inode == NULL); | ||
| 156 | |||
| 157 | /* | 195 | /* |
| 158 | * Use the inode number to provide the stable locking order instead | 196 | * Use the inode number to provide the stable locking order instead |
| 159 | * of its address, because the C language doesn't guarantee you can | 197 | * of its address, because the C language doesn't guarantee you can |
| @@ -178,8 +216,6 @@ mext_double_down_write(struct inode *orig_inode, struct inode *donor_inode) | |||
| 178 | static void | 216 | static void |
| 179 | mext_double_up_read(struct inode *orig_inode, struct inode *donor_inode) | 217 | mext_double_up_read(struct inode *orig_inode, struct inode *donor_inode) |
| 180 | { | 218 | { |
| 181 | BUG_ON(orig_inode == NULL || donor_inode == NULL); | ||
| 182 | |||
| 183 | up_read(&EXT4_I(orig_inode)->i_data_sem); | 219 | up_read(&EXT4_I(orig_inode)->i_data_sem); |
| 184 | up_read(&EXT4_I(donor_inode)->i_data_sem); | 220 | up_read(&EXT4_I(donor_inode)->i_data_sem); |
| 185 | } | 221 | } |
| @@ -194,8 +230,6 @@ mext_double_up_read(struct inode *orig_inode, struct inode *donor_inode) | |||
| 194 | static void | 230 | static void |
| 195 | mext_double_up_write(struct inode *orig_inode, struct inode *donor_inode) | 231 | mext_double_up_write(struct inode *orig_inode, struct inode *donor_inode) |
| 196 | { | 232 | { |
| 197 | BUG_ON(orig_inode == NULL || donor_inode == NULL); | ||
| 198 | |||
| 199 | up_write(&EXT4_I(orig_inode)->i_data_sem); | 233 | up_write(&EXT4_I(orig_inode)->i_data_sem); |
| 200 | up_write(&EXT4_I(donor_inode)->i_data_sem); | 234 | up_write(&EXT4_I(donor_inode)->i_data_sem); |
| 201 | } | 235 | } |
| @@ -283,8 +317,8 @@ mext_insert_across_blocks(handle_t *handle, struct inode *orig_inode, | |||
| 283 | } | 317 | } |
| 284 | 318 | ||
| 285 | if (new_flag) { | 319 | if (new_flag) { |
| 286 | get_ext_path(orig_path, orig_inode, eblock, err); | 320 | err = get_ext_path(orig_inode, eblock, &orig_path); |
| 287 | if (orig_path == NULL) | 321 | if (err) |
| 288 | goto out; | 322 | goto out; |
| 289 | 323 | ||
| 290 | if (ext4_ext_insert_extent(handle, orig_inode, | 324 | if (ext4_ext_insert_extent(handle, orig_inode, |
| @@ -293,9 +327,9 @@ mext_insert_across_blocks(handle_t *handle, struct inode *orig_inode, | |||
| 293 | } | 327 | } |
| 294 | 328 | ||
| 295 | if (end_flag) { | 329 | if (end_flag) { |
| 296 | get_ext_path(orig_path, orig_inode, | 330 | err = get_ext_path(orig_inode, |
| 297 | le32_to_cpu(end_ext->ee_block) - 1, err); | 331 | le32_to_cpu(end_ext->ee_block) - 1, &orig_path); |
| 298 | if (orig_path == NULL) | 332 | if (err) |
| 299 | goto out; | 333 | goto out; |
| 300 | 334 | ||
| 301 | if (ext4_ext_insert_extent(handle, orig_inode, | 335 | if (ext4_ext_insert_extent(handle, orig_inode, |
| @@ -519,7 +553,15 @@ mext_leaf_block(handle_t *handle, struct inode *orig_inode, | |||
| 519 | * oext |-----------| | 553 | * oext |-----------| |
| 520 | * new_ext |-------| | 554 | * new_ext |-------| |
| 521 | */ | 555 | */ |
| 522 | BUG_ON(le32_to_cpu(oext->ee_block) + oext_alen - 1 < new_ext_end); | 556 | if (le32_to_cpu(oext->ee_block) + oext_alen - 1 < new_ext_end) { |
| 557 | ext4_error(orig_inode->i_sb, __func__, | ||
| 558 | "new_ext_end(%u) should be less than or equal to " | ||
| 559 | "oext->ee_block(%u) + oext_alen(%d) - 1", | ||
| 560 | new_ext_end, le32_to_cpu(oext->ee_block), | ||
| 561 | oext_alen); | ||
| 562 | ret = -EIO; | ||
| 563 | goto out; | ||
| 564 | } | ||
| 523 | 565 | ||
| 524 | /* | 566 | /* |
| 525 | * Case: new_ext is smaller than original extent | 567 | * Case: new_ext is smaller than original extent |
| @@ -543,6 +585,7 @@ mext_leaf_block(handle_t *handle, struct inode *orig_inode, | |||
| 543 | 585 | ||
| 544 | ret = mext_insert_extents(handle, orig_inode, orig_path, o_start, | 586 | ret = mext_insert_extents(handle, orig_inode, orig_path, o_start, |
| 545 | o_end, &start_ext, &new_ext, &end_ext); | 587 | o_end, &start_ext, &new_ext, &end_ext); |
| 588 | out: | ||
| 546 | return ret; | 589 | return ret; |
| 547 | } | 590 | } |
| 548 | 591 | ||
| @@ -554,8 +597,10 @@ mext_leaf_block(handle_t *handle, struct inode *orig_inode, | |||
| 554 | * @orig_off: block offset of original inode | 597 | * @orig_off: block offset of original inode |
| 555 | * @donor_off: block offset of donor inode | 598 | * @donor_off: block offset of donor inode |
| 556 | * @max_count: the maximun length of extents | 599 | * @max_count: the maximun length of extents |
| 600 | * | ||
| 601 | * Return 0 on success, or a negative error value on failure. | ||
| 557 | */ | 602 | */ |
| 558 | static void | 603 | static int |
| 559 | mext_calc_swap_extents(struct ext4_extent *tmp_dext, | 604 | mext_calc_swap_extents(struct ext4_extent *tmp_dext, |
| 560 | struct ext4_extent *tmp_oext, | 605 | struct ext4_extent *tmp_oext, |
| 561 | ext4_lblk_t orig_off, ext4_lblk_t donor_off, | 606 | ext4_lblk_t orig_off, ext4_lblk_t donor_off, |
| @@ -564,6 +609,19 @@ mext_calc_swap_extents(struct ext4_extent *tmp_dext, | |||
| 564 | ext4_lblk_t diff, orig_diff; | 609 | ext4_lblk_t diff, orig_diff; |
| 565 | struct ext4_extent dext_old, oext_old; | 610 | struct ext4_extent dext_old, oext_old; |
| 566 | 611 | ||
| 612 | BUG_ON(orig_off != donor_off); | ||
| 613 | |||
| 614 | /* original and donor extents have to cover the same block offset */ | ||
| 615 | if (orig_off < le32_to_cpu(tmp_oext->ee_block) || | ||
| 616 | le32_to_cpu(tmp_oext->ee_block) + | ||
| 617 | ext4_ext_get_actual_len(tmp_oext) - 1 < orig_off) | ||
| 618 | return -ENODATA; | ||
| 619 | |||
| 620 | if (orig_off < le32_to_cpu(tmp_dext->ee_block) || | ||
| 621 | le32_to_cpu(tmp_dext->ee_block) + | ||
| 622 | ext4_ext_get_actual_len(tmp_dext) - 1 < orig_off) | ||
| 623 | return -ENODATA; | ||
| 624 | |||
| 567 | dext_old = *tmp_dext; | 625 | dext_old = *tmp_dext; |
| 568 | oext_old = *tmp_oext; | 626 | oext_old = *tmp_oext; |
| 569 | 627 | ||
| @@ -591,6 +649,8 @@ mext_calc_swap_extents(struct ext4_extent *tmp_dext, | |||
| 591 | 649 | ||
| 592 | copy_extent_status(&oext_old, tmp_dext); | 650 | copy_extent_status(&oext_old, tmp_dext); |
| 593 | copy_extent_status(&dext_old, tmp_oext); | 651 | copy_extent_status(&dext_old, tmp_oext); |
| 652 | |||
| 653 | return 0; | ||
| 594 | } | 654 | } |
| 595 | 655 | ||
| 596 | /** | 656 | /** |
| @@ -631,13 +691,13 @@ mext_replace_branches(handle_t *handle, struct inode *orig_inode, | |||
| 631 | mext_double_down_write(orig_inode, donor_inode); | 691 | mext_double_down_write(orig_inode, donor_inode); |
| 632 | 692 | ||
| 633 | /* Get the original extent for the block "orig_off" */ | 693 | /* Get the original extent for the block "orig_off" */ |
| 634 | get_ext_path(orig_path, orig_inode, orig_off, err); | 694 | err = get_ext_path(orig_inode, orig_off, &orig_path); |
| 635 | if (orig_path == NULL) | 695 | if (err) |
| 636 | goto out; | 696 | goto out; |
| 637 | 697 | ||
| 638 | /* Get the donor extent for the head */ | 698 | /* Get the donor extent for the head */ |
| 639 | get_ext_path(donor_path, donor_inode, donor_off, err); | 699 | err = get_ext_path(donor_inode, donor_off, &donor_path); |
| 640 | if (donor_path == NULL) | 700 | if (err) |
| 641 | goto out; | 701 | goto out; |
| 642 | depth = ext_depth(orig_inode); | 702 | depth = ext_depth(orig_inode); |
| 643 | oext = orig_path[depth].p_ext; | 703 | oext = orig_path[depth].p_ext; |
| @@ -647,13 +707,28 @@ mext_replace_branches(handle_t *handle, struct inode *orig_inode, | |||
| 647 | dext = donor_path[depth].p_ext; | 707 | dext = donor_path[depth].p_ext; |
| 648 | tmp_dext = *dext; | 708 | tmp_dext = *dext; |
| 649 | 709 | ||
| 650 | mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, | 710 | err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, |
| 651 | donor_off, count); | 711 | donor_off, count); |
| 712 | if (err) | ||
| 713 | goto out; | ||
| 652 | 714 | ||
| 653 | /* Loop for the donor extents */ | 715 | /* Loop for the donor extents */ |
| 654 | while (1) { | 716 | while (1) { |
| 655 | /* The extent for donor must be found. */ | 717 | /* The extent for donor must be found. */ |
| 656 | BUG_ON(!dext || donor_off != le32_to_cpu(tmp_dext.ee_block)); | 718 | if (!dext) { |
| 719 | ext4_error(donor_inode->i_sb, __func__, | ||
| 720 | "The extent for donor must be found"); | ||
| 721 | err = -EIO; | ||
| 722 | goto out; | ||
| 723 | } else if (donor_off != le32_to_cpu(tmp_dext.ee_block)) { | ||
| 724 | ext4_error(donor_inode->i_sb, __func__, | ||
| 725 | "Donor offset(%u) and the first block of donor " | ||
| 726 | "extent(%u) should be equal", | ||
| 727 | donor_off, | ||
| 728 | le32_to_cpu(tmp_dext.ee_block)); | ||
| 729 | err = -EIO; | ||
| 730 | goto out; | ||
| 731 | } | ||
| 657 | 732 | ||
| 658 | /* Set donor extent to orig extent */ | 733 | /* Set donor extent to orig extent */ |
| 659 | err = mext_leaf_block(handle, orig_inode, | 734 | err = mext_leaf_block(handle, orig_inode, |
| @@ -678,8 +753,8 @@ mext_replace_branches(handle_t *handle, struct inode *orig_inode, | |||
| 678 | 753 | ||
| 679 | if (orig_path) | 754 | if (orig_path) |
| 680 | ext4_ext_drop_refs(orig_path); | 755 | ext4_ext_drop_refs(orig_path); |
| 681 | get_ext_path(orig_path, orig_inode, orig_off, err); | 756 | err = get_ext_path(orig_inode, orig_off, &orig_path); |
| 682 | if (orig_path == NULL) | 757 | if (err) |
| 683 | goto out; | 758 | goto out; |
| 684 | depth = ext_depth(orig_inode); | 759 | depth = ext_depth(orig_inode); |
| 685 | oext = orig_path[depth].p_ext; | 760 | oext = orig_path[depth].p_ext; |
| @@ -692,9 +767,8 @@ mext_replace_branches(handle_t *handle, struct inode *orig_inode, | |||
| 692 | 767 | ||
| 693 | if (donor_path) | 768 | if (donor_path) |
| 694 | ext4_ext_drop_refs(donor_path); | 769 | ext4_ext_drop_refs(donor_path); |
| 695 | get_ext_path(donor_path, donor_inode, | 770 | err = get_ext_path(donor_inode, donor_off, &donor_path); |
| 696 | donor_off, err); | 771 | if (err) |
| 697 | if (donor_path == NULL) | ||
| 698 | goto out; | 772 | goto out; |
| 699 | depth = ext_depth(donor_inode); | 773 | depth = ext_depth(donor_inode); |
| 700 | dext = donor_path[depth].p_ext; | 774 | dext = donor_path[depth].p_ext; |
| @@ -705,9 +779,10 @@ mext_replace_branches(handle_t *handle, struct inode *orig_inode, | |||
| 705 | } | 779 | } |
| 706 | tmp_dext = *dext; | 780 | tmp_dext = *dext; |
| 707 | 781 | ||
| 708 | mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, | 782 | err = mext_calc_swap_extents(&tmp_dext, &tmp_oext, orig_off, |
| 709 | donor_off, | 783 | donor_off, count - replaced_count); |
| 710 | count - replaced_count); | 784 | if (err) |
| 785 | goto out; | ||
| 711 | } | 786 | } |
| 712 | 787 | ||
| 713 | out: | 788 | out: |
| @@ -740,7 +815,7 @@ out: | |||
| 740 | * on success, or a negative error value on failure. | 815 | * on success, or a negative error value on failure. |
| 741 | */ | 816 | */ |
| 742 | static int | 817 | static int |
| 743 | move_extent_par_page(struct file *o_filp, struct inode *donor_inode, | 818 | move_extent_per_page(struct file *o_filp, struct inode *donor_inode, |
| 744 | pgoff_t orig_page_offset, int data_offset_in_page, | 819 | pgoff_t orig_page_offset, int data_offset_in_page, |
| 745 | int block_len_in_page, int uninit) | 820 | int block_len_in_page, int uninit) |
| 746 | { | 821 | { |
| @@ -871,6 +946,7 @@ out: | |||
| 871 | if (PageLocked(page)) | 946 | if (PageLocked(page)) |
| 872 | unlock_page(page); | 947 | unlock_page(page); |
| 873 | page_cache_release(page); | 948 | page_cache_release(page); |
| 949 | ext4_journal_stop(handle); | ||
| 874 | } | 950 | } |
| 875 | out2: | 951 | out2: |
| 876 | ext4_journal_stop(handle); | 952 | ext4_journal_stop(handle); |
| @@ -897,6 +973,10 @@ mext_check_arguments(struct inode *orig_inode, | |||
| 897 | struct inode *donor_inode, __u64 orig_start, | 973 | struct inode *donor_inode, __u64 orig_start, |
| 898 | __u64 donor_start, __u64 *len, __u64 moved_len) | 974 | __u64 donor_start, __u64 *len, __u64 moved_len) |
| 899 | { | 975 | { |
| 976 | ext4_lblk_t orig_blocks, donor_blocks; | ||
| 977 | unsigned int blkbits = orig_inode->i_blkbits; | ||
| 978 | unsigned int blocksize = 1 << blkbits; | ||
| 979 | |||
| 900 | /* Regular file check */ | 980 | /* Regular file check */ |
| 901 | if (!S_ISREG(orig_inode->i_mode) || !S_ISREG(donor_inode->i_mode)) { | 981 | if (!S_ISREG(orig_inode->i_mode) || !S_ISREG(donor_inode->i_mode)) { |
| 902 | ext4_debug("ext4 move extent: The argument files should be " | 982 | ext4_debug("ext4 move extent: The argument files should be " |
| @@ -960,54 +1040,58 @@ mext_check_arguments(struct inode *orig_inode, | |||
| 960 | return -EINVAL; | 1040 | return -EINVAL; |
| 961 | } | 1041 | } |
| 962 | 1042 | ||
| 963 | if ((orig_start > MAX_DEFRAG_SIZE) || | 1043 | if ((orig_start > EXT_MAX_BLOCK) || |
| 964 | (donor_start > MAX_DEFRAG_SIZE) || | 1044 | (donor_start > EXT_MAX_BLOCK) || |
| 965 | (*len > MAX_DEFRAG_SIZE) || | 1045 | (*len > EXT_MAX_BLOCK) || |
| 966 | (orig_start + *len > MAX_DEFRAG_SIZE)) { | 1046 | (orig_start + *len > EXT_MAX_BLOCK)) { |
| 967 | ext4_debug("ext4 move extent: Can't handle over [%lu] blocks " | 1047 | ext4_debug("ext4 move extent: Can't handle over [%u] blocks " |
| 968 | "[ino:orig %lu, donor %lu]\n", MAX_DEFRAG_SIZE, | 1048 | "[ino:orig %lu, donor %lu]\n", EXT_MAX_BLOCK, |
| 969 | orig_inode->i_ino, donor_inode->i_ino); | 1049 | orig_inode->i_ino, donor_inode->i_ino); |
| 970 | return -EINVAL; | 1050 | return -EINVAL; |
| 971 | } | 1051 | } |
| 972 | 1052 | ||
| 973 | if (orig_inode->i_size > donor_inode->i_size) { | 1053 | if (orig_inode->i_size > donor_inode->i_size) { |
| 974 | if (orig_start >= donor_inode->i_size) { | 1054 | donor_blocks = (donor_inode->i_size + blocksize - 1) >> blkbits; |
| 1055 | /* TODO: eliminate this artificial restriction */ | ||
| 1056 | if (orig_start >= donor_blocks) { | ||
| 975 | ext4_debug("ext4 move extent: orig start offset " | 1057 | ext4_debug("ext4 move extent: orig start offset " |
| 976 | "[%llu] should be less than donor file size " | 1058 | "[%llu] should be less than donor file blocks " |
| 977 | "[%lld] [ino:orig %lu, donor_inode %lu]\n", | 1059 | "[%u] [ino:orig %lu, donor %lu]\n", |
| 978 | orig_start, donor_inode->i_size, | 1060 | orig_start, donor_blocks, |
| 979 | orig_inode->i_ino, donor_inode->i_ino); | 1061 | orig_inode->i_ino, donor_inode->i_ino); |
| 980 | return -EINVAL; | 1062 | return -EINVAL; |
| 981 | } | 1063 | } |
| 982 | 1064 | ||
| 983 | if (orig_start + *len > donor_inode->i_size) { | 1065 | /* TODO: eliminate this artificial restriction */ |
| 1066 | if (orig_start + *len > donor_blocks) { | ||
| 984 | ext4_debug("ext4 move extent: End offset [%llu] should " | 1067 | ext4_debug("ext4 move extent: End offset [%llu] should " |
| 985 | "be less than donor file size [%lld]." | 1068 | "be less than donor file blocks [%u]." |
| 986 | "So adjust length from %llu to %lld " | 1069 | "So adjust length from %llu to %llu " |
| 987 | "[ino:orig %lu, donor %lu]\n", | 1070 | "[ino:orig %lu, donor %lu]\n", |
| 988 | orig_start + *len, donor_inode->i_size, | 1071 | orig_start + *len, donor_blocks, |
| 989 | *len, donor_inode->i_size - orig_start, | 1072 | *len, donor_blocks - orig_start, |
| 990 | orig_inode->i_ino, donor_inode->i_ino); | 1073 | orig_inode->i_ino, donor_inode->i_ino); |
| 991 | *len = donor_inode->i_size - orig_start; | 1074 | *len = donor_blocks - orig_start; |
| 992 | } | 1075 | } |
| 993 | } else { | 1076 | } else { |
| 994 | if (orig_start >= orig_inode->i_size) { | 1077 | orig_blocks = (orig_inode->i_size + blocksize - 1) >> blkbits; |
| 1078 | if (orig_start >= orig_blocks) { | ||
| 995 | ext4_debug("ext4 move extent: start offset [%llu] " | 1079 | ext4_debug("ext4 move extent: start offset [%llu] " |
| 996 | "should be less than original file size " | 1080 | "should be less than original file blocks " |
| 997 | "[%lld] [inode:orig %lu, donor %lu]\n", | 1081 | "[%u] [ino:orig %lu, donor %lu]\n", |
| 998 | orig_start, orig_inode->i_size, | 1082 | orig_start, orig_blocks, |
| 999 | orig_inode->i_ino, donor_inode->i_ino); | 1083 | orig_inode->i_ino, donor_inode->i_ino); |
| 1000 | return -EINVAL; | 1084 | return -EINVAL; |
| 1001 | } | 1085 | } |
| 1002 | 1086 | ||
| 1003 | if (orig_start + *len > orig_inode->i_size) { | 1087 | if (orig_start + *len > orig_blocks) { |
| 1004 | ext4_debug("ext4 move extent: Adjust length " | 1088 | ext4_debug("ext4 move extent: Adjust length " |
| 1005 | "from %llu to %lld. Because it should be " | 1089 | "from %llu to %llu. Because it should be " |
| 1006 | "less than original file size " | 1090 | "less than original file blocks " |
| 1007 | "[ino:orig %lu, donor %lu]\n", | 1091 | "[ino:orig %lu, donor %lu]\n", |
| 1008 | *len, orig_inode->i_size - orig_start, | 1092 | *len, orig_blocks - orig_start, |
| 1009 | orig_inode->i_ino, donor_inode->i_ino); | 1093 | orig_inode->i_ino, donor_inode->i_ino); |
| 1010 | *len = orig_inode->i_size - orig_start; | 1094 | *len = orig_blocks - orig_start; |
| 1011 | } | 1095 | } |
| 1012 | } | 1096 | } |
| 1013 | 1097 | ||
| @@ -1027,18 +1111,23 @@ mext_check_arguments(struct inode *orig_inode, | |||
| 1027 | * @inode1: the inode structure | 1111 | * @inode1: the inode structure |
| 1028 | * @inode2: the inode structure | 1112 | * @inode2: the inode structure |
| 1029 | * | 1113 | * |
| 1030 | * Lock two inodes' i_mutex by i_ino order. This function is moved from | 1114 | * Lock two inodes' i_mutex by i_ino order. |
| 1031 | * fs/inode.c. | 1115 | * If inode1 or inode2 is NULL, return -EIO. Otherwise, return 0. |
| 1032 | */ | 1116 | */ |
| 1033 | static void | 1117 | static int |
| 1034 | mext_inode_double_lock(struct inode *inode1, struct inode *inode2) | 1118 | mext_inode_double_lock(struct inode *inode1, struct inode *inode2) |
| 1035 | { | 1119 | { |
| 1036 | if (inode1 == NULL || inode2 == NULL || inode1 == inode2) { | 1120 | int ret = 0; |
| 1037 | if (inode1) | 1121 | |
| 1038 | mutex_lock(&inode1->i_mutex); | 1122 | BUG_ON(inode1 == NULL && inode2 == NULL); |
| 1039 | else if (inode2) | 1123 | |
| 1040 | mutex_lock(&inode2->i_mutex); | 1124 | ret = mext_check_null_inode(inode1, inode2, __func__); |
| 1041 | return; | 1125 | if (ret < 0) |
| 1126 | goto out; | ||
| 1127 | |||
| 1128 | if (inode1 == inode2) { | ||
| 1129 | mutex_lock(&inode1->i_mutex); | ||
| 1130 | goto out; | ||
| 1042 | } | 1131 | } |
| 1043 | 1132 | ||
| 1044 | if (inode1->i_ino < inode2->i_ino) { | 1133 | if (inode1->i_ino < inode2->i_ino) { |
| @@ -1048,6 +1137,9 @@ mext_inode_double_lock(struct inode *inode1, struct inode *inode2) | |||
| 1048 | mutex_lock_nested(&inode2->i_mutex, I_MUTEX_PARENT); | 1137 | mutex_lock_nested(&inode2->i_mutex, I_MUTEX_PARENT); |
| 1049 | mutex_lock_nested(&inode1->i_mutex, I_MUTEX_CHILD); | 1138 | mutex_lock_nested(&inode1->i_mutex, I_MUTEX_CHILD); |
| 1050 | } | 1139 | } |
| 1140 | |||
| 1141 | out: | ||
| 1142 | return ret; | ||
| 1051 | } | 1143 | } |
| 1052 | 1144 | ||
| 1053 | /** | 1145 | /** |
| @@ -1056,17 +1148,28 @@ mext_inode_double_lock(struct inode *inode1, struct inode *inode2) | |||
| 1056 | * @inode1: the inode that is released first | 1148 | * @inode1: the inode that is released first |
| 1057 | * @inode2: the inode that is released second | 1149 | * @inode2: the inode that is released second |
| 1058 | * | 1150 | * |
| 1059 | * This function is moved from fs/inode.c. | 1151 | * If inode1 or inode2 is NULL, return -EIO. Otherwise, return 0. |
| 1060 | */ | 1152 | */ |
| 1061 | 1153 | ||
| 1062 | static void | 1154 | static int |
| 1063 | mext_inode_double_unlock(struct inode *inode1, struct inode *inode2) | 1155 | mext_inode_double_unlock(struct inode *inode1, struct inode *inode2) |
| 1064 | { | 1156 | { |
| 1157 | int ret = 0; | ||
| 1158 | |||
| 1159 | BUG_ON(inode1 == NULL && inode2 == NULL); | ||
| 1160 | |||
| 1161 | ret = mext_check_null_inode(inode1, inode2, __func__); | ||
| 1162 | if (ret < 0) | ||
| 1163 | goto out; | ||
| 1164 | |||
| 1065 | if (inode1) | 1165 | if (inode1) |
| 1066 | mutex_unlock(&inode1->i_mutex); | 1166 | mutex_unlock(&inode1->i_mutex); |
| 1067 | 1167 | ||
| 1068 | if (inode2 && inode2 != inode1) | 1168 | if (inode2 && inode2 != inode1) |
| 1069 | mutex_unlock(&inode2->i_mutex); | 1169 | mutex_unlock(&inode2->i_mutex); |
| 1170 | |||
| 1171 | out: | ||
| 1172 | return ret; | ||
| 1070 | } | 1173 | } |
| 1071 | 1174 | ||
| 1072 | /** | 1175 | /** |
| @@ -1123,70 +1226,76 @@ ext4_move_extents(struct file *o_filp, struct file *d_filp, | |||
| 1123 | ext4_lblk_t block_end, seq_start, add_blocks, file_end, seq_blocks = 0; | 1226 | ext4_lblk_t block_end, seq_start, add_blocks, file_end, seq_blocks = 0; |
| 1124 | ext4_lblk_t rest_blocks; | 1227 | ext4_lblk_t rest_blocks; |
| 1125 | pgoff_t orig_page_offset = 0, seq_end_page; | 1228 | pgoff_t orig_page_offset = 0, seq_end_page; |
| 1126 | int ret, depth, last_extent = 0; | 1229 | int ret1, ret2, depth, last_extent = 0; |
| 1127 | int blocks_per_page = PAGE_CACHE_SIZE >> orig_inode->i_blkbits; | 1230 | int blocks_per_page = PAGE_CACHE_SIZE >> orig_inode->i_blkbits; |
| 1128 | int data_offset_in_page; | 1231 | int data_offset_in_page; |
| 1129 | int block_len_in_page; | 1232 | int block_len_in_page; |
| 1130 | int uninit; | 1233 | int uninit; |
| 1131 | 1234 | ||
| 1132 | /* protect orig and donor against a truncate */ | 1235 | /* protect orig and donor against a truncate */ |
| 1133 | mext_inode_double_lock(orig_inode, donor_inode); | 1236 | ret1 = mext_inode_double_lock(orig_inode, donor_inode); |
| 1237 | if (ret1 < 0) | ||
| 1238 | return ret1; | ||
| 1134 | 1239 | ||
| 1135 | mext_double_down_read(orig_inode, donor_inode); | 1240 | mext_double_down_read(orig_inode, donor_inode); |
| 1136 | /* Check the filesystem environment whether move_extent can be done */ | 1241 | /* Check the filesystem environment whether move_extent can be done */ |
| 1137 | ret = mext_check_arguments(orig_inode, donor_inode, orig_start, | 1242 | ret1 = mext_check_arguments(orig_inode, donor_inode, orig_start, |
| 1138 | donor_start, &len, *moved_len); | 1243 | donor_start, &len, *moved_len); |
| 1139 | mext_double_up_read(orig_inode, donor_inode); | 1244 | mext_double_up_read(orig_inode, donor_inode); |
| 1140 | if (ret) | 1245 | if (ret1) |
| 1141 | goto out2; | 1246 | goto out; |
| 1142 | 1247 | ||
| 1143 | file_end = (i_size_read(orig_inode) - 1) >> orig_inode->i_blkbits; | 1248 | file_end = (i_size_read(orig_inode) - 1) >> orig_inode->i_blkbits; |
| 1144 | block_end = block_start + len - 1; | 1249 | block_end = block_start + len - 1; |
| 1145 | if (file_end < block_end) | 1250 | if (file_end < block_end) |
| 1146 | len -= block_end - file_end; | 1251 | len -= block_end - file_end; |
| 1147 | 1252 | ||
| 1148 | get_ext_path(orig_path, orig_inode, block_start, ret); | 1253 | ret1 = get_ext_path(orig_inode, block_start, &orig_path); |
| 1149 | if (orig_path == NULL) | 1254 | if (ret1) |
| 1150 | goto out2; | 1255 | goto out; |
| 1151 | 1256 | ||
| 1152 | /* Get path structure to check the hole */ | 1257 | /* Get path structure to check the hole */ |
| 1153 | get_ext_path(holecheck_path, orig_inode, block_start, ret); | 1258 | ret1 = get_ext_path(orig_inode, block_start, &holecheck_path); |
| 1154 | if (holecheck_path == NULL) | 1259 | if (ret1) |
| 1155 | goto out; | 1260 | goto out; |
| 1156 | 1261 | ||
| 1157 | depth = ext_depth(orig_inode); | 1262 | depth = ext_depth(orig_inode); |
| 1158 | ext_cur = holecheck_path[depth].p_ext; | 1263 | ext_cur = holecheck_path[depth].p_ext; |
| 1159 | if (ext_cur == NULL) { | ||
| 1160 | ret = -EINVAL; | ||
| 1161 | goto out; | ||
| 1162 | } | ||
| 1163 | 1264 | ||
| 1164 | /* | 1265 | /* |
| 1165 | * Get proper extent whose ee_block is beyond block_start | 1266 | * Get proper starting location of block replacement if block_start was |
| 1166 | * if block_start was within the hole. | 1267 | * within the hole. |
| 1167 | */ | 1268 | */ |
| 1168 | if (le32_to_cpu(ext_cur->ee_block) + | 1269 | if (le32_to_cpu(ext_cur->ee_block) + |
| 1169 | ext4_ext_get_actual_len(ext_cur) - 1 < block_start) { | 1270 | ext4_ext_get_actual_len(ext_cur) - 1 < block_start) { |
| 1271 | /* | ||
| 1272 | * The hole exists between extents or the tail of | ||
| 1273 | * original file. | ||
| 1274 | */ | ||
| 1170 | last_extent = mext_next_extent(orig_inode, | 1275 | last_extent = mext_next_extent(orig_inode, |
| 1171 | holecheck_path, &ext_cur); | 1276 | holecheck_path, &ext_cur); |
| 1172 | if (last_extent < 0) { | 1277 | if (last_extent < 0) { |
| 1173 | ret = last_extent; | 1278 | ret1 = last_extent; |
| 1174 | goto out; | 1279 | goto out; |
| 1175 | } | 1280 | } |
| 1176 | last_extent = mext_next_extent(orig_inode, orig_path, | 1281 | last_extent = mext_next_extent(orig_inode, orig_path, |
| 1177 | &ext_dummy); | 1282 | &ext_dummy); |
| 1178 | if (last_extent < 0) { | 1283 | if (last_extent < 0) { |
| 1179 | ret = last_extent; | 1284 | ret1 = last_extent; |
| 1180 | goto out; | 1285 | goto out; |
| 1181 | } | 1286 | } |
| 1182 | } | 1287 | seq_start = le32_to_cpu(ext_cur->ee_block); |
| 1183 | seq_start = block_start; | 1288 | } else if (le32_to_cpu(ext_cur->ee_block) > block_start) |
| 1289 | /* The hole exists at the beginning of original file. */ | ||
| 1290 | seq_start = le32_to_cpu(ext_cur->ee_block); | ||
| 1291 | else | ||
| 1292 | seq_start = block_start; | ||
| 1184 | 1293 | ||
| 1185 | /* No blocks within the specified range. */ | 1294 | /* No blocks within the specified range. */ |
| 1186 | if (le32_to_cpu(ext_cur->ee_block) > block_end) { | 1295 | if (le32_to_cpu(ext_cur->ee_block) > block_end) { |
| 1187 | ext4_debug("ext4 move extent: The specified range of file " | 1296 | ext4_debug("ext4 move extent: The specified range of file " |
| 1188 | "may be the hole\n"); | 1297 | "may be the hole\n"); |
| 1189 | ret = -EINVAL; | 1298 | ret1 = -EINVAL; |
| 1190 | goto out; | 1299 | goto out; |
| 1191 | } | 1300 | } |
| 1192 | 1301 | ||
| @@ -1206,7 +1315,7 @@ ext4_move_extents(struct file *o_filp, struct file *d_filp, | |||
| 1206 | last_extent = mext_next_extent(orig_inode, holecheck_path, | 1315 | last_extent = mext_next_extent(orig_inode, holecheck_path, |
| 1207 | &ext_cur); | 1316 | &ext_cur); |
| 1208 | if (last_extent < 0) { | 1317 | if (last_extent < 0) { |
| 1209 | ret = last_extent; | 1318 | ret1 = last_extent; |
| 1210 | break; | 1319 | break; |
| 1211 | } | 1320 | } |
| 1212 | add_blocks = ext4_ext_get_actual_len(ext_cur); | 1321 | add_blocks = ext4_ext_get_actual_len(ext_cur); |
| @@ -1258,16 +1367,23 @@ ext4_move_extents(struct file *o_filp, struct file *d_filp, | |||
| 1258 | while (orig_page_offset <= seq_end_page) { | 1367 | while (orig_page_offset <= seq_end_page) { |
| 1259 | 1368 | ||
| 1260 | /* Swap original branches with new branches */ | 1369 | /* Swap original branches with new branches */ |
| 1261 | ret = move_extent_par_page(o_filp, donor_inode, | 1370 | ret1 = move_extent_per_page(o_filp, donor_inode, |
| 1262 | orig_page_offset, | 1371 | orig_page_offset, |
| 1263 | data_offset_in_page, | 1372 | data_offset_in_page, |
| 1264 | block_len_in_page, uninit); | 1373 | block_len_in_page, uninit); |
| 1265 | if (ret < 0) | 1374 | if (ret1 < 0) |
| 1266 | goto out; | 1375 | goto out; |
| 1267 | orig_page_offset++; | 1376 | orig_page_offset++; |
| 1268 | /* Count how many blocks we have exchanged */ | 1377 | /* Count how many blocks we have exchanged */ |
| 1269 | *moved_len += block_len_in_page; | 1378 | *moved_len += block_len_in_page; |
| 1270 | BUG_ON(*moved_len > len); | 1379 | if (*moved_len > len) { |
| 1380 | ext4_error(orig_inode->i_sb, __func__, | ||
| 1381 | "We replaced blocks too much! " | ||
| 1382 | "sum of replaced: %llu requested: %llu", | ||
| 1383 | *moved_len, len); | ||
| 1384 | ret1 = -EIO; | ||
| 1385 | goto out; | ||
| 1386 | } | ||
| 1271 | 1387 | ||
| 1272 | data_offset_in_page = 0; | 1388 | data_offset_in_page = 0; |
| 1273 | rest_blocks -= block_len_in_page; | 1389 | rest_blocks -= block_len_in_page; |
| @@ -1280,17 +1396,16 @@ ext4_move_extents(struct file *o_filp, struct file *d_filp, | |||
| 1280 | /* Decrease buffer counter */ | 1396 | /* Decrease buffer counter */ |
| 1281 | if (holecheck_path) | 1397 | if (holecheck_path) |
| 1282 | ext4_ext_drop_refs(holecheck_path); | 1398 | ext4_ext_drop_refs(holecheck_path); |
| 1283 | get_ext_path(holecheck_path, orig_inode, | 1399 | ret1 = get_ext_path(orig_inode, seq_start, &holecheck_path); |
| 1284 | seq_start, ret); | 1400 | if (ret1) |
| 1285 | if (holecheck_path == NULL) | ||
| 1286 | break; | 1401 | break; |
| 1287 | depth = holecheck_path->p_depth; | 1402 | depth = holecheck_path->p_depth; |
| 1288 | 1403 | ||
| 1289 | /* Decrease buffer counter */ | 1404 | /* Decrease buffer counter */ |
| 1290 | if (orig_path) | 1405 | if (orig_path) |
| 1291 | ext4_ext_drop_refs(orig_path); | 1406 | ext4_ext_drop_refs(orig_path); |
| 1292 | get_ext_path(orig_path, orig_inode, seq_start, ret); | 1407 | ret1 = get_ext_path(orig_inode, seq_start, &orig_path); |
| 1293 | if (orig_path == NULL) | 1408 | if (ret1) |
| 1294 | break; | 1409 | break; |
| 1295 | 1410 | ||
| 1296 | ext_cur = holecheck_path[depth].p_ext; | 1411 | ext_cur = holecheck_path[depth].p_ext; |
| @@ -1307,14 +1422,13 @@ out: | |||
| 1307 | ext4_ext_drop_refs(holecheck_path); | 1422 | ext4_ext_drop_refs(holecheck_path); |
| 1308 | kfree(holecheck_path); | 1423 | kfree(holecheck_path); |
| 1309 | } | 1424 | } |
| 1310 | out2: | ||
| 1311 | mext_inode_double_unlock(orig_inode, donor_inode); | ||
| 1312 | 1425 | ||
| 1313 | if (ret) | 1426 | ret2 = mext_inode_double_unlock(orig_inode, donor_inode); |
| 1314 | return ret; | ||
| 1315 | 1427 | ||
| 1316 | /* All of the specified blocks must be exchanged in succeed */ | 1428 | if (ret1) |
| 1317 | BUG_ON(*moved_len != len); | 1429 | return ret1; |
| 1430 | else if (ret2) | ||
| 1431 | return ret2; | ||
| 1318 | 1432 | ||
| 1319 | return 0; | 1433 | return 0; |
| 1320 | } | 1434 | } |
diff --git a/fs/ext4/namei.c b/fs/ext4/namei.c index 114abe5d2c1d..42f81d285cd5 100644 --- a/fs/ext4/namei.c +++ b/fs/ext4/namei.c | |||
| @@ -1518,8 +1518,12 @@ static int ext4_add_entry(handle_t *handle, struct dentry *dentry, | |||
| 1518 | return retval; | 1518 | return retval; |
| 1519 | 1519 | ||
| 1520 | if (blocks == 1 && !dx_fallback && | 1520 | if (blocks == 1 && !dx_fallback && |
| 1521 | EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_DIR_INDEX)) | 1521 | EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_DIR_INDEX)) { |
| 1522 | return make_indexed_dir(handle, dentry, inode, bh); | 1522 | retval = make_indexed_dir(handle, dentry, inode, bh); |
| 1523 | if (retval == -ENOSPC) | ||
| 1524 | brelse(bh); | ||
| 1525 | return retval; | ||
| 1526 | } | ||
| 1523 | brelse(bh); | 1527 | brelse(bh); |
| 1524 | } | 1528 | } |
| 1525 | bh = ext4_append(handle, dir, &block, &retval); | 1529 | bh = ext4_append(handle, dir, &block, &retval); |
| @@ -1528,7 +1532,10 @@ static int ext4_add_entry(handle_t *handle, struct dentry *dentry, | |||
| 1528 | de = (struct ext4_dir_entry_2 *) bh->b_data; | 1532 | de = (struct ext4_dir_entry_2 *) bh->b_data; |
| 1529 | de->inode = 0; | 1533 | de->inode = 0; |
| 1530 | de->rec_len = ext4_rec_len_to_disk(blocksize, blocksize); | 1534 | de->rec_len = ext4_rec_len_to_disk(blocksize, blocksize); |
| 1531 | return add_dirent_to_buf(handle, dentry, inode, de, bh); | 1535 | retval = add_dirent_to_buf(handle, dentry, inode, de, bh); |
| 1536 | if (retval == -ENOSPC) | ||
| 1537 | brelse(bh); | ||
| 1538 | return retval; | ||
| 1532 | } | 1539 | } |
| 1533 | 1540 | ||
| 1534 | /* | 1541 | /* |
| @@ -1590,9 +1597,9 @@ static int ext4_dx_add_entry(handle_t *handle, struct dentry *dentry, | |||
| 1590 | goto cleanup; | 1597 | goto cleanup; |
| 1591 | node2 = (struct dx_node *)(bh2->b_data); | 1598 | node2 = (struct dx_node *)(bh2->b_data); |
| 1592 | entries2 = node2->entries; | 1599 | entries2 = node2->entries; |
| 1600 | memset(&node2->fake, 0, sizeof(struct fake_dirent)); | ||
| 1593 | node2->fake.rec_len = ext4_rec_len_to_disk(sb->s_blocksize, | 1601 | node2->fake.rec_len = ext4_rec_len_to_disk(sb->s_blocksize, |
| 1594 | sb->s_blocksize); | 1602 | sb->s_blocksize); |
| 1595 | node2->fake.inode = 0; | ||
| 1596 | BUFFER_TRACE(frame->bh, "get_write_access"); | 1603 | BUFFER_TRACE(frame->bh, "get_write_access"); |
| 1597 | err = ext4_journal_get_write_access(handle, frame->bh); | 1604 | err = ext4_journal_get_write_access(handle, frame->bh); |
| 1598 | if (err) | 1605 | if (err) |
| @@ -1657,7 +1664,8 @@ static int ext4_dx_add_entry(handle_t *handle, struct dentry *dentry, | |||
| 1657 | if (!de) | 1664 | if (!de) |
| 1658 | goto cleanup; | 1665 | goto cleanup; |
| 1659 | err = add_dirent_to_buf(handle, dentry, inode, de, bh); | 1666 | err = add_dirent_to_buf(handle, dentry, inode, de, bh); |
| 1660 | bh = NULL; | 1667 | if (err != -ENOSPC) |
| 1668 | bh = NULL; | ||
| 1661 | goto cleanup; | 1669 | goto cleanup; |
| 1662 | 1670 | ||
| 1663 | journal_error: | 1671 | journal_error: |
| @@ -2310,7 +2318,7 @@ static int ext4_link(struct dentry *old_dentry, | |||
| 2310 | struct inode *inode = old_dentry->d_inode; | 2318 | struct inode *inode = old_dentry->d_inode; |
| 2311 | int err, retries = 0; | 2319 | int err, retries = 0; |
| 2312 | 2320 | ||
| 2313 | if (EXT4_DIR_LINK_MAX(inode)) | 2321 | if (inode->i_nlink >= EXT4_LINK_MAX) |
| 2314 | return -EMLINK; | 2322 | return -EMLINK; |
| 2315 | 2323 | ||
| 2316 | /* | 2324 | /* |
| @@ -2413,7 +2421,7 @@ static int ext4_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
| 2413 | goto end_rename; | 2421 | goto end_rename; |
| 2414 | retval = -EMLINK; | 2422 | retval = -EMLINK; |
| 2415 | if (!new_inode && new_dir != old_dir && | 2423 | if (!new_inode && new_dir != old_dir && |
| 2416 | new_dir->i_nlink >= EXT4_LINK_MAX) | 2424 | EXT4_DIR_LINK_MAX(new_dir)) |
| 2417 | goto end_rename; | 2425 | goto end_rename; |
| 2418 | } | 2426 | } |
| 2419 | if (!new_bh) { | 2427 | if (!new_bh) { |
diff --git a/fs/ext4/resize.c b/fs/ext4/resize.c index 68b0351fc647..3cfc343c41b5 100644 --- a/fs/ext4/resize.c +++ b/fs/ext4/resize.c | |||
| @@ -746,7 +746,6 @@ int ext4_group_add(struct super_block *sb, struct ext4_new_group_data *input) | |||
| 746 | struct inode *inode = NULL; | 746 | struct inode *inode = NULL; |
| 747 | handle_t *handle; | 747 | handle_t *handle; |
| 748 | int gdb_off, gdb_num; | 748 | int gdb_off, gdb_num; |
| 749 | int num_grp_locked = 0; | ||
| 750 | int err, err2; | 749 | int err, err2; |
| 751 | 750 | ||
| 752 | gdb_num = input->group / EXT4_DESC_PER_BLOCK(sb); | 751 | gdb_num = input->group / EXT4_DESC_PER_BLOCK(sb); |
| @@ -856,7 +855,6 @@ int ext4_group_add(struct super_block *sb, struct ext4_new_group_data *input) | |||
| 856 | * using the new disk blocks. | 855 | * using the new disk blocks. |
| 857 | */ | 856 | */ |
| 858 | 857 | ||
| 859 | num_grp_locked = ext4_mb_get_buddy_cache_lock(sb, input->group); | ||
| 860 | /* Update group descriptor block for new group */ | 858 | /* Update group descriptor block for new group */ |
| 861 | gdp = (struct ext4_group_desc *)((char *)primary->b_data + | 859 | gdp = (struct ext4_group_desc *)((char *)primary->b_data + |
| 862 | gdb_off * EXT4_DESC_SIZE(sb)); | 860 | gdb_off * EXT4_DESC_SIZE(sb)); |
| @@ -875,10 +873,8 @@ int ext4_group_add(struct super_block *sb, struct ext4_new_group_data *input) | |||
| 875 | * descriptor | 873 | * descriptor |
| 876 | */ | 874 | */ |
| 877 | err = ext4_mb_add_groupinfo(sb, input->group, gdp); | 875 | err = ext4_mb_add_groupinfo(sb, input->group, gdp); |
| 878 | if (err) { | 876 | if (err) |
| 879 | ext4_mb_put_buddy_cache_lock(sb, input->group, num_grp_locked); | ||
| 880 | goto exit_journal; | 877 | goto exit_journal; |
| 881 | } | ||
| 882 | 878 | ||
| 883 | /* | 879 | /* |
| 884 | * Make the new blocks and inodes valid next. We do this before | 880 | * Make the new blocks and inodes valid next. We do this before |
| @@ -920,7 +916,6 @@ int ext4_group_add(struct super_block *sb, struct ext4_new_group_data *input) | |||
| 920 | 916 | ||
| 921 | /* Update the global fs size fields */ | 917 | /* Update the global fs size fields */ |
| 922 | sbi->s_groups_count++; | 918 | sbi->s_groups_count++; |
| 923 | ext4_mb_put_buddy_cache_lock(sb, input->group, num_grp_locked); | ||
| 924 | 919 | ||
| 925 | ext4_handle_dirty_metadata(handle, NULL, primary); | 920 | ext4_handle_dirty_metadata(handle, NULL, primary); |
| 926 | 921 | ||
diff --git a/fs/ext4/super.c b/fs/ext4/super.c index 8f4f079e6b9a..a6b1ab734728 100644 --- a/fs/ext4/super.c +++ b/fs/ext4/super.c | |||
| @@ -45,6 +45,7 @@ | |||
| 45 | #include "ext4_jbd2.h" | 45 | #include "ext4_jbd2.h" |
| 46 | #include "xattr.h" | 46 | #include "xattr.h" |
| 47 | #include "acl.h" | 47 | #include "acl.h" |
| 48 | #include "mballoc.h" | ||
| 48 | 49 | ||
| 49 | #define CREATE_TRACE_POINTS | 50 | #define CREATE_TRACE_POINTS |
| 50 | #include <trace/events/ext4.h> | 51 | #include <trace/events/ext4.h> |
| @@ -344,7 +345,8 @@ static const char *ext4_decode_error(struct super_block *sb, int errno, | |||
| 344 | errstr = "Out of memory"; | 345 | errstr = "Out of memory"; |
| 345 | break; | 346 | break; |
| 346 | case -EROFS: | 347 | case -EROFS: |
| 347 | if (!sb || EXT4_SB(sb)->s_journal->j_flags & JBD2_ABORT) | 348 | if (!sb || (EXT4_SB(sb)->s_journal && |
| 349 | EXT4_SB(sb)->s_journal->j_flags & JBD2_ABORT)) | ||
| 348 | errstr = "Journal has aborted"; | 350 | errstr = "Journal has aborted"; |
| 349 | else | 351 | else |
| 350 | errstr = "Readonly filesystem"; | 352 | errstr = "Readonly filesystem"; |
| @@ -1279,11 +1281,9 @@ static int parse_options(char *options, struct super_block *sb, | |||
| 1279 | *journal_devnum = option; | 1281 | *journal_devnum = option; |
| 1280 | break; | 1282 | break; |
| 1281 | case Opt_journal_checksum: | 1283 | case Opt_journal_checksum: |
| 1282 | set_opt(sbi->s_mount_opt, JOURNAL_CHECKSUM); | 1284 | break; /* Kept for backwards compatibility */ |
| 1283 | break; | ||
| 1284 | case Opt_journal_async_commit: | 1285 | case Opt_journal_async_commit: |
| 1285 | set_opt(sbi->s_mount_opt, JOURNAL_ASYNC_COMMIT); | 1286 | set_opt(sbi->s_mount_opt, JOURNAL_ASYNC_COMMIT); |
| 1286 | set_opt(sbi->s_mount_opt, JOURNAL_CHECKSUM); | ||
| 1287 | break; | 1287 | break; |
| 1288 | case Opt_noload: | 1288 | case Opt_noload: |
| 1289 | set_opt(sbi->s_mount_opt, NOLOAD); | 1289 | set_opt(sbi->s_mount_opt, NOLOAD); |
| @@ -1695,12 +1695,12 @@ static int ext4_fill_flex_info(struct super_block *sb) | |||
| 1695 | gdp = ext4_get_group_desc(sb, i, NULL); | 1695 | gdp = ext4_get_group_desc(sb, i, NULL); |
| 1696 | 1696 | ||
| 1697 | flex_group = ext4_flex_group(sbi, i); | 1697 | flex_group = ext4_flex_group(sbi, i); |
| 1698 | atomic_set(&sbi->s_flex_groups[flex_group].free_inodes, | 1698 | atomic_add(ext4_free_inodes_count(sb, gdp), |
| 1699 | ext4_free_inodes_count(sb, gdp)); | 1699 | &sbi->s_flex_groups[flex_group].free_inodes); |
| 1700 | atomic_set(&sbi->s_flex_groups[flex_group].free_blocks, | 1700 | atomic_add(ext4_free_blks_count(sb, gdp), |
| 1701 | ext4_free_blks_count(sb, gdp)); | 1701 | &sbi->s_flex_groups[flex_group].free_blocks); |
| 1702 | atomic_set(&sbi->s_flex_groups[flex_group].used_dirs, | 1702 | atomic_add(ext4_used_dirs_count(sb, gdp), |
| 1703 | ext4_used_dirs_count(sb, gdp)); | 1703 | &sbi->s_flex_groups[flex_group].used_dirs); |
| 1704 | } | 1704 | } |
| 1705 | 1705 | ||
| 1706 | return 1; | 1706 | return 1; |
| @@ -2253,6 +2253,49 @@ static struct kobj_type ext4_ktype = { | |||
| 2253 | .release = ext4_sb_release, | 2253 | .release = ext4_sb_release, |
| 2254 | }; | 2254 | }; |
| 2255 | 2255 | ||
| 2256 | /* | ||
| 2257 | * Check whether this filesystem can be mounted based on | ||
| 2258 | * the features present and the RDONLY/RDWR mount requested. | ||
| 2259 | * Returns 1 if this filesystem can be mounted as requested, | ||
| 2260 | * 0 if it cannot be. | ||
| 2261 | */ | ||
| 2262 | static int ext4_feature_set_ok(struct super_block *sb, int readonly) | ||
| 2263 | { | ||
| 2264 | if (EXT4_HAS_INCOMPAT_FEATURE(sb, ~EXT4_FEATURE_INCOMPAT_SUPP)) { | ||
| 2265 | ext4_msg(sb, KERN_ERR, | ||
| 2266 | "Couldn't mount because of " | ||
| 2267 | "unsupported optional features (%x)", | ||
| 2268 | (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_incompat) & | ||
| 2269 | ~EXT4_FEATURE_INCOMPAT_SUPP)); | ||
| 2270 | return 0; | ||
| 2271 | } | ||
| 2272 | |||
| 2273 | if (readonly) | ||
| 2274 | return 1; | ||
| 2275 | |||
| 2276 | /* Check that feature set is OK for a read-write mount */ | ||
| 2277 | if (EXT4_HAS_RO_COMPAT_FEATURE(sb, ~EXT4_FEATURE_RO_COMPAT_SUPP)) { | ||
| 2278 | ext4_msg(sb, KERN_ERR, "couldn't mount RDWR because of " | ||
| 2279 | "unsupported optional features (%x)", | ||
| 2280 | (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_ro_compat) & | ||
| 2281 | ~EXT4_FEATURE_RO_COMPAT_SUPP)); | ||
| 2282 | return 0; | ||
| 2283 | } | ||
| 2284 | /* | ||
| 2285 | * Large file size enabled file system can only be mounted | ||
| 2286 | * read-write on 32-bit systems if kernel is built with CONFIG_LBDAF | ||
| 2287 | */ | ||
| 2288 | if (EXT4_HAS_RO_COMPAT_FEATURE(sb, EXT4_FEATURE_RO_COMPAT_HUGE_FILE)) { | ||
| 2289 | if (sizeof(blkcnt_t) < sizeof(u64)) { | ||
| 2290 | ext4_msg(sb, KERN_ERR, "Filesystem with huge files " | ||
| 2291 | "cannot be mounted RDWR without " | ||
| 2292 | "CONFIG_LBDAF"); | ||
| 2293 | return 0; | ||
| 2294 | } | ||
| 2295 | } | ||
| 2296 | return 1; | ||
| 2297 | } | ||
| 2298 | |||
| 2256 | static int ext4_fill_super(struct super_block *sb, void *data, int silent) | 2299 | static int ext4_fill_super(struct super_block *sb, void *data, int silent) |
| 2257 | __releases(kernel_lock) | 2300 | __releases(kernel_lock) |
| 2258 | __acquires(kernel_lock) | 2301 | __acquires(kernel_lock) |
| @@ -2274,7 +2317,6 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
| 2274 | unsigned int db_count; | 2317 | unsigned int db_count; |
| 2275 | unsigned int i; | 2318 | unsigned int i; |
| 2276 | int needs_recovery, has_huge_files; | 2319 | int needs_recovery, has_huge_files; |
| 2277 | int features; | ||
| 2278 | __u64 blocks_count; | 2320 | __u64 blocks_count; |
| 2279 | int err; | 2321 | int err; |
| 2280 | unsigned int journal_ioprio = DEFAULT_JOURNAL_IOPRIO; | 2322 | unsigned int journal_ioprio = DEFAULT_JOURNAL_IOPRIO; |
| @@ -2401,39 +2443,9 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
| 2401 | * previously didn't change the revision level when setting the flags, | 2443 | * previously didn't change the revision level when setting the flags, |
| 2402 | * so there is a chance incompat flags are set on a rev 0 filesystem. | 2444 | * so there is a chance incompat flags are set on a rev 0 filesystem. |
| 2403 | */ | 2445 | */ |
| 2404 | features = EXT4_HAS_INCOMPAT_FEATURE(sb, ~EXT4_FEATURE_INCOMPAT_SUPP); | 2446 | if (!ext4_feature_set_ok(sb, (sb->s_flags & MS_RDONLY))) |
| 2405 | if (features) { | ||
| 2406 | ext4_msg(sb, KERN_ERR, | ||
| 2407 | "Couldn't mount because of " | ||
| 2408 | "unsupported optional features (%x)", | ||
| 2409 | (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_incompat) & | ||
| 2410 | ~EXT4_FEATURE_INCOMPAT_SUPP)); | ||
| 2411 | goto failed_mount; | ||
| 2412 | } | ||
| 2413 | features = EXT4_HAS_RO_COMPAT_FEATURE(sb, ~EXT4_FEATURE_RO_COMPAT_SUPP); | ||
| 2414 | if (!(sb->s_flags & MS_RDONLY) && features) { | ||
| 2415 | ext4_msg(sb, KERN_ERR, | ||
| 2416 | "Couldn't mount RDWR because of " | ||
| 2417 | "unsupported optional features (%x)", | ||
| 2418 | (le32_to_cpu(EXT4_SB(sb)->s_es->s_feature_ro_compat) & | ||
| 2419 | ~EXT4_FEATURE_RO_COMPAT_SUPP)); | ||
| 2420 | goto failed_mount; | 2447 | goto failed_mount; |
| 2421 | } | 2448 | |
| 2422 | has_huge_files = EXT4_HAS_RO_COMPAT_FEATURE(sb, | ||
| 2423 | EXT4_FEATURE_RO_COMPAT_HUGE_FILE); | ||
| 2424 | if (has_huge_files) { | ||
| 2425 | /* | ||
| 2426 | * Large file size enabled file system can only be | ||
| 2427 | * mount if kernel is build with CONFIG_LBDAF | ||
| 2428 | */ | ||
| 2429 | if (sizeof(root->i_blocks) < sizeof(u64) && | ||
| 2430 | !(sb->s_flags & MS_RDONLY)) { | ||
| 2431 | ext4_msg(sb, KERN_ERR, "Filesystem with huge " | ||
| 2432 | "files cannot be mounted read-write " | ||
| 2433 | "without CONFIG_LBDAF"); | ||
| 2434 | goto failed_mount; | ||
| 2435 | } | ||
| 2436 | } | ||
| 2437 | blocksize = BLOCK_SIZE << le32_to_cpu(es->s_log_block_size); | 2449 | blocksize = BLOCK_SIZE << le32_to_cpu(es->s_log_block_size); |
| 2438 | 2450 | ||
| 2439 | if (blocksize < EXT4_MIN_BLOCK_SIZE || | 2451 | if (blocksize < EXT4_MIN_BLOCK_SIZE || |
| @@ -2469,6 +2481,8 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
| 2469 | } | 2481 | } |
| 2470 | } | 2482 | } |
| 2471 | 2483 | ||
| 2484 | has_huge_files = EXT4_HAS_RO_COMPAT_FEATURE(sb, | ||
| 2485 | EXT4_FEATURE_RO_COMPAT_HUGE_FILE); | ||
| 2472 | sbi->s_bitmap_maxbytes = ext4_max_bitmap_size(sb->s_blocksize_bits, | 2486 | sbi->s_bitmap_maxbytes = ext4_max_bitmap_size(sb->s_blocksize_bits, |
| 2473 | has_huge_files); | 2487 | has_huge_files); |
| 2474 | sb->s_maxbytes = ext4_max_size(sb->s_blocksize_bits, has_huge_files); | 2488 | sb->s_maxbytes = ext4_max_size(sb->s_blocksize_bits, has_huge_files); |
| @@ -2549,12 +2563,19 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
| 2549 | goto failed_mount; | 2563 | goto failed_mount; |
| 2550 | } | 2564 | } |
| 2551 | 2565 | ||
| 2552 | if (ext4_blocks_count(es) > | 2566 | /* |
| 2553 | (sector_t)(~0ULL) >> (sb->s_blocksize_bits - 9)) { | 2567 | * Test whether we have more sectors than will fit in sector_t, |
| 2568 | * and whether the max offset is addressable by the page cache. | ||
| 2569 | */ | ||
| 2570 | if ((ext4_blocks_count(es) > | ||
| 2571 | (sector_t)(~0ULL) >> (sb->s_blocksize_bits - 9)) || | ||
| 2572 | (ext4_blocks_count(es) > | ||
| 2573 | (pgoff_t)(~0ULL) >> (PAGE_CACHE_SHIFT - sb->s_blocksize_bits))) { | ||
| 2554 | ext4_msg(sb, KERN_ERR, "filesystem" | 2574 | ext4_msg(sb, KERN_ERR, "filesystem" |
| 2555 | " too large to mount safely"); | 2575 | " too large to mount safely on this system"); |
| 2556 | if (sizeof(sector_t) < 8) | 2576 | if (sizeof(sector_t) < 8) |
| 2557 | ext4_msg(sb, KERN_WARNING, "CONFIG_LBDAF not enabled"); | 2577 | ext4_msg(sb, KERN_WARNING, "CONFIG_LBDAF not enabled"); |
| 2578 | ret = -EFBIG; | ||
| 2558 | goto failed_mount; | 2579 | goto failed_mount; |
| 2559 | } | 2580 | } |
| 2560 | 2581 | ||
| @@ -2595,6 +2616,8 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
| 2595 | goto failed_mount; | 2616 | goto failed_mount; |
| 2596 | } | 2617 | } |
| 2597 | sbi->s_groups_count = blocks_count; | 2618 | sbi->s_groups_count = blocks_count; |
| 2619 | sbi->s_blockfile_groups = min_t(ext4_group_t, sbi->s_groups_count, | ||
| 2620 | (EXT4_MAX_BLOCK_FILE_PHYS / EXT4_BLOCKS_PER_GROUP(sb))); | ||
| 2598 | db_count = (sbi->s_groups_count + EXT4_DESC_PER_BLOCK(sb) - 1) / | 2621 | db_count = (sbi->s_groups_count + EXT4_DESC_PER_BLOCK(sb) - 1) / |
| 2599 | EXT4_DESC_PER_BLOCK(sb); | 2622 | EXT4_DESC_PER_BLOCK(sb); |
| 2600 | sbi->s_group_desc = kmalloc(db_count * sizeof(struct buffer_head *), | 2623 | sbi->s_group_desc = kmalloc(db_count * sizeof(struct buffer_head *), |
| @@ -2729,20 +2752,14 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) | |||
| 2729 | goto failed_mount4; | 2752 | goto failed_mount4; |
| 2730 | } | 2753 | } |
| 2731 | 2754 | ||
| 2732 | if (test_opt(sb, JOURNAL_ASYNC_COMMIT)) { | 2755 | jbd2_journal_set_features(sbi->s_journal, |
| 2733 | jbd2_journal_set_features(sbi->s_journal, | 2756 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, 0); |
| 2734 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, | 2757 | if (test_opt(sb, JOURNAL_ASYNC_COMMIT)) |
| 2758 | jbd2_journal_set_features(sbi->s_journal, 0, 0, | ||
| 2735 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); | 2759 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); |
| 2736 | } else if (test_opt(sb, JOURNAL_CHECKSUM)) { | 2760 | else |
| 2737 | jbd2_journal_set_features(sbi->s_journal, | ||
| 2738 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, 0); | ||
| 2739 | jbd2_journal_clear_features(sbi->s_journal, 0, 0, | 2761 | jbd2_journal_clear_features(sbi->s_journal, 0, 0, |
| 2740 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); | 2762 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); |
| 2741 | } else { | ||
| 2742 | jbd2_journal_clear_features(sbi->s_journal, | ||
| 2743 | JBD2_FEATURE_COMPAT_CHECKSUM, 0, | ||
| 2744 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT); | ||
| 2745 | } | ||
| 2746 | 2763 | ||
| 2747 | /* We have now updated the journal if required, so we can | 2764 | /* We have now updated the journal if required, so we can |
| 2748 | * validate the data journaling mode. */ | 2765 | * validate the data journaling mode. */ |
| @@ -3208,7 +3225,18 @@ static int ext4_commit_super(struct super_block *sb, int sync) | |||
| 3208 | clear_buffer_write_io_error(sbh); | 3225 | clear_buffer_write_io_error(sbh); |
| 3209 | set_buffer_uptodate(sbh); | 3226 | set_buffer_uptodate(sbh); |
| 3210 | } | 3227 | } |
| 3211 | es->s_wtime = cpu_to_le32(get_seconds()); | 3228 | /* |
| 3229 | * If the file system is mounted read-only, don't update the | ||
| 3230 | * superblock write time. This avoids updating the superblock | ||
| 3231 | * write time when we are mounting the root file system | ||
| 3232 | * read/only but we need to replay the journal; at that point, | ||
| 3233 | * for people who are east of GMT and who make their clock | ||
| 3234 | * tick in localtime for Windows bug-for-bug compatibility, | ||
| 3235 | * the clock is set in the future, and this will cause e2fsck | ||
| 3236 | * to complain and force a full file system check. | ||
| 3237 | */ | ||
| 3238 | if (!(sb->s_flags & MS_RDONLY)) | ||
| 3239 | es->s_wtime = cpu_to_le32(get_seconds()); | ||
| 3212 | es->s_kbytes_written = | 3240 | es->s_kbytes_written = |
| 3213 | cpu_to_le64(EXT4_SB(sb)->s_kbytes_written + | 3241 | cpu_to_le64(EXT4_SB(sb)->s_kbytes_written + |
| 3214 | ((part_stat_read(sb->s_bdev->bd_part, sectors[1]) - | 3242 | ((part_stat_read(sb->s_bdev->bd_part, sectors[1]) - |
| @@ -3477,18 +3505,11 @@ static int ext4_remount(struct super_block *sb, int *flags, char *data) | |||
| 3477 | if (sbi->s_journal) | 3505 | if (sbi->s_journal) |
| 3478 | ext4_mark_recovery_complete(sb, es); | 3506 | ext4_mark_recovery_complete(sb, es); |
| 3479 | } else { | 3507 | } else { |
| 3480 | int ret; | 3508 | /* Make sure we can mount this feature set readwrite */ |
| 3481 | if ((ret = EXT4_HAS_RO_COMPAT_FEATURE(sb, | 3509 | if (!ext4_feature_set_ok(sb, 0)) { |
| 3482 | ~EXT4_FEATURE_RO_COMPAT_SUPP))) { | ||
| 3483 | ext4_msg(sb, KERN_WARNING, "couldn't " | ||
| 3484 | "remount RDWR because of unsupported " | ||
| 3485 | "optional features (%x)", | ||
| 3486 | (le32_to_cpu(sbi->s_es->s_feature_ro_compat) & | ||
| 3487 | ~EXT4_FEATURE_RO_COMPAT_SUPP)); | ||
| 3488 | err = -EROFS; | 3510 | err = -EROFS; |
| 3489 | goto restore_opts; | 3511 | goto restore_opts; |
| 3490 | } | 3512 | } |
| 3491 | |||
| 3492 | /* | 3513 | /* |
| 3493 | * Make sure the group descriptor checksums | 3514 | * Make sure the group descriptor checksums |
| 3494 | * are sane. If they aren't, refuse to remount r/w. | 3515 | * are sane. If they aren't, refuse to remount r/w. |
diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c index 62b31c246994..fed5b01d7a8d 100644 --- a/fs/ext4/xattr.c +++ b/fs/ext4/xattr.c | |||
| @@ -810,12 +810,23 @@ inserted: | |||
| 810 | get_bh(new_bh); | 810 | get_bh(new_bh); |
| 811 | } else { | 811 | } else { |
| 812 | /* We need to allocate a new block */ | 812 | /* We need to allocate a new block */ |
| 813 | ext4_fsblk_t goal = ext4_group_first_block_no(sb, | 813 | ext4_fsblk_t goal, block; |
| 814 | |||
| 815 | goal = ext4_group_first_block_no(sb, | ||
| 814 | EXT4_I(inode)->i_block_group); | 816 | EXT4_I(inode)->i_block_group); |
| 815 | ext4_fsblk_t block = ext4_new_meta_blocks(handle, inode, | 817 | |
| 818 | /* non-extent files can't have physical blocks past 2^32 */ | ||
| 819 | if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)) | ||
| 820 | goal = goal & EXT4_MAX_BLOCK_FILE_PHYS; | ||
| 821 | |||
| 822 | block = ext4_new_meta_blocks(handle, inode, | ||
| 816 | goal, NULL, &error); | 823 | goal, NULL, &error); |
| 817 | if (error) | 824 | if (error) |
| 818 | goto cleanup; | 825 | goto cleanup; |
| 826 | |||
| 827 | if (!(EXT4_I(inode)->i_flags & EXT4_EXTENTS_FL)) | ||
| 828 | BUG_ON(block > EXT4_MAX_BLOCK_FILE_PHYS); | ||
| 829 | |||
| 819 | ea_idebug(inode, "creating block %d", block); | 830 | ea_idebug(inode, "creating block %d", block); |
| 820 | 831 | ||
| 821 | new_bh = sb_getblk(sb, block); | 832 | new_bh = sb_getblk(sb, block); |
diff --git a/fs/fuse/control.c b/fs/fuse/control.c index 99c99dfb0373..3773fd63d2f9 100644 --- a/fs/fuse/control.c +++ b/fs/fuse/control.c | |||
| @@ -61,6 +61,121 @@ static ssize_t fuse_conn_waiting_read(struct file *file, char __user *buf, | |||
| 61 | return simple_read_from_buffer(buf, len, ppos, tmp, size); | 61 | return simple_read_from_buffer(buf, len, ppos, tmp, size); |
| 62 | } | 62 | } |
| 63 | 63 | ||
| 64 | static ssize_t fuse_conn_limit_read(struct file *file, char __user *buf, | ||
| 65 | size_t len, loff_t *ppos, unsigned val) | ||
| 66 | { | ||
| 67 | char tmp[32]; | ||
| 68 | size_t size = sprintf(tmp, "%u\n", val); | ||
| 69 | |||
| 70 | return simple_read_from_buffer(buf, len, ppos, tmp, size); | ||
| 71 | } | ||
| 72 | |||
| 73 | static ssize_t fuse_conn_limit_write(struct file *file, const char __user *buf, | ||
| 74 | size_t count, loff_t *ppos, unsigned *val, | ||
| 75 | unsigned global_limit) | ||
| 76 | { | ||
| 77 | unsigned long t; | ||
| 78 | char tmp[32]; | ||
| 79 | unsigned limit = (1 << 16) - 1; | ||
| 80 | int err; | ||
| 81 | |||
| 82 | if (*ppos || count >= sizeof(tmp) - 1) | ||
| 83 | return -EINVAL; | ||
| 84 | |||
| 85 | if (copy_from_user(tmp, buf, count)) | ||
| 86 | return -EINVAL; | ||
| 87 | |||
| 88 | tmp[count] = '\0'; | ||
| 89 | |||
| 90 | err = strict_strtoul(tmp, 0, &t); | ||
| 91 | if (err) | ||
| 92 | return err; | ||
| 93 | |||
| 94 | if (!capable(CAP_SYS_ADMIN)) | ||
| 95 | limit = min(limit, global_limit); | ||
| 96 | |||
| 97 | if (t > limit) | ||
| 98 | return -EINVAL; | ||
| 99 | |||
| 100 | *val = t; | ||
| 101 | |||
| 102 | return count; | ||
| 103 | } | ||
| 104 | |||
| 105 | static ssize_t fuse_conn_max_background_read(struct file *file, | ||
| 106 | char __user *buf, size_t len, | ||
| 107 | loff_t *ppos) | ||
| 108 | { | ||
| 109 | struct fuse_conn *fc; | ||
| 110 | unsigned val; | ||
| 111 | |||
| 112 | fc = fuse_ctl_file_conn_get(file); | ||
| 113 | if (!fc) | ||
| 114 | return 0; | ||
| 115 | |||
| 116 | val = fc->max_background; | ||
| 117 | fuse_conn_put(fc); | ||
| 118 | |||
| 119 | return fuse_conn_limit_read(file, buf, len, ppos, val); | ||
| 120 | } | ||
| 121 | |||
| 122 | static ssize_t fuse_conn_max_background_write(struct file *file, | ||
| 123 | const char __user *buf, | ||
| 124 | size_t count, loff_t *ppos) | ||
| 125 | { | ||
| 126 | unsigned val; | ||
| 127 | ssize_t ret; | ||
| 128 | |||
| 129 | ret = fuse_conn_limit_write(file, buf, count, ppos, &val, | ||
| 130 | max_user_bgreq); | ||
| 131 | if (ret > 0) { | ||
| 132 | struct fuse_conn *fc = fuse_ctl_file_conn_get(file); | ||
| 133 | if (fc) { | ||
| 134 | fc->max_background = val; | ||
| 135 | fuse_conn_put(fc); | ||
| 136 | } | ||
| 137 | } | ||
| 138 | |||
| 139 | return ret; | ||
| 140 | } | ||
| 141 | |||
| 142 | static ssize_t fuse_conn_congestion_threshold_read(struct file *file, | ||
| 143 | char __user *buf, size_t len, | ||
| 144 | loff_t *ppos) | ||
| 145 | { | ||
| 146 | struct fuse_conn *fc; | ||
| 147 | unsigned val; | ||
| 148 | |||
| 149 | fc = fuse_ctl_file_conn_get(file); | ||
| 150 | if (!fc) | ||
| 151 | return 0; | ||
| 152 | |||
| 153 | val = fc->congestion_threshold; | ||
| 154 | fuse_conn_put(fc); | ||
| 155 | |||
| 156 | return fuse_conn_limit_read(file, buf, len, ppos, val); | ||
| 157 | } | ||
| 158 | |||
| 159 | static ssize_t fuse_conn_congestion_threshold_write(struct file *file, | ||
| 160 | const char __user *buf, | ||
| 161 | size_t count, loff_t *ppos) | ||
| 162 | { | ||
| 163 | unsigned val; | ||
| 164 | ssize_t ret; | ||
| 165 | |||
| 166 | ret = fuse_conn_limit_write(file, buf, count, ppos, &val, | ||
| 167 | max_user_congthresh); | ||
| 168 | if (ret > 0) { | ||
| 169 | struct fuse_conn *fc = fuse_ctl_file_conn_get(file); | ||
| 170 | if (fc) { | ||
| 171 | fc->congestion_threshold = val; | ||
| 172 | fuse_conn_put(fc); | ||
| 173 | } | ||
| 174 | } | ||
| 175 | |||
| 176 | return ret; | ||
| 177 | } | ||
| 178 | |||
| 64 | static const struct file_operations fuse_ctl_abort_ops = { | 179 | static const struct file_operations fuse_ctl_abort_ops = { |
| 65 | .open = nonseekable_open, | 180 | .open = nonseekable_open, |
| 66 | .write = fuse_conn_abort_write, | 181 | .write = fuse_conn_abort_write, |
| @@ -71,6 +186,18 @@ static const struct file_operations fuse_ctl_waiting_ops = { | |||
| 71 | .read = fuse_conn_waiting_read, | 186 | .read = fuse_conn_waiting_read, |
| 72 | }; | 187 | }; |
| 73 | 188 | ||
| 189 | static const struct file_operations fuse_conn_max_background_ops = { | ||
| 190 | .open = nonseekable_open, | ||
| 191 | .read = fuse_conn_max_background_read, | ||
| 192 | .write = fuse_conn_max_background_write, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static const struct file_operations fuse_conn_congestion_threshold_ops = { | ||
| 196 | .open = nonseekable_open, | ||
| 197 | .read = fuse_conn_congestion_threshold_read, | ||
| 198 | .write = fuse_conn_congestion_threshold_write, | ||
| 199 | }; | ||
| 200 | |||
| 74 | static struct dentry *fuse_ctl_add_dentry(struct dentry *parent, | 201 | static struct dentry *fuse_ctl_add_dentry(struct dentry *parent, |
| 75 | struct fuse_conn *fc, | 202 | struct fuse_conn *fc, |
| 76 | const char *name, | 203 | const char *name, |
| @@ -127,9 +254,14 @@ int fuse_ctl_add_conn(struct fuse_conn *fc) | |||
| 127 | goto err; | 254 | goto err; |
| 128 | 255 | ||
| 129 | if (!fuse_ctl_add_dentry(parent, fc, "waiting", S_IFREG | 0400, 1, | 256 | if (!fuse_ctl_add_dentry(parent, fc, "waiting", S_IFREG | 0400, 1, |
| 130 | NULL, &fuse_ctl_waiting_ops) || | 257 | NULL, &fuse_ctl_waiting_ops) || |
| 131 | !fuse_ctl_add_dentry(parent, fc, "abort", S_IFREG | 0200, 1, | 258 | !fuse_ctl_add_dentry(parent, fc, "abort", S_IFREG | 0200, 1, |
| 132 | NULL, &fuse_ctl_abort_ops)) | 259 | NULL, &fuse_ctl_abort_ops) || |
| 260 | !fuse_ctl_add_dentry(parent, fc, "max_background", S_IFREG | 0600, | ||
| 261 | 1, NULL, &fuse_conn_max_background_ops) || | ||
| 262 | !fuse_ctl_add_dentry(parent, fc, "congestion_threshold", | ||
| 263 | S_IFREG | 0600, 1, NULL, | ||
| 264 | &fuse_conn_congestion_threshold_ops)) | ||
| 133 | goto err; | 265 | goto err; |
| 134 | 266 | ||
| 135 | return 0; | 267 | return 0; |
| @@ -156,7 +288,7 @@ void fuse_ctl_remove_conn(struct fuse_conn *fc) | |||
| 156 | d_drop(dentry); | 288 | d_drop(dentry); |
| 157 | dput(dentry); | 289 | dput(dentry); |
| 158 | } | 290 | } |
| 159 | fuse_control_sb->s_root->d_inode->i_nlink--; | 291 | drop_nlink(fuse_control_sb->s_root->d_inode); |
| 160 | } | 292 | } |
| 161 | 293 | ||
| 162 | static int fuse_ctl_fill_super(struct super_block *sb, void *data, int silent) | 294 | static int fuse_ctl_fill_super(struct super_block *sb, void *data, int silent) |
diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c index 6484eb75acd6..51d9e33d634f 100644 --- a/fs/fuse/dev.c +++ b/fs/fuse/dev.c | |||
| @@ -250,7 +250,7 @@ static void queue_request(struct fuse_conn *fc, struct fuse_req *req) | |||
| 250 | 250 | ||
| 251 | static void flush_bg_queue(struct fuse_conn *fc) | 251 | static void flush_bg_queue(struct fuse_conn *fc) |
| 252 | { | 252 | { |
| 253 | while (fc->active_background < FUSE_MAX_BACKGROUND && | 253 | while (fc->active_background < fc->max_background && |
| 254 | !list_empty(&fc->bg_queue)) { | 254 | !list_empty(&fc->bg_queue)) { |
| 255 | struct fuse_req *req; | 255 | struct fuse_req *req; |
| 256 | 256 | ||
| @@ -280,11 +280,11 @@ __releases(&fc->lock) | |||
| 280 | list_del(&req->intr_entry); | 280 | list_del(&req->intr_entry); |
| 281 | req->state = FUSE_REQ_FINISHED; | 281 | req->state = FUSE_REQ_FINISHED; |
| 282 | if (req->background) { | 282 | if (req->background) { |
| 283 | if (fc->num_background == FUSE_MAX_BACKGROUND) { | 283 | if (fc->num_background == fc->max_background) { |
| 284 | fc->blocked = 0; | 284 | fc->blocked = 0; |
| 285 | wake_up_all(&fc->blocked_waitq); | 285 | wake_up_all(&fc->blocked_waitq); |
| 286 | } | 286 | } |
| 287 | if (fc->num_background == FUSE_CONGESTION_THRESHOLD && | 287 | if (fc->num_background == fc->congestion_threshold && |
| 288 | fc->connected && fc->bdi_initialized) { | 288 | fc->connected && fc->bdi_initialized) { |
| 289 | clear_bdi_congested(&fc->bdi, BLK_RW_SYNC); | 289 | clear_bdi_congested(&fc->bdi, BLK_RW_SYNC); |
| 290 | clear_bdi_congested(&fc->bdi, BLK_RW_ASYNC); | 290 | clear_bdi_congested(&fc->bdi, BLK_RW_ASYNC); |
| @@ -410,9 +410,9 @@ static void fuse_request_send_nowait_locked(struct fuse_conn *fc, | |||
| 410 | { | 410 | { |
| 411 | req->background = 1; | 411 | req->background = 1; |
| 412 | fc->num_background++; | 412 | fc->num_background++; |
| 413 | if (fc->num_background == FUSE_MAX_BACKGROUND) | 413 | if (fc->num_background == fc->max_background) |
| 414 | fc->blocked = 1; | 414 | fc->blocked = 1; |
| 415 | if (fc->num_background == FUSE_CONGESTION_THRESHOLD && | 415 | if (fc->num_background == fc->congestion_threshold && |
| 416 | fc->bdi_initialized) { | 416 | fc->bdi_initialized) { |
| 417 | set_bdi_congested(&fc->bdi, BLK_RW_SYNC); | 417 | set_bdi_congested(&fc->bdi, BLK_RW_SYNC); |
| 418 | set_bdi_congested(&fc->bdi, BLK_RW_ASYNC); | 418 | set_bdi_congested(&fc->bdi, BLK_RW_ASYNC); |
diff --git a/fs/fuse/fuse_i.h b/fs/fuse/fuse_i.h index 52b641fc0faf..fc9c79feb5f7 100644 --- a/fs/fuse/fuse_i.h +++ b/fs/fuse/fuse_i.h | |||
| @@ -25,12 +25,6 @@ | |||
| 25 | /** Max number of pages that can be used in a single read request */ | 25 | /** Max number of pages that can be used in a single read request */ |
| 26 | #define FUSE_MAX_PAGES_PER_REQ 32 | 26 | #define FUSE_MAX_PAGES_PER_REQ 32 |
| 27 | 27 | ||
| 28 | /** Maximum number of outstanding background requests */ | ||
| 29 | #define FUSE_MAX_BACKGROUND 12 | ||
| 30 | |||
| 31 | /** Congestion starts at 75% of maximum */ | ||
| 32 | #define FUSE_CONGESTION_THRESHOLD (FUSE_MAX_BACKGROUND * 75 / 100) | ||
| 33 | |||
| 34 | /** Bias for fi->writectr, meaning new writepages must not be sent */ | 28 | /** Bias for fi->writectr, meaning new writepages must not be sent */ |
| 35 | #define FUSE_NOWRITE INT_MIN | 29 | #define FUSE_NOWRITE INT_MIN |
| 36 | 30 | ||
| @@ -38,7 +32,7 @@ | |||
| 38 | #define FUSE_NAME_MAX 1024 | 32 | #define FUSE_NAME_MAX 1024 |
| 39 | 33 | ||
| 40 | /** Number of dentries for each connection in the control filesystem */ | 34 | /** Number of dentries for each connection in the control filesystem */ |
| 41 | #define FUSE_CTL_NUM_DENTRIES 3 | 35 | #define FUSE_CTL_NUM_DENTRIES 5 |
| 42 | 36 | ||
| 43 | /** If the FUSE_DEFAULT_PERMISSIONS flag is given, the filesystem | 37 | /** If the FUSE_DEFAULT_PERMISSIONS flag is given, the filesystem |
| 44 | module will check permissions based on the file mode. Otherwise no | 38 | module will check permissions based on the file mode. Otherwise no |
| @@ -55,6 +49,10 @@ extern struct list_head fuse_conn_list; | |||
| 55 | /** Global mutex protecting fuse_conn_list and the control filesystem */ | 49 | /** Global mutex protecting fuse_conn_list and the control filesystem */ |
| 56 | extern struct mutex fuse_mutex; | 50 | extern struct mutex fuse_mutex; |
| 57 | 51 | ||
| 52 | /** Module parameters */ | ||
| 53 | extern unsigned max_user_bgreq; | ||
| 54 | extern unsigned max_user_congthresh; | ||
| 55 | |||
| 58 | /** FUSE inode */ | 56 | /** FUSE inode */ |
| 59 | struct fuse_inode { | 57 | struct fuse_inode { |
| 60 | /** Inode data */ | 58 | /** Inode data */ |
| @@ -349,6 +347,12 @@ struct fuse_conn { | |||
| 349 | /** rbtree of fuse_files waiting for poll events indexed by ph */ | 347 | /** rbtree of fuse_files waiting for poll events indexed by ph */ |
| 350 | struct rb_root polled_files; | 348 | struct rb_root polled_files; |
| 351 | 349 | ||
| 350 | /** Maximum number of outstanding background requests */ | ||
| 351 | unsigned max_background; | ||
| 352 | |||
| 353 | /** Number of background requests at which congestion starts */ | ||
| 354 | unsigned congestion_threshold; | ||
| 355 | |||
| 352 | /** Number of requests currently in the background */ | 356 | /** Number of requests currently in the background */ |
| 353 | unsigned num_background; | 357 | unsigned num_background; |
| 354 | 358 | ||
diff --git a/fs/fuse/inode.c b/fs/fuse/inode.c index e5dbecd87b0f..6da947daabda 100644 --- a/fs/fuse/inode.c +++ b/fs/fuse/inode.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/seq_file.h> | 14 | #include <linux/seq_file.h> |
| 15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
| 17 | #include <linux/moduleparam.h> | ||
| 17 | #include <linux/parser.h> | 18 | #include <linux/parser.h> |
| 18 | #include <linux/statfs.h> | 19 | #include <linux/statfs.h> |
| 19 | #include <linux/random.h> | 20 | #include <linux/random.h> |
| @@ -28,10 +29,34 @@ static struct kmem_cache *fuse_inode_cachep; | |||
| 28 | struct list_head fuse_conn_list; | 29 | struct list_head fuse_conn_list; |
| 29 | DEFINE_MUTEX(fuse_mutex); | 30 | DEFINE_MUTEX(fuse_mutex); |
| 30 | 31 | ||
| 32 | static int set_global_limit(const char *val, struct kernel_param *kp); | ||
| 33 | |||
| 34 | unsigned max_user_bgreq; | ||
| 35 | module_param_call(max_user_bgreq, set_global_limit, param_get_uint, | ||
| 36 | &max_user_bgreq, 0644); | ||
| 37 | __MODULE_PARM_TYPE(max_user_bgreq, "uint"); | ||
| 38 | MODULE_PARM_DESC(max_user_bgreq, | ||
| 39 | "Global limit for the maximum number of backgrounded requests an " | ||
| 40 | "unprivileged user can set"); | ||
| 41 | |||
| 42 | unsigned max_user_congthresh; | ||
| 43 | module_param_call(max_user_congthresh, set_global_limit, param_get_uint, | ||
| 44 | &max_user_congthresh, 0644); | ||
| 45 | __MODULE_PARM_TYPE(max_user_congthresh, "uint"); | ||
| 46 | MODULE_PARM_DESC(max_user_congthresh, | ||
| 47 | "Global limit for the maximum congestion threshold an " | ||
| 48 | "unprivileged user can set"); | ||
| 49 | |||
| 31 | #define FUSE_SUPER_MAGIC 0x65735546 | 50 | #define FUSE_SUPER_MAGIC 0x65735546 |
| 32 | 51 | ||
| 33 | #define FUSE_DEFAULT_BLKSIZE 512 | 52 | #define FUSE_DEFAULT_BLKSIZE 512 |
| 34 | 53 | ||
| 54 | /** Maximum number of outstanding background requests */ | ||
| 55 | #define FUSE_DEFAULT_MAX_BACKGROUND 12 | ||
| 56 | |||
| 57 | /** Congestion starts at 75% of maximum */ | ||
| 58 | #define FUSE_DEFAULT_CONGESTION_THRESHOLD (FUSE_DEFAULT_MAX_BACKGROUND * 3 / 4) | ||
| 59 | |||
| 35 | struct fuse_mount_data { | 60 | struct fuse_mount_data { |
| 36 | int fd; | 61 | int fd; |
| 37 | unsigned rootmode; | 62 | unsigned rootmode; |
| @@ -517,6 +542,8 @@ void fuse_conn_init(struct fuse_conn *fc) | |||
| 517 | INIT_LIST_HEAD(&fc->bg_queue); | 542 | INIT_LIST_HEAD(&fc->bg_queue); |
| 518 | INIT_LIST_HEAD(&fc->entry); | 543 | INIT_LIST_HEAD(&fc->entry); |
| 519 | atomic_set(&fc->num_waiting, 0); | 544 | atomic_set(&fc->num_waiting, 0); |
| 545 | fc->max_background = FUSE_DEFAULT_MAX_BACKGROUND; | ||
| 546 | fc->congestion_threshold = FUSE_DEFAULT_CONGESTION_THRESHOLD; | ||
| 520 | fc->khctr = 0; | 547 | fc->khctr = 0; |
| 521 | fc->polled_files = RB_ROOT; | 548 | fc->polled_files = RB_ROOT; |
| 522 | fc->reqctr = 0; | 549 | fc->reqctr = 0; |
| @@ -727,6 +754,54 @@ static const struct super_operations fuse_super_operations = { | |||
| 727 | .show_options = fuse_show_options, | 754 | .show_options = fuse_show_options, |
| 728 | }; | 755 | }; |
| 729 | 756 | ||
| 757 | static void sanitize_global_limit(unsigned *limit) | ||
| 758 | { | ||
| 759 | if (*limit == 0) | ||
| 760 | *limit = ((num_physpages << PAGE_SHIFT) >> 13) / | ||
| 761 | sizeof(struct fuse_req); | ||
| 762 | |||
| 763 | if (*limit >= 1 << 16) | ||
| 764 | *limit = (1 << 16) - 1; | ||
| 765 | } | ||
| 766 | |||
| 767 | static int set_global_limit(const char *val, struct kernel_param *kp) | ||
| 768 | { | ||
| 769 | int rv; | ||
| 770 | |||
| 771 | rv = param_set_uint(val, kp); | ||
| 772 | if (rv) | ||
| 773 | return rv; | ||
| 774 | |||
| 775 | sanitize_global_limit((unsigned *)kp->arg); | ||
| 776 | |||
| 777 | return 0; | ||
| 778 | } | ||
| 779 | |||
| 780 | static void process_init_limits(struct fuse_conn *fc, struct fuse_init_out *arg) | ||
| 781 | { | ||
| 782 | int cap_sys_admin = capable(CAP_SYS_ADMIN); | ||
| 783 | |||
| 784 | if (arg->minor < 13) | ||
| 785 | return; | ||
| 786 | |||
| 787 | sanitize_global_limit(&max_user_bgreq); | ||
| 788 | sanitize_global_limit(&max_user_congthresh); | ||
| 789 | |||
| 790 | if (arg->max_background) { | ||
| 791 | fc->max_background = arg->max_background; | ||
| 792 | |||
| 793 | if (!cap_sys_admin && fc->max_background > max_user_bgreq) | ||
| 794 | fc->max_background = max_user_bgreq; | ||
| 795 | } | ||
| 796 | if (arg->congestion_threshold) { | ||
| 797 | fc->congestion_threshold = arg->congestion_threshold; | ||
| 798 | |||
| 799 | if (!cap_sys_admin && | ||
| 800 | fc->congestion_threshold > max_user_congthresh) | ||
| 801 | fc->congestion_threshold = max_user_congthresh; | ||
| 802 | } | ||
| 803 | } | ||
| 804 | |||
| 730 | static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req) | 805 | static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req) |
| 731 | { | 806 | { |
| 732 | struct fuse_init_out *arg = &req->misc.init_out; | 807 | struct fuse_init_out *arg = &req->misc.init_out; |
| @@ -736,6 +811,8 @@ static void process_init_reply(struct fuse_conn *fc, struct fuse_req *req) | |||
| 736 | else { | 811 | else { |
| 737 | unsigned long ra_pages; | 812 | unsigned long ra_pages; |
| 738 | 813 | ||
| 814 | process_init_limits(fc, arg); | ||
| 815 | |||
| 739 | if (arg->minor >= 6) { | 816 | if (arg->minor >= 6) { |
| 740 | ra_pages = arg->max_readahead / PAGE_CACHE_SIZE; | 817 | ra_pages = arg->max_readahead / PAGE_CACHE_SIZE; |
| 741 | if (arg->flags & FUSE_ASYNC_READ) | 818 | if (arg->flags & FUSE_ASYNC_READ) |
| @@ -1150,6 +1227,9 @@ static int __init fuse_init(void) | |||
| 1150 | if (res) | 1227 | if (res) |
| 1151 | goto err_sysfs_cleanup; | 1228 | goto err_sysfs_cleanup; |
| 1152 | 1229 | ||
| 1230 | sanitize_global_limit(&max_user_bgreq); | ||
| 1231 | sanitize_global_limit(&max_user_congthresh); | ||
| 1232 | |||
| 1153 | return 0; | 1233 | return 0; |
| 1154 | 1234 | ||
| 1155 | err_sysfs_cleanup: | 1235 | err_sysfs_cleanup: |
diff --git a/fs/jbd/checkpoint.c b/fs/jbd/checkpoint.c index 61f32f3868cd..b0435dd0654d 100644 --- a/fs/jbd/checkpoint.c +++ b/fs/jbd/checkpoint.c | |||
| @@ -456,7 +456,7 @@ int cleanup_journal_tail(journal_t *journal) | |||
| 456 | { | 456 | { |
| 457 | transaction_t * transaction; | 457 | transaction_t * transaction; |
| 458 | tid_t first_tid; | 458 | tid_t first_tid; |
| 459 | unsigned long blocknr, freed; | 459 | unsigned int blocknr, freed; |
| 460 | 460 | ||
| 461 | if (is_journal_aborted(journal)) | 461 | if (is_journal_aborted(journal)) |
| 462 | return 1; | 462 | return 1; |
| @@ -502,8 +502,8 @@ int cleanup_journal_tail(journal_t *journal) | |||
| 502 | freed = freed + journal->j_last - journal->j_first; | 502 | freed = freed + journal->j_last - journal->j_first; |
| 503 | 503 | ||
| 504 | jbd_debug(1, | 504 | jbd_debug(1, |
| 505 | "Cleaning journal tail from %d to %d (offset %lu), " | 505 | "Cleaning journal tail from %d to %d (offset %u), " |
| 506 | "freeing %lu\n", | 506 | "freeing %u\n", |
| 507 | journal->j_tail_sequence, first_tid, blocknr, freed); | 507 | journal->j_tail_sequence, first_tid, blocknr, freed); |
| 508 | 508 | ||
| 509 | journal->j_free += freed; | 509 | journal->j_free += freed; |
diff --git a/fs/jbd/commit.c b/fs/jbd/commit.c index 618e21c0b7a3..4bd882548c45 100644 --- a/fs/jbd/commit.c +++ b/fs/jbd/commit.c | |||
| @@ -308,7 +308,7 @@ void journal_commit_transaction(journal_t *journal) | |||
| 308 | int bufs; | 308 | int bufs; |
| 309 | int flags; | 309 | int flags; |
| 310 | int err; | 310 | int err; |
| 311 | unsigned long blocknr; | 311 | unsigned int blocknr; |
| 312 | ktime_t start_time; | 312 | ktime_t start_time; |
| 313 | u64 commit_time; | 313 | u64 commit_time; |
| 314 | char *tagp = NULL; | 314 | char *tagp = NULL; |
diff --git a/fs/jbd/journal.c b/fs/jbd/journal.c index f96f85092d1c..bd3c073b485d 100644 --- a/fs/jbd/journal.c +++ b/fs/jbd/journal.c | |||
| @@ -276,7 +276,7 @@ static void journal_kill_thread(journal_t *journal) | |||
| 276 | int journal_write_metadata_buffer(transaction_t *transaction, | 276 | int journal_write_metadata_buffer(transaction_t *transaction, |
| 277 | struct journal_head *jh_in, | 277 | struct journal_head *jh_in, |
| 278 | struct journal_head **jh_out, | 278 | struct journal_head **jh_out, |
| 279 | unsigned long blocknr) | 279 | unsigned int blocknr) |
| 280 | { | 280 | { |
| 281 | int need_copy_out = 0; | 281 | int need_copy_out = 0; |
| 282 | int done_copy_out = 0; | 282 | int done_copy_out = 0; |
| @@ -567,9 +567,9 @@ int log_wait_commit(journal_t *journal, tid_t tid) | |||
| 567 | * Log buffer allocation routines: | 567 | * Log buffer allocation routines: |
| 568 | */ | 568 | */ |
| 569 | 569 | ||
| 570 | int journal_next_log_block(journal_t *journal, unsigned long *retp) | 570 | int journal_next_log_block(journal_t *journal, unsigned int *retp) |
| 571 | { | 571 | { |
| 572 | unsigned long blocknr; | 572 | unsigned int blocknr; |
| 573 | 573 | ||
| 574 | spin_lock(&journal->j_state_lock); | 574 | spin_lock(&journal->j_state_lock); |
| 575 | J_ASSERT(journal->j_free > 1); | 575 | J_ASSERT(journal->j_free > 1); |
| @@ -590,11 +590,11 @@ int journal_next_log_block(journal_t *journal, unsigned long *retp) | |||
| 590 | * this is a no-op. If needed, we can use j_blk_offset - everything is | 590 | * this is a no-op. If needed, we can use j_blk_offset - everything is |
| 591 | * ready. | 591 | * ready. |
| 592 | */ | 592 | */ |
| 593 | int journal_bmap(journal_t *journal, unsigned long blocknr, | 593 | int journal_bmap(journal_t *journal, unsigned int blocknr, |
| 594 | unsigned long *retp) | 594 | unsigned int *retp) |
| 595 | { | 595 | { |
| 596 | int err = 0; | 596 | int err = 0; |
| 597 | unsigned long ret; | 597 | unsigned int ret; |
| 598 | 598 | ||
| 599 | if (journal->j_inode) { | 599 | if (journal->j_inode) { |
| 600 | ret = bmap(journal->j_inode, blocknr); | 600 | ret = bmap(journal->j_inode, blocknr); |
| @@ -604,7 +604,7 @@ int journal_bmap(journal_t *journal, unsigned long blocknr, | |||
| 604 | char b[BDEVNAME_SIZE]; | 604 | char b[BDEVNAME_SIZE]; |
| 605 | 605 | ||
| 606 | printk(KERN_ALERT "%s: journal block not found " | 606 | printk(KERN_ALERT "%s: journal block not found " |
| 607 | "at offset %lu on %s\n", | 607 | "at offset %u on %s\n", |
| 608 | __func__, | 608 | __func__, |
| 609 | blocknr, | 609 | blocknr, |
| 610 | bdevname(journal->j_dev, b)); | 610 | bdevname(journal->j_dev, b)); |
| @@ -630,7 +630,7 @@ int journal_bmap(journal_t *journal, unsigned long blocknr, | |||
| 630 | struct journal_head *journal_get_descriptor_buffer(journal_t *journal) | 630 | struct journal_head *journal_get_descriptor_buffer(journal_t *journal) |
| 631 | { | 631 | { |
| 632 | struct buffer_head *bh; | 632 | struct buffer_head *bh; |
| 633 | unsigned long blocknr; | 633 | unsigned int blocknr; |
| 634 | int err; | 634 | int err; |
| 635 | 635 | ||
| 636 | err = journal_next_log_block(journal, &blocknr); | 636 | err = journal_next_log_block(journal, &blocknr); |
| @@ -774,7 +774,7 @@ journal_t * journal_init_inode (struct inode *inode) | |||
| 774 | journal_t *journal = journal_init_common(); | 774 | journal_t *journal = journal_init_common(); |
| 775 | int err; | 775 | int err; |
| 776 | int n; | 776 | int n; |
| 777 | unsigned long blocknr; | 777 | unsigned int blocknr; |
| 778 | 778 | ||
| 779 | if (!journal) | 779 | if (!journal) |
| 780 | return NULL; | 780 | return NULL; |
| @@ -846,12 +846,12 @@ static void journal_fail_superblock (journal_t *journal) | |||
| 846 | static int journal_reset(journal_t *journal) | 846 | static int journal_reset(journal_t *journal) |
| 847 | { | 847 | { |
| 848 | journal_superblock_t *sb = journal->j_superblock; | 848 | journal_superblock_t *sb = journal->j_superblock; |
| 849 | unsigned long first, last; | 849 | unsigned int first, last; |
| 850 | 850 | ||
| 851 | first = be32_to_cpu(sb->s_first); | 851 | first = be32_to_cpu(sb->s_first); |
| 852 | last = be32_to_cpu(sb->s_maxlen); | 852 | last = be32_to_cpu(sb->s_maxlen); |
| 853 | if (first + JFS_MIN_JOURNAL_BLOCKS > last + 1) { | 853 | if (first + JFS_MIN_JOURNAL_BLOCKS > last + 1) { |
| 854 | printk(KERN_ERR "JBD: Journal too short (blocks %lu-%lu).\n", | 854 | printk(KERN_ERR "JBD: Journal too short (blocks %u-%u).\n", |
| 855 | first, last); | 855 | first, last); |
| 856 | journal_fail_superblock(journal); | 856 | journal_fail_superblock(journal); |
| 857 | return -EINVAL; | 857 | return -EINVAL; |
| @@ -885,7 +885,7 @@ static int journal_reset(journal_t *journal) | |||
| 885 | **/ | 885 | **/ |
| 886 | int journal_create(journal_t *journal) | 886 | int journal_create(journal_t *journal) |
| 887 | { | 887 | { |
| 888 | unsigned long blocknr; | 888 | unsigned int blocknr; |
| 889 | struct buffer_head *bh; | 889 | struct buffer_head *bh; |
| 890 | journal_superblock_t *sb; | 890 | journal_superblock_t *sb; |
| 891 | int i, err; | 891 | int i, err; |
| @@ -969,14 +969,14 @@ void journal_update_superblock(journal_t *journal, int wait) | |||
| 969 | if (sb->s_start == 0 && journal->j_tail_sequence == | 969 | if (sb->s_start == 0 && journal->j_tail_sequence == |
| 970 | journal->j_transaction_sequence) { | 970 | journal->j_transaction_sequence) { |
| 971 | jbd_debug(1,"JBD: Skipping superblock update on recovered sb " | 971 | jbd_debug(1,"JBD: Skipping superblock update on recovered sb " |
| 972 | "(start %ld, seq %d, errno %d)\n", | 972 | "(start %u, seq %d, errno %d)\n", |
| 973 | journal->j_tail, journal->j_tail_sequence, | 973 | journal->j_tail, journal->j_tail_sequence, |
| 974 | journal->j_errno); | 974 | journal->j_errno); |
| 975 | goto out; | 975 | goto out; |
| 976 | } | 976 | } |
| 977 | 977 | ||
| 978 | spin_lock(&journal->j_state_lock); | 978 | spin_lock(&journal->j_state_lock); |
| 979 | jbd_debug(1,"JBD: updating superblock (start %ld, seq %d, errno %d)\n", | 979 | jbd_debug(1,"JBD: updating superblock (start %u, seq %d, errno %d)\n", |
| 980 | journal->j_tail, journal->j_tail_sequence, journal->j_errno); | 980 | journal->j_tail, journal->j_tail_sequence, journal->j_errno); |
| 981 | 981 | ||
| 982 | sb->s_sequence = cpu_to_be32(journal->j_tail_sequence); | 982 | sb->s_sequence = cpu_to_be32(journal->j_tail_sequence); |
| @@ -1371,7 +1371,7 @@ int journal_flush(journal_t *journal) | |||
| 1371 | { | 1371 | { |
| 1372 | int err = 0; | 1372 | int err = 0; |
| 1373 | transaction_t *transaction = NULL; | 1373 | transaction_t *transaction = NULL; |
| 1374 | unsigned long old_tail; | 1374 | unsigned int old_tail; |
| 1375 | 1375 | ||
| 1376 | spin_lock(&journal->j_state_lock); | 1376 | spin_lock(&journal->j_state_lock); |
| 1377 | 1377 | ||
diff --git a/fs/jbd/recovery.c b/fs/jbd/recovery.c index db5e982c5ddf..cb1a49ae605e 100644 --- a/fs/jbd/recovery.c +++ b/fs/jbd/recovery.c | |||
| @@ -70,7 +70,7 @@ static int do_readahead(journal_t *journal, unsigned int start) | |||
| 70 | { | 70 | { |
| 71 | int err; | 71 | int err; |
| 72 | unsigned int max, nbufs, next; | 72 | unsigned int max, nbufs, next; |
| 73 | unsigned long blocknr; | 73 | unsigned int blocknr; |
| 74 | struct buffer_head *bh; | 74 | struct buffer_head *bh; |
| 75 | 75 | ||
| 76 | struct buffer_head * bufs[MAXBUF]; | 76 | struct buffer_head * bufs[MAXBUF]; |
| @@ -132,7 +132,7 @@ static int jread(struct buffer_head **bhp, journal_t *journal, | |||
| 132 | unsigned int offset) | 132 | unsigned int offset) |
| 133 | { | 133 | { |
| 134 | int err; | 134 | int err; |
| 135 | unsigned long blocknr; | 135 | unsigned int blocknr; |
| 136 | struct buffer_head *bh; | 136 | struct buffer_head *bh; |
| 137 | 137 | ||
| 138 | *bhp = NULL; | 138 | *bhp = NULL; |
| @@ -314,7 +314,7 @@ static int do_one_pass(journal_t *journal, | |||
| 314 | struct recovery_info *info, enum passtype pass) | 314 | struct recovery_info *info, enum passtype pass) |
| 315 | { | 315 | { |
| 316 | unsigned int first_commit_ID, next_commit_ID; | 316 | unsigned int first_commit_ID, next_commit_ID; |
| 317 | unsigned long next_log_block; | 317 | unsigned int next_log_block; |
| 318 | int err, success = 0; | 318 | int err, success = 0; |
| 319 | journal_superblock_t * sb; | 319 | journal_superblock_t * sb; |
| 320 | journal_header_t * tmp; | 320 | journal_header_t * tmp; |
| @@ -367,14 +367,14 @@ static int do_one_pass(journal_t *journal, | |||
| 367 | if (tid_geq(next_commit_ID, info->end_transaction)) | 367 | if (tid_geq(next_commit_ID, info->end_transaction)) |
| 368 | break; | 368 | break; |
| 369 | 369 | ||
| 370 | jbd_debug(2, "Scanning for sequence ID %u at %lu/%lu\n", | 370 | jbd_debug(2, "Scanning for sequence ID %u at %u/%u\n", |
| 371 | next_commit_ID, next_log_block, journal->j_last); | 371 | next_commit_ID, next_log_block, journal->j_last); |
| 372 | 372 | ||
| 373 | /* Skip over each chunk of the transaction looking | 373 | /* Skip over each chunk of the transaction looking |
| 374 | * either the next descriptor block or the final commit | 374 | * either the next descriptor block or the final commit |
| 375 | * record. */ | 375 | * record. */ |
| 376 | 376 | ||
| 377 | jbd_debug(3, "JBD: checking block %ld\n", next_log_block); | 377 | jbd_debug(3, "JBD: checking block %u\n", next_log_block); |
| 378 | err = jread(&bh, journal, next_log_block); | 378 | err = jread(&bh, journal, next_log_block); |
| 379 | if (err) | 379 | if (err) |
| 380 | goto failed; | 380 | goto failed; |
| @@ -429,7 +429,7 @@ static int do_one_pass(journal_t *journal, | |||
| 429 | tagp = &bh->b_data[sizeof(journal_header_t)]; | 429 | tagp = &bh->b_data[sizeof(journal_header_t)]; |
| 430 | while ((tagp - bh->b_data +sizeof(journal_block_tag_t)) | 430 | while ((tagp - bh->b_data +sizeof(journal_block_tag_t)) |
| 431 | <= journal->j_blocksize) { | 431 | <= journal->j_blocksize) { |
| 432 | unsigned long io_block; | 432 | unsigned int io_block; |
| 433 | 433 | ||
| 434 | tag = (journal_block_tag_t *) tagp; | 434 | tag = (journal_block_tag_t *) tagp; |
| 435 | flags = be32_to_cpu(tag->t_flags); | 435 | flags = be32_to_cpu(tag->t_flags); |
| @@ -443,10 +443,10 @@ static int do_one_pass(journal_t *journal, | |||
| 443 | success = err; | 443 | success = err; |
| 444 | printk (KERN_ERR | 444 | printk (KERN_ERR |
| 445 | "JBD: IO error %d recovering " | 445 | "JBD: IO error %d recovering " |
| 446 | "block %ld in log\n", | 446 | "block %u in log\n", |
| 447 | err, io_block); | 447 | err, io_block); |
| 448 | } else { | 448 | } else { |
| 449 | unsigned long blocknr; | 449 | unsigned int blocknr; |
| 450 | 450 | ||
| 451 | J_ASSERT(obh != NULL); | 451 | J_ASSERT(obh != NULL); |
| 452 | blocknr = be32_to_cpu(tag->t_blocknr); | 452 | blocknr = be32_to_cpu(tag->t_blocknr); |
| @@ -581,7 +581,7 @@ static int scan_revoke_records(journal_t *journal, struct buffer_head *bh, | |||
| 581 | max = be32_to_cpu(header->r_count); | 581 | max = be32_to_cpu(header->r_count); |
| 582 | 582 | ||
| 583 | while (offset < max) { | 583 | while (offset < max) { |
| 584 | unsigned long blocknr; | 584 | unsigned int blocknr; |
| 585 | int err; | 585 | int err; |
| 586 | 586 | ||
| 587 | blocknr = be32_to_cpu(* ((__be32 *) (bh->b_data+offset))); | 587 | blocknr = be32_to_cpu(* ((__be32 *) (bh->b_data+offset))); |
diff --git a/fs/jbd/revoke.c b/fs/jbd/revoke.c index da6cd9bdaabc..ad717328343a 100644 --- a/fs/jbd/revoke.c +++ b/fs/jbd/revoke.c | |||
| @@ -101,7 +101,7 @@ struct jbd_revoke_record_s | |||
| 101 | { | 101 | { |
| 102 | struct list_head hash; | 102 | struct list_head hash; |
| 103 | tid_t sequence; /* Used for recovery only */ | 103 | tid_t sequence; /* Used for recovery only */ |
| 104 | unsigned long blocknr; | 104 | unsigned int blocknr; |
| 105 | }; | 105 | }; |
| 106 | 106 | ||
| 107 | 107 | ||
| @@ -126,7 +126,7 @@ static void flush_descriptor(journal_t *, struct journal_head *, int, int); | |||
| 126 | /* Utility functions to maintain the revoke table */ | 126 | /* Utility functions to maintain the revoke table */ |
| 127 | 127 | ||
| 128 | /* Borrowed from buffer.c: this is a tried and tested block hash function */ | 128 | /* Borrowed from buffer.c: this is a tried and tested block hash function */ |
| 129 | static inline int hash(journal_t *journal, unsigned long block) | 129 | static inline int hash(journal_t *journal, unsigned int block) |
| 130 | { | 130 | { |
| 131 | struct jbd_revoke_table_s *table = journal->j_revoke; | 131 | struct jbd_revoke_table_s *table = journal->j_revoke; |
| 132 | int hash_shift = table->hash_shift; | 132 | int hash_shift = table->hash_shift; |
| @@ -136,7 +136,7 @@ static inline int hash(journal_t *journal, unsigned long block) | |||
| 136 | (block << (hash_shift - 12))) & (table->hash_size - 1); | 136 | (block << (hash_shift - 12))) & (table->hash_size - 1); |
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | static int insert_revoke_hash(journal_t *journal, unsigned long blocknr, | 139 | static int insert_revoke_hash(journal_t *journal, unsigned int blocknr, |
| 140 | tid_t seq) | 140 | tid_t seq) |
| 141 | { | 141 | { |
| 142 | struct list_head *hash_list; | 142 | struct list_head *hash_list; |
| @@ -166,7 +166,7 @@ oom: | |||
| 166 | /* Find a revoke record in the journal's hash table. */ | 166 | /* Find a revoke record in the journal's hash table. */ |
| 167 | 167 | ||
| 168 | static struct jbd_revoke_record_s *find_revoke_record(journal_t *journal, | 168 | static struct jbd_revoke_record_s *find_revoke_record(journal_t *journal, |
| 169 | unsigned long blocknr) | 169 | unsigned int blocknr) |
| 170 | { | 170 | { |
| 171 | struct list_head *hash_list; | 171 | struct list_head *hash_list; |
| 172 | struct jbd_revoke_record_s *record; | 172 | struct jbd_revoke_record_s *record; |
| @@ -332,7 +332,7 @@ void journal_destroy_revoke(journal_t *journal) | |||
| 332 | * by one. | 332 | * by one. |
| 333 | */ | 333 | */ |
| 334 | 334 | ||
| 335 | int journal_revoke(handle_t *handle, unsigned long blocknr, | 335 | int journal_revoke(handle_t *handle, unsigned int blocknr, |
| 336 | struct buffer_head *bh_in) | 336 | struct buffer_head *bh_in) |
| 337 | { | 337 | { |
| 338 | struct buffer_head *bh = NULL; | 338 | struct buffer_head *bh = NULL; |
| @@ -401,7 +401,7 @@ int journal_revoke(handle_t *handle, unsigned long blocknr, | |||
| 401 | } | 401 | } |
| 402 | } | 402 | } |
| 403 | 403 | ||
| 404 | jbd_debug(2, "insert revoke for block %lu, bh_in=%p\n", blocknr, bh_in); | 404 | jbd_debug(2, "insert revoke for block %u, bh_in=%p\n", blocknr, bh_in); |
| 405 | err = insert_revoke_hash(journal, blocknr, | 405 | err = insert_revoke_hash(journal, blocknr, |
| 406 | handle->h_transaction->t_tid); | 406 | handle->h_transaction->t_tid); |
| 407 | BUFFER_TRACE(bh_in, "exit"); | 407 | BUFFER_TRACE(bh_in, "exit"); |
| @@ -644,7 +644,7 @@ static void flush_descriptor(journal_t *journal, | |||
| 644 | */ | 644 | */ |
| 645 | 645 | ||
| 646 | int journal_set_revoke(journal_t *journal, | 646 | int journal_set_revoke(journal_t *journal, |
| 647 | unsigned long blocknr, | 647 | unsigned int blocknr, |
| 648 | tid_t sequence) | 648 | tid_t sequence) |
| 649 | { | 649 | { |
| 650 | struct jbd_revoke_record_s *record; | 650 | struct jbd_revoke_record_s *record; |
| @@ -668,7 +668,7 @@ int journal_set_revoke(journal_t *journal, | |||
| 668 | */ | 668 | */ |
| 669 | 669 | ||
| 670 | int journal_test_revoke(journal_t *journal, | 670 | int journal_test_revoke(journal_t *journal, |
| 671 | unsigned long blocknr, | 671 | unsigned int blocknr, |
| 672 | tid_t sequence) | 672 | tid_t sequence) |
| 673 | { | 673 | { |
| 674 | struct jbd_revoke_record_s *record; | 674 | struct jbd_revoke_record_s *record; |
diff --git a/fs/jbd/transaction.c b/fs/jbd/transaction.c index c03ac11f74be..006f9ad838a2 100644 --- a/fs/jbd/transaction.c +++ b/fs/jbd/transaction.c | |||
| @@ -56,7 +56,8 @@ get_transaction(journal_t *journal, transaction_t *transaction) | |||
| 56 | spin_lock_init(&transaction->t_handle_lock); | 56 | spin_lock_init(&transaction->t_handle_lock); |
| 57 | 57 | ||
| 58 | /* Set up the commit timer for the new transaction. */ | 58 | /* Set up the commit timer for the new transaction. */ |
| 59 | journal->j_commit_timer.expires = round_jiffies(transaction->t_expires); | 59 | journal->j_commit_timer.expires = |
| 60 | round_jiffies_up(transaction->t_expires); | ||
| 60 | add_timer(&journal->j_commit_timer); | 61 | add_timer(&journal->j_commit_timer); |
| 61 | 62 | ||
| 62 | J_ASSERT(journal->j_running_transaction == NULL); | 63 | J_ASSERT(journal->j_running_transaction == NULL); |
| @@ -228,6 +229,8 @@ repeat_locked: | |||
| 228 | __log_space_left(journal)); | 229 | __log_space_left(journal)); |
| 229 | spin_unlock(&transaction->t_handle_lock); | 230 | spin_unlock(&transaction->t_handle_lock); |
| 230 | spin_unlock(&journal->j_state_lock); | 231 | spin_unlock(&journal->j_state_lock); |
| 232 | |||
| 233 | lock_map_acquire(&handle->h_lockdep_map); | ||
| 231 | out: | 234 | out: |
| 232 | if (unlikely(new_transaction)) /* It's usually NULL */ | 235 | if (unlikely(new_transaction)) /* It's usually NULL */ |
| 233 | kfree(new_transaction); | 236 | kfree(new_transaction); |
| @@ -292,9 +295,6 @@ handle_t *journal_start(journal_t *journal, int nblocks) | |||
| 292 | handle = ERR_PTR(err); | 295 | handle = ERR_PTR(err); |
| 293 | goto out; | 296 | goto out; |
| 294 | } | 297 | } |
| 295 | |||
| 296 | lock_map_acquire(&handle->h_lockdep_map); | ||
| 297 | |||
| 298 | out: | 298 | out: |
| 299 | return handle; | 299 | return handle; |
| 300 | } | 300 | } |
| @@ -416,6 +416,7 @@ int journal_restart(handle_t *handle, int nblocks) | |||
| 416 | __log_start_commit(journal, transaction->t_tid); | 416 | __log_start_commit(journal, transaction->t_tid); |
| 417 | spin_unlock(&journal->j_state_lock); | 417 | spin_unlock(&journal->j_state_lock); |
| 418 | 418 | ||
| 419 | lock_map_release(&handle->h_lockdep_map); | ||
| 419 | handle->h_buffer_credits = nblocks; | 420 | handle->h_buffer_credits = nblocks; |
| 420 | ret = start_this_handle(journal, handle); | 421 | ret = start_this_handle(journal, handle); |
| 421 | return ret; | 422 | return ret; |
diff --git a/fs/jbd2/commit.c b/fs/jbd2/commit.c index 0df600e9162d..26d991ddc1e6 100644 --- a/fs/jbd2/commit.c +++ b/fs/jbd2/commit.c | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #include <linux/writeback.h> | 25 | #include <linux/writeback.h> |
| 26 | #include <linux/backing-dev.h> | 26 | #include <linux/backing-dev.h> |
| 27 | #include <linux/bio.h> | 27 | #include <linux/bio.h> |
| 28 | #include <linux/blkdev.h> | ||
| 28 | #include <trace/events/jbd2.h> | 29 | #include <trace/events/jbd2.h> |
| 29 | 30 | ||
| 30 | /* | 31 | /* |
| @@ -133,8 +134,8 @@ static int journal_submit_commit_record(journal_t *journal, | |||
| 133 | bh->b_end_io = journal_end_buffer_io_sync; | 134 | bh->b_end_io = journal_end_buffer_io_sync; |
| 134 | 135 | ||
| 135 | if (journal->j_flags & JBD2_BARRIER && | 136 | if (journal->j_flags & JBD2_BARRIER && |
| 136 | !JBD2_HAS_INCOMPAT_FEATURE(journal, | 137 | !JBD2_HAS_INCOMPAT_FEATURE(journal, |
| 137 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)) { | 138 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)) { |
| 138 | set_buffer_ordered(bh); | 139 | set_buffer_ordered(bh); |
| 139 | barrier_done = 1; | 140 | barrier_done = 1; |
| 140 | } | 141 | } |
| @@ -706,11 +707,13 @@ start_journal_io: | |||
| 706 | /* Done it all: now write the commit record asynchronously. */ | 707 | /* Done it all: now write the commit record asynchronously. */ |
| 707 | 708 | ||
| 708 | if (JBD2_HAS_INCOMPAT_FEATURE(journal, | 709 | if (JBD2_HAS_INCOMPAT_FEATURE(journal, |
| 709 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)) { | 710 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)) { |
| 710 | err = journal_submit_commit_record(journal, commit_transaction, | 711 | err = journal_submit_commit_record(journal, commit_transaction, |
| 711 | &cbh, crc32_sum); | 712 | &cbh, crc32_sum); |
| 712 | if (err) | 713 | if (err) |
| 713 | __jbd2_journal_abort_hard(journal); | 714 | __jbd2_journal_abort_hard(journal); |
| 715 | if (journal->j_flags & JBD2_BARRIER) | ||
| 716 | blkdev_issue_flush(journal->j_dev, NULL); | ||
| 714 | } | 717 | } |
| 715 | 718 | ||
| 716 | /* | 719 | /* |
| @@ -833,7 +836,7 @@ wait_for_iobuf: | |||
| 833 | jbd_debug(3, "JBD: commit phase 5\n"); | 836 | jbd_debug(3, "JBD: commit phase 5\n"); |
| 834 | 837 | ||
| 835 | if (!JBD2_HAS_INCOMPAT_FEATURE(journal, | 838 | if (!JBD2_HAS_INCOMPAT_FEATURE(journal, |
| 836 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)) { | 839 | JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)) { |
| 837 | err = journal_submit_commit_record(journal, commit_transaction, | 840 | err = journal_submit_commit_record(journal, commit_transaction, |
| 838 | &cbh, crc32_sum); | 841 | &cbh, crc32_sum); |
| 839 | if (err) | 842 | if (err) |
diff --git a/fs/jbd2/journal.c b/fs/jbd2/journal.c index e378cb383979..a8a358bc0f21 100644 --- a/fs/jbd2/journal.c +++ b/fs/jbd2/journal.c | |||
| @@ -1187,6 +1187,12 @@ static int journal_reset(journal_t *journal) | |||
| 1187 | 1187 | ||
| 1188 | first = be32_to_cpu(sb->s_first); | 1188 | first = be32_to_cpu(sb->s_first); |
| 1189 | last = be32_to_cpu(sb->s_maxlen); | 1189 | last = be32_to_cpu(sb->s_maxlen); |
| 1190 | if (first + JBD2_MIN_JOURNAL_BLOCKS > last + 1) { | ||
| 1191 | printk(KERN_ERR "JBD: Journal too short (blocks %llu-%llu).\n", | ||
| 1192 | first, last); | ||
| 1193 | journal_fail_superblock(journal); | ||
| 1194 | return -EINVAL; | ||
| 1195 | } | ||
| 1190 | 1196 | ||
| 1191 | journal->j_first = first; | 1197 | journal->j_first = first; |
| 1192 | journal->j_last = last; | 1198 | journal->j_last = last; |
diff --git a/fs/jbd2/transaction.c b/fs/jbd2/transaction.c index 6213ac728f30..a0512700542f 100644 --- a/fs/jbd2/transaction.c +++ b/fs/jbd2/transaction.c | |||
| @@ -57,7 +57,7 @@ jbd2_get_transaction(journal_t *journal, transaction_t *transaction) | |||
| 57 | INIT_LIST_HEAD(&transaction->t_private_list); | 57 | INIT_LIST_HEAD(&transaction->t_private_list); |
| 58 | 58 | ||
| 59 | /* Set up the commit timer for the new transaction. */ | 59 | /* Set up the commit timer for the new transaction. */ |
| 60 | journal->j_commit_timer.expires = round_jiffies(transaction->t_expires); | 60 | journal->j_commit_timer.expires = round_jiffies_up(transaction->t_expires); |
| 61 | add_timer(&journal->j_commit_timer); | 61 | add_timer(&journal->j_commit_timer); |
| 62 | 62 | ||
| 63 | J_ASSERT(journal->j_running_transaction == NULL); | 63 | J_ASSERT(journal->j_running_transaction == NULL); |
| @@ -238,6 +238,8 @@ repeat_locked: | |||
| 238 | __jbd2_log_space_left(journal)); | 238 | __jbd2_log_space_left(journal)); |
| 239 | spin_unlock(&transaction->t_handle_lock); | 239 | spin_unlock(&transaction->t_handle_lock); |
| 240 | spin_unlock(&journal->j_state_lock); | 240 | spin_unlock(&journal->j_state_lock); |
| 241 | |||
| 242 | lock_map_acquire(&handle->h_lockdep_map); | ||
| 241 | out: | 243 | out: |
| 242 | if (unlikely(new_transaction)) /* It's usually NULL */ | 244 | if (unlikely(new_transaction)) /* It's usually NULL */ |
| 243 | kfree(new_transaction); | 245 | kfree(new_transaction); |
| @@ -303,8 +305,6 @@ handle_t *jbd2_journal_start(journal_t *journal, int nblocks) | |||
| 303 | handle = ERR_PTR(err); | 305 | handle = ERR_PTR(err); |
| 304 | goto out; | 306 | goto out; |
| 305 | } | 307 | } |
| 306 | |||
| 307 | lock_map_acquire(&handle->h_lockdep_map); | ||
| 308 | out: | 308 | out: |
| 309 | return handle; | 309 | return handle; |
| 310 | } | 310 | } |
| @@ -426,6 +426,7 @@ int jbd2_journal_restart(handle_t *handle, int nblocks) | |||
| 426 | __jbd2_log_start_commit(journal, transaction->t_tid); | 426 | __jbd2_log_start_commit(journal, transaction->t_tid); |
| 427 | spin_unlock(&journal->j_state_lock); | 427 | spin_unlock(&journal->j_state_lock); |
| 428 | 428 | ||
| 429 | lock_map_release(&handle->h_lockdep_map); | ||
| 429 | handle->h_buffer_credits = nblocks; | 430 | handle->h_buffer_credits = nblocks; |
| 430 | ret = start_this_handle(journal, handle); | 431 | ret = start_this_handle(journal, handle); |
| 431 | return ret; | 432 | return ret; |
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 1fa3ffb7c93b..1b3b36068ca5 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h | |||
| @@ -356,7 +356,6 @@ void acpi_remove_dir(struct acpi_device *); | |||
| 356 | /* | 356 | /* |
| 357 | * Bind physical devices with ACPI devices | 357 | * Bind physical devices with ACPI devices |
| 358 | */ | 358 | */ |
| 359 | #include <linux/device.h> | ||
| 360 | struct acpi_bus_type { | 359 | struct acpi_bus_type { |
| 361 | struct list_head list; | 360 | struct list_head list; |
| 362 | struct bus_type *bus; | 361 | struct bus_type *bus; |
diff --git a/include/drm/drm_memory.h b/include/drm/drm_memory.h index 63e425b5ea82..15af9b32ae42 100644 --- a/include/drm/drm_memory.h +++ b/include/drm/drm_memory.h | |||
| @@ -44,8 +44,6 @@ | |||
| 44 | 44 | ||
| 45 | #if __OS_HAS_AGP | 45 | #if __OS_HAS_AGP |
| 46 | 46 | ||
| 47 | #include <linux/vmalloc.h> | ||
| 48 | |||
| 49 | #ifdef HAVE_PAGE_AGP | 47 | #ifdef HAVE_PAGE_AGP |
| 50 | #include <asm/agp.h> | 48 | #include <asm/agp.h> |
| 51 | #else | 49 | #else |
diff --git a/include/linux/aio.h b/include/linux/aio.h index 47f7d932a01d..aea219d7d8d1 100644 --- a/include/linux/aio.h +++ b/include/linux/aio.h | |||
| @@ -225,8 +225,6 @@ static inline void exit_aio(struct mm_struct *mm) { } | |||
| 225 | 225 | ||
| 226 | #define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait) | 226 | #define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait) |
| 227 | 227 | ||
| 228 | #include <linux/aio_abi.h> | ||
| 229 | |||
| 230 | static inline struct kiocb *list_kiocb(struct list_head *h) | 228 | static inline struct kiocb *list_kiocb(struct list_head *h) |
| 231 | { | 229 | { |
| 232 | return list_entry(h, struct kiocb, ki_list); | 230 | return list_entry(h, struct kiocb, ki_list); |
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index 1219be4fb42e..83d2fbd81b93 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/list.h> | 14 | #include <linux/list.h> |
| 15 | #include <linux/cache.h> | 15 | #include <linux/cache.h> |
| 16 | #include <linux/timer.h> | 16 | #include <linux/timer.h> |
| 17 | #include <linux/init.h> | ||
| 17 | #include <asm/div64.h> | 18 | #include <asm/div64.h> |
| 18 | #include <asm/io.h> | 19 | #include <asm/io.h> |
| 19 | 20 | ||
| @@ -148,14 +149,11 @@ extern u64 timecounter_cyc2time(struct timecounter *tc, | |||
| 148 | * @disable: optional function to disable the clocksource | 149 | * @disable: optional function to disable the clocksource |
| 149 | * @mask: bitmask for two's complement | 150 | * @mask: bitmask for two's complement |
| 150 | * subtraction of non 64 bit counters | 151 | * subtraction of non 64 bit counters |
| 151 | * @mult: cycle to nanosecond multiplier (adjusted by NTP) | 152 | * @mult: cycle to nanosecond multiplier |
| 152 | * @mult_orig: cycle to nanosecond multiplier (unadjusted by NTP) | ||
| 153 | * @shift: cycle to nanosecond divisor (power of two) | 153 | * @shift: cycle to nanosecond divisor (power of two) |
| 154 | * @flags: flags describing special properties | 154 | * @flags: flags describing special properties |
| 155 | * @vread: vsyscall based read | 155 | * @vread: vsyscall based read |
| 156 | * @resume: resume function for the clocksource, if necessary | 156 | * @resume: resume function for the clocksource, if necessary |
| 157 | * @cycle_interval: Used internally by timekeeping core, please ignore. | ||
| 158 | * @xtime_interval: Used internally by timekeeping core, please ignore. | ||
| 159 | */ | 157 | */ |
| 160 | struct clocksource { | 158 | struct clocksource { |
| 161 | /* | 159 | /* |
| @@ -169,7 +167,6 @@ struct clocksource { | |||
| 169 | void (*disable)(struct clocksource *cs); | 167 | void (*disable)(struct clocksource *cs); |
| 170 | cycle_t mask; | 168 | cycle_t mask; |
| 171 | u32 mult; | 169 | u32 mult; |
| 172 | u32 mult_orig; | ||
| 173 | u32 shift; | 170 | u32 shift; |
| 174 | unsigned long flags; | 171 | unsigned long flags; |
| 175 | cycle_t (*vread)(void); | 172 | cycle_t (*vread)(void); |
| @@ -181,19 +178,12 @@ struct clocksource { | |||
| 181 | #define CLKSRC_FSYS_MMIO_SET(mmio, addr) do { } while (0) | 178 | #define CLKSRC_FSYS_MMIO_SET(mmio, addr) do { } while (0) |
| 182 | #endif | 179 | #endif |
| 183 | 180 | ||
| 184 | /* timekeeping specific data, ignore */ | ||
| 185 | cycle_t cycle_interval; | ||
| 186 | u64 xtime_interval; | ||
| 187 | u32 raw_interval; | ||
| 188 | /* | 181 | /* |
| 189 | * Second part is written at each timer interrupt | 182 | * Second part is written at each timer interrupt |
| 190 | * Keep it in a different cache line to dirty no | 183 | * Keep it in a different cache line to dirty no |
| 191 | * more than one cache line. | 184 | * more than one cache line. |
| 192 | */ | 185 | */ |
| 193 | cycle_t cycle_last ____cacheline_aligned_in_smp; | 186 | cycle_t cycle_last ____cacheline_aligned_in_smp; |
| 194 | u64 xtime_nsec; | ||
| 195 | s64 error; | ||
| 196 | struct timespec raw_time; | ||
| 197 | 187 | ||
| 198 | #ifdef CONFIG_CLOCKSOURCE_WATCHDOG | 188 | #ifdef CONFIG_CLOCKSOURCE_WATCHDOG |
| 199 | /* Watchdog related data, used by the framework */ | 189 | /* Watchdog related data, used by the framework */ |
| @@ -202,8 +192,6 @@ struct clocksource { | |||
| 202 | #endif | 192 | #endif |
| 203 | }; | 193 | }; |
| 204 | 194 | ||
| 205 | extern struct clocksource *clock; /* current clocksource */ | ||
| 206 | |||
| 207 | /* | 195 | /* |
| 208 | * Clock source flags bits:: | 196 | * Clock source flags bits:: |
| 209 | */ | 197 | */ |
| @@ -212,6 +200,7 @@ extern struct clocksource *clock; /* current clocksource */ | |||
| 212 | 200 | ||
| 213 | #define CLOCK_SOURCE_WATCHDOG 0x10 | 201 | #define CLOCK_SOURCE_WATCHDOG 0x10 |
| 214 | #define CLOCK_SOURCE_VALID_FOR_HRES 0x20 | 202 | #define CLOCK_SOURCE_VALID_FOR_HRES 0x20 |
| 203 | #define CLOCK_SOURCE_UNSTABLE 0x40 | ||
| 215 | 204 | ||
| 216 | /* simplify initialization of mask field */ | 205 | /* simplify initialization of mask field */ |
| 217 | #define CLOCKSOURCE_MASK(bits) (cycle_t)((bits) < 64 ? ((1ULL<<(bits))-1) : -1) | 206 | #define CLOCKSOURCE_MASK(bits) (cycle_t)((bits) < 64 ? ((1ULL<<(bits))-1) : -1) |
| @@ -268,108 +257,15 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant) | |||
| 268 | } | 257 | } |
| 269 | 258 | ||
| 270 | /** | 259 | /** |
| 271 | * clocksource_read: - Access the clocksource's current cycle value | 260 | * clocksource_cyc2ns - converts clocksource cycles to nanoseconds |
| 272 | * @cs: pointer to clocksource being read | ||
| 273 | * | ||
| 274 | * Uses the clocksource to return the current cycle_t value | ||
| 275 | */ | ||
| 276 | static inline cycle_t clocksource_read(struct clocksource *cs) | ||
| 277 | { | ||
| 278 | return cs->read(cs); | ||
| 279 | } | ||
| 280 | |||
| 281 | /** | ||
| 282 | * clocksource_enable: - enable clocksource | ||
| 283 | * @cs: pointer to clocksource | ||
| 284 | * | ||
| 285 | * Enables the specified clocksource. The clocksource callback | ||
| 286 | * function should start up the hardware and setup mult and field | ||
| 287 | * members of struct clocksource to reflect hardware capabilities. | ||
| 288 | */ | ||
| 289 | static inline int clocksource_enable(struct clocksource *cs) | ||
| 290 | { | ||
| 291 | int ret = 0; | ||
| 292 | |||
| 293 | if (cs->enable) | ||
| 294 | ret = cs->enable(cs); | ||
| 295 | |||
| 296 | /* | ||
| 297 | * The frequency may have changed while the clocksource | ||
| 298 | * was disabled. If so the code in ->enable() must update | ||
| 299 | * the mult value to reflect the new frequency. Make sure | ||
| 300 | * mult_orig follows this change. | ||
| 301 | */ | ||
| 302 | cs->mult_orig = cs->mult; | ||
| 303 | |||
| 304 | return ret; | ||
| 305 | } | ||
| 306 | |||
| 307 | /** | ||
| 308 | * clocksource_disable: - disable clocksource | ||
| 309 | * @cs: pointer to clocksource | ||
| 310 | * | ||
| 311 | * Disables the specified clocksource. The clocksource callback | ||
| 312 | * function should power down the now unused hardware block to | ||
| 313 | * save power. | ||
| 314 | */ | ||
| 315 | static inline void clocksource_disable(struct clocksource *cs) | ||
| 316 | { | ||
| 317 | /* | ||
| 318 | * Save mult_orig in mult so clocksource_enable() can | ||
| 319 | * restore the value regardless if ->enable() updates | ||
| 320 | * the value of mult or not. | ||
| 321 | */ | ||
| 322 | cs->mult = cs->mult_orig; | ||
| 323 | |||
| 324 | if (cs->disable) | ||
| 325 | cs->disable(cs); | ||
| 326 | } | ||
| 327 | |||
| 328 | /** | ||
| 329 | * cyc2ns - converts clocksource cycles to nanoseconds | ||
| 330 | * @cs: Pointer to clocksource | ||
| 331 | * @cycles: Cycles | ||
| 332 | * | 261 | * |
| 333 | * Uses the clocksource and ntp ajdustment to convert cycle_ts to nanoseconds. | 262 | * Converts cycles to nanoseconds, using the given mult and shift. |
| 334 | * | 263 | * |
| 335 | * XXX - This could use some mult_lxl_ll() asm optimization | 264 | * XXX - This could use some mult_lxl_ll() asm optimization |
| 336 | */ | 265 | */ |
| 337 | static inline s64 cyc2ns(struct clocksource *cs, cycle_t cycles) | 266 | static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift) |
| 338 | { | ||
| 339 | u64 ret = (u64)cycles; | ||
| 340 | ret = (ret * cs->mult) >> cs->shift; | ||
| 341 | return ret; | ||
| 342 | } | ||
| 343 | |||
| 344 | /** | ||
| 345 | * clocksource_calculate_interval - Calculates a clocksource interval struct | ||
| 346 | * | ||
| 347 | * @c: Pointer to clocksource. | ||
| 348 | * @length_nsec: Desired interval length in nanoseconds. | ||
| 349 | * | ||
| 350 | * Calculates a fixed cycle/nsec interval for a given clocksource/adjustment | ||
| 351 | * pair and interval request. | ||
| 352 | * | ||
| 353 | * Unless you're the timekeeping code, you should not be using this! | ||
| 354 | */ | ||
| 355 | static inline void clocksource_calculate_interval(struct clocksource *c, | ||
| 356 | unsigned long length_nsec) | ||
| 357 | { | 267 | { |
| 358 | u64 tmp; | 268 | return ((u64) cycles * mult) >> shift; |
| 359 | |||
| 360 | /* Do the ns -> cycle conversion first, using original mult */ | ||
| 361 | tmp = length_nsec; | ||
| 362 | tmp <<= c->shift; | ||
| 363 | tmp += c->mult_orig/2; | ||
| 364 | do_div(tmp, c->mult_orig); | ||
| 365 | |||
| 366 | c->cycle_interval = (cycle_t)tmp; | ||
| 367 | if (c->cycle_interval == 0) | ||
| 368 | c->cycle_interval = 1; | ||
| 369 | |||
| 370 | /* Go back from cycles -> shifted ns, this time use ntp adjused mult */ | ||
| 371 | c->xtime_interval = (u64)c->cycle_interval * c->mult; | ||
| 372 | c->raw_interval = ((u64)c->cycle_interval * c->mult_orig) >> c->shift; | ||
| 373 | } | 269 | } |
| 374 | 270 | ||
| 375 | 271 | ||
| @@ -380,6 +276,8 @@ extern void clocksource_touch_watchdog(void); | |||
| 380 | extern struct clocksource* clocksource_get_next(void); | 276 | extern struct clocksource* clocksource_get_next(void); |
| 381 | extern void clocksource_change_rating(struct clocksource *cs, int rating); | 277 | extern void clocksource_change_rating(struct clocksource *cs, int rating); |
| 382 | extern void clocksource_resume(void); | 278 | extern void clocksource_resume(void); |
| 279 | extern struct clocksource * __init __weak clocksource_default_clock(void); | ||
| 280 | extern void clocksource_mark_unstable(struct clocksource *cs); | ||
| 383 | 281 | ||
| 384 | #ifdef CONFIG_GENERIC_TIME_VSYSCALL | 282 | #ifdef CONFIG_GENERIC_TIME_VSYSCALL |
| 385 | extern void update_vsyscall(struct timespec *ts, struct clocksource *c); | 283 | extern void update_vsyscall(struct timespec *ts, struct clocksource *c); |
| @@ -394,4 +292,6 @@ static inline void update_vsyscall_tz(void) | |||
| 394 | } | 292 | } |
| 395 | #endif | 293 | #endif |
| 396 | 294 | ||
| 295 | extern void timekeeping_notify(struct clocksource *clock); | ||
| 296 | |||
| 397 | #endif /* _LINUX_CLOCKSOURCE_H */ | 297 | #endif /* _LINUX_CLOCKSOURCE_H */ |
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index 161042746afc..44717eb47639 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h | |||
| @@ -65,6 +65,9 @@ static inline int cpufreq_unregister_notifier(struct notifier_block *nb, | |||
| 65 | 65 | ||
| 66 | struct cpufreq_governor; | 66 | struct cpufreq_governor; |
| 67 | 67 | ||
| 68 | /* /sys/devices/system/cpu/cpufreq: entry point for global variables */ | ||
| 69 | extern struct kobject *cpufreq_global_kobject; | ||
| 70 | |||
| 68 | #define CPUFREQ_ETERNAL (-1) | 71 | #define CPUFREQ_ETERNAL (-1) |
| 69 | struct cpufreq_cpuinfo { | 72 | struct cpufreq_cpuinfo { |
| 70 | unsigned int max_freq; | 73 | unsigned int max_freq; |
| @@ -274,6 +277,13 @@ struct freq_attr { | |||
| 274 | ssize_t (*store)(struct cpufreq_policy *, const char *, size_t count); | 277 | ssize_t (*store)(struct cpufreq_policy *, const char *, size_t count); |
| 275 | }; | 278 | }; |
| 276 | 279 | ||
| 280 | struct global_attr { | ||
| 281 | struct attribute attr; | ||
| 282 | ssize_t (*show)(struct kobject *kobj, | ||
| 283 | struct attribute *attr, char *buf); | ||
| 284 | ssize_t (*store)(struct kobject *a, struct attribute *b, | ||
| 285 | const char *c, size_t count); | ||
| 286 | }; | ||
| 277 | 287 | ||
| 278 | /********************************************************************* | 288 | /********************************************************************* |
| 279 | * CPUFREQ 2.6. INTERFACE * | 289 | * CPUFREQ 2.6. INTERFACE * |
diff --git a/include/linux/cyclades.h b/include/linux/cyclades.h index 1fbdea4f08eb..a5049eaf782d 100644 --- a/include/linux/cyclades.h +++ b/include/linux/cyclades.h | |||
| @@ -499,6 +499,7 @@ struct cyclades_card { | |||
| 499 | void __iomem *p9050; | 499 | void __iomem *p9050; |
| 500 | struct RUNTIME_9060 __iomem *p9060; | 500 | struct RUNTIME_9060 __iomem *p9060; |
| 501 | } ctl_addr; | 501 | } ctl_addr; |
| 502 | struct BOARD_CTRL __iomem *board_ctrl; /* cyz specific */ | ||
| 502 | int irq; | 503 | int irq; |
| 503 | unsigned int num_chips; /* 0 if card absent, -1 if Z/PCI, else Y */ | 504 | unsigned int num_chips; /* 0 if card absent, -1 if Z/PCI, else Y */ |
| 504 | unsigned int first_line; /* minor number of first channel on card */ | 505 | unsigned int first_line; /* minor number of first channel on card */ |
| @@ -541,6 +542,15 @@ struct cyclades_port { | |||
| 541 | int magic; | 542 | int magic; |
| 542 | struct tty_port port; | 543 | struct tty_port port; |
| 543 | struct cyclades_card *card; | 544 | struct cyclades_card *card; |
| 545 | union { | ||
| 546 | struct { | ||
| 547 | void __iomem *base_addr; | ||
| 548 | } cyy; | ||
| 549 | struct { | ||
| 550 | struct CH_CTRL __iomem *ch_ctrl; | ||
| 551 | struct BUF_CTRL __iomem *buf_ctrl; | ||
| 552 | } cyz; | ||
| 553 | } u; | ||
| 544 | int line; | 554 | int line; |
| 545 | int flags; /* defined in tty.h */ | 555 | int flags; /* defined in tty.h */ |
| 546 | int type; /* UART type */ | 556 | int type; /* UART type */ |
| @@ -568,7 +578,6 @@ struct cyclades_port { | |||
| 568 | struct cyclades_idle_stats idle_stats; | 578 | struct cyclades_idle_stats idle_stats; |
| 569 | struct cyclades_icount icount; | 579 | struct cyclades_icount icount; |
| 570 | struct completion shutdown_wait; | 580 | struct completion shutdown_wait; |
| 571 | wait_queue_head_t delta_msr_wait; | ||
| 572 | int throttle; | 581 | int throttle; |
| 573 | }; | 582 | }; |
| 574 | 583 | ||
diff --git a/include/linux/delayacct.h b/include/linux/delayacct.h index f352f06fa063..5076fe0c8a96 100644 --- a/include/linux/delayacct.h +++ b/include/linux/delayacct.h | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | #define _LINUX_DELAYACCT_H | 18 | #define _LINUX_DELAYACCT_H |
| 19 | 19 | ||
| 20 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
| 21 | #include <linux/taskstats_kern.h> | ||
| 22 | 21 | ||
| 23 | /* | 22 | /* |
| 24 | * Per-task flags relevant to delay accounting | 23 | * Per-task flags relevant to delay accounting |
diff --git a/include/linux/device.h b/include/linux/device.h index 847b763e40e9..aca31bf7d8ed 100644 --- a/include/linux/device.h +++ b/include/linux/device.h | |||
| @@ -193,7 +193,7 @@ struct class { | |||
| 193 | struct kobject *dev_kobj; | 193 | struct kobject *dev_kobj; |
| 194 | 194 | ||
| 195 | int (*dev_uevent)(struct device *dev, struct kobj_uevent_env *env); | 195 | int (*dev_uevent)(struct device *dev, struct kobj_uevent_env *env); |
| 196 | char *(*nodename)(struct device *dev); | 196 | char *(*devnode)(struct device *dev, mode_t *mode); |
| 197 | 197 | ||
| 198 | void (*class_release)(struct class *class); | 198 | void (*class_release)(struct class *class); |
| 199 | void (*dev_release)(struct device *dev); | 199 | void (*dev_release)(struct device *dev); |
| @@ -298,7 +298,7 @@ struct device_type { | |||
| 298 | const char *name; | 298 | const char *name; |
| 299 | const struct attribute_group **groups; | 299 | const struct attribute_group **groups; |
| 300 | int (*uevent)(struct device *dev, struct kobj_uevent_env *env); | 300 | int (*uevent)(struct device *dev, struct kobj_uevent_env *env); |
| 301 | char *(*nodename)(struct device *dev); | 301 | char *(*devnode)(struct device *dev, mode_t *mode); |
| 302 | void (*release)(struct device *dev); | 302 | void (*release)(struct device *dev); |
| 303 | 303 | ||
| 304 | const struct dev_pm_ops *pm; | 304 | const struct dev_pm_ops *pm; |
| @@ -487,7 +487,8 @@ extern struct device *device_find_child(struct device *dev, void *data, | |||
| 487 | extern int device_rename(struct device *dev, char *new_name); | 487 | extern int device_rename(struct device *dev, char *new_name); |
| 488 | extern int device_move(struct device *dev, struct device *new_parent, | 488 | extern int device_move(struct device *dev, struct device *new_parent, |
| 489 | enum dpm_order dpm_order); | 489 | enum dpm_order dpm_order); |
| 490 | extern const char *device_get_nodename(struct device *dev, const char **tmp); | 490 | extern const char *device_get_devnode(struct device *dev, |
| 491 | mode_t *mode, const char **tmp); | ||
| 491 | extern void *dev_get_drvdata(const struct device *dev); | 492 | extern void *dev_get_drvdata(const struct device *dev); |
| 492 | extern void dev_set_drvdata(struct device *dev, void *data); | 493 | extern void dev_set_drvdata(struct device *dev, void *data); |
| 493 | 494 | ||
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h index dc3b1328aaeb..3c0924a18daf 100644 --- a/include/linux/ftrace.h +++ b/include/linux/ftrace.h | |||
| @@ -446,7 +446,6 @@ static inline void unpause_graph_tracing(void) { } | |||
| 446 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | 446 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ |
| 447 | 447 | ||
| 448 | #ifdef CONFIG_TRACING | 448 | #ifdef CONFIG_TRACING |
| 449 | #include <linux/sched.h> | ||
| 450 | 449 | ||
| 451 | /* flags for current->trace */ | 450 | /* flags for current->trace */ |
| 452 | enum { | 451 | enum { |
diff --git a/include/linux/fuse.h b/include/linux/fuse.h index cf593bf9fd32..3e2925a34bf0 100644 --- a/include/linux/fuse.h +++ b/include/linux/fuse.h | |||
| @@ -30,6 +30,10 @@ | |||
| 30 | * - add umask flag to input argument of open, mknod and mkdir | 30 | * - add umask flag to input argument of open, mknod and mkdir |
| 31 | * - add notification messages for invalidation of inodes and | 31 | * - add notification messages for invalidation of inodes and |
| 32 | * directory entries | 32 | * directory entries |
| 33 | * | ||
| 34 | * 7.13 | ||
| 35 | * - make max number of background requests and congestion threshold | ||
| 36 | * tunables | ||
| 33 | */ | 37 | */ |
| 34 | 38 | ||
| 35 | #ifndef _LINUX_FUSE_H | 39 | #ifndef _LINUX_FUSE_H |
| @@ -37,11 +41,31 @@ | |||
| 37 | 41 | ||
| 38 | #include <linux/types.h> | 42 | #include <linux/types.h> |
| 39 | 43 | ||
| 44 | /* | ||
| 45 | * Version negotiation: | ||
| 46 | * | ||
| 47 | * Both the kernel and userspace send the version they support in the | ||
| 48 | * INIT request and reply respectively. | ||
| 49 | * | ||
| 50 | * If the major versions match then both shall use the smallest | ||
| 51 | * of the two minor versions for communication. | ||
| 52 | * | ||
| 53 | * If the kernel supports a larger major version, then userspace shall | ||
| 54 | * reply with the major version it supports, ignore the rest of the | ||
| 55 | * INIT message and expect a new INIT message from the kernel with a | ||
| 56 | * matching major version. | ||
| 57 | * | ||
| 58 | * If the library supports a larger major version, then it shall fall | ||
| 59 | * back to the major protocol version sent by the kernel for | ||
| 60 | * communication and reply with that major version (and an arbitrary | ||
| 61 | * supported minor version). | ||
| 62 | */ | ||
| 63 | |||
| 40 | /** Version number of this interface */ | 64 | /** Version number of this interface */ |
| 41 | #define FUSE_KERNEL_VERSION 7 | 65 | #define FUSE_KERNEL_VERSION 7 |
| 42 | 66 | ||
| 43 | /** Minor version number of this interface */ | 67 | /** Minor version number of this interface */ |
| 44 | #define FUSE_KERNEL_MINOR_VERSION 12 | 68 | #define FUSE_KERNEL_MINOR_VERSION 13 |
| 45 | 69 | ||
| 46 | /** The node ID of the root inode */ | 70 | /** The node ID of the root inode */ |
| 47 | #define FUSE_ROOT_ID 1 | 71 | #define FUSE_ROOT_ID 1 |
| @@ -427,7 +451,8 @@ struct fuse_init_out { | |||
| 427 | __u32 minor; | 451 | __u32 minor; |
| 428 | __u32 max_readahead; | 452 | __u32 max_readahead; |
| 429 | __u32 flags; | 453 | __u32 flags; |
| 430 | __u32 unused; | 454 | __u16 max_background; |
| 455 | __u16 congestion_threshold; | ||
| 431 | __u32 max_write; | 456 | __u32 max_write; |
| 432 | }; | 457 | }; |
| 433 | 458 | ||
diff --git a/include/linux/genhd.h b/include/linux/genhd.h index 44263cb27121..109d179adb93 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h | |||
| @@ -142,7 +142,7 @@ struct gendisk { | |||
| 142 | * disks that can't be partitioned. */ | 142 | * disks that can't be partitioned. */ |
| 143 | 143 | ||
| 144 | char disk_name[DISK_NAME_LEN]; /* name of major driver */ | 144 | char disk_name[DISK_NAME_LEN]; /* name of major driver */ |
| 145 | char *(*nodename)(struct gendisk *gd); | 145 | char *(*devnode)(struct gendisk *gd, mode_t *mode); |
| 146 | /* Array of pointers to partitions indexed by partno. | 146 | /* Array of pointers to partitions indexed by partno. |
| 147 | * Protected with matching bdev lock but stat and other | 147 | * Protected with matching bdev lock but stat and other |
| 148 | * non-critical accesses use RCU. Always access through | 148 | * non-critical accesses use RCU. Always access through |
diff --git a/include/linux/hayesesp.h b/include/linux/hayesesp.h index 940aeb51d53f..92b08cfe4a75 100644 --- a/include/linux/hayesesp.h +++ b/include/linux/hayesesp.h | |||
| @@ -96,7 +96,6 @@ struct esp_struct { | |||
| 96 | int xmit_head; | 96 | int xmit_head; |
| 97 | int xmit_tail; | 97 | int xmit_tail; |
| 98 | int xmit_cnt; | 98 | int xmit_cnt; |
| 99 | wait_queue_head_t delta_msr_wait; | ||
| 100 | wait_queue_head_t break_wait; | 99 | wait_queue_head_t break_wait; |
| 101 | struct async_icount icount; /* kernel counters for the 4 input interrupts */ | 100 | struct async_icount icount; /* kernel counters for the 4 input interrupts */ |
| 102 | struct hayes_esp_config config; /* port configuration */ | 101 | struct hayes_esp_config config; /* port configuration */ |
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h index 4759917adc71..ff037f0b1b4e 100644 --- a/include/linux/hrtimer.h +++ b/include/linux/hrtimer.h | |||
| @@ -91,7 +91,6 @@ enum hrtimer_restart { | |||
| 91 | * @function: timer expiry callback function | 91 | * @function: timer expiry callback function |
| 92 | * @base: pointer to the timer base (per cpu and per clock) | 92 | * @base: pointer to the timer base (per cpu and per clock) |
| 93 | * @state: state information (See bit values above) | 93 | * @state: state information (See bit values above) |
| 94 | * @cb_entry: list head to enqueue an expired timer into the callback list | ||
| 95 | * @start_site: timer statistics field to store the site where the timer | 94 | * @start_site: timer statistics field to store the site where the timer |
| 96 | * was started | 95 | * was started |
| 97 | * @start_comm: timer statistics field to store the name of the process which | 96 | * @start_comm: timer statistics field to store the name of the process which |
| @@ -108,7 +107,6 @@ struct hrtimer { | |||
| 108 | enum hrtimer_restart (*function)(struct hrtimer *); | 107 | enum hrtimer_restart (*function)(struct hrtimer *); |
| 109 | struct hrtimer_clock_base *base; | 108 | struct hrtimer_clock_base *base; |
| 110 | unsigned long state; | 109 | unsigned long state; |
| 111 | struct list_head cb_entry; | ||
| 112 | #ifdef CONFIG_TIMER_STATS | 110 | #ifdef CONFIG_TIMER_STATS |
| 113 | int start_pid; | 111 | int start_pid; |
| 114 | void *start_site; | 112 | void *start_site; |
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h index 3fd21d7cb6bf..2d02dfd7076c 100644 --- a/include/linux/i2c/twl4030.h +++ b/include/linux/i2c/twl4030.h | |||
| @@ -223,19 +223,28 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); | |||
| 223 | 223 | ||
| 224 | /* Power bus message definitions */ | 224 | /* Power bus message definitions */ |
| 225 | 225 | ||
| 226 | #define DEV_GRP_NULL 0x0 | 226 | /* The TWL4030/5030 splits its power-management resources (the various |
| 227 | #define DEV_GRP_P1 0x1 | 227 | * regulators, clock and reset lines) into 3 processor groups - P1, P2 and |
| 228 | #define DEV_GRP_P2 0x2 | 228 | * P3. These groups can then be configured to transition between sleep, wait-on |
| 229 | #define DEV_GRP_P3 0x4 | 229 | * and active states by sending messages to the power bus. See Section 5.4.2 |
| 230 | * Power Resources of TWL4030 TRM | ||
| 231 | */ | ||
| 230 | 232 | ||
| 231 | #define RES_GRP_RES 0x0 | 233 | /* Processor groups */ |
| 232 | #define RES_GRP_PP 0x1 | 234 | #define DEV_GRP_NULL 0x0 |
| 233 | #define RES_GRP_RC 0x2 | 235 | #define DEV_GRP_P1 0x1 /* P1: all OMAP devices */ |
| 236 | #define DEV_GRP_P2 0x2 /* P2: all Modem devices */ | ||
| 237 | #define DEV_GRP_P3 0x4 /* P3: all peripheral devices */ | ||
| 238 | |||
| 239 | /* Resource groups */ | ||
| 240 | #define RES_GRP_RES 0x0 /* Reserved */ | ||
| 241 | #define RES_GRP_PP 0x1 /* Power providers */ | ||
| 242 | #define RES_GRP_RC 0x2 /* Reset and control */ | ||
| 234 | #define RES_GRP_PP_RC 0x3 | 243 | #define RES_GRP_PP_RC 0x3 |
| 235 | #define RES_GRP_PR 0x4 | 244 | #define RES_GRP_PR 0x4 /* Power references */ |
| 236 | #define RES_GRP_PP_PR 0x5 | 245 | #define RES_GRP_PP_PR 0x5 |
| 237 | #define RES_GRP_RC_PR 0x6 | 246 | #define RES_GRP_RC_PR 0x6 |
| 238 | #define RES_GRP_ALL 0x7 | 247 | #define RES_GRP_ALL 0x7 /* All resource groups */ |
| 239 | 248 | ||
| 240 | #define RES_TYPE2_R0 0x0 | 249 | #define RES_TYPE2_R0 0x0 |
| 241 | 250 | ||
| @@ -246,6 +255,41 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); | |||
| 246 | #define RES_STATE_SLEEP 0x8 | 255 | #define RES_STATE_SLEEP 0x8 |
| 247 | #define RES_STATE_OFF 0x0 | 256 | #define RES_STATE_OFF 0x0 |
| 248 | 257 | ||
| 258 | /* Power resources */ | ||
| 259 | |||
| 260 | /* Power providers */ | ||
| 261 | #define RES_VAUX1 1 | ||
| 262 | #define RES_VAUX2 2 | ||
| 263 | #define RES_VAUX3 3 | ||
| 264 | #define RES_VAUX4 4 | ||
| 265 | #define RES_VMMC1 5 | ||
| 266 | #define RES_VMMC2 6 | ||
| 267 | #define RES_VPLL1 7 | ||
| 268 | #define RES_VPLL2 8 | ||
| 269 | #define RES_VSIM 9 | ||
| 270 | #define RES_VDAC 10 | ||
| 271 | #define RES_VINTANA1 11 | ||
| 272 | #define RES_VINTANA2 12 | ||
| 273 | #define RES_VINTDIG 13 | ||
| 274 | #define RES_VIO 14 | ||
| 275 | #define RES_VDD1 15 | ||
| 276 | #define RES_VDD2 16 | ||
| 277 | #define RES_VUSB_1V5 17 | ||
| 278 | #define RES_VUSB_1V8 18 | ||
| 279 | #define RES_VUSB_3V1 19 | ||
| 280 | #define RES_VUSBCP 20 | ||
| 281 | #define RES_REGEN 21 | ||
| 282 | /* Reset and control */ | ||
| 283 | #define RES_NRES_PWRON 22 | ||
| 284 | #define RES_CLKEN 23 | ||
| 285 | #define RES_SYSEN 24 | ||
| 286 | #define RES_HFCLKOUT 25 | ||
| 287 | #define RES_32KCLKOUT 26 | ||
| 288 | #define RES_RESET 27 | ||
| 289 | /* Power Reference */ | ||
| 290 | #define RES_Main_Ref 28 | ||
| 291 | |||
| 292 | #define TOTAL_RESOURCES 28 | ||
| 249 | /* | 293 | /* |
| 250 | * Power Bus Message Format ... these can be sent individually by Linux, | 294 | * Power Bus Message Format ... these can be sent individually by Linux, |
| 251 | * but are usually part of downloaded scripts that are run when various | 295 | * but are usually part of downloaded scripts that are run when various |
| @@ -327,6 +371,36 @@ struct twl4030_usb_data { | |||
| 327 | enum twl4030_usb_mode usb_mode; | 371 | enum twl4030_usb_mode usb_mode; |
| 328 | }; | 372 | }; |
| 329 | 373 | ||
| 374 | struct twl4030_ins { | ||
| 375 | u16 pmb_message; | ||
| 376 | u8 delay; | ||
| 377 | }; | ||
| 378 | |||
| 379 | struct twl4030_script { | ||
| 380 | struct twl4030_ins *script; | ||
| 381 | unsigned size; | ||
| 382 | u8 flags; | ||
| 383 | #define TWL4030_WRST_SCRIPT (1<<0) | ||
| 384 | #define TWL4030_WAKEUP12_SCRIPT (1<<1) | ||
| 385 | #define TWL4030_WAKEUP3_SCRIPT (1<<2) | ||
| 386 | #define TWL4030_SLEEP_SCRIPT (1<<3) | ||
| 387 | }; | ||
| 388 | |||
| 389 | struct twl4030_resconfig { | ||
| 390 | u8 resource; | ||
| 391 | u8 devgroup; /* Processor group that Power resource belongs to */ | ||
| 392 | u8 type; /* Power resource addressed, 6 / broadcast message */ | ||
| 393 | u8 type2; /* Power resource addressed, 3 / broadcast message */ | ||
| 394 | }; | ||
| 395 | |||
| 396 | struct twl4030_power_data { | ||
| 397 | struct twl4030_script **scripts; | ||
| 398 | unsigned num; | ||
| 399 | struct twl4030_resconfig *resource_config; | ||
| 400 | }; | ||
| 401 | |||
| 402 | extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); | ||
| 403 | |||
| 330 | struct twl4030_platform_data { | 404 | struct twl4030_platform_data { |
| 331 | unsigned irq_base, irq_end; | 405 | unsigned irq_base, irq_end; |
| 332 | struct twl4030_bci_platform_data *bci; | 406 | struct twl4030_bci_platform_data *bci; |
| @@ -334,6 +408,7 @@ struct twl4030_platform_data { | |||
| 334 | struct twl4030_madc_platform_data *madc; | 408 | struct twl4030_madc_platform_data *madc; |
| 335 | struct twl4030_keypad_data *keypad; | 409 | struct twl4030_keypad_data *keypad; |
| 336 | struct twl4030_usb_data *usb; | 410 | struct twl4030_usb_data *usb; |
| 411 | struct twl4030_power_data *power; | ||
| 337 | 412 | ||
| 338 | /* LDO regulators */ | 413 | /* LDO regulators */ |
| 339 | struct regulator_init_data *vdac; | 414 | struct regulator_init_data *vdac; |
| @@ -364,7 +439,6 @@ int twl4030_sih_setup(int module); | |||
| 364 | #define TWL4030_VAUX3_DEV_GRP 0x1F | 439 | #define TWL4030_VAUX3_DEV_GRP 0x1F |
| 365 | #define TWL4030_VAUX3_DEDICATED 0x22 | 440 | #define TWL4030_VAUX3_DEDICATED 0x22 |
| 366 | 441 | ||
| 367 | |||
| 368 | #if defined(CONFIG_TWL4030_BCI_BATTERY) || \ | 442 | #if defined(CONFIG_TWL4030_BCI_BATTERY) || \ |
| 369 | defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) | 443 | defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) |
| 370 | extern int twl4030charger_usb_en(int enable); | 444 | extern int twl4030charger_usb_en(int enable); |
diff --git a/include/linux/jbd.h b/include/linux/jbd.h index c2049a04fa0b..a1187a0c99b4 100644 --- a/include/linux/jbd.h +++ b/include/linux/jbd.h | |||
| @@ -446,7 +446,7 @@ struct transaction_s | |||
| 446 | /* | 446 | /* |
| 447 | * Where in the log does this transaction's commit start? [no locking] | 447 | * Where in the log does this transaction's commit start? [no locking] |
| 448 | */ | 448 | */ |
| 449 | unsigned long t_log_start; | 449 | unsigned int t_log_start; |
| 450 | 450 | ||
| 451 | /* Number of buffers on the t_buffers list [j_list_lock] */ | 451 | /* Number of buffers on the t_buffers list [j_list_lock] */ |
| 452 | int t_nr_buffers; | 452 | int t_nr_buffers; |
| @@ -701,26 +701,26 @@ struct journal_s | |||
| 701 | * Journal head: identifies the first unused block in the journal. | 701 | * Journal head: identifies the first unused block in the journal. |
| 702 | * [j_state_lock] | 702 | * [j_state_lock] |
| 703 | */ | 703 | */ |
| 704 | unsigned long j_head; | 704 | unsigned int j_head; |
| 705 | 705 | ||
| 706 | /* | 706 | /* |
| 707 | * Journal tail: identifies the oldest still-used block in the journal. | 707 | * Journal tail: identifies the oldest still-used block in the journal. |
| 708 | * [j_state_lock] | 708 | * [j_state_lock] |
| 709 | */ | 709 | */ |
| 710 | unsigned long j_tail; | 710 | unsigned int j_tail; |
| 711 | 711 | ||
| 712 | /* | 712 | /* |
| 713 | * Journal free: how many free blocks are there in the journal? | 713 | * Journal free: how many free blocks are there in the journal? |
| 714 | * [j_state_lock] | 714 | * [j_state_lock] |
| 715 | */ | 715 | */ |
| 716 | unsigned long j_free; | 716 | unsigned int j_free; |
| 717 | 717 | ||
| 718 | /* | 718 | /* |
| 719 | * Journal start and end: the block numbers of the first usable block | 719 | * Journal start and end: the block numbers of the first usable block |
| 720 | * and one beyond the last usable block in the journal. [j_state_lock] | 720 | * and one beyond the last usable block in the journal. [j_state_lock] |
| 721 | */ | 721 | */ |
| 722 | unsigned long j_first; | 722 | unsigned int j_first; |
| 723 | unsigned long j_last; | 723 | unsigned int j_last; |
| 724 | 724 | ||
| 725 | /* | 725 | /* |
| 726 | * Device, blocksize and starting block offset for the location where we | 726 | * Device, blocksize and starting block offset for the location where we |
| @@ -728,7 +728,7 @@ struct journal_s | |||
| 728 | */ | 728 | */ |
| 729 | struct block_device *j_dev; | 729 | struct block_device *j_dev; |
| 730 | int j_blocksize; | 730 | int j_blocksize; |
| 731 | unsigned long j_blk_offset; | 731 | unsigned int j_blk_offset; |
| 732 | 732 | ||
| 733 | /* | 733 | /* |
| 734 | * Device which holds the client fs. For internal journal this will be | 734 | * Device which holds the client fs. For internal journal this will be |
| @@ -859,7 +859,7 @@ extern void __journal_clean_data_list(transaction_t *transaction); | |||
| 859 | 859 | ||
| 860 | /* Log buffer allocation */ | 860 | /* Log buffer allocation */ |
| 861 | extern struct journal_head * journal_get_descriptor_buffer(journal_t *); | 861 | extern struct journal_head * journal_get_descriptor_buffer(journal_t *); |
| 862 | int journal_next_log_block(journal_t *, unsigned long *); | 862 | int journal_next_log_block(journal_t *, unsigned int *); |
| 863 | 863 | ||
| 864 | /* Commit management */ | 864 | /* Commit management */ |
| 865 | extern void journal_commit_transaction(journal_t *); | 865 | extern void journal_commit_transaction(journal_t *); |
| @@ -874,7 +874,7 @@ extern int | |||
| 874 | journal_write_metadata_buffer(transaction_t *transaction, | 874 | journal_write_metadata_buffer(transaction_t *transaction, |
| 875 | struct journal_head *jh_in, | 875 | struct journal_head *jh_in, |
| 876 | struct journal_head **jh_out, | 876 | struct journal_head **jh_out, |
| 877 | unsigned long blocknr); | 877 | unsigned int blocknr); |
| 878 | 878 | ||
| 879 | /* Transaction locking */ | 879 | /* Transaction locking */ |
| 880 | extern void __wait_on_journal (journal_t *); | 880 | extern void __wait_on_journal (journal_t *); |
| @@ -942,7 +942,7 @@ extern void journal_abort (journal_t *, int); | |||
| 942 | extern int journal_errno (journal_t *); | 942 | extern int journal_errno (journal_t *); |
| 943 | extern void journal_ack_err (journal_t *); | 943 | extern void journal_ack_err (journal_t *); |
| 944 | extern int journal_clear_err (journal_t *); | 944 | extern int journal_clear_err (journal_t *); |
| 945 | extern int journal_bmap(journal_t *, unsigned long, unsigned long *); | 945 | extern int journal_bmap(journal_t *, unsigned int, unsigned int *); |
| 946 | extern int journal_force_commit(journal_t *); | 946 | extern int journal_force_commit(journal_t *); |
| 947 | 947 | ||
| 948 | /* | 948 | /* |
| @@ -976,14 +976,14 @@ extern int journal_init_revoke_caches(void); | |||
| 976 | 976 | ||
| 977 | extern void journal_destroy_revoke(journal_t *); | 977 | extern void journal_destroy_revoke(journal_t *); |
| 978 | extern int journal_revoke (handle_t *, | 978 | extern int journal_revoke (handle_t *, |
| 979 | unsigned long, struct buffer_head *); | 979 | unsigned int, struct buffer_head *); |
| 980 | extern int journal_cancel_revoke(handle_t *, struct journal_head *); | 980 | extern int journal_cancel_revoke(handle_t *, struct journal_head *); |
| 981 | extern void journal_write_revoke_records(journal_t *, | 981 | extern void journal_write_revoke_records(journal_t *, |
| 982 | transaction_t *, int); | 982 | transaction_t *, int); |
| 983 | 983 | ||
| 984 | /* Recovery revoke support */ | 984 | /* Recovery revoke support */ |
| 985 | extern int journal_set_revoke(journal_t *, unsigned long, tid_t); | 985 | extern int journal_set_revoke(journal_t *, unsigned int, tid_t); |
| 986 | extern int journal_test_revoke(journal_t *, unsigned long, tid_t); | 986 | extern int journal_test_revoke(journal_t *, unsigned int, tid_t); |
| 987 | extern void journal_clear_revoke(journal_t *); | 987 | extern void journal_clear_revoke(journal_t *); |
| 988 | extern void journal_switch_revoke_table(journal_t *journal); | 988 | extern void journal_switch_revoke_table(journal_t *journal); |
| 989 | 989 | ||
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h index d97eb652d6ca..52695d3dfd0b 100644 --- a/include/linux/jbd2.h +++ b/include/linux/jbd2.h | |||
| @@ -652,7 +652,7 @@ struct transaction_s | |||
| 652 | * This transaction is being forced and some process is | 652 | * This transaction is being forced and some process is |
| 653 | * waiting for it to finish. | 653 | * waiting for it to finish. |
| 654 | */ | 654 | */ |
| 655 | int t_synchronous_commit:1; | 655 | unsigned int t_synchronous_commit:1; |
| 656 | 656 | ||
| 657 | /* | 657 | /* |
| 658 | * For use by the filesystem to store fs-specific data | 658 | * For use by the filesystem to store fs-specific data |
diff --git a/include/linux/kfifo.h b/include/linux/kfifo.h index 29f62e1733ff..ad6bdf5a5970 100644 --- a/include/linux/kfifo.h +++ b/include/linux/kfifo.h | |||
| @@ -38,7 +38,7 @@ extern struct kfifo *kfifo_alloc(unsigned int size, gfp_t gfp_mask, | |||
| 38 | spinlock_t *lock); | 38 | spinlock_t *lock); |
| 39 | extern void kfifo_free(struct kfifo *fifo); | 39 | extern void kfifo_free(struct kfifo *fifo); |
| 40 | extern unsigned int __kfifo_put(struct kfifo *fifo, | 40 | extern unsigned int __kfifo_put(struct kfifo *fifo, |
| 41 | unsigned char *buffer, unsigned int len); | 41 | const unsigned char *buffer, unsigned int len); |
| 42 | extern unsigned int __kfifo_get(struct kfifo *fifo, | 42 | extern unsigned int __kfifo_get(struct kfifo *fifo, |
| 43 | unsigned char *buffer, unsigned int len); | 43 | unsigned char *buffer, unsigned int len); |
| 44 | 44 | ||
| @@ -77,7 +77,7 @@ static inline void kfifo_reset(struct kfifo *fifo) | |||
| 77 | * bytes copied. | 77 | * bytes copied. |
| 78 | */ | 78 | */ |
| 79 | static inline unsigned int kfifo_put(struct kfifo *fifo, | 79 | static inline unsigned int kfifo_put(struct kfifo *fifo, |
| 80 | unsigned char *buffer, unsigned int len) | 80 | const unsigned char *buffer, unsigned int len) |
| 81 | { | 81 | { |
| 82 | unsigned long flags; | 82 | unsigned long flags; |
| 83 | unsigned int ret; | 83 | unsigned int ret; |
diff --git a/include/linux/mfd/ab3100.h b/include/linux/mfd/ab3100.h index 7a3f316e3848..e9aa4c9d749d 100644 --- a/include/linux/mfd/ab3100.h +++ b/include/linux/mfd/ab3100.h | |||
| @@ -6,6 +6,8 @@ | |||
| 6 | */ | 6 | */ |
| 7 | 7 | ||
| 8 | #include <linux/device.h> | 8 | #include <linux/device.h> |
| 9 | #include <linux/workqueue.h> | ||
| 10 | #include <linux/regulator/machine.h> | ||
| 9 | 11 | ||
| 10 | #ifndef MFD_AB3100_H | 12 | #ifndef MFD_AB3100_H |
| 11 | #define MFD_AB3100_H | 13 | #define MFD_AB3100_H |
| @@ -56,6 +58,14 @@ | |||
| 56 | #define AB3100_STR_BATT_REMOVAL (0x40) | 58 | #define AB3100_STR_BATT_REMOVAL (0x40) |
| 57 | #define AB3100_STR_VBUS (0x80) | 59 | #define AB3100_STR_VBUS (0x80) |
| 58 | 60 | ||
| 61 | /* | ||
| 62 | * AB3100 contains 8 regulators, one external regulator controller | ||
| 63 | * and a buck converter, further the LDO E and buck converter can | ||
| 64 | * have separate settings if they are in sleep mode, this is | ||
| 65 | * modeled as a separate regulator. | ||
| 66 | */ | ||
| 67 | #define AB3100_NUM_REGULATORS 10 | ||
| 68 | |||
| 59 | /** | 69 | /** |
| 60 | * struct ab3100 | 70 | * struct ab3100 |
| 61 | * @access_mutex: lock out concurrent accesses to the AB3100 registers | 71 | * @access_mutex: lock out concurrent accesses to the AB3100 registers |
| @@ -86,11 +96,30 @@ struct ab3100 { | |||
| 86 | bool startup_events_read; | 96 | bool startup_events_read; |
| 87 | }; | 97 | }; |
| 88 | 98 | ||
| 89 | int ab3100_set_register(struct ab3100 *ab3100, u8 reg, u8 regval); | 99 | /** |
| 90 | int ab3100_get_register(struct ab3100 *ab3100, u8 reg, u8 *regval); | 100 | * struct ab3100_platform_data |
| 91 | int ab3100_get_register_page(struct ab3100 *ab3100, | 101 | * Data supplied to initialize board connections to the AB3100 |
| 102 | * @reg_constraints: regulator constraints for target board | ||
| 103 | * the order of these constraints are: LDO A, C, D, E, | ||
| 104 | * F, G, H, K, EXT and BUCK. | ||
| 105 | * @reg_initvals: initial values for the regulator registers | ||
| 106 | * plus two sleep settings for LDO E and the BUCK converter. | ||
| 107 | * exactly AB3100_NUM_REGULATORS+2 values must be sent in. | ||
| 108 | * Order: LDO A, C, E, E sleep, F, G, H, K, EXT, BUCK, | ||
| 109 | * BUCK sleep, LDO D. (LDO D need to be initialized last.) | ||
| 110 | * @external_voltage: voltage level of the external regulator. | ||
| 111 | */ | ||
| 112 | struct ab3100_platform_data { | ||
| 113 | struct regulator_init_data reg_constraints[AB3100_NUM_REGULATORS]; | ||
| 114 | u8 reg_initvals[AB3100_NUM_REGULATORS+2]; | ||
| 115 | int external_voltage; | ||
| 116 | }; | ||
| 117 | |||
| 118 | int ab3100_set_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 regval); | ||
| 119 | int ab3100_get_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 *regval); | ||
| 120 | int ab3100_get_register_page_interruptible(struct ab3100 *ab3100, | ||
| 92 | u8 first_reg, u8 *regvals, u8 numregs); | 121 | u8 first_reg, u8 *regvals, u8 numregs); |
| 93 | int ab3100_mask_and_set_register(struct ab3100 *ab3100, | 122 | int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100, |
| 94 | u8 reg, u8 andmask, u8 ormask); | 123 | u8 reg, u8 andmask, u8 ormask); |
| 95 | u8 ab3100_get_chip_type(struct ab3100 *ab3100); | 124 | u8 ab3100_get_chip_type(struct ab3100 *ab3100); |
| 96 | int ab3100_event_register(struct ab3100 *ab3100, | 125 | int ab3100_event_register(struct ab3100 *ab3100, |
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h index 49ef857cdb2d..11d740b8831d 100644 --- a/include/linux/mfd/core.h +++ b/include/linux/mfd/core.h | |||
| @@ -23,6 +23,7 @@ | |||
| 23 | */ | 23 | */ |
| 24 | struct mfd_cell { | 24 | struct mfd_cell { |
| 25 | const char *name; | 25 | const char *name; |
| 26 | int id; | ||
| 26 | 27 | ||
| 27 | int (*enable)(struct platform_device *dev); | 28 | int (*enable)(struct platform_device *dev); |
| 28 | int (*disable)(struct platform_device *dev); | 29 | int (*disable)(struct platform_device *dev); |
diff --git a/include/linux/mfd/ezx-pcap.h b/include/linux/mfd/ezx-pcap.h index c12c3c0932bf..e5124ceea769 100644 --- a/include/linux/mfd/ezx-pcap.h +++ b/include/linux/mfd/ezx-pcap.h | |||
| @@ -25,9 +25,12 @@ struct pcap_chip; | |||
| 25 | 25 | ||
| 26 | int ezx_pcap_write(struct pcap_chip *, u8, u32); | 26 | int ezx_pcap_write(struct pcap_chip *, u8, u32); |
| 27 | int ezx_pcap_read(struct pcap_chip *, u8, u32 *); | 27 | int ezx_pcap_read(struct pcap_chip *, u8, u32 *); |
| 28 | int ezx_pcap_set_bits(struct pcap_chip *, u8, u32, u32); | ||
| 28 | int pcap_to_irq(struct pcap_chip *, int); | 29 | int pcap_to_irq(struct pcap_chip *, int); |
| 30 | int irq_to_pcap(struct pcap_chip *, int); | ||
| 29 | int pcap_adc_async(struct pcap_chip *, u8, u32, u8[], void *, void *); | 31 | int pcap_adc_async(struct pcap_chip *, u8, u32, u8[], void *, void *); |
| 30 | int pcap_adc_sync(struct pcap_chip *, u8, u32, u8[], u16[]); | 32 | int pcap_adc_sync(struct pcap_chip *, u8, u32, u8[], u16[]); |
| 33 | void pcap_set_ts_bits(struct pcap_chip *, u32); | ||
| 31 | 34 | ||
| 32 | #define PCAP_SECOND_PORT 1 | 35 | #define PCAP_SECOND_PORT 1 |
| 33 | #define PCAP_CS_AH 2 | 36 | #define PCAP_CS_AH 2 |
| @@ -224,7 +227,6 @@ int pcap_adc_sync(struct pcap_chip *, u8, u32, u8[], u16[]); | |||
| 224 | #define PCAP_LED1 1 | 227 | #define PCAP_LED1 1 |
| 225 | #define PCAP_BL0 2 | 228 | #define PCAP_BL0 2 |
| 226 | #define PCAP_BL1 3 | 229 | #define PCAP_BL1 3 |
| 227 | #define PCAP_VIB 4 | ||
| 228 | #define PCAP_LED_3MA 0 | 230 | #define PCAP_LED_3MA 0 |
| 229 | #define PCAP_LED_4MA 1 | 231 | #define PCAP_LED_4MA 1 |
| 230 | #define PCAP_LED_5MA 2 | 232 | #define PCAP_LED_5MA 2 |
| @@ -243,9 +245,6 @@ int pcap_adc_sync(struct pcap_chip *, u8, u32, u8[], u16[]); | |||
| 243 | #define PCAP_LED0_C_SHIFT 15 | 245 | #define PCAP_LED0_C_SHIFT 15 |
| 244 | #define PCAP_LED1_C_SHIFT 17 | 246 | #define PCAP_LED1_C_SHIFT 17 |
| 245 | #define PCAP_BL1_SHIFT 20 | 247 | #define PCAP_BL1_SHIFT 20 |
| 246 | #define PCAP_VIB_MASK 0x3 | ||
| 247 | #define PCAP_VIB_SHIFT 20 | ||
| 248 | #define PCAP_VIB_EN (1 << 19) | ||
| 249 | 248 | ||
| 250 | /* RTC */ | 249 | /* RTC */ |
| 251 | #define PCAP_RTC_DAY_MASK 0x3fff | 250 | #define PCAP_RTC_DAY_MASK 0x3fff |
diff --git a/include/linux/mfd/mc13783-private.h b/include/linux/mfd/mc13783-private.h new file mode 100644 index 000000000000..47e698cb0f16 --- /dev/null +++ b/include/linux/mfd/mc13783-private.h | |||
| @@ -0,0 +1,396 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
| 3 | * | ||
| 4 | * Initial development of this code was funded by | ||
| 5 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #ifndef __LINUX_MFD_MC13783_PRIV_H | ||
| 23 | #define __LINUX_MFD_MC13783_PRIV_H | ||
| 24 | |||
| 25 | #include <linux/platform_device.h> | ||
| 26 | #include <linux/mfd/mc13783.h> | ||
| 27 | #include <linux/workqueue.h> | ||
| 28 | #include <linux/mutex.h> | ||
| 29 | |||
| 30 | struct mc13783_irq { | ||
| 31 | void (*handler)(int, void *); | ||
| 32 | void *data; | ||
| 33 | }; | ||
| 34 | |||
| 35 | #define MC13783_NUM_IRQ 2 | ||
| 36 | #define MC13783_IRQ_TS 0 | ||
| 37 | #define MC13783_IRQ_REGULATOR 1 | ||
| 38 | |||
| 39 | #define MC13783_ADC_MODE_TS 1 | ||
| 40 | #define MC13783_ADC_MODE_SINGLE_CHAN 2 | ||
| 41 | #define MC13783_ADC_MODE_MULT_CHAN 3 | ||
| 42 | |||
| 43 | struct mc13783 { | ||
| 44 | int revision; | ||
| 45 | struct device *dev; | ||
| 46 | struct spi_device *spi_device; | ||
| 47 | |||
| 48 | int (*read_dev)(void *data, char reg, int count, u32 *dst); | ||
| 49 | int (*write_dev)(void *data, char reg, int count, const u32 *src); | ||
| 50 | |||
| 51 | struct mutex io_lock; | ||
| 52 | void *io_data; | ||
| 53 | int irq; | ||
| 54 | unsigned int flags; | ||
| 55 | |||
| 56 | struct mc13783_irq irq_handler[MC13783_NUM_IRQ]; | ||
| 57 | struct work_struct work; | ||
| 58 | struct completion adc_done; | ||
| 59 | unsigned int ts_active; | ||
| 60 | struct mutex adc_conv_lock; | ||
| 61 | |||
| 62 | struct mc13783_regulator_init_data *regulators; | ||
| 63 | int num_regulators; | ||
| 64 | }; | ||
| 65 | |||
| 66 | int mc13783_reg_read(struct mc13783 *, int reg_num, u32 *); | ||
| 67 | int mc13783_reg_write(struct mc13783 *, int, u32); | ||
| 68 | int mc13783_set_bits(struct mc13783 *, int, u32, u32); | ||
| 69 | int mc13783_free_irq(struct mc13783 *mc13783, int irq); | ||
| 70 | int mc13783_register_irq(struct mc13783 *mc13783, int irq, | ||
| 71 | void (*handler) (int, void *), void *data); | ||
| 72 | |||
| 73 | #define MC13783_REG_INTERRUPT_STATUS_0 0 | ||
| 74 | #define MC13783_REG_INTERRUPT_MASK_0 1 | ||
| 75 | #define MC13783_REG_INTERRUPT_SENSE_0 2 | ||
| 76 | #define MC13783_REG_INTERRUPT_STATUS_1 3 | ||
| 77 | #define MC13783_REG_INTERRUPT_MASK_1 4 | ||
| 78 | #define MC13783_REG_INTERRUPT_SENSE_1 5 | ||
| 79 | #define MC13783_REG_POWER_UP_MODE_SENSE 6 | ||
| 80 | #define MC13783_REG_REVISION 7 | ||
| 81 | #define MC13783_REG_SEMAPHORE 8 | ||
| 82 | #define MC13783_REG_ARBITRATION_PERIPHERAL_AUDIO 9 | ||
| 83 | #define MC13783_REG_ARBITRATION_SWITCHERS 10 | ||
| 84 | #define MC13783_REG_ARBITRATION_REGULATORS_0 11 | ||
| 85 | #define MC13783_REG_ARBITRATION_REGULATORS_1 12 | ||
| 86 | #define MC13783_REG_POWER_CONTROL_0 13 | ||
| 87 | #define MC13783_REG_POWER_CONTROL_1 14 | ||
| 88 | #define MC13783_REG_POWER_CONTROL_2 15 | ||
| 89 | #define MC13783_REG_REGEN_ASSIGNMENT 16 | ||
| 90 | #define MC13783_REG_CONTROL_SPARE 17 | ||
| 91 | #define MC13783_REG_MEMORY_A 18 | ||
| 92 | #define MC13783_REG_MEMORY_B 19 | ||
| 93 | #define MC13783_REG_RTC_TIME 20 | ||
| 94 | #define MC13783_REG_RTC_ALARM 21 | ||
| 95 | #define MC13783_REG_RTC_DAY 22 | ||
| 96 | #define MC13783_REG_RTC_DAY_ALARM 23 | ||
| 97 | #define MC13783_REG_SWITCHERS_0 24 | ||
| 98 | #define MC13783_REG_SWITCHERS_1 25 | ||
| 99 | #define MC13783_REG_SWITCHERS_2 26 | ||
| 100 | #define MC13783_REG_SWITCHERS_3 27 | ||
| 101 | #define MC13783_REG_SWITCHERS_4 28 | ||
| 102 | #define MC13783_REG_SWITCHERS_5 29 | ||
| 103 | #define MC13783_REG_REGULATOR_SETTING_0 30 | ||
| 104 | #define MC13783_REG_REGULATOR_SETTING_1 31 | ||
| 105 | #define MC13783_REG_REGULATOR_MODE_0 32 | ||
| 106 | #define MC13783_REG_REGULATOR_MODE_1 33 | ||
| 107 | #define MC13783_REG_POWER_MISCELLANEOUS 34 | ||
| 108 | #define MC13783_REG_POWER_SPARE 35 | ||
| 109 | #define MC13783_REG_AUDIO_RX_0 36 | ||
| 110 | #define MC13783_REG_AUDIO_RX_1 37 | ||
| 111 | #define MC13783_REG_AUDIO_TX 38 | ||
| 112 | #define MC13783_REG_AUDIO_SSI_NETWORK 39 | ||
| 113 | #define MC13783_REG_AUDIO_CODEC 40 | ||
| 114 | #define MC13783_REG_AUDIO_STEREO_DAC 41 | ||
| 115 | #define MC13783_REG_AUDIO_SPARE 42 | ||
| 116 | #define MC13783_REG_ADC_0 43 | ||
| 117 | #define MC13783_REG_ADC_1 44 | ||
| 118 | #define MC13783_REG_ADC_2 45 | ||
| 119 | #define MC13783_REG_ADC_3 46 | ||
| 120 | #define MC13783_REG_ADC_4 47 | ||
| 121 | #define MC13783_REG_CHARGER 48 | ||
| 122 | #define MC13783_REG_USB 49 | ||
| 123 | #define MC13783_REG_CHARGE_USB_SPARE 50 | ||
| 124 | #define MC13783_REG_LED_CONTROL_0 51 | ||
| 125 | #define MC13783_REG_LED_CONTROL_1 52 | ||
| 126 | #define MC13783_REG_LED_CONTROL_2 53 | ||
| 127 | #define MC13783_REG_LED_CONTROL_3 54 | ||
| 128 | #define MC13783_REG_LED_CONTROL_4 55 | ||
| 129 | #define MC13783_REG_LED_CONTROL_5 56 | ||
| 130 | #define MC13783_REG_SPARE 57 | ||
| 131 | #define MC13783_REG_TRIM_0 58 | ||
| 132 | #define MC13783_REG_TRIM_1 59 | ||
| 133 | #define MC13783_REG_TEST_0 60 | ||
| 134 | #define MC13783_REG_TEST_1 61 | ||
| 135 | #define MC13783_REG_TEST_2 62 | ||
| 136 | #define MC13783_REG_TEST_3 63 | ||
| 137 | #define MC13783_REG_NB 64 | ||
| 138 | |||
| 139 | |||
| 140 | /* | ||
| 141 | * Interrupt Status | ||
| 142 | */ | ||
| 143 | #define MC13783_INT_STAT_ADCDONEI (1 << 0) | ||
| 144 | #define MC13783_INT_STAT_ADCBISDONEI (1 << 1) | ||
| 145 | #define MC13783_INT_STAT_TSI (1 << 2) | ||
| 146 | #define MC13783_INT_STAT_WHIGHI (1 << 3) | ||
| 147 | #define MC13783_INT_STAT_WLOWI (1 << 4) | ||
| 148 | #define MC13783_INT_STAT_CHGDETI (1 << 6) | ||
| 149 | #define MC13783_INT_STAT_CHGOVI (1 << 7) | ||
| 150 | #define MC13783_INT_STAT_CHGREVI (1 << 8) | ||
| 151 | #define MC13783_INT_STAT_CHGSHORTI (1 << 9) | ||
| 152 | #define MC13783_INT_STAT_CCCVI (1 << 10) | ||
| 153 | #define MC13783_INT_STAT_CHGCURRI (1 << 11) | ||
| 154 | #define MC13783_INT_STAT_BPONI (1 << 12) | ||
| 155 | #define MC13783_INT_STAT_LOBATLI (1 << 13) | ||
| 156 | #define MC13783_INT_STAT_LOBATHI (1 << 14) | ||
| 157 | #define MC13783_INT_STAT_UDPI (1 << 15) | ||
| 158 | #define MC13783_INT_STAT_USBI (1 << 16) | ||
| 159 | #define MC13783_INT_STAT_IDI (1 << 19) | ||
| 160 | #define MC13783_INT_STAT_Unused (1 << 20) | ||
| 161 | #define MC13783_INT_STAT_SE1I (1 << 21) | ||
| 162 | #define MC13783_INT_STAT_CKDETI (1 << 22) | ||
| 163 | #define MC13783_INT_STAT_UDMI (1 << 23) | ||
| 164 | |||
| 165 | /* | ||
| 166 | * Interrupt Mask | ||
| 167 | */ | ||
| 168 | #define MC13783_INT_MASK_ADCDONEM (1 << 0) | ||
| 169 | #define MC13783_INT_MASK_ADCBISDONEM (1 << 1) | ||
| 170 | #define MC13783_INT_MASK_TSM (1 << 2) | ||
| 171 | #define MC13783_INT_MASK_WHIGHM (1 << 3) | ||
| 172 | #define MC13783_INT_MASK_WLOWM (1 << 4) | ||
| 173 | #define MC13783_INT_MASK_CHGDETM (1 << 6) | ||
| 174 | #define MC13783_INT_MASK_CHGOVM (1 << 7) | ||
| 175 | #define MC13783_INT_MASK_CHGREVM (1 << 8) | ||
| 176 | #define MC13783_INT_MASK_CHGSHORTM (1 << 9) | ||
| 177 | #define MC13783_INT_MASK_CCCVM (1 << 10) | ||
| 178 | #define MC13783_INT_MASK_CHGCURRM (1 << 11) | ||
| 179 | #define MC13783_INT_MASK_BPONM (1 << 12) | ||
| 180 | #define MC13783_INT_MASK_LOBATLM (1 << 13) | ||
| 181 | #define MC13783_INT_MASK_LOBATHM (1 << 14) | ||
| 182 | #define MC13783_INT_MASK_UDPM (1 << 15) | ||
| 183 | #define MC13783_INT_MASK_USBM (1 << 16) | ||
| 184 | #define MC13783_INT_MASK_IDM (1 << 19) | ||
| 185 | #define MC13783_INT_MASK_SE1M (1 << 21) | ||
| 186 | #define MC13783_INT_MASK_CKDETM (1 << 22) | ||
| 187 | |||
| 188 | /* | ||
| 189 | * Reg Regulator Mode 0 | ||
| 190 | */ | ||
| 191 | #define MC13783_REGCTRL_VAUDIO_EN (1 << 0) | ||
| 192 | #define MC13783_REGCTRL_VAUDIO_STBY (1 << 1) | ||
| 193 | #define MC13783_REGCTRL_VAUDIO_MODE (1 << 2) | ||
| 194 | #define MC13783_REGCTRL_VIOHI_EN (1 << 3) | ||
| 195 | #define MC13783_REGCTRL_VIOHI_STBY (1 << 4) | ||
| 196 | #define MC13783_REGCTRL_VIOHI_MODE (1 << 5) | ||
| 197 | #define MC13783_REGCTRL_VIOLO_EN (1 << 6) | ||
| 198 | #define MC13783_REGCTRL_VIOLO_STBY (1 << 7) | ||
| 199 | #define MC13783_REGCTRL_VIOLO_MODE (1 << 8) | ||
| 200 | #define MC13783_REGCTRL_VDIG_EN (1 << 9) | ||
| 201 | #define MC13783_REGCTRL_VDIG_STBY (1 << 10) | ||
| 202 | #define MC13783_REGCTRL_VDIG_MODE (1 << 11) | ||
| 203 | #define MC13783_REGCTRL_VGEN_EN (1 << 12) | ||
| 204 | #define MC13783_REGCTRL_VGEN_STBY (1 << 13) | ||
| 205 | #define MC13783_REGCTRL_VGEN_MODE (1 << 14) | ||
| 206 | #define MC13783_REGCTRL_VRFDIG_EN (1 << 15) | ||
| 207 | #define MC13783_REGCTRL_VRFDIG_STBY (1 << 16) | ||
| 208 | #define MC13783_REGCTRL_VRFDIG_MODE (1 << 17) | ||
| 209 | #define MC13783_REGCTRL_VRFREF_EN (1 << 18) | ||
| 210 | #define MC13783_REGCTRL_VRFREF_STBY (1 << 19) | ||
| 211 | #define MC13783_REGCTRL_VRFREF_MODE (1 << 20) | ||
| 212 | #define MC13783_REGCTRL_VRFCP_EN (1 << 21) | ||
| 213 | #define MC13783_REGCTRL_VRFCP_STBY (1 << 22) | ||
| 214 | #define MC13783_REGCTRL_VRFCP_MODE (1 << 23) | ||
| 215 | |||
| 216 | /* | ||
| 217 | * Reg Regulator Mode 1 | ||
| 218 | */ | ||
| 219 | #define MC13783_REGCTRL_VSIM_EN (1 << 0) | ||
| 220 | #define MC13783_REGCTRL_VSIM_STBY (1 << 1) | ||
| 221 | #define MC13783_REGCTRL_VSIM_MODE (1 << 2) | ||
| 222 | #define MC13783_REGCTRL_VESIM_EN (1 << 3) | ||
| 223 | #define MC13783_REGCTRL_VESIM_STBY (1 << 4) | ||
| 224 | #define MC13783_REGCTRL_VESIM_MODE (1 << 5) | ||
| 225 | #define MC13783_REGCTRL_VCAM_EN (1 << 6) | ||
| 226 | #define MC13783_REGCTRL_VCAM_STBY (1 << 7) | ||
| 227 | #define MC13783_REGCTRL_VCAM_MODE (1 << 8) | ||
| 228 | #define MC13783_REGCTRL_VRFBG_EN (1 << 9) | ||
| 229 | #define MC13783_REGCTRL_VRFBG_STBY (1 << 10) | ||
| 230 | #define MC13783_REGCTRL_VVIB_EN (1 << 11) | ||
| 231 | #define MC13783_REGCTRL_VRF1_EN (1 << 12) | ||
| 232 | #define MC13783_REGCTRL_VRF1_STBY (1 << 13) | ||
| 233 | #define MC13783_REGCTRL_VRF1_MODE (1 << 14) | ||
| 234 | #define MC13783_REGCTRL_VRF2_EN (1 << 15) | ||
| 235 | #define MC13783_REGCTRL_VRF2_STBY (1 << 16) | ||
| 236 | #define MC13783_REGCTRL_VRF2_MODE (1 << 17) | ||
| 237 | #define MC13783_REGCTRL_VMMC1_EN (1 << 18) | ||
| 238 | #define MC13783_REGCTRL_VMMC1_STBY (1 << 19) | ||
| 239 | #define MC13783_REGCTRL_VMMC1_MODE (1 << 20) | ||
| 240 | #define MC13783_REGCTRL_VMMC2_EN (1 << 21) | ||
| 241 | #define MC13783_REGCTRL_VMMC2_STBY (1 << 22) | ||
| 242 | #define MC13783_REGCTRL_VMMC2_MODE (1 << 23) | ||
| 243 | |||
| 244 | /* | ||
| 245 | * Reg Regulator Misc. | ||
| 246 | */ | ||
| 247 | #define MC13783_REGCTRL_GPO1_EN (1 << 6) | ||
| 248 | #define MC13783_REGCTRL_GPO2_EN (1 << 8) | ||
| 249 | #define MC13783_REGCTRL_GPO3_EN (1 << 10) | ||
| 250 | #define MC13783_REGCTRL_GPO4_EN (1 << 12) | ||
| 251 | #define MC13783_REGCTRL_VIBPINCTRL (1 << 14) | ||
| 252 | |||
| 253 | /* | ||
| 254 | * Reg Switcher 4 | ||
| 255 | */ | ||
| 256 | #define MC13783_SWCTRL_SW1A_MODE (1 << 0) | ||
| 257 | #define MC13783_SWCTRL_SW1A_STBY_MODE (1 << 2) | ||
| 258 | #define MC13783_SWCTRL_SW1A_DVS_SPEED (1 << 6) | ||
| 259 | #define MC13783_SWCTRL_SW1A_PANIC_MODE (1 << 8) | ||
| 260 | #define MC13783_SWCTRL_SW1A_SOFTSTART (1 << 9) | ||
| 261 | #define MC13783_SWCTRL_SW1B_MODE (1 << 10) | ||
| 262 | #define MC13783_SWCTRL_SW1B_STBY_MODE (1 << 12) | ||
| 263 | #define MC13783_SWCTRL_SW1B_DVS_SPEED (1 << 14) | ||
| 264 | #define MC13783_SWCTRL_SW1B_PANIC_MODE (1 << 16) | ||
| 265 | #define MC13783_SWCTRL_SW1B_SOFTSTART (1 << 17) | ||
| 266 | #define MC13783_SWCTRL_PLL_EN (1 << 18) | ||
| 267 | #define MC13783_SWCTRL_PLL_FACTOR (1 << 19) | ||
| 268 | |||
| 269 | /* | ||
| 270 | * Reg Switcher 5 | ||
| 271 | */ | ||
| 272 | #define MC13783_SWCTRL_SW2A_MODE (1 << 0) | ||
| 273 | #define MC13783_SWCTRL_SW2A_STBY_MODE (1 << 2) | ||
| 274 | #define MC13783_SWCTRL_SW2A_DVS_SPEED (1 << 6) | ||
| 275 | #define MC13783_SWCTRL_SW2A_PANIC_MODE (1 << 8) | ||
| 276 | #define MC13783_SWCTRL_SW2A_SOFTSTART (1 << 9) | ||
| 277 | #define MC13783_SWCTRL_SW2B_MODE (1 << 10) | ||
| 278 | #define MC13783_SWCTRL_SW2B_STBY_MODE (1 << 12) | ||
| 279 | #define MC13783_SWCTRL_SW2B_DVS_SPEED (1 << 14) | ||
| 280 | #define MC13783_SWCTRL_SW2B_PANIC_MODE (1 << 16) | ||
| 281 | #define MC13783_SWCTRL_SW2B_SOFTSTART (1 << 17) | ||
| 282 | #define MC13783_SWSET_SW3 (1 << 18) | ||
| 283 | #define MC13783_SWCTRL_SW3_EN (1 << 20) | ||
| 284 | #define MC13783_SWCTRL_SW3_STBY (1 << 21) | ||
| 285 | #define MC13783_SWCTRL_SW3_MODE (1 << 22) | ||
| 286 | |||
| 287 | /* | ||
| 288 | * ADC/Touch | ||
| 289 | */ | ||
| 290 | #define MC13783_ADC0_LICELLCON (1 << 0) | ||
| 291 | #define MC13783_ADC0_CHRGICON (1 << 1) | ||
| 292 | #define MC13783_ADC0_BATICON (1 << 2) | ||
| 293 | #define MC13783_ADC0_RTHEN (1 << 3) | ||
| 294 | #define MC13783_ADC0_DTHEN (1 << 4) | ||
| 295 | #define MC13783_ADC0_UIDEN (1 << 5) | ||
| 296 | #define MC13783_ADC0_ADOUTEN (1 << 6) | ||
| 297 | #define MC13783_ADC0_ADOUTPER (1 << 7) | ||
| 298 | #define MC13783_ADC0_ADREFEN (1 << 10) | ||
| 299 | #define MC13783_ADC0_ADREFMODE (1 << 11) | ||
| 300 | #define MC13783_ADC0_TSMOD0 (1 << 12) | ||
| 301 | #define MC13783_ADC0_TSMOD1 (1 << 13) | ||
| 302 | #define MC13783_ADC0_TSMOD2 (1 << 14) | ||
| 303 | #define MC13783_ADC0_CHRGRAWDIV (1 << 15) | ||
| 304 | #define MC13783_ADC0_ADINC1 (1 << 16) | ||
| 305 | #define MC13783_ADC0_ADINC2 (1 << 17) | ||
| 306 | #define MC13783_ADC0_WCOMP (1 << 18) | ||
| 307 | #define MC13783_ADC0_ADCBIS0 (1 << 23) | ||
| 308 | |||
| 309 | #define MC13783_ADC1_ADEN (1 << 0) | ||
| 310 | #define MC13783_ADC1_RAND (1 << 1) | ||
| 311 | #define MC13783_ADC1_ADSEL (1 << 3) | ||
| 312 | #define MC13783_ADC1_TRIGMASK (1 << 4) | ||
| 313 | #define MC13783_ADC1_ADA10 (1 << 5) | ||
| 314 | #define MC13783_ADC1_ADA11 (1 << 6) | ||
| 315 | #define MC13783_ADC1_ADA12 (1 << 7) | ||
| 316 | #define MC13783_ADC1_ADA20 (1 << 8) | ||
| 317 | #define MC13783_ADC1_ADA21 (1 << 9) | ||
| 318 | #define MC13783_ADC1_ADA22 (1 << 10) | ||
| 319 | #define MC13783_ADC1_ATO0 (1 << 11) | ||
| 320 | #define MC13783_ADC1_ATO1 (1 << 12) | ||
| 321 | #define MC13783_ADC1_ATO2 (1 << 13) | ||
| 322 | #define MC13783_ADC1_ATO3 (1 << 14) | ||
| 323 | #define MC13783_ADC1_ATO4 (1 << 15) | ||
| 324 | #define MC13783_ADC1_ATO5 (1 << 16) | ||
| 325 | #define MC13783_ADC1_ATO6 (1 << 17) | ||
| 326 | #define MC13783_ADC1_ATO7 (1 << 18) | ||
| 327 | #define MC13783_ADC1_ATOX (1 << 19) | ||
| 328 | #define MC13783_ADC1_ASC (1 << 20) | ||
| 329 | #define MC13783_ADC1_ADTRIGIGN (1 << 21) | ||
| 330 | #define MC13783_ADC1_ADONESHOT (1 << 22) | ||
| 331 | #define MC13783_ADC1_ADCBIS1 (1 << 23) | ||
| 332 | |||
| 333 | #define MC13783_ADC1_CHAN0_SHIFT 5 | ||
| 334 | #define MC13783_ADC1_CHAN1_SHIFT 8 | ||
| 335 | |||
| 336 | #define MC13783_ADC2_ADD10 (1 << 2) | ||
| 337 | #define MC13783_ADC2_ADD11 (1 << 3) | ||
| 338 | #define MC13783_ADC2_ADD12 (1 << 4) | ||
| 339 | #define MC13783_ADC2_ADD13 (1 << 5) | ||
| 340 | #define MC13783_ADC2_ADD14 (1 << 6) | ||
| 341 | #define MC13783_ADC2_ADD15 (1 << 7) | ||
| 342 | #define MC13783_ADC2_ADD16 (1 << 8) | ||
| 343 | #define MC13783_ADC2_ADD17 (1 << 9) | ||
| 344 | #define MC13783_ADC2_ADD18 (1 << 10) | ||
| 345 | #define MC13783_ADC2_ADD19 (1 << 11) | ||
| 346 | #define MC13783_ADC2_ADD20 (1 << 14) | ||
| 347 | #define MC13783_ADC2_ADD21 (1 << 15) | ||
| 348 | #define MC13783_ADC2_ADD22 (1 << 16) | ||
| 349 | #define MC13783_ADC2_ADD23 (1 << 17) | ||
| 350 | #define MC13783_ADC2_ADD24 (1 << 18) | ||
| 351 | #define MC13783_ADC2_ADD25 (1 << 19) | ||
| 352 | #define MC13783_ADC2_ADD26 (1 << 20) | ||
| 353 | #define MC13783_ADC2_ADD27 (1 << 21) | ||
| 354 | #define MC13783_ADC2_ADD28 (1 << 22) | ||
| 355 | #define MC13783_ADC2_ADD29 (1 << 23) | ||
| 356 | |||
| 357 | #define MC13783_ADC3_WHIGH0 (1 << 0) | ||
| 358 | #define MC13783_ADC3_WHIGH1 (1 << 1) | ||
| 359 | #define MC13783_ADC3_WHIGH2 (1 << 2) | ||
| 360 | #define MC13783_ADC3_WHIGH3 (1 << 3) | ||
| 361 | #define MC13783_ADC3_WHIGH4 (1 << 4) | ||
| 362 | #define MC13783_ADC3_WHIGH5 (1 << 5) | ||
| 363 | #define MC13783_ADC3_ICID0 (1 << 6) | ||
| 364 | #define MC13783_ADC3_ICID1 (1 << 7) | ||
| 365 | #define MC13783_ADC3_ICID2 (1 << 8) | ||
| 366 | #define MC13783_ADC3_WLOW0 (1 << 9) | ||
| 367 | #define MC13783_ADC3_WLOW1 (1 << 10) | ||
| 368 | #define MC13783_ADC3_WLOW2 (1 << 11) | ||
| 369 | #define MC13783_ADC3_WLOW3 (1 << 12) | ||
| 370 | #define MC13783_ADC3_WLOW4 (1 << 13) | ||
| 371 | #define MC13783_ADC3_WLOW5 (1 << 14) | ||
| 372 | #define MC13783_ADC3_ADCBIS2 (1 << 23) | ||
| 373 | |||
| 374 | #define MC13783_ADC4_ADDBIS10 (1 << 2) | ||
| 375 | #define MC13783_ADC4_ADDBIS11 (1 << 3) | ||
| 376 | #define MC13783_ADC4_ADDBIS12 (1 << 4) | ||
| 377 | #define MC13783_ADC4_ADDBIS13 (1 << 5) | ||
| 378 | #define MC13783_ADC4_ADDBIS14 (1 << 6) | ||
| 379 | #define MC13783_ADC4_ADDBIS15 (1 << 7) | ||
| 380 | #define MC13783_ADC4_ADDBIS16 (1 << 8) | ||
| 381 | #define MC13783_ADC4_ADDBIS17 (1 << 9) | ||
| 382 | #define MC13783_ADC4_ADDBIS18 (1 << 10) | ||
| 383 | #define MC13783_ADC4_ADDBIS19 (1 << 11) | ||
| 384 | #define MC13783_ADC4_ADDBIS20 (1 << 14) | ||
| 385 | #define MC13783_ADC4_ADDBIS21 (1 << 15) | ||
| 386 | #define MC13783_ADC4_ADDBIS22 (1 << 16) | ||
| 387 | #define MC13783_ADC4_ADDBIS23 (1 << 17) | ||
| 388 | #define MC13783_ADC4_ADDBIS24 (1 << 18) | ||
| 389 | #define MC13783_ADC4_ADDBIS25 (1 << 19) | ||
| 390 | #define MC13783_ADC4_ADDBIS26 (1 << 20) | ||
| 391 | #define MC13783_ADC4_ADDBIS27 (1 << 21) | ||
| 392 | #define MC13783_ADC4_ADDBIS28 (1 << 22) | ||
| 393 | #define MC13783_ADC4_ADDBIS29 (1 << 23) | ||
| 394 | |||
| 395 | #endif /* __LINUX_MFD_MC13783_PRIV_H */ | ||
| 396 | |||
diff --git a/include/linux/mfd/mc13783.h b/include/linux/mfd/mc13783.h new file mode 100644 index 000000000000..b3a2a7243573 --- /dev/null +++ b/include/linux/mfd/mc13783.h | |||
| @@ -0,0 +1,84 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
| 3 | * | ||
| 4 | * Initial development of this code was funded by | ||
| 5 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #ifndef __INCLUDE_LINUX_MFD_MC13783_H | ||
| 23 | #define __INCLUDE_LINUX_MFD_MC13783_H | ||
| 24 | |||
| 25 | struct mc13783; | ||
| 26 | struct regulator_init_data; | ||
| 27 | |||
| 28 | struct mc13783_regulator_init_data { | ||
| 29 | int id; | ||
| 30 | struct regulator_init_data *init_data; | ||
| 31 | }; | ||
| 32 | |||
| 33 | struct mc13783_platform_data { | ||
| 34 | struct mc13783_regulator_init_data *regulators; | ||
| 35 | int num_regulators; | ||
| 36 | unsigned int flags; | ||
| 37 | }; | ||
| 38 | |||
| 39 | /* mc13783_platform_data flags */ | ||
| 40 | #define MC13783_USE_TOUCHSCREEN (1 << 0) | ||
| 41 | #define MC13783_USE_CODEC (1 << 1) | ||
| 42 | #define MC13783_USE_ADC (1 << 2) | ||
| 43 | #define MC13783_USE_RTC (1 << 3) | ||
| 44 | #define MC13783_USE_REGULATOR (1 << 4) | ||
| 45 | |||
| 46 | int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode, | ||
| 47 | unsigned int channel, unsigned int *sample); | ||
| 48 | |||
| 49 | void mc13783_adc_set_ts_status(struct mc13783 *mc13783, unsigned int status); | ||
| 50 | |||
| 51 | #define MC13783_SW_SW1A 0 | ||
| 52 | #define MC13783_SW_SW1B 1 | ||
| 53 | #define MC13783_SW_SW2A 2 | ||
| 54 | #define MC13783_SW_SW2B 3 | ||
| 55 | #define MC13783_SW_SW3 4 | ||
| 56 | #define MC13783_SW_PLL 5 | ||
| 57 | #define MC13783_REGU_VAUDIO 6 | ||
| 58 | #define MC13783_REGU_VIOHI 7 | ||
| 59 | #define MC13783_REGU_VIOLO 8 | ||
| 60 | #define MC13783_REGU_VDIG 9 | ||
| 61 | #define MC13783_REGU_VGEN 10 | ||
| 62 | #define MC13783_REGU_VRFDIG 11 | ||
| 63 | #define MC13783_REGU_VRFREF 12 | ||
| 64 | #define MC13783_REGU_VRFCP 13 | ||
| 65 | #define MC13783_REGU_VSIM 14 | ||
| 66 | #define MC13783_REGU_VESIM 15 | ||
| 67 | #define MC13783_REGU_VCAM 16 | ||
| 68 | #define MC13783_REGU_VRFBG 17 | ||
| 69 | #define MC13783_REGU_VVIB 18 | ||
| 70 | #define MC13783_REGU_VRF1 19 | ||
| 71 | #define MC13783_REGU_VRF2 20 | ||
| 72 | #define MC13783_REGU_VMMC1 21 | ||
| 73 | #define MC13783_REGU_VMMC2 22 | ||
| 74 | #define MC13783_REGU_GPO1 23 | ||
| 75 | #define MC13783_REGU_GPO2 24 | ||
| 76 | #define MC13783_REGU_GPO3 25 | ||
| 77 | #define MC13783_REGU_GPO4 26 | ||
| 78 | #define MC13783_REGU_V1 27 | ||
| 79 | #define MC13783_REGU_V2 28 | ||
| 80 | #define MC13783_REGU_V3 29 | ||
| 81 | #define MC13783_REGU_V4 30 | ||
| 82 | |||
| 83 | #endif /* __INCLUDE_LINUX_MFD_MC13783_H */ | ||
| 84 | |||
diff --git a/include/linux/mfd/pcf50633/adc.h b/include/linux/mfd/pcf50633/adc.h index 56669b4183ad..b35e62801ffa 100644 --- a/include/linux/mfd/pcf50633/adc.h +++ b/include/linux/mfd/pcf50633/adc.h | |||
| @@ -25,7 +25,8 @@ | |||
| 25 | #define PCF50633_REG_ADCS3 0x57 | 25 | #define PCF50633_REG_ADCS3 0x57 |
| 26 | 26 | ||
| 27 | #define PCF50633_ADCC1_ADCSTART 0x01 | 27 | #define PCF50633_ADCC1_ADCSTART 0x01 |
| 28 | #define PCF50633_ADCC1_RES_10BIT 0x02 | 28 | #define PCF50633_ADCC1_RES_8BIT 0x02 |
| 29 | #define PCF50633_ADCC1_RES_10BIT 0x00 | ||
| 29 | #define PCF50633_ADCC1_AVERAGE_NO 0x00 | 30 | #define PCF50633_ADCC1_AVERAGE_NO 0x00 |
| 30 | #define PCF50633_ADCC1_AVERAGE_4 0x04 | 31 | #define PCF50633_ADCC1_AVERAGE_4 0x04 |
| 31 | #define PCF50633_ADCC1_AVERAGE_8 0x08 | 32 | #define PCF50633_ADCC1_AVERAGE_8 0x08 |
diff --git a/include/linux/mfd/pcf50633/core.h b/include/linux/mfd/pcf50633/core.h index c8f51c3c0a72..9aba7b779fbc 100644 --- a/include/linux/mfd/pcf50633/core.h +++ b/include/linux/mfd/pcf50633/core.h | |||
| @@ -136,6 +136,7 @@ struct pcf50633 { | |||
| 136 | int irq; | 136 | int irq; |
| 137 | struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ]; | 137 | struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ]; |
| 138 | struct work_struct irq_work; | 138 | struct work_struct irq_work; |
| 139 | struct workqueue_struct *work_queue; | ||
| 139 | struct mutex lock; | 140 | struct mutex lock; |
| 140 | 141 | ||
| 141 | u8 mask_regs[5]; | 142 | u8 mask_regs[5]; |
diff --git a/include/linux/mfd/wm831x/auxadc.h b/include/linux/mfd/wm831x/auxadc.h new file mode 100644 index 000000000000..b132067e9e99 --- /dev/null +++ b/include/linux/mfd/wm831x/auxadc.h | |||
| @@ -0,0 +1,216 @@ | |||
| 1 | /* | ||
| 2 | * include/linux/mfd/wm831x/auxadc.h -- Auxiliary ADC interface for WM831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_AUXADC_H__ | ||
| 16 | #define __MFD_WM831X_AUXADC_H__ | ||
| 17 | |||
| 18 | /* | ||
| 19 | * R16429 (0x402D) - AuxADC Data | ||
| 20 | */ | ||
| 21 | #define WM831X_AUX_DATA_SRC_MASK 0xF000 /* AUX_DATA_SRC - [15:12] */ | ||
| 22 | #define WM831X_AUX_DATA_SRC_SHIFT 12 /* AUX_DATA_SRC - [15:12] */ | ||
| 23 | #define WM831X_AUX_DATA_SRC_WIDTH 4 /* AUX_DATA_SRC - [15:12] */ | ||
| 24 | #define WM831X_AUX_DATA_MASK 0x0FFF /* AUX_DATA - [11:0] */ | ||
| 25 | #define WM831X_AUX_DATA_SHIFT 0 /* AUX_DATA - [11:0] */ | ||
| 26 | #define WM831X_AUX_DATA_WIDTH 12 /* AUX_DATA - [11:0] */ | ||
| 27 | |||
| 28 | /* | ||
| 29 | * R16430 (0x402E) - AuxADC Control | ||
| 30 | */ | ||
| 31 | #define WM831X_AUX_ENA 0x8000 /* AUX_ENA */ | ||
| 32 | #define WM831X_AUX_ENA_MASK 0x8000 /* AUX_ENA */ | ||
| 33 | #define WM831X_AUX_ENA_SHIFT 15 /* AUX_ENA */ | ||
| 34 | #define WM831X_AUX_ENA_WIDTH 1 /* AUX_ENA */ | ||
| 35 | #define WM831X_AUX_CVT_ENA 0x4000 /* AUX_CVT_ENA */ | ||
| 36 | #define WM831X_AUX_CVT_ENA_MASK 0x4000 /* AUX_CVT_ENA */ | ||
| 37 | #define WM831X_AUX_CVT_ENA_SHIFT 14 /* AUX_CVT_ENA */ | ||
| 38 | #define WM831X_AUX_CVT_ENA_WIDTH 1 /* AUX_CVT_ENA */ | ||
| 39 | #define WM831X_AUX_SLPENA 0x1000 /* AUX_SLPENA */ | ||
| 40 | #define WM831X_AUX_SLPENA_MASK 0x1000 /* AUX_SLPENA */ | ||
| 41 | #define WM831X_AUX_SLPENA_SHIFT 12 /* AUX_SLPENA */ | ||
| 42 | #define WM831X_AUX_SLPENA_WIDTH 1 /* AUX_SLPENA */ | ||
| 43 | #define WM831X_AUX_FRC_ENA 0x0800 /* AUX_FRC_ENA */ | ||
| 44 | #define WM831X_AUX_FRC_ENA_MASK 0x0800 /* AUX_FRC_ENA */ | ||
| 45 | #define WM831X_AUX_FRC_ENA_SHIFT 11 /* AUX_FRC_ENA */ | ||
| 46 | #define WM831X_AUX_FRC_ENA_WIDTH 1 /* AUX_FRC_ENA */ | ||
| 47 | #define WM831X_AUX_RATE_MASK 0x003F /* AUX_RATE - [5:0] */ | ||
| 48 | #define WM831X_AUX_RATE_SHIFT 0 /* AUX_RATE - [5:0] */ | ||
| 49 | #define WM831X_AUX_RATE_WIDTH 6 /* AUX_RATE - [5:0] */ | ||
| 50 | |||
| 51 | /* | ||
| 52 | * R16431 (0x402F) - AuxADC Source | ||
| 53 | */ | ||
| 54 | #define WM831X_AUX_CAL_SEL 0x8000 /* AUX_CAL_SEL */ | ||
| 55 | #define WM831X_AUX_CAL_SEL_MASK 0x8000 /* AUX_CAL_SEL */ | ||
| 56 | #define WM831X_AUX_CAL_SEL_SHIFT 15 /* AUX_CAL_SEL */ | ||
| 57 | #define WM831X_AUX_CAL_SEL_WIDTH 1 /* AUX_CAL_SEL */ | ||
| 58 | #define WM831X_AUX_BKUP_BATT_SEL 0x0400 /* AUX_BKUP_BATT_SEL */ | ||
| 59 | #define WM831X_AUX_BKUP_BATT_SEL_MASK 0x0400 /* AUX_BKUP_BATT_SEL */ | ||
| 60 | #define WM831X_AUX_BKUP_BATT_SEL_SHIFT 10 /* AUX_BKUP_BATT_SEL */ | ||
| 61 | #define WM831X_AUX_BKUP_BATT_SEL_WIDTH 1 /* AUX_BKUP_BATT_SEL */ | ||
| 62 | #define WM831X_AUX_WALL_SEL 0x0200 /* AUX_WALL_SEL */ | ||
| 63 | #define WM831X_AUX_WALL_SEL_MASK 0x0200 /* AUX_WALL_SEL */ | ||
| 64 | #define WM831X_AUX_WALL_SEL_SHIFT 9 /* AUX_WALL_SEL */ | ||
| 65 | #define WM831X_AUX_WALL_SEL_WIDTH 1 /* AUX_WALL_SEL */ | ||
| 66 | #define WM831X_AUX_BATT_SEL 0x0100 /* AUX_BATT_SEL */ | ||
| 67 | #define WM831X_AUX_BATT_SEL_MASK 0x0100 /* AUX_BATT_SEL */ | ||
| 68 | #define WM831X_AUX_BATT_SEL_SHIFT 8 /* AUX_BATT_SEL */ | ||
| 69 | #define WM831X_AUX_BATT_SEL_WIDTH 1 /* AUX_BATT_SEL */ | ||
| 70 | #define WM831X_AUX_USB_SEL 0x0080 /* AUX_USB_SEL */ | ||
| 71 | #define WM831X_AUX_USB_SEL_MASK 0x0080 /* AUX_USB_SEL */ | ||
| 72 | #define WM831X_AUX_USB_SEL_SHIFT 7 /* AUX_USB_SEL */ | ||
| 73 | #define WM831X_AUX_USB_SEL_WIDTH 1 /* AUX_USB_SEL */ | ||
| 74 | #define WM831X_AUX_SYSVDD_SEL 0x0040 /* AUX_SYSVDD_SEL */ | ||
| 75 | #define WM831X_AUX_SYSVDD_SEL_MASK 0x0040 /* AUX_SYSVDD_SEL */ | ||
| 76 | #define WM831X_AUX_SYSVDD_SEL_SHIFT 6 /* AUX_SYSVDD_SEL */ | ||
| 77 | #define WM831X_AUX_SYSVDD_SEL_WIDTH 1 /* AUX_SYSVDD_SEL */ | ||
| 78 | #define WM831X_AUX_BATT_TEMP_SEL 0x0020 /* AUX_BATT_TEMP_SEL */ | ||
| 79 | #define WM831X_AUX_BATT_TEMP_SEL_MASK 0x0020 /* AUX_BATT_TEMP_SEL */ | ||
| 80 | #define WM831X_AUX_BATT_TEMP_SEL_SHIFT 5 /* AUX_BATT_TEMP_SEL */ | ||
| 81 | #define WM831X_AUX_BATT_TEMP_SEL_WIDTH 1 /* AUX_BATT_TEMP_SEL */ | ||
| 82 | #define WM831X_AUX_CHIP_TEMP_SEL 0x0010 /* AUX_CHIP_TEMP_SEL */ | ||
| 83 | #define WM831X_AUX_CHIP_TEMP_SEL_MASK 0x0010 /* AUX_CHIP_TEMP_SEL */ | ||
| 84 | #define WM831X_AUX_CHIP_TEMP_SEL_SHIFT 4 /* AUX_CHIP_TEMP_SEL */ | ||
| 85 | #define WM831X_AUX_CHIP_TEMP_SEL_WIDTH 1 /* AUX_CHIP_TEMP_SEL */ | ||
| 86 | #define WM831X_AUX_AUX4_SEL 0x0008 /* AUX_AUX4_SEL */ | ||
| 87 | #define WM831X_AUX_AUX4_SEL_MASK 0x0008 /* AUX_AUX4_SEL */ | ||
| 88 | #define WM831X_AUX_AUX4_SEL_SHIFT 3 /* AUX_AUX4_SEL */ | ||
| 89 | #define WM831X_AUX_AUX4_SEL_WIDTH 1 /* AUX_AUX4_SEL */ | ||
| 90 | #define WM831X_AUX_AUX3_SEL 0x0004 /* AUX_AUX3_SEL */ | ||
| 91 | #define WM831X_AUX_AUX3_SEL_MASK 0x0004 /* AUX_AUX3_SEL */ | ||
| 92 | #define WM831X_AUX_AUX3_SEL_SHIFT 2 /* AUX_AUX3_SEL */ | ||
| 93 | #define WM831X_AUX_AUX3_SEL_WIDTH 1 /* AUX_AUX3_SEL */ | ||
| 94 | #define WM831X_AUX_AUX2_SEL 0x0002 /* AUX_AUX2_SEL */ | ||
| 95 | #define WM831X_AUX_AUX2_SEL_MASK 0x0002 /* AUX_AUX2_SEL */ | ||
| 96 | #define WM831X_AUX_AUX2_SEL_SHIFT 1 /* AUX_AUX2_SEL */ | ||
| 97 | #define WM831X_AUX_AUX2_SEL_WIDTH 1 /* AUX_AUX2_SEL */ | ||
| 98 | #define WM831X_AUX_AUX1_SEL 0x0001 /* AUX_AUX1_SEL */ | ||
| 99 | #define WM831X_AUX_AUX1_SEL_MASK 0x0001 /* AUX_AUX1_SEL */ | ||
| 100 | #define WM831X_AUX_AUX1_SEL_SHIFT 0 /* AUX_AUX1_SEL */ | ||
| 101 | #define WM831X_AUX_AUX1_SEL_WIDTH 1 /* AUX_AUX1_SEL */ | ||
| 102 | |||
| 103 | /* | ||
| 104 | * R16432 (0x4030) - Comparator Control | ||
| 105 | */ | ||
| 106 | #define WM831X_DCOMP4_STS 0x0800 /* DCOMP4_STS */ | ||
| 107 | #define WM831X_DCOMP4_STS_MASK 0x0800 /* DCOMP4_STS */ | ||
| 108 | #define WM831X_DCOMP4_STS_SHIFT 11 /* DCOMP4_STS */ | ||
| 109 | #define WM831X_DCOMP4_STS_WIDTH 1 /* DCOMP4_STS */ | ||
| 110 | #define WM831X_DCOMP3_STS 0x0400 /* DCOMP3_STS */ | ||
| 111 | #define WM831X_DCOMP3_STS_MASK 0x0400 /* DCOMP3_STS */ | ||
| 112 | #define WM831X_DCOMP3_STS_SHIFT 10 /* DCOMP3_STS */ | ||
| 113 | #define WM831X_DCOMP3_STS_WIDTH 1 /* DCOMP3_STS */ | ||
| 114 | #define WM831X_DCOMP2_STS 0x0200 /* DCOMP2_STS */ | ||
| 115 | #define WM831X_DCOMP2_STS_MASK 0x0200 /* DCOMP2_STS */ | ||
| 116 | #define WM831X_DCOMP2_STS_SHIFT 9 /* DCOMP2_STS */ | ||
| 117 | #define WM831X_DCOMP2_STS_WIDTH 1 /* DCOMP2_STS */ | ||
| 118 | #define WM831X_DCOMP1_STS 0x0100 /* DCOMP1_STS */ | ||
| 119 | #define WM831X_DCOMP1_STS_MASK 0x0100 /* DCOMP1_STS */ | ||
| 120 | #define WM831X_DCOMP1_STS_SHIFT 8 /* DCOMP1_STS */ | ||
| 121 | #define WM831X_DCOMP1_STS_WIDTH 1 /* DCOMP1_STS */ | ||
| 122 | #define WM831X_DCMP4_ENA 0x0008 /* DCMP4_ENA */ | ||
| 123 | #define WM831X_DCMP4_ENA_MASK 0x0008 /* DCMP4_ENA */ | ||
| 124 | #define WM831X_DCMP4_ENA_SHIFT 3 /* DCMP4_ENA */ | ||
| 125 | #define WM831X_DCMP4_ENA_WIDTH 1 /* DCMP4_ENA */ | ||
| 126 | #define WM831X_DCMP3_ENA 0x0004 /* DCMP3_ENA */ | ||
| 127 | #define WM831X_DCMP3_ENA_MASK 0x0004 /* DCMP3_ENA */ | ||
| 128 | #define WM831X_DCMP3_ENA_SHIFT 2 /* DCMP3_ENA */ | ||
| 129 | #define WM831X_DCMP3_ENA_WIDTH 1 /* DCMP3_ENA */ | ||
| 130 | #define WM831X_DCMP2_ENA 0x0002 /* DCMP2_ENA */ | ||
| 131 | #define WM831X_DCMP2_ENA_MASK 0x0002 /* DCMP2_ENA */ | ||
| 132 | #define WM831X_DCMP2_ENA_SHIFT 1 /* DCMP2_ENA */ | ||
| 133 | #define WM831X_DCMP2_ENA_WIDTH 1 /* DCMP2_ENA */ | ||
| 134 | #define WM831X_DCMP1_ENA 0x0001 /* DCMP1_ENA */ | ||
| 135 | #define WM831X_DCMP1_ENA_MASK 0x0001 /* DCMP1_ENA */ | ||
| 136 | #define WM831X_DCMP1_ENA_SHIFT 0 /* DCMP1_ENA */ | ||
| 137 | #define WM831X_DCMP1_ENA_WIDTH 1 /* DCMP1_ENA */ | ||
| 138 | |||
| 139 | /* | ||
| 140 | * R16433 (0x4031) - Comparator 1 | ||
| 141 | */ | ||
| 142 | #define WM831X_DCMP1_SRC_MASK 0xE000 /* DCMP1_SRC - [15:13] */ | ||
| 143 | #define WM831X_DCMP1_SRC_SHIFT 13 /* DCMP1_SRC - [15:13] */ | ||
| 144 | #define WM831X_DCMP1_SRC_WIDTH 3 /* DCMP1_SRC - [15:13] */ | ||
| 145 | #define WM831X_DCMP1_GT 0x1000 /* DCMP1_GT */ | ||
| 146 | #define WM831X_DCMP1_GT_MASK 0x1000 /* DCMP1_GT */ | ||
| 147 | #define WM831X_DCMP1_GT_SHIFT 12 /* DCMP1_GT */ | ||
| 148 | #define WM831X_DCMP1_GT_WIDTH 1 /* DCMP1_GT */ | ||
| 149 | #define WM831X_DCMP1_THR_MASK 0x0FFF /* DCMP1_THR - [11:0] */ | ||
| 150 | #define WM831X_DCMP1_THR_SHIFT 0 /* DCMP1_THR - [11:0] */ | ||
| 151 | #define WM831X_DCMP1_THR_WIDTH 12 /* DCMP1_THR - [11:0] */ | ||
| 152 | |||
| 153 | /* | ||
| 154 | * R16434 (0x4032) - Comparator 2 | ||
| 155 | */ | ||
| 156 | #define WM831X_DCMP2_SRC_MASK 0xE000 /* DCMP2_SRC - [15:13] */ | ||
| 157 | #define WM831X_DCMP2_SRC_SHIFT 13 /* DCMP2_SRC - [15:13] */ | ||
| 158 | #define WM831X_DCMP2_SRC_WIDTH 3 /* DCMP2_SRC - [15:13] */ | ||
| 159 | #define WM831X_DCMP2_GT 0x1000 /* DCMP2_GT */ | ||
| 160 | #define WM831X_DCMP2_GT_MASK 0x1000 /* DCMP2_GT */ | ||
| 161 | #define WM831X_DCMP2_GT_SHIFT 12 /* DCMP2_GT */ | ||
| 162 | #define WM831X_DCMP2_GT_WIDTH 1 /* DCMP2_GT */ | ||
| 163 | #define WM831X_DCMP2_THR_MASK 0x0FFF /* DCMP2_THR - [11:0] */ | ||
| 164 | #define WM831X_DCMP2_THR_SHIFT 0 /* DCMP2_THR - [11:0] */ | ||
| 165 | #define WM831X_DCMP2_THR_WIDTH 12 /* DCMP2_THR - [11:0] */ | ||
| 166 | |||
| 167 | /* | ||
| 168 | * R16435 (0x4033) - Comparator 3 | ||
| 169 | */ | ||
| 170 | #define WM831X_DCMP3_SRC_MASK 0xE000 /* DCMP3_SRC - [15:13] */ | ||
| 171 | #define WM831X_DCMP3_SRC_SHIFT 13 /* DCMP3_SRC - [15:13] */ | ||
| 172 | #define WM831X_DCMP3_SRC_WIDTH 3 /* DCMP3_SRC - [15:13] */ | ||
| 173 | #define WM831X_DCMP3_GT 0x1000 /* DCMP3_GT */ | ||
| 174 | #define WM831X_DCMP3_GT_MASK 0x1000 /* DCMP3_GT */ | ||
| 175 | #define WM831X_DCMP3_GT_SHIFT 12 /* DCMP3_GT */ | ||
| 176 | #define WM831X_DCMP3_GT_WIDTH 1 /* DCMP3_GT */ | ||
| 177 | #define WM831X_DCMP3_THR_MASK 0x0FFF /* DCMP3_THR - [11:0] */ | ||
| 178 | #define WM831X_DCMP3_THR_SHIFT 0 /* DCMP3_THR - [11:0] */ | ||
| 179 | #define WM831X_DCMP3_THR_WIDTH 12 /* DCMP3_THR - [11:0] */ | ||
| 180 | |||
| 181 | /* | ||
| 182 | * R16436 (0x4034) - Comparator 4 | ||
| 183 | */ | ||
| 184 | #define WM831X_DCMP4_SRC_MASK 0xE000 /* DCMP4_SRC - [15:13] */ | ||
| 185 | #define WM831X_DCMP4_SRC_SHIFT 13 /* DCMP4_SRC - [15:13] */ | ||
| 186 | #define WM831X_DCMP4_SRC_WIDTH 3 /* DCMP4_SRC - [15:13] */ | ||
| 187 | #define WM831X_DCMP4_GT 0x1000 /* DCMP4_GT */ | ||
| 188 | #define WM831X_DCMP4_GT_MASK 0x1000 /* DCMP4_GT */ | ||
| 189 | #define WM831X_DCMP4_GT_SHIFT 12 /* DCMP4_GT */ | ||
| 190 | #define WM831X_DCMP4_GT_WIDTH 1 /* DCMP4_GT */ | ||
| 191 | #define WM831X_DCMP4_THR_MASK 0x0FFF /* DCMP4_THR - [11:0] */ | ||
| 192 | #define WM831X_DCMP4_THR_SHIFT 0 /* DCMP4_THR - [11:0] */ | ||
| 193 | #define WM831X_DCMP4_THR_WIDTH 12 /* DCMP4_THR - [11:0] */ | ||
| 194 | |||
| 195 | #define WM831X_AUX_CAL_FACTOR 0xfff | ||
| 196 | #define WM831X_AUX_CAL_NOMINAL 0x222 | ||
| 197 | |||
| 198 | enum wm831x_auxadc { | ||
| 199 | WM831X_AUX_CAL = 15, | ||
| 200 | WM831X_AUX_BKUP_BATT = 10, | ||
| 201 | WM831X_AUX_WALL = 9, | ||
| 202 | WM831X_AUX_BATT = 8, | ||
| 203 | WM831X_AUX_USB = 7, | ||
| 204 | WM831X_AUX_SYSVDD = 6, | ||
| 205 | WM831X_AUX_BATT_TEMP = 5, | ||
| 206 | WM831X_AUX_CHIP_TEMP = 4, | ||
| 207 | WM831X_AUX_AUX4 = 3, | ||
| 208 | WM831X_AUX_AUX3 = 2, | ||
| 209 | WM831X_AUX_AUX2 = 1, | ||
| 210 | WM831X_AUX_AUX1 = 0, | ||
| 211 | }; | ||
| 212 | |||
| 213 | int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input); | ||
| 214 | int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input); | ||
| 215 | |||
| 216 | #endif | ||
diff --git a/include/linux/mfd/wm831x/core.h b/include/linux/mfd/wm831x/core.h new file mode 100644 index 000000000000..91eb493bf14c --- /dev/null +++ b/include/linux/mfd/wm831x/core.h | |||
| @@ -0,0 +1,289 @@ | |||
| 1 | /* | ||
| 2 | * include/linux/mfd/wm831x/core.h -- Core interface for WM831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_CORE_H__ | ||
| 16 | #define __MFD_WM831X_CORE_H__ | ||
| 17 | |||
| 18 | #include <linux/interrupt.h> | ||
| 19 | #include <linux/workqueue.h> | ||
| 20 | |||
| 21 | /* | ||
| 22 | * Register values. | ||
| 23 | */ | ||
| 24 | #define WM831X_RESET_ID 0x00 | ||
| 25 | #define WM831X_REVISION 0x01 | ||
| 26 | #define WM831X_PARENT_ID 0x4000 | ||
| 27 | #define WM831X_SYSVDD_CONTROL 0x4001 | ||
| 28 | #define WM831X_THERMAL_MONITORING 0x4002 | ||
| 29 | #define WM831X_POWER_STATE 0x4003 | ||
| 30 | #define WM831X_WATCHDOG 0x4004 | ||
| 31 | #define WM831X_ON_PIN_CONTROL 0x4005 | ||
| 32 | #define WM831X_RESET_CONTROL 0x4006 | ||
| 33 | #define WM831X_CONTROL_INTERFACE 0x4007 | ||
| 34 | #define WM831X_SECURITY_KEY 0x4008 | ||
| 35 | #define WM831X_SOFTWARE_SCRATCH 0x4009 | ||
| 36 | #define WM831X_OTP_CONTROL 0x400A | ||
| 37 | #define WM831X_GPIO_LEVEL 0x400C | ||
| 38 | #define WM831X_SYSTEM_STATUS 0x400D | ||
| 39 | #define WM831X_ON_SOURCE 0x400E | ||
| 40 | #define WM831X_OFF_SOURCE 0x400F | ||
| 41 | #define WM831X_SYSTEM_INTERRUPTS 0x4010 | ||
| 42 | #define WM831X_INTERRUPT_STATUS_1 0x4011 | ||
| 43 | #define WM831X_INTERRUPT_STATUS_2 0x4012 | ||
| 44 | #define WM831X_INTERRUPT_STATUS_3 0x4013 | ||
| 45 | #define WM831X_INTERRUPT_STATUS_4 0x4014 | ||
| 46 | #define WM831X_INTERRUPT_STATUS_5 0x4015 | ||
| 47 | #define WM831X_IRQ_CONFIG 0x4017 | ||
| 48 | #define WM831X_SYSTEM_INTERRUPTS_MASK 0x4018 | ||
| 49 | #define WM831X_INTERRUPT_STATUS_1_MASK 0x4019 | ||
| 50 | #define WM831X_INTERRUPT_STATUS_2_MASK 0x401A | ||
| 51 | #define WM831X_INTERRUPT_STATUS_3_MASK 0x401B | ||
| 52 | #define WM831X_INTERRUPT_STATUS_4_MASK 0x401C | ||
| 53 | #define WM831X_INTERRUPT_STATUS_5_MASK 0x401D | ||
| 54 | #define WM831X_RTC_WRITE_COUNTER 0x4020 | ||
| 55 | #define WM831X_RTC_TIME_1 0x4021 | ||
| 56 | #define WM831X_RTC_TIME_2 0x4022 | ||
| 57 | #define WM831X_RTC_ALARM_1 0x4023 | ||
| 58 | #define WM831X_RTC_ALARM_2 0x4024 | ||
| 59 | #define WM831X_RTC_CONTROL 0x4025 | ||
| 60 | #define WM831X_RTC_TRIM 0x4026 | ||
| 61 | #define WM831X_TOUCH_CONTROL_1 0x4028 | ||
| 62 | #define WM831X_TOUCH_CONTROL_2 0x4029 | ||
| 63 | #define WM831X_TOUCH_DATA_X 0x402A | ||
| 64 | #define WM831X_TOUCH_DATA_Y 0x402B | ||
| 65 | #define WM831X_TOUCH_DATA_Z 0x402C | ||
| 66 | #define WM831X_AUXADC_DATA 0x402D | ||
| 67 | #define WM831X_AUXADC_CONTROL 0x402E | ||
| 68 | #define WM831X_AUXADC_SOURCE 0x402F | ||
| 69 | #define WM831X_COMPARATOR_CONTROL 0x4030 | ||
| 70 | #define WM831X_COMPARATOR_1 0x4031 | ||
| 71 | #define WM831X_COMPARATOR_2 0x4032 | ||
| 72 | #define WM831X_COMPARATOR_3 0x4033 | ||
| 73 | #define WM831X_COMPARATOR_4 0x4034 | ||
| 74 | #define WM831X_GPIO1_CONTROL 0x4038 | ||
| 75 | #define WM831X_GPIO2_CONTROL 0x4039 | ||
| 76 | #define WM831X_GPIO3_CONTROL 0x403A | ||
| 77 | #define WM831X_GPIO4_CONTROL 0x403B | ||
| 78 | #define WM831X_GPIO5_CONTROL 0x403C | ||
| 79 | #define WM831X_GPIO6_CONTROL 0x403D | ||
| 80 | #define WM831X_GPIO7_CONTROL 0x403E | ||
| 81 | #define WM831X_GPIO8_CONTROL 0x403F | ||
| 82 | #define WM831X_GPIO9_CONTROL 0x4040 | ||
| 83 | #define WM831X_GPIO10_CONTROL 0x4041 | ||
| 84 | #define WM831X_GPIO11_CONTROL 0x4042 | ||
| 85 | #define WM831X_GPIO12_CONTROL 0x4043 | ||
| 86 | #define WM831X_GPIO13_CONTROL 0x4044 | ||
| 87 | #define WM831X_GPIO14_CONTROL 0x4045 | ||
| 88 | #define WM831X_GPIO15_CONTROL 0x4046 | ||
| 89 | #define WM831X_GPIO16_CONTROL 0x4047 | ||
| 90 | #define WM831X_CHARGER_CONTROL_1 0x4048 | ||
| 91 | #define WM831X_CHARGER_CONTROL_2 0x4049 | ||
| 92 | #define WM831X_CHARGER_STATUS 0x404A | ||
| 93 | #define WM831X_BACKUP_CHARGER_CONTROL 0x404B | ||
| 94 | #define WM831X_STATUS_LED_1 0x404C | ||
| 95 | #define WM831X_STATUS_LED_2 0x404D | ||
| 96 | #define WM831X_CURRENT_SINK_1 0x404E | ||
| 97 | #define WM831X_CURRENT_SINK_2 0x404F | ||
| 98 | #define WM831X_DCDC_ENABLE 0x4050 | ||
| 99 | #define WM831X_LDO_ENABLE 0x4051 | ||
| 100 | #define WM831X_DCDC_STATUS 0x4052 | ||
| 101 | #define WM831X_LDO_STATUS 0x4053 | ||
| 102 | #define WM831X_DCDC_UV_STATUS 0x4054 | ||
| 103 | #define WM831X_LDO_UV_STATUS 0x4055 | ||
| 104 | #define WM831X_DC1_CONTROL_1 0x4056 | ||
| 105 | #define WM831X_DC1_CONTROL_2 0x4057 | ||
| 106 | #define WM831X_DC1_ON_CONFIG 0x4058 | ||
| 107 | #define WM831X_DC1_SLEEP_CONTROL 0x4059 | ||
| 108 | #define WM831X_DC1_DVS_CONTROL 0x405A | ||
| 109 | #define WM831X_DC2_CONTROL_1 0x405B | ||
| 110 | #define WM831X_DC2_CONTROL_2 0x405C | ||
| 111 | #define WM831X_DC2_ON_CONFIG 0x405D | ||
| 112 | #define WM831X_DC2_SLEEP_CONTROL 0x405E | ||
| 113 | #define WM831X_DC2_DVS_CONTROL 0x405F | ||
| 114 | #define WM831X_DC3_CONTROL_1 0x4060 | ||
| 115 | #define WM831X_DC3_CONTROL_2 0x4061 | ||
| 116 | #define WM831X_DC3_ON_CONFIG 0x4062 | ||
| 117 | #define WM831X_DC3_SLEEP_CONTROL 0x4063 | ||
| 118 | #define WM831X_DC4_CONTROL 0x4064 | ||
| 119 | #define WM831X_DC4_SLEEP_CONTROL 0x4065 | ||
| 120 | #define WM831X_EPE1_CONTROL 0x4066 | ||
| 121 | #define WM831X_EPE2_CONTROL 0x4067 | ||
| 122 | #define WM831X_LDO1_CONTROL 0x4068 | ||
| 123 | #define WM831X_LDO1_ON_CONTROL 0x4069 | ||
| 124 | #define WM831X_LDO1_SLEEP_CONTROL 0x406A | ||
| 125 | #define WM831X_LDO2_CONTROL 0x406B | ||
| 126 | #define WM831X_LDO2_ON_CONTROL 0x406C | ||
| 127 | #define WM831X_LDO2_SLEEP_CONTROL 0x406D | ||
| 128 | #define WM831X_LDO3_CONTROL 0x406E | ||
| 129 | #define WM831X_LDO3_ON_CONTROL 0x406F | ||
| 130 | #define WM831X_LDO3_SLEEP_CONTROL 0x4070 | ||
| 131 | #define WM831X_LDO4_CONTROL 0x4071 | ||
| 132 | #define WM831X_LDO4_ON_CONTROL 0x4072 | ||
| 133 | #define WM831X_LDO4_SLEEP_CONTROL 0x4073 | ||
| 134 | #define WM831X_LDO5_CONTROL 0x4074 | ||
| 135 | #define WM831X_LDO5_ON_CONTROL 0x4075 | ||
| 136 | #define WM831X_LDO5_SLEEP_CONTROL 0x4076 | ||
| 137 | #define WM831X_LDO6_CONTROL 0x4077 | ||
| 138 | #define WM831X_LDO6_ON_CONTROL 0x4078 | ||
| 139 | #define WM831X_LDO6_SLEEP_CONTROL 0x4079 | ||
| 140 | #define WM831X_LDO7_CONTROL 0x407A | ||
| 141 | #define WM831X_LDO7_ON_CONTROL 0x407B | ||
| 142 | #define WM831X_LDO7_SLEEP_CONTROL 0x407C | ||
| 143 | #define WM831X_LDO8_CONTROL 0x407D | ||
| 144 | #define WM831X_LDO8_ON_CONTROL 0x407E | ||
| 145 | #define WM831X_LDO8_SLEEP_CONTROL 0x407F | ||
| 146 | #define WM831X_LDO9_CONTROL 0x4080 | ||
| 147 | #define WM831X_LDO9_ON_CONTROL 0x4081 | ||
| 148 | #define WM831X_LDO9_SLEEP_CONTROL 0x4082 | ||
| 149 | #define WM831X_LDO10_CONTROL 0x4083 | ||
| 150 | #define WM831X_LDO10_ON_CONTROL 0x4084 | ||
| 151 | #define WM831X_LDO10_SLEEP_CONTROL 0x4085 | ||
| 152 | #define WM831X_LDO11_ON_CONTROL 0x4087 | ||
| 153 | #define WM831X_LDO11_SLEEP_CONTROL 0x4088 | ||
| 154 | #define WM831X_POWER_GOOD_SOURCE_1 0x408E | ||
| 155 | #define WM831X_POWER_GOOD_SOURCE_2 0x408F | ||
| 156 | #define WM831X_CLOCK_CONTROL_1 0x4090 | ||
| 157 | #define WM831X_CLOCK_CONTROL_2 0x4091 | ||
| 158 | #define WM831X_FLL_CONTROL_1 0x4092 | ||
| 159 | #define WM831X_FLL_CONTROL_2 0x4093 | ||
| 160 | #define WM831X_FLL_CONTROL_3 0x4094 | ||
| 161 | #define WM831X_FLL_CONTROL_4 0x4095 | ||
| 162 | #define WM831X_FLL_CONTROL_5 0x4096 | ||
| 163 | #define WM831X_UNIQUE_ID_1 0x7800 | ||
| 164 | #define WM831X_UNIQUE_ID_2 0x7801 | ||
| 165 | #define WM831X_UNIQUE_ID_3 0x7802 | ||
| 166 | #define WM831X_UNIQUE_ID_4 0x7803 | ||
| 167 | #define WM831X_UNIQUE_ID_5 0x7804 | ||
| 168 | #define WM831X_UNIQUE_ID_6 0x7805 | ||
| 169 | #define WM831X_UNIQUE_ID_7 0x7806 | ||
| 170 | #define WM831X_UNIQUE_ID_8 0x7807 | ||
| 171 | #define WM831X_FACTORY_OTP_ID 0x7808 | ||
| 172 | #define WM831X_FACTORY_OTP_1 0x7809 | ||
| 173 | #define WM831X_FACTORY_OTP_2 0x780A | ||
| 174 | #define WM831X_FACTORY_OTP_3 0x780B | ||
| 175 | #define WM831X_FACTORY_OTP_4 0x780C | ||
| 176 | #define WM831X_FACTORY_OTP_5 0x780D | ||
| 177 | #define WM831X_CUSTOMER_OTP_ID 0x7810 | ||
| 178 | #define WM831X_DC1_OTP_CONTROL 0x7811 | ||
| 179 | #define WM831X_DC2_OTP_CONTROL 0x7812 | ||
| 180 | #define WM831X_DC3_OTP_CONTROL 0x7813 | ||
| 181 | #define WM831X_LDO1_2_OTP_CONTROL 0x7814 | ||
| 182 | #define WM831X_LDO3_4_OTP_CONTROL 0x7815 | ||
| 183 | #define WM831X_LDO5_6_OTP_CONTROL 0x7816 | ||
| 184 | #define WM831X_LDO7_8_OTP_CONTROL 0x7817 | ||
| 185 | #define WM831X_LDO9_10_OTP_CONTROL 0x7818 | ||
| 186 | #define WM831X_LDO11_EPE_CONTROL 0x7819 | ||
| 187 | #define WM831X_GPIO1_OTP_CONTROL 0x781A | ||
| 188 | #define WM831X_GPIO2_OTP_CONTROL 0x781B | ||
| 189 | #define WM831X_GPIO3_OTP_CONTROL 0x781C | ||
| 190 | #define WM831X_GPIO4_OTP_CONTROL 0x781D | ||
| 191 | #define WM831X_GPIO5_OTP_CONTROL 0x781E | ||
| 192 | #define WM831X_GPIO6_OTP_CONTROL 0x781F | ||
| 193 | #define WM831X_DBE_CHECK_DATA 0x7827 | ||
| 194 | |||
| 195 | /* | ||
| 196 | * R0 (0x00) - Reset ID | ||
| 197 | */ | ||
| 198 | #define WM831X_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */ | ||
| 199 | #define WM831X_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */ | ||
| 200 | #define WM831X_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */ | ||
| 201 | |||
| 202 | /* | ||
| 203 | * R1 (0x01) - Revision | ||
| 204 | */ | ||
| 205 | #define WM831X_PARENT_REV_MASK 0xFF00 /* PARENT_REV - [15:8] */ | ||
| 206 | #define WM831X_PARENT_REV_SHIFT 8 /* PARENT_REV - [15:8] */ | ||
| 207 | #define WM831X_PARENT_REV_WIDTH 8 /* PARENT_REV - [15:8] */ | ||
| 208 | #define WM831X_CHILD_REV_MASK 0x00FF /* CHILD_REV - [7:0] */ | ||
| 209 | #define WM831X_CHILD_REV_SHIFT 0 /* CHILD_REV - [7:0] */ | ||
| 210 | #define WM831X_CHILD_REV_WIDTH 8 /* CHILD_REV - [7:0] */ | ||
| 211 | |||
| 212 | /* | ||
| 213 | * R16384 (0x4000) - Parent ID | ||
| 214 | */ | ||
| 215 | #define WM831X_PARENT_ID_MASK 0xFFFF /* PARENT_ID - [15:0] */ | ||
| 216 | #define WM831X_PARENT_ID_SHIFT 0 /* PARENT_ID - [15:0] */ | ||
| 217 | #define WM831X_PARENT_ID_WIDTH 16 /* PARENT_ID - [15:0] */ | ||
| 218 | |||
| 219 | /* | ||
| 220 | * R16389 (0x4005) - ON Pin Control | ||
| 221 | */ | ||
| 222 | #define WM831X_ON_PIN_SECACT_MASK 0x0300 /* ON_PIN_SECACT - [9:8] */ | ||
| 223 | #define WM831X_ON_PIN_SECACT_SHIFT 8 /* ON_PIN_SECACT - [9:8] */ | ||
| 224 | #define WM831X_ON_PIN_SECACT_WIDTH 2 /* ON_PIN_SECACT - [9:8] */ | ||
| 225 | #define WM831X_ON_PIN_PRIMACT_MASK 0x0030 /* ON_PIN_PRIMACT - [5:4] */ | ||
| 226 | #define WM831X_ON_PIN_PRIMACT_SHIFT 4 /* ON_PIN_PRIMACT - [5:4] */ | ||
| 227 | #define WM831X_ON_PIN_PRIMACT_WIDTH 2 /* ON_PIN_PRIMACT - [5:4] */ | ||
| 228 | #define WM831X_ON_PIN_STS 0x0008 /* ON_PIN_STS */ | ||
| 229 | #define WM831X_ON_PIN_STS_MASK 0x0008 /* ON_PIN_STS */ | ||
| 230 | #define WM831X_ON_PIN_STS_SHIFT 3 /* ON_PIN_STS */ | ||
| 231 | #define WM831X_ON_PIN_STS_WIDTH 1 /* ON_PIN_STS */ | ||
| 232 | #define WM831X_ON_PIN_TO_MASK 0x0003 /* ON_PIN_TO - [1:0] */ | ||
| 233 | #define WM831X_ON_PIN_TO_SHIFT 0 /* ON_PIN_TO - [1:0] */ | ||
| 234 | #define WM831X_ON_PIN_TO_WIDTH 2 /* ON_PIN_TO - [1:0] */ | ||
| 235 | |||
| 236 | struct regulator_dev; | ||
| 237 | |||
| 238 | struct wm831x { | ||
| 239 | struct mutex io_lock; | ||
| 240 | |||
| 241 | struct device *dev; | ||
| 242 | int (*read_dev)(struct wm831x *wm831x, unsigned short reg, | ||
| 243 | int bytes, void *dest); | ||
| 244 | int (*write_dev)(struct wm831x *wm831x, unsigned short reg, | ||
| 245 | int bytes, void *src); | ||
| 246 | |||
| 247 | void *control_data; | ||
| 248 | |||
| 249 | int irq; /* Our chip IRQ */ | ||
| 250 | struct mutex irq_lock; | ||
| 251 | struct workqueue_struct *irq_wq; | ||
| 252 | struct work_struct irq_work; | ||
| 253 | unsigned int irq_base; | ||
| 254 | int irq_masks[5]; | ||
| 255 | |||
| 256 | struct mutex auxadc_lock; | ||
| 257 | |||
| 258 | /* The WM831x has a security key blocking access to certain | ||
| 259 | * registers. The mutex is taken by the accessors for locking | ||
| 260 | * and unlocking the security key, locked is used to fail | ||
| 261 | * writes if the lock is held. | ||
| 262 | */ | ||
| 263 | struct mutex key_lock; | ||
| 264 | unsigned int locked:1; | ||
| 265 | }; | ||
| 266 | |||
| 267 | /* Device I/O API */ | ||
| 268 | int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg); | ||
| 269 | int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg, | ||
| 270 | unsigned short val); | ||
| 271 | void wm831x_reg_lock(struct wm831x *wm831x); | ||
| 272 | int wm831x_reg_unlock(struct wm831x *wm831x); | ||
| 273 | int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg, | ||
| 274 | unsigned short mask, unsigned short val); | ||
| 275 | int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg, | ||
| 276 | int count, u16 *buf); | ||
| 277 | |||
| 278 | int wm831x_irq_init(struct wm831x *wm831x, int irq); | ||
| 279 | void wm831x_irq_exit(struct wm831x *wm831x); | ||
| 280 | |||
| 281 | int __must_check wm831x_request_irq(struct wm831x *wm831x, | ||
| 282 | unsigned int irq, irq_handler_t handler, | ||
| 283 | unsigned long flags, const char *name, | ||
| 284 | void *dev); | ||
| 285 | void wm831x_free_irq(struct wm831x *wm831x, unsigned int, void *); | ||
| 286 | void wm831x_disable_irq(struct wm831x *wm831x, int irq); | ||
| 287 | void wm831x_enable_irq(struct wm831x *wm831x, int irq); | ||
| 288 | |||
| 289 | #endif | ||
diff --git a/include/linux/mfd/wm831x/gpio.h b/include/linux/mfd/wm831x/gpio.h new file mode 100644 index 000000000000..2835614af0e3 --- /dev/null +++ b/include/linux/mfd/wm831x/gpio.h | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* | ||
| 2 | * include/linux/mfd/wm831x/gpio.h -- GPIO for WM831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_GPIO_H__ | ||
| 16 | #define __MFD_WM831X_GPIO_H__ | ||
| 17 | |||
| 18 | /* | ||
| 19 | * R16440-16455 (0x4038-0x4047) - GPIOx Control | ||
| 20 | */ | ||
| 21 | #define WM831X_GPN_DIR 0x8000 /* GPN_DIR */ | ||
| 22 | #define WM831X_GPN_DIR_MASK 0x8000 /* GPN_DIR */ | ||
| 23 | #define WM831X_GPN_DIR_SHIFT 15 /* GPN_DIR */ | ||
| 24 | #define WM831X_GPN_DIR_WIDTH 1 /* GPN_DIR */ | ||
| 25 | #define WM831X_GPN_PULL_MASK 0x6000 /* GPN_PULL - [14:13] */ | ||
| 26 | #define WM831X_GPN_PULL_SHIFT 13 /* GPN_PULL - [14:13] */ | ||
| 27 | #define WM831X_GPN_PULL_WIDTH 2 /* GPN_PULL - [14:13] */ | ||
| 28 | #define WM831X_GPN_INT_MODE 0x1000 /* GPN_INT_MODE */ | ||
| 29 | #define WM831X_GPN_INT_MODE_MASK 0x1000 /* GPN_INT_MODE */ | ||
| 30 | #define WM831X_GPN_INT_MODE_SHIFT 12 /* GPN_INT_MODE */ | ||
| 31 | #define WM831X_GPN_INT_MODE_WIDTH 1 /* GPN_INT_MODE */ | ||
| 32 | #define WM831X_GPN_PWR_DOM 0x0800 /* GPN_PWR_DOM */ | ||
| 33 | #define WM831X_GPN_PWR_DOM_MASK 0x0800 /* GPN_PWR_DOM */ | ||
| 34 | #define WM831X_GPN_PWR_DOM_SHIFT 11 /* GPN_PWR_DOM */ | ||
| 35 | #define WM831X_GPN_PWR_DOM_WIDTH 1 /* GPN_PWR_DOM */ | ||
| 36 | #define WM831X_GPN_POL 0x0400 /* GPN_POL */ | ||
| 37 | #define WM831X_GPN_POL_MASK 0x0400 /* GPN_POL */ | ||
| 38 | #define WM831X_GPN_POL_SHIFT 10 /* GPN_POL */ | ||
| 39 | #define WM831X_GPN_POL_WIDTH 1 /* GPN_POL */ | ||
| 40 | #define WM831X_GPN_OD 0x0200 /* GPN_OD */ | ||
| 41 | #define WM831X_GPN_OD_MASK 0x0200 /* GPN_OD */ | ||
| 42 | #define WM831X_GPN_OD_SHIFT 9 /* GPN_OD */ | ||
| 43 | #define WM831X_GPN_OD_WIDTH 1 /* GPN_OD */ | ||
| 44 | #define WM831X_GPN_TRI 0x0080 /* GPN_TRI */ | ||
| 45 | #define WM831X_GPN_TRI_MASK 0x0080 /* GPN_TRI */ | ||
| 46 | #define WM831X_GPN_TRI_SHIFT 7 /* GPN_TRI */ | ||
| 47 | #define WM831X_GPN_TRI_WIDTH 1 /* GPN_TRI */ | ||
| 48 | #define WM831X_GPN_FN_MASK 0x000F /* GPN_FN - [3:0] */ | ||
| 49 | #define WM831X_GPN_FN_SHIFT 0 /* GPN_FN - [3:0] */ | ||
| 50 | #define WM831X_GPN_FN_WIDTH 4 /* GPN_FN - [3:0] */ | ||
| 51 | |||
| 52 | #define WM831X_GPIO_PULL_NONE (0 << WM831X_GPN_PULL_SHIFT) | ||
| 53 | #define WM831X_GPIO_PULL_DOWN (1 << WM831X_GPN_PULL_SHIFT) | ||
| 54 | #define WM831X_GPIO_PULL_UP (2 << WM831X_GPN_PULL_SHIFT) | ||
| 55 | #endif | ||
diff --git a/include/linux/mfd/wm831x/irq.h b/include/linux/mfd/wm831x/irq.h new file mode 100644 index 000000000000..3a8c97656fda --- /dev/null +++ b/include/linux/mfd/wm831x/irq.h | |||
| @@ -0,0 +1,764 @@ | |||
| 1 | /* | ||
| 2 | * include/linux/mfd/wm831x/irq.h -- Interrupt controller for WM831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_IRQ_H__ | ||
| 16 | #define __MFD_WM831X_IRQ_H__ | ||
| 17 | |||
| 18 | /* Interrupt number assignments within Linux */ | ||
| 19 | #define WM831X_IRQ_TEMP_THW 0 | ||
| 20 | #define WM831X_IRQ_GPIO_1 1 | ||
| 21 | #define WM831X_IRQ_GPIO_2 2 | ||
| 22 | #define WM831X_IRQ_GPIO_3 3 | ||
| 23 | #define WM831X_IRQ_GPIO_4 4 | ||
| 24 | #define WM831X_IRQ_GPIO_5 5 | ||
| 25 | #define WM831X_IRQ_GPIO_6 6 | ||
| 26 | #define WM831X_IRQ_GPIO_7 7 | ||
| 27 | #define WM831X_IRQ_GPIO_8 8 | ||
| 28 | #define WM831X_IRQ_GPIO_9 9 | ||
| 29 | #define WM831X_IRQ_GPIO_10 10 | ||
| 30 | #define WM831X_IRQ_GPIO_11 11 | ||
| 31 | #define WM831X_IRQ_GPIO_12 12 | ||
| 32 | #define WM831X_IRQ_GPIO_13 13 | ||
| 33 | #define WM831X_IRQ_GPIO_14 14 | ||
| 34 | #define WM831X_IRQ_GPIO_15 15 | ||
| 35 | #define WM831X_IRQ_GPIO_16 16 | ||
| 36 | #define WM831X_IRQ_ON 17 | ||
| 37 | #define WM831X_IRQ_PPM_SYSLO 18 | ||
| 38 | #define WM831X_IRQ_PPM_PWR_SRC 19 | ||
| 39 | #define WM831X_IRQ_PPM_USB_CURR 20 | ||
| 40 | #define WM831X_IRQ_WDOG_TO 21 | ||
| 41 | #define WM831X_IRQ_RTC_PER 22 | ||
| 42 | #define WM831X_IRQ_RTC_ALM 23 | ||
| 43 | #define WM831X_IRQ_CHG_BATT_HOT 24 | ||
| 44 | #define WM831X_IRQ_CHG_BATT_COLD 25 | ||
| 45 | #define WM831X_IRQ_CHG_BATT_FAIL 26 | ||
| 46 | #define WM831X_IRQ_CHG_OV 27 | ||
| 47 | #define WM831X_IRQ_CHG_END 29 | ||
| 48 | #define WM831X_IRQ_CHG_TO 30 | ||
| 49 | #define WM831X_IRQ_CHG_MODE 31 | ||
| 50 | #define WM831X_IRQ_CHG_START 32 | ||
| 51 | #define WM831X_IRQ_TCHDATA 33 | ||
| 52 | #define WM831X_IRQ_TCHPD 34 | ||
| 53 | #define WM831X_IRQ_AUXADC_DATA 35 | ||
| 54 | #define WM831X_IRQ_AUXADC_DCOMP1 36 | ||
| 55 | #define WM831X_IRQ_AUXADC_DCOMP2 37 | ||
| 56 | #define WM831X_IRQ_AUXADC_DCOMP3 38 | ||
| 57 | #define WM831X_IRQ_AUXADC_DCOMP4 39 | ||
| 58 | #define WM831X_IRQ_CS1 40 | ||
| 59 | #define WM831X_IRQ_CS2 41 | ||
| 60 | #define WM831X_IRQ_HC_DC1 42 | ||
| 61 | #define WM831X_IRQ_HC_DC2 43 | ||
| 62 | #define WM831X_IRQ_UV_LDO1 44 | ||
| 63 | #define WM831X_IRQ_UV_LDO2 45 | ||
| 64 | #define WM831X_IRQ_UV_LDO3 46 | ||
| 65 | #define WM831X_IRQ_UV_LDO4 47 | ||
| 66 | #define WM831X_IRQ_UV_LDO5 48 | ||
| 67 | #define WM831X_IRQ_UV_LDO6 49 | ||
| 68 | #define WM831X_IRQ_UV_LDO7 50 | ||
| 69 | #define WM831X_IRQ_UV_LDO8 51 | ||
| 70 | #define WM831X_IRQ_UV_LDO9 52 | ||
| 71 | #define WM831X_IRQ_UV_LDO10 53 | ||
| 72 | #define WM831X_IRQ_UV_DC1 54 | ||
| 73 | #define WM831X_IRQ_UV_DC2 55 | ||
| 74 | #define WM831X_IRQ_UV_DC3 56 | ||
| 75 | #define WM831X_IRQ_UV_DC4 57 | ||
| 76 | |||
| 77 | #define WM831X_NUM_IRQS 58 | ||
| 78 | |||
| 79 | /* | ||
| 80 | * R16400 (0x4010) - System Interrupts | ||
| 81 | */ | ||
| 82 | #define WM831X_PS_INT 0x8000 /* PS_INT */ | ||
| 83 | #define WM831X_PS_INT_MASK 0x8000 /* PS_INT */ | ||
| 84 | #define WM831X_PS_INT_SHIFT 15 /* PS_INT */ | ||
| 85 | #define WM831X_PS_INT_WIDTH 1 /* PS_INT */ | ||
| 86 | #define WM831X_TEMP_INT 0x4000 /* TEMP_INT */ | ||
| 87 | #define WM831X_TEMP_INT_MASK 0x4000 /* TEMP_INT */ | ||
| 88 | #define WM831X_TEMP_INT_SHIFT 14 /* TEMP_INT */ | ||
| 89 | #define WM831X_TEMP_INT_WIDTH 1 /* TEMP_INT */ | ||
| 90 | #define WM831X_GP_INT 0x2000 /* GP_INT */ | ||
| 91 | #define WM831X_GP_INT_MASK 0x2000 /* GP_INT */ | ||
| 92 | #define WM831X_GP_INT_SHIFT 13 /* GP_INT */ | ||
| 93 | #define WM831X_GP_INT_WIDTH 1 /* GP_INT */ | ||
| 94 | #define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */ | ||
| 95 | #define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */ | ||
| 96 | #define WM831X_ON_PIN_INT_SHIFT 12 /* ON_PIN_INT */ | ||
| 97 | #define WM831X_ON_PIN_INT_WIDTH 1 /* ON_PIN_INT */ | ||
| 98 | #define WM831X_WDOG_INT 0x0800 /* WDOG_INT */ | ||
| 99 | #define WM831X_WDOG_INT_MASK 0x0800 /* WDOG_INT */ | ||
| 100 | #define WM831X_WDOG_INT_SHIFT 11 /* WDOG_INT */ | ||
| 101 | #define WM831X_WDOG_INT_WIDTH 1 /* WDOG_INT */ | ||
| 102 | #define WM831X_TCHDATA_INT 0x0400 /* TCHDATA_INT */ | ||
| 103 | #define WM831X_TCHDATA_INT_MASK 0x0400 /* TCHDATA_INT */ | ||
| 104 | #define WM831X_TCHDATA_INT_SHIFT 10 /* TCHDATA_INT */ | ||
| 105 | #define WM831X_TCHDATA_INT_WIDTH 1 /* TCHDATA_INT */ | ||
| 106 | #define WM831X_TCHPD_INT 0x0200 /* TCHPD_INT */ | ||
| 107 | #define WM831X_TCHPD_INT_MASK 0x0200 /* TCHPD_INT */ | ||
| 108 | #define WM831X_TCHPD_INT_SHIFT 9 /* TCHPD_INT */ | ||
| 109 | #define WM831X_TCHPD_INT_WIDTH 1 /* TCHPD_INT */ | ||
| 110 | #define WM831X_AUXADC_INT 0x0100 /* AUXADC_INT */ | ||
| 111 | #define WM831X_AUXADC_INT_MASK 0x0100 /* AUXADC_INT */ | ||
| 112 | #define WM831X_AUXADC_INT_SHIFT 8 /* AUXADC_INT */ | ||
| 113 | #define WM831X_AUXADC_INT_WIDTH 1 /* AUXADC_INT */ | ||
| 114 | #define WM831X_PPM_INT 0x0080 /* PPM_INT */ | ||
| 115 | #define WM831X_PPM_INT_MASK 0x0080 /* PPM_INT */ | ||
| 116 | #define WM831X_PPM_INT_SHIFT 7 /* PPM_INT */ | ||
| 117 | #define WM831X_PPM_INT_WIDTH 1 /* PPM_INT */ | ||
| 118 | #define WM831X_CS_INT 0x0040 /* CS_INT */ | ||
| 119 | #define WM831X_CS_INT_MASK 0x0040 /* CS_INT */ | ||
| 120 | #define WM831X_CS_INT_SHIFT 6 /* CS_INT */ | ||
| 121 | #define WM831X_CS_INT_WIDTH 1 /* CS_INT */ | ||
| 122 | #define WM831X_RTC_INT 0x0020 /* RTC_INT */ | ||
| 123 | #define WM831X_RTC_INT_MASK 0x0020 /* RTC_INT */ | ||
| 124 | #define WM831X_RTC_INT_SHIFT 5 /* RTC_INT */ | ||
| 125 | #define WM831X_RTC_INT_WIDTH 1 /* RTC_INT */ | ||
| 126 | #define WM831X_OTP_INT 0x0010 /* OTP_INT */ | ||
| 127 | #define WM831X_OTP_INT_MASK 0x0010 /* OTP_INT */ | ||
| 128 | #define WM831X_OTP_INT_SHIFT 4 /* OTP_INT */ | ||
| 129 | #define WM831X_OTP_INT_WIDTH 1 /* OTP_INT */ | ||
| 130 | #define WM831X_CHILD_INT 0x0008 /* CHILD_INT */ | ||
| 131 | #define WM831X_CHILD_INT_MASK 0x0008 /* CHILD_INT */ | ||
| 132 | #define WM831X_CHILD_INT_SHIFT 3 /* CHILD_INT */ | ||
| 133 | #define WM831X_CHILD_INT_WIDTH 1 /* CHILD_INT */ | ||
| 134 | #define WM831X_CHG_INT 0x0004 /* CHG_INT */ | ||
| 135 | #define WM831X_CHG_INT_MASK 0x0004 /* CHG_INT */ | ||
| 136 | #define WM831X_CHG_INT_SHIFT 2 /* CHG_INT */ | ||
| 137 | #define WM831X_CHG_INT_WIDTH 1 /* CHG_INT */ | ||
| 138 | #define WM831X_HC_INT 0x0002 /* HC_INT */ | ||
| 139 | #define WM831X_HC_INT_MASK 0x0002 /* HC_INT */ | ||
| 140 | #define WM831X_HC_INT_SHIFT 1 /* HC_INT */ | ||
| 141 | #define WM831X_HC_INT_WIDTH 1 /* HC_INT */ | ||
| 142 | #define WM831X_UV_INT 0x0001 /* UV_INT */ | ||
| 143 | #define WM831X_UV_INT_MASK 0x0001 /* UV_INT */ | ||
| 144 | #define WM831X_UV_INT_SHIFT 0 /* UV_INT */ | ||
| 145 | #define WM831X_UV_INT_WIDTH 1 /* UV_INT */ | ||
| 146 | |||
| 147 | /* | ||
| 148 | * R16401 (0x4011) - Interrupt Status 1 | ||
| 149 | */ | ||
| 150 | #define WM831X_PPM_SYSLO_EINT 0x8000 /* PPM_SYSLO_EINT */ | ||
| 151 | #define WM831X_PPM_SYSLO_EINT_MASK 0x8000 /* PPM_SYSLO_EINT */ | ||
| 152 | #define WM831X_PPM_SYSLO_EINT_SHIFT 15 /* PPM_SYSLO_EINT */ | ||
| 153 | #define WM831X_PPM_SYSLO_EINT_WIDTH 1 /* PPM_SYSLO_EINT */ | ||
| 154 | #define WM831X_PPM_PWR_SRC_EINT 0x4000 /* PPM_PWR_SRC_EINT */ | ||
| 155 | #define WM831X_PPM_PWR_SRC_EINT_MASK 0x4000 /* PPM_PWR_SRC_EINT */ | ||
| 156 | #define WM831X_PPM_PWR_SRC_EINT_SHIFT 14 /* PPM_PWR_SRC_EINT */ | ||
| 157 | #define WM831X_PPM_PWR_SRC_EINT_WIDTH 1 /* PPM_PWR_SRC_EINT */ | ||
| 158 | #define WM831X_PPM_USB_CURR_EINT 0x2000 /* PPM_USB_CURR_EINT */ | ||
| 159 | #define WM831X_PPM_USB_CURR_EINT_MASK 0x2000 /* PPM_USB_CURR_EINT */ | ||
| 160 | #define WM831X_PPM_USB_CURR_EINT_SHIFT 13 /* PPM_USB_CURR_EINT */ | ||
| 161 | #define WM831X_PPM_USB_CURR_EINT_WIDTH 1 /* PPM_USB_CURR_EINT */ | ||
| 162 | #define WM831X_ON_PIN_EINT 0x1000 /* ON_PIN_EINT */ | ||
| 163 | #define WM831X_ON_PIN_EINT_MASK 0x1000 /* ON_PIN_EINT */ | ||
| 164 | #define WM831X_ON_PIN_EINT_SHIFT 12 /* ON_PIN_EINT */ | ||
| 165 | #define WM831X_ON_PIN_EINT_WIDTH 1 /* ON_PIN_EINT */ | ||
| 166 | #define WM831X_WDOG_TO_EINT 0x0800 /* WDOG_TO_EINT */ | ||
| 167 | #define WM831X_WDOG_TO_EINT_MASK 0x0800 /* WDOG_TO_EINT */ | ||
| 168 | #define WM831X_WDOG_TO_EINT_SHIFT 11 /* WDOG_TO_EINT */ | ||
| 169 | #define WM831X_WDOG_TO_EINT_WIDTH 1 /* WDOG_TO_EINT */ | ||
| 170 | #define WM831X_TCHDATA_EINT 0x0400 /* TCHDATA_EINT */ | ||
| 171 | #define WM831X_TCHDATA_EINT_MASK 0x0400 /* TCHDATA_EINT */ | ||
| 172 | #define WM831X_TCHDATA_EINT_SHIFT 10 /* TCHDATA_EINT */ | ||
| 173 | #define WM831X_TCHDATA_EINT_WIDTH 1 /* TCHDATA_EINT */ | ||
| 174 | #define WM831X_TCHPD_EINT 0x0200 /* TCHPD_EINT */ | ||
| 175 | #define WM831X_TCHPD_EINT_MASK 0x0200 /* TCHPD_EINT */ | ||
| 176 | #define WM831X_TCHPD_EINT_SHIFT 9 /* TCHPD_EINT */ | ||
| 177 | #define WM831X_TCHPD_EINT_WIDTH 1 /* TCHPD_EINT */ | ||
| 178 | #define WM831X_AUXADC_DATA_EINT 0x0100 /* AUXADC_DATA_EINT */ | ||
| 179 | #define WM831X_AUXADC_DATA_EINT_MASK 0x0100 /* AUXADC_DATA_EINT */ | ||
| 180 | #define WM831X_AUXADC_DATA_EINT_SHIFT 8 /* AUXADC_DATA_EINT */ | ||
| 181 | #define WM831X_AUXADC_DATA_EINT_WIDTH 1 /* AUXADC_DATA_EINT */ | ||
| 182 | #define WM831X_AUXADC_DCOMP4_EINT 0x0080 /* AUXADC_DCOMP4_EINT */ | ||
| 183 | #define WM831X_AUXADC_DCOMP4_EINT_MASK 0x0080 /* AUXADC_DCOMP4_EINT */ | ||
| 184 | #define WM831X_AUXADC_DCOMP4_EINT_SHIFT 7 /* AUXADC_DCOMP4_EINT */ | ||
| 185 | #define WM831X_AUXADC_DCOMP4_EINT_WIDTH 1 /* AUXADC_DCOMP4_EINT */ | ||
| 186 | #define WM831X_AUXADC_DCOMP3_EINT 0x0040 /* AUXADC_DCOMP3_EINT */ | ||
| 187 | #define WM831X_AUXADC_DCOMP3_EINT_MASK 0x0040 /* AUXADC_DCOMP3_EINT */ | ||
| 188 | #define WM831X_AUXADC_DCOMP3_EINT_SHIFT 6 /* AUXADC_DCOMP3_EINT */ | ||
| 189 | #define WM831X_AUXADC_DCOMP3_EINT_WIDTH 1 /* AUXADC_DCOMP3_EINT */ | ||
| 190 | #define WM831X_AUXADC_DCOMP2_EINT 0x0020 /* AUXADC_DCOMP2_EINT */ | ||
| 191 | #define WM831X_AUXADC_DCOMP2_EINT_MASK 0x0020 /* AUXADC_DCOMP2_EINT */ | ||
| 192 | #define WM831X_AUXADC_DCOMP2_EINT_SHIFT 5 /* AUXADC_DCOMP2_EINT */ | ||
| 193 | #define WM831X_AUXADC_DCOMP2_EINT_WIDTH 1 /* AUXADC_DCOMP2_EINT */ | ||
| 194 | #define WM831X_AUXADC_DCOMP1_EINT 0x0010 /* AUXADC_DCOMP1_EINT */ | ||
| 195 | #define WM831X_AUXADC_DCOMP1_EINT_MASK 0x0010 /* AUXADC_DCOMP1_EINT */ | ||
| 196 | #define WM831X_AUXADC_DCOMP1_EINT_SHIFT 4 /* AUXADC_DCOMP1_EINT */ | ||
| 197 | #define WM831X_AUXADC_DCOMP1_EINT_WIDTH 1 /* AUXADC_DCOMP1_EINT */ | ||
| 198 | #define WM831X_RTC_PER_EINT 0x0008 /* RTC_PER_EINT */ | ||
| 199 | #define WM831X_RTC_PER_EINT_MASK 0x0008 /* RTC_PER_EINT */ | ||
| 200 | #define WM831X_RTC_PER_EINT_SHIFT 3 /* RTC_PER_EINT */ | ||
| 201 | #define WM831X_RTC_PER_EINT_WIDTH 1 /* RTC_PER_EINT */ | ||
| 202 | #define WM831X_RTC_ALM_EINT 0x0004 /* RTC_ALM_EINT */ | ||
| 203 | #define WM831X_RTC_ALM_EINT_MASK 0x0004 /* RTC_ALM_EINT */ | ||
| 204 | #define WM831X_RTC_ALM_EINT_SHIFT 2 /* RTC_ALM_EINT */ | ||
| 205 | #define WM831X_RTC_ALM_EINT_WIDTH 1 /* RTC_ALM_EINT */ | ||
| 206 | #define WM831X_TEMP_THW_EINT 0x0002 /* TEMP_THW_EINT */ | ||
| 207 | #define WM831X_TEMP_THW_EINT_MASK 0x0002 /* TEMP_THW_EINT */ | ||
| 208 | #define WM831X_TEMP_THW_EINT_SHIFT 1 /* TEMP_THW_EINT */ | ||
| 209 | #define WM831X_TEMP_THW_EINT_WIDTH 1 /* TEMP_THW_EINT */ | ||
| 210 | |||
| 211 | /* | ||
| 212 | * R16402 (0x4012) - Interrupt Status 2 | ||
| 213 | */ | ||
| 214 | #define WM831X_CHG_BATT_HOT_EINT 0x8000 /* CHG_BATT_HOT_EINT */ | ||
| 215 | #define WM831X_CHG_BATT_HOT_EINT_MASK 0x8000 /* CHG_BATT_HOT_EINT */ | ||
| 216 | #define WM831X_CHG_BATT_HOT_EINT_SHIFT 15 /* CHG_BATT_HOT_EINT */ | ||
| 217 | #define WM831X_CHG_BATT_HOT_EINT_WIDTH 1 /* CHG_BATT_HOT_EINT */ | ||
| 218 | #define WM831X_CHG_BATT_COLD_EINT 0x4000 /* CHG_BATT_COLD_EINT */ | ||
| 219 | #define WM831X_CHG_BATT_COLD_EINT_MASK 0x4000 /* CHG_BATT_COLD_EINT */ | ||
| 220 | #define WM831X_CHG_BATT_COLD_EINT_SHIFT 14 /* CHG_BATT_COLD_EINT */ | ||
| 221 | #define WM831X_CHG_BATT_COLD_EINT_WIDTH 1 /* CHG_BATT_COLD_EINT */ | ||
| 222 | #define WM831X_CHG_BATT_FAIL_EINT 0x2000 /* CHG_BATT_FAIL_EINT */ | ||
| 223 | #define WM831X_CHG_BATT_FAIL_EINT_MASK 0x2000 /* CHG_BATT_FAIL_EINT */ | ||
| 224 | #define WM831X_CHG_BATT_FAIL_EINT_SHIFT 13 /* CHG_BATT_FAIL_EINT */ | ||
| 225 | #define WM831X_CHG_BATT_FAIL_EINT_WIDTH 1 /* CHG_BATT_FAIL_EINT */ | ||
| 226 | #define WM831X_CHG_OV_EINT 0x1000 /* CHG_OV_EINT */ | ||
| 227 | #define WM831X_CHG_OV_EINT_MASK 0x1000 /* CHG_OV_EINT */ | ||
| 228 | #define WM831X_CHG_OV_EINT_SHIFT 12 /* CHG_OV_EINT */ | ||
| 229 | #define WM831X_CHG_OV_EINT_WIDTH 1 /* CHG_OV_EINT */ | ||
| 230 | #define WM831X_CHG_END_EINT 0x0800 /* CHG_END_EINT */ | ||
| 231 | #define WM831X_CHG_END_EINT_MASK 0x0800 /* CHG_END_EINT */ | ||
| 232 | #define WM831X_CHG_END_EINT_SHIFT 11 /* CHG_END_EINT */ | ||
| 233 | #define WM831X_CHG_END_EINT_WIDTH 1 /* CHG_END_EINT */ | ||
| 234 | #define WM831X_CHG_TO_EINT 0x0400 /* CHG_TO_EINT */ | ||
| 235 | #define WM831X_CHG_TO_EINT_MASK 0x0400 /* CHG_TO_EINT */ | ||
| 236 | #define WM831X_CHG_TO_EINT_SHIFT 10 /* CHG_TO_EINT */ | ||
| 237 | #define WM831X_CHG_TO_EINT_WIDTH 1 /* CHG_TO_EINT */ | ||
| 238 | #define WM831X_CHG_MODE_EINT 0x0200 /* CHG_MODE_EINT */ | ||
| 239 | #define WM831X_CHG_MODE_EINT_MASK 0x0200 /* CHG_MODE_EINT */ | ||
| 240 | #define WM831X_CHG_MODE_EINT_SHIFT 9 /* CHG_MODE_EINT */ | ||
| 241 | #define WM831X_CHG_MODE_EINT_WIDTH 1 /* CHG_MODE_EINT */ | ||
| 242 | #define WM831X_CHG_START_EINT 0x0100 /* CHG_START_EINT */ | ||
| 243 | #define WM831X_CHG_START_EINT_MASK 0x0100 /* CHG_START_EINT */ | ||
| 244 | #define WM831X_CHG_START_EINT_SHIFT 8 /* CHG_START_EINT */ | ||
| 245 | #define WM831X_CHG_START_EINT_WIDTH 1 /* CHG_START_EINT */ | ||
| 246 | #define WM831X_CS2_EINT 0x0080 /* CS2_EINT */ | ||
| 247 | #define WM831X_CS2_EINT_MASK 0x0080 /* CS2_EINT */ | ||
| 248 | #define WM831X_CS2_EINT_SHIFT 7 /* CS2_EINT */ | ||
| 249 | #define WM831X_CS2_EINT_WIDTH 1 /* CS2_EINT */ | ||
| 250 | #define WM831X_CS1_EINT 0x0040 /* CS1_EINT */ | ||
| 251 | #define WM831X_CS1_EINT_MASK 0x0040 /* CS1_EINT */ | ||
| 252 | #define WM831X_CS1_EINT_SHIFT 6 /* CS1_EINT */ | ||
| 253 | #define WM831X_CS1_EINT_WIDTH 1 /* CS1_EINT */ | ||
| 254 | #define WM831X_OTP_CMD_END_EINT 0x0020 /* OTP_CMD_END_EINT */ | ||
| 255 | #define WM831X_OTP_CMD_END_EINT_MASK 0x0020 /* OTP_CMD_END_EINT */ | ||
| 256 | #define WM831X_OTP_CMD_END_EINT_SHIFT 5 /* OTP_CMD_END_EINT */ | ||
| 257 | #define WM831X_OTP_CMD_END_EINT_WIDTH 1 /* OTP_CMD_END_EINT */ | ||
| 258 | #define WM831X_OTP_ERR_EINT 0x0010 /* OTP_ERR_EINT */ | ||
| 259 | #define WM831X_OTP_ERR_EINT_MASK 0x0010 /* OTP_ERR_EINT */ | ||
| 260 | #define WM831X_OTP_ERR_EINT_SHIFT 4 /* OTP_ERR_EINT */ | ||
| 261 | #define WM831X_OTP_ERR_EINT_WIDTH 1 /* OTP_ERR_EINT */ | ||
| 262 | #define WM831X_PS_POR_EINT 0x0004 /* PS_POR_EINT */ | ||
| 263 | #define WM831X_PS_POR_EINT_MASK 0x0004 /* PS_POR_EINT */ | ||
| 264 | #define WM831X_PS_POR_EINT_SHIFT 2 /* PS_POR_EINT */ | ||
| 265 | #define WM831X_PS_POR_EINT_WIDTH 1 /* PS_POR_EINT */ | ||
| 266 | #define WM831X_PS_SLEEP_OFF_EINT 0x0002 /* PS_SLEEP_OFF_EINT */ | ||
| 267 | #define WM831X_PS_SLEEP_OFF_EINT_MASK 0x0002 /* PS_SLEEP_OFF_EINT */ | ||
| 268 | #define WM831X_PS_SLEEP_OFF_EINT_SHIFT 1 /* PS_SLEEP_OFF_EINT */ | ||
| 269 | #define WM831X_PS_SLEEP_OFF_EINT_WIDTH 1 /* PS_SLEEP_OFF_EINT */ | ||
| 270 | #define WM831X_PS_ON_WAKE_EINT 0x0001 /* PS_ON_WAKE_EINT */ | ||
| 271 | #define WM831X_PS_ON_WAKE_EINT_MASK 0x0001 /* PS_ON_WAKE_EINT */ | ||
| 272 | #define WM831X_PS_ON_WAKE_EINT_SHIFT 0 /* PS_ON_WAKE_EINT */ | ||
| 273 | #define WM831X_PS_ON_WAKE_EINT_WIDTH 1 /* PS_ON_WAKE_EINT */ | ||
| 274 | |||
| 275 | /* | ||
| 276 | * R16403 (0x4013) - Interrupt Status 3 | ||
| 277 | */ | ||
| 278 | #define WM831X_UV_LDO10_EINT 0x0200 /* UV_LDO10_EINT */ | ||
| 279 | #define WM831X_UV_LDO10_EINT_MASK 0x0200 /* UV_LDO10_EINT */ | ||
| 280 | #define WM831X_UV_LDO10_EINT_SHIFT 9 /* UV_LDO10_EINT */ | ||
| 281 | #define WM831X_UV_LDO10_EINT_WIDTH 1 /* UV_LDO10_EINT */ | ||
| 282 | #define WM831X_UV_LDO9_EINT 0x0100 /* UV_LDO9_EINT */ | ||
| 283 | #define WM831X_UV_LDO9_EINT_MASK 0x0100 /* UV_LDO9_EINT */ | ||
| 284 | #define WM831X_UV_LDO9_EINT_SHIFT 8 /* UV_LDO9_EINT */ | ||
| 285 | #define WM831X_UV_LDO9_EINT_WIDTH 1 /* UV_LDO9_EINT */ | ||
| 286 | #define WM831X_UV_LDO8_EINT 0x0080 /* UV_LDO8_EINT */ | ||
| 287 | #define WM831X_UV_LDO8_EINT_MASK 0x0080 /* UV_LDO8_EINT */ | ||
| 288 | #define WM831X_UV_LDO8_EINT_SHIFT 7 /* UV_LDO8_EINT */ | ||
| 289 | #define WM831X_UV_LDO8_EINT_WIDTH 1 /* UV_LDO8_EINT */ | ||
| 290 | #define WM831X_UV_LDO7_EINT 0x0040 /* UV_LDO7_EINT */ | ||
| 291 | #define WM831X_UV_LDO7_EINT_MASK 0x0040 /* UV_LDO7_EINT */ | ||
| 292 | #define WM831X_UV_LDO7_EINT_SHIFT 6 /* UV_LDO7_EINT */ | ||
| 293 | #define WM831X_UV_LDO7_EINT_WIDTH 1 /* UV_LDO7_EINT */ | ||
| 294 | #define WM831X_UV_LDO6_EINT 0x0020 /* UV_LDO6_EINT */ | ||
| 295 | #define WM831X_UV_LDO6_EINT_MASK 0x0020 /* UV_LDO6_EINT */ | ||
| 296 | #define WM831X_UV_LDO6_EINT_SHIFT 5 /* UV_LDO6_EINT */ | ||
| 297 | #define WM831X_UV_LDO6_EINT_WIDTH 1 /* UV_LDO6_EINT */ | ||
| 298 | #define WM831X_UV_LDO5_EINT 0x0010 /* UV_LDO5_EINT */ | ||
| 299 | #define WM831X_UV_LDO5_EINT_MASK 0x0010 /* UV_LDO5_EINT */ | ||
| 300 | #define WM831X_UV_LDO5_EINT_SHIFT 4 /* UV_LDO5_EINT */ | ||
| 301 | #define WM831X_UV_LDO5_EINT_WIDTH 1 /* UV_LDO5_EINT */ | ||
| 302 | #define WM831X_UV_LDO4_EINT 0x0008 /* UV_LDO4_EINT */ | ||
| 303 | #define WM831X_UV_LDO4_EINT_MASK 0x0008 /* UV_LDO4_EINT */ | ||
| 304 | #define WM831X_UV_LDO4_EINT_SHIFT 3 /* UV_LDO4_EINT */ | ||
| 305 | #define WM831X_UV_LDO4_EINT_WIDTH 1 /* UV_LDO4_EINT */ | ||
| 306 | #define WM831X_UV_LDO3_EINT 0x0004 /* UV_LDO3_EINT */ | ||
| 307 | #define WM831X_UV_LDO3_EINT_MASK 0x0004 /* UV_LDO3_EINT */ | ||
| 308 | #define WM831X_UV_LDO3_EINT_SHIFT 2 /* UV_LDO3_EINT */ | ||
| 309 | #define WM831X_UV_LDO3_EINT_WIDTH 1 /* UV_LDO3_EINT */ | ||
| 310 | #define WM831X_UV_LDO2_EINT 0x0002 /* UV_LDO2_EINT */ | ||
| 311 | #define WM831X_UV_LDO2_EINT_MASK 0x0002 /* UV_LDO2_EINT */ | ||
| 312 | #define WM831X_UV_LDO2_EINT_SHIFT 1 /* UV_LDO2_EINT */ | ||
| 313 | #define WM831X_UV_LDO2_EINT_WIDTH 1 /* UV_LDO2_EINT */ | ||
| 314 | #define WM831X_UV_LDO1_EINT 0x0001 /* UV_LDO1_EINT */ | ||
| 315 | #define WM831X_UV_LDO1_EINT_MASK 0x0001 /* UV_LDO1_EINT */ | ||
| 316 | #define WM831X_UV_LDO1_EINT_SHIFT 0 /* UV_LDO1_EINT */ | ||
| 317 | #define WM831X_UV_LDO1_EINT_WIDTH 1 /* UV_LDO1_EINT */ | ||
| 318 | |||
| 319 | /* | ||
| 320 | * R16404 (0x4014) - Interrupt Status 4 | ||
| 321 | */ | ||
| 322 | #define WM831X_HC_DC2_EINT 0x0200 /* HC_DC2_EINT */ | ||
| 323 | #define WM831X_HC_DC2_EINT_MASK 0x0200 /* HC_DC2_EINT */ | ||
| 324 | #define WM831X_HC_DC2_EINT_SHIFT 9 /* HC_DC2_EINT */ | ||
| 325 | #define WM831X_HC_DC2_EINT_WIDTH 1 /* HC_DC2_EINT */ | ||
| 326 | #define WM831X_HC_DC1_EINT 0x0100 /* HC_DC1_EINT */ | ||
| 327 | #define WM831X_HC_DC1_EINT_MASK 0x0100 /* HC_DC1_EINT */ | ||
| 328 | #define WM831X_HC_DC1_EINT_SHIFT 8 /* HC_DC1_EINT */ | ||
| 329 | #define WM831X_HC_DC1_EINT_WIDTH 1 /* HC_DC1_EINT */ | ||
| 330 | #define WM831X_UV_DC4_EINT 0x0008 /* UV_DC4_EINT */ | ||
| 331 | #define WM831X_UV_DC4_EINT_MASK 0x0008 /* UV_DC4_EINT */ | ||
| 332 | #define WM831X_UV_DC4_EINT_SHIFT 3 /* UV_DC4_EINT */ | ||
| 333 | #define WM831X_UV_DC4_EINT_WIDTH 1 /* UV_DC4_EINT */ | ||
| 334 | #define WM831X_UV_DC3_EINT 0x0004 /* UV_DC3_EINT */ | ||
| 335 | #define WM831X_UV_DC3_EINT_MASK 0x0004 /* UV_DC3_EINT */ | ||
| 336 | #define WM831X_UV_DC3_EINT_SHIFT 2 /* UV_DC3_EINT */ | ||
| 337 | #define WM831X_UV_DC3_EINT_WIDTH 1 /* UV_DC3_EINT */ | ||
| 338 | #define WM831X_UV_DC2_EINT 0x0002 /* UV_DC2_EINT */ | ||
| 339 | #define WM831X_UV_DC2_EINT_MASK 0x0002 /* UV_DC2_EINT */ | ||
| 340 | #define WM831X_UV_DC2_EINT_SHIFT 1 /* UV_DC2_EINT */ | ||
| 341 | #define WM831X_UV_DC2_EINT_WIDTH 1 /* UV_DC2_EINT */ | ||
| 342 | #define WM831X_UV_DC1_EINT 0x0001 /* UV_DC1_EINT */ | ||
| 343 | #define WM831X_UV_DC1_EINT_MASK 0x0001 /* UV_DC1_EINT */ | ||
| 344 | #define WM831X_UV_DC1_EINT_SHIFT 0 /* UV_DC1_EINT */ | ||
| 345 | #define WM831X_UV_DC1_EINT_WIDTH 1 /* UV_DC1_EINT */ | ||
| 346 | |||
| 347 | /* | ||
| 348 | * R16405 (0x4015) - Interrupt Status 5 | ||
| 349 | */ | ||
| 350 | #define WM831X_GP16_EINT 0x8000 /* GP16_EINT */ | ||
| 351 | #define WM831X_GP16_EINT_MASK 0x8000 /* GP16_EINT */ | ||
| 352 | #define WM831X_GP16_EINT_SHIFT 15 /* GP16_EINT */ | ||
| 353 | #define WM831X_GP16_EINT_WIDTH 1 /* GP16_EINT */ | ||
| 354 | #define WM831X_GP15_EINT 0x4000 /* GP15_EINT */ | ||
| 355 | #define WM831X_GP15_EINT_MASK 0x4000 /* GP15_EINT */ | ||
| 356 | #define WM831X_GP15_EINT_SHIFT 14 /* GP15_EINT */ | ||
| 357 | #define WM831X_GP15_EINT_WIDTH 1 /* GP15_EINT */ | ||
| 358 | #define WM831X_GP14_EINT 0x2000 /* GP14_EINT */ | ||
| 359 | #define WM831X_GP14_EINT_MASK 0x2000 /* GP14_EINT */ | ||
| 360 | #define WM831X_GP14_EINT_SHIFT 13 /* GP14_EINT */ | ||
| 361 | #define WM831X_GP14_EINT_WIDTH 1 /* GP14_EINT */ | ||
| 362 | #define WM831X_GP13_EINT 0x1000 /* GP13_EINT */ | ||
| 363 | #define WM831X_GP13_EINT_MASK 0x1000 /* GP13_EINT */ | ||
| 364 | #define WM831X_GP13_EINT_SHIFT 12 /* GP13_EINT */ | ||
| 365 | #define WM831X_GP13_EINT_WIDTH 1 /* GP13_EINT */ | ||
| 366 | #define WM831X_GP12_EINT 0x0800 /* GP12_EINT */ | ||
| 367 | #define WM831X_GP12_EINT_MASK 0x0800 /* GP12_EINT */ | ||
| 368 | #define WM831X_GP12_EINT_SHIFT 11 /* GP12_EINT */ | ||
| 369 | #define WM831X_GP12_EINT_WIDTH 1 /* GP12_EINT */ | ||
| 370 | #define WM831X_GP11_EINT 0x0400 /* GP11_EINT */ | ||
| 371 | #define WM831X_GP11_EINT_MASK 0x0400 /* GP11_EINT */ | ||
| 372 | #define WM831X_GP11_EINT_SHIFT 10 /* GP11_EINT */ | ||
| 373 | #define WM831X_GP11_EINT_WIDTH 1 /* GP11_EINT */ | ||
| 374 | #define WM831X_GP10_EINT 0x0200 /* GP10_EINT */ | ||
| 375 | #define WM831X_GP10_EINT_MASK 0x0200 /* GP10_EINT */ | ||
| 376 | #define WM831X_GP10_EINT_SHIFT 9 /* GP10_EINT */ | ||
| 377 | #define WM831X_GP10_EINT_WIDTH 1 /* GP10_EINT */ | ||
| 378 | #define WM831X_GP9_EINT 0x0100 /* GP9_EINT */ | ||
| 379 | #define WM831X_GP9_EINT_MASK 0x0100 /* GP9_EINT */ | ||
| 380 | #define WM831X_GP9_EINT_SHIFT 8 /* GP9_EINT */ | ||
| 381 | #define WM831X_GP9_EINT_WIDTH 1 /* GP9_EINT */ | ||
| 382 | #define WM831X_GP8_EINT 0x0080 /* GP8_EINT */ | ||
| 383 | #define WM831X_GP8_EINT_MASK 0x0080 /* GP8_EINT */ | ||
| 384 | #define WM831X_GP8_EINT_SHIFT 7 /* GP8_EINT */ | ||
| 385 | #define WM831X_GP8_EINT_WIDTH 1 /* GP8_EINT */ | ||
| 386 | #define WM831X_GP7_EINT 0x0040 /* GP7_EINT */ | ||
| 387 | #define WM831X_GP7_EINT_MASK 0x0040 /* GP7_EINT */ | ||
| 388 | #define WM831X_GP7_EINT_SHIFT 6 /* GP7_EINT */ | ||
| 389 | #define WM831X_GP7_EINT_WIDTH 1 /* GP7_EINT */ | ||
| 390 | #define WM831X_GP6_EINT 0x0020 /* GP6_EINT */ | ||
| 391 | #define WM831X_GP6_EINT_MASK 0x0020 /* GP6_EINT */ | ||
| 392 | #define WM831X_GP6_EINT_SHIFT 5 /* GP6_EINT */ | ||
| 393 | #define WM831X_GP6_EINT_WIDTH 1 /* GP6_EINT */ | ||
| 394 | #define WM831X_GP5_EINT 0x0010 /* GP5_EINT */ | ||
| 395 | #define WM831X_GP5_EINT_MASK 0x0010 /* GP5_EINT */ | ||
| 396 | #define WM831X_GP5_EINT_SHIFT 4 /* GP5_EINT */ | ||
| 397 | #define WM831X_GP5_EINT_WIDTH 1 /* GP5_EINT */ | ||
| 398 | #define WM831X_GP4_EINT 0x0008 /* GP4_EINT */ | ||
| 399 | #define WM831X_GP4_EINT_MASK 0x0008 /* GP4_EINT */ | ||
| 400 | #define WM831X_GP4_EINT_SHIFT 3 /* GP4_EINT */ | ||
| 401 | #define WM831X_GP4_EINT_WIDTH 1 /* GP4_EINT */ | ||
| 402 | #define WM831X_GP3_EINT 0x0004 /* GP3_EINT */ | ||
| 403 | #define WM831X_GP3_EINT_MASK 0x0004 /* GP3_EINT */ | ||
| 404 | #define WM831X_GP3_EINT_SHIFT 2 /* GP3_EINT */ | ||
| 405 | #define WM831X_GP3_EINT_WIDTH 1 /* GP3_EINT */ | ||
| 406 | #define WM831X_GP2_EINT 0x0002 /* GP2_EINT */ | ||
| 407 | #define WM831X_GP2_EINT_MASK 0x0002 /* GP2_EINT */ | ||
| 408 | #define WM831X_GP2_EINT_SHIFT 1 /* GP2_EINT */ | ||
| 409 | #define WM831X_GP2_EINT_WIDTH 1 /* GP2_EINT */ | ||
| 410 | #define WM831X_GP1_EINT 0x0001 /* GP1_EINT */ | ||
| 411 | #define WM831X_GP1_EINT_MASK 0x0001 /* GP1_EINT */ | ||
| 412 | #define WM831X_GP1_EINT_SHIFT 0 /* GP1_EINT */ | ||
| 413 | #define WM831X_GP1_EINT_WIDTH 1 /* GP1_EINT */ | ||
| 414 | |||
| 415 | /* | ||
| 416 | * R16407 (0x4017) - IRQ Config | ||
| 417 | */ | ||
| 418 | #define WM831X_IRQ_OD 0x0002 /* IRQ_OD */ | ||
| 419 | #define WM831X_IRQ_OD_MASK 0x0002 /* IRQ_OD */ | ||
| 420 | #define WM831X_IRQ_OD_SHIFT 1 /* IRQ_OD */ | ||
| 421 | #define WM831X_IRQ_OD_WIDTH 1 /* IRQ_OD */ | ||
| 422 | #define WM831X_IM_IRQ 0x0001 /* IM_IRQ */ | ||
| 423 | #define WM831X_IM_IRQ_MASK 0x0001 /* IM_IRQ */ | ||
| 424 | #define WM831X_IM_IRQ_SHIFT 0 /* IM_IRQ */ | ||
| 425 | #define WM831X_IM_IRQ_WIDTH 1 /* IM_IRQ */ | ||
| 426 | |||
| 427 | /* | ||
| 428 | * R16408 (0x4018) - System Interrupts Mask | ||
| 429 | */ | ||
| 430 | #define WM831X_IM_PS_INT 0x8000 /* IM_PS_INT */ | ||
| 431 | #define WM831X_IM_PS_INT_MASK 0x8000 /* IM_PS_INT */ | ||
| 432 | #define WM831X_IM_PS_INT_SHIFT 15 /* IM_PS_INT */ | ||
| 433 | #define WM831X_IM_PS_INT_WIDTH 1 /* IM_PS_INT */ | ||
| 434 | #define WM831X_IM_TEMP_INT 0x4000 /* IM_TEMP_INT */ | ||
| 435 | #define WM831X_IM_TEMP_INT_MASK 0x4000 /* IM_TEMP_INT */ | ||
| 436 | #define WM831X_IM_TEMP_INT_SHIFT 14 /* IM_TEMP_INT */ | ||
| 437 | #define WM831X_IM_TEMP_INT_WIDTH 1 /* IM_TEMP_INT */ | ||
| 438 | #define WM831X_IM_GP_INT 0x2000 /* IM_GP_INT */ | ||
| 439 | #define WM831X_IM_GP_INT_MASK 0x2000 /* IM_GP_INT */ | ||
| 440 | #define WM831X_IM_GP_INT_SHIFT 13 /* IM_GP_INT */ | ||
| 441 | #define WM831X_IM_GP_INT_WIDTH 1 /* IM_GP_INT */ | ||
| 442 | #define WM831X_IM_ON_PIN_INT 0x1000 /* IM_ON_PIN_INT */ | ||
| 443 | #define WM831X_IM_ON_PIN_INT_MASK 0x1000 /* IM_ON_PIN_INT */ | ||
| 444 | #define WM831X_IM_ON_PIN_INT_SHIFT 12 /* IM_ON_PIN_INT */ | ||
| 445 | #define WM831X_IM_ON_PIN_INT_WIDTH 1 /* IM_ON_PIN_INT */ | ||
| 446 | #define WM831X_IM_WDOG_INT 0x0800 /* IM_WDOG_INT */ | ||
| 447 | #define WM831X_IM_WDOG_INT_MASK 0x0800 /* IM_WDOG_INT */ | ||
| 448 | #define WM831X_IM_WDOG_INT_SHIFT 11 /* IM_WDOG_INT */ | ||
| 449 | #define WM831X_IM_WDOG_INT_WIDTH 1 /* IM_WDOG_INT */ | ||
| 450 | #define WM831X_IM_TCHDATA_INT 0x0400 /* IM_TCHDATA_INT */ | ||
| 451 | #define WM831X_IM_TCHDATA_INT_MASK 0x0400 /* IM_TCHDATA_INT */ | ||
| 452 | #define WM831X_IM_TCHDATA_INT_SHIFT 10 /* IM_TCHDATA_INT */ | ||
| 453 | #define WM831X_IM_TCHDATA_INT_WIDTH 1 /* IM_TCHDATA_INT */ | ||
| 454 | #define WM831X_IM_TCHPD_INT 0x0200 /* IM_TCHPD_INT */ | ||
| 455 | #define WM831X_IM_TCHPD_INT_MASK 0x0200 /* IM_TCHPD_INT */ | ||
| 456 | #define WM831X_IM_TCHPD_INT_SHIFT 9 /* IM_TCHPD_INT */ | ||
| 457 | #define WM831X_IM_TCHPD_INT_WIDTH 1 /* IM_TCHPD_INT */ | ||
| 458 | #define WM831X_IM_AUXADC_INT 0x0100 /* IM_AUXADC_INT */ | ||
| 459 | #define WM831X_IM_AUXADC_INT_MASK 0x0100 /* IM_AUXADC_INT */ | ||
| 460 | #define WM831X_IM_AUXADC_INT_SHIFT 8 /* IM_AUXADC_INT */ | ||
| 461 | #define WM831X_IM_AUXADC_INT_WIDTH 1 /* IM_AUXADC_INT */ | ||
| 462 | #define WM831X_IM_PPM_INT 0x0080 /* IM_PPM_INT */ | ||
| 463 | #define WM831X_IM_PPM_INT_MASK 0x0080 /* IM_PPM_INT */ | ||
| 464 | #define WM831X_IM_PPM_INT_SHIFT 7 /* IM_PPM_INT */ | ||
| 465 | #define WM831X_IM_PPM_INT_WIDTH 1 /* IM_PPM_INT */ | ||
| 466 | #define WM831X_IM_CS_INT 0x0040 /* IM_CS_INT */ | ||
| 467 | #define WM831X_IM_CS_INT_MASK 0x0040 /* IM_CS_INT */ | ||
| 468 | #define WM831X_IM_CS_INT_SHIFT 6 /* IM_CS_INT */ | ||
| 469 | #define WM831X_IM_CS_INT_WIDTH 1 /* IM_CS_INT */ | ||
| 470 | #define WM831X_IM_RTC_INT 0x0020 /* IM_RTC_INT */ | ||
| 471 | #define WM831X_IM_RTC_INT_MASK 0x0020 /* IM_RTC_INT */ | ||
| 472 | #define WM831X_IM_RTC_INT_SHIFT 5 /* IM_RTC_INT */ | ||
| 473 | #define WM831X_IM_RTC_INT_WIDTH 1 /* IM_RTC_INT */ | ||
| 474 | #define WM831X_IM_OTP_INT 0x0010 /* IM_OTP_INT */ | ||
| 475 | #define WM831X_IM_OTP_INT_MASK 0x0010 /* IM_OTP_INT */ | ||
| 476 | #define WM831X_IM_OTP_INT_SHIFT 4 /* IM_OTP_INT */ | ||
| 477 | #define WM831X_IM_OTP_INT_WIDTH 1 /* IM_OTP_INT */ | ||
| 478 | #define WM831X_IM_CHILD_INT 0x0008 /* IM_CHILD_INT */ | ||
| 479 | #define WM831X_IM_CHILD_INT_MASK 0x0008 /* IM_CHILD_INT */ | ||
| 480 | #define WM831X_IM_CHILD_INT_SHIFT 3 /* IM_CHILD_INT */ | ||
| 481 | #define WM831X_IM_CHILD_INT_WIDTH 1 /* IM_CHILD_INT */ | ||
| 482 | #define WM831X_IM_CHG_INT 0x0004 /* IM_CHG_INT */ | ||
| 483 | #define WM831X_IM_CHG_INT_MASK 0x0004 /* IM_CHG_INT */ | ||
| 484 | #define WM831X_IM_CHG_INT_SHIFT 2 /* IM_CHG_INT */ | ||
| 485 | #define WM831X_IM_CHG_INT_WIDTH 1 /* IM_CHG_INT */ | ||
| 486 | #define WM831X_IM_HC_INT 0x0002 /* IM_HC_INT */ | ||
| 487 | #define WM831X_IM_HC_INT_MASK 0x0002 /* IM_HC_INT */ | ||
| 488 | #define WM831X_IM_HC_INT_SHIFT 1 /* IM_HC_INT */ | ||
| 489 | #define WM831X_IM_HC_INT_WIDTH 1 /* IM_HC_INT */ | ||
| 490 | #define WM831X_IM_UV_INT 0x0001 /* IM_UV_INT */ | ||
| 491 | #define WM831X_IM_UV_INT_MASK 0x0001 /* IM_UV_INT */ | ||
| 492 | #define WM831X_IM_UV_INT_SHIFT 0 /* IM_UV_INT */ | ||
| 493 | #define WM831X_IM_UV_INT_WIDTH 1 /* IM_UV_INT */ | ||
| 494 | |||
| 495 | /* | ||
| 496 | * R16409 (0x4019) - Interrupt Status 1 Mask | ||
| 497 | */ | ||
| 498 | #define WM831X_IM_PPM_SYSLO_EINT 0x8000 /* IM_PPM_SYSLO_EINT */ | ||
| 499 | #define WM831X_IM_PPM_SYSLO_EINT_MASK 0x8000 /* IM_PPM_SYSLO_EINT */ | ||
| 500 | #define WM831X_IM_PPM_SYSLO_EINT_SHIFT 15 /* IM_PPM_SYSLO_EINT */ | ||
| 501 | #define WM831X_IM_PPM_SYSLO_EINT_WIDTH 1 /* IM_PPM_SYSLO_EINT */ | ||
| 502 | #define WM831X_IM_PPM_PWR_SRC_EINT 0x4000 /* IM_PPM_PWR_SRC_EINT */ | ||
| 503 | #define WM831X_IM_PPM_PWR_SRC_EINT_MASK 0x4000 /* IM_PPM_PWR_SRC_EINT */ | ||
| 504 | #define WM831X_IM_PPM_PWR_SRC_EINT_SHIFT 14 /* IM_PPM_PWR_SRC_EINT */ | ||
| 505 | #define WM831X_IM_PPM_PWR_SRC_EINT_WIDTH 1 /* IM_PPM_PWR_SRC_EINT */ | ||
| 506 | #define WM831X_IM_PPM_USB_CURR_EINT 0x2000 /* IM_PPM_USB_CURR_EINT */ | ||
| 507 | #define WM831X_IM_PPM_USB_CURR_EINT_MASK 0x2000 /* IM_PPM_USB_CURR_EINT */ | ||
| 508 | #define WM831X_IM_PPM_USB_CURR_EINT_SHIFT 13 /* IM_PPM_USB_CURR_EINT */ | ||
| 509 | #define WM831X_IM_PPM_USB_CURR_EINT_WIDTH 1 /* IM_PPM_USB_CURR_EINT */ | ||
| 510 | #define WM831X_IM_ON_PIN_EINT 0x1000 /* IM_ON_PIN_EINT */ | ||
| 511 | #define WM831X_IM_ON_PIN_EINT_MASK 0x1000 /* IM_ON_PIN_EINT */ | ||
| 512 | #define WM831X_IM_ON_PIN_EINT_SHIFT 12 /* IM_ON_PIN_EINT */ | ||
| 513 | #define WM831X_IM_ON_PIN_EINT_WIDTH 1 /* IM_ON_PIN_EINT */ | ||
| 514 | #define WM831X_IM_WDOG_TO_EINT 0x0800 /* IM_WDOG_TO_EINT */ | ||
| 515 | #define WM831X_IM_WDOG_TO_EINT_MASK 0x0800 /* IM_WDOG_TO_EINT */ | ||
| 516 | #define WM831X_IM_WDOG_TO_EINT_SHIFT 11 /* IM_WDOG_TO_EINT */ | ||
| 517 | #define WM831X_IM_WDOG_TO_EINT_WIDTH 1 /* IM_WDOG_TO_EINT */ | ||
| 518 | #define WM831X_IM_TCHDATA_EINT 0x0400 /* IM_TCHDATA_EINT */ | ||
| 519 | #define WM831X_IM_TCHDATA_EINT_MASK 0x0400 /* IM_TCHDATA_EINT */ | ||
| 520 | #define WM831X_IM_TCHDATA_EINT_SHIFT 10 /* IM_TCHDATA_EINT */ | ||
| 521 | #define WM831X_IM_TCHDATA_EINT_WIDTH 1 /* IM_TCHDATA_EINT */ | ||
| 522 | #define WM831X_IM_TCHPD_EINT 0x0200 /* IM_TCHPD_EINT */ | ||
| 523 | #define WM831X_IM_TCHPD_EINT_MASK 0x0200 /* IM_TCHPD_EINT */ | ||
| 524 | #define WM831X_IM_TCHPD_EINT_SHIFT 9 /* IM_TCHPD_EINT */ | ||
| 525 | #define WM831X_IM_TCHPD_EINT_WIDTH 1 /* IM_TCHPD_EINT */ | ||
| 526 | #define WM831X_IM_AUXADC_DATA_EINT 0x0100 /* IM_AUXADC_DATA_EINT */ | ||
| 527 | #define WM831X_IM_AUXADC_DATA_EINT_MASK 0x0100 /* IM_AUXADC_DATA_EINT */ | ||
| 528 | #define WM831X_IM_AUXADC_DATA_EINT_SHIFT 8 /* IM_AUXADC_DATA_EINT */ | ||
| 529 | #define WM831X_IM_AUXADC_DATA_EINT_WIDTH 1 /* IM_AUXADC_DATA_EINT */ | ||
| 530 | #define WM831X_IM_AUXADC_DCOMP4_EINT 0x0080 /* IM_AUXADC_DCOMP4_EINT */ | ||
| 531 | #define WM831X_IM_AUXADC_DCOMP4_EINT_MASK 0x0080 /* IM_AUXADC_DCOMP4_EINT */ | ||
| 532 | #define WM831X_IM_AUXADC_DCOMP4_EINT_SHIFT 7 /* IM_AUXADC_DCOMP4_EINT */ | ||
| 533 | #define WM831X_IM_AUXADC_DCOMP4_EINT_WIDTH 1 /* IM_AUXADC_DCOMP4_EINT */ | ||
| 534 | #define WM831X_IM_AUXADC_DCOMP3_EINT 0x0040 /* IM_AUXADC_DCOMP3_EINT */ | ||
| 535 | #define WM831X_IM_AUXADC_DCOMP3_EINT_MASK 0x0040 /* IM_AUXADC_DCOMP3_EINT */ | ||
| 536 | #define WM831X_IM_AUXADC_DCOMP3_EINT_SHIFT 6 /* IM_AUXADC_DCOMP3_EINT */ | ||
| 537 | #define WM831X_IM_AUXADC_DCOMP3_EINT_WIDTH 1 /* IM_AUXADC_DCOMP3_EINT */ | ||
| 538 | #define WM831X_IM_AUXADC_DCOMP2_EINT 0x0020 /* IM_AUXADC_DCOMP2_EINT */ | ||
| 539 | #define WM831X_IM_AUXADC_DCOMP2_EINT_MASK 0x0020 /* IM_AUXADC_DCOMP2_EINT */ | ||
| 540 | #define WM831X_IM_AUXADC_DCOMP2_EINT_SHIFT 5 /* IM_AUXADC_DCOMP2_EINT */ | ||
| 541 | #define WM831X_IM_AUXADC_DCOMP2_EINT_WIDTH 1 /* IM_AUXADC_DCOMP2_EINT */ | ||
| 542 | #define WM831X_IM_AUXADC_DCOMP1_EINT 0x0010 /* IM_AUXADC_DCOMP1_EINT */ | ||
| 543 | #define WM831X_IM_AUXADC_DCOMP1_EINT_MASK 0x0010 /* IM_AUXADC_DCOMP1_EINT */ | ||
| 544 | #define WM831X_IM_AUXADC_DCOMP1_EINT_SHIFT 4 /* IM_AUXADC_DCOMP1_EINT */ | ||
| 545 | #define WM831X_IM_AUXADC_DCOMP1_EINT_WIDTH 1 /* IM_AUXADC_DCOMP1_EINT */ | ||
| 546 | #define WM831X_IM_RTC_PER_EINT 0x0008 /* IM_RTC_PER_EINT */ | ||
| 547 | #define WM831X_IM_RTC_PER_EINT_MASK 0x0008 /* IM_RTC_PER_EINT */ | ||
| 548 | #define WM831X_IM_RTC_PER_EINT_SHIFT 3 /* IM_RTC_PER_EINT */ | ||
| 549 | #define WM831X_IM_RTC_PER_EINT_WIDTH 1 /* IM_RTC_PER_EINT */ | ||
| 550 | #define WM831X_IM_RTC_ALM_EINT 0x0004 /* IM_RTC_ALM_EINT */ | ||
| 551 | #define WM831X_IM_RTC_ALM_EINT_MASK 0x0004 /* IM_RTC_ALM_EINT */ | ||
| 552 | #define WM831X_IM_RTC_ALM_EINT_SHIFT 2 /* IM_RTC_ALM_EINT */ | ||
| 553 | #define WM831X_IM_RTC_ALM_EINT_WIDTH 1 /* IM_RTC_ALM_EINT */ | ||
| 554 | #define WM831X_IM_TEMP_THW_EINT 0x0002 /* IM_TEMP_THW_EINT */ | ||
| 555 | #define WM831X_IM_TEMP_THW_EINT_MASK 0x0002 /* IM_TEMP_THW_EINT */ | ||
| 556 | #define WM831X_IM_TEMP_THW_EINT_SHIFT 1 /* IM_TEMP_THW_EINT */ | ||
| 557 | #define WM831X_IM_TEMP_THW_EINT_WIDTH 1 /* IM_TEMP_THW_EINT */ | ||
| 558 | |||
| 559 | /* | ||
| 560 | * R16410 (0x401A) - Interrupt Status 2 Mask | ||
| 561 | */ | ||
| 562 | #define WM831X_IM_CHG_BATT_HOT_EINT 0x8000 /* IM_CHG_BATT_HOT_EINT */ | ||
| 563 | #define WM831X_IM_CHG_BATT_HOT_EINT_MASK 0x8000 /* IM_CHG_BATT_HOT_EINT */ | ||
| 564 | #define WM831X_IM_CHG_BATT_HOT_EINT_SHIFT 15 /* IM_CHG_BATT_HOT_EINT */ | ||
| 565 | #define WM831X_IM_CHG_BATT_HOT_EINT_WIDTH 1 /* IM_CHG_BATT_HOT_EINT */ | ||
| 566 | #define WM831X_IM_CHG_BATT_COLD_EINT 0x4000 /* IM_CHG_BATT_COLD_EINT */ | ||
| 567 | #define WM831X_IM_CHG_BATT_COLD_EINT_MASK 0x4000 /* IM_CHG_BATT_COLD_EINT */ | ||
| 568 | #define WM831X_IM_CHG_BATT_COLD_EINT_SHIFT 14 /* IM_CHG_BATT_COLD_EINT */ | ||
| 569 | #define WM831X_IM_CHG_BATT_COLD_EINT_WIDTH 1 /* IM_CHG_BATT_COLD_EINT */ | ||
| 570 | #define WM831X_IM_CHG_BATT_FAIL_EINT 0x2000 /* IM_CHG_BATT_FAIL_EINT */ | ||
| 571 | #define WM831X_IM_CHG_BATT_FAIL_EINT_MASK 0x2000 /* IM_CHG_BATT_FAIL_EINT */ | ||
| 572 | #define WM831X_IM_CHG_BATT_FAIL_EINT_SHIFT 13 /* IM_CHG_BATT_FAIL_EINT */ | ||
| 573 | #define WM831X_IM_CHG_BATT_FAIL_EINT_WIDTH 1 /* IM_CHG_BATT_FAIL_EINT */ | ||
| 574 | #define WM831X_IM_CHG_OV_EINT 0x1000 /* IM_CHG_OV_EINT */ | ||
| 575 | #define WM831X_IM_CHG_OV_EINT_MASK 0x1000 /* IM_CHG_OV_EINT */ | ||
| 576 | #define WM831X_IM_CHG_OV_EINT_SHIFT 12 /* IM_CHG_OV_EINT */ | ||
| 577 | #define WM831X_IM_CHG_OV_EINT_WIDTH 1 /* IM_CHG_OV_EINT */ | ||
| 578 | #define WM831X_IM_CHG_END_EINT 0x0800 /* IM_CHG_END_EINT */ | ||
| 579 | #define WM831X_IM_CHG_END_EINT_MASK 0x0800 /* IM_CHG_END_EINT */ | ||
| 580 | #define WM831X_IM_CHG_END_EINT_SHIFT 11 /* IM_CHG_END_EINT */ | ||
| 581 | #define WM831X_IM_CHG_END_EINT_WIDTH 1 /* IM_CHG_END_EINT */ | ||
| 582 | #define WM831X_IM_CHG_TO_EINT 0x0400 /* IM_CHG_TO_EINT */ | ||
| 583 | #define WM831X_IM_CHG_TO_EINT_MASK 0x0400 /* IM_CHG_TO_EINT */ | ||
| 584 | #define WM831X_IM_CHG_TO_EINT_SHIFT 10 /* IM_CHG_TO_EINT */ | ||
| 585 | #define WM831X_IM_CHG_TO_EINT_WIDTH 1 /* IM_CHG_TO_EINT */ | ||
| 586 | #define WM831X_IM_CHG_MODE_EINT 0x0200 /* IM_CHG_MODE_EINT */ | ||
| 587 | #define WM831X_IM_CHG_MODE_EINT_MASK 0x0200 /* IM_CHG_MODE_EINT */ | ||
| 588 | #define WM831X_IM_CHG_MODE_EINT_SHIFT 9 /* IM_CHG_MODE_EINT */ | ||
| 589 | #define WM831X_IM_CHG_MODE_EINT_WIDTH 1 /* IM_CHG_MODE_EINT */ | ||
| 590 | #define WM831X_IM_CHG_START_EINT 0x0100 /* IM_CHG_START_EINT */ | ||
| 591 | #define WM831X_IM_CHG_START_EINT_MASK 0x0100 /* IM_CHG_START_EINT */ | ||
| 592 | #define WM831X_IM_CHG_START_EINT_SHIFT 8 /* IM_CHG_START_EINT */ | ||
| 593 | #define WM831X_IM_CHG_START_EINT_WIDTH 1 /* IM_CHG_START_EINT */ | ||
| 594 | #define WM831X_IM_CS2_EINT 0x0080 /* IM_CS2_EINT */ | ||
| 595 | #define WM831X_IM_CS2_EINT_MASK 0x0080 /* IM_CS2_EINT */ | ||
| 596 | #define WM831X_IM_CS2_EINT_SHIFT 7 /* IM_CS2_EINT */ | ||
| 597 | #define WM831X_IM_CS2_EINT_WIDTH 1 /* IM_CS2_EINT */ | ||
| 598 | #define WM831X_IM_CS1_EINT 0x0040 /* IM_CS1_EINT */ | ||
| 599 | #define WM831X_IM_CS1_EINT_MASK 0x0040 /* IM_CS1_EINT */ | ||
| 600 | #define WM831X_IM_CS1_EINT_SHIFT 6 /* IM_CS1_EINT */ | ||
| 601 | #define WM831X_IM_CS1_EINT_WIDTH 1 /* IM_CS1_EINT */ | ||
| 602 | #define WM831X_IM_OTP_CMD_END_EINT 0x0020 /* IM_OTP_CMD_END_EINT */ | ||
| 603 | #define WM831X_IM_OTP_CMD_END_EINT_MASK 0x0020 /* IM_OTP_CMD_END_EINT */ | ||
| 604 | #define WM831X_IM_OTP_CMD_END_EINT_SHIFT 5 /* IM_OTP_CMD_END_EINT */ | ||
| 605 | #define WM831X_IM_OTP_CMD_END_EINT_WIDTH 1 /* IM_OTP_CMD_END_EINT */ | ||
| 606 | #define WM831X_IM_OTP_ERR_EINT 0x0010 /* IM_OTP_ERR_EINT */ | ||
| 607 | #define WM831X_IM_OTP_ERR_EINT_MASK 0x0010 /* IM_OTP_ERR_EINT */ | ||
| 608 | #define WM831X_IM_OTP_ERR_EINT_SHIFT 4 /* IM_OTP_ERR_EINT */ | ||
| 609 | #define WM831X_IM_OTP_ERR_EINT_WIDTH 1 /* IM_OTP_ERR_EINT */ | ||
| 610 | #define WM831X_IM_PS_POR_EINT 0x0004 /* IM_PS_POR_EINT */ | ||
| 611 | #define WM831X_IM_PS_POR_EINT_MASK 0x0004 /* IM_PS_POR_EINT */ | ||
| 612 | #define WM831X_IM_PS_POR_EINT_SHIFT 2 /* IM_PS_POR_EINT */ | ||
| 613 | #define WM831X_IM_PS_POR_EINT_WIDTH 1 /* IM_PS_POR_EINT */ | ||
| 614 | #define WM831X_IM_PS_SLEEP_OFF_EINT 0x0002 /* IM_PS_SLEEP_OFF_EINT */ | ||
| 615 | #define WM831X_IM_PS_SLEEP_OFF_EINT_MASK 0x0002 /* IM_PS_SLEEP_OFF_EINT */ | ||
| 616 | #define WM831X_IM_PS_SLEEP_OFF_EINT_SHIFT 1 /* IM_PS_SLEEP_OFF_EINT */ | ||
| 617 | #define WM831X_IM_PS_SLEEP_OFF_EINT_WIDTH 1 /* IM_PS_SLEEP_OFF_EINT */ | ||
| 618 | #define WM831X_IM_PS_ON_WAKE_EINT 0x0001 /* IM_PS_ON_WAKE_EINT */ | ||
| 619 | #define WM831X_IM_PS_ON_WAKE_EINT_MASK 0x0001 /* IM_PS_ON_WAKE_EINT */ | ||
| 620 | #define WM831X_IM_PS_ON_WAKE_EINT_SHIFT 0 /* IM_PS_ON_WAKE_EINT */ | ||
| 621 | #define WM831X_IM_PS_ON_WAKE_EINT_WIDTH 1 /* IM_PS_ON_WAKE_EINT */ | ||
| 622 | |||
| 623 | /* | ||
| 624 | * R16411 (0x401B) - Interrupt Status 3 Mask | ||
| 625 | */ | ||
| 626 | #define WM831X_IM_UV_LDO10_EINT 0x0200 /* IM_UV_LDO10_EINT */ | ||
| 627 | #define WM831X_IM_UV_LDO10_EINT_MASK 0x0200 /* IM_UV_LDO10_EINT */ | ||
| 628 | #define WM831X_IM_UV_LDO10_EINT_SHIFT 9 /* IM_UV_LDO10_EINT */ | ||
| 629 | #define WM831X_IM_UV_LDO10_EINT_WIDTH 1 /* IM_UV_LDO10_EINT */ | ||
| 630 | #define WM831X_IM_UV_LDO9_EINT 0x0100 /* IM_UV_LDO9_EINT */ | ||
| 631 | #define WM831X_IM_UV_LDO9_EINT_MASK 0x0100 /* IM_UV_LDO9_EINT */ | ||
| 632 | #define WM831X_IM_UV_LDO9_EINT_SHIFT 8 /* IM_UV_LDO9_EINT */ | ||
| 633 | #define WM831X_IM_UV_LDO9_EINT_WIDTH 1 /* IM_UV_LDO9_EINT */ | ||
| 634 | #define WM831X_IM_UV_LDO8_EINT 0x0080 /* IM_UV_LDO8_EINT */ | ||
| 635 | #define WM831X_IM_UV_LDO8_EINT_MASK 0x0080 /* IM_UV_LDO8_EINT */ | ||
| 636 | #define WM831X_IM_UV_LDO8_EINT_SHIFT 7 /* IM_UV_LDO8_EINT */ | ||
| 637 | #define WM831X_IM_UV_LDO8_EINT_WIDTH 1 /* IM_UV_LDO8_EINT */ | ||
| 638 | #define WM831X_IM_UV_LDO7_EINT 0x0040 /* IM_UV_LDO7_EINT */ | ||
| 639 | #define WM831X_IM_UV_LDO7_EINT_MASK 0x0040 /* IM_UV_LDO7_EINT */ | ||
| 640 | #define WM831X_IM_UV_LDO7_EINT_SHIFT 6 /* IM_UV_LDO7_EINT */ | ||
| 641 | #define WM831X_IM_UV_LDO7_EINT_WIDTH 1 /* IM_UV_LDO7_EINT */ | ||
| 642 | #define WM831X_IM_UV_LDO6_EINT 0x0020 /* IM_UV_LDO6_EINT */ | ||
| 643 | #define WM831X_IM_UV_LDO6_EINT_MASK 0x0020 /* IM_UV_LDO6_EINT */ | ||
| 644 | #define WM831X_IM_UV_LDO6_EINT_SHIFT 5 /* IM_UV_LDO6_EINT */ | ||
| 645 | #define WM831X_IM_UV_LDO6_EINT_WIDTH 1 /* IM_UV_LDO6_EINT */ | ||
| 646 | #define WM831X_IM_UV_LDO5_EINT 0x0010 /* IM_UV_LDO5_EINT */ | ||
| 647 | #define WM831X_IM_UV_LDO5_EINT_MASK 0x0010 /* IM_UV_LDO5_EINT */ | ||
| 648 | #define WM831X_IM_UV_LDO5_EINT_SHIFT 4 /* IM_UV_LDO5_EINT */ | ||
| 649 | #define WM831X_IM_UV_LDO5_EINT_WIDTH 1 /* IM_UV_LDO5_EINT */ | ||
| 650 | #define WM831X_IM_UV_LDO4_EINT 0x0008 /* IM_UV_LDO4_EINT */ | ||
| 651 | #define WM831X_IM_UV_LDO4_EINT_MASK 0x0008 /* IM_UV_LDO4_EINT */ | ||
| 652 | #define WM831X_IM_UV_LDO4_EINT_SHIFT 3 /* IM_UV_LDO4_EINT */ | ||
| 653 | #define WM831X_IM_UV_LDO4_EINT_WIDTH 1 /* IM_UV_LDO4_EINT */ | ||
| 654 | #define WM831X_IM_UV_LDO3_EINT 0x0004 /* IM_UV_LDO3_EINT */ | ||
| 655 | #define WM831X_IM_UV_LDO3_EINT_MASK 0x0004 /* IM_UV_LDO3_EINT */ | ||
| 656 | #define WM831X_IM_UV_LDO3_EINT_SHIFT 2 /* IM_UV_LDO3_EINT */ | ||
| 657 | #define WM831X_IM_UV_LDO3_EINT_WIDTH 1 /* IM_UV_LDO3_EINT */ | ||
| 658 | #define WM831X_IM_UV_LDO2_EINT 0x0002 /* IM_UV_LDO2_EINT */ | ||
| 659 | #define WM831X_IM_UV_LDO2_EINT_MASK 0x0002 /* IM_UV_LDO2_EINT */ | ||
| 660 | #define WM831X_IM_UV_LDO2_EINT_SHIFT 1 /* IM_UV_LDO2_EINT */ | ||
| 661 | #define WM831X_IM_UV_LDO2_EINT_WIDTH 1 /* IM_UV_LDO2_EINT */ | ||
| 662 | #define WM831X_IM_UV_LDO1_EINT 0x0001 /* IM_UV_LDO1_EINT */ | ||
| 663 | #define WM831X_IM_UV_LDO1_EINT_MASK 0x0001 /* IM_UV_LDO1_EINT */ | ||
| 664 | #define WM831X_IM_UV_LDO1_EINT_SHIFT 0 /* IM_UV_LDO1_EINT */ | ||
| 665 | #define WM831X_IM_UV_LDO1_EINT_WIDTH 1 /* IM_UV_LDO1_EINT */ | ||
| 666 | |||
| 667 | /* | ||
| 668 | * R16412 (0x401C) - Interrupt Status 4 Mask | ||
| 669 | */ | ||
| 670 | #define WM831X_IM_HC_DC2_EINT 0x0200 /* IM_HC_DC2_EINT */ | ||
| 671 | #define WM831X_IM_HC_DC2_EINT_MASK 0x0200 /* IM_HC_DC2_EINT */ | ||
| 672 | #define WM831X_IM_HC_DC2_EINT_SHIFT 9 /* IM_HC_DC2_EINT */ | ||
| 673 | #define WM831X_IM_HC_DC2_EINT_WIDTH 1 /* IM_HC_DC2_EINT */ | ||
| 674 | #define WM831X_IM_HC_DC1_EINT 0x0100 /* IM_HC_DC1_EINT */ | ||
| 675 | #define WM831X_IM_HC_DC1_EINT_MASK 0x0100 /* IM_HC_DC1_EINT */ | ||
| 676 | #define WM831X_IM_HC_DC1_EINT_SHIFT 8 /* IM_HC_DC1_EINT */ | ||
| 677 | #define WM831X_IM_HC_DC1_EINT_WIDTH 1 /* IM_HC_DC1_EINT */ | ||
| 678 | #define WM831X_IM_UV_DC4_EINT 0x0008 /* IM_UV_DC4_EINT */ | ||
| 679 | #define WM831X_IM_UV_DC4_EINT_MASK 0x0008 /* IM_UV_DC4_EINT */ | ||
| 680 | #define WM831X_IM_UV_DC4_EINT_SHIFT 3 /* IM_UV_DC4_EINT */ | ||
| 681 | #define WM831X_IM_UV_DC4_EINT_WIDTH 1 /* IM_UV_DC4_EINT */ | ||
| 682 | #define WM831X_IM_UV_DC3_EINT 0x0004 /* IM_UV_DC3_EINT */ | ||
| 683 | #define WM831X_IM_UV_DC3_EINT_MASK 0x0004 /* IM_UV_DC3_EINT */ | ||
| 684 | #define WM831X_IM_UV_DC3_EINT_SHIFT 2 /* IM_UV_DC3_EINT */ | ||
| 685 | #define WM831X_IM_UV_DC3_EINT_WIDTH 1 /* IM_UV_DC3_EINT */ | ||
| 686 | #define WM831X_IM_UV_DC2_EINT 0x0002 /* IM_UV_DC2_EINT */ | ||
| 687 | #define WM831X_IM_UV_DC2_EINT_MASK 0x0002 /* IM_UV_DC2_EINT */ | ||
| 688 | #define WM831X_IM_UV_DC2_EINT_SHIFT 1 /* IM_UV_DC2_EINT */ | ||
| 689 | #define WM831X_IM_UV_DC2_EINT_WIDTH 1 /* IM_UV_DC2_EINT */ | ||
| 690 | #define WM831X_IM_UV_DC1_EINT 0x0001 /* IM_UV_DC1_EINT */ | ||
| 691 | #define WM831X_IM_UV_DC1_EINT_MASK 0x0001 /* IM_UV_DC1_EINT */ | ||
| 692 | #define WM831X_IM_UV_DC1_EINT_SHIFT 0 /* IM_UV_DC1_EINT */ | ||
| 693 | #define WM831X_IM_UV_DC1_EINT_WIDTH 1 /* IM_UV_DC1_EINT */ | ||
| 694 | |||
| 695 | /* | ||
| 696 | * R16413 (0x401D) - Interrupt Status 5 Mask | ||
| 697 | */ | ||
| 698 | #define WM831X_IM_GP16_EINT 0x8000 /* IM_GP16_EINT */ | ||
| 699 | #define WM831X_IM_GP16_EINT_MASK 0x8000 /* IM_GP16_EINT */ | ||
| 700 | #define WM831X_IM_GP16_EINT_SHIFT 15 /* IM_GP16_EINT */ | ||
| 701 | #define WM831X_IM_GP16_EINT_WIDTH 1 /* IM_GP16_EINT */ | ||
| 702 | #define WM831X_IM_GP15_EINT 0x4000 /* IM_GP15_EINT */ | ||
| 703 | #define WM831X_IM_GP15_EINT_MASK 0x4000 /* IM_GP15_EINT */ | ||
| 704 | #define WM831X_IM_GP15_EINT_SHIFT 14 /* IM_GP15_EINT */ | ||
| 705 | #define WM831X_IM_GP15_EINT_WIDTH 1 /* IM_GP15_EINT */ | ||
| 706 | #define WM831X_IM_GP14_EINT 0x2000 /* IM_GP14_EINT */ | ||
| 707 | #define WM831X_IM_GP14_EINT_MASK 0x2000 /* IM_GP14_EINT */ | ||
| 708 | #define WM831X_IM_GP14_EINT_SHIFT 13 /* IM_GP14_EINT */ | ||
| 709 | #define WM831X_IM_GP14_EINT_WIDTH 1 /* IM_GP14_EINT */ | ||
| 710 | #define WM831X_IM_GP13_EINT 0x1000 /* IM_GP13_EINT */ | ||
| 711 | #define WM831X_IM_GP13_EINT_MASK 0x1000 /* IM_GP13_EINT */ | ||
| 712 | #define WM831X_IM_GP13_EINT_SHIFT 12 /* IM_GP13_EINT */ | ||
| 713 | #define WM831X_IM_GP13_EINT_WIDTH 1 /* IM_GP13_EINT */ | ||
| 714 | #define WM831X_IM_GP12_EINT 0x0800 /* IM_GP12_EINT */ | ||
| 715 | #define WM831X_IM_GP12_EINT_MASK 0x0800 /* IM_GP12_EINT */ | ||
| 716 | #define WM831X_IM_GP12_EINT_SHIFT 11 /* IM_GP12_EINT */ | ||
| 717 | #define WM831X_IM_GP12_EINT_WIDTH 1 /* IM_GP12_EINT */ | ||
| 718 | #define WM831X_IM_GP11_EINT 0x0400 /* IM_GP11_EINT */ | ||
| 719 | #define WM831X_IM_GP11_EINT_MASK 0x0400 /* IM_GP11_EINT */ | ||
| 720 | #define WM831X_IM_GP11_EINT_SHIFT 10 /* IM_GP11_EINT */ | ||
| 721 | #define WM831X_IM_GP11_EINT_WIDTH 1 /* IM_GP11_EINT */ | ||
| 722 | #define WM831X_IM_GP10_EINT 0x0200 /* IM_GP10_EINT */ | ||
| 723 | #define WM831X_IM_GP10_EINT_MASK 0x0200 /* IM_GP10_EINT */ | ||
| 724 | #define WM831X_IM_GP10_EINT_SHIFT 9 /* IM_GP10_EINT */ | ||
| 725 | #define WM831X_IM_GP10_EINT_WIDTH 1 /* IM_GP10_EINT */ | ||
| 726 | #define WM831X_IM_GP9_EINT 0x0100 /* IM_GP9_EINT */ | ||
| 727 | #define WM831X_IM_GP9_EINT_MASK 0x0100 /* IM_GP9_EINT */ | ||
| 728 | #define WM831X_IM_GP9_EINT_SHIFT 8 /* IM_GP9_EINT */ | ||
| 729 | #define WM831X_IM_GP9_EINT_WIDTH 1 /* IM_GP9_EINT */ | ||
| 730 | #define WM831X_IM_GP8_EINT 0x0080 /* IM_GP8_EINT */ | ||
| 731 | #define WM831X_IM_GP8_EINT_MASK 0x0080 /* IM_GP8_EINT */ | ||
| 732 | #define WM831X_IM_GP8_EINT_SHIFT 7 /* IM_GP8_EINT */ | ||
| 733 | #define WM831X_IM_GP8_EINT_WIDTH 1 /* IM_GP8_EINT */ | ||
| 734 | #define WM831X_IM_GP7_EINT 0x0040 /* IM_GP7_EINT */ | ||
| 735 | #define WM831X_IM_GP7_EINT_MASK 0x0040 /* IM_GP7_EINT */ | ||
| 736 | #define WM831X_IM_GP7_EINT_SHIFT 6 /* IM_GP7_EINT */ | ||
| 737 | #define WM831X_IM_GP7_EINT_WIDTH 1 /* IM_GP7_EINT */ | ||
| 738 | #define WM831X_IM_GP6_EINT 0x0020 /* IM_GP6_EINT */ | ||
| 739 | #define WM831X_IM_GP6_EINT_MASK 0x0020 /* IM_GP6_EINT */ | ||
| 740 | #define WM831X_IM_GP6_EINT_SHIFT 5 /* IM_GP6_EINT */ | ||
| 741 | #define WM831X_IM_GP6_EINT_WIDTH 1 /* IM_GP6_EINT */ | ||
| 742 | #define WM831X_IM_GP5_EINT 0x0010 /* IM_GP5_EINT */ | ||
| 743 | #define WM831X_IM_GP5_EINT_MASK 0x0010 /* IM_GP5_EINT */ | ||
| 744 | #define WM831X_IM_GP5_EINT_SHIFT 4 /* IM_GP5_EINT */ | ||
| 745 | #define WM831X_IM_GP5_EINT_WIDTH 1 /* IM_GP5_EINT */ | ||
| 746 | #define WM831X_IM_GP4_EINT 0x0008 /* IM_GP4_EINT */ | ||
| 747 | #define WM831X_IM_GP4_EINT_MASK 0x0008 /* IM_GP4_EINT */ | ||
| 748 | #define WM831X_IM_GP4_EINT_SHIFT 3 /* IM_GP4_EINT */ | ||
| 749 | #define WM831X_IM_GP4_EINT_WIDTH 1 /* IM_GP4_EINT */ | ||
| 750 | #define WM831X_IM_GP3_EINT 0x0004 /* IM_GP3_EINT */ | ||
| 751 | #define WM831X_IM_GP3_EINT_MASK 0x0004 /* IM_GP3_EINT */ | ||
| 752 | #define WM831X_IM_GP3_EINT_SHIFT 2 /* IM_GP3_EINT */ | ||
| 753 | #define WM831X_IM_GP3_EINT_WIDTH 1 /* IM_GP3_EINT */ | ||
| 754 | #define WM831X_IM_GP2_EINT 0x0002 /* IM_GP2_EINT */ | ||
| 755 | #define WM831X_IM_GP2_EINT_MASK 0x0002 /* IM_GP2_EINT */ | ||
| 756 | #define WM831X_IM_GP2_EINT_SHIFT 1 /* IM_GP2_EINT */ | ||
| 757 | #define WM831X_IM_GP2_EINT_WIDTH 1 /* IM_GP2_EINT */ | ||
| 758 | #define WM831X_IM_GP1_EINT 0x0001 /* IM_GP1_EINT */ | ||
| 759 | #define WM831X_IM_GP1_EINT_MASK 0x0001 /* IM_GP1_EINT */ | ||
| 760 | #define WM831X_IM_GP1_EINT_SHIFT 0 /* IM_GP1_EINT */ | ||
| 761 | #define WM831X_IM_GP1_EINT_WIDTH 1 /* IM_GP1_EINT */ | ||
| 762 | |||
| 763 | |||
| 764 | #endif | ||
diff --git a/include/linux/mfd/wm831x/otp.h b/include/linux/mfd/wm831x/otp.h new file mode 100644 index 000000000000..ce1f81a39bfc --- /dev/null +++ b/include/linux/mfd/wm831x/otp.h | |||
| @@ -0,0 +1,162 @@ | |||
| 1 | /* | ||
| 2 | * include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_OTP_H__ | ||
| 16 | #define __MFD_WM831X_OTP_H__ | ||
| 17 | |||
| 18 | int wm831x_otp_init(struct wm831x *wm831x); | ||
| 19 | void wm831x_otp_exit(struct wm831x *wm831x); | ||
| 20 | |||
| 21 | /* | ||
| 22 | * R30720 (0x7800) - Unique ID 1 | ||
| 23 | */ | ||
| 24 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 25 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 26 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 27 | |||
| 28 | /* | ||
| 29 | * R30721 (0x7801) - Unique ID 2 | ||
| 30 | */ | ||
| 31 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 32 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 33 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 34 | |||
| 35 | /* | ||
| 36 | * R30722 (0x7802) - Unique ID 3 | ||
| 37 | */ | ||
| 38 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 39 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 40 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 41 | |||
| 42 | /* | ||
| 43 | * R30723 (0x7803) - Unique ID 4 | ||
| 44 | */ | ||
| 45 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 46 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 47 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 48 | |||
| 49 | /* | ||
| 50 | * R30724 (0x7804) - Unique ID 5 | ||
| 51 | */ | ||
| 52 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 53 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 54 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 55 | |||
| 56 | /* | ||
| 57 | * R30725 (0x7805) - Unique ID 6 | ||
| 58 | */ | ||
| 59 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 60 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 61 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 62 | |||
| 63 | /* | ||
| 64 | * R30726 (0x7806) - Unique ID 7 | ||
| 65 | */ | ||
| 66 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 67 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 68 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 69 | |||
| 70 | /* | ||
| 71 | * R30727 (0x7807) - Unique ID 8 | ||
| 72 | */ | ||
| 73 | #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */ | ||
| 74 | #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */ | ||
| 75 | #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */ | ||
| 76 | |||
| 77 | /* | ||
| 78 | * R30728 (0x7808) - Factory OTP ID | ||
| 79 | */ | ||
| 80 | #define WM831X_OTP_FACT_ID_MASK 0xFFFE /* OTP_FACT_ID - [15:1] */ | ||
| 81 | #define WM831X_OTP_FACT_ID_SHIFT 1 /* OTP_FACT_ID - [15:1] */ | ||
| 82 | #define WM831X_OTP_FACT_ID_WIDTH 15 /* OTP_FACT_ID - [15:1] */ | ||
| 83 | #define WM831X_OTP_FACT_FINAL 0x0001 /* OTP_FACT_FINAL */ | ||
| 84 | #define WM831X_OTP_FACT_FINAL_MASK 0x0001 /* OTP_FACT_FINAL */ | ||
| 85 | #define WM831X_OTP_FACT_FINAL_SHIFT 0 /* OTP_FACT_FINAL */ | ||
| 86 | #define WM831X_OTP_FACT_FINAL_WIDTH 1 /* OTP_FACT_FINAL */ | ||
| 87 | |||
| 88 | /* | ||
| 89 | * R30729 (0x7809) - Factory OTP 1 | ||
| 90 | */ | ||
| 91 | #define WM831X_DC3_TRIM_MASK 0xF000 /* DC3_TRIM - [15:12] */ | ||
| 92 | #define WM831X_DC3_TRIM_SHIFT 12 /* DC3_TRIM - [15:12] */ | ||
| 93 | #define WM831X_DC3_TRIM_WIDTH 4 /* DC3_TRIM - [15:12] */ | ||
| 94 | #define WM831X_DC2_TRIM_MASK 0x0FC0 /* DC2_TRIM - [11:6] */ | ||
| 95 | #define WM831X_DC2_TRIM_SHIFT 6 /* DC2_TRIM - [11:6] */ | ||
| 96 | #define WM831X_DC2_TRIM_WIDTH 6 /* DC2_TRIM - [11:6] */ | ||
| 97 | #define WM831X_DC1_TRIM_MASK 0x003F /* DC1_TRIM - [5:0] */ | ||
| 98 | #define WM831X_DC1_TRIM_SHIFT 0 /* DC1_TRIM - [5:0] */ | ||
| 99 | #define WM831X_DC1_TRIM_WIDTH 6 /* DC1_TRIM - [5:0] */ | ||
| 100 | |||
| 101 | /* | ||
| 102 | * R30730 (0x780A) - Factory OTP 2 | ||
| 103 | */ | ||
| 104 | #define WM831X_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */ | ||
| 105 | #define WM831X_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */ | ||
| 106 | #define WM831X_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */ | ||
| 107 | |||
| 108 | /* | ||
| 109 | * R30731 (0x780B) - Factory OTP 3 | ||
| 110 | */ | ||
| 111 | #define WM831X_OSC_TRIM_MASK 0x0780 /* OSC_TRIM - [10:7] */ | ||
| 112 | #define WM831X_OSC_TRIM_SHIFT 7 /* OSC_TRIM - [10:7] */ | ||
| 113 | #define WM831X_OSC_TRIM_WIDTH 4 /* OSC_TRIM - [10:7] */ | ||
| 114 | #define WM831X_BG_TRIM_MASK 0x0078 /* BG_TRIM - [6:3] */ | ||
| 115 | #define WM831X_BG_TRIM_SHIFT 3 /* BG_TRIM - [6:3] */ | ||
| 116 | #define WM831X_BG_TRIM_WIDTH 4 /* BG_TRIM - [6:3] */ | ||
| 117 | #define WM831X_LPBG_TRIM_MASK 0x0007 /* LPBG_TRIM - [2:0] */ | ||
| 118 | #define WM831X_LPBG_TRIM_SHIFT 0 /* LPBG_TRIM - [2:0] */ | ||
| 119 | #define WM831X_LPBG_TRIM_WIDTH 3 /* LPBG_TRIM - [2:0] */ | ||
| 120 | |||
| 121 | /* | ||
| 122 | * R30732 (0x780C) - Factory OTP 4 | ||
| 123 | */ | ||
| 124 | #define WM831X_CHILD_I2C_ADDR_MASK 0x00FE /* CHILD_I2C_ADDR - [7:1] */ | ||
| 125 | #define WM831X_CHILD_I2C_ADDR_SHIFT 1 /* CHILD_I2C_ADDR - [7:1] */ | ||
| 126 | #define WM831X_CHILD_I2C_ADDR_WIDTH 7 /* CHILD_I2C_ADDR - [7:1] */ | ||
| 127 | #define WM831X_CH_AW 0x0001 /* CH_AW */ | ||
| 128 | #define WM831X_CH_AW_MASK 0x0001 /* CH_AW */ | ||
| 129 | #define WM831X_CH_AW_SHIFT 0 /* CH_AW */ | ||
| 130 | #define WM831X_CH_AW_WIDTH 1 /* CH_AW */ | ||
| 131 | |||
| 132 | /* | ||
| 133 | * R30733 (0x780D) - Factory OTP 5 | ||
| 134 | */ | ||
| 135 | #define WM831X_CHARGE_TRIM_MASK 0x003F /* CHARGE_TRIM - [5:0] */ | ||
| 136 | #define WM831X_CHARGE_TRIM_SHIFT 0 /* CHARGE_TRIM - [5:0] */ | ||
| 137 | #define WM831X_CHARGE_TRIM_WIDTH 6 /* CHARGE_TRIM - [5:0] */ | ||
| 138 | |||
| 139 | /* | ||
| 140 | * R30736 (0x7810) - Customer OTP ID | ||
| 141 | */ | ||
| 142 | #define WM831X_OTP_AUTO_PROG 0x8000 /* OTP_AUTO_PROG */ | ||
| 143 | #define WM831X_OTP_AUTO_PROG_MASK 0x8000 /* OTP_AUTO_PROG */ | ||
| 144 | #define WM831X_OTP_AUTO_PROG_SHIFT 15 /* OTP_AUTO_PROG */ | ||
| 145 | #define WM831X_OTP_AUTO_PROG_WIDTH 1 /* OTP_AUTO_PROG */ | ||
| 146 | #define WM831X_OTP_CUST_ID_MASK 0x7FFE /* OTP_CUST_ID - [14:1] */ | ||
| 147 | #define WM831X_OTP_CUST_ID_SHIFT 1 /* OTP_CUST_ID - [14:1] */ | ||
| 148 | #define WM831X_OTP_CUST_ID_WIDTH 14 /* OTP_CUST_ID - [14:1] */ | ||
| 149 | #define WM831X_OTP_CUST_FINAL 0x0001 /* OTP_CUST_FINAL */ | ||
| 150 | #define WM831X_OTP_CUST_FINAL_MASK 0x0001 /* OTP_CUST_FINAL */ | ||
| 151 | #define WM831X_OTP_CUST_FINAL_SHIFT 0 /* OTP_CUST_FINAL */ | ||
| 152 | #define WM831X_OTP_CUST_FINAL_WIDTH 1 /* OTP_CUST_FINAL */ | ||
| 153 | |||
| 154 | /* | ||
| 155 | * R30759 (0x7827) - DBE CHECK DATA | ||
| 156 | */ | ||
| 157 | #define WM831X_DBE_VALID_DATA_MASK 0xFFFF /* DBE_VALID_DATA - [15:0] */ | ||
| 158 | #define WM831X_DBE_VALID_DATA_SHIFT 0 /* DBE_VALID_DATA - [15:0] */ | ||
| 159 | #define WM831X_DBE_VALID_DATA_WIDTH 16 /* DBE_VALID_DATA - [15:0] */ | ||
| 160 | |||
| 161 | |||
| 162 | #endif | ||
diff --git a/include/linux/mfd/wm831x/pdata.h b/include/linux/mfd/wm831x/pdata.h new file mode 100644 index 000000000000..90d820260aad --- /dev/null +++ b/include/linux/mfd/wm831x/pdata.h | |||
| @@ -0,0 +1,113 @@ | |||
| 1 | /* | ||
| 2 | * include/linux/mfd/wm831x/pdata.h -- Platform data for WM831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_PDATA_H__ | ||
| 16 | #define __MFD_WM831X_PDATA_H__ | ||
| 17 | |||
| 18 | struct wm831x; | ||
| 19 | struct regulator_init_data; | ||
| 20 | |||
| 21 | struct wm831x_backlight_pdata { | ||
| 22 | int isink; /** ISINK to use, 1 or 2 */ | ||
| 23 | int max_uA; /** Maximum current to allow */ | ||
| 24 | }; | ||
| 25 | |||
| 26 | struct wm831x_backup_pdata { | ||
| 27 | int charger_enable; | ||
| 28 | int no_constant_voltage; /** Disable constant voltage charging */ | ||
| 29 | int vlim; /** Voltage limit in milivolts */ | ||
| 30 | int ilim; /** Current limit in microamps */ | ||
| 31 | }; | ||
| 32 | |||
| 33 | struct wm831x_battery_pdata { | ||
| 34 | int enable; /** Enable charging */ | ||
| 35 | int fast_enable; /** Enable fast charging */ | ||
| 36 | int off_mask; /** Mask OFF while charging */ | ||
| 37 | int trickle_ilim; /** Trickle charge current limit, in mA */ | ||
| 38 | int vsel; /** Target voltage, in mV */ | ||
| 39 | int eoc_iterm; /** End of trickle charge current, in mA */ | ||
| 40 | int fast_ilim; /** Fast charge current limit, in mA */ | ||
| 41 | int timeout; /** Charge cycle timeout, in minutes */ | ||
| 42 | }; | ||
| 43 | |||
| 44 | /* Sources for status LED configuration. Values are register values | ||
| 45 | * plus 1 to allow for a zero default for preserve. | ||
| 46 | */ | ||
| 47 | enum wm831x_status_src { | ||
| 48 | WM831X_STATUS_PRESERVE = 0, /* Keep the current hardware setting */ | ||
| 49 | WM831X_STATUS_OTP = 1, | ||
| 50 | WM831X_STATUS_POWER = 2, | ||
| 51 | WM831X_STATUS_CHARGER = 3, | ||
| 52 | WM831X_STATUS_MANUAL = 4, | ||
| 53 | }; | ||
| 54 | |||
| 55 | struct wm831x_status_pdata { | ||
| 56 | enum wm831x_status_src default_src; | ||
| 57 | const char *name; | ||
| 58 | const char *default_trigger; | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct wm831x_touch_pdata { | ||
| 62 | int fivewire; /** 1 for five wire mode, 0 for 4 wire */ | ||
| 63 | int isel; /** Current for pen down (uA) */ | ||
| 64 | int rpu; /** Pen down sensitivity resistor divider */ | ||
| 65 | int pressure; /** Report pressure (boolean) */ | ||
| 66 | int data_irq; /** Touch data ready IRQ */ | ||
| 67 | }; | ||
| 68 | |||
| 69 | enum wm831x_watchdog_action { | ||
| 70 | WM831X_WDOG_NONE = 0, | ||
| 71 | WM831X_WDOG_INTERRUPT = 1, | ||
| 72 | WM831X_WDOG_RESET = 2, | ||
| 73 | WM831X_WDOG_WAKE = 3, | ||
| 74 | }; | ||
| 75 | |||
| 76 | struct wm831x_watchdog_pdata { | ||
| 77 | enum wm831x_watchdog_action primary, secondary; | ||
| 78 | int update_gpio; | ||
| 79 | unsigned int software:1; | ||
| 80 | }; | ||
| 81 | |||
| 82 | #define WM831X_MAX_STATUS 2 | ||
| 83 | #define WM831X_MAX_DCDC 4 | ||
| 84 | #define WM831X_MAX_EPE 2 | ||
| 85 | #define WM831X_MAX_LDO 11 | ||
| 86 | #define WM831X_MAX_ISINK 2 | ||
| 87 | |||
| 88 | struct wm831x_pdata { | ||
| 89 | /** Called before subdevices are set up */ | ||
| 90 | int (*pre_init)(struct wm831x *wm831x); | ||
| 91 | /** Called after subdevices are set up */ | ||
| 92 | int (*post_init)(struct wm831x *wm831x); | ||
| 93 | |||
| 94 | int gpio_base; | ||
| 95 | struct wm831x_backlight_pdata *backlight; | ||
| 96 | struct wm831x_backup_pdata *backup; | ||
| 97 | struct wm831x_battery_pdata *battery; | ||
| 98 | struct wm831x_touch_pdata *touch; | ||
| 99 | struct wm831x_watchdog_pdata *watchdog; | ||
| 100 | |||
| 101 | /** LED1 = 0 and so on */ | ||
| 102 | struct wm831x_status_pdata *status[WM831X_MAX_STATUS]; | ||
| 103 | /** DCDC1 = 0 and so on */ | ||
| 104 | struct regulator_init_data *dcdc[WM831X_MAX_DCDC]; | ||
| 105 | /** EPE1 = 0 and so on */ | ||
| 106 | struct regulator_init_data *epe[WM831X_MAX_EPE]; | ||
| 107 | /** LDO1 = 0 and so on */ | ||
| 108 | struct regulator_init_data *ldo[WM831X_MAX_LDO]; | ||
| 109 | /** ISINK1 = 0 and so on*/ | ||
| 110 | struct regulator_init_data *isink[WM831X_MAX_ISINK]; | ||
| 111 | }; | ||
| 112 | |||
| 113 | #endif | ||
diff --git a/include/linux/mfd/wm831x/regulator.h b/include/linux/mfd/wm831x/regulator.h new file mode 100644 index 000000000000..f95466343fb2 --- /dev/null +++ b/include/linux/mfd/wm831x/regulator.h | |||
| @@ -0,0 +1,1218 @@ | |||
| 1 | /* | ||
| 2 | * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_REGULATOR_H__ | ||
| 16 | #define __MFD_WM831X_REGULATOR_H__ | ||
| 17 | |||
| 18 | /* | ||
| 19 | * R16462 (0x404E) - Current Sink 1 | ||
| 20 | */ | ||
| 21 | #define WM831X_CS1_ENA 0x8000 /* CS1_ENA */ | ||
| 22 | #define WM831X_CS1_ENA_MASK 0x8000 /* CS1_ENA */ | ||
| 23 | #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */ | ||
| 24 | #define WM831X_CS1_ENA_WIDTH 1 /* CS1_ENA */ | ||
| 25 | #define WM831X_CS1_DRIVE 0x4000 /* CS1_DRIVE */ | ||
| 26 | #define WM831X_CS1_DRIVE_MASK 0x4000 /* CS1_DRIVE */ | ||
| 27 | #define WM831X_CS1_DRIVE_SHIFT 14 /* CS1_DRIVE */ | ||
| 28 | #define WM831X_CS1_DRIVE_WIDTH 1 /* CS1_DRIVE */ | ||
| 29 | #define WM831X_CS1_SLPENA 0x1000 /* CS1_SLPENA */ | ||
| 30 | #define WM831X_CS1_SLPENA_MASK 0x1000 /* CS1_SLPENA */ | ||
| 31 | #define WM831X_CS1_SLPENA_SHIFT 12 /* CS1_SLPENA */ | ||
| 32 | #define WM831X_CS1_SLPENA_WIDTH 1 /* CS1_SLPENA */ | ||
| 33 | #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */ | ||
| 34 | #define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */ | ||
| 35 | #define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */ | ||
| 36 | #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */ | ||
| 37 | #define WM831X_CS1_ON_RAMP_SHIFT 8 /* CS1_ON_RAMP - [9:8] */ | ||
| 38 | #define WM831X_CS1_ON_RAMP_WIDTH 2 /* CS1_ON_RAMP - [9:8] */ | ||
| 39 | #define WM831X_CS1_ISEL_MASK 0x003F /* CS1_ISEL - [5:0] */ | ||
| 40 | #define WM831X_CS1_ISEL_SHIFT 0 /* CS1_ISEL - [5:0] */ | ||
| 41 | #define WM831X_CS1_ISEL_WIDTH 6 /* CS1_ISEL - [5:0] */ | ||
| 42 | |||
| 43 | /* | ||
| 44 | * R16463 (0x404F) - Current Sink 2 | ||
| 45 | */ | ||
| 46 | #define WM831X_CS2_ENA 0x8000 /* CS2_ENA */ | ||
| 47 | #define WM831X_CS2_ENA_MASK 0x8000 /* CS2_ENA */ | ||
| 48 | #define WM831X_CS2_ENA_SHIFT 15 /* CS2_ENA */ | ||
| 49 | #define WM831X_CS2_ENA_WIDTH 1 /* CS2_ENA */ | ||
| 50 | #define WM831X_CS2_DRIVE 0x4000 /* CS2_DRIVE */ | ||
| 51 | #define WM831X_CS2_DRIVE_MASK 0x4000 /* CS2_DRIVE */ | ||
| 52 | #define WM831X_CS2_DRIVE_SHIFT 14 /* CS2_DRIVE */ | ||
| 53 | #define WM831X_CS2_DRIVE_WIDTH 1 /* CS2_DRIVE */ | ||
| 54 | #define WM831X_CS2_SLPENA 0x1000 /* CS2_SLPENA */ | ||
| 55 | #define WM831X_CS2_SLPENA_MASK 0x1000 /* CS2_SLPENA */ | ||
| 56 | #define WM831X_CS2_SLPENA_SHIFT 12 /* CS2_SLPENA */ | ||
| 57 | #define WM831X_CS2_SLPENA_WIDTH 1 /* CS2_SLPENA */ | ||
| 58 | #define WM831X_CS2_OFF_RAMP_MASK 0x0C00 /* CS2_OFF_RAMP - [11:10] */ | ||
| 59 | #define WM831X_CS2_OFF_RAMP_SHIFT 10 /* CS2_OFF_RAMP - [11:10] */ | ||
| 60 | #define WM831X_CS2_OFF_RAMP_WIDTH 2 /* CS2_OFF_RAMP - [11:10] */ | ||
| 61 | #define WM831X_CS2_ON_RAMP_MASK 0x0300 /* CS2_ON_RAMP - [9:8] */ | ||
| 62 | #define WM831X_CS2_ON_RAMP_SHIFT 8 /* CS2_ON_RAMP - [9:8] */ | ||
| 63 | #define WM831X_CS2_ON_RAMP_WIDTH 2 /* CS2_ON_RAMP - [9:8] */ | ||
| 64 | #define WM831X_CS2_ISEL_MASK 0x003F /* CS2_ISEL - [5:0] */ | ||
| 65 | #define WM831X_CS2_ISEL_SHIFT 0 /* CS2_ISEL - [5:0] */ | ||
| 66 | #define WM831X_CS2_ISEL_WIDTH 6 /* CS2_ISEL - [5:0] */ | ||
| 67 | |||
| 68 | /* | ||
| 69 | * R16464 (0x4050) - DCDC Enable | ||
| 70 | */ | ||
| 71 | #define WM831X_EPE2_ENA 0x0080 /* EPE2_ENA */ | ||
| 72 | #define WM831X_EPE2_ENA_MASK 0x0080 /* EPE2_ENA */ | ||
| 73 | #define WM831X_EPE2_ENA_SHIFT 7 /* EPE2_ENA */ | ||
| 74 | #define WM831X_EPE2_ENA_WIDTH 1 /* EPE2_ENA */ | ||
| 75 | #define WM831X_EPE1_ENA 0x0040 /* EPE1_ENA */ | ||
| 76 | #define WM831X_EPE1_ENA_MASK 0x0040 /* EPE1_ENA */ | ||
| 77 | #define WM831X_EPE1_ENA_SHIFT 6 /* EPE1_ENA */ | ||
| 78 | #define WM831X_EPE1_ENA_WIDTH 1 /* EPE1_ENA */ | ||
| 79 | #define WM831X_DC4_ENA 0x0008 /* DC4_ENA */ | ||
| 80 | #define WM831X_DC4_ENA_MASK 0x0008 /* DC4_ENA */ | ||
| 81 | #define WM831X_DC4_ENA_SHIFT 3 /* DC4_ENA */ | ||
| 82 | #define WM831X_DC4_ENA_WIDTH 1 /* DC4_ENA */ | ||
| 83 | #define WM831X_DC3_ENA 0x0004 /* DC3_ENA */ | ||
| 84 | #define WM831X_DC3_ENA_MASK 0x0004 /* DC3_ENA */ | ||
| 85 | #define WM831X_DC3_ENA_SHIFT 2 /* DC3_ENA */ | ||
| 86 | #define WM831X_DC3_ENA_WIDTH 1 /* DC3_ENA */ | ||
| 87 | #define WM831X_DC2_ENA 0x0002 /* DC2_ENA */ | ||
| 88 | #define WM831X_DC2_ENA_MASK 0x0002 /* DC2_ENA */ | ||
| 89 | #define WM831X_DC2_ENA_SHIFT 1 /* DC2_ENA */ | ||
| 90 | #define WM831X_DC2_ENA_WIDTH 1 /* DC2_ENA */ | ||
| 91 | #define WM831X_DC1_ENA 0x0001 /* DC1_ENA */ | ||
| 92 | #define WM831X_DC1_ENA_MASK 0x0001 /* DC1_ENA */ | ||
| 93 | #define WM831X_DC1_ENA_SHIFT 0 /* DC1_ENA */ | ||
| 94 | #define WM831X_DC1_ENA_WIDTH 1 /* DC1_ENA */ | ||
| 95 | |||
| 96 | /* | ||
| 97 | * R16465 (0x4051) - LDO Enable | ||
| 98 | */ | ||
| 99 | #define WM831X_LDO11_ENA 0x0400 /* LDO11_ENA */ | ||
| 100 | #define WM831X_LDO11_ENA_MASK 0x0400 /* LDO11_ENA */ | ||
| 101 | #define WM831X_LDO11_ENA_SHIFT 10 /* LDO11_ENA */ | ||
| 102 | #define WM831X_LDO11_ENA_WIDTH 1 /* LDO11_ENA */ | ||
| 103 | #define WM831X_LDO10_ENA 0x0200 /* LDO10_ENA */ | ||
| 104 | #define WM831X_LDO10_ENA_MASK 0x0200 /* LDO10_ENA */ | ||
| 105 | #define WM831X_LDO10_ENA_SHIFT 9 /* LDO10_ENA */ | ||
| 106 | #define WM831X_LDO10_ENA_WIDTH 1 /* LDO10_ENA */ | ||
| 107 | #define WM831X_LDO9_ENA 0x0100 /* LDO9_ENA */ | ||
| 108 | #define WM831X_LDO9_ENA_MASK 0x0100 /* LDO9_ENA */ | ||
| 109 | #define WM831X_LDO9_ENA_SHIFT 8 /* LDO9_ENA */ | ||
| 110 | #define WM831X_LDO9_ENA_WIDTH 1 /* LDO9_ENA */ | ||
| 111 | #define WM831X_LDO8_ENA 0x0080 /* LDO8_ENA */ | ||
| 112 | #define WM831X_LDO8_ENA_MASK 0x0080 /* LDO8_ENA */ | ||
| 113 | #define WM831X_LDO8_ENA_SHIFT 7 /* LDO8_ENA */ | ||
| 114 | #define WM831X_LDO8_ENA_WIDTH 1 /* LDO8_ENA */ | ||
| 115 | #define WM831X_LDO7_ENA 0x0040 /* LDO7_ENA */ | ||
| 116 | #define WM831X_LDO7_ENA_MASK 0x0040 /* LDO7_ENA */ | ||
| 117 | #define WM831X_LDO7_ENA_SHIFT 6 /* LDO7_ENA */ | ||
| 118 | #define WM831X_LDO7_ENA_WIDTH 1 /* LDO7_ENA */ | ||
| 119 | #define WM831X_LDO6_ENA 0x0020 /* LDO6_ENA */ | ||
| 120 | #define WM831X_LDO6_ENA_MASK 0x0020 /* LDO6_ENA */ | ||
| 121 | #define WM831X_LDO6_ENA_SHIFT 5 /* LDO6_ENA */ | ||
| 122 | #define WM831X_LDO6_ENA_WIDTH 1 /* LDO6_ENA */ | ||
| 123 | #define WM831X_LDO5_ENA 0x0010 /* LDO5_ENA */ | ||
| 124 | #define WM831X_LDO5_ENA_MASK 0x0010 /* LDO5_ENA */ | ||
| 125 | #define WM831X_LDO5_ENA_SHIFT 4 /* LDO5_ENA */ | ||
| 126 | #define WM831X_LDO5_ENA_WIDTH 1 /* LDO5_ENA */ | ||
| 127 | #define WM831X_LDO4_ENA 0x0008 /* LDO4_ENA */ | ||
| 128 | #define WM831X_LDO4_ENA_MASK 0x0008 /* LDO4_ENA */ | ||
| 129 | #define WM831X_LDO4_ENA_SHIFT 3 /* LDO4_ENA */ | ||
| 130 | #define WM831X_LDO4_ENA_WIDTH 1 /* LDO4_ENA */ | ||
| 131 | #define WM831X_LDO3_ENA 0x0004 /* LDO3_ENA */ | ||
| 132 | #define WM831X_LDO3_ENA_MASK 0x0004 /* LDO3_ENA */ | ||
| 133 | #define WM831X_LDO3_ENA_SHIFT 2 /* LDO3_ENA */ | ||
| 134 | #define WM831X_LDO3_ENA_WIDTH 1 /* LDO3_ENA */ | ||
| 135 | #define WM831X_LDO2_ENA 0x0002 /* LDO2_ENA */ | ||
| 136 | #define WM831X_LDO2_ENA_MASK 0x0002 /* LDO2_ENA */ | ||
| 137 | #define WM831X_LDO2_ENA_SHIFT 1 /* LDO2_ENA */ | ||
| 138 | #define WM831X_LDO2_ENA_WIDTH 1 /* LDO2_ENA */ | ||
| 139 | #define WM831X_LDO1_ENA 0x0001 /* LDO1_ENA */ | ||
| 140 | #define WM831X_LDO1_ENA_MASK 0x0001 /* LDO1_ENA */ | ||
| 141 | #define WM831X_LDO1_ENA_SHIFT 0 /* LDO1_ENA */ | ||
| 142 | #define WM831X_LDO1_ENA_WIDTH 1 /* LDO1_ENA */ | ||
| 143 | |||
| 144 | /* | ||
| 145 | * R16466 (0x4052) - DCDC Status | ||
| 146 | */ | ||
| 147 | #define WM831X_EPE2_STS 0x0080 /* EPE2_STS */ | ||
| 148 | #define WM831X_EPE2_STS_MASK 0x0080 /* EPE2_STS */ | ||
| 149 | #define WM831X_EPE2_STS_SHIFT 7 /* EPE2_STS */ | ||
| 150 | #define WM831X_EPE2_STS_WIDTH 1 /* EPE2_STS */ | ||
| 151 | #define WM831X_EPE1_STS 0x0040 /* EPE1_STS */ | ||
| 152 | #define WM831X_EPE1_STS_MASK 0x0040 /* EPE1_STS */ | ||
| 153 | #define WM831X_EPE1_STS_SHIFT 6 /* EPE1_STS */ | ||
| 154 | #define WM831X_EPE1_STS_WIDTH 1 /* EPE1_STS */ | ||
| 155 | #define WM831X_DC4_STS 0x0008 /* DC4_STS */ | ||
| 156 | #define WM831X_DC4_STS_MASK 0x0008 /* DC4_STS */ | ||
| 157 | #define WM831X_DC4_STS_SHIFT 3 /* DC4_STS */ | ||
| 158 | #define WM831X_DC4_STS_WIDTH 1 /* DC4_STS */ | ||
| 159 | #define WM831X_DC3_STS 0x0004 /* DC3_STS */ | ||
| 160 | #define WM831X_DC3_STS_MASK 0x0004 /* DC3_STS */ | ||
| 161 | #define WM831X_DC3_STS_SHIFT 2 /* DC3_STS */ | ||
| 162 | #define WM831X_DC3_STS_WIDTH 1 /* DC3_STS */ | ||
| 163 | #define WM831X_DC2_STS 0x0002 /* DC2_STS */ | ||
| 164 | #define WM831X_DC2_STS_MASK 0x0002 /* DC2_STS */ | ||
| 165 | #define WM831X_DC2_STS_SHIFT 1 /* DC2_STS */ | ||
| 166 | #define WM831X_DC2_STS_WIDTH 1 /* DC2_STS */ | ||
| 167 | #define WM831X_DC1_STS 0x0001 /* DC1_STS */ | ||
| 168 | #define WM831X_DC1_STS_MASK 0x0001 /* DC1_STS */ | ||
| 169 | #define WM831X_DC1_STS_SHIFT 0 /* DC1_STS */ | ||
| 170 | #define WM831X_DC1_STS_WIDTH 1 /* DC1_STS */ | ||
| 171 | |||
| 172 | /* | ||
| 173 | * R16467 (0x4053) - LDO Status | ||
| 174 | */ | ||
| 175 | #define WM831X_LDO11_STS 0x0400 /* LDO11_STS */ | ||
| 176 | #define WM831X_LDO11_STS_MASK 0x0400 /* LDO11_STS */ | ||
| 177 | #define WM831X_LDO11_STS_SHIFT 10 /* LDO11_STS */ | ||
| 178 | #define WM831X_LDO11_STS_WIDTH 1 /* LDO11_STS */ | ||
| 179 | #define WM831X_LDO10_STS 0x0200 /* LDO10_STS */ | ||
| 180 | #define WM831X_LDO10_STS_MASK 0x0200 /* LDO10_STS */ | ||
| 181 | #define WM831X_LDO10_STS_SHIFT 9 /* LDO10_STS */ | ||
| 182 | #define WM831X_LDO10_STS_WIDTH 1 /* LDO10_STS */ | ||
| 183 | #define WM831X_LDO9_STS 0x0100 /* LDO9_STS */ | ||
| 184 | #define WM831X_LDO9_STS_MASK 0x0100 /* LDO9_STS */ | ||
| 185 | #define WM831X_LDO9_STS_SHIFT 8 /* LDO9_STS */ | ||
| 186 | #define WM831X_LDO9_STS_WIDTH 1 /* LDO9_STS */ | ||
| 187 | #define WM831X_LDO8_STS 0x0080 /* LDO8_STS */ | ||
| 188 | #define WM831X_LDO8_STS_MASK 0x0080 /* LDO8_STS */ | ||
| 189 | #define WM831X_LDO8_STS_SHIFT 7 /* LDO8_STS */ | ||
| 190 | #define WM831X_LDO8_STS_WIDTH 1 /* LDO8_STS */ | ||
| 191 | #define WM831X_LDO7_STS 0x0040 /* LDO7_STS */ | ||
| 192 | #define WM831X_LDO7_STS_MASK 0x0040 /* LDO7_STS */ | ||
| 193 | #define WM831X_LDO7_STS_SHIFT 6 /* LDO7_STS */ | ||
| 194 | #define WM831X_LDO7_STS_WIDTH 1 /* LDO7_STS */ | ||
| 195 | #define WM831X_LDO6_STS 0x0020 /* LDO6_STS */ | ||
| 196 | #define WM831X_LDO6_STS_MASK 0x0020 /* LDO6_STS */ | ||
| 197 | #define WM831X_LDO6_STS_SHIFT 5 /* LDO6_STS */ | ||
| 198 | #define WM831X_LDO6_STS_WIDTH 1 /* LDO6_STS */ | ||
| 199 | #define WM831X_LDO5_STS 0x0010 /* LDO5_STS */ | ||
| 200 | #define WM831X_LDO5_STS_MASK 0x0010 /* LDO5_STS */ | ||
| 201 | #define WM831X_LDO5_STS_SHIFT 4 /* LDO5_STS */ | ||
| 202 | #define WM831X_LDO5_STS_WIDTH 1 /* LDO5_STS */ | ||
| 203 | #define WM831X_LDO4_STS 0x0008 /* LDO4_STS */ | ||
| 204 | #define WM831X_LDO4_STS_MASK 0x0008 /* LDO4_STS */ | ||
| 205 | #define WM831X_LDO4_STS_SHIFT 3 /* LDO4_STS */ | ||
| 206 | #define WM831X_LDO4_STS_WIDTH 1 /* LDO4_STS */ | ||
| 207 | #define WM831X_LDO3_STS 0x0004 /* LDO3_STS */ | ||
| 208 | #define WM831X_LDO3_STS_MASK 0x0004 /* LDO3_STS */ | ||
| 209 | #define WM831X_LDO3_STS_SHIFT 2 /* LDO3_STS */ | ||
| 210 | #define WM831X_LDO3_STS_WIDTH 1 /* LDO3_STS */ | ||
| 211 | #define WM831X_LDO2_STS 0x0002 /* LDO2_STS */ | ||
| 212 | #define WM831X_LDO2_STS_MASK 0x0002 /* LDO2_STS */ | ||
| 213 | #define WM831X_LDO2_STS_SHIFT 1 /* LDO2_STS */ | ||
| 214 | #define WM831X_LDO2_STS_WIDTH 1 /* LDO2_STS */ | ||
| 215 | #define WM831X_LDO1_STS 0x0001 /* LDO1_STS */ | ||
| 216 | #define WM831X_LDO1_STS_MASK 0x0001 /* LDO1_STS */ | ||
| 217 | #define WM831X_LDO1_STS_SHIFT 0 /* LDO1_STS */ | ||
| 218 | #define WM831X_LDO1_STS_WIDTH 1 /* LDO1_STS */ | ||
| 219 | |||
| 220 | /* | ||
| 221 | * R16468 (0x4054) - DCDC UV Status | ||
| 222 | */ | ||
| 223 | #define WM831X_DC2_OV_STS 0x2000 /* DC2_OV_STS */ | ||
| 224 | #define WM831X_DC2_OV_STS_MASK 0x2000 /* DC2_OV_STS */ | ||
| 225 | #define WM831X_DC2_OV_STS_SHIFT 13 /* DC2_OV_STS */ | ||
| 226 | #define WM831X_DC2_OV_STS_WIDTH 1 /* DC2_OV_STS */ | ||
| 227 | #define WM831X_DC1_OV_STS 0x1000 /* DC1_OV_STS */ | ||
| 228 | #define WM831X_DC1_OV_STS_MASK 0x1000 /* DC1_OV_STS */ | ||
| 229 | #define WM831X_DC1_OV_STS_SHIFT 12 /* DC1_OV_STS */ | ||
| 230 | #define WM831X_DC1_OV_STS_WIDTH 1 /* DC1_OV_STS */ | ||
| 231 | #define WM831X_DC2_HC_STS 0x0200 /* DC2_HC_STS */ | ||
| 232 | #define WM831X_DC2_HC_STS_MASK 0x0200 /* DC2_HC_STS */ | ||
| 233 | #define WM831X_DC2_HC_STS_SHIFT 9 /* DC2_HC_STS */ | ||
| 234 | #define WM831X_DC2_HC_STS_WIDTH 1 /* DC2_HC_STS */ | ||
| 235 | #define WM831X_DC1_HC_STS 0x0100 /* DC1_HC_STS */ | ||
| 236 | #define WM831X_DC1_HC_STS_MASK 0x0100 /* DC1_HC_STS */ | ||
| 237 | #define WM831X_DC1_HC_STS_SHIFT 8 /* DC1_HC_STS */ | ||
| 238 | #define WM831X_DC1_HC_STS_WIDTH 1 /* DC1_HC_STS */ | ||
| 239 | #define WM831X_DC4_UV_STS 0x0008 /* DC4_UV_STS */ | ||
| 240 | #define WM831X_DC4_UV_STS_MASK 0x0008 /* DC4_UV_STS */ | ||
| 241 | #define WM831X_DC4_UV_STS_SHIFT 3 /* DC4_UV_STS */ | ||
| 242 | #define WM831X_DC4_UV_STS_WIDTH 1 /* DC4_UV_STS */ | ||
| 243 | #define WM831X_DC3_UV_STS 0x0004 /* DC3_UV_STS */ | ||
| 244 | #define WM831X_DC3_UV_STS_MASK 0x0004 /* DC3_UV_STS */ | ||
| 245 | #define WM831X_DC3_UV_STS_SHIFT 2 /* DC3_UV_STS */ | ||
| 246 | #define WM831X_DC3_UV_STS_WIDTH 1 /* DC3_UV_STS */ | ||
| 247 | #define WM831X_DC2_UV_STS 0x0002 /* DC2_UV_STS */ | ||
| 248 | #define WM831X_DC2_UV_STS_MASK 0x0002 /* DC2_UV_STS */ | ||
| 249 | #define WM831X_DC2_UV_STS_SHIFT 1 /* DC2_UV_STS */ | ||
| 250 | #define WM831X_DC2_UV_STS_WIDTH 1 /* DC2_UV_STS */ | ||
| 251 | #define WM831X_DC1_UV_STS 0x0001 /* DC1_UV_STS */ | ||
| 252 | #define WM831X_DC1_UV_STS_MASK 0x0001 /* DC1_UV_STS */ | ||
| 253 | #define WM831X_DC1_UV_STS_SHIFT 0 /* DC1_UV_STS */ | ||
| 254 | #define WM831X_DC1_UV_STS_WIDTH 1 /* DC1_UV_STS */ | ||
| 255 | |||
| 256 | /* | ||
| 257 | * R16469 (0x4055) - LDO UV Status | ||
| 258 | */ | ||
| 259 | #define WM831X_INTLDO_UV_STS 0x8000 /* INTLDO_UV_STS */ | ||
| 260 | #define WM831X_INTLDO_UV_STS_MASK 0x8000 /* INTLDO_UV_STS */ | ||
| 261 | #define WM831X_INTLDO_UV_STS_SHIFT 15 /* INTLDO_UV_STS */ | ||
| 262 | #define WM831X_INTLDO_UV_STS_WIDTH 1 /* INTLDO_UV_STS */ | ||
| 263 | #define WM831X_LDO10_UV_STS 0x0200 /* LDO10_UV_STS */ | ||
| 264 | #define WM831X_LDO10_UV_STS_MASK 0x0200 /* LDO10_UV_STS */ | ||
| 265 | #define WM831X_LDO10_UV_STS_SHIFT 9 /* LDO10_UV_STS */ | ||
| 266 | #define WM831X_LDO10_UV_STS_WIDTH 1 /* LDO10_UV_STS */ | ||
| 267 | #define WM831X_LDO9_UV_STS 0x0100 /* LDO9_UV_STS */ | ||
| 268 | #define WM831X_LDO9_UV_STS_MASK 0x0100 /* LDO9_UV_STS */ | ||
| 269 | #define WM831X_LDO9_UV_STS_SHIFT 8 /* LDO9_UV_STS */ | ||
| 270 | #define WM831X_LDO9_UV_STS_WIDTH 1 /* LDO9_UV_STS */ | ||
| 271 | #define WM831X_LDO8_UV_STS 0x0080 /* LDO8_UV_STS */ | ||
| 272 | #define WM831X_LDO8_UV_STS_MASK 0x0080 /* LDO8_UV_STS */ | ||
| 273 | #define WM831X_LDO8_UV_STS_SHIFT 7 /* LDO8_UV_STS */ | ||
| 274 | #define WM831X_LDO8_UV_STS_WIDTH 1 /* LDO8_UV_STS */ | ||
| 275 | #define WM831X_LDO7_UV_STS 0x0040 /* LDO7_UV_STS */ | ||
| 276 | #define WM831X_LDO7_UV_STS_MASK 0x0040 /* LDO7_UV_STS */ | ||
| 277 | #define WM831X_LDO7_UV_STS_SHIFT 6 /* LDO7_UV_STS */ | ||
| 278 | #define WM831X_LDO7_UV_STS_WIDTH 1 /* LDO7_UV_STS */ | ||
| 279 | #define WM831X_LDO6_UV_STS 0x0020 /* LDO6_UV_STS */ | ||
| 280 | #define WM831X_LDO6_UV_STS_MASK 0x0020 /* LDO6_UV_STS */ | ||
| 281 | #define WM831X_LDO6_UV_STS_SHIFT 5 /* LDO6_UV_STS */ | ||
| 282 | #define WM831X_LDO6_UV_STS_WIDTH 1 /* LDO6_UV_STS */ | ||
| 283 | #define WM831X_LDO5_UV_STS 0x0010 /* LDO5_UV_STS */ | ||
| 284 | #define WM831X_LDO5_UV_STS_MASK 0x0010 /* LDO5_UV_STS */ | ||
| 285 | #define WM831X_LDO5_UV_STS_SHIFT 4 /* LDO5_UV_STS */ | ||
| 286 | #define WM831X_LDO5_UV_STS_WIDTH 1 /* LDO5_UV_STS */ | ||
| 287 | #define WM831X_LDO4_UV_STS 0x0008 /* LDO4_UV_STS */ | ||
| 288 | #define WM831X_LDO4_UV_STS_MASK 0x0008 /* LDO4_UV_STS */ | ||
| 289 | #define WM831X_LDO4_UV_STS_SHIFT 3 /* LDO4_UV_STS */ | ||
| 290 | #define WM831X_LDO4_UV_STS_WIDTH 1 /* LDO4_UV_STS */ | ||
| 291 | #define WM831X_LDO3_UV_STS 0x0004 /* LDO3_UV_STS */ | ||
| 292 | #define WM831X_LDO3_UV_STS_MASK 0x0004 /* LDO3_UV_STS */ | ||
| 293 | #define WM831X_LDO3_UV_STS_SHIFT 2 /* LDO3_UV_STS */ | ||
| 294 | #define WM831X_LDO3_UV_STS_WIDTH 1 /* LDO3_UV_STS */ | ||
| 295 | #define WM831X_LDO2_UV_STS 0x0002 /* LDO2_UV_STS */ | ||
| 296 | #define WM831X_LDO2_UV_STS_MASK 0x0002 /* LDO2_UV_STS */ | ||
| 297 | #define WM831X_LDO2_UV_STS_SHIFT 1 /* LDO2_UV_STS */ | ||
| 298 | #define WM831X_LDO2_UV_STS_WIDTH 1 /* LDO2_UV_STS */ | ||
| 299 | #define WM831X_LDO1_UV_STS 0x0001 /* LDO1_UV_STS */ | ||
| 300 | #define WM831X_LDO1_UV_STS_MASK 0x0001 /* LDO1_UV_STS */ | ||
| 301 | #define WM831X_LDO1_UV_STS_SHIFT 0 /* LDO1_UV_STS */ | ||
| 302 | #define WM831X_LDO1_UV_STS_WIDTH 1 /* LDO1_UV_STS */ | ||
| 303 | |||
| 304 | /* | ||
| 305 | * R16470 (0x4056) - DC1 Control 1 | ||
| 306 | */ | ||
| 307 | #define WM831X_DC1_RATE_MASK 0xC000 /* DC1_RATE - [15:14] */ | ||
| 308 | #define WM831X_DC1_RATE_SHIFT 14 /* DC1_RATE - [15:14] */ | ||
| 309 | #define WM831X_DC1_RATE_WIDTH 2 /* DC1_RATE - [15:14] */ | ||
| 310 | #define WM831X_DC1_PHASE 0x1000 /* DC1_PHASE */ | ||
| 311 | #define WM831X_DC1_PHASE_MASK 0x1000 /* DC1_PHASE */ | ||
| 312 | #define WM831X_DC1_PHASE_SHIFT 12 /* DC1_PHASE */ | ||
| 313 | #define WM831X_DC1_PHASE_WIDTH 1 /* DC1_PHASE */ | ||
| 314 | #define WM831X_DC1_FREQ_MASK 0x0300 /* DC1_FREQ - [9:8] */ | ||
| 315 | #define WM831X_DC1_FREQ_SHIFT 8 /* DC1_FREQ - [9:8] */ | ||
| 316 | #define WM831X_DC1_FREQ_WIDTH 2 /* DC1_FREQ - [9:8] */ | ||
| 317 | #define WM831X_DC1_FLT 0x0080 /* DC1_FLT */ | ||
| 318 | #define WM831X_DC1_FLT_MASK 0x0080 /* DC1_FLT */ | ||
| 319 | #define WM831X_DC1_FLT_SHIFT 7 /* DC1_FLT */ | ||
| 320 | #define WM831X_DC1_FLT_WIDTH 1 /* DC1_FLT */ | ||
| 321 | #define WM831X_DC1_SOFT_START_MASK 0x0030 /* DC1_SOFT_START - [5:4] */ | ||
| 322 | #define WM831X_DC1_SOFT_START_SHIFT 4 /* DC1_SOFT_START - [5:4] */ | ||
| 323 | #define WM831X_DC1_SOFT_START_WIDTH 2 /* DC1_SOFT_START - [5:4] */ | ||
| 324 | #define WM831X_DC1_CAP_MASK 0x0003 /* DC1_CAP - [1:0] */ | ||
| 325 | #define WM831X_DC1_CAP_SHIFT 0 /* DC1_CAP - [1:0] */ | ||
| 326 | #define WM831X_DC1_CAP_WIDTH 2 /* DC1_CAP - [1:0] */ | ||
| 327 | |||
| 328 | /* | ||
| 329 | * R16471 (0x4057) - DC1 Control 2 | ||
| 330 | */ | ||
| 331 | #define WM831X_DC1_ERR_ACT_MASK 0xC000 /* DC1_ERR_ACT - [15:14] */ | ||
| 332 | #define WM831X_DC1_ERR_ACT_SHIFT 14 /* DC1_ERR_ACT - [15:14] */ | ||
| 333 | #define WM831X_DC1_ERR_ACT_WIDTH 2 /* DC1_ERR_ACT - [15:14] */ | ||
| 334 | #define WM831X_DC1_HWC_SRC_MASK 0x1800 /* DC1_HWC_SRC - [12:11] */ | ||
| 335 | #define WM831X_DC1_HWC_SRC_SHIFT 11 /* DC1_HWC_SRC - [12:11] */ | ||
| 336 | #define WM831X_DC1_HWC_SRC_WIDTH 2 /* DC1_HWC_SRC - [12:11] */ | ||
| 337 | #define WM831X_DC1_HWC_VSEL 0x0400 /* DC1_HWC_VSEL */ | ||
| 338 | #define WM831X_DC1_HWC_VSEL_MASK 0x0400 /* DC1_HWC_VSEL */ | ||
| 339 | #define WM831X_DC1_HWC_VSEL_SHIFT 10 /* DC1_HWC_VSEL */ | ||
| 340 | #define WM831X_DC1_HWC_VSEL_WIDTH 1 /* DC1_HWC_VSEL */ | ||
| 341 | #define WM831X_DC1_HWC_MODE_MASK 0x0300 /* DC1_HWC_MODE - [9:8] */ | ||
| 342 | #define WM831X_DC1_HWC_MODE_SHIFT 8 /* DC1_HWC_MODE - [9:8] */ | ||
| 343 | #define WM831X_DC1_HWC_MODE_WIDTH 2 /* DC1_HWC_MODE - [9:8] */ | ||
| 344 | #define WM831X_DC1_HC_THR_MASK 0x0070 /* DC1_HC_THR - [6:4] */ | ||
| 345 | #define WM831X_DC1_HC_THR_SHIFT 4 /* DC1_HC_THR - [6:4] */ | ||
| 346 | #define WM831X_DC1_HC_THR_WIDTH 3 /* DC1_HC_THR - [6:4] */ | ||
| 347 | #define WM831X_DC1_HC_IND_ENA 0x0001 /* DC1_HC_IND_ENA */ | ||
| 348 | #define WM831X_DC1_HC_IND_ENA_MASK 0x0001 /* DC1_HC_IND_ENA */ | ||
| 349 | #define WM831X_DC1_HC_IND_ENA_SHIFT 0 /* DC1_HC_IND_ENA */ | ||
| 350 | #define WM831X_DC1_HC_IND_ENA_WIDTH 1 /* DC1_HC_IND_ENA */ | ||
| 351 | |||
| 352 | /* | ||
| 353 | * R16472 (0x4058) - DC1 ON Config | ||
| 354 | */ | ||
| 355 | #define WM831X_DC1_ON_SLOT_MASK 0xE000 /* DC1_ON_SLOT - [15:13] */ | ||
| 356 | #define WM831X_DC1_ON_SLOT_SHIFT 13 /* DC1_ON_SLOT - [15:13] */ | ||
| 357 | #define WM831X_DC1_ON_SLOT_WIDTH 3 /* DC1_ON_SLOT - [15:13] */ | ||
| 358 | #define WM831X_DC1_ON_MODE_MASK 0x0300 /* DC1_ON_MODE - [9:8] */ | ||
| 359 | #define WM831X_DC1_ON_MODE_SHIFT 8 /* DC1_ON_MODE - [9:8] */ | ||
| 360 | #define WM831X_DC1_ON_MODE_WIDTH 2 /* DC1_ON_MODE - [9:8] */ | ||
| 361 | #define WM831X_DC1_ON_VSEL_MASK 0x007F /* DC1_ON_VSEL - [6:0] */ | ||
| 362 | #define WM831X_DC1_ON_VSEL_SHIFT 0 /* DC1_ON_VSEL - [6:0] */ | ||
| 363 | #define WM831X_DC1_ON_VSEL_WIDTH 7 /* DC1_ON_VSEL - [6:0] */ | ||
| 364 | |||
| 365 | /* | ||
| 366 | * R16473 (0x4059) - DC1 SLEEP Control | ||
| 367 | */ | ||
| 368 | #define WM831X_DC1_SLP_SLOT_MASK 0xE000 /* DC1_SLP_SLOT - [15:13] */ | ||
| 369 | #define WM831X_DC1_SLP_SLOT_SHIFT 13 /* DC1_SLP_SLOT - [15:13] */ | ||
| 370 | #define WM831X_DC1_SLP_SLOT_WIDTH 3 /* DC1_SLP_SLOT - [15:13] */ | ||
| 371 | #define WM831X_DC1_SLP_MODE_MASK 0x0300 /* DC1_SLP_MODE - [9:8] */ | ||
| 372 | #define WM831X_DC1_SLP_MODE_SHIFT 8 /* DC1_SLP_MODE - [9:8] */ | ||
| 373 | #define WM831X_DC1_SLP_MODE_WIDTH 2 /* DC1_SLP_MODE - [9:8] */ | ||
| 374 | #define WM831X_DC1_SLP_VSEL_MASK 0x007F /* DC1_SLP_VSEL - [6:0] */ | ||
| 375 | #define WM831X_DC1_SLP_VSEL_SHIFT 0 /* DC1_SLP_VSEL - [6:0] */ | ||
| 376 | #define WM831X_DC1_SLP_VSEL_WIDTH 7 /* DC1_SLP_VSEL - [6:0] */ | ||
| 377 | |||
| 378 | /* | ||
| 379 | * R16474 (0x405A) - DC1 DVS Control | ||
| 380 | */ | ||
| 381 | #define WM831X_DC1_DVS_SRC_MASK 0x1800 /* DC1_DVS_SRC - [12:11] */ | ||
| 382 | #define WM831X_DC1_DVS_SRC_SHIFT 11 /* DC1_DVS_SRC - [12:11] */ | ||
| 383 | #define WM831X_DC1_DVS_SRC_WIDTH 2 /* DC1_DVS_SRC - [12:11] */ | ||
| 384 | #define WM831X_DC1_DVS_VSEL_MASK 0x007F /* DC1_DVS_VSEL - [6:0] */ | ||
| 385 | #define WM831X_DC1_DVS_VSEL_SHIFT 0 /* DC1_DVS_VSEL - [6:0] */ | ||
| 386 | #define WM831X_DC1_DVS_VSEL_WIDTH 7 /* DC1_DVS_VSEL - [6:0] */ | ||
| 387 | |||
| 388 | /* | ||
| 389 | * R16475 (0x405B) - DC2 Control 1 | ||
| 390 | */ | ||
| 391 | #define WM831X_DC2_RATE_MASK 0xC000 /* DC2_RATE - [15:14] */ | ||
| 392 | #define WM831X_DC2_RATE_SHIFT 14 /* DC2_RATE - [15:14] */ | ||
| 393 | #define WM831X_DC2_RATE_WIDTH 2 /* DC2_RATE - [15:14] */ | ||
| 394 | #define WM831X_DC2_PHASE 0x1000 /* DC2_PHASE */ | ||
| 395 | #define WM831X_DC2_PHASE_MASK 0x1000 /* DC2_PHASE */ | ||
| 396 | #define WM831X_DC2_PHASE_SHIFT 12 /* DC2_PHASE */ | ||
| 397 | #define WM831X_DC2_PHASE_WIDTH 1 /* DC2_PHASE */ | ||
| 398 | #define WM831X_DC2_FREQ_MASK 0x0300 /* DC2_FREQ - [9:8] */ | ||
| 399 | #define WM831X_DC2_FREQ_SHIFT 8 /* DC2_FREQ - [9:8] */ | ||
| 400 | #define WM831X_DC2_FREQ_WIDTH 2 /* DC2_FREQ - [9:8] */ | ||
| 401 | #define WM831X_DC2_FLT 0x0080 /* DC2_FLT */ | ||
| 402 | #define WM831X_DC2_FLT_MASK 0x0080 /* DC2_FLT */ | ||
| 403 | #define WM831X_DC2_FLT_SHIFT 7 /* DC2_FLT */ | ||
| 404 | #define WM831X_DC2_FLT_WIDTH 1 /* DC2_FLT */ | ||
| 405 | #define WM831X_DC2_SOFT_START_MASK 0x0030 /* DC2_SOFT_START - [5:4] */ | ||
| 406 | #define WM831X_DC2_SOFT_START_SHIFT 4 /* DC2_SOFT_START - [5:4] */ | ||
| 407 | #define WM831X_DC2_SOFT_START_WIDTH 2 /* DC2_SOFT_START - [5:4] */ | ||
| 408 | #define WM831X_DC2_CAP_MASK 0x0003 /* DC2_CAP - [1:0] */ | ||
| 409 | #define WM831X_DC2_CAP_SHIFT 0 /* DC2_CAP - [1:0] */ | ||
| 410 | #define WM831X_DC2_CAP_WIDTH 2 /* DC2_CAP - [1:0] */ | ||
| 411 | |||
| 412 | /* | ||
| 413 | * R16476 (0x405C) - DC2 Control 2 | ||
| 414 | */ | ||
| 415 | #define WM831X_DC2_ERR_ACT_MASK 0xC000 /* DC2_ERR_ACT - [15:14] */ | ||
| 416 | #define WM831X_DC2_ERR_ACT_SHIFT 14 /* DC2_ERR_ACT - [15:14] */ | ||
| 417 | #define WM831X_DC2_ERR_ACT_WIDTH 2 /* DC2_ERR_ACT - [15:14] */ | ||
| 418 | #define WM831X_DC2_HWC_SRC_MASK 0x1800 /* DC2_HWC_SRC - [12:11] */ | ||
| 419 | #define WM831X_DC2_HWC_SRC_SHIFT 11 /* DC2_HWC_SRC - [12:11] */ | ||
| 420 | #define WM831X_DC2_HWC_SRC_WIDTH 2 /* DC2_HWC_SRC - [12:11] */ | ||
| 421 | #define WM831X_DC2_HWC_VSEL 0x0400 /* DC2_HWC_VSEL */ | ||
| 422 | #define WM831X_DC2_HWC_VSEL_MASK 0x0400 /* DC2_HWC_VSEL */ | ||
| 423 | #define WM831X_DC2_HWC_VSEL_SHIFT 10 /* DC2_HWC_VSEL */ | ||
| 424 | #define WM831X_DC2_HWC_VSEL_WIDTH 1 /* DC2_HWC_VSEL */ | ||
| 425 | #define WM831X_DC2_HWC_MODE_MASK 0x0300 /* DC2_HWC_MODE - [9:8] */ | ||
| 426 | #define WM831X_DC2_HWC_MODE_SHIFT 8 /* DC2_HWC_MODE - [9:8] */ | ||
| 427 | #define WM831X_DC2_HWC_MODE_WIDTH 2 /* DC2_HWC_MODE - [9:8] */ | ||
| 428 | #define WM831X_DC2_HC_THR_MASK 0x0070 /* DC2_HC_THR - [6:4] */ | ||
| 429 | #define WM831X_DC2_HC_THR_SHIFT 4 /* DC2_HC_THR - [6:4] */ | ||
| 430 | #define WM831X_DC2_HC_THR_WIDTH 3 /* DC2_HC_THR - [6:4] */ | ||
| 431 | #define WM831X_DC2_HC_IND_ENA 0x0001 /* DC2_HC_IND_ENA */ | ||
| 432 | #define WM831X_DC2_HC_IND_ENA_MASK 0x0001 /* DC2_HC_IND_ENA */ | ||
| 433 | #define WM831X_DC2_HC_IND_ENA_SHIFT 0 /* DC2_HC_IND_ENA */ | ||
| 434 | #define WM831X_DC2_HC_IND_ENA_WIDTH 1 /* DC2_HC_IND_ENA */ | ||
| 435 | |||
| 436 | /* | ||
| 437 | * R16477 (0x405D) - DC2 ON Config | ||
| 438 | */ | ||
| 439 | #define WM831X_DC2_ON_SLOT_MASK 0xE000 /* DC2_ON_SLOT - [15:13] */ | ||
| 440 | #define WM831X_DC2_ON_SLOT_SHIFT 13 /* DC2_ON_SLOT - [15:13] */ | ||
| 441 | #define WM831X_DC2_ON_SLOT_WIDTH 3 /* DC2_ON_SLOT - [15:13] */ | ||
| 442 | #define WM831X_DC2_ON_MODE_MASK 0x0300 /* DC2_ON_MODE - [9:8] */ | ||
| 443 | #define WM831X_DC2_ON_MODE_SHIFT 8 /* DC2_ON_MODE - [9:8] */ | ||
| 444 | #define WM831X_DC2_ON_MODE_WIDTH 2 /* DC2_ON_MODE - [9:8] */ | ||
| 445 | #define WM831X_DC2_ON_VSEL_MASK 0x007F /* DC2_ON_VSEL - [6:0] */ | ||
| 446 | #define WM831X_DC2_ON_VSEL_SHIFT 0 /* DC2_ON_VSEL - [6:0] */ | ||
| 447 | #define WM831X_DC2_ON_VSEL_WIDTH 7 /* DC2_ON_VSEL - [6:0] */ | ||
| 448 | |||
| 449 | /* | ||
| 450 | * R16478 (0x405E) - DC2 SLEEP Control | ||
| 451 | */ | ||
| 452 | #define WM831X_DC2_SLP_SLOT_MASK 0xE000 /* DC2_SLP_SLOT - [15:13] */ | ||
| 453 | #define WM831X_DC2_SLP_SLOT_SHIFT 13 /* DC2_SLP_SLOT - [15:13] */ | ||
| 454 | #define WM831X_DC2_SLP_SLOT_WIDTH 3 /* DC2_SLP_SLOT - [15:13] */ | ||
| 455 | #define WM831X_DC2_SLP_MODE_MASK 0x0300 /* DC2_SLP_MODE - [9:8] */ | ||
| 456 | #define WM831X_DC2_SLP_MODE_SHIFT 8 /* DC2_SLP_MODE - [9:8] */ | ||
| 457 | #define WM831X_DC2_SLP_MODE_WIDTH 2 /* DC2_SLP_MODE - [9:8] */ | ||
| 458 | #define WM831X_DC2_SLP_VSEL_MASK 0x007F /* DC2_SLP_VSEL - [6:0] */ | ||
| 459 | #define WM831X_DC2_SLP_VSEL_SHIFT 0 /* DC2_SLP_VSEL - [6:0] */ | ||
| 460 | #define WM831X_DC2_SLP_VSEL_WIDTH 7 /* DC2_SLP_VSEL - [6:0] */ | ||
| 461 | |||
| 462 | /* | ||
| 463 | * R16479 (0x405F) - DC2 DVS Control | ||
| 464 | */ | ||
| 465 | #define WM831X_DC2_DVS_SRC_MASK 0x1800 /* DC2_DVS_SRC - [12:11] */ | ||
| 466 | #define WM831X_DC2_DVS_SRC_SHIFT 11 /* DC2_DVS_SRC - [12:11] */ | ||
| 467 | #define WM831X_DC2_DVS_SRC_WIDTH 2 /* DC2_DVS_SRC - [12:11] */ | ||
| 468 | #define WM831X_DC2_DVS_VSEL_MASK 0x007F /* DC2_DVS_VSEL - [6:0] */ | ||
| 469 | #define WM831X_DC2_DVS_VSEL_SHIFT 0 /* DC2_DVS_VSEL - [6:0] */ | ||
| 470 | #define WM831X_DC2_DVS_VSEL_WIDTH 7 /* DC2_DVS_VSEL - [6:0] */ | ||
| 471 | |||
| 472 | /* | ||
| 473 | * R16480 (0x4060) - DC3 Control 1 | ||
| 474 | */ | ||
| 475 | #define WM831X_DC3_PHASE 0x1000 /* DC3_PHASE */ | ||
| 476 | #define WM831X_DC3_PHASE_MASK 0x1000 /* DC3_PHASE */ | ||
| 477 | #define WM831X_DC3_PHASE_SHIFT 12 /* DC3_PHASE */ | ||
| 478 | #define WM831X_DC3_PHASE_WIDTH 1 /* DC3_PHASE */ | ||
| 479 | #define WM831X_DC3_FLT 0x0080 /* DC3_FLT */ | ||
| 480 | #define WM831X_DC3_FLT_MASK 0x0080 /* DC3_FLT */ | ||
| 481 | #define WM831X_DC3_FLT_SHIFT 7 /* DC3_FLT */ | ||
| 482 | #define WM831X_DC3_FLT_WIDTH 1 /* DC3_FLT */ | ||
| 483 | #define WM831X_DC3_SOFT_START_MASK 0x0030 /* DC3_SOFT_START - [5:4] */ | ||
| 484 | #define WM831X_DC3_SOFT_START_SHIFT 4 /* DC3_SOFT_START - [5:4] */ | ||
| 485 | #define WM831X_DC3_SOFT_START_WIDTH 2 /* DC3_SOFT_START - [5:4] */ | ||
| 486 | #define WM831X_DC3_STNBY_LIM_MASK 0x000C /* DC3_STNBY_LIM - [3:2] */ | ||
| 487 | #define WM831X_DC3_STNBY_LIM_SHIFT 2 /* DC3_STNBY_LIM - [3:2] */ | ||
| 488 | #define WM831X_DC3_STNBY_LIM_WIDTH 2 /* DC3_STNBY_LIM - [3:2] */ | ||
| 489 | #define WM831X_DC3_CAP_MASK 0x0003 /* DC3_CAP - [1:0] */ | ||
| 490 | #define WM831X_DC3_CAP_SHIFT 0 /* DC3_CAP - [1:0] */ | ||
| 491 | #define WM831X_DC3_CAP_WIDTH 2 /* DC3_CAP - [1:0] */ | ||
| 492 | |||
| 493 | /* | ||
| 494 | * R16481 (0x4061) - DC3 Control 2 | ||
| 495 | */ | ||
| 496 | #define WM831X_DC3_ERR_ACT_MASK 0xC000 /* DC3_ERR_ACT - [15:14] */ | ||
| 497 | #define WM831X_DC3_ERR_ACT_SHIFT 14 /* DC3_ERR_ACT - [15:14] */ | ||
| 498 | #define WM831X_DC3_ERR_ACT_WIDTH 2 /* DC3_ERR_ACT - [15:14] */ | ||
| 499 | #define WM831X_DC3_HWC_SRC_MASK 0x1800 /* DC3_HWC_SRC - [12:11] */ | ||
| 500 | #define WM831X_DC3_HWC_SRC_SHIFT 11 /* DC3_HWC_SRC - [12:11] */ | ||
| 501 | #define WM831X_DC3_HWC_SRC_WIDTH 2 /* DC3_HWC_SRC - [12:11] */ | ||
| 502 | #define WM831X_DC3_HWC_VSEL 0x0400 /* DC3_HWC_VSEL */ | ||
| 503 | #define WM831X_DC3_HWC_VSEL_MASK 0x0400 /* DC3_HWC_VSEL */ | ||
| 504 | #define WM831X_DC3_HWC_VSEL_SHIFT 10 /* DC3_HWC_VSEL */ | ||
| 505 | #define WM831X_DC3_HWC_VSEL_WIDTH 1 /* DC3_HWC_VSEL */ | ||
| 506 | #define WM831X_DC3_HWC_MODE_MASK 0x0300 /* DC3_HWC_MODE - [9:8] */ | ||
| 507 | #define WM831X_DC3_HWC_MODE_SHIFT 8 /* DC3_HWC_MODE - [9:8] */ | ||
| 508 | #define WM831X_DC3_HWC_MODE_WIDTH 2 /* DC3_HWC_MODE - [9:8] */ | ||
| 509 | #define WM831X_DC3_OVP 0x0080 /* DC3_OVP */ | ||
| 510 | #define WM831X_DC3_OVP_MASK 0x0080 /* DC3_OVP */ | ||
| 511 | #define WM831X_DC3_OVP_SHIFT 7 /* DC3_OVP */ | ||
| 512 | #define WM831X_DC3_OVP_WIDTH 1 /* DC3_OVP */ | ||
| 513 | |||
| 514 | /* | ||
| 515 | * R16482 (0x4062) - DC3 ON Config | ||
| 516 | */ | ||
| 517 | #define WM831X_DC3_ON_SLOT_MASK 0xE000 /* DC3_ON_SLOT - [15:13] */ | ||
| 518 | #define WM831X_DC3_ON_SLOT_SHIFT 13 /* DC3_ON_SLOT - [15:13] */ | ||
| 519 | #define WM831X_DC3_ON_SLOT_WIDTH 3 /* DC3_ON_SLOT - [15:13] */ | ||
| 520 | #define WM831X_DC3_ON_MODE_MASK 0x0300 /* DC3_ON_MODE - [9:8] */ | ||
| 521 | #define WM831X_DC3_ON_MODE_SHIFT 8 /* DC3_ON_MODE - [9:8] */ | ||
| 522 | #define WM831X_DC3_ON_MODE_WIDTH 2 /* DC3_ON_MODE - [9:8] */ | ||
| 523 | #define WM831X_DC3_ON_VSEL_MASK 0x007F /* DC3_ON_VSEL - [6:0] */ | ||
| 524 | #define WM831X_DC3_ON_VSEL_SHIFT 0 /* DC3_ON_VSEL - [6:0] */ | ||
| 525 | #define WM831X_DC3_ON_VSEL_WIDTH 7 /* DC3_ON_VSEL - [6:0] */ | ||
| 526 | |||
| 527 | /* | ||
| 528 | * R16483 (0x4063) - DC3 SLEEP Control | ||
| 529 | */ | ||
| 530 | #define WM831X_DC3_SLP_SLOT_MASK 0xE000 /* DC3_SLP_SLOT - [15:13] */ | ||
| 531 | #define WM831X_DC3_SLP_SLOT_SHIFT 13 /* DC3_SLP_SLOT - [15:13] */ | ||
| 532 | #define WM831X_DC3_SLP_SLOT_WIDTH 3 /* DC3_SLP_SLOT - [15:13] */ | ||
| 533 | #define WM831X_DC3_SLP_MODE_MASK 0x0300 /* DC3_SLP_MODE - [9:8] */ | ||
| 534 | #define WM831X_DC3_SLP_MODE_SHIFT 8 /* DC3_SLP_MODE - [9:8] */ | ||
| 535 | #define WM831X_DC3_SLP_MODE_WIDTH 2 /* DC3_SLP_MODE - [9:8] */ | ||
| 536 | #define WM831X_DC3_SLP_VSEL_MASK 0x007F /* DC3_SLP_VSEL - [6:0] */ | ||
| 537 | #define WM831X_DC3_SLP_VSEL_SHIFT 0 /* DC3_SLP_VSEL - [6:0] */ | ||
| 538 | #define WM831X_DC3_SLP_VSEL_WIDTH 7 /* DC3_SLP_VSEL - [6:0] */ | ||
| 539 | |||
| 540 | /* | ||
| 541 | * R16484 (0x4064) - DC4 Control | ||
| 542 | */ | ||
| 543 | #define WM831X_DC4_ERR_ACT_MASK 0xC000 /* DC4_ERR_ACT - [15:14] */ | ||
| 544 | #define WM831X_DC4_ERR_ACT_SHIFT 14 /* DC4_ERR_ACT - [15:14] */ | ||
| 545 | #define WM831X_DC4_ERR_ACT_WIDTH 2 /* DC4_ERR_ACT - [15:14] */ | ||
| 546 | #define WM831X_DC4_HWC_SRC_MASK 0x1800 /* DC4_HWC_SRC - [12:11] */ | ||
| 547 | #define WM831X_DC4_HWC_SRC_SHIFT 11 /* DC4_HWC_SRC - [12:11] */ | ||
| 548 | #define WM831X_DC4_HWC_SRC_WIDTH 2 /* DC4_HWC_SRC - [12:11] */ | ||
| 549 | #define WM831X_DC4_HWC_MODE 0x0100 /* DC4_HWC_MODE */ | ||
| 550 | #define WM831X_DC4_HWC_MODE_MASK 0x0100 /* DC4_HWC_MODE */ | ||
| 551 | #define WM831X_DC4_HWC_MODE_SHIFT 8 /* DC4_HWC_MODE */ | ||
| 552 | #define WM831X_DC4_HWC_MODE_WIDTH 1 /* DC4_HWC_MODE */ | ||
| 553 | #define WM831X_DC4_RANGE_MASK 0x000C /* DC4_RANGE - [3:2] */ | ||
| 554 | #define WM831X_DC4_RANGE_SHIFT 2 /* DC4_RANGE - [3:2] */ | ||
| 555 | #define WM831X_DC4_RANGE_WIDTH 2 /* DC4_RANGE - [3:2] */ | ||
| 556 | #define WM831X_DC4_FBSRC 0x0001 /* DC4_FBSRC */ | ||
| 557 | #define WM831X_DC4_FBSRC_MASK 0x0001 /* DC4_FBSRC */ | ||
| 558 | #define WM831X_DC4_FBSRC_SHIFT 0 /* DC4_FBSRC */ | ||
| 559 | #define WM831X_DC4_FBSRC_WIDTH 1 /* DC4_FBSRC */ | ||
| 560 | |||
| 561 | /* | ||
| 562 | * R16485 (0x4065) - DC4 SLEEP Control | ||
| 563 | */ | ||
| 564 | #define WM831X_DC4_SLPENA 0x0100 /* DC4_SLPENA */ | ||
| 565 | #define WM831X_DC4_SLPENA_MASK 0x0100 /* DC4_SLPENA */ | ||
| 566 | #define WM831X_DC4_SLPENA_SHIFT 8 /* DC4_SLPENA */ | ||
| 567 | #define WM831X_DC4_SLPENA_WIDTH 1 /* DC4_SLPENA */ | ||
| 568 | |||
| 569 | /* | ||
| 570 | * R16488 (0x4068) - LDO1 Control | ||
| 571 | */ | ||
| 572 | #define WM831X_LDO1_ERR_ACT_MASK 0xC000 /* LDO1_ERR_ACT - [15:14] */ | ||
| 573 | #define WM831X_LDO1_ERR_ACT_SHIFT 14 /* LDO1_ERR_ACT - [15:14] */ | ||
| 574 | #define WM831X_LDO1_ERR_ACT_WIDTH 2 /* LDO1_ERR_ACT - [15:14] */ | ||
| 575 | #define WM831X_LDO1_HWC_SRC_MASK 0x1800 /* LDO1_HWC_SRC - [12:11] */ | ||
| 576 | #define WM831X_LDO1_HWC_SRC_SHIFT 11 /* LDO1_HWC_SRC - [12:11] */ | ||
| 577 | #define WM831X_LDO1_HWC_SRC_WIDTH 2 /* LDO1_HWC_SRC - [12:11] */ | ||
| 578 | #define WM831X_LDO1_HWC_VSEL 0x0400 /* LDO1_HWC_VSEL */ | ||
| 579 | #define WM831X_LDO1_HWC_VSEL_MASK 0x0400 /* LDO1_HWC_VSEL */ | ||
| 580 | #define WM831X_LDO1_HWC_VSEL_SHIFT 10 /* LDO1_HWC_VSEL */ | ||
| 581 | #define WM831X_LDO1_HWC_VSEL_WIDTH 1 /* LDO1_HWC_VSEL */ | ||
| 582 | #define WM831X_LDO1_HWC_MODE_MASK 0x0300 /* LDO1_HWC_MODE - [9:8] */ | ||
| 583 | #define WM831X_LDO1_HWC_MODE_SHIFT 8 /* LDO1_HWC_MODE - [9:8] */ | ||
| 584 | #define WM831X_LDO1_HWC_MODE_WIDTH 2 /* LDO1_HWC_MODE - [9:8] */ | ||
| 585 | #define WM831X_LDO1_FLT 0x0080 /* LDO1_FLT */ | ||
| 586 | #define WM831X_LDO1_FLT_MASK 0x0080 /* LDO1_FLT */ | ||
| 587 | #define WM831X_LDO1_FLT_SHIFT 7 /* LDO1_FLT */ | ||
| 588 | #define WM831X_LDO1_FLT_WIDTH 1 /* LDO1_FLT */ | ||
| 589 | #define WM831X_LDO1_SWI 0x0040 /* LDO1_SWI */ | ||
| 590 | #define WM831X_LDO1_SWI_MASK 0x0040 /* LDO1_SWI */ | ||
| 591 | #define WM831X_LDO1_SWI_SHIFT 6 /* LDO1_SWI */ | ||
| 592 | #define WM831X_LDO1_SWI_WIDTH 1 /* LDO1_SWI */ | ||
| 593 | #define WM831X_LDO1_LP_MODE 0x0001 /* LDO1_LP_MODE */ | ||
| 594 | #define WM831X_LDO1_LP_MODE_MASK 0x0001 /* LDO1_LP_MODE */ | ||
| 595 | #define WM831X_LDO1_LP_MODE_SHIFT 0 /* LDO1_LP_MODE */ | ||
| 596 | #define WM831X_LDO1_LP_MODE_WIDTH 1 /* LDO1_LP_MODE */ | ||
| 597 | |||
| 598 | /* | ||
| 599 | * R16489 (0x4069) - LDO1 ON Control | ||
| 600 | */ | ||
| 601 | #define WM831X_LDO1_ON_SLOT_MASK 0xE000 /* LDO1_ON_SLOT - [15:13] */ | ||
| 602 | #define WM831X_LDO1_ON_SLOT_SHIFT 13 /* LDO1_ON_SLOT - [15:13] */ | ||
| 603 | #define WM831X_LDO1_ON_SLOT_WIDTH 3 /* LDO1_ON_SLOT - [15:13] */ | ||
| 604 | #define WM831X_LDO1_ON_MODE 0x0100 /* LDO1_ON_MODE */ | ||
| 605 | #define WM831X_LDO1_ON_MODE_MASK 0x0100 /* LDO1_ON_MODE */ | ||
| 606 | #define WM831X_LDO1_ON_MODE_SHIFT 8 /* LDO1_ON_MODE */ | ||
| 607 | #define WM831X_LDO1_ON_MODE_WIDTH 1 /* LDO1_ON_MODE */ | ||
| 608 | #define WM831X_LDO1_ON_VSEL_MASK 0x001F /* LDO1_ON_VSEL - [4:0] */ | ||
| 609 | #define WM831X_LDO1_ON_VSEL_SHIFT 0 /* LDO1_ON_VSEL - [4:0] */ | ||
| 610 | #define WM831X_LDO1_ON_VSEL_WIDTH 5 /* LDO1_ON_VSEL - [4:0] */ | ||
| 611 | |||
| 612 | /* | ||
| 613 | * R16490 (0x406A) - LDO1 SLEEP Control | ||
| 614 | */ | ||
| 615 | #define WM831X_LDO1_SLP_SLOT_MASK 0xE000 /* LDO1_SLP_SLOT - [15:13] */ | ||
| 616 | #define WM831X_LDO1_SLP_SLOT_SHIFT 13 /* LDO1_SLP_SLOT - [15:13] */ | ||
| 617 | #define WM831X_LDO1_SLP_SLOT_WIDTH 3 /* LDO1_SLP_SLOT - [15:13] */ | ||
| 618 | #define WM831X_LDO1_SLP_MODE 0x0100 /* LDO1_SLP_MODE */ | ||
| 619 | #define WM831X_LDO1_SLP_MODE_MASK 0x0100 /* LDO1_SLP_MODE */ | ||
| 620 | #define WM831X_LDO1_SLP_MODE_SHIFT 8 /* LDO1_SLP_MODE */ | ||
| 621 | #define WM831X_LDO1_SLP_MODE_WIDTH 1 /* LDO1_SLP_MODE */ | ||
| 622 | #define WM831X_LDO1_SLP_VSEL_MASK 0x001F /* LDO1_SLP_VSEL - [4:0] */ | ||
| 623 | #define WM831X_LDO1_SLP_VSEL_SHIFT 0 /* LDO1_SLP_VSEL - [4:0] */ | ||
| 624 | #define WM831X_LDO1_SLP_VSEL_WIDTH 5 /* LDO1_SLP_VSEL - [4:0] */ | ||
| 625 | |||
| 626 | /* | ||
| 627 | * R16491 (0x406B) - LDO2 Control | ||
| 628 | */ | ||
| 629 | #define WM831X_LDO2_ERR_ACT_MASK 0xC000 /* LDO2_ERR_ACT - [15:14] */ | ||
| 630 | #define WM831X_LDO2_ERR_ACT_SHIFT 14 /* LDO2_ERR_ACT - [15:14] */ | ||
| 631 | #define WM831X_LDO2_ERR_ACT_WIDTH 2 /* LDO2_ERR_ACT - [15:14] */ | ||
| 632 | #define WM831X_LDO2_HWC_SRC_MASK 0x1800 /* LDO2_HWC_SRC - [12:11] */ | ||
| 633 | #define WM831X_LDO2_HWC_SRC_SHIFT 11 /* LDO2_HWC_SRC - [12:11] */ | ||
| 634 | #define WM831X_LDO2_HWC_SRC_WIDTH 2 /* LDO2_HWC_SRC - [12:11] */ | ||
| 635 | #define WM831X_LDO2_HWC_VSEL 0x0400 /* LDO2_HWC_VSEL */ | ||
| 636 | #define WM831X_LDO2_HWC_VSEL_MASK 0x0400 /* LDO2_HWC_VSEL */ | ||
| 637 | #define WM831X_LDO2_HWC_VSEL_SHIFT 10 /* LDO2_HWC_VSEL */ | ||
| 638 | #define WM831X_LDO2_HWC_VSEL_WIDTH 1 /* LDO2_HWC_VSEL */ | ||
| 639 | #define WM831X_LDO2_HWC_MODE_MASK 0x0300 /* LDO2_HWC_MODE - [9:8] */ | ||
| 640 | #define WM831X_LDO2_HWC_MODE_SHIFT 8 /* LDO2_HWC_MODE - [9:8] */ | ||
| 641 | #define WM831X_LDO2_HWC_MODE_WIDTH 2 /* LDO2_HWC_MODE - [9:8] */ | ||
| 642 | #define WM831X_LDO2_FLT 0x0080 /* LDO2_FLT */ | ||
| 643 | #define WM831X_LDO2_FLT_MASK 0x0080 /* LDO2_FLT */ | ||
| 644 | #define WM831X_LDO2_FLT_SHIFT 7 /* LDO2_FLT */ | ||
| 645 | #define WM831X_LDO2_FLT_WIDTH 1 /* LDO2_FLT */ | ||
| 646 | #define WM831X_LDO2_SWI 0x0040 /* LDO2_SWI */ | ||
| 647 | #define WM831X_LDO2_SWI_MASK 0x0040 /* LDO2_SWI */ | ||
| 648 | #define WM831X_LDO2_SWI_SHIFT 6 /* LDO2_SWI */ | ||
| 649 | #define WM831X_LDO2_SWI_WIDTH 1 /* LDO2_SWI */ | ||
| 650 | #define WM831X_LDO2_LP_MODE 0x0001 /* LDO2_LP_MODE */ | ||
| 651 | #define WM831X_LDO2_LP_MODE_MASK 0x0001 /* LDO2_LP_MODE */ | ||
| 652 | #define WM831X_LDO2_LP_MODE_SHIFT 0 /* LDO2_LP_MODE */ | ||
| 653 | #define WM831X_LDO2_LP_MODE_WIDTH 1 /* LDO2_LP_MODE */ | ||
| 654 | |||
| 655 | /* | ||
| 656 | * R16492 (0x406C) - LDO2 ON Control | ||
| 657 | */ | ||
| 658 | #define WM831X_LDO2_ON_SLOT_MASK 0xE000 /* LDO2_ON_SLOT - [15:13] */ | ||
| 659 | #define WM831X_LDO2_ON_SLOT_SHIFT 13 /* LDO2_ON_SLOT - [15:13] */ | ||
| 660 | #define WM831X_LDO2_ON_SLOT_WIDTH 3 /* LDO2_ON_SLOT - [15:13] */ | ||
| 661 | #define WM831X_LDO2_ON_MODE 0x0100 /* LDO2_ON_MODE */ | ||
| 662 | #define WM831X_LDO2_ON_MODE_MASK 0x0100 /* LDO2_ON_MODE */ | ||
| 663 | #define WM831X_LDO2_ON_MODE_SHIFT 8 /* LDO2_ON_MODE */ | ||
| 664 | #define WM831X_LDO2_ON_MODE_WIDTH 1 /* LDO2_ON_MODE */ | ||
| 665 | #define WM831X_LDO2_ON_VSEL_MASK 0x001F /* LDO2_ON_VSEL - [4:0] */ | ||
| 666 | #define WM831X_LDO2_ON_VSEL_SHIFT 0 /* LDO2_ON_VSEL - [4:0] */ | ||
| 667 | #define WM831X_LDO2_ON_VSEL_WIDTH 5 /* LDO2_ON_VSEL - [4:0] */ | ||
| 668 | |||
| 669 | /* | ||
| 670 | * R16493 (0x406D) - LDO2 SLEEP Control | ||
| 671 | */ | ||
| 672 | #define WM831X_LDO2_SLP_SLOT_MASK 0xE000 /* LDO2_SLP_SLOT - [15:13] */ | ||
| 673 | #define WM831X_LDO2_SLP_SLOT_SHIFT 13 /* LDO2_SLP_SLOT - [15:13] */ | ||
| 674 | #define WM831X_LDO2_SLP_SLOT_WIDTH 3 /* LDO2_SLP_SLOT - [15:13] */ | ||
| 675 | #define WM831X_LDO2_SLP_MODE 0x0100 /* LDO2_SLP_MODE */ | ||
| 676 | #define WM831X_LDO2_SLP_MODE_MASK 0x0100 /* LDO2_SLP_MODE */ | ||
| 677 | #define WM831X_LDO2_SLP_MODE_SHIFT 8 /* LDO2_SLP_MODE */ | ||
| 678 | #define WM831X_LDO2_SLP_MODE_WIDTH 1 /* LDO2_SLP_MODE */ | ||
| 679 | #define WM831X_LDO2_SLP_VSEL_MASK 0x001F /* LDO2_SLP_VSEL - [4:0] */ | ||
| 680 | #define WM831X_LDO2_SLP_VSEL_SHIFT 0 /* LDO2_SLP_VSEL - [4:0] */ | ||
| 681 | #define WM831X_LDO2_SLP_VSEL_WIDTH 5 /* LDO2_SLP_VSEL - [4:0] */ | ||
| 682 | |||
| 683 | /* | ||
| 684 | * R16494 (0x406E) - LDO3 Control | ||
| 685 | */ | ||
| 686 | #define WM831X_LDO3_ERR_ACT_MASK 0xC000 /* LDO3_ERR_ACT - [15:14] */ | ||
| 687 | #define WM831X_LDO3_ERR_ACT_SHIFT 14 /* LDO3_ERR_ACT - [15:14] */ | ||
| 688 | #define WM831X_LDO3_ERR_ACT_WIDTH 2 /* LDO3_ERR_ACT - [15:14] */ | ||
| 689 | #define WM831X_LDO3_HWC_SRC_MASK 0x1800 /* LDO3_HWC_SRC - [12:11] */ | ||
| 690 | #define WM831X_LDO3_HWC_SRC_SHIFT 11 /* LDO3_HWC_SRC - [12:11] */ | ||
| 691 | #define WM831X_LDO3_HWC_SRC_WIDTH 2 /* LDO3_HWC_SRC - [12:11] */ | ||
| 692 | #define WM831X_LDO3_HWC_VSEL 0x0400 /* LDO3_HWC_VSEL */ | ||
| 693 | #define WM831X_LDO3_HWC_VSEL_MASK 0x0400 /* LDO3_HWC_VSEL */ | ||
| 694 | #define WM831X_LDO3_HWC_VSEL_SHIFT 10 /* LDO3_HWC_VSEL */ | ||
| 695 | #define WM831X_LDO3_HWC_VSEL_WIDTH 1 /* LDO3_HWC_VSEL */ | ||
| 696 | #define WM831X_LDO3_HWC_MODE_MASK 0x0300 /* LDO3_HWC_MODE - [9:8] */ | ||
| 697 | #define WM831X_LDO3_HWC_MODE_SHIFT 8 /* LDO3_HWC_MODE - [9:8] */ | ||
| 698 | #define WM831X_LDO3_HWC_MODE_WIDTH 2 /* LDO3_HWC_MODE - [9:8] */ | ||
| 699 | #define WM831X_LDO3_FLT 0x0080 /* LDO3_FLT */ | ||
| 700 | #define WM831X_LDO3_FLT_MASK 0x0080 /* LDO3_FLT */ | ||
| 701 | #define WM831X_LDO3_FLT_SHIFT 7 /* LDO3_FLT */ | ||
| 702 | #define WM831X_LDO3_FLT_WIDTH 1 /* LDO3_FLT */ | ||
| 703 | #define WM831X_LDO3_SWI 0x0040 /* LDO3_SWI */ | ||
| 704 | #define WM831X_LDO3_SWI_MASK 0x0040 /* LDO3_SWI */ | ||
| 705 | #define WM831X_LDO3_SWI_SHIFT 6 /* LDO3_SWI */ | ||
| 706 | #define WM831X_LDO3_SWI_WIDTH 1 /* LDO3_SWI */ | ||
| 707 | #define WM831X_LDO3_LP_MODE 0x0001 /* LDO3_LP_MODE */ | ||
| 708 | #define WM831X_LDO3_LP_MODE_MASK 0x0001 /* LDO3_LP_MODE */ | ||
| 709 | #define WM831X_LDO3_LP_MODE_SHIFT 0 /* LDO3_LP_MODE */ | ||
| 710 | #define WM831X_LDO3_LP_MODE_WIDTH 1 /* LDO3_LP_MODE */ | ||
| 711 | |||
| 712 | /* | ||
| 713 | * R16495 (0x406F) - LDO3 ON Control | ||
| 714 | */ | ||
| 715 | #define WM831X_LDO3_ON_SLOT_MASK 0xE000 /* LDO3_ON_SLOT - [15:13] */ | ||
| 716 | #define WM831X_LDO3_ON_SLOT_SHIFT 13 /* LDO3_ON_SLOT - [15:13] */ | ||
| 717 | #define WM831X_LDO3_ON_SLOT_WIDTH 3 /* LDO3_ON_SLOT - [15:13] */ | ||
| 718 | #define WM831X_LDO3_ON_MODE 0x0100 /* LDO3_ON_MODE */ | ||
| 719 | #define WM831X_LDO3_ON_MODE_MASK 0x0100 /* LDO3_ON_MODE */ | ||
| 720 | #define WM831X_LDO3_ON_MODE_SHIFT 8 /* LDO3_ON_MODE */ | ||
| 721 | #define WM831X_LDO3_ON_MODE_WIDTH 1 /* LDO3_ON_MODE */ | ||
| 722 | #define WM831X_LDO3_ON_VSEL_MASK 0x001F /* LDO3_ON_VSEL - [4:0] */ | ||
| 723 | #define WM831X_LDO3_ON_VSEL_SHIFT 0 /* LDO3_ON_VSEL - [4:0] */ | ||
| 724 | #define WM831X_LDO3_ON_VSEL_WIDTH 5 /* LDO3_ON_VSEL - [4:0] */ | ||
| 725 | |||
| 726 | /* | ||
| 727 | * R16496 (0x4070) - LDO3 SLEEP Control | ||
| 728 | */ | ||
| 729 | #define WM831X_LDO3_SLP_SLOT_MASK 0xE000 /* LDO3_SLP_SLOT - [15:13] */ | ||
| 730 | #define WM831X_LDO3_SLP_SLOT_SHIFT 13 /* LDO3_SLP_SLOT - [15:13] */ | ||
| 731 | #define WM831X_LDO3_SLP_SLOT_WIDTH 3 /* LDO3_SLP_SLOT - [15:13] */ | ||
| 732 | #define WM831X_LDO3_SLP_MODE 0x0100 /* LDO3_SLP_MODE */ | ||
| 733 | #define WM831X_LDO3_SLP_MODE_MASK 0x0100 /* LDO3_SLP_MODE */ | ||
| 734 | #define WM831X_LDO3_SLP_MODE_SHIFT 8 /* LDO3_SLP_MODE */ | ||
| 735 | #define WM831X_LDO3_SLP_MODE_WIDTH 1 /* LDO3_SLP_MODE */ | ||
| 736 | #define WM831X_LDO3_SLP_VSEL_MASK 0x001F /* LDO3_SLP_VSEL - [4:0] */ | ||
| 737 | #define WM831X_LDO3_SLP_VSEL_SHIFT 0 /* LDO3_SLP_VSEL - [4:0] */ | ||
| 738 | #define WM831X_LDO3_SLP_VSEL_WIDTH 5 /* LDO3_SLP_VSEL - [4:0] */ | ||
| 739 | |||
| 740 | /* | ||
| 741 | * R16497 (0x4071) - LDO4 Control | ||
| 742 | */ | ||
| 743 | #define WM831X_LDO4_ERR_ACT_MASK 0xC000 /* LDO4_ERR_ACT - [15:14] */ | ||
| 744 | #define WM831X_LDO4_ERR_ACT_SHIFT 14 /* LDO4_ERR_ACT - [15:14] */ | ||
| 745 | #define WM831X_LDO4_ERR_ACT_WIDTH 2 /* LDO4_ERR_ACT - [15:14] */ | ||
| 746 | #define WM831X_LDO4_HWC_SRC_MASK 0x1800 /* LDO4_HWC_SRC - [12:11] */ | ||
| 747 | #define WM831X_LDO4_HWC_SRC_SHIFT 11 /* LDO4_HWC_SRC - [12:11] */ | ||
| 748 | #define WM831X_LDO4_HWC_SRC_WIDTH 2 /* LDO4_HWC_SRC - [12:11] */ | ||
| 749 | #define WM831X_LDO4_HWC_VSEL 0x0400 /* LDO4_HWC_VSEL */ | ||
| 750 | #define WM831X_LDO4_HWC_VSEL_MASK 0x0400 /* LDO4_HWC_VSEL */ | ||
| 751 | #define WM831X_LDO4_HWC_VSEL_SHIFT 10 /* LDO4_HWC_VSEL */ | ||
| 752 | #define WM831X_LDO4_HWC_VSEL_WIDTH 1 /* LDO4_HWC_VSEL */ | ||
| 753 | #define WM831X_LDO4_HWC_MODE_MASK 0x0300 /* LDO4_HWC_MODE - [9:8] */ | ||
| 754 | #define WM831X_LDO4_HWC_MODE_SHIFT 8 /* LDO4_HWC_MODE - [9:8] */ | ||
| 755 | #define WM831X_LDO4_HWC_MODE_WIDTH 2 /* LDO4_HWC_MODE - [9:8] */ | ||
| 756 | #define WM831X_LDO4_FLT 0x0080 /* LDO4_FLT */ | ||
| 757 | #define WM831X_LDO4_FLT_MASK 0x0080 /* LDO4_FLT */ | ||
| 758 | #define WM831X_LDO4_FLT_SHIFT 7 /* LDO4_FLT */ | ||
| 759 | #define WM831X_LDO4_FLT_WIDTH 1 /* LDO4_FLT */ | ||
| 760 | #define WM831X_LDO4_SWI 0x0040 /* LDO4_SWI */ | ||
| 761 | #define WM831X_LDO4_SWI_MASK 0x0040 /* LDO4_SWI */ | ||
| 762 | #define WM831X_LDO4_SWI_SHIFT 6 /* LDO4_SWI */ | ||
| 763 | #define WM831X_LDO4_SWI_WIDTH 1 /* LDO4_SWI */ | ||
| 764 | #define WM831X_LDO4_LP_MODE 0x0001 /* LDO4_LP_MODE */ | ||
| 765 | #define WM831X_LDO4_LP_MODE_MASK 0x0001 /* LDO4_LP_MODE */ | ||
| 766 | #define WM831X_LDO4_LP_MODE_SHIFT 0 /* LDO4_LP_MODE */ | ||
| 767 | #define WM831X_LDO4_LP_MODE_WIDTH 1 /* LDO4_LP_MODE */ | ||
| 768 | |||
| 769 | /* | ||
| 770 | * R16498 (0x4072) - LDO4 ON Control | ||
| 771 | */ | ||
| 772 | #define WM831X_LDO4_ON_SLOT_MASK 0xE000 /* LDO4_ON_SLOT - [15:13] */ | ||
| 773 | #define WM831X_LDO4_ON_SLOT_SHIFT 13 /* LDO4_ON_SLOT - [15:13] */ | ||
| 774 | #define WM831X_LDO4_ON_SLOT_WIDTH 3 /* LDO4_ON_SLOT - [15:13] */ | ||
| 775 | #define WM831X_LDO4_ON_MODE 0x0100 /* LDO4_ON_MODE */ | ||
| 776 | #define WM831X_LDO4_ON_MODE_MASK 0x0100 /* LDO4_ON_MODE */ | ||
| 777 | #define WM831X_LDO4_ON_MODE_SHIFT 8 /* LDO4_ON_MODE */ | ||
| 778 | #define WM831X_LDO4_ON_MODE_WIDTH 1 /* LDO4_ON_MODE */ | ||
| 779 | #define WM831X_LDO4_ON_VSEL_MASK 0x001F /* LDO4_ON_VSEL - [4:0] */ | ||
| 780 | #define WM831X_LDO4_ON_VSEL_SHIFT 0 /* LDO4_ON_VSEL - [4:0] */ | ||
| 781 | #define WM831X_LDO4_ON_VSEL_WIDTH 5 /* LDO4_ON_VSEL - [4:0] */ | ||
| 782 | |||
| 783 | /* | ||
| 784 | * R16499 (0x4073) - LDO4 SLEEP Control | ||
| 785 | */ | ||
| 786 | #define WM831X_LDO4_SLP_SLOT_MASK 0xE000 /* LDO4_SLP_SLOT - [15:13] */ | ||
| 787 | #define WM831X_LDO4_SLP_SLOT_SHIFT 13 /* LDO4_SLP_SLOT - [15:13] */ | ||
| 788 | #define WM831X_LDO4_SLP_SLOT_WIDTH 3 /* LDO4_SLP_SLOT - [15:13] */ | ||
| 789 | #define WM831X_LDO4_SLP_MODE 0x0100 /* LDO4_SLP_MODE */ | ||
| 790 | #define WM831X_LDO4_SLP_MODE_MASK 0x0100 /* LDO4_SLP_MODE */ | ||
| 791 | #define WM831X_LDO4_SLP_MODE_SHIFT 8 /* LDO4_SLP_MODE */ | ||
| 792 | #define WM831X_LDO4_SLP_MODE_WIDTH 1 /* LDO4_SLP_MODE */ | ||
| 793 | #define WM831X_LDO4_SLP_VSEL_MASK 0x001F /* LDO4_SLP_VSEL - [4:0] */ | ||
| 794 | #define WM831X_LDO4_SLP_VSEL_SHIFT 0 /* LDO4_SLP_VSEL - [4:0] */ | ||
| 795 | #define WM831X_LDO4_SLP_VSEL_WIDTH 5 /* LDO4_SLP_VSEL - [4:0] */ | ||
| 796 | |||
| 797 | /* | ||
| 798 | * R16500 (0x4074) - LDO5 Control | ||
| 799 | */ | ||
| 800 | #define WM831X_LDO5_ERR_ACT_MASK 0xC000 /* LDO5_ERR_ACT - [15:14] */ | ||
| 801 | #define WM831X_LDO5_ERR_ACT_SHIFT 14 /* LDO5_ERR_ACT - [15:14] */ | ||
| 802 | #define WM831X_LDO5_ERR_ACT_WIDTH 2 /* LDO5_ERR_ACT - [15:14] */ | ||
| 803 | #define WM831X_LDO5_HWC_SRC_MASK 0x1800 /* LDO5_HWC_SRC - [12:11] */ | ||
| 804 | #define WM831X_LDO5_HWC_SRC_SHIFT 11 /* LDO5_HWC_SRC - [12:11] */ | ||
| 805 | #define WM831X_LDO5_HWC_SRC_WIDTH 2 /* LDO5_HWC_SRC - [12:11] */ | ||
| 806 | #define WM831X_LDO5_HWC_VSEL 0x0400 /* LDO5_HWC_VSEL */ | ||
| 807 | #define WM831X_LDO5_HWC_VSEL_MASK 0x0400 /* LDO5_HWC_VSEL */ | ||
| 808 | #define WM831X_LDO5_HWC_VSEL_SHIFT 10 /* LDO5_HWC_VSEL */ | ||
| 809 | #define WM831X_LDO5_HWC_VSEL_WIDTH 1 /* LDO5_HWC_VSEL */ | ||
| 810 | #define WM831X_LDO5_HWC_MODE_MASK 0x0300 /* LDO5_HWC_MODE - [9:8] */ | ||
| 811 | #define WM831X_LDO5_HWC_MODE_SHIFT 8 /* LDO5_HWC_MODE - [9:8] */ | ||
| 812 | #define WM831X_LDO5_HWC_MODE_WIDTH 2 /* LDO5_HWC_MODE - [9:8] */ | ||
| 813 | #define WM831X_LDO5_FLT 0x0080 /* LDO5_FLT */ | ||
| 814 | #define WM831X_LDO5_FLT_MASK 0x0080 /* LDO5_FLT */ | ||
| 815 | #define WM831X_LDO5_FLT_SHIFT 7 /* LDO5_FLT */ | ||
| 816 | #define WM831X_LDO5_FLT_WIDTH 1 /* LDO5_FLT */ | ||
| 817 | #define WM831X_LDO5_SWI 0x0040 /* LDO5_SWI */ | ||
| 818 | #define WM831X_LDO5_SWI_MASK 0x0040 /* LDO5_SWI */ | ||
| 819 | #define WM831X_LDO5_SWI_SHIFT 6 /* LDO5_SWI */ | ||
| 820 | #define WM831X_LDO5_SWI_WIDTH 1 /* LDO5_SWI */ | ||
| 821 | #define WM831X_LDO5_LP_MODE 0x0001 /* LDO5_LP_MODE */ | ||
| 822 | #define WM831X_LDO5_LP_MODE_MASK 0x0001 /* LDO5_LP_MODE */ | ||
| 823 | #define WM831X_LDO5_LP_MODE_SHIFT 0 /* LDO5_LP_MODE */ | ||
| 824 | #define WM831X_LDO5_LP_MODE_WIDTH 1 /* LDO5_LP_MODE */ | ||
| 825 | |||
| 826 | /* | ||
| 827 | * R16501 (0x4075) - LDO5 ON Control | ||
| 828 | */ | ||
| 829 | #define WM831X_LDO5_ON_SLOT_MASK 0xE000 /* LDO5_ON_SLOT - [15:13] */ | ||
| 830 | #define WM831X_LDO5_ON_SLOT_SHIFT 13 /* LDO5_ON_SLOT - [15:13] */ | ||
| 831 | #define WM831X_LDO5_ON_SLOT_WIDTH 3 /* LDO5_ON_SLOT - [15:13] */ | ||
| 832 | #define WM831X_LDO5_ON_MODE 0x0100 /* LDO5_ON_MODE */ | ||
| 833 | #define WM831X_LDO5_ON_MODE_MASK 0x0100 /* LDO5_ON_MODE */ | ||
| 834 | #define WM831X_LDO5_ON_MODE_SHIFT 8 /* LDO5_ON_MODE */ | ||
| 835 | #define WM831X_LDO5_ON_MODE_WIDTH 1 /* LDO5_ON_MODE */ | ||
| 836 | #define WM831X_LDO5_ON_VSEL_MASK 0x001F /* LDO5_ON_VSEL - [4:0] */ | ||
| 837 | #define WM831X_LDO5_ON_VSEL_SHIFT 0 /* LDO5_ON_VSEL - [4:0] */ | ||
| 838 | #define WM831X_LDO5_ON_VSEL_WIDTH 5 /* LDO5_ON_VSEL - [4:0] */ | ||
| 839 | |||
| 840 | /* | ||
| 841 | * R16502 (0x4076) - LDO5 SLEEP Control | ||
| 842 | */ | ||
| 843 | #define WM831X_LDO5_SLP_SLOT_MASK 0xE000 /* LDO5_SLP_SLOT - [15:13] */ | ||
| 844 | #define WM831X_LDO5_SLP_SLOT_SHIFT 13 /* LDO5_SLP_SLOT - [15:13] */ | ||
| 845 | #define WM831X_LDO5_SLP_SLOT_WIDTH 3 /* LDO5_SLP_SLOT - [15:13] */ | ||
| 846 | #define WM831X_LDO5_SLP_MODE 0x0100 /* LDO5_SLP_MODE */ | ||
| 847 | #define WM831X_LDO5_SLP_MODE_MASK 0x0100 /* LDO5_SLP_MODE */ | ||
| 848 | #define WM831X_LDO5_SLP_MODE_SHIFT 8 /* LDO5_SLP_MODE */ | ||
| 849 | #define WM831X_LDO5_SLP_MODE_WIDTH 1 /* LDO5_SLP_MODE */ | ||
| 850 | #define WM831X_LDO5_SLP_VSEL_MASK 0x001F /* LDO5_SLP_VSEL - [4:0] */ | ||
| 851 | #define WM831X_LDO5_SLP_VSEL_SHIFT 0 /* LDO5_SLP_VSEL - [4:0] */ | ||
| 852 | #define WM831X_LDO5_SLP_VSEL_WIDTH 5 /* LDO5_SLP_VSEL - [4:0] */ | ||
| 853 | |||
| 854 | /* | ||
| 855 | * R16503 (0x4077) - LDO6 Control | ||
| 856 | */ | ||
| 857 | #define WM831X_LDO6_ERR_ACT_MASK 0xC000 /* LDO6_ERR_ACT - [15:14] */ | ||
| 858 | #define WM831X_LDO6_ERR_ACT_SHIFT 14 /* LDO6_ERR_ACT - [15:14] */ | ||
| 859 | #define WM831X_LDO6_ERR_ACT_WIDTH 2 /* LDO6_ERR_ACT - [15:14] */ | ||
| 860 | #define WM831X_LDO6_HWC_SRC_MASK 0x1800 /* LDO6_HWC_SRC - [12:11] */ | ||
| 861 | #define WM831X_LDO6_HWC_SRC_SHIFT 11 /* LDO6_HWC_SRC - [12:11] */ | ||
| 862 | #define WM831X_LDO6_HWC_SRC_WIDTH 2 /* LDO6_HWC_SRC - [12:11] */ | ||
| 863 | #define WM831X_LDO6_HWC_VSEL 0x0400 /* LDO6_HWC_VSEL */ | ||
| 864 | #define WM831X_LDO6_HWC_VSEL_MASK 0x0400 /* LDO6_HWC_VSEL */ | ||
| 865 | #define WM831X_LDO6_HWC_VSEL_SHIFT 10 /* LDO6_HWC_VSEL */ | ||
| 866 | #define WM831X_LDO6_HWC_VSEL_WIDTH 1 /* LDO6_HWC_VSEL */ | ||
| 867 | #define WM831X_LDO6_HWC_MODE_MASK 0x0300 /* LDO6_HWC_MODE - [9:8] */ | ||
| 868 | #define WM831X_LDO6_HWC_MODE_SHIFT 8 /* LDO6_HWC_MODE - [9:8] */ | ||
| 869 | #define WM831X_LDO6_HWC_MODE_WIDTH 2 /* LDO6_HWC_MODE - [9:8] */ | ||
| 870 | #define WM831X_LDO6_FLT 0x0080 /* LDO6_FLT */ | ||
| 871 | #define WM831X_LDO6_FLT_MASK 0x0080 /* LDO6_FLT */ | ||
| 872 | #define WM831X_LDO6_FLT_SHIFT 7 /* LDO6_FLT */ | ||
| 873 | #define WM831X_LDO6_FLT_WIDTH 1 /* LDO6_FLT */ | ||
| 874 | #define WM831X_LDO6_SWI 0x0040 /* LDO6_SWI */ | ||
| 875 | #define WM831X_LDO6_SWI_MASK 0x0040 /* LDO6_SWI */ | ||
| 876 | #define WM831X_LDO6_SWI_SHIFT 6 /* LDO6_SWI */ | ||
| 877 | #define WM831X_LDO6_SWI_WIDTH 1 /* LDO6_SWI */ | ||
| 878 | #define WM831X_LDO6_LP_MODE 0x0001 /* LDO6_LP_MODE */ | ||
| 879 | #define WM831X_LDO6_LP_MODE_MASK 0x0001 /* LDO6_LP_MODE */ | ||
| 880 | #define WM831X_LDO6_LP_MODE_SHIFT 0 /* LDO6_LP_MODE */ | ||
| 881 | #define WM831X_LDO6_LP_MODE_WIDTH 1 /* LDO6_LP_MODE */ | ||
| 882 | |||
| 883 | /* | ||
| 884 | * R16504 (0x4078) - LDO6 ON Control | ||
| 885 | */ | ||
| 886 | #define WM831X_LDO6_ON_SLOT_MASK 0xE000 /* LDO6_ON_SLOT - [15:13] */ | ||
| 887 | #define WM831X_LDO6_ON_SLOT_SHIFT 13 /* LDO6_ON_SLOT - [15:13] */ | ||
| 888 | #define WM831X_LDO6_ON_SLOT_WIDTH 3 /* LDO6_ON_SLOT - [15:13] */ | ||
| 889 | #define WM831X_LDO6_ON_MODE 0x0100 /* LDO6_ON_MODE */ | ||
| 890 | #define WM831X_LDO6_ON_MODE_MASK 0x0100 /* LDO6_ON_MODE */ | ||
| 891 | #define WM831X_LDO6_ON_MODE_SHIFT 8 /* LDO6_ON_MODE */ | ||
| 892 | #define WM831X_LDO6_ON_MODE_WIDTH 1 /* LDO6_ON_MODE */ | ||
| 893 | #define WM831X_LDO6_ON_VSEL_MASK 0x001F /* LDO6_ON_VSEL - [4:0] */ | ||
| 894 | #define WM831X_LDO6_ON_VSEL_SHIFT 0 /* LDO6_ON_VSEL - [4:0] */ | ||
| 895 | #define WM831X_LDO6_ON_VSEL_WIDTH 5 /* LDO6_ON_VSEL - [4:0] */ | ||
| 896 | |||
| 897 | /* | ||
| 898 | * R16505 (0x4079) - LDO6 SLEEP Control | ||
| 899 | */ | ||
| 900 | #define WM831X_LDO6_SLP_SLOT_MASK 0xE000 /* LDO6_SLP_SLOT - [15:13] */ | ||
| 901 | #define WM831X_LDO6_SLP_SLOT_SHIFT 13 /* LDO6_SLP_SLOT - [15:13] */ | ||
| 902 | #define WM831X_LDO6_SLP_SLOT_WIDTH 3 /* LDO6_SLP_SLOT - [15:13] */ | ||
| 903 | #define WM831X_LDO6_SLP_MODE 0x0100 /* LDO6_SLP_MODE */ | ||
| 904 | #define WM831X_LDO6_SLP_MODE_MASK 0x0100 /* LDO6_SLP_MODE */ | ||
| 905 | #define WM831X_LDO6_SLP_MODE_SHIFT 8 /* LDO6_SLP_MODE */ | ||
| 906 | #define WM831X_LDO6_SLP_MODE_WIDTH 1 /* LDO6_SLP_MODE */ | ||
| 907 | #define WM831X_LDO6_SLP_VSEL_MASK 0x001F /* LDO6_SLP_VSEL - [4:0] */ | ||
| 908 | #define WM831X_LDO6_SLP_VSEL_SHIFT 0 /* LDO6_SLP_VSEL - [4:0] */ | ||
| 909 | #define WM831X_LDO6_SLP_VSEL_WIDTH 5 /* LDO6_SLP_VSEL - [4:0] */ | ||
| 910 | |||
| 911 | /* | ||
| 912 | * R16506 (0x407A) - LDO7 Control | ||
| 913 | */ | ||
| 914 | #define WM831X_LDO7_ERR_ACT_MASK 0xC000 /* LDO7_ERR_ACT - [15:14] */ | ||
| 915 | #define WM831X_LDO7_ERR_ACT_SHIFT 14 /* LDO7_ERR_ACT - [15:14] */ | ||
| 916 | #define WM831X_LDO7_ERR_ACT_WIDTH 2 /* LDO7_ERR_ACT - [15:14] */ | ||
| 917 | #define WM831X_LDO7_HWC_SRC_MASK 0x1800 /* LDO7_HWC_SRC - [12:11] */ | ||
| 918 | #define WM831X_LDO7_HWC_SRC_SHIFT 11 /* LDO7_HWC_SRC - [12:11] */ | ||
| 919 | #define WM831X_LDO7_HWC_SRC_WIDTH 2 /* LDO7_HWC_SRC - [12:11] */ | ||
| 920 | #define WM831X_LDO7_HWC_VSEL 0x0400 /* LDO7_HWC_VSEL */ | ||
| 921 | #define WM831X_LDO7_HWC_VSEL_MASK 0x0400 /* LDO7_HWC_VSEL */ | ||
| 922 | #define WM831X_LDO7_HWC_VSEL_SHIFT 10 /* LDO7_HWC_VSEL */ | ||
| 923 | #define WM831X_LDO7_HWC_VSEL_WIDTH 1 /* LDO7_HWC_VSEL */ | ||
| 924 | #define WM831X_LDO7_HWC_MODE_MASK 0x0300 /* LDO7_HWC_MODE - [9:8] */ | ||
| 925 | #define WM831X_LDO7_HWC_MODE_SHIFT 8 /* LDO7_HWC_MODE - [9:8] */ | ||
| 926 | #define WM831X_LDO7_HWC_MODE_WIDTH 2 /* LDO7_HWC_MODE - [9:8] */ | ||
| 927 | #define WM831X_LDO7_FLT 0x0080 /* LDO7_FLT */ | ||
| 928 | #define WM831X_LDO7_FLT_MASK 0x0080 /* LDO7_FLT */ | ||
| 929 | #define WM831X_LDO7_FLT_SHIFT 7 /* LDO7_FLT */ | ||
| 930 | #define WM831X_LDO7_FLT_WIDTH 1 /* LDO7_FLT */ | ||
| 931 | #define WM831X_LDO7_SWI 0x0040 /* LDO7_SWI */ | ||
| 932 | #define WM831X_LDO7_SWI_MASK 0x0040 /* LDO7_SWI */ | ||
| 933 | #define WM831X_LDO7_SWI_SHIFT 6 /* LDO7_SWI */ | ||
| 934 | #define WM831X_LDO7_SWI_WIDTH 1 /* LDO7_SWI */ | ||
| 935 | |||
| 936 | /* | ||
| 937 | * R16507 (0x407B) - LDO7 ON Control | ||
| 938 | */ | ||
| 939 | #define WM831X_LDO7_ON_SLOT_MASK 0xE000 /* LDO7_ON_SLOT - [15:13] */ | ||
| 940 | #define WM831X_LDO7_ON_SLOT_SHIFT 13 /* LDO7_ON_SLOT - [15:13] */ | ||
| 941 | #define WM831X_LDO7_ON_SLOT_WIDTH 3 /* LDO7_ON_SLOT - [15:13] */ | ||
| 942 | #define WM831X_LDO7_ON_MODE 0x0100 /* LDO7_ON_MODE */ | ||
| 943 | #define WM831X_LDO7_ON_MODE_MASK 0x0100 /* LDO7_ON_MODE */ | ||
| 944 | #define WM831X_LDO7_ON_MODE_SHIFT 8 /* LDO7_ON_MODE */ | ||
| 945 | #define WM831X_LDO7_ON_MODE_WIDTH 1 /* LDO7_ON_MODE */ | ||
| 946 | #define WM831X_LDO7_ON_VSEL_MASK 0x001F /* LDO7_ON_VSEL - [4:0] */ | ||
| 947 | #define WM831X_LDO7_ON_VSEL_SHIFT 0 /* LDO7_ON_VSEL - [4:0] */ | ||
| 948 | #define WM831X_LDO7_ON_VSEL_WIDTH 5 /* LDO7_ON_VSEL - [4:0] */ | ||
| 949 | |||
| 950 | /* | ||
| 951 | * R16508 (0x407C) - LDO7 SLEEP Control | ||
| 952 | */ | ||
| 953 | #define WM831X_LDO7_SLP_SLOT_MASK 0xE000 /* LDO7_SLP_SLOT - [15:13] */ | ||
| 954 | #define WM831X_LDO7_SLP_SLOT_SHIFT 13 /* LDO7_SLP_SLOT - [15:13] */ | ||
| 955 | #define WM831X_LDO7_SLP_SLOT_WIDTH 3 /* LDO7_SLP_SLOT - [15:13] */ | ||
| 956 | #define WM831X_LDO7_SLP_MODE 0x0100 /* LDO7_SLP_MODE */ | ||
| 957 | #define WM831X_LDO7_SLP_MODE_MASK 0x0100 /* LDO7_SLP_MODE */ | ||
| 958 | #define WM831X_LDO7_SLP_MODE_SHIFT 8 /* LDO7_SLP_MODE */ | ||
| 959 | #define WM831X_LDO7_SLP_MODE_WIDTH 1 /* LDO7_SLP_MODE */ | ||
| 960 | #define WM831X_LDO7_SLP_VSEL_MASK 0x001F /* LDO7_SLP_VSEL - [4:0] */ | ||
| 961 | #define WM831X_LDO7_SLP_VSEL_SHIFT 0 /* LDO7_SLP_VSEL - [4:0] */ | ||
| 962 | #define WM831X_LDO7_SLP_VSEL_WIDTH 5 /* LDO7_SLP_VSEL - [4:0] */ | ||
| 963 | |||
| 964 | /* | ||
| 965 | * R16509 (0x407D) - LDO8 Control | ||
| 966 | */ | ||
| 967 | #define WM831X_LDO8_ERR_ACT_MASK 0xC000 /* LDO8_ERR_ACT - [15:14] */ | ||
| 968 | #define WM831X_LDO8_ERR_ACT_SHIFT 14 /* LDO8_ERR_ACT - [15:14] */ | ||
| 969 | #define WM831X_LDO8_ERR_ACT_WIDTH 2 /* LDO8_ERR_ACT - [15:14] */ | ||
| 970 | #define WM831X_LDO8_HWC_SRC_MASK 0x1800 /* LDO8_HWC_SRC - [12:11] */ | ||
| 971 | #define WM831X_LDO8_HWC_SRC_SHIFT 11 /* LDO8_HWC_SRC - [12:11] */ | ||
| 972 | #define WM831X_LDO8_HWC_SRC_WIDTH 2 /* LDO8_HWC_SRC - [12:11] */ | ||
| 973 | #define WM831X_LDO8_HWC_VSEL 0x0400 /* LDO8_HWC_VSEL */ | ||
| 974 | #define WM831X_LDO8_HWC_VSEL_MASK 0x0400 /* LDO8_HWC_VSEL */ | ||
| 975 | #define WM831X_LDO8_HWC_VSEL_SHIFT 10 /* LDO8_HWC_VSEL */ | ||
| 976 | #define WM831X_LDO8_HWC_VSEL_WIDTH 1 /* LDO8_HWC_VSEL */ | ||
| 977 | #define WM831X_LDO8_HWC_MODE_MASK 0x0300 /* LDO8_HWC_MODE - [9:8] */ | ||
| 978 | #define WM831X_LDO8_HWC_MODE_SHIFT 8 /* LDO8_HWC_MODE - [9:8] */ | ||
| 979 | #define WM831X_LDO8_HWC_MODE_WIDTH 2 /* LDO8_HWC_MODE - [9:8] */ | ||
| 980 | #define WM831X_LDO8_FLT 0x0080 /* LDO8_FLT */ | ||
| 981 | #define WM831X_LDO8_FLT_MASK 0x0080 /* LDO8_FLT */ | ||
| 982 | #define WM831X_LDO8_FLT_SHIFT 7 /* LDO8_FLT */ | ||
| 983 | #define WM831X_LDO8_FLT_WIDTH 1 /* LDO8_FLT */ | ||
| 984 | #define WM831X_LDO8_SWI 0x0040 /* LDO8_SWI */ | ||
| 985 | #define WM831X_LDO8_SWI_MASK 0x0040 /* LDO8_SWI */ | ||
| 986 | #define WM831X_LDO8_SWI_SHIFT 6 /* LDO8_SWI */ | ||
| 987 | #define WM831X_LDO8_SWI_WIDTH 1 /* LDO8_SWI */ | ||
| 988 | |||
| 989 | /* | ||
| 990 | * R16510 (0x407E) - LDO8 ON Control | ||
| 991 | */ | ||
| 992 | #define WM831X_LDO8_ON_SLOT_MASK 0xE000 /* LDO8_ON_SLOT - [15:13] */ | ||
| 993 | #define WM831X_LDO8_ON_SLOT_SHIFT 13 /* LDO8_ON_SLOT - [15:13] */ | ||
| 994 | #define WM831X_LDO8_ON_SLOT_WIDTH 3 /* LDO8_ON_SLOT - [15:13] */ | ||
| 995 | #define WM831X_LDO8_ON_MODE 0x0100 /* LDO8_ON_MODE */ | ||
| 996 | #define WM831X_LDO8_ON_MODE_MASK 0x0100 /* LDO8_ON_MODE */ | ||
| 997 | #define WM831X_LDO8_ON_MODE_SHIFT 8 /* LDO8_ON_MODE */ | ||
| 998 | #define WM831X_LDO8_ON_MODE_WIDTH 1 /* LDO8_ON_MODE */ | ||
| 999 | #define WM831X_LDO8_ON_VSEL_MASK 0x001F /* LDO8_ON_VSEL - [4:0] */ | ||
| 1000 | #define WM831X_LDO8_ON_VSEL_SHIFT 0 /* LDO8_ON_VSEL - [4:0] */ | ||
| 1001 | #define WM831X_LDO8_ON_VSEL_WIDTH 5 /* LDO8_ON_VSEL - [4:0] */ | ||
| 1002 | |||
| 1003 | /* | ||
| 1004 | * R16511 (0x407F) - LDO8 SLEEP Control | ||
| 1005 | */ | ||
| 1006 | #define WM831X_LDO8_SLP_SLOT_MASK 0xE000 /* LDO8_SLP_SLOT - [15:13] */ | ||
| 1007 | #define WM831X_LDO8_SLP_SLOT_SHIFT 13 /* LDO8_SLP_SLOT - [15:13] */ | ||
| 1008 | #define WM831X_LDO8_SLP_SLOT_WIDTH 3 /* LDO8_SLP_SLOT - [15:13] */ | ||
| 1009 | #define WM831X_LDO8_SLP_MODE 0x0100 /* LDO8_SLP_MODE */ | ||
| 1010 | #define WM831X_LDO8_SLP_MODE_MASK 0x0100 /* LDO8_SLP_MODE */ | ||
| 1011 | #define WM831X_LDO8_SLP_MODE_SHIFT 8 /* LDO8_SLP_MODE */ | ||
| 1012 | #define WM831X_LDO8_SLP_MODE_WIDTH 1 /* LDO8_SLP_MODE */ | ||
| 1013 | #define WM831X_LDO8_SLP_VSEL_MASK 0x001F /* LDO8_SLP_VSEL - [4:0] */ | ||
| 1014 | #define WM831X_LDO8_SLP_VSEL_SHIFT 0 /* LDO8_SLP_VSEL - [4:0] */ | ||
| 1015 | #define WM831X_LDO8_SLP_VSEL_WIDTH 5 /* LDO8_SLP_VSEL - [4:0] */ | ||
| 1016 | |||
| 1017 | /* | ||
| 1018 | * R16512 (0x4080) - LDO9 Control | ||
| 1019 | */ | ||
| 1020 | #define WM831X_LDO9_ERR_ACT_MASK 0xC000 /* LDO9_ERR_ACT - [15:14] */ | ||
| 1021 | #define WM831X_LDO9_ERR_ACT_SHIFT 14 /* LDO9_ERR_ACT - [15:14] */ | ||
| 1022 | #define WM831X_LDO9_ERR_ACT_WIDTH 2 /* LDO9_ERR_ACT - [15:14] */ | ||
| 1023 | #define WM831X_LDO9_HWC_SRC_MASK 0x1800 /* LDO9_HWC_SRC - [12:11] */ | ||
| 1024 | #define WM831X_LDO9_HWC_SRC_SHIFT 11 /* LDO9_HWC_SRC - [12:11] */ | ||
| 1025 | #define WM831X_LDO9_HWC_SRC_WIDTH 2 /* LDO9_HWC_SRC - [12:11] */ | ||
| 1026 | #define WM831X_LDO9_HWC_VSEL 0x0400 /* LDO9_HWC_VSEL */ | ||
| 1027 | #define WM831X_LDO9_HWC_VSEL_MASK 0x0400 /* LDO9_HWC_VSEL */ | ||
| 1028 | #define WM831X_LDO9_HWC_VSEL_SHIFT 10 /* LDO9_HWC_VSEL */ | ||
| 1029 | #define WM831X_LDO9_HWC_VSEL_WIDTH 1 /* LDO9_HWC_VSEL */ | ||
| 1030 | #define WM831X_LDO9_HWC_MODE_MASK 0x0300 /* LDO9_HWC_MODE - [9:8] */ | ||
| 1031 | #define WM831X_LDO9_HWC_MODE_SHIFT 8 /* LDO9_HWC_MODE - [9:8] */ | ||
| 1032 | #define WM831X_LDO9_HWC_MODE_WIDTH 2 /* LDO9_HWC_MODE - [9:8] */ | ||
| 1033 | #define WM831X_LDO9_FLT 0x0080 /* LDO9_FLT */ | ||
| 1034 | #define WM831X_LDO9_FLT_MASK 0x0080 /* LDO9_FLT */ | ||
| 1035 | #define WM831X_LDO9_FLT_SHIFT 7 /* LDO9_FLT */ | ||
| 1036 | #define WM831X_LDO9_FLT_WIDTH 1 /* LDO9_FLT */ | ||
| 1037 | #define WM831X_LDO9_SWI 0x0040 /* LDO9_SWI */ | ||
| 1038 | #define WM831X_LDO9_SWI_MASK 0x0040 /* LDO9_SWI */ | ||
| 1039 | #define WM831X_LDO9_SWI_SHIFT 6 /* LDO9_SWI */ | ||
| 1040 | #define WM831X_LDO9_SWI_WIDTH 1 /* LDO9_SWI */ | ||
| 1041 | |||
| 1042 | /* | ||
| 1043 | * R16513 (0x4081) - LDO9 ON Control | ||
| 1044 | */ | ||
| 1045 | #define WM831X_LDO9_ON_SLOT_MASK 0xE000 /* LDO9_ON_SLOT - [15:13] */ | ||
| 1046 | #define WM831X_LDO9_ON_SLOT_SHIFT 13 /* LDO9_ON_SLOT - [15:13] */ | ||
| 1047 | #define WM831X_LDO9_ON_SLOT_WIDTH 3 /* LDO9_ON_SLOT - [15:13] */ | ||
| 1048 | #define WM831X_LDO9_ON_MODE 0x0100 /* LDO9_ON_MODE */ | ||
| 1049 | #define WM831X_LDO9_ON_MODE_MASK 0x0100 /* LDO9_ON_MODE */ | ||
| 1050 | #define WM831X_LDO9_ON_MODE_SHIFT 8 /* LDO9_ON_MODE */ | ||
| 1051 | #define WM831X_LDO9_ON_MODE_WIDTH 1 /* LDO9_ON_MODE */ | ||
| 1052 | #define WM831X_LDO9_ON_VSEL_MASK 0x001F /* LDO9_ON_VSEL - [4:0] */ | ||
| 1053 | #define WM831X_LDO9_ON_VSEL_SHIFT 0 /* LDO9_ON_VSEL - [4:0] */ | ||
| 1054 | #define WM831X_LDO9_ON_VSEL_WIDTH 5 /* LDO9_ON_VSEL - [4:0] */ | ||
| 1055 | |||
| 1056 | /* | ||
| 1057 | * R16514 (0x4082) - LDO9 SLEEP Control | ||
| 1058 | */ | ||
| 1059 | #define WM831X_LDO9_SLP_SLOT_MASK 0xE000 /* LDO9_SLP_SLOT - [15:13] */ | ||
| 1060 | #define WM831X_LDO9_SLP_SLOT_SHIFT 13 /* LDO9_SLP_SLOT - [15:13] */ | ||
| 1061 | #define WM831X_LDO9_SLP_SLOT_WIDTH 3 /* LDO9_SLP_SLOT - [15:13] */ | ||
| 1062 | #define WM831X_LDO9_SLP_MODE 0x0100 /* LDO9_SLP_MODE */ | ||
| 1063 | #define WM831X_LDO9_SLP_MODE_MASK 0x0100 /* LDO9_SLP_MODE */ | ||
| 1064 | #define WM831X_LDO9_SLP_MODE_SHIFT 8 /* LDO9_SLP_MODE */ | ||
| 1065 | #define WM831X_LDO9_SLP_MODE_WIDTH 1 /* LDO9_SLP_MODE */ | ||
| 1066 | #define WM831X_LDO9_SLP_VSEL_MASK 0x001F /* LDO9_SLP_VSEL - [4:0] */ | ||
| 1067 | #define WM831X_LDO9_SLP_VSEL_SHIFT 0 /* LDO9_SLP_VSEL - [4:0] */ | ||
| 1068 | #define WM831X_LDO9_SLP_VSEL_WIDTH 5 /* LDO9_SLP_VSEL - [4:0] */ | ||
| 1069 | |||
| 1070 | /* | ||
| 1071 | * R16515 (0x4083) - LDO10 Control | ||
| 1072 | */ | ||
| 1073 | #define WM831X_LDO10_ERR_ACT_MASK 0xC000 /* LDO10_ERR_ACT - [15:14] */ | ||
| 1074 | #define WM831X_LDO10_ERR_ACT_SHIFT 14 /* LDO10_ERR_ACT - [15:14] */ | ||
| 1075 | #define WM831X_LDO10_ERR_ACT_WIDTH 2 /* LDO10_ERR_ACT - [15:14] */ | ||
| 1076 | #define WM831X_LDO10_HWC_SRC_MASK 0x1800 /* LDO10_HWC_SRC - [12:11] */ | ||
| 1077 | #define WM831X_LDO10_HWC_SRC_SHIFT 11 /* LDO10_HWC_SRC - [12:11] */ | ||
| 1078 | #define WM831X_LDO10_HWC_SRC_WIDTH 2 /* LDO10_HWC_SRC - [12:11] */ | ||
| 1079 | #define WM831X_LDO10_HWC_VSEL 0x0400 /* LDO10_HWC_VSEL */ | ||
| 1080 | #define WM831X_LDO10_HWC_VSEL_MASK 0x0400 /* LDO10_HWC_VSEL */ | ||
| 1081 | #define WM831X_LDO10_HWC_VSEL_SHIFT 10 /* LDO10_HWC_VSEL */ | ||
| 1082 | #define WM831X_LDO10_HWC_VSEL_WIDTH 1 /* LDO10_HWC_VSEL */ | ||
| 1083 | #define WM831X_LDO10_HWC_MODE_MASK 0x0300 /* LDO10_HWC_MODE - [9:8] */ | ||
| 1084 | #define WM831X_LDO10_HWC_MODE_SHIFT 8 /* LDO10_HWC_MODE - [9:8] */ | ||
| 1085 | #define WM831X_LDO10_HWC_MODE_WIDTH 2 /* LDO10_HWC_MODE - [9:8] */ | ||
| 1086 | #define WM831X_LDO10_FLT 0x0080 /* LDO10_FLT */ | ||
| 1087 | #define WM831X_LDO10_FLT_MASK 0x0080 /* LDO10_FLT */ | ||
| 1088 | #define WM831X_LDO10_FLT_SHIFT 7 /* LDO10_FLT */ | ||
| 1089 | #define WM831X_LDO10_FLT_WIDTH 1 /* LDO10_FLT */ | ||
| 1090 | #define WM831X_LDO10_SWI 0x0040 /* LDO10_SWI */ | ||
| 1091 | #define WM831X_LDO10_SWI_MASK 0x0040 /* LDO10_SWI */ | ||
| 1092 | #define WM831X_LDO10_SWI_SHIFT 6 /* LDO10_SWI */ | ||
| 1093 | #define WM831X_LDO10_SWI_WIDTH 1 /* LDO10_SWI */ | ||
| 1094 | |||
| 1095 | /* | ||
| 1096 | * R16516 (0x4084) - LDO10 ON Control | ||
| 1097 | */ | ||
| 1098 | #define WM831X_LDO10_ON_SLOT_MASK 0xE000 /* LDO10_ON_SLOT - [15:13] */ | ||
| 1099 | #define WM831X_LDO10_ON_SLOT_SHIFT 13 /* LDO10_ON_SLOT - [15:13] */ | ||
| 1100 | #define WM831X_LDO10_ON_SLOT_WIDTH 3 /* LDO10_ON_SLOT - [15:13] */ | ||
| 1101 | #define WM831X_LDO10_ON_MODE 0x0100 /* LDO10_ON_MODE */ | ||
| 1102 | #define WM831X_LDO10_ON_MODE_MASK 0x0100 /* LDO10_ON_MODE */ | ||
| 1103 | #define WM831X_LDO10_ON_MODE_SHIFT 8 /* LDO10_ON_MODE */ | ||
| 1104 | #define WM831X_LDO10_ON_MODE_WIDTH 1 /* LDO10_ON_MODE */ | ||
| 1105 | #define WM831X_LDO10_ON_VSEL_MASK 0x001F /* LDO10_ON_VSEL - [4:0] */ | ||
| 1106 | #define WM831X_LDO10_ON_VSEL_SHIFT 0 /* LDO10_ON_VSEL - [4:0] */ | ||
| 1107 | #define WM831X_LDO10_ON_VSEL_WIDTH 5 /* LDO10_ON_VSEL - [4:0] */ | ||
| 1108 | |||
| 1109 | /* | ||
| 1110 | * R16517 (0x4085) - LDO10 SLEEP Control | ||
| 1111 | */ | ||
| 1112 | #define WM831X_LDO10_SLP_SLOT_MASK 0xE000 /* LDO10_SLP_SLOT - [15:13] */ | ||
| 1113 | #define WM831X_LDO10_SLP_SLOT_SHIFT 13 /* LDO10_SLP_SLOT - [15:13] */ | ||
| 1114 | #define WM831X_LDO10_SLP_SLOT_WIDTH 3 /* LDO10_SLP_SLOT - [15:13] */ | ||
| 1115 | #define WM831X_LDO10_SLP_MODE 0x0100 /* LDO10_SLP_MODE */ | ||
| 1116 | #define WM831X_LDO10_SLP_MODE_MASK 0x0100 /* LDO10_SLP_MODE */ | ||
| 1117 | #define WM831X_LDO10_SLP_MODE_SHIFT 8 /* LDO10_SLP_MODE */ | ||
| 1118 | #define WM831X_LDO10_SLP_MODE_WIDTH 1 /* LDO10_SLP_MODE */ | ||
| 1119 | #define WM831X_LDO10_SLP_VSEL_MASK 0x001F /* LDO10_SLP_VSEL - [4:0] */ | ||
| 1120 | #define WM831X_LDO10_SLP_VSEL_SHIFT 0 /* LDO10_SLP_VSEL - [4:0] */ | ||
| 1121 | #define WM831X_LDO10_SLP_VSEL_WIDTH 5 /* LDO10_SLP_VSEL - [4:0] */ | ||
| 1122 | |||
| 1123 | /* | ||
| 1124 | * R16519 (0x4087) - LDO11 ON Control | ||
| 1125 | */ | ||
| 1126 | #define WM831X_LDO11_ON_SLOT_MASK 0xE000 /* LDO11_ON_SLOT - [15:13] */ | ||
| 1127 | #define WM831X_LDO11_ON_SLOT_SHIFT 13 /* LDO11_ON_SLOT - [15:13] */ | ||
| 1128 | #define WM831X_LDO11_ON_SLOT_WIDTH 3 /* LDO11_ON_SLOT - [15:13] */ | ||
| 1129 | #define WM831X_LDO11_OFFENA 0x1000 /* LDO11_OFFENA */ | ||
| 1130 | #define WM831X_LDO11_OFFENA_MASK 0x1000 /* LDO11_OFFENA */ | ||
| 1131 | #define WM831X_LDO11_OFFENA_SHIFT 12 /* LDO11_OFFENA */ | ||
| 1132 | #define WM831X_LDO11_OFFENA_WIDTH 1 /* LDO11_OFFENA */ | ||
| 1133 | #define WM831X_LDO11_VSEL_SRC 0x0080 /* LDO11_VSEL_SRC */ | ||
| 1134 | #define WM831X_LDO11_VSEL_SRC_MASK 0x0080 /* LDO11_VSEL_SRC */ | ||
| 1135 | #define WM831X_LDO11_VSEL_SRC_SHIFT 7 /* LDO11_VSEL_SRC */ | ||
| 1136 | #define WM831X_LDO11_VSEL_SRC_WIDTH 1 /* LDO11_VSEL_SRC */ | ||
| 1137 | #define WM831X_LDO11_ON_VSEL_MASK 0x000F /* LDO11_ON_VSEL - [3:0] */ | ||
| 1138 | #define WM831X_LDO11_ON_VSEL_SHIFT 0 /* LDO11_ON_VSEL - [3:0] */ | ||
| 1139 | #define WM831X_LDO11_ON_VSEL_WIDTH 4 /* LDO11_ON_VSEL - [3:0] */ | ||
| 1140 | |||
| 1141 | /* | ||
| 1142 | * R16520 (0x4088) - LDO11 SLEEP Control | ||
| 1143 | */ | ||
| 1144 | #define WM831X_LDO11_SLP_SLOT_MASK 0xE000 /* LDO11_SLP_SLOT - [15:13] */ | ||
| 1145 | #define WM831X_LDO11_SLP_SLOT_SHIFT 13 /* LDO11_SLP_SLOT - [15:13] */ | ||
| 1146 | #define WM831X_LDO11_SLP_SLOT_WIDTH 3 /* LDO11_SLP_SLOT - [15:13] */ | ||
| 1147 | #define WM831X_LDO11_SLP_VSEL_MASK 0x000F /* LDO11_SLP_VSEL - [3:0] */ | ||
| 1148 | #define WM831X_LDO11_SLP_VSEL_SHIFT 0 /* LDO11_SLP_VSEL - [3:0] */ | ||
| 1149 | #define WM831X_LDO11_SLP_VSEL_WIDTH 4 /* LDO11_SLP_VSEL - [3:0] */ | ||
| 1150 | |||
| 1151 | /* | ||
| 1152 | * R16526 (0x408E) - Power Good Source 1 | ||
| 1153 | */ | ||
| 1154 | #define WM831X_DC4_OK 0x0008 /* DC4_OK */ | ||
| 1155 | #define WM831X_DC4_OK_MASK 0x0008 /* DC4_OK */ | ||
| 1156 | #define WM831X_DC4_OK_SHIFT 3 /* DC4_OK */ | ||
| 1157 | #define WM831X_DC4_OK_WIDTH 1 /* DC4_OK */ | ||
| 1158 | #define WM831X_DC3_OK 0x0004 /* DC3_OK */ | ||
| 1159 | #define WM831X_DC3_OK_MASK 0x0004 /* DC3_OK */ | ||
| 1160 | #define WM831X_DC3_OK_SHIFT 2 /* DC3_OK */ | ||
| 1161 | #define WM831X_DC3_OK_WIDTH 1 /* DC3_OK */ | ||
| 1162 | #define WM831X_DC2_OK 0x0002 /* DC2_OK */ | ||
| 1163 | #define WM831X_DC2_OK_MASK 0x0002 /* DC2_OK */ | ||
| 1164 | #define WM831X_DC2_OK_SHIFT 1 /* DC2_OK */ | ||
| 1165 | #define WM831X_DC2_OK_WIDTH 1 /* DC2_OK */ | ||
| 1166 | #define WM831X_DC1_OK 0x0001 /* DC1_OK */ | ||
| 1167 | #define WM831X_DC1_OK_MASK 0x0001 /* DC1_OK */ | ||
| 1168 | #define WM831X_DC1_OK_SHIFT 0 /* DC1_OK */ | ||
| 1169 | #define WM831X_DC1_OK_WIDTH 1 /* DC1_OK */ | ||
| 1170 | |||
| 1171 | /* | ||
| 1172 | * R16527 (0x408F) - Power Good Source 2 | ||
| 1173 | */ | ||
| 1174 | #define WM831X_LDO10_OK 0x0200 /* LDO10_OK */ | ||
| 1175 | #define WM831X_LDO10_OK_MASK 0x0200 /* LDO10_OK */ | ||
| 1176 | #define WM831X_LDO10_OK_SHIFT 9 /* LDO10_OK */ | ||
| 1177 | #define WM831X_LDO10_OK_WIDTH 1 /* LDO10_OK */ | ||
| 1178 | #define WM831X_LDO9_OK 0x0100 /* LDO9_OK */ | ||
| 1179 | #define WM831X_LDO9_OK_MASK 0x0100 /* LDO9_OK */ | ||
| 1180 | #define WM831X_LDO9_OK_SHIFT 8 /* LDO9_OK */ | ||
| 1181 | #define WM831X_LDO9_OK_WIDTH 1 /* LDO9_OK */ | ||
| 1182 | #define WM831X_LDO8_OK 0x0080 /* LDO8_OK */ | ||
| 1183 | #define WM831X_LDO8_OK_MASK 0x0080 /* LDO8_OK */ | ||
| 1184 | #define WM831X_LDO8_OK_SHIFT 7 /* LDO8_OK */ | ||
| 1185 | #define WM831X_LDO8_OK_WIDTH 1 /* LDO8_OK */ | ||
| 1186 | #define WM831X_LDO7_OK 0x0040 /* LDO7_OK */ | ||
| 1187 | #define WM831X_LDO7_OK_MASK 0x0040 /* LDO7_OK */ | ||
| 1188 | #define WM831X_LDO7_OK_SHIFT 6 /* LDO7_OK */ | ||
| 1189 | #define WM831X_LDO7_OK_WIDTH 1 /* LDO7_OK */ | ||
| 1190 | #define WM831X_LDO6_OK 0x0020 /* LDO6_OK */ | ||
| 1191 | #define WM831X_LDO6_OK_MASK 0x0020 /* LDO6_OK */ | ||
| 1192 | #define WM831X_LDO6_OK_SHIFT 5 /* LDO6_OK */ | ||
| 1193 | #define WM831X_LDO6_OK_WIDTH 1 /* LDO6_OK */ | ||
| 1194 | #define WM831X_LDO5_OK 0x0010 /* LDO5_OK */ | ||
| 1195 | #define WM831X_LDO5_OK_MASK 0x0010 /* LDO5_OK */ | ||
| 1196 | #define WM831X_LDO5_OK_SHIFT 4 /* LDO5_OK */ | ||
| 1197 | #define WM831X_LDO5_OK_WIDTH 1 /* LDO5_OK */ | ||
| 1198 | #define WM831X_LDO4_OK 0x0008 /* LDO4_OK */ | ||
| 1199 | #define WM831X_LDO4_OK_MASK 0x0008 /* LDO4_OK */ | ||
| 1200 | #define WM831X_LDO4_OK_SHIFT 3 /* LDO4_OK */ | ||
| 1201 | #define WM831X_LDO4_OK_WIDTH 1 /* LDO4_OK */ | ||
| 1202 | #define WM831X_LDO3_OK 0x0004 /* LDO3_OK */ | ||
| 1203 | #define WM831X_LDO3_OK_MASK 0x0004 /* LDO3_OK */ | ||
| 1204 | #define WM831X_LDO3_OK_SHIFT 2 /* LDO3_OK */ | ||
| 1205 | #define WM831X_LDO3_OK_WIDTH 1 /* LDO3_OK */ | ||
| 1206 | #define WM831X_LDO2_OK 0x0002 /* LDO2_OK */ | ||
| 1207 | #define WM831X_LDO2_OK_MASK 0x0002 /* LDO2_OK */ | ||
| 1208 | #define WM831X_LDO2_OK_SHIFT 1 /* LDO2_OK */ | ||
| 1209 | #define WM831X_LDO2_OK_WIDTH 1 /* LDO2_OK */ | ||
| 1210 | #define WM831X_LDO1_OK 0x0001 /* LDO1_OK */ | ||
| 1211 | #define WM831X_LDO1_OK_MASK 0x0001 /* LDO1_OK */ | ||
| 1212 | #define WM831X_LDO1_OK_SHIFT 0 /* LDO1_OK */ | ||
| 1213 | #define WM831X_LDO1_OK_WIDTH 1 /* LDO1_OK */ | ||
| 1214 | |||
| 1215 | #define WM831X_ISINK_MAX_ISEL 56 | ||
| 1216 | extern int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL]; | ||
| 1217 | |||
| 1218 | #endif | ||
diff --git a/include/linux/mfd/wm831x/watchdog.h b/include/linux/mfd/wm831x/watchdog.h new file mode 100644 index 000000000000..97a99b52956f --- /dev/null +++ b/include/linux/mfd/wm831x/watchdog.h | |||
| @@ -0,0 +1,52 @@ | |||
| 1 | /* | ||
| 2 | * include/linux/mfd/wm831x/watchdog.h -- Watchdog for WM831x | ||
| 3 | * | ||
| 4 | * Copyright 2009 Wolfson Microelectronics PLC. | ||
| 5 | * | ||
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | * | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __MFD_WM831X_WATCHDOG_H__ | ||
| 16 | #define __MFD_WM831X_WATCHDOG_H__ | ||
| 17 | |||
| 18 | |||
| 19 | /* | ||
| 20 | * R16388 (0x4004) - Watchdog | ||
| 21 | */ | ||
| 22 | #define WM831X_WDOG_ENA 0x8000 /* WDOG_ENA */ | ||
| 23 | #define WM831X_WDOG_ENA_MASK 0x8000 /* WDOG_ENA */ | ||
| 24 | #define WM831X_WDOG_ENA_SHIFT 15 /* WDOG_ENA */ | ||
| 25 | #define WM831X_WDOG_ENA_WIDTH 1 /* WDOG_ENA */ | ||
| 26 | #define WM831X_WDOG_DEBUG 0x4000 /* WDOG_DEBUG */ | ||
| 27 | #define WM831X_WDOG_DEBUG_MASK 0x4000 /* WDOG_DEBUG */ | ||
| 28 | #define WM831X_WDOG_DEBUG_SHIFT 14 /* WDOG_DEBUG */ | ||
| 29 | #define WM831X_WDOG_DEBUG_WIDTH 1 /* WDOG_DEBUG */ | ||
| 30 | #define WM831X_WDOG_RST_SRC 0x2000 /* WDOG_RST_SRC */ | ||
| 31 | #define WM831X_WDOG_RST_SRC_MASK 0x2000 /* WDOG_RST_SRC */ | ||
| 32 | #define WM831X_WDOG_RST_SRC_SHIFT 13 /* WDOG_RST_SRC */ | ||
| 33 | #define WM831X_WDOG_RST_SRC_WIDTH 1 /* WDOG_RST_SRC */ | ||
| 34 | #define WM831X_WDOG_SLPENA 0x1000 /* WDOG_SLPENA */ | ||
| 35 | #define WM831X_WDOG_SLPENA_MASK 0x1000 /* WDOG_SLPENA */ | ||
| 36 | #define WM831X_WDOG_SLPENA_SHIFT 12 /* WDOG_SLPENA */ | ||
| 37 | #define WM831X_WDOG_SLPENA_WIDTH 1 /* WDOG_SLPENA */ | ||
| 38 | #define WM831X_WDOG_RESET 0x0800 /* WDOG_RESET */ | ||
| 39 | #define WM831X_WDOG_RESET_MASK 0x0800 /* WDOG_RESET */ | ||
| 40 | #define WM831X_WDOG_RESET_SHIFT 11 /* WDOG_RESET */ | ||
| 41 | #define WM831X_WDOG_RESET_WIDTH 1 /* WDOG_RESET */ | ||
| 42 | #define WM831X_WDOG_SECACT_MASK 0x0300 /* WDOG_SECACT - [9:8] */ | ||
| 43 | #define WM831X_WDOG_SECACT_SHIFT 8 /* WDOG_SECACT - [9:8] */ | ||
| 44 | #define WM831X_WDOG_SECACT_WIDTH 2 /* WDOG_SECACT - [9:8] */ | ||
| 45 | #define WM831X_WDOG_PRIMACT_MASK 0x0030 /* WDOG_PRIMACT - [5:4] */ | ||
| 46 | #define WM831X_WDOG_PRIMACT_SHIFT 4 /* WDOG_PRIMACT - [5:4] */ | ||
| 47 | #define WM831X_WDOG_PRIMACT_WIDTH 2 /* WDOG_PRIMACT - [5:4] */ | ||
| 48 | #define WM831X_WDOG_TO_MASK 0x0007 /* WDOG_TO - [2:0] */ | ||
| 49 | #define WM831X_WDOG_TO_SHIFT 0 /* WDOG_TO - [2:0] */ | ||
| 50 | #define WM831X_WDOG_TO_WIDTH 3 /* WDOG_TO - [2:0] */ | ||
| 51 | |||
| 52 | #endif | ||
diff --git a/include/linux/mfd/wm8350/core.h b/include/linux/mfd/wm8350/core.h index 42cca672f340..1d595de6a055 100644 --- a/include/linux/mfd/wm8350/core.h +++ b/include/linux/mfd/wm8350/core.h | |||
| @@ -605,6 +605,11 @@ struct wm8350_irq { | |||
| 605 | void *data; | 605 | void *data; |
| 606 | }; | 606 | }; |
| 607 | 607 | ||
| 608 | struct wm8350_hwmon { | ||
| 609 | struct platform_device *pdev; | ||
| 610 | struct device *classdev; | ||
| 611 | }; | ||
| 612 | |||
| 608 | struct wm8350 { | 613 | struct wm8350 { |
| 609 | struct device *dev; | 614 | struct device *dev; |
| 610 | 615 | ||
| @@ -621,7 +626,6 @@ struct wm8350 { | |||
| 621 | struct mutex auxadc_mutex; | 626 | struct mutex auxadc_mutex; |
| 622 | 627 | ||
| 623 | /* Interrupt handling */ | 628 | /* Interrupt handling */ |
| 624 | struct work_struct irq_work; | ||
| 625 | struct mutex irq_mutex; /* IRQ table mutex */ | 629 | struct mutex irq_mutex; /* IRQ table mutex */ |
| 626 | struct wm8350_irq irq[WM8350_NUM_IRQ]; | 630 | struct wm8350_irq irq[WM8350_NUM_IRQ]; |
| 627 | int chip_irq; | 631 | int chip_irq; |
| @@ -629,6 +633,7 @@ struct wm8350 { | |||
| 629 | /* Client devices */ | 633 | /* Client devices */ |
| 630 | struct wm8350_codec codec; | 634 | struct wm8350_codec codec; |
| 631 | struct wm8350_gpio gpio; | 635 | struct wm8350_gpio gpio; |
| 636 | struct wm8350_hwmon hwmon; | ||
| 632 | struct wm8350_pmic pmic; | 637 | struct wm8350_pmic pmic; |
| 633 | struct wm8350_power power; | 638 | struct wm8350_power power; |
| 634 | struct wm8350_rtc rtc; | 639 | struct wm8350_rtc rtc; |
diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h index 052117744629..adaf3c15e449 100644 --- a/include/linux/miscdevice.h +++ b/include/linux/miscdevice.h | |||
| @@ -41,7 +41,8 @@ struct miscdevice { | |||
| 41 | struct list_head list; | 41 | struct list_head list; |
| 42 | struct device *parent; | 42 | struct device *parent; |
| 43 | struct device *this_device; | 43 | struct device *this_device; |
| 44 | const char *devnode; | 44 | const char *nodename; |
| 45 | mode_t mode; | ||
| 45 | }; | 46 | }; |
| 46 | 47 | ||
| 47 | extern int misc_register(struct miscdevice * misc); | 48 | extern int misc_register(struct miscdevice * misc); |
diff --git a/include/linux/page_cgroup.h b/include/linux/page_cgroup.h index 13f126c89ae8..ada779f24178 100644 --- a/include/linux/page_cgroup.h +++ b/include/linux/page_cgroup.h | |||
| @@ -105,14 +105,14 @@ static inline void __init page_cgroup_init_flatmem(void) | |||
| 105 | 105 | ||
| 106 | #endif | 106 | #endif |
| 107 | 107 | ||
| 108 | #ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP | ||
| 109 | #include <linux/swap.h> | 108 | #include <linux/swap.h> |
| 109 | |||
| 110 | #ifdef CONFIG_CGROUP_MEM_RES_CTLR_SWAP | ||
| 110 | extern unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id); | 111 | extern unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id); |
| 111 | extern unsigned short lookup_swap_cgroup(swp_entry_t ent); | 112 | extern unsigned short lookup_swap_cgroup(swp_entry_t ent); |
| 112 | extern int swap_cgroup_swapon(int type, unsigned long max_pages); | 113 | extern int swap_cgroup_swapon(int type, unsigned long max_pages); |
| 113 | extern void swap_cgroup_swapoff(int type); | 114 | extern void swap_cgroup_swapoff(int type); |
| 114 | #else | 115 | #else |
| 115 | #include <linux/swap.h> | ||
| 116 | 116 | ||
| 117 | static inline | 117 | static inline |
| 118 | unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id) | 118 | unsigned short swap_cgroup_record(swp_entry_t ent, unsigned short id) |
diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h index 225f733e7533..ce1be708ca16 100644 --- a/include/linux/regulator/driver.h +++ b/include/linux/regulator/driver.h | |||
| @@ -193,6 +193,8 @@ void *rdev_get_drvdata(struct regulator_dev *rdev); | |||
| 193 | struct device *rdev_get_dev(struct regulator_dev *rdev); | 193 | struct device *rdev_get_dev(struct regulator_dev *rdev); |
| 194 | int rdev_get_id(struct regulator_dev *rdev); | 194 | int rdev_get_id(struct regulator_dev *rdev); |
| 195 | 195 | ||
| 196 | int regulator_mode_to_status(unsigned int); | ||
| 197 | |||
| 196 | void *regulator_get_init_drvdata(struct regulator_init_data *reg_init_data); | 198 | void *regulator_get_init_drvdata(struct regulator_init_data *reg_init_data); |
| 197 | 199 | ||
| 198 | #endif | 200 | #endif |
diff --git a/include/linux/serial.h b/include/linux/serial.h index e5bb75a63802..c8613c3ff9d3 100644 --- a/include/linux/serial.h +++ b/include/linux/serial.h | |||
| @@ -122,6 +122,7 @@ struct serial_uart_config { | |||
| 122 | 122 | ||
| 123 | /* Internal flags used only by kernel */ | 123 | /* Internal flags used only by kernel */ |
| 124 | #define ASYNCB_INITIALIZED 31 /* Serial port was initialized */ | 124 | #define ASYNCB_INITIALIZED 31 /* Serial port was initialized */ |
| 125 | #define ASYNCB_SUSPENDED 30 /* Serial port is suspended */ | ||
| 125 | #define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */ | 126 | #define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */ |
| 126 | #define ASYNCB_BOOT_AUTOCONF 28 /* Autoconfigure port on bootup */ | 127 | #define ASYNCB_BOOT_AUTOCONF 28 /* Autoconfigure port on bootup */ |
| 127 | #define ASYNCB_CLOSING 27 /* Serial port is closing */ | 128 | #define ASYNCB_CLOSING 27 /* Serial port is closing */ |
| @@ -133,6 +134,7 @@ struct serial_uart_config { | |||
| 133 | #define ASYNCB_FIRST_KERNEL 22 | 134 | #define ASYNCB_FIRST_KERNEL 22 |
| 134 | 135 | ||
| 135 | #define ASYNC_HUP_NOTIFY (1U << ASYNCB_HUP_NOTIFY) | 136 | #define ASYNC_HUP_NOTIFY (1U << ASYNCB_HUP_NOTIFY) |
| 137 | #define ASYNC_SUSPENDED (1U << ASYNCB_SUSPENDED) | ||
| 136 | #define ASYNC_FOURPORT (1U << ASYNCB_FOURPORT) | 138 | #define ASYNC_FOURPORT (1U << ASYNCB_FOURPORT) |
| 137 | #define ASYNC_SAK (1U << ASYNCB_SAK) | 139 | #define ASYNC_SAK (1U << ASYNCB_SAK) |
| 138 | #define ASYNC_SPLIT_TERMIOS (1U << ASYNCB_SPLIT_TERMIOS) | 140 | #define ASYNC_SPLIT_TERMIOS (1U << ASYNCB_SPLIT_TERMIOS) |
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h index d4d2a78ad43e..fb46aba11fb5 100644 --- a/include/linux/serial_8250.h +++ b/include/linux/serial_8250.h | |||
| @@ -22,6 +22,7 @@ struct plat_serial8250_port { | |||
| 22 | void __iomem *membase; /* ioremap cookie or NULL */ | 22 | void __iomem *membase; /* ioremap cookie or NULL */ |
| 23 | resource_size_t mapbase; /* resource base */ | 23 | resource_size_t mapbase; /* resource base */ |
| 24 | unsigned int irq; /* interrupt number */ | 24 | unsigned int irq; /* interrupt number */ |
| 25 | unsigned long irqflags; /* request_irq flags */ | ||
| 25 | unsigned int uartclk; /* UART clock rate */ | 26 | unsigned int uartclk; /* UART clock rate */ |
| 26 | void *private_data; | 27 | void *private_data; |
| 27 | unsigned char regshift; /* register shift */ | 28 | unsigned char regshift; /* register shift */ |
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 23d2fb051f97..d58e460844dd 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h | |||
| @@ -20,6 +20,8 @@ | |||
| 20 | #ifndef LINUX_SERIAL_CORE_H | 20 | #ifndef LINUX_SERIAL_CORE_H |
| 21 | #define LINUX_SERIAL_CORE_H | 21 | #define LINUX_SERIAL_CORE_H |
| 22 | 22 | ||
| 23 | #include <linux/serial.h> | ||
| 24 | |||
| 23 | /* | 25 | /* |
| 24 | * The type definitions. These are from Ted Ts'o's serial.h | 26 | * The type definitions. These are from Ted Ts'o's serial.h |
| 25 | */ | 27 | */ |
| @@ -186,7 +188,6 @@ | |||
| 186 | #include <linux/sysrq.h> | 188 | #include <linux/sysrq.h> |
| 187 | 189 | ||
| 188 | struct uart_port; | 190 | struct uart_port; |
| 189 | struct uart_info; | ||
| 190 | struct serial_struct; | 191 | struct serial_struct; |
| 191 | struct device; | 192 | struct device; |
| 192 | 193 | ||
| @@ -265,6 +266,7 @@ struct uart_port { | |||
| 265 | unsigned int (*serial_in)(struct uart_port *, int); | 266 | unsigned int (*serial_in)(struct uart_port *, int); |
| 266 | void (*serial_out)(struct uart_port *, int, int); | 267 | void (*serial_out)(struct uart_port *, int, int); |
| 267 | unsigned int irq; /* irq number */ | 268 | unsigned int irq; /* irq number */ |
| 269 | unsigned long irqflags; /* irq flags */ | ||
| 268 | unsigned int uartclk; /* base uart clock */ | 270 | unsigned int uartclk; /* base uart clock */ |
| 269 | unsigned int fifosize; /* tx fifo size */ | 271 | unsigned int fifosize; /* tx fifo size */ |
| 270 | unsigned char x_char; /* xon/xoff char */ | 272 | unsigned char x_char; /* xon/xoff char */ |
| @@ -283,7 +285,7 @@ struct uart_port { | |||
| 283 | 285 | ||
| 284 | unsigned int read_status_mask; /* driver specific */ | 286 | unsigned int read_status_mask; /* driver specific */ |
| 285 | unsigned int ignore_status_mask; /* driver specific */ | 287 | unsigned int ignore_status_mask; /* driver specific */ |
| 286 | struct uart_info *info; /* pointer to parent info */ | 288 | struct uart_state *state; /* pointer to parent state */ |
| 287 | struct uart_icount icount; /* statistics */ | 289 | struct uart_icount icount; /* statistics */ |
| 288 | 290 | ||
| 289 | struct console *cons; /* struct console, if any */ | 291 | struct console *cons; /* struct console, if any */ |
| @@ -335,52 +337,16 @@ struct uart_port { | |||
| 335 | }; | 337 | }; |
| 336 | 338 | ||
| 337 | /* | 339 | /* |
| 338 | * This is the state information which is only valid when the port | ||
| 339 | * is open; it may be cleared the core driver once the device has | ||
| 340 | * been closed. Either the low level driver or the core can modify | ||
| 341 | * stuff here. | ||
| 342 | */ | ||
| 343 | typedef unsigned int __bitwise__ uif_t; | ||
| 344 | |||
| 345 | struct uart_info { | ||
| 346 | struct tty_port port; | ||
| 347 | struct circ_buf xmit; | ||
| 348 | uif_t flags; | ||
| 349 | |||
| 350 | /* | ||
| 351 | * Definitions for info->flags. These are _private_ to serial_core, and | ||
| 352 | * are specific to this structure. They may be queried by low level drivers. | ||
| 353 | * | ||
| 354 | * FIXME: use the ASY_ definitions | ||
| 355 | */ | ||
| 356 | #define UIF_CHECK_CD ((__force uif_t) (1 << 25)) | ||
| 357 | #define UIF_CTS_FLOW ((__force uif_t) (1 << 26)) | ||
| 358 | #define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29)) | ||
| 359 | #define UIF_INITIALIZED ((__force uif_t) (1 << 31)) | ||
| 360 | #define UIF_SUSPENDED ((__force uif_t) (1 << 30)) | ||
| 361 | |||
| 362 | struct tasklet_struct tlet; | ||
| 363 | wait_queue_head_t delta_msr_wait; | ||
| 364 | }; | ||
| 365 | |||
| 366 | /* | ||
| 367 | * This is the state information which is persistent across opens. | 340 | * This is the state information which is persistent across opens. |
| 368 | * The low level driver must not to touch any elements contained | ||
| 369 | * within. | ||
| 370 | */ | 341 | */ |
| 371 | struct uart_state { | 342 | struct uart_state { |
| 372 | unsigned int close_delay; /* msec */ | 343 | struct tty_port port; |
| 373 | unsigned int closing_wait; /* msec */ | ||
| 374 | |||
| 375 | #define USF_CLOSING_WAIT_INF (0) | ||
| 376 | #define USF_CLOSING_WAIT_NONE (~0U) | ||
| 377 | 344 | ||
| 378 | int count; | ||
| 379 | int pm_state; | 345 | int pm_state; |
| 380 | struct uart_info info; | 346 | struct circ_buf xmit; |
| 381 | struct uart_port *port; | ||
| 382 | 347 | ||
| 383 | struct mutex mutex; | 348 | struct tasklet_struct tlet; |
| 349 | struct uart_port *uart_port; | ||
| 384 | }; | 350 | }; |
| 385 | 351 | ||
| 386 | #define UART_XMIT_SIZE PAGE_SIZE | 352 | #define UART_XMIT_SIZE PAGE_SIZE |
| @@ -461,7 +427,7 @@ int uart_resume_port(struct uart_driver *reg, struct uart_port *port); | |||
| 461 | 427 | ||
| 462 | static inline int uart_tx_stopped(struct uart_port *port) | 428 | static inline int uart_tx_stopped(struct uart_port *port) |
| 463 | { | 429 | { |
| 464 | struct tty_struct *tty = port->info->port.tty; | 430 | struct tty_struct *tty = port->state->port.tty; |
| 465 | if(tty->stopped || tty->hw_stopped) | 431 | if(tty->stopped || tty->hw_stopped) |
| 466 | return 1; | 432 | return 1; |
| 467 | return 0; | 433 | return 0; |
| @@ -476,7 +442,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) | |||
| 476 | #ifdef SUPPORT_SYSRQ | 442 | #ifdef SUPPORT_SYSRQ |
| 477 | if (port->sysrq) { | 443 | if (port->sysrq) { |
| 478 | if (ch && time_before(jiffies, port->sysrq)) { | 444 | if (ch && time_before(jiffies, port->sysrq)) { |
| 479 | handle_sysrq(ch, port->info->port.tty); | 445 | handle_sysrq(ch, port->state->port.tty); |
| 480 | port->sysrq = 0; | 446 | port->sysrq = 0; |
| 481 | return 1; | 447 | return 1; |
| 482 | } | 448 | } |
| @@ -494,7 +460,7 @@ uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) | |||
| 494 | */ | 460 | */ |
| 495 | static inline int uart_handle_break(struct uart_port *port) | 461 | static inline int uart_handle_break(struct uart_port *port) |
| 496 | { | 462 | { |
| 497 | struct uart_info *info = port->info; | 463 | struct uart_state *state = port->state; |
| 498 | #ifdef SUPPORT_SYSRQ | 464 | #ifdef SUPPORT_SYSRQ |
| 499 | if (port->cons && port->cons->index == port->line) { | 465 | if (port->cons && port->cons->index == port->line) { |
| 500 | if (!port->sysrq) { | 466 | if (!port->sysrq) { |
| @@ -505,7 +471,7 @@ static inline int uart_handle_break(struct uart_port *port) | |||
| 505 | } | 471 | } |
| 506 | #endif | 472 | #endif |
| 507 | if (port->flags & UPF_SAK) | 473 | if (port->flags & UPF_SAK) |
| 508 | do_SAK(info->port.tty); | 474 | do_SAK(state->port.tty); |
| 509 | return 0; | 475 | return 0; |
| 510 | } | 476 | } |
| 511 | 477 | ||
| @@ -515,22 +481,23 @@ static inline int uart_handle_break(struct uart_port *port) | |||
| 515 | * @status: new carrier detect status, nonzero if active | 481 | * @status: new carrier detect status, nonzero if active |
| 516 | */ | 482 | */ |
| 517 | static inline void | 483 | static inline void |
| 518 | uart_handle_dcd_change(struct uart_port *port, unsigned int status) | 484 | uart_handle_dcd_change(struct uart_port *uport, unsigned int status) |
| 519 | { | 485 | { |
| 520 | struct uart_info *info = port->info; | 486 | struct uart_state *state = uport->state; |
| 487 | struct tty_port *port = &state->port; | ||
| 521 | 488 | ||
| 522 | port->icount.dcd++; | 489 | uport->icount.dcd++; |
| 523 | 490 | ||
| 524 | #ifdef CONFIG_HARD_PPS | 491 | #ifdef CONFIG_HARD_PPS |
| 525 | if ((port->flags & UPF_HARDPPS_CD) && status) | 492 | if ((uport->flags & UPF_HARDPPS_CD) && status) |
| 526 | hardpps(); | 493 | hardpps(); |
| 527 | #endif | 494 | #endif |
| 528 | 495 | ||
| 529 | if (info->flags & UIF_CHECK_CD) { | 496 | if (port->flags & ASYNC_CHECK_CD) { |
| 530 | if (status) | 497 | if (status) |
| 531 | wake_up_interruptible(&info->port.open_wait); | 498 | wake_up_interruptible(&port->open_wait); |
| 532 | else if (info->port.tty) | 499 | else if (port->tty) |
| 533 | tty_hangup(info->port.tty); | 500 | tty_hangup(port->tty); |
| 534 | } | 501 | } |
| 535 | } | 502 | } |
| 536 | 503 | ||
| @@ -540,24 +507,24 @@ uart_handle_dcd_change(struct uart_port *port, unsigned int status) | |||
| 540 | * @status: new clear to send status, nonzero if active | 507 | * @status: new clear to send status, nonzero if active |
| 541 | */ | 508 | */ |
| 542 | static inline void | 509 | static inline void |
| 543 | uart_handle_cts_change(struct uart_port *port, unsigned int status) | 510 | uart_handle_cts_change(struct uart_port *uport, unsigned int status) |
| 544 | { | 511 | { |
| 545 | struct uart_info *info = port->info; | 512 | struct tty_port *port = &uport->state->port; |
| 546 | struct tty_struct *tty = info->port.tty; | 513 | struct tty_struct *tty = port->tty; |
| 547 | 514 | ||
| 548 | port->icount.cts++; | 515 | uport->icount.cts++; |
| 549 | 516 | ||
| 550 | if (info->flags & UIF_CTS_FLOW) { | 517 | if (port->flags & ASYNC_CTS_FLOW) { |
| 551 | if (tty->hw_stopped) { | 518 | if (tty->hw_stopped) { |
| 552 | if (status) { | 519 | if (status) { |
| 553 | tty->hw_stopped = 0; | 520 | tty->hw_stopped = 0; |
| 554 | port->ops->start_tx(port); | 521 | uport->ops->start_tx(uport); |
| 555 | uart_write_wakeup(port); | 522 | uart_write_wakeup(uport); |
| 556 | } | 523 | } |
| 557 | } else { | 524 | } else { |
| 558 | if (!status) { | 525 | if (!status) { |
| 559 | tty->hw_stopped = 1; | 526 | tty->hw_stopped = 1; |
| 560 | port->ops->stop_tx(port); | 527 | uport->ops->stop_tx(uport); |
| 561 | } | 528 | } |
| 562 | } | 529 | } |
| 563 | } | 530 | } |
| @@ -569,7 +536,7 @@ static inline void | |||
| 569 | uart_insert_char(struct uart_port *port, unsigned int status, | 536 | uart_insert_char(struct uart_port *port, unsigned int status, |
| 570 | unsigned int overrun, unsigned int ch, unsigned int flag) | 537 | unsigned int overrun, unsigned int ch, unsigned int flag) |
| 571 | { | 538 | { |
| 572 | struct tty_struct *tty = port->info->port.tty; | 539 | struct tty_struct *tty = port->state->port.tty; |
| 573 | 540 | ||
| 574 | if ((status & port->ignore_status_mask & ~overrun) == 0) | 541 | if ((status & port->ignore_status_mask & ~overrun) == 0) |
| 575 | tty_insert_flip_char(tty, ch, flag); | 542 | tty_insert_flip_char(tty, ch, flag); |
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h index eb1423a0078d..68e212ff9dde 100644 --- a/include/linux/sh_intc.h +++ b/include/linux/sh_intc.h | |||
| @@ -85,7 +85,6 @@ struct intc_desc symbol __initdata = { \ | |||
| 85 | } | 85 | } |
| 86 | #endif | 86 | #endif |
| 87 | 87 | ||
| 88 | unsigned int intc_evt2irq(unsigned int vector); | ||
| 89 | void __init register_intc_controller(struct intc_desc *desc); | 88 | void __init register_intc_controller(struct intc_desc *desc); |
| 90 | int intc_set_priority(unsigned int irq, unsigned int prio); | 89 | int intc_set_priority(unsigned int irq, unsigned int prio); |
| 91 | 90 | ||
diff --git a/include/linux/taskstats_kern.h b/include/linux/taskstats_kern.h index 7e9680f4afdd..3398f4553269 100644 --- a/include/linux/taskstats_kern.h +++ b/include/linux/taskstats_kern.h | |||
| @@ -9,7 +9,6 @@ | |||
| 9 | 9 | ||
| 10 | #include <linux/taskstats.h> | 10 | #include <linux/taskstats.h> |
| 11 | #include <linux/sched.h> | 11 | #include <linux/sched.h> |
| 12 | #include <net/genetlink.h> | ||
| 13 | 12 | ||
| 14 | #ifdef CONFIG_TASKSTATS | 13 | #ifdef CONFIG_TASKSTATS |
| 15 | extern struct kmem_cache *taskstats_cache; | 14 | extern struct kmem_cache *taskstats_cache; |
diff --git a/include/linux/time.h b/include/linux/time.h index ea16c1a01d51..56787c093345 100644 --- a/include/linux/time.h +++ b/include/linux/time.h | |||
| @@ -75,7 +75,7 @@ extern unsigned long mktime(const unsigned int year, const unsigned int mon, | |||
| 75 | const unsigned int day, const unsigned int hour, | 75 | const unsigned int day, const unsigned int hour, |
| 76 | const unsigned int min, const unsigned int sec); | 76 | const unsigned int min, const unsigned int sec); |
| 77 | 77 | ||
| 78 | extern void set_normalized_timespec(struct timespec *ts, time_t sec, long nsec); | 78 | extern void set_normalized_timespec(struct timespec *ts, time_t sec, s64 nsec); |
| 79 | extern struct timespec timespec_add_safe(const struct timespec lhs, | 79 | extern struct timespec timespec_add_safe(const struct timespec lhs, |
| 80 | const struct timespec rhs); | 80 | const struct timespec rhs); |
| 81 | 81 | ||
| @@ -101,7 +101,8 @@ extern struct timespec xtime; | |||
| 101 | extern struct timespec wall_to_monotonic; | 101 | extern struct timespec wall_to_monotonic; |
| 102 | extern seqlock_t xtime_lock; | 102 | extern seqlock_t xtime_lock; |
| 103 | 103 | ||
| 104 | extern unsigned long read_persistent_clock(void); | 104 | extern void read_persistent_clock(struct timespec *ts); |
| 105 | extern void read_boot_clock(struct timespec *ts); | ||
| 105 | extern int update_persistent_clock(struct timespec now); | 106 | extern int update_persistent_clock(struct timespec now); |
| 106 | extern int no_sync_cmos_clock __read_mostly; | 107 | extern int no_sync_cmos_clock __read_mostly; |
| 107 | void timekeeping_init(void); | 108 | void timekeeping_init(void); |
| @@ -109,6 +110,8 @@ extern int timekeeping_suspended; | |||
| 109 | 110 | ||
| 110 | unsigned long get_seconds(void); | 111 | unsigned long get_seconds(void); |
| 111 | struct timespec current_kernel_time(void); | 112 | struct timespec current_kernel_time(void); |
| 113 | struct timespec __current_kernel_time(void); /* does not hold xtime_lock */ | ||
| 114 | struct timespec get_monotonic_coarse(void); | ||
| 112 | 115 | ||
| 113 | #define CURRENT_TIME (current_kernel_time()) | 116 | #define CURRENT_TIME (current_kernel_time()) |
| 114 | #define CURRENT_TIME_SEC ((struct timespec) { get_seconds(), 0 }) | 117 | #define CURRENT_TIME_SEC ((struct timespec) { get_seconds(), 0 }) |
| @@ -147,6 +150,7 @@ extern struct timespec timespec_trunc(struct timespec t, unsigned gran); | |||
| 147 | extern int timekeeping_valid_for_hres(void); | 150 | extern int timekeeping_valid_for_hres(void); |
| 148 | extern void update_wall_time(void); | 151 | extern void update_wall_time(void); |
| 149 | extern void update_xtime_cache(u64 nsec); | 152 | extern void update_xtime_cache(u64 nsec); |
| 153 | extern void timekeeping_leap_insert(int leapsecond); | ||
| 150 | 154 | ||
| 151 | struct tms; | 155 | struct tms; |
| 152 | extern void do_sys_times(struct tms *); | 156 | extern void do_sys_times(struct tms *); |
| @@ -241,6 +245,8 @@ struct itimerval { | |||
| 241 | #define CLOCK_PROCESS_CPUTIME_ID 2 | 245 | #define CLOCK_PROCESS_CPUTIME_ID 2 |
| 242 | #define CLOCK_THREAD_CPUTIME_ID 3 | 246 | #define CLOCK_THREAD_CPUTIME_ID 3 |
| 243 | #define CLOCK_MONOTONIC_RAW 4 | 247 | #define CLOCK_MONOTONIC_RAW 4 |
| 248 | #define CLOCK_REALTIME_COARSE 5 | ||
| 249 | #define CLOCK_MONOTONIC_COARSE 6 | ||
| 244 | 250 | ||
| 245 | /* | 251 | /* |
| 246 | * The IDs of various hardware clocks: | 252 | * The IDs of various hardware clocks: |
diff --git a/include/linux/timer.h b/include/linux/timer.h index be62ec2ebea5..a2d1eb6cb3f0 100644 --- a/include/linux/timer.h +++ b/include/linux/timer.h | |||
| @@ -175,11 +175,6 @@ extern int mod_timer_pinned(struct timer_list *timer, unsigned long expires); | |||
| 175 | 175 | ||
| 176 | /* | 176 | /* |
| 177 | * Return when the next timer-wheel timeout occurs (in absolute jiffies), | 177 | * Return when the next timer-wheel timeout occurs (in absolute jiffies), |
| 178 | * locks the timer base: | ||
| 179 | */ | ||
| 180 | extern unsigned long next_timer_interrupt(void); | ||
| 181 | /* | ||
| 182 | * Return when the next timer-wheel timeout occurs (in absolute jiffies), | ||
| 183 | * locks the timer base and does the comparison against the given | 178 | * locks the timer base and does the comparison against the given |
| 184 | * jiffie. | 179 | * jiffie. |
| 185 | */ | 180 | */ |
diff --git a/include/linux/tty.h b/include/linux/tty.h index a916a318004e..f0f43d08d8b8 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h | |||
| @@ -187,7 +187,12 @@ struct tty_port; | |||
| 187 | struct tty_port_operations { | 187 | struct tty_port_operations { |
| 188 | /* Return 1 if the carrier is raised */ | 188 | /* Return 1 if the carrier is raised */ |
| 189 | int (*carrier_raised)(struct tty_port *port); | 189 | int (*carrier_raised)(struct tty_port *port); |
| 190 | /* Control the DTR line */ | ||
| 190 | void (*dtr_rts)(struct tty_port *port, int raise); | 191 | void (*dtr_rts)(struct tty_port *port, int raise); |
| 192 | /* Called when the last close completes or a hangup finishes | ||
| 193 | IFF the port was initialized. Do not use to free resources */ | ||
| 194 | void (*shutdown)(struct tty_port *port); | ||
| 195 | void (*drop)(struct tty_port *port); | ||
| 191 | }; | 196 | }; |
| 192 | 197 | ||
| 193 | struct tty_port { | 198 | struct tty_port { |
| @@ -198,11 +203,12 @@ struct tty_port { | |||
| 198 | int count; /* Usage count */ | 203 | int count; /* Usage count */ |
| 199 | wait_queue_head_t open_wait; /* Open waiters */ | 204 | wait_queue_head_t open_wait; /* Open waiters */ |
| 200 | wait_queue_head_t close_wait; /* Close waiters */ | 205 | wait_queue_head_t close_wait; /* Close waiters */ |
| 206 | wait_queue_head_t delta_msr_wait; /* Modem status change */ | ||
| 201 | unsigned long flags; /* TTY flags ASY_*/ | 207 | unsigned long flags; /* TTY flags ASY_*/ |
| 202 | struct mutex mutex; /* Locking */ | 208 | struct mutex mutex; /* Locking */ |
| 203 | unsigned char *xmit_buf; /* Optional buffer */ | 209 | unsigned char *xmit_buf; /* Optional buffer */ |
| 204 | int close_delay; /* Close port delay */ | 210 | unsigned int close_delay; /* Close port delay */ |
| 205 | int closing_wait; /* Delay for output */ | 211 | unsigned int closing_wait; /* Delay for output */ |
| 206 | int drain_delay; /* Set to zero if no pure time | 212 | int drain_delay; /* Set to zero if no pure time |
| 207 | based drain is needed else | 213 | based drain is needed else |
| 208 | set to size of fifo */ | 214 | set to size of fifo */ |
| @@ -459,6 +465,12 @@ extern int tty_port_block_til_ready(struct tty_port *port, | |||
| 459 | extern int tty_port_close_start(struct tty_port *port, | 465 | extern int tty_port_close_start(struct tty_port *port, |
| 460 | struct tty_struct *tty, struct file *filp); | 466 | struct tty_struct *tty, struct file *filp); |
| 461 | extern void tty_port_close_end(struct tty_port *port, struct tty_struct *tty); | 467 | extern void tty_port_close_end(struct tty_port *port, struct tty_struct *tty); |
| 468 | extern void tty_port_close(struct tty_port *port, | ||
| 469 | struct tty_struct *tty, struct file *filp); | ||
| 470 | extern inline int tty_port_users(struct tty_port *port) | ||
| 471 | { | ||
| 472 | return port->count + port->blocked_open; | ||
| 473 | } | ||
| 462 | 474 | ||
| 463 | extern int tty_register_ldisc(int disc, struct tty_ldisc_ops *new_ldisc); | 475 | extern int tty_register_ldisc(int disc, struct tty_ldisc_ops *new_ldisc); |
| 464 | extern int tty_unregister_ldisc(int disc); | 476 | extern int tty_unregister_ldisc(int disc); |
| @@ -524,5 +536,8 @@ extern int pcxe_open(struct tty_struct *tty, struct file *filp); | |||
| 524 | extern int vt_ioctl(struct tty_struct *tty, struct file *file, | 536 | extern int vt_ioctl(struct tty_struct *tty, struct file *file, |
| 525 | unsigned int cmd, unsigned long arg); | 537 | unsigned int cmd, unsigned long arg); |
| 526 | 538 | ||
| 539 | extern long vt_compat_ioctl(struct tty_struct *tty, struct file * file, | ||
| 540 | unsigned int cmd, unsigned long arg); | ||
| 541 | |||
| 527 | #endif /* __KERNEL__ */ | 542 | #endif /* __KERNEL__ */ |
| 528 | #endif | 543 | #endif |
diff --git a/include/linux/usb.h b/include/linux/usb.h index b1e3c2fbfe11..a8fe05f224e5 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h | |||
| @@ -922,7 +922,7 @@ extern struct bus_type usb_bus_type; | |||
| 922 | /** | 922 | /** |
| 923 | * struct usb_class_driver - identifies a USB driver that wants to use the USB major number | 923 | * struct usb_class_driver - identifies a USB driver that wants to use the USB major number |
| 924 | * @name: the usb class device name for this driver. Will show up in sysfs. | 924 | * @name: the usb class device name for this driver. Will show up in sysfs. |
| 925 | * @nodename: Callback to provide a naming hint for a possible | 925 | * @devnode: Callback to provide a naming hint for a possible |
| 926 | * device node to create. | 926 | * device node to create. |
| 927 | * @fops: pointer to the struct file_operations of this driver. | 927 | * @fops: pointer to the struct file_operations of this driver. |
| 928 | * @minor_base: the start of the minor range for this driver. | 928 | * @minor_base: the start of the minor range for this driver. |
| @@ -933,7 +933,7 @@ extern struct bus_type usb_bus_type; | |||
| 933 | */ | 933 | */ |
| 934 | struct usb_class_driver { | 934 | struct usb_class_driver { |
| 935 | char *name; | 935 | char *name; |
| 936 | char *(*nodename)(struct device *dev); | 936 | char *(*devnode)(struct device *dev, mode_t *mode); |
| 937 | const struct file_operations *fops; | 937 | const struct file_operations *fops; |
| 938 | int minor_base; | 938 | int minor_base; |
| 939 | }; | 939 | }; |
diff --git a/include/linux/usb/m66592.h b/include/linux/usb/m66592.h new file mode 100644 index 000000000000..cda9625e7df0 --- /dev/null +++ b/include/linux/usb/m66592.h | |||
| @@ -0,0 +1,44 @@ | |||
| 1 | /* | ||
| 2 | * M66592 driver platform data | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Renesas Solutions Corp. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; version 2 of the License. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 18 | * | ||
| 19 | */ | ||
| 20 | |||
| 21 | #ifndef __LINUX_USB_M66592_H | ||
| 22 | #define __LINUX_USB_M66592_H | ||
| 23 | |||
| 24 | #define M66592_PLATDATA_XTAL_12MHZ 0x01 | ||
| 25 | #define M66592_PLATDATA_XTAL_24MHZ 0x02 | ||
| 26 | #define M66592_PLATDATA_XTAL_48MHZ 0x03 | ||
| 27 | |||
| 28 | struct m66592_platdata { | ||
| 29 | /* one = on chip controller, zero = external controller */ | ||
| 30 | unsigned on_chip:1; | ||
| 31 | |||
| 32 | /* one = big endian, zero = little endian */ | ||
| 33 | unsigned endian:1; | ||
| 34 | |||
| 35 | /* (external controller only) M66592_PLATDATA_XTAL_nnMHZ */ | ||
| 36 | unsigned xtal:2; | ||
| 37 | |||
| 38 | /* (external controller only) one = 3.3V, zero = 1.5V */ | ||
| 39 | unsigned vif:1; | ||
| 40 | |||
| 41 | }; | ||
| 42 | |||
| 43 | #endif /* __LINUX_USB_M66592_H */ | ||
| 44 | |||
diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h index e9f0384fa20c..26d216734057 100644 --- a/include/linux/usb/r8a66597.h +++ b/include/linux/usb/r8a66597.h | |||
| @@ -28,9 +28,12 @@ | |||
| 28 | #define R8A66597_PLATDATA_XTAL_48MHZ 0x03 | 28 | #define R8A66597_PLATDATA_XTAL_48MHZ 0x03 |
| 29 | 29 | ||
| 30 | struct r8a66597_platdata { | 30 | struct r8a66597_platdata { |
| 31 | /* This ops can controll port power instead of DVSTCTR register. */ | 31 | /* This callback can control port power instead of DVSTCTR register. */ |
| 32 | void (*port_power)(int port, int power); | 32 | void (*port_power)(int port, int power); |
| 33 | 33 | ||
| 34 | /* set one = on chip controller, set zero = external controller */ | ||
| 35 | unsigned on_chip:1; | ||
| 36 | |||
| 34 | /* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */ | 37 | /* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */ |
| 35 | unsigned xtal:2; | 38 | unsigned xtal:2; |
| 36 | 39 | ||
| @@ -40,5 +43,373 @@ struct r8a66597_platdata { | |||
| 40 | /* set one = big endian, set zero = little endian */ | 43 | /* set one = big endian, set zero = little endian */ |
| 41 | unsigned endian:1; | 44 | unsigned endian:1; |
| 42 | }; | 45 | }; |
| 43 | #endif | 46 | |
| 47 | /* Register definitions */ | ||
| 48 | #define SYSCFG0 0x00 | ||
| 49 | #define SYSCFG1 0x02 | ||
| 50 | #define SYSSTS0 0x04 | ||
| 51 | #define SYSSTS1 0x06 | ||
| 52 | #define DVSTCTR0 0x08 | ||
| 53 | #define DVSTCTR1 0x0A | ||
| 54 | #define TESTMODE 0x0C | ||
| 55 | #define PINCFG 0x0E | ||
| 56 | #define DMA0CFG 0x10 | ||
| 57 | #define DMA1CFG 0x12 | ||
| 58 | #define CFIFO 0x14 | ||
| 59 | #define D0FIFO 0x18 | ||
| 60 | #define D1FIFO 0x1C | ||
| 61 | #define CFIFOSEL 0x20 | ||
| 62 | #define CFIFOCTR 0x22 | ||
| 63 | #define CFIFOSIE 0x24 | ||
| 64 | #define D0FIFOSEL 0x28 | ||
| 65 | #define D0FIFOCTR 0x2A | ||
| 66 | #define D1FIFOSEL 0x2C | ||
| 67 | #define D1FIFOCTR 0x2E | ||
| 68 | #define INTENB0 0x30 | ||
| 69 | #define INTENB1 0x32 | ||
| 70 | #define INTENB2 0x34 | ||
| 71 | #define BRDYENB 0x36 | ||
| 72 | #define NRDYENB 0x38 | ||
| 73 | #define BEMPENB 0x3A | ||
| 74 | #define SOFCFG 0x3C | ||
| 75 | #define INTSTS0 0x40 | ||
| 76 | #define INTSTS1 0x42 | ||
| 77 | #define INTSTS2 0x44 | ||
| 78 | #define BRDYSTS 0x46 | ||
| 79 | #define NRDYSTS 0x48 | ||
| 80 | #define BEMPSTS 0x4A | ||
| 81 | #define FRMNUM 0x4C | ||
| 82 | #define UFRMNUM 0x4E | ||
| 83 | #define USBADDR 0x50 | ||
| 84 | #define USBREQ 0x54 | ||
| 85 | #define USBVAL 0x56 | ||
| 86 | #define USBINDX 0x58 | ||
| 87 | #define USBLENG 0x5A | ||
| 88 | #define DCPCFG 0x5C | ||
| 89 | #define DCPMAXP 0x5E | ||
| 90 | #define DCPCTR 0x60 | ||
| 91 | #define PIPESEL 0x64 | ||
| 92 | #define PIPECFG 0x68 | ||
| 93 | #define PIPEBUF 0x6A | ||
| 94 | #define PIPEMAXP 0x6C | ||
| 95 | #define PIPEPERI 0x6E | ||
| 96 | #define PIPE1CTR 0x70 | ||
| 97 | #define PIPE2CTR 0x72 | ||
| 98 | #define PIPE3CTR 0x74 | ||
| 99 | #define PIPE4CTR 0x76 | ||
| 100 | #define PIPE5CTR 0x78 | ||
| 101 | #define PIPE6CTR 0x7A | ||
| 102 | #define PIPE7CTR 0x7C | ||
| 103 | #define PIPE8CTR 0x7E | ||
| 104 | #define PIPE9CTR 0x80 | ||
| 105 | #define PIPE1TRE 0x90 | ||
| 106 | #define PIPE1TRN 0x92 | ||
| 107 | #define PIPE2TRE 0x94 | ||
| 108 | #define PIPE2TRN 0x96 | ||
| 109 | #define PIPE3TRE 0x98 | ||
| 110 | #define PIPE3TRN 0x9A | ||
| 111 | #define PIPE4TRE 0x9C | ||
| 112 | #define PIPE4TRN 0x9E | ||
| 113 | #define PIPE5TRE 0xA0 | ||
| 114 | #define PIPE5TRN 0xA2 | ||
| 115 | #define DEVADD0 0xD0 | ||
| 116 | #define DEVADD1 0xD2 | ||
| 117 | #define DEVADD2 0xD4 | ||
| 118 | #define DEVADD3 0xD6 | ||
| 119 | #define DEVADD4 0xD8 | ||
| 120 | #define DEVADD5 0xDA | ||
| 121 | #define DEVADD6 0xDC | ||
| 122 | #define DEVADD7 0xDE | ||
| 123 | #define DEVADD8 0xE0 | ||
| 124 | #define DEVADD9 0xE2 | ||
| 125 | #define DEVADDA 0xE4 | ||
| 126 | |||
| 127 | /* System Configuration Control Register */ | ||
| 128 | #define XTAL 0xC000 /* b15-14: Crystal selection */ | ||
| 129 | #define XTAL48 0x8000 /* 48MHz */ | ||
| 130 | #define XTAL24 0x4000 /* 24MHz */ | ||
| 131 | #define XTAL12 0x0000 /* 12MHz */ | ||
| 132 | #define XCKE 0x2000 /* b13: External clock enable */ | ||
| 133 | #define PLLC 0x0800 /* b11: PLL control */ | ||
| 134 | #define SCKE 0x0400 /* b10: USB clock enable */ | ||
| 135 | #define PCSDIS 0x0200 /* b9: not CS wakeup */ | ||
| 136 | #define LPSME 0x0100 /* b8: Low power sleep mode */ | ||
| 137 | #define HSE 0x0080 /* b7: Hi-speed enable */ | ||
| 138 | #define DCFM 0x0040 /* b6: Controller function select */ | ||
| 139 | #define DRPD 0x0020 /* b5: D+/- pull down control */ | ||
| 140 | #define DPRPU 0x0010 /* b4: D+ pull up control */ | ||
| 141 | #define USBE 0x0001 /* b0: USB module operation enable */ | ||
| 142 | |||
| 143 | /* System Configuration Status Register */ | ||
| 144 | #define OVCBIT 0x8000 /* b15-14: Over-current bit */ | ||
| 145 | #define OVCMON 0xC000 /* b15-14: Over-current monitor */ | ||
| 146 | #define SOFEA 0x0020 /* b5: SOF monitor */ | ||
| 147 | #define IDMON 0x0004 /* b3: ID-pin monitor */ | ||
| 148 | #define LNST 0x0003 /* b1-0: D+, D- line status */ | ||
| 149 | #define SE1 0x0003 /* SE1 */ | ||
| 150 | #define FS_KSTS 0x0002 /* Full-Speed K State */ | ||
| 151 | #define FS_JSTS 0x0001 /* Full-Speed J State */ | ||
| 152 | #define LS_JSTS 0x0002 /* Low-Speed J State */ | ||
| 153 | #define LS_KSTS 0x0001 /* Low-Speed K State */ | ||
| 154 | #define SE0 0x0000 /* SE0 */ | ||
| 155 | |||
| 156 | /* Device State Control Register */ | ||
| 157 | #define EXTLP0 0x0400 /* b10: External port */ | ||
| 158 | #define VBOUT 0x0200 /* b9: VBUS output */ | ||
| 159 | #define WKUP 0x0100 /* b8: Remote wakeup */ | ||
| 160 | #define RWUPE 0x0080 /* b7: Remote wakeup sense */ | ||
| 161 | #define USBRST 0x0040 /* b6: USB reset enable */ | ||
| 162 | #define RESUME 0x0020 /* b5: Resume enable */ | ||
| 163 | #define UACT 0x0010 /* b4: USB bus enable */ | ||
| 164 | #define RHST 0x0007 /* b1-0: Reset handshake status */ | ||
| 165 | #define HSPROC 0x0004 /* HS handshake is processing */ | ||
| 166 | #define HSMODE 0x0003 /* Hi-Speed mode */ | ||
| 167 | #define FSMODE 0x0002 /* Full-Speed mode */ | ||
| 168 | #define LSMODE 0x0001 /* Low-Speed mode */ | ||
| 169 | #define UNDECID 0x0000 /* Undecided */ | ||
| 170 | |||
| 171 | /* Test Mode Register */ | ||
| 172 | #define UTST 0x000F /* b3-0: Test select */ | ||
| 173 | #define H_TST_PACKET 0x000C /* HOST TEST Packet */ | ||
| 174 | #define H_TST_SE0_NAK 0x000B /* HOST TEST SE0 NAK */ | ||
| 175 | #define H_TST_K 0x000A /* HOST TEST K */ | ||
| 176 | #define H_TST_J 0x0009 /* HOST TEST J */ | ||
| 177 | #define H_TST_NORMAL 0x0000 /* HOST Normal Mode */ | ||
| 178 | #define P_TST_PACKET 0x0004 /* PERI TEST Packet */ | ||
| 179 | #define P_TST_SE0_NAK 0x0003 /* PERI TEST SE0 NAK */ | ||
| 180 | #define P_TST_K 0x0002 /* PERI TEST K */ | ||
| 181 | #define P_TST_J 0x0001 /* PERI TEST J */ | ||
| 182 | #define P_TST_NORMAL 0x0000 /* PERI Normal Mode */ | ||
| 183 | |||
| 184 | /* Data Pin Configuration Register */ | ||
| 185 | #define LDRV 0x8000 /* b15: Drive Current Adjust */ | ||
| 186 | #define VIF1 0x0000 /* VIF = 1.8V */ | ||
| 187 | #define VIF3 0x8000 /* VIF = 3.3V */ | ||
| 188 | #define INTA 0x0001 /* b1: USB INT-pin active */ | ||
| 189 | |||
| 190 | /* DMAx Pin Configuration Register */ | ||
| 191 | #define DREQA 0x4000 /* b14: Dreq active select */ | ||
| 192 | #define BURST 0x2000 /* b13: Burst mode */ | ||
| 193 | #define DACKA 0x0400 /* b10: Dack active select */ | ||
| 194 | #define DFORM 0x0380 /* b9-7: DMA mode select */ | ||
| 195 | #define CPU_ADR_RD_WR 0x0000 /* Address + RD/WR mode (CPU bus) */ | ||
| 196 | #define CPU_DACK_RD_WR 0x0100 /* DACK + RD/WR mode (CPU bus) */ | ||
| 197 | #define CPU_DACK_ONLY 0x0180 /* DACK only mode (CPU bus) */ | ||
| 198 | #define SPLIT_DACK_ONLY 0x0200 /* DACK only mode (SPLIT bus) */ | ||
| 199 | #define DENDA 0x0040 /* b6: Dend active select */ | ||
| 200 | #define PKTM 0x0020 /* b5: Packet mode */ | ||
| 201 | #define DENDE 0x0010 /* b4: Dend enable */ | ||
| 202 | #define OBUS 0x0004 /* b2: OUTbus mode */ | ||
| 203 | |||
| 204 | /* CFIFO/DxFIFO Port Select Register */ | ||
| 205 | #define RCNT 0x8000 /* b15: Read count mode */ | ||
| 206 | #define REW 0x4000 /* b14: Buffer rewind */ | ||
| 207 | #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ | ||
| 208 | #define DREQE 0x1000 /* b12: DREQ output enable */ | ||
| 209 | #define MBW_8 0x0000 /* 8bit */ | ||
| 210 | #define MBW_16 0x0400 /* 16bit */ | ||
| 211 | #define MBW_32 0x0800 /* 32bit */ | ||
| 212 | #define BIGEND 0x0100 /* b8: Big endian mode */ | ||
| 213 | #define BYTE_LITTLE 0x0000 /* little dendian */ | ||
| 214 | #define BYTE_BIG 0x0100 /* big endifan */ | ||
| 215 | #define ISEL 0x0020 /* b5: DCP FIFO port direction select */ | ||
| 216 | #define CURPIPE 0x000F /* b2-0: PIPE select */ | ||
| 217 | |||
| 218 | /* CFIFO/DxFIFO Port Control Register */ | ||
| 219 | #define BVAL 0x8000 /* b15: Buffer valid flag */ | ||
| 220 | #define BCLR 0x4000 /* b14: Buffer clear */ | ||
| 221 | #define FRDY 0x2000 /* b13: FIFO ready */ | ||
| 222 | #define DTLN 0x0FFF /* b11-0: FIFO received data length */ | ||
| 223 | |||
| 224 | /* Interrupt Enable Register 0 */ | ||
| 225 | #define VBSE 0x8000 /* b15: VBUS interrupt */ | ||
| 226 | #define RSME 0x4000 /* b14: Resume interrupt */ | ||
| 227 | #define SOFE 0x2000 /* b13: Frame update interrupt */ | ||
| 228 | #define DVSE 0x1000 /* b12: Device state transition interrupt */ | ||
| 229 | #define CTRE 0x0800 /* b11: Control transfer stage transition interrupt */ | ||
| 230 | #define BEMPE 0x0400 /* b10: Buffer empty interrupt */ | ||
| 231 | #define NRDYE 0x0200 /* b9: Buffer not ready interrupt */ | ||
| 232 | #define BRDYE 0x0100 /* b8: Buffer ready interrupt */ | ||
| 233 | |||
| 234 | /* Interrupt Enable Register 1 */ | ||
| 235 | #define OVRCRE 0x8000 /* b15: Over-current interrupt */ | ||
| 236 | #define BCHGE 0x4000 /* b14: USB us chenge interrupt */ | ||
| 237 | #define DTCHE 0x1000 /* b12: Detach sense interrupt */ | ||
| 238 | #define ATTCHE 0x0800 /* b11: Attach sense interrupt */ | ||
| 239 | #define EOFERRE 0x0040 /* b6: EOF error interrupt */ | ||
| 240 | #define SIGNE 0x0020 /* b5: SETUP IGNORE interrupt */ | ||
| 241 | #define SACKE 0x0010 /* b4: SETUP ACK interrupt */ | ||
| 242 | |||
| 243 | /* BRDY Interrupt Enable/Status Register */ | ||
| 244 | #define BRDY9 0x0200 /* b9: PIPE9 */ | ||
| 245 | #define BRDY8 0x0100 /* b8: PIPE8 */ | ||
| 246 | #define BRDY7 0x0080 /* b7: PIPE7 */ | ||
| 247 | #define BRDY6 0x0040 /* b6: PIPE6 */ | ||
| 248 | #define BRDY5 0x0020 /* b5: PIPE5 */ | ||
| 249 | #define BRDY4 0x0010 /* b4: PIPE4 */ | ||
| 250 | #define BRDY3 0x0008 /* b3: PIPE3 */ | ||
| 251 | #define BRDY2 0x0004 /* b2: PIPE2 */ | ||
| 252 | #define BRDY1 0x0002 /* b1: PIPE1 */ | ||
| 253 | #define BRDY0 0x0001 /* b1: PIPE0 */ | ||
| 254 | |||
| 255 | /* NRDY Interrupt Enable/Status Register */ | ||
| 256 | #define NRDY9 0x0200 /* b9: PIPE9 */ | ||
| 257 | #define NRDY8 0x0100 /* b8: PIPE8 */ | ||
| 258 | #define NRDY7 0x0080 /* b7: PIPE7 */ | ||
| 259 | #define NRDY6 0x0040 /* b6: PIPE6 */ | ||
| 260 | #define NRDY5 0x0020 /* b5: PIPE5 */ | ||
| 261 | #define NRDY4 0x0010 /* b4: PIPE4 */ | ||
| 262 | #define NRDY3 0x0008 /* b3: PIPE3 */ | ||
| 263 | #define NRDY2 0x0004 /* b2: PIPE2 */ | ||
| 264 | #define NRDY1 0x0002 /* b1: PIPE1 */ | ||
| 265 | #define NRDY0 0x0001 /* b1: PIPE0 */ | ||
| 266 | |||
| 267 | /* BEMP Interrupt Enable/Status Register */ | ||
| 268 | #define BEMP9 0x0200 /* b9: PIPE9 */ | ||
| 269 | #define BEMP8 0x0100 /* b8: PIPE8 */ | ||
| 270 | #define BEMP7 0x0080 /* b7: PIPE7 */ | ||
| 271 | #define BEMP6 0x0040 /* b6: PIPE6 */ | ||
| 272 | #define BEMP5 0x0020 /* b5: PIPE5 */ | ||
| 273 | #define BEMP4 0x0010 /* b4: PIPE4 */ | ||
| 274 | #define BEMP3 0x0008 /* b3: PIPE3 */ | ||
| 275 | #define BEMP2 0x0004 /* b2: PIPE2 */ | ||
| 276 | #define BEMP1 0x0002 /* b1: PIPE1 */ | ||
| 277 | #define BEMP0 0x0001 /* b0: PIPE0 */ | ||
| 278 | |||
| 279 | /* SOF Pin Configuration Register */ | ||
| 280 | #define TRNENSEL 0x0100 /* b8: Select transaction enable period */ | ||
| 281 | #define BRDYM 0x0040 /* b6: BRDY clear timing */ | ||
| 282 | #define INTL 0x0020 /* b5: Interrupt sense select */ | ||
| 283 | #define EDGESTS 0x0010 /* b4: */ | ||
| 284 | #define SOFMODE 0x000C /* b3-2: SOF pin select */ | ||
| 285 | #define SOF_125US 0x0008 /* SOF OUT 125us Frame Signal */ | ||
| 286 | #define SOF_1MS 0x0004 /* SOF OUT 1ms Frame Signal */ | ||
| 287 | #define SOF_DISABLE 0x0000 /* SOF OUT Disable */ | ||
| 288 | |||
| 289 | /* Interrupt Status Register 0 */ | ||
| 290 | #define VBINT 0x8000 /* b15: VBUS interrupt */ | ||
| 291 | #define RESM 0x4000 /* b14: Resume interrupt */ | ||
| 292 | #define SOFR 0x2000 /* b13: SOF frame update interrupt */ | ||
| 293 | #define DVST 0x1000 /* b12: Device state transition interrupt */ | ||
| 294 | #define CTRT 0x0800 /* b11: Control transfer stage transition interrupt */ | ||
| 295 | #define BEMP 0x0400 /* b10: Buffer empty interrupt */ | ||
| 296 | #define NRDY 0x0200 /* b9: Buffer not ready interrupt */ | ||
| 297 | #define BRDY 0x0100 /* b8: Buffer ready interrupt */ | ||
| 298 | #define VBSTS 0x0080 /* b7: VBUS input port */ | ||
| 299 | #define DVSQ 0x0070 /* b6-4: Device state */ | ||
| 300 | #define DS_SPD_CNFG 0x0070 /* Suspend Configured */ | ||
| 301 | #define DS_SPD_ADDR 0x0060 /* Suspend Address */ | ||
| 302 | #define DS_SPD_DFLT 0x0050 /* Suspend Default */ | ||
| 303 | #define DS_SPD_POWR 0x0040 /* Suspend Powered */ | ||
| 304 | #define DS_SUSP 0x0040 /* Suspend */ | ||
| 305 | #define DS_CNFG 0x0030 /* Configured */ | ||
| 306 | #define DS_ADDS 0x0020 /* Address */ | ||
| 307 | #define DS_DFLT 0x0010 /* Default */ | ||
| 308 | #define DS_POWR 0x0000 /* Powered */ | ||
| 309 | #define DVSQS 0x0030 /* b5-4: Device state */ | ||
| 310 | #define VALID 0x0008 /* b3: Setup packet detected flag */ | ||
| 311 | #define CTSQ 0x0007 /* b2-0: Control transfer stage */ | ||
| 312 | #define CS_SQER 0x0006 /* Sequence error */ | ||
| 313 | #define CS_WRND 0x0005 /* Control write nodata status stage */ | ||
| 314 | #define CS_WRSS 0x0004 /* Control write status stage */ | ||
| 315 | #define CS_WRDS 0x0003 /* Control write data stage */ | ||
| 316 | #define CS_RDSS 0x0002 /* Control read status stage */ | ||
| 317 | #define CS_RDDS 0x0001 /* Control read data stage */ | ||
| 318 | #define CS_IDST 0x0000 /* Idle or setup stage */ | ||
| 319 | |||
| 320 | /* Interrupt Status Register 1 */ | ||
| 321 | #define OVRCR 0x8000 /* b15: Over-current interrupt */ | ||
| 322 | #define BCHG 0x4000 /* b14: USB bus chenge interrupt */ | ||
| 323 | #define DTCH 0x1000 /* b12: Detach sense interrupt */ | ||
| 324 | #define ATTCH 0x0800 /* b11: Attach sense interrupt */ | ||
| 325 | #define EOFERR 0x0040 /* b6: EOF-error interrupt */ | ||
| 326 | #define SIGN 0x0020 /* b5: Setup ignore interrupt */ | ||
| 327 | #define SACK 0x0010 /* b4: Setup acknowledge interrupt */ | ||
| 328 | |||
| 329 | /* Frame Number Register */ | ||
| 330 | #define OVRN 0x8000 /* b15: Overrun error */ | ||
| 331 | #define CRCE 0x4000 /* b14: Received data error */ | ||
| 332 | #define FRNM 0x07FF /* b10-0: Frame number */ | ||
| 333 | |||
| 334 | /* Micro Frame Number Register */ | ||
| 335 | #define UFRNM 0x0007 /* b2-0: Micro frame number */ | ||
| 336 | |||
| 337 | /* Default Control Pipe Maxpacket Size Register */ | ||
| 338 | /* Pipe Maxpacket Size Register */ | ||
| 339 | #define DEVSEL 0xF000 /* b15-14: Device address select */ | ||
| 340 | #define MAXP 0x007F /* b6-0: Maxpacket size of default control pipe */ | ||
| 341 | |||
| 342 | /* Default Control Pipe Control Register */ | ||
| 343 | #define BSTS 0x8000 /* b15: Buffer status */ | ||
| 344 | #define SUREQ 0x4000 /* b14: Send USB request */ | ||
| 345 | #define CSCLR 0x2000 /* b13: complete-split status clear */ | ||
| 346 | #define CSSTS 0x1000 /* b12: complete-split status */ | ||
| 347 | #define SUREQCLR 0x0800 /* b11: stop setup request */ | ||
| 348 | #define SQCLR 0x0100 /* b8: Sequence toggle bit clear */ | ||
| 349 | #define SQSET 0x0080 /* b7: Sequence toggle bit set */ | ||
| 350 | #define SQMON 0x0040 /* b6: Sequence toggle bit monitor */ | ||
| 351 | #define PBUSY 0x0020 /* b5: pipe busy */ | ||
| 352 | #define PINGE 0x0010 /* b4: ping enable */ | ||
| 353 | #define CCPL 0x0004 /* b2: Enable control transfer complete */ | ||
| 354 | #define PID 0x0003 /* b1-0: Response PID */ | ||
| 355 | #define PID_STALL11 0x0003 /* STALL */ | ||
| 356 | #define PID_STALL 0x0002 /* STALL */ | ||
| 357 | #define PID_BUF 0x0001 /* BUF */ | ||
| 358 | #define PID_NAK 0x0000 /* NAK */ | ||
| 359 | |||
| 360 | /* Pipe Window Select Register */ | ||
| 361 | #define PIPENM 0x0007 /* b2-0: Pipe select */ | ||
| 362 | |||
| 363 | /* Pipe Configuration Register */ | ||
| 364 | #define R8A66597_TYP 0xC000 /* b15-14: Transfer type */ | ||
| 365 | #define R8A66597_ISO 0xC000 /* Isochronous */ | ||
| 366 | #define R8A66597_INT 0x8000 /* Interrupt */ | ||
| 367 | #define R8A66597_BULK 0x4000 /* Bulk */ | ||
| 368 | #define R8A66597_BFRE 0x0400 /* b10: Buffer ready interrupt mode select */ | ||
| 369 | #define R8A66597_DBLB 0x0200 /* b9: Double buffer mode select */ | ||
| 370 | #define R8A66597_CNTMD 0x0100 /* b8: Continuous transfer mode select */ | ||
| 371 | #define R8A66597_SHTNAK 0x0080 /* b7: Transfer end NAK */ | ||
| 372 | #define R8A66597_DIR 0x0010 /* b4: Transfer direction select */ | ||
| 373 | #define R8A66597_EPNUM 0x000F /* b3-0: Eendpoint number select */ | ||
| 374 | |||
| 375 | /* Pipe Buffer Configuration Register */ | ||
| 376 | #define BUFSIZE 0x7C00 /* b14-10: Pipe buffer size */ | ||
| 377 | #define BUFNMB 0x007F /* b6-0: Pipe buffer number */ | ||
| 378 | #define PIPE0BUF 256 | ||
| 379 | #define PIPExBUF 64 | ||
| 380 | |||
| 381 | /* Pipe Maxpacket Size Register */ | ||
| 382 | #define MXPS 0x07FF /* b10-0: Maxpacket size */ | ||
| 383 | |||
| 384 | /* Pipe Cycle Configuration Register */ | ||
| 385 | #define IFIS 0x1000 /* b12: Isochronous in-buffer flush mode select */ | ||
| 386 | #define IITV 0x0007 /* b2-0: Isochronous interval */ | ||
| 387 | |||
| 388 | /* Pipex Control Register */ | ||
| 389 | #define BSTS 0x8000 /* b15: Buffer status */ | ||
| 390 | #define INBUFM 0x4000 /* b14: IN buffer monitor (Only for PIPE1 to 5) */ | ||
| 391 | #define CSCLR 0x2000 /* b13: complete-split status clear */ | ||
| 392 | #define CSSTS 0x1000 /* b12: complete-split status */ | ||
| 393 | #define ATREPM 0x0400 /* b10: Auto repeat mode */ | ||
| 394 | #define ACLRM 0x0200 /* b9: Out buffer auto clear mode */ | ||
| 395 | #define SQCLR 0x0100 /* b8: Sequence toggle bit clear */ | ||
| 396 | #define SQSET 0x0080 /* b7: Sequence toggle bit set */ | ||
| 397 | #define SQMON 0x0040 /* b6: Sequence toggle bit monitor */ | ||
| 398 | #define PBUSY 0x0020 /* b5: pipe busy */ | ||
| 399 | #define PID 0x0003 /* b1-0: Response PID */ | ||
| 400 | |||
| 401 | /* PIPExTRE */ | ||
| 402 | #define TRENB 0x0200 /* b9: Transaction counter enable */ | ||
| 403 | #define TRCLR 0x0100 /* b8: Transaction counter clear */ | ||
| 404 | |||
| 405 | /* PIPExTRN */ | ||
| 406 | #define TRNCNT 0xFFFF /* b15-0: Transaction counter */ | ||
| 407 | |||
| 408 | /* DEVADDx */ | ||
| 409 | #define UPPHUB 0x7800 | ||
| 410 | #define HUBPORT 0x0700 | ||
| 411 | #define USBSPD 0x00C0 | ||
| 412 | #define RTPORT 0x0001 | ||
| 413 | |||
| 414 | #endif /* __LINUX_USB_R8A66597_H */ | ||
| 44 | 415 | ||
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h index 0ec50ba62139..7b85e327af91 100644 --- a/include/linux/usb/serial.h +++ b/include/linux/usb/serial.h | |||
| @@ -238,9 +238,8 @@ struct usb_serial_driver { | |||
| 238 | int (*resume)(struct usb_serial *serial); | 238 | int (*resume)(struct usb_serial *serial); |
| 239 | 239 | ||
| 240 | /* serial function calls */ | 240 | /* serial function calls */ |
| 241 | /* Called by console with tty = NULL and by tty */ | 241 | /* Called by console and by the tty layer */ |
| 242 | int (*open)(struct tty_struct *tty, | 242 | int (*open)(struct tty_struct *tty, struct usb_serial_port *port); |
| 243 | struct usb_serial_port *port, struct file *filp); | ||
| 244 | void (*close)(struct usb_serial_port *port); | 243 | void (*close)(struct usb_serial_port *port); |
| 245 | int (*write)(struct tty_struct *tty, struct usb_serial_port *port, | 244 | int (*write)(struct tty_struct *tty, struct usb_serial_port *port, |
| 246 | const unsigned char *buf, int count); | 245 | const unsigned char *buf, int count); |
| @@ -261,6 +260,9 @@ struct usb_serial_driver { | |||
| 261 | be an attached tty at this point */ | 260 | be an attached tty at this point */ |
| 262 | void (*dtr_rts)(struct usb_serial_port *port, int on); | 261 | void (*dtr_rts)(struct usb_serial_port *port, int on); |
| 263 | int (*carrier_raised)(struct usb_serial_port *port); | 262 | int (*carrier_raised)(struct usb_serial_port *port); |
| 263 | /* Called by the usb serial hooks to allow the user to rework the | ||
| 264 | termios state */ | ||
| 265 | void (*init_termios)(struct tty_struct *tty); | ||
| 264 | /* USB events */ | 266 | /* USB events */ |
| 265 | void (*read_int_callback)(struct urb *urb); | 267 | void (*read_int_callback)(struct urb *urb); |
| 266 | void (*write_int_callback)(struct urb *urb); | 268 | void (*write_int_callback)(struct urb *urb); |
| @@ -300,7 +302,7 @@ static inline void usb_serial_console_disconnect(struct usb_serial *serial) {} | |||
| 300 | extern struct usb_serial *usb_serial_get_by_index(unsigned int minor); | 302 | extern struct usb_serial *usb_serial_get_by_index(unsigned int minor); |
| 301 | extern void usb_serial_put(struct usb_serial *serial); | 303 | extern void usb_serial_put(struct usb_serial *serial); |
| 302 | extern int usb_serial_generic_open(struct tty_struct *tty, | 304 | extern int usb_serial_generic_open(struct tty_struct *tty, |
| 303 | struct usb_serial_port *port, struct file *filp); | 305 | struct usb_serial_port *port); |
| 304 | extern int usb_serial_generic_write(struct tty_struct *tty, | 306 | extern int usb_serial_generic_write(struct tty_struct *tty, |
| 305 | struct usb_serial_port *port, const unsigned char *buf, int count); | 307 | struct usb_serial_port *port, const unsigned char *buf, int count); |
| 306 | extern void usb_serial_generic_close(struct usb_serial_port *port); | 308 | extern void usb_serial_generic_close(struct usb_serial_port *port); |
diff --git a/include/linux/vt.h b/include/linux/vt.h index 02c1c0288770..7afca0d72139 100644 --- a/include/linux/vt.h +++ b/include/linux/vt.h | |||
| @@ -1,17 +1,6 @@ | |||
| 1 | #ifndef _LINUX_VT_H | 1 | #ifndef _LINUX_VT_H |
| 2 | #define _LINUX_VT_H | 2 | #define _LINUX_VT_H |
| 3 | 3 | ||
| 4 | #ifdef __KERNEL__ | ||
| 5 | struct notifier_block; | ||
| 6 | |||
| 7 | struct vt_notifier_param { | ||
| 8 | struct vc_data *vc; /* VC on which the update happened */ | ||
| 9 | unsigned int c; /* Printed char */ | ||
| 10 | }; | ||
| 11 | |||
| 12 | extern int register_vt_notifier(struct notifier_block *nb); | ||
| 13 | extern int unregister_vt_notifier(struct notifier_block *nb); | ||
| 14 | #endif | ||
| 15 | 4 | ||
| 16 | /* | 5 | /* |
| 17 | * These constants are also useful for user-level apps (e.g., VC | 6 | * These constants are also useful for user-level apps (e.g., VC |
| @@ -74,4 +63,25 @@ struct vt_consize { | |||
| 74 | #define VT_UNLOCKSWITCH 0x560C /* allow vt switching */ | 63 | #define VT_UNLOCKSWITCH 0x560C /* allow vt switching */ |
| 75 | #define VT_GETHIFONTMASK 0x560D /* return hi font mask */ | 64 | #define VT_GETHIFONTMASK 0x560D /* return hi font mask */ |
| 76 | 65 | ||
| 66 | struct vt_event { | ||
| 67 | unsigned int event; | ||
| 68 | #define VT_EVENT_SWITCH 0x0001 /* Console switch */ | ||
| 69 | #define VT_EVENT_BLANK 0x0002 /* Screen blank */ | ||
| 70 | #define VT_EVENT_UNBLANK 0x0004 /* Screen unblank */ | ||
| 71 | #define VT_EVENT_RESIZE 0x0008 /* Resize display */ | ||
| 72 | #define VT_MAX_EVENT 0x000F | ||
| 73 | unsigned int old; /* Old console */ | ||
| 74 | unsigned int new; /* New console (if changing) */ | ||
| 75 | unsigned int pad[4]; /* Padding for expansion */ | ||
| 76 | }; | ||
| 77 | |||
| 78 | #define VT_WAITEVENT 0x560E /* Wait for an event */ | ||
| 79 | |||
| 80 | struct vt_setactivate { | ||
| 81 | unsigned int console; | ||
| 82 | struct vt_mode mode; | ||
| 83 | }; | ||
| 84 | |||
| 85 | #define VT_SETACTIVATE 0x560F /* Activate and set the mode of a console */ | ||
| 86 | |||
| 77 | #endif /* _LINUX_VT_H */ | 87 | #endif /* _LINUX_VT_H */ |
diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h index 2f1113467f70..c0c4e1103a73 100644 --- a/include/linux/vt_kern.h +++ b/include/linux/vt_kern.h | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <linux/console_struct.h> | 13 | #include <linux/console_struct.h> |
| 14 | #include <linux/mm.h> | 14 | #include <linux/mm.h> |
| 15 | #include <linux/consolemap.h> | 15 | #include <linux/consolemap.h> |
| 16 | #include <linux/notifier.h> | ||
| 16 | 17 | ||
| 17 | /* | 18 | /* |
| 18 | * Presently, a lot of graphics programs do not restore the contents of | 19 | * Presently, a lot of graphics programs do not restore the contents of |
| @@ -91,7 +92,8 @@ int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc); | |||
| 91 | #endif | 92 | #endif |
| 92 | 93 | ||
| 93 | /* vt.c */ | 94 | /* vt.c */ |
| 94 | int vt_waitactive(int vt); | 95 | void vt_event_post(unsigned int event, unsigned int old, unsigned int new); |
| 96 | int vt_waitactive(int n); | ||
| 95 | void change_console(struct vc_data *new_vc); | 97 | void change_console(struct vc_data *new_vc); |
| 96 | void reset_vc(struct vc_data *vc); | 98 | void reset_vc(struct vc_data *vc); |
| 97 | extern int unbind_con_driver(const struct consw *csw, int first, int last, | 99 | extern int unbind_con_driver(const struct consw *csw, int first, int last, |
| @@ -116,4 +118,16 @@ struct vt_spawn_console { | |||
| 116 | }; | 118 | }; |
| 117 | extern struct vt_spawn_console vt_spawn_con; | 119 | extern struct vt_spawn_console vt_spawn_con; |
| 118 | 120 | ||
| 121 | extern int vt_move_to_console(unsigned int vt, int alloc); | ||
| 122 | |||
| 123 | /* Interfaces for VC notification of character events (for accessibility etc) */ | ||
| 124 | |||
| 125 | struct vt_notifier_param { | ||
| 126 | struct vc_data *vc; /* VC on which the update happened */ | ||
| 127 | unsigned int c; /* Printed char */ | ||
| 128 | }; | ||
| 129 | |||
| 130 | extern int register_vt_notifier(struct notifier_block *nb); | ||
| 131 | extern int unregister_vt_notifier(struct notifier_block *nb); | ||
| 132 | |||
| 119 | #endif /* _VT_KERN_H */ | 133 | #endif /* _VT_KERN_H */ |
diff --git a/include/trace/events/ext4.h b/include/trace/events/ext4.h index 8d433c4e3709..c1bd8f1e8b94 100644 --- a/include/trace/events/ext4.h +++ b/include/trace/events/ext4.h | |||
| @@ -5,10 +5,15 @@ | |||
| 5 | #define _TRACE_EXT4_H | 5 | #define _TRACE_EXT4_H |
| 6 | 6 | ||
| 7 | #include <linux/writeback.h> | 7 | #include <linux/writeback.h> |
| 8 | #include "../../../fs/ext4/ext4.h" | ||
| 9 | #include "../../../fs/ext4/mballoc.h" | ||
| 10 | #include <linux/tracepoint.h> | 8 | #include <linux/tracepoint.h> |
| 11 | 9 | ||
| 10 | struct ext4_allocation_context; | ||
| 11 | struct ext4_allocation_request; | ||
| 12 | struct ext4_prealloc_space; | ||
| 13 | struct ext4_inode_info; | ||
| 14 | |||
| 15 | #define EXT4_I(inode) (container_of(inode, struct ext4_inode_info, vfs_inode)) | ||
| 16 | |||
| 12 | TRACE_EVENT(ext4_free_inode, | 17 | TRACE_EVENT(ext4_free_inode, |
| 13 | TP_PROTO(struct inode *inode), | 18 | TP_PROTO(struct inode *inode), |
| 14 | 19 | ||
| @@ -33,8 +38,8 @@ TRACE_EVENT(ext4_free_inode, | |||
| 33 | ), | 38 | ), |
| 34 | 39 | ||
| 35 | TP_printk("dev %s ino %lu mode %d uid %u gid %u blocks %llu", | 40 | TP_printk("dev %s ino %lu mode %d uid %u gid %u blocks %llu", |
| 36 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->mode, | 41 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 37 | __entry->uid, __entry->gid, | 42 | __entry->mode, __entry->uid, __entry->gid, |
| 38 | (unsigned long long) __entry->blocks) | 43 | (unsigned long long) __entry->blocks) |
| 39 | ); | 44 | ); |
| 40 | 45 | ||
| @@ -56,7 +61,8 @@ TRACE_EVENT(ext4_request_inode, | |||
| 56 | ), | 61 | ), |
| 57 | 62 | ||
| 58 | TP_printk("dev %s dir %lu mode %d", | 63 | TP_printk("dev %s dir %lu mode %d", |
| 59 | jbd2_dev_to_name(__entry->dev), __entry->dir, __entry->mode) | 64 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->dir, |
| 65 | __entry->mode) | ||
| 60 | ); | 66 | ); |
| 61 | 67 | ||
| 62 | TRACE_EVENT(ext4_allocate_inode, | 68 | TRACE_EVENT(ext4_allocate_inode, |
| @@ -79,7 +85,8 @@ TRACE_EVENT(ext4_allocate_inode, | |||
| 79 | ), | 85 | ), |
| 80 | 86 | ||
| 81 | TP_printk("dev %s ino %lu dir %lu mode %d", | 87 | TP_printk("dev %s ino %lu dir %lu mode %d", |
| 82 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->dir, __entry->mode) | 88 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 89 | (unsigned long) __entry->dir, __entry->mode) | ||
| 83 | ); | 90 | ); |
| 84 | 91 | ||
| 85 | TRACE_EVENT(ext4_write_begin, | 92 | TRACE_EVENT(ext4_write_begin, |
| @@ -106,8 +113,8 @@ TRACE_EVENT(ext4_write_begin, | |||
| 106 | ), | 113 | ), |
| 107 | 114 | ||
| 108 | TP_printk("dev %s ino %lu pos %llu len %u flags %u", | 115 | TP_printk("dev %s ino %lu pos %llu len %u flags %u", |
| 109 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pos, __entry->len, | 116 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 110 | __entry->flags) | 117 | __entry->pos, __entry->len, __entry->flags) |
| 111 | ); | 118 | ); |
| 112 | 119 | ||
| 113 | TRACE_EVENT(ext4_ordered_write_end, | 120 | TRACE_EVENT(ext4_ordered_write_end, |
| @@ -133,8 +140,8 @@ TRACE_EVENT(ext4_ordered_write_end, | |||
| 133 | ), | 140 | ), |
| 134 | 141 | ||
| 135 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", | 142 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", |
| 136 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pos, __entry->len, | 143 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 137 | __entry->copied) | 144 | __entry->pos, __entry->len, __entry->copied) |
| 138 | ); | 145 | ); |
| 139 | 146 | ||
| 140 | TRACE_EVENT(ext4_writeback_write_end, | 147 | TRACE_EVENT(ext4_writeback_write_end, |
| @@ -160,8 +167,8 @@ TRACE_EVENT(ext4_writeback_write_end, | |||
| 160 | ), | 167 | ), |
| 161 | 168 | ||
| 162 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", | 169 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", |
| 163 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pos, __entry->len, | 170 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 164 | __entry->copied) | 171 | __entry->pos, __entry->len, __entry->copied) |
| 165 | ); | 172 | ); |
| 166 | 173 | ||
| 167 | TRACE_EVENT(ext4_journalled_write_end, | 174 | TRACE_EVENT(ext4_journalled_write_end, |
| @@ -186,8 +193,8 @@ TRACE_EVENT(ext4_journalled_write_end, | |||
| 186 | ), | 193 | ), |
| 187 | 194 | ||
| 188 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", | 195 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", |
| 189 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pos, __entry->len, | 196 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 190 | __entry->copied) | 197 | __entry->pos, __entry->len, __entry->copied) |
| 191 | ); | 198 | ); |
| 192 | 199 | ||
| 193 | TRACE_EVENT(ext4_writepage, | 200 | TRACE_EVENT(ext4_writepage, |
| @@ -209,7 +216,8 @@ TRACE_EVENT(ext4_writepage, | |||
| 209 | ), | 216 | ), |
| 210 | 217 | ||
| 211 | TP_printk("dev %s ino %lu page_index %lu", | 218 | TP_printk("dev %s ino %lu page_index %lu", |
| 212 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->index) | 219 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 220 | __entry->index) | ||
| 213 | ); | 221 | ); |
| 214 | 222 | ||
| 215 | TRACE_EVENT(ext4_da_writepages, | 223 | TRACE_EVENT(ext4_da_writepages, |
| @@ -243,14 +251,49 @@ TRACE_EVENT(ext4_da_writepages, | |||
| 243 | __entry->range_cyclic = wbc->range_cyclic; | 251 | __entry->range_cyclic = wbc->range_cyclic; |
| 244 | ), | 252 | ), |
| 245 | 253 | ||
| 246 | TP_printk("dev %s ino %lu nr_t_write %ld pages_skipped %ld range_start %llu range_end %llu nonblocking %d for_kupdate %d for_reclaim %d range_cyclic %d", | 254 | TP_printk("dev %s ino %lu nr_to_write %ld pages_skipped %ld range_start %llu range_end %llu nonblocking %d for_kupdate %d for_reclaim %d range_cyclic %d", |
| 247 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->nr_to_write, | 255 | jbd2_dev_to_name(__entry->dev), |
| 256 | (unsigned long) __entry->ino, __entry->nr_to_write, | ||
| 248 | __entry->pages_skipped, __entry->range_start, | 257 | __entry->pages_skipped, __entry->range_start, |
| 249 | __entry->range_end, __entry->nonblocking, | 258 | __entry->range_end, __entry->nonblocking, |
| 250 | __entry->for_kupdate, __entry->for_reclaim, | 259 | __entry->for_kupdate, __entry->for_reclaim, |
| 251 | __entry->range_cyclic) | 260 | __entry->range_cyclic) |
| 252 | ); | 261 | ); |
| 253 | 262 | ||
| 263 | TRACE_EVENT(ext4_da_write_pages, | ||
| 264 | TP_PROTO(struct inode *inode, struct mpage_da_data *mpd), | ||
| 265 | |||
| 266 | TP_ARGS(inode, mpd), | ||
| 267 | |||
| 268 | TP_STRUCT__entry( | ||
| 269 | __field( dev_t, dev ) | ||
| 270 | __field( ino_t, ino ) | ||
| 271 | __field( __u64, b_blocknr ) | ||
| 272 | __field( __u32, b_size ) | ||
| 273 | __field( __u32, b_state ) | ||
| 274 | __field( unsigned long, first_page ) | ||
| 275 | __field( int, io_done ) | ||
| 276 | __field( int, pages_written ) | ||
| 277 | ), | ||
| 278 | |||
| 279 | TP_fast_assign( | ||
| 280 | __entry->dev = inode->i_sb->s_dev; | ||
| 281 | __entry->ino = inode->i_ino; | ||
| 282 | __entry->b_blocknr = mpd->b_blocknr; | ||
| 283 | __entry->b_size = mpd->b_size; | ||
| 284 | __entry->b_state = mpd->b_state; | ||
| 285 | __entry->first_page = mpd->first_page; | ||
| 286 | __entry->io_done = mpd->io_done; | ||
| 287 | __entry->pages_written = mpd->pages_written; | ||
| 288 | ), | ||
| 289 | |||
| 290 | TP_printk("dev %s ino %lu b_blocknr %llu b_size %u b_state 0x%04x first_page %lu io_done %d pages_written %d", | ||
| 291 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, | ||
| 292 | __entry->b_blocknr, __entry->b_size, | ||
| 293 | __entry->b_state, __entry->first_page, | ||
| 294 | __entry->io_done, __entry->pages_written) | ||
| 295 | ); | ||
| 296 | |||
| 254 | TRACE_EVENT(ext4_da_writepages_result, | 297 | TRACE_EVENT(ext4_da_writepages_result, |
| 255 | TP_PROTO(struct inode *inode, struct writeback_control *wbc, | 298 | TP_PROTO(struct inode *inode, struct writeback_control *wbc, |
| 256 | int ret, int pages_written), | 299 | int ret, int pages_written), |
| @@ -280,7 +323,8 @@ TRACE_EVENT(ext4_da_writepages_result, | |||
| 280 | ), | 323 | ), |
| 281 | 324 | ||
| 282 | TP_printk("dev %s ino %lu ret %d pages_written %d pages_skipped %ld congestion %d more_io %d no_nrwrite_index_update %d", | 325 | TP_printk("dev %s ino %lu ret %d pages_written %d pages_skipped %ld congestion %d more_io %d no_nrwrite_index_update %d", |
| 283 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->ret, | 326 | jbd2_dev_to_name(__entry->dev), |
| 327 | (unsigned long) __entry->ino, __entry->ret, | ||
| 284 | __entry->pages_written, __entry->pages_skipped, | 328 | __entry->pages_written, __entry->pages_skipped, |
| 285 | __entry->encountered_congestion, __entry->more_io, | 329 | __entry->encountered_congestion, __entry->more_io, |
| 286 | __entry->no_nrwrite_index_update) | 330 | __entry->no_nrwrite_index_update) |
| @@ -309,8 +353,8 @@ TRACE_EVENT(ext4_da_write_begin, | |||
| 309 | ), | 353 | ), |
| 310 | 354 | ||
| 311 | TP_printk("dev %s ino %lu pos %llu len %u flags %u", | 355 | TP_printk("dev %s ino %lu pos %llu len %u flags %u", |
| 312 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pos, __entry->len, | 356 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 313 | __entry->flags) | 357 | __entry->pos, __entry->len, __entry->flags) |
| 314 | ); | 358 | ); |
| 315 | 359 | ||
| 316 | TRACE_EVENT(ext4_da_write_end, | 360 | TRACE_EVENT(ext4_da_write_end, |
| @@ -336,8 +380,8 @@ TRACE_EVENT(ext4_da_write_end, | |||
| 336 | ), | 380 | ), |
| 337 | 381 | ||
| 338 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", | 382 | TP_printk("dev %s ino %lu pos %llu len %u copied %u", |
| 339 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pos, __entry->len, | 383 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 340 | __entry->copied) | 384 | __entry->pos, __entry->len, __entry->copied) |
| 341 | ); | 385 | ); |
| 342 | 386 | ||
| 343 | TRACE_EVENT(ext4_discard_blocks, | 387 | TRACE_EVENT(ext4_discard_blocks, |
| @@ -387,8 +431,8 @@ TRACE_EVENT(ext4_mb_new_inode_pa, | |||
| 387 | ), | 431 | ), |
| 388 | 432 | ||
| 389 | TP_printk("dev %s ino %lu pstart %llu len %u lstart %llu", | 433 | TP_printk("dev %s ino %lu pstart %llu len %u lstart %llu", |
| 390 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pa_pstart, | 434 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 391 | __entry->pa_len, __entry->pa_lstart) | 435 | __entry->pa_pstart, __entry->pa_len, __entry->pa_lstart) |
| 392 | ); | 436 | ); |
| 393 | 437 | ||
| 394 | TRACE_EVENT(ext4_mb_new_group_pa, | 438 | TRACE_EVENT(ext4_mb_new_group_pa, |
| @@ -415,8 +459,8 @@ TRACE_EVENT(ext4_mb_new_group_pa, | |||
| 415 | ), | 459 | ), |
| 416 | 460 | ||
| 417 | TP_printk("dev %s ino %lu pstart %llu len %u lstart %llu", | 461 | TP_printk("dev %s ino %lu pstart %llu len %u lstart %llu", |
| 418 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->pa_pstart, | 462 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 419 | __entry->pa_len, __entry->pa_lstart) | 463 | __entry->pa_pstart, __entry->pa_len, __entry->pa_lstart) |
| 420 | ); | 464 | ); |
| 421 | 465 | ||
| 422 | TRACE_EVENT(ext4_mb_release_inode_pa, | 466 | TRACE_EVENT(ext4_mb_release_inode_pa, |
| @@ -442,8 +486,8 @@ TRACE_EVENT(ext4_mb_release_inode_pa, | |||
| 442 | ), | 486 | ), |
| 443 | 487 | ||
| 444 | TP_printk("dev %s ino %lu block %llu count %u", | 488 | TP_printk("dev %s ino %lu block %llu count %u", |
| 445 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->block, | 489 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 446 | __entry->count) | 490 | __entry->block, __entry->count) |
| 447 | ); | 491 | ); |
| 448 | 492 | ||
| 449 | TRACE_EVENT(ext4_mb_release_group_pa, | 493 | TRACE_EVENT(ext4_mb_release_group_pa, |
| @@ -488,7 +532,7 @@ TRACE_EVENT(ext4_discard_preallocations, | |||
| 488 | ), | 532 | ), |
| 489 | 533 | ||
| 490 | TP_printk("dev %s ino %lu", | 534 | TP_printk("dev %s ino %lu", |
| 491 | jbd2_dev_to_name(__entry->dev), __entry->ino) | 535 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino) |
| 492 | ); | 536 | ); |
| 493 | 537 | ||
| 494 | TRACE_EVENT(ext4_mb_discard_preallocations, | 538 | TRACE_EVENT(ext4_mb_discard_preallocations, |
| @@ -543,8 +587,8 @@ TRACE_EVENT(ext4_request_blocks, | |||
| 543 | ), | 587 | ), |
| 544 | 588 | ||
| 545 | TP_printk("dev %s ino %lu flags %u len %u lblk %llu goal %llu lleft %llu lright %llu pleft %llu pright %llu ", | 589 | TP_printk("dev %s ino %lu flags %u len %u lblk %llu goal %llu lleft %llu lright %llu pleft %llu pright %llu ", |
| 546 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->flags, | 590 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 547 | __entry->len, | 591 | __entry->flags, __entry->len, |
| 548 | (unsigned long long) __entry->logical, | 592 | (unsigned long long) __entry->logical, |
| 549 | (unsigned long long) __entry->goal, | 593 | (unsigned long long) __entry->goal, |
| 550 | (unsigned long long) __entry->lleft, | 594 | (unsigned long long) __entry->lleft, |
| @@ -587,8 +631,8 @@ TRACE_EVENT(ext4_allocate_blocks, | |||
| 587 | ), | 631 | ), |
| 588 | 632 | ||
| 589 | TP_printk("dev %s ino %lu flags %u len %u block %llu lblk %llu goal %llu lleft %llu lright %llu pleft %llu pright %llu ", | 633 | TP_printk("dev %s ino %lu flags %u len %u block %llu lblk %llu goal %llu lleft %llu lright %llu pleft %llu pright %llu ", |
| 590 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->flags, | 634 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 591 | __entry->len, __entry->block, | 635 | __entry->flags, __entry->len, __entry->block, |
| 592 | (unsigned long long) __entry->logical, | 636 | (unsigned long long) __entry->logical, |
| 593 | (unsigned long long) __entry->goal, | 637 | (unsigned long long) __entry->goal, |
| 594 | (unsigned long long) __entry->lleft, | 638 | (unsigned long long) __entry->lleft, |
| @@ -621,8 +665,8 @@ TRACE_EVENT(ext4_free_blocks, | |||
| 621 | ), | 665 | ), |
| 622 | 666 | ||
| 623 | TP_printk("dev %s ino %lu block %llu count %lu metadata %d", | 667 | TP_printk("dev %s ino %lu block %llu count %lu metadata %d", |
| 624 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->block, | 668 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 625 | __entry->count, __entry->metadata) | 669 | __entry->block, __entry->count, __entry->metadata) |
| 626 | ); | 670 | ); |
| 627 | 671 | ||
| 628 | TRACE_EVENT(ext4_sync_file, | 672 | TRACE_EVENT(ext4_sync_file, |
| @@ -645,8 +689,8 @@ TRACE_EVENT(ext4_sync_file, | |||
| 645 | ), | 689 | ), |
| 646 | 690 | ||
| 647 | TP_printk("dev %s ino %ld parent %ld datasync %d ", | 691 | TP_printk("dev %s ino %ld parent %ld datasync %d ", |
| 648 | jbd2_dev_to_name(__entry->dev), __entry->ino, __entry->parent, | 692 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, |
| 649 | __entry->datasync) | 693 | (unsigned long) __entry->parent, __entry->datasync) |
| 650 | ); | 694 | ); |
| 651 | 695 | ||
| 652 | TRACE_EVENT(ext4_sync_fs, | 696 | TRACE_EVENT(ext4_sync_fs, |
| @@ -669,6 +713,30 @@ TRACE_EVENT(ext4_sync_fs, | |||
| 669 | __entry->wait) | 713 | __entry->wait) |
| 670 | ); | 714 | ); |
| 671 | 715 | ||
| 716 | TRACE_EVENT(ext4_alloc_da_blocks, | ||
| 717 | TP_PROTO(struct inode *inode), | ||
| 718 | |||
| 719 | TP_ARGS(inode), | ||
| 720 | |||
| 721 | TP_STRUCT__entry( | ||
| 722 | __field( dev_t, dev ) | ||
| 723 | __field( ino_t, ino ) | ||
| 724 | __field( unsigned int, data_blocks ) | ||
| 725 | __field( unsigned int, meta_blocks ) | ||
| 726 | ), | ||
| 727 | |||
| 728 | TP_fast_assign( | ||
| 729 | __entry->dev = inode->i_sb->s_dev; | ||
| 730 | __entry->ino = inode->i_ino; | ||
| 731 | __entry->data_blocks = EXT4_I(inode)->i_reserved_data_blocks; | ||
| 732 | __entry->meta_blocks = EXT4_I(inode)->i_reserved_meta_blocks; | ||
| 733 | ), | ||
| 734 | |||
| 735 | TP_printk("dev %s ino %lu data_blocks %u meta_blocks %u", | ||
| 736 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino, | ||
| 737 | __entry->data_blocks, __entry->meta_blocks) | ||
| 738 | ); | ||
| 739 | |||
| 672 | #endif /* _TRACE_EXT4_H */ | 740 | #endif /* _TRACE_EXT4_H */ |
| 673 | 741 | ||
| 674 | /* This part must be outside protection */ | 742 | /* This part must be outside protection */ |
diff --git a/include/trace/events/jbd2.h b/include/trace/events/jbd2.h index 10813fa0c8d0..b851f0b4701c 100644 --- a/include/trace/events/jbd2.h +++ b/include/trace/events/jbd2.h | |||
| @@ -159,7 +159,7 @@ TRACE_EVENT(jbd2_submit_inode_data, | |||
| 159 | ), | 159 | ), |
| 160 | 160 | ||
| 161 | TP_printk("dev %s ino %lu", | 161 | TP_printk("dev %s ino %lu", |
| 162 | jbd2_dev_to_name(__entry->dev), __entry->ino) | 162 | jbd2_dev_to_name(__entry->dev), (unsigned long) __entry->ino) |
| 163 | ); | 163 | ); |
| 164 | 164 | ||
| 165 | #endif /* _TRACE_JBD2_H */ | 165 | #endif /* _TRACE_JBD2_H */ |
diff --git a/kernel/delayacct.c b/kernel/delayacct.c index abb6e17505e2..ead9b610aa71 100644 --- a/kernel/delayacct.c +++ b/kernel/delayacct.c | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | 15 | ||
| 16 | #include <linux/sched.h> | 16 | #include <linux/sched.h> |
| 17 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
| 18 | #include <linux/taskstats.h> | ||
| 18 | #include <linux/time.h> | 19 | #include <linux/time.h> |
| 19 | #include <linux/sysctl.h> | 20 | #include <linux/sysctl.h> |
| 20 | #include <linux/delayacct.h> | 21 | #include <linux/delayacct.h> |
diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c index 05071bf6a37b..c03f221fee44 100644 --- a/kernel/hrtimer.c +++ b/kernel/hrtimer.c | |||
| @@ -48,37 +48,6 @@ | |||
| 48 | 48 | ||
| 49 | #include <asm/uaccess.h> | 49 | #include <asm/uaccess.h> |
| 50 | 50 | ||
| 51 | /** | ||
| 52 | * ktime_get - get the monotonic time in ktime_t format | ||
| 53 | * | ||
| 54 | * returns the time in ktime_t format | ||
| 55 | */ | ||
| 56 | ktime_t ktime_get(void) | ||
| 57 | { | ||
| 58 | struct timespec now; | ||
| 59 | |||
| 60 | ktime_get_ts(&now); | ||
| 61 | |||
| 62 | return timespec_to_ktime(now); | ||
| 63 | } | ||
| 64 | EXPORT_SYMBOL_GPL(ktime_get); | ||
| 65 | |||
| 66 | /** | ||
| 67 | * ktime_get_real - get the real (wall-) time in ktime_t format | ||
| 68 | * | ||
| 69 | * returns the time in ktime_t format | ||
| 70 | */ | ||
| 71 | ktime_t ktime_get_real(void) | ||
| 72 | { | ||
| 73 | struct timespec now; | ||
| 74 | |||
| 75 | getnstimeofday(&now); | ||
| 76 | |||
| 77 | return timespec_to_ktime(now); | ||
| 78 | } | ||
| 79 | |||
| 80 | EXPORT_SYMBOL_GPL(ktime_get_real); | ||
| 81 | |||
| 82 | /* | 51 | /* |
| 83 | * The timer bases: | 52 | * The timer bases: |
| 84 | * | 53 | * |
| @@ -106,31 +75,6 @@ DEFINE_PER_CPU(struct hrtimer_cpu_base, hrtimer_bases) = | |||
| 106 | } | 75 | } |
| 107 | }; | 76 | }; |
| 108 | 77 | ||
| 109 | /** | ||
| 110 | * ktime_get_ts - get the monotonic clock in timespec format | ||
| 111 | * @ts: pointer to timespec variable | ||
| 112 | * | ||
| 113 | * The function calculates the monotonic clock from the realtime | ||
| 114 | * clock and the wall_to_monotonic offset and stores the result | ||
| 115 | * in normalized timespec format in the variable pointed to by @ts. | ||
| 116 | */ | ||
| 117 | void ktime_get_ts(struct timespec *ts) | ||
| 118 | { | ||
| 119 | struct timespec tomono; | ||
| 120 | unsigned long seq; | ||
| 121 | |||
| 122 | do { | ||
| 123 | seq = read_seqbegin(&xtime_lock); | ||
| 124 | getnstimeofday(ts); | ||
| 125 | tomono = wall_to_monotonic; | ||
| 126 | |||
| 127 | } while (read_seqretry(&xtime_lock, seq)); | ||
| 128 | |||
| 129 | set_normalized_timespec(ts, ts->tv_sec + tomono.tv_sec, | ||
| 130 | ts->tv_nsec + tomono.tv_nsec); | ||
| 131 | } | ||
| 132 | EXPORT_SYMBOL_GPL(ktime_get_ts); | ||
| 133 | |||
| 134 | /* | 78 | /* |
| 135 | * Get the coarse grained time at the softirq based on xtime and | 79 | * Get the coarse grained time at the softirq based on xtime and |
| 136 | * wall_to_monotonic. | 80 | * wall_to_monotonic. |
| @@ -1155,7 +1099,6 @@ static void __hrtimer_init(struct hrtimer *timer, clockid_t clock_id, | |||
| 1155 | clock_id = CLOCK_MONOTONIC; | 1099 | clock_id = CLOCK_MONOTONIC; |
| 1156 | 1100 | ||
| 1157 | timer->base = &cpu_base->clock_base[clock_id]; | 1101 | timer->base = &cpu_base->clock_base[clock_id]; |
| 1158 | INIT_LIST_HEAD(&timer->cb_entry); | ||
| 1159 | hrtimer_init_timer_hres(timer); | 1102 | hrtimer_init_timer_hres(timer); |
| 1160 | 1103 | ||
| 1161 | #ifdef CONFIG_TIMER_STATS | 1104 | #ifdef CONFIG_TIMER_STATS |
diff --git a/kernel/kfifo.c b/kernel/kfifo.c index 26539e3228e5..3765ff3c1bbe 100644 --- a/kernel/kfifo.c +++ b/kernel/kfifo.c | |||
| @@ -117,7 +117,7 @@ EXPORT_SYMBOL(kfifo_free); | |||
| 117 | * writer, you don't need extra locking to use these functions. | 117 | * writer, you don't need extra locking to use these functions. |
| 118 | */ | 118 | */ |
| 119 | unsigned int __kfifo_put(struct kfifo *fifo, | 119 | unsigned int __kfifo_put(struct kfifo *fifo, |
| 120 | unsigned char *buffer, unsigned int len) | 120 | const unsigned char *buffer, unsigned int len) |
| 121 | { | 121 | { |
| 122 | unsigned int l; | 122 | unsigned int l; |
| 123 | 123 | ||
diff --git a/kernel/posix-timers.c b/kernel/posix-timers.c index d089d052c4a9..495440779ce3 100644 --- a/kernel/posix-timers.c +++ b/kernel/posix-timers.c | |||
| @@ -242,6 +242,25 @@ static int posix_get_monotonic_raw(clockid_t which_clock, struct timespec *tp) | |||
| 242 | return 0; | 242 | return 0; |
| 243 | } | 243 | } |
| 244 | 244 | ||
| 245 | |||
| 246 | static int posix_get_realtime_coarse(clockid_t which_clock, struct timespec *tp) | ||
| 247 | { | ||
| 248 | *tp = current_kernel_time(); | ||
| 249 | return 0; | ||
| 250 | } | ||
| 251 | |||
| 252 | static int posix_get_monotonic_coarse(clockid_t which_clock, | ||
| 253 | struct timespec *tp) | ||
| 254 | { | ||
| 255 | *tp = get_monotonic_coarse(); | ||
| 256 | return 0; | ||
| 257 | } | ||
| 258 | |||
| 259 | int posix_get_coarse_res(const clockid_t which_clock, struct timespec *tp) | ||
| 260 | { | ||
| 261 | *tp = ktime_to_timespec(KTIME_LOW_RES); | ||
| 262 | return 0; | ||
| 263 | } | ||
| 245 | /* | 264 | /* |
| 246 | * Initialize everything, well, just everything in Posix clocks/timers ;) | 265 | * Initialize everything, well, just everything in Posix clocks/timers ;) |
| 247 | */ | 266 | */ |
| @@ -262,10 +281,26 @@ static __init int init_posix_timers(void) | |||
| 262 | .timer_create = no_timer_create, | 281 | .timer_create = no_timer_create, |
| 263 | .nsleep = no_nsleep, | 282 | .nsleep = no_nsleep, |
| 264 | }; | 283 | }; |
| 284 | struct k_clock clock_realtime_coarse = { | ||
| 285 | .clock_getres = posix_get_coarse_res, | ||
| 286 | .clock_get = posix_get_realtime_coarse, | ||
| 287 | .clock_set = do_posix_clock_nosettime, | ||
| 288 | .timer_create = no_timer_create, | ||
| 289 | .nsleep = no_nsleep, | ||
| 290 | }; | ||
| 291 | struct k_clock clock_monotonic_coarse = { | ||
| 292 | .clock_getres = posix_get_coarse_res, | ||
| 293 | .clock_get = posix_get_monotonic_coarse, | ||
| 294 | .clock_set = do_posix_clock_nosettime, | ||
| 295 | .timer_create = no_timer_create, | ||
| 296 | .nsleep = no_nsleep, | ||
| 297 | }; | ||
| 265 | 298 | ||
| 266 | register_posix_clock(CLOCK_REALTIME, &clock_realtime); | 299 | register_posix_clock(CLOCK_REALTIME, &clock_realtime); |
| 267 | register_posix_clock(CLOCK_MONOTONIC, &clock_monotonic); | 300 | register_posix_clock(CLOCK_MONOTONIC, &clock_monotonic); |
| 268 | register_posix_clock(CLOCK_MONOTONIC_RAW, &clock_monotonic_raw); | 301 | register_posix_clock(CLOCK_MONOTONIC_RAW, &clock_monotonic_raw); |
| 302 | register_posix_clock(CLOCK_REALTIME_COARSE, &clock_realtime_coarse); | ||
| 303 | register_posix_clock(CLOCK_MONOTONIC_COARSE, &clock_monotonic_coarse); | ||
| 269 | 304 | ||
| 270 | posix_timers_cache = kmem_cache_create("posix_timers_cache", | 305 | posix_timers_cache = kmem_cache_create("posix_timers_cache", |
| 271 | sizeof (struct k_itimer), 0, SLAB_PANIC, | 306 | sizeof (struct k_itimer), 0, SLAB_PANIC, |
diff --git a/kernel/power/console.c b/kernel/power/console.c index a3961b205de7..5187136fe1de 100644 --- a/kernel/power/console.c +++ b/kernel/power/console.c | |||
| @@ -14,56 +14,13 @@ | |||
| 14 | #define SUSPEND_CONSOLE (MAX_NR_CONSOLES-1) | 14 | #define SUSPEND_CONSOLE (MAX_NR_CONSOLES-1) |
| 15 | 15 | ||
| 16 | static int orig_fgconsole, orig_kmsg; | 16 | static int orig_fgconsole, orig_kmsg; |
| 17 | static int disable_vt_switch; | ||
| 18 | |||
| 19 | /* | ||
| 20 | * Normally during a suspend, we allocate a new console and switch to it. | ||
| 21 | * When we resume, we switch back to the original console. This switch | ||
| 22 | * can be slow, so on systems where the framebuffer can handle restoration | ||
| 23 | * of video registers anyways, there's little point in doing the console | ||
| 24 | * switch. This function allows you to disable it by passing it '0'. | ||
| 25 | */ | ||
| 26 | void pm_set_vt_switch(int do_switch) | ||
| 27 | { | ||
| 28 | acquire_console_sem(); | ||
| 29 | disable_vt_switch = !do_switch; | ||
| 30 | release_console_sem(); | ||
| 31 | } | ||
| 32 | EXPORT_SYMBOL(pm_set_vt_switch); | ||
| 33 | 17 | ||
| 34 | int pm_prepare_console(void) | 18 | int pm_prepare_console(void) |
| 35 | { | 19 | { |
| 36 | acquire_console_sem(); | 20 | orig_fgconsole = vt_move_to_console(SUSPEND_CONSOLE, 1); |
| 37 | 21 | if (orig_fgconsole < 0) | |
| 38 | if (disable_vt_switch) { | ||
| 39 | release_console_sem(); | ||
| 40 | return 0; | ||
| 41 | } | ||
| 42 | |||
| 43 | orig_fgconsole = fg_console; | ||
| 44 | |||
| 45 | if (vc_allocate(SUSPEND_CONSOLE)) { | ||
| 46 | /* we can't have a free VC for now. Too bad, | ||
| 47 | * we don't want to mess the screen for now. */ | ||
| 48 | release_console_sem(); | ||
| 49 | return 1; | 22 | return 1; |
| 50 | } | ||
| 51 | 23 | ||
| 52 | if (set_console(SUSPEND_CONSOLE)) { | ||
| 53 | /* | ||
| 54 | * We're unable to switch to the SUSPEND_CONSOLE. | ||
| 55 | * Let the calling function know so it can decide | ||
| 56 | * what to do. | ||
| 57 | */ | ||
| 58 | release_console_sem(); | ||
| 59 | return 1; | ||
| 60 | } | ||
| 61 | release_console_sem(); | ||
| 62 | |||
| 63 | if (vt_waitactive(SUSPEND_CONSOLE)) { | ||
| 64 | pr_debug("Suspend: Can't switch VCs."); | ||
| 65 | return 1; | ||
| 66 | } | ||
| 67 | orig_kmsg = kmsg_redirect; | 24 | orig_kmsg = kmsg_redirect; |
| 68 | kmsg_redirect = SUSPEND_CONSOLE; | 25 | kmsg_redirect = SUSPEND_CONSOLE; |
| 69 | return 0; | 26 | return 0; |
| @@ -71,19 +28,9 @@ int pm_prepare_console(void) | |||
| 71 | 28 | ||
| 72 | void pm_restore_console(void) | 29 | void pm_restore_console(void) |
| 73 | { | 30 | { |
| 74 | acquire_console_sem(); | 31 | if (orig_fgconsole >= 0) { |
| 75 | if (disable_vt_switch) { | 32 | vt_move_to_console(orig_fgconsole, 0); |
| 76 | release_console_sem(); | 33 | kmsg_redirect = orig_kmsg; |
| 77 | return; | ||
| 78 | } | ||
| 79 | set_console(orig_fgconsole); | ||
| 80 | release_console_sem(); | ||
| 81 | |||
| 82 | if (vt_waitactive(orig_fgconsole)) { | ||
| 83 | pr_debug("Resume: Can't switch VCs."); | ||
| 84 | return; | ||
| 85 | } | 34 | } |
| 86 | |||
| 87 | kmsg_redirect = orig_kmsg; | ||
| 88 | } | 35 | } |
| 89 | #endif | 36 | #endif |
diff --git a/kernel/time.c b/kernel/time.c index 29511943871a..2e2e469a7fec 100644 --- a/kernel/time.c +++ b/kernel/time.c | |||
| @@ -370,13 +370,20 @@ EXPORT_SYMBOL(mktime); | |||
| 370 | * 0 <= tv_nsec < NSEC_PER_SEC | 370 | * 0 <= tv_nsec < NSEC_PER_SEC |
| 371 | * For negative values only the tv_sec field is negative ! | 371 | * For negative values only the tv_sec field is negative ! |
| 372 | */ | 372 | */ |
| 373 | void set_normalized_timespec(struct timespec *ts, time_t sec, long nsec) | 373 | void set_normalized_timespec(struct timespec *ts, time_t sec, s64 nsec) |
| 374 | { | 374 | { |
| 375 | while (nsec >= NSEC_PER_SEC) { | 375 | while (nsec >= NSEC_PER_SEC) { |
| 376 | /* | ||
| 377 | * The following asm() prevents the compiler from | ||
| 378 | * optimising this loop into a modulo operation. See | ||
| 379 | * also __iter_div_u64_rem() in include/linux/time.h | ||
| 380 | */ | ||
| 381 | asm("" : "+rm"(nsec)); | ||
| 376 | nsec -= NSEC_PER_SEC; | 382 | nsec -= NSEC_PER_SEC; |
| 377 | ++sec; | 383 | ++sec; |
| 378 | } | 384 | } |
| 379 | while (nsec < 0) { | 385 | while (nsec < 0) { |
| 386 | asm("" : "+rm"(nsec)); | ||
| 380 | nsec += NSEC_PER_SEC; | 387 | nsec += NSEC_PER_SEC; |
| 381 | --sec; | 388 | --sec; |
| 382 | } | 389 | } |
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c index 7466cb811251..09113347d328 100644 --- a/kernel/time/clocksource.c +++ b/kernel/time/clocksource.c | |||
| @@ -21,7 +21,6 @@ | |||
| 21 | * | 21 | * |
| 22 | * TODO WishList: | 22 | * TODO WishList: |
| 23 | * o Allow clocksource drivers to be unregistered | 23 | * o Allow clocksource drivers to be unregistered |
| 24 | * o get rid of clocksource_jiffies extern | ||
| 25 | */ | 24 | */ |
| 26 | 25 | ||
| 27 | #include <linux/clocksource.h> | 26 | #include <linux/clocksource.h> |
| @@ -30,6 +29,7 @@ | |||
| 30 | #include <linux/module.h> | 29 | #include <linux/module.h> |
| 31 | #include <linux/sched.h> /* for spin_unlock_irq() using preempt_count() m68k */ | 30 | #include <linux/sched.h> /* for spin_unlock_irq() using preempt_count() m68k */ |
| 32 | #include <linux/tick.h> | 31 | #include <linux/tick.h> |
| 32 | #include <linux/kthread.h> | ||
| 33 | 33 | ||
| 34 | void timecounter_init(struct timecounter *tc, | 34 | void timecounter_init(struct timecounter *tc, |
| 35 | const struct cyclecounter *cc, | 35 | const struct cyclecounter *cc, |
| @@ -107,50 +107,35 @@ u64 timecounter_cyc2time(struct timecounter *tc, | |||
| 107 | } | 107 | } |
| 108 | EXPORT_SYMBOL(timecounter_cyc2time); | 108 | EXPORT_SYMBOL(timecounter_cyc2time); |
| 109 | 109 | ||
| 110 | /* XXX - Would like a better way for initializing curr_clocksource */ | ||
| 111 | extern struct clocksource clocksource_jiffies; | ||
| 112 | |||
| 113 | /*[Clocksource internal variables]--------- | 110 | /*[Clocksource internal variables]--------- |
| 114 | * curr_clocksource: | 111 | * curr_clocksource: |
| 115 | * currently selected clocksource. Initialized to clocksource_jiffies. | 112 | * currently selected clocksource. |
| 116 | * next_clocksource: | ||
| 117 | * pending next selected clocksource. | ||
| 118 | * clocksource_list: | 113 | * clocksource_list: |
| 119 | * linked list with the registered clocksources | 114 | * linked list with the registered clocksources |
| 120 | * clocksource_lock: | 115 | * clocksource_mutex: |
| 121 | * protects manipulations to curr_clocksource and next_clocksource | 116 | * protects manipulations to curr_clocksource and the clocksource_list |
| 122 | * and the clocksource_list | ||
| 123 | * override_name: | 117 | * override_name: |
| 124 | * Name of the user-specified clocksource. | 118 | * Name of the user-specified clocksource. |
| 125 | */ | 119 | */ |
| 126 | static struct clocksource *curr_clocksource = &clocksource_jiffies; | 120 | static struct clocksource *curr_clocksource; |
| 127 | static struct clocksource *next_clocksource; | ||
| 128 | static struct clocksource *clocksource_override; | ||
| 129 | static LIST_HEAD(clocksource_list); | 121 | static LIST_HEAD(clocksource_list); |
| 130 | static DEFINE_SPINLOCK(clocksource_lock); | 122 | static DEFINE_MUTEX(clocksource_mutex); |
| 131 | static char override_name[32]; | 123 | static char override_name[32]; |
| 132 | static int finished_booting; | 124 | static int finished_booting; |
| 133 | 125 | ||
| 134 | /* clocksource_done_booting - Called near the end of core bootup | ||
| 135 | * | ||
| 136 | * Hack to avoid lots of clocksource churn at boot time. | ||
| 137 | * We use fs_initcall because we want this to start before | ||
| 138 | * device_initcall but after subsys_initcall. | ||
| 139 | */ | ||
| 140 | static int __init clocksource_done_booting(void) | ||
| 141 | { | ||
| 142 | finished_booting = 1; | ||
| 143 | return 0; | ||
| 144 | } | ||
| 145 | fs_initcall(clocksource_done_booting); | ||
| 146 | |||
| 147 | #ifdef CONFIG_CLOCKSOURCE_WATCHDOG | 126 | #ifdef CONFIG_CLOCKSOURCE_WATCHDOG |
| 127 | static void clocksource_watchdog_work(struct work_struct *work); | ||
| 128 | |||
| 148 | static LIST_HEAD(watchdog_list); | 129 | static LIST_HEAD(watchdog_list); |
| 149 | static struct clocksource *watchdog; | 130 | static struct clocksource *watchdog; |
| 150 | static struct timer_list watchdog_timer; | 131 | static struct timer_list watchdog_timer; |
| 132 | static DECLARE_WORK(watchdog_work, clocksource_watchdog_work); | ||
| 151 | static DEFINE_SPINLOCK(watchdog_lock); | 133 | static DEFINE_SPINLOCK(watchdog_lock); |
| 152 | static cycle_t watchdog_last; | 134 | static cycle_t watchdog_last; |
| 153 | static unsigned long watchdog_resumed; | 135 | static int watchdog_running; |
| 136 | |||
| 137 | static int clocksource_watchdog_kthread(void *data); | ||
| 138 | static void __clocksource_change_rating(struct clocksource *cs, int rating); | ||
| 154 | 139 | ||
| 155 | /* | 140 | /* |
| 156 | * Interval: 0.5sec Threshold: 0.0625s | 141 | * Interval: 0.5sec Threshold: 0.0625s |
| @@ -158,135 +143,249 @@ static unsigned long watchdog_resumed; | |||
| 158 | #define WATCHDOG_INTERVAL (HZ >> 1) | 143 | #define WATCHDOG_INTERVAL (HZ >> 1) |
| 159 | #define WATCHDOG_THRESHOLD (NSEC_PER_SEC >> 4) | 144 | #define WATCHDOG_THRESHOLD (NSEC_PER_SEC >> 4) |
| 160 | 145 | ||
| 161 | static void clocksource_ratewd(struct clocksource *cs, int64_t delta) | 146 | static void clocksource_watchdog_work(struct work_struct *work) |
| 162 | { | 147 | { |
| 163 | if (delta > -WATCHDOG_THRESHOLD && delta < WATCHDOG_THRESHOLD) | 148 | /* |
| 164 | return; | 149 | * If kthread_run fails the next watchdog scan over the |
| 150 | * watchdog_list will find the unstable clock again. | ||
| 151 | */ | ||
| 152 | kthread_run(clocksource_watchdog_kthread, NULL, "kwatchdog"); | ||
| 153 | } | ||
| 165 | 154 | ||
| 155 | static void __clocksource_unstable(struct clocksource *cs) | ||
| 156 | { | ||
| 157 | cs->flags &= ~(CLOCK_SOURCE_VALID_FOR_HRES | CLOCK_SOURCE_WATCHDOG); | ||
| 158 | cs->flags |= CLOCK_SOURCE_UNSTABLE; | ||
| 159 | if (finished_booting) | ||
| 160 | schedule_work(&watchdog_work); | ||
| 161 | } | ||
| 162 | |||
| 163 | static void clocksource_unstable(struct clocksource *cs, int64_t delta) | ||
| 164 | { | ||
| 166 | printk(KERN_WARNING "Clocksource %s unstable (delta = %Ld ns)\n", | 165 | printk(KERN_WARNING "Clocksource %s unstable (delta = %Ld ns)\n", |
| 167 | cs->name, delta); | 166 | cs->name, delta); |
| 168 | cs->flags &= ~(CLOCK_SOURCE_VALID_FOR_HRES | CLOCK_SOURCE_WATCHDOG); | 167 | __clocksource_unstable(cs); |
| 169 | clocksource_change_rating(cs, 0); | 168 | } |
| 170 | list_del(&cs->wd_list); | 169 | |
| 170 | /** | ||
| 171 | * clocksource_mark_unstable - mark clocksource unstable via watchdog | ||
| 172 | * @cs: clocksource to be marked unstable | ||
| 173 | * | ||
| 174 | * This function is called instead of clocksource_change_rating from | ||
| 175 | * cpu hotplug code to avoid a deadlock between the clocksource mutex | ||
| 176 | * and the cpu hotplug mutex. It defers the update of the clocksource | ||
| 177 | * to the watchdog thread. | ||
| 178 | */ | ||
| 179 | void clocksource_mark_unstable(struct clocksource *cs) | ||
| 180 | { | ||
| 181 | unsigned long flags; | ||
| 182 | |||
| 183 | spin_lock_irqsave(&watchdog_lock, flags); | ||
| 184 | if (!(cs->flags & CLOCK_SOURCE_UNSTABLE)) { | ||
| 185 | if (list_empty(&cs->wd_list)) | ||
| 186 | list_add(&cs->wd_list, &watchdog_list); | ||
| 187 | __clocksource_unstable(cs); | ||
| 188 | } | ||
| 189 | spin_unlock_irqrestore(&watchdog_lock, flags); | ||
| 171 | } | 190 | } |
| 172 | 191 | ||
| 173 | static void clocksource_watchdog(unsigned long data) | 192 | static void clocksource_watchdog(unsigned long data) |
| 174 | { | 193 | { |
| 175 | struct clocksource *cs, *tmp; | 194 | struct clocksource *cs; |
| 176 | cycle_t csnow, wdnow; | 195 | cycle_t csnow, wdnow; |
| 177 | int64_t wd_nsec, cs_nsec; | 196 | int64_t wd_nsec, cs_nsec; |
| 178 | int resumed; | 197 | int next_cpu; |
| 179 | 198 | ||
| 180 | spin_lock(&watchdog_lock); | 199 | spin_lock(&watchdog_lock); |
| 181 | 200 | if (!watchdog_running) | |
| 182 | resumed = test_and_clear_bit(0, &watchdog_resumed); | 201 | goto out; |
| 183 | 202 | ||
| 184 | wdnow = watchdog->read(watchdog); | 203 | wdnow = watchdog->read(watchdog); |
| 185 | wd_nsec = cyc2ns(watchdog, (wdnow - watchdog_last) & watchdog->mask); | 204 | wd_nsec = clocksource_cyc2ns((wdnow - watchdog_last) & watchdog->mask, |
| 205 | watchdog->mult, watchdog->shift); | ||
| 186 | watchdog_last = wdnow; | 206 | watchdog_last = wdnow; |
| 187 | 207 | ||
| 188 | list_for_each_entry_safe(cs, tmp, &watchdog_list, wd_list) { | 208 | list_for_each_entry(cs, &watchdog_list, wd_list) { |
| 189 | csnow = cs->read(cs); | ||
| 190 | 209 | ||
| 191 | if (unlikely(resumed)) { | 210 | /* Clocksource already marked unstable? */ |
| 192 | cs->wd_last = csnow; | 211 | if (cs->flags & CLOCK_SOURCE_UNSTABLE) { |
| 212 | if (finished_booting) | ||
| 213 | schedule_work(&watchdog_work); | ||
| 193 | continue; | 214 | continue; |
| 194 | } | 215 | } |
| 195 | 216 | ||
| 196 | /* Initialized ? */ | 217 | csnow = cs->read(cs); |
| 218 | |||
| 219 | /* Clocksource initialized ? */ | ||
| 197 | if (!(cs->flags & CLOCK_SOURCE_WATCHDOG)) { | 220 | if (!(cs->flags & CLOCK_SOURCE_WATCHDOG)) { |
| 198 | if ((cs->flags & CLOCK_SOURCE_IS_CONTINUOUS) && | ||
| 199 | (watchdog->flags & CLOCK_SOURCE_IS_CONTINUOUS)) { | ||
| 200 | cs->flags |= CLOCK_SOURCE_VALID_FOR_HRES; | ||
| 201 | /* | ||
| 202 | * We just marked the clocksource as | ||
| 203 | * highres-capable, notify the rest of the | ||
| 204 | * system as well so that we transition | ||
| 205 | * into high-res mode: | ||
| 206 | */ | ||
| 207 | tick_clock_notify(); | ||
| 208 | } | ||
| 209 | cs->flags |= CLOCK_SOURCE_WATCHDOG; | 221 | cs->flags |= CLOCK_SOURCE_WATCHDOG; |
| 210 | cs->wd_last = csnow; | 222 | cs->wd_last = csnow; |
| 211 | } else { | 223 | continue; |
| 212 | cs_nsec = cyc2ns(cs, (csnow - cs->wd_last) & cs->mask); | ||
| 213 | cs->wd_last = csnow; | ||
| 214 | /* Check the delta. Might remove from the list ! */ | ||
| 215 | clocksource_ratewd(cs, cs_nsec - wd_nsec); | ||
| 216 | } | 224 | } |
| 217 | } | ||
| 218 | 225 | ||
| 219 | if (!list_empty(&watchdog_list)) { | 226 | /* Check the deviation from the watchdog clocksource. */ |
| 220 | /* | 227 | cs_nsec = clocksource_cyc2ns((csnow - cs->wd_last) & |
| 221 | * Cycle through CPUs to check if the CPUs stay | 228 | cs->mask, cs->mult, cs->shift); |
| 222 | * synchronized to each other. | 229 | cs->wd_last = csnow; |
| 223 | */ | 230 | if (abs(cs_nsec - wd_nsec) > WATCHDOG_THRESHOLD) { |
| 224 | int next_cpu = cpumask_next(raw_smp_processor_id(), | 231 | clocksource_unstable(cs, cs_nsec - wd_nsec); |
| 225 | cpu_online_mask); | 232 | continue; |
| 233 | } | ||
| 226 | 234 | ||
| 227 | if (next_cpu >= nr_cpu_ids) | 235 | if (!(cs->flags & CLOCK_SOURCE_VALID_FOR_HRES) && |
| 228 | next_cpu = cpumask_first(cpu_online_mask); | 236 | (cs->flags & CLOCK_SOURCE_IS_CONTINUOUS) && |
| 229 | watchdog_timer.expires += WATCHDOG_INTERVAL; | 237 | (watchdog->flags & CLOCK_SOURCE_IS_CONTINUOUS)) { |
| 230 | add_timer_on(&watchdog_timer, next_cpu); | 238 | cs->flags |= CLOCK_SOURCE_VALID_FOR_HRES; |
| 239 | /* | ||
| 240 | * We just marked the clocksource as highres-capable, | ||
| 241 | * notify the rest of the system as well so that we | ||
| 242 | * transition into high-res mode: | ||
| 243 | */ | ||
| 244 | tick_clock_notify(); | ||
| 245 | } | ||
| 231 | } | 246 | } |
| 247 | |||
| 248 | /* | ||
| 249 | * Cycle through CPUs to check if the CPUs stay synchronized | ||
| 250 | * to each other. | ||
| 251 | */ | ||
| 252 | next_cpu = cpumask_next(raw_smp_processor_id(), cpu_online_mask); | ||
| 253 | if (next_cpu >= nr_cpu_ids) | ||
| 254 | next_cpu = cpumask_first(cpu_online_mask); | ||
| 255 | watchdog_timer.expires += WATCHDOG_INTERVAL; | ||
| 256 | add_timer_on(&watchdog_timer, next_cpu); | ||
| 257 | out: | ||
| 232 | spin_unlock(&watchdog_lock); | 258 | spin_unlock(&watchdog_lock); |
| 233 | } | 259 | } |
| 260 | |||
| 261 | static inline void clocksource_start_watchdog(void) | ||
| 262 | { | ||
| 263 | if (watchdog_running || !watchdog || list_empty(&watchdog_list)) | ||
| 264 | return; | ||
| 265 | init_timer(&watchdog_timer); | ||
| 266 | watchdog_timer.function = clocksource_watchdog; | ||
| 267 | watchdog_last = watchdog->read(watchdog); | ||
| 268 | watchdog_timer.expires = jiffies + WATCHDOG_INTERVAL; | ||
| 269 | add_timer_on(&watchdog_timer, cpumask_first(cpu_online_mask)); | ||
| 270 | watchdog_running = 1; | ||
| 271 | } | ||
| 272 | |||
| 273 | static inline void clocksource_stop_watchdog(void) | ||
| 274 | { | ||
| 275 | if (!watchdog_running || (watchdog && !list_empty(&watchdog_list))) | ||
| 276 | return; | ||
| 277 | del_timer(&watchdog_timer); | ||
| 278 | watchdog_running = 0; | ||
| 279 | } | ||
| 280 | |||
| 281 | static inline void clocksource_reset_watchdog(void) | ||
| 282 | { | ||
| 283 | struct clocksource *cs; | ||
| 284 | |||
| 285 | list_for_each_entry(cs, &watchdog_list, wd_list) | ||
| 286 | cs->flags &= ~CLOCK_SOURCE_WATCHDOG; | ||
| 287 | } | ||
| 288 | |||
| 234 | static void clocksource_resume_watchdog(void) | 289 | static void clocksource_resume_watchdog(void) |
| 235 | { | 290 | { |
| 236 | set_bit(0, &watchdog_resumed); | 291 | unsigned long flags; |
| 292 | |||
| 293 | spin_lock_irqsave(&watchdog_lock, flags); | ||
| 294 | clocksource_reset_watchdog(); | ||
| 295 | spin_unlock_irqrestore(&watchdog_lock, flags); | ||
| 237 | } | 296 | } |
| 238 | 297 | ||
| 239 | static void clocksource_check_watchdog(struct clocksource *cs) | 298 | static void clocksource_enqueue_watchdog(struct clocksource *cs) |
| 240 | { | 299 | { |
| 241 | struct clocksource *cse; | ||
| 242 | unsigned long flags; | 300 | unsigned long flags; |
| 243 | 301 | ||
| 244 | spin_lock_irqsave(&watchdog_lock, flags); | 302 | spin_lock_irqsave(&watchdog_lock, flags); |
| 245 | if (cs->flags & CLOCK_SOURCE_MUST_VERIFY) { | 303 | if (cs->flags & CLOCK_SOURCE_MUST_VERIFY) { |
| 246 | int started = !list_empty(&watchdog_list); | 304 | /* cs is a clocksource to be watched. */ |
| 247 | |||
| 248 | list_add(&cs->wd_list, &watchdog_list); | 305 | list_add(&cs->wd_list, &watchdog_list); |
| 249 | if (!started && watchdog) { | 306 | cs->flags &= ~CLOCK_SOURCE_WATCHDOG; |
| 250 | watchdog_last = watchdog->read(watchdog); | ||
| 251 | watchdog_timer.expires = jiffies + WATCHDOG_INTERVAL; | ||
| 252 | add_timer_on(&watchdog_timer, | ||
| 253 | cpumask_first(cpu_online_mask)); | ||
| 254 | } | ||
| 255 | } else { | 307 | } else { |
| 308 | /* cs is a watchdog. */ | ||
| 256 | if (cs->flags & CLOCK_SOURCE_IS_CONTINUOUS) | 309 | if (cs->flags & CLOCK_SOURCE_IS_CONTINUOUS) |
| 257 | cs->flags |= CLOCK_SOURCE_VALID_FOR_HRES; | 310 | cs->flags |= CLOCK_SOURCE_VALID_FOR_HRES; |
| 258 | 311 | /* Pick the best watchdog. */ | |
| 259 | if (!watchdog || cs->rating > watchdog->rating) { | 312 | if (!watchdog || cs->rating > watchdog->rating) { |
| 260 | if (watchdog) | ||
| 261 | del_timer(&watchdog_timer); | ||
| 262 | watchdog = cs; | 313 | watchdog = cs; |
| 263 | init_timer(&watchdog_timer); | ||
| 264 | watchdog_timer.function = clocksource_watchdog; | ||
| 265 | |||
| 266 | /* Reset watchdog cycles */ | 314 | /* Reset watchdog cycles */ |
| 267 | list_for_each_entry(cse, &watchdog_list, wd_list) | 315 | clocksource_reset_watchdog(); |
| 268 | cse->flags &= ~CLOCK_SOURCE_WATCHDOG; | 316 | } |
| 269 | /* Start if list is not empty */ | 317 | } |
| 270 | if (!list_empty(&watchdog_list)) { | 318 | /* Check if the watchdog timer needs to be started. */ |
| 271 | watchdog_last = watchdog->read(watchdog); | 319 | clocksource_start_watchdog(); |
| 272 | watchdog_timer.expires = | 320 | spin_unlock_irqrestore(&watchdog_lock, flags); |
| 273 | jiffies + WATCHDOG_INTERVAL; | 321 | } |
| 274 | add_timer_on(&watchdog_timer, | 322 | |
| 275 | cpumask_first(cpu_online_mask)); | 323 | static void clocksource_dequeue_watchdog(struct clocksource *cs) |
| 276 | } | 324 | { |
| 325 | struct clocksource *tmp; | ||
| 326 | unsigned long flags; | ||
| 327 | |||
| 328 | spin_lock_irqsave(&watchdog_lock, flags); | ||
| 329 | if (cs->flags & CLOCK_SOURCE_MUST_VERIFY) { | ||
| 330 | /* cs is a watched clocksource. */ | ||
| 331 | list_del_init(&cs->wd_list); | ||
| 332 | } else if (cs == watchdog) { | ||
| 333 | /* Reset watchdog cycles */ | ||
| 334 | clocksource_reset_watchdog(); | ||
| 335 | /* Current watchdog is removed. Find an alternative. */ | ||
| 336 | watchdog = NULL; | ||
| 337 | list_for_each_entry(tmp, &clocksource_list, list) { | ||
| 338 | if (tmp == cs || tmp->flags & CLOCK_SOURCE_MUST_VERIFY) | ||
| 339 | continue; | ||
| 340 | if (!watchdog || tmp->rating > watchdog->rating) | ||
| 341 | watchdog = tmp; | ||
| 277 | } | 342 | } |
| 278 | } | 343 | } |
| 344 | cs->flags &= ~CLOCK_SOURCE_WATCHDOG; | ||
| 345 | /* Check if the watchdog timer needs to be stopped. */ | ||
| 346 | clocksource_stop_watchdog(); | ||
| 279 | spin_unlock_irqrestore(&watchdog_lock, flags); | 347 | spin_unlock_irqrestore(&watchdog_lock, flags); |
| 280 | } | 348 | } |
| 281 | #else | 349 | |
| 282 | static void clocksource_check_watchdog(struct clocksource *cs) | 350 | static int clocksource_watchdog_kthread(void *data) |
| 351 | { | ||
| 352 | struct clocksource *cs, *tmp; | ||
| 353 | unsigned long flags; | ||
| 354 | LIST_HEAD(unstable); | ||
| 355 | |||
| 356 | mutex_lock(&clocksource_mutex); | ||
| 357 | spin_lock_irqsave(&watchdog_lock, flags); | ||
| 358 | list_for_each_entry_safe(cs, tmp, &watchdog_list, wd_list) | ||
| 359 | if (cs->flags & CLOCK_SOURCE_UNSTABLE) { | ||
| 360 | list_del_init(&cs->wd_list); | ||
| 361 | list_add(&cs->wd_list, &unstable); | ||
| 362 | } | ||
| 363 | /* Check if the watchdog timer needs to be stopped. */ | ||
| 364 | clocksource_stop_watchdog(); | ||
| 365 | spin_unlock_irqrestore(&watchdog_lock, flags); | ||
| 366 | |||
| 367 | /* Needs to be done outside of watchdog lock */ | ||
| 368 | list_for_each_entry_safe(cs, tmp, &unstable, wd_list) { | ||
| 369 | list_del_init(&cs->wd_list); | ||
| 370 | __clocksource_change_rating(cs, 0); | ||
| 371 | } | ||
| 372 | mutex_unlock(&clocksource_mutex); | ||
| 373 | return 0; | ||
| 374 | } | ||
| 375 | |||
| 376 | #else /* CONFIG_CLOCKSOURCE_WATCHDOG */ | ||
| 377 | |||
| 378 | static void clocksource_enqueue_watchdog(struct clocksource *cs) | ||
| 283 | { | 379 | { |
| 284 | if (cs->flags & CLOCK_SOURCE_IS_CONTINUOUS) | 380 | if (cs->flags & CLOCK_SOURCE_IS_CONTINUOUS) |
| 285 | cs->flags |= CLOCK_SOURCE_VALID_FOR_HRES; | 381 | cs->flags |= CLOCK_SOURCE_VALID_FOR_HRES; |
| 286 | } | 382 | } |
| 287 | 383 | ||
| 384 | static inline void clocksource_dequeue_watchdog(struct clocksource *cs) { } | ||
| 288 | static inline void clocksource_resume_watchdog(void) { } | 385 | static inline void clocksource_resume_watchdog(void) { } |
| 289 | #endif | 386 | static inline int clocksource_watchdog_kthread(void *data) { return 0; } |
| 387 | |||
| 388 | #endif /* CONFIG_CLOCKSOURCE_WATCHDOG */ | ||
| 290 | 389 | ||
| 291 | /** | 390 | /** |
| 292 | * clocksource_resume - resume the clocksource(s) | 391 | * clocksource_resume - resume the clocksource(s) |
| @@ -294,18 +393,16 @@ static inline void clocksource_resume_watchdog(void) { } | |||
| 294 | void clocksource_resume(void) | 393 | void clocksource_resume(void) |
| 295 | { | 394 | { |
| 296 | struct clocksource *cs; | 395 | struct clocksource *cs; |
| 297 | unsigned long flags; | ||
| 298 | 396 | ||
| 299 | spin_lock_irqsave(&clocksource_lock, flags); | 397 | mutex_lock(&clocksource_mutex); |
| 300 | 398 | ||
| 301 | list_for_each_entry(cs, &clocksource_list, list) { | 399 | list_for_each_entry(cs, &clocksource_list, list) |
| 302 | if (cs->resume) | 400 | if (cs->resume) |
| 303 | cs->resume(); | 401 | cs->resume(); |
| 304 | } | ||
| 305 | 402 | ||
| 306 | clocksource_resume_watchdog(); | 403 | clocksource_resume_watchdog(); |
| 307 | 404 | ||
| 308 | spin_unlock_irqrestore(&clocksource_lock, flags); | 405 | mutex_unlock(&clocksource_mutex); |
| 309 | } | 406 | } |
| 310 | 407 | ||
| 311 | /** | 408 | /** |
| @@ -320,75 +417,94 @@ void clocksource_touch_watchdog(void) | |||
| 320 | clocksource_resume_watchdog(); | 417 | clocksource_resume_watchdog(); |
| 321 | } | 418 | } |
| 322 | 419 | ||
| 420 | #ifdef CONFIG_GENERIC_TIME | ||
| 421 | |||
| 323 | /** | 422 | /** |
| 324 | * clocksource_get_next - Returns the selected clocksource | 423 | * clocksource_select - Select the best clocksource available |
| 424 | * | ||
| 425 | * Private function. Must hold clocksource_mutex when called. | ||
| 325 | * | 426 | * |
| 427 | * Select the clocksource with the best rating, or the clocksource, | ||
| 428 | * which is selected by userspace override. | ||
| 326 | */ | 429 | */ |
| 327 | struct clocksource *clocksource_get_next(void) | 430 | static void clocksource_select(void) |
| 328 | { | 431 | { |
| 329 | unsigned long flags; | 432 | struct clocksource *best, *cs; |
| 330 | 433 | ||
| 331 | spin_lock_irqsave(&clocksource_lock, flags); | 434 | if (!finished_booting || list_empty(&clocksource_list)) |
| 332 | if (next_clocksource && finished_booting) { | 435 | return; |
| 333 | curr_clocksource = next_clocksource; | 436 | /* First clocksource on the list has the best rating. */ |
| 334 | next_clocksource = NULL; | 437 | best = list_first_entry(&clocksource_list, struct clocksource, list); |
| 438 | /* Check for the override clocksource. */ | ||
| 439 | list_for_each_entry(cs, &clocksource_list, list) { | ||
| 440 | if (strcmp(cs->name, override_name) != 0) | ||
| 441 | continue; | ||
| 442 | /* | ||
| 443 | * Check to make sure we don't switch to a non-highres | ||
| 444 | * capable clocksource if the tick code is in oneshot | ||
| 445 | * mode (highres or nohz) | ||
| 446 | */ | ||
| 447 | if (!(cs->flags & CLOCK_SOURCE_VALID_FOR_HRES) && | ||
| 448 | tick_oneshot_mode_active()) { | ||
| 449 | /* Override clocksource cannot be used. */ | ||
| 450 | printk(KERN_WARNING "Override clocksource %s is not " | ||
| 451 | "HRT compatible. Cannot switch while in " | ||
| 452 | "HRT/NOHZ mode\n", cs->name); | ||
| 453 | override_name[0] = 0; | ||
| 454 | } else | ||
| 455 | /* Override clocksource can be used. */ | ||
| 456 | best = cs; | ||
| 457 | break; | ||
| 458 | } | ||
| 459 | if (curr_clocksource != best) { | ||
| 460 | printk(KERN_INFO "Switching to clocksource %s\n", best->name); | ||
| 461 | curr_clocksource = best; | ||
| 462 | timekeeping_notify(curr_clocksource); | ||
| 335 | } | 463 | } |
| 336 | spin_unlock_irqrestore(&clocksource_lock, flags); | ||
| 337 | |||
| 338 | return curr_clocksource; | ||
| 339 | } | 464 | } |
| 340 | 465 | ||
| 341 | /** | 466 | #else /* CONFIG_GENERIC_TIME */ |
| 342 | * select_clocksource - Selects the best registered clocksource. | 467 | |
| 343 | * | 468 | static inline void clocksource_select(void) { } |
| 344 | * Private function. Must hold clocksource_lock when called. | 469 | |
| 470 | #endif | ||
| 471 | |||
| 472 | /* | ||
| 473 | * clocksource_done_booting - Called near the end of core bootup | ||
| 345 | * | 474 | * |
| 346 | * Select the clocksource with the best rating, or the clocksource, | 475 | * Hack to avoid lots of clocksource churn at boot time. |
| 347 | * which is selected by userspace override. | 476 | * We use fs_initcall because we want this to start before |
| 477 | * device_initcall but after subsys_initcall. | ||
| 348 | */ | 478 | */ |
| 349 | static struct clocksource *select_clocksource(void) | 479 | static int __init clocksource_done_booting(void) |
| 350 | { | 480 | { |
| 351 | struct clocksource *next; | 481 | finished_booting = 1; |
| 352 | |||
| 353 | if (list_empty(&clocksource_list)) | ||
| 354 | return NULL; | ||
| 355 | |||
| 356 | if (clocksource_override) | ||
| 357 | next = clocksource_override; | ||
| 358 | else | ||
| 359 | next = list_entry(clocksource_list.next, struct clocksource, | ||
| 360 | list); | ||
| 361 | 482 | ||
| 362 | if (next == curr_clocksource) | 483 | /* |
| 363 | return NULL; | 484 | * Run the watchdog first to eliminate unstable clock sources |
| 485 | */ | ||
| 486 | clocksource_watchdog_kthread(NULL); | ||
| 364 | 487 | ||
| 365 | return next; | 488 | mutex_lock(&clocksource_mutex); |
| 489 | clocksource_select(); | ||
| 490 | mutex_unlock(&clocksource_mutex); | ||
| 491 | return 0; | ||
| 366 | } | 492 | } |
| 493 | fs_initcall(clocksource_done_booting); | ||
| 367 | 494 | ||
| 368 | /* | 495 | /* |
| 369 | * Enqueue the clocksource sorted by rating | 496 | * Enqueue the clocksource sorted by rating |
| 370 | */ | 497 | */ |
| 371 | static int clocksource_enqueue(struct clocksource *c) | 498 | static void clocksource_enqueue(struct clocksource *cs) |
| 372 | { | 499 | { |
| 373 | struct list_head *tmp, *entry = &clocksource_list; | 500 | struct list_head *entry = &clocksource_list; |
| 501 | struct clocksource *tmp; | ||
| 374 | 502 | ||
| 375 | list_for_each(tmp, &clocksource_list) { | 503 | list_for_each_entry(tmp, &clocksource_list, list) |
| 376 | struct clocksource *cs; | ||
| 377 | |||
| 378 | cs = list_entry(tmp, struct clocksource, list); | ||
| 379 | if (cs == c) | ||
| 380 | return -EBUSY; | ||
| 381 | /* Keep track of the place, where to insert */ | 504 | /* Keep track of the place, where to insert */ |
| 382 | if (cs->rating >= c->rating) | 505 | if (tmp->rating >= cs->rating) |
| 383 | entry = tmp; | 506 | entry = &tmp->list; |
| 384 | } | 507 | list_add(&cs->list, entry); |
| 385 | list_add(&c->list, entry); | ||
| 386 | |||
| 387 | if (strlen(c->name) == strlen(override_name) && | ||
| 388 | !strcmp(c->name, override_name)) | ||
| 389 | clocksource_override = c; | ||
| 390 | |||
| 391 | return 0; | ||
| 392 | } | 508 | } |
| 393 | 509 | ||
| 394 | /** | 510 | /** |
| @@ -397,52 +513,48 @@ static int clocksource_enqueue(struct clocksource *c) | |||
| 397 | * | 513 | * |
| 398 | * Returns -EBUSY if registration fails, zero otherwise. | 514 | * Returns -EBUSY if registration fails, zero otherwise. |
| 399 | */ | 515 | */ |
| 400 | int clocksource_register(struct clocksource *c) | 516 | int clocksource_register(struct clocksource *cs) |
| 401 | { | 517 | { |
| 402 | unsigned long flags; | 518 | mutex_lock(&clocksource_mutex); |
| 403 | int ret; | 519 | clocksource_enqueue(cs); |
| 404 | 520 | clocksource_select(); | |
| 405 | spin_lock_irqsave(&clocksource_lock, flags); | 521 | clocksource_enqueue_watchdog(cs); |
| 406 | ret = clocksource_enqueue(c); | 522 | mutex_unlock(&clocksource_mutex); |
| 407 | if (!ret) | 523 | return 0; |
| 408 | next_clocksource = select_clocksource(); | ||
| 409 | spin_unlock_irqrestore(&clocksource_lock, flags); | ||
| 410 | if (!ret) | ||
| 411 | clocksource_check_watchdog(c); | ||
| 412 | return ret; | ||
| 413 | } | 524 | } |
| 414 | EXPORT_SYMBOL(clocksource_register); | 525 | EXPORT_SYMBOL(clocksource_register); |
| 415 | 526 | ||
| 527 | static void __clocksource_change_rating(struct clocksource *cs, int rating) | ||
| 528 | { | ||
| 529 | list_del(&cs->list); | ||
| 530 | cs->rating = rating; | ||
| 531 | clocksource_enqueue(cs); | ||
| 532 | clocksource_select(); | ||
| 533 | } | ||
| 534 | |||
| 416 | /** | 535 | /** |
| 417 | * clocksource_change_rating - Change the rating of a registered clocksource | 536 | * clocksource_change_rating - Change the rating of a registered clocksource |
| 418 | * | ||
| 419 | */ | 537 | */ |
| 420 | void clocksource_change_rating(struct clocksource *cs, int rating) | 538 | void clocksource_change_rating(struct clocksource *cs, int rating) |
| 421 | { | 539 | { |
| 422 | unsigned long flags; | 540 | mutex_lock(&clocksource_mutex); |
| 423 | 541 | __clocksource_change_rating(cs, rating); | |
| 424 | spin_lock_irqsave(&clocksource_lock, flags); | 542 | mutex_unlock(&clocksource_mutex); |
| 425 | list_del(&cs->list); | ||
| 426 | cs->rating = rating; | ||
| 427 | clocksource_enqueue(cs); | ||
| 428 | next_clocksource = select_clocksource(); | ||
| 429 | spin_unlock_irqrestore(&clocksource_lock, flags); | ||
| 430 | } | 543 | } |
| 544 | EXPORT_SYMBOL(clocksource_change_rating); | ||
| 431 | 545 | ||
| 432 | /** | 546 | /** |
| 433 | * clocksource_unregister - remove a registered clocksource | 547 | * clocksource_unregister - remove a registered clocksource |
| 434 | */ | 548 | */ |
| 435 | void clocksource_unregister(struct clocksource *cs) | 549 | void clocksource_unregister(struct clocksource *cs) |
| 436 | { | 550 | { |
| 437 | unsigned long flags; | 551 | mutex_lock(&clocksource_mutex); |
| 438 | 552 | clocksource_dequeue_watchdog(cs); | |
| 439 | spin_lock_irqsave(&clocksource_lock, flags); | ||
| 440 | list_del(&cs->list); | 553 | list_del(&cs->list); |
| 441 | if (clocksource_override == cs) | 554 | clocksource_select(); |
| 442 | clocksource_override = NULL; | 555 | mutex_unlock(&clocksource_mutex); |
| 443 | next_clocksource = select_clocksource(); | ||
| 444 | spin_unlock_irqrestore(&clocksource_lock, flags); | ||
| 445 | } | 556 | } |
| 557 | EXPORT_SYMBOL(clocksource_unregister); | ||
| 446 | 558 | ||
| 447 | #ifdef CONFIG_SYSFS | 559 | #ifdef CONFIG_SYSFS |
| 448 | /** | 560 | /** |
| @@ -458,9 +570,9 @@ sysfs_show_current_clocksources(struct sys_device *dev, | |||
| 458 | { | 570 | { |
| 459 | ssize_t count = 0; | 571 | ssize_t count = 0; |
| 460 | 572 | ||
| 461 | spin_lock_irq(&clocksource_lock); | 573 | mutex_lock(&clocksource_mutex); |
| 462 | count = snprintf(buf, PAGE_SIZE, "%s\n", curr_clocksource->name); | 574 | count = snprintf(buf, PAGE_SIZE, "%s\n", curr_clocksource->name); |
| 463 | spin_unlock_irq(&clocksource_lock); | 575 | mutex_unlock(&clocksource_mutex); |
| 464 | 576 | ||
| 465 | return count; | 577 | return count; |
| 466 | } | 578 | } |
| @@ -478,9 +590,7 @@ static ssize_t sysfs_override_clocksource(struct sys_device *dev, | |||
| 478 | struct sysdev_attribute *attr, | 590 | struct sysdev_attribute *attr, |
| 479 | const char *buf, size_t count) | 591 | const char *buf, size_t count) |
| 480 | { | 592 | { |
| 481 | struct clocksource *ovr = NULL; | ||
| 482 | size_t ret = count; | 593 | size_t ret = count; |
| 483 | int len; | ||
| 484 | 594 | ||
| 485 | /* strings from sysfs write are not 0 terminated! */ | 595 | /* strings from sysfs write are not 0 terminated! */ |
| 486 | if (count >= sizeof(override_name)) | 596 | if (count >= sizeof(override_name)) |
| @@ -490,44 +600,14 @@ static ssize_t sysfs_override_clocksource(struct sys_device *dev, | |||
| 490 | if (buf[count-1] == '\n') | 600 | if (buf[count-1] == '\n') |
| 491 | count--; | 601 | count--; |
| 492 | 602 | ||
| 493 | spin_lock_irq(&clocksource_lock); | 603 | mutex_lock(&clocksource_mutex); |
| 494 | 604 | ||
| 495 | if (count > 0) | 605 | if (count > 0) |
| 496 | memcpy(override_name, buf, count); | 606 | memcpy(override_name, buf, count); |
| 497 | override_name[count] = 0; | 607 | override_name[count] = 0; |
| 608 | clocksource_select(); | ||
| 498 | 609 | ||
| 499 | len = strlen(override_name); | 610 | mutex_unlock(&clocksource_mutex); |
| 500 | if (len) { | ||
| 501 | struct clocksource *cs; | ||
| 502 | |||
| 503 | ovr = clocksource_override; | ||
| 504 | /* try to select it: */ | ||
| 505 | list_for_each_entry(cs, &clocksource_list, list) { | ||
| 506 | if (strlen(cs->name) == len && | ||
| 507 | !strcmp(cs->name, override_name)) | ||
| 508 | ovr = cs; | ||
| 509 | } | ||
| 510 | } | ||
| 511 | |||
| 512 | /* | ||
| 513 | * Check to make sure we don't switch to a non-highres capable | ||
| 514 | * clocksource if the tick code is in oneshot mode (highres or nohz) | ||
| 515 | */ | ||
| 516 | if (tick_oneshot_mode_active() && ovr && | ||
| 517 | !(ovr->flags & CLOCK_SOURCE_VALID_FOR_HRES)) { | ||
| 518 | printk(KERN_WARNING "%s clocksource is not HRT compatible. " | ||
| 519 | "Cannot switch while in HRT/NOHZ mode\n", ovr->name); | ||
| 520 | ovr = NULL; | ||
| 521 | override_name[0] = 0; | ||
| 522 | } | ||
| 523 | |||
| 524 | /* Reselect, when the override name has changed */ | ||
| 525 | if (ovr != clocksource_override) { | ||
| 526 | clocksource_override = ovr; | ||
| 527 | next_clocksource = select_clocksource(); | ||
| 528 | } | ||
| 529 | |||
| 530 | spin_unlock_irq(&clocksource_lock); | ||
| 531 | 611 | ||
| 532 | return ret; | 612 | return ret; |
| 533 | } | 613 | } |
| @@ -547,7 +627,7 @@ sysfs_show_available_clocksources(struct sys_device *dev, | |||
| 547 | struct clocksource *src; | 627 | struct clocksource *src; |
| 548 | ssize_t count = 0; | 628 | ssize_t count = 0; |
| 549 | 629 | ||
| 550 | spin_lock_irq(&clocksource_lock); | 630 | mutex_lock(&clocksource_mutex); |
| 551 | list_for_each_entry(src, &clocksource_list, list) { | 631 | list_for_each_entry(src, &clocksource_list, list) { |
| 552 | /* | 632 | /* |
| 553 | * Don't show non-HRES clocksource if the tick code is | 633 | * Don't show non-HRES clocksource if the tick code is |
| @@ -559,7 +639,7 @@ sysfs_show_available_clocksources(struct sys_device *dev, | |||
| 559 | max((ssize_t)PAGE_SIZE - count, (ssize_t)0), | 639 | max((ssize_t)PAGE_SIZE - count, (ssize_t)0), |
| 560 | "%s ", src->name); | 640 | "%s ", src->name); |
| 561 | } | 641 | } |
| 562 | spin_unlock_irq(&clocksource_lock); | 642 | mutex_unlock(&clocksource_mutex); |
| 563 | 643 | ||
| 564 | count += snprintf(buf + count, | 644 | count += snprintf(buf + count, |
| 565 | max((ssize_t)PAGE_SIZE - count, (ssize_t)0), "\n"); | 645 | max((ssize_t)PAGE_SIZE - count, (ssize_t)0), "\n"); |
| @@ -614,11 +694,10 @@ device_initcall(init_clocksource_sysfs); | |||
| 614 | */ | 694 | */ |
| 615 | static int __init boot_override_clocksource(char* str) | 695 | static int __init boot_override_clocksource(char* str) |
| 616 | { | 696 | { |
| 617 | unsigned long flags; | 697 | mutex_lock(&clocksource_mutex); |
| 618 | spin_lock_irqsave(&clocksource_lock, flags); | ||
| 619 | if (str) | 698 | if (str) |
| 620 | strlcpy(override_name, str, sizeof(override_name)); | 699 | strlcpy(override_name, str, sizeof(override_name)); |
| 621 | spin_unlock_irqrestore(&clocksource_lock, flags); | 700 | mutex_unlock(&clocksource_mutex); |
| 622 | return 1; | 701 | return 1; |
| 623 | } | 702 | } |
| 624 | 703 | ||
diff --git a/kernel/time/jiffies.c b/kernel/time/jiffies.c index c3f6c30816e3..5404a8456909 100644 --- a/kernel/time/jiffies.c +++ b/kernel/time/jiffies.c | |||
| @@ -61,7 +61,6 @@ struct clocksource clocksource_jiffies = { | |||
| 61 | .read = jiffies_read, | 61 | .read = jiffies_read, |
| 62 | .mask = 0xffffffff, /*32bits*/ | 62 | .mask = 0xffffffff, /*32bits*/ |
| 63 | .mult = NSEC_PER_JIFFY << JIFFIES_SHIFT, /* details above */ | 63 | .mult = NSEC_PER_JIFFY << JIFFIES_SHIFT, /* details above */ |
| 64 | .mult_orig = NSEC_PER_JIFFY << JIFFIES_SHIFT, | ||
| 65 | .shift = JIFFIES_SHIFT, | 64 | .shift = JIFFIES_SHIFT, |
| 66 | }; | 65 | }; |
| 67 | 66 | ||
| @@ -71,3 +70,8 @@ static int __init init_jiffies_clocksource(void) | |||
| 71 | } | 70 | } |
| 72 | 71 | ||
| 73 | core_initcall(init_jiffies_clocksource); | 72 | core_initcall(init_jiffies_clocksource); |
| 73 | |||
| 74 | struct clocksource * __init __weak clocksource_default_clock(void) | ||
| 75 | { | ||
| 76 | return &clocksource_jiffies; | ||
| 77 | } | ||
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c index 7fc64375ff43..4800f933910e 100644 --- a/kernel/time/ntp.c +++ b/kernel/time/ntp.c | |||
| @@ -194,8 +194,7 @@ static enum hrtimer_restart ntp_leap_second(struct hrtimer *timer) | |||
| 194 | case TIME_OK: | 194 | case TIME_OK: |
| 195 | break; | 195 | break; |
| 196 | case TIME_INS: | 196 | case TIME_INS: |
| 197 | xtime.tv_sec--; | 197 | timekeeping_leap_insert(-1); |
| 198 | wall_to_monotonic.tv_sec++; | ||
| 199 | time_state = TIME_OOP; | 198 | time_state = TIME_OOP; |
| 200 | printk(KERN_NOTICE | 199 | printk(KERN_NOTICE |
| 201 | "Clock: inserting leap second 23:59:60 UTC\n"); | 200 | "Clock: inserting leap second 23:59:60 UTC\n"); |
| @@ -203,9 +202,8 @@ static enum hrtimer_restart ntp_leap_second(struct hrtimer *timer) | |||
| 203 | res = HRTIMER_RESTART; | 202 | res = HRTIMER_RESTART; |
| 204 | break; | 203 | break; |
| 205 | case TIME_DEL: | 204 | case TIME_DEL: |
| 206 | xtime.tv_sec++; | 205 | timekeeping_leap_insert(1); |
| 207 | time_tai--; | 206 | time_tai--; |
| 208 | wall_to_monotonic.tv_sec--; | ||
| 209 | time_state = TIME_WAIT; | 207 | time_state = TIME_WAIT; |
| 210 | printk(KERN_NOTICE | 208 | printk(KERN_NOTICE |
| 211 | "Clock: deleting leap second 23:59:59 UTC\n"); | 209 | "Clock: deleting leap second 23:59:59 UTC\n"); |
| @@ -219,7 +217,6 @@ static enum hrtimer_restart ntp_leap_second(struct hrtimer *timer) | |||
| 219 | time_state = TIME_OK; | 217 | time_state = TIME_OK; |
| 220 | break; | 218 | break; |
| 221 | } | 219 | } |
| 222 | update_vsyscall(&xtime, clock); | ||
| 223 | 220 | ||
| 224 | write_sequnlock(&xtime_lock); | 221 | write_sequnlock(&xtime_lock); |
| 225 | 222 | ||
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index e8c77d9c633a..fb0f46fa1ecd 100644 --- a/kernel/time/timekeeping.c +++ b/kernel/time/timekeeping.c | |||
| @@ -18,7 +18,117 @@ | |||
| 18 | #include <linux/jiffies.h> | 18 | #include <linux/jiffies.h> |
| 19 | #include <linux/time.h> | 19 | #include <linux/time.h> |
| 20 | #include <linux/tick.h> | 20 | #include <linux/tick.h> |
| 21 | #include <linux/stop_machine.h> | ||
| 22 | |||
| 23 | /* Structure holding internal timekeeping values. */ | ||
| 24 | struct timekeeper { | ||
| 25 | /* Current clocksource used for timekeeping. */ | ||
| 26 | struct clocksource *clock; | ||
| 27 | /* The shift value of the current clocksource. */ | ||
| 28 | int shift; | ||
| 29 | |||
| 30 | /* Number of clock cycles in one NTP interval. */ | ||
| 31 | cycle_t cycle_interval; | ||
| 32 | /* Number of clock shifted nano seconds in one NTP interval. */ | ||
| 33 | u64 xtime_interval; | ||
| 34 | /* Raw nano seconds accumulated per NTP interval. */ | ||
| 35 | u32 raw_interval; | ||
| 36 | |||
| 37 | /* Clock shifted nano seconds remainder not stored in xtime.tv_nsec. */ | ||
| 38 | u64 xtime_nsec; | ||
| 39 | /* Difference between accumulated time and NTP time in ntp | ||
| 40 | * shifted nano seconds. */ | ||
| 41 | s64 ntp_error; | ||
| 42 | /* Shift conversion between clock shifted nano seconds and | ||
| 43 | * ntp shifted nano seconds. */ | ||
| 44 | int ntp_error_shift; | ||
| 45 | /* NTP adjusted clock multiplier */ | ||
| 46 | u32 mult; | ||
| 47 | }; | ||
| 48 | |||
| 49 | struct timekeeper timekeeper; | ||
| 50 | |||
| 51 | /** | ||
| 52 | * timekeeper_setup_internals - Set up internals to use clocksource clock. | ||
| 53 | * | ||
| 54 | * @clock: Pointer to clocksource. | ||
| 55 | * | ||
| 56 | * Calculates a fixed cycle/nsec interval for a given clocksource/adjustment | ||
| 57 | * pair and interval request. | ||
| 58 | * | ||
| 59 | * Unless you're the timekeeping code, you should not be using this! | ||
| 60 | */ | ||
| 61 | static void timekeeper_setup_internals(struct clocksource *clock) | ||
| 62 | { | ||
| 63 | cycle_t interval; | ||
| 64 | u64 tmp; | ||
| 65 | |||
| 66 | timekeeper.clock = clock; | ||
| 67 | clock->cycle_last = clock->read(clock); | ||
| 21 | 68 | ||
| 69 | /* Do the ns -> cycle conversion first, using original mult */ | ||
| 70 | tmp = NTP_INTERVAL_LENGTH; | ||
| 71 | tmp <<= clock->shift; | ||
| 72 | tmp += clock->mult/2; | ||
| 73 | do_div(tmp, clock->mult); | ||
| 74 | if (tmp == 0) | ||
| 75 | tmp = 1; | ||
| 76 | |||
| 77 | interval = (cycle_t) tmp; | ||
| 78 | timekeeper.cycle_interval = interval; | ||
| 79 | |||
| 80 | /* Go back from cycles -> shifted ns */ | ||
| 81 | timekeeper.xtime_interval = (u64) interval * clock->mult; | ||
| 82 | timekeeper.raw_interval = | ||
| 83 | ((u64) interval * clock->mult) >> clock->shift; | ||
| 84 | |||
| 85 | timekeeper.xtime_nsec = 0; | ||
| 86 | timekeeper.shift = clock->shift; | ||
| 87 | |||
| 88 | timekeeper.ntp_error = 0; | ||
| 89 | timekeeper.ntp_error_shift = NTP_SCALE_SHIFT - clock->shift; | ||
| 90 | |||
| 91 | /* | ||
| 92 | * The timekeeper keeps its own mult values for the currently | ||
| 93 | * active clocksource. These value will be adjusted via NTP | ||
| 94 | * to counteract clock drifting. | ||
| 95 | */ | ||
| 96 | timekeeper.mult = clock->mult; | ||
| 97 | } | ||
| 98 | |||
| 99 | /* Timekeeper helper functions. */ | ||
| 100 | static inline s64 timekeeping_get_ns(void) | ||
| 101 | { | ||
| 102 | cycle_t cycle_now, cycle_delta; | ||
| 103 | struct clocksource *clock; | ||
| 104 | |||
| 105 | /* read clocksource: */ | ||
| 106 | clock = timekeeper.clock; | ||
| 107 | cycle_now = clock->read(clock); | ||
| 108 | |||
| 109 | /* calculate the delta since the last update_wall_time: */ | ||
| 110 | cycle_delta = (cycle_now - clock->cycle_last) & clock->mask; | ||
| 111 | |||
| 112 | /* return delta convert to nanoseconds using ntp adjusted mult. */ | ||
| 113 | return clocksource_cyc2ns(cycle_delta, timekeeper.mult, | ||
| 114 | timekeeper.shift); | ||
| 115 | } | ||
| 116 | |||
| 117 | static inline s64 timekeeping_get_ns_raw(void) | ||
| 118 | { | ||
| 119 | cycle_t cycle_now, cycle_delta; | ||
| 120 | struct clocksource *clock; | ||
| 121 | |||
| 122 | /* read clocksource: */ | ||
| 123 | clock = timekeeper.clock; | ||
| 124 | cycle_now = clock->read(clock); | ||
| 125 | |||
| 126 | /* calculate the delta since the last update_wall_time: */ | ||
| 127 | cycle_delta = (cycle_now - clock->cycle_last) & clock->mask; | ||
| 128 | |||
| 129 | /* return delta convert to nanoseconds using ntp adjusted mult. */ | ||
| 130 | return clocksource_cyc2ns(cycle_delta, clock->mult, clock->shift); | ||
| 131 | } | ||
| 22 | 132 | ||
| 23 | /* | 133 | /* |
| 24 | * This read-write spinlock protects us from races in SMP while | 134 | * This read-write spinlock protects us from races in SMP while |
| @@ -44,7 +154,12 @@ __cacheline_aligned_in_smp DEFINE_SEQLOCK(xtime_lock); | |||
| 44 | */ | 154 | */ |
| 45 | struct timespec xtime __attribute__ ((aligned (16))); | 155 | struct timespec xtime __attribute__ ((aligned (16))); |
| 46 | struct timespec wall_to_monotonic __attribute__ ((aligned (16))); | 156 | struct timespec wall_to_monotonic __attribute__ ((aligned (16))); |
| 47 | static unsigned long total_sleep_time; /* seconds */ | 157 | static struct timespec total_sleep_time; |
| 158 | |||
| 159 | /* | ||
| 160 | * The raw monotonic time for the CLOCK_MONOTONIC_RAW posix clock. | ||
| 161 | */ | ||
| 162 | struct timespec raw_time; | ||
| 48 | 163 | ||
| 49 | /* flag for if timekeeping is suspended */ | 164 | /* flag for if timekeeping is suspended */ |
| 50 | int __read_mostly timekeeping_suspended; | 165 | int __read_mostly timekeeping_suspended; |
| @@ -56,35 +171,44 @@ void update_xtime_cache(u64 nsec) | |||
| 56 | timespec_add_ns(&xtime_cache, nsec); | 171 | timespec_add_ns(&xtime_cache, nsec); |
| 57 | } | 172 | } |
| 58 | 173 | ||
| 59 | struct clocksource *clock; | 174 | /* must hold xtime_lock */ |
| 60 | 175 | void timekeeping_leap_insert(int leapsecond) | |
| 176 | { | ||
| 177 | xtime.tv_sec += leapsecond; | ||
| 178 | wall_to_monotonic.tv_sec -= leapsecond; | ||
| 179 | update_vsyscall(&xtime, timekeeper.clock); | ||
| 180 | } | ||
| 61 | 181 | ||
| 62 | #ifdef CONFIG_GENERIC_TIME | 182 | #ifdef CONFIG_GENERIC_TIME |
| 183 | |||
| 63 | /** | 184 | /** |
| 64 | * clocksource_forward_now - update clock to the current time | 185 | * timekeeping_forward_now - update clock to the current time |
| 65 | * | 186 | * |
| 66 | * Forward the current clock to update its state since the last call to | 187 | * Forward the current clock to update its state since the last call to |
| 67 | * update_wall_time(). This is useful before significant clock changes, | 188 | * update_wall_time(). This is useful before significant clock changes, |
| 68 | * as it avoids having to deal with this time offset explicitly. | 189 | * as it avoids having to deal with this time offset explicitly. |
| 69 | */ | 190 | */ |
| 70 | static void clocksource_forward_now(void) | 191 | static void timekeeping_forward_now(void) |
| 71 | { | 192 | { |
| 72 | cycle_t cycle_now, cycle_delta; | 193 | cycle_t cycle_now, cycle_delta; |
| 194 | struct clocksource *clock; | ||
| 73 | s64 nsec; | 195 | s64 nsec; |
| 74 | 196 | ||
| 75 | cycle_now = clocksource_read(clock); | 197 | clock = timekeeper.clock; |
| 198 | cycle_now = clock->read(clock); | ||
| 76 | cycle_delta = (cycle_now - clock->cycle_last) & clock->mask; | 199 | cycle_delta = (cycle_now - clock->cycle_last) & clock->mask; |
| 77 | clock->cycle_last = cycle_now; | 200 | clock->cycle_last = cycle_now; |
| 78 | 201 | ||
| 79 | nsec = cyc2ns(clock, cycle_delta); | 202 | nsec = clocksource_cyc2ns(cycle_delta, timekeeper.mult, |
| 203 | timekeeper.shift); | ||
| 80 | 204 | ||
| 81 | /* If arch requires, add in gettimeoffset() */ | 205 | /* If arch requires, add in gettimeoffset() */ |
| 82 | nsec += arch_gettimeoffset(); | 206 | nsec += arch_gettimeoffset(); |
| 83 | 207 | ||
| 84 | timespec_add_ns(&xtime, nsec); | 208 | timespec_add_ns(&xtime, nsec); |
| 85 | 209 | ||
| 86 | nsec = ((s64)cycle_delta * clock->mult_orig) >> clock->shift; | 210 | nsec = clocksource_cyc2ns(cycle_delta, clock->mult, clock->shift); |
| 87 | clock->raw_time.tv_nsec += nsec; | 211 | timespec_add_ns(&raw_time, nsec); |
| 88 | } | 212 | } |
| 89 | 213 | ||
| 90 | /** | 214 | /** |
| @@ -95,7 +219,6 @@ static void clocksource_forward_now(void) | |||
| 95 | */ | 219 | */ |
| 96 | void getnstimeofday(struct timespec *ts) | 220 | void getnstimeofday(struct timespec *ts) |
| 97 | { | 221 | { |
| 98 | cycle_t cycle_now, cycle_delta; | ||
| 99 | unsigned long seq; | 222 | unsigned long seq; |
| 100 | s64 nsecs; | 223 | s64 nsecs; |
| 101 | 224 | ||
| @@ -105,15 +228,7 @@ void getnstimeofday(struct timespec *ts) | |||
| 105 | seq = read_seqbegin(&xtime_lock); | 228 | seq = read_seqbegin(&xtime_lock); |
| 106 | 229 | ||
| 107 | *ts = xtime; | 230 | *ts = xtime; |
| 108 | 231 | nsecs = timekeeping_get_ns(); | |
| 109 | /* read clocksource: */ | ||
| 110 | cycle_now = clocksource_read(clock); | ||
| 111 | |||
| 112 | /* calculate the delta since the last update_wall_time: */ | ||
| 113 | cycle_delta = (cycle_now - clock->cycle_last) & clock->mask; | ||
| 114 | |||
| 115 | /* convert to nanoseconds: */ | ||
| 116 | nsecs = cyc2ns(clock, cycle_delta); | ||
| 117 | 232 | ||
| 118 | /* If arch requires, add in gettimeoffset() */ | 233 | /* If arch requires, add in gettimeoffset() */ |
| 119 | nsecs += arch_gettimeoffset(); | 234 | nsecs += arch_gettimeoffset(); |
| @@ -125,6 +240,57 @@ void getnstimeofday(struct timespec *ts) | |||
| 125 | 240 | ||
| 126 | EXPORT_SYMBOL(getnstimeofday); | 241 | EXPORT_SYMBOL(getnstimeofday); |
| 127 | 242 | ||
| 243 | ktime_t ktime_get(void) | ||
| 244 | { | ||
| 245 | unsigned int seq; | ||
| 246 | s64 secs, nsecs; | ||
| 247 | |||
| 248 | WARN_ON(timekeeping_suspended); | ||
| 249 | |||
| 250 | do { | ||
| 251 | seq = read_seqbegin(&xtime_lock); | ||
| 252 | secs = xtime.tv_sec + wall_to_monotonic.tv_sec; | ||
| 253 | nsecs = xtime.tv_nsec + wall_to_monotonic.tv_nsec; | ||
| 254 | nsecs += timekeeping_get_ns(); | ||
| 255 | |||
| 256 | } while (read_seqretry(&xtime_lock, seq)); | ||
| 257 | /* | ||
| 258 | * Use ktime_set/ktime_add_ns to create a proper ktime on | ||
| 259 | * 32-bit architectures without CONFIG_KTIME_SCALAR. | ||
| 260 | */ | ||
| 261 | return ktime_add_ns(ktime_set(secs, 0), nsecs); | ||
| 262 | } | ||
| 263 | EXPORT_SYMBOL_GPL(ktime_get); | ||
| 264 | |||
| 265 | /** | ||
| 266 | * ktime_get_ts - get the monotonic clock in timespec format | ||
| 267 | * @ts: pointer to timespec variable | ||
| 268 | * | ||
| 269 | * The function calculates the monotonic clock from the realtime | ||
| 270 | * clock and the wall_to_monotonic offset and stores the result | ||
| 271 | * in normalized timespec format in the variable pointed to by @ts. | ||
| 272 | */ | ||
| 273 | void ktime_get_ts(struct timespec *ts) | ||
| 274 | { | ||
| 275 | struct timespec tomono; | ||
| 276 | unsigned int seq; | ||
| 277 | s64 nsecs; | ||
| 278 | |||
| 279 | WARN_ON(timekeeping_suspended); | ||
| 280 | |||
| 281 | do { | ||
| 282 | seq = read_seqbegin(&xtime_lock); | ||
| 283 | *ts = xtime; | ||
| 284 | tomono = wall_to_monotonic; | ||
| 285 | nsecs = timekeeping_get_ns(); | ||
| 286 | |||
| 287 | } while (read_seqretry(&xtime_lock, seq)); | ||
| 288 | |||
| 289 | set_normalized_timespec(ts, ts->tv_sec + tomono.tv_sec, | ||
| 290 | ts->tv_nsec + tomono.tv_nsec + nsecs); | ||
| 291 | } | ||
| 292 | EXPORT_SYMBOL_GPL(ktime_get_ts); | ||
| 293 | |||
| 128 | /** | 294 | /** |
| 129 | * do_gettimeofday - Returns the time of day in a timeval | 295 | * do_gettimeofday - Returns the time of day in a timeval |
| 130 | * @tv: pointer to the timeval to be set | 296 | * @tv: pointer to the timeval to be set |
| @@ -157,7 +323,7 @@ int do_settimeofday(struct timespec *tv) | |||
| 157 | 323 | ||
| 158 | write_seqlock_irqsave(&xtime_lock, flags); | 324 | write_seqlock_irqsave(&xtime_lock, flags); |
| 159 | 325 | ||
| 160 | clocksource_forward_now(); | 326 | timekeeping_forward_now(); |
| 161 | 327 | ||
| 162 | ts_delta.tv_sec = tv->tv_sec - xtime.tv_sec; | 328 | ts_delta.tv_sec = tv->tv_sec - xtime.tv_sec; |
| 163 | ts_delta.tv_nsec = tv->tv_nsec - xtime.tv_nsec; | 329 | ts_delta.tv_nsec = tv->tv_nsec - xtime.tv_nsec; |
| @@ -167,10 +333,10 @@ int do_settimeofday(struct timespec *tv) | |||
| 167 | 333 | ||
| 168 | update_xtime_cache(0); | 334 | update_xtime_cache(0); |
| 169 | 335 | ||
| 170 | clock->error = 0; | 336 | timekeeper.ntp_error = 0; |
| 171 | ntp_clear(); | 337 | ntp_clear(); |
| 172 | 338 | ||
| 173 | update_vsyscall(&xtime, clock); | 339 | update_vsyscall(&xtime, timekeeper.clock); |
| 174 | 340 | ||
| 175 | write_sequnlock_irqrestore(&xtime_lock, flags); | 341 | write_sequnlock_irqrestore(&xtime_lock, flags); |
| 176 | 342 | ||
| @@ -187,44 +353,97 @@ EXPORT_SYMBOL(do_settimeofday); | |||
| 187 | * | 353 | * |
| 188 | * Accumulates current time interval and initializes new clocksource | 354 | * Accumulates current time interval and initializes new clocksource |
| 189 | */ | 355 | */ |
| 190 | static void change_clocksource(void) | 356 | static int change_clocksource(void *data) |
| 191 | { | 357 | { |
| 192 | struct clocksource *new, *old; | 358 | struct clocksource *new, *old; |
| 193 | 359 | ||
| 194 | new = clocksource_get_next(); | 360 | new = (struct clocksource *) data; |
| 361 | |||
| 362 | timekeeping_forward_now(); | ||
| 363 | if (!new->enable || new->enable(new) == 0) { | ||
| 364 | old = timekeeper.clock; | ||
| 365 | timekeeper_setup_internals(new); | ||
| 366 | if (old->disable) | ||
| 367 | old->disable(old); | ||
| 368 | } | ||
| 369 | return 0; | ||
| 370 | } | ||
| 195 | 371 | ||
| 196 | if (clock == new) | 372 | /** |
| 373 | * timekeeping_notify - Install a new clock source | ||
| 374 | * @clock: pointer to the clock source | ||
| 375 | * | ||
| 376 | * This function is called from clocksource.c after a new, better clock | ||
| 377 | * source has been registered. The caller holds the clocksource_mutex. | ||
| 378 | */ | ||
| 379 | void timekeeping_notify(struct clocksource *clock) | ||
| 380 | { | ||
| 381 | if (timekeeper.clock == clock) | ||
| 197 | return; | 382 | return; |
| 383 | stop_machine(change_clocksource, clock, NULL); | ||
| 384 | tick_clock_notify(); | ||
| 385 | } | ||
| 198 | 386 | ||
| 199 | clocksource_forward_now(); | 387 | #else /* GENERIC_TIME */ |
| 200 | 388 | ||
| 201 | if (clocksource_enable(new)) | 389 | static inline void timekeeping_forward_now(void) { } |
| 202 | return; | ||
| 203 | 390 | ||
| 204 | new->raw_time = clock->raw_time; | 391 | /** |
| 205 | old = clock; | 392 | * ktime_get - get the monotonic time in ktime_t format |
| 206 | clock = new; | 393 | * |
| 207 | clocksource_disable(old); | 394 | * returns the time in ktime_t format |
| 395 | */ | ||
| 396 | ktime_t ktime_get(void) | ||
| 397 | { | ||
| 398 | struct timespec now; | ||
| 208 | 399 | ||
| 209 | clock->cycle_last = 0; | 400 | ktime_get_ts(&now); |
| 210 | clock->cycle_last = clocksource_read(clock); | ||
| 211 | clock->error = 0; | ||
| 212 | clock->xtime_nsec = 0; | ||
| 213 | clocksource_calculate_interval(clock, NTP_INTERVAL_LENGTH); | ||
| 214 | 401 | ||
| 215 | tick_clock_notify(); | 402 | return timespec_to_ktime(now); |
| 403 | } | ||
| 404 | EXPORT_SYMBOL_GPL(ktime_get); | ||
| 216 | 405 | ||
| 217 | /* | 406 | /** |
| 218 | * We're holding xtime lock and waking up klogd would deadlock | 407 | * ktime_get_ts - get the monotonic clock in timespec format |
| 219 | * us on enqueue. So no printing! | 408 | * @ts: pointer to timespec variable |
| 220 | printk(KERN_INFO "Time: %s clocksource has been installed.\n", | 409 | * |
| 221 | clock->name); | 410 | * The function calculates the monotonic clock from the realtime |
| 222 | */ | 411 | * clock and the wall_to_monotonic offset and stores the result |
| 412 | * in normalized timespec format in the variable pointed to by @ts. | ||
| 413 | */ | ||
| 414 | void ktime_get_ts(struct timespec *ts) | ||
| 415 | { | ||
| 416 | struct timespec tomono; | ||
| 417 | unsigned long seq; | ||
| 418 | |||
| 419 | do { | ||
| 420 | seq = read_seqbegin(&xtime_lock); | ||
| 421 | getnstimeofday(ts); | ||
| 422 | tomono = wall_to_monotonic; | ||
| 423 | |||
| 424 | } while (read_seqretry(&xtime_lock, seq)); | ||
| 425 | |||
| 426 | set_normalized_timespec(ts, ts->tv_sec + tomono.tv_sec, | ||
| 427 | ts->tv_nsec + tomono.tv_nsec); | ||
| 223 | } | 428 | } |
| 224 | #else | 429 | EXPORT_SYMBOL_GPL(ktime_get_ts); |
| 225 | static inline void clocksource_forward_now(void) { } | 430 | |
| 226 | static inline void change_clocksource(void) { } | 431 | #endif /* !GENERIC_TIME */ |
| 227 | #endif | 432 | |
| 433 | /** | ||
| 434 | * ktime_get_real - get the real (wall-) time in ktime_t format | ||
| 435 | * | ||
| 436 | * returns the time in ktime_t format | ||
| 437 | */ | ||
| 438 | ktime_t ktime_get_real(void) | ||
| 439 | { | ||
| 440 | struct timespec now; | ||
| 441 | |||
| 442 | getnstimeofday(&now); | ||
| 443 | |||
| 444 | return timespec_to_ktime(now); | ||
| 445 | } | ||
| 446 | EXPORT_SYMBOL_GPL(ktime_get_real); | ||
| 228 | 447 | ||
| 229 | /** | 448 | /** |
| 230 | * getrawmonotonic - Returns the raw monotonic time in a timespec | 449 | * getrawmonotonic - Returns the raw monotonic time in a timespec |
| @@ -236,21 +455,11 @@ void getrawmonotonic(struct timespec *ts) | |||
| 236 | { | 455 | { |
| 237 | unsigned long seq; | 456 | unsigned long seq; |
| 238 | s64 nsecs; | 457 | s64 nsecs; |
| 239 | cycle_t cycle_now, cycle_delta; | ||
| 240 | 458 | ||
| 241 | do { | 459 | do { |
| 242 | seq = read_seqbegin(&xtime_lock); | 460 | seq = read_seqbegin(&xtime_lock); |
| 243 | 461 | nsecs = timekeeping_get_ns_raw(); | |
| 244 | /* read clocksource: */ | 462 | *ts = raw_time; |
| 245 | cycle_now = clocksource_read(clock); | ||
| 246 | |||
| 247 | /* calculate the delta since the last update_wall_time: */ | ||
| 248 | cycle_delta = (cycle_now - clock->cycle_last) & clock->mask; | ||
| 249 | |||
| 250 | /* convert to nanoseconds: */ | ||
| 251 | nsecs = ((s64)cycle_delta * clock->mult_orig) >> clock->shift; | ||
| 252 | |||
| 253 | *ts = clock->raw_time; | ||
| 254 | 463 | ||
| 255 | } while (read_seqretry(&xtime_lock, seq)); | 464 | } while (read_seqretry(&xtime_lock, seq)); |
| 256 | 465 | ||
| @@ -270,7 +479,7 @@ int timekeeping_valid_for_hres(void) | |||
| 270 | do { | 479 | do { |
| 271 | seq = read_seqbegin(&xtime_lock); | 480 | seq = read_seqbegin(&xtime_lock); |
| 272 | 481 | ||
| 273 | ret = clock->flags & CLOCK_SOURCE_VALID_FOR_HRES; | 482 | ret = timekeeper.clock->flags & CLOCK_SOURCE_VALID_FOR_HRES; |
| 274 | 483 | ||
| 275 | } while (read_seqretry(&xtime_lock, seq)); | 484 | } while (read_seqretry(&xtime_lock, seq)); |
| 276 | 485 | ||
| @@ -278,17 +487,33 @@ int timekeeping_valid_for_hres(void) | |||
| 278 | } | 487 | } |
| 279 | 488 | ||
| 280 | /** | 489 | /** |
| 281 | * read_persistent_clock - Return time in seconds from the persistent clock. | 490 | * read_persistent_clock - Return time from the persistent clock. |
| 282 | * | 491 | * |
| 283 | * Weak dummy function for arches that do not yet support it. | 492 | * Weak dummy function for arches that do not yet support it. |
| 284 | * Returns seconds from epoch using the battery backed persistent clock. | 493 | * Reads the time from the battery backed persistent clock. |
| 285 | * Returns zero if unsupported. | 494 | * Returns a timespec with tv_sec=0 and tv_nsec=0 if unsupported. |
| 286 | * | 495 | * |
| 287 | * XXX - Do be sure to remove it once all arches implement it. | 496 | * XXX - Do be sure to remove it once all arches implement it. |
| 288 | */ | 497 | */ |
| 289 | unsigned long __attribute__((weak)) read_persistent_clock(void) | 498 | void __attribute__((weak)) read_persistent_clock(struct timespec *ts) |
| 290 | { | 499 | { |
| 291 | return 0; | 500 | ts->tv_sec = 0; |
| 501 | ts->tv_nsec = 0; | ||
| 502 | } | ||
| 503 | |||
| 504 | /** | ||
| 505 | * read_boot_clock - Return time of the system start. | ||
| 506 | * | ||
| 507 | * Weak dummy function for arches that do not yet support it. | ||
| 508 | * Function to read the exact time the system has been started. | ||
| 509 | * Returns a timespec with tv_sec=0 and tv_nsec=0 if unsupported. | ||
| 510 | * | ||
| 511 | * XXX - Do be sure to remove it once all arches implement it. | ||
| 512 | */ | ||
| 513 | void __attribute__((weak)) read_boot_clock(struct timespec *ts) | ||
| 514 | { | ||
| 515 | ts->tv_sec = 0; | ||
| 516 | ts->tv_nsec = 0; | ||
| 292 | } | 517 | } |
| 293 | 518 | ||
| 294 | /* | 519 | /* |
| @@ -296,29 +521,40 @@ unsigned long __attribute__((weak)) read_persistent_clock(void) | |||
| 296 | */ | 521 | */ |
| 297 | void __init timekeeping_init(void) | 522 | void __init timekeeping_init(void) |
| 298 | { | 523 | { |
| 524 | struct clocksource *clock; | ||
| 299 | unsigned long flags; | 525 | unsigned long flags; |
| 300 | unsigned long sec = read_persistent_clock(); | 526 | struct timespec now, boot; |
| 527 | |||
| 528 | read_persistent_clock(&now); | ||
| 529 | read_boot_clock(&boot); | ||
| 301 | 530 | ||
| 302 | write_seqlock_irqsave(&xtime_lock, flags); | 531 | write_seqlock_irqsave(&xtime_lock, flags); |
| 303 | 532 | ||
| 304 | ntp_init(); | 533 | ntp_init(); |
| 305 | 534 | ||
| 306 | clock = clocksource_get_next(); | 535 | clock = clocksource_default_clock(); |
| 307 | clocksource_enable(clock); | 536 | if (clock->enable) |
| 308 | clocksource_calculate_interval(clock, NTP_INTERVAL_LENGTH); | 537 | clock->enable(clock); |
| 309 | clock->cycle_last = clocksource_read(clock); | 538 | timekeeper_setup_internals(clock); |
| 310 | 539 | ||
| 311 | xtime.tv_sec = sec; | 540 | xtime.tv_sec = now.tv_sec; |
| 312 | xtime.tv_nsec = 0; | 541 | xtime.tv_nsec = now.tv_nsec; |
| 542 | raw_time.tv_sec = 0; | ||
| 543 | raw_time.tv_nsec = 0; | ||
| 544 | if (boot.tv_sec == 0 && boot.tv_nsec == 0) { | ||
| 545 | boot.tv_sec = xtime.tv_sec; | ||
| 546 | boot.tv_nsec = xtime.tv_nsec; | ||
| 547 | } | ||
| 313 | set_normalized_timespec(&wall_to_monotonic, | 548 | set_normalized_timespec(&wall_to_monotonic, |
| 314 | -xtime.tv_sec, -xtime.tv_nsec); | 549 | -boot.tv_sec, -boot.tv_nsec); |
| 315 | update_xtime_cache(0); | 550 | update_xtime_cache(0); |
| 316 | total_sleep_time = 0; | 551 | total_sleep_time.tv_sec = 0; |
| 552 | total_sleep_time.tv_nsec = 0; | ||
| 317 | write_sequnlock_irqrestore(&xtime_lock, flags); | 553 | write_sequnlock_irqrestore(&xtime_lock, flags); |
| 318 | } | 554 | } |
| 319 | 555 | ||
| 320 | /* time in seconds when suspend began */ | 556 | /* time in seconds when suspend began */ |
| 321 | static unsigned long timekeeping_suspend_time; | 557 | static struct timespec timekeeping_suspend_time; |
| 322 | 558 | ||
| 323 | /** | 559 | /** |
| 324 | * timekeeping_resume - Resumes the generic timekeeping subsystem. | 560 | * timekeeping_resume - Resumes the generic timekeeping subsystem. |
| @@ -331,24 +567,24 @@ static unsigned long timekeeping_suspend_time; | |||
| 331 | static int timekeeping_resume(struct sys_device *dev) | 567 | static int timekeeping_resume(struct sys_device *dev) |
| 332 | { | 568 | { |
| 333 | unsigned long flags; | 569 | unsigned long flags; |
| 334 | unsigned long now = read_persistent_clock(); | 570 | struct timespec ts; |
| 571 | |||
| 572 | read_persistent_clock(&ts); | ||
| 335 | 573 | ||
| 336 | clocksource_resume(); | 574 | clocksource_resume(); |
| 337 | 575 | ||
| 338 | write_seqlock_irqsave(&xtime_lock, flags); | 576 | write_seqlock_irqsave(&xtime_lock, flags); |
| 339 | 577 | ||
| 340 | if (now && (now > timekeeping_suspend_time)) { | 578 | if (timespec_compare(&ts, &timekeeping_suspend_time) > 0) { |
| 341 | unsigned long sleep_length = now - timekeeping_suspend_time; | 579 | ts = timespec_sub(ts, timekeeping_suspend_time); |
| 342 | 580 | xtime = timespec_add_safe(xtime, ts); | |
| 343 | xtime.tv_sec += sleep_length; | 581 | wall_to_monotonic = timespec_sub(wall_to_monotonic, ts); |
| 344 | wall_to_monotonic.tv_sec -= sleep_length; | 582 | total_sleep_time = timespec_add_safe(total_sleep_time, ts); |
| 345 | total_sleep_time += sleep_length; | ||
| 346 | } | 583 | } |
| 347 | update_xtime_cache(0); | 584 | update_xtime_cache(0); |
| 348 | /* re-base the last cycle value */ | 585 | /* re-base the last cycle value */ |
| 349 | clock->cycle_last = 0; | 586 | timekeeper.clock->cycle_last = timekeeper.clock->read(timekeeper.clock); |
| 350 | clock->cycle_last = clocksource_read(clock); | 587 | timekeeper.ntp_error = 0; |
| 351 | clock->error = 0; | ||
| 352 | timekeeping_suspended = 0; | 588 | timekeeping_suspended = 0; |
| 353 | write_sequnlock_irqrestore(&xtime_lock, flags); | 589 | write_sequnlock_irqrestore(&xtime_lock, flags); |
| 354 | 590 | ||
| @@ -366,10 +602,10 @@ static int timekeeping_suspend(struct sys_device *dev, pm_message_t state) | |||
| 366 | { | 602 | { |
| 367 | unsigned long flags; | 603 | unsigned long flags; |
| 368 | 604 | ||
| 369 | timekeeping_suspend_time = read_persistent_clock(); | 605 | read_persistent_clock(&timekeeping_suspend_time); |
| 370 | 606 | ||
| 371 | write_seqlock_irqsave(&xtime_lock, flags); | 607 | write_seqlock_irqsave(&xtime_lock, flags); |
| 372 | clocksource_forward_now(); | 608 | timekeeping_forward_now(); |
| 373 | timekeeping_suspended = 1; | 609 | timekeeping_suspended = 1; |
| 374 | write_sequnlock_irqrestore(&xtime_lock, flags); | 610 | write_sequnlock_irqrestore(&xtime_lock, flags); |
| 375 | 611 | ||
| @@ -404,7 +640,7 @@ device_initcall(timekeeping_init_device); | |||
| 404 | * If the error is already larger, we look ahead even further | 640 | * If the error is already larger, we look ahead even further |
| 405 | * to compensate for late or lost adjustments. | 641 | * to compensate for late or lost adjustments. |
| 406 | */ | 642 | */ |
| 407 | static __always_inline int clocksource_bigadjust(s64 error, s64 *interval, | 643 | static __always_inline int timekeeping_bigadjust(s64 error, s64 *interval, |
| 408 | s64 *offset) | 644 | s64 *offset) |
| 409 | { | 645 | { |
| 410 | s64 tick_error, i; | 646 | s64 tick_error, i; |
| @@ -420,7 +656,7 @@ static __always_inline int clocksource_bigadjust(s64 error, s64 *interval, | |||
| 420 | * here. This is tuned so that an error of about 1 msec is adjusted | 656 | * here. This is tuned so that an error of about 1 msec is adjusted |
| 421 | * within about 1 sec (or 2^20 nsec in 2^SHIFT_HZ ticks). | 657 | * within about 1 sec (or 2^20 nsec in 2^SHIFT_HZ ticks). |
| 422 | */ | 658 | */ |
| 423 | error2 = clock->error >> (NTP_SCALE_SHIFT + 22 - 2 * SHIFT_HZ); | 659 | error2 = timekeeper.ntp_error >> (NTP_SCALE_SHIFT + 22 - 2 * SHIFT_HZ); |
| 424 | error2 = abs(error2); | 660 | error2 = abs(error2); |
| 425 | for (look_ahead = 0; error2 > 0; look_ahead++) | 661 | for (look_ahead = 0; error2 > 0; look_ahead++) |
| 426 | error2 >>= 2; | 662 | error2 >>= 2; |
| @@ -429,8 +665,8 @@ static __always_inline int clocksource_bigadjust(s64 error, s64 *interval, | |||
| 429 | * Now calculate the error in (1 << look_ahead) ticks, but first | 665 | * Now calculate the error in (1 << look_ahead) ticks, but first |
| 430 | * remove the single look ahead already included in the error. | 666 | * remove the single look ahead already included in the error. |
| 431 | */ | 667 | */ |
| 432 | tick_error = tick_length >> (NTP_SCALE_SHIFT - clock->shift + 1); | 668 | tick_error = tick_length >> (timekeeper.ntp_error_shift + 1); |
| 433 | tick_error -= clock->xtime_interval >> 1; | 669 | tick_error -= timekeeper.xtime_interval >> 1; |
| 434 | error = ((error - tick_error) >> look_ahead) + tick_error; | 670 | error = ((error - tick_error) >> look_ahead) + tick_error; |
| 435 | 671 | ||
| 436 | /* Finally calculate the adjustment shift value. */ | 672 | /* Finally calculate the adjustment shift value. */ |
| @@ -455,18 +691,18 @@ static __always_inline int clocksource_bigadjust(s64 error, s64 *interval, | |||
| 455 | * this is optimized for the most common adjustments of -1,0,1, | 691 | * this is optimized for the most common adjustments of -1,0,1, |
| 456 | * for other values we can do a bit more work. | 692 | * for other values we can do a bit more work. |
| 457 | */ | 693 | */ |
| 458 | static void clocksource_adjust(s64 offset) | 694 | static void timekeeping_adjust(s64 offset) |
| 459 | { | 695 | { |
| 460 | s64 error, interval = clock->cycle_interval; | 696 | s64 error, interval = timekeeper.cycle_interval; |
| 461 | int adj; | 697 | int adj; |
| 462 | 698 | ||
| 463 | error = clock->error >> (NTP_SCALE_SHIFT - clock->shift - 1); | 699 | error = timekeeper.ntp_error >> (timekeeper.ntp_error_shift - 1); |
| 464 | if (error > interval) { | 700 | if (error > interval) { |
| 465 | error >>= 2; | 701 | error >>= 2; |
| 466 | if (likely(error <= interval)) | 702 | if (likely(error <= interval)) |
| 467 | adj = 1; | 703 | adj = 1; |
| 468 | else | 704 | else |
| 469 | adj = clocksource_bigadjust(error, &interval, &offset); | 705 | adj = timekeeping_bigadjust(error, &interval, &offset); |
| 470 | } else if (error < -interval) { | 706 | } else if (error < -interval) { |
| 471 | error >>= 2; | 707 | error >>= 2; |
| 472 | if (likely(error >= -interval)) { | 708 | if (likely(error >= -interval)) { |
| @@ -474,15 +710,15 @@ static void clocksource_adjust(s64 offset) | |||
| 474 | interval = -interval; | 710 | interval = -interval; |
| 475 | offset = -offset; | 711 | offset = -offset; |
| 476 | } else | 712 | } else |
| 477 | adj = clocksource_bigadjust(error, &interval, &offset); | 713 | adj = timekeeping_bigadjust(error, &interval, &offset); |
| 478 | } else | 714 | } else |
| 479 | return; | 715 | return; |
| 480 | 716 | ||
| 481 | clock->mult += adj; | 717 | timekeeper.mult += adj; |
| 482 | clock->xtime_interval += interval; | 718 | timekeeper.xtime_interval += interval; |
| 483 | clock->xtime_nsec -= offset; | 719 | timekeeper.xtime_nsec -= offset; |
| 484 | clock->error -= (interval - offset) << | 720 | timekeeper.ntp_error -= (interval - offset) << |
| 485 | (NTP_SCALE_SHIFT - clock->shift); | 721 | timekeeper.ntp_error_shift; |
| 486 | } | 722 | } |
| 487 | 723 | ||
| 488 | /** | 724 | /** |
| @@ -492,53 +728,59 @@ static void clocksource_adjust(s64 offset) | |||
| 492 | */ | 728 | */ |
| 493 | void update_wall_time(void) | 729 | void update_wall_time(void) |
| 494 | { | 730 | { |
| 731 | struct clocksource *clock; | ||
| 495 | cycle_t offset; | 732 | cycle_t offset; |
| 733 | u64 nsecs; | ||
| 496 | 734 | ||
| 497 | /* Make sure we're fully resumed: */ | 735 | /* Make sure we're fully resumed: */ |
| 498 | if (unlikely(timekeeping_suspended)) | 736 | if (unlikely(timekeeping_suspended)) |
| 499 | return; | 737 | return; |
| 500 | 738 | ||
| 739 | clock = timekeeper.clock; | ||
| 501 | #ifdef CONFIG_GENERIC_TIME | 740 | #ifdef CONFIG_GENERIC_TIME |
| 502 | offset = (clocksource_read(clock) - clock->cycle_last) & clock->mask; | 741 | offset = (clock->read(clock) - clock->cycle_last) & clock->mask; |
| 503 | #else | 742 | #else |
| 504 | offset = clock->cycle_interval; | 743 | offset = timekeeper.cycle_interval; |
| 505 | #endif | 744 | #endif |
| 506 | clock->xtime_nsec = (s64)xtime.tv_nsec << clock->shift; | 745 | timekeeper.xtime_nsec = (s64)xtime.tv_nsec << timekeeper.shift; |
| 507 | 746 | ||
| 508 | /* normally this loop will run just once, however in the | 747 | /* normally this loop will run just once, however in the |
| 509 | * case of lost or late ticks, it will accumulate correctly. | 748 | * case of lost or late ticks, it will accumulate correctly. |
| 510 | */ | 749 | */ |
| 511 | while (offset >= clock->cycle_interval) { | 750 | while (offset >= timekeeper.cycle_interval) { |
| 751 | u64 nsecps = (u64)NSEC_PER_SEC << timekeeper.shift; | ||
| 752 | |||
| 512 | /* accumulate one interval */ | 753 | /* accumulate one interval */ |
| 513 | offset -= clock->cycle_interval; | 754 | offset -= timekeeper.cycle_interval; |
| 514 | clock->cycle_last += clock->cycle_interval; | 755 | clock->cycle_last += timekeeper.cycle_interval; |
| 515 | 756 | ||
| 516 | clock->xtime_nsec += clock->xtime_interval; | 757 | timekeeper.xtime_nsec += timekeeper.xtime_interval; |
| 517 | if (clock->xtime_nsec >= (u64)NSEC_PER_SEC << clock->shift) { | 758 | if (timekeeper.xtime_nsec >= nsecps) { |
| 518 | clock->xtime_nsec -= (u64)NSEC_PER_SEC << clock->shift; | 759 | timekeeper.xtime_nsec -= nsecps; |
| 519 | xtime.tv_sec++; | 760 | xtime.tv_sec++; |
| 520 | second_overflow(); | 761 | second_overflow(); |
| 521 | } | 762 | } |
| 522 | 763 | ||
| 523 | clock->raw_time.tv_nsec += clock->raw_interval; | 764 | raw_time.tv_nsec += timekeeper.raw_interval; |
| 524 | if (clock->raw_time.tv_nsec >= NSEC_PER_SEC) { | 765 | if (raw_time.tv_nsec >= NSEC_PER_SEC) { |
| 525 | clock->raw_time.tv_nsec -= NSEC_PER_SEC; | 766 | raw_time.tv_nsec -= NSEC_PER_SEC; |
| 526 | clock->raw_time.tv_sec++; | 767 | raw_time.tv_sec++; |
| 527 | } | 768 | } |
| 528 | 769 | ||
| 529 | /* accumulate error between NTP and clock interval */ | 770 | /* accumulate error between NTP and clock interval */ |
| 530 | clock->error += tick_length; | 771 | timekeeper.ntp_error += tick_length; |
| 531 | clock->error -= clock->xtime_interval << (NTP_SCALE_SHIFT - clock->shift); | 772 | timekeeper.ntp_error -= timekeeper.xtime_interval << |
| 773 | timekeeper.ntp_error_shift; | ||
| 532 | } | 774 | } |
| 533 | 775 | ||
| 534 | /* correct the clock when NTP error is too big */ | 776 | /* correct the clock when NTP error is too big */ |
| 535 | clocksource_adjust(offset); | 777 | timekeeping_adjust(offset); |
| 536 | 778 | ||
| 537 | /* | 779 | /* |
| 538 | * Since in the loop above, we accumulate any amount of time | 780 | * Since in the loop above, we accumulate any amount of time |
| 539 | * in xtime_nsec over a second into xtime.tv_sec, its possible for | 781 | * in xtime_nsec over a second into xtime.tv_sec, its possible for |
| 540 | * xtime_nsec to be fairly small after the loop. Further, if we're | 782 | * xtime_nsec to be fairly small after the loop. Further, if we're |
| 541 | * slightly speeding the clocksource up in clocksource_adjust(), | 783 | * slightly speeding the clocksource up in timekeeping_adjust(), |
| 542 | * its possible the required corrective factor to xtime_nsec could | 784 | * its possible the required corrective factor to xtime_nsec could |
| 543 | * cause it to underflow. | 785 | * cause it to underflow. |
| 544 | * | 786 | * |
| @@ -550,24 +792,25 @@ void update_wall_time(void) | |||
| 550 | * We'll correct this error next time through this function, when | 792 | * We'll correct this error next time through this function, when |
| 551 | * xtime_nsec is not as small. | 793 | * xtime_nsec is not as small. |
| 552 | */ | 794 | */ |
| 553 | if (unlikely((s64)clock->xtime_nsec < 0)) { | 795 | if (unlikely((s64)timekeeper.xtime_nsec < 0)) { |
| 554 | s64 neg = -(s64)clock->xtime_nsec; | 796 | s64 neg = -(s64)timekeeper.xtime_nsec; |
| 555 | clock->xtime_nsec = 0; | 797 | timekeeper.xtime_nsec = 0; |
| 556 | clock->error += neg << (NTP_SCALE_SHIFT - clock->shift); | 798 | timekeeper.ntp_error += neg << timekeeper.ntp_error_shift; |
| 557 | } | 799 | } |
| 558 | 800 | ||
| 559 | /* store full nanoseconds into xtime after rounding it up and | 801 | /* store full nanoseconds into xtime after rounding it up and |
| 560 | * add the remainder to the error difference. | 802 | * add the remainder to the error difference. |
| 561 | */ | 803 | */ |
| 562 | xtime.tv_nsec = ((s64)clock->xtime_nsec >> clock->shift) + 1; | 804 | xtime.tv_nsec = ((s64) timekeeper.xtime_nsec >> timekeeper.shift) + 1; |
| 563 | clock->xtime_nsec -= (s64)xtime.tv_nsec << clock->shift; | 805 | timekeeper.xtime_nsec -= (s64) xtime.tv_nsec << timekeeper.shift; |
| 564 | clock->error += clock->xtime_nsec << (NTP_SCALE_SHIFT - clock->shift); | 806 | timekeeper.ntp_error += timekeeper.xtime_nsec << |
| 807 | timekeeper.ntp_error_shift; | ||
| 565 | 808 | ||
| 566 | update_xtime_cache(cyc2ns(clock, offset)); | 809 | nsecs = clocksource_cyc2ns(offset, timekeeper.mult, timekeeper.shift); |
| 810 | update_xtime_cache(nsecs); | ||
| 567 | 811 | ||
| 568 | /* check to see if there is a new clocksource to use */ | 812 | /* check to see if there is a new clocksource to use */ |
| 569 | change_clocksource(); | 813 | update_vsyscall(&xtime, timekeeper.clock); |
| 570 | update_vsyscall(&xtime, clock); | ||
| 571 | } | 814 | } |
| 572 | 815 | ||
| 573 | /** | 816 | /** |
| @@ -583,9 +826,12 @@ void update_wall_time(void) | |||
| 583 | */ | 826 | */ |
| 584 | void getboottime(struct timespec *ts) | 827 | void getboottime(struct timespec *ts) |
| 585 | { | 828 | { |
| 586 | set_normalized_timespec(ts, | 829 | struct timespec boottime = { |
| 587 | - (wall_to_monotonic.tv_sec + total_sleep_time), | 830 | .tv_sec = wall_to_monotonic.tv_sec + total_sleep_time.tv_sec, |
| 588 | - wall_to_monotonic.tv_nsec); | 831 | .tv_nsec = wall_to_monotonic.tv_nsec + total_sleep_time.tv_nsec |
| 832 | }; | ||
| 833 | |||
| 834 | set_normalized_timespec(ts, -boottime.tv_sec, -boottime.tv_nsec); | ||
| 589 | } | 835 | } |
| 590 | 836 | ||
| 591 | /** | 837 | /** |
| @@ -594,7 +840,7 @@ void getboottime(struct timespec *ts) | |||
| 594 | */ | 840 | */ |
| 595 | void monotonic_to_bootbased(struct timespec *ts) | 841 | void monotonic_to_bootbased(struct timespec *ts) |
| 596 | { | 842 | { |
| 597 | ts->tv_sec += total_sleep_time; | 843 | *ts = timespec_add_safe(*ts, total_sleep_time); |
| 598 | } | 844 | } |
| 599 | 845 | ||
| 600 | unsigned long get_seconds(void) | 846 | unsigned long get_seconds(void) |
| @@ -603,6 +849,10 @@ unsigned long get_seconds(void) | |||
| 603 | } | 849 | } |
| 604 | EXPORT_SYMBOL(get_seconds); | 850 | EXPORT_SYMBOL(get_seconds); |
| 605 | 851 | ||
| 852 | struct timespec __current_kernel_time(void) | ||
| 853 | { | ||
| 854 | return xtime_cache; | ||
| 855 | } | ||
| 606 | 856 | ||
| 607 | struct timespec current_kernel_time(void) | 857 | struct timespec current_kernel_time(void) |
| 608 | { | 858 | { |
| @@ -618,3 +868,20 @@ struct timespec current_kernel_time(void) | |||
| 618 | return now; | 868 | return now; |
| 619 | } | 869 | } |
| 620 | EXPORT_SYMBOL(current_kernel_time); | 870 | EXPORT_SYMBOL(current_kernel_time); |
| 871 | |||
| 872 | struct timespec get_monotonic_coarse(void) | ||
| 873 | { | ||
| 874 | struct timespec now, mono; | ||
| 875 | unsigned long seq; | ||
| 876 | |||
| 877 | do { | ||
| 878 | seq = read_seqbegin(&xtime_lock); | ||
| 879 | |||
| 880 | now = xtime_cache; | ||
| 881 | mono = wall_to_monotonic; | ||
| 882 | } while (read_seqretry(&xtime_lock, seq)); | ||
| 883 | |||
| 884 | set_normalized_timespec(&now, now.tv_sec + mono.tv_sec, | ||
| 885 | now.tv_nsec + mono.tv_nsec); | ||
| 886 | return now; | ||
| 887 | } | ||
diff --git a/kernel/timer.c b/kernel/timer.c index a3d25f415019..bbb51074680e 100644 --- a/kernel/timer.c +++ b/kernel/timer.c | |||
| @@ -72,6 +72,7 @@ struct tvec_base { | |||
| 72 | spinlock_t lock; | 72 | spinlock_t lock; |
| 73 | struct timer_list *running_timer; | 73 | struct timer_list *running_timer; |
| 74 | unsigned long timer_jiffies; | 74 | unsigned long timer_jiffies; |
| 75 | unsigned long next_timer; | ||
| 75 | struct tvec_root tv1; | 76 | struct tvec_root tv1; |
| 76 | struct tvec tv2; | 77 | struct tvec tv2; |
| 77 | struct tvec tv3; | 78 | struct tvec tv3; |
| @@ -622,6 +623,9 @@ __mod_timer(struct timer_list *timer, unsigned long expires, | |||
| 622 | 623 | ||
| 623 | if (timer_pending(timer)) { | 624 | if (timer_pending(timer)) { |
| 624 | detach_timer(timer, 0); | 625 | detach_timer(timer, 0); |
| 626 | if (timer->expires == base->next_timer && | ||
| 627 | !tbase_get_deferrable(timer->base)) | ||
| 628 | base->next_timer = base->timer_jiffies; | ||
| 625 | ret = 1; | 629 | ret = 1; |
| 626 | } else { | 630 | } else { |
| 627 | if (pending_only) | 631 | if (pending_only) |
| @@ -663,6 +667,9 @@ __mod_timer(struct timer_list *timer, unsigned long expires, | |||
| 663 | } | 667 | } |
| 664 | 668 | ||
| 665 | timer->expires = expires; | 669 | timer->expires = expires; |
| 670 | if (time_before(timer->expires, base->next_timer) && | ||
| 671 | !tbase_get_deferrable(timer->base)) | ||
| 672 | base->next_timer = timer->expires; | ||
| 666 | internal_add_timer(base, timer); | 673 | internal_add_timer(base, timer); |
| 667 | 674 | ||
| 668 | out_unlock: | 675 | out_unlock: |
| @@ -781,6 +788,9 @@ void add_timer_on(struct timer_list *timer, int cpu) | |||
| 781 | spin_lock_irqsave(&base->lock, flags); | 788 | spin_lock_irqsave(&base->lock, flags); |
| 782 | timer_set_base(timer, base); | 789 | timer_set_base(timer, base); |
| 783 | debug_timer_activate(timer); | 790 | debug_timer_activate(timer); |
| 791 | if (time_before(timer->expires, base->next_timer) && | ||
| 792 | !tbase_get_deferrable(timer->base)) | ||
| 793 | base->next_timer = timer->expires; | ||
| 784 | internal_add_timer(base, timer); | 794 | internal_add_timer(base, timer); |
| 785 | /* | 795 | /* |
| 786 | * Check whether the other CPU is idle and needs to be | 796 | * Check whether the other CPU is idle and needs to be |
| @@ -817,6 +827,9 @@ int del_timer(struct timer_list *timer) | |||
| 817 | base = lock_timer_base(timer, &flags); | 827 | base = lock_timer_base(timer, &flags); |
| 818 | if (timer_pending(timer)) { | 828 | if (timer_pending(timer)) { |
| 819 | detach_timer(timer, 1); | 829 | detach_timer(timer, 1); |
| 830 | if (timer->expires == base->next_timer && | ||
| 831 | !tbase_get_deferrable(timer->base)) | ||
| 832 | base->next_timer = base->timer_jiffies; | ||
| 820 | ret = 1; | 833 | ret = 1; |
| 821 | } | 834 | } |
| 822 | spin_unlock_irqrestore(&base->lock, flags); | 835 | spin_unlock_irqrestore(&base->lock, flags); |
| @@ -850,6 +863,9 @@ int try_to_del_timer_sync(struct timer_list *timer) | |||
| 850 | ret = 0; | 863 | ret = 0; |
| 851 | if (timer_pending(timer)) { | 864 | if (timer_pending(timer)) { |
| 852 | detach_timer(timer, 1); | 865 | detach_timer(timer, 1); |
| 866 | if (timer->expires == base->next_timer && | ||
| 867 | !tbase_get_deferrable(timer->base)) | ||
| 868 | base->next_timer = base->timer_jiffies; | ||
| 853 | ret = 1; | 869 | ret = 1; |
| 854 | } | 870 | } |
| 855 | out: | 871 | out: |
| @@ -1007,8 +1023,8 @@ static inline void __run_timers(struct tvec_base *base) | |||
| 1007 | #ifdef CONFIG_NO_HZ | 1023 | #ifdef CONFIG_NO_HZ |
| 1008 | /* | 1024 | /* |
| 1009 | * Find out when the next timer event is due to happen. This | 1025 | * Find out when the next timer event is due to happen. This |
| 1010 | * is used on S/390 to stop all activity when a cpus is idle. | 1026 | * is used on S/390 to stop all activity when a CPU is idle. |
| 1011 | * This functions needs to be called disabled. | 1027 | * This function needs to be called with interrupts disabled. |
| 1012 | */ | 1028 | */ |
| 1013 | static unsigned long __next_timer_interrupt(struct tvec_base *base) | 1029 | static unsigned long __next_timer_interrupt(struct tvec_base *base) |
| 1014 | { | 1030 | { |
| @@ -1134,7 +1150,9 @@ unsigned long get_next_timer_interrupt(unsigned long now) | |||
| 1134 | unsigned long expires; | 1150 | unsigned long expires; |
| 1135 | 1151 | ||
| 1136 | spin_lock(&base->lock); | 1152 | spin_lock(&base->lock); |
| 1137 | expires = __next_timer_interrupt(base); | 1153 | if (time_before_eq(base->next_timer, base->timer_jiffies)) |
| 1154 | base->next_timer = __next_timer_interrupt(base); | ||
| 1155 | expires = base->next_timer; | ||
| 1138 | spin_unlock(&base->lock); | 1156 | spin_unlock(&base->lock); |
| 1139 | 1157 | ||
| 1140 | if (time_before_eq(expires, now)) | 1158 | if (time_before_eq(expires, now)) |
| @@ -1522,6 +1540,7 @@ static int __cpuinit init_timers_cpu(int cpu) | |||
| 1522 | INIT_LIST_HEAD(base->tv1.vec + j); | 1540 | INIT_LIST_HEAD(base->tv1.vec + j); |
| 1523 | 1541 | ||
| 1524 | base->timer_jiffies = jiffies; | 1542 | base->timer_jiffies = jiffies; |
| 1543 | base->next_timer = base->timer_jiffies; | ||
| 1525 | return 0; | 1544 | return 0; |
| 1526 | } | 1545 | } |
| 1527 | 1546 | ||
| @@ -1534,6 +1553,9 @@ static void migrate_timer_list(struct tvec_base *new_base, struct list_head *hea | |||
| 1534 | timer = list_first_entry(head, struct timer_list, entry); | 1553 | timer = list_first_entry(head, struct timer_list, entry); |
| 1535 | detach_timer(timer, 0); | 1554 | detach_timer(timer, 0); |
| 1536 | timer_set_base(timer, new_base); | 1555 | timer_set_base(timer, new_base); |
| 1556 | if (time_before(timer->expires, new_base->next_timer) && | ||
| 1557 | !tbase_get_deferrable(timer->base)) | ||
| 1558 | new_base->next_timer = timer->expires; | ||
| 1537 | internal_add_timer(new_base, timer); | 1559 | internal_add_timer(new_base, timer); |
| 1538 | } | 1560 | } |
| 1539 | } | 1561 | } |
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c index 6eef38923b07..d4ff01970547 100644 --- a/kernel/trace/ring_buffer.c +++ b/kernel/trace/ring_buffer.c | |||
| @@ -201,8 +201,6 @@ int tracing_is_on(void) | |||
| 201 | } | 201 | } |
| 202 | EXPORT_SYMBOL_GPL(tracing_is_on); | 202 | EXPORT_SYMBOL_GPL(tracing_is_on); |
| 203 | 203 | ||
| 204 | #include "trace.h" | ||
| 205 | |||
| 206 | #define RB_EVNT_HDR_SIZE (offsetof(struct ring_buffer_event, array)) | 204 | #define RB_EVNT_HDR_SIZE (offsetof(struct ring_buffer_event, array)) |
| 207 | #define RB_ALIGNMENT 4U | 205 | #define RB_ALIGNMENT 4U |
| 208 | #define RB_MAX_SMALL_DATA (RB_ALIGNMENT * RINGBUF_TYPE_DATA_TYPE_LEN_MAX) | 206 | #define RB_MAX_SMALL_DATA (RB_ALIGNMENT * RINGBUF_TYPE_DATA_TYPE_LEN_MAX) |
diff --git a/mm/memory.c b/mm/memory.c index aede2ce3aba4..e8f63d9961ea 100644 --- a/mm/memory.c +++ b/mm/memory.c | |||
| @@ -56,6 +56,7 @@ | |||
| 56 | #include <linux/swapops.h> | 56 | #include <linux/swapops.h> |
| 57 | #include <linux/elf.h> | 57 | #include <linux/elf.h> |
| 58 | 58 | ||
| 59 | #include <asm/io.h> | ||
| 59 | #include <asm/pgalloc.h> | 60 | #include <asm/pgalloc.h> |
| 60 | #include <asm/uaccess.h> | 61 | #include <asm/uaccess.h> |
| 61 | #include <asm/tlb.h> | 62 | #include <asm/tlb.h> |
| @@ -905,7 +905,7 @@ void vm_stat_account(struct mm_struct *mm, unsigned long flags, | |||
| 905 | #endif /* CONFIG_PROC_FS */ | 905 | #endif /* CONFIG_PROC_FS */ |
| 906 | 906 | ||
| 907 | /* | 907 | /* |
| 908 | * The caller must hold down_write(current->mm->mmap_sem). | 908 | * The caller must hold down_write(¤t->mm->mmap_sem). |
| 909 | */ | 909 | */ |
| 910 | 910 | ||
| 911 | unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, | 911 | unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, |
diff --git a/scripts/kernel-doc b/scripts/kernel-doc index b52d340d759d..ea9f8a58678f 100755 --- a/scripts/kernel-doc +++ b/scripts/kernel-doc | |||
| @@ -1995,6 +1995,7 @@ sub process_file($) { | |||
| 1995 | my $identifier; | 1995 | my $identifier; |
| 1996 | my $func; | 1996 | my $func; |
| 1997 | my $descr; | 1997 | my $descr; |
| 1998 | my $in_purpose = 0; | ||
| 1998 | my $initial_section_counter = $section_counter; | 1999 | my $initial_section_counter = $section_counter; |
| 1999 | 2000 | ||
| 2000 | if (defined($ENV{'SRCTREE'})) { | 2001 | if (defined($ENV{'SRCTREE'})) { |
| @@ -2044,6 +2045,7 @@ sub process_file($) { | |||
| 2044 | $descr =~ s/\s*$//; | 2045 | $descr =~ s/\s*$//; |
| 2045 | $descr =~ s/\s+/ /; | 2046 | $descr =~ s/\s+/ /; |
| 2046 | $declaration_purpose = xml_escape($descr); | 2047 | $declaration_purpose = xml_escape($descr); |
| 2048 | $in_purpose = 1; | ||
| 2047 | } else { | 2049 | } else { |
| 2048 | $declaration_purpose = ""; | 2050 | $declaration_purpose = ""; |
| 2049 | } | 2051 | } |
| @@ -2090,6 +2092,7 @@ sub process_file($) { | |||
| 2090 | } | 2092 | } |
| 2091 | 2093 | ||
| 2092 | $in_doc_sect = 1; | 2094 | $in_doc_sect = 1; |
| 2095 | $in_purpose = 0; | ||
| 2093 | $contents = $newcontents; | 2096 | $contents = $newcontents; |
| 2094 | if ($contents ne "") { | 2097 | if ($contents ne "") { |
| 2095 | while ((substr($contents, 0, 1) eq " ") || | 2098 | while ((substr($contents, 0, 1) eq " ") || |
| @@ -2119,11 +2122,19 @@ sub process_file($) { | |||
| 2119 | } elsif (/$doc_content/) { | 2122 | } elsif (/$doc_content/) { |
| 2120 | # miguel-style comment kludge, look for blank lines after | 2123 | # miguel-style comment kludge, look for blank lines after |
| 2121 | # @parameter line to signify start of description | 2124 | # @parameter line to signify start of description |
| 2122 | if ($1 eq "" && | 2125 | if ($1 eq "") { |
| 2123 | ($section =~ m/^@/ || $section eq $section_context)) { | 2126 | if ($section =~ m/^@/ || $section eq $section_context) { |
| 2124 | dump_section($file, $section, xml_escape($contents)); | 2127 | dump_section($file, $section, xml_escape($contents)); |
| 2125 | $section = $section_default; | 2128 | $section = $section_default; |
| 2126 | $contents = ""; | 2129 | $contents = ""; |
| 2130 | } else { | ||
| 2131 | $contents .= "\n"; | ||
| 2132 | } | ||
| 2133 | $in_purpose = 0; | ||
| 2134 | } elsif ($in_purpose == 1) { | ||
| 2135 | # Continued declaration purpose | ||
| 2136 | chomp($declaration_purpose); | ||
| 2137 | $declaration_purpose .= " " . xml_escape($1); | ||
| 2127 | } else { | 2138 | } else { |
| 2128 | $contents .= $1 . "\n"; | 2139 | $contents .= $1 . "\n"; |
| 2129 | } | 2140 | } |
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c index 091dacb78b4d..2f7da49ed34f 100644 --- a/sound/soc/davinci/davinci-pcm.c +++ b/sound/soc/davinci/davinci-pcm.c | |||
| @@ -145,7 +145,7 @@ static int davinci_pcm_dma_request(struct snd_pcm_substream *substream) | |||
| 145 | prtd->master_lch = ret; | 145 | prtd->master_lch = ret; |
| 146 | 146 | ||
| 147 | /* Request parameter RAM reload slot */ | 147 | /* Request parameter RAM reload slot */ |
| 148 | ret = edma_alloc_slot(EDMA_SLOT_ANY); | 148 | ret = edma_alloc_slot(EDMA_CTLR(prtd->master_lch), EDMA_SLOT_ANY); |
| 149 | if (ret < 0) { | 149 | if (ret < 0) { |
| 150 | edma_free_channel(prtd->master_lch); | 150 | edma_free_channel(prtd->master_lch); |
| 151 | return ret; | 151 | return ret; |
| @@ -162,8 +162,8 @@ static int davinci_pcm_dma_request(struct snd_pcm_substream *substream) | |||
| 162 | * so davinci_pcm_enqueue_dma() takes less time in IRQ. | 162 | * so davinci_pcm_enqueue_dma() takes less time in IRQ. |
| 163 | */ | 163 | */ |
| 164 | edma_read_slot(prtd->slave_lch, &p_ram); | 164 | edma_read_slot(prtd->slave_lch, &p_ram); |
| 165 | p_ram.opt |= TCINTEN | EDMA_TCC(prtd->master_lch); | 165 | p_ram.opt |= TCINTEN | EDMA_TCC(EDMA_CHAN_SLOT(prtd->master_lch)); |
| 166 | p_ram.link_bcntrld = prtd->slave_lch << 5; | 166 | p_ram.link_bcntrld = EDMA_CHAN_SLOT(prtd->slave_lch) << 5; |
| 167 | edma_write_slot(prtd->slave_lch, &p_ram); | 167 | edma_write_slot(prtd->slave_lch, &p_ram); |
| 168 | 168 | ||
| 169 | return 0; | 169 | return 0; |
diff --git a/sound/sound_core.c b/sound/sound_core.c index bb4b88e606bb..49c998186592 100644 --- a/sound/sound_core.c +++ b/sound/sound_core.c | |||
| @@ -29,7 +29,7 @@ MODULE_DESCRIPTION("Core sound module"); | |||
| 29 | MODULE_AUTHOR("Alan Cox"); | 29 | MODULE_AUTHOR("Alan Cox"); |
| 30 | MODULE_LICENSE("GPL"); | 30 | MODULE_LICENSE("GPL"); |
| 31 | 31 | ||
| 32 | static char *sound_nodename(struct device *dev) | 32 | static char *sound_devnode(struct device *dev, mode_t *mode) |
| 33 | { | 33 | { |
| 34 | if (MAJOR(dev->devt) == SOUND_MAJOR) | 34 | if (MAJOR(dev->devt) == SOUND_MAJOR) |
| 35 | return NULL; | 35 | return NULL; |
| @@ -50,7 +50,7 @@ static int __init init_soundcore(void) | |||
| 50 | return PTR_ERR(sound_class); | 50 | return PTR_ERR(sound_class); |
| 51 | } | 51 | } |
| 52 | 52 | ||
| 53 | sound_class->nodename = sound_nodename; | 53 | sound_class->devnode = sound_devnode; |
| 54 | 54 | ||
| 55 | return 0; | 55 | return 0; |
| 56 | } | 56 | } |
