Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

57 files changed, 3415 insertions, 920 deletions

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 34ef70d562b2..0fa466a91bf4 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -40,6 +40,28 @@ config PCI_STUB
 
           When in doubt, say N.
 
+config XEN_PCIDEV_FRONTEND
+        tristate "Xen PCI Frontend"
+        depends on PCI && X86 && XEN
+        select HOTPLUG
+        select PCI_XEN
+        select XEN_XENBUS_FRONTEND
+        default y
+        help
+          The PCI device frontend driver allows the kernel to import arbitrary
+          PCI devices from a PCI backend to support PCI driver domains.
+
+config XEN_PCIDEV_FE_DEBUG
+        bool "Xen PCI Frontend debugging"
+        depends on XEN_PCIDEV_FRONTEND && PCI_DEBUG
+        help
+          Say Y here if you want the Xen PCI frontend to produce a bunch of debug
+          messages to the system log.  Select this if you are having a
+          problem with Xen PCI frontend support and want to see more of what is
+          going on.
+
+          When in doubt, say N.
+
 config HT_IRQ
         bool "Interrupts on hypertransport devices"
         default y
@@ -65,3 +87,7 @@ config PCI_IOAPIC
         depends on ACPI
         depends on HOTPLUG
         default y
+
+config PCI_LABEL
+        def_bool y if (DMI || ACPI)
+        select NLS
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index dc1aa0922868..094308e41be5 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_PCI_IOV) += iov.o
 obj-$(CONFIG_X86) += setup-bus.o
 obj-$(CONFIG_ALPHA) += setup-bus.o setup-irq.o
 obj-$(CONFIG_ARM) += setup-bus.o setup-irq.o
+obj-$(CONFIG_UNICORE32) += setup-bus.o setup-irq.o
 obj-$(CONFIG_PARISC) += setup-bus.o
 obj-$(CONFIG_SUPERH) += setup-bus.o setup-irq.o
 obj-$(CONFIG_PPC) += setup-bus.o
@@ -49,14 +50,17 @@ obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
 obj-$(CONFIG_X86_VISWS) += setup-irq.o
 obj-$(CONFIG_MN10300) += setup-bus.o
 obj-$(CONFIG_MICROBLAZE) += setup-bus.o
+obj-$(CONFIG_TILE) += setup-bus.o setup-irq.o
+obj-$(CONFIG_SPARC_LEON) += setup-bus.o setup-irq.o
 
 #
 # ACPI Related PCI FW Functions
+# ACPI _DSM provided firmware instance and string name
 #
 obj-$(CONFIG_ACPI)    += pci-acpi.o
 
 # SMBIOS provided firmware instance and labels
-obj-$(CONFIG_DMI)    += pci-label.o
+obj-$(CONFIG_PCI_LABEL) += pci-label.o
 
 # Cardbus & CompactPCI use setup-bus
 obj-$(CONFIG_HOTPLUG) += setup-bus.o
@@ -65,6 +69,6 @@ obj-$(CONFIG_PCI_SYSCALL) += syscall.o
 
 obj-$(CONFIG_PCI_STUB) += pci-stub.o
 
-ifeq ($(CONFIG_PCI_DEBUG),y)
-EXTRA_CFLAGS += -DDEBUG
-endif
+obj-$(CONFIG_XEN_PCIDEV_FRONTEND) += xen-pcifront.o
+
+ccflags-$(CONFIG_PCI_DEBUG) := -DDEBUG
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 531bc697d800..fdaa42aac7c6 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -143,33 +143,41 @@ static noinline void pci_wait_ucfg(struct pci_dev *dev)
         __remove_wait_queue(&pci_ucfg_wait, &wait);
 }
 
+/* Returns 0 on success, negative values indicate error. */
 #define PCI_USER_READ_CONFIG(size,type)                                 \
 int pci_user_read_config_##size                                         \
         (struct pci_dev *dev, int pos, type *val)                       \
 {                                                                       \
         int ret = 0;                                                    \
         u32 data = -1;                                                  \
-        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
+        if (PCI_##size##_BAD)                                           \
+                return -EINVAL;                                         \
         raw_spin_lock_irq(&pci_lock);                           \
         if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
         ret = dev->bus->ops->read(dev->bus, dev->devfn,                 \
                                         pos, sizeof(type), &data);      \
         raw_spin_unlock_irq(&pci_lock);                         \
         *val = (type)data;                                              \
+        if (ret > 0)                                                    \
+                ret = -EINVAL;                                          \
         return ret;                                                     \
 }
 
+/* Returns 0 on success, negative values indicate error. */
 #define PCI_USER_WRITE_CONFIG(size,type)                                \
 int pci_user_write_config_##size                                        \
         (struct pci_dev *dev, int pos, type val)                        \
 {                                                                       \
         int ret = -EIO;                                                 \
-        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
+        if (PCI_##size##_BAD)                                           \
+                return -EINVAL;                                         \
         raw_spin_lock_irq(&pci_lock);                           \
         if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
         ret = dev->bus->ops->write(dev->bus, dev->devfn,                \
                                         pos, sizeof(type), val);        \
         raw_spin_unlock_irq(&pci_lock);                         \
+        if (ret > 0)                                                    \
+                ret = -EINVAL;                                          \
         return ret;                                                     \
 }
 
@@ -197,6 +205,8 @@ struct pci_vpd_pci22 {
  * This code has to spin since there is no other notification from the PCI
  * hardware. Since the VPD is often implemented by serial attachment to an
  * EEPROM, it may take many milliseconds to complete.
+ *
+ * Returns 0 on success, negative values indicate error.
  */
 static int pci_vpd_pci22_wait(struct pci_dev *dev)
 {
@@ -212,7 +222,7 @@ static int pci_vpd_pci22_wait(struct pci_dev *dev)
         for (;;) {
                 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
                                                 &status);
-                if (ret)
+                if (ret < 0)
                         return ret;
 
                 if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
@@ -324,6 +334,8 @@ static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count
                 vpd->busy = true;
                 vpd->flag = 0;
                 ret = pci_vpd_pci22_wait(dev);
+                if (ret < 0)
+                        break;
 
                 pos += sizeof(u32);
         }
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 7f0af0e9b826..1e2ad92a4752 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -163,12 +163,6 @@ int pci_bus_add_child(struct pci_bus *bus)
 
         bus->is_added = 1;
 
-        retval = device_create_file(&bus->dev, &dev_attr_cpuaffinity);
-        if (retval)
-                return retval;
-
-        retval = device_create_file(&bus->dev, &dev_attr_cpulistaffinity);
-
         /* Create legacy_io and legacy_mem files for this bus */
         pci_create_legacy_files(bus);
 
@@ -299,6 +293,7 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
         }
         up_read(&pci_bus_sem);
 }
+EXPORT_SYMBOL_GPL(pci_walk_bus);
 
 EXPORT_SYMBOL(pci_bus_alloc_resource);
 EXPORT_SYMBOL_GPL(pci_bus_add_device);
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 0a19708074c2..3dc9befa5aec 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -36,6 +36,7 @@
 #include <linux/tboot.h>
 #include <linux/dmi.h>
 #include <linux/slab.h>
+#include <asm/iommu_table.h>
 
 #define PREFIX "DMAR: "
 
@@ -687,7 +688,7 @@ failed:
         return 0;
 }
 
-void __init detect_intel_iommu(void)
+int __init detect_intel_iommu(void)
 {
         int ret;
 
@@ -697,12 +698,7 @@ void __init detect_intel_iommu(void)
         {
 #ifdef CONFIG_INTR_REMAP
                 struct acpi_table_dmar *dmar;
-                /*
-                 * for now we will disable dma-remapping when interrupt
-                 * remapping is enabled.
-                 * When support for queued invalidation for IOTLB invalidation
-                 * is added, we will not need this any more.
-                 */
+
                 dmar = (struct acpi_table_dmar *) dmar_tbl;
                 if (ret && cpu_has_x2apic && dmar->flags & 0x1)
                         printk(KERN_INFO
@@ -723,6 +719,8 @@ void __init detect_intel_iommu(void)
         }
         early_acpi_os_unmap_memory(dmar_tbl, dmar_tbl_size);
         dmar_tbl = NULL;
+
+        return ret ? 1 : -ENODEV;
 }
 
 
@@ -1221,9 +1219,9 @@ const char *dmar_get_fault_reason(u8 fault_reason, int *fault_type)
         }
 }
 
-void dmar_msi_unmask(unsigned int irq)
+void dmar_msi_unmask(struct irq_data *data)
 {
-        struct intel_iommu *iommu = get_irq_data(irq);
+        struct intel_iommu *iommu = irq_data_get_irq_handler_data(data);
         unsigned long flag;
 
         /* unmask it */
@@ -1234,10 +1232,10 @@ void dmar_msi_unmask(unsigned int irq)
         spin_unlock_irqrestore(&iommu->register_lock, flag);
 }
 
-void dmar_msi_mask(unsigned int irq)
+void dmar_msi_mask(struct irq_data *data)
 {
         unsigned long flag;
-        struct intel_iommu *iommu = get_irq_data(irq);
+        struct intel_iommu *iommu = irq_data_get_irq_handler_data(data);
 
         /* mask it */
         spin_lock_irqsave(&iommu->register_lock, flag);
@@ -1249,7 +1247,7 @@ void dmar_msi_mask(unsigned int irq)
 
 void dmar_msi_write(int irq, struct msi_msg *msg)
 {
-        struct intel_iommu *iommu = get_irq_data(irq);
+        struct intel_iommu *iommu = irq_get_handler_data(irq);
         unsigned long flag;
 
         spin_lock_irqsave(&iommu->register_lock, flag);
@@ -1261,7 +1259,7 @@ void dmar_msi_write(int irq, struct msi_msg *msg)
 
 void dmar_msi_read(int irq, struct msi_msg *msg)
 {
-        struct intel_iommu *iommu = get_irq_data(irq);
+        struct intel_iommu *iommu = irq_get_handler_data(irq);
         unsigned long flag;
 
         spin_lock_irqsave(&iommu->register_lock, flag);
@@ -1379,12 +1377,12 @@ int dmar_set_interrupt(struct intel_iommu *iommu)
                 return -EINVAL;
         }
 
-        set_irq_data(irq, iommu);
+        irq_set_handler_data(irq, iommu);
         iommu->irq = irq;
 
         ret = arch_setup_dmar_msi(irq);
         if (ret) {
-                set_irq_data(irq, NULL);
+                irq_set_handler_data(irq, NULL);
                 iommu->irq = 0;
                 destroy_irq(irq);
                 return ret;
@@ -1414,6 +1412,11 @@ int __init enable_drhd_fault_handling(void)
                                (unsigned long long)drhd->reg_base_addr, ret);
                         return -1;
                 }
+
+                /*
+                 * Clear any previous faults.
+                 */
+                dmar_fault(iommu->irq, iommu);
         }
 
         return 0;
@@ -1455,3 +1458,4 @@ int __init dmar_ir_support(void)
                 return 0;
         return dmar->flags & 0x1;
 }
+IOMMU_INIT_POST(detect_intel_iommu);
diff --git a/drivers/pci/hotplug/acpi_pcihp.c b/drivers/pci/hotplug/acpi_pcihp.c
index 3bc72d18b121..8f3faf343f75 100644
--- a/drivers/pci/hotplug/acpi_pcihp.c
+++ b/drivers/pci/hotplug/acpi_pcihp.c
@@ -351,7 +351,7 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev, u32 flags)
          * To handle different BIOS behavior, we look for _OSC on a root
          * bridge preferentially (according to PCI fw spec). Later for
          * OSHP within the scope of the hotplug controller and its parents,
-         * upto the host bridge under which this controller exists.
+         * up to the host bridge under which this controller exists.
          */
         handle = acpi_find_root_bridge_handle(pdev);
         if (handle) {
diff --git a/drivers/pci/hotplug/acpiphp.h b/drivers/pci/hotplug/acpiphp.h
index bab52047baa8..7722108e78df 100644
--- a/drivers/pci/hotplug/acpiphp.h
+++ b/drivers/pci/hotplug/acpiphp.h
@@ -36,7 +36,6 @@
 #define _ACPIPHP_H
 
 #include <linux/acpi.h>
-#include <linux/kobject.h>
 #include <linux/mutex.h>
 #include <linux/pci_hotplug.h>
 
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index cb23aa2ebf96..a70fa89f76fd 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -212,6 +212,7 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
 
         pdev = pci_get_slot(pbus, PCI_DEVFN(device, function));
         if (pdev) {
+                pdev->current_state = PCI_D0;
                 slot->flags |= (SLOT_ENABLED | SLOT_POWEREDON);
                 pci_dev_put(pdev);
         }
@@ -584,7 +585,7 @@ static void remove_bridge(acpi_handle handle)
 
         /*
          * On root bridges with hotplug slots directly underneath (ie,
-         * no p2p bridge inbetween), we call cleanup_bridge(). 
+         * no p2p bridge between), we call cleanup_bridge(). 
          *
          * The else clause cleans up root bridges that either had no
          * hotplug slots at all, or had a p2p bridge underneath.
@@ -826,6 +827,13 @@ static int __ref enable_device(struct acpiphp_slot *slot)
         acpiphp_set_hpp_values(bus);
         acpiphp_set_acpi_region(slot);
         pci_enable_bridges(bus);
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                /* Assume that newly added devices are powered on already. */
+                if (!dev->is_added)
+                        dev->current_state = PCI_D0;
+        }
+
         pci_bus_add_devices(bus);
 
         list_for_each_entry(func, &slot->funcs, sibling) {
diff --git a/drivers/pci/hotplug/cpqphp_sysfs.c b/drivers/pci/hotplug/cpqphp_sysfs.c
index 56215322930a..4cb30447a486 100644
--- a/drivers/pci/hotplug/cpqphp_sysfs.c
+++ b/drivers/pci/hotplug/cpqphp_sysfs.c
@@ -34,10 +34,11 @@
 #include <linux/workqueue.h>
 #include <linux/pci.h>
 #include <linux/pci_hotplug.h>
-#include <linux/smp_lock.h>
+#include <linux/mutex.h>
 #include <linux/debugfs.h>
 #include "cpqphp.h"
 
+static DEFINE_MUTEX(cpqphp_mutex);
 static int show_ctrl (struct controller *ctrl, char *buf)
 {
         char *out = buf;
@@ -147,7 +148,7 @@ static int open(struct inode *inode, struct file *file)
         struct ctrl_dbg *dbg;
         int retval = -ENOMEM;
 
-        lock_kernel();
+        mutex_lock(&cpqphp_mutex);
         dbg = kmalloc(sizeof(*dbg), GFP_KERNEL);
         if (!dbg)
                 goto exit;
@@ -160,7 +161,7 @@ static int open(struct inode *inode, struct file *file)
         file->private_data = dbg;
         retval = 0;
 exit:
-        unlock_kernel();
+        mutex_unlock(&cpqphp_mutex);
         return retval;
 }
 
@@ -169,7 +170,7 @@ static loff_t lseek(struct file *file, loff_t off, int whence)
         struct ctrl_dbg *dbg;
         loff_t new = -1;
 
-        lock_kernel();
+        mutex_lock(&cpqphp_mutex);
         dbg = file->private_data;
 
         switch (whence) {
@@ -181,10 +182,10 @@ static loff_t lseek(struct file *file, loff_t off, int whence)
                 break;
         }
         if (new < 0 || new > dbg->size) {
-                unlock_kernel();
+                mutex_unlock(&cpqphp_mutex);
                 return -EINVAL;
         }
-        unlock_kernel();
+        mutex_unlock(&cpqphp_mutex);
         return (file->f_pos = new);
 }
 
diff --git a/drivers/pci/hotplug/ibmphp_ebda.c b/drivers/pci/hotplug/ibmphp_ebda.c
index 5becbdee4027..2850e64dedae 100644
--- a/drivers/pci/hotplug/ibmphp_ebda.c
+++ b/drivers/pci/hotplug/ibmphp_ebda.c
@@ -276,6 +276,12 @@ int __init ibmphp_access_ebda (void)
 
         for (;;) {
                 offset = next_offset;
+
+                /* Make sure what we read is still in the mapped section */
+                if (WARN(offset > (ebda_sz * 1024 - 4),
+                         "ibmphp_ebda: next read is beyond ebda_sz\n"))
+                        break;
+
                 next_offset = readw (io_mem + offset);  /* offset of next blk */
 
                 offset += 2;
diff --git a/drivers/pci/hotplug/ibmphp_hpc.c b/drivers/pci/hotplug/ibmphp_hpc.c
index 1aaf3f32d3cd..f59ed30512b5 100644
--- a/drivers/pci/hotplug/ibmphp_hpc.c
+++ b/drivers/pci/hotplug/ibmphp_hpc.c
@@ -133,8 +133,8 @@ void __init ibmphp_hpc_initvars (void)
         debug ("%s - Entry\n", __func__);
 
         mutex_init(&sem_hpcaccess);
-        init_MUTEX (&semOperations);
-        init_MUTEX_LOCKED (&sem_exit);
+        sema_init(&semOperations, 1);
+        sema_init(&sem_exit, 0);
         to_debug = 0;
 
         debug ("%s - Exit\n", __func__);
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 73d513989263..838f571027b7 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -36,6 +36,7 @@
 #include <linux/sched.h>                /* signal_pending() */
 #include <linux/pcieport_if.h>
 #include <linux/mutex.h>
+#include <linux/workqueue.h>
 
 #define MY_NAME "pciehp"
 
@@ -44,6 +45,7 @@ extern int pciehp_poll_time;
 extern int pciehp_debug;
 extern int pciehp_force;
 extern struct workqueue_struct *pciehp_wq;
+extern struct workqueue_struct *pciehp_ordered_wq;
 
 #define dbg(format, arg...)                                             \
 do {                                                                    \
diff --git a/drivers/pci/hotplug/pciehp_acpi.c b/drivers/pci/hotplug/pciehp_acpi.c
index 2574700db461..5f7226223a62 100644
--- a/drivers/pci/hotplug/pciehp_acpi.c
+++ b/drivers/pci/hotplug/pciehp_acpi.c
@@ -115,7 +115,8 @@ static struct pcie_port_service_driver __initdata dummy_driver = {
 static int __init select_detection_mode(void)
 {
         struct dummy_slot *slot, *tmp;
-        pcie_port_service_register(&dummy_driver);
+        if (pcie_port_service_register(&dummy_driver))
+                return PCIEHP_DETECT_ACPI;
         pcie_port_service_unregister(&dummy_driver);
         list_for_each_entry_safe(slot, tmp, &dummy_slots, list) {
                 list_del(&slot->list);
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index aa5f3ff629ff..7ac8358df8fd 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -43,6 +43,7 @@ int pciehp_poll_mode;
 int pciehp_poll_time;
 int pciehp_force;
 struct workqueue_struct *pciehp_wq;
+struct workqueue_struct *pciehp_ordered_wq;
 
 #define DRIVER_VERSION  "0.4"
 #define DRIVER_AUTHOR   "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
@@ -340,18 +341,33 @@ static int __init pcied_init(void)
 {
         int retval = 0;
 
+        pciehp_wq = alloc_workqueue("pciehp", 0, 0);
+        if (!pciehp_wq)
+                return -ENOMEM;
+
+        pciehp_ordered_wq = alloc_ordered_workqueue("pciehp_ordered", 0);
+        if (!pciehp_ordered_wq) {
+                destroy_workqueue(pciehp_wq);
+                return -ENOMEM;
+        }
+
         pciehp_firmware_init();
         retval = pcie_port_service_register(&hpdriver_portdrv);
         dbg("pcie_port_service_register = %d\n", retval);
         info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
-        if (retval)
+        if (retval) {
+                destroy_workqueue(pciehp_ordered_wq);
+                destroy_workqueue(pciehp_wq);
                 dbg("Failure to register service\n");
+        }
         return retval;
 }
 
 static void __exit pcied_cleanup(void)
 {
         dbg("unload_pciehpd()\n");
+        destroy_workqueue(pciehp_ordered_wq);
+        destroy_workqueue(pciehp_wq);
         pcie_port_service_unregister(&hpdriver_portdrv);
         info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
 }
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
index 8f58148be044..085dbb5fc168 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -32,7 +32,6 @@
 #include <linux/types.h>
 #include <linux/slab.h>
 #include <linux/pci.h>
-#include <linux/workqueue.h>
 #include "../pci.h"
 #include "pciehp.h"
 
@@ -50,7 +49,7 @@ static int queue_interrupt_event(struct slot *p_slot, u32 event_type)
         info->p_slot = p_slot;
         INIT_WORK(&info->work, interrupt_event_handler);
 
-        schedule_work(&info->work);
+        queue_work(pciehp_wq, &info->work);
 
         return 0;
 }
@@ -345,7 +344,7 @@ void pciehp_queue_pushbutton_work(struct work_struct *work)
                 kfree(info);
                 goto out;
         }
-        queue_work(pciehp_wq, &info->work);
+        queue_work(pciehp_ordered_wq, &info->work);
  out:
         mutex_unlock(&p_slot->lock);
 }
@@ -378,7 +377,7 @@ static void handle_button_press_event(struct slot *p_slot)
                 if (ATTN_LED(ctrl))
                         pciehp_set_attention_status(p_slot, 0);
 
-                schedule_delayed_work(&p_slot->work, 5*HZ);
+                queue_delayed_work(pciehp_wq, &p_slot->work, 5*HZ);
                 break;
         case BLINKINGOFF_STATE:
         case BLINKINGON_STATE:
@@ -440,7 +439,7 @@ static void handle_surprise_event(struct slot *p_slot)
         else
                 p_slot->state = POWERON_STATE;
 
-        queue_work(pciehp_wq, &info->work);
+        queue_work(pciehp_ordered_wq, &info->work);
 }
 
 static void interrupt_event_handler(struct work_struct *work)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 0cd42047d89b..50a23da5d24d 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -41,8 +41,6 @@
 #include "../pci.h"
 #include "pciehp.h"
 
-static atomic_t pciehp_num_controllers = ATOMIC_INIT(0);
-
 static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
@@ -805,8 +803,8 @@ static void pcie_cleanup_slot(struct controller *ctrl)
 {
         struct slot *slot = ctrl->slot;
         cancel_delayed_work(&slot->work);
-        flush_scheduled_work();
         flush_workqueue(pciehp_wq);
+        flush_workqueue(pciehp_ordered_wq);
         kfree(slot);
 }
 
@@ -912,16 +910,6 @@ struct controller *pcie_init(struct pcie_device *dev)
         /* Disable sotfware notification */
         pcie_disable_notification(ctrl);
 
-        /*
-         * If this is the first controller to be initialized,
-         * initialize the pciehp work queue
-         */
-        if (atomic_add_return(1, &pciehp_num_controllers) == 1) {
-                pciehp_wq = create_singlethread_workqueue("pciehpd");
-                if (!pciehp_wq)
-                        goto abort_ctrl;
-        }
-
         ctrl_info(ctrl, "HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",
                   pdev->vendor, pdev->device, pdev->subsystem_vendor,
                   pdev->subsystem_device);
@@ -941,11 +929,5 @@ void pciehp_release_ctrl(struct controller *ctrl)
 {
         pcie_shutdown_notification(ctrl);
         pcie_cleanup_slot(ctrl);
-        /*
-         * If this is the last controller to be released, destroy the
-         * pciehp work queue
-         */
-        if (atomic_dec_and_test(&pciehp_num_controllers))
-                destroy_workqueue(pciehp_wq);
         kfree(ctrl);
 }
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
index 80b461c98557..749fdf070319 100644
--- a/drivers/pci/hotplug/pcihp_slot.c
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -158,6 +158,47 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
          */
 }
 
+/* Program PCIE MaxPayload setting on device: ensure parent maxpayload <= device */
+static int pci_set_payload(struct pci_dev *dev)
+{
+       int pos, ppos;
+       u16 pctl, psz;
+       u16 dctl, dsz, dcap, dmax;
+       struct pci_dev *parent;
+
+       parent = dev->bus->self;
+       pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+       if (!pos)
+               return 0;
+
+       /* Read Device MaxPayload capability and setting */
+       pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &dctl);
+       pci_read_config_word(dev, pos + PCI_EXP_DEVCAP, &dcap);
+       dsz = (dctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+       dmax = (dcap & PCI_EXP_DEVCAP_PAYLOAD);
+
+       /* Read Parent MaxPayload setting */
+       ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);
+       if (!ppos)
+               return 0;
+       pci_read_config_word(parent, ppos + PCI_EXP_DEVCTL, &pctl);
+       psz = (pctl &  PCI_EXP_DEVCTL_PAYLOAD) >> 5;
+
+       /* If parent payload > device max payload -> error
+        * If parent payload > device payload -> set speed
+        * If parent payload <= device payload -> do nothing
+        */
+       if (psz > dmax)
+               return -1;
+       else if (psz > dsz) {
+               dev_info(&dev->dev, "Setting MaxPayload to %d\n", 128 << psz);
+               pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
+                                     (dctl & ~PCI_EXP_DEVCTL_PAYLOAD) +
+                                     (psz << 5));
+       }
+       return 0;
+}
+
 void pci_configure_slot(struct pci_dev *dev)
 {
         struct pci_dev *cdev;
@@ -169,6 +210,10 @@ void pci_configure_slot(struct pci_dev *dev)
                         (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
                 return;
 
+       ret = pci_set_payload(dev);
+       if (ret)
+               dev_warn(&dev->dev, "could not set device max payload\n");
+
         memset(&hpp, 0, sizeof(hpp));
         ret = pci_get_hp_params(dev, &hpp);
         if (ret)
diff --git a/drivers/pci/hotplug/rpaphp_core.c b/drivers/pci/hotplug/rpaphp_core.c
index ef7411c660b9..758adb5f47fd 100644
--- a/drivers/pci/hotplug/rpaphp_core.c
+++ b/drivers/pci/hotplug/rpaphp_core.c
@@ -290,7 +290,7 @@ static int is_php_dn(struct device_node *dn, const int **indexes,
  * @dn: device node of slot
  *
  * This subroutine will register a hotplugable slot with the
- * PCI hotplug infrastructure. This routine is typicaly called
+ * PCI hotplug infrastructure. This routine is typically called
  * during boot time, if the hotplug slots are present at boot time,
  * or is called later, by the dlpar add code, if the slot is
  * being dynamically added during runtime.
diff --git a/drivers/pci/hotplug/rpaphp_slot.c b/drivers/pci/hotplug/rpaphp_slot.c
index 2ea9cf1a8d02..b283bbea6d24 100644
--- a/drivers/pci/hotplug/rpaphp_slot.c
+++ b/drivers/pci/hotplug/rpaphp_slot.c
@@ -24,7 +24,6 @@
  */
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/kobject.h>
 #include <linux/sysfs.h>
 #include <linux/pci.h>
 #include <linux/string.h>
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index d2627e1c3ac1..e0c90e643b5f 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -35,6 +35,7 @@
 #include <linux/delay.h>
 #include <linux/sched.h>        /* signal_pending(), struct timer_list */
 #include <linux/mutex.h>
+#include <linux/workqueue.h>
 
 #if !defined(MODULE)
         #define MY_NAME "shpchp"
@@ -46,6 +47,7 @@ extern int shpchp_poll_mode;
 extern int shpchp_poll_time;
 extern int shpchp_debug;
 extern struct workqueue_struct *shpchp_wq;
+extern struct workqueue_struct *shpchp_ordered_wq;
 
 #define dbg(format, arg...)                                             \
 do {                                                                    \
diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c
index a7bd5048396e..aca972bbfb4c 100644
--- a/drivers/pci/hotplug/shpchp_core.c
+++ b/drivers/pci/hotplug/shpchp_core.c
@@ -33,7 +33,6 @@
 #include <linux/types.h>
 #include <linux/slab.h>
 #include <linux/pci.h>
-#include <linux/workqueue.h>
 #include "shpchp.h"
 
 /* Global variables */
@@ -41,6 +40,7 @@ int shpchp_debug;
 int shpchp_poll_mode;
 int shpchp_poll_time;
 struct workqueue_struct *shpchp_wq;
+struct workqueue_struct *shpchp_ordered_wq;
 
 #define DRIVER_VERSION  "0.4"
 #define DRIVER_AUTHOR   "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
@@ -174,8 +174,8 @@ void cleanup_slots(struct controller *ctrl)
                 slot = list_entry(tmp, struct slot, slot_list);
                 list_del(&slot->slot_list);
                 cancel_delayed_work(&slot->work);
-                flush_scheduled_work();
                 flush_workqueue(shpchp_wq);
+                flush_workqueue(shpchp_ordered_wq);
                 pci_hp_deregister(slot->hotplug_slot);
         }
 }
@@ -360,9 +360,23 @@ static int __init shpcd_init(void)
 {
         int retval = 0;
 
+        shpchp_wq = alloc_ordered_workqueue("shpchp", 0);
+        if (!shpchp_wq)
+                return -ENOMEM;
+
+        shpchp_ordered_wq = alloc_ordered_workqueue("shpchp_ordered", 0);
+        if (!shpchp_ordered_wq) {
+                destroy_workqueue(shpchp_wq);
+                return -ENOMEM;
+        }
+
         retval = pci_register_driver(&shpc_driver);
         dbg("%s: pci_register_driver = %d\n", __func__, retval);
         info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
+        if (retval) {
+                destroy_workqueue(shpchp_ordered_wq);
+                destroy_workqueue(shpchp_wq);
+        }
         return retval;
 }
 
@@ -370,6 +384,8 @@ static void __exit shpcd_cleanup(void)
 {
         dbg("unload_shpchpd()\n");
         pci_unregister_driver(&shpc_driver);
+        destroy_workqueue(shpchp_ordered_wq);
+        destroy_workqueue(shpchp_wq);
         info(DRIVER_DESC " version: " DRIVER_VERSION " unloaded\n");
 }
 
diff --git a/drivers/pci/hotplug/shpchp_ctrl.c b/drivers/pci/hotplug/shpchp_ctrl.c
index 3387fbfb0c54..b00b09bdd38a 100644
--- a/drivers/pci/hotplug/shpchp_ctrl.c
+++ b/drivers/pci/hotplug/shpchp_ctrl.c
@@ -32,7 +32,6 @@
 #include <linux/types.h>
 #include <linux/slab.h>
 #include <linux/pci.h>
-#include <linux/workqueue.h>
 #include "../pci.h"
 #include "shpchp.h"
 
@@ -52,7 +51,7 @@ static int queue_interrupt_event(struct slot *p_slot, u32 event_type)
         info->p_slot = p_slot;
         INIT_WORK(&info->work, interrupt_event_handler);
 
-        schedule_work(&info->work);
+        queue_work(shpchp_wq, &info->work);
 
         return 0;
 }
@@ -457,7 +456,7 @@ void shpchp_queue_pushbutton_work(struct work_struct *work)
                 kfree(info);
                 goto out;
         }
-        queue_work(shpchp_wq, &info->work);
+        queue_work(shpchp_ordered_wq, &info->work);
  out:
         mutex_unlock(&p_slot->lock);
 }
@@ -505,7 +504,7 @@ static void handle_button_press_event(struct slot *p_slot)
                 p_slot->hpc_ops->green_led_blink(p_slot);
                 p_slot->hpc_ops->set_attention_status(p_slot, 0);
 
-                schedule_delayed_work(&p_slot->work, 5*HZ);
+                queue_delayed_work(shpchp_wq, &p_slot->work, 5*HZ);
                 break;
         case BLINKINGOFF_STATE:
         case BLINKINGON_STATE:
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c
index d3985e7deab7..36547f0ce305 100644
--- a/drivers/pci/hotplug/shpchp_hpc.c
+++ b/drivers/pci/hotplug/shpchp_hpc.c
@@ -179,8 +179,6 @@
 #define SLOT_EVENT_LATCH        0x2
 #define SLOT_SERR_INT_MASK      0x3
 
-static atomic_t shpchp_num_controllers = ATOMIC_INIT(0);
-
 static irqreturn_t shpc_isr(int irq, void *dev_id);
 static void start_int_poll_timer(struct controller *ctrl, int sec);
 static int hpc_check_cmd_status(struct controller *ctrl);
@@ -614,13 +612,6 @@ static void hpc_release_ctlr(struct controller *ctrl)
 
         iounmap(ctrl->creg);
         release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
-
-        /*
-         * If this is the last controller to be released, destroy the
-         * shpchpd work queue
-         */
-        if (atomic_dec_and_test(&shpchp_num_controllers))
-                destroy_workqueue(shpchp_wq);
 }
 
 static int hpc_power_on_slot(struct slot * slot)
@@ -1077,9 +1068,8 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
 
                 rc = request_irq(ctrl->pci_dev->irq, shpc_isr, IRQF_SHARED,
                                  MY_NAME, (void *)ctrl);
-                ctrl_dbg(ctrl, "request_irq %d for hpc%d (returns %d)\n",
-                         ctrl->pci_dev->irq,
-                    atomic_read(&shpchp_num_controllers), rc);
+                ctrl_dbg(ctrl, "request_irq %d (returns %d)\n",
+                         ctrl->pci_dev->irq, rc);
                 if (rc) {
                         ctrl_err(ctrl, "Can't get irq %d for the hotplug "
                                  "controller\n", ctrl->pci_dev->irq);
@@ -1092,18 +1082,6 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
         shpc_get_cur_bus_speed(ctrl);
 
         /*
-         * If this is the first controller to be initialized,
-         * initialize the shpchpd work queue
-         */
-        if (atomic_add_return(1, &shpchp_num_controllers) == 1) {
-                shpchp_wq = create_singlethread_workqueue("shpchpd");
-                if (!shpchp_wq) {
-                        rc = -ENOMEM;
-                        goto abort_iounmap;
-                }
-        }
-
-        /*
          * Unmask all event interrupts of all slots
          */
         for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
diff --git a/drivers/pci/htirq.c b/drivers/pci/htirq.c
index 98abf8b91294..db057b6fe0c8 100644
--- a/drivers/pci/htirq.c
+++ b/drivers/pci/htirq.c
@@ -34,7 +34,7 @@ struct ht_irq_cfg {
 
 void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
 {
-        struct ht_irq_cfg *cfg = get_irq_data(irq);
+        struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
         unsigned long flags;
         spin_lock_irqsave(&ht_irq_lock, flags);
         if (cfg->msg.address_lo != msg->address_lo) {
@@ -53,32 +53,26 @@ void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
 
 void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
 {
-        struct ht_irq_cfg *cfg = get_irq_data(irq);
+        struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
         *msg = cfg->msg;
 }
 
-void mask_ht_irq(unsigned int irq)
+void mask_ht_irq(struct irq_data *data)
 {
-        struct ht_irq_cfg *cfg;
-        struct ht_irq_msg msg;
-
-        cfg = get_irq_data(irq);
+        struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
+        struct ht_irq_msg msg = cfg->msg;
 
-        msg = cfg->msg;
         msg.address_lo |= 1;
-        write_ht_irq_msg(irq, &msg);
+        write_ht_irq_msg(data->irq, &msg);
 }
 
-void unmask_ht_irq(unsigned int irq)
+void unmask_ht_irq(struct irq_data *data)
 {
-        struct ht_irq_cfg *cfg;
-        struct ht_irq_msg msg;
-
-        cfg = get_irq_data(irq);
+        struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
+        struct ht_irq_msg msg = cfg->msg;
 
-        msg = cfg->msg;
         msg.address_lo &= ~1;
-        write_ht_irq_msg(irq, &msg);
+        write_ht_irq_msg(data->irq, &msg);
 }
 
 /**
@@ -132,7 +126,7 @@ int __ht_create_irq(struct pci_dev *dev, int idx, ht_irq_update_t *update)
                 kfree(cfg);
                 return -EBUSY;
         }
-        set_irq_data(irq, cfg);
+        irq_set_handler_data(irq, cfg);
 
         if (arch_setup_ht_irq(irq, dev) < 0) {
                 ht_destroy_irq(irq);
@@ -168,9 +162,9 @@ void ht_destroy_irq(unsigned int irq)
 {
         struct ht_irq_cfg *cfg;
 
-        cfg = get_irq_data(irq);
-        set_irq_chip(irq, NULL);
-        set_irq_data(irq, NULL);
+        cfg = irq_get_handler_data(irq);
+        irq_set_chip(irq, NULL);
+        irq_set_handler_data(irq, NULL);
         destroy_irq(irq);
 
         kfree(cfg);
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 4789f8e8bf7a..f02c34d26d1b 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -36,9 +36,10 @@
 #include <linux/iova.h>
 #include <linux/iommu.h>
 #include <linux/intel-iommu.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/tboot.h>
 #include <linux/dmi.h>
+#include <linux/pci-ats.h>
 #include <asm/cacheflush.h>
 #include <asm/iommu.h>
 #include "pci.h"
@@ -46,6 +47,8 @@
 #define ROOT_SIZE               VTD_PAGE_SIZE
 #define CONTEXT_SIZE            VTD_PAGE_SIZE
 
+#define IS_BRIDGE_HOST_DEVICE(pdev) \
+                            ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
 #define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
 #define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
 #define IS_AZALIA(pdev) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)
@@ -115,6 +118,11 @@ static inline unsigned long align_to_level(unsigned long pfn, int level)
         return (pfn + level_size(level) - 1) & level_mask(level);
 }
 
+static inline unsigned long lvl_to_nr_pages(unsigned int lvl)
+{
+        return  1 << ((lvl - 1) * LEVEL_STRIDE);
+}
+
 /* VT-d pages must always be _smaller_ than MM pages. Otherwise things
    are never going to work. */
 static inline unsigned long dma_to_mm_pfn(unsigned long dma_pfn)
@@ -142,6 +150,12 @@ static void __init check_tylersburg_isoch(void);
 static int rwbf_quirk;
 
 /*
+ * set to 1 to panic kernel if can't successfully enable VT-d
+ * (used when kernel is launched w/ TXT)
+ */
+static int force_on = 0;
+
+/*
  * 0: Present
  * 1-11: Reserved
  * 12-63: Context Ptr (12 - (haw-1))
@@ -337,6 +351,9 @@ struct dmar_domain {
         int             iommu_coherency;/* indicate coherency of iommu access */
         int             iommu_snooping; /* indicate snooping control feature*/
         int             iommu_count;    /* reference count of iommu */
+        int             iommu_superpage;/* Level of superpages supported:
+                                           0 == 4KiB (no superpages), 1 == 2MiB,
+                                           2 == 1GiB, 3 == 512GiB, 4 == 1TiB */
         spinlock_t      iommu_lock;     /* protect iommu set in domain */
         u64             max_addr;       /* maximum mapped address */
 };
@@ -386,6 +403,7 @@ int dmar_disabled = 1;
 static int dmar_map_gfx = 1;
 static int dmar_forcedac;
 static int intel_iommu_strict;
+static int intel_iommu_superpage = 1;
 
 #define DUMMY_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-1))
 static DEFINE_SPINLOCK(device_domain_lock);
@@ -416,6 +434,10 @@ static int __init intel_iommu_setup(char *str)
                         printk(KERN_INFO
                                 "Intel-IOMMU: disable batched IOTLB flush\n");
                         intel_iommu_strict = 1;
+                } else if (!strncmp(str, "sp_off", 6)) {
+                        printk(KERN_INFO
+                                "Intel-IOMMU: disable supported super page\n");
+                        intel_iommu_superpage = 0;
                 }
 
                 str += strcspn(str, ",");
@@ -554,11 +576,32 @@ static void domain_update_iommu_snooping(struct dmar_domain *domain)
         }
 }
 
+static void domain_update_iommu_superpage(struct dmar_domain *domain)
+{
+        int i, mask = 0xf;
+
+        if (!intel_iommu_superpage) {
+                domain->iommu_superpage = 0;
+                return;
+        }
+
+        domain->iommu_superpage = 4; /* 1TiB */
+
+        for_each_set_bit(i, &domain->iommu_bmp, g_num_of_iommus) {
+                mask |= cap_super_page_val(g_iommus[i]->cap);
+                if (!mask) {
+                        break;
+                }
+        }
+        domain->iommu_superpage = fls(mask);
+}
+
 /* Some capabilities may be different across iommus */
 static void domain_update_iommu_cap(struct dmar_domain *domain)
 {
         domain_update_iommu_coherency(domain);
         domain_update_iommu_snooping(domain);
+        domain_update_iommu_superpage(domain);
 }
 
 static struct intel_iommu *device_to_iommu(int segment, u8 bus, u8 devfn)
@@ -688,23 +731,31 @@ out:
 }
 
 static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
-                                      unsigned long pfn)
+                                      unsigned long pfn, int large_level)
 {
         int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
         struct dma_pte *parent, *pte = NULL;
         int level = agaw_to_level(domain->agaw);
-        int offset;
+        int offset, target_level;
 
         BUG_ON(!domain->pgd);
         BUG_ON(addr_width < BITS_PER_LONG && pfn >> addr_width);
         parent = domain->pgd;
 
+        /* Search pte */
+        if (!large_level)
+                target_level = 1;
+        else
+                target_level = large_level;
+
         while (level > 0) {
                 void *tmp_page;
 
                 offset = pfn_level_offset(pfn, level);
                 pte = &parent[offset];
-                if (level == 1)
+                if (!large_level && (pte->val & DMA_PTE_LARGE_PAGE))
+                        break;
+                if (level == target_level)
                         break;
 
                 if (!dma_pte_present(pte)) {
@@ -732,10 +783,11 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
         return pte;
 }
 
+
 /* return address's pte at specific level */
 static struct dma_pte *dma_pfn_level_pte(struct dmar_domain *domain,
                                          unsigned long pfn,
-                                         int level)
+                                         int level, int *large_page)
 {
         struct dma_pte *parent, *pte = NULL;
         int total = agaw_to_level(domain->agaw);
@@ -748,8 +800,16 @@ static struct dma_pte *dma_pfn_level_pte(struct dmar_domain *domain,
                 if (level == total)
                         return pte;
 
-                if (!dma_pte_present(pte))
+                if (!dma_pte_present(pte)) {
+                        *large_page = total;
                         break;
+                }
+
+                if (pte->val & DMA_PTE_LARGE_PAGE) {
+                        *large_page = total;
+                        return pte;
+                }
+
                 parent = phys_to_virt(dma_pte_addr(pte));
                 total--;
         }
@@ -762,6 +822,7 @@ static void dma_pte_clear_range(struct dmar_domain *domain,
                                 unsigned long last_pfn)
 {
         int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
+        unsigned int large_page = 1;
         struct dma_pte *first_pte, *pte;
 
         BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width);
@@ -770,14 +831,15 @@ static void dma_pte_clear_range(struct dmar_domain *domain,
 
         /* we don't need lock here; nobody else touches the iova range */
         do {
-                first_pte = pte = dma_pfn_level_pte(domain, start_pfn, 1);
+                large_page = 1;
+                first_pte = pte = dma_pfn_level_pte(domain, start_pfn, 1, &large_page);
                 if (!pte) {
-                        start_pfn = align_to_level(start_pfn + 1, 2);
+                        start_pfn = align_to_level(start_pfn + 1, large_page + 1);
                         continue;
                 }
-                do { 
+                do {
                         dma_clear_pte(pte);
-                        start_pfn++;
+                        start_pfn += lvl_to_nr_pages(large_page);
                         pte++;
                 } while (start_pfn <= last_pfn && !first_pte_in_page(pte));
 
@@ -797,6 +859,7 @@ static void dma_pte_free_pagetable(struct dmar_domain *domain,
         int total = agaw_to_level(domain->agaw);
         int level;
         unsigned long tmp;
+        int large_page = 2;
 
         BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width);
         BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width);
@@ -812,7 +875,10 @@ static void dma_pte_free_pagetable(struct dmar_domain *domain,
                         return;
 
                 do {
-                        first_pte = pte = dma_pfn_level_pte(domain, tmp, level);
+                        large_page = level;
+                        first_pte = pte = dma_pfn_level_pte(domain, tmp, level, &large_page);
+                        if (large_page > level)
+                                level = large_page + 1;
                         if (!pte) {
                                 tmp = align_to_level(tmp + 1, level + 1);
                                 continue;
@@ -1206,7 +1272,7 @@ void free_dmar_iommu(struct intel_iommu *iommu)
                 iommu_disable_translation(iommu);
 
         if (iommu->irq) {
-                set_irq_data(iommu->irq, NULL);
+                irq_set_handler_data(iommu->irq, NULL);
                 /* This will mask the irq */
                 free_irq(iommu->irq, iommu);
                 destroy_irq(iommu->irq);
@@ -1299,7 +1365,7 @@ static void iommu_detach_domain(struct dmar_domain *domain,
 static struct iova_domain reserved_iova_list;
 static struct lock_class_key reserved_rbtree_key;
 
-static void dmar_init_reserved_ranges(void)
+static int dmar_init_reserved_ranges(void)
 {
         struct pci_dev *pdev = NULL;
         struct iova *iova;
@@ -1313,8 +1379,10 @@ static void dmar_init_reserved_ranges(void)
         /* IOAPIC ranges shouldn't be accessed by DMA */
         iova = reserve_iova(&reserved_iova_list, IOVA_PFN(IOAPIC_RANGE_START),
                 IOVA_PFN(IOAPIC_RANGE_END));
-        if (!iova)
+        if (!iova) {
                 printk(KERN_ERR "Reserve IOAPIC range failed\n");
+                return -ENODEV;
+        }
 
         /* Reserve all PCI MMIO to avoid peer-to-peer access */
         for_each_pci_dev(pdev) {
@@ -1327,11 +1395,13 @@ static void dmar_init_reserved_ranges(void)
                         iova = reserve_iova(&reserved_iova_list,
                                             IOVA_PFN(r->start),
                                             IOVA_PFN(r->end));
-                        if (!iova)
+                        if (!iova) {
                                 printk(KERN_ERR "Reserve iova failed\n");
+                                return -ENODEV;
+                        }
                 }
         }
-
+        return 0;
 }
 
 static void domain_reserve_special_ranges(struct dmar_domain *domain)
@@ -1392,6 +1462,7 @@ static int domain_init(struct dmar_domain *domain, int guest_width)
         else
                 domain->iommu_snooping = 0;
 
+        domain->iommu_superpage = fls(cap_super_page_val(iommu->cap));
         domain->iommu_count = 1;
         domain->nid = iommu->node;
 
@@ -1412,6 +1483,10 @@ static void domain_exit(struct dmar_domain *domain)
         if (!domain)
                 return;
 
+        /* Flush any lazy unmaps that may reference this domain */
+        if (!intel_iommu_strict)
+                flush_unmaps_timeout(0);
+
         domain_remove_dev_info(domain);
         /* destroy iovas */
         put_iova_domain(&domain->iovad);
@@ -1643,6 +1718,34 @@ static inline unsigned long aligned_nrpages(unsigned long host_addr,
         return PAGE_ALIGN(host_addr + size) >> VTD_PAGE_SHIFT;
 }
 
+/* Return largest possible superpage level for a given mapping */
+static inline int hardware_largepage_caps(struct dmar_domain *domain,
+                                          unsigned long iov_pfn,
+                                          unsigned long phy_pfn,
+                                          unsigned long pages)
+{
+        int support, level = 1;
+        unsigned long pfnmerge;
+
+        support = domain->iommu_superpage;
+
+        /* To use a large page, the virtual *and* physical addresses
+           must be aligned to 2MiB/1GiB/etc. Lower bits set in either
+           of them will mean we have to use smaller pages. So just
+           merge them and check both at once. */
+        pfnmerge = iov_pfn | phy_pfn;
+
+        while (support && !(pfnmerge & ~VTD_STRIDE_MASK)) {
+                pages >>= VTD_STRIDE_SHIFT;
+                if (!pages)
+                        break;
+                pfnmerge >>= VTD_STRIDE_SHIFT;
+                level++;
+                support--;
+        }
+        return level;
+}
+
 static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
                             struct scatterlist *sg, unsigned long phys_pfn,
                             unsigned long nr_pages, int prot)
@@ -1651,6 +1754,8 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
         phys_addr_t uninitialized_var(pteval);
         int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
         unsigned long sg_res;
+        unsigned int largepage_lvl = 0;
+        unsigned long lvl_pages = 0;
 
         BUG_ON(addr_width < BITS_PER_LONG && (iov_pfn + nr_pages - 1) >> addr_width);
 
@@ -1666,7 +1771,7 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
                 pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | prot;
         }
 
-        while (nr_pages--) {
+        while (nr_pages > 0) {
                 uint64_t tmp;
 
                 if (!sg_res) {
@@ -1674,11 +1779,21 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
                         sg->dma_address = ((dma_addr_t)iov_pfn << VTD_PAGE_SHIFT) + sg->offset;
                         sg->dma_length = sg->length;
                         pteval = page_to_phys(sg_page(sg)) | prot;
+                        phys_pfn = pteval >> VTD_PAGE_SHIFT;
                 }
+
                 if (!pte) {
-                        first_pte = pte = pfn_to_dma_pte(domain, iov_pfn);
+                        largepage_lvl = hardware_largepage_caps(domain, iov_pfn, phys_pfn, sg_res);
+
+                        first_pte = pte = pfn_to_dma_pte(domain, iov_pfn, largepage_lvl);
                         if (!pte)
                                 return -ENOMEM;
+                        /* It is large page*/
+                        if (largepage_lvl > 1)
+                                pteval |= DMA_PTE_LARGE_PAGE;
+                        else
+                                pteval &= ~(uint64_t)DMA_PTE_LARGE_PAGE;
+
                 }
                 /* We don't need lock here, nobody else
                  * touches the iova range
@@ -1694,16 +1809,38 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
                         }
                         WARN_ON(1);
                 }
+
+                lvl_pages = lvl_to_nr_pages(largepage_lvl);
+
+                BUG_ON(nr_pages < lvl_pages);
+                BUG_ON(sg_res < lvl_pages);
+
+                nr_pages -= lvl_pages;
+                iov_pfn += lvl_pages;
+                phys_pfn += lvl_pages;
+                pteval += lvl_pages * VTD_PAGE_SIZE;
+                sg_res -= lvl_pages;
+
+                /* If the next PTE would be the first in a new page, then we
+                   need to flush the cache on the entries we've just written.
+                   And then we'll need to recalculate 'pte', so clear it and
+                   let it get set again in the if (!pte) block above.
+
+                   If we're done (!nr_pages) we need to flush the cache too.
+
+                   Also if we've been setting superpages, we may need to
+                   recalculate 'pte' and switch back to smaller pages for the
+                   end of the mapping, if the trailing size is not enough to
+                   use another superpage (i.e. sg_res < lvl_pages). */
                 pte++;
-                if (!nr_pages || first_pte_in_page(pte)) {
+                if (!nr_pages || first_pte_in_page(pte) ||
+                    (largepage_lvl > 1 && sg_res < lvl_pages)) {
                         domain_flush_cache(domain, first_pte,
                                            (void *)pte - (void *)first_pte);
                         pte = NULL;
                 }
-                iov_pfn++;
-                pteval += VTD_PAGE_SIZE;
-                sg_res--;
-                if (!sg_res)
+
+                if (!sg_res && nr_pages)
                         sg = sg_next(sg);
         }
         return 0;
@@ -1835,7 +1972,7 @@ static struct dmar_domain *get_domain_for_dev(struct pci_dev *pdev, int gaw)
 
         ret = iommu_attach_domain(domain, iommu);
         if (ret) {
-                domain_exit(domain);
+                free_domain_mem(domain);
                 goto error;
         }
 
@@ -2011,7 +2148,7 @@ static inline int iommu_prepare_rmrr_dev(struct dmar_rmrr_unit *rmrr,
         if (pdev->dev.archdata.iommu == DUMMY_DEVICE_DOMAIN_INFO)
                 return 0;
         return iommu_prepare_identity_map(pdev, rmrr->base_address,
-                rmrr->end_address + 1);
+                rmrr->end_address);
 }
 
 #ifdef CONFIG_DMAR_FLOPPY_WA
@@ -2025,7 +2162,7 @@ static inline void iommu_prepare_isa(void)
                 return;
 
         printk(KERN_INFO "IOMMU: Prepare 0-16MiB unity mapping for LPC\n");
-        ret = iommu_prepare_identity_map(pdev, 0, 16*1024*1024);
+        ret = iommu_prepare_identity_map(pdev, 0, 16*1024*1024 - 1);
 
         if (ret)
                 printk(KERN_ERR "IOMMU: Failed to create 0-16MiB identity map; "
@@ -2101,10 +2238,10 @@ static int identity_mapping(struct pci_dev *pdev)
         if (likely(!iommu_identity_mapping))
                 return 0;
 
+        info = pdev->dev.archdata.iommu;
+        if (info && info != DUMMY_DEVICE_DOMAIN_INFO)
+                return (info->domain == si_domain);
 
-        list_for_each_entry(info, &si_domain->devices, link)
-                if (info->dev == pdev)
-                        return 1;
         return 0;
 }
 
@@ -2182,8 +2319,19 @@ static int iommu_should_identity_map(struct pci_dev *pdev, int startup)
          * Assume that they will -- if they turn out not to be, then we can 
          * take them out of the 1:1 domain later.
          */
-        if (!startup)
-                return pdev->dma_mask > DMA_BIT_MASK(32);
+        if (!startup) {
+                /*
+                 * If the device's dma_mask is less than the system's memory
+                 * size then this is not a candidate for identity mapping.
+                 */
+                u64 dma_mask = pdev->dma_mask;
+
+                if (pdev->dev.coherent_dma_mask &&
+                    pdev->dev.coherent_dma_mask < dma_mask)
+                        dma_mask = pdev->dev.coherent_dma_mask;
+
+                return dma_mask >= dma_get_required_mask(&pdev->dev);
+        }
 
         return 1;
 }
@@ -2198,6 +2346,9 @@ static int __init iommu_prepare_static_identity_mapping(int hw)
                 return -EFAULT;
 
         for_each_pci_dev(pdev) {
+                /* Skip Host/PCI Bridge devices */
+                if (IS_BRIDGE_HOST_DEVICE(pdev))
+                        continue;
                 if (iommu_should_identity_map(pdev, 1)) {
                         printk(KERN_INFO "IOMMU: %s identity mapping for device %s\n",
                                hw ? "hardware" : "software", pci_name(pdev));
@@ -2213,7 +2364,7 @@ static int __init iommu_prepare_static_identity_mapping(int hw)
         return 0;
 }
 
-int __init init_dmars(void)
+static int __init init_dmars(void)
 {
         struct dmar_drhd_unit *drhd;
         struct dmar_rmrr_unit *rmrr;
@@ -2265,7 +2416,7 @@ int __init init_dmars(void)
                 /*
                  * TBD:
                  * we could share the same root & context tables
-                 * amoung all IOMMU's. Need to Split it later.
+                 * among all IOMMU's. Need to Split it later.
                  */
                 ret = iommu_alloc_root_entry(iommu);
                 if (ret) {
@@ -2393,8 +2544,15 @@ int __init init_dmars(void)
          *   enable translation
          */
         for_each_drhd_unit(drhd) {
-                if (drhd->ignored)
+                if (drhd->ignored) {
+                        /*
+                         * we always have to disable PMRs or DMA may fail on
+                         * this device
+                         */
+                        if (force_on)
+                                iommu_disable_protect_mem_regions(drhd->iommu);
                         continue;
+                }
                 iommu = drhd->iommu;
 
                 iommu_flush_write_buffer(iommu);
@@ -2580,8 +2738,7 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr,
         iommu = domain_get_iommu(domain);
         size = aligned_nrpages(paddr, size);
 
-        iova = intel_alloc_iova(hwdev, domain, dma_to_mm_pfn(size),
-                                pdev->dma_mask);
+        iova = intel_alloc_iova(hwdev, domain, dma_to_mm_pfn(size), dma_mask);
         if (!iova)
                 goto error;
 
@@ -3106,7 +3263,17 @@ static int init_iommu_hw(void)
                 if (iommu->qi)
                         dmar_reenable_qi(iommu);
 
-        for_each_active_iommu(iommu, drhd) {
+        for_each_iommu(iommu, drhd) {
+                if (drhd->ignored) {
+                        /*
+                         * we always have to disable PMRs or DMA may fail on
+                         * this device
+                         */
+                        if (force_on)
+                                iommu_disable_protect_mem_regions(iommu);
+                        continue;
+                }
+        
                 iommu_flush_write_buffer(iommu);
 
                 iommu_set_root_entry(iommu);
@@ -3115,7 +3282,8 @@ static int init_iommu_hw(void)
                                            DMA_CCMD_GLOBAL_INVL);
                 iommu->flush.flush_iotlb(iommu, 0, 0, 0,
                                          DMA_TLB_GLOBAL_FLUSH);
-                iommu_enable_translation(iommu);
+                if (iommu_enable_translation(iommu))
+                        return 1;
                 iommu_disable_protect_mem_regions(iommu);
         }
 
@@ -3135,7 +3303,7 @@ static void iommu_flush_all(void)
         }
 }
 
-static int iommu_suspend(struct sys_device *dev, pm_message_t state)
+static int iommu_suspend(void)
 {
         struct dmar_drhd_unit *drhd;
         struct intel_iommu *iommu = NULL;
@@ -3175,15 +3343,18 @@ nomem:
         return -ENOMEM;
 }
 
-static int iommu_resume(struct sys_device *dev)
+static void iommu_resume(void)
 {
         struct dmar_drhd_unit *drhd;
         struct intel_iommu *iommu = NULL;
         unsigned long flag;
 
         if (init_iommu_hw()) {
-                WARN(1, "IOMMU setup failed, DMAR can not resume!\n");
-                return -EIO;
+                if (force_on)
+                        panic("tboot: IOMMU setup failed, DMAR can not resume!\n");
+                else
+                        WARN(1, "IOMMU setup failed, DMAR can not resume!\n");
+                return;
         }
 
         for_each_active_iommu(iommu, drhd) {
@@ -3204,40 +3375,20 @@ static int iommu_resume(struct sys_device *dev)
 
         for_each_active_iommu(iommu, drhd)
                 kfree(iommu->iommu_state);
-
-        return 0;
 }
 
-static struct sysdev_class iommu_sysclass = {
-        .name           = "iommu",
+static struct syscore_ops iommu_syscore_ops = {
         .resume         = iommu_resume,
         .suspend        = iommu_suspend,
 };
 
-static struct sys_device device_iommu = {
-        .cls    = &iommu_sysclass,
-};
-
-static int __init init_iommu_sysfs(void)
+static void __init init_iommu_pm_ops(void)
 {
-        int error;
-
-        error = sysdev_class_register(&iommu_sysclass);
-        if (error)
-                return error;
-
-        error = sysdev_register(&device_iommu);
-        if (error)
-                sysdev_class_unregister(&iommu_sysclass);
-
-        return error;
+        register_syscore_ops(&iommu_syscore_ops);
 }
 
 #else
-static int __init init_iommu_sysfs(void)
-{
-        return 0;
-}
+static inline void init_iommu_pm_ops(void) {}
 #endif  /* CONFIG_PM */
 
 /*
@@ -3260,9 +3411,15 @@ static int device_notifier(struct notifier_block *nb,
         if (!domain)
                 return 0;
 
-        if (action == BUS_NOTIFY_UNBOUND_DRIVER && !iommu_pass_through)
+        if (action == BUS_NOTIFY_UNBOUND_DRIVER && !iommu_pass_through) {
                 domain_remove_one_dev_info(domain, pdev);
 
+                if (!(domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE) &&
+                    !(domain->flags & DOMAIN_FLAG_STATIC_IDENTITY) &&
+                    list_empty(&domain->devices))
+                        domain_exit(domain);
+        }
+
         return 0;
 }
 
@@ -3273,7 +3430,6 @@ static struct notifier_block device_nb = {
 int __init intel_iommu_init(void)
 {
         int ret = 0;
-        int force_on = 0;
 
         /* VT-d is required for a TXT/tboot launch, so enforce that */
         force_on = tboot_force_iommu();
@@ -3297,8 +3453,17 @@ int __init intel_iommu_init(void)
         if (no_iommu || dmar_disabled)
                 return -ENODEV;
 
-        iommu_init_mempool();
-        dmar_init_reserved_ranges();
+        if (iommu_init_mempool()) {
+                if (force_on)
+                        panic("tboot: Failed to initialize iommu memory\n");
+                return  -ENODEV;
+        }
+
+        if (dmar_init_reserved_ranges()) {
+                if (force_on)
+                        panic("tboot: Failed to reserve iommu ranges\n");
+                return  -ENODEV;
+        }
 
         init_no_remapping_devices();
 
@@ -3320,7 +3485,7 @@ int __init intel_iommu_init(void)
 #endif
         dma_ops = &intel_dma_ops;
 
-        init_iommu_sysfs();
+        init_iommu_pm_ops();
 
         register_iommu(&intel_iommu_ops);
 
@@ -3373,8 +3538,8 @@ static void domain_remove_one_dev_info(struct dmar_domain *domain,
         spin_lock_irqsave(&device_domain_lock, flags);
         list_for_each_safe(entry, tmp, &domain->devices) {
                 info = list_entry(entry, struct device_domain_info, link);
-                /* No need to compare PCI domain; it has to be the same */
-                if (info->bus == pdev->bus->number &&
+                if (info->segment == pci_domain_nr(pdev->bus) &&
+                    info->bus == pdev->bus->number &&
                     info->devfn == pdev->devfn) {
                         list_del(&info->link);
                         list_del(&info->global);
@@ -3411,6 +3576,14 @@ static void domain_remove_one_dev_info(struct dmar_domain *domain,
                 domain->iommu_count--;
                 domain_update_iommu_cap(domain);
                 spin_unlock_irqrestore(&domain->iommu_lock, tmp_flags);
+
+                if (!(domain->flags & DOMAIN_FLAG_VIRTUAL_MACHINE) &&
+                    !(domain->flags & DOMAIN_FLAG_STATIC_IDENTITY)) {
+                        spin_lock_irqsave(&iommu->lock, tmp_flags);
+                        clear_bit(domain->id, iommu->domain_ids);
+                        iommu->domains[domain->id] = NULL;
+                        spin_unlock_irqrestore(&iommu->lock, tmp_flags);
+                }
         }
 
         spin_unlock_irqrestore(&device_domain_lock, flags);
@@ -3493,6 +3666,7 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
         domain->iommu_count = 0;
         domain->iommu_coherency = 0;
         domain->iommu_snooping = 0;
+        domain->iommu_superpage = 0;
         domain->max_addr = 0;
         domain->nid = -1;
 
@@ -3627,9 +3801,9 @@ static int intel_iommu_attach_device(struct iommu_domain *domain,
 
                 pte = dmar_domain->pgd;
                 if (dma_pte_present(pte)) {
-                        free_pgtable_page(dmar_domain->pgd);
                         dmar_domain->pgd = (struct dma_pte *)
                                 phys_to_virt(dma_pte_addr(pte));
+                        free_pgtable_page(pte);
                 }
                 dmar_domain->agaw--;
         }
@@ -3708,7 +3882,7 @@ static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain,
         struct dma_pte *pte;
         u64 phys = 0;
 
-        pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT);
+        pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, 0);
         if (pte)
                 phys = dma_pte_addr(pte);
 
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index fd1d2867cdcc..3607faf28a4d 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -46,109 +46,24 @@ static __init int setup_intremap(char *str)
 }
 early_param("intremap", setup_intremap);
 
-struct irq_2_iommu {
-        struct intel_iommu *iommu;
-        u16 irte_index;
-        u16 sub_handle;
-        u8  irte_mask;
-};
-
-#ifdef CONFIG_GENERIC_HARDIRQS
-static struct irq_2_iommu *get_one_free_irq_2_iommu(int node)
-{
-        struct irq_2_iommu *iommu;
-
-        iommu = kzalloc_node(sizeof(*iommu), GFP_ATOMIC, node);
-        printk(KERN_DEBUG "alloc irq_2_iommu on node %d\n", node);
-
-        return iommu;
-}
-
-static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
-{
-        struct irq_desc *desc;
-
-        desc = irq_to_desc(irq);
-
-        if (WARN_ON_ONCE(!desc))
-                return NULL;
-
-        return desc->irq_2_iommu;
-}
-
-static struct irq_2_iommu *irq_2_iommu_alloc(unsigned int irq)
-{
-        struct irq_desc *desc;
-        struct irq_2_iommu *irq_iommu;
-
-        desc = irq_to_desc(irq);
-        if (!desc) {
-                printk(KERN_INFO "can not get irq_desc for %d\n", irq);
-                return NULL;
-        }
-
-        irq_iommu = desc->irq_2_iommu;
-
-        if (!irq_iommu)
-                desc->irq_2_iommu = get_one_free_irq_2_iommu(irq_node(irq));
-
-        return desc->irq_2_iommu;
-}
-
-#else /* !CONFIG_SPARSE_IRQ */
-
-static struct irq_2_iommu irq_2_iommuX[NR_IRQS];
-
-static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
-{
-        if (irq < nr_irqs)
-                return &irq_2_iommuX[irq];
-
-        return NULL;
-}
-static struct irq_2_iommu *irq_2_iommu_alloc(unsigned int irq)
-{
-        return irq_2_iommu(irq);
-}
-#endif
-
 static DEFINE_SPINLOCK(irq_2_ir_lock);
 
-static struct irq_2_iommu *valid_irq_2_iommu(unsigned int irq)
-{
-        struct irq_2_iommu *irq_iommu;
-
-        irq_iommu = irq_2_iommu(irq);
-
-        if (!irq_iommu)
-                return NULL;
-
-        if (!irq_iommu->iommu)
-                return NULL;
-
-        return irq_iommu;
-}
-
-int irq_remapped(int irq)
+static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
 {
-        return valid_irq_2_iommu(irq) != NULL;
+        struct irq_cfg *cfg = irq_get_chip_data(irq);
+        return cfg ? &cfg->irq_2_iommu : NULL;
 }
 
 int get_irte(int irq, struct irte *entry)
 {
-        int index;
-        struct irq_2_iommu *irq_iommu;
+        struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
         unsigned long flags;
+        int index;
 
-        if (!entry)
+        if (!entry || !irq_iommu)
                 return -1;
 
         spin_lock_irqsave(&irq_2_ir_lock, flags);
-        irq_iommu = valid_irq_2_iommu(irq);
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-                return -1;
-        }
 
         index = irq_iommu->irte_index + irq_iommu->sub_handle;
         *entry = *(irq_iommu->iommu->ir_table->base + index);
@@ -160,20 +75,14 @@ int get_irte(int irq, struct irte *entry)
 int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
 {
         struct ir_table *table = iommu->ir_table;
-        struct irq_2_iommu *irq_iommu;
+        struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
         u16 index, start_index;
         unsigned int mask = 0;
         unsigned long flags;
         int i;
 
-        if (!count)
-                return -1;
-
-#ifndef CONFIG_SPARSE_IRQ
-        /* protect irq_2_iommu_alloc later */
-        if (irq >= nr_irqs)
+        if (!count || !irq_iommu)
                 return -1;
-#endif
 
         /*
          * start the IRTE search from index 0.
@@ -214,13 +123,6 @@ int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
         for (i = index; i < index + count; i++)
                 table->base[i].present = 1;
 
-        irq_iommu = irq_2_iommu_alloc(irq);
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-                printk(KERN_ERR "can't allocate irq_2_iommu\n");
-                return -1;
-        }
-
         irq_iommu->iommu = iommu;
         irq_iommu->irte_index =  index;
         irq_iommu->sub_handle = 0;
@@ -244,17 +146,14 @@ static int qi_flush_iec(struct intel_iommu *iommu, int index, int mask)
 
 int map_irq_to_irte_handle(int irq, u16 *sub_handle)
 {
-        int index;
-        struct irq_2_iommu *irq_iommu;
+        struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
         unsigned long flags;
+        int index;
 
-        spin_lock_irqsave(&irq_2_ir_lock, flags);
-        irq_iommu = valid_irq_2_iommu(irq);
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+        if (!irq_iommu)
                 return -1;
-        }
 
+        spin_lock_irqsave(&irq_2_ir_lock, flags);
         *sub_handle = irq_iommu->sub_handle;
         index = irq_iommu->irte_index;
         spin_unlock_irqrestore(&irq_2_ir_lock, flags);
@@ -263,18 +162,13 @@ int map_irq_to_irte_handle(int irq, u16 *sub_handle)
 
 int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
 {
-        struct irq_2_iommu *irq_iommu;
+        struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
         unsigned long flags;
 
-        spin_lock_irqsave(&irq_2_ir_lock, flags);
-
-        irq_iommu = irq_2_iommu_alloc(irq);
-
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-                printk(KERN_ERR "can't allocate irq_2_iommu\n");
+        if (!irq_iommu)
                 return -1;
-        }
+
+        spin_lock_irqsave(&irq_2_ir_lock, flags);
 
         irq_iommu->iommu = iommu;
         irq_iommu->irte_index = index;
@@ -286,43 +180,18 @@ int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
         return 0;
 }
 
-int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index)
-{
-        struct irq_2_iommu *irq_iommu;
-        unsigned long flags;
-
-        spin_lock_irqsave(&irq_2_ir_lock, flags);
-        irq_iommu = valid_irq_2_iommu(irq);
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-                return -1;
-        }
-
-        irq_iommu->iommu = NULL;
-        irq_iommu->irte_index = 0;
-        irq_iommu->sub_handle = 0;
-        irq_2_iommu(irq)->irte_mask = 0;
-
-        spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-
-        return 0;
-}
-
 int modify_irte(int irq, struct irte *irte_modified)
 {
-        int rc;
-        int index;
-        struct irte *irte;
+        struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
         struct intel_iommu *iommu;
-        struct irq_2_iommu *irq_iommu;
         unsigned long flags;
+        struct irte *irte;
+        int rc, index;
 
-        spin_lock_irqsave(&irq_2_ir_lock, flags);
-        irq_iommu = valid_irq_2_iommu(irq);
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+        if (!irq_iommu)
                 return -1;
-        }
+
+        spin_lock_irqsave(&irq_2_ir_lock, flags);
 
         iommu = irq_iommu->iommu;
 
@@ -339,31 +208,6 @@ int modify_irte(int irq, struct irte *irte_modified)
         return rc;
 }
 
-int flush_irte(int irq)
-{
-        int rc;
-        int index;
-        struct intel_iommu *iommu;
-        struct irq_2_iommu *irq_iommu;
-        unsigned long flags;
-
-        spin_lock_irqsave(&irq_2_ir_lock, flags);
-        irq_iommu = valid_irq_2_iommu(irq);
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-                return -1;
-        }
-
-        iommu = irq_iommu->iommu;
-
-        index = irq_iommu->irte_index + irq_iommu->sub_handle;
-
-        rc = qi_flush_iec(iommu, index, irq_iommu->irte_mask);
-        spin_unlock_irqrestore(&irq_2_ir_lock, flags);
-
-        return rc;
-}
-
 struct intel_iommu *map_hpet_to_ir(u8 hpet_id)
 {
         int i;
@@ -420,16 +264,14 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)
 
 int free_irte(int irq)
 {
-        int rc = 0;
-        struct irq_2_iommu *irq_iommu;
+        struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
         unsigned long flags;
+        int rc;
 
-        spin_lock_irqsave(&irq_2_ir_lock, flags);
-        irq_iommu = valid_irq_2_iommu(irq);
-        if (!irq_iommu) {
-                spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+        if (!irq_iommu)
                 return -1;
-        }
+
+        spin_lock_irqsave(&irq_2_ir_lock, flags);
 
         rc = clear_entries(irq_iommu);
 
@@ -447,7 +289,7 @@ int free_irte(int irq)
  * source validation type
  */
 #define SVT_NO_VERIFY           0x0  /* no verification is required */
-#define SVT_VERIFY_SID_SQ       0x1  /* verify using SID and SQ fiels */
+#define SVT_VERIFY_SID_SQ       0x1  /* verify using SID and SQ fields */
 #define SVT_VERIFY_BUS          0x2  /* verify bus of request-id */
 
 /*
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 553d8ee55c1c..42fae4776515 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -13,6 +13,7 @@
 #include <linux/mutex.h>
 #include <linux/string.h>
 #include <linux/delay.h>
+#include <linux/pci-ats.h>
 #include "pci.h"
 
 #define VIRTFN_ID_LEN   16
diff --git a/drivers/pci/iova.c b/drivers/pci/iova.c
index 7914951ef29a..c5c274ab5c5a 100644
--- a/drivers/pci/iova.c
+++ b/drivers/pci/iova.c
@@ -63,8 +63,16 @@ __cached_rbnode_delete_update(struct iova_domain *iovad, struct iova *free)
         curr = iovad->cached32_node;
         cached_iova = container_of(curr, struct iova, node);
 
-        if (free->pfn_lo >= cached_iova->pfn_lo)
-                iovad->cached32_node = rb_next(&free->node);
+        if (free->pfn_lo >= cached_iova->pfn_lo) {
+                struct rb_node *node = rb_next(&free->node);
+                struct iova *iova = container_of(node, struct iova, node);
+
+                /* only cache if it's below 32bit pfn */
+                if (node && iova->pfn_lo < iovad->dma_32bit_pfn)
+                        iovad->cached32_node = node;
+                else
+                        iovad->cached32_node = NULL;
+        }
 }
 
 /* Computes the padding size required, to make the
@@ -391,7 +399,7 @@ reserve_iova(struct iova_domain *iovad,
                                 break;
         }
 
-        /* We are here either becasue this is the first reserver node
+        /* We are here either because this is the first reserver node
          * or need to insert remaining non overlap addr range
          */
         iova = __insert_new_range(iovad, pfn_lo, pfn_hi);
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 69b7be33b3a2..2f10328bf661 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -35,7 +35,12 @@ int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
 #endif
 
 #ifndef arch_setup_msi_irqs
-int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+# define arch_setup_msi_irqs default_setup_msi_irqs
+# define HAVE_DEFAULT_MSI_SETUP_IRQS
+#endif
+
+#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
+int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 {
         struct msi_desc *entry;
         int ret;
@@ -60,7 +65,12 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 #endif
 
 #ifndef arch_teardown_msi_irqs
-void arch_teardown_msi_irqs(struct pci_dev *dev)
+# define arch_teardown_msi_irqs default_teardown_msi_irqs
+# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
+#endif
+
+#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
+void default_teardown_msi_irqs(struct pci_dev *dev)
 {
         struct msi_desc *entry;
 
@@ -158,8 +168,9 @@ static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
         u32 mask_bits = desc->masked;
         unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
                                                 PCI_MSIX_ENTRY_VECTOR_CTRL;
-        mask_bits &= ~1;
-        mask_bits |= flag;
+        mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
+        if (flag)
+                mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
         writel(mask_bits, desc->mask_base + offset);
 
         return mask_bits;
@@ -170,33 +181,31 @@ static void msix_mask_irq(struct msi_desc *desc, u32 flag)
         desc->masked = __msix_mask_irq(desc, flag);
 }
 
-static void msi_set_mask_bit(unsigned irq, u32 flag)
+static void msi_set_mask_bit(struct irq_data *data, u32 flag)
 {
-        struct msi_desc *desc = get_irq_msi(irq);
+        struct msi_desc *desc = irq_data_get_msi(data);
 
         if (desc->msi_attrib.is_msix) {
                 msix_mask_irq(desc, flag);
                 readl(desc->mask_base);         /* Flush write to device */
         } else {
-                unsigned offset = irq - desc->dev->irq;
+                unsigned offset = data->irq - desc->dev->irq;
                 msi_mask_irq(desc, 1 << offset, flag << offset);
         }
 }
 
-void mask_msi_irq(unsigned int irq)
+void mask_msi_irq(struct irq_data *data)
 {
-        msi_set_mask_bit(irq, 1);
+        msi_set_mask_bit(data, 1);
 }
 
-void unmask_msi_irq(unsigned int irq)
+void unmask_msi_irq(struct irq_data *data)
 {
-        msi_set_mask_bit(irq, 0);
+        msi_set_mask_bit(data, 0);
 }
 
-void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
+void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 {
-        struct msi_desc *entry = get_irq_desc_msi(desc);
-
         BUG_ON(entry->dev->current_state != PCI_D0);
 
         if (entry->msi_attrib.is_msix) {
@@ -227,15 +236,13 @@ void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
 
 void read_msi_msg(unsigned int irq, struct msi_msg *msg)
 {
-        struct irq_desc *desc = irq_to_desc(irq);
+        struct msi_desc *entry = irq_get_msi_desc(irq);
 
-        read_msi_msg_desc(desc, msg);
+        __read_msi_msg(entry, msg);
 }
 
-void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
+void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 {
-        struct msi_desc *entry = get_irq_desc_msi(desc);
-
         /* Assert that the cache is valid, assuming that
          * valid messages are not all-zeroes. */
         BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
@@ -246,15 +253,13 @@ void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
 
 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
 {
-        struct irq_desc *desc = irq_to_desc(irq);
+        struct msi_desc *entry = irq_get_msi_desc(irq);
 
-        get_cached_msi_msg_desc(desc, msg);
+        __get_cached_msi_msg(entry, msg);
 }
 
-void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
+void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
 {
-        struct msi_desc *entry = get_irq_desc_msi(desc);
-
         if (entry->dev->current_state != PCI_D0) {
                 /* Don't touch the hardware now */
         } else if (entry->msi_attrib.is_msix) {
@@ -292,9 +297,9 @@ void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
 
 void write_msi_msg(unsigned int irq, struct msi_msg *msg)
 {
-        struct irq_desc *desc = irq_to_desc(irq);
+        struct msi_desc *entry = irq_get_msi_desc(irq);
 
-        write_msi_msg_desc(desc, msg);
+        __write_msi_msg(entry, msg);
 }
 
 static void free_msi_irqs(struct pci_dev *dev)
@@ -349,7 +354,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
         if (!dev->msi_enabled)
                 return;
 
-        entry = get_irq_msi(dev->irq);
+        entry = irq_get_msi_desc(dev->irq);
         pos = entry->msi_attrib.pos;
 
         pci_intx_for_msi(dev, 0);
@@ -514,7 +519,7 @@ static void msix_program_entries(struct pci_dev *dev,
                                                 PCI_MSIX_ENTRY_VECTOR_CTRL;
 
                 entries[i].vector = entry->irq;
-                set_irq_msi(entry->irq, entry);
+                irq_set_msi_desc(entry->irq, entry);
                 entry->masked = readl(entry->mask_base + offset);
                 msix_mask_irq(entry, 1);
                 i++;
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index de27c1cb5a2b..65c42f80f23e 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -6,12 +6,6 @@
 #ifndef MSI_H
 #define MSI_H
 
-#define PCI_MSIX_ENTRY_SIZE             16
-#define  PCI_MSIX_ENTRY_LOWER_ADDR      0
-#define  PCI_MSIX_ENTRY_UPPER_ADDR      4
-#define  PCI_MSIX_ENTRY_DATA            8
-#define  PCI_MSIX_ENTRY_VECTOR_CTRL     12
-
 #define msi_control_reg(base)           (base + PCI_MSI_FLAGS)
 #define msi_lower_address_reg(base)     (base + PCI_MSI_ADDRESS_LO)
 #define msi_upper_address_reg(base)     (base + PCI_MSI_ADDRESS_HI)
@@ -22,8 +16,8 @@
 #define is_64bit_address(control)       (!!(control & PCI_MSI_FLAGS_64BIT))
 #define is_mask_bit_support(control)    (!!(control & PCI_MSI_FLAGS_MASKBIT))
 
-#define msix_table_offset_reg(base)     (base + 0x04)
-#define msix_pba_offset_reg(base)       (base + 0x08)
+#define msix_table_offset_reg(base)     (base + PCI_MSIX_TABLE)
+#define msix_pba_offset_reg(base)       (base + PCI_MSIX_PBA)
 #define msix_table_size(control)        ((control & PCI_MSIX_FLAGS_QSIZE)+1)
 #define multi_msix_capable(control)     msix_table_size((control))
 
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 24e19c594e57..d36f41ea8cbf 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -46,9 +46,9 @@ static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context)
         struct pci_dev *pci_dev = context;
 
         if (event == ACPI_NOTIFY_DEVICE_WAKE && pci_dev) {
+                pci_wakeup_event(pci_dev);
                 pci_check_pme_status(pci_dev);
                 pm_runtime_resume(&pci_dev->dev);
-                pci_wakeup_event(pci_dev);
                 if (pci_dev->subordinate)
                         pci_pme_wakeup_bus(pci_dev->subordinate);
         }
@@ -195,6 +195,8 @@ static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)
                 return PCI_D2;
         case ACPI_STATE_D3:
                 return PCI_D3hot;
+        case ACPI_STATE_D3_COLD:
+                return PCI_D3cold;
         }
         return PCI_POWER_ERROR;
 }
@@ -293,19 +295,11 @@ static int acpi_dev_run_wake(struct device *phys_dev, bool enable)
         }
 
         if (enable) {
-                if (!dev->wakeup.run_wake_count++) {
-                        acpi_enable_wakeup_device_power(dev, ACPI_STATE_S0);
-                        acpi_enable_gpe(dev->wakeup.gpe_device,
-                                        dev->wakeup.gpe_number);
-                }
-        } else if (dev->wakeup.run_wake_count > 0) {
-                if (!--dev->wakeup.run_wake_count) {
-                        acpi_disable_gpe(dev->wakeup.gpe_device,
-                                         dev->wakeup.gpe_number);
-                        acpi_disable_wakeup_device_power(dev);
-                }
+                acpi_enable_wakeup_device_power(dev, ACPI_STATE_S0);
+                acpi_enable_gpe(dev->wakeup.gpe_device, dev->wakeup.gpe_number);
         } else {
-                error = -EALREADY;
+                acpi_disable_gpe(dev->wakeup.gpe_device, dev->wakeup.gpe_number);
+                acpi_disable_wakeup_device_power(dev);
         }
 
         return error;
@@ -399,6 +393,7 @@ static int __init acpi_pci_init(void)
 
         if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
                 printk(KERN_INFO"ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
+                pcie_clear_aspm();
                 pcie_no_aspm();
         }
 
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 8a6f797de8e5..46767c53917a 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -338,7 +338,7 @@ static int pci_call_probe(struct pci_driver *drv, struct pci_dev *dev,
 }
 
 /**
- * __pci_device_probe()
+ * __pci_device_probe - check if a driver wants to claim a specific PCI device
  * @drv: driver to call to check if it wants the PCI device
  * @pci_dev: PCI device being probed
  * 
@@ -431,7 +431,7 @@ static void pci_device_shutdown(struct device *dev)
         pci_msix_shutdown(pci_dev);
 }
 
-#ifdef CONFIG_PM_OPS
+#ifdef CONFIG_PM
 
 /* Auxiliary functions used for system resume and run-time resume. */
 
@@ -449,7 +449,8 @@ static int pci_restore_standard_config(struct pci_dev *pci_dev)
                         return error;
         }
 
-        return pci_restore_state(pci_dev);
+        pci_restore_state(pci_dev);
+        return 0;
 }
 
 static void pci_pm_default_resume_early(struct pci_dev *pci_dev)
@@ -623,7 +624,7 @@ static int pci_pm_prepare(struct device *dev)
          * system from the sleep state, we'll have to prevent it from signaling
          * wake-up.
          */
-        pm_runtime_resume(dev);
+        pm_runtime_get_sync(dev);
 
         if (drv && drv->pm && drv->pm->prepare)
                 error = drv->pm->prepare(dev);
@@ -637,6 +638,8 @@ static void pci_pm_complete(struct device *dev)
 
         if (drv && drv->pm && drv->pm->complete)
                 drv->pm->complete(dev);
+
+        pm_runtime_put_sync(dev);
 }
 
 #else /* !CONFIG_PM_SLEEP */
@@ -780,7 +783,7 @@ static int pci_pm_resume(struct device *dev)
 
 #endif /* !CONFIG_SUSPEND */
 
-#ifdef CONFIG_HIBERNATION
+#ifdef CONFIG_HIBERNATE_CALLBACKS
 
 static int pci_pm_freeze(struct device *dev)
 {
@@ -969,7 +972,7 @@ static int pci_pm_restore(struct device *dev)
         return error;
 }
 
-#else /* !CONFIG_HIBERNATION */
+#else /* !CONFIG_HIBERNATE_CALLBACKS */
 
 #define pci_pm_freeze           NULL
 #define pci_pm_freeze_noirq     NULL
@@ -980,7 +983,7 @@ static int pci_pm_restore(struct device *dev)
 #define pci_pm_restore          NULL
 #define pci_pm_restore_noirq    NULL
 
-#endif /* !CONFIG_HIBERNATION */
+#endif /* !CONFIG_HIBERNATE_CALLBACKS */
 
 #ifdef CONFIG_PM_RUNTIME
 
@@ -1058,7 +1061,7 @@ static int pci_pm_runtime_idle(struct device *dev)
 
 #endif /* !CONFIG_PM_RUNTIME */
 
-#ifdef CONFIG_PM_OPS
+#ifdef CONFIG_PM
 
 const struct dev_pm_ops pci_dev_pm_ops = {
         .prepare = pci_pm_prepare,
diff --git a/drivers/pci/pci-label.c b/drivers/pci/pci-label.c
index 90c0a729cd3a..77cb2a14c896 100644
--- a/drivers/pci/pci-label.c
+++ b/drivers/pci/pci-label.c
@@ -5,6 +5,13 @@
  * by Narendra K <Narendra_K@dell.com>,
  * Jordan Hargrave <Jordan_Hargrave@dell.com>
  *
+ * PCI Firmware Specification Revision 3.1 section 4.6.7 (DSM for Naming a
+ * PCI or PCI Express Device Under Operating Systems) defines an instance
+ * number and string name. This code retrieves them and exports them to sysfs.
+ * If the system firmware does not provide the ACPI _DSM (Device Specific
+ * Method), then the SMBIOS type 41 instance number and string is exported to
+ * sysfs.
+ *
  * SMBIOS defines type 41 for onboard pci devices. This code retrieves
  * the instance number and string from the type 41 record and exports
  * it to sysfs.
@@ -19,8 +26,29 @@
 #include <linux/pci_ids.h>
 #include <linux/module.h>
 #include <linux/device.h>
+#include <linux/nls.h>
+#include <linux/acpi.h>
+#include <linux/pci-acpi.h>
+#include <acpi/acpi_bus.h>
 #include "pci.h"
 
+#define DEVICE_LABEL_DSM        0x07
+
+#ifndef CONFIG_DMI
+
+static inline int
+pci_create_smbiosname_file(struct pci_dev *pdev)
+{
+        return -1;
+}
+
+static inline void
+pci_remove_smbiosname_file(struct pci_dev *pdev)
+{
+}
+
+#else
+
 enum smbios_attr_enum {
         SMBIOS_ATTR_NONE = 0,
         SMBIOS_ATTR_LABEL_SHOW,
@@ -120,9 +148,7 @@ static struct attribute_group smbios_attr_group = {
 static int
 pci_create_smbiosname_file(struct pci_dev *pdev)
 {
-        if (!sysfs_create_group(&pdev->dev.kobj, &smbios_attr_group))
-                return 0;
-        return -ENODEV;
+        return sysfs_create_group(&pdev->dev.kobj, &smbios_attr_group);
 }
 
 static void
@@ -131,13 +157,227 @@ pci_remove_smbiosname_file(struct pci_dev *pdev)
         sysfs_remove_group(&pdev->dev.kobj, &smbios_attr_group);
 }
 
+#endif
+
+#ifndef CONFIG_ACPI
+
+static inline int
+pci_create_acpi_index_label_files(struct pci_dev *pdev)
+{
+        return -1;
+}
+
+static inline int
+pci_remove_acpi_index_label_files(struct pci_dev *pdev)
+{
+        return -1;
+}
+
+static inline bool
+device_has_dsm(struct device *dev)
+{
+        return false;
+}
+
+#else
+
+static const char device_label_dsm_uuid[] = {
+        0xD0, 0x37, 0xC9, 0xE5, 0x53, 0x35, 0x7A, 0x4D,
+        0x91, 0x17, 0xEA, 0x4D, 0x19, 0xC3, 0x43, 0x4D
+};
+
+enum acpi_attr_enum {
+        ACPI_ATTR_NONE = 0,
+        ACPI_ATTR_LABEL_SHOW,
+        ACPI_ATTR_INDEX_SHOW,
+};
+
+static void dsm_label_utf16s_to_utf8s(union acpi_object *obj, char *buf)
+{
+        int len;
+        len = utf16s_to_utf8s((const wchar_t *)obj->
+                              package.elements[1].string.pointer,
+                              obj->package.elements[1].string.length,
+                              UTF16_LITTLE_ENDIAN,
+                              buf, PAGE_SIZE);
+        buf[len] = '\n';
+}
+
+static int
+dsm_get_label(acpi_handle handle, int func,
+              struct acpi_buffer *output,
+              char *buf, enum acpi_attr_enum attribute)
+{
+        struct acpi_object_list input;
+        union acpi_object params[4];
+        union acpi_object *obj;
+        int len = 0;
+
+        int err;
+
+        input.count = 4;
+        input.pointer = params;
+        params[0].type = ACPI_TYPE_BUFFER;
+        params[0].buffer.length = sizeof(device_label_dsm_uuid);
+        params[0].buffer.pointer = (char *)device_label_dsm_uuid;
+        params[1].type = ACPI_TYPE_INTEGER;
+        params[1].integer.value = 0x02;
+        params[2].type = ACPI_TYPE_INTEGER;
+        params[2].integer.value = func;
+        params[3].type = ACPI_TYPE_PACKAGE;
+        params[3].package.count = 0;
+        params[3].package.elements = NULL;
+
+        err = acpi_evaluate_object(handle, "_DSM", &input, output);
+        if (err)
+                return -1;
+
+        obj = (union acpi_object *)output->pointer;
+
+        switch (obj->type) {
+        case ACPI_TYPE_PACKAGE:
+                if (obj->package.count != 2)
+                        break;
+                len = obj->package.elements[0].integer.value;
+                if (buf) {
+                        if (attribute == ACPI_ATTR_INDEX_SHOW)
+                                scnprintf(buf, PAGE_SIZE, "%llu\n",
+                                obj->package.elements[0].integer.value);
+                        else if (attribute == ACPI_ATTR_LABEL_SHOW)
+                                dsm_label_utf16s_to_utf8s(obj, buf);
+                        kfree(output->pointer);
+                        return strlen(buf);
+                }
+                kfree(output->pointer);
+                return len;
+        break;
+        default:
+                kfree(output->pointer);
+        }
+        return -1;
+}
+
+static bool
+device_has_dsm(struct device *dev)
+{
+        acpi_handle handle;
+        struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
+
+        handle = DEVICE_ACPI_HANDLE(dev);
+
+        if (!handle)
+                return FALSE;
+
+        if (dsm_get_label(handle, DEVICE_LABEL_DSM, &output, NULL,
+                          ACPI_ATTR_NONE) > 0)
+                return TRUE;
+
+        return FALSE;
+}
+
+static mode_t
+acpi_index_string_exist(struct kobject *kobj, struct attribute *attr, int n)
+{
+        struct device *dev;
+
+        dev = container_of(kobj, struct device, kobj);
+
+        if (device_has_dsm(dev))
+                return S_IRUGO;
+
+        return 0;
+}
+
+static ssize_t
+acpilabel_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+        struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
+        acpi_handle handle;
+        int length;
+
+        handle = DEVICE_ACPI_HANDLE(dev);
+
+        if (!handle)
+                return -1;
+
+        length = dsm_get_label(handle, DEVICE_LABEL_DSM,
+                               &output, buf, ACPI_ATTR_LABEL_SHOW);
+
+        if (length < 1)
+                return -1;
+
+        return length;
+}
+
+static ssize_t
+acpiindex_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+        struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
+        acpi_handle handle;
+        int length;
+
+        handle = DEVICE_ACPI_HANDLE(dev);
+
+        if (!handle)
+                return -1;
+
+        length = dsm_get_label(handle, DEVICE_LABEL_DSM,
+                               &output, buf, ACPI_ATTR_INDEX_SHOW);
+
+        if (length < 0)
+                return -1;
+
+        return length;
+
+}
+
+static struct device_attribute acpi_attr_label = {
+        .attr = {.name = "label", .mode = 0444},
+        .show = acpilabel_show,
+};
+
+static struct device_attribute acpi_attr_index = {
+        .attr = {.name = "acpi_index", .mode = 0444},
+        .show = acpiindex_show,
+};
+
+static struct attribute *acpi_attributes[] = {
+        &acpi_attr_label.attr,
+        &acpi_attr_index.attr,
+        NULL,
+};
+
+static struct attribute_group acpi_attr_group = {
+        .attrs = acpi_attributes,
+        .is_visible = acpi_index_string_exist,
+};
+
+static int
+pci_create_acpi_index_label_files(struct pci_dev *pdev)
+{
+        return sysfs_create_group(&pdev->dev.kobj, &acpi_attr_group);
+}
+
+static int
+pci_remove_acpi_index_label_files(struct pci_dev *pdev)
+{
+        sysfs_remove_group(&pdev->dev.kobj, &acpi_attr_group);
+        return 0;
+}
+#endif
+
 void pci_create_firmware_label_files(struct pci_dev *pdev)
 {
-        if (!pci_create_smbiosname_file(pdev))
-                ;
+        if (device_has_dsm(&pdev->dev))
+                pci_create_acpi_index_label_files(pdev);
+        else
+                pci_create_smbiosname_file(pdev);
 }
 
 void pci_remove_firmware_label_files(struct pci_dev *pdev)
 {
-        pci_remove_smbiosname_file(pdev);
+        if (device_has_dsm(&pdev->dev))
+                pci_remove_acpi_index_label_files(pdev);
+        else
+                pci_remove_smbiosname_file(pdev);
 }
diff --git a/drivers/pci/pci-stub.c b/drivers/pci/pci-stub.c
index f7b68ca6cc98..775e933c2225 100644
--- a/drivers/pci/pci-stub.c
+++ b/drivers/pci/pci-stub.c
@@ -47,6 +47,10 @@ static int __init pci_stub_init(void)
         if (rc)
                 return rc;
 
+        /* no ids passed actually */
+        if (ids[0] == '\0')
+                return 0;
+
         /* add ids specified in the module parameter */
         p = ids;
         while ((id = strsep(&p, ","))) {
@@ -54,6 +58,9 @@ static int __init pci_stub_init(void)
                         subdevice = PCI_ANY_ID, class=0, class_mask=0;
                 int fields;
 
+                if (!strlen(id))
+                        continue;
+
                 fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
                                 &vendor, &device, &subvendor, &subdevice,
                                 &class, &class_mask);
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index b5a7d9bfcb24..7bcf12adced7 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -23,6 +23,7 @@
 #include <linux/mm.h>
 #include <linux/fs.h>
 #include <linux/capability.h>
+#include <linux/security.h>
 #include <linux/pci-aspm.h>
 #include <linux/slab.h>
 #include "pci.h"
@@ -107,6 +108,40 @@ static ssize_t local_cpulist_show(struct device *dev,
         return len;
 }
 
+/*
+ * PCI Bus Class Devices
+ */
+static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
+                                        int type,
+                                        struct device_attribute *attr,
+                                        char *buf)
+{
+        int ret;
+        const struct cpumask *cpumask;
+
+        cpumask = cpumask_of_pcibus(to_pci_bus(dev));
+        ret = type ?
+                cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
+                cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
+        buf[ret++] = '\n';
+        buf[ret] = '\0';
+        return ret;
+}
+
+static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
+                                        struct device_attribute *attr,
+                                        char *buf)
+{
+        return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
+}
+
+static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
+                                        struct device_attribute *attr,
+                                        char *buf)
+{
+        return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
+}
+
 /* show resources */
 static ssize_t
 resource_show(struct device * dev, struct device_attribute *attr, char * buf)
@@ -317,6 +352,25 @@ remove_store(struct device *dev, struct device_attribute *dummy,
                 count = ret;
         return count;
 }
+
+static ssize_t
+dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
+                 const char *buf, size_t count)
+{
+        unsigned long val;
+        struct pci_bus *bus = to_pci_bus(dev);
+
+        if (strict_strtoul(buf, 0, &val) < 0)
+                return -EINVAL;
+
+        if (val) {
+                mutex_lock(&pci_remove_rescan_mutex);
+                pci_rescan_bus(bus);
+                mutex_unlock(&pci_remove_rescan_mutex);
+        }
+        return count;
+}
+
 #endif
 
 struct device_attribute pci_dev_attrs[] = {
@@ -346,6 +400,15 @@ struct device_attribute pci_dev_attrs[] = {
         __ATTR_NULL,
 };
 
+struct device_attribute pcibus_dev_attrs[] = {
+#ifdef CONFIG_HOTPLUG
+        __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
+#endif
+        __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
+        __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
+        __ATTR_NULL,
+};
+
 static ssize_t
 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -368,7 +431,7 @@ pci_read_config(struct file *filp, struct kobject *kobj,
         u8 *data = (u8*) buf;
 
         /* Several chips lock up trying to read undefined config space */
-        if (cap_raised(filp->f_cred->cap_effective, CAP_SYS_ADMIN)) {
+        if (security_capable(&init_user_ns, filp->f_cred, CAP_SYS_ADMIN) == 0) {
                 size = dev->cfg_size;
         } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
                 size = 128;
@@ -644,7 +707,7 @@ pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  * a per-bus basis.  This routine creates the files and ties them into
  * their associated read, write and mmap files from pci-sysfs.c
  *
- * On error unwind, but don't propogate the error to the caller
+ * On error unwind, but don't propagate the error to the caller
  * as it is ok to set up the PCI bus without these files.
  */
 void pci_create_legacy_files(struct pci_bus *b)
@@ -705,17 +768,21 @@ void pci_remove_legacy_files(struct pci_bus *b)
 
 #ifdef HAVE_PCI_MMAP
 
-int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
+int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
+                  enum pci_mmap_api mmap_api)
 {
-        unsigned long nr, start, size;
+        unsigned long nr, start, size, pci_start;
 
+        if (pci_resource_len(pdev, resno) == 0)
+                return 0;
         nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
         start = vma->vm_pgoff;
         size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
-        if (start < size && size - start >= nr)
+        pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
+                        pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
+        if (start >= pci_start && start < pci_start + size &&
+                        start + nr <= pci_start + size)
                 return 1;
-        WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
-                current->comm, start, start+nr, pci_name(pdev), resno, size);
         return 0;
 }
 
@@ -745,8 +812,15 @@ pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
         if (i >= PCI_ROM_RESOURCE)
                 return -ENODEV;
 
-        if (!pci_mmap_fits(pdev, i, vma))
+        if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
+                WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
+                        "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
+                        current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
+                        pci_name(pdev), i,
+                        (u64)pci_resource_start(pdev, i),
+                        (u64)pci_resource_len(pdev, i));
                 return -EINVAL;
+        }
 
         /* pci_mmap_page_range() expects the same kind of entry as coming
          * from /proc/bus/pci/ which is a "user visible" value. If this is
@@ -1076,7 +1150,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev)
                 attr->write = write_vpd_attr;
                 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
                 if (retval) {
-                        kfree(dev->vpd->attr);
+                        kfree(attr);
                         return retval;
                 }
                 dev->vpd->attr = attr;
@@ -1138,7 +1212,7 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
                 sysfs_bin_attr_init(attr);
                 attr->size = rom_size;
                 attr->attr.name = "rom";
-                attr->attr.mode = S_IRUSR;
+                attr->attr.mode = S_IRUSR | S_IWUSR;
                 attr->read = pci_read_rom;
                 attr->write = pci_write_rom;
                 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7fa3cbd742c5..692671b11667 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -38,6 +38,19 @@ EXPORT_SYMBOL(pci_pci_problems);
 
 unsigned int pci_pm_d3_delay;
 
+static void pci_pme_list_scan(struct work_struct *work);
+
+static LIST_HEAD(pci_pme_list);
+static DEFINE_MUTEX(pci_pme_list_mutex);
+static DECLARE_DELAYED_WORK(pci_pme_work, pci_pme_list_scan);
+
+struct pci_pme_device {
+        struct list_head list;
+        struct pci_dev *dev;
+};
+
+#define PME_TIMEOUT 1000 /* How long between PME checks */
+
 static void pci_dev_d3_sleep(struct pci_dev *dev)
 {
         unsigned int delay = dev->d3_delay;
@@ -727,6 +740,12 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
 
         if (!__pci_complete_power_transition(dev, state))
                 error = 0;
+        /*
+         * When aspm_policy is "powersave" this call ensures
+         * that ASPM is configured.
+         */
+        if (!error && dev->bus->self)
+                pcie_aspm_powersave_config_link(dev->bus->self);
 
         return error;
 }
@@ -811,7 +830,7 @@ static int pci_save_pcie_state(struct pci_dev *dev)
                 dev_err(&dev->dev, "buffer not found in %s\n", __func__);
                 return -ENOMEM;
         }
-        cap = (u16 *)&save_state->data[0];
+        cap = (u16 *)&save_state->cap.data[0];
 
         pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
 
@@ -844,7 +863,7 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
         pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
         if (!save_state || pos <= 0)
                 return;
-        cap = (u16 *)&save_state->data[0];
+        cap = (u16 *)&save_state->cap.data[0];
 
         pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
 
@@ -880,7 +899,8 @@ static int pci_save_pcix_state(struct pci_dev *dev)
                 return -ENOMEM;
         }
 
-        pci_read_config_word(dev, pos + PCI_X_CMD, (u16 *)save_state->data);
+        pci_read_config_word(dev, pos + PCI_X_CMD,
+                             (u16 *)save_state->cap.data);
 
         return 0;
 }
@@ -895,7 +915,7 @@ static void pci_restore_pcix_state(struct pci_dev *dev)
         pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
         if (!save_state || pos <= 0)
                 return;
-        cap = (u16 *)&save_state->data[0];
+        cap = (u16 *)&save_state->cap.data[0];
 
         pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]);
 }
@@ -924,14 +944,13 @@ pci_save_state(struct pci_dev *dev)
  * pci_restore_state - Restore the saved state of a PCI device
  * @dev: - PCI device that we're dealing with
  */
-int 
-pci_restore_state(struct pci_dev *dev)
+void pci_restore_state(struct pci_dev *dev)
 {
         int i;
         u32 val;
 
         if (!dev->state_saved)
-                return 0;
+                return;
 
         /* PCI Express register must be restored first */
         pci_restore_pcie_state(dev);
@@ -955,9 +974,105 @@ pci_restore_state(struct pci_dev *dev)
         pci_restore_iov_state(dev);
 
         dev->state_saved = false;
+}
+
+struct pci_saved_state {
+        u32 config_space[16];
+        struct pci_cap_saved_data cap[0];
+};
+
+/**
+ * pci_store_saved_state - Allocate and return an opaque struct containing
+ *                         the device saved state.
+ * @dev: PCI device that we're dealing with
+ *
+ * Rerturn NULL if no state or error.
+ */
+struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev)
+{
+        struct pci_saved_state *state;
+        struct pci_cap_saved_state *tmp;
+        struct pci_cap_saved_data *cap;
+        struct hlist_node *pos;
+        size_t size;
+
+        if (!dev->state_saved)
+                return NULL;
+
+        size = sizeof(*state) + sizeof(struct pci_cap_saved_data);
+
+        hlist_for_each_entry(tmp, pos, &dev->saved_cap_space, next)
+                size += sizeof(struct pci_cap_saved_data) + tmp->cap.size;
+
+        state = kzalloc(size, GFP_KERNEL);
+        if (!state)
+                return NULL;
+
+        memcpy(state->config_space, dev->saved_config_space,
+               sizeof(state->config_space));
+
+        cap = state->cap;
+        hlist_for_each_entry(tmp, pos, &dev->saved_cap_space, next) {
+                size_t len = sizeof(struct pci_cap_saved_data) + tmp->cap.size;
+                memcpy(cap, &tmp->cap, len);
+                cap = (struct pci_cap_saved_data *)((u8 *)cap + len);
+        }
+        /* Empty cap_save terminates list */
+
+        return state;
+}
+EXPORT_SYMBOL_GPL(pci_store_saved_state);
+
+/**
+ * pci_load_saved_state - Reload the provided save state into struct pci_dev.
+ * @dev: PCI device that we're dealing with
+ * @state: Saved state returned from pci_store_saved_state()
+ */
+int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state)
+{
+        struct pci_cap_saved_data *cap;
+
+        dev->state_saved = false;
+
+        if (!state)
+                return 0;
+
+        memcpy(dev->saved_config_space, state->config_space,
+               sizeof(state->config_space));
+
+        cap = state->cap;
+        while (cap->size) {
+                struct pci_cap_saved_state *tmp;
+
+                tmp = pci_find_saved_cap(dev, cap->cap_nr);
+                if (!tmp || tmp->cap.size != cap->size)
+                        return -EINVAL;
 
+                memcpy(tmp->cap.data, cap->data, tmp->cap.size);
+                cap = (struct pci_cap_saved_data *)((u8 *)cap +
+                       sizeof(struct pci_cap_saved_data) + cap->size);
+        }
+
+        dev->state_saved = true;
         return 0;
 }
+EXPORT_SYMBOL_GPL(pci_load_saved_state);
+
+/**
+ * pci_load_and_free_saved_state - Reload the save state pointed to by state,
+ *                                 and free the memory allocated for it.
+ * @dev: PCI device that we're dealing with
+ * @state: Pointer to saved state returned from pci_store_saved_state()
+ */
+int pci_load_and_free_saved_state(struct pci_dev *dev,
+                                  struct pci_saved_state **state)
+{
+        int ret = pci_load_saved_state(dev, *state);
+        kfree(*state);
+        *state = NULL;
+        return ret;
+}
+EXPORT_SYMBOL_GPL(pci_load_and_free_saved_state);
 
 static int do_pci_enable_device(struct pci_dev *dev, int bars)
 {
@@ -994,6 +1109,18 @@ static int __pci_enable_device_flags(struct pci_dev *dev,
         int err;
         int i, bars = 0;
 
+        /*
+         * Power state could be unknown at this point, either due to a fresh
+         * boot or a device removal call.  So get the current power state
+         * so that things like MSI message writing will behave as expected
+         * (e.g. if the device really is in D0 at enable time).
+         */
+        if (dev->pm_cap) {
+                u16 pmcsr;
+                pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
+                dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
+        }
+
         if (atomic_add_return(1, &dev->enable_cnt) > 1)
                 return 0;               /* already enabled */
 
@@ -1275,22 +1402,6 @@ bool pci_check_pme_status(struct pci_dev *dev)
         return ret;
 }
 
-/*
- * Time to wait before the system can be put into a sleep state after reporting
- * a wakeup event signaled by a PCI device.
- */
-#define PCI_WAKEUP_COOLDOWN     100
-
-/**
- * pci_wakeup_event - Report a wakeup event related to a given PCI device.
- * @dev: Device to report the wakeup event for.
- */
-void pci_wakeup_event(struct pci_dev *dev)
-{
-        if (device_may_wakeup(&dev->dev))
-                pm_wakeup_event(&dev->dev, PCI_WAKEUP_COOLDOWN);
-}
-
 /**
  * pci_pme_wakeup - Wake up a PCI device if its PME Status bit is set.
  * @dev: Device to handle.
@@ -1302,8 +1413,8 @@ void pci_wakeup_event(struct pci_dev *dev)
 static int pci_pme_wakeup(struct pci_dev *dev, void *ign)
 {
         if (pci_check_pme_status(dev)) {
-                pm_request_resume(&dev->dev);
                 pci_wakeup_event(dev);
+                pm_request_resume(&dev->dev);
         }
         return 0;
 }
@@ -1331,6 +1442,32 @@ bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
         return !!(dev->pme_support & (1 << state));
 }
 
+static void pci_pme_list_scan(struct work_struct *work)
+{
+        struct pci_pme_device *pme_dev;
+
+        mutex_lock(&pci_pme_list_mutex);
+        if (!list_empty(&pci_pme_list)) {
+                list_for_each_entry(pme_dev, &pci_pme_list, list)
+                        pci_pme_wakeup(pme_dev->dev, NULL);
+                schedule_delayed_work(&pci_pme_work, msecs_to_jiffies(PME_TIMEOUT));
+        }
+        mutex_unlock(&pci_pme_list_mutex);
+}
+
+/**
+ * pci_external_pme - is a device an external PCI PME source?
+ * @dev: PCI device to check
+ *
+ */
+
+static bool pci_external_pme(struct pci_dev *dev)
+{
+        if (pci_is_pcie(dev) || dev->bus->number == 0)
+                return false;
+        return true;
+}
+
 /**
  * pci_pme_active - enable or disable PCI device's PME# function
  * @dev: PCI device to handle.
@@ -1354,6 +1491,44 @@ void pci_pme_active(struct pci_dev *dev, bool enable)
 
         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
 
+        /* PCI (as opposed to PCIe) PME requires that the device have
+           its PME# line hooked up correctly. Not all hardware vendors
+           do this, so the PME never gets delivered and the device
+           remains asleep. The easiest way around this is to
+           periodically walk the list of suspended devices and check
+           whether any have their PME flag set. The assumption is that
+           we'll wake up often enough anyway that this won't be a huge
+           hit, and the power savings from the devices will still be a
+           win. */
+
+        if (pci_external_pme(dev)) {
+                struct pci_pme_device *pme_dev;
+                if (enable) {
+                        pme_dev = kmalloc(sizeof(struct pci_pme_device),
+                                          GFP_KERNEL);
+                        if (!pme_dev)
+                                goto out;
+                        pme_dev->dev = dev;
+                        mutex_lock(&pci_pme_list_mutex);
+                        list_add(&pme_dev->list, &pci_pme_list);
+                        if (list_is_singular(&pci_pme_list))
+                                schedule_delayed_work(&pci_pme_work,
+                                                      msecs_to_jiffies(PME_TIMEOUT));
+                        mutex_unlock(&pci_pme_list_mutex);
+                } else {
+                        mutex_lock(&pci_pme_list_mutex);
+                        list_for_each_entry(pme_dev, &pci_pme_list, list) {
+                                if (pme_dev->dev == dev) {
+                                        list_del(&pme_dev->list);
+                                        kfree(pme_dev);
+                                        break;
+                                }
+                        }
+                        mutex_unlock(&pci_pme_list_mutex);
+                }
+        }
+
+out:
         dev_printk(KERN_DEBUG, &dev->dev, "PME# %s\n",
                         enable ? "enabled" : "disabled");
 }
@@ -1695,7 +1870,8 @@ static int pci_add_cap_save_buffer(
         if (!save_state)
                 return -ENOMEM;
 
-        save_state->cap_nr = cap;
+        save_state->cap.cap_nr = cap;
+        save_state->cap.size = size;
         pci_add_saved_cap(dev, save_state);
 
         return 0;
@@ -1758,6 +1934,300 @@ void pci_enable_ari(struct pci_dev *dev)
         bridge->ari_enabled = 1;
 }
 
+/**
+ * pci_enable_ido - enable ID-based ordering on a device
+ * @dev: the PCI device
+ * @type: which types of IDO to enable
+ *
+ * Enable ID-based ordering on @dev.  @type can contain the bits
+ * %PCI_EXP_IDO_REQUEST and/or %PCI_EXP_IDO_COMPLETION to indicate
+ * which types of transactions are allowed to be re-ordered.
+ */
+void pci_enable_ido(struct pci_dev *dev, unsigned long type)
+{
+        int pos;
+        u16 ctrl;
+
+        pos = pci_pcie_cap(dev);
+        if (!pos)
+                return;
+
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+        if (type & PCI_EXP_IDO_REQUEST)
+                ctrl |= PCI_EXP_IDO_REQ_EN;
+        if (type & PCI_EXP_IDO_COMPLETION)
+                ctrl |= PCI_EXP_IDO_CMP_EN;
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+}
+EXPORT_SYMBOL(pci_enable_ido);
+
+/**
+ * pci_disable_ido - disable ID-based ordering on a device
+ * @dev: the PCI device
+ * @type: which types of IDO to disable
+ */
+void pci_disable_ido(struct pci_dev *dev, unsigned long type)
+{
+        int pos;
+        u16 ctrl;
+
+        if (!pci_is_pcie(dev))
+                return;
+
+        pos = pci_pcie_cap(dev);
+        if (!pos)
+                return;
+
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+        if (type & PCI_EXP_IDO_REQUEST)
+                ctrl &= ~PCI_EXP_IDO_REQ_EN;
+        if (type & PCI_EXP_IDO_COMPLETION)
+                ctrl &= ~PCI_EXP_IDO_CMP_EN;
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+}
+EXPORT_SYMBOL(pci_disable_ido);
+
+/**
+ * pci_enable_obff - enable optimized buffer flush/fill
+ * @dev: PCI device
+ * @type: type of signaling to use
+ *
+ * Try to enable @type OBFF signaling on @dev.  It will try using WAKE#
+ * signaling if possible, falling back to message signaling only if
+ * WAKE# isn't supported.  @type should indicate whether the PCIe link
+ * be brought out of L0s or L1 to send the message.  It should be either
+ * %PCI_EXP_OBFF_SIGNAL_ALWAYS or %PCI_OBFF_SIGNAL_L0.
+ *
+ * If your device can benefit from receiving all messages, even at the
+ * power cost of bringing the link back up from a low power state, use
+ * %PCI_EXP_OBFF_SIGNAL_ALWAYS.  Otherwise, use %PCI_OBFF_SIGNAL_L0 (the
+ * preferred type).
+ *
+ * RETURNS:
+ * Zero on success, appropriate error number on failure.
+ */
+int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
+{
+        int pos;
+        u32 cap;
+        u16 ctrl;
+        int ret;
+
+        if (!pci_is_pcie(dev))
+                return -ENOTSUPP;
+
+        pos = pci_pcie_cap(dev);
+        if (!pos)
+                return -ENOTSUPP;
+
+        pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
+        if (!(cap & PCI_EXP_OBFF_MASK))
+                return -ENOTSUPP; /* no OBFF support at all */
+
+        /* Make sure the topology supports OBFF as well */
+        if (dev->bus) {
+                ret = pci_enable_obff(dev->bus->self, type);
+                if (ret)
+                        return ret;
+        }
+
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+        if (cap & PCI_EXP_OBFF_WAKE)
+                ctrl |= PCI_EXP_OBFF_WAKE_EN;
+        else {
+                switch (type) {
+                case PCI_EXP_OBFF_SIGNAL_L0:
+                        if (!(ctrl & PCI_EXP_OBFF_WAKE_EN))
+                                ctrl |= PCI_EXP_OBFF_MSGA_EN;
+                        break;
+                case PCI_EXP_OBFF_SIGNAL_ALWAYS:
+                        ctrl &= ~PCI_EXP_OBFF_WAKE_EN;
+                        ctrl |= PCI_EXP_OBFF_MSGB_EN;
+                        break;
+                default:
+                        WARN(1, "bad OBFF signal type\n");
+                        return -ENOTSUPP;
+                }
+        }
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+
+        return 0;
+}
+EXPORT_SYMBOL(pci_enable_obff);
+
+/**
+ * pci_disable_obff - disable optimized buffer flush/fill
+ * @dev: PCI device
+ *
+ * Disable OBFF on @dev.
+ */
+void pci_disable_obff(struct pci_dev *dev)
+{
+        int pos;
+        u16 ctrl;
+
+        if (!pci_is_pcie(dev))
+                return;
+
+        pos = pci_pcie_cap(dev);
+        if (!pos)
+                return;
+
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+        ctrl &= ~PCI_EXP_OBFF_WAKE_EN;
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+}
+EXPORT_SYMBOL(pci_disable_obff);
+
+/**
+ * pci_ltr_supported - check whether a device supports LTR
+ * @dev: PCI device
+ *
+ * RETURNS:
+ * True if @dev supports latency tolerance reporting, false otherwise.
+ */
+bool pci_ltr_supported(struct pci_dev *dev)
+{
+        int pos;
+        u32 cap;
+
+        if (!pci_is_pcie(dev))
+                return false;
+
+        pos = pci_pcie_cap(dev);
+        if (!pos)
+                return false;
+
+        pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
+
+        return cap & PCI_EXP_DEVCAP2_LTR;
+}
+EXPORT_SYMBOL(pci_ltr_supported);
+
+/**
+ * pci_enable_ltr - enable latency tolerance reporting
+ * @dev: PCI device
+ *
+ * Enable LTR on @dev if possible, which means enabling it first on
+ * upstream ports.
+ *
+ * RETURNS:
+ * Zero on success, errno on failure.
+ */
+int pci_enable_ltr(struct pci_dev *dev)
+{
+        int pos;
+        u16 ctrl;
+        int ret;
+
+        if (!pci_ltr_supported(dev))
+                return -ENOTSUPP;
+
+        pos = pci_pcie_cap(dev);
+        if (!pos)
+                return -ENOTSUPP;
+
+        /* Only primary function can enable/disable LTR */
+        if (PCI_FUNC(dev->devfn) != 0)
+                return -EINVAL;
+
+        /* Enable upstream ports first */
+        if (dev->bus) {
+                ret = pci_enable_ltr(dev->bus->self);
+                if (ret)
+                        return ret;
+        }
+
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+        ctrl |= PCI_EXP_LTR_EN;
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+
+        return 0;
+}
+EXPORT_SYMBOL(pci_enable_ltr);
+
+/**
+ * pci_disable_ltr - disable latency tolerance reporting
+ * @dev: PCI device
+ */
+void pci_disable_ltr(struct pci_dev *dev)
+{
+        int pos;
+        u16 ctrl;
+
+        if (!pci_ltr_supported(dev))
+                return;
+
+        pos = pci_pcie_cap(dev);
+        if (!pos)
+                return;
+
+        /* Only primary function can enable/disable LTR */
+        if (PCI_FUNC(dev->devfn) != 0)
+                return;
+
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+        ctrl &= ~PCI_EXP_LTR_EN;
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+}
+EXPORT_SYMBOL(pci_disable_ltr);
+
+static int __pci_ltr_scale(int *val)
+{
+        int scale = 0;
+
+        while (*val > 1023) {
+                *val = (*val + 31) / 32;
+                scale++;
+        }
+        return scale;
+}
+
+/**
+ * pci_set_ltr - set LTR latency values
+ * @dev: PCI device
+ * @snoop_lat_ns: snoop latency in nanoseconds
+ * @nosnoop_lat_ns: nosnoop latency in nanoseconds
+ *
+ * Figure out the scale and set the LTR values accordingly.
+ */
+int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns)
+{
+        int pos, ret, snoop_scale, nosnoop_scale;
+        u16 val;
+
+        if (!pci_ltr_supported(dev))
+                return -ENOTSUPP;
+
+        snoop_scale = __pci_ltr_scale(&snoop_lat_ns);
+        nosnoop_scale = __pci_ltr_scale(&nosnoop_lat_ns);
+
+        if (snoop_lat_ns > PCI_LTR_VALUE_MASK ||
+            nosnoop_lat_ns > PCI_LTR_VALUE_MASK)
+                return -EINVAL;
+
+        if ((snoop_scale > (PCI_LTR_SCALE_MASK >> PCI_LTR_SCALE_SHIFT)) ||
+            (nosnoop_scale > (PCI_LTR_SCALE_MASK >> PCI_LTR_SCALE_SHIFT)))
+                return -EINVAL;
+
+        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
+        if (!pos)
+                return -ENOTSUPP;
+
+        val = (snoop_scale << PCI_LTR_SCALE_SHIFT) | snoop_lat_ns;
+        ret = pci_write_config_word(dev, pos + PCI_LTR_MAX_SNOOP_LAT, val);
+        if (ret != 4)
+                return -EIO;
+
+        val = (nosnoop_scale << PCI_LTR_SCALE_SHIFT) | nosnoop_lat_ns;
+        ret = pci_write_config_word(dev, pos + PCI_LTR_MAX_NOSNOOP_LAT, val);
+        if (ret != 4)
+                return -EIO;
+
+        return 0;
+}
+EXPORT_SYMBOL(pci_set_ltr);
+
 static int pci_acs_enable;
 
 /**
@@ -2403,6 +2873,21 @@ clear:
         return 0;
 }
 
+/**
+ * pci_pm_reset - Put device into PCI_D3 and back into PCI_D0.
+ * @dev: Device to reset.
+ * @probe: If set, only check if the device can be reset this way.
+ *
+ * If @dev supports native PCI PM and its PCI_PM_CTRL_NO_SOFT_RESET flag is
+ * unset, it will be reinitialized internally when going from PCI_D3hot to
+ * PCI_D0.  If that's the case and the device is not in a low-power state
+ * already, force it into PCI_D3hot and back to PCI_D0, causing it to be reset.
+ *
+ * NOTE: This causes the caller to sleep for twice the device power transition
+ * cooldown period, which for the D0->D3hot and D3hot->D0 transitions is 10 ms
+ * by devault (i.e. unless the @dev's d3_delay field has a different value).
+ * Moreover, only devices in D0 can be reset by this function.
+ */
 static int pci_pm_reset(struct pci_dev *dev, int probe)
 {
         u16 csr;
@@ -2689,7 +3174,7 @@ int pcie_get_readrq(struct pci_dev *dev)
 
         ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
         if (!ret)
-        ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
+                ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
 
         return ret;
 }
@@ -2786,11 +3271,11 @@ void __init pci_register_set_vga_state(arch_set_vga_state_t func)
 }
 
 static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode,
-                      unsigned int command_bits, bool change_bridge)
+                      unsigned int command_bits, u32 flags)
 {
         if (arch_set_vga_state)
                 return arch_set_vga_state(dev, decode, command_bits,
-                                                change_bridge);
+                                                flags);
         return 0;
 }
 
@@ -2799,31 +3284,34 @@ static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode,
  * @dev: the PCI device
  * @decode: true = enable decoding, false = disable decoding
  * @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY
- * @change_bridge: traverse ancestors and change bridges
+ * @flags: traverse ancestors and change bridges
+ * CHANGE_BRIDGE_ONLY / CHANGE_BRIDGE
  */
 int pci_set_vga_state(struct pci_dev *dev, bool decode,
-                      unsigned int command_bits, bool change_bridge)
+                      unsigned int command_bits, u32 flags)
 {
         struct pci_bus *bus;
         struct pci_dev *bridge;
         u16 cmd;
         int rc;
 
-        WARN_ON(command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
+        WARN_ON((flags & PCI_VGA_STATE_CHANGE_DECODES) & (command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)));
 
         /* ARCH specific VGA enables */
-        rc = pci_set_vga_state_arch(dev, decode, command_bits, change_bridge);
+        rc = pci_set_vga_state_arch(dev, decode, command_bits, flags);
         if (rc)
                 return rc;
 
-        pci_read_config_word(dev, PCI_COMMAND, &cmd);
-        if (decode == true)
-                cmd |= command_bits;
-        else
-                cmd &= ~command_bits;
-        pci_write_config_word(dev, PCI_COMMAND, cmd);
+        if (flags & PCI_VGA_STATE_CHANGE_DECODES) {
+                pci_read_config_word(dev, PCI_COMMAND, &cmd);
+                if (decode == true)
+                        cmd |= command_bits;
+                else
+                        cmd &= ~command_bits;
+                pci_write_config_word(dev, PCI_COMMAND, cmd);
+        }
 
-        if (change_bridge == false)
+        if (!(flags & PCI_VGA_STATE_CHANGE_BRIDGE))
                 return 0;
 
         bus = dev->bus;
@@ -2995,6 +3483,8 @@ static int __init pci_setup(char *str)
                                 pci_no_msi();
                         } else if (!strcmp(str, "noaer")) {
                                 pci_no_aer();
+                        } else if (!strncmp(str, "realloc", 7)) {
+                                pci_realloc();
                         } else if (!strcmp(str, "nodomains")) {
                                 pci_no_domains();
                         } else if (!strncmp(str, "cbiosize=", 9)) {
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 6beb11b617a9..3a39bf1f1e2c 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -11,7 +11,7 @@
 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
-#ifndef CONFIG_DMI
+#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
 static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
 { return; }
 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
@@ -22,8 +22,13 @@ extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
 #endif
 extern void pci_cleanup_rom(struct pci_dev *dev);
 #ifdef HAVE_PCI_MMAP
+enum pci_mmap_api {
+        PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
+        PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
+};
 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
-                         struct vm_area_struct *vma);
+                         struct vm_area_struct *vmai,
+                         enum pci_mmap_api mmap_api);
 #endif
 int pci_probe_reset_function(struct pci_dev *dev);
 
@@ -63,15 +68,18 @@ struct pci_platform_pm_ops {
 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
 extern void pci_disable_enabled_device(struct pci_dev *dev);
-extern bool pci_check_pme_status(struct pci_dev *dev);
 extern int pci_finish_runtime_suspend(struct pci_dev *dev);
-extern void pci_wakeup_event(struct pci_dev *dev);
 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
-extern void pci_pme_wakeup_bus(struct pci_bus *bus);
 extern void pci_pm_init(struct pci_dev *dev);
 extern void platform_pci_wakeup_init(struct pci_dev *dev);
 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
 
+static inline void pci_wakeup_event(struct pci_dev *dev)
+{
+        /* Wait 100 ms before the system can be put into a sleep state. */
+        pm_wakeup_event(&dev->dev, 100);
+}
+
 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
 {
         return !!(pci_dev->subordinate);
@@ -138,13 +146,7 @@ static inline void pci_no_msi(void) { }
 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
 #endif
 
-#ifdef CONFIG_PCIEAER
-void pci_no_aer(void);
-bool pci_aer_available(void);
-#else
-static inline void pci_no_aer(void) { }
-static inline bool pci_aer_available(void) { return false; }
-#endif
+extern void pci_realloc(void);
 
 static inline int pci_no_d1d2(struct pci_dev *dev)
 {
@@ -156,8 +158,7 @@ static inline int pci_no_d1d2(struct pci_dev *dev)
 
 }
 extern struct device_attribute pci_dev_attrs[];
-extern struct device_attribute dev_attr_cpuaffinity;
-extern struct device_attribute dev_attr_cpulistaffinity;
+extern struct device_attribute pcibus_dev_attrs[];
 #ifdef CONFIG_HOTPLUG
 extern struct bus_attribute pci_bus_attrs[];
 #else
@@ -250,15 +251,6 @@ struct pci_sriov {
         u8 __iomem *mstate;     /* VF Migration State Array */
 };
 
-/* Address Translation Service */
-struct pci_ats {
-        int pos;        /* capability position */
-        int stu;        /* Smallest Translation Unit */
-        int qdep;       /* Invalidate Queue Depth */
-        int ref_cnt;    /* Physical Function reference count */
-        unsigned int is_enabled:1;      /* Enable bit is set */
-};
-
 #ifdef CONFIG_PCI_IOV
 extern int pci_iov_init(struct pci_dev *dev);
 extern void pci_iov_release(struct pci_dev *dev);
@@ -269,19 +261,6 @@ extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
 extern void pci_restore_iov_state(struct pci_dev *dev);
 extern int pci_iov_bus_range(struct pci_bus *bus);
 
-extern int pci_enable_ats(struct pci_dev *dev, int ps);
-extern void pci_disable_ats(struct pci_dev *dev);
-extern int pci_ats_queue_depth(struct pci_dev *dev);
-/**
- * pci_ats_enabled - query the ATS status
- * @dev: the PCI device
- *
- * Returns 1 if ATS capability is enabled, or 0 if not.
- */
-static inline int pci_ats_enabled(struct pci_dev *dev)
-{
-        return dev->ats && dev->ats->is_enabled;
-}
 #else
 static inline int pci_iov_init(struct pci_dev *dev)
 {
@@ -304,21 +283,6 @@ static inline int pci_iov_bus_range(struct pci_bus *bus)
         return 0;
 }
 
-static inline int pci_enable_ats(struct pci_dev *dev, int ps)
-{
-        return -ENODEV;
-}
-static inline void pci_disable_ats(struct pci_dev *dev)
-{
-}
-static inline int pci_ats_queue_depth(struct pci_dev *dev)
-{
-        return -ENODEV;
-}
-static inline int pci_ats_enabled(struct pci_dev *dev)
-{
-        return 0;
-}
 #endif /* CONFIG_PCI_IOV */
 
 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index dda70981b7a6..dc29348264c6 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -31,7 +31,7 @@ source "drivers/pci/pcie/aer/Kconfig"
 # PCI Express ASPM
 #
 config PCIEASPM
-        bool "PCI Express ASPM control" if EMBEDDED
+        bool "PCI Express ASPM control" if EXPERT
         depends on PCI && PCIEPORTBUS
         default y
         help
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 909924692b8a..95489cd9a555 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -27,6 +27,10 @@
 #include <linux/stddef.h>
 #include "aerdrv.h"
 
+/* Override the existing corrected and uncorrected error masks */
+static int aer_mask_override;
+module_param(aer_mask_override, bool, 0);
+
 struct aer_error_inj {
         u8 bus;
         u8 dev;
@@ -322,7 +326,7 @@ static int aer_inject(struct aer_error_inj *einj)
         unsigned long flags;
         unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
         int pos_cap_err, rp_pos_cap_err;
-        u32 sever, cor_mask, uncor_mask;
+        u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0;
         int ret = 0;
 
         dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn);
@@ -361,6 +365,18 @@ static int aer_inject(struct aer_error_inj *einj)
                 goto out_put;
         }
 
+        if (aer_mask_override) {
+                cor_mask_orig = cor_mask;
+                cor_mask &= !(einj->cor_status);
+                pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
+                                       cor_mask);
+
+                uncor_mask_orig = uncor_mask;
+                uncor_mask &= !(einj->uncor_status);
+                pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
+                                       uncor_mask);
+        }
+
         spin_lock_irqsave(&inject_lock, flags);
 
         err = __find_aer_error_by_dev(dev);
@@ -378,14 +394,16 @@ static int aer_inject(struct aer_error_inj *einj)
         err->header_log2 = einj->header_log2;
         err->header_log3 = einj->header_log3;
 
-        if (einj->cor_status && !(einj->cor_status & ~cor_mask)) {
+        if (!aer_mask_override && einj->cor_status &&
+            !(einj->cor_status & ~cor_mask)) {
                 ret = -EINVAL;
                 printk(KERN_WARNING "The correctable error(s) is masked "
                                 "by device\n");
                 spin_unlock_irqrestore(&inject_lock, flags);
                 goto out_put;
         }
-        if (einj->uncor_status && !(einj->uncor_status & ~uncor_mask)) {
+        if (!aer_mask_override && einj->uncor_status &&
+            !(einj->uncor_status & ~uncor_mask)) {
                 ret = -EINVAL;
                 printk(KERN_WARNING "The uncorrectable error(s) is masked "
                                 "by device\n");
@@ -425,6 +443,13 @@ static int aer_inject(struct aer_error_inj *einj)
         }
         spin_unlock_irqrestore(&inject_lock, flags);
 
+        if (aer_mask_override) {
+                pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
+                                       cor_mask_orig);
+                pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
+                                       uncor_mask_orig);
+        }
+
         ret = pci_bus_set_aer_ops(dev->bus);
         if (ret)
                 goto out_put;
@@ -472,6 +497,7 @@ static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
 static const struct file_operations aer_inject_fops = {
         .write = aer_inject_write,
         .owner = THIS_MODULE,
+        .llseek = noop_llseek,
 };
 
 static struct miscdevice aer_inject_device = {
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index f409948e1a9b..58ad7917553c 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -17,6 +17,7 @@
 
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/pci-acpi.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
@@ -416,7 +417,7 @@ static void aer_error_resume(struct pci_dev *dev)
  */
 static int __init aer_service_init(void)
 {
-        if (!pci_aer_available())
+        if (!pci_aer_available() || aer_acpi_firmware_first())
                 return -ENXIO;
         return pcie_port_service_register(&aerdriver);
 }
diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h
index 80c11d131499..94a7598eb262 100644
--- a/drivers/pci/pcie/aer/aerdrv.h
+++ b/drivers/pci/pcie/aer/aerdrv.h
@@ -35,13 +35,6 @@
                                         PCI_ERR_UNC_UNX_COMP|           \
                                         PCI_ERR_UNC_MALF_TLP)
 
-struct header_log_regs {
-        unsigned int dw0;
-        unsigned int dw1;
-        unsigned int dw2;
-        unsigned int dw3;
-};
-
 #define AER_MAX_MULTI_ERR_DEVICES       5       /* Not likely to have more */
 struct aer_err_info {
         struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES];
@@ -59,7 +52,7 @@ struct aer_err_info {
 
         unsigned int status;            /* COR/UNCOR Error Status */
         unsigned int mask;              /* COR/UNCOR Error Mask */
-        struct header_log_regs tlp;     /* TLP Header */
+        struct aer_header_log_regs tlp; /* TLP Header */
 };
 
 struct aer_err_source {
@@ -121,15 +114,6 @@ extern void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
 extern void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info);
 extern irqreturn_t aer_irq(int irq, void *context);
 
-#ifdef CONFIG_ACPI
-extern int aer_osc_setup(struct pcie_device *pciedev);
-#else
-static inline int aer_osc_setup(struct pcie_device *pciedev)
-{
-        return 0;
-}
-#endif
-
 #ifdef CONFIG_ACPI_APEI
 extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
 #else
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 2bb9b8972211..275bf158ffa7 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -93,4 +93,38 @@ int pcie_aer_get_firmware_first(struct pci_dev *dev)
                 aer_set_firmware_first(dev);
         return dev->__aer_firmware_first;
 }
+
+static bool aer_firmware_first;
+
+static int aer_hest_parse_aff(struct acpi_hest_header *hest_hdr, void *data)
+{
+        struct acpi_hest_aer_common *p;
+
+        if (aer_firmware_first)
+                return 0;
+
+        switch (hest_hdr->type) {
+        case ACPI_HEST_TYPE_AER_ROOT_PORT:
+        case ACPI_HEST_TYPE_AER_ENDPOINT:
+        case ACPI_HEST_TYPE_AER_BRIDGE:
+                p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
+                aer_firmware_first = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
+        default:
+                return 0;
+        }
+}
+
+/**
+ * aer_acpi_firmware_first - Check if APEI should control AER.
+ */
+bool aer_acpi_firmware_first(void)
+{
+        static bool parsed = false;
+
+        if (!parsed) {
+                apei_hest_parse(aer_hest_parse_aff, NULL);
+                parsed = true;
+        }
+        return aer_firmware_first;
+}
 #endif
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 29e268fadf14..43421fbe080a 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -754,7 +754,7 @@ void aer_isr(struct work_struct *work)
 {
         struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
         struct pcie_device *p_device = rpc->rpd;
-        struct aer_err_source e_src;
+        struct aer_err_source uninitialized_var(e_src);
 
         mutex_lock(&rpc->rpc_mutex);
         while (get_e_source(rpc, &e_src))
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 9d3e4c8d0184..b07a42e0b350 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -19,6 +19,7 @@
 #include <linux/errno.h>
 #include <linux/pm.h>
 #include <linux/suspend.h>
+#include <linux/cper.h>
 
 #include "aerdrv.h"
 
@@ -57,86 +58,44 @@
         (e & AER_DATA_LINK_LAYER_ERROR_MASK(t)) ? AER_DATA_LINK_LAYER_ERROR : \
         AER_TRANSACTION_LAYER_ERROR)
 
-#define AER_PR(info, pdev, fmt, args...)                                \
-        printk("%s%s %s: " fmt, (info->severity == AER_CORRECTABLE) ?   \
-                KERN_WARNING : KERN_ERR, dev_driver_string(&pdev->dev), \
-                dev_name(&pdev->dev), ## args)
-
 /*
  * AER error strings
  */
-static char *aer_error_severity_string[] = {
+static const char *aer_error_severity_string[] = {
         "Uncorrected (Non-Fatal)",
         "Uncorrected (Fatal)",
         "Corrected"
 };
 
-static char *aer_error_layer[] = {
+static const char *aer_error_layer[] = {
         "Physical Layer",
         "Data Link Layer",
         "Transaction Layer"
 };
-static char *aer_correctable_error_string[] = {
-        "Receiver Error        ",       /* Bit Position 0       */
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        "Bad TLP               ",       /* Bit Position 6       */
-        "Bad DLLP              ",       /* Bit Position 7       */
-        "RELAY_NUM Rollover    ",       /* Bit Position 8       */
-        NULL,
-        NULL,
-        NULL,
-        "Replay Timer Timeout  ",       /* Bit Position 12      */
-        "Advisory Non-Fatal    ",       /* Bit Position 13      */
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
+
+static const char *aer_correctable_error_string[] = {
+        "Receiver Error",               /* Bit Position 0       */
         NULL,
         NULL,
         NULL,
         NULL,
         NULL,
+        "Bad TLP",                      /* Bit Position 6       */
+        "Bad DLLP",                     /* Bit Position 7       */
+        "RELAY_NUM Rollover",           /* Bit Position 8       */
         NULL,
         NULL,
         NULL,
+        "Replay Timer Timeout",         /* Bit Position 12      */
+        "Advisory Non-Fatal",           /* Bit Position 13      */
 };
 
-static char *aer_uncorrectable_error_string[] = {
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        "Data Link Protocol    ",       /* Bit Position 4       */
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        NULL,
-        "Poisoned TLP          ",       /* Bit Position 12      */
-        "Flow Control Protocol ",       /* Bit Position 13      */
-        "Completion Timeout    ",       /* Bit Position 14      */
-        "Completer Abort       ",       /* Bit Position 15      */
-        "Unexpected Completion ",       /* Bit Position 16      */
-        "Receiver Overflow     ",       /* Bit Position 17      */
-        "Malformed TLP         ",       /* Bit Position 18      */
-        "ECRC                  ",       /* Bit Position 19      */
-        "Unsupported Request   ",       /* Bit Position 20      */
+static const char *aer_uncorrectable_error_string[] = {
         NULL,
         NULL,
         NULL,
         NULL,
+        "Data Link Protocol",           /* Bit Position 4       */
         NULL,
         NULL,
         NULL,
@@ -144,19 +103,29 @@ static char *aer_uncorrectable_error_string[] = {
         NULL,
         NULL,
         NULL,
+        "Poisoned TLP",                 /* Bit Position 12      */
+        "Flow Control Protocol",        /* Bit Position 13      */
+        "Completion Timeout",           /* Bit Position 14      */
+        "Completer Abort",              /* Bit Position 15      */
+        "Unexpected Completion",        /* Bit Position 16      */
+        "Receiver Overflow",            /* Bit Position 17      */
+        "Malformed TLP",                /* Bit Position 18      */
+        "ECRC",                         /* Bit Position 19      */
+        "Unsupported Request",          /* Bit Position 20      */
 };
 
-static char *aer_agent_string[] = {
+static const char *aer_agent_string[] = {
         "Receiver ID",
         "Requester ID",
         "Completer ID",
         "Transmitter ID"
 };
 
-static void __aer_print_error(struct aer_err_info *info, struct pci_dev *dev)
+static void __aer_print_error(const char *prefix,
+                              struct aer_err_info *info)
 {
         int i, status;
-        char *errmsg = NULL;
+        const char *errmsg = NULL;
 
         status = (info->status & ~info->mask);
 
@@ -165,15 +134,17 @@ static void __aer_print_error(struct aer_err_info *info, struct pci_dev *dev)
                         continue;
 
                 if (info->severity == AER_CORRECTABLE)
-                        errmsg = aer_correctable_error_string[i];
+                        errmsg = i < ARRAY_SIZE(aer_correctable_error_string) ?
+                                aer_correctable_error_string[i] : NULL;
                 else
-                        errmsg = aer_uncorrectable_error_string[i];
+                        errmsg = i < ARRAY_SIZE(aer_uncorrectable_error_string) ?
+                                aer_uncorrectable_error_string[i] : NULL;
 
                 if (errmsg)
-                        AER_PR(info, dev, "   [%2d] %s%s\n", i, errmsg,
+                        printk("%s""   [%2d] %-22s%s\n", prefix, i, errmsg,
                                 info->first_error == i ? " (First)" : "");
                 else
-                        AER_PR(info, dev, "   [%2d] Unknown Error Bit%s\n", i,
+                        printk("%s""   [%2d] Unknown Error Bit%s\n", prefix, i,
                                 info->first_error == i ? " (First)" : "");
         }
 }
@@ -181,11 +152,15 @@ static void __aer_print_error(struct aer_err_info *info, struct pci_dev *dev)
 void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
 {
         int id = ((dev->bus->number << 8) | dev->devfn);
+        char prefix[44];
+
+        snprintf(prefix, sizeof(prefix), "%s%s %s: ",
+                 (info->severity == AER_CORRECTABLE) ? KERN_WARNING : KERN_ERR,
+                 dev_driver_string(&dev->dev), dev_name(&dev->dev));
 
         if (info->status == 0) {
-                AER_PR(info, dev,
-                        "PCIe Bus Error: severity=%s, type=Unaccessible, "
-                        "id=%04x(Unregistered Agent ID)\n",
+                printk("%s""PCIe Bus Error: severity=%s, type=Unaccessible, "
+                        "id=%04x(Unregistered Agent ID)\n", prefix,
                         aer_error_severity_string[info->severity], id);
         } else {
                 int layer, agent;
@@ -193,23 +168,22 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
                 layer = AER_GET_LAYER_ERROR(info->severity, info->status);
                 agent = AER_GET_AGENT(info->severity, info->status);
 
-                AER_PR(info, dev,
-                        "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
-                        aer_error_severity_string[info->severity],
+                printk("%s""PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
+                        prefix, aer_error_severity_string[info->severity],
                         aer_error_layer[layer], id, aer_agent_string[agent]);
 
-                AER_PR(info, dev,
-                        "  device [%04x:%04x] error status/mask=%08x/%08x\n",
-                        dev->vendor, dev->device, info->status, info->mask);
+                printk("%s""  device [%04x:%04x] error status/mask=%08x/%08x\n",
+                        prefix, dev->vendor, dev->device,
+                        info->status, info->mask);
 
-                __aer_print_error(info, dev);
+                __aer_print_error(prefix, info);
 
                 if (info->tlp_header_valid) {
                         unsigned char *tlp = (unsigned char *) &info->tlp;
-                        AER_PR(info, dev, "  TLP Header:"
+                        printk("%s""  TLP Header:"
                                 " %02x%02x%02x%02x %02x%02x%02x%02x"
                                 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
-                                *(tlp + 3), *(tlp + 2), *(tlp + 1), *tlp,
+                                prefix, *(tlp + 3), *(tlp + 2), *(tlp + 1), *tlp,
                                 *(tlp + 7), *(tlp + 6), *(tlp + 5), *(tlp + 4),
                                 *(tlp + 11), *(tlp + 10), *(tlp + 9),
                                 *(tlp + 8), *(tlp + 15), *(tlp + 14),
@@ -218,8 +192,8 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
         }
 
         if (info->id && info->error_dev_num > 1 && info->id == id)
-                AER_PR(info, dev,
-                        "  Error of this Agent(%04x) is reported first\n", id);
+                printk("%s""  Error of this Agent(%04x) is reported first\n",
+                        prefix, id);
 }
 
 void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info)
@@ -228,3 +202,61 @@ void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info)
                 info->multi_error_valid ? "Multiple " : "",
                 aer_error_severity_string[info->severity], info->id);
 }
+
+#ifdef CONFIG_ACPI_APEI_PCIEAER
+static int cper_severity_to_aer(int cper_severity)
+{
+        switch (cper_severity) {
+        case CPER_SEV_RECOVERABLE:
+                return AER_NONFATAL;
+        case CPER_SEV_FATAL:
+                return AER_FATAL;
+        default:
+                return AER_CORRECTABLE;
+        }
+}
+
+void cper_print_aer(const char *prefix, int cper_severity,
+                    struct aer_capability_regs *aer)
+{
+        int aer_severity, layer, agent, status_strs_size, tlp_header_valid = 0;
+        u32 status, mask;
+        const char **status_strs;
+
+        aer_severity = cper_severity_to_aer(cper_severity);
+        if (aer_severity == AER_CORRECTABLE) {
+                status = aer->cor_status;
+                mask = aer->cor_mask;
+                status_strs = aer_correctable_error_string;
+                status_strs_size = ARRAY_SIZE(aer_correctable_error_string);
+        } else {
+                status = aer->uncor_status;
+                mask = aer->uncor_mask;
+                status_strs = aer_uncorrectable_error_string;
+                status_strs_size = ARRAY_SIZE(aer_uncorrectable_error_string);
+                tlp_header_valid = status & AER_LOG_TLP_MASKS;
+        }
+        layer = AER_GET_LAYER_ERROR(aer_severity, status);
+        agent = AER_GET_AGENT(aer_severity, status);
+        printk("%s""aer_status: 0x%08x, aer_mask: 0x%08x\n",
+               prefix, status, mask);
+        cper_print_bits(prefix, status, status_strs, status_strs_size);
+        printk("%s""aer_layer=%s, aer_agent=%s\n", prefix,
+               aer_error_layer[layer], aer_agent_string[agent]);
+        if (aer_severity != AER_CORRECTABLE)
+                printk("%s""aer_uncor_severity: 0x%08x\n",
+                       prefix, aer->uncor_severity);
+        if (tlp_header_valid) {
+                const unsigned char *tlp;
+                tlp = (const unsigned char *)&aer->header_log;
+                printk("%s""aer_tlp_header:"
+                        " %02x%02x%02x%02x %02x%02x%02x%02x"
+                        " %02x%02x%02x%02x %02x%02x%02x%02x\n",
+                        prefix, *(tlp + 3), *(tlp + 2), *(tlp + 1), *tlp,
+                        *(tlp + 7), *(tlp + 6), *(tlp + 5), *(tlp + 4),
+                        *(tlp + 11), *(tlp + 10), *(tlp + 9),
+                        *(tlp + 8), *(tlp + 15), *(tlp + 14),
+                        *(tlp + 13), *(tlp + 12));
+        }
+}
+#endif
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 71222814c1ec..6892601fc76f 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -68,7 +68,8 @@ struct pcie_link_state {
         struct aspm_latency acceptable[8];
 };
 
-static int aspm_disabled, aspm_force;
+static int aspm_disabled, aspm_force, aspm_clear_state;
+static bool aspm_support_enabled = true;
 static DEFINE_MUTEX(aspm_lock);
 static LIST_HEAD(link_list);
 
@@ -139,7 +140,7 @@ static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
 {
         /* Don't enable Clock PM if the link is not Clock PM capable */
         if (!link->clkpm_capable && enable)
-                return;
+                enable = 0;
         /* Need nothing if the specified equals to current state */
         if (link->clkpm_enabled == enable)
                 return;
@@ -498,6 +499,10 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
         struct pci_dev *child;
         int pos;
         u32 reg32;
+
+        if (aspm_clear_state)
+                return -EINVAL;
+
         /*
          * Some functions in a slot might not all be PCIe functions,
          * very strange. Disable ASPM for the whole slot
@@ -563,12 +568,15 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
         struct pcie_link_state *link;
         int blacklist = !!pcie_aspm_sanity_check(pdev);
 
-        if (aspm_disabled || !pci_is_pcie(pdev) || pdev->link_state)
+        if (!pci_is_pcie(pdev) || pdev->link_state)
                 return;
         if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
                 return;
 
+        if (aspm_disabled && !aspm_clear_state)
+                return;
+
         /* VIA has a strange chipset, root port is under a bridge */
         if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT &&
             pdev->bus->self)
@@ -600,7 +608,7 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
          * the BIOS's expectation, we'll do so once pci_enable_device() is
          * called.
          */
-        if (aspm_policy != POLICY_POWERSAVE) {
+        if (aspm_policy != POLICY_POWERSAVE || aspm_clear_state) {
                 pcie_config_aspm_path(link);
                 pcie_set_clkpm(link, policy_to_clkpm_state(link));
         }
@@ -641,7 +649,7 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
         struct pci_dev *parent = pdev->bus->self;
         struct pcie_link_state *link, *root, *parent_link;
 
-        if (aspm_disabled || !pci_is_pcie(pdev) ||
+        if ((aspm_disabled && !aspm_clear_state) || !pci_is_pcie(pdev) ||
             !parent || !parent->link_state)
                 return;
         if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
@@ -700,11 +708,33 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
         up_read(&pci_bus_sem);
 }
 
+void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
+{
+        struct pcie_link_state *link = pdev->link_state;
+
+        if (aspm_disabled || !pci_is_pcie(pdev) || !link)
+                return;
+
+        if (aspm_policy != POLICY_POWERSAVE)
+                return;
+
+        if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
+                return;
+
+        down_read(&pci_bus_sem);
+        mutex_lock(&aspm_lock);
+        pcie_config_aspm_path(link);
+        pcie_set_clkpm(link, policy_to_clkpm_state(link));
+        mutex_unlock(&aspm_lock);
+        up_read(&pci_bus_sem);
+}
+
 /*
  * pci_disable_link_state - disable pci device's link state, so the link will
  * never enter specific states
  */
-void pci_disable_link_state(struct pci_dev *pdev, int state)
+static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem)
 {
         struct pci_dev *parent = pdev->bus->self;
         struct pcie_link_state *link;
@@ -717,7 +747,8 @@ void pci_disable_link_state(struct pci_dev *pdev, int state)
         if (!parent || !parent->link_state)
                 return;
 
-        down_read(&pci_bus_sem);
+        if (sem)
+                down_read(&pci_bus_sem);
         mutex_lock(&aspm_lock);
         link = parent->link_state;
         if (state & PCIE_LINK_STATE_L0S)
@@ -731,7 +762,19 @@ void pci_disable_link_state(struct pci_dev *pdev, int state)
                 pcie_set_clkpm(link, 0);
         }
         mutex_unlock(&aspm_lock);
-        up_read(&pci_bus_sem);
+        if (sem)
+                up_read(&pci_bus_sem);
+}
+
+void pci_disable_link_state_locked(struct pci_dev *pdev, int state)
+{
+        __pci_disable_link_state(pdev, state, false);
+}
+EXPORT_SYMBOL(pci_disable_link_state_locked);
+
+void pci_disable_link_state(struct pci_dev *pdev, int state)
+{
+        __pci_disable_link_state(pdev, state, true);
 }
 EXPORT_SYMBOL(pci_disable_link_state);
 
@@ -740,6 +783,8 @@ static int pcie_aspm_set_policy(const char *val, struct kernel_param *kp)
         int i;
         struct pcie_link_state *link;
 
+        if (aspm_disabled)
+                return -EPERM;
         for (i = 0; i < ARRAY_SIZE(policy_str); i++)
                 if (!strncmp(val, policy_str[i], strlen(policy_str[i])))
                         break;
@@ -794,6 +839,8 @@ static ssize_t link_state_store(struct device *dev,
         struct pcie_link_state *link, *root = pdev->link_state->root;
         u32 val = buf[0] - '0', state = 0;
 
+        if (aspm_disabled)
+                return -EPERM;
         if (n < 1 || val > 3)
                 return -EINVAL;
 
@@ -889,6 +936,7 @@ static int __init pcie_aspm_disable(char *str)
 {
         if (!strcmp(str, "off")) {
                 aspm_disabled = 1;
+                aspm_support_enabled = false;
                 printk(KERN_INFO "PCIe ASPM is disabled\n");
         } else if (!strcmp(str, "force")) {
                 aspm_force = 1;
@@ -899,6 +947,12 @@ static int __init pcie_aspm_disable(char *str)
 
 __setup("pcie_aspm=", pcie_aspm_disable);
 
+void pcie_clear_aspm(void)
+{
+        if (!aspm_force)
+                aspm_clear_state = 1;
+}
+
 void pcie_no_aspm(void)
 {
         if (!aspm_force)
@@ -917,3 +971,8 @@ int pcie_aspm_enabled(void)
 }
 EXPORT_SYMBOL(pcie_aspm_enabled);
 
+bool pcie_aspm_support_enabled(void)
+{
+        return aspm_support_enabled;
+}
+EXPORT_SYMBOL(pcie_aspm_support_enabled);
diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
index 2f3c90407227..0057344a3fcb 100644
--- a/drivers/pci/pcie/pme.c
+++ b/drivers/pci/pcie/pme.c
@@ -26,9 +26,6 @@
 #include "../pci.h"
 #include "portdrv.h"
 
-#define PCI_EXP_RTSTA_PME       0x10000 /* PME status */
-#define PCI_EXP_RTSTA_PENDING   0x20000 /* PME pending */
-
 /*
  * If this switch is set, MSI will not be used for PCIe PME signaling.  This
  * causes the PCIe port driver to use INTx interrupts only, but it turns out
@@ -74,22 +71,6 @@ void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
 }
 
 /**
- * pcie_pme_clear_status - Clear root port PME interrupt status.
- * @dev: PCIe root port or event collector.
- */
-static void pcie_pme_clear_status(struct pci_dev *dev)
-{
-        int rtsta_pos;
-        u32 rtsta;
-
-        rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
-
-        pci_read_config_dword(dev, rtsta_pos, &rtsta);
-        rtsta |= PCI_EXP_RTSTA_PME;
-        pci_write_config_dword(dev, rtsta_pos, rtsta);
-}
-
-/**
  * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
  * @bus: PCI bus to scan.
  *
@@ -103,8 +84,8 @@ static bool pcie_pme_walk_bus(struct pci_bus *bus)
         list_for_each_entry(dev, &bus->devices, bus_list) {
                 /* Skip PCIe devices in case we started from a root port. */
                 if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
-                        pm_request_resume(&dev->dev);
                         pci_wakeup_event(dev);
+                        pm_request_resume(&dev->dev);
                         ret = true;
                 }
 
@@ -206,8 +187,8 @@ static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
                 /* The device is there, but we have to check its PME status. */
                 found = pci_check_pme_status(dev);
                 if (found) {
-                        pm_request_resume(&dev->dev);
                         pci_wakeup_event(dev);
+                        pm_request_resume(&dev->dev);
                 }
                 pci_dev_put(dev);
         } else if (devfn) {
@@ -253,7 +234,7 @@ static void pcie_pme_work_fn(struct work_struct *work)
                          * Clear PME status of the port.  If there are other
                          * pending PMEs, the status will be set again.
                          */
-                        pcie_pme_clear_status(port);
+                        pcie_clear_root_pme_status(port);
 
                         spin_unlock_irq(&data->lock);
                         pcie_pme_handle_request(port, rtsta & 0xffff);
@@ -378,7 +359,7 @@ static int pcie_pme_probe(struct pcie_device *srv)
 
         port = srv->port;
         pcie_pme_interrupt_enable(port, false);
-        pcie_pme_clear_status(port);
+        pcie_clear_root_pme_status(port);
 
         ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
         if (ret) {
@@ -402,7 +383,7 @@ static int pcie_pme_suspend(struct pcie_device *srv)
 
         spin_lock_irq(&data->lock);
         pcie_pme_interrupt_enable(port, false);
-        pcie_pme_clear_status(port);
+        pcie_clear_root_pme_status(port);
         data->noirq = true;
         spin_unlock_irq(&data->lock);
 
@@ -422,7 +403,7 @@ static int pcie_pme_resume(struct pcie_device *srv)
 
         spin_lock_irq(&data->lock);
         data->noirq = false;
-        pcie_pme_clear_status(port);
+        pcie_clear_root_pme_status(port);
         pcie_pme_interrupt_enable(port, true);
         spin_unlock_irq(&data->lock);
 
diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
index 7b5aba0a3291..bd00a01aef14 100644
--- a/drivers/pci/pcie/portdrv.h
+++ b/drivers/pci/pcie/portdrv.h
@@ -20,9 +20,6 @@
 
 #define get_descriptor_id(type, service) (((type - 4) << 4) | service)
 
-extern bool pcie_ports_disabled;
-extern bool pcie_ports_auto;
-
 extern struct bus_type pcie_port_bus_type;
 extern int pcie_port_device_register(struct pci_dev *dev);
 #ifdef CONFIG_PM
@@ -35,6 +32,8 @@ extern void pcie_port_bus_unregister(void);
 
 struct pci_dev;
 
+extern void pcie_clear_root_pme_status(struct pci_dev *dev);
+
 #ifdef CONFIG_PCIE_PME
 extern bool pcie_pme_msi_disabled;
 
diff --git a/drivers/pci/pcie/portdrv_acpi.c b/drivers/pci/pcie/portdrv_acpi.c
index b7c4cb1ccb23..a86b56e5f2f2 100644
--- a/drivers/pci/pcie/portdrv_acpi.c
+++ b/drivers/pci/pcie/portdrv_acpi.c
@@ -33,7 +33,7 @@
  */
 int pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
 {
-        acpi_status status;
+        struct acpi_pci_root *root;
         acpi_handle handle;
         u32 flags;
 
@@ -44,26 +44,11 @@ int pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
         if (!handle)
                 return -EINVAL;
 
-        flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
-                | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
-                | OSC_PCI_EXPRESS_PME_CONTROL;
-
-        if (pci_aer_available()) {
-                if (pcie_aer_get_firmware_first(port))
-                        dev_dbg(&port->dev, "PCIe errors handled by BIOS.\n");
-                else
-                        flags |= OSC_PCI_EXPRESS_AER_CONTROL;
-        }
-
-        status = acpi_pci_osc_control_set(handle, &flags,
-                                        OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
-        if (ACPI_FAILURE(status)) {
-                dev_dbg(&port->dev, "ACPI _OSC request failed (code %d)\n",
-                        status);
+        root = acpi_pci_find_root(handle);
+        if (!root)
                 return -ENODEV;
-        }
 
-        dev_info(&port->dev, "ACPI _OSC control granted for 0x%02x\n", flags);
+        flags = root->osc_control_set;
 
         *srv_mask = PCIE_PORT_SERVICE_VC;
         if (flags & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index a9c222d79ebc..595654a1a6a6 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -15,7 +15,6 @@
 #include <linux/slab.h>
 #include <linux/pcieport_if.h>
 #include <linux/aer.h>
-#include <linux/pci-aspm.h>
 
 #include "../pci.h"
 #include "portdrv.h"
@@ -241,17 +240,17 @@ static int get_port_device_capability(struct pci_dev *dev)
         int cap_mask;
         int err;
 
+        if (pcie_ports_disabled)
+                return 0;
+
         err = pcie_port_platform_notify(dev, &cap_mask);
-        if (pcie_ports_auto) {
-                if (err) {
-                        pcie_no_aspm();
-                        return 0;
-                }
-        } else {
+        if (!pcie_ports_auto) {
                 cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
                                 | PCIE_PORT_SERVICE_VC;
                 if (pci_aer_available())
                         cap_mask |= PCIE_PORT_SERVICE_AER;
+        } else if (err) {
+                        return 0;
         }
 
         pos = pci_pcie_cap(dev);
@@ -349,15 +348,16 @@ int pcie_port_device_register(struct pci_dev *dev)
         int status, capabilities, i, nr_service;
         int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
 
-        /* Get and check PCI Express port services */
-        capabilities = get_port_device_capability(dev);
-        if (!capabilities)
-                return -ENODEV;
-
         /* Enable PCI Express port device */
         status = pci_enable_device(dev);
         if (status)
                 return status;
+
+        /* Get and check PCI Express port services */
+        capabilities = get_port_device_capability(dev);
+        if (!capabilities)
+                return 0;
+
         pci_set_master(dev);
         /*
          * Initialize service irqs. Don't use service devices that
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index f9033e190fb6..e0610bda1dea 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -57,6 +57,22 @@ __setup("pcie_ports=", pcie_port_setup);
 
 /* global data */
 
+/**
+ * pcie_clear_root_pme_status - Clear root port PME interrupt status.
+ * @dev: PCIe root port or event collector.
+ */
+void pcie_clear_root_pme_status(struct pci_dev *dev)
+{
+        int rtsta_pos;
+        u32 rtsta;
+
+        rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
+
+        pci_read_config_dword(dev, rtsta_pos, &rtsta);
+        rtsta |= PCI_EXP_RTSTA_PME;
+        pci_write_config_dword(dev, rtsta_pos, rtsta);
+}
+
 static int pcie_portdrv_restore_config(struct pci_dev *dev)
 {
         int retval;
@@ -69,6 +85,20 @@ static int pcie_portdrv_restore_config(struct pci_dev *dev)
 }
 
 #ifdef CONFIG_PM
+static int pcie_port_resume_noirq(struct device *dev)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        /*
+         * Some BIOSes forget to clear Root PME Status bits after system wakeup
+         * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
+         * bits now just in case (shouldn't hurt).
+         */
+        if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
+                pcie_clear_root_pme_status(pdev);
+        return 0;
+}
+
 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
         .suspend        = pcie_port_device_suspend,
         .resume         = pcie_port_device_resume,
@@ -76,6 +106,7 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = {
         .thaw           = pcie_port_device_resume,
         .poweroff       = pcie_port_device_suspend,
         .restore        = pcie_port_device_resume,
+        .resume_noirq   = pcie_port_resume_noirq,
 };
 
 #define PCIE_PORTDRV_PM_OPS     (&pcie_portdrv_pm_ops)
@@ -327,10 +358,8 @@ static int __init pcie_portdrv_init(void)
 {
         int retval;
 
-        if (pcie_ports_disabled) {
-                pcie_no_aspm();
-                return -EACCES;
-        }
+        if (pcie_ports_disabled)
+                return pci_register_driver(&pcie_portdriver);
 
         dmi_check_system(pcie_portdrv_dmi_table);
 
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 12625d90f8b5..bafb3c3d4a89 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -43,43 +43,6 @@ int no_pci_devices(void)
 EXPORT_SYMBOL(no_pci_devices);
 
 /*
- * PCI Bus Class Devices
- */
-static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
-                                        int type,
-                                        struct device_attribute *attr,
-                                        char *buf)
-{
-        int ret;
-        const struct cpumask *cpumask;
-
-        cpumask = cpumask_of_pcibus(to_pci_bus(dev));
-        ret = type?
-                cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
-                cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
-        buf[ret++] = '\n';
-        buf[ret] = '\0';
-        return ret;
-}
-
-static ssize_t inline pci_bus_show_cpumaskaffinity(struct device *dev,
-                                        struct device_attribute *attr,
-                                        char *buf)
-{
-        return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
-}
-
-static ssize_t inline pci_bus_show_cpulistaffinity(struct device *dev,
-                                        struct device_attribute *attr,
-                                        char *buf)
-{
-        return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
-}
-
-DEVICE_ATTR(cpuaffinity,     S_IRUGO, pci_bus_show_cpumaskaffinity, NULL);
-DEVICE_ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL);
-
-/*
  * PCI Bus Class
  */
 static void release_pcibus_dev(struct device *dev)
@@ -95,6 +58,7 @@ static void release_pcibus_dev(struct device *dev)
 static struct class pcibus_class = {
         .name           = "pci_bus",
         .dev_release    = &release_pcibus_dev,
+        .dev_attrs      = pcibus_dev_attrs,
 };
 
 static int __init pcibus_class_init(void)
@@ -204,7 +168,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
                 if (type == pci_bar_io) {
                         l &= PCI_BASE_ADDRESS_IO_MASK;
-                        mask = PCI_BASE_ADDRESS_IO_MASK & IO_SPACE_LIMIT;
+                        mask = PCI_BASE_ADDRESS_IO_MASK & (u32) IO_SPACE_LIMIT;
                 } else {
                         l &= PCI_BASE_ADDRESS_MEM_MASK;
                         mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
@@ -764,6 +728,8 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
                 if (pci_find_bus(pci_domain_nr(bus), max+1))
                         goto out;
                 child = pci_add_new_bus(bus, dev, ++max);
+                if (!child)
+                        goto out;
                 buses = (buses & 0xff000000)
                       | ((unsigned int)(child->primary)     <<  0)
                       | ((unsigned int)(child->secondary)   <<  8)
@@ -777,7 +743,7 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
                         buses &= ~0xff000000;
                         buses |= CARDBUS_LATENCY_TIMER << 24;
                 }
-                        
+
                 /*
                  * We need to blast all three values with a single write.
                  */
@@ -961,8 +927,8 @@ int pci_setup_device(struct pci_dev *dev)
         dev->class = class;
         class >>= 8;
 
-        dev_dbg(&dev->dev, "found [%04x:%04x] class %06x header type %02x\n",
-                 dev->vendor, dev->device, class, dev->hdr_type);
+        dev_printk(KERN_DEBUG, &dev->dev, "[%04x:%04x] type %d class %#08x\n",
+                   dev->vendor, dev->device, dev->hdr_type, class);
 
         /* need to have dev->class ready */
         dev->cfg_size = pci_cfg_space_size(dev);
@@ -1453,9 +1419,6 @@ struct pci_bus * pci_create_bus(struct device *parent,
         error = device_register(&b->dev);
         if (error)
                 goto class_dev_reg_err;
-        error = device_create_file(&b->dev, &dev_attr_cpuaffinity);
-        if (error)
-                goto dev_create_file_err;
 
         /* Create legacy_io and legacy_mem files for this bus */
         pci_create_legacy_files(b);
@@ -1466,8 +1429,6 @@ struct pci_bus * pci_create_bus(struct device *parent,
 
         return b;
 
-dev_create_file_err:
-        device_unregister(&b->dev);
 class_dev_reg_err:
         device_unregister(dev);
 dev_reg_err:
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 01f0306525a5..27911b55c2a5 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -10,7 +10,6 @@
 #include <linux/module.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/smp_lock.h>
 #include <linux/capability.h>
 #include <asm/uaccess.h>
 #include <asm/byteorder.h>
@@ -212,8 +211,6 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
 #endif /* HAVE_PCI_MMAP */
         int ret = 0;
 
-        lock_kernel();
-
         switch (cmd) {
         case PCIIOC_CONTROLLER:
                 ret = pci_domain_nr(dev->bus);
@@ -242,7 +239,6 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
                 break;
         };
 
-        unlock_kernel();
         return ret;
 }
 
@@ -260,7 +256,7 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
 
         /* Make sure the caller is mapping a real resource for this device */
         for (i = 0; i < PCI_ROM_RESOURCE; i++) {
-                if (pci_mmap_fits(dev, i, vma))
+                if (pci_mmap_fits(dev, i, vma,  PCI_MMAP_PROCFS))
                         break;
         }
 
@@ -306,6 +302,7 @@ static const struct file_operations proc_bus_pci_operations = {
         .read           = proc_bus_pci_read,
         .write          = proc_bus_pci_write,
         .unlocked_ioctl = proc_bus_pci_ioctl,
+        .compat_ioctl   = proc_bus_pci_ioctl,
 #ifdef HAVE_PCI_MMAP
         .open           = proc_bus_pci_open,
         .release        = proc_bus_pci_release,
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 857ae01734a6..02145e9697a9 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -226,6 +226,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 	PCI_DEVICE_ID_INTEL_82439TX, 	quir
  *      VIA Apollo KT133 needs PCI latency patch
  *      Made according to a windows driver based patch by George E. Breese
  *      see PCI Latency Adjust on http://www.viahardware.com/download/viatweak.shtm
+ *      and http://www.georgebreese.com/net/software/#PCI
  *      Also see http://www.au-ja.org/review-kt133a-1-en.phtml for
  *      the info on which Mr Breese based his work.
  *
@@ -262,7 +263,7 @@ static void quirk_vialatency(struct pci_dev *dev)
          *      This happens to include the IDE controllers....
          *
          *      VIA only apply this fix when an SB Live! is present but under
-         *      both Linux and Windows this isnt enough, and we have seen
+         *      both Linux and Windows this isn't enough, and we have seen
          *      corruption without SB Live! but with things like 3 UDMA IDE
          *      controllers. So we ignore that bit of the VIA recommendation..
          */
@@ -532,6 +533,17 @@ static void __devinit quirk_piix4_acpi(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_82371AB_3,  quirk_piix4_acpi);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,   PCI_DEVICE_ID_INTEL_82443MX_3,  quirk_piix4_acpi);
 
+#define ICH_PMBASE      0x40
+#define ICH_ACPI_CNTL   0x44
+#define  ICH4_ACPI_EN   0x10
+#define  ICH6_ACPI_EN   0x80
+#define ICH4_GPIOBASE   0x58
+#define ICH4_GPIO_CNTL  0x5c
+#define  ICH4_GPIO_EN   0x10
+#define ICH6_GPIOBASE   0x48
+#define ICH6_GPIO_CNTL  0x4c
+#define  ICH6_GPIO_EN   0x10
+
 /*
  * ICH4, ICH4-M, ICH5, ICH5-M ACPI: Three IO regions pointed to by longwords at
  *      0x40 (128 bytes of ACPI, GPIO & TCO registers)
@@ -540,12 +552,33 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,	PCI_DEVICE_ID_INTEL_82443MX_3,	qui
 static void __devinit quirk_ich4_lpc_acpi(struct pci_dev *dev)
 {
         u32 region;
+        u8 enable;
 
-        pci_read_config_dword(dev, 0x40, &region);
-        quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH4 ACPI/GPIO/TCO");
+        /*
+         * The check for PCIBIOS_MIN_IO is to ensure we won't create a conflict
+         * with low legacy (and fixed) ports. We don't know the decoding
+         * priority and can't tell whether the legacy device or the one created
+         * here is really at that address.  This happens on boards with broken
+         * BIOSes.
+        */
+
+        pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
+        if (enable & ICH4_ACPI_EN) {
+                pci_read_config_dword(dev, ICH_PMBASE, &region);
+                region &= PCI_BASE_ADDRESS_IO_MASK;
+                if (region >= PCIBIOS_MIN_IO)
+                        quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
+                                        "ICH4 ACPI/GPIO/TCO");
+        }
 
-        pci_read_config_dword(dev, 0x58, &region);
-        quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH4 GPIO");
+        pci_read_config_byte(dev, ICH4_GPIO_CNTL, &enable);
+        if (enable & ICH4_GPIO_EN) {
+                pci_read_config_dword(dev, ICH4_GPIOBASE, &region);
+                region &= PCI_BASE_ADDRESS_IO_MASK;
+                if (region >= PCIBIOS_MIN_IO)
+                        quirk_io_region(dev, region, 64,
+                                        PCI_BRIDGE_RESOURCES + 1, "ICH4 GPIO");
+        }
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_82801AA_0,         quirk_ich4_lpc_acpi);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_82801AB_0,         quirk_ich4_lpc_acpi);
@@ -561,12 +594,25 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_ESB_1,		qui
 static void __devinit ich6_lpc_acpi_gpio(struct pci_dev *dev)
 {
         u32 region;
+        u8 enable;
 
-        pci_read_config_dword(dev, 0x40, &region);
-        quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH6 ACPI/GPIO/TCO");
+        pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
+        if (enable & ICH6_ACPI_EN) {
+                pci_read_config_dword(dev, ICH_PMBASE, &region);
+                region &= PCI_BASE_ADDRESS_IO_MASK;
+                if (region >= PCIBIOS_MIN_IO)
+                        quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
+                                        "ICH6 ACPI/GPIO/TCO");
+        }
 
-        pci_read_config_dword(dev, 0x48, &region);
-        quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH6 GPIO");
+        pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable);
+        if (enable & ICH6_GPIO_EN) {
+                pci_read_config_dword(dev, ICH6_GPIOBASE, &region);
+                region &= PCI_BASE_ADDRESS_IO_MASK;
+                if (region >= PCIBIOS_MIN_IO)
+                        quirk_io_region(dev, region, 64,
+                                        PCI_BRIDGE_RESOURCES + 1, "ICH6 GPIO");
+        }
 }
 
 static void __devinit ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const char *name, int dynsize)
@@ -635,7 +681,7 @@ static void __devinit ich7_lpc_generic_decode(struct pci_dev *dev, unsigned reg,
 /* ICH7-10 has the same common LPC generic IO decode registers */
 static void __devinit quirk_ich7_lpc(struct pci_dev *dev)
 {
-        /* We share the common ACPI/DPIO decode with ICH6 */
+        /* We share the common ACPI/GPIO decode with ICH6 */
         ich6_lpc_acpi_gpio(dev);
 
         /* And have 4 ICH7+ generic decodes */
@@ -1016,7 +1062,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA,	0x605,	quirk_transparent_bridge)
 /*
  * Common misconfiguration of the MediaGX/Geode PCI master that will
  * reduce PCI bandwidth from 70MB/s to 25MB/s.  See the GXM/GXLV/GX1
- * datasheets found at http://www.national.com/ds/GX for info on what
+ * datasheets found at http://www.national.com/analog for info on what
  * these bits do.  <christer@weinigel.se>
  */
 static void quirk_mediagx_master(struct pci_dev *dev)
@@ -2135,6 +2181,24 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB,
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82875_HB,
                         quirk_unhide_mch_dev6);
 
+#ifdef CONFIG_TILE
+/*
+ * The Tilera TILEmpower platform needs to set the link speed
+ * to 2.5GT(Giga-Transfers)/s (Gen 1). The default link speed
+ * setting is 5GT/s (Gen 2). 0x98 is the Link Control2 PCIe
+ * capability register of the PEX8624 PCIe switch. The switch
+ * supports link speed auto negotiation, but falsely sets
+ * the link speed to 5GT/s.
+ */
+static void __devinit quirk_tile_plx_gen1(struct pci_dev *dev)
+{
+        if (tile_plx_gen1) {
+                pci_write_config_dword(dev, 0x98, 0x1);
+                mdelay(50);
+        }
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8624, quirk_tile_plx_gen1);
+#endif /* CONFIG_TILE */
 
 #ifdef CONFIG_PCI_MSI
 /* Some chipsets do not support MSI. We cannot easily rely on setting
@@ -2285,8 +2349,11 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE,
  */
 static void __devinit nvenet_msi_disable(struct pci_dev *dev)
 {
-        if (dmi_name_in_vendors("P5N32-SLI PREMIUM") ||
-            dmi_name_in_vendors("P5N32-E SLI")) {
+        const char *board_name = dmi_get_system_info(DMI_BOARD_NAME);
+
+        if (board_name &&
+            (strstr(board_name, "P5N32-SLI PREMIUM") ||
+             strstr(board_name, "P5N32-E SLI"))) {
                 dev_info(&dev->dev,
                          "Disabling msi for MCP55 NIC on P5N32-SLI\n");
                 dev->no_msi = 1;
@@ -2296,6 +2363,40 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
                         PCI_DEVICE_ID_NVIDIA_NVENET_15,
                         nvenet_msi_disable);
 
+/*
+ * Some versions of the MCP55 bridge from nvidia have a legacy irq routing
+ * config register.  This register controls the routing of legacy interrupts
+ * from devices that route through the MCP55.  If this register is misprogramed
+ * interrupts are only sent to the bsp, unlike conventional systems where the
+ * irq is broadxast to all online cpus.  Not having this register set
+ * properly prevents kdump from booting up properly, so lets make sure that
+ * we have it set correctly.
+ * Note this is an undocumented register.
+ */
+static void __devinit nvbridge_check_legacy_irq_routing(struct pci_dev *dev)
+{
+        u32 cfg;
+
+        if (!pci_find_capability(dev, PCI_CAP_ID_HT))
+                return;
+
+        pci_read_config_dword(dev, 0x74, &cfg);
+
+        if (cfg & ((1 << 2) | (1 << 15))) {
+                printk(KERN_INFO "Rewriting irq routing register on MCP55\n");
+                cfg &= ~((1 << 2) | (1 << 15));
+                pci_write_config_dword(dev, 0x74, cfg);
+        }
+}
+
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
+                        PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V0,
+                        nvbridge_check_legacy_irq_routing);
+
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
+                        PCI_DEVICE_ID_NVIDIA_MCP55_BRIDGE_V4,
+                        nvbridge_check_legacy_irq_routing);
+
 static int __devinit ht_check_msi_mapping(struct pci_dev *dev)
 {
         int pos, ttl = 48;
@@ -2565,58 +2666,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375,
 
 #endif /* CONFIG_PCI_MSI */
 
-#ifdef CONFIG_PCI_IOV
-
-/*
- * For Intel 82576 SR-IOV NIC, if BIOS doesn't allocate resources for the
- * SR-IOV BARs, zero the Flash BAR and program the SR-IOV BARs to use the
- * old Flash Memory Space.
- */
-static void __devinit quirk_i82576_sriov(struct pci_dev *dev)
-{
-        int pos, flags;
-        u32 bar, start, size;
-
-        if (PAGE_SIZE > 0x10000)
-                return;
-
-        flags = pci_resource_flags(dev, 0);
-        if ((flags & PCI_BASE_ADDRESS_SPACE) !=
-                        PCI_BASE_ADDRESS_SPACE_MEMORY ||
-            (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) !=
-                        PCI_BASE_ADDRESS_MEM_TYPE_32)
-                return;
-
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
-        if (!pos)
-                return;
-
-        pci_read_config_dword(dev, pos + PCI_SRIOV_BAR, &bar);
-        if (bar & PCI_BASE_ADDRESS_MEM_MASK)
-                return;
-
-        start = pci_resource_start(dev, 1);
-        size = pci_resource_len(dev, 1);
-        if (!start || size != 0x400000 || start & (size - 1))
-                return;
-
-        pci_resource_flags(dev, 1) = 0;
-        pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
-        pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
-        pci_write_config_dword(dev, pos + PCI_SRIOV_BAR + 12, start + size / 2);
-
-        dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10c9, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e6, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e8, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150a, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150d, quirk_i82576_sriov);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov);
-
-#endif  /* CONFIG_PCI_IOV */
-
 /* Allow manual resource allocation for PCI hotplug bridges
  * via pci=hpmemsize=nnM and pci=hpiosize=nnM parameters. For
  * some PCI-PCI hotplug bridges, like PLX 6254 (former HINT HB6),
@@ -2634,7 +2683,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HINT, 0x0020, quirk_hotplug_bridge);
  * This is a quirk for the Ricoh MMC controller found as a part of
  * some mulifunction chips.
 
- * This is very similiar and based on the ricoh_mmc driver written by
+ * This is very similar and based on the ricoh_mmc driver written by
  * Philip Langdale. Thank you for these magic sequences.
  *
  * These chips implement the four main memory card controllers (SD, MMC, MS, xD)
@@ -2712,8 +2761,43 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
 #endif /*CONFIG_MMC_RICOH_MMC*/
 
+#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
+#define VTUNCERRMSK_REG 0x1ac
+#define VTD_MSK_SPEC_ERRORS     (1 << 31)
+/*
+ * This is a quirk for masking vt-d spec defined errors to platform error
+ * handling logic. With out this, platforms using Intel 7500, 5500 chipsets
+ * (and the derivative chipsets like X58 etc) seem to generate NMI/SMI (based
+ * on the RAS config settings of the platform) when a vt-d fault happens.
+ * The resulting SMI caused the system to hang.
+ *
+ * VT-d spec related errors are already handled by the VT-d OS code, so no
+ * need to report the same error through other channels.
+ */
+static void vtd_mask_spec_errors(struct pci_dev *dev)
+{
+        u32 word;
+
+        pci_read_config_dword(dev, VTUNCERRMSK_REG, &word);
+        pci_write_config_dword(dev, VTUNCERRMSK_REG, word | VTD_MSK_SPEC_ERRORS);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x342e, vtd_mask_spec_errors);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors);
+#endif
+
+static void __devinit fixup_ti816x_class(struct pci_dev* dev)
+{
+        /* TI 816x devices do not have class code set when in PCIe boot mode */
+        if (dev->class == PCI_CLASS_NOT_DEFINED) {
+                dev_info(&dev->dev, "Setting PCI class for 816x PCIe device\n");
+                dev->class = PCI_CLASS_MULTIMEDIA_VIDEO;
+        }
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_TI, 0xb800, fixup_ti816x_class);
 
 static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
                           struct pci_fixup *end)
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 176615e7231f..7f87beed35ac 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -73,8 +73,6 @@ void pci_remove_bus(struct pci_bus *pci_bus)
                 return;
 
         pci_remove_legacy_files(pci_bus);
-        device_remove_file(&pci_bus->dev, &dev_attr_cpuaffinity);
-        device_remove_file(&pci_bus->dev, &dev_attr_cpulistaffinity);
         device_unregister(&pci_bus->dev);
 }
 EXPORT_SYMBOL(pci_remove_bus);
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 66cb8f4cc5f4..9995842e45b5 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -33,11 +33,39 @@ struct resource_list_x {
         struct pci_dev *dev;
         resource_size_t start;
         resource_size_t end;
+        resource_size_t add_size;
         unsigned long flags;
 };
 
-static void add_to_failed_list(struct resource_list_x *head,
-                                 struct pci_dev *dev, struct resource *res)
+#define free_list(type, head) do {                      \
+        struct type *list, *tmp;                        \
+        for (list = (head)->next; list;) {              \
+                tmp = list;                             \
+                list = list->next;                      \
+                kfree(tmp);                             \
+        }                                               \
+        (head)->next = NULL;                            \
+} while (0)
+
+int pci_realloc_enable = 0;
+#define pci_realloc_enabled() pci_realloc_enable
+void pci_realloc(void)
+{
+        pci_realloc_enable = 1;
+}
+
+/**
+ * add_to_list() - add a new resource tracker to the list
+ * @head:       Head of the list
+ * @dev:        device corresponding to which the resource
+ *              belongs
+ * @res:        The resource to be tracked
+ * @add_size:   additional size to be optionally added
+ *              to the resource
+ */
+static void add_to_list(struct resource_list_x *head,
+                 struct pci_dev *dev, struct resource *res,
+                 resource_size_t add_size)
 {
         struct resource_list_x *list = head;
         struct resource_list_x *ln = list->next;
@@ -45,7 +73,7 @@ static void add_to_failed_list(struct resource_list_x *head,
 
         tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
         if (!tmp) {
-                pr_warning("add_to_failed_list: kmalloc() failed!\n");
+                pr_warning("add_to_list: kmalloc() failed!\n");
                 return;
         }
 
@@ -55,20 +83,14 @@ static void add_to_failed_list(struct resource_list_x *head,
         tmp->start = res->start;
         tmp->end = res->end;
         tmp->flags = res->flags;
+        tmp->add_size = add_size;
         list->next = tmp;
 }
 
-static void free_failed_list(struct resource_list_x *head)
+static void add_to_failed_list(struct resource_list_x *head,
+                                struct pci_dev *dev, struct resource *res)
 {
-        struct resource_list_x *list, *tmp;
-
-        for (list = head->next; list;) {
-                tmp = list;
-                list = list->next;
-                kfree(tmp);
-        }
-
-        head->next = NULL;
+        add_to_list(head, dev, res, 0);
 }
 
 static void __dev_sort_resources(struct pci_dev *dev,
@@ -91,18 +113,88 @@ static void __dev_sort_resources(struct pci_dev *dev,
         pdev_sort_resources(dev, head);
 }
 
-static void __assign_resources_sorted(struct resource_list *head,
-                                 struct resource_list_x *fail_head)
+static inline void reset_resource(struct resource *res)
+{
+        res->start = 0;
+        res->end = 0;
+        res->flags = 0;
+}
+
+/**
+ * adjust_resources_sorted() - satisfy any additional resource requests
+ *
+ * @add_head : head of the list tracking requests requiring additional
+ *             resources
+ * @head     : head of the list tracking requests with allocated
+ *             resources
+ *
+ * Walk through each element of the add_head and try to procure
+ * additional resources for the element, provided the element
+ * is in the head list.
+ */
+static void adjust_resources_sorted(struct resource_list_x *add_head,
+                struct resource_list *head)
 {
         struct resource *res;
-        struct resource_list *list, *tmp;
+        struct resource_list_x *list, *tmp, *prev;
+        struct resource_list *hlist;
+        resource_size_t add_size;
         int idx;
 
-        for (list = head->next; list;) {
+        prev = add_head;
+        for (list = add_head->next; list;) {
                 res = list->res;
+                /* skip resource that has been reset */
+                if (!res->flags)
+                        goto out;
+
+                /* skip this resource if not found in head list */
+                for (hlist = head->next; hlist && hlist->res != res;
+                                hlist = hlist->next);
+                if (!hlist) { /* just skip */
+                        prev = list;
+                        list = list->next;
+                        continue;
+                }
+
                 idx = res - &list->dev->resource[0];
+                add_size=list->add_size;
+                if (!resource_size(res) && add_size) {
+                         res->end = res->start + add_size - 1;
+                         if(pci_assign_resource(list->dev, idx))
+                                reset_resource(res);
+                } else if (add_size) {
+                        adjust_resource(res, res->start,
+                                resource_size(res) + add_size);
+                }
+out:
+                tmp = list;
+                prev->next = list = list->next;
+                kfree(tmp);
+        }
+}
 
-                if (pci_assign_resource(list->dev, idx)) {
+/**
+ * assign_requested_resources_sorted() - satisfy resource requests
+ *
+ * @head : head of the list tracking requests for resources
+ * @failed_list : head of the list tracking requests that could
+ *              not be allocated
+ *
+ * Satisfy resource requests of each element in the list. Add
+ * requests that could not satisfied to the failed_list.
+ */
+static void assign_requested_resources_sorted(struct resource_list *head,
+                                 struct resource_list_x *fail_head)
+{
+        struct resource *res;
+        struct resource_list *list;
+        int idx;
+
+        for (list = head->next; list; list = list->next) {
+                res = list->res;
+                idx = res - &list->dev->resource[0];
+                if (resource_size(res) && pci_assign_resource(list->dev, idx)) {
                         if (fail_head && !pci_is_root_bus(list->dev->bus)) {
                                 /*
                                  * if the failed res is for ROM BAR, and it will
@@ -112,16 +204,25 @@ static void __assign_resources_sorted(struct resource_list *head,
                                       (!(res->flags & IORESOURCE_ROM_ENABLE))))
                                         add_to_failed_list(fail_head, list->dev, res);
                         }
-                        res->start = 0;
-                        res->end = 0;
-                        res->flags = 0;
+                        reset_resource(res);
                 }
-                tmp = list;
-                list = list->next;
-                kfree(tmp);
         }
 }
 
+static void __assign_resources_sorted(struct resource_list *head,
+                                 struct resource_list_x *add_head,
+                                 struct resource_list_x *fail_head)
+{
+        /* Satisfy the must-have resource requests */
+        assign_requested_resources_sorted(head, fail_head);
+
+        /* Try to satisfy any additional nice-to-have resource
+                requests */
+        if (add_head)
+                adjust_resources_sorted(add_head, head);
+        free_list(resource_list, head);
+}
+
 static void pdev_assign_resources_sorted(struct pci_dev *dev,
                                  struct resource_list_x *fail_head)
 {
@@ -129,11 +230,12 @@ static void pdev_assign_resources_sorted(struct pci_dev *dev,
 
         head.next = NULL;
         __dev_sort_resources(dev, &head);
-        __assign_resources_sorted(&head, fail_head);
+        __assign_resources_sorted(&head, NULL, fail_head);
 
 }
 
 static void pbus_assign_resources_sorted(const struct pci_bus *bus,
+                                         struct resource_list_x *add_head,
                                          struct resource_list_x *fail_head)
 {
         struct pci_dev *dev;
@@ -143,7 +245,7 @@ static void pbus_assign_resources_sorted(const struct pci_bus *bus,
         list_for_each_entry(dev, &bus->devices, bus_list)
                 __dev_sort_resources(dev, &head);
 
-        __assign_resources_sorted(&head, fail_head);
+        __assign_resources_sorted(&head, add_head, fail_head);
 }
 
 void pci_setup_cardbus(struct pci_bus *bus)
@@ -404,15 +506,62 @@ static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned lon
         return NULL;
 }
 
-/* Sizing the IO windows of the PCI-PCI bridge is trivial,
-   since these windows have 4K granularity and the IO ranges
-   of non-bridge PCI devices are limited to 256 bytes.
-   We must be careful with the ISA aliasing though. */
-static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size)
+static resource_size_t calculate_iosize(resource_size_t size,
+                resource_size_t min_size,
+                resource_size_t size1,
+                resource_size_t old_size,
+                resource_size_t align)
+{
+        if (size < min_size)
+                size = min_size;
+        if (old_size == 1 )
+                old_size = 0;
+        /* To be fixed in 2.5: we should have sort of HAVE_ISA
+           flag in the struct pci_bus. */
+#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
+        size = (size & 0xff) + ((size & ~0xffUL) << 2);
+#endif
+        size = ALIGN(size + size1, align);
+        if (size < old_size)
+                size = old_size;
+        return size;
+}
+
+static resource_size_t calculate_memsize(resource_size_t size,
+                resource_size_t min_size,
+                resource_size_t size1,
+                resource_size_t old_size,
+                resource_size_t align)
+{
+        if (size < min_size)
+                size = min_size;
+        if (old_size == 1 )
+                old_size = 0;
+        if (size < old_size)
+                size = old_size;
+        size = ALIGN(size + size1, align);
+        return size;
+}
+
+/**
+ * pbus_size_io() - size the io window of a given bus
+ *
+ * @bus : the bus
+ * @min_size : the minimum io window that must to be allocated
+ * @add_size : additional optional io window
+ * @add_head : track the additional io window on this list
+ *
+ * Sizing the IO windows of the PCI-PCI bridge is trivial,
+ * since these windows have 4K granularity and the IO ranges
+ * of non-bridge PCI devices are limited to 256 bytes.
+ * We must be careful with the ISA aliasing though.
+ */
+static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
+                resource_size_t add_size, struct resource_list_x *add_head)
 {
         struct pci_dev *dev;
         struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
-        unsigned long size = 0, size1 = 0, old_size;
+        unsigned long size = 0, size0 = 0, size1 = 0;
 
         if (!b_res)
                 return;
@@ -435,20 +584,12 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size)
                                 size1 += r_size;
                 }
         }
-        if (size < min_size)
-                size = min_size;
-        old_size = resource_size(b_res);
-        if (old_size == 1)
-                old_size = 0;
-/* To be fixed in 2.5: we should have sort of HAVE_ISA
-   flag in the struct pci_bus. */
-#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
-        size = (size & 0xff) + ((size & ~0xffUL) << 2);
-#endif
-        size = ALIGN(size + size1, 4096);
-        if (size < old_size)
-                size = old_size;
-        if (!size) {
+        size0 = calculate_iosize(size, min_size, size1,
+                        resource_size(b_res), 4096);
+        size1 = (!add_head || (add_head && !add_size)) ? size0 :
+                calculate_iosize(size, min_size+add_size, size1,
+                        resource_size(b_res), 4096);
+        if (!size0 && !size1) {
                 if (b_res->start || b_res->end)
                         dev_info(&bus->self->dev, "disabling bridge window "
                                  "%pR to [bus %02x-%02x] (unused)\n", b_res,
@@ -458,17 +599,30 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size)
         }
         /* Alignment of the IO window is always 4K */
         b_res->start = 4096;
-        b_res->end = b_res->start + size - 1;
+        b_res->end = b_res->start + size0 - 1;
         b_res->flags |= IORESOURCE_STARTALIGN;
+        if (size1 > size0 && add_head)
+                add_to_list(add_head, bus->self, b_res, size1-size0);
 }
 
-/* Calculate the size of the bus and minimal alignment which
-   guarantees that all child resources fit in this size. */
+/**
+ * pbus_size_mem() - size the memory window of a given bus
+ *
+ * @bus : the bus
+ * @min_size : the minimum memory window that must to be allocated
+ * @add_size : additional optional memory window
+ * @add_head : track the additional memory window on this list
+ *
+ * Calculate the size of the bus and minimal alignment which
+ * guarantees that all child resources fit in this size.
+ */
 static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
-                         unsigned long type, resource_size_t min_size)
+                         unsigned long type, resource_size_t min_size,
+                        resource_size_t add_size,
+                        struct resource_list_x *add_head)
 {
         struct pci_dev *dev;
-        resource_size_t min_align, align, size, old_size;
+        resource_size_t min_align, align, size, size0, size1;
         resource_size_t aligns[12];     /* Alignments from 1Mb to 2Gb */
         int order, max_order;
         struct resource *b_res = find_free_bus_resource(bus, type);
@@ -516,14 +670,6 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                         mem64_mask &= r->flags & IORESOURCE_MEM_64;
                 }
         }
-        if (size < min_size)
-                size = min_size;
-        old_size = resource_size(b_res);
-        if (old_size == 1)
-                old_size = 0;
-        if (size < old_size)
-                size = old_size;
-
         align = 0;
         min_align = 0;
         for (order = 0; order <= max_order; order++) {
@@ -537,8 +683,11 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                         min_align = align1 >> 1;
                 align += aligns[order];
         }
-        size = ALIGN(size, min_align);
-        if (!size) {
+        size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
+        size1 = (!add_head || (add_head && !add_size)) ? size0 :
+                calculate_memsize(size, min_size+add_size, 0,
+                                resource_size(b_res), min_align);
+        if (!size0 && !size1) {
                 if (b_res->start || b_res->end)
                         dev_info(&bus->self->dev, "disabling bridge window "
                                  "%pR to [bus %02x-%02x] (unused)\n", b_res,
@@ -547,9 +696,10 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                 return 1;
         }
         b_res->start = min_align;
-        b_res->end = size + min_align - 1;
-        b_res->flags |= IORESOURCE_STARTALIGN;
-        b_res->flags |= mem64_mask;
+        b_res->end = size0 + min_align - 1;
+        b_res->flags |= IORESOURCE_STARTALIGN | mem64_mask;
+        if (size1 > size0 && add_head)
+                add_to_list(add_head, bus->self, b_res, size1-size0);
         return 1;
 }
 
@@ -602,11 +752,12 @@ static void pci_bus_size_cardbus(struct pci_bus *bus)
         }
 }
 
-void __ref pci_bus_size_bridges(struct pci_bus *bus)
+void __ref __pci_bus_size_bridges(struct pci_bus *bus,
+                        struct resource_list_x *add_head)
 {
         struct pci_dev *dev;
         unsigned long mask, prefmask;
-        resource_size_t min_mem_size = 0, min_io_size = 0;
+        resource_size_t additional_mem_size = 0, additional_io_size = 0;
 
         list_for_each_entry(dev, &bus->devices, bus_list) {
                 struct pci_bus *b = dev->subordinate;
@@ -620,7 +771,7 @@ void __ref pci_bus_size_bridges(struct pci_bus *bus)
 
                 case PCI_CLASS_BRIDGE_PCI:
                 default:
-                        pci_bus_size_bridges(b);
+                        __pci_bus_size_bridges(b, add_head);
                         break;
                 }
         }
@@ -637,11 +788,14 @@ void __ref pci_bus_size_bridges(struct pci_bus *bus)
         case PCI_CLASS_BRIDGE_PCI:
                 pci_bridge_check_ranges(bus);
                 if (bus->self->is_hotplug_bridge) {
-                        min_io_size  = pci_hotplug_io_size;
-                        min_mem_size = pci_hotplug_mem_size;
+                        additional_io_size  = pci_hotplug_io_size;
+                        additional_mem_size = pci_hotplug_mem_size;
                 }
+                /*
+                 * Follow thru
+                 */
         default:
-                pbus_size_io(bus, min_io_size);
+                pbus_size_io(bus, 0, additional_io_size, add_head);
                 /* If the bridge supports prefetchable range, size it
                    separately. If it doesn't, or its prefetchable window
                    has already been allocated by arch code, try
@@ -649,30 +803,36 @@ void __ref pci_bus_size_bridges(struct pci_bus *bus)
                    resources. */
                 mask = IORESOURCE_MEM;
                 prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
-                if (pbus_size_mem(bus, prefmask, prefmask, min_mem_size))
+                if (pbus_size_mem(bus, prefmask, prefmask, 0, additional_mem_size, add_head))
                         mask = prefmask; /* Success, size non-prefetch only. */
                 else
-                        min_mem_size += min_mem_size;
-                pbus_size_mem(bus, mask, IORESOURCE_MEM, min_mem_size);
+                        additional_mem_size += additional_mem_size;
+                pbus_size_mem(bus, mask, IORESOURCE_MEM, 0, additional_mem_size, add_head);
                 break;
         }
 }
+
+void __ref pci_bus_size_bridges(struct pci_bus *bus)
+{
+        __pci_bus_size_bridges(bus, NULL);
+}
 EXPORT_SYMBOL(pci_bus_size_bridges);
 
 static void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
+                                         struct resource_list_x *add_head,
                                          struct resource_list_x *fail_head)
 {
         struct pci_bus *b;
         struct pci_dev *dev;
 
-        pbus_assign_resources_sorted(bus, fail_head);
+        pbus_assign_resources_sorted(bus, add_head, fail_head);
 
         list_for_each_entry(dev, &bus->devices, bus_list) {
                 b = dev->subordinate;
                 if (!b)
                         continue;
 
-                __pci_bus_assign_resources(b, fail_head);
+                __pci_bus_assign_resources(b, add_head, fail_head);
 
                 switch (dev->class >> 8) {
                 case PCI_CLASS_BRIDGE_PCI:
@@ -694,7 +854,7 @@ static void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
 
 void __ref pci_bus_assign_resources(const struct pci_bus *bus)
 {
-        __pci_bus_assign_resources(bus, NULL);
+        __pci_bus_assign_resources(bus, NULL, NULL);
 }
 EXPORT_SYMBOL(pci_bus_assign_resources);
 
@@ -709,7 +869,7 @@ static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
         if (!b)
                 return;
 
-        __pci_bus_assign_resources(b, fail_head);
+        __pci_bus_assign_resources(b, NULL, fail_head);
 
         switch (bridge->class >> 8) {
         case PCI_CLASS_BRIDGE_PCI:
@@ -838,26 +998,147 @@ static void pci_bus_dump_resources(struct pci_bus *bus)
         }
 }
 
+static int __init pci_bus_get_depth(struct pci_bus *bus)
+{
+        int depth = 0;
+        struct pci_dev *dev;
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                int ret;
+                struct pci_bus *b = dev->subordinate;
+                if (!b)
+                        continue;
+
+                ret = pci_bus_get_depth(b);
+                if (ret + 1 > depth)
+                        depth = ret + 1;
+        }
+
+        return depth;
+}
+static int __init pci_get_max_depth(void)
+{
+        int depth = 0;
+        struct pci_bus *bus;
+
+        list_for_each_entry(bus, &pci_root_buses, node) {
+                int ret;
+
+                ret = pci_bus_get_depth(bus);
+                if (ret > depth)
+                        depth = ret;
+        }
+
+        return depth;
+}
+
+
+/*
+ * first try will not touch pci bridge res
+ * second  and later try will clear small leaf bridge res
+ * will stop till to the max  deepth if can not find good one
+ */
 void __init
 pci_assign_unassigned_resources(void)
 {
         struct pci_bus *bus;
+        struct resource_list_x add_list; /* list of resources that
+                                        want additional resources */
+        int tried_times = 0;
+        enum release_type rel_type = leaf_only;
+        struct resource_list_x head, *list;
+        unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
+                                  IORESOURCE_PREFETCH;
+        unsigned long failed_type;
+        int max_depth = pci_get_max_depth();
+        int pci_try_num;
+
+
+        head.next = NULL;
+        add_list.next = NULL;
 
+        pci_try_num = max_depth + 1;
+        printk(KERN_DEBUG "PCI: max bus depth: %d pci_try_num: %d\n",
+                 max_depth, pci_try_num);
+
+again:
         /* Depth first, calculate sizes and alignments of all
            subordinate buses. */
-        list_for_each_entry(bus, &pci_root_buses, node) {
-                pci_bus_size_bridges(bus);
-        }
+        list_for_each_entry(bus, &pci_root_buses, node)
+                __pci_bus_size_bridges(bus, &add_list);
+
         /* Depth last, allocate resources and update the hardware. */
-        list_for_each_entry(bus, &pci_root_buses, node) {
-                pci_bus_assign_resources(bus);
-                pci_enable_bridges(bus);
+        list_for_each_entry(bus, &pci_root_buses, node)
+                __pci_bus_assign_resources(bus, &add_list, &head);
+        BUG_ON(add_list.next);
+        tried_times++;
+
+        /* any device complain? */
+        if (!head.next)
+                goto enable_and_dump;
+
+        /* don't realloc if asked to do so */
+        if (!pci_realloc_enabled()) {
+                free_list(resource_list_x, &head);
+                goto enable_and_dump;
+        }
+
+        failed_type = 0;
+        for (list = head.next; list;) {
+                failed_type |= list->flags;
+                list = list->next;
+        }
+        /*
+         * io port are tight, don't try extra
+         * or if reach the limit, don't want to try more
+         */
+        failed_type &= type_mask;
+        if ((failed_type == IORESOURCE_IO) || (tried_times >= pci_try_num)) {
+                free_list(resource_list_x, &head);
+                goto enable_and_dump;
         }
 
+        printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
+                         tried_times + 1);
+
+        /* third times and later will not check if it is leaf */
+        if ((tried_times + 1) > 2)
+                rel_type = whole_subtree;
+
+        /*
+         * Try to release leaf bridge's resources that doesn't fit resource of
+         * child device under that bridge
+         */
+        for (list = head.next; list;) {
+                bus = list->dev->bus;
+                pci_bus_release_bridge_resources(bus, list->flags & type_mask,
+                                                  rel_type);
+                list = list->next;
+        }
+        /* restore size and flags */
+        for (list = head.next; list;) {
+                struct resource *res = list->res;
+
+                res->start = list->start;
+                res->end = list->end;
+                res->flags = list->flags;
+                if (list->dev->subordinate)
+                        res->flags = 0;
+
+                list = list->next;
+        }
+        free_list(resource_list_x, &head);
+
+        goto again;
+
+enable_and_dump:
+        /* Depth last, update the hardware. */
+        list_for_each_entry(bus, &pci_root_buses, node)
+                pci_enable_bridges(bus);
+
         /* dump the resource on buses */
-        list_for_each_entry(bus, &pci_root_buses, node) {
+        list_for_each_entry(bus, &pci_root_buses, node)
                 pci_bus_dump_resources(bus);
-        }
 }
 
 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
@@ -882,7 +1163,7 @@ again:
 
         if (tried_times >= 2) {
                 /* still fail, don't need to try more */
-                free_failed_list(&head);
+                free_list(resource_list_x, &head);
                 goto enable_all;
         }
 
@@ -913,7 +1194,7 @@ again:
 
                 list = list->next;
         }
-        free_failed_list(&head);
+        free_list(resource_list_x, &head);
 
         goto again;
 
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 2aaa13150de3..bc0e6eea0fff 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -85,7 +85,7 @@ void pci_update_resource(struct pci_dev *dev, int resno)
                 }
         }
         res->flags &= ~IORESOURCE_UNSET;
-        dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx]\n",
+        dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
                  resno, res, (unsigned long long)region.start,
                  (unsigned long long)region.end);
 }
diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c
new file mode 100644
index 000000000000..492b7d807fe8
--- /dev/null
+++ b/drivers/pci/xen-pcifront.c
@@ -0,0 +1,1159 @@
+/*
+ * Xen PCI Frontend.
+ *
+ *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <xen/xenbus.h>
+#include <xen/events.h>
+#include <xen/grant_table.h>
+#include <xen/page.h>
+#include <linux/spinlock.h>
+#include <linux/pci.h>
+#include <linux/msi.h>
+#include <xen/interface/io/pciif.h>
+#include <asm/xen/pci.h>
+#include <linux/interrupt.h>
+#include <asm/atomic.h>
+#include <linux/workqueue.h>
+#include <linux/bitops.h>
+#include <linux/time.h>
+
+#define INVALID_GRANT_REF (0)
+#define INVALID_EVTCHN    (-1)
+
+struct pci_bus_entry {
+        struct list_head list;
+        struct pci_bus *bus;
+};
+
+#define _PDEVB_op_active                (0)
+#define PDEVB_op_active                 (1 << (_PDEVB_op_active))
+
+struct pcifront_device {
+        struct xenbus_device *xdev;
+        struct list_head root_buses;
+
+        int evtchn;
+        int gnt_ref;
+
+        int irq;
+
+        /* Lock this when doing any operations in sh_info */
+        spinlock_t sh_info_lock;
+        struct xen_pci_sharedinfo *sh_info;
+        struct work_struct op_work;
+        unsigned long flags;
+
+};
+
+struct pcifront_sd {
+        int domain;
+        struct pcifront_device *pdev;
+};
+
+static inline struct pcifront_device *
+pcifront_get_pdev(struct pcifront_sd *sd)
+{
+        return sd->pdev;
+}
+
+static inline void pcifront_init_sd(struct pcifront_sd *sd,
+                                    unsigned int domain, unsigned int bus,
+                                    struct pcifront_device *pdev)
+{
+        sd->domain = domain;
+        sd->pdev = pdev;
+}
+
+static DEFINE_SPINLOCK(pcifront_dev_lock);
+static struct pcifront_device *pcifront_dev;
+
+static int verbose_request;
+module_param(verbose_request, int, 0644);
+
+static int errno_to_pcibios_err(int errno)
+{
+        switch (errno) {
+        case XEN_PCI_ERR_success:
+                return PCIBIOS_SUCCESSFUL;
+
+        case XEN_PCI_ERR_dev_not_found:
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        case XEN_PCI_ERR_invalid_offset:
+        case XEN_PCI_ERR_op_failed:
+                return PCIBIOS_BAD_REGISTER_NUMBER;
+
+        case XEN_PCI_ERR_not_implemented:
+                return PCIBIOS_FUNC_NOT_SUPPORTED;
+
+        case XEN_PCI_ERR_access_denied:
+                return PCIBIOS_SET_FAILED;
+        }
+        return errno;
+}
+
+static inline void schedule_pcifront_aer_op(struct pcifront_device *pdev)
+{
+        if (test_bit(_XEN_PCIB_active, (unsigned long *)&pdev->sh_info->flags)
+                && !test_and_set_bit(_PDEVB_op_active, &pdev->flags)) {
+                dev_dbg(&pdev->xdev->dev, "schedule aer frontend job\n");
+                schedule_work(&pdev->op_work);
+        }
+}
+
+static int do_pci_op(struct pcifront_device *pdev, struct xen_pci_op *op)
+{
+        int err = 0;
+        struct xen_pci_op *active_op = &pdev->sh_info->op;
+        unsigned long irq_flags;
+        evtchn_port_t port = pdev->evtchn;
+        unsigned irq = pdev->irq;
+        s64 ns, ns_timeout;
+        struct timeval tv;
+
+        spin_lock_irqsave(&pdev->sh_info_lock, irq_flags);
+
+        memcpy(active_op, op, sizeof(struct xen_pci_op));
+
+        /* Go */
+        wmb();
+        set_bit(_XEN_PCIF_active, (unsigned long *)&pdev->sh_info->flags);
+        notify_remote_via_evtchn(port);
+
+        /*
+         * We set a poll timeout of 3 seconds but give up on return after
+         * 2 seconds. It is better to time out too late rather than too early
+         * (in the latter case we end up continually re-executing poll() with a
+         * timeout in the past). 1s difference gives plenty of slack for error.
+         */
+        do_gettimeofday(&tv);
+        ns_timeout = timeval_to_ns(&tv) + 2 * (s64)NSEC_PER_SEC;
+
+        xen_clear_irq_pending(irq);
+
+        while (test_bit(_XEN_PCIF_active,
+                        (unsigned long *)&pdev->sh_info->flags)) {
+                xen_poll_irq_timeout(irq, jiffies + 3*HZ);
+                xen_clear_irq_pending(irq);
+                do_gettimeofday(&tv);
+                ns = timeval_to_ns(&tv);
+                if (ns > ns_timeout) {
+                        dev_err(&pdev->xdev->dev,
+                                "pciback not responding!!!\n");
+                        clear_bit(_XEN_PCIF_active,
+                                  (unsigned long *)&pdev->sh_info->flags);
+                        err = XEN_PCI_ERR_dev_not_found;
+                        goto out;
+                }
+        }
+
+        /*
+        * We might lose backend service request since we
+        * reuse same evtchn with pci_conf backend response. So re-schedule
+        * aer pcifront service.
+        */
+        if (test_bit(_XEN_PCIB_active,
+                        (unsigned long *)&pdev->sh_info->flags)) {
+                dev_err(&pdev->xdev->dev,
+                        "schedule aer pcifront service\n");
+                schedule_pcifront_aer_op(pdev);
+        }
+
+        memcpy(op, active_op, sizeof(struct xen_pci_op));
+
+        err = op->err;
+out:
+        spin_unlock_irqrestore(&pdev->sh_info_lock, irq_flags);
+        return err;
+}
+
+/* Access to this function is spinlocked in drivers/pci/access.c */
+static int pcifront_bus_read(struct pci_bus *bus, unsigned int devfn,
+                             int where, int size, u32 *val)
+{
+        int err = 0;
+        struct xen_pci_op op = {
+                .cmd    = XEN_PCI_OP_conf_read,
+                .domain = pci_domain_nr(bus),
+                .bus    = bus->number,
+                .devfn  = devfn,
+                .offset = where,
+                .size   = size,
+        };
+        struct pcifront_sd *sd = bus->sysdata;
+        struct pcifront_device *pdev = pcifront_get_pdev(sd);
+
+        if (verbose_request)
+                dev_info(&pdev->xdev->dev,
+                         "read dev=%04x:%02x:%02x.%01x - offset %x size %d\n",
+                         pci_domain_nr(bus), bus->number, PCI_SLOT(devfn),
+                         PCI_FUNC(devfn), where, size);
+
+        err = do_pci_op(pdev, &op);
+
+        if (likely(!err)) {
+                if (verbose_request)
+                        dev_info(&pdev->xdev->dev, "read got back value %x\n",
+                                 op.value);
+
+                *val = op.value;
+        } else if (err == -ENODEV) {
+                /* No device here, pretend that it just returned 0 */
+                err = 0;
+                *val = 0;
+        }
+
+        return errno_to_pcibios_err(err);
+}
+
+/* Access to this function is spinlocked in drivers/pci/access.c */
+static int pcifront_bus_write(struct pci_bus *bus, unsigned int devfn,
+                              int where, int size, u32 val)
+{
+        struct xen_pci_op op = {
+                .cmd    = XEN_PCI_OP_conf_write,
+                .domain = pci_domain_nr(bus),
+                .bus    = bus->number,
+                .devfn  = devfn,
+                .offset = where,
+                .size   = size,
+                .value  = val,
+        };
+        struct pcifront_sd *sd = bus->sysdata;
+        struct pcifront_device *pdev = pcifront_get_pdev(sd);
+
+        if (verbose_request)
+                dev_info(&pdev->xdev->dev,
+                         "write dev=%04x:%02x:%02x.%01x - "
+                         "offset %x size %d val %x\n",
+                         pci_domain_nr(bus), bus->number,
+                         PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val);
+
+        return errno_to_pcibios_err(do_pci_op(pdev, &op));
+}
+
+struct pci_ops pcifront_bus_ops = {
+        .read = pcifront_bus_read,
+        .write = pcifront_bus_write,
+};
+
+#ifdef CONFIG_PCI_MSI
+static int pci_frontend_enable_msix(struct pci_dev *dev,
+                                    int vector[], int nvec)
+{
+        int err;
+        int i;
+        struct xen_pci_op op = {
+                .cmd    = XEN_PCI_OP_enable_msix,
+                .domain = pci_domain_nr(dev->bus),
+                .bus = dev->bus->number,
+                .devfn = dev->devfn,
+                .value = nvec,
+        };
+        struct pcifront_sd *sd = dev->bus->sysdata;
+        struct pcifront_device *pdev = pcifront_get_pdev(sd);
+        struct msi_desc *entry;
+
+        if (nvec > SH_INFO_MAX_VEC) {
+                dev_err(&dev->dev, "too much vector for pci frontend: %x."
+                                   " Increase SH_INFO_MAX_VEC.\n", nvec);
+                return -EINVAL;
+        }
+
+        i = 0;
+        list_for_each_entry(entry, &dev->msi_list, list) {
+                op.msix_entries[i].entry = entry->msi_attrib.entry_nr;
+                /* Vector is useless at this point. */
+                op.msix_entries[i].vector = -1;
+                i++;
+        }
+
+        err = do_pci_op(pdev, &op);
+
+        if (likely(!err)) {
+                if (likely(!op.value)) {
+                        /* we get the result */
+                        for (i = 0; i < nvec; i++) {
+                                if (op.msix_entries[i].vector <= 0) {
+                                        dev_warn(&dev->dev, "MSI-X entry %d is invalid: %d!\n",
+                                                i, op.msix_entries[i].vector);
+                                        err = -EINVAL;
+                                        vector[i] = -1;
+                                        continue;
+                                }
+                                vector[i] = op.msix_entries[i].vector;
+                        }
+                } else {
+                        printk(KERN_DEBUG "enable msix get value %x\n",
+                                op.value);
+                }
+        } else {
+                dev_err(&dev->dev, "enable msix get err %x\n", err);
+        }
+        return err;
+}
+
+static void pci_frontend_disable_msix(struct pci_dev *dev)
+{
+        int err;
+        struct xen_pci_op op = {
+                .cmd    = XEN_PCI_OP_disable_msix,
+                .domain = pci_domain_nr(dev->bus),
+                .bus = dev->bus->number,
+                .devfn = dev->devfn,
+        };
+        struct pcifront_sd *sd = dev->bus->sysdata;
+        struct pcifront_device *pdev = pcifront_get_pdev(sd);
+
+        err = do_pci_op(pdev, &op);
+
+        /* What should do for error ? */
+        if (err)
+                dev_err(&dev->dev, "pci_disable_msix get err %x\n", err);
+}
+
+static int pci_frontend_enable_msi(struct pci_dev *dev, int vector[])
+{
+        int err;
+        struct xen_pci_op op = {
+                .cmd    = XEN_PCI_OP_enable_msi,
+                .domain = pci_domain_nr(dev->bus),
+                .bus = dev->bus->number,
+                .devfn = dev->devfn,
+        };
+        struct pcifront_sd *sd = dev->bus->sysdata;
+        struct pcifront_device *pdev = pcifront_get_pdev(sd);
+
+        err = do_pci_op(pdev, &op);
+        if (likely(!err)) {
+                vector[0] = op.value;
+                if (op.value <= 0) {
+                        dev_warn(&dev->dev, "MSI entry is invalid: %d!\n",
+                                op.value);
+                        err = -EINVAL;
+                        vector[0] = -1;
+                }
+        } else {
+                dev_err(&dev->dev, "pci frontend enable msi failed for dev "
+                                    "%x:%x\n", op.bus, op.devfn);
+                err = -EINVAL;
+        }
+        return err;
+}
+
+static void pci_frontend_disable_msi(struct pci_dev *dev)
+{
+        int err;
+        struct xen_pci_op op = {
+                .cmd    = XEN_PCI_OP_disable_msi,
+                .domain = pci_domain_nr(dev->bus),
+                .bus = dev->bus->number,
+                .devfn = dev->devfn,
+        };
+        struct pcifront_sd *sd = dev->bus->sysdata;
+        struct pcifront_device *pdev = pcifront_get_pdev(sd);
+
+        err = do_pci_op(pdev, &op);
+        if (err == XEN_PCI_ERR_dev_not_found) {
+                /* XXX No response from backend, what shall we do? */
+                printk(KERN_DEBUG "get no response from backend for disable MSI\n");
+                return;
+        }
+        if (err)
+                /* how can pciback notify us fail? */
+                printk(KERN_DEBUG "get fake response frombackend\n");
+}
+
+static struct xen_pci_frontend_ops pci_frontend_ops = {
+        .enable_msi = pci_frontend_enable_msi,
+        .disable_msi = pci_frontend_disable_msi,
+        .enable_msix = pci_frontend_enable_msix,
+        .disable_msix = pci_frontend_disable_msix,
+};
+
+static void pci_frontend_registrar(int enable)
+{
+        if (enable)
+                xen_pci_frontend = &pci_frontend_ops;
+        else
+                xen_pci_frontend = NULL;
+};
+#else
+static inline void pci_frontend_registrar(int enable) { };
+#endif /* CONFIG_PCI_MSI */
+
+/* Claim resources for the PCI frontend as-is, backend won't allow changes */
+static int pcifront_claim_resource(struct pci_dev *dev, void *data)
+{
+        struct pcifront_device *pdev = data;
+        int i;
+        struct resource *r;
+
+        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+                r = &dev->resource[i];
+
+                if (!r->parent && r->start && r->flags) {
+                        dev_info(&pdev->xdev->dev, "claiming resource %s/%d\n",
+                                pci_name(dev), i);
+                        if (pci_claim_resource(dev, i)) {
+                                dev_err(&pdev->xdev->dev, "Could not claim "
+                                        "resource %s/%d! Device offline. Try "
+                                        "giving less than 4GB to domain.\n",
+                                        pci_name(dev), i);
+                        }
+                }
+        }
+
+        return 0;
+}
+
+static int __devinit pcifront_scan_bus(struct pcifront_device *pdev,
+                                unsigned int domain, unsigned int bus,
+                                struct pci_bus *b)
+{
+        struct pci_dev *d;
+        unsigned int devfn;
+
+        /* Scan the bus for functions and add.
+         * We omit handling of PCI bridge attachment because pciback prevents
+         * bridges from being exported.
+         */
+        for (devfn = 0; devfn < 0x100; devfn++) {
+                d = pci_get_slot(b, devfn);
+                if (d) {
+                        /* Device is already known. */
+                        pci_dev_put(d);
+                        continue;
+                }
+
+                d = pci_scan_single_device(b, devfn);
+                if (d)
+                        dev_info(&pdev->xdev->dev, "New device on "
+                                 "%04x:%02x:%02x.%02x found.\n", domain, bus,
+                                 PCI_SLOT(devfn), PCI_FUNC(devfn));
+        }
+
+        return 0;
+}
+
+static int __devinit pcifront_scan_root(struct pcifront_device *pdev,
+                                 unsigned int domain, unsigned int bus)
+{
+        struct pci_bus *b;
+        struct pcifront_sd *sd = NULL;
+        struct pci_bus_entry *bus_entry = NULL;
+        int err = 0;
+
+#ifndef CONFIG_PCI_DOMAINS
+        if (domain != 0) {
+                dev_err(&pdev->xdev->dev,
+                        "PCI Root in non-zero PCI Domain! domain=%d\n", domain);
+                dev_err(&pdev->xdev->dev,
+                        "Please compile with CONFIG_PCI_DOMAINS\n");
+                err = -EINVAL;
+                goto err_out;
+        }
+#endif
+
+        dev_info(&pdev->xdev->dev, "Creating PCI Frontend Bus %04x:%02x\n",
+                 domain, bus);
+
+        bus_entry = kmalloc(sizeof(*bus_entry), GFP_KERNEL);
+        sd = kmalloc(sizeof(*sd), GFP_KERNEL);
+        if (!bus_entry || !sd) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        pcifront_init_sd(sd, domain, bus, pdev);
+
+        b = pci_scan_bus_parented(&pdev->xdev->dev, bus,
+                                  &pcifront_bus_ops, sd);
+        if (!b) {
+                dev_err(&pdev->xdev->dev,
+                        "Error creating PCI Frontend Bus!\n");
+                err = -ENOMEM;
+                goto err_out;
+        }
+
+        bus_entry->bus = b;
+
+        list_add(&bus_entry->list, &pdev->root_buses);
+
+        /* pci_scan_bus_parented skips devices which do not have a have
+        * devfn==0. The pcifront_scan_bus enumerates all devfn. */
+        err = pcifront_scan_bus(pdev, domain, bus, b);
+
+        /* Claim resources before going "live" with our devices */
+        pci_walk_bus(b, pcifront_claim_resource, pdev);
+
+        /* Create SysFS and notify udev of the devices. Aka: "going live" */
+        pci_bus_add_devices(b);
+
+        return err;
+
+err_out:
+        kfree(bus_entry);
+        kfree(sd);
+
+        return err;
+}
+
+static int __devinit pcifront_rescan_root(struct pcifront_device *pdev,
+                                   unsigned int domain, unsigned int bus)
+{
+        int err;
+        struct pci_bus *b;
+
+#ifndef CONFIG_PCI_DOMAINS
+        if (domain != 0) {
+                dev_err(&pdev->xdev->dev,
+                        "PCI Root in non-zero PCI Domain! domain=%d\n", domain);
+                dev_err(&pdev->xdev->dev,
+                        "Please compile with CONFIG_PCI_DOMAINS\n");
+                return -EINVAL;
+        }
+#endif
+
+        dev_info(&pdev->xdev->dev, "Rescanning PCI Frontend Bus %04x:%02x\n",
+                 domain, bus);
+
+        b = pci_find_bus(domain, bus);
+        if (!b)
+                /* If the bus is unknown, create it. */
+                return pcifront_scan_root(pdev, domain, bus);
+
+        err = pcifront_scan_bus(pdev, domain, bus, b);
+
+        /* Claim resources before going "live" with our devices */
+        pci_walk_bus(b, pcifront_claim_resource, pdev);
+
+        /* Create SysFS and notify udev of the devices. Aka: "going live" */
+        pci_bus_add_devices(b);
+
+        return err;
+}
+
+static void free_root_bus_devs(struct pci_bus *bus)
+{
+        struct pci_dev *dev;
+
+        while (!list_empty(&bus->devices)) {
+                dev = container_of(bus->devices.next, struct pci_dev,
+                                   bus_list);
+                dev_dbg(&dev->dev, "removing device\n");
+                pci_remove_bus_device(dev);
+        }
+}
+
+static void pcifront_free_roots(struct pcifront_device *pdev)
+{
+        struct pci_bus_entry *bus_entry, *t;
+
+        dev_dbg(&pdev->xdev->dev, "cleaning up root buses\n");
+
+        list_for_each_entry_safe(bus_entry, t, &pdev->root_buses, list) {
+                list_del(&bus_entry->list);
+
+                free_root_bus_devs(bus_entry->bus);
+
+                kfree(bus_entry->bus->sysdata);
+
+                device_unregister(bus_entry->bus->bridge);
+                pci_remove_bus(bus_entry->bus);
+
+                kfree(bus_entry);
+        }
+}
+
+static pci_ers_result_t pcifront_common_process(int cmd,
+                                                struct pcifront_device *pdev,
+                                                pci_channel_state_t state)
+{
+        pci_ers_result_t result;
+        struct pci_driver *pdrv;
+        int bus = pdev->sh_info->aer_op.bus;
+        int devfn = pdev->sh_info->aer_op.devfn;
+        struct pci_dev *pcidev;
+        int flag = 0;
+
+        dev_dbg(&pdev->xdev->dev,
+                "pcifront AER process: cmd %x (bus:%x, devfn%x)",
+                cmd, bus, devfn);
+        result = PCI_ERS_RESULT_NONE;
+
+        pcidev = pci_get_bus_and_slot(bus, devfn);
+        if (!pcidev || !pcidev->driver) {
+                dev_err(&pdev->xdev->dev, "device or AER driver is NULL\n");
+                if (pcidev)
+                        pci_dev_put(pcidev);
+                return result;
+        }
+        pdrv = pcidev->driver;
+
+        if (get_driver(&pdrv->driver)) {
+                if (pdrv->err_handler && pdrv->err_handler->error_detected) {
+                        dev_dbg(&pcidev->dev,
+                                "trying to call AER service\n");
+                        if (pcidev) {
+                                flag = 1;
+                                switch (cmd) {
+                                case XEN_PCI_OP_aer_detected:
+                                        result = pdrv->err_handler->
+                                                 error_detected(pcidev, state);
+                                        break;
+                                case XEN_PCI_OP_aer_mmio:
+                                        result = pdrv->err_handler->
+                                                 mmio_enabled(pcidev);
+                                        break;
+                                case XEN_PCI_OP_aer_slotreset:
+                                        result = pdrv->err_handler->
+                                                 slot_reset(pcidev);
+                                        break;
+                                case XEN_PCI_OP_aer_resume:
+                                        pdrv->err_handler->resume(pcidev);
+                                        break;
+                                default:
+                                        dev_err(&pdev->xdev->dev,
+                                                "bad request in aer recovery "
+                                                "operation!\n");
+
+                                }
+                        }
+                }
+                put_driver(&pdrv->driver);
+        }
+        if (!flag)
+                result = PCI_ERS_RESULT_NONE;
+
+        return result;
+}
+
+
+static void pcifront_do_aer(struct work_struct *data)
+{
+        struct pcifront_device *pdev =
+                container_of(data, struct pcifront_device, op_work);
+        int cmd = pdev->sh_info->aer_op.cmd;
+        pci_channel_state_t state =
+                (pci_channel_state_t)pdev->sh_info->aer_op.err;
+
+        /*If a pci_conf op is in progress,
+                we have to wait until it is done before service aer op*/
+        dev_dbg(&pdev->xdev->dev,
+                "pcifront service aer bus %x devfn %x\n",
+                pdev->sh_info->aer_op.bus, pdev->sh_info->aer_op.devfn);
+
+        pdev->sh_info->aer_op.err = pcifront_common_process(cmd, pdev, state);
+
+        /* Post the operation to the guest. */
+        wmb();
+        clear_bit(_XEN_PCIB_active, (unsigned long *)&pdev->sh_info->flags);
+        notify_remote_via_evtchn(pdev->evtchn);
+
+        /*in case of we lost an aer request in four lines time_window*/
+        smp_mb__before_clear_bit();
+        clear_bit(_PDEVB_op_active, &pdev->flags);
+        smp_mb__after_clear_bit();
+
+        schedule_pcifront_aer_op(pdev);
+
+}
+
+static irqreturn_t pcifront_handler_aer(int irq, void *dev)
+{
+        struct pcifront_device *pdev = dev;
+        schedule_pcifront_aer_op(pdev);
+        return IRQ_HANDLED;
+}
+static int pcifront_connect(struct pcifront_device *pdev)
+{
+        int err = 0;
+
+        spin_lock(&pcifront_dev_lock);
+
+        if (!pcifront_dev) {
+                dev_info(&pdev->xdev->dev, "Installing PCI frontend\n");
+                pcifront_dev = pdev;
+        } else {
+                dev_err(&pdev->xdev->dev, "PCI frontend already installed!\n");
+                err = -EEXIST;
+        }
+
+        spin_unlock(&pcifront_dev_lock);
+
+        return err;
+}
+
+static void pcifront_disconnect(struct pcifront_device *pdev)
+{
+        spin_lock(&pcifront_dev_lock);
+
+        if (pdev == pcifront_dev) {
+                dev_info(&pdev->xdev->dev,
+                         "Disconnecting PCI Frontend Buses\n");
+                pcifront_dev = NULL;
+        }
+
+        spin_unlock(&pcifront_dev_lock);
+}
+static struct pcifront_device *alloc_pdev(struct xenbus_device *xdev)
+{
+        struct pcifront_device *pdev;
+
+        pdev = kzalloc(sizeof(struct pcifront_device), GFP_KERNEL);
+        if (pdev == NULL)
+                goto out;
+
+        pdev->sh_info =
+            (struct xen_pci_sharedinfo *)__get_free_page(GFP_KERNEL);
+        if (pdev->sh_info == NULL) {
+                kfree(pdev);
+                pdev = NULL;
+                goto out;
+        }
+        pdev->sh_info->flags = 0;
+
+        /*Flag for registering PV AER handler*/
+        set_bit(_XEN_PCIB_AERHANDLER, (void *)&pdev->sh_info->flags);
+
+        dev_set_drvdata(&xdev->dev, pdev);
+        pdev->xdev = xdev;
+
+        INIT_LIST_HEAD(&pdev->root_buses);
+
+        spin_lock_init(&pdev->sh_info_lock);
+
+        pdev->evtchn = INVALID_EVTCHN;
+        pdev->gnt_ref = INVALID_GRANT_REF;
+        pdev->irq = -1;
+
+        INIT_WORK(&pdev->op_work, pcifront_do_aer);
+
+        dev_dbg(&xdev->dev, "Allocated pdev @ 0x%p pdev->sh_info @ 0x%p\n",
+                pdev, pdev->sh_info);
+out:
+        return pdev;
+}
+
+static void free_pdev(struct pcifront_device *pdev)
+{
+        dev_dbg(&pdev->xdev->dev, "freeing pdev @ 0x%p\n", pdev);
+
+        pcifront_free_roots(pdev);
+
+        cancel_work_sync(&pdev->op_work);
+
+        if (pdev->irq >= 0)
+                unbind_from_irqhandler(pdev->irq, pdev);
+
+        if (pdev->evtchn != INVALID_EVTCHN)
+                xenbus_free_evtchn(pdev->xdev, pdev->evtchn);
+
+        if (pdev->gnt_ref != INVALID_GRANT_REF)
+                gnttab_end_foreign_access(pdev->gnt_ref, 0 /* r/w page */,
+                                          (unsigned long)pdev->sh_info);
+        else
+                free_page((unsigned long)pdev->sh_info);
+
+        dev_set_drvdata(&pdev->xdev->dev, NULL);
+
+        kfree(pdev);
+}
+
+static int pcifront_publish_info(struct pcifront_device *pdev)
+{
+        int err = 0;
+        struct xenbus_transaction trans;
+
+        err = xenbus_grant_ring(pdev->xdev, virt_to_mfn(pdev->sh_info));
+        if (err < 0)
+                goto out;
+
+        pdev->gnt_ref = err;
+
+        err = xenbus_alloc_evtchn(pdev->xdev, &pdev->evtchn);
+        if (err)
+                goto out;
+
+        err = bind_evtchn_to_irqhandler(pdev->evtchn, pcifront_handler_aer,
+                0, "pcifront", pdev);
+
+        if (err < 0)
+                return err;
+
+        pdev->irq = err;
+
+do_publish:
+        err = xenbus_transaction_start(&trans);
+        if (err) {
+                xenbus_dev_fatal(pdev->xdev, err,
+                                 "Error writing configuration for backend "
+                                 "(start transaction)");
+                goto out;
+        }
+
+        err = xenbus_printf(trans, pdev->xdev->nodename,
+                            "pci-op-ref", "%u", pdev->gnt_ref);
+        if (!err)
+                err = xenbus_printf(trans, pdev->xdev->nodename,
+                                    "event-channel", "%u", pdev->evtchn);
+        if (!err)
+                err = xenbus_printf(trans, pdev->xdev->nodename,
+                                    "magic", XEN_PCI_MAGIC);
+
+        if (err) {
+                xenbus_transaction_end(trans, 1);
+                xenbus_dev_fatal(pdev->xdev, err,
+                                 "Error writing configuration for backend");
+                goto out;
+        } else {
+                err = xenbus_transaction_end(trans, 0);
+                if (err == -EAGAIN)
+                        goto do_publish;
+                else if (err) {
+                        xenbus_dev_fatal(pdev->xdev, err,
+                                         "Error completing transaction "
+                                         "for backend");
+                        goto out;
+                }
+        }
+
+        xenbus_switch_state(pdev->xdev, XenbusStateInitialised);
+
+        dev_dbg(&pdev->xdev->dev, "publishing successful!\n");
+
+out:
+        return err;
+}
+
+static int __devinit pcifront_try_connect(struct pcifront_device *pdev)
+{
+        int err = -EFAULT;
+        int i, num_roots, len;
+        char str[64];
+        unsigned int domain, bus;
+
+
+        /* Only connect once */
+        if (xenbus_read_driver_state(pdev->xdev->nodename) !=
+            XenbusStateInitialised)
+                goto out;
+
+        err = pcifront_connect(pdev);
+        if (err) {
+                xenbus_dev_fatal(pdev->xdev, err,
+                                 "Error connecting PCI Frontend");
+                goto out;
+        }
+
+        err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend,
+                           "root_num", "%d", &num_roots);
+        if (err == -ENOENT) {
+                xenbus_dev_error(pdev->xdev, err,
+                                 "No PCI Roots found, trying 0000:00");
+                err = pcifront_scan_root(pdev, 0, 0);
+                num_roots = 0;
+        } else if (err != 1) {
+                if (err == 0)
+                        err = -EINVAL;
+                xenbus_dev_fatal(pdev->xdev, err,
+                                 "Error reading number of PCI roots");
+                goto out;
+        }
+
+        for (i = 0; i < num_roots; i++) {
+                len = snprintf(str, sizeof(str), "root-%d", i);
+                if (unlikely(len >= (sizeof(str) - 1))) {
+                        err = -ENOMEM;
+                        goto out;
+                }
+
+                err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str,
+                                   "%x:%x", &domain, &bus);
+                if (err != 2) {
+                        if (err >= 0)
+                                err = -EINVAL;
+                        xenbus_dev_fatal(pdev->xdev, err,
+                                         "Error reading PCI root %d", i);
+                        goto out;
+                }
+
+                err = pcifront_scan_root(pdev, domain, bus);
+                if (err) {
+                        xenbus_dev_fatal(pdev->xdev, err,
+                                         "Error scanning PCI root %04x:%02x",
+                                         domain, bus);
+                        goto out;
+                }
+        }
+
+        err = xenbus_switch_state(pdev->xdev, XenbusStateConnected);
+
+out:
+        return err;
+}
+
+static int pcifront_try_disconnect(struct pcifront_device *pdev)
+{
+        int err = 0;
+        enum xenbus_state prev_state;
+
+
+        prev_state = xenbus_read_driver_state(pdev->xdev->nodename);
+
+        if (prev_state >= XenbusStateClosing)
+                goto out;
+
+        if (prev_state == XenbusStateConnected) {
+                pcifront_free_roots(pdev);
+                pcifront_disconnect(pdev);
+        }
+
+        err = xenbus_switch_state(pdev->xdev, XenbusStateClosed);
+
+out:
+
+        return err;
+}
+
+static int __devinit pcifront_attach_devices(struct pcifront_device *pdev)
+{
+        int err = -EFAULT;
+        int i, num_roots, len;
+        unsigned int domain, bus;
+        char str[64];
+
+        if (xenbus_read_driver_state(pdev->xdev->nodename) !=
+            XenbusStateReconfiguring)
+                goto out;
+
+        err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend,
+                           "root_num", "%d", &num_roots);
+        if (err == -ENOENT) {
+                xenbus_dev_error(pdev->xdev, err,
+                                 "No PCI Roots found, trying 0000:00");
+                err = pcifront_rescan_root(pdev, 0, 0);
+                num_roots = 0;
+        } else if (err != 1) {
+                if (err == 0)
+                        err = -EINVAL;
+                xenbus_dev_fatal(pdev->xdev, err,
+                                 "Error reading number of PCI roots");
+                goto out;
+        }
+
+        for (i = 0; i < num_roots; i++) {
+                len = snprintf(str, sizeof(str), "root-%d", i);
+                if (unlikely(len >= (sizeof(str) - 1))) {
+                        err = -ENOMEM;
+                        goto out;
+                }
+
+                err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str,
+                                   "%x:%x", &domain, &bus);
+                if (err != 2) {
+                        if (err >= 0)
+                                err = -EINVAL;
+                        xenbus_dev_fatal(pdev->xdev, err,
+                                         "Error reading PCI root %d", i);
+                        goto out;
+                }
+
+                err = pcifront_rescan_root(pdev, domain, bus);
+                if (err) {
+                        xenbus_dev_fatal(pdev->xdev, err,
+                                         "Error scanning PCI root %04x:%02x",
+                                         domain, bus);
+                        goto out;
+                }
+        }
+
+        xenbus_switch_state(pdev->xdev, XenbusStateConnected);
+
+out:
+        return err;
+}
+
+static int pcifront_detach_devices(struct pcifront_device *pdev)
+{
+        int err = 0;
+        int i, num_devs;
+        unsigned int domain, bus, slot, func;
+        struct pci_bus *pci_bus;
+        struct pci_dev *pci_dev;
+        char str[64];
+
+        if (xenbus_read_driver_state(pdev->xdev->nodename) !=
+            XenbusStateConnected)
+                goto out;
+
+        err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, "num_devs", "%d",
+                           &num_devs);
+        if (err != 1) {
+                if (err >= 0)
+                        err = -EINVAL;
+                xenbus_dev_fatal(pdev->xdev, err,
+                                 "Error reading number of PCI devices");
+                goto out;
+        }
+
+        /* Find devices being detached and remove them. */
+        for (i = 0; i < num_devs; i++) {
+                int l, state;
+                l = snprintf(str, sizeof(str), "state-%d", i);
+                if (unlikely(l >= (sizeof(str) - 1))) {
+                        err = -ENOMEM;
+                        goto out;
+                }
+                err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str, "%d",
+                                   &state);
+                if (err != 1)
+                        state = XenbusStateUnknown;
+
+                if (state != XenbusStateClosing)
+                        continue;
+
+                /* Remove device. */
+                l = snprintf(str, sizeof(str), "vdev-%d", i);
+                if (unlikely(l >= (sizeof(str) - 1))) {
+                        err = -ENOMEM;
+                        goto out;
+                }
+                err = xenbus_scanf(XBT_NIL, pdev->xdev->otherend, str,
+                                   "%x:%x:%x.%x", &domain, &bus, &slot, &func);
+                if (err != 4) {
+                        if (err >= 0)
+                                err = -EINVAL;
+                        xenbus_dev_fatal(pdev->xdev, err,
+                                         "Error reading PCI device %d", i);
+                        goto out;
+                }
+
+                pci_bus = pci_find_bus(domain, bus);
+                if (!pci_bus) {
+                        dev_dbg(&pdev->xdev->dev, "Cannot get bus %04x:%02x\n",
+                                domain, bus);
+                        continue;
+                }
+                pci_dev = pci_get_slot(pci_bus, PCI_DEVFN(slot, func));
+                if (!pci_dev) {
+                        dev_dbg(&pdev->xdev->dev,
+                                "Cannot get PCI device %04x:%02x:%02x.%02x\n",
+                                domain, bus, slot, func);
+                        continue;
+                }
+                pci_remove_bus_device(pci_dev);
+                pci_dev_put(pci_dev);
+
+                dev_dbg(&pdev->xdev->dev,
+                        "PCI device %04x:%02x:%02x.%02x removed.\n",
+                        domain, bus, slot, func);
+        }
+
+        err = xenbus_switch_state(pdev->xdev, XenbusStateReconfiguring);
+
+out:
+        return err;
+}
+
+static void __init_refok pcifront_backend_changed(struct xenbus_device *xdev,
+                                                  enum xenbus_state be_state)
+{
+        struct pcifront_device *pdev = dev_get_drvdata(&xdev->dev);
+
+        switch (be_state) {
+        case XenbusStateUnknown:
+        case XenbusStateInitialising:
+        case XenbusStateInitWait:
+        case XenbusStateInitialised:
+        case XenbusStateClosed:
+                break;
+
+        case XenbusStateConnected:
+                pcifront_try_connect(pdev);
+                break;
+
+        case XenbusStateClosing:
+                dev_warn(&xdev->dev, "backend going away!\n");
+                pcifront_try_disconnect(pdev);
+                break;
+
+        case XenbusStateReconfiguring:
+                pcifront_detach_devices(pdev);
+                break;
+
+        case XenbusStateReconfigured:
+                pcifront_attach_devices(pdev);
+                break;
+        }
+}
+
+static int pcifront_xenbus_probe(struct xenbus_device *xdev,
+                                 const struct xenbus_device_id *id)
+{
+        int err = 0;
+        struct pcifront_device *pdev = alloc_pdev(xdev);
+
+        if (pdev == NULL) {
+                err = -ENOMEM;
+                xenbus_dev_fatal(xdev, err,
+                                 "Error allocating pcifront_device struct");
+                goto out;
+        }
+
+        err = pcifront_publish_info(pdev);
+        if (err)
+                free_pdev(pdev);
+
+out:
+        return err;
+}
+
+static int pcifront_xenbus_remove(struct xenbus_device *xdev)
+{
+        struct pcifront_device *pdev = dev_get_drvdata(&xdev->dev);
+        if (pdev)
+                free_pdev(pdev);
+
+        return 0;
+}
+
+static const struct xenbus_device_id xenpci_ids[] = {
+        {"pci"},
+        {""},
+};
+
+static struct xenbus_driver xenbus_pcifront_driver = {
+        .name                   = "pcifront",
+        .owner                  = THIS_MODULE,
+        .ids                    = xenpci_ids,
+        .probe                  = pcifront_xenbus_probe,
+        .remove                 = pcifront_xenbus_remove,
+        .otherend_changed       = pcifront_backend_changed,
+};
+
+static int __init pcifront_init(void)
+{
+        if (!xen_pv_domain() || xen_initial_domain())
+                return -ENODEV;
+
+        pci_frontend_registrar(1 /* enable */);
+
+        return xenbus_register_frontend(&xenbus_pcifront_driver);
+}
+
+static void __exit pcifront_cleanup(void)
+{
+        xenbus_unregister_driver(&xenbus_pcifront_driver);
+        pci_frontend_registrar(0 /* disable */);
+}
+module_init(pcifront_init);
+module_exit(pcifront_cleanup);
+
+MODULE_DESCRIPTION("Xen PCI passthrough frontend.");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("xen:pci");