diff options
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r-- | drivers/pci/msi.c | 61 |
1 files changed, 33 insertions, 28 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 69b7be33b3a2..2f10328bf661 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -35,7 +35,12 @@ int arch_msi_check_device(struct pci_dev *dev, int nvec, int type) | |||
35 | #endif | 35 | #endif |
36 | 36 | ||
37 | #ifndef arch_setup_msi_irqs | 37 | #ifndef arch_setup_msi_irqs |
38 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | 38 | # define arch_setup_msi_irqs default_setup_msi_irqs |
39 | # define HAVE_DEFAULT_MSI_SETUP_IRQS | ||
40 | #endif | ||
41 | |||
42 | #ifdef HAVE_DEFAULT_MSI_SETUP_IRQS | ||
43 | int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | ||
39 | { | 44 | { |
40 | struct msi_desc *entry; | 45 | struct msi_desc *entry; |
41 | int ret; | 46 | int ret; |
@@ -60,7 +65,12 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
60 | #endif | 65 | #endif |
61 | 66 | ||
62 | #ifndef arch_teardown_msi_irqs | 67 | #ifndef arch_teardown_msi_irqs |
63 | void arch_teardown_msi_irqs(struct pci_dev *dev) | 68 | # define arch_teardown_msi_irqs default_teardown_msi_irqs |
69 | # define HAVE_DEFAULT_MSI_TEARDOWN_IRQS | ||
70 | #endif | ||
71 | |||
72 | #ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS | ||
73 | void default_teardown_msi_irqs(struct pci_dev *dev) | ||
64 | { | 74 | { |
65 | struct msi_desc *entry; | 75 | struct msi_desc *entry; |
66 | 76 | ||
@@ -158,8 +168,9 @@ static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag) | |||
158 | u32 mask_bits = desc->masked; | 168 | u32 mask_bits = desc->masked; |
159 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + | 169 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
160 | PCI_MSIX_ENTRY_VECTOR_CTRL; | 170 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
161 | mask_bits &= ~1; | 171 | mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; |
162 | mask_bits |= flag; | 172 | if (flag) |
173 | mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; | ||
163 | writel(mask_bits, desc->mask_base + offset); | 174 | writel(mask_bits, desc->mask_base + offset); |
164 | 175 | ||
165 | return mask_bits; | 176 | return mask_bits; |
@@ -170,33 +181,31 @@ static void msix_mask_irq(struct msi_desc *desc, u32 flag) | |||
170 | desc->masked = __msix_mask_irq(desc, flag); | 181 | desc->masked = __msix_mask_irq(desc, flag); |
171 | } | 182 | } |
172 | 183 | ||
173 | static void msi_set_mask_bit(unsigned irq, u32 flag) | 184 | static void msi_set_mask_bit(struct irq_data *data, u32 flag) |
174 | { | 185 | { |
175 | struct msi_desc *desc = get_irq_msi(irq); | 186 | struct msi_desc *desc = irq_data_get_msi(data); |
176 | 187 | ||
177 | if (desc->msi_attrib.is_msix) { | 188 | if (desc->msi_attrib.is_msix) { |
178 | msix_mask_irq(desc, flag); | 189 | msix_mask_irq(desc, flag); |
179 | readl(desc->mask_base); /* Flush write to device */ | 190 | readl(desc->mask_base); /* Flush write to device */ |
180 | } else { | 191 | } else { |
181 | unsigned offset = irq - desc->dev->irq; | 192 | unsigned offset = data->irq - desc->dev->irq; |
182 | msi_mask_irq(desc, 1 << offset, flag << offset); | 193 | msi_mask_irq(desc, 1 << offset, flag << offset); |
183 | } | 194 | } |
184 | } | 195 | } |
185 | 196 | ||
186 | void mask_msi_irq(unsigned int irq) | 197 | void mask_msi_irq(struct irq_data *data) |
187 | { | 198 | { |
188 | msi_set_mask_bit(irq, 1); | 199 | msi_set_mask_bit(data, 1); |
189 | } | 200 | } |
190 | 201 | ||
191 | void unmask_msi_irq(unsigned int irq) | 202 | void unmask_msi_irq(struct irq_data *data) |
192 | { | 203 | { |
193 | msi_set_mask_bit(irq, 0); | 204 | msi_set_mask_bit(data, 0); |
194 | } | 205 | } |
195 | 206 | ||
196 | void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | 207 | void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
197 | { | 208 | { |
198 | struct msi_desc *entry = get_irq_desc_msi(desc); | ||
199 | |||
200 | BUG_ON(entry->dev->current_state != PCI_D0); | 209 | BUG_ON(entry->dev->current_state != PCI_D0); |
201 | 210 | ||
202 | if (entry->msi_attrib.is_msix) { | 211 | if (entry->msi_attrib.is_msix) { |
@@ -227,15 +236,13 @@ void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | |||
227 | 236 | ||
228 | void read_msi_msg(unsigned int irq, struct msi_msg *msg) | 237 | void read_msi_msg(unsigned int irq, struct msi_msg *msg) |
229 | { | 238 | { |
230 | struct irq_desc *desc = irq_to_desc(irq); | 239 | struct msi_desc *entry = irq_get_msi_desc(irq); |
231 | 240 | ||
232 | read_msi_msg_desc(desc, msg); | 241 | __read_msi_msg(entry, msg); |
233 | } | 242 | } |
234 | 243 | ||
235 | void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | 244 | void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
236 | { | 245 | { |
237 | struct msi_desc *entry = get_irq_desc_msi(desc); | ||
238 | |||
239 | /* Assert that the cache is valid, assuming that | 246 | /* Assert that the cache is valid, assuming that |
240 | * valid messages are not all-zeroes. */ | 247 | * valid messages are not all-zeroes. */ |
241 | BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo | | 248 | BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo | |
@@ -246,15 +253,13 @@ void get_cached_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | |||
246 | 253 | ||
247 | void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) | 254 | void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) |
248 | { | 255 | { |
249 | struct irq_desc *desc = irq_to_desc(irq); | 256 | struct msi_desc *entry = irq_get_msi_desc(irq); |
250 | 257 | ||
251 | get_cached_msi_msg_desc(desc, msg); | 258 | __get_cached_msi_msg(entry, msg); |
252 | } | 259 | } |
253 | 260 | ||
254 | void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | 261 | void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
255 | { | 262 | { |
256 | struct msi_desc *entry = get_irq_desc_msi(desc); | ||
257 | |||
258 | if (entry->dev->current_state != PCI_D0) { | 263 | if (entry->dev->current_state != PCI_D0) { |
259 | /* Don't touch the hardware now */ | 264 | /* Don't touch the hardware now */ |
260 | } else if (entry->msi_attrib.is_msix) { | 265 | } else if (entry->msi_attrib.is_msix) { |
@@ -292,9 +297,9 @@ void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | |||
292 | 297 | ||
293 | void write_msi_msg(unsigned int irq, struct msi_msg *msg) | 298 | void write_msi_msg(unsigned int irq, struct msi_msg *msg) |
294 | { | 299 | { |
295 | struct irq_desc *desc = irq_to_desc(irq); | 300 | struct msi_desc *entry = irq_get_msi_desc(irq); |
296 | 301 | ||
297 | write_msi_msg_desc(desc, msg); | 302 | __write_msi_msg(entry, msg); |
298 | } | 303 | } |
299 | 304 | ||
300 | static void free_msi_irqs(struct pci_dev *dev) | 305 | static void free_msi_irqs(struct pci_dev *dev) |
@@ -349,7 +354,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev) | |||
349 | if (!dev->msi_enabled) | 354 | if (!dev->msi_enabled) |
350 | return; | 355 | return; |
351 | 356 | ||
352 | entry = get_irq_msi(dev->irq); | 357 | entry = irq_get_msi_desc(dev->irq); |
353 | pos = entry->msi_attrib.pos; | 358 | pos = entry->msi_attrib.pos; |
354 | 359 | ||
355 | pci_intx_for_msi(dev, 0); | 360 | pci_intx_for_msi(dev, 0); |
@@ -514,7 +519,7 @@ static void msix_program_entries(struct pci_dev *dev, | |||
514 | PCI_MSIX_ENTRY_VECTOR_CTRL; | 519 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
515 | 520 | ||
516 | entries[i].vector = entry->irq; | 521 | entries[i].vector = entry->irq; |
517 | set_irq_msi(entry->irq, entry); | 522 | irq_set_msi_desc(entry->irq, entry); |
518 | entry->masked = readl(entry->mask_base + offset); | 523 | entry->masked = readl(entry->mask_base + offset); |
519 | msix_mask_irq(entry, 1); | 524 | msix_mask_irq(entry, 1); |
520 | i++; | 525 | i++; |