diff options
author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-11-22 13:06:44 -0500 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-11-22 13:06:44 -0500 |
commit | 0bd2af46839ad6262d25714a6ec0365db9d6b98f (patch) | |
tree | dcced72d230d69fd0c5816ac6dd03ab84799a93e /drivers/net | |
parent | e138a5d2356729b8752e88520cc1525fae9794ac (diff) | |
parent | f26b90440cd74c78fe10c9bd5160809704a9627c (diff) |
Merge ../scsi-rc-fixes-2.6
Diffstat (limited to 'drivers/net')
67 files changed, 1840 insertions, 1471 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index ab92cc794c64..6e863aa9894c 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -486,7 +486,7 @@ config SGI_IOC3_ETH_HW_TX_CSUM | |||
486 | 486 | ||
487 | config MIPS_SIM_NET | 487 | config MIPS_SIM_NET |
488 | tristate "MIPS simulator Network device (EXPERIMENTAL)" | 488 | tristate "MIPS simulator Network device (EXPERIMENTAL)" |
489 | depends on NETDEVICES && MIPS_SIM && EXPERIMENTAL | 489 | depends on MIPS_SIM && EXPERIMENTAL |
490 | help | 490 | help |
491 | The MIPSNET device is a simple Ethernet network device which is | 491 | The MIPSNET device is a simple Ethernet network device which is |
492 | emulated by the MIPS Simulator. | 492 | emulated by the MIPS Simulator. |
@@ -2112,7 +2112,7 @@ config SKGE | |||
2112 | 2112 | ||
2113 | config SKY2 | 2113 | config SKY2 |
2114 | tristate "SysKonnect Yukon2 support (EXPERIMENTAL)" | 2114 | tristate "SysKonnect Yukon2 support (EXPERIMENTAL)" |
2115 | depends on PCI && EXPERIMENTAL | 2115 | depends on PCI |
2116 | select CRC32 | 2116 | select CRC32 |
2117 | ---help--- | 2117 | ---help--- |
2118 | This driver supports Gigabit Ethernet adapters based on the | 2118 | This driver supports Gigabit Ethernet adapters based on the |
@@ -2120,8 +2120,8 @@ config SKY2 | |||
2120 | Marvell 88E8021/88E8022/88E8035/88E8036/88E8038/88E8050/88E8052/ | 2120 | Marvell 88E8021/88E8022/88E8035/88E8036/88E8038/88E8050/88E8052/ |
2121 | 88E8053/88E8055/88E8061/88E8062, SysKonnect SK-9E21D/SK-9S21 | 2121 | 88E8053/88E8055/88E8061/88E8062, SysKonnect SK-9E21D/SK-9S21 |
2122 | 2122 | ||
2123 | This driver does not support the original Yukon chipset: a seperate | 2123 | There is companion driver for the older Marvell Yukon and |
2124 | driver, skge, is provided for Yukon-based adapters. | 2124 | Genesis based adapters: skge. |
2125 | 2125 | ||
2126 | To compile this driver as a module, choose M here: the module | 2126 | To compile this driver as a module, choose M here: the module |
2127 | will be called sky2. This is recommended. | 2127 | will be called sky2. This is recommended. |
@@ -2288,7 +2288,7 @@ config UGETH_TX_ON_DEMOND | |||
2288 | 2288 | ||
2289 | config UGETH_HAS_GIGA | 2289 | config UGETH_HAS_GIGA |
2290 | bool | 2290 | bool |
2291 | depends on UCC_GETH && MPC836x | 2291 | depends on UCC_GETH && PPC_MPC836x |
2292 | 2292 | ||
2293 | config MV643XX_ETH | 2293 | config MV643XX_ETH |
2294 | tristate "MV-643XX Ethernet support" | 2294 | tristate "MV-643XX Ethernet support" |
@@ -2467,7 +2467,7 @@ config ISERIES_VETH | |||
2467 | 2467 | ||
2468 | config RIONET | 2468 | config RIONET |
2469 | tristate "RapidIO Ethernet over messaging driver support" | 2469 | tristate "RapidIO Ethernet over messaging driver support" |
2470 | depends on NETDEVICES && RAPIDIO | 2470 | depends on RAPIDIO |
2471 | 2471 | ||
2472 | config RIONET_TX_SIZE | 2472 | config RIONET_TX_SIZE |
2473 | int "Number of outbound queue entries" | 2473 | int "Number of outbound queue entries" |
@@ -2717,6 +2717,7 @@ config PPP_MPPE | |||
2717 | select CRYPTO | 2717 | select CRYPTO |
2718 | select CRYPTO_SHA1 | 2718 | select CRYPTO_SHA1 |
2719 | select CRYPTO_ARC4 | 2719 | select CRYPTO_ARC4 |
2720 | select CRYPTO_ECB | ||
2720 | ---help--- | 2721 | ---help--- |
2721 | Support for the MPPE Encryption protocol, as employed by the | 2722 | Support for the MPPE Encryption protocol, as employed by the |
2722 | Microsoft Point-to-Point Tunneling Protocol. | 2723 | Microsoft Point-to-Point Tunneling Protocol. |
@@ -2832,7 +2833,7 @@ config NET_FC | |||
2832 | "SCSI generic support". | 2833 | "SCSI generic support". |
2833 | 2834 | ||
2834 | config SHAPER | 2835 | config SHAPER |
2835 | tristate "Traffic Shaper (EXPERIMENTAL)" | 2836 | tristate "Traffic Shaper (OBSOLETE)" |
2836 | depends on EXPERIMENTAL | 2837 | depends on EXPERIMENTAL |
2837 | ---help--- | 2838 | ---help--- |
2838 | The traffic shaper is a virtual network device that allows you to | 2839 | The traffic shaper is a virtual network device that allows you to |
@@ -2841,9 +2842,9 @@ config SHAPER | |||
2841 | these virtual devices. See | 2842 | these virtual devices. See |
2842 | <file:Documentation/networking/shaper.txt> for more information. | 2843 | <file:Documentation/networking/shaper.txt> for more information. |
2843 | 2844 | ||
2844 | An alternative to this traffic shaper is the experimental | 2845 | An alternative to this traffic shaper are traffic schedulers which |
2845 | Class-Based Queuing (CBQ) scheduling support which you get if you | 2846 | you'll get if you say Y to "QoS and/or fair queuing" in |
2846 | say Y to "QoS and/or fair queuing" above. | 2847 | "Networking options". |
2847 | 2848 | ||
2848 | To compile this driver as a module, choose M here: the module | 2849 | To compile this driver as a module, choose M here: the module |
2849 | will be called shaper. If unsure, say N. | 2850 | will be called shaper. If unsure, say N. |
diff --git a/drivers/net/arcnet/com20020.c b/drivers/net/arcnet/com20020.c index 0dc70c7b7940..aa9dd8f11269 100644 --- a/drivers/net/arcnet/com20020.c +++ b/drivers/net/arcnet/com20020.c | |||
@@ -337,13 +337,16 @@ static void com20020_set_mc_list(struct net_device *dev) | |||
337 | } | 337 | } |
338 | } | 338 | } |
339 | 339 | ||
340 | #ifdef MODULE | 340 | #if defined(CONFIG_ARCNET_COM20020_PCI_MODULE) || \ |
341 | 341 | defined(CONFIG_ARCNET_COM20020_ISA_MODULE) | |
342 | EXPORT_SYMBOL(com20020_check); | 342 | EXPORT_SYMBOL(com20020_check); |
343 | EXPORT_SYMBOL(com20020_found); | 343 | EXPORT_SYMBOL(com20020_found); |
344 | #endif | ||
344 | 345 | ||
345 | MODULE_LICENSE("GPL"); | 346 | MODULE_LICENSE("GPL"); |
346 | 347 | ||
348 | #ifdef MODULE | ||
349 | |||
347 | int init_module(void) | 350 | int init_module(void) |
348 | { | 351 | { |
349 | BUGLVL(D_NORMAL) printk(VERSION); | 352 | BUGLVL(D_NORMAL) printk(VERSION); |
diff --git a/drivers/net/arm/ep93xx_eth.c b/drivers/net/arm/ep93xx_eth.c index 127561c782fd..8ebd68e2af98 100644 --- a/drivers/net/arm/ep93xx_eth.c +++ b/drivers/net/arm/ep93xx_eth.c | |||
@@ -193,12 +193,9 @@ static struct net_device_stats *ep93xx_get_stats(struct net_device *dev) | |||
193 | static int ep93xx_rx(struct net_device *dev, int *budget) | 193 | static int ep93xx_rx(struct net_device *dev, int *budget) |
194 | { | 194 | { |
195 | struct ep93xx_priv *ep = netdev_priv(dev); | 195 | struct ep93xx_priv *ep = netdev_priv(dev); |
196 | int tail_offset; | ||
197 | int rx_done; | 196 | int rx_done; |
198 | int processed; | 197 | int processed; |
199 | 198 | ||
200 | tail_offset = rdl(ep, REG_RXSTSQCURADD) - ep->descs_dma_addr; | ||
201 | |||
202 | rx_done = 0; | 199 | rx_done = 0; |
203 | processed = 0; | 200 | processed = 0; |
204 | while (*budget > 0) { | 201 | while (*budget > 0) { |
@@ -211,36 +208,28 @@ static int ep93xx_rx(struct net_device *dev, int *budget) | |||
211 | 208 | ||
212 | entry = ep->rx_pointer; | 209 | entry = ep->rx_pointer; |
213 | rstat = ep->descs->rstat + entry; | 210 | rstat = ep->descs->rstat + entry; |
214 | if ((void *)rstat - (void *)ep->descs == tail_offset) { | 211 | |
212 | rstat0 = rstat->rstat0; | ||
213 | rstat1 = rstat->rstat1; | ||
214 | if (!(rstat0 & RSTAT0_RFP) || !(rstat1 & RSTAT1_RFP)) { | ||
215 | rx_done = 1; | 215 | rx_done = 1; |
216 | break; | 216 | break; |
217 | } | 217 | } |
218 | 218 | ||
219 | rstat0 = rstat->rstat0; | ||
220 | rstat1 = rstat->rstat1; | ||
221 | rstat->rstat0 = 0; | 219 | rstat->rstat0 = 0; |
222 | rstat->rstat1 = 0; | 220 | rstat->rstat1 = 0; |
223 | 221 | ||
224 | if (!(rstat0 & RSTAT0_RFP)) | ||
225 | printk(KERN_CRIT "ep93xx_rx: buffer not done " | ||
226 | " %.8x %.8x\n", rstat0, rstat1); | ||
227 | if (!(rstat0 & RSTAT0_EOF)) | 222 | if (!(rstat0 & RSTAT0_EOF)) |
228 | printk(KERN_CRIT "ep93xx_rx: not end-of-frame " | 223 | printk(KERN_CRIT "ep93xx_rx: not end-of-frame " |
229 | " %.8x %.8x\n", rstat0, rstat1); | 224 | " %.8x %.8x\n", rstat0, rstat1); |
230 | if (!(rstat0 & RSTAT0_EOB)) | 225 | if (!(rstat0 & RSTAT0_EOB)) |
231 | printk(KERN_CRIT "ep93xx_rx: not end-of-buffer " | 226 | printk(KERN_CRIT "ep93xx_rx: not end-of-buffer " |
232 | " %.8x %.8x\n", rstat0, rstat1); | 227 | " %.8x %.8x\n", rstat0, rstat1); |
233 | if (!(rstat1 & RSTAT1_RFP)) | ||
234 | printk(KERN_CRIT "ep93xx_rx: buffer1 not done " | ||
235 | " %.8x %.8x\n", rstat0, rstat1); | ||
236 | if ((rstat1 & RSTAT1_BUFFER_INDEX) >> 16 != entry) | 228 | if ((rstat1 & RSTAT1_BUFFER_INDEX) >> 16 != entry) |
237 | printk(KERN_CRIT "ep93xx_rx: entry mismatch " | 229 | printk(KERN_CRIT "ep93xx_rx: entry mismatch " |
238 | " %.8x %.8x\n", rstat0, rstat1); | 230 | " %.8x %.8x\n", rstat0, rstat1); |
239 | 231 | ||
240 | if (!(rstat0 & RSTAT0_RWE)) { | 232 | if (!(rstat0 & RSTAT0_RWE)) { |
241 | printk(KERN_NOTICE "ep93xx_rx: receive error " | ||
242 | " %.8x %.8x\n", rstat0, rstat1); | ||
243 | |||
244 | ep->stats.rx_errors++; | 233 | ep->stats.rx_errors++; |
245 | if (rstat0 & RSTAT0_OE) | 234 | if (rstat0 & RSTAT0_OE) |
246 | ep->stats.rx_fifo_errors++; | 235 | ep->stats.rx_fifo_errors++; |
@@ -301,13 +290,8 @@ err: | |||
301 | 290 | ||
302 | static int ep93xx_have_more_rx(struct ep93xx_priv *ep) | 291 | static int ep93xx_have_more_rx(struct ep93xx_priv *ep) |
303 | { | 292 | { |
304 | struct ep93xx_rstat *rstat; | 293 | struct ep93xx_rstat *rstat = ep->descs->rstat + ep->rx_pointer; |
305 | int tail_offset; | 294 | return !!((rstat->rstat0 & RSTAT0_RFP) && (rstat->rstat1 & RSTAT1_RFP)); |
306 | |||
307 | rstat = ep->descs->rstat + ep->rx_pointer; | ||
308 | tail_offset = rdl(ep, REG_RXSTSQCURADD) - ep->descs_dma_addr; | ||
309 | |||
310 | return !((void *)rstat - (void *)ep->descs == tail_offset); | ||
311 | } | 295 | } |
312 | 296 | ||
313 | static int ep93xx_poll(struct net_device *dev, int *budget) | 297 | static int ep93xx_poll(struct net_device *dev, int *budget) |
@@ -347,7 +331,7 @@ static int ep93xx_xmit(struct sk_buff *skb, struct net_device *dev) | |||
347 | struct ep93xx_priv *ep = netdev_priv(dev); | 331 | struct ep93xx_priv *ep = netdev_priv(dev); |
348 | int entry; | 332 | int entry; |
349 | 333 | ||
350 | if (unlikely(skb->len) > MAX_PKT_SIZE) { | 334 | if (unlikely(skb->len > MAX_PKT_SIZE)) { |
351 | ep->stats.tx_dropped++; | 335 | ep->stats.tx_dropped++; |
352 | dev_kfree_skb(skb); | 336 | dev_kfree_skb(skb); |
353 | return NETDEV_TX_OK; | 337 | return NETDEV_TX_OK; |
@@ -379,10 +363,8 @@ static int ep93xx_xmit(struct sk_buff *skb, struct net_device *dev) | |||
379 | static void ep93xx_tx_complete(struct net_device *dev) | 363 | static void ep93xx_tx_complete(struct net_device *dev) |
380 | { | 364 | { |
381 | struct ep93xx_priv *ep = netdev_priv(dev); | 365 | struct ep93xx_priv *ep = netdev_priv(dev); |
382 | int tail_offset; | ||
383 | int wake; | 366 | int wake; |
384 | 367 | ||
385 | tail_offset = rdl(ep, REG_TXSTSQCURADD) - ep->descs_dma_addr; | ||
386 | wake = 0; | 368 | wake = 0; |
387 | 369 | ||
388 | spin_lock(&ep->tx_pending_lock); | 370 | spin_lock(&ep->tx_pending_lock); |
@@ -393,15 +375,13 @@ static void ep93xx_tx_complete(struct net_device *dev) | |||
393 | 375 | ||
394 | entry = ep->tx_clean_pointer; | 376 | entry = ep->tx_clean_pointer; |
395 | tstat = ep->descs->tstat + entry; | 377 | tstat = ep->descs->tstat + entry; |
396 | if ((void *)tstat - (void *)ep->descs == tail_offset) | ||
397 | break; | ||
398 | 378 | ||
399 | tstat0 = tstat->tstat0; | 379 | tstat0 = tstat->tstat0; |
380 | if (!(tstat0 & TSTAT0_TXFP)) | ||
381 | break; | ||
382 | |||
400 | tstat->tstat0 = 0; | 383 | tstat->tstat0 = 0; |
401 | 384 | ||
402 | if (!(tstat0 & TSTAT0_TXFP)) | ||
403 | printk(KERN_CRIT "ep93xx_tx_complete: buffer not done " | ||
404 | " %.8x\n", tstat0); | ||
405 | if (tstat0 & TSTAT0_FA) | 385 | if (tstat0 & TSTAT0_FA) |
406 | printk(KERN_CRIT "ep93xx_tx_complete: frame aborted " | 386 | printk(KERN_CRIT "ep93xx_tx_complete: frame aborted " |
407 | " %.8x\n", tstat0); | 387 | " %.8x\n", tstat0); |
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c index 4873dc610d22..7db3c8af0894 100644 --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c | |||
@@ -102,7 +102,7 @@ static void enable_mac(struct net_device *, int); | |||
102 | // externs | 102 | // externs |
103 | extern int get_ethernet_addr(char *ethernet_addr); | 103 | extern int get_ethernet_addr(char *ethernet_addr); |
104 | extern void str2eaddr(unsigned char *ea, unsigned char *str); | 104 | extern void str2eaddr(unsigned char *ea, unsigned char *str); |
105 | extern char * __init prom_getcmdline(void); | 105 | extern char * prom_getcmdline(void); |
106 | 106 | ||
107 | /* | 107 | /* |
108 | * Theory of operation | 108 | * Theory of operation |
diff --git a/drivers/net/b44.c b/drivers/net/b44.c index b124eee4eb10..474a4e3438db 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c | |||
@@ -908,8 +908,9 @@ static irqreturn_t b44_interrupt(int irq, void *dev_id) | |||
908 | istat = br32(bp, B44_ISTAT); | 908 | istat = br32(bp, B44_ISTAT); |
909 | imask = br32(bp, B44_IMASK); | 909 | imask = br32(bp, B44_IMASK); |
910 | 910 | ||
911 | /* ??? What the fuck is the purpose of the interrupt mask | 911 | /* The interrupt mask register controls which interrupt bits |
912 | * ??? register if we have to mask it out by hand anyways? | 912 | * will actually raise an interrupt to the CPU when set by hw/firmware, |
913 | * but doesn't mask off the bits. | ||
913 | */ | 914 | */ |
914 | istat &= imask; | 915 | istat &= imask; |
915 | if (istat) { | 916 | if (istat) { |
@@ -1706,14 +1707,15 @@ static void __b44_set_rx_mode(struct net_device *dev) | |||
1706 | 1707 | ||
1707 | __b44_set_mac_addr(bp); | 1708 | __b44_set_mac_addr(bp); |
1708 | 1709 | ||
1709 | if (dev->flags & IFF_ALLMULTI) | 1710 | if ((dev->flags & IFF_ALLMULTI) || |
1711 | (dev->mc_count > B44_MCAST_TABLE_SIZE)) | ||
1710 | val |= RXCONFIG_ALLMULTI; | 1712 | val |= RXCONFIG_ALLMULTI; |
1711 | else | 1713 | else |
1712 | i = __b44_load_mcast(bp, dev); | 1714 | i = __b44_load_mcast(bp, dev); |
1713 | 1715 | ||
1714 | for (; i < 64; i++) { | 1716 | for (; i < 64; i++) |
1715 | __b44_cam_write(bp, zero, i); | 1717 | __b44_cam_write(bp, zero, i); |
1716 | } | 1718 | |
1717 | bw32(bp, B44_RXCONFIG, val); | 1719 | bw32(bp, B44_RXCONFIG, val); |
1718 | val = br32(bp, B44_CAM_CTRL); | 1720 | val = br32(bp, B44_CAM_CTRL); |
1719 | bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE); | 1721 | bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE); |
@@ -2055,7 +2057,7 @@ static int b44_read_eeprom(struct b44 *bp, u8 *data) | |||
2055 | u16 *ptr = (u16 *) data; | 2057 | u16 *ptr = (u16 *) data; |
2056 | 2058 | ||
2057 | for (i = 0; i < 128; i += 2) | 2059 | for (i = 0; i < 128; i += 2) |
2058 | ptr[i / 2] = readw(bp->regs + 4096 + i); | 2060 | ptr[i / 2] = cpu_to_le16(readw(bp->regs + 4096 + i)); |
2059 | 2061 | ||
2060 | return 0; | 2062 | return 0; |
2061 | } | 2063 | } |
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c index e83bc825f6af..32923162179e 100644 --- a/drivers/net/bonding/bond_alb.c +++ b/drivers/net/bonding/bond_alb.c | |||
@@ -1433,7 +1433,7 @@ void bond_alb_monitor(struct bonding *bond) | |||
1433 | * write lock to protect from other code that also | 1433 | * write lock to protect from other code that also |
1434 | * sets the promiscuity. | 1434 | * sets the promiscuity. |
1435 | */ | 1435 | */ |
1436 | write_lock(&bond->curr_slave_lock); | 1436 | write_lock_bh(&bond->curr_slave_lock); |
1437 | 1437 | ||
1438 | if (bond_info->primary_is_promisc && | 1438 | if (bond_info->primary_is_promisc && |
1439 | (++bond_info->rlb_promisc_timeout_counter >= RLB_PROMISC_TIMEOUT)) { | 1439 | (++bond_info->rlb_promisc_timeout_counter >= RLB_PROMISC_TIMEOUT)) { |
@@ -1448,7 +1448,7 @@ void bond_alb_monitor(struct bonding *bond) | |||
1448 | bond_info->primary_is_promisc = 0; | 1448 | bond_info->primary_is_promisc = 0; |
1449 | } | 1449 | } |
1450 | 1450 | ||
1451 | write_unlock(&bond->curr_slave_lock); | 1451 | write_unlock_bh(&bond->curr_slave_lock); |
1452 | 1452 | ||
1453 | if (bond_info->rlb_rebalance) { | 1453 | if (bond_info->rlb_rebalance) { |
1454 | bond_info->rlb_rebalance = 0; | 1454 | bond_info->rlb_rebalance = 0; |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index c0bbddae4ec4..17a461152d39 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -4692,6 +4692,8 @@ static int bond_check_params(struct bond_params *params) | |||
4692 | return 0; | 4692 | return 0; |
4693 | } | 4693 | } |
4694 | 4694 | ||
4695 | static struct lock_class_key bonding_netdev_xmit_lock_key; | ||
4696 | |||
4695 | /* Create a new bond based on the specified name and bonding parameters. | 4697 | /* Create a new bond based on the specified name and bonding parameters. |
4696 | * Caller must NOT hold rtnl_lock; we need to release it here before we | 4698 | * Caller must NOT hold rtnl_lock; we need to release it here before we |
4697 | * set up our sysfs entries. | 4699 | * set up our sysfs entries. |
@@ -4727,6 +4729,9 @@ int bond_create(char *name, struct bond_params *params, struct bonding **newbond | |||
4727 | if (res < 0) { | 4729 | if (res < 0) { |
4728 | goto out_bond; | 4730 | goto out_bond; |
4729 | } | 4731 | } |
4732 | |||
4733 | lockdep_set_class(&bond_dev->_xmit_lock, &bonding_netdev_xmit_lock_key); | ||
4734 | |||
4730 | if (newbond) | 4735 | if (newbond) |
4731 | *newbond = bond_dev->priv; | 4736 | *newbond = bond_dev->priv; |
4732 | 4737 | ||
diff --git a/drivers/net/cris/eth_v10.c b/drivers/net/cris/eth_v10.c index 966b563e42bb..a03d781f6d0a 100644 --- a/drivers/net/cris/eth_v10.c +++ b/drivers/net/cris/eth_v10.c | |||
@@ -509,6 +509,8 @@ etrax_ethernet_init(void) | |||
509 | * does not share cacheline with any other data (to avoid cache bug) | 509 | * does not share cacheline with any other data (to avoid cache bug) |
510 | */ | 510 | */ |
511 | RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES); | 511 | RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES); |
512 | if (!RxDescList[i].skb) | ||
513 | return -ENOMEM; | ||
512 | RxDescList[i].descr.ctrl = 0; | 514 | RxDescList[i].descr.ctrl = 0; |
513 | RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE; | 515 | RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE; |
514 | RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]); | 516 | RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]); |
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index 27d5d2f02533..19ab3441269c 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -2039,7 +2039,6 @@ static int e100_change_mtu(struct net_device *netdev, int new_mtu) | |||
2039 | return 0; | 2039 | return 0; |
2040 | } | 2040 | } |
2041 | 2041 | ||
2042 | #ifdef CONFIG_PM | ||
2043 | static int e100_asf(struct nic *nic) | 2042 | static int e100_asf(struct nic *nic) |
2044 | { | 2043 | { |
2045 | /* ASF can be enabled from eeprom */ | 2044 | /* ASF can be enabled from eeprom */ |
@@ -2048,7 +2047,6 @@ static int e100_asf(struct nic *nic) | |||
2048 | !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) && | 2047 | !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) && |
2049 | ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE)); | 2048 | ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE)); |
2050 | } | 2049 | } |
2051 | #endif | ||
2052 | 2050 | ||
2053 | static int e100_up(struct nic *nic) | 2051 | static int e100_up(struct nic *nic) |
2054 | { | 2052 | { |
@@ -2715,34 +2713,35 @@ static void __devexit e100_remove(struct pci_dev *pdev) | |||
2715 | } | 2713 | } |
2716 | } | 2714 | } |
2717 | 2715 | ||
2716 | #ifdef CONFIG_PM | ||
2718 | static int e100_suspend(struct pci_dev *pdev, pm_message_t state) | 2717 | static int e100_suspend(struct pci_dev *pdev, pm_message_t state) |
2719 | { | 2718 | { |
2720 | struct net_device *netdev = pci_get_drvdata(pdev); | 2719 | struct net_device *netdev = pci_get_drvdata(pdev); |
2721 | struct nic *nic = netdev_priv(netdev); | 2720 | struct nic *nic = netdev_priv(netdev); |
2722 | 2721 | ||
2722 | #ifdef CONFIG_E100_NAPI | ||
2723 | if (netif_running(netdev)) | 2723 | if (netif_running(netdev)) |
2724 | e100_down(nic); | 2724 | netif_poll_disable(nic->netdev); |
2725 | e100_hw_reset(nic); | 2725 | #endif |
2726 | netif_device_detach(netdev); | 2726 | del_timer_sync(&nic->watchdog); |
2727 | netif_carrier_off(nic->netdev); | ||
2727 | 2728 | ||
2728 | #ifdef CONFIG_PM | ||
2729 | pci_save_state(pdev); | 2729 | pci_save_state(pdev); |
2730 | if (nic->flags & (wol_magic | e100_asf(nic))) | 2730 | |
2731 | #else | 2731 | if ((nic->flags & wol_magic) | e100_asf(nic)) { |
2732 | if (nic->flags & (wol_magic)) | 2732 | pci_enable_wake(pdev, PCI_D3hot, 1); |
2733 | #endif | 2733 | pci_enable_wake(pdev, PCI_D3cold, 1); |
2734 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); | 2734 | } else { |
2735 | else | 2735 | pci_enable_wake(pdev, PCI_D3hot, 0); |
2736 | /* disable PME */ | 2736 | pci_enable_wake(pdev, PCI_D3cold, 0); |
2737 | pci_enable_wake(pdev, 0, 0); | 2737 | } |
2738 | 2738 | ||
2739 | pci_disable_device(pdev); | 2739 | pci_disable_device(pdev); |
2740 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 2740 | pci_set_power_state(pdev, PCI_D3hot); |
2741 | 2741 | ||
2742 | return 0; | 2742 | return 0; |
2743 | } | 2743 | } |
2744 | 2744 | ||
2745 | #ifdef CONFIG_PM | ||
2746 | static int e100_resume(struct pci_dev *pdev) | 2745 | static int e100_resume(struct pci_dev *pdev) |
2747 | { | 2746 | { |
2748 | struct net_device *netdev = pci_get_drvdata(pdev); | 2747 | struct net_device *netdev = pci_get_drvdata(pdev); |
@@ -2764,7 +2763,26 @@ static int e100_resume(struct pci_dev *pdev) | |||
2764 | 2763 | ||
2765 | static void e100_shutdown(struct pci_dev *pdev) | 2764 | static void e100_shutdown(struct pci_dev *pdev) |
2766 | { | 2765 | { |
2767 | e100_suspend(pdev, PMSG_SUSPEND); | 2766 | struct net_device *netdev = pci_get_drvdata(pdev); |
2767 | struct nic *nic = netdev_priv(netdev); | ||
2768 | |||
2769 | #ifdef CONFIG_E100_NAPI | ||
2770 | if (netif_running(netdev)) | ||
2771 | netif_poll_disable(nic->netdev); | ||
2772 | #endif | ||
2773 | del_timer_sync(&nic->watchdog); | ||
2774 | netif_carrier_off(nic->netdev); | ||
2775 | |||
2776 | if ((nic->flags & wol_magic) | e100_asf(nic)) { | ||
2777 | pci_enable_wake(pdev, PCI_D3hot, 1); | ||
2778 | pci_enable_wake(pdev, PCI_D3cold, 1); | ||
2779 | } else { | ||
2780 | pci_enable_wake(pdev, PCI_D3hot, 0); | ||
2781 | pci_enable_wake(pdev, PCI_D3cold, 0); | ||
2782 | } | ||
2783 | |||
2784 | pci_disable_device(pdev); | ||
2785 | pci_set_power_state(pdev, PCI_D3hot); | ||
2768 | } | 2786 | } |
2769 | 2787 | ||
2770 | /* ------------------ PCI Error Recovery infrastructure -------------- */ | 2788 | /* ------------------ PCI Error Recovery infrastructure -------------- */ |
@@ -2848,9 +2866,9 @@ static struct pci_driver e100_driver = { | |||
2848 | .id_table = e100_id_table, | 2866 | .id_table = e100_id_table, |
2849 | .probe = e100_probe, | 2867 | .probe = e100_probe, |
2850 | .remove = __devexit_p(e100_remove), | 2868 | .remove = __devexit_p(e100_remove), |
2869 | #ifdef CONFIG_PM | ||
2851 | /* Power Management hooks */ | 2870 | /* Power Management hooks */ |
2852 | .suspend = e100_suspend, | 2871 | .suspend = e100_suspend, |
2853 | #ifdef CONFIG_PM | ||
2854 | .resume = e100_resume, | 2872 | .resume = e100_resume, |
2855 | #endif | 2873 | #endif |
2856 | .shutdown = e100_shutdown, | 2874 | .shutdown = e100_shutdown, |
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index 773821e4cf57..c564adbd669b 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -461,7 +461,8 @@ e1000_get_regs(struct net_device *netdev, | |||
461 | regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */ | 461 | regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */ |
462 | regs_buff[25] = regs_buff[24]; /* phy remote receiver status */ | 462 | regs_buff[25] = regs_buff[24]; /* phy remote receiver status */ |
463 | if (hw->mac_type >= e1000_82540 && | 463 | if (hw->mac_type >= e1000_82540 && |
464 | hw->media_type == e1000_media_type_copper) { | 464 | hw->mac_type < e1000_82571 && |
465 | hw->media_type == e1000_media_type_copper) { | ||
465 | regs_buff[26] = E1000_READ_REG(hw, MANC); | 466 | regs_buff[26] = E1000_READ_REG(hw, MANC); |
466 | } | 467 | } |
467 | } | 468 | } |
@@ -1690,6 +1691,7 @@ static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wol | |||
1690 | int retval = 1; /* fail by default */ | 1691 | int retval = 1; /* fail by default */ |
1691 | 1692 | ||
1692 | switch (hw->device_id) { | 1693 | switch (hw->device_id) { |
1694 | case E1000_DEV_ID_82542: | ||
1693 | case E1000_DEV_ID_82543GC_FIBER: | 1695 | case E1000_DEV_ID_82543GC_FIBER: |
1694 | case E1000_DEV_ID_82543GC_COPPER: | 1696 | case E1000_DEV_ID_82543GC_COPPER: |
1695 | case E1000_DEV_ID_82544EI_FIBER: | 1697 | case E1000_DEV_ID_82544EI_FIBER: |
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index 112447fd8bf2..449a60303e07 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h | |||
@@ -1961,9 +1961,9 @@ struct e1000_hw { | |||
1961 | #define E1000_RXDCTL_GRAN 0x01000000 /* RXDCTL Granularity */ | 1961 | #define E1000_RXDCTL_GRAN 0x01000000 /* RXDCTL Granularity */ |
1962 | 1962 | ||
1963 | /* Transmit Descriptor Control */ | 1963 | /* Transmit Descriptor Control */ |
1964 | #define E1000_TXDCTL_PTHRESH 0x000000FF /* TXDCTL Prefetch Threshold */ | 1964 | #define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */ |
1965 | #define E1000_TXDCTL_HTHRESH 0x0000FF00 /* TXDCTL Host Threshold */ | 1965 | #define E1000_TXDCTL_HTHRESH 0x00003F00 /* TXDCTL Host Threshold */ |
1966 | #define E1000_TXDCTL_WTHRESH 0x00FF0000 /* TXDCTL Writeback Threshold */ | 1966 | #define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */ |
1967 | #define E1000_TXDCTL_GRAN 0x01000000 /* TXDCTL Granularity */ | 1967 | #define E1000_TXDCTL_GRAN 0x01000000 /* TXDCTL Granularity */ |
1968 | #define E1000_TXDCTL_LWTHRESH 0xFE000000 /* TXDCTL Low Threshold */ | 1968 | #define E1000_TXDCTL_LWTHRESH 0xFE000000 /* TXDCTL Low Threshold */ |
1969 | #define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */ | 1969 | #define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */ |
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index ce0d35fe3947..726ec5e88ab2 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -35,7 +35,7 @@ static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; | |||
35 | #else | 35 | #else |
36 | #define DRIVERNAPI "-NAPI" | 36 | #define DRIVERNAPI "-NAPI" |
37 | #endif | 37 | #endif |
38 | #define DRV_VERSION "7.2.9-k2"DRIVERNAPI | 38 | #define DRV_VERSION "7.2.9-k4"DRIVERNAPI |
39 | char e1000_driver_version[] = DRV_VERSION; | 39 | char e1000_driver_version[] = DRV_VERSION; |
40 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; | 40 | static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
41 | 41 | ||
@@ -699,7 +699,10 @@ e1000_reset(struct e1000_adapter *adapter) | |||
699 | phy_data); | 699 | phy_data); |
700 | } | 700 | } |
701 | 701 | ||
702 | if ((adapter->en_mng_pt) && (adapter->hw.mac_type < e1000_82571)) { | 702 | if ((adapter->en_mng_pt) && |
703 | (adapter->hw.mac_type >= e1000_82540) && | ||
704 | (adapter->hw.mac_type < e1000_82571) && | ||
705 | (adapter->hw.media_type == e1000_media_type_copper)) { | ||
703 | manc = E1000_READ_REG(&adapter->hw, MANC); | 706 | manc = E1000_READ_REG(&adapter->hw, MANC); |
704 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); | 707 | manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST); |
705 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | 708 | E1000_WRITE_REG(&adapter->hw, MANC, manc); |
@@ -1076,8 +1079,9 @@ e1000_remove(struct pci_dev *pdev) | |||
1076 | 1079 | ||
1077 | flush_scheduled_work(); | 1080 | flush_scheduled_work(); |
1078 | 1081 | ||
1079 | if (adapter->hw.mac_type < e1000_82571 && | 1082 | if (adapter->hw.mac_type >= e1000_82540 && |
1080 | adapter->hw.media_type == e1000_media_type_copper) { | 1083 | adapter->hw.mac_type < e1000_82571 && |
1084 | adapter->hw.media_type == e1000_media_type_copper) { | ||
1081 | manc = E1000_READ_REG(&adapter->hw, MANC); | 1085 | manc = E1000_READ_REG(&adapter->hw, MANC); |
1082 | if (manc & E1000_MANC_SMBUS_EN) { | 1086 | if (manc & E1000_MANC_SMBUS_EN) { |
1083 | manc |= E1000_MANC_ARP_EN; | 1087 | manc |= E1000_MANC_ARP_EN; |
@@ -1804,9 +1808,11 @@ e1000_setup_rctl(struct e1000_adapter *adapter) | |||
1804 | * followed by the page buffers. Therefore, skb->data is | 1808 | * followed by the page buffers. Therefore, skb->data is |
1805 | * sized to hold the largest protocol header. | 1809 | * sized to hold the largest protocol header. |
1806 | */ | 1810 | */ |
1811 | /* allocations using alloc_page take too long for regular MTU | ||
1812 | * so only enable packet split for jumbo frames */ | ||
1807 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); | 1813 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1808 | if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) && | 1814 | if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) && |
1809 | PAGE_SIZE <= 16384) | 1815 | PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE)) |
1810 | adapter->rx_ps_pages = pages; | 1816 | adapter->rx_ps_pages = pages; |
1811 | else | 1817 | else |
1812 | adapter->rx_ps_pages = 0; | 1818 | adapter->rx_ps_pages = 0; |
@@ -2986,6 +2992,11 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2986 | return NETDEV_TX_OK; | 2992 | return NETDEV_TX_OK; |
2987 | } | 2993 | } |
2988 | 2994 | ||
2995 | /* 82571 and newer doesn't need the workaround that limited descriptor | ||
2996 | * length to 4kB */ | ||
2997 | if (adapter->hw.mac_type >= e1000_82571) | ||
2998 | max_per_txd = 8192; | ||
2999 | |||
2989 | #ifdef NETIF_F_TSO | 3000 | #ifdef NETIF_F_TSO |
2990 | mss = skb_shinfo(skb)->gso_size; | 3001 | mss = skb_shinfo(skb)->gso_size; |
2991 | /* The controller does a simple calculation to | 3002 | /* The controller does a simple calculation to |
@@ -3775,9 +3786,6 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter, | |||
3775 | 3786 | ||
3776 | length = le16_to_cpu(rx_desc->length); | 3787 | length = le16_to_cpu(rx_desc->length); |
3777 | 3788 | ||
3778 | /* adjust length to remove Ethernet CRC */ | ||
3779 | length -= 4; | ||
3780 | |||
3781 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { | 3789 | if (unlikely(!(status & E1000_RXD_STAT_EOP))) { |
3782 | /* All receives must fit into a single buffer */ | 3790 | /* All receives must fit into a single buffer */ |
3783 | E1000_DBG("%s: Receive packet consumed multiple" | 3791 | E1000_DBG("%s: Receive packet consumed multiple" |
@@ -3805,6 +3813,10 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter, | |||
3805 | } | 3813 | } |
3806 | } | 3814 | } |
3807 | 3815 | ||
3816 | /* adjust length to remove Ethernet CRC, this must be | ||
3817 | * done after the TBI_ACCEPT workaround above */ | ||
3818 | length -= 4; | ||
3819 | |||
3808 | /* code added for copybreak, this should improve | 3820 | /* code added for copybreak, this should improve |
3809 | * performance for small packets with large amounts | 3821 | * performance for small packets with large amounts |
3810 | * of reassembly being done in the stack */ | 3822 | * of reassembly being done in the stack */ |
@@ -4773,8 +4785,9 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4773 | pci_enable_wake(pdev, PCI_D3cold, 0); | 4785 | pci_enable_wake(pdev, PCI_D3cold, 0); |
4774 | } | 4786 | } |
4775 | 4787 | ||
4776 | if (adapter->hw.mac_type < e1000_82571 && | 4788 | if (adapter->hw.mac_type >= e1000_82540 && |
4777 | adapter->hw.media_type == e1000_media_type_copper) { | 4789 | adapter->hw.mac_type < e1000_82571 && |
4790 | adapter->hw.media_type == e1000_media_type_copper) { | ||
4778 | manc = E1000_READ_REG(&adapter->hw, MANC); | 4791 | manc = E1000_READ_REG(&adapter->hw, MANC); |
4779 | if (manc & E1000_MANC_SMBUS_EN) { | 4792 | if (manc & E1000_MANC_SMBUS_EN) { |
4780 | manc |= E1000_MANC_ARP_EN; | 4793 | manc |= E1000_MANC_ARP_EN; |
@@ -4787,6 +4800,9 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4787 | if (adapter->hw.phy_type == e1000_phy_igp_3) | 4800 | if (adapter->hw.phy_type == e1000_phy_igp_3) |
4788 | e1000_phy_powerdown_workaround(&adapter->hw); | 4801 | e1000_phy_powerdown_workaround(&adapter->hw); |
4789 | 4802 | ||
4803 | if (netif_running(netdev)) | ||
4804 | e1000_free_irq(adapter); | ||
4805 | |||
4790 | /* Release control of h/w to f/w. If f/w is AMT enabled, this | 4806 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
4791 | * would have already happened in close and is redundant. */ | 4807 | * would have already happened in close and is redundant. */ |
4792 | e1000_release_hw_control(adapter); | 4808 | e1000_release_hw_control(adapter); |
@@ -4817,6 +4833,10 @@ e1000_resume(struct pci_dev *pdev) | |||
4817 | pci_enable_wake(pdev, PCI_D3hot, 0); | 4833 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4818 | pci_enable_wake(pdev, PCI_D3cold, 0); | 4834 | pci_enable_wake(pdev, PCI_D3cold, 0); |
4819 | 4835 | ||
4836 | if (netif_running(netdev) && (err = e1000_request_irq(adapter))) | ||
4837 | return err; | ||
4838 | |||
4839 | e1000_power_up_phy(adapter); | ||
4820 | e1000_reset(adapter); | 4840 | e1000_reset(adapter); |
4821 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | 4841 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); |
4822 | 4842 | ||
@@ -4825,8 +4845,9 @@ e1000_resume(struct pci_dev *pdev) | |||
4825 | 4845 | ||
4826 | netif_device_attach(netdev); | 4846 | netif_device_attach(netdev); |
4827 | 4847 | ||
4828 | if (adapter->hw.mac_type < e1000_82571 && | 4848 | if (adapter->hw.mac_type >= e1000_82540 && |
4829 | adapter->hw.media_type == e1000_media_type_copper) { | 4849 | adapter->hw.mac_type < e1000_82571 && |
4850 | adapter->hw.media_type == e1000_media_type_copper) { | ||
4830 | manc = E1000_READ_REG(&adapter->hw, MANC); | 4851 | manc = E1000_READ_REG(&adapter->hw, MANC); |
4831 | manc &= ~(E1000_MANC_ARP_EN); | 4852 | manc &= ~(E1000_MANC_ARP_EN); |
4832 | E1000_WRITE_REG(&adapter->hw, MANC, manc); | 4853 | E1000_WRITE_REG(&adapter->hw, MANC, manc); |
@@ -4914,10 +4935,6 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |||
4914 | pci_enable_wake(pdev, PCI_D3hot, 0); | 4935 | pci_enable_wake(pdev, PCI_D3hot, 0); |
4915 | pci_enable_wake(pdev, PCI_D3cold, 0); | 4936 | pci_enable_wake(pdev, PCI_D3cold, 0); |
4916 | 4937 | ||
4917 | /* Perform card reset only on one instance of the card */ | ||
4918 | if (PCI_FUNC (pdev->devfn) != 0) | ||
4919 | return PCI_ERS_RESULT_RECOVERED; | ||
4920 | |||
4921 | e1000_reset(adapter); | 4938 | e1000_reset(adapter); |
4922 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); | 4939 | E1000_WRITE_REG(&adapter->hw, WUS, ~0); |
4923 | 4940 | ||
@@ -4948,6 +4965,7 @@ static void e1000_io_resume(struct pci_dev *pdev) | |||
4948 | netif_device_attach(netdev); | 4965 | netif_device_attach(netdev); |
4949 | 4966 | ||
4950 | if (adapter->hw.mac_type >= e1000_82540 && | 4967 | if (adapter->hw.mac_type >= e1000_82540 && |
4968 | adapter->hw.mac_type < e1000_82571 && | ||
4951 | adapter->hw.media_type == e1000_media_type_copper) { | 4969 | adapter->hw.media_type == e1000_media_type_copper) { |
4952 | manc = E1000_READ_REG(&adapter->hw, MANC); | 4970 | manc = E1000_READ_REG(&adapter->hw, MANC); |
4953 | manc &= ~(E1000_MANC_ARP_EN); | 4971 | manc &= ~(E1000_MANC_ARP_EN); |
diff --git a/drivers/net/ehea/ehea.h b/drivers/net/ehea/ehea.h index 23b451a8ae12..39ad9f73d1ec 100644 --- a/drivers/net/ehea/ehea.h +++ b/drivers/net/ehea/ehea.h | |||
@@ -39,7 +39,7 @@ | |||
39 | #include <asm/io.h> | 39 | #include <asm/io.h> |
40 | 40 | ||
41 | #define DRV_NAME "ehea" | 41 | #define DRV_NAME "ehea" |
42 | #define DRV_VERSION "EHEA_0028" | 42 | #define DRV_VERSION "EHEA_0043" |
43 | 43 | ||
44 | #define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \ | 44 | #define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \ |
45 | | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR) | 45 | | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR) |
@@ -50,6 +50,7 @@ | |||
50 | #define EHEA_MAX_ENTRIES_SQ 32767 | 50 | #define EHEA_MAX_ENTRIES_SQ 32767 |
51 | #define EHEA_MIN_ENTRIES_QP 127 | 51 | #define EHEA_MIN_ENTRIES_QP 127 |
52 | 52 | ||
53 | #define EHEA_SMALL_QUEUES | ||
53 | #define EHEA_NUM_TX_QP 1 | 54 | #define EHEA_NUM_TX_QP 1 |
54 | 55 | ||
55 | #ifdef EHEA_SMALL_QUEUES | 56 | #ifdef EHEA_SMALL_QUEUES |
@@ -59,11 +60,11 @@ | |||
59 | #define EHEA_DEF_ENTRIES_RQ2 1023 | 60 | #define EHEA_DEF_ENTRIES_RQ2 1023 |
60 | #define EHEA_DEF_ENTRIES_RQ3 1023 | 61 | #define EHEA_DEF_ENTRIES_RQ3 1023 |
61 | #else | 62 | #else |
62 | #define EHEA_MAX_CQE_COUNT 32000 | 63 | #define EHEA_MAX_CQE_COUNT 4080 |
63 | #define EHEA_DEF_ENTRIES_SQ 16000 | 64 | #define EHEA_DEF_ENTRIES_SQ 4080 |
64 | #define EHEA_DEF_ENTRIES_RQ1 32080 | 65 | #define EHEA_DEF_ENTRIES_RQ1 8160 |
65 | #define EHEA_DEF_ENTRIES_RQ2 4020 | 66 | #define EHEA_DEF_ENTRIES_RQ2 2040 |
66 | #define EHEA_DEF_ENTRIES_RQ3 4020 | 67 | #define EHEA_DEF_ENTRIES_RQ3 2040 |
67 | #endif | 68 | #endif |
68 | 69 | ||
69 | #define EHEA_MAX_ENTRIES_EQ 20 | 70 | #define EHEA_MAX_ENTRIES_EQ 20 |
@@ -104,9 +105,6 @@ | |||
104 | #define EHEA_BCMC_VLANID_ALL 0x01 | 105 | #define EHEA_BCMC_VLANID_ALL 0x01 |
105 | #define EHEA_BCMC_VLANID_SINGLE 0x00 | 106 | #define EHEA_BCMC_VLANID_SINGLE 0x00 |
106 | 107 | ||
107 | /* Use this define to kmallocate pHYP control blocks */ | ||
108 | #define H_CB_ALIGNMENT 4096 | ||
109 | |||
110 | #define EHEA_CACHE_LINE 128 | 108 | #define EHEA_CACHE_LINE 128 |
111 | 109 | ||
112 | /* Memory Regions */ | 110 | /* Memory Regions */ |
diff --git a/drivers/net/ehea/ehea_ethtool.c b/drivers/net/ehea/ehea_ethtool.c index 82eb2fb8c75e..9f57c2e78ced 100644 --- a/drivers/net/ehea/ehea_ethtool.c +++ b/drivers/net/ehea/ehea_ethtool.c | |||
@@ -238,7 +238,7 @@ static void ehea_get_ethtool_stats(struct net_device *dev, | |||
238 | data[i++] = port->port_res[0].swqe_refill_th; | 238 | data[i++] = port->port_res[0].swqe_refill_th; |
239 | data[i++] = port->resets; | 239 | data[i++] = port->resets; |
240 | 240 | ||
241 | cb6 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 241 | cb6 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
242 | if (!cb6) { | 242 | if (!cb6) { |
243 | ehea_error("no mem for cb6"); | 243 | ehea_error("no mem for cb6"); |
244 | return; | 244 | return; |
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c index c6b31775e26b..6ad696101418 100644 --- a/drivers/net/ehea/ehea_main.c +++ b/drivers/net/ehea/ehea_main.c | |||
@@ -92,7 +92,7 @@ static struct net_device_stats *ehea_get_stats(struct net_device *dev) | |||
92 | 92 | ||
93 | memset(stats, 0, sizeof(*stats)); | 93 | memset(stats, 0, sizeof(*stats)); |
94 | 94 | ||
95 | cb2 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 95 | cb2 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
96 | if (!cb2) { | 96 | if (!cb2) { |
97 | ehea_error("no mem for cb2"); | 97 | ehea_error("no mem for cb2"); |
98 | goto out; | 98 | goto out; |
@@ -586,8 +586,8 @@ int ehea_sense_port_attr(struct ehea_port *port) | |||
586 | u64 hret; | 586 | u64 hret; |
587 | struct hcp_ehea_port_cb0 *cb0; | 587 | struct hcp_ehea_port_cb0 *cb0; |
588 | 588 | ||
589 | cb0 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 589 | cb0 = kzalloc(PAGE_SIZE, GFP_ATOMIC); /* May be called via */ |
590 | if (!cb0) { | 590 | if (!cb0) { /* ehea_neq_tasklet() */ |
591 | ehea_error("no mem for cb0"); | 591 | ehea_error("no mem for cb0"); |
592 | ret = -ENOMEM; | 592 | ret = -ENOMEM; |
593 | goto out; | 593 | goto out; |
@@ -670,7 +670,7 @@ int ehea_set_portspeed(struct ehea_port *port, u32 port_speed) | |||
670 | u64 hret; | 670 | u64 hret; |
671 | int ret = 0; | 671 | int ret = 0; |
672 | 672 | ||
673 | cb4 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 673 | cb4 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
674 | if (!cb4) { | 674 | if (!cb4) { |
675 | ehea_error("no mem for cb4"); | 675 | ehea_error("no mem for cb4"); |
676 | ret = -ENOMEM; | 676 | ret = -ENOMEM; |
@@ -765,8 +765,7 @@ static void ehea_parse_eqe(struct ehea_adapter *adapter, u64 eqe) | |||
765 | 765 | ||
766 | if (EHEA_BMASK_GET(NEQE_PORT_UP, eqe)) { | 766 | if (EHEA_BMASK_GET(NEQE_PORT_UP, eqe)) { |
767 | if (!netif_carrier_ok(port->netdev)) { | 767 | if (!netif_carrier_ok(port->netdev)) { |
768 | ret = ehea_sense_port_attr( | 768 | ret = ehea_sense_port_attr(port); |
769 | adapter->port[portnum]); | ||
770 | if (ret) { | 769 | if (ret) { |
771 | ehea_error("failed resensing port " | 770 | ehea_error("failed resensing port " |
772 | "attributes"); | 771 | "attributes"); |
@@ -818,7 +817,7 @@ static void ehea_parse_eqe(struct ehea_adapter *adapter, u64 eqe) | |||
818 | netif_stop_queue(port->netdev); | 817 | netif_stop_queue(port->netdev); |
819 | break; | 818 | break; |
820 | default: | 819 | default: |
821 | ehea_error("unknown event code %x", ec); | 820 | ehea_error("unknown event code %x, eqe=0x%lX", ec, eqe); |
822 | break; | 821 | break; |
823 | } | 822 | } |
824 | } | 823 | } |
@@ -986,7 +985,7 @@ static int ehea_configure_port(struct ehea_port *port) | |||
986 | struct hcp_ehea_port_cb0 *cb0; | 985 | struct hcp_ehea_port_cb0 *cb0; |
987 | 986 | ||
988 | ret = -ENOMEM; | 987 | ret = -ENOMEM; |
989 | cb0 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 988 | cb0 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
990 | if (!cb0) | 989 | if (!cb0) |
991 | goto out; | 990 | goto out; |
992 | 991 | ||
@@ -1444,7 +1443,7 @@ static int ehea_set_mac_addr(struct net_device *dev, void *sa) | |||
1444 | goto out; | 1443 | goto out; |
1445 | } | 1444 | } |
1446 | 1445 | ||
1447 | cb0 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 1446 | cb0 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
1448 | if (!cb0) { | 1447 | if (!cb0) { |
1449 | ehea_error("no mem for cb0"); | 1448 | ehea_error("no mem for cb0"); |
1450 | ret = -ENOMEM; | 1449 | ret = -ENOMEM; |
@@ -1502,7 +1501,7 @@ static void ehea_promiscuous(struct net_device *dev, int enable) | |||
1502 | if ((enable && port->promisc) || (!enable && !port->promisc)) | 1501 | if ((enable && port->promisc) || (!enable && !port->promisc)) |
1503 | return; | 1502 | return; |
1504 | 1503 | ||
1505 | cb7 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 1504 | cb7 = kzalloc(PAGE_SIZE, GFP_ATOMIC); |
1506 | if (!cb7) { | 1505 | if (!cb7) { |
1507 | ehea_error("no mem for cb7"); | 1506 | ehea_error("no mem for cb7"); |
1508 | goto out; | 1507 | goto out; |
@@ -1606,7 +1605,7 @@ static void ehea_add_multicast_entry(struct ehea_port* port, u8* mc_mac_addr) | |||
1606 | struct ehea_mc_list *ehea_mcl_entry; | 1605 | struct ehea_mc_list *ehea_mcl_entry; |
1607 | u64 hret; | 1606 | u64 hret; |
1608 | 1607 | ||
1609 | ehea_mcl_entry = kzalloc(sizeof(*ehea_mcl_entry), GFP_KERNEL); | 1608 | ehea_mcl_entry = kzalloc(sizeof(*ehea_mcl_entry), GFP_ATOMIC); |
1610 | if (!ehea_mcl_entry) { | 1609 | if (!ehea_mcl_entry) { |
1611 | ehea_error("no mem for mcl_entry"); | 1610 | ehea_error("no mem for mcl_entry"); |
1612 | return; | 1611 | return; |
@@ -1841,7 +1840,7 @@ static int ehea_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1841 | 1840 | ||
1842 | if (netif_msg_tx_queued(port)) { | 1841 | if (netif_msg_tx_queued(port)) { |
1843 | ehea_info("post swqe on QP %d", pr->qp->init_attr.qp_nr); | 1842 | ehea_info("post swqe on QP %d", pr->qp->init_attr.qp_nr); |
1844 | ehea_dump(swqe, sizeof(*swqe), "swqe"); | 1843 | ehea_dump(swqe, 512, "swqe"); |
1845 | } | 1844 | } |
1846 | 1845 | ||
1847 | ehea_post_swqe(pr->qp, swqe); | 1846 | ehea_post_swqe(pr->qp, swqe); |
@@ -1871,7 +1870,7 @@ static void ehea_vlan_rx_register(struct net_device *dev, | |||
1871 | 1870 | ||
1872 | port->vgrp = grp; | 1871 | port->vgrp = grp; |
1873 | 1872 | ||
1874 | cb1 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 1873 | cb1 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
1875 | if (!cb1) { | 1874 | if (!cb1) { |
1876 | ehea_error("no mem for cb1"); | 1875 | ehea_error("no mem for cb1"); |
1877 | goto out; | 1876 | goto out; |
@@ -1900,7 +1899,7 @@ static void ehea_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) | |||
1900 | int index; | 1899 | int index; |
1901 | u64 hret; | 1900 | u64 hret; |
1902 | 1901 | ||
1903 | cb1 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 1902 | cb1 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
1904 | if (!cb1) { | 1903 | if (!cb1) { |
1905 | ehea_error("no mem for cb1"); | 1904 | ehea_error("no mem for cb1"); |
1906 | goto out; | 1905 | goto out; |
@@ -1936,7 +1935,7 @@ static void ehea_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | |||
1936 | if (port->vgrp) | 1935 | if (port->vgrp) |
1937 | port->vgrp->vlan_devices[vid] = NULL; | 1936 | port->vgrp->vlan_devices[vid] = NULL; |
1938 | 1937 | ||
1939 | cb1 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 1938 | cb1 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
1940 | if (!cb1) { | 1939 | if (!cb1) { |
1941 | ehea_error("no mem for cb1"); | 1940 | ehea_error("no mem for cb1"); |
1942 | goto out; | 1941 | goto out; |
@@ -1969,7 +1968,7 @@ int ehea_activate_qp(struct ehea_adapter *adapter, struct ehea_qp *qp) | |||
1969 | u64 dummy64 = 0; | 1968 | u64 dummy64 = 0; |
1970 | struct hcp_modify_qp_cb0* cb0; | 1969 | struct hcp_modify_qp_cb0* cb0; |
1971 | 1970 | ||
1972 | cb0 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 1971 | cb0 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
1973 | if (!cb0) { | 1972 | if (!cb0) { |
1974 | ret = -ENOMEM; | 1973 | ret = -ENOMEM; |
1975 | goto out; | 1974 | goto out; |
@@ -2270,7 +2269,7 @@ int ehea_sense_adapter_attr(struct ehea_adapter *adapter) | |||
2270 | u64 hret; | 2269 | u64 hret; |
2271 | int ret; | 2270 | int ret; |
2272 | 2271 | ||
2273 | cb = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 2272 | cb = kzalloc(PAGE_SIZE, GFP_KERNEL); |
2274 | if (!cb) { | 2273 | if (!cb) { |
2275 | ret = -ENOMEM; | 2274 | ret = -ENOMEM; |
2276 | goto out; | 2275 | goto out; |
@@ -2341,7 +2340,7 @@ static int ehea_setup_single_port(struct ehea_port *port, | |||
2341 | goto out; | 2340 | goto out; |
2342 | 2341 | ||
2343 | /* Enable Jumbo frames */ | 2342 | /* Enable Jumbo frames */ |
2344 | cb4 = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL); | 2343 | cb4 = kzalloc(PAGE_SIZE, GFP_KERNEL); |
2345 | if (!cb4) { | 2344 | if (!cb4) { |
2346 | ehea_error("no mem for cb4"); | 2345 | ehea_error("no mem for cb4"); |
2347 | } else { | 2346 | } else { |
diff --git a/drivers/net/ehea/ehea_phyp.c b/drivers/net/ehea/ehea_phyp.c index 4a85aca4c7e9..0cfc2bc1a27b 100644 --- a/drivers/net/ehea/ehea_phyp.c +++ b/drivers/net/ehea/ehea_phyp.c | |||
@@ -44,71 +44,99 @@ static inline u16 get_order_of_qentries(u16 queue_entries) | |||
44 | #define H_ALL_RES_TYPE_MR 5 | 44 | #define H_ALL_RES_TYPE_MR 5 |
45 | #define H_ALL_RES_TYPE_MW 6 | 45 | #define H_ALL_RES_TYPE_MW 6 |
46 | 46 | ||
47 | static long ehea_hcall_9arg_9ret(unsigned long opcode, | 47 | static long ehea_plpar_hcall_norets(unsigned long opcode, |
48 | unsigned long arg1, unsigned long arg2, | 48 | unsigned long arg1, |
49 | unsigned long arg3, unsigned long arg4, | 49 | unsigned long arg2, |
50 | unsigned long arg5, unsigned long arg6, | 50 | unsigned long arg3, |
51 | unsigned long arg7, unsigned long arg8, | 51 | unsigned long arg4, |
52 | unsigned long arg9, unsigned long *out1, | 52 | unsigned long arg5, |
53 | unsigned long *out2,unsigned long *out3, | 53 | unsigned long arg6, |
54 | unsigned long *out4,unsigned long *out5, | 54 | unsigned long arg7) |
55 | unsigned long *out6,unsigned long *out7, | ||
56 | unsigned long *out8,unsigned long *out9) | ||
57 | { | 55 | { |
58 | long hret; | 56 | long ret; |
59 | int i, sleep_msecs; | 57 | int i, sleep_msecs; |
60 | 58 | ||
61 | for (i = 0; i < 5; i++) { | 59 | for (i = 0; i < 5; i++) { |
62 | hret = plpar_hcall_9arg_9ret(opcode,arg1, arg2, arg3, arg4, | 60 | ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4, |
63 | arg5, arg6, arg7, arg8, arg9, out1, | 61 | arg5, arg6, arg7); |
64 | out2, out3, out4, out5, out6, out7, | 62 | |
65 | out8, out9); | 63 | if (H_IS_LONG_BUSY(ret)) { |
66 | if (H_IS_LONG_BUSY(hret)) { | 64 | sleep_msecs = get_longbusy_msecs(ret); |
67 | sleep_msecs = get_longbusy_msecs(hret); | ||
68 | msleep_interruptible(sleep_msecs); | 65 | msleep_interruptible(sleep_msecs); |
69 | continue; | 66 | continue; |
70 | } | 67 | } |
71 | 68 | ||
72 | if (hret < H_SUCCESS) | 69 | if (ret < H_SUCCESS) |
73 | ehea_error("op=%lx hret=%lx " | 70 | ehea_error("opcode=%lx ret=%lx" |
74 | "i1=%lx i2=%lx i3=%lx i4=%lx i5=%lx i6=%lx " | 71 | " arg1=%lx arg2=%lx arg3=%lx arg4=%lx" |
75 | "i7=%lx i8=%lx i9=%lx " | 72 | " arg5=%lx arg6=%lx arg7=%lx ", |
76 | "o1=%lx o2=%lx o3=%lx o4=%lx o5=%lx o6=%lx " | 73 | opcode, ret, |
77 | "o7=%lx o8=%lx o9=%lx", | 74 | arg1, arg2, arg3, arg4, arg5, |
78 | opcode, hret, arg1, arg2, arg3, arg4, arg5, | 75 | arg6, arg7); |
79 | arg6, arg7, arg8, arg9, *out1, *out2, *out3, | 76 | |
80 | *out4, *out5, *out6, *out7, *out8, *out9); | 77 | return ret; |
81 | return hret; | ||
82 | } | 78 | } |
79 | |||
83 | return H_BUSY; | 80 | return H_BUSY; |
84 | } | 81 | } |
85 | 82 | ||
86 | u64 ehea_h_query_ehea_qp(const u64 adapter_handle, const u8 qp_category, | 83 | static long ehea_plpar_hcall9(unsigned long opcode, |
87 | const u64 qp_handle, const u64 sel_mask, void *cb_addr) | 84 | unsigned long *outs, /* array of 9 outputs */ |
85 | unsigned long arg1, | ||
86 | unsigned long arg2, | ||
87 | unsigned long arg3, | ||
88 | unsigned long arg4, | ||
89 | unsigned long arg5, | ||
90 | unsigned long arg6, | ||
91 | unsigned long arg7, | ||
92 | unsigned long arg8, | ||
93 | unsigned long arg9) | ||
88 | { | 94 | { |
89 | u64 dummy; | 95 | long ret; |
96 | int i, sleep_msecs; | ||
90 | 97 | ||
91 | if ((((u64)cb_addr) & (PAGE_SIZE - 1)) != 0) { | 98 | for (i = 0; i < 5; i++) { |
92 | ehea_error("not on pageboundary"); | 99 | ret = plpar_hcall9(opcode, outs, |
93 | return H_PARAMETER; | 100 | arg1, arg2, arg3, arg4, arg5, |
101 | arg6, arg7, arg8, arg9); | ||
102 | |||
103 | if (H_IS_LONG_BUSY(ret)) { | ||
104 | sleep_msecs = get_longbusy_msecs(ret); | ||
105 | msleep_interruptible(sleep_msecs); | ||
106 | continue; | ||
107 | } | ||
108 | |||
109 | if (ret < H_SUCCESS) | ||
110 | ehea_error("opcode=%lx ret=%lx" | ||
111 | " arg1=%lx arg2=%lx arg3=%lx arg4=%lx" | ||
112 | " arg5=%lx arg6=%lx arg7=%lx arg8=%lx" | ||
113 | " arg9=%lx" | ||
114 | " out1=%lx out2=%lx out3=%lx out4=%lx" | ||
115 | " out5=%lx out6=%lx out7=%lx out8=%lx" | ||
116 | " out9=%lx", | ||
117 | opcode, ret, | ||
118 | arg1, arg2, arg3, arg4, arg5, | ||
119 | arg6, arg7, arg8, arg9, | ||
120 | outs[0], outs[1], outs[2], outs[3], | ||
121 | outs[4], outs[5], outs[6], outs[7], | ||
122 | outs[8]); | ||
123 | |||
124 | return ret; | ||
94 | } | 125 | } |
95 | 126 | ||
96 | return ehea_hcall_9arg_9ret(H_QUERY_HEA_QP, | 127 | return H_BUSY; |
97 | adapter_handle, /* R4 */ | 128 | } |
98 | qp_category, /* R5 */ | 129 | |
99 | qp_handle, /* R6 */ | 130 | u64 ehea_h_query_ehea_qp(const u64 adapter_handle, const u8 qp_category, |
100 | sel_mask, /* R7 */ | 131 | const u64 qp_handle, const u64 sel_mask, void *cb_addr) |
101 | virt_to_abs(cb_addr), /* R8 */ | 132 | { |
102 | 0, 0, 0, 0, /* R9-R12 */ | 133 | return ehea_plpar_hcall_norets(H_QUERY_HEA_QP, |
103 | &dummy, /* R4 */ | 134 | adapter_handle, /* R4 */ |
104 | &dummy, /* R5 */ | 135 | qp_category, /* R5 */ |
105 | &dummy, /* R6 */ | 136 | qp_handle, /* R6 */ |
106 | &dummy, /* R7 */ | 137 | sel_mask, /* R7 */ |
107 | &dummy, /* R8 */ | 138 | virt_to_abs(cb_addr), /* R8 */ |
108 | &dummy, /* R9 */ | 139 | 0, 0); |
109 | &dummy, /* R10 */ | ||
110 | &dummy, /* R11 */ | ||
111 | &dummy); /* R12 */ | ||
112 | } | 140 | } |
113 | 141 | ||
114 | /* input param R5 */ | 142 | /* input param R5 */ |
@@ -180,6 +208,7 @@ u64 ehea_h_alloc_resource_qp(const u64 adapter_handle, | |||
180 | u64 *qp_handle, struct h_epas *h_epas) | 208 | u64 *qp_handle, struct h_epas *h_epas) |
181 | { | 209 | { |
182 | u64 hret; | 210 | u64 hret; |
211 | u64 outs[PLPAR_HCALL9_BUFSIZE]; | ||
183 | 212 | ||
184 | u64 allocate_controls = | 213 | u64 allocate_controls = |
185 | EHEA_BMASK_SET(H_ALL_RES_QP_EQPO, init_attr->low_lat_rq1 ? 1 : 0) | 214 | EHEA_BMASK_SET(H_ALL_RES_QP_EQPO, init_attr->low_lat_rq1 ? 1 : 0) |
@@ -219,45 +248,29 @@ u64 ehea_h_alloc_resource_qp(const u64 adapter_handle, | |||
219 | EHEA_BMASK_SET(H_ALL_RES_QP_TH_RQ2, init_attr->rq2_threshold) | 248 | EHEA_BMASK_SET(H_ALL_RES_QP_TH_RQ2, init_attr->rq2_threshold) |
220 | | EHEA_BMASK_SET(H_ALL_RES_QP_TH_RQ3, init_attr->rq3_threshold); | 249 | | EHEA_BMASK_SET(H_ALL_RES_QP_TH_RQ3, init_attr->rq3_threshold); |
221 | 250 | ||
222 | u64 r5_out = 0; | 251 | hret = ehea_plpar_hcall9(H_ALLOC_HEA_RESOURCE, |
223 | u64 r6_out = 0; | 252 | outs, |
224 | u64 r7_out = 0; | 253 | adapter_handle, /* R4 */ |
225 | u64 r8_out = 0; | 254 | allocate_controls, /* R5 */ |
226 | u64 r9_out = 0; | 255 | init_attr->send_cq_handle, /* R6 */ |
227 | u64 g_la_user_out = 0; | 256 | init_attr->recv_cq_handle, /* R7 */ |
228 | u64 r11_out = 0; | 257 | init_attr->aff_eq_handle, /* R8 */ |
229 | u64 r12_out = 0; | 258 | r9_reg, /* R9 */ |
230 | 259 | max_r10_reg, /* R10 */ | |
231 | hret = ehea_hcall_9arg_9ret(H_ALLOC_HEA_RESOURCE, | 260 | r11_in, /* R11 */ |
232 | adapter_handle, /* R4 */ | 261 | threshold); /* R12 */ |
233 | allocate_controls, /* R5 */ | 262 | |
234 | init_attr->send_cq_handle, /* R6 */ | 263 | *qp_handle = outs[0]; |
235 | init_attr->recv_cq_handle, /* R7 */ | 264 | init_attr->qp_nr = (u32)outs[1]; |
236 | init_attr->aff_eq_handle, /* R8 */ | ||
237 | r9_reg, /* R9 */ | ||
238 | max_r10_reg, /* R10 */ | ||
239 | r11_in, /* R11 */ | ||
240 | threshold, /* R12 */ | ||
241 | qp_handle, /* R4 */ | ||
242 | &r5_out, /* R5 */ | ||
243 | &r6_out, /* R6 */ | ||
244 | &r7_out, /* R7 */ | ||
245 | &r8_out, /* R8 */ | ||
246 | &r9_out, /* R9 */ | ||
247 | &g_la_user_out, /* R10 */ | ||
248 | &r11_out, /* R11 */ | ||
249 | &r12_out); /* R12 */ | ||
250 | |||
251 | init_attr->qp_nr = (u32)r5_out; | ||
252 | 265 | ||
253 | init_attr->act_nr_send_wqes = | 266 | init_attr->act_nr_send_wqes = |
254 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_SWQE, r6_out); | 267 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_SWQE, outs[2]); |
255 | init_attr->act_nr_rwqes_rq1 = | 268 | init_attr->act_nr_rwqes_rq1 = |
256 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_R1WQE, r6_out); | 269 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_R1WQE, outs[2]); |
257 | init_attr->act_nr_rwqes_rq2 = | 270 | init_attr->act_nr_rwqes_rq2 = |
258 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_R2WQE, r6_out); | 271 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_R2WQE, outs[2]); |
259 | init_attr->act_nr_rwqes_rq3 = | 272 | init_attr->act_nr_rwqes_rq3 = |
260 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_R3WQE, r6_out); | 273 | (u16)EHEA_BMASK_GET(H_ALL_RES_QP_ACT_R3WQE, outs[2]); |
261 | 274 | ||
262 | init_attr->act_wqe_size_enc_sq = init_attr->wqe_size_enc_sq; | 275 | init_attr->act_wqe_size_enc_sq = init_attr->wqe_size_enc_sq; |
263 | init_attr->act_wqe_size_enc_rq1 = init_attr->wqe_size_enc_rq1; | 276 | init_attr->act_wqe_size_enc_rq1 = init_attr->wqe_size_enc_rq1; |
@@ -265,25 +278,25 @@ u64 ehea_h_alloc_resource_qp(const u64 adapter_handle, | |||
265 | init_attr->act_wqe_size_enc_rq3 = init_attr->wqe_size_enc_rq3; | 278 | init_attr->act_wqe_size_enc_rq3 = init_attr->wqe_size_enc_rq3; |
266 | 279 | ||
267 | init_attr->nr_sq_pages = | 280 | init_attr->nr_sq_pages = |
268 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_SQ, r8_out); | 281 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_SQ, outs[4]); |
269 | init_attr->nr_rq1_pages = | 282 | init_attr->nr_rq1_pages = |
270 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_RQ1, r8_out); | 283 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_RQ1, outs[4]); |
271 | init_attr->nr_rq2_pages = | 284 | init_attr->nr_rq2_pages = |
272 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_RQ2, r9_out); | 285 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_RQ2, outs[5]); |
273 | init_attr->nr_rq3_pages = | 286 | init_attr->nr_rq3_pages = |
274 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_RQ3, r9_out); | 287 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_SIZE_RQ3, outs[5]); |
275 | 288 | ||
276 | init_attr->liobn_sq = | 289 | init_attr->liobn_sq = |
277 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_SQ, r11_out); | 290 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_SQ, outs[7]); |
278 | init_attr->liobn_rq1 = | 291 | init_attr->liobn_rq1 = |
279 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_RQ1, r11_out); | 292 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_RQ1, outs[7]); |
280 | init_attr->liobn_rq2 = | 293 | init_attr->liobn_rq2 = |
281 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_RQ2, r12_out); | 294 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_RQ2, outs[8]); |
282 | init_attr->liobn_rq3 = | 295 | init_attr->liobn_rq3 = |
283 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_RQ3, r12_out); | 296 | (u32)EHEA_BMASK_GET(H_ALL_RES_QP_LIOBN_RQ3, outs[8]); |
284 | 297 | ||
285 | if (!hret) | 298 | if (!hret) |
286 | hcp_epas_ctor(h_epas, g_la_user_out, g_la_user_out); | 299 | hcp_epas_ctor(h_epas, outs[6], outs[6]); |
287 | 300 | ||
288 | return hret; | 301 | return hret; |
289 | } | 302 | } |
@@ -292,31 +305,24 @@ u64 ehea_h_alloc_resource_cq(const u64 adapter_handle, | |||
292 | struct ehea_cq_attr *cq_attr, | 305 | struct ehea_cq_attr *cq_attr, |
293 | u64 *cq_handle, struct h_epas *epas) | 306 | u64 *cq_handle, struct h_epas *epas) |
294 | { | 307 | { |
295 | u64 hret, dummy, act_nr_of_cqes_out, act_pages_out; | 308 | u64 hret; |
296 | u64 g_la_privileged_out, g_la_user_out; | 309 | u64 outs[PLPAR_HCALL9_BUFSIZE]; |
297 | 310 | ||
298 | hret = ehea_hcall_9arg_9ret(H_ALLOC_HEA_RESOURCE, | 311 | hret = ehea_plpar_hcall9(H_ALLOC_HEA_RESOURCE, |
299 | adapter_handle, /* R4 */ | 312 | outs, |
300 | H_ALL_RES_TYPE_CQ, /* R5 */ | 313 | adapter_handle, /* R4 */ |
301 | cq_attr->eq_handle, /* R6 */ | 314 | H_ALL_RES_TYPE_CQ, /* R5 */ |
302 | cq_attr->cq_token, /* R7 */ | 315 | cq_attr->eq_handle, /* R6 */ |
303 | cq_attr->max_nr_of_cqes, /* R8 */ | 316 | cq_attr->cq_token, /* R7 */ |
304 | 0, 0, 0, 0, /* R9-R12 */ | 317 | cq_attr->max_nr_of_cqes, /* R8 */ |
305 | cq_handle, /* R4 */ | 318 | 0, 0, 0, 0); /* R9-R12 */ |
306 | &dummy, /* R5 */ | 319 | |
307 | &dummy, /* R6 */ | 320 | *cq_handle = outs[0]; |
308 | &act_nr_of_cqes_out, /* R7 */ | 321 | cq_attr->act_nr_of_cqes = outs[3]; |
309 | &act_pages_out, /* R8 */ | 322 | cq_attr->nr_pages = outs[4]; |
310 | &g_la_privileged_out, /* R9 */ | ||
311 | &g_la_user_out, /* R10 */ | ||
312 | &dummy, /* R11 */ | ||
313 | &dummy); /* R12 */ | ||
314 | |||
315 | cq_attr->act_nr_of_cqes = act_nr_of_cqes_out; | ||
316 | cq_attr->nr_pages = act_pages_out; | ||
317 | 323 | ||
318 | if (!hret) | 324 | if (!hret) |
319 | hcp_epas_ctor(epas, g_la_privileged_out, g_la_user_out); | 325 | hcp_epas_ctor(epas, outs[5], outs[6]); |
320 | 326 | ||
321 | return hret; | 327 | return hret; |
322 | } | 328 | } |
@@ -361,9 +367,8 @@ u64 ehea_h_alloc_resource_cq(const u64 adapter_handle, | |||
361 | u64 ehea_h_alloc_resource_eq(const u64 adapter_handle, | 367 | u64 ehea_h_alloc_resource_eq(const u64 adapter_handle, |
362 | struct ehea_eq_attr *eq_attr, u64 *eq_handle) | 368 | struct ehea_eq_attr *eq_attr, u64 *eq_handle) |
363 | { | 369 | { |
364 | u64 hret, dummy, eq_liobn, allocate_controls; | 370 | u64 hret, allocate_controls; |
365 | u64 ist1_out, ist2_out, ist3_out, ist4_out; | 371 | u64 outs[PLPAR_HCALL9_BUFSIZE]; |
366 | u64 act_nr_of_eqes_out, act_pages_out; | ||
367 | 372 | ||
368 | /* resource type */ | 373 | /* resource type */ |
369 | allocate_controls = | 374 | allocate_controls = |
@@ -372,27 +377,20 @@ u64 ehea_h_alloc_resource_eq(const u64 adapter_handle, | |||
372 | | EHEA_BMASK_SET(H_ALL_RES_EQ_INH_EQE_GEN, !eq_attr->eqe_gen) | 377 | | EHEA_BMASK_SET(H_ALL_RES_EQ_INH_EQE_GEN, !eq_attr->eqe_gen) |
373 | | EHEA_BMASK_SET(H_ALL_RES_EQ_NON_NEQ_ISN, 1); | 378 | | EHEA_BMASK_SET(H_ALL_RES_EQ_NON_NEQ_ISN, 1); |
374 | 379 | ||
375 | hret = ehea_hcall_9arg_9ret(H_ALLOC_HEA_RESOURCE, | 380 | hret = ehea_plpar_hcall9(H_ALLOC_HEA_RESOURCE, |
376 | adapter_handle, /* R4 */ | 381 | outs, |
377 | allocate_controls, /* R5 */ | 382 | adapter_handle, /* R4 */ |
378 | eq_attr->max_nr_of_eqes, /* R6 */ | 383 | allocate_controls, /* R5 */ |
379 | 0, 0, 0, 0, 0, 0, /* R7-R10 */ | 384 | eq_attr->max_nr_of_eqes, /* R6 */ |
380 | eq_handle, /* R4 */ | 385 | 0, 0, 0, 0, 0, 0); /* R7-R10 */ |
381 | &dummy, /* R5 */ | 386 | |
382 | &eq_liobn, /* R6 */ | 387 | *eq_handle = outs[0]; |
383 | &act_nr_of_eqes_out, /* R7 */ | 388 | eq_attr->act_nr_of_eqes = outs[3]; |
384 | &act_pages_out, /* R8 */ | 389 | eq_attr->nr_pages = outs[4]; |
385 | &ist1_out, /* R9 */ | 390 | eq_attr->ist1 = outs[5]; |
386 | &ist2_out, /* R10 */ | 391 | eq_attr->ist2 = outs[6]; |
387 | &ist3_out, /* R11 */ | 392 | eq_attr->ist3 = outs[7]; |
388 | &ist4_out); /* R12 */ | 393 | eq_attr->ist4 = outs[8]; |
389 | |||
390 | eq_attr->act_nr_of_eqes = act_nr_of_eqes_out; | ||
391 | eq_attr->nr_pages = act_pages_out; | ||
392 | eq_attr->ist1 = ist1_out; | ||
393 | eq_attr->ist2 = ist2_out; | ||
394 | eq_attr->ist3 = ist3_out; | ||
395 | eq_attr->ist4 = ist4_out; | ||
396 | 394 | ||
397 | return hret; | 395 | return hret; |
398 | } | 396 | } |
@@ -402,31 +400,22 @@ u64 ehea_h_modify_ehea_qp(const u64 adapter_handle, const u8 cat, | |||
402 | void *cb_addr, u64 *inv_attr_id, u64 *proc_mask, | 400 | void *cb_addr, u64 *inv_attr_id, u64 *proc_mask, |
403 | u16 *out_swr, u16 *out_rwr) | 401 | u16 *out_swr, u16 *out_rwr) |
404 | { | 402 | { |
405 | u64 hret, dummy, act_out_swr, act_out_rwr; | 403 | u64 hret; |
406 | 404 | u64 outs[PLPAR_HCALL9_BUFSIZE]; | |
407 | if ((((u64)cb_addr) & (PAGE_SIZE - 1)) != 0) { | 405 | |
408 | ehea_error("not on page boundary"); | 406 | hret = ehea_plpar_hcall9(H_MODIFY_HEA_QP, |
409 | return H_PARAMETER; | 407 | outs, |
410 | } | 408 | adapter_handle, /* R4 */ |
411 | 409 | (u64) cat, /* R5 */ | |
412 | hret = ehea_hcall_9arg_9ret(H_MODIFY_HEA_QP, | 410 | qp_handle, /* R6 */ |
413 | adapter_handle, /* R4 */ | 411 | sel_mask, /* R7 */ |
414 | (u64) cat, /* R5 */ | 412 | virt_to_abs(cb_addr), /* R8 */ |
415 | qp_handle, /* R6 */ | 413 | 0, 0, 0, 0); /* R9-R12 */ |
416 | sel_mask, /* R7 */ | 414 | |
417 | virt_to_abs(cb_addr), /* R8 */ | 415 | *inv_attr_id = outs[0]; |
418 | 0, 0, 0, 0, /* R9-R12 */ | 416 | *out_swr = outs[3]; |
419 | inv_attr_id, /* R4 */ | 417 | *out_rwr = outs[4]; |
420 | &dummy, /* R5 */ | 418 | *proc_mask = outs[5]; |
421 | &dummy, /* R6 */ | ||
422 | &act_out_swr, /* R7 */ | ||
423 | &act_out_rwr, /* R8 */ | ||
424 | proc_mask, /* R9 */ | ||
425 | &dummy, /* R10 */ | ||
426 | &dummy, /* R11 */ | ||
427 | &dummy); /* R12 */ | ||
428 | *out_swr = act_out_swr; | ||
429 | *out_rwr = act_out_rwr; | ||
430 | 419 | ||
431 | return hret; | 420 | return hret; |
432 | } | 421 | } |
@@ -435,122 +424,81 @@ u64 ehea_h_register_rpage(const u64 adapter_handle, const u8 pagesize, | |||
435 | const u8 queue_type, const u64 resource_handle, | 424 | const u8 queue_type, const u64 resource_handle, |
436 | const u64 log_pageaddr, u64 count) | 425 | const u64 log_pageaddr, u64 count) |
437 | { | 426 | { |
438 | u64 dummy, reg_control; | 427 | u64 reg_control; |
439 | 428 | ||
440 | reg_control = EHEA_BMASK_SET(H_REG_RPAGE_PAGE_SIZE, pagesize) | 429 | reg_control = EHEA_BMASK_SET(H_REG_RPAGE_PAGE_SIZE, pagesize) |
441 | | EHEA_BMASK_SET(H_REG_RPAGE_QT, queue_type); | 430 | | EHEA_BMASK_SET(H_REG_RPAGE_QT, queue_type); |
442 | 431 | ||
443 | return ehea_hcall_9arg_9ret(H_REGISTER_HEA_RPAGES, | 432 | return ehea_plpar_hcall_norets(H_REGISTER_HEA_RPAGES, |
444 | adapter_handle, /* R4 */ | 433 | adapter_handle, /* R4 */ |
445 | reg_control, /* R5 */ | 434 | reg_control, /* R5 */ |
446 | resource_handle, /* R6 */ | 435 | resource_handle, /* R6 */ |
447 | log_pageaddr, /* R7 */ | 436 | log_pageaddr, /* R7 */ |
448 | count, /* R8 */ | 437 | count, /* R8 */ |
449 | 0, 0, 0, 0, /* R9-R12 */ | 438 | 0, 0); /* R9-R10 */ |
450 | &dummy, /* R4 */ | ||
451 | &dummy, /* R5 */ | ||
452 | &dummy, /* R6 */ | ||
453 | &dummy, /* R7 */ | ||
454 | &dummy, /* R8 */ | ||
455 | &dummy, /* R9 */ | ||
456 | &dummy, /* R10 */ | ||
457 | &dummy, /* R11 */ | ||
458 | &dummy); /* R12 */ | ||
459 | } | 439 | } |
460 | 440 | ||
461 | u64 ehea_h_register_smr(const u64 adapter_handle, const u64 orig_mr_handle, | 441 | u64 ehea_h_register_smr(const u64 adapter_handle, const u64 orig_mr_handle, |
462 | const u64 vaddr_in, const u32 access_ctrl, const u32 pd, | 442 | const u64 vaddr_in, const u32 access_ctrl, const u32 pd, |
463 | struct ehea_mr *mr) | 443 | struct ehea_mr *mr) |
464 | { | 444 | { |
465 | u64 hret, dummy, lkey_out; | 445 | u64 hret; |
466 | 446 | u64 outs[PLPAR_HCALL9_BUFSIZE]; | |
467 | hret = ehea_hcall_9arg_9ret(H_REGISTER_SMR, | 447 | |
468 | adapter_handle , /* R4 */ | 448 | hret = ehea_plpar_hcall9(H_REGISTER_SMR, |
469 | orig_mr_handle, /* R5 */ | 449 | outs, |
470 | vaddr_in, /* R6 */ | 450 | adapter_handle , /* R4 */ |
471 | (((u64)access_ctrl) << 32ULL), /* R7 */ | 451 | orig_mr_handle, /* R5 */ |
472 | pd, /* R8 */ | 452 | vaddr_in, /* R6 */ |
473 | 0, 0, 0, 0, /* R9-R12 */ | 453 | (((u64)access_ctrl) << 32ULL), /* R7 */ |
474 | &mr->handle, /* R4 */ | 454 | pd, /* R8 */ |
475 | &dummy, /* R5 */ | 455 | 0, 0, 0, 0); /* R9-R12 */ |
476 | &lkey_out, /* R6 */ | 456 | |
477 | &dummy, /* R7 */ | 457 | mr->handle = outs[0]; |
478 | &dummy, /* R8 */ | 458 | mr->lkey = (u32)outs[2]; |
479 | &dummy, /* R9 */ | ||
480 | &dummy, /* R10 */ | ||
481 | &dummy, /* R11 */ | ||
482 | &dummy); /* R12 */ | ||
483 | mr->lkey = (u32)lkey_out; | ||
484 | 459 | ||
485 | return hret; | 460 | return hret; |
486 | } | 461 | } |
487 | 462 | ||
488 | u64 ehea_h_disable_and_get_hea(const u64 adapter_handle, const u64 qp_handle) | 463 | u64 ehea_h_disable_and_get_hea(const u64 adapter_handle, const u64 qp_handle) |
489 | { | 464 | { |
490 | u64 hret, dummy, ladr_next_sq_wqe_out; | 465 | u64 outs[PLPAR_HCALL9_BUFSIZE]; |
491 | u64 ladr_next_rq1_wqe_out, ladr_next_rq2_wqe_out, ladr_next_rq3_wqe_out; | 466 | |
492 | 467 | return ehea_plpar_hcall9(H_DISABLE_AND_GET_HEA, | |
493 | hret = ehea_hcall_9arg_9ret(H_DISABLE_AND_GET_HEA, | 468 | outs, |
494 | adapter_handle, /* R4 */ | 469 | adapter_handle, /* R4 */ |
495 | H_DISABLE_GET_EHEA_WQE_P, /* R5 */ | 470 | H_DISABLE_GET_EHEA_WQE_P, /* R5 */ |
496 | qp_handle, /* R6 */ | 471 | qp_handle, /* R6 */ |
497 | 0, 0, 0, 0, 0, 0, /* R7-R12 */ | 472 | 0, 0, 0, 0, 0, 0); /* R7-R12 */ |
498 | &ladr_next_sq_wqe_out, /* R4 */ | ||
499 | &ladr_next_rq1_wqe_out, /* R5 */ | ||
500 | &ladr_next_rq2_wqe_out, /* R6 */ | ||
501 | &ladr_next_rq3_wqe_out, /* R7 */ | ||
502 | &dummy, /* R8 */ | ||
503 | &dummy, /* R9 */ | ||
504 | &dummy, /* R10 */ | ||
505 | &dummy, /* R11 */ | ||
506 | &dummy); /* R12 */ | ||
507 | return hret; | ||
508 | } | 473 | } |
509 | 474 | ||
510 | u64 ehea_h_free_resource(const u64 adapter_handle, const u64 res_handle) | 475 | u64 ehea_h_free_resource(const u64 adapter_handle, const u64 res_handle) |
511 | { | 476 | { |
512 | u64 dummy; | 477 | return ehea_plpar_hcall_norets(H_FREE_RESOURCE, |
513 | 478 | adapter_handle, /* R4 */ | |
514 | return ehea_hcall_9arg_9ret(H_FREE_RESOURCE, | 479 | res_handle, /* R5 */ |
515 | adapter_handle, /* R4 */ | 480 | 0, 0, 0, 0, 0); /* R6-R10 */ |
516 | res_handle, /* R5 */ | ||
517 | 0, 0, 0, 0, 0, 0, 0, /* R6-R12 */ | ||
518 | &dummy, /* R4 */ | ||
519 | &dummy, /* R5 */ | ||
520 | &dummy, /* R6 */ | ||
521 | &dummy, /* R7 */ | ||
522 | &dummy, /* R8 */ | ||
523 | &dummy, /* R9 */ | ||
524 | &dummy, /* R10 */ | ||
525 | &dummy, /* R11 */ | ||
526 | &dummy); /* R12 */ | ||
527 | } | 481 | } |
528 | 482 | ||
529 | u64 ehea_h_alloc_resource_mr(const u64 adapter_handle, const u64 vaddr, | 483 | u64 ehea_h_alloc_resource_mr(const u64 adapter_handle, const u64 vaddr, |
530 | const u64 length, const u32 access_ctrl, | 484 | const u64 length, const u32 access_ctrl, |
531 | const u32 pd, u64 *mr_handle, u32 *lkey) | 485 | const u32 pd, u64 *mr_handle, u32 *lkey) |
532 | { | 486 | { |
533 | u64 hret, dummy, lkey_out; | 487 | u64 hret; |
534 | 488 | u64 outs[PLPAR_HCALL9_BUFSIZE]; | |
535 | hret = ehea_hcall_9arg_9ret(H_ALLOC_HEA_RESOURCE, | 489 | |
536 | adapter_handle, /* R4 */ | 490 | hret = ehea_plpar_hcall9(H_ALLOC_HEA_RESOURCE, |
537 | 5, /* R5 */ | 491 | outs, |
538 | vaddr, /* R6 */ | 492 | adapter_handle, /* R4 */ |
539 | length, /* R7 */ | 493 | 5, /* R5 */ |
540 | (((u64) access_ctrl) << 32ULL),/* R8 */ | 494 | vaddr, /* R6 */ |
541 | pd, /* R9 */ | 495 | length, /* R7 */ |
542 | 0, 0, 0, /* R10-R12 */ | 496 | (((u64) access_ctrl) << 32ULL), /* R8 */ |
543 | mr_handle, /* R4 */ | 497 | pd, /* R9 */ |
544 | &dummy, /* R5 */ | 498 | 0, 0, 0); /* R10-R12 */ |
545 | &lkey_out, /* R6 */ | 499 | |
546 | &dummy, /* R7 */ | 500 | *mr_handle = outs[0]; |
547 | &dummy, /* R8 */ | 501 | *lkey = (u32)outs[2]; |
548 | &dummy, /* R9 */ | ||
549 | &dummy, /* R10 */ | ||
550 | &dummy, /* R11 */ | ||
551 | &dummy); /* R12 */ | ||
552 | *lkey = (u32) lkey_out; | ||
553 | |||
554 | return hret; | 502 | return hret; |
555 | } | 503 | } |
556 | 504 | ||
@@ -558,7 +506,7 @@ u64 ehea_h_register_rpage_mr(const u64 adapter_handle, const u64 mr_handle, | |||
558 | const u8 pagesize, const u8 queue_type, | 506 | const u8 pagesize, const u8 queue_type, |
559 | const u64 log_pageaddr, const u64 count) | 507 | const u64 log_pageaddr, const u64 count) |
560 | { | 508 | { |
561 | if ((count > 1) && (log_pageaddr & 0xfff)) { | 509 | if ((count > 1) && (log_pageaddr & ~PAGE_MASK)) { |
562 | ehea_error("not on pageboundary"); | 510 | ehea_error("not on pageboundary"); |
563 | return H_PARAMETER; | 511 | return H_PARAMETER; |
564 | } | 512 | } |
@@ -570,23 +518,14 @@ u64 ehea_h_register_rpage_mr(const u64 adapter_handle, const u64 mr_handle, | |||
570 | 518 | ||
571 | u64 ehea_h_query_ehea(const u64 adapter_handle, void *cb_addr) | 519 | u64 ehea_h_query_ehea(const u64 adapter_handle, void *cb_addr) |
572 | { | 520 | { |
573 | u64 hret, dummy, cb_logaddr; | 521 | u64 hret, cb_logaddr; |
574 | 522 | ||
575 | cb_logaddr = virt_to_abs(cb_addr); | 523 | cb_logaddr = virt_to_abs(cb_addr); |
576 | 524 | ||
577 | hret = ehea_hcall_9arg_9ret(H_QUERY_HEA, | 525 | hret = ehea_plpar_hcall_norets(H_QUERY_HEA, |
578 | adapter_handle, /* R4 */ | 526 | adapter_handle, /* R4 */ |
579 | cb_logaddr, /* R5 */ | 527 | cb_logaddr, /* R5 */ |
580 | 0, 0, 0, 0, 0, 0, 0, /* R6-R12 */ | 528 | 0, 0, 0, 0, 0); /* R6-R10 */ |
581 | &dummy, /* R4 */ | ||
582 | &dummy, /* R5 */ | ||
583 | &dummy, /* R6 */ | ||
584 | &dummy, /* R7 */ | ||
585 | &dummy, /* R8 */ | ||
586 | &dummy, /* R9 */ | ||
587 | &dummy, /* R10 */ | ||
588 | &dummy, /* R11 */ | ||
589 | &dummy); /* R12 */ | ||
590 | #ifdef DEBUG | 529 | #ifdef DEBUG |
591 | ehea_dmp(cb_addr, sizeof(struct hcp_query_ehea), "hcp_query_ehea"); | 530 | ehea_dmp(cb_addr, sizeof(struct hcp_query_ehea), "hcp_query_ehea"); |
592 | #endif | 531 | #endif |
@@ -597,36 +536,28 @@ u64 ehea_h_query_ehea_port(const u64 adapter_handle, const u16 port_num, | |||
597 | const u8 cb_cat, const u64 select_mask, | 536 | const u8 cb_cat, const u64 select_mask, |
598 | void *cb_addr) | 537 | void *cb_addr) |
599 | { | 538 | { |
600 | u64 port_info, dummy; | 539 | u64 port_info; |
601 | u64 cb_logaddr = virt_to_abs(cb_addr); | 540 | u64 cb_logaddr = virt_to_abs(cb_addr); |
602 | u64 arr_index = 0; | 541 | u64 arr_index = 0; |
603 | 542 | ||
604 | port_info = EHEA_BMASK_SET(H_MEHEAPORT_CAT, cb_cat) | 543 | port_info = EHEA_BMASK_SET(H_MEHEAPORT_CAT, cb_cat) |
605 | | EHEA_BMASK_SET(H_MEHEAPORT_PN, port_num); | 544 | | EHEA_BMASK_SET(H_MEHEAPORT_PN, port_num); |
606 | 545 | ||
607 | return ehea_hcall_9arg_9ret(H_QUERY_HEA_PORT, | 546 | return ehea_plpar_hcall_norets(H_QUERY_HEA_PORT, |
608 | adapter_handle, /* R4 */ | 547 | adapter_handle, /* R4 */ |
609 | port_info, /* R5 */ | 548 | port_info, /* R5 */ |
610 | select_mask, /* R6 */ | 549 | select_mask, /* R6 */ |
611 | arr_index, /* R7 */ | 550 | arr_index, /* R7 */ |
612 | cb_logaddr, /* R8 */ | 551 | cb_logaddr, /* R8 */ |
613 | 0, 0, 0, 0, /* R9-R12 */ | 552 | 0, 0); /* R9-R10 */ |
614 | &dummy, /* R4 */ | ||
615 | &dummy, /* R5 */ | ||
616 | &dummy, /* R6 */ | ||
617 | &dummy, /* R7 */ | ||
618 | &dummy, /* R8 */ | ||
619 | &dummy, /* R9 */ | ||
620 | &dummy, /* R10 */ | ||
621 | &dummy, /* R11 */ | ||
622 | &dummy); /* R12 */ | ||
623 | } | 553 | } |
624 | 554 | ||
625 | u64 ehea_h_modify_ehea_port(const u64 adapter_handle, const u16 port_num, | 555 | u64 ehea_h_modify_ehea_port(const u64 adapter_handle, const u16 port_num, |
626 | const u8 cb_cat, const u64 select_mask, | 556 | const u8 cb_cat, const u64 select_mask, |
627 | void *cb_addr) | 557 | void *cb_addr) |
628 | { | 558 | { |
629 | u64 port_info, dummy, inv_attr_ident, proc_mask; | 559 | u64 outs[PLPAR_HCALL9_BUFSIZE]; |
560 | u64 port_info; | ||
630 | u64 arr_index = 0; | 561 | u64 arr_index = 0; |
631 | u64 cb_logaddr = virt_to_abs(cb_addr); | 562 | u64 cb_logaddr = virt_to_abs(cb_addr); |
632 | 563 | ||
@@ -635,29 +566,21 @@ u64 ehea_h_modify_ehea_port(const u64 adapter_handle, const u16 port_num, | |||
635 | #ifdef DEBUG | 566 | #ifdef DEBUG |
636 | ehea_dump(cb_addr, sizeof(struct hcp_ehea_port_cb0), "Before HCALL"); | 567 | ehea_dump(cb_addr, sizeof(struct hcp_ehea_port_cb0), "Before HCALL"); |
637 | #endif | 568 | #endif |
638 | return ehea_hcall_9arg_9ret(H_MODIFY_HEA_PORT, | 569 | return ehea_plpar_hcall9(H_MODIFY_HEA_PORT, |
639 | adapter_handle, /* R4 */ | 570 | outs, |
640 | port_info, /* R5 */ | 571 | adapter_handle, /* R4 */ |
641 | select_mask, /* R6 */ | 572 | port_info, /* R5 */ |
642 | arr_index, /* R7 */ | 573 | select_mask, /* R6 */ |
643 | cb_logaddr, /* R8 */ | 574 | arr_index, /* R7 */ |
644 | 0, 0, 0, 0, /* R9-R12 */ | 575 | cb_logaddr, /* R8 */ |
645 | &inv_attr_ident, /* R4 */ | 576 | 0, 0, 0, 0); /* R9-R12 */ |
646 | &proc_mask, /* R5 */ | ||
647 | &dummy, /* R6 */ | ||
648 | &dummy, /* R7 */ | ||
649 | &dummy, /* R8 */ | ||
650 | &dummy, /* R9 */ | ||
651 | &dummy, /* R10 */ | ||
652 | &dummy, /* R11 */ | ||
653 | &dummy); /* R12 */ | ||
654 | } | 577 | } |
655 | 578 | ||
656 | u64 ehea_h_reg_dereg_bcmc(const u64 adapter_handle, const u16 port_num, | 579 | u64 ehea_h_reg_dereg_bcmc(const u64 adapter_handle, const u16 port_num, |
657 | const u8 reg_type, const u64 mc_mac_addr, | 580 | const u8 reg_type, const u64 mc_mac_addr, |
658 | const u16 vlan_id, const u32 hcall_id) | 581 | const u16 vlan_id, const u32 hcall_id) |
659 | { | 582 | { |
660 | u64 r5_port_num, r6_reg_type, r7_mc_mac_addr, r8_vlan_id, dummy; | 583 | u64 r5_port_num, r6_reg_type, r7_mc_mac_addr, r8_vlan_id; |
661 | u64 mac_addr = mc_mac_addr >> 16; | 584 | u64 mac_addr = mc_mac_addr >> 16; |
662 | 585 | ||
663 | r5_port_num = EHEA_BMASK_SET(H_REGBCMC_PN, port_num); | 586 | r5_port_num = EHEA_BMASK_SET(H_REGBCMC_PN, port_num); |
@@ -665,41 +588,21 @@ u64 ehea_h_reg_dereg_bcmc(const u64 adapter_handle, const u16 port_num, | |||
665 | r7_mc_mac_addr = EHEA_BMASK_SET(H_REGBCMC_MACADDR, mac_addr); | 588 | r7_mc_mac_addr = EHEA_BMASK_SET(H_REGBCMC_MACADDR, mac_addr); |
666 | r8_vlan_id = EHEA_BMASK_SET(H_REGBCMC_VLANID, vlan_id); | 589 | r8_vlan_id = EHEA_BMASK_SET(H_REGBCMC_VLANID, vlan_id); |
667 | 590 | ||
668 | return ehea_hcall_9arg_9ret(hcall_id, | 591 | return ehea_plpar_hcall_norets(hcall_id, |
669 | adapter_handle, /* R4 */ | 592 | adapter_handle, /* R4 */ |
670 | r5_port_num, /* R5 */ | 593 | r5_port_num, /* R5 */ |
671 | r6_reg_type, /* R6 */ | 594 | r6_reg_type, /* R6 */ |
672 | r7_mc_mac_addr, /* R7 */ | 595 | r7_mc_mac_addr, /* R7 */ |
673 | r8_vlan_id, /* R8 */ | 596 | r8_vlan_id, /* R8 */ |
674 | 0, 0, 0, 0, /* R9-R12 */ | 597 | 0, 0); /* R9-R12 */ |
675 | &dummy, /* R4 */ | ||
676 | &dummy, /* R5 */ | ||
677 | &dummy, /* R6 */ | ||
678 | &dummy, /* R7 */ | ||
679 | &dummy, /* R8 */ | ||
680 | &dummy, /* R9 */ | ||
681 | &dummy, /* R10 */ | ||
682 | &dummy, /* R11 */ | ||
683 | &dummy); /* R12 */ | ||
684 | } | 598 | } |
685 | 599 | ||
686 | u64 ehea_h_reset_events(const u64 adapter_handle, const u64 neq_handle, | 600 | u64 ehea_h_reset_events(const u64 adapter_handle, const u64 neq_handle, |
687 | const u64 event_mask) | 601 | const u64 event_mask) |
688 | { | 602 | { |
689 | u64 dummy; | 603 | return ehea_plpar_hcall_norets(H_RESET_EVENTS, |
690 | 604 | adapter_handle, /* R4 */ | |
691 | return ehea_hcall_9arg_9ret(H_RESET_EVENTS, | 605 | neq_handle, /* R5 */ |
692 | adapter_handle, /* R4 */ | 606 | event_mask, /* R6 */ |
693 | neq_handle, /* R5 */ | 607 | 0, 0, 0, 0); /* R7-R12 */ |
694 | event_mask, /* R6 */ | ||
695 | 0, 0, 0, 0, 0, 0, /* R7-R12 */ | ||
696 | &dummy, /* R4 */ | ||
697 | &dummy, /* R5 */ | ||
698 | &dummy, /* R6 */ | ||
699 | &dummy, /* R7 */ | ||
700 | &dummy, /* R8 */ | ||
701 | &dummy, /* R9 */ | ||
702 | &dummy, /* R10 */ | ||
703 | &dummy, /* R11 */ | ||
704 | &dummy); /* R12 */ | ||
705 | } | 608 | } |
diff --git a/drivers/net/ehea/ehea_phyp.h b/drivers/net/ehea/ehea_phyp.h index fa51e3b5bb05..919f94b75933 100644 --- a/drivers/net/ehea/ehea_phyp.h +++ b/drivers/net/ehea/ehea_phyp.h | |||
@@ -81,14 +81,16 @@ static inline u32 get_longbusy_msecs(int long_busy_ret_code) | |||
81 | static inline void hcp_epas_ctor(struct h_epas *epas, u64 paddr_kernel, | 81 | static inline void hcp_epas_ctor(struct h_epas *epas, u64 paddr_kernel, |
82 | u64 paddr_user) | 82 | u64 paddr_user) |
83 | { | 83 | { |
84 | epas->kernel.addr = ioremap(paddr_kernel, PAGE_SIZE); | 84 | /* To support 64k pages we must round to 64k page boundary */ |
85 | epas->kernel.addr = ioremap((paddr_kernel & PAGE_MASK), PAGE_SIZE) + | ||
86 | (paddr_kernel & ~PAGE_MASK); | ||
85 | epas->user.addr = paddr_user; | 87 | epas->user.addr = paddr_user; |
86 | } | 88 | } |
87 | 89 | ||
88 | static inline void hcp_epas_dtor(struct h_epas *epas) | 90 | static inline void hcp_epas_dtor(struct h_epas *epas) |
89 | { | 91 | { |
90 | if (epas->kernel.addr) | 92 | if (epas->kernel.addr) |
91 | iounmap(epas->kernel.addr); | 93 | iounmap((void __iomem*)((u64)epas->kernel.addr & PAGE_MASK)); |
92 | 94 | ||
93 | epas->user.addr = 0; | 95 | epas->user.addr = 0; |
94 | epas->kernel.addr = 0; | 96 | epas->kernel.addr = 0; |
diff --git a/drivers/net/ehea/ehea_qmr.c b/drivers/net/ehea/ehea_qmr.c index 3e1862326c88..72ef7bde3346 100644 --- a/drivers/net/ehea/ehea_qmr.c +++ b/drivers/net/ehea/ehea_qmr.c | |||
@@ -209,11 +209,11 @@ int ehea_destroy_cq(struct ehea_cq *cq) | |||
209 | { | 209 | { |
210 | u64 adapter_handle, hret; | 210 | u64 adapter_handle, hret; |
211 | 211 | ||
212 | adapter_handle = cq->adapter->handle; | ||
213 | |||
214 | if (!cq) | 212 | if (!cq) |
215 | return 0; | 213 | return 0; |
216 | 214 | ||
215 | adapter_handle = cq->adapter->handle; | ||
216 | |||
217 | /* deregister all previous registered pages */ | 217 | /* deregister all previous registered pages */ |
218 | hret = ehea_h_free_resource(adapter_handle, cq->fw_handle); | 218 | hret = ehea_h_free_resource(adapter_handle, cq->fw_handle); |
219 | if (hret != H_SUCCESS) { | 219 | if (hret != H_SUCCESS) { |
@@ -512,7 +512,7 @@ int ehea_reg_mr_adapter(struct ehea_adapter *adapter) | |||
512 | 512 | ||
513 | start = KERNELBASE; | 513 | start = KERNELBASE; |
514 | end = (u64)high_memory; | 514 | end = (u64)high_memory; |
515 | nr_pages = (end - start) / PAGE_SIZE; | 515 | nr_pages = (end - start) / EHEA_PAGESIZE; |
516 | 516 | ||
517 | pt = kzalloc(PAGE_SIZE, GFP_KERNEL); | 517 | pt = kzalloc(PAGE_SIZE, GFP_KERNEL); |
518 | if (!pt) { | 518 | if (!pt) { |
@@ -538,9 +538,9 @@ int ehea_reg_mr_adapter(struct ehea_adapter *adapter) | |||
538 | if (nr_pages > 1) { | 538 | if (nr_pages > 1) { |
539 | u64 num_pages = min(nr_pages, (u64)512); | 539 | u64 num_pages = min(nr_pages, (u64)512); |
540 | for (i = 0; i < num_pages; i++) | 540 | for (i = 0; i < num_pages; i++) |
541 | pt[i] = virt_to_abs((void*)(((u64)start) | 541 | pt[i] = virt_to_abs((void*)(((u64)start) + |
542 | + ((k++) * | 542 | ((k++) * |
543 | PAGE_SIZE))); | 543 | EHEA_PAGESIZE))); |
544 | 544 | ||
545 | hret = ehea_h_register_rpage_mr(adapter->handle, | 545 | hret = ehea_h_register_rpage_mr(adapter->handle, |
546 | adapter->mr.handle, 0, | 546 | adapter->mr.handle, 0, |
@@ -548,8 +548,9 @@ int ehea_reg_mr_adapter(struct ehea_adapter *adapter) | |||
548 | num_pages); | 548 | num_pages); |
549 | nr_pages -= num_pages; | 549 | nr_pages -= num_pages; |
550 | } else { | 550 | } else { |
551 | u64 abs_adr = virt_to_abs((void*)(((u64)start) | 551 | u64 abs_adr = virt_to_abs((void*)(((u64)start) + |
552 | + (k * PAGE_SIZE))); | 552 | (k * EHEA_PAGESIZE))); |
553 | |||
553 | hret = ehea_h_register_rpage_mr(adapter->handle, | 554 | hret = ehea_h_register_rpage_mr(adapter->handle, |
554 | adapter->mr.handle, 0, | 555 | adapter->mr.handle, 0, |
555 | 0, abs_adr,1); | 556 | 0, abs_adr,1); |
diff --git a/drivers/net/eth16i.c b/drivers/net/eth16i.c index 8cc3c331aca8..b7b8bc2a6307 100644 --- a/drivers/net/eth16i.c +++ b/drivers/net/eth16i.c | |||
@@ -162,9 +162,9 @@ static char *version = | |||
162 | #include <linux/skbuff.h> | 162 | #include <linux/skbuff.h> |
163 | #include <linux/bitops.h> | 163 | #include <linux/bitops.h> |
164 | #include <linux/jiffies.h> | 164 | #include <linux/jiffies.h> |
165 | #include <linux/io.h> | ||
165 | 166 | ||
166 | #include <asm/system.h> | 167 | #include <asm/system.h> |
167 | #include <asm/io.h> | ||
168 | #include <asm/dma.h> | 168 | #include <asm/dma.h> |
169 | 169 | ||
170 | 170 | ||
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index 99b7a411db28..c5ed635bce36 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -2497,6 +2497,7 @@ static irqreturn_t nv_nic_irq_tx(int foo, void *data) | |||
2497 | u8 __iomem *base = get_hwbase(dev); | 2497 | u8 __iomem *base = get_hwbase(dev); |
2498 | u32 events; | 2498 | u32 events; |
2499 | int i; | 2499 | int i; |
2500 | unsigned long flags; | ||
2500 | 2501 | ||
2501 | dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name); | 2502 | dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name); |
2502 | 2503 | ||
@@ -2508,16 +2509,16 @@ static irqreturn_t nv_nic_irq_tx(int foo, void *data) | |||
2508 | if (!(events & np->irqmask)) | 2509 | if (!(events & np->irqmask)) |
2509 | break; | 2510 | break; |
2510 | 2511 | ||
2511 | spin_lock_irq(&np->lock); | 2512 | spin_lock_irqsave(&np->lock, flags); |
2512 | nv_tx_done(dev); | 2513 | nv_tx_done(dev); |
2513 | spin_unlock_irq(&np->lock); | 2514 | spin_unlock_irqrestore(&np->lock, flags); |
2514 | 2515 | ||
2515 | if (events & (NVREG_IRQ_TX_ERR)) { | 2516 | if (events & (NVREG_IRQ_TX_ERR)) { |
2516 | dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n", | 2517 | dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n", |
2517 | dev->name, events); | 2518 | dev->name, events); |
2518 | } | 2519 | } |
2519 | if (i > max_interrupt_work) { | 2520 | if (i > max_interrupt_work) { |
2520 | spin_lock_irq(&np->lock); | 2521 | spin_lock_irqsave(&np->lock, flags); |
2521 | /* disable interrupts on the nic */ | 2522 | /* disable interrupts on the nic */ |
2522 | writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask); | 2523 | writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask); |
2523 | pci_push(base); | 2524 | pci_push(base); |
@@ -2527,7 +2528,7 @@ static irqreturn_t nv_nic_irq_tx(int foo, void *data) | |||
2527 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); | 2528 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
2528 | } | 2529 | } |
2529 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i); | 2530 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i); |
2530 | spin_unlock_irq(&np->lock); | 2531 | spin_unlock_irqrestore(&np->lock, flags); |
2531 | break; | 2532 | break; |
2532 | } | 2533 | } |
2533 | 2534 | ||
@@ -2601,6 +2602,7 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data) | |||
2601 | u8 __iomem *base = get_hwbase(dev); | 2602 | u8 __iomem *base = get_hwbase(dev); |
2602 | u32 events; | 2603 | u32 events; |
2603 | int i; | 2604 | int i; |
2605 | unsigned long flags; | ||
2604 | 2606 | ||
2605 | dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name); | 2607 | dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name); |
2606 | 2608 | ||
@@ -2614,14 +2616,14 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data) | |||
2614 | 2616 | ||
2615 | nv_rx_process(dev, dev->weight); | 2617 | nv_rx_process(dev, dev->weight); |
2616 | if (nv_alloc_rx(dev)) { | 2618 | if (nv_alloc_rx(dev)) { |
2617 | spin_lock_irq(&np->lock); | 2619 | spin_lock_irqsave(&np->lock, flags); |
2618 | if (!np->in_shutdown) | 2620 | if (!np->in_shutdown) |
2619 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); | 2621 | mod_timer(&np->oom_kick, jiffies + OOM_REFILL); |
2620 | spin_unlock_irq(&np->lock); | 2622 | spin_unlock_irqrestore(&np->lock, flags); |
2621 | } | 2623 | } |
2622 | 2624 | ||
2623 | if (i > max_interrupt_work) { | 2625 | if (i > max_interrupt_work) { |
2624 | spin_lock_irq(&np->lock); | 2626 | spin_lock_irqsave(&np->lock, flags); |
2625 | /* disable interrupts on the nic */ | 2627 | /* disable interrupts on the nic */ |
2626 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); | 2628 | writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask); |
2627 | pci_push(base); | 2629 | pci_push(base); |
@@ -2631,7 +2633,7 @@ static irqreturn_t nv_nic_irq_rx(int foo, void *data) | |||
2631 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); | 2633 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
2632 | } | 2634 | } |
2633 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i); | 2635 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i); |
2634 | spin_unlock_irq(&np->lock); | 2636 | spin_unlock_irqrestore(&np->lock, flags); |
2635 | break; | 2637 | break; |
2636 | } | 2638 | } |
2637 | } | 2639 | } |
@@ -2648,6 +2650,7 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data) | |||
2648 | u8 __iomem *base = get_hwbase(dev); | 2650 | u8 __iomem *base = get_hwbase(dev); |
2649 | u32 events; | 2651 | u32 events; |
2650 | int i; | 2652 | int i; |
2653 | unsigned long flags; | ||
2651 | 2654 | ||
2652 | dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name); | 2655 | dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name); |
2653 | 2656 | ||
@@ -2660,14 +2663,14 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data) | |||
2660 | break; | 2663 | break; |
2661 | 2664 | ||
2662 | if (events & NVREG_IRQ_LINK) { | 2665 | if (events & NVREG_IRQ_LINK) { |
2663 | spin_lock_irq(&np->lock); | 2666 | spin_lock_irqsave(&np->lock, flags); |
2664 | nv_link_irq(dev); | 2667 | nv_link_irq(dev); |
2665 | spin_unlock_irq(&np->lock); | 2668 | spin_unlock_irqrestore(&np->lock, flags); |
2666 | } | 2669 | } |
2667 | if (np->need_linktimer && time_after(jiffies, np->link_timeout)) { | 2670 | if (np->need_linktimer && time_after(jiffies, np->link_timeout)) { |
2668 | spin_lock_irq(&np->lock); | 2671 | spin_lock_irqsave(&np->lock, flags); |
2669 | nv_linkchange(dev); | 2672 | nv_linkchange(dev); |
2670 | spin_unlock_irq(&np->lock); | 2673 | spin_unlock_irqrestore(&np->lock, flags); |
2671 | np->link_timeout = jiffies + LINK_TIMEOUT; | 2674 | np->link_timeout = jiffies + LINK_TIMEOUT; |
2672 | } | 2675 | } |
2673 | if (events & (NVREG_IRQ_UNKNOWN)) { | 2676 | if (events & (NVREG_IRQ_UNKNOWN)) { |
@@ -2675,7 +2678,7 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data) | |||
2675 | dev->name, events); | 2678 | dev->name, events); |
2676 | } | 2679 | } |
2677 | if (i > max_interrupt_work) { | 2680 | if (i > max_interrupt_work) { |
2678 | spin_lock_irq(&np->lock); | 2681 | spin_lock_irqsave(&np->lock, flags); |
2679 | /* disable interrupts on the nic */ | 2682 | /* disable interrupts on the nic */ |
2680 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); | 2683 | writel(NVREG_IRQ_OTHER, base + NvRegIrqMask); |
2681 | pci_push(base); | 2684 | pci_push(base); |
@@ -2685,7 +2688,7 @@ static irqreturn_t nv_nic_irq_other(int foo, void *data) | |||
2685 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); | 2688 | mod_timer(&np->nic_poll, jiffies + POLL_WAIT); |
2686 | } | 2689 | } |
2687 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i); | 2690 | printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i); |
2688 | spin_unlock_irq(&np->lock); | 2691 | spin_unlock_irqrestore(&np->lock, flags); |
2689 | break; | 2692 | break; |
2690 | } | 2693 | } |
2691 | 2694 | ||
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c index 4bac3cd8f235..44c9f993dcc4 100644 --- a/drivers/net/ibmveth.c +++ b/drivers/net/ibmveth.c | |||
@@ -212,7 +212,8 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc | |||
212 | break; | 212 | break; |
213 | } | 213 | } |
214 | 214 | ||
215 | free_index = pool->consumer_index++ % pool->size; | 215 | free_index = pool->consumer_index; |
216 | pool->consumer_index = (pool->consumer_index + 1) % pool->size; | ||
216 | index = pool->free_map[free_index]; | 217 | index = pool->free_map[free_index]; |
217 | 218 | ||
218 | ibmveth_assert(index != IBM_VETH_INVALID_MAP); | 219 | ibmveth_assert(index != IBM_VETH_INVALID_MAP); |
@@ -238,7 +239,10 @@ static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter, struc | |||
238 | if(lpar_rc != H_SUCCESS) { | 239 | if(lpar_rc != H_SUCCESS) { |
239 | pool->free_map[free_index] = index; | 240 | pool->free_map[free_index] = index; |
240 | pool->skbuff[index] = NULL; | 241 | pool->skbuff[index] = NULL; |
241 | pool->consumer_index--; | 242 | if (pool->consumer_index == 0) |
243 | pool->consumer_index = pool->size - 1; | ||
244 | else | ||
245 | pool->consumer_index--; | ||
242 | dma_unmap_single(&adapter->vdev->dev, | 246 | dma_unmap_single(&adapter->vdev->dev, |
243 | pool->dma_addr[index], pool->buff_size, | 247 | pool->dma_addr[index], pool->buff_size, |
244 | DMA_FROM_DEVICE); | 248 | DMA_FROM_DEVICE); |
@@ -325,7 +329,10 @@ static void ibmveth_remove_buffer_from_pool(struct ibmveth_adapter *adapter, u64 | |||
325 | adapter->rx_buff_pool[pool].buff_size, | 329 | adapter->rx_buff_pool[pool].buff_size, |
326 | DMA_FROM_DEVICE); | 330 | DMA_FROM_DEVICE); |
327 | 331 | ||
328 | free_index = adapter->rx_buff_pool[pool].producer_index++ % adapter->rx_buff_pool[pool].size; | 332 | free_index = adapter->rx_buff_pool[pool].producer_index; |
333 | adapter->rx_buff_pool[pool].producer_index | ||
334 | = (adapter->rx_buff_pool[pool].producer_index + 1) | ||
335 | % adapter->rx_buff_pool[pool].size; | ||
329 | adapter->rx_buff_pool[pool].free_map[free_index] = index; | 336 | adapter->rx_buff_pool[pool].free_map[free_index] = index; |
330 | 337 | ||
331 | mb(); | 338 | mb(); |
@@ -437,6 +444,31 @@ static void ibmveth_cleanup(struct ibmveth_adapter *adapter) | |||
437 | &adapter->rx_buff_pool[i]); | 444 | &adapter->rx_buff_pool[i]); |
438 | } | 445 | } |
439 | 446 | ||
447 | static int ibmveth_register_logical_lan(struct ibmveth_adapter *adapter, | ||
448 | union ibmveth_buf_desc rxq_desc, u64 mac_address) | ||
449 | { | ||
450 | int rc, try_again = 1; | ||
451 | |||
452 | /* After a kexec the adapter will still be open, so our attempt to | ||
453 | * open it will fail. So if we get a failure we free the adapter and | ||
454 | * try again, but only once. */ | ||
455 | retry: | ||
456 | rc = h_register_logical_lan(adapter->vdev->unit_address, | ||
457 | adapter->buffer_list_dma, rxq_desc.desc, | ||
458 | adapter->filter_list_dma, mac_address); | ||
459 | |||
460 | if (rc != H_SUCCESS && try_again) { | ||
461 | do { | ||
462 | rc = h_free_logical_lan(adapter->vdev->unit_address); | ||
463 | } while (H_IS_LONG_BUSY(rc) || (rc == H_BUSY)); | ||
464 | |||
465 | try_again = 0; | ||
466 | goto retry; | ||
467 | } | ||
468 | |||
469 | return rc; | ||
470 | } | ||
471 | |||
440 | static int ibmveth_open(struct net_device *netdev) | 472 | static int ibmveth_open(struct net_device *netdev) |
441 | { | 473 | { |
442 | struct ibmveth_adapter *adapter = netdev->priv; | 474 | struct ibmveth_adapter *adapter = netdev->priv; |
@@ -502,12 +534,9 @@ static int ibmveth_open(struct net_device *netdev) | |||
502 | ibmveth_debug_printk("filter list @ 0x%p\n", adapter->filter_list_addr); | 534 | ibmveth_debug_printk("filter list @ 0x%p\n", adapter->filter_list_addr); |
503 | ibmveth_debug_printk("receive q @ 0x%p\n", adapter->rx_queue.queue_addr); | 535 | ibmveth_debug_printk("receive q @ 0x%p\n", adapter->rx_queue.queue_addr); |
504 | 536 | ||
537 | h_vio_signal(adapter->vdev->unit_address, VIO_IRQ_DISABLE); | ||
505 | 538 | ||
506 | lpar_rc = h_register_logical_lan(adapter->vdev->unit_address, | 539 | lpar_rc = ibmveth_register_logical_lan(adapter, rxq_desc, mac_address); |
507 | adapter->buffer_list_dma, | ||
508 | rxq_desc.desc, | ||
509 | adapter->filter_list_dma, | ||
510 | mac_address); | ||
511 | 540 | ||
512 | if(lpar_rc != H_SUCCESS) { | 541 | if(lpar_rc != H_SUCCESS) { |
513 | ibmveth_error_printk("h_register_logical_lan failed with %ld\n", lpar_rc); | 542 | ibmveth_error_printk("h_register_logical_lan failed with %ld\n", lpar_rc); |
@@ -905,6 +934,14 @@ static int ibmveth_change_mtu(struct net_device *dev, int new_mtu) | |||
905 | return -EINVAL; | 934 | return -EINVAL; |
906 | } | 935 | } |
907 | 936 | ||
937 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
938 | static void ibmveth_poll_controller(struct net_device *dev) | ||
939 | { | ||
940 | ibmveth_replenish_task(dev->priv); | ||
941 | ibmveth_interrupt(dev->irq, dev); | ||
942 | } | ||
943 | #endif | ||
944 | |||
908 | static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id) | 945 | static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id) |
909 | { | 946 | { |
910 | int rc, i; | 947 | int rc, i; |
@@ -977,6 +1014,9 @@ static int __devinit ibmveth_probe(struct vio_dev *dev, const struct vio_device_ | |||
977 | netdev->ethtool_ops = &netdev_ethtool_ops; | 1014 | netdev->ethtool_ops = &netdev_ethtool_ops; |
978 | netdev->change_mtu = ibmveth_change_mtu; | 1015 | netdev->change_mtu = ibmveth_change_mtu; |
979 | SET_NETDEV_DEV(netdev, &dev->dev); | 1016 | SET_NETDEV_DEV(netdev, &dev->dev); |
1017 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
1018 | netdev->poll_controller = ibmveth_poll_controller; | ||
1019 | #endif | ||
980 | netdev->features |= NETIF_F_LLTX; | 1020 | netdev->features |= NETIF_F_LLTX; |
981 | spin_lock_init(&adapter->stats_lock); | 1021 | spin_lock_init(&adapter->stats_lock); |
982 | 1022 | ||
@@ -1132,7 +1172,9 @@ static void ibmveth_proc_register_adapter(struct ibmveth_adapter *adapter) | |||
1132 | { | 1172 | { |
1133 | struct proc_dir_entry *entry; | 1173 | struct proc_dir_entry *entry; |
1134 | if (ibmveth_proc_dir) { | 1174 | if (ibmveth_proc_dir) { |
1135 | entry = create_proc_entry(adapter->netdev->name, S_IFREG, ibmveth_proc_dir); | 1175 | char u_addr[10]; |
1176 | sprintf(u_addr, "%x", adapter->vdev->unit_address); | ||
1177 | entry = create_proc_entry(u_addr, S_IFREG, ibmveth_proc_dir); | ||
1136 | if (!entry) { | 1178 | if (!entry) { |
1137 | ibmveth_error_printk("Cannot create adapter proc entry"); | 1179 | ibmveth_error_printk("Cannot create adapter proc entry"); |
1138 | } else { | 1180 | } else { |
@@ -1147,7 +1189,9 @@ static void ibmveth_proc_register_adapter(struct ibmveth_adapter *adapter) | |||
1147 | static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter) | 1189 | static void ibmveth_proc_unregister_adapter(struct ibmveth_adapter *adapter) |
1148 | { | 1190 | { |
1149 | if (ibmveth_proc_dir) { | 1191 | if (ibmveth_proc_dir) { |
1150 | remove_proc_entry(adapter->netdev->name, ibmveth_proc_dir); | 1192 | char u_addr[10]; |
1193 | sprintf(u_addr, "%x", adapter->vdev->unit_address); | ||
1194 | remove_proc_entry(u_addr, ibmveth_proc_dir); | ||
1151 | } | 1195 | } |
1152 | } | 1196 | } |
1153 | 1197 | ||
diff --git a/drivers/net/ioc3-eth.c b/drivers/net/ioc3-eth.c index e963dbf816be..f56b00ee385e 100644 --- a/drivers/net/ioc3-eth.c +++ b/drivers/net/ioc3-eth.c | |||
@@ -1017,7 +1017,7 @@ static void ioc3_init(struct net_device *dev) | |||
1017 | struct ioc3_private *ip = netdev_priv(dev); | 1017 | struct ioc3_private *ip = netdev_priv(dev); |
1018 | struct ioc3 *ioc3 = ip->regs; | 1018 | struct ioc3 *ioc3 = ip->regs; |
1019 | 1019 | ||
1020 | del_timer(&ip->ioc3_timer); /* Kill if running */ | 1020 | del_timer_sync(&ip->ioc3_timer); /* Kill if running */ |
1021 | 1021 | ||
1022 | ioc3_w_emcr(EMCR_RST); /* Reset */ | 1022 | ioc3_w_emcr(EMCR_RST); /* Reset */ |
1023 | (void) ioc3_r_emcr(); /* Flush WB */ | 1023 | (void) ioc3_r_emcr(); /* Flush WB */ |
@@ -1081,7 +1081,7 @@ static int ioc3_close(struct net_device *dev) | |||
1081 | { | 1081 | { |
1082 | struct ioc3_private *ip = netdev_priv(dev); | 1082 | struct ioc3_private *ip = netdev_priv(dev); |
1083 | 1083 | ||
1084 | del_timer(&ip->ioc3_timer); | 1084 | del_timer_sync(&ip->ioc3_timer); |
1085 | 1085 | ||
1086 | netif_stop_queue(dev); | 1086 | netif_stop_queue(dev); |
1087 | 1087 | ||
diff --git a/drivers/net/irda/stir4200.c b/drivers/net/irda/stir4200.c index be8a66e702b0..3b4c47875935 100644 --- a/drivers/net/irda/stir4200.c +++ b/drivers/net/irda/stir4200.c | |||
@@ -15,8 +15,7 @@ | |||
15 | * | 15 | * |
16 | * This program is free software; you can redistribute it and/or modify | 16 | * This program is free software; you can redistribute it and/or modify |
17 | * it under the terms of the GNU General Public License as published by | 17 | * it under the terms of the GNU General Public License as published by |
18 | * the Free Software Foundation; either version 2 of the License, or | 18 | * the Free Software Foundation; either version 2 of the License. |
19 | * (at your option) any later version. | ||
20 | * | 19 | * |
21 | * This program is distributed in the hope that it will be useful, | 20 | * This program is distributed in the hope that it will be useful, |
22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c index 4178b4b1d2df..82c10dec1b5a 100644 --- a/drivers/net/loopback.c +++ b/drivers/net/loopback.c | |||
@@ -58,7 +58,11 @@ | |||
58 | #include <linux/tcp.h> | 58 | #include <linux/tcp.h> |
59 | #include <linux/percpu.h> | 59 | #include <linux/percpu.h> |
60 | 60 | ||
61 | static DEFINE_PER_CPU(struct net_device_stats, loopback_stats); | 61 | struct pcpu_lstats { |
62 | unsigned long packets; | ||
63 | unsigned long bytes; | ||
64 | }; | ||
65 | static DEFINE_PER_CPU(struct pcpu_lstats, pcpu_lstats); | ||
62 | 66 | ||
63 | #define LOOPBACK_OVERHEAD (128 + MAX_HEADER + 16 + 16) | 67 | #define LOOPBACK_OVERHEAD (128 + MAX_HEADER + 16 + 16) |
64 | 68 | ||
@@ -128,7 +132,7 @@ static void emulate_large_send_offload(struct sk_buff *skb) | |||
128 | */ | 132 | */ |
129 | static int loopback_xmit(struct sk_buff *skb, struct net_device *dev) | 133 | static int loopback_xmit(struct sk_buff *skb, struct net_device *dev) |
130 | { | 134 | { |
131 | struct net_device_stats *lb_stats; | 135 | struct pcpu_lstats *lb_stats; |
132 | 136 | ||
133 | skb_orphan(skb); | 137 | skb_orphan(skb); |
134 | 138 | ||
@@ -149,16 +153,14 @@ static int loopback_xmit(struct sk_buff *skb, struct net_device *dev) | |||
149 | #endif | 153 | #endif |
150 | dev->last_rx = jiffies; | 154 | dev->last_rx = jiffies; |
151 | 155 | ||
152 | lb_stats = &per_cpu(loopback_stats, get_cpu()); | 156 | /* it's OK to use __get_cpu_var() because BHs are off */ |
153 | lb_stats->rx_bytes += skb->len; | 157 | lb_stats = &__get_cpu_var(pcpu_lstats); |
154 | lb_stats->tx_bytes = lb_stats->rx_bytes; | 158 | lb_stats->bytes += skb->len; |
155 | lb_stats->rx_packets++; | 159 | lb_stats->packets++; |
156 | lb_stats->tx_packets = lb_stats->rx_packets; | ||
157 | put_cpu(); | ||
158 | 160 | ||
159 | netif_rx(skb); | 161 | netif_rx(skb); |
160 | 162 | ||
161 | return(0); | 163 | return 0; |
162 | } | 164 | } |
163 | 165 | ||
164 | static struct net_device_stats loopback_stats; | 166 | static struct net_device_stats loopback_stats; |
@@ -166,20 +168,21 @@ static struct net_device_stats loopback_stats; | |||
166 | static struct net_device_stats *get_stats(struct net_device *dev) | 168 | static struct net_device_stats *get_stats(struct net_device *dev) |
167 | { | 169 | { |
168 | struct net_device_stats *stats = &loopback_stats; | 170 | struct net_device_stats *stats = &loopback_stats; |
171 | unsigned long bytes = 0; | ||
172 | unsigned long packets = 0; | ||
169 | int i; | 173 | int i; |
170 | 174 | ||
171 | memset(stats, 0, sizeof(struct net_device_stats)); | ||
172 | |||
173 | for_each_possible_cpu(i) { | 175 | for_each_possible_cpu(i) { |
174 | struct net_device_stats *lb_stats; | 176 | const struct pcpu_lstats *lb_stats; |
175 | 177 | ||
176 | lb_stats = &per_cpu(loopback_stats, i); | 178 | lb_stats = &per_cpu(pcpu_lstats, i); |
177 | stats->rx_bytes += lb_stats->rx_bytes; | 179 | bytes += lb_stats->bytes; |
178 | stats->tx_bytes += lb_stats->tx_bytes; | 180 | packets += lb_stats->packets; |
179 | stats->rx_packets += lb_stats->rx_packets; | ||
180 | stats->tx_packets += lb_stats->tx_packets; | ||
181 | } | 181 | } |
182 | 182 | stats->rx_packets = packets; | |
183 | stats->tx_packets = packets; | ||
184 | stats->rx_bytes = bytes; | ||
185 | stats->tx_bytes = bytes; | ||
183 | return stats; | 186 | return stats; |
184 | } | 187 | } |
185 | 188 | ||
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 2ffa3a59e704..9997081c6dae 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -2155,7 +2155,7 @@ static void eth_update_mib_counters(struct mv643xx_private *mp) | |||
2155 | for (offset = ETH_MIB_BAD_OCTETS_RECEIVED; | 2155 | for (offset = ETH_MIB_BAD_OCTETS_RECEIVED; |
2156 | offset <= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS; | 2156 | offset <= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS; |
2157 | offset += 4) | 2157 | offset += 4) |
2158 | *(u32 *)((char *)p + offset) = read_mib(mp, offset); | 2158 | *(u32 *)((char *)p + offset) += read_mib(mp, offset); |
2159 | 2159 | ||
2160 | p->good_octets_sent += read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_LOW); | 2160 | p->good_octets_sent += read_mib(mp, ETH_MIB_GOOD_OCTETS_SENT_LOW); |
2161 | p->good_octets_sent += | 2161 | p->good_octets_sent += |
@@ -2164,7 +2164,7 @@ static void eth_update_mib_counters(struct mv643xx_private *mp) | |||
2164 | for (offset = ETH_MIB_GOOD_FRAMES_SENT; | 2164 | for (offset = ETH_MIB_GOOD_FRAMES_SENT; |
2165 | offset <= ETH_MIB_LATE_COLLISION; | 2165 | offset <= ETH_MIB_LATE_COLLISION; |
2166 | offset += 4) | 2166 | offset += 4) |
2167 | *(u32 *)((char *)p + offset) = read_mib(mp, offset); | 2167 | *(u32 *)((char *)p + offset) += read_mib(mp, offset); |
2168 | } | 2168 | } |
2169 | 2169 | ||
2170 | /* | 2170 | /* |
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index fdbb0d7213b0..806081b59733 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -2416,7 +2416,6 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) | |||
2416 | * firmware image, and set tx.boundary to 4KB. | 2416 | * firmware image, and set tx.boundary to 4KB. |
2417 | */ | 2417 | */ |
2418 | 2418 | ||
2419 | #define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132 | ||
2420 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7 | 2419 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7 |
2421 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa | 2420 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa |
2422 | 2421 | ||
diff --git a/drivers/net/myri_code.h b/drivers/net/myri_code.h index e21ec9b2c706..ba7b8652c501 100644 --- a/drivers/net/myri_code.h +++ b/drivers/net/myri_code.h | |||
@@ -1,8 +1,8 @@ | |||
1 | /* This is the Myrinet MCP code for LANai4.x */ | 1 | /* This is the Myrinet MCP code for LANai4.x */ |
2 | /* Generated by cat $MYRI_HOME/lib/lanai/mcp4.dat > myri_code4.h */ | 2 | /* Generated by cat $MYRI_HOME/lib/lanai/mcp4.dat > myri_code4.h */ |
3 | 3 | ||
4 | static unsigned int lanai4_code_off = 0x0000; /* half-word offset */ | 4 | static unsigned int __devinitdata lanai4_code_off = 0x0000; /* half-word offset */ |
5 | static unsigned char lanai4_code[76256] __initdata = { | 5 | static unsigned char __devinitdata lanai4_code[76256] = { |
6 | 0xF2,0x0E, | 6 | 0xF2,0x0E, |
7 | 0xFE,0x00, 0xC2,0x90, 0x00,0x00, 0x07,0x88, 0x00,0x08, 0xE0,0x01, 0x01,0x4C, 0x97,0x93, | 7 | 0xFE,0x00, 0xC2,0x90, 0x00,0x00, 0x07,0x88, 0x00,0x08, 0xE0,0x01, 0x01,0x4C, 0x97,0x93, |
8 | 0xFF,0xFC, 0xE0,0x00, 0x00,0x14, 0x00,0x00, 0x00,0x01, 0x00,0x00, 0x00,0x00, 0x92,0x93, | 8 | 0xFF,0xFC, 0xE0,0x00, 0x00,0x14, 0x00,0x00, 0x00,0x01, 0x00,0x00, 0x00,0x00, 0x92,0x93, |
@@ -4774,8 +4774,8 @@ static unsigned char lanai4_code[76256] __initdata = { | |||
4774 | 4774 | ||
4775 | /* This is the LANai data */ | 4775 | /* This is the LANai data */ |
4776 | 4776 | ||
4777 | static unsigned int lanai4_data_off = 0x94F0; /* half-word offset */ | 4777 | static unsigned int __devinitdata lanai4_data_off = 0x94F0; /* half-word offset */ |
4778 | static unsigned char lanai4_data[20472] __initdata; | 4778 | static unsigned char __devinitdata lanai4_data[20472]; |
4779 | 4779 | ||
4780 | 4780 | ||
4781 | #ifdef SYMBOL_DEFINES_COMPILED | 4781 | #ifdef SYMBOL_DEFINES_COMPILED |
diff --git a/drivers/net/myri_sbus.c b/drivers/net/myri_sbus.c index 466b484c9fa4..7747bfd99f91 100644 --- a/drivers/net/myri_sbus.c +++ b/drivers/net/myri_sbus.c | |||
@@ -168,7 +168,7 @@ static int myri_do_handshake(struct myri_eth *mp) | |||
168 | return 0; | 168 | return 0; |
169 | } | 169 | } |
170 | 170 | ||
171 | static int myri_load_lanai(struct myri_eth *mp) | 171 | static int __devinit myri_load_lanai(struct myri_eth *mp) |
172 | { | 172 | { |
173 | struct net_device *dev = mp->dev; | 173 | struct net_device *dev = mp->dev; |
174 | struct myri_shmem __iomem *shmem = mp->shmem; | 174 | struct myri_shmem __iomem *shmem = mp->shmem; |
@@ -891,7 +891,7 @@ static void dump_eeprom(struct myri_eth *mp) | |||
891 | } | 891 | } |
892 | #endif | 892 | #endif |
893 | 893 | ||
894 | static int __init myri_ether_init(struct sbus_dev *sdev) | 894 | static int __devinit myri_ether_init(struct sbus_dev *sdev) |
895 | { | 895 | { |
896 | static int num; | 896 | static int num; |
897 | static unsigned version_printed; | 897 | static unsigned version_printed; |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index f1c75751cab7..27f90b2139c0 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -214,6 +214,7 @@ static struct pci_device_id rtl8169_pci_tbl[] = { | |||
214 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), 0, 0, RTL_CFG_2 }, | 214 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), 0, 0, RTL_CFG_2 }, |
215 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), 0, 0, RTL_CFG_0 }, | 215 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), 0, 0, RTL_CFG_0 }, |
216 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), 0, 0, RTL_CFG_0 }, | 216 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), 0, 0, RTL_CFG_0 }, |
217 | { PCI_DEVICE(0x1259, 0xc107), 0, 0, RTL_CFG_0 }, | ||
217 | { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0 }, | 218 | { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0 }, |
218 | { PCI_VENDOR_ID_LINKSYS, 0x1032, | 219 | { PCI_VENDOR_ID_LINKSYS, 0x1032, |
219 | PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 }, | 220 | PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 }, |
@@ -1396,41 +1397,6 @@ static void rtl8169_netpoll(struct net_device *dev) | |||
1396 | } | 1397 | } |
1397 | #endif | 1398 | #endif |
1398 | 1399 | ||
1399 | static void __rtl8169_set_mac_addr(struct net_device *dev, void __iomem *ioaddr) | ||
1400 | { | ||
1401 | unsigned int i, j; | ||
1402 | |||
1403 | RTL_W8(Cfg9346, Cfg9346_Unlock); | ||
1404 | for (i = 0; i < 2; i++) { | ||
1405 | __le32 l = 0; | ||
1406 | |||
1407 | for (j = 0; j < 4; j++) { | ||
1408 | l <<= 8; | ||
1409 | l |= dev->dev_addr[4*i + j]; | ||
1410 | } | ||
1411 | RTL_W32(MAC0 + 4*i, cpu_to_be32(l)); | ||
1412 | } | ||
1413 | RTL_W8(Cfg9346, Cfg9346_Lock); | ||
1414 | } | ||
1415 | |||
1416 | static int rtl8169_set_mac_addr(struct net_device *dev, void *p) | ||
1417 | { | ||
1418 | struct rtl8169_private *tp = netdev_priv(dev); | ||
1419 | struct sockaddr *addr = p; | ||
1420 | |||
1421 | if (!is_valid_ether_addr(addr->sa_data)) | ||
1422 | return -EINVAL; | ||
1423 | |||
1424 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | ||
1425 | |||
1426 | if (netif_running(dev)) { | ||
1427 | spin_lock_irq(&tp->lock); | ||
1428 | __rtl8169_set_mac_addr(dev, tp->mmio_addr); | ||
1429 | spin_unlock_irq(&tp->lock); | ||
1430 | } | ||
1431 | return 0; | ||
1432 | } | ||
1433 | |||
1434 | static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev, | 1400 | static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev, |
1435 | void __iomem *ioaddr) | 1401 | void __iomem *ioaddr) |
1436 | { | 1402 | { |
@@ -1680,7 +1646,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1680 | dev->stop = rtl8169_close; | 1646 | dev->stop = rtl8169_close; |
1681 | dev->tx_timeout = rtl8169_tx_timeout; | 1647 | dev->tx_timeout = rtl8169_tx_timeout; |
1682 | dev->set_multicast_list = rtl8169_set_rx_mode; | 1648 | dev->set_multicast_list = rtl8169_set_rx_mode; |
1683 | dev->set_mac_address = rtl8169_set_mac_addr; | ||
1684 | dev->watchdog_timeo = RTL8169_TX_TIMEOUT; | 1649 | dev->watchdog_timeo = RTL8169_TX_TIMEOUT; |
1685 | dev->irq = pdev->irq; | 1650 | dev->irq = pdev->irq; |
1686 | dev->base_addr = (unsigned long) ioaddr; | 1651 | dev->base_addr = (unsigned long) ioaddr; |
@@ -1928,8 +1893,6 @@ rtl8169_hw_start(struct net_device *dev) | |||
1928 | /* Enable all known interrupts by setting the interrupt mask. */ | 1893 | /* Enable all known interrupts by setting the interrupt mask. */ |
1929 | RTL_W16(IntrMask, rtl8169_intr_mask); | 1894 | RTL_W16(IntrMask, rtl8169_intr_mask); |
1930 | 1895 | ||
1931 | __rtl8169_set_mac_addr(dev, ioaddr); | ||
1932 | |||
1933 | netif_start_queue(dev); | 1896 | netif_start_queue(dev); |
1934 | } | 1897 | } |
1935 | 1898 | ||
@@ -2700,6 +2663,7 @@ static void rtl8169_down(struct net_device *dev) | |||
2700 | struct rtl8169_private *tp = netdev_priv(dev); | 2663 | struct rtl8169_private *tp = netdev_priv(dev); |
2701 | void __iomem *ioaddr = tp->mmio_addr; | 2664 | void __iomem *ioaddr = tp->mmio_addr; |
2702 | unsigned int poll_locked = 0; | 2665 | unsigned int poll_locked = 0; |
2666 | unsigned int intrmask; | ||
2703 | 2667 | ||
2704 | rtl8169_delete_timer(dev); | 2668 | rtl8169_delete_timer(dev); |
2705 | 2669 | ||
@@ -2738,8 +2702,11 @@ core_down: | |||
2738 | * 2) dev->change_mtu | 2702 | * 2) dev->change_mtu |
2739 | * -> rtl8169_poll can not be issued again and re-enable the | 2703 | * -> rtl8169_poll can not be issued again and re-enable the |
2740 | * interruptions. Let's simply issue the IRQ down sequence again. | 2704 | * interruptions. Let's simply issue the IRQ down sequence again. |
2705 | * | ||
2706 | * No loop if hotpluged or major error (0xffff). | ||
2741 | */ | 2707 | */ |
2742 | if (RTL_R16(IntrMask)) | 2708 | intrmask = RTL_R16(IntrMask); |
2709 | if (intrmask && (intrmask != 0xffff)) | ||
2743 | goto core_down; | 2710 | goto core_down; |
2744 | 2711 | ||
2745 | rtl8169_tx_clear(tp); | 2712 | rtl8169_tx_clear(tp); |
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c index a231ab7d28dd..33569ec9dbfc 100644 --- a/drivers/net/s2io.c +++ b/drivers/net/s2io.c | |||
@@ -5985,6 +5985,11 @@ static int set_rxd_buffer_pointer(nic_t *sp, RxD_t *rxdp, buffAdd_t *ba, | |||
5985 | ((RxD3_t*)rxdp)->Buffer1_ptr = *temp1; | 5985 | ((RxD3_t*)rxdp)->Buffer1_ptr = *temp1; |
5986 | } else { | 5986 | } else { |
5987 | *skb = dev_alloc_skb(size); | 5987 | *skb = dev_alloc_skb(size); |
5988 | if (!(*skb)) { | ||
5989 | DBG_PRINT(ERR_DBG, "%s: dev_alloc_skb failed\n", | ||
5990 | dev->name); | ||
5991 | return -ENOMEM; | ||
5992 | } | ||
5988 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2 = | 5993 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2 = |
5989 | pci_map_single(sp->pdev, (*skb)->data, | 5994 | pci_map_single(sp->pdev, (*skb)->data, |
5990 | dev->mtu + 4, | 5995 | dev->mtu + 4, |
@@ -6007,7 +6012,11 @@ static int set_rxd_buffer_pointer(nic_t *sp, RxD_t *rxdp, buffAdd_t *ba, | |||
6007 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2; | 6012 | ((RxD3_t*)rxdp)->Buffer2_ptr = *temp2; |
6008 | } else { | 6013 | } else { |
6009 | *skb = dev_alloc_skb(size); | 6014 | *skb = dev_alloc_skb(size); |
6010 | 6015 | if (!(*skb)) { | |
6016 | DBG_PRINT(ERR_DBG, "%s: dev_alloc_skb failed\n", | ||
6017 | dev->name); | ||
6018 | return -ENOMEM; | ||
6019 | } | ||
6011 | ((RxD3_t*)rxdp)->Buffer0_ptr = *temp0 = | 6020 | ((RxD3_t*)rxdp)->Buffer0_ptr = *temp0 = |
6012 | pci_map_single(sp->pdev, ba->ba_0, BUF0_LEN, | 6021 | pci_map_single(sp->pdev, ba->ba_0, BUF0_LEN, |
6013 | PCI_DMA_FROMDEVICE); | 6022 | PCI_DMA_FROMDEVICE); |
diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c index db2324939b69..1eae16b72b4b 100644 --- a/drivers/net/sb1250-mac.c +++ b/drivers/net/sb1250-mac.c | |||
@@ -2903,7 +2903,7 @@ sbmac_init_module(void) | |||
2903 | 2903 | ||
2904 | dev = alloc_etherdev(sizeof(struct sbmac_softc)); | 2904 | dev = alloc_etherdev(sizeof(struct sbmac_softc)); |
2905 | if (!dev) | 2905 | if (!dev) |
2906 | return -ENOMEM; /* return ENOMEM */ | 2906 | return -ENOMEM; |
2907 | 2907 | ||
2908 | printk(KERN_DEBUG "sbmac: configuring MAC at %lx\n", port); | 2908 | printk(KERN_DEBUG "sbmac: configuring MAC at %lx\n", port); |
2909 | 2909 | ||
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index a4a58e4e93a1..b2949035f66a 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -11,8 +11,7 @@ | |||
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or modify | 12 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License as published by | 13 | * it under the terms of the GNU General Public License as published by |
14 | * the Free Software Foundation; either version 2 of the License, or | 14 | * the Free Software Foundation; either version 2 of the License. |
15 | * (at your option) any later version. | ||
16 | * | 15 | * |
17 | * This program is distributed in the hope that it will be useful, | 16 | * This program is distributed in the hope that it will be useful, |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
@@ -43,7 +42,7 @@ | |||
43 | #include "skge.h" | 42 | #include "skge.h" |
44 | 43 | ||
45 | #define DRV_NAME "skge" | 44 | #define DRV_NAME "skge" |
46 | #define DRV_VERSION "1.8" | 45 | #define DRV_VERSION "1.9" |
47 | #define PFX DRV_NAME " " | 46 | #define PFX DRV_NAME " " |
48 | 47 | ||
49 | #define DEFAULT_TX_RING_SIZE 128 | 48 | #define DEFAULT_TX_RING_SIZE 128 |
@@ -197,8 +196,8 @@ static u32 skge_supported_modes(const struct skge_hw *hw) | |||
197 | else if (hw->chip_id == CHIP_ID_YUKON) | 196 | else if (hw->chip_id == CHIP_ID_YUKON) |
198 | supported &= ~SUPPORTED_1000baseT_Half; | 197 | supported &= ~SUPPORTED_1000baseT_Half; |
199 | } else | 198 | } else |
200 | supported = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE | 199 | supported = SUPPORTED_1000baseT_Full | SUPPORTED_1000baseT_Half |
201 | | SUPPORTED_Autoneg; | 200 | | SUPPORTED_FIBRE | SUPPORTED_Autoneg; |
202 | 201 | ||
203 | return supported; | 202 | return supported; |
204 | } | 203 | } |
@@ -487,31 +486,37 @@ static void skge_get_pauseparam(struct net_device *dev, | |||
487 | { | 486 | { |
488 | struct skge_port *skge = netdev_priv(dev); | 487 | struct skge_port *skge = netdev_priv(dev); |
489 | 488 | ||
490 | ecmd->tx_pause = (skge->flow_control == FLOW_MODE_LOC_SEND) | 489 | ecmd->rx_pause = (skge->flow_control == FLOW_MODE_SYMMETRIC) |
491 | || (skge->flow_control == FLOW_MODE_SYMMETRIC); | 490 | || (skge->flow_control == FLOW_MODE_SYM_OR_REM); |
492 | ecmd->rx_pause = (skge->flow_control == FLOW_MODE_REM_SEND) | 491 | ecmd->tx_pause = ecmd->rx_pause || (skge->flow_control == FLOW_MODE_LOC_SEND); |
493 | || (skge->flow_control == FLOW_MODE_SYMMETRIC); | ||
494 | 492 | ||
495 | ecmd->autoneg = skge->autoneg; | 493 | ecmd->autoneg = ecmd->rx_pause || ecmd->tx_pause; |
496 | } | 494 | } |
497 | 495 | ||
498 | static int skge_set_pauseparam(struct net_device *dev, | 496 | static int skge_set_pauseparam(struct net_device *dev, |
499 | struct ethtool_pauseparam *ecmd) | 497 | struct ethtool_pauseparam *ecmd) |
500 | { | 498 | { |
501 | struct skge_port *skge = netdev_priv(dev); | 499 | struct skge_port *skge = netdev_priv(dev); |
500 | struct ethtool_pauseparam old; | ||
502 | 501 | ||
503 | skge->autoneg = ecmd->autoneg; | 502 | skge_get_pauseparam(dev, &old); |
504 | if (ecmd->rx_pause && ecmd->tx_pause) | 503 | |
505 | skge->flow_control = FLOW_MODE_SYMMETRIC; | 504 | if (ecmd->autoneg != old.autoneg) |
506 | else if (ecmd->rx_pause && !ecmd->tx_pause) | 505 | skge->flow_control = ecmd->autoneg ? FLOW_MODE_NONE : FLOW_MODE_SYMMETRIC; |
507 | skge->flow_control = FLOW_MODE_REM_SEND; | 506 | else { |
508 | else if (!ecmd->rx_pause && ecmd->tx_pause) | 507 | if (ecmd->rx_pause && ecmd->tx_pause) |
509 | skge->flow_control = FLOW_MODE_LOC_SEND; | 508 | skge->flow_control = FLOW_MODE_SYMMETRIC; |
510 | else | 509 | else if (ecmd->rx_pause && !ecmd->tx_pause) |
511 | skge->flow_control = FLOW_MODE_NONE; | 510 | skge->flow_control = FLOW_MODE_SYM_OR_REM; |
511 | else if (!ecmd->rx_pause && ecmd->tx_pause) | ||
512 | skge->flow_control = FLOW_MODE_LOC_SEND; | ||
513 | else | ||
514 | skge->flow_control = FLOW_MODE_NONE; | ||
515 | } | ||
512 | 516 | ||
513 | if (netif_running(dev)) | 517 | if (netif_running(dev)) |
514 | skge_phy_reset(skge); | 518 | skge_phy_reset(skge); |
519 | |||
515 | return 0; | 520 | return 0; |
516 | } | 521 | } |
517 | 522 | ||
@@ -854,6 +859,23 @@ static int skge_rx_fill(struct net_device *dev) | |||
854 | return 0; | 859 | return 0; |
855 | } | 860 | } |
856 | 861 | ||
862 | static const char *skge_pause(enum pause_status status) | ||
863 | { | ||
864 | switch(status) { | ||
865 | case FLOW_STAT_NONE: | ||
866 | return "none"; | ||
867 | case FLOW_STAT_REM_SEND: | ||
868 | return "rx only"; | ||
869 | case FLOW_STAT_LOC_SEND: | ||
870 | return "tx_only"; | ||
871 | case FLOW_STAT_SYMMETRIC: /* Both station may send PAUSE */ | ||
872 | return "both"; | ||
873 | default: | ||
874 | return "indeterminated"; | ||
875 | } | ||
876 | } | ||
877 | |||
878 | |||
857 | static void skge_link_up(struct skge_port *skge) | 879 | static void skge_link_up(struct skge_port *skge) |
858 | { | 880 | { |
859 | skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), | 881 | skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), |
@@ -862,16 +884,13 @@ static void skge_link_up(struct skge_port *skge) | |||
862 | netif_carrier_on(skge->netdev); | 884 | netif_carrier_on(skge->netdev); |
863 | netif_wake_queue(skge->netdev); | 885 | netif_wake_queue(skge->netdev); |
864 | 886 | ||
865 | if (netif_msg_link(skge)) | 887 | if (netif_msg_link(skge)) { |
866 | printk(KERN_INFO PFX | 888 | printk(KERN_INFO PFX |
867 | "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", | 889 | "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", |
868 | skge->netdev->name, skge->speed, | 890 | skge->netdev->name, skge->speed, |
869 | skge->duplex == DUPLEX_FULL ? "full" : "half", | 891 | skge->duplex == DUPLEX_FULL ? "full" : "half", |
870 | (skge->flow_control == FLOW_MODE_NONE) ? "none" : | 892 | skge_pause(skge->flow_status)); |
871 | (skge->flow_control == FLOW_MODE_LOC_SEND) ? "tx only" : | 893 | } |
872 | (skge->flow_control == FLOW_MODE_REM_SEND) ? "rx only" : | ||
873 | (skge->flow_control == FLOW_MODE_SYMMETRIC) ? "tx and rx" : | ||
874 | "unknown"); | ||
875 | } | 894 | } |
876 | 895 | ||
877 | static void skge_link_down(struct skge_port *skge) | 896 | static void skge_link_down(struct skge_port *skge) |
@@ -884,6 +903,29 @@ static void skge_link_down(struct skge_port *skge) | |||
884 | printk(KERN_INFO PFX "%s: Link is down.\n", skge->netdev->name); | 903 | printk(KERN_INFO PFX "%s: Link is down.\n", skge->netdev->name); |
885 | } | 904 | } |
886 | 905 | ||
906 | |||
907 | static void xm_link_down(struct skge_hw *hw, int port) | ||
908 | { | ||
909 | struct net_device *dev = hw->dev[port]; | ||
910 | struct skge_port *skge = netdev_priv(dev); | ||
911 | u16 cmd, msk; | ||
912 | |||
913 | if (hw->phy_type == SK_PHY_XMAC) { | ||
914 | msk = xm_read16(hw, port, XM_IMSK); | ||
915 | msk |= XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE | XM_IS_AND; | ||
916 | xm_write16(hw, port, XM_IMSK, msk); | ||
917 | } | ||
918 | |||
919 | cmd = xm_read16(hw, port, XM_MMU_CMD); | ||
920 | cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX); | ||
921 | xm_write16(hw, port, XM_MMU_CMD, cmd); | ||
922 | /* dummy read to ensure writing */ | ||
923 | (void) xm_read16(hw, port, XM_MMU_CMD); | ||
924 | |||
925 | if (netif_carrier_ok(dev)) | ||
926 | skge_link_down(skge); | ||
927 | } | ||
928 | |||
887 | static int __xm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val) | 929 | static int __xm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val) |
888 | { | 930 | { |
889 | int i; | 931 | int i; |
@@ -992,7 +1034,15 @@ static const u16 phy_pause_map[] = { | |||
992 | [FLOW_MODE_NONE] = 0, | 1034 | [FLOW_MODE_NONE] = 0, |
993 | [FLOW_MODE_LOC_SEND] = PHY_AN_PAUSE_ASYM, | 1035 | [FLOW_MODE_LOC_SEND] = PHY_AN_PAUSE_ASYM, |
994 | [FLOW_MODE_SYMMETRIC] = PHY_AN_PAUSE_CAP, | 1036 | [FLOW_MODE_SYMMETRIC] = PHY_AN_PAUSE_CAP, |
995 | [FLOW_MODE_REM_SEND] = PHY_AN_PAUSE_CAP | PHY_AN_PAUSE_ASYM, | 1037 | [FLOW_MODE_SYM_OR_REM] = PHY_AN_PAUSE_CAP | PHY_AN_PAUSE_ASYM, |
1038 | }; | ||
1039 | |||
1040 | /* special defines for FIBER (88E1011S only) */ | ||
1041 | static const u16 fiber_pause_map[] = { | ||
1042 | [FLOW_MODE_NONE] = PHY_X_P_NO_PAUSE, | ||
1043 | [FLOW_MODE_LOC_SEND] = PHY_X_P_ASYM_MD, | ||
1044 | [FLOW_MODE_SYMMETRIC] = PHY_X_P_SYM_MD, | ||
1045 | [FLOW_MODE_SYM_OR_REM] = PHY_X_P_BOTH_MD, | ||
996 | }; | 1046 | }; |
997 | 1047 | ||
998 | 1048 | ||
@@ -1008,14 +1058,7 @@ static void bcom_check_link(struct skge_hw *hw, int port) | |||
1008 | status = xm_phy_read(hw, port, PHY_BCOM_STAT); | 1058 | status = xm_phy_read(hw, port, PHY_BCOM_STAT); |
1009 | 1059 | ||
1010 | if ((status & PHY_ST_LSYNC) == 0) { | 1060 | if ((status & PHY_ST_LSYNC) == 0) { |
1011 | u16 cmd = xm_read16(hw, port, XM_MMU_CMD); | 1061 | xm_link_down(hw, port); |
1012 | cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX); | ||
1013 | xm_write16(hw, port, XM_MMU_CMD, cmd); | ||
1014 | /* dummy read to ensure writing */ | ||
1015 | (void) xm_read16(hw, port, XM_MMU_CMD); | ||
1016 | |||
1017 | if (netif_carrier_ok(dev)) | ||
1018 | skge_link_down(skge); | ||
1019 | return; | 1062 | return; |
1020 | } | 1063 | } |
1021 | 1064 | ||
@@ -1048,20 +1091,19 @@ static void bcom_check_link(struct skge_hw *hw, int port) | |||
1048 | return; | 1091 | return; |
1049 | } | 1092 | } |
1050 | 1093 | ||
1051 | |||
1052 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ | 1094 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ |
1053 | switch (aux & PHY_B_AS_PAUSE_MSK) { | 1095 | switch (aux & PHY_B_AS_PAUSE_MSK) { |
1054 | case PHY_B_AS_PAUSE_MSK: | 1096 | case PHY_B_AS_PAUSE_MSK: |
1055 | skge->flow_control = FLOW_MODE_SYMMETRIC; | 1097 | skge->flow_status = FLOW_STAT_SYMMETRIC; |
1056 | break; | 1098 | break; |
1057 | case PHY_B_AS_PRR: | 1099 | case PHY_B_AS_PRR: |
1058 | skge->flow_control = FLOW_MODE_REM_SEND; | 1100 | skge->flow_status = FLOW_STAT_REM_SEND; |
1059 | break; | 1101 | break; |
1060 | case PHY_B_AS_PRT: | 1102 | case PHY_B_AS_PRT: |
1061 | skge->flow_control = FLOW_MODE_LOC_SEND; | 1103 | skge->flow_status = FLOW_STAT_LOC_SEND; |
1062 | break; | 1104 | break; |
1063 | default: | 1105 | default: |
1064 | skge->flow_control = FLOW_MODE_NONE; | 1106 | skge->flow_status = FLOW_STAT_NONE; |
1065 | } | 1107 | } |
1066 | skge->speed = SPEED_1000; | 1108 | skge->speed = SPEED_1000; |
1067 | } | 1109 | } |
@@ -1191,17 +1233,7 @@ static void xm_phy_init(struct skge_port *skge) | |||
1191 | if (skge->advertising & ADVERTISED_1000baseT_Full) | 1233 | if (skge->advertising & ADVERTISED_1000baseT_Full) |
1192 | ctrl |= PHY_X_AN_FD; | 1234 | ctrl |= PHY_X_AN_FD; |
1193 | 1235 | ||
1194 | switch(skge->flow_control) { | 1236 | ctrl |= fiber_pause_map[skge->flow_control]; |
1195 | case FLOW_MODE_NONE: | ||
1196 | ctrl |= PHY_X_P_NO_PAUSE; | ||
1197 | break; | ||
1198 | case FLOW_MODE_LOC_SEND: | ||
1199 | ctrl |= PHY_X_P_ASYM_MD; | ||
1200 | break; | ||
1201 | case FLOW_MODE_SYMMETRIC: | ||
1202 | ctrl |= PHY_X_P_BOTH_MD; | ||
1203 | break; | ||
1204 | } | ||
1205 | 1237 | ||
1206 | xm_phy_write(hw, port, PHY_XMAC_AUNE_ADV, ctrl); | 1238 | xm_phy_write(hw, port, PHY_XMAC_AUNE_ADV, ctrl); |
1207 | 1239 | ||
@@ -1235,14 +1267,7 @@ static void xm_check_link(struct net_device *dev) | |||
1235 | status = xm_phy_read(hw, port, PHY_XMAC_STAT); | 1267 | status = xm_phy_read(hw, port, PHY_XMAC_STAT); |
1236 | 1268 | ||
1237 | if ((status & PHY_ST_LSYNC) == 0) { | 1269 | if ((status & PHY_ST_LSYNC) == 0) { |
1238 | u16 cmd = xm_read16(hw, port, XM_MMU_CMD); | 1270 | xm_link_down(hw, port); |
1239 | cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX); | ||
1240 | xm_write16(hw, port, XM_MMU_CMD, cmd); | ||
1241 | /* dummy read to ensure writing */ | ||
1242 | (void) xm_read16(hw, port, XM_MMU_CMD); | ||
1243 | |||
1244 | if (netif_carrier_ok(dev)) | ||
1245 | skge_link_down(skge); | ||
1246 | return; | 1271 | return; |
1247 | } | 1272 | } |
1248 | 1273 | ||
@@ -1276,15 +1301,20 @@ static void xm_check_link(struct net_device *dev) | |||
1276 | } | 1301 | } |
1277 | 1302 | ||
1278 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ | 1303 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ |
1279 | if (lpa & PHY_X_P_SYM_MD) | 1304 | if ((skge->flow_control == FLOW_MODE_SYMMETRIC || |
1280 | skge->flow_control = FLOW_MODE_SYMMETRIC; | 1305 | skge->flow_control == FLOW_MODE_SYM_OR_REM) && |
1281 | else if ((lpa & PHY_X_RS_PAUSE) == PHY_X_P_ASYM_MD) | 1306 | (lpa & PHY_X_P_SYM_MD)) |
1282 | skge->flow_control = FLOW_MODE_REM_SEND; | 1307 | skge->flow_status = FLOW_STAT_SYMMETRIC; |
1283 | else if ((lpa & PHY_X_RS_PAUSE) == PHY_X_P_BOTH_MD) | 1308 | else if (skge->flow_control == FLOW_MODE_SYM_OR_REM && |
1284 | skge->flow_control = FLOW_MODE_LOC_SEND; | 1309 | (lpa & PHY_X_RS_PAUSE) == PHY_X_P_ASYM_MD) |
1310 | /* Enable PAUSE receive, disable PAUSE transmit */ | ||
1311 | skge->flow_status = FLOW_STAT_REM_SEND; | ||
1312 | else if (skge->flow_control == FLOW_MODE_LOC_SEND && | ||
1313 | (lpa & PHY_X_RS_PAUSE) == PHY_X_P_BOTH_MD) | ||
1314 | /* Disable PAUSE receive, enable PAUSE transmit */ | ||
1315 | skge->flow_status = FLOW_STAT_LOC_SEND; | ||
1285 | else | 1316 | else |
1286 | skge->flow_control = FLOW_MODE_NONE; | 1317 | skge->flow_status = FLOW_STAT_NONE; |
1287 | |||
1288 | 1318 | ||
1289 | skge->speed = SPEED_1000; | 1319 | skge->speed = SPEED_1000; |
1290 | } | 1320 | } |
@@ -1568,6 +1598,10 @@ static void genesis_mac_intr(struct skge_hw *hw, int port) | |||
1568 | printk(KERN_DEBUG PFX "%s: mac interrupt status 0x%x\n", | 1598 | printk(KERN_DEBUG PFX "%s: mac interrupt status 0x%x\n", |
1569 | skge->netdev->name, status); | 1599 | skge->netdev->name, status); |
1570 | 1600 | ||
1601 | if (hw->phy_type == SK_PHY_XMAC && | ||
1602 | (status & (XM_IS_INP_ASS | XM_IS_LIPA_RC))) | ||
1603 | xm_link_down(hw, port); | ||
1604 | |||
1571 | if (status & XM_IS_TXF_UR) { | 1605 | if (status & XM_IS_TXF_UR) { |
1572 | xm_write32(hw, port, XM_MODE, XM_MD_FTF); | 1606 | xm_write32(hw, port, XM_MODE, XM_MD_FTF); |
1573 | ++skge->net_stats.tx_fifo_errors; | 1607 | ++skge->net_stats.tx_fifo_errors; |
@@ -1582,7 +1616,7 @@ static void genesis_link_up(struct skge_port *skge) | |||
1582 | { | 1616 | { |
1583 | struct skge_hw *hw = skge->hw; | 1617 | struct skge_hw *hw = skge->hw; |
1584 | int port = skge->port; | 1618 | int port = skge->port; |
1585 | u16 cmd; | 1619 | u16 cmd, msk; |
1586 | u32 mode; | 1620 | u32 mode; |
1587 | 1621 | ||
1588 | cmd = xm_read16(hw, port, XM_MMU_CMD); | 1622 | cmd = xm_read16(hw, port, XM_MMU_CMD); |
@@ -1591,8 +1625,8 @@ static void genesis_link_up(struct skge_port *skge) | |||
1591 | * enabling pause frame reception is required for 1000BT | 1625 | * enabling pause frame reception is required for 1000BT |
1592 | * because the XMAC is not reset if the link is going down | 1626 | * because the XMAC is not reset if the link is going down |
1593 | */ | 1627 | */ |
1594 | if (skge->flow_control == FLOW_MODE_NONE || | 1628 | if (skge->flow_status == FLOW_STAT_NONE || |
1595 | skge->flow_control == FLOW_MODE_LOC_SEND) | 1629 | skge->flow_status == FLOW_STAT_LOC_SEND) |
1596 | /* Disable Pause Frame Reception */ | 1630 | /* Disable Pause Frame Reception */ |
1597 | cmd |= XM_MMU_IGN_PF; | 1631 | cmd |= XM_MMU_IGN_PF; |
1598 | else | 1632 | else |
@@ -1602,8 +1636,8 @@ static void genesis_link_up(struct skge_port *skge) | |||
1602 | xm_write16(hw, port, XM_MMU_CMD, cmd); | 1636 | xm_write16(hw, port, XM_MMU_CMD, cmd); |
1603 | 1637 | ||
1604 | mode = xm_read32(hw, port, XM_MODE); | 1638 | mode = xm_read32(hw, port, XM_MODE); |
1605 | if (skge->flow_control == FLOW_MODE_SYMMETRIC || | 1639 | if (skge->flow_status== FLOW_STAT_SYMMETRIC || |
1606 | skge->flow_control == FLOW_MODE_LOC_SEND) { | 1640 | skge->flow_status == FLOW_STAT_LOC_SEND) { |
1607 | /* | 1641 | /* |
1608 | * Configure Pause Frame Generation | 1642 | * Configure Pause Frame Generation |
1609 | * Use internal and external Pause Frame Generation. | 1643 | * Use internal and external Pause Frame Generation. |
@@ -1631,7 +1665,11 @@ static void genesis_link_up(struct skge_port *skge) | |||
1631 | } | 1665 | } |
1632 | 1666 | ||
1633 | xm_write32(hw, port, XM_MODE, mode); | 1667 | xm_write32(hw, port, XM_MODE, mode); |
1634 | xm_write16(hw, port, XM_IMSK, XM_DEF_MSK); | 1668 | msk = XM_DEF_MSK; |
1669 | if (hw->phy_type != SK_PHY_XMAC) | ||
1670 | msk |= XM_IS_INP_ASS; /* disable GP0 interrupt bit */ | ||
1671 | |||
1672 | xm_write16(hw, port, XM_IMSK, msk); | ||
1635 | xm_read16(hw, port, XM_ISRC); | 1673 | xm_read16(hw, port, XM_ISRC); |
1636 | 1674 | ||
1637 | /* get MMU Command Reg. */ | 1675 | /* get MMU Command Reg. */ |
@@ -1779,11 +1817,17 @@ static void yukon_init(struct skge_hw *hw, int port) | |||
1779 | adv |= PHY_M_AN_10_FD; | 1817 | adv |= PHY_M_AN_10_FD; |
1780 | if (skge->advertising & ADVERTISED_10baseT_Half) | 1818 | if (skge->advertising & ADVERTISED_10baseT_Half) |
1781 | adv |= PHY_M_AN_10_HD; | 1819 | adv |= PHY_M_AN_10_HD; |
1782 | } else /* special defines for FIBER (88E1011S only) */ | ||
1783 | adv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD; | ||
1784 | 1820 | ||
1785 | /* Set Flow-control capabilities */ | 1821 | /* Set Flow-control capabilities */ |
1786 | adv |= phy_pause_map[skge->flow_control]; | 1822 | adv |= phy_pause_map[skge->flow_control]; |
1823 | } else { | ||
1824 | if (skge->advertising & ADVERTISED_1000baseT_Full) | ||
1825 | adv |= PHY_M_AN_1000X_AFD; | ||
1826 | if (skge->advertising & ADVERTISED_1000baseT_Half) | ||
1827 | adv |= PHY_M_AN_1000X_AHD; | ||
1828 | |||
1829 | adv |= fiber_pause_map[skge->flow_control]; | ||
1830 | } | ||
1787 | 1831 | ||
1788 | /* Restart Auto-negotiation */ | 1832 | /* Restart Auto-negotiation */ |
1789 | ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; | 1833 | ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; |
@@ -1917,6 +1961,11 @@ static void yukon_mac_init(struct skge_hw *hw, int port) | |||
1917 | case FLOW_MODE_LOC_SEND: | 1961 | case FLOW_MODE_LOC_SEND: |
1918 | /* disable Rx flow-control */ | 1962 | /* disable Rx flow-control */ |
1919 | reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; | 1963 | reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; |
1964 | break; | ||
1965 | case FLOW_MODE_SYMMETRIC: | ||
1966 | case FLOW_MODE_SYM_OR_REM: | ||
1967 | /* enable Tx & Rx flow-control */ | ||
1968 | break; | ||
1920 | } | 1969 | } |
1921 | 1970 | ||
1922 | gma_write16(hw, port, GM_GP_CTRL, reg); | 1971 | gma_write16(hw, port, GM_GP_CTRL, reg); |
@@ -2111,13 +2160,11 @@ static void yukon_link_down(struct skge_port *skge) | |||
2111 | ctrl &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); | 2160 | ctrl &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); |
2112 | gma_write16(hw, port, GM_GP_CTRL, ctrl); | 2161 | gma_write16(hw, port, GM_GP_CTRL, ctrl); |
2113 | 2162 | ||
2114 | if (skge->flow_control == FLOW_MODE_REM_SEND) { | 2163 | if (skge->flow_status == FLOW_STAT_REM_SEND) { |
2164 | ctrl = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); | ||
2165 | ctrl |= PHY_M_AN_ASP; | ||
2115 | /* restore Asymmetric Pause bit */ | 2166 | /* restore Asymmetric Pause bit */ |
2116 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, | 2167 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, ctrl); |
2117 | gm_phy_read(hw, port, | ||
2118 | PHY_MARV_AUNE_ADV) | ||
2119 | | PHY_M_AN_ASP); | ||
2120 | |||
2121 | } | 2168 | } |
2122 | 2169 | ||
2123 | yukon_reset(hw, port); | 2170 | yukon_reset(hw, port); |
@@ -2164,19 +2211,19 @@ static void yukon_phy_intr(struct skge_port *skge) | |||
2164 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ | 2211 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ |
2165 | switch (phystat & PHY_M_PS_PAUSE_MSK) { | 2212 | switch (phystat & PHY_M_PS_PAUSE_MSK) { |
2166 | case PHY_M_PS_PAUSE_MSK: | 2213 | case PHY_M_PS_PAUSE_MSK: |
2167 | skge->flow_control = FLOW_MODE_SYMMETRIC; | 2214 | skge->flow_status = FLOW_STAT_SYMMETRIC; |
2168 | break; | 2215 | break; |
2169 | case PHY_M_PS_RX_P_EN: | 2216 | case PHY_M_PS_RX_P_EN: |
2170 | skge->flow_control = FLOW_MODE_REM_SEND; | 2217 | skge->flow_status = FLOW_STAT_REM_SEND; |
2171 | break; | 2218 | break; |
2172 | case PHY_M_PS_TX_P_EN: | 2219 | case PHY_M_PS_TX_P_EN: |
2173 | skge->flow_control = FLOW_MODE_LOC_SEND; | 2220 | skge->flow_status = FLOW_STAT_LOC_SEND; |
2174 | break; | 2221 | break; |
2175 | default: | 2222 | default: |
2176 | skge->flow_control = FLOW_MODE_NONE; | 2223 | skge->flow_status = FLOW_STAT_NONE; |
2177 | } | 2224 | } |
2178 | 2225 | ||
2179 | if (skge->flow_control == FLOW_MODE_NONE || | 2226 | if (skge->flow_status == FLOW_STAT_NONE || |
2180 | (skge->speed < SPEED_1000 && skge->duplex == DUPLEX_HALF)) | 2227 | (skge->speed < SPEED_1000 && skge->duplex == DUPLEX_HALF)) |
2181 | skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); | 2228 | skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); |
2182 | else | 2229 | else |
@@ -3399,7 +3446,7 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port, | |||
3399 | 3446 | ||
3400 | /* Auto speed and flow control */ | 3447 | /* Auto speed and flow control */ |
3401 | skge->autoneg = AUTONEG_ENABLE; | 3448 | skge->autoneg = AUTONEG_ENABLE; |
3402 | skge->flow_control = FLOW_MODE_SYMMETRIC; | 3449 | skge->flow_control = FLOW_MODE_SYM_OR_REM; |
3403 | skge->duplex = -1; | 3450 | skge->duplex = -1; |
3404 | skge->speed = -1; | 3451 | skge->speed = -1; |
3405 | skge->advertising = skge_supported_modes(hw); | 3452 | skge->advertising = skge_supported_modes(hw); |
diff --git a/drivers/net/skge.h b/drivers/net/skge.h index d0b47d46cf9d..537c0aaa1db8 100644 --- a/drivers/net/skge.h +++ b/drivers/net/skge.h | |||
@@ -2195,7 +2195,8 @@ enum { | |||
2195 | XM_IS_RX_COMP = 1<<0, /* Bit 0: Frame Rx Complete */ | 2195 | XM_IS_RX_COMP = 1<<0, /* Bit 0: Frame Rx Complete */ |
2196 | }; | 2196 | }; |
2197 | 2197 | ||
2198 | #define XM_DEF_MSK (~(XM_IS_RXC_OV | XM_IS_TXC_OV | XM_IS_RXF_OV | XM_IS_TXF_UR)) | 2198 | #define XM_DEF_MSK (~(XM_IS_INP_ASS | XM_IS_LIPA_RC | \ |
2199 | XM_IS_RXF_OV | XM_IS_TXF_UR)) | ||
2199 | 2200 | ||
2200 | 2201 | ||
2201 | /* XM_HW_CFG 16 bit r/w Hardware Config Register */ | 2202 | /* XM_HW_CFG 16 bit r/w Hardware Config Register */ |
@@ -2426,13 +2427,24 @@ struct skge_hw { | |||
2426 | struct mutex phy_mutex; | 2427 | struct mutex phy_mutex; |
2427 | }; | 2428 | }; |
2428 | 2429 | ||
2429 | enum { | 2430 | enum pause_control { |
2430 | FLOW_MODE_NONE = 0, /* No Flow-Control */ | 2431 | FLOW_MODE_NONE = 1, /* No Flow-Control */ |
2431 | FLOW_MODE_LOC_SEND = 1, /* Local station sends PAUSE */ | 2432 | FLOW_MODE_LOC_SEND = 2, /* Local station sends PAUSE */ |
2432 | FLOW_MODE_REM_SEND = 2, /* Symmetric or just remote */ | ||
2433 | FLOW_MODE_SYMMETRIC = 3, /* Both stations may send PAUSE */ | 2433 | FLOW_MODE_SYMMETRIC = 3, /* Both stations may send PAUSE */ |
2434 | FLOW_MODE_SYM_OR_REM = 4, /* Both stations may send PAUSE or | ||
2435 | * just the remote station may send PAUSE | ||
2436 | */ | ||
2437 | }; | ||
2438 | |||
2439 | enum pause_status { | ||
2440 | FLOW_STAT_INDETERMINATED=0, /* indeterminated */ | ||
2441 | FLOW_STAT_NONE, /* No Flow Control */ | ||
2442 | FLOW_STAT_REM_SEND, /* Remote Station sends PAUSE */ | ||
2443 | FLOW_STAT_LOC_SEND, /* Local station sends PAUSE */ | ||
2444 | FLOW_STAT_SYMMETRIC, /* Both station may send PAUSE */ | ||
2434 | }; | 2445 | }; |
2435 | 2446 | ||
2447 | |||
2436 | struct skge_port { | 2448 | struct skge_port { |
2437 | u32 msg_enable; | 2449 | u32 msg_enable; |
2438 | struct skge_hw *hw; | 2450 | struct skge_hw *hw; |
@@ -2445,9 +2457,10 @@ struct skge_port { | |||
2445 | struct net_device_stats net_stats; | 2457 | struct net_device_stats net_stats; |
2446 | 2458 | ||
2447 | struct work_struct link_thread; | 2459 | struct work_struct link_thread; |
2460 | enum pause_control flow_control; | ||
2461 | enum pause_status flow_status; | ||
2448 | u8 rx_csum; | 2462 | u8 rx_csum; |
2449 | u8 blink_on; | 2463 | u8 blink_on; |
2450 | u8 flow_control; | ||
2451 | u8 wol; | 2464 | u8 wol; |
2452 | u8 autoneg; /* AUTONEG_ENABLE, AUTONEG_DISABLE */ | 2465 | u8 autoneg; /* AUTONEG_ENABLE, AUTONEG_DISABLE */ |
2453 | u8 duplex; /* DUPLEX_HALF, DUPLEX_FULL */ | 2466 | u8 duplex; /* DUPLEX_HALF, DUPLEX_FULL */ |
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 459c845d6648..16616f5440d0 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -10,8 +10,7 @@ | |||
10 | * | 10 | * |
11 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License as published by | 12 | * it under the terms of the GNU General Public License as published by |
13 | * the Free Software Foundation; either version 2 of the License, or | 13 | * the Free Software Foundation; either version 2 of the License. |
14 | * (at your option) any later version. | ||
15 | * | 14 | * |
16 | * This program is distributed in the hope that it will be useful, | 15 | * This program is distributed in the hope that it will be useful, |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
@@ -50,7 +49,7 @@ | |||
50 | #include "sky2.h" | 49 | #include "sky2.h" |
51 | 50 | ||
52 | #define DRV_NAME "sky2" | 51 | #define DRV_NAME "sky2" |
53 | #define DRV_VERSION "1.9" | 52 | #define DRV_VERSION "1.10" |
54 | #define PFX DRV_NAME " " | 53 | #define PFX DRV_NAME " " |
55 | 54 | ||
56 | /* | 55 | /* |
@@ -96,9 +95,9 @@ static int disable_msi = 0; | |||
96 | module_param(disable_msi, int, 0); | 95 | module_param(disable_msi, int, 0); |
97 | MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)"); | 96 | MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)"); |
98 | 97 | ||
99 | static int idle_timeout = 100; | 98 | static int idle_timeout = 0; |
100 | module_param(idle_timeout, int, 0); | 99 | module_param(idle_timeout, int, 0); |
101 | MODULE_PARM_DESC(idle_timeout, "Idle timeout workaround for lost interrupts (ms)"); | 100 | MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)"); |
102 | 101 | ||
103 | static const struct pci_device_id sky2_id_table[] = { | 102 | static const struct pci_device_id sky2_id_table[] = { |
104 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, | 103 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, |
@@ -284,6 +283,31 @@ static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port) | |||
284 | gma_write16(hw, port, GM_RX_CTRL, reg); | 283 | gma_write16(hw, port, GM_RX_CTRL, reg); |
285 | } | 284 | } |
286 | 285 | ||
286 | /* flow control to advertise bits */ | ||
287 | static const u16 copper_fc_adv[] = { | ||
288 | [FC_NONE] = 0, | ||
289 | [FC_TX] = PHY_M_AN_ASP, | ||
290 | [FC_RX] = PHY_M_AN_PC, | ||
291 | [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP, | ||
292 | }; | ||
293 | |||
294 | /* flow control to advertise bits when using 1000BaseX */ | ||
295 | static const u16 fiber_fc_adv[] = { | ||
296 | [FC_BOTH] = PHY_M_P_BOTH_MD_X, | ||
297 | [FC_TX] = PHY_M_P_ASYM_MD_X, | ||
298 | [FC_RX] = PHY_M_P_SYM_MD_X, | ||
299 | [FC_NONE] = PHY_M_P_NO_PAUSE_X, | ||
300 | }; | ||
301 | |||
302 | /* flow control to GMA disable bits */ | ||
303 | static const u16 gm_fc_disable[] = { | ||
304 | [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS, | ||
305 | [FC_TX] = GM_GPCR_FC_RX_DIS, | ||
306 | [FC_RX] = GM_GPCR_FC_TX_DIS, | ||
307 | [FC_BOTH] = 0, | ||
308 | }; | ||
309 | |||
310 | |||
287 | static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | 311 | static void sky2_phy_init(struct sky2_hw *hw, unsigned port) |
288 | { | 312 | { |
289 | struct sky2_port *sky2 = netdev_priv(hw->dev[port]); | 313 | struct sky2_port *sky2 = netdev_priv(hw->dev[port]); |
@@ -356,16 +380,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
356 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); | 380 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); |
357 | } | 381 | } |
358 | 382 | ||
359 | ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); | 383 | ctrl = PHY_CT_RESET; |
360 | if (sky2->autoneg == AUTONEG_DISABLE) | ||
361 | ctrl &= ~PHY_CT_ANE; | ||
362 | else | ||
363 | ctrl |= PHY_CT_ANE; | ||
364 | |||
365 | ctrl |= PHY_CT_RESET; | ||
366 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); | ||
367 | |||
368 | ctrl = 0; | ||
369 | ct1000 = 0; | 384 | ct1000 = 0; |
370 | adv = PHY_AN_CSMA; | 385 | adv = PHY_AN_CSMA; |
371 | reg = 0; | 386 | reg = 0; |
@@ -384,20 +399,16 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
384 | adv |= PHY_M_AN_10_FD; | 399 | adv |= PHY_M_AN_10_FD; |
385 | if (sky2->advertising & ADVERTISED_10baseT_Half) | 400 | if (sky2->advertising & ADVERTISED_10baseT_Half) |
386 | adv |= PHY_M_AN_10_HD; | 401 | adv |= PHY_M_AN_10_HD; |
402 | |||
403 | adv |= copper_fc_adv[sky2->flow_mode]; | ||
387 | } else { /* special defines for FIBER (88E1040S only) */ | 404 | } else { /* special defines for FIBER (88E1040S only) */ |
388 | if (sky2->advertising & ADVERTISED_1000baseT_Full) | 405 | if (sky2->advertising & ADVERTISED_1000baseT_Full) |
389 | adv |= PHY_M_AN_1000X_AFD; | 406 | adv |= PHY_M_AN_1000X_AFD; |
390 | if (sky2->advertising & ADVERTISED_1000baseT_Half) | 407 | if (sky2->advertising & ADVERTISED_1000baseT_Half) |
391 | adv |= PHY_M_AN_1000X_AHD; | 408 | adv |= PHY_M_AN_1000X_AHD; |
392 | } | ||
393 | 409 | ||
394 | /* Set Flow-control capabilities */ | 410 | adv |= fiber_fc_adv[sky2->flow_mode]; |
395 | if (sky2->tx_pause && sky2->rx_pause) | 411 | } |
396 | adv |= PHY_AN_PAUSE_CAP; /* symmetric */ | ||
397 | else if (sky2->rx_pause && !sky2->tx_pause) | ||
398 | adv |= PHY_AN_PAUSE_ASYM | PHY_AN_PAUSE_CAP; | ||
399 | else if (!sky2->rx_pause && sky2->tx_pause) | ||
400 | adv |= PHY_AN_PAUSE_ASYM; /* local */ | ||
401 | 412 | ||
402 | /* Restart Auto-negotiation */ | 413 | /* Restart Auto-negotiation */ |
403 | ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; | 414 | ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; |
@@ -422,25 +433,17 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
422 | if (sky2->duplex == DUPLEX_FULL) { | 433 | if (sky2->duplex == DUPLEX_FULL) { |
423 | reg |= GM_GPCR_DUP_FULL; | 434 | reg |= GM_GPCR_DUP_FULL; |
424 | ctrl |= PHY_CT_DUP_MD; | 435 | ctrl |= PHY_CT_DUP_MD; |
425 | } else if (sky2->speed != SPEED_1000 && hw->chip_id != CHIP_ID_YUKON_EC_U) { | 436 | } else if (sky2->speed < SPEED_1000) |
426 | /* Turn off flow control for 10/100mbps */ | 437 | sky2->flow_mode = FC_NONE; |
427 | sky2->rx_pause = 0; | ||
428 | sky2->tx_pause = 0; | ||
429 | } | ||
430 | 438 | ||
431 | if (!sky2->rx_pause) | ||
432 | reg |= GM_GPCR_FC_RX_DIS; | ||
433 | 439 | ||
434 | if (!sky2->tx_pause) | 440 | reg |= gm_fc_disable[sky2->flow_mode]; |
435 | reg |= GM_GPCR_FC_TX_DIS; | ||
436 | 441 | ||
437 | /* Forward pause packets to GMAC? */ | 442 | /* Forward pause packets to GMAC? */ |
438 | if (sky2->tx_pause || sky2->rx_pause) | 443 | if (sky2->flow_mode & FC_RX) |
439 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); | 444 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); |
440 | else | 445 | else |
441 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); | 446 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); |
442 | |||
443 | ctrl |= PHY_CT_RESET; | ||
444 | } | 447 | } |
445 | 448 | ||
446 | gma_write16(hw, port, GM_GP_CTRL, reg); | 449 | gma_write16(hw, port, GM_GP_CTRL, reg); |
@@ -683,7 +686,7 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
683 | sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); | 686 | sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); |
684 | 687 | ||
685 | if (hw->chip_id == CHIP_ID_YUKON_EC_U) { | 688 | if (hw->chip_id == CHIP_ID_YUKON_EC_U) { |
686 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); | 689 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 512/8); |
687 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); | 690 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); |
688 | if (hw->dev[port]->mtu > ETH_DATA_LEN) { | 691 | if (hw->dev[port]->mtu > ETH_DATA_LEN) { |
689 | /* set Tx GMAC FIFO Almost Empty Threshold */ | 692 | /* set Tx GMAC FIFO Almost Empty Threshold */ |
@@ -695,16 +698,10 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
695 | 698 | ||
696 | } | 699 | } |
697 | 700 | ||
698 | /* Assign Ram Buffer allocation. | 701 | /* Assign Ram Buffer allocation in units of 64bit (8 bytes) */ |
699 | * start and end are in units of 4k bytes | 702 | static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 end) |
700 | * ram registers are in units of 64bit words | ||
701 | */ | ||
702 | static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk) | ||
703 | { | 703 | { |
704 | u32 start, end; | 704 | pr_debug(PFX "q %d %#x %#x\n", q, start, end); |
705 | |||
706 | start = startk * 4096/8; | ||
707 | end = (endk * 4096/8) - 1; | ||
708 | 705 | ||
709 | sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); | 706 | sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); |
710 | sky2_write32(hw, RB_ADDR(q, RB_START), start); | 707 | sky2_write32(hw, RB_ADDR(q, RB_START), start); |
@@ -713,7 +710,7 @@ static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk) | |||
713 | sky2_write32(hw, RB_ADDR(q, RB_RP), start); | 710 | sky2_write32(hw, RB_ADDR(q, RB_RP), start); |
714 | 711 | ||
715 | if (q == Q_R1 || q == Q_R2) { | 712 | if (q == Q_R1 || q == Q_R2) { |
716 | u32 space = (endk - startk) * 4096/8; | 713 | u32 space = end - start + 1; |
717 | u32 tp = space - space/4; | 714 | u32 tp = space - space/4; |
718 | 715 | ||
719 | /* On receive queue's set the thresholds | 716 | /* On receive queue's set the thresholds |
@@ -1195,19 +1192,16 @@ static int sky2_up(struct net_device *dev) | |||
1195 | 1192 | ||
1196 | sky2_mac_init(hw, port); | 1193 | sky2_mac_init(hw, port); |
1197 | 1194 | ||
1198 | /* Determine available ram buffer space (in 4K blocks). | 1195 | /* Determine available ram buffer space in qwords. */ |
1199 | * Note: not sure about the FE setting below yet | 1196 | ramsize = sky2_read8(hw, B2_E_0) * 4096/8; |
1200 | */ | ||
1201 | if (hw->chip_id == CHIP_ID_YUKON_FE) | ||
1202 | ramsize = 4; | ||
1203 | else | ||
1204 | ramsize = sky2_read8(hw, B2_E_0); | ||
1205 | 1197 | ||
1206 | /* Give transmitter one third (rounded up) */ | 1198 | if (ramsize > 6*1024/8) |
1207 | rxspace = ramsize - (ramsize + 2) / 3; | 1199 | rxspace = ramsize - (ramsize + 2) / 3; |
1200 | else | ||
1201 | rxspace = ramsize / 2; | ||
1208 | 1202 | ||
1209 | sky2_ramset(hw, rxqaddr[port], 0, rxspace); | 1203 | sky2_ramset(hw, rxqaddr[port], 0, rxspace-1); |
1210 | sky2_ramset(hw, txqaddr[port], rxspace, ramsize); | 1204 | sky2_ramset(hw, txqaddr[port], rxspace, ramsize-1); |
1211 | 1205 | ||
1212 | /* Make sure SyncQ is disabled */ | 1206 | /* Make sure SyncQ is disabled */ |
1213 | sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), | 1207 | sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), |
@@ -1499,6 +1493,11 @@ static int sky2_down(struct net_device *dev) | |||
1499 | /* Stop more packets from being queued */ | 1493 | /* Stop more packets from being queued */ |
1500 | netif_stop_queue(dev); | 1494 | netif_stop_queue(dev); |
1501 | 1495 | ||
1496 | /* Disable port IRQ */ | ||
1497 | imask = sky2_read32(hw, B0_IMSK); | ||
1498 | imask &= ~portirq_msk[port]; | ||
1499 | sky2_write32(hw, B0_IMSK, imask); | ||
1500 | |||
1502 | sky2_gmac_reset(hw, port); | 1501 | sky2_gmac_reset(hw, port); |
1503 | 1502 | ||
1504 | /* Stop transmitter */ | 1503 | /* Stop transmitter */ |
@@ -1549,11 +1548,6 @@ static int sky2_down(struct net_device *dev) | |||
1549 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); | 1548 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); |
1550 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); | 1549 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); |
1551 | 1550 | ||
1552 | /* Disable port IRQ */ | ||
1553 | imask = sky2_read32(hw, B0_IMSK); | ||
1554 | imask &= ~portirq_msk[port]; | ||
1555 | sky2_write32(hw, B0_IMSK, imask); | ||
1556 | |||
1557 | sky2_phy_power(hw, port, 0); | 1551 | sky2_phy_power(hw, port, 0); |
1558 | 1552 | ||
1559 | /* turn off LED's */ | 1553 | /* turn off LED's */ |
@@ -1605,6 +1599,12 @@ static void sky2_link_up(struct sky2_port *sky2) | |||
1605 | struct sky2_hw *hw = sky2->hw; | 1599 | struct sky2_hw *hw = sky2->hw; |
1606 | unsigned port = sky2->port; | 1600 | unsigned port = sky2->port; |
1607 | u16 reg; | 1601 | u16 reg; |
1602 | static const char *fc_name[] = { | ||
1603 | [FC_NONE] = "none", | ||
1604 | [FC_TX] = "tx", | ||
1605 | [FC_RX] = "rx", | ||
1606 | [FC_BOTH] = "both", | ||
1607 | }; | ||
1608 | 1608 | ||
1609 | /* enable Rx/Tx */ | 1609 | /* enable Rx/Tx */ |
1610 | reg = gma_read16(hw, port, GM_GP_CTRL); | 1610 | reg = gma_read16(hw, port, GM_GP_CTRL); |
@@ -1648,8 +1648,7 @@ static void sky2_link_up(struct sky2_port *sky2) | |||
1648 | "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", | 1648 | "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", |
1649 | sky2->netdev->name, sky2->speed, | 1649 | sky2->netdev->name, sky2->speed, |
1650 | sky2->duplex == DUPLEX_FULL ? "full" : "half", | 1650 | sky2->duplex == DUPLEX_FULL ? "full" : "half", |
1651 | (sky2->tx_pause && sky2->rx_pause) ? "both" : | 1651 | fc_name[sky2->flow_status]); |
1652 | sky2->tx_pause ? "tx" : sky2->rx_pause ? "rx" : "none"); | ||
1653 | } | 1652 | } |
1654 | 1653 | ||
1655 | static void sky2_link_down(struct sky2_port *sky2) | 1654 | static void sky2_link_down(struct sky2_port *sky2) |
@@ -1664,7 +1663,7 @@ static void sky2_link_down(struct sky2_port *sky2) | |||
1664 | reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); | 1663 | reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); |
1665 | gma_write16(hw, port, GM_GP_CTRL, reg); | 1664 | gma_write16(hw, port, GM_GP_CTRL, reg); |
1666 | 1665 | ||
1667 | if (sky2->rx_pause && !sky2->tx_pause) { | 1666 | if (sky2->flow_status == FC_RX) { |
1668 | /* restore Asymmetric Pause bit */ | 1667 | /* restore Asymmetric Pause bit */ |
1669 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, | 1668 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, |
1670 | gm_phy_read(hw, port, PHY_MARV_AUNE_ADV) | 1669 | gm_phy_read(hw, port, PHY_MARV_AUNE_ADV) |
@@ -1683,6 +1682,14 @@ static void sky2_link_down(struct sky2_port *sky2) | |||
1683 | sky2_phy_init(hw, port); | 1682 | sky2_phy_init(hw, port); |
1684 | } | 1683 | } |
1685 | 1684 | ||
1685 | static enum flow_control sky2_flow(int rx, int tx) | ||
1686 | { | ||
1687 | if (rx) | ||
1688 | return tx ? FC_BOTH : FC_RX; | ||
1689 | else | ||
1690 | return tx ? FC_TX : FC_NONE; | ||
1691 | } | ||
1692 | |||
1686 | static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) | 1693 | static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) |
1687 | { | 1694 | { |
1688 | struct sky2_hw *hw = sky2->hw; | 1695 | struct sky2_hw *hw = sky2->hw; |
@@ -1703,39 +1710,20 @@ static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) | |||
1703 | } | 1710 | } |
1704 | 1711 | ||
1705 | sky2->speed = sky2_phy_speed(hw, aux); | 1712 | sky2->speed = sky2_phy_speed(hw, aux); |
1706 | if (sky2->speed == SPEED_1000) { | 1713 | sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF; |
1707 | u16 ctl2 = gm_phy_read(hw, port, PHY_MARV_1000T_CTRL); | ||
1708 | u16 lpa2 = gm_phy_read(hw, port, PHY_MARV_1000T_STAT); | ||
1709 | if (lpa2 & PHY_B_1000S_MSF) { | ||
1710 | printk(KERN_ERR PFX "%s: master/slave fault", | ||
1711 | sky2->netdev->name); | ||
1712 | return -1; | ||
1713 | } | ||
1714 | |||
1715 | if ((ctl2 & PHY_M_1000C_AFD) && (lpa2 & PHY_B_1000S_LP_FD)) | ||
1716 | sky2->duplex = DUPLEX_FULL; | ||
1717 | else | ||
1718 | sky2->duplex = DUPLEX_HALF; | ||
1719 | } else { | ||
1720 | u16 adv = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); | ||
1721 | if ((aux & adv) & PHY_AN_FULL) | ||
1722 | sky2->duplex = DUPLEX_FULL; | ||
1723 | else | ||
1724 | sky2->duplex = DUPLEX_HALF; | ||
1725 | } | ||
1726 | 1714 | ||
1727 | /* Pause bits are offset (9..8) */ | 1715 | /* Pause bits are offset (9..8) */ |
1728 | if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U) | 1716 | if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U) |
1729 | aux >>= 6; | 1717 | aux >>= 6; |
1730 | 1718 | ||
1731 | sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0; | 1719 | sky2->flow_status = sky2_flow(aux & PHY_M_PS_RX_P_EN, |
1732 | sky2->tx_pause = (aux & PHY_M_PS_TX_P_EN) != 0; | 1720 | aux & PHY_M_PS_TX_P_EN); |
1733 | 1721 | ||
1734 | if (sky2->duplex == DUPLEX_HALF && sky2->speed != SPEED_1000 | 1722 | if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 |
1735 | && hw->chip_id != CHIP_ID_YUKON_EC_U) | 1723 | && hw->chip_id != CHIP_ID_YUKON_EC_U) |
1736 | sky2->rx_pause = sky2->tx_pause = 0; | 1724 | sky2->flow_status = FC_NONE; |
1737 | 1725 | ||
1738 | if (sky2->rx_pause || sky2->tx_pause) | 1726 | if (aux & PHY_M_PS_RX_P_EN) |
1739 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); | 1727 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); |
1740 | else | 1728 | else |
1741 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); | 1729 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); |
@@ -1750,13 +1738,13 @@ static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) | |||
1750 | struct sky2_port *sky2 = netdev_priv(dev); | 1738 | struct sky2_port *sky2 = netdev_priv(dev); |
1751 | u16 istatus, phystat; | 1739 | u16 istatus, phystat; |
1752 | 1740 | ||
1741 | if (!netif_running(dev)) | ||
1742 | return; | ||
1743 | |||
1753 | spin_lock(&sky2->phy_lock); | 1744 | spin_lock(&sky2->phy_lock); |
1754 | istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); | 1745 | istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); |
1755 | phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); | 1746 | phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); |
1756 | 1747 | ||
1757 | if (!netif_running(dev)) | ||
1758 | goto out; | ||
1759 | |||
1760 | if (netif_msg_intr(sky2)) | 1748 | if (netif_msg_intr(sky2)) |
1761 | printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n", | 1749 | printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n", |
1762 | sky2->netdev->name, istatus, phystat); | 1750 | sky2->netdev->name, istatus, phystat); |
@@ -1907,7 +1895,7 @@ static struct sk_buff *receive_copy(struct sky2_port *sky2, | |||
1907 | pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr, | 1895 | pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr, |
1908 | length, PCI_DMA_FROMDEVICE); | 1896 | length, PCI_DMA_FROMDEVICE); |
1909 | re->skb->ip_summed = CHECKSUM_NONE; | 1897 | re->skb->ip_summed = CHECKSUM_NONE; |
1910 | __skb_put(skb, length); | 1898 | skb_put(skb, length); |
1911 | } | 1899 | } |
1912 | return skb; | 1900 | return skb; |
1913 | } | 1901 | } |
@@ -1970,7 +1958,7 @@ static struct sk_buff *receive_new(struct sky2_port *sky2, | |||
1970 | if (skb_shinfo(skb)->nr_frags) | 1958 | if (skb_shinfo(skb)->nr_frags) |
1971 | skb_put_frags(skb, hdr_space, length); | 1959 | skb_put_frags(skb, hdr_space, length); |
1972 | else | 1960 | else |
1973 | skb_put(skb, hdr_space); | 1961 | skb_put(skb, length); |
1974 | return skb; | 1962 | return skb; |
1975 | } | 1963 | } |
1976 | 1964 | ||
@@ -2016,6 +2004,10 @@ oversize: | |||
2016 | 2004 | ||
2017 | error: | 2005 | error: |
2018 | ++sky2->net_stats.rx_errors; | 2006 | ++sky2->net_stats.rx_errors; |
2007 | if (status & GMR_FS_RX_FF_OV) { | ||
2008 | sky2->net_stats.rx_fifo_errors++; | ||
2009 | goto resubmit; | ||
2010 | } | ||
2019 | 2011 | ||
2020 | if (netif_msg_rx_err(sky2) && net_ratelimit()) | 2012 | if (netif_msg_rx_err(sky2) && net_ratelimit()) |
2021 | printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n", | 2013 | printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n", |
@@ -2027,8 +2019,6 @@ error: | |||
2027 | sky2->net_stats.rx_frame_errors++; | 2019 | sky2->net_stats.rx_frame_errors++; |
2028 | if (status & GMR_FS_CRC_ERR) | 2020 | if (status & GMR_FS_CRC_ERR) |
2029 | sky2->net_stats.rx_crc_errors++; | 2021 | sky2->net_stats.rx_crc_errors++; |
2030 | if (status & GMR_FS_RX_FF_OV) | ||
2031 | sky2->net_stats.rx_fifo_errors++; | ||
2032 | 2022 | ||
2033 | goto resubmit; | 2023 | goto resubmit; |
2034 | } | 2024 | } |
@@ -2220,8 +2210,7 @@ static void sky2_hw_intr(struct sky2_hw *hw) | |||
2220 | /* PCI-Express uncorrectable Error occurred */ | 2210 | /* PCI-Express uncorrectable Error occurred */ |
2221 | u32 pex_err; | 2211 | u32 pex_err; |
2222 | 2212 | ||
2223 | pex_err = sky2_pci_read32(hw, | 2213 | pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT); |
2224 | hw->err_cap + PCI_ERR_UNCOR_STATUS); | ||
2225 | 2214 | ||
2226 | if (net_ratelimit()) | 2215 | if (net_ratelimit()) |
2227 | printk(KERN_ERR PFX "%s: pci express error (0x%x)\n", | 2216 | printk(KERN_ERR PFX "%s: pci express error (0x%x)\n", |
@@ -2229,20 +2218,15 @@ static void sky2_hw_intr(struct sky2_hw *hw) | |||
2229 | 2218 | ||
2230 | /* clear the interrupt */ | 2219 | /* clear the interrupt */ |
2231 | sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | 2220 | sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); |
2232 | sky2_pci_write32(hw, | 2221 | sky2_pci_write32(hw, PEX_UNC_ERR_STAT, |
2233 | hw->err_cap + PCI_ERR_UNCOR_STATUS, | 2222 | 0xffffffffUL); |
2234 | 0xffffffffUL); | ||
2235 | sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | 2223 | sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); |
2236 | 2224 | ||
2237 | 2225 | if (pex_err & PEX_FATAL_ERRORS) { | |
2238 | /* In case of fatal error mask off to keep from getting stuck */ | ||
2239 | if (pex_err & (PCI_ERR_UNC_POISON_TLP | PCI_ERR_UNC_FCP | ||
2240 | | PCI_ERR_UNC_DLP)) { | ||
2241 | u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK); | 2226 | u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK); |
2242 | hwmsk &= ~Y2_IS_PCI_EXP; | 2227 | hwmsk &= ~Y2_IS_PCI_EXP; |
2243 | sky2_write32(hw, B0_HWE_IMSK, hwmsk); | 2228 | sky2_write32(hw, B0_HWE_IMSK, hwmsk); |
2244 | } | 2229 | } |
2245 | |||
2246 | } | 2230 | } |
2247 | 2231 | ||
2248 | if (status & Y2_HWE_L1_MASK) | 2232 | if (status & Y2_HWE_L1_MASK) |
@@ -2423,7 +2407,6 @@ static int sky2_reset(struct sky2_hw *hw) | |||
2423 | u16 status; | 2407 | u16 status; |
2424 | u8 t8; | 2408 | u8 t8; |
2425 | int i; | 2409 | int i; |
2426 | u32 msk; | ||
2427 | 2410 | ||
2428 | sky2_write8(hw, B0_CTST, CS_RST_CLR); | 2411 | sky2_write8(hw, B0_CTST, CS_RST_CLR); |
2429 | 2412 | ||
@@ -2464,13 +2447,9 @@ static int sky2_reset(struct sky2_hw *hw) | |||
2464 | sky2_write8(hw, B0_CTST, CS_MRST_CLR); | 2447 | sky2_write8(hw, B0_CTST, CS_MRST_CLR); |
2465 | 2448 | ||
2466 | /* clear any PEX errors */ | 2449 | /* clear any PEX errors */ |
2467 | if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) { | 2450 | if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) |
2468 | hw->err_cap = pci_find_ext_capability(hw->pdev, PCI_EXT_CAP_ID_ERR); | 2451 | sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL); |
2469 | if (hw->err_cap) | 2452 | |
2470 | sky2_pci_write32(hw, | ||
2471 | hw->err_cap + PCI_ERR_UNCOR_STATUS, | ||
2472 | 0xffffffffUL); | ||
2473 | } | ||
2474 | 2453 | ||
2475 | hw->pmd_type = sky2_read8(hw, B2_PMD_TYP); | 2454 | hw->pmd_type = sky2_read8(hw, B2_PMD_TYP); |
2476 | hw->ports = 1; | 2455 | hw->ports = 1; |
@@ -2527,10 +2506,7 @@ static int sky2_reset(struct sky2_hw *hw) | |||
2527 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53); | 2506 | sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53); |
2528 | } | 2507 | } |
2529 | 2508 | ||
2530 | msk = Y2_HWE_ALL_MASK; | 2509 | sky2_write32(hw, B0_HWE_IMSK, Y2_HWE_ALL_MASK); |
2531 | if (!hw->err_cap) | ||
2532 | msk &= ~Y2_IS_PCI_EXP; | ||
2533 | sky2_write32(hw, B0_HWE_IMSK, msk); | ||
2534 | 2510 | ||
2535 | for (i = 0; i < hw->ports; i++) | 2511 | for (i = 0; i < hw->ports; i++) |
2536 | sky2_gmac_reset(hw, i); | 2512 | sky2_gmac_reset(hw, i); |
@@ -2762,7 +2738,7 @@ static int sky2_nway_reset(struct net_device *dev) | |||
2762 | { | 2738 | { |
2763 | struct sky2_port *sky2 = netdev_priv(dev); | 2739 | struct sky2_port *sky2 = netdev_priv(dev); |
2764 | 2740 | ||
2765 | if (sky2->autoneg != AUTONEG_ENABLE) | 2741 | if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE) |
2766 | return -EINVAL; | 2742 | return -EINVAL; |
2767 | 2743 | ||
2768 | sky2_phy_reinit(sky2); | 2744 | sky2_phy_reinit(sky2); |
@@ -2864,6 +2840,14 @@ static int sky2_set_mac_address(struct net_device *dev, void *p) | |||
2864 | return 0; | 2840 | return 0; |
2865 | } | 2841 | } |
2866 | 2842 | ||
2843 | static void inline sky2_add_filter(u8 filter[8], const u8 *addr) | ||
2844 | { | ||
2845 | u32 bit; | ||
2846 | |||
2847 | bit = ether_crc(ETH_ALEN, addr) & 63; | ||
2848 | filter[bit >> 3] |= 1 << (bit & 7); | ||
2849 | } | ||
2850 | |||
2867 | static void sky2_set_multicast(struct net_device *dev) | 2851 | static void sky2_set_multicast(struct net_device *dev) |
2868 | { | 2852 | { |
2869 | struct sky2_port *sky2 = netdev_priv(dev); | 2853 | struct sky2_port *sky2 = netdev_priv(dev); |
@@ -2872,7 +2856,10 @@ static void sky2_set_multicast(struct net_device *dev) | |||
2872 | struct dev_mc_list *list = dev->mc_list; | 2856 | struct dev_mc_list *list = dev->mc_list; |
2873 | u16 reg; | 2857 | u16 reg; |
2874 | u8 filter[8]; | 2858 | u8 filter[8]; |
2859 | int rx_pause; | ||
2860 | static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 }; | ||
2875 | 2861 | ||
2862 | rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH); | ||
2876 | memset(filter, 0, sizeof(filter)); | 2863 | memset(filter, 0, sizeof(filter)); |
2877 | 2864 | ||
2878 | reg = gma_read16(hw, port, GM_RX_CTRL); | 2865 | reg = gma_read16(hw, port, GM_RX_CTRL); |
@@ -2880,18 +2867,19 @@ static void sky2_set_multicast(struct net_device *dev) | |||
2880 | 2867 | ||
2881 | if (dev->flags & IFF_PROMISC) /* promiscuous */ | 2868 | if (dev->flags & IFF_PROMISC) /* promiscuous */ |
2882 | reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); | 2869 | reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); |
2883 | else if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 16) /* all multicast */ | 2870 | else if (dev->flags & IFF_ALLMULTI) |
2884 | memset(filter, 0xff, sizeof(filter)); | 2871 | memset(filter, 0xff, sizeof(filter)); |
2885 | else if (dev->mc_count == 0) /* no multicast */ | 2872 | else if (dev->mc_count == 0 && !rx_pause) |
2886 | reg &= ~GM_RXCR_MCF_ENA; | 2873 | reg &= ~GM_RXCR_MCF_ENA; |
2887 | else { | 2874 | else { |
2888 | int i; | 2875 | int i; |
2889 | reg |= GM_RXCR_MCF_ENA; | 2876 | reg |= GM_RXCR_MCF_ENA; |
2890 | 2877 | ||
2891 | for (i = 0; list && i < dev->mc_count; i++, list = list->next) { | 2878 | if (rx_pause) |
2892 | u32 bit = ether_crc(ETH_ALEN, list->dmi_addr) & 0x3f; | 2879 | sky2_add_filter(filter, pause_mc_addr); |
2893 | filter[bit / 8] |= 1 << (bit % 8); | 2880 | |
2894 | } | 2881 | for (i = 0; list && i < dev->mc_count; i++, list = list->next) |
2882 | sky2_add_filter(filter, list->dmi_addr); | ||
2895 | } | 2883 | } |
2896 | 2884 | ||
2897 | gma_write16(hw, port, GM_MC_ADDR_H1, | 2885 | gma_write16(hw, port, GM_MC_ADDR_H1, |
@@ -3004,8 +2992,20 @@ static void sky2_get_pauseparam(struct net_device *dev, | |||
3004 | { | 2992 | { |
3005 | struct sky2_port *sky2 = netdev_priv(dev); | 2993 | struct sky2_port *sky2 = netdev_priv(dev); |
3006 | 2994 | ||
3007 | ecmd->tx_pause = sky2->tx_pause; | 2995 | switch (sky2->flow_mode) { |
3008 | ecmd->rx_pause = sky2->rx_pause; | 2996 | case FC_NONE: |
2997 | ecmd->tx_pause = ecmd->rx_pause = 0; | ||
2998 | break; | ||
2999 | case FC_TX: | ||
3000 | ecmd->tx_pause = 1, ecmd->rx_pause = 0; | ||
3001 | break; | ||
3002 | case FC_RX: | ||
3003 | ecmd->tx_pause = 0, ecmd->rx_pause = 1; | ||
3004 | break; | ||
3005 | case FC_BOTH: | ||
3006 | ecmd->tx_pause = ecmd->rx_pause = 1; | ||
3007 | } | ||
3008 | |||
3009 | ecmd->autoneg = sky2->autoneg; | 3009 | ecmd->autoneg = sky2->autoneg; |
3010 | } | 3010 | } |
3011 | 3011 | ||
@@ -3015,10 +3015,10 @@ static int sky2_set_pauseparam(struct net_device *dev, | |||
3015 | struct sky2_port *sky2 = netdev_priv(dev); | 3015 | struct sky2_port *sky2 = netdev_priv(dev); |
3016 | 3016 | ||
3017 | sky2->autoneg = ecmd->autoneg; | 3017 | sky2->autoneg = ecmd->autoneg; |
3018 | sky2->tx_pause = ecmd->tx_pause != 0; | 3018 | sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause); |
3019 | sky2->rx_pause = ecmd->rx_pause != 0; | ||
3020 | 3019 | ||
3021 | sky2_phy_reinit(sky2); | 3020 | if (netif_running(dev)) |
3021 | sky2_phy_reinit(sky2); | ||
3022 | 3022 | ||
3023 | return 0; | 3023 | return 0; |
3024 | } | 3024 | } |
@@ -3238,7 +3238,11 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw, | |||
3238 | dev->poll = sky2_poll; | 3238 | dev->poll = sky2_poll; |
3239 | dev->weight = NAPI_WEIGHT; | 3239 | dev->weight = NAPI_WEIGHT; |
3240 | #ifdef CONFIG_NET_POLL_CONTROLLER | 3240 | #ifdef CONFIG_NET_POLL_CONTROLLER |
3241 | dev->poll_controller = sky2_netpoll; | 3241 | /* Network console (only works on port 0) |
3242 | * because netpoll makes assumptions about NAPI | ||
3243 | */ | ||
3244 | if (port == 0) | ||
3245 | dev->poll_controller = sky2_netpoll; | ||
3242 | #endif | 3246 | #endif |
3243 | 3247 | ||
3244 | sky2 = netdev_priv(dev); | 3248 | sky2 = netdev_priv(dev); |
@@ -3248,8 +3252,8 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw, | |||
3248 | 3252 | ||
3249 | /* Auto speed and flow control */ | 3253 | /* Auto speed and flow control */ |
3250 | sky2->autoneg = AUTONEG_ENABLE; | 3254 | sky2->autoneg = AUTONEG_ENABLE; |
3251 | sky2->tx_pause = 1; | 3255 | sky2->flow_mode = FC_BOTH; |
3252 | sky2->rx_pause = 1; | 3256 | |
3253 | sky2->duplex = -1; | 3257 | sky2->duplex = -1; |
3254 | sky2->speed = -1; | 3258 | sky2->speed = -1; |
3255 | sky2->advertising = sky2_supported_modes(hw); | 3259 | sky2->advertising = sky2_supported_modes(hw); |
@@ -3340,9 +3344,8 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw) | |||
3340 | 3344 | ||
3341 | if (!hw->msi_detected) { | 3345 | if (!hw->msi_detected) { |
3342 | /* MSI test failed, go back to INTx mode */ | 3346 | /* MSI test failed, go back to INTx mode */ |
3343 | printk(KERN_WARNING PFX "%s: No interrupt was generated using MSI, " | 3347 | printk(KERN_INFO PFX "%s: No interrupt generated using MSI, " |
3344 | "switching to INTx mode. Please report this failure to " | 3348 | "switching to INTx mode.\n", |
3345 | "the PCI maintainer and include system chipset information.\n", | ||
3346 | pci_name(pdev)); | 3349 | pci_name(pdev)); |
3347 | 3350 | ||
3348 | err = -EOPNOTSUPP; | 3351 | err = -EOPNOTSUPP; |
@@ -3350,6 +3353,7 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw) | |||
3350 | } | 3353 | } |
3351 | 3354 | ||
3352 | sky2_write32(hw, B0_IMSK, 0); | 3355 | sky2_write32(hw, B0_IMSK, 0); |
3356 | sky2_read32(hw, B0_IMSK); | ||
3353 | 3357 | ||
3354 | free_irq(pdev->irq, hw); | 3358 | free_irq(pdev->irq, hw); |
3355 | 3359 | ||
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index f66109a96d95..6d2a23f66c9a 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -6,15 +6,24 @@ | |||
6 | 6 | ||
7 | #define ETH_JUMBO_MTU 9000 /* Maximum MTU supported */ | 7 | #define ETH_JUMBO_MTU 9000 /* Maximum MTU supported */ |
8 | 8 | ||
9 | /* PCI device specific config registers */ | 9 | /* PCI config registers */ |
10 | enum { | 10 | enum { |
11 | PCI_DEV_REG1 = 0x40, | 11 | PCI_DEV_REG1 = 0x40, |
12 | PCI_DEV_REG2 = 0x44, | 12 | PCI_DEV_REG2 = 0x44, |
13 | PCI_DEV_STATUS = 0x7c, | ||
13 | PCI_DEV_REG3 = 0x80, | 14 | PCI_DEV_REG3 = 0x80, |
14 | PCI_DEV_REG4 = 0x84, | 15 | PCI_DEV_REG4 = 0x84, |
15 | PCI_DEV_REG5 = 0x88, | 16 | PCI_DEV_REG5 = 0x88, |
16 | }; | 17 | }; |
17 | 18 | ||
19 | enum { | ||
20 | PEX_DEV_CAP = 0xe4, | ||
21 | PEX_DEV_CTRL = 0xe8, | ||
22 | PEX_DEV_STA = 0xea, | ||
23 | PEX_LNK_STAT = 0xf2, | ||
24 | PEX_UNC_ERR_STAT= 0x104, | ||
25 | }; | ||
26 | |||
18 | /* Yukon-2 */ | 27 | /* Yukon-2 */ |
19 | enum pci_dev_reg_1 { | 28 | enum pci_dev_reg_1 { |
20 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ | 29 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ |
@@ -63,6 +72,39 @@ enum pci_dev_reg_4 { | |||
63 | PCI_STATUS_REC_MASTER_ABORT | \ | 72 | PCI_STATUS_REC_MASTER_ABORT | \ |
64 | PCI_STATUS_REC_TARGET_ABORT | \ | 73 | PCI_STATUS_REC_TARGET_ABORT | \ |
65 | PCI_STATUS_PARITY) | 74 | PCI_STATUS_PARITY) |
75 | |||
76 | enum pex_dev_ctrl { | ||
77 | PEX_DC_MAX_RRS_MSK = 7<<12, /* Bit 14..12: Max. Read Request Size */ | ||
78 | PEX_DC_EN_NO_SNOOP = 1<<11,/* Enable No Snoop */ | ||
79 | PEX_DC_EN_AUX_POW = 1<<10,/* Enable AUX Power */ | ||
80 | PEX_DC_EN_PHANTOM = 1<<9, /* Enable Phantom Functions */ | ||
81 | PEX_DC_EN_EXT_TAG = 1<<8, /* Enable Extended Tag Field */ | ||
82 | PEX_DC_MAX_PLS_MSK = 7<<5, /* Bit 7.. 5: Max. Payload Size Mask */ | ||
83 | PEX_DC_EN_REL_ORD = 1<<4, /* Enable Relaxed Ordering */ | ||
84 | PEX_DC_EN_UNS_RQ_RP = 1<<3, /* Enable Unsupported Request Reporting */ | ||
85 | PEX_DC_EN_FAT_ER_RP = 1<<2, /* Enable Fatal Error Reporting */ | ||
86 | PEX_DC_EN_NFA_ER_RP = 1<<1, /* Enable Non-Fatal Error Reporting */ | ||
87 | PEX_DC_EN_COR_ER_RP = 1<<0, /* Enable Correctable Error Reporting */ | ||
88 | }; | ||
89 | #define PEX_DC_MAX_RD_RQ_SIZE(x) (((x)<<12) & PEX_DC_MAX_RRS_MSK) | ||
90 | |||
91 | /* PEX_UNC_ERR_STAT PEX Uncorrectable Errors Status Register (Yukon-2) */ | ||
92 | enum pex_err { | ||
93 | PEX_UNSUP_REQ = 1<<20, /* Unsupported Request Error */ | ||
94 | |||
95 | PEX_MALFOR_TLP = 1<<18, /* Malformed TLP */ | ||
96 | |||
97 | PEX_UNEXP_COMP = 1<<16, /* Unexpected Completion */ | ||
98 | |||
99 | PEX_COMP_TO = 1<<14, /* Completion Timeout */ | ||
100 | PEX_FLOW_CTRL_P = 1<<13, /* Flow Control Protocol Error */ | ||
101 | PEX_POIS_TLP = 1<<12, /* Poisoned TLP */ | ||
102 | |||
103 | PEX_DATA_LINK_P = 1<<4, /* Data Link Protocol Error */ | ||
104 | PEX_FATAL_ERRORS= (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P), | ||
105 | }; | ||
106 | |||
107 | |||
66 | enum csr_regs { | 108 | enum csr_regs { |
67 | B0_RAP = 0x0000, | 109 | B0_RAP = 0x0000, |
68 | B0_CTST = 0x0004, | 110 | B0_CTST = 0x0004, |
@@ -1534,7 +1576,7 @@ enum { | |||
1534 | 1576 | ||
1535 | GMR_FS_ANY_ERR = GMR_FS_RX_FF_OV | GMR_FS_CRC_ERR | | 1577 | GMR_FS_ANY_ERR = GMR_FS_RX_FF_OV | GMR_FS_CRC_ERR | |
1536 | GMR_FS_FRAGMENT | GMR_FS_LONG_ERR | | 1578 | GMR_FS_FRAGMENT | GMR_FS_LONG_ERR | |
1537 | GMR_FS_MII_ERR | GMR_FS_BAD_FC | | 1579 | GMR_FS_MII_ERR | GMR_FS_GOOD_FC | GMR_FS_BAD_FC | |
1538 | GMR_FS_UN_SIZE | GMR_FS_JABBER, | 1580 | GMR_FS_UN_SIZE | GMR_FS_JABBER, |
1539 | }; | 1581 | }; |
1540 | 1582 | ||
@@ -1786,6 +1828,13 @@ struct rx_ring_info { | |||
1786 | dma_addr_t frag_addr[ETH_JUMBO_MTU >> PAGE_SHIFT]; | 1828 | dma_addr_t frag_addr[ETH_JUMBO_MTU >> PAGE_SHIFT]; |
1787 | }; | 1829 | }; |
1788 | 1830 | ||
1831 | enum flow_control { | ||
1832 | FC_NONE = 0, | ||
1833 | FC_TX = 1, | ||
1834 | FC_RX = 2, | ||
1835 | FC_BOTH = 3, | ||
1836 | }; | ||
1837 | |||
1789 | struct sky2_port { | 1838 | struct sky2_port { |
1790 | struct sky2_hw *hw; | 1839 | struct sky2_hw *hw; |
1791 | struct net_device *netdev; | 1840 | struct net_device *netdev; |
@@ -1818,13 +1867,13 @@ struct sky2_port { | |||
1818 | 1867 | ||
1819 | dma_addr_t rx_le_map; | 1868 | dma_addr_t rx_le_map; |
1820 | dma_addr_t tx_le_map; | 1869 | dma_addr_t tx_le_map; |
1821 | u32 advertising; /* ADVERTISED_ bits */ | 1870 | u16 advertising; /* ADVERTISED_ bits */ |
1822 | u16 speed; /* SPEED_1000, SPEED_100, ... */ | 1871 | u16 speed; /* SPEED_1000, SPEED_100, ... */ |
1823 | u8 autoneg; /* AUTONEG_ENABLE, AUTONEG_DISABLE */ | 1872 | u8 autoneg; /* AUTONEG_ENABLE, AUTONEG_DISABLE */ |
1824 | u8 duplex; /* DUPLEX_HALF, DUPLEX_FULL */ | 1873 | u8 duplex; /* DUPLEX_HALF, DUPLEX_FULL */ |
1825 | u8 rx_pause; | ||
1826 | u8 tx_pause; | ||
1827 | u8 rx_csum; | 1874 | u8 rx_csum; |
1875 | enum flow_control flow_mode; | ||
1876 | enum flow_control flow_status; | ||
1828 | 1877 | ||
1829 | struct net_device_stats net_stats; | 1878 | struct net_device_stats net_stats; |
1830 | 1879 | ||
@@ -1836,7 +1885,6 @@ struct sky2_hw { | |||
1836 | struct net_device *dev[2]; | 1885 | struct net_device *dev[2]; |
1837 | 1886 | ||
1838 | int pm_cap; | 1887 | int pm_cap; |
1839 | int err_cap; | ||
1840 | u8 chip_id; | 1888 | u8 chip_id; |
1841 | u8 chip_rev; | 1889 | u8 chip_rev; |
1842 | u8 pmd_type; | 1890 | u8 pmd_type; |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index 636dbfcdf8cb..a8640169fc77 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
@@ -398,6 +398,42 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r, | |||
398 | 398 | ||
399 | #define SMC_IRQ_FLAGS (0) | 399 | #define SMC_IRQ_FLAGS (0) |
400 | 400 | ||
401 | #elif defined(CONFIG_ARCH_VERSATILE) | ||
402 | |||
403 | #define SMC_CAN_USE_8BIT 1 | ||
404 | #define SMC_CAN_USE_16BIT 1 | ||
405 | #define SMC_CAN_USE_32BIT 1 | ||
406 | #define SMC_NOWAIT 1 | ||
407 | |||
408 | #define SMC_inb(a, r) readb((a) + (r)) | ||
409 | #define SMC_inw(a, r) readw((a) + (r)) | ||
410 | #define SMC_inl(a, r) readl((a) + (r)) | ||
411 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
412 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
413 | #define SMC_outl(v, a, r) writel(v, (a) + (r)) | ||
414 | #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) | ||
415 | #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) | ||
416 | |||
417 | #define SMC_IRQ_FLAGS (0) | ||
418 | |||
419 | #elif defined(CONFIG_ARCH_VERSATILE) | ||
420 | |||
421 | #define SMC_CAN_USE_8BIT 1 | ||
422 | #define SMC_CAN_USE_16BIT 1 | ||
423 | #define SMC_CAN_USE_32BIT 1 | ||
424 | #define SMC_NOWAIT 1 | ||
425 | |||
426 | #define SMC_inb(a, r) readb((a) + (r)) | ||
427 | #define SMC_inw(a, r) readw((a) + (r)) | ||
428 | #define SMC_inl(a, r) readl((a) + (r)) | ||
429 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) | ||
430 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
431 | #define SMC_outl(v, a, r) writel(v, (a) + (r)) | ||
432 | #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) | ||
433 | #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) | ||
434 | |||
435 | #define SMC_IRQ_FLAGS (0) | ||
436 | |||
401 | #else | 437 | #else |
402 | 438 | ||
403 | #define SMC_CAN_USE_8BIT 1 | 439 | #define SMC_CAN_USE_8BIT 1 |
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c index 46a009085f7c..418138dd6c68 100644 --- a/drivers/net/spider_net.c +++ b/drivers/net/spider_net.c | |||
@@ -55,12 +55,13 @@ MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com> and Jens Osterkamp " \ | |||
55 | "<Jens.Osterkamp@de.ibm.com>"); | 55 | "<Jens.Osterkamp@de.ibm.com>"); |
56 | MODULE_DESCRIPTION("Spider Southbridge Gigabit Ethernet driver"); | 56 | MODULE_DESCRIPTION("Spider Southbridge Gigabit Ethernet driver"); |
57 | MODULE_LICENSE("GPL"); | 57 | MODULE_LICENSE("GPL"); |
58 | MODULE_VERSION(VERSION); | ||
58 | 59 | ||
59 | static int rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_DEFAULT; | 60 | static int rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_DEFAULT; |
60 | static int tx_descriptors = SPIDER_NET_TX_DESCRIPTORS_DEFAULT; | 61 | static int tx_descriptors = SPIDER_NET_TX_DESCRIPTORS_DEFAULT; |
61 | 62 | ||
62 | module_param(rx_descriptors, int, 0644); | 63 | module_param(rx_descriptors, int, 0444); |
63 | module_param(tx_descriptors, int, 0644); | 64 | module_param(tx_descriptors, int, 0444); |
64 | 65 | ||
65 | MODULE_PARM_DESC(rx_descriptors, "number of descriptors used " \ | 66 | MODULE_PARM_DESC(rx_descriptors, "number of descriptors used " \ |
66 | "in rx chains"); | 67 | "in rx chains"); |
@@ -300,7 +301,7 @@ static int | |||
300 | spider_net_init_chain(struct spider_net_card *card, | 301 | spider_net_init_chain(struct spider_net_card *card, |
301 | struct spider_net_descr_chain *chain, | 302 | struct spider_net_descr_chain *chain, |
302 | struct spider_net_descr *start_descr, | 303 | struct spider_net_descr *start_descr, |
303 | int direction, int no) | 304 | int no) |
304 | { | 305 | { |
305 | int i; | 306 | int i; |
306 | struct spider_net_descr *descr; | 307 | struct spider_net_descr *descr; |
@@ -315,7 +316,7 @@ spider_net_init_chain(struct spider_net_card *card, | |||
315 | 316 | ||
316 | buf = pci_map_single(card->pdev, descr, | 317 | buf = pci_map_single(card->pdev, descr, |
317 | SPIDER_NET_DESCR_SIZE, | 318 | SPIDER_NET_DESCR_SIZE, |
318 | direction); | 319 | PCI_DMA_BIDIRECTIONAL); |
319 | 320 | ||
320 | if (pci_dma_mapping_error(buf)) | 321 | if (pci_dma_mapping_error(buf)) |
321 | goto iommu_error; | 322 | goto iommu_error; |
@@ -329,11 +330,6 @@ spider_net_init_chain(struct spider_net_card *card, | |||
329 | (descr-1)->next = start_descr; | 330 | (descr-1)->next = start_descr; |
330 | start_descr->prev = descr-1; | 331 | start_descr->prev = descr-1; |
331 | 332 | ||
332 | descr = start_descr; | ||
333 | if (direction == PCI_DMA_FROMDEVICE) | ||
334 | for (i=0; i < no; i++, descr++) | ||
335 | descr->next_descr_addr = descr->next->bus_addr; | ||
336 | |||
337 | spin_lock_init(&chain->lock); | 333 | spin_lock_init(&chain->lock); |
338 | chain->head = start_descr; | 334 | chain->head = start_descr; |
339 | chain->tail = start_descr; | 335 | chain->tail = start_descr; |
@@ -346,7 +342,7 @@ iommu_error: | |||
346 | if (descr->bus_addr) | 342 | if (descr->bus_addr) |
347 | pci_unmap_single(card->pdev, descr->bus_addr, | 343 | pci_unmap_single(card->pdev, descr->bus_addr, |
348 | SPIDER_NET_DESCR_SIZE, | 344 | SPIDER_NET_DESCR_SIZE, |
349 | direction); | 345 | PCI_DMA_BIDIRECTIONAL); |
350 | return -ENOMEM; | 346 | return -ENOMEM; |
351 | } | 347 | } |
352 | 348 | ||
@@ -362,15 +358,15 @@ spider_net_free_rx_chain_contents(struct spider_net_card *card) | |||
362 | struct spider_net_descr *descr; | 358 | struct spider_net_descr *descr; |
363 | 359 | ||
364 | descr = card->rx_chain.head; | 360 | descr = card->rx_chain.head; |
365 | while (descr->next != card->rx_chain.head) { | 361 | do { |
366 | if (descr->skb) { | 362 | if (descr->skb) { |
367 | dev_kfree_skb(descr->skb); | 363 | dev_kfree_skb(descr->skb); |
368 | pci_unmap_single(card->pdev, descr->buf_addr, | 364 | pci_unmap_single(card->pdev, descr->buf_addr, |
369 | SPIDER_NET_MAX_FRAME, | 365 | SPIDER_NET_MAX_FRAME, |
370 | PCI_DMA_FROMDEVICE); | 366 | PCI_DMA_BIDIRECTIONAL); |
371 | } | 367 | } |
372 | descr = descr->next; | 368 | descr = descr->next; |
373 | } | 369 | } while (descr != card->rx_chain.head); |
374 | } | 370 | } |
375 | 371 | ||
376 | /** | 372 | /** |
@@ -645,26 +641,41 @@ static int | |||
645 | spider_net_prepare_tx_descr(struct spider_net_card *card, | 641 | spider_net_prepare_tx_descr(struct spider_net_card *card, |
646 | struct sk_buff *skb) | 642 | struct sk_buff *skb) |
647 | { | 643 | { |
648 | struct spider_net_descr *descr = card->tx_chain.head; | 644 | struct spider_net_descr *descr; |
649 | dma_addr_t buf; | 645 | dma_addr_t buf; |
646 | unsigned long flags; | ||
647 | int length; | ||
650 | 648 | ||
651 | buf = pci_map_single(card->pdev, skb->data, skb->len, PCI_DMA_TODEVICE); | 649 | length = skb->len; |
650 | if (length < ETH_ZLEN) { | ||
651 | if (skb_pad(skb, ETH_ZLEN-length)) | ||
652 | return 0; | ||
653 | length = ETH_ZLEN; | ||
654 | } | ||
655 | |||
656 | buf = pci_map_single(card->pdev, skb->data, length, PCI_DMA_TODEVICE); | ||
652 | if (pci_dma_mapping_error(buf)) { | 657 | if (pci_dma_mapping_error(buf)) { |
653 | if (netif_msg_tx_err(card) && net_ratelimit()) | 658 | if (netif_msg_tx_err(card) && net_ratelimit()) |
654 | pr_err("could not iommu-map packet (%p, %i). " | 659 | pr_err("could not iommu-map packet (%p, %i). " |
655 | "Dropping packet\n", skb->data, skb->len); | 660 | "Dropping packet\n", skb->data, length); |
656 | card->spider_stats.tx_iommu_map_error++; | 661 | card->spider_stats.tx_iommu_map_error++; |
657 | return -ENOMEM; | 662 | return -ENOMEM; |
658 | } | 663 | } |
659 | 664 | ||
665 | spin_lock_irqsave(&card->tx_chain.lock, flags); | ||
666 | descr = card->tx_chain.head; | ||
667 | card->tx_chain.head = descr->next; | ||
668 | |||
660 | descr->buf_addr = buf; | 669 | descr->buf_addr = buf; |
661 | descr->buf_size = skb->len; | 670 | descr->buf_size = length; |
662 | descr->next_descr_addr = 0; | 671 | descr->next_descr_addr = 0; |
663 | descr->skb = skb; | 672 | descr->skb = skb; |
664 | descr->data_status = 0; | 673 | descr->data_status = 0; |
665 | 674 | ||
666 | descr->dmac_cmd_status = | 675 | descr->dmac_cmd_status = |
667 | SPIDER_NET_DESCR_CARDOWNED | SPIDER_NET_DMAC_NOCS; | 676 | SPIDER_NET_DESCR_CARDOWNED | SPIDER_NET_DMAC_NOCS; |
677 | spin_unlock_irqrestore(&card->tx_chain.lock, flags); | ||
678 | |||
668 | if (skb->protocol == htons(ETH_P_IP)) | 679 | if (skb->protocol == htons(ETH_P_IP)) |
669 | switch (skb->nh.iph->protocol) { | 680 | switch (skb->nh.iph->protocol) { |
670 | case IPPROTO_TCP: | 681 | case IPPROTO_TCP: |
@@ -675,32 +686,51 @@ spider_net_prepare_tx_descr(struct spider_net_card *card, | |||
675 | break; | 686 | break; |
676 | } | 687 | } |
677 | 688 | ||
689 | /* Chain the bus address, so that the DMA engine finds this descr. */ | ||
678 | descr->prev->next_descr_addr = descr->bus_addr; | 690 | descr->prev->next_descr_addr = descr->bus_addr; |
679 | 691 | ||
692 | card->netdev->trans_start = jiffies; /* set netdev watchdog timer */ | ||
680 | return 0; | 693 | return 0; |
681 | } | 694 | } |
682 | 695 | ||
683 | /** | 696 | static int |
684 | * spider_net_release_tx_descr - processes a used tx descriptor | 697 | spider_net_set_low_watermark(struct spider_net_card *card) |
685 | * @card: card structure | ||
686 | * @descr: descriptor to release | ||
687 | * | ||
688 | * releases a used tx descriptor (unmapping, freeing of skb) | ||
689 | */ | ||
690 | static inline void | ||
691 | spider_net_release_tx_descr(struct spider_net_card *card) | ||
692 | { | 698 | { |
699 | unsigned long flags; | ||
700 | int status; | ||
701 | int cnt=0; | ||
702 | int i; | ||
693 | struct spider_net_descr *descr = card->tx_chain.tail; | 703 | struct spider_net_descr *descr = card->tx_chain.tail; |
694 | struct sk_buff *skb; | ||
695 | 704 | ||
696 | card->tx_chain.tail = card->tx_chain.tail->next; | 705 | /* Measure the length of the queue. Measurement does not |
697 | descr->dmac_cmd_status |= SPIDER_NET_DESCR_NOT_IN_USE; | 706 | * need to be precise -- does not need a lock. */ |
707 | while (descr != card->tx_chain.head) { | ||
708 | status = descr->dmac_cmd_status & SPIDER_NET_DESCR_NOT_IN_USE; | ||
709 | if (status == SPIDER_NET_DESCR_NOT_IN_USE) | ||
710 | break; | ||
711 | descr = descr->next; | ||
712 | cnt++; | ||
713 | } | ||
698 | 714 | ||
699 | /* unmap the skb */ | 715 | /* If TX queue is short, don't even bother with interrupts */ |
700 | skb = descr->skb; | 716 | if (cnt < card->num_tx_desc/4) |
701 | pci_unmap_single(card->pdev, descr->buf_addr, skb->len, | 717 | return cnt; |
702 | PCI_DMA_TODEVICE); | 718 | |
703 | dev_kfree_skb_any(skb); | 719 | /* Set low-watermark 3/4th's of the way into the queue. */ |
720 | descr = card->tx_chain.tail; | ||
721 | cnt = (cnt*3)/4; | ||
722 | for (i=0;i<cnt; i++) | ||
723 | descr = descr->next; | ||
724 | |||
725 | /* Set the new watermark, clear the old watermark */ | ||
726 | spin_lock_irqsave(&card->tx_chain.lock, flags); | ||
727 | descr->dmac_cmd_status |= SPIDER_NET_DESCR_TXDESFLG; | ||
728 | if (card->low_watermark && card->low_watermark != descr) | ||
729 | card->low_watermark->dmac_cmd_status = | ||
730 | card->low_watermark->dmac_cmd_status & ~SPIDER_NET_DESCR_TXDESFLG; | ||
731 | card->low_watermark = descr; | ||
732 | spin_unlock_irqrestore(&card->tx_chain.lock, flags); | ||
733 | return cnt; | ||
704 | } | 734 | } |
705 | 735 | ||
706 | /** | 736 | /** |
@@ -719,21 +749,29 @@ static int | |||
719 | spider_net_release_tx_chain(struct spider_net_card *card, int brutal) | 749 | spider_net_release_tx_chain(struct spider_net_card *card, int brutal) |
720 | { | 750 | { |
721 | struct spider_net_descr_chain *chain = &card->tx_chain; | 751 | struct spider_net_descr_chain *chain = &card->tx_chain; |
752 | struct spider_net_descr *descr; | ||
753 | struct sk_buff *skb; | ||
754 | u32 buf_addr; | ||
755 | unsigned long flags; | ||
722 | int status; | 756 | int status; |
723 | 757 | ||
724 | spider_net_read_reg(card, SPIDER_NET_GDTDMACCNTR); | ||
725 | |||
726 | while (chain->tail != chain->head) { | 758 | while (chain->tail != chain->head) { |
727 | status = spider_net_get_descr_status(chain->tail); | 759 | spin_lock_irqsave(&chain->lock, flags); |
760 | descr = chain->tail; | ||
761 | |||
762 | status = spider_net_get_descr_status(descr); | ||
728 | switch (status) { | 763 | switch (status) { |
729 | case SPIDER_NET_DESCR_COMPLETE: | 764 | case SPIDER_NET_DESCR_COMPLETE: |
730 | card->netdev_stats.tx_packets++; | 765 | card->netdev_stats.tx_packets++; |
731 | card->netdev_stats.tx_bytes += chain->tail->skb->len; | 766 | card->netdev_stats.tx_bytes += descr->skb->len; |
732 | break; | 767 | break; |
733 | 768 | ||
734 | case SPIDER_NET_DESCR_CARDOWNED: | 769 | case SPIDER_NET_DESCR_CARDOWNED: |
735 | if (!brutal) | 770 | if (!brutal) { |
771 | spin_unlock_irqrestore(&chain->lock, flags); | ||
736 | return 1; | 772 | return 1; |
773 | } | ||
774 | |||
737 | /* fallthrough, if we release the descriptors | 775 | /* fallthrough, if we release the descriptors |
738 | * brutally (then we don't care about | 776 | * brutally (then we don't care about |
739 | * SPIDER_NET_DESCR_CARDOWNED) */ | 777 | * SPIDER_NET_DESCR_CARDOWNED) */ |
@@ -750,11 +788,25 @@ spider_net_release_tx_chain(struct spider_net_card *card, int brutal) | |||
750 | 788 | ||
751 | default: | 789 | default: |
752 | card->netdev_stats.tx_dropped++; | 790 | card->netdev_stats.tx_dropped++; |
753 | return 1; | 791 | if (!brutal) { |
792 | spin_unlock_irqrestore(&chain->lock, flags); | ||
793 | return 1; | ||
794 | } | ||
754 | } | 795 | } |
755 | spider_net_release_tx_descr(card); | ||
756 | } | ||
757 | 796 | ||
797 | chain->tail = descr->next; | ||
798 | descr->dmac_cmd_status |= SPIDER_NET_DESCR_NOT_IN_USE; | ||
799 | skb = descr->skb; | ||
800 | buf_addr = descr->buf_addr; | ||
801 | spin_unlock_irqrestore(&chain->lock, flags); | ||
802 | |||
803 | /* unmap the skb */ | ||
804 | if (skb) { | ||
805 | int len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; | ||
806 | pci_unmap_single(card->pdev, buf_addr, len, PCI_DMA_TODEVICE); | ||
807 | dev_kfree_skb(skb); | ||
808 | } | ||
809 | } | ||
758 | return 0; | 810 | return 0; |
759 | } | 811 | } |
760 | 812 | ||
@@ -763,8 +815,12 @@ spider_net_release_tx_chain(struct spider_net_card *card, int brutal) | |||
763 | * @card: card structure | 815 | * @card: card structure |
764 | * @descr: descriptor address to enable TX processing at | 816 | * @descr: descriptor address to enable TX processing at |
765 | * | 817 | * |
766 | * spider_net_kick_tx_dma writes the current tx chain head as start address | 818 | * This routine will start the transmit DMA running if |
767 | * of the tx descriptor chain and enables the transmission DMA engine | 819 | * it is not already running. This routine ned only be |
820 | * called when queueing a new packet to an empty tx queue. | ||
821 | * Writes the current tx chain head as start address | ||
822 | * of the tx descriptor chain and enables the transmission | ||
823 | * DMA engine. | ||
768 | */ | 824 | */ |
769 | static inline void | 825 | static inline void |
770 | spider_net_kick_tx_dma(struct spider_net_card *card) | 826 | spider_net_kick_tx_dma(struct spider_net_card *card) |
@@ -804,65 +860,43 @@ out: | |||
804 | static int | 860 | static int |
805 | spider_net_xmit(struct sk_buff *skb, struct net_device *netdev) | 861 | spider_net_xmit(struct sk_buff *skb, struct net_device *netdev) |
806 | { | 862 | { |
863 | int cnt; | ||
807 | struct spider_net_card *card = netdev_priv(netdev); | 864 | struct spider_net_card *card = netdev_priv(netdev); |
808 | struct spider_net_descr_chain *chain = &card->tx_chain; | 865 | struct spider_net_descr_chain *chain = &card->tx_chain; |
809 | struct spider_net_descr *descr = chain->head; | ||
810 | unsigned long flags; | ||
811 | int result; | ||
812 | |||
813 | spin_lock_irqsave(&chain->lock, flags); | ||
814 | 866 | ||
815 | spider_net_release_tx_chain(card, 0); | 867 | spider_net_release_tx_chain(card, 0); |
816 | 868 | ||
817 | if (chain->head->next == chain->tail->prev) { | 869 | if ((chain->head->next == chain->tail->prev) || |
818 | card->netdev_stats.tx_dropped++; | 870 | (spider_net_prepare_tx_descr(card, skb) != 0)) { |
819 | result = NETDEV_TX_LOCKED; | ||
820 | goto out; | ||
821 | } | ||
822 | 871 | ||
823 | if (spider_net_get_descr_status(descr) != SPIDER_NET_DESCR_NOT_IN_USE) { | ||
824 | card->netdev_stats.tx_dropped++; | 872 | card->netdev_stats.tx_dropped++; |
825 | result = NETDEV_TX_LOCKED; | 873 | netif_stop_queue(netdev); |
826 | goto out; | 874 | return NETDEV_TX_BUSY; |
827 | } | 875 | } |
828 | 876 | ||
829 | if (spider_net_prepare_tx_descr(card, skb) != 0) { | 877 | cnt = spider_net_set_low_watermark(card); |
830 | card->netdev_stats.tx_dropped++; | 878 | if (cnt < 5) |
831 | result = NETDEV_TX_BUSY; | 879 | spider_net_kick_tx_dma(card); |
832 | goto out; | 880 | return NETDEV_TX_OK; |
833 | } | ||
834 | |||
835 | result = NETDEV_TX_OK; | ||
836 | |||
837 | spider_net_kick_tx_dma(card); | ||
838 | card->tx_chain.head = card->tx_chain.head->next; | ||
839 | |||
840 | out: | ||
841 | spin_unlock_irqrestore(&chain->lock, flags); | ||
842 | netif_wake_queue(netdev); | ||
843 | return result; | ||
844 | } | 881 | } |
845 | 882 | ||
846 | /** | 883 | /** |
847 | * spider_net_cleanup_tx_ring - cleans up the TX ring | 884 | * spider_net_cleanup_tx_ring - cleans up the TX ring |
848 | * @card: card structure | 885 | * @card: card structure |
849 | * | 886 | * |
850 | * spider_net_cleanup_tx_ring is called by the tx_timer (as we don't use | 887 | * spider_net_cleanup_tx_ring is called by either the tx_timer |
851 | * interrupts to cleanup our TX ring) and returns sent packets to the stack | 888 | * or from the NAPI polling routine. |
852 | * by freeing them | 889 | * This routine releases resources associted with transmitted |
890 | * packets, including updating the queue tail pointer. | ||
853 | */ | 891 | */ |
854 | static void | 892 | static void |
855 | spider_net_cleanup_tx_ring(struct spider_net_card *card) | 893 | spider_net_cleanup_tx_ring(struct spider_net_card *card) |
856 | { | 894 | { |
857 | unsigned long flags; | ||
858 | |||
859 | spin_lock_irqsave(&card->tx_chain.lock, flags); | ||
860 | |||
861 | if ((spider_net_release_tx_chain(card, 0) != 0) && | 895 | if ((spider_net_release_tx_chain(card, 0) != 0) && |
862 | (card->netdev->flags & IFF_UP)) | 896 | (card->netdev->flags & IFF_UP)) { |
863 | spider_net_kick_tx_dma(card); | 897 | spider_net_kick_tx_dma(card); |
864 | 898 | netif_wake_queue(card->netdev); | |
865 | spin_unlock_irqrestore(&card->tx_chain.lock, flags); | 899 | } |
866 | } | 900 | } |
867 | 901 | ||
868 | /** | 902 | /** |
@@ -1053,6 +1087,7 @@ spider_net_poll(struct net_device *netdev, int *budget) | |||
1053 | int packets_to_do, packets_done = 0; | 1087 | int packets_to_do, packets_done = 0; |
1054 | int no_more_packets = 0; | 1088 | int no_more_packets = 0; |
1055 | 1089 | ||
1090 | spider_net_cleanup_tx_ring(card); | ||
1056 | packets_to_do = min(*budget, netdev->quota); | 1091 | packets_to_do = min(*budget, netdev->quota); |
1057 | 1092 | ||
1058 | while (packets_to_do) { | 1093 | while (packets_to_do) { |
@@ -1243,12 +1278,15 @@ spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg) | |||
1243 | case SPIDER_NET_PHYINT: | 1278 | case SPIDER_NET_PHYINT: |
1244 | case SPIDER_NET_GMAC2INT: | 1279 | case SPIDER_NET_GMAC2INT: |
1245 | case SPIDER_NET_GMAC1INT: | 1280 | case SPIDER_NET_GMAC1INT: |
1246 | case SPIDER_NET_GIPSINT: | ||
1247 | case SPIDER_NET_GFIFOINT: | 1281 | case SPIDER_NET_GFIFOINT: |
1248 | case SPIDER_NET_DMACINT: | 1282 | case SPIDER_NET_DMACINT: |
1249 | case SPIDER_NET_GSYSINT: | 1283 | case SPIDER_NET_GSYSINT: |
1250 | break; */ | 1284 | break; */ |
1251 | 1285 | ||
1286 | case SPIDER_NET_GIPSINT: | ||
1287 | show_error = 0; | ||
1288 | break; | ||
1289 | |||
1252 | case SPIDER_NET_GPWOPCMPINT: | 1290 | case SPIDER_NET_GPWOPCMPINT: |
1253 | /* PHY write operation completed */ | 1291 | /* PHY write operation completed */ |
1254 | show_error = 0; | 1292 | show_error = 0; |
@@ -1307,9 +1345,10 @@ spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg) | |||
1307 | case SPIDER_NET_GDTDCEINT: | 1345 | case SPIDER_NET_GDTDCEINT: |
1308 | /* chain end. If a descriptor should be sent, kick off | 1346 | /* chain end. If a descriptor should be sent, kick off |
1309 | * tx dma | 1347 | * tx dma |
1310 | if (card->tx_chain.tail == card->tx_chain.head) | 1348 | if (card->tx_chain.tail != card->tx_chain.head) |
1311 | spider_net_kick_tx_dma(card); | 1349 | spider_net_kick_tx_dma(card); |
1312 | show_error = 0; */ | 1350 | */ |
1351 | show_error = 0; | ||
1313 | break; | 1352 | break; |
1314 | 1353 | ||
1315 | /* case SPIDER_NET_G1TMCNTINT: not used. print a message */ | 1354 | /* case SPIDER_NET_G1TMCNTINT: not used. print a message */ |
@@ -1354,7 +1393,7 @@ spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg) | |||
1354 | if (netif_msg_intr(card)) | 1393 | if (netif_msg_intr(card)) |
1355 | pr_err("got descriptor chain end interrupt, " | 1394 | pr_err("got descriptor chain end interrupt, " |
1356 | "restarting DMAC %c.\n", | 1395 | "restarting DMAC %c.\n", |
1357 | 'D'+i-SPIDER_NET_GDDDCEINT); | 1396 | 'D'-(i-SPIDER_NET_GDDDCEINT)/3); |
1358 | spider_net_refill_rx_chain(card); | 1397 | spider_net_refill_rx_chain(card); |
1359 | spider_net_enable_rxdmac(card); | 1398 | spider_net_enable_rxdmac(card); |
1360 | show_error = 0; | 1399 | show_error = 0; |
@@ -1423,8 +1462,9 @@ spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg) | |||
1423 | } | 1462 | } |
1424 | 1463 | ||
1425 | if ((show_error) && (netif_msg_intr(card))) | 1464 | if ((show_error) && (netif_msg_intr(card))) |
1426 | pr_err("Got error interrupt, GHIINT0STS = 0x%08x, " | 1465 | pr_err("Got error interrupt on %s, GHIINT0STS = 0x%08x, " |
1427 | "GHIINT1STS = 0x%08x, GHIINT2STS = 0x%08x\n", | 1466 | "GHIINT1STS = 0x%08x, GHIINT2STS = 0x%08x\n", |
1467 | card->netdev->name, | ||
1428 | status_reg, error_reg1, error_reg2); | 1468 | status_reg, error_reg1, error_reg2); |
1429 | 1469 | ||
1430 | /* clear interrupt sources */ | 1470 | /* clear interrupt sources */ |
@@ -1460,6 +1500,8 @@ spider_net_interrupt(int irq, void *ptr) | |||
1460 | spider_net_rx_irq_off(card); | 1500 | spider_net_rx_irq_off(card); |
1461 | netif_rx_schedule(netdev); | 1501 | netif_rx_schedule(netdev); |
1462 | } | 1502 | } |
1503 | if (status_reg & SPIDER_NET_TXINT) | ||
1504 | netif_rx_schedule(netdev); | ||
1463 | 1505 | ||
1464 | if (status_reg & SPIDER_NET_ERRINT ) | 1506 | if (status_reg & SPIDER_NET_ERRINT ) |
1465 | spider_net_handle_error_irq(card, status_reg); | 1507 | spider_net_handle_error_irq(card, status_reg); |
@@ -1599,7 +1641,7 @@ spider_net_enable_card(struct spider_net_card *card) | |||
1599 | SPIDER_NET_INT2_MASK_VALUE); | 1641 | SPIDER_NET_INT2_MASK_VALUE); |
1600 | 1642 | ||
1601 | spider_net_write_reg(card, SPIDER_NET_GDTDMACCNTR, | 1643 | spider_net_write_reg(card, SPIDER_NET_GDTDMACCNTR, |
1602 | SPIDER_NET_GDTDCEIDIS); | 1644 | SPIDER_NET_GDTBSTA | SPIDER_NET_GDTDCEIDIS); |
1603 | } | 1645 | } |
1604 | 1646 | ||
1605 | /** | 1647 | /** |
@@ -1615,17 +1657,26 @@ int | |||
1615 | spider_net_open(struct net_device *netdev) | 1657 | spider_net_open(struct net_device *netdev) |
1616 | { | 1658 | { |
1617 | struct spider_net_card *card = netdev_priv(netdev); | 1659 | struct spider_net_card *card = netdev_priv(netdev); |
1618 | int result; | 1660 | struct spider_net_descr *descr; |
1661 | int i, result; | ||
1619 | 1662 | ||
1620 | result = -ENOMEM; | 1663 | result = -ENOMEM; |
1621 | if (spider_net_init_chain(card, &card->tx_chain, card->descr, | 1664 | if (spider_net_init_chain(card, &card->tx_chain, card->descr, |
1622 | PCI_DMA_TODEVICE, card->tx_desc)) | 1665 | card->num_tx_desc)) |
1623 | goto alloc_tx_failed; | 1666 | goto alloc_tx_failed; |
1667 | |||
1668 | card->low_watermark = NULL; | ||
1669 | |||
1670 | /* rx_chain is after tx_chain, so offset is descr + tx_count */ | ||
1624 | if (spider_net_init_chain(card, &card->rx_chain, | 1671 | if (spider_net_init_chain(card, &card->rx_chain, |
1625 | card->descr + card->rx_desc, | 1672 | card->descr + card->num_tx_desc, |
1626 | PCI_DMA_FROMDEVICE, card->rx_desc)) | 1673 | card->num_rx_desc)) |
1627 | goto alloc_rx_failed; | 1674 | goto alloc_rx_failed; |
1628 | 1675 | ||
1676 | descr = card->rx_chain.head; | ||
1677 | for (i=0; i < card->num_rx_desc; i++, descr++) | ||
1678 | descr->next_descr_addr = descr->next->bus_addr; | ||
1679 | |||
1629 | /* allocate rx skbs */ | 1680 | /* allocate rx skbs */ |
1630 | if (spider_net_alloc_rx_skbs(card)) | 1681 | if (spider_net_alloc_rx_skbs(card)) |
1631 | goto alloc_skbs_failed; | 1682 | goto alloc_skbs_failed; |
@@ -1878,10 +1929,7 @@ spider_net_stop(struct net_device *netdev) | |||
1878 | spider_net_disable_rxdmac(card); | 1929 | spider_net_disable_rxdmac(card); |
1879 | 1930 | ||
1880 | /* release chains */ | 1931 | /* release chains */ |
1881 | if (spin_trylock(&card->tx_chain.lock)) { | 1932 | spider_net_release_tx_chain(card, 1); |
1882 | spider_net_release_tx_chain(card, 1); | ||
1883 | spin_unlock(&card->tx_chain.lock); | ||
1884 | } | ||
1885 | 1933 | ||
1886 | spider_net_free_chain(card, &card->tx_chain); | 1934 | spider_net_free_chain(card, &card->tx_chain); |
1887 | spider_net_free_chain(card, &card->rx_chain); | 1935 | spider_net_free_chain(card, &card->rx_chain); |
@@ -2012,8 +2060,8 @@ spider_net_setup_netdev(struct spider_net_card *card) | |||
2012 | 2060 | ||
2013 | card->options.rx_csum = SPIDER_NET_RX_CSUM_DEFAULT; | 2061 | card->options.rx_csum = SPIDER_NET_RX_CSUM_DEFAULT; |
2014 | 2062 | ||
2015 | card->tx_desc = tx_descriptors; | 2063 | card->num_tx_desc = tx_descriptors; |
2016 | card->rx_desc = rx_descriptors; | 2064 | card->num_rx_desc = rx_descriptors; |
2017 | 2065 | ||
2018 | spider_net_setup_netdev_ops(netdev); | 2066 | spider_net_setup_netdev_ops(netdev); |
2019 | 2067 | ||
@@ -2252,6 +2300,8 @@ static struct pci_driver spider_net_driver = { | |||
2252 | */ | 2300 | */ |
2253 | static int __init spider_net_init(void) | 2301 | static int __init spider_net_init(void) |
2254 | { | 2302 | { |
2303 | printk(KERN_INFO "Spidernet version %s.\n", VERSION); | ||
2304 | |||
2255 | if (rx_descriptors < SPIDER_NET_RX_DESCRIPTORS_MIN) { | 2305 | if (rx_descriptors < SPIDER_NET_RX_DESCRIPTORS_MIN) { |
2256 | rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_MIN; | 2306 | rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_MIN; |
2257 | pr_info("adjusting rx descriptors to %i.\n", rx_descriptors); | 2307 | pr_info("adjusting rx descriptors to %i.\n", rx_descriptors); |
diff --git a/drivers/net/spider_net.h b/drivers/net/spider_net.h index a59deda2f95e..b3b46119b424 100644 --- a/drivers/net/spider_net.h +++ b/drivers/net/spider_net.h | |||
@@ -24,6 +24,8 @@ | |||
24 | #ifndef _SPIDER_NET_H | 24 | #ifndef _SPIDER_NET_H |
25 | #define _SPIDER_NET_H | 25 | #define _SPIDER_NET_H |
26 | 26 | ||
27 | #define VERSION "1.1 A" | ||
28 | |||
27 | #include "sungem_phy.h" | 29 | #include "sungem_phy.h" |
28 | 30 | ||
29 | extern int spider_net_stop(struct net_device *netdev); | 31 | extern int spider_net_stop(struct net_device *netdev); |
@@ -47,7 +49,7 @@ extern char spider_net_driver_name[]; | |||
47 | #define SPIDER_NET_TX_DESCRIPTORS_MIN 16 | 49 | #define SPIDER_NET_TX_DESCRIPTORS_MIN 16 |
48 | #define SPIDER_NET_TX_DESCRIPTORS_MAX 512 | 50 | #define SPIDER_NET_TX_DESCRIPTORS_MAX 512 |
49 | 51 | ||
50 | #define SPIDER_NET_TX_TIMER 20 | 52 | #define SPIDER_NET_TX_TIMER (HZ/5) |
51 | 53 | ||
52 | #define SPIDER_NET_RX_CSUM_DEFAULT 1 | 54 | #define SPIDER_NET_RX_CSUM_DEFAULT 1 |
53 | 55 | ||
@@ -189,7 +191,9 @@ extern char spider_net_driver_name[]; | |||
189 | #define SPIDER_NET_MACMODE_VALUE 0x00000001 | 191 | #define SPIDER_NET_MACMODE_VALUE 0x00000001 |
190 | #define SPIDER_NET_BURSTLMT_VALUE 0x00000200 /* about 16 us */ | 192 | #define SPIDER_NET_BURSTLMT_VALUE 0x00000200 /* about 16 us */ |
191 | 193 | ||
192 | /* 1(0) enable r/tx dma | 194 | /* DMAC control register GDMACCNTR |
195 | * | ||
196 | * 1(0) enable r/tx dma | ||
193 | * 0000000 fixed to 0 | 197 | * 0000000 fixed to 0 |
194 | * | 198 | * |
195 | * 000000 fixed to 0 | 199 | * 000000 fixed to 0 |
@@ -198,6 +202,7 @@ extern char spider_net_driver_name[]; | |||
198 | * | 202 | * |
199 | * 000000 fixed to 0 | 203 | * 000000 fixed to 0 |
200 | * 00 burst alignment: 128 bytes | 204 | * 00 burst alignment: 128 bytes |
205 | * 11 burst alignment: 1024 bytes | ||
201 | * | 206 | * |
202 | * 00000 fixed to 0 | 207 | * 00000 fixed to 0 |
203 | * 0 descr writeback size 32 bytes | 208 | * 0 descr writeback size 32 bytes |
@@ -208,10 +213,13 @@ extern char spider_net_driver_name[]; | |||
208 | #define SPIDER_NET_DMA_RX_VALUE 0x80000000 | 213 | #define SPIDER_NET_DMA_RX_VALUE 0x80000000 |
209 | #define SPIDER_NET_DMA_RX_FEND_VALUE 0x00030003 | 214 | #define SPIDER_NET_DMA_RX_FEND_VALUE 0x00030003 |
210 | /* to set TX_DMA_EN */ | 215 | /* to set TX_DMA_EN */ |
211 | #define SPIDER_NET_TX_DMA_EN 0x80000000 | 216 | #define SPIDER_NET_TX_DMA_EN 0x80000000 |
212 | #define SPIDER_NET_GDTDCEIDIS 0x00000002 | 217 | #define SPIDER_NET_GDTBSTA 0x00000300 |
213 | #define SPIDER_NET_DMA_TX_VALUE SPIDER_NET_TX_DMA_EN | \ | 218 | #define SPIDER_NET_GDTDCEIDIS 0x00000002 |
214 | SPIDER_NET_GDTDCEIDIS | 219 | #define SPIDER_NET_DMA_TX_VALUE SPIDER_NET_TX_DMA_EN | \ |
220 | SPIDER_NET_GDTBSTA | \ | ||
221 | SPIDER_NET_GDTDCEIDIS | ||
222 | |||
215 | #define SPIDER_NET_DMA_TX_FEND_VALUE 0x00030003 | 223 | #define SPIDER_NET_DMA_TX_FEND_VALUE 0x00030003 |
216 | 224 | ||
217 | /* SPIDER_NET_UA_DESCR_VALUE is OR'ed with the unicast address */ | 225 | /* SPIDER_NET_UA_DESCR_VALUE is OR'ed with the unicast address */ |
@@ -320,13 +328,10 @@ enum spider_net_int2_status { | |||
320 | SPIDER_NET_GRISPDNGINT | 328 | SPIDER_NET_GRISPDNGINT |
321 | }; | 329 | }; |
322 | 330 | ||
323 | #define SPIDER_NET_TXINT ( (1 << SPIDER_NET_GTTEDINT) | \ | 331 | #define SPIDER_NET_TXINT ( (1 << SPIDER_NET_GDTFDCINT) ) |
324 | (1 << SPIDER_NET_GDTDCEINT) | \ | ||
325 | (1 << SPIDER_NET_GDTFDCINT) ) | ||
326 | 332 | ||
327 | /* we rely on flagged descriptor interrupts*/ | 333 | /* We rely on flagged descriptor interrupts */ |
328 | #define SPIDER_NET_RXINT ( (1 << SPIDER_NET_GDAFDCINT) | \ | 334 | #define SPIDER_NET_RXINT ( (1 << SPIDER_NET_GDAFDCINT) ) |
329 | (1 << SPIDER_NET_GRMFLLINT) ) | ||
330 | 335 | ||
331 | #define SPIDER_NET_ERRINT ( 0xffffffff & \ | 336 | #define SPIDER_NET_ERRINT ( 0xffffffff & \ |
332 | (~SPIDER_NET_TXINT) & \ | 337 | (~SPIDER_NET_TXINT) & \ |
@@ -349,6 +354,7 @@ enum spider_net_int2_status { | |||
349 | #define SPIDER_NET_DESCR_FORCE_END 0x50000000 /* used in rx and tx */ | 354 | #define SPIDER_NET_DESCR_FORCE_END 0x50000000 /* used in rx and tx */ |
350 | #define SPIDER_NET_DESCR_CARDOWNED 0xA0000000 /* used in rx and tx */ | 355 | #define SPIDER_NET_DESCR_CARDOWNED 0xA0000000 /* used in rx and tx */ |
351 | #define SPIDER_NET_DESCR_NOT_IN_USE 0xF0000000 | 356 | #define SPIDER_NET_DESCR_NOT_IN_USE 0xF0000000 |
357 | #define SPIDER_NET_DESCR_TXDESFLG 0x00800000 | ||
352 | 358 | ||
353 | struct spider_net_descr { | 359 | struct spider_net_descr { |
354 | /* as defined by the hardware */ | 360 | /* as defined by the hardware */ |
@@ -433,6 +439,7 @@ struct spider_net_card { | |||
433 | 439 | ||
434 | struct spider_net_descr_chain tx_chain; | 440 | struct spider_net_descr_chain tx_chain; |
435 | struct spider_net_descr_chain rx_chain; | 441 | struct spider_net_descr_chain rx_chain; |
442 | struct spider_net_descr *low_watermark; | ||
436 | 443 | ||
437 | struct net_device_stats netdev_stats; | 444 | struct net_device_stats netdev_stats; |
438 | 445 | ||
@@ -448,8 +455,8 @@ struct spider_net_card { | |||
448 | 455 | ||
449 | /* for ethtool */ | 456 | /* for ethtool */ |
450 | int msg_enable; | 457 | int msg_enable; |
451 | int rx_desc; | 458 | int num_rx_desc; |
452 | int tx_desc; | 459 | int num_tx_desc; |
453 | struct spider_net_extra_stats spider_stats; | 460 | struct spider_net_extra_stats spider_stats; |
454 | 461 | ||
455 | struct spider_net_descr descr[0]; | 462 | struct spider_net_descr descr[0]; |
diff --git a/drivers/net/spider_net_ethtool.c b/drivers/net/spider_net_ethtool.c index 589e43658dee..91b995102915 100644 --- a/drivers/net/spider_net_ethtool.c +++ b/drivers/net/spider_net_ethtool.c | |||
@@ -76,7 +76,7 @@ spider_net_ethtool_get_drvinfo(struct net_device *netdev, | |||
76 | /* clear and fill out info */ | 76 | /* clear and fill out info */ |
77 | memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); | 77 | memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); |
78 | strncpy(drvinfo->driver, spider_net_driver_name, 32); | 78 | strncpy(drvinfo->driver, spider_net_driver_name, 32); |
79 | strncpy(drvinfo->version, "0.1", 32); | 79 | strncpy(drvinfo->version, VERSION, 32); |
80 | strcpy(drvinfo->fw_version, "no information"); | 80 | strcpy(drvinfo->fw_version, "no information"); |
81 | strncpy(drvinfo->bus_info, pci_name(card->pdev), 32); | 81 | strncpy(drvinfo->bus_info, pci_name(card->pdev), 32); |
82 | } | 82 | } |
@@ -158,9 +158,9 @@ spider_net_ethtool_get_ringparam(struct net_device *netdev, | |||
158 | struct spider_net_card *card = netdev->priv; | 158 | struct spider_net_card *card = netdev->priv; |
159 | 159 | ||
160 | ering->tx_max_pending = SPIDER_NET_TX_DESCRIPTORS_MAX; | 160 | ering->tx_max_pending = SPIDER_NET_TX_DESCRIPTORS_MAX; |
161 | ering->tx_pending = card->tx_desc; | 161 | ering->tx_pending = card->num_tx_desc; |
162 | ering->rx_max_pending = SPIDER_NET_RX_DESCRIPTORS_MAX; | 162 | ering->rx_max_pending = SPIDER_NET_RX_DESCRIPTORS_MAX; |
163 | ering->rx_pending = card->rx_desc; | 163 | ering->rx_pending = card->num_rx_desc; |
164 | } | 164 | } |
165 | 165 | ||
166 | static int spider_net_get_stats_count(struct net_device *netdev) | 166 | static int spider_net_get_stats_count(struct net_device *netdev) |
diff --git a/drivers/net/sun3_82586.c b/drivers/net/sun3_82586.c index d1d1885b0295..a3220a96524f 100644 --- a/drivers/net/sun3_82586.c +++ b/drivers/net/sun3_82586.c | |||
@@ -330,7 +330,7 @@ out2: | |||
330 | out1: | 330 | out1: |
331 | free_netdev(dev); | 331 | free_netdev(dev); |
332 | out: | 332 | out: |
333 | iounmap((void *)ioaddr); | 333 | iounmap((void __iomem *)ioaddr); |
334 | return ERR_PTR(err); | 334 | return ERR_PTR(err); |
335 | } | 335 | } |
336 | 336 | ||
diff --git a/drivers/net/sun3lance.c b/drivers/net/sun3lance.c index 91c76544e4dd..b865db363ba0 100644 --- a/drivers/net/sun3lance.c +++ b/drivers/net/sun3lance.c | |||
@@ -286,7 +286,7 @@ struct net_device * __init sun3lance_probe(int unit) | |||
286 | 286 | ||
287 | out1: | 287 | out1: |
288 | #ifdef CONFIG_SUN3 | 288 | #ifdef CONFIG_SUN3 |
289 | iounmap((void *)dev->base_addr); | 289 | iounmap((void __iomem *)dev->base_addr); |
290 | #endif | 290 | #endif |
291 | out: | 291 | out: |
292 | free_netdev(dev); | 292 | free_netdev(dev); |
@@ -326,7 +326,7 @@ static int __init lance_probe( struct net_device *dev) | |||
326 | ioaddr_probe[1] = tmp2; | 326 | ioaddr_probe[1] = tmp2; |
327 | 327 | ||
328 | #ifdef CONFIG_SUN3 | 328 | #ifdef CONFIG_SUN3 |
329 | iounmap((void *)ioaddr); | 329 | iounmap((void __iomem *)ioaddr); |
330 | #endif | 330 | #endif |
331 | return 0; | 331 | return 0; |
332 | } | 332 | } |
@@ -956,7 +956,7 @@ void cleanup_module(void) | |||
956 | { | 956 | { |
957 | unregister_netdev(sun3lance_dev); | 957 | unregister_netdev(sun3lance_dev); |
958 | #ifdef CONFIG_SUN3 | 958 | #ifdef CONFIG_SUN3 |
959 | iounmap((void *)sun3lance_dev->base_addr); | 959 | iounmap((void __iomem *)sun3lance_dev->base_addr); |
960 | #endif | 960 | #endif |
961 | free_netdev(sun3lance_dev); | 961 | free_netdev(sun3lance_dev); |
962 | } | 962 | } |
diff --git a/drivers/net/sunbmac.c b/drivers/net/sunbmac.c index 6439b0cef1e4..18f88853e1e5 100644 --- a/drivers/net/sunbmac.c +++ b/drivers/net/sunbmac.c | |||
@@ -42,7 +42,7 @@ | |||
42 | #define DRV_RELDATE "11/24/03" | 42 | #define DRV_RELDATE "11/24/03" |
43 | #define DRV_AUTHOR "David S. Miller (davem@redhat.com)" | 43 | #define DRV_AUTHOR "David S. Miller (davem@redhat.com)" |
44 | 44 | ||
45 | static char version[] __initdata = | 45 | static char version[] = |
46 | DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; | 46 | DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; |
47 | 47 | ||
48 | MODULE_VERSION(DRV_VERSION); | 48 | MODULE_VERSION(DRV_VERSION); |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 327836b1014e..c20bb998e0e5 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -68,8 +68,8 @@ | |||
68 | 68 | ||
69 | #define DRV_MODULE_NAME "tg3" | 69 | #define DRV_MODULE_NAME "tg3" |
70 | #define PFX DRV_MODULE_NAME ": " | 70 | #define PFX DRV_MODULE_NAME ": " |
71 | #define DRV_MODULE_VERSION "3.66" | 71 | #define DRV_MODULE_VERSION "3.69" |
72 | #define DRV_MODULE_RELDATE "September 23, 2006" | 72 | #define DRV_MODULE_RELDATE "November 15, 2006" |
73 | 73 | ||
74 | #define TG3_DEF_MAC_MODE 0 | 74 | #define TG3_DEF_MAC_MODE 0 |
75 | #define TG3_DEF_RX_MODE 0 | 75 | #define TG3_DEF_RX_MODE 0 |
@@ -129,7 +129,7 @@ | |||
129 | #define RX_JUMBO_PKT_BUF_SZ (9046 + tp->rx_offset + 64) | 129 | #define RX_JUMBO_PKT_BUF_SZ (9046 + tp->rx_offset + 64) |
130 | 130 | ||
131 | /* minimum number of free TX descriptors required to wake up TX process */ | 131 | /* minimum number of free TX descriptors required to wake up TX process */ |
132 | #define TG3_TX_WAKEUP_THRESH (TG3_TX_RING_SIZE / 4) | 132 | #define TG3_TX_WAKEUP_THRESH(tp) ((tp)->tx_pending / 4) |
133 | 133 | ||
134 | /* number of ETHTOOL_GSTATS u64's */ | 134 | /* number of ETHTOOL_GSTATS u64's */ |
135 | #define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64)) | 135 | #define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64)) |
@@ -3075,10 +3075,10 @@ static void tg3_tx(struct tg3 *tp) | |||
3075 | smp_mb(); | 3075 | smp_mb(); |
3076 | 3076 | ||
3077 | if (unlikely(netif_queue_stopped(tp->dev) && | 3077 | if (unlikely(netif_queue_stopped(tp->dev) && |
3078 | (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH))) { | 3078 | (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH(tp)))) { |
3079 | netif_tx_lock(tp->dev); | 3079 | netif_tx_lock(tp->dev); |
3080 | if (netif_queue_stopped(tp->dev) && | 3080 | if (netif_queue_stopped(tp->dev) && |
3081 | (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH)) | 3081 | (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH(tp))) |
3082 | netif_wake_queue(tp->dev); | 3082 | netif_wake_queue(tp->dev); |
3083 | netif_tx_unlock(tp->dev); | 3083 | netif_tx_unlock(tp->dev); |
3084 | } | 3084 | } |
@@ -3928,7 +3928,7 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3928 | tp->tx_prod = entry; | 3928 | tp->tx_prod = entry; |
3929 | if (unlikely(tg3_tx_avail(tp) <= (MAX_SKB_FRAGS + 1))) { | 3929 | if (unlikely(tg3_tx_avail(tp) <= (MAX_SKB_FRAGS + 1))) { |
3930 | netif_stop_queue(dev); | 3930 | netif_stop_queue(dev); |
3931 | if (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH) | 3931 | if (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH(tp)) |
3932 | netif_wake_queue(tp->dev); | 3932 | netif_wake_queue(tp->dev); |
3933 | } | 3933 | } |
3934 | 3934 | ||
@@ -4143,7 +4143,7 @@ static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev) | |||
4143 | tp->tx_prod = entry; | 4143 | tp->tx_prod = entry; |
4144 | if (unlikely(tg3_tx_avail(tp) <= (MAX_SKB_FRAGS + 1))) { | 4144 | if (unlikely(tg3_tx_avail(tp) <= (MAX_SKB_FRAGS + 1))) { |
4145 | netif_stop_queue(dev); | 4145 | netif_stop_queue(dev); |
4146 | if (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH) | 4146 | if (tg3_tx_avail(tp) > TG3_TX_WAKEUP_THRESH(tp)) |
4147 | netif_wake_queue(tp->dev); | 4147 | netif_wake_queue(tp->dev); |
4148 | } | 4148 | } |
4149 | 4149 | ||
@@ -4728,10 +4728,11 @@ static int tg3_poll_fw(struct tg3 *tp) | |||
4728 | u32 val; | 4728 | u32 val; |
4729 | 4729 | ||
4730 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { | 4730 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { |
4731 | for (i = 0; i < 400; i++) { | 4731 | /* Wait up to 20ms for init done. */ |
4732 | for (i = 0; i < 200; i++) { | ||
4732 | if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE) | 4733 | if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE) |
4733 | return 0; | 4734 | return 0; |
4734 | udelay(10); | 4735 | udelay(100); |
4735 | } | 4736 | } |
4736 | return -ENODEV; | 4737 | return -ENODEV; |
4737 | } | 4738 | } |
@@ -6014,7 +6015,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6014 | tg3_abort_hw(tp, 1); | 6015 | tg3_abort_hw(tp, 1); |
6015 | } | 6016 | } |
6016 | 6017 | ||
6017 | if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) && reset_phy) | 6018 | if (reset_phy) |
6018 | tg3_phy_reset(tp); | 6019 | tg3_phy_reset(tp); |
6019 | 6020 | ||
6020 | err = tg3_chip_reset(tp); | 6021 | err = tg3_chip_reset(tp); |
@@ -6574,7 +6575,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6574 | tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl); | 6575 | tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl); |
6575 | } | 6576 | } |
6576 | 6577 | ||
6577 | err = tg3_setup_phy(tp, reset_phy); | 6578 | err = tg3_setup_phy(tp, 0); |
6578 | if (err) | 6579 | if (err) |
6579 | return err; | 6580 | return err; |
6580 | 6581 | ||
@@ -6978,8 +6979,10 @@ static int tg3_open(struct net_device *dev) | |||
6978 | tg3_full_lock(tp, 0); | 6979 | tg3_full_lock(tp, 0); |
6979 | 6980 | ||
6980 | err = tg3_set_power_state(tp, PCI_D0); | 6981 | err = tg3_set_power_state(tp, PCI_D0); |
6981 | if (err) | 6982 | if (err) { |
6983 | tg3_full_unlock(tp); | ||
6982 | return err; | 6984 | return err; |
6985 | } | ||
6983 | 6986 | ||
6984 | tg3_disable_ints(tp); | 6987 | tg3_disable_ints(tp); |
6985 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; | 6988 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; |
@@ -8106,7 +8109,10 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e | |||
8106 | 8109 | ||
8107 | if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) || | 8110 | if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) || |
8108 | (ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) || | 8111 | (ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) || |
8109 | (ering->tx_pending > TG3_TX_RING_SIZE - 1)) | 8112 | (ering->tx_pending > TG3_TX_RING_SIZE - 1) || |
8113 | (ering->tx_pending <= MAX_SKB_FRAGS) || | ||
8114 | ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_1_BUG) && | ||
8115 | (ering->tx_pending <= (MAX_SKB_FRAGS * 3)))) | ||
8110 | return -EINVAL; | 8116 | return -EINVAL; |
8111 | 8117 | ||
8112 | if (netif_running(dev)) { | 8118 | if (netif_running(dev)) { |
@@ -10209,7 +10215,7 @@ skip_phy_reset: | |||
10209 | static void __devinit tg3_read_partno(struct tg3 *tp) | 10215 | static void __devinit tg3_read_partno(struct tg3 *tp) |
10210 | { | 10216 | { |
10211 | unsigned char vpd_data[256]; | 10217 | unsigned char vpd_data[256]; |
10212 | int i; | 10218 | unsigned int i; |
10213 | u32 magic; | 10219 | u32 magic; |
10214 | 10220 | ||
10215 | if (tg3_nvram_read_swab(tp, 0x0, &magic)) | 10221 | if (tg3_nvram_read_swab(tp, 0x0, &magic)) |
@@ -10255,9 +10261,9 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
10255 | } | 10261 | } |
10256 | 10262 | ||
10257 | /* Now parse and find the part number. */ | 10263 | /* Now parse and find the part number. */ |
10258 | for (i = 0; i < 256; ) { | 10264 | for (i = 0; i < 254; ) { |
10259 | unsigned char val = vpd_data[i]; | 10265 | unsigned char val = vpd_data[i]; |
10260 | int block_end; | 10266 | unsigned int block_end; |
10261 | 10267 | ||
10262 | if (val == 0x82 || val == 0x91) { | 10268 | if (val == 0x82 || val == 0x91) { |
10263 | i = (i + 3 + | 10269 | i = (i + 3 + |
@@ -10273,21 +10279,26 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
10273 | (vpd_data[i + 1] + | 10279 | (vpd_data[i + 1] + |
10274 | (vpd_data[i + 2] << 8))); | 10280 | (vpd_data[i + 2] << 8))); |
10275 | i += 3; | 10281 | i += 3; |
10276 | while (i < block_end) { | 10282 | |
10283 | if (block_end > 256) | ||
10284 | goto out_not_found; | ||
10285 | |||
10286 | while (i < (block_end - 2)) { | ||
10277 | if (vpd_data[i + 0] == 'P' && | 10287 | if (vpd_data[i + 0] == 'P' && |
10278 | vpd_data[i + 1] == 'N') { | 10288 | vpd_data[i + 1] == 'N') { |
10279 | int partno_len = vpd_data[i + 2]; | 10289 | int partno_len = vpd_data[i + 2]; |
10280 | 10290 | ||
10281 | if (partno_len > 24) | 10291 | i += 3; |
10292 | if (partno_len > 24 || (partno_len + i) > 256) | ||
10282 | goto out_not_found; | 10293 | goto out_not_found; |
10283 | 10294 | ||
10284 | memcpy(tp->board_part_number, | 10295 | memcpy(tp->board_part_number, |
10285 | &vpd_data[i + 3], | 10296 | &vpd_data[i], partno_len); |
10286 | partno_len); | ||
10287 | 10297 | ||
10288 | /* Success. */ | 10298 | /* Success. */ |
10289 | return; | 10299 | return; |
10290 | } | 10300 | } |
10301 | i += 3 + vpd_data[i + 2]; | ||
10291 | } | 10302 | } |
10292 | 10303 | ||
10293 | /* Part number not found. */ | 10304 | /* Part number not found. */ |
@@ -10357,7 +10368,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
10357 | u32 pci_state_reg, grc_misc_cfg; | 10368 | u32 pci_state_reg, grc_misc_cfg; |
10358 | u32 val; | 10369 | u32 val; |
10359 | u16 pci_cmd; | 10370 | u16 pci_cmd; |
10360 | int err; | 10371 | int err, pcie_cap; |
10361 | 10372 | ||
10362 | /* Force memory write invalidate off. If we leave it on, | 10373 | /* Force memory write invalidate off. If we leave it on, |
10363 | * then on 5700_BX chips we have to enable a workaround. | 10374 | * then on 5700_BX chips we have to enable a workaround. |
@@ -10532,8 +10543,19 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
10532 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) | 10543 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) |
10533 | tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; | 10544 | tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; |
10534 | 10545 | ||
10535 | if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) | 10546 | pcie_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP); |
10547 | if (pcie_cap != 0) { | ||
10536 | tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS; | 10548 | tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS; |
10549 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { | ||
10550 | u16 lnkctl; | ||
10551 | |||
10552 | pci_read_config_word(tp->pdev, | ||
10553 | pcie_cap + PCI_EXP_LNKCTL, | ||
10554 | &lnkctl); | ||
10555 | if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) | ||
10556 | tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2; | ||
10557 | } | ||
10558 | } | ||
10537 | 10559 | ||
10538 | /* If we have an AMD 762 or VIA K8T800 chipset, write | 10560 | /* If we have an AMD 762 or VIA K8T800 chipset, write |
10539 | * reordering to the mailbox registers done by the host | 10561 | * reordering to the mailbox registers done by the host |
@@ -11800,6 +11822,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
11800 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || | 11822 | else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || |
11801 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 || | 11823 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 || |
11802 | tp->pci_chip_rev_id == CHIPREV_ID_5705_A0 || | 11824 | tp->pci_chip_rev_id == CHIPREV_ID_5705_A0 || |
11825 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 || | ||
11803 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) { | 11826 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) { |
11804 | tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; | 11827 | tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; |
11805 | } else { | 11828 | } else { |
diff --git a/drivers/net/tokenring/proteon.c b/drivers/net/tokenring/proteon.c index 4f756960db2a..cb7dbb63c9d9 100644 --- a/drivers/net/tokenring/proteon.c +++ b/drivers/net/tokenring/proteon.c | |||
@@ -370,6 +370,10 @@ static int __init proteon_init(void) | |||
370 | dev->dma = dma[i]; | 370 | dev->dma = dma[i]; |
371 | pdev = platform_device_register_simple("proteon", | 371 | pdev = platform_device_register_simple("proteon", |
372 | i, NULL, 0); | 372 | i, NULL, 0); |
373 | if (IS_ERR(pdev)) { | ||
374 | free_netdev(dev); | ||
375 | continue; | ||
376 | } | ||
373 | err = setup_card(dev, &pdev->dev); | 377 | err = setup_card(dev, &pdev->dev); |
374 | if (!err) { | 378 | if (!err) { |
375 | proteon_dev[i] = pdev; | 379 | proteon_dev[i] = pdev; |
@@ -385,9 +389,10 @@ static int __init proteon_init(void) | |||
385 | /* Probe for cards. */ | 389 | /* Probe for cards. */ |
386 | if (num == 0) { | 390 | if (num == 0) { |
387 | printk(KERN_NOTICE "proteon.c: No cards found.\n"); | 391 | printk(KERN_NOTICE "proteon.c: No cards found.\n"); |
388 | return (-ENODEV); | 392 | platform_driver_unregister(&proteon_driver); |
393 | return -ENODEV; | ||
389 | } | 394 | } |
390 | return (0); | 395 | return 0; |
391 | } | 396 | } |
392 | 397 | ||
393 | static void __exit proteon_cleanup(void) | 398 | static void __exit proteon_cleanup(void) |
diff --git a/drivers/net/tokenring/skisa.c b/drivers/net/tokenring/skisa.c index d6ba41cf3110..33afea31d87b 100644 --- a/drivers/net/tokenring/skisa.c +++ b/drivers/net/tokenring/skisa.c | |||
@@ -380,6 +380,10 @@ static int __init sk_isa_init(void) | |||
380 | dev->dma = dma[i]; | 380 | dev->dma = dma[i]; |
381 | pdev = platform_device_register_simple("skisa", | 381 | pdev = platform_device_register_simple("skisa", |
382 | i, NULL, 0); | 382 | i, NULL, 0); |
383 | if (IS_ERR(pdev)) { | ||
384 | free_netdev(dev); | ||
385 | continue; | ||
386 | } | ||
383 | err = setup_card(dev, &pdev->dev); | 387 | err = setup_card(dev, &pdev->dev); |
384 | if (!err) { | 388 | if (!err) { |
385 | sk_isa_dev[i] = pdev; | 389 | sk_isa_dev[i] = pdev; |
@@ -395,9 +399,10 @@ static int __init sk_isa_init(void) | |||
395 | /* Probe for cards. */ | 399 | /* Probe for cards. */ |
396 | if (num == 0) { | 400 | if (num == 0) { |
397 | printk(KERN_NOTICE "skisa.c: No cards found.\n"); | 401 | printk(KERN_NOTICE "skisa.c: No cards found.\n"); |
398 | return (-ENODEV); | 402 | platform_driver_unregister(&sk_isa_driver); |
403 | return -ENODEV; | ||
399 | } | 404 | } |
400 | return (0); | 405 | return 0; |
401 | } | 406 | } |
402 | 407 | ||
403 | static void __exit sk_isa_cleanup(void) | 408 | static void __exit sk_isa_cleanup(void) |
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c index 2cfd9634895a..f6b3a94e97bf 100644 --- a/drivers/net/tulip/de2104x.c +++ b/drivers/net/tulip/de2104x.c | |||
@@ -1730,7 +1730,7 @@ static void __init de21040_get_media_info(struct de_private *de) | |||
1730 | } | 1730 | } |
1731 | 1731 | ||
1732 | /* Note: this routine returns extra data bits for size detection. */ | 1732 | /* Note: this routine returns extra data bits for size detection. */ |
1733 | static unsigned __init tulip_read_eeprom(void __iomem *regs, int location, int addr_len) | 1733 | static unsigned __devinit tulip_read_eeprom(void __iomem *regs, int location, int addr_len) |
1734 | { | 1734 | { |
1735 | int i; | 1735 | int i; |
1736 | unsigned retval = 0; | 1736 | unsigned retval = 0; |
@@ -1926,7 +1926,7 @@ bad_srom: | |||
1926 | goto fill_defaults; | 1926 | goto fill_defaults; |
1927 | } | 1927 | } |
1928 | 1928 | ||
1929 | static int __init de_init_one (struct pci_dev *pdev, | 1929 | static int __devinit de_init_one (struct pci_dev *pdev, |
1930 | const struct pci_device_id *ent) | 1930 | const struct pci_device_id *ent) |
1931 | { | 1931 | { |
1932 | struct net_device *dev; | 1932 | struct net_device *dev; |
@@ -2082,7 +2082,7 @@ err_out_free: | |||
2082 | return rc; | 2082 | return rc; |
2083 | } | 2083 | } |
2084 | 2084 | ||
2085 | static void __exit de_remove_one (struct pci_dev *pdev) | 2085 | static void __devexit de_remove_one (struct pci_dev *pdev) |
2086 | { | 2086 | { |
2087 | struct net_device *dev = pci_get_drvdata(pdev); | 2087 | struct net_device *dev = pci_get_drvdata(pdev); |
2088 | struct de_private *de = dev->priv; | 2088 | struct de_private *de = dev->priv; |
@@ -2164,7 +2164,7 @@ static struct pci_driver de_driver = { | |||
2164 | .name = DRV_NAME, | 2164 | .name = DRV_NAME, |
2165 | .id_table = de_pci_tbl, | 2165 | .id_table = de_pci_tbl, |
2166 | .probe = de_init_one, | 2166 | .probe = de_init_one, |
2167 | .remove = __exit_p(de_remove_one), | 2167 | .remove = __devexit_p(de_remove_one), |
2168 | #ifdef CONFIG_PM | 2168 | #ifdef CONFIG_PM |
2169 | .suspend = de_suspend, | 2169 | .suspend = de_suspend, |
2170 | .resume = de_resume, | 2170 | .resume = de_resume, |
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index 12cd7b561f35..b37888011067 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c | |||
@@ -2,14 +2,11 @@ | |||
2 | * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. | 2 | * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. |
3 | * | 3 | * |
4 | * Author: Shlomi Gridish <gridish@freescale.com> | 4 | * Author: Shlomi Gridish <gridish@freescale.com> |
5 | * Li Yang <leoli@freescale.com> | ||
5 | * | 6 | * |
6 | * Description: | 7 | * Description: |
7 | * QE UCC Gigabit Ethernet Driver | 8 | * QE UCC Gigabit Ethernet Driver |
8 | * | 9 | * |
9 | * Changelog: | ||
10 | * Jul 6, 2006 Li Yang <LeoLi@freescale.com> | ||
11 | * - Rearrange code and style fixes | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify it | 10 | * This program is free software; you can redistribute it and/or modify it |
14 | * under the terms of the GNU General Public License as published by the | 11 | * under the terms of the GNU General Public License as published by the |
15 | * Free Software Foundation; either version 2 of the License, or (at your | 12 | * Free Software Foundation; either version 2 of the License, or (at your |
@@ -31,9 +28,9 @@ | |||
31 | #include <linux/dma-mapping.h> | 28 | #include <linux/dma-mapping.h> |
32 | #include <linux/fsl_devices.h> | 29 | #include <linux/fsl_devices.h> |
33 | #include <linux/ethtool.h> | 30 | #include <linux/ethtool.h> |
34 | #include <linux/platform_device.h> | ||
35 | #include <linux/mii.h> | 31 | #include <linux/mii.h> |
36 | 32 | ||
33 | #include <asm/of_device.h> | ||
37 | #include <asm/uaccess.h> | 34 | #include <asm/uaccess.h> |
38 | #include <asm/irq.h> | 35 | #include <asm/irq.h> |
39 | #include <asm/io.h> | 36 | #include <asm/io.h> |
@@ -70,7 +67,7 @@ | |||
70 | 67 | ||
71 | static DEFINE_SPINLOCK(ugeth_lock); | 68 | static DEFINE_SPINLOCK(ugeth_lock); |
72 | 69 | ||
73 | static ucc_geth_info_t ugeth_primary_info = { | 70 | static struct ucc_geth_info ugeth_primary_info = { |
74 | .uf_info = { | 71 | .uf_info = { |
75 | .bd_mem_part = MEM_PART_SYSTEM, | 72 | .bd_mem_part = MEM_PART_SYSTEM, |
76 | .rtsm = UCC_FAST_SEND_IDLES_BETWEEN_FRAMES, | 73 | .rtsm = UCC_FAST_SEND_IDLES_BETWEEN_FRAMES, |
@@ -163,7 +160,7 @@ static ucc_geth_info_t ugeth_primary_info = { | |||
163 | .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, | 160 | .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, |
164 | }; | 161 | }; |
165 | 162 | ||
166 | static ucc_geth_info_t ugeth_info[8]; | 163 | static struct ucc_geth_info ugeth_info[8]; |
167 | 164 | ||
168 | #ifdef DEBUG | 165 | #ifdef DEBUG |
169 | static void mem_disp(u8 *addr, int size) | 166 | static void mem_disp(u8 *addr, int size) |
@@ -219,8 +216,8 @@ static struct list_head *dequeue(struct list_head *lh) | |||
219 | } | 216 | } |
220 | } | 217 | } |
221 | 218 | ||
222 | static int get_interface_details(enet_interface_e enet_interface, | 219 | static int get_interface_details(enum enet_interface enet_interface, |
223 | enet_speed_e *speed, | 220 | enum enet_speed *speed, |
224 | int *r10m, | 221 | int *r10m, |
225 | int *rmm, | 222 | int *rmm, |
226 | int *rpm, | 223 | int *rpm, |
@@ -283,7 +280,7 @@ static int get_interface_details(enet_interface_e enet_interface, | |||
283 | return 0; | 280 | return 0; |
284 | } | 281 | } |
285 | 282 | ||
286 | static struct sk_buff *get_new_skb(ucc_geth_private_t *ugeth, u8 *bd) | 283 | static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, u8 *bd) |
287 | { | 284 | { |
288 | struct sk_buff *skb = NULL; | 285 | struct sk_buff *skb = NULL; |
289 | 286 | ||
@@ -303,21 +300,19 @@ static struct sk_buff *get_new_skb(ucc_geth_private_t *ugeth, u8 *bd) | |||
303 | 300 | ||
304 | skb->dev = ugeth->dev; | 301 | skb->dev = ugeth->dev; |
305 | 302 | ||
306 | BD_BUFFER_SET(bd, | 303 | out_be32(&((struct qe_bd *)bd)->buf, |
307 | dma_map_single(NULL, | 304 | dma_map_single(NULL, |
308 | skb->data, | 305 | skb->data, |
309 | ugeth->ug_info->uf_info.max_rx_buf_length + | 306 | ugeth->ug_info->uf_info.max_rx_buf_length + |
310 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, | 307 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, |
311 | DMA_FROM_DEVICE)); | 308 | DMA_FROM_DEVICE)); |
312 | 309 | ||
313 | BD_STATUS_AND_LENGTH_SET(bd, | 310 | out_be32((u32 *)bd, (R_E | R_I | (in_be32((u32 *)bd) & R_W))); |
314 | (R_E | R_I | | ||
315 | (BD_STATUS_AND_LENGTH(bd) & R_W))); | ||
316 | 311 | ||
317 | return skb; | 312 | return skb; |
318 | } | 313 | } |
319 | 314 | ||
320 | static int rx_bd_buffer_set(ucc_geth_private_t *ugeth, u8 rxQ) | 315 | static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) |
321 | { | 316 | { |
322 | u8 *bd; | 317 | u8 *bd; |
323 | u32 bd_status; | 318 | u32 bd_status; |
@@ -328,7 +323,7 @@ static int rx_bd_buffer_set(ucc_geth_private_t *ugeth, u8 rxQ) | |||
328 | i = 0; | 323 | i = 0; |
329 | 324 | ||
330 | do { | 325 | do { |
331 | bd_status = BD_STATUS_AND_LENGTH(bd); | 326 | bd_status = in_be32((u32*)bd); |
332 | skb = get_new_skb(ugeth, bd); | 327 | skb = get_new_skb(ugeth, bd); |
333 | 328 | ||
334 | if (!skb) /* If can not allocate data buffer, | 329 | if (!skb) /* If can not allocate data buffer, |
@@ -338,19 +333,19 @@ static int rx_bd_buffer_set(ucc_geth_private_t *ugeth, u8 rxQ) | |||
338 | ugeth->rx_skbuff[rxQ][i] = skb; | 333 | ugeth->rx_skbuff[rxQ][i] = skb; |
339 | 334 | ||
340 | /* advance the BD pointer */ | 335 | /* advance the BD pointer */ |
341 | bd += UCC_GETH_SIZE_OF_BD; | 336 | bd += sizeof(struct qe_bd); |
342 | i++; | 337 | i++; |
343 | } while (!(bd_status & R_W)); | 338 | } while (!(bd_status & R_W)); |
344 | 339 | ||
345 | return 0; | 340 | return 0; |
346 | } | 341 | } |
347 | 342 | ||
348 | static int fill_init_enet_entries(ucc_geth_private_t *ugeth, | 343 | static int fill_init_enet_entries(struct ucc_geth_private *ugeth, |
349 | volatile u32 *p_start, | 344 | volatile u32 *p_start, |
350 | u8 num_entries, | 345 | u8 num_entries, |
351 | u32 thread_size, | 346 | u32 thread_size, |
352 | u32 thread_alignment, | 347 | u32 thread_alignment, |
353 | qe_risc_allocation_e risc, | 348 | enum qe_risc_allocation risc, |
354 | int skip_page_for_first_entry) | 349 | int skip_page_for_first_entry) |
355 | { | 350 | { |
356 | u32 init_enet_offset; | 351 | u32 init_enet_offset; |
@@ -383,10 +378,10 @@ static int fill_init_enet_entries(ucc_geth_private_t *ugeth, | |||
383 | return 0; | 378 | return 0; |
384 | } | 379 | } |
385 | 380 | ||
386 | static int return_init_enet_entries(ucc_geth_private_t *ugeth, | 381 | static int return_init_enet_entries(struct ucc_geth_private *ugeth, |
387 | volatile u32 *p_start, | 382 | volatile u32 *p_start, |
388 | u8 num_entries, | 383 | u8 num_entries, |
389 | qe_risc_allocation_e risc, | 384 | enum qe_risc_allocation risc, |
390 | int skip_page_for_first_entry) | 385 | int skip_page_for_first_entry) |
391 | { | 386 | { |
392 | u32 init_enet_offset; | 387 | u32 init_enet_offset; |
@@ -416,11 +411,11 @@ static int return_init_enet_entries(ucc_geth_private_t *ugeth, | |||
416 | } | 411 | } |
417 | 412 | ||
418 | #ifdef DEBUG | 413 | #ifdef DEBUG |
419 | static int dump_init_enet_entries(ucc_geth_private_t *ugeth, | 414 | static int dump_init_enet_entries(struct ucc_geth_private *ugeth, |
420 | volatile u32 *p_start, | 415 | volatile u32 *p_start, |
421 | u8 num_entries, | 416 | u8 num_entries, |
422 | u32 thread_size, | 417 | u32 thread_size, |
423 | qe_risc_allocation_e risc, | 418 | enum qe_risc_allocation risc, |
424 | int skip_page_for_first_entry) | 419 | int skip_page_for_first_entry) |
425 | { | 420 | { |
426 | u32 init_enet_offset; | 421 | u32 init_enet_offset; |
@@ -456,14 +451,14 @@ static int dump_init_enet_entries(ucc_geth_private_t *ugeth, | |||
456 | #endif | 451 | #endif |
457 | 452 | ||
458 | #ifdef CONFIG_UGETH_FILTERING | 453 | #ifdef CONFIG_UGETH_FILTERING |
459 | static enet_addr_container_t *get_enet_addr_container(void) | 454 | static struct enet_addr_container *get_enet_addr_container(void) |
460 | { | 455 | { |
461 | enet_addr_container_t *enet_addr_cont; | 456 | struct enet_addr_container *enet_addr_cont; |
462 | 457 | ||
463 | /* allocate memory */ | 458 | /* allocate memory */ |
464 | enet_addr_cont = kmalloc(sizeof(enet_addr_container_t), GFP_KERNEL); | 459 | enet_addr_cont = kmalloc(sizeof(struct enet_addr_container), GFP_KERNEL); |
465 | if (!enet_addr_cont) { | 460 | if (!enet_addr_cont) { |
466 | ugeth_err("%s: No memory for enet_addr_container_t object.", | 461 | ugeth_err("%s: No memory for enet_addr_container object.", |
467 | __FUNCTION__); | 462 | __FUNCTION__); |
468 | return NULL; | 463 | return NULL; |
469 | } | 464 | } |
@@ -472,45 +467,43 @@ static enet_addr_container_t *get_enet_addr_container(void) | |||
472 | } | 467 | } |
473 | #endif /* CONFIG_UGETH_FILTERING */ | 468 | #endif /* CONFIG_UGETH_FILTERING */ |
474 | 469 | ||
475 | static void put_enet_addr_container(enet_addr_container_t *enet_addr_cont) | 470 | static void put_enet_addr_container(struct enet_addr_container *enet_addr_cont) |
476 | { | 471 | { |
477 | kfree(enet_addr_cont); | 472 | kfree(enet_addr_cont); |
478 | } | 473 | } |
479 | 474 | ||
475 | static int set_mac_addr(__be16 __iomem *reg, u8 *mac) | ||
476 | { | ||
477 | out_be16(®[0], ((u16)mac[5] << 8) | mac[4]); | ||
478 | out_be16(®[1], ((u16)mac[3] << 8) | mac[2]); | ||
479 | out_be16(®[2], ((u16)mac[1] << 8) | mac[0]); | ||
480 | } | ||
481 | |||
480 | #ifdef CONFIG_UGETH_FILTERING | 482 | #ifdef CONFIG_UGETH_FILTERING |
481 | static int hw_add_addr_in_paddr(ucc_geth_private_t *ugeth, | 483 | static int hw_add_addr_in_paddr(struct ucc_geth_private *ugeth, |
482 | enet_addr_t *p_enet_addr, u8 paddr_num) | 484 | u8 *p_enet_addr, u8 paddr_num) |
483 | { | 485 | { |
484 | ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; | 486 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; |
485 | 487 | ||
486 | if (!(paddr_num < NUM_OF_PADDRS)) { | 488 | if (!(paddr_num < NUM_OF_PADDRS)) { |
487 | ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); | 489 | ugeth_warn("%s: Illegal paddr_num.", __FUNCTION__); |
488 | return -EINVAL; | 490 | return -EINVAL; |
489 | } | 491 | } |
490 | 492 | ||
491 | p_82xx_addr_filt = | 493 | p_82xx_addr_filt = |
492 | (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> | 494 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> |
493 | addressfiltering; | 495 | addressfiltering; |
494 | 496 | ||
495 | /* Ethernet frames are defined in Little Endian mode, */ | 497 | /* Ethernet frames are defined in Little Endian mode, */ |
496 | /* therefore to insert the address we reverse the bytes. */ | 498 | /* therefore to insert the address we reverse the bytes. */ |
497 | out_be16(&p_82xx_addr_filt->paddr[paddr_num].h, | 499 | set_mac_addr(&p_82xx_addr_filt->paddr[paddr_num].h, p_enet_addr); |
498 | (u16) (((u16) (((u16) ((*p_enet_addr)[5])) << 8)) | | ||
499 | (u16) (*p_enet_addr)[4])); | ||
500 | out_be16(&p_82xx_addr_filt->paddr[paddr_num].m, | ||
501 | (u16) (((u16) (((u16) ((*p_enet_addr)[3])) << 8)) | | ||
502 | (u16) (*p_enet_addr)[2])); | ||
503 | out_be16(&p_82xx_addr_filt->paddr[paddr_num].l, | ||
504 | (u16) (((u16) (((u16) ((*p_enet_addr)[1])) << 8)) | | ||
505 | (u16) (*p_enet_addr)[0])); | ||
506 | |||
507 | return 0; | 500 | return 0; |
508 | } | 501 | } |
509 | #endif /* CONFIG_UGETH_FILTERING */ | 502 | #endif /* CONFIG_UGETH_FILTERING */ |
510 | 503 | ||
511 | static int hw_clear_addr_in_paddr(ucc_geth_private_t *ugeth, u8 paddr_num) | 504 | static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) |
512 | { | 505 | { |
513 | ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; | 506 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; |
514 | 507 | ||
515 | if (!(paddr_num < NUM_OF_PADDRS)) { | 508 | if (!(paddr_num < NUM_OF_PADDRS)) { |
516 | ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); | 509 | ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); |
@@ -518,7 +511,7 @@ static int hw_clear_addr_in_paddr(ucc_geth_private_t *ugeth, u8 paddr_num) | |||
518 | } | 511 | } |
519 | 512 | ||
520 | p_82xx_addr_filt = | 513 | p_82xx_addr_filt = |
521 | (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> | 514 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> |
522 | addressfiltering; | 515 | addressfiltering; |
523 | 516 | ||
524 | /* Writing address ff.ff.ff.ff.ff.ff disables address | 517 | /* Writing address ff.ff.ff.ff.ff.ff disables address |
@@ -530,14 +523,14 @@ static int hw_clear_addr_in_paddr(ucc_geth_private_t *ugeth, u8 paddr_num) | |||
530 | return 0; | 523 | return 0; |
531 | } | 524 | } |
532 | 525 | ||
533 | static void hw_add_addr_in_hash(ucc_geth_private_t *ugeth, | 526 | static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth, |
534 | enet_addr_t *p_enet_addr) | 527 | u8 *p_enet_addr) |
535 | { | 528 | { |
536 | ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; | 529 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; |
537 | u32 cecr_subblock; | 530 | u32 cecr_subblock; |
538 | 531 | ||
539 | p_82xx_addr_filt = | 532 | p_82xx_addr_filt = |
540 | (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> | 533 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> |
541 | addressfiltering; | 534 | addressfiltering; |
542 | 535 | ||
543 | cecr_subblock = | 536 | cecr_subblock = |
@@ -546,25 +539,18 @@ static void hw_add_addr_in_hash(ucc_geth_private_t *ugeth, | |||
546 | /* Ethernet frames are defined in Little Endian mode, | 539 | /* Ethernet frames are defined in Little Endian mode, |
547 | therefor to insert */ | 540 | therefor to insert */ |
548 | /* the address to the hash (Big Endian mode), we reverse the bytes.*/ | 541 | /* the address to the hash (Big Endian mode), we reverse the bytes.*/ |
549 | out_be16(&p_82xx_addr_filt->taddr.h, | 542 | |
550 | (u16) (((u16) (((u16) ((*p_enet_addr)[5])) << 8)) | | 543 | set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr); |
551 | (u16) (*p_enet_addr)[4])); | ||
552 | out_be16(&p_82xx_addr_filt->taddr.m, | ||
553 | (u16) (((u16) (((u16) ((*p_enet_addr)[3])) << 8)) | | ||
554 | (u16) (*p_enet_addr)[2])); | ||
555 | out_be16(&p_82xx_addr_filt->taddr.l, | ||
556 | (u16) (((u16) (((u16) ((*p_enet_addr)[1])) << 8)) | | ||
557 | (u16) (*p_enet_addr)[0])); | ||
558 | 544 | ||
559 | qe_issue_cmd(QE_SET_GROUP_ADDRESS, cecr_subblock, | 545 | qe_issue_cmd(QE_SET_GROUP_ADDRESS, cecr_subblock, |
560 | (u8) QE_CR_PROTOCOL_ETHERNET, 0); | 546 | QE_CR_PROTOCOL_ETHERNET, 0); |
561 | } | 547 | } |
562 | 548 | ||
563 | #ifdef CONFIG_UGETH_MAGIC_PACKET | 549 | #ifdef CONFIG_UGETH_MAGIC_PACKET |
564 | static void magic_packet_detection_enable(ucc_geth_private_t *ugeth) | 550 | static void magic_packet_detection_enable(struct ucc_geth_private *ugeth) |
565 | { | 551 | { |
566 | ucc_fast_private_t *uccf; | 552 | struct ucc_fast_private *uccf; |
567 | ucc_geth_t *ug_regs; | 553 | struct ucc_geth *ug_regs; |
568 | u32 maccfg2, uccm; | 554 | u32 maccfg2, uccm; |
569 | 555 | ||
570 | uccf = ugeth->uccf; | 556 | uccf = ugeth->uccf; |
@@ -581,10 +567,10 @@ static void magic_packet_detection_enable(ucc_geth_private_t *ugeth) | |||
581 | out_be32(&ug_regs->maccfg2, maccfg2); | 567 | out_be32(&ug_regs->maccfg2, maccfg2); |
582 | } | 568 | } |
583 | 569 | ||
584 | static void magic_packet_detection_disable(ucc_geth_private_t *ugeth) | 570 | static void magic_packet_detection_disable(struct ucc_geth_private *ugeth) |
585 | { | 571 | { |
586 | ucc_fast_private_t *uccf; | 572 | struct ucc_fast_private *uccf; |
587 | ucc_geth_t *ug_regs; | 573 | struct ucc_geth *ug_regs; |
588 | u32 maccfg2, uccm; | 574 | u32 maccfg2, uccm; |
589 | 575 | ||
590 | uccf = ugeth->uccf; | 576 | uccf = ugeth->uccf; |
@@ -602,26 +588,26 @@ static void magic_packet_detection_disable(ucc_geth_private_t *ugeth) | |||
602 | } | 588 | } |
603 | #endif /* MAGIC_PACKET */ | 589 | #endif /* MAGIC_PACKET */ |
604 | 590 | ||
605 | static inline int compare_addr(enet_addr_t *addr1, enet_addr_t *addr2) | 591 | static inline int compare_addr(u8 **addr1, u8 **addr2) |
606 | { | 592 | { |
607 | return memcmp(addr1, addr2, ENET_NUM_OCTETS_PER_ADDRESS); | 593 | return memcmp(addr1, addr2, ENET_NUM_OCTETS_PER_ADDRESS); |
608 | } | 594 | } |
609 | 595 | ||
610 | #ifdef DEBUG | 596 | #ifdef DEBUG |
611 | static void get_statistics(ucc_geth_private_t *ugeth, | 597 | static void get_statistics(struct ucc_geth_private *ugeth, |
612 | ucc_geth_tx_firmware_statistics_t * | 598 | struct ucc_geth_tx_firmware_statistics * |
613 | tx_firmware_statistics, | 599 | tx_firmware_statistics, |
614 | ucc_geth_rx_firmware_statistics_t * | 600 | struct ucc_geth_rx_firmware_statistics * |
615 | rx_firmware_statistics, | 601 | rx_firmware_statistics, |
616 | ucc_geth_hardware_statistics_t *hardware_statistics) | 602 | struct ucc_geth_hardware_statistics *hardware_statistics) |
617 | { | 603 | { |
618 | ucc_fast_t *uf_regs; | 604 | struct ucc_fast *uf_regs; |
619 | ucc_geth_t *ug_regs; | 605 | struct ucc_geth *ug_regs; |
620 | ucc_geth_tx_firmware_statistics_pram_t *p_tx_fw_statistics_pram; | 606 | struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; |
621 | ucc_geth_rx_firmware_statistics_pram_t *p_rx_fw_statistics_pram; | 607 | struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; |
622 | 608 | ||
623 | ug_regs = ugeth->ug_regs; | 609 | ug_regs = ugeth->ug_regs; |
624 | uf_regs = (ucc_fast_t *) ug_regs; | 610 | uf_regs = (struct ucc_fast *) ug_regs; |
625 | p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; | 611 | p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; |
626 | p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; | 612 | p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; |
627 | 613 | ||
@@ -727,7 +713,7 @@ static void get_statistics(ucc_geth_private_t *ugeth, | |||
727 | } | 713 | } |
728 | } | 714 | } |
729 | 715 | ||
730 | static void dump_bds(ucc_geth_private_t *ugeth) | 716 | static void dump_bds(struct ucc_geth_private *ugeth) |
731 | { | 717 | { |
732 | int i; | 718 | int i; |
733 | int length; | 719 | int length; |
@@ -736,7 +722,7 @@ static void dump_bds(ucc_geth_private_t *ugeth) | |||
736 | if (ugeth->p_tx_bd_ring[i]) { | 722 | if (ugeth->p_tx_bd_ring[i]) { |
737 | length = | 723 | length = |
738 | (ugeth->ug_info->bdRingLenTx[i] * | 724 | (ugeth->ug_info->bdRingLenTx[i] * |
739 | UCC_GETH_SIZE_OF_BD); | 725 | sizeof(struct qe_bd)); |
740 | ugeth_info("TX BDs[%d]", i); | 726 | ugeth_info("TX BDs[%d]", i); |
741 | mem_disp(ugeth->p_tx_bd_ring[i], length); | 727 | mem_disp(ugeth->p_tx_bd_ring[i], length); |
742 | } | 728 | } |
@@ -745,14 +731,14 @@ static void dump_bds(ucc_geth_private_t *ugeth) | |||
745 | if (ugeth->p_rx_bd_ring[i]) { | 731 | if (ugeth->p_rx_bd_ring[i]) { |
746 | length = | 732 | length = |
747 | (ugeth->ug_info->bdRingLenRx[i] * | 733 | (ugeth->ug_info->bdRingLenRx[i] * |
748 | UCC_GETH_SIZE_OF_BD); | 734 | sizeof(struct qe_bd)); |
749 | ugeth_info("RX BDs[%d]", i); | 735 | ugeth_info("RX BDs[%d]", i); |
750 | mem_disp(ugeth->p_rx_bd_ring[i], length); | 736 | mem_disp(ugeth->p_rx_bd_ring[i], length); |
751 | } | 737 | } |
752 | } | 738 | } |
753 | } | 739 | } |
754 | 740 | ||
755 | static void dump_regs(ucc_geth_private_t *ugeth) | 741 | static void dump_regs(struct ucc_geth_private *ugeth) |
756 | { | 742 | { |
757 | int i; | 743 | int i; |
758 | 744 | ||
@@ -893,7 +879,7 @@ static void dump_regs(ucc_geth_private_t *ugeth) | |||
893 | ugeth_info("Base address: 0x%08x", | 879 | ugeth_info("Base address: 0x%08x", |
894 | (u32) & ugeth->p_thread_data_tx[i]); | 880 | (u32) & ugeth->p_thread_data_tx[i]); |
895 | mem_disp((u8 *) & ugeth->p_thread_data_tx[i], | 881 | mem_disp((u8 *) & ugeth->p_thread_data_tx[i], |
896 | sizeof(ucc_geth_thread_data_tx_t)); | 882 | sizeof(struct ucc_geth_thread_data_tx)); |
897 | } | 883 | } |
898 | } | 884 | } |
899 | if (ugeth->p_thread_data_rx) { | 885 | if (ugeth->p_thread_data_rx) { |
@@ -927,7 +913,7 @@ static void dump_regs(ucc_geth_private_t *ugeth) | |||
927 | ugeth_info("Base address: 0x%08x", | 913 | ugeth_info("Base address: 0x%08x", |
928 | (u32) & ugeth->p_thread_data_rx[i]); | 914 | (u32) & ugeth->p_thread_data_rx[i]); |
929 | mem_disp((u8 *) & ugeth->p_thread_data_rx[i], | 915 | mem_disp((u8 *) & ugeth->p_thread_data_rx[i], |
930 | sizeof(ucc_geth_thread_data_rx_t)); | 916 | sizeof(struct ucc_geth_thread_data_rx)); |
931 | } | 917 | } |
932 | } | 918 | } |
933 | if (ugeth->p_exf_glbl_param) { | 919 | if (ugeth->p_exf_glbl_param) { |
@@ -1105,7 +1091,7 @@ static void dump_regs(ucc_geth_private_t *ugeth) | |||
1105 | ugeth_info("Base address: 0x%08x", | 1091 | ugeth_info("Base address: 0x%08x", |
1106 | (u32) & ugeth->p_send_q_mem_reg->sqqd[i]); | 1092 | (u32) & ugeth->p_send_q_mem_reg->sqqd[i]); |
1107 | mem_disp((u8 *) & ugeth->p_send_q_mem_reg->sqqd[i], | 1093 | mem_disp((u8 *) & ugeth->p_send_q_mem_reg->sqqd[i], |
1108 | sizeof(ucc_geth_send_queue_qd_t)); | 1094 | sizeof(struct ucc_geth_send_queue_qd)); |
1109 | } | 1095 | } |
1110 | } | 1096 | } |
1111 | if (ugeth->p_scheduler) { | 1097 | if (ugeth->p_scheduler) { |
@@ -1187,7 +1173,7 @@ static void dump_regs(ucc_geth_private_t *ugeth) | |||
1187 | qe_muram_addr(in_be32 | 1173 | qe_muram_addr(in_be32 |
1188 | (&ugeth->p_rx_bd_qs_tbl[i]. | 1174 | (&ugeth->p_rx_bd_qs_tbl[i]. |
1189 | bdbaseptr)), | 1175 | bdbaseptr)), |
1190 | sizeof(ucc_geth_rx_prefetched_bds_t)); | 1176 | sizeof(struct ucc_geth_rx_prefetched_bds)); |
1191 | } | 1177 | } |
1192 | } | 1178 | } |
1193 | if (ugeth->p_init_enet_param_shadow) { | 1179 | if (ugeth->p_init_enet_param_shadow) { |
@@ -1198,7 +1184,7 @@ static void dump_regs(ucc_geth_private_t *ugeth) | |||
1198 | mem_disp((u8 *) ugeth->p_init_enet_param_shadow, | 1184 | mem_disp((u8 *) ugeth->p_init_enet_param_shadow, |
1199 | sizeof(*ugeth->p_init_enet_param_shadow)); | 1185 | sizeof(*ugeth->p_init_enet_param_shadow)); |
1200 | 1186 | ||
1201 | size = sizeof(ucc_geth_thread_rx_pram_t); | 1187 | size = sizeof(struct ucc_geth_thread_rx_pram); |
1202 | if (ugeth->ug_info->rxExtendedFiltering) { | 1188 | if (ugeth->ug_info->rxExtendedFiltering) { |
1203 | size += | 1189 | size += |
1204 | THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; | 1190 | THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; |
@@ -1216,7 +1202,7 @@ static void dump_regs(ucc_geth_private_t *ugeth) | |||
1216 | &(ugeth->p_init_enet_param_shadow-> | 1202 | &(ugeth->p_init_enet_param_shadow-> |
1217 | txthread[0]), | 1203 | txthread[0]), |
1218 | ENET_INIT_PARAM_MAX_ENTRIES_TX, | 1204 | ENET_INIT_PARAM_MAX_ENTRIES_TX, |
1219 | sizeof(ucc_geth_thread_tx_pram_t), | 1205 | sizeof(struct ucc_geth_thread_tx_pram), |
1220 | ugeth->ug_info->riscTx, 0); | 1206 | ugeth->ug_info->riscTx, 0); |
1221 | dump_init_enet_entries(ugeth, | 1207 | dump_init_enet_entries(ugeth, |
1222 | &(ugeth->p_init_enet_param_shadow-> | 1208 | &(ugeth->p_init_enet_param_shadow-> |
@@ -1578,12 +1564,12 @@ static int init_min_frame_len(u16 min_frame_length, | |||
1578 | return 0; | 1564 | return 0; |
1579 | } | 1565 | } |
1580 | 1566 | ||
1581 | static int adjust_enet_interface(ucc_geth_private_t *ugeth) | 1567 | static int adjust_enet_interface(struct ucc_geth_private *ugeth) |
1582 | { | 1568 | { |
1583 | ucc_geth_info_t *ug_info; | 1569 | struct ucc_geth_info *ug_info; |
1584 | ucc_geth_t *ug_regs; | 1570 | struct ucc_geth *ug_regs; |
1585 | ucc_fast_t *uf_regs; | 1571 | struct ucc_fast *uf_regs; |
1586 | enet_speed_e speed; | 1572 | enum enet_speed speed; |
1587 | int ret_val, rpm = 0, tbi = 0, r10m = 0, rmm = | 1573 | int ret_val, rpm = 0, tbi = 0, r10m = 0, rmm = |
1588 | 0, limited_to_full_duplex = 0; | 1574 | 0, limited_to_full_duplex = 0; |
1589 | u32 upsmr, maccfg2, utbipar, tbiBaseAddress; | 1575 | u32 upsmr, maccfg2, utbipar, tbiBaseAddress; |
@@ -1691,8 +1677,8 @@ static int adjust_enet_interface(ucc_geth_private_t *ugeth) | |||
1691 | */ | 1677 | */ |
1692 | static void adjust_link(struct net_device *dev) | 1678 | static void adjust_link(struct net_device *dev) |
1693 | { | 1679 | { |
1694 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 1680 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
1695 | ucc_geth_t *ug_regs; | 1681 | struct ucc_geth *ug_regs; |
1696 | u32 tempval; | 1682 | u32 tempval; |
1697 | struct ugeth_mii_info *mii_info = ugeth->mii_info; | 1683 | struct ugeth_mii_info *mii_info = ugeth->mii_info; |
1698 | 1684 | ||
@@ -1722,7 +1708,7 @@ static void adjust_link(struct net_device *dev) | |||
1722 | if (mii_info->speed != ugeth->oldspeed) { | 1708 | if (mii_info->speed != ugeth->oldspeed) { |
1723 | switch (mii_info->speed) { | 1709 | switch (mii_info->speed) { |
1724 | case 1000: | 1710 | case 1000: |
1725 | #ifdef CONFIG_MPC836x | 1711 | #ifdef CONFIG_PPC_MPC836x |
1726 | /* FIXME: This code is for 100Mbs BUG fixing, | 1712 | /* FIXME: This code is for 100Mbs BUG fixing, |
1727 | remove this when it is fixed!!! */ | 1713 | remove this when it is fixed!!! */ |
1728 | if (ugeth->ug_info->enet_interface == | 1714 | if (ugeth->ug_info->enet_interface == |
@@ -1768,7 +1754,7 @@ remove this when it is fixed!!! */ | |||
1768 | break; | 1754 | break; |
1769 | case 100: | 1755 | case 100: |
1770 | case 10: | 1756 | case 10: |
1771 | #ifdef CONFIG_MPC836x | 1757 | #ifdef CONFIG_PPC_MPC836x |
1772 | /* FIXME: This code is for 100Mbs BUG fixing, | 1758 | /* FIXME: This code is for 100Mbs BUG fixing, |
1773 | remove this lines when it will be fixed!!! */ | 1759 | remove this lines when it will be fixed!!! */ |
1774 | ugeth->ug_info->enet_interface = ENET_100_RGMII; | 1760 | ugeth->ug_info->enet_interface = ENET_100_RGMII; |
@@ -1827,9 +1813,9 @@ remove this lines when it will be fixed!!! */ | |||
1827 | */ | 1813 | */ |
1828 | static int init_phy(struct net_device *dev) | 1814 | static int init_phy(struct net_device *dev) |
1829 | { | 1815 | { |
1830 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 1816 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
1831 | struct phy_info *curphy; | 1817 | struct phy_info *curphy; |
1832 | ucc_mii_mng_t *mii_regs; | 1818 | struct ucc_mii_mng *mii_regs; |
1833 | struct ugeth_mii_info *mii_info; | 1819 | struct ugeth_mii_info *mii_info; |
1834 | int err; | 1820 | int err; |
1835 | 1821 | ||
@@ -1914,17 +1900,17 @@ static int init_phy(struct net_device *dev) | |||
1914 | } | 1900 | } |
1915 | 1901 | ||
1916 | #ifdef CONFIG_UGETH_TX_ON_DEMOND | 1902 | #ifdef CONFIG_UGETH_TX_ON_DEMOND |
1917 | static int ugeth_transmit_on_demand(ucc_geth_private_t *ugeth) | 1903 | static int ugeth_transmit_on_demand(struct ucc_geth_private *ugeth) |
1918 | { | 1904 | { |
1919 | ucc_fast_transmit_on_demand(ugeth->uccf); | 1905 | struct ucc_fastransmit_on_demand(ugeth->uccf); |
1920 | 1906 | ||
1921 | return 0; | 1907 | return 0; |
1922 | } | 1908 | } |
1923 | #endif | 1909 | #endif |
1924 | 1910 | ||
1925 | static int ugeth_graceful_stop_tx(ucc_geth_private_t *ugeth) | 1911 | static int ugeth_graceful_stop_tx(struct ucc_geth_private *ugeth) |
1926 | { | 1912 | { |
1927 | ucc_fast_private_t *uccf; | 1913 | struct ucc_fast_private *uccf; |
1928 | u32 cecr_subblock; | 1914 | u32 cecr_subblock; |
1929 | u32 temp; | 1915 | u32 temp; |
1930 | 1916 | ||
@@ -1940,7 +1926,7 @@ static int ugeth_graceful_stop_tx(ucc_geth_private_t *ugeth) | |||
1940 | cecr_subblock = | 1926 | cecr_subblock = |
1941 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); | 1927 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
1942 | qe_issue_cmd(QE_GRACEFUL_STOP_TX, cecr_subblock, | 1928 | qe_issue_cmd(QE_GRACEFUL_STOP_TX, cecr_subblock, |
1943 | (u8) QE_CR_PROTOCOL_ETHERNET, 0); | 1929 | QE_CR_PROTOCOL_ETHERNET, 0); |
1944 | 1930 | ||
1945 | /* Wait for command to complete */ | 1931 | /* Wait for command to complete */ |
1946 | do { | 1932 | do { |
@@ -1952,9 +1938,9 @@ static int ugeth_graceful_stop_tx(ucc_geth_private_t *ugeth) | |||
1952 | return 0; | 1938 | return 0; |
1953 | } | 1939 | } |
1954 | 1940 | ||
1955 | static int ugeth_graceful_stop_rx(ucc_geth_private_t * ugeth) | 1941 | static int ugeth_graceful_stop_rx(struct ucc_geth_private * ugeth) |
1956 | { | 1942 | { |
1957 | ucc_fast_private_t *uccf; | 1943 | struct ucc_fast_private *uccf; |
1958 | u32 cecr_subblock; | 1944 | u32 cecr_subblock; |
1959 | u8 temp; | 1945 | u8 temp; |
1960 | 1946 | ||
@@ -1973,7 +1959,7 @@ static int ugeth_graceful_stop_rx(ucc_geth_private_t * ugeth) | |||
1973 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info. | 1959 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info. |
1974 | ucc_num); | 1960 | ucc_num); |
1975 | qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, | 1961 | qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, |
1976 | (u8) QE_CR_PROTOCOL_ETHERNET, 0); | 1962 | QE_CR_PROTOCOL_ETHERNET, 0); |
1977 | 1963 | ||
1978 | temp = ugeth->p_rx_glbl_pram->rxgstpack; | 1964 | temp = ugeth->p_rx_glbl_pram->rxgstpack; |
1979 | } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX)); | 1965 | } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX)); |
@@ -1983,41 +1969,40 @@ static int ugeth_graceful_stop_rx(ucc_geth_private_t * ugeth) | |||
1983 | return 0; | 1969 | return 0; |
1984 | } | 1970 | } |
1985 | 1971 | ||
1986 | static int ugeth_restart_tx(ucc_geth_private_t *ugeth) | 1972 | static int ugeth_restart_tx(struct ucc_geth_private *ugeth) |
1987 | { | 1973 | { |
1988 | ucc_fast_private_t *uccf; | 1974 | struct ucc_fast_private *uccf; |
1989 | u32 cecr_subblock; | 1975 | u32 cecr_subblock; |
1990 | 1976 | ||
1991 | uccf = ugeth->uccf; | 1977 | uccf = ugeth->uccf; |
1992 | 1978 | ||
1993 | cecr_subblock = | 1979 | cecr_subblock = |
1994 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); | 1980 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
1995 | qe_issue_cmd(QE_RESTART_TX, cecr_subblock, (u8) QE_CR_PROTOCOL_ETHERNET, | 1981 | qe_issue_cmd(QE_RESTART_TX, cecr_subblock, QE_CR_PROTOCOL_ETHERNET, 0); |
1996 | 0); | ||
1997 | uccf->stopped_tx = 0; | 1982 | uccf->stopped_tx = 0; |
1998 | 1983 | ||
1999 | return 0; | 1984 | return 0; |
2000 | } | 1985 | } |
2001 | 1986 | ||
2002 | static int ugeth_restart_rx(ucc_geth_private_t *ugeth) | 1987 | static int ugeth_restart_rx(struct ucc_geth_private *ugeth) |
2003 | { | 1988 | { |
2004 | ucc_fast_private_t *uccf; | 1989 | struct ucc_fast_private *uccf; |
2005 | u32 cecr_subblock; | 1990 | u32 cecr_subblock; |
2006 | 1991 | ||
2007 | uccf = ugeth->uccf; | 1992 | uccf = ugeth->uccf; |
2008 | 1993 | ||
2009 | cecr_subblock = | 1994 | cecr_subblock = |
2010 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); | 1995 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
2011 | qe_issue_cmd(QE_RESTART_RX, cecr_subblock, (u8) QE_CR_PROTOCOL_ETHERNET, | 1996 | qe_issue_cmd(QE_RESTART_RX, cecr_subblock, QE_CR_PROTOCOL_ETHERNET, |
2012 | 0); | 1997 | 0); |
2013 | uccf->stopped_rx = 0; | 1998 | uccf->stopped_rx = 0; |
2014 | 1999 | ||
2015 | return 0; | 2000 | return 0; |
2016 | } | 2001 | } |
2017 | 2002 | ||
2018 | static int ugeth_enable(ucc_geth_private_t *ugeth, comm_dir_e mode) | 2003 | static int ugeth_enable(struct ucc_geth_private *ugeth, enum comm_dir mode) |
2019 | { | 2004 | { |
2020 | ucc_fast_private_t *uccf; | 2005 | struct ucc_fast_private *uccf; |
2021 | int enabled_tx, enabled_rx; | 2006 | int enabled_tx, enabled_rx; |
2022 | 2007 | ||
2023 | uccf = ugeth->uccf; | 2008 | uccf = ugeth->uccf; |
@@ -2044,9 +2029,9 @@ static int ugeth_enable(ucc_geth_private_t *ugeth, comm_dir_e mode) | |||
2044 | 2029 | ||
2045 | } | 2030 | } |
2046 | 2031 | ||
2047 | static int ugeth_disable(ucc_geth_private_t * ugeth, comm_dir_e mode) | 2032 | static int ugeth_disable(struct ucc_geth_private * ugeth, enum comm_dir mode) |
2048 | { | 2033 | { |
2049 | ucc_fast_private_t *uccf; | 2034 | struct ucc_fast_private *uccf; |
2050 | 2035 | ||
2051 | uccf = ugeth->uccf; | 2036 | uccf = ugeth->uccf; |
2052 | 2037 | ||
@@ -2069,7 +2054,7 @@ static int ugeth_disable(ucc_geth_private_t * ugeth, comm_dir_e mode) | |||
2069 | return 0; | 2054 | return 0; |
2070 | } | 2055 | } |
2071 | 2056 | ||
2072 | static void ugeth_dump_regs(ucc_geth_private_t *ugeth) | 2057 | static void ugeth_dump_regs(struct ucc_geth_private *ugeth) |
2073 | { | 2058 | { |
2074 | #ifdef DEBUG | 2059 | #ifdef DEBUG |
2075 | ucc_fast_dump_regs(ugeth->uccf); | 2060 | ucc_fast_dump_regs(ugeth->uccf); |
@@ -2079,9 +2064,9 @@ static void ugeth_dump_regs(ucc_geth_private_t *ugeth) | |||
2079 | } | 2064 | } |
2080 | 2065 | ||
2081 | #ifdef CONFIG_UGETH_FILTERING | 2066 | #ifdef CONFIG_UGETH_FILTERING |
2082 | static int ugeth_ext_filtering_serialize_tad(ucc_geth_tad_params_t * | 2067 | static int ugeth_ext_filtering_serialize_tad(struct ucc_geth_tad_params * |
2083 | p_UccGethTadParams, | 2068 | p_UccGethTadParams, |
2084 | qe_fltr_tad_t *qe_fltr_tad) | 2069 | struct qe_fltr_tad *qe_fltr_tad) |
2085 | { | 2070 | { |
2086 | u16 temp; | 2071 | u16 temp; |
2087 | 2072 | ||
@@ -2119,11 +2104,11 @@ static int ugeth_ext_filtering_serialize_tad(ucc_geth_tad_params_t * | |||
2119 | return 0; | 2104 | return 0; |
2120 | } | 2105 | } |
2121 | 2106 | ||
2122 | static enet_addr_container_t | 2107 | static struct enet_addr_container_t |
2123 | *ugeth_82xx_filtering_get_match_addr_in_hash(ucc_geth_private_t *ugeth, | 2108 | *ugeth_82xx_filtering_get_match_addr_in_hash(struct ucc_geth_private *ugeth, |
2124 | enet_addr_t *p_enet_addr) | 2109 | struct enet_addr *p_enet_addr) |
2125 | { | 2110 | { |
2126 | enet_addr_container_t *enet_addr_cont; | 2111 | struct enet_addr_container *enet_addr_cont; |
2127 | struct list_head *p_lh; | 2112 | struct list_head *p_lh; |
2128 | u16 i, num; | 2113 | u16 i, num; |
2129 | int32_t j; | 2114 | int32_t j; |
@@ -2144,7 +2129,7 @@ static enet_addr_container_t | |||
2144 | 2129 | ||
2145 | for (i = 0; i < num; i++) { | 2130 | for (i = 0; i < num; i++) { |
2146 | enet_addr_cont = | 2131 | enet_addr_cont = |
2147 | (enet_addr_container_t *) | 2132 | (struct enet_addr_container *) |
2148 | ENET_ADDR_CONT_ENTRY(dequeue(p_lh)); | 2133 | ENET_ADDR_CONT_ENTRY(dequeue(p_lh)); |
2149 | for (j = ENET_NUM_OCTETS_PER_ADDRESS - 1; j >= 0; j--) { | 2134 | for (j = ENET_NUM_OCTETS_PER_ADDRESS - 1; j >= 0; j--) { |
2150 | if ((*p_enet_addr)[j] != (enet_addr_cont->address)[j]) | 2135 | if ((*p_enet_addr)[j] != (enet_addr_cont->address)[j]) |
@@ -2157,11 +2142,11 @@ static enet_addr_container_t | |||
2157 | return NULL; | 2142 | return NULL; |
2158 | } | 2143 | } |
2159 | 2144 | ||
2160 | static int ugeth_82xx_filtering_add_addr_in_hash(ucc_geth_private_t *ugeth, | 2145 | static int ugeth_82xx_filtering_add_addr_in_hash(struct ucc_geth_private *ugeth, |
2161 | enet_addr_t *p_enet_addr) | 2146 | struct enet_addr *p_enet_addr) |
2162 | { | 2147 | { |
2163 | ucc_geth_enet_address_recognition_location_e location; | 2148 | enum ucc_geth_enet_address_recognition_location location; |
2164 | enet_addr_container_t *enet_addr_cont; | 2149 | struct enet_addr_container *enet_addr_cont; |
2165 | struct list_head *p_lh; | 2150 | struct list_head *p_lh; |
2166 | u8 i; | 2151 | u8 i; |
2167 | u32 limit; | 2152 | u32 limit; |
@@ -2196,18 +2181,17 @@ static int ugeth_82xx_filtering_add_addr_in_hash(ucc_geth_private_t *ugeth, | |||
2196 | enqueue(p_lh, &enet_addr_cont->node); /* Put it back */ | 2181 | enqueue(p_lh, &enet_addr_cont->node); /* Put it back */ |
2197 | ++(*p_counter); | 2182 | ++(*p_counter); |
2198 | 2183 | ||
2199 | hw_add_addr_in_hash(ugeth, &(enet_addr_cont->address)); | 2184 | hw_add_addr_in_hash(ugeth, enet_addr_cont->address); |
2200 | |||
2201 | return 0; | 2185 | return 0; |
2202 | } | 2186 | } |
2203 | 2187 | ||
2204 | static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth, | 2188 | static int ugeth_82xx_filtering_clear_addr_in_hash(struct ucc_geth_private *ugeth, |
2205 | enet_addr_t *p_enet_addr) | 2189 | struct enet_addr *p_enet_addr) |
2206 | { | 2190 | { |
2207 | ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; | 2191 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; |
2208 | enet_addr_container_t *enet_addr_cont; | 2192 | struct enet_addr_container *enet_addr_cont; |
2209 | ucc_fast_private_t *uccf; | 2193 | struct ucc_fast_private *uccf; |
2210 | comm_dir_e comm_dir; | 2194 | enum comm_dir comm_dir; |
2211 | u16 i, num; | 2195 | u16 i, num; |
2212 | struct list_head *p_lh; | 2196 | struct list_head *p_lh; |
2213 | u32 *addr_h, *addr_l; | 2197 | u32 *addr_h, *addr_l; |
@@ -2216,7 +2200,7 @@ static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth, | |||
2216 | uccf = ugeth->uccf; | 2200 | uccf = ugeth->uccf; |
2217 | 2201 | ||
2218 | p_82xx_addr_filt = | 2202 | p_82xx_addr_filt = |
2219 | (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> | 2203 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> |
2220 | addressfiltering; | 2204 | addressfiltering; |
2221 | 2205 | ||
2222 | if (! | 2206 | if (! |
@@ -2256,9 +2240,9 @@ static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth, | |||
2256 | num = --(*p_counter); | 2240 | num = --(*p_counter); |
2257 | for (i = 0; i < num; i++) { | 2241 | for (i = 0; i < num; i++) { |
2258 | enet_addr_cont = | 2242 | enet_addr_cont = |
2259 | (enet_addr_container_t *) | 2243 | (struct enet_addr_container *) |
2260 | ENET_ADDR_CONT_ENTRY(dequeue(p_lh)); | 2244 | ENET_ADDR_CONT_ENTRY(dequeue(p_lh)); |
2261 | hw_add_addr_in_hash(ugeth, &(enet_addr_cont->address)); | 2245 | hw_add_addr_in_hash(ugeth, enet_addr_cont->address); |
2262 | enqueue(p_lh, &enet_addr_cont->node); /* Put it back */ | 2246 | enqueue(p_lh, &enet_addr_cont->node); /* Put it back */ |
2263 | } | 2247 | } |
2264 | 2248 | ||
@@ -2269,14 +2253,14 @@ static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth, | |||
2269 | } | 2253 | } |
2270 | #endif /* CONFIG_UGETH_FILTERING */ | 2254 | #endif /* CONFIG_UGETH_FILTERING */ |
2271 | 2255 | ||
2272 | static int ugeth_82xx_filtering_clear_all_addr_in_hash(ucc_geth_private_t * | 2256 | static int ugeth_82xx_filtering_clear_all_addr_in_hash(struct ucc_geth_private * |
2273 | ugeth, | 2257 | ugeth, |
2274 | enet_addr_type_e | 2258 | enum enet_addr_type |
2275 | enet_addr_type) | 2259 | enet_addr_type) |
2276 | { | 2260 | { |
2277 | ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; | 2261 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; |
2278 | ucc_fast_private_t *uccf; | 2262 | struct ucc_fast_private *uccf; |
2279 | comm_dir_e comm_dir; | 2263 | enum comm_dir comm_dir; |
2280 | struct list_head *p_lh; | 2264 | struct list_head *p_lh; |
2281 | u16 i, num; | 2265 | u16 i, num; |
2282 | u32 *addr_h, *addr_l; | 2266 | u32 *addr_h, *addr_l; |
@@ -2285,7 +2269,7 @@ static int ugeth_82xx_filtering_clear_all_addr_in_hash(ucc_geth_private_t * | |||
2285 | uccf = ugeth->uccf; | 2269 | uccf = ugeth->uccf; |
2286 | 2270 | ||
2287 | p_82xx_addr_filt = | 2271 | p_82xx_addr_filt = |
2288 | (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> | 2272 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> |
2289 | addressfiltering; | 2273 | addressfiltering; |
2290 | 2274 | ||
2291 | if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { | 2275 | if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { |
@@ -2331,8 +2315,8 @@ static int ugeth_82xx_filtering_clear_all_addr_in_hash(ucc_geth_private_t * | |||
2331 | } | 2315 | } |
2332 | 2316 | ||
2333 | #ifdef CONFIG_UGETH_FILTERING | 2317 | #ifdef CONFIG_UGETH_FILTERING |
2334 | static int ugeth_82xx_filtering_add_addr_in_paddr(ucc_geth_private_t *ugeth, | 2318 | static int ugeth_82xx_filtering_add_addr_in_paddr(struct ucc_geth_private *ugeth, |
2335 | enet_addr_t *p_enet_addr, | 2319 | struct enet_addr *p_enet_addr, |
2336 | u8 paddr_num) | 2320 | u8 paddr_num) |
2337 | { | 2321 | { |
2338 | int i; | 2322 | int i; |
@@ -2352,14 +2336,14 @@ static int ugeth_82xx_filtering_add_addr_in_paddr(ucc_geth_private_t *ugeth, | |||
2352 | } | 2336 | } |
2353 | #endif /* CONFIG_UGETH_FILTERING */ | 2337 | #endif /* CONFIG_UGETH_FILTERING */ |
2354 | 2338 | ||
2355 | static int ugeth_82xx_filtering_clear_addr_in_paddr(ucc_geth_private_t *ugeth, | 2339 | static int ugeth_82xx_filtering_clear_addr_in_paddr(struct ucc_geth_private *ugeth, |
2356 | u8 paddr_num) | 2340 | u8 paddr_num) |
2357 | { | 2341 | { |
2358 | ugeth->indAddrRegUsed[paddr_num] = 0; /* mark this paddr as not used */ | 2342 | ugeth->indAddrRegUsed[paddr_num] = 0; /* mark this paddr as not used */ |
2359 | return hw_clear_addr_in_paddr(ugeth, paddr_num);/* clear in hardware */ | 2343 | return hw_clear_addr_in_paddr(ugeth, paddr_num);/* clear in hardware */ |
2360 | } | 2344 | } |
2361 | 2345 | ||
2362 | static void ucc_geth_memclean(ucc_geth_private_t *ugeth) | 2346 | static void ucc_geth_memclean(struct ucc_geth_private *ugeth) |
2363 | { | 2347 | { |
2364 | u16 i, j; | 2348 | u16 i, j; |
2365 | u8 *bd; | 2349 | u8 *bd; |
@@ -2433,8 +2417,8 @@ static void ucc_geth_memclean(ucc_geth_private_t *ugeth) | |||
2433 | for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { | 2417 | for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { |
2434 | if (ugeth->tx_skbuff[i][j]) { | 2418 | if (ugeth->tx_skbuff[i][j]) { |
2435 | dma_unmap_single(NULL, | 2419 | dma_unmap_single(NULL, |
2436 | BD_BUFFER_ARG(bd), | 2420 | ((qe_bd_t *)bd)->buf, |
2437 | (BD_STATUS_AND_LENGTH(bd) & | 2421 | (in_be32((u32 *)bd) & |
2438 | BD_LENGTH_MASK), | 2422 | BD_LENGTH_MASK), |
2439 | DMA_TO_DEVICE); | 2423 | DMA_TO_DEVICE); |
2440 | dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); | 2424 | dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); |
@@ -2460,18 +2444,17 @@ static void ucc_geth_memclean(ucc_geth_private_t *ugeth) | |||
2460 | bd = ugeth->p_rx_bd_ring[i]; | 2444 | bd = ugeth->p_rx_bd_ring[i]; |
2461 | for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { | 2445 | for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { |
2462 | if (ugeth->rx_skbuff[i][j]) { | 2446 | if (ugeth->rx_skbuff[i][j]) { |
2463 | dma_unmap_single(NULL, BD_BUFFER(bd), | 2447 | dma_unmap_single(NULL, |
2464 | ugeth->ug_info-> | 2448 | ((struct qe_bd *)bd)->buf, |
2465 | uf_info. | 2449 | ugeth->ug_info-> |
2466 | max_rx_buf_length + | 2450 | uf_info.max_rx_buf_length + |
2467 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, | 2451 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, |
2468 | DMA_FROM_DEVICE); | 2452 | DMA_FROM_DEVICE); |
2469 | 2453 | dev_kfree_skb_any( | |
2470 | dev_kfree_skb_any(ugeth-> | 2454 | ugeth->rx_skbuff[i][j]); |
2471 | rx_skbuff[i][j]); | ||
2472 | ugeth->rx_skbuff[i][j] = NULL; | 2455 | ugeth->rx_skbuff[i][j] = NULL; |
2473 | } | 2456 | } |
2474 | bd += UCC_GETH_SIZE_OF_BD; | 2457 | bd += sizeof(struct qe_bd); |
2475 | } | 2458 | } |
2476 | 2459 | ||
2477 | kfree(ugeth->rx_skbuff[i]); | 2460 | kfree(ugeth->rx_skbuff[i]); |
@@ -2496,11 +2479,11 @@ static void ucc_geth_memclean(ucc_geth_private_t *ugeth) | |||
2496 | 2479 | ||
2497 | static void ucc_geth_set_multi(struct net_device *dev) | 2480 | static void ucc_geth_set_multi(struct net_device *dev) |
2498 | { | 2481 | { |
2499 | ucc_geth_private_t *ugeth; | 2482 | struct ucc_geth_private *ugeth; |
2500 | struct dev_mc_list *dmi; | 2483 | struct dev_mc_list *dmi; |
2501 | ucc_fast_t *uf_regs; | 2484 | struct ucc_fast *uf_regs; |
2502 | ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; | 2485 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; |
2503 | enet_addr_t tempaddr; | 2486 | u8 tempaddr[6]; |
2504 | u8 *mcptr, *tdptr; | 2487 | u8 *mcptr, *tdptr; |
2505 | int i, j; | 2488 | int i, j; |
2506 | 2489 | ||
@@ -2517,7 +2500,7 @@ static void ucc_geth_set_multi(struct net_device *dev) | |||
2517 | uf_regs->upsmr &= ~UPSMR_PRO; | 2500 | uf_regs->upsmr &= ~UPSMR_PRO; |
2518 | 2501 | ||
2519 | p_82xx_addr_filt = | 2502 | p_82xx_addr_filt = |
2520 | (ucc_geth_82xx_address_filtering_pram_t *) ugeth-> | 2503 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> |
2521 | p_rx_glbl_pram->addressfiltering; | 2504 | p_rx_glbl_pram->addressfiltering; |
2522 | 2505 | ||
2523 | if (dev->flags & IFF_ALLMULTI) { | 2506 | if (dev->flags & IFF_ALLMULTI) { |
@@ -2546,23 +2529,22 @@ static void ucc_geth_set_multi(struct net_device *dev) | |||
2546 | * copy bytes MSB first from dmi_addr. | 2529 | * copy bytes MSB first from dmi_addr. |
2547 | */ | 2530 | */ |
2548 | mcptr = (u8 *) dmi->dmi_addr + 5; | 2531 | mcptr = (u8 *) dmi->dmi_addr + 5; |
2549 | tdptr = (u8 *) & tempaddr; | 2532 | tdptr = (u8 *) tempaddr; |
2550 | for (j = 0; j < 6; j++) | 2533 | for (j = 0; j < 6; j++) |
2551 | *tdptr++ = *mcptr--; | 2534 | *tdptr++ = *mcptr--; |
2552 | 2535 | ||
2553 | /* Ask CPM to run CRC and set bit in | 2536 | /* Ask CPM to run CRC and set bit in |
2554 | * filter mask. | 2537 | * filter mask. |
2555 | */ | 2538 | */ |
2556 | hw_add_addr_in_hash(ugeth, &tempaddr); | 2539 | hw_add_addr_in_hash(ugeth, tempaddr); |
2557 | |||
2558 | } | 2540 | } |
2559 | } | 2541 | } |
2560 | } | 2542 | } |
2561 | } | 2543 | } |
2562 | 2544 | ||
2563 | static void ucc_geth_stop(ucc_geth_private_t *ugeth) | 2545 | static void ucc_geth_stop(struct ucc_geth_private *ugeth) |
2564 | { | 2546 | { |
2565 | ucc_geth_t *ug_regs = ugeth->ug_regs; | 2547 | struct ucc_geth *ug_regs = ugeth->ug_regs; |
2566 | u32 tempval; | 2548 | u32 tempval; |
2567 | 2549 | ||
2568 | ugeth_vdbg("%s: IN", __FUNCTION__); | 2550 | ugeth_vdbg("%s: IN", __FUNCTION__); |
@@ -2605,15 +2587,15 @@ static void ucc_geth_stop(ucc_geth_private_t *ugeth) | |||
2605 | ucc_geth_memclean(ugeth); | 2587 | ucc_geth_memclean(ugeth); |
2606 | } | 2588 | } |
2607 | 2589 | ||
2608 | static int ucc_geth_startup(ucc_geth_private_t *ugeth) | 2590 | static int ucc_geth_startup(struct ucc_geth_private *ugeth) |
2609 | { | 2591 | { |
2610 | ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; | 2592 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; |
2611 | ucc_geth_init_pram_t *p_init_enet_pram; | 2593 | struct ucc_geth_init_pram *p_init_enet_pram; |
2612 | ucc_fast_private_t *uccf; | 2594 | struct ucc_fast_private *uccf; |
2613 | ucc_geth_info_t *ug_info; | 2595 | struct ucc_geth_info *ug_info; |
2614 | ucc_fast_info_t *uf_info; | 2596 | struct ucc_fast_info *uf_info; |
2615 | ucc_fast_t *uf_regs; | 2597 | struct ucc_fast *uf_regs; |
2616 | ucc_geth_t *ug_regs; | 2598 | struct ucc_geth *ug_regs; |
2617 | int ret_val = -EINVAL; | 2599 | int ret_val = -EINVAL; |
2618 | u32 remoder = UCC_GETH_REMODER_INIT; | 2600 | u32 remoder = UCC_GETH_REMODER_INIT; |
2619 | u32 init_enet_pram_offset, cecr_subblock, command, maccfg1; | 2601 | u32 init_enet_pram_offset, cecr_subblock, command, maccfg1; |
@@ -2788,7 +2770,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
2788 | UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP); | 2770 | UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP); |
2789 | 2771 | ||
2790 | uf_regs = uccf->uf_regs; | 2772 | uf_regs = uccf->uf_regs; |
2791 | ug_regs = (ucc_geth_t *) (uccf->uf_regs); | 2773 | ug_regs = (struct ucc_geth *) (uccf->uf_regs); |
2792 | ugeth->ug_regs = ug_regs; | 2774 | ugeth->ug_regs = ug_regs; |
2793 | 2775 | ||
2794 | init_default_reg_vals(&uf_regs->upsmr, | 2776 | init_default_reg_vals(&uf_regs->upsmr, |
@@ -2869,10 +2851,10 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
2869 | /* Allocate in multiple of | 2851 | /* Allocate in multiple of |
2870 | UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT, | 2852 | UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT, |
2871 | according to spec */ | 2853 | according to spec */ |
2872 | length = ((ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD) | 2854 | length = ((ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)) |
2873 | / UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) | 2855 | / UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) |
2874 | * UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; | 2856 | * UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; |
2875 | if ((ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD) % | 2857 | if ((ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)) % |
2876 | UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) | 2858 | UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) |
2877 | length += UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; | 2859 | length += UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; |
2878 | if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { | 2860 | if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { |
@@ -2904,13 +2886,13 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
2904 | } | 2886 | } |
2905 | /* Zero unused end of bd ring, according to spec */ | 2887 | /* Zero unused end of bd ring, according to spec */ |
2906 | memset(ugeth->p_tx_bd_ring[j] + | 2888 | memset(ugeth->p_tx_bd_ring[j] + |
2907 | ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD, 0, | 2889 | ug_info->bdRingLenTx[j] * sizeof(struct qe_bd), 0, |
2908 | length - ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD); | 2890 | length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)); |
2909 | } | 2891 | } |
2910 | 2892 | ||
2911 | /* Allocate Rx bds */ | 2893 | /* Allocate Rx bds */ |
2912 | for (j = 0; j < ug_info->numQueuesRx; j++) { | 2894 | for (j = 0; j < ug_info->numQueuesRx; j++) { |
2913 | length = ug_info->bdRingLenRx[j] * UCC_GETH_SIZE_OF_BD; | 2895 | length = ug_info->bdRingLenRx[j] * sizeof(struct qe_bd); |
2914 | if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { | 2896 | if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { |
2915 | u32 align = 4; | 2897 | u32 align = 4; |
2916 | if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) | 2898 | if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) |
@@ -2960,12 +2942,15 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
2960 | ugeth->skb_curtx[j] = ugeth->skb_dirtytx[j] = 0; | 2942 | ugeth->skb_curtx[j] = ugeth->skb_dirtytx[j] = 0; |
2961 | bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; | 2943 | bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; |
2962 | for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { | 2944 | for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { |
2963 | BD_BUFFER_CLEAR(bd); | 2945 | /* clear bd buffer */ |
2964 | BD_STATUS_AND_LENGTH_SET(bd, 0); | 2946 | out_be32(&((struct qe_bd *)bd)->buf, 0); |
2965 | bd += UCC_GETH_SIZE_OF_BD; | 2947 | /* set bd status and length */ |
2948 | out_be32((u32 *)bd, 0); | ||
2949 | bd += sizeof(struct qe_bd); | ||
2966 | } | 2950 | } |
2967 | bd -= UCC_GETH_SIZE_OF_BD; | 2951 | bd -= sizeof(struct qe_bd); |
2968 | BD_STATUS_AND_LENGTH_SET(bd, T_W);/* for last BD set Wrap bit */ | 2952 | /* set bd status and length */ |
2953 | out_be32((u32 *)bd, T_W); /* for last BD set Wrap bit */ | ||
2969 | } | 2954 | } |
2970 | 2955 | ||
2971 | /* Init Rx bds */ | 2956 | /* Init Rx bds */ |
@@ -2989,12 +2974,15 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
2989 | ugeth->skb_currx[j] = 0; | 2974 | ugeth->skb_currx[j] = 0; |
2990 | bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; | 2975 | bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; |
2991 | for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { | 2976 | for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { |
2992 | BD_STATUS_AND_LENGTH_SET(bd, R_I); | 2977 | /* set bd status and length */ |
2993 | BD_BUFFER_CLEAR(bd); | 2978 | out_be32((u32 *)bd, R_I); |
2994 | bd += UCC_GETH_SIZE_OF_BD; | 2979 | /* clear bd buffer */ |
2980 | out_be32(&((struct qe_bd *)bd)->buf, 0); | ||
2981 | bd += sizeof(struct qe_bd); | ||
2995 | } | 2982 | } |
2996 | bd -= UCC_GETH_SIZE_OF_BD; | 2983 | bd -= sizeof(struct qe_bd); |
2997 | BD_STATUS_AND_LENGTH_SET(bd, R_W);/* for last BD set Wrap bit */ | 2984 | /* set bd status and length */ |
2985 | out_be32((u32 *)bd, R_W); /* for last BD set Wrap bit */ | ||
2998 | } | 2986 | } |
2999 | 2987 | ||
3000 | /* | 2988 | /* |
@@ -3003,7 +2991,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3003 | /* Tx global PRAM */ | 2991 | /* Tx global PRAM */ |
3004 | /* Allocate global tx parameter RAM page */ | 2992 | /* Allocate global tx parameter RAM page */ |
3005 | ugeth->tx_glbl_pram_offset = | 2993 | ugeth->tx_glbl_pram_offset = |
3006 | qe_muram_alloc(sizeof(ucc_geth_tx_global_pram_t), | 2994 | qe_muram_alloc(sizeof(struct ucc_geth_tx_global_pram), |
3007 | UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT); | 2995 | UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT); |
3008 | if (IS_MURAM_ERR(ugeth->tx_glbl_pram_offset)) { | 2996 | if (IS_MURAM_ERR(ugeth->tx_glbl_pram_offset)) { |
3009 | ugeth_err | 2997 | ugeth_err |
@@ -3013,10 +3001,10 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3013 | return -ENOMEM; | 3001 | return -ENOMEM; |
3014 | } | 3002 | } |
3015 | ugeth->p_tx_glbl_pram = | 3003 | ugeth->p_tx_glbl_pram = |
3016 | (ucc_geth_tx_global_pram_t *) qe_muram_addr(ugeth-> | 3004 | (struct ucc_geth_tx_global_pram *) qe_muram_addr(ugeth-> |
3017 | tx_glbl_pram_offset); | 3005 | tx_glbl_pram_offset); |
3018 | /* Zero out p_tx_glbl_pram */ | 3006 | /* Zero out p_tx_glbl_pram */ |
3019 | memset(ugeth->p_tx_glbl_pram, 0, sizeof(ucc_geth_tx_global_pram_t)); | 3007 | memset(ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram)); |
3020 | 3008 | ||
3021 | /* Fill global PRAM */ | 3009 | /* Fill global PRAM */ |
3022 | 3010 | ||
@@ -3024,7 +3012,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3024 | /* Size varies with number of Tx threads */ | 3012 | /* Size varies with number of Tx threads */ |
3025 | ugeth->thread_dat_tx_offset = | 3013 | ugeth->thread_dat_tx_offset = |
3026 | qe_muram_alloc(numThreadsTxNumerical * | 3014 | qe_muram_alloc(numThreadsTxNumerical * |
3027 | sizeof(ucc_geth_thread_data_tx_t) + | 3015 | sizeof(struct ucc_geth_thread_data_tx) + |
3028 | 32 * (numThreadsTxNumerical == 1), | 3016 | 32 * (numThreadsTxNumerical == 1), |
3029 | UCC_GETH_THREAD_DATA_ALIGNMENT); | 3017 | UCC_GETH_THREAD_DATA_ALIGNMENT); |
3030 | if (IS_MURAM_ERR(ugeth->thread_dat_tx_offset)) { | 3018 | if (IS_MURAM_ERR(ugeth->thread_dat_tx_offset)) { |
@@ -3036,7 +3024,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3036 | } | 3024 | } |
3037 | 3025 | ||
3038 | ugeth->p_thread_data_tx = | 3026 | ugeth->p_thread_data_tx = |
3039 | (ucc_geth_thread_data_tx_t *) qe_muram_addr(ugeth-> | 3027 | (struct ucc_geth_thread_data_tx *) qe_muram_addr(ugeth-> |
3040 | thread_dat_tx_offset); | 3028 | thread_dat_tx_offset); |
3041 | out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); | 3029 | out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); |
3042 | 3030 | ||
@@ -3053,7 +3041,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3053 | /* Size varies with number of Tx queues */ | 3041 | /* Size varies with number of Tx queues */ |
3054 | ugeth->send_q_mem_reg_offset = | 3042 | ugeth->send_q_mem_reg_offset = |
3055 | qe_muram_alloc(ug_info->numQueuesTx * | 3043 | qe_muram_alloc(ug_info->numQueuesTx * |
3056 | sizeof(ucc_geth_send_queue_qd_t), | 3044 | sizeof(struct ucc_geth_send_queue_qd), |
3057 | UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT); | 3045 | UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT); |
3058 | if (IS_MURAM_ERR(ugeth->send_q_mem_reg_offset)) { | 3046 | if (IS_MURAM_ERR(ugeth->send_q_mem_reg_offset)) { |
3059 | ugeth_err | 3047 | ugeth_err |
@@ -3064,7 +3052,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3064 | } | 3052 | } |
3065 | 3053 | ||
3066 | ugeth->p_send_q_mem_reg = | 3054 | ugeth->p_send_q_mem_reg = |
3067 | (ucc_geth_send_queue_mem_region_t *) qe_muram_addr(ugeth-> | 3055 | (struct ucc_geth_send_queue_mem_region *) qe_muram_addr(ugeth-> |
3068 | send_q_mem_reg_offset); | 3056 | send_q_mem_reg_offset); |
3069 | out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); | 3057 | out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); |
3070 | 3058 | ||
@@ -3073,7 +3061,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3073 | for (i = 0; i < ug_info->numQueuesTx; i++) { | 3061 | for (i = 0; i < ug_info->numQueuesTx; i++) { |
3074 | endOfRing = | 3062 | endOfRing = |
3075 | ugeth->p_tx_bd_ring[i] + (ug_info->bdRingLenTx[i] - | 3063 | ugeth->p_tx_bd_ring[i] + (ug_info->bdRingLenTx[i] - |
3076 | 1) * UCC_GETH_SIZE_OF_BD; | 3064 | 1) * sizeof(struct qe_bd); |
3077 | if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) { | 3065 | if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) { |
3078 | out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, | 3066 | out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, |
3079 | (u32) virt_to_phys(ugeth->p_tx_bd_ring[i])); | 3067 | (u32) virt_to_phys(ugeth->p_tx_bd_ring[i])); |
@@ -3096,7 +3084,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3096 | if (ug_info->numQueuesTx > 1) { | 3084 | if (ug_info->numQueuesTx > 1) { |
3097 | /* scheduler exists only if more than 1 tx queue */ | 3085 | /* scheduler exists only if more than 1 tx queue */ |
3098 | ugeth->scheduler_offset = | 3086 | ugeth->scheduler_offset = |
3099 | qe_muram_alloc(sizeof(ucc_geth_scheduler_t), | 3087 | qe_muram_alloc(sizeof(struct ucc_geth_scheduler), |
3100 | UCC_GETH_SCHEDULER_ALIGNMENT); | 3088 | UCC_GETH_SCHEDULER_ALIGNMENT); |
3101 | if (IS_MURAM_ERR(ugeth->scheduler_offset)) { | 3089 | if (IS_MURAM_ERR(ugeth->scheduler_offset)) { |
3102 | ugeth_err | 3090 | ugeth_err |
@@ -3107,12 +3095,12 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3107 | } | 3095 | } |
3108 | 3096 | ||
3109 | ugeth->p_scheduler = | 3097 | ugeth->p_scheduler = |
3110 | (ucc_geth_scheduler_t *) qe_muram_addr(ugeth-> | 3098 | (struct ucc_geth_scheduler *) qe_muram_addr(ugeth-> |
3111 | scheduler_offset); | 3099 | scheduler_offset); |
3112 | out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, | 3100 | out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, |
3113 | ugeth->scheduler_offset); | 3101 | ugeth->scheduler_offset); |
3114 | /* Zero out p_scheduler */ | 3102 | /* Zero out p_scheduler */ |
3115 | memset(ugeth->p_scheduler, 0, sizeof(ucc_geth_scheduler_t)); | 3103 | memset(ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler)); |
3116 | 3104 | ||
3117 | /* Set values in scheduler */ | 3105 | /* Set values in scheduler */ |
3118 | out_be32(&ugeth->p_scheduler->mblinterval, | 3106 | out_be32(&ugeth->p_scheduler->mblinterval, |
@@ -3144,7 +3132,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3144 | statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX) { | 3132 | statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX) { |
3145 | ugeth->tx_fw_statistics_pram_offset = | 3133 | ugeth->tx_fw_statistics_pram_offset = |
3146 | qe_muram_alloc(sizeof | 3134 | qe_muram_alloc(sizeof |
3147 | (ucc_geth_tx_firmware_statistics_pram_t), | 3135 | (struct ucc_geth_tx_firmware_statistics_pram), |
3148 | UCC_GETH_TX_STATISTICS_ALIGNMENT); | 3136 | UCC_GETH_TX_STATISTICS_ALIGNMENT); |
3149 | if (IS_MURAM_ERR(ugeth->tx_fw_statistics_pram_offset)) { | 3137 | if (IS_MURAM_ERR(ugeth->tx_fw_statistics_pram_offset)) { |
3150 | ugeth_err | 3138 | ugeth_err |
@@ -3154,11 +3142,11 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3154 | return -ENOMEM; | 3142 | return -ENOMEM; |
3155 | } | 3143 | } |
3156 | ugeth->p_tx_fw_statistics_pram = | 3144 | ugeth->p_tx_fw_statistics_pram = |
3157 | (ucc_geth_tx_firmware_statistics_pram_t *) | 3145 | (struct ucc_geth_tx_firmware_statistics_pram *) |
3158 | qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); | 3146 | qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); |
3159 | /* Zero out p_tx_fw_statistics_pram */ | 3147 | /* Zero out p_tx_fw_statistics_pram */ |
3160 | memset(ugeth->p_tx_fw_statistics_pram, | 3148 | memset(ugeth->p_tx_fw_statistics_pram, |
3161 | 0, sizeof(ucc_geth_tx_firmware_statistics_pram_t)); | 3149 | 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram)); |
3162 | } | 3150 | } |
3163 | 3151 | ||
3164 | /* temoder */ | 3152 | /* temoder */ |
@@ -3183,7 +3171,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3183 | /* Rx global PRAM */ | 3171 | /* Rx global PRAM */ |
3184 | /* Allocate global rx parameter RAM page */ | 3172 | /* Allocate global rx parameter RAM page */ |
3185 | ugeth->rx_glbl_pram_offset = | 3173 | ugeth->rx_glbl_pram_offset = |
3186 | qe_muram_alloc(sizeof(ucc_geth_rx_global_pram_t), | 3174 | qe_muram_alloc(sizeof(struct ucc_geth_rx_global_pram), |
3187 | UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT); | 3175 | UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT); |
3188 | if (IS_MURAM_ERR(ugeth->rx_glbl_pram_offset)) { | 3176 | if (IS_MURAM_ERR(ugeth->rx_glbl_pram_offset)) { |
3189 | ugeth_err | 3177 | ugeth_err |
@@ -3193,10 +3181,10 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3193 | return -ENOMEM; | 3181 | return -ENOMEM; |
3194 | } | 3182 | } |
3195 | ugeth->p_rx_glbl_pram = | 3183 | ugeth->p_rx_glbl_pram = |
3196 | (ucc_geth_rx_global_pram_t *) qe_muram_addr(ugeth-> | 3184 | (struct ucc_geth_rx_global_pram *) qe_muram_addr(ugeth-> |
3197 | rx_glbl_pram_offset); | 3185 | rx_glbl_pram_offset); |
3198 | /* Zero out p_rx_glbl_pram */ | 3186 | /* Zero out p_rx_glbl_pram */ |
3199 | memset(ugeth->p_rx_glbl_pram, 0, sizeof(ucc_geth_rx_global_pram_t)); | 3187 | memset(ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram)); |
3200 | 3188 | ||
3201 | /* Fill global PRAM */ | 3189 | /* Fill global PRAM */ |
3202 | 3190 | ||
@@ -3204,7 +3192,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3204 | /* Size varies with number of Rx threads */ | 3192 | /* Size varies with number of Rx threads */ |
3205 | ugeth->thread_dat_rx_offset = | 3193 | ugeth->thread_dat_rx_offset = |
3206 | qe_muram_alloc(numThreadsRxNumerical * | 3194 | qe_muram_alloc(numThreadsRxNumerical * |
3207 | sizeof(ucc_geth_thread_data_rx_t), | 3195 | sizeof(struct ucc_geth_thread_data_rx), |
3208 | UCC_GETH_THREAD_DATA_ALIGNMENT); | 3196 | UCC_GETH_THREAD_DATA_ALIGNMENT); |
3209 | if (IS_MURAM_ERR(ugeth->thread_dat_rx_offset)) { | 3197 | if (IS_MURAM_ERR(ugeth->thread_dat_rx_offset)) { |
3210 | ugeth_err | 3198 | ugeth_err |
@@ -3215,7 +3203,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3215 | } | 3203 | } |
3216 | 3204 | ||
3217 | ugeth->p_thread_data_rx = | 3205 | ugeth->p_thread_data_rx = |
3218 | (ucc_geth_thread_data_rx_t *) qe_muram_addr(ugeth-> | 3206 | (struct ucc_geth_thread_data_rx *) qe_muram_addr(ugeth-> |
3219 | thread_dat_rx_offset); | 3207 | thread_dat_rx_offset); |
3220 | out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); | 3208 | out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); |
3221 | 3209 | ||
@@ -3227,7 +3215,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3227 | statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX) { | 3215 | statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX) { |
3228 | ugeth->rx_fw_statistics_pram_offset = | 3216 | ugeth->rx_fw_statistics_pram_offset = |
3229 | qe_muram_alloc(sizeof | 3217 | qe_muram_alloc(sizeof |
3230 | (ucc_geth_rx_firmware_statistics_pram_t), | 3218 | (struct ucc_geth_rx_firmware_statistics_pram), |
3231 | UCC_GETH_RX_STATISTICS_ALIGNMENT); | 3219 | UCC_GETH_RX_STATISTICS_ALIGNMENT); |
3232 | if (IS_MURAM_ERR(ugeth->rx_fw_statistics_pram_offset)) { | 3220 | if (IS_MURAM_ERR(ugeth->rx_fw_statistics_pram_offset)) { |
3233 | ugeth_err | 3221 | ugeth_err |
@@ -3237,11 +3225,11 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3237 | return -ENOMEM; | 3225 | return -ENOMEM; |
3238 | } | 3226 | } |
3239 | ugeth->p_rx_fw_statistics_pram = | 3227 | ugeth->p_rx_fw_statistics_pram = |
3240 | (ucc_geth_rx_firmware_statistics_pram_t *) | 3228 | (struct ucc_geth_rx_firmware_statistics_pram *) |
3241 | qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); | 3229 | qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); |
3242 | /* Zero out p_rx_fw_statistics_pram */ | 3230 | /* Zero out p_rx_fw_statistics_pram */ |
3243 | memset(ugeth->p_rx_fw_statistics_pram, 0, | 3231 | memset(ugeth->p_rx_fw_statistics_pram, 0, |
3244 | sizeof(ucc_geth_rx_firmware_statistics_pram_t)); | 3232 | sizeof(struct ucc_geth_rx_firmware_statistics_pram)); |
3245 | } | 3233 | } |
3246 | 3234 | ||
3247 | /* intCoalescingPtr */ | 3235 | /* intCoalescingPtr */ |
@@ -3249,7 +3237,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3249 | /* Size varies with number of Rx queues */ | 3237 | /* Size varies with number of Rx queues */ |
3250 | ugeth->rx_irq_coalescing_tbl_offset = | 3238 | ugeth->rx_irq_coalescing_tbl_offset = |
3251 | qe_muram_alloc(ug_info->numQueuesRx * | 3239 | qe_muram_alloc(ug_info->numQueuesRx * |
3252 | sizeof(ucc_geth_rx_interrupt_coalescing_entry_t), | 3240 | sizeof(struct ucc_geth_rx_interrupt_coalescing_entry), |
3253 | UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT); | 3241 | UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT); |
3254 | if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) { | 3242 | if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) { |
3255 | ugeth_err | 3243 | ugeth_err |
@@ -3260,7 +3248,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3260 | } | 3248 | } |
3261 | 3249 | ||
3262 | ugeth->p_rx_irq_coalescing_tbl = | 3250 | ugeth->p_rx_irq_coalescing_tbl = |
3263 | (ucc_geth_rx_interrupt_coalescing_table_t *) | 3251 | (struct ucc_geth_rx_interrupt_coalescing_table *) |
3264 | qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); | 3252 | qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); |
3265 | out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, | 3253 | out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, |
3266 | ugeth->rx_irq_coalescing_tbl_offset); | 3254 | ugeth->rx_irq_coalescing_tbl_offset); |
@@ -3300,7 +3288,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3300 | l3qt = 0; | 3288 | l3qt = 0; |
3301 | for (i = 0; i < 8; i++) | 3289 | for (i = 0; i < 8; i++) |
3302 | l3qt |= (ug_info->l3qt[j + i] << (28 - 4 * i)); | 3290 | l3qt |= (ug_info->l3qt[j + i] << (28 - 4 * i)); |
3303 | out_be32(&ugeth->p_rx_glbl_pram->l3qt[j], l3qt); | 3291 | out_be32(&ugeth->p_rx_glbl_pram->l3qt[j/8], l3qt); |
3304 | } | 3292 | } |
3305 | 3293 | ||
3306 | /* vlantype */ | 3294 | /* vlantype */ |
@@ -3316,8 +3304,8 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3316 | /* Size varies with number of Rx queues */ | 3304 | /* Size varies with number of Rx queues */ |
3317 | ugeth->rx_bd_qs_tbl_offset = | 3305 | ugeth->rx_bd_qs_tbl_offset = |
3318 | qe_muram_alloc(ug_info->numQueuesRx * | 3306 | qe_muram_alloc(ug_info->numQueuesRx * |
3319 | (sizeof(ucc_geth_rx_bd_queues_entry_t) + | 3307 | (sizeof(struct ucc_geth_rx_bd_queues_entry) + |
3320 | sizeof(ucc_geth_rx_prefetched_bds_t)), | 3308 | sizeof(struct ucc_geth_rx_prefetched_bds)), |
3321 | UCC_GETH_RX_BD_QUEUES_ALIGNMENT); | 3309 | UCC_GETH_RX_BD_QUEUES_ALIGNMENT); |
3322 | if (IS_MURAM_ERR(ugeth->rx_bd_qs_tbl_offset)) { | 3310 | if (IS_MURAM_ERR(ugeth->rx_bd_qs_tbl_offset)) { |
3323 | ugeth_err | 3311 | ugeth_err |
@@ -3328,14 +3316,14 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3328 | } | 3316 | } |
3329 | 3317 | ||
3330 | ugeth->p_rx_bd_qs_tbl = | 3318 | ugeth->p_rx_bd_qs_tbl = |
3331 | (ucc_geth_rx_bd_queues_entry_t *) qe_muram_addr(ugeth-> | 3319 | (struct ucc_geth_rx_bd_queues_entry *) qe_muram_addr(ugeth-> |
3332 | rx_bd_qs_tbl_offset); | 3320 | rx_bd_qs_tbl_offset); |
3333 | out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); | 3321 | out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); |
3334 | /* Zero out p_rx_bd_qs_tbl */ | 3322 | /* Zero out p_rx_bd_qs_tbl */ |
3335 | memset(ugeth->p_rx_bd_qs_tbl, | 3323 | memset(ugeth->p_rx_bd_qs_tbl, |
3336 | 0, | 3324 | 0, |
3337 | ug_info->numQueuesRx * (sizeof(ucc_geth_rx_bd_queues_entry_t) + | 3325 | ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) + |
3338 | sizeof(ucc_geth_rx_prefetched_bds_t))); | 3326 | sizeof(struct ucc_geth_rx_prefetched_bds))); |
3339 | 3327 | ||
3340 | /* Setup the table */ | 3328 | /* Setup the table */ |
3341 | /* Assume BD rings are already established */ | 3329 | /* Assume BD rings are already established */ |
@@ -3406,7 +3394,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3406 | /* Allocate memory for extended filtering Mode Global | 3394 | /* Allocate memory for extended filtering Mode Global |
3407 | Parameters */ | 3395 | Parameters */ |
3408 | ugeth->exf_glbl_param_offset = | 3396 | ugeth->exf_glbl_param_offset = |
3409 | qe_muram_alloc(sizeof(ucc_geth_exf_global_pram_t), | 3397 | qe_muram_alloc(sizeof(struct ucc_geth_exf_global_pram), |
3410 | UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT); | 3398 | UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT); |
3411 | if (IS_MURAM_ERR(ugeth->exf_glbl_param_offset)) { | 3399 | if (IS_MURAM_ERR(ugeth->exf_glbl_param_offset)) { |
3412 | ugeth_err | 3400 | ugeth_err |
@@ -3417,7 +3405,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3417 | } | 3405 | } |
3418 | 3406 | ||
3419 | ugeth->p_exf_glbl_param = | 3407 | ugeth->p_exf_glbl_param = |
3420 | (ucc_geth_exf_global_pram_t *) qe_muram_addr(ugeth-> | 3408 | (struct ucc_geth_exf_global_pram *) qe_muram_addr(ugeth-> |
3421 | exf_glbl_param_offset); | 3409 | exf_glbl_param_offset); |
3422 | out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, | 3410 | out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, |
3423 | ugeth->exf_glbl_param_offset); | 3411 | ugeth->exf_glbl_param_offset); |
@@ -3439,7 +3427,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3439 | INIT_LIST_HEAD(&ugeth->ind_hash_q); | 3427 | INIT_LIST_HEAD(&ugeth->ind_hash_q); |
3440 | } | 3428 | } |
3441 | p_82xx_addr_filt = | 3429 | p_82xx_addr_filt = |
3442 | (ucc_geth_82xx_address_filtering_pram_t *) ugeth-> | 3430 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> |
3443 | p_rx_glbl_pram->addressfiltering; | 3431 | p_rx_glbl_pram->addressfiltering; |
3444 | 3432 | ||
3445 | ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, | 3433 | ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, |
@@ -3462,7 +3450,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3462 | * allocated resources can be released when the channel is freed. | 3450 | * allocated resources can be released when the channel is freed. |
3463 | */ | 3451 | */ |
3464 | if (!(ugeth->p_init_enet_param_shadow = | 3452 | if (!(ugeth->p_init_enet_param_shadow = |
3465 | (ucc_geth_init_pram_t *) kmalloc(sizeof(ucc_geth_init_pram_t), | 3453 | (struct ucc_geth_init_pram *) kmalloc(sizeof(struct ucc_geth_init_pram), |
3466 | GFP_KERNEL))) { | 3454 | GFP_KERNEL))) { |
3467 | ugeth_err | 3455 | ugeth_err |
3468 | ("%s: Can not allocate memory for" | 3456 | ("%s: Can not allocate memory for" |
@@ -3472,7 +3460,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3472 | } | 3460 | } |
3473 | /* Zero out *p_init_enet_param_shadow */ | 3461 | /* Zero out *p_init_enet_param_shadow */ |
3474 | memset((char *)ugeth->p_init_enet_param_shadow, | 3462 | memset((char *)ugeth->p_init_enet_param_shadow, |
3475 | 0, sizeof(ucc_geth_init_pram_t)); | 3463 | 0, sizeof(struct ucc_geth_init_pram)); |
3476 | 3464 | ||
3477 | /* Fill shadow InitEnet command parameter structure */ | 3465 | /* Fill shadow InitEnet command parameter structure */ |
3478 | 3466 | ||
@@ -3506,7 +3494,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3506 | } | 3494 | } |
3507 | ugeth->p_init_enet_param_shadow->largestexternallookupkeysize = | 3495 | ugeth->p_init_enet_param_shadow->largestexternallookupkeysize = |
3508 | ug_info->largestexternallookupkeysize; | 3496 | ug_info->largestexternallookupkeysize; |
3509 | size = sizeof(ucc_geth_thread_rx_pram_t); | 3497 | size = sizeof(struct ucc_geth_thread_rx_pram); |
3510 | if (ug_info->rxExtendedFiltering) { | 3498 | if (ug_info->rxExtendedFiltering) { |
3511 | size += THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; | 3499 | size += THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; |
3512 | if (ug_info->largestexternallookupkeysize == | 3500 | if (ug_info->largestexternallookupkeysize == |
@@ -3537,7 +3525,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3537 | fill_init_enet_entries(ugeth, | 3525 | fill_init_enet_entries(ugeth, |
3538 | &(ugeth->p_init_enet_param_shadow-> | 3526 | &(ugeth->p_init_enet_param_shadow-> |
3539 | txthread[0]), numThreadsTxNumerical, | 3527 | txthread[0]), numThreadsTxNumerical, |
3540 | sizeof(ucc_geth_thread_tx_pram_t), | 3528 | sizeof(struct ucc_geth_thread_tx_pram), |
3541 | UCC_GETH_THREAD_TX_PRAM_ALIGNMENT, | 3529 | UCC_GETH_THREAD_TX_PRAM_ALIGNMENT, |
3542 | ug_info->riscTx, 0)) != 0) { | 3530 | ug_info->riscTx, 0)) != 0) { |
3543 | ugeth_err("%s: Can not fill p_init_enet_param_shadow.", | 3531 | ugeth_err("%s: Can not fill p_init_enet_param_shadow.", |
@@ -3557,7 +3545,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3557 | } | 3545 | } |
3558 | 3546 | ||
3559 | /* Allocate InitEnet command parameter structure */ | 3547 | /* Allocate InitEnet command parameter structure */ |
3560 | init_enet_pram_offset = qe_muram_alloc(sizeof(ucc_geth_init_pram_t), 4); | 3548 | init_enet_pram_offset = qe_muram_alloc(sizeof(struct ucc_geth_init_pram), 4); |
3561 | if (IS_MURAM_ERR(init_enet_pram_offset)) { | 3549 | if (IS_MURAM_ERR(init_enet_pram_offset)) { |
3562 | ugeth_err | 3550 | ugeth_err |
3563 | ("%s: Can not allocate DPRAM memory for p_init_enet_pram.", | 3551 | ("%s: Can not allocate DPRAM memory for p_init_enet_pram.", |
@@ -3566,7 +3554,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3566 | return -ENOMEM; | 3554 | return -ENOMEM; |
3567 | } | 3555 | } |
3568 | p_init_enet_pram = | 3556 | p_init_enet_pram = |
3569 | (ucc_geth_init_pram_t *) qe_muram_addr(init_enet_pram_offset); | 3557 | (struct ucc_geth_init_pram *) qe_muram_addr(init_enet_pram_offset); |
3570 | 3558 | ||
3571 | /* Copy shadow InitEnet command parameter structure into PRAM */ | 3559 | /* Copy shadow InitEnet command parameter structure into PRAM */ |
3572 | p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1; | 3560 | p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1; |
@@ -3591,7 +3579,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3591 | /* Issue QE command */ | 3579 | /* Issue QE command */ |
3592 | cecr_subblock = | 3580 | cecr_subblock = |
3593 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); | 3581 | ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); |
3594 | qe_issue_cmd(command, cecr_subblock, (u8) QE_CR_PROTOCOL_ETHERNET, | 3582 | qe_issue_cmd(command, cecr_subblock, QE_CR_PROTOCOL_ETHERNET, |
3595 | init_enet_pram_offset); | 3583 | init_enet_pram_offset); |
3596 | 3584 | ||
3597 | /* Free InitEnet command parameter */ | 3585 | /* Free InitEnet command parameter */ |
@@ -3603,7 +3591,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth) | |||
3603 | /* returns a net_device_stats structure pointer */ | 3591 | /* returns a net_device_stats structure pointer */ |
3604 | static struct net_device_stats *ucc_geth_get_stats(struct net_device *dev) | 3592 | static struct net_device_stats *ucc_geth_get_stats(struct net_device *dev) |
3605 | { | 3593 | { |
3606 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3594 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3607 | 3595 | ||
3608 | return &(ugeth->stats); | 3596 | return &(ugeth->stats); |
3609 | } | 3597 | } |
@@ -3614,7 +3602,7 @@ static struct net_device_stats *ucc_geth_get_stats(struct net_device *dev) | |||
3614 | * starting over will fix the problem. */ | 3602 | * starting over will fix the problem. */ |
3615 | static void ucc_geth_timeout(struct net_device *dev) | 3603 | static void ucc_geth_timeout(struct net_device *dev) |
3616 | { | 3604 | { |
3617 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3605 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3618 | 3606 | ||
3619 | ugeth_vdbg("%s: IN", __FUNCTION__); | 3607 | ugeth_vdbg("%s: IN", __FUNCTION__); |
3620 | 3608 | ||
@@ -3634,7 +3622,7 @@ static void ucc_geth_timeout(struct net_device *dev) | |||
3634 | /* It is pointed to by the dev->hard_start_xmit function pointer */ | 3622 | /* It is pointed to by the dev->hard_start_xmit function pointer */ |
3635 | static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | 3623 | static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) |
3636 | { | 3624 | { |
3637 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3625 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3638 | u8 *bd; /* BD pointer */ | 3626 | u8 *bd; /* BD pointer */ |
3639 | u32 bd_status; | 3627 | u32 bd_status; |
3640 | u8 txQ = 0; | 3628 | u8 txQ = 0; |
@@ -3647,7 +3635,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3647 | 3635 | ||
3648 | /* Start from the next BD that should be filled */ | 3636 | /* Start from the next BD that should be filled */ |
3649 | bd = ugeth->txBd[txQ]; | 3637 | bd = ugeth->txBd[txQ]; |
3650 | bd_status = BD_STATUS_AND_LENGTH(bd); | 3638 | bd_status = in_be32((u32 *)bd); |
3651 | /* Save the skb pointer so we can free it later */ | 3639 | /* Save the skb pointer so we can free it later */ |
3652 | ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; | 3640 | ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; |
3653 | 3641 | ||
@@ -3657,20 +3645,21 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3657 | 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); | 3645 | 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); |
3658 | 3646 | ||
3659 | /* set up the buffer descriptor */ | 3647 | /* set up the buffer descriptor */ |
3660 | BD_BUFFER_SET(bd, | 3648 | out_be32(&((struct qe_bd *)bd)->buf, |
3661 | dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE)); | 3649 | dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE)); |
3662 | 3650 | ||
3663 | //printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); | 3651 | /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */ |
3664 | 3652 | ||
3665 | bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; | 3653 | bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; |
3666 | 3654 | ||
3667 | BD_STATUS_AND_LENGTH_SET(bd, bd_status); | 3655 | /* set bd status and length */ |
3656 | out_be32((u32 *)bd, bd_status); | ||
3668 | 3657 | ||
3669 | dev->trans_start = jiffies; | 3658 | dev->trans_start = jiffies; |
3670 | 3659 | ||
3671 | /* Move to next BD in the ring */ | 3660 | /* Move to next BD in the ring */ |
3672 | if (!(bd_status & T_W)) | 3661 | if (!(bd_status & T_W)) |
3673 | ugeth->txBd[txQ] = bd + UCC_GETH_SIZE_OF_BD; | 3662 | ugeth->txBd[txQ] = bd + sizeof(struct qe_bd); |
3674 | else | 3663 | else |
3675 | ugeth->txBd[txQ] = ugeth->p_tx_bd_ring[txQ]; | 3664 | ugeth->txBd[txQ] = ugeth->p_tx_bd_ring[txQ]; |
3676 | 3665 | ||
@@ -3695,7 +3684,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3695 | return 0; | 3684 | return 0; |
3696 | } | 3685 | } |
3697 | 3686 | ||
3698 | static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit) | 3687 | static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) |
3699 | { | 3688 | { |
3700 | struct sk_buff *skb; | 3689 | struct sk_buff *skb; |
3701 | u8 *bd; | 3690 | u8 *bd; |
@@ -3709,11 +3698,11 @@ static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit) | |||
3709 | /* collect received buffers */ | 3698 | /* collect received buffers */ |
3710 | bd = ugeth->rxBd[rxQ]; | 3699 | bd = ugeth->rxBd[rxQ]; |
3711 | 3700 | ||
3712 | bd_status = BD_STATUS_AND_LENGTH(bd); | 3701 | bd_status = in_be32((u32 *)bd); |
3713 | 3702 | ||
3714 | /* while there are received buffers and BD is full (~R_E) */ | 3703 | /* while there are received buffers and BD is full (~R_E) */ |
3715 | while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { | 3704 | while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { |
3716 | bdBuffer = (u8 *) BD_BUFFER(bd); | 3705 | bdBuffer = (u8 *) in_be32(&((struct qe_bd *)bd)->buf); |
3717 | length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); | 3706 | length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); |
3718 | skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; | 3707 | skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; |
3719 | 3708 | ||
@@ -3768,9 +3757,9 @@ static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit) | |||
3768 | if (bd_status & R_W) | 3757 | if (bd_status & R_W) |
3769 | bd = ugeth->p_rx_bd_ring[rxQ]; | 3758 | bd = ugeth->p_rx_bd_ring[rxQ]; |
3770 | else | 3759 | else |
3771 | bd += UCC_GETH_SIZE_OF_BD; | 3760 | bd += sizeof(struct qe_bd); |
3772 | 3761 | ||
3773 | bd_status = BD_STATUS_AND_LENGTH(bd); | 3762 | bd_status = in_be32((u32 *)bd); |
3774 | } | 3763 | } |
3775 | 3764 | ||
3776 | ugeth->rxBd[rxQ] = bd; | 3765 | ugeth->rxBd[rxQ] = bd; |
@@ -3781,12 +3770,12 @@ static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit) | |||
3781 | static int ucc_geth_tx(struct net_device *dev, u8 txQ) | 3770 | static int ucc_geth_tx(struct net_device *dev, u8 txQ) |
3782 | { | 3771 | { |
3783 | /* Start from the next BD that should be filled */ | 3772 | /* Start from the next BD that should be filled */ |
3784 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3773 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3785 | u8 *bd; /* BD pointer */ | 3774 | u8 *bd; /* BD pointer */ |
3786 | u32 bd_status; | 3775 | u32 bd_status; |
3787 | 3776 | ||
3788 | bd = ugeth->confBd[txQ]; | 3777 | bd = ugeth->confBd[txQ]; |
3789 | bd_status = BD_STATUS_AND_LENGTH(bd); | 3778 | bd_status = in_be32((u32 *)bd); |
3790 | 3779 | ||
3791 | /* Normal processing. */ | 3780 | /* Normal processing. */ |
3792 | while ((bd_status & T_R) == 0) { | 3781 | while ((bd_status & T_R) == 0) { |
@@ -3813,7 +3802,7 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ) | |||
3813 | 3802 | ||
3814 | /* Advance the confirmation BD pointer */ | 3803 | /* Advance the confirmation BD pointer */ |
3815 | if (!(bd_status & T_W)) | 3804 | if (!(bd_status & T_W)) |
3816 | ugeth->confBd[txQ] += UCC_GETH_SIZE_OF_BD; | 3805 | ugeth->confBd[txQ] += sizeof(struct qe_bd); |
3817 | else | 3806 | else |
3818 | ugeth->confBd[txQ] = ugeth->p_tx_bd_ring[txQ]; | 3807 | ugeth->confBd[txQ] = ugeth->p_tx_bd_ring[txQ]; |
3819 | } | 3808 | } |
@@ -3823,7 +3812,7 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ) | |||
3823 | #ifdef CONFIG_UGETH_NAPI | 3812 | #ifdef CONFIG_UGETH_NAPI |
3824 | static int ucc_geth_poll(struct net_device *dev, int *budget) | 3813 | static int ucc_geth_poll(struct net_device *dev, int *budget) |
3825 | { | 3814 | { |
3826 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3815 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3827 | int howmany; | 3816 | int howmany; |
3828 | int rx_work_limit = *budget; | 3817 | int rx_work_limit = *budget; |
3829 | u8 rxQ = 0; | 3818 | u8 rxQ = 0; |
@@ -3847,9 +3836,9 @@ static int ucc_geth_poll(struct net_device *dev, int *budget) | |||
3847 | static irqreturn_t ucc_geth_irq_handler(int irq, void *info) | 3836 | static irqreturn_t ucc_geth_irq_handler(int irq, void *info) |
3848 | { | 3837 | { |
3849 | struct net_device *dev = (struct net_device *)info; | 3838 | struct net_device *dev = (struct net_device *)info; |
3850 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3839 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3851 | ucc_fast_private_t *uccf; | 3840 | struct ucc_fast_private *uccf; |
3852 | ucc_geth_info_t *ug_info; | 3841 | struct ucc_geth_info *ug_info; |
3853 | register u32 ucce = 0; | 3842 | register u32 ucce = 0; |
3854 | register u32 bit_mask = UCCE_RXBF_SINGLE_MASK; | 3843 | register u32 bit_mask = UCCE_RXBF_SINGLE_MASK; |
3855 | register u32 tx_mask = UCCE_TXBF_SINGLE_MASK; | 3844 | register u32 tx_mask = UCCE_TXBF_SINGLE_MASK; |
@@ -3912,7 +3901,7 @@ static irqreturn_t ucc_geth_irq_handler(int irq, void *info) | |||
3912 | static irqreturn_t phy_interrupt(int irq, void *dev_id) | 3901 | static irqreturn_t phy_interrupt(int irq, void *dev_id) |
3913 | { | 3902 | { |
3914 | struct net_device *dev = (struct net_device *)dev_id; | 3903 | struct net_device *dev = (struct net_device *)dev_id; |
3915 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3904 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3916 | 3905 | ||
3917 | ugeth_vdbg("%s: IN", __FUNCTION__); | 3906 | ugeth_vdbg("%s: IN", __FUNCTION__); |
3918 | 3907 | ||
@@ -3932,8 +3921,8 @@ static irqreturn_t phy_interrupt(int irq, void *dev_id) | |||
3932 | static void ugeth_phy_change(void *data) | 3921 | static void ugeth_phy_change(void *data) |
3933 | { | 3922 | { |
3934 | struct net_device *dev = (struct net_device *)data; | 3923 | struct net_device *dev = (struct net_device *)data; |
3935 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3924 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3936 | ucc_geth_t *ug_regs; | 3925 | struct ucc_geth *ug_regs; |
3937 | int result = 0; | 3926 | int result = 0; |
3938 | 3927 | ||
3939 | ugeth_vdbg("%s: IN", __FUNCTION__); | 3928 | ugeth_vdbg("%s: IN", __FUNCTION__); |
@@ -3963,7 +3952,7 @@ static void ugeth_phy_change(void *data) | |||
3963 | static void ugeth_phy_timer(unsigned long data) | 3952 | static void ugeth_phy_timer(unsigned long data) |
3964 | { | 3953 | { |
3965 | struct net_device *dev = (struct net_device *)data; | 3954 | struct net_device *dev = (struct net_device *)data; |
3966 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 3955 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3967 | 3956 | ||
3968 | schedule_work(&ugeth->tq); | 3957 | schedule_work(&ugeth->tq); |
3969 | 3958 | ||
@@ -3979,7 +3968,7 @@ static void ugeth_phy_timer(unsigned long data) | |||
3979 | static void ugeth_phy_startup_timer(unsigned long data) | 3968 | static void ugeth_phy_startup_timer(unsigned long data) |
3980 | { | 3969 | { |
3981 | struct ugeth_mii_info *mii_info = (struct ugeth_mii_info *)data; | 3970 | struct ugeth_mii_info *mii_info = (struct ugeth_mii_info *)data; |
3982 | ucc_geth_private_t *ugeth = netdev_priv(mii_info->dev); | 3971 | struct ucc_geth_private *ugeth = netdev_priv(mii_info->dev); |
3983 | static int secondary = UGETH_AN_TIMEOUT; | 3972 | static int secondary = UGETH_AN_TIMEOUT; |
3984 | int result; | 3973 | int result; |
3985 | 3974 | ||
@@ -4034,7 +4023,7 @@ static void ugeth_phy_startup_timer(unsigned long data) | |||
4034 | /* Returns 0 for success. */ | 4023 | /* Returns 0 for success. */ |
4035 | static int ucc_geth_open(struct net_device *dev) | 4024 | static int ucc_geth_open(struct net_device *dev) |
4036 | { | 4025 | { |
4037 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 4026 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
4038 | int err; | 4027 | int err; |
4039 | 4028 | ||
4040 | ugeth_vdbg("%s: IN", __FUNCTION__); | 4029 | ugeth_vdbg("%s: IN", __FUNCTION__); |
@@ -4111,7 +4100,7 @@ static int ucc_geth_open(struct net_device *dev) | |||
4111 | /* Stops the kernel queue, and halts the controller */ | 4100 | /* Stops the kernel queue, and halts the controller */ |
4112 | static int ucc_geth_close(struct net_device *dev) | 4101 | static int ucc_geth_close(struct net_device *dev) |
4113 | { | 4102 | { |
4114 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 4103 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
4115 | 4104 | ||
4116 | ugeth_vdbg("%s: IN", __FUNCTION__); | 4105 | ugeth_vdbg("%s: IN", __FUNCTION__); |
4117 | 4106 | ||
@@ -4130,30 +4119,53 @@ static int ucc_geth_close(struct net_device *dev) | |||
4130 | 4119 | ||
4131 | const struct ethtool_ops ucc_geth_ethtool_ops = { }; | 4120 | const struct ethtool_ops ucc_geth_ethtool_ops = { }; |
4132 | 4121 | ||
4133 | static int ucc_geth_probe(struct device *device) | 4122 | static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *match) |
4134 | { | 4123 | { |
4135 | struct platform_device *pdev = to_platform_device(device); | 4124 | struct device *device = &ofdev->dev; |
4136 | struct ucc_geth_platform_data *ugeth_pdata; | 4125 | struct device_node *np = ofdev->node; |
4137 | struct net_device *dev = NULL; | 4126 | struct net_device *dev = NULL; |
4138 | struct ucc_geth_private *ugeth = NULL; | 4127 | struct ucc_geth_private *ugeth = NULL; |
4139 | struct ucc_geth_info *ug_info; | 4128 | struct ucc_geth_info *ug_info; |
4140 | int err; | 4129 | struct resource res; |
4130 | struct device_node *phy; | ||
4131 | int err, ucc_num, phy_interface; | ||
4141 | static int mii_mng_configured = 0; | 4132 | static int mii_mng_configured = 0; |
4133 | const phandle *ph; | ||
4134 | const unsigned int *prop; | ||
4142 | 4135 | ||
4143 | ugeth_vdbg("%s: IN", __FUNCTION__); | 4136 | ugeth_vdbg("%s: IN", __FUNCTION__); |
4144 | 4137 | ||
4145 | ugeth_pdata = (struct ucc_geth_platform_data *)pdev->dev.platform_data; | 4138 | prop = get_property(np, "device-id", NULL); |
4139 | ucc_num = *prop - 1; | ||
4140 | if ((ucc_num < 0) || (ucc_num > 7)) | ||
4141 | return -ENODEV; | ||
4142 | |||
4143 | ug_info = &ugeth_info[ucc_num]; | ||
4144 | ug_info->uf_info.ucc_num = ucc_num; | ||
4145 | prop = get_property(np, "rx-clock", NULL); | ||
4146 | ug_info->uf_info.rx_clock = *prop; | ||
4147 | prop = get_property(np, "tx-clock", NULL); | ||
4148 | ug_info->uf_info.tx_clock = *prop; | ||
4149 | err = of_address_to_resource(np, 0, &res); | ||
4150 | if (err) | ||
4151 | return -EINVAL; | ||
4152 | |||
4153 | ug_info->uf_info.regs = res.start; | ||
4154 | ug_info->uf_info.irq = irq_of_parse_and_map(np, 0); | ||
4155 | |||
4156 | ph = get_property(np, "phy-handle", NULL); | ||
4157 | phy = of_find_node_by_phandle(*ph); | ||
4146 | 4158 | ||
4147 | ug_info = &ugeth_info[pdev->id]; | 4159 | if (phy == NULL) |
4148 | ug_info->uf_info.ucc_num = pdev->id; | 4160 | return -ENODEV; |
4149 | ug_info->uf_info.rx_clock = ugeth_pdata->rx_clock; | 4161 | |
4150 | ug_info->uf_info.tx_clock = ugeth_pdata->tx_clock; | 4162 | prop = get_property(phy, "reg", NULL); |
4151 | ug_info->uf_info.regs = ugeth_pdata->phy_reg_addr; | 4163 | ug_info->phy_address = *prop; |
4152 | ug_info->uf_info.irq = platform_get_irq(pdev, 0); | 4164 | prop = get_property(phy, "interface", NULL); |
4153 | ug_info->phy_address = ugeth_pdata->phy_id; | 4165 | ug_info->enet_interface = *prop; |
4154 | ug_info->enet_interface = ugeth_pdata->phy_interface; | 4166 | ug_info->phy_interrupt = irq_of_parse_and_map(phy, 0); |
4155 | ug_info->board_flags = ugeth_pdata->board_flags; | 4167 | ug_info->board_flags = (ug_info->phy_interrupt == NO_IRQ)? |
4156 | ug_info->phy_interrupt = ugeth_pdata->phy_interrupt; | 4168 | 0:FSL_UGETH_BRD_HAS_PHY_INTR; |
4157 | 4169 | ||
4158 | printk(KERN_INFO "ucc_geth: UCC%1d at 0x%8x (irq = %d) \n", | 4170 | printk(KERN_INFO "ucc_geth: UCC%1d at 0x%8x (irq = %d) \n", |
4159 | ug_info->uf_info.ucc_num + 1, ug_info->uf_info.regs, | 4171 | ug_info->uf_info.ucc_num + 1, ug_info->uf_info.regs, |
@@ -4161,12 +4173,44 @@ static int ucc_geth_probe(struct device *device) | |||
4161 | 4173 | ||
4162 | if (ug_info == NULL) { | 4174 | if (ug_info == NULL) { |
4163 | ugeth_err("%s: [%d] Missing additional data!", __FUNCTION__, | 4175 | ugeth_err("%s: [%d] Missing additional data!", __FUNCTION__, |
4164 | pdev->id); | 4176 | ucc_num); |
4165 | return -ENODEV; | 4177 | return -ENODEV; |
4166 | } | 4178 | } |
4167 | 4179 | ||
4180 | /* FIXME: Work around for early chip rev. */ | ||
4181 | /* There's a bug in initial chip rev(s) in the RGMII ac */ | ||
4182 | /* timing. */ | ||
4183 | /* The following compensates by writing to the reserved */ | ||
4184 | /* QE Port Output Hold Registers (CPOH1?). */ | ||
4185 | prop = get_property(phy, "interface", NULL); | ||
4186 | phy_interface = *prop; | ||
4187 | if ((phy_interface == ENET_1000_RGMII) || | ||
4188 | (phy_interface == ENET_100_RGMII) || | ||
4189 | (phy_interface == ENET_10_RGMII)) { | ||
4190 | struct device_node *soc; | ||
4191 | phys_addr_t immrbase = -1; | ||
4192 | u32 *tmp_reg; | ||
4193 | u32 tmp_val; | ||
4194 | |||
4195 | soc = of_find_node_by_type(NULL, "soc"); | ||
4196 | if (soc) { | ||
4197 | unsigned int size; | ||
4198 | const void *prop = get_property(soc, "reg", &size); | ||
4199 | immrbase = of_translate_address(soc, prop); | ||
4200 | of_node_put(soc); | ||
4201 | }; | ||
4202 | |||
4203 | tmp_reg = (u32 *) ioremap(immrbase + 0x14A8, 0x4); | ||
4204 | tmp_val = in_be32(tmp_reg); | ||
4205 | if (ucc_num == 1) | ||
4206 | out_be32(tmp_reg, tmp_val | 0x00003000); | ||
4207 | else if (ucc_num == 2) | ||
4208 | out_be32(tmp_reg, tmp_val | 0x0c000000); | ||
4209 | iounmap(tmp_reg); | ||
4210 | } | ||
4211 | |||
4168 | if (!mii_mng_configured) { | 4212 | if (!mii_mng_configured) { |
4169 | ucc_set_qe_mux_mii_mng(ug_info->uf_info.ucc_num); | 4213 | ucc_set_qe_mux_mii_mng(ucc_num); |
4170 | mii_mng_configured = 1; | 4214 | mii_mng_configured = 1; |
4171 | } | 4215 | } |
4172 | 4216 | ||
@@ -4213,13 +4257,14 @@ static int ucc_geth_probe(struct device *device) | |||
4213 | 4257 | ||
4214 | ugeth->ug_info = ug_info; | 4258 | ugeth->ug_info = ug_info; |
4215 | ugeth->dev = dev; | 4259 | ugeth->dev = dev; |
4216 | memcpy(dev->dev_addr, ugeth_pdata->mac_addr, 6); | 4260 | memcpy(dev->dev_addr, get_property(np, "mac-address", NULL), 6); |
4217 | 4261 | ||
4218 | return 0; | 4262 | return 0; |
4219 | } | 4263 | } |
4220 | 4264 | ||
4221 | static int ucc_geth_remove(struct device *device) | 4265 | static int ucc_geth_remove(struct of_device* ofdev) |
4222 | { | 4266 | { |
4267 | struct device *device = &ofdev->dev; | ||
4223 | struct net_device *dev = dev_get_drvdata(device); | 4268 | struct net_device *dev = dev_get_drvdata(device); |
4224 | struct ucc_geth_private *ugeth = netdev_priv(dev); | 4269 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
4225 | 4270 | ||
@@ -4230,28 +4275,38 @@ static int ucc_geth_remove(struct device *device) | |||
4230 | return 0; | 4275 | return 0; |
4231 | } | 4276 | } |
4232 | 4277 | ||
4233 | /* Structure for a device driver */ | 4278 | static struct of_device_id ucc_geth_match[] = { |
4234 | static struct device_driver ucc_geth_driver = { | 4279 | { |
4235 | .name = DRV_NAME, | 4280 | .type = "network", |
4236 | .bus = &platform_bus_type, | 4281 | .compatible = "ucc_geth", |
4237 | .probe = ucc_geth_probe, | 4282 | }, |
4238 | .remove = ucc_geth_remove, | 4283 | {}, |
4284 | }; | ||
4285 | |||
4286 | MODULE_DEVICE_TABLE(of, ucc_geth_match); | ||
4287 | |||
4288 | static struct of_platform_driver ucc_geth_driver = { | ||
4289 | .name = DRV_NAME, | ||
4290 | .match_table = ucc_geth_match, | ||
4291 | .probe = ucc_geth_probe, | ||
4292 | .remove = ucc_geth_remove, | ||
4239 | }; | 4293 | }; |
4240 | 4294 | ||
4241 | static int __init ucc_geth_init(void) | 4295 | static int __init ucc_geth_init(void) |
4242 | { | 4296 | { |
4243 | int i; | 4297 | int i; |
4298 | |||
4244 | printk(KERN_INFO "ucc_geth: " DRV_DESC "\n"); | 4299 | printk(KERN_INFO "ucc_geth: " DRV_DESC "\n"); |
4245 | for (i = 0; i < 8; i++) | 4300 | for (i = 0; i < 8; i++) |
4246 | memcpy(&(ugeth_info[i]), &ugeth_primary_info, | 4301 | memcpy(&(ugeth_info[i]), &ugeth_primary_info, |
4247 | sizeof(ugeth_primary_info)); | 4302 | sizeof(ugeth_primary_info)); |
4248 | 4303 | ||
4249 | return driver_register(&ucc_geth_driver); | 4304 | return of_register_driver(&ucc_geth_driver); |
4250 | } | 4305 | } |
4251 | 4306 | ||
4252 | static void __exit ucc_geth_exit(void) | 4307 | static void __exit ucc_geth_exit(void) |
4253 | { | 4308 | { |
4254 | driver_unregister(&ucc_geth_driver); | 4309 | of_unregister_driver(&ucc_geth_driver); |
4255 | } | 4310 | } |
4256 | 4311 | ||
4257 | module_init(ucc_geth_init); | 4312 | module_init(ucc_geth_init); |
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index 005965f5dd9b..a66561253593 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h | |||
@@ -36,24 +36,24 @@ | |||
36 | #define ENET_INIT_PARAM_MAX_ENTRIES_RX 9 | 36 | #define ENET_INIT_PARAM_MAX_ENTRIES_RX 9 |
37 | #define ENET_INIT_PARAM_MAX_ENTRIES_TX 8 | 37 | #define ENET_INIT_PARAM_MAX_ENTRIES_TX 8 |
38 | 38 | ||
39 | typedef struct ucc_mii_mng { | 39 | struct ucc_mii_mng { |
40 | u32 miimcfg; /* MII management configuration reg */ | 40 | u32 miimcfg; /* MII management configuration reg */ |
41 | u32 miimcom; /* MII management command reg */ | 41 | u32 miimcom; /* MII management command reg */ |
42 | u32 miimadd; /* MII management address reg */ | 42 | u32 miimadd; /* MII management address reg */ |
43 | u32 miimcon; /* MII management control reg */ | 43 | u32 miimcon; /* MII management control reg */ |
44 | u32 miimstat; /* MII management status reg */ | 44 | u32 miimstat; /* MII management status reg */ |
45 | u32 miimind; /* MII management indication reg */ | 45 | u32 miimind; /* MII management indication reg */ |
46 | } __attribute__ ((packed)) ucc_mii_mng_t; | 46 | } __attribute__ ((packed)); |
47 | 47 | ||
48 | typedef struct ucc_geth { | 48 | struct ucc_geth { |
49 | ucc_fast_t uccf; | 49 | struct ucc_fast uccf; |
50 | 50 | ||
51 | u32 maccfg1; /* mac configuration reg. 1 */ | 51 | u32 maccfg1; /* mac configuration reg. 1 */ |
52 | u32 maccfg2; /* mac configuration reg. 2 */ | 52 | u32 maccfg2; /* mac configuration reg. 2 */ |
53 | u32 ipgifg; /* interframe gap reg. */ | 53 | u32 ipgifg; /* interframe gap reg. */ |
54 | u32 hafdup; /* half-duplex reg. */ | 54 | u32 hafdup; /* half-duplex reg. */ |
55 | u8 res1[0x10]; | 55 | u8 res1[0x10]; |
56 | ucc_mii_mng_t miimng; /* MII management structure */ | 56 | struct ucc_mii_mng miimng; /* MII management structure */ |
57 | u32 ifctl; /* interface control reg */ | 57 | u32 ifctl; /* interface control reg */ |
58 | u32 ifstat; /* interface statux reg */ | 58 | u32 ifstat; /* interface statux reg */ |
59 | u32 macstnaddr1; /* mac station address part 1 reg */ | 59 | u32 macstnaddr1; /* mac station address part 1 reg */ |
@@ -111,7 +111,7 @@ typedef struct ucc_geth { | |||
111 | u32 scar; /* Statistics carry register */ | 111 | u32 scar; /* Statistics carry register */ |
112 | u32 scam; /* Statistics caryy mask register */ | 112 | u32 scam; /* Statistics caryy mask register */ |
113 | u8 res5[0x200 - 0x1c4]; | 113 | u8 res5[0x200 - 0x1c4]; |
114 | } __attribute__ ((packed)) ucc_geth_t; | 114 | } __attribute__ ((packed)); |
115 | 115 | ||
116 | /* UCC GETH TEMODR Register */ | 116 | /* UCC GETH TEMODR Register */ |
117 | #define TEMODER_TX_RMON_STATISTICS_ENABLE 0x0100 /* enable Tx statistics | 117 | #define TEMODER_TX_RMON_STATISTICS_ENABLE 0x0100 /* enable Tx statistics |
@@ -508,39 +508,39 @@ typedef struct ucc_geth { | |||
508 | /* UCC GETH UDSR (Data Synchronization Register) */ | 508 | /* UCC GETH UDSR (Data Synchronization Register) */ |
509 | #define UDSR_MAGIC 0x067E | 509 | #define UDSR_MAGIC 0x067E |
510 | 510 | ||
511 | typedef struct ucc_geth_thread_data_tx { | 511 | struct ucc_geth_thread_data_tx { |
512 | u8 res0[104]; | 512 | u8 res0[104]; |
513 | } __attribute__ ((packed)) ucc_geth_thread_data_tx_t; | 513 | } __attribute__ ((packed)); |
514 | 514 | ||
515 | typedef struct ucc_geth_thread_data_rx { | 515 | struct ucc_geth_thread_data_rx { |
516 | u8 res0[40]; | 516 | u8 res0[40]; |
517 | } __attribute__ ((packed)) ucc_geth_thread_data_rx_t; | 517 | } __attribute__ ((packed)); |
518 | 518 | ||
519 | /* Send Queue Queue-Descriptor */ | 519 | /* Send Queue Queue-Descriptor */ |
520 | typedef struct ucc_geth_send_queue_qd { | 520 | struct ucc_geth_send_queue_qd { |
521 | u32 bd_ring_base; /* pointer to BD ring base address */ | 521 | u32 bd_ring_base; /* pointer to BD ring base address */ |
522 | u8 res0[0x8]; | 522 | u8 res0[0x8]; |
523 | u32 last_bd_completed_address;/* initialize to last entry in BD ring */ | 523 | u32 last_bd_completed_address;/* initialize to last entry in BD ring */ |
524 | u8 res1[0x30]; | 524 | u8 res1[0x30]; |
525 | } __attribute__ ((packed)) ucc_geth_send_queue_qd_t; | 525 | } __attribute__ ((packed)); |
526 | 526 | ||
527 | typedef struct ucc_geth_send_queue_mem_region { | 527 | struct ucc_geth_send_queue_mem_region { |
528 | ucc_geth_send_queue_qd_t sqqd[NUM_TX_QUEUES]; | 528 | struct ucc_geth_send_queue_qd sqqd[NUM_TX_QUEUES]; |
529 | } __attribute__ ((packed)) ucc_geth_send_queue_mem_region_t; | 529 | } __attribute__ ((packed)); |
530 | 530 | ||
531 | typedef struct ucc_geth_thread_tx_pram { | 531 | struct ucc_geth_thread_tx_pram { |
532 | u8 res0[64]; | 532 | u8 res0[64]; |
533 | } __attribute__ ((packed)) ucc_geth_thread_tx_pram_t; | 533 | } __attribute__ ((packed)); |
534 | 534 | ||
535 | typedef struct ucc_geth_thread_rx_pram { | 535 | struct ucc_geth_thread_rx_pram { |
536 | u8 res0[128]; | 536 | u8 res0[128]; |
537 | } __attribute__ ((packed)) ucc_geth_thread_rx_pram_t; | 537 | } __attribute__ ((packed)); |
538 | 538 | ||
539 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING 64 | 539 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING 64 |
540 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8 64 | 540 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8 64 |
541 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16 96 | 541 | #define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16 96 |
542 | 542 | ||
543 | typedef struct ucc_geth_scheduler { | 543 | struct ucc_geth_scheduler { |
544 | u16 cpucount0; /* CPU packet counter */ | 544 | u16 cpucount0; /* CPU packet counter */ |
545 | u16 cpucount1; /* CPU packet counter */ | 545 | u16 cpucount1; /* CPU packet counter */ |
546 | u16 cecount0; /* QE packet counter */ | 546 | u16 cecount0; /* QE packet counter */ |
@@ -574,9 +574,9 @@ typedef struct ucc_geth_scheduler { | |||
574 | /**< weight factor for queues */ | 574 | /**< weight factor for queues */ |
575 | u32 minw; /* temporary variable handled by QE */ | 575 | u32 minw; /* temporary variable handled by QE */ |
576 | u8 res1[0x70 - 0x64]; | 576 | u8 res1[0x70 - 0x64]; |
577 | } __attribute__ ((packed)) ucc_geth_scheduler_t; | 577 | } __attribute__ ((packed)); |
578 | 578 | ||
579 | typedef struct ucc_geth_tx_firmware_statistics_pram { | 579 | struct ucc_geth_tx_firmware_statistics_pram { |
580 | u32 sicoltx; /* single collision */ | 580 | u32 sicoltx; /* single collision */ |
581 | u32 mulcoltx; /* multiple collision */ | 581 | u32 mulcoltx; /* multiple collision */ |
582 | u32 latecoltxfr; /* late collision */ | 582 | u32 latecoltxfr; /* late collision */ |
@@ -596,9 +596,9 @@ typedef struct ucc_geth_tx_firmware_statistics_pram { | |||
596 | and 1518 octets */ | 596 | and 1518 octets */ |
597 | u32 txpktsjumbo; /* total packets (including bad) between 1024 | 597 | u32 txpktsjumbo; /* total packets (including bad) between 1024 |
598 | and MAXLength octets */ | 598 | and MAXLength octets */ |
599 | } __attribute__ ((packed)) ucc_geth_tx_firmware_statistics_pram_t; | 599 | } __attribute__ ((packed)); |
600 | 600 | ||
601 | typedef struct ucc_geth_rx_firmware_statistics_pram { | 601 | struct ucc_geth_rx_firmware_statistics_pram { |
602 | u32 frrxfcser; /* frames with crc error */ | 602 | u32 frrxfcser; /* frames with crc error */ |
603 | u32 fraligner; /* frames with alignment error */ | 603 | u32 fraligner; /* frames with alignment error */ |
604 | u32 inrangelenrxer; /* in range length error */ | 604 | u32 inrangelenrxer; /* in range length error */ |
@@ -630,33 +630,33 @@ typedef struct ucc_geth_rx_firmware_statistics_pram { | |||
630 | replaced */ | 630 | replaced */ |
631 | u32 insertvlan; /* total frames that had their VLAN tag | 631 | u32 insertvlan; /* total frames that had their VLAN tag |
632 | inserted */ | 632 | inserted */ |
633 | } __attribute__ ((packed)) ucc_geth_rx_firmware_statistics_pram_t; | 633 | } __attribute__ ((packed)); |
634 | 634 | ||
635 | typedef struct ucc_geth_rx_interrupt_coalescing_entry { | 635 | struct ucc_geth_rx_interrupt_coalescing_entry { |
636 | u32 interruptcoalescingmaxvalue; /* interrupt coalescing max | 636 | u32 interruptcoalescingmaxvalue; /* interrupt coalescing max |
637 | value */ | 637 | value */ |
638 | u32 interruptcoalescingcounter; /* interrupt coalescing counter, | 638 | u32 interruptcoalescingcounter; /* interrupt coalescing counter, |
639 | initialize to | 639 | initialize to |
640 | interruptcoalescingmaxvalue */ | 640 | interruptcoalescingmaxvalue */ |
641 | } __attribute__ ((packed)) ucc_geth_rx_interrupt_coalescing_entry_t; | 641 | } __attribute__ ((packed)); |
642 | 642 | ||
643 | typedef struct ucc_geth_rx_interrupt_coalescing_table { | 643 | struct ucc_geth_rx_interrupt_coalescing_table { |
644 | ucc_geth_rx_interrupt_coalescing_entry_t coalescingentry[NUM_RX_QUEUES]; | 644 | struct ucc_geth_rx_interrupt_coalescing_entry coalescingentry[NUM_RX_QUEUES]; |
645 | /**< interrupt coalescing entry */ | 645 | /**< interrupt coalescing entry */ |
646 | } __attribute__ ((packed)) ucc_geth_rx_interrupt_coalescing_table_t; | 646 | } __attribute__ ((packed)); |
647 | 647 | ||
648 | typedef struct ucc_geth_rx_prefetched_bds { | 648 | struct ucc_geth_rx_prefetched_bds { |
649 | qe_bd_t bd[NUM_BDS_IN_PREFETCHED_BDS]; /* prefetched bd */ | 649 | struct qe_bd bd[NUM_BDS_IN_PREFETCHED_BDS]; /* prefetched bd */ |
650 | } __attribute__ ((packed)) ucc_geth_rx_prefetched_bds_t; | 650 | } __attribute__ ((packed)); |
651 | 651 | ||
652 | typedef struct ucc_geth_rx_bd_queues_entry { | 652 | struct ucc_geth_rx_bd_queues_entry { |
653 | u32 bdbaseptr; /* BD base pointer */ | 653 | u32 bdbaseptr; /* BD base pointer */ |
654 | u32 bdptr; /* BD pointer */ | 654 | u32 bdptr; /* BD pointer */ |
655 | u32 externalbdbaseptr; /* external BD base pointer */ | 655 | u32 externalbdbaseptr; /* external BD base pointer */ |
656 | u32 externalbdptr; /* external BD pointer */ | 656 | u32 externalbdptr; /* external BD pointer */ |
657 | } __attribute__ ((packed)) ucc_geth_rx_bd_queues_entry_t; | 657 | } __attribute__ ((packed)); |
658 | 658 | ||
659 | typedef struct ucc_geth_tx_global_pram { | 659 | struct ucc_geth_tx_global_pram { |
660 | u16 temoder; | 660 | u16 temoder; |
661 | u8 res0[0x38 - 0x02]; | 661 | u8 res0[0x38 - 0x02]; |
662 | u32 sqptr; /* a base pointer to send queue memory region */ | 662 | u32 sqptr; /* a base pointer to send queue memory region */ |
@@ -670,15 +670,15 @@ typedef struct ucc_geth_tx_global_pram { | |||
670 | u32 tqptr; /* a base pointer to the Tx Queues Memory | 670 | u32 tqptr; /* a base pointer to the Tx Queues Memory |
671 | Region */ | 671 | Region */ |
672 | u8 res2[0x80 - 0x74]; | 672 | u8 res2[0x80 - 0x74]; |
673 | } __attribute__ ((packed)) ucc_geth_tx_global_pram_t; | 673 | } __attribute__ ((packed)); |
674 | 674 | ||
675 | /* structure representing Extended Filtering Global Parameters in PRAM */ | 675 | /* structure representing Extended Filtering Global Parameters in PRAM */ |
676 | typedef struct ucc_geth_exf_global_pram { | 676 | struct ucc_geth_exf_global_pram { |
677 | u32 l2pcdptr; /* individual address filter, high */ | 677 | u32 l2pcdptr; /* individual address filter, high */ |
678 | u8 res0[0x10 - 0x04]; | 678 | u8 res0[0x10 - 0x04]; |
679 | } __attribute__ ((packed)) ucc_geth_exf_global_pram_t; | 679 | } __attribute__ ((packed)); |
680 | 680 | ||
681 | typedef struct ucc_geth_rx_global_pram { | 681 | struct ucc_geth_rx_global_pram { |
682 | u32 remoder; /* ethernet mode reg. */ | 682 | u32 remoder; /* ethernet mode reg. */ |
683 | u32 rqptr; /* base pointer to the Rx Queues Memory Region*/ | 683 | u32 rqptr; /* base pointer to the Rx Queues Memory Region*/ |
684 | u32 res0[0x1]; | 684 | u32 res0[0x1]; |
@@ -710,12 +710,12 @@ typedef struct ucc_geth_rx_global_pram { | |||
710 | u32 exfGlobalParam; /* base address for extended filtering global | 710 | u32 exfGlobalParam; /* base address for extended filtering global |
711 | parameters */ | 711 | parameters */ |
712 | u8 res6[0x100 - 0xC4]; /* Initialize to zero */ | 712 | u8 res6[0x100 - 0xC4]; /* Initialize to zero */ |
713 | } __attribute__ ((packed)) ucc_geth_rx_global_pram_t; | 713 | } __attribute__ ((packed)); |
714 | 714 | ||
715 | #define GRACEFUL_STOP_ACKNOWLEDGE_RX 0x01 | 715 | #define GRACEFUL_STOP_ACKNOWLEDGE_RX 0x01 |
716 | 716 | ||
717 | /* structure representing InitEnet command */ | 717 | /* structure representing InitEnet command */ |
718 | typedef struct ucc_geth_init_pram { | 718 | struct ucc_geth_init_pram { |
719 | u8 resinit1; | 719 | u8 resinit1; |
720 | u8 resinit2; | 720 | u8 resinit2; |
721 | u8 resinit3; | 721 | u8 resinit3; |
@@ -729,7 +729,7 @@ typedef struct ucc_geth_init_pram { | |||
729 | u32 txglobal; /* tx global */ | 729 | u32 txglobal; /* tx global */ |
730 | u32 txthread[ENET_INIT_PARAM_MAX_ENTRIES_TX]; /* tx threads */ | 730 | u32 txthread[ENET_INIT_PARAM_MAX_ENTRIES_TX]; /* tx threads */ |
731 | u8 res3[0x1]; | 731 | u8 res3[0x1]; |
732 | } __attribute__ ((packed)) ucc_geth_init_pram_t; | 732 | } __attribute__ ((packed)); |
733 | 733 | ||
734 | #define ENET_INIT_PARAM_RGF_SHIFT (32 - 4) | 734 | #define ENET_INIT_PARAM_RGF_SHIFT (32 - 4) |
735 | #define ENET_INIT_PARAM_TGF_SHIFT (32 - 8) | 735 | #define ENET_INIT_PARAM_TGF_SHIFT (32 - 8) |
@@ -746,27 +746,27 @@ typedef struct ucc_geth_init_pram { | |||
746 | #define ENET_INIT_PARAM_MAGIC_RES_INIT5 0x0400 | 746 | #define ENET_INIT_PARAM_MAGIC_RES_INIT5 0x0400 |
747 | 747 | ||
748 | /* structure representing 82xx Address Filtering Enet Address in PRAM */ | 748 | /* structure representing 82xx Address Filtering Enet Address in PRAM */ |
749 | typedef struct ucc_geth_82xx_enet_address { | 749 | struct ucc_geth_82xx_enet_address { |
750 | u8 res1[0x2]; | 750 | u8 res1[0x2]; |
751 | u16 h; /* address (MSB) */ | 751 | u16 h; /* address (MSB) */ |
752 | u16 m; /* address */ | 752 | u16 m; /* address */ |
753 | u16 l; /* address (LSB) */ | 753 | u16 l; /* address (LSB) */ |
754 | } __attribute__ ((packed)) ucc_geth_82xx_enet_address_t; | 754 | } __attribute__ ((packed)); |
755 | 755 | ||
756 | /* structure representing 82xx Address Filtering PRAM */ | 756 | /* structure representing 82xx Address Filtering PRAM */ |
757 | typedef struct ucc_geth_82xx_address_filtering_pram { | 757 | struct ucc_geth_82xx_address_filtering_pram { |
758 | u32 iaddr_h; /* individual address filter, high */ | 758 | u32 iaddr_h; /* individual address filter, high */ |
759 | u32 iaddr_l; /* individual address filter, low */ | 759 | u32 iaddr_l; /* individual address filter, low */ |
760 | u32 gaddr_h; /* group address filter, high */ | 760 | u32 gaddr_h; /* group address filter, high */ |
761 | u32 gaddr_l; /* group address filter, low */ | 761 | u32 gaddr_l; /* group address filter, low */ |
762 | ucc_geth_82xx_enet_address_t taddr; | 762 | struct ucc_geth_82xx_enet_address taddr; |
763 | ucc_geth_82xx_enet_address_t paddr[NUM_OF_PADDRS]; | 763 | struct ucc_geth_82xx_enet_address paddr[NUM_OF_PADDRS]; |
764 | u8 res0[0x40 - 0x38]; | 764 | u8 res0[0x40 - 0x38]; |
765 | } __attribute__ ((packed)) ucc_geth_82xx_address_filtering_pram_t; | 765 | } __attribute__ ((packed)); |
766 | 766 | ||
767 | /* GETH Tx firmware statistics structure, used when calling | 767 | /* GETH Tx firmware statistics structure, used when calling |
768 | UCC_GETH_GetStatistics. */ | 768 | UCC_GETH_GetStatistics. */ |
769 | typedef struct ucc_geth_tx_firmware_statistics { | 769 | struct ucc_geth_tx_firmware_statistics { |
770 | u32 sicoltx; /* single collision */ | 770 | u32 sicoltx; /* single collision */ |
771 | u32 mulcoltx; /* multiple collision */ | 771 | u32 mulcoltx; /* multiple collision */ |
772 | u32 latecoltxfr; /* late collision */ | 772 | u32 latecoltxfr; /* late collision */ |
@@ -786,11 +786,11 @@ typedef struct ucc_geth_tx_firmware_statistics { | |||
786 | and 1518 octets */ | 786 | and 1518 octets */ |
787 | u32 txpktsjumbo; /* total packets (including bad) between 1024 | 787 | u32 txpktsjumbo; /* total packets (including bad) between 1024 |
788 | and MAXLength octets */ | 788 | and MAXLength octets */ |
789 | } __attribute__ ((packed)) ucc_geth_tx_firmware_statistics_t; | 789 | } __attribute__ ((packed)); |
790 | 790 | ||
791 | /* GETH Rx firmware statistics structure, used when calling | 791 | /* GETH Rx firmware statistics structure, used when calling |
792 | UCC_GETH_GetStatistics. */ | 792 | UCC_GETH_GetStatistics. */ |
793 | typedef struct ucc_geth_rx_firmware_statistics { | 793 | struct ucc_geth_rx_firmware_statistics { |
794 | u32 frrxfcser; /* frames with crc error */ | 794 | u32 frrxfcser; /* frames with crc error */ |
795 | u32 fraligner; /* frames with alignment error */ | 795 | u32 fraligner; /* frames with alignment error */ |
796 | u32 inrangelenrxer; /* in range length error */ | 796 | u32 inrangelenrxer; /* in range length error */ |
@@ -822,11 +822,11 @@ typedef struct ucc_geth_rx_firmware_statistics { | |||
822 | replaced */ | 822 | replaced */ |
823 | u32 insertvlan; /* total frames that had their VLAN tag | 823 | u32 insertvlan; /* total frames that had their VLAN tag |
824 | inserted */ | 824 | inserted */ |
825 | } __attribute__ ((packed)) ucc_geth_rx_firmware_statistics_t; | 825 | } __attribute__ ((packed)); |
826 | 826 | ||
827 | /* GETH hardware statistics structure, used when calling | 827 | /* GETH hardware statistics structure, used when calling |
828 | UCC_GETH_GetStatistics. */ | 828 | UCC_GETH_GetStatistics. */ |
829 | typedef struct ucc_geth_hardware_statistics { | 829 | struct ucc_geth_hardware_statistics { |
830 | u32 tx64; /* Total number of frames (including bad | 830 | u32 tx64; /* Total number of frames (including bad |
831 | frames) transmitted that were exactly of the | 831 | frames) transmitted that were exactly of the |
832 | minimal length (64 for un tagged, 68 for | 832 | minimal length (64 for un tagged, 68 for |
@@ -871,7 +871,7 @@ typedef struct ucc_geth_hardware_statistics { | |||
871 | u32 rbca; /* Total number of frames received succesfully | 871 | u32 rbca; /* Total number of frames received succesfully |
872 | that had destination address equal to the | 872 | that had destination address equal to the |
873 | broadcast address */ | 873 | broadcast address */ |
874 | } __attribute__ ((packed)) ucc_geth_hardware_statistics_t; | 874 | } __attribute__ ((packed)); |
875 | 875 | ||
876 | /* UCC GETH Tx errors returned via TxConf callback */ | 876 | /* UCC GETH Tx errors returned via TxConf callback */ |
877 | #define TX_ERRORS_DEF 0x0200 | 877 | #define TX_ERRORS_DEF 0x0200 |
@@ -1013,21 +1013,21 @@ typedef struct ucc_geth_hardware_statistics { | |||
1013 | (MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_112) | 1013 | (MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_112) |
1014 | 1014 | ||
1015 | /* Ethernet speed */ | 1015 | /* Ethernet speed */ |
1016 | typedef enum enet_speed { | 1016 | enum enet_speed { |
1017 | ENET_SPEED_10BT, /* 10 Base T */ | 1017 | ENET_SPEED_10BT, /* 10 Base T */ |
1018 | ENET_SPEED_100BT, /* 100 Base T */ | 1018 | ENET_SPEED_100BT, /* 100 Base T */ |
1019 | ENET_SPEED_1000BT /* 1000 Base T */ | 1019 | ENET_SPEED_1000BT /* 1000 Base T */ |
1020 | } enet_speed_e; | 1020 | }; |
1021 | 1021 | ||
1022 | /* Ethernet Address Type. */ | 1022 | /* Ethernet Address Type. */ |
1023 | typedef enum enet_addr_type { | 1023 | enum enet_addr_type { |
1024 | ENET_ADDR_TYPE_INDIVIDUAL, | 1024 | ENET_ADDR_TYPE_INDIVIDUAL, |
1025 | ENET_ADDR_TYPE_GROUP, | 1025 | ENET_ADDR_TYPE_GROUP, |
1026 | ENET_ADDR_TYPE_BROADCAST | 1026 | ENET_ADDR_TYPE_BROADCAST |
1027 | } enet_addr_type_e; | 1027 | }; |
1028 | 1028 | ||
1029 | /* TBI / MII Set Register */ | 1029 | /* TBI / MII Set Register */ |
1030 | typedef enum enet_tbi_mii_reg { | 1030 | enum enet_tbi_mii_reg { |
1031 | ENET_TBI_MII_CR = 0x00, /* Control (CR ) */ | 1031 | ENET_TBI_MII_CR = 0x00, /* Control (CR ) */ |
1032 | ENET_TBI_MII_SR = 0x01, /* Status (SR ) */ | 1032 | ENET_TBI_MII_SR = 0x01, /* Status (SR ) */ |
1033 | ENET_TBI_MII_ANA = 0x04, /* AN advertisement (ANA ) */ | 1033 | ENET_TBI_MII_ANA = 0x04, /* AN advertisement (ANA ) */ |
@@ -1040,10 +1040,10 @@ typedef enum enet_tbi_mii_reg { | |||
1040 | ENET_TBI_MII_EXST = 0x0F, /* Extended status (EXST ) */ | 1040 | ENET_TBI_MII_EXST = 0x0F, /* Extended status (EXST ) */ |
1041 | ENET_TBI_MII_JD = 0x10, /* Jitter diagnostics (JD ) */ | 1041 | ENET_TBI_MII_JD = 0x10, /* Jitter diagnostics (JD ) */ |
1042 | ENET_TBI_MII_TBICON = 0x11 /* TBI control (TBICON ) */ | 1042 | ENET_TBI_MII_TBICON = 0x11 /* TBI control (TBICON ) */ |
1043 | } enet_tbi_mii_reg_e; | 1043 | }; |
1044 | 1044 | ||
1045 | /* UCC GETH 82xx Ethernet Address Recognition Location */ | 1045 | /* UCC GETH 82xx Ethernet Address Recognition Location */ |
1046 | typedef enum ucc_geth_enet_address_recognition_location { | 1046 | enum ucc_geth_enet_address_recognition_location { |
1047 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_STATION_ADDRESS,/* station | 1047 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_STATION_ADDRESS,/* station |
1048 | address */ | 1048 | address */ |
1049 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_PADDR_FIRST, /* additional | 1049 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_PADDR_FIRST, /* additional |
@@ -1065,10 +1065,10 @@ typedef enum ucc_geth_enet_address_recognition_location { | |||
1065 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_GROUP_HASH, /* group hash */ | 1065 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_GROUP_HASH, /* group hash */ |
1066 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_INDIVIDUAL_HASH /* individual | 1066 | UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_INDIVIDUAL_HASH /* individual |
1067 | hash */ | 1067 | hash */ |
1068 | } ucc_geth_enet_address_recognition_location_e; | 1068 | }; |
1069 | 1069 | ||
1070 | /* UCC GETH vlan operation tagged */ | 1070 | /* UCC GETH vlan operation tagged */ |
1071 | typedef enum ucc_geth_vlan_operation_tagged { | 1071 | enum ucc_geth_vlan_operation_tagged { |
1072 | UCC_GETH_VLAN_OPERATION_TAGGED_NOP = 0x0, /* Tagged - nop */ | 1072 | UCC_GETH_VLAN_OPERATION_TAGGED_NOP = 0x0, /* Tagged - nop */ |
1073 | UCC_GETH_VLAN_OPERATION_TAGGED_REPLACE_VID_PORTION_OF_Q_TAG | 1073 | UCC_GETH_VLAN_OPERATION_TAGGED_REPLACE_VID_PORTION_OF_Q_TAG |
1074 | = 0x1, /* Tagged - replace vid portion of q tag */ | 1074 | = 0x1, /* Tagged - replace vid portion of q tag */ |
@@ -1076,18 +1076,18 @@ typedef enum ucc_geth_vlan_operation_tagged { | |||
1076 | = 0x2, /* Tagged - if vid0 replace vid with default value */ | 1076 | = 0x2, /* Tagged - if vid0 replace vid with default value */ |
1077 | UCC_GETH_VLAN_OPERATION_TAGGED_EXTRACT_Q_TAG_FROM_FRAME | 1077 | UCC_GETH_VLAN_OPERATION_TAGGED_EXTRACT_Q_TAG_FROM_FRAME |
1078 | = 0x3 /* Tagged - extract q tag from frame */ | 1078 | = 0x3 /* Tagged - extract q tag from frame */ |
1079 | } ucc_geth_vlan_operation_tagged_e; | 1079 | }; |
1080 | 1080 | ||
1081 | /* UCC GETH vlan operation non-tagged */ | 1081 | /* UCC GETH vlan operation non-tagged */ |
1082 | typedef enum ucc_geth_vlan_operation_non_tagged { | 1082 | enum ucc_geth_vlan_operation_non_tagged { |
1083 | UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP = 0x0, /* Non tagged - nop */ | 1083 | UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP = 0x0, /* Non tagged - nop */ |
1084 | UCC_GETH_VLAN_OPERATION_NON_TAGGED_Q_TAG_INSERT = 0x1 /* Non tagged - | 1084 | UCC_GETH_VLAN_OPERATION_NON_TAGGED_Q_TAG_INSERT = 0x1 /* Non tagged - |
1085 | q tag insert | 1085 | q tag insert |
1086 | */ | 1086 | */ |
1087 | } ucc_geth_vlan_operation_non_tagged_e; | 1087 | }; |
1088 | 1088 | ||
1089 | /* UCC GETH Rx Quality of Service Mode */ | 1089 | /* UCC GETH Rx Quality of Service Mode */ |
1090 | typedef enum ucc_geth_qos_mode { | 1090 | enum ucc_geth_qos_mode { |
1091 | UCC_GETH_QOS_MODE_DEFAULT = 0x0, /* default queue */ | 1091 | UCC_GETH_QOS_MODE_DEFAULT = 0x0, /* default queue */ |
1092 | UCC_GETH_QOS_MODE_QUEUE_NUM_FROM_L2_CRITERIA = 0x1, /* queue | 1092 | UCC_GETH_QOS_MODE_QUEUE_NUM_FROM_L2_CRITERIA = 0x1, /* queue |
1093 | determined | 1093 | determined |
@@ -1097,11 +1097,11 @@ typedef enum ucc_geth_qos_mode { | |||
1097 | determined | 1097 | determined |
1098 | by L3 | 1098 | by L3 |
1099 | criteria */ | 1099 | criteria */ |
1100 | } ucc_geth_qos_mode_e; | 1100 | }; |
1101 | 1101 | ||
1102 | /* UCC GETH Statistics Gathering Mode - These are bit flags, 'or' them together | 1102 | /* UCC GETH Statistics Gathering Mode - These are bit flags, 'or' them together |
1103 | for combined functionality */ | 1103 | for combined functionality */ |
1104 | typedef enum ucc_geth_statistics_gathering_mode { | 1104 | enum ucc_geth_statistics_gathering_mode { |
1105 | UCC_GETH_STATISTICS_GATHERING_MODE_NONE = 0x00000000, /* No | 1105 | UCC_GETH_STATISTICS_GATHERING_MODE_NONE = 0x00000000, /* No |
1106 | statistics | 1106 | statistics |
1107 | gathering */ | 1107 | gathering */ |
@@ -1122,10 +1122,10 @@ typedef enum ucc_geth_statistics_gathering_mode { | |||
1122 | statistics | 1122 | statistics |
1123 | gathering | 1123 | gathering |
1124 | */ | 1124 | */ |
1125 | } ucc_geth_statistics_gathering_mode_e; | 1125 | }; |
1126 | 1126 | ||
1127 | /* UCC GETH Pad and CRC Mode - Note, Padding without CRC is not possible */ | 1127 | /* UCC GETH Pad and CRC Mode - Note, Padding without CRC is not possible */ |
1128 | typedef enum ucc_geth_maccfg2_pad_and_crc_mode { | 1128 | enum ucc_geth_maccfg2_pad_and_crc_mode { |
1129 | UCC_GETH_PAD_AND_CRC_MODE_NONE | 1129 | UCC_GETH_PAD_AND_CRC_MODE_NONE |
1130 | = MACCFG2_PAD_AND_CRC_MODE_NONE, /* Neither Padding | 1130 | = MACCFG2_PAD_AND_CRC_MODE_NONE, /* Neither Padding |
1131 | short frames | 1131 | short frames |
@@ -1135,61 +1135,59 @@ typedef enum ucc_geth_maccfg2_pad_and_crc_mode { | |||
1135 | CRC only */ | 1135 | CRC only */ |
1136 | UCC_GETH_PAD_AND_CRC_MODE_PAD_AND_CRC = | 1136 | UCC_GETH_PAD_AND_CRC_MODE_PAD_AND_CRC = |
1137 | MACCFG2_PAD_AND_CRC_MODE_PAD_AND_CRC | 1137 | MACCFG2_PAD_AND_CRC_MODE_PAD_AND_CRC |
1138 | } ucc_geth_maccfg2_pad_and_crc_mode_e; | 1138 | }; |
1139 | 1139 | ||
1140 | /* UCC GETH upsmr Flow Control Mode */ | 1140 | /* UCC GETH upsmr Flow Control Mode */ |
1141 | typedef enum ucc_geth_flow_control_mode { | 1141 | enum ucc_geth_flow_control_mode { |
1142 | UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_NONE = 0x00000000, /* No automatic | 1142 | UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_NONE = 0x00000000, /* No automatic |
1143 | flow control | 1143 | flow control |
1144 | */ | 1144 | */ |
1145 | UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_PAUSE_WHEN_EMERGENCY | 1145 | UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_PAUSE_WHEN_EMERGENCY |
1146 | = 0x00004000 /* Send pause frame when RxFIFO reaches its | 1146 | = 0x00004000 /* Send pause frame when RxFIFO reaches its |
1147 | emergency threshold */ | 1147 | emergency threshold */ |
1148 | } ucc_geth_flow_control_mode_e; | 1148 | }; |
1149 | 1149 | ||
1150 | /* UCC GETH number of threads */ | 1150 | /* UCC GETH number of threads */ |
1151 | typedef enum ucc_geth_num_of_threads { | 1151 | enum ucc_geth_num_of_threads { |
1152 | UCC_GETH_NUM_OF_THREADS_1 = 0x1, /* 1 */ | 1152 | UCC_GETH_NUM_OF_THREADS_1 = 0x1, /* 1 */ |
1153 | UCC_GETH_NUM_OF_THREADS_2 = 0x2, /* 2 */ | 1153 | UCC_GETH_NUM_OF_THREADS_2 = 0x2, /* 2 */ |
1154 | UCC_GETH_NUM_OF_THREADS_4 = 0x0, /* 4 */ | 1154 | UCC_GETH_NUM_OF_THREADS_4 = 0x0, /* 4 */ |
1155 | UCC_GETH_NUM_OF_THREADS_6 = 0x3, /* 6 */ | 1155 | UCC_GETH_NUM_OF_THREADS_6 = 0x3, /* 6 */ |
1156 | UCC_GETH_NUM_OF_THREADS_8 = 0x4 /* 8 */ | 1156 | UCC_GETH_NUM_OF_THREADS_8 = 0x4 /* 8 */ |
1157 | } ucc_geth_num_of_threads_e; | 1157 | }; |
1158 | 1158 | ||
1159 | /* UCC GETH number of station addresses */ | 1159 | /* UCC GETH number of station addresses */ |
1160 | typedef enum ucc_geth_num_of_station_addresses { | 1160 | enum ucc_geth_num_of_station_addresses { |
1161 | UCC_GETH_NUM_OF_STATION_ADDRESSES_1, /* 1 */ | 1161 | UCC_GETH_NUM_OF_STATION_ADDRESSES_1, /* 1 */ |
1162 | UCC_GETH_NUM_OF_STATION_ADDRESSES_5 /* 5 */ | 1162 | UCC_GETH_NUM_OF_STATION_ADDRESSES_5 /* 5 */ |
1163 | } ucc_geth_num_of_station_addresses_e; | 1163 | }; |
1164 | |||
1165 | typedef u8 enet_addr_t[ENET_NUM_OCTETS_PER_ADDRESS]; | ||
1166 | 1164 | ||
1167 | /* UCC GETH 82xx Ethernet Address Container */ | 1165 | /* UCC GETH 82xx Ethernet Address Container */ |
1168 | typedef struct enet_addr_container { | 1166 | struct enet_addr_container { |
1169 | enet_addr_t address; /* ethernet address */ | 1167 | u8 address[ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */ |
1170 | ucc_geth_enet_address_recognition_location_e location; /* location in | 1168 | enum ucc_geth_enet_address_recognition_location location; /* location in |
1171 | 82xx address | 1169 | 82xx address |
1172 | recognition | 1170 | recognition |
1173 | hardware */ | 1171 | hardware */ |
1174 | struct list_head node; | 1172 | struct list_head node; |
1175 | } enet_addr_container_t; | 1173 | }; |
1176 | 1174 | ||
1177 | #define ENET_ADDR_CONT_ENTRY(ptr) list_entry(ptr, enet_addr_container_t, node) | 1175 | #define ENET_ADDR_CONT_ENTRY(ptr) list_entry(ptr, struct enet_addr_container, node) |
1178 | 1176 | ||
1179 | /* UCC GETH Termination Action Descriptor (TAD) structure. */ | 1177 | /* UCC GETH Termination Action Descriptor (TAD) structure. */ |
1180 | typedef struct ucc_geth_tad_params { | 1178 | struct ucc_geth_tad_params { |
1181 | int rx_non_dynamic_extended_features_mode; | 1179 | int rx_non_dynamic_extended_features_mode; |
1182 | int reject_frame; | 1180 | int reject_frame; |
1183 | ucc_geth_vlan_operation_tagged_e vtag_op; | 1181 | enum ucc_geth_vlan_operation_tagged vtag_op; |
1184 | ucc_geth_vlan_operation_non_tagged_e vnontag_op; | 1182 | enum ucc_geth_vlan_operation_non_tagged vnontag_op; |
1185 | ucc_geth_qos_mode_e rqos; | 1183 | enum ucc_geth_qos_mode rqos; |
1186 | u8 vpri; | 1184 | u8 vpri; |
1187 | u16 vid; | 1185 | u16 vid; |
1188 | } ucc_geth_tad_params_t; | 1186 | }; |
1189 | 1187 | ||
1190 | /* GETH protocol initialization structure */ | 1188 | /* GETH protocol initialization structure */ |
1191 | typedef struct ucc_geth_info { | 1189 | struct ucc_geth_info { |
1192 | ucc_fast_info_t uf_info; | 1190 | struct ucc_fast_info uf_info; |
1193 | u8 numQueuesTx; | 1191 | u8 numQueuesTx; |
1194 | u8 numQueuesRx; | 1192 | u8 numQueuesRx; |
1195 | int ipCheckSumCheck; | 1193 | int ipCheckSumCheck; |
@@ -1251,51 +1249,51 @@ typedef struct ucc_geth_info { | |||
1251 | u8 iphoffset[TX_IP_OFFSET_ENTRY_MAX]; | 1249 | u8 iphoffset[TX_IP_OFFSET_ENTRY_MAX]; |
1252 | u16 bdRingLenTx[NUM_TX_QUEUES]; | 1250 | u16 bdRingLenTx[NUM_TX_QUEUES]; |
1253 | u16 bdRingLenRx[NUM_RX_QUEUES]; | 1251 | u16 bdRingLenRx[NUM_RX_QUEUES]; |
1254 | enet_interface_e enet_interface; | 1252 | enum enet_interface enet_interface; |
1255 | ucc_geth_num_of_station_addresses_e numStationAddresses; | 1253 | enum ucc_geth_num_of_station_addresses numStationAddresses; |
1256 | qe_fltr_largest_external_tbl_lookup_key_size_e | 1254 | enum qe_fltr_largest_external_tbl_lookup_key_size |
1257 | largestexternallookupkeysize; | 1255 | largestexternallookupkeysize; |
1258 | ucc_geth_statistics_gathering_mode_e statisticsMode; | 1256 | enum ucc_geth_statistics_gathering_mode statisticsMode; |
1259 | ucc_geth_vlan_operation_tagged_e vlanOperationTagged; | 1257 | enum ucc_geth_vlan_operation_tagged vlanOperationTagged; |
1260 | ucc_geth_vlan_operation_non_tagged_e vlanOperationNonTagged; | 1258 | enum ucc_geth_vlan_operation_non_tagged vlanOperationNonTagged; |
1261 | ucc_geth_qos_mode_e rxQoSMode; | 1259 | enum ucc_geth_qos_mode rxQoSMode; |
1262 | ucc_geth_flow_control_mode_e aufc; | 1260 | enum ucc_geth_flow_control_mode aufc; |
1263 | ucc_geth_maccfg2_pad_and_crc_mode_e padAndCrc; | 1261 | enum ucc_geth_maccfg2_pad_and_crc_mode padAndCrc; |
1264 | ucc_geth_num_of_threads_e numThreadsTx; | 1262 | enum ucc_geth_num_of_threads numThreadsTx; |
1265 | ucc_geth_num_of_threads_e numThreadsRx; | 1263 | enum ucc_geth_num_of_threads numThreadsRx; |
1266 | qe_risc_allocation_e riscTx; | 1264 | enum qe_risc_allocation riscTx; |
1267 | qe_risc_allocation_e riscRx; | 1265 | enum qe_risc_allocation riscRx; |
1268 | } ucc_geth_info_t; | 1266 | }; |
1269 | 1267 | ||
1270 | /* structure representing UCC GETH */ | 1268 | /* structure representing UCC GETH */ |
1271 | typedef struct ucc_geth_private { | 1269 | struct ucc_geth_private { |
1272 | ucc_geth_info_t *ug_info; | 1270 | struct ucc_geth_info *ug_info; |
1273 | ucc_fast_private_t *uccf; | 1271 | struct ucc_fast_private *uccf; |
1274 | struct net_device *dev; | 1272 | struct net_device *dev; |
1275 | struct net_device_stats stats; /* linux network statistics */ | 1273 | struct net_device_stats stats; /* linux network statistics */ |
1276 | ucc_geth_t *ug_regs; | 1274 | struct ucc_geth *ug_regs; |
1277 | ucc_geth_init_pram_t *p_init_enet_param_shadow; | 1275 | struct ucc_geth_init_pram *p_init_enet_param_shadow; |
1278 | ucc_geth_exf_global_pram_t *p_exf_glbl_param; | 1276 | struct ucc_geth_exf_global_pram *p_exf_glbl_param; |
1279 | u32 exf_glbl_param_offset; | 1277 | u32 exf_glbl_param_offset; |
1280 | ucc_geth_rx_global_pram_t *p_rx_glbl_pram; | 1278 | struct ucc_geth_rx_global_pram *p_rx_glbl_pram; |
1281 | u32 rx_glbl_pram_offset; | 1279 | u32 rx_glbl_pram_offset; |
1282 | ucc_geth_tx_global_pram_t *p_tx_glbl_pram; | 1280 | struct ucc_geth_tx_global_pram *p_tx_glbl_pram; |
1283 | u32 tx_glbl_pram_offset; | 1281 | u32 tx_glbl_pram_offset; |
1284 | ucc_geth_send_queue_mem_region_t *p_send_q_mem_reg; | 1282 | struct ucc_geth_send_queue_mem_region *p_send_q_mem_reg; |
1285 | u32 send_q_mem_reg_offset; | 1283 | u32 send_q_mem_reg_offset; |
1286 | ucc_geth_thread_data_tx_t *p_thread_data_tx; | 1284 | struct ucc_geth_thread_data_tx *p_thread_data_tx; |
1287 | u32 thread_dat_tx_offset; | 1285 | u32 thread_dat_tx_offset; |
1288 | ucc_geth_thread_data_rx_t *p_thread_data_rx; | 1286 | struct ucc_geth_thread_data_rx *p_thread_data_rx; |
1289 | u32 thread_dat_rx_offset; | 1287 | u32 thread_dat_rx_offset; |
1290 | ucc_geth_scheduler_t *p_scheduler; | 1288 | struct ucc_geth_scheduler *p_scheduler; |
1291 | u32 scheduler_offset; | 1289 | u32 scheduler_offset; |
1292 | ucc_geth_tx_firmware_statistics_pram_t *p_tx_fw_statistics_pram; | 1290 | struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; |
1293 | u32 tx_fw_statistics_pram_offset; | 1291 | u32 tx_fw_statistics_pram_offset; |
1294 | ucc_geth_rx_firmware_statistics_pram_t *p_rx_fw_statistics_pram; | 1292 | struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; |
1295 | u32 rx_fw_statistics_pram_offset; | 1293 | u32 rx_fw_statistics_pram_offset; |
1296 | ucc_geth_rx_interrupt_coalescing_table_t *p_rx_irq_coalescing_tbl; | 1294 | struct ucc_geth_rx_interrupt_coalescing_table *p_rx_irq_coalescing_tbl; |
1297 | u32 rx_irq_coalescing_tbl_offset; | 1295 | u32 rx_irq_coalescing_tbl_offset; |
1298 | ucc_geth_rx_bd_queues_entry_t *p_rx_bd_qs_tbl; | 1296 | struct ucc_geth_rx_bd_queues_entry *p_rx_bd_qs_tbl; |
1299 | u32 rx_bd_qs_tbl_offset; | 1297 | u32 rx_bd_qs_tbl_offset; |
1300 | u8 *p_tx_bd_ring[NUM_TX_QUEUES]; | 1298 | u8 *p_tx_bd_ring[NUM_TX_QUEUES]; |
1301 | u32 tx_bd_ring_offset[NUM_TX_QUEUES]; | 1299 | u32 tx_bd_ring_offset[NUM_TX_QUEUES]; |
@@ -1308,7 +1306,7 @@ typedef struct ucc_geth_private { | |||
1308 | u16 cpucount[NUM_TX_QUEUES]; | 1306 | u16 cpucount[NUM_TX_QUEUES]; |
1309 | volatile u16 *p_cpucount[NUM_TX_QUEUES]; | 1307 | volatile u16 *p_cpucount[NUM_TX_QUEUES]; |
1310 | int indAddrRegUsed[NUM_OF_PADDRS]; | 1308 | int indAddrRegUsed[NUM_OF_PADDRS]; |
1311 | enet_addr_t paddr[NUM_OF_PADDRS]; | 1309 | u8 paddr[NUM_OF_PADDRS][ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */ |
1312 | u8 numGroupAddrInHash; | 1310 | u8 numGroupAddrInHash; |
1313 | u8 numIndAddrInHash; | 1311 | u8 numIndAddrInHash; |
1314 | u8 numIndAddrInReg; | 1312 | u8 numIndAddrInReg; |
@@ -1334,6 +1332,6 @@ typedef struct ucc_geth_private { | |||
1334 | int oldspeed; | 1332 | int oldspeed; |
1335 | int oldduplex; | 1333 | int oldduplex; |
1336 | int oldlink; | 1334 | int oldlink; |
1337 | } ucc_geth_private_t; | 1335 | }; |
1338 | 1336 | ||
1339 | #endif /* __UCC_GETH_H__ */ | 1337 | #endif /* __UCC_GETH_H__ */ |
diff --git a/drivers/net/ucc_geth_phy.c b/drivers/net/ucc_geth_phy.c index 67260eb3188a..5360ec05eaa3 100644 --- a/drivers/net/ucc_geth_phy.c +++ b/drivers/net/ucc_geth_phy.c | |||
@@ -42,7 +42,6 @@ | |||
42 | 42 | ||
43 | #include "ucc_geth.h" | 43 | #include "ucc_geth.h" |
44 | #include "ucc_geth_phy.h" | 44 | #include "ucc_geth_phy.h" |
45 | #include <platforms/83xx/mpc8360e_pb.h> | ||
46 | 45 | ||
47 | #define ugphy_printk(level, format, arg...) \ | 46 | #define ugphy_printk(level, format, arg...) \ |
48 | printk(level format "\n", ## arg) | 47 | printk(level format "\n", ## arg) |
@@ -72,16 +71,14 @@ static int genmii_read_status(struct ugeth_mii_info *mii_info); | |||
72 | u16 phy_read(struct ugeth_mii_info *mii_info, u16 regnum); | 71 | u16 phy_read(struct ugeth_mii_info *mii_info, u16 regnum); |
73 | void phy_write(struct ugeth_mii_info *mii_info, u16 regnum, u16 val); | 72 | void phy_write(struct ugeth_mii_info *mii_info, u16 regnum, u16 val); |
74 | 73 | ||
75 | static u8 *bcsr_regs = NULL; | ||
76 | |||
77 | /* Write value to the PHY for this device to the register at regnum, */ | 74 | /* Write value to the PHY for this device to the register at regnum, */ |
78 | /* waiting until the write is done before it returns. All PHY */ | 75 | /* waiting until the write is done before it returns. All PHY */ |
79 | /* configuration has to be done through the TSEC1 MIIM regs */ | 76 | /* configuration has to be done through the TSEC1 MIIM regs */ |
80 | void write_phy_reg(struct net_device *dev, int mii_id, int regnum, int value) | 77 | void write_phy_reg(struct net_device *dev, int mii_id, int regnum, int value) |
81 | { | 78 | { |
82 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 79 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
83 | ucc_mii_mng_t *mii_regs; | 80 | struct ucc_mii_mng *mii_regs; |
84 | enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum; | 81 | enum enet_tbi_mii_reg mii_reg = (enum enet_tbi_mii_reg) regnum; |
85 | u32 tmp_reg; | 82 | u32 tmp_reg; |
86 | 83 | ||
87 | ugphy_vdbg("%s: IN", __FUNCTION__); | 84 | ugphy_vdbg("%s: IN", __FUNCTION__); |
@@ -116,9 +113,9 @@ void write_phy_reg(struct net_device *dev, int mii_id, int regnum, int value) | |||
116 | /* configuration has to be done through the TSEC1 MIIM regs */ | 113 | /* configuration has to be done through the TSEC1 MIIM regs */ |
117 | int read_phy_reg(struct net_device *dev, int mii_id, int regnum) | 114 | int read_phy_reg(struct net_device *dev, int mii_id, int regnum) |
118 | { | 115 | { |
119 | ucc_geth_private_t *ugeth = netdev_priv(dev); | 116 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
120 | ucc_mii_mng_t *mii_regs; | 117 | struct ucc_mii_mng *mii_regs; |
121 | enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum; | 118 | enum enet_tbi_mii_reg mii_reg = (enum enet_tbi_mii_reg) regnum; |
122 | u32 tmp_reg; | 119 | u32 tmp_reg; |
123 | u16 value; | 120 | u16 value; |
124 | 121 | ||
@@ -634,11 +631,6 @@ static void dm9161_close(struct ugeth_mii_info *mii_info) | |||
634 | 631 | ||
635 | static int dm9161_ack_interrupt(struct ugeth_mii_info *mii_info) | 632 | static int dm9161_ack_interrupt(struct ugeth_mii_info *mii_info) |
636 | { | 633 | { |
637 | /* FIXME: This lines are for BUG fixing in the mpc8325. | ||
638 | Remove this from here when it's fixed */ | ||
639 | if (bcsr_regs == NULL) | ||
640 | bcsr_regs = (u8 *) ioremap(BCSR_PHYS_ADDR, BCSR_SIZE); | ||
641 | bcsr_regs[14] |= 0x40; | ||
642 | ugphy_vdbg("%s: IN", __FUNCTION__); | 634 | ugphy_vdbg("%s: IN", __FUNCTION__); |
643 | 635 | ||
644 | /* Clear the interrupts by reading the reg */ | 636 | /* Clear the interrupts by reading the reg */ |
@@ -650,12 +642,6 @@ Remove this from here when it's fixed */ | |||
650 | 642 | ||
651 | static int dm9161_config_intr(struct ugeth_mii_info *mii_info) | 643 | static int dm9161_config_intr(struct ugeth_mii_info *mii_info) |
652 | { | 644 | { |
653 | /* FIXME: This lines are for BUG fixing in the mpc8325. | ||
654 | Remove this from here when it's fixed */ | ||
655 | if (bcsr_regs == NULL) { | ||
656 | bcsr_regs = (u8 *) ioremap(BCSR_PHYS_ADDR, BCSR_SIZE); | ||
657 | bcsr_regs[14] &= ~0x40; | ||
658 | } | ||
659 | ugphy_vdbg("%s: IN", __FUNCTION__); | 645 | ugphy_vdbg("%s: IN", __FUNCTION__); |
660 | 646 | ||
661 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) | 647 | if (mii_info->interrupts == MII_INTERRUPT_ENABLED) |
diff --git a/drivers/net/ucc_geth_phy.h b/drivers/net/ucc_geth_phy.h index 2f98b8f1bb0a..f5740783670f 100644 --- a/drivers/net/ucc_geth_phy.h +++ b/drivers/net/ucc_geth_phy.h | |||
@@ -126,7 +126,7 @@ struct ugeth_mii_info { | |||
126 | /* And management functions */ | 126 | /* And management functions */ |
127 | struct phy_info *phyinfo; | 127 | struct phy_info *phyinfo; |
128 | 128 | ||
129 | ucc_mii_mng_t *mii_regs; | 129 | struct ucc_mii_mng *mii_regs; |
130 | 130 | ||
131 | /* forced speed & duplex (no autoneg) | 131 | /* forced speed & duplex (no autoneg) |
132 | * partner speed & duplex & pause (autoneg) | 132 | * partner speed & duplex & pause (autoneg) |
diff --git a/drivers/net/wan/Kconfig b/drivers/net/wan/Kconfig index 58b7efbb0750..b5d0d7fb647a 100644 --- a/drivers/net/wan/Kconfig +++ b/drivers/net/wan/Kconfig | |||
@@ -127,7 +127,7 @@ config LANMEDIA | |||
127 | # There is no way to detect a Sealevel board. Force it modular | 127 | # There is no way to detect a Sealevel board. Force it modular |
128 | config SEALEVEL_4021 | 128 | config SEALEVEL_4021 |
129 | tristate "Sealevel Systems 4021 support" | 129 | tristate "Sealevel Systems 4021 support" |
130 | depends on WAN && ISA && m && ISA_DMA_API | 130 | depends on WAN && ISA && m && ISA_DMA_API && INET |
131 | help | 131 | help |
132 | This is a driver for the Sealevel Systems ACB 56 serial I/O adapter. | 132 | This is a driver for the Sealevel Systems ACB 56 serial I/O adapter. |
133 | 133 | ||
diff --git a/drivers/net/wan/n2.c b/drivers/net/wan/n2.c index dcf46add3adf..5c322dfb79f6 100644 --- a/drivers/net/wan/n2.c +++ b/drivers/net/wan/n2.c | |||
@@ -500,7 +500,7 @@ static int __init n2_init(void) | |||
500 | #ifdef MODULE | 500 | #ifdef MODULE |
501 | printk(KERN_INFO "n2: no card initialized\n"); | 501 | printk(KERN_INFO "n2: no card initialized\n"); |
502 | #endif | 502 | #endif |
503 | return -ENOSYS; /* no parameters specified, abort */ | 503 | return -EINVAL; /* no parameters specified, abort */ |
504 | } | 504 | } |
505 | 505 | ||
506 | printk(KERN_INFO "%s\n", version); | 506 | printk(KERN_INFO "%s\n", version); |
@@ -538,11 +538,11 @@ static int __init n2_init(void) | |||
538 | n2_run(io, irq, ram, valid[0], valid[1]); | 538 | n2_run(io, irq, ram, valid[0], valid[1]); |
539 | 539 | ||
540 | if (*hw == '\x0') | 540 | if (*hw == '\x0') |
541 | return first_card ? 0 : -ENOSYS; | 541 | return first_card ? 0 : -EINVAL; |
542 | }while(*hw++ == ':'); | 542 | }while(*hw++ == ':'); |
543 | 543 | ||
544 | printk(KERN_ERR "n2: invalid hardware parameters\n"); | 544 | printk(KERN_ERR "n2: invalid hardware parameters\n"); |
545 | return first_card ? 0 : -ENOSYS; | 545 | return first_card ? 0 : -EINVAL; |
546 | } | 546 | } |
547 | 547 | ||
548 | 548 | ||
diff --git a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c index 5823e3bca178..36d1c3ff7078 100644 --- a/drivers/net/wan/pc300_drv.c +++ b/drivers/net/wan/pc300_drv.c | |||
@@ -2867,7 +2867,6 @@ static int ch_config(pc300dev_t * d) | |||
2867 | uclong clktype = chan->conf.phys_settings.clock_type; | 2867 | uclong clktype = chan->conf.phys_settings.clock_type; |
2868 | ucshort encoding = chan->conf.proto_settings.encoding; | 2868 | ucshort encoding = chan->conf.proto_settings.encoding; |
2869 | ucshort parity = chan->conf.proto_settings.parity; | 2869 | ucshort parity = chan->conf.proto_settings.parity; |
2870 | int tmc, br; | ||
2871 | ucchar md0, md2; | 2870 | ucchar md0, md2; |
2872 | 2871 | ||
2873 | /* Reset the channel */ | 2872 | /* Reset the channel */ |
@@ -2940,8 +2939,12 @@ static int ch_config(pc300dev_t * d) | |||
2940 | case PC300_RSV: | 2939 | case PC300_RSV: |
2941 | case PC300_X21: | 2940 | case PC300_X21: |
2942 | if (clktype == CLOCK_INT || clktype == CLOCK_TXINT) { | 2941 | if (clktype == CLOCK_INT || clktype == CLOCK_TXINT) { |
2942 | int tmc, br; | ||
2943 | |||
2943 | /* Calculate the clkrate parameters */ | 2944 | /* Calculate the clkrate parameters */ |
2944 | tmc = clock_rate_calc(clkrate, card->hw.clock, &br); | 2945 | tmc = clock_rate_calc(clkrate, card->hw.clock, &br); |
2946 | if (tmc < 0) | ||
2947 | return -EIO; | ||
2945 | cpc_writeb(scabase + M_REG(TMCT, ch), tmc); | 2948 | cpc_writeb(scabase + M_REG(TMCT, ch), tmc); |
2946 | cpc_writeb(scabase + M_REG(TXS, ch), | 2949 | cpc_writeb(scabase + M_REG(TXS, ch), |
2947 | (TXS_DTRXC | TXS_IBRG | br)); | 2950 | (TXS_DTRXC | TXS_IBRG | br)); |
@@ -3097,14 +3100,16 @@ static int cpc_attach(struct net_device *dev, unsigned short encoding, | |||
3097 | return 0; | 3100 | return 0; |
3098 | } | 3101 | } |
3099 | 3102 | ||
3100 | static void cpc_opench(pc300dev_t * d) | 3103 | static int cpc_opench(pc300dev_t * d) |
3101 | { | 3104 | { |
3102 | pc300ch_t *chan = (pc300ch_t *) d->chan; | 3105 | pc300ch_t *chan = (pc300ch_t *) d->chan; |
3103 | pc300_t *card = (pc300_t *) chan->card; | 3106 | pc300_t *card = (pc300_t *) chan->card; |
3104 | int ch = chan->channel; | 3107 | int ch = chan->channel, rc; |
3105 | void __iomem *scabase = card->hw.scabase; | 3108 | void __iomem *scabase = card->hw.scabase; |
3106 | 3109 | ||
3107 | ch_config(d); | 3110 | rc = ch_config(d); |
3111 | if (rc) | ||
3112 | return rc; | ||
3108 | 3113 | ||
3109 | rx_config(d); | 3114 | rx_config(d); |
3110 | 3115 | ||
@@ -3113,6 +3118,8 @@ static void cpc_opench(pc300dev_t * d) | |||
3113 | /* Assert RTS and DTR */ | 3118 | /* Assert RTS and DTR */ |
3114 | cpc_writeb(scabase + M_REG(CTL, ch), | 3119 | cpc_writeb(scabase + M_REG(CTL, ch), |
3115 | cpc_readb(scabase + M_REG(CTL, ch)) & ~(CTL_RTS | CTL_DTR)); | 3120 | cpc_readb(scabase + M_REG(CTL, ch)) & ~(CTL_RTS | CTL_DTR)); |
3121 | |||
3122 | return 0; | ||
3116 | } | 3123 | } |
3117 | 3124 | ||
3118 | static void cpc_closech(pc300dev_t * d) | 3125 | static void cpc_closech(pc300dev_t * d) |
@@ -3168,9 +3175,16 @@ int cpc_open(struct net_device *dev) | |||
3168 | } | 3175 | } |
3169 | 3176 | ||
3170 | sprintf(ifr.ifr_name, "%s", dev->name); | 3177 | sprintf(ifr.ifr_name, "%s", dev->name); |
3171 | cpc_opench(d); | 3178 | result = cpc_opench(d); |
3179 | if (result) | ||
3180 | goto err_out; | ||
3181 | |||
3172 | netif_start_queue(dev); | 3182 | netif_start_queue(dev); |
3173 | return 0; | 3183 | return 0; |
3184 | |||
3185 | err_out: | ||
3186 | hdlc_close(dev); | ||
3187 | return result; | ||
3174 | } | 3188 | } |
3175 | 3189 | ||
3176 | static int cpc_close(struct net_device *dev) | 3190 | static int cpc_close(struct net_device *dev) |
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index 0a33c8a56e13..efcdaf1c5f73 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -2897,6 +2897,8 @@ static struct net_device *_init_airo_card( unsigned short irq, int port, | |||
2897 | goto err_out_map; | 2897 | goto err_out_map; |
2898 | } | 2898 | } |
2899 | ai->wifidev = init_wifidev(ai, dev); | 2899 | ai->wifidev = init_wifidev(ai, dev); |
2900 | if (!ai->wifidev) | ||
2901 | goto err_out_reg; | ||
2900 | 2902 | ||
2901 | set_bit(FLAG_REGISTERED,&ai->flags); | 2903 | set_bit(FLAG_REGISTERED,&ai->flags); |
2902 | airo_print_info(dev->name, "MAC enabled %x:%x:%x:%x:%x:%x", | 2904 | airo_print_info(dev->name, "MAC enabled %x:%x:%x:%x:%x:%x", |
@@ -2908,11 +2910,18 @@ static struct net_device *_init_airo_card( unsigned short irq, int port, | |||
2908 | for( i = 0; i < MAX_FIDS; i++ ) | 2910 | for( i = 0; i < MAX_FIDS; i++ ) |
2909 | ai->fids[i] = transmit_allocate(ai,AIRO_DEF_MTU,i>=MAX_FIDS/2); | 2911 | ai->fids[i] = transmit_allocate(ai,AIRO_DEF_MTU,i>=MAX_FIDS/2); |
2910 | 2912 | ||
2911 | setup_proc_entry( dev, dev->priv ); /* XXX check for failure */ | 2913 | if (setup_proc_entry(dev, dev->priv) < 0) |
2914 | goto err_out_wifi; | ||
2915 | |||
2912 | netif_start_queue(dev); | 2916 | netif_start_queue(dev); |
2913 | SET_MODULE_OWNER(dev); | 2917 | SET_MODULE_OWNER(dev); |
2914 | return dev; | 2918 | return dev; |
2915 | 2919 | ||
2920 | err_out_wifi: | ||
2921 | unregister_netdev(ai->wifidev); | ||
2922 | free_netdev(ai->wifidev); | ||
2923 | err_out_reg: | ||
2924 | unregister_netdev(dev); | ||
2916 | err_out_map: | 2925 | err_out_map: |
2917 | if (test_bit(FLAG_MPI,&ai->flags) && pci) { | 2926 | if (test_bit(FLAG_MPI,&ai->flags) && pci) { |
2918 | pci_free_consistent(pci, PCI_SHARED_LEN, ai->shared, ai->shared_dma); | 2927 | pci_free_consistent(pci, PCI_SHARED_LEN, ai->shared, ai->shared_dma); |
@@ -3089,7 +3098,8 @@ static int airo_thread(void *data) { | |||
3089 | set_bit(JOB_AUTOWEP, &ai->jobs); | 3098 | set_bit(JOB_AUTOWEP, &ai->jobs); |
3090 | break; | 3099 | break; |
3091 | } | 3100 | } |
3092 | if (!kthread_should_stop()) { | 3101 | if (!kthread_should_stop() && |
3102 | !freezing(current)) { | ||
3093 | unsigned long wake_at; | 3103 | unsigned long wake_at; |
3094 | if (!ai->expires || !ai->scan_timeout) { | 3104 | if (!ai->expires || !ai->scan_timeout) { |
3095 | wake_at = max(ai->expires, | 3105 | wake_at = max(ai->expires, |
@@ -3101,7 +3111,8 @@ static int airo_thread(void *data) { | |||
3101 | schedule_timeout(wake_at - jiffies); | 3111 | schedule_timeout(wake_at - jiffies); |
3102 | continue; | 3112 | continue; |
3103 | } | 3113 | } |
3104 | } else if (!kthread_should_stop()) { | 3114 | } else if (!kthread_should_stop() && |
3115 | !freezing(current)) { | ||
3105 | schedule(); | 3116 | schedule(); |
3106 | continue; | 3117 | continue; |
3107 | } | 3118 | } |
@@ -4495,91 +4506,128 @@ static int setup_proc_entry( struct net_device *dev, | |||
4495 | apriv->proc_entry = create_proc_entry(apriv->proc_name, | 4506 | apriv->proc_entry = create_proc_entry(apriv->proc_name, |
4496 | S_IFDIR|airo_perm, | 4507 | S_IFDIR|airo_perm, |
4497 | airo_entry); | 4508 | airo_entry); |
4498 | apriv->proc_entry->uid = proc_uid; | 4509 | if (!apriv->proc_entry) |
4499 | apriv->proc_entry->gid = proc_gid; | 4510 | goto fail; |
4500 | apriv->proc_entry->owner = THIS_MODULE; | 4511 | apriv->proc_entry->uid = proc_uid; |
4512 | apriv->proc_entry->gid = proc_gid; | ||
4513 | apriv->proc_entry->owner = THIS_MODULE; | ||
4501 | 4514 | ||
4502 | /* Setup the StatsDelta */ | 4515 | /* Setup the StatsDelta */ |
4503 | entry = create_proc_entry("StatsDelta", | 4516 | entry = create_proc_entry("StatsDelta", |
4504 | S_IFREG | (S_IRUGO&proc_perm), | 4517 | S_IFREG | (S_IRUGO&proc_perm), |
4505 | apriv->proc_entry); | 4518 | apriv->proc_entry); |
4506 | entry->uid = proc_uid; | 4519 | if (!entry) |
4507 | entry->gid = proc_gid; | 4520 | goto fail_stats_delta; |
4521 | entry->uid = proc_uid; | ||
4522 | entry->gid = proc_gid; | ||
4508 | entry->data = dev; | 4523 | entry->data = dev; |
4509 | entry->owner = THIS_MODULE; | 4524 | entry->owner = THIS_MODULE; |
4510 | SETPROC_OPS(entry, proc_statsdelta_ops); | 4525 | SETPROC_OPS(entry, proc_statsdelta_ops); |
4511 | 4526 | ||
4512 | /* Setup the Stats */ | 4527 | /* Setup the Stats */ |
4513 | entry = create_proc_entry("Stats", | 4528 | entry = create_proc_entry("Stats", |
4514 | S_IFREG | (S_IRUGO&proc_perm), | 4529 | S_IFREG | (S_IRUGO&proc_perm), |
4515 | apriv->proc_entry); | 4530 | apriv->proc_entry); |
4516 | entry->uid = proc_uid; | 4531 | if (!entry) |
4517 | entry->gid = proc_gid; | 4532 | goto fail_stats; |
4533 | entry->uid = proc_uid; | ||
4534 | entry->gid = proc_gid; | ||
4518 | entry->data = dev; | 4535 | entry->data = dev; |
4519 | entry->owner = THIS_MODULE; | 4536 | entry->owner = THIS_MODULE; |
4520 | SETPROC_OPS(entry, proc_stats_ops); | 4537 | SETPROC_OPS(entry, proc_stats_ops); |
4521 | 4538 | ||
4522 | /* Setup the Status */ | 4539 | /* Setup the Status */ |
4523 | entry = create_proc_entry("Status", | 4540 | entry = create_proc_entry("Status", |
4524 | S_IFREG | (S_IRUGO&proc_perm), | 4541 | S_IFREG | (S_IRUGO&proc_perm), |
4525 | apriv->proc_entry); | 4542 | apriv->proc_entry); |
4526 | entry->uid = proc_uid; | 4543 | if (!entry) |
4527 | entry->gid = proc_gid; | 4544 | goto fail_status; |
4545 | entry->uid = proc_uid; | ||
4546 | entry->gid = proc_gid; | ||
4528 | entry->data = dev; | 4547 | entry->data = dev; |
4529 | entry->owner = THIS_MODULE; | 4548 | entry->owner = THIS_MODULE; |
4530 | SETPROC_OPS(entry, proc_status_ops); | 4549 | SETPROC_OPS(entry, proc_status_ops); |
4531 | 4550 | ||
4532 | /* Setup the Config */ | 4551 | /* Setup the Config */ |
4533 | entry = create_proc_entry("Config", | 4552 | entry = create_proc_entry("Config", |
4534 | S_IFREG | proc_perm, | 4553 | S_IFREG | proc_perm, |
4535 | apriv->proc_entry); | 4554 | apriv->proc_entry); |
4536 | entry->uid = proc_uid; | 4555 | if (!entry) |
4537 | entry->gid = proc_gid; | 4556 | goto fail_config; |
4557 | entry->uid = proc_uid; | ||
4558 | entry->gid = proc_gid; | ||
4538 | entry->data = dev; | 4559 | entry->data = dev; |
4539 | entry->owner = THIS_MODULE; | 4560 | entry->owner = THIS_MODULE; |
4540 | SETPROC_OPS(entry, proc_config_ops); | 4561 | SETPROC_OPS(entry, proc_config_ops); |
4541 | 4562 | ||
4542 | /* Setup the SSID */ | 4563 | /* Setup the SSID */ |
4543 | entry = create_proc_entry("SSID", | 4564 | entry = create_proc_entry("SSID", |
4544 | S_IFREG | proc_perm, | 4565 | S_IFREG | proc_perm, |
4545 | apriv->proc_entry); | 4566 | apriv->proc_entry); |
4546 | entry->uid = proc_uid; | 4567 | if (!entry) |
4547 | entry->gid = proc_gid; | 4568 | goto fail_ssid; |
4569 | entry->uid = proc_uid; | ||
4570 | entry->gid = proc_gid; | ||
4548 | entry->data = dev; | 4571 | entry->data = dev; |
4549 | entry->owner = THIS_MODULE; | 4572 | entry->owner = THIS_MODULE; |
4550 | SETPROC_OPS(entry, proc_SSID_ops); | 4573 | SETPROC_OPS(entry, proc_SSID_ops); |
4551 | 4574 | ||
4552 | /* Setup the APList */ | 4575 | /* Setup the APList */ |
4553 | entry = create_proc_entry("APList", | 4576 | entry = create_proc_entry("APList", |
4554 | S_IFREG | proc_perm, | 4577 | S_IFREG | proc_perm, |
4555 | apriv->proc_entry); | 4578 | apriv->proc_entry); |
4556 | entry->uid = proc_uid; | 4579 | if (!entry) |
4557 | entry->gid = proc_gid; | 4580 | goto fail_aplist; |
4581 | entry->uid = proc_uid; | ||
4582 | entry->gid = proc_gid; | ||
4558 | entry->data = dev; | 4583 | entry->data = dev; |
4559 | entry->owner = THIS_MODULE; | 4584 | entry->owner = THIS_MODULE; |
4560 | SETPROC_OPS(entry, proc_APList_ops); | 4585 | SETPROC_OPS(entry, proc_APList_ops); |
4561 | 4586 | ||
4562 | /* Setup the BSSList */ | 4587 | /* Setup the BSSList */ |
4563 | entry = create_proc_entry("BSSList", | 4588 | entry = create_proc_entry("BSSList", |
4564 | S_IFREG | proc_perm, | 4589 | S_IFREG | proc_perm, |
4565 | apriv->proc_entry); | 4590 | apriv->proc_entry); |
4591 | if (!entry) | ||
4592 | goto fail_bsslist; | ||
4566 | entry->uid = proc_uid; | 4593 | entry->uid = proc_uid; |
4567 | entry->gid = proc_gid; | 4594 | entry->gid = proc_gid; |
4568 | entry->data = dev; | 4595 | entry->data = dev; |
4569 | entry->owner = THIS_MODULE; | 4596 | entry->owner = THIS_MODULE; |
4570 | SETPROC_OPS(entry, proc_BSSList_ops); | 4597 | SETPROC_OPS(entry, proc_BSSList_ops); |
4571 | 4598 | ||
4572 | /* Setup the WepKey */ | 4599 | /* Setup the WepKey */ |
4573 | entry = create_proc_entry("WepKey", | 4600 | entry = create_proc_entry("WepKey", |
4574 | S_IFREG | proc_perm, | 4601 | S_IFREG | proc_perm, |
4575 | apriv->proc_entry); | 4602 | apriv->proc_entry); |
4576 | entry->uid = proc_uid; | 4603 | if (!entry) |
4577 | entry->gid = proc_gid; | 4604 | goto fail_wepkey; |
4605 | entry->uid = proc_uid; | ||
4606 | entry->gid = proc_gid; | ||
4578 | entry->data = dev; | 4607 | entry->data = dev; |
4579 | entry->owner = THIS_MODULE; | 4608 | entry->owner = THIS_MODULE; |
4580 | SETPROC_OPS(entry, proc_wepkey_ops); | 4609 | SETPROC_OPS(entry, proc_wepkey_ops); |
4581 | 4610 | ||
4582 | return 0; | 4611 | return 0; |
4612 | |||
4613 | fail_wepkey: | ||
4614 | remove_proc_entry("BSSList", apriv->proc_entry); | ||
4615 | fail_bsslist: | ||
4616 | remove_proc_entry("APList", apriv->proc_entry); | ||
4617 | fail_aplist: | ||
4618 | remove_proc_entry("SSID", apriv->proc_entry); | ||
4619 | fail_ssid: | ||
4620 | remove_proc_entry("Config", apriv->proc_entry); | ||
4621 | fail_config: | ||
4622 | remove_proc_entry("Status", apriv->proc_entry); | ||
4623 | fail_status: | ||
4624 | remove_proc_entry("Stats", apriv->proc_entry); | ||
4625 | fail_stats: | ||
4626 | remove_proc_entry("StatsDelta", apriv->proc_entry); | ||
4627 | fail_stats_delta: | ||
4628 | remove_proc_entry(apriv->proc_name, airo_entry); | ||
4629 | fail: | ||
4630 | return -ENOMEM; | ||
4583 | } | 4631 | } |
4584 | 4632 | ||
4585 | static int takedown_proc_entry( struct net_device *dev, | 4633 | static int takedown_proc_entry( struct net_device *dev, |
@@ -5924,7 +5972,6 @@ static int airo_get_essid(struct net_device *dev, | |||
5924 | 5972 | ||
5925 | /* Get the current SSID */ | 5973 | /* Get the current SSID */ |
5926 | memcpy(extra, status_rid.SSID, status_rid.SSIDlen); | 5974 | memcpy(extra, status_rid.SSID, status_rid.SSIDlen); |
5927 | extra[status_rid.SSIDlen] = '\0'; | ||
5928 | /* If none, we may want to get the one that was set */ | 5975 | /* If none, we may want to get the one that was set */ |
5929 | 5976 | ||
5930 | /* Push it out ! */ | 5977 | /* Push it out ! */ |
diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c index 31eed85de60f..0c07b8b7250d 100644 --- a/drivers/net/wireless/atmel.c +++ b/drivers/net/wireless/atmel.c | |||
@@ -1678,11 +1678,9 @@ static int atmel_get_essid(struct net_device *dev, | |||
1678 | /* Get the current SSID */ | 1678 | /* Get the current SSID */ |
1679 | if (priv->new_SSID_size != 0) { | 1679 | if (priv->new_SSID_size != 0) { |
1680 | memcpy(extra, priv->new_SSID, priv->new_SSID_size); | 1680 | memcpy(extra, priv->new_SSID, priv->new_SSID_size); |
1681 | extra[priv->new_SSID_size] = '\0'; | ||
1682 | dwrq->length = priv->new_SSID_size; | 1681 | dwrq->length = priv->new_SSID_size; |
1683 | } else { | 1682 | } else { |
1684 | memcpy(extra, priv->SSID, priv->SSID_size); | 1683 | memcpy(extra, priv->SSID, priv->SSID_size); |
1685 | extra[priv->SSID_size] = '\0'; | ||
1686 | dwrq->length = priv->SSID_size; | 1684 | dwrq->length = priv->SSID_size; |
1687 | } | 1685 | } |
1688 | 1686 | ||
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_dma.c b/drivers/net/wireless/bcm43xx/bcm43xx_dma.c index 76e3aed4b471..978ed099e285 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_dma.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_dma.c | |||
@@ -705,11 +705,30 @@ int bcm43xx_dma_init(struct bcm43xx_private *bcm) | |||
705 | struct bcm43xx_dmaring *ring; | 705 | struct bcm43xx_dmaring *ring; |
706 | int err = -ENOMEM; | 706 | int err = -ENOMEM; |
707 | int dma64 = 0; | 707 | int dma64 = 0; |
708 | u32 sbtmstatehi; | 708 | u64 mask = bcm43xx_get_supported_dma_mask(bcm); |
709 | int nobits; | ||
709 | 710 | ||
710 | sbtmstatehi = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH); | 711 | if (mask == DMA_64BIT_MASK) { |
711 | if (sbtmstatehi & BCM43xx_SBTMSTATEHIGH_DMA64BIT) | ||
712 | dma64 = 1; | 712 | dma64 = 1; |
713 | nobits = 64; | ||
714 | } else if (mask == DMA_32BIT_MASK) | ||
715 | nobits = 32; | ||
716 | else | ||
717 | nobits = 30; | ||
718 | err = pci_set_dma_mask(bcm->pci_dev, mask); | ||
719 | err |= pci_set_consistent_dma_mask(bcm->pci_dev, mask); | ||
720 | if (err) { | ||
721 | #ifdef CONFIG_BCM43XX_PIO | ||
722 | printk(KERN_WARNING PFX "DMA not supported on this device." | ||
723 | " Falling back to PIO.\n"); | ||
724 | bcm->__using_pio = 1; | ||
725 | return -ENOSYS; | ||
726 | #else | ||
727 | printk(KERN_ERR PFX "FATAL: DMA not supported and PIO not configured. " | ||
728 | "Please recompile the driver with PIO support.\n"); | ||
729 | return -ENODEV; | ||
730 | #endif /* CONFIG_BCM43XX_PIO */ | ||
731 | } | ||
713 | 732 | ||
714 | /* setup TX DMA channels. */ | 733 | /* setup TX DMA channels. */ |
715 | ring = bcm43xx_setup_dmaring(bcm, 0, 1, dma64); | 734 | ring = bcm43xx_setup_dmaring(bcm, 0, 1, dma64); |
@@ -755,8 +774,7 @@ int bcm43xx_dma_init(struct bcm43xx_private *bcm) | |||
755 | dma->rx_ring3 = ring; | 774 | dma->rx_ring3 = ring; |
756 | } | 775 | } |
757 | 776 | ||
758 | dprintk(KERN_INFO PFX "%s DMA initialized\n", | 777 | dprintk(KERN_INFO PFX "%d-bit DMA initialized\n", nobits); |
759 | dma64 ? "64-bit" : "32-bit"); | ||
760 | err = 0; | 778 | err = 0; |
761 | out: | 779 | out: |
762 | return err; | 780 | return err; |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_dma.h b/drivers/net/wireless/bcm43xx/bcm43xx_dma.h index e04bcaddd1d0..d1105e569a41 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_dma.h +++ b/drivers/net/wireless/bcm43xx/bcm43xx_dma.h | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <linux/list.h> | 4 | #include <linux/list.h> |
5 | #include <linux/spinlock.h> | 5 | #include <linux/spinlock.h> |
6 | #include <linux/workqueue.h> | 6 | #include <linux/workqueue.h> |
7 | #include <linux/dma-mapping.h> | ||
7 | #include <linux/linkage.h> | 8 | #include <linux/linkage.h> |
8 | #include <asm/atomic.h> | 9 | #include <asm/atomic.h> |
9 | 10 | ||
@@ -314,6 +315,23 @@ int bcm43xx_dma_tx(struct bcm43xx_private *bcm, | |||
314 | struct ieee80211_txb *txb); | 315 | struct ieee80211_txb *txb); |
315 | void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring); | 316 | void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring); |
316 | 317 | ||
318 | /* Helper function that returns the dma mask for this device. */ | ||
319 | static inline | ||
320 | u64 bcm43xx_get_supported_dma_mask(struct bcm43xx_private *bcm) | ||
321 | { | ||
322 | int dma64 = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH) & | ||
323 | BCM43xx_SBTMSTATEHIGH_DMA64BIT; | ||
324 | u16 mmio_base = bcm43xx_dmacontroller_base(dma64, 0); | ||
325 | u32 mask = BCM43xx_DMA32_TXADDREXT_MASK; | ||
326 | |||
327 | if (dma64) | ||
328 | return DMA_64BIT_MASK; | ||
329 | bcm43xx_write32(bcm, mmio_base + BCM43xx_DMA32_TXCTL, mask); | ||
330 | if (bcm43xx_read32(bcm, mmio_base + BCM43xx_DMA32_TXCTL) & mask) | ||
331 | return DMA_32BIT_MASK; | ||
332 | return DMA_30BIT_MASK; | ||
333 | } | ||
334 | |||
317 | #else /* CONFIG_BCM43XX_DMA */ | 335 | #else /* CONFIG_BCM43XX_DMA */ |
318 | 336 | ||
319 | 337 | ||
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_leds.c b/drivers/net/wireless/bcm43xx/bcm43xx_leds.c index c3f90c8563d9..7d383a27b927 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_leds.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_leds.c | |||
@@ -189,20 +189,24 @@ void bcm43xx_leds_update(struct bcm43xx_private *bcm, int activity) | |||
189 | case BCM43xx_LED_INACTIVE: | 189 | case BCM43xx_LED_INACTIVE: |
190 | continue; | 190 | continue; |
191 | case BCM43xx_LED_OFF: | 191 | case BCM43xx_LED_OFF: |
192 | case BCM43xx_LED_BCM4303_3: | ||
192 | break; | 193 | break; |
193 | case BCM43xx_LED_ON: | 194 | case BCM43xx_LED_ON: |
194 | turn_on = 1; | 195 | turn_on = 1; |
195 | break; | 196 | break; |
196 | case BCM43xx_LED_ACTIVITY: | 197 | case BCM43xx_LED_ACTIVITY: |
198 | case BCM43xx_LED_BCM4303_0: | ||
197 | turn_on = activity; | 199 | turn_on = activity; |
198 | break; | 200 | break; |
199 | case BCM43xx_LED_RADIO_ALL: | 201 | case BCM43xx_LED_RADIO_ALL: |
200 | turn_on = radio->enabled; | 202 | turn_on = radio->enabled; |
201 | break; | 203 | break; |
202 | case BCM43xx_LED_RADIO_A: | 204 | case BCM43xx_LED_RADIO_A: |
205 | case BCM43xx_LED_BCM4303_2: | ||
203 | turn_on = (radio->enabled && phy->type == BCM43xx_PHYTYPE_A); | 206 | turn_on = (radio->enabled && phy->type == BCM43xx_PHYTYPE_A); |
204 | break; | 207 | break; |
205 | case BCM43xx_LED_RADIO_B: | 208 | case BCM43xx_LED_RADIO_B: |
209 | case BCM43xx_LED_BCM4303_1: | ||
206 | turn_on = (radio->enabled && | 210 | turn_on = (radio->enabled && |
207 | (phy->type == BCM43xx_PHYTYPE_B || | 211 | (phy->type == BCM43xx_PHYTYPE_B || |
208 | phy->type == BCM43xx_PHYTYPE_G)); | 212 | phy->type == BCM43xx_PHYTYPE_G)); |
@@ -242,7 +246,7 @@ void bcm43xx_leds_update(struct bcm43xx_private *bcm, int activity) | |||
242 | //TODO | 246 | //TODO |
243 | break; | 247 | break; |
244 | case BCM43xx_LED_ASSOC: | 248 | case BCM43xx_LED_ASSOC: |
245 | if (bcm->softmac->associated) | 249 | if (bcm->softmac->associnfo.associated) |
246 | turn_on = 1; | 250 | turn_on = 1; |
247 | break; | 251 | break; |
248 | #ifdef CONFIG_BCM43XX_DEBUG | 252 | #ifdef CONFIG_BCM43XX_DEBUG |
@@ -257,7 +261,8 @@ void bcm43xx_leds_update(struct bcm43xx_private *bcm, int activity) | |||
257 | continue; | 261 | continue; |
258 | #endif /* CONFIG_BCM43XX_DEBUG */ | 262 | #endif /* CONFIG_BCM43XX_DEBUG */ |
259 | default: | 263 | default: |
260 | assert(0); | 264 | dprintkl(KERN_INFO PFX "Bad value in leds_update," |
265 | " led->behaviour: 0x%x\n", led->behaviour); | ||
261 | }; | 266 | }; |
262 | 267 | ||
263 | if (led->activelow) | 268 | if (led->activelow) |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_leds.h b/drivers/net/wireless/bcm43xx/bcm43xx_leds.h index d3716cf3aebc..811e14a81198 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_leds.h +++ b/drivers/net/wireless/bcm43xx/bcm43xx_leds.h | |||
@@ -46,6 +46,12 @@ enum { /* LED behaviour values */ | |||
46 | BCM43xx_LED_TEST_BLINKSLOW, | 46 | BCM43xx_LED_TEST_BLINKSLOW, |
47 | BCM43xx_LED_TEST_BLINKMEDIUM, | 47 | BCM43xx_LED_TEST_BLINKMEDIUM, |
48 | BCM43xx_LED_TEST_BLINKFAST, | 48 | BCM43xx_LED_TEST_BLINKFAST, |
49 | |||
50 | /* Misc values for BCM4303 */ | ||
51 | BCM43xx_LED_BCM4303_0 = 0x2B, | ||
52 | BCM43xx_LED_BCM4303_1 = 0x78, | ||
53 | BCM43xx_LED_BCM4303_2 = 0x2E, | ||
54 | BCM43xx_LED_BCM4303_3 = 0x19, | ||
49 | }; | 55 | }; |
50 | 56 | ||
51 | int bcm43xx_leds_init(struct bcm43xx_private *bcm); | 57 | int bcm43xx_leds_init(struct bcm43xx_private *bcm); |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.c b/drivers/net/wireless/bcm43xx/bcm43xx_main.c index bad3452ea893..a1b783813d8e 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_main.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.c | |||
@@ -746,7 +746,7 @@ int bcm43xx_sprom_write(struct bcm43xx_private *bcm, const u16 *sprom) | |||
746 | if (err) | 746 | if (err) |
747 | goto err_ctlreg; | 747 | goto err_ctlreg; |
748 | spromctl |= 0x10; /* SPROM WRITE enable. */ | 748 | spromctl |= 0x10; /* SPROM WRITE enable. */ |
749 | bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_SPROMCTL, spromctl); | 749 | err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_SPROMCTL, spromctl); |
750 | if (err) | 750 | if (err) |
751 | goto err_ctlreg; | 751 | goto err_ctlreg; |
752 | /* We must burn lots of CPU cycles here, but that does not | 752 | /* We must burn lots of CPU cycles here, but that does not |
@@ -768,7 +768,7 @@ int bcm43xx_sprom_write(struct bcm43xx_private *bcm, const u16 *sprom) | |||
768 | mdelay(20); | 768 | mdelay(20); |
769 | } | 769 | } |
770 | spromctl &= ~0x10; /* SPROM WRITE enable. */ | 770 | spromctl &= ~0x10; /* SPROM WRITE enable. */ |
771 | bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_SPROMCTL, spromctl); | 771 | err = bcm43xx_pci_write_config32(bcm, BCM43xx_PCICFG_SPROMCTL, spromctl); |
772 | if (err) | 772 | if (err) |
773 | goto err_ctlreg; | 773 | goto err_ctlreg; |
774 | mdelay(500); | 774 | mdelay(500); |
@@ -1463,6 +1463,23 @@ static void handle_irq_transmit_status(struct bcm43xx_private *bcm) | |||
1463 | } | 1463 | } |
1464 | } | 1464 | } |
1465 | 1465 | ||
1466 | static void drain_txstatus_queue(struct bcm43xx_private *bcm) | ||
1467 | { | ||
1468 | u32 dummy; | ||
1469 | |||
1470 | if (bcm->current_core->rev < 5) | ||
1471 | return; | ||
1472 | /* Read all entries from the microcode TXstatus FIFO | ||
1473 | * and throw them away. | ||
1474 | */ | ||
1475 | while (1) { | ||
1476 | dummy = bcm43xx_read32(bcm, BCM43xx_MMIO_XMITSTAT_0); | ||
1477 | if (!dummy) | ||
1478 | break; | ||
1479 | dummy = bcm43xx_read32(bcm, BCM43xx_MMIO_XMITSTAT_1); | ||
1480 | } | ||
1481 | } | ||
1482 | |||
1466 | static void bcm43xx_generate_noise_sample(struct bcm43xx_private *bcm) | 1483 | static void bcm43xx_generate_noise_sample(struct bcm43xx_private *bcm) |
1467 | { | 1484 | { |
1468 | bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x408, 0x7F7F); | 1485 | bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x408, 0x7F7F); |
@@ -2925,10 +2942,13 @@ static int bcm43xx_wireless_core_init(struct bcm43xx_private *bcm, | |||
2925 | bcm43xx_write16(bcm, 0x043C, 0x000C); | 2942 | bcm43xx_write16(bcm, 0x043C, 0x000C); |
2926 | 2943 | ||
2927 | if (active_wlcore) { | 2944 | if (active_wlcore) { |
2928 | if (bcm43xx_using_pio(bcm)) | 2945 | if (bcm43xx_using_pio(bcm)) { |
2929 | err = bcm43xx_pio_init(bcm); | 2946 | err = bcm43xx_pio_init(bcm); |
2930 | else | 2947 | } else { |
2931 | err = bcm43xx_dma_init(bcm); | 2948 | err = bcm43xx_dma_init(bcm); |
2949 | if (err == -ENOSYS) | ||
2950 | err = bcm43xx_pio_init(bcm); | ||
2951 | } | ||
2932 | if (err) | 2952 | if (err) |
2933 | goto err_chip_cleanup; | 2953 | goto err_chip_cleanup; |
2934 | } | 2954 | } |
@@ -3160,17 +3180,30 @@ static int estimate_periodic_work_badness(unsigned int state) | |||
3160 | static void bcm43xx_periodic_work_handler(void *d) | 3180 | static void bcm43xx_periodic_work_handler(void *d) |
3161 | { | 3181 | { |
3162 | struct bcm43xx_private *bcm = d; | 3182 | struct bcm43xx_private *bcm = d; |
3183 | struct net_device *net_dev = bcm->net_dev; | ||
3163 | unsigned long flags; | 3184 | unsigned long flags; |
3164 | u32 savedirqs = 0; | 3185 | u32 savedirqs = 0; |
3165 | int badness; | 3186 | int badness; |
3187 | unsigned long orig_trans_start = 0; | ||
3166 | 3188 | ||
3189 | mutex_lock(&bcm->mutex); | ||
3167 | badness = estimate_periodic_work_badness(bcm->periodic_state); | 3190 | badness = estimate_periodic_work_badness(bcm->periodic_state); |
3168 | if (badness > BADNESS_LIMIT) { | 3191 | if (badness > BADNESS_LIMIT) { |
3169 | /* Periodic work will take a long time, so we want it to | 3192 | /* Periodic work will take a long time, so we want it to |
3170 | * be preemtible. | 3193 | * be preemtible. |
3171 | */ | 3194 | */ |
3172 | mutex_lock(&bcm->mutex); | 3195 | |
3173 | netif_tx_disable(bcm->net_dev); | 3196 | netif_tx_lock_bh(net_dev); |
3197 | /* We must fake a started transmission here, as we are going to | ||
3198 | * disable TX. If we wouldn't fake a TX, it would be possible to | ||
3199 | * trigger the netdev watchdog, if the last real TX is already | ||
3200 | * some time on the past (slightly less than 5secs) | ||
3201 | */ | ||
3202 | orig_trans_start = net_dev->trans_start; | ||
3203 | net_dev->trans_start = jiffies; | ||
3204 | netif_stop_queue(net_dev); | ||
3205 | netif_tx_unlock_bh(net_dev); | ||
3206 | |||
3174 | spin_lock_irqsave(&bcm->irq_lock, flags); | 3207 | spin_lock_irqsave(&bcm->irq_lock, flags); |
3175 | bcm43xx_mac_suspend(bcm); | 3208 | bcm43xx_mac_suspend(bcm); |
3176 | if (bcm43xx_using_pio(bcm)) | 3209 | if (bcm43xx_using_pio(bcm)) |
@@ -3182,7 +3215,6 @@ static void bcm43xx_periodic_work_handler(void *d) | |||
3182 | /* Periodic work should take short time, so we want low | 3215 | /* Periodic work should take short time, so we want low |
3183 | * locking overhead. | 3216 | * locking overhead. |
3184 | */ | 3217 | */ |
3185 | mutex_lock(&bcm->mutex); | ||
3186 | spin_lock_irqsave(&bcm->irq_lock, flags); | 3218 | spin_lock_irqsave(&bcm->irq_lock, flags); |
3187 | } | 3219 | } |
3188 | 3220 | ||
@@ -3196,6 +3228,7 @@ static void bcm43xx_periodic_work_handler(void *d) | |||
3196 | bcm43xx_pio_thaw_txqueues(bcm); | 3228 | bcm43xx_pio_thaw_txqueues(bcm); |
3197 | bcm43xx_mac_enable(bcm); | 3229 | bcm43xx_mac_enable(bcm); |
3198 | netif_wake_queue(bcm->net_dev); | 3230 | netif_wake_queue(bcm->net_dev); |
3231 | net_dev->trans_start = orig_trans_start; | ||
3199 | } | 3232 | } |
3200 | mmiowb(); | 3233 | mmiowb(); |
3201 | spin_unlock_irqrestore(&bcm->irq_lock, flags); | 3234 | spin_unlock_irqrestore(&bcm->irq_lock, flags); |
@@ -3516,6 +3549,7 @@ int bcm43xx_select_wireless_core(struct bcm43xx_private *bcm, | |||
3516 | bcm43xx_macfilter_clear(bcm, BCM43xx_MACFILTER_ASSOC); | 3549 | bcm43xx_macfilter_clear(bcm, BCM43xx_MACFILTER_ASSOC); |
3517 | bcm43xx_macfilter_set(bcm, BCM43xx_MACFILTER_SELF, (u8 *)(bcm->net_dev->dev_addr)); | 3550 | bcm43xx_macfilter_set(bcm, BCM43xx_MACFILTER_SELF, (u8 *)(bcm->net_dev->dev_addr)); |
3518 | bcm43xx_security_init(bcm); | 3551 | bcm43xx_security_init(bcm); |
3552 | drain_txstatus_queue(bcm); | ||
3519 | ieee80211softmac_start(bcm->net_dev); | 3553 | ieee80211softmac_start(bcm->net_dev); |
3520 | 3554 | ||
3521 | /* Let's go! Be careful after enabling the IRQs. | 3555 | /* Let's go! Be careful after enabling the IRQs. |
@@ -3993,8 +4027,6 @@ static int bcm43xx_init_private(struct bcm43xx_private *bcm, | |||
3993 | struct net_device *net_dev, | 4027 | struct net_device *net_dev, |
3994 | struct pci_dev *pci_dev) | 4028 | struct pci_dev *pci_dev) |
3995 | { | 4029 | { |
3996 | int err; | ||
3997 | |||
3998 | bcm43xx_set_status(bcm, BCM43xx_STAT_UNINIT); | 4030 | bcm43xx_set_status(bcm, BCM43xx_STAT_UNINIT); |
3999 | bcm->ieee = netdev_priv(net_dev); | 4031 | bcm->ieee = netdev_priv(net_dev); |
4000 | bcm->softmac = ieee80211_priv(net_dev); | 4032 | bcm->softmac = ieee80211_priv(net_dev); |
@@ -4012,22 +4044,8 @@ static int bcm43xx_init_private(struct bcm43xx_private *bcm, | |||
4012 | (void (*)(unsigned long))bcm43xx_interrupt_tasklet, | 4044 | (void (*)(unsigned long))bcm43xx_interrupt_tasklet, |
4013 | (unsigned long)bcm); | 4045 | (unsigned long)bcm); |
4014 | tasklet_disable_nosync(&bcm->isr_tasklet); | 4046 | tasklet_disable_nosync(&bcm->isr_tasklet); |
4015 | if (modparam_pio) { | 4047 | if (modparam_pio) |
4016 | bcm->__using_pio = 1; | 4048 | bcm->__using_pio = 1; |
4017 | } else { | ||
4018 | err = pci_set_dma_mask(pci_dev, DMA_30BIT_MASK); | ||
4019 | err |= pci_set_consistent_dma_mask(pci_dev, DMA_30BIT_MASK); | ||
4020 | if (err) { | ||
4021 | #ifdef CONFIG_BCM43XX_PIO | ||
4022 | printk(KERN_WARNING PFX "DMA not supported. Falling back to PIO.\n"); | ||
4023 | bcm->__using_pio = 1; | ||
4024 | #else | ||
4025 | printk(KERN_ERR PFX "FATAL: DMA not supported and PIO not configured. " | ||
4026 | "Recompile the driver with PIO support, please.\n"); | ||
4027 | return -ENODEV; | ||
4028 | #endif /* CONFIG_BCM43XX_PIO */ | ||
4029 | } | ||
4030 | } | ||
4031 | bcm->rts_threshold = BCM43xx_DEFAULT_RTS_THRESHOLD; | 4049 | bcm->rts_threshold = BCM43xx_DEFAULT_RTS_THRESHOLD; |
4032 | 4050 | ||
4033 | /* default to sw encryption for now */ | 4051 | /* default to sw encryption for now */ |
@@ -4208,7 +4226,11 @@ static int bcm43xx_resume(struct pci_dev *pdev) | |||
4208 | dprintk(KERN_INFO PFX "Resuming...\n"); | 4226 | dprintk(KERN_INFO PFX "Resuming...\n"); |
4209 | 4227 | ||
4210 | pci_set_power_state(pdev, 0); | 4228 | pci_set_power_state(pdev, 0); |
4211 | pci_enable_device(pdev); | 4229 | err = pci_enable_device(pdev); |
4230 | if (err) { | ||
4231 | printk(KERN_ERR PFX "Failure with pci_enable_device!\n"); | ||
4232 | return err; | ||
4233 | } | ||
4212 | pci_restore_state(pdev); | 4234 | pci_restore_state(pdev); |
4213 | 4235 | ||
4214 | bcm43xx_chipset_attach(bcm); | 4236 | bcm43xx_chipset_attach(bcm); |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_wx.c b/drivers/net/wireless/bcm43xx/bcm43xx_wx.c index 9b7b15cf6561..d27016f8c736 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_wx.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_wx.c | |||
@@ -847,7 +847,7 @@ static struct iw_statistics *bcm43xx_get_wireless_stats(struct net_device *net_d | |||
847 | unsigned long flags; | 847 | unsigned long flags; |
848 | 848 | ||
849 | wstats = &bcm->stats.wstats; | 849 | wstats = &bcm->stats.wstats; |
850 | if (!mac->associated) { | 850 | if (!mac->associnfo.associated) { |
851 | wstats->miss.beacon = 0; | 851 | wstats->miss.beacon = 0; |
852 | // bcm->ieee->ieee_stats.tx_retry_limit_exceeded = 0; // FIXME: should this be cleared here? | 852 | // bcm->ieee->ieee_stats.tx_retry_limit_exceeded = 0; // FIXME: should this be cleared here? |
853 | wstats->discard.retries = 0; | 853 | wstats->discard.retries = 0; |
diff --git a/drivers/net/wireless/hostap/hostap_cs.c b/drivers/net/wireless/hostap/hostap_cs.c index 686d895116de..f63909e4bc32 100644 --- a/drivers/net/wireless/hostap/hostap_cs.c +++ b/drivers/net/wireless/hostap/hostap_cs.c | |||
@@ -887,6 +887,13 @@ static struct pcmcia_device_id hostap_cs_ids[] = { | |||
887 | PCMCIA_DEVICE_PROD_ID123( | 887 | PCMCIA_DEVICE_PROD_ID123( |
888 | "U.S. Robotics", "IEEE 802.11b PC-CARD", "Version 01.02", | 888 | "U.S. Robotics", "IEEE 802.11b PC-CARD", "Version 01.02", |
889 | 0xc7b8df9d, 0x1700d087, 0x4b74baa0), | 889 | 0xc7b8df9d, 0x1700d087, 0x4b74baa0), |
890 | PCMCIA_DEVICE_PROD_ID123( | ||
891 | "Allied Telesyn", "AT-WCL452 Wireless PCMCIA Radio", | ||
892 | "Ver. 1.00", | ||
893 | 0x5cd01705, 0x4271660f, 0x9d08ee12), | ||
894 | PCMCIA_DEVICE_PROD_ID123( | ||
895 | "corega", "WL PCCL-11", "ISL37300P", | ||
896 | 0xa21501a, 0x59868926, 0xc9049a39), | ||
890 | PCMCIA_DEVICE_NULL | 897 | PCMCIA_DEVICE_NULL |
891 | }; | 898 | }; |
892 | MODULE_DEVICE_TABLE(pcmcia, hostap_cs_ids); | 899 | MODULE_DEVICE_TABLE(pcmcia, hostap_cs_ids); |
diff --git a/drivers/net/wireless/hostap/hostap_plx.c b/drivers/net/wireless/hostap/hostap_plx.c index 6dfa041be66d..bc81b13a5a2a 100644 --- a/drivers/net/wireless/hostap/hostap_plx.c +++ b/drivers/net/wireless/hostap/hostap_plx.c | |||
@@ -364,7 +364,7 @@ static int prism2_plx_check_cis(void __iomem *attr_mem, int attr_len, | |||
364 | 364 | ||
365 | pos = 0; | 365 | pos = 0; |
366 | while (pos < CIS_MAX_LEN - 1 && cis[pos] != CISTPL_END) { | 366 | while (pos < CIS_MAX_LEN - 1 && cis[pos] != CISTPL_END) { |
367 | if (pos + cis[pos + 1] >= CIS_MAX_LEN) | 367 | if (pos + 2 + cis[pos + 1] > CIS_MAX_LEN) |
368 | goto cis_error; | 368 | goto cis_error; |
369 | 369 | ||
370 | switch (cis[pos]) { | 370 | switch (cis[pos]) { |
@@ -391,7 +391,7 @@ static int prism2_plx_check_cis(void __iomem *attr_mem, int attr_len, | |||
391 | break; | 391 | break; |
392 | 392 | ||
393 | case CISTPL_MANFID: | 393 | case CISTPL_MANFID: |
394 | if (cis[pos + 1] < 5) | 394 | if (cis[pos + 1] < 4) |
395 | goto cis_error; | 395 | goto cis_error; |
396 | manfid1 = cis[pos + 2] + (cis[pos + 3] << 8); | 396 | manfid1 = cis[pos + 2] + (cis[pos + 3] << 8); |
397 | manfid2 = cis[pos + 4] + (cis[pos + 5] << 8); | 397 | manfid2 = cis[pos + 4] + (cis[pos + 5] << 8); |
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c index b779c7dcc1a8..336cabac13b3 100644 --- a/drivers/net/wireless/orinoco.c +++ b/drivers/net/wireless/orinoco.c | |||
@@ -2457,6 +2457,7 @@ void free_orinocodev(struct net_device *dev) | |||
2457 | /* Wireless extensions */ | 2457 | /* Wireless extensions */ |
2458 | /********************************************************************/ | 2458 | /********************************************************************/ |
2459 | 2459 | ||
2460 | /* Return : < 0 -> error code ; >= 0 -> length */ | ||
2460 | static int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, | 2461 | static int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, |
2461 | char buf[IW_ESSID_MAX_SIZE+1]) | 2462 | char buf[IW_ESSID_MAX_SIZE+1]) |
2462 | { | 2463 | { |
@@ -2501,9 +2502,9 @@ static int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, | |||
2501 | len = le16_to_cpu(essidbuf.len); | 2502 | len = le16_to_cpu(essidbuf.len); |
2502 | BUG_ON(len > IW_ESSID_MAX_SIZE); | 2503 | BUG_ON(len > IW_ESSID_MAX_SIZE); |
2503 | 2504 | ||
2504 | memset(buf, 0, IW_ESSID_MAX_SIZE+1); | 2505 | memset(buf, 0, IW_ESSID_MAX_SIZE); |
2505 | memcpy(buf, p, len); | 2506 | memcpy(buf, p, len); |
2506 | buf[len] = '\0'; | 2507 | err = len; |
2507 | 2508 | ||
2508 | fail_unlock: | 2509 | fail_unlock: |
2509 | orinoco_unlock(priv, &flags); | 2510 | orinoco_unlock(priv, &flags); |
@@ -3027,17 +3028,18 @@ static int orinoco_ioctl_getessid(struct net_device *dev, | |||
3027 | 3028 | ||
3028 | if (netif_running(dev)) { | 3029 | if (netif_running(dev)) { |
3029 | err = orinoco_hw_get_essid(priv, &active, essidbuf); | 3030 | err = orinoco_hw_get_essid(priv, &active, essidbuf); |
3030 | if (err) | 3031 | if (err < 0) |
3031 | return err; | 3032 | return err; |
3033 | erq->length = err; | ||
3032 | } else { | 3034 | } else { |
3033 | if (orinoco_lock(priv, &flags) != 0) | 3035 | if (orinoco_lock(priv, &flags) != 0) |
3034 | return -EBUSY; | 3036 | return -EBUSY; |
3035 | memcpy(essidbuf, priv->desired_essid, IW_ESSID_MAX_SIZE + 1); | 3037 | memcpy(essidbuf, priv->desired_essid, IW_ESSID_MAX_SIZE); |
3038 | erq->length = strlen(priv->desired_essid); | ||
3036 | orinoco_unlock(priv, &flags); | 3039 | orinoco_unlock(priv, &flags); |
3037 | } | 3040 | } |
3038 | 3041 | ||
3039 | erq->flags = 1; | 3042 | erq->flags = 1; |
3040 | erq->length = strlen(essidbuf); | ||
3041 | 3043 | ||
3042 | return 0; | 3044 | return 0; |
3043 | } | 3045 | } |
@@ -3075,10 +3077,10 @@ static int orinoco_ioctl_getnick(struct net_device *dev, | |||
3075 | if (orinoco_lock(priv, &flags) != 0) | 3077 | if (orinoco_lock(priv, &flags) != 0) |
3076 | return -EBUSY; | 3078 | return -EBUSY; |
3077 | 3079 | ||
3078 | memcpy(nickbuf, priv->nick, IW_ESSID_MAX_SIZE+1); | 3080 | memcpy(nickbuf, priv->nick, IW_ESSID_MAX_SIZE); |
3079 | orinoco_unlock(priv, &flags); | 3081 | orinoco_unlock(priv, &flags); |
3080 | 3082 | ||
3081 | nrq->length = strlen(nickbuf); | 3083 | nrq->length = strlen(priv->nick); |
3082 | 3084 | ||
3083 | return 0; | 3085 | return 0; |
3084 | } | 3086 | } |
diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c index 0b381d77015c..7fbfc9e41d07 100644 --- a/drivers/net/wireless/ray_cs.c +++ b/drivers/net/wireless/ray_cs.c | |||
@@ -1198,7 +1198,6 @@ static int ray_get_essid(struct net_device *dev, | |||
1198 | 1198 | ||
1199 | /* Get the essid that was set */ | 1199 | /* Get the essid that was set */ |
1200 | memcpy(extra, local->sparm.b5.a_current_ess_id, IW_ESSID_MAX_SIZE); | 1200 | memcpy(extra, local->sparm.b5.a_current_ess_id, IW_ESSID_MAX_SIZE); |
1201 | extra[IW_ESSID_MAX_SIZE] = '\0'; | ||
1202 | 1201 | ||
1203 | /* Push it out ! */ | 1202 | /* Push it out ! */ |
1204 | dwrq->length = strlen(extra); | 1203 | dwrq->length = strlen(extra); |
diff --git a/drivers/net/wireless/zd1201.c b/drivers/net/wireless/zd1201.c index 30057a335a7b..36b29ff05814 100644 --- a/drivers/net/wireless/zd1201.c +++ b/drivers/net/wireless/zd1201.c | |||
@@ -193,10 +193,8 @@ static void zd1201_usbrx(struct urb *urb) | |||
193 | struct sk_buff *skb; | 193 | struct sk_buff *skb; |
194 | unsigned char type; | 194 | unsigned char type; |
195 | 195 | ||
196 | if (!zd) { | 196 | if (!zd) |
197 | free = 1; | 197 | return; |
198 | goto exit; | ||
199 | } | ||
200 | 198 | ||
201 | switch(urb->status) { | 199 | switch(urb->status) { |
202 | case -EILSEQ: | 200 | case -EILSEQ: |
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c index 2d12837052b0..a7d29bddb298 100644 --- a/drivers/net/wireless/zd1211rw/zd_mac.c +++ b/drivers/net/wireless/zd1211rw/zd_mac.c | |||
@@ -1099,7 +1099,7 @@ static void link_led_handler(void *p) | |||
1099 | int r; | 1099 | int r; |
1100 | 1100 | ||
1101 | spin_lock_irq(&mac->lock); | 1101 | spin_lock_irq(&mac->lock); |
1102 | is_associated = sm->associated != 0; | 1102 | is_associated = sm->associnfo.associated != 0; |
1103 | spin_unlock_irq(&mac->lock); | 1103 | spin_unlock_irq(&mac->lock); |
1104 | 1104 | ||
1105 | r = zd_chip_control_leds(chip, | 1105 | r = zd_chip_control_leds(chip, |