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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-02 16:38:27 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-02 16:38:27 -0400
commitaecdc33e111b2c447b622e287c6003726daa1426 (patch)
tree3e7657eae4b785e1a1fb5dfb225dbae0b2f0cfc6 /drivers/net/wireless/rt2x00
parenta20acf99f75e49271381d65db097c9763060a1e8 (diff)
parenta3a6cab5ea10cca64d036851fe0d932448f2fe4f (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking changes from David Miller: 1) GRE now works over ipv6, from Dmitry Kozlov. 2) Make SCTP more network namespace aware, from Eric Biederman. 3) TEAM driver now works with non-ethernet devices, from Jiri Pirko. 4) Make openvswitch network namespace aware, from Pravin B Shelar. 5) IPV6 NAT implementation, from Patrick McHardy. 6) Server side support for TCP Fast Open, from Jerry Chu and others. 7) Packet BPF filter supports MOD and XOR, from Eric Dumazet and Daniel Borkmann. 8) Increate the loopback default MTU to 64K, from Eric Dumazet. 9) Use a per-task rather than per-socket page fragment allocator for outgoing networking traffic. This benefits processes that have very many mostly idle sockets, which is quite common. From Eric Dumazet. 10) Use up to 32K for page fragment allocations, with fallbacks to smaller sizes when higher order page allocations fail. Benefits are a) less segments for driver to process b) less calls to page allocator c) less waste of space. From Eric Dumazet. 11) Allow GRO to be used on GRE tunnels, from Eric Dumazet. 12) VXLAN device driver, one way to handle VLAN issues such as the limitation of 4096 VLAN IDs yet still have some level of isolation. From Stephen Hemminger. 13) As usual there is a large boatload of driver changes, with the scale perhaps tilted towards the wireless side this time around. Fix up various fairly trivial conflicts, mostly caused by the user namespace changes. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1012 commits) hyperv: Add buffer for extended info after the RNDIS response message. hyperv: Report actual status in receive completion packet hyperv: Remove extra allocated space for recv_pkt_list elements hyperv: Fix page buffer handling in rndis_filter_send_request() hyperv: Fix the missing return value in rndis_filter_set_packet_filter() hyperv: Fix the max_xfer_size in RNDIS initialization vxlan: put UDP socket in correct namespace vxlan: Depend on CONFIG_INET sfc: Fix the reported priorities of different filter types sfc: Remove EFX_FILTER_FLAG_RX_OVERRIDE_IP sfc: Fix loopback self-test with separate_tx_channels=1 sfc: Fix MCDI structure field lookup sfc: Add parentheses around use of bitfield macro arguments sfc: Fix null function pointer in efx_sriov_channel_type vxlan: virtual extensible lan igmp: export symbol ip_mc_leave_group netlink: add attributes to fdb interface tg3: unconditionally select HWMON support when tg3 is enabled. Revert "net: ti cpsw ethernet: allow reading phy interface mode from DT" gre: fix sparse warning ...
Diffstat (limited to 'drivers/net/wireless/rt2x00')
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c5
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.h27
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c3
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.h18
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c5
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.h27
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h52
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c397
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.h22
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c83
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c62
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h20
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c35
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c44
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.c20
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c13
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.h28
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c5
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.h34
19 files changed, 554 insertions, 346 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 64328af496f5..e3a2d9070cf6 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -205,7 +205,7 @@ static int rt2400pci_rfkill_poll(struct rt2x00_dev *rt2x00dev)
205 u32 reg; 205 u32 reg;
206 206
207 rt2x00pci_register_read(rt2x00dev, GPIOCSR, &reg); 207 rt2x00pci_register_read(rt2x00dev, GPIOCSR, &reg);
208 return rt2x00_get_field32(reg, GPIOCSR_BIT0); 208 return rt2x00_get_field32(reg, GPIOCSR_VAL0);
209} 209}
210 210
211#ifdef CONFIG_RT2X00_LIB_LEDS 211#ifdef CONFIG_RT2X00_LIB_LEDS
@@ -1629,7 +1629,7 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev)
1629 * rfkill switch GPIO pin correctly. 1629 * rfkill switch GPIO pin correctly.
1630 */ 1630 */
1631 rt2x00pci_register_read(rt2x00dev, GPIOCSR, &reg); 1631 rt2x00pci_register_read(rt2x00dev, GPIOCSR, &reg);
1632 rt2x00_set_field32(&reg, GPIOCSR_BIT8, 1); 1632 rt2x00_set_field32(&reg, GPIOCSR_DIR0, 1);
1633 rt2x00pci_register_write(rt2x00dev, GPIOCSR, reg); 1633 rt2x00pci_register_write(rt2x00dev, GPIOCSR, reg);
1634 1634
1635 /* 1635 /*
@@ -1789,7 +1789,6 @@ static const struct data_queue_desc rt2400pci_queue_atim = {
1789 1789
1790static const struct rt2x00_ops rt2400pci_ops = { 1790static const struct rt2x00_ops rt2400pci_ops = {
1791 .name = KBUILD_MODNAME, 1791 .name = KBUILD_MODNAME,
1792 .max_sta_intf = 1,
1793 .max_ap_intf = 1, 1792 .max_ap_intf = 1,
1794 .eeprom_size = EEPROM_SIZE, 1793 .eeprom_size = EEPROM_SIZE,
1795 .rf_size = RF_SIZE, 1794 .rf_size = RF_SIZE,
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.h b/drivers/net/wireless/rt2x00/rt2400pci.h
index 7564ae992b73..e4b07f0aa3cc 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.h
+++ b/drivers/net/wireless/rt2x00/rt2400pci.h
@@ -660,17 +660,26 @@
660 660
661/* 661/*
662 * GPIOCSR: GPIO control register. 662 * GPIOCSR: GPIO control register.
663 * GPIOCSR_VALx: Actual GPIO pin x value
664 * GPIOCSR_DIRx: GPIO direction: 0 = output; 1 = input
663 */ 665 */
664#define GPIOCSR 0x0120 666#define GPIOCSR 0x0120
665#define GPIOCSR_BIT0 FIELD32(0x00000001) 667#define GPIOCSR_VAL0 FIELD32(0x00000001)
666#define GPIOCSR_BIT1 FIELD32(0x00000002) 668#define GPIOCSR_VAL1 FIELD32(0x00000002)
667#define GPIOCSR_BIT2 FIELD32(0x00000004) 669#define GPIOCSR_VAL2 FIELD32(0x00000004)
668#define GPIOCSR_BIT3 FIELD32(0x00000008) 670#define GPIOCSR_VAL3 FIELD32(0x00000008)
669#define GPIOCSR_BIT4 FIELD32(0x00000010) 671#define GPIOCSR_VAL4 FIELD32(0x00000010)
670#define GPIOCSR_BIT5 FIELD32(0x00000020) 672#define GPIOCSR_VAL5 FIELD32(0x00000020)
671#define GPIOCSR_BIT6 FIELD32(0x00000040) 673#define GPIOCSR_VAL6 FIELD32(0x00000040)
672#define GPIOCSR_BIT7 FIELD32(0x00000080) 674#define GPIOCSR_VAL7 FIELD32(0x00000080)
673#define GPIOCSR_BIT8 FIELD32(0x00000100) 675#define GPIOCSR_DIR0 FIELD32(0x00000100)
676#define GPIOCSR_DIR1 FIELD32(0x00000200)
677#define GPIOCSR_DIR2 FIELD32(0x00000400)
678#define GPIOCSR_DIR3 FIELD32(0x00000800)
679#define GPIOCSR_DIR4 FIELD32(0x00001000)
680#define GPIOCSR_DIR5 FIELD32(0x00002000)
681#define GPIOCSR_DIR6 FIELD32(0x00004000)
682#define GPIOCSR_DIR7 FIELD32(0x00008000)
674 683
675/* 684/*
676 * BBPPCSR: BBP Pin control register. 685 * BBPPCSR: BBP Pin control register.
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 3de0406735f6..479d756e275b 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -205,7 +205,7 @@ static int rt2500pci_rfkill_poll(struct rt2x00_dev *rt2x00dev)
205 u32 reg; 205 u32 reg;
206 206
207 rt2x00pci_register_read(rt2x00dev, GPIOCSR, &reg); 207 rt2x00pci_register_read(rt2x00dev, GPIOCSR, &reg);
208 return rt2x00_get_field32(reg, GPIOCSR_BIT0); 208 return rt2x00_get_field32(reg, GPIOCSR_VAL0);
209} 209}
210 210
211#ifdef CONFIG_RT2X00_LIB_LEDS 211#ifdef CONFIG_RT2X00_LIB_LEDS
@@ -2081,7 +2081,6 @@ static const struct data_queue_desc rt2500pci_queue_atim = {
2081 2081
2082static const struct rt2x00_ops rt2500pci_ops = { 2082static const struct rt2x00_ops rt2500pci_ops = {
2083 .name = KBUILD_MODNAME, 2083 .name = KBUILD_MODNAME,
2084 .max_sta_intf = 1,
2085 .max_ap_intf = 1, 2084 .max_ap_intf = 1,
2086 .eeprom_size = EEPROM_SIZE, 2085 .eeprom_size = EEPROM_SIZE,
2087 .rf_size = RF_SIZE, 2086 .rf_size = RF_SIZE,
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.h b/drivers/net/wireless/rt2x00/rt2500pci.h
index 2aad7ba8a100..9c10068e4987 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.h
+++ b/drivers/net/wireless/rt2x00/rt2500pci.h
@@ -789,16 +789,18 @@
789 789
790/* 790/*
791 * GPIOCSR: GPIO control register. 791 * GPIOCSR: GPIO control register.
792 * GPIOCSR_VALx: GPIO value
793 * GPIOCSR_DIRx: GPIO direction: 0 = output; 1 = input
792 */ 794 */
793#define GPIOCSR 0x0120 795#define GPIOCSR 0x0120
794#define GPIOCSR_BIT0 FIELD32(0x00000001) 796#define GPIOCSR_VAL0 FIELD32(0x00000001)
795#define GPIOCSR_BIT1 FIELD32(0x00000002) 797#define GPIOCSR_VAL1 FIELD32(0x00000002)
796#define GPIOCSR_BIT2 FIELD32(0x00000004) 798#define GPIOCSR_VAL2 FIELD32(0x00000004)
797#define GPIOCSR_BIT3 FIELD32(0x00000008) 799#define GPIOCSR_VAL3 FIELD32(0x00000008)
798#define GPIOCSR_BIT4 FIELD32(0x00000010) 800#define GPIOCSR_VAL4 FIELD32(0x00000010)
799#define GPIOCSR_BIT5 FIELD32(0x00000020) 801#define GPIOCSR_VAL5 FIELD32(0x00000020)
800#define GPIOCSR_BIT6 FIELD32(0x00000040) 802#define GPIOCSR_VAL6 FIELD32(0x00000040)
801#define GPIOCSR_BIT7 FIELD32(0x00000080) 803#define GPIOCSR_VAL7 FIELD32(0x00000080)
802#define GPIOCSR_DIR0 FIELD32(0x00000100) 804#define GPIOCSR_DIR0 FIELD32(0x00000100)
803#define GPIOCSR_DIR1 FIELD32(0x00000200) 805#define GPIOCSR_DIR1 FIELD32(0x00000200)
804#define GPIOCSR_DIR2 FIELD32(0x00000400) 806#define GPIOCSR_DIR2 FIELD32(0x00000400)
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index 89fee311d8fd..a12e84f892be 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -283,7 +283,7 @@ static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
283 u16 reg; 283 u16 reg;
284 284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg); 285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
286 return rt2x00_get_field16(reg, MAC_CSR19_BIT7); 286 return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
287} 287}
288 288
289#ifdef CONFIG_RT2X00_LIB_LEDS 289#ifdef CONFIG_RT2X00_LIB_LEDS
@@ -1786,7 +1786,7 @@ static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1786 * rfkill switch GPIO pin correctly. 1786 * rfkill switch GPIO pin correctly.
1787 */ 1787 */
1788 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg); 1788 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
1789 rt2x00_set_field16(&reg, MAC_CSR19_BIT8, 0); 1789 rt2x00_set_field16(&reg, MAC_CSR19_DIR0, 0);
1790 rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg); 1790 rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
1791 1791
1792 /* 1792 /*
@@ -1896,7 +1896,6 @@ static const struct data_queue_desc rt2500usb_queue_atim = {
1896 1896
1897static const struct rt2x00_ops rt2500usb_ops = { 1897static const struct rt2x00_ops rt2500usb_ops = {
1898 .name = KBUILD_MODNAME, 1898 .name = KBUILD_MODNAME,
1899 .max_sta_intf = 1,
1900 .max_ap_intf = 1, 1899 .max_ap_intf = 1,
1901 .eeprom_size = EEPROM_SIZE, 1900 .eeprom_size = EEPROM_SIZE,
1902 .rf_size = RF_SIZE, 1901 .rf_size = RF_SIZE,
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.h b/drivers/net/wireless/rt2x00/rt2500usb.h
index 196bd5103e4f..1b91a4cef965 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.h
+++ b/drivers/net/wireless/rt2x00/rt2500usb.h
@@ -187,17 +187,26 @@
187 187
188/* 188/*
189 * MAC_CSR19: GPIO control register. 189 * MAC_CSR19: GPIO control register.
190 * MAC_CSR19_VALx: GPIO value
191 * MAC_CSR19_DIRx: GPIO direction: 0 = input; 1 = output
190 */ 192 */
191#define MAC_CSR19 0x0426 193#define MAC_CSR19 0x0426
192#define MAC_CSR19_BIT0 FIELD16(0x0001) 194#define MAC_CSR19_VAL0 FIELD16(0x0001)
193#define MAC_CSR19_BIT1 FIELD16(0x0002) 195#define MAC_CSR19_VAL1 FIELD16(0x0002)
194#define MAC_CSR19_BIT2 FIELD16(0x0004) 196#define MAC_CSR19_VAL2 FIELD16(0x0004)
195#define MAC_CSR19_BIT3 FIELD16(0x0008) 197#define MAC_CSR19_VAL3 FIELD16(0x0008)
196#define MAC_CSR19_BIT4 FIELD16(0x0010) 198#define MAC_CSR19_VAL4 FIELD16(0x0010)
197#define MAC_CSR19_BIT5 FIELD16(0x0020) 199#define MAC_CSR19_VAL5 FIELD16(0x0020)
198#define MAC_CSR19_BIT6 FIELD16(0x0040) 200#define MAC_CSR19_VAL6 FIELD16(0x0040)
199#define MAC_CSR19_BIT7 FIELD16(0x0080) 201#define MAC_CSR19_VAL7 FIELD16(0x0080)
200#define MAC_CSR19_BIT8 FIELD16(0x0100) 202#define MAC_CSR19_DIR0 FIELD16(0x0100)
203#define MAC_CSR19_DIR1 FIELD16(0x0200)
204#define MAC_CSR19_DIR2 FIELD16(0x0400)
205#define MAC_CSR19_DIR3 FIELD16(0x0800)
206#define MAC_CSR19_DIR4 FIELD16(0x1000)
207#define MAC_CSR19_DIR5 FIELD16(0x2000)
208#define MAC_CSR19_DIR6 FIELD16(0x4000)
209#define MAC_CSR19_DIR7 FIELD16(0x8000)
201 210
202/* 211/*
203 * MAC_CSR20: LED control register. 212 * MAC_CSR20: LED control register.
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index e252e9bafd0e..6d67c3ede651 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -439,26 +439,33 @@
439#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000) 439#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000)
440 440
441/* 441/*
442 * GPIO_CTRL_CFG: 442 * GPIO_CTRL:
443 * GPIOD: GPIO direction, 0: Output, 1: Input 443 * GPIO_CTRL_VALx: GPIO value
444 */ 444 * GPIO_CTRL_DIRx: GPIO direction: 0 = output; 1 = input
445#define GPIO_CTRL_CFG 0x0228 445 */
446#define GPIO_CTRL_CFG_BIT0 FIELD32(0x00000001) 446#define GPIO_CTRL 0x0228
447#define GPIO_CTRL_CFG_BIT1 FIELD32(0x00000002) 447#define GPIO_CTRL_VAL0 FIELD32(0x00000001)
448#define GPIO_CTRL_CFG_BIT2 FIELD32(0x00000004) 448#define GPIO_CTRL_VAL1 FIELD32(0x00000002)
449#define GPIO_CTRL_CFG_BIT3 FIELD32(0x00000008) 449#define GPIO_CTRL_VAL2 FIELD32(0x00000004)
450#define GPIO_CTRL_CFG_BIT4 FIELD32(0x00000010) 450#define GPIO_CTRL_VAL3 FIELD32(0x00000008)
451#define GPIO_CTRL_CFG_BIT5 FIELD32(0x00000020) 451#define GPIO_CTRL_VAL4 FIELD32(0x00000010)
452#define GPIO_CTRL_CFG_BIT6 FIELD32(0x00000040) 452#define GPIO_CTRL_VAL5 FIELD32(0x00000020)
453#define GPIO_CTRL_CFG_BIT7 FIELD32(0x00000080) 453#define GPIO_CTRL_VAL6 FIELD32(0x00000040)
454#define GPIO_CTRL_CFG_GPIOD_BIT0 FIELD32(0x00000100) 454#define GPIO_CTRL_VAL7 FIELD32(0x00000080)
455#define GPIO_CTRL_CFG_GPIOD_BIT1 FIELD32(0x00000200) 455#define GPIO_CTRL_DIR0 FIELD32(0x00000100)
456#define GPIO_CTRL_CFG_GPIOD_BIT2 FIELD32(0x00000400) 456#define GPIO_CTRL_DIR1 FIELD32(0x00000200)
457#define GPIO_CTRL_CFG_GPIOD_BIT3 FIELD32(0x00000800) 457#define GPIO_CTRL_DIR2 FIELD32(0x00000400)
458#define GPIO_CTRL_CFG_GPIOD_BIT4 FIELD32(0x00001000) 458#define GPIO_CTRL_DIR3 FIELD32(0x00000800)
459#define GPIO_CTRL_CFG_GPIOD_BIT5 FIELD32(0x00002000) 459#define GPIO_CTRL_DIR4 FIELD32(0x00001000)
460#define GPIO_CTRL_CFG_GPIOD_BIT6 FIELD32(0x00004000) 460#define GPIO_CTRL_DIR5 FIELD32(0x00002000)
461#define GPIO_CTRL_CFG_GPIOD_BIT7 FIELD32(0x00008000) 461#define GPIO_CTRL_DIR6 FIELD32(0x00004000)
462#define GPIO_CTRL_DIR7 FIELD32(0x00008000)
463#define GPIO_CTRL_VAL8 FIELD32(0x00010000)
464#define GPIO_CTRL_VAL9 FIELD32(0x00020000)
465#define GPIO_CTRL_VAL10 FIELD32(0x00040000)
466#define GPIO_CTRL_DIR8 FIELD32(0x01000000)
467#define GPIO_CTRL_DIR9 FIELD32(0x02000000)
468#define GPIO_CTRL_DIR10 FIELD32(0x04000000)
462 469
463/* 470/*
464 * MCU_CMD_CFG 471 * MCU_CMD_CFG
@@ -1936,6 +1943,11 @@ struct mac_iveiv_entry {
1936#define BBP47_TSSI_ADC6 FIELD8(0x80) 1943#define BBP47_TSSI_ADC6 FIELD8(0x80)
1937 1944
1938/* 1945/*
1946 * BBP 49
1947 */
1948#define BBP49_UPDATE_FLAG FIELD8(0x01)
1949
1950/*
1939 * BBP 109 1951 * BBP 109
1940 */ 1952 */
1941#define BBP109_TX0_POWER FIELD8(0x0f) 1953#define BBP109_TX0_POWER FIELD8(0x0f)
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index b93516d832fb..540c94f8505a 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -923,8 +923,8 @@ int rt2800_rfkill_poll(struct rt2x00_dev *rt2x00dev)
923 rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL, &reg); 923 rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL, &reg);
924 return rt2x00_get_field32(reg, WLAN_GPIO_IN_BIT0); 924 return rt2x00_get_field32(reg, WLAN_GPIO_IN_BIT0);
925 } else { 925 } else {
926 rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg); 926 rt2800_register_read(rt2x00dev, GPIO_CTRL, &reg);
927 return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2); 927 return rt2x00_get_field32(reg, GPIO_CTRL_VAL2);
928 } 928 }
929} 929}
930EXPORT_SYMBOL_GPL(rt2800_rfkill_poll); 930EXPORT_SYMBOL_GPL(rt2800_rfkill_poll);
@@ -1570,10 +1570,10 @@ static void rt2800_set_ant_diversity(struct rt2x00_dev *rt2x00dev,
1570 rt2800_mcu_request(rt2x00dev, MCU_ANT_SELECT, 0xff, 1570 rt2800_mcu_request(rt2x00dev, MCU_ANT_SELECT, 0xff,
1571 eesk_pin, 0); 1571 eesk_pin, 0);
1572 1572
1573 rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg); 1573 rt2800_register_read(rt2x00dev, GPIO_CTRL, &reg);
1574 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT3, 0); 1574 rt2x00_set_field32(&reg, GPIO_CTRL_DIR3, 0);
1575 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT3, gpio_bit3); 1575 rt2x00_set_field32(&reg, GPIO_CTRL_VAL3, gpio_bit3);
1576 rt2800_register_write(rt2x00dev, GPIO_CTRL_CFG, reg); 1576 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg);
1577} 1577}
1578 1578
1579void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant) 1579void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
@@ -1615,6 +1615,7 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
1615 case 1: 1615 case 1:
1616 if (rt2x00_rt(rt2x00dev, RT3070) || 1616 if (rt2x00_rt(rt2x00dev, RT3070) ||
1617 rt2x00_rt(rt2x00dev, RT3090) || 1617 rt2x00_rt(rt2x00dev, RT3090) ||
1618 rt2x00_rt(rt2x00dev, RT3352) ||
1618 rt2x00_rt(rt2x00dev, RT3390)) { 1619 rt2x00_rt(rt2x00dev, RT3390)) {
1619 rt2x00_eeprom_read(rt2x00dev, 1620 rt2x00_eeprom_read(rt2x00dev,
1620 EEPROM_NIC_CONF1, &eeprom); 1621 EEPROM_NIC_CONF1, &eeprom);
@@ -1762,36 +1763,15 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev,
1762 1763
1763 rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); 1764 rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
1764 rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0); 1765 rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0);
1766 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD,
1767 rt2x00dev->default_ant.rx_chain_num <= 1);
1768 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD,
1769 rt2x00dev->default_ant.rx_chain_num <= 2);
1765 rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0); 1770 rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0);
1766 if (rt2x00_rt(rt2x00dev, RT3390)) { 1771 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD,
1767 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1772 rt2x00dev->default_ant.tx_chain_num <= 1);
1768 rt2x00dev->default_ant.rx_chain_num == 1); 1773 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD,
1769 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1774 rt2x00dev->default_ant.tx_chain_num <= 2);
1770 rt2x00dev->default_ant.tx_chain_num == 1);
1771 } else {
1772 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0);
1773 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0);
1774 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
1775 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0);
1776
1777 switch (rt2x00dev->default_ant.tx_chain_num) {
1778 case 1:
1779 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1);
1780 /* fall through */
1781 case 2:
1782 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 1);
1783 break;
1784 }
1785
1786 switch (rt2x00dev->default_ant.rx_chain_num) {
1787 case 1:
1788 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1);
1789 /* fall through */
1790 case 2:
1791 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 1);
1792 break;
1793 }
1794 }
1795 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); 1775 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
1796 1776
1797 rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr); 1777 rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
@@ -1995,13 +1975,13 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev,
1995 rt2800_rfcsr_write(rt2x00dev, 29, 0x9f); 1975 rt2800_rfcsr_write(rt2x00dev, 29, 0x9f);
1996 } 1976 }
1997 1977
1998 rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg); 1978 rt2800_register_read(rt2x00dev, GPIO_CTRL, &reg);
1999 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT7, 0); 1979 rt2x00_set_field32(&reg, GPIO_CTRL_DIR7, 0);
2000 if (rf->channel <= 14) 1980 if (rf->channel <= 14)
2001 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT7, 1); 1981 rt2x00_set_field32(&reg, GPIO_CTRL_VAL7, 1);
2002 else 1982 else
2003 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT7, 0); 1983 rt2x00_set_field32(&reg, GPIO_CTRL_VAL7, 0);
2004 rt2800_register_write(rt2x00dev, GPIO_CTRL_CFG, reg); 1984 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg);
2005 1985
2006 rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr); 1986 rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr);
2007 rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1); 1987 rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1);
@@ -2053,6 +2033,60 @@ static void rt2800_config_channel_rf3290(struct rt2x00_dev *rt2x00dev,
2053 } 2033 }
2054} 2034}
2055 2035
2036static void rt2800_config_channel_rf3322(struct rt2x00_dev *rt2x00dev,
2037 struct ieee80211_conf *conf,
2038 struct rf_channel *rf,
2039 struct channel_info *info)
2040{
2041 u8 rfcsr;
2042
2043 rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1);
2044 rt2800_rfcsr_write(rt2x00dev, 9, rf->rf3);
2045
2046 rt2800_rfcsr_write(rt2x00dev, 11, 0x42);
2047 rt2800_rfcsr_write(rt2x00dev, 12, 0x1c);
2048 rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
2049
2050 if (info->default_power1 > POWER_BOUND)
2051 rt2800_rfcsr_write(rt2x00dev, 47, POWER_BOUND);
2052 else
2053 rt2800_rfcsr_write(rt2x00dev, 47, info->default_power1);
2054
2055 if (info->default_power2 > POWER_BOUND)
2056 rt2800_rfcsr_write(rt2x00dev, 48, POWER_BOUND);
2057 else
2058 rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2);
2059
2060 rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
2061 if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
2062 rt2x00_set_field8(&rfcsr, RFCSR17_CODE, FREQ_OFFSET_BOUND);
2063 else
2064 rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
2065
2066 rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
2067
2068 rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
2069 rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
2070 rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
2071
2072 if ( rt2x00dev->default_ant.tx_chain_num == 2 )
2073 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1);
2074 else
2075 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0);
2076
2077 if ( rt2x00dev->default_ant.rx_chain_num == 2 )
2078 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1);
2079 else
2080 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0);
2081
2082 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
2083 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0);
2084
2085 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
2086
2087 rt2800_rfcsr_write(rt2x00dev, 31, 80);
2088}
2089
2056static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev, 2090static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev,
2057 struct ieee80211_conf *conf, 2091 struct ieee80211_conf *conf,
2058 struct rf_channel *rf, 2092 struct rf_channel *rf,
@@ -2182,6 +2216,9 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2182 case RF3290: 2216 case RF3290:
2183 rt2800_config_channel_rf3290(rt2x00dev, conf, rf, info); 2217 rt2800_config_channel_rf3290(rt2x00dev, conf, rf, info);
2184 break; 2218 break;
2219 case RF3322:
2220 rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info);
2221 break;
2185 case RF5360: 2222 case RF5360:
2186 case RF5370: 2223 case RF5370:
2187 case RF5372: 2224 case RF5372:
@@ -2194,6 +2231,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2194 } 2231 }
2195 2232
2196 if (rt2x00_rf(rt2x00dev, RF3290) || 2233 if (rt2x00_rf(rt2x00dev, RF3290) ||
2234 rt2x00_rf(rt2x00dev, RF3322) ||
2197 rt2x00_rf(rt2x00dev, RF5360) || 2235 rt2x00_rf(rt2x00dev, RF5360) ||
2198 rt2x00_rf(rt2x00dev, RF5370) || 2236 rt2x00_rf(rt2x00dev, RF5370) ||
2199 rt2x00_rf(rt2x00dev, RF5372) || 2237 rt2x00_rf(rt2x00dev, RF5372) ||
@@ -2212,10 +2250,17 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2212 /* 2250 /*
2213 * Change BBP settings 2251 * Change BBP settings
2214 */ 2252 */
2215 rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain); 2253 if (rt2x00_rt(rt2x00dev, RT3352)) {
2216 rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain); 2254 rt2800_bbp_write(rt2x00dev, 27, 0x0);
2217 rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain); 2255 rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
2218 rt2800_bbp_write(rt2x00dev, 86, 0); 2256 rt2800_bbp_write(rt2x00dev, 27, 0x20);
2257 rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
2258 } else {
2259 rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
2260 rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
2261 rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
2262 rt2800_bbp_write(rt2x00dev, 86, 0);
2263 }
2219 2264
2220 if (rf->channel <= 14) { 2265 if (rf->channel <= 14) {
2221 if (!rt2x00_rt(rt2x00dev, RT5390) && 2266 if (!rt2x00_rt(rt2x00dev, RT5390) &&
@@ -2310,6 +2355,15 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2310 rt2800_register_read(rt2x00dev, CH_IDLE_STA, &reg); 2355 rt2800_register_read(rt2x00dev, CH_IDLE_STA, &reg);
2311 rt2800_register_read(rt2x00dev, CH_BUSY_STA, &reg); 2356 rt2800_register_read(rt2x00dev, CH_BUSY_STA, &reg);
2312 rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, &reg); 2357 rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, &reg);
2358
2359 /*
2360 * Clear update flag
2361 */
2362 if (rt2x00_rt(rt2x00dev, RT3352)) {
2363 rt2800_bbp_read(rt2x00dev, 49, &bbp);
2364 rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0);
2365 rt2800_bbp_write(rt2x00dev, 49, bbp);
2366 }
2313} 2367}
2314 2368
2315static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev) 2369static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev)
@@ -2821,23 +2875,32 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
2821 2875
2822static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev) 2876static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
2823{ 2877{
2878 u8 vgc;
2879
2824 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) { 2880 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
2825 if (rt2x00_rt(rt2x00dev, RT3070) || 2881 if (rt2x00_rt(rt2x00dev, RT3070) ||
2826 rt2x00_rt(rt2x00dev, RT3071) || 2882 rt2x00_rt(rt2x00dev, RT3071) ||
2827 rt2x00_rt(rt2x00dev, RT3090) || 2883 rt2x00_rt(rt2x00dev, RT3090) ||
2828 rt2x00_rt(rt2x00dev, RT3290) || 2884 rt2x00_rt(rt2x00dev, RT3290) ||
2829 rt2x00_rt(rt2x00dev, RT3390) || 2885 rt2x00_rt(rt2x00dev, RT3390) ||
2886 rt2x00_rt(rt2x00dev, RT3572) ||
2830 rt2x00_rt(rt2x00dev, RT5390) || 2887 rt2x00_rt(rt2x00dev, RT5390) ||
2831 rt2x00_rt(rt2x00dev, RT5392)) 2888 rt2x00_rt(rt2x00dev, RT5392))
2832 return 0x1c + (2 * rt2x00dev->lna_gain); 2889 vgc = 0x1c + (2 * rt2x00dev->lna_gain);
2833 else 2890 else
2834 return 0x2e + rt2x00dev->lna_gain; 2891 vgc = 0x2e + rt2x00dev->lna_gain;
2892 } else { /* 5GHZ band */
2893 if (rt2x00_rt(rt2x00dev, RT3572))
2894 vgc = 0x22 + (rt2x00dev->lna_gain * 5) / 3;
2895 else {
2896 if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
2897 vgc = 0x32 + (rt2x00dev->lna_gain * 5) / 3;
2898 else
2899 vgc = 0x3a + (rt2x00dev->lna_gain * 5) / 3;
2900 }
2835 } 2901 }
2836 2902
2837 if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags)) 2903 return vgc;
2838 return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
2839 else
2840 return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
2841} 2904}
2842 2905
2843static inline void rt2800_set_vgc(struct rt2x00_dev *rt2x00dev, 2906static inline void rt2800_set_vgc(struct rt2x00_dev *rt2x00dev,
@@ -2998,11 +3061,15 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
2998 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); 3061 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
2999 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); 3062 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
3000 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000030); 3063 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000030);
3064 } else if (rt2x00_rt(rt2x00dev, RT3352)) {
3065 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402);
3066 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
3067 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
3001 } else if (rt2x00_rt(rt2x00dev, RT3572)) { 3068 } else if (rt2x00_rt(rt2x00dev, RT3572)) {
3002 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); 3069 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
3003 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); 3070 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
3004 } else if (rt2x00_rt(rt2x00dev, RT5390) || 3071 } else if (rt2x00_rt(rt2x00dev, RT5390) ||
3005 rt2x00_rt(rt2x00dev, RT5392)) { 3072 rt2x00_rt(rt2x00dev, RT5392)) {
3006 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); 3073 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
3007 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); 3074 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
3008 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); 3075 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
@@ -3378,6 +3445,11 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3378 rt2800_wait_bbp_ready(rt2x00dev))) 3445 rt2800_wait_bbp_ready(rt2x00dev)))
3379 return -EACCES; 3446 return -EACCES;
3380 3447
3448 if (rt2x00_rt(rt2x00dev, RT3352)) {
3449 rt2800_bbp_write(rt2x00dev, 3, 0x00);
3450 rt2800_bbp_write(rt2x00dev, 4, 0x50);
3451 }
3452
3381 if (rt2x00_rt(rt2x00dev, RT3290) || 3453 if (rt2x00_rt(rt2x00dev, RT3290) ||
3382 rt2x00_rt(rt2x00dev, RT5390) || 3454 rt2x00_rt(rt2x00dev, RT5390) ||
3383 rt2x00_rt(rt2x00dev, RT5392)) { 3455 rt2x00_rt(rt2x00dev, RT5392)) {
@@ -3388,15 +3460,20 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3388 3460
3389 if (rt2800_is_305x_soc(rt2x00dev) || 3461 if (rt2800_is_305x_soc(rt2x00dev) ||
3390 rt2x00_rt(rt2x00dev, RT3290) || 3462 rt2x00_rt(rt2x00dev, RT3290) ||
3463 rt2x00_rt(rt2x00dev, RT3352) ||
3391 rt2x00_rt(rt2x00dev, RT3572) || 3464 rt2x00_rt(rt2x00dev, RT3572) ||
3392 rt2x00_rt(rt2x00dev, RT5390) || 3465 rt2x00_rt(rt2x00dev, RT5390) ||
3393 rt2x00_rt(rt2x00dev, RT5392)) 3466 rt2x00_rt(rt2x00dev, RT5392))
3394 rt2800_bbp_write(rt2x00dev, 31, 0x08); 3467 rt2800_bbp_write(rt2x00dev, 31, 0x08);
3395 3468
3469 if (rt2x00_rt(rt2x00dev, RT3352))
3470 rt2800_bbp_write(rt2x00dev, 47, 0x48);
3471
3396 rt2800_bbp_write(rt2x00dev, 65, 0x2c); 3472 rt2800_bbp_write(rt2x00dev, 65, 0x2c);
3397 rt2800_bbp_write(rt2x00dev, 66, 0x38); 3473 rt2800_bbp_write(rt2x00dev, 66, 0x38);
3398 3474
3399 if (rt2x00_rt(rt2x00dev, RT3290) || 3475 if (rt2x00_rt(rt2x00dev, RT3290) ||
3476 rt2x00_rt(rt2x00dev, RT3352) ||
3400 rt2x00_rt(rt2x00dev, RT5390) || 3477 rt2x00_rt(rt2x00dev, RT5390) ||
3401 rt2x00_rt(rt2x00dev, RT5392)) 3478 rt2x00_rt(rt2x00dev, RT5392))
3402 rt2800_bbp_write(rt2x00dev, 68, 0x0b); 3479 rt2800_bbp_write(rt2x00dev, 68, 0x0b);
@@ -3405,6 +3482,7 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3405 rt2800_bbp_write(rt2x00dev, 69, 0x16); 3482 rt2800_bbp_write(rt2x00dev, 69, 0x16);
3406 rt2800_bbp_write(rt2x00dev, 73, 0x12); 3483 rt2800_bbp_write(rt2x00dev, 73, 0x12);
3407 } else if (rt2x00_rt(rt2x00dev, RT3290) || 3484 } else if (rt2x00_rt(rt2x00dev, RT3290) ||
3485 rt2x00_rt(rt2x00dev, RT3352) ||
3408 rt2x00_rt(rt2x00dev, RT5390) || 3486 rt2x00_rt(rt2x00dev, RT5390) ||
3409 rt2x00_rt(rt2x00dev, RT5392)) { 3487 rt2x00_rt(rt2x00dev, RT5392)) {
3410 rt2800_bbp_write(rt2x00dev, 69, 0x12); 3488 rt2800_bbp_write(rt2x00dev, 69, 0x12);
@@ -3436,15 +3514,17 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3436 } else if (rt2800_is_305x_soc(rt2x00dev)) { 3514 } else if (rt2800_is_305x_soc(rt2x00dev)) {
3437 rt2800_bbp_write(rt2x00dev, 78, 0x0e); 3515 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
3438 rt2800_bbp_write(rt2x00dev, 80, 0x08); 3516 rt2800_bbp_write(rt2x00dev, 80, 0x08);
3439 } else { 3517 } else if (rt2x00_rt(rt2x00dev, RT3290)) {
3440 rt2800_bbp_write(rt2x00dev, 81, 0x37);
3441 }
3442
3443 if (rt2x00_rt(rt2x00dev, RT3290)) {
3444 rt2800_bbp_write(rt2x00dev, 74, 0x0b); 3518 rt2800_bbp_write(rt2x00dev, 74, 0x0b);
3445 rt2800_bbp_write(rt2x00dev, 79, 0x18); 3519 rt2800_bbp_write(rt2x00dev, 79, 0x18);
3446 rt2800_bbp_write(rt2x00dev, 80, 0x09); 3520 rt2800_bbp_write(rt2x00dev, 80, 0x09);
3447 rt2800_bbp_write(rt2x00dev, 81, 0x33); 3521 rt2800_bbp_write(rt2x00dev, 81, 0x33);
3522 } else if (rt2x00_rt(rt2x00dev, RT3352)) {
3523 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
3524 rt2800_bbp_write(rt2x00dev, 80, 0x08);
3525 rt2800_bbp_write(rt2x00dev, 81, 0x37);
3526 } else {
3527 rt2800_bbp_write(rt2x00dev, 81, 0x37);
3448 } 3528 }
3449 3529
3450 rt2800_bbp_write(rt2x00dev, 82, 0x62); 3530 rt2800_bbp_write(rt2x00dev, 82, 0x62);
@@ -3465,18 +3545,21 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3465 rt2800_bbp_write(rt2x00dev, 84, 0x99); 3545 rt2800_bbp_write(rt2x00dev, 84, 0x99);
3466 3546
3467 if (rt2x00_rt(rt2x00dev, RT3290) || 3547 if (rt2x00_rt(rt2x00dev, RT3290) ||
3548 rt2x00_rt(rt2x00dev, RT3352) ||
3468 rt2x00_rt(rt2x00dev, RT5390) || 3549 rt2x00_rt(rt2x00dev, RT5390) ||
3469 rt2x00_rt(rt2x00dev, RT5392)) 3550 rt2x00_rt(rt2x00dev, RT5392))
3470 rt2800_bbp_write(rt2x00dev, 86, 0x38); 3551 rt2800_bbp_write(rt2x00dev, 86, 0x38);
3471 else 3552 else
3472 rt2800_bbp_write(rt2x00dev, 86, 0x00); 3553 rt2800_bbp_write(rt2x00dev, 86, 0x00);
3473 3554
3474 if (rt2x00_rt(rt2x00dev, RT5392)) 3555 if (rt2x00_rt(rt2x00dev, RT3352) ||
3556 rt2x00_rt(rt2x00dev, RT5392))
3475 rt2800_bbp_write(rt2x00dev, 88, 0x90); 3557 rt2800_bbp_write(rt2x00dev, 88, 0x90);
3476 3558
3477 rt2800_bbp_write(rt2x00dev, 91, 0x04); 3559 rt2800_bbp_write(rt2x00dev, 91, 0x04);
3478 3560
3479 if (rt2x00_rt(rt2x00dev, RT3290) || 3561 if (rt2x00_rt(rt2x00dev, RT3290) ||
3562 rt2x00_rt(rt2x00dev, RT3352) ||
3480 rt2x00_rt(rt2x00dev, RT5390) || 3563 rt2x00_rt(rt2x00dev, RT5390) ||
3481 rt2x00_rt(rt2x00dev, RT5392)) 3564 rt2x00_rt(rt2x00dev, RT5392))
3482 rt2800_bbp_write(rt2x00dev, 92, 0x02); 3565 rt2800_bbp_write(rt2x00dev, 92, 0x02);
@@ -3493,6 +3576,7 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3493 rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || 3576 rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||
3494 rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || 3577 rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||
3495 rt2x00_rt(rt2x00dev, RT3290) || 3578 rt2x00_rt(rt2x00dev, RT3290) ||
3579 rt2x00_rt(rt2x00dev, RT3352) ||
3496 rt2x00_rt(rt2x00dev, RT3572) || 3580 rt2x00_rt(rt2x00dev, RT3572) ||
3497 rt2x00_rt(rt2x00dev, RT5390) || 3581 rt2x00_rt(rt2x00dev, RT5390) ||
3498 rt2x00_rt(rt2x00dev, RT5392) || 3582 rt2x00_rt(rt2x00dev, RT5392) ||
@@ -3502,6 +3586,7 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3502 rt2800_bbp_write(rt2x00dev, 103, 0x00); 3586 rt2800_bbp_write(rt2x00dev, 103, 0x00);
3503 3587
3504 if (rt2x00_rt(rt2x00dev, RT3290) || 3588 if (rt2x00_rt(rt2x00dev, RT3290) ||
3589 rt2x00_rt(rt2x00dev, RT3352) ||
3505 rt2x00_rt(rt2x00dev, RT5390) || 3590 rt2x00_rt(rt2x00dev, RT5390) ||
3506 rt2x00_rt(rt2x00dev, RT5392)) 3591 rt2x00_rt(rt2x00dev, RT5392))
3507 rt2800_bbp_write(rt2x00dev, 104, 0x92); 3592 rt2800_bbp_write(rt2x00dev, 104, 0x92);
@@ -3510,6 +3595,8 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3510 rt2800_bbp_write(rt2x00dev, 105, 0x01); 3595 rt2800_bbp_write(rt2x00dev, 105, 0x01);
3511 else if (rt2x00_rt(rt2x00dev, RT3290)) 3596 else if (rt2x00_rt(rt2x00dev, RT3290))
3512 rt2800_bbp_write(rt2x00dev, 105, 0x1c); 3597 rt2800_bbp_write(rt2x00dev, 105, 0x1c);
3598 else if (rt2x00_rt(rt2x00dev, RT3352))
3599 rt2800_bbp_write(rt2x00dev, 105, 0x34);
3513 else if (rt2x00_rt(rt2x00dev, RT5390) || 3600 else if (rt2x00_rt(rt2x00dev, RT5390) ||
3514 rt2x00_rt(rt2x00dev, RT5392)) 3601 rt2x00_rt(rt2x00dev, RT5392))
3515 rt2800_bbp_write(rt2x00dev, 105, 0x3c); 3602 rt2800_bbp_write(rt2x00dev, 105, 0x3c);
@@ -3519,11 +3606,16 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3519 if (rt2x00_rt(rt2x00dev, RT3290) || 3606 if (rt2x00_rt(rt2x00dev, RT3290) ||
3520 rt2x00_rt(rt2x00dev, RT5390)) 3607 rt2x00_rt(rt2x00dev, RT5390))
3521 rt2800_bbp_write(rt2x00dev, 106, 0x03); 3608 rt2800_bbp_write(rt2x00dev, 106, 0x03);
3609 else if (rt2x00_rt(rt2x00dev, RT3352))
3610 rt2800_bbp_write(rt2x00dev, 106, 0x05);
3522 else if (rt2x00_rt(rt2x00dev, RT5392)) 3611 else if (rt2x00_rt(rt2x00dev, RT5392))
3523 rt2800_bbp_write(rt2x00dev, 106, 0x12); 3612 rt2800_bbp_write(rt2x00dev, 106, 0x12);
3524 else 3613 else
3525 rt2800_bbp_write(rt2x00dev, 106, 0x35); 3614 rt2800_bbp_write(rt2x00dev, 106, 0x35);
3526 3615
3616 if (rt2x00_rt(rt2x00dev, RT3352))
3617 rt2800_bbp_write(rt2x00dev, 120, 0x50);
3618
3527 if (rt2x00_rt(rt2x00dev, RT3290) || 3619 if (rt2x00_rt(rt2x00dev, RT3290) ||
3528 rt2x00_rt(rt2x00dev, RT5390) || 3620 rt2x00_rt(rt2x00dev, RT5390) ||
3529 rt2x00_rt(rt2x00dev, RT5392)) 3621 rt2x00_rt(rt2x00dev, RT5392))
@@ -3534,6 +3626,9 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3534 rt2800_bbp_write(rt2x00dev, 135, 0xf6); 3626 rt2800_bbp_write(rt2x00dev, 135, 0xf6);
3535 } 3627 }
3536 3628
3629 if (rt2x00_rt(rt2x00dev, RT3352))
3630 rt2800_bbp_write(rt2x00dev, 137, 0x0f);
3631
3537 if (rt2x00_rt(rt2x00dev, RT3071) || 3632 if (rt2x00_rt(rt2x00dev, RT3071) ||
3538 rt2x00_rt(rt2x00dev, RT3090) || 3633 rt2x00_rt(rt2x00dev, RT3090) ||
3539 rt2x00_rt(rt2x00dev, RT3390) || 3634 rt2x00_rt(rt2x00dev, RT3390) ||
@@ -3574,6 +3669,28 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3574 rt2800_bbp_write(rt2x00dev, 3, value); 3669 rt2800_bbp_write(rt2x00dev, 3, value);
3575 } 3670 }
3576 3671
3672 if (rt2x00_rt(rt2x00dev, RT3352)) {
3673 rt2800_bbp_write(rt2x00dev, 163, 0xbd);
3674 /* Set ITxBF timeout to 0x9c40=1000msec */
3675 rt2800_bbp_write(rt2x00dev, 179, 0x02);
3676 rt2800_bbp_write(rt2x00dev, 180, 0x00);
3677 rt2800_bbp_write(rt2x00dev, 182, 0x40);
3678 rt2800_bbp_write(rt2x00dev, 180, 0x01);
3679 rt2800_bbp_write(rt2x00dev, 182, 0x9c);
3680 rt2800_bbp_write(rt2x00dev, 179, 0x00);
3681 /* Reprogram the inband interface to put right values in RXWI */
3682 rt2800_bbp_write(rt2x00dev, 142, 0x04);
3683 rt2800_bbp_write(rt2x00dev, 143, 0x3b);
3684 rt2800_bbp_write(rt2x00dev, 142, 0x06);
3685 rt2800_bbp_write(rt2x00dev, 143, 0xa0);
3686 rt2800_bbp_write(rt2x00dev, 142, 0x07);
3687 rt2800_bbp_write(rt2x00dev, 143, 0xa1);
3688 rt2800_bbp_write(rt2x00dev, 142, 0x08);
3689 rt2800_bbp_write(rt2x00dev, 143, 0xa2);
3690
3691 rt2800_bbp_write(rt2x00dev, 148, 0xc8);
3692 }
3693
3577 if (rt2x00_rt(rt2x00dev, RT5390) || 3694 if (rt2x00_rt(rt2x00dev, RT5390) ||
3578 rt2x00_rt(rt2x00dev, RT5392)) { 3695 rt2x00_rt(rt2x00dev, RT5392)) {
3579 int ant, div_mode; 3696 int ant, div_mode;
@@ -3587,16 +3704,16 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3587 if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { 3704 if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) {
3588 u32 reg; 3705 u32 reg;
3589 3706
3590 rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg); 3707 rt2800_register_read(rt2x00dev, GPIO_CTRL, &reg);
3591 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT3, 0); 3708 rt2x00_set_field32(&reg, GPIO_CTRL_DIR3, 0);
3592 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT6, 0); 3709 rt2x00_set_field32(&reg, GPIO_CTRL_DIR6, 0);
3593 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT3, 0); 3710 rt2x00_set_field32(&reg, GPIO_CTRL_VAL3, 0);
3594 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT6, 0); 3711 rt2x00_set_field32(&reg, GPIO_CTRL_VAL6, 0);
3595 if (ant == 0) 3712 if (ant == 0)
3596 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT3, 1); 3713 rt2x00_set_field32(&reg, GPIO_CTRL_VAL3, 1);
3597 else if (ant == 1) 3714 else if (ant == 1)
3598 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_BIT6, 1); 3715 rt2x00_set_field32(&reg, GPIO_CTRL_VAL6, 1);
3599 rt2800_register_write(rt2x00dev, GPIO_CTRL_CFG, reg); 3716 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg);
3600 } 3717 }
3601 3718
3602 /* This chip has hardware antenna diversity*/ 3719 /* This chip has hardware antenna diversity*/
@@ -3707,6 +3824,7 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
3707 !rt2x00_rt(rt2x00dev, RT3071) && 3824 !rt2x00_rt(rt2x00dev, RT3071) &&
3708 !rt2x00_rt(rt2x00dev, RT3090) && 3825 !rt2x00_rt(rt2x00dev, RT3090) &&
3709 !rt2x00_rt(rt2x00dev, RT3290) && 3826 !rt2x00_rt(rt2x00dev, RT3290) &&
3827 !rt2x00_rt(rt2x00dev, RT3352) &&
3710 !rt2x00_rt(rt2x00dev, RT3390) && 3828 !rt2x00_rt(rt2x00dev, RT3390) &&
3711 !rt2x00_rt(rt2x00dev, RT3572) && 3829 !rt2x00_rt(rt2x00dev, RT3572) &&
3712 !rt2x00_rt(rt2x00dev, RT5390) && 3830 !rt2x00_rt(rt2x00dev, RT5390) &&
@@ -3903,6 +4021,70 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
3903 rt2800_rfcsr_write(rt2x00dev, 30, 0x00); 4021 rt2800_rfcsr_write(rt2x00dev, 30, 0x00);
3904 rt2800_rfcsr_write(rt2x00dev, 31, 0x00); 4022 rt2800_rfcsr_write(rt2x00dev, 31, 0x00);
3905 return 0; 4023 return 0;
4024 } else if (rt2x00_rt(rt2x00dev, RT3352)) {
4025 rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
4026 rt2800_rfcsr_write(rt2x00dev, 1, 0x23);
4027 rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
4028 rt2800_rfcsr_write(rt2x00dev, 3, 0x18);
4029 rt2800_rfcsr_write(rt2x00dev, 4, 0x00);
4030 rt2800_rfcsr_write(rt2x00dev, 5, 0x00);
4031 rt2800_rfcsr_write(rt2x00dev, 6, 0x33);
4032 rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
4033 rt2800_rfcsr_write(rt2x00dev, 8, 0xf1);
4034 rt2800_rfcsr_write(rt2x00dev, 9, 0x02);
4035 rt2800_rfcsr_write(rt2x00dev, 10, 0xd2);
4036 rt2800_rfcsr_write(rt2x00dev, 11, 0x42);
4037 rt2800_rfcsr_write(rt2x00dev, 12, 0x1c);
4038 rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
4039 rt2800_rfcsr_write(rt2x00dev, 14, 0x5a);
4040 rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
4041 rt2800_rfcsr_write(rt2x00dev, 16, 0x01);
4042 rt2800_rfcsr_write(rt2x00dev, 18, 0x45);
4043 rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
4044 rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
4045 rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
4046 rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
4047 rt2800_rfcsr_write(rt2x00dev, 23, 0x00);
4048 rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
4049 rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
4050 rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
4051 rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
4052 rt2800_rfcsr_write(rt2x00dev, 28, 0x03);
4053 rt2800_rfcsr_write(rt2x00dev, 29, 0x00);
4054 rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
4055 rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
4056 rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
4057 rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
4058 rt2800_rfcsr_write(rt2x00dev, 34, 0x01);
4059 rt2800_rfcsr_write(rt2x00dev, 35, 0x03);
4060 rt2800_rfcsr_write(rt2x00dev, 36, 0xbd);
4061 rt2800_rfcsr_write(rt2x00dev, 37, 0x3c);
4062 rt2800_rfcsr_write(rt2x00dev, 38, 0x5f);
4063 rt2800_rfcsr_write(rt2x00dev, 39, 0xc5);
4064 rt2800_rfcsr_write(rt2x00dev, 40, 0x33);
4065 rt2800_rfcsr_write(rt2x00dev, 41, 0x5b);
4066 rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
4067 rt2800_rfcsr_write(rt2x00dev, 43, 0xdb);
4068 rt2800_rfcsr_write(rt2x00dev, 44, 0xdb);
4069 rt2800_rfcsr_write(rt2x00dev, 45, 0xdb);
4070 rt2800_rfcsr_write(rt2x00dev, 46, 0xdd);
4071 rt2800_rfcsr_write(rt2x00dev, 47, 0x0d);
4072 rt2800_rfcsr_write(rt2x00dev, 48, 0x14);
4073 rt2800_rfcsr_write(rt2x00dev, 49, 0x00);
4074 rt2800_rfcsr_write(rt2x00dev, 50, 0x2d);
4075 rt2800_rfcsr_write(rt2x00dev, 51, 0x7f);
4076 rt2800_rfcsr_write(rt2x00dev, 52, 0x00);
4077 rt2800_rfcsr_write(rt2x00dev, 53, 0x52);
4078 rt2800_rfcsr_write(rt2x00dev, 54, 0x1b);
4079 rt2800_rfcsr_write(rt2x00dev, 55, 0x7f);
4080 rt2800_rfcsr_write(rt2x00dev, 56, 0x00);
4081 rt2800_rfcsr_write(rt2x00dev, 57, 0x52);
4082 rt2800_rfcsr_write(rt2x00dev, 58, 0x1b);
4083 rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
4084 rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
4085 rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
4086 rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
4087 rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
3906 } else if (rt2x00_rt(rt2x00dev, RT5390)) { 4088 } else if (rt2x00_rt(rt2x00dev, RT5390)) {
3907 rt2800_rfcsr_write(rt2x00dev, 1, 0x0f); 4089 rt2800_rfcsr_write(rt2x00dev, 1, 0x0f);
3908 rt2800_rfcsr_write(rt2x00dev, 2, 0x80); 4090 rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
@@ -4104,6 +4286,7 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
4104 rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19); 4286 rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
4105 } else if (rt2x00_rt(rt2x00dev, RT3071) || 4287 } else if (rt2x00_rt(rt2x00dev, RT3071) ||
4106 rt2x00_rt(rt2x00dev, RT3090) || 4288 rt2x00_rt(rt2x00dev, RT3090) ||
4289 rt2x00_rt(rt2x00dev, RT3352) ||
4107 rt2x00_rt(rt2x00dev, RT3390) || 4290 rt2x00_rt(rt2x00dev, RT3390) ||
4108 rt2x00_rt(rt2x00dev, RT3572)) { 4291 rt2x00_rt(rt2x00dev, RT3572)) {
4109 drv_data->calibration_bw20 = 4292 drv_data->calibration_bw20 =
@@ -4392,7 +4575,7 @@ void rt2800_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
4392} 4575}
4393EXPORT_SYMBOL_GPL(rt2800_read_eeprom_efuse); 4576EXPORT_SYMBOL_GPL(rt2800_read_eeprom_efuse);
4394 4577
4395int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) 4578static int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
4396{ 4579{
4397 struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; 4580 struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
4398 u16 word; 4581 u16 word;
@@ -4400,6 +4583,11 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
4400 u8 default_lna_gain; 4583 u8 default_lna_gain;
4401 4584
4402 /* 4585 /*
4586 * Read the EEPROM.
4587 */
4588 rt2800_read_eeprom(rt2x00dev);
4589
4590 /*
4403 * Start validation of the data that has been read. 4591 * Start validation of the data that has been read.
4404 */ 4592 */
4405 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); 4593 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
@@ -4521,9 +4709,8 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
4521 4709
4522 return 0; 4710 return 0;
4523} 4711}
4524EXPORT_SYMBOL_GPL(rt2800_validate_eeprom);
4525 4712
4526int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) 4713static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4527{ 4714{
4528 u32 reg; 4715 u32 reg;
4529 u16 value; 4716 u16 value;
@@ -4562,6 +4749,7 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4562 case RT3071: 4749 case RT3071:
4563 case RT3090: 4750 case RT3090:
4564 case RT3290: 4751 case RT3290:
4752 case RT3352:
4565 case RT3390: 4753 case RT3390:
4566 case RT3572: 4754 case RT3572:
4567 case RT5390: 4755 case RT5390:
@@ -4584,6 +4772,7 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4584 case RF3052: 4772 case RF3052:
4585 case RF3290: 4773 case RF3290:
4586 case RF3320: 4774 case RF3320:
4775 case RF3322:
4587 case RF5360: 4776 case RF5360:
4588 case RF5370: 4777 case RF5370:
4589 case RF5372: 4778 case RF5372:
@@ -4608,6 +4797,7 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4608 4797
4609 if (rt2x00_rt(rt2x00dev, RT3070) || 4798 if (rt2x00_rt(rt2x00dev, RT3070) ||
4610 rt2x00_rt(rt2x00dev, RT3090) || 4799 rt2x00_rt(rt2x00dev, RT3090) ||
4800 rt2x00_rt(rt2x00dev, RT3352) ||
4611 rt2x00_rt(rt2x00dev, RT3390)) { 4801 rt2x00_rt(rt2x00dev, RT3390)) {
4612 value = rt2x00_get_field16(eeprom, 4802 value = rt2x00_get_field16(eeprom,
4613 EEPROM_NIC_CONF1_ANT_DIVERSITY); 4803 EEPROM_NIC_CONF1_ANT_DIVERSITY);
@@ -4681,7 +4871,6 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4681 4871
4682 return 0; 4872 return 0;
4683} 4873}
4684EXPORT_SYMBOL_GPL(rt2800_init_eeprom);
4685 4874
4686/* 4875/*
4687 * RF value list for rt28xx 4876 * RF value list for rt28xx
@@ -4824,7 +5013,7 @@ static const struct rf_channel rf_vals_3x[] = {
4824 {173, 0x61, 0, 9}, 5013 {173, 0x61, 0, 9},
4825}; 5014};
4826 5015
4827int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) 5016static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
4828{ 5017{
4829 struct hw_mode_spec *spec = &rt2x00dev->spec; 5018 struct hw_mode_spec *spec = &rt2x00dev->spec;
4830 struct channel_info *info; 5019 struct channel_info *info;
@@ -4901,6 +5090,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
4901 rt2x00_rf(rt2x00dev, RF3022) || 5090 rt2x00_rf(rt2x00dev, RF3022) ||
4902 rt2x00_rf(rt2x00dev, RF3290) || 5091 rt2x00_rf(rt2x00dev, RF3290) ||
4903 rt2x00_rf(rt2x00dev, RF3320) || 5092 rt2x00_rf(rt2x00dev, RF3320) ||
5093 rt2x00_rf(rt2x00dev, RF3322) ||
4904 rt2x00_rf(rt2x00dev, RF5360) || 5094 rt2x00_rf(rt2x00dev, RF5360) ||
4905 rt2x00_rf(rt2x00dev, RF5370) || 5095 rt2x00_rf(rt2x00dev, RF5370) ||
4906 rt2x00_rf(rt2x00dev, RF5372) || 5096 rt2x00_rf(rt2x00dev, RF5372) ||
@@ -5000,7 +5190,72 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
5000 5190
5001 return 0; 5191 return 0;
5002} 5192}
5003EXPORT_SYMBOL_GPL(rt2800_probe_hw_mode); 5193
5194int rt2800_probe_hw(struct rt2x00_dev *rt2x00dev)
5195{
5196 int retval;
5197 u32 reg;
5198
5199 /*
5200 * Allocate eeprom data.
5201 */
5202 retval = rt2800_validate_eeprom(rt2x00dev);
5203 if (retval)
5204 return retval;
5205
5206 retval = rt2800_init_eeprom(rt2x00dev);
5207 if (retval)
5208 return retval;
5209
5210 /*
5211 * Enable rfkill polling by setting GPIO direction of the
5212 * rfkill switch GPIO pin correctly.
5213 */
5214 rt2800_register_read(rt2x00dev, GPIO_CTRL, &reg);
5215 rt2x00_set_field32(&reg, GPIO_CTRL_DIR2, 1);
5216 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg);
5217
5218 /*
5219 * Initialize hw specifications.
5220 */
5221 retval = rt2800_probe_hw_mode(rt2x00dev);
5222 if (retval)
5223 return retval;
5224
5225 /*
5226 * Set device capabilities.
5227 */
5228 __set_bit(CAPABILITY_CONTROL_FILTERS, &rt2x00dev->cap_flags);
5229 __set_bit(CAPABILITY_CONTROL_FILTER_PSPOLL, &rt2x00dev->cap_flags);
5230 if (!rt2x00_is_usb(rt2x00dev))
5231 __set_bit(CAPABILITY_PRE_TBTT_INTERRUPT, &rt2x00dev->cap_flags);
5232
5233 /*
5234 * Set device requirements.
5235 */
5236 if (!rt2x00_is_soc(rt2x00dev))
5237 __set_bit(REQUIRE_FIRMWARE, &rt2x00dev->cap_flags);
5238 __set_bit(REQUIRE_L2PAD, &rt2x00dev->cap_flags);
5239 __set_bit(REQUIRE_TXSTATUS_FIFO, &rt2x00dev->cap_flags);
5240 if (!rt2800_hwcrypt_disabled(rt2x00dev))
5241 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
5242 __set_bit(CAPABILITY_LINK_TUNING, &rt2x00dev->cap_flags);
5243 __set_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags);
5244 if (rt2x00_is_usb(rt2x00dev))
5245 __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
5246 else {
5247 __set_bit(REQUIRE_DMA, &rt2x00dev->cap_flags);
5248 __set_bit(REQUIRE_TASKLET_CONTEXT, &rt2x00dev->cap_flags);
5249 }
5250
5251 /*
5252 * Set the rssi offset.
5253 */
5254 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
5255
5256 return 0;
5257}
5258EXPORT_SYMBOL_GPL(rt2800_probe_hw);
5004 5259
5005/* 5260/*
5006 * IEEE80211 stack callback functions. 5261 * IEEE80211 stack callback functions.
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h
index 18a0b67b4c68..a128ceadcb3e 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.h
+++ b/drivers/net/wireless/rt2x00/rt2800lib.h
@@ -43,6 +43,9 @@ struct rt2800_ops {
43 const unsigned int offset, 43 const unsigned int offset,
44 const struct rt2x00_field32 field, u32 *reg); 44 const struct rt2x00_field32 field, u32 *reg);
45 45
46 void (*read_eeprom)(struct rt2x00_dev *rt2x00dev);
47 bool (*hwcrypt_disabled)(struct rt2x00_dev *rt2x00dev);
48
46 int (*drv_write_firmware)(struct rt2x00_dev *rt2x00dev, 49 int (*drv_write_firmware)(struct rt2x00_dev *rt2x00dev,
47 const u8 *data, const size_t len); 50 const u8 *data, const size_t len);
48 int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev); 51 int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev);
@@ -114,6 +117,20 @@ static inline int rt2800_regbusy_read(struct rt2x00_dev *rt2x00dev,
114 return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg); 117 return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg);
115} 118}
116 119
120static inline void rt2800_read_eeprom(struct rt2x00_dev *rt2x00dev)
121{
122 const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
123
124 rt2800ops->read_eeprom(rt2x00dev);
125}
126
127static inline bool rt2800_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
128{
129 const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
130
131 return rt2800ops->hwcrypt_disabled(rt2x00dev);
132}
133
117static inline int rt2800_drv_write_firmware(struct rt2x00_dev *rt2x00dev, 134static inline int rt2800_drv_write_firmware(struct rt2x00_dev *rt2x00dev,
118 const u8 *data, const size_t len) 135 const u8 *data, const size_t len)
119{ 136{
@@ -191,9 +208,8 @@ void rt2800_disable_radio(struct rt2x00_dev *rt2x00dev);
191 208
192int rt2800_efuse_detect(struct rt2x00_dev *rt2x00dev); 209int rt2800_efuse_detect(struct rt2x00_dev *rt2x00dev);
193void rt2800_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev); 210void rt2800_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev);
194int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev); 211
195int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev); 212int rt2800_probe_hw(struct rt2x00_dev *rt2x00dev);
196int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev);
197 213
198void rt2800_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx, u32 *iv32, 214void rt2800_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx, u32 *iv32,
199 u16 *iv16); 215 u16 *iv16);
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index 4765bbd654cd..27829e1e2e38 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -54,6 +54,11 @@ static bool modparam_nohwcrypt = false;
54module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); 54module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
55MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 55MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
56 56
57static bool rt2800pci_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
58{
59 return modparam_nohwcrypt;
60}
61
57static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token) 62static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
58{ 63{
59 unsigned int i; 64 unsigned int i;
@@ -965,85 +970,14 @@ static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
965/* 970/*
966 * Device probe functions. 971 * Device probe functions.
967 */ 972 */
968static int rt2800pci_validate_eeprom(struct rt2x00_dev *rt2x00dev) 973static void rt2800pci_read_eeprom(struct rt2x00_dev *rt2x00dev)
969{ 974{
970 /*
971 * Read EEPROM into buffer
972 */
973 if (rt2x00_is_soc(rt2x00dev)) 975 if (rt2x00_is_soc(rt2x00dev))
974 rt2800pci_read_eeprom_soc(rt2x00dev); 976 rt2800pci_read_eeprom_soc(rt2x00dev);
975 else if (rt2800pci_efuse_detect(rt2x00dev)) 977 else if (rt2800pci_efuse_detect(rt2x00dev))
976 rt2800pci_read_eeprom_efuse(rt2x00dev); 978 rt2800pci_read_eeprom_efuse(rt2x00dev);
977 else 979 else
978 rt2800pci_read_eeprom_pci(rt2x00dev); 980 rt2800pci_read_eeprom_pci(rt2x00dev);
979
980 return rt2800_validate_eeprom(rt2x00dev);
981}
982
983static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
984{
985 int retval;
986 u32 reg;
987
988 /*
989 * Allocate eeprom data.
990 */
991 retval = rt2800pci_validate_eeprom(rt2x00dev);
992 if (retval)
993 return retval;
994
995 retval = rt2800_init_eeprom(rt2x00dev);
996 if (retval)
997 return retval;
998
999 /*
1000 * Enable rfkill polling by setting GPIO direction of the
1001 * rfkill switch GPIO pin correctly.
1002 */
1003 rt2x00pci_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
1004 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT2, 1);
1005 rt2x00pci_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);
1006
1007 /*
1008 * Initialize hw specifications.
1009 */
1010 retval = rt2800_probe_hw_mode(rt2x00dev);
1011 if (retval)
1012 return retval;
1013
1014 /*
1015 * This device has multiple filters for control frames
1016 * and has a separate filter for PS Poll frames.
1017 */
1018 __set_bit(CAPABILITY_CONTROL_FILTERS, &rt2x00dev->cap_flags);
1019 __set_bit(CAPABILITY_CONTROL_FILTER_PSPOLL, &rt2x00dev->cap_flags);
1020
1021 /*
1022 * This device has a pre tbtt interrupt and thus fetches
1023 * a new beacon directly prior to transmission.
1024 */
1025 __set_bit(CAPABILITY_PRE_TBTT_INTERRUPT, &rt2x00dev->cap_flags);
1026
1027 /*
1028 * This device requires firmware.
1029 */
1030 if (!rt2x00_is_soc(rt2x00dev))
1031 __set_bit(REQUIRE_FIRMWARE, &rt2x00dev->cap_flags);
1032 __set_bit(REQUIRE_DMA, &rt2x00dev->cap_flags);
1033 __set_bit(REQUIRE_L2PAD, &rt2x00dev->cap_flags);
1034 __set_bit(REQUIRE_TXSTATUS_FIFO, &rt2x00dev->cap_flags);
1035 __set_bit(REQUIRE_TASKLET_CONTEXT, &rt2x00dev->cap_flags);
1036 if (!modparam_nohwcrypt)
1037 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
1038 __set_bit(CAPABILITY_LINK_TUNING, &rt2x00dev->cap_flags);
1039 __set_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags);
1040
1041 /*
1042 * Set the rssi offset.
1043 */
1044 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1045
1046 return 0;
1047} 981}
1048 982
1049static const struct ieee80211_ops rt2800pci_mac80211_ops = { 983static const struct ieee80211_ops rt2800pci_mac80211_ops = {
@@ -1081,6 +1015,8 @@ static const struct rt2800_ops rt2800pci_rt2800_ops = {
1081 .register_multiread = rt2x00pci_register_multiread, 1015 .register_multiread = rt2x00pci_register_multiread,
1082 .register_multiwrite = rt2x00pci_register_multiwrite, 1016 .register_multiwrite = rt2x00pci_register_multiwrite,
1083 .regbusy_read = rt2x00pci_regbusy_read, 1017 .regbusy_read = rt2x00pci_regbusy_read,
1018 .read_eeprom = rt2800pci_read_eeprom,
1019 .hwcrypt_disabled = rt2800pci_hwcrypt_disabled,
1084 .drv_write_firmware = rt2800pci_write_firmware, 1020 .drv_write_firmware = rt2800pci_write_firmware,
1085 .drv_init_registers = rt2800pci_init_registers, 1021 .drv_init_registers = rt2800pci_init_registers,
1086 .drv_get_txwi = rt2800pci_get_txwi, 1022 .drv_get_txwi = rt2800pci_get_txwi,
@@ -1093,7 +1029,7 @@ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
1093 .tbtt_tasklet = rt2800pci_tbtt_tasklet, 1029 .tbtt_tasklet = rt2800pci_tbtt_tasklet,
1094 .rxdone_tasklet = rt2800pci_rxdone_tasklet, 1030 .rxdone_tasklet = rt2800pci_rxdone_tasklet,
1095 .autowake_tasklet = rt2800pci_autowake_tasklet, 1031 .autowake_tasklet = rt2800pci_autowake_tasklet,
1096 .probe_hw = rt2800pci_probe_hw, 1032 .probe_hw = rt2800_probe_hw,
1097 .get_firmware_name = rt2800pci_get_firmware_name, 1033 .get_firmware_name = rt2800pci_get_firmware_name,
1098 .check_firmware = rt2800_check_firmware, 1034 .check_firmware = rt2800_check_firmware,
1099 .load_firmware = rt2800_load_firmware, 1035 .load_firmware = rt2800_load_firmware,
@@ -1152,7 +1088,6 @@ static const struct data_queue_desc rt2800pci_queue_bcn = {
1152static const struct rt2x00_ops rt2800pci_ops = { 1088static const struct rt2x00_ops rt2800pci_ops = {
1153 .name = KBUILD_MODNAME, 1089 .name = KBUILD_MODNAME,
1154 .drv_data_size = sizeof(struct rt2800_drv_data), 1090 .drv_data_size = sizeof(struct rt2800_drv_data),
1155 .max_sta_intf = 1,
1156 .max_ap_intf = 8, 1091 .max_ap_intf = 8,
1157 .eeprom_size = EEPROM_SIZE, 1092 .eeprom_size = EEPROM_SIZE,
1158 .rf_size = RF_SIZE, 1093 .rf_size = RF_SIZE,
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 6b4226b71618..c9e9370eb789 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -49,6 +49,11 @@ static bool modparam_nohwcrypt;
49module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); 49module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
50MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 50MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
51 51
52static bool rt2800usb_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
53{
54 return modparam_nohwcrypt;
55}
56
52/* 57/*
53 * Queue handlers. 58 * Queue handlers.
54 */ 59 */
@@ -730,73 +735,27 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
730/* 735/*
731 * Device probe functions. 736 * Device probe functions.
732 */ 737 */
733static int rt2800usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) 738static void rt2800usb_read_eeprom(struct rt2x00_dev *rt2x00dev)
734{ 739{
735 if (rt2800_efuse_detect(rt2x00dev)) 740 if (rt2800_efuse_detect(rt2x00dev))
736 rt2800_read_eeprom_efuse(rt2x00dev); 741 rt2800_read_eeprom_efuse(rt2x00dev);
737 else 742 else
738 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, 743 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom,
739 EEPROM_SIZE); 744 EEPROM_SIZE);
740
741 return rt2800_validate_eeprom(rt2x00dev);
742} 745}
743 746
744static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev) 747static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
745{ 748{
746 int retval; 749 int retval;
747 u32 reg;
748 750
749 /* 751 retval = rt2800_probe_hw(rt2x00dev);
750 * Allocate eeprom data.
751 */
752 retval = rt2800usb_validate_eeprom(rt2x00dev);
753 if (retval) 752 if (retval)
754 return retval; 753 return retval;
755 754
756 retval = rt2800_init_eeprom(rt2x00dev);
757 if (retval)
758 return retval;
759
760 /*
761 * Enable rfkill polling by setting GPIO direction of the
762 * rfkill switch GPIO pin correctly.
763 */
764 rt2x00usb_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
765 rt2x00_set_field32(&reg, GPIO_CTRL_CFG_GPIOD_BIT2, 1);
766 rt2x00usb_register_write(rt2x00dev, GPIO_CTRL_CFG, reg);
767
768 /*
769 * Initialize hw specifications.
770 */
771 retval = rt2800_probe_hw_mode(rt2x00dev);
772 if (retval)
773 return retval;
774
775 /*
776 * This device has multiple filters for control frames
777 * and has a separate filter for PS Poll frames.
778 */
779 __set_bit(CAPABILITY_CONTROL_FILTERS, &rt2x00dev->cap_flags);
780 __set_bit(CAPABILITY_CONTROL_FILTER_PSPOLL, &rt2x00dev->cap_flags);
781
782 /*
783 * This device requires firmware.
784 */
785 __set_bit(REQUIRE_FIRMWARE, &rt2x00dev->cap_flags);
786 __set_bit(REQUIRE_L2PAD, &rt2x00dev->cap_flags);
787 if (!modparam_nohwcrypt)
788 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
789 __set_bit(CAPABILITY_LINK_TUNING, &rt2x00dev->cap_flags);
790 __set_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags);
791 __set_bit(REQUIRE_TXSTATUS_FIFO, &rt2x00dev->cap_flags);
792 __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
793
794 rt2x00dev->txstatus_timer.function = rt2800usb_tx_sta_fifo_timeout,
795
796 /* 755 /*
797 * Set the rssi offset. 756 * Set txstatus timer function.
798 */ 757 */
799 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; 758 rt2x00dev->txstatus_timer.function = rt2800usb_tx_sta_fifo_timeout;
800 759
801 /* 760 /*
802 * Overwrite TX done handler 761 * Overwrite TX done handler
@@ -842,6 +801,8 @@ static const struct rt2800_ops rt2800usb_rt2800_ops = {
842 .register_multiread = rt2x00usb_register_multiread, 801 .register_multiread = rt2x00usb_register_multiread,
843 .register_multiwrite = rt2x00usb_register_multiwrite, 802 .register_multiwrite = rt2x00usb_register_multiwrite,
844 .regbusy_read = rt2x00usb_regbusy_read, 803 .regbusy_read = rt2x00usb_regbusy_read,
804 .read_eeprom = rt2800usb_read_eeprom,
805 .hwcrypt_disabled = rt2800usb_hwcrypt_disabled,
845 .drv_write_firmware = rt2800usb_write_firmware, 806 .drv_write_firmware = rt2800usb_write_firmware,
846 .drv_init_registers = rt2800usb_init_registers, 807 .drv_init_registers = rt2800usb_init_registers,
847 .drv_get_txwi = rt2800usb_get_txwi, 808 .drv_get_txwi = rt2800usb_get_txwi,
@@ -909,7 +870,6 @@ static const struct data_queue_desc rt2800usb_queue_bcn = {
909static const struct rt2x00_ops rt2800usb_ops = { 870static const struct rt2x00_ops rt2800usb_ops = {
910 .name = KBUILD_MODNAME, 871 .name = KBUILD_MODNAME,
911 .drv_data_size = sizeof(struct rt2800_drv_data), 872 .drv_data_size = sizeof(struct rt2800_drv_data),
912 .max_sta_intf = 1,
913 .max_ap_intf = 8, 873 .max_ap_intf = 8,
914 .eeprom_size = EEPROM_SIZE, 874 .eeprom_size = EEPROM_SIZE,
915 .rf_size = RF_SIZE, 875 .rf_size = RF_SIZE,
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 8afb546c2b2d..0751b35ef6dc 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -188,6 +188,7 @@ struct rt2x00_chip {
188#define RT3071 0x3071 188#define RT3071 0x3071
189#define RT3090 0x3090 /* 2.4GHz PCIe */ 189#define RT3090 0x3090 /* 2.4GHz PCIe */
190#define RT3290 0x3290 190#define RT3290 0x3290
191#define RT3352 0x3352 /* WSOC */
191#define RT3390 0x3390 192#define RT3390 0x3390
192#define RT3572 0x3572 193#define RT3572 0x3572
193#define RT3593 0x3593 194#define RT3593 0x3593
@@ -655,7 +656,6 @@ struct rt2x00lib_ops {
655struct rt2x00_ops { 656struct rt2x00_ops {
656 const char *name; 657 const char *name;
657 const unsigned int drv_data_size; 658 const unsigned int drv_data_size;
658 const unsigned int max_sta_intf;
659 const unsigned int max_ap_intf; 659 const unsigned int max_ap_intf;
660 const unsigned int eeprom_size; 660 const unsigned int eeprom_size;
661 const unsigned int rf_size; 661 const unsigned int rf_size;
@@ -741,6 +741,14 @@ enum rt2x00_capability_flags {
741}; 741};
742 742
743/* 743/*
744 * Interface combinations
745 */
746enum {
747 IF_COMB_AP = 0,
748 NUM_IF_COMB,
749};
750
751/*
744 * rt2x00 device structure. 752 * rt2x00 device structure.
745 */ 753 */
746struct rt2x00_dev { 754struct rt2x00_dev {
@@ -867,6 +875,12 @@ struct rt2x00_dev {
867 unsigned int intf_beaconing; 875 unsigned int intf_beaconing;
868 876
869 /* 877 /*
878 * Interface combinations
879 */
880 struct ieee80211_iface_limit if_limits_ap;
881 struct ieee80211_iface_combination if_combinations[NUM_IF_COMB];
882
883 /*
870 * Link quality 884 * Link quality
871 */ 885 */
872 struct link link; 886 struct link link;
@@ -1287,7 +1301,9 @@ void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp);
1287/* 1301/*
1288 * mac80211 handlers. 1302 * mac80211 handlers.
1289 */ 1303 */
1290void rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); 1304void rt2x00mac_tx(struct ieee80211_hw *hw,
1305 struct ieee80211_tx_control *control,
1306 struct sk_buff *skb);
1291int rt2x00mac_start(struct ieee80211_hw *hw); 1307int rt2x00mac_start(struct ieee80211_hw *hw);
1292void rt2x00mac_stop(struct ieee80211_hw *hw); 1308void rt2x00mac_stop(struct ieee80211_hw *hw);
1293int rt2x00mac_add_interface(struct ieee80211_hw *hw, 1309int rt2x00mac_add_interface(struct ieee80211_hw *hw,
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 3f07e36f462b..69097d1faeb6 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -194,7 +194,7 @@ static void rt2x00lib_bc_buffer_iter(void *data, u8 *mac,
194 */ 194 */
195 skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif); 195 skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
196 while (skb) { 196 while (skb) {
197 rt2x00mac_tx(rt2x00dev->hw, skb); 197 rt2x00mac_tx(rt2x00dev->hw, NULL, skb);
198 skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif); 198 skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
199 } 199 }
200} 200}
@@ -1118,6 +1118,34 @@ void rt2x00lib_stop(struct rt2x00_dev *rt2x00dev)
1118 rt2x00dev->intf_associated = 0; 1118 rt2x00dev->intf_associated = 0;
1119} 1119}
1120 1120
1121static inline void rt2x00lib_set_if_combinations(struct rt2x00_dev *rt2x00dev)
1122{
1123 struct ieee80211_iface_limit *if_limit;
1124 struct ieee80211_iface_combination *if_combination;
1125
1126 /*
1127 * Build up AP interface limits structure.
1128 */
1129 if_limit = &rt2x00dev->if_limits_ap;
1130 if_limit->max = rt2x00dev->ops->max_ap_intf;
1131 if_limit->types = BIT(NL80211_IFTYPE_AP);
1132
1133 /*
1134 * Build up AP interface combinations structure.
1135 */
1136 if_combination = &rt2x00dev->if_combinations[IF_COMB_AP];
1137 if_combination->limits = if_limit;
1138 if_combination->n_limits = 1;
1139 if_combination->max_interfaces = if_limit->max;
1140 if_combination->num_different_channels = 1;
1141
1142 /*
1143 * Finally, specify the possible combinations to mac80211.
1144 */
1145 rt2x00dev->hw->wiphy->iface_combinations = rt2x00dev->if_combinations;
1146 rt2x00dev->hw->wiphy->n_iface_combinations = 1;
1147}
1148
1121/* 1149/*
1122 * driver allocation handlers. 1150 * driver allocation handlers.
1123 */ 1151 */
@@ -1126,6 +1154,11 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
1126 int retval = -ENOMEM; 1154 int retval = -ENOMEM;
1127 1155
1128 /* 1156 /*
1157 * Set possible interface combinations.
1158 */
1159 rt2x00lib_set_if_combinations(rt2x00dev);
1160
1161 /*
1129 * Allocate the driver data memory, if necessary. 1162 * Allocate the driver data memory, if necessary.
1130 */ 1163 */
1131 if (rt2x00dev->ops->drv_data_size > 0) { 1164 if (rt2x00dev->ops->drv_data_size > 0) {
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index 4ff26c2159bf..98a9e48f8e4a 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -99,7 +99,9 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev,
99 return retval; 99 return retval;
100} 100}
101 101
102void rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 102void rt2x00mac_tx(struct ieee80211_hw *hw,
103 struct ieee80211_tx_control *control,
104 struct sk_buff *skb)
103{ 105{
104 struct rt2x00_dev *rt2x00dev = hw->priv; 106 struct rt2x00_dev *rt2x00dev = hw->priv;
105 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 107 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
@@ -212,46 +214,6 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw,
212 !test_bit(DEVICE_STATE_STARTED, &rt2x00dev->flags)) 214 !test_bit(DEVICE_STATE_STARTED, &rt2x00dev->flags))
213 return -ENODEV; 215 return -ENODEV;
214 216
215 switch (vif->type) {
216 case NL80211_IFTYPE_AP:
217 /*
218 * We don't support mixed combinations of
219 * sta and ap interfaces.
220 */
221 if (rt2x00dev->intf_sta_count)
222 return -ENOBUFS;
223
224 /*
225 * Check if we exceeded the maximum amount
226 * of supported interfaces.
227 */
228 if (rt2x00dev->intf_ap_count >= rt2x00dev->ops->max_ap_intf)
229 return -ENOBUFS;
230
231 break;
232 case NL80211_IFTYPE_STATION:
233 case NL80211_IFTYPE_ADHOC:
234 case NL80211_IFTYPE_MESH_POINT:
235 case NL80211_IFTYPE_WDS:
236 /*
237 * We don't support mixed combinations of
238 * sta and ap interfaces.
239 */
240 if (rt2x00dev->intf_ap_count)
241 return -ENOBUFS;
242
243 /*
244 * Check if we exceeded the maximum amount
245 * of supported interfaces.
246 */
247 if (rt2x00dev->intf_sta_count >= rt2x00dev->ops->max_sta_intf)
248 return -ENOBUFS;
249
250 break;
251 default:
252 return -EINVAL;
253 }
254
255 /* 217 /*
256 * Loop through all beacon queues to find a free 218 * Loop through all beacon queues to find a free
257 * entry. Since there are as much beacon entries 219 * entry. Since there are as much beacon entries
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index f7e74a0a7759..e488b944a034 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -315,6 +315,7 @@ static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
315static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev, 315static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
316 struct sk_buff *skb, 316 struct sk_buff *skb,
317 struct txentry_desc *txdesc, 317 struct txentry_desc *txdesc,
318 struct ieee80211_sta *sta,
318 const struct rt2x00_rate *hwrate) 319 const struct rt2x00_rate *hwrate)
319{ 320{
320 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 321 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
@@ -322,11 +323,11 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
322 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 323 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
323 struct rt2x00_sta *sta_priv = NULL; 324 struct rt2x00_sta *sta_priv = NULL;
324 325
325 if (tx_info->control.sta) { 326 if (sta) {
326 txdesc->u.ht.mpdu_density = 327 txdesc->u.ht.mpdu_density =
327 tx_info->control.sta->ht_cap.ampdu_density; 328 sta->ht_cap.ampdu_density;
328 329
329 sta_priv = sta_to_rt2x00_sta(tx_info->control.sta); 330 sta_priv = sta_to_rt2x00_sta(sta);
330 txdesc->u.ht.wcid = sta_priv->wcid; 331 txdesc->u.ht.wcid = sta_priv->wcid;
331 } 332 }
332 333
@@ -341,8 +342,8 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
341 * MIMO PS should be set to 1 for STA's using dynamic SM PS 342 * MIMO PS should be set to 1 for STA's using dynamic SM PS
342 * when using more then one tx stream (>MCS7). 343 * when using more then one tx stream (>MCS7).
343 */ 344 */
344 if (tx_info->control.sta && txdesc->u.ht.mcs > 7 && 345 if (sta && txdesc->u.ht.mcs > 7 &&
345 ((tx_info->control.sta->ht_cap.cap & 346 ((sta->ht_cap.cap &
346 IEEE80211_HT_CAP_SM_PS) >> 347 IEEE80211_HT_CAP_SM_PS) >>
347 IEEE80211_HT_CAP_SM_PS_SHIFT) == 348 IEEE80211_HT_CAP_SM_PS_SHIFT) ==
348 WLAN_HT_CAP_SM_PS_DYNAMIC) 349 WLAN_HT_CAP_SM_PS_DYNAMIC)
@@ -409,7 +410,8 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
409 410
410static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev, 411static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
411 struct sk_buff *skb, 412 struct sk_buff *skb,
412 struct txentry_desc *txdesc) 413 struct txentry_desc *txdesc,
414 struct ieee80211_sta *sta)
413{ 415{
414 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 416 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
415 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 417 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
@@ -503,7 +505,7 @@ static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
503 505
504 if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags)) 506 if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
505 rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc, 507 rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
506 hwrate); 508 sta, hwrate);
507 else 509 else
508 rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc, 510 rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
509 hwrate); 511 hwrate);
@@ -595,7 +597,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
595 * after that we are free to use the skb->cb array 597 * after that we are free to use the skb->cb array
596 * for our information. 598 * for our information.
597 */ 599 */
598 rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc); 600 rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, NULL);
599 601
600 /* 602 /*
601 * All information is retrieved from the skb->cb array, 603 * All information is retrieved from the skb->cb array,
@@ -740,7 +742,7 @@ int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
740 * after that we are free to use the skb->cb array 742 * after that we are free to use the skb->cb array
741 * for our information. 743 * for our information.
742 */ 744 */
743 rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc); 745 rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
744 746
745 /* 747 /*
746 * Fill in skb descriptor 748 * Fill in skb descriptor
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index b8ec96163922..d6582a2fa353 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -243,7 +243,7 @@ static int rt61pci_rfkill_poll(struct rt2x00_dev *rt2x00dev)
243 u32 reg; 243 u32 reg;
244 244
245 rt2x00pci_register_read(rt2x00dev, MAC_CSR13, &reg); 245 rt2x00pci_register_read(rt2x00dev, MAC_CSR13, &reg);
246 return rt2x00_get_field32(reg, MAC_CSR13_BIT5); 246 return rt2x00_get_field32(reg, MAC_CSR13_VAL5);
247} 247}
248 248
249#ifdef CONFIG_RT2X00_LIB_LEDS 249#ifdef CONFIG_RT2X00_LIB_LEDS
@@ -715,11 +715,11 @@ static void rt61pci_config_antenna_2529_rx(struct rt2x00_dev *rt2x00dev,
715 715
716 rt2x00pci_register_read(rt2x00dev, MAC_CSR13, &reg); 716 rt2x00pci_register_read(rt2x00dev, MAC_CSR13, &reg);
717 717
718 rt2x00_set_field32(&reg, MAC_CSR13_BIT4, p1); 718 rt2x00_set_field32(&reg, MAC_CSR13_DIR4, 0);
719 rt2x00_set_field32(&reg, MAC_CSR13_BIT12, 0); 719 rt2x00_set_field32(&reg, MAC_CSR13_VAL4, p1);
720 720
721 rt2x00_set_field32(&reg, MAC_CSR13_BIT3, !p2); 721 rt2x00_set_field32(&reg, MAC_CSR13_DIR3, 0);
722 rt2x00_set_field32(&reg, MAC_CSR13_BIT11, 0); 722 rt2x00_set_field32(&reg, MAC_CSR13_VAL3, !p2);
723 723
724 rt2x00pci_register_write(rt2x00dev, MAC_CSR13, reg); 724 rt2x00pci_register_write(rt2x00dev, MAC_CSR13, reg);
725} 725}
@@ -2855,7 +2855,7 @@ static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev)
2855 * rfkill switch GPIO pin correctly. 2855 * rfkill switch GPIO pin correctly.
2856 */ 2856 */
2857 rt2x00pci_register_read(rt2x00dev, MAC_CSR13, &reg); 2857 rt2x00pci_register_read(rt2x00dev, MAC_CSR13, &reg);
2858 rt2x00_set_field32(&reg, MAC_CSR13_BIT13, 1); 2858 rt2x00_set_field32(&reg, MAC_CSR13_DIR5, 1);
2859 rt2x00pci_register_write(rt2x00dev, MAC_CSR13, reg); 2859 rt2x00pci_register_write(rt2x00dev, MAC_CSR13, reg);
2860 2860
2861 /* 2861 /*
@@ -3045,7 +3045,6 @@ static const struct data_queue_desc rt61pci_queue_bcn = {
3045 3045
3046static const struct rt2x00_ops rt61pci_ops = { 3046static const struct rt2x00_ops rt61pci_ops = {
3047 .name = KBUILD_MODNAME, 3047 .name = KBUILD_MODNAME,
3048 .max_sta_intf = 1,
3049 .max_ap_intf = 4, 3048 .max_ap_intf = 4,
3050 .eeprom_size = EEPROM_SIZE, 3049 .eeprom_size = EEPROM_SIZE,
3051 .rf_size = RF_SIZE, 3050 .rf_size = RF_SIZE,
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index 8f3da5a56766..9bc6b6044e34 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -357,22 +357,22 @@ struct hw_pairwise_ta_entry {
357 357
358/* 358/*
359 * MAC_CSR13: GPIO. 359 * MAC_CSR13: GPIO.
360 * MAC_CSR13_VALx: GPIO value
361 * MAC_CSR13_DIRx: GPIO direction: 0 = output; 1 = input
360 */ 362 */
361#define MAC_CSR13 0x3034 363#define MAC_CSR13 0x3034
362#define MAC_CSR13_BIT0 FIELD32(0x00000001) 364#define MAC_CSR13_VAL0 FIELD32(0x00000001)
363#define MAC_CSR13_BIT1 FIELD32(0x00000002) 365#define MAC_CSR13_VAL1 FIELD32(0x00000002)
364#define MAC_CSR13_BIT2 FIELD32(0x00000004) 366#define MAC_CSR13_VAL2 FIELD32(0x00000004)
365#define MAC_CSR13_BIT3 FIELD32(0x00000008) 367#define MAC_CSR13_VAL3 FIELD32(0x00000008)
366#define MAC_CSR13_BIT4 FIELD32(0x00000010) 368#define MAC_CSR13_VAL4 FIELD32(0x00000010)
367#define MAC_CSR13_BIT5 FIELD32(0x00000020) 369#define MAC_CSR13_VAL5 FIELD32(0x00000020)
368#define MAC_CSR13_BIT6 FIELD32(0x00000040) 370#define MAC_CSR13_DIR0 FIELD32(0x00000100)
369#define MAC_CSR13_BIT7 FIELD32(0x00000080) 371#define MAC_CSR13_DIR1 FIELD32(0x00000200)
370#define MAC_CSR13_BIT8 FIELD32(0x00000100) 372#define MAC_CSR13_DIR2 FIELD32(0x00000400)
371#define MAC_CSR13_BIT9 FIELD32(0x00000200) 373#define MAC_CSR13_DIR3 FIELD32(0x00000800)
372#define MAC_CSR13_BIT10 FIELD32(0x00000400) 374#define MAC_CSR13_DIR4 FIELD32(0x00001000)
373#define MAC_CSR13_BIT11 FIELD32(0x00000800) 375#define MAC_CSR13_DIR5 FIELD32(0x00002000)
374#define MAC_CSR13_BIT12 FIELD32(0x00001000)
375#define MAC_CSR13_BIT13 FIELD32(0x00002000)
376 376
377/* 377/*
378 * MAC_CSR14: LED control register. 378 * MAC_CSR14: LED control register.
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 248436c13ce0..e5eb43b3eee7 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -189,7 +189,7 @@ static int rt73usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
189 u32 reg; 189 u32 reg;
190 190
191 rt2x00usb_register_read(rt2x00dev, MAC_CSR13, &reg); 191 rt2x00usb_register_read(rt2x00dev, MAC_CSR13, &reg);
192 return rt2x00_get_field32(reg, MAC_CSR13_BIT7); 192 return rt2x00_get_field32(reg, MAC_CSR13_VAL7);
193} 193}
194 194
195#ifdef CONFIG_RT2X00_LIB_LEDS 195#ifdef CONFIG_RT2X00_LIB_LEDS
@@ -2195,7 +2195,7 @@ static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2195 * rfkill switch GPIO pin correctly. 2195 * rfkill switch GPIO pin correctly.
2196 */ 2196 */
2197 rt2x00usb_register_read(rt2x00dev, MAC_CSR13, &reg); 2197 rt2x00usb_register_read(rt2x00dev, MAC_CSR13, &reg);
2198 rt2x00_set_field32(&reg, MAC_CSR13_BIT15, 0); 2198 rt2x00_set_field32(&reg, MAC_CSR13_DIR7, 0);
2199 rt2x00usb_register_write(rt2x00dev, MAC_CSR13, reg); 2199 rt2x00usb_register_write(rt2x00dev, MAC_CSR13, reg);
2200 2200
2201 /* 2201 /*
@@ -2382,7 +2382,6 @@ static const struct data_queue_desc rt73usb_queue_bcn = {
2382 2382
2383static const struct rt2x00_ops rt73usb_ops = { 2383static const struct rt2x00_ops rt73usb_ops = {
2384 .name = KBUILD_MODNAME, 2384 .name = KBUILD_MODNAME,
2385 .max_sta_intf = 1,
2386 .max_ap_intf = 4, 2385 .max_ap_intf = 4,
2387 .eeprom_size = EEPROM_SIZE, 2386 .eeprom_size = EEPROM_SIZE,
2388 .rf_size = RF_SIZE, 2387 .rf_size = RF_SIZE,
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h
index df1cc116b83b..7577e0ba3877 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.h
+++ b/drivers/net/wireless/rt2x00/rt73usb.h
@@ -267,24 +267,26 @@ struct hw_pairwise_ta_entry {
267 267
268/* 268/*
269 * MAC_CSR13: GPIO. 269 * MAC_CSR13: GPIO.
270 * MAC_CSR13_VALx: GPIO value
271 * MAC_CSR13_DIRx: GPIO direction: 0 = input; 1 = output
270 */ 272 */
271#define MAC_CSR13 0x3034 273#define MAC_CSR13 0x3034
272#define MAC_CSR13_BIT0 FIELD32(0x00000001) 274#define MAC_CSR13_VAL0 FIELD32(0x00000001)
273#define MAC_CSR13_BIT1 FIELD32(0x00000002) 275#define MAC_CSR13_VAL1 FIELD32(0x00000002)
274#define MAC_CSR13_BIT2 FIELD32(0x00000004) 276#define MAC_CSR13_VAL2 FIELD32(0x00000004)
275#define MAC_CSR13_BIT3 FIELD32(0x00000008) 277#define MAC_CSR13_VAL3 FIELD32(0x00000008)
276#define MAC_CSR13_BIT4 FIELD32(0x00000010) 278#define MAC_CSR13_VAL4 FIELD32(0x00000010)
277#define MAC_CSR13_BIT5 FIELD32(0x00000020) 279#define MAC_CSR13_VAL5 FIELD32(0x00000020)
278#define MAC_CSR13_BIT6 FIELD32(0x00000040) 280#define MAC_CSR13_VAL6 FIELD32(0x00000040)
279#define MAC_CSR13_BIT7 FIELD32(0x00000080) 281#define MAC_CSR13_VAL7 FIELD32(0x00000080)
280#define MAC_CSR13_BIT8 FIELD32(0x00000100) 282#define MAC_CSR13_DIR0 FIELD32(0x00000100)
281#define MAC_CSR13_BIT9 FIELD32(0x00000200) 283#define MAC_CSR13_DIR1 FIELD32(0x00000200)
282#define MAC_CSR13_BIT10 FIELD32(0x00000400) 284#define MAC_CSR13_DIR2 FIELD32(0x00000400)
283#define MAC_CSR13_BIT11 FIELD32(0x00000800) 285#define MAC_CSR13_DIR3 FIELD32(0x00000800)
284#define MAC_CSR13_BIT12 FIELD32(0x00001000) 286#define MAC_CSR13_DIR4 FIELD32(0x00001000)
285#define MAC_CSR13_BIT13 FIELD32(0x00002000) 287#define MAC_CSR13_DIR5 FIELD32(0x00002000)
286#define MAC_CSR13_BIT14 FIELD32(0x00004000) 288#define MAC_CSR13_DIR6 FIELD32(0x00004000)
287#define MAC_CSR13_BIT15 FIELD32(0x00008000) 289#define MAC_CSR13_DIR7 FIELD32(0x00008000)
288 290
289/* 291/*
290 * MAC_CSR14: LED control register. 292 * MAC_CSR14: LED control register.
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 05:21:22 -0500