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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/net/wireless/b43
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r--drivers/net/wireless/b43/Kconfig13
-rw-r--r--drivers/net/wireless/b43/Makefile6
-rw-r--r--drivers/net/wireless/b43/b43.h52
-rw-r--r--drivers/net/wireless/b43/debugfs.c1
-rw-r--r--drivers/net/wireless/b43/dma.c44
-rw-r--r--drivers/net/wireless/b43/dma.h2
-rw-r--r--drivers/net/wireless/b43/leds.c4
-rw-r--r--drivers/net/wireless/b43/lo.c4
-rw-r--r--drivers/net/wireless/b43/main.c364
-rw-r--r--drivers/net/wireless/b43/main.h1
-rw-r--r--drivers/net/wireless/b43/pcmcia.c26
-rw-r--r--drivers/net/wireless/b43/phy_a.c16
-rw-r--r--drivers/net/wireless/b43/phy_common.c36
-rw-r--r--drivers/net/wireless/b43/phy_common.h13
-rw-r--r--drivers/net/wireless/b43/phy_g.c50
-rw-r--r--drivers/net/wireless/b43/phy_g.h2
-rw-r--r--drivers/net/wireless/b43/phy_lp.c22
-rw-r--r--drivers/net/wireless/b43/phy_n.c1014
-rw-r--r--drivers/net/wireless/b43/phy_n.h222
-rw-r--r--drivers/net/wireless/b43/pio.c30
-rw-r--r--drivers/net/wireless/b43/radio_2055.c1334
-rw-r--r--drivers/net/wireless/b43/radio_2055.h254
-rw-r--r--drivers/net/wireless/b43/radio_2056.c9099
-rw-r--r--drivers/net/wireless/b43/radio_2056.h1120
-rw-r--r--drivers/net/wireless/b43/rfkill.c25
-rw-r--r--drivers/net/wireless/b43/sdio.c7
-rw-r--r--drivers/net/wireless/b43/sysfs.c4
-rw-r--r--drivers/net/wireless/b43/tables_lpphy.c4
-rw-r--r--drivers/net/wireless/b43/tables_nphy.c2748
-rw-r--r--drivers/net/wireless/b43/tables_nphy.h107
-rw-r--r--drivers/net/wireless/b43/wa.c4
-rw-r--r--drivers/net/wireless/b43/xmit.c77
-rw-r--r--drivers/net/wireless/b43/xmit.h6
33 files changed, 14422 insertions, 2289 deletions
diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig
index 0a00d42642cd..480595f04411 100644
--- a/drivers/net/wireless/b43/Kconfig
+++ b/drivers/net/wireless/b43/Kconfig
@@ -86,15 +86,16 @@ config B43_PIO
86 select SSB_BLOCKIO 86 select SSB_BLOCKIO
87 default y 87 default y
88 88
89config B43_NPHY 89config B43_PHY_N
90 bool "Pre IEEE 802.11n support (BROKEN)" 90 bool "Support for 802.11n (N-PHY) devices (EXPERIMENTAL)"
91 depends on B43 && EXPERIMENTAL && BROKEN 91 depends on B43 && EXPERIMENTAL
92 ---help--- 92 ---help---
93 Support for the IEEE 802.11n draft. 93 Support for the N-PHY.
94 94
95 THIS IS BROKEN AND DOES NOT WORK YET. 95 This enables support for devices with N-PHY.
96 96
97 SAY N. 97 Say N if you expect high stability and performance. Saying Y will not
98 affect other devices support and may provide support for basic needs.
98 99
99config B43_PHY_LP 100config B43_PHY_LP
100 bool "Support for low-power (LP-PHY) devices (EXPERIMENTAL)" 101 bool "Support for low-power (LP-PHY) devices (EXPERIMENTAL)"
diff --git a/drivers/net/wireless/b43/Makefile b/drivers/net/wireless/b43/Makefile
index 5e83b6f0a3a0..cef334a8c669 100644
--- a/drivers/net/wireless/b43/Makefile
+++ b/drivers/net/wireless/b43/Makefile
@@ -1,10 +1,12 @@
1b43-y += main.o 1b43-y += main.o
2b43-y += tables.o 2b43-y += tables.o
3b43-$(CONFIG_B43_NPHY) += tables_nphy.o 3b43-$(CONFIG_B43_PHY_N) += tables_nphy.o
4b43-$(CONFIG_B43_PHY_N) += radio_2055.o
5b43-$(CONFIG_B43_PHY_N) += radio_2056.o
4b43-y += phy_common.o 6b43-y += phy_common.o
5b43-y += phy_g.o 7b43-y += phy_g.o
6b43-y += phy_a.o 8b43-y += phy_a.o
7b43-$(CONFIG_B43_NPHY) += phy_n.o 9b43-$(CONFIG_B43_PHY_N) += phy_n.o
8b43-$(CONFIG_B43_PHY_LP) += phy_lp.o 10b43-$(CONFIG_B43_PHY_LP) += phy_lp.o
9b43-$(CONFIG_B43_PHY_LP) += tables_lpphy.o 11b43-$(CONFIG_B43_PHY_LP) += tables_lpphy.o
10b43-y += sysfs.o 12b43-y += sysfs.o
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 8674a99356af..25a78cfb7d15 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -153,6 +153,19 @@
153#define B43_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna 153#define B43_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna
154 * with bluetooth */ 154 * with bluetooth */
155 155
156/* SPROM boardflags2_lo values */
157#define B43_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */
158#define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
159#define B43_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */
160#define B43_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */
161#define B43_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
162#define B43_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */
163#define B43_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */
164#define B43_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
165#define B43_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */
166#define B43_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
167#define B43_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
168
156/* GPIO register offset, in both ChipCommon and PCI core. */ 169/* GPIO register offset, in both ChipCommon and PCI core. */
157#define B43_GPIO_CONTROL 0x6c 170#define B43_GPIO_CONTROL 0x6c
158 171
@@ -186,7 +199,8 @@ enum {
186#define B43_SHM_SH_PHYTXNOI 0x006E /* PHY noise directly after TX (lower 8bit only) */ 199#define B43_SHM_SH_PHYTXNOI 0x006E /* PHY noise directly after TX (lower 8bit only) */
187#define B43_SHM_SH_RFRXSP1 0x0072 /* RF RX SP Register 1 */ 200#define B43_SHM_SH_RFRXSP1 0x0072 /* RF RX SP Register 1 */
188#define B43_SHM_SH_CHAN 0x00A0 /* Current channel (low 8bit only) */ 201#define B43_SHM_SH_CHAN 0x00A0 /* Current channel (low 8bit only) */
189#define B43_SHM_SH_CHAN_5GHZ 0x0100 /* Bit set, if 5Ghz channel */ 202#define B43_SHM_SH_CHAN_5GHZ 0x0100 /* Bit set, if 5 Ghz channel */
203#define B43_SHM_SH_CHAN_40MHZ 0x0200 /* Bit set, if 40 Mhz channel width */
190#define B43_SHM_SH_BCMCFIFOID 0x0108 /* Last posted cookie to the bcast/mcast FIFO */ 204#define B43_SHM_SH_BCMCFIFOID 0x0108 /* Last posted cookie to the bcast/mcast FIFO */
191/* TSSI information */ 205/* TSSI information */
192#define B43_SHM_SH_TSSI_CCK 0x0058 /* TSSI for last 4 CCK frames (32bit) */ 206#define B43_SHM_SH_TSSI_CCK 0x0058 /* TSSI for last 4 CCK frames (32bit) */
@@ -402,10 +416,10 @@ enum {
402 416
403/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */ 417/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */
404#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ 418#define B43_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
405#define B43_TMSLOW_PHYCLKSPEED 0x00C00000 /* PHY clock speed mask (N-PHY only) */ 419#define B43_TMSLOW_PHY_BANDWIDTH 0x00C00000 /* PHY band width and clock speed mask (N-PHY only) */
406#define B43_TMSLOW_PHYCLKSPEED_40MHZ 0x00000000 /* 40 MHz PHY */ 420#define B43_TMSLOW_PHY_BANDWIDTH_10MHZ 0x00000000 /* 10 MHz bandwidth, 40 MHz PHY */
407#define B43_TMSLOW_PHYCLKSPEED_80MHZ 0x00400000 /* 80 MHz PHY */ 421#define B43_TMSLOW_PHY_BANDWIDTH_20MHZ 0x00400000 /* 20 MHz bandwidth, 80 MHz PHY */
408#define B43_TMSLOW_PHYCLKSPEED_160MHZ 0x00800000 /* 160 MHz PHY */ 422#define B43_TMSLOW_PHY_BANDWIDTH_40MHZ 0x00800000 /* 40 MHz bandwidth, 160 MHz PHY */
409#define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select (rev >= 5) */ 423#define B43_TMSLOW_PLLREFSEL 0x00200000 /* PLL Frequency Reference Select (rev >= 5) */
410#define B43_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */ 424#define B43_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Control Enable (rev >= 5) */
411#define B43_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */ 425#define B43_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */
@@ -553,6 +567,8 @@ struct b43_dma {
553 struct b43_dmaring *tx_ring_mcast; /* Multicast */ 567 struct b43_dmaring *tx_ring_mcast; /* Multicast */
554 568
555 struct b43_dmaring *rx_ring; 569 struct b43_dmaring *rx_ring;
570
571 u32 translation; /* Routing bits */
556}; 572};
557 573
558struct b43_pio_txqueue; 574struct b43_pio_txqueue;
@@ -634,8 +650,8 @@ struct b43_request_fw_context {
634 char errors[B43_NR_FWTYPES][128]; 650 char errors[B43_NR_FWTYPES][128];
635 /* Temporary buffer for storing the firmware name. */ 651 /* Temporary buffer for storing the firmware name. */
636 char fwname[64]; 652 char fwname[64];
637 /* A fatal error occured while requesting. Firmware reqest 653 /* A fatal error occurred while requesting. Firmware request
638 * can not continue, as any other reqest will also fail. */ 654 * can not continue, as any other request will also fail. */
639 int fatal_failure; 655 int fatal_failure;
640}; 656};
641 657
@@ -691,7 +707,7 @@ enum {
691 707
692/* Data structure for one wireless device (802.11 core) */ 708/* Data structure for one wireless device (802.11 core) */
693struct b43_wldev { 709struct b43_wldev {
694 struct ssb_device *dev; 710 struct ssb_device *sdev;
695 struct b43_wl *wl; 711 struct b43_wl *wl;
696 712
697 /* The device initialization status. 713 /* The device initialization status.
@@ -865,22 +881,34 @@ static inline enum ieee80211_band b43_current_band(struct b43_wl *wl)
865 881
866static inline u16 b43_read16(struct b43_wldev *dev, u16 offset) 882static inline u16 b43_read16(struct b43_wldev *dev, u16 offset)
867{ 883{
868 return ssb_read16(dev->dev, offset); 884 return ssb_read16(dev->sdev, offset);
869} 885}
870 886
871static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value) 887static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value)
872{ 888{
873 ssb_write16(dev->dev, offset, value); 889 ssb_write16(dev->sdev, offset, value);
874} 890}
875 891
876static inline u32 b43_read32(struct b43_wldev *dev, u16 offset) 892static inline u32 b43_read32(struct b43_wldev *dev, u16 offset)
877{ 893{
878 return ssb_read32(dev->dev, offset); 894 return ssb_read32(dev->sdev, offset);
879} 895}
880 896
881static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value) 897static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value)
882{ 898{
883 ssb_write32(dev->dev, offset, value); 899 ssb_write32(dev->sdev, offset, value);
900}
901
902static inline void b43_block_read(struct b43_wldev *dev, void *buffer,
903 size_t count, u16 offset, u8 reg_width)
904{
905 ssb_block_read(dev->sdev, buffer, count, offset, reg_width);
906}
907
908static inline void b43_block_write(struct b43_wldev *dev, const void *buffer,
909 size_t count, u16 offset, u8 reg_width)
910{
911 ssb_block_write(dev->sdev, buffer, count, offset, reg_width);
884} 912}
885 913
886static inline bool b43_using_pio_transfers(struct b43_wldev *dev) 914static inline bool b43_using_pio_transfers(struct b43_wldev *dev)
diff --git a/drivers/net/wireless/b43/debugfs.c b/drivers/net/wireless/b43/debugfs.c
index 80b19a44a407..59f59fa40334 100644
--- a/drivers/net/wireless/b43/debugfs.c
+++ b/drivers/net/wireless/b43/debugfs.c
@@ -627,6 +627,7 @@ out_unlock:
627 .open = b43_debugfs_open, \ 627 .open = b43_debugfs_open, \
628 .read = b43_debugfs_read, \ 628 .read = b43_debugfs_read, \
629 .write = b43_debugfs_write, \ 629 .write = b43_debugfs_write, \
630 .llseek = generic_file_llseek, \
630 }, \ 631 }, \
631 .file_struct_offset = offsetof(struct b43_dfsentry, \ 632 .file_struct_offset = offsetof(struct b43_dfsentry, \
632 file_##name), \ 633 file_##name), \
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index 10d0aaf754c5..47d44bcff37d 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -80,7 +80,7 @@ static void op32_fill_descriptor(struct b43_dmaring *ring,
80 addr = (u32) (dmaaddr & ~SSB_DMA_TRANSLATION_MASK); 80 addr = (u32) (dmaaddr & ~SSB_DMA_TRANSLATION_MASK);
81 addrext = (u32) (dmaaddr & SSB_DMA_TRANSLATION_MASK) 81 addrext = (u32) (dmaaddr & SSB_DMA_TRANSLATION_MASK)
82 >> SSB_DMA_TRANSLATION_SHIFT; 82 >> SSB_DMA_TRANSLATION_SHIFT;
83 addr |= ssb_dma_translation(ring->dev->dev); 83 addr |= ring->dev->dma.translation;
84 ctl = bufsize & B43_DMA32_DCTL_BYTECNT; 84 ctl = bufsize & B43_DMA32_DCTL_BYTECNT;
85 if (slot == ring->nr_slots - 1) 85 if (slot == ring->nr_slots - 1)
86 ctl |= B43_DMA32_DCTL_DTABLEEND; 86 ctl |= B43_DMA32_DCTL_DTABLEEND;
@@ -174,7 +174,7 @@ static void op64_fill_descriptor(struct b43_dmaring *ring,
174 addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK); 174 addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
175 addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK) 175 addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
176 >> SSB_DMA_TRANSLATION_SHIFT; 176 >> SSB_DMA_TRANSLATION_SHIFT;
177 addrhi |= (ssb_dma_translation(ring->dev->dev) << 1); 177 addrhi |= (ring->dev->dma.translation << 1);
178 if (slot == ring->nr_slots - 1) 178 if (slot == ring->nr_slots - 1)
179 ctl0 |= B43_DMA64_DCTL0_DTABLEEND; 179 ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
180 if (start) 180 if (start)
@@ -333,10 +333,10 @@ static inline
333 dma_addr_t dmaaddr; 333 dma_addr_t dmaaddr;
334 334
335 if (tx) { 335 if (tx) {
336 dmaaddr = dma_map_single(ring->dev->dev->dma_dev, 336 dmaaddr = dma_map_single(ring->dev->sdev->dma_dev,
337 buf, len, DMA_TO_DEVICE); 337 buf, len, DMA_TO_DEVICE);
338 } else { 338 } else {
339 dmaaddr = dma_map_single(ring->dev->dev->dma_dev, 339 dmaaddr = dma_map_single(ring->dev->sdev->dma_dev,
340 buf, len, DMA_FROM_DEVICE); 340 buf, len, DMA_FROM_DEVICE);
341 } 341 }
342 342
@@ -348,10 +348,10 @@ static inline
348 dma_addr_t addr, size_t len, int tx) 348 dma_addr_t addr, size_t len, int tx)
349{ 349{
350 if (tx) { 350 if (tx) {
351 dma_unmap_single(ring->dev->dev->dma_dev, 351 dma_unmap_single(ring->dev->sdev->dma_dev,
352 addr, len, DMA_TO_DEVICE); 352 addr, len, DMA_TO_DEVICE);
353 } else { 353 } else {
354 dma_unmap_single(ring->dev->dev->dma_dev, 354 dma_unmap_single(ring->dev->sdev->dma_dev,
355 addr, len, DMA_FROM_DEVICE); 355 addr, len, DMA_FROM_DEVICE);
356 } 356 }
357} 357}
@@ -361,7 +361,7 @@ static inline
361 dma_addr_t addr, size_t len) 361 dma_addr_t addr, size_t len)
362{ 362{
363 B43_WARN_ON(ring->tx); 363 B43_WARN_ON(ring->tx);
364 dma_sync_single_for_cpu(ring->dev->dev->dma_dev, 364 dma_sync_single_for_cpu(ring->dev->sdev->dma_dev,
365 addr, len, DMA_FROM_DEVICE); 365 addr, len, DMA_FROM_DEVICE);
366} 366}
367 367
@@ -370,7 +370,7 @@ static inline
370 dma_addr_t addr, size_t len) 370 dma_addr_t addr, size_t len)
371{ 371{
372 B43_WARN_ON(ring->tx); 372 B43_WARN_ON(ring->tx);
373 dma_sync_single_for_device(ring->dev->dev->dma_dev, 373 dma_sync_single_for_device(ring->dev->sdev->dma_dev,
374 addr, len, DMA_FROM_DEVICE); 374 addr, len, DMA_FROM_DEVICE);
375} 375}
376 376
@@ -401,7 +401,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
401 */ 401 */
402 if (ring->type == B43_DMA_64BIT) 402 if (ring->type == B43_DMA_64BIT)
403 flags |= GFP_DMA; 403 flags |= GFP_DMA;
404 ring->descbase = dma_alloc_coherent(ring->dev->dev->dma_dev, 404 ring->descbase = dma_alloc_coherent(ring->dev->sdev->dma_dev,
405 B43_DMA_RINGMEMSIZE, 405 B43_DMA_RINGMEMSIZE,
406 &(ring->dmabase), flags); 406 &(ring->dmabase), flags);
407 if (!ring->descbase) { 407 if (!ring->descbase) {
@@ -415,12 +415,7 @@ static int alloc_ringmemory(struct b43_dmaring *ring)
415 415
416static void free_ringmemory(struct b43_dmaring *ring) 416static void free_ringmemory(struct b43_dmaring *ring)
417{ 417{
418 gfp_t flags = GFP_KERNEL; 418 dma_free_coherent(ring->dev->sdev->dma_dev, B43_DMA_RINGMEMSIZE,
419
420 if (ring->type == B43_DMA_64BIT)
421 flags |= GFP_DMA;
422
423 dma_free_coherent(ring->dev->dev->dma_dev, B43_DMA_RINGMEMSIZE,
424 ring->descbase, ring->dmabase); 419 ring->descbase, ring->dmabase);
425} 420}
426 421
@@ -528,7 +523,7 @@ static bool b43_dma_mapping_error(struct b43_dmaring *ring,
528 dma_addr_t addr, 523 dma_addr_t addr,
529 size_t buffersize, bool dma_to_device) 524 size_t buffersize, bool dma_to_device)
530{ 525{
531 if (unlikely(dma_mapping_error(ring->dev->dev->dma_dev, addr))) 526 if (unlikely(dma_mapping_error(ring->dev->sdev->dma_dev, addr)))
532 return 1; 527 return 1;
533 528
534 switch (ring->type) { 529 switch (ring->type) {
@@ -663,7 +658,7 @@ static int dmacontroller_setup(struct b43_dmaring *ring)
663 int err = 0; 658 int err = 0;
664 u32 value; 659 u32 value;
665 u32 addrext; 660 u32 addrext;
666 u32 trans = ssb_dma_translation(ring->dev->dev); 661 u32 trans = ring->dev->dma.translation;
667 662
668 if (ring->tx) { 663 if (ring->tx) {
669 if (ring->type == B43_DMA_64BIT) { 664 if (ring->type == B43_DMA_64BIT) {
@@ -874,7 +869,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
874 goto err_kfree_meta; 869 goto err_kfree_meta;
875 870
876 /* test for ability to dma to txhdr_cache */ 871 /* test for ability to dma to txhdr_cache */
877 dma_test = dma_map_single(dev->dev->dma_dev, 872 dma_test = dma_map_single(dev->sdev->dma_dev,
878 ring->txhdr_cache, 873 ring->txhdr_cache,
879 b43_txhdr_size(dev), 874 b43_txhdr_size(dev),
880 DMA_TO_DEVICE); 875 DMA_TO_DEVICE);
@@ -889,7 +884,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
889 if (!ring->txhdr_cache) 884 if (!ring->txhdr_cache)
890 goto err_kfree_meta; 885 goto err_kfree_meta;
891 886
892 dma_test = dma_map_single(dev->dev->dma_dev, 887 dma_test = dma_map_single(dev->sdev->dma_dev,
893 ring->txhdr_cache, 888 ring->txhdr_cache,
894 b43_txhdr_size(dev), 889 b43_txhdr_size(dev),
895 DMA_TO_DEVICE); 890 DMA_TO_DEVICE);
@@ -903,7 +898,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
903 } 898 }
904 } 899 }
905 900
906 dma_unmap_single(dev->dev->dma_dev, 901 dma_unmap_single(dev->sdev->dma_dev,
907 dma_test, b43_txhdr_size(dev), 902 dma_test, b43_txhdr_size(dev),
908 DMA_TO_DEVICE); 903 DMA_TO_DEVICE);
909 } 904 }
@@ -1018,9 +1013,9 @@ static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask)
1018 /* Try to set the DMA mask. If it fails, try falling back to a 1013 /* Try to set the DMA mask. If it fails, try falling back to a
1019 * lower mask, as we can always also support a lower one. */ 1014 * lower mask, as we can always also support a lower one. */
1020 while (1) { 1015 while (1) {
1021 err = dma_set_mask(dev->dev->dma_dev, mask); 1016 err = dma_set_mask(dev->sdev->dma_dev, mask);
1022 if (!err) { 1017 if (!err) {
1023 err = dma_set_coherent_mask(dev->dev->dma_dev, mask); 1018 err = dma_set_coherent_mask(dev->sdev->dma_dev, mask);
1024 if (!err) 1019 if (!err)
1025 break; 1020 break;
1026 } 1021 }
@@ -1060,6 +1055,7 @@ int b43_dma_init(struct b43_wldev *dev)
1060 err = b43_dma_set_mask(dev, dmamask); 1055 err = b43_dma_set_mask(dev, dmamask);
1061 if (err) 1056 if (err)
1062 return err; 1057 return err;
1058 dma->translation = ssb_dma_translation(dev->sdev);
1063 1059
1064 err = -ENOMEM; 1060 err = -ENOMEM;
1065 /* setup TX DMA channels. */ 1061 /* setup TX DMA channels. */
@@ -1089,7 +1085,7 @@ int b43_dma_init(struct b43_wldev *dev)
1089 goto err_destroy_mcast; 1085 goto err_destroy_mcast;
1090 1086
1091 /* No support for the TX status DMA ring. */ 1087 /* No support for the TX status DMA ring. */
1092 B43_WARN_ON(dev->dev->id.revision < 5); 1088 B43_WARN_ON(dev->sdev->id.revision < 5);
1093 1089
1094 b43dbg(dev->wl, "%u-bit DMA initialized\n", 1090 b43dbg(dev->wl, "%u-bit DMA initialized\n",
1095 (unsigned int)type); 1091 (unsigned int)type);
@@ -1541,7 +1537,7 @@ static void dma_rx(struct b43_dmaring *ring, int *slot)
1541 dmaaddr = meta->dmaaddr; 1537 dmaaddr = meta->dmaaddr;
1542 goto drop_recycle_buffer; 1538 goto drop_recycle_buffer;
1543 } 1539 }
1544 if (unlikely(len > ring->rx_buffersize)) { 1540 if (unlikely(len + ring->frameoffset > ring->rx_buffersize)) {
1545 /* The data did not fit into one descriptor buffer 1541 /* The data did not fit into one descriptor buffer
1546 * and is split over multiple buffers. 1542 * and is split over multiple buffers.
1547 * This should never happen, as we try to allocate buffers 1543 * This should never happen, as we try to allocate buffers
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h
index a01c2100f166..e8a80a1251bf 100644
--- a/drivers/net/wireless/b43/dma.h
+++ b/drivers/net/wireless/b43/dma.h
@@ -163,7 +163,7 @@ struct b43_dmadesc_generic {
163/* DMA engine tuning knobs */ 163/* DMA engine tuning knobs */
164#define B43_TXRING_SLOTS 256 164#define B43_TXRING_SLOTS 256
165#define B43_RXRING_SLOTS 64 165#define B43_RXRING_SLOTS 64
166#define B43_DMA0_RX_BUFFERSIZE IEEE80211_MAX_FRAME_LEN 166#define B43_DMA0_RX_BUFFERSIZE (B43_DMA0_RX_FRAMEOFFSET + IEEE80211_MAX_FRAME_LEN)
167 167
168/* Pointer poison */ 168/* Pointer poison */
169#define B43_DMA_PTR_POISON ((void *)ERR_PTR(-ENOMEM)) 169#define B43_DMA_PTR_POISON ((void *)ERR_PTR(-ENOMEM))
diff --git a/drivers/net/wireless/b43/leds.c b/drivers/net/wireless/b43/leds.c
index c587115dd2b9..0cafafe368af 100644
--- a/drivers/net/wireless/b43/leds.c
+++ b/drivers/net/wireless/b43/leds.c
@@ -138,7 +138,7 @@ static int b43_register_led(struct b43_wldev *dev, struct b43_led *led,
138 led->led_dev.default_trigger = default_trigger; 138 led->led_dev.default_trigger = default_trigger;
139 led->led_dev.brightness_set = b43_led_brightness_set; 139 led->led_dev.brightness_set = b43_led_brightness_set;
140 140
141 err = led_classdev_register(dev->dev->dev, &led->led_dev); 141 err = led_classdev_register(dev->sdev->dev, &led->led_dev);
142 if (err) { 142 if (err) {
143 b43warn(dev->wl, "LEDs: Failed to register %s\n", name); 143 b43warn(dev->wl, "LEDs: Failed to register %s\n", name);
144 led->wl = NULL; 144 led->wl = NULL;
@@ -215,7 +215,7 @@ static void b43_led_get_sprominfo(struct b43_wldev *dev,
215 enum b43_led_behaviour *behaviour, 215 enum b43_led_behaviour *behaviour,
216 bool *activelow) 216 bool *activelow)
217{ 217{
218 struct ssb_bus *bus = dev->dev->bus; 218 struct ssb_bus *bus = dev->sdev->bus;
219 u8 sprom[4]; 219 u8 sprom[4];
220 220
221 sprom[0] = bus->sprom.gpio0; 221 sprom[0] = bus->sprom.gpio0;
diff --git a/drivers/net/wireless/b43/lo.c b/drivers/net/wireless/b43/lo.c
index 94e4f1378fc3..2ef7d4b38540 100644
--- a/drivers/net/wireless/b43/lo.c
+++ b/drivers/net/wireless/b43/lo.c
@@ -98,7 +98,7 @@ static u16 lo_measure_feedthrough(struct b43_wldev *dev,
98 rfover |= pga; 98 rfover |= pga;
99 rfover |= lna; 99 rfover |= lna;
100 rfover |= trsw_rx; 100 rfover |= trsw_rx;
101 if ((dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) 101 if ((dev->sdev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA)
102 && phy->rev > 6) 102 && phy->rev > 6)
103 rfover |= B43_PHY_RFOVERVAL_EXTLNA; 103 rfover |= B43_PHY_RFOVERVAL_EXTLNA;
104 104
@@ -387,7 +387,7 @@ struct lo_g_saved_values {
387static void lo_measure_setup(struct b43_wldev *dev, 387static void lo_measure_setup(struct b43_wldev *dev,
388 struct lo_g_saved_values *sav) 388 struct lo_g_saved_values *sav)
389{ 389{
390 struct ssb_sprom *sprom = &dev->dev->bus->sprom; 390 struct ssb_sprom *sprom = &dev->sdev->bus->sprom;
391 struct b43_phy *phy = &dev->phy; 391 struct b43_phy *phy = &dev->phy;
392 struct b43_phy_g *gphy = phy->g; 392 struct b43_phy_g *gphy = phy->g;
393 struct b43_txpower_lo_control *lo = gphy->lo_control; 393 struct b43_txpower_lo_control *lo = gphy->lo_control;
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 20631ae2ddd7..eb4159686985 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -72,6 +72,7 @@ MODULE_FIRMWARE("b43/ucode11.fw");
72MODULE_FIRMWARE("b43/ucode13.fw"); 72MODULE_FIRMWARE("b43/ucode13.fw");
73MODULE_FIRMWARE("b43/ucode14.fw"); 73MODULE_FIRMWARE("b43/ucode14.fw");
74MODULE_FIRMWARE("b43/ucode15.fw"); 74MODULE_FIRMWARE("b43/ucode15.fw");
75MODULE_FIRMWARE("b43/ucode16_mimo.fw");
75MODULE_FIRMWARE("b43/ucode5.fw"); 76MODULE_FIRMWARE("b43/ucode5.fw");
76MODULE_FIRMWARE("b43/ucode9.fw"); 77MODULE_FIRMWARE("b43/ucode9.fw");
77 78
@@ -322,59 +323,83 @@ static int b43_ratelimit(struct b43_wl *wl)
322 323
323void b43info(struct b43_wl *wl, const char *fmt, ...) 324void b43info(struct b43_wl *wl, const char *fmt, ...)
324{ 325{
326 struct va_format vaf;
325 va_list args; 327 va_list args;
326 328
327 if (b43_modparam_verbose < B43_VERBOSITY_INFO) 329 if (b43_modparam_verbose < B43_VERBOSITY_INFO)
328 return; 330 return;
329 if (!b43_ratelimit(wl)) 331 if (!b43_ratelimit(wl))
330 return; 332 return;
333
331 va_start(args, fmt); 334 va_start(args, fmt);
332 printk(KERN_INFO "b43-%s: ", 335
333 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); 336 vaf.fmt = fmt;
334 vprintk(fmt, args); 337 vaf.va = &args;
338
339 printk(KERN_INFO "b43-%s: %pV",
340 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
341
335 va_end(args); 342 va_end(args);
336} 343}
337 344
338void b43err(struct b43_wl *wl, const char *fmt, ...) 345void b43err(struct b43_wl *wl, const char *fmt, ...)
339{ 346{
347 struct va_format vaf;
340 va_list args; 348 va_list args;
341 349
342 if (b43_modparam_verbose < B43_VERBOSITY_ERROR) 350 if (b43_modparam_verbose < B43_VERBOSITY_ERROR)
343 return; 351 return;
344 if (!b43_ratelimit(wl)) 352 if (!b43_ratelimit(wl))
345 return; 353 return;
354
346 va_start(args, fmt); 355 va_start(args, fmt);
347 printk(KERN_ERR "b43-%s ERROR: ", 356
348 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); 357 vaf.fmt = fmt;
349 vprintk(fmt, args); 358 vaf.va = &args;
359
360 printk(KERN_ERR "b43-%s ERROR: %pV",
361 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
362
350 va_end(args); 363 va_end(args);
351} 364}
352 365
353void b43warn(struct b43_wl *wl, const char *fmt, ...) 366void b43warn(struct b43_wl *wl, const char *fmt, ...)
354{ 367{
368 struct va_format vaf;
355 va_list args; 369 va_list args;
356 370
357 if (b43_modparam_verbose < B43_VERBOSITY_WARN) 371 if (b43_modparam_verbose < B43_VERBOSITY_WARN)
358 return; 372 return;
359 if (!b43_ratelimit(wl)) 373 if (!b43_ratelimit(wl))
360 return; 374 return;
375
361 va_start(args, fmt); 376 va_start(args, fmt);
362 printk(KERN_WARNING "b43-%s warning: ", 377
363 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); 378 vaf.fmt = fmt;
364 vprintk(fmt, args); 379 vaf.va = &args;
380
381 printk(KERN_WARNING "b43-%s warning: %pV",
382 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
383
365 va_end(args); 384 va_end(args);
366} 385}
367 386
368void b43dbg(struct b43_wl *wl, const char *fmt, ...) 387void b43dbg(struct b43_wl *wl, const char *fmt, ...)
369{ 388{
389 struct va_format vaf;
370 va_list args; 390 va_list args;
371 391
372 if (b43_modparam_verbose < B43_VERBOSITY_DEBUG) 392 if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
373 return; 393 return;
394
374 va_start(args, fmt); 395 va_start(args, fmt);
375 printk(KERN_DEBUG "b43-%s debug: ", 396
376 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); 397 vaf.fmt = fmt;
377 vprintk(fmt, args); 398 vaf.va = &args;
399
400 printk(KERN_DEBUG "b43-%s debug: %pV",
401 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
402
378 va_end(args); 403 va_end(args);
379} 404}
380 405
@@ -523,7 +548,7 @@ void b43_tsf_read(struct b43_wldev *dev, u64 *tsf)
523{ 548{
524 u32 low, high; 549 u32 low, high;
525 550
526 B43_WARN_ON(dev->dev->id.revision < 3); 551 B43_WARN_ON(dev->sdev->id.revision < 3);
527 552
528 /* The hardware guarantees us an atomic read, if we 553 /* The hardware guarantees us an atomic read, if we
529 * read the low register first. */ 554 * read the low register first. */
@@ -561,7 +586,7 @@ static void b43_tsf_write_locked(struct b43_wldev *dev, u64 tsf)
561{ 586{
562 u32 low, high; 587 u32 low, high;
563 588
564 B43_WARN_ON(dev->dev->id.revision < 3); 589 B43_WARN_ON(dev->sdev->id.revision < 3);
565 590
566 low = tsf; 591 low = tsf;
567 high = (tsf >> 32); 592 high = (tsf >> 32);
@@ -689,7 +714,7 @@ void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on)
689 b43_ram_write(dev, i * 4, buffer[i]); 714 b43_ram_write(dev, i * 4, buffer[i]);
690 715
691 b43_write16(dev, 0x0568, 0x0000); 716 b43_write16(dev, 0x0568, 0x0000);
692 if (dev->dev->id.revision < 11) 717 if (dev->sdev->id.revision < 11)
693 b43_write16(dev, 0x07C0, 0x0000); 718 b43_write16(dev, 0x07C0, 0x0000);
694 else 719 else
695 b43_write16(dev, 0x07C0, 0x0100); 720 b43_write16(dev, 0x07C0, 0x0100);
@@ -1107,7 +1132,7 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
1107 b43_write32(dev, B43_MMIO_MACCTL, macctl); 1132 b43_write32(dev, B43_MMIO_MACCTL, macctl);
1108 /* Commit write */ 1133 /* Commit write */
1109 b43_read32(dev, B43_MMIO_MACCTL); 1134 b43_read32(dev, B43_MMIO_MACCTL);
1110 if (awake && dev->dev->id.revision >= 5) { 1135 if (awake && dev->sdev->id.revision >= 5) {
1111 /* Wait for the microcode to wake up. */ 1136 /* Wait for the microcode to wake up. */
1112 for (i = 0; i < 100; i++) { 1137 for (i = 0; i < 100; i++) {
1113 ucstat = b43_shm_read16(dev, B43_SHM_SHARED, 1138 ucstat = b43_shm_read16(dev, B43_SHM_SHARED,
@@ -1119,27 +1144,35 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
1119 } 1144 }
1120} 1145}
1121 1146
1122void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags) 1147static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, u32 flags)
1123{ 1148{
1124 u32 tmslow; 1149 u32 tmslow;
1125 u32 macctl;
1126 1150
1127 flags |= B43_TMSLOW_PHYCLKEN; 1151 flags |= B43_TMSLOW_PHYCLKEN;
1128 flags |= B43_TMSLOW_PHYRESET; 1152 flags |= B43_TMSLOW_PHYRESET;
1129 ssb_device_enable(dev->dev, flags); 1153 if (dev->phy.type == B43_PHYTYPE_N)
1154 flags |= B43_TMSLOW_PHY_BANDWIDTH_20MHZ; /* Make 20 MHz def */
1155 ssb_device_enable(dev->sdev, flags);
1130 msleep(2); /* Wait for the PLL to turn on. */ 1156 msleep(2); /* Wait for the PLL to turn on. */
1131 1157
1132 /* Now take the PHY out of Reset again */ 1158 /* Now take the PHY out of Reset again */
1133 tmslow = ssb_read32(dev->dev, SSB_TMSLOW); 1159 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
1134 tmslow |= SSB_TMSLOW_FGC; 1160 tmslow |= SSB_TMSLOW_FGC;
1135 tmslow &= ~B43_TMSLOW_PHYRESET; 1161 tmslow &= ~B43_TMSLOW_PHYRESET;
1136 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); 1162 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
1137 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ 1163 ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */
1138 msleep(1); 1164 msleep(1);
1139 tmslow &= ~SSB_TMSLOW_FGC; 1165 tmslow &= ~SSB_TMSLOW_FGC;
1140 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); 1166 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
1141 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ 1167 ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */
1142 msleep(1); 1168 msleep(1);
1169}
1170
1171void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
1172{
1173 u32 macctl;
1174
1175 b43_ssb_wireless_core_reset(dev, flags);
1143 1176
1144 /* Turn Analog ON, but only if we already know the PHY-type. 1177 /* Turn Analog ON, but only if we already know the PHY-type.
1145 * This protects against very early setup where we don't know the 1178 * This protects against very early setup where we don't know the
@@ -1188,7 +1221,7 @@ static void drain_txstatus_queue(struct b43_wldev *dev)
1188{ 1221{
1189 u32 dummy; 1222 u32 dummy;
1190 1223
1191 if (dev->dev->id.revision < 5) 1224 if (dev->sdev->id.revision < 5)
1192 return; 1225 return;
1193 /* Read all entries from the microcode TXstatus FIFO 1226 /* Read all entries from the microcode TXstatus FIFO
1194 * and throw them away. 1227 * and throw them away.
@@ -1394,9 +1427,9 @@ u8 b43_ieee80211_antenna_sanitize(struct b43_wldev *dev,
1394 1427
1395 /* Get the mask of available antennas. */ 1428 /* Get the mask of available antennas. */
1396 if (dev->phy.gmode) 1429 if (dev->phy.gmode)
1397 antenna_mask = dev->dev->bus->sprom.ant_available_bg; 1430 antenna_mask = dev->sdev->bus->sprom.ant_available_bg;
1398 else 1431 else
1399 antenna_mask = dev->dev->bus->sprom.ant_available_a; 1432 antenna_mask = dev->sdev->bus->sprom.ant_available_a;
1400 1433
1401 if (!(antenna_mask & (1 << (antenna_nr - 1)))) { 1434 if (!(antenna_mask & (1 << (antenna_nr - 1)))) {
1402 /* This antenna is not available. Fall back to default. */ 1435 /* This antenna is not available. Fall back to default. */
@@ -1611,7 +1644,7 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
1611 mutex_lock(&wl->mutex); 1644 mutex_lock(&wl->mutex);
1612 dev = wl->current_dev; 1645 dev = wl->current_dev;
1613 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) { 1646 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
1614 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) { 1647 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
1615 /* wl->mutex is enough. */ 1648 /* wl->mutex is enough. */
1616 b43_do_beacon_update_trigger_work(dev); 1649 b43_do_beacon_update_trigger_work(dev);
1617 mmiowb(); 1650 mmiowb();
@@ -1656,7 +1689,7 @@ static void b43_update_templates(struct b43_wl *wl)
1656static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int) 1689static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
1657{ 1690{
1658 b43_time_lock(dev); 1691 b43_time_lock(dev);
1659 if (dev->dev->id.revision >= 3) { 1692 if (dev->sdev->id.revision >= 3) {
1660 b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16)); 1693 b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));
1661 b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10)); 1694 b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));
1662 } else { 1695 } else {
@@ -2030,7 +2063,7 @@ int b43_do_request_fw(struct b43_request_fw_context *ctx,
2030 B43_WARN_ON(1); 2063 B43_WARN_ON(1);
2031 return -ENOSYS; 2064 return -ENOSYS;
2032 } 2065 }
2033 err = request_firmware(&blob, ctx->fwname, ctx->dev->dev->dev); 2066 err = request_firmware(&blob, ctx->fwname, ctx->dev->sdev->dev);
2034 if (err == -ENOENT) { 2067 if (err == -ENOENT) {
2035 snprintf(ctx->errors[ctx->req_type], 2068 snprintf(ctx->errors[ctx->req_type],
2036 sizeof(ctx->errors[ctx->req_type]), 2069 sizeof(ctx->errors[ctx->req_type]),
@@ -2080,13 +2113,12 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2080{ 2113{
2081 struct b43_wldev *dev = ctx->dev; 2114 struct b43_wldev *dev = ctx->dev;
2082 struct b43_firmware *fw = &ctx->dev->fw; 2115 struct b43_firmware *fw = &ctx->dev->fw;
2083 const u8 rev = ctx->dev->dev->id.revision; 2116 const u8 rev = ctx->dev->sdev->id.revision;
2084 const char *filename; 2117 const char *filename;
2085 u32 tmshigh; 2118 u32 tmshigh;
2086 int err; 2119 int err;
2087 2120
2088 /* Get microcode */ 2121 /* Get microcode */
2089 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
2090 if ((rev >= 5) && (rev <= 10)) 2122 if ((rev >= 5) && (rev <= 10))
2091 filename = "ucode5"; 2123 filename = "ucode5";
2092 else if ((rev >= 11) && (rev <= 12)) 2124 else if ((rev >= 11) && (rev <= 12))
@@ -2095,8 +2127,10 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2095 filename = "ucode13"; 2127 filename = "ucode13";
2096 else if (rev == 14) 2128 else if (rev == 14)
2097 filename = "ucode14"; 2129 filename = "ucode14";
2098 else if (rev >= 15) 2130 else if (rev == 15)
2099 filename = "ucode15"; 2131 filename = "ucode15";
2132 else if ((rev >= 16) && (rev <= 20))
2133 filename = "ucode16_mimo";
2100 else 2134 else
2101 goto err_no_ucode; 2135 goto err_no_ucode;
2102 err = b43_do_request_fw(ctx, filename, &fw->ucode); 2136 err = b43_do_request_fw(ctx, filename, &fw->ucode);
@@ -2123,6 +2157,7 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2123 switch (dev->phy.type) { 2157 switch (dev->phy.type) {
2124 case B43_PHYTYPE_A: 2158 case B43_PHYTYPE_A:
2125 if ((rev >= 5) && (rev <= 10)) { 2159 if ((rev >= 5) && (rev <= 10)) {
2160 tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
2126 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY) 2161 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
2127 filename = "a0g1initvals5"; 2162 filename = "a0g1initvals5";
2128 else 2163 else
@@ -2139,7 +2174,9 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2139 goto err_no_initvals; 2174 goto err_no_initvals;
2140 break; 2175 break;
2141 case B43_PHYTYPE_N: 2176 case B43_PHYTYPE_N:
2142 if ((rev >= 11) && (rev <= 12)) 2177 if (rev >= 16)
2178 filename = "n0initvals16";
2179 else if ((rev >= 11) && (rev <= 12))
2143 filename = "n0initvals11"; 2180 filename = "n0initvals11";
2144 else 2181 else
2145 goto err_no_initvals; 2182 goto err_no_initvals;
@@ -2165,6 +2202,7 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2165 switch (dev->phy.type) { 2202 switch (dev->phy.type) {
2166 case B43_PHYTYPE_A: 2203 case B43_PHYTYPE_A:
2167 if ((rev >= 5) && (rev <= 10)) { 2204 if ((rev >= 5) && (rev <= 10)) {
2205 tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
2168 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY) 2206 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
2169 filename = "a0g1bsinitvals5"; 2207 filename = "a0g1bsinitvals5";
2170 else 2208 else
@@ -2183,7 +2221,9 @@ static int b43_try_request_fw(struct b43_request_fw_context *ctx)
2183 goto err_no_initvals; 2221 goto err_no_initvals;
2184 break; 2222 break;
2185 case B43_PHYTYPE_N: 2223 case B43_PHYTYPE_N:
2186 if ((rev >= 11) && (rev <= 12)) 2224 if (rev >= 16)
2225 filename = "n0bsinitvals16";
2226 else if ((rev >= 11) && (rev <= 12))
2187 filename = "n0bsinitvals11"; 2227 filename = "n0bsinitvals11";
2188 else 2228 else
2189 goto err_no_initvals; 2229 goto err_no_initvals;
@@ -2280,6 +2320,7 @@ out:
2280 2320
2281static int b43_upload_microcode(struct b43_wldev *dev) 2321static int b43_upload_microcode(struct b43_wldev *dev)
2282{ 2322{
2323 struct wiphy *wiphy = dev->wl->hw->wiphy;
2283 const size_t hdr_len = sizeof(struct b43_fw_header); 2324 const size_t hdr_len = sizeof(struct b43_fw_header);
2284 const __be32 *data; 2325 const __be32 *data;
2285 unsigned int i, len; 2326 unsigned int i, len;
@@ -2405,6 +2446,10 @@ static int b43_upload_microcode(struct b43_wldev *dev)
2405 } 2446 }
2406 } 2447 }
2407 2448
2449 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
2450 dev->fw.rev, dev->fw.patch);
2451 wiphy->hw_version = dev->sdev->id.coreid;
2452
2408 if (b43_is_old_txhdr_format(dev)) { 2453 if (b43_is_old_txhdr_format(dev)) {
2409 /* We're over the deadline, but we keep support for old fw 2454 /* We're over the deadline, but we keep support for old fw
2410 * until it turns out to be in major conflict with something new. */ 2455 * until it turns out to be in major conflict with something new. */
@@ -2519,10 +2564,20 @@ out:
2519/* Initialize the GPIOs 2564/* Initialize the GPIOs
2520 * http://bcm-specs.sipsolutions.net/GPIO 2565 * http://bcm-specs.sipsolutions.net/GPIO
2521 */ 2566 */
2567static struct ssb_device *b43_ssb_gpio_dev(struct b43_wldev *dev)
2568{
2569 struct ssb_bus *bus = dev->sdev->bus;
2570
2571#ifdef CONFIG_SSB_DRIVER_PCICORE
2572 return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev);
2573#else
2574 return bus->chipco.dev;
2575#endif
2576}
2577
2522static int b43_gpio_init(struct b43_wldev *dev) 2578static int b43_gpio_init(struct b43_wldev *dev)
2523{ 2579{
2524 struct ssb_bus *bus = dev->dev->bus; 2580 struct ssb_device *gpiodev;
2525 struct ssb_device *gpiodev, *pcidev = NULL;
2526 u32 mask, set; 2581 u32 mask, set;
2527 2582
2528 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL) 2583 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
@@ -2533,7 +2588,7 @@ static int b43_gpio_init(struct b43_wldev *dev)
2533 2588
2534 mask = 0x0000001F; 2589 mask = 0x0000001F;
2535 set = 0x0000000F; 2590 set = 0x0000000F;
2536 if (dev->dev->bus->chip_id == 0x4301) { 2591 if (dev->sdev->bus->chip_id == 0x4301) {
2537 mask |= 0x0060; 2592 mask |= 0x0060;
2538 set |= 0x0060; 2593 set |= 0x0060;
2539 } 2594 }
@@ -2544,25 +2599,21 @@ static int b43_gpio_init(struct b43_wldev *dev)
2544 mask |= 0x0180; 2599 mask |= 0x0180;
2545 set |= 0x0180; 2600 set |= 0x0180;
2546 } 2601 }
2547 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) { 2602 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) {
2548 b43_write16(dev, B43_MMIO_GPIO_MASK, 2603 b43_write16(dev, B43_MMIO_GPIO_MASK,
2549 b43_read16(dev, B43_MMIO_GPIO_MASK) 2604 b43_read16(dev, B43_MMIO_GPIO_MASK)
2550 | 0x0200); 2605 | 0x0200);
2551 mask |= 0x0200; 2606 mask |= 0x0200;
2552 set |= 0x0200; 2607 set |= 0x0200;
2553 } 2608 }
2554 if (dev->dev->id.revision >= 2) 2609 if (dev->sdev->id.revision >= 2)
2555 mask |= 0x0010; /* FIXME: This is redundant. */ 2610 mask |= 0x0010; /* FIXME: This is redundant. */
2556 2611
2557#ifdef CONFIG_SSB_DRIVER_PCICORE 2612 gpiodev = b43_ssb_gpio_dev(dev);
2558 pcidev = bus->pcicore.dev; 2613 if (gpiodev)
2559#endif 2614 ssb_write32(gpiodev, B43_GPIO_CONTROL,
2560 gpiodev = bus->chipco.dev ? : pcidev; 2615 (ssb_read32(gpiodev, B43_GPIO_CONTROL)
2561 if (!gpiodev) 2616 & mask) | set);
2562 return 0;
2563 ssb_write32(gpiodev, B43_GPIO_CONTROL,
2564 (ssb_read32(gpiodev, B43_GPIO_CONTROL)
2565 & mask) | set);
2566 2617
2567 return 0; 2618 return 0;
2568} 2619}
@@ -2570,16 +2621,11 @@ static int b43_gpio_init(struct b43_wldev *dev)
2570/* Turn off all GPIO stuff. Call this on module unload, for example. */ 2621/* Turn off all GPIO stuff. Call this on module unload, for example. */
2571static void b43_gpio_cleanup(struct b43_wldev *dev) 2622static void b43_gpio_cleanup(struct b43_wldev *dev)
2572{ 2623{
2573 struct ssb_bus *bus = dev->dev->bus; 2624 struct ssb_device *gpiodev;
2574 struct ssb_device *gpiodev, *pcidev = NULL;
2575 2625
2576#ifdef CONFIG_SSB_DRIVER_PCICORE 2626 gpiodev = b43_ssb_gpio_dev(dev);
2577 pcidev = bus->pcicore.dev; 2627 if (gpiodev)
2578#endif 2628 ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
2579 gpiodev = bus->chipco.dev ? : pcidev;
2580 if (!gpiodev)
2581 return;
2582 ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
2583} 2629}
2584 2630
2585/* http://bcm-specs.sipsolutions.net/EnableMac */ 2631/* http://bcm-specs.sipsolutions.net/EnableMac */
@@ -2648,6 +2694,17 @@ out:
2648 dev->mac_suspended++; 2694 dev->mac_suspended++;
2649} 2695}
2650 2696
2697/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
2698void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
2699{
2700 u32 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
2701 if (on)
2702 tmslow |= B43_TMSLOW_MACPHYCLKEN;
2703 else
2704 tmslow &= ~B43_TMSLOW_MACPHYCLKEN;
2705 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
2706}
2707
2651static void b43_adjust_opmode(struct b43_wldev *dev) 2708static void b43_adjust_opmode(struct b43_wldev *dev)
2652{ 2709{
2653 struct b43_wl *wl = dev->wl; 2710 struct b43_wl *wl = dev->wl;
@@ -2684,15 +2741,15 @@ static void b43_adjust_opmode(struct b43_wldev *dev)
2684 /* Workaround: On old hardware the HW-MAC-address-filter 2741 /* Workaround: On old hardware the HW-MAC-address-filter
2685 * doesn't work properly, so always run promisc in filter 2742 * doesn't work properly, so always run promisc in filter
2686 * it in software. */ 2743 * it in software. */
2687 if (dev->dev->id.revision <= 4) 2744 if (dev->sdev->id.revision <= 4)
2688 ctl |= B43_MACCTL_PROMISC; 2745 ctl |= B43_MACCTL_PROMISC;
2689 2746
2690 b43_write32(dev, B43_MMIO_MACCTL, ctl); 2747 b43_write32(dev, B43_MMIO_MACCTL, ctl);
2691 2748
2692 cfp_pretbtt = 2; 2749 cfp_pretbtt = 2;
2693 if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) { 2750 if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) {
2694 if (dev->dev->bus->chip_id == 0x4306 && 2751 if (dev->sdev->bus->chip_id == 0x4306 &&
2695 dev->dev->bus->chip_rev == 3) 2752 dev->sdev->bus->chip_rev == 3)
2696 cfp_pretbtt = 100; 2753 cfp_pretbtt = 100;
2697 else 2754 else
2698 cfp_pretbtt = 50; 2755 cfp_pretbtt = 50;
@@ -2804,7 +2861,7 @@ static int b43_chip_init(struct b43_wldev *dev)
2804{ 2861{
2805 struct b43_phy *phy = &dev->phy; 2862 struct b43_phy *phy = &dev->phy;
2806 int err; 2863 int err;
2807 u32 value32, macctl; 2864 u32 macctl;
2808 u16 value16; 2865 u16 value16;
2809 2866
2810 /* Initialize the MAC control */ 2867 /* Initialize the MAC control */
@@ -2850,7 +2907,7 @@ static int b43_chip_init(struct b43_wldev *dev)
2850 b43_write16(dev, 0x005E, value16); 2907 b43_write16(dev, 0x005E, value16);
2851 } 2908 }
2852 b43_write32(dev, 0x0100, 0x01000000); 2909 b43_write32(dev, 0x0100, 0x01000000);
2853 if (dev->dev->id.revision < 5) 2910 if (dev->sdev->id.revision < 5)
2854 b43_write32(dev, 0x010C, 0x01000000); 2911 b43_write32(dev, 0x010C, 0x01000000);
2855 2912
2856 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL) 2913 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
@@ -2865,7 +2922,7 @@ static int b43_chip_init(struct b43_wldev *dev)
2865 /* Initially set the wireless operation mode. */ 2922 /* Initially set the wireless operation mode. */
2866 b43_adjust_opmode(dev); 2923 b43_adjust_opmode(dev);
2867 2924
2868 if (dev->dev->id.revision < 3) { 2925 if (dev->sdev->id.revision < 3) {
2869 b43_write16(dev, 0x060E, 0x0000); 2926 b43_write16(dev, 0x060E, 0x0000);
2870 b43_write16(dev, 0x0610, 0x8000); 2927 b43_write16(dev, 0x0610, 0x8000);
2871 b43_write16(dev, 0x0604, 0x0000); 2928 b43_write16(dev, 0x0604, 0x0000);
@@ -2882,12 +2939,10 @@ static int b43_chip_init(struct b43_wldev *dev)
2882 b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00); 2939 b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2883 b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00); 2940 b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2884 2941
2885 value32 = ssb_read32(dev->dev, SSB_TMSLOW); 2942 b43_mac_phy_clock_set(dev, true);
2886 value32 |= 0x00100000;
2887 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2888 2943
2889 b43_write16(dev, B43_MMIO_POWERUP_DELAY, 2944 b43_write16(dev, B43_MMIO_POWERUP_DELAY,
2890 dev->dev->bus->chipco.fast_pwrup_delay); 2945 dev->sdev->bus->chipco.fast_pwrup_delay);
2891 2946
2892 err = 0; 2947 err = 0;
2893 b43dbg(dev->wl, "Chip initialized\n"); 2948 b43dbg(dev->wl, "Chip initialized\n");
@@ -3050,7 +3105,7 @@ static int b43_validate_chipaccess(struct b43_wldev *dev)
3050 b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0); 3105 b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0);
3051 b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4); 3106 b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4);
3052 3107
3053 if ((dev->dev->id.revision >= 3) && (dev->dev->id.revision <= 10)) { 3108 if ((dev->sdev->id.revision >= 3) && (dev->sdev->id.revision <= 10)) {
3054 /* The 32bit register shadows the two 16bit registers 3109 /* The 32bit register shadows the two 16bit registers
3055 * with update sideeffects. Validate this. */ 3110 * with update sideeffects. Validate this. */
3056 b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA); 3111 b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
@@ -3166,7 +3221,7 @@ static void b43_tx_work(struct work_struct *work)
3166 mutex_unlock(&wl->mutex); 3221 mutex_unlock(&wl->mutex);
3167} 3222}
3168 3223
3169static int b43_op_tx(struct ieee80211_hw *hw, 3224static void b43_op_tx(struct ieee80211_hw *hw,
3170 struct sk_buff *skb) 3225 struct sk_buff *skb)
3171{ 3226{
3172 struct b43_wl *wl = hw_to_b43_wl(hw); 3227 struct b43_wl *wl = hw_to_b43_wl(hw);
@@ -3174,14 +3229,12 @@ static int b43_op_tx(struct ieee80211_hw *hw,
3174 if (unlikely(skb->len < 2 + 2 + 6)) { 3229 if (unlikely(skb->len < 2 + 2 + 6)) {
3175 /* Too short, this can't be a valid frame. */ 3230 /* Too short, this can't be a valid frame. */
3176 dev_kfree_skb_any(skb); 3231 dev_kfree_skb_any(skb);
3177 return NETDEV_TX_OK; 3232 return;
3178 } 3233 }
3179 B43_WARN_ON(skb_shinfo(skb)->nr_frags); 3234 B43_WARN_ON(skb_shinfo(skb)->nr_frags);
3180 3235
3181 skb_queue_tail(&wl->tx_queue, skb); 3236 skb_queue_tail(&wl->tx_queue, skb);
3182 ieee80211_queue_work(wl->hw, &wl->tx_work); 3237 ieee80211_queue_work(wl->hw, &wl->tx_work);
3183
3184 return NETDEV_TX_OK;
3185} 3238}
3186 3239
3187static void b43_qos_params_upload(struct b43_wldev *dev, 3240static void b43_qos_params_upload(struct b43_wldev *dev,
@@ -3405,7 +3458,7 @@ static void b43_op_set_tsf(struct ieee80211_hw *hw, u64 tsf)
3405 3458
3406static void b43_put_phy_into_reset(struct b43_wldev *dev) 3459static void b43_put_phy_into_reset(struct b43_wldev *dev)
3407{ 3460{
3408 struct ssb_device *sdev = dev->dev; 3461 struct ssb_device *sdev = dev->sdev;
3409 u32 tmslow; 3462 u32 tmslow;
3410 3463
3411 tmslow = ssb_read32(sdev, SSB_TMSLOW); 3464 tmslow = ssb_read32(sdev, SSB_TMSLOW);
@@ -3754,17 +3807,17 @@ static int b43_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3754 } 3807 }
3755 3808
3756 err = -EINVAL; 3809 err = -EINVAL;
3757 switch (key->alg) { 3810 switch (key->cipher) {
3758 case ALG_WEP: 3811 case WLAN_CIPHER_SUITE_WEP40:
3759 if (key->keylen == WLAN_KEY_LEN_WEP40) 3812 algorithm = B43_SEC_ALGO_WEP40;
3760 algorithm = B43_SEC_ALGO_WEP40; 3813 break;
3761 else 3814 case WLAN_CIPHER_SUITE_WEP104:
3762 algorithm = B43_SEC_ALGO_WEP104; 3815 algorithm = B43_SEC_ALGO_WEP104;
3763 break; 3816 break;
3764 case ALG_TKIP: 3817 case WLAN_CIPHER_SUITE_TKIP:
3765 algorithm = B43_SEC_ALGO_TKIP; 3818 algorithm = B43_SEC_ALGO_TKIP;
3766 break; 3819 break;
3767 case ALG_CCMP: 3820 case WLAN_CIPHER_SUITE_CCMP:
3768 algorithm = B43_SEC_ALGO_AES; 3821 algorithm = B43_SEC_ALGO_AES;
3769 break; 3822 break;
3770 default: 3823 default:
@@ -3901,7 +3954,7 @@ redo:
3901 3954
3902 /* Disable interrupts on the device. */ 3955 /* Disable interrupts on the device. */
3903 b43_set_status(dev, B43_STAT_INITIALIZED); 3956 b43_set_status(dev, B43_STAT_INITIALIZED);
3904 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) { 3957 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
3905 /* wl->mutex is locked. That is enough. */ 3958 /* wl->mutex is locked. That is enough. */
3906 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); 3959 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
3907 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */ 3960 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */
@@ -3914,11 +3967,11 @@ redo:
3914 /* Synchronize and free the interrupt handlers. Unlock to avoid deadlocks. */ 3967 /* Synchronize and free the interrupt handlers. Unlock to avoid deadlocks. */
3915 orig_dev = dev; 3968 orig_dev = dev;
3916 mutex_unlock(&wl->mutex); 3969 mutex_unlock(&wl->mutex);
3917 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) { 3970 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
3918 b43_sdio_free_irq(dev); 3971 b43_sdio_free_irq(dev);
3919 } else { 3972 } else {
3920 synchronize_irq(dev->dev->irq); 3973 synchronize_irq(dev->sdev->irq);
3921 free_irq(dev->dev->irq, dev); 3974 free_irq(dev->sdev->irq, dev);
3922 } 3975 }
3923 mutex_lock(&wl->mutex); 3976 mutex_lock(&wl->mutex);
3924 dev = wl->current_dev; 3977 dev = wl->current_dev;
@@ -3951,18 +4004,19 @@ static int b43_wireless_core_start(struct b43_wldev *dev)
3951 B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED); 4004 B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED);
3952 4005
3953 drain_txstatus_queue(dev); 4006 drain_txstatus_queue(dev);
3954 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) { 4007 if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
3955 err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler); 4008 err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler);
3956 if (err) { 4009 if (err) {
3957 b43err(dev->wl, "Cannot request SDIO IRQ\n"); 4010 b43err(dev->wl, "Cannot request SDIO IRQ\n");
3958 goto out; 4011 goto out;
3959 } 4012 }
3960 } else { 4013 } else {
3961 err = request_threaded_irq(dev->dev->irq, b43_interrupt_handler, 4014 err = request_threaded_irq(dev->sdev->irq, b43_interrupt_handler,
3962 b43_interrupt_thread_handler, 4015 b43_interrupt_thread_handler,
3963 IRQF_SHARED, KBUILD_MODNAME, dev); 4016 IRQF_SHARED, KBUILD_MODNAME, dev);
3964 if (err) { 4017 if (err) {
3965 b43err(dev->wl, "Cannot request IRQ-%d\n", dev->dev->irq); 4018 b43err(dev->wl, "Cannot request IRQ-%d\n",
4019 dev->sdev->irq);
3966 goto out; 4020 goto out;
3967 } 4021 }
3968 } 4022 }
@@ -3975,7 +4029,7 @@ static int b43_wireless_core_start(struct b43_wldev *dev)
3975 b43_mac_enable(dev); 4029 b43_mac_enable(dev);
3976 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask); 4030 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
3977 4031
3978 /* Start maintainance work */ 4032 /* Start maintenance work */
3979 b43_periodic_tasks_setup(dev); 4033 b43_periodic_tasks_setup(dev);
3980 4034
3981 b43_leds_init(dev); 4035 b43_leds_init(dev);
@@ -4017,9 +4071,9 @@ static int b43_phy_versioning(struct b43_wldev *dev)
4017 if (phy_rev > 9) 4071 if (phy_rev > 9)
4018 unsupported = 1; 4072 unsupported = 1;
4019 break; 4073 break;
4020#ifdef CONFIG_B43_NPHY 4074#ifdef CONFIG_B43_PHY_N
4021 case B43_PHYTYPE_N: 4075 case B43_PHYTYPE_N:
4022 if (phy_rev > 4) 4076 if (phy_rev > 9)
4023 unsupported = 1; 4077 unsupported = 1;
4024 break; 4078 break;
4025#endif 4079#endif
@@ -4042,10 +4096,10 @@ static int b43_phy_versioning(struct b43_wldev *dev)
4042 analog_type, phy_type, phy_rev); 4096 analog_type, phy_type, phy_rev);
4043 4097
4044 /* Get RADIO versioning */ 4098 /* Get RADIO versioning */
4045 if (dev->dev->bus->chip_id == 0x4317) { 4099 if (dev->sdev->bus->chip_id == 0x4317) {
4046 if (dev->dev->bus->chip_rev == 0) 4100 if (dev->sdev->bus->chip_rev == 0)
4047 tmp = 0x3205017F; 4101 tmp = 0x3205017F;
4048 else if (dev->dev->bus->chip_rev == 1) 4102 else if (dev->sdev->bus->chip_rev == 1)
4049 tmp = 0x4205017F; 4103 tmp = 0x4205017F;
4050 else 4104 else
4051 tmp = 0x5205017F; 4105 tmp = 0x5205017F;
@@ -4150,7 +4204,7 @@ static void setup_struct_wldev_for_init(struct b43_wldev *dev)
4150 4204
4151static void b43_bluetooth_coext_enable(struct b43_wldev *dev) 4205static void b43_bluetooth_coext_enable(struct b43_wldev *dev)
4152{ 4206{
4153 struct ssb_sprom *sprom = &dev->dev->bus->sprom; 4207 struct ssb_sprom *sprom = &dev->sdev->bus->sprom;
4154 u64 hf; 4208 u64 hf;
4155 4209
4156 if (!modparam_btcoex) 4210 if (!modparam_btcoex)
@@ -4177,33 +4231,18 @@ static void b43_bluetooth_coext_disable(struct b43_wldev *dev)
4177 4231
4178static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev) 4232static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev)
4179{ 4233{
4180#ifdef CONFIG_SSB_DRIVER_PCICORE 4234 struct ssb_bus *bus = dev->sdev->bus;
4181 struct ssb_bus *bus = dev->dev->bus;
4182 u32 tmp; 4235 u32 tmp;
4183 4236
4184 if (bus->pcicore.dev && 4237 if ((bus->chip_id == 0x4311 && bus->chip_rev == 2) ||
4185 bus->pcicore.dev->id.coreid == SSB_DEV_PCI && 4238 (bus->chip_id == 0x4312)) {
4186 bus->pcicore.dev->id.revision <= 5) { 4239 tmp = ssb_read32(dev->sdev, SSB_IMCFGLO);
4187 /* IMCFGLO timeouts workaround. */ 4240 tmp &= ~SSB_IMCFGLO_REQTO;
4188 tmp = ssb_read32(dev->dev, SSB_IMCFGLO); 4241 tmp &= ~SSB_IMCFGLO_SERTO;
4189 switch (bus->bustype) { 4242 tmp |= 0x3;
4190 case SSB_BUSTYPE_PCI: 4243 ssb_write32(dev->sdev, SSB_IMCFGLO, tmp);
4191 case SSB_BUSTYPE_PCMCIA: 4244 ssb_commit_settings(bus);
4192 tmp &= ~SSB_IMCFGLO_REQTO;
4193 tmp &= ~SSB_IMCFGLO_SERTO;
4194 tmp |= 0x32;
4195 break;
4196 case SSB_BUSTYPE_SSB:
4197 tmp &= ~SSB_IMCFGLO_REQTO;
4198 tmp &= ~SSB_IMCFGLO_SERTO;
4199 tmp |= 0x53;
4200 break;
4201 default:
4202 break;
4203 }
4204 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
4205 } 4245 }
4206#endif /* CONFIG_SSB_DRIVER_PCICORE */
4207} 4246}
4208 4247
4209static void b43_set_synth_pu_delay(struct b43_wldev *dev, bool idle) 4248static void b43_set_synth_pu_delay(struct b43_wldev *dev, bool idle)
@@ -4250,6 +4289,10 @@ static void b43_wireless_core_exit(struct b43_wldev *dev)
4250 B43_WARN_ON(dev && b43_status(dev) > B43_STAT_INITIALIZED); 4289 B43_WARN_ON(dev && b43_status(dev) > B43_STAT_INITIALIZED);
4251 if (!dev || b43_status(dev) != B43_STAT_INITIALIZED) 4290 if (!dev || b43_status(dev) != B43_STAT_INITIALIZED)
4252 return; 4291 return;
4292
4293 /* Unregister HW RNG driver */
4294 b43_rng_exit(dev->wl);
4295
4253 b43_set_status(dev, B43_STAT_UNINIT); 4296 b43_set_status(dev, B43_STAT_UNINIT);
4254 4297
4255 /* Stop the microcode PSM. */ 4298 /* Stop the microcode PSM. */
@@ -4267,14 +4310,14 @@ static void b43_wireless_core_exit(struct b43_wldev *dev)
4267 dev->wl->current_beacon = NULL; 4310 dev->wl->current_beacon = NULL;
4268 } 4311 }
4269 4312
4270 ssb_device_disable(dev->dev, 0); 4313 ssb_device_disable(dev->sdev, 0);
4271 ssb_bus_may_powerdown(dev->dev->bus); 4314 ssb_bus_may_powerdown(dev->sdev->bus);
4272} 4315}
4273 4316
4274/* Initialize a wireless core */ 4317/* Initialize a wireless core */
4275static int b43_wireless_core_init(struct b43_wldev *dev) 4318static int b43_wireless_core_init(struct b43_wldev *dev)
4276{ 4319{
4277 struct ssb_bus *bus = dev->dev->bus; 4320 struct ssb_bus *bus = dev->sdev->bus;
4278 struct ssb_sprom *sprom = &bus->sprom; 4321 struct ssb_sprom *sprom = &bus->sprom;
4279 struct b43_phy *phy = &dev->phy; 4322 struct b43_phy *phy = &dev->phy;
4280 int err; 4323 int err;
@@ -4286,7 +4329,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4286 err = ssb_bus_powerup(bus, 0); 4329 err = ssb_bus_powerup(bus, 0);
4287 if (err) 4330 if (err)
4288 goto out; 4331 goto out;
4289 if (!ssb_device_is_enabled(dev->dev)) { 4332 if (!ssb_device_is_enabled(dev->sdev)) {
4290 tmp = phy->gmode ? B43_TMSLOW_GMODE : 0; 4333 tmp = phy->gmode ? B43_TMSLOW_GMODE : 0;
4291 b43_wireless_core_reset(dev, tmp); 4334 b43_wireless_core_reset(dev, tmp);
4292 } 4335 }
@@ -4296,7 +4339,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4296 phy->ops->prepare_structs(dev); 4339 phy->ops->prepare_structs(dev);
4297 4340
4298 /* Enable IRQ routing to this device. */ 4341 /* Enable IRQ routing to this device. */
4299 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev); 4342 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->sdev);
4300 4343
4301 b43_imcfglo_timeouts_workaround(dev); 4344 b43_imcfglo_timeouts_workaround(dev);
4302 b43_bluetooth_coext_disable(dev); 4345 b43_bluetooth_coext_disable(dev);
@@ -4309,7 +4352,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4309 if (err) 4352 if (err)
4310 goto err_busdown; 4353 goto err_busdown;
4311 b43_shm_write16(dev, B43_SHM_SHARED, 4354 b43_shm_write16(dev, B43_SHM_SHARED,
4312 B43_SHM_SH_WLCOREREV, dev->dev->id.revision); 4355 B43_SHM_SH_WLCOREREV, dev->sdev->id.revision);
4313 hf = b43_hf_read(dev); 4356 hf = b43_hf_read(dev);
4314 if (phy->type == B43_PHYTYPE_G) { 4357 if (phy->type == B43_PHYTYPE_G) {
4315 hf |= B43_HF_SYMW; 4358 hf |= B43_HF_SYMW;
@@ -4356,8 +4399,8 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4356 /* Maximum Contention Window */ 4399 /* Maximum Contention Window */
4357 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF); 4400 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF);
4358 4401
4359 if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) || 4402 if ((dev->sdev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
4360 (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) || 4403 (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) ||
4361 dev->use_pio) { 4404 dev->use_pio) {
4362 dev->__using_pio_transfers = 1; 4405 dev->__using_pio_transfers = 1;
4363 err = b43_pio_init(dev); 4406 err = b43_pio_init(dev);
@@ -4379,6 +4422,9 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4379 4422
4380 b43_set_status(dev, B43_STAT_INITIALIZED); 4423 b43_set_status(dev, B43_STAT_INITIALIZED);
4381 4424
4425 /* Register HW RNG driver */
4426 b43_rng_init(dev->wl);
4427
4382out: 4428out:
4383 return err; 4429 return err;
4384 4430
@@ -4691,7 +4737,7 @@ static void b43_wireless_core_detach(struct b43_wldev *dev)
4691static int b43_wireless_core_attach(struct b43_wldev *dev) 4737static int b43_wireless_core_attach(struct b43_wldev *dev)
4692{ 4738{
4693 struct b43_wl *wl = dev->wl; 4739 struct b43_wl *wl = dev->wl;
4694 struct ssb_bus *bus = dev->dev->bus; 4740 struct ssb_bus *bus = dev->sdev->bus;
4695 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL; 4741 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
4696 int err; 4742 int err;
4697 bool have_2ghz_phy = 0, have_5ghz_phy = 0; 4743 bool have_2ghz_phy = 0, have_5ghz_phy = 0;
@@ -4710,10 +4756,10 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4710 goto out; 4756 goto out;
4711 } 4757 }
4712 /* Get the PHY type. */ 4758 /* Get the PHY type. */
4713 if (dev->dev->id.revision >= 5) { 4759 if (dev->sdev->id.revision >= 5) {
4714 u32 tmshigh; 4760 u32 tmshigh;
4715 4761
4716 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH); 4762 tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
4717 have_2ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY); 4763 have_2ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY);
4718 have_5ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_5GHZ_PHY); 4764 have_5ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_5GHZ_PHY);
4719 } else 4765 } else
@@ -4786,7 +4832,7 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4786 INIT_WORK(&dev->restart_work, b43_chip_reset); 4832 INIT_WORK(&dev->restart_work, b43_chip_reset);
4787 4833
4788 dev->phy.ops->switch_analog(dev, 0); 4834 dev->phy.ops->switch_analog(dev, 0);
4789 ssb_device_disable(dev->dev, 0); 4835 ssb_device_disable(dev->sdev, 0);
4790 ssb_bus_may_powerdown(bus); 4836 ssb_bus_may_powerdown(bus);
4791 4837
4792out: 4838out:
@@ -4820,31 +4866,14 @@ static void b43_one_core_detach(struct ssb_device *dev)
4820static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl) 4866static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl)
4821{ 4867{
4822 struct b43_wldev *wldev; 4868 struct b43_wldev *wldev;
4823 struct pci_dev *pdev;
4824 int err = -ENOMEM; 4869 int err = -ENOMEM;
4825 4870
4826 if (!list_empty(&wl->devlist)) {
4827 /* We are not the first core on this chip. */
4828 pdev = (dev->bus->bustype == SSB_BUSTYPE_PCI) ? dev->bus->host_pci : NULL;
4829 /* Only special chips support more than one wireless
4830 * core, although some of the other chips have more than
4831 * one wireless core as well. Check for this and
4832 * bail out early.
4833 */
4834 if (!pdev ||
4835 ((pdev->device != 0x4321) &&
4836 (pdev->device != 0x4313) && (pdev->device != 0x431A))) {
4837 b43dbg(wl, "Ignoring unconnected 802.11 core\n");
4838 return -ENODEV;
4839 }
4840 }
4841
4842 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL); 4871 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
4843 if (!wldev) 4872 if (!wldev)
4844 goto out; 4873 goto out;
4845 4874
4846 wldev->use_pio = b43_modparam_pio; 4875 wldev->use_pio = b43_modparam_pio;
4847 wldev->dev = dev; 4876 wldev->sdev = dev;
4848 wldev->wl = wl; 4877 wldev->wl = wl;
4849 b43_set_status(wldev, B43_STAT_UNINIT); 4878 b43_set_status(wldev, B43_STAT_UNINIT);
4850 wldev->bad_frames_preempt = modparam_bad_frames_preempt; 4879 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
@@ -4905,19 +4934,16 @@ static void b43_wireless_exit(struct ssb_device *dev, struct b43_wl *wl)
4905 ieee80211_free_hw(hw); 4934 ieee80211_free_hw(hw);
4906} 4935}
4907 4936
4908static int b43_wireless_init(struct ssb_device *dev) 4937static struct b43_wl *b43_wireless_init(struct ssb_device *dev)
4909{ 4938{
4910 struct ssb_sprom *sprom = &dev->bus->sprom; 4939 struct ssb_sprom *sprom = &dev->bus->sprom;
4911 struct ieee80211_hw *hw; 4940 struct ieee80211_hw *hw;
4912 struct b43_wl *wl; 4941 struct b43_wl *wl;
4913 int err = -ENOMEM;
4914
4915 b43_sprom_fixup(dev->bus);
4916 4942
4917 hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops); 4943 hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops);
4918 if (!hw) { 4944 if (!hw) {
4919 b43err(NULL, "Could not allocate ieee80211 device\n"); 4945 b43err(NULL, "Could not allocate ieee80211 device\n");
4920 goto out; 4946 return ERR_PTR(-ENOMEM);
4921 } 4947 }
4922 wl = hw_to_b43_wl(hw); 4948 wl = hw_to_b43_wl(hw);
4923 4949
@@ -4951,15 +4977,12 @@ static int b43_wireless_init(struct ssb_device *dev)
4951 INIT_WORK(&wl->tx_work, b43_tx_work); 4977 INIT_WORK(&wl->tx_work, b43_tx_work);
4952 skb_queue_head_init(&wl->tx_queue); 4978 skb_queue_head_init(&wl->tx_queue);
4953 4979
4954 ssb_set_devtypedata(dev, wl);
4955 b43info(wl, "Broadcom %04X WLAN found (core revision %u)\n", 4980 b43info(wl, "Broadcom %04X WLAN found (core revision %u)\n",
4956 dev->bus->chip_id, dev->id.revision); 4981 dev->bus->chip_id, dev->id.revision);
4957 err = 0; 4982 return wl;
4958out:
4959 return err;
4960} 4983}
4961 4984
4962static int b43_probe(struct ssb_device *dev, const struct ssb_device_id *id) 4985static int b43_ssb_probe(struct ssb_device *dev, const struct ssb_device_id *id)
4963{ 4986{
4964 struct b43_wl *wl; 4987 struct b43_wl *wl;
4965 int err; 4988 int err;
@@ -4969,11 +4992,14 @@ static int b43_probe(struct ssb_device *dev, const struct ssb_device_id *id)
4969 if (!wl) { 4992 if (!wl) {
4970 /* Probing the first core. Must setup common struct b43_wl */ 4993 /* Probing the first core. Must setup common struct b43_wl */
4971 first = 1; 4994 first = 1;
4972 err = b43_wireless_init(dev); 4995 b43_sprom_fixup(dev->bus);
4973 if (err) 4996 wl = b43_wireless_init(dev);
4997 if (IS_ERR(wl)) {
4998 err = PTR_ERR(wl);
4974 goto out; 4999 goto out;
4975 wl = ssb_get_devtypedata(dev); 5000 }
4976 B43_WARN_ON(!wl); 5001 ssb_set_devtypedata(dev, wl);
5002 B43_WARN_ON(ssb_get_devtypedata(dev) != wl);
4977 } 5003 }
4978 err = b43_one_core_attach(dev, wl); 5004 err = b43_one_core_attach(dev, wl);
4979 if (err) 5005 if (err)
@@ -4984,7 +5010,6 @@ static int b43_probe(struct ssb_device *dev, const struct ssb_device_id *id)
4984 if (err) 5010 if (err)
4985 goto err_one_core_detach; 5011 goto err_one_core_detach;
4986 b43_leds_register(wl->current_dev); 5012 b43_leds_register(wl->current_dev);
4987 b43_rng_init(wl);
4988 } 5013 }
4989 5014
4990 out: 5015 out:
@@ -4998,7 +5023,7 @@ static int b43_probe(struct ssb_device *dev, const struct ssb_device_id *id)
4998 return err; 5023 return err;
4999} 5024}
5000 5025
5001static void b43_remove(struct ssb_device *dev) 5026static void b43_ssb_remove(struct ssb_device *dev)
5002{ 5027{
5003 struct b43_wl *wl = ssb_get_devtypedata(dev); 5028 struct b43_wl *wl = ssb_get_devtypedata(dev);
5004 struct b43_wldev *wldev = ssb_get_drvdata(dev); 5029 struct b43_wldev *wldev = ssb_get_drvdata(dev);
@@ -5020,7 +5045,6 @@ static void b43_remove(struct ssb_device *dev)
5020 b43_one_core_detach(dev); 5045 b43_one_core_detach(dev);
5021 5046
5022 if (list_empty(&wl->devlist)) { 5047 if (list_empty(&wl->devlist)) {
5023 b43_rng_exit(wl);
5024 b43_leds_unregister(wl); 5048 b43_leds_unregister(wl);
5025 /* Last core on the chip unregistered. 5049 /* Last core on the chip unregistered.
5026 * We can destroy common struct b43_wl. 5050 * We can destroy common struct b43_wl.
@@ -5042,8 +5066,8 @@ void b43_controller_restart(struct b43_wldev *dev, const char *reason)
5042static struct ssb_driver b43_ssb_driver = { 5066static struct ssb_driver b43_ssb_driver = {
5043 .name = KBUILD_MODNAME, 5067 .name = KBUILD_MODNAME,
5044 .id_table = b43_ssb_tbl, 5068 .id_table = b43_ssb_tbl,
5045 .probe = b43_probe, 5069 .probe = b43_ssb_probe,
5046 .remove = b43_remove, 5070 .remove = b43_ssb_remove,
5047}; 5071};
5048 5072
5049static void b43_print_driverinfo(void) 5073static void b43_print_driverinfo(void)
@@ -5057,7 +5081,7 @@ static void b43_print_driverinfo(void)
5057#ifdef CONFIG_B43_PCMCIA 5081#ifdef CONFIG_B43_PCMCIA
5058 feat_pcmcia = "M"; 5082 feat_pcmcia = "M";
5059#endif 5083#endif
5060#ifdef CONFIG_B43_NPHY 5084#ifdef CONFIG_B43_PHY_N
5061 feat_nphy = "N"; 5085 feat_nphy = "N";
5062#endif 5086#endif
5063#ifdef CONFIG_B43_LEDS 5087#ifdef CONFIG_B43_LEDS
diff --git a/drivers/net/wireless/b43/main.h b/drivers/net/wireless/b43/main.h
index 40db03678d9f..a0d327f13183 100644
--- a/drivers/net/wireless/b43/main.h
+++ b/drivers/net/wireless/b43/main.h
@@ -133,6 +133,7 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags);
133 133
134void b43_mac_suspend(struct b43_wldev *dev); 134void b43_mac_suspend(struct b43_wldev *dev);
135void b43_mac_enable(struct b43_wldev *dev); 135void b43_mac_enable(struct b43_wldev *dev);
136void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on);
136 137
137 138
138struct b43_request_fw_context; 139struct b43_request_fw_context;
diff --git a/drivers/net/wireless/b43/pcmcia.c b/drivers/net/wireless/b43/pcmcia.c
index dfbc41d431ff..2c8461dcf1b0 100644
--- a/drivers/net/wireless/b43/pcmcia.c
+++ b/drivers/net/wireless/b43/pcmcia.c
@@ -26,14 +26,13 @@
26#include <linux/ssb/ssb.h> 26#include <linux/ssb/ssb.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28 28
29#include <pcmcia/cs.h>
30#include <pcmcia/cistpl.h> 29#include <pcmcia/cistpl.h>
31#include <pcmcia/ciscode.h> 30#include <pcmcia/ciscode.h>
32#include <pcmcia/ds.h> 31#include <pcmcia/ds.h>
33#include <pcmcia/cisreg.h> 32#include <pcmcia/cisreg.h>
34 33
35 34
36static /*const */ struct pcmcia_device_id b43_pcmcia_tbl[] = { 35static const struct pcmcia_device_id b43_pcmcia_tbl[] = {
37 PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x448), 36 PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x448),
38 PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x476), 37 PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x476),
39 PCMCIA_DEVICE_NULL, 38 PCMCIA_DEVICE_NULL,
@@ -63,7 +62,6 @@ static int b43_pcmcia_resume(struct pcmcia_device *dev)
63static int __devinit b43_pcmcia_probe(struct pcmcia_device *dev) 62static int __devinit b43_pcmcia_probe(struct pcmcia_device *dev)
64{ 63{
65 struct ssb_bus *ssb; 64 struct ssb_bus *ssb;
66 win_req_t win;
67 int err = -ENOMEM; 65 int err = -ENOMEM;
68 int res = 0; 66 int res = 0;
69 67
@@ -73,30 +71,28 @@ static int __devinit b43_pcmcia_probe(struct pcmcia_device *dev)
73 71
74 err = -ENODEV; 72 err = -ENODEV;
75 73
76 dev->conf.Attributes = CONF_ENABLE_IRQ; 74 dev->config_flags |= CONF_ENABLE_IRQ;
77 dev->conf.IntType = INT_MEMORY_AND_IO;
78 75
79 win.Attributes = WIN_ENABLE | WIN_DATA_WIDTH_16 | 76 dev->resource[2]->flags |= WIN_ENABLE | WIN_DATA_WIDTH_16 |
80 WIN_USE_WAIT; 77 WIN_USE_WAIT;
81 win.Base = 0; 78 dev->resource[2]->start = 0;
82 win.Size = SSB_CORE_SIZE; 79 dev->resource[2]->end = SSB_CORE_SIZE;
83 win.AccessSpeed = 250; 80 res = pcmcia_request_window(dev, dev->resource[2], 250);
84 res = pcmcia_request_window(dev, &win, &dev->win);
85 if (res != 0) 81 if (res != 0)
86 goto err_kfree_ssb; 82 goto err_kfree_ssb;
87 83
88 res = pcmcia_map_mem_page(dev, dev->win, 0); 84 res = pcmcia_map_mem_page(dev, dev->resource[2], 0);
89 if (res != 0) 85 if (res != 0)
90 goto err_disable; 86 goto err_disable;
91 87
92 if (!dev->irq) 88 if (!dev->irq)
93 goto err_disable; 89 goto err_disable;
94 90
95 res = pcmcia_request_configuration(dev, &dev->conf); 91 res = pcmcia_enable_device(dev);
96 if (res != 0) 92 if (res != 0)
97 goto err_disable; 93 goto err_disable;
98 94
99 err = ssb_bus_pcmciabus_register(ssb, dev, win.Base); 95 err = ssb_bus_pcmciabus_register(ssb, dev, dev->resource[2]->start);
100 if (err) 96 if (err)
101 goto err_disable; 97 goto err_disable;
102 dev->priv = ssb; 98 dev->priv = ssb;
@@ -125,9 +121,7 @@ static void __devexit b43_pcmcia_remove(struct pcmcia_device *dev)
125 121
126static struct pcmcia_driver b43_pcmcia_driver = { 122static struct pcmcia_driver b43_pcmcia_driver = {
127 .owner = THIS_MODULE, 123 .owner = THIS_MODULE,
128 .drv = { 124 .name = "b43-pcmcia",
129 .name = "b43-pcmcia",
130 },
131 .id_table = b43_pcmcia_tbl, 125 .id_table = b43_pcmcia_tbl,
132 .probe = b43_pcmcia_probe, 126 .probe = b43_pcmcia_probe,
133 .remove = __devexit_p(b43_pcmcia_remove), 127 .remove = __devexit_p(b43_pcmcia_remove),
diff --git a/drivers/net/wireless/b43/phy_a.c b/drivers/net/wireless/b43/phy_a.c
index b6428ec16dd6..b01c8ced57c3 100644
--- a/drivers/net/wireless/b43/phy_a.c
+++ b/drivers/net/wireless/b43/phy_a.c
@@ -265,7 +265,7 @@ static void hardware_pctl_init_aphy(struct b43_wldev *dev)
265 265
266void b43_phy_inita(struct b43_wldev *dev) 266void b43_phy_inita(struct b43_wldev *dev)
267{ 267{
268 struct ssb_bus *bus = dev->dev->bus; 268 struct ssb_bus *bus = dev->sdev->bus;
269 struct b43_phy *phy = &dev->phy; 269 struct b43_phy *phy = &dev->phy;
270 270
271 /* This lowlevel A-PHY init is also called from G-PHY init. 271 /* This lowlevel A-PHY init is also called from G-PHY init.
@@ -311,7 +311,7 @@ void b43_phy_inita(struct b43_wldev *dev)
311 } 311 }
312 312
313 if ((phy->type == B43_PHYTYPE_G) && 313 if ((phy->type == B43_PHYTYPE_G) &&
314 (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)) { 314 (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)) {
315 b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF); 315 b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF);
316 } 316 }
317} 317}
@@ -323,17 +323,17 @@ static int b43_aphy_init_tssi2dbm_table(struct b43_wldev *dev)
323 struct b43_phy_a *aphy = phy->a; 323 struct b43_phy_a *aphy = phy->a;
324 s16 pab0, pab1, pab2; 324 s16 pab0, pab1, pab2;
325 325
326 pab0 = (s16) (dev->dev->bus->sprom.pa1b0); 326 pab0 = (s16) (dev->sdev->bus->sprom.pa1b0);
327 pab1 = (s16) (dev->dev->bus->sprom.pa1b1); 327 pab1 = (s16) (dev->sdev->bus->sprom.pa1b1);
328 pab2 = (s16) (dev->dev->bus->sprom.pa1b2); 328 pab2 = (s16) (dev->sdev->bus->sprom.pa1b2);
329 329
330 if (pab0 != 0 && pab1 != 0 && pab2 != 0 && 330 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
331 pab0 != -1 && pab1 != -1 && pab2 != -1) { 331 pab0 != -1 && pab1 != -1 && pab2 != -1) {
332 /* The pabX values are set in SPROM. Use them. */ 332 /* The pabX values are set in SPROM. Use them. */
333 if ((s8) dev->dev->bus->sprom.itssi_a != 0 && 333 if ((s8) dev->sdev->bus->sprom.itssi_a != 0 &&
334 (s8) dev->dev->bus->sprom.itssi_a != -1) 334 (s8) dev->sdev->bus->sprom.itssi_a != -1)
335 aphy->tgt_idle_tssi = 335 aphy->tgt_idle_tssi =
336 (s8) (dev->dev->bus->sprom.itssi_a); 336 (s8) (dev->sdev->bus->sprom.itssi_a);
337 else 337 else
338 aphy->tgt_idle_tssi = 62; 338 aphy->tgt_idle_tssi = 62;
339 aphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0, 339 aphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0,
diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c
index 8f7d7eff2d80..e46b2f4f0920 100644
--- a/drivers/net/wireless/b43/phy_common.c
+++ b/drivers/net/wireless/b43/phy_common.c
@@ -50,7 +50,7 @@ int b43_phy_allocate(struct b43_wldev *dev)
50 phy->ops = &b43_phyops_g; 50 phy->ops = &b43_phyops_g;
51 break; 51 break;
52 case B43_PHYTYPE_N: 52 case B43_PHYTYPE_N:
53#ifdef CONFIG_B43_NPHY 53#ifdef CONFIG_B43_PHY_N
54 phy->ops = &b43_phyops_n; 54 phy->ops = &b43_phyops_n;
55#endif 55#endif
56 break; 56 break;
@@ -168,7 +168,7 @@ void b43_phy_lock(struct b43_wldev *dev)
168 B43_WARN_ON(dev->phy.phy_locked); 168 B43_WARN_ON(dev->phy.phy_locked);
169 dev->phy.phy_locked = 1; 169 dev->phy.phy_locked = 1;
170#endif 170#endif
171 B43_WARN_ON(dev->dev->id.revision < 3); 171 B43_WARN_ON(dev->sdev->id.revision < 3);
172 172
173 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) 173 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
174 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); 174 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
@@ -180,7 +180,7 @@ void b43_phy_unlock(struct b43_wldev *dev)
180 B43_WARN_ON(!dev->phy.phy_locked); 180 B43_WARN_ON(!dev->phy.phy_locked);
181 dev->phy.phy_locked = 0; 181 dev->phy.phy_locked = 0;
182#endif 182#endif
183 B43_WARN_ON(dev->dev->id.revision < 3); 183 B43_WARN_ON(dev->sdev->id.revision < 3);
184 184
185 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) 185 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP))
186 b43_power_saving_ctl_bits(dev, 0); 186 b43_power_saving_ctl_bits(dev, 0);
@@ -231,6 +231,7 @@ void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
231u16 b43_phy_read(struct b43_wldev *dev, u16 reg) 231u16 b43_phy_read(struct b43_wldev *dev, u16 reg)
232{ 232{
233 assert_mac_suspended(dev); 233 assert_mac_suspended(dev);
234 dev->phy.writes_counter = 0;
234 return dev->phy.ops->phy_read(dev, reg); 235 return dev->phy.ops->phy_read(dev, reg);
235} 236}
236 237
@@ -238,6 +239,10 @@ void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
238{ 239{
239 assert_mac_suspended(dev); 240 assert_mac_suspended(dev);
240 dev->phy.ops->phy_write(dev, reg, value); 241 dev->phy.ops->phy_write(dev, reg, value);
242 if (++dev->phy.writes_counter == B43_MAX_WRITES_IN_ROW) {
243 b43_read16(dev, B43_MMIO_PHY_VER);
244 dev->phy.writes_counter = 0;
245 }
241} 246}
242 247
243void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg) 248void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
@@ -294,8 +299,10 @@ int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel)
294 */ 299 */
295 channelcookie = new_channel; 300 channelcookie = new_channel;
296 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) 301 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
297 channelcookie |= 0x100; 302 channelcookie |= B43_SHM_SH_CHAN_5GHZ;
298 //FIXME set 40Mhz flag if required 303 /* FIXME: set 40Mhz flag if required */
304 if (0)
305 channelcookie |= B43_SHM_SH_CHAN_40MHZ;
299 savedcookie = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN); 306 savedcookie = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN);
300 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN, channelcookie); 307 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN, channelcookie);
301 308
@@ -361,8 +368,8 @@ void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags)
361 /* The next check will be needed in two seconds, or later. */ 368 /* The next check will be needed in two seconds, or later. */
362 phy->next_txpwr_check_time = round_jiffies(now + (HZ * 2)); 369 phy->next_txpwr_check_time = round_jiffies(now + (HZ * 2));
363 370
364 if ((dev->dev->bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) && 371 if ((dev->sdev->bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
365 (dev->dev->bus->boardinfo.type == SSB_BOARD_BU4306)) 372 (dev->sdev->bus->boardinfo.type == SSB_BOARD_BU4306))
366 return; /* No software txpower adjustment needed */ 373 return; /* No software txpower adjustment needed */
367 374
368 result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI)); 375 result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI));
@@ -422,12 +429,21 @@ void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on)
422 b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4); 429 b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4);
423} 430}
424 431
432
433bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type)
434{
435 return (channel_type == NL80211_CHAN_HT40MINUS ||
436 channel_type == NL80211_CHAN_HT40PLUS);
437}
438
425/* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */ 439/* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */
426struct b43_c32 b43_cordic(int theta) 440struct b43_c32 b43_cordic(int theta)
427{ 441{
428 u32 arctg[] = { 2949120, 1740967, 919879, 466945, 234379, 117304, 442 static const u32 arctg[] = {
429 58666, 29335, 14668, 7334, 3667, 1833, 917, 458, 443 2949120, 1740967, 919879, 466945, 234379, 117304,
430 229, 115, 57, 29, }; 444 58666, 29335, 14668, 7334, 3667, 1833,
445 917, 458, 229, 115, 57, 29,
446 };
431 u8 i; 447 u8 i;
432 s32 tmp; 448 s32 tmp;
433 s8 signx = 1; 449 s8 signx = 1;
diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h
index bd480b481bfc..2401bee8b081 100644
--- a/drivers/net/wireless/b43/phy_common.h
+++ b/drivers/net/wireless/b43/phy_common.h
@@ -2,6 +2,7 @@
2#define LINUX_B43_PHY_COMMON_H_ 2#define LINUX_B43_PHY_COMMON_H_
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/nl80211.h>
5 6
6struct b43_wldev; 7struct b43_wldev;
7 8
@@ -38,6 +39,9 @@ struct b43_c32 { s32 i, q; };
38#define B43_PHYVER_TYPE_SHIFT 8 39#define B43_PHYVER_TYPE_SHIFT 8
39#define B43_PHYVER_VERSION 0x00FF 40#define B43_PHYVER_VERSION 0x00FF
40 41
42/* PHY writes need to be flushed if we reach limit */
43#define B43_MAX_WRITES_IN_ROW 24
44
41/** 45/**
42 * enum b43_interference_mitigation - Interference Mitigation mode 46 * enum b43_interference_mitigation - Interference Mitigation mode
43 * 47 *
@@ -231,6 +235,9 @@ struct b43_phy {
231 /* PHY revision number. */ 235 /* PHY revision number. */
232 u8 rev; 236 u8 rev;
233 237
238 /* Count writes since last read */
239 u8 writes_counter;
240
234 /* Radio versioning */ 241 /* Radio versioning */
235 u16 radio_manuf; /* Radio manufacturer */ 242 u16 radio_manuf; /* Radio manufacturer */
236 u16 radio_ver; /* Radio version */ 243 u16 radio_ver; /* Radio version */
@@ -250,8 +257,10 @@ struct b43_phy {
250 * check is needed. */ 257 * check is needed. */
251 unsigned long next_txpwr_check_time; 258 unsigned long next_txpwr_check_time;
252 259
253 /* current channel */ 260 /* Current channel */
254 unsigned int channel; 261 unsigned int channel;
262 u16 channel_freq;
263 enum nl80211_channel_type channel_type;
255 264
256 /* PHY TX errors counter. */ 265 /* PHY TX errors counter. */
257 atomic_t txerr_cnt; 266 atomic_t txerr_cnt;
@@ -427,6 +436,8 @@ int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
427 */ 436 */
428void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on); 437void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
429 438
439bool b43_channel_type_is_40mhz(enum nl80211_channel_type channel_type);
440
430struct b43_c32 b43_cordic(int theta); 441struct b43_c32 b43_cordic(int theta);
431 442
432#endif /* LINUX_B43_PHY_COMMON_H_ */ 443#endif /* LINUX_B43_PHY_COMMON_H_ */
diff --git a/drivers/net/wireless/b43/phy_g.c b/drivers/net/wireless/b43/phy_g.c
index 0dc33b65e86b..1758a282f913 100644
--- a/drivers/net/wireless/b43/phy_g.c
+++ b/drivers/net/wireless/b43/phy_g.c
@@ -718,7 +718,7 @@ static void b43_calc_nrssi_threshold(struct b43_wldev *dev)
718 B43_WARN_ON(phy->type != B43_PHYTYPE_G); 718 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
719 719
720 if (!phy->gmode || 720 if (!phy->gmode ||
721 !(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) { 721 !(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
722 tmp16 = b43_nrssi_hw_read(dev, 0x20); 722 tmp16 = b43_nrssi_hw_read(dev, 0x20);
723 if (tmp16 >= 0x20) 723 if (tmp16 >= 0x20)
724 tmp16 -= 0x40; 724 tmp16 -= 0x40;
@@ -1114,7 +1114,7 @@ static u16 radio2050_rfover_val(struct b43_wldev *dev,
1114{ 1114{
1115 struct b43_phy *phy = &dev->phy; 1115 struct b43_phy *phy = &dev->phy;
1116 struct b43_phy_g *gphy = phy->g; 1116 struct b43_phy_g *gphy = phy->g;
1117 struct ssb_sprom *sprom = &(dev->dev->bus->sprom); 1117 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
1118 1118
1119 if (!phy->gmode) 1119 if (!phy->gmode)
1120 return 0; 1120 return 0;
@@ -1491,7 +1491,7 @@ static u16 b43_radio_init2050(struct b43_wldev *dev)
1491 1491
1492static void b43_phy_initb5(struct b43_wldev *dev) 1492static void b43_phy_initb5(struct b43_wldev *dev)
1493{ 1493{
1494 struct ssb_bus *bus = dev->dev->bus; 1494 struct ssb_bus *bus = dev->sdev->bus;
1495 struct b43_phy *phy = &dev->phy; 1495 struct b43_phy *phy = &dev->phy;
1496 struct b43_phy_g *gphy = phy->g; 1496 struct b43_phy_g *gphy = phy->g;
1497 u16 offset, value; 1497 u16 offset, value;
@@ -1620,7 +1620,7 @@ static void b43_phy_initb6(struct b43_wldev *dev)
1620 b43_radio_write16(dev, 0x5A, 0x88); 1620 b43_radio_write16(dev, 0x5A, 0x88);
1621 b43_radio_write16(dev, 0x5B, 0x6B); 1621 b43_radio_write16(dev, 0x5B, 0x6B);
1622 b43_radio_write16(dev, 0x5C, 0x0F); 1622 b43_radio_write16(dev, 0x5C, 0x0F);
1623 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_ALTIQ) { 1623 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_ALTIQ) {
1624 b43_radio_write16(dev, 0x5D, 0xFA); 1624 b43_radio_write16(dev, 0x5D, 0xFA);
1625 b43_radio_write16(dev, 0x5E, 0xD8); 1625 b43_radio_write16(dev, 0x5E, 0xD8);
1626 } else { 1626 } else {
@@ -1787,7 +1787,7 @@ static void b43_calc_loopback_gain(struct b43_wldev *dev)
1787 b43_phy_set(dev, B43_PHY_RFOVER, 0x0100); 1787 b43_phy_set(dev, B43_PHY_RFOVER, 0x0100);
1788 b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xCFFF); 1788 b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xCFFF);
1789 1789
1790 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) { 1790 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) {
1791 if (phy->rev >= 7) { 1791 if (phy->rev >= 7) {
1792 b43_phy_set(dev, B43_PHY_RFOVER, 0x0800); 1792 b43_phy_set(dev, B43_PHY_RFOVER, 0x0800);
1793 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x8000); 1793 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x8000);
@@ -1919,10 +1919,10 @@ static void b43_hardware_pctl_init_gphy(struct b43_wldev *dev)
1919 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_HWPCTL); 1919 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_HWPCTL);
1920} 1920}
1921 1921
1922/* Intialize B/G PHY power control */ 1922/* Initialize B/G PHY power control */
1923static void b43_phy_init_pctl(struct b43_wldev *dev) 1923static void b43_phy_init_pctl(struct b43_wldev *dev)
1924{ 1924{
1925 struct ssb_bus *bus = dev->dev->bus; 1925 struct ssb_bus *bus = dev->sdev->bus;
1926 struct b43_phy *phy = &dev->phy; 1926 struct b43_phy *phy = &dev->phy;
1927 struct b43_phy_g *gphy = phy->g; 1927 struct b43_phy_g *gphy = phy->g;
1928 struct b43_rfatt old_rfatt; 1928 struct b43_rfatt old_rfatt;
@@ -2053,7 +2053,7 @@ static void b43_phy_initg(struct b43_wldev *dev)
2053 if (phy->rev >= 6) { 2053 if (phy->rev >= 6) {
2054 b43_phy_maskset(dev, B43_PHY_CCK(0x36), 0x0FFF, (gphy->lo_control->tx_bias << 12)); 2054 b43_phy_maskset(dev, B43_PHY_CCK(0x36), 0x0FFF, (gphy->lo_control->tx_bias << 12));
2055 } 2055 }
2056 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) 2056 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)
2057 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8075); 2057 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8075);
2058 else 2058 else
2059 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x807F); 2059 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x807F);
@@ -2066,7 +2066,7 @@ static void b43_phy_initg(struct b43_wldev *dev)
2066 b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078); 2066 b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078);
2067 } 2067 }
2068 2068
2069 if (!(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) { 2069 if (!(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
2070 /* The specs state to update the NRSSI LT with 2070 /* The specs state to update the NRSSI LT with
2071 * the value 0x7FFFFFFF here. I think that is some weird 2071 * the value 0x7FFFFFFF here. I think that is some weird
2072 * compiler optimization in the original driver. 2072 * compiler optimization in the original driver.
@@ -2088,8 +2088,8 @@ static void b43_phy_initg(struct b43_wldev *dev)
2088 /* FIXME: The spec says in the following if, the 0 should be replaced 2088 /* FIXME: The spec says in the following if, the 0 should be replaced
2089 'if OFDM may not be used in the current locale' 2089 'if OFDM may not be used in the current locale'
2090 but OFDM is legal everywhere */ 2090 but OFDM is legal everywhere */
2091 if ((dev->dev->bus->chip_id == 0x4306 2091 if ((dev->sdev->bus->chip_id == 0x4306
2092 && dev->dev->bus->chip_package == 2) || 0) { 2092 && dev->sdev->bus->chip_package == 2) || 0) {
2093 b43_phy_mask(dev, B43_PHY_CRS0, 0xBFFF); 2093 b43_phy_mask(dev, B43_PHY_CRS0, 0xBFFF);
2094 b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF); 2094 b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF);
2095 } 2095 }
@@ -2105,7 +2105,7 @@ void b43_gphy_channel_switch(struct b43_wldev *dev,
2105 b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel)); 2105 b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel));
2106 2106
2107 if (channel == 14) { 2107 if (channel == 14) {
2108 if (dev->dev->bus->sprom.country_code == 2108 if (dev->sdev->bus->sprom.country_code ==
2109 SSB_SPROM1CCODE_JAPAN) 2109 SSB_SPROM1CCODE_JAPAN)
2110 b43_hf_write(dev, 2110 b43_hf_write(dev,
2111 b43_hf_read(dev) & ~B43_HF_ACPR); 2111 b43_hf_read(dev) & ~B43_HF_ACPR);
@@ -2136,7 +2136,7 @@ static void default_baseband_attenuation(struct b43_wldev *dev,
2136static void default_radio_attenuation(struct b43_wldev *dev, 2136static void default_radio_attenuation(struct b43_wldev *dev,
2137 struct b43_rfatt *rf) 2137 struct b43_rfatt *rf)
2138{ 2138{
2139 struct ssb_bus *bus = dev->dev->bus; 2139 struct ssb_bus *bus = dev->sdev->bus;
2140 struct b43_phy *phy = &dev->phy; 2140 struct b43_phy *phy = &dev->phy;
2141 2141
2142 rf->with_padmix = 0; 2142 rf->with_padmix = 0;
@@ -2384,11 +2384,11 @@ static int b43_gphy_init_tssi2dbm_table(struct b43_wldev *dev)
2384 struct b43_phy_g *gphy = phy->g; 2384 struct b43_phy_g *gphy = phy->g;
2385 s16 pab0, pab1, pab2; 2385 s16 pab0, pab1, pab2;
2386 2386
2387 pab0 = (s16) (dev->dev->bus->sprom.pa0b0); 2387 pab0 = (s16) (dev->sdev->bus->sprom.pa0b0);
2388 pab1 = (s16) (dev->dev->bus->sprom.pa0b1); 2388 pab1 = (s16) (dev->sdev->bus->sprom.pa0b1);
2389 pab2 = (s16) (dev->dev->bus->sprom.pa0b2); 2389 pab2 = (s16) (dev->sdev->bus->sprom.pa0b2);
2390 2390
2391 B43_WARN_ON((dev->dev->bus->chip_id == 0x4301) && 2391 B43_WARN_ON((dev->sdev->bus->chip_id == 0x4301) &&
2392 (phy->radio_ver != 0x2050)); /* Not supported anymore */ 2392 (phy->radio_ver != 0x2050)); /* Not supported anymore */
2393 2393
2394 gphy->dyn_tssi_tbl = 0; 2394 gphy->dyn_tssi_tbl = 0;
@@ -2396,10 +2396,10 @@ static int b43_gphy_init_tssi2dbm_table(struct b43_wldev *dev)
2396 if (pab0 != 0 && pab1 != 0 && pab2 != 0 && 2396 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
2397 pab0 != -1 && pab1 != -1 && pab2 != -1) { 2397 pab0 != -1 && pab1 != -1 && pab2 != -1) {
2398 /* The pabX values are set in SPROM. Use them. */ 2398 /* The pabX values are set in SPROM. Use them. */
2399 if ((s8) dev->dev->bus->sprom.itssi_bg != 0 && 2399 if ((s8) dev->sdev->bus->sprom.itssi_bg != 0 &&
2400 (s8) dev->dev->bus->sprom.itssi_bg != -1) { 2400 (s8) dev->sdev->bus->sprom.itssi_bg != -1) {
2401 gphy->tgt_idle_tssi = 2401 gphy->tgt_idle_tssi =
2402 (s8) (dev->dev->bus->sprom.itssi_bg); 2402 (s8) (dev->sdev->bus->sprom.itssi_bg);
2403 } else 2403 } else
2404 gphy->tgt_idle_tssi = 62; 2404 gphy->tgt_idle_tssi = 62;
2405 gphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0, 2405 gphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0,
@@ -2840,7 +2840,7 @@ static void b43_gphy_op_adjust_txpower(struct b43_wldev *dev)
2840 B43_TXCTL_TXMIX; 2840 B43_TXCTL_TXMIX;
2841 rfatt += 2; 2841 rfatt += 2;
2842 bbatt += 2; 2842 bbatt += 2;
2843 } else if (dev->dev->bus->sprom. 2843 } else if (dev->sdev->bus->sprom.
2844 boardflags_lo & 2844 boardflags_lo &
2845 B43_BFL_PACTRL) { 2845 B43_BFL_PACTRL) {
2846 bbatt += 4 * (rfatt - 2); 2846 bbatt += 4 * (rfatt - 2);
@@ -2914,14 +2914,14 @@ static enum b43_txpwr_result b43_gphy_op_recalc_txpower(struct b43_wldev *dev,
2914 estimated_pwr = b43_gphy_estimate_power_out(dev, average_tssi); 2914 estimated_pwr = b43_gphy_estimate_power_out(dev, average_tssi);
2915 2915
2916 B43_WARN_ON(phy->type != B43_PHYTYPE_G); 2916 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
2917 max_pwr = dev->dev->bus->sprom.maxpwr_bg; 2917 max_pwr = dev->sdev->bus->sprom.maxpwr_bg;
2918 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) 2918 if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)
2919 max_pwr -= 3; /* minus 0.75 */ 2919 max_pwr -= 3; /* minus 0.75 */
2920 if (unlikely(max_pwr >= INT_TO_Q52(30/*dBm*/))) { 2920 if (unlikely(max_pwr >= INT_TO_Q52(30/*dBm*/))) {
2921 b43warn(dev->wl, 2921 b43warn(dev->wl,
2922 "Invalid max-TX-power value in SPROM.\n"); 2922 "Invalid max-TX-power value in SPROM.\n");
2923 max_pwr = INT_TO_Q52(20); /* fake it */ 2923 max_pwr = INT_TO_Q52(20); /* fake it */
2924 dev->dev->bus->sprom.maxpwr_bg = max_pwr; 2924 dev->sdev->bus->sprom.maxpwr_bg = max_pwr;
2925 } 2925 }
2926 2926
2927 /* Get desired power (in Q5.2) */ 2927 /* Get desired power (in Q5.2) */
@@ -3014,7 +3014,7 @@ static void b43_gphy_op_pwork_60sec(struct b43_wldev *dev)
3014{ 3014{
3015 struct b43_phy *phy = &dev->phy; 3015 struct b43_phy *phy = &dev->phy;
3016 3016
3017 if (!(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) 3017 if (!(dev->sdev->bus->sprom.boardflags_lo & B43_BFL_RSSI))
3018 return; 3018 return;
3019 3019
3020 b43_mac_suspend(dev); 3020 b43_mac_suspend(dev);
diff --git a/drivers/net/wireless/b43/phy_g.h b/drivers/net/wireless/b43/phy_g.h
index 8569fdd4c6be..5413c906a3e7 100644
--- a/drivers/net/wireless/b43/phy_g.h
+++ b/drivers/net/wireless/b43/phy_g.h
@@ -164,7 +164,7 @@ struct b43_phy_g {
164 /* Current Interference Mitigation mode */ 164 /* Current Interference Mitigation mode */
165 int interfmode; 165 int interfmode;
166 /* Stack of saved values from the Interference Mitigation code. 166 /* Stack of saved values from the Interference Mitigation code.
167 * Each value in the stack is layed out as follows: 167 * Each value in the stack is laid out as follows:
168 * bit 0-11: offset 168 * bit 0-11: offset
169 * bit 12-15: register ID 169 * bit 12-15: register ID
170 * bit 16-32: value 170 * bit 16-32: value
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index fd50eb116243..012c8da2f944 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -86,7 +86,7 @@ static void b43_lpphy_op_free(struct b43_wldev *dev)
86static void lpphy_read_band_sprom(struct b43_wldev *dev) 86static void lpphy_read_band_sprom(struct b43_wldev *dev)
87{ 87{
88 struct b43_phy_lp *lpphy = dev->phy.lp; 88 struct b43_phy_lp *lpphy = dev->phy.lp;
89 struct ssb_bus *bus = dev->dev->bus; 89 struct ssb_bus *bus = dev->sdev->bus;
90 u16 cckpo, maxpwr; 90 u16 cckpo, maxpwr;
91 u32 ofdmpo; 91 u32 ofdmpo;
92 int i; 92 int i;
@@ -214,7 +214,7 @@ static void lpphy_table_init(struct b43_wldev *dev)
214 214
215static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev) 215static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
216{ 216{
217 struct ssb_bus *bus = dev->dev->bus; 217 struct ssb_bus *bus = dev->sdev->bus;
218 struct b43_phy_lp *lpphy = dev->phy.lp; 218 struct b43_phy_lp *lpphy = dev->phy.lp;
219 u16 tmp, tmp2; 219 u16 tmp, tmp2;
220 220
@@ -412,7 +412,7 @@ static void lpphy_restore_dig_flt_state(struct b43_wldev *dev)
412 412
413static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) 413static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
414{ 414{
415 struct ssb_bus *bus = dev->dev->bus; 415 struct ssb_bus *bus = dev->sdev->bus;
416 struct b43_phy_lp *lpphy = dev->phy.lp; 416 struct b43_phy_lp *lpphy = dev->phy.lp;
417 417
418 b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50); 418 b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50);
@@ -519,7 +519,7 @@ struct b2062_freqdata {
519static void lpphy_2062_init(struct b43_wldev *dev) 519static void lpphy_2062_init(struct b43_wldev *dev)
520{ 520{
521 struct b43_phy_lp *lpphy = dev->phy.lp; 521 struct b43_phy_lp *lpphy = dev->phy.lp;
522 struct ssb_bus *bus = dev->dev->bus; 522 struct ssb_bus *bus = dev->sdev->bus;
523 u32 crystalfreq, tmp, ref; 523 u32 crystalfreq, tmp, ref;
524 unsigned int i; 524 unsigned int i;
525 const struct b2062_freqdata *fd = NULL; 525 const struct b2062_freqdata *fd = NULL;
@@ -697,7 +697,7 @@ static void lpphy_radio_init(struct b43_wldev *dev)
697 lpphy_sync_stx(dev); 697 lpphy_sync_stx(dev);
698 b43_phy_write(dev, B43_PHY_OFDM(0xF0), 0x5F80); 698 b43_phy_write(dev, B43_PHY_OFDM(0xF0), 0x5F80);
699 b43_phy_write(dev, B43_PHY_OFDM(0xF1), 0); 699 b43_phy_write(dev, B43_PHY_OFDM(0xF1), 0);
700 if (dev->dev->bus->chip_id == 0x4325) { 700 if (dev->sdev->bus->chip_id == 0x4325) {
701 // TODO SSB PMU recalibration 701 // TODO SSB PMU recalibration
702 } 702 }
703 } 703 }
@@ -1289,7 +1289,7 @@ finish:
1289 1289
1290static void lpphy_rev2plus_rc_calib(struct b43_wldev *dev) 1290static void lpphy_rev2plus_rc_calib(struct b43_wldev *dev)
1291{ 1291{
1292 struct ssb_bus *bus = dev->dev->bus; 1292 struct ssb_bus *bus = dev->sdev->bus;
1293 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000; 1293 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
1294 u8 tmp = b43_radio_read(dev, B2063_RX_BB_SP8) & 0xFF; 1294 u8 tmp = b43_radio_read(dev, B2063_RX_BB_SP8) & 0xFF;
1295 int i; 1295 int i;
@@ -1840,7 +1840,7 @@ static void lpphy_papd_cal(struct b43_wldev *dev, struct lpphy_tx_gains gains,
1840static void lpphy_papd_cal_txpwr(struct b43_wldev *dev) 1840static void lpphy_papd_cal_txpwr(struct b43_wldev *dev)
1841{ 1841{
1842 struct b43_phy_lp *lpphy = dev->phy.lp; 1842 struct b43_phy_lp *lpphy = dev->phy.lp;
1843 struct ssb_bus *bus = dev->dev->bus; 1843 struct ssb_bus *bus = dev->sdev->bus;
1844 struct lpphy_tx_gains gains, oldgains; 1844 struct lpphy_tx_gains gains, oldgains;
1845 int old_txpctl, old_afe_ovr, old_rf, old_bbmult; 1845 int old_txpctl, old_afe_ovr, old_rf, old_bbmult;
1846 1846
@@ -1870,7 +1870,7 @@ static int lpphy_rx_iq_cal(struct b43_wldev *dev, bool noise, bool tx,
1870 bool rx, bool pa, struct lpphy_tx_gains *gains) 1870 bool rx, bool pa, struct lpphy_tx_gains *gains)
1871{ 1871{
1872 struct b43_phy_lp *lpphy = dev->phy.lp; 1872 struct b43_phy_lp *lpphy = dev->phy.lp;
1873 struct ssb_bus *bus = dev->dev->bus; 1873 struct ssb_bus *bus = dev->sdev->bus;
1874 const struct lpphy_rx_iq_comp *iqcomp = NULL; 1874 const struct lpphy_rx_iq_comp *iqcomp = NULL;
1875 struct lpphy_tx_gains nogains, oldgains; 1875 struct lpphy_tx_gains nogains, oldgains;
1876 u16 tmp; 1876 u16 tmp;
@@ -2408,7 +2408,7 @@ static const struct b206x_channel b2063_chantbl[] = {
2408 2408
2409static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev) 2409static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev)
2410{ 2410{
2411 struct ssb_bus *bus = dev->dev->bus; 2411 struct ssb_bus *bus = dev->sdev->bus;
2412 2412
2413 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0xFF); 2413 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0xFF);
2414 udelay(20); 2414 udelay(20);
@@ -2432,7 +2432,7 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
2432 unsigned int channel) 2432 unsigned int channel)
2433{ 2433{
2434 struct b43_phy_lp *lpphy = dev->phy.lp; 2434 struct b43_phy_lp *lpphy = dev->phy.lp;
2435 struct ssb_bus *bus = dev->dev->bus; 2435 struct ssb_bus *bus = dev->sdev->bus;
2436 const struct b206x_channel *chandata = NULL; 2436 const struct b206x_channel *chandata = NULL;
2437 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000; 2437 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
2438 u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9; 2438 u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9;
@@ -2522,7 +2522,7 @@ static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
2522static int lpphy_b2063_tune(struct b43_wldev *dev, 2522static int lpphy_b2063_tune(struct b43_wldev *dev,
2523 unsigned int channel) 2523 unsigned int channel)
2524{ 2524{
2525 struct ssb_bus *bus = dev->dev->bus; 2525 struct ssb_bus *bus = dev->sdev->bus;
2526 2526
2527 static const struct b206x_channel *chandata = NULL; 2527 static const struct b206x_channel *chandata = NULL;
2528 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000; 2528 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 5a725703770c..05960ddde24e 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -29,6 +29,8 @@
29#include "b43.h" 29#include "b43.h"
30#include "phy_n.h" 30#include "phy_n.h"
31#include "tables_nphy.h" 31#include "tables_nphy.h"
32#include "radio_2055.h"
33#include "radio_2056.h"
32#include "main.h" 34#include "main.h"
33 35
34struct nphy_txgains { 36struct nphy_txgains {
@@ -65,6 +67,18 @@ enum b43_nphy_rf_sequence {
65 B43_RFSEQ_UPDATE_GAINU, 67 B43_RFSEQ_UPDATE_GAINU,
66}; 68};
67 69
70enum b43_nphy_rssi_type {
71 B43_NPHY_RSSI_X = 0,
72 B43_NPHY_RSSI_Y,
73 B43_NPHY_RSSI_Z,
74 B43_NPHY_RSSI_PWRDET,
75 B43_NPHY_RSSI_TSSI_I,
76 B43_NPHY_RSSI_TSSI_Q,
77 B43_NPHY_RSSI_TBD,
78};
79
80static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev,
81 bool enable);
68static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd, 82static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
69 u8 *events, u8 *delays, u8 length); 83 u8 *events, u8 *delays, u8 length);
70static void b43_nphy_force_rf_sequence(struct b43_wldev *dev, 84static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
@@ -73,22 +87,6 @@ static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
73 u16 value, u8 core, bool off); 87 u16 value, u8 core, bool off);
74static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field, 88static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
75 u16 value, u8 core); 89 u16 value, u8 core);
76static int nphy_channel_switch(struct b43_wldev *dev, unsigned int channel);
77
78static inline bool b43_empty_chanspec(struct b43_chanspec *chanspec)
79{
80 return !chanspec->channel && !chanspec->sideband &&
81 !chanspec->b_width && !chanspec->b_freq;
82}
83
84static inline bool b43_eq_chanspecs(struct b43_chanspec *chanspec1,
85 struct b43_chanspec *chanspec2)
86{
87 return (chanspec1->channel == chanspec2->channel &&
88 chanspec1->sideband == chanspec2->sideband &&
89 chanspec1->b_width == chanspec2->b_width &&
90 chanspec1->b_freq == chanspec2->b_freq);
91}
92 90
93void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna) 91void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
94{//TODO 92{//TODO
@@ -141,6 +139,99 @@ static void b43_chantab_radio_upload(struct b43_wldev *dev,
141 b43_radio_write(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim); 139 b43_radio_write(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim);
142} 140}
143 141
142static void b43_chantab_radio_2056_upload(struct b43_wldev *dev,
143 const struct b43_nphy_channeltab_entry_rev3 *e)
144{
145 b43_radio_write(dev, B2056_SYN_PLL_VCOCAL1, e->radio_syn_pll_vcocal1);
146 b43_radio_write(dev, B2056_SYN_PLL_VCOCAL2, e->radio_syn_pll_vcocal2);
147 b43_radio_write(dev, B2056_SYN_PLL_REFDIV, e->radio_syn_pll_refdiv);
148 b43_radio_write(dev, B2056_SYN_PLL_MMD2, e->radio_syn_pll_mmd2);
149 b43_radio_write(dev, B2056_SYN_PLL_MMD1, e->radio_syn_pll_mmd1);
150 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER1,
151 e->radio_syn_pll_loopfilter1);
152 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER2,
153 e->radio_syn_pll_loopfilter2);
154 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER3,
155 e->radio_syn_pll_loopfilter3);
156 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER4,
157 e->radio_syn_pll_loopfilter4);
158 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER5,
159 e->radio_syn_pll_loopfilter5);
160 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR27,
161 e->radio_syn_reserved_addr27);
162 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR28,
163 e->radio_syn_reserved_addr28);
164 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR29,
165 e->radio_syn_reserved_addr29);
166 b43_radio_write(dev, B2056_SYN_LOGEN_VCOBUF1,
167 e->radio_syn_logen_vcobuf1);
168 b43_radio_write(dev, B2056_SYN_LOGEN_MIXER2, e->radio_syn_logen_mixer2);
169 b43_radio_write(dev, B2056_SYN_LOGEN_BUF3, e->radio_syn_logen_buf3);
170 b43_radio_write(dev, B2056_SYN_LOGEN_BUF4, e->radio_syn_logen_buf4);
171
172 b43_radio_write(dev, B2056_RX0 | B2056_RX_LNAA_TUNE,
173 e->radio_rx0_lnaa_tune);
174 b43_radio_write(dev, B2056_RX0 | B2056_RX_LNAG_TUNE,
175 e->radio_rx0_lnag_tune);
176
177 b43_radio_write(dev, B2056_TX0 | B2056_TX_INTPAA_BOOST_TUNE,
178 e->radio_tx0_intpaa_boost_tune);
179 b43_radio_write(dev, B2056_TX0 | B2056_TX_INTPAG_BOOST_TUNE,
180 e->radio_tx0_intpag_boost_tune);
181 b43_radio_write(dev, B2056_TX0 | B2056_TX_PADA_BOOST_TUNE,
182 e->radio_tx0_pada_boost_tune);
183 b43_radio_write(dev, B2056_TX0 | B2056_TX_PADG_BOOST_TUNE,
184 e->radio_tx0_padg_boost_tune);
185 b43_radio_write(dev, B2056_TX0 | B2056_TX_PGAA_BOOST_TUNE,
186 e->radio_tx0_pgaa_boost_tune);
187 b43_radio_write(dev, B2056_TX0 | B2056_TX_PGAG_BOOST_TUNE,
188 e->radio_tx0_pgag_boost_tune);
189 b43_radio_write(dev, B2056_TX0 | B2056_TX_MIXA_BOOST_TUNE,
190 e->radio_tx0_mixa_boost_tune);
191 b43_radio_write(dev, B2056_TX0 | B2056_TX_MIXG_BOOST_TUNE,
192 e->radio_tx0_mixg_boost_tune);
193
194 b43_radio_write(dev, B2056_RX1 | B2056_RX_LNAA_TUNE,
195 e->radio_rx1_lnaa_tune);
196 b43_radio_write(dev, B2056_RX1 | B2056_RX_LNAG_TUNE,
197 e->radio_rx1_lnag_tune);
198
199 b43_radio_write(dev, B2056_TX1 | B2056_TX_INTPAA_BOOST_TUNE,
200 e->radio_tx1_intpaa_boost_tune);
201 b43_radio_write(dev, B2056_TX1 | B2056_TX_INTPAG_BOOST_TUNE,
202 e->radio_tx1_intpag_boost_tune);
203 b43_radio_write(dev, B2056_TX1 | B2056_TX_PADA_BOOST_TUNE,
204 e->radio_tx1_pada_boost_tune);
205 b43_radio_write(dev, B2056_TX1 | B2056_TX_PADG_BOOST_TUNE,
206 e->radio_tx1_padg_boost_tune);
207 b43_radio_write(dev, B2056_TX1 | B2056_TX_PGAA_BOOST_TUNE,
208 e->radio_tx1_pgaa_boost_tune);
209 b43_radio_write(dev, B2056_TX1 | B2056_TX_PGAG_BOOST_TUNE,
210 e->radio_tx1_pgag_boost_tune);
211 b43_radio_write(dev, B2056_TX1 | B2056_TX_MIXA_BOOST_TUNE,
212 e->radio_tx1_mixa_boost_tune);
213 b43_radio_write(dev, B2056_TX1 | B2056_TX_MIXG_BOOST_TUNE,
214 e->radio_tx1_mixg_boost_tune);
215}
216
217/* http://bcm-v4.sipsolutions.net/802.11/PHY/Radio/2056Setup */
218static void b43_radio_2056_setup(struct b43_wldev *dev,
219 const struct b43_nphy_channeltab_entry_rev3 *e)
220{
221 B43_WARN_ON(dev->phy.rev < 3);
222
223 b43_chantab_radio_2056_upload(dev, e);
224 /* TODO */
225 udelay(50);
226 /* VCO calibration */
227 b43_radio_write(dev, B2056_SYN_PLL_VCOCAL12, 0x00);
228 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x38);
229 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x18);
230 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x38);
231 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x39);
232 udelay(300);
233}
234
144static void b43_chantab_phy_upload(struct b43_wldev *dev, 235static void b43_chantab_phy_upload(struct b43_wldev *dev,
145 const struct b43_phy_n_sfo_cfg *e) 236 const struct b43_phy_n_sfo_cfg *e)
146{ 237{
@@ -152,9 +243,154 @@ static void b43_chantab_phy_upload(struct b43_wldev *dev,
152 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6); 243 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
153} 244}
154 245
246/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlEnable */
247static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
248{
249 struct b43_phy_n *nphy = dev->phy.n;
250 u8 i;
251 u16 tmp;
252
253 if (nphy->hang_avoid)
254 b43_nphy_stay_in_carrier_search(dev, 1);
255
256 nphy->txpwrctrl = enable;
257 if (!enable) {
258 if (dev->phy.rev >= 3)
259 ; /* TODO */
260
261 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6840);
262 for (i = 0; i < 84; i++)
263 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
264
265 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6C40);
266 for (i = 0; i < 84; i++)
267 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
268
269 tmp = B43_NPHY_TXPCTL_CMD_COEFF | B43_NPHY_TXPCTL_CMD_HWPCTLEN;
270 if (dev->phy.rev >= 3)
271 tmp |= B43_NPHY_TXPCTL_CMD_PCTLEN;
272 b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD, ~tmp);
273
274 if (dev->phy.rev >= 3) {
275 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
276 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
277 } else {
278 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
279 }
280
281 if (dev->phy.rev == 2)
282 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
283 ~B43_NPHY_BPHY_CTL3_SCALE, 0x53);
284 else if (dev->phy.rev < 2)
285 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
286 ~B43_NPHY_BPHY_CTL3_SCALE, 0x5A);
287
288 if (dev->phy.rev < 2 && 0)
289 ; /* TODO */
290 } else {
291 b43err(dev->wl, "enabling tx pwr ctrl not implemented yet\n");
292 }
293
294 if (nphy->hang_avoid)
295 b43_nphy_stay_in_carrier_search(dev, 0);
296}
297
298/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrFix */
155static void b43_nphy_tx_power_fix(struct b43_wldev *dev) 299static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
156{ 300{
157 //TODO 301 struct b43_phy_n *nphy = dev->phy.n;
302 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
303
304 u8 txpi[2], bbmult, i;
305 u16 tmp, radio_gain, dac_gain;
306 u16 freq = dev->phy.channel_freq;
307 u32 txgain;
308 /* u32 gaintbl; rev3+ */
309
310 if (nphy->hang_avoid)
311 b43_nphy_stay_in_carrier_search(dev, 1);
312
313 if (dev->phy.rev >= 3) {
314 txpi[0] = 40;
315 txpi[1] = 40;
316 } else if (sprom->revision < 4) {
317 txpi[0] = 72;
318 txpi[1] = 72;
319 } else {
320 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
321 txpi[0] = sprom->txpid2g[0];
322 txpi[1] = sprom->txpid2g[1];
323 } else if (freq >= 4900 && freq < 5100) {
324 txpi[0] = sprom->txpid5gl[0];
325 txpi[1] = sprom->txpid5gl[1];
326 } else if (freq >= 5100 && freq < 5500) {
327 txpi[0] = sprom->txpid5g[0];
328 txpi[1] = sprom->txpid5g[1];
329 } else if (freq >= 5500) {
330 txpi[0] = sprom->txpid5gh[0];
331 txpi[1] = sprom->txpid5gh[1];
332 } else {
333 txpi[0] = 91;
334 txpi[1] = 91;
335 }
336 }
337
338 /*
339 for (i = 0; i < 2; i++) {
340 nphy->txpwrindex[i].index_internal = txpi[i];
341 nphy->txpwrindex[i].index_internal_save = txpi[i];
342 }
343 */
344
345 for (i = 0; i < 2; i++) {
346 if (dev->phy.rev >= 3) {
347 /* FIXME: support 5GHz */
348 txgain = b43_ntab_tx_gain_rev3plus_2ghz[txpi[i]];
349 radio_gain = (txgain >> 16) & 0x1FFFF;
350 } else {
351 txgain = b43_ntab_tx_gain_rev0_1_2[txpi[i]];
352 radio_gain = (txgain >> 16) & 0x1FFF;
353 }
354
355 dac_gain = (txgain >> 8) & 0x3F;
356 bbmult = txgain & 0xFF;
357
358 if (dev->phy.rev >= 3) {
359 if (i == 0)
360 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
361 else
362 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
363 } else {
364 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
365 }
366
367 if (i == 0)
368 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN1, dac_gain);
369 else
370 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN2, dac_gain);
371
372 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D10 + i);
373 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, radio_gain);
374
375 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
376 tmp = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
377
378 if (i == 0)
379 tmp = (tmp & 0x00FF) | (bbmult << 8);
380 else
381 tmp = (tmp & 0xFF00) | bbmult;
382
383 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
384 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, tmp);
385
386 if (0)
387 ; /* TODO */
388 }
389
390 b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT);
391
392 if (nphy->hang_avoid)
393 b43_nphy_stay_in_carrier_search(dev, 0);
158} 394}
159 395
160 396
@@ -187,18 +423,19 @@ static void b43_radio_init2055_pre(struct b43_wldev *dev)
187static void b43_radio_init2055_post(struct b43_wldev *dev) 423static void b43_radio_init2055_post(struct b43_wldev *dev)
188{ 424{
189 struct b43_phy_n *nphy = dev->phy.n; 425 struct b43_phy_n *nphy = dev->phy.n;
190 struct ssb_sprom *sprom = &(dev->dev->bus->sprom); 426 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
191 struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo); 427 struct ssb_boardinfo *binfo = &(dev->sdev->bus->boardinfo);
192 int i; 428 int i;
193 u16 val; 429 u16 val;
194 bool workaround = false; 430 bool workaround = false;
195 431
196 if (sprom->revision < 4) 432 if (sprom->revision < 4)
197 workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM || 433 workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM &&
198 binfo->type != 0x46D || 434 binfo->type == 0x46D &&
199 binfo->rev < 0x41); 435 binfo->rev >= 0x41);
200 else 436 else
201 workaround = ((sprom->boardflags_hi & B43_BFH_NOPA) == 0); 437 workaround =
438 !(sprom->boardflags2_lo & B43_BFL2_RXBB_INT_REG_DIS);
202 439
203 b43_radio_mask(dev, B2055_MASTER1, 0xFFF3); 440 b43_radio_mask(dev, B2055_MASTER1, 0xFFF3);
204 if (workaround) { 441 if (workaround) {
@@ -223,7 +460,7 @@ static void b43_radio_init2055_post(struct b43_wldev *dev)
223 if (i) 460 if (i)
224 b43err(dev->wl, "radio post init timeout\n"); 461 b43err(dev->wl, "radio post init timeout\n");
225 b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F); 462 b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F);
226 nphy_channel_switch(dev, dev->phy.channel); 463 b43_switch_channel(dev, dev->phy.channel);
227 b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9); 464 b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9);
228 b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9); 465 b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9);
229 b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83); 466 b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
@@ -247,23 +484,55 @@ static void b43_radio_init2055_post(struct b43_wldev *dev)
247static void b43_radio_init2055(struct b43_wldev *dev) 484static void b43_radio_init2055(struct b43_wldev *dev)
248{ 485{
249 b43_radio_init2055_pre(dev); 486 b43_radio_init2055_pre(dev);
250 if (b43_status(dev) < B43_STAT_INITIALIZED) 487 if (b43_status(dev) < B43_STAT_INITIALIZED) {
251 b2055_upload_inittab(dev, 0, 1); 488 /* Follow wl, not specs. Do not force uploading all regs */
252 else 489 b2055_upload_inittab(dev, 0, 0);
253 b2055_upload_inittab(dev, 0/*FIXME on 5ghz band*/, 0); 490 } else {
491 bool ghz5 = b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ;
492 b2055_upload_inittab(dev, ghz5, 0);
493 }
254 b43_radio_init2055_post(dev); 494 b43_radio_init2055_post(dev);
255} 495}
256 496
497static void b43_radio_init2056_pre(struct b43_wldev *dev)
498{
499 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
500 ~B43_NPHY_RFCTL_CMD_CHIP0PU);
501 /* Maybe wl meant to reset and set (order?) RFCTL_CMD_OEPORFORCE? */
502 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
503 B43_NPHY_RFCTL_CMD_OEPORFORCE);
504 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
505 ~B43_NPHY_RFCTL_CMD_OEPORFORCE);
506 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
507 B43_NPHY_RFCTL_CMD_CHIP0PU);
508}
509
510static void b43_radio_init2056_post(struct b43_wldev *dev)
511{
512 b43_radio_set(dev, B2056_SYN_COM_CTRL, 0xB);
513 b43_radio_set(dev, B2056_SYN_COM_PU, 0x2);
514 b43_radio_set(dev, B2056_SYN_COM_RESET, 0x2);
515 msleep(1);
516 b43_radio_mask(dev, B2056_SYN_COM_RESET, ~0x2);
517 b43_radio_mask(dev, B2056_SYN_PLL_MAST2, ~0xFC);
518 b43_radio_mask(dev, B2056_SYN_RCCAL_CTRL0, ~0x1);
519 /*
520 if (nphy->init_por)
521 Call Radio 2056 Recalibrate
522 */
523}
524
257/* 525/*
258 * Initialize a Broadcom 2056 N-radio 526 * Initialize a Broadcom 2056 N-radio
259 * http://bcm-v4.sipsolutions.net/802.11/Radio/2056/Init 527 * http://bcm-v4.sipsolutions.net/802.11/Radio/2056/Init
260 */ 528 */
261static void b43_radio_init2056(struct b43_wldev *dev) 529static void b43_radio_init2056(struct b43_wldev *dev)
262{ 530{
263 /* TODO */ 531 b43_radio_init2056_pre(dev);
532 b2056_upload_inittabs(dev, 0, 0);
533 b43_radio_init2056_post(dev);
264} 534}
265 535
266
267/* 536/*
268 * Upload the N-PHY tables. 537 * Upload the N-PHY tables.
269 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables 538 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
@@ -340,12 +609,12 @@ static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
340 if (dev->phy.type != B43_PHYTYPE_N) 609 if (dev->phy.type != B43_PHYTYPE_N)
341 return; 610 return;
342 611
343 tmslow = ssb_read32(dev->dev, SSB_TMSLOW); 612 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
344 if (force) 613 if (force)
345 tmslow |= SSB_TMSLOW_FGC; 614 tmslow |= SSB_TMSLOW_FGC;
346 else 615 else
347 tmslow &= ~SSB_TMSLOW_FGC; 616 tmslow &= ~SSB_TMSLOW_FGC;
348 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); 617 ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
349} 618}
350 619
351/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */ 620/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
@@ -460,6 +729,8 @@ static void b43_nphy_rx_iq_coeffs(struct b43_wldev *dev, bool write,
460 } 729 }
461} 730}
462 731
732#if 0
733/* Ready but not used anywhere */
463/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhyCleanup */ 734/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhyCleanup */
464static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev *dev, u8 core) 735static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev *dev, u8 core)
465{ 736{
@@ -541,6 +812,7 @@ static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
541 b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1)); 812 b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1));
542 b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core)); 813 b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core));
543} 814}
815#endif
544 816
545/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */ 817/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */
546static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask) 818static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
@@ -576,7 +848,6 @@ static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
576 ii = est.i1_pwr; 848 ii = est.i1_pwr;
577 qq = est.q1_pwr; 849 qq = est.q1_pwr;
578 } else { 850 } else {
579 B43_WARN_ON(1);
580 continue; 851 continue;
581 } 852 }
582 853
@@ -658,7 +929,8 @@ static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
658} 929}
659 930
660/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */ 931/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
661static void b43_nphy_write_clip_detection(struct b43_wldev *dev, u16 *clip_st) 932static void b43_nphy_write_clip_detection(struct b43_wldev *dev,
933 const u16 *clip_st)
662{ 934{
663 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]); 935 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
664 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]); 936 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
@@ -687,7 +959,7 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
687 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0); 959 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
688 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0); 960 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
689 961
690 ssb_chipco_gpio_control(&dev->dev->bus->chipco, 0xFC00, 962 ssb_chipco_gpio_control(&dev->sdev->bus->chipco, 0xFC00,
691 0xFC00); 963 0xFC00);
692 b43_write32(dev, B43_MMIO_MACCTL, 964 b43_write32(dev, B43_MMIO_MACCTL,
693 b43_read32(dev, B43_MMIO_MACCTL) & 965 b43_read32(dev, B43_MMIO_MACCTL) &
@@ -711,7 +983,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
711{ 983{
712 u16 tmp; 984 u16 tmp;
713 985
714 if (dev->dev->id.revision == 16) 986 if (dev->sdev->id.revision == 16)
715 b43_mac_suspend(dev); 987 b43_mac_suspend(dev);
716 988
717 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL); 989 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
@@ -721,7 +993,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
721 tmp |= (val & mask); 993 tmp |= (val & mask);
722 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp); 994 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
723 995
724 if (dev->dev->id.revision == 16) 996 if (dev->sdev->id.revision == 16)
725 b43_mac_enable(dev); 997 b43_mac_enable(dev);
726 998
727 return tmp; 999 return tmp;
@@ -734,7 +1006,7 @@ static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
734 struct b43_phy_n *nphy = phy->n; 1006 struct b43_phy_n *nphy = phy->n;
735 1007
736 if (enable) { 1008 if (enable) {
737 u16 clip[] = { 0xFFFF, 0xFFFF }; 1009 static const u16 clip[] = { 0xFFFF, 0xFFFF };
738 if (nphy->deaf_count++ == 0) { 1010 if (nphy->deaf_count++ == 0) {
739 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0); 1011 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
740 b43_nphy_classifier(dev, 0x7, 0); 1012 b43_nphy_classifier(dev, 0x7, 0);
@@ -782,7 +1054,7 @@ static void b43_nphy_spur_workaround(struct b43_wldev *dev)
782{ 1054{
783 struct b43_phy_n *nphy = dev->phy.n; 1055 struct b43_phy_n *nphy = dev->phy.n;
784 1056
785 u8 channel = nphy->radio_chanspec.channel; 1057 u8 channel = dev->phy.channel;
786 int tone[2] = { 57, 58 }; 1058 int tone[2] = { 57, 58 };
787 u32 noise[2] = { 0x3FF, 0x3FF }; 1059 u32 noise[2] = { 0x3FF, 0x3FF };
788 1060
@@ -846,7 +1118,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
846 u16 data[4]; 1118 u16 data[4];
847 s16 gain[2]; 1119 s16 gain[2];
848 u16 minmax[2]; 1120 u16 minmax[2];
849 u16 lna_gain[4] = { -2, 10, 19, 25 }; 1121 static const u16 lna_gain[4] = { -2, 10, 19, 25 };
850 1122
851 if (nphy->hang_avoid) 1123 if (nphy->hang_avoid)
852 b43_nphy_stay_in_carrier_search(dev, 1); 1124 b43_nphy_stay_in_carrier_search(dev, 1);
@@ -856,9 +1128,9 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
856 gain[0] = 6; 1128 gain[0] = 6;
857 gain[1] = 6; 1129 gain[1] = 6;
858 } else { 1130 } else {
859 tmp = 40370 - 315 * nphy->radio_chanspec.channel; 1131 tmp = 40370 - 315 * dev->phy.channel;
860 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1)); 1132 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1));
861 tmp = 23242 - 224 * nphy->radio_chanspec.channel; 1133 tmp = 23242 - 224 * dev->phy.channel;
862 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1)); 1134 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1));
863 } 1135 }
864 } else { 1136 } else {
@@ -878,7 +1150,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
878 data[2] = lna_gain[2] + gain[i]; 1150 data[2] = lna_gain[2] + gain[i];
879 data[3] = lna_gain[3] + gain[i]; 1151 data[3] = lna_gain[3] + gain[i];
880 } 1152 }
881 b43_ntab_write_bulk(dev, B43_NTAB16(10, 8), 4, data); 1153 b43_ntab_write_bulk(dev, B43_NTAB16(i, 8), 4, data);
882 1154
883 minmax[i] = 23 + gain[i]; 1155 minmax[i] = 23 + gain[i];
884 } 1156 }
@@ -893,25 +1165,101 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
893} 1165}
894 1166
895/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */ 1167/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
896static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev) 1168static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
897{ 1169{
898 struct b43_phy_n *nphy = dev->phy.n; 1170 struct b43_phy_n *nphy = dev->phy.n;
1171 struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
1172
1173 /* PHY rev 0, 1, 2 */
899 u8 i, j; 1174 u8 i, j;
900 u8 code; 1175 u8 code;
1176 u16 tmp;
1177 u8 rfseq_events[3] = { 6, 8, 7 };
1178 u8 rfseq_delays[3] = { 10, 30, 1 };
901 1179
902 /* TODO: for PHY >= 3 1180 /* PHY rev >= 3 */
903 s8 *lna1_gain, *lna2_gain; 1181 bool ghz5;
904 u8 *gain_db, *gain_bits; 1182 bool ext_lna;
905 u16 *rfseq_init; 1183 u16 rssi_gain;
1184 struct nphy_gain_ctl_workaround_entry *e;
906 u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 }; 1185 u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
907 u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 }; 1186 u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
908 */
909
910 u8 rfseq_events[3] = { 6, 8, 7 };
911 u8 rfseq_delays[3] = { 10, 30, 1 };
912 1187
913 if (dev->phy.rev >= 3) { 1188 if (dev->phy.rev >= 3) {
914 /* TODO */ 1189 /* Prepare values */
1190 ghz5 = b43_phy_read(dev, B43_NPHY_BANDCTL)
1191 & B43_NPHY_BANDCTL_5GHZ;
1192 ext_lna = sprom->boardflags_lo & B43_BFL_EXTLNA;
1193 e = b43_nphy_get_gain_ctl_workaround_ent(dev, ghz5, ext_lna);
1194 if (ghz5 && dev->phy.rev >= 5)
1195 rssi_gain = 0x90;
1196 else
1197 rssi_gain = 0x50;
1198
1199 b43_phy_set(dev, B43_NPHY_RXCTL, 0x0040);
1200
1201 /* Set Clip 2 detect */
1202 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
1203 B43_NPHY_C1_CGAINI_CL2DETECT);
1204 b43_phy_set(dev, B43_NPHY_C2_CGAINI,
1205 B43_NPHY_C2_CGAINI_CL2DETECT);
1206
1207 b43_radio_write(dev, B2056_RX0 | B2056_RX_BIASPOLE_LNAG1_IDAC,
1208 0x17);
1209 b43_radio_write(dev, B2056_RX1 | B2056_RX_BIASPOLE_LNAG1_IDAC,
1210 0x17);
1211 b43_radio_write(dev, B2056_RX0 | B2056_RX_LNAG2_IDAC, 0xF0);
1212 b43_radio_write(dev, B2056_RX1 | B2056_RX_LNAG2_IDAC, 0xF0);
1213 b43_radio_write(dev, B2056_RX0 | B2056_RX_RSSI_POLE, 0x00);
1214 b43_radio_write(dev, B2056_RX1 | B2056_RX_RSSI_POLE, 0x00);
1215 b43_radio_write(dev, B2056_RX0 | B2056_RX_RSSI_GAIN,
1216 rssi_gain);
1217 b43_radio_write(dev, B2056_RX1 | B2056_RX_RSSI_GAIN,
1218 rssi_gain);
1219 b43_radio_write(dev, B2056_RX0 | B2056_RX_BIASPOLE_LNAA1_IDAC,
1220 0x17);
1221 b43_radio_write(dev, B2056_RX1 | B2056_RX_BIASPOLE_LNAA1_IDAC,
1222 0x17);
1223 b43_radio_write(dev, B2056_RX0 | B2056_RX_LNAA2_IDAC, 0xFF);
1224 b43_radio_write(dev, B2056_RX1 | B2056_RX_LNAA2_IDAC, 0xFF);
1225
1226 b43_ntab_write_bulk(dev, B43_NTAB8(0, 8), 4, e->lna1_gain);
1227 b43_ntab_write_bulk(dev, B43_NTAB8(1, 8), 4, e->lna1_gain);
1228 b43_ntab_write_bulk(dev, B43_NTAB8(0, 16), 4, e->lna2_gain);
1229 b43_ntab_write_bulk(dev, B43_NTAB8(1, 16), 4, e->lna2_gain);
1230 b43_ntab_write_bulk(dev, B43_NTAB8(0, 32), 10, e->gain_db);
1231 b43_ntab_write_bulk(dev, B43_NTAB8(1, 32), 10, e->gain_db);
1232 b43_ntab_write_bulk(dev, B43_NTAB8(2, 32), 10, e->gain_bits);
1233 b43_ntab_write_bulk(dev, B43_NTAB8(3, 32), 10, e->gain_bits);
1234 b43_ntab_write_bulk(dev, B43_NTAB8(0, 0x40), 6, lpf_gain);
1235 b43_ntab_write_bulk(dev, B43_NTAB8(1, 0x40), 6, lpf_gain);
1236 b43_ntab_write_bulk(dev, B43_NTAB8(2, 0x40), 6, lpf_bits);
1237 b43_ntab_write_bulk(dev, B43_NTAB8(3, 0x40), 6, lpf_bits);
1238
1239 b43_phy_write(dev, B43_NPHY_C1_INITGAIN, e->init_gain);
1240 b43_phy_write(dev, 0x2A7, e->init_gain);
1241 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x106), 2,
1242 e->rfseq_init);
1243 b43_phy_write(dev, B43_NPHY_C1_INITGAIN, e->init_gain);
1244
1245 /* TODO: check defines. Do not match variables names */
1246 b43_phy_write(dev, B43_NPHY_C1_CLIP1_MEDGAIN, e->cliphi_gain);
1247 b43_phy_write(dev, 0x2A9, e->cliphi_gain);
1248 b43_phy_write(dev, B43_NPHY_C1_CLIP2_GAIN, e->clipmd_gain);
1249 b43_phy_write(dev, 0x2AB, e->clipmd_gain);
1250 b43_phy_write(dev, B43_NPHY_C2_CLIP1_HIGAIN, e->cliplo_gain);
1251 b43_phy_write(dev, 0x2AD, e->cliplo_gain);
1252
1253 b43_phy_maskset(dev, 0x27D, 0xFF00, e->crsmin);
1254 b43_phy_maskset(dev, 0x280, 0xFF00, e->crsminl);
1255 b43_phy_maskset(dev, 0x283, 0xFF00, e->crsminu);
1256 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, e->nbclip);
1257 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, e->nbclip);
1258 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
1259 ~B43_NPHY_C1_CLIPWBTHRES_CLIP2, e->wlclip);
1260 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
1261 ~B43_NPHY_C2_CLIPWBTHRES_CLIP2, e->wlclip);
1262 b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
915 } else { 1263 } else {
916 /* Set Clip 2 detect */ 1264 /* Set Clip 2 detect */
917 b43_phy_set(dev, B43_NPHY_C1_CGAINI, 1265 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
@@ -920,15 +1268,15 @@ static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev)
920 B43_NPHY_C2_CGAINI_CL2DETECT); 1268 B43_NPHY_C2_CGAINI_CL2DETECT);
921 1269
922 /* Set narrowband clip threshold */ 1270 /* Set narrowband clip threshold */
923 b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84); 1271 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
924 b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84); 1272 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
925 1273
926 if (!dev->phy.is_40mhz) { 1274 if (!dev->phy.is_40mhz) {
927 /* Set dwell lengths */ 1275 /* Set dwell lengths */
928 b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B); 1276 b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
929 b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B); 1277 b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
930 b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009); 1278 b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
931 b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009); 1279 b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
932 } 1280 }
933 1281
934 /* Set wideband clip 2 threshold */ 1282 /* Set wideband clip 2 threshold */
@@ -950,7 +1298,7 @@ static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev)
950 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1); 1298 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
951 } 1299 }
952 1300
953 b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C); 1301 b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
954 1302
955 if (nphy->gain_boost) { 1303 if (nphy->gain_boost) {
956 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ && 1304 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
@@ -971,10 +1319,10 @@ static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev)
971 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT); 1319 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
972 1320
973 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); 1321 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
974 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 1322 /* specs say about 2 loops, but wl does 4 */
975 (code << 8 | 0x7C)); 1323 for (i = 0; i < 4; i++)
976 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 1324 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
977 (code << 8 | 0x7C)); 1325 (code << 8 | 0x7C));
978 1326
979 b43_nphy_adjust_lna_gain_table(dev); 1327 b43_nphy_adjust_lna_gain_table(dev);
980 1328
@@ -992,38 +1340,40 @@ static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev)
992 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); 1340 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
993 1341
994 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); 1342 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
995 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 1343 /* specs say about 2 loops, but wl does 4 */
996 (code << 8 | 0x74)); 1344 for (i = 0; i < 4; i++)
997 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 1345 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
998 (code << 8 | 0x74)); 1346 (code << 8 | 0x74));
999 } 1347 }
1000 1348
1001 if (dev->phy.rev == 2) { 1349 if (dev->phy.rev == 2) {
1002 for (i = 0; i < 4; i++) { 1350 for (i = 0; i < 4; i++) {
1003 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 1351 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1004 (0x0400 * i) + 0x0020); 1352 (0x0400 * i) + 0x0020);
1005 for (j = 0; j < 21; j++) 1353 for (j = 0; j < 21; j++) {
1354 tmp = j * (i < 2 ? 3 : 1);
1006 b43_phy_write(dev, 1355 b43_phy_write(dev,
1007 B43_NPHY_TABLE_DATALO, 3 * j); 1356 B43_NPHY_TABLE_DATALO, tmp);
1357 }
1008 } 1358 }
1359 }
1009 1360
1010 b43_nphy_set_rf_sequence(dev, 5, 1361 b43_nphy_set_rf_sequence(dev, 5,
1011 rfseq_events, rfseq_delays, 3); 1362 rfseq_events, rfseq_delays, 3);
1012 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1, 1363 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1,
1013 ~B43_NPHY_OVER_DGAIN_CCKDGECV & 0xFFFF, 1364 ~B43_NPHY_OVER_DGAIN_CCKDGECV & 0xFFFF,
1014 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT); 1365 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT);
1015 1366
1016 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 1367 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1017 b43_phy_maskset(dev, B43_PHY_N(0xC5D), 1368 b43_phy_maskset(dev, B43_PHY_N(0xC5D),
1018 0xFF80, 4); 1369 0xFF80, 4);
1019 }
1020 } 1370 }
1021} 1371}
1022 1372
1023/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */ 1373/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
1024static void b43_nphy_workarounds(struct b43_wldev *dev) 1374static void b43_nphy_workarounds(struct b43_wldev *dev)
1025{ 1375{
1026 struct ssb_bus *bus = dev->dev->bus; 1376 struct ssb_bus *bus = dev->sdev->bus;
1027 struct b43_phy *phy = &dev->phy; 1377 struct b43_phy *phy = &dev->phy;
1028 struct b43_phy_n *nphy = phy->n; 1378 struct b43_phy_n *nphy = phy->n;
1029 1379
@@ -1033,7 +1383,10 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
1033 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 }; 1383 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
1034 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 }; 1384 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
1035 1385
1036 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 1386 u16 tmp16;
1387 u32 tmp32;
1388
1389 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
1037 b43_nphy_classifier(dev, 1, 0); 1390 b43_nphy_classifier(dev, 1, 0);
1038 else 1391 else
1039 b43_nphy_classifier(dev, 1, 1); 1392 b43_nphy_classifier(dev, 1, 1);
@@ -1045,7 +1398,82 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
1045 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2); 1398 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
1046 1399
1047 if (dev->phy.rev >= 3) { 1400 if (dev->phy.rev >= 3) {
1401 tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0));
1402 tmp32 &= 0xffffff;
1403 b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32);
1404
1405 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x0125);
1406 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x01B3);
1407 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x0105);
1408 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x016E);
1409 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0x00CD);
1410 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x0020);
1411
1412 b43_phy_write(dev, B43_NPHY_C2_CLIP1_MEDGAIN, 0x000C);
1413 b43_phy_write(dev, 0x2AE, 0x000C);
1414
1048 /* TODO */ 1415 /* TODO */
1416
1417 tmp16 = (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ?
1418 0x2 : 0x9C40;
1419 b43_phy_write(dev, B43_NPHY_ENDROP_TLEN, tmp16);
1420
1421 b43_phy_maskset(dev, 0x294, 0xF0FF, 0x0700);
1422
1423 b43_ntab_write(dev, B43_NTAB32(16, 3), 0x18D);
1424 b43_ntab_write(dev, B43_NTAB32(16, 127), 0x18D);
1425
1426 b43_nphy_gain_ctrl_workarounds(dev);
1427
1428 b43_ntab_write(dev, B43_NTAB32(8, 0), 2);
1429 b43_ntab_write(dev, B43_NTAB32(8, 16), 2);
1430
1431 /* TODO */
1432
1433 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_MAST_BIAS, 0x00);
1434 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_MAST_BIAS, 0x00);
1435 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_MAIN, 0x06);
1436 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_MAIN, 0x06);
1437 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_AUX, 0x07);
1438 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_AUX, 0x07);
1439 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_LOB_BIAS, 0x88);
1440 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_LOB_BIAS, 0x88);
1441 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
1442 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
1443
1444 /* N PHY WAR TX Chain Update with hw_phytxchain as argument */
1445
1446 if ((bus->sprom.boardflags2_lo & B43_BFL2_APLL_WAR &&
1447 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
1448 (bus->sprom.boardflags2_lo & B43_BFL2_GPLL_WAR &&
1449 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ))
1450 tmp32 = 0x00088888;
1451 else
1452 tmp32 = 0x88888888;
1453 b43_ntab_write(dev, B43_NTAB32(30, 1), tmp32);
1454 b43_ntab_write(dev, B43_NTAB32(30, 2), tmp32);
1455 b43_ntab_write(dev, B43_NTAB32(30, 3), tmp32);
1456
1457 if (dev->phy.rev == 4 &&
1458 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1459 b43_radio_write(dev, B2056_TX0 | B2056_TX_GMBB_IDAC,
1460 0x70);
1461 b43_radio_write(dev, B2056_TX1 | B2056_TX_GMBB_IDAC,
1462 0x70);
1463 }
1464
1465 b43_phy_write(dev, 0x224, 0x039C);
1466 b43_phy_write(dev, 0x225, 0x0357);
1467 b43_phy_write(dev, 0x226, 0x0317);
1468 b43_phy_write(dev, 0x227, 0x02D7);
1469 b43_phy_write(dev, 0x228, 0x039C);
1470 b43_phy_write(dev, 0x229, 0x0357);
1471 b43_phy_write(dev, 0x22A, 0x0317);
1472 b43_phy_write(dev, 0x22B, 0x02D7);
1473 b43_phy_write(dev, 0x22C, 0x039C);
1474 b43_phy_write(dev, 0x22D, 0x0357);
1475 b43_phy_write(dev, 0x22E, 0x0317);
1476 b43_phy_write(dev, 0x22F, 0x02D7);
1049 } else { 1477 } else {
1050 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ && 1478 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
1051 nphy->band5g_pwrgain) { 1479 nphy->band5g_pwrgain) {
@@ -1056,29 +1484,18 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
1056 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8); 1484 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
1057 } 1485 }
1058 1486
1059 /* TODO: convert to b43_ntab_write? */ 1487 b43_ntab_write(dev, B43_NTAB16(8, 0x00), 0x000A);
1060 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2000); 1488 b43_ntab_write(dev, B43_NTAB16(8, 0x10), 0x000A);
1061 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A); 1489 b43_ntab_write(dev, B43_NTAB16(8, 0x02), 0xCDAA);
1062 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2010); 1490 b43_ntab_write(dev, B43_NTAB16(8, 0x12), 0xCDAA);
1063 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1064 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2002);
1065 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1066 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2012);
1067 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1068 1491
1069 if (dev->phy.rev < 2) { 1492 if (dev->phy.rev < 2) {
1070 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2008); 1493 b43_ntab_write(dev, B43_NTAB16(8, 0x08), 0x0000);
1071 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000); 1494 b43_ntab_write(dev, B43_NTAB16(8, 0x18), 0x0000);
1072 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2018); 1495 b43_ntab_write(dev, B43_NTAB16(8, 0x07), 0x7AAB);
1073 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000); 1496 b43_ntab_write(dev, B43_NTAB16(8, 0x17), 0x7AAB);
1074 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2007); 1497 b43_ntab_write(dev, B43_NTAB16(8, 0x06), 0x0800);
1075 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB); 1498 b43_ntab_write(dev, B43_NTAB16(8, 0x16), 0x0800);
1076 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2017);
1077 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1078 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2006);
1079 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1080 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2016);
1081 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1082 } 1499 }
1083 1500
1084 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8); 1501 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
@@ -1094,11 +1511,12 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
1094 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7); 1511 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);
1095 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7); 1512 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);
1096 1513
1097 b43_nphy_gain_crtl_workarounds(dev); 1514 b43_nphy_gain_ctrl_workarounds(dev);
1098 1515
1099 if (dev->phy.rev < 2) { 1516 if (dev->phy.rev < 2) {
1100 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2) 1517 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
1101 ; /*TODO: b43_mhf(dev, 2, 0x0010, 0x0010, 3);*/ 1518 b43_hf_write(dev, b43_hf_read(dev) |
1519 B43_HF_MLADVW);
1102 } else if (dev->phy.rev == 2) { 1520 } else if (dev->phy.rev == 2) {
1103 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0); 1521 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
1104 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0); 1522 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
@@ -1182,7 +1600,7 @@ static u16 b43_nphy_gen_load_samples(struct b43_wldev *dev, u32 freq, u16 max,
1182 len = bw << 1; 1600 len = bw << 1;
1183 } 1601 }
1184 1602
1185 samples = kzalloc(len * sizeof(struct b43_c32), GFP_KERNEL); 1603 samples = kcalloc(len, sizeof(struct b43_c32), GFP_KERNEL);
1186 if (!samples) { 1604 if (!samples) {
1187 b43err(dev->wl, "allocation for samples generation failed\n"); 1605 b43err(dev->wl, "allocation for samples generation failed\n");
1188 return 0; 1606 return 0;
@@ -1571,19 +1989,20 @@ static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
1571 } 1989 }
1572} 1990}
1573 1991
1992/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */
1574static void b43_nphy_bphy_init(struct b43_wldev *dev) 1993static void b43_nphy_bphy_init(struct b43_wldev *dev)
1575{ 1994{
1576 unsigned int i; 1995 unsigned int i;
1577 u16 val; 1996 u16 val;
1578 1997
1579 val = 0x1E1F; 1998 val = 0x1E1F;
1580 for (i = 0; i < 14; i++) { 1999 for (i = 0; i < 16; i++) {
1581 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val); 2000 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
1582 val -= 0x202; 2001 val -= 0x202;
1583 } 2002 }
1584 val = 0x3E3F; 2003 val = 0x3E3F;
1585 for (i = 0; i < 16; i++) { 2004 for (i = 0; i < 16; i++) {
1586 b43_phy_write(dev, B43_PHY_N_BMODE(0x97 + i), val); 2005 b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);
1587 val -= 0x202; 2006 val -= 0x202;
1588 } 2007 }
1589 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); 2008 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
@@ -1591,7 +2010,8 @@ static void b43_nphy_bphy_init(struct b43_wldev *dev)
1591 2010
1592/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */ 2011/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
1593static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale, 2012static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
1594 s8 offset, u8 core, u8 rail, u8 type) 2013 s8 offset, u8 core, u8 rail,
2014 enum b43_nphy_rssi_type type)
1595{ 2015{
1596 u16 tmp; 2016 u16 tmp;
1597 bool core1or5 = (core == 1) || (core == 5); 2017 bool core1or5 = (core == 1) || (core == 5);
@@ -1600,53 +2020,59 @@ static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
1600 offset = clamp_val(offset, -32, 31); 2020 offset = clamp_val(offset, -32, 31);
1601 tmp = ((scale & 0x3F) << 8) | (offset & 0x3F); 2021 tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
1602 2022
1603 if (core1or5 && (rail == 0) && (type == 2)) 2023 if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
1604 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp); 2024 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
1605 if (core1or5 && (rail == 1) && (type == 2)) 2025 if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
1606 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp); 2026 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
1607 if (core2or5 && (rail == 0) && (type == 2)) 2027 if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Z))
1608 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp); 2028 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
1609 if (core2or5 && (rail == 1) && (type == 2)) 2029 if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Z))
1610 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp); 2030 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
1611 if (core1or5 && (rail == 0) && (type == 0)) 2031
2032 if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
1612 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp); 2033 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
1613 if (core1or5 && (rail == 1) && (type == 0)) 2034 if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
1614 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp); 2035 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
1615 if (core2or5 && (rail == 0) && (type == 0)) 2036 if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_X))
1616 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp); 2037 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
1617 if (core2or5 && (rail == 1) && (type == 0)) 2038 if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_X))
1618 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp); 2039 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
1619 if (core1or5 && (rail == 0) && (type == 1)) 2040
2041 if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
1620 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp); 2042 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
1621 if (core1or5 && (rail == 1) && (type == 1)) 2043 if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
1622 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp); 2044 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
1623 if (core2or5 && (rail == 0) && (type == 1)) 2045 if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_Y))
1624 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp); 2046 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
1625 if (core2or5 && (rail == 1) && (type == 1)) 2047 if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_Y))
1626 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp); 2048 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
1627 if (core1or5 && (rail == 0) && (type == 6)) 2049
2050 if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
1628 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp); 2051 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
1629 if (core1or5 && (rail == 1) && (type == 6)) 2052 if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
1630 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp); 2053 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
1631 if (core2or5 && (rail == 0) && (type == 6)) 2054 if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_TBD))
1632 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp); 2055 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
1633 if (core2or5 && (rail == 1) && (type == 6)) 2056 if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_TBD))
1634 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp); 2057 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
1635 if (core1or5 && (rail == 0) && (type == 3)) 2058
2059 if (core1or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
1636 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp); 2060 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
1637 if (core1or5 && (rail == 1) && (type == 3)) 2061 if (core1or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
1638 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp); 2062 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
1639 if (core2or5 && (rail == 0) && (type == 3)) 2063 if (core2or5 && (rail == 0) && (type == B43_NPHY_RSSI_PWRDET))
1640 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp); 2064 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
1641 if (core2or5 && (rail == 1) && (type == 3)) 2065 if (core2or5 && (rail == 1) && (type == B43_NPHY_RSSI_PWRDET))
1642 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp); 2066 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
1643 if (core1or5 && (type == 4)) 2067
2068 if (core1or5 && (type == B43_NPHY_RSSI_TSSI_I))
1644 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp); 2069 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
1645 if (core2or5 && (type == 4)) 2070 if (core2or5 && (type == B43_NPHY_RSSI_TSSI_I))
1646 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp); 2071 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
1647 if (core1or5 && (type == 5)) 2072
2073 if (core1or5 && (type == B43_NPHY_RSSI_TSSI_Q))
1648 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp); 2074 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
1649 if (core2or5 && (type == 5)) 2075 if (core2or5 && (type == B43_NPHY_RSSI_TSSI_Q))
1650 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp); 2076 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
1651} 2077}
1652 2078
@@ -1674,27 +2100,39 @@ static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1674 (type + 1) << 4); 2100 (type + 1) << 4);
1675 } 2101 }
1676 2102
1677 /* TODO use some definitions */
1678 if (code == 0) { 2103 if (code == 0) {
1679 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF, 0); 2104 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x3000);
1680 if (type < 3) { 2105 if (type < 3) {
1681 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFEC7, 0); 2106 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
1682 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xEFDC, 0); 2107 ~(B43_NPHY_RFCTL_CMD_RXEN |
1683 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0); 2108 B43_NPHY_RFCTL_CMD_CORESEL));
2109 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
2110 ~(0x1 << 12 |
2111 0x1 << 5 |
2112 0x1 << 1 |
2113 0x1));
2114 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
2115 ~B43_NPHY_RFCTL_CMD_START);
1684 udelay(20); 2116 udelay(20);
1685 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0); 2117 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);
1686 } 2118 }
1687 } else { 2119 } else {
1688 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF, 2120 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x3000);
1689 0x3000);
1690 if (type < 3) { 2121 if (type < 3) {
1691 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 2122 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
1692 0xFEC7, 0x0180); 2123 ~(B43_NPHY_RFCTL_CMD_RXEN |
1693 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 2124 B43_NPHY_RFCTL_CMD_CORESEL),
1694 0xEFDC, (code << 1 | 0x1021)); 2125 (B43_NPHY_RFCTL_CMD_RXEN |
1695 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0x1); 2126 code << B43_NPHY_RFCTL_CMD_CORESEL_SHIFT));
2127 b43_phy_set(dev, B43_NPHY_RFCTL_OVER,
2128 (0x1 << 12 |
2129 0x1 << 5 |
2130 0x1 << 1 |
2131 0x1));
2132 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
2133 B43_NPHY_RFCTL_CMD_START);
1696 udelay(20); 2134 udelay(20);
1697 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0); 2135 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1);
1698 } 2136 }
1699 } 2137 }
1700} 2138}
@@ -1843,6 +2281,17 @@ static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
1843 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); 2281 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1844 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0); 2282 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0);
1845 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1); 2283 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1);
2284 save_regs_phy[8] = 0;
2285 } else {
2286 save_regs_phy[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
2287 save_regs_phy[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
2288 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2289 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_RFCTL_CMD);
2290 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
2291 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
2292 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
2293 save_regs_phy[7] = 0;
2294 save_regs_phy[8] = 0;
1846 } 2295 }
1847 2296
1848 b43_nphy_rssi_select(dev, 5, type); 2297 b43_nphy_rssi_select(dev, 5, type);
@@ -1886,6 +2335,14 @@ static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
1886 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]); 2335 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]);
1887 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]); 2336 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]);
1888 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]); 2337 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]);
2338 } else {
2339 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[0]);
2340 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[1]);
2341 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[2]);
2342 b43_phy_write(dev, B43_NPHY_RFCTL_CMD, save_regs_phy[3]);
2343 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, save_regs_phy[4]);
2344 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, save_regs_phy[5]);
2345 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, save_regs_phy[6]);
1889 } 2346 }
1890 2347
1891 return out; 2348 return out;
@@ -1900,7 +2357,10 @@ static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
1900 u16 class, override; 2357 u16 class, override;
1901 u8 regs_save_radio[2]; 2358 u8 regs_save_radio[2];
1902 u16 regs_save_phy[2]; 2359 u16 regs_save_phy[2];
2360
1903 s8 offset[4]; 2361 s8 offset[4];
2362 u8 core;
2363 u8 rail;
1904 2364
1905 u16 clip_state[2]; 2365 u16 clip_state[2];
1906 u16 clip_off[2] = { 0xFFFF, 0xFFFF }; 2366 u16 clip_off[2] = { 0xFFFF, 0xFFFF };
@@ -2001,16 +2461,15 @@ static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
2001 if (results_min[i] == 248) 2461 if (results_min[i] == 248)
2002 offset[i] = code - 32; 2462 offset[i] = code - 32;
2003 2463
2004 if (i % 2 == 0) 2464 core = (i / 2) ? 2 : 1;
2005 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 1, 0, 2465 rail = (i % 2) ? 1 : 0;
2006 type); 2466
2007 else 2467 b43_nphy_scale_offset_rssi(dev, 0, offset[i], core, rail,
2008 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 2, 1, 2468 type);
2009 type);
2010 } 2469 }
2011 2470
2012 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]); 2471 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
2013 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]); 2472 b43_radio_maskset(dev, B2055_C2_PD_RSSIMISC, 0xF8, state[1]);
2014 2473
2015 switch (state[2]) { 2474 switch (state[2]) {
2016 case 1: 2475 case 1:
@@ -2048,6 +2507,9 @@ static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
2048 2507
2049 b43_nphy_classifier(dev, 7, class); 2508 b43_nphy_classifier(dev, 7, class);
2050 b43_nphy_write_clip_detection(dev, clip_state); 2509 b43_nphy_write_clip_detection(dev, clip_state);
2510 /* Specs don't say about reset here, but it makes wl and b43 dumps
2511 identical, it really seems wl performs this */
2512 b43_nphy_reset_cca(dev);
2051} 2513}
2052 2514
2053/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */ 2515/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */
@@ -2065,9 +2527,9 @@ static void b43_nphy_rssi_cal(struct b43_wldev *dev)
2065 if (dev->phy.rev >= 3) { 2527 if (dev->phy.rev >= 3) {
2066 b43_nphy_rev3_rssi_cal(dev); 2528 b43_nphy_rev3_rssi_cal(dev);
2067 } else { 2529 } else {
2068 b43_nphy_rev2_rssi_cal(dev, 2); 2530 b43_nphy_rev2_rssi_cal(dev, B43_NPHY_RSSI_Z);
2069 b43_nphy_rev2_rssi_cal(dev, 0); 2531 b43_nphy_rev2_rssi_cal(dev, B43_NPHY_RSSI_X);
2070 b43_nphy_rev2_rssi_cal(dev, 1); 2532 b43_nphy_rev2_rssi_cal(dev, B43_NPHY_RSSI_Y);
2071 } 2533 }
2072} 2534}
2073 2535
@@ -2083,12 +2545,12 @@ static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
2083 u16 *rssical_phy_regs = NULL; 2545 u16 *rssical_phy_regs = NULL;
2084 2546
2085 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 2547 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2086 if (b43_empty_chanspec(&nphy->rssical_chanspec_2G)) 2548 if (!nphy->rssical_chanspec_2G.center_freq)
2087 return; 2549 return;
2088 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G; 2550 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G;
2089 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G; 2551 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G;
2090 } else { 2552 } else {
2091 if (b43_empty_chanspec(&nphy->rssical_chanspec_5G)) 2553 if (!nphy->rssical_chanspec_5G.center_freq)
2092 return; 2554 return;
2093 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G; 2555 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G;
2094 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G; 2556 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G;
@@ -2301,7 +2763,7 @@ static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev)
2301{ 2763{
2302 int i, j; 2764 int i, j;
2303 /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */ 2765 /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */
2304 u16 offset[] = { 0x186, 0x195, 0x2C5 }; 2766 static const u16 offset[] = { 0x186, 0x195, 0x2C5 };
2305 2767
2306 for (i = 0; i < 3; i++) 2768 for (i = 0; i < 3; i++)
2307 for (j = 0; j < 15; j++) 2769 for (j = 0; j < 15; j++)
@@ -2333,7 +2795,7 @@ static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2333 struct nphy_txgains target; 2795 struct nphy_txgains target;
2334 const u32 *table = NULL; 2796 const u32 *table = NULL;
2335 2797
2336 if (nphy->txpwrctrl == 0) { 2798 if (!nphy->txpwrctrl) {
2337 int i; 2799 int i;
2338 2800
2339 if (nphy->hang_avoid) 2801 if (nphy->hang_avoid)
@@ -2544,8 +3006,9 @@ static void b43_nphy_save_cal(struct b43_wldev *dev)
2544 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D); 3006 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D);
2545 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC); 3007 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC);
2546 } 3008 }
2547 *iqcal_chanspec = nphy->radio_chanspec; 3009 iqcal_chanspec->center_freq = dev->phy.channel_freq;
2548 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 8, table); 3010 iqcal_chanspec->channel_type = dev->phy.channel_type;
3011 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 8, table);
2549 3012
2550 if (nphy->hang_avoid) 3013 if (nphy->hang_avoid)
2551 b43_nphy_stay_in_carrier_search(dev, 0); 3014 b43_nphy_stay_in_carrier_search(dev, 0);
@@ -2565,12 +3028,12 @@ static void b43_nphy_restore_cal(struct b43_wldev *dev)
2565 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL; 3028 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2566 3029
2567 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 3030 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2568 if (b43_empty_chanspec(&nphy->iqcal_chanspec_2G)) 3031 if (!nphy->iqcal_chanspec_2G.center_freq)
2569 return; 3032 return;
2570 table = nphy->cal_cache.txcal_coeffs_2G; 3033 table = nphy->cal_cache.txcal_coeffs_2G;
2571 loft = &nphy->cal_cache.txcal_coeffs_2G[5]; 3034 loft = &nphy->cal_cache.txcal_coeffs_2G[5];
2572 } else { 3035 } else {
2573 if (b43_empty_chanspec(&nphy->iqcal_chanspec_5G)) 3036 if (!nphy->iqcal_chanspec_5G.center_freq)
2574 return; 3037 return;
2575 table = nphy->cal_cache.txcal_coeffs_5G; 3038 table = nphy->cal_cache.txcal_coeffs_5G;
2576 loft = &nphy->cal_cache.txcal_coeffs_5G[5]; 3039 loft = &nphy->cal_cache.txcal_coeffs_5G[5];
@@ -2630,7 +3093,7 @@ static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2630 int freq; 3093 int freq;
2631 bool avoid = false; 3094 bool avoid = false;
2632 u8 length; 3095 u8 length;
2633 u16 tmp, core, type, count, max, numb, last, cmd; 3096 u16 tmp, core, type, count, max, numb, last = 0, cmd;
2634 const u16 *table; 3097 const u16 *table;
2635 bool phy6or5x; 3098 bool phy6or5x;
2636 3099
@@ -2815,7 +3278,10 @@ static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2815 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length, 3278 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2816 nphy->txiqlocal_bestc); 3279 nphy->txiqlocal_bestc);
2817 nphy->txiqlocal_coeffsvalid = true; 3280 nphy->txiqlocal_coeffsvalid = true;
2818 nphy->txiqlocal_chanspec = nphy->radio_chanspec; 3281 nphy->txiqlocal_chanspec.center_freq =
3282 dev->phy.channel_freq;
3283 nphy->txiqlocal_chanspec.channel_type =
3284 dev->phy.channel_type;
2819 } else { 3285 } else {
2820 length = 11; 3286 length = 11;
2821 if (dev->phy.rev < 3) 3287 if (dev->phy.rev < 3)
@@ -2851,7 +3317,8 @@ static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev *dev)
2851 bool equal = true; 3317 bool equal = true;
2852 3318
2853 if (!nphy->txiqlocal_coeffsvalid || 3319 if (!nphy->txiqlocal_coeffsvalid ||
2854 b43_eq_chanspecs(&nphy->txiqlocal_chanspec, &nphy->radio_chanspec)) 3320 nphy->txiqlocal_chanspec.center_freq != dev->phy.channel_freq ||
3321 nphy->txiqlocal_chanspec.channel_type != dev->phy.channel_type)
2855 return; 3322 return;
2856 3323
2857 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer); 3324 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
@@ -2885,7 +3352,7 @@ static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev,
2885 u8 rfctl[2]; 3352 u8 rfctl[2];
2886 u8 afectl_core; 3353 u8 afectl_core;
2887 u16 tmp[6]; 3354 u16 tmp[6];
2888 u16 cur_hpf1, cur_hpf2, cur_lna; 3355 u16 uninitialized_var(cur_hpf1), uninitialized_var(cur_hpf2), cur_lna;
2889 u32 real, imag; 3356 u32 real, imag;
2890 enum ieee80211_band band; 3357 enum ieee80211_band band;
2891 3358
@@ -2965,7 +3432,7 @@ static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev,
2965 (2 - i)); 3432 (2 - i));
2966 } 3433 }
2967 3434
2968 for (j = 0; i < 4; j++) { 3435 for (j = 0; j < 4; j++) {
2969 if (j < 3) { 3436 if (j < 3) {
2970 cur_lna = lna[j]; 3437 cur_lna = lna[j];
2971 cur_hpf1 = hpf1[j]; 3438 cur_hpf1 = hpf1[j];
@@ -3073,13 +3540,53 @@ static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
3073 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug); 3540 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
3074} 3541}
3075 3542
3543/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreSetState */
3544static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
3545{
3546 struct b43_phy *phy = &dev->phy;
3547 struct b43_phy_n *nphy = phy->n;
3548 /* u16 buf[16]; it's rev3+ */
3549
3550 nphy->phyrxchain = mask;
3551
3552 if (0 /* FIXME clk */)
3553 return;
3554
3555 b43_mac_suspend(dev);
3556
3557 if (nphy->hang_avoid)
3558 b43_nphy_stay_in_carrier_search(dev, true);
3559
3560 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
3561 (mask & 0x3) << B43_NPHY_RFSEQCA_RXEN_SHIFT);
3562
3563 if ((mask & 0x3) != 0x3) {
3564 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 1);
3565 if (dev->phy.rev >= 3) {
3566 /* TODO */
3567 }
3568 } else {
3569 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 0x1E);
3570 if (dev->phy.rev >= 3) {
3571 /* TODO */
3572 }
3573 }
3574
3575 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
3576
3577 if (nphy->hang_avoid)
3578 b43_nphy_stay_in_carrier_search(dev, false);
3579
3580 b43_mac_enable(dev);
3581}
3582
3076/* 3583/*
3077 * Init N-PHY 3584 * Init N-PHY
3078 * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N 3585 * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
3079 */ 3586 */
3080int b43_phy_initn(struct b43_wldev *dev) 3587int b43_phy_initn(struct b43_wldev *dev)
3081{ 3588{
3082 struct ssb_bus *bus = dev->dev->bus; 3589 struct ssb_bus *bus = dev->sdev->bus;
3083 struct b43_phy *phy = &dev->phy; 3590 struct b43_phy *phy = &dev->phy;
3084 struct b43_phy_n *nphy = phy->n; 3591 struct b43_phy_n *nphy = phy->n;
3085 u8 tx_pwr_state; 3592 u8 tx_pwr_state;
@@ -3094,7 +3601,7 @@ int b43_phy_initn(struct b43_wldev *dev)
3094 if ((dev->phy.rev >= 3) && 3601 if ((dev->phy.rev >= 3) &&
3095 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) && 3602 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
3096 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) { 3603 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
3097 chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40); 3604 chipco_set32(&dev->sdev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
3098 } 3605 }
3099 nphy->deaf_count = 0; 3606 nphy->deaf_count = 0;
3100 b43_nphy_tables_init(dev); 3607 b43_nphy_tables_init(dev);
@@ -3173,7 +3680,7 @@ int b43_phy_initn(struct b43_wldev *dev)
3173 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA); 3680 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
3174 b43_nphy_bmac_clock_fgc(dev, 0); 3681 b43_nphy_bmac_clock_fgc(dev, 0);
3175 3682
3176 /* TODO N PHY MAC PHY Clock Set with argument 1 */ 3683 b43_mac_phy_clock_set(dev, true);
3177 3684
3178 b43_nphy_pa_override(dev, false); 3685 b43_nphy_pa_override(dev, false);
3179 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX); 3686 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
@@ -3182,10 +3689,12 @@ int b43_phy_initn(struct b43_wldev *dev)
3182 3689
3183 b43_nphy_classifier(dev, 0, 0); 3690 b43_nphy_classifier(dev, 0, 0);
3184 b43_nphy_read_clip_detection(dev, clip); 3691 b43_nphy_read_clip_detection(dev, clip);
3692 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3693 b43_nphy_bphy_init(dev);
3694
3185 tx_pwr_state = nphy->txpwrctrl; 3695 tx_pwr_state = nphy->txpwrctrl;
3186 /* TODO N PHY TX power control with argument 0 3696 b43_nphy_tx_power_ctrl(dev, false);
3187 (turning off power control) */ 3697 b43_nphy_tx_power_fix(dev);
3188 /* TODO Fix the TX Power Settings */
3189 /* TODO N PHY TX Power Control Idle TSSI */ 3698 /* TODO N PHY TX Power Control Idle TSSI */
3190 /* TODO N PHY TX Power Control Setup */ 3699 /* TODO N PHY TX Power Control Setup */
3191 3700
@@ -3199,18 +3708,16 @@ int b43_phy_initn(struct b43_wldev *dev)
3199 } 3708 }
3200 3709
3201 if (nphy->phyrxchain != 3) 3710 if (nphy->phyrxchain != 3)
3202 ;/* TODO N PHY RX Core Set State with phyrxchain as argument */ 3711 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain);
3203 if (nphy->mphase_cal_phase_id > 0) 3712 if (nphy->mphase_cal_phase_id > 0)
3204 ;/* TODO PHY Periodic Calibration Multi-Phase Restart */ 3713 ;/* TODO PHY Periodic Calibration Multi-Phase Restart */
3205 3714
3206 do_rssi_cal = false; 3715 do_rssi_cal = false;
3207 if (phy->rev >= 3) { 3716 if (phy->rev >= 3) {
3208 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 3717 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3209 do_rssi_cal = 3718 do_rssi_cal = !nphy->rssical_chanspec_2G.center_freq;
3210 b43_empty_chanspec(&nphy->rssical_chanspec_2G);
3211 else 3719 else
3212 do_rssi_cal = 3720 do_rssi_cal = !nphy->rssical_chanspec_5G.center_freq;
3213 b43_empty_chanspec(&nphy->rssical_chanspec_5G);
3214 3721
3215 if (do_rssi_cal) 3722 if (do_rssi_cal)
3216 b43_nphy_rssi_cal(dev); 3723 b43_nphy_rssi_cal(dev);
@@ -3222,9 +3729,9 @@ int b43_phy_initn(struct b43_wldev *dev)
3222 3729
3223 if (!((nphy->measure_hold & 0x6) != 0)) { 3730 if (!((nphy->measure_hold & 0x6) != 0)) {
3224 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 3731 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3225 do_cal = b43_empty_chanspec(&nphy->iqcal_chanspec_2G); 3732 do_cal = !nphy->iqcal_chanspec_2G.center_freq;
3226 else 3733 else
3227 do_cal = b43_empty_chanspec(&nphy->iqcal_chanspec_5G); 3734 do_cal = !nphy->iqcal_chanspec_5G.center_freq;
3228 3735
3229 if (nphy->mute) 3736 if (nphy->mute)
3230 do_cal = false; 3737 do_cal = false;
@@ -3244,21 +3751,18 @@ int b43_phy_initn(struct b43_wldev *dev)
3244 /* TODO N PHY Pre Calibrate TX Gain */ 3751 /* TODO N PHY Pre Calibrate TX Gain */
3245 target = b43_nphy_get_tx_gains(dev); 3752 target = b43_nphy_get_tx_gains(dev);
3246 } 3753 }
3247 } 3754 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false))
3755 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0)
3756 b43_nphy_save_cal(dev);
3757 } else if (nphy->mphase_cal_phase_id == 0)
3758 ;/* N PHY Periodic Calibration with arg 3 */
3759 } else {
3760 b43_nphy_restore_cal(dev);
3248 } 3761 }
3249 } 3762 }
3250 3763
3251 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false)) {
3252 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0)
3253 b43_nphy_save_cal(dev);
3254 else if (nphy->mphase_cal_phase_id == 0)
3255 ;/* N PHY Periodic Calibration with argument 3 */
3256 } else {
3257 b43_nphy_restore_cal(dev);
3258 }
3259
3260 b43_nphy_tx_pwr_ctrl_coef_setup(dev); 3764 b43_nphy_tx_pwr_ctrl_coef_setup(dev);
3261 /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */ 3765 b43_nphy_tx_power_ctrl(dev, tx_pwr_state);
3262 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015); 3766 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
3263 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320); 3767 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
3264 if (phy->rev >= 3 && phy->rev <= 6) 3768 if (phy->rev >= 3 && phy->rev <= 6)
@@ -3267,29 +3771,29 @@ int b43_phy_initn(struct b43_wldev *dev)
3267 if (phy->rev >= 3) 3771 if (phy->rev >= 3)
3268 b43_nphy_spur_workaround(dev); 3772 b43_nphy_spur_workaround(dev);
3269 3773
3270 b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
3271 return 0; 3774 return 0;
3272} 3775}
3273 3776
3274/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */ 3777/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */
3275static void b43_nphy_chanspec_setup(struct b43_wldev *dev, 3778static void b43_nphy_channel_setup(struct b43_wldev *dev,
3276 const struct b43_phy_n_sfo_cfg *e, 3779 const struct b43_phy_n_sfo_cfg *e,
3277 struct b43_chanspec chanspec) 3780 struct ieee80211_channel *new_channel)
3278{ 3781{
3279 struct b43_phy *phy = &dev->phy; 3782 struct b43_phy *phy = &dev->phy;
3280 struct b43_phy_n *nphy = dev->phy.n; 3783 struct b43_phy_n *nphy = dev->phy.n;
3281 3784
3282 u16 tmp; 3785 u16 old_band_5ghz;
3283 u32 tmp32; 3786 u32 tmp32;
3284 3787
3285 tmp = b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ; 3788 old_band_5ghz =
3286 if (chanspec.b_freq == 1 && tmp == 0) { 3789 b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ;
3790 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
3287 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR); 3791 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3288 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4); 3792 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
3289 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000); 3793 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000);
3290 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32); 3794 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3291 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ); 3795 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
3292 } else if (chanspec.b_freq == 1) { 3796 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
3293 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ); 3797 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
3294 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR); 3798 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3295 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4); 3799 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
@@ -3299,23 +3803,16 @@ static void b43_nphy_chanspec_setup(struct b43_wldev *dev,
3299 3803
3300 b43_chantab_phy_upload(dev, e); 3804 b43_chantab_phy_upload(dev, e);
3301 3805
3302 tmp = chanspec.channel; 3806 if (new_channel->hw_value == 14) {
3303 if (chanspec.b_freq == 1)
3304 tmp |= 0x0100;
3305 if (chanspec.b_width == 3)
3306 tmp |= 0x0200;
3307 b43_shm_write16(dev, B43_SHM_SHARED, 0xA0, tmp);
3308
3309 if (nphy->radio_chanspec.channel == 14) {
3310 b43_nphy_classifier(dev, 2, 0); 3807 b43_nphy_classifier(dev, 2, 0);
3311 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800); 3808 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800);
3312 } else { 3809 } else {
3313 b43_nphy_classifier(dev, 2, 2); 3810 b43_nphy_classifier(dev, 2, 2);
3314 if (chanspec.b_freq == 2) 3811 if (new_channel->band == IEEE80211_BAND_2GHZ)
3315 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840); 3812 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
3316 } 3813 }
3317 3814
3318 if (nphy->txpwrctrl) 3815 if (!nphy->txpwrctrl)
3319 b43_nphy_tx_power_fix(dev); 3816 b43_nphy_tx_power_fix(dev);
3320 3817
3321 if (dev->phy.rev < 3) 3818 if (dev->phy.rev < 3)
@@ -3334,70 +3831,60 @@ static void b43_nphy_chanspec_setup(struct b43_wldev *dev,
3334} 3831}
3335 3832
3336/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */ 3833/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */
3337static int b43_nphy_set_chanspec(struct b43_wldev *dev, 3834static int b43_nphy_set_channel(struct b43_wldev *dev,
3338 struct b43_chanspec chanspec) 3835 struct ieee80211_channel *channel,
3836 enum nl80211_channel_type channel_type)
3339{ 3837{
3340 struct b43_phy_n *nphy = dev->phy.n; 3838 struct b43_phy *phy = &dev->phy;
3341 3839
3342 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2; 3840 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2 = NULL;
3343 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3; 3841 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3 = NULL;
3344 3842
3345 u8 tmp; 3843 u8 tmp;
3346 u8 channel = chanspec.channel;
3347 3844
3348 if (dev->phy.rev >= 3) { 3845 if (dev->phy.rev >= 3) {
3349 /* TODO */ 3846 tabent_r3 = b43_nphy_get_chantabent_rev3(dev,
3350 tabent_r3 = NULL; 3847 channel->center_freq);
3351 if (!tabent_r3) 3848 if (!tabent_r3)
3352 return -ESRCH; 3849 return -ESRCH;
3353 } else { 3850 } else {
3354 tabent_r2 = b43_nphy_get_chantabent_rev2(dev, channel); 3851 tabent_r2 = b43_nphy_get_chantabent_rev2(dev,
3852 channel->hw_value);
3355 if (!tabent_r2) 3853 if (!tabent_r2)
3356 return -ESRCH; 3854 return -ESRCH;
3357 } 3855 }
3358 3856
3359 nphy->radio_chanspec = chanspec; 3857 /* Channel is set later in common code, but we need to set it on our
3858 own to let this function's subcalls work properly. */
3859 phy->channel = channel->hw_value;
3860 phy->channel_freq = channel->center_freq;
3360 3861
3361 if (chanspec.b_width != nphy->b_width) 3862 if (b43_channel_type_is_40mhz(phy->channel_type) !=
3362 ; /* TODO: BMAC BW Set (chanspec.b_width) */ 3863 b43_channel_type_is_40mhz(channel_type))
3864 ; /* TODO: BMAC BW Set (channel_type) */
3363 3865
3364 /* TODO: use defines */ 3866 if (channel_type == NL80211_CHAN_HT40PLUS)
3365 if (chanspec.b_width == 3) { 3867 b43_phy_set(dev, B43_NPHY_RXCTL,
3366 if (chanspec.sideband == 2) 3868 B43_NPHY_RXCTL_BSELU20);
3367 b43_phy_set(dev, B43_NPHY_RXCTL, 3869 else if (channel_type == NL80211_CHAN_HT40MINUS)
3368 B43_NPHY_RXCTL_BSELU20); 3870 b43_phy_mask(dev, B43_NPHY_RXCTL,
3369 else 3871 ~B43_NPHY_RXCTL_BSELU20);
3370 b43_phy_mask(dev, B43_NPHY_RXCTL,
3371 ~B43_NPHY_RXCTL_BSELU20);
3372 }
3373 3872
3374 if (dev->phy.rev >= 3) { 3873 if (dev->phy.rev >= 3) {
3375 tmp = (chanspec.b_freq == 1) ? 4 : 0; 3874 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 4 : 0;
3376 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp); 3875 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp);
3377 /* TODO: PHY Radio2056 Setup (dev, tabent_r3); */ 3876 b43_radio_2056_setup(dev, tabent_r3);
3378 b43_nphy_chanspec_setup(dev, &(tabent_r3->phy_regs), chanspec); 3877 b43_nphy_channel_setup(dev, &(tabent_r3->phy_regs), channel);
3379 } else { 3878 } else {
3380 tmp = (chanspec.b_freq == 1) ? 0x0020 : 0x0050; 3879 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 0x0020 : 0x0050;
3381 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp); 3880 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp);
3382 b43_radio_2055_setup(dev, tabent_r2); 3881 b43_radio_2055_setup(dev, tabent_r2);
3383 b43_nphy_chanspec_setup(dev, &(tabent_r2->phy_regs), chanspec); 3882 b43_nphy_channel_setup(dev, &(tabent_r2->phy_regs), channel);
3384 } 3883 }
3385 3884
3386 return 0; 3885 return 0;
3387} 3886}
3388 3887
3389/* Tune the hardware to a new channel */
3390static int nphy_channel_switch(struct b43_wldev *dev, unsigned int channel)
3391{
3392 struct b43_phy_n *nphy = dev->phy.n;
3393
3394 struct b43_chanspec chanspec;
3395 chanspec = nphy->radio_chanspec;
3396 chanspec.channel = channel;
3397
3398 return b43_nphy_set_chanspec(dev, chanspec);
3399}
3400
3401static int b43_nphy_op_allocate(struct b43_wldev *dev) 3888static int b43_nphy_op_allocate(struct b43_wldev *dev)
3402{ 3889{
3403 struct b43_phy_n *nphy; 3890 struct b43_phy_n *nphy;
@@ -3417,7 +3904,11 @@ static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
3417 3904
3418 memset(nphy, 0, sizeof(*nphy)); 3905 memset(nphy, 0, sizeof(*nphy));
3419 3906
3420 //TODO init struct b43_phy_n 3907 nphy->hang_avoid = (phy->rev == 3 || phy->rev == 4);
3908 nphy->gain_boost = true; /* this way we follow wl, assume it is true */
3909 nphy->txrx_chain = 2; /* sth different than 0 and 1 for now */
3910 nphy->phyrxchain = 3; /* to avoid b43_nphy_set_rx_core_state like wl */
3911 nphy->perical = 2; /* avoid additional rssi cal on init (like wl) */
3421} 3912}
3422 3913
3423static void b43_nphy_op_free(struct b43_wldev *dev) 3914static void b43_nphy_op_free(struct b43_wldev *dev)
@@ -3466,6 +3957,15 @@ static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
3466 b43_write16(dev, B43_MMIO_PHY_DATA, value); 3957 b43_write16(dev, B43_MMIO_PHY_DATA, value);
3467} 3958}
3468 3959
3960static void b43_nphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
3961 u16 set)
3962{
3963 check_phyreg(dev, reg);
3964 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3965 b43_write16(dev, B43_MMIO_PHY_DATA,
3966 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
3967}
3968
3469static u16 b43_nphy_op_radio_read(struct b43_wldev *dev, u16 reg) 3969static u16 b43_nphy_op_radio_read(struct b43_wldev *dev, u16 reg)
3470{ 3970{
3471 /* Register 1 is a 32-bit register. */ 3971 /* Register 1 is a 32-bit register. */
@@ -3490,8 +3990,6 @@ static void b43_nphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
3490static void b43_nphy_op_software_rfkill(struct b43_wldev *dev, 3990static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
3491 bool blocked) 3991 bool blocked)
3492{ 3992{
3493 struct b43_phy_n *nphy = dev->phy.n;
3494
3495 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) 3993 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
3496 b43err(dev->wl, "MAC not suspended\n"); 3994 b43err(dev->wl, "MAC not suspended\n");
3497 3995
@@ -3518,22 +4016,29 @@ static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
3518 } else { 4016 } else {
3519 if (dev->phy.rev >= 3) { 4017 if (dev->phy.rev >= 3) {
3520 b43_radio_init2056(dev); 4018 b43_radio_init2056(dev);
3521 b43_nphy_set_chanspec(dev, nphy->radio_chanspec); 4019 b43_switch_channel(dev, dev->phy.channel);
3522 } else { 4020 } else {
3523 b43_radio_init2055(dev); 4021 b43_radio_init2055(dev);
3524 } 4022 }
3525 } 4023 }
3526} 4024}
3527 4025
4026/* http://bcm-v4.sipsolutions.net/802.11/PHY/Anacore */
3528static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on) 4027static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
3529{ 4028{
3530 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 4029 u16 val = on ? 0 : 0x7FFF;
3531 on ? 0 : 0x7FFF); 4030
4031 if (dev->phy.rev >= 3)
4032 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, val);
4033 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, val);
3532} 4034}
3533 4035
3534static int b43_nphy_op_switch_channel(struct b43_wldev *dev, 4036static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3535 unsigned int new_channel) 4037 unsigned int new_channel)
3536{ 4038{
4039 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
4040 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
4041
3537 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 4042 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
3538 if ((new_channel < 1) || (new_channel > 14)) 4043 if ((new_channel < 1) || (new_channel > 14))
3539 return -EINVAL; 4044 return -EINVAL;
@@ -3542,7 +4047,7 @@ static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3542 return -EINVAL; 4047 return -EINVAL;
3543 } 4048 }
3544 4049
3545 return nphy_channel_switch(dev, new_channel); 4050 return b43_nphy_set_channel(dev, channel, channel_type);
3546} 4051}
3547 4052
3548static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev) 4053static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev)
@@ -3559,6 +4064,7 @@ const struct b43_phy_operations b43_phyops_n = {
3559 .init = b43_nphy_op_init, 4064 .init = b43_nphy_op_init,
3560 .phy_read = b43_nphy_op_read, 4065 .phy_read = b43_nphy_op_read,
3561 .phy_write = b43_nphy_op_write, 4066 .phy_write = b43_nphy_op_write,
4067 .phy_maskset = b43_nphy_op_maskset,
3562 .radio_read = b43_nphy_op_radio_read, 4068 .radio_read = b43_nphy_op_radio_read,
3563 .radio_write = b43_nphy_op_radio_write, 4069 .radio_write = b43_nphy_op_radio_write,
3564 .software_rfkill = b43_nphy_op_software_rfkill, 4070 .software_rfkill = b43_nphy_op_software_rfkill,
diff --git a/drivers/net/wireless/b43/phy_n.h b/drivers/net/wireless/b43/phy_n.h
index 8b6d570dd0aa..e789a89f1047 100644
--- a/drivers/net/wireless/b43/phy_n.h
+++ b/drivers/net/wireless/b43/phy_n.h
@@ -703,7 +703,7 @@
703#define B43_NPHY_CHAN_ESTHANG B43_PHY_N(0x21D) /* Channel estimate hang */ 703#define B43_NPHY_CHAN_ESTHANG B43_PHY_N(0x21D) /* Channel estimate hang */
704#define B43_NPHY_FINERX2_CGC B43_PHY_N(0x221) /* Fine RX 2 clock gate control */ 704#define B43_NPHY_FINERX2_CGC B43_PHY_N(0x221) /* Fine RX 2 clock gate control */
705#define B43_NPHY_FINERX2_CGC_DECGC 0x0008 /* Decode gated clocks */ 705#define B43_NPHY_FINERX2_CGC_DECGC 0x0008 /* Decode gated clocks */
706#define B43_NPHY_TXPCTL_INIT B43_PHY_N(0x222) /* TX power controll init */ 706#define B43_NPHY_TXPCTL_INIT B43_PHY_N(0x222) /* TX power control init */
707#define B43_NPHY_TXPCTL_INIT_PIDXI1 0x00FF /* Power index init 1 */ 707#define B43_NPHY_TXPCTL_INIT_PIDXI1 0x00FF /* Power index init 1 */
708#define B43_NPHY_TXPCTL_INIT_PIDXI1_SHIFT 0 708#define B43_NPHY_TXPCTL_INIT_PIDXI1_SHIFT 0
709#define B43_NPHY_PAPD_EN0 B43_PHY_N(0x297) /* PAPD Enable0 TBD */ 709#define B43_NPHY_PAPD_EN0 B43_PHY_N(0x297) /* PAPD Enable0 TBD */
@@ -714,223 +714,11 @@
714#define B43_PHY_B_BBCFG B43_PHY_N_BMODE(0x001) /* BB config */ 714#define B43_PHY_B_BBCFG B43_PHY_N_BMODE(0x001) /* BB config */
715#define B43_PHY_B_TEST B43_PHY_N_BMODE(0x00A) 715#define B43_PHY_B_TEST B43_PHY_N_BMODE(0x00A)
716 716
717
718/* Broadcom 2055 radio registers */
719
720#define B2055_GEN_SPARE 0x00 /* GEN spare */
721#define B2055_SP_PINPD 0x02 /* SP PIN PD */
722#define B2055_C1_SP_RSSI 0x03 /* SP RSSI Core 1 */
723#define B2055_C1_SP_PDMISC 0x04 /* SP PD MISC Core 1 */
724#define B2055_C2_SP_RSSI 0x05 /* SP RSSI Core 2 */
725#define B2055_C2_SP_PDMISC 0x06 /* SP PD MISC Core 2 */
726#define B2055_C1_SP_RXGC1 0x07 /* SP RX GC1 Core 1 */
727#define B2055_C1_SP_RXGC2 0x08 /* SP RX GC2 Core 1 */
728#define B2055_C2_SP_RXGC1 0x09 /* SP RX GC1 Core 2 */
729#define B2055_C2_SP_RXGC2 0x0A /* SP RX GC2 Core 2 */
730#define B2055_C1_SP_LPFBWSEL 0x0B /* SP LPF BW select Core 1 */
731#define B2055_C2_SP_LPFBWSEL 0x0C /* SP LPF BW select Core 2 */
732#define B2055_C1_SP_TXGC1 0x0D /* SP TX GC1 Core 1 */
733#define B2055_C1_SP_TXGC2 0x0E /* SP TX GC2 Core 1 */
734#define B2055_C2_SP_TXGC1 0x0F /* SP TX GC1 Core 2 */
735#define B2055_C2_SP_TXGC2 0x10 /* SP TX GC2 Core 2 */
736#define B2055_MASTER1 0x11 /* Master control 1 */
737#define B2055_MASTER2 0x12 /* Master control 2 */
738#define B2055_PD_LGEN 0x13 /* PD LGEN */
739#define B2055_PD_PLLTS 0x14 /* PD PLL TS */
740#define B2055_C1_PD_LGBUF 0x15 /* PD Core 1 LGBUF */
741#define B2055_C1_PD_TX 0x16 /* PD Core 1 TX */
742#define B2055_C1_PD_RXTX 0x17 /* PD Core 1 RXTX */
743#define B2055_C1_PD_RSSIMISC 0x18 /* PD Core 1 RSSI MISC */
744#define B2055_C2_PD_LGBUF 0x19 /* PD Core 2 LGBUF */
745#define B2055_C2_PD_TX 0x1A /* PD Core 2 TX */
746#define B2055_C2_PD_RXTX 0x1B /* PD Core 2 RXTX */
747#define B2055_C2_PD_RSSIMISC 0x1C /* PD Core 2 RSSI MISC */
748#define B2055_PWRDET_LGEN 0x1D /* PWRDET LGEN */
749#define B2055_C1_PWRDET_LGBUF 0x1E /* PWRDET LGBUF Core 1 */
750#define B2055_C1_PWRDET_RXTX 0x1F /* PWRDET RXTX Core 1 */
751#define B2055_C2_PWRDET_LGBUF 0x20 /* PWRDET LGBUF Core 2 */
752#define B2055_C2_PWRDET_RXTX 0x21 /* PWRDET RXTX Core 2 */
753#define B2055_RRCCAL_CS 0x22 /* RRCCAL Control spare */
754#define B2055_RRCCAL_NOPTSEL 0x23 /* RRCCAL N OPT SEL */
755#define B2055_CAL_MISC 0x24 /* CAL MISC */
756#define B2055_CAL_COUT 0x25 /* CAL Counter out */
757#define B2055_CAL_COUT2 0x26 /* CAL Counter out 2 */
758#define B2055_CAL_CVARCTL 0x27 /* CAL CVAR Control */
759#define B2055_CAL_RVARCTL 0x28 /* CAL RVAR Control */
760#define B2055_CAL_LPOCTL 0x29 /* CAL LPO Control */
761#define B2055_CAL_TS 0x2A /* CAL TS */
762#define B2055_CAL_RCCALRTS 0x2B /* CAL RCCAL READ TS */
763#define B2055_CAL_RCALRTS 0x2C /* CAL RCAL READ TS */
764#define B2055_PADDRV 0x2D /* PAD driver */
765#define B2055_XOCTL1 0x2E /* XO Control 1 */
766#define B2055_XOCTL2 0x2F /* XO Control 2 */
767#define B2055_XOREGUL 0x30 /* XO Regulator */
768#define B2055_XOMISC 0x31 /* XO misc */
769#define B2055_PLL_LFC1 0x32 /* PLL LF C1 */
770#define B2055_PLL_CALVTH 0x33 /* PLL CAL VTH */
771#define B2055_PLL_LFC2 0x34 /* PLL LF C2 */
772#define B2055_PLL_REF 0x35 /* PLL reference */
773#define B2055_PLL_LFR1 0x36 /* PLL LF R1 */
774#define B2055_PLL_PFDCP 0x37 /* PLL PFD CP */
775#define B2055_PLL_IDAC_CPOPAMP 0x38 /* PLL IDAC CPOPAMP */
776#define B2055_PLL_CPREG 0x39 /* PLL CP Regulator */
777#define B2055_PLL_RCAL 0x3A /* PLL RCAL */
778#define B2055_RF_PLLMOD0 0x3B /* RF PLL MOD0 */
779#define B2055_RF_PLLMOD1 0x3C /* RF PLL MOD1 */
780#define B2055_RF_MMDIDAC1 0x3D /* RF MMD IDAC 1 */
781#define B2055_RF_MMDIDAC0 0x3E /* RF MMD IDAC 0 */
782#define B2055_RF_MMDSP 0x3F /* RF MMD spare */
783#define B2055_VCO_CAL1 0x40 /* VCO cal 1 */
784#define B2055_VCO_CAL2 0x41 /* VCO cal 2 */
785#define B2055_VCO_CAL3 0x42 /* VCO cal 3 */
786#define B2055_VCO_CAL4 0x43 /* VCO cal 4 */
787#define B2055_VCO_CAL5 0x44 /* VCO cal 5 */
788#define B2055_VCO_CAL6 0x45 /* VCO cal 6 */
789#define B2055_VCO_CAL7 0x46 /* VCO cal 7 */
790#define B2055_VCO_CAL8 0x47 /* VCO cal 8 */
791#define B2055_VCO_CAL9 0x48 /* VCO cal 9 */
792#define B2055_VCO_CAL10 0x49 /* VCO cal 10 */
793#define B2055_VCO_CAL11 0x4A /* VCO cal 11 */
794#define B2055_VCO_CAL12 0x4B /* VCO cal 12 */
795#define B2055_VCO_CAL13 0x4C /* VCO cal 13 */
796#define B2055_VCO_CAL14 0x4D /* VCO cal 14 */
797#define B2055_VCO_CAL15 0x4E /* VCO cal 15 */
798#define B2055_VCO_CAL16 0x4F /* VCO cal 16 */
799#define B2055_VCO_KVCO 0x50 /* VCO KVCO */
800#define B2055_VCO_CAPTAIL 0x51 /* VCO CAP TAIL */
801#define B2055_VCO_IDACVCO 0x52 /* VCO IDAC VCO */
802#define B2055_VCO_REG 0x53 /* VCO Regulator */
803#define B2055_PLL_RFVTH 0x54 /* PLL RF VTH */
804#define B2055_LGBUF_CENBUF 0x55 /* LGBUF CEN BUF */
805#define B2055_LGEN_TUNE1 0x56 /* LGEN tune 1 */
806#define B2055_LGEN_TUNE2 0x57 /* LGEN tune 2 */
807#define B2055_LGEN_IDAC1 0x58 /* LGEN IDAC 1 */
808#define B2055_LGEN_IDAC2 0x59 /* LGEN IDAC 2 */
809#define B2055_LGEN_BIASC 0x5A /* LGEN BIAS counter */
810#define B2055_LGEN_BIASIDAC 0x5B /* LGEN BIAS IDAC */
811#define B2055_LGEN_RCAL 0x5C /* LGEN RCAL */
812#define B2055_LGEN_DIV 0x5D /* LGEN div */
813#define B2055_LGEN_SPARE2 0x5E /* LGEN spare 2 */
814#define B2055_C1_LGBUF_ATUNE 0x5F /* Core 1 LGBUF A tune */
815#define B2055_C1_LGBUF_GTUNE 0x60 /* Core 1 LGBUF G tune */
816#define B2055_C1_LGBUF_DIV 0x61 /* Core 1 LGBUF div */
817#define B2055_C1_LGBUF_AIDAC 0x62 /* Core 1 LGBUF A IDAC */
818#define B2055_C1_LGBUF_GIDAC 0x63 /* Core 1 LGBUF G IDAC */
819#define B2055_C1_LGBUF_IDACFO 0x64 /* Core 1 LGBUF IDAC filter override */
820#define B2055_C1_LGBUF_SPARE 0x65 /* Core 1 LGBUF spare */
821#define B2055_C1_RX_RFSPC1 0x66 /* Core 1 RX RF SPC1 */
822#define B2055_C1_RX_RFR1 0x67 /* Core 1 RX RF reg 1 */
823#define B2055_C1_RX_RFR2 0x68 /* Core 1 RX RF reg 2 */
824#define B2055_C1_RX_RFRCAL 0x69 /* Core 1 RX RF RCAL */
825#define B2055_C1_RX_BB_BLCMP 0x6A /* Core 1 RX Baseband BUFI LPF CMP */
826#define B2055_C1_RX_BB_LPF 0x6B /* Core 1 RX Baseband LPF */
827#define B2055_C1_RX_BB_MIDACHP 0x6C /* Core 1 RX Baseband MIDAC High-pass */
828#define B2055_C1_RX_BB_VGA1IDAC 0x6D /* Core 1 RX Baseband VGA1 IDAC */
829#define B2055_C1_RX_BB_VGA2IDAC 0x6E /* Core 1 RX Baseband VGA2 IDAC */
830#define B2055_C1_RX_BB_VGA3IDAC 0x6F /* Core 1 RX Baseband VGA3 IDAC */
831#define B2055_C1_RX_BB_BUFOCTL 0x70 /* Core 1 RX Baseband BUFO Control */
832#define B2055_C1_RX_BB_RCCALCTL 0x71 /* Core 1 RX Baseband RCCAL Control */
833#define B2055_C1_RX_BB_RSSICTL1 0x72 /* Core 1 RX Baseband RSSI Control 1 */
834#define B2055_C1_RX_BB_RSSICTL2 0x73 /* Core 1 RX Baseband RSSI Control 2 */
835#define B2055_C1_RX_BB_RSSICTL3 0x74 /* Core 1 RX Baseband RSSI Control 3 */
836#define B2055_C1_RX_BB_RSSICTL4 0x75 /* Core 1 RX Baseband RSSI Control 4 */
837#define B2055_C1_RX_BB_RSSICTL5 0x76 /* Core 1 RX Baseband RSSI Control 5 */
838#define B2055_C1_RX_BB_REG 0x77 /* Core 1 RX Baseband Regulator */
839#define B2055_C1_RX_BB_SPARE1 0x78 /* Core 1 RX Baseband spare 1 */
840#define B2055_C1_RX_TXBBRCAL 0x79 /* Core 1 RX TX BB RCAL */
841#define B2055_C1_TX_RF_SPGA 0x7A /* Core 1 TX RF SGM PGA */
842#define B2055_C1_TX_RF_SPAD 0x7B /* Core 1 TX RF SGM PAD */
843#define B2055_C1_TX_RF_CNTPGA1 0x7C /* Core 1 TX RF counter PGA 1 */
844#define B2055_C1_TX_RF_CNTPAD1 0x7D /* Core 1 TX RF counter PAD 1 */
845#define B2055_C1_TX_RF_PGAIDAC 0x7E /* Core 1 TX RF PGA IDAC */
846#define B2055_C1_TX_PGAPADTN 0x7F /* Core 1 TX PGA PAD TN */
847#define B2055_C1_TX_PADIDAC1 0x80 /* Core 1 TX PAD IDAC 1 */
848#define B2055_C1_TX_PADIDAC2 0x81 /* Core 1 TX PAD IDAC 2 */
849#define B2055_C1_TX_MXBGTRIM 0x82 /* Core 1 TX MX B/G TRIM */
850#define B2055_C1_TX_RF_RCAL 0x83 /* Core 1 TX RF RCAL */
851#define B2055_C1_TX_RF_PADTSSI1 0x84 /* Core 1 TX RF PAD TSSI1 */
852#define B2055_C1_TX_RF_PADTSSI2 0x85 /* Core 1 TX RF PAD TSSI2 */
853#define B2055_C1_TX_RF_SPARE 0x86 /* Core 1 TX RF spare */
854#define B2055_C1_TX_RF_IQCAL1 0x87 /* Core 1 TX RF I/Q CAL 1 */
855#define B2055_C1_TX_RF_IQCAL2 0x88 /* Core 1 TX RF I/Q CAL 2 */
856#define B2055_C1_TXBB_RCCAL 0x89 /* Core 1 TXBB RC CAL Control */
857#define B2055_C1_TXBB_LPF1 0x8A /* Core 1 TXBB LPF 1 */
858#define B2055_C1_TX_VOSCNCL 0x8B /* Core 1 TX VOS CNCL */
859#define B2055_C1_TX_LPF_MXGMIDAC 0x8C /* Core 1 TX LPF MXGM IDAC */
860#define B2055_C1_TX_BB_MXGM 0x8D /* Core 1 TX BB MXGM */
861#define B2055_C2_LGBUF_ATUNE 0x8E /* Core 2 LGBUF A tune */
862#define B2055_C2_LGBUF_GTUNE 0x8F /* Core 2 LGBUF G tune */
863#define B2055_C2_LGBUF_DIV 0x90 /* Core 2 LGBUF div */
864#define B2055_C2_LGBUF_AIDAC 0x91 /* Core 2 LGBUF A IDAC */
865#define B2055_C2_LGBUF_GIDAC 0x92 /* Core 2 LGBUF G IDAC */
866#define B2055_C2_LGBUF_IDACFO 0x93 /* Core 2 LGBUF IDAC filter override */
867#define B2055_C2_LGBUF_SPARE 0x94 /* Core 2 LGBUF spare */
868#define B2055_C2_RX_RFSPC1 0x95 /* Core 2 RX RF SPC1 */
869#define B2055_C2_RX_RFR1 0x96 /* Core 2 RX RF reg 1 */
870#define B2055_C2_RX_RFR2 0x97 /* Core 2 RX RF reg 2 */
871#define B2055_C2_RX_RFRCAL 0x98 /* Core 2 RX RF RCAL */
872#define B2055_C2_RX_BB_BLCMP 0x99 /* Core 2 RX Baseband BUFI LPF CMP */
873#define B2055_C2_RX_BB_LPF 0x9A /* Core 2 RX Baseband LPF */
874#define B2055_C2_RX_BB_MIDACHP 0x9B /* Core 2 RX Baseband MIDAC High-pass */
875#define B2055_C2_RX_BB_VGA1IDAC 0x9C /* Core 2 RX Baseband VGA1 IDAC */
876#define B2055_C2_RX_BB_VGA2IDAC 0x9D /* Core 2 RX Baseband VGA2 IDAC */
877#define B2055_C2_RX_BB_VGA3IDAC 0x9E /* Core 2 RX Baseband VGA3 IDAC */
878#define B2055_C2_RX_BB_BUFOCTL 0x9F /* Core 2 RX Baseband BUFO Control */
879#define B2055_C2_RX_BB_RCCALCTL 0xA0 /* Core 2 RX Baseband RCCAL Control */
880#define B2055_C2_RX_BB_RSSICTL1 0xA1 /* Core 2 RX Baseband RSSI Control 1 */
881#define B2055_C2_RX_BB_RSSICTL2 0xA2 /* Core 2 RX Baseband RSSI Control 2 */
882#define B2055_C2_RX_BB_RSSICTL3 0xA3 /* Core 2 RX Baseband RSSI Control 3 */
883#define B2055_C2_RX_BB_RSSICTL4 0xA4 /* Core 2 RX Baseband RSSI Control 4 */
884#define B2055_C2_RX_BB_RSSICTL5 0xA5 /* Core 2 RX Baseband RSSI Control 5 */
885#define B2055_C2_RX_BB_REG 0xA6 /* Core 2 RX Baseband Regulator */
886#define B2055_C2_RX_BB_SPARE1 0xA7 /* Core 2 RX Baseband spare 1 */
887#define B2055_C2_RX_TXBBRCAL 0xA8 /* Core 2 RX TX BB RCAL */
888#define B2055_C2_TX_RF_SPGA 0xA9 /* Core 2 TX RF SGM PGA */
889#define B2055_C2_TX_RF_SPAD 0xAA /* Core 2 TX RF SGM PAD */
890#define B2055_C2_TX_RF_CNTPGA1 0xAB /* Core 2 TX RF counter PGA 1 */
891#define B2055_C2_TX_RF_CNTPAD1 0xAC /* Core 2 TX RF counter PAD 1 */
892#define B2055_C2_TX_RF_PGAIDAC 0xAD /* Core 2 TX RF PGA IDAC */
893#define B2055_C2_TX_PGAPADTN 0xAE /* Core 2 TX PGA PAD TN */
894#define B2055_C2_TX_PADIDAC1 0xAF /* Core 2 TX PAD IDAC 1 */
895#define B2055_C2_TX_PADIDAC2 0xB0 /* Core 2 TX PAD IDAC 2 */
896#define B2055_C2_TX_MXBGTRIM 0xB1 /* Core 2 TX MX B/G TRIM */
897#define B2055_C2_TX_RF_RCAL 0xB2 /* Core 2 TX RF RCAL */
898#define B2055_C2_TX_RF_PADTSSI1 0xB3 /* Core 2 TX RF PAD TSSI1 */
899#define B2055_C2_TX_RF_PADTSSI2 0xB4 /* Core 2 TX RF PAD TSSI2 */
900#define B2055_C2_TX_RF_SPARE 0xB5 /* Core 2 TX RF spare */
901#define B2055_C2_TX_RF_IQCAL1 0xB6 /* Core 2 TX RF I/Q CAL 1 */
902#define B2055_C2_TX_RF_IQCAL2 0xB7 /* Core 2 TX RF I/Q CAL 2 */
903#define B2055_C2_TXBB_RCCAL 0xB8 /* Core 2 TXBB RC CAL Control */
904#define B2055_C2_TXBB_LPF1 0xB9 /* Core 2 TXBB LPF 1 */
905#define B2055_C2_TX_VOSCNCL 0xBA /* Core 2 TX VOS CNCL */
906#define B2055_C2_TX_LPF_MXGMIDAC 0xBB /* Core 2 TX LPF MXGM IDAC */
907#define B2055_C2_TX_BB_MXGM 0xBC /* Core 2 TX BB MXGM */
908#define B2055_PRG_GCHP21 0xBD /* PRG GC HPVGA23 21 */
909#define B2055_PRG_GCHP22 0xBE /* PRG GC HPVGA23 22 */
910#define B2055_PRG_GCHP23 0xBF /* PRG GC HPVGA23 23 */
911#define B2055_PRG_GCHP24 0xC0 /* PRG GC HPVGA23 24 */
912#define B2055_PRG_GCHP25 0xC1 /* PRG GC HPVGA23 25 */
913#define B2055_PRG_GCHP26 0xC2 /* PRG GC HPVGA23 26 */
914#define B2055_PRG_GCHP27 0xC3 /* PRG GC HPVGA23 27 */
915#define B2055_PRG_GCHP28 0xC4 /* PRG GC HPVGA23 28 */
916#define B2055_PRG_GCHP29 0xC5 /* PRG GC HPVGA23 29 */
917#define B2055_PRG_GCHP30 0xC6 /* PRG GC HPVGA23 30 */
918#define B2055_C1_LNA_GAINBST 0xCD /* Core 1 LNA GAINBST */
919#define B2055_C1_B0NB_RSSIVCM 0xD2 /* Core 1 B0 narrow-band RSSI VCM */
920#define B2055_C1_GENSPARE2 0xD6 /* Core 1 GEN spare 2 */
921#define B2055_C2_LNA_GAINBST 0xD9 /* Core 2 LNA GAINBST */
922#define B2055_C2_B0NB_RSSIVCM 0xDE /* Core 2 B0 narrow-band RSSI VCM */
923#define B2055_C2_GENSPARE2 0xE2 /* Core 2 GEN spare 2 */
924
925
926
927struct b43_wldev; 717struct b43_wldev;
928 718
929struct b43_chanspec { 719struct b43_chanspec {
930 u8 channel; 720 u16 center_freq;
931 u8 sideband; 721 enum nl80211_channel_type channel_type;
932 u8 b_width;
933 u8 b_freq;
934}; 722};
935 723
936struct b43_phy_n_iq_comp { 724struct b43_phy_n_iq_comp {
@@ -984,8 +772,6 @@ struct b43_phy_n {
984 u16 papd_epsilon_offset[2]; 772 u16 papd_epsilon_offset[2];
985 s32 preamble_override; 773 s32 preamble_override;
986 u32 bb_mult_save; 774 u32 bb_mult_save;
987 u8 b_width;
988 struct b43_chanspec radio_chanspec;
989 775
990 bool gain_boost; 776 bool gain_boost;
991 bool elna_gain_config; 777 bool elna_gain_config;
@@ -996,7 +782,7 @@ struct b43_phy_n {
996 u16 mphase_txcal_numcmds; 782 u16 mphase_txcal_numcmds;
997 u16 mphase_txcal_bestcoeffs[11]; 783 u16 mphase_txcal_bestcoeffs[11];
998 784
999 u8 txpwrctrl; 785 bool txpwrctrl;
1000 u16 txcal_bbmult; 786 u16 txcal_bbmult;
1001 u16 txiqlocal_bestc[11]; 787 u16 txiqlocal_bestc[11];
1002 bool txiqlocal_coeffsvalid; 788 bool txiqlocal_coeffsvalid;
diff --git a/drivers/net/wireless/b43/pio.c b/drivers/net/wireless/b43/pio.c
index aa12273ae716..72ab94df7569 100644
--- a/drivers/net/wireless/b43/pio.c
+++ b/drivers/net/wireless/b43/pio.c
@@ -111,7 +111,7 @@ static u16 index_to_pioqueue_base(struct b43_wldev *dev,
111 B43_MMIO_PIO11_BASE5, 111 B43_MMIO_PIO11_BASE5,
112 }; 112 };
113 113
114 if (dev->dev->id.revision >= 11) { 114 if (dev->sdev->id.revision >= 11) {
115 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11)); 115 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
116 return bases_rev11[index]; 116 return bases_rev11[index];
117 } 117 }
@@ -121,14 +121,14 @@ static u16 index_to_pioqueue_base(struct b43_wldev *dev,
121 121
122static u16 pio_txqueue_offset(struct b43_wldev *dev) 122static u16 pio_txqueue_offset(struct b43_wldev *dev)
123{ 123{
124 if (dev->dev->id.revision >= 11) 124 if (dev->sdev->id.revision >= 11)
125 return 0x18; 125 return 0x18;
126 return 0; 126 return 0;
127} 127}
128 128
129static u16 pio_rxqueue_offset(struct b43_wldev *dev) 129static u16 pio_rxqueue_offset(struct b43_wldev *dev)
130{ 130{
131 if (dev->dev->id.revision >= 11) 131 if (dev->sdev->id.revision >= 11)
132 return 0x38; 132 return 0x38;
133 return 8; 133 return 8;
134} 134}
@@ -144,7 +144,7 @@ static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
144 if (!q) 144 if (!q)
145 return NULL; 145 return NULL;
146 q->dev = dev; 146 q->dev = dev;
147 q->rev = dev->dev->id.revision; 147 q->rev = dev->sdev->id.revision;
148 q->mmio_base = index_to_pioqueue_base(dev, index) + 148 q->mmio_base = index_to_pioqueue_base(dev, index) +
149 pio_txqueue_offset(dev); 149 pio_txqueue_offset(dev);
150 q->index = index; 150 q->index = index;
@@ -178,7 +178,7 @@ static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
178 if (!q) 178 if (!q)
179 return NULL; 179 return NULL;
180 q->dev = dev; 180 q->dev = dev;
181 q->rev = dev->dev->id.revision; 181 q->rev = dev->sdev->id.revision;
182 q->mmio_base = index_to_pioqueue_base(dev, index) + 182 q->mmio_base = index_to_pioqueue_base(dev, index) +
183 pio_rxqueue_offset(dev); 183 pio_rxqueue_offset(dev);
184 184
@@ -339,7 +339,7 @@ static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
339 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI; 339 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
340 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); 340 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
341 341
342 ssb_block_write(dev->dev, data, (data_len & ~1), 342 b43_block_write(dev, data, (data_len & ~1),
343 q->mmio_base + B43_PIO_TXDATA, 343 q->mmio_base + B43_PIO_TXDATA,
344 sizeof(u16)); 344 sizeof(u16));
345 if (data_len & 1) { 345 if (data_len & 1) {
@@ -351,7 +351,7 @@ static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
351 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); 351 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
352 tail[0] = data[data_len - 1]; 352 tail[0] = data[data_len - 1];
353 tail[1] = 0; 353 tail[1] = 0;
354 ssb_block_write(dev->dev, tail, 2, 354 b43_block_write(dev, tail, 2,
355 q->mmio_base + B43_PIO_TXDATA, 355 q->mmio_base + B43_PIO_TXDATA,
356 sizeof(u16)); 356 sizeof(u16));
357 } 357 }
@@ -393,7 +393,7 @@ static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
393 B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31; 393 B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
394 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); 394 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
395 395
396 ssb_block_write(dev->dev, data, (data_len & ~3), 396 b43_block_write(dev, data, (data_len & ~3),
397 q->mmio_base + B43_PIO8_TXDATA, 397 q->mmio_base + B43_PIO8_TXDATA,
398 sizeof(u32)); 398 sizeof(u32));
399 if (data_len & 3) { 399 if (data_len & 3) {
@@ -421,7 +421,7 @@ static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
421 break; 421 break;
422 } 422 }
423 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); 423 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
424 ssb_block_write(dev->dev, tail, 4, 424 b43_block_write(dev, tail, 4,
425 q->mmio_base + B43_PIO8_TXDATA, 425 q->mmio_base + B43_PIO8_TXDATA,
426 sizeof(u32)); 426 sizeof(u32));
427 } 427 }
@@ -657,11 +657,11 @@ data_ready:
657 657
658 /* Get the preamble (RX header) */ 658 /* Get the preamble (RX header) */
659 if (q->rev >= 8) { 659 if (q->rev >= 8) {
660 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr), 660 b43_block_read(dev, rxhdr, sizeof(*rxhdr),
661 q->mmio_base + B43_PIO8_RXDATA, 661 q->mmio_base + B43_PIO8_RXDATA,
662 sizeof(u32)); 662 sizeof(u32));
663 } else { 663 } else {
664 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr), 664 b43_block_read(dev, rxhdr, sizeof(*rxhdr),
665 q->mmio_base + B43_PIO_RXDATA, 665 q->mmio_base + B43_PIO_RXDATA,
666 sizeof(u16)); 666 sizeof(u16));
667 } 667 }
@@ -697,7 +697,7 @@ data_ready:
697 skb_reserve(skb, 2); 697 skb_reserve(skb, 2);
698 skb_put(skb, len + padding); 698 skb_put(skb, len + padding);
699 if (q->rev >= 8) { 699 if (q->rev >= 8) {
700 ssb_block_read(dev->dev, skb->data + padding, (len & ~3), 700 b43_block_read(dev, skb->data + padding, (len & ~3),
701 q->mmio_base + B43_PIO8_RXDATA, 701 q->mmio_base + B43_PIO8_RXDATA,
702 sizeof(u32)); 702 sizeof(u32));
703 if (len & 3) { 703 if (len & 3) {
@@ -705,7 +705,7 @@ data_ready:
705 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4); 705 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
706 706
707 /* Read the last few bytes. */ 707 /* Read the last few bytes. */
708 ssb_block_read(dev->dev, tail, 4, 708 b43_block_read(dev, tail, 4,
709 q->mmio_base + B43_PIO8_RXDATA, 709 q->mmio_base + B43_PIO8_RXDATA,
710 sizeof(u32)); 710 sizeof(u32));
711 switch (len & 3) { 711 switch (len & 3) {
@@ -724,7 +724,7 @@ data_ready:
724 } 724 }
725 } 725 }
726 } else { 726 } else {
727 ssb_block_read(dev->dev, skb->data + padding, (len & ~1), 727 b43_block_read(dev, skb->data + padding, (len & ~1),
728 q->mmio_base + B43_PIO_RXDATA, 728 q->mmio_base + B43_PIO_RXDATA,
729 sizeof(u16)); 729 sizeof(u16));
730 if (len & 1) { 730 if (len & 1) {
@@ -732,7 +732,7 @@ data_ready:
732 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2); 732 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
733 733
734 /* Read the last byte. */ 734 /* Read the last byte. */
735 ssb_block_read(dev->dev, tail, 2, 735 b43_block_read(dev, tail, 2,
736 q->mmio_base + B43_PIO_RXDATA, 736 q->mmio_base + B43_PIO_RXDATA,
737 sizeof(u16)); 737 sizeof(u16));
738 skb->data[len + padding - 1] = tail[0]; 738 skb->data[len + padding - 1] = tail[0];
diff --git a/drivers/net/wireless/b43/radio_2055.c b/drivers/net/wireless/b43/radio_2055.c
new file mode 100644
index 000000000000..44c6dea66882
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2055.c
@@ -0,0 +1,1334 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY and radio device data tables
5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; see the file COPYING. If not, write to
20 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
21 Boston, MA 02110-1301, USA.
22
23*/
24
25#include "b43.h"
26#include "radio_2055.h"
27#include "phy_common.h"
28
29struct b2055_inittab_entry {
30 /* Value to write if we use the 5GHz band. */
31 u16 ghz5;
32 /* Value to write if we use the 2.4GHz band. */
33 u16 ghz2;
34 /* Flags */
35 u8 flags;
36#define B2055_INITTAB_ENTRY_OK 0x01
37#define B2055_INITTAB_UPLOAD 0x02
38};
39#define UPLOAD .flags = B2055_INITTAB_ENTRY_OK | B2055_INITTAB_UPLOAD
40#define NOUPLOAD .flags = B2055_INITTAB_ENTRY_OK
41
42static const struct b2055_inittab_entry b2055_inittab [] = {
43 [B2055_SP_PINPD] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
44 [B2055_C1_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
45 [B2055_C1_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
46 [B2055_C2_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
47 [B2055_C2_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
48 [B2055_C1_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
49 [B2055_C1_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
50 [B2055_C2_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
51 [B2055_C2_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
52 [B2055_C1_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
53 [B2055_C2_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
54 [B2055_C1_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
55 [B2055_C1_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
56 [B2055_C2_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
57 [B2055_C2_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
58 [B2055_MASTER1] = { .ghz5 = 0x00D0, .ghz2 = 0x00D0, NOUPLOAD, },
59 [B2055_MASTER2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
60 [B2055_PD_LGEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
61 [B2055_PD_PLLTS] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
62 [B2055_C1_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
63 [B2055_C1_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
64 [B2055_C1_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
65 [B2055_C1_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
66 [B2055_C2_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
67 [B2055_C2_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
68 [B2055_C2_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
69 [B2055_C2_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
70 [B2055_PWRDET_LGEN] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
71 [B2055_C1_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
72 [B2055_C1_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
73 [B2055_C2_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
74 [B2055_C2_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
75 [B2055_RRCCAL_CS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
76 [B2055_RRCCAL_NOPTSEL] = { .ghz5 = 0x002C, .ghz2 = 0x002C, NOUPLOAD, },
77 [B2055_CAL_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
78 [B2055_CAL_COUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
79 [B2055_CAL_COUT2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
80 [B2055_CAL_CVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
81 [B2055_CAL_RVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
82 [B2055_CAL_LPOCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
83 [B2055_CAL_TS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
84 [B2055_CAL_RCCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
85 [B2055_CAL_RCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
86 [B2055_PADDRV] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
87 [B2055_XOCTL1] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
88 [B2055_XOCTL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
89 [B2055_XOREGUL] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
90 [B2055_XOMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
91 [B2055_PLL_LFC1] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
92 [B2055_PLL_CALVTH] = { .ghz5 = 0x0087, .ghz2 = 0x0087, NOUPLOAD, },
93 [B2055_PLL_LFC2] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
94 [B2055_PLL_REF] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
95 [B2055_PLL_LFR1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
96 [B2055_PLL_PFDCP] = { .ghz5 = 0x0018, .ghz2 = 0x0018, UPLOAD, },
97 [B2055_PLL_IDAC_CPOPAMP] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
98 [B2055_PLL_CPREG] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
99 [B2055_PLL_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
100 [B2055_RF_PLLMOD0] = { .ghz5 = 0x009E, .ghz2 = 0x009E, NOUPLOAD, },
101 [B2055_RF_PLLMOD1] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
102 [B2055_RF_MMDIDAC1] = { .ghz5 = 0x00C8, .ghz2 = 0x00C8, UPLOAD, },
103 [B2055_RF_MMDIDAC0] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
104 [B2055_RF_MMDSP] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
105 [B2055_VCO_CAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
106 [B2055_VCO_CAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
107 [B2055_VCO_CAL3] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
108 [B2055_VCO_CAL4] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
109 [B2055_VCO_CAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
110 [B2055_VCO_CAL6] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
111 [B2055_VCO_CAL7] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
112 [B2055_VCO_CAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
113 [B2055_VCO_CAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
114 [B2055_VCO_CAL10] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
115 [B2055_VCO_CAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
116 [B2055_VCO_CAL12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
117 [B2055_VCO_CAL13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
118 [B2055_VCO_CAL14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
119 [B2055_VCO_CAL15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
120 [B2055_VCO_CAL16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
121 [B2055_VCO_KVCO] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
122 [B2055_VCO_CAPTAIL] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
123 [B2055_VCO_IDACVCO] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
124 [B2055_VCO_REG] = { .ghz5 = 0x0084, .ghz2 = 0x0084, UPLOAD, },
125 [B2055_PLL_RFVTH] = { .ghz5 = 0x00C3, .ghz2 = 0x00C3, NOUPLOAD, },
126 [B2055_LGBUF_CENBUF] = { .ghz5 = 0x008F, .ghz2 = 0x008F, NOUPLOAD, },
127 [B2055_LGEN_TUNE1] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
128 [B2055_LGEN_TUNE2] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
129 [B2055_LGEN_IDAC1] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
130 [B2055_LGEN_IDAC2] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
131 [B2055_LGEN_BIASC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
132 [B2055_LGEN_BIASIDAC] = { .ghz5 = 0x00CC, .ghz2 = 0x00CC, NOUPLOAD, },
133 [B2055_LGEN_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
134 [B2055_LGEN_DIV] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
135 [B2055_LGEN_SPARE2] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
136 [B2055_C1_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
137 [B2055_C1_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
138 [B2055_C1_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
139 [B2055_C1_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
140 [B2055_C1_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
141 [B2055_C1_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
142 [B2055_C1_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
143 [B2055_C1_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
144 [B2055_C1_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
145 [B2055_C1_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
146 [B2055_C1_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
147 [B2055_C1_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
148 [B2055_C1_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
149 [B2055_C1_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
150 [B2055_C1_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
151 [B2055_C1_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
152 [B2055_C1_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
153 [B2055_C1_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
154 [B2055_C1_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
155 [B2055_C1_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
156 [B2055_C1_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
157 [B2055_C1_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
158 [B2055_C1_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
159 [B2055_C1_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
160 [B2055_C1_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
161 [B2055_C1_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
162 [B2055_C1_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
163 [B2055_C1_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
164 [B2055_C1_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
165 [B2055_C1_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
166 [B2055_C1_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
167 [B2055_C1_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
168 [B2055_C1_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
169 [B2055_C1_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
170 [B2055_C1_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
171 [B2055_C1_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
172 [B2055_C1_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
173 [B2055_C1_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
174 [B2055_C1_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
175 [B2055_C1_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
176 [B2055_C1_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
177 [B2055_C1_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
178 [B2055_C1_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
179 [B2055_C1_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
180 [B2055_C1_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
181 [B2055_C1_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
182 [B2055_C1_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
183 [B2055_C2_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
184 [B2055_C2_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
185 [B2055_C2_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
186 [B2055_C2_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
187 [B2055_C2_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
188 [B2055_C2_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
189 [B2055_C2_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
190 [B2055_C2_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
191 [B2055_C2_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
192 [B2055_C2_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
193 [B2055_C2_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
194 [B2055_C2_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
195 [B2055_C2_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
196 [B2055_C2_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
197 [B2055_C2_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
198 [B2055_C2_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
199 [B2055_C2_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
200 [B2055_C2_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
201 [B2055_C2_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
202 [B2055_C2_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
203 [B2055_C2_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
204 [B2055_C2_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
205 [B2055_C2_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
206 [B2055_C2_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
207 [B2055_C2_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
208 [B2055_C2_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
209 [B2055_C2_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
210 [B2055_C2_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
211 [B2055_C2_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
212 [B2055_C2_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
213 [B2055_C2_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
214 [B2055_C2_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
215 [B2055_C2_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
216 [B2055_C2_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
217 [B2055_C2_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
218 [B2055_C2_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
219 [B2055_C2_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
220 [B2055_C2_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
221 [B2055_C2_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
222 [B2055_C2_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
223 [B2055_C2_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
224 [B2055_C2_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
225 [B2055_C2_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
226 [B2055_C2_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
227 [B2055_C2_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
228 [B2055_C2_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
229 [B2055_C2_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
230 [B2055_PRG_GCHP21] = { .ghz5 = 0x0071, .ghz2 = 0x0071, NOUPLOAD, },
231 [B2055_PRG_GCHP22] = { .ghz5 = 0x0072, .ghz2 = 0x0072, NOUPLOAD, },
232 [B2055_PRG_GCHP23] = { .ghz5 = 0x0073, .ghz2 = 0x0073, NOUPLOAD, },
233 [B2055_PRG_GCHP24] = { .ghz5 = 0x0074, .ghz2 = 0x0074, NOUPLOAD, },
234 [B2055_PRG_GCHP25] = { .ghz5 = 0x0075, .ghz2 = 0x0075, NOUPLOAD, },
235 [B2055_PRG_GCHP26] = { .ghz5 = 0x0076, .ghz2 = 0x0076, NOUPLOAD, },
236 [B2055_PRG_GCHP27] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
237 [B2055_PRG_GCHP28] = { .ghz5 = 0x0078, .ghz2 = 0x0078, NOUPLOAD, },
238 [B2055_PRG_GCHP29] = { .ghz5 = 0x0079, .ghz2 = 0x0079, NOUPLOAD, },
239 [B2055_PRG_GCHP30] = { .ghz5 = 0x007A, .ghz2 = 0x007A, NOUPLOAD, },
240 [0xC7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
241 [0xC8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
242 [0xC9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
243 [0xCA] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
244 [0xCB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
245 [0xCC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
246 [B2055_C1_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
247 [0xCE] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
248 [0xCF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
249 [0xD0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
250 [0xD1] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
251 [B2055_C1_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
252 [0xD3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
253 [0xD4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
254 [0xD5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
255 [B2055_C1_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
256 [0xD7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
257 [0xD8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
258 [B2055_C2_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
259 [0xDA] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
260 [0xDB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
261 [0xDC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
262 [0xDD] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
263 [B2055_C2_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
264 [0xDF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
265 [0xE0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
266 [0xE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
267 [B2055_C2_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
268};
269
270#define RADIOREGS(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, \
271 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
272 .radio_pll_ref = r0, \
273 .radio_rf_pllmod0 = r1, \
274 .radio_rf_pllmod1 = r2, \
275 .radio_vco_captail = r3, \
276 .radio_vco_cal1 = r4, \
277 .radio_vco_cal2 = r5, \
278 .radio_pll_lfc1 = r6, \
279 .radio_pll_lfr1 = r7, \
280 .radio_pll_lfc2 = r8, \
281 .radio_lgbuf_cenbuf = r9, \
282 .radio_lgen_tune1 = r10, \
283 .radio_lgen_tune2 = r11, \
284 .radio_c1_lgbuf_atune = r12, \
285 .radio_c1_lgbuf_gtune = r13, \
286 .radio_c1_rx_rfr1 = r14, \
287 .radio_c1_tx_pgapadtn = r15, \
288 .radio_c1_tx_mxbgtrim = r16, \
289 .radio_c2_lgbuf_atune = r17, \
290 .radio_c2_lgbuf_gtune = r18, \
291 .radio_c2_rx_rfr1 = r19, \
292 .radio_c2_tx_pgapadtn = r20, \
293 .radio_c2_tx_mxbgtrim = r21
294
295#define PHYREGS(r0, r1, r2, r3, r4, r5) \
296 .phy_regs.phy_bw1a = r0, \
297 .phy_regs.phy_bw2 = r1, \
298 .phy_regs.phy_bw3 = r2, \
299 .phy_regs.phy_bw4 = r3, \
300 .phy_regs.phy_bw5 = r4, \
301 .phy_regs.phy_bw6 = r5
302
303static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = {
304 { .channel = 184,
305 .freq = 4920, /* MHz */
306 .unk2 = 3280,
307 RADIOREGS(0x71, 0xEC, 0x01, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
308 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
309 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
310 PHYREGS(0x07B4, 0x07B0, 0x07AC, 0x0214, 0x0215, 0x0216),
311 },
312 { .channel = 186,
313 .freq = 4930, /* MHz */
314 .unk2 = 3287,
315 RADIOREGS(0x71, 0xED, 0x01, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
316 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
317 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
318 PHYREGS(0x07B8, 0x07B4, 0x07B0, 0x0213, 0x0214, 0x0215),
319 },
320 { .channel = 188,
321 .freq = 4940, /* MHz */
322 .unk2 = 3293,
323 RADIOREGS(0x71, 0xEE, 0x01, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
324 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
325 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
326 PHYREGS(0x07BC, 0x07B8, 0x07B4, 0x0212, 0x0213, 0x0214),
327 },
328 { .channel = 190,
329 .freq = 4950, /* MHz */
330 .unk2 = 3300,
331 RADIOREGS(0x71, 0xEF, 0x01, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
332 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
333 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
334 PHYREGS(0x07C0, 0x07BC, 0x07B8, 0x0211, 0x0212, 0x0213),
335 },
336 { .channel = 192,
337 .freq = 4960, /* MHz */
338 .unk2 = 3307,
339 RADIOREGS(0x71, 0xF0, 0x01, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
340 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
341 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
342 PHYREGS(0x07C4, 0x07C0, 0x07BC, 0x020F, 0x0211, 0x0212),
343 },
344 { .channel = 194,
345 .freq = 4970, /* MHz */
346 .unk2 = 3313,
347 RADIOREGS(0x71, 0xF1, 0x01, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
348 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
349 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
350 PHYREGS(0x07C8, 0x07C4, 0x07C0, 0x020E, 0x020F, 0x0211),
351 },
352 { .channel = 196,
353 .freq = 4980, /* MHz */
354 .unk2 = 3320,
355 RADIOREGS(0x71, 0xF2, 0x01, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
356 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
357 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
358 PHYREGS(0x07CC, 0x07C8, 0x07C4, 0x020D, 0x020E, 0x020F),
359 },
360 { .channel = 198,
361 .freq = 4990, /* MHz */
362 .unk2 = 3327,
363 RADIOREGS(0x71, 0xF3, 0x01, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
364 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
365 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
366 PHYREGS(0x07D0, 0x07CC, 0x07C8, 0x020C, 0x020D, 0x020E),
367 },
368 { .channel = 200,
369 .freq = 5000, /* MHz */
370 .unk2 = 3333,
371 RADIOREGS(0x71, 0xF4, 0x01, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
372 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
373 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
374 PHYREGS(0x07D4, 0x07D0, 0x07CC, 0x020B, 0x020C, 0x020D),
375 },
376 { .channel = 202,
377 .freq = 5010, /* MHz */
378 .unk2 = 3340,
379 RADIOREGS(0x71, 0xF5, 0x01, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
380 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
381 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
382 PHYREGS(0x07D8, 0x07D4, 0x07D0, 0x020A, 0x020B, 0x020C),
383 },
384 { .channel = 204,
385 .freq = 5020, /* MHz */
386 .unk2 = 3347,
387 RADIOREGS(0x71, 0xF6, 0x01, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
388 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
389 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
390 PHYREGS(0x07DC, 0x07D8, 0x07D4, 0x0209, 0x020A, 0x020B),
391 },
392 { .channel = 206,
393 .freq = 5030, /* MHz */
394 .unk2 = 3353,
395 RADIOREGS(0x71, 0xF7, 0x01, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
396 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
397 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
398 PHYREGS(0x07E0, 0x07DC, 0x07D8, 0x0208, 0x0209, 0x020A),
399 },
400 { .channel = 208,
401 .freq = 5040, /* MHz */
402 .unk2 = 3360,
403 RADIOREGS(0x71, 0xF8, 0x01, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
404 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
405 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
406 PHYREGS(0x07E4, 0x07E0, 0x07DC, 0x0207, 0x0208, 0x0209),
407 },
408 { .channel = 210,
409 .freq = 5050, /* MHz */
410 .unk2 = 3367,
411 RADIOREGS(0x71, 0xF9, 0x01, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
412 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
413 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
414 PHYREGS(0x07E8, 0x07E4, 0x07E0, 0x0206, 0x0207, 0x0208),
415 },
416 { .channel = 212,
417 .freq = 5060, /* MHz */
418 .unk2 = 3373,
419 RADIOREGS(0x71, 0xFA, 0x01, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
420 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
421 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
422 PHYREGS(0x07EC, 0x07E8, 0x07E4, 0x0205, 0x0206, 0x0207),
423 },
424 { .channel = 214,
425 .freq = 5070, /* MHz */
426 .unk2 = 3380,
427 RADIOREGS(0x71, 0xFB, 0x01, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
428 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
429 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
430 PHYREGS(0x07F0, 0x07EC, 0x07E8, 0x0204, 0x0205, 0x0206),
431 },
432 { .channel = 216,
433 .freq = 5080, /* MHz */
434 .unk2 = 3387,
435 RADIOREGS(0x71, 0xFC, 0x01, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
436 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
437 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
438 PHYREGS(0x07F4, 0x07F0, 0x07EC, 0x0203, 0x0204, 0x0205),
439 },
440 { .channel = 218,
441 .freq = 5090, /* MHz */
442 .unk2 = 3393,
443 RADIOREGS(0x71, 0xFD, 0x01, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
444 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
445 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
446 PHYREGS(0x07F8, 0x07F4, 0x07F0, 0x0202, 0x0203, 0x0204),
447 },
448 { .channel = 220,
449 .freq = 5100, /* MHz */
450 .unk2 = 3400,
451 RADIOREGS(0x71, 0xFE, 0x01, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
452 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
453 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
454 PHYREGS(0x07FC, 0x07F8, 0x07F4, 0x0201, 0x0202, 0x0203),
455 },
456 { .channel = 222,
457 .freq = 5110, /* MHz */
458 .unk2 = 3407,
459 RADIOREGS(0x71, 0xFF, 0x01, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
460 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
461 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
462 PHYREGS(0x0800, 0x07FC, 0x07F8, 0x0200, 0x0201, 0x0202),
463 },
464 { .channel = 224,
465 .freq = 5120, /* MHz */
466 .unk2 = 3413,
467 RADIOREGS(0x71, 0x00, 0x02, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
468 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
469 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
470 PHYREGS(0x0804, 0x0800, 0x07FC, 0x01FF, 0x0200, 0x0201),
471 },
472 { .channel = 226,
473 .freq = 5130, /* MHz */
474 .unk2 = 3420,
475 RADIOREGS(0x71, 0x01, 0x02, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
476 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
477 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
478 PHYREGS(0x0808, 0x0804, 0x0800, 0x01FE, 0x01FF, 0x0200),
479 },
480 { .channel = 228,
481 .freq = 5140, /* MHz */
482 .unk2 = 3427,
483 RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A,
484 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E,
485 0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B),
486 PHYREGS(0x080C, 0x0808, 0x0804, 0x01FD, 0x01FE, 0x01FF),
487 },
488 { .channel = 32,
489 .freq = 5160, /* MHz */
490 .unk2 = 3440,
491 RADIOREGS(0x71, 0x04, 0x02, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
492 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
493 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
494 PHYREGS(0x0814, 0x0810, 0x080C, 0x01FB, 0x01FC, 0x01FD),
495 },
496 { .channel = 34,
497 .freq = 5170, /* MHz */
498 .unk2 = 3447,
499 RADIOREGS(0x71, 0x05, 0x02, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
500 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
501 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
502 PHYREGS(0x0818, 0x0814, 0x0810, 0x01FA, 0x01FB, 0x01FC),
503 },
504 { .channel = 36,
505 .freq = 5180, /* MHz */
506 .unk2 = 3453,
507 RADIOREGS(0x71, 0x06, 0x02, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
508 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
509 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
510 PHYREGS(0x081C, 0x0818, 0x0814, 0x01F9, 0x01FA, 0x01FB),
511 },
512 { .channel = 38,
513 .freq = 5190, /* MHz */
514 .unk2 = 3460,
515 RADIOREGS(0x71, 0x07, 0x02, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
516 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
517 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
518 PHYREGS(0x0820, 0x081C, 0x0818, 0x01F8, 0x01F9, 0x01FA),
519 },
520 { .channel = 40,
521 .freq = 5200, /* MHz */
522 .unk2 = 3467,
523 RADIOREGS(0x71, 0x08, 0x02, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
524 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
525 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
526 PHYREGS(0x0824, 0x0820, 0x081C, 0x01F7, 0x01F8, 0x01F9),
527 },
528 { .channel = 42,
529 .freq = 5210, /* MHz */
530 .unk2 = 3473,
531 RADIOREGS(0x71, 0x09, 0x02, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
532 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
533 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
534 PHYREGS(0x0828, 0x0824, 0x0820, 0x01F6, 0x01F7, 0x01F8),
535 },
536 { .channel = 44,
537 .freq = 5220, /* MHz */
538 .unk2 = 3480,
539 RADIOREGS(0x71, 0x0A, 0x02, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
540 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
541 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
542 PHYREGS(0x082C, 0x0828, 0x0824, 0x01F5, 0x01F6, 0x01F7),
543 },
544 { .channel = 46,
545 .freq = 5230, /* MHz */
546 .unk2 = 3487,
547 RADIOREGS(0x71, 0x0B, 0x02, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
548 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
549 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
550 PHYREGS(0x0830, 0x082C, 0x0828, 0x01F4, 0x01F5, 0x01F6),
551 },
552 { .channel = 48,
553 .freq = 5240, /* MHz */
554 .unk2 = 3493,
555 RADIOREGS(0x71, 0x0C, 0x02, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
556 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
557 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
558 PHYREGS(0x0834, 0x0830, 0x082C, 0x01F3, 0x01F4, 0x01F5),
559 },
560 { .channel = 50,
561 .freq = 5250, /* MHz */
562 .unk2 = 3500,
563 RADIOREGS(0x71, 0x0D, 0x02, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
564 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
565 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
566 PHYREGS(0x0838, 0x0834, 0x0830, 0x01F2, 0x01F3, 0x01F4),
567 },
568 { .channel = 52,
569 .freq = 5260, /* MHz */
570 .unk2 = 3507,
571 RADIOREGS(0x71, 0x0E, 0x02, 0x0A, 0x98, 0x01, 0x04, 0x0A,
572 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
573 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
574 PHYREGS(0x083C, 0x0838, 0x0834, 0x01F1, 0x01F2, 0x01F3),
575 },
576 { .channel = 54,
577 .freq = 5270, /* MHz */
578 .unk2 = 3513,
579 RADIOREGS(0x71, 0x0F, 0x02, 0x0A, 0x98, 0x01, 0x04, 0x0A,
580 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
581 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
582 PHYREGS(0x0840, 0x083C, 0x0838, 0x01F0, 0x01F1, 0x01F2),
583 },
584 { .channel = 56,
585 .freq = 5280, /* MHz */
586 .unk2 = 3520,
587 RADIOREGS(0x71, 0x10, 0x02, 0x09, 0x91, 0x01, 0x04, 0x0A,
588 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
589 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
590 PHYREGS(0x0844, 0x0840, 0x083C, 0x01F0, 0x01F0, 0x01F1),
591 },
592 { .channel = 58,
593 .freq = 5290, /* MHz */
594 .unk2 = 3527,
595 RADIOREGS(0x71, 0x11, 0x02, 0x09, 0x91, 0x01, 0x04, 0x0A,
596 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
597 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
598 PHYREGS(0x0848, 0x0844, 0x0840, 0x01EF, 0x01F0, 0x01F0),
599 },
600 { .channel = 60,
601 .freq = 5300, /* MHz */
602 .unk2 = 3533,
603 RADIOREGS(0x71, 0x12, 0x02, 0x09, 0x8A, 0x01, 0x04, 0x0A,
604 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
605 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
606 PHYREGS(0x084C, 0x0848, 0x0844, 0x01EE, 0x01EF, 0x01F0),
607 },
608 { .channel = 62,
609 .freq = 5310, /* MHz */
610 .unk2 = 3540,
611 RADIOREGS(0x71, 0x13, 0x02, 0x09, 0x8A, 0x01, 0x04, 0x0A,
612 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
613 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
614 PHYREGS(0x0850, 0x084C, 0x0848, 0x01ED, 0x01EE, 0x01EF),
615 },
616 { .channel = 64,
617 .freq = 5320, /* MHz */
618 .unk2 = 3547,
619 RADIOREGS(0x71, 0x14, 0x02, 0x09, 0x83, 0x01, 0x04, 0x0A,
620 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
621 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
622 PHYREGS(0x0854, 0x0850, 0x084C, 0x01EC, 0x01ED, 0x01EE),
623 },
624 { .channel = 66,
625 .freq = 5330, /* MHz */
626 .unk2 = 3553,
627 RADIOREGS(0x71, 0x15, 0x02, 0x09, 0x83, 0x01, 0x04, 0x0A,
628 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
629 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
630 PHYREGS(0x0858, 0x0854, 0x0850, 0x01EB, 0x01EC, 0x01ED),
631 },
632 { .channel = 68,
633 .freq = 5340, /* MHz */
634 .unk2 = 3560,
635 RADIOREGS(0x71, 0x16, 0x02, 0x08, 0x7C, 0x01, 0x04, 0x0A,
636 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
637 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
638 PHYREGS(0x085C, 0x0858, 0x0854, 0x01EA, 0x01EB, 0x01EC),
639 },
640 { .channel = 70,
641 .freq = 5350, /* MHz */
642 .unk2 = 3567,
643 RADIOREGS(0x71, 0x17, 0x02, 0x08, 0x7C, 0x01, 0x04, 0x0A,
644 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
645 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
646 PHYREGS(0x0860, 0x085C, 0x0858, 0x01E9, 0x01EA, 0x01EB),
647 },
648 { .channel = 72,
649 .freq = 5360, /* MHz */
650 .unk2 = 3573,
651 RADIOREGS(0x71, 0x18, 0x02, 0x08, 0x75, 0x01, 0x04, 0x0A,
652 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
653 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
654 PHYREGS(0x0864, 0x0860, 0x085C, 0x01E8, 0x01E9, 0x01EA),
655 },
656 { .channel = 74,
657 .freq = 5370, /* MHz */
658 .unk2 = 3580,
659 RADIOREGS(0x71, 0x19, 0x02, 0x08, 0x75, 0x01, 0x04, 0x0A,
660 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
661 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
662 PHYREGS(0x0868, 0x0864, 0x0860, 0x01E7, 0x01E8, 0x01E9),
663 },
664 { .channel = 76,
665 .freq = 5380, /* MHz */
666 .unk2 = 3587,
667 RADIOREGS(0x71, 0x1A, 0x02, 0x08, 0x6E, 0x01, 0x04, 0x0A,
668 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
669 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
670 PHYREGS(0x086C, 0x0868, 0x0864, 0x01E6, 0x01E7, 0x01E8),
671 },
672 { .channel = 78,
673 .freq = 5390, /* MHz */
674 .unk2 = 3593,
675 RADIOREGS(0x71, 0x1B, 0x02, 0x08, 0x6E, 0x01, 0x04, 0x0A,
676 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
677 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
678 PHYREGS(0x0870, 0x086C, 0x0868, 0x01E5, 0x01E6, 0x01E7),
679 },
680 { .channel = 80,
681 .freq = 5400, /* MHz */
682 .unk2 = 3600,
683 RADIOREGS(0x71, 0x1C, 0x02, 0x07, 0x67, 0x01, 0x04, 0x0A,
684 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
685 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
686 PHYREGS(0x0874, 0x0870, 0x086C, 0x01E5, 0x01E5, 0x01E6),
687 },
688 { .channel = 82,
689 .freq = 5410, /* MHz */
690 .unk2 = 3607,
691 RADIOREGS(0x71, 0x1D, 0x02, 0x07, 0x67, 0x01, 0x04, 0x0A,
692 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
693 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
694 PHYREGS(0x0878, 0x0874, 0x0870, 0x01E4, 0x01E5, 0x01E5),
695 },
696 { .channel = 84,
697 .freq = 5420, /* MHz */
698 .unk2 = 3613,
699 RADIOREGS(0x71, 0x1E, 0x02, 0x07, 0x61, 0x01, 0x04, 0x0A,
700 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
701 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
702 PHYREGS(0x087C, 0x0878, 0x0874, 0x01E3, 0x01E4, 0x01E5),
703 },
704 { .channel = 86,
705 .freq = 5430, /* MHz */
706 .unk2 = 3620,
707 RADIOREGS(0x71, 0x1F, 0x02, 0x07, 0x61, 0x01, 0x04, 0x0A,
708 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
709 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
710 PHYREGS(0x0880, 0x087C, 0x0878, 0x01E2, 0x01E3, 0x01E4),
711 },
712 { .channel = 88,
713 .freq = 5440, /* MHz */
714 .unk2 = 3627,
715 RADIOREGS(0x71, 0x20, 0x02, 0x07, 0x5A, 0x01, 0x04, 0x0A,
716 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
717 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
718 PHYREGS(0x0884, 0x0880, 0x087C, 0x01E1, 0x01E2, 0x01E3),
719 },
720 { .channel = 90,
721 .freq = 5450, /* MHz */
722 .unk2 = 3633,
723 RADIOREGS(0x71, 0x21, 0x02, 0x07, 0x5A, 0x01, 0x04, 0x0A,
724 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
725 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
726 PHYREGS(0x0888, 0x0884, 0x0880, 0x01E0, 0x01E1, 0x01E2),
727 },
728 { .channel = 92,
729 .freq = 5460, /* MHz */
730 .unk2 = 3640,
731 RADIOREGS(0x71, 0x22, 0x02, 0x06, 0x53, 0x01, 0x04, 0x0A,
732 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
733 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
734 PHYREGS(0x088C, 0x0888, 0x0884, 0x01DF, 0x01E0, 0x01E1),
735 },
736 { .channel = 94,
737 .freq = 5470, /* MHz */
738 .unk2 = 3647,
739 RADIOREGS(0x71, 0x23, 0x02, 0x06, 0x53, 0x01, 0x04, 0x0A,
740 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
741 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
742 PHYREGS(0x0890, 0x088C, 0x0888, 0x01DE, 0x01DF, 0x01E0),
743 },
744 { .channel = 96,
745 .freq = 5480, /* MHz */
746 .unk2 = 3653,
747 RADIOREGS(0x71, 0x24, 0x02, 0x06, 0x4D, 0x01, 0x04, 0x0A,
748 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
749 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
750 PHYREGS(0x0894, 0x0890, 0x088C, 0x01DD, 0x01DE, 0x01DF),
751 },
752 { .channel = 98,
753 .freq = 5490, /* MHz */
754 .unk2 = 3660,
755 RADIOREGS(0x71, 0x25, 0x02, 0x06, 0x4D, 0x01, 0x04, 0x0A,
756 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
757 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
758 PHYREGS(0x0898, 0x0894, 0x0890, 0x01DD, 0x01DD, 0x01DE),
759 },
760 { .channel = 100,
761 .freq = 5500, /* MHz */
762 .unk2 = 3667,
763 RADIOREGS(0x71, 0x26, 0x02, 0x06, 0x47, 0x01, 0x04, 0x0A,
764 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
765 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
766 PHYREGS(0x089C, 0x0898, 0x0894, 0x01DC, 0x01DD, 0x01DD),
767 },
768 { .channel = 102,
769 .freq = 5510, /* MHz */
770 .unk2 = 3673,
771 RADIOREGS(0x71, 0x27, 0x02, 0x06, 0x47, 0x01, 0x04, 0x0A,
772 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
773 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
774 PHYREGS(0x08A0, 0x089C, 0x0898, 0x01DB, 0x01DC, 0x01DD),
775 },
776 { .channel = 104,
777 .freq = 5520, /* MHz */
778 .unk2 = 3680,
779 RADIOREGS(0x71, 0x28, 0x02, 0x05, 0x40, 0x01, 0x04, 0x0A,
780 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
781 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
782 PHYREGS(0x08A4, 0x08A0, 0x089C, 0x01DA, 0x01DB, 0x01DC),
783 },
784 { .channel = 106,
785 .freq = 5530, /* MHz */
786 .unk2 = 3687,
787 RADIOREGS(0x71, 0x29, 0x02, 0x05, 0x40, 0x01, 0x04, 0x0A,
788 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
789 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
790 PHYREGS(0x08A8, 0x08A4, 0x08A0, 0x01D9, 0x01DA, 0x01DB),
791 },
792 { .channel = 108,
793 .freq = 5540, /* MHz */
794 .unk2 = 3693,
795 RADIOREGS(0x71, 0x2A, 0x02, 0x05, 0x3A, 0x01, 0x04, 0x0A,
796 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
797 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
798 PHYREGS(0x08AC, 0x08A8, 0x08A4, 0x01D8, 0x01D9, 0x01DA),
799 },
800 { .channel = 110,
801 .freq = 5550, /* MHz */
802 .unk2 = 3700,
803 RADIOREGS(0x71, 0x2B, 0x02, 0x05, 0x3A, 0x01, 0x04, 0x0A,
804 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
805 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
806 PHYREGS(0x08B0, 0x08AC, 0x08A8, 0x01D7, 0x01D8, 0x01D9),
807 },
808 { .channel = 112,
809 .freq = 5560, /* MHz */
810 .unk2 = 3707,
811 RADIOREGS(0x71, 0x2C, 0x02, 0x05, 0x34, 0x01, 0x04, 0x0A,
812 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
813 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
814 PHYREGS(0x08B4, 0x08B0, 0x08AC, 0x01D7, 0x01D7, 0x01D8),
815 },
816 { .channel = 114,
817 .freq = 5570, /* MHz */
818 .unk2 = 3713,
819 RADIOREGS(0x71, 0x2D, 0x02, 0x05, 0x34, 0x01, 0x04, 0x0A,
820 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
821 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
822 PHYREGS(0x08B8, 0x08B4, 0x08B0, 0x01D6, 0x01D7, 0x01D7),
823 },
824 { .channel = 116,
825 .freq = 5580, /* MHz */
826 .unk2 = 3720,
827 RADIOREGS(0x71, 0x2E, 0x02, 0x04, 0x2E, 0x01, 0x04, 0x0A,
828 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
829 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
830 PHYREGS(0x08BC, 0x08B8, 0x08B4, 0x01D5, 0x01D6, 0x01D7),
831 },
832 { .channel = 118,
833 .freq = 5590, /* MHz */
834 .unk2 = 3727,
835 RADIOREGS(0x71, 0x2F, 0x02, 0x04, 0x2E, 0x01, 0x04, 0x0A,
836 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
837 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
838 PHYREGS(0x08C0, 0x08BC, 0x08B8, 0x01D4, 0x01D5, 0x01D6),
839 },
840 { .channel = 120,
841 .freq = 5600, /* MHz */
842 .unk2 = 3733,
843 RADIOREGS(0x71, 0x30, 0x02, 0x04, 0x28, 0x01, 0x04, 0x0A,
844 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
845 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
846 PHYREGS(0x08C4, 0x08C0, 0x08BC, 0x01D3, 0x01D4, 0x01D5),
847 },
848 { .channel = 122,
849 .freq = 5610, /* MHz */
850 .unk2 = 3740,
851 RADIOREGS(0x71, 0x31, 0x02, 0x04, 0x28, 0x01, 0x04, 0x0A,
852 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
853 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
854 PHYREGS(0x08C8, 0x08C4, 0x08C0, 0x01D2, 0x01D3, 0x01D4),
855 },
856 { .channel = 124,
857 .freq = 5620, /* MHz */
858 .unk2 = 3747,
859 RADIOREGS(0x71, 0x32, 0x02, 0x04, 0x21, 0x01, 0x04, 0x0A,
860 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
861 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
862 PHYREGS(0x08CC, 0x08C8, 0x08C4, 0x01D2, 0x01D2, 0x01D3),
863 },
864 { .channel = 126,
865 .freq = 5630, /* MHz */
866 .unk2 = 3753,
867 RADIOREGS(0x71, 0x33, 0x02, 0x04, 0x21, 0x01, 0x04, 0x0A,
868 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
869 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
870 PHYREGS(0x08D0, 0x08CC, 0x08C8, 0x01D1, 0x01D2, 0x01D2),
871 },
872 { .channel = 128,
873 .freq = 5640, /* MHz */
874 .unk2 = 3760,
875 RADIOREGS(0x71, 0x34, 0x02, 0x03, 0x1C, 0x01, 0x04, 0x0A,
876 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
877 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
878 PHYREGS(0x08D4, 0x08D0, 0x08CC, 0x01D0, 0x01D1, 0x01D2),
879 },
880 { .channel = 130,
881 .freq = 5650, /* MHz */
882 .unk2 = 3767,
883 RADIOREGS(0x71, 0x35, 0x02, 0x03, 0x1C, 0x01, 0x04, 0x0A,
884 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
885 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
886 PHYREGS(0x08D8, 0x08D4, 0x08D0, 0x01CF, 0x01D0, 0x01D1),
887 },
888 { .channel = 132,
889 .freq = 5660, /* MHz */
890 .unk2 = 3773,
891 RADIOREGS(0x71, 0x36, 0x02, 0x03, 0x16, 0x01, 0x04, 0x0A,
892 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
893 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
894 PHYREGS(0x08DC, 0x08D8, 0x08D4, 0x01CE, 0x01CF, 0x01D0),
895 },
896 { .channel = 134,
897 .freq = 5670, /* MHz */
898 .unk2 = 3780,
899 RADIOREGS(0x71, 0x37, 0x02, 0x03, 0x16, 0x01, 0x04, 0x0A,
900 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
901 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
902 PHYREGS(0x08E0, 0x08DC, 0x08D8, 0x01CE, 0x01CE, 0x01CF),
903 },
904 { .channel = 136,
905 .freq = 5680, /* MHz */
906 .unk2 = 3787,
907 RADIOREGS(0x71, 0x38, 0x02, 0x03, 0x10, 0x01, 0x04, 0x0A,
908 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
909 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
910 PHYREGS(0x08E4, 0x08E0, 0x08DC, 0x01CD, 0x01CE, 0x01CE),
911 },
912 { .channel = 138,
913 .freq = 5690, /* MHz */
914 .unk2 = 3793,
915 RADIOREGS(0x71, 0x39, 0x02, 0x03, 0x10, 0x01, 0x04, 0x0A,
916 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
917 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
918 PHYREGS(0x08E8, 0x08E4, 0x08E0, 0x01CC, 0x01CD, 0x01CE),
919 },
920 { .channel = 140,
921 .freq = 5700, /* MHz */
922 .unk2 = 3800,
923 RADIOREGS(0x71, 0x3A, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
924 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
925 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
926 PHYREGS(0x08EC, 0x08E8, 0x08E4, 0x01CB, 0x01CC, 0x01CD),
927 },
928 { .channel = 142,
929 .freq = 5710, /* MHz */
930 .unk2 = 3807,
931 RADIOREGS(0x71, 0x3B, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
932 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
933 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
934 PHYREGS(0x08F0, 0x08EC, 0x08E8, 0x01CA, 0x01CB, 0x01CC),
935 },
936 { .channel = 144,
937 .freq = 5720, /* MHz */
938 .unk2 = 3813,
939 RADIOREGS(0x71, 0x3C, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
940 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
941 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
942 PHYREGS(0x08F4, 0x08F0, 0x08EC, 0x01C9, 0x01CA, 0x01CB),
943 },
944 { .channel = 145,
945 .freq = 5725, /* MHz */
946 .unk2 = 3817,
947 RADIOREGS(0x72, 0x79, 0x04, 0x02, 0x03, 0x01, 0x03, 0x14,
948 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
949 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
950 PHYREGS(0x08F6, 0x08F2, 0x08EE, 0x01C9, 0x01CA, 0x01CB),
951 },
952 { .channel = 146,
953 .freq = 5730, /* MHz */
954 .unk2 = 3820,
955 RADIOREGS(0x71, 0x3D, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
956 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
957 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
958 PHYREGS(0x08F8, 0x08F4, 0x08F0, 0x01C9, 0x01C9, 0x01CA),
959 },
960 { .channel = 147,
961 .freq = 5735, /* MHz */
962 .unk2 = 3823,
963 RADIOREGS(0x72, 0x7B, 0x04, 0x02, 0x03, 0x01, 0x03, 0x14,
964 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
965 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
966 PHYREGS(0x08FA, 0x08F6, 0x08F2, 0x01C8, 0x01C9, 0x01CA),
967 },
968 { .channel = 148,
969 .freq = 5740, /* MHz */
970 .unk2 = 3827,
971 RADIOREGS(0x71, 0x3E, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
972 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
973 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
974 PHYREGS(0x08FC, 0x08F8, 0x08F4, 0x01C8, 0x01C9, 0x01C9),
975 },
976 { .channel = 149,
977 .freq = 5745, /* MHz */
978 .unk2 = 3830,
979 RADIOREGS(0x72, 0x7D, 0x04, 0x02, 0xFE, 0x00, 0x03, 0x14,
980 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
981 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
982 PHYREGS(0x08FE, 0x08FA, 0x08F6, 0x01C8, 0x01C8, 0x01C9),
983 },
984 { .channel = 150,
985 .freq = 5750, /* MHz */
986 .unk2 = 3833,
987 RADIOREGS(0x71, 0x3F, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
988 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
989 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
990 PHYREGS(0x0900, 0x08FC, 0x08F8, 0x01C7, 0x01C8, 0x01C9),
991 },
992 { .channel = 151,
993 .freq = 5755, /* MHz */
994 .unk2 = 3837,
995 RADIOREGS(0x72, 0x7F, 0x04, 0x02, 0xFE, 0x00, 0x03, 0x14,
996 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
997 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
998 PHYREGS(0x0902, 0x08FE, 0x08FA, 0x01C7, 0x01C8, 0x01C8),
999 },
1000 { .channel = 152,
1001 .freq = 5760, /* MHz */
1002 .unk2 = 3840,
1003 RADIOREGS(0x71, 0x40, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1004 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1005 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1006 PHYREGS(0x0904, 0x0900, 0x08FC, 0x01C6, 0x01C7, 0x01C8),
1007 },
1008 { .channel = 153,
1009 .freq = 5765, /* MHz */
1010 .unk2 = 3843,
1011 RADIOREGS(0x72, 0x81, 0x04, 0x02, 0xF8, 0x00, 0x03, 0x14,
1012 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1013 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1014 PHYREGS(0x0906, 0x0902, 0x08FE, 0x01C6, 0x01C7, 0x01C8),
1015 },
1016 { .channel = 154,
1017 .freq = 5770, /* MHz */
1018 .unk2 = 3847,
1019 RADIOREGS(0x71, 0x41, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1020 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1021 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1022 PHYREGS(0x0908, 0x0904, 0x0900, 0x01C6, 0x01C6, 0x01C7),
1023 },
1024 { .channel = 155,
1025 .freq = 5775, /* MHz */
1026 .unk2 = 3850,
1027 RADIOREGS(0x72, 0x83, 0x04, 0x02, 0xF8, 0x00, 0x03, 0x14,
1028 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1029 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1030 PHYREGS(0x090A, 0x0906, 0x0902, 0x01C5, 0x01C6, 0x01C7),
1031 },
1032 { .channel = 156,
1033 .freq = 5780, /* MHz */
1034 .unk2 = 3853,
1035 RADIOREGS(0x71, 0x42, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1036 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1037 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1038 PHYREGS(0x090C, 0x0908, 0x0904, 0x01C5, 0x01C6, 0x01C6),
1039 },
1040 { .channel = 157,
1041 .freq = 5785, /* MHz */
1042 .unk2 = 3857,
1043 RADIOREGS(0x72, 0x85, 0x04, 0x02, 0xF2, 0x00, 0x03, 0x14,
1044 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1045 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1046 PHYREGS(0x090E, 0x090A, 0x0906, 0x01C4, 0x01C5, 0x01C6),
1047 },
1048 { .channel = 158,
1049 .freq = 5790, /* MHz */
1050 .unk2 = 3860,
1051 RADIOREGS(0x71, 0x43, 0x02, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1052 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1053 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1054 PHYREGS(0x0910, 0x090C, 0x0908, 0x01C4, 0x01C5, 0x01C6),
1055 },
1056 { .channel = 159,
1057 .freq = 5795, /* MHz */
1058 .unk2 = 3863,
1059 RADIOREGS(0x72, 0x87, 0x04, 0x02, 0xF2, 0x00, 0x03, 0x14,
1060 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1061 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1062 PHYREGS(0x0912, 0x090E, 0x090A, 0x01C4, 0x01C4, 0x01C5),
1063 },
1064 { .channel = 160,
1065 .freq = 5800, /* MHz */
1066 .unk2 = 3867,
1067 RADIOREGS(0x71, 0x44, 0x02, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1068 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1069 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1070 PHYREGS(0x0914, 0x0910, 0x090C, 0x01C3, 0x01C4, 0x01C5),
1071 },
1072 { .channel = 161,
1073 .freq = 5805, /* MHz */
1074 .unk2 = 3870,
1075 RADIOREGS(0x72, 0x89, 0x04, 0x01, 0xED, 0x00, 0x03, 0x14,
1076 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1077 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1078 PHYREGS(0x0916, 0x0912, 0x090E, 0x01C3, 0x01C4, 0x01C4),
1079 },
1080 { .channel = 162,
1081 .freq = 5810, /* MHz */
1082 .unk2 = 3873,
1083 RADIOREGS(0x71, 0x45, 0x02, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1084 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1085 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1086 PHYREGS(0x0918, 0x0914, 0x0910, 0x01C2, 0x01C3, 0x01C4),
1087 },
1088 { .channel = 163,
1089 .freq = 5815, /* MHz */
1090 .unk2 = 3877,
1091 RADIOREGS(0x72, 0x8B, 0x04, 0x01, 0xED, 0x00, 0x03, 0x14,
1092 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1093 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1094 PHYREGS(0x091A, 0x0916, 0x0912, 0x01C2, 0x01C3, 0x01C4),
1095 },
1096 { .channel = 164,
1097 .freq = 5820, /* MHz */
1098 .unk2 = 3880,
1099 RADIOREGS(0x71, 0x46, 0x02, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1100 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1101 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1102 PHYREGS(0x091C, 0x0918, 0x0914, 0x01C2, 0x01C2, 0x01C3),
1103 },
1104 { .channel = 165,
1105 .freq = 5825, /* MHz */
1106 .unk2 = 3883,
1107 RADIOREGS(0x72, 0x8D, 0x04, 0x01, 0xED, 0x00, 0x03, 0x14,
1108 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1109 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1110 PHYREGS(0x091E, 0x091A, 0x0916, 0x01C1, 0x01C2, 0x01C3),
1111 },
1112 { .channel = 166,
1113 .freq = 5830, /* MHz */
1114 .unk2 = 3887,
1115 RADIOREGS(0x71, 0x47, 0x02, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1116 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1117 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1118 PHYREGS(0x0920, 0x091C, 0x0918, 0x01C1, 0x01C2, 0x01C2),
1119 },
1120 { .channel = 168,
1121 .freq = 5840, /* MHz */
1122 .unk2 = 3893,
1123 RADIOREGS(0x71, 0x48, 0x02, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1124 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1125 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1126 PHYREGS(0x0924, 0x0920, 0x091C, 0x01C0, 0x01C1, 0x01C2),
1127 },
1128 { .channel = 170,
1129 .freq = 5850, /* MHz */
1130 .unk2 = 3900,
1131 RADIOREGS(0x71, 0x49, 0x02, 0x01, 0xE0, 0x00, 0x04, 0x0A,
1132 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1133 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1134 PHYREGS(0x0928, 0x0924, 0x0920, 0x01BF, 0x01C0, 0x01C1),
1135 },
1136 { .channel = 172,
1137 .freq = 5860, /* MHz */
1138 .unk2 = 3907,
1139 RADIOREGS(0x71, 0x4A, 0x02, 0x01, 0xDE, 0x00, 0x04, 0x0A,
1140 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1141 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1142 PHYREGS(0x092C, 0x0928, 0x0924, 0x01BF, 0x01BF, 0x01C0),
1143 },
1144 { .channel = 174,
1145 .freq = 5870, /* MHz */
1146 .unk2 = 3913,
1147 RADIOREGS(0x71, 0x4B, 0x02, 0x00, 0xDB, 0x00, 0x04, 0x0A,
1148 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1149 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1150 PHYREGS(0x0930, 0x092C, 0x0928, 0x01BE, 0x01BF, 0x01BF),
1151 },
1152 { .channel = 176,
1153 .freq = 5880, /* MHz */
1154 .unk2 = 3920,
1155 RADIOREGS(0x71, 0x4C, 0x02, 0x00, 0xD8, 0x00, 0x04, 0x0A,
1156 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1157 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1158 PHYREGS(0x0934, 0x0930, 0x092C, 0x01BD, 0x01BE, 0x01BF),
1159 },
1160 { .channel = 178,
1161 .freq = 5890, /* MHz */
1162 .unk2 = 3927,
1163 RADIOREGS(0x71, 0x4D, 0x02, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1164 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1165 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1166 PHYREGS(0x0938, 0x0934, 0x0930, 0x01BC, 0x01BD, 0x01BE),
1167 },
1168 { .channel = 180,
1169 .freq = 5900, /* MHz */
1170 .unk2 = 3933,
1171 RADIOREGS(0x71, 0x4E, 0x02, 0x00, 0xD3, 0x00, 0x04, 0x0A,
1172 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1173 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1174 PHYREGS(0x093C, 0x0938, 0x0934, 0x01BC, 0x01BC, 0x01BD),
1175 },
1176 { .channel = 182,
1177 .freq = 5910, /* MHz */
1178 .unk2 = 3940,
1179 RADIOREGS(0x71, 0x4F, 0x02, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1180 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1181 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1182 PHYREGS(0x0940, 0x093C, 0x0938, 0x01BB, 0x01BC, 0x01BC),
1183 },
1184 { .channel = 1,
1185 .freq = 2412, /* MHz */
1186 .unk2 = 3216,
1187 RADIOREGS(0x73, 0x6C, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1188 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C,
1189 0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80),
1190 PHYREGS(0x03C9, 0x03C5, 0x03C1, 0x043A, 0x043F, 0x0443),
1191 },
1192 { .channel = 2,
1193 .freq = 2417, /* MHz */
1194 .unk2 = 3223,
1195 RADIOREGS(0x73, 0x71, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1196 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B,
1197 0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80),
1198 PHYREGS(0x03CB, 0x03C7, 0x03C3, 0x0438, 0x043D, 0x0441),
1199 },
1200 { .channel = 3,
1201 .freq = 2422, /* MHz */
1202 .unk2 = 3229,
1203 RADIOREGS(0x73, 0x76, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1204 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1205 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1206 PHYREGS(0x03CD, 0x03C9, 0x03C5, 0x0436, 0x043A, 0x043F),
1207 },
1208 { .channel = 4,
1209 .freq = 2427, /* MHz */
1210 .unk2 = 3236,
1211 RADIOREGS(0x73, 0x7B, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1212 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1213 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1214 PHYREGS(0x03CF, 0x03CB, 0x03C7, 0x0434, 0x0438, 0x043D),
1215 },
1216 { .channel = 5,
1217 .freq = 2432, /* MHz */
1218 .unk2 = 3243,
1219 RADIOREGS(0x73, 0x80, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1220 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09,
1221 0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80),
1222 PHYREGS(0x03D1, 0x03CD, 0x03C9, 0x0431, 0x0436, 0x043A),
1223 },
1224 { .channel = 6,
1225 .freq = 2437, /* MHz */
1226 .unk2 = 3249,
1227 RADIOREGS(0x73, 0x85, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1228 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08,
1229 0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80),
1230 PHYREGS(0x03D3, 0x03CF, 0x03CB, 0x042F, 0x0434, 0x0438),
1231 },
1232 { .channel = 7,
1233 .freq = 2442, /* MHz */
1234 .unk2 = 3256,
1235 RADIOREGS(0x73, 0x8A, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1236 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07,
1237 0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80),
1238 PHYREGS(0x03D5, 0x03D1, 0x03CD, 0x042D, 0x0431, 0x0436),
1239 },
1240 { .channel = 8,
1241 .freq = 2447, /* MHz */
1242 .unk2 = 3263,
1243 RADIOREGS(0x73, 0x8F, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1244 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06,
1245 0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80),
1246 PHYREGS(0x03D7, 0x03D3, 0x03CF, 0x042B, 0x042F, 0x0434),
1247 },
1248 { .channel = 9,
1249 .freq = 2452, /* MHz */
1250 .unk2 = 3269,
1251 RADIOREGS(0x73, 0x94, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1252 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06,
1253 0x80, 0xFF, 0x88, 0x09, 0x06, 0x80),
1254 PHYREGS(0x03D9, 0x03D5, 0x03D1, 0x0429, 0x042D, 0x0431),
1255 },
1256 { .channel = 10,
1257 .freq = 2457, /* MHz */
1258 .unk2 = 3276,
1259 RADIOREGS(0x73, 0x99, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1260 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05,
1261 0x80, 0xFF, 0x88, 0x08, 0x05, 0x80),
1262 PHYREGS(0x03DB, 0x03D7, 0x03D3, 0x0427, 0x042B, 0x042F),
1263 },
1264 { .channel = 11,
1265 .freq = 2462, /* MHz */
1266 .unk2 = 3283,
1267 RADIOREGS(0x73, 0x9E, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1268 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04,
1269 0x80, 0xFF, 0x88, 0x08, 0x04, 0x80),
1270 PHYREGS(0x03DD, 0x03D9, 0x03D5, 0x0424, 0x0429, 0x042D),
1271 },
1272 { .channel = 12,
1273 .freq = 2467, /* MHz */
1274 .unk2 = 3289,
1275 RADIOREGS(0x73, 0xA3, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1276 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03,
1277 0x80, 0xFF, 0x88, 0x08, 0x03, 0x80),
1278 PHYREGS(0x03DF, 0x03DB, 0x03D7, 0x0422, 0x0427, 0x042B),
1279 },
1280 { .channel = 13,
1281 .freq = 2472, /* MHz */
1282 .unk2 = 3296,
1283 RADIOREGS(0x73, 0xA8, 0x09, 0x0F, 0x00, 0x01, 0x07, 0x15,
1284 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03,
1285 0x80, 0xFF, 0x88, 0x07, 0x03, 0x80),
1286 PHYREGS(0x03E1, 0x03DD, 0x03D9, 0x0420, 0x0424, 0x0429),
1287 },
1288 { .channel = 14,
1289 .freq = 2484, /* MHz */
1290 .unk2 = 3312,
1291 RADIOREGS(0x73, 0xB4, 0x09, 0x0F, 0xFF, 0x01, 0x07, 0x15,
1292 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01,
1293 0x80, 0xFF, 0x88, 0x07, 0x01, 0x80),
1294 PHYREGS(0x03E6, 0x03E2, 0x03DE, 0x041B, 0x041F, 0x0424),
1295 },
1296};
1297
1298void b2055_upload_inittab(struct b43_wldev *dev,
1299 bool ghz5, bool ignore_uploadflag)
1300{
1301 const struct b2055_inittab_entry *e;
1302 unsigned int i, writes = 0;
1303 u16 value;
1304
1305 for (i = 0; i < ARRAY_SIZE(b2055_inittab); i++) {
1306 e = &(b2055_inittab[i]);
1307 if (!(e->flags & B2055_INITTAB_ENTRY_OK))
1308 continue;
1309 if ((e->flags & B2055_INITTAB_UPLOAD) || ignore_uploadflag) {
1310 if (ghz5)
1311 value = e->ghz5;
1312 else
1313 value = e->ghz2;
1314 b43_radio_write16(dev, i, value);
1315 if (++writes % 4 == 0)
1316 b43_read32(dev, B43_MMIO_MACCTL); /* flush */
1317 }
1318 }
1319}
1320
1321const struct b43_nphy_channeltab_entry_rev2 *
1322b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel)
1323{
1324 const struct b43_nphy_channeltab_entry_rev2 *e;
1325 unsigned int i;
1326
1327 for (i = 0; i < ARRAY_SIZE(b43_nphy_channeltab_rev2); i++) {
1328 e = &(b43_nphy_channeltab_rev2[i]);
1329 if (e->channel == channel)
1330 return e;
1331 }
1332
1333 return NULL;
1334}
diff --git a/drivers/net/wireless/b43/radio_2055.h b/drivers/net/wireless/b43/radio_2055.h
new file mode 100644
index 000000000000..d9bfa0f21b72
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2055.h
@@ -0,0 +1,254 @@
1#ifndef B43_RADIO_2055_H_
2#define B43_RADIO_2055_H_
3
4#include <linux/types.h>
5
6#include "tables_nphy.h"
7
8#define B2055_GEN_SPARE 0x00 /* GEN spare */
9#define B2055_SP_PINPD 0x02 /* SP PIN PD */
10#define B2055_C1_SP_RSSI 0x03 /* SP RSSI Core 1 */
11#define B2055_C1_SP_PDMISC 0x04 /* SP PD MISC Core 1 */
12#define B2055_C2_SP_RSSI 0x05 /* SP RSSI Core 2 */
13#define B2055_C2_SP_PDMISC 0x06 /* SP PD MISC Core 2 */
14#define B2055_C1_SP_RXGC1 0x07 /* SP RX GC1 Core 1 */
15#define B2055_C1_SP_RXGC2 0x08 /* SP RX GC2 Core 1 */
16#define B2055_C2_SP_RXGC1 0x09 /* SP RX GC1 Core 2 */
17#define B2055_C2_SP_RXGC2 0x0A /* SP RX GC2 Core 2 */
18#define B2055_C1_SP_LPFBWSEL 0x0B /* SP LPF BW select Core 1 */
19#define B2055_C2_SP_LPFBWSEL 0x0C /* SP LPF BW select Core 2 */
20#define B2055_C1_SP_TXGC1 0x0D /* SP TX GC1 Core 1 */
21#define B2055_C1_SP_TXGC2 0x0E /* SP TX GC2 Core 1 */
22#define B2055_C2_SP_TXGC1 0x0F /* SP TX GC1 Core 2 */
23#define B2055_C2_SP_TXGC2 0x10 /* SP TX GC2 Core 2 */
24#define B2055_MASTER1 0x11 /* Master control 1 */
25#define B2055_MASTER2 0x12 /* Master control 2 */
26#define B2055_PD_LGEN 0x13 /* PD LGEN */
27#define B2055_PD_PLLTS 0x14 /* PD PLL TS */
28#define B2055_C1_PD_LGBUF 0x15 /* PD Core 1 LGBUF */
29#define B2055_C1_PD_TX 0x16 /* PD Core 1 TX */
30#define B2055_C1_PD_RXTX 0x17 /* PD Core 1 RXTX */
31#define B2055_C1_PD_RSSIMISC 0x18 /* PD Core 1 RSSI MISC */
32#define B2055_C2_PD_LGBUF 0x19 /* PD Core 2 LGBUF */
33#define B2055_C2_PD_TX 0x1A /* PD Core 2 TX */
34#define B2055_C2_PD_RXTX 0x1B /* PD Core 2 RXTX */
35#define B2055_C2_PD_RSSIMISC 0x1C /* PD Core 2 RSSI MISC */
36#define B2055_PWRDET_LGEN 0x1D /* PWRDET LGEN */
37#define B2055_C1_PWRDET_LGBUF 0x1E /* PWRDET LGBUF Core 1 */
38#define B2055_C1_PWRDET_RXTX 0x1F /* PWRDET RXTX Core 1 */
39#define B2055_C2_PWRDET_LGBUF 0x20 /* PWRDET LGBUF Core 2 */
40#define B2055_C2_PWRDET_RXTX 0x21 /* PWRDET RXTX Core 2 */
41#define B2055_RRCCAL_CS 0x22 /* RRCCAL Control spare */
42#define B2055_RRCCAL_NOPTSEL 0x23 /* RRCCAL N OPT SEL */
43#define B2055_CAL_MISC 0x24 /* CAL MISC */
44#define B2055_CAL_COUT 0x25 /* CAL Counter out */
45#define B2055_CAL_COUT2 0x26 /* CAL Counter out 2 */
46#define B2055_CAL_CVARCTL 0x27 /* CAL CVAR Control */
47#define B2055_CAL_RVARCTL 0x28 /* CAL RVAR Control */
48#define B2055_CAL_LPOCTL 0x29 /* CAL LPO Control */
49#define B2055_CAL_TS 0x2A /* CAL TS */
50#define B2055_CAL_RCCALRTS 0x2B /* CAL RCCAL READ TS */
51#define B2055_CAL_RCALRTS 0x2C /* CAL RCAL READ TS */
52#define B2055_PADDRV 0x2D /* PAD driver */
53#define B2055_XOCTL1 0x2E /* XO Control 1 */
54#define B2055_XOCTL2 0x2F /* XO Control 2 */
55#define B2055_XOREGUL 0x30 /* XO Regulator */
56#define B2055_XOMISC 0x31 /* XO misc */
57#define B2055_PLL_LFC1 0x32 /* PLL LF C1 */
58#define B2055_PLL_CALVTH 0x33 /* PLL CAL VTH */
59#define B2055_PLL_LFC2 0x34 /* PLL LF C2 */
60#define B2055_PLL_REF 0x35 /* PLL reference */
61#define B2055_PLL_LFR1 0x36 /* PLL LF R1 */
62#define B2055_PLL_PFDCP 0x37 /* PLL PFD CP */
63#define B2055_PLL_IDAC_CPOPAMP 0x38 /* PLL IDAC CPOPAMP */
64#define B2055_PLL_CPREG 0x39 /* PLL CP Regulator */
65#define B2055_PLL_RCAL 0x3A /* PLL RCAL */
66#define B2055_RF_PLLMOD0 0x3B /* RF PLL MOD0 */
67#define B2055_RF_PLLMOD1 0x3C /* RF PLL MOD1 */
68#define B2055_RF_MMDIDAC1 0x3D /* RF MMD IDAC 1 */
69#define B2055_RF_MMDIDAC0 0x3E /* RF MMD IDAC 0 */
70#define B2055_RF_MMDSP 0x3F /* RF MMD spare */
71#define B2055_VCO_CAL1 0x40 /* VCO cal 1 */
72#define B2055_VCO_CAL2 0x41 /* VCO cal 2 */
73#define B2055_VCO_CAL3 0x42 /* VCO cal 3 */
74#define B2055_VCO_CAL4 0x43 /* VCO cal 4 */
75#define B2055_VCO_CAL5 0x44 /* VCO cal 5 */
76#define B2055_VCO_CAL6 0x45 /* VCO cal 6 */
77#define B2055_VCO_CAL7 0x46 /* VCO cal 7 */
78#define B2055_VCO_CAL8 0x47 /* VCO cal 8 */
79#define B2055_VCO_CAL9 0x48 /* VCO cal 9 */
80#define B2055_VCO_CAL10 0x49 /* VCO cal 10 */
81#define B2055_VCO_CAL11 0x4A /* VCO cal 11 */
82#define B2055_VCO_CAL12 0x4B /* VCO cal 12 */
83#define B2055_VCO_CAL13 0x4C /* VCO cal 13 */
84#define B2055_VCO_CAL14 0x4D /* VCO cal 14 */
85#define B2055_VCO_CAL15 0x4E /* VCO cal 15 */
86#define B2055_VCO_CAL16 0x4F /* VCO cal 16 */
87#define B2055_VCO_KVCO 0x50 /* VCO KVCO */
88#define B2055_VCO_CAPTAIL 0x51 /* VCO CAP TAIL */
89#define B2055_VCO_IDACVCO 0x52 /* VCO IDAC VCO */
90#define B2055_VCO_REG 0x53 /* VCO Regulator */
91#define B2055_PLL_RFVTH 0x54 /* PLL RF VTH */
92#define B2055_LGBUF_CENBUF 0x55 /* LGBUF CEN BUF */
93#define B2055_LGEN_TUNE1 0x56 /* LGEN tune 1 */
94#define B2055_LGEN_TUNE2 0x57 /* LGEN tune 2 */
95#define B2055_LGEN_IDAC1 0x58 /* LGEN IDAC 1 */
96#define B2055_LGEN_IDAC2 0x59 /* LGEN IDAC 2 */
97#define B2055_LGEN_BIASC 0x5A /* LGEN BIAS counter */
98#define B2055_LGEN_BIASIDAC 0x5B /* LGEN BIAS IDAC */
99#define B2055_LGEN_RCAL 0x5C /* LGEN RCAL */
100#define B2055_LGEN_DIV 0x5D /* LGEN div */
101#define B2055_LGEN_SPARE2 0x5E /* LGEN spare 2 */
102#define B2055_C1_LGBUF_ATUNE 0x5F /* Core 1 LGBUF A tune */
103#define B2055_C1_LGBUF_GTUNE 0x60 /* Core 1 LGBUF G tune */
104#define B2055_C1_LGBUF_DIV 0x61 /* Core 1 LGBUF div */
105#define B2055_C1_LGBUF_AIDAC 0x62 /* Core 1 LGBUF A IDAC */
106#define B2055_C1_LGBUF_GIDAC 0x63 /* Core 1 LGBUF G IDAC */
107#define B2055_C1_LGBUF_IDACFO 0x64 /* Core 1 LGBUF IDAC filter override */
108#define B2055_C1_LGBUF_SPARE 0x65 /* Core 1 LGBUF spare */
109#define B2055_C1_RX_RFSPC1 0x66 /* Core 1 RX RF SPC1 */
110#define B2055_C1_RX_RFR1 0x67 /* Core 1 RX RF reg 1 */
111#define B2055_C1_RX_RFR2 0x68 /* Core 1 RX RF reg 2 */
112#define B2055_C1_RX_RFRCAL 0x69 /* Core 1 RX RF RCAL */
113#define B2055_C1_RX_BB_BLCMP 0x6A /* Core 1 RX Baseband BUFI LPF CMP */
114#define B2055_C1_RX_BB_LPF 0x6B /* Core 1 RX Baseband LPF */
115#define B2055_C1_RX_BB_MIDACHP 0x6C /* Core 1 RX Baseband MIDAC High-pass */
116#define B2055_C1_RX_BB_VGA1IDAC 0x6D /* Core 1 RX Baseband VGA1 IDAC */
117#define B2055_C1_RX_BB_VGA2IDAC 0x6E /* Core 1 RX Baseband VGA2 IDAC */
118#define B2055_C1_RX_BB_VGA3IDAC 0x6F /* Core 1 RX Baseband VGA3 IDAC */
119#define B2055_C1_RX_BB_BUFOCTL 0x70 /* Core 1 RX Baseband BUFO Control */
120#define B2055_C1_RX_BB_RCCALCTL 0x71 /* Core 1 RX Baseband RCCAL Control */
121#define B2055_C1_RX_BB_RSSICTL1 0x72 /* Core 1 RX Baseband RSSI Control 1 */
122#define B2055_C1_RX_BB_RSSICTL2 0x73 /* Core 1 RX Baseband RSSI Control 2 */
123#define B2055_C1_RX_BB_RSSICTL3 0x74 /* Core 1 RX Baseband RSSI Control 3 */
124#define B2055_C1_RX_BB_RSSICTL4 0x75 /* Core 1 RX Baseband RSSI Control 4 */
125#define B2055_C1_RX_BB_RSSICTL5 0x76 /* Core 1 RX Baseband RSSI Control 5 */
126#define B2055_C1_RX_BB_REG 0x77 /* Core 1 RX Baseband Regulator */
127#define B2055_C1_RX_BB_SPARE1 0x78 /* Core 1 RX Baseband spare 1 */
128#define B2055_C1_RX_TXBBRCAL 0x79 /* Core 1 RX TX BB RCAL */
129#define B2055_C1_TX_RF_SPGA 0x7A /* Core 1 TX RF SGM PGA */
130#define B2055_C1_TX_RF_SPAD 0x7B /* Core 1 TX RF SGM PAD */
131#define B2055_C1_TX_RF_CNTPGA1 0x7C /* Core 1 TX RF counter PGA 1 */
132#define B2055_C1_TX_RF_CNTPAD1 0x7D /* Core 1 TX RF counter PAD 1 */
133#define B2055_C1_TX_RF_PGAIDAC 0x7E /* Core 1 TX RF PGA IDAC */
134#define B2055_C1_TX_PGAPADTN 0x7F /* Core 1 TX PGA PAD TN */
135#define B2055_C1_TX_PADIDAC1 0x80 /* Core 1 TX PAD IDAC 1 */
136#define B2055_C1_TX_PADIDAC2 0x81 /* Core 1 TX PAD IDAC 2 */
137#define B2055_C1_TX_MXBGTRIM 0x82 /* Core 1 TX MX B/G TRIM */
138#define B2055_C1_TX_RF_RCAL 0x83 /* Core 1 TX RF RCAL */
139#define B2055_C1_TX_RF_PADTSSI1 0x84 /* Core 1 TX RF PAD TSSI1 */
140#define B2055_C1_TX_RF_PADTSSI2 0x85 /* Core 1 TX RF PAD TSSI2 */
141#define B2055_C1_TX_RF_SPARE 0x86 /* Core 1 TX RF spare */
142#define B2055_C1_TX_RF_IQCAL1 0x87 /* Core 1 TX RF I/Q CAL 1 */
143#define B2055_C1_TX_RF_IQCAL2 0x88 /* Core 1 TX RF I/Q CAL 2 */
144#define B2055_C1_TXBB_RCCAL 0x89 /* Core 1 TXBB RC CAL Control */
145#define B2055_C1_TXBB_LPF1 0x8A /* Core 1 TXBB LPF 1 */
146#define B2055_C1_TX_VOSCNCL 0x8B /* Core 1 TX VOS CNCL */
147#define B2055_C1_TX_LPF_MXGMIDAC 0x8C /* Core 1 TX LPF MXGM IDAC */
148#define B2055_C1_TX_BB_MXGM 0x8D /* Core 1 TX BB MXGM */
149#define B2055_C2_LGBUF_ATUNE 0x8E /* Core 2 LGBUF A tune */
150#define B2055_C2_LGBUF_GTUNE 0x8F /* Core 2 LGBUF G tune */
151#define B2055_C2_LGBUF_DIV 0x90 /* Core 2 LGBUF div */
152#define B2055_C2_LGBUF_AIDAC 0x91 /* Core 2 LGBUF A IDAC */
153#define B2055_C2_LGBUF_GIDAC 0x92 /* Core 2 LGBUF G IDAC */
154#define B2055_C2_LGBUF_IDACFO 0x93 /* Core 2 LGBUF IDAC filter override */
155#define B2055_C2_LGBUF_SPARE 0x94 /* Core 2 LGBUF spare */
156#define B2055_C2_RX_RFSPC1 0x95 /* Core 2 RX RF SPC1 */
157#define B2055_C2_RX_RFR1 0x96 /* Core 2 RX RF reg 1 */
158#define B2055_C2_RX_RFR2 0x97 /* Core 2 RX RF reg 2 */
159#define B2055_C2_RX_RFRCAL 0x98 /* Core 2 RX RF RCAL */
160#define B2055_C2_RX_BB_BLCMP 0x99 /* Core 2 RX Baseband BUFI LPF CMP */
161#define B2055_C2_RX_BB_LPF 0x9A /* Core 2 RX Baseband LPF */
162#define B2055_C2_RX_BB_MIDACHP 0x9B /* Core 2 RX Baseband MIDAC High-pass */
163#define B2055_C2_RX_BB_VGA1IDAC 0x9C /* Core 2 RX Baseband VGA1 IDAC */
164#define B2055_C2_RX_BB_VGA2IDAC 0x9D /* Core 2 RX Baseband VGA2 IDAC */
165#define B2055_C2_RX_BB_VGA3IDAC 0x9E /* Core 2 RX Baseband VGA3 IDAC */
166#define B2055_C2_RX_BB_BUFOCTL 0x9F /* Core 2 RX Baseband BUFO Control */
167#define B2055_C2_RX_BB_RCCALCTL 0xA0 /* Core 2 RX Baseband RCCAL Control */
168#define B2055_C2_RX_BB_RSSICTL1 0xA1 /* Core 2 RX Baseband RSSI Control 1 */
169#define B2055_C2_RX_BB_RSSICTL2 0xA2 /* Core 2 RX Baseband RSSI Control 2 */
170#define B2055_C2_RX_BB_RSSICTL3 0xA3 /* Core 2 RX Baseband RSSI Control 3 */
171#define B2055_C2_RX_BB_RSSICTL4 0xA4 /* Core 2 RX Baseband RSSI Control 4 */
172#define B2055_C2_RX_BB_RSSICTL5 0xA5 /* Core 2 RX Baseband RSSI Control 5 */
173#define B2055_C2_RX_BB_REG 0xA6 /* Core 2 RX Baseband Regulator */
174#define B2055_C2_RX_BB_SPARE1 0xA7 /* Core 2 RX Baseband spare 1 */
175#define B2055_C2_RX_TXBBRCAL 0xA8 /* Core 2 RX TX BB RCAL */
176#define B2055_C2_TX_RF_SPGA 0xA9 /* Core 2 TX RF SGM PGA */
177#define B2055_C2_TX_RF_SPAD 0xAA /* Core 2 TX RF SGM PAD */
178#define B2055_C2_TX_RF_CNTPGA1 0xAB /* Core 2 TX RF counter PGA 1 */
179#define B2055_C2_TX_RF_CNTPAD1 0xAC /* Core 2 TX RF counter PAD 1 */
180#define B2055_C2_TX_RF_PGAIDAC 0xAD /* Core 2 TX RF PGA IDAC */
181#define B2055_C2_TX_PGAPADTN 0xAE /* Core 2 TX PGA PAD TN */
182#define B2055_C2_TX_PADIDAC1 0xAF /* Core 2 TX PAD IDAC 1 */
183#define B2055_C2_TX_PADIDAC2 0xB0 /* Core 2 TX PAD IDAC 2 */
184#define B2055_C2_TX_MXBGTRIM 0xB1 /* Core 2 TX MX B/G TRIM */
185#define B2055_C2_TX_RF_RCAL 0xB2 /* Core 2 TX RF RCAL */
186#define B2055_C2_TX_RF_PADTSSI1 0xB3 /* Core 2 TX RF PAD TSSI1 */
187#define B2055_C2_TX_RF_PADTSSI2 0xB4 /* Core 2 TX RF PAD TSSI2 */
188#define B2055_C2_TX_RF_SPARE 0xB5 /* Core 2 TX RF spare */
189#define B2055_C2_TX_RF_IQCAL1 0xB6 /* Core 2 TX RF I/Q CAL 1 */
190#define B2055_C2_TX_RF_IQCAL2 0xB7 /* Core 2 TX RF I/Q CAL 2 */
191#define B2055_C2_TXBB_RCCAL 0xB8 /* Core 2 TXBB RC CAL Control */
192#define B2055_C2_TXBB_LPF1 0xB9 /* Core 2 TXBB LPF 1 */
193#define B2055_C2_TX_VOSCNCL 0xBA /* Core 2 TX VOS CNCL */
194#define B2055_C2_TX_LPF_MXGMIDAC 0xBB /* Core 2 TX LPF MXGM IDAC */
195#define B2055_C2_TX_BB_MXGM 0xBC /* Core 2 TX BB MXGM */
196#define B2055_PRG_GCHP21 0xBD /* PRG GC HPVGA23 21 */
197#define B2055_PRG_GCHP22 0xBE /* PRG GC HPVGA23 22 */
198#define B2055_PRG_GCHP23 0xBF /* PRG GC HPVGA23 23 */
199#define B2055_PRG_GCHP24 0xC0 /* PRG GC HPVGA23 24 */
200#define B2055_PRG_GCHP25 0xC1 /* PRG GC HPVGA23 25 */
201#define B2055_PRG_GCHP26 0xC2 /* PRG GC HPVGA23 26 */
202#define B2055_PRG_GCHP27 0xC3 /* PRG GC HPVGA23 27 */
203#define B2055_PRG_GCHP28 0xC4 /* PRG GC HPVGA23 28 */
204#define B2055_PRG_GCHP29 0xC5 /* PRG GC HPVGA23 29 */
205#define B2055_PRG_GCHP30 0xC6 /* PRG GC HPVGA23 30 */
206#define B2055_C1_LNA_GAINBST 0xCD /* Core 1 LNA GAINBST */
207#define B2055_C1_B0NB_RSSIVCM 0xD2 /* Core 1 B0 narrow-band RSSI VCM */
208#define B2055_C1_GENSPARE2 0xD6 /* Core 1 GEN spare 2 */
209#define B2055_C2_LNA_GAINBST 0xD9 /* Core 2 LNA GAINBST */
210#define B2055_C2_B0NB_RSSIVCM 0xDE /* Core 2 B0 narrow-band RSSI VCM */
211#define B2055_C2_GENSPARE2 0xE2 /* Core 2 GEN spare 2 */
212
213struct b43_nphy_channeltab_entry_rev2 {
214 /* The channel number */
215 u8 channel;
216 /* The channel frequency in MHz */
217 u16 freq;
218 /* An unknown value */
219 u16 unk2;
220 /* Radio register values on channelswitch */
221 u8 radio_pll_ref;
222 u8 radio_rf_pllmod0;
223 u8 radio_rf_pllmod1;
224 u8 radio_vco_captail;
225 u8 radio_vco_cal1;
226 u8 radio_vco_cal2;
227 u8 radio_pll_lfc1;
228 u8 radio_pll_lfr1;
229 u8 radio_pll_lfc2;
230 u8 radio_lgbuf_cenbuf;
231 u8 radio_lgen_tune1;
232 u8 radio_lgen_tune2;
233 u8 radio_c1_lgbuf_atune;
234 u8 radio_c1_lgbuf_gtune;
235 u8 radio_c1_rx_rfr1;
236 u8 radio_c1_tx_pgapadtn;
237 u8 radio_c1_tx_mxbgtrim;
238 u8 radio_c2_lgbuf_atune;
239 u8 radio_c2_lgbuf_gtune;
240 u8 radio_c2_rx_rfr1;
241 u8 radio_c2_tx_pgapadtn;
242 u8 radio_c2_tx_mxbgtrim;
243 /* PHY register values on channelswitch */
244 struct b43_phy_n_sfo_cfg phy_regs;
245};
246
247/* Upload the default register value table.
248 * If "ghz5" is true, we upload the 5Ghz table. Otherwise the 2.4Ghz
249 * table is uploaded. If "ignore_uploadflag" is true, we upload any value
250 * and ignore the "UPLOAD" flag. */
251void b2055_upload_inittab(struct b43_wldev *dev,
252 bool ghz5, bool ignore_uploadflag);
253
254#endif /* B43_RADIO_2055_H_ */
diff --git a/drivers/net/wireless/b43/radio_2056.c b/drivers/net/wireless/b43/radio_2056.c
new file mode 100644
index 000000000000..8890df067029
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2056.c
@@ -0,0 +1,9099 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n 2056 radio device data tables
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include "b43.h"
24#include "radio_2056.h"
25#include "phy_common.h"
26
27struct b2056_inittab_entry {
28 /* Value to write if we use the 5GHz band. */
29 u16 ghz5;
30 /* Value to write if we use the 2.4GHz band. */
31 u16 ghz2;
32 /* Flags */
33 u8 flags;
34};
35#define B2056_INITTAB_ENTRY_OK 0x01
36#define B2056_INITTAB_UPLOAD 0x02
37#define UPLOAD .flags = B2056_INITTAB_ENTRY_OK | B2056_INITTAB_UPLOAD
38#define NOUPLOAD .flags = B2056_INITTAB_ENTRY_OK
39
40struct b2056_inittabs_pts {
41 const struct b2056_inittab_entry *syn;
42 unsigned int syn_length;
43 const struct b2056_inittab_entry *tx;
44 unsigned int tx_length;
45 const struct b2056_inittab_entry *rx;
46 unsigned int rx_length;
47};
48
49static const struct b2056_inittab_entry b2056_inittab_rev3_syn[] = {
50 [B2056_SYN_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
51 [B2056_SYN_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
52 [B2056_SYN_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
53 [B2056_SYN_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
54 [B2056_SYN_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
55 [B2056_SYN_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
56 [B2056_SYN_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
57 [B2056_SYN_COM_PU] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
58 [B2056_SYN_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
59 [B2056_SYN_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
60 [B2056_SYN_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
61 [B2056_SYN_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
62 [B2056_SYN_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
63 [B2056_SYN_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
64 [B2056_SYN_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
65 [B2056_SYN_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
66 [B2056_SYN_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
67 [B2056_SYN_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
68 [B2056_SYN_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
69 [B2056_SYN_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
70 [B2056_SYN_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
71 [B2056_SYN_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
72 [B2056_SYN_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
73 [B2056_SYN_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
74 [B2056_SYN_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
75 [B2056_SYN_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
76 [B2056_SYN_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
77 [B2056_SYN_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
78 [B2056_SYN_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
79 [B2056_SYN_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
80 [B2056_SYN_GPIO_MASTER1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
81 [B2056_SYN_GPIO_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
82 [B2056_SYN_TOPBIAS_MASTER] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
83 [B2056_SYN_TOPBIAS_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
84 [B2056_SYN_AFEREG] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
85 [B2056_SYN_TEMPPROCSENSE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
86 [B2056_SYN_TEMPPROCSENSEIDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
87 [B2056_SYN_TEMPPROCSENSERCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
88 [B2056_SYN_LPO] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
89 [B2056_SYN_VDDCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
90 [B2056_SYN_VDDCAL_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
91 [B2056_SYN_VDDCAL_STATUS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
92 [B2056_SYN_RCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
93 [B2056_SYN_RCAL_CODE_OUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
94 [B2056_SYN_RCCAL_CTRL0] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
95 [B2056_SYN_RCCAL_CTRL1] = { .ghz5 = 0x001f, .ghz2 = 0x001f, NOUPLOAD, },
96 [B2056_SYN_RCCAL_CTRL2] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
97 [B2056_SYN_RCCAL_CTRL3] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
98 [B2056_SYN_RCCAL_CTRL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
99 [B2056_SYN_RCCAL_CTRL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
100 [B2056_SYN_RCCAL_CTRL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
101 [B2056_SYN_RCCAL_CTRL7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
102 [B2056_SYN_RCCAL_CTRL8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
103 [B2056_SYN_RCCAL_CTRL9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
104 [B2056_SYN_RCCAL_CTRL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
105 [B2056_SYN_RCCAL_CTRL11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
106 [B2056_SYN_ZCAL_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
107 [B2056_SYN_ZCAL_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
108 [B2056_SYN_PLL_MAST1] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
109 [B2056_SYN_PLL_MAST2] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
110 [B2056_SYN_PLL_MAST3] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
111 [B2056_SYN_PLL_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
112 [B2056_SYN_PLL_XTAL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
113 [B2056_SYN_PLL_XTAL1] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
114 [B2056_SYN_PLL_XTAL3] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
115 [B2056_SYN_PLL_XTAL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
116 [B2056_SYN_PLL_XTAL5] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
117 [B2056_SYN_PLL_XTAL6] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
118 [B2056_SYN_PLL_REFDIV] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
119 [B2056_SYN_PLL_PFD] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
120 [B2056_SYN_PLL_CP1] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
121 [B2056_SYN_PLL_CP2] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
122 [B2056_SYN_PLL_CP3] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
123 [B2056_SYN_PLL_LOOPFILTER1] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
124 [B2056_SYN_PLL_LOOPFILTER2] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
125 [B2056_SYN_PLL_LOOPFILTER3] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
126 [B2056_SYN_PLL_LOOPFILTER4] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
127 [B2056_SYN_PLL_LOOPFILTER5] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
128 [B2056_SYN_PLL_MMD1] = { .ghz5 = 0x001c, .ghz2 = 0x001c, NOUPLOAD, },
129 [B2056_SYN_PLL_MMD2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
130 [B2056_SYN_PLL_VCO1] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
131 [B2056_SYN_PLL_VCO2] = { .ghz5 = 0x00f7, .ghz2 = 0x00f7, UPLOAD, },
132 [B2056_SYN_PLL_MONITOR1] = { .ghz5 = 0x00b4, .ghz2 = 0x00b4, NOUPLOAD, },
133 [B2056_SYN_PLL_MONITOR2] = { .ghz5 = 0x00d2, .ghz2 = 0x00d2, NOUPLOAD, },
134 [B2056_SYN_PLL_VCOCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
135 [B2056_SYN_PLL_VCOCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
136 [B2056_SYN_PLL_VCOCAL4] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
137 [B2056_SYN_PLL_VCOCAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
138 [B2056_SYN_PLL_VCOCAL6] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
139 [B2056_SYN_PLL_VCOCAL7] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
140 [B2056_SYN_PLL_VCOCAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
141 [B2056_SYN_PLL_VCOCAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
142 [B2056_SYN_PLL_VCOCAL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
143 [B2056_SYN_PLL_VCOCAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
144 [B2056_SYN_PLL_VCOCAL12] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
145 [B2056_SYN_PLL_VCOCAL13] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
146 [B2056_SYN_PLL_VREG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
147 [B2056_SYN_PLL_STATUS1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
148 [B2056_SYN_PLL_STATUS2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
149 [B2056_SYN_PLL_STATUS3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
150 [B2056_SYN_LOGEN_PU0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
151 [B2056_SYN_LOGEN_PU1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
152 [B2056_SYN_LOGEN_PU2] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
153 [B2056_SYN_LOGEN_PU3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
154 [B2056_SYN_LOGEN_PU5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
155 [B2056_SYN_LOGEN_PU6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
156 [B2056_SYN_LOGEN_PU7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
157 [B2056_SYN_LOGEN_PU8] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
158 [B2056_SYN_LOGEN_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
159 [B2056_SYN_LOGEN_RCCR1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
160 [B2056_SYN_LOGEN_VCOBUF1] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
161 [B2056_SYN_LOGEN_MIXER1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
162 [B2056_SYN_LOGEN_MIXER2] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
163 [B2056_SYN_LOGEN_BUF1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
164 [B2056_SYN_LOGENBUF2] = { .ghz5 = 0x008f, .ghz2 = 0x008f, UPLOAD, },
165 [B2056_SYN_LOGEN_BUF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
166 [B2056_SYN_LOGEN_BUF4] = { .ghz5 = 0x00cc, .ghz2 = 0x00cc, NOUPLOAD, },
167 [B2056_SYN_LOGEN_DIV1] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
168 [B2056_SYN_LOGEN_DIV2] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
169 [B2056_SYN_LOGEN_DIV3] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
170 [B2056_SYN_LOGEN_ACL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
171 [B2056_SYN_LOGEN_ACL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
172 [B2056_SYN_LOGEN_ACL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
173 [B2056_SYN_LOGEN_ACL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
174 [B2056_SYN_LOGEN_ACL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
175 [B2056_SYN_LOGEN_ACL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
176 [B2056_SYN_LOGEN_ACLOUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
177 [B2056_SYN_LOGEN_ACLCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
178 [B2056_SYN_LOGEN_ACLCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
179 [B2056_SYN_LOGEN_ACLCAL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
180 [B2056_SYN_CALEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
181 [B2056_SYN_LOGEN_PEAKDET1] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, NOUPLOAD, },
182 [B2056_SYN_LOGEN_CORE_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
183 [B2056_SYN_LOGEN_RX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
184 [B2056_SYN_LOGEN_TX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
185 [B2056_SYN_LOGEN_RX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
186 [B2056_SYN_LOGEN_TX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
187 [B2056_SYN_LOGEN_VCOBUF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
188 [B2056_SYN_LOGEN_MIXER3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
189 [B2056_SYN_LOGEN_BUF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
190 [B2056_SYN_LOGEN_BUF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
191 [B2056_SYN_LOGEN_CBUFRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
192 [B2056_SYN_LOGEN_CBUFRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
193 [B2056_SYN_LOGEN_CBUFRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
194 [B2056_SYN_LOGEN_CBUFRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
195 [B2056_SYN_LOGEN_CBUFTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
196 [B2056_SYN_LOGEN_CBUFTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
197 [B2056_SYN_LOGEN_CBUFTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
198 [B2056_SYN_LOGEN_CBUFTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
199 [B2056_SYN_LOGEN_CMOSRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
200 [B2056_SYN_LOGEN_CMOSRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
201 [B2056_SYN_LOGEN_CMOSRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
202 [B2056_SYN_LOGEN_CMOSRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
203 [B2056_SYN_LOGEN_CMOSTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
204 [B2056_SYN_LOGEN_CMOSTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
205 [B2056_SYN_LOGEN_CMOSTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
206 [B2056_SYN_LOGEN_CMOSTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
207 [B2056_SYN_LOGEN_VCOBUF2_OVRVAL]= { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
208 [B2056_SYN_LOGEN_MIXER3_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
209 [B2056_SYN_LOGEN_BUF5_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
210 [B2056_SYN_LOGEN_BUF6_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
211 [B2056_SYN_LOGEN_CBUFRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
212 [B2056_SYN_LOGEN_CBUFRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
213 [B2056_SYN_LOGEN_CBUFRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
214 [B2056_SYN_LOGEN_CBUFRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
215 [B2056_SYN_LOGEN_CBUFTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
216 [B2056_SYN_LOGEN_CBUFTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
217 [B2056_SYN_LOGEN_CBUFTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
218 [B2056_SYN_LOGEN_CBUFTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
219 [B2056_SYN_LOGEN_CMOSRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
220 [B2056_SYN_LOGEN_CMOSRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
221 [B2056_SYN_LOGEN_CMOSRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
222 [B2056_SYN_LOGEN_CMOSRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
223 [B2056_SYN_LOGEN_CMOSTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
224 [B2056_SYN_LOGEN_CMOSTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
225 [B2056_SYN_LOGEN_CMOSTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
226 [B2056_SYN_LOGEN_CMOSTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
227 [B2056_SYN_LOGEN_ACL_WAITCNT] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
228 [B2056_SYN_LOGEN_CORE_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
229 [B2056_SYN_LOGEN_RX_CMOS_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
230 [B2056_SYN_LOGEN_TX_CMOS_VALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
231};
232
233static const struct b2056_inittab_entry b2056_inittab_rev3_tx[] = {
234 [B2056_TX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
235 [B2056_TX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
236 [B2056_TX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
237 [B2056_TX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
238 [B2056_TX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
239 [B2056_TX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
240 [B2056_TX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
241 [B2056_TX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
242 [B2056_TX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
243 [B2056_TX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
244 [B2056_TX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
245 [B2056_TX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
246 [B2056_TX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
247 [B2056_TX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
248 [B2056_TX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
249 [B2056_TX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
250 [B2056_TX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
251 [B2056_TX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
252 [B2056_TX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
253 [B2056_TX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
254 [B2056_TX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
255 [B2056_TX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
256 [B2056_TX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
257 [B2056_TX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
258 [B2056_TX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
259 [B2056_TX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
260 [B2056_TX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
261 [B2056_TX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
262 [B2056_TX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
263 [B2056_TX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
264 [B2056_TX_IQCAL_GAIN_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
265 [B2056_TX_LOFT_FINE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
266 [B2056_TX_LOFT_FINE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
267 [B2056_TX_LOFT_COARSE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
268 [B2056_TX_LOFT_COARSE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
269 [B2056_TX_TX_COM_MASTER1] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
270 [B2056_TX_TX_COM_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
271 [B2056_TX_RXIQCAL_TXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
272 [B2056_TX_TX_SSI_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
273 [B2056_TX_IQCAL_VCM_HG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
274 [B2056_TX_IQCAL_IDAC] = { .ghz5 = 0x0037, .ghz2 = 0x0037, NOUPLOAD, },
275 [B2056_TX_TSSI_VCM] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
276 [B2056_TX_TX_AMP_DET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
277 [B2056_TX_TX_SSI_MUX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
278 [B2056_TX_TSSIA] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
279 [B2056_TX_TSSIG] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
280 [B2056_TX_TSSI_MISC1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
281 [B2056_TX_TSSI_MISC2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
282 [B2056_TX_TSSI_MISC3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
283 [B2056_TX_PA_SPARE1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
284 [B2056_TX_PA_SPARE2] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
285 [B2056_TX_INTPAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
286 [B2056_TX_INTPAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
287 [B2056_TX_INTPAA_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
288 [B2056_TX_INTPAA_IAUX_STAT] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
289 [B2056_TX_INTPAA_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
290 [B2056_TX_INTPAA_IMAIN_STAT] = { .ghz5 = 0x002d, .ghz2 = 0x002d, NOUPLOAD, },
291 [B2056_TX_INTPAA_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
292 [B2056_TX_INTPAA_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
293 [B2056_TX_INTPAA_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
294 [B2056_TX_INTPAA_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
295 [B2056_TX_INTPAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
296 [B2056_TX_INTPAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
297 [B2056_TX_INTPAG_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
298 [B2056_TX_INTPAG_IAUX_STAT] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
299 [B2056_TX_INTPAG_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
300 [B2056_TX_INTPAG_IMAIN_STAT] = { .ghz5 = 0x001e, .ghz2 = 0x001e, NOUPLOAD, },
301 [B2056_TX_INTPAG_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
302 [B2056_TX_INTPAG_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
303 [B2056_TX_INTPAG_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
304 [B2056_TX_INTPAG_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
305 [B2056_TX_PADA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
306 [B2056_TX_PADA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
307 [B2056_TX_PADA_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
308 [B2056_TX_PADA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
309 [B2056_TX_PADA_BOOST_TUNE] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
310 [B2056_TX_PADA_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
311 [B2056_TX_PADG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
312 [B2056_TX_PADG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
313 [B2056_TX_PADG_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
314 [B2056_TX_PADG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
315 [B2056_TX_PADG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
316 [B2056_TX_PADG_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
317 [B2056_TX_PGAA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
318 [B2056_TX_PGAA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
319 [B2056_TX_PGAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
320 [B2056_TX_PGAA_BOOST_TUNE] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
321 [B2056_TX_PGAA_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
322 [B2056_TX_PGAA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
323 [B2056_TX_PGAG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
324 [B2056_TX_PGAG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
325 [B2056_TX_PGAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
326 [B2056_TX_PGAG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
327 [B2056_TX_PGAG_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
328 [B2056_TX_PGAG_MISC] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
329 [B2056_TX_MIXA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
330 [B2056_TX_MIXA_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
331 [B2056_TX_MIXG] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
332 [B2056_TX_MIXG_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
333 [B2056_TX_BB_GM_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
334 [B2056_TX_GMBB_GM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
335 [B2056_TX_GMBB_IDAC] = { .ghz5 = 0x0074, .ghz2 = 0x0074, UPLOAD, },
336 [B2056_TX_TXLPF_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
337 [B2056_TX_TXLPF_RCCAL] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
338 [B2056_TX_TXLPF_RCCAL_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
339 [B2056_TX_TXLPF_RCCAL_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
340 [B2056_TX_TXLPF_RCCAL_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
341 [B2056_TX_TXLPF_RCCAL_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
342 [B2056_TX_TXLPF_RCCAL_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
343 [B2056_TX_TXLPF_RCCAL_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
344 [B2056_TX_TXLPF_RCCAL_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
345 [B2056_TX_TXLPF_BW] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
346 [B2056_TX_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
347 [B2056_TX_TXLPF_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
348 [B2056_TX_TXLPF_IDAC_0] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
349 [B2056_TX_TXLPF_IDAC_1] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
350 [B2056_TX_TXLPF_IDAC_2] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
351 [B2056_TX_TXLPF_IDAC_3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
352 [B2056_TX_TXLPF_IDAC_4] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
353 [B2056_TX_TXLPF_IDAC_5] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
354 [B2056_TX_TXLPF_IDAC_6] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
355 [B2056_TX_TXLPF_OPAMP_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
356 [B2056_TX_TXLPF_MISC] = { .ghz5 = 0x005b, .ghz2 = 0x005b, NOUPLOAD, },
357 [B2056_TX_TXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
358 [B2056_TX_TXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
359 [B2056_TX_TXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
360 [B2056_TX_TXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
361 [B2056_TX_TXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
362 [B2056_TX_TXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
363 [B2056_TX_TXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
364 [B2056_TX_TXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
365 [B2056_TX_TXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
366 [B2056_TX_TXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
367 [B2056_TX_TXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
368 [B2056_TX_TXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
369 [B2056_TX_TXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
370 [B2056_TX_TXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
371 [B2056_TX_TXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
372 [B2056_TX_TXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
373 [B2056_TX_STATUS_INTPA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
374 [B2056_TX_STATUS_PAD_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
375 [B2056_TX_STATUS_PGA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
376 [B2056_TX_STATUS_GM_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
377 [B2056_TX_STATUS_TXLPF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
378 [B2056_TX_STATUS_TXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
379};
380
381static const struct b2056_inittab_entry b2056_inittab_rev3_rx[] = {
382 [B2056_RX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
383 [B2056_RX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
384 [B2056_RX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
385 [B2056_RX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
386 [B2056_RX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
387 [B2056_RX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
388 [B2056_RX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
389 [B2056_RX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
390 [B2056_RX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
391 [B2056_RX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
392 [B2056_RX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
393 [B2056_RX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
394 [B2056_RX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
395 [B2056_RX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
396 [B2056_RX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
397 [B2056_RX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
398 [B2056_RX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
399 [B2056_RX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
400 [B2056_RX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
401 [B2056_RX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
402 [B2056_RX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
403 [B2056_RX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
404 [B2056_RX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
405 [B2056_RX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
406 [B2056_RX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
407 [B2056_RX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
408 [B2056_RX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
409 [B2056_RX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
410 [B2056_RX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
411 [B2056_RX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
412 [B2056_RX_RXIQCAL_RXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
413 [B2056_RX_RSSI_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
414 [B2056_RX_RSSI_SEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
415 [B2056_RX_RSSI_GAIN] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
416 [B2056_RX_RSSI_NB_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
417 [B2056_RX_RSSI_WB2I_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
418 [B2056_RX_RSSI_WB2I_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
419 [B2056_RX_RSSI_WB2Q_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
420 [B2056_RX_RSSI_WB2Q_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
421 [B2056_RX_RSSI_POLE] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
422 [B2056_RX_RSSI_WB1_IDAC] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
423 [B2056_RX_RSSI_MISC] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
424 [B2056_RX_LNAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
425 [B2056_RX_LNAA_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
426 [B2056_RX_LNAA_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
427 [B2056_RX_LNA_A_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
428 [B2056_RX_BIASPOLE_LNAA1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
429 [B2056_RX_LNAA2_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
430 [B2056_RX_LNA1A_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
431 [B2056_RX_LNAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
432 [B2056_RX_LNAG_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
433 [B2056_RX_LNAG_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
434 [B2056_RX_LNA_G_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
435 [B2056_RX_BIASPOLE_LNAG1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
436 [B2056_RX_LNAG2_IDAC] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
437 [B2056_RX_LNA1G_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
438 [B2056_RX_MIXA_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
439 [B2056_RX_MIXA_VCM] = { .ghz5 = 0x0099, .ghz2 = 0x0099, NOUPLOAD, },
440 [B2056_RX_MIXA_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
441 [B2056_RX_MIXA_LOB_BIAS] = { .ghz5 = 0x0044, .ghz2 = 0x0044, UPLOAD, },
442 [B2056_RX_MIXA_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
443 [B2056_RX_MIXA_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
444 [B2056_RX_MIXA_BIAS_AUX] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
445 [B2056_RX_MIXA_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
446 [B2056_RX_MIXA_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
447 [B2056_RX_MIXA_MAST_BIAS] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
448 [B2056_RX_MIXG_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
449 [B2056_RX_MIXG_VCM] = { .ghz5 = 0x0099, .ghz2 = 0x0099, NOUPLOAD, },
450 [B2056_RX_MIXG_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
451 [B2056_RX_MIXG_LOB_BIAS] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
452 [B2056_RX_MIXG_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
453 [B2056_RX_MIXG_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
454 [B2056_RX_MIXG_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
455 [B2056_RX_MIXG_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
456 [B2056_RX_MIXG_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
457 [B2056_RX_MIXG_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
458 [B2056_RX_TIA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
459 [B2056_RX_TIA_IOPAMP] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
460 [B2056_RX_TIA_QOPAMP] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
461 [B2056_RX_TIA_IMISC] = { .ghz5 = 0x0057, .ghz2 = 0x0057, NOUPLOAD, },
462 [B2056_RX_TIA_QMISC] = { .ghz5 = 0x0057, .ghz2 = 0x0057, NOUPLOAD, },
463 [B2056_RX_TIA_GAIN] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
464 [B2056_RX_TIA_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
465 [B2056_RX_TIA_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
466 [B2056_RX_BB_LPF_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
467 [B2056_RX_AACI_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
468 [B2056_RX_RXLPF_IDAC] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
469 [B2056_RX_RXLPF_OPAMPBIAS_LOWQ] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
470 [B2056_RX_RXLPF_OPAMPBIAS_HIGHQ]= { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
471 [B2056_RX_RXLPF_BIAS_DCCANCEL] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
472 [B2056_RX_RXLPF_OUTVCM] = { .ghz5 = 0x0023, .ghz2 = 0x0023, NOUPLOAD, },
473 [B2056_RX_RXLPF_INVCM_BODY] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
474 [B2056_RX_RXLPF_CC_OP] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
475 [B2056_RX_RXLPF_GAIN] = { .ghz5 = 0x0023, .ghz2 = 0x0023, NOUPLOAD, },
476 [B2056_RX_RXLPF_Q_BW] = { .ghz5 = 0x0041, .ghz2 = 0x0041, NOUPLOAD, },
477 [B2056_RX_RXLPF_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
478 [B2056_RX_RXLPF_RCCAL_HPC] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
479 [B2056_RX_RXHPF_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
480 [B2056_RX_RXHPF_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
481 [B2056_RX_RXHPF_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
482 [B2056_RX_RXHPF_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
483 [B2056_RX_RXHPF_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
484 [B2056_RX_RXHPF_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
485 [B2056_RX_RXHPF_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
486 [B2056_RX_RXHPF_OFF7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
487 [B2056_RX_RXLPF_RCCAL_LPC] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
488 [B2056_RX_RXLPF_OFF_0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
489 [B2056_RX_RXLPF_OFF_1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
490 [B2056_RX_RXLPF_OFF_2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
491 [B2056_RX_RXLPF_OFF_3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
492 [B2056_RX_RXLPF_OFF_4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
493 [B2056_RX_UNUSED] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
494 [B2056_RX_VGA_MASTER] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
495 [B2056_RX_VGA_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
496 [B2056_RX_VGA_BIAS_DCCANCEL] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
497 [B2056_RX_VGA_GAIN] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
498 [B2056_RX_VGA_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
499 [B2056_RX_VGABUF_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
500 [B2056_RX_VGABUF_GAIN_BW] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
501 [B2056_RX_TXFBMIX_A] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
502 [B2056_RX_TXFBMIX_G] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
503 [B2056_RX_RXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
504 [B2056_RX_RXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
505 [B2056_RX_RXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
506 [B2056_RX_RXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
507 [B2056_RX_RXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
508 [B2056_RX_RXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
509 [B2056_RX_RXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
510 [B2056_RX_RXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
511 [B2056_RX_RXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
512 [B2056_RX_RXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
513 [B2056_RX_RXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
514 [B2056_RX_RXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
515 [B2056_RX_RXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
516 [B2056_RX_RXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
517 [B2056_RX_RXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
518 [B2056_RX_RXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
519 [B2056_RX_STATUS_LNAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
520 [B2056_RX_STATUS_LNAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
521 [B2056_RX_STATUS_MIXTIA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
522 [B2056_RX_STATUS_RXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
523 [B2056_RX_STATUS_VGA_BUF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
524 [B2056_RX_STATUS_RXLPF_Q] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
525 [B2056_RX_STATUS_RXLPF_BUF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
526 [B2056_RX_STATUS_RXLPF_VGA_HPC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
527 [B2056_RX_STATUS_RXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
528 [B2056_RX_STATUS_HPC_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
529};
530
531static const struct b2056_inittab_entry b2056_inittab_rev4_syn[] = {
532 [B2056_SYN_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
533 [B2056_SYN_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
534 [B2056_SYN_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
535 [B2056_SYN_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
536 [B2056_SYN_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
537 [B2056_SYN_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
538 [B2056_SYN_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
539 [B2056_SYN_COM_PU] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
540 [B2056_SYN_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
541 [B2056_SYN_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
542 [B2056_SYN_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
543 [B2056_SYN_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
544 [B2056_SYN_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
545 [B2056_SYN_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
546 [B2056_SYN_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
547 [B2056_SYN_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
548 [B2056_SYN_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
549 [B2056_SYN_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
550 [B2056_SYN_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
551 [B2056_SYN_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
552 [B2056_SYN_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
553 [B2056_SYN_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
554 [B2056_SYN_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
555 [B2056_SYN_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
556 [B2056_SYN_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
557 [B2056_SYN_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
558 [B2056_SYN_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
559 [B2056_SYN_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
560 [B2056_SYN_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
561 [B2056_SYN_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
562 [B2056_SYN_GPIO_MASTER1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
563 [B2056_SYN_GPIO_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
564 [B2056_SYN_TOPBIAS_MASTER] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
565 [B2056_SYN_TOPBIAS_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
566 [B2056_SYN_AFEREG] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
567 [B2056_SYN_TEMPPROCSENSE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
568 [B2056_SYN_TEMPPROCSENSEIDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
569 [B2056_SYN_TEMPPROCSENSERCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
570 [B2056_SYN_LPO] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
571 [B2056_SYN_VDDCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
572 [B2056_SYN_VDDCAL_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
573 [B2056_SYN_VDDCAL_STATUS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
574 [B2056_SYN_RCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
575 [B2056_SYN_RCAL_CODE_OUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
576 [B2056_SYN_RCCAL_CTRL0] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
577 [B2056_SYN_RCCAL_CTRL1] = { .ghz5 = 0x001f, .ghz2 = 0x001f, NOUPLOAD, },
578 [B2056_SYN_RCCAL_CTRL2] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
579 [B2056_SYN_RCCAL_CTRL3] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
580 [B2056_SYN_RCCAL_CTRL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
581 [B2056_SYN_RCCAL_CTRL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
582 [B2056_SYN_RCCAL_CTRL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
583 [B2056_SYN_RCCAL_CTRL7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
584 [B2056_SYN_RCCAL_CTRL8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
585 [B2056_SYN_RCCAL_CTRL9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
586 [B2056_SYN_RCCAL_CTRL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
587 [B2056_SYN_RCCAL_CTRL11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
588 [B2056_SYN_ZCAL_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
589 [B2056_SYN_ZCAL_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
590 [B2056_SYN_PLL_MAST1] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
591 [B2056_SYN_PLL_MAST2] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
592 [B2056_SYN_PLL_MAST3] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
593 [B2056_SYN_PLL_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
594 [B2056_SYN_PLL_XTAL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
595 [B2056_SYN_PLL_XTAL1] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
596 [B2056_SYN_PLL_XTAL3] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
597 [B2056_SYN_PLL_XTAL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
598 [B2056_SYN_PLL_XTAL5] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
599 [B2056_SYN_PLL_XTAL6] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
600 [B2056_SYN_PLL_REFDIV] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
601 [B2056_SYN_PLL_PFD] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
602 [B2056_SYN_PLL_CP1] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
603 [B2056_SYN_PLL_CP2] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
604 [B2056_SYN_PLL_CP3] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
605 [B2056_SYN_PLL_LOOPFILTER1] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
606 [B2056_SYN_PLL_LOOPFILTER2] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
607 [B2056_SYN_PLL_LOOPFILTER3] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
608 [B2056_SYN_PLL_LOOPFILTER4] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
609 [B2056_SYN_PLL_LOOPFILTER5] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
610 [B2056_SYN_PLL_MMD1] = { .ghz5 = 0x001c, .ghz2 = 0x001c, NOUPLOAD, },
611 [B2056_SYN_PLL_MMD2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
612 [B2056_SYN_PLL_VCO1] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
613 [B2056_SYN_PLL_VCO2] = { .ghz5 = 0x00f7, .ghz2 = 0x00f7, UPLOAD, },
614 [B2056_SYN_PLL_MONITOR1] = { .ghz5 = 0x00b4, .ghz2 = 0x00b4, NOUPLOAD, },
615 [B2056_SYN_PLL_MONITOR2] = { .ghz5 = 0x00d2, .ghz2 = 0x00d2, NOUPLOAD, },
616 [B2056_SYN_PLL_VCOCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
617 [B2056_SYN_PLL_VCOCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
618 [B2056_SYN_PLL_VCOCAL4] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
619 [B2056_SYN_PLL_VCOCAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
620 [B2056_SYN_PLL_VCOCAL6] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
621 [B2056_SYN_PLL_VCOCAL7] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
622 [B2056_SYN_PLL_VCOCAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
623 [B2056_SYN_PLL_VCOCAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
624 [B2056_SYN_PLL_VCOCAL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
625 [B2056_SYN_PLL_VCOCAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
626 [B2056_SYN_PLL_VCOCAL12] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
627 [B2056_SYN_PLL_VCOCAL13] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
628 [B2056_SYN_PLL_VREG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
629 [B2056_SYN_PLL_STATUS1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
630 [B2056_SYN_PLL_STATUS2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
631 [B2056_SYN_PLL_STATUS3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
632 [B2056_SYN_LOGEN_PU0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
633 [B2056_SYN_LOGEN_PU1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
634 [B2056_SYN_LOGEN_PU2] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
635 [B2056_SYN_LOGEN_PU3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
636 [B2056_SYN_LOGEN_PU5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
637 [B2056_SYN_LOGEN_PU6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
638 [B2056_SYN_LOGEN_PU7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
639 [B2056_SYN_LOGEN_PU8] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
640 [B2056_SYN_LOGEN_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
641 [B2056_SYN_LOGEN_RCCR1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
642 [B2056_SYN_LOGEN_VCOBUF1] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
643 [B2056_SYN_LOGEN_MIXER1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
644 [B2056_SYN_LOGEN_MIXER2] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
645 [B2056_SYN_LOGEN_BUF1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
646 [B2056_SYN_LOGENBUF2] = { .ghz5 = 0x008f, .ghz2 = 0x008f, UPLOAD, },
647 [B2056_SYN_LOGEN_BUF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
648 [B2056_SYN_LOGEN_BUF4] = { .ghz5 = 0x00cc, .ghz2 = 0x00cc, NOUPLOAD, },
649 [B2056_SYN_LOGEN_DIV1] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
650 [B2056_SYN_LOGEN_DIV2] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
651 [B2056_SYN_LOGEN_DIV3] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
652 [B2056_SYN_LOGEN_ACL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
653 [B2056_SYN_LOGEN_ACL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
654 [B2056_SYN_LOGEN_ACL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
655 [B2056_SYN_LOGEN_ACL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
656 [B2056_SYN_LOGEN_ACL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
657 [B2056_SYN_LOGEN_ACL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
658 [B2056_SYN_LOGEN_ACLOUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
659 [B2056_SYN_LOGEN_ACLCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
660 [B2056_SYN_LOGEN_ACLCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
661 [B2056_SYN_LOGEN_ACLCAL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
662 [B2056_SYN_CALEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
663 [B2056_SYN_LOGEN_PEAKDET1] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, NOUPLOAD, },
664 [B2056_SYN_LOGEN_CORE_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
665 [B2056_SYN_LOGEN_RX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
666 [B2056_SYN_LOGEN_TX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
667 [B2056_SYN_LOGEN_RX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
668 [B2056_SYN_LOGEN_TX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
669 [B2056_SYN_LOGEN_VCOBUF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
670 [B2056_SYN_LOGEN_MIXER3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
671 [B2056_SYN_LOGEN_BUF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
672 [B2056_SYN_LOGEN_BUF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
673 [B2056_SYN_LOGEN_CBUFRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
674 [B2056_SYN_LOGEN_CBUFRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
675 [B2056_SYN_LOGEN_CBUFRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
676 [B2056_SYN_LOGEN_CBUFRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
677 [B2056_SYN_LOGEN_CBUFTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
678 [B2056_SYN_LOGEN_CBUFTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
679 [B2056_SYN_LOGEN_CBUFTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
680 [B2056_SYN_LOGEN_CBUFTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
681 [B2056_SYN_LOGEN_CMOSRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
682 [B2056_SYN_LOGEN_CMOSRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
683 [B2056_SYN_LOGEN_CMOSRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
684 [B2056_SYN_LOGEN_CMOSRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
685 [B2056_SYN_LOGEN_CMOSTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
686 [B2056_SYN_LOGEN_CMOSTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
687 [B2056_SYN_LOGEN_CMOSTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
688 [B2056_SYN_LOGEN_CMOSTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
689 [B2056_SYN_LOGEN_VCOBUF2_OVRVAL]= { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
690 [B2056_SYN_LOGEN_MIXER3_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
691 [B2056_SYN_LOGEN_BUF5_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
692 [B2056_SYN_LOGEN_BUF6_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
693 [B2056_SYN_LOGEN_CBUFRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
694 [B2056_SYN_LOGEN_CBUFRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
695 [B2056_SYN_LOGEN_CBUFRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
696 [B2056_SYN_LOGEN_CBUFRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
697 [B2056_SYN_LOGEN_CBUFTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
698 [B2056_SYN_LOGEN_CBUFTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
699 [B2056_SYN_LOGEN_CBUFTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
700 [B2056_SYN_LOGEN_CBUFTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
701 [B2056_SYN_LOGEN_CMOSRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
702 [B2056_SYN_LOGEN_CMOSRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
703 [B2056_SYN_LOGEN_CMOSRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
704 [B2056_SYN_LOGEN_CMOSRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
705 [B2056_SYN_LOGEN_CMOSTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
706 [B2056_SYN_LOGEN_CMOSTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
707 [B2056_SYN_LOGEN_CMOSTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
708 [B2056_SYN_LOGEN_CMOSTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
709 [B2056_SYN_LOGEN_ACL_WAITCNT] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
710 [B2056_SYN_LOGEN_CORE_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
711 [B2056_SYN_LOGEN_RX_CMOS_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
712 [B2056_SYN_LOGEN_TX_CMOS_VALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
713};
714
715static const struct b2056_inittab_entry b2056_inittab_rev4_tx[] = {
716 [B2056_TX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
717 [B2056_TX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
718 [B2056_TX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
719 [B2056_TX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
720 [B2056_TX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
721 [B2056_TX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
722 [B2056_TX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
723 [B2056_TX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
724 [B2056_TX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
725 [B2056_TX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
726 [B2056_TX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
727 [B2056_TX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
728 [B2056_TX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
729 [B2056_TX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
730 [B2056_TX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
731 [B2056_TX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
732 [B2056_TX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
733 [B2056_TX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
734 [B2056_TX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
735 [B2056_TX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
736 [B2056_TX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
737 [B2056_TX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
738 [B2056_TX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
739 [B2056_TX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
740 [B2056_TX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
741 [B2056_TX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
742 [B2056_TX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
743 [B2056_TX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
744 [B2056_TX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
745 [B2056_TX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
746 [B2056_TX_IQCAL_GAIN_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
747 [B2056_TX_LOFT_FINE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
748 [B2056_TX_LOFT_FINE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
749 [B2056_TX_LOFT_COARSE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
750 [B2056_TX_LOFT_COARSE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
751 [B2056_TX_TX_COM_MASTER1] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
752 [B2056_TX_TX_COM_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
753 [B2056_TX_RXIQCAL_TXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
754 [B2056_TX_TX_SSI_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
755 [B2056_TX_IQCAL_VCM_HG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
756 [B2056_TX_IQCAL_IDAC] = { .ghz5 = 0x0037, .ghz2 = 0x0037, NOUPLOAD, },
757 [B2056_TX_TSSI_VCM] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
758 [B2056_TX_TX_AMP_DET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
759 [B2056_TX_TX_SSI_MUX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
760 [B2056_TX_TSSIA] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
761 [B2056_TX_TSSIG] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
762 [B2056_TX_TSSI_MISC1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
763 [B2056_TX_TSSI_MISC2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
764 [B2056_TX_TSSI_MISC3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
765 [B2056_TX_PA_SPARE1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
766 [B2056_TX_PA_SPARE2] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
767 [B2056_TX_INTPAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
768 [B2056_TX_INTPAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
769 [B2056_TX_INTPAA_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
770 [B2056_TX_INTPAA_IAUX_STAT] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
771 [B2056_TX_INTPAA_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
772 [B2056_TX_INTPAA_IMAIN_STAT] = { .ghz5 = 0x002d, .ghz2 = 0x002d, NOUPLOAD, },
773 [B2056_TX_INTPAA_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
774 [B2056_TX_INTPAA_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
775 [B2056_TX_INTPAA_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
776 [B2056_TX_INTPAA_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
777 [B2056_TX_INTPAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
778 [B2056_TX_INTPAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
779 [B2056_TX_INTPAG_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
780 [B2056_TX_INTPAG_IAUX_STAT] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
781 [B2056_TX_INTPAG_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
782 [B2056_TX_INTPAG_IMAIN_STAT] = { .ghz5 = 0x001e, .ghz2 = 0x001e, NOUPLOAD, },
783 [B2056_TX_INTPAG_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
784 [B2056_TX_INTPAG_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
785 [B2056_TX_INTPAG_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
786 [B2056_TX_INTPAG_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
787 [B2056_TX_PADA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
788 [B2056_TX_PADA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
789 [B2056_TX_PADA_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
790 [B2056_TX_PADA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
791 [B2056_TX_PADA_BOOST_TUNE] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
792 [B2056_TX_PADA_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
793 [B2056_TX_PADG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
794 [B2056_TX_PADG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
795 [B2056_TX_PADG_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
796 [B2056_TX_PADG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
797 [B2056_TX_PADG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
798 [B2056_TX_PADG_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
799 [B2056_TX_PGAA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
800 [B2056_TX_PGAA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
801 [B2056_TX_PGAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
802 [B2056_TX_PGAA_BOOST_TUNE] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
803 [B2056_TX_PGAA_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
804 [B2056_TX_PGAA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
805 [B2056_TX_PGAG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
806 [B2056_TX_PGAG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
807 [B2056_TX_PGAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
808 [B2056_TX_PGAG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
809 [B2056_TX_PGAG_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
810 [B2056_TX_PGAG_MISC] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
811 [B2056_TX_MIXA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
812 [B2056_TX_MIXA_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
813 [B2056_TX_MIXG] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
814 [B2056_TX_MIXG_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
815 [B2056_TX_BB_GM_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
816 [B2056_TX_GMBB_GM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
817 [B2056_TX_GMBB_IDAC] = { .ghz5 = 0x0072, .ghz2 = 0x0072, UPLOAD, },
818 [B2056_TX_TXLPF_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
819 [B2056_TX_TXLPF_RCCAL] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
820 [B2056_TX_TXLPF_RCCAL_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
821 [B2056_TX_TXLPF_RCCAL_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
822 [B2056_TX_TXLPF_RCCAL_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
823 [B2056_TX_TXLPF_RCCAL_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
824 [B2056_TX_TXLPF_RCCAL_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
825 [B2056_TX_TXLPF_RCCAL_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
826 [B2056_TX_TXLPF_RCCAL_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
827 [B2056_TX_TXLPF_BW] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
828 [B2056_TX_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
829 [B2056_TX_TXLPF_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
830 [B2056_TX_TXLPF_IDAC_0] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
831 [B2056_TX_TXLPF_IDAC_1] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
832 [B2056_TX_TXLPF_IDAC_2] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
833 [B2056_TX_TXLPF_IDAC_3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
834 [B2056_TX_TXLPF_IDAC_4] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
835 [B2056_TX_TXLPF_IDAC_5] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
836 [B2056_TX_TXLPF_IDAC_6] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
837 [B2056_TX_TXLPF_OPAMP_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
838 [B2056_TX_TXLPF_MISC] = { .ghz5 = 0x005b, .ghz2 = 0x005b, NOUPLOAD, },
839 [B2056_TX_TXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
840 [B2056_TX_TXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
841 [B2056_TX_TXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
842 [B2056_TX_TXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
843 [B2056_TX_TXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
844 [B2056_TX_TXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
845 [B2056_TX_TXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
846 [B2056_TX_TXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
847 [B2056_TX_TXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
848 [B2056_TX_TXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
849 [B2056_TX_TXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
850 [B2056_TX_TXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
851 [B2056_TX_TXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
852 [B2056_TX_TXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
853 [B2056_TX_TXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
854 [B2056_TX_TXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
855 [B2056_TX_STATUS_INTPA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
856 [B2056_TX_STATUS_PAD_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
857 [B2056_TX_STATUS_PGA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
858 [B2056_TX_STATUS_GM_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
859 [B2056_TX_STATUS_TXLPF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
860 [B2056_TX_STATUS_TXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
861};
862
863static const struct b2056_inittab_entry b2056_inittab_rev4_rx[] = {
864 [B2056_RX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
865 [B2056_RX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
866 [B2056_RX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
867 [B2056_RX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
868 [B2056_RX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
869 [B2056_RX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
870 [B2056_RX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
871 [B2056_RX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
872 [B2056_RX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
873 [B2056_RX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
874 [B2056_RX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
875 [B2056_RX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
876 [B2056_RX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
877 [B2056_RX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
878 [B2056_RX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
879 [B2056_RX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
880 [B2056_RX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
881 [B2056_RX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
882 [B2056_RX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
883 [B2056_RX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
884 [B2056_RX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
885 [B2056_RX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
886 [B2056_RX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
887 [B2056_RX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
888 [B2056_RX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
889 [B2056_RX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
890 [B2056_RX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
891 [B2056_RX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
892 [B2056_RX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
893 [B2056_RX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
894 [B2056_RX_RXIQCAL_RXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
895 [B2056_RX_RSSI_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
896 [B2056_RX_RSSI_SEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
897 [B2056_RX_RSSI_GAIN] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
898 [B2056_RX_RSSI_NB_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
899 [B2056_RX_RSSI_WB2I_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
900 [B2056_RX_RSSI_WB2I_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
901 [B2056_RX_RSSI_WB2Q_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
902 [B2056_RX_RSSI_WB2Q_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
903 [B2056_RX_RSSI_POLE] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
904 [B2056_RX_RSSI_WB1_IDAC] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
905 [B2056_RX_RSSI_MISC] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
906 [B2056_RX_LNAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
907 [B2056_RX_LNAA_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
908 [B2056_RX_LNAA_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
909 [B2056_RX_LNA_A_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
910 [B2056_RX_BIASPOLE_LNAA1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
911 [B2056_RX_LNAA2_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
912 [B2056_RX_LNA1A_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
913 [B2056_RX_LNAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
914 [B2056_RX_LNAG_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
915 [B2056_RX_LNAG_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
916 [B2056_RX_LNA_G_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
917 [B2056_RX_BIASPOLE_LNAG1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
918 [B2056_RX_LNAG2_IDAC] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
919 [B2056_RX_LNA1G_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
920 [B2056_RX_MIXA_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
921 [B2056_RX_MIXA_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
922 [B2056_RX_MIXA_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
923 [B2056_RX_MIXA_LOB_BIAS] = { .ghz5 = 0x0044, .ghz2 = 0x0044, UPLOAD, },
924 [B2056_RX_MIXA_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
925 [B2056_RX_MIXA_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
926 [B2056_RX_MIXA_BIAS_AUX] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
927 [B2056_RX_MIXA_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
928 [B2056_RX_MIXA_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
929 [B2056_RX_MIXA_MAST_BIAS] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
930 [B2056_RX_MIXG_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
931 [B2056_RX_MIXG_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
932 [B2056_RX_MIXG_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
933 [B2056_RX_MIXG_LOB_BIAS] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
934 [B2056_RX_MIXG_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
935 [B2056_RX_MIXG_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
936 [B2056_RX_MIXG_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
937 [B2056_RX_MIXG_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
938 [B2056_RX_MIXG_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
939 [B2056_RX_MIXG_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
940 [B2056_RX_TIA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
941 [B2056_RX_TIA_IOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
942 [B2056_RX_TIA_QOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
943 [B2056_RX_TIA_IMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
944 [B2056_RX_TIA_QMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
945 [B2056_RX_TIA_GAIN] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
946 [B2056_RX_TIA_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
947 [B2056_RX_TIA_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
948 [B2056_RX_BB_LPF_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
949 [B2056_RX_AACI_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
950 [B2056_RX_RXLPF_IDAC] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
951 [B2056_RX_RXLPF_OPAMPBIAS_LOWQ] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
952 [B2056_RX_RXLPF_OPAMPBIAS_HIGHQ]= { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
953 [B2056_RX_RXLPF_BIAS_DCCANCEL] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
954 [B2056_RX_RXLPF_OUTVCM] = { .ghz5 = 0x002f, .ghz2 = 0x002f, UPLOAD, },
955 [B2056_RX_RXLPF_INVCM_BODY] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
956 [B2056_RX_RXLPF_CC_OP] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
957 [B2056_RX_RXLPF_GAIN] = { .ghz5 = 0x0023, .ghz2 = 0x0023, NOUPLOAD, },
958 [B2056_RX_RXLPF_Q_BW] = { .ghz5 = 0x0041, .ghz2 = 0x0041, NOUPLOAD, },
959 [B2056_RX_RXLPF_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
960 [B2056_RX_RXLPF_RCCAL_HPC] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
961 [B2056_RX_RXHPF_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
962 [B2056_RX_RXHPF_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
963 [B2056_RX_RXHPF_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
964 [B2056_RX_RXHPF_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
965 [B2056_RX_RXHPF_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
966 [B2056_RX_RXHPF_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
967 [B2056_RX_RXHPF_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
968 [B2056_RX_RXHPF_OFF7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
969 [B2056_RX_RXLPF_RCCAL_LPC] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
970 [B2056_RX_RXLPF_OFF_0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
971 [B2056_RX_RXLPF_OFF_1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
972 [B2056_RX_RXLPF_OFF_2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
973 [B2056_RX_RXLPF_OFF_3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
974 [B2056_RX_RXLPF_OFF_4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
975 [B2056_RX_UNUSED] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
976 [B2056_RX_VGA_MASTER] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
977 [B2056_RX_VGA_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
978 [B2056_RX_VGA_BIAS_DCCANCEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
979 [B2056_RX_VGA_GAIN] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
980 [B2056_RX_VGA_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
981 [B2056_RX_VGABUF_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
982 [B2056_RX_VGABUF_GAIN_BW] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
983 [B2056_RX_TXFBMIX_A] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
984 [B2056_RX_TXFBMIX_G] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
985 [B2056_RX_RXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
986 [B2056_RX_RXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
987 [B2056_RX_RXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
988 [B2056_RX_RXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
989 [B2056_RX_RXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
990 [B2056_RX_RXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
991 [B2056_RX_RXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
992 [B2056_RX_RXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
993 [B2056_RX_RXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
994 [B2056_RX_RXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
995 [B2056_RX_RXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
996 [B2056_RX_RXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
997 [B2056_RX_RXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
998 [B2056_RX_RXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
999 [B2056_RX_RXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1000 [B2056_RX_RXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1001 [B2056_RX_STATUS_LNAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1002 [B2056_RX_STATUS_LNAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1003 [B2056_RX_STATUS_MIXTIA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1004 [B2056_RX_STATUS_RXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1005 [B2056_RX_STATUS_VGA_BUF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1006 [B2056_RX_STATUS_RXLPF_Q] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1007 [B2056_RX_STATUS_RXLPF_BUF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1008 [B2056_RX_STATUS_RXLPF_VGA_HPC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1009 [B2056_RX_STATUS_RXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1010 [B2056_RX_STATUS_HPC_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1011};
1012
1013static const struct b2056_inittab_entry b2056_inittab_rev5_syn[] = {
1014 [B2056_SYN_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1015 [B2056_SYN_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1016 [B2056_SYN_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1017 [B2056_SYN_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1018 [B2056_SYN_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1019 [B2056_SYN_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1020 [B2056_SYN_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1021 [B2056_SYN_COM_PU] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1022 [B2056_SYN_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1023 [B2056_SYN_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1024 [B2056_SYN_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1025 [B2056_SYN_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1026 [B2056_SYN_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1027 [B2056_SYN_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1028 [B2056_SYN_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1029 [B2056_SYN_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1030 [B2056_SYN_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1031 [B2056_SYN_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1032 [B2056_SYN_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1033 [B2056_SYN_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1034 [B2056_SYN_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1035 [B2056_SYN_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1036 [B2056_SYN_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1037 [B2056_SYN_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1038 [B2056_SYN_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1039 [B2056_SYN_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1040 [B2056_SYN_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1041 [B2056_SYN_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1042 [B2056_SYN_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1043 [B2056_SYN_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1044 [B2056_SYN_GPIO_MASTER1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1045 [B2056_SYN_GPIO_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1046 [B2056_SYN_TOPBIAS_MASTER] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
1047 [B2056_SYN_TOPBIAS_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1048 [B2056_SYN_AFEREG] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1049 [B2056_SYN_TEMPPROCSENSE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1050 [B2056_SYN_TEMPPROCSENSEIDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1051 [B2056_SYN_TEMPPROCSENSERCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1052 [B2056_SYN_LPO] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1053 [B2056_SYN_VDDCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1054 [B2056_SYN_VDDCAL_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1055 [B2056_SYN_VDDCAL_STATUS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1056 [B2056_SYN_RCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1057 [B2056_SYN_RCAL_CODE_OUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1058 [B2056_SYN_RCCAL_CTRL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1059 [B2056_SYN_RCCAL_CTRL1] = { .ghz5 = 0x001f, .ghz2 = 0x001f, NOUPLOAD, },
1060 [B2056_SYN_RCCAL_CTRL2] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
1061 [B2056_SYN_RCCAL_CTRL3] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
1062 [B2056_SYN_RCCAL_CTRL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1063 [B2056_SYN_RCCAL_CTRL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1064 [B2056_SYN_RCCAL_CTRL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1065 [B2056_SYN_RCCAL_CTRL7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1066 [B2056_SYN_RCCAL_CTRL8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1067 [B2056_SYN_RCCAL_CTRL9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1068 [B2056_SYN_RCCAL_CTRL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1069 [B2056_SYN_RCCAL_CTRL11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1070 [B2056_SYN_ZCAL_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1071 [B2056_SYN_ZCAL_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1072 [B2056_SYN_PLL_MAST1] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1073 [B2056_SYN_PLL_MAST2] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
1074 [B2056_SYN_PLL_MAST3] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
1075 [B2056_SYN_PLL_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1076 [B2056_SYN_PLL_XTAL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1077 [B2056_SYN_PLL_XTAL1] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1078 [B2056_SYN_PLL_XTAL3] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1079 [B2056_SYN_PLL_XTAL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1080 [B2056_SYN_PLL_XTAL5] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
1081 [B2056_SYN_PLL_XTAL6] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1082 [B2056_SYN_PLL_REFDIV] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1083 [B2056_SYN_PLL_PFD] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1084 [B2056_SYN_PLL_CP1] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
1085 [B2056_SYN_PLL_CP2] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
1086 [B2056_SYN_PLL_CP3] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
1087 [B2056_SYN_PLL_LOOPFILTER1] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
1088 [B2056_SYN_PLL_LOOPFILTER2] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
1089 [B2056_SYN_PLL_LOOPFILTER3] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1090 [B2056_SYN_PLL_LOOPFILTER4] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1091 [B2056_SYN_PLL_LOOPFILTER5] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1092 [B2056_SYN_PLL_MMD1] = { .ghz5 = 0x001c, .ghz2 = 0x001c, NOUPLOAD, },
1093 [B2056_SYN_PLL_MMD2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1094 [B2056_SYN_PLL_VCO1] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1095 [B2056_SYN_PLL_VCO2] = { .ghz5 = 0x00f7, .ghz2 = 0x00f7, UPLOAD, },
1096 [B2056_SYN_PLL_MONITOR1] = { .ghz5 = 0x00b4, .ghz2 = 0x00b4, NOUPLOAD, },
1097 [B2056_SYN_PLL_MONITOR2] = { .ghz5 = 0x00d2, .ghz2 = 0x00d2, NOUPLOAD, },
1098 [B2056_SYN_PLL_VCOCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1099 [B2056_SYN_PLL_VCOCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1100 [B2056_SYN_PLL_VCOCAL4] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1101 [B2056_SYN_PLL_VCOCAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
1102 [B2056_SYN_PLL_VCOCAL6] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
1103 [B2056_SYN_PLL_VCOCAL7] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
1104 [B2056_SYN_PLL_VCOCAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1105 [B2056_SYN_PLL_VCOCAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1106 [B2056_SYN_PLL_VCOCAL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1107 [B2056_SYN_PLL_VCOCAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1108 [B2056_SYN_PLL_VCOCAL12] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
1109 [B2056_SYN_PLL_VCOCAL13] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1110 [B2056_SYN_PLL_VREG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1111 [B2056_SYN_PLL_STATUS1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1112 [B2056_SYN_PLL_STATUS2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1113 [B2056_SYN_PLL_STATUS3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1114 [B2056_SYN_LOGEN_PU0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1115 [B2056_SYN_LOGEN_PU1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1116 [B2056_SYN_LOGEN_PU2] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
1117 [B2056_SYN_LOGEN_PU3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1118 [B2056_SYN_LOGEN_PU5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1119 [B2056_SYN_LOGEN_PU6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1120 [B2056_SYN_LOGEN_PU7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1121 [B2056_SYN_LOGEN_PU8] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1122 [B2056_SYN_LOGEN_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1123 [B2056_SYN_LOGEN_RCCR1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1124 [B2056_SYN_LOGEN_VCOBUF1] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
1125 [B2056_SYN_LOGEN_MIXER1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1126 [B2056_SYN_LOGEN_MIXER2] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1127 [B2056_SYN_LOGEN_BUF1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1128 [B2056_SYN_LOGENBUF2] = { .ghz5 = 0x008f, .ghz2 = 0x008f, UPLOAD, },
1129 [B2056_SYN_LOGEN_BUF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1130 [B2056_SYN_LOGEN_BUF4] = { .ghz5 = 0x00cc, .ghz2 = 0x00cc, NOUPLOAD, },
1131 [B2056_SYN_LOGEN_DIV1] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1132 [B2056_SYN_LOGEN_DIV2] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1133 [B2056_SYN_LOGEN_DIV3] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1134 [B2056_SYN_LOGEN_ACL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1135 [B2056_SYN_LOGEN_ACL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1136 [B2056_SYN_LOGEN_ACL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1137 [B2056_SYN_LOGEN_ACL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1138 [B2056_SYN_LOGEN_ACL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1139 [B2056_SYN_LOGEN_ACL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1140 [B2056_SYN_LOGEN_ACLOUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1141 [B2056_SYN_LOGEN_ACLCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1142 [B2056_SYN_LOGEN_ACLCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1143 [B2056_SYN_LOGEN_ACLCAL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1144 [B2056_SYN_CALEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1145 [B2056_SYN_LOGEN_PEAKDET1] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, NOUPLOAD, },
1146 [B2056_SYN_LOGEN_CORE_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1147 [B2056_SYN_LOGEN_RX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1148 [B2056_SYN_LOGEN_TX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1149 [B2056_SYN_LOGEN_RX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1150 [B2056_SYN_LOGEN_TX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1151 [B2056_SYN_LOGEN_VCOBUF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1152 [B2056_SYN_LOGEN_MIXER3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1153 [B2056_SYN_LOGEN_BUF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1154 [B2056_SYN_LOGEN_BUF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1155 [B2056_SYN_LOGEN_CBUFRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1156 [B2056_SYN_LOGEN_CBUFRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1157 [B2056_SYN_LOGEN_CBUFRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1158 [B2056_SYN_LOGEN_CBUFRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1159 [B2056_SYN_LOGEN_CBUFTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1160 [B2056_SYN_LOGEN_CBUFTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1161 [B2056_SYN_LOGEN_CBUFTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1162 [B2056_SYN_LOGEN_CBUFTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1163 [B2056_SYN_LOGEN_CMOSRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1164 [B2056_SYN_LOGEN_CMOSRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1165 [B2056_SYN_LOGEN_CMOSRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1166 [B2056_SYN_LOGEN_CMOSRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1167 [B2056_SYN_LOGEN_CMOSTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1168 [B2056_SYN_LOGEN_CMOSTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1169 [B2056_SYN_LOGEN_CMOSTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1170 [B2056_SYN_LOGEN_CMOSTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1171 [B2056_SYN_LOGEN_VCOBUF2_OVRVAL]= { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1172 [B2056_SYN_LOGEN_MIXER3_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1173 [B2056_SYN_LOGEN_BUF5_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1174 [B2056_SYN_LOGEN_BUF6_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1175 [B2056_SYN_LOGEN_CBUFRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1176 [B2056_SYN_LOGEN_CBUFRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1177 [B2056_SYN_LOGEN_CBUFRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1178 [B2056_SYN_LOGEN_CBUFRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1179 [B2056_SYN_LOGEN_CBUFTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1180 [B2056_SYN_LOGEN_CBUFTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1181 [B2056_SYN_LOGEN_CBUFTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1182 [B2056_SYN_LOGEN_CBUFTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1183 [B2056_SYN_LOGEN_CMOSRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1184 [B2056_SYN_LOGEN_CMOSRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1185 [B2056_SYN_LOGEN_CMOSRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1186 [B2056_SYN_LOGEN_CMOSRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1187 [B2056_SYN_LOGEN_CMOSTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1188 [B2056_SYN_LOGEN_CMOSTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1189 [B2056_SYN_LOGEN_CMOSTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1190 [B2056_SYN_LOGEN_CMOSTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1191 [B2056_SYN_LOGEN_ACL_WAITCNT] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1192 [B2056_SYN_LOGEN_CORE_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1193 [B2056_SYN_LOGEN_RX_CMOS_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1194 [B2056_SYN_LOGEN_TX_CMOS_VALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1195};
1196
1197static const struct b2056_inittab_entry b2056_inittab_rev5_tx[] = {
1198 [B2056_TX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1199 [B2056_TX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1200 [B2056_TX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1201 [B2056_TX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1202 [B2056_TX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1203 [B2056_TX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1204 [B2056_TX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1205 [B2056_TX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1206 [B2056_TX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1207 [B2056_TX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1208 [B2056_TX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1209 [B2056_TX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1210 [B2056_TX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1211 [B2056_TX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1212 [B2056_TX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1213 [B2056_TX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1214 [B2056_TX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1215 [B2056_TX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1216 [B2056_TX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1217 [B2056_TX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1218 [B2056_TX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1219 [B2056_TX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1220 [B2056_TX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1221 [B2056_TX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1222 [B2056_TX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1223 [B2056_TX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1224 [B2056_TX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1225 [B2056_TX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1226 [B2056_TX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1227 [B2056_TX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1228 [B2056_TX_IQCAL_GAIN_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1229 [B2056_TX_LOFT_FINE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1230 [B2056_TX_LOFT_FINE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1231 [B2056_TX_LOFT_COARSE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1232 [B2056_TX_LOFT_COARSE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1233 [B2056_TX_TX_COM_MASTER1] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1234 [B2056_TX_TX_COM_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1235 [B2056_TX_RXIQCAL_TXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1236 [B2056_TX_TX_SSI_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1237 [B2056_TX_IQCAL_VCM_HG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1238 [B2056_TX_IQCAL_IDAC] = { .ghz5 = 0x0037, .ghz2 = 0x0037, NOUPLOAD, },
1239 [B2056_TX_TSSI_VCM] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1240 [B2056_TX_TX_AMP_DET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1241 [B2056_TX_TX_SSI_MUX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1242 [B2056_TX_TSSIA] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1243 [B2056_TX_TSSIG] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1244 [B2056_TX_TSSI_MISC1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1245 [B2056_TX_TSSI_MISC2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1246 [B2056_TX_TSSI_MISC3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1247 [B2056_TX_PA_SPARE1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
1248 [B2056_TX_PA_SPARE2] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
1249 [B2056_TX_INTPAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1250 [B2056_TX_INTPAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1251 [B2056_TX_INTPAA_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1252 [B2056_TX_INTPAA_IAUX_STAT] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
1253 [B2056_TX_INTPAA_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1254 [B2056_TX_INTPAA_IMAIN_STAT] = { .ghz5 = 0x002d, .ghz2 = 0x002d, NOUPLOAD, },
1255 [B2056_TX_INTPAA_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1256 [B2056_TX_INTPAA_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
1257 [B2056_TX_INTPAA_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
1258 [B2056_TX_INTPAA_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1259 [B2056_TX_INTPAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1260 [B2056_TX_INTPAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1261 [B2056_TX_INTPAG_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1262 [B2056_TX_INTPAG_IAUX_STAT] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1263 [B2056_TX_INTPAG_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1264 [B2056_TX_INTPAG_IMAIN_STAT] = { .ghz5 = 0x001e, .ghz2 = 0x001e, NOUPLOAD, },
1265 [B2056_TX_INTPAG_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1266 [B2056_TX_INTPAG_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
1267 [B2056_TX_INTPAG_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
1268 [B2056_TX_INTPAG_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1269 [B2056_TX_PADA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1270 [B2056_TX_PADA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
1271 [B2056_TX_PADA_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1272 [B2056_TX_PADA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1273 [B2056_TX_PADA_BOOST_TUNE] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
1274 [B2056_TX_PADA_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
1275 [B2056_TX_PADG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1276 [B2056_TX_PADG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1277 [B2056_TX_PADG_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1278 [B2056_TX_PADG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1279 [B2056_TX_PADG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1280 [B2056_TX_PADG_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
1281 [B2056_TX_PGAA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1282 [B2056_TX_PGAA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
1283 [B2056_TX_PGAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1284 [B2056_TX_PGAA_BOOST_TUNE] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
1285 [B2056_TX_PGAA_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
1286 [B2056_TX_PGAA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1287 [B2056_TX_PGAG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1288 [B2056_TX_PGAG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1289 [B2056_TX_PGAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1290 [B2056_TX_PGAG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1291 [B2056_TX_PGAG_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
1292 [B2056_TX_PGAG_MISC] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1293 [B2056_TX_MIXA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1294 [B2056_TX_MIXA_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1295 [B2056_TX_MIXG] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1296 [B2056_TX_MIXG_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1297 [B2056_TX_BB_GM_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1298 [B2056_TX_GMBB_GM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1299 [B2056_TX_GMBB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
1300 [B2056_TX_TXLPF_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1301 [B2056_TX_TXLPF_RCCAL] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1302 [B2056_TX_TXLPF_RCCAL_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1303 [B2056_TX_TXLPF_RCCAL_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1304 [B2056_TX_TXLPF_RCCAL_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1305 [B2056_TX_TXLPF_RCCAL_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1306 [B2056_TX_TXLPF_RCCAL_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1307 [B2056_TX_TXLPF_RCCAL_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1308 [B2056_TX_TXLPF_RCCAL_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1309 [B2056_TX_TXLPF_BW] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1310 [B2056_TX_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1311 [B2056_TX_TXLPF_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1312 [B2056_TX_TXLPF_IDAC_0] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
1313 [B2056_TX_TXLPF_IDAC_1] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
1314 [B2056_TX_TXLPF_IDAC_2] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
1315 [B2056_TX_TXLPF_IDAC_3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1316 [B2056_TX_TXLPF_IDAC_4] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1317 [B2056_TX_TXLPF_IDAC_5] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
1318 [B2056_TX_TXLPF_IDAC_6] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
1319 [B2056_TX_TXLPF_OPAMP_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
1320 [B2056_TX_TXLPF_MISC] = { .ghz5 = 0x005b, .ghz2 = 0x005b, NOUPLOAD, },
1321 [B2056_TX_TXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1322 [B2056_TX_TXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1323 [B2056_TX_TXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1324 [B2056_TX_TXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1325 [B2056_TX_TXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1326 [B2056_TX_TXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1327 [B2056_TX_TXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1328 [B2056_TX_TXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1329 [B2056_TX_TXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1330 [B2056_TX_TXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1331 [B2056_TX_TXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1332 [B2056_TX_TXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1333 [B2056_TX_TXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1334 [B2056_TX_TXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1335 [B2056_TX_TXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1336 [B2056_TX_TXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1337 [B2056_TX_STATUS_INTPA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1338 [B2056_TX_STATUS_PAD_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1339 [B2056_TX_STATUS_PGA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1340 [B2056_TX_STATUS_GM_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1341 [B2056_TX_STATUS_TXLPF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1342 [B2056_TX_STATUS_TXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1343 [B2056_TX_GMBB_IDAC0] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1344 [B2056_TX_GMBB_IDAC1] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1345 [B2056_TX_GMBB_IDAC2] = { .ghz5 = 0x0071, .ghz2 = 0x0071, UPLOAD, },
1346 [B2056_TX_GMBB_IDAC3] = { .ghz5 = 0x0071, .ghz2 = 0x0071, UPLOAD, },
1347 [B2056_TX_GMBB_IDAC4] = { .ghz5 = 0x0072, .ghz2 = 0x0072, UPLOAD, },
1348 [B2056_TX_GMBB_IDAC5] = { .ghz5 = 0x0073, .ghz2 = 0x0073, UPLOAD, },
1349 [B2056_TX_GMBB_IDAC6] = { .ghz5 = 0x0074, .ghz2 = 0x0074, UPLOAD, },
1350 [B2056_TX_GMBB_IDAC7] = { .ghz5 = 0x0075, .ghz2 = 0x0075, UPLOAD, },
1351};
1352
1353static const struct b2056_inittab_entry b2056_inittab_rev5_rx[] = {
1354 [B2056_RX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1355 [B2056_RX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1356 [B2056_RX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1357 [B2056_RX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1358 [B2056_RX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1359 [B2056_RX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1360 [B2056_RX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1361 [B2056_RX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1362 [B2056_RX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1363 [B2056_RX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1364 [B2056_RX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1365 [B2056_RX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1366 [B2056_RX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1367 [B2056_RX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1368 [B2056_RX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1369 [B2056_RX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1370 [B2056_RX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1371 [B2056_RX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1372 [B2056_RX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1373 [B2056_RX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1374 [B2056_RX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1375 [B2056_RX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1376 [B2056_RX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1377 [B2056_RX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1378 [B2056_RX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1379 [B2056_RX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1380 [B2056_RX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1381 [B2056_RX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1382 [B2056_RX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1383 [B2056_RX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1384 [B2056_RX_RXIQCAL_RXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1385 [B2056_RX_RSSI_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1386 [B2056_RX_RSSI_SEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1387 [B2056_RX_RSSI_GAIN] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
1388 [B2056_RX_RSSI_NB_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
1389 [B2056_RX_RSSI_WB2I_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
1390 [B2056_RX_RSSI_WB2I_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
1391 [B2056_RX_RSSI_WB2Q_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
1392 [B2056_RX_RSSI_WB2Q_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
1393 [B2056_RX_RSSI_POLE] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1394 [B2056_RX_RSSI_WB1_IDAC] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
1395 [B2056_RX_RSSI_MISC] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
1396 [B2056_RX_LNAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1397 [B2056_RX_LNAA_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1398 [B2056_RX_LNAA_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
1399 [B2056_RX_LNA_A_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
1400 [B2056_RX_BIASPOLE_LNAA1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
1401 [B2056_RX_LNAA2_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
1402 [B2056_RX_LNA1A_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1403 [B2056_RX_LNAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1404 [B2056_RX_LNAG_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1405 [B2056_RX_LNAG_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
1406 [B2056_RX_LNA_G_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
1407 [B2056_RX_BIASPOLE_LNAG1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
1408 [B2056_RX_LNAG2_IDAC] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
1409 [B2056_RX_LNA1G_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1410 [B2056_RX_MIXA_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1411 [B2056_RX_MIXA_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
1412 [B2056_RX_MIXA_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1413 [B2056_RX_MIXA_LOB_BIAS] = { .ghz5 = 0x0088, .ghz2 = 0x0088, UPLOAD, },
1414 [B2056_RX_MIXA_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1415 [B2056_RX_MIXA_CMFB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
1416 [B2056_RX_MIXA_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
1417 [B2056_RX_MIXA_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1418 [B2056_RX_MIXA_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1419 [B2056_RX_MIXA_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1420 [B2056_RX_MIXG_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1421 [B2056_RX_MIXG_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
1422 [B2056_RX_MIXG_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1423 [B2056_RX_MIXG_LOB_BIAS] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
1424 [B2056_RX_MIXG_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1425 [B2056_RX_MIXG_CMFB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
1426 [B2056_RX_MIXG_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1427 [B2056_RX_MIXG_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1428 [B2056_RX_MIXG_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1429 [B2056_RX_MIXG_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1430 [B2056_RX_TIA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1431 [B2056_RX_TIA_IOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
1432 [B2056_RX_TIA_QOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
1433 [B2056_RX_TIA_IMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
1434 [B2056_RX_TIA_QMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
1435 [B2056_RX_TIA_GAIN] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
1436 [B2056_RX_TIA_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1437 [B2056_RX_TIA_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1438 [B2056_RX_BB_LPF_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1439 [B2056_RX_AACI_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1440 [B2056_RX_RXLPF_IDAC] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1441 [B2056_RX_RXLPF_OPAMPBIAS_LOWQ] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1442 [B2056_RX_RXLPF_OPAMPBIAS_HIGHQ]= { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1443 [B2056_RX_RXLPF_BIAS_DCCANCEL] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1444 [B2056_RX_RXLPF_OUTVCM] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
1445 [B2056_RX_RXLPF_INVCM_BODY] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1446 [B2056_RX_RXLPF_CC_OP] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
1447 [B2056_RX_RXLPF_GAIN] = { .ghz5 = 0x0023, .ghz2 = 0x0023, NOUPLOAD, },
1448 [B2056_RX_RXLPF_Q_BW] = { .ghz5 = 0x0041, .ghz2 = 0x0041, NOUPLOAD, },
1449 [B2056_RX_RXLPF_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1450 [B2056_RX_RXLPF_RCCAL_HPC] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1451 [B2056_RX_RXHPF_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1452 [B2056_RX_RXHPF_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1453 [B2056_RX_RXHPF_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1454 [B2056_RX_RXHPF_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1455 [B2056_RX_RXHPF_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1456 [B2056_RX_RXHPF_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1457 [B2056_RX_RXHPF_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1458 [B2056_RX_RXHPF_OFF7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1459 [B2056_RX_RXLPF_RCCAL_LPC] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1460 [B2056_RX_RXLPF_OFF_0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1461 [B2056_RX_RXLPF_OFF_1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1462 [B2056_RX_RXLPF_OFF_2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1463 [B2056_RX_RXLPF_OFF_3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1464 [B2056_RX_RXLPF_OFF_4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1465 [B2056_RX_UNUSED] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1466 [B2056_RX_VGA_MASTER] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1467 [B2056_RX_VGA_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1468 [B2056_RX_VGA_BIAS_DCCANCEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
1469 [B2056_RX_VGA_GAIN] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1470 [B2056_RX_VGA_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1471 [B2056_RX_VGABUF_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1472 [B2056_RX_VGABUF_GAIN_BW] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
1473 [B2056_RX_TXFBMIX_A] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1474 [B2056_RX_TXFBMIX_G] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1475 [B2056_RX_RXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1476 [B2056_RX_RXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1477 [B2056_RX_RXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1478 [B2056_RX_RXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1479 [B2056_RX_RXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1480 [B2056_RX_RXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1481 [B2056_RX_RXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1482 [B2056_RX_RXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1483 [B2056_RX_RXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1484 [B2056_RX_RXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1485 [B2056_RX_RXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1486 [B2056_RX_RXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1487 [B2056_RX_RXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1488 [B2056_RX_RXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1489 [B2056_RX_RXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1490 [B2056_RX_RXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1491 [B2056_RX_STATUS_LNAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1492 [B2056_RX_STATUS_LNAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1493 [B2056_RX_STATUS_MIXTIA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1494 [B2056_RX_STATUS_RXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1495 [B2056_RX_STATUS_VGA_BUF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1496 [B2056_RX_STATUS_RXLPF_Q] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1497 [B2056_RX_STATUS_RXLPF_BUF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1498 [B2056_RX_STATUS_RXLPF_VGA_HPC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1499 [B2056_RX_STATUS_RXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1500 [B2056_RX_STATUS_HPC_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1501};
1502
1503static const struct b2056_inittab_entry b2056_inittab_rev6_syn[] = {
1504 [B2056_SYN_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1505 [B2056_SYN_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1506 [B2056_SYN_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1507 [B2056_SYN_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1508 [B2056_SYN_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1509 [B2056_SYN_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1510 [B2056_SYN_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1511 [B2056_SYN_COM_PU] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1512 [B2056_SYN_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1513 [B2056_SYN_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1514 [B2056_SYN_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1515 [B2056_SYN_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1516 [B2056_SYN_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1517 [B2056_SYN_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1518 [B2056_SYN_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1519 [B2056_SYN_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1520 [B2056_SYN_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1521 [B2056_SYN_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1522 [B2056_SYN_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1523 [B2056_SYN_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1524 [B2056_SYN_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1525 [B2056_SYN_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1526 [B2056_SYN_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1527 [B2056_SYN_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1528 [B2056_SYN_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1529 [B2056_SYN_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1530 [B2056_SYN_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1531 [B2056_SYN_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1532 [B2056_SYN_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1533 [B2056_SYN_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1534 [B2056_SYN_GPIO_MASTER1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1535 [B2056_SYN_GPIO_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1536 [B2056_SYN_TOPBIAS_MASTER] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
1537 [B2056_SYN_TOPBIAS_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1538 [B2056_SYN_AFEREG] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1539 [B2056_SYN_TEMPPROCSENSE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1540 [B2056_SYN_TEMPPROCSENSEIDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1541 [B2056_SYN_TEMPPROCSENSERCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1542 [B2056_SYN_LPO] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1543 [B2056_SYN_VDDCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1544 [B2056_SYN_VDDCAL_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1545 [B2056_SYN_VDDCAL_STATUS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1546 [B2056_SYN_RCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1547 [B2056_SYN_RCAL_CODE_OUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1548 [B2056_SYN_RCCAL_CTRL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1549 [B2056_SYN_RCCAL_CTRL1] = { .ghz5 = 0x001f, .ghz2 = 0x001f, NOUPLOAD, },
1550 [B2056_SYN_RCCAL_CTRL2] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
1551 [B2056_SYN_RCCAL_CTRL3] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
1552 [B2056_SYN_RCCAL_CTRL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1553 [B2056_SYN_RCCAL_CTRL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1554 [B2056_SYN_RCCAL_CTRL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1555 [B2056_SYN_RCCAL_CTRL7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1556 [B2056_SYN_RCCAL_CTRL8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1557 [B2056_SYN_RCCAL_CTRL9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1558 [B2056_SYN_RCCAL_CTRL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1559 [B2056_SYN_RCCAL_CTRL11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1560 [B2056_SYN_ZCAL_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1561 [B2056_SYN_ZCAL_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1562 [B2056_SYN_PLL_MAST1] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1563 [B2056_SYN_PLL_MAST2] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
1564 [B2056_SYN_PLL_MAST3] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
1565 [B2056_SYN_PLL_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1566 [B2056_SYN_PLL_XTAL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1567 [B2056_SYN_PLL_XTAL1] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1568 [B2056_SYN_PLL_XTAL3] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1569 [B2056_SYN_PLL_XTAL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1570 [B2056_SYN_PLL_XTAL5] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
1571 [B2056_SYN_PLL_XTAL6] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1572 [B2056_SYN_PLL_REFDIV] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1573 [B2056_SYN_PLL_PFD] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1574 [B2056_SYN_PLL_CP1] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
1575 [B2056_SYN_PLL_CP2] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
1576 [B2056_SYN_PLL_CP3] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
1577 [B2056_SYN_PLL_LOOPFILTER1] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
1578 [B2056_SYN_PLL_LOOPFILTER2] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
1579 [B2056_SYN_PLL_LOOPFILTER3] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1580 [B2056_SYN_PLL_LOOPFILTER4] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1581 [B2056_SYN_PLL_LOOPFILTER5] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1582 [B2056_SYN_PLL_MMD1] = { .ghz5 = 0x001c, .ghz2 = 0x001c, NOUPLOAD, },
1583 [B2056_SYN_PLL_MMD2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1584 [B2056_SYN_PLL_VCO1] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1585 [B2056_SYN_PLL_VCO2] = { .ghz5 = 0x00f7, .ghz2 = 0x00f7, UPLOAD, },
1586 [B2056_SYN_PLL_MONITOR1] = { .ghz5 = 0x00b4, .ghz2 = 0x00b4, NOUPLOAD, },
1587 [B2056_SYN_PLL_MONITOR2] = { .ghz5 = 0x00d2, .ghz2 = 0x00d2, NOUPLOAD, },
1588 [B2056_SYN_PLL_VCOCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1589 [B2056_SYN_PLL_VCOCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1590 [B2056_SYN_PLL_VCOCAL4] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1591 [B2056_SYN_PLL_VCOCAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
1592 [B2056_SYN_PLL_VCOCAL6] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
1593 [B2056_SYN_PLL_VCOCAL7] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
1594 [B2056_SYN_PLL_VCOCAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1595 [B2056_SYN_PLL_VCOCAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1596 [B2056_SYN_PLL_VCOCAL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1597 [B2056_SYN_PLL_VCOCAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1598 [B2056_SYN_PLL_VCOCAL12] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
1599 [B2056_SYN_PLL_VCOCAL13] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1600 [B2056_SYN_PLL_VREG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1601 [B2056_SYN_PLL_STATUS1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1602 [B2056_SYN_PLL_STATUS2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1603 [B2056_SYN_PLL_STATUS3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1604 [B2056_SYN_LOGEN_PU0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1605 [B2056_SYN_LOGEN_PU1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1606 [B2056_SYN_LOGEN_PU2] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
1607 [B2056_SYN_LOGEN_PU3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1608 [B2056_SYN_LOGEN_PU5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1609 [B2056_SYN_LOGEN_PU6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1610 [B2056_SYN_LOGEN_PU7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1611 [B2056_SYN_LOGEN_PU8] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1612 [B2056_SYN_LOGEN_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1613 [B2056_SYN_LOGEN_RCCR1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1614 [B2056_SYN_LOGEN_VCOBUF1] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
1615 [B2056_SYN_LOGEN_MIXER1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1616 [B2056_SYN_LOGEN_MIXER2] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1617 [B2056_SYN_LOGEN_BUF1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1618 [B2056_SYN_LOGENBUF2] = { .ghz5 = 0x008f, .ghz2 = 0x008f, UPLOAD, },
1619 [B2056_SYN_LOGEN_BUF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1620 [B2056_SYN_LOGEN_BUF4] = { .ghz5 = 0x00cc, .ghz2 = 0x00cc, NOUPLOAD, },
1621 [B2056_SYN_LOGEN_DIV1] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1622 [B2056_SYN_LOGEN_DIV2] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1623 [B2056_SYN_LOGEN_DIV3] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1624 [B2056_SYN_LOGEN_ACL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1625 [B2056_SYN_LOGEN_ACL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1626 [B2056_SYN_LOGEN_ACL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1627 [B2056_SYN_LOGEN_ACL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1628 [B2056_SYN_LOGEN_ACL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1629 [B2056_SYN_LOGEN_ACL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1630 [B2056_SYN_LOGEN_ACLOUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1631 [B2056_SYN_LOGEN_ACLCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1632 [B2056_SYN_LOGEN_ACLCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1633 [B2056_SYN_LOGEN_ACLCAL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1634 [B2056_SYN_CALEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1635 [B2056_SYN_LOGEN_PEAKDET1] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, NOUPLOAD, },
1636 [B2056_SYN_LOGEN_CORE_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1637 [B2056_SYN_LOGEN_RX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1638 [B2056_SYN_LOGEN_TX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1639 [B2056_SYN_LOGEN_RX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1640 [B2056_SYN_LOGEN_TX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1641 [B2056_SYN_LOGEN_VCOBUF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1642 [B2056_SYN_LOGEN_MIXER3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1643 [B2056_SYN_LOGEN_BUF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1644 [B2056_SYN_LOGEN_BUF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1645 [B2056_SYN_LOGEN_CBUFRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1646 [B2056_SYN_LOGEN_CBUFRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1647 [B2056_SYN_LOGEN_CBUFRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1648 [B2056_SYN_LOGEN_CBUFRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1649 [B2056_SYN_LOGEN_CBUFTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1650 [B2056_SYN_LOGEN_CBUFTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1651 [B2056_SYN_LOGEN_CBUFTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1652 [B2056_SYN_LOGEN_CBUFTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1653 [B2056_SYN_LOGEN_CMOSRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1654 [B2056_SYN_LOGEN_CMOSRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1655 [B2056_SYN_LOGEN_CMOSRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1656 [B2056_SYN_LOGEN_CMOSRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1657 [B2056_SYN_LOGEN_CMOSTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1658 [B2056_SYN_LOGEN_CMOSTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1659 [B2056_SYN_LOGEN_CMOSTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1660 [B2056_SYN_LOGEN_CMOSTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1661 [B2056_SYN_LOGEN_VCOBUF2_OVRVAL]= { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1662 [B2056_SYN_LOGEN_MIXER3_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1663 [B2056_SYN_LOGEN_BUF5_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1664 [B2056_SYN_LOGEN_BUF6_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1665 [B2056_SYN_LOGEN_CBUFRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1666 [B2056_SYN_LOGEN_CBUFRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1667 [B2056_SYN_LOGEN_CBUFRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1668 [B2056_SYN_LOGEN_CBUFRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1669 [B2056_SYN_LOGEN_CBUFTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1670 [B2056_SYN_LOGEN_CBUFTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1671 [B2056_SYN_LOGEN_CBUFTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1672 [B2056_SYN_LOGEN_CBUFTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1673 [B2056_SYN_LOGEN_CMOSRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1674 [B2056_SYN_LOGEN_CMOSRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1675 [B2056_SYN_LOGEN_CMOSRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1676 [B2056_SYN_LOGEN_CMOSRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1677 [B2056_SYN_LOGEN_CMOSTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1678 [B2056_SYN_LOGEN_CMOSTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1679 [B2056_SYN_LOGEN_CMOSTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1680 [B2056_SYN_LOGEN_CMOSTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
1681 [B2056_SYN_LOGEN_ACL_WAITCNT] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1682 [B2056_SYN_LOGEN_CORE_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1683 [B2056_SYN_LOGEN_RX_CMOS_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1684 [B2056_SYN_LOGEN_TX_CMOS_VALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1685};
1686
1687static const struct b2056_inittab_entry b2056_inittab_rev6_tx[] = {
1688 [B2056_TX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1689 [B2056_TX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1690 [B2056_TX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1691 [B2056_TX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1692 [B2056_TX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1693 [B2056_TX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1694 [B2056_TX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1695 [B2056_TX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1696 [B2056_TX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1697 [B2056_TX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1698 [B2056_TX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1699 [B2056_TX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1700 [B2056_TX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1701 [B2056_TX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1702 [B2056_TX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1703 [B2056_TX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1704 [B2056_TX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1705 [B2056_TX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1706 [B2056_TX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1707 [B2056_TX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1708 [B2056_TX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1709 [B2056_TX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1710 [B2056_TX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1711 [B2056_TX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1712 [B2056_TX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1713 [B2056_TX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1714 [B2056_TX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1715 [B2056_TX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1716 [B2056_TX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1717 [B2056_TX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1718 [B2056_TX_IQCAL_GAIN_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1719 [B2056_TX_LOFT_FINE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1720 [B2056_TX_LOFT_FINE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1721 [B2056_TX_LOFT_COARSE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1722 [B2056_TX_LOFT_COARSE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1723 [B2056_TX_TX_COM_MASTER1] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1724 [B2056_TX_TX_COM_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1725 [B2056_TX_RXIQCAL_TXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1726 [B2056_TX_TX_SSI_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1727 [B2056_TX_IQCAL_VCM_HG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1728 [B2056_TX_IQCAL_IDAC] = { .ghz5 = 0x0037, .ghz2 = 0x0037, NOUPLOAD, },
1729 [B2056_TX_TSSI_VCM] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1730 [B2056_TX_TX_AMP_DET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1731 [B2056_TX_TX_SSI_MUX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1732 [B2056_TX_TSSIA] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1733 [B2056_TX_TSSIG] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1734 [B2056_TX_TSSI_MISC1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1735 [B2056_TX_TSSI_MISC2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1736 [B2056_TX_TSSI_MISC3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1737 [B2056_TX_PA_SPARE1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
1738 [B2056_TX_PA_SPARE2] = { .ghz5 = 0x00ee, .ghz2 = 0x00ee, UPLOAD, },
1739 [B2056_TX_INTPAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1740 [B2056_TX_INTPAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1741 [B2056_TX_INTPAA_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1742 [B2056_TX_INTPAA_IAUX_STAT] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
1743 [B2056_TX_INTPAA_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1744 [B2056_TX_INTPAA_IMAIN_STAT] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
1745 [B2056_TX_INTPAA_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1746 [B2056_TX_INTPAA_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
1747 [B2056_TX_INTPAA_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
1748 [B2056_TX_INTPAA_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1749 [B2056_TX_INTPAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1750 [B2056_TX_INTPAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1751 [B2056_TX_INTPAG_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1752 [B2056_TX_INTPAG_IAUX_STAT] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1753 [B2056_TX_INTPAG_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1754 [B2056_TX_INTPAG_IMAIN_STAT] = { .ghz5 = 0x001e, .ghz2 = 0x001e, NOUPLOAD, },
1755 [B2056_TX_INTPAG_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1756 [B2056_TX_INTPAG_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
1757 [B2056_TX_INTPAG_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
1758 [B2056_TX_INTPAG_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1759 [B2056_TX_PADA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1760 [B2056_TX_PADA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
1761 [B2056_TX_PADA_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1762 [B2056_TX_PADA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1763 [B2056_TX_PADA_BOOST_TUNE] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
1764 [B2056_TX_PADA_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
1765 [B2056_TX_PADG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1766 [B2056_TX_PADG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1767 [B2056_TX_PADG_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1768 [B2056_TX_PADG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1769 [B2056_TX_PADG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1770 [B2056_TX_PADG_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
1771 [B2056_TX_PGAA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1772 [B2056_TX_PGAA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
1773 [B2056_TX_PGAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1774 [B2056_TX_PGAA_BOOST_TUNE] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
1775 [B2056_TX_PGAA_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
1776 [B2056_TX_PGAA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1777 [B2056_TX_PGAG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1778 [B2056_TX_PGAG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1779 [B2056_TX_PGAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1780 [B2056_TX_PGAG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1781 [B2056_TX_PGAG_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
1782 [B2056_TX_PGAG_MISC] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1783 [B2056_TX_MIXA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1784 [B2056_TX_MIXA_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1785 [B2056_TX_MIXG] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1786 [B2056_TX_MIXG_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1787 [B2056_TX_BB_GM_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1788 [B2056_TX_GMBB_GM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1789 [B2056_TX_GMBB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
1790 [B2056_TX_TXLPF_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1791 [B2056_TX_TXLPF_RCCAL] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1792 [B2056_TX_TXLPF_RCCAL_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1793 [B2056_TX_TXLPF_RCCAL_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1794 [B2056_TX_TXLPF_RCCAL_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1795 [B2056_TX_TXLPF_RCCAL_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1796 [B2056_TX_TXLPF_RCCAL_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1797 [B2056_TX_TXLPF_RCCAL_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1798 [B2056_TX_TXLPF_RCCAL_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1799 [B2056_TX_TXLPF_BW] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1800 [B2056_TX_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1801 [B2056_TX_TXLPF_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1802 [B2056_TX_TXLPF_IDAC_0] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
1803 [B2056_TX_TXLPF_IDAC_1] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
1804 [B2056_TX_TXLPF_IDAC_2] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
1805 [B2056_TX_TXLPF_IDAC_3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1806 [B2056_TX_TXLPF_IDAC_4] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
1807 [B2056_TX_TXLPF_IDAC_5] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
1808 [B2056_TX_TXLPF_IDAC_6] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
1809 [B2056_TX_TXLPF_OPAMP_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
1810 [B2056_TX_TXLPF_MISC] = { .ghz5 = 0x005b, .ghz2 = 0x005b, NOUPLOAD, },
1811 [B2056_TX_TXSPARE1] = { .ghz5 = 0x0030, .ghz2 = 0x0030, UPLOAD, },
1812 [B2056_TX_TXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1813 [B2056_TX_TXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1814 [B2056_TX_TXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1815 [B2056_TX_TXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1816 [B2056_TX_TXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1817 [B2056_TX_TXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1818 [B2056_TX_TXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1819 [B2056_TX_TXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1820 [B2056_TX_TXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1821 [B2056_TX_TXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1822 [B2056_TX_TXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1823 [B2056_TX_TXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1824 [B2056_TX_TXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1825 [B2056_TX_TXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1826 [B2056_TX_TXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1827 [B2056_TX_STATUS_INTPA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1828 [B2056_TX_STATUS_PAD_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1829 [B2056_TX_STATUS_PGA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1830 [B2056_TX_STATUS_GM_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1831 [B2056_TX_STATUS_TXLPF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1832 [B2056_TX_STATUS_TXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1833 [B2056_TX_GMBB_IDAC0] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1834 [B2056_TX_GMBB_IDAC1] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1835 [B2056_TX_GMBB_IDAC2] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1836 [B2056_TX_GMBB_IDAC3] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1837 [B2056_TX_GMBB_IDAC4] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1838 [B2056_TX_GMBB_IDAC5] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1839 [B2056_TX_GMBB_IDAC6] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1840 [B2056_TX_GMBB_IDAC7] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
1841};
1842
1843static const struct b2056_inittab_entry b2056_inittab_rev6_rx[] = {
1844 [B2056_RX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1845 [B2056_RX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1846 [B2056_RX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1847 [B2056_RX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1848 [B2056_RX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1849 [B2056_RX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1850 [B2056_RX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1851 [B2056_RX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1852 [B2056_RX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1853 [B2056_RX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1854 [B2056_RX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1855 [B2056_RX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1856 [B2056_RX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1857 [B2056_RX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1858 [B2056_RX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1859 [B2056_RX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1860 [B2056_RX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1861 [B2056_RX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1862 [B2056_RX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1863 [B2056_RX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1864 [B2056_RX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1865 [B2056_RX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1866 [B2056_RX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1867 [B2056_RX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1868 [B2056_RX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1869 [B2056_RX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1870 [B2056_RX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1871 [B2056_RX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1872 [B2056_RX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1873 [B2056_RX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1874 [B2056_RX_RXIQCAL_RXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
1875 [B2056_RX_RSSI_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1876 [B2056_RX_RSSI_SEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1877 [B2056_RX_RSSI_GAIN] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
1878 [B2056_RX_RSSI_NB_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
1879 [B2056_RX_RSSI_WB2I_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
1880 [B2056_RX_RSSI_WB2I_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
1881 [B2056_RX_RSSI_WB2Q_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
1882 [B2056_RX_RSSI_WB2Q_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
1883 [B2056_RX_RSSI_POLE] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1884 [B2056_RX_RSSI_WB1_IDAC] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
1885 [B2056_RX_RSSI_MISC] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
1886 [B2056_RX_LNAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1887 [B2056_RX_LNAA_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1888 [B2056_RX_LNAA_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
1889 [B2056_RX_LNA_A_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
1890 [B2056_RX_BIASPOLE_LNAA1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
1891 [B2056_RX_LNAA2_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
1892 [B2056_RX_LNA1A_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1893 [B2056_RX_LNAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1894 [B2056_RX_LNAG_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
1895 [B2056_RX_LNAG_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
1896 [B2056_RX_LNA_G_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
1897 [B2056_RX_BIASPOLE_LNAG1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
1898 [B2056_RX_LNAG2_IDAC] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
1899 [B2056_RX_LNA1G_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
1900 [B2056_RX_MIXA_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1901 [B2056_RX_MIXA_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
1902 [B2056_RX_MIXA_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1903 [B2056_RX_MIXA_LOB_BIAS] = { .ghz5 = 0x0088, .ghz2 = 0x0088, UPLOAD, },
1904 [B2056_RX_MIXA_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1905 [B2056_RX_MIXA_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
1906 [B2056_RX_MIXA_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
1907 [B2056_RX_MIXA_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1908 [B2056_RX_MIXA_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1909 [B2056_RX_MIXA_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1910 [B2056_RX_MIXG_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1911 [B2056_RX_MIXG_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
1912 [B2056_RX_MIXG_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1913 [B2056_RX_MIXG_LOB_BIAS] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
1914 [B2056_RX_MIXG_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1915 [B2056_RX_MIXG_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
1916 [B2056_RX_MIXG_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1917 [B2056_RX_MIXG_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
1918 [B2056_RX_MIXG_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
1919 [B2056_RX_MIXG_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1920 [B2056_RX_TIA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1921 [B2056_RX_TIA_IOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
1922 [B2056_RX_TIA_QOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
1923 [B2056_RX_TIA_IMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
1924 [B2056_RX_TIA_QMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
1925 [B2056_RX_TIA_GAIN] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
1926 [B2056_RX_TIA_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1927 [B2056_RX_TIA_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1928 [B2056_RX_BB_LPF_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1929 [B2056_RX_AACI_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
1930 [B2056_RX_RXLPF_IDAC] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1931 [B2056_RX_RXLPF_OPAMPBIAS_LOWQ] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1932 [B2056_RX_RXLPF_OPAMPBIAS_HIGHQ]= { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1933 [B2056_RX_RXLPF_BIAS_DCCANCEL] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
1934 [B2056_RX_RXLPF_OUTVCM] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
1935 [B2056_RX_RXLPF_INVCM_BODY] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
1936 [B2056_RX_RXLPF_CC_OP] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
1937 [B2056_RX_RXLPF_GAIN] = { .ghz5 = 0x0023, .ghz2 = 0x0023, NOUPLOAD, },
1938 [B2056_RX_RXLPF_Q_BW] = { .ghz5 = 0x0041, .ghz2 = 0x0041, NOUPLOAD, },
1939 [B2056_RX_RXLPF_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1940 [B2056_RX_RXLPF_RCCAL_HPC] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1941 [B2056_RX_RXHPF_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1942 [B2056_RX_RXHPF_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1943 [B2056_RX_RXHPF_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1944 [B2056_RX_RXHPF_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1945 [B2056_RX_RXHPF_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1946 [B2056_RX_RXHPF_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1947 [B2056_RX_RXHPF_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1948 [B2056_RX_RXHPF_OFF7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1949 [B2056_RX_RXLPF_RCCAL_LPC] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
1950 [B2056_RX_RXLPF_OFF_0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1951 [B2056_RX_RXLPF_OFF_1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1952 [B2056_RX_RXLPF_OFF_2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1953 [B2056_RX_RXLPF_OFF_3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1954 [B2056_RX_RXLPF_OFF_4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1955 [B2056_RX_UNUSED] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1956 [B2056_RX_VGA_MASTER] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1957 [B2056_RX_VGA_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1958 [B2056_RX_VGA_BIAS_DCCANCEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
1959 [B2056_RX_VGA_GAIN] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
1960 [B2056_RX_VGA_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
1961 [B2056_RX_VGABUF_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
1962 [B2056_RX_VGABUF_GAIN_BW] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
1963 [B2056_RX_TXFBMIX_A] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1964 [B2056_RX_TXFBMIX_G] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1965 [B2056_RX_RXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1966 [B2056_RX_RXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1967 [B2056_RX_RXSPARE3] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
1968 [B2056_RX_RXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1969 [B2056_RX_RXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1970 [B2056_RX_RXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1971 [B2056_RX_RXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1972 [B2056_RX_RXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1973 [B2056_RX_RXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1974 [B2056_RX_RXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1975 [B2056_RX_RXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1976 [B2056_RX_RXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1977 [B2056_RX_RXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1978 [B2056_RX_RXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1979 [B2056_RX_RXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1980 [B2056_RX_RXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1981 [B2056_RX_STATUS_LNAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1982 [B2056_RX_STATUS_LNAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1983 [B2056_RX_STATUS_MIXTIA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1984 [B2056_RX_STATUS_RXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1985 [B2056_RX_STATUS_VGA_BUF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1986 [B2056_RX_STATUS_RXLPF_Q] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1987 [B2056_RX_STATUS_RXLPF_BUF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1988 [B2056_RX_STATUS_RXLPF_VGA_HPC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1989 [B2056_RX_STATUS_RXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1990 [B2056_RX_STATUS_HPC_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1991};
1992
1993static const struct b2056_inittab_entry b2056_inittab_rev7_syn[] = {
1994 [B2056_SYN_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1995 [B2056_SYN_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1996 [B2056_SYN_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1997 [B2056_SYN_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1998 [B2056_SYN_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
1999 [B2056_SYN_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2000 [B2056_SYN_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2001 [B2056_SYN_COM_PU] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2002 [B2056_SYN_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2003 [B2056_SYN_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2004 [B2056_SYN_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2005 [B2056_SYN_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2006 [B2056_SYN_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2007 [B2056_SYN_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2008 [B2056_SYN_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2009 [B2056_SYN_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2010 [B2056_SYN_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2011 [B2056_SYN_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2012 [B2056_SYN_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2013 [B2056_SYN_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2014 [B2056_SYN_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2015 [B2056_SYN_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2016 [B2056_SYN_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2017 [B2056_SYN_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2018 [B2056_SYN_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2019 [B2056_SYN_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2020 [B2056_SYN_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2021 [B2056_SYN_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2022 [B2056_SYN_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2023 [B2056_SYN_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2024 [B2056_SYN_GPIO_MASTER1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2025 [B2056_SYN_GPIO_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2026 [B2056_SYN_TOPBIAS_MASTER] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
2027 [B2056_SYN_TOPBIAS_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2028 [B2056_SYN_AFEREG] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2029 [B2056_SYN_TEMPPROCSENSE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2030 [B2056_SYN_TEMPPROCSENSEIDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2031 [B2056_SYN_TEMPPROCSENSERCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2032 [B2056_SYN_LPO] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2033 [B2056_SYN_VDDCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2034 [B2056_SYN_VDDCAL_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2035 [B2056_SYN_VDDCAL_STATUS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2036 [B2056_SYN_RCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2037 [B2056_SYN_RCAL_CODE_OUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2038 [B2056_SYN_RCCAL_CTRL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2039 [B2056_SYN_RCCAL_CTRL1] = { .ghz5 = 0x001f, .ghz2 = 0x001f, NOUPLOAD, },
2040 [B2056_SYN_RCCAL_CTRL2] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
2041 [B2056_SYN_RCCAL_CTRL3] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
2042 [B2056_SYN_RCCAL_CTRL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2043 [B2056_SYN_RCCAL_CTRL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2044 [B2056_SYN_RCCAL_CTRL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2045 [B2056_SYN_RCCAL_CTRL7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2046 [B2056_SYN_RCCAL_CTRL8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2047 [B2056_SYN_RCCAL_CTRL9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2048 [B2056_SYN_RCCAL_CTRL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2049 [B2056_SYN_RCCAL_CTRL11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2050 [B2056_SYN_ZCAL_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2051 [B2056_SYN_ZCAL_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2052 [B2056_SYN_PLL_MAST1] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2053 [B2056_SYN_PLL_MAST2] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
2054 [B2056_SYN_PLL_MAST3] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
2055 [B2056_SYN_PLL_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2056 [B2056_SYN_PLL_XTAL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2057 [B2056_SYN_PLL_XTAL1] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2058 [B2056_SYN_PLL_XTAL3] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2059 [B2056_SYN_PLL_XTAL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2060 [B2056_SYN_PLL_XTAL5] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
2061 [B2056_SYN_PLL_XTAL6] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2062 [B2056_SYN_PLL_REFDIV] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2063 [B2056_SYN_PLL_PFD] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2064 [B2056_SYN_PLL_CP1] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
2065 [B2056_SYN_PLL_CP2] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
2066 [B2056_SYN_PLL_CP3] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
2067 [B2056_SYN_PLL_LOOPFILTER1] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
2068 [B2056_SYN_PLL_LOOPFILTER2] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
2069 [B2056_SYN_PLL_LOOPFILTER3] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2070 [B2056_SYN_PLL_LOOPFILTER4] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2071 [B2056_SYN_PLL_LOOPFILTER5] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2072 [B2056_SYN_PLL_MMD1] = { .ghz5 = 0x001c, .ghz2 = 0x001c, NOUPLOAD, },
2073 [B2056_SYN_PLL_MMD2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2074 [B2056_SYN_PLL_VCO1] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2075 [B2056_SYN_PLL_VCO2] = { .ghz5 = 0x00f7, .ghz2 = 0x00f7, UPLOAD, },
2076 [B2056_SYN_PLL_MONITOR1] = { .ghz5 = 0x00b4, .ghz2 = 0x00b4, NOUPLOAD, },
2077 [B2056_SYN_PLL_MONITOR2] = { .ghz5 = 0x00d2, .ghz2 = 0x00d2, NOUPLOAD, },
2078 [B2056_SYN_PLL_VCOCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2079 [B2056_SYN_PLL_VCOCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2080 [B2056_SYN_PLL_VCOCAL4] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2081 [B2056_SYN_PLL_VCOCAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
2082 [B2056_SYN_PLL_VCOCAL6] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
2083 [B2056_SYN_PLL_VCOCAL7] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
2084 [B2056_SYN_PLL_VCOCAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2085 [B2056_SYN_PLL_VCOCAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2086 [B2056_SYN_PLL_VCOCAL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2087 [B2056_SYN_PLL_VCOCAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2088 [B2056_SYN_PLL_VCOCAL12] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
2089 [B2056_SYN_PLL_VCOCAL13] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2090 [B2056_SYN_PLL_VREG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2091 [B2056_SYN_PLL_STATUS1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2092 [B2056_SYN_PLL_STATUS2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2093 [B2056_SYN_PLL_STATUS3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2094 [B2056_SYN_LOGEN_PU0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2095 [B2056_SYN_LOGEN_PU1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2096 [B2056_SYN_LOGEN_PU2] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
2097 [B2056_SYN_LOGEN_PU3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2098 [B2056_SYN_LOGEN_PU5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2099 [B2056_SYN_LOGEN_PU6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2100 [B2056_SYN_LOGEN_PU7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2101 [B2056_SYN_LOGEN_PU8] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2102 [B2056_SYN_LOGEN_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2103 [B2056_SYN_LOGEN_RCCR1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2104 [B2056_SYN_LOGEN_VCOBUF1] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
2105 [B2056_SYN_LOGEN_MIXER1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2106 [B2056_SYN_LOGEN_MIXER2] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2107 [B2056_SYN_LOGEN_BUF1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2108 [B2056_SYN_LOGENBUF2] = { .ghz5 = 0x008f, .ghz2 = 0x008f, UPLOAD, },
2109 [B2056_SYN_LOGEN_BUF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2110 [B2056_SYN_LOGEN_BUF4] = { .ghz5 = 0x00cc, .ghz2 = 0x00cc, NOUPLOAD, },
2111 [B2056_SYN_LOGEN_DIV1] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2112 [B2056_SYN_LOGEN_DIV2] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2113 [B2056_SYN_LOGEN_DIV3] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2114 [B2056_SYN_LOGEN_ACL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2115 [B2056_SYN_LOGEN_ACL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2116 [B2056_SYN_LOGEN_ACL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2117 [B2056_SYN_LOGEN_ACL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2118 [B2056_SYN_LOGEN_ACL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2119 [B2056_SYN_LOGEN_ACL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2120 [B2056_SYN_LOGEN_ACLOUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2121 [B2056_SYN_LOGEN_ACLCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2122 [B2056_SYN_LOGEN_ACLCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2123 [B2056_SYN_LOGEN_ACLCAL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2124 [B2056_SYN_CALEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2125 [B2056_SYN_LOGEN_PEAKDET1] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, NOUPLOAD, },
2126 [B2056_SYN_LOGEN_CORE_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2127 [B2056_SYN_LOGEN_RX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2128 [B2056_SYN_LOGEN_TX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2129 [B2056_SYN_LOGEN_RX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2130 [B2056_SYN_LOGEN_TX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2131 [B2056_SYN_LOGEN_VCOBUF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2132 [B2056_SYN_LOGEN_MIXER3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2133 [B2056_SYN_LOGEN_BUF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2134 [B2056_SYN_LOGEN_BUF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2135 [B2056_SYN_LOGEN_CBUFRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2136 [B2056_SYN_LOGEN_CBUFRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2137 [B2056_SYN_LOGEN_CBUFRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2138 [B2056_SYN_LOGEN_CBUFRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2139 [B2056_SYN_LOGEN_CBUFTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2140 [B2056_SYN_LOGEN_CBUFTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2141 [B2056_SYN_LOGEN_CBUFTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2142 [B2056_SYN_LOGEN_CBUFTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2143 [B2056_SYN_LOGEN_CMOSRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2144 [B2056_SYN_LOGEN_CMOSRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2145 [B2056_SYN_LOGEN_CMOSRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2146 [B2056_SYN_LOGEN_CMOSRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2147 [B2056_SYN_LOGEN_CMOSTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2148 [B2056_SYN_LOGEN_CMOSTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2149 [B2056_SYN_LOGEN_CMOSTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2150 [B2056_SYN_LOGEN_CMOSTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2151 [B2056_SYN_LOGEN_VCOBUF2_OVRVAL]= { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2152 [B2056_SYN_LOGEN_MIXER3_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2153 [B2056_SYN_LOGEN_BUF5_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2154 [B2056_SYN_LOGEN_BUF6_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2155 [B2056_SYN_LOGEN_CBUFRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2156 [B2056_SYN_LOGEN_CBUFRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2157 [B2056_SYN_LOGEN_CBUFRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2158 [B2056_SYN_LOGEN_CBUFRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2159 [B2056_SYN_LOGEN_CBUFTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2160 [B2056_SYN_LOGEN_CBUFTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2161 [B2056_SYN_LOGEN_CBUFTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2162 [B2056_SYN_LOGEN_CBUFTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2163 [B2056_SYN_LOGEN_CMOSRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2164 [B2056_SYN_LOGEN_CMOSRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2165 [B2056_SYN_LOGEN_CMOSRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2166 [B2056_SYN_LOGEN_CMOSRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2167 [B2056_SYN_LOGEN_CMOSTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2168 [B2056_SYN_LOGEN_CMOSTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2169 [B2056_SYN_LOGEN_CMOSTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2170 [B2056_SYN_LOGEN_CMOSTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2171 [B2056_SYN_LOGEN_ACL_WAITCNT] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2172 [B2056_SYN_LOGEN_CORE_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2173 [B2056_SYN_LOGEN_RX_CMOS_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2174 [B2056_SYN_LOGEN_TX_CMOS_VALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2175};
2176
2177static const struct b2056_inittab_entry b2056_inittab_rev7_tx[] = {
2178 [B2056_TX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2179 [B2056_TX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2180 [B2056_TX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2181 [B2056_TX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2182 [B2056_TX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2183 [B2056_TX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2184 [B2056_TX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2185 [B2056_TX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2186 [B2056_TX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2187 [B2056_TX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2188 [B2056_TX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2189 [B2056_TX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2190 [B2056_TX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2191 [B2056_TX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2192 [B2056_TX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2193 [B2056_TX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2194 [B2056_TX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2195 [B2056_TX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2196 [B2056_TX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2197 [B2056_TX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2198 [B2056_TX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2199 [B2056_TX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2200 [B2056_TX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2201 [B2056_TX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2202 [B2056_TX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2203 [B2056_TX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2204 [B2056_TX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2205 [B2056_TX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2206 [B2056_TX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2207 [B2056_TX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2208 [B2056_TX_IQCAL_GAIN_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2209 [B2056_TX_LOFT_FINE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2210 [B2056_TX_LOFT_FINE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2211 [B2056_TX_LOFT_COARSE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2212 [B2056_TX_LOFT_COARSE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2213 [B2056_TX_TX_COM_MASTER1] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2214 [B2056_TX_TX_COM_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2215 [B2056_TX_RXIQCAL_TXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2216 [B2056_TX_TX_SSI_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2217 [B2056_TX_IQCAL_VCM_HG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2218 [B2056_TX_IQCAL_IDAC] = { .ghz5 = 0x0037, .ghz2 = 0x0037, NOUPLOAD, },
2219 [B2056_TX_TSSI_VCM] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2220 [B2056_TX_TX_AMP_DET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2221 [B2056_TX_TX_SSI_MUX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2222 [B2056_TX_TSSIA] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2223 [B2056_TX_TSSIG] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2224 [B2056_TX_TSSI_MISC1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2225 [B2056_TX_TSSI_MISC2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2226 [B2056_TX_TSSI_MISC3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2227 [B2056_TX_PA_SPARE1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
2228 [B2056_TX_PA_SPARE2] = { .ghz5 = 0x00ee, .ghz2 = 0x00ee, UPLOAD, },
2229 [B2056_TX_INTPAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2230 [B2056_TX_INTPAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2231 [B2056_TX_INTPAA_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2232 [B2056_TX_INTPAA_IAUX_STAT] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
2233 [B2056_TX_INTPAA_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2234 [B2056_TX_INTPAA_IMAIN_STAT] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
2235 [B2056_TX_INTPAA_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2236 [B2056_TX_INTPAA_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
2237 [B2056_TX_INTPAA_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
2238 [B2056_TX_INTPAA_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2239 [B2056_TX_INTPAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2240 [B2056_TX_INTPAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2241 [B2056_TX_INTPAG_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2242 [B2056_TX_INTPAG_IAUX_STAT] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2243 [B2056_TX_INTPAG_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2244 [B2056_TX_INTPAG_IMAIN_STAT] = { .ghz5 = 0x001e, .ghz2 = 0x001e, NOUPLOAD, },
2245 [B2056_TX_INTPAG_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2246 [B2056_TX_INTPAG_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
2247 [B2056_TX_INTPAG_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
2248 [B2056_TX_INTPAG_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2249 [B2056_TX_PADA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2250 [B2056_TX_PADA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
2251 [B2056_TX_PADA_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2252 [B2056_TX_PADA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2253 [B2056_TX_PADA_BOOST_TUNE] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
2254 [B2056_TX_PADA_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
2255 [B2056_TX_PADG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2256 [B2056_TX_PADG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2257 [B2056_TX_PADG_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2258 [B2056_TX_PADG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2259 [B2056_TX_PADG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2260 [B2056_TX_PADG_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
2261 [B2056_TX_PGAA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2262 [B2056_TX_PGAA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
2263 [B2056_TX_PGAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2264 [B2056_TX_PGAA_BOOST_TUNE] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
2265 [B2056_TX_PGAA_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
2266 [B2056_TX_PGAA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2267 [B2056_TX_PGAG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2268 [B2056_TX_PGAG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2269 [B2056_TX_PGAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2270 [B2056_TX_PGAG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2271 [B2056_TX_PGAG_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
2272 [B2056_TX_PGAG_MISC] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2273 [B2056_TX_MIXA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2274 [B2056_TX_MIXA_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2275 [B2056_TX_MIXG] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2276 [B2056_TX_MIXG_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2277 [B2056_TX_BB_GM_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2278 [B2056_TX_GMBB_GM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2279 [B2056_TX_GMBB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
2280 [B2056_TX_TXLPF_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2281 [B2056_TX_TXLPF_RCCAL] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2282 [B2056_TX_TXLPF_RCCAL_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2283 [B2056_TX_TXLPF_RCCAL_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2284 [B2056_TX_TXLPF_RCCAL_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2285 [B2056_TX_TXLPF_RCCAL_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2286 [B2056_TX_TXLPF_RCCAL_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2287 [B2056_TX_TXLPF_RCCAL_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2288 [B2056_TX_TXLPF_RCCAL_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2289 [B2056_TX_TXLPF_BW] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2290 [B2056_TX_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2291 [B2056_TX_TXLPF_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2292 [B2056_TX_TXLPF_IDAC_0] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
2293 [B2056_TX_TXLPF_IDAC_1] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
2294 [B2056_TX_TXLPF_IDAC_2] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
2295 [B2056_TX_TXLPF_IDAC_3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2296 [B2056_TX_TXLPF_IDAC_4] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2297 [B2056_TX_TXLPF_IDAC_5] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
2298 [B2056_TX_TXLPF_IDAC_6] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
2299 [B2056_TX_TXLPF_OPAMP_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
2300 [B2056_TX_TXLPF_MISC] = { .ghz5 = 0x005b, .ghz2 = 0x005b, NOUPLOAD, },
2301 [B2056_TX_TXSPARE1] = { .ghz5 = 0x0030, .ghz2 = 0x0030, UPLOAD, },
2302 [B2056_TX_TXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2303 [B2056_TX_TXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2304 [B2056_TX_TXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2305 [B2056_TX_TXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2306 [B2056_TX_TXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2307 [B2056_TX_TXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2308 [B2056_TX_TXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2309 [B2056_TX_TXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2310 [B2056_TX_TXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2311 [B2056_TX_TXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2312 [B2056_TX_TXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2313 [B2056_TX_TXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2314 [B2056_TX_TXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2315 [B2056_TX_TXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2316 [B2056_TX_TXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2317 [B2056_TX_STATUS_INTPA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2318 [B2056_TX_STATUS_PAD_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2319 [B2056_TX_STATUS_PGA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2320 [B2056_TX_STATUS_GM_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2321 [B2056_TX_STATUS_TXLPF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2322 [B2056_TX_STATUS_TXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2323 [B2056_TX_GMBB_IDAC0] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2324 [B2056_TX_GMBB_IDAC1] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2325 [B2056_TX_GMBB_IDAC2] = { .ghz5 = 0x0071, .ghz2 = 0x0071, UPLOAD, },
2326 [B2056_TX_GMBB_IDAC3] = { .ghz5 = 0x0071, .ghz2 = 0x0071, UPLOAD, },
2327 [B2056_TX_GMBB_IDAC4] = { .ghz5 = 0x0072, .ghz2 = 0x0072, UPLOAD, },
2328 [B2056_TX_GMBB_IDAC5] = { .ghz5 = 0x0073, .ghz2 = 0x0073, UPLOAD, },
2329 [B2056_TX_GMBB_IDAC6] = { .ghz5 = 0x0074, .ghz2 = 0x0074, UPLOAD, },
2330 [B2056_TX_GMBB_IDAC7] = { .ghz5 = 0x0075, .ghz2 = 0x0075, UPLOAD, },
2331};
2332
2333static const struct b2056_inittab_entry b2056_inittab_rev7_rx[] = {
2334 [B2056_RX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2335 [B2056_RX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2336 [B2056_RX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2337 [B2056_RX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2338 [B2056_RX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2339 [B2056_RX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2340 [B2056_RX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2341 [B2056_RX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2342 [B2056_RX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2343 [B2056_RX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2344 [B2056_RX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2345 [B2056_RX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2346 [B2056_RX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2347 [B2056_RX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2348 [B2056_RX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2349 [B2056_RX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2350 [B2056_RX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2351 [B2056_RX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2352 [B2056_RX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2353 [B2056_RX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2354 [B2056_RX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2355 [B2056_RX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2356 [B2056_RX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2357 [B2056_RX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2358 [B2056_RX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2359 [B2056_RX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2360 [B2056_RX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2361 [B2056_RX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2362 [B2056_RX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2363 [B2056_RX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2364 [B2056_RX_RXIQCAL_RXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2365 [B2056_RX_RSSI_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2366 [B2056_RX_RSSI_SEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2367 [B2056_RX_RSSI_GAIN] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
2368 [B2056_RX_RSSI_NB_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
2369 [B2056_RX_RSSI_WB2I_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
2370 [B2056_RX_RSSI_WB2I_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
2371 [B2056_RX_RSSI_WB2Q_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
2372 [B2056_RX_RSSI_WB2Q_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
2373 [B2056_RX_RSSI_POLE] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2374 [B2056_RX_RSSI_WB1_IDAC] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
2375 [B2056_RX_RSSI_MISC] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
2376 [B2056_RX_LNAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2377 [B2056_RX_LNAA_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2378 [B2056_RX_LNAA_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
2379 [B2056_RX_LNA_A_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
2380 [B2056_RX_BIASPOLE_LNAA1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
2381 [B2056_RX_LNAA2_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
2382 [B2056_RX_LNA1A_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2383 [B2056_RX_LNAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2384 [B2056_RX_LNAG_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2385 [B2056_RX_LNAG_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
2386 [B2056_RX_LNA_G_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
2387 [B2056_RX_BIASPOLE_LNAG1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
2388 [B2056_RX_LNAG2_IDAC] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
2389 [B2056_RX_LNA1G_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2390 [B2056_RX_MIXA_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2391 [B2056_RX_MIXA_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
2392 [B2056_RX_MIXA_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2393 [B2056_RX_MIXA_LOB_BIAS] = { .ghz5 = 0x0088, .ghz2 = 0x0088, UPLOAD, },
2394 [B2056_RX_MIXA_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2395 [B2056_RX_MIXA_CMFB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
2396 [B2056_RX_MIXA_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
2397 [B2056_RX_MIXA_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2398 [B2056_RX_MIXA_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2399 [B2056_RX_MIXA_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2400 [B2056_RX_MIXG_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2401 [B2056_RX_MIXG_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
2402 [B2056_RX_MIXG_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2403 [B2056_RX_MIXG_LOB_BIAS] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
2404 [B2056_RX_MIXG_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2405 [B2056_RX_MIXG_CMFB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
2406 [B2056_RX_MIXG_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2407 [B2056_RX_MIXG_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2408 [B2056_RX_MIXG_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2409 [B2056_RX_MIXG_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2410 [B2056_RX_TIA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2411 [B2056_RX_TIA_IOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
2412 [B2056_RX_TIA_QOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
2413 [B2056_RX_TIA_IMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
2414 [B2056_RX_TIA_QMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
2415 [B2056_RX_TIA_GAIN] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
2416 [B2056_RX_TIA_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2417 [B2056_RX_TIA_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2418 [B2056_RX_BB_LPF_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2419 [B2056_RX_AACI_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2420 [B2056_RX_RXLPF_IDAC] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2421 [B2056_RX_RXLPF_OPAMPBIAS_LOWQ] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2422 [B2056_RX_RXLPF_OPAMPBIAS_HIGHQ]= { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2423 [B2056_RX_RXLPF_BIAS_DCCANCEL] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2424 [B2056_RX_RXLPF_OUTVCM] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
2425 [B2056_RX_RXLPF_INVCM_BODY] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2426 [B2056_RX_RXLPF_CC_OP] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
2427 [B2056_RX_RXLPF_GAIN] = { .ghz5 = 0x0023, .ghz2 = 0x0023, NOUPLOAD, },
2428 [B2056_RX_RXLPF_Q_BW] = { .ghz5 = 0x0041, .ghz2 = 0x0041, NOUPLOAD, },
2429 [B2056_RX_RXLPF_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2430 [B2056_RX_RXLPF_RCCAL_HPC] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2431 [B2056_RX_RXHPF_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2432 [B2056_RX_RXHPF_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2433 [B2056_RX_RXHPF_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2434 [B2056_RX_RXHPF_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2435 [B2056_RX_RXHPF_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2436 [B2056_RX_RXHPF_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2437 [B2056_RX_RXHPF_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2438 [B2056_RX_RXHPF_OFF7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2439 [B2056_RX_RXLPF_RCCAL_LPC] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2440 [B2056_RX_RXLPF_OFF_0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2441 [B2056_RX_RXLPF_OFF_1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2442 [B2056_RX_RXLPF_OFF_2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2443 [B2056_RX_RXLPF_OFF_3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2444 [B2056_RX_RXLPF_OFF_4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2445 [B2056_RX_UNUSED] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2446 [B2056_RX_VGA_MASTER] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2447 [B2056_RX_VGA_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2448 [B2056_RX_VGA_BIAS_DCCANCEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
2449 [B2056_RX_VGA_GAIN] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2450 [B2056_RX_VGA_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2451 [B2056_RX_VGABUF_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2452 [B2056_RX_VGABUF_GAIN_BW] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
2453 [B2056_RX_TXFBMIX_A] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2454 [B2056_RX_TXFBMIX_G] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2455 [B2056_RX_RXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2456 [B2056_RX_RXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2457 [B2056_RX_RXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2458 [B2056_RX_RXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2459 [B2056_RX_RXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2460 [B2056_RX_RXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2461 [B2056_RX_RXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2462 [B2056_RX_RXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2463 [B2056_RX_RXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2464 [B2056_RX_RXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2465 [B2056_RX_RXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2466 [B2056_RX_RXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2467 [B2056_RX_RXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2468 [B2056_RX_RXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2469 [B2056_RX_RXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2470 [B2056_RX_RXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2471 [B2056_RX_STATUS_LNAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2472 [B2056_RX_STATUS_LNAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2473 [B2056_RX_STATUS_MIXTIA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2474 [B2056_RX_STATUS_RXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2475 [B2056_RX_STATUS_VGA_BUF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2476 [B2056_RX_STATUS_RXLPF_Q] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2477 [B2056_RX_STATUS_RXLPF_BUF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2478 [B2056_RX_STATUS_RXLPF_VGA_HPC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2479 [B2056_RX_STATUS_RXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2480 [B2056_RX_STATUS_HPC_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2481};
2482
2483static const struct b2056_inittab_entry b2056_inittab_rev8_syn[] = {
2484 [B2056_SYN_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2485 [B2056_SYN_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2486 [B2056_SYN_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2487 [B2056_SYN_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2488 [B2056_SYN_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2489 [B2056_SYN_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2490 [B2056_SYN_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2491 [B2056_SYN_COM_PU] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2492 [B2056_SYN_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2493 [B2056_SYN_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2494 [B2056_SYN_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2495 [B2056_SYN_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2496 [B2056_SYN_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2497 [B2056_SYN_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2498 [B2056_SYN_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2499 [B2056_SYN_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2500 [B2056_SYN_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2501 [B2056_SYN_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2502 [B2056_SYN_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2503 [B2056_SYN_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2504 [B2056_SYN_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2505 [B2056_SYN_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2506 [B2056_SYN_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2507 [B2056_SYN_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2508 [B2056_SYN_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2509 [B2056_SYN_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2510 [B2056_SYN_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2511 [B2056_SYN_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2512 [B2056_SYN_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2513 [B2056_SYN_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2514 [B2056_SYN_GPIO_MASTER1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2515 [B2056_SYN_GPIO_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2516 [B2056_SYN_TOPBIAS_MASTER] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
2517 [B2056_SYN_TOPBIAS_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2518 [B2056_SYN_AFEREG] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2519 [B2056_SYN_TEMPPROCSENSE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2520 [B2056_SYN_TEMPPROCSENSEIDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2521 [B2056_SYN_TEMPPROCSENSERCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2522 [B2056_SYN_LPO] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2523 [B2056_SYN_VDDCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2524 [B2056_SYN_VDDCAL_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2525 [B2056_SYN_VDDCAL_STATUS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2526 [B2056_SYN_RCAL_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2527 [B2056_SYN_RCAL_CODE_OUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2528 [B2056_SYN_RCCAL_CTRL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2529 [B2056_SYN_RCCAL_CTRL1] = { .ghz5 = 0x001f, .ghz2 = 0x001f, NOUPLOAD, },
2530 [B2056_SYN_RCCAL_CTRL2] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
2531 [B2056_SYN_RCCAL_CTRL3] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
2532 [B2056_SYN_RCCAL_CTRL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2533 [B2056_SYN_RCCAL_CTRL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2534 [B2056_SYN_RCCAL_CTRL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2535 [B2056_SYN_RCCAL_CTRL7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2536 [B2056_SYN_RCCAL_CTRL8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2537 [B2056_SYN_RCCAL_CTRL9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2538 [B2056_SYN_RCCAL_CTRL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2539 [B2056_SYN_RCCAL_CTRL11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2540 [B2056_SYN_ZCAL_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2541 [B2056_SYN_ZCAL_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2542 [B2056_SYN_PLL_MAST1] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2543 [B2056_SYN_PLL_MAST2] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
2544 [B2056_SYN_PLL_MAST3] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
2545 [B2056_SYN_PLL_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2546 [B2056_SYN_PLL_XTAL0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2547 [B2056_SYN_PLL_XTAL1] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2548 [B2056_SYN_PLL_XTAL3] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2549 [B2056_SYN_PLL_XTAL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2550 [B2056_SYN_PLL_XTAL5] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
2551 [B2056_SYN_PLL_XTAL6] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2552 [B2056_SYN_PLL_REFDIV] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2553 [B2056_SYN_PLL_PFD] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2554 [B2056_SYN_PLL_CP1] = { .ghz5 = 0x000f, .ghz2 = 0x000f, NOUPLOAD, },
2555 [B2056_SYN_PLL_CP2] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
2556 [B2056_SYN_PLL_CP3] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
2557 [B2056_SYN_PLL_LOOPFILTER1] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
2558 [B2056_SYN_PLL_LOOPFILTER2] = { .ghz5 = 0x000d, .ghz2 = 0x000d, NOUPLOAD, },
2559 [B2056_SYN_PLL_LOOPFILTER3] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2560 [B2056_SYN_PLL_LOOPFILTER4] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2561 [B2056_SYN_PLL_LOOPFILTER5] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2562 [B2056_SYN_PLL_MMD1] = { .ghz5 = 0x001c, .ghz2 = 0x001c, NOUPLOAD, },
2563 [B2056_SYN_PLL_MMD2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2564 [B2056_SYN_PLL_VCO1] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2565 [B2056_SYN_PLL_VCO2] = { .ghz5 = 0x00f7, .ghz2 = 0x00f7, UPLOAD, },
2566 [B2056_SYN_PLL_MONITOR1] = { .ghz5 = 0x00b4, .ghz2 = 0x00b4, NOUPLOAD, },
2567 [B2056_SYN_PLL_MONITOR2] = { .ghz5 = 0x00d2, .ghz2 = 0x00d2, NOUPLOAD, },
2568 [B2056_SYN_PLL_VCOCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2569 [B2056_SYN_PLL_VCOCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2570 [B2056_SYN_PLL_VCOCAL4] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2571 [B2056_SYN_PLL_VCOCAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
2572 [B2056_SYN_PLL_VCOCAL6] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
2573 [B2056_SYN_PLL_VCOCAL7] = { .ghz5 = 0x003e, .ghz2 = 0x003e, NOUPLOAD, },
2574 [B2056_SYN_PLL_VCOCAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2575 [B2056_SYN_PLL_VCOCAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2576 [B2056_SYN_PLL_VCOCAL10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2577 [B2056_SYN_PLL_VCOCAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2578 [B2056_SYN_PLL_VCOCAL12] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
2579 [B2056_SYN_PLL_VCOCAL13] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2580 [B2056_SYN_PLL_VREG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2581 [B2056_SYN_PLL_STATUS1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2582 [B2056_SYN_PLL_STATUS2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2583 [B2056_SYN_PLL_STATUS3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2584 [B2056_SYN_LOGEN_PU0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2585 [B2056_SYN_LOGEN_PU1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2586 [B2056_SYN_LOGEN_PU2] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
2587 [B2056_SYN_LOGEN_PU3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2588 [B2056_SYN_LOGEN_PU5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2589 [B2056_SYN_LOGEN_PU6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2590 [B2056_SYN_LOGEN_PU7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2591 [B2056_SYN_LOGEN_PU8] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2592 [B2056_SYN_LOGEN_BIAS_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2593 [B2056_SYN_LOGEN_RCCR1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2594 [B2056_SYN_LOGEN_VCOBUF1] = { .ghz5 = 0x0060, .ghz2 = 0x0060, NOUPLOAD, },
2595 [B2056_SYN_LOGEN_MIXER1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2596 [B2056_SYN_LOGEN_MIXER2] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2597 [B2056_SYN_LOGEN_BUF1] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2598 [B2056_SYN_LOGENBUF2] = { .ghz5 = 0x008f, .ghz2 = 0x008f, UPLOAD, },
2599 [B2056_SYN_LOGEN_BUF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2600 [B2056_SYN_LOGEN_BUF4] = { .ghz5 = 0x00cc, .ghz2 = 0x00cc, NOUPLOAD, },
2601 [B2056_SYN_LOGEN_DIV1] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2602 [B2056_SYN_LOGEN_DIV2] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2603 [B2056_SYN_LOGEN_DIV3] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2604 [B2056_SYN_LOGEN_ACL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2605 [B2056_SYN_LOGEN_ACL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2606 [B2056_SYN_LOGEN_ACL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2607 [B2056_SYN_LOGEN_ACL4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2608 [B2056_SYN_LOGEN_ACL5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2609 [B2056_SYN_LOGEN_ACL6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2610 [B2056_SYN_LOGEN_ACLOUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2611 [B2056_SYN_LOGEN_ACLCAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2612 [B2056_SYN_LOGEN_ACLCAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2613 [B2056_SYN_LOGEN_ACLCAL3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2614 [B2056_SYN_CALEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2615 [B2056_SYN_LOGEN_PEAKDET1] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, NOUPLOAD, },
2616 [B2056_SYN_LOGEN_CORE_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2617 [B2056_SYN_LOGEN_RX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2618 [B2056_SYN_LOGEN_TX_DIFF_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2619 [B2056_SYN_LOGEN_RX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2620 [B2056_SYN_LOGEN_TX_CMOS_ACL_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2621 [B2056_SYN_LOGEN_VCOBUF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2622 [B2056_SYN_LOGEN_MIXER3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2623 [B2056_SYN_LOGEN_BUF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2624 [B2056_SYN_LOGEN_BUF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2625 [B2056_SYN_LOGEN_CBUFRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2626 [B2056_SYN_LOGEN_CBUFRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2627 [B2056_SYN_LOGEN_CBUFRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2628 [B2056_SYN_LOGEN_CBUFRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2629 [B2056_SYN_LOGEN_CBUFTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2630 [B2056_SYN_LOGEN_CBUFTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2631 [B2056_SYN_LOGEN_CBUFTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2632 [B2056_SYN_LOGEN_CBUFTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2633 [B2056_SYN_LOGEN_CMOSRX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2634 [B2056_SYN_LOGEN_CMOSRX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2635 [B2056_SYN_LOGEN_CMOSRX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2636 [B2056_SYN_LOGEN_CMOSRX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2637 [B2056_SYN_LOGEN_CMOSTX1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2638 [B2056_SYN_LOGEN_CMOSTX2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2639 [B2056_SYN_LOGEN_CMOSTX3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2640 [B2056_SYN_LOGEN_CMOSTX4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2641 [B2056_SYN_LOGEN_VCOBUF2_OVRVAL]= { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2642 [B2056_SYN_LOGEN_MIXER3_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2643 [B2056_SYN_LOGEN_BUF5_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2644 [B2056_SYN_LOGEN_BUF6_OVRVAL] = { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2645 [B2056_SYN_LOGEN_CBUFRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2646 [B2056_SYN_LOGEN_CBUFRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2647 [B2056_SYN_LOGEN_CBUFRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2648 [B2056_SYN_LOGEN_CBUFRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2649 [B2056_SYN_LOGEN_CBUFTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2650 [B2056_SYN_LOGEN_CBUFTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2651 [B2056_SYN_LOGEN_CBUFTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2652 [B2056_SYN_LOGEN_CBUFTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2653 [B2056_SYN_LOGEN_CMOSRX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2654 [B2056_SYN_LOGEN_CMOSRX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2655 [B2056_SYN_LOGEN_CMOSRX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2656 [B2056_SYN_LOGEN_CMOSRX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2657 [B2056_SYN_LOGEN_CMOSTX1_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2658 [B2056_SYN_LOGEN_CMOSTX2_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2659 [B2056_SYN_LOGEN_CMOSTX3_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2660 [B2056_SYN_LOGEN_CMOSTX4_OVRVAL]= { .ghz5 = 0x0066, .ghz2 = 0x0066, NOUPLOAD, },
2661 [B2056_SYN_LOGEN_ACL_WAITCNT] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2662 [B2056_SYN_LOGEN_CORE_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2663 [B2056_SYN_LOGEN_RX_CMOS_CALVALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2664 [B2056_SYN_LOGEN_TX_CMOS_VALID] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2665};
2666
2667static const struct b2056_inittab_entry b2056_inittab_rev8_tx[] = {
2668 [B2056_TX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2669 [B2056_TX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2670 [B2056_TX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2671 [B2056_TX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2672 [B2056_TX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2673 [B2056_TX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2674 [B2056_TX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2675 [B2056_TX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2676 [B2056_TX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2677 [B2056_TX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2678 [B2056_TX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2679 [B2056_TX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2680 [B2056_TX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2681 [B2056_TX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2682 [B2056_TX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2683 [B2056_TX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2684 [B2056_TX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2685 [B2056_TX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2686 [B2056_TX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2687 [B2056_TX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2688 [B2056_TX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2689 [B2056_TX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2690 [B2056_TX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2691 [B2056_TX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2692 [B2056_TX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2693 [B2056_TX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2694 [B2056_TX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2695 [B2056_TX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2696 [B2056_TX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2697 [B2056_TX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2698 [B2056_TX_IQCAL_GAIN_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2699 [B2056_TX_LOFT_FINE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2700 [B2056_TX_LOFT_FINE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2701 [B2056_TX_LOFT_COARSE_I] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2702 [B2056_TX_LOFT_COARSE_Q] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2703 [B2056_TX_TX_COM_MASTER1] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2704 [B2056_TX_TX_COM_MASTER2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2705 [B2056_TX_RXIQCAL_TXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2706 [B2056_TX_TX_SSI_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2707 [B2056_TX_IQCAL_VCM_HG] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2708 [B2056_TX_IQCAL_IDAC] = { .ghz5 = 0x0037, .ghz2 = 0x0037, NOUPLOAD, },
2709 [B2056_TX_TSSI_VCM] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2710 [B2056_TX_TX_AMP_DET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2711 [B2056_TX_TX_SSI_MUX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2712 [B2056_TX_TSSIA] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2713 [B2056_TX_TSSIG] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2714 [B2056_TX_TSSI_MISC1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2715 [B2056_TX_TSSI_MISC2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2716 [B2056_TX_TSSI_MISC3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2717 [B2056_TX_PA_SPARE1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
2718 [B2056_TX_PA_SPARE2] = { .ghz5 = 0x00ee, .ghz2 = 0x00ee, UPLOAD, },
2719 [B2056_TX_INTPAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2720 [B2056_TX_INTPAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2721 [B2056_TX_INTPAA_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2722 [B2056_TX_INTPAA_IAUX_STAT] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
2723 [B2056_TX_INTPAA_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2724 [B2056_TX_INTPAA_IMAIN_STAT] = { .ghz5 = 0x0050, .ghz2 = 0x0050, UPLOAD, },
2725 [B2056_TX_INTPAA_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2726 [B2056_TX_INTPAA_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
2727 [B2056_TX_INTPAA_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
2728 [B2056_TX_INTPAA_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2729 [B2056_TX_INTPAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2730 [B2056_TX_INTPAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2731 [B2056_TX_INTPAG_BOOST_TUNE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2732 [B2056_TX_INTPAG_IAUX_STAT] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2733 [B2056_TX_INTPAG_IAUX_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2734 [B2056_TX_INTPAG_IMAIN_STAT] = { .ghz5 = 0x001e, .ghz2 = 0x001e, NOUPLOAD, },
2735 [B2056_TX_INTPAG_IMAIN_DYN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2736 [B2056_TX_INTPAG_CASCBIAS] = { .ghz5 = 0x006e, .ghz2 = 0x006e, NOUPLOAD, },
2737 [B2056_TX_INTPAG_PASLOPE] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
2738 [B2056_TX_INTPAG_PA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2739 [B2056_TX_PADA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2740 [B2056_TX_PADA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
2741 [B2056_TX_PADA_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2742 [B2056_TX_PADA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2743 [B2056_TX_PADA_BOOST_TUNE] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
2744 [B2056_TX_PADA_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
2745 [B2056_TX_PADG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2746 [B2056_TX_PADG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2747 [B2056_TX_PADG_CASCBIAS] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2748 [B2056_TX_PADG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2749 [B2056_TX_PADG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2750 [B2056_TX_PADG_SLOPE] = { .ghz5 = 0x0070, .ghz2 = 0x0070, UPLOAD, },
2751 [B2056_TX_PGAA_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2752 [B2056_TX_PGAA_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
2753 [B2056_TX_PGAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2754 [B2056_TX_PGAA_BOOST_TUNE] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
2755 [B2056_TX_PGAA_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
2756 [B2056_TX_PGAA_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2757 [B2056_TX_PGAG_MASTER] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2758 [B2056_TX_PGAG_IDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2759 [B2056_TX_PGAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2760 [B2056_TX_PGAG_BOOST_TUNE] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2761 [B2056_TX_PGAG_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, UPLOAD, },
2762 [B2056_TX_PGAG_MISC] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2763 [B2056_TX_MIXA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2764 [B2056_TX_MIXA_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2765 [B2056_TX_MIXG] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2766 [B2056_TX_MIXG_BOOST_TUNE] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2767 [B2056_TX_BB_GM_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2768 [B2056_TX_GMBB_GM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2769 [B2056_TX_GMBB_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
2770 [B2056_TX_TXLPF_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2771 [B2056_TX_TXLPF_RCCAL] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2772 [B2056_TX_TXLPF_RCCAL_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2773 [B2056_TX_TXLPF_RCCAL_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2774 [B2056_TX_TXLPF_RCCAL_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2775 [B2056_TX_TXLPF_RCCAL_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2776 [B2056_TX_TXLPF_RCCAL_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2777 [B2056_TX_TXLPF_RCCAL_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2778 [B2056_TX_TXLPF_RCCAL_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2779 [B2056_TX_TXLPF_BW] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2780 [B2056_TX_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2781 [B2056_TX_TXLPF_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2782 [B2056_TX_TXLPF_IDAC_0] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
2783 [B2056_TX_TXLPF_IDAC_1] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
2784 [B2056_TX_TXLPF_IDAC_2] = { .ghz5 = 0x000e, .ghz2 = 0x000e, NOUPLOAD, },
2785 [B2056_TX_TXLPF_IDAC_3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2786 [B2056_TX_TXLPF_IDAC_4] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
2787 [B2056_TX_TXLPF_IDAC_5] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
2788 [B2056_TX_TXLPF_IDAC_6] = { .ghz5 = 0x001b, .ghz2 = 0x001b, NOUPLOAD, },
2789 [B2056_TX_TXLPF_OPAMP_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
2790 [B2056_TX_TXLPF_MISC] = { .ghz5 = 0x005b, .ghz2 = 0x005b, NOUPLOAD, },
2791 [B2056_TX_TXSPARE1] = { .ghz5 = 0x0030, .ghz2 = 0x0030, UPLOAD, },
2792 [B2056_TX_TXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2793 [B2056_TX_TXSPARE3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2794 [B2056_TX_TXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2795 [B2056_TX_TXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2796 [B2056_TX_TXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2797 [B2056_TX_TXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2798 [B2056_TX_TXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2799 [B2056_TX_TXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2800 [B2056_TX_TXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2801 [B2056_TX_TXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2802 [B2056_TX_TXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2803 [B2056_TX_TXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2804 [B2056_TX_TXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2805 [B2056_TX_TXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2806 [B2056_TX_TXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2807 [B2056_TX_STATUS_INTPA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2808 [B2056_TX_STATUS_PAD_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2809 [B2056_TX_STATUS_PGA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2810 [B2056_TX_STATUS_GM_TXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2811 [B2056_TX_STATUS_TXLPF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2812 [B2056_TX_STATUS_TXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2813 [B2056_TX_GMBB_IDAC0] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2814 [B2056_TX_GMBB_IDAC1] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2815 [B2056_TX_GMBB_IDAC2] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2816 [B2056_TX_GMBB_IDAC3] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2817 [B2056_TX_GMBB_IDAC4] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2818 [B2056_TX_GMBB_IDAC5] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2819 [B2056_TX_GMBB_IDAC6] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2820 [B2056_TX_GMBB_IDAC7] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
2821};
2822
2823static const struct b2056_inittab_entry b2056_inittab_rev8_rx[] = {
2824 [B2056_RX_RESERVED_ADDR2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2825 [B2056_RX_RESERVED_ADDR3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2826 [B2056_RX_RESERVED_ADDR4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2827 [B2056_RX_RESERVED_ADDR5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2828 [B2056_RX_RESERVED_ADDR6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2829 [B2056_RX_RESERVED_ADDR7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2830 [B2056_RX_COM_CTRL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2831 [B2056_RX_COM_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2832 [B2056_RX_COM_OVR] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2833 [B2056_RX_COM_RESET] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2834 [B2056_RX_COM_RCAL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2835 [B2056_RX_COM_RC_RXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2836 [B2056_RX_COM_RC_TXLPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2837 [B2056_RX_COM_RC_RXHPF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2838 [B2056_RX_RESERVED_ADDR16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2839 [B2056_RX_RESERVED_ADDR17] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2840 [B2056_RX_RESERVED_ADDR18] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2841 [B2056_RX_RESERVED_ADDR19] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2842 [B2056_RX_RESERVED_ADDR20] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2843 [B2056_RX_RESERVED_ADDR21] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2844 [B2056_RX_RESERVED_ADDR22] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2845 [B2056_RX_RESERVED_ADDR23] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2846 [B2056_RX_RESERVED_ADDR24] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2847 [B2056_RX_RESERVED_ADDR25] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2848 [B2056_RX_RESERVED_ADDR26] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2849 [B2056_RX_RESERVED_ADDR27] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2850 [B2056_RX_RESERVED_ADDR28] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2851 [B2056_RX_RESERVED_ADDR29] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2852 [B2056_RX_RESERVED_ADDR30] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2853 [B2056_RX_RESERVED_ADDR31] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2854 [B2056_RX_RXIQCAL_RXMUX] = { .ghz5 = 0x0003, .ghz2 = 0x0003, NOUPLOAD, },
2855 [B2056_RX_RSSI_PU] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2856 [B2056_RX_RSSI_SEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2857 [B2056_RX_RSSI_GAIN] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
2858 [B2056_RX_RSSI_NB_IDAC] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
2859 [B2056_RX_RSSI_WB2I_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
2860 [B2056_RX_RSSI_WB2I_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
2861 [B2056_RX_RSSI_WB2Q_IDAC_1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
2862 [B2056_RX_RSSI_WB2Q_IDAC_2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, NOUPLOAD, },
2863 [B2056_RX_RSSI_POLE] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2864 [B2056_RX_RSSI_WB1_IDAC] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
2865 [B2056_RX_RSSI_MISC] = { .ghz5 = 0x0090, .ghz2 = 0x0090, NOUPLOAD, },
2866 [B2056_RX_LNAA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2867 [B2056_RX_LNAA_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2868 [B2056_RX_LNAA_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
2869 [B2056_RX_LNA_A_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
2870 [B2056_RX_BIASPOLE_LNAA1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
2871 [B2056_RX_LNAA2_IDAC] = { .ghz5 = 0x00ff, .ghz2 = 0x00ff, UPLOAD, },
2872 [B2056_RX_LNA1A_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2873 [B2056_RX_LNAG_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2874 [B2056_RX_LNAG_TUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
2875 [B2056_RX_LNAG_GAIN] = { .ghz5 = 0x0032, .ghz2 = 0x0032, NOUPLOAD, },
2876 [B2056_RX_LNA_G_SLOPE] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
2877 [B2056_RX_BIASPOLE_LNAG1_IDAC] = { .ghz5 = 0x0017, .ghz2 = 0x0017, UPLOAD, },
2878 [B2056_RX_LNAG2_IDAC] = { .ghz5 = 0x00f0, .ghz2 = 0x00f0, UPLOAD, },
2879 [B2056_RX_LNA1G_MISC] = { .ghz5 = 0x0020, .ghz2 = 0x0020, NOUPLOAD, },
2880 [B2056_RX_MIXA_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2881 [B2056_RX_MIXA_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
2882 [B2056_RX_MIXA_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2883 [B2056_RX_MIXA_LOB_BIAS] = { .ghz5 = 0x0088, .ghz2 = 0x0088, UPLOAD, },
2884 [B2056_RX_MIXA_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2885 [B2056_RX_MIXA_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
2886 [B2056_RX_MIXA_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
2887 [B2056_RX_MIXA_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2888 [B2056_RX_MIXA_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2889 [B2056_RX_MIXA_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2890 [B2056_RX_MIXG_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2891 [B2056_RX_MIXG_VCM] = { .ghz5 = 0x0055, .ghz2 = 0x0055, UPLOAD, },
2892 [B2056_RX_MIXG_CTRLPTAT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2893 [B2056_RX_MIXG_LOB_BIAS] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
2894 [B2056_RX_MIXG_CORE_IDAC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2895 [B2056_RX_MIXG_CMFB_IDAC] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
2896 [B2056_RX_MIXG_BIAS_AUX] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2897 [B2056_RX_MIXG_BIAS_MAIN] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
2898 [B2056_RX_MIXG_BIAS_MISC] = { .ghz5 = 0x0004, .ghz2 = 0x0004, NOUPLOAD, },
2899 [B2056_RX_MIXG_MAST_BIAS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2900 [B2056_RX_TIA_MASTER] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2901 [B2056_RX_TIA_IOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
2902 [B2056_RX_TIA_QOPAMP] = { .ghz5 = 0x0026, .ghz2 = 0x0026, UPLOAD, },
2903 [B2056_RX_TIA_IMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
2904 [B2056_RX_TIA_QMISC] = { .ghz5 = 0x000f, .ghz2 = 0x000f, UPLOAD, },
2905 [B2056_RX_TIA_GAIN] = { .ghz5 = 0x0044, .ghz2 = 0x0044, NOUPLOAD, },
2906 [B2056_RX_TIA_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2907 [B2056_RX_TIA_SPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2908 [B2056_RX_BB_LPF_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2909 [B2056_RX_AACI_MASTER] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
2910 [B2056_RX_RXLPF_IDAC] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2911 [B2056_RX_RXLPF_OPAMPBIAS_LOWQ] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2912 [B2056_RX_RXLPF_OPAMPBIAS_HIGHQ]= { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2913 [B2056_RX_RXLPF_BIAS_DCCANCEL] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
2914 [B2056_RX_RXLPF_OUTVCM] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
2915 [B2056_RX_RXLPF_INVCM_BODY] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
2916 [B2056_RX_RXLPF_CC_OP] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
2917 [B2056_RX_RXLPF_GAIN] = { .ghz5 = 0x0023, .ghz2 = 0x0023, NOUPLOAD, },
2918 [B2056_RX_RXLPF_Q_BW] = { .ghz5 = 0x0041, .ghz2 = 0x0041, NOUPLOAD, },
2919 [B2056_RX_RXLPF_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2920 [B2056_RX_RXLPF_RCCAL_HPC] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2921 [B2056_RX_RXHPF_OFF0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2922 [B2056_RX_RXHPF_OFF1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2923 [B2056_RX_RXHPF_OFF2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2924 [B2056_RX_RXHPF_OFF3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2925 [B2056_RX_RXHPF_OFF4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2926 [B2056_RX_RXHPF_OFF5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2927 [B2056_RX_RXHPF_OFF6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2928 [B2056_RX_RXHPF_OFF7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2929 [B2056_RX_RXLPF_RCCAL_LPC] = { .ghz5 = 0x000c, .ghz2 = 0x000c, NOUPLOAD, },
2930 [B2056_RX_RXLPF_OFF_0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2931 [B2056_RX_RXLPF_OFF_1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2932 [B2056_RX_RXLPF_OFF_2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2933 [B2056_RX_RXLPF_OFF_3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2934 [B2056_RX_RXLPF_OFF_4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2935 [B2056_RX_UNUSED] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2936 [B2056_RX_VGA_MASTER] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2937 [B2056_RX_VGA_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2938 [B2056_RX_VGA_BIAS_DCCANCEL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, UPLOAD, },
2939 [B2056_RX_VGA_GAIN] = { .ghz5 = 0x000a, .ghz2 = 0x000a, NOUPLOAD, },
2940 [B2056_RX_VGA_HP_CORNER_BW] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
2941 [B2056_RX_VGABUF_BIAS] = { .ghz5 = 0x0022, .ghz2 = 0x0022, NOUPLOAD, },
2942 [B2056_RX_VGABUF_GAIN_BW] = { .ghz5 = 0x0030, .ghz2 = 0x0030, NOUPLOAD, },
2943 [B2056_RX_TXFBMIX_A] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2944 [B2056_RX_TXFBMIX_G] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2945 [B2056_RX_RXSPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2946 [B2056_RX_RXSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2947 [B2056_RX_RXSPARE3] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
2948 [B2056_RX_RXSPARE4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2949 [B2056_RX_RXSPARE5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2950 [B2056_RX_RXSPARE6] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2951 [B2056_RX_RXSPARE7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2952 [B2056_RX_RXSPARE8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2953 [B2056_RX_RXSPARE9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2954 [B2056_RX_RXSPARE10] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2955 [B2056_RX_RXSPARE11] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2956 [B2056_RX_RXSPARE12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2957 [B2056_RX_RXSPARE13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2958 [B2056_RX_RXSPARE14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2959 [B2056_RX_RXSPARE15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2960 [B2056_RX_RXSPARE16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2961 [B2056_RX_STATUS_LNAA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2962 [B2056_RX_STATUS_LNAG_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2963 [B2056_RX_STATUS_MIXTIA_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2964 [B2056_RX_STATUS_RXLPF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2965 [B2056_RX_STATUS_VGA_BUF_GAIN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2966 [B2056_RX_STATUS_RXLPF_Q] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2967 [B2056_RX_STATUS_RXLPF_BUF_BW] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2968 [B2056_RX_STATUS_RXLPF_VGA_HPC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2969 [B2056_RX_STATUS_RXLPF_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2970 [B2056_RX_STATUS_HPC_RC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
2971};
2972
2973#define INITTABSPTS(prefix) \
2974 .syn = prefix##_syn, \
2975 .syn_length = ARRAY_SIZE(prefix##_syn), \
2976 .tx = prefix##_tx, \
2977 .tx_length = ARRAY_SIZE(prefix##_tx), \
2978 .rx = prefix##_rx, \
2979 .rx_length = ARRAY_SIZE(prefix##_rx)
2980
2981struct b2056_inittabs_pts b2056_inittabs[] = {
2982 [3] = { INITTABSPTS(b2056_inittab_rev3) },
2983 [4] = { INITTABSPTS(b2056_inittab_rev4) },
2984 [5] = { INITTABSPTS(b2056_inittab_rev5) },
2985 [6] = { INITTABSPTS(b2056_inittab_rev6) },
2986 [7] = { INITTABSPTS(b2056_inittab_rev7) },
2987 [8] = { INITTABSPTS(b2056_inittab_rev8) },
2988 [9] = { INITTABSPTS(b2056_inittab_rev7) },
2989};
2990
2991#define RADIOREGS3(r00, r01, r02, r03, r04, r05, r06, r07, r08, r09, \
2992 r10, r11, r12, r13, r14, r15, r16, r17, r18, r19, \
2993 r20, r21, r22, r23, r24, r25, r26, r27, r28, r29, \
2994 r30, r31, r32, r33, r34, r35, r36) \
2995 .radio_syn_pll_vcocal1 = r00, \
2996 .radio_syn_pll_vcocal2 = r01, \
2997 .radio_syn_pll_refdiv = r02, \
2998 .radio_syn_pll_mmd2 = r03, \
2999 .radio_syn_pll_mmd1 = r04, \
3000 .radio_syn_pll_loopfilter1 = r05, \
3001 .radio_syn_pll_loopfilter2 = r06, \
3002 .radio_syn_pll_loopfilter3 = r07, \
3003 .radio_syn_pll_loopfilter4 = r08, \
3004 .radio_syn_pll_loopfilter5 = r09, \
3005 .radio_syn_reserved_addr27 = r10, \
3006 .radio_syn_reserved_addr28 = r11, \
3007 .radio_syn_reserved_addr29 = r12, \
3008 .radio_syn_logen_vcobuf1 = r13, \
3009 .radio_syn_logen_mixer2 = r14, \
3010 .radio_syn_logen_buf3 = r15, \
3011 .radio_syn_logen_buf4 = r16, \
3012 .radio_rx0_lnaa_tune = r17, \
3013 .radio_rx0_lnag_tune = r18, \
3014 .radio_tx0_intpaa_boost_tune = r19, \
3015 .radio_tx0_intpag_boost_tune = r20, \
3016 .radio_tx0_pada_boost_tune = r21, \
3017 .radio_tx0_padg_boost_tune = r22, \
3018 .radio_tx0_pgaa_boost_tune = r23, \
3019 .radio_tx0_pgag_boost_tune = r24, \
3020 .radio_tx0_mixa_boost_tune = r25, \
3021 .radio_tx0_mixg_boost_tune = r26, \
3022 .radio_rx1_lnaa_tune = r27, \
3023 .radio_rx1_lnag_tune = r28, \
3024 .radio_tx1_intpaa_boost_tune = r29, \
3025 .radio_tx1_intpag_boost_tune = r30, \
3026 .radio_tx1_pada_boost_tune = r31, \
3027 .radio_tx1_padg_boost_tune = r32, \
3028 .radio_tx1_pgaa_boost_tune = r33, \
3029 .radio_tx1_pgag_boost_tune = r34, \
3030 .radio_tx1_mixa_boost_tune = r35, \
3031 .radio_tx1_mixg_boost_tune = r36
3032
3033#define PHYREGS(r0, r1, r2, r3, r4, r5) \
3034 .phy_regs.phy_bw1a = r0, \
3035 .phy_regs.phy_bw2 = r1, \
3036 .phy_regs.phy_bw3 = r2, \
3037 .phy_regs.phy_bw4 = r3, \
3038 .phy_regs.phy_bw5 = r4, \
3039 .phy_regs.phy_bw6 = r5
3040
3041/* http://bcm-v4.sipsolutions.net/802.11/Radio/2056/ChannelTable */
3042static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev3[] = {
3043 { .freq = 4920,
3044 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04,
3045 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
3046 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3047 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3048 0x00, 0x0b, 0x00, 0xff, 0x00),
3049 PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216),
3050 },
3051 { .freq = 4930,
3052 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04,
3053 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
3054 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3055 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3056 0x00, 0x0b, 0x00, 0xff, 0x00),
3057 PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215),
3058 },
3059 { .freq = 4940,
3060 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04,
3061 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
3062 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3063 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3064 0x00, 0x0b, 0x00, 0xff, 0x00),
3065 PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214),
3066 },
3067 { .freq = 4950,
3068 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04,
3069 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
3070 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3071 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3072 0x00, 0x0b, 0x00, 0xff, 0x00),
3073 PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213),
3074 },
3075 { .freq = 4960,
3076 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04,
3077 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3078 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3079 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3080 0x00, 0x0b, 0x00, 0xff, 0x00),
3081 PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212),
3082 },
3083 { .freq = 4970,
3084 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04,
3085 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3086 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3087 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3088 0x00, 0x0b, 0x00, 0xff, 0x00),
3089 PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211),
3090 },
3091 { .freq = 4980,
3092 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04,
3093 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3094 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3095 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3096 0x00, 0x0b, 0x00, 0xff, 0x00),
3097 PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f),
3098 },
3099 { .freq = 4990,
3100 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04,
3101 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3102 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b,
3103 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f,
3104 0x00, 0x0b, 0x00, 0xff, 0x00),
3105 PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e),
3106 },
3107 { .freq = 5000,
3108 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04,
3109 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3110 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3111 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3112 0x00, 0x0b, 0x00, 0xff, 0x00),
3113 PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d),
3114 },
3115 { .freq = 5010,
3116 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04,
3117 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3118 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3119 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3120 0x00, 0x0b, 0x00, 0xff, 0x00),
3121 PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c),
3122 },
3123 { .freq = 5020,
3124 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04,
3125 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3126 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3127 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3128 0x00, 0x0b, 0x00, 0xff, 0x00),
3129 PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b),
3130 },
3131 { .freq = 5030,
3132 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04,
3133 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3134 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3135 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3136 0x00, 0x0b, 0x00, 0xff, 0x00),
3137 PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a),
3138 },
3139 { .freq = 5040,
3140 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04,
3141 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3142 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3143 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3144 0x00, 0x0b, 0x00, 0xff, 0x00),
3145 PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209),
3146 },
3147 { .freq = 5050,
3148 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04,
3149 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3150 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3151 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3152 0x00, 0x0b, 0x00, 0xff, 0x00),
3153 PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208),
3154 },
3155 { .freq = 5060,
3156 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04,
3157 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3158 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3159 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3160 0x00, 0x0b, 0x00, 0xff, 0x00),
3161 PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207),
3162 },
3163 { .freq = 5070,
3164 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04,
3165 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3166 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3167 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3168 0x00, 0x0b, 0x00, 0xff, 0x00),
3169 PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206),
3170 },
3171 { .freq = 5080,
3172 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04,
3173 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3174 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3175 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3176 0x00, 0x0b, 0x00, 0xff, 0x00),
3177 PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205),
3178 },
3179 { .freq = 5090,
3180 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04,
3181 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
3182 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3183 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3184 0x00, 0x0b, 0x00, 0xff, 0x00),
3185 PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204),
3186 },
3187 { .freq = 5100,
3188 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04,
3189 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3190 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3191 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3192 0x00, 0x0b, 0x00, 0xff, 0x00),
3193 PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203),
3194 },
3195 { .freq = 5110,
3196 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04,
3197 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3198 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3199 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3200 0x00, 0x0b, 0x00, 0xfc, 0x00),
3201 PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202),
3202 },
3203 { .freq = 5120,
3204 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04,
3205 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3206 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3207 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3208 0x00, 0x0b, 0x00, 0xfc, 0x00),
3209 PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201),
3210 },
3211 { .freq = 5130,
3212 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04,
3213 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3214 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3215 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3216 0x00, 0x0b, 0x00, 0xfc, 0x00),
3217 PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200),
3218 },
3219 { .freq = 5140,
3220 RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04,
3221 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3222 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3223 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3224 0x00, 0x0b, 0x00, 0xfc, 0x00),
3225 PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff),
3226 },
3227 { .freq = 5160,
3228 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04,
3229 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3230 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3231 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3232 0x00, 0x0b, 0x00, 0xfc, 0x00),
3233 PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd),
3234 },
3235 { .freq = 5170,
3236 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04,
3237 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3238 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3239 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f,
3240 0x00, 0x0b, 0x00, 0xfc, 0x00),
3241 PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc),
3242 },
3243 { .freq = 5180,
3244 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04,
3245 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3246 0xff, 0xef, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3247 0x00, 0xfc, 0x00, 0xef, 0x00, 0x07, 0x00, 0x7f,
3248 0x00, 0x0b, 0x00, 0xfc, 0x00),
3249 PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb),
3250 },
3251 { .freq = 5190,
3252 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04,
3253 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3254 0xff, 0xef, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b,
3255 0x00, 0xfc, 0x00, 0xef, 0x00, 0x07, 0x00, 0x7f,
3256 0x00, 0x0b, 0x00, 0xfc, 0x00),
3257 PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa),
3258 },
3259 { .freq = 5200,
3260 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04,
3261 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3262 0xff, 0xef, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3263 0x00, 0xfc, 0x00, 0xef, 0x00, 0x06, 0x00, 0x7f,
3264 0x00, 0x0a, 0x00, 0xfc, 0x00),
3265 PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9),
3266 },
3267 { .freq = 5210,
3268 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04,
3269 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3270 0xff, 0xdf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3271 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x06, 0x00, 0x7f,
3272 0x00, 0x0a, 0x00, 0xfc, 0x00),
3273 PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8),
3274 },
3275 { .freq = 5220,
3276 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04,
3277 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3278 0xff, 0xdf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3279 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x06, 0x00, 0x7f,
3280 0x00, 0x0a, 0x00, 0xfc, 0x00),
3281 PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7),
3282 },
3283 { .freq = 5230,
3284 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04,
3285 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3286 0xff, 0xdf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3287 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x06, 0x00, 0x7f,
3288 0x00, 0x0a, 0x00, 0xfc, 0x00),
3289 PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6),
3290 },
3291 { .freq = 5240,
3292 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04,
3293 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3294 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3295 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f,
3296 0x00, 0x0a, 0x00, 0xfc, 0x00),
3297 PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5),
3298 },
3299 { .freq = 5250,
3300 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04,
3301 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3302 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3303 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f,
3304 0x00, 0x0a, 0x00, 0xfc, 0x00),
3305 PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4),
3306 },
3307 { .freq = 5260,
3308 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04,
3309 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
3310 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3311 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f,
3312 0x00, 0x0a, 0x00, 0xfc, 0x00),
3313 PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3),
3314 },
3315 { .freq = 5270,
3316 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04,
3317 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
3318 0xff, 0xcf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3319 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x06, 0x00, 0x7f,
3320 0x00, 0x0a, 0x00, 0xfc, 0x00),
3321 PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2),
3322 },
3323 { .freq = 5280,
3324 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04,
3325 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
3326 0xff, 0xbf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3327 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x06, 0x00, 0x7f,
3328 0x00, 0x0a, 0x00, 0xfc, 0x00),
3329 PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1),
3330 },
3331 { .freq = 5290,
3332 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04,
3333 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
3334 0xff, 0xbf, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0a,
3335 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x06, 0x00, 0x7f,
3336 0x00, 0x0a, 0x00, 0xfc, 0x00),
3337 PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0),
3338 },
3339 { .freq = 5300,
3340 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04,
3341 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3342 0xff, 0xbf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3343 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x05, 0x00, 0x7f,
3344 0x00, 0x09, 0x00, 0xfc, 0x00),
3345 PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0),
3346 },
3347 { .freq = 5310,
3348 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04,
3349 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3350 0xff, 0xbf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3351 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x05, 0x00, 0x7f,
3352 0x00, 0x09, 0x00, 0xfa, 0x00),
3353 PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef),
3354 },
3355 { .freq = 5320,
3356 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04,
3357 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3358 0xff, 0xbf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3359 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x05, 0x00, 0x7f,
3360 0x00, 0x09, 0x00, 0xfa, 0x00),
3361 PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee),
3362 },
3363 { .freq = 5330,
3364 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04,
3365 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3366 0xff, 0xaf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3367 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x05, 0x00, 0x7f,
3368 0x00, 0x09, 0x00, 0xfa, 0x00),
3369 PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed),
3370 },
3371 { .freq = 5340,
3372 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04,
3373 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3374 0xff, 0xaf, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3375 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x05, 0x00, 0x7f,
3376 0x00, 0x09, 0x00, 0xfa, 0x00),
3377 PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec),
3378 },
3379 { .freq = 5350,
3380 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04,
3381 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3382 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3383 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f,
3384 0x00, 0x09, 0x00, 0xfa, 0x00),
3385 PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb),
3386 },
3387 { .freq = 5360,
3388 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04,
3389 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3390 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3391 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f,
3392 0x00, 0x09, 0x00, 0xfa, 0x00),
3393 PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea),
3394 },
3395 { .freq = 5370,
3396 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04,
3397 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3398 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3399 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f,
3400 0x00, 0x09, 0x00, 0xfa, 0x00),
3401 PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9),
3402 },
3403 { .freq = 5380,
3404 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04,
3405 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3406 0xff, 0x9f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3407 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x05, 0x00, 0x7f,
3408 0x00, 0x09, 0x00, 0xfa, 0x00),
3409 PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8),
3410 },
3411 { .freq = 5390,
3412 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04,
3413 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
3414 0xff, 0x8f, 0x00, 0x05, 0x00, 0x7f, 0x00, 0x09,
3415 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x05, 0x00, 0x7f,
3416 0x00, 0x09, 0x00, 0xfa, 0x00),
3417 PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7),
3418 },
3419 { .freq = 5400,
3420 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04,
3421 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
3422 0xc8, 0x8f, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3423 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x04, 0x00, 0x7f,
3424 0x00, 0x08, 0x00, 0xfa, 0x00),
3425 PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6),
3426 },
3427 { .freq = 5410,
3428 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04,
3429 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
3430 0xc8, 0x8f, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3431 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x04, 0x00, 0x7f,
3432 0x00, 0x08, 0x00, 0xfa, 0x00),
3433 PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5),
3434 },
3435 { .freq = 5420,
3436 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04,
3437 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
3438 0xc8, 0x8e, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3439 0x00, 0xfa, 0x00, 0x8e, 0x00, 0x04, 0x00, 0x7f,
3440 0x00, 0x08, 0x00, 0xfa, 0x00),
3441 PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5),
3442 },
3443 { .freq = 5430,
3444 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04,
3445 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
3446 0xc8, 0x8e, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3447 0x00, 0xfa, 0x00, 0x8e, 0x00, 0x04, 0x00, 0x7f,
3448 0x00, 0x08, 0x00, 0xfa, 0x00),
3449 PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4),
3450 },
3451 { .freq = 5440,
3452 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04,
3453 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
3454 0xc8, 0x7e, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3455 0x00, 0xfa, 0x00, 0x7e, 0x00, 0x04, 0x00, 0x7f,
3456 0x00, 0x08, 0x00, 0xfa, 0x00),
3457 PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3),
3458 },
3459 { .freq = 5450,
3460 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04,
3461 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
3462 0xc8, 0x7d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3463 0x00, 0xfa, 0x00, 0x7d, 0x00, 0x04, 0x00, 0x7f,
3464 0x00, 0x08, 0x00, 0xfa, 0x00),
3465 PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2),
3466 },
3467 { .freq = 5460,
3468 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04,
3469 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
3470 0xc8, 0x6d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3471 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x04, 0x00, 0x7f,
3472 0x00, 0x08, 0x00, 0xf8, 0x00),
3473 PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1),
3474 },
3475 { .freq = 5470,
3476 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04,
3477 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
3478 0xc8, 0x6d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3479 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x04, 0x00, 0x7f,
3480 0x00, 0x08, 0x00, 0xf8, 0x00),
3481 PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0),
3482 },
3483 { .freq = 5480,
3484 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04,
3485 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
3486 0xc8, 0x5d, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3487 0x00, 0xf8, 0x00, 0x5d, 0x00, 0x04, 0x00, 0x7f,
3488 0x00, 0x08, 0x00, 0xf8, 0x00),
3489 PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df),
3490 },
3491 { .freq = 5490,
3492 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04,
3493 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
3494 0xc8, 0x5c, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x08,
3495 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x04, 0x00, 0x7f,
3496 0x00, 0x08, 0x00, 0xf8, 0x00),
3497 PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de),
3498 },
3499 { .freq = 5500,
3500 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04,
3501 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3502 0x84, 0x5c, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3503 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x03, 0x00, 0x7f,
3504 0x00, 0x07, 0x00, 0xf8, 0x00),
3505 PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd),
3506 },
3507 { .freq = 5510,
3508 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04,
3509 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3510 0x84, 0x4c, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3511 0x00, 0xf8, 0x00, 0x4c, 0x00, 0x03, 0x00, 0x7f,
3512 0x00, 0x07, 0x00, 0xf8, 0x00),
3513 PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd),
3514 },
3515 { .freq = 5520,
3516 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04,
3517 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3518 0x84, 0x4c, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3519 0x00, 0xf8, 0x00, 0x4c, 0x00, 0x03, 0x00, 0x7f,
3520 0x00, 0x07, 0x00, 0xf8, 0x00),
3521 PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc),
3522 },
3523 { .freq = 5530,
3524 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04,
3525 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3526 0x84, 0x3b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3527 0x00, 0xf8, 0x00, 0x3b, 0x00, 0x03, 0x00, 0x7f,
3528 0x00, 0x07, 0x00, 0xf8, 0x00),
3529 PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db),
3530 },
3531 { .freq = 5540,
3532 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04,
3533 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3534 0x84, 0x3b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3535 0x00, 0xf8, 0x00, 0x3b, 0x00, 0x03, 0x00, 0x7f,
3536 0x00, 0x07, 0x00, 0xf8, 0x00),
3537 PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da),
3538 },
3539 { .freq = 5550,
3540 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04,
3541 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3542 0x84, 0x3b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3543 0x00, 0xf8, 0x00, 0x3b, 0x00, 0x03, 0x00, 0x7f,
3544 0x00, 0x07, 0x00, 0xf8, 0x00),
3545 PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9),
3546 },
3547 { .freq = 5560,
3548 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04,
3549 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3550 0x84, 0x2b, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3551 0x00, 0xf8, 0x00, 0x2b, 0x00, 0x03, 0x00, 0x7f,
3552 0x00, 0x07, 0x00, 0xf8, 0x00),
3553 PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8),
3554 },
3555 { .freq = 5570,
3556 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04,
3557 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3558 0x84, 0x2a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3559 0x00, 0xf8, 0x00, 0x2a, 0x00, 0x03, 0x00, 0x7f,
3560 0x00, 0x07, 0x00, 0xf8, 0x00),
3561 PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7),
3562 },
3563 { .freq = 5580,
3564 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04,
3565 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3566 0x84, 0x1a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3567 0x00, 0xf8, 0x00, 0x1a, 0x00, 0x03, 0x00, 0x7f,
3568 0x00, 0x07, 0x00, 0xf8, 0x00),
3569 PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7),
3570 },
3571 { .freq = 5590,
3572 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04,
3573 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
3574 0x84, 0x1a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3575 0x00, 0xf8, 0x00, 0x1a, 0x00, 0x03, 0x00, 0x7f,
3576 0x00, 0x07, 0x00, 0xf8, 0x00),
3577 PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6),
3578 },
3579 { .freq = 5600,
3580 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04,
3581 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3582 0x70, 0x1a, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3583 0x00, 0xf8, 0x00, 0x1a, 0x00, 0x03, 0x00, 0x7f,
3584 0x00, 0x07, 0x00, 0xf8, 0x00),
3585 PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5),
3586 },
3587 { .freq = 5610,
3588 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04,
3589 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3590 0x70, 0x19, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3591 0x00, 0xf8, 0x00, 0x19, 0x00, 0x03, 0x00, 0x7f,
3592 0x00, 0x07, 0x00, 0xf8, 0x00),
3593 PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4),
3594 },
3595 { .freq = 5620,
3596 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04,
3597 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3598 0x70, 0x19, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3599 0x00, 0xf8, 0x00, 0x19, 0x00, 0x03, 0x00, 0x7f,
3600 0x00, 0x07, 0x00, 0xf8, 0x00),
3601 PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3),
3602 },
3603 { .freq = 5630,
3604 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04,
3605 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3606 0x70, 0x09, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3607 0x00, 0xf8, 0x00, 0x09, 0x00, 0x03, 0x00, 0x7f,
3608 0x00, 0x07, 0x00, 0xf8, 0x00),
3609 PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2),
3610 },
3611 { .freq = 5640,
3612 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04,
3613 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3614 0x70, 0x09, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3615 0x00, 0xf8, 0x00, 0x09, 0x00, 0x03, 0x00, 0x7f,
3616 0x00, 0x07, 0x00, 0xf8, 0x00),
3617 PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2),
3618 },
3619 { .freq = 5650,
3620 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04,
3621 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3622 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3623 0x00, 0xf8, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f,
3624 0x00, 0x07, 0x00, 0xf8, 0x00),
3625 PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1),
3626 },
3627 { .freq = 5660,
3628 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04,
3629 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3630 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3631 0x00, 0xf6, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f,
3632 0x00, 0x07, 0x00, 0xf6, 0x00),
3633 PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0),
3634 },
3635 { .freq = 5670,
3636 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04,
3637 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3638 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3639 0x00, 0xf6, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f,
3640 0x00, 0x07, 0x00, 0xf6, 0x00),
3641 PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf),
3642 },
3643 { .freq = 5680,
3644 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04,
3645 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3646 0x70, 0x08, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3647 0x00, 0xf6, 0x00, 0x08, 0x00, 0x03, 0x00, 0x7f,
3648 0x00, 0x07, 0x00, 0xf6, 0x00),
3649 PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce),
3650 },
3651 { .freq = 5690,
3652 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04,
3653 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
3654 0x70, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x07,
3655 0x00, 0xf6, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f,
3656 0x00, 0x07, 0x00, 0xf6, 0x00),
3657 PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce),
3658 },
3659 { .freq = 5700,
3660 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04,
3661 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3662 0x40, 0x07, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3663 0x00, 0xf6, 0x00, 0x07, 0x00, 0x02, 0x00, 0x7f,
3664 0x00, 0x06, 0x00, 0xf6, 0x00),
3665 PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd),
3666 },
3667 { .freq = 5710,
3668 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04,
3669 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3670 0x40, 0x07, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3671 0x00, 0xf4, 0x00, 0x07, 0x00, 0x02, 0x00, 0x7f,
3672 0x00, 0x06, 0x00, 0xf4, 0x00),
3673 PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc),
3674 },
3675 { .freq = 5720,
3676 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04,
3677 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3678 0x40, 0x07, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3679 0x00, 0xf4, 0x00, 0x07, 0x00, 0x02, 0x00, 0x7f,
3680 0x00, 0x06, 0x00, 0xf4, 0x00),
3681 PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb),
3682 },
3683 { .freq = 5725,
3684 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04,
3685 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3686 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3687 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f,
3688 0x00, 0x06, 0x00, 0xf4, 0x00),
3689 PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb),
3690 },
3691 { .freq = 5730,
3692 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04,
3693 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3694 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3695 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f,
3696 0x00, 0x06, 0x00, 0xf4, 0x00),
3697 PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca),
3698 },
3699 { .freq = 5735,
3700 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04,
3701 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3702 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3703 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f,
3704 0x00, 0x06, 0x00, 0xf4, 0x00),
3705 PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca),
3706 },
3707 { .freq = 5740,
3708 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04,
3709 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3710 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3711 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f,
3712 0x00, 0x06, 0x00, 0xf4, 0x00),
3713 PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9),
3714 },
3715 { .freq = 5745,
3716 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04,
3717 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3718 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3719 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f,
3720 0x00, 0x06, 0x00, 0xf4, 0x00),
3721 PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9),
3722 },
3723 { .freq = 5750,
3724 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04,
3725 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3726 0x40, 0x06, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3727 0x00, 0xf4, 0x00, 0x06, 0x00, 0x02, 0x00, 0x7f,
3728 0x00, 0x06, 0x00, 0xf4, 0x00),
3729 PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9),
3730 },
3731 { .freq = 5755,
3732 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04,
3733 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3734 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3735 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f,
3736 0x00, 0x06, 0x00, 0xf4, 0x00),
3737 PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8),
3738 },
3739 { .freq = 5760,
3740 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04,
3741 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3742 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3743 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f,
3744 0x00, 0x06, 0x00, 0xf4, 0x00),
3745 PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8),
3746 },
3747 { .freq = 5765,
3748 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04,
3749 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3750 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3751 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f,
3752 0x00, 0x06, 0x00, 0xf4, 0x00),
3753 PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8),
3754 },
3755 { .freq = 5770,
3756 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04,
3757 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3758 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3759 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f,
3760 0x00, 0x06, 0x00, 0xf4, 0x00),
3761 PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7),
3762 },
3763 { .freq = 5775,
3764 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04,
3765 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3766 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3767 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f,
3768 0x00, 0x06, 0x00, 0xf4, 0x00),
3769 PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7),
3770 },
3771 { .freq = 5780,
3772 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04,
3773 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
3774 0x40, 0x05, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3775 0x00, 0xf4, 0x00, 0x05, 0x00, 0x02, 0x00, 0x7f,
3776 0x00, 0x06, 0x00, 0xf4, 0x00),
3777 PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6),
3778 },
3779 { .freq = 5785,
3780 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04,
3781 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
3782 0x40, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3783 0x00, 0xf4, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f,
3784 0x00, 0x06, 0x00, 0xf4, 0x00),
3785 PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6),
3786 },
3787 { .freq = 5790,
3788 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04,
3789 0x0c, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
3790 0x40, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3791 0x00, 0xf4, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f,
3792 0x00, 0x06, 0x00, 0xf4, 0x00),
3793 PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6),
3794 },
3795 { .freq = 5795,
3796 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04,
3797 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
3798 0x40, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x06,
3799 0x00, 0xf4, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f,
3800 0x00, 0x06, 0x00, 0xf4, 0x00),
3801 PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5),
3802 },
3803 { .freq = 5800,
3804 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04,
3805 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3806 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3807 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f,
3808 0x00, 0x06, 0x00, 0xf4, 0x00),
3809 PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5),
3810 },
3811 { .freq = 5805,
3812 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04,
3813 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3814 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3815 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f,
3816 0x00, 0x06, 0x00, 0xf4, 0x00),
3817 PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4),
3818 },
3819 { .freq = 5810,
3820 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04,
3821 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3822 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3823 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f,
3824 0x00, 0x06, 0x00, 0xf4, 0x00),
3825 PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4),
3826 },
3827 { .freq = 5815,
3828 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04,
3829 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3830 0x20, 0x04, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3831 0x00, 0xf4, 0x00, 0x04, 0x00, 0x00, 0x00, 0x7f,
3832 0x00, 0x06, 0x00, 0xf4, 0x00),
3833 PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4),
3834 },
3835 { .freq = 5820,
3836 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04,
3837 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3838 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3839 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f,
3840 0x00, 0x06, 0x00, 0xf4, 0x00),
3841 PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3),
3842 },
3843 { .freq = 5825,
3844 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04,
3845 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3846 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3847 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f,
3848 0x00, 0x06, 0x00, 0xf4, 0x00),
3849 PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3),
3850 },
3851 { .freq = 5830,
3852 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04,
3853 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3854 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3855 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f,
3856 0x00, 0x06, 0x00, 0xf4, 0x00),
3857 PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2),
3858 },
3859 { .freq = 5840,
3860 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04,
3861 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3862 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3863 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f,
3864 0x00, 0x06, 0x00, 0xf4, 0x00),
3865 PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2),
3866 },
3867 { .freq = 5850,
3868 RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04,
3869 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3870 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3871 0x00, 0xf4, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f,
3872 0x00, 0x06, 0x00, 0xf4, 0x00),
3873 PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1),
3874 },
3875 { .freq = 5860,
3876 RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04,
3877 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3878 0x20, 0x03, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3879 0x00, 0xf2, 0x00, 0x03, 0x00, 0x00, 0x00, 0x7f,
3880 0x00, 0x06, 0x00, 0xf2, 0x00),
3881 PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0),
3882 },
3883 { .freq = 5870,
3884 RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04,
3885 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3886 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3887 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f,
3888 0x00, 0x06, 0x00, 0xf2, 0x00),
3889 PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf),
3890 },
3891 { .freq = 5880,
3892 RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04,
3893 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3894 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3895 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f,
3896 0x00, 0x06, 0x00, 0xf2, 0x00),
3897 PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf),
3898 },
3899 { .freq = 5890,
3900 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04,
3901 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
3902 0x20, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x06,
3903 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f,
3904 0x00, 0x06, 0x00, 0xf2, 0x00),
3905 PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be),
3906 },
3907 { .freq = 5900,
3908 RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04,
3909 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00,
3910 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x05,
3911 0x00, 0xf2, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f,
3912 0x00, 0x05, 0x00, 0xf2, 0x00),
3913 PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd),
3914 },
3915 { .freq = 5910,
3916 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04,
3917 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00,
3918 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x05,
3919 0x00, 0xf2, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f,
3920 0x00, 0x05, 0x00, 0xf2, 0x00),
3921 PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc),
3922 },
3923 { .freq = 2412,
3924 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04,
3925 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00,
3926 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00,
3927 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00,
3928 0x70, 0x00, 0x0f, 0x00, 0x0f),
3929 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
3930 },
3931 { .freq = 2417,
3932 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04,
3933 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
3934 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00,
3935 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00,
3936 0x70, 0x00, 0x0f, 0x00, 0x0f),
3937 PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441),
3938 },
3939 { .freq = 2422,
3940 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04,
3941 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
3942 0x00, 0x00, 0xff, 0x00, 0x05, 0x00, 0x70, 0x00,
3943 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x05, 0x00,
3944 0x70, 0x00, 0x0f, 0x00, 0x0f),
3945 PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f),
3946 },
3947 { .freq = 2427,
3948 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04,
3949 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
3950 0x00, 0x00, 0xfd, 0x00, 0x05, 0x00, 0x70, 0x00,
3951 0x0f, 0x00, 0x0f, 0x00, 0xfd, 0x00, 0x05, 0x00,
3952 0x70, 0x00, 0x0f, 0x00, 0x0f),
3953 PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d),
3954 },
3955 { .freq = 2432,
3956 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04,
3957 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
3958 0x00, 0x00, 0xfb, 0x00, 0x05, 0x00, 0x70, 0x00,
3959 0x0f, 0x00, 0x0f, 0x00, 0xfb, 0x00, 0x05, 0x00,
3960 0x70, 0x00, 0x0f, 0x00, 0x0f),
3961 PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a),
3962 },
3963 { .freq = 2437,
3964 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04,
3965 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
3966 0x00, 0x00, 0xfa, 0x00, 0x05, 0x00, 0x70, 0x00,
3967 0x0f, 0x00, 0x0f, 0x00, 0xfa, 0x00, 0x05, 0x00,
3968 0x70, 0x00, 0x0f, 0x00, 0x0f),
3969 PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438),
3970 },
3971 { .freq = 2442,
3972 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04,
3973 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
3974 0x00, 0x00, 0xf8, 0x00, 0x05, 0x00, 0x70, 0x00,
3975 0x0f, 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x05, 0x00,
3976 0x70, 0x00, 0x0f, 0x00, 0x0f),
3977 PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436),
3978 },
3979 { .freq = 2447,
3980 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04,
3981 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
3982 0x00, 0x00, 0xf7, 0x00, 0x05, 0x00, 0x70, 0x00,
3983 0x0f, 0x00, 0x0f, 0x00, 0xf7, 0x00, 0x05, 0x00,
3984 0x70, 0x00, 0x0f, 0x00, 0x0f),
3985 PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434),
3986 },
3987 { .freq = 2452,
3988 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04,
3989 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
3990 0x00, 0x00, 0xf6, 0x00, 0x05, 0x00, 0x70, 0x00,
3991 0x0f, 0x00, 0x0f, 0x00, 0xf6, 0x00, 0x05, 0x00,
3992 0x70, 0x00, 0x0f, 0x00, 0x0f),
3993 PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431),
3994 },
3995 { .freq = 2457,
3996 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04,
3997 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
3998 0x00, 0x00, 0xf5, 0x00, 0x05, 0x00, 0x70, 0x00,
3999 0x0f, 0x00, 0x0d, 0x00, 0xf5, 0x00, 0x05, 0x00,
4000 0x70, 0x00, 0x0f, 0x00, 0x0d),
4001 PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f),
4002 },
4003 { .freq = 2462,
4004 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04,
4005 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
4006 0x00, 0x00, 0xf4, 0x00, 0x05, 0x00, 0x70, 0x00,
4007 0x0f, 0x00, 0x0d, 0x00, 0xf4, 0x00, 0x05, 0x00,
4008 0x70, 0x00, 0x0f, 0x00, 0x0d),
4009 PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d),
4010 },
4011 { .freq = 2467,
4012 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04,
4013 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
4014 0x00, 0x00, 0xf3, 0x00, 0x05, 0x00, 0x70, 0x00,
4015 0x0f, 0x00, 0x0d, 0x00, 0xf3, 0x00, 0x05, 0x00,
4016 0x70, 0x00, 0x0f, 0x00, 0x0d),
4017 PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b),
4018 },
4019 { .freq = 2472,
4020 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04,
4021 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
4022 0x00, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x70, 0x00,
4023 0x0f, 0x00, 0x0d, 0x00, 0xf2, 0x00, 0x05, 0x00,
4024 0x70, 0x00, 0x0f, 0x00, 0x0d),
4025 PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429),
4026 },
4027 { .freq = 2484,
4028 RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04,
4029 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
4030 0x00, 0x00, 0xf0, 0x00, 0x05, 0x00, 0x70, 0x00,
4031 0x0f, 0x00, 0x0d, 0x00, 0xf0, 0x00, 0x05, 0x00,
4032 0x70, 0x00, 0x0f, 0x00, 0x0d),
4033 PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424),
4034 },
4035};
4036
4037static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev4[] = {
4038 { .freq = 4920,
4039 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04,
4040 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
4041 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4042 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4043 0x00, 0x0f, 0x00, 0xff, 0x00),
4044 PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216),
4045 },
4046 { .freq = 4930,
4047 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04,
4048 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
4049 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4050 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4051 0x00, 0x0f, 0x00, 0xff, 0x00),
4052 PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215),
4053 },
4054 { .freq = 4940,
4055 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04,
4056 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
4057 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4058 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4059 0x00, 0x0f, 0x00, 0xff, 0x00),
4060 PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214),
4061 },
4062 { .freq = 4950,
4063 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04,
4064 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
4065 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4066 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4067 0x00, 0x0f, 0x00, 0xff, 0x00),
4068 PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213),
4069 },
4070 { .freq = 4960,
4071 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04,
4072 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4073 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4074 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4075 0x00, 0x0f, 0x00, 0xff, 0x00),
4076 PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212),
4077 },
4078 { .freq = 4970,
4079 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04,
4080 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4081 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4082 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4083 0x00, 0x0f, 0x00, 0xff, 0x00),
4084 PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211),
4085 },
4086 { .freq = 4980,
4087 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04,
4088 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4089 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4090 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4091 0x00, 0x0f, 0x00, 0xff, 0x00),
4092 PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f),
4093 },
4094 { .freq = 4990,
4095 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04,
4096 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4097 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f,
4098 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f,
4099 0x00, 0x0f, 0x00, 0xff, 0x00),
4100 PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e),
4101 },
4102 { .freq = 5000,
4103 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04,
4104 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4105 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4106 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4107 0x00, 0x0f, 0x00, 0xff, 0x00),
4108 PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d),
4109 },
4110 { .freq = 5010,
4111 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04,
4112 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4113 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4114 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4115 0x00, 0x0f, 0x00, 0xff, 0x00),
4116 PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c),
4117 },
4118 { .freq = 5020,
4119 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04,
4120 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4121 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4122 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4123 0x00, 0x0f, 0x00, 0xff, 0x00),
4124 PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b),
4125 },
4126 { .freq = 5030,
4127 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04,
4128 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4129 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4130 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4131 0x00, 0x0f, 0x00, 0xff, 0x00),
4132 PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a),
4133 },
4134 { .freq = 5040,
4135 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04,
4136 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4137 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4138 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4139 0x00, 0x0f, 0x00, 0xff, 0x00),
4140 PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209),
4141 },
4142 { .freq = 5050,
4143 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04,
4144 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4145 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4146 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4147 0x00, 0x0f, 0x00, 0xff, 0x00),
4148 PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208),
4149 },
4150 { .freq = 5060,
4151 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04,
4152 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4153 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4154 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4155 0x00, 0x0f, 0x00, 0xff, 0x00),
4156 PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207),
4157 },
4158 { .freq = 5070,
4159 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04,
4160 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4161 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4162 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4163 0x00, 0x0f, 0x00, 0xff, 0x00),
4164 PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206),
4165 },
4166 { .freq = 5080,
4167 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04,
4168 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4169 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4170 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4171 0x00, 0x0f, 0x00, 0xff, 0x00),
4172 PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205),
4173 },
4174 { .freq = 5090,
4175 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04,
4176 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
4177 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f,
4178 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f,
4179 0x00, 0x0f, 0x00, 0xff, 0x00),
4180 PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204),
4181 },
4182 { .freq = 5100,
4183 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04,
4184 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4185 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4186 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f,
4187 0x00, 0x0f, 0x00, 0xfe, 0x00),
4188 PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203),
4189 },
4190 { .freq = 5110,
4191 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04,
4192 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4193 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4194 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f,
4195 0x00, 0x0f, 0x00, 0xfe, 0x00),
4196 PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202),
4197 },
4198 { .freq = 5120,
4199 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04,
4200 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4201 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4202 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f,
4203 0x00, 0x0f, 0x00, 0xfe, 0x00),
4204 PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201),
4205 },
4206 { .freq = 5130,
4207 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04,
4208 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4209 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4210 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f,
4211 0x00, 0x0f, 0x00, 0xfe, 0x00),
4212 PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200),
4213 },
4214 { .freq = 5140,
4215 RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04,
4216 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4217 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4218 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f,
4219 0x00, 0x0f, 0x00, 0xfe, 0x00),
4220 PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff),
4221 },
4222 { .freq = 5160,
4223 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04,
4224 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4225 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4226 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f,
4227 0x00, 0x0f, 0x00, 0xfe, 0x00),
4228 PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd),
4229 },
4230 { .freq = 5170,
4231 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04,
4232 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4233 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4234 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f,
4235 0x00, 0x0f, 0x00, 0xfe, 0x00),
4236 PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc),
4237 },
4238 { .freq = 5180,
4239 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04,
4240 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4241 0xff, 0xef, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4242 0x00, 0xfe, 0x00, 0xef, 0x00, 0x0c, 0x00, 0x7f,
4243 0x00, 0x0f, 0x00, 0xfe, 0x00),
4244 PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb),
4245 },
4246 { .freq = 5190,
4247 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04,
4248 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4249 0xff, 0xef, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f,
4250 0x00, 0xfe, 0x00, 0xef, 0x00, 0x0c, 0x00, 0x7f,
4251 0x00, 0x0f, 0x00, 0xfe, 0x00),
4252 PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa),
4253 },
4254 { .freq = 5200,
4255 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04,
4256 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4257 0xff, 0xef, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4258 0x00, 0xfc, 0x00, 0xef, 0x00, 0x0a, 0x00, 0x7f,
4259 0x00, 0x0f, 0x00, 0xfc, 0x00),
4260 PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9),
4261 },
4262 { .freq = 5210,
4263 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04,
4264 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4265 0xff, 0xdf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4266 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x0a, 0x00, 0x7f,
4267 0x00, 0x0f, 0x00, 0xfc, 0x00),
4268 PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8),
4269 },
4270 { .freq = 5220,
4271 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04,
4272 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4273 0xff, 0xdf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4274 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x0a, 0x00, 0x7f,
4275 0x00, 0x0f, 0x00, 0xfc, 0x00),
4276 PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7),
4277 },
4278 { .freq = 5230,
4279 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04,
4280 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4281 0xff, 0xdf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4282 0x00, 0xfc, 0x00, 0xdf, 0x00, 0x0a, 0x00, 0x7f,
4283 0x00, 0x0f, 0x00, 0xfc, 0x00),
4284 PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6),
4285 },
4286 { .freq = 5240,
4287 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04,
4288 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4289 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4290 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f,
4291 0x00, 0x0f, 0x00, 0xfc, 0x00),
4292 PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5),
4293 },
4294 { .freq = 5250,
4295 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04,
4296 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4297 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4298 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f,
4299 0x00, 0x0f, 0x00, 0xfc, 0x00),
4300 PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4),
4301 },
4302 { .freq = 5260,
4303 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04,
4304 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
4305 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4306 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f,
4307 0x00, 0x0f, 0x00, 0xfc, 0x00),
4308 PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3),
4309 },
4310 { .freq = 5270,
4311 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04,
4312 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
4313 0xff, 0xcf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4314 0x00, 0xfc, 0x00, 0xcf, 0x00, 0x0a, 0x00, 0x7f,
4315 0x00, 0x0f, 0x00, 0xfc, 0x00),
4316 PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2),
4317 },
4318 { .freq = 5280,
4319 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04,
4320 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
4321 0xff, 0xbf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4322 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x0a, 0x00, 0x7f,
4323 0x00, 0x0f, 0x00, 0xfc, 0x00),
4324 PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1),
4325 },
4326 { .freq = 5290,
4327 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04,
4328 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
4329 0xff, 0xbf, 0x00, 0x0a, 0x00, 0x7f, 0x00, 0x0f,
4330 0x00, 0xfc, 0x00, 0xbf, 0x00, 0x0a, 0x00, 0x7f,
4331 0x00, 0x0f, 0x00, 0xfc, 0x00),
4332 PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0),
4333 },
4334 { .freq = 5300,
4335 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04,
4336 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4337 0xff, 0xbf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4338 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x08, 0x00, 0x7f,
4339 0x00, 0x0f, 0x00, 0xfa, 0x00),
4340 PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0),
4341 },
4342 { .freq = 5310,
4343 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04,
4344 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4345 0xff, 0xbf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4346 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x08, 0x00, 0x7f,
4347 0x00, 0x0f, 0x00, 0xfa, 0x00),
4348 PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef),
4349 },
4350 { .freq = 5320,
4351 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04,
4352 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4353 0xff, 0xbf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4354 0x00, 0xfa, 0x00, 0xbf, 0x00, 0x08, 0x00, 0x7f,
4355 0x00, 0x0f, 0x00, 0xfa, 0x00),
4356 PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee),
4357 },
4358 { .freq = 5330,
4359 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04,
4360 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4361 0xff, 0xaf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4362 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x08, 0x00, 0x7f,
4363 0x00, 0x0f, 0x00, 0xfa, 0x00),
4364 PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed),
4365 },
4366 { .freq = 5340,
4367 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04,
4368 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4369 0xff, 0xaf, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4370 0x00, 0xfa, 0x00, 0xaf, 0x00, 0x08, 0x00, 0x7f,
4371 0x00, 0x0f, 0x00, 0xfa, 0x00),
4372 PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec),
4373 },
4374 { .freq = 5350,
4375 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04,
4376 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4377 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4378 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f,
4379 0x00, 0x0f, 0x00, 0xfa, 0x00),
4380 PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb),
4381 },
4382 { .freq = 5360,
4383 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04,
4384 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4385 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4386 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f,
4387 0x00, 0x0f, 0x00, 0xfa, 0x00),
4388 PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea),
4389 },
4390 { .freq = 5370,
4391 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04,
4392 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4393 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4394 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f,
4395 0x00, 0x0f, 0x00, 0xfa, 0x00),
4396 PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9),
4397 },
4398 { .freq = 5380,
4399 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04,
4400 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4401 0xff, 0x9f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4402 0x00, 0xfa, 0x00, 0x9f, 0x00, 0x08, 0x00, 0x7f,
4403 0x00, 0x0f, 0x00, 0xfa, 0x00),
4404 PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8),
4405 },
4406 { .freq = 5390,
4407 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04,
4408 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
4409 0xff, 0x8f, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0f,
4410 0x00, 0xfa, 0x00, 0x8f, 0x00, 0x08, 0x00, 0x7f,
4411 0x00, 0x0f, 0x00, 0xfa, 0x00),
4412 PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7),
4413 },
4414 { .freq = 5400,
4415 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04,
4416 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
4417 0xc8, 0x8f, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4418 0x00, 0xf8, 0x00, 0x8f, 0x00, 0x07, 0x00, 0x7f,
4419 0x00, 0x0f, 0x00, 0xf8, 0x00),
4420 PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6),
4421 },
4422 { .freq = 5410,
4423 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04,
4424 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
4425 0xc8, 0x8f, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4426 0x00, 0xf8, 0x00, 0x8f, 0x00, 0x07, 0x00, 0x7f,
4427 0x00, 0x0f, 0x00, 0xf8, 0x00),
4428 PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5),
4429 },
4430 { .freq = 5420,
4431 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04,
4432 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
4433 0xc8, 0x8e, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4434 0x00, 0xf8, 0x00, 0x8e, 0x00, 0x07, 0x00, 0x7f,
4435 0x00, 0x0f, 0x00, 0xf8, 0x00),
4436 PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5),
4437 },
4438 { .freq = 5430,
4439 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04,
4440 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
4441 0xc8, 0x8e, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4442 0x00, 0xf8, 0x00, 0x8e, 0x00, 0x07, 0x00, 0x7f,
4443 0x00, 0x0f, 0x00, 0xf8, 0x00),
4444 PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4),
4445 },
4446 { .freq = 5440,
4447 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04,
4448 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
4449 0xc8, 0x7e, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4450 0x00, 0xf8, 0x00, 0x7e, 0x00, 0x07, 0x00, 0x7f,
4451 0x00, 0x0f, 0x00, 0xf8, 0x00),
4452 PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3),
4453 },
4454 { .freq = 5450,
4455 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04,
4456 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
4457 0xc8, 0x7d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4458 0x00, 0xf8, 0x00, 0x7d, 0x00, 0x07, 0x00, 0x7f,
4459 0x00, 0x0f, 0x00, 0xf8, 0x00),
4460 PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2),
4461 },
4462 { .freq = 5460,
4463 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04,
4464 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
4465 0xc8, 0x6d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4466 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x07, 0x00, 0x7f,
4467 0x00, 0x0f, 0x00, 0xf8, 0x00),
4468 PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1),
4469 },
4470 { .freq = 5470,
4471 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04,
4472 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
4473 0xc8, 0x6d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4474 0x00, 0xf8, 0x00, 0x6d, 0x00, 0x07, 0x00, 0x7f,
4475 0x00, 0x0f, 0x00, 0xf8, 0x00),
4476 PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0),
4477 },
4478 { .freq = 5480,
4479 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04,
4480 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
4481 0xc8, 0x5d, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4482 0x00, 0xf8, 0x00, 0x5d, 0x00, 0x07, 0x00, 0x7f,
4483 0x00, 0x0f, 0x00, 0xf8, 0x00),
4484 PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df),
4485 },
4486 { .freq = 5490,
4487 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04,
4488 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
4489 0xc8, 0x5c, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f,
4490 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x07, 0x00, 0x7f,
4491 0x00, 0x0f, 0x00, 0xf8, 0x00),
4492 PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de),
4493 },
4494 { .freq = 5500,
4495 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04,
4496 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4497 0x84, 0x5c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4498 0x00, 0xf6, 0x00, 0x5c, 0x00, 0x06, 0x00, 0x7f,
4499 0x00, 0x0d, 0x00, 0xf6, 0x00),
4500 PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd),
4501 },
4502 { .freq = 5510,
4503 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04,
4504 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4505 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4506 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f,
4507 0x00, 0x0d, 0x00, 0xf6, 0x00),
4508 PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd),
4509 },
4510 { .freq = 5520,
4511 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04,
4512 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4513 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4514 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f,
4515 0x00, 0x0d, 0x00, 0xf6, 0x00),
4516 PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc),
4517 },
4518 { .freq = 5530,
4519 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04,
4520 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4521 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4522 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f,
4523 0x00, 0x0d, 0x00, 0xf6, 0x00),
4524 PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db),
4525 },
4526 { .freq = 5540,
4527 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04,
4528 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4529 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4530 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f,
4531 0x00, 0x0d, 0x00, 0xf6, 0x00),
4532 PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da),
4533 },
4534 { .freq = 5550,
4535 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04,
4536 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4537 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4538 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f,
4539 0x00, 0x0d, 0x00, 0xf6, 0x00),
4540 PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9),
4541 },
4542 { .freq = 5560,
4543 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04,
4544 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4545 0x84, 0x2b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4546 0x00, 0xf6, 0x00, 0x2b, 0x00, 0x06, 0x00, 0x7f,
4547 0x00, 0x0d, 0x00, 0xf6, 0x00),
4548 PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8),
4549 },
4550 { .freq = 5570,
4551 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04,
4552 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4553 0x84, 0x2a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4554 0x00, 0xf6, 0x00, 0x2a, 0x00, 0x06, 0x00, 0x7f,
4555 0x00, 0x0d, 0x00, 0xf6, 0x00),
4556 PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7),
4557 },
4558 { .freq = 5580,
4559 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04,
4560 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4561 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4562 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f,
4563 0x00, 0x0d, 0x00, 0xf6, 0x00),
4564 PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7),
4565 },
4566 { .freq = 5590,
4567 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04,
4568 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
4569 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d,
4570 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f,
4571 0x00, 0x0d, 0x00, 0xf6, 0x00),
4572 PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6),
4573 },
4574 { .freq = 5600,
4575 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04,
4576 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4577 0x70, 0x1a, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4578 0x00, 0xf4, 0x00, 0x1a, 0x00, 0x04, 0x00, 0x7f,
4579 0x00, 0x0b, 0x00, 0xf4, 0x00),
4580 PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5),
4581 },
4582 { .freq = 5610,
4583 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04,
4584 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4585 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4586 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f,
4587 0x00, 0x0b, 0x00, 0xf4, 0x00),
4588 PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4),
4589 },
4590 { .freq = 5620,
4591 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04,
4592 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4593 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4594 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f,
4595 0x00, 0x0b, 0x00, 0xf4, 0x00),
4596 PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3),
4597 },
4598 { .freq = 5630,
4599 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04,
4600 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4601 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4602 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f,
4603 0x00, 0x0b, 0x00, 0xf4, 0x00),
4604 PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2),
4605 },
4606 { .freq = 5640,
4607 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04,
4608 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4609 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4610 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f,
4611 0x00, 0x0b, 0x00, 0xf4, 0x00),
4612 PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2),
4613 },
4614 { .freq = 5650,
4615 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04,
4616 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4617 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4618 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f,
4619 0x00, 0x0b, 0x00, 0xf4, 0x00),
4620 PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1),
4621 },
4622 { .freq = 5660,
4623 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04,
4624 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4625 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4626 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f,
4627 0x00, 0x0b, 0x00, 0xf4, 0x00),
4628 PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0),
4629 },
4630 { .freq = 5670,
4631 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04,
4632 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4633 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4634 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f,
4635 0x00, 0x0b, 0x00, 0xf4, 0x00),
4636 PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf),
4637 },
4638 { .freq = 5680,
4639 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04,
4640 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4641 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4642 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f,
4643 0x00, 0x0b, 0x00, 0xf4, 0x00),
4644 PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce),
4645 },
4646 { .freq = 5690,
4647 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04,
4648 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
4649 0x70, 0x07, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b,
4650 0x00, 0xf4, 0x00, 0x07, 0x00, 0x04, 0x00, 0x7f,
4651 0x00, 0x0b, 0x00, 0xf4, 0x00),
4652 PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce),
4653 },
4654 { .freq = 5700,
4655 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04,
4656 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4657 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4658 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f,
4659 0x00, 0x0a, 0x00, 0xf2, 0x00),
4660 PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd),
4661 },
4662 { .freq = 5710,
4663 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04,
4664 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4665 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4666 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f,
4667 0x00, 0x0a, 0x00, 0xf2, 0x00),
4668 PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc),
4669 },
4670 { .freq = 5720,
4671 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04,
4672 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4673 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4674 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f,
4675 0x00, 0x0a, 0x00, 0xf2, 0x00),
4676 PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb),
4677 },
4678 { .freq = 5725,
4679 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04,
4680 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4681 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4682 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f,
4683 0x00, 0x0a, 0x00, 0xf2, 0x00),
4684 PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb),
4685 },
4686 { .freq = 5730,
4687 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04,
4688 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4689 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4690 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f,
4691 0x00, 0x0a, 0x00, 0xf2, 0x00),
4692 PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca),
4693 },
4694 { .freq = 5735,
4695 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04,
4696 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4697 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4698 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f,
4699 0x00, 0x0a, 0x00, 0xf2, 0x00),
4700 PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca),
4701 },
4702 { .freq = 5740,
4703 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04,
4704 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4705 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4706 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f,
4707 0x00, 0x0a, 0x00, 0xf2, 0x00),
4708 PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9),
4709 },
4710 { .freq = 5745,
4711 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04,
4712 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4713 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4714 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f,
4715 0x00, 0x0a, 0x00, 0xf2, 0x00),
4716 PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9),
4717 },
4718 { .freq = 5750,
4719 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04,
4720 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4721 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4722 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f,
4723 0x00, 0x0a, 0x00, 0xf2, 0x00),
4724 PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9),
4725 },
4726 { .freq = 5755,
4727 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04,
4728 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4729 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4730 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f,
4731 0x00, 0x0a, 0x00, 0xf2, 0x00),
4732 PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8),
4733 },
4734 { .freq = 5760,
4735 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04,
4736 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4737 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4738 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f,
4739 0x00, 0x0a, 0x00, 0xf2, 0x00),
4740 PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8),
4741 },
4742 { .freq = 5765,
4743 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04,
4744 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4745 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4746 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f,
4747 0x00, 0x0a, 0x00, 0xf2, 0x00),
4748 PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8),
4749 },
4750 { .freq = 5770,
4751 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04,
4752 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4753 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4754 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f,
4755 0x00, 0x0a, 0x00, 0xf2, 0x00),
4756 PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7),
4757 },
4758 { .freq = 5775,
4759 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04,
4760 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4761 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4762 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f,
4763 0x00, 0x0a, 0x00, 0xf2, 0x00),
4764 PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7),
4765 },
4766 { .freq = 5780,
4767 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04,
4768 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
4769 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4770 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f,
4771 0x00, 0x0a, 0x00, 0xf2, 0x00),
4772 PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6),
4773 },
4774 { .freq = 5785,
4775 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04,
4776 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
4777 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4778 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f,
4779 0x00, 0x0a, 0x00, 0xf2, 0x00),
4780 PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6),
4781 },
4782 { .freq = 5790,
4783 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04,
4784 0x0c, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
4785 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4786 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f,
4787 0x00, 0x0a, 0x00, 0xf2, 0x00),
4788 PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6),
4789 },
4790 { .freq = 5795,
4791 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04,
4792 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
4793 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a,
4794 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f,
4795 0x00, 0x0a, 0x00, 0xf2, 0x00),
4796 PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5),
4797 },
4798 { .freq = 5800,
4799 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04,
4800 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4801 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4802 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f,
4803 0x00, 0x09, 0x00, 0xf0, 0x00),
4804 PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5),
4805 },
4806 { .freq = 5805,
4807 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04,
4808 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4809 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4810 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f,
4811 0x00, 0x09, 0x00, 0xf0, 0x00),
4812 PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4),
4813 },
4814 { .freq = 5810,
4815 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04,
4816 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4817 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4818 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f,
4819 0x00, 0x09, 0x00, 0xf0, 0x00),
4820 PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4),
4821 },
4822 { .freq = 5815,
4823 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04,
4824 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4825 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4826 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f,
4827 0x00, 0x09, 0x00, 0xf0, 0x00),
4828 PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4),
4829 },
4830 { .freq = 5820,
4831 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04,
4832 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4833 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4834 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f,
4835 0x00, 0x09, 0x00, 0xf0, 0x00),
4836 PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3),
4837 },
4838 { .freq = 5825,
4839 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04,
4840 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4841 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4842 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f,
4843 0x00, 0x09, 0x00, 0xf0, 0x00),
4844 PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3),
4845 },
4846 { .freq = 5830,
4847 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04,
4848 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4849 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4850 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f,
4851 0x00, 0x09, 0x00, 0xf0, 0x00),
4852 PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2),
4853 },
4854 { .freq = 5840,
4855 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04,
4856 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4857 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4858 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f,
4859 0x00, 0x09, 0x00, 0xf0, 0x00),
4860 PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2),
4861 },
4862 { .freq = 5850,
4863 RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04,
4864 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4865 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4866 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f,
4867 0x00, 0x09, 0x00, 0xf0, 0x00),
4868 PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1),
4869 },
4870 { .freq = 5860,
4871 RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04,
4872 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4873 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4874 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f,
4875 0x00, 0x09, 0x00, 0xf0, 0x00),
4876 PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0),
4877 },
4878 { .freq = 5870,
4879 RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04,
4880 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4881 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4882 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f,
4883 0x00, 0x09, 0x00, 0xf0, 0x00),
4884 PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf),
4885 },
4886 { .freq = 5880,
4887 RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04,
4888 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4889 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4890 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f,
4891 0x00, 0x09, 0x00, 0xf0, 0x00),
4892 PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf),
4893 },
4894 { .freq = 5890,
4895 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04,
4896 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
4897 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09,
4898 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f,
4899 0x00, 0x09, 0x00, 0xf0, 0x00),
4900 PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be),
4901 },
4902 { .freq = 5900,
4903 RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04,
4904 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00,
4905 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07,
4906 0x00, 0xf0, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f,
4907 0x00, 0x07, 0x00, 0xf0, 0x00),
4908 PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd),
4909 },
4910 { .freq = 5910,
4911 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04,
4912 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00,
4913 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07,
4914 0x00, 0xf0, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f,
4915 0x00, 0x07, 0x00, 0xf0, 0x00),
4916 PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc),
4917 },
4918 { .freq = 2412,
4919 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04,
4920 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00,
4921 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00,
4922 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00,
4923 0x70, 0x00, 0x0f, 0x00, 0x0e),
4924 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
4925 },
4926 { .freq = 2417,
4927 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04,
4928 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
4929 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00,
4930 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00,
4931 0x70, 0x00, 0x0f, 0x00, 0x0e),
4932 PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441),
4933 },
4934 { .freq = 2422,
4935 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04,
4936 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
4937 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00,
4938 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00,
4939 0x70, 0x00, 0x0f, 0x00, 0x0e),
4940 PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f),
4941 },
4942 { .freq = 2427,
4943 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04,
4944 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
4945 0x00, 0x00, 0xfd, 0x00, 0x04, 0x00, 0x70, 0x00,
4946 0x0f, 0x00, 0x0e, 0x00, 0xfd, 0x00, 0x04, 0x00,
4947 0x70, 0x00, 0x0f, 0x00, 0x0e),
4948 PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d),
4949 },
4950 { .freq = 2432,
4951 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04,
4952 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
4953 0x00, 0x00, 0xfb, 0x00, 0x04, 0x00, 0x70, 0x00,
4954 0x0f, 0x00, 0x0e, 0x00, 0xfb, 0x00, 0x04, 0x00,
4955 0x70, 0x00, 0x0f, 0x00, 0x0e),
4956 PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a),
4957 },
4958 { .freq = 2437,
4959 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04,
4960 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
4961 0x00, 0x00, 0xfa, 0x00, 0x04, 0x00, 0x70, 0x00,
4962 0x0f, 0x00, 0x0e, 0x00, 0xfa, 0x00, 0x04, 0x00,
4963 0x70, 0x00, 0x0f, 0x00, 0x0e),
4964 PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438),
4965 },
4966 { .freq = 2442,
4967 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04,
4968 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
4969 0x00, 0x00, 0xf8, 0x00, 0x04, 0x00, 0x70, 0x00,
4970 0x0f, 0x00, 0x0e, 0x00, 0xf8, 0x00, 0x04, 0x00,
4971 0x70, 0x00, 0x0f, 0x00, 0x0e),
4972 PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436),
4973 },
4974 { .freq = 2447,
4975 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04,
4976 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
4977 0x00, 0x00, 0xf7, 0x00, 0x04, 0x00, 0x70, 0x00,
4978 0x0f, 0x00, 0x0e, 0x00, 0xf7, 0x00, 0x04, 0x00,
4979 0x70, 0x00, 0x0f, 0x00, 0x0e),
4980 PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434),
4981 },
4982 { .freq = 2452,
4983 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04,
4984 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
4985 0x00, 0x00, 0xf6, 0x00, 0x04, 0x00, 0x70, 0x00,
4986 0x0f, 0x00, 0x0e, 0x00, 0xf6, 0x00, 0x04, 0x00,
4987 0x70, 0x00, 0x0f, 0x00, 0x0e),
4988 PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431),
4989 },
4990 { .freq = 2457,
4991 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04,
4992 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
4993 0x00, 0x00, 0xf5, 0x00, 0x04, 0x00, 0x70, 0x00,
4994 0x0f, 0x00, 0x0e, 0x00, 0xf5, 0x00, 0x04, 0x00,
4995 0x70, 0x00, 0x0f, 0x00, 0x0e),
4996 PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f),
4997 },
4998 { .freq = 2462,
4999 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04,
5000 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
5001 0x00, 0x00, 0xf4, 0x00, 0x04, 0x00, 0x70, 0x00,
5002 0x0f, 0x00, 0x0e, 0x00, 0xf4, 0x00, 0x04, 0x00,
5003 0x70, 0x00, 0x0f, 0x00, 0x0e),
5004 PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d),
5005 },
5006 { .freq = 2467,
5007 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04,
5008 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
5009 0x00, 0x00, 0xf3, 0x00, 0x04, 0x00, 0x70, 0x00,
5010 0x0f, 0x00, 0x0e, 0x00, 0xf3, 0x00, 0x04, 0x00,
5011 0x70, 0x00, 0x0f, 0x00, 0x0e),
5012 PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b),
5013 },
5014 { .freq = 2472,
5015 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04,
5016 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
5017 0x00, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x70, 0x00,
5018 0x0f, 0x00, 0x0e, 0x00, 0xf2, 0x00, 0x04, 0x00,
5019 0x70, 0x00, 0x0f, 0x00, 0x0e),
5020 PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429),
5021 },
5022 { .freq = 2484,
5023 RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04,
5024 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
5025 0x00, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x70, 0x00,
5026 0x0f, 0x00, 0x0e, 0x00, 0xf0, 0x00, 0x04, 0x00,
5027 0x70, 0x00, 0x0f, 0x00, 0x0e),
5028 PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424),
5029 },
5030};
5031
5032static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev5[] = {
5033 { .freq = 4920,
5034 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04,
5035 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
5036 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f,
5037 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
5038 0x00, 0x0f, 0x00, 0x6f, 0x00),
5039 PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216),
5040 },
5041 { .freq = 4930,
5042 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04,
5043 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
5044 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e,
5045 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
5046 0x00, 0x0e, 0x00, 0x6f, 0x00),
5047 PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215),
5048 },
5049 { .freq = 4940,
5050 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04,
5051 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
5052 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e,
5053 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
5054 0x00, 0x0e, 0x00, 0x6f, 0x00),
5055 PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214),
5056 },
5057 { .freq = 4950,
5058 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04,
5059 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
5060 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e,
5061 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
5062 0x00, 0x0e, 0x00, 0x6f, 0x00),
5063 PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213),
5064 },
5065 { .freq = 4960,
5066 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04,
5067 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5068 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e,
5069 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
5070 0x00, 0x0e, 0x00, 0x6f, 0x00),
5071 PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212),
5072 },
5073 { .freq = 4970,
5074 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04,
5075 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5076 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
5077 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
5078 0x00, 0x0d, 0x00, 0x6f, 0x00),
5079 PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211),
5080 },
5081 { .freq = 4980,
5082 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04,
5083 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5084 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
5085 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
5086 0x00, 0x0d, 0x00, 0x6f, 0x00),
5087 PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f),
5088 },
5089 { .freq = 4990,
5090 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04,
5091 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5092 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
5093 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
5094 0x00, 0x0d, 0x00, 0x6f, 0x00),
5095 PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e),
5096 },
5097 { .freq = 5000,
5098 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04,
5099 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5100 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
5101 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
5102 0x00, 0x0d, 0x00, 0x6f, 0x00),
5103 PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d),
5104 },
5105 { .freq = 5010,
5106 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04,
5107 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5108 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
5109 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
5110 0x00, 0x0d, 0x00, 0x6f, 0x00),
5111 PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c),
5112 },
5113 { .freq = 5020,
5114 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04,
5115 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5116 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d,
5117 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70,
5118 0x00, 0x0d, 0x00, 0x6f, 0x00),
5119 PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b),
5120 },
5121 { .freq = 5030,
5122 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04,
5123 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5124 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
5125 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70,
5126 0x00, 0x0c, 0x00, 0x6f, 0x00),
5127 PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a),
5128 },
5129 { .freq = 5040,
5130 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04,
5131 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5132 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
5133 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70,
5134 0x00, 0x0c, 0x00, 0x6f, 0x00),
5135 PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209),
5136 },
5137 { .freq = 5050,
5138 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04,
5139 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5140 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
5141 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70,
5142 0x00, 0x0c, 0x00, 0x6f, 0x00),
5143 PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208),
5144 },
5145 { .freq = 5060,
5146 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04,
5147 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5148 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
5149 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70,
5150 0x00, 0x0c, 0x00, 0x6f, 0x00),
5151 PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207),
5152 },
5153 { .freq = 5070,
5154 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04,
5155 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5156 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
5157 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70,
5158 0x00, 0x0b, 0x00, 0x6f, 0x00),
5159 PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206),
5160 },
5161 { .freq = 5080,
5162 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04,
5163 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5164 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
5165 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
5166 0x00, 0x0b, 0x00, 0x6f, 0x00),
5167 PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205),
5168 },
5169 { .freq = 5090,
5170 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04,
5171 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
5172 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
5173 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
5174 0x00, 0x0b, 0x00, 0x6f, 0x00),
5175 PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204),
5176 },
5177 { .freq = 5100,
5178 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04,
5179 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5180 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
5181 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
5182 0x00, 0x0b, 0x00, 0x6f, 0x00),
5183 PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203),
5184 },
5185 { .freq = 5110,
5186 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04,
5187 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5188 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
5189 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
5190 0x00, 0x0b, 0x00, 0x6f, 0x00),
5191 PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202),
5192 },
5193 { .freq = 5120,
5194 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04,
5195 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5196 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
5197 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
5198 0x00, 0x0b, 0x00, 0x6f, 0x00),
5199 PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201),
5200 },
5201 { .freq = 5130,
5202 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04,
5203 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5204 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a,
5205 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70,
5206 0x00, 0x0a, 0x00, 0x6f, 0x00),
5207 PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200),
5208 },
5209 { .freq = 5140,
5210 RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04,
5211 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5212 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a,
5213 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70,
5214 0x00, 0x0a, 0x00, 0x6f, 0x00),
5215 PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff),
5216 },
5217 { .freq = 5160,
5218 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04,
5219 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5220 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09,
5221 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70,
5222 0x00, 0x09, 0x00, 0x6e, 0x00),
5223 PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd),
5224 },
5225 { .freq = 5170,
5226 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04,
5227 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5228 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
5229 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70,
5230 0x00, 0x09, 0x00, 0x6e, 0x00),
5231 PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc),
5232 },
5233 { .freq = 5180,
5234 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04,
5235 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5236 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
5237 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
5238 0x00, 0x09, 0x00, 0x6e, 0x00),
5239 PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb),
5240 },
5241 { .freq = 5190,
5242 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04,
5243 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5244 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
5245 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
5246 0x00, 0x09, 0x00, 0x6e, 0x00),
5247 PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa),
5248 },
5249 { .freq = 5200,
5250 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04,
5251 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5252 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
5253 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
5254 0x00, 0x09, 0x00, 0x6e, 0x00),
5255 PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9),
5256 },
5257 { .freq = 5210,
5258 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04,
5259 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5260 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
5261 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
5262 0x00, 0x09, 0x00, 0x6e, 0x00),
5263 PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8),
5264 },
5265 { .freq = 5220,
5266 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04,
5267 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5268 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
5269 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
5270 0x00, 0x09, 0x00, 0x6e, 0x00),
5271 PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7),
5272 },
5273 { .freq = 5230,
5274 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04,
5275 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5276 0xff, 0xea, 0x00, 0x06, 0x00, 0x70, 0x00, 0x08,
5277 0x00, 0x9e, 0x00, 0xea, 0x00, 0x06, 0x00, 0x70,
5278 0x00, 0x08, 0x00, 0x6e, 0x00),
5279 PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6),
5280 },
5281 { .freq = 5240,
5282 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04,
5283 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5284 0xff, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08,
5285 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70,
5286 0x00, 0x08, 0x00, 0x6d, 0x00),
5287 PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5),
5288 },
5289 { .freq = 5250,
5290 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04,
5291 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5292 0xff, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08,
5293 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70,
5294 0x00, 0x08, 0x00, 0x6d, 0x00),
5295 PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4),
5296 },
5297 { .freq = 5260,
5298 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04,
5299 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
5300 0xff, 0xd9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08,
5301 0x00, 0x9d, 0x00, 0xd9, 0x00, 0x05, 0x00, 0x70,
5302 0x00, 0x08, 0x00, 0x6d, 0x00),
5303 PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3),
5304 },
5305 { .freq = 5270,
5306 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04,
5307 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
5308 0xff, 0xd8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
5309 0x00, 0x9c, 0x00, 0xd8, 0x00, 0x04, 0x00, 0x70,
5310 0x00, 0x07, 0x00, 0x6c, 0x00),
5311 PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2),
5312 },
5313 { .freq = 5280,
5314 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04,
5315 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
5316 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
5317 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
5318 0x00, 0x07, 0x00, 0x6c, 0x00),
5319 PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1),
5320 },
5321 { .freq = 5290,
5322 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04,
5323 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0f, 0x00,
5324 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
5325 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
5326 0x00, 0x07, 0x00, 0x6c, 0x00),
5327 PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0),
5328 },
5329 { .freq = 5300,
5330 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04,
5331 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5332 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
5333 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
5334 0x00, 0x07, 0x00, 0x6c, 0x00),
5335 PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0),
5336 },
5337 { .freq = 5310,
5338 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04,
5339 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5340 0xff, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
5341 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
5342 0x00, 0x07, 0x00, 0x6c, 0x00),
5343 PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef),
5344 },
5345 { .freq = 5320,
5346 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04,
5347 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5348 0xff, 0xb8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
5349 0x00, 0x9c, 0x00, 0xb8, 0x00, 0x04, 0x00, 0x70,
5350 0x00, 0x07, 0x00, 0x6c, 0x00),
5351 PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee),
5352 },
5353 { .freq = 5330,
5354 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04,
5355 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5356 0xff, 0xb7, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
5357 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x04, 0x00, 0x70,
5358 0x00, 0x07, 0x00, 0x6b, 0x00),
5359 PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed),
5360 },
5361 { .freq = 5340,
5362 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04,
5363 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5364 0xff, 0xb7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x07,
5365 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x70,
5366 0x00, 0x07, 0x00, 0x6b, 0x00),
5367 PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec),
5368 },
5369 { .freq = 5350,
5370 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04,
5371 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5372 0xff, 0xa7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
5373 0x00, 0x9b, 0x00, 0xa7, 0x00, 0x03, 0x00, 0x70,
5374 0x00, 0x06, 0x00, 0x6b, 0x00),
5375 PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb),
5376 },
5377 { .freq = 5360,
5378 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04,
5379 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5380 0xff, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
5381 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70,
5382 0x00, 0x06, 0x00, 0x6b, 0x00),
5383 PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea),
5384 },
5385 { .freq = 5370,
5386 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04,
5387 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5388 0xff, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
5389 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70,
5390 0x00, 0x06, 0x00, 0x5b, 0x00),
5391 PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9),
5392 },
5393 { .freq = 5380,
5394 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04,
5395 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5396 0xff, 0x96, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
5397 0x00, 0x9a, 0x00, 0x96, 0x00, 0x03, 0x00, 0x70,
5398 0x00, 0x06, 0x00, 0x5a, 0x00),
5399 PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8),
5400 },
5401 { .freq = 5390,
5402 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04,
5403 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8f, 0x0e, 0x00,
5404 0xff, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
5405 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
5406 0x00, 0x06, 0x00, 0x5a, 0x00),
5407 PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7),
5408 },
5409 { .freq = 5400,
5410 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04,
5411 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
5412 0xc8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
5413 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
5414 0x00, 0x06, 0x00, 0x5a, 0x00),
5415 PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6),
5416 },
5417 { .freq = 5410,
5418 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04,
5419 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
5420 0xc8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05,
5421 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
5422 0x00, 0x05, 0x00, 0x5a, 0x00),
5423 PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5),
5424 },
5425 { .freq = 5420,
5426 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04,
5427 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
5428 0xc8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05,
5429 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
5430 0x00, 0x05, 0x00, 0x5a, 0x00),
5431 PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5),
5432 },
5433 { .freq = 5430,
5434 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04,
5435 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
5436 0xc8, 0x85, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05,
5437 0x00, 0x99, 0x00, 0x85, 0x00, 0x02, 0x00, 0x70,
5438 0x00, 0x05, 0x00, 0x59, 0x00),
5439 PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4),
5440 },
5441 { .freq = 5440,
5442 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04,
5443 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
5444 0xc8, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05,
5445 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70,
5446 0x00, 0x05, 0x00, 0x59, 0x00),
5447 PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3),
5448 },
5449 { .freq = 5450,
5450 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04,
5451 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
5452 0xc8, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05,
5453 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70,
5454 0x00, 0x05, 0x00, 0x59, 0x00),
5455 PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2),
5456 },
5457 { .freq = 5460,
5458 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04,
5459 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
5460 0xc8, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x04,
5461 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70,
5462 0x00, 0x04, 0x00, 0x69, 0x00),
5463 PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1),
5464 },
5465 { .freq = 5470,
5466 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04,
5467 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
5468 0xc8, 0x74, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
5469 0x00, 0x99, 0x00, 0x74, 0x00, 0x01, 0x00, 0x70,
5470 0x00, 0x04, 0x00, 0x69, 0x00),
5471 PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0),
5472 },
5473 { .freq = 5480,
5474 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04,
5475 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
5476 0xc8, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
5477 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
5478 0x00, 0x04, 0x00, 0x68, 0x00),
5479 PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df),
5480 },
5481 { .freq = 5490,
5482 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04,
5483 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00,
5484 0xc8, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
5485 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
5486 0x00, 0x04, 0x00, 0x68, 0x00),
5487 PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de),
5488 },
5489 { .freq = 5500,
5490 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04,
5491 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5492 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
5493 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
5494 0x00, 0x04, 0x00, 0x78, 0x00),
5495 PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd),
5496 },
5497 { .freq = 5510,
5498 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04,
5499 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5500 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
5501 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
5502 0x00, 0x04, 0x00, 0x78, 0x00),
5503 PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd),
5504 },
5505 { .freq = 5520,
5506 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04,
5507 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5508 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
5509 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
5510 0x00, 0x04, 0x00, 0x78, 0x00),
5511 PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc),
5512 },
5513 { .freq = 5530,
5514 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04,
5515 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5516 0x84, 0x63, 0x00, 0x01, 0x00, 0x70, 0x00, 0x03,
5517 0x00, 0x98, 0x00, 0x63, 0x00, 0x01, 0x00, 0x70,
5518 0x00, 0x03, 0x00, 0x78, 0x00),
5519 PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db),
5520 },
5521 { .freq = 5540,
5522 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04,
5523 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5524 0x84, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03,
5525 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70,
5526 0x00, 0x03, 0x00, 0x77, 0x00),
5527 PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da),
5528 },
5529 { .freq = 5550,
5530 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04,
5531 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5532 0x84, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03,
5533 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70,
5534 0x00, 0x03, 0x00, 0x77, 0x00),
5535 PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9),
5536 },
5537 { .freq = 5560,
5538 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04,
5539 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5540 0x84, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03,
5541 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70,
5542 0x00, 0x03, 0x00, 0x77, 0x00),
5543 PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8),
5544 },
5545 { .freq = 5570,
5546 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04,
5547 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5548 0x84, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5549 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70,
5550 0x00, 0x02, 0x00, 0x76, 0x00),
5551 PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7),
5552 },
5553 { .freq = 5580,
5554 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04,
5555 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5556 0x84, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5557 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70,
5558 0x00, 0x02, 0x00, 0x76, 0x00),
5559 PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7),
5560 },
5561 { .freq = 5590,
5562 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04,
5563 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00,
5564 0x84, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5565 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
5566 0x00, 0x02, 0x00, 0x76, 0x00),
5567 PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6),
5568 },
5569 { .freq = 5600,
5570 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04,
5571 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5572 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5573 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
5574 0x00, 0x02, 0x00, 0x76, 0x00),
5575 PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5),
5576 },
5577 { .freq = 5610,
5578 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04,
5579 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5580 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5581 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
5582 0x00, 0x02, 0x00, 0x76, 0x00),
5583 PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4),
5584 },
5585 { .freq = 5620,
5586 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04,
5587 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5588 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5589 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
5590 0x00, 0x02, 0x00, 0x76, 0x00),
5591 PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3),
5592 },
5593 { .freq = 5630,
5594 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04,
5595 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5596 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5597 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
5598 0x00, 0x02, 0x00, 0x76, 0x00),
5599 PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2),
5600 },
5601 { .freq = 5640,
5602 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04,
5603 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5604 0x70, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
5605 0x00, 0x95, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
5606 0x00, 0x02, 0x00, 0x75, 0x00),
5607 PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2),
5608 },
5609 { .freq = 5650,
5610 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04,
5611 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5612 0x70, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5613 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70,
5614 0x00, 0x01, 0x00, 0x75, 0x00),
5615 PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1),
5616 },
5617 { .freq = 5660,
5618 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04,
5619 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5620 0x70, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5621 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70,
5622 0x00, 0x01, 0x00, 0x75, 0x00),
5623 PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0),
5624 },
5625 { .freq = 5670,
5626 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04,
5627 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5628 0x70, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5629 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
5630 0x00, 0x01, 0x00, 0x74, 0x00),
5631 PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf),
5632 },
5633 { .freq = 5680,
5634 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04,
5635 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5636 0x70, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5637 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
5638 0x00, 0x01, 0x00, 0x74, 0x00),
5639 PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce),
5640 },
5641 { .freq = 5690,
5642 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04,
5643 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00,
5644 0x70, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5645 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
5646 0x00, 0x01, 0x00, 0x74, 0x00),
5647 PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce),
5648 },
5649 { .freq = 5700,
5650 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04,
5651 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5652 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5653 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
5654 0x00, 0x01, 0x00, 0x74, 0x00),
5655 PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd),
5656 },
5657 { .freq = 5710,
5658 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04,
5659 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5660 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5661 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
5662 0x00, 0x01, 0x00, 0x74, 0x00),
5663 PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc),
5664 },
5665 { .freq = 5720,
5666 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04,
5667 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5668 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5669 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
5670 0x00, 0x01, 0x00, 0x74, 0x00),
5671 PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb),
5672 },
5673 { .freq = 5725,
5674 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04,
5675 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5676 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5677 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
5678 0x00, 0x01, 0x00, 0x74, 0x00),
5679 PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb),
5680 },
5681 { .freq = 5730,
5682 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04,
5683 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5684 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
5685 0x00, 0x94, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
5686 0x00, 0x01, 0x00, 0x84, 0x00),
5687 PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca),
5688 },
5689 { .freq = 5735,
5690 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04,
5691 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5692 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5693 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
5694 0x00, 0x00, 0x00, 0x83, 0x00),
5695 PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca),
5696 },
5697 { .freq = 5740,
5698 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04,
5699 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5700 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5701 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
5702 0x00, 0x00, 0x00, 0x83, 0x00),
5703 PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9),
5704 },
5705 { .freq = 5745,
5706 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04,
5707 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5708 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5709 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
5710 0x00, 0x00, 0x00, 0x83, 0x00),
5711 PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9),
5712 },
5713 { .freq = 5750,
5714 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04,
5715 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5716 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5717 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
5718 0x00, 0x00, 0x00, 0x83, 0x00),
5719 PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9),
5720 },
5721 { .freq = 5755,
5722 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04,
5723 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5724 0x40, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5725 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
5726 0x00, 0x00, 0x00, 0x83, 0x00),
5727 PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8),
5728 },
5729 { .freq = 5760,
5730 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04,
5731 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5732 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5733 0x00, 0x93, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
5734 0x00, 0x00, 0x00, 0x83, 0x00),
5735 PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8),
5736 },
5737 { .freq = 5765,
5738 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04,
5739 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5740 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5741 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
5742 0x00, 0x00, 0x00, 0x82, 0x00),
5743 PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8),
5744 },
5745 { .freq = 5770,
5746 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04,
5747 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5748 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5749 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
5750 0x00, 0x00, 0x00, 0x82, 0x00),
5751 PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7),
5752 },
5753 { .freq = 5775,
5754 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04,
5755 0x10, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5756 0x40, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5757 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
5758 0x00, 0x00, 0x00, 0x82, 0x00),
5759 PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7),
5760 },
5761 { .freq = 5780,
5762 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04,
5763 0x0c, 0x01, 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00,
5764 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5765 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5766 0x00, 0x00, 0x00, 0x82, 0x00),
5767 PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6),
5768 },
5769 { .freq = 5785,
5770 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04,
5771 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
5772 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5773 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5774 0x00, 0x00, 0x00, 0x82, 0x00),
5775 PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6),
5776 },
5777 { .freq = 5790,
5778 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04,
5779 0x0c, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
5780 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5781 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5782 0x00, 0x00, 0x00, 0x82, 0x00),
5783 PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6),
5784 },
5785 { .freq = 5795,
5786 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04,
5787 0x10, 0x01, 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00,
5788 0x40, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5789 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5790 0x00, 0x00, 0x00, 0x82, 0x00),
5791 PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5),
5792 },
5793 { .freq = 5800,
5794 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04,
5795 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5796 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5797 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5798 0x00, 0x00, 0x00, 0x82, 0x00),
5799 PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5),
5800 },
5801 { .freq = 5805,
5802 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04,
5803 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5804 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5805 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5806 0x00, 0x00, 0x00, 0x82, 0x00),
5807 PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4),
5808 },
5809 { .freq = 5810,
5810 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04,
5811 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5812 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5813 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5814 0x00, 0x00, 0x00, 0x82, 0x00),
5815 PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4),
5816 },
5817 { .freq = 5815,
5818 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04,
5819 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5820 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5821 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5822 0x00, 0x00, 0x00, 0x82, 0x00),
5823 PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4),
5824 },
5825 { .freq = 5820,
5826 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04,
5827 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5828 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5829 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5830 0x00, 0x00, 0x00, 0x82, 0x00),
5831 PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3),
5832 },
5833 { .freq = 5825,
5834 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04,
5835 0x10, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5836 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5837 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5838 0x00, 0x00, 0x00, 0x82, 0x00),
5839 PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3),
5840 },
5841 { .freq = 5830,
5842 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04,
5843 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5844 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5845 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5846 0x00, 0x00, 0x00, 0x72, 0x00),
5847 PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2),
5848 },
5849 { .freq = 5840,
5850 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04,
5851 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5852 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5853 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
5854 0x00, 0x00, 0x00, 0x72, 0x00),
5855 PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2),
5856 },
5857 { .freq = 5850,
5858 RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04,
5859 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5860 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5861 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
5862 0x00, 0x00, 0x00, 0x72, 0x00),
5863 PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1),
5864 },
5865 { .freq = 5860,
5866 RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04,
5867 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5868 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5869 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
5870 0x00, 0x00, 0x00, 0x72, 0x00),
5871 PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0),
5872 },
5873 { .freq = 5870,
5874 RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04,
5875 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5876 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5877 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
5878 0x00, 0x00, 0x00, 0x71, 0x00),
5879 PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf),
5880 },
5881 { .freq = 5880,
5882 RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04,
5883 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5884 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5885 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
5886 0x00, 0x00, 0x00, 0x71, 0x00),
5887 PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf),
5888 },
5889 { .freq = 5890,
5890 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04,
5891 0x0c, 0x01, 0x06, 0x06, 0x06, 0x88, 0x04, 0x00,
5892 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5893 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
5894 0x00, 0x00, 0x00, 0x71, 0x00),
5895 PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be),
5896 },
5897 { .freq = 5900,
5898 RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04,
5899 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00,
5900 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5901 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
5902 0x00, 0x00, 0x00, 0x71, 0x00),
5903 PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd),
5904 },
5905 { .freq = 5910,
5906 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04,
5907 0x0c, 0x01, 0x06, 0x06, 0x06, 0x87, 0x03, 0x00,
5908 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
5909 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
5910 0x00, 0x00, 0x00, 0x71, 0x00),
5911 PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc),
5912 },
5913 { .freq = 2412,
5914 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04,
5915 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00,
5916 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00,
5917 0x0f, 0x00, 0x0b, 0x00, 0x1f, 0x00, 0x03, 0x00,
5918 0x70, 0x00, 0x0f, 0x00, 0x0b),
5919 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
5920 },
5921 { .freq = 2417,
5922 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04,
5923 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
5924 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00,
5925 0x0f, 0x00, 0x0a, 0x00, 0x1f, 0x00, 0x03, 0x00,
5926 0x70, 0x00, 0x0f, 0x00, 0x0a),
5927 PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441),
5928 },
5929 { .freq = 2422,
5930 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04,
5931 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
5932 0x00, 0x00, 0x0e, 0x00, 0x03, 0x00, 0x70, 0x00,
5933 0x0f, 0x00, 0x0a, 0x00, 0x0e, 0x00, 0x03, 0x00,
5934 0x70, 0x00, 0x0f, 0x00, 0x0a),
5935 PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f),
5936 },
5937 { .freq = 2427,
5938 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04,
5939 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
5940 0x00, 0x00, 0x0d, 0x00, 0x03, 0x00, 0x70, 0x00,
5941 0x0e, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x03, 0x00,
5942 0x70, 0x00, 0x0e, 0x00, 0x0a),
5943 PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d),
5944 },
5945 { .freq = 2432,
5946 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04,
5947 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
5948 0x00, 0x00, 0x0c, 0x00, 0x03, 0x00, 0x70, 0x00,
5949 0x0e, 0x00, 0x0a, 0x00, 0x0c, 0x00, 0x03, 0x00,
5950 0x70, 0x00, 0x0e, 0x00, 0x0a),
5951 PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a),
5952 },
5953 { .freq = 2437,
5954 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04,
5955 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
5956 0x00, 0x00, 0x0b, 0x00, 0x03, 0x00, 0x70, 0x00,
5957 0x0e, 0x00, 0x0a, 0x00, 0x0b, 0x00, 0x03, 0x00,
5958 0x70, 0x00, 0x0e, 0x00, 0x0a),
5959 PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438),
5960 },
5961 { .freq = 2442,
5962 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04,
5963 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
5964 0x00, 0x00, 0x09, 0x00, 0x03, 0x00, 0x70, 0x00,
5965 0x0e, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x03, 0x00,
5966 0x70, 0x00, 0x0e, 0x00, 0x0a),
5967 PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436),
5968 },
5969 { .freq = 2447,
5970 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04,
5971 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
5972 0x00, 0x00, 0x08, 0x00, 0x02, 0x00, 0x70, 0x00,
5973 0x0e, 0x00, 0x09, 0x00, 0x08, 0x00, 0x02, 0x00,
5974 0x70, 0x00, 0x0e, 0x00, 0x09),
5975 PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434),
5976 },
5977 { .freq = 2452,
5978 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04,
5979 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
5980 0x00, 0x00, 0x07, 0x00, 0x02, 0x00, 0x70, 0x00,
5981 0x0e, 0x00, 0x09, 0x00, 0x07, 0x00, 0x02, 0x00,
5982 0x70, 0x00, 0x0e, 0x00, 0x09),
5983 PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431),
5984 },
5985 { .freq = 2457,
5986 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04,
5987 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
5988 0x00, 0x00, 0x06, 0x00, 0x02, 0x00, 0x70, 0x00,
5989 0x0d, 0x00, 0x09, 0x00, 0x06, 0x00, 0x02, 0x00,
5990 0x70, 0x00, 0x0d, 0x00, 0x09),
5991 PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f),
5992 },
5993 { .freq = 2462,
5994 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04,
5995 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
5996 0x00, 0x00, 0x05, 0x00, 0x02, 0x00, 0x70, 0x00,
5997 0x0d, 0x00, 0x09, 0x00, 0x05, 0x00, 0x02, 0x00,
5998 0x70, 0x00, 0x0d, 0x00, 0x09),
5999 PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d),
6000 },
6001 { .freq = 2467,
6002 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04,
6003 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
6004 0x00, 0x00, 0x04, 0x00, 0x02, 0x00, 0x70, 0x00,
6005 0x0d, 0x00, 0x08, 0x00, 0x04, 0x00, 0x02, 0x00,
6006 0x70, 0x00, 0x0d, 0x00, 0x08),
6007 PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b),
6008 },
6009 { .freq = 2472,
6010 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04,
6011 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
6012 0x00, 0x00, 0x03, 0x00, 0x02, 0x00, 0x70, 0x00,
6013 0x0d, 0x00, 0x08, 0x00, 0x03, 0x00, 0x02, 0x00,
6014 0x70, 0x00, 0x0d, 0x00, 0x08),
6015 PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429),
6016 },
6017 { .freq = 2484,
6018 RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04,
6019 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
6020 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00,
6021 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00,
6022 0x70, 0x00, 0x0d, 0x00, 0x08),
6023 PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424),
6024 },
6025};
6026
6027static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev6[] = {
6028 { .freq = 4920,
6029 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04,
6030 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
6031 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6032 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6033 0x00, 0x0f, 0x00, 0x6f, 0x00),
6034 PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216),
6035 },
6036 { .freq = 4930,
6037 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04,
6038 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
6039 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6040 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6041 0x00, 0x0f, 0x00, 0x6f, 0x00),
6042 PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215),
6043 },
6044 { .freq = 4940,
6045 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04,
6046 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
6047 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6048 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6049 0x00, 0x0f, 0x00, 0x6f, 0x00),
6050 PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214),
6051 },
6052 { .freq = 4950,
6053 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04,
6054 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
6055 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6056 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6057 0x00, 0x0f, 0x00, 0x6f, 0x00),
6058 PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213),
6059 },
6060 { .freq = 4960,
6061 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04,
6062 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6063 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6064 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6065 0x00, 0x0f, 0x00, 0x6f, 0x00),
6066 PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212),
6067 },
6068 { .freq = 4970,
6069 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04,
6070 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6071 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6072 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6073 0x00, 0x0f, 0x00, 0x6f, 0x00),
6074 PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211),
6075 },
6076 { .freq = 4980,
6077 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04,
6078 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6079 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6080 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6081 0x00, 0x0f, 0x00, 0x6f, 0x00),
6082 PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f),
6083 },
6084 { .freq = 4990,
6085 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04,
6086 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6087 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6088 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6089 0x00, 0x0f, 0x00, 0x6f, 0x00),
6090 PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e),
6091 },
6092 { .freq = 5000,
6093 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04,
6094 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6095 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6096 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6097 0x00, 0x0f, 0x00, 0x6f, 0x00),
6098 PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d),
6099 },
6100 { .freq = 5010,
6101 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04,
6102 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6103 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6104 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6105 0x00, 0x0f, 0x00, 0x6f, 0x00),
6106 PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c),
6107 },
6108 { .freq = 5020,
6109 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04,
6110 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6111 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6112 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6113 0x00, 0x0f, 0x00, 0x6f, 0x00),
6114 PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b),
6115 },
6116 { .freq = 5030,
6117 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04,
6118 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6119 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6120 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6121 0x00, 0x0f, 0x00, 0x6f, 0x00),
6122 PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a),
6123 },
6124 { .freq = 5040,
6125 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04,
6126 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6127 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6128 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6129 0x00, 0x0f, 0x00, 0x6f, 0x00),
6130 PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209),
6131 },
6132 { .freq = 5050,
6133 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04,
6134 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6135 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6136 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6137 0x00, 0x0f, 0x00, 0x6f, 0x00),
6138 PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208),
6139 },
6140 { .freq = 5060,
6141 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04,
6142 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6143 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6144 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
6145 0x00, 0x0f, 0x00, 0x6f, 0x00),
6146 PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207),
6147 },
6148 { .freq = 5070,
6149 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04,
6150 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6151 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6152 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77,
6153 0x00, 0x0f, 0x00, 0x6f, 0x00),
6154 PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206),
6155 },
6156 { .freq = 5080,
6157 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04,
6158 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6159 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6160 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77,
6161 0x00, 0x0f, 0x00, 0x6f, 0x00),
6162 PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205),
6163 },
6164 { .freq = 5090,
6165 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04,
6166 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
6167 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
6168 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77,
6169 0x00, 0x0f, 0x00, 0x6f, 0x00),
6170 PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204),
6171 },
6172 { .freq = 5100,
6173 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04,
6174 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6175 0xff, 0xfd, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
6176 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x77,
6177 0x00, 0x0f, 0x00, 0x6f, 0x00),
6178 PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203),
6179 },
6180 { .freq = 5110,
6181 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04,
6182 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6183 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
6184 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77,
6185 0x00, 0x0f, 0x00, 0x6f, 0x00),
6186 PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202),
6187 },
6188 { .freq = 5120,
6189 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04,
6190 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6191 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
6192 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77,
6193 0x00, 0x0f, 0x00, 0x6f, 0x00),
6194 PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201),
6195 },
6196 { .freq = 5130,
6197 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04,
6198 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6199 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
6200 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77,
6201 0x00, 0x0f, 0x00, 0x6f, 0x00),
6202 PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200),
6203 },
6204 { .freq = 5140,
6205 RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04,
6206 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6207 0xff, 0xfb, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
6208 0x00, 0x6f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x77,
6209 0x00, 0x0f, 0x00, 0x6f, 0x00),
6210 PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff),
6211 },
6212 { .freq = 5160,
6213 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04,
6214 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6215 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e,
6216 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77,
6217 0x00, 0x0e, 0x00, 0x6f, 0x00),
6218 PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd),
6219 },
6220 { .freq = 5170,
6221 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04,
6222 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6223 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e,
6224 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77,
6225 0x00, 0x0e, 0x00, 0x6f, 0x00),
6226 PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc),
6227 },
6228 { .freq = 5180,
6229 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04,
6230 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6231 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0e,
6232 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77,
6233 0x00, 0x0e, 0x00, 0x6f, 0x00),
6234 PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb),
6235 },
6236 { .freq = 5190,
6237 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04,
6238 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6239 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0d,
6240 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77,
6241 0x00, 0x0d, 0x00, 0x6f, 0x00),
6242 PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa),
6243 },
6244 { .freq = 5200,
6245 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04,
6246 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6247 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
6248 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77,
6249 0x00, 0x0d, 0x00, 0x6f, 0x00),
6250 PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9),
6251 },
6252 { .freq = 5210,
6253 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04,
6254 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
6255 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
6256 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77,
6257 0x00, 0x0d, 0x00, 0x6f, 0x00),
6258 PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8),
6259 },
6260 { .freq = 5220,
6261 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04,
6262 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
6263 0xfe, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
6264 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77,
6265 0x00, 0x0d, 0x00, 0x6f, 0x00),
6266 PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7),
6267 },
6268 { .freq = 5230,
6269 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04,
6270 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
6271 0xee, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
6272 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77,
6273 0x00, 0x0d, 0x00, 0x6f, 0x00),
6274 PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6),
6275 },
6276 { .freq = 5240,
6277 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04,
6278 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
6279 0xee, 0xc8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
6280 0x00, 0x6f, 0x00, 0xc8, 0x00, 0x05, 0x00, 0x77,
6281 0x00, 0x0d, 0x00, 0x6f, 0x00),
6282 PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5),
6283 },
6284 { .freq = 5250,
6285 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04,
6286 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
6287 0xed, 0xc7, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
6288 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x05, 0x00, 0x77,
6289 0x00, 0x0d, 0x00, 0x6f, 0x00),
6290 PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4),
6291 },
6292 { .freq = 5260,
6293 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04,
6294 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0e, 0x00,
6295 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0d,
6296 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77,
6297 0x00, 0x0d, 0x00, 0x6f, 0x00),
6298 PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3),
6299 },
6300 { .freq = 5270,
6301 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04,
6302 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8e, 0x0e, 0x00,
6303 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0c,
6304 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77,
6305 0x00, 0x0c, 0x00, 0x6f, 0x00),
6306 PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2),
6307 },
6308 { .freq = 5280,
6309 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04,
6310 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
6311 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
6312 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
6313 0x00, 0x0c, 0x00, 0x6f, 0x00),
6314 PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1),
6315 },
6316 { .freq = 5290,
6317 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04,
6318 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
6319 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
6320 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
6321 0x00, 0x0c, 0x00, 0x6f, 0x00),
6322 PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0),
6323 },
6324 { .freq = 5300,
6325 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04,
6326 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
6327 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
6328 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
6329 0x00, 0x0c, 0x00, 0x6f, 0x00),
6330 PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0),
6331 },
6332 { .freq = 5310,
6333 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04,
6334 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
6335 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
6336 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
6337 0x00, 0x0c, 0x00, 0x6f, 0x00),
6338 PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef),
6339 },
6340 { .freq = 5320,
6341 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04,
6342 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
6343 0xdb, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
6344 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
6345 0x00, 0x0c, 0x00, 0x6f, 0x00),
6346 PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee),
6347 },
6348 { .freq = 5330,
6349 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04,
6350 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
6351 0xcb, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b,
6352 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77,
6353 0x00, 0x0b, 0x00, 0x6f, 0x00),
6354 PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed),
6355 },
6356 { .freq = 5340,
6357 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04,
6358 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
6359 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b,
6360 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77,
6361 0x00, 0x0b, 0x00, 0x6f, 0x00),
6362 PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec),
6363 },
6364 { .freq = 5350,
6365 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04,
6366 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
6367 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b,
6368 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77,
6369 0x00, 0x0b, 0x00, 0x6f, 0x00),
6370 PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb),
6371 },
6372 { .freq = 5360,
6373 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04,
6374 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
6375 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
6376 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77,
6377 0x00, 0x0a, 0x00, 0x6f, 0x00),
6378 PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea),
6379 },
6380 { .freq = 5370,
6381 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04,
6382 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
6383 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
6384 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77,
6385 0x00, 0x0a, 0x00, 0x6f, 0x00),
6386 PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9),
6387 },
6388 { .freq = 5380,
6389 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04,
6390 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
6391 0xb8, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
6392 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77,
6393 0x00, 0x0a, 0x00, 0x6f, 0x00),
6394 PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8),
6395 },
6396 { .freq = 5390,
6397 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04,
6398 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
6399 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
6400 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77,
6401 0x00, 0x0a, 0x00, 0x6f, 0x00),
6402 PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7),
6403 },
6404 { .freq = 5400,
6405 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04,
6406 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
6407 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
6408 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77,
6409 0x00, 0x0a, 0x00, 0x6f, 0x00),
6410 PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6),
6411 },
6412 { .freq = 5410,
6413 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04,
6414 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
6415 0xb7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a,
6416 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
6417 0x00, 0x0a, 0x00, 0x6f, 0x00),
6418 PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5),
6419 },
6420 { .freq = 5420,
6421 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04,
6422 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
6423 0xa7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a,
6424 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
6425 0x00, 0x0a, 0x00, 0x6f, 0x00),
6426 PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5),
6427 },
6428 { .freq = 5430,
6429 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04,
6430 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0b, 0x00,
6431 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a,
6432 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
6433 0x00, 0x0a, 0x00, 0x6f, 0x00),
6434 PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4),
6435 },
6436 { .freq = 5440,
6437 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04,
6438 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
6439 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x09,
6440 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
6441 0x00, 0x09, 0x00, 0x6f, 0x00),
6442 PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3),
6443 },
6444 { .freq = 5450,
6445 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04,
6446 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
6447 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09,
6448 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77,
6449 0x00, 0x09, 0x00, 0x6f, 0x00),
6450 PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2),
6451 },
6452 { .freq = 5460,
6453 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04,
6454 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
6455 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09,
6456 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77,
6457 0x00, 0x09, 0x00, 0x6f, 0x00),
6458 PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1),
6459 },
6460 { .freq = 5470,
6461 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04,
6462 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
6463 0x94, 0x73, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09,
6464 0x00, 0x6f, 0x00, 0x73, 0x00, 0x01, 0x00, 0x77,
6465 0x00, 0x09, 0x00, 0x6f, 0x00),
6466 PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0),
6467 },
6468 { .freq = 5480,
6469 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04,
6470 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
6471 0x84, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6472 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6473 0x00, 0x09, 0x00, 0x6f, 0x00),
6474 PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df),
6475 },
6476 { .freq = 5490,
6477 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04,
6478 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
6479 0x83, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6480 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6481 0x00, 0x09, 0x00, 0x6f, 0x00),
6482 PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de),
6483 },
6484 { .freq = 5500,
6485 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04,
6486 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
6487 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6488 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6489 0x00, 0x09, 0x00, 0x6f, 0x00),
6490 PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd),
6491 },
6492 { .freq = 5510,
6493 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04,
6494 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
6495 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6496 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6497 0x00, 0x09, 0x00, 0x6f, 0x00),
6498 PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd),
6499 },
6500 { .freq = 5520,
6501 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04,
6502 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
6503 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6504 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6505 0x00, 0x09, 0x00, 0x6f, 0x00),
6506 PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc),
6507 },
6508 { .freq = 5530,
6509 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04,
6510 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00,
6511 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6512 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6513 0x00, 0x09, 0x00, 0x6f, 0x00),
6514 PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db),
6515 },
6516 { .freq = 5540,
6517 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04,
6518 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00,
6519 0x71, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6520 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6521 0x00, 0x09, 0x00, 0x6f, 0x00),
6522 PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da),
6523 },
6524 { .freq = 5550,
6525 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04,
6526 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
6527 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6528 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6529 0x00, 0x09, 0x00, 0x6f, 0x00),
6530 PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9),
6531 },
6532 { .freq = 5560,
6533 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04,
6534 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
6535 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6536 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
6537 0x00, 0x09, 0x00, 0x6f, 0x00),
6538 PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8),
6539 },
6540 { .freq = 5570,
6541 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04,
6542 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
6543 0x61, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
6544 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77,
6545 0x00, 0x09, 0x00, 0x6f, 0x00),
6546 PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7),
6547 },
6548 { .freq = 5580,
6549 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04,
6550 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00,
6551 0x60, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
6552 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77,
6553 0x00, 0x08, 0x00, 0x6f, 0x00),
6554 PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7),
6555 },
6556 { .freq = 5590,
6557 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04,
6558 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00,
6559 0x50, 0x61, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
6560 0x00, 0x6f, 0x00, 0x61, 0x00, 0x00, 0x00, 0x77,
6561 0x00, 0x08, 0x00, 0x6f, 0x00),
6562 PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6),
6563 },
6564 { .freq = 5600,
6565 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04,
6566 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
6567 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
6568 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77,
6569 0x00, 0x08, 0x00, 0x6f, 0x00),
6570 PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5),
6571 },
6572 { .freq = 5610,
6573 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04,
6574 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
6575 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
6576 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77,
6577 0x00, 0x08, 0x00, 0x6f, 0x00),
6578 PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4),
6579 },
6580 { .freq = 5620,
6581 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04,
6582 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
6583 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
6584 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77,
6585 0x00, 0x07, 0x00, 0x6f, 0x00),
6586 PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3),
6587 },
6588 { .freq = 5630,
6589 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04,
6590 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
6591 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
6592 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77,
6593 0x00, 0x07, 0x00, 0x6f, 0x00),
6594 PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2),
6595 },
6596 { .freq = 5640,
6597 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04,
6598 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
6599 0x40, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
6600 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77,
6601 0x00, 0x07, 0x00, 0x6f, 0x00),
6602 PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2),
6603 },
6604 { .freq = 5650,
6605 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04,
6606 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
6607 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
6608 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77,
6609 0x00, 0x07, 0x00, 0x6f, 0x00),
6610 PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1),
6611 },
6612 { .freq = 5660,
6613 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04,
6614 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
6615 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6616 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77,
6617 0x00, 0x06, 0x00, 0x6f, 0x00),
6618 PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0),
6619 },
6620 { .freq = 5670,
6621 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04,
6622 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
6623 0x40, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6624 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6625 0x00, 0x06, 0x00, 0x6f, 0x00),
6626 PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf),
6627 },
6628 { .freq = 5680,
6629 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04,
6630 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
6631 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6632 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6633 0x00, 0x06, 0x00, 0x6f, 0x00),
6634 PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce),
6635 },
6636 { .freq = 5690,
6637 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04,
6638 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
6639 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6640 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6641 0x00, 0x06, 0x00, 0x6f, 0x00),
6642 PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce),
6643 },
6644 { .freq = 5700,
6645 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04,
6646 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
6647 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6648 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6649 0x00, 0x06, 0x00, 0x6e, 0x00),
6650 PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd),
6651 },
6652 { .freq = 5710,
6653 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04,
6654 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
6655 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6656 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6657 0x00, 0x06, 0x00, 0x6e, 0x00),
6658 PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc),
6659 },
6660 { .freq = 5720,
6661 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04,
6662 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
6663 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6664 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6665 0x00, 0x06, 0x00, 0x6e, 0x00),
6666 PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb),
6667 },
6668 { .freq = 5725,
6669 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04,
6670 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
6671 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6672 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6673 0x00, 0x06, 0x00, 0x6e, 0x00),
6674 PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb),
6675 },
6676 { .freq = 5730,
6677 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04,
6678 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
6679 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6680 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6681 0x00, 0x06, 0x00, 0x6e, 0x00),
6682 PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca),
6683 },
6684 { .freq = 5735,
6685 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04,
6686 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
6687 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6688 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6689 0x00, 0x06, 0x00, 0x6d, 0x00),
6690 PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca),
6691 },
6692 { .freq = 5740,
6693 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04,
6694 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
6695 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6696 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6697 0x00, 0x06, 0x00, 0x6d, 0x00),
6698 PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9),
6699 },
6700 { .freq = 5745,
6701 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04,
6702 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
6703 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
6704 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
6705 0x00, 0x06, 0x00, 0x6d, 0x00),
6706 PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9),
6707 },
6708 { .freq = 5750,
6709 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04,
6710 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
6711 0x20, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6712 0x00, 0x6d, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77,
6713 0x00, 0x05, 0x00, 0x6d, 0x00),
6714 PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9),
6715 },
6716 { .freq = 5755,
6717 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04,
6718 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
6719 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6720 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77,
6721 0x00, 0x05, 0x00, 0x6c, 0x00),
6722 PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8),
6723 },
6724 { .freq = 5760,
6725 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04,
6726 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00,
6727 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6728 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77,
6729 0x00, 0x05, 0x00, 0x6c, 0x00),
6730 PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8),
6731 },
6732 { .freq = 5765,
6733 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04,
6734 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00,
6735 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6736 0x00, 0x6c, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
6737 0x00, 0x05, 0x00, 0x6c, 0x00),
6738 PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8),
6739 },
6740 { .freq = 5770,
6741 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04,
6742 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
6743 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6744 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
6745 0x00, 0x05, 0x00, 0x6b, 0x00),
6746 PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7),
6747 },
6748 { .freq = 5775,
6749 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04,
6750 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
6751 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6752 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
6753 0x00, 0x05, 0x00, 0x6b, 0x00),
6754 PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7),
6755 },
6756 { .freq = 5780,
6757 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04,
6758 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
6759 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6760 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
6761 0x00, 0x05, 0x00, 0x6b, 0x00),
6762 PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6),
6763 },
6764 { .freq = 5785,
6765 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04,
6766 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6767 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6768 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
6769 0x00, 0x05, 0x00, 0x6b, 0x00),
6770 PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6),
6771 },
6772 { .freq = 5790,
6773 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04,
6774 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6775 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6776 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
6777 0x00, 0x05, 0x00, 0x6b, 0x00),
6778 PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6),
6779 },
6780 { .freq = 5795,
6781 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04,
6782 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6783 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6784 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6785 0x00, 0x05, 0x00, 0x6b, 0x00),
6786 PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5),
6787 },
6788 { .freq = 5800,
6789 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04,
6790 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6791 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6792 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6793 0x00, 0x05, 0x00, 0x6b, 0x00),
6794 PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5),
6795 },
6796 { .freq = 5805,
6797 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04,
6798 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6799 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6800 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6801 0x00, 0x05, 0x00, 0x6a, 0x00),
6802 PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4),
6803 },
6804 { .freq = 5810,
6805 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04,
6806 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6807 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6808 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6809 0x00, 0x05, 0x00, 0x6a, 0x00),
6810 PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4),
6811 },
6812 { .freq = 5815,
6813 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04,
6814 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6815 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6816 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6817 0x00, 0x05, 0x00, 0x6a, 0x00),
6818 PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4),
6819 },
6820 { .freq = 5820,
6821 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04,
6822 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6823 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6824 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6825 0x00, 0x05, 0x00, 0x6a, 0x00),
6826 PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3),
6827 },
6828 { .freq = 5825,
6829 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04,
6830 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6831 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6832 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6833 0x00, 0x05, 0x00, 0x69, 0x00),
6834 PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3),
6835 },
6836 { .freq = 5830,
6837 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04,
6838 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6839 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
6840 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6841 0x00, 0x05, 0x00, 0x69, 0x00),
6842 PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2),
6843 },
6844 { .freq = 5840,
6845 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04,
6846 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
6847 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6848 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6849 0x00, 0x04, 0x00, 0x69, 0x00),
6850 PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2),
6851 },
6852 { .freq = 5850,
6853 RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04,
6854 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
6855 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6856 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6857 0x00, 0x04, 0x00, 0x69, 0x00),
6858 PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1),
6859 },
6860 { .freq = 5860,
6861 RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04,
6862 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
6863 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6864 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6865 0x00, 0x04, 0x00, 0x69, 0x00),
6866 PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0),
6867 },
6868 { .freq = 5870,
6869 RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04,
6870 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
6871 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6872 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6873 0x00, 0x04, 0x00, 0x68, 0x00),
6874 PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf),
6875 },
6876 { .freq = 5880,
6877 RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04,
6878 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
6879 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6880 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6881 0x00, 0x04, 0x00, 0x68, 0x00),
6882 PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf),
6883 },
6884 { .freq = 5890,
6885 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04,
6886 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
6887 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6888 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6889 0x00, 0x04, 0x00, 0x68, 0x00),
6890 PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be),
6891 },
6892 { .freq = 5900,
6893 RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04,
6894 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
6895 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6896 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6897 0x00, 0x04, 0x00, 0x68, 0x00),
6898 PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd),
6899 },
6900 { .freq = 5910,
6901 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04,
6902 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
6903 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
6904 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
6905 0x00, 0x04, 0x00, 0x68, 0x00),
6906 PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc),
6907 },
6908 { .freq = 2412,
6909 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04,
6910 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00,
6911 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00,
6912 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00,
6913 0x70, 0x00, 0x0b, 0x00, 0x0a),
6914 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
6915 },
6916 { .freq = 2417,
6917 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04,
6918 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
6919 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00,
6920 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00,
6921 0x70, 0x00, 0x0b, 0x00, 0x0a),
6922 PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441),
6923 },
6924 { .freq = 2422,
6925 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04,
6926 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
6927 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00,
6928 0x0b, 0x00, 0x0a, 0x00, 0x67, 0x00, 0x03, 0x00,
6929 0x70, 0x00, 0x0b, 0x00, 0x0a),
6930 PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f),
6931 },
6932 { .freq = 2427,
6933 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04,
6934 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
6935 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00,
6936 0x0a, 0x00, 0x0a, 0x00, 0x57, 0x00, 0x03, 0x00,
6937 0x70, 0x00, 0x0a, 0x00, 0x0a),
6938 PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d),
6939 },
6940 { .freq = 2432,
6941 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04,
6942 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
6943 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00,
6944 0x0a, 0x00, 0x0a, 0x00, 0x56, 0x00, 0x03, 0x00,
6945 0x70, 0x00, 0x0a, 0x00, 0x0a),
6946 PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a),
6947 },
6948 { .freq = 2437,
6949 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04,
6950 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
6951 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00,
6952 0x0a, 0x00, 0x0a, 0x00, 0x46, 0x00, 0x03, 0x00,
6953 0x70, 0x00, 0x0a, 0x00, 0x0a),
6954 PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438),
6955 },
6956 { .freq = 2442,
6957 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04,
6958 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
6959 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00,
6960 0x0a, 0x00, 0x0a, 0x00, 0x45, 0x00, 0x02, 0x00,
6961 0x70, 0x00, 0x0a, 0x00, 0x0a),
6962 PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436),
6963 },
6964 { .freq = 2447,
6965 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04,
6966 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
6967 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00,
6968 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00,
6969 0x70, 0x00, 0x0a, 0x00, 0x09),
6970 PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434),
6971 },
6972 { .freq = 2452,
6973 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04,
6974 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
6975 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00,
6976 0x0a, 0x00, 0x09, 0x00, 0x23, 0x00, 0x02, 0x00,
6977 0x70, 0x00, 0x0a, 0x00, 0x09),
6978 PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431),
6979 },
6980 { .freq = 2457,
6981 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04,
6982 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
6983 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00,
6984 0x0a, 0x00, 0x09, 0x00, 0x12, 0x00, 0x02, 0x00,
6985 0x70, 0x00, 0x0a, 0x00, 0x09),
6986 PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f),
6987 },
6988 { .freq = 2462,
6989 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04,
6990 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
6991 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00,
6992 0x09, 0x00, 0x09, 0x00, 0x02, 0x00, 0x02, 0x00,
6993 0x70, 0x00, 0x09, 0x00, 0x09),
6994 PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d),
6995 },
6996 { .freq = 2467,
6997 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04,
6998 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
6999 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00,
7000 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00,
7001 0x70, 0x00, 0x09, 0x00, 0x09),
7002 PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b),
7003 },
7004 { .freq = 2472,
7005 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04,
7006 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
7007 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00,
7008 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00,
7009 0x70, 0x00, 0x09, 0x00, 0x09),
7010 PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429),
7011 },
7012 { .freq = 2484,
7013 RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04,
7014 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00,
7015 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00,
7016 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00,
7017 0x70, 0x00, 0x09, 0x00, 0x09),
7018 PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424),
7019 },
7020};
7021
7022static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev7_9[] = {
7023 { .freq = 4920,
7024 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04,
7025 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
7026 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f,
7027 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
7028 0x00, 0x0f, 0x00, 0x6f, 0x00),
7029 PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216),
7030 },
7031 { .freq = 4930,
7032 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04,
7033 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
7034 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e,
7035 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
7036 0x00, 0x0e, 0x00, 0x6f, 0x00),
7037 PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215),
7038 },
7039 { .freq = 4940,
7040 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04,
7041 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
7042 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e,
7043 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
7044 0x00, 0x0e, 0x00, 0x6f, 0x00),
7045 PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214),
7046 },
7047 { .freq = 4950,
7048 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04,
7049 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
7050 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e,
7051 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70,
7052 0x00, 0x0e, 0x00, 0x6f, 0x00),
7053 PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213),
7054 },
7055 { .freq = 4960,
7056 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04,
7057 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7058 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e,
7059 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
7060 0x00, 0x0e, 0x00, 0x6f, 0x00),
7061 PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212),
7062 },
7063 { .freq = 4970,
7064 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04,
7065 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7066 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
7067 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
7068 0x00, 0x0d, 0x00, 0x6f, 0x00),
7069 PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211),
7070 },
7071 { .freq = 4980,
7072 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04,
7073 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7074 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
7075 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
7076 0x00, 0x0d, 0x00, 0x6f, 0x00),
7077 PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f),
7078 },
7079 { .freq = 4990,
7080 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04,
7081 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7082 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
7083 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
7084 0x00, 0x0d, 0x00, 0x6f, 0x00),
7085 PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e),
7086 },
7087 { .freq = 5000,
7088 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04,
7089 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7090 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
7091 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
7092 0x00, 0x0d, 0x00, 0x6f, 0x00),
7093 PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d),
7094 },
7095 { .freq = 5010,
7096 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04,
7097 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7098 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d,
7099 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70,
7100 0x00, 0x0d, 0x00, 0x6f, 0x00),
7101 PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c),
7102 },
7103 { .freq = 5020,
7104 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04,
7105 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7106 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d,
7107 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70,
7108 0x00, 0x0d, 0x00, 0x6f, 0x00),
7109 PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b),
7110 },
7111 { .freq = 5030,
7112 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04,
7113 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7114 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
7115 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70,
7116 0x00, 0x0c, 0x00, 0x6f, 0x00),
7117 PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a),
7118 },
7119 { .freq = 5040,
7120 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04,
7121 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7122 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
7123 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70,
7124 0x00, 0x0c, 0x00, 0x6f, 0x00),
7125 PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209),
7126 },
7127 { .freq = 5050,
7128 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04,
7129 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7130 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
7131 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70,
7132 0x00, 0x0c, 0x00, 0x6f, 0x00),
7133 PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208),
7134 },
7135 { .freq = 5060,
7136 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04,
7137 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7138 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c,
7139 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70,
7140 0x00, 0x0c, 0x00, 0x6f, 0x00),
7141 PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207),
7142 },
7143 { .freq = 5070,
7144 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04,
7145 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7146 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
7147 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70,
7148 0x00, 0x0b, 0x00, 0x6f, 0x00),
7149 PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206),
7150 },
7151 { .freq = 5080,
7152 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04,
7153 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7154 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
7155 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
7156 0x00, 0x0b, 0x00, 0x6f, 0x00),
7157 PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205),
7158 },
7159 { .freq = 5090,
7160 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04,
7161 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
7162 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
7163 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
7164 0x00, 0x0b, 0x00, 0x6f, 0x00),
7165 PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204),
7166 },
7167 { .freq = 5100,
7168 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04,
7169 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7170 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
7171 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
7172 0x00, 0x0b, 0x00, 0x6f, 0x00),
7173 PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203),
7174 },
7175 { .freq = 5110,
7176 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04,
7177 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7178 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
7179 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
7180 0x00, 0x0b, 0x00, 0x6f, 0x00),
7181 PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202),
7182 },
7183 { .freq = 5120,
7184 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04,
7185 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7186 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b,
7187 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70,
7188 0x00, 0x0b, 0x00, 0x6f, 0x00),
7189 PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201),
7190 },
7191 { .freq = 5130,
7192 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04,
7193 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7194 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a,
7195 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70,
7196 0x00, 0x0a, 0x00, 0x6f, 0x00),
7197 PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200),
7198 },
7199 { .freq = 5140,
7200 RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04,
7201 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7202 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a,
7203 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70,
7204 0x00, 0x0a, 0x00, 0x6f, 0x00),
7205 PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff),
7206 },
7207 { .freq = 5160,
7208 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04,
7209 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7210 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09,
7211 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70,
7212 0x00, 0x09, 0x00, 0x6e, 0x00),
7213 PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd),
7214 },
7215 { .freq = 5170,
7216 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04,
7217 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7218 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
7219 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70,
7220 0x00, 0x09, 0x00, 0x6e, 0x00),
7221 PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc),
7222 },
7223 { .freq = 5180,
7224 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04,
7225 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7226 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
7227 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
7228 0x00, 0x09, 0x00, 0x6e, 0x00),
7229 PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb),
7230 },
7231 { .freq = 5190,
7232 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04,
7233 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7234 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
7235 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
7236 0x00, 0x09, 0x00, 0x6e, 0x00),
7237 PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa),
7238 },
7239 { .freq = 5200,
7240 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04,
7241 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7242 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
7243 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
7244 0x00, 0x09, 0x00, 0x6e, 0x00),
7245 PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9),
7246 },
7247 { .freq = 5210,
7248 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04,
7249 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
7250 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
7251 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
7252 0x00, 0x09, 0x00, 0x6e, 0x00),
7253 PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8),
7254 },
7255 { .freq = 5220,
7256 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04,
7257 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
7258 0xfe, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09,
7259 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70,
7260 0x00, 0x09, 0x00, 0x6e, 0x00),
7261 PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7),
7262 },
7263 { .freq = 5230,
7264 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04,
7265 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
7266 0xee, 0xea, 0x00, 0x06, 0x00, 0x70, 0x00, 0x08,
7267 0x00, 0x9e, 0x00, 0xea, 0x00, 0x06, 0x00, 0x70,
7268 0x00, 0x08, 0x00, 0x6e, 0x00),
7269 PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6),
7270 },
7271 { .freq = 5240,
7272 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04,
7273 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
7274 0xee, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08,
7275 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70,
7276 0x00, 0x08, 0x00, 0x6d, 0x00),
7277 PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5),
7278 },
7279 { .freq = 5250,
7280 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04,
7281 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
7282 0xed, 0xe9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08,
7283 0x00, 0x9d, 0x00, 0xe9, 0x00, 0x05, 0x00, 0x70,
7284 0x00, 0x08, 0x00, 0x6d, 0x00),
7285 PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4),
7286 },
7287 { .freq = 5260,
7288 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04,
7289 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0e, 0x00,
7290 0xed, 0xd9, 0x00, 0x05, 0x00, 0x70, 0x00, 0x08,
7291 0x00, 0x9d, 0x00, 0xd9, 0x00, 0x05, 0x00, 0x70,
7292 0x00, 0x08, 0x00, 0x6d, 0x00),
7293 PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3),
7294 },
7295 { .freq = 5270,
7296 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04,
7297 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8e, 0x0e, 0x00,
7298 0xed, 0xd8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
7299 0x00, 0x9c, 0x00, 0xd8, 0x00, 0x04, 0x00, 0x70,
7300 0x00, 0x07, 0x00, 0x6c, 0x00),
7301 PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2),
7302 },
7303 { .freq = 5280,
7304 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04,
7305 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
7306 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
7307 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
7308 0x00, 0x07, 0x00, 0x6c, 0x00),
7309 PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1),
7310 },
7311 { .freq = 5290,
7312 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04,
7313 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
7314 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
7315 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
7316 0x00, 0x07, 0x00, 0x6c, 0x00),
7317 PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0),
7318 },
7319 { .freq = 5300,
7320 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04,
7321 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
7322 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
7323 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
7324 0x00, 0x07, 0x00, 0x6c, 0x00),
7325 PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0),
7326 },
7327 { .freq = 5310,
7328 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04,
7329 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
7330 0xdc, 0xc8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
7331 0x00, 0x9c, 0x00, 0xc8, 0x00, 0x04, 0x00, 0x70,
7332 0x00, 0x07, 0x00, 0x6c, 0x00),
7333 PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef),
7334 },
7335 { .freq = 5320,
7336 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04,
7337 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
7338 0xdb, 0xb8, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
7339 0x00, 0x9c, 0x00, 0xb8, 0x00, 0x04, 0x00, 0x70,
7340 0x00, 0x07, 0x00, 0x6c, 0x00),
7341 PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee),
7342 },
7343 { .freq = 5330,
7344 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04,
7345 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
7346 0xcb, 0xb7, 0x00, 0x04, 0x00, 0x70, 0x00, 0x07,
7347 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x04, 0x00, 0x70,
7348 0x00, 0x07, 0x00, 0x6b, 0x00),
7349 PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed),
7350 },
7351 { .freq = 5340,
7352 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04,
7353 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
7354 0xca, 0xb7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x07,
7355 0x00, 0x9b, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x70,
7356 0x00, 0x07, 0x00, 0x6b, 0x00),
7357 PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec),
7358 },
7359 { .freq = 5350,
7360 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04,
7361 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
7362 0xca, 0xa7, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
7363 0x00, 0x9b, 0x00, 0xa7, 0x00, 0x03, 0x00, 0x70,
7364 0x00, 0x06, 0x00, 0x6b, 0x00),
7365 PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb),
7366 },
7367 { .freq = 5360,
7368 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04,
7369 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
7370 0xc9, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
7371 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70,
7372 0x00, 0x06, 0x00, 0x6b, 0x00),
7373 PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea),
7374 },
7375 { .freq = 5370,
7376 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04,
7377 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
7378 0xc9, 0xa6, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
7379 0x00, 0x9b, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x70,
7380 0x00, 0x06, 0x00, 0x7b, 0x00),
7381 PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9),
7382 },
7383 { .freq = 5380,
7384 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04,
7385 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
7386 0xb8, 0x96, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
7387 0x00, 0x9a, 0x00, 0x96, 0x00, 0x03, 0x00, 0x70,
7388 0x00, 0x06, 0x00, 0x7a, 0x00),
7389 PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8),
7390 },
7391 { .freq = 5390,
7392 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04,
7393 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
7394 0xb8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
7395 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
7396 0x00, 0x06, 0x00, 0x7a, 0x00),
7397 PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7),
7398 },
7399 { .freq = 5400,
7400 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04,
7401 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
7402 0xb8, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x06,
7403 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
7404 0x00, 0x06, 0x00, 0x7a, 0x00),
7405 PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6),
7406 },
7407 { .freq = 5410,
7408 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04,
7409 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
7410 0xb7, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05,
7411 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
7412 0x00, 0x05, 0x00, 0x7a, 0x00),
7413 PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5),
7414 },
7415 { .freq = 5420,
7416 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04,
7417 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
7418 0xa7, 0x95, 0x00, 0x03, 0x00, 0x70, 0x00, 0x05,
7419 0x00, 0x9a, 0x00, 0x95, 0x00, 0x03, 0x00, 0x70,
7420 0x00, 0x05, 0x00, 0x7a, 0x00),
7421 PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5),
7422 },
7423 { .freq = 5430,
7424 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04,
7425 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0b, 0x00,
7426 0xa6, 0x85, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05,
7427 0x00, 0x99, 0x00, 0x85, 0x00, 0x02, 0x00, 0x70,
7428 0x00, 0x05, 0x00, 0x79, 0x00),
7429 PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4),
7430 },
7431 { .freq = 5440,
7432 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04,
7433 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
7434 0xa6, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05,
7435 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70,
7436 0x00, 0x05, 0x00, 0x79, 0x00),
7437 PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3),
7438 },
7439 { .freq = 5450,
7440 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04,
7441 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
7442 0x95, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x05,
7443 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70,
7444 0x00, 0x05, 0x00, 0x79, 0x00),
7445 PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2),
7446 },
7447 { .freq = 5460,
7448 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04,
7449 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
7450 0x95, 0x84, 0x00, 0x02, 0x00, 0x70, 0x00, 0x04,
7451 0x00, 0x99, 0x00, 0x84, 0x00, 0x02, 0x00, 0x70,
7452 0x00, 0x04, 0x00, 0x79, 0x00),
7453 PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1),
7454 },
7455 { .freq = 5470,
7456 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04,
7457 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
7458 0x94, 0x74, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
7459 0x00, 0x99, 0x00, 0x74, 0x00, 0x01, 0x00, 0x70,
7460 0x00, 0x04, 0x00, 0x79, 0x00),
7461 PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0),
7462 },
7463 { .freq = 5480,
7464 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04,
7465 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
7466 0x84, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
7467 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
7468 0x00, 0x04, 0x00, 0x78, 0x00),
7469 PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df),
7470 },
7471 { .freq = 5490,
7472 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04,
7473 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
7474 0x83, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
7475 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
7476 0x00, 0x04, 0x00, 0x78, 0x00),
7477 PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de),
7478 },
7479 { .freq = 5500,
7480 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04,
7481 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
7482 0x82, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
7483 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
7484 0x00, 0x04, 0x00, 0x78, 0x00),
7485 PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd),
7486 },
7487 { .freq = 5510,
7488 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04,
7489 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
7490 0x82, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
7491 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
7492 0x00, 0x04, 0x00, 0x78, 0x00),
7493 PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd),
7494 },
7495 { .freq = 5520,
7496 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04,
7497 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
7498 0x72, 0x73, 0x00, 0x01, 0x00, 0x70, 0x00, 0x04,
7499 0x00, 0x98, 0x00, 0x73, 0x00, 0x01, 0x00, 0x70,
7500 0x00, 0x04, 0x00, 0x78, 0x00),
7501 PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc),
7502 },
7503 { .freq = 5530,
7504 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04,
7505 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00,
7506 0x72, 0x63, 0x00, 0x01, 0x00, 0x70, 0x00, 0x03,
7507 0x00, 0x98, 0x00, 0x63, 0x00, 0x01, 0x00, 0x70,
7508 0x00, 0x03, 0x00, 0x78, 0x00),
7509 PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db),
7510 },
7511 { .freq = 5540,
7512 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04,
7513 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00,
7514 0x71, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03,
7515 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70,
7516 0x00, 0x03, 0x00, 0x77, 0x00),
7517 PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da),
7518 },
7519 { .freq = 5550,
7520 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04,
7521 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
7522 0x61, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03,
7523 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70,
7524 0x00, 0x03, 0x00, 0x77, 0x00),
7525 PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9),
7526 },
7527 { .freq = 5560,
7528 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04,
7529 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
7530 0x61, 0x62, 0x00, 0x00, 0x00, 0x70, 0x00, 0x03,
7531 0x00, 0x97, 0x00, 0x62, 0x00, 0x00, 0x00, 0x70,
7532 0x00, 0x03, 0x00, 0x77, 0x00),
7533 PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8),
7534 },
7535 { .freq = 5570,
7536 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04,
7537 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
7538 0x61, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7539 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70,
7540 0x00, 0x02, 0x00, 0x76, 0x00),
7541 PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7),
7542 },
7543 { .freq = 5580,
7544 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04,
7545 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00,
7546 0x60, 0x52, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7547 0x00, 0x96, 0x00, 0x52, 0x00, 0x00, 0x00, 0x70,
7548 0x00, 0x02, 0x00, 0x86, 0x00),
7549 PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7),
7550 },
7551 { .freq = 5590,
7552 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04,
7553 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00,
7554 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7555 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
7556 0x00, 0x02, 0x00, 0x86, 0x00),
7557 PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6),
7558 },
7559 { .freq = 5600,
7560 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04,
7561 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
7562 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7563 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
7564 0x00, 0x02, 0x00, 0x86, 0x00),
7565 PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5),
7566 },
7567 { .freq = 5610,
7568 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04,
7569 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
7570 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7571 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
7572 0x00, 0x02, 0x00, 0x86, 0x00),
7573 PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4),
7574 },
7575 { .freq = 5620,
7576 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04,
7577 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
7578 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7579 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
7580 0x00, 0x02, 0x00, 0x86, 0x00),
7581 PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3),
7582 },
7583 { .freq = 5630,
7584 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04,
7585 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
7586 0x50, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7587 0x00, 0x96, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
7588 0x00, 0x02, 0x00, 0x86, 0x00),
7589 PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2),
7590 },
7591 { .freq = 5640,
7592 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04,
7593 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
7594 0x40, 0x51, 0x00, 0x00, 0x00, 0x70, 0x00, 0x02,
7595 0x00, 0x95, 0x00, 0x51, 0x00, 0x00, 0x00, 0x70,
7596 0x00, 0x02, 0x00, 0x85, 0x00),
7597 PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2),
7598 },
7599 { .freq = 5650,
7600 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04,
7601 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
7602 0x40, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7603 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70,
7604 0x00, 0x01, 0x00, 0x85, 0x00),
7605 PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1),
7606 },
7607 { .freq = 5660,
7608 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04,
7609 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
7610 0x40, 0x50, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7611 0x00, 0x95, 0x00, 0x50, 0x00, 0x00, 0x00, 0x70,
7612 0x00, 0x01, 0x00, 0x85, 0x00),
7613 PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0),
7614 },
7615 { .freq = 5670,
7616 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04,
7617 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
7618 0x40, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7619 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
7620 0x00, 0x01, 0x00, 0x84, 0x00),
7621 PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf),
7622 },
7623 { .freq = 5680,
7624 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04,
7625 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
7626 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7627 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
7628 0x00, 0x01, 0x00, 0x84, 0x00),
7629 PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce),
7630 },
7631 { .freq = 5690,
7632 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04,
7633 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
7634 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7635 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
7636 0x00, 0x01, 0x00, 0x94, 0x00),
7637 PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce),
7638 },
7639 { .freq = 5700,
7640 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04,
7641 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
7642 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7643 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
7644 0x00, 0x01, 0x00, 0x94, 0x00),
7645 PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd),
7646 },
7647 { .freq = 5710,
7648 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04,
7649 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
7650 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7651 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
7652 0x00, 0x01, 0x00, 0x94, 0x00),
7653 PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc),
7654 },
7655 { .freq = 5720,
7656 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04,
7657 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
7658 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7659 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
7660 0x00, 0x01, 0x00, 0x94, 0x00),
7661 PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb),
7662 },
7663 { .freq = 5725,
7664 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04,
7665 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
7666 0x30, 0x40, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7667 0x00, 0x94, 0x00, 0x40, 0x00, 0x00, 0x00, 0x70,
7668 0x00, 0x01, 0x00, 0x94, 0x00),
7669 PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb),
7670 },
7671 { .freq = 5730,
7672 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04,
7673 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
7674 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x01,
7675 0x00, 0x94, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
7676 0x00, 0x01, 0x00, 0x94, 0x00),
7677 PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca),
7678 },
7679 { .freq = 5735,
7680 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04,
7681 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
7682 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7683 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
7684 0x00, 0x00, 0x00, 0x93, 0x00),
7685 PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca),
7686 },
7687 { .freq = 5740,
7688 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04,
7689 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
7690 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7691 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
7692 0x00, 0x00, 0x00, 0x93, 0x00),
7693 PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9),
7694 },
7695 { .freq = 5745,
7696 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04,
7697 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
7698 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7699 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
7700 0x00, 0x00, 0x00, 0x93, 0x00),
7701 PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9),
7702 },
7703 { .freq = 5750,
7704 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04,
7705 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
7706 0x20, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7707 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
7708 0x00, 0x00, 0x00, 0x93, 0x00),
7709 PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9),
7710 },
7711 { .freq = 5755,
7712 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04,
7713 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
7714 0x10, 0x30, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7715 0x00, 0x93, 0x00, 0x30, 0x00, 0x00, 0x00, 0x70,
7716 0x00, 0x00, 0x00, 0x93, 0x00),
7717 PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8),
7718 },
7719 { .freq = 5760,
7720 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04,
7721 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00,
7722 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7723 0x00, 0x93, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
7724 0x00, 0x00, 0x00, 0x93, 0x00),
7725 PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8),
7726 },
7727 { .freq = 5765,
7728 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04,
7729 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00,
7730 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7731 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
7732 0x00, 0x00, 0x00, 0x92, 0x00),
7733 PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8),
7734 },
7735 { .freq = 5770,
7736 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04,
7737 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
7738 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7739 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
7740 0x00, 0x00, 0x00, 0x92, 0x00),
7741 PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7),
7742 },
7743 { .freq = 5775,
7744 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04,
7745 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
7746 0x10, 0x20, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7747 0x00, 0x92, 0x00, 0x20, 0x00, 0x00, 0x00, 0x70,
7748 0x00, 0x00, 0x00, 0x92, 0x00),
7749 PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7),
7750 },
7751 { .freq = 5780,
7752 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04,
7753 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
7754 0x10, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7755 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7756 0x00, 0x00, 0x00, 0x92, 0x00),
7757 PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6),
7758 },
7759 { .freq = 5785,
7760 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04,
7761 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7762 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7763 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7764 0x00, 0x00, 0x00, 0x92, 0x00),
7765 PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6),
7766 },
7767 { .freq = 5790,
7768 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04,
7769 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7770 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7771 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7772 0x00, 0x00, 0x00, 0x92, 0x00),
7773 PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6),
7774 },
7775 { .freq = 5795,
7776 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04,
7777 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7778 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7779 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7780 0x00, 0x00, 0x00, 0x92, 0x00),
7781 PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5),
7782 },
7783 { .freq = 5800,
7784 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04,
7785 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7786 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7787 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7788 0x00, 0x00, 0x00, 0x92, 0x00),
7789 PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5),
7790 },
7791 { .freq = 5805,
7792 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04,
7793 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7794 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7795 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7796 0x00, 0x00, 0x00, 0x92, 0x00),
7797 PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4),
7798 },
7799 { .freq = 5810,
7800 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04,
7801 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7802 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7803 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7804 0x00, 0x00, 0x00, 0x92, 0x00),
7805 PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4),
7806 },
7807 { .freq = 5815,
7808 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04,
7809 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7810 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7811 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7812 0x00, 0x00, 0x00, 0x92, 0x00),
7813 PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4),
7814 },
7815 { .freq = 5820,
7816 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04,
7817 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7818 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7819 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7820 0x00, 0x00, 0x00, 0x92, 0x00),
7821 PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3),
7822 },
7823 { .freq = 5825,
7824 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04,
7825 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7826 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7827 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7828 0x00, 0x00, 0x00, 0x92, 0x00),
7829 PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3),
7830 },
7831 { .freq = 5830,
7832 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04,
7833 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7834 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7835 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7836 0x00, 0x00, 0x00, 0x92, 0x00),
7837 PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2),
7838 },
7839 { .freq = 5840,
7840 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04,
7841 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
7842 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7843 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70,
7844 0x00, 0x00, 0x00, 0x92, 0x00),
7845 PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2),
7846 },
7847 { .freq = 5850,
7848 RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04,
7849 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
7850 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7851 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
7852 0x00, 0x00, 0x00, 0x92, 0x00),
7853 PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1),
7854 },
7855 { .freq = 5860,
7856 RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04,
7857 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
7858 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7859 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
7860 0x00, 0x00, 0x00, 0x92, 0x00),
7861 PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0),
7862 },
7863 { .freq = 5870,
7864 RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04,
7865 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
7866 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7867 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
7868 0x00, 0x00, 0x00, 0x91, 0x00),
7869 PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf),
7870 },
7871 { .freq = 5880,
7872 RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04,
7873 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
7874 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7875 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
7876 0x00, 0x00, 0x00, 0x91, 0x00),
7877 PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf),
7878 },
7879 { .freq = 5890,
7880 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04,
7881 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
7882 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7883 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
7884 0x00, 0x00, 0x00, 0x91, 0x00),
7885 PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be),
7886 },
7887 { .freq = 5900,
7888 RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04,
7889 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
7890 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7891 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
7892 0x00, 0x00, 0x00, 0x91, 0x00),
7893 PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd),
7894 },
7895 { .freq = 5910,
7896 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04,
7897 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
7898 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00,
7899 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
7900 0x00, 0x00, 0x00, 0x91, 0x00),
7901 PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc),
7902 },
7903 { .freq = 2412,
7904 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04,
7905 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00,
7906 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00,
7907 0x0f, 0x00, 0x0b, 0x00, 0x89, 0x00, 0x03, 0x00,
7908 0x70, 0x00, 0x0f, 0x00, 0x0b),
7909 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
7910 },
7911 { .freq = 2417,
7912 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04,
7913 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
7914 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00,
7915 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00,
7916 0x70, 0x00, 0x0f, 0x00, 0x0a),
7917 PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441),
7918 },
7919 { .freq = 2422,
7920 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04,
7921 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
7922 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00,
7923 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00,
7924 0x70, 0x00, 0x0f, 0x00, 0x0a),
7925 PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f),
7926 },
7927 { .freq = 2427,
7928 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04,
7929 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
7930 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00,
7931 0x0e, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00,
7932 0x70, 0x00, 0x0e, 0x00, 0x0a),
7933 PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d),
7934 },
7935 { .freq = 2432,
7936 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04,
7937 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
7938 0x00, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00,
7939 0x0e, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00,
7940 0x70, 0x00, 0x0e, 0x00, 0x0a),
7941 PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a),
7942 },
7943 { .freq = 2437,
7944 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04,
7945 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
7946 0x00, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00,
7947 0x0e, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00,
7948 0x70, 0x00, 0x0e, 0x00, 0x0a),
7949 PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438),
7950 },
7951 { .freq = 2442,
7952 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04,
7953 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
7954 0x00, 0x00, 0x66, 0x00, 0x03, 0x00, 0x70, 0x00,
7955 0x0e, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x03, 0x00,
7956 0x70, 0x00, 0x0e, 0x00, 0x0a),
7957 PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436),
7958 },
7959 { .freq = 2447,
7960 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04,
7961 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
7962 0x00, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00,
7963 0x0e, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00,
7964 0x70, 0x00, 0x0e, 0x00, 0x09),
7965 PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434),
7966 },
7967 { .freq = 2452,
7968 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04,
7969 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
7970 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00,
7971 0x0e, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00,
7972 0x70, 0x00, 0x0e, 0x00, 0x09),
7973 PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431),
7974 },
7975 { .freq = 2457,
7976 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04,
7977 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
7978 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00,
7979 0x0d, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00,
7980 0x70, 0x00, 0x0d, 0x00, 0x09),
7981 PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f),
7982 },
7983 { .freq = 2462,
7984 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04,
7985 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
7986 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00,
7987 0x0d, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00,
7988 0x70, 0x00, 0x0d, 0x00, 0x09),
7989 PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d),
7990 },
7991 { .freq = 2467,
7992 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04,
7993 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
7994 0x00, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00,
7995 0x0d, 0x00, 0x08, 0x00, 0x22, 0x00, 0x02, 0x00,
7996 0x70, 0x00, 0x0d, 0x00, 0x08),
7997 PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b),
7998 },
7999 { .freq = 2472,
8000 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04,
8001 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
8002 0x00, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00,
8003 0x0d, 0x00, 0x08, 0x00, 0x11, 0x00, 0x02, 0x00,
8004 0x70, 0x00, 0x0d, 0x00, 0x08),
8005 PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429),
8006 },
8007 { .freq = 2484,
8008 RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04,
8009 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00,
8010 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00,
8011 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00,
8012 0x70, 0x00, 0x0d, 0x00, 0x08),
8013 PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424),
8014 },
8015};
8016
8017static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev8[] = {
8018 { .freq = 4920,
8019 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04,
8020 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
8021 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8022 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8023 0x00, 0x0f, 0x00, 0x6f, 0x00),
8024 PHYREGS(0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216),
8025 },
8026 { .freq = 4930,
8027 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04,
8028 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
8029 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8030 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8031 0x00, 0x0f, 0x00, 0x6f, 0x00),
8032 PHYREGS(0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215),
8033 },
8034 { .freq = 4940,
8035 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04,
8036 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
8037 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8038 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8039 0x00, 0x0f, 0x00, 0x6f, 0x00),
8040 PHYREGS(0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214),
8041 },
8042 { .freq = 4950,
8043 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04,
8044 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00,
8045 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8046 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8047 0x00, 0x0f, 0x00, 0x6f, 0x00),
8048 PHYREGS(0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213),
8049 },
8050 { .freq = 4960,
8051 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04,
8052 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8053 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8054 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8055 0x00, 0x0f, 0x00, 0x6f, 0x00),
8056 PHYREGS(0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212),
8057 },
8058 { .freq = 4970,
8059 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04,
8060 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8061 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8062 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8063 0x00, 0x0f, 0x00, 0x6f, 0x00),
8064 PHYREGS(0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211),
8065 },
8066 { .freq = 4980,
8067 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04,
8068 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8069 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8070 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8071 0x00, 0x0f, 0x00, 0x6f, 0x00),
8072 PHYREGS(0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f),
8073 },
8074 { .freq = 4990,
8075 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04,
8076 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8077 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8078 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8079 0x00, 0x0f, 0x00, 0x6f, 0x00),
8080 PHYREGS(0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e),
8081 },
8082 { .freq = 5000,
8083 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04,
8084 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8085 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8086 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8087 0x00, 0x0f, 0x00, 0x6f, 0x00),
8088 PHYREGS(0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d),
8089 },
8090 { .freq = 5010,
8091 RADIOREGS3(0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04,
8092 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8093 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8094 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8095 0x00, 0x0f, 0x00, 0x6f, 0x00),
8096 PHYREGS(0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c),
8097 },
8098 { .freq = 5020,
8099 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04,
8100 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8101 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8102 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8103 0x00, 0x0f, 0x00, 0x6f, 0x00),
8104 PHYREGS(0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b),
8105 },
8106 { .freq = 5030,
8107 RADIOREGS3(0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04,
8108 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8109 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8110 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8111 0x00, 0x0f, 0x00, 0x6f, 0x00),
8112 PHYREGS(0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a),
8113 },
8114 { .freq = 5040,
8115 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04,
8116 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8117 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8118 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8119 0x00, 0x0f, 0x00, 0x6f, 0x00),
8120 PHYREGS(0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209),
8121 },
8122 { .freq = 5050,
8123 RADIOREGS3(0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04,
8124 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8125 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8126 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8127 0x00, 0x0f, 0x00, 0x6f, 0x00),
8128 PHYREGS(0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208),
8129 },
8130 { .freq = 5060,
8131 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04,
8132 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8133 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8134 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77,
8135 0x00, 0x0f, 0x00, 0x6f, 0x00),
8136 PHYREGS(0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207),
8137 },
8138 { .freq = 5070,
8139 RADIOREGS3(0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04,
8140 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8141 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8142 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77,
8143 0x00, 0x0f, 0x00, 0x6f, 0x00),
8144 PHYREGS(0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206),
8145 },
8146 { .freq = 5080,
8147 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04,
8148 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8149 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8150 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77,
8151 0x00, 0x0f, 0x00, 0x6f, 0x00),
8152 PHYREGS(0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205),
8153 },
8154 { .freq = 5090,
8155 RADIOREGS3(0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04,
8156 0x0c, 0x01, 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00,
8157 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f,
8158 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77,
8159 0x00, 0x0f, 0x00, 0x6f, 0x00),
8160 PHYREGS(0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204),
8161 },
8162 { .freq = 5100,
8163 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04,
8164 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8165 0xff, 0xfd, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
8166 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x77,
8167 0x00, 0x0f, 0x00, 0x6f, 0x00),
8168 PHYREGS(0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203),
8169 },
8170 { .freq = 5110,
8171 RADIOREGS3(0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04,
8172 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8173 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
8174 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77,
8175 0x00, 0x0f, 0x00, 0x6f, 0x00),
8176 PHYREGS(0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202),
8177 },
8178 { .freq = 5120,
8179 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04,
8180 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8181 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
8182 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77,
8183 0x00, 0x0f, 0x00, 0x6f, 0x00),
8184 PHYREGS(0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201),
8185 },
8186 { .freq = 5130,
8187 RADIOREGS3(0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04,
8188 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8189 0xff, 0xfc, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
8190 0x00, 0x6f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x77,
8191 0x00, 0x0f, 0x00, 0x6f, 0x00),
8192 PHYREGS(0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200),
8193 },
8194 { .freq = 5140,
8195 RADIOREGS3(0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04,
8196 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8197 0xff, 0xfb, 0x00, 0x08, 0x00, 0x77, 0x00, 0x0f,
8198 0x00, 0x6f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x77,
8199 0x00, 0x0f, 0x00, 0x6f, 0x00),
8200 PHYREGS(0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff),
8201 },
8202 { .freq = 5160,
8203 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04,
8204 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8205 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e,
8206 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77,
8207 0x00, 0x0e, 0x00, 0x6f, 0x00),
8208 PHYREGS(0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd),
8209 },
8210 { .freq = 5170,
8211 RADIOREGS3(0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04,
8212 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8213 0xff, 0xfa, 0x00, 0x07, 0x00, 0x77, 0x00, 0x0e,
8214 0x00, 0x6f, 0x00, 0xfa, 0x00, 0x07, 0x00, 0x77,
8215 0x00, 0x0e, 0x00, 0x6f, 0x00),
8216 PHYREGS(0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc),
8217 },
8218 { .freq = 5180,
8219 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04,
8220 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8221 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0e,
8222 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77,
8223 0x00, 0x0e, 0x00, 0x6f, 0x00),
8224 PHYREGS(0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb),
8225 },
8226 { .freq = 5190,
8227 RADIOREGS3(0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04,
8228 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8229 0xff, 0xf9, 0x00, 0x06, 0x00, 0x77, 0x00, 0x0d,
8230 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x06, 0x00, 0x77,
8231 0x00, 0x0d, 0x00, 0x6f, 0x00),
8232 PHYREGS(0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa),
8233 },
8234 { .freq = 5200,
8235 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04,
8236 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8237 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
8238 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77,
8239 0x00, 0x0d, 0x00, 0x6f, 0x00),
8240 PHYREGS(0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9),
8241 },
8242 { .freq = 5210,
8243 RADIOREGS3(0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04,
8244 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00,
8245 0xff, 0xf9, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
8246 0x00, 0x6f, 0x00, 0xf9, 0x00, 0x05, 0x00, 0x77,
8247 0x00, 0x0d, 0x00, 0x6f, 0x00),
8248 PHYREGS(0x0828, 0x0824, 0x0820, 0x01f6, 0x01f7, 0x01f8),
8249 },
8250 { .freq = 5220,
8251 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0a, 0x05, 0x05, 0x04,
8252 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
8253 0xfe, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
8254 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77,
8255 0x00, 0x0d, 0x00, 0x6f, 0x00),
8256 PHYREGS(0x082c, 0x0828, 0x0824, 0x01f5, 0x01f6, 0x01f7),
8257 },
8258 { .freq = 5230,
8259 RADIOREGS3(0xa7, 0x01, 0x01, 0x02, 0x0b, 0x05, 0x05, 0x04,
8260 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
8261 0xee, 0xd8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
8262 0x00, 0x6f, 0x00, 0xd8, 0x00, 0x05, 0x00, 0x77,
8263 0x00, 0x0d, 0x00, 0x6f, 0x00),
8264 PHYREGS(0x0830, 0x082c, 0x0828, 0x01f4, 0x01f5, 0x01f6),
8265 },
8266 { .freq = 5240,
8267 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0c, 0x05, 0x05, 0x04,
8268 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
8269 0xee, 0xc8, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
8270 0x00, 0x6f, 0x00, 0xc8, 0x00, 0x05, 0x00, 0x77,
8271 0x00, 0x0d, 0x00, 0x6f, 0x00),
8272 PHYREGS(0x0834, 0x0830, 0x082c, 0x01f3, 0x01f4, 0x01f5),
8273 },
8274 { .freq = 5250,
8275 RADIOREGS3(0xa0, 0x01, 0x01, 0x02, 0x0d, 0x05, 0x05, 0x04,
8276 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0f, 0x00,
8277 0xed, 0xc7, 0x00, 0x05, 0x00, 0x77, 0x00, 0x0d,
8278 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x05, 0x00, 0x77,
8279 0x00, 0x0d, 0x00, 0x6f, 0x00),
8280 PHYREGS(0x0838, 0x0834, 0x0830, 0x01f2, 0x01f3, 0x01f4),
8281 },
8282 { .freq = 5260,
8283 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0e, 0x05, 0x05, 0x04,
8284 0x0c, 0x01, 0x02, 0x02, 0x02, 0x8e, 0x0e, 0x00,
8285 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0d,
8286 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77,
8287 0x00, 0x0d, 0x00, 0x6f, 0x00),
8288 PHYREGS(0x083c, 0x0838, 0x0834, 0x01f1, 0x01f2, 0x01f3),
8289 },
8290 { .freq = 5270,
8291 RADIOREGS3(0x98, 0x01, 0x01, 0x02, 0x0f, 0x05, 0x05, 0x04,
8292 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8e, 0x0e, 0x00,
8293 0xed, 0xc7, 0x00, 0x04, 0x00, 0x77, 0x00, 0x0c,
8294 0x00, 0x6f, 0x00, 0xc7, 0x00, 0x04, 0x00, 0x77,
8295 0x00, 0x0c, 0x00, 0x6f, 0x00),
8296 PHYREGS(0x0840, 0x083c, 0x0838, 0x01f0, 0x01f1, 0x01f2),
8297 },
8298 { .freq = 5280,
8299 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x10, 0x05, 0x05, 0x04,
8300 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
8301 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
8302 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
8303 0x00, 0x0c, 0x00, 0x6f, 0x00),
8304 PHYREGS(0x0844, 0x0840, 0x083c, 0x01f0, 0x01f0, 0x01f1),
8305 },
8306 { .freq = 5290,
8307 RADIOREGS3(0x91, 0x01, 0x01, 0x02, 0x11, 0x05, 0x05, 0x04,
8308 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
8309 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
8310 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
8311 0x00, 0x0c, 0x00, 0x6f, 0x00),
8312 PHYREGS(0x0848, 0x0844, 0x0840, 0x01ef, 0x01f0, 0x01f0),
8313 },
8314 { .freq = 5300,
8315 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x12, 0x05, 0x05, 0x04,
8316 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
8317 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
8318 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
8319 0x00, 0x0c, 0x00, 0x6f, 0x00),
8320 PHYREGS(0x084c, 0x0848, 0x0844, 0x01ee, 0x01ef, 0x01f0),
8321 },
8322 { .freq = 5310,
8323 RADIOREGS3(0x8a, 0x01, 0x01, 0x02, 0x13, 0x05, 0x05, 0x04,
8324 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
8325 0xdc, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
8326 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
8327 0x00, 0x0c, 0x00, 0x6f, 0x00),
8328 PHYREGS(0x0850, 0x084c, 0x0848, 0x01ed, 0x01ee, 0x01ef),
8329 },
8330 { .freq = 5320,
8331 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x14, 0x05, 0x05, 0x04,
8332 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0e, 0x00,
8333 0xdb, 0xb7, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0c,
8334 0x00, 0x6f, 0x00, 0xb7, 0x00, 0x03, 0x00, 0x77,
8335 0x00, 0x0c, 0x00, 0x6f, 0x00),
8336 PHYREGS(0x0854, 0x0850, 0x084c, 0x01ec, 0x01ed, 0x01ee),
8337 },
8338 { .freq = 5330,
8339 RADIOREGS3(0x83, 0x01, 0x01, 0x02, 0x15, 0x05, 0x05, 0x04,
8340 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
8341 0xcb, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b,
8342 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77,
8343 0x00, 0x0b, 0x00, 0x6f, 0x00),
8344 PHYREGS(0x0858, 0x0854, 0x0850, 0x01eb, 0x01ec, 0x01ed),
8345 },
8346 { .freq = 5340,
8347 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x16, 0x05, 0x05, 0x04,
8348 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8d, 0x0d, 0x00,
8349 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b,
8350 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77,
8351 0x00, 0x0b, 0x00, 0x6f, 0x00),
8352 PHYREGS(0x085c, 0x0858, 0x0854, 0x01ea, 0x01eb, 0x01ec),
8353 },
8354 { .freq = 5350,
8355 RADIOREGS3(0x7c, 0x01, 0x01, 0x02, 0x17, 0x05, 0x05, 0x04,
8356 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
8357 0xca, 0xa6, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0b,
8358 0x00, 0x6f, 0x00, 0xa6, 0x00, 0x03, 0x00, 0x77,
8359 0x00, 0x0b, 0x00, 0x6f, 0x00),
8360 PHYREGS(0x0860, 0x085c, 0x0858, 0x01e9, 0x01ea, 0x01eb),
8361 },
8362 { .freq = 5360,
8363 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x18, 0x05, 0x05, 0x04,
8364 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
8365 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
8366 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77,
8367 0x00, 0x0a, 0x00, 0x6f, 0x00),
8368 PHYREGS(0x0864, 0x0860, 0x085c, 0x01e8, 0x01e9, 0x01ea),
8369 },
8370 { .freq = 5370,
8371 RADIOREGS3(0x75, 0x01, 0x01, 0x02, 0x19, 0x05, 0x05, 0x04,
8372 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0d, 0x00,
8373 0xc9, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
8374 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77,
8375 0x00, 0x0a, 0x00, 0x6f, 0x00),
8376 PHYREGS(0x0868, 0x0864, 0x0860, 0x01e7, 0x01e8, 0x01e9),
8377 },
8378 { .freq = 5380,
8379 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1a, 0x05, 0x05, 0x04,
8380 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
8381 0xb8, 0x95, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
8382 0x00, 0x6f, 0x00, 0x95, 0x00, 0x03, 0x00, 0x77,
8383 0x00, 0x0a, 0x00, 0x6f, 0x00),
8384 PHYREGS(0x086c, 0x0868, 0x0864, 0x01e6, 0x01e7, 0x01e8),
8385 },
8386 { .freq = 5390,
8387 RADIOREGS3(0x6e, 0x01, 0x01, 0x02, 0x1b, 0x05, 0x05, 0x04,
8388 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
8389 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
8390 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77,
8391 0x00, 0x0a, 0x00, 0x6f, 0x00),
8392 PHYREGS(0x0870, 0x086c, 0x0868, 0x01e5, 0x01e6, 0x01e7),
8393 },
8394 { .freq = 5400,
8395 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1c, 0x05, 0x05, 0x04,
8396 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
8397 0xb8, 0x84, 0x00, 0x03, 0x00, 0x77, 0x00, 0x0a,
8398 0x00, 0x6f, 0x00, 0x84, 0x00, 0x03, 0x00, 0x77,
8399 0x00, 0x0a, 0x00, 0x6f, 0x00),
8400 PHYREGS(0x0874, 0x0870, 0x086c, 0x01e5, 0x01e5, 0x01e6),
8401 },
8402 { .freq = 5410,
8403 RADIOREGS3(0x67, 0x01, 0x01, 0x02, 0x1d, 0x05, 0x05, 0x04,
8404 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
8405 0xb7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a,
8406 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
8407 0x00, 0x0a, 0x00, 0x6f, 0x00),
8408 PHYREGS(0x0878, 0x0874, 0x0870, 0x01e4, 0x01e5, 0x01e5),
8409 },
8410 { .freq = 5420,
8411 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1e, 0x05, 0x05, 0x04,
8412 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0c, 0x00,
8413 0xa7, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a,
8414 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
8415 0x00, 0x0a, 0x00, 0x6f, 0x00),
8416 PHYREGS(0x087c, 0x0878, 0x0874, 0x01e3, 0x01e4, 0x01e5),
8417 },
8418 { .freq = 5430,
8419 RADIOREGS3(0x61, 0x01, 0x01, 0x02, 0x1f, 0x05, 0x05, 0x04,
8420 0x0c, 0x01, 0x03, 0x03, 0x03, 0x8c, 0x0b, 0x00,
8421 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x0a,
8422 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
8423 0x00, 0x0a, 0x00, 0x6f, 0x00),
8424 PHYREGS(0x0880, 0x087c, 0x0878, 0x01e2, 0x01e3, 0x01e4),
8425 },
8426 { .freq = 5440,
8427 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x20, 0x05, 0x05, 0x04,
8428 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
8429 0xa6, 0x84, 0x00, 0x02, 0x00, 0x77, 0x00, 0x09,
8430 0x00, 0x6f, 0x00, 0x84, 0x00, 0x02, 0x00, 0x77,
8431 0x00, 0x09, 0x00, 0x6f, 0x00),
8432 PHYREGS(0x0884, 0x0880, 0x087c, 0x01e1, 0x01e2, 0x01e3),
8433 },
8434 { .freq = 5450,
8435 RADIOREGS3(0x5a, 0x01, 0x01, 0x02, 0x21, 0x05, 0x05, 0x04,
8436 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
8437 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09,
8438 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77,
8439 0x00, 0x09, 0x00, 0x6f, 0x00),
8440 PHYREGS(0x0888, 0x0884, 0x0880, 0x01e0, 0x01e1, 0x01e2),
8441 },
8442 { .freq = 5460,
8443 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x22, 0x05, 0x05, 0x04,
8444 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
8445 0x95, 0x84, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09,
8446 0x00, 0x6f, 0x00, 0x84, 0x00, 0x01, 0x00, 0x77,
8447 0x00, 0x09, 0x00, 0x6f, 0x00),
8448 PHYREGS(0x088c, 0x0888, 0x0884, 0x01df, 0x01e0, 0x01e1),
8449 },
8450 { .freq = 5470,
8451 RADIOREGS3(0x53, 0x01, 0x01, 0x02, 0x23, 0x05, 0x05, 0x04,
8452 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8b, 0x0b, 0x00,
8453 0x94, 0x73, 0x00, 0x01, 0x00, 0x77, 0x00, 0x09,
8454 0x00, 0x6f, 0x00, 0x73, 0x00, 0x01, 0x00, 0x77,
8455 0x00, 0x09, 0x00, 0x6f, 0x00),
8456 PHYREGS(0x0890, 0x088c, 0x0888, 0x01de, 0x01df, 0x01e0),
8457 },
8458 { .freq = 5480,
8459 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x24, 0x05, 0x05, 0x04,
8460 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
8461 0x84, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8462 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8463 0x00, 0x09, 0x00, 0x6f, 0x00),
8464 PHYREGS(0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df),
8465 },
8466 { .freq = 5490,
8467 RADIOREGS3(0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04,
8468 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
8469 0x83, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8470 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8471 0x00, 0x09, 0x00, 0x6f, 0x00),
8472 PHYREGS(0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de),
8473 },
8474 { .freq = 5500,
8475 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04,
8476 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
8477 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8478 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8479 0x00, 0x09, 0x00, 0x6f, 0x00),
8480 PHYREGS(0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd),
8481 },
8482 { .freq = 5510,
8483 RADIOREGS3(0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04,
8484 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
8485 0x82, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8486 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8487 0x00, 0x09, 0x00, 0x6f, 0x00),
8488 PHYREGS(0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd),
8489 },
8490 { .freq = 5520,
8491 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04,
8492 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x0a, 0x00,
8493 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8494 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8495 0x00, 0x09, 0x00, 0x6f, 0x00),
8496 PHYREGS(0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc),
8497 },
8498 { .freq = 5530,
8499 RADIOREGS3(0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04,
8500 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00,
8501 0x72, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8502 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8503 0x00, 0x09, 0x00, 0x6f, 0x00),
8504 PHYREGS(0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db),
8505 },
8506 { .freq = 5540,
8507 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04,
8508 0x0c, 0x01, 0x04, 0x04, 0x04, 0x8a, 0x09, 0x00,
8509 0x71, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8510 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8511 0x00, 0x09, 0x00, 0x6f, 0x00),
8512 PHYREGS(0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da),
8513 },
8514 { .freq = 5550,
8515 RADIOREGS3(0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04,
8516 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
8517 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8518 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8519 0x00, 0x09, 0x00, 0x6f, 0x00),
8520 PHYREGS(0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9),
8521 },
8522 { .freq = 5560,
8523 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04,
8524 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
8525 0x61, 0x73, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8526 0x00, 0x6f, 0x00, 0x73, 0x00, 0x00, 0x00, 0x77,
8527 0x00, 0x09, 0x00, 0x6f, 0x00),
8528 PHYREGS(0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8),
8529 },
8530 { .freq = 5570,
8531 RADIOREGS3(0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04,
8532 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x09, 0x00,
8533 0x61, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x09,
8534 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77,
8535 0x00, 0x09, 0x00, 0x6f, 0x00),
8536 PHYREGS(0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7),
8537 },
8538 { .freq = 5580,
8539 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04,
8540 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00,
8541 0x60, 0x62, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
8542 0x00, 0x6f, 0x00, 0x62, 0x00, 0x00, 0x00, 0x77,
8543 0x00, 0x08, 0x00, 0x6f, 0x00),
8544 PHYREGS(0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7),
8545 },
8546 { .freq = 5590,
8547 RADIOREGS3(0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04,
8548 0x0c, 0x01, 0x04, 0x04, 0x04, 0x89, 0x08, 0x00,
8549 0x50, 0x61, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
8550 0x00, 0x6f, 0x00, 0x61, 0x00, 0x00, 0x00, 0x77,
8551 0x00, 0x08, 0x00, 0x6f, 0x00),
8552 PHYREGS(0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6),
8553 },
8554 { .freq = 5600,
8555 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04,
8556 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
8557 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
8558 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77,
8559 0x00, 0x08, 0x00, 0x6f, 0x00),
8560 PHYREGS(0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5),
8561 },
8562 { .freq = 5610,
8563 RADIOREGS3(0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04,
8564 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
8565 0x50, 0x51, 0x00, 0x00, 0x00, 0x77, 0x00, 0x08,
8566 0x00, 0x6f, 0x00, 0x51, 0x00, 0x00, 0x00, 0x77,
8567 0x00, 0x08, 0x00, 0x6f, 0x00),
8568 PHYREGS(0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4),
8569 },
8570 { .freq = 5620,
8571 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04,
8572 0x0c, 0x01, 0x05, 0x05, 0x05, 0x89, 0x08, 0x00,
8573 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
8574 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77,
8575 0x00, 0x07, 0x00, 0x6f, 0x00),
8576 PHYREGS(0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3),
8577 },
8578 { .freq = 5630,
8579 RADIOREGS3(0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04,
8580 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
8581 0x50, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
8582 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77,
8583 0x00, 0x07, 0x00, 0x6f, 0x00),
8584 PHYREGS(0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2),
8585 },
8586 { .freq = 5640,
8587 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04,
8588 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
8589 0x40, 0x50, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
8590 0x00, 0x6f, 0x00, 0x50, 0x00, 0x00, 0x00, 0x77,
8591 0x00, 0x07, 0x00, 0x6f, 0x00),
8592 PHYREGS(0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2),
8593 },
8594 { .freq = 5650,
8595 RADIOREGS3(0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04,
8596 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
8597 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x07,
8598 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77,
8599 0x00, 0x07, 0x00, 0x6f, 0x00),
8600 PHYREGS(0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1),
8601 },
8602 { .freq = 5660,
8603 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04,
8604 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
8605 0x40, 0x40, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8606 0x00, 0x6f, 0x00, 0x40, 0x00, 0x00, 0x00, 0x77,
8607 0x00, 0x06, 0x00, 0x6f, 0x00),
8608 PHYREGS(0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0),
8609 },
8610 { .freq = 5670,
8611 RADIOREGS3(0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04,
8612 0x0c, 0x01, 0x05, 0x05, 0x05, 0x88, 0x07, 0x00,
8613 0x40, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8614 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8615 0x00, 0x06, 0x00, 0x6f, 0x00),
8616 PHYREGS(0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf),
8617 },
8618 { .freq = 5680,
8619 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04,
8620 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
8621 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8622 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8623 0x00, 0x06, 0x00, 0x6f, 0x00),
8624 PHYREGS(0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce),
8625 },
8626 { .freq = 5690,
8627 RADIOREGS3(0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04,
8628 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
8629 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8630 0x00, 0x6f, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8631 0x00, 0x06, 0x00, 0x6f, 0x00),
8632 PHYREGS(0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce),
8633 },
8634 { .freq = 5700,
8635 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04,
8636 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
8637 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8638 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8639 0x00, 0x06, 0x00, 0x6e, 0x00),
8640 PHYREGS(0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd),
8641 },
8642 { .freq = 5710,
8643 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04,
8644 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
8645 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8646 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8647 0x00, 0x06, 0x00, 0x6e, 0x00),
8648 PHYREGS(0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc),
8649 },
8650 { .freq = 5720,
8651 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04,
8652 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
8653 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8654 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8655 0x00, 0x06, 0x00, 0x6e, 0x00),
8656 PHYREGS(0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb),
8657 },
8658 { .freq = 5725,
8659 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04,
8660 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x06, 0x00,
8661 0x30, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8662 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8663 0x00, 0x06, 0x00, 0x6e, 0x00),
8664 PHYREGS(0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb),
8665 },
8666 { .freq = 5730,
8667 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04,
8668 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
8669 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8670 0x00, 0x6e, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8671 0x00, 0x06, 0x00, 0x6e, 0x00),
8672 PHYREGS(0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca),
8673 },
8674 { .freq = 5735,
8675 RADIOREGS3(0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04,
8676 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
8677 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8678 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8679 0x00, 0x06, 0x00, 0x6d, 0x00),
8680 PHYREGS(0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca),
8681 },
8682 { .freq = 5740,
8683 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04,
8684 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
8685 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8686 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8687 0x00, 0x06, 0x00, 0x6d, 0x00),
8688 PHYREGS(0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9),
8689 },
8690 { .freq = 5745,
8691 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04,
8692 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
8693 0x20, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x06,
8694 0x00, 0x6d, 0x00, 0x30, 0x00, 0x00, 0x00, 0x77,
8695 0x00, 0x06, 0x00, 0x6d, 0x00),
8696 PHYREGS(0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9),
8697 },
8698 { .freq = 5750,
8699 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04,
8700 0x0c, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
8701 0x20, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8702 0x00, 0x6d, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77,
8703 0x00, 0x05, 0x00, 0x6d, 0x00),
8704 PHYREGS(0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9),
8705 },
8706 { .freq = 5755,
8707 RADIOREGS3(0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04,
8708 0x10, 0x01, 0x05, 0x05, 0x05, 0x87, 0x05, 0x00,
8709 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8710 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77,
8711 0x00, 0x05, 0x00, 0x6c, 0x00),
8712 PHYREGS(0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8),
8713 },
8714 { .freq = 5760,
8715 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04,
8716 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00,
8717 0x10, 0x20, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8718 0x00, 0x6c, 0x00, 0x20, 0x00, 0x00, 0x00, 0x77,
8719 0x00, 0x05, 0x00, 0x6c, 0x00),
8720 PHYREGS(0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8),
8721 },
8722 { .freq = 5765,
8723 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04,
8724 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x05, 0x00,
8725 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8726 0x00, 0x6c, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
8727 0x00, 0x05, 0x00, 0x6c, 0x00),
8728 PHYREGS(0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8),
8729 },
8730 { .freq = 5770,
8731 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04,
8732 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
8733 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8734 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
8735 0x00, 0x05, 0x00, 0x6b, 0x00),
8736 PHYREGS(0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7),
8737 },
8738 { .freq = 5775,
8739 RADIOREGS3(0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04,
8740 0x10, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
8741 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8742 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
8743 0x00, 0x05, 0x00, 0x6b, 0x00),
8744 PHYREGS(0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7),
8745 },
8746 { .freq = 5780,
8747 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04,
8748 0x0c, 0x01, 0x05, 0x05, 0x05, 0x86, 0x04, 0x00,
8749 0x10, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8750 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
8751 0x00, 0x05, 0x00, 0x6b, 0x00),
8752 PHYREGS(0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6),
8753 },
8754 { .freq = 5785,
8755 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04,
8756 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8757 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8758 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
8759 0x00, 0x05, 0x00, 0x6b, 0x00),
8760 PHYREGS(0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6),
8761 },
8762 { .freq = 5790,
8763 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04,
8764 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8765 0x00, 0x10, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8766 0x00, 0x6b, 0x00, 0x10, 0x00, 0x00, 0x00, 0x77,
8767 0x00, 0x05, 0x00, 0x6b, 0x00),
8768 PHYREGS(0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6),
8769 },
8770 { .freq = 5795,
8771 RADIOREGS3(0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04,
8772 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8773 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8774 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8775 0x00, 0x05, 0x00, 0x6b, 0x00),
8776 PHYREGS(0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5),
8777 },
8778 { .freq = 5800,
8779 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04,
8780 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8781 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8782 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8783 0x00, 0x05, 0x00, 0x6b, 0x00),
8784 PHYREGS(0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5),
8785 },
8786 { .freq = 5805,
8787 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04,
8788 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8789 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8790 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8791 0x00, 0x05, 0x00, 0x6a, 0x00),
8792 PHYREGS(0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4),
8793 },
8794 { .freq = 5810,
8795 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04,
8796 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8797 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8798 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8799 0x00, 0x05, 0x00, 0x6a, 0x00),
8800 PHYREGS(0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4),
8801 },
8802 { .freq = 5815,
8803 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04,
8804 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8805 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8806 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8807 0x00, 0x05, 0x00, 0x6a, 0x00),
8808 PHYREGS(0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4),
8809 },
8810 { .freq = 5820,
8811 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04,
8812 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8813 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8814 0x00, 0x6a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8815 0x00, 0x05, 0x00, 0x6a, 0x00),
8816 PHYREGS(0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3),
8817 },
8818 { .freq = 5825,
8819 RADIOREGS3(0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04,
8820 0x10, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8821 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8822 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8823 0x00, 0x05, 0x00, 0x69, 0x00),
8824 PHYREGS(0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3),
8825 },
8826 { .freq = 5830,
8827 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04,
8828 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8829 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x05,
8830 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8831 0x00, 0x05, 0x00, 0x69, 0x00),
8832 PHYREGS(0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2),
8833 },
8834 { .freq = 5840,
8835 RADIOREGS3(0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04,
8836 0x0c, 0x01, 0x06, 0x06, 0x06, 0x86, 0x04, 0x00,
8837 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8838 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8839 0x00, 0x04, 0x00, 0x69, 0x00),
8840 PHYREGS(0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2),
8841 },
8842 { .freq = 5850,
8843 RADIOREGS3(0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04,
8844 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
8845 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8846 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8847 0x00, 0x04, 0x00, 0x69, 0x00),
8848 PHYREGS(0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1),
8849 },
8850 { .freq = 5860,
8851 RADIOREGS3(0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04,
8852 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
8853 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8854 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8855 0x00, 0x04, 0x00, 0x69, 0x00),
8856 PHYREGS(0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0),
8857 },
8858 { .freq = 5870,
8859 RADIOREGS3(0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04,
8860 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
8861 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8862 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8863 0x00, 0x04, 0x00, 0x68, 0x00),
8864 PHYREGS(0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf),
8865 },
8866 { .freq = 5880,
8867 RADIOREGS3(0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04,
8868 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
8869 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8870 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8871 0x00, 0x04, 0x00, 0x68, 0x00),
8872 PHYREGS(0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf),
8873 },
8874 { .freq = 5890,
8875 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04,
8876 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
8877 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8878 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8879 0x00, 0x04, 0x00, 0x68, 0x00),
8880 PHYREGS(0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be),
8881 },
8882 { .freq = 5900,
8883 RADIOREGS3(0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04,
8884 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
8885 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8886 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8887 0x00, 0x04, 0x00, 0x68, 0x00),
8888 PHYREGS(0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd),
8889 },
8890 { .freq = 5910,
8891 RADIOREGS3(0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04,
8892 0x0c, 0x01, 0x06, 0x06, 0x06, 0x85, 0x03, 0x00,
8893 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04,
8894 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77,
8895 0x00, 0x04, 0x00, 0x68, 0x00),
8896 PHYREGS(0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc),
8897 },
8898 { .freq = 2412,
8899 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04,
8900 0x16, 0x01, 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00,
8901 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00,
8902 0x0b, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00,
8903 0x70, 0x00, 0x0b, 0x00, 0x0a),
8904 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
8905 },
8906 { .freq = 2417,
8907 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04,
8908 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
8909 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00,
8910 0x0b, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00,
8911 0x70, 0x00, 0x0b, 0x00, 0x0a),
8912 PHYREGS(0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441),
8913 },
8914 { .freq = 2422,
8915 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04,
8916 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
8917 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00,
8918 0x0b, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00,
8919 0x70, 0x00, 0x0b, 0x00, 0x0a),
8920 PHYREGS(0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f),
8921 },
8922 { .freq = 2427,
8923 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04,
8924 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
8925 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00,
8926 0x0a, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00,
8927 0x70, 0x00, 0x0a, 0x00, 0x0a),
8928 PHYREGS(0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d),
8929 },
8930 { .freq = 2432,
8931 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04,
8932 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
8933 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00,
8934 0x0a, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00,
8935 0x70, 0x00, 0x0a, 0x00, 0x0a),
8936 PHYREGS(0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a),
8937 },
8938 { .freq = 2437,
8939 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04,
8940 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
8941 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00,
8942 0x0a, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00,
8943 0x70, 0x00, 0x0a, 0x00, 0x0a),
8944 PHYREGS(0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438),
8945 },
8946 { .freq = 2442,
8947 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04,
8948 0x16, 0x01, 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00,
8949 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00,
8950 0x0a, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x02, 0x00,
8951 0x70, 0x00, 0x0a, 0x00, 0x0a),
8952 PHYREGS(0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436),
8953 },
8954 { .freq = 2447,
8955 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04,
8956 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
8957 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00,
8958 0x0a, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00,
8959 0x70, 0x00, 0x0a, 0x00, 0x09),
8960 PHYREGS(0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434),
8961 },
8962 { .freq = 2452,
8963 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04,
8964 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
8965 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00,
8966 0x0a, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00,
8967 0x70, 0x00, 0x0a, 0x00, 0x09),
8968 PHYREGS(0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431),
8969 },
8970 { .freq = 2457,
8971 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04,
8972 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
8973 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00,
8974 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00,
8975 0x70, 0x00, 0x0a, 0x00, 0x09),
8976 PHYREGS(0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f),
8977 },
8978 { .freq = 2462,
8979 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04,
8980 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
8981 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00,
8982 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00,
8983 0x70, 0x00, 0x09, 0x00, 0x09),
8984 PHYREGS(0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d),
8985 },
8986 { .freq = 2467,
8987 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04,
8988 0x16, 0x01, 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00,
8989 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00,
8990 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00,
8991 0x70, 0x00, 0x09, 0x00, 0x09),
8992 PHYREGS(0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b),
8993 },
8994 { .freq = 2472,
8995 RADIOREGS3(0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04,
8996 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00,
8997 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00,
8998 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00,
8999 0x70, 0x00, 0x09, 0x00, 0x09),
9000 PHYREGS(0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429),
9001 },
9002 { .freq = 2484,
9003 RADIOREGS3(0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04,
9004 0x16, 0x01, 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00,
9005 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00,
9006 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00,
9007 0x70, 0x00, 0x09, 0x00, 0x09),
9008 PHYREGS(0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424),
9009 },
9010};
9011
9012static void b2056_upload_inittab(struct b43_wldev *dev, bool ghz5,
9013 bool ignore_uploadflag, u16 routing,
9014 const struct b2056_inittab_entry *e,
9015 unsigned int length)
9016{
9017 unsigned int i;
9018 u16 value;
9019
9020 for (i = 0; i < length; i++, e++) {
9021 if (!(e->flags & B2056_INITTAB_ENTRY_OK))
9022 continue;
9023 if ((e->flags & B2056_INITTAB_UPLOAD) || ignore_uploadflag) {
9024 if (ghz5)
9025 value = e->ghz5;
9026 else
9027 value = e->ghz2;
9028 b43_radio_write(dev, routing | i, value);
9029 }
9030 }
9031}
9032
9033void b2056_upload_inittabs(struct b43_wldev *dev,
9034 bool ghz5, bool ignore_uploadflag)
9035{
9036 struct b2056_inittabs_pts *pts;
9037
9038 if (dev->phy.rev >= ARRAY_SIZE(b2056_inittabs)) {
9039 B43_WARN_ON(1);
9040 return;
9041 }
9042 pts = &b2056_inittabs[dev->phy.rev];
9043
9044 b2056_upload_inittab(dev, ghz5, ignore_uploadflag,
9045 B2056_SYN, pts->syn, pts->syn_length);
9046 b2056_upload_inittab(dev, ghz5, ignore_uploadflag,
9047 B2056_TX0, pts->tx, pts->tx_length);
9048 b2056_upload_inittab(dev, ghz5, ignore_uploadflag,
9049 B2056_TX1, pts->tx, pts->tx_length);
9050 b2056_upload_inittab(dev, ghz5, ignore_uploadflag,
9051 B2056_RX0, pts->rx, pts->rx_length);
9052 b2056_upload_inittab(dev, ghz5, ignore_uploadflag,
9053 B2056_RX1, pts->rx, pts->rx_length);
9054}
9055
9056const struct b43_nphy_channeltab_entry_rev3 *
9057b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq)
9058{
9059 const struct b43_nphy_channeltab_entry_rev3 *e;
9060 unsigned int length, i;
9061
9062 switch (dev->phy.rev) {
9063 case 3:
9064 e = b43_nphy_channeltab_rev3;
9065 length = ARRAY_SIZE(b43_nphy_channeltab_rev3);
9066 break;
9067 case 4:
9068 e = b43_nphy_channeltab_rev4;
9069 length = ARRAY_SIZE(b43_nphy_channeltab_rev4);
9070 break;
9071 case 5:
9072 e = b43_nphy_channeltab_rev5;
9073 length = ARRAY_SIZE(b43_nphy_channeltab_rev5);
9074 break;
9075 case 6:
9076 e = b43_nphy_channeltab_rev6;
9077 length = ARRAY_SIZE(b43_nphy_channeltab_rev6);
9078 break;
9079 case 7:
9080 case 9:
9081 e = b43_nphy_channeltab_rev7_9;
9082 length = ARRAY_SIZE(b43_nphy_channeltab_rev7_9);
9083 break;
9084 case 8:
9085 e = b43_nphy_channeltab_rev8;
9086 length = ARRAY_SIZE(b43_nphy_channeltab_rev8);
9087 break;
9088 default:
9089 B43_WARN_ON(1);
9090 return NULL;
9091 }
9092
9093 for (i = 0; i < length; i++, e++) {
9094 if (e->freq == freq)
9095 return e;
9096 }
9097
9098 return NULL;
9099}
diff --git a/drivers/net/wireless/b43/radio_2056.h b/drivers/net/wireless/b43/radio_2056.h
new file mode 100644
index 000000000000..d601f6e7e313
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2056.h
@@ -0,0 +1,1120 @@
1/*
2
3 Broadcom B43 wireless driver
4
5 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
6
7 Some parts of the code in this file are derived from the brcm80211
8 driver Copyright (c) 2010 Broadcom Corporation
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; see the file COPYING. If not, write to
22 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
23 Boston, MA 02110-1301, USA.
24
25*/
26
27#ifndef B43_RADIO_2056_H_
28#define B43_RADIO_2056_H_
29
30#include <linux/types.h>
31
32#include "tables_nphy.h"
33
34#define B2056_SYN (0x0 << 12)
35#define B2056_TX0 (0x2 << 12)
36#define B2056_TX1 (0x3 << 12)
37#define B2056_RX0 (0x6 << 12)
38#define B2056_RX1 (0x7 << 12)
39#define B2056_ALLTX (0xE << 12)
40#define B2056_ALLRX (0xF << 12)
41
42#define B2056_SYN_RESERVED_ADDR0 0x00
43#define B2056_SYN_IDCODE 0x01
44#define B2056_SYN_RESERVED_ADDR2 0x02
45#define B2056_SYN_RESERVED_ADDR3 0x03
46#define B2056_SYN_RESERVED_ADDR4 0x04
47#define B2056_SYN_RESERVED_ADDR5 0x05
48#define B2056_SYN_RESERVED_ADDR6 0x06
49#define B2056_SYN_RESERVED_ADDR7 0x07
50#define B2056_SYN_COM_CTRL 0x08
51#define B2056_SYN_COM_PU 0x09
52#define B2056_SYN_COM_OVR 0x0A
53#define B2056_SYN_COM_RESET 0x0B
54#define B2056_SYN_COM_RCAL 0x0C
55#define B2056_SYN_COM_RC_RXLPF 0x0D
56#define B2056_SYN_COM_RC_TXLPF 0x0E
57#define B2056_SYN_COM_RC_RXHPF 0x0F
58#define B2056_SYN_RESERVED_ADDR16 0x10
59#define B2056_SYN_RESERVED_ADDR17 0x11
60#define B2056_SYN_RESERVED_ADDR18 0x12
61#define B2056_SYN_RESERVED_ADDR19 0x13
62#define B2056_SYN_RESERVED_ADDR20 0x14
63#define B2056_SYN_RESERVED_ADDR21 0x15
64#define B2056_SYN_RESERVED_ADDR22 0x16
65#define B2056_SYN_RESERVED_ADDR23 0x17
66#define B2056_SYN_RESERVED_ADDR24 0x18
67#define B2056_SYN_RESERVED_ADDR25 0x19
68#define B2056_SYN_RESERVED_ADDR26 0x1A
69#define B2056_SYN_RESERVED_ADDR27 0x1B
70#define B2056_SYN_RESERVED_ADDR28 0x1C
71#define B2056_SYN_RESERVED_ADDR29 0x1D
72#define B2056_SYN_RESERVED_ADDR30 0x1E
73#define B2056_SYN_RESERVED_ADDR31 0x1F
74#define B2056_SYN_GPIO_MASTER1 0x20
75#define B2056_SYN_GPIO_MASTER2 0x21
76#define B2056_SYN_TOPBIAS_MASTER 0x22
77#define B2056_SYN_TOPBIAS_RCAL 0x23
78#define B2056_SYN_AFEREG 0x24
79#define B2056_SYN_TEMPPROCSENSE 0x25
80#define B2056_SYN_TEMPPROCSENSEIDAC 0x26
81#define B2056_SYN_TEMPPROCSENSERCAL 0x27
82#define B2056_SYN_LPO 0x28
83#define B2056_SYN_VDDCAL_MASTER 0x29
84#define B2056_SYN_VDDCAL_IDAC 0x2A
85#define B2056_SYN_VDDCAL_STATUS 0x2B
86#define B2056_SYN_RCAL_MASTER 0x2C
87#define B2056_SYN_RCAL_CODE_OUT 0x2D
88#define B2056_SYN_RCCAL_CTRL0 0x2E
89#define B2056_SYN_RCCAL_CTRL1 0x2F
90#define B2056_SYN_RCCAL_CTRL2 0x30
91#define B2056_SYN_RCCAL_CTRL3 0x31
92#define B2056_SYN_RCCAL_CTRL4 0x32
93#define B2056_SYN_RCCAL_CTRL5 0x33
94#define B2056_SYN_RCCAL_CTRL6 0x34
95#define B2056_SYN_RCCAL_CTRL7 0x35
96#define B2056_SYN_RCCAL_CTRL8 0x36
97#define B2056_SYN_RCCAL_CTRL9 0x37
98#define B2056_SYN_RCCAL_CTRL10 0x38
99#define B2056_SYN_RCCAL_CTRL11 0x39
100#define B2056_SYN_ZCAL_SPARE1 0x3A
101#define B2056_SYN_ZCAL_SPARE2 0x3B
102#define B2056_SYN_PLL_MAST1 0x3C
103#define B2056_SYN_PLL_MAST2 0x3D
104#define B2056_SYN_PLL_MAST3 0x3E
105#define B2056_SYN_PLL_BIAS_RESET 0x3F
106#define B2056_SYN_PLL_XTAL0 0x40
107#define B2056_SYN_PLL_XTAL1 0x41
108#define B2056_SYN_PLL_XTAL3 0x42
109#define B2056_SYN_PLL_XTAL4 0x43
110#define B2056_SYN_PLL_XTAL5 0x44
111#define B2056_SYN_PLL_XTAL6 0x45
112#define B2056_SYN_PLL_REFDIV 0x46
113#define B2056_SYN_PLL_PFD 0x47
114#define B2056_SYN_PLL_CP1 0x48
115#define B2056_SYN_PLL_CP2 0x49
116#define B2056_SYN_PLL_CP3 0x4A
117#define B2056_SYN_PLL_LOOPFILTER1 0x4B
118#define B2056_SYN_PLL_LOOPFILTER2 0x4C
119#define B2056_SYN_PLL_LOOPFILTER3 0x4D
120#define B2056_SYN_PLL_LOOPFILTER4 0x4E
121#define B2056_SYN_PLL_LOOPFILTER5 0x4F
122#define B2056_SYN_PLL_MMD1 0x50
123#define B2056_SYN_PLL_MMD2 0x51
124#define B2056_SYN_PLL_VCO1 0x52
125#define B2056_SYN_PLL_VCO2 0x53
126#define B2056_SYN_PLL_MONITOR1 0x54
127#define B2056_SYN_PLL_MONITOR2 0x55
128#define B2056_SYN_PLL_VCOCAL1 0x56
129#define B2056_SYN_PLL_VCOCAL2 0x57
130#define B2056_SYN_PLL_VCOCAL4 0x58
131#define B2056_SYN_PLL_VCOCAL5 0x59
132#define B2056_SYN_PLL_VCOCAL6 0x5A
133#define B2056_SYN_PLL_VCOCAL7 0x5B
134#define B2056_SYN_PLL_VCOCAL8 0x5C
135#define B2056_SYN_PLL_VCOCAL9 0x5D
136#define B2056_SYN_PLL_VCOCAL10 0x5E
137#define B2056_SYN_PLL_VCOCAL11 0x5F
138#define B2056_SYN_PLL_VCOCAL12 0x60
139#define B2056_SYN_PLL_VCOCAL13 0x61
140#define B2056_SYN_PLL_VREG 0x62
141#define B2056_SYN_PLL_STATUS1 0x63
142#define B2056_SYN_PLL_STATUS2 0x64
143#define B2056_SYN_PLL_STATUS3 0x65
144#define B2056_SYN_LOGEN_PU0 0x66
145#define B2056_SYN_LOGEN_PU1 0x67
146#define B2056_SYN_LOGEN_PU2 0x68
147#define B2056_SYN_LOGEN_PU3 0x69
148#define B2056_SYN_LOGEN_PU5 0x6A
149#define B2056_SYN_LOGEN_PU6 0x6B
150#define B2056_SYN_LOGEN_PU7 0x6C
151#define B2056_SYN_LOGEN_PU8 0x6D
152#define B2056_SYN_LOGEN_BIAS_RESET 0x6E
153#define B2056_SYN_LOGEN_RCCR1 0x6F
154#define B2056_SYN_LOGEN_VCOBUF1 0x70
155#define B2056_SYN_LOGEN_MIXER1 0x71
156#define B2056_SYN_LOGEN_MIXER2 0x72
157#define B2056_SYN_LOGEN_BUF1 0x73
158#define B2056_SYN_LOGENBUF2 0x74
159#define B2056_SYN_LOGEN_BUF3 0x75
160#define B2056_SYN_LOGEN_BUF4 0x76
161#define B2056_SYN_LOGEN_DIV1 0x77
162#define B2056_SYN_LOGEN_DIV2 0x78
163#define B2056_SYN_LOGEN_DIV3 0x79
164#define B2056_SYN_LOGEN_ACL1 0x7A
165#define B2056_SYN_LOGEN_ACL2 0x7B
166#define B2056_SYN_LOGEN_ACL3 0x7C
167#define B2056_SYN_LOGEN_ACL4 0x7D
168#define B2056_SYN_LOGEN_ACL5 0x7E
169#define B2056_SYN_LOGEN_ACL6 0x7F
170#define B2056_SYN_LOGEN_ACLOUT 0x80
171#define B2056_SYN_LOGEN_ACLCAL1 0x81
172#define B2056_SYN_LOGEN_ACLCAL2 0x82
173#define B2056_SYN_LOGEN_ACLCAL3 0x83
174#define B2056_SYN_CALEN 0x84
175#define B2056_SYN_LOGEN_PEAKDET1 0x85
176#define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86
177#define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87
178#define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88
179#define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89
180#define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A
181#define B2056_SYN_LOGEN_VCOBUF2 0x8B
182#define B2056_SYN_LOGEN_MIXER3 0x8C
183#define B2056_SYN_LOGEN_BUF5 0x8D
184#define B2056_SYN_LOGEN_BUF6 0x8E
185#define B2056_SYN_LOGEN_CBUFRX1 0x8F
186#define B2056_SYN_LOGEN_CBUFRX2 0x90
187#define B2056_SYN_LOGEN_CBUFRX3 0x91
188#define B2056_SYN_LOGEN_CBUFRX4 0x92
189#define B2056_SYN_LOGEN_CBUFTX1 0x93
190#define B2056_SYN_LOGEN_CBUFTX2 0x94
191#define B2056_SYN_LOGEN_CBUFTX3 0x95
192#define B2056_SYN_LOGEN_CBUFTX4 0x96
193#define B2056_SYN_LOGEN_CMOSRX1 0x97
194#define B2056_SYN_LOGEN_CMOSRX2 0x98
195#define B2056_SYN_LOGEN_CMOSRX3 0x99
196#define B2056_SYN_LOGEN_CMOSRX4 0x9A
197#define B2056_SYN_LOGEN_CMOSTX1 0x9B
198#define B2056_SYN_LOGEN_CMOSTX2 0x9C
199#define B2056_SYN_LOGEN_CMOSTX3 0x9D
200#define B2056_SYN_LOGEN_CMOSTX4 0x9E
201#define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F
202#define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0
203#define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1
204#define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2
205#define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3
206#define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4
207#define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5
208#define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6
209#define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7
210#define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8
211#define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9
212#define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA
213#define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB
214#define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC
215#define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD
216#define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE
217#define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF
218#define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0
219#define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1
220#define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2
221#define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3
222#define B2056_SYN_LOGEN_CORE_CALVALID 0xB4
223#define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5
224#define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6
225
226#define B2056_TX_RESERVED_ADDR0 0x00
227#define B2056_TX_IDCODE 0x01
228#define B2056_TX_RESERVED_ADDR2 0x02
229#define B2056_TX_RESERVED_ADDR3 0x03
230#define B2056_TX_RESERVED_ADDR4 0x04
231#define B2056_TX_RESERVED_ADDR5 0x05
232#define B2056_TX_RESERVED_ADDR6 0x06
233#define B2056_TX_RESERVED_ADDR7 0x07
234#define B2056_TX_COM_CTRL 0x08
235#define B2056_TX_COM_PU 0x09
236#define B2056_TX_COM_OVR 0x0A
237#define B2056_TX_COM_RESET 0x0B
238#define B2056_TX_COM_RCAL 0x0C
239#define B2056_TX_COM_RC_RXLPF 0x0D
240#define B2056_TX_COM_RC_TXLPF 0x0E
241#define B2056_TX_COM_RC_RXHPF 0x0F
242#define B2056_TX_RESERVED_ADDR16 0x10
243#define B2056_TX_RESERVED_ADDR17 0x11
244#define B2056_TX_RESERVED_ADDR18 0x12
245#define B2056_TX_RESERVED_ADDR19 0x13
246#define B2056_TX_RESERVED_ADDR20 0x14
247#define B2056_TX_RESERVED_ADDR21 0x15
248#define B2056_TX_RESERVED_ADDR22 0x16
249#define B2056_TX_RESERVED_ADDR23 0x17
250#define B2056_TX_RESERVED_ADDR24 0x18
251#define B2056_TX_RESERVED_ADDR25 0x19
252#define B2056_TX_RESERVED_ADDR26 0x1A
253#define B2056_TX_RESERVED_ADDR27 0x1B
254#define B2056_TX_RESERVED_ADDR28 0x1C
255#define B2056_TX_RESERVED_ADDR29 0x1D
256#define B2056_TX_RESERVED_ADDR30 0x1E
257#define B2056_TX_RESERVED_ADDR31 0x1F
258#define B2056_TX_IQCAL_GAIN_BW 0x20
259#define B2056_TX_LOFT_FINE_I 0x21
260#define B2056_TX_LOFT_FINE_Q 0x22
261#define B2056_TX_LOFT_COARSE_I 0x23
262#define B2056_TX_LOFT_COARSE_Q 0x24
263#define B2056_TX_TX_COM_MASTER1 0x25
264#define B2056_TX_TX_COM_MASTER2 0x26
265#define B2056_TX_RXIQCAL_TXMUX 0x27
266#define B2056_TX_TX_SSI_MASTER 0x28
267#define B2056_TX_IQCAL_VCM_HG 0x29
268#define B2056_TX_IQCAL_IDAC 0x2A
269#define B2056_TX_TSSI_VCM 0x2B
270#define B2056_TX_TX_AMP_DET 0x2C
271#define B2056_TX_TX_SSI_MUX 0x2D
272#define B2056_TX_TSSIA 0x2E
273#define B2056_TX_TSSIG 0x2F
274#define B2056_TX_TSSI_MISC1 0x30
275#define B2056_TX_TSSI_MISC2 0x31
276#define B2056_TX_TSSI_MISC3 0x32
277#define B2056_TX_PA_SPARE1 0x33
278#define B2056_TX_PA_SPARE2 0x34
279#define B2056_TX_INTPAA_MASTER 0x35
280#define B2056_TX_INTPAA_GAIN 0x36
281#define B2056_TX_INTPAA_BOOST_TUNE 0x37
282#define B2056_TX_INTPAA_IAUX_STAT 0x38
283#define B2056_TX_INTPAA_IAUX_DYN 0x39
284#define B2056_TX_INTPAA_IMAIN_STAT 0x3A
285#define B2056_TX_INTPAA_IMAIN_DYN 0x3B
286#define B2056_TX_INTPAA_CASCBIAS 0x3C
287#define B2056_TX_INTPAA_PASLOPE 0x3D
288#define B2056_TX_INTPAA_PA_MISC 0x3E
289#define B2056_TX_INTPAG_MASTER 0x3F
290#define B2056_TX_INTPAG_GAIN 0x40
291#define B2056_TX_INTPAG_BOOST_TUNE 0x41
292#define B2056_TX_INTPAG_IAUX_STAT 0x42
293#define B2056_TX_INTPAG_IAUX_DYN 0x43
294#define B2056_TX_INTPAG_IMAIN_STAT 0x44
295#define B2056_TX_INTPAG_IMAIN_DYN 0x45
296#define B2056_TX_INTPAG_CASCBIAS 0x46
297#define B2056_TX_INTPAG_PASLOPE 0x47
298#define B2056_TX_INTPAG_PA_MISC 0x48
299#define B2056_TX_PADA_MASTER 0x49
300#define B2056_TX_PADA_IDAC 0x4A
301#define B2056_TX_PADA_CASCBIAS 0x4B
302#define B2056_TX_PADA_GAIN 0x4C
303#define B2056_TX_PADA_BOOST_TUNE 0x4D
304#define B2056_TX_PADA_SLOPE 0x4E
305#define B2056_TX_PADG_MASTER 0x4F
306#define B2056_TX_PADG_IDAC 0x50
307#define B2056_TX_PADG_CASCBIAS 0x51
308#define B2056_TX_PADG_GAIN 0x52
309#define B2056_TX_PADG_BOOST_TUNE 0x53
310#define B2056_TX_PADG_SLOPE 0x54
311#define B2056_TX_PGAA_MASTER 0x55
312#define B2056_TX_PGAA_IDAC 0x56
313#define B2056_TX_PGAA_GAIN 0x57
314#define B2056_TX_PGAA_BOOST_TUNE 0x58
315#define B2056_TX_PGAA_SLOPE 0x59
316#define B2056_TX_PGAA_MISC 0x5A
317#define B2056_TX_PGAG_MASTER 0x5B
318#define B2056_TX_PGAG_IDAC 0x5C
319#define B2056_TX_PGAG_GAIN 0x5D
320#define B2056_TX_PGAG_BOOST_TUNE 0x5E
321#define B2056_TX_PGAG_SLOPE 0x5F
322#define B2056_TX_PGAG_MISC 0x60
323#define B2056_TX_MIXA_MASTER 0x61
324#define B2056_TX_MIXA_BOOST_TUNE 0x62
325#define B2056_TX_MIXG 0x63
326#define B2056_TX_MIXG_BOOST_TUNE 0x64
327#define B2056_TX_BB_GM_MASTER 0x65
328#define B2056_TX_GMBB_GM 0x66
329#define B2056_TX_GMBB_IDAC 0x67
330#define B2056_TX_TXLPF_MASTER 0x68
331#define B2056_TX_TXLPF_RCCAL 0x69
332#define B2056_TX_TXLPF_RCCAL_OFF0 0x6A
333#define B2056_TX_TXLPF_RCCAL_OFF1 0x6B
334#define B2056_TX_TXLPF_RCCAL_OFF2 0x6C
335#define B2056_TX_TXLPF_RCCAL_OFF3 0x6D
336#define B2056_TX_TXLPF_RCCAL_OFF4 0x6E
337#define B2056_TX_TXLPF_RCCAL_OFF5 0x6F
338#define B2056_TX_TXLPF_RCCAL_OFF6 0x70
339#define B2056_TX_TXLPF_BW 0x71
340#define B2056_TX_TXLPF_GAIN 0x72
341#define B2056_TX_TXLPF_IDAC 0x73
342#define B2056_TX_TXLPF_IDAC_0 0x74
343#define B2056_TX_TXLPF_IDAC_1 0x75
344#define B2056_TX_TXLPF_IDAC_2 0x76
345#define B2056_TX_TXLPF_IDAC_3 0x77
346#define B2056_TX_TXLPF_IDAC_4 0x78
347#define B2056_TX_TXLPF_IDAC_5 0x79
348#define B2056_TX_TXLPF_IDAC_6 0x7A
349#define B2056_TX_TXLPF_OPAMP_IDAC 0x7B
350#define B2056_TX_TXLPF_MISC 0x7C
351#define B2056_TX_TXSPARE1 0x7D
352#define B2056_TX_TXSPARE2 0x7E
353#define B2056_TX_TXSPARE3 0x7F
354#define B2056_TX_TXSPARE4 0x80
355#define B2056_TX_TXSPARE5 0x81
356#define B2056_TX_TXSPARE6 0x82
357#define B2056_TX_TXSPARE7 0x83
358#define B2056_TX_TXSPARE8 0x84
359#define B2056_TX_TXSPARE9 0x85
360#define B2056_TX_TXSPARE10 0x86
361#define B2056_TX_TXSPARE11 0x87
362#define B2056_TX_TXSPARE12 0x88
363#define B2056_TX_TXSPARE13 0x89
364#define B2056_TX_TXSPARE14 0x8A
365#define B2056_TX_TXSPARE15 0x8B
366#define B2056_TX_TXSPARE16 0x8C
367#define B2056_TX_STATUS_INTPA_GAIN 0x8D
368#define B2056_TX_STATUS_PAD_GAIN 0x8E
369#define B2056_TX_STATUS_PGA_GAIN 0x8F
370#define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90
371#define B2056_TX_STATUS_TXLPF_BW 0x91
372#define B2056_TX_STATUS_TXLPF_RC 0x92
373#define B2056_TX_GMBB_IDAC0 0x93
374#define B2056_TX_GMBB_IDAC1 0x94
375#define B2056_TX_GMBB_IDAC2 0x95
376#define B2056_TX_GMBB_IDAC3 0x96
377#define B2056_TX_GMBB_IDAC4 0x97
378#define B2056_TX_GMBB_IDAC5 0x98
379#define B2056_TX_GMBB_IDAC6 0x99
380#define B2056_TX_GMBB_IDAC7 0x9A
381
382#define B2056_RX_RESERVED_ADDR0 0x00
383#define B2056_RX_IDCODE 0x01
384#define B2056_RX_RESERVED_ADDR2 0x02
385#define B2056_RX_RESERVED_ADDR3 0x03
386#define B2056_RX_RESERVED_ADDR4 0x04
387#define B2056_RX_RESERVED_ADDR5 0x05
388#define B2056_RX_RESERVED_ADDR6 0x06
389#define B2056_RX_RESERVED_ADDR7 0x07
390#define B2056_RX_COM_CTRL 0x08
391#define B2056_RX_COM_PU 0x09
392#define B2056_RX_COM_OVR 0x0A
393#define B2056_RX_COM_RESET 0x0B
394#define B2056_RX_COM_RCAL 0x0C
395#define B2056_RX_COM_RC_RXLPF 0x0D
396#define B2056_RX_COM_RC_TXLPF 0x0E
397#define B2056_RX_COM_RC_RXHPF 0x0F
398#define B2056_RX_RESERVED_ADDR16 0x10
399#define B2056_RX_RESERVED_ADDR17 0x11
400#define B2056_RX_RESERVED_ADDR18 0x12
401#define B2056_RX_RESERVED_ADDR19 0x13
402#define B2056_RX_RESERVED_ADDR20 0x14
403#define B2056_RX_RESERVED_ADDR21 0x15
404#define B2056_RX_RESERVED_ADDR22 0x16
405#define B2056_RX_RESERVED_ADDR23 0x17
406#define B2056_RX_RESERVED_ADDR24 0x18
407#define B2056_RX_RESERVED_ADDR25 0x19
408#define B2056_RX_RESERVED_ADDR26 0x1A
409#define B2056_RX_RESERVED_ADDR27 0x1B
410#define B2056_RX_RESERVED_ADDR28 0x1C
411#define B2056_RX_RESERVED_ADDR29 0x1D
412#define B2056_RX_RESERVED_ADDR30 0x1E
413#define B2056_RX_RESERVED_ADDR31 0x1F
414#define B2056_RX_RXIQCAL_RXMUX 0x20
415#define B2056_RX_RSSI_PU 0x21
416#define B2056_RX_RSSI_SEL 0x22
417#define B2056_RX_RSSI_GAIN 0x23
418#define B2056_RX_RSSI_NB_IDAC 0x24
419#define B2056_RX_RSSI_WB2I_IDAC_1 0x25
420#define B2056_RX_RSSI_WB2I_IDAC_2 0x26
421#define B2056_RX_RSSI_WB2Q_IDAC_1 0x27
422#define B2056_RX_RSSI_WB2Q_IDAC_2 0x28
423#define B2056_RX_RSSI_POLE 0x29
424#define B2056_RX_RSSI_WB1_IDAC 0x2A
425#define B2056_RX_RSSI_MISC 0x2B
426#define B2056_RX_LNAA_MASTER 0x2C
427#define B2056_RX_LNAA_TUNE 0x2D
428#define B2056_RX_LNAA_GAIN 0x2E
429#define B2056_RX_LNA_A_SLOPE 0x2F
430#define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30
431#define B2056_RX_LNAA2_IDAC 0x31
432#define B2056_RX_LNA1A_MISC 0x32
433#define B2056_RX_LNAG_MASTER 0x33
434#define B2056_RX_LNAG_TUNE 0x34
435#define B2056_RX_LNAG_GAIN 0x35
436#define B2056_RX_LNA_G_SLOPE 0x36
437#define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37
438#define B2056_RX_LNAG2_IDAC 0x38
439#define B2056_RX_LNA1G_MISC 0x39
440#define B2056_RX_MIXA_MASTER 0x3A
441#define B2056_RX_MIXA_VCM 0x3B
442#define B2056_RX_MIXA_CTRLPTAT 0x3C
443#define B2056_RX_MIXA_LOB_BIAS 0x3D
444#define B2056_RX_MIXA_CORE_IDAC 0x3E
445#define B2056_RX_MIXA_CMFB_IDAC 0x3F
446#define B2056_RX_MIXA_BIAS_AUX 0x40
447#define B2056_RX_MIXA_BIAS_MAIN 0x41
448#define B2056_RX_MIXA_BIAS_MISC 0x42
449#define B2056_RX_MIXA_MAST_BIAS 0x43
450#define B2056_RX_MIXG_MASTER 0x44
451#define B2056_RX_MIXG_VCM 0x45
452#define B2056_RX_MIXG_CTRLPTAT 0x46
453#define B2056_RX_MIXG_LOB_BIAS 0x47
454#define B2056_RX_MIXG_CORE_IDAC 0x48
455#define B2056_RX_MIXG_CMFB_IDAC 0x49
456#define B2056_RX_MIXG_BIAS_AUX 0x4A
457#define B2056_RX_MIXG_BIAS_MAIN 0x4B
458#define B2056_RX_MIXG_BIAS_MISC 0x4C
459#define B2056_RX_MIXG_MAST_BIAS 0x4D
460#define B2056_RX_TIA_MASTER 0x4E
461#define B2056_RX_TIA_IOPAMP 0x4F
462#define B2056_RX_TIA_QOPAMP 0x50
463#define B2056_RX_TIA_IMISC 0x51
464#define B2056_RX_TIA_QMISC 0x52
465#define B2056_RX_TIA_GAIN 0x53
466#define B2056_RX_TIA_SPARE1 0x54
467#define B2056_RX_TIA_SPARE2 0x55
468#define B2056_RX_BB_LPF_MASTER 0x56
469#define B2056_RX_AACI_MASTER 0x57
470#define B2056_RX_RXLPF_IDAC 0x58
471#define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59
472#define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A
473#define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B
474#define B2056_RX_RXLPF_OUTVCM 0x5C
475#define B2056_RX_RXLPF_INVCM_BODY 0x5D
476#define B2056_RX_RXLPF_CC_OP 0x5E
477#define B2056_RX_RXLPF_GAIN 0x5F
478#define B2056_RX_RXLPF_Q_BW 0x60
479#define B2056_RX_RXLPF_HP_CORNER_BW 0x61
480#define B2056_RX_RXLPF_RCCAL_HPC 0x62
481#define B2056_RX_RXHPF_OFF0 0x63
482#define B2056_RX_RXHPF_OFF1 0x64
483#define B2056_RX_RXHPF_OFF2 0x65
484#define B2056_RX_RXHPF_OFF3 0x66
485#define B2056_RX_RXHPF_OFF4 0x67
486#define B2056_RX_RXHPF_OFF5 0x68
487#define B2056_RX_RXHPF_OFF6 0x69
488#define B2056_RX_RXHPF_OFF7 0x6A
489#define B2056_RX_RXLPF_RCCAL_LPC 0x6B
490#define B2056_RX_RXLPF_OFF_0 0x6C
491#define B2056_RX_RXLPF_OFF_1 0x6D
492#define B2056_RX_RXLPF_OFF_2 0x6E
493#define B2056_RX_RXLPF_OFF_3 0x6F
494#define B2056_RX_RXLPF_OFF_4 0x70
495#define B2056_RX_UNUSED 0x71
496#define B2056_RX_VGA_MASTER 0x72
497#define B2056_RX_VGA_BIAS 0x73
498#define B2056_RX_VGA_BIAS_DCCANCEL 0x74
499#define B2056_RX_VGA_GAIN 0x75
500#define B2056_RX_VGA_HP_CORNER_BW 0x76
501#define B2056_RX_VGABUF_BIAS 0x77
502#define B2056_RX_VGABUF_GAIN_BW 0x78
503#define B2056_RX_TXFBMIX_A 0x79
504#define B2056_RX_TXFBMIX_G 0x7A
505#define B2056_RX_RXSPARE1 0x7B
506#define B2056_RX_RXSPARE2 0x7C
507#define B2056_RX_RXSPARE3 0x7D
508#define B2056_RX_RXSPARE4 0x7E
509#define B2056_RX_RXSPARE5 0x7F
510#define B2056_RX_RXSPARE6 0x80
511#define B2056_RX_RXSPARE7 0x81
512#define B2056_RX_RXSPARE8 0x82
513#define B2056_RX_RXSPARE9 0x83
514#define B2056_RX_RXSPARE10 0x84
515#define B2056_RX_RXSPARE11 0x85
516#define B2056_RX_RXSPARE12 0x86
517#define B2056_RX_RXSPARE13 0x87
518#define B2056_RX_RXSPARE14 0x88
519#define B2056_RX_RXSPARE15 0x89
520#define B2056_RX_RXSPARE16 0x8A
521#define B2056_RX_STATUS_LNAA_GAIN 0x8B
522#define B2056_RX_STATUS_LNAG_GAIN 0x8C
523#define B2056_RX_STATUS_MIXTIA_GAIN 0x8D
524#define B2056_RX_STATUS_RXLPF_GAIN 0x8E
525#define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F
526#define B2056_RX_STATUS_RXLPF_Q 0x90
527#define B2056_RX_STATUS_RXLPF_BUF_BW 0x91
528#define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92
529#define B2056_RX_STATUS_RXLPF_RC 0x93
530#define B2056_RX_STATUS_HPC_RC 0x94
531
532#define B2056_LNA1_A_PU 0x01
533#define B2056_LNA2_A_PU 0x02
534#define B2056_LNA1_G_PU 0x01
535#define B2056_LNA2_G_PU 0x02
536#define B2056_MIXA_PU_I 0x01
537#define B2056_MIXA_PU_Q 0x02
538#define B2056_MIXA_PU_GM 0x10
539#define B2056_MIXG_PU_I 0x01
540#define B2056_MIXG_PU_Q 0x02
541#define B2056_MIXG_PU_GM 0x10
542#define B2056_TIA_PU 0x01
543#define B2056_BB_LPF_PU 0x20
544#define B2056_W1_PU 0x02
545#define B2056_W2_PU 0x04
546#define B2056_NB_PU 0x08
547#define B2056_RSSI_W1_SEL 0x02
548#define B2056_RSSI_W2_SEL 0x04
549#define B2056_RSSI_NB_SEL 0x08
550#define B2056_VCM_MASK 0x1C
551#define B2056_RSSI_VCM_SHIFT 0x02
552
553#define B2056_SYN (0x0 << 12)
554#define B2056_TX0 (0x2 << 12)
555#define B2056_TX1 (0x3 << 12)
556#define B2056_RX0 (0x6 << 12)
557#define B2056_RX1 (0x7 << 12)
558#define B2056_ALLTX (0xE << 12)
559#define B2056_ALLRX (0xF << 12)
560
561#define B2056_SYN_RESERVED_ADDR0 0x00
562#define B2056_SYN_IDCODE 0x01
563#define B2056_SYN_RESERVED_ADDR2 0x02
564#define B2056_SYN_RESERVED_ADDR3 0x03
565#define B2056_SYN_RESERVED_ADDR4 0x04
566#define B2056_SYN_RESERVED_ADDR5 0x05
567#define B2056_SYN_RESERVED_ADDR6 0x06
568#define B2056_SYN_RESERVED_ADDR7 0x07
569#define B2056_SYN_COM_CTRL 0x08
570#define B2056_SYN_COM_PU 0x09
571#define B2056_SYN_COM_OVR 0x0A
572#define B2056_SYN_COM_RESET 0x0B
573#define B2056_SYN_COM_RCAL 0x0C
574#define B2056_SYN_COM_RC_RXLPF 0x0D
575#define B2056_SYN_COM_RC_TXLPF 0x0E
576#define B2056_SYN_COM_RC_RXHPF 0x0F
577#define B2056_SYN_RESERVED_ADDR16 0x10
578#define B2056_SYN_RESERVED_ADDR17 0x11
579#define B2056_SYN_RESERVED_ADDR18 0x12
580#define B2056_SYN_RESERVED_ADDR19 0x13
581#define B2056_SYN_RESERVED_ADDR20 0x14
582#define B2056_SYN_RESERVED_ADDR21 0x15
583#define B2056_SYN_RESERVED_ADDR22 0x16
584#define B2056_SYN_RESERVED_ADDR23 0x17
585#define B2056_SYN_RESERVED_ADDR24 0x18
586#define B2056_SYN_RESERVED_ADDR25 0x19
587#define B2056_SYN_RESERVED_ADDR26 0x1A
588#define B2056_SYN_RESERVED_ADDR27 0x1B
589#define B2056_SYN_RESERVED_ADDR28 0x1C
590#define B2056_SYN_RESERVED_ADDR29 0x1D
591#define B2056_SYN_RESERVED_ADDR30 0x1E
592#define B2056_SYN_RESERVED_ADDR31 0x1F
593#define B2056_SYN_GPIO_MASTER1 0x20
594#define B2056_SYN_GPIO_MASTER2 0x21
595#define B2056_SYN_TOPBIAS_MASTER 0x22
596#define B2056_SYN_TOPBIAS_RCAL 0x23
597#define B2056_SYN_AFEREG 0x24
598#define B2056_SYN_TEMPPROCSENSE 0x25
599#define B2056_SYN_TEMPPROCSENSEIDAC 0x26
600#define B2056_SYN_TEMPPROCSENSERCAL 0x27
601#define B2056_SYN_LPO 0x28
602#define B2056_SYN_VDDCAL_MASTER 0x29
603#define B2056_SYN_VDDCAL_IDAC 0x2A
604#define B2056_SYN_VDDCAL_STATUS 0x2B
605#define B2056_SYN_RCAL_MASTER 0x2C
606#define B2056_SYN_RCAL_CODE_OUT 0x2D
607#define B2056_SYN_RCCAL_CTRL0 0x2E
608#define B2056_SYN_RCCAL_CTRL1 0x2F
609#define B2056_SYN_RCCAL_CTRL2 0x30
610#define B2056_SYN_RCCAL_CTRL3 0x31
611#define B2056_SYN_RCCAL_CTRL4 0x32
612#define B2056_SYN_RCCAL_CTRL5 0x33
613#define B2056_SYN_RCCAL_CTRL6 0x34
614#define B2056_SYN_RCCAL_CTRL7 0x35
615#define B2056_SYN_RCCAL_CTRL8 0x36
616#define B2056_SYN_RCCAL_CTRL9 0x37
617#define B2056_SYN_RCCAL_CTRL10 0x38
618#define B2056_SYN_RCCAL_CTRL11 0x39
619#define B2056_SYN_ZCAL_SPARE1 0x3A
620#define B2056_SYN_ZCAL_SPARE2 0x3B
621#define B2056_SYN_PLL_MAST1 0x3C
622#define B2056_SYN_PLL_MAST2 0x3D
623#define B2056_SYN_PLL_MAST3 0x3E
624#define B2056_SYN_PLL_BIAS_RESET 0x3F
625#define B2056_SYN_PLL_XTAL0 0x40
626#define B2056_SYN_PLL_XTAL1 0x41
627#define B2056_SYN_PLL_XTAL3 0x42
628#define B2056_SYN_PLL_XTAL4 0x43
629#define B2056_SYN_PLL_XTAL5 0x44
630#define B2056_SYN_PLL_XTAL6 0x45
631#define B2056_SYN_PLL_REFDIV 0x46
632#define B2056_SYN_PLL_PFD 0x47
633#define B2056_SYN_PLL_CP1 0x48
634#define B2056_SYN_PLL_CP2 0x49
635#define B2056_SYN_PLL_CP3 0x4A
636#define B2056_SYN_PLL_LOOPFILTER1 0x4B
637#define B2056_SYN_PLL_LOOPFILTER2 0x4C
638#define B2056_SYN_PLL_LOOPFILTER3 0x4D
639#define B2056_SYN_PLL_LOOPFILTER4 0x4E
640#define B2056_SYN_PLL_LOOPFILTER5 0x4F
641#define B2056_SYN_PLL_MMD1 0x50
642#define B2056_SYN_PLL_MMD2 0x51
643#define B2056_SYN_PLL_VCO1 0x52
644#define B2056_SYN_PLL_VCO2 0x53
645#define B2056_SYN_PLL_MONITOR1 0x54
646#define B2056_SYN_PLL_MONITOR2 0x55
647#define B2056_SYN_PLL_VCOCAL1 0x56
648#define B2056_SYN_PLL_VCOCAL2 0x57
649#define B2056_SYN_PLL_VCOCAL4 0x58
650#define B2056_SYN_PLL_VCOCAL5 0x59
651#define B2056_SYN_PLL_VCOCAL6 0x5A
652#define B2056_SYN_PLL_VCOCAL7 0x5B
653#define B2056_SYN_PLL_VCOCAL8 0x5C
654#define B2056_SYN_PLL_VCOCAL9 0x5D
655#define B2056_SYN_PLL_VCOCAL10 0x5E
656#define B2056_SYN_PLL_VCOCAL11 0x5F
657#define B2056_SYN_PLL_VCOCAL12 0x60
658#define B2056_SYN_PLL_VCOCAL13 0x61
659#define B2056_SYN_PLL_VREG 0x62
660#define B2056_SYN_PLL_STATUS1 0x63
661#define B2056_SYN_PLL_STATUS2 0x64
662#define B2056_SYN_PLL_STATUS3 0x65
663#define B2056_SYN_LOGEN_PU0 0x66
664#define B2056_SYN_LOGEN_PU1 0x67
665#define B2056_SYN_LOGEN_PU2 0x68
666#define B2056_SYN_LOGEN_PU3 0x69
667#define B2056_SYN_LOGEN_PU5 0x6A
668#define B2056_SYN_LOGEN_PU6 0x6B
669#define B2056_SYN_LOGEN_PU7 0x6C
670#define B2056_SYN_LOGEN_PU8 0x6D
671#define B2056_SYN_LOGEN_BIAS_RESET 0x6E
672#define B2056_SYN_LOGEN_RCCR1 0x6F
673#define B2056_SYN_LOGEN_VCOBUF1 0x70
674#define B2056_SYN_LOGEN_MIXER1 0x71
675#define B2056_SYN_LOGEN_MIXER2 0x72
676#define B2056_SYN_LOGEN_BUF1 0x73
677#define B2056_SYN_LOGENBUF2 0x74
678#define B2056_SYN_LOGEN_BUF3 0x75
679#define B2056_SYN_LOGEN_BUF4 0x76
680#define B2056_SYN_LOGEN_DIV1 0x77
681#define B2056_SYN_LOGEN_DIV2 0x78
682#define B2056_SYN_LOGEN_DIV3 0x79
683#define B2056_SYN_LOGEN_ACL1 0x7A
684#define B2056_SYN_LOGEN_ACL2 0x7B
685#define B2056_SYN_LOGEN_ACL3 0x7C
686#define B2056_SYN_LOGEN_ACL4 0x7D
687#define B2056_SYN_LOGEN_ACL5 0x7E
688#define B2056_SYN_LOGEN_ACL6 0x7F
689#define B2056_SYN_LOGEN_ACLOUT 0x80
690#define B2056_SYN_LOGEN_ACLCAL1 0x81
691#define B2056_SYN_LOGEN_ACLCAL2 0x82
692#define B2056_SYN_LOGEN_ACLCAL3 0x83
693#define B2056_SYN_CALEN 0x84
694#define B2056_SYN_LOGEN_PEAKDET1 0x85
695#define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86
696#define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87
697#define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88
698#define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89
699#define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A
700#define B2056_SYN_LOGEN_VCOBUF2 0x8B
701#define B2056_SYN_LOGEN_MIXER3 0x8C
702#define B2056_SYN_LOGEN_BUF5 0x8D
703#define B2056_SYN_LOGEN_BUF6 0x8E
704#define B2056_SYN_LOGEN_CBUFRX1 0x8F
705#define B2056_SYN_LOGEN_CBUFRX2 0x90
706#define B2056_SYN_LOGEN_CBUFRX3 0x91
707#define B2056_SYN_LOGEN_CBUFRX4 0x92
708#define B2056_SYN_LOGEN_CBUFTX1 0x93
709#define B2056_SYN_LOGEN_CBUFTX2 0x94
710#define B2056_SYN_LOGEN_CBUFTX3 0x95
711#define B2056_SYN_LOGEN_CBUFTX4 0x96
712#define B2056_SYN_LOGEN_CMOSRX1 0x97
713#define B2056_SYN_LOGEN_CMOSRX2 0x98
714#define B2056_SYN_LOGEN_CMOSRX3 0x99
715#define B2056_SYN_LOGEN_CMOSRX4 0x9A
716#define B2056_SYN_LOGEN_CMOSTX1 0x9B
717#define B2056_SYN_LOGEN_CMOSTX2 0x9C
718#define B2056_SYN_LOGEN_CMOSTX3 0x9D
719#define B2056_SYN_LOGEN_CMOSTX4 0x9E
720#define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F
721#define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0
722#define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1
723#define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2
724#define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3
725#define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4
726#define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5
727#define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6
728#define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7
729#define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8
730#define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9
731#define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA
732#define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB
733#define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC
734#define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD
735#define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE
736#define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF
737#define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0
738#define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1
739#define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2
740#define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3
741#define B2056_SYN_LOGEN_CORE_CALVALID 0xB4
742#define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5
743#define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6
744
745#define B2056_TX_RESERVED_ADDR0 0x00
746#define B2056_TX_IDCODE 0x01
747#define B2056_TX_RESERVED_ADDR2 0x02
748#define B2056_TX_RESERVED_ADDR3 0x03
749#define B2056_TX_RESERVED_ADDR4 0x04
750#define B2056_TX_RESERVED_ADDR5 0x05
751#define B2056_TX_RESERVED_ADDR6 0x06
752#define B2056_TX_RESERVED_ADDR7 0x07
753#define B2056_TX_COM_CTRL 0x08
754#define B2056_TX_COM_PU 0x09
755#define B2056_TX_COM_OVR 0x0A
756#define B2056_TX_COM_RESET 0x0B
757#define B2056_TX_COM_RCAL 0x0C
758#define B2056_TX_COM_RC_RXLPF 0x0D
759#define B2056_TX_COM_RC_TXLPF 0x0E
760#define B2056_TX_COM_RC_RXHPF 0x0F
761#define B2056_TX_RESERVED_ADDR16 0x10
762#define B2056_TX_RESERVED_ADDR17 0x11
763#define B2056_TX_RESERVED_ADDR18 0x12
764#define B2056_TX_RESERVED_ADDR19 0x13
765#define B2056_TX_RESERVED_ADDR20 0x14
766#define B2056_TX_RESERVED_ADDR21 0x15
767#define B2056_TX_RESERVED_ADDR22 0x16
768#define B2056_TX_RESERVED_ADDR23 0x17
769#define B2056_TX_RESERVED_ADDR24 0x18
770#define B2056_TX_RESERVED_ADDR25 0x19
771#define B2056_TX_RESERVED_ADDR26 0x1A
772#define B2056_TX_RESERVED_ADDR27 0x1B
773#define B2056_TX_RESERVED_ADDR28 0x1C
774#define B2056_TX_RESERVED_ADDR29 0x1D
775#define B2056_TX_RESERVED_ADDR30 0x1E
776#define B2056_TX_RESERVED_ADDR31 0x1F
777#define B2056_TX_IQCAL_GAIN_BW 0x20
778#define B2056_TX_LOFT_FINE_I 0x21
779#define B2056_TX_LOFT_FINE_Q 0x22
780#define B2056_TX_LOFT_COARSE_I 0x23
781#define B2056_TX_LOFT_COARSE_Q 0x24
782#define B2056_TX_TX_COM_MASTER1 0x25
783#define B2056_TX_TX_COM_MASTER2 0x26
784#define B2056_TX_RXIQCAL_TXMUX 0x27
785#define B2056_TX_TX_SSI_MASTER 0x28
786#define B2056_TX_IQCAL_VCM_HG 0x29
787#define B2056_TX_IQCAL_IDAC 0x2A
788#define B2056_TX_TSSI_VCM 0x2B
789#define B2056_TX_TX_AMP_DET 0x2C
790#define B2056_TX_TX_SSI_MUX 0x2D
791#define B2056_TX_TSSIA 0x2E
792#define B2056_TX_TSSIG 0x2F
793#define B2056_TX_TSSI_MISC1 0x30
794#define B2056_TX_TSSI_MISC2 0x31
795#define B2056_TX_TSSI_MISC3 0x32
796#define B2056_TX_PA_SPARE1 0x33
797#define B2056_TX_PA_SPARE2 0x34
798#define B2056_TX_INTPAA_MASTER 0x35
799#define B2056_TX_INTPAA_GAIN 0x36
800#define B2056_TX_INTPAA_BOOST_TUNE 0x37
801#define B2056_TX_INTPAA_IAUX_STAT 0x38
802#define B2056_TX_INTPAA_IAUX_DYN 0x39
803#define B2056_TX_INTPAA_IMAIN_STAT 0x3A
804#define B2056_TX_INTPAA_IMAIN_DYN 0x3B
805#define B2056_TX_INTPAA_CASCBIAS 0x3C
806#define B2056_TX_INTPAA_PASLOPE 0x3D
807#define B2056_TX_INTPAA_PA_MISC 0x3E
808#define B2056_TX_INTPAG_MASTER 0x3F
809#define B2056_TX_INTPAG_GAIN 0x40
810#define B2056_TX_INTPAG_BOOST_TUNE 0x41
811#define B2056_TX_INTPAG_IAUX_STAT 0x42
812#define B2056_TX_INTPAG_IAUX_DYN 0x43
813#define B2056_TX_INTPAG_IMAIN_STAT 0x44
814#define B2056_TX_INTPAG_IMAIN_DYN 0x45
815#define B2056_TX_INTPAG_CASCBIAS 0x46
816#define B2056_TX_INTPAG_PASLOPE 0x47
817#define B2056_TX_INTPAG_PA_MISC 0x48
818#define B2056_TX_PADA_MASTER 0x49
819#define B2056_TX_PADA_IDAC 0x4A
820#define B2056_TX_PADA_CASCBIAS 0x4B
821#define B2056_TX_PADA_GAIN 0x4C
822#define B2056_TX_PADA_BOOST_TUNE 0x4D
823#define B2056_TX_PADA_SLOPE 0x4E
824#define B2056_TX_PADG_MASTER 0x4F
825#define B2056_TX_PADG_IDAC 0x50
826#define B2056_TX_PADG_CASCBIAS 0x51
827#define B2056_TX_PADG_GAIN 0x52
828#define B2056_TX_PADG_BOOST_TUNE 0x53
829#define B2056_TX_PADG_SLOPE 0x54
830#define B2056_TX_PGAA_MASTER 0x55
831#define B2056_TX_PGAA_IDAC 0x56
832#define B2056_TX_PGAA_GAIN 0x57
833#define B2056_TX_PGAA_BOOST_TUNE 0x58
834#define B2056_TX_PGAA_SLOPE 0x59
835#define B2056_TX_PGAA_MISC 0x5A
836#define B2056_TX_PGAG_MASTER 0x5B
837#define B2056_TX_PGAG_IDAC 0x5C
838#define B2056_TX_PGAG_GAIN 0x5D
839#define B2056_TX_PGAG_BOOST_TUNE 0x5E
840#define B2056_TX_PGAG_SLOPE 0x5F
841#define B2056_TX_PGAG_MISC 0x60
842#define B2056_TX_MIXA_MASTER 0x61
843#define B2056_TX_MIXA_BOOST_TUNE 0x62
844#define B2056_TX_MIXG 0x63
845#define B2056_TX_MIXG_BOOST_TUNE 0x64
846#define B2056_TX_BB_GM_MASTER 0x65
847#define B2056_TX_GMBB_GM 0x66
848#define B2056_TX_GMBB_IDAC 0x67
849#define B2056_TX_TXLPF_MASTER 0x68
850#define B2056_TX_TXLPF_RCCAL 0x69
851#define B2056_TX_TXLPF_RCCAL_OFF0 0x6A
852#define B2056_TX_TXLPF_RCCAL_OFF1 0x6B
853#define B2056_TX_TXLPF_RCCAL_OFF2 0x6C
854#define B2056_TX_TXLPF_RCCAL_OFF3 0x6D
855#define B2056_TX_TXLPF_RCCAL_OFF4 0x6E
856#define B2056_TX_TXLPF_RCCAL_OFF5 0x6F
857#define B2056_TX_TXLPF_RCCAL_OFF6 0x70
858#define B2056_TX_TXLPF_BW 0x71
859#define B2056_TX_TXLPF_GAIN 0x72
860#define B2056_TX_TXLPF_IDAC 0x73
861#define B2056_TX_TXLPF_IDAC_0 0x74
862#define B2056_TX_TXLPF_IDAC_1 0x75
863#define B2056_TX_TXLPF_IDAC_2 0x76
864#define B2056_TX_TXLPF_IDAC_3 0x77
865#define B2056_TX_TXLPF_IDAC_4 0x78
866#define B2056_TX_TXLPF_IDAC_5 0x79
867#define B2056_TX_TXLPF_IDAC_6 0x7A
868#define B2056_TX_TXLPF_OPAMP_IDAC 0x7B
869#define B2056_TX_TXLPF_MISC 0x7C
870#define B2056_TX_TXSPARE1 0x7D
871#define B2056_TX_TXSPARE2 0x7E
872#define B2056_TX_TXSPARE3 0x7F
873#define B2056_TX_TXSPARE4 0x80
874#define B2056_TX_TXSPARE5 0x81
875#define B2056_TX_TXSPARE6 0x82
876#define B2056_TX_TXSPARE7 0x83
877#define B2056_TX_TXSPARE8 0x84
878#define B2056_TX_TXSPARE9 0x85
879#define B2056_TX_TXSPARE10 0x86
880#define B2056_TX_TXSPARE11 0x87
881#define B2056_TX_TXSPARE12 0x88
882#define B2056_TX_TXSPARE13 0x89
883#define B2056_TX_TXSPARE14 0x8A
884#define B2056_TX_TXSPARE15 0x8B
885#define B2056_TX_TXSPARE16 0x8C
886#define B2056_TX_STATUS_INTPA_GAIN 0x8D
887#define B2056_TX_STATUS_PAD_GAIN 0x8E
888#define B2056_TX_STATUS_PGA_GAIN 0x8F
889#define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90
890#define B2056_TX_STATUS_TXLPF_BW 0x91
891#define B2056_TX_STATUS_TXLPF_RC 0x92
892#define B2056_TX_GMBB_IDAC0 0x93
893#define B2056_TX_GMBB_IDAC1 0x94
894#define B2056_TX_GMBB_IDAC2 0x95
895#define B2056_TX_GMBB_IDAC3 0x96
896#define B2056_TX_GMBB_IDAC4 0x97
897#define B2056_TX_GMBB_IDAC5 0x98
898#define B2056_TX_GMBB_IDAC6 0x99
899#define B2056_TX_GMBB_IDAC7 0x9A
900
901#define B2056_RX_RESERVED_ADDR0 0x00
902#define B2056_RX_IDCODE 0x01
903#define B2056_RX_RESERVED_ADDR2 0x02
904#define B2056_RX_RESERVED_ADDR3 0x03
905#define B2056_RX_RESERVED_ADDR4 0x04
906#define B2056_RX_RESERVED_ADDR5 0x05
907#define B2056_RX_RESERVED_ADDR6 0x06
908#define B2056_RX_RESERVED_ADDR7 0x07
909#define B2056_RX_COM_CTRL 0x08
910#define B2056_RX_COM_PU 0x09
911#define B2056_RX_COM_OVR 0x0A
912#define B2056_RX_COM_RESET 0x0B
913#define B2056_RX_COM_RCAL 0x0C
914#define B2056_RX_COM_RC_RXLPF 0x0D
915#define B2056_RX_COM_RC_TXLPF 0x0E
916#define B2056_RX_COM_RC_RXHPF 0x0F
917#define B2056_RX_RESERVED_ADDR16 0x10
918#define B2056_RX_RESERVED_ADDR17 0x11
919#define B2056_RX_RESERVED_ADDR18 0x12
920#define B2056_RX_RESERVED_ADDR19 0x13
921#define B2056_RX_RESERVED_ADDR20 0x14
922#define B2056_RX_RESERVED_ADDR21 0x15
923#define B2056_RX_RESERVED_ADDR22 0x16
924#define B2056_RX_RESERVED_ADDR23 0x17
925#define B2056_RX_RESERVED_ADDR24 0x18
926#define B2056_RX_RESERVED_ADDR25 0x19
927#define B2056_RX_RESERVED_ADDR26 0x1A
928#define B2056_RX_RESERVED_ADDR27 0x1B
929#define B2056_RX_RESERVED_ADDR28 0x1C
930#define B2056_RX_RESERVED_ADDR29 0x1D
931#define B2056_RX_RESERVED_ADDR30 0x1E
932#define B2056_RX_RESERVED_ADDR31 0x1F
933#define B2056_RX_RXIQCAL_RXMUX 0x20
934#define B2056_RX_RSSI_PU 0x21
935#define B2056_RX_RSSI_SEL 0x22
936#define B2056_RX_RSSI_GAIN 0x23
937#define B2056_RX_RSSI_NB_IDAC 0x24
938#define B2056_RX_RSSI_WB2I_IDAC_1 0x25
939#define B2056_RX_RSSI_WB2I_IDAC_2 0x26
940#define B2056_RX_RSSI_WB2Q_IDAC_1 0x27
941#define B2056_RX_RSSI_WB2Q_IDAC_2 0x28
942#define B2056_RX_RSSI_POLE 0x29
943#define B2056_RX_RSSI_WB1_IDAC 0x2A
944#define B2056_RX_RSSI_MISC 0x2B
945#define B2056_RX_LNAA_MASTER 0x2C
946#define B2056_RX_LNAA_TUNE 0x2D
947#define B2056_RX_LNAA_GAIN 0x2E
948#define B2056_RX_LNA_A_SLOPE 0x2F
949#define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30
950#define B2056_RX_LNAA2_IDAC 0x31
951#define B2056_RX_LNA1A_MISC 0x32
952#define B2056_RX_LNAG_MASTER 0x33
953#define B2056_RX_LNAG_TUNE 0x34
954#define B2056_RX_LNAG_GAIN 0x35
955#define B2056_RX_LNA_G_SLOPE 0x36
956#define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37
957#define B2056_RX_LNAG2_IDAC 0x38
958#define B2056_RX_LNA1G_MISC 0x39
959#define B2056_RX_MIXA_MASTER 0x3A
960#define B2056_RX_MIXA_VCM 0x3B
961#define B2056_RX_MIXA_CTRLPTAT 0x3C
962#define B2056_RX_MIXA_LOB_BIAS 0x3D
963#define B2056_RX_MIXA_CORE_IDAC 0x3E
964#define B2056_RX_MIXA_CMFB_IDAC 0x3F
965#define B2056_RX_MIXA_BIAS_AUX 0x40
966#define B2056_RX_MIXA_BIAS_MAIN 0x41
967#define B2056_RX_MIXA_BIAS_MISC 0x42
968#define B2056_RX_MIXA_MAST_BIAS 0x43
969#define B2056_RX_MIXG_MASTER 0x44
970#define B2056_RX_MIXG_VCM 0x45
971#define B2056_RX_MIXG_CTRLPTAT 0x46
972#define B2056_RX_MIXG_LOB_BIAS 0x47
973#define B2056_RX_MIXG_CORE_IDAC 0x48
974#define B2056_RX_MIXG_CMFB_IDAC 0x49
975#define B2056_RX_MIXG_BIAS_AUX 0x4A
976#define B2056_RX_MIXG_BIAS_MAIN 0x4B
977#define B2056_RX_MIXG_BIAS_MISC 0x4C
978#define B2056_RX_MIXG_MAST_BIAS 0x4D
979#define B2056_RX_TIA_MASTER 0x4E
980#define B2056_RX_TIA_IOPAMP 0x4F
981#define B2056_RX_TIA_QOPAMP 0x50
982#define B2056_RX_TIA_IMISC 0x51
983#define B2056_RX_TIA_QMISC 0x52
984#define B2056_RX_TIA_GAIN 0x53
985#define B2056_RX_TIA_SPARE1 0x54
986#define B2056_RX_TIA_SPARE2 0x55
987#define B2056_RX_BB_LPF_MASTER 0x56
988#define B2056_RX_AACI_MASTER 0x57
989#define B2056_RX_RXLPF_IDAC 0x58
990#define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59
991#define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A
992#define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B
993#define B2056_RX_RXLPF_OUTVCM 0x5C
994#define B2056_RX_RXLPF_INVCM_BODY 0x5D
995#define B2056_RX_RXLPF_CC_OP 0x5E
996#define B2056_RX_RXLPF_GAIN 0x5F
997#define B2056_RX_RXLPF_Q_BW 0x60
998#define B2056_RX_RXLPF_HP_CORNER_BW 0x61
999#define B2056_RX_RXLPF_RCCAL_HPC 0x62
1000#define B2056_RX_RXHPF_OFF0 0x63
1001#define B2056_RX_RXHPF_OFF1 0x64
1002#define B2056_RX_RXHPF_OFF2 0x65
1003#define B2056_RX_RXHPF_OFF3 0x66
1004#define B2056_RX_RXHPF_OFF4 0x67
1005#define B2056_RX_RXHPF_OFF5 0x68
1006#define B2056_RX_RXHPF_OFF6 0x69
1007#define B2056_RX_RXHPF_OFF7 0x6A
1008#define B2056_RX_RXLPF_RCCAL_LPC 0x6B
1009#define B2056_RX_RXLPF_OFF_0 0x6C
1010#define B2056_RX_RXLPF_OFF_1 0x6D
1011#define B2056_RX_RXLPF_OFF_2 0x6E
1012#define B2056_RX_RXLPF_OFF_3 0x6F
1013#define B2056_RX_RXLPF_OFF_4 0x70
1014#define B2056_RX_UNUSED 0x71
1015#define B2056_RX_VGA_MASTER 0x72
1016#define B2056_RX_VGA_BIAS 0x73
1017#define B2056_RX_VGA_BIAS_DCCANCEL 0x74
1018#define B2056_RX_VGA_GAIN 0x75
1019#define B2056_RX_VGA_HP_CORNER_BW 0x76
1020#define B2056_RX_VGABUF_BIAS 0x77
1021#define B2056_RX_VGABUF_GAIN_BW 0x78
1022#define B2056_RX_TXFBMIX_A 0x79
1023#define B2056_RX_TXFBMIX_G 0x7A
1024#define B2056_RX_RXSPARE1 0x7B
1025#define B2056_RX_RXSPARE2 0x7C
1026#define B2056_RX_RXSPARE3 0x7D
1027#define B2056_RX_RXSPARE4 0x7E
1028#define B2056_RX_RXSPARE5 0x7F
1029#define B2056_RX_RXSPARE6 0x80
1030#define B2056_RX_RXSPARE7 0x81
1031#define B2056_RX_RXSPARE8 0x82
1032#define B2056_RX_RXSPARE9 0x83
1033#define B2056_RX_RXSPARE10 0x84
1034#define B2056_RX_RXSPARE11 0x85
1035#define B2056_RX_RXSPARE12 0x86
1036#define B2056_RX_RXSPARE13 0x87
1037#define B2056_RX_RXSPARE14 0x88
1038#define B2056_RX_RXSPARE15 0x89
1039#define B2056_RX_RXSPARE16 0x8A
1040#define B2056_RX_STATUS_LNAA_GAIN 0x8B
1041#define B2056_RX_STATUS_LNAG_GAIN 0x8C
1042#define B2056_RX_STATUS_MIXTIA_GAIN 0x8D
1043#define B2056_RX_STATUS_RXLPF_GAIN 0x8E
1044#define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F
1045#define B2056_RX_STATUS_RXLPF_Q 0x90
1046#define B2056_RX_STATUS_RXLPF_BUF_BW 0x91
1047#define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92
1048#define B2056_RX_STATUS_RXLPF_RC 0x93
1049#define B2056_RX_STATUS_HPC_RC 0x94
1050
1051#define B2056_LNA1_A_PU 0x01
1052#define B2056_LNA2_A_PU 0x02
1053#define B2056_LNA1_G_PU 0x01
1054#define B2056_LNA2_G_PU 0x02
1055#define B2056_MIXA_PU_I 0x01
1056#define B2056_MIXA_PU_Q 0x02
1057#define B2056_MIXA_PU_GM 0x10
1058#define B2056_MIXG_PU_I 0x01
1059#define B2056_MIXG_PU_Q 0x02
1060#define B2056_MIXG_PU_GM 0x10
1061#define B2056_TIA_PU 0x01
1062#define B2056_BB_LPF_PU 0x20
1063#define B2056_W1_PU 0x02
1064#define B2056_W2_PU 0x04
1065#define B2056_NB_PU 0x08
1066#define B2056_RSSI_W1_SEL 0x02
1067#define B2056_RSSI_W2_SEL 0x04
1068#define B2056_RSSI_NB_SEL 0x08
1069#define B2056_VCM_MASK 0x1C
1070#define B2056_RSSI_VCM_SHIFT 0x02
1071
1072struct b43_nphy_channeltab_entry_rev3 {
1073 /* The channel frequency in MHz */
1074 u16 freq;
1075 /* Radio register values on channelswitch */
1076 u8 radio_syn_pll_vcocal1;
1077 u8 radio_syn_pll_vcocal2;
1078 u8 radio_syn_pll_refdiv;
1079 u8 radio_syn_pll_mmd2;
1080 u8 radio_syn_pll_mmd1;
1081 u8 radio_syn_pll_loopfilter1;
1082 u8 radio_syn_pll_loopfilter2;
1083 u8 radio_syn_pll_loopfilter3;
1084 u8 radio_syn_pll_loopfilter4;
1085 u8 radio_syn_pll_loopfilter5;
1086 u8 radio_syn_reserved_addr27;
1087 u8 radio_syn_reserved_addr28;
1088 u8 radio_syn_reserved_addr29;
1089 u8 radio_syn_logen_vcobuf1;
1090 u8 radio_syn_logen_mixer2;
1091 u8 radio_syn_logen_buf3;
1092 u8 radio_syn_logen_buf4;
1093 u8 radio_rx0_lnaa_tune;
1094 u8 radio_rx0_lnag_tune;
1095 u8 radio_tx0_intpaa_boost_tune;
1096 u8 radio_tx0_intpag_boost_tune;
1097 u8 radio_tx0_pada_boost_tune;
1098 u8 radio_tx0_padg_boost_tune;
1099 u8 radio_tx0_pgaa_boost_tune;
1100 u8 radio_tx0_pgag_boost_tune;
1101 u8 radio_tx0_mixa_boost_tune;
1102 u8 radio_tx0_mixg_boost_tune;
1103 u8 radio_rx1_lnaa_tune;
1104 u8 radio_rx1_lnag_tune;
1105 u8 radio_tx1_intpaa_boost_tune;
1106 u8 radio_tx1_intpag_boost_tune;
1107 u8 radio_tx1_pada_boost_tune;
1108 u8 radio_tx1_padg_boost_tune;
1109 u8 radio_tx1_pgaa_boost_tune;
1110 u8 radio_tx1_pgag_boost_tune;
1111 u8 radio_tx1_mixa_boost_tune;
1112 u8 radio_tx1_mixg_boost_tune;
1113 /* PHY register values on channelswitch */
1114 struct b43_phy_n_sfo_cfg phy_regs;
1115};
1116
1117void b2056_upload_inittabs(struct b43_wldev *dev,
1118 bool ghz5, bool ignore_uploadflag);
1119
1120#endif /* B43_RADIO_2056_H_ */
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c
index 78016ae21c50..a617efe38289 100644
--- a/drivers/net/wireless/b43/rfkill.c
+++ b/drivers/net/wireless/b43/rfkill.c
@@ -28,23 +28,8 @@
28/* Returns TRUE, if the radio is enabled in hardware. */ 28/* Returns TRUE, if the radio is enabled in hardware. */
29bool b43_is_hw_radio_enabled(struct b43_wldev *dev) 29bool b43_is_hw_radio_enabled(struct b43_wldev *dev)
30{ 30{
31 if (dev->phy.rev >= 3 || dev->phy.type == B43_PHYTYPE_LP) { 31 return !(b43_read32(dev, B43_MMIO_RADIO_HWENABLED_HI)
32 if (!(b43_read32(dev, B43_MMIO_RADIO_HWENABLED_HI) 32 & B43_MMIO_RADIO_HWENABLED_HI_MASK);
33 & B43_MMIO_RADIO_HWENABLED_HI_MASK))
34 return 1;
35 } else {
36 /* To prevent CPU fault on PPC, do not read a register
37 * unless the interface is started; however, on resume
38 * for hibernation, this routine is entered early. When
39 * that happens, unconditionally return TRUE.
40 */
41 if (b43_status(dev) < B43_STAT_STARTED)
42 return 1;
43 if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO)
44 & B43_MMIO_RADIO_HWENABLED_LO_MASK)
45 return 1;
46 }
47 return 0;
48} 33}
49 34
50/* The poll callback for the hardware button. */ 35/* The poll callback for the hardware button. */
@@ -52,7 +37,7 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
52{ 37{
53 struct b43_wl *wl = hw_to_b43_wl(hw); 38 struct b43_wl *wl = hw_to_b43_wl(hw);
54 struct b43_wldev *dev = wl->current_dev; 39 struct b43_wldev *dev = wl->current_dev;
55 struct ssb_bus *bus = dev->dev->bus; 40 struct ssb_bus *bus = dev->sdev->bus;
56 bool enabled; 41 bool enabled;
57 bool brought_up = false; 42 bool brought_up = false;
58 43
@@ -62,7 +47,7 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
62 mutex_unlock(&wl->mutex); 47 mutex_unlock(&wl->mutex);
63 return; 48 return;
64 } 49 }
65 ssb_device_enable(dev->dev, 0); 50 ssb_device_enable(dev->sdev, 0);
66 brought_up = true; 51 brought_up = true;
67 } 52 }
68 53
@@ -78,7 +63,7 @@ void b43_rfkill_poll(struct ieee80211_hw *hw)
78 } 63 }
79 64
80 if (brought_up) { 65 if (brought_up) {
81 ssb_device_disable(dev->dev, 0); 66 ssb_device_disable(dev->sdev, 0);
82 ssb_bus_may_powerdown(bus); 67 ssb_bus_may_powerdown(bus);
83 } 68 }
84 69
diff --git a/drivers/net/wireless/b43/sdio.c b/drivers/net/wireless/b43/sdio.c
index 45933cf8e8c2..808e25b79703 100644
--- a/drivers/net/wireless/b43/sdio.c
+++ b/drivers/net/wireless/b43/sdio.c
@@ -66,7 +66,7 @@ static void b43_sdio_interrupt_dispatcher(struct sdio_func *func)
66int b43_sdio_request_irq(struct b43_wldev *dev, 66int b43_sdio_request_irq(struct b43_wldev *dev,
67 void (*handler)(struct b43_wldev *dev)) 67 void (*handler)(struct b43_wldev *dev))
68{ 68{
69 struct ssb_bus *bus = dev->dev->bus; 69 struct ssb_bus *bus = dev->sdev->bus;
70 struct sdio_func *func = bus->host_sdio; 70 struct sdio_func *func = bus->host_sdio;
71 struct b43_sdio *sdio = sdio_get_drvdata(func); 71 struct b43_sdio *sdio = sdio_get_drvdata(func);
72 int err; 72 int err;
@@ -82,7 +82,7 @@ int b43_sdio_request_irq(struct b43_wldev *dev,
82 82
83void b43_sdio_free_irq(struct b43_wldev *dev) 83void b43_sdio_free_irq(struct b43_wldev *dev)
84{ 84{
85 struct ssb_bus *bus = dev->dev->bus; 85 struct ssb_bus *bus = dev->sdev->bus;
86 struct sdio_func *func = bus->host_sdio; 86 struct sdio_func *func = bus->host_sdio;
87 struct b43_sdio *sdio = sdio_get_drvdata(func); 87 struct b43_sdio *sdio = sdio_get_drvdata(func);
88 88
@@ -163,6 +163,7 @@ static int b43_sdio_probe(struct sdio_func *func,
163err_free_ssb: 163err_free_ssb:
164 kfree(sdio); 164 kfree(sdio);
165err_disable_func: 165err_disable_func:
166 sdio_claim_host(func);
166 sdio_disable_func(func); 167 sdio_disable_func(func);
167err_release_host: 168err_release_host:
168 sdio_release_host(func); 169 sdio_release_host(func);
@@ -175,7 +176,9 @@ static void b43_sdio_remove(struct sdio_func *func)
175 struct b43_sdio *sdio = sdio_get_drvdata(func); 176 struct b43_sdio *sdio = sdio_get_drvdata(func);
176 177
177 ssb_bus_unregister(&sdio->ssb); 178 ssb_bus_unregister(&sdio->ssb);
179 sdio_claim_host(func);
178 sdio_disable_func(func); 180 sdio_disable_func(func);
181 sdio_release_host(func);
179 kfree(sdio); 182 kfree(sdio);
180 sdio_set_drvdata(func, NULL); 183 sdio_set_drvdata(func, NULL);
181} 184}
diff --git a/drivers/net/wireless/b43/sysfs.c b/drivers/net/wireless/b43/sysfs.c
index f1ae4e05a32c..57af619725c3 100644
--- a/drivers/net/wireless/b43/sysfs.c
+++ b/drivers/net/wireless/b43/sysfs.c
@@ -140,7 +140,7 @@ static DEVICE_ATTR(interference, 0644,
140 140
141int b43_sysfs_register(struct b43_wldev *wldev) 141int b43_sysfs_register(struct b43_wldev *wldev)
142{ 142{
143 struct device *dev = wldev->dev->dev; 143 struct device *dev = wldev->sdev->dev;
144 144
145 B43_WARN_ON(b43_status(wldev) != B43_STAT_INITIALIZED); 145 B43_WARN_ON(b43_status(wldev) != B43_STAT_INITIALIZED);
146 146
@@ -149,7 +149,7 @@ int b43_sysfs_register(struct b43_wldev *wldev)
149 149
150void b43_sysfs_unregister(struct b43_wldev *wldev) 150void b43_sysfs_unregister(struct b43_wldev *wldev)
151{ 151{
152 struct device *dev = wldev->dev->dev; 152 struct device *dev = wldev->sdev->dev;
153 153
154 device_remove_file(dev, &dev_attr_interference); 154 device_remove_file(dev, &dev_attr_interference);
155} 155}
diff --git a/drivers/net/wireless/b43/tables_lpphy.c b/drivers/net/wireless/b43/tables_lpphy.c
index 61027ee84fb5..59df3c64af63 100644
--- a/drivers/net/wireless/b43/tables_lpphy.c
+++ b/drivers/net/wireless/b43/tables_lpphy.c
@@ -2304,7 +2304,7 @@ void lpphy_rev0_1_table_init(struct b43_wldev *dev)
2304 2304
2305void lpphy_rev2plus_table_init(struct b43_wldev *dev) 2305void lpphy_rev2plus_table_init(struct b43_wldev *dev)
2306{ 2306{
2307 struct ssb_bus *bus = dev->dev->bus; 2307 struct ssb_bus *bus = dev->sdev->bus;
2308 int i; 2308 int i;
2309 2309
2310 B43_WARN_ON(dev->phy.rev < 2); 2310 B43_WARN_ON(dev->phy.rev < 2);
@@ -2416,7 +2416,7 @@ void lpphy_write_gain_table_bulk(struct b43_wldev *dev, int offset, int count,
2416 2416
2417void lpphy_init_tx_gain_table(struct b43_wldev *dev) 2417void lpphy_init_tx_gain_table(struct b43_wldev *dev)
2418{ 2418{
2419 struct ssb_bus *bus = dev->dev->bus; 2419 struct ssb_bus *bus = dev->sdev->bus;
2420 2420
2421 switch (dev->phy.rev) { 2421 switch (dev->phy.rev) {
2422 case 0: 2422 case 0:
diff --git a/drivers/net/wireless/b43/tables_nphy.c b/drivers/net/wireless/b43/tables_nphy.c
index d96e870ab8fe..2de483b3d3ba 100644
--- a/drivers/net/wireless/b43/tables_nphy.c
+++ b/drivers/net/wireless/b43/tables_nphy.c
@@ -1,7 +1,7 @@
1/* 1/*
2 2
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY and radio device data tables 4 IEEE 802.11n PHY data tables
5 5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de> 6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7 7
@@ -27,1351 +27,42 @@
27#include "phy_common.h" 27#include "phy_common.h"
28#include "phy_n.h" 28#include "phy_n.h"
29 29
30
31struct b2055_inittab_entry {
32 /* Value to write if we use the 5GHz band. */
33 u16 ghz5;
34 /* Value to write if we use the 2.4GHz band. */
35 u16 ghz2;
36 /* Flags */
37 u8 flags;
38#define B2055_INITTAB_ENTRY_OK 0x01
39#define B2055_INITTAB_UPLOAD 0x02
40};
41#define UPLOAD .flags = B2055_INITTAB_ENTRY_OK | B2055_INITTAB_UPLOAD
42#define NOUPLOAD .flags = B2055_INITTAB_ENTRY_OK
43
44static const struct b2055_inittab_entry b2055_inittab [] = {
45 [B2055_SP_PINPD] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
46 [B2055_C1_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
47 [B2055_C1_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
48 [B2055_C2_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
49 [B2055_C2_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
50 [B2055_C1_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
51 [B2055_C1_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
52 [B2055_C2_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
53 [B2055_C2_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
54 [B2055_C1_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
55 [B2055_C2_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
56 [B2055_C1_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
57 [B2055_C1_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
58 [B2055_C2_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
59 [B2055_C2_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
60 [B2055_MASTER1] = { .ghz5 = 0x00D0, .ghz2 = 0x00D0, NOUPLOAD, },
61 [B2055_MASTER2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
62 [B2055_PD_LGEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
63 [B2055_PD_PLLTS] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
64 [B2055_C1_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
65 [B2055_C1_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
66 [B2055_C1_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
67 [B2055_C1_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
68 [B2055_C2_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
69 [B2055_C2_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
70 [B2055_C2_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
71 [B2055_C2_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
72 [B2055_PWRDET_LGEN] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
73 [B2055_C1_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
74 [B2055_C1_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
75 [B2055_C2_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
76 [B2055_C2_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
77 [B2055_RRCCAL_CS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
78 [B2055_RRCCAL_NOPTSEL] = { .ghz5 = 0x002C, .ghz2 = 0x002C, NOUPLOAD, },
79 [B2055_CAL_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
80 [B2055_CAL_COUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
81 [B2055_CAL_COUT2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
82 [B2055_CAL_CVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
83 [B2055_CAL_RVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
84 [B2055_CAL_LPOCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
85 [B2055_CAL_TS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
86 [B2055_CAL_RCCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
87 [B2055_CAL_RCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
88 [B2055_PADDRV] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
89 [B2055_XOCTL1] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
90 [B2055_XOCTL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
91 [B2055_XOREGUL] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
92 [B2055_XOMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
93 [B2055_PLL_LFC1] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
94 [B2055_PLL_CALVTH] = { .ghz5 = 0x0087, .ghz2 = 0x0087, NOUPLOAD, },
95 [B2055_PLL_LFC2] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
96 [B2055_PLL_REF] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
97 [B2055_PLL_LFR1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
98 [B2055_PLL_PFDCP] = { .ghz5 = 0x0018, .ghz2 = 0x0018, UPLOAD, },
99 [B2055_PLL_IDAC_CPOPAMP] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
100 [B2055_PLL_CPREG] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
101 [B2055_PLL_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
102 [B2055_RF_PLLMOD0] = { .ghz5 = 0x009E, .ghz2 = 0x009E, NOUPLOAD, },
103 [B2055_RF_PLLMOD1] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
104 [B2055_RF_MMDIDAC1] = { .ghz5 = 0x00C8, .ghz2 = 0x00C8, UPLOAD, },
105 [B2055_RF_MMDIDAC0] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
106 [B2055_RF_MMDSP] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
107 [B2055_VCO_CAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
108 [B2055_VCO_CAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
109 [B2055_VCO_CAL3] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
110 [B2055_VCO_CAL4] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
111 [B2055_VCO_CAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
112 [B2055_VCO_CAL6] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
113 [B2055_VCO_CAL7] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
114 [B2055_VCO_CAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
115 [B2055_VCO_CAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
116 [B2055_VCO_CAL10] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
117 [B2055_VCO_CAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
118 [B2055_VCO_CAL12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
119 [B2055_VCO_CAL13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
120 [B2055_VCO_CAL14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
121 [B2055_VCO_CAL15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
122 [B2055_VCO_CAL16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
123 [B2055_VCO_KVCO] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
124 [B2055_VCO_CAPTAIL] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
125 [B2055_VCO_IDACVCO] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
126 [B2055_VCO_REG] = { .ghz5 = 0x0084, .ghz2 = 0x0084, UPLOAD, },
127 [B2055_PLL_RFVTH] = { .ghz5 = 0x00C3, .ghz2 = 0x00C3, NOUPLOAD, },
128 [B2055_LGBUF_CENBUF] = { .ghz5 = 0x008F, .ghz2 = 0x008F, NOUPLOAD, },
129 [B2055_LGEN_TUNE1] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
130 [B2055_LGEN_TUNE2] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
131 [B2055_LGEN_IDAC1] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
132 [B2055_LGEN_IDAC2] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
133 [B2055_LGEN_BIASC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
134 [B2055_LGEN_BIASIDAC] = { .ghz5 = 0x00CC, .ghz2 = 0x00CC, NOUPLOAD, },
135 [B2055_LGEN_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
136 [B2055_LGEN_DIV] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
137 [B2055_LGEN_SPARE2] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
138 [B2055_C1_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
139 [B2055_C1_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
140 [B2055_C1_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
141 [B2055_C1_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
142 [B2055_C1_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
143 [B2055_C1_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
144 [B2055_C1_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
145 [B2055_C1_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
146 [B2055_C1_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
147 [B2055_C1_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
148 [B2055_C1_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
149 [B2055_C1_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
150 [B2055_C1_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
151 [B2055_C1_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
152 [B2055_C1_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
153 [B2055_C1_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
154 [B2055_C1_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
155 [B2055_C1_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
156 [B2055_C1_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
157 [B2055_C1_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
158 [B2055_C1_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
159 [B2055_C1_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
160 [B2055_C1_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
161 [B2055_C1_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
162 [B2055_C1_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
163 [B2055_C1_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
164 [B2055_C1_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
165 [B2055_C1_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
166 [B2055_C1_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
167 [B2055_C1_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
168 [B2055_C1_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
169 [B2055_C1_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
170 [B2055_C1_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
171 [B2055_C1_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
172 [B2055_C1_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
173 [B2055_C1_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
174 [B2055_C1_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
175 [B2055_C1_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
176 [B2055_C1_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
177 [B2055_C1_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
178 [B2055_C1_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
179 [B2055_C1_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
180 [B2055_C1_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
181 [B2055_C1_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
182 [B2055_C1_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
183 [B2055_C1_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
184 [B2055_C1_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
185 [B2055_C2_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
186 [B2055_C2_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
187 [B2055_C2_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
188 [B2055_C2_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
189 [B2055_C2_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
190 [B2055_C2_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
191 [B2055_C2_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
192 [B2055_C2_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
193 [B2055_C2_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
194 [B2055_C2_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
195 [B2055_C2_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
196 [B2055_C2_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
197 [B2055_C2_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
198 [B2055_C2_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
199 [B2055_C2_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
200 [B2055_C2_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
201 [B2055_C2_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
202 [B2055_C2_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
203 [B2055_C2_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
204 [B2055_C2_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
205 [B2055_C2_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
206 [B2055_C2_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
207 [B2055_C2_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
208 [B2055_C2_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
209 [B2055_C2_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
210 [B2055_C2_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
211 [B2055_C2_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
212 [B2055_C2_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
213 [B2055_C2_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
214 [B2055_C2_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
215 [B2055_C2_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
216 [B2055_C2_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
217 [B2055_C2_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
218 [B2055_C2_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
219 [B2055_C2_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
220 [B2055_C2_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
221 [B2055_C2_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
222 [B2055_C2_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
223 [B2055_C2_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
224 [B2055_C2_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
225 [B2055_C2_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
226 [B2055_C2_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
227 [B2055_C2_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
228 [B2055_C2_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
229 [B2055_C2_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
230 [B2055_C2_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
231 [B2055_C2_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
232 [B2055_PRG_GCHP21] = { .ghz5 = 0x0071, .ghz2 = 0x0071, NOUPLOAD, },
233 [B2055_PRG_GCHP22] = { .ghz5 = 0x0072, .ghz2 = 0x0072, NOUPLOAD, },
234 [B2055_PRG_GCHP23] = { .ghz5 = 0x0073, .ghz2 = 0x0073, NOUPLOAD, },
235 [B2055_PRG_GCHP24] = { .ghz5 = 0x0074, .ghz2 = 0x0074, NOUPLOAD, },
236 [B2055_PRG_GCHP25] = { .ghz5 = 0x0075, .ghz2 = 0x0075, NOUPLOAD, },
237 [B2055_PRG_GCHP26] = { .ghz5 = 0x0076, .ghz2 = 0x0076, NOUPLOAD, },
238 [B2055_PRG_GCHP27] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
239 [B2055_PRG_GCHP28] = { .ghz5 = 0x0078, .ghz2 = 0x0078, NOUPLOAD, },
240 [B2055_PRG_GCHP29] = { .ghz5 = 0x0079, .ghz2 = 0x0079, NOUPLOAD, },
241 [B2055_PRG_GCHP30] = { .ghz5 = 0x007A, .ghz2 = 0x007A, NOUPLOAD, },
242 [0xC7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
243 [0xC8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
244 [0xC9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
245 [0xCA] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
246 [0xCB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
247 [0xCC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
248 [B2055_C1_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
249 [0xCE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
250 [0xCF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
251 [0xD0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
252 [0xD1] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
253 [B2055_C1_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
254 [0xD3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
255 [0xD4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
256 [0xD5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
257 [B2055_C1_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
258 [0xD7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
259 [0xD8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
260 [B2055_C2_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
261 [0xDA] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
262 [0xDB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
263 [0xDC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
264 [0xDD] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
265 [B2055_C2_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
266 [0xDF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
267 [0xE0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
268 [0xE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
269 [B2055_C2_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
270};
271
272
273void b2055_upload_inittab(struct b43_wldev *dev,
274 bool ghz5, bool ignore_uploadflag)
275{
276 const struct b2055_inittab_entry *e;
277 unsigned int i;
278 u16 value;
279
280 for (i = 0; i < ARRAY_SIZE(b2055_inittab); i++) {
281 e = &(b2055_inittab[i]);
282 if (!(e->flags & B2055_INITTAB_ENTRY_OK))
283 continue;
284 if ((e->flags & B2055_INITTAB_UPLOAD) || ignore_uploadflag) {
285 if (ghz5)
286 value = e->ghz5;
287 else
288 value = e->ghz2;
289 b43_radio_write16(dev, i, value);
290 }
291 }
292}
293
294
295#define RADIOREGS(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, \
296 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
297 .radio_pll_ref = r0, \
298 .radio_rf_pllmod0 = r1, \
299 .radio_rf_pllmod1 = r2, \
300 .radio_vco_captail = r3, \
301 .radio_vco_cal1 = r4, \
302 .radio_vco_cal2 = r5, \
303 .radio_pll_lfc1 = r6, \
304 .radio_pll_lfr1 = r7, \
305 .radio_pll_lfc2 = r8, \
306 .radio_lgbuf_cenbuf = r9, \
307 .radio_lgen_tune1 = r10, \
308 .radio_lgen_tune2 = r11, \
309 .radio_c1_lgbuf_atune = r12, \
310 .radio_c1_lgbuf_gtune = r13, \
311 .radio_c1_rx_rfr1 = r14, \
312 .radio_c1_tx_pgapadtn = r15, \
313 .radio_c1_tx_mxbgtrim = r16, \
314 .radio_c2_lgbuf_atune = r17, \
315 .radio_c2_lgbuf_gtune = r18, \
316 .radio_c2_rx_rfr1 = r19, \
317 .radio_c2_tx_pgapadtn = r20, \
318 .radio_c2_tx_mxbgtrim = r21
319
320#define PHYREGS(r0, r1, r2, r3, r4, r5) \
321 .phy_regs.phy_bw1a = r0, \
322 .phy_regs.phy_bw2 = r1, \
323 .phy_regs.phy_bw3 = r2, \
324 .phy_regs.phy_bw4 = r3, \
325 .phy_regs.phy_bw5 = r4, \
326 .phy_regs.phy_bw6 = r5
327
328static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab[] = {
329 { .channel = 184,
330 .freq = 4920, /* MHz */
331 .unk2 = 3280,
332 RADIOREGS(0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
333 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
334 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
335 PHYREGS(0xB407, 0xB007, 0xAC07, 0x1402, 0x1502, 0x1602),
336 },
337 { .channel = 186,
338 .freq = 4930, /* MHz */
339 .unk2 = 3287,
340 RADIOREGS(0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
341 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
342 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
343 PHYREGS(0xB807, 0xB407, 0xB007, 0x1302, 0x1402, 0x1502),
344 },
345 { .channel = 188,
346 .freq = 4940, /* MHz */
347 .unk2 = 3293,
348 RADIOREGS(0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
349 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
350 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
351 PHYREGS(0xBC07, 0xB807, 0xB407, 0x1202, 0x1302, 0x1402),
352 },
353 { .channel = 190,
354 .freq = 4950, /* MHz */
355 .unk2 = 3300,
356 RADIOREGS(0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
357 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
358 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
359 PHYREGS(0xC007, 0xBC07, 0xB807, 0x1102, 0x1202, 0x1302),
360 },
361 { .channel = 192,
362 .freq = 4960, /* MHz */
363 .unk2 = 3307,
364 RADIOREGS(0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
365 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
366 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
367 PHYREGS(0xC407, 0xC007, 0xBC07, 0x0F02, 0x1102, 0x1202),
368 },
369 { .channel = 194,
370 .freq = 4970, /* MHz */
371 .unk2 = 3313,
372 RADIOREGS(0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
373 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
374 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
375 PHYREGS(0xC807, 0xC407, 0xC007, 0x0E02, 0x0F02, 0x1102),
376 },
377 { .channel = 196,
378 .freq = 4980, /* MHz */
379 .unk2 = 3320,
380 RADIOREGS(0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
381 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
382 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
383 PHYREGS(0xCC07, 0xC807, 0xC407, 0x0D02, 0x0E02, 0x0F02),
384 },
385 { .channel = 198,
386 .freq = 4990, /* MHz */
387 .unk2 = 3327,
388 RADIOREGS(0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
389 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
390 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
391 PHYREGS(0xD007, 0xCC07, 0xC807, 0x0C02, 0x0D02, 0x0E02),
392 },
393 { .channel = 200,
394 .freq = 5000, /* MHz */
395 .unk2 = 3333,
396 RADIOREGS(0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
397 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
398 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
399 PHYREGS(0xD407, 0xD007, 0xCC07, 0x0B02, 0x0C02, 0x0D02),
400 },
401 { .channel = 202,
402 .freq = 5010, /* MHz */
403 .unk2 = 3340,
404 RADIOREGS(0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
405 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
406 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
407 PHYREGS(0xD807, 0xD407, 0xD007, 0x0A02, 0x0B02, 0x0C02),
408 },
409 { .channel = 204,
410 .freq = 5020, /* MHz */
411 .unk2 = 3347,
412 RADIOREGS(0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
413 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
414 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
415 PHYREGS(0xDC07, 0xD807, 0xD407, 0x0902, 0x0A02, 0x0B02),
416 },
417 { .channel = 206,
418 .freq = 5030, /* MHz */
419 .unk2 = 3353,
420 RADIOREGS(0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
421 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
422 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
423 PHYREGS(0xE007, 0xDC07, 0xD807, 0x0802, 0x0902, 0x0A02),
424 },
425 { .channel = 208,
426 .freq = 5040, /* MHz */
427 .unk2 = 3360,
428 RADIOREGS(0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
429 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
430 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
431 PHYREGS(0xE407, 0xE007, 0xDC07, 0x0702, 0x0802, 0x0902),
432 },
433 { .channel = 210,
434 .freq = 5050, /* MHz */
435 .unk2 = 3367,
436 RADIOREGS(0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
437 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
438 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
439 PHYREGS(0xE807, 0xE407, 0xE007, 0x0602, 0x0702, 0x0802),
440 },
441 { .channel = 212,
442 .freq = 5060, /* MHz */
443 .unk2 = 3373,
444 RADIOREGS(0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
445 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
446 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
447 PHYREGS(0xEC07, 0xE807, 0xE407, 0x0502, 0x0602, 0x0702),
448 },
449 { .channel = 214,
450 .freq = 5070, /* MHz */
451 .unk2 = 3380,
452 RADIOREGS(0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
453 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
454 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
455 PHYREGS(0xF007, 0xEC07, 0xE807, 0x0402, 0x0502, 0x0602),
456 },
457 { .channel = 216,
458 .freq = 5080, /* MHz */
459 .unk2 = 3387,
460 RADIOREGS(0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
461 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
462 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
463 PHYREGS(0xF407, 0xF007, 0xEC07, 0x0302, 0x0402, 0x0502),
464 },
465 { .channel = 218,
466 .freq = 5090, /* MHz */
467 .unk2 = 3393,
468 RADIOREGS(0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
469 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
470 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
471 PHYREGS(0xF807, 0xF407, 0xF007, 0x0202, 0x0302, 0x0402),
472 },
473 { .channel = 220,
474 .freq = 5100, /* MHz */
475 .unk2 = 3400,
476 RADIOREGS(0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
477 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
478 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
479 PHYREGS(0xFC07, 0xF807, 0xF407, 0x0102, 0x0202, 0x0302),
480 },
481 { .channel = 222,
482 .freq = 5110, /* MHz */
483 .unk2 = 3407,
484 RADIOREGS(0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
485 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
486 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
487 PHYREGS(0x0008, 0xFC07, 0xF807, 0x0002, 0x0102, 0x0202),
488 },
489 { .channel = 224,
490 .freq = 5120, /* MHz */
491 .unk2 = 3413,
492 RADIOREGS(0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
493 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
494 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
495 PHYREGS(0x0408, 0x0008, 0xFC07, 0xFF01, 0x0002, 0x0102),
496 },
497 { .channel = 226,
498 .freq = 5130, /* MHz */
499 .unk2 = 3420,
500 RADIOREGS(0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
501 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
502 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
503 PHYREGS(0x0808, 0x0408, 0x0008, 0xFE01, 0xFF01, 0x0002),
504 },
505 { .channel = 228,
506 .freq = 5140, /* MHz */
507 .unk2 = 3427,
508 RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A,
509 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E,
510 0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B),
511 PHYREGS(0x0C08, 0x0808, 0x0408, 0xFD01, 0xFE01, 0xFF01),
512 },
513 { .channel = 32,
514 .freq = 5160, /* MHz */
515 .unk2 = 3440,
516 RADIOREGS(0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
517 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
518 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
519 PHYREGS(0x1408, 0x1008, 0x0C08, 0xFB01, 0xFC01, 0xFD01),
520 },
521 { .channel = 34,
522 .freq = 5170, /* MHz */
523 .unk2 = 3447,
524 RADIOREGS(0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
525 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
526 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
527 PHYREGS(0x1808, 0x1408, 0x1008, 0xFA01, 0xFB01, 0xFC01),
528 },
529 { .channel = 36,
530 .freq = 5180, /* MHz */
531 .unk2 = 3453,
532 RADIOREGS(0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
533 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
534 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
535 PHYREGS(0x1C08, 0x1808, 0x1408, 0xF901, 0xFA01, 0xFB01),
536 },
537 { .channel = 38,
538 .freq = 5190, /* MHz */
539 .unk2 = 3460,
540 RADIOREGS(0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
541 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
542 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
543 PHYREGS(0x2008, 0x1C08, 0x1808, 0xF801, 0xF901, 0xFA01),
544 },
545 { .channel = 40,
546 .freq = 5200, /* MHz */
547 .unk2 = 3467,
548 RADIOREGS(0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
549 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
550 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
551 PHYREGS(0x2408, 0x2008, 0x1C08, 0xF701, 0xF801, 0xF901),
552 },
553 { .channel = 42,
554 .freq = 5210, /* MHz */
555 .unk2 = 3473,
556 RADIOREGS(0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
557 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
558 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
559 PHYREGS(0x2808, 0x2408, 0x2008, 0xF601, 0xF701, 0xF801),
560 },
561 { .channel = 44,
562 .freq = 5220, /* MHz */
563 .unk2 = 3480,
564 RADIOREGS(0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
565 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
566 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
567 PHYREGS(0x2C08, 0x2808, 0x2408, 0xF501, 0xF601, 0xF701),
568 },
569 { .channel = 46,
570 .freq = 5230, /* MHz */
571 .unk2 = 3487,
572 RADIOREGS(0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
573 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
574 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
575 PHYREGS(0x3008, 0x2C08, 0x2808, 0xF401, 0xF501, 0xF601),
576 },
577 { .channel = 48,
578 .freq = 5240, /* MHz */
579 .unk2 = 3493,
580 RADIOREGS(0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
581 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
582 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
583 PHYREGS(0x3408, 0x3008, 0x2C08, 0xF301, 0xF401, 0xF501),
584 },
585 { .channel = 50,
586 .freq = 5250, /* MHz */
587 .unk2 = 3500,
588 RADIOREGS(0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
589 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
590 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
591 PHYREGS(0x3808, 0x3408, 0x3008, 0xF201, 0xF301, 0xF401),
592 },
593 { .channel = 52,
594 .freq = 5260, /* MHz */
595 .unk2 = 3507,
596 RADIOREGS(0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A,
597 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
598 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
599 PHYREGS(0x3C08, 0x3808, 0x3408, 0xF101, 0xF201, 0xF301),
600 },
601 { .channel = 54,
602 .freq = 5270, /* MHz */
603 .unk2 = 3513,
604 RADIOREGS(0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A,
605 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
606 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
607 PHYREGS(0x4008, 0x3C08, 0x3808, 0xF001, 0xF101, 0xF201),
608 },
609 { .channel = 56,
610 .freq = 5280, /* MHz */
611 .unk2 = 3520,
612 RADIOREGS(0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A,
613 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
614 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
615 PHYREGS(0x4408, 0x4008, 0x3C08, 0xF001, 0xF001, 0xF101),
616 },
617 { .channel = 58,
618 .freq = 5290, /* MHz */
619 .unk2 = 3527,
620 RADIOREGS(0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A,
621 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
622 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
623 PHYREGS(0x4808, 0x4408, 0x4008, 0xEF01, 0xF001, 0xF001),
624 },
625 { .channel = 60,
626 .freq = 5300, /* MHz */
627 .unk2 = 3533,
628 RADIOREGS(0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A,
629 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
630 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
631 PHYREGS(0x4C08, 0x4808, 0x4408, 0xEE01, 0xEF01, 0xF001),
632 },
633 { .channel = 62,
634 .freq = 5310, /* MHz */
635 .unk2 = 3540,
636 RADIOREGS(0x71, 0x02, 0x13, 0x09, 0x8A, 0x01, 0x04, 0x0A,
637 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
638 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
639 PHYREGS(0x5008, 0x4C08, 0x4808, 0xED01, 0xEE01, 0xEF01),
640 },
641 { .channel = 64,
642 .freq = 5320, /* MHz */
643 .unk2 = 3547,
644 RADIOREGS(0x71, 0x02, 0x14, 0x09, 0x83, 0x01, 0x04, 0x0A,
645 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
646 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
647 PHYREGS(0x5408, 0x5008, 0x4C08, 0xEC01, 0xED01, 0xEE01),
648 },
649 { .channel = 66,
650 .freq = 5330, /* MHz */
651 .unk2 = 3553,
652 RADIOREGS(0x71, 0x02, 0x15, 0x09, 0x83, 0x01, 0x04, 0x0A,
653 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
654 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
655 PHYREGS(0x5808, 0x5408, 0x5008, 0xEB01, 0xEC01, 0xED01),
656 },
657 { .channel = 68,
658 .freq = 5340, /* MHz */
659 .unk2 = 3560,
660 RADIOREGS(0x71, 0x02, 0x16, 0x08, 0x7C, 0x01, 0x04, 0x0A,
661 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
662 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
663 PHYREGS(0x5C08, 0x5808, 0x5408, 0xEA01, 0xEB01, 0xEC01),
664 },
665 { .channel = 70,
666 .freq = 5350, /* MHz */
667 .unk2 = 3567,
668 RADIOREGS(0x71, 0x02, 0x17, 0x08, 0x7C, 0x01, 0x04, 0x0A,
669 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
670 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
671 PHYREGS(0x6008, 0x5C08, 0x5808, 0xE901, 0xEA01, 0xEB01),
672 },
673 { .channel = 72,
674 .freq = 5360, /* MHz */
675 .unk2 = 3573,
676 RADIOREGS(0x71, 0x02, 0x18, 0x08, 0x75, 0x01, 0x04, 0x0A,
677 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
678 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
679 PHYREGS(0x6408, 0x6008, 0x5C08, 0xE801, 0xE901, 0xEA01),
680 },
681 { .channel = 74,
682 .freq = 5370, /* MHz */
683 .unk2 = 3580,
684 RADIOREGS(0x71, 0x02, 0x19, 0x08, 0x75, 0x01, 0x04, 0x0A,
685 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
686 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
687 PHYREGS(0x6808, 0x6408, 0x6008, 0xE701, 0xE801, 0xE901),
688 },
689 { .channel = 76,
690 .freq = 5380, /* MHz */
691 .unk2 = 3587,
692 RADIOREGS(0x71, 0x02, 0x1A, 0x08, 0x6E, 0x01, 0x04, 0x0A,
693 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
694 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
695 PHYREGS(0x6C08, 0x6808, 0x6408, 0xE601, 0xE701, 0xE801),
696 },
697 { .channel = 78,
698 .freq = 5390, /* MHz */
699 .unk2 = 3593,
700 RADIOREGS(0x71, 0x02, 0x1B, 0x08, 0x6E, 0x01, 0x04, 0x0A,
701 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
702 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
703 PHYREGS(0x7008, 0x6C08, 0x6808, 0xE501, 0xE601, 0xE701),
704 },
705 { .channel = 80,
706 .freq = 5400, /* MHz */
707 .unk2 = 3600,
708 RADIOREGS(0x71, 0x02, 0x1C, 0x07, 0x67, 0x01, 0x04, 0x0A,
709 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
710 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
711 PHYREGS(0x7408, 0x7008, 0x6C08, 0xE501, 0xE501, 0xE601),
712 },
713 { .channel = 82,
714 .freq = 5410, /* MHz */
715 .unk2 = 3607,
716 RADIOREGS(0x71, 0x02, 0x1D, 0x07, 0x67, 0x01, 0x04, 0x0A,
717 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
718 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
719 PHYREGS(0x7808, 0x7408, 0x7008, 0xE401, 0xE501, 0xE501),
720 },
721 { .channel = 84,
722 .freq = 5420, /* MHz */
723 .unk2 = 3613,
724 RADIOREGS(0x71, 0x02, 0x1E, 0x07, 0x61, 0x01, 0x04, 0x0A,
725 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
726 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
727 PHYREGS(0x7C08, 0x7808, 0x7408, 0xE301, 0xE401, 0xE501),
728 },
729 { .channel = 86,
730 .freq = 5430, /* MHz */
731 .unk2 = 3620,
732 RADIOREGS(0x71, 0x02, 0x1F, 0x07, 0x61, 0x01, 0x04, 0x0A,
733 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
734 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
735 PHYREGS(0x8008, 0x7C08, 0x7808, 0xE201, 0xE301, 0xE401),
736 },
737 { .channel = 88,
738 .freq = 5440, /* MHz */
739 .unk2 = 3627,
740 RADIOREGS(0x71, 0x02, 0x20, 0x07, 0x5A, 0x01, 0x04, 0x0A,
741 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
742 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
743 PHYREGS(0x8408, 0x8008, 0x7C08, 0xE101, 0xE201, 0xE301),
744 },
745 { .channel = 90,
746 .freq = 5450, /* MHz */
747 .unk2 = 3633,
748 RADIOREGS(0x71, 0x02, 0x21, 0x07, 0x5A, 0x01, 0x04, 0x0A,
749 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
750 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
751 PHYREGS(0x8808, 0x8408, 0x8008, 0xE001, 0xE101, 0xE201),
752 },
753 { .channel = 92,
754 .freq = 5460, /* MHz */
755 .unk2 = 3640,
756 RADIOREGS(0x71, 0x02, 0x22, 0x06, 0x53, 0x01, 0x04, 0x0A,
757 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
758 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
759 PHYREGS(0x8C08, 0x8808, 0x8408, 0xDF01, 0xE001, 0xE101),
760 },
761 { .channel = 94,
762 .freq = 5470, /* MHz */
763 .unk2 = 3647,
764 RADIOREGS(0x71, 0x02, 0x23, 0x06, 0x53, 0x01, 0x04, 0x0A,
765 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
766 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
767 PHYREGS(0x9008, 0x8C08, 0x8808, 0xDE01, 0xDF01, 0xE001),
768 },
769 { .channel = 96,
770 .freq = 5480, /* MHz */
771 .unk2 = 3653,
772 RADIOREGS(0x71, 0x02, 0x24, 0x06, 0x4D, 0x01, 0x04, 0x0A,
773 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
774 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
775 PHYREGS(0x9408, 0x9008, 0x8C08, 0xDD01, 0xDE01, 0xDF01),
776 },
777 { .channel = 98,
778 .freq = 5490, /* MHz */
779 .unk2 = 3660,
780 RADIOREGS(0x71, 0x02, 0x25, 0x06, 0x4D, 0x01, 0x04, 0x0A,
781 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
782 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
783 PHYREGS(0x9808, 0x9408, 0x9008, 0xDD01, 0xDD01, 0xDE01),
784 },
785 { .channel = 100,
786 .freq = 5500, /* MHz */
787 .unk2 = 3667,
788 RADIOREGS(0x71, 0x02, 0x26, 0x06, 0x47, 0x01, 0x04, 0x0A,
789 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
790 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
791 PHYREGS(0x9C08, 0x9808, 0x9408, 0xDC01, 0xDD01, 0xDD01),
792 },
793 { .channel = 102,
794 .freq = 5510, /* MHz */
795 .unk2 = 3673,
796 RADIOREGS(0x71, 0x02, 0x27, 0x06, 0x47, 0x01, 0x04, 0x0A,
797 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
798 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
799 PHYREGS(0xA008, 0x9C08, 0x9808, 0xDB01, 0xDC01, 0xDD01),
800 },
801 { .channel = 104,
802 .freq = 5520, /* MHz */
803 .unk2 = 3680,
804 RADIOREGS(0x71, 0x02, 0x28, 0x05, 0x40, 0x01, 0x04, 0x0A,
805 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
806 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
807 PHYREGS(0xA408, 0xA008, 0x9C08, 0xDA01, 0xDB01, 0xDC01),
808 },
809 { .channel = 106,
810 .freq = 5530, /* MHz */
811 .unk2 = 3687,
812 RADIOREGS(0x71, 0x02, 0x29, 0x05, 0x40, 0x01, 0x04, 0x0A,
813 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
814 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
815 PHYREGS(0xA808, 0xA408, 0xA008, 0xD901, 0xDA01, 0xDB01),
816 },
817 { .channel = 108,
818 .freq = 5540, /* MHz */
819 .unk2 = 3693,
820 RADIOREGS(0x71, 0x02, 0x2A, 0x05, 0x3A, 0x01, 0x04, 0x0A,
821 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
822 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
823 PHYREGS(0xAC08, 0xA808, 0xA408, 0xD801, 0xD901, 0xDA01),
824 },
825 { .channel = 110,
826 .freq = 5550, /* MHz */
827 .unk2 = 3700,
828 RADIOREGS(0x71, 0x02, 0x2B, 0x05, 0x3A, 0x01, 0x04, 0x0A,
829 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
830 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
831 PHYREGS(0xB008, 0xAC08, 0xA808, 0xD701, 0xD801, 0xD901),
832 },
833 { .channel = 112,
834 .freq = 5560, /* MHz */
835 .unk2 = 3707,
836 RADIOREGS(0x71, 0x02, 0x2C, 0x05, 0x34, 0x01, 0x04, 0x0A,
837 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
838 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
839 PHYREGS(0xB408, 0xB008, 0xAC08, 0xD701, 0xD701, 0xD801),
840 },
841 { .channel = 114,
842 .freq = 5570, /* MHz */
843 .unk2 = 3713,
844 RADIOREGS(0x71, 0x02, 0x2D, 0x05, 0x34, 0x01, 0x04, 0x0A,
845 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
846 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
847 PHYREGS(0xB808, 0xB408, 0xB008, 0xD601, 0xD701, 0xD701),
848 },
849 { .channel = 116,
850 .freq = 5580, /* MHz */
851 .unk2 = 3720,
852 RADIOREGS(0x71, 0x02, 0x2E, 0x04, 0x2E, 0x01, 0x04, 0x0A,
853 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
854 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
855 PHYREGS(0xBC08, 0xB808, 0xB408, 0xD501, 0xD601, 0xD701),
856 },
857 { .channel = 118,
858 .freq = 5590, /* MHz */
859 .unk2 = 3727,
860 RADIOREGS(0x71, 0x02, 0x2F, 0x04, 0x2E, 0x01, 0x04, 0x0A,
861 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
862 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
863 PHYREGS(0xC008, 0xBC08, 0xB808, 0xD401, 0xD501, 0xD601),
864 },
865 { .channel = 120,
866 .freq = 5600, /* MHz */
867 .unk2 = 3733,
868 RADIOREGS(0x71, 0x02, 0x30, 0x04, 0x28, 0x01, 0x04, 0x0A,
869 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
870 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
871 PHYREGS(0xC408, 0xC008, 0xBC08, 0xD301, 0xD401, 0xD501),
872 },
873 { .channel = 122,
874 .freq = 5610, /* MHz */
875 .unk2 = 3740,
876 RADIOREGS(0x71, 0x02, 0x31, 0x04, 0x28, 0x01, 0x04, 0x0A,
877 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
878 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
879 PHYREGS(0xC808, 0xC408, 0xC008, 0xD201, 0xD301, 0xD401),
880 },
881 { .channel = 124,
882 .freq = 5620, /* MHz */
883 .unk2 = 3747,
884 RADIOREGS(0x71, 0x02, 0x32, 0x04, 0x21, 0x01, 0x04, 0x0A,
885 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
886 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
887 PHYREGS(0xCC08, 0xC808, 0xC408, 0xD201, 0xD201, 0xD301),
888 },
889 { .channel = 126,
890 .freq = 5630, /* MHz */
891 .unk2 = 3753,
892 RADIOREGS(0x71, 0x02, 0x33, 0x04, 0x21, 0x01, 0x04, 0x0A,
893 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
894 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
895 PHYREGS(0xD008, 0xCC08, 0xC808, 0xD101, 0xD201, 0xD201),
896 },
897 { .channel = 128,
898 .freq = 5640, /* MHz */
899 .unk2 = 3760,
900 RADIOREGS(0x71, 0x02, 0x34, 0x03, 0x1C, 0x01, 0x04, 0x0A,
901 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
902 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
903 PHYREGS(0xD408, 0xD008, 0xCC08, 0xD001, 0xD101, 0xD201),
904 },
905 { .channel = 130,
906 .freq = 5650, /* MHz */
907 .unk2 = 3767,
908 RADIOREGS(0x71, 0x02, 0x35, 0x03, 0x1C, 0x01, 0x04, 0x0A,
909 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
910 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
911 PHYREGS(0xD808, 0xD408, 0xD008, 0xCF01, 0xD001, 0xD101),
912 },
913 { .channel = 132,
914 .freq = 5660, /* MHz */
915 .unk2 = 3773,
916 RADIOREGS(0x71, 0x02, 0x36, 0x03, 0x16, 0x01, 0x04, 0x0A,
917 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
918 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
919 PHYREGS(0xDC08, 0xD808, 0xD408, 0xCE01, 0xCF01, 0xD001),
920 },
921 { .channel = 134,
922 .freq = 5670, /* MHz */
923 .unk2 = 3780,
924 RADIOREGS(0x71, 0x02, 0x37, 0x03, 0x16, 0x01, 0x04, 0x0A,
925 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
926 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
927 PHYREGS(0xE008, 0xDC08, 0xD808, 0xCE01, 0xCE01, 0xCF01),
928 },
929 { .channel = 136,
930 .freq = 5680, /* MHz */
931 .unk2 = 3787,
932 RADIOREGS(0x71, 0x02, 0x38, 0x03, 0x10, 0x01, 0x04, 0x0A,
933 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
934 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
935 PHYREGS(0xE408, 0xE008, 0xDC08, 0xCD01, 0xCE01, 0xCE01),
936 },
937 { .channel = 138,
938 .freq = 5690, /* MHz */
939 .unk2 = 3793,
940 RADIOREGS(0x71, 0x02, 0x39, 0x03, 0x10, 0x01, 0x04, 0x0A,
941 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
942 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
943 PHYREGS(0xE808, 0xE408, 0xE008, 0xCC01, 0xCD01, 0xCE01),
944 },
945 { .channel = 140,
946 .freq = 5700, /* MHz */
947 .unk2 = 3800,
948 RADIOREGS(0x71, 0x02, 0x3A, 0x02, 0x0A, 0x01, 0x04, 0x0A,
949 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
950 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
951 PHYREGS(0xEC08, 0xE808, 0xE408, 0xCB01, 0xCC01, 0xCD01),
952 },
953 { .channel = 142,
954 .freq = 5710, /* MHz */
955 .unk2 = 3807,
956 RADIOREGS(0x71, 0x02, 0x3B, 0x02, 0x0A, 0x01, 0x04, 0x0A,
957 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
958 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
959 PHYREGS(0xF008, 0xEC08, 0xE808, 0xCA01, 0xCB01, 0xCC01),
960 },
961 { .channel = 144,
962 .freq = 5720, /* MHz */
963 .unk2 = 3813,
964 RADIOREGS(0x71, 0x02, 0x3C, 0x02, 0x0A, 0x01, 0x04, 0x0A,
965 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
966 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
967 PHYREGS(0xF408, 0xF008, 0xEC08, 0xC901, 0xCA01, 0xCB01),
968 },
969 { .channel = 145,
970 .freq = 5725, /* MHz */
971 .unk2 = 3817,
972 RADIOREGS(0x72, 0x04, 0x79, 0x02, 0x03, 0x01, 0x03, 0x14,
973 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
974 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
975 PHYREGS(0xF608, 0xF208, 0xEE08, 0xC901, 0xCA01, 0xCB01),
976 },
977 { .channel = 146,
978 .freq = 5730, /* MHz */
979 .unk2 = 3820,
980 RADIOREGS(0x71, 0x02, 0x3D, 0x02, 0x0A, 0x01, 0x04, 0x0A,
981 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
982 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
983 PHYREGS(0xF808, 0xF408, 0xF008, 0xC901, 0xC901, 0xCA01),
984 },
985 { .channel = 147,
986 .freq = 5735, /* MHz */
987 .unk2 = 3823,
988 RADIOREGS(0x72, 0x04, 0x7B, 0x02, 0x03, 0x01, 0x03, 0x14,
989 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
990 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
991 PHYREGS(0xFA08, 0xF608, 0xF208, 0xC801, 0xC901, 0xCA01),
992 },
993 { .channel = 148,
994 .freq = 5740, /* MHz */
995 .unk2 = 3827,
996 RADIOREGS(0x71, 0x02, 0x3E, 0x02, 0x0A, 0x01, 0x04, 0x0A,
997 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
998 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
999 PHYREGS(0xFC08, 0xF808, 0xF408, 0xC801, 0xC901, 0xC901),
1000 },
1001 { .channel = 149,
1002 .freq = 5745, /* MHz */
1003 .unk2 = 3830,
1004 RADIOREGS(0x72, 0x04, 0x7D, 0x02, 0xFE, 0x00, 0x03, 0x14,
1005 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1006 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1007 PHYREGS(0xFE08, 0xFA08, 0xF608, 0xC801, 0xC801, 0xC901),
1008 },
1009 { .channel = 150,
1010 .freq = 5750, /* MHz */
1011 .unk2 = 3833,
1012 RADIOREGS(0x71, 0x02, 0x3F, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1013 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1014 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1015 PHYREGS(0x0009, 0xFC08, 0xF808, 0xC701, 0xC801, 0xC901),
1016 },
1017 { .channel = 151,
1018 .freq = 5755, /* MHz */
1019 .unk2 = 3837,
1020 RADIOREGS(0x72, 0x04, 0x7F, 0x02, 0xFE, 0x00, 0x03, 0x14,
1021 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1022 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1023 PHYREGS(0x0209, 0xFE08, 0xFA08, 0xC701, 0xC801, 0xC801),
1024 },
1025 { .channel = 152,
1026 .freq = 5760, /* MHz */
1027 .unk2 = 3840,
1028 RADIOREGS(0x71, 0x02, 0x40, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1029 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1030 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1031 PHYREGS(0x0409, 0x0009, 0xFC08, 0xC601, 0xC701, 0xC801),
1032 },
1033 { .channel = 153,
1034 .freq = 5765, /* MHz */
1035 .unk2 = 3843,
1036 RADIOREGS(0x72, 0x04, 0x81, 0x02, 0xF8, 0x00, 0x03, 0x14,
1037 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1038 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1039 PHYREGS(0x0609, 0x0209, 0xFE08, 0xC601, 0xC701, 0xC801),
1040 },
1041 { .channel = 154,
1042 .freq = 5770, /* MHz */
1043 .unk2 = 3847,
1044 RADIOREGS(0x71, 0x02, 0x41, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1045 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1046 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1047 PHYREGS(0x0809, 0x0409, 0x0009, 0xC601, 0xC601, 0xC701),
1048 },
1049 { .channel = 155,
1050 .freq = 5775, /* MHz */
1051 .unk2 = 3850,
1052 RADIOREGS(0x72, 0x04, 0x83, 0x02, 0xF8, 0x00, 0x03, 0x14,
1053 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1054 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1055 PHYREGS(0x0A09, 0x0609, 0x0209, 0xC501, 0xC601, 0xC701),
1056 },
1057 { .channel = 156,
1058 .freq = 5780, /* MHz */
1059 .unk2 = 3853,
1060 RADIOREGS(0x71, 0x02, 0x42, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1061 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1062 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1063 PHYREGS(0x0C09, 0x0809, 0x0409, 0xC501, 0xC601, 0xC601),
1064 },
1065 { .channel = 157,
1066 .freq = 5785, /* MHz */
1067 .unk2 = 3857,
1068 RADIOREGS(0x72, 0x04, 0x85, 0x02, 0xF2, 0x00, 0x03, 0x14,
1069 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1070 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1071 PHYREGS(0x0E09, 0x0A09, 0x0609, 0xC401, 0xC501, 0xC601),
1072 },
1073 { .channel = 158,
1074 .freq = 5790, /* MHz */
1075 .unk2 = 3860,
1076 RADIOREGS(0x71, 0x02, 0x43, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1077 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1078 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1079 PHYREGS(0x1009, 0x0C09, 0x0809, 0xC401, 0xC501, 0xC601),
1080 },
1081 { .channel = 159,
1082 .freq = 5795, /* MHz */
1083 .unk2 = 3863,
1084 RADIOREGS(0x72, 0x04, 0x87, 0x02, 0xF2, 0x00, 0x03, 0x14,
1085 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1086 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1087 PHYREGS(0x1209, 0x0E09, 0x0A09, 0xC401, 0xC401, 0xC501),
1088 },
1089 { .channel = 160,
1090 .freq = 5800, /* MHz */
1091 .unk2 = 3867,
1092 RADIOREGS(0x71, 0x02, 0x44, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1093 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1094 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1095 PHYREGS(0x1409, 0x1009, 0x0C09, 0xC301, 0xC401, 0xC501),
1096 },
1097 { .channel = 161,
1098 .freq = 5805, /* MHz */
1099 .unk2 = 3870,
1100 RADIOREGS(0x72, 0x04, 0x89, 0x01, 0xED, 0x00, 0x03, 0x14,
1101 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1102 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1103 PHYREGS(0x1609, 0x1209, 0x0E09, 0xC301, 0xC401, 0xC401),
1104 },
1105 { .channel = 162,
1106 .freq = 5810, /* MHz */
1107 .unk2 = 3873,
1108 RADIOREGS(0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1109 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1110 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1111 PHYREGS(0x1809, 0x1409, 0x1009, 0xC201, 0xC301, 0xC401),
1112 },
1113 { .channel = 163,
1114 .freq = 5815, /* MHz */
1115 .unk2 = 3877,
1116 RADIOREGS(0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14,
1117 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1118 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1119 PHYREGS(0x1A09, 0x1609, 0x1209, 0xC201, 0xC301, 0xC401),
1120 },
1121 { .channel = 164,
1122 .freq = 5820, /* MHz */
1123 .unk2 = 3880,
1124 RADIOREGS(0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1125 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1126 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1127 PHYREGS(0x1C09, 0x1809, 0x1409, 0xC201, 0xC201, 0xC301),
1128 },
1129 { .channel = 165,
1130 .freq = 5825, /* MHz */
1131 .unk2 = 3883,
1132 RADIOREGS(0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14,
1133 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1134 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1135 PHYREGS(0x1E09, 0x1A09, 0x1609, 0xC101, 0xC201, 0xC301),
1136 },
1137 { .channel = 166,
1138 .freq = 5830, /* MHz */
1139 .unk2 = 3887,
1140 RADIOREGS(0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1141 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1142 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1143 PHYREGS(0x2009, 0x1C09, 0x1809, 0xC101, 0xC201, 0xC201),
1144 },
1145 { .channel = 168,
1146 .freq = 5840, /* MHz */
1147 .unk2 = 3893,
1148 RADIOREGS(0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1149 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1150 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1151 PHYREGS(0x2409, 0x2009, 0x1C09, 0xC001, 0xC101, 0xC201),
1152 },
1153 { .channel = 170,
1154 .freq = 5850, /* MHz */
1155 .unk2 = 3900,
1156 RADIOREGS(0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A,
1157 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1158 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1159 PHYREGS(0x2809, 0x2409, 0x2009, 0xBF01, 0xC001, 0xC101),
1160 },
1161 { .channel = 172,
1162 .freq = 5860, /* MHz */
1163 .unk2 = 3907,
1164 RADIOREGS(0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A,
1165 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1166 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1167 PHYREGS(0x2C09, 0x2809, 0x2409, 0xBF01, 0xBF01, 0xC001),
1168 },
1169 { .channel = 174,
1170 .freq = 5870, /* MHz */
1171 .unk2 = 3913,
1172 RADIOREGS(0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A,
1173 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1174 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1175 PHYREGS(0x3009, 0x2C09, 0x2809, 0xBE01, 0xBF01, 0xBF01),
1176 },
1177 { .channel = 176,
1178 .freq = 5880, /* MHz */
1179 .unk2 = 3920,
1180 RADIOREGS(0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A,
1181 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1182 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1183 PHYREGS(0x3409, 0x3009, 0x2C09, 0xBD01, 0xBE01, 0xBF01),
1184 },
1185 { .channel = 178,
1186 .freq = 5890, /* MHz */
1187 .unk2 = 3927,
1188 RADIOREGS(0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1189 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1190 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1191 PHYREGS(0x3809, 0x3409, 0x3009, 0xBC01, 0xBD01, 0xBE01),
1192 },
1193 { .channel = 180,
1194 .freq = 5900, /* MHz */
1195 .unk2 = 3933,
1196 RADIOREGS(0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A,
1197 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1198 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1199 PHYREGS(0x3C09, 0x3809, 0x3409, 0xBC01, 0xBC01, 0xBD01),
1200 },
1201 { .channel = 182,
1202 .freq = 5910, /* MHz */
1203 .unk2 = 3940,
1204 RADIOREGS(0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1205 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1206 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1207 PHYREGS(0x4009, 0x3C09, 0x3809, 0xBB01, 0xBC01, 0xBC01),
1208 },
1209 { .channel = 1,
1210 .freq = 2412, /* MHz */
1211 .unk2 = 3216,
1212 RADIOREGS(0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15,
1213 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C,
1214 0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80),
1215 PHYREGS(0xC903, 0xC503, 0xC103, 0x3A04, 0x3F04, 0x4304),
1216 },
1217 { .channel = 2,
1218 .freq = 2417, /* MHz */
1219 .unk2 = 3223,
1220 RADIOREGS(0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15,
1221 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B,
1222 0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80),
1223 PHYREGS(0xCB03, 0xC703, 0xC303, 0x3804, 0x3D04, 0x4104),
1224 },
1225 { .channel = 3,
1226 .freq = 2422, /* MHz */
1227 .unk2 = 3229,
1228 RADIOREGS(0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15,
1229 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1230 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1231 PHYREGS(0xCD03, 0xC903, 0xC503, 0x3604, 0x3A04, 0x3F04),
1232 },
1233 { .channel = 4,
1234 .freq = 2427, /* MHz */
1235 .unk2 = 3236,
1236 RADIOREGS(0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15,
1237 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1238 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1239 PHYREGS(0xCF03, 0xCB03, 0xC703, 0x3404, 0x3804, 0x3D04),
1240 },
1241 { .channel = 5,
1242 .freq = 2432, /* MHz */
1243 .unk2 = 3243,
1244 RADIOREGS(0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15,
1245 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09,
1246 0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80),
1247 PHYREGS(0xD103, 0xCD03, 0xC903, 0x3104, 0x3604, 0x3A04),
1248 },
1249 { .channel = 6,
1250 .freq = 2437, /* MHz */
1251 .unk2 = 3249,
1252 RADIOREGS(0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15,
1253 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08,
1254 0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80),
1255 PHYREGS(0xD303, 0xCF03, 0xCB03, 0x2F04, 0x3404, 0x3804),
1256 },
1257 { .channel = 7,
1258 .freq = 2442, /* MHz */
1259 .unk2 = 3256,
1260 RADIOREGS(0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15,
1261 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07,
1262 0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80),
1263 PHYREGS(0xD503, 0xD103, 0xCD03, 0x2D04, 0x3104, 0x3604),
1264 },
1265 { .channel = 8,
1266 .freq = 2447, /* MHz */
1267 .unk2 = 3263,
1268 RADIOREGS(0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15,
1269 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06,
1270 0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80),
1271 PHYREGS(0xD703, 0xD303, 0xCF03, 0x2B04, 0x2F04, 0x3404),
1272 },
1273 { .channel = 9,
1274 .freq = 2452, /* MHz */
1275 .unk2 = 3269,
1276 RADIOREGS(0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15,
1277 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06,
1278 0x80, 0xFF, 0x88, 0x09, 0x06, 0x80),
1279 PHYREGS(0xD903, 0xD503, 0xD103, 0x2904, 0x2D04, 0x3104),
1280 },
1281 { .channel = 10,
1282 .freq = 2457, /* MHz */
1283 .unk2 = 3276,
1284 RADIOREGS(0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15,
1285 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05,
1286 0x80, 0xFF, 0x88, 0x08, 0x05, 0x80),
1287 PHYREGS(0xDB03, 0xD703, 0xD303, 0x2704, 0x2B04, 0x2F04),
1288 },
1289 { .channel = 11,
1290 .freq = 2462, /* MHz */
1291 .unk2 = 3283,
1292 RADIOREGS(0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15,
1293 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04,
1294 0x80, 0xFF, 0x88, 0x08, 0x04, 0x80),
1295 PHYREGS(0xDD03, 0xD903, 0xD503, 0x2404, 0x2904, 0x2D04),
1296 },
1297 { .channel = 12,
1298 .freq = 2467, /* MHz */
1299 .unk2 = 3289,
1300 RADIOREGS(0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15,
1301 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03,
1302 0x80, 0xFF, 0x88, 0x08, 0x03, 0x80),
1303 PHYREGS(0xDF03, 0xDB03, 0xD703, 0x2204, 0x2704, 0x2B04),
1304 },
1305 { .channel = 13,
1306 .freq = 2472, /* MHz */
1307 .unk2 = 3296,
1308 RADIOREGS(0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15,
1309 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03,
1310 0x80, 0xFF, 0x88, 0x07, 0x03, 0x80),
1311 PHYREGS(0xE103, 0xDD03, 0xD903, 0x2004, 0x2404, 0x2904),
1312 },
1313 { .channel = 14,
1314 .freq = 2484, /* MHz */
1315 .unk2 = 3312,
1316 RADIOREGS(0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15,
1317 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01,
1318 0x80, 0xFF, 0x88, 0x07, 0x01, 0x80),
1319 PHYREGS(0xE603, 0xE203, 0xDE03, 0x1B04, 0x1F04, 0x2404),
1320 },
1321};
1322
1323const struct b43_nphy_channeltab_entry_rev2 *
1324b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel)
1325{
1326 const struct b43_nphy_channeltab_entry_rev2 *e;
1327 unsigned int i;
1328
1329 for (i = 0; i < ARRAY_SIZE(b43_nphy_channeltab); i++) {
1330 e = &(b43_nphy_channeltab[i]);
1331 if (e->channel == channel)
1332 return e;
1333 }
1334
1335 return NULL;
1336}
1337
1338
1339static const u8 b43_ntab_adjustpower0[] = { 30static const u8 b43_ntab_adjustpower0[] = {
1340 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 31 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1341 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 32 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1342 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05, 33 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1343 0x06, 0x06, 0x06, 0x06, 0x07, 0x07, 0x07, 0x07, 34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1344 0x08, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09, 35 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1345 0x0A, 0x0A, 0x0A, 0x0A, 0x0B, 0x0B, 0x0B, 0x0B, 36 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1346 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D, 37 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1347 0x0E, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x0F, 38 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1348 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11, 39 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1349 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, 40 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1350 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, 41 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1351 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17, 0x17, 42 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1352 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x19, 43 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1353 0x1A, 0x1A, 0x1A, 0x1A, 0x1B, 0x1B, 0x1B, 0x1B, 44 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1354 0x1C, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1D, 45 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1355 0x1E, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x1F, 46 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1356}; 47};
1357 48
1358static const u8 b43_ntab_adjustpower1[] = { 49static const u8 b43_ntab_adjustpower1[] = {
1359 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 50 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1360 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 51 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1361 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05, 52 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1362 0x06, 0x06, 0x06, 0x06, 0x07, 0x07, 0x07, 0x07, 53 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1363 0x08, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09, 54 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1364 0x0A, 0x0A, 0x0A, 0x0A, 0x0B, 0x0B, 0x0B, 0x0B, 55 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1365 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D, 56 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1366 0x0E, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x0F, 57 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1367 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11, 58 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1368 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, 59 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1369 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, 60 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1370 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17, 0x17, 61 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1371 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x19, 62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1372 0x1A, 0x1A, 0x1A, 0x1A, 0x1B, 0x1B, 0x1B, 0x1B, 63 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1373 0x1C, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1D, 64 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1374 0x1E, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x1F, 65 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1375}; 66};
1376 67
1377static const u16 b43_ntab_bdi[] = { 68static const u16 b43_ntab_bdi[] = {
@@ -1439,8 +130,8 @@ static const u32 b43_ntab_framestruct[] = {
1439 0x09804506, 0x00100030, 0x09804507, 0x00100030, 130 0x09804506, 0x00100030, 0x09804507, 0x00100030,
1440 0x00000000, 0x00000000, 0x00000000, 0x00000000, 131 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1441 0x00000000, 0x00000000, 0x00000000, 0x00000000, 132 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1442 0x08004A0C, 0x00100008, 0x01000A0D, 0x00100028, 133 0x08004A0C, 0x00100004, 0x01000A0D, 0x00100024,
1443 0x0980450E, 0x00100038, 0x0980450F, 0x00100038, 134 0x0980450E, 0x00100034, 0x0980450F, 0x00100034,
1444 0x00000000, 0x00000000, 0x00000000, 0x00000000, 135 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1445 0x00000000, 0x00000000, 0x00000000, 0x00000000, 136 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1446 0x00000A04, 0x00100000, 0x11008A05, 0x00100020, 137 0x00000A04, 0x00100000, 0x11008A05, 0x00100020,
@@ -1511,13 +202,13 @@ static const u32 b43_ntab_framestruct[] = {
1511 0x53028A06, 0x01900060, 0x53028A07, 0x01900060, 202 0x53028A06, 0x01900060, 0x53028A07, 0x01900060,
1512 0x00000000, 0x00000000, 0x00000000, 0x00000000, 203 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1513 0x00000000, 0x00000000, 0x00000000, 0x00000000, 204 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1514 0x4002140C, 0x000F4810, 0x6203140D, 0x00100050, 205 0x4002140C, 0x000F4808, 0x6203140D, 0x00100048,
1515 0x53028A0E, 0x01900070, 0x53028A0F, 0x01900070, 206 0x53028A0E, 0x01900068, 0x53028A0F, 0x01900068,
1516 0x00000000, 0x00000000, 0x00000000, 0x00000000, 207 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1517 0x00000000, 0x00000000, 0x00000000, 0x00000000, 208 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1518 0x00000A0C, 0x00100008, 0x11008A0D, 0x00100028, 209 0x00000A0C, 0x00100004, 0x11008A0D, 0x00100024,
1519 0x1980C50E, 0x00100038, 0x2181050E, 0x00100038, 210 0x1980C50E, 0x00100034, 0x2181050E, 0x00100034,
1520 0x2181050E, 0x00100038, 0x0180050C, 0x00100038, 211 0x2181050E, 0x00100034, 0x0180050C, 0x00100038,
1521 0x1180850D, 0x00100038, 0x1181850D, 0x00100038, 212 0x1180850D, 0x00100038, 0x1181850D, 0x00100038,
1522 0x2981450F, 0x01100038, 0x00000000, 0x00000000, 213 0x2981450F, 0x01100038, 0x00000000, 0x00000000,
1523 0x00000000, 0x00000000, 0x00000000, 0x00000000, 214 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -1547,9 +238,9 @@ static const u32 b43_ntab_framestruct[] = {
1547 0x00000000, 0x00000000, 0x00000000, 0x00000000, 238 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1548 0x00000000, 0x00000000, 0x00000000, 0x00000000, 239 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1549 0x00000000, 0x00000000, 0x00000000, 0x00000000, 240 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1550 0x4002140C, 0x00100010, 0x0200140D, 0x00100050, 241 0x4002140C, 0x00100008, 0x0200140D, 0x00100048,
1551 0x0B004A0E, 0x01900070, 0x13008A0E, 0x01900070, 242 0x0B004A0E, 0x01900068, 0x13008A0E, 0x01900068,
1552 0x13008A0E, 0x01900070, 0x43020A0C, 0x00100070, 243 0x13008A0E, 0x01900068, 0x43020A0C, 0x00100070,
1553 0x1B00CA0D, 0x00100070, 0x1B014A0D, 0x00100070, 244 0x1B00CA0D, 0x00100070, 0x1B014A0D, 0x00100070,
1554 0x23010A0F, 0x01500070, 0x00000000, 0x00000000, 245 0x23010A0F, 0x01500070, 0x00000000, 0x00000000,
1555 0x00000000, 0x00000000, 0x00000000, 0x00000000, 246 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -1646,73 +337,73 @@ static const u32 b43_ntab_framestruct[] = {
1646}; 337};
1647 338
1648static const u32 b43_ntab_gainctl0[] = { 339static const u32 b43_ntab_gainctl0[] = {
1649 0x007F003F, 0x007E013F, 0x007D023E, 0x007C033E, 340 0x03CC2B44, 0x03CC2B42, 0x03CC2B40, 0x03CC2B3E,
1650 0x007B043D, 0x007A053D, 0x0079063C, 0x0078073C, 341 0x03CC2B3D, 0x03CC2B3B, 0x03C82B44, 0x03C82B42,
1651 0x0077083B, 0x0076093B, 0x00750A3A, 0x00740B3A, 342 0x03C82B40, 0x03C82B3E, 0x03C82B3D, 0x03C82B3B,
1652 0x00730C39, 0x00720D39, 0x00710E38, 0x00700F38, 343 0x03C82B39, 0x03C82B38, 0x03C82B36, 0x03C82B34,
1653 0x006F0037, 0x006E0137, 0x006D0236, 0x006C0336, 344 0x03C42B44, 0x03C42B42, 0x03C42B40, 0x03C42B3E,
1654 0x006B0435, 0x006A0535, 0x00690634, 0x00680734, 345 0x03C42B3D, 0x03C42B3B, 0x03C42B39, 0x03C42B38,
1655 0x00670833, 0x00660933, 0x00650A32, 0x00640B32, 346 0x03C42B36, 0x03C42B34, 0x03C42B33, 0x03C42B32,
1656 0x00630C31, 0x00620D31, 0x00610E30, 0x00600F30, 347 0x03C42B30, 0x03C42B2F, 0x03C42B2D, 0x03C02B44,
1657 0x005F002F, 0x005E012F, 0x005D022E, 0x005C032E, 348 0x03C02B42, 0x03C02B40, 0x03C02B3E, 0x03C02B3D,
1658 0x005B042D, 0x005A052D, 0x0059062C, 0x0058072C, 349 0x03C02B3B, 0x03C02B39, 0x03C02B38, 0x03C02B36,
1659 0x0057082B, 0x0056092B, 0x00550A2A, 0x00540B2A, 350 0x03C02B34, 0x03B02B44, 0x03B02B42, 0x03B02B40,
1660 0x00530C29, 0x00520D29, 0x00510E28, 0x00500F28, 351 0x03B02B3E, 0x03B02B3D, 0x03B02B3B, 0x03B02B39,
1661 0x004F0027, 0x004E0127, 0x004D0226, 0x004C0326, 352 0x03B02B38, 0x03B02B36, 0x03B02B34, 0x03B02B33,
1662 0x004B0425, 0x004A0525, 0x00490624, 0x00480724, 353 0x03B02B32, 0x03B02B30, 0x03B02B2F, 0x03B02B2D,
1663 0x00470823, 0x00460923, 0x00450A22, 0x00440B22, 354 0x03A02B44, 0x03A02B42, 0x03A02B40, 0x03A02B3E,
1664 0x00430C21, 0x00420D21, 0x00410E20, 0x00400F20, 355 0x03A02B3D, 0x03A02B3B, 0x03A02B39, 0x03A02B38,
1665 0x003F001F, 0x003E011F, 0x003D021E, 0x003C031E, 356 0x03A02B36, 0x03A02B34, 0x03902B44, 0x03902B42,
1666 0x003B041D, 0x003A051D, 0x0039061C, 0x0038071C, 357 0x03902B40, 0x03902B3E, 0x03902B3D, 0x03902B3B,
1667 0x0037081B, 0x0036091B, 0x00350A1A, 0x00340B1A, 358 0x03902B39, 0x03902B38, 0x03902B36, 0x03902B34,
1668 0x00330C19, 0x00320D19, 0x00310E18, 0x00300F18, 359 0x03902B33, 0x03902B32, 0x03902B30, 0x03802B44,
1669 0x002F0017, 0x002E0117, 0x002D0216, 0x002C0316, 360 0x03802B42, 0x03802B40, 0x03802B3E, 0x03802B3D,
1670 0x002B0415, 0x002A0515, 0x00290614, 0x00280714, 361 0x03802B3B, 0x03802B39, 0x03802B38, 0x03802B36,
1671 0x00270813, 0x00260913, 0x00250A12, 0x00240B12, 362 0x03802B34, 0x03802B33, 0x03802B32, 0x03802B30,
1672 0x00230C11, 0x00220D11, 0x00210E10, 0x00200F10, 363 0x03802B2F, 0x03802B2D, 0x03802B2C, 0x03802B2B,
1673 0x001F000F, 0x001E010F, 0x001D020E, 0x001C030E, 364 0x03802B2A, 0x03802B29, 0x03802B27, 0x03802B26,
1674 0x001B040D, 0x001A050D, 0x0019060C, 0x0018070C, 365 0x03802B25, 0x03802B24, 0x03802B23, 0x03802B22,
1675 0x0017080B, 0x0016090B, 0x00150A0A, 0x00140B0A, 366 0x03802B21, 0x03802B20, 0x03802B1F, 0x03802B1E,
1676 0x00130C09, 0x00120D09, 0x00110E08, 0x00100F08, 367 0x03802B1E, 0x03802B1D, 0x03802B1C, 0x03802B1B,
1677 0x000F0007, 0x000E0107, 0x000D0206, 0x000C0306, 368 0x03802B1A, 0x03802B1A, 0x03802B19, 0x03802B18,
1678 0x000B0405, 0x000A0505, 0x00090604, 0x00080704, 369 0x03802B18, 0x03802B18, 0x03802B18, 0x03802B18,
1679 0x00070803, 0x00060903, 0x00050A02, 0x00040B02, 370 0x03802B18, 0x03802B18, 0x03802B18, 0x03802B18,
1680 0x00030C01, 0x00020D01, 0x00010E00, 0x00000F00, 371 0x03802B18, 0x03802B18, 0x03802B18, 0x00002B00,
1681}; 372};
1682 373
1683static const u32 b43_ntab_gainctl1[] = { 374static const u32 b43_ntab_gainctl1[] = {
1684 0x007F003F, 0x007E013F, 0x007D023E, 0x007C033E, 375 0x03CC2B44, 0x03CC2B42, 0x03CC2B40, 0x03CC2B3E,
1685 0x007B043D, 0x007A053D, 0x0079063C, 0x0078073C, 376 0x03CC2B3D, 0x03CC2B3B, 0x03C82B44, 0x03C82B42,
1686 0x0077083B, 0x0076093B, 0x00750A3A, 0x00740B3A, 377 0x03C82B40, 0x03C82B3E, 0x03C82B3D, 0x03C82B3B,
1687 0x00730C39, 0x00720D39, 0x00710E38, 0x00700F38, 378 0x03C82B39, 0x03C82B38, 0x03C82B36, 0x03C82B34,
1688 0x006F0037, 0x006E0137, 0x006D0236, 0x006C0336, 379 0x03C42B44, 0x03C42B42, 0x03C42B40, 0x03C42B3E,
1689 0x006B0435, 0x006A0535, 0x00690634, 0x00680734, 380 0x03C42B3D, 0x03C42B3B, 0x03C42B39, 0x03C42B38,
1690 0x00670833, 0x00660933, 0x00650A32, 0x00640B32, 381 0x03C42B36, 0x03C42B34, 0x03C42B33, 0x03C42B32,
1691 0x00630C31, 0x00620D31, 0x00610E30, 0x00600F30, 382 0x03C42B30, 0x03C42B2F, 0x03C42B2D, 0x03C02B44,
1692 0x005F002F, 0x005E012F, 0x005D022E, 0x005C032E, 383 0x03C02B42, 0x03C02B40, 0x03C02B3E, 0x03C02B3D,
1693 0x005B042D, 0x005A052D, 0x0059062C, 0x0058072C, 384 0x03C02B3B, 0x03C02B39, 0x03C02B38, 0x03C02B36,
1694 0x0057082B, 0x0056092B, 0x00550A2A, 0x00540B2A, 385 0x03C02B34, 0x03B02B44, 0x03B02B42, 0x03B02B40,
1695 0x00530C29, 0x00520D29, 0x00510E28, 0x00500F28, 386 0x03B02B3E, 0x03B02B3D, 0x03B02B3B, 0x03B02B39,
1696 0x004F0027, 0x004E0127, 0x004D0226, 0x004C0326, 387 0x03B02B38, 0x03B02B36, 0x03B02B34, 0x03B02B33,
1697 0x004B0425, 0x004A0525, 0x00490624, 0x00480724, 388 0x03B02B32, 0x03B02B30, 0x03B02B2F, 0x03B02B2D,
1698 0x00470823, 0x00460923, 0x00450A22, 0x00440B22, 389 0x03A02B44, 0x03A02B42, 0x03A02B40, 0x03A02B3E,
1699 0x00430C21, 0x00420D21, 0x00410E20, 0x00400F20, 390 0x03A02B3D, 0x03A02B3B, 0x03A02B39, 0x03A02B38,
1700 0x003F001F, 0x003E011F, 0x003D021E, 0x003C031E, 391 0x03A02B36, 0x03A02B34, 0x03902B44, 0x03902B42,
1701 0x003B041D, 0x003A051D, 0x0039061C, 0x0038071C, 392 0x03902B40, 0x03902B3E, 0x03902B3D, 0x03902B3B,
1702 0x0037081B, 0x0036091B, 0x00350A1A, 0x00340B1A, 393 0x03902B39, 0x03902B38, 0x03902B36, 0x03902B34,
1703 0x00330C19, 0x00320D19, 0x00310E18, 0x00300F18, 394 0x03902B33, 0x03902B32, 0x03902B30, 0x03802B44,
1704 0x002F0017, 0x002E0117, 0x002D0216, 0x002C0316, 395 0x03802B42, 0x03802B40, 0x03802B3E, 0x03802B3D,
1705 0x002B0415, 0x002A0515, 0x00290614, 0x00280714, 396 0x03802B3B, 0x03802B39, 0x03802B38, 0x03802B36,
1706 0x00270813, 0x00260913, 0x00250A12, 0x00240B12, 397 0x03802B34, 0x03802B33, 0x03802B32, 0x03802B30,
1707 0x00230C11, 0x00220D11, 0x00210E10, 0x00200F10, 398 0x03802B2F, 0x03802B2D, 0x03802B2C, 0x03802B2B,
1708 0x001F000F, 0x001E010F, 0x001D020E, 0x001C030E, 399 0x03802B2A, 0x03802B29, 0x03802B27, 0x03802B26,
1709 0x001B040D, 0x001A050D, 0x0019060C, 0x0018070C, 400 0x03802B25, 0x03802B24, 0x03802B23, 0x03802B22,
1710 0x0017080B, 0x0016090B, 0x00150A0A, 0x00140B0A, 401 0x03802B21, 0x03802B20, 0x03802B1F, 0x03802B1E,
1711 0x00130C09, 0x00120D09, 0x00110E08, 0x00100F08, 402 0x03802B1E, 0x03802B1D, 0x03802B1C, 0x03802B1B,
1712 0x000F0007, 0x000E0107, 0x000D0206, 0x000C0306, 403 0x03802B1A, 0x03802B1A, 0x03802B19, 0x03802B18,
1713 0x000B0405, 0x000A0505, 0x00090604, 0x00080704, 404 0x03802B18, 0x03802B18, 0x03802B18, 0x03802B18,
1714 0x00070803, 0x00060903, 0x00050A02, 0x00040B02, 405 0x03802B18, 0x03802B18, 0x03802B18, 0x03802B18,
1715 0x00030C01, 0x00020D01, 0x00010E00, 0x00000F00, 406 0x03802B18, 0x03802B18, 0x03802B18, 0x00002B00,
1716}; 407};
1717 408
1718static const u32 b43_ntab_intlevel[] = { 409static const u32 b43_ntab_intlevel[] = {
@@ -2406,6 +1097,1080 @@ static const u32 b43_ntab_tmap[] = {
2406 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1097 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2407}; 1098};
2408 1099
1100/* static tables, PHY revision >= 3 */
1101static const u32 b43_ntab_framestruct_r3[] = {
1102 0x08004a04, 0x00100000, 0x01000a05, 0x00100020,
1103 0x09804506, 0x00100030, 0x09804507, 0x00100030,
1104 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1105 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1106 0x08004a0c, 0x00100004, 0x01000a0d, 0x00100024,
1107 0x0980450e, 0x00100034, 0x0980450f, 0x00100034,
1108 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1109 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1110 0x00000a04, 0x00100000, 0x11008a05, 0x00100020,
1111 0x1980c506, 0x00100030, 0x21810506, 0x00100030,
1112 0x21810506, 0x00100030, 0x01800504, 0x00100030,
1113 0x11808505, 0x00100030, 0x29814507, 0x01100030,
1114 0x00000a04, 0x00100000, 0x11008a05, 0x00100020,
1115 0x21810506, 0x00100030, 0x21810506, 0x00100030,
1116 0x29814507, 0x01100030, 0x00000000, 0x00000000,
1117 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1118 0x00000a0c, 0x00100008, 0x11008a0d, 0x00100028,
1119 0x1980c50e, 0x00100038, 0x2181050e, 0x00100038,
1120 0x2181050e, 0x00100038, 0x0180050c, 0x00100038,
1121 0x1180850d, 0x00100038, 0x2981450f, 0x01100038,
1122 0x00000a0c, 0x00100008, 0x11008a0d, 0x00100028,
1123 0x2181050e, 0x00100038, 0x2181050e, 0x00100038,
1124 0x2981450f, 0x01100038, 0x00000000, 0x00000000,
1125 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1126 0x08004a04, 0x00100000, 0x01000a05, 0x00100020,
1127 0x1980c506, 0x00100030, 0x1980c506, 0x00100030,
1128 0x11808504, 0x00100030, 0x3981ca05, 0x00100030,
1129 0x29814507, 0x01100030, 0x00000000, 0x00000000,
1130 0x10008a04, 0x00100000, 0x3981ca05, 0x00100030,
1131 0x1980c506, 0x00100030, 0x29814507, 0x01100030,
1132 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1133 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1134 0x08004a0c, 0x00100008, 0x01000a0d, 0x00100028,
1135 0x1980c50e, 0x00100038, 0x1980c50e, 0x00100038,
1136 0x1180850c, 0x00100038, 0x3981ca0d, 0x00100038,
1137 0x2981450f, 0x01100038, 0x00000000, 0x00000000,
1138 0x10008a0c, 0x00100008, 0x3981ca0d, 0x00100038,
1139 0x1980c50e, 0x00100038, 0x2981450f, 0x01100038,
1140 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1141 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1142 0x40021404, 0x00100000, 0x02001405, 0x00100040,
1143 0x0b004a06, 0x01900060, 0x13008a06, 0x01900060,
1144 0x13008a06, 0x01900060, 0x43020a04, 0x00100060,
1145 0x1b00ca05, 0x00100060, 0x23010a07, 0x01500060,
1146 0x40021404, 0x00100000, 0x1a00d405, 0x00100040,
1147 0x13008a06, 0x01900060, 0x13008a06, 0x01900060,
1148 0x23010a07, 0x01500060, 0x00000000, 0x00000000,
1149 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1150 0x4002140c, 0x00100010, 0x0200140d, 0x00100050,
1151 0x0b004a0e, 0x01900070, 0x13008a0e, 0x01900070,
1152 0x13008a0e, 0x01900070, 0x43020a0c, 0x00100070,
1153 0x1b00ca0d, 0x00100070, 0x23010a0f, 0x01500070,
1154 0x4002140c, 0x00100010, 0x1a00d40d, 0x00100050,
1155 0x13008a0e, 0x01900070, 0x13008a0e, 0x01900070,
1156 0x23010a0f, 0x01500070, 0x00000000, 0x00000000,
1157 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1158 0x50029404, 0x00100000, 0x32019405, 0x00100040,
1159 0x0b004a06, 0x01900060, 0x0b004a06, 0x01900060,
1160 0x5b02ca04, 0x00100060, 0x3b01d405, 0x00100060,
1161 0x23010a07, 0x01500060, 0x00000000, 0x00000000,
1162 0x5802d404, 0x00100000, 0x3b01d405, 0x00100060,
1163 0x0b004a06, 0x01900060, 0x23010a07, 0x01500060,
1164 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1165 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1166 0x5002940c, 0x00100010, 0x3201940d, 0x00100050,
1167 0x0b004a0e, 0x01900070, 0x0b004a0e, 0x01900070,
1168 0x5b02ca0c, 0x00100070, 0x3b01d40d, 0x00100070,
1169 0x23010a0f, 0x01500070, 0x00000000, 0x00000000,
1170 0x5802d40c, 0x00100010, 0x3b01d40d, 0x00100070,
1171 0x0b004a0e, 0x01900070, 0x23010a0f, 0x01500070,
1172 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1173 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1174 0x40021404, 0x000f4800, 0x62031405, 0x00100040,
1175 0x53028a06, 0x01900060, 0x53028a07, 0x01900060,
1176 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1177 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1178 0x4002140c, 0x000f4808, 0x6203140d, 0x00100048,
1179 0x53028a0e, 0x01900068, 0x53028a0f, 0x01900068,
1180 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1181 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1182 0x00000a0c, 0x00100004, 0x11008a0d, 0x00100024,
1183 0x1980c50e, 0x00100034, 0x2181050e, 0x00100034,
1184 0x2181050e, 0x00100034, 0x0180050c, 0x00100038,
1185 0x1180850d, 0x00100038, 0x1181850d, 0x00100038,
1186 0x2981450f, 0x01100038, 0x00000000, 0x00000000,
1187 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1188 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1189 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1190 0x00000a0c, 0x00100008, 0x11008a0d, 0x00100028,
1191 0x2181050e, 0x00100038, 0x2181050e, 0x00100038,
1192 0x1181850d, 0x00100038, 0x2981450f, 0x01100038,
1193 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1194 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1195 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1196 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1197 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1198 0x08004a04, 0x00100000, 0x01000a05, 0x00100020,
1199 0x0180c506, 0x00100030, 0x0180c506, 0x00100030,
1200 0x2180c50c, 0x00100030, 0x49820a0d, 0x0016a130,
1201 0x41824a0d, 0x0016a130, 0x2981450f, 0x01100030,
1202 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1203 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1204 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1205 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1206 0x2000ca0c, 0x00100000, 0x49820a0d, 0x0016a130,
1207 0x1980c50e, 0x00100030, 0x41824a0d, 0x0016a130,
1208 0x2981450f, 0x01100030, 0x00000000, 0x00000000,
1209 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1210 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1211 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1212 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1213 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1214 0x4002140c, 0x00100008, 0x0200140d, 0x00100048,
1215 0x0b004a0e, 0x01900068, 0x13008a0e, 0x01900068,
1216 0x13008a0e, 0x01900068, 0x43020a0c, 0x00100070,
1217 0x1b00ca0d, 0x00100070, 0x1b014a0d, 0x00100070,
1218 0x23010a0f, 0x01500070, 0x00000000, 0x00000000,
1219 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1220 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1221 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1222 0x4002140c, 0x00100010, 0x1a00d40d, 0x00100050,
1223 0x13008a0e, 0x01900070, 0x13008a0e, 0x01900070,
1224 0x1b014a0d, 0x00100070, 0x23010a0f, 0x01500070,
1225 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1226 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1227 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1228 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1229 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1230 0x50029404, 0x00100000, 0x32019405, 0x00100040,
1231 0x03004a06, 0x01900060, 0x03004a06, 0x01900060,
1232 0x6b030a0c, 0x00100060, 0x4b02140d, 0x0016a160,
1233 0x4302540d, 0x0016a160, 0x23010a0f, 0x01500060,
1234 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1235 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1236 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1237 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1238 0x6b03140c, 0x00100060, 0x4b02140d, 0x0016a160,
1239 0x0b004a0e, 0x01900060, 0x4302540d, 0x0016a160,
1240 0x23010a0f, 0x01500060, 0x00000000, 0x00000000,
1241 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1242 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1243 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1244 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1245 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1246 0x40021404, 0x00100000, 0x1a00d405, 0x00100040,
1247 0x53028a06, 0x01900060, 0x5b02ca06, 0x01900060,
1248 0x5b02ca06, 0x01900060, 0x43020a04, 0x00100060,
1249 0x1b00ca05, 0x00100060, 0x53028a07, 0x0190c060,
1250 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1251 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1252 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1253 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1254 0x4002140c, 0x00100010, 0x1a00d40d, 0x00100050,
1255 0x53028a0e, 0x01900070, 0x5b02ca0e, 0x01900070,
1256 0x5b02ca0e, 0x01900070, 0x43020a0c, 0x00100070,
1257 0x1b00ca0d, 0x00100070, 0x53028a0f, 0x0190c070,
1258 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1259 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1260 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1261 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1262 0x40021404, 0x00100000, 0x1a00d405, 0x00100040,
1263 0x5b02ca06, 0x01900060, 0x5b02ca06, 0x01900060,
1264 0x53028a07, 0x0190c060, 0x00000000, 0x00000000,
1265 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1266 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1267 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1268 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1269 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1270 0x4002140c, 0x00100010, 0x1a00d40d, 0x00100050,
1271 0x5b02ca0e, 0x01900070, 0x5b02ca0e, 0x01900070,
1272 0x53028a0f, 0x0190c070, 0x00000000, 0x00000000,
1273 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1274 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1275 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1276 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1277 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1278 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1279 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1280 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1281 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1282 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1283 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1284 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1285 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1286 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1287 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1288 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1289 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1290 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1291 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1292 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1293 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1294 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1295 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1296 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1297 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1298 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1299 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1300 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1301 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1302 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1303 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1304 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1305 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1306 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1307 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1308 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1309 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1310};
1311
1312static const u16 b43_ntab_pilot_r3[] = {
1313 0xff08, 0xff08, 0xff08, 0xff08, 0xff08, 0xff08,
1314 0xff08, 0xff08, 0x80d5, 0x80d5, 0x80d5, 0x80d5,
1315 0x80d5, 0x80d5, 0x80d5, 0x80d5, 0xff0a, 0xff82,
1316 0xffa0, 0xff28, 0xffff, 0xffff, 0xffff, 0xffff,
1317 0xff82, 0xffa0, 0xff28, 0xff0a, 0xffff, 0xffff,
1318 0xffff, 0xffff, 0xf83f, 0xfa1f, 0xfa97, 0xfab5,
1319 0xf2bd, 0xf0bf, 0xffff, 0xffff, 0xf017, 0xf815,
1320 0xf215, 0xf095, 0xf035, 0xf01d, 0xffff, 0xffff,
1321 0xff08, 0xff02, 0xff80, 0xff20, 0xff08, 0xff02,
1322 0xff80, 0xff20, 0xf01f, 0xf817, 0xfa15, 0xf295,
1323 0xf0b5, 0xf03d, 0xffff, 0xffff, 0xf82a, 0xfa0a,
1324 0xfa82, 0xfaa0, 0xf2a8, 0xf0aa, 0xffff, 0xffff,
1325 0xf002, 0xf800, 0xf200, 0xf080, 0xf020, 0xf008,
1326 0xffff, 0xffff, 0xf00a, 0xf802, 0xfa00, 0xf280,
1327 0xf0a0, 0xf028, 0xffff, 0xffff,
1328};
1329
1330static const u32 b43_ntab_tmap_r3[] = {
1331 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00000888,
1332 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1333 0xf1111110, 0x11111111, 0x11f11111, 0x00000111,
1334 0x11000000, 0x1111f111, 0x11111111, 0x111111f1,
1335 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x000aa888,
1336 0x88880000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1337 0xa1111110, 0x11111111, 0x11c11111, 0x00000111,
1338 0x11000000, 0x1111a111, 0x11111111, 0x111111a1,
1339 0xa2222220, 0x22222222, 0x22c22222, 0x00000222,
1340 0x22000000, 0x2222a222, 0x22222222, 0x222222a2,
1341 0xf1111110, 0x11111111, 0x11f11111, 0x00011111,
1342 0x11110000, 0x1111f111, 0x11111111, 0x111111f1,
1343 0xa8aa88a0, 0xa88888a8, 0xa8a8a88a, 0x00088aaa,
1344 0xaaaa0000, 0xa8a8aa88, 0xa88aaaaa, 0xaaaa8a8a,
1345 0xaaa8aaa0, 0x8aaa8aaa, 0xaa8a8a8a, 0x000aaa88,
1346 0x8aaa0000, 0xaaa8a888, 0x8aa88a8a, 0x8a88a888,
1347 0x08080a00, 0x0a08080a, 0x080a0a08, 0x00080808,
1348 0x080a0000, 0x080a0808, 0x080a0808, 0x0a0a0a08,
1349 0xa0a0a0a0, 0x80a0a080, 0x8080a0a0, 0x00008080,
1350 0x80a00000, 0x80a080a0, 0xa080a0a0, 0x8080a0a0,
1351 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1352 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1353 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1354 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1355 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1356 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1357 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1358 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1359 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1360 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1361 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1362 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1363 0x99999000, 0x9b9b99bb, 0x9bb99999, 0x9999b9b9,
1364 0x9b99bb90, 0x9bbbbb9b, 0x9b9b9bb9, 0x00000999,
1365 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1366 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00aaa888,
1367 0x22000000, 0x2222b222, 0x22222222, 0x222222b2,
1368 0xb2222220, 0x22222222, 0x22d22222, 0x00000222,
1369 0x11000000, 0x1111a111, 0x11111111, 0x111111a1,
1370 0xa1111110, 0x11111111, 0x11c11111, 0x00000111,
1371 0x33000000, 0x3333b333, 0x33333333, 0x333333b3,
1372 0xb3333330, 0x33333333, 0x33d33333, 0x00000333,
1373 0x22000000, 0x2222a222, 0x22222222, 0x222222a2,
1374 0xa2222220, 0x22222222, 0x22c22222, 0x00000222,
1375 0x99b99b00, 0x9b9b99bb, 0x9bb99999, 0x9999b9b9,
1376 0x9b99bb99, 0x9bbbbb9b, 0x9b9b9bb9, 0x00000999,
1377 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1378 0x8a88aa88, 0x8aaaaa8a, 0x8a8a8aa8, 0x08aaa888,
1379 0x22222200, 0x2222f222, 0x22222222, 0x222222f2,
1380 0x22222222, 0x22222222, 0x22f22222, 0x00000222,
1381 0x11000000, 0x1111f111, 0x11111111, 0x11111111,
1382 0xf1111111, 0x11111111, 0x11f11111, 0x01111111,
1383 0xbb9bb900, 0xb9b9bb99, 0xb99bbbbb, 0xbbbb9b9b,
1384 0xb9bb99bb, 0xb99999b9, 0xb9b9b99b, 0x00000bbb,
1385 0xaa000000, 0xa8a8aa88, 0xa88aaaaa, 0xaaaa8a8a,
1386 0xa8aa88aa, 0xa88888a8, 0xa8a8a88a, 0x0a888aaa,
1387 0xaa000000, 0xa8a8aa88, 0xa88aaaaa, 0xaaaa8a8a,
1388 0xa8aa88a0, 0xa88888a8, 0xa8a8a88a, 0x00000aaa,
1389 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1390 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00000888,
1391 0xbbbbbb00, 0x999bbbbb, 0x9bb99b9b, 0xb9b9b9bb,
1392 0xb9b99bbb, 0xb9b9b9bb, 0xb9bb9b99, 0x00000999,
1393 0x8a000000, 0xaa88a888, 0xa88888aa, 0xa88a8a88,
1394 0xa88aa88a, 0x88a8aaaa, 0xa8aa8aaa, 0x0888a88a,
1395 0x0b0b0b00, 0x090b0b0b, 0x0b090b0b, 0x0909090b,
1396 0x09090b0b, 0x09090b0b, 0x09090b09, 0x00000909,
1397 0x0a000000, 0x0a080808, 0x080a080a, 0x080a0a08,
1398 0x080a080a, 0x0808080a, 0x0a0a0a08, 0x0808080a,
1399 0xb0b0b000, 0x9090b0b0, 0x90b09090, 0xb0b0b090,
1400 0xb0b090b0, 0x90b0b0b0, 0xb0b09090, 0x00000090,
1401 0x80000000, 0xa080a080, 0xa08080a0, 0xa0808080,
1402 0xa080a080, 0x80a0a0a0, 0xa0a080a0, 0x00a0a0a0,
1403 0x22000000, 0x2222f222, 0x22222222, 0x222222f2,
1404 0xf2222220, 0x22222222, 0x22f22222, 0x00000222,
1405 0x11000000, 0x1111f111, 0x11111111, 0x111111f1,
1406 0xf1111110, 0x11111111, 0x11f11111, 0x00000111,
1407 0x33000000, 0x3333f333, 0x33333333, 0x333333f3,
1408 0xf3333330, 0x33333333, 0x33f33333, 0x00000333,
1409 0x22000000, 0x2222f222, 0x22222222, 0x222222f2,
1410 0xf2222220, 0x22222222, 0x22f22222, 0x00000222,
1411 0x99000000, 0x9b9b99bb, 0x9bb99999, 0x9999b9b9,
1412 0x9b99bb90, 0x9bbbbb9b, 0x9b9b9bb9, 0x00000999,
1413 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1414 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00000888,
1415 0x88888000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1416 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00000888,
1417 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1418 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00aaa888,
1419 0x88a88a00, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1420 0x8a88aa88, 0x8aaaaa8a, 0x8a8a8aa8, 0x00000888,
1421 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1422 0x8a88aa88, 0x8aaaaa8a, 0x8a8a8aa8, 0x08aaa888,
1423 0x11000000, 0x1111a111, 0x11111111, 0x111111a1,
1424 0xa1111110, 0x11111111, 0x11c11111, 0x00000111,
1425 0x11000000, 0x1111a111, 0x11111111, 0x111111a1,
1426 0xa1111110, 0x11111111, 0x11c11111, 0x00000111,
1427 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1428 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00000888,
1429 0x88000000, 0x8a8a88aa, 0x8aa88888, 0x8888a8a8,
1430 0x8a88aa80, 0x8aaaaa8a, 0x8a8a8aa8, 0x00000888,
1431 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1432 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1433 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1434 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1435 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1436 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1437 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1438 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1439 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1440 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1441 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1442 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1443};
1444
1445static const u32 b43_ntab_intlevel_r3[] = {
1446 0x00802070, 0x0671188d, 0x0a60192c, 0x0a300e46,
1447 0x00c1188d, 0x080024d2, 0x00000070,
1448};
1449
1450static const u32 b43_ntab_tdtrn_r3[] = {
1451 0x061c061c, 0x0050ee68, 0xf592fe36, 0xfe5212f6,
1452 0x00000c38, 0xfe5212f6, 0xf592fe36, 0x0050ee68,
1453 0x061c061c, 0xee680050, 0xfe36f592, 0x12f6fe52,
1454 0x0c380000, 0x12f6fe52, 0xfe36f592, 0xee680050,
1455 0x061c061c, 0x0050ee68, 0xf592fe36, 0xfe5212f6,
1456 0x00000c38, 0xfe5212f6, 0xf592fe36, 0x0050ee68,
1457 0x061c061c, 0xee680050, 0xfe36f592, 0x12f6fe52,
1458 0x0c380000, 0x12f6fe52, 0xfe36f592, 0xee680050,
1459 0x05e305e3, 0x004def0c, 0xf5f3fe47, 0xfe611246,
1460 0x00000bc7, 0xfe611246, 0xf5f3fe47, 0x004def0c,
1461 0x05e305e3, 0xef0c004d, 0xfe47f5f3, 0x1246fe61,
1462 0x0bc70000, 0x1246fe61, 0xfe47f5f3, 0xef0c004d,
1463 0x05e305e3, 0x004def0c, 0xf5f3fe47, 0xfe611246,
1464 0x00000bc7, 0xfe611246, 0xf5f3fe47, 0x004def0c,
1465 0x05e305e3, 0xef0c004d, 0xfe47f5f3, 0x1246fe61,
1466 0x0bc70000, 0x1246fe61, 0xfe47f5f3, 0xef0c004d,
1467 0xfa58fa58, 0xf895043b, 0xff4c09c0, 0xfbc6ffa8,
1468 0xfb84f384, 0x0798f6f9, 0x05760122, 0x058409f6,
1469 0x0b500000, 0x05b7f542, 0x08860432, 0x06ddfee7,
1470 0xfb84f384, 0xf9d90664, 0xf7e8025c, 0x00fff7bd,
1471 0x05a805a8, 0xf7bd00ff, 0x025cf7e8, 0x0664f9d9,
1472 0xf384fb84, 0xfee706dd, 0x04320886, 0xf54205b7,
1473 0x00000b50, 0x09f60584, 0x01220576, 0xf6f90798,
1474 0xf384fb84, 0xffa8fbc6, 0x09c0ff4c, 0x043bf895,
1475 0x02d402d4, 0x07de0270, 0xfc96079c, 0xf90afe94,
1476 0xfe00ff2c, 0x02d4065d, 0x092a0096, 0x0014fbb8,
1477 0xfd2cfd2c, 0x076afb3c, 0x0096f752, 0xf991fd87,
1478 0xfb2c0200, 0xfeb8f960, 0x08e0fc96, 0x049802a8,
1479 0xfd2cfd2c, 0x02a80498, 0xfc9608e0, 0xf960feb8,
1480 0x0200fb2c, 0xfd87f991, 0xf7520096, 0xfb3c076a,
1481 0xfd2cfd2c, 0xfbb80014, 0x0096092a, 0x065d02d4,
1482 0xff2cfe00, 0xfe94f90a, 0x079cfc96, 0x027007de,
1483 0x02d402d4, 0x027007de, 0x079cfc96, 0xfe94f90a,
1484 0xff2cfe00, 0x065d02d4, 0x0096092a, 0xfbb80014,
1485 0xfd2cfd2c, 0xfb3c076a, 0xf7520096, 0xfd87f991,
1486 0x0200fb2c, 0xf960feb8, 0xfc9608e0, 0x02a80498,
1487 0xfd2cfd2c, 0x049802a8, 0x08e0fc96, 0xfeb8f960,
1488 0xfb2c0200, 0xf991fd87, 0x0096f752, 0x076afb3c,
1489 0xfd2cfd2c, 0x0014fbb8, 0x092a0096, 0x02d4065d,
1490 0xfe00ff2c, 0xf90afe94, 0xfc96079c, 0x07de0270,
1491 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1492 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1493 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1494 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1495 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1496 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1497 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1498 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1499 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1500 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1501 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1502 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1503 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1504 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1505 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1506 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1507 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1508 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1509 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1510 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1511 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1512 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1513 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1514 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1515 0x062a0000, 0xfefa0759, 0x08b80908, 0xf396fc2d,
1516 0xf9d6045c, 0xfc4ef608, 0xf748f596, 0x07b207bf,
1517 0x062a062a, 0xf84ef841, 0xf748f596, 0x03b209f8,
1518 0xf9d6045c, 0x0c6a03d3, 0x08b80908, 0x0106f8a7,
1519 0x062a0000, 0xfefaf8a7, 0x08b8f6f8, 0xf39603d3,
1520 0xf9d6fba4, 0xfc4e09f8, 0xf7480a6a, 0x07b2f841,
1521 0x062af9d6, 0xf84e07bf, 0xf7480a6a, 0x03b2f608,
1522 0xf9d6fba4, 0x0c6afc2d, 0x08b8f6f8, 0x01060759,
1523 0x062a0000, 0xfefa0759, 0x08b80908, 0xf396fc2d,
1524 0xf9d6045c, 0xfc4ef608, 0xf748f596, 0x07b207bf,
1525 0x062a062a, 0xf84ef841, 0xf748f596, 0x03b209f8,
1526 0xf9d6045c, 0x0c6a03d3, 0x08b80908, 0x0106f8a7,
1527 0x062a0000, 0xfefaf8a7, 0x08b8f6f8, 0xf39603d3,
1528 0xf9d6fba4, 0xfc4e09f8, 0xf7480a6a, 0x07b2f841,
1529 0x062af9d6, 0xf84e07bf, 0xf7480a6a, 0x03b2f608,
1530 0xf9d6fba4, 0x0c6afc2d, 0x08b8f6f8, 0x01060759,
1531 0x061c061c, 0xff30009d, 0xffb21141, 0xfd87fb54,
1532 0xf65dfe59, 0x02eef99e, 0x0166f03c, 0xfff809b6,
1533 0x000008a4, 0x000af42b, 0x00eff577, 0xfa840bf2,
1534 0xfc02ff51, 0x08260f67, 0xfff0036f, 0x0842f9c3,
1535 0x00000000, 0x063df7be, 0xfc910010, 0xf099f7da,
1536 0x00af03fe, 0xf40e057c, 0x0a89ff11, 0x0bd5fff6,
1537 0xf75c0000, 0xf64a0008, 0x0fc4fe9a, 0x0662fd12,
1538 0x01a709a3, 0x04ac0279, 0xeebf004e, 0xff6300d0,
1539 0xf9e4f9e4, 0x00d0ff63, 0x004eeebf, 0x027904ac,
1540 0x09a301a7, 0xfd120662, 0xfe9a0fc4, 0x0008f64a,
1541 0x0000f75c, 0xfff60bd5, 0xff110a89, 0x057cf40e,
1542 0x03fe00af, 0xf7daf099, 0x0010fc91, 0xf7be063d,
1543 0x00000000, 0xf9c30842, 0x036ffff0, 0x0f670826,
1544 0xff51fc02, 0x0bf2fa84, 0xf57700ef, 0xf42b000a,
1545 0x08a40000, 0x09b6fff8, 0xf03c0166, 0xf99e02ee,
1546 0xfe59f65d, 0xfb54fd87, 0x1141ffb2, 0x009dff30,
1547 0x05e30000, 0xff060705, 0x085408a0, 0xf425fc59,
1548 0xfa1d042a, 0xfc78f67a, 0xf7acf60e, 0x075a0766,
1549 0x05e305e3, 0xf8a6f89a, 0xf7acf60e, 0x03880986,
1550 0xfa1d042a, 0x0bdb03a7, 0x085408a0, 0x00faf8fb,
1551 0x05e30000, 0xff06f8fb, 0x0854f760, 0xf42503a7,
1552 0xfa1dfbd6, 0xfc780986, 0xf7ac09f2, 0x075af89a,
1553 0x05e3fa1d, 0xf8a60766, 0xf7ac09f2, 0x0388f67a,
1554 0xfa1dfbd6, 0x0bdbfc59, 0x0854f760, 0x00fa0705,
1555 0x05e30000, 0xff060705, 0x085408a0, 0xf425fc59,
1556 0xfa1d042a, 0xfc78f67a, 0xf7acf60e, 0x075a0766,
1557 0x05e305e3, 0xf8a6f89a, 0xf7acf60e, 0x03880986,
1558 0xfa1d042a, 0x0bdb03a7, 0x085408a0, 0x00faf8fb,
1559 0x05e30000, 0xff06f8fb, 0x0854f760, 0xf42503a7,
1560 0xfa1dfbd6, 0xfc780986, 0xf7ac09f2, 0x075af89a,
1561 0x05e3fa1d, 0xf8a60766, 0xf7ac09f2, 0x0388f67a,
1562 0xfa1dfbd6, 0x0bdbfc59, 0x0854f760, 0x00fa0705,
1563 0xfa58fa58, 0xf8f0fe00, 0x0448073d, 0xfdc9fe46,
1564 0xf9910258, 0x089d0407, 0xfd5cf71a, 0x02affde0,
1565 0x083e0496, 0xff5a0740, 0xff7afd97, 0x00fe01f1,
1566 0x0009082e, 0xfa94ff75, 0xfecdf8ea, 0xffb0f693,
1567 0xfd2cfa58, 0x0433ff16, 0xfba405dd, 0xfa610341,
1568 0x06a606cb, 0x0039fd2d, 0x0677fa97, 0x01fa05e0,
1569 0xf896003e, 0x075a068b, 0x012cfc3e, 0xfa23f98d,
1570 0xfc7cfd43, 0xff90fc0d, 0x01c10982, 0x00c601d6,
1571 0xfd2cfd2c, 0x01d600c6, 0x098201c1, 0xfc0dff90,
1572 0xfd43fc7c, 0xf98dfa23, 0xfc3e012c, 0x068b075a,
1573 0x003ef896, 0x05e001fa, 0xfa970677, 0xfd2d0039,
1574 0x06cb06a6, 0x0341fa61, 0x05ddfba4, 0xff160433,
1575 0xfa58fd2c, 0xf693ffb0, 0xf8eafecd, 0xff75fa94,
1576 0x082e0009, 0x01f100fe, 0xfd97ff7a, 0x0740ff5a,
1577 0x0496083e, 0xfde002af, 0xf71afd5c, 0x0407089d,
1578 0x0258f991, 0xfe46fdc9, 0x073d0448, 0xfe00f8f0,
1579 0xfd2cfd2c, 0xfce00500, 0xfc09fddc, 0xfe680157,
1580 0x04c70571, 0xfc3aff21, 0xfcd70228, 0x056d0277,
1581 0x0200fe00, 0x0022f927, 0xfe3c032b, 0xfc44ff3c,
1582 0x03e9fbdb, 0x04570313, 0x04c9ff5c, 0x000d03b8,
1583 0xfa580000, 0xfbe900d2, 0xf9d0fe0b, 0x0125fdf9,
1584 0x042501bf, 0x0328fa2b, 0xffa902f0, 0xfa250157,
1585 0x0200fe00, 0x03740438, 0xff0405fd, 0x030cfe52,
1586 0x0037fb39, 0xff6904c5, 0x04f8fd23, 0xfd31fc1b,
1587 0xfd2cfd2c, 0xfc1bfd31, 0xfd2304f8, 0x04c5ff69,
1588 0xfb390037, 0xfe52030c, 0x05fdff04, 0x04380374,
1589 0xfe000200, 0x0157fa25, 0x02f0ffa9, 0xfa2b0328,
1590 0x01bf0425, 0xfdf90125, 0xfe0bf9d0, 0x00d2fbe9,
1591 0x0000fa58, 0x03b8000d, 0xff5c04c9, 0x03130457,
1592 0xfbdb03e9, 0xff3cfc44, 0x032bfe3c, 0xf9270022,
1593 0xfe000200, 0x0277056d, 0x0228fcd7, 0xff21fc3a,
1594 0x057104c7, 0x0157fe68, 0xfddcfc09, 0x0500fce0,
1595 0xfd2cfd2c, 0x0500fce0, 0xfddcfc09, 0x0157fe68,
1596 0x057104c7, 0xff21fc3a, 0x0228fcd7, 0x0277056d,
1597 0xfe000200, 0xf9270022, 0x032bfe3c, 0xff3cfc44,
1598 0xfbdb03e9, 0x03130457, 0xff5c04c9, 0x03b8000d,
1599 0x0000fa58, 0x00d2fbe9, 0xfe0bf9d0, 0xfdf90125,
1600 0x01bf0425, 0xfa2b0328, 0x02f0ffa9, 0x0157fa25,
1601 0xfe000200, 0x04380374, 0x05fdff04, 0xfe52030c,
1602 0xfb390037, 0x04c5ff69, 0xfd2304f8, 0xfc1bfd31,
1603 0xfd2cfd2c, 0xfd31fc1b, 0x04f8fd23, 0xff6904c5,
1604 0x0037fb39, 0x030cfe52, 0xff0405fd, 0x03740438,
1605 0x0200fe00, 0xfa250157, 0xffa902f0, 0x0328fa2b,
1606 0x042501bf, 0x0125fdf9, 0xf9d0fe0b, 0xfbe900d2,
1607 0xfa580000, 0x000d03b8, 0x04c9ff5c, 0x04570313,
1608 0x03e9fbdb, 0xfc44ff3c, 0xfe3c032b, 0x0022f927,
1609 0x0200fe00, 0x056d0277, 0xfcd70228, 0xfc3aff21,
1610 0x04c70571, 0xfe680157, 0xfc09fddc, 0xfce00500,
1611 0x05a80000, 0xff1006be, 0x0800084a, 0xf49cfc7e,
1612 0xfa580400, 0xfc9cf6da, 0xf800f672, 0x0710071c,
1613 0x05a805a8, 0xf8f0f8e4, 0xf800f672, 0x03640926,
1614 0xfa580400, 0x0b640382, 0x0800084a, 0x00f0f942,
1615 0x05a80000, 0xff10f942, 0x0800f7b6, 0xf49c0382,
1616 0xfa58fc00, 0xfc9c0926, 0xf800098e, 0x0710f8e4,
1617 0x05a8fa58, 0xf8f0071c, 0xf800098e, 0x0364f6da,
1618 0xfa58fc00, 0x0b64fc7e, 0x0800f7b6, 0x00f006be,
1619 0x05a80000, 0xff1006be, 0x0800084a, 0xf49cfc7e,
1620 0xfa580400, 0xfc9cf6da, 0xf800f672, 0x0710071c,
1621 0x05a805a8, 0xf8f0f8e4, 0xf800f672, 0x03640926,
1622 0xfa580400, 0x0b640382, 0x0800084a, 0x00f0f942,
1623 0x05a80000, 0xff10f942, 0x0800f7b6, 0xf49c0382,
1624 0xfa58fc00, 0xfc9c0926, 0xf800098e, 0x0710f8e4,
1625 0x05a8fa58, 0xf8f0071c, 0xf800098e, 0x0364f6da,
1626 0xfa58fc00, 0x0b64fc7e, 0x0800f7b6, 0x00f006be,
1627};
1628
1629static const u32 b43_ntab_noisevar0_r3[] = {
1630 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1631 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1632 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1633 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1634 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1635 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1636 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1637 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1638 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1639 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1640 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1641 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1642 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1643 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1644 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1645 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1646 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1647 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1648 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1649 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1650 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1651 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1652 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1653 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1654 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1655 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1656 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1657 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1658 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1659 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1660 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1661 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1662 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1663 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1664 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1665 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1666 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1667 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1668 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1669 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1670 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1671 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1672 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1673 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1674 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1675 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1676 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1677 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1678 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1679 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1680 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1681 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1682 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1683 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1684 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1685 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1686 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1687 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1688 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1689 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1690 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1691 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1692 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1693 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1694};
1695
1696static const u32 b43_ntab_noisevar1_r3[] = {
1697 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1698 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1699 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1700 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1701 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1702 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1703 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1704 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1705 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1706 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1707 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1708 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1709 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1710 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1711 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1712 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1713 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1714 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1715 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1716 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1717 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1718 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1719 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1720 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1721 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1722 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1723 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1724 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1725 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1726 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1727 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1728 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1729 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1730 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1731 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1732 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1733 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1734 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1735 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1736 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1737 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1738 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1739 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1740 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1741 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1742 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1743 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1744 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1745 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1746 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1747 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1748 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1749 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1750 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1751 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1752 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1753 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1754 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1755 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1756 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1757 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1758 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1759 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1760 0x02110211, 0x0000014d, 0x02110211, 0x0000014d,
1761};
1762
1763static const u16 b43_ntab_mcs_r3[] = {
1764 0x0000, 0x0008, 0x000a, 0x0010, 0x0012, 0x0019,
1765 0x001a, 0x001c, 0x0080, 0x0088, 0x008a, 0x0090,
1766 0x0092, 0x0099, 0x009a, 0x009c, 0x0100, 0x0108,
1767 0x010a, 0x0110, 0x0112, 0x0119, 0x011a, 0x011c,
1768 0x0180, 0x0188, 0x018a, 0x0190, 0x0192, 0x0199,
1769 0x019a, 0x019c, 0x0000, 0x0098, 0x00a0, 0x00a8,
1770 0x009a, 0x00a2, 0x00aa, 0x0120, 0x0128, 0x0128,
1771 0x0130, 0x0138, 0x0138, 0x0140, 0x0122, 0x012a,
1772 0x012a, 0x0132, 0x013a, 0x013a, 0x0142, 0x01a8,
1773 0x01b0, 0x01b8, 0x01b0, 0x01b8, 0x01c0, 0x01c8,
1774 0x01c0, 0x01c8, 0x01d0, 0x01d0, 0x01d8, 0x01aa,
1775 0x01b2, 0x01ba, 0x01b2, 0x01ba, 0x01c2, 0x01ca,
1776 0x01c2, 0x01ca, 0x01d2, 0x01d2, 0x01da, 0x0001,
1777 0x0002, 0x0004, 0x0009, 0x000c, 0x0011, 0x0014,
1778 0x0018, 0x0020, 0x0021, 0x0022, 0x0024, 0x0081,
1779 0x0082, 0x0084, 0x0089, 0x008c, 0x0091, 0x0094,
1780 0x0098, 0x00a0, 0x00a1, 0x00a2, 0x00a4, 0x0007,
1781 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
1782 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
1783 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
1784 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
1785 0x0007, 0x0007,
1786};
1787
1788static const u32 b43_ntab_tdi20a0_r3[] = {
1789 0x00091226, 0x000a1429, 0x000b56ad, 0x000c58b0,
1790 0x000d5ab3, 0x000e9cb6, 0x000f9eba, 0x0000c13d,
1791 0x00020301, 0x00030504, 0x00040708, 0x0005090b,
1792 0x00064b8e, 0x00095291, 0x000a5494, 0x000b9718,
1793 0x000c9927, 0x000d9b2a, 0x000edd2e, 0x000fdf31,
1794 0x000101b4, 0x000243b7, 0x000345bb, 0x000447be,
1795 0x00058982, 0x00068c05, 0x00099309, 0x000a950c,
1796 0x000bd78f, 0x000cd992, 0x000ddb96, 0x000f1d99,
1797 0x00005fa8, 0x0001422c, 0x0002842f, 0x00038632,
1798 0x00048835, 0x0005ca38, 0x0006ccbc, 0x0009d3bf,
1799 0x000b1603, 0x000c1806, 0x000d1a0a, 0x000e1c0d,
1800 0x000f5e10, 0x00008093, 0x00018297, 0x0002c49a,
1801 0x0003c680, 0x0004c880, 0x00060b00, 0x00070d00,
1802 0x00000000, 0x00000000, 0x00000000,
1803};
1804
1805static const u32 b43_ntab_tdi20a1_r3[] = {
1806 0x00014b26, 0x00028d29, 0x000393ad, 0x00049630,
1807 0x0005d833, 0x0006da36, 0x00099c3a, 0x000a9e3d,
1808 0x000bc081, 0x000cc284, 0x000dc488, 0x000f068b,
1809 0x0000488e, 0x00018b91, 0x0002d214, 0x0003d418,
1810 0x0004d6a7, 0x000618aa, 0x00071aae, 0x0009dcb1,
1811 0x000b1eb4, 0x000c0137, 0x000d033b, 0x000e053e,
1812 0x000f4702, 0x00008905, 0x00020c09, 0x0003128c,
1813 0x0004148f, 0x00051712, 0x00065916, 0x00091b19,
1814 0x000a1d28, 0x000b5f2c, 0x000c41af, 0x000d43b2,
1815 0x000e85b5, 0x000f87b8, 0x0000c9bc, 0x00024cbf,
1816 0x00035303, 0x00045506, 0x0005978a, 0x0006998d,
1817 0x00095b90, 0x000a5d93, 0x000b9f97, 0x000c821a,
1818 0x000d8400, 0x000ec600, 0x000fc800, 0x00010a00,
1819 0x00000000, 0x00000000, 0x00000000,
1820};
1821
1822static const u32 b43_ntab_tdi40a0_r3[] = {
1823 0x0011a346, 0x00136ccf, 0x0014f5d9, 0x001641e2,
1824 0x0017cb6b, 0x00195475, 0x001b2383, 0x001cad0c,
1825 0x001e7616, 0x0000821f, 0x00020ba8, 0x0003d4b2,
1826 0x00056447, 0x00072dd0, 0x0008b6da, 0x000a02e3,
1827 0x000b8c6c, 0x000d15f6, 0x0011e484, 0x0013ae0d,
1828 0x00153717, 0x00168320, 0x00180ca9, 0x00199633,
1829 0x001b6548, 0x001ceed1, 0x001eb7db, 0x0000c3e4,
1830 0x00024d6d, 0x000416f7, 0x0005a585, 0x00076f0f,
1831 0x0008f818, 0x000a4421, 0x000bcdab, 0x000d9734,
1832 0x00122649, 0x0013efd2, 0x001578dc, 0x0016c4e5,
1833 0x00184e6e, 0x001a17f8, 0x001ba686, 0x001d3010,
1834 0x001ef999, 0x00010522, 0x00028eac, 0x00045835,
1835 0x0005e74a, 0x0007b0d3, 0x00093a5d, 0x000a85e6,
1836 0x000c0f6f, 0x000dd8f9, 0x00126787, 0x00143111,
1837 0x0015ba9a, 0x00170623, 0x00188fad, 0x001a5936,
1838 0x001be84b, 0x001db1d4, 0x001f3b5e, 0x000146e7,
1839 0x00031070, 0x000499fa, 0x00062888, 0x0007f212,
1840 0x00097b9b, 0x000ac7a4, 0x000c50ae, 0x000e1a37,
1841 0x0012a94c, 0x001472d5, 0x0015fc5f, 0x00174868,
1842 0x0018d171, 0x001a9afb, 0x001c2989, 0x001df313,
1843 0x001f7c9c, 0x000188a5, 0x000351af, 0x0004db38,
1844 0x0006aa4d, 0x000833d7, 0x0009bd60, 0x000b0969,
1845 0x000c9273, 0x000e5bfc, 0x00132a8a, 0x0014b414,
1846 0x00163d9d, 0x001789a6, 0x001912b0, 0x001adc39,
1847 0x001c6bce, 0x001e34d8, 0x001fbe61, 0x0001ca6a,
1848 0x00039374, 0x00051cfd, 0x0006ec0b, 0x00087515,
1849 0x0009fe9e, 0x000b4aa7, 0x000cd3b1, 0x000e9d3a,
1850 0x00000000, 0x00000000,
1851};
1852
1853static const u32 b43_ntab_tdi40a1_r3[] = {
1854 0x001edb36, 0x000129ca, 0x0002b353, 0x00047cdd,
1855 0x0005c8e6, 0x000791ef, 0x00091bf9, 0x000aaa07,
1856 0x000c3391, 0x000dfd1a, 0x00120923, 0x0013d22d,
1857 0x00155c37, 0x0016eacb, 0x00187454, 0x001a3dde,
1858 0x001b89e7, 0x001d12f0, 0x001f1cfa, 0x00016b88,
1859 0x00033492, 0x0004be1b, 0x00060a24, 0x0007d32e,
1860 0x00095d38, 0x000aec4c, 0x000c7555, 0x000e3edf,
1861 0x00124ae8, 0x001413f1, 0x0015a37b, 0x00172c89,
1862 0x0018b593, 0x001a419c, 0x001bcb25, 0x001d942f,
1863 0x001f63b9, 0x0001ad4d, 0x00037657, 0x0004c260,
1864 0x00068be9, 0x000814f3, 0x0009a47c, 0x000b2d8a,
1865 0x000cb694, 0x000e429d, 0x00128c26, 0x001455b0,
1866 0x0015e4ba, 0x00176e4e, 0x0018f758, 0x001a8361,
1867 0x001c0cea, 0x001dd674, 0x001fa57d, 0x0001ee8b,
1868 0x0003b795, 0x0005039e, 0x0006cd27, 0x000856b1,
1869 0x0009e5c6, 0x000b6f4f, 0x000cf859, 0x000e8462,
1870 0x00130deb, 0x00149775, 0x00162603, 0x0017af8c,
1871 0x00193896, 0x001ac49f, 0x001c4e28, 0x001e17b2,
1872 0x0000a6c7, 0x00023050, 0x0003f9da, 0x00054563,
1873 0x00070eec, 0x00089876, 0x000a2704, 0x000bb08d,
1874 0x000d3a17, 0x001185a0, 0x00134f29, 0x0014d8b3,
1875 0x001667c8, 0x0017f151, 0x00197adb, 0x001b0664,
1876 0x001c8fed, 0x001e5977, 0x0000e805, 0x0002718f,
1877 0x00043b18, 0x000586a1, 0x0007502b, 0x0008d9b4,
1878 0x000a68c9, 0x000bf252, 0x000dbbdc, 0x0011c7e5,
1879 0x001390ee, 0x00151a78, 0x0016a906, 0x00183290,
1880 0x0019bc19, 0x001b4822, 0x001cd12c, 0x001e9ab5,
1881 0x00000000, 0x00000000,
1882};
1883
1884static const u32 b43_ntab_pilotlt_r3[] = {
1885 0x76540213, 0x62407351, 0x76543210, 0x76540213,
1886 0x76540213, 0x76430521,
1887};
1888
1889static const u32 b43_ntab_channelest_r3[] = {
1890 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1891 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1892 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1893 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1894 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1895 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1896 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1897 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1898 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1899 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1900 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1901 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1902 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1903 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1904 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1905 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1906 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1907 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1908 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1909 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1910 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1911 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1912 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1913 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1914};
1915
1916static const u8 b43_ntab_framelookup_r3[] = {
1917 0x02, 0x04, 0x14, 0x14, 0x03, 0x05, 0x16, 0x16,
1918 0x0a, 0x0c, 0x1c, 0x1c, 0x0b, 0x0d, 0x1e, 0x1e,
1919 0x06, 0x08, 0x18, 0x18, 0x07, 0x09, 0x1a, 0x1a,
1920 0x0e, 0x10, 0x20, 0x28, 0x0f, 0x11, 0x22, 0x2a,
1921};
1922
1923static const u8 b43_ntab_estimatepowerlt0_r3[] = {
1924 0x55, 0x54, 0x54, 0x53, 0x52, 0x52, 0x51, 0x51,
1925 0x50, 0x4f, 0x4f, 0x4e, 0x4e, 0x4d, 0x4c, 0x4c,
1926 0x4b, 0x4a, 0x49, 0x49, 0x48, 0x47, 0x46, 0x46,
1927 0x45, 0x44, 0x43, 0x42, 0x41, 0x40, 0x40, 0x3f,
1928 0x3e, 0x3d, 0x3c, 0x3a, 0x39, 0x38, 0x37, 0x36,
1929 0x35, 0x33, 0x32, 0x31, 0x2f, 0x2e, 0x2c, 0x2b,
1930 0x29, 0x27, 0x25, 0x23, 0x21, 0x1f, 0x1d, 0x1a,
1931 0x18, 0x15, 0x12, 0x0e, 0x0b, 0x07, 0x02, 0xfd,
1932};
1933
1934static const u8 b43_ntab_estimatepowerlt1_r3[] = {
1935 0x55, 0x54, 0x54, 0x53, 0x52, 0x52, 0x51, 0x51,
1936 0x50, 0x4f, 0x4f, 0x4e, 0x4e, 0x4d, 0x4c, 0x4c,
1937 0x4b, 0x4a, 0x49, 0x49, 0x48, 0x47, 0x46, 0x46,
1938 0x45, 0x44, 0x43, 0x42, 0x41, 0x40, 0x40, 0x3f,
1939 0x3e, 0x3d, 0x3c, 0x3a, 0x39, 0x38, 0x37, 0x36,
1940 0x35, 0x33, 0x32, 0x31, 0x2f, 0x2e, 0x2c, 0x2b,
1941 0x29, 0x27, 0x25, 0x23, 0x21, 0x1f, 0x1d, 0x1a,
1942 0x18, 0x15, 0x12, 0x0e, 0x0b, 0x07, 0x02, 0xfd,
1943};
1944
1945static const u8 b43_ntab_adjustpower0_r3[] = {
1946 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1947 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1948 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1949 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1950 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1951 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1952 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1953 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1954 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1955 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1956 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1957 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1958 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1959 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1960 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1961 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1962};
1963
1964static const u8 b43_ntab_adjustpower1_r3[] = {
1965 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1966 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1967 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1968 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1969 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1970 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1971 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1972 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1973 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1974 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1975 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1976 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1977 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1978 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1979 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1980 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1981};
1982
1983static const u32 b43_ntab_gainctl0_r3[] = {
1984 0x5bf70044, 0x5bf70042, 0x5bf70040, 0x5bf7003e,
1985 0x5bf7003c, 0x5bf7003b, 0x5bf70039, 0x5bf70037,
1986 0x5bf70036, 0x5bf70034, 0x5bf70033, 0x5bf70031,
1987 0x5bf70030, 0x5ba70044, 0x5ba70042, 0x5ba70040,
1988 0x5ba7003e, 0x5ba7003c, 0x5ba7003b, 0x5ba70039,
1989 0x5ba70037, 0x5ba70036, 0x5ba70034, 0x5ba70033,
1990 0x5b770044, 0x5b770042, 0x5b770040, 0x5b77003e,
1991 0x5b77003c, 0x5b77003b, 0x5b770039, 0x5b770037,
1992 0x5b770036, 0x5b770034, 0x5b770033, 0x5b770031,
1993 0x5b770030, 0x5b77002f, 0x5b77002d, 0x5b77002c,
1994 0x5b470044, 0x5b470042, 0x5b470040, 0x5b47003e,
1995 0x5b47003c, 0x5b47003b, 0x5b470039, 0x5b470037,
1996 0x5b470036, 0x5b470034, 0x5b470033, 0x5b470031,
1997 0x5b470030, 0x5b47002f, 0x5b47002d, 0x5b47002c,
1998 0x5b47002b, 0x5b47002a, 0x5b270044, 0x5b270042,
1999 0x5b270040, 0x5b27003e, 0x5b27003c, 0x5b27003b,
2000 0x5b270039, 0x5b270037, 0x5b270036, 0x5b270034,
2001 0x5b270033, 0x5b270031, 0x5b270030, 0x5b27002f,
2002 0x5b170044, 0x5b170042, 0x5b170040, 0x5b17003e,
2003 0x5b17003c, 0x5b17003b, 0x5b170039, 0x5b170037,
2004 0x5b170036, 0x5b170034, 0x5b170033, 0x5b170031,
2005 0x5b170030, 0x5b17002f, 0x5b17002d, 0x5b17002c,
2006 0x5b17002b, 0x5b17002a, 0x5b170028, 0x5b170027,
2007 0x5b170026, 0x5b170025, 0x5b170024, 0x5b170023,
2008 0x5b070044, 0x5b070042, 0x5b070040, 0x5b07003e,
2009 0x5b07003c, 0x5b07003b, 0x5b070039, 0x5b070037,
2010 0x5b070036, 0x5b070034, 0x5b070033, 0x5b070031,
2011 0x5b070030, 0x5b07002f, 0x5b07002d, 0x5b07002c,
2012 0x5b07002b, 0x5b07002a, 0x5b070028, 0x5b070027,
2013 0x5b070026, 0x5b070025, 0x5b070024, 0x5b070023,
2014 0x5b070022, 0x5b070021, 0x5b070020, 0x5b07001f,
2015 0x5b07001e, 0x5b07001d, 0x5b07001d, 0x5b07001c,
2016};
2017
2018static const u32 b43_ntab_gainctl1_r3[] = {
2019 0x5bf70044, 0x5bf70042, 0x5bf70040, 0x5bf7003e,
2020 0x5bf7003c, 0x5bf7003b, 0x5bf70039, 0x5bf70037,
2021 0x5bf70036, 0x5bf70034, 0x5bf70033, 0x5bf70031,
2022 0x5bf70030, 0x5ba70044, 0x5ba70042, 0x5ba70040,
2023 0x5ba7003e, 0x5ba7003c, 0x5ba7003b, 0x5ba70039,
2024 0x5ba70037, 0x5ba70036, 0x5ba70034, 0x5ba70033,
2025 0x5b770044, 0x5b770042, 0x5b770040, 0x5b77003e,
2026 0x5b77003c, 0x5b77003b, 0x5b770039, 0x5b770037,
2027 0x5b770036, 0x5b770034, 0x5b770033, 0x5b770031,
2028 0x5b770030, 0x5b77002f, 0x5b77002d, 0x5b77002c,
2029 0x5b470044, 0x5b470042, 0x5b470040, 0x5b47003e,
2030 0x5b47003c, 0x5b47003b, 0x5b470039, 0x5b470037,
2031 0x5b470036, 0x5b470034, 0x5b470033, 0x5b470031,
2032 0x5b470030, 0x5b47002f, 0x5b47002d, 0x5b47002c,
2033 0x5b47002b, 0x5b47002a, 0x5b270044, 0x5b270042,
2034 0x5b270040, 0x5b27003e, 0x5b27003c, 0x5b27003b,
2035 0x5b270039, 0x5b270037, 0x5b270036, 0x5b270034,
2036 0x5b270033, 0x5b270031, 0x5b270030, 0x5b27002f,
2037 0x5b170044, 0x5b170042, 0x5b170040, 0x5b17003e,
2038 0x5b17003c, 0x5b17003b, 0x5b170039, 0x5b170037,
2039 0x5b170036, 0x5b170034, 0x5b170033, 0x5b170031,
2040 0x5b170030, 0x5b17002f, 0x5b17002d, 0x5b17002c,
2041 0x5b17002b, 0x5b17002a, 0x5b170028, 0x5b170027,
2042 0x5b170026, 0x5b170025, 0x5b170024, 0x5b170023,
2043 0x5b070044, 0x5b070042, 0x5b070040, 0x5b07003e,
2044 0x5b07003c, 0x5b07003b, 0x5b070039, 0x5b070037,
2045 0x5b070036, 0x5b070034, 0x5b070033, 0x5b070031,
2046 0x5b070030, 0x5b07002f, 0x5b07002d, 0x5b07002c,
2047 0x5b07002b, 0x5b07002a, 0x5b070028, 0x5b070027,
2048 0x5b070026, 0x5b070025, 0x5b070024, 0x5b070023,
2049 0x5b070022, 0x5b070021, 0x5b070020, 0x5b07001f,
2050 0x5b07001e, 0x5b07001d, 0x5b07001d, 0x5b07001c,
2051};
2052
2053static const u32 b43_ntab_iqlt0_r3[] = {
2054 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2055 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2056 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2057 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2058 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2059 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2060 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2061 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2062 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2063 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2064 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2065 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2066 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2067 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2068 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2069 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2070 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2071 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2072 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2073 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2074 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2075 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2076 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2077 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2078 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2079 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2080 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2081 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2082 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2083 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2084 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2085 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2086};
2087
2088static const u32 b43_ntab_iqlt1_r3[] = {
2089 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2090 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2091 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2092 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2093 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2094 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2095 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2096 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2097 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2098 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2099 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2100 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2101 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2102 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2103 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2104 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2105 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2106 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2107 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2108 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2109 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2110 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2111 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2112 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2113 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2114 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2115 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2116 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2117 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2118 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2119 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2120 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2121};
2122
2123static const u16 b43_ntab_loftlt0_r3[] = {
2124 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2125 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2126 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2127 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2128 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2129 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2130 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2131 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2132 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2133 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2134 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2135 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2136 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2137 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2138 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2139 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2140 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2141 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2142 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2143 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2144 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2145 0x0000, 0x0000,
2146};
2147
2148static const u16 b43_ntab_loftlt1_r3[] = {
2149 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2150 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2151 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2152 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2153 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2154 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2155 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2156 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2157 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2158 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2159 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2160 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2161 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2162 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2163 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2164 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2165 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2166 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2167 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2168 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2169 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
2170 0x0000, 0x0000,
2171};
2172
2173/* TX gain tables */
2409const u32 b43_ntab_tx_gain_rev0_1_2[] = { 2174const u32 b43_ntab_tx_gain_rev0_1_2[] = {
2410 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42, 2175 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42,
2411 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44, 2176 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44,
@@ -2944,6 +2709,79 @@ const struct nphy_rf_control_override_rev3 tbl_rf_control_override_rev3[] = {
2944 { 0x00C0, 6, 0xE7, 0xF9, 0xEC, 0xFB } /* field == 0x4000 (fls 15) */ 2709 { 0x00C0, 6, 0xE7, 0xF9, 0xEC, 0xFB } /* field == 0x4000 (fls 15) */
2945}; 2710};
2946 2711
2712struct nphy_gain_ctl_workaround_entry nphy_gain_ctl_workaround[2][3] = {
2713 { /* 2GHz */
2714 { /* PHY rev 3 */
2715 { 7, 11, 16, 23 },
2716 { -5, 6, 10, 14 },
2717 { 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA },
2718 { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 },
2719 0x627E,
2720 { 0x613F, 0x613F, 0x613F, 0x613F },
2721 0x107E, 0x0066, 0x0074,
2722 0x18, 0x18, 0x18,
2723 0x020D, 0x5,
2724 },
2725 { /* PHY rev 4 */
2726 { 8, 12, 17, 25 },
2727 { -5, 6, 10, 14 },
2728 { 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA },
2729 { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 },
2730 0x527E,
2731 { 0x513F, 0x513F, 0x513F, 0x513F },
2732 0x007E, 0x0066, 0x0074,
2733 0x18, 0x18, 0x18,
2734 0x01A1, 0x5,
2735 },
2736 { /* PHY rev 5+ */
2737 { 9, 13, 18, 26 },
2738 { -3, 7, 11, 16 },
2739 { 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA },
2740 { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 },
2741 0x427E, /* invalid for external LNA! */
2742 { 0x413F, 0x413F, 0x413F, 0x413F }, /* invalid for external LNA! */
2743 0x1076, 0x0066, 0x106A,
2744 0xC, 0xC, 0xC,
2745 0x01D0, 0x5,
2746 },
2747 },
2748 { /* 5GHz */
2749 { /* PHY rev 3 */
2750 { 7, 11, 17, 23 },
2751 { -6, 2, 6, 10 },
2752 { 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 },
2753 { 6, 6, 6, 6, 6, 6, 6, 6, 6, 6 },
2754 0x52DE,
2755 { 0x516F, 0x516F, 0x516F, 0x516F },
2756 0x00DE, 0x00CA, 0x00CC,
2757 0x1E, 0x1E, 0x1E,
2758 0x01A1, 25,
2759 },
2760 { /* PHY rev 4 */
2761 { 8, 12, 18, 23 },
2762 { -5, 2, 6, 10 },
2763 { 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD },
2764 { 4, 4, 4, 4, 4, 4, 4, 4, 4, 4 },
2765 0x629E,
2766 { 0x614F, 0x614F, 0x614F, 0x614F },
2767 0x029E, 0x1084, 0x0086,
2768 0x24, 0x24, 0x24,
2769 0x0107, 25,
2770 },
2771 { /* PHY rev 5+ */
2772 { 6, 10, 16, 21 },
2773 { -7, 0, 4, 8 },
2774 { 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD },
2775 { 4, 4, 4, 4, 4, 4, 4, 4, 4, 4 },
2776 0x729E,
2777 { 0x714F, 0x714F, 0x714F, 0x714F },
2778 0x029E, 0x2084, 0x2086,
2779 0x24, 0x24, 0x24,
2780 0x00A9, 25,
2781 },
2782 },
2783};
2784
2947static inline void assert_ntab_array_sizes(void) 2785static inline void assert_ntab_array_sizes(void)
2948{ 2786{
2949#undef check 2787#undef check
@@ -3120,11 +2958,8 @@ void b43_ntab_write_bulk(struct b43_wldev *dev, u32 offset,
3120} 2958}
3121 2959
3122#define ntab_upload(dev, offset, data) do { \ 2960#define ntab_upload(dev, offset, data) do { \
3123 unsigned int i; \ 2961 b43_ntab_write_bulk(dev, offset, offset##_SIZE, data); \
3124 for (i = 0; i < (offset##_SIZE); i++) \
3125 b43_ntab_write(dev, (offset) + i, (data)[i]); \
3126 } while (0) 2962 } while (0)
3127
3128void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev) 2963void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev)
3129{ 2964{
3130 /* Static tables */ 2965 /* Static tables */
@@ -3134,35 +2969,94 @@ void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev)
3134 ntab_upload(dev, B43_NTAB_TDTRN, b43_ntab_tdtrn); 2969 ntab_upload(dev, B43_NTAB_TDTRN, b43_ntab_tdtrn);
3135 ntab_upload(dev, B43_NTAB_INTLEVEL, b43_ntab_intlevel); 2970 ntab_upload(dev, B43_NTAB_INTLEVEL, b43_ntab_intlevel);
3136 ntab_upload(dev, B43_NTAB_PILOT, b43_ntab_pilot); 2971 ntab_upload(dev, B43_NTAB_PILOT, b43_ntab_pilot);
3137 ntab_upload(dev, B43_NTAB_PILOTLT, b43_ntab_pilotlt);
3138 ntab_upload(dev, B43_NTAB_TDI20A0, b43_ntab_tdi20a0); 2972 ntab_upload(dev, B43_NTAB_TDI20A0, b43_ntab_tdi20a0);
3139 ntab_upload(dev, B43_NTAB_TDI20A1, b43_ntab_tdi20a1); 2973 ntab_upload(dev, B43_NTAB_TDI20A1, b43_ntab_tdi20a1);
3140 ntab_upload(dev, B43_NTAB_TDI40A0, b43_ntab_tdi40a0); 2974 ntab_upload(dev, B43_NTAB_TDI40A0, b43_ntab_tdi40a0);
3141 ntab_upload(dev, B43_NTAB_TDI40A1, b43_ntab_tdi40a1); 2975 ntab_upload(dev, B43_NTAB_TDI40A1, b43_ntab_tdi40a1);
3142 ntab_upload(dev, B43_NTAB_BDI, b43_ntab_bdi);
3143 ntab_upload(dev, B43_NTAB_CHANEST, b43_ntab_channelest); 2976 ntab_upload(dev, B43_NTAB_CHANEST, b43_ntab_channelest);
3144 ntab_upload(dev, B43_NTAB_MCS, b43_ntab_mcs); 2977 ntab_upload(dev, B43_NTAB_MCS, b43_ntab_mcs);
3145
3146 /* Volatile tables */
3147 ntab_upload(dev, B43_NTAB_NOISEVAR10, b43_ntab_noisevar10); 2978 ntab_upload(dev, B43_NTAB_NOISEVAR10, b43_ntab_noisevar10);
3148 ntab_upload(dev, B43_NTAB_NOISEVAR11, b43_ntab_noisevar11); 2979 ntab_upload(dev, B43_NTAB_NOISEVAR11, b43_ntab_noisevar11);
2980
2981 /* Volatile tables */
2982 ntab_upload(dev, B43_NTAB_BDI, b43_ntab_bdi);
2983 ntab_upload(dev, B43_NTAB_PILOTLT, b43_ntab_pilotlt);
2984 ntab_upload(dev, B43_NTAB_C0_GAINCTL, b43_ntab_gainctl0);
2985 ntab_upload(dev, B43_NTAB_C1_GAINCTL, b43_ntab_gainctl1);
3149 ntab_upload(dev, B43_NTAB_C0_ESTPLT, b43_ntab_estimatepowerlt0); 2986 ntab_upload(dev, B43_NTAB_C0_ESTPLT, b43_ntab_estimatepowerlt0);
3150 ntab_upload(dev, B43_NTAB_C1_ESTPLT, b43_ntab_estimatepowerlt1); 2987 ntab_upload(dev, B43_NTAB_C1_ESTPLT, b43_ntab_estimatepowerlt1);
3151 ntab_upload(dev, B43_NTAB_C0_ADJPLT, b43_ntab_adjustpower0); 2988 ntab_upload(dev, B43_NTAB_C0_ADJPLT, b43_ntab_adjustpower0);
3152 ntab_upload(dev, B43_NTAB_C1_ADJPLT, b43_ntab_adjustpower1); 2989 ntab_upload(dev, B43_NTAB_C1_ADJPLT, b43_ntab_adjustpower1);
3153 ntab_upload(dev, B43_NTAB_C0_GAINCTL, b43_ntab_gainctl0);
3154 ntab_upload(dev, B43_NTAB_C1_GAINCTL, b43_ntab_gainctl1);
3155 ntab_upload(dev, B43_NTAB_C0_IQLT, b43_ntab_iqlt0); 2990 ntab_upload(dev, B43_NTAB_C0_IQLT, b43_ntab_iqlt0);
3156 ntab_upload(dev, B43_NTAB_C1_IQLT, b43_ntab_iqlt1); 2991 ntab_upload(dev, B43_NTAB_C1_IQLT, b43_ntab_iqlt1);
3157 ntab_upload(dev, B43_NTAB_C0_LOFEEDTH, b43_ntab_loftlt0); 2992 ntab_upload(dev, B43_NTAB_C0_LOFEEDTH, b43_ntab_loftlt0);
3158 ntab_upload(dev, B43_NTAB_C1_LOFEEDTH, b43_ntab_loftlt1); 2993 ntab_upload(dev, B43_NTAB_C1_LOFEEDTH, b43_ntab_loftlt1);
3159} 2994}
3160 2995
2996#define ntab_upload_r3(dev, offset, data) do { \
2997 b43_ntab_write_bulk(dev, offset, ARRAY_SIZE(data), data); \
2998 } while (0)
3161void b43_nphy_rev3plus_tables_init(struct b43_wldev *dev) 2999void b43_nphy_rev3plus_tables_init(struct b43_wldev *dev)
3162{ 3000{
3163 /* Static tables */ 3001 /* Static tables */
3164 /* TODO */ 3002 ntab_upload_r3(dev, B43_NTAB_FRAMESTRUCT_R3, b43_ntab_framestruct_r3);
3003 ntab_upload_r3(dev, B43_NTAB_PILOT_R3, b43_ntab_pilot_r3);
3004 ntab_upload_r3(dev, B43_NTAB_TMAP_R3, b43_ntab_tmap_r3);
3005 ntab_upload_r3(dev, B43_NTAB_INTLEVEL_R3, b43_ntab_intlevel_r3);
3006 ntab_upload_r3(dev, B43_NTAB_TDTRN_R3, b43_ntab_tdtrn_r3);
3007 ntab_upload_r3(dev, B43_NTAB_NOISEVAR0_R3, b43_ntab_noisevar0_r3);
3008 ntab_upload_r3(dev, B43_NTAB_NOISEVAR1_R3, b43_ntab_noisevar1_r3);
3009 ntab_upload_r3(dev, B43_NTAB_MCS_R3, b43_ntab_mcs_r3);
3010 ntab_upload_r3(dev, B43_NTAB_TDI20A0_R3, b43_ntab_tdi20a0_r3);
3011 ntab_upload_r3(dev, B43_NTAB_TDI20A1_R3, b43_ntab_tdi20a1_r3);
3012 ntab_upload_r3(dev, B43_NTAB_TDI40A0_R3, b43_ntab_tdi40a0_r3);
3013 ntab_upload_r3(dev, B43_NTAB_TDI40A1_R3, b43_ntab_tdi40a1_r3);
3014 ntab_upload_r3(dev, B43_NTAB_PILOTLT_R3, b43_ntab_pilotlt_r3);
3015 ntab_upload_r3(dev, B43_NTAB_CHANEST_R3, b43_ntab_channelest_r3);
3016 ntab_upload_r3(dev, B43_NTAB_FRAMELT_R3, b43_ntab_framelookup_r3);
3017 ntab_upload_r3(dev, B43_NTAB_C0_ESTPLT_R3,
3018 b43_ntab_estimatepowerlt0_r3);
3019 ntab_upload_r3(dev, B43_NTAB_C1_ESTPLT_R3,
3020 b43_ntab_estimatepowerlt1_r3);
3021 ntab_upload_r3(dev, B43_NTAB_C0_ADJPLT_R3, b43_ntab_adjustpower0_r3);
3022 ntab_upload_r3(dev, B43_NTAB_C1_ADJPLT_R3, b43_ntab_adjustpower1_r3);
3023 ntab_upload_r3(dev, B43_NTAB_C0_GAINCTL_R3, b43_ntab_gainctl0_r3);
3024 ntab_upload_r3(dev, B43_NTAB_C1_GAINCTL_R3, b43_ntab_gainctl1_r3);
3025 ntab_upload_r3(dev, B43_NTAB_C0_IQLT_R3, b43_ntab_iqlt0_r3);
3026 ntab_upload_r3(dev, B43_NTAB_C1_IQLT_R3, b43_ntab_iqlt1_r3);
3027 ntab_upload_r3(dev, B43_NTAB_C0_LOFEEDTH_R3, b43_ntab_loftlt0_r3);
3028 ntab_upload_r3(dev, B43_NTAB_C1_LOFEEDTH_R3, b43_ntab_loftlt1_r3);
3165 3029
3166 /* Volatile tables */ 3030 /* Volatile tables */
3167 /* TODO */ 3031 /* TODO */
3168} 3032}
3033
3034struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
3035 struct b43_wldev *dev, bool ghz5, bool ext_lna)
3036{
3037 struct nphy_gain_ctl_workaround_entry *e;
3038 u8 phy_idx;
3039
3040 B43_WARN_ON(dev->phy.rev < 3);
3041 if (dev->phy.rev >= 5)
3042 phy_idx = 2;
3043 else if (dev->phy.rev == 4)
3044 phy_idx = 1;
3045 else
3046 phy_idx = 0;
3047
3048 e = &nphy_gain_ctl_workaround[ghz5][phy_idx];
3049
3050 /* Only one entry differs for external LNA, so instead making whole
3051 * table 2 times bigger, hack is here
3052 */
3053 if (!ghz5 && dev->phy.rev >= 5 && ext_lna) {
3054 e->rfseq_init[0] &= 0x0FFF;
3055 e->rfseq_init[1] &= 0x0FFF;
3056 e->rfseq_init[2] &= 0x0FFF;
3057 e->rfseq_init[3] &= 0x0FFF;
3058 e->init_gain &= 0x0FFF;
3059 }
3060
3061 return e;
3062}
diff --git a/drivers/net/wireless/b43/tables_nphy.h b/drivers/net/wireless/b43/tables_nphy.h
index 8fc1da9f8fe5..18569367ce43 100644
--- a/drivers/net/wireless/b43/tables_nphy.h
+++ b/drivers/net/wireless/b43/tables_nphy.h
@@ -3,7 +3,6 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5 5
6
7struct b43_phy_n_sfo_cfg { 6struct b43_phy_n_sfo_cfg {
8 u16 phy_bw1a; 7 u16 phy_bw1a;
9 u16 phy_bw2; 8 u16 phy_bw2;
@@ -13,52 +12,6 @@ struct b43_phy_n_sfo_cfg {
13 u16 phy_bw6; 12 u16 phy_bw6;
14}; 13};
15 14
16struct b43_nphy_channeltab_entry_rev2 {
17 /* The channel number */
18 u8 channel;
19 /* The channel frequency in MHz */
20 u16 freq;
21 /* An unknown value */
22 u16 unk2;
23 /* Radio register values on channelswitch */
24 u8 radio_pll_ref;
25 u8 radio_rf_pllmod0;
26 u8 radio_rf_pllmod1;
27 u8 radio_vco_captail;
28 u8 radio_vco_cal1;
29 u8 radio_vco_cal2;
30 u8 radio_pll_lfc1;
31 u8 radio_pll_lfr1;
32 u8 radio_pll_lfc2;
33 u8 radio_lgbuf_cenbuf;
34 u8 radio_lgen_tune1;
35 u8 radio_lgen_tune2;
36 u8 radio_c1_lgbuf_atune;
37 u8 radio_c1_lgbuf_gtune;
38 u8 radio_c1_rx_rfr1;
39 u8 radio_c1_tx_pgapadtn;
40 u8 radio_c1_tx_mxbgtrim;
41 u8 radio_c2_lgbuf_atune;
42 u8 radio_c2_lgbuf_gtune;
43 u8 radio_c2_rx_rfr1;
44 u8 radio_c2_tx_pgapadtn;
45 u8 radio_c2_tx_mxbgtrim;
46 /* PHY register values on channelswitch */
47 struct b43_phy_n_sfo_cfg phy_regs;
48};
49
50struct b43_nphy_channeltab_entry_rev3 {
51 /* The channel number */
52 u8 channel;
53 /* The channel frequency in MHz */
54 u16 freq;
55 /* Radio register values on channelswitch */
56 /* TODO */
57 /* PHY register values on channelswitch */
58 struct b43_phy_n_sfo_cfg phy_regs;
59};
60
61
62struct b43_wldev; 15struct b43_wldev;
63 16
64struct nphy_txiqcal_ladder { 17struct nphy_txiqcal_ladder {
@@ -82,18 +35,37 @@ struct nphy_rf_control_override_rev3 {
82 u8 val_addr1; 35 u8 val_addr1;
83}; 36};
84 37
85/* Upload the default register value table. 38struct nphy_gain_ctl_workaround_entry {
86 * If "ghz5" is true, we upload the 5Ghz table. Otherwise the 2.4Ghz 39 s8 lna1_gain[4];
87 * table is uploaded. If "ignore_uploadflag" is true, we upload any value 40 s8 lna2_gain[4];
88 * and ignore the "UPLOAD" flag. */ 41 u8 gain_db[10];
89void b2055_upload_inittab(struct b43_wldev *dev, 42 u8 gain_bits[10];
90 bool ghz5, bool ignore_uploadflag);
91 43
44 u16 init_gain;
45 u16 rfseq_init[4];
92 46
93/* Get the NPHY Channel Switch Table entry for a channel number. 47 u16 cliphi_gain;
48 u16 clipmd_gain;
49 u16 cliplo_gain;
50
51 u16 crsmin;
52 u16 crsminl;
53 u16 crsminu;
54
55 u16 nbclip;
56 u16 wlclip;
57};
58
59/* Get entry with workaround values for gain ctl. Does not return NULL. */
60struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
61 struct b43_wldev *dev, bool ghz5, bool ext_lna);
62
63/* Get the NPHY Channel Switch Table entry for a channel.
94 * Returns NULL on failure to find an entry. */ 64 * Returns NULL on failure to find an entry. */
95const struct b43_nphy_channeltab_entry_rev2 * 65const struct b43_nphy_channeltab_entry_rev2 *
96b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel); 66b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
67const struct b43_nphy_channeltab_entry_rev3 *
68b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq);
97 69
98 70
99/* The N-PHY tables. */ 71/* The N-PHY tables. */
@@ -162,6 +134,33 @@ b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
162#define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 1 */ 134#define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 1 */
163#define B43_NTAB_C1_LOFEEDTH_SIZE 128 135#define B43_NTAB_C1_LOFEEDTH_SIZE 128
164 136
137/* Static N-PHY tables, PHY revision >= 3 */
138#define B43_NTAB_FRAMESTRUCT_R3 B43_NTAB32(10, 000) /* frame struct */
139#define B43_NTAB_PILOT_R3 B43_NTAB16(11, 000) /* pilot */
140#define B43_NTAB_TMAP_R3 B43_NTAB32(12, 000) /* TM AP */
141#define B43_NTAB_INTLEVEL_R3 B43_NTAB32(13, 000) /* INT LV */
142#define B43_NTAB_TDTRN_R3 B43_NTAB32(14, 000) /* TD TRN */
143#define B43_NTAB_NOISEVAR0_R3 B43_NTAB32(16, 000) /* noise variance 0 */
144#define B43_NTAB_NOISEVAR1_R3 B43_NTAB32(16, 128) /* noise variance 1 */
145#define B43_NTAB_MCS_R3 B43_NTAB16(18, 000) /* MCS */
146#define B43_NTAB_TDI20A0_R3 B43_NTAB32(19, 128) /* TDI 20/0 */
147#define B43_NTAB_TDI20A1_R3 B43_NTAB32(19, 256) /* TDI 20/1 */
148#define B43_NTAB_TDI40A0_R3 B43_NTAB32(19, 640) /* TDI 40/0 */
149#define B43_NTAB_TDI40A1_R3 B43_NTAB32(19, 768) /* TDI 40/1 */
150#define B43_NTAB_PILOTLT_R3 B43_NTAB32(20, 000) /* PLT lookup */
151#define B43_NTAB_CHANEST_R3 B43_NTAB32(22, 000) /* channel estimate */
152#define B43_NTAB_FRAMELT_R3 B43_NTAB8 (24, 000) /* frame lookup */
153#define B43_NTAB_C0_ESTPLT_R3 B43_NTAB8 (26, 000) /* estimated power lookup 0 */
154#define B43_NTAB_C1_ESTPLT_R3 B43_NTAB8 (27, 000) /* estimated power lookup 1 */
155#define B43_NTAB_C0_ADJPLT_R3 B43_NTAB8 (26, 064) /* adjusted power lookup 0 */
156#define B43_NTAB_C1_ADJPLT_R3 B43_NTAB8 (27, 064) /* adjusted power lookup 1 */
157#define B43_NTAB_C0_GAINCTL_R3 B43_NTAB32(26, 192) /* gain control lookup 0 */
158#define B43_NTAB_C1_GAINCTL_R3 B43_NTAB32(27, 192) /* gain control lookup 1 */
159#define B43_NTAB_C0_IQLT_R3 B43_NTAB32(26, 320) /* I/Q lookup 0 */
160#define B43_NTAB_C1_IQLT_R3 B43_NTAB32(27, 320) /* I/Q lookup 1 */
161#define B43_NTAB_C0_LOFEEDTH_R3 B43_NTAB16(26, 448) /* Local Oscillator Feed Through lookup 0 */
162#define B43_NTAB_C1_LOFEEDTH_R3 B43_NTAB16(27, 448) /* Local Oscillator Feed Through lookup 1 */
163
165#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE 18 164#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE 18
166#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE 18 165#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE 18
167#define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE 18 166#define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE 18
diff --git a/drivers/net/wireless/b43/wa.c b/drivers/net/wireless/b43/wa.c
index 9a335da65b42..8f4db448ec33 100644
--- a/drivers/net/wireless/b43/wa.c
+++ b/drivers/net/wireless/b43/wa.c
@@ -458,7 +458,7 @@ static void b43_wa_rssi_adc(struct b43_wldev *dev)
458 458
459static void b43_wa_boards_a(struct b43_wldev *dev) 459static void b43_wa_boards_a(struct b43_wldev *dev)
460{ 460{
461 struct ssb_bus *bus = dev->dev->bus; 461 struct ssb_bus *bus = dev->sdev->bus;
462 462
463 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM && 463 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM &&
464 bus->boardinfo.type == SSB_BOARD_BU4306 && 464 bus->boardinfo.type == SSB_BOARD_BU4306 &&
@@ -486,7 +486,7 @@ static void b43_wa_boards_a(struct b43_wldev *dev)
486 486
487static void b43_wa_boards_g(struct b43_wldev *dev) 487static void b43_wa_boards_g(struct b43_wldev *dev)
488{ 488{
489 struct ssb_bus *bus = dev->dev->bus; 489 struct ssb_bus *bus = dev->sdev->bus;
490 struct b43_phy *phy = &dev->phy; 490 struct b43_phy *phy = &dev->phy;
491 491
492 if (bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM || 492 if (bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM ||
diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c
index e6b0528f3b52..c8f99aebe01f 100644
--- a/drivers/net/wireless/b43/xmit.c
+++ b/drivers/net/wireless/b43/xmit.c
@@ -32,6 +32,36 @@
32#include "dma.h" 32#include "dma.h"
33#include "pio.h" 33#include "pio.h"
34 34
35static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = {
36 { B43_CCK_RATE_1MB, 0x0, 0x0 },
37 { B43_CCK_RATE_2MB, 0x0, 0x1 },
38 { B43_CCK_RATE_5MB, 0x0, 0x2 },
39 { B43_CCK_RATE_11MB, 0x0, 0x3 },
40 { B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK },
41 { B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK },
42 { B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK },
43 { B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK },
44 { B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 },
45 { B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 },
46 { B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 },
47 { B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 },
48};
49
50static const struct b43_tx_legacy_rate_phy_ctl_entry *
51b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate)
52{
53 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
54 unsigned int i;
55
56 for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) {
57 e = &(b43_tx_legacy_rate_phy_ctl[i]);
58 if (e->bitrate == bitrate)
59 return e;
60 }
61
62 B43_WARN_ON(1);
63 return NULL;
64}
35 65
36/* Extract the bitrate index out of a CCK PLCP header. */ 66/* Extract the bitrate index out of a CCK PLCP header. */
37static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp) 67static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp)
@@ -145,6 +175,34 @@ void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp,
145 } 175 }
146} 176}
147 177
178static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate)
179{
180 const struct b43_phy *phy = &dev->phy;
181 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
182 u16 control = 0;
183 u16 bw;
184
185 if (phy->type == B43_PHYTYPE_LP)
186 bw = B43_TXH_PHY1_BW_20;
187 else /* FIXME */
188 bw = B43_TXH_PHY1_BW_20;
189
190 if (0) { /* FIXME: MIMO */
191 } else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) {
192 control = bw;
193 } else {
194 control = bw;
195 e = b43_tx_legacy_rate_phy_ctl_ent(bitrate);
196 if (e) {
197 control |= e->coding_rate;
198 control |= e->modulation;
199 }
200 control |= B43_TXH_PHY1_MODE_SISO;
201 }
202
203 return control;
204}
205
148static u8 b43_calc_fallback_rate(u8 bitrate) 206static u8 b43_calc_fallback_rate(u8 bitrate)
149{ 207{
150 switch (bitrate) { 208 switch (bitrate) {
@@ -437,6 +495,14 @@ int b43_generate_txhdr(struct b43_wldev *dev,
437 extra_ft |= B43_TXH_EFT_RTSFB_OFDM; 495 extra_ft |= B43_TXH_EFT_RTSFB_OFDM;
438 else 496 else
439 extra_ft |= B43_TXH_EFT_RTSFB_CCK; 497 extra_ft |= B43_TXH_EFT_RTSFB_CCK;
498
499 if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS &&
500 phy->type == B43_PHYTYPE_N) {
501 txhdr->phy_ctl1_rts = cpu_to_le16(
502 b43_generate_tx_phy_ctl1(dev, rts_rate));
503 txhdr->phy_ctl1_rts_fb = cpu_to_le16(
504 b43_generate_tx_phy_ctl1(dev, rts_rate_fb));
505 }
440 } 506 }
441 507
442 /* Magic cookie */ 508 /* Magic cookie */
@@ -445,6 +511,13 @@ int b43_generate_txhdr(struct b43_wldev *dev,
445 else 511 else
446 txhdr->new_format.cookie = cpu_to_le16(cookie); 512 txhdr->new_format.cookie = cpu_to_le16(cookie);
447 513
514 if (phy->type == B43_PHYTYPE_N) {
515 txhdr->phy_ctl1 =
516 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate));
517 txhdr->phy_ctl1_fb =
518 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb));
519 }
520
448 /* Apply the bitfields */ 521 /* Apply the bitfields */
449 txhdr->mac_ctl = cpu_to_le32(mac_ctl); 522 txhdr->mac_ctl = cpu_to_le32(mac_ctl);
450 txhdr->phy_ctl = cpu_to_le16(phy_ctl); 523 txhdr->phy_ctl = cpu_to_le16(phy_ctl);
@@ -474,7 +547,7 @@ static s8 b43_rssi_postprocess(struct b43_wldev *dev,
474 else 547 else
475 tmp -= 3; 548 tmp -= 3;
476 } else { 549 } else {
477 if (dev->dev->bus->sprom. 550 if (dev->sdev->bus->sprom.
478 boardflags_lo & B43_BFL_RSSI) { 551 boardflags_lo & B43_BFL_RSSI) {
479 if (in_rssi > 63) 552 if (in_rssi > 63)
480 in_rssi = 63; 553 in_rssi = 63;
@@ -652,7 +725,7 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
652 status.mactime += mactime; 725 status.mactime += mactime;
653 if (low_mactime_now <= mactime) 726 if (low_mactime_now <= mactime)
654 status.mactime -= 0x10000; 727 status.mactime -= 0x10000;
655 status.flag |= RX_FLAG_TSFT; 728 status.flag |= RX_FLAG_MACTIME_MPDU;
656 } 729 }
657 730
658 chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT; 731 chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT;
diff --git a/drivers/net/wireless/b43/xmit.h b/drivers/net/wireless/b43/xmit.h
index d4cf9b390af3..42debb5cd6fa 100644
--- a/drivers/net/wireless/b43/xmit.h
+++ b/drivers/net/wireless/b43/xmit.h
@@ -73,6 +73,12 @@ struct b43_txhdr {
73 } __packed; 73 } __packed;
74} __packed; 74} __packed;
75 75
76struct b43_tx_legacy_rate_phy_ctl_entry {
77 u8 bitrate;
78 u16 coding_rate;
79 u16 modulation;
80};
81
76/* MAC TX control */ 82/* MAC TX control */
77#define B43_TXH_MAC_USEFBR 0x10000000 /* Use fallback rate for this AMPDU */ 83#define B43_TXH_MAC_USEFBR 0x10000000 /* Use fallback rate for this AMPDU */
78#define B43_TXH_MAC_KEYIDX 0x0FF00000 /* Security key index */ 84#define B43_TXH_MAC_KEYIDX 0x0FF00000 /* Security key index */
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-05 17:47:56 -0400