1 files changed, 53 insertions, 54 deletions

diff --git a/drivers/net/wireless/b43/tables_nphy.h b/drivers/net/wireless/b43/tables_nphy.h
index 8fc1da9f8fe5..18569367ce43 100644
--- a/drivers/net/wireless/b43/tables_nphy.h
+++ b/drivers/net/wireless/b43/tables_nphy.h
@@ -3,7 +3,6 @@
 
 #include <linux/types.h>
 
-
 struct b43_phy_n_sfo_cfg {
         u16 phy_bw1a;
         u16 phy_bw2;
@@ -13,52 +12,6 @@ struct b43_phy_n_sfo_cfg {
         u16 phy_bw6;
 };
 
-struct b43_nphy_channeltab_entry_rev2 {
-        /* The channel number */
-        u8 channel;
-        /* The channel frequency in MHz */
-        u16 freq;
-        /* An unknown value */
-        u16 unk2;
-        /* Radio register values on channelswitch */
-        u8 radio_pll_ref;
-        u8 radio_rf_pllmod0;
-        u8 radio_rf_pllmod1;
-        u8 radio_vco_captail;
-        u8 radio_vco_cal1;
-        u8 radio_vco_cal2;
-        u8 radio_pll_lfc1;
-        u8 radio_pll_lfr1;
-        u8 radio_pll_lfc2;
-        u8 radio_lgbuf_cenbuf;
-        u8 radio_lgen_tune1;
-        u8 radio_lgen_tune2;
-        u8 radio_c1_lgbuf_atune;
-        u8 radio_c1_lgbuf_gtune;
-        u8 radio_c1_rx_rfr1;
-        u8 radio_c1_tx_pgapadtn;
-        u8 radio_c1_tx_mxbgtrim;
-        u8 radio_c2_lgbuf_atune;
-        u8 radio_c2_lgbuf_gtune;
-        u8 radio_c2_rx_rfr1;
-        u8 radio_c2_tx_pgapadtn;
-        u8 radio_c2_tx_mxbgtrim;
-        /* PHY register values on channelswitch */
-        struct b43_phy_n_sfo_cfg phy_regs;
-};
-
-struct b43_nphy_channeltab_entry_rev3 {
-        /* The channel number */
-        u8 channel;
-        /* The channel frequency in MHz */
-        u16 freq;
-        /* Radio register values on channelswitch */
-        /* TODO */
-        /* PHY register values on channelswitch */
-        struct b43_phy_n_sfo_cfg phy_regs;
-};
-
-
 struct b43_wldev;
 
 struct nphy_txiqcal_ladder {
@@ -82,18 +35,37 @@ struct nphy_rf_control_override_rev3 {
         u8 val_addr1;
 };
 
-/* Upload the default register value table.
- * If "ghz5" is true, we upload the 5Ghz table. Otherwise the 2.4Ghz
- * table is uploaded. If "ignore_uploadflag" is true, we upload any value
- * and ignore the "UPLOAD" flag. */
-void b2055_upload_inittab(struct b43_wldev *dev,
-                          bool ghz5, bool ignore_uploadflag);
+struct nphy_gain_ctl_workaround_entry {
+        s8 lna1_gain[4];
+        s8 lna2_gain[4];
+        u8 gain_db[10];
+        u8 gain_bits[10];
 
+        u16 init_gain;
+        u16 rfseq_init[4];
 
-/* Get the NPHY Channel Switch Table entry for a channel number.
+        u16 cliphi_gain;
+        u16 clipmd_gain;
+        u16 cliplo_gain;
+
+        u16 crsmin;
+        u16 crsminl;
+        u16 crsminu;
+
+        u16 nbclip;
+        u16 wlclip;
+};
+
+/* Get entry with workaround values for gain ctl. Does not return NULL. */
+struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
+        struct b43_wldev *dev, bool ghz5, bool ext_lna);
+
+/* Get the NPHY Channel Switch Table entry for a channel.
  * Returns NULL on failure to find an entry. */
 const struct b43_nphy_channeltab_entry_rev2 *
 b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
+const struct b43_nphy_channeltab_entry_rev3 *
+b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq);
 
 
 /* The N-PHY tables. */
@@ -162,6 +134,33 @@ b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
 #define B43_NTAB_C1_LOFEEDTH            B43_NTAB16(0x1B, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 1 */
 #define B43_NTAB_C1_LOFEEDTH_SIZE       128
 
+/* Static N-PHY tables, PHY revision >= 3 */
+#define B43_NTAB_FRAMESTRUCT_R3         B43_NTAB32(10, 000) /* frame struct  */
+#define B43_NTAB_PILOT_R3               B43_NTAB16(11, 000) /* pilot  */
+#define B43_NTAB_TMAP_R3                B43_NTAB32(12, 000) /* TM AP  */
+#define B43_NTAB_INTLEVEL_R3            B43_NTAB32(13, 000) /* INT LV  */
+#define B43_NTAB_TDTRN_R3               B43_NTAB32(14, 000) /* TD TRN  */
+#define B43_NTAB_NOISEVAR0_R3           B43_NTAB32(16, 000) /* noise variance 0  */
+#define B43_NTAB_NOISEVAR1_R3           B43_NTAB32(16, 128) /* noise variance 1  */
+#define B43_NTAB_MCS_R3                 B43_NTAB16(18, 000) /* MCS  */
+#define B43_NTAB_TDI20A0_R3             B43_NTAB32(19, 128) /* TDI 20/0  */
+#define B43_NTAB_TDI20A1_R3             B43_NTAB32(19, 256) /* TDI 20/1  */
+#define B43_NTAB_TDI40A0_R3             B43_NTAB32(19, 640) /* TDI 40/0  */
+#define B43_NTAB_TDI40A1_R3             B43_NTAB32(19, 768) /* TDI 40/1  */
+#define B43_NTAB_PILOTLT_R3             B43_NTAB32(20, 000) /* PLT lookup  */
+#define B43_NTAB_CHANEST_R3             B43_NTAB32(22, 000) /* channel estimate  */
+#define B43_NTAB_FRAMELT_R3             B43_NTAB8 (24, 000) /* frame lookup  */
+#define B43_NTAB_C0_ESTPLT_R3           B43_NTAB8 (26, 000) /* estimated power lookup 0  */
+#define B43_NTAB_C1_ESTPLT_R3           B43_NTAB8 (27, 000) /* estimated power lookup 1  */
+#define B43_NTAB_C0_ADJPLT_R3           B43_NTAB8 (26, 064) /* adjusted power lookup 0  */
+#define B43_NTAB_C1_ADJPLT_R3           B43_NTAB8 (27, 064) /* adjusted power lookup 1  */
+#define B43_NTAB_C0_GAINCTL_R3          B43_NTAB32(26, 192) /* gain control lookup 0  */
+#define B43_NTAB_C1_GAINCTL_R3          B43_NTAB32(27, 192) /* gain control lookup 1  */
+#define B43_NTAB_C0_IQLT_R3             B43_NTAB32(26, 320) /* I/Q lookup 0  */
+#define B43_NTAB_C1_IQLT_R3             B43_NTAB32(27, 320) /* I/Q lookup 1  */
+#define B43_NTAB_C0_LOFEEDTH_R3         B43_NTAB16(26, 448) /* Local Oscillator Feed Through lookup 0  */
+#define B43_NTAB_C1_LOFEEDTH_R3         B43_NTAB16(27, 448) /* Local Oscillator Feed Through lookup 1 */
+
 #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE        18
 #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE        18
 #define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE       18