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authorRajkumar Manoharan <rmanoharan@atheros.com>2010-09-03 06:30:00 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-09-07 13:54:34 -0400
commitc2ba33424600e742f4d44ba2237024e6322a00fa (patch)
tree93b56c34cd06a705254845601474eb0eb8e8daeb /drivers/net/wireless/ath/ath9k/hw.c
parent7cf1f2dd7de98e9a18536ab885d28ecb57e76cb1 (diff)
ath9k_hw: Restore ANI registers to default during partial reset for AR9271
For AR9271 chips, if partial reset is done while scanning, the cycpwrThr1 will be set to maximum. This causes the degrade in DL throughput. So restore the ANI registers to default during the partial reset. Signed-off-by: Rajkumar Manoharan <rmanoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 68940a8864e0..afadade2a67e 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1263,6 +1263,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
1263 if (ath9k_hw_channel_change(ah, chan)) { 1263 if (ath9k_hw_channel_change(ah, chan)) {
1264 ath9k_hw_loadnf(ah, ah->curchan); 1264 ath9k_hw_loadnf(ah, ah->curchan);
1265 ath9k_hw_start_nfcal(ah, true); 1265 ath9k_hw_start_nfcal(ah, true);
1266 if (AR_SREV_9271(ah))
1267 ar9002_hw_load_ani_reg(ah, chan);
1266 return 0; 1268 return 0;
1267 } 1269 }
1268 } 1270 }