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authorDhananjay Phadke <dhananjay@netxen.com>2009-01-14 23:47:30 -0500
committerDavid S. Miller <davem@davemloft.net>2009-01-14 23:47:30 -0500
commit2edbb454428729f450f7a0aabbf95ac62b46b78a (patch)
tree392ae07f3448897ceff4717663af7584eccbd375 /drivers/net/netxen/netxen_nic_ctx.c
parentd1d5e6b1cead3df6f722d1d458874bd7f93da8d6 (diff)
netxen: fix endianness in firmware commands
o Set restricted (little endian) data types in firmware command requests and responses. o Remove unnecessary conversion to LE when writing registers. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/netxen/netxen_nic_ctx.c')
-rw-r--r--drivers/net/netxen/netxen_nic_ctx.c50
1 files changed, 21 insertions, 29 deletions
diff --git a/drivers/net/netxen/netxen_nic_ctx.c b/drivers/net/netxen/netxen_nic_ctx.c
index 64b51643c626..746bdb470418 100644
--- a/drivers/net/netxen/netxen_nic_ctx.c
+++ b/drivers/net/netxen/netxen_nic_ctx.c
@@ -76,7 +76,7 @@ netxen_api_unlock(struct netxen_adapter *adapter)
76static u32 76static u32
77netxen_poll_rsp(struct netxen_adapter *adapter) 77netxen_poll_rsp(struct netxen_adapter *adapter)
78{ 78{
79 u32 raw_rsp, rsp = NX_CDRP_RSP_OK; 79 u32 rsp = NX_CDRP_RSP_OK;
80 int timeout = 0; 80 int timeout = 0;
81 81
82 do { 82 do {
@@ -86,10 +86,7 @@ netxen_poll_rsp(struct netxen_adapter *adapter)
86 if (++timeout > NX_OS_CRB_RETRY_COUNT) 86 if (++timeout > NX_OS_CRB_RETRY_COUNT)
87 return NX_CDRP_RSP_TIMEOUT; 87 return NX_CDRP_RSP_TIMEOUT;
88 88
89 netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, 89 netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp);
90 &raw_rsp);
91
92 rsp = le32_to_cpu(raw_rsp);
93 } while (!NX_CDRP_IS_RSP(rsp)); 90 } while (!NX_CDRP_IS_RSP(rsp));
94 91
95 return rsp; 92 return rsp;
@@ -109,20 +106,16 @@ netxen_issue_cmd(struct netxen_adapter *adapter,
109 if (netxen_api_lock(adapter)) 106 if (netxen_api_lock(adapter))
110 return NX_RCODE_TIMEOUT; 107 return NX_RCODE_TIMEOUT;
111 108
112 netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, 109 netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature);
113 cpu_to_le32(signature));
114 110
115 netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, 111 netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1);
116 cpu_to_le32(arg1));
117 112
118 netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, 113 netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2);
119 cpu_to_le32(arg2));
120 114
121 netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, 115 netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3);
122 cpu_to_le32(arg3));
123 116
124 netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET, 117 netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
125 cpu_to_le32(NX_CDRP_FORM_CMD(cmd))); 118 NX_CDRP_FORM_CMD(cmd));
126 119
127 rsp = netxen_poll_rsp(adapter); 120 rsp = netxen_poll_rsp(adapter);
128 121
@@ -133,7 +126,6 @@ netxen_issue_cmd(struct netxen_adapter *adapter,
133 rcode = NX_RCODE_TIMEOUT; 126 rcode = NX_RCODE_TIMEOUT;
134 } else if (rsp == NX_CDRP_RSP_FAIL) { 127 } else if (rsp == NX_CDRP_RSP_FAIL) {
135 netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode); 128 netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);
136 rcode = le32_to_cpu(rcode);
137 129
138 printk(KERN_ERR "%s: failed card response code:0x%x\n", 130 printk(KERN_ERR "%s: failed card response code:0x%x\n",
139 netxen_nic_driver_name, rcode); 131 netxen_nic_driver_name, rcode);
@@ -183,7 +175,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
183 175
184 int i, nrds_rings, nsds_rings; 176 int i, nrds_rings, nsds_rings;
185 size_t rq_size, rsp_size; 177 size_t rq_size, rsp_size;
186 u32 cap, reg; 178 u32 cap, reg, val;
187 179
188 int err; 180 int err;
189 181
@@ -225,11 +217,14 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
225 217
226 prq->num_rds_rings = cpu_to_le16(nrds_rings); 218 prq->num_rds_rings = cpu_to_le16(nrds_rings);
227 prq->num_sds_rings = cpu_to_le16(nsds_rings); 219 prq->num_sds_rings = cpu_to_le16(nsds_rings);
228 prq->rds_ring_offset = 0; 220 prq->rds_ring_offset = cpu_to_le32(0);
229 prq->sds_ring_offset = prq->rds_ring_offset + 221
222 val = le32_to_cpu(prq->rds_ring_offset) +
230 (sizeof(nx_hostrq_rds_ring_t) * nrds_rings); 223 (sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
224 prq->sds_ring_offset = cpu_to_le32(val);
231 225
232 prq_rds = (nx_hostrq_rds_ring_t *)(prq->data + prq->rds_ring_offset); 226 prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
227 le32_to_cpu(prq->rds_ring_offset));
233 228
234 for (i = 0; i < nrds_rings; i++) { 229 for (i = 0; i < nrds_rings; i++) {
235 230
@@ -241,17 +236,14 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
241 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size); 236 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
242 } 237 }
243 238
244 prq_sds = (nx_hostrq_sds_ring_t *)(prq->data + prq->sds_ring_offset); 239 prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
240 le32_to_cpu(prq->sds_ring_offset));
245 241
246 prq_sds[0].host_phys_addr = 242 prq_sds[0].host_phys_addr =
247 cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr); 243 cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr);
248 prq_sds[0].ring_size = cpu_to_le32(adapter->max_rx_desc_count); 244 prq_sds[0].ring_size = cpu_to_le32(adapter->max_rx_desc_count);
249 /* only one msix vector for now */ 245 /* only one msix vector for now */
250 prq_sds[0].msi_index = cpu_to_le32(0); 246 prq_sds[0].msi_index = cpu_to_le16(0);
251
252 /* now byteswap offsets */
253 prq->rds_ring_offset = cpu_to_le32(prq->rds_ring_offset);
254 prq->sds_ring_offset = cpu_to_le32(prq->sds_ring_offset);
255 247
256 phys_addr = hostrq_phys_addr; 248 phys_addr = hostrq_phys_addr;
257 err = netxen_issue_cmd(adapter, 249 err = netxen_issue_cmd(adapter,
@@ -269,9 +261,9 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
269 261
270 262
271 prsp_rds = ((nx_cardrsp_rds_ring_t *) 263 prsp_rds = ((nx_cardrsp_rds_ring_t *)
272 &prsp->data[prsp->rds_ring_offset]); 264 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
273 265
274 for (i = 0; i < le32_to_cpu(prsp->num_rds_rings); i++) { 266 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
275 rds_ring = &recv_ctx->rds_rings[i]; 267 rds_ring = &recv_ctx->rds_rings[i];
276 268
277 reg = le32_to_cpu(prsp_rds[i].host_producer_crb); 269 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
@@ -279,7 +271,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
279 } 271 }
280 272
281 prsp_sds = ((nx_cardrsp_sds_ring_t *) 273 prsp_sds = ((nx_cardrsp_sds_ring_t *)
282 &prsp->data[prsp->sds_ring_offset]); 274 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
283 reg = le32_to_cpu(prsp_sds[0].host_consumer_crb); 275 reg = le32_to_cpu(prsp_sds[0].host_consumer_crb);
284 recv_ctx->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200); 276 recv_ctx->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
285 277
@@ -288,7 +280,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
288 280
289 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state); 281 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
290 recv_ctx->context_id = le16_to_cpu(prsp->context_id); 282 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
291 recv_ctx->virt_port = le16_to_cpu(prsp->virt_port); 283 recv_ctx->virt_port = prsp->virt_port;
292 284
293out_free_rsp: 285out_free_rsp:
294 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr); 286 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);