diff options
author | Dhananjay Phadke <dhananjay@netxen.com> | 2009-01-14 23:47:30 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-01-14 23:47:30 -0500 |
commit | 2edbb454428729f450f7a0aabbf95ac62b46b78a (patch) | |
tree | 392ae07f3448897ceff4717663af7584eccbd375 /drivers/net/netxen | |
parent | d1d5e6b1cead3df6f722d1d458874bd7f93da8d6 (diff) |
netxen: fix endianness in firmware commands
o Set restricted (little endian) data types in firmware command
requests and responses.
o Remove unnecessary conversion to LE when writing registers.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/netxen')
-rw-r--r-- | drivers/net/netxen/netxen_nic.h | 98 | ||||
-rw-r--r-- | drivers/net/netxen/netxen_nic_ctx.c | 50 | ||||
-rw-r--r-- | drivers/net/netxen/netxen_nic_hw.c | 42 | ||||
-rw-r--r-- | drivers/net/netxen/netxen_nic_init.c | 2 |
4 files changed, 95 insertions, 97 deletions
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h index f8e601c51da7..31311cc66d18 100644 --- a/drivers/net/netxen/netxen_nic.h +++ b/drivers/net/netxen/netxen_nic.h | |||
@@ -995,31 +995,31 @@ struct netxen_recv_context { | |||
995 | */ | 995 | */ |
996 | 996 | ||
997 | typedef struct { | 997 | typedef struct { |
998 | u64 host_phys_addr; /* Ring base addr */ | 998 | __le64 host_phys_addr; /* Ring base addr */ |
999 | u32 ring_size; /* Ring entries */ | 999 | __le32 ring_size; /* Ring entries */ |
1000 | u16 msi_index; | 1000 | __le16 msi_index; |
1001 | u16 rsvd; /* Padding */ | 1001 | __le16 rsvd; /* Padding */ |
1002 | } nx_hostrq_sds_ring_t; | 1002 | } nx_hostrq_sds_ring_t; |
1003 | 1003 | ||
1004 | typedef struct { | 1004 | typedef struct { |
1005 | u64 host_phys_addr; /* Ring base addr */ | 1005 | __le64 host_phys_addr; /* Ring base addr */ |
1006 | u64 buff_size; /* Packet buffer size */ | 1006 | __le64 buff_size; /* Packet buffer size */ |
1007 | u32 ring_size; /* Ring entries */ | 1007 | __le32 ring_size; /* Ring entries */ |
1008 | u32 ring_kind; /* Class of ring */ | 1008 | __le32 ring_kind; /* Class of ring */ |
1009 | } nx_hostrq_rds_ring_t; | 1009 | } nx_hostrq_rds_ring_t; |
1010 | 1010 | ||
1011 | typedef struct { | 1011 | typedef struct { |
1012 | u64 host_rsp_dma_addr; /* Response dma'd here */ | 1012 | __le64 host_rsp_dma_addr; /* Response dma'd here */ |
1013 | u32 capabilities[4]; /* Flag bit vector */ | 1013 | __le32 capabilities[4]; /* Flag bit vector */ |
1014 | u32 host_int_crb_mode; /* Interrupt crb usage */ | 1014 | __le32 host_int_crb_mode; /* Interrupt crb usage */ |
1015 | u32 host_rds_crb_mode; /* RDS crb usage */ | 1015 | __le32 host_rds_crb_mode; /* RDS crb usage */ |
1016 | /* These ring offsets are relative to data[0] below */ | 1016 | /* These ring offsets are relative to data[0] below */ |
1017 | u32 rds_ring_offset; /* Offset to RDS config */ | 1017 | __le32 rds_ring_offset; /* Offset to RDS config */ |
1018 | u32 sds_ring_offset; /* Offset to SDS config */ | 1018 | __le32 sds_ring_offset; /* Offset to SDS config */ |
1019 | u16 num_rds_rings; /* Count of RDS rings */ | 1019 | __le16 num_rds_rings; /* Count of RDS rings */ |
1020 | u16 num_sds_rings; /* Count of SDS rings */ | 1020 | __le16 num_sds_rings; /* Count of SDS rings */ |
1021 | u16 rsvd1; /* Padding */ | 1021 | __le16 rsvd1; /* Padding */ |
1022 | u16 rsvd2; /* Padding */ | 1022 | __le16 rsvd2; /* Padding */ |
1023 | u8 reserved[128]; /* reserve space for future expansion*/ | 1023 | u8 reserved[128]; /* reserve space for future expansion*/ |
1024 | /* MUST BE 64-bit aligned. | 1024 | /* MUST BE 64-bit aligned. |
1025 | The following is packed: | 1025 | The following is packed: |
@@ -1029,24 +1029,24 @@ typedef struct { | |||
1029 | } nx_hostrq_rx_ctx_t; | 1029 | } nx_hostrq_rx_ctx_t; |
1030 | 1030 | ||
1031 | typedef struct { | 1031 | typedef struct { |
1032 | u32 host_producer_crb; /* Crb to use */ | 1032 | __le32 host_producer_crb; /* Crb to use */ |
1033 | u32 rsvd1; /* Padding */ | 1033 | __le32 rsvd1; /* Padding */ |
1034 | } nx_cardrsp_rds_ring_t; | 1034 | } nx_cardrsp_rds_ring_t; |
1035 | 1035 | ||
1036 | typedef struct { | 1036 | typedef struct { |
1037 | u32 host_consumer_crb; /* Crb to use */ | 1037 | __le32 host_consumer_crb; /* Crb to use */ |
1038 | u32 interrupt_crb; /* Crb to use */ | 1038 | __le32 interrupt_crb; /* Crb to use */ |
1039 | } nx_cardrsp_sds_ring_t; | 1039 | } nx_cardrsp_sds_ring_t; |
1040 | 1040 | ||
1041 | typedef struct { | 1041 | typedef struct { |
1042 | /* These ring offsets are relative to data[0] below */ | 1042 | /* These ring offsets are relative to data[0] below */ |
1043 | u32 rds_ring_offset; /* Offset to RDS config */ | 1043 | __le32 rds_ring_offset; /* Offset to RDS config */ |
1044 | u32 sds_ring_offset; /* Offset to SDS config */ | 1044 | __le32 sds_ring_offset; /* Offset to SDS config */ |
1045 | u32 host_ctx_state; /* Starting State */ | 1045 | __le32 host_ctx_state; /* Starting State */ |
1046 | u32 num_fn_per_port; /* How many PCI fn share the port */ | 1046 | __le32 num_fn_per_port; /* How many PCI fn share the port */ |
1047 | u16 num_rds_rings; /* Count of RDS rings */ | 1047 | __le16 num_rds_rings; /* Count of RDS rings */ |
1048 | u16 num_sds_rings; /* Count of SDS rings */ | 1048 | __le16 num_sds_rings; /* Count of SDS rings */ |
1049 | u16 context_id; /* Handle for context */ | 1049 | __le16 context_id; /* Handle for context */ |
1050 | u8 phys_port; /* Physical id of port */ | 1050 | u8 phys_port; /* Physical id of port */ |
1051 | u8 virt_port; /* Virtual/Logical id of port */ | 1051 | u8 virt_port; /* Virtual/Logical id of port */ |
1052 | u8 reserved[128]; /* save space for future expansion */ | 1052 | u8 reserved[128]; /* save space for future expansion */ |
@@ -1072,34 +1072,34 @@ typedef struct { | |||
1072 | */ | 1072 | */ |
1073 | 1073 | ||
1074 | typedef struct { | 1074 | typedef struct { |
1075 | u64 host_phys_addr; /* Ring base addr */ | 1075 | __le64 host_phys_addr; /* Ring base addr */ |
1076 | u32 ring_size; /* Ring entries */ | 1076 | __le32 ring_size; /* Ring entries */ |
1077 | u32 rsvd; /* Padding */ | 1077 | __le32 rsvd; /* Padding */ |
1078 | } nx_hostrq_cds_ring_t; | 1078 | } nx_hostrq_cds_ring_t; |
1079 | 1079 | ||
1080 | typedef struct { | 1080 | typedef struct { |
1081 | u64 host_rsp_dma_addr; /* Response dma'd here */ | 1081 | __le64 host_rsp_dma_addr; /* Response dma'd here */ |
1082 | u64 cmd_cons_dma_addr; /* */ | 1082 | __le64 cmd_cons_dma_addr; /* */ |
1083 | u64 dummy_dma_addr; /* */ | 1083 | __le64 dummy_dma_addr; /* */ |
1084 | u32 capabilities[4]; /* Flag bit vector */ | 1084 | __le32 capabilities[4]; /* Flag bit vector */ |
1085 | u32 host_int_crb_mode; /* Interrupt crb usage */ | 1085 | __le32 host_int_crb_mode; /* Interrupt crb usage */ |
1086 | u32 rsvd1; /* Padding */ | 1086 | __le32 rsvd1; /* Padding */ |
1087 | u16 rsvd2; /* Padding */ | 1087 | __le16 rsvd2; /* Padding */ |
1088 | u16 interrupt_ctl; | 1088 | __le16 interrupt_ctl; |
1089 | u16 msi_index; | 1089 | __le16 msi_index; |
1090 | u16 rsvd3; /* Padding */ | 1090 | __le16 rsvd3; /* Padding */ |
1091 | nx_hostrq_cds_ring_t cds_ring; /* Desc of cds ring */ | 1091 | nx_hostrq_cds_ring_t cds_ring; /* Desc of cds ring */ |
1092 | u8 reserved[128]; /* future expansion */ | 1092 | u8 reserved[128]; /* future expansion */ |
1093 | } nx_hostrq_tx_ctx_t; | 1093 | } nx_hostrq_tx_ctx_t; |
1094 | 1094 | ||
1095 | typedef struct { | 1095 | typedef struct { |
1096 | u32 host_producer_crb; /* Crb to use */ | 1096 | __le32 host_producer_crb; /* Crb to use */ |
1097 | u32 interrupt_crb; /* Crb to use */ | 1097 | __le32 interrupt_crb; /* Crb to use */ |
1098 | } nx_cardrsp_cds_ring_t; | 1098 | } nx_cardrsp_cds_ring_t; |
1099 | 1099 | ||
1100 | typedef struct { | 1100 | typedef struct { |
1101 | u32 host_ctx_state; /* Starting state */ | 1101 | __le32 host_ctx_state; /* Starting state */ |
1102 | u16 context_id; /* Handle for context */ | 1102 | __le16 context_id; /* Handle for context */ |
1103 | u8 phys_port; /* Physical id of port */ | 1103 | u8 phys_port; /* Physical id of port */ |
1104 | u8 virt_port; /* Virtual/Logical id of port */ | 1104 | u8 virt_port; /* Virtual/Logical id of port */ |
1105 | nx_cardrsp_cds_ring_t cds_ring; /* Card cds settings */ | 1105 | nx_cardrsp_cds_ring_t cds_ring; /* Card cds settings */ |
@@ -1202,9 +1202,9 @@ enum { | |||
1202 | #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */ | 1202 | #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */ |
1203 | 1203 | ||
1204 | typedef struct { | 1204 | typedef struct { |
1205 | u64 qhdr; | 1205 | __le64 qhdr; |
1206 | u64 req_hdr; | 1206 | __le64 req_hdr; |
1207 | u64 words[6]; | 1207 | __le64 words[6]; |
1208 | } nx_nic_req_t; | 1208 | } nx_nic_req_t; |
1209 | 1209 | ||
1210 | typedef struct { | 1210 | typedef struct { |
diff --git a/drivers/net/netxen/netxen_nic_ctx.c b/drivers/net/netxen/netxen_nic_ctx.c index 64b51643c626..746bdb470418 100644 --- a/drivers/net/netxen/netxen_nic_ctx.c +++ b/drivers/net/netxen/netxen_nic_ctx.c | |||
@@ -76,7 +76,7 @@ netxen_api_unlock(struct netxen_adapter *adapter) | |||
76 | static u32 | 76 | static u32 |
77 | netxen_poll_rsp(struct netxen_adapter *adapter) | 77 | netxen_poll_rsp(struct netxen_adapter *adapter) |
78 | { | 78 | { |
79 | u32 raw_rsp, rsp = NX_CDRP_RSP_OK; | 79 | u32 rsp = NX_CDRP_RSP_OK; |
80 | int timeout = 0; | 80 | int timeout = 0; |
81 | 81 | ||
82 | do { | 82 | do { |
@@ -86,10 +86,7 @@ netxen_poll_rsp(struct netxen_adapter *adapter) | |||
86 | if (++timeout > NX_OS_CRB_RETRY_COUNT) | 86 | if (++timeout > NX_OS_CRB_RETRY_COUNT) |
87 | return NX_CDRP_RSP_TIMEOUT; | 87 | return NX_CDRP_RSP_TIMEOUT; |
88 | 88 | ||
89 | netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, | 89 | netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp); |
90 | &raw_rsp); | ||
91 | |||
92 | rsp = le32_to_cpu(raw_rsp); | ||
93 | } while (!NX_CDRP_IS_RSP(rsp)); | 90 | } while (!NX_CDRP_IS_RSP(rsp)); |
94 | 91 | ||
95 | return rsp; | 92 | return rsp; |
@@ -109,20 +106,16 @@ netxen_issue_cmd(struct netxen_adapter *adapter, | |||
109 | if (netxen_api_lock(adapter)) | 106 | if (netxen_api_lock(adapter)) |
110 | return NX_RCODE_TIMEOUT; | 107 | return NX_RCODE_TIMEOUT; |
111 | 108 | ||
112 | netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, | 109 | netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature); |
113 | cpu_to_le32(signature)); | ||
114 | 110 | ||
115 | netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, | 111 | netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1); |
116 | cpu_to_le32(arg1)); | ||
117 | 112 | ||
118 | netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, | 113 | netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2); |
119 | cpu_to_le32(arg2)); | ||
120 | 114 | ||
121 | netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, | 115 | netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3); |
122 | cpu_to_le32(arg3)); | ||
123 | 116 | ||
124 | netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET, | 117 | netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET, |
125 | cpu_to_le32(NX_CDRP_FORM_CMD(cmd))); | 118 | NX_CDRP_FORM_CMD(cmd)); |
126 | 119 | ||
127 | rsp = netxen_poll_rsp(adapter); | 120 | rsp = netxen_poll_rsp(adapter); |
128 | 121 | ||
@@ -133,7 +126,6 @@ netxen_issue_cmd(struct netxen_adapter *adapter, | |||
133 | rcode = NX_RCODE_TIMEOUT; | 126 | rcode = NX_RCODE_TIMEOUT; |
134 | } else if (rsp == NX_CDRP_RSP_FAIL) { | 127 | } else if (rsp == NX_CDRP_RSP_FAIL) { |
135 | netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode); | 128 | netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode); |
136 | rcode = le32_to_cpu(rcode); | ||
137 | 129 | ||
138 | printk(KERN_ERR "%s: failed card response code:0x%x\n", | 130 | printk(KERN_ERR "%s: failed card response code:0x%x\n", |
139 | netxen_nic_driver_name, rcode); | 131 | netxen_nic_driver_name, rcode); |
@@ -183,7 +175,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter) | |||
183 | 175 | ||
184 | int i, nrds_rings, nsds_rings; | 176 | int i, nrds_rings, nsds_rings; |
185 | size_t rq_size, rsp_size; | 177 | size_t rq_size, rsp_size; |
186 | u32 cap, reg; | 178 | u32 cap, reg, val; |
187 | 179 | ||
188 | int err; | 180 | int err; |
189 | 181 | ||
@@ -225,11 +217,14 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter) | |||
225 | 217 | ||
226 | prq->num_rds_rings = cpu_to_le16(nrds_rings); | 218 | prq->num_rds_rings = cpu_to_le16(nrds_rings); |
227 | prq->num_sds_rings = cpu_to_le16(nsds_rings); | 219 | prq->num_sds_rings = cpu_to_le16(nsds_rings); |
228 | prq->rds_ring_offset = 0; | 220 | prq->rds_ring_offset = cpu_to_le32(0); |
229 | prq->sds_ring_offset = prq->rds_ring_offset + | 221 | |
222 | val = le32_to_cpu(prq->rds_ring_offset) + | ||
230 | (sizeof(nx_hostrq_rds_ring_t) * nrds_rings); | 223 | (sizeof(nx_hostrq_rds_ring_t) * nrds_rings); |
224 | prq->sds_ring_offset = cpu_to_le32(val); | ||
231 | 225 | ||
232 | prq_rds = (nx_hostrq_rds_ring_t *)(prq->data + prq->rds_ring_offset); | 226 | prq_rds = (nx_hostrq_rds_ring_t *)(prq->data + |
227 | le32_to_cpu(prq->rds_ring_offset)); | ||
233 | 228 | ||
234 | for (i = 0; i < nrds_rings; i++) { | 229 | for (i = 0; i < nrds_rings; i++) { |
235 | 230 | ||
@@ -241,17 +236,14 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter) | |||
241 | prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size); | 236 | prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size); |
242 | } | 237 | } |
243 | 238 | ||
244 | prq_sds = (nx_hostrq_sds_ring_t *)(prq->data + prq->sds_ring_offset); | 239 | prq_sds = (nx_hostrq_sds_ring_t *)(prq->data + |
240 | le32_to_cpu(prq->sds_ring_offset)); | ||
245 | 241 | ||
246 | prq_sds[0].host_phys_addr = | 242 | prq_sds[0].host_phys_addr = |
247 | cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr); | 243 | cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr); |
248 | prq_sds[0].ring_size = cpu_to_le32(adapter->max_rx_desc_count); | 244 | prq_sds[0].ring_size = cpu_to_le32(adapter->max_rx_desc_count); |
249 | /* only one msix vector for now */ | 245 | /* only one msix vector for now */ |
250 | prq_sds[0].msi_index = cpu_to_le32(0); | 246 | prq_sds[0].msi_index = cpu_to_le16(0); |
251 | |||
252 | /* now byteswap offsets */ | ||
253 | prq->rds_ring_offset = cpu_to_le32(prq->rds_ring_offset); | ||
254 | prq->sds_ring_offset = cpu_to_le32(prq->sds_ring_offset); | ||
255 | 247 | ||
256 | phys_addr = hostrq_phys_addr; | 248 | phys_addr = hostrq_phys_addr; |
257 | err = netxen_issue_cmd(adapter, | 249 | err = netxen_issue_cmd(adapter, |
@@ -269,9 +261,9 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter) | |||
269 | 261 | ||
270 | 262 | ||
271 | prsp_rds = ((nx_cardrsp_rds_ring_t *) | 263 | prsp_rds = ((nx_cardrsp_rds_ring_t *) |
272 | &prsp->data[prsp->rds_ring_offset]); | 264 | &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]); |
273 | 265 | ||
274 | for (i = 0; i < le32_to_cpu(prsp->num_rds_rings); i++) { | 266 | for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) { |
275 | rds_ring = &recv_ctx->rds_rings[i]; | 267 | rds_ring = &recv_ctx->rds_rings[i]; |
276 | 268 | ||
277 | reg = le32_to_cpu(prsp_rds[i].host_producer_crb); | 269 | reg = le32_to_cpu(prsp_rds[i].host_producer_crb); |
@@ -279,7 +271,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter) | |||
279 | } | 271 | } |
280 | 272 | ||
281 | prsp_sds = ((nx_cardrsp_sds_ring_t *) | 273 | prsp_sds = ((nx_cardrsp_sds_ring_t *) |
282 | &prsp->data[prsp->sds_ring_offset]); | 274 | &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]); |
283 | reg = le32_to_cpu(prsp_sds[0].host_consumer_crb); | 275 | reg = le32_to_cpu(prsp_sds[0].host_consumer_crb); |
284 | recv_ctx->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200); | 276 | recv_ctx->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200); |
285 | 277 | ||
@@ -288,7 +280,7 @@ nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter) | |||
288 | 280 | ||
289 | recv_ctx->state = le32_to_cpu(prsp->host_ctx_state); | 281 | recv_ctx->state = le32_to_cpu(prsp->host_ctx_state); |
290 | recv_ctx->context_id = le16_to_cpu(prsp->context_id); | 282 | recv_ctx->context_id = le16_to_cpu(prsp->context_id); |
291 | recv_ctx->virt_port = le16_to_cpu(prsp->virt_port); | 283 | recv_ctx->virt_port = prsp->virt_port; |
292 | 284 | ||
293 | out_free_rsp: | 285 | out_free_rsp: |
294 | pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr); | 286 | pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr); |
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index aa6e603bfcbf..e8a0eed0078e 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c | |||
@@ -539,16 +539,19 @@ static int nx_p3_sre_macaddr_change(struct net_device *dev, | |||
539 | { | 539 | { |
540 | struct netxen_adapter *adapter = netdev_priv(dev); | 540 | struct netxen_adapter *adapter = netdev_priv(dev); |
541 | nx_nic_req_t req; | 541 | nx_nic_req_t req; |
542 | nx_mac_req_t mac_req; | 542 | nx_mac_req_t *mac_req; |
543 | u64 word; | ||
543 | int rv; | 544 | int rv; |
544 | 545 | ||
545 | memset(&req, 0, sizeof(nx_nic_req_t)); | 546 | memset(&req, 0, sizeof(nx_nic_req_t)); |
546 | req.qhdr |= (NX_NIC_REQUEST << 23); | 547 | req.qhdr = cpu_to_le64(NX_NIC_REQUEST << 23); |
547 | req.req_hdr |= NX_MAC_EVENT; | 548 | |
548 | req.req_hdr |= ((u64)adapter->portnum << 16); | 549 | word = NX_MAC_EVENT | ((u64)adapter->portnum << 16); |
549 | mac_req.op = op; | 550 | req.req_hdr = cpu_to_le64(word); |
550 | memcpy(&mac_req.mac_addr, addr, 6); | 551 | |
551 | req.words[0] = cpu_to_le64(*(u64 *)&mac_req); | 552 | mac_req = (nx_mac_req_t *)&req.words[0]; |
553 | mac_req->op = op; | ||
554 | memcpy(mac_req->mac_addr, addr, 6); | ||
552 | 555 | ||
553 | rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1); | 556 | rv = netxen_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1); |
554 | if (rv != 0) { | 557 | if (rv != 0) { |
@@ -612,12 +615,16 @@ send_fw_cmd: | |||
612 | int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode) | 615 | int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode) |
613 | { | 616 | { |
614 | nx_nic_req_t req; | 617 | nx_nic_req_t req; |
618 | u64 word; | ||
615 | 619 | ||
616 | memset(&req, 0, sizeof(nx_nic_req_t)); | 620 | memset(&req, 0, sizeof(nx_nic_req_t)); |
617 | 621 | ||
618 | req.qhdr |= (NX_HOST_REQUEST << 23); | 622 | req.qhdr = cpu_to_le64(NX_HOST_REQUEST << 23); |
619 | req.req_hdr |= NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE; | 623 | |
620 | req.req_hdr |= ((u64)adapter->portnum << 16); | 624 | word = NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE | |
625 | ((u64)adapter->portnum << 16); | ||
626 | req.req_hdr = cpu_to_le64(word); | ||
627 | |||
621 | req.words[0] = cpu_to_le64(mode); | 628 | req.words[0] = cpu_to_le64(mode); |
622 | 629 | ||
623 | return netxen_send_cmd_descs(adapter, | 630 | return netxen_send_cmd_descs(adapter, |
@@ -632,13 +639,15 @@ int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32 mode) | |||
632 | int netxen_config_intr_coalesce(struct netxen_adapter *adapter) | 639 | int netxen_config_intr_coalesce(struct netxen_adapter *adapter) |
633 | { | 640 | { |
634 | nx_nic_req_t req; | 641 | nx_nic_req_t req; |
642 | u64 word; | ||
635 | int rv; | 643 | int rv; |
636 | 644 | ||
637 | memset(&req, 0, sizeof(nx_nic_req_t)); | 645 | memset(&req, 0, sizeof(nx_nic_req_t)); |
638 | 646 | ||
639 | req.qhdr |= (NX_NIC_REQUEST << 23); | 647 | req.qhdr = cpu_to_le64(NX_NIC_REQUEST << 23); |
640 | req.req_hdr |= NETXEN_CONFIG_INTR_COALESCE; | 648 | |
641 | req.req_hdr |= ((u64)adapter->portnum << 16); | 649 | word = NETXEN_CONFIG_INTR_COALESCE | ((u64)adapter->portnum << 16); |
650 | req.req_hdr = cpu_to_le64(word); | ||
642 | 651 | ||
643 | memcpy(&req.words[0], &adapter->coal, sizeof(adapter->coal)); | 652 | memcpy(&req.words[0], &adapter->coal, sizeof(adapter->coal)); |
644 | 653 | ||
@@ -772,13 +781,10 @@ int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac) | |||
772 | adapter->hw_read_wx(adapter, crbaddr, &mac_lo, 4); | 781 | adapter->hw_read_wx(adapter, crbaddr, &mac_lo, 4); |
773 | adapter->hw_read_wx(adapter, crbaddr+4, &mac_hi, 4); | 782 | adapter->hw_read_wx(adapter, crbaddr+4, &mac_hi, 4); |
774 | 783 | ||
775 | mac_hi = cpu_to_le32(mac_hi); | ||
776 | mac_lo = cpu_to_le32(mac_lo); | ||
777 | |||
778 | if (pci_func & 1) | 784 | if (pci_func & 1) |
779 | *mac = ((mac_lo >> 16) | ((u64)mac_hi << 16)); | 785 | *mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16)); |
780 | else | 786 | else |
781 | *mac = ((mac_lo) | ((u64)mac_hi << 32)); | 787 | *mac = le64_to_cpu((u64)mac_lo | ((u64)mac_hi << 32)); |
782 | 788 | ||
783 | return 0; | 789 | return 0; |
784 | } | 790 | } |
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c index d924468e506e..c0e06a653170 100644 --- a/drivers/net/netxen/netxen_nic_init.c +++ b/drivers/net/netxen/netxen_nic_init.c | |||
@@ -1277,7 +1277,7 @@ static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid, | |||
1277 | 1277 | ||
1278 | dev_kfree_skb_any(skb); | 1278 | dev_kfree_skb_any(skb); |
1279 | for (i = 0; i < nr_frags; i++) { | 1279 | for (i = 0; i < nr_frags; i++) { |
1280 | index = frag_desc->frag_handles[i]; | 1280 | index = le16_to_cpu(frag_desc->frag_handles[i]); |
1281 | skb = netxen_process_rxbuf(adapter, | 1281 | skb = netxen_process_rxbuf(adapter, |
1282 | rds_ring, index, cksum); | 1282 | rds_ring, index, cksum); |
1283 | if (skb) | 1283 | if (skb) |