MIPS: Alchemy: devboard register abstraction

All Alchemy development boards have external CPLDs with a few registers
in them.  They all share an identical register layout with only a few
minor differences (except the PB1000) in bit functions and base
addresses.

This patch
- adds a primitive facility to initialize and use these external
  registers,
- replaces all occurrences of bcsr->xxx accesses with calls to the new
  functions (the pb1200 cascade irq handling code is special).
- collects BCSR register information scattered throughout the board
  headers in a central place.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 5 insertions, 9 deletions

diff --git a/drivers/net/irda/au1k_ir.c b/drivers/net/irda/au1k_ir.c
index 9b2eebdbb25b..b5cbd39d0685 100644
--- a/drivers/net/irda/au1k_ir.c
+++ b/drivers/net/irda/au1k_ir.c
@@ -36,6 +36,7 @@
 #include <asm/pb1000.h>
 #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
 #include <asm/db1x00.h>
+#include <asm/mach-db1x00/bcsr.h>
 #else 
 #error au1k_ir: unsupported board
 #endif
@@ -66,10 +67,6 @@ static char version[] __devinitdata =
 
 #define RUN_AT(x) (jiffies + (x))
 
-#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
-static BCSR * const bcsr = (BCSR *)0xAE000000;
-#endif
-
 static DEFINE_SPINLOCK(ir_lock);
 
 /*
@@ -282,9 +279,8 @@ static int au1k_irda_net_init(struct net_device *dev)
 
 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
         /* power on */
-        bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
-        bcsr->resets |= BCSR_RESETS_IRDA_MODE_FULL;
-        au_sync();
+        bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
+                              BCSR_RESETS_IRDA_MODE_FULL);
 #endif
 
         return 0;
@@ -720,14 +716,14 @@ au1k_irda_set_speed(struct net_device *dev, int speed)
 
         if (speed == 4000000) {
 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
-                bcsr->resets |= BCSR_RESETS_FIR_SEL;
+                bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_FIR_SEL);
 #else /* Pb1000 and Pb1100 */
                 writel(1<<13, CPLD_AUX1);
 #endif
         }
         else {
 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
-                bcsr->resets &= ~BCSR_RESETS_FIR_SEL;
+                bcsr_mod(BCSR_RESETS, BCSR_RESETS_FIR_SEL, 0);
 #else /* Pb1000 and Pb1100 */
                 writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1);
 #endif