diff options
author | Pavel Machek <pavel@denx.de> | 2014-05-13 09:09:14 -0400 |
---|---|---|
committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2014-05-19 03:38:22 -0400 |
commit | e07e83ae600ea51b857e02132220eb7b7e52e928 (patch) | |
tree | ca8cc76acb57f134307c4029b13c8af4eb6711ab /drivers/net/can/c_can/c_can_pci.c | |
parent | fdddfab5c91ac6632595dd852d912624d80951a9 (diff) |
can: c_can: make {read,write}_reg functions const
This patch makes the {read,write}_reg functions const, this is a preparation to
make use of {read,write}_reg in the hwinit callback.
Signed-off-by: Thor Thayer <tthayer@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'drivers/net/can/c_can/c_can_pci.c')
-rw-r--r-- | drivers/net/can/c_can/c_can_pci.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/can/c_can/c_can_pci.c b/drivers/net/can/c_can/c_can_pci.c index 58f71e1fcc4e..b901a798f7e2 100644 --- a/drivers/net/can/c_can/c_can_pci.c +++ b/drivers/net/can/c_can/c_can_pci.c | |||
@@ -47,37 +47,37 @@ struct c_can_pci_data { | |||
47 | * registers can be aligned to a 16-bit boundary or 32-bit boundary etc. | 47 | * registers can be aligned to a 16-bit boundary or 32-bit boundary etc. |
48 | * Handle the same by providing a common read/write interface. | 48 | * Handle the same by providing a common read/write interface. |
49 | */ | 49 | */ |
50 | static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv, | 50 | static u16 c_can_pci_read_reg_aligned_to_16bit(const struct c_can_priv *priv, |
51 | enum reg index) | 51 | enum reg index) |
52 | { | 52 | { |
53 | return readw(priv->base + priv->regs[index]); | 53 | return readw(priv->base + priv->regs[index]); |
54 | } | 54 | } |
55 | 55 | ||
56 | static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv, | 56 | static void c_can_pci_write_reg_aligned_to_16bit(const struct c_can_priv *priv, |
57 | enum reg index, u16 val) | 57 | enum reg index, u16 val) |
58 | { | 58 | { |
59 | writew(val, priv->base + priv->regs[index]); | 59 | writew(val, priv->base + priv->regs[index]); |
60 | } | 60 | } |
61 | 61 | ||
62 | static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv, | 62 | static u16 c_can_pci_read_reg_aligned_to_32bit(const struct c_can_priv *priv, |
63 | enum reg index) | 63 | enum reg index) |
64 | { | 64 | { |
65 | return readw(priv->base + 2 * priv->regs[index]); | 65 | return readw(priv->base + 2 * priv->regs[index]); |
66 | } | 66 | } |
67 | 67 | ||
68 | static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv, | 68 | static void c_can_pci_write_reg_aligned_to_32bit(const struct c_can_priv *priv, |
69 | enum reg index, u16 val) | 69 | enum reg index, u16 val) |
70 | { | 70 | { |
71 | writew(val, priv->base + 2 * priv->regs[index]); | 71 | writew(val, priv->base + 2 * priv->regs[index]); |
72 | } | 72 | } |
73 | 73 | ||
74 | static u16 c_can_pci_read_reg_32bit(struct c_can_priv *priv, | 74 | static u16 c_can_pci_read_reg_32bit(const struct c_can_priv *priv, |
75 | enum reg index) | 75 | enum reg index) |
76 | { | 76 | { |
77 | return (u16)ioread32(priv->base + 2 * priv->regs[index]); | 77 | return (u16)ioread32(priv->base + 2 * priv->regs[index]); |
78 | } | 78 | } |
79 | 79 | ||
80 | static void c_can_pci_write_reg_32bit(struct c_can_priv *priv, | 80 | static void c_can_pci_write_reg_32bit(const struct c_can_priv *priv, |
81 | enum reg index, u16 val) | 81 | enum reg index, u16 val) |
82 | { | 82 | { |
83 | iowrite32((u32)val, priv->base + 2 * priv->regs[index]); | 83 | iowrite32((u32)val, priv->base + 2 * priv->regs[index]); |