can: c_can: make {read,write}_reg functions const

This patch makes the {read,write}_reg functions const, this is a preparation to
make use of {read,write}_reg in the hwinit callback.

Signed-off-by: Thor Thayer <tthayer@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

3 files changed, 13 insertions, 13 deletions

diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
index c56f1b1c11ca..b948b552a210 100644
--- a/drivers/net/can/c_can/c_can.h
+++ b/drivers/net/can/c_can/c_can.h
@@ -176,8 +176,8 @@ struct c_can_priv {
         atomic_t tx_active;
         unsigned long tx_dir;
         int last_status;
-        u16 (*read_reg) (struct c_can_priv *priv, enum reg index);
-        void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val);
+        u16 (*read_reg) (const struct c_can_priv *priv, enum reg index);
+        void (*write_reg) (const struct c_can_priv *priv, enum reg index, u16 val);
         void __iomem *base;
         const u16 *regs;
         void *priv;             /* for board-specific data */
diff --git a/drivers/net/can/c_can/c_can_pci.c b/drivers/net/can/c_can/c_can_pci.c
index 58f71e1fcc4e..b901a798f7e2 100644
--- a/drivers/net/can/c_can/c_can_pci.c
+++ b/drivers/net/can/c_can/c_can_pci.c
@@ -47,37 +47,37 @@ struct c_can_pci_data {
  * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
  * Handle the same by providing a common read/write interface.
  */
-static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv,
+static u16 c_can_pci_read_reg_aligned_to_16bit(const struct c_can_priv *priv,
                                                 enum reg index)
 {
         return readw(priv->base + priv->regs[index]);
 }
 
-static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv,
+static void c_can_pci_write_reg_aligned_to_16bit(const struct c_can_priv *priv,
                                                 enum reg index, u16 val)
 {
         writew(val, priv->base + priv->regs[index]);
 }
 
-static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv,
+static u16 c_can_pci_read_reg_aligned_to_32bit(const struct c_can_priv *priv,
                                                 enum reg index)
 {
         return readw(priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv,
+static void c_can_pci_write_reg_aligned_to_32bit(const struct c_can_priv *priv,
                                                 enum reg index, u16 val)
 {
         writew(val, priv->base + 2 * priv->regs[index]);
 }
 
-static u16 c_can_pci_read_reg_32bit(struct c_can_priv *priv,
+static u16 c_can_pci_read_reg_32bit(const struct c_can_priv *priv,
                                     enum reg index)
 {
         return (u16)ioread32(priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_pci_write_reg_32bit(struct c_can_priv *priv,
+static void c_can_pci_write_reg_32bit(const struct c_can_priv *priv,
                                       enum reg index, u16 val)
 {
         iowrite32((u32)val, priv->base + 2 * priv->regs[index]);
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c
index 1df0b322d1e4..0b44f4d79451 100644
--- a/drivers/net/can/c_can/c_can_platform.c
+++ b/drivers/net/can/c_can/c_can_platform.c
@@ -47,31 +47,31 @@ static DEFINE_SPINLOCK(raminit_lock);
  * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
  * Handle the same by providing a common read/write interface.
  */
-static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,
+static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,
                                                 enum reg index)
 {
         return readw(priv->base + priv->regs[index]);
 }
 
-static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,
+static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,
                                                 enum reg index, u16 val)
 {
         writew(val, priv->base + priv->regs[index]);
 }
 
-static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,
+static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,
                                                 enum reg index)
 {
         return readw(priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,
+static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,
                                                 enum reg index, u16 val)
 {
         writew(val, priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask,
+static void c_can_hw_raminit_wait_ti(const struct c_can_priv *priv, u32 mask,
                                   u32 val)
 {
         /* We look only at the bits of our instance. */