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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2014-08-07 02:36:12 -0400
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2014-08-07 02:36:12 -0400
commit5e2aa2ed08e2e280121dc7cf5609c87d464f12ef (patch)
treeca7d7b1480285e3b617fecc5b41f0ce150a82c32 /drivers/i2c
parentf62d14a8072b9756db36ba394e2b267470a40240 (diff)
parentfc8104bc5a3f6f49d79f45f2706f79f77a9fb2ae (diff)
Merge branch 'next' into for-linus
Prepare first round of input updates for 3.17.
Diffstat (limited to 'drivers/i2c')
-rw-r--r--drivers/i2c/busses/Kconfig41
-rw-r--r--drivers/i2c/busses/Makefile4
-rw-r--r--drivers/i2c/busses/i2c-ali1563.c82
-rw-r--r--drivers/i2c/busses/i2c-bcm2835.c4
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c44
-rw-r--r--drivers/i2c/busses/i2c-cros-ec-tunnel.c318
-rw-r--r--drivers/i2c/busses/i2c-designware-core.c3
-rw-r--r--drivers/i2c/busses/i2c-designware-pcidrv.c22
-rw-r--r--drivers/i2c/busses/i2c-designware-platdrv.c13
-rw-r--r--drivers/i2c/busses/i2c-diolan-u2c.c1
-rw-r--r--drivers/i2c/busses/i2c-efm32.c4
-rw-r--r--drivers/i2c/busses/i2c-eg20t.c4
-rw-r--r--drivers/i2c/busses/i2c-exynos5.c71
-rw-r--r--drivers/i2c/busses/i2c-gpio.c25
-rw-r--r--drivers/i2c/busses/i2c-imx.c169
-rw-r--r--drivers/i2c/busses/i2c-mpc.c2
-rw-r--r--drivers/i2c/busses/i2c-mv64xxx.c2
-rw-r--r--drivers/i2c/busses/i2c-nomadik.c16
-rw-r--r--drivers/i2c/busses/i2c-nuc900.c709
-rw-r--r--drivers/i2c/busses/i2c-ocores.c2
-rw-r--r--drivers/i2c/busses/i2c-omap.c4
-rw-r--r--drivers/i2c/busses/i2c-pxa.c2
-rw-r--r--drivers/i2c/busses/i2c-qup.c2
-rw-r--r--drivers/i2c/busses/i2c-rcar.c266
-rw-r--r--drivers/i2c/busses/i2c-riic.c2
-rw-r--r--drivers/i2c/busses/i2c-rk3x.c763
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c10
-rw-r--r--drivers/i2c/busses/i2c-sh_mobile.c225
-rw-r--r--drivers/i2c/busses/i2c-simtec.c4
-rw-r--r--drivers/i2c/busses/i2c-sirf.c1
-rw-r--r--drivers/i2c/busses/i2c-st.c2
-rw-r--r--drivers/i2c/busses/i2c-stu300.c4
-rw-r--r--drivers/i2c/busses/i2c-sun6i-p2wi.c344
-rw-r--r--drivers/i2c/busses/i2c-tegra.c4
-rw-r--r--drivers/i2c/busses/i2c-wmt.c6
-rw-r--r--drivers/i2c/busses/scx200_acb.c4
-rw-r--r--drivers/i2c/muxes/Kconfig1
-rw-r--r--drivers/i2c/muxes/i2c-mux-pca954x.c24
38 files changed, 1921 insertions, 1283 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index c94db1c5e353..9f7d5859cf65 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -449,7 +449,7 @@ config I2C_EFM32
449 449
450config I2C_EG20T 450config I2C_EG20T
451 tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) I2C" 451 tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) I2C"
452 depends on PCI 452 depends on PCI && (X86_32 || COMPILE_TEST)
453 help 453 help
454 This driver is for PCH(Platform controller Hub) I2C of EG20T which 454 This driver is for PCH(Platform controller Hub) I2C of EG20T which
455 is an IOH(Input/Output Hub) for x86 embedded processor. 455 is an IOH(Input/Output Hub) for x86 embedded processor.
@@ -570,13 +570,6 @@ config I2C_NOMADIK
570 I2C interface from ST-Ericsson's Nomadik and Ux500 architectures, 570 I2C interface from ST-Ericsson's Nomadik and Ux500 architectures,
571 as well as the STA2X11 PCIe I/O HUB. 571 as well as the STA2X11 PCIe I/O HUB.
572 572
573config I2C_NUC900
574 tristate "NUC900 I2C Driver"
575 depends on ARCH_W90X900
576 help
577 Say Y here to include support for I2C controller in the
578 Winbond/Nuvoton NUC900 based System-on-Chip devices.
579
580config I2C_OCORES 573config I2C_OCORES
581 tristate "OpenCores I2C Controller" 574 tristate "OpenCores I2C Controller"
582 help 575 help
@@ -683,6 +676,16 @@ config I2C_RIIC
683 This driver can also be built as a module. If so, the module 676 This driver can also be built as a module. If so, the module
684 will be called i2c-riic. 677 will be called i2c-riic.
685 678
679config I2C_RK3X
680 tristate "Rockchip RK3xxx I2C adapter"
681 depends on OF
682 help
683 Say Y here to include support for the I2C adapter in Rockchip RK3xxx
684 SoCs.
685
686 This driver can also be built as a module. If so, the module will
687 be called i2c-rk3x.
688
686config HAVE_S3C2410_I2C 689config HAVE_S3C2410_I2C
687 bool 690 bool
688 help 691 help
@@ -771,6 +774,19 @@ config I2C_STU300
771 This driver can also be built as a module. If so, the module 774 This driver can also be built as a module. If so, the module
772 will be called i2c-stu300. 775 will be called i2c-stu300.
773 776
777config I2C_SUN6I_P2WI
778 tristate "Allwinner sun6i internal P2WI controller"
779 depends on RESET_CONTROLLER
780 depends on MACH_SUN6I || COMPILE_TEST
781 help
782 If you say yes to this option, support will be included for the
783 P2WI (Push/Pull 2 Wire Interface) controller embedded in some sunxi
784 SOCs.
785 The P2WI looks like an SMBus controller (which supports only byte
786 accesses), except that it only supports one slave device.
787 This interface is used to connect to specific PMIC devices (like the
788 AXP221).
789
774config I2C_TEGRA 790config I2C_TEGRA
775 tristate "NVIDIA Tegra internal I2C controller" 791 tristate "NVIDIA Tegra internal I2C controller"
776 depends on ARCH_TEGRA 792 depends on ARCH_TEGRA
@@ -993,6 +1009,15 @@ config I2C_SIBYTE
993 help 1009 help
994 Supports the SiByte SOC on-chip I2C interfaces (2 channels). 1010 Supports the SiByte SOC on-chip I2C interfaces (2 channels).
995 1011
1012config I2C_CROS_EC_TUNNEL
1013 tristate "ChromeOS EC tunnel I2C bus"
1014 depends on MFD_CROS_EC
1015 help
1016 If you say yes here you get an I2C bus that will tunnel i2c commands
1017 through to the other side of the ChromeOS EC to the i2c bus
1018 connected there. This will work whatever the interface used to
1019 talk to the EC (SPI, I2C or LPC).
1020
996config SCx200_I2C 1021config SCx200_I2C
997 tristate "NatSemi SCx200 I2C using GPIO pins (DEPRECATED)" 1022 tristate "NatSemi SCx200 I2C using GPIO pins (DEPRECATED)"
998 depends on SCx200_GPIO 1023 depends on SCx200_GPIO
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 18d18ff9db93..dd9a7f8e873f 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -55,7 +55,6 @@ obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
55obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o 55obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
56obj-$(CONFIG_I2C_MXS) += i2c-mxs.o 56obj-$(CONFIG_I2C_MXS) += i2c-mxs.o
57obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o 57obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
58obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o
59obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o 58obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
60obj-$(CONFIG_I2C_OMAP) += i2c-omap.o 59obj-$(CONFIG_I2C_OMAP) += i2c-omap.o
61obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o 60obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
@@ -67,6 +66,7 @@ obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
67obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o 66obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
68obj-$(CONFIG_I2C_QUP) += i2c-qup.o 67obj-$(CONFIG_I2C_QUP) += i2c-qup.o
69obj-$(CONFIG_I2C_RIIC) += i2c-riic.o 68obj-$(CONFIG_I2C_RIIC) += i2c-riic.o
69obj-$(CONFIG_I2C_RK3X) += i2c-rk3x.o
70obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 70obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
71obj-$(CONFIG_I2C_S6000) += i2c-s6000.o 71obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
72obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o 72obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
@@ -75,6 +75,7 @@ obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
75obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o 75obj-$(CONFIG_I2C_SIRF) += i2c-sirf.o
76obj-$(CONFIG_I2C_ST) += i2c-st.o 76obj-$(CONFIG_I2C_ST) += i2c-st.o
77obj-$(CONFIG_I2C_STU300) += i2c-stu300.o 77obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
78obj-$(CONFIG_I2C_SUN6I_P2WI) += i2c-sun6i-p2wi.o
78obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o 79obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o
79obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 80obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
80obj-$(CONFIG_I2C_WMT) += i2c-wmt.o 81obj-$(CONFIG_I2C_WMT) += i2c-wmt.o
@@ -95,6 +96,7 @@ obj-$(CONFIG_I2C_VIPERBOARD) += i2c-viperboard.o
95# Other I2C/SMBus bus drivers 96# Other I2C/SMBus bus drivers
96obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o 97obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o
97obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o 98obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o
99obj-$(CONFIG_I2C_CROS_EC_TUNNEL) += i2c-cros-ec-tunnel.o
98obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o 100obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
99obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o 101obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
100obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o 102obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c
index 98a1c97739ba..15517d78d5ff 100644
--- a/drivers/i2c/busses/i2c-ali1563.c
+++ b/drivers/i2c/busses/i2c-ali1563.c
@@ -63,7 +63,7 @@
63static struct pci_driver ali1563_pci_driver; 63static struct pci_driver ali1563_pci_driver;
64static unsigned short ali1563_smba; 64static unsigned short ali1563_smba;
65 65
66static int ali1563_transaction(struct i2c_adapter * a, int size) 66static int ali1563_transaction(struct i2c_adapter *a, int size)
67{ 67{
68 u32 data; 68 u32 data;
69 int timeout; 69 int timeout;
@@ -78,7 +78,7 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
78 data = inb_p(SMB_HST_STS); 78 data = inb_p(SMB_HST_STS);
79 if (data & HST_STS_BAD) { 79 if (data & HST_STS_BAD) {
80 dev_err(&a->dev, "ali1563: Trying to reset busy device\n"); 80 dev_err(&a->dev, "ali1563: Trying to reset busy device\n");
81 outb_p(data | HST_STS_BAD,SMB_HST_STS); 81 outb_p(data | HST_STS_BAD, SMB_HST_STS);
82 data = inb_p(SMB_HST_STS); 82 data = inb_p(SMB_HST_STS);
83 if (data & HST_STS_BAD) 83 if (data & HST_STS_BAD)
84 return -EBUSY; 84 return -EBUSY;
@@ -102,10 +102,10 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
102 if (!timeout) { 102 if (!timeout) {
103 dev_err(&a->dev, "Timeout - Trying to KILL transaction!\n"); 103 dev_err(&a->dev, "Timeout - Trying to KILL transaction!\n");
104 /* Issue 'kill' to host controller */ 104 /* Issue 'kill' to host controller */
105 outb_p(HST_CNTL2_KILL,SMB_HST_CNTL2); 105 outb_p(HST_CNTL2_KILL, SMB_HST_CNTL2);
106 data = inb_p(SMB_HST_STS); 106 data = inb_p(SMB_HST_STS);
107 status = -ETIMEDOUT; 107 status = -ETIMEDOUT;
108 } 108 }
109 109
110 /* device error - no response, ignore the autodetection case */ 110 /* device error - no response, ignore the autodetection case */
111 if (data & HST_STS_DEVERR) { 111 if (data & HST_STS_DEVERR) {
@@ -117,18 +117,18 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
117 if (data & HST_STS_BUSERR) { 117 if (data & HST_STS_BUSERR) {
118 dev_err(&a->dev, "Bus collision!\n"); 118 dev_err(&a->dev, "Bus collision!\n");
119 /* Issue timeout, hoping it helps */ 119 /* Issue timeout, hoping it helps */
120 outb_p(HST_CNTL1_TIMEOUT,SMB_HST_CNTL1); 120 outb_p(HST_CNTL1_TIMEOUT, SMB_HST_CNTL1);
121 } 121 }
122 122
123 if (data & HST_STS_FAIL) { 123 if (data & HST_STS_FAIL) {
124 dev_err(&a->dev, "Cleaning fail after KILL!\n"); 124 dev_err(&a->dev, "Cleaning fail after KILL!\n");
125 outb_p(0x0,SMB_HST_CNTL2); 125 outb_p(0x0, SMB_HST_CNTL2);
126 } 126 }
127 127
128 return status; 128 return status;
129} 129}
130 130
131static int ali1563_block_start(struct i2c_adapter * a) 131static int ali1563_block_start(struct i2c_adapter *a)
132{ 132{
133 u32 data; 133 u32 data;
134 int timeout; 134 int timeout;
@@ -142,8 +142,8 @@ static int ali1563_block_start(struct i2c_adapter * a)
142 142
143 data = inb_p(SMB_HST_STS); 143 data = inb_p(SMB_HST_STS);
144 if (data & HST_STS_BAD) { 144 if (data & HST_STS_BAD) {
145 dev_warn(&a->dev,"ali1563: Trying to reset busy device\n"); 145 dev_warn(&a->dev, "ali1563: Trying to reset busy device\n");
146 outb_p(data | HST_STS_BAD,SMB_HST_STS); 146 outb_p(data | HST_STS_BAD, SMB_HST_STS);
147 data = inb_p(SMB_HST_STS); 147 data = inb_p(SMB_HST_STS);
148 if (data & HST_STS_BAD) 148 if (data & HST_STS_BAD)
149 return -EBUSY; 149 return -EBUSY;
@@ -184,13 +184,14 @@ static int ali1563_block_start(struct i2c_adapter * a)
184 return status; 184 return status;
185} 185}
186 186
187static int ali1563_block(struct i2c_adapter * a, union i2c_smbus_data * data, u8 rw) 187static int ali1563_block(struct i2c_adapter *a,
188 union i2c_smbus_data *data, u8 rw)
188{ 189{
189 int i, len; 190 int i, len;
190 int error = 0; 191 int error = 0;
191 192
192 /* Do we need this? */ 193 /* Do we need this? */
193 outb_p(HST_CNTL1_LAST,SMB_HST_CNTL1); 194 outb_p(HST_CNTL1_LAST, SMB_HST_CNTL1);
194 195
195 if (rw == I2C_SMBUS_WRITE) { 196 if (rw == I2C_SMBUS_WRITE) {
196 len = data->block[0]; 197 len = data->block[0];
@@ -198,8 +199,8 @@ static int ali1563_block(struct i2c_adapter * a, union i2c_smbus_data * data, u8
198 len = 1; 199 len = 1;
199 else if (len > 32) 200 else if (len > 32)
200 len = 32; 201 len = 32;
201 outb_p(len,SMB_HST_DAT0); 202 outb_p(len, SMB_HST_DAT0);
202 outb_p(data->block[1],SMB_BLK_DAT); 203 outb_p(data->block[1], SMB_BLK_DAT);
203 } else 204 } else
204 len = 32; 205 len = 32;
205 206
@@ -208,10 +209,12 @@ static int ali1563_block(struct i2c_adapter * a, union i2c_smbus_data * data, u8
208 for (i = 0; i < len; i++) { 209 for (i = 0; i < len; i++) {
209 if (rw == I2C_SMBUS_WRITE) { 210 if (rw == I2C_SMBUS_WRITE) {
210 outb_p(data->block[i + 1], SMB_BLK_DAT); 211 outb_p(data->block[i + 1], SMB_BLK_DAT);
211 if ((error = ali1563_block_start(a))) 212 error = ali1563_block_start(a);
213 if (error)
212 break; 214 break;
213 } else { 215 } else {
214 if ((error = ali1563_block_start(a))) 216 error = ali1563_block_start(a);
217 if (error)
215 break; 218 break;
216 if (i == 0) { 219 if (i == 0) {
217 len = inb_p(SMB_HST_DAT0); 220 len = inb_p(SMB_HST_DAT0);
@@ -224,25 +227,26 @@ static int ali1563_block(struct i2c_adapter * a, union i2c_smbus_data * data, u8
224 } 227 }
225 } 228 }
226 /* Do we need this? */ 229 /* Do we need this? */
227 outb_p(HST_CNTL1_LAST,SMB_HST_CNTL1); 230 outb_p(HST_CNTL1_LAST, SMB_HST_CNTL1);
228 return error; 231 return error;
229} 232}
230 233
231static s32 ali1563_access(struct i2c_adapter * a, u16 addr, 234static s32 ali1563_access(struct i2c_adapter *a, u16 addr,
232 unsigned short flags, char rw, u8 cmd, 235 unsigned short flags, char rw, u8 cmd,
233 int size, union i2c_smbus_data * data) 236 int size, union i2c_smbus_data *data)
234{ 237{
235 int error = 0; 238 int error = 0;
236 int timeout; 239 int timeout;
237 u32 reg; 240 u32 reg;
238 241
239 for (timeout = ALI1563_MAX_TIMEOUT; timeout; timeout--) { 242 for (timeout = ALI1563_MAX_TIMEOUT; timeout; timeout--) {
240 if (!(reg = inb_p(SMB_HST_STS) & HST_STS_BUSY)) 243 reg = inb_p(SMB_HST_STS);
244 if (!(reg & HST_STS_BUSY))
241 break; 245 break;
242 } 246 }
243 if (!timeout) 247 if (!timeout)
244 dev_warn(&a->dev,"SMBus not idle. HST_STS = %02x\n",reg); 248 dev_warn(&a->dev, "SMBus not idle. HST_STS = %02x\n", reg);
245 outb_p(0xff,SMB_HST_STS); 249 outb_p(0xff, SMB_HST_STS);
246 250
247 /* Map the size to what the chip understands */ 251 /* Map the size to what the chip understands */
248 switch (size) { 252 switch (size) {
@@ -268,13 +272,14 @@ static s32 ali1563_access(struct i2c_adapter * a, u16 addr,
268 } 272 }
269 273
270 outb_p(((addr & 0x7f) << 1) | (rw & 0x01), SMB_HST_ADD); 274 outb_p(((addr & 0x7f) << 1) | (rw & 0x01), SMB_HST_ADD);
271 outb_p((inb_p(SMB_HST_CNTL2) & ~HST_CNTL2_SIZEMASK) | (size << 3), SMB_HST_CNTL2); 275 outb_p((inb_p(SMB_HST_CNTL2) & ~HST_CNTL2_SIZEMASK) |
276 (size << 3), SMB_HST_CNTL2);
272 277
273 /* Write the command register */ 278 /* Write the command register */
274 279
275 switch(size) { 280 switch (size) {
276 case HST_CNTL2_BYTE: 281 case HST_CNTL2_BYTE:
277 if (rw== I2C_SMBUS_WRITE) 282 if (rw == I2C_SMBUS_WRITE)
278 /* Beware it uses DAT0 register and not CMD! */ 283 /* Beware it uses DAT0 register and not CMD! */
279 outb_p(cmd, SMB_HST_DAT0); 284 outb_p(cmd, SMB_HST_DAT0);
280 break; 285 break;
@@ -292,11 +297,12 @@ static s32 ali1563_access(struct i2c_adapter * a, u16 addr,
292 break; 297 break;
293 case HST_CNTL2_BLOCK: 298 case HST_CNTL2_BLOCK:
294 outb_p(cmd, SMB_HST_CMD); 299 outb_p(cmd, SMB_HST_CMD);
295 error = ali1563_block(a,data,rw); 300 error = ali1563_block(a, data, rw);
296 goto Done; 301 goto Done;
297 } 302 }
298 303
299 if ((error = ali1563_transaction(a, size))) 304 error = ali1563_transaction(a, size);
305 if (error)
300 goto Done; 306 goto Done;
301 307
302 if ((rw == I2C_SMBUS_WRITE) || (size == HST_CNTL2_QUICK)) 308 if ((rw == I2C_SMBUS_WRITE) || (size == HST_CNTL2_QUICK))
@@ -317,7 +323,7 @@ Done:
317 return error; 323 return error;
318} 324}
319 325
320static u32 ali1563_func(struct i2c_adapter * a) 326static u32 ali1563_func(struct i2c_adapter *a)
321{ 327{
322 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 328 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
323 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 329 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
@@ -329,13 +335,13 @@ static int ali1563_setup(struct pci_dev *dev)
329{ 335{
330 u16 ctrl; 336 u16 ctrl;
331 337
332 pci_read_config_word(dev,ALI1563_SMBBA,&ctrl); 338 pci_read_config_word(dev, ALI1563_SMBBA, &ctrl);
333 339
334 /* SMB I/O Base in high 12 bits and must be aligned with the 340 /* SMB I/O Base in high 12 bits and must be aligned with the
335 * size of the I/O space. */ 341 * size of the I/O space. */
336 ali1563_smba = ctrl & ~(ALI1563_SMB_IOSIZE - 1); 342 ali1563_smba = ctrl & ~(ALI1563_SMB_IOSIZE - 1);
337 if (!ali1563_smba) { 343 if (!ali1563_smba) {
338 dev_warn(&dev->dev,"ali1563_smba Uninitialized\n"); 344 dev_warn(&dev->dev, "ali1563_smba Uninitialized\n");
339 goto Err; 345 goto Err;
340 } 346 }
341 347
@@ -350,8 +356,8 @@ static int ali1563_setup(struct pci_dev *dev)
350 ctrl | ALI1563_SMB_IOEN); 356 ctrl | ALI1563_SMB_IOEN);
351 pci_read_config_word(dev, ALI1563_SMBBA, &ctrl); 357 pci_read_config_word(dev, ALI1563_SMBBA, &ctrl);
352 if (!(ctrl & ALI1563_SMB_IOEN)) { 358 if (!(ctrl & ALI1563_SMB_IOEN)) {
353 dev_err(&dev->dev, "I/O space still not enabled, " 359 dev_err(&dev->dev,
354 "giving up\n"); 360 "I/O space still not enabled, giving up\n");
355 goto Err; 361 goto Err;
356 } 362 }
357 } 363 }
@@ -375,7 +381,7 @@ Err:
375 381
376static void ali1563_shutdown(struct pci_dev *dev) 382static void ali1563_shutdown(struct pci_dev *dev)
377{ 383{
378 release_region(ali1563_smba,ALI1563_SMB_IOSIZE); 384 release_region(ali1563_smba, ALI1563_SMB_IOSIZE);
379} 385}
380 386
381static const struct i2c_algorithm ali1563_algorithm = { 387static const struct i2c_algorithm ali1563_algorithm = {
@@ -394,12 +400,14 @@ static int ali1563_probe(struct pci_dev *dev,
394{ 400{
395 int error; 401 int error;
396 402
397 if ((error = ali1563_setup(dev))) 403 error = ali1563_setup(dev);
404 if (error)
398 goto exit; 405 goto exit;
399 ali1563_adapter.dev.parent = &dev->dev; 406 ali1563_adapter.dev.parent = &dev->dev;
400 snprintf(ali1563_adapter.name, sizeof(ali1563_adapter.name), 407 snprintf(ali1563_adapter.name, sizeof(ali1563_adapter.name),
401 "SMBus ALi 1563 Adapter @ %04x", ali1563_smba); 408 "SMBus ALi 1563 Adapter @ %04x", ali1563_smba);
402 if ((error = i2c_add_adapter(&ali1563_adapter))) 409 error = i2c_add_adapter(&ali1563_adapter);
410 if (error)
403 goto exit_shutdown; 411 goto exit_shutdown;
404 return 0; 412 return 0;
405 413
@@ -421,12 +429,12 @@ static const struct pci_device_id ali1563_id_table[] = {
421 {}, 429 {},
422}; 430};
423 431
424MODULE_DEVICE_TABLE (pci, ali1563_id_table); 432MODULE_DEVICE_TABLE(pci, ali1563_id_table);
425 433
426static struct pci_driver ali1563_pci_driver = { 434static struct pci_driver ali1563_pci_driver = {
427 .name = "ali1563_smbus", 435 .name = "ali1563_smbus",
428 .id_table = ali1563_id_table, 436 .id_table = ali1563_id_table,
429 .probe = ali1563_probe, 437 .probe = ali1563_probe,
430 .remove = ali1563_remove, 438 .remove = ali1563_remove,
431}; 439};
432 440
diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
index c60719577fc3..214ff9700efe 100644
--- a/drivers/i2c/busses/i2c-bcm2835.c
+++ b/drivers/i2c/busses/i2c-bcm2835.c
@@ -225,10 +225,8 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
225 struct i2c_adapter *adap; 225 struct i2c_adapter *adap;
226 226
227 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); 227 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
228 if (!i2c_dev) { 228 if (!i2c_dev)
229 dev_err(&pdev->dev, "Cannot allocate i2c_dev\n");
230 return -ENOMEM; 229 return -ENOMEM;
231 }
232 platform_set_drvdata(pdev, i2c_dev); 230 platform_set_drvdata(pdev, i2c_dev);
233 i2c_dev->dev = &pdev->dev; 231 i2c_dev->dev = &pdev->dev;
234 init_completion(&i2c_dev->completion); 232 init_completion(&i2c_dev->completion);
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index e6d5162b6379..3e271e7558d3 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -620,35 +620,27 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
620 int rc; 620 int rc;
621 unsigned int clkhilow; 621 unsigned int clkhilow;
622 622
623 iface = kzalloc(sizeof(struct bfin_twi_iface), GFP_KERNEL); 623 iface = devm_kzalloc(&pdev->dev, sizeof(struct bfin_twi_iface),
624 GFP_KERNEL);
624 if (!iface) { 625 if (!iface) {
625 dev_err(&pdev->dev, "Cannot allocate memory\n"); 626 dev_err(&pdev->dev, "Cannot allocate memory\n");
626 rc = -ENOMEM; 627 return -ENOMEM;
627 goto out_error_nomem;
628 } 628 }
629 629
630 spin_lock_init(&(iface->lock)); 630 spin_lock_init(&(iface->lock));
631 631
632 /* Find and map our resources */ 632 /* Find and map our resources */
633 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 633 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
634 if (res == NULL) { 634 iface->regs_base = devm_ioremap_resource(&pdev->dev, res);
635 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n"); 635 if (IS_ERR(iface->regs_base)) {
636 rc = -ENOENT;
637 goto out_error_get_res;
638 }
639
640 iface->regs_base = ioremap(res->start, resource_size(res));
641 if (iface->regs_base == NULL) {
642 dev_err(&pdev->dev, "Cannot map IO\n"); 636 dev_err(&pdev->dev, "Cannot map IO\n");
643 rc = -ENXIO; 637 return PTR_ERR(iface->regs_base);
644 goto out_error_ioremap;
645 } 638 }
646 639
647 iface->irq = platform_get_irq(pdev, 0); 640 iface->irq = platform_get_irq(pdev, 0);
648 if (iface->irq < 0) { 641 if (iface->irq < 0) {
649 dev_err(&pdev->dev, "No IRQ specified\n"); 642 dev_err(&pdev->dev, "No IRQ specified\n");
650 rc = -ENOENT; 643 return -ENOENT;
651 goto out_error_no_irq;
652 } 644 }
653 645
654 p_adap = &iface->adap; 646 p_adap = &iface->adap;
@@ -666,15 +658,15 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
666 "i2c-bfin-twi"); 658 "i2c-bfin-twi");
667 if (rc) { 659 if (rc) {
668 dev_err(&pdev->dev, "Can't setup pin mux!\n"); 660 dev_err(&pdev->dev, "Can't setup pin mux!\n");
669 goto out_error_pin_mux; 661 return -EBUSY;
670 } 662 }
671 663
672 rc = request_irq(iface->irq, bfin_twi_interrupt_entry, 664 rc = devm_request_irq(&pdev->dev, iface->irq, bfin_twi_interrupt_entry,
673 0, pdev->name, iface); 665 0, pdev->name, iface);
674 if (rc) { 666 if (rc) {
675 dev_err(&pdev->dev, "Can't get IRQ %d !\n", iface->irq); 667 dev_err(&pdev->dev, "Can't get IRQ %d !\n", iface->irq);
676 rc = -ENODEV; 668 rc = -ENODEV;
677 goto out_error_req_irq; 669 goto out_error;
678 } 670 }
679 671
680 /* Set TWI internal clock as 10MHz */ 672 /* Set TWI internal clock as 10MHz */
@@ -695,7 +687,7 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
695 rc = i2c_add_numbered_adapter(p_adap); 687 rc = i2c_add_numbered_adapter(p_adap);
696 if (rc < 0) { 688 if (rc < 0) {
697 dev_err(&pdev->dev, "Can't add i2c adapter!\n"); 689 dev_err(&pdev->dev, "Can't add i2c adapter!\n");
698 goto out_error_add_adapter; 690 goto out_error;
699 } 691 }
700 692
701 platform_set_drvdata(pdev, iface); 693 platform_set_drvdata(pdev, iface);
@@ -705,17 +697,8 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
705 697
706 return 0; 698 return 0;
707 699
708out_error_add_adapter: 700out_error:
709 free_irq(iface->irq, iface);
710out_error_req_irq:
711out_error_no_irq:
712 peripheral_free_list(dev_get_platdata(&pdev->dev)); 701 peripheral_free_list(dev_get_platdata(&pdev->dev));
713out_error_pin_mux:
714 iounmap(iface->regs_base);
715out_error_ioremap:
716out_error_get_res:
717 kfree(iface);
718out_error_nomem:
719 return rc; 702 return rc;
720} 703}
721 704
@@ -724,10 +707,7 @@ static int i2c_bfin_twi_remove(struct platform_device *pdev)
724 struct bfin_twi_iface *iface = platform_get_drvdata(pdev); 707 struct bfin_twi_iface *iface = platform_get_drvdata(pdev);
725 708
726 i2c_del_adapter(&(iface->adap)); 709 i2c_del_adapter(&(iface->adap));
727 free_irq(iface->irq, iface);
728 peripheral_free_list(dev_get_platdata(&pdev->dev)); 710 peripheral_free_list(dev_get_platdata(&pdev->dev));
729 iounmap(iface->regs_base);
730 kfree(iface);
731 711
732 return 0; 712 return 0;
733} 713}
diff --git a/drivers/i2c/busses/i2c-cros-ec-tunnel.c b/drivers/i2c/busses/i2c-cros-ec-tunnel.c
new file mode 100644
index 000000000000..8e7a71487bb1
--- /dev/null
+++ b/drivers/i2c/busses/i2c-cros-ec-tunnel.c
@@ -0,0 +1,318 @@
1/*
2 * Copyright (C) 2013 Google, Inc
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * Expose an I2C passthrough to the ChromeOS EC.
10 */
11
12#include <linux/module.h>
13#include <linux/i2c.h>
14#include <linux/mfd/cros_ec.h>
15#include <linux/mfd/cros_ec_commands.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
18
19/**
20 * struct ec_i2c_device - Driver data for I2C tunnel
21 *
22 * @dev: Device node
23 * @adap: I2C adapter
24 * @ec: Pointer to EC device
25 * @remote_bus: The EC bus number we tunnel to on the other side.
26 * @request_buf: Buffer for transmitting data; we expect most transfers to fit.
27 * @response_buf: Buffer for receiving data; we expect most transfers to fit.
28 */
29
30struct ec_i2c_device {
31 struct device *dev;
32 struct i2c_adapter adap;
33 struct cros_ec_device *ec;
34
35 u16 remote_bus;
36
37 u8 request_buf[256];
38 u8 response_buf[256];
39};
40
41/**
42 * ec_i2c_count_message - Count bytes needed for ec_i2c_construct_message
43 *
44 * @i2c_msgs: The i2c messages to read
45 * @num: The number of i2c messages.
46 *
47 * Returns the number of bytes the messages will take up.
48 */
49static int ec_i2c_count_message(const struct i2c_msg i2c_msgs[], int num)
50{
51 int i;
52 int size;
53
54 size = sizeof(struct ec_params_i2c_passthru);
55 size += num * sizeof(struct ec_params_i2c_passthru_msg);
56 for (i = 0; i < num; i++)
57 if (!(i2c_msgs[i].flags & I2C_M_RD))
58 size += i2c_msgs[i].len;
59
60 return size;
61}
62
63/**
64 * ec_i2c_construct_message - construct a message to go to the EC
65 *
66 * This function effectively stuffs the standard i2c_msg format of Linux into
67 * a format that the EC understands.
68 *
69 * @buf: The buffer to fill. We assume that the buffer is big enough.
70 * @i2c_msgs: The i2c messages to read.
71 * @num: The number of i2c messages.
72 * @bus_num: The remote bus number we want to talk to.
73 *
74 * Returns 0 or a negative error number.
75 */
76static int ec_i2c_construct_message(u8 *buf, const struct i2c_msg i2c_msgs[],
77 int num, u16 bus_num)
78{
79 struct ec_params_i2c_passthru *params;
80 u8 *out_data;
81 int i;
82
83 out_data = buf + sizeof(struct ec_params_i2c_passthru) +
84 num * sizeof(struct ec_params_i2c_passthru_msg);
85
86 params = (struct ec_params_i2c_passthru *)buf;
87 params->port = bus_num;
88 params->num_msgs = num;
89 for (i = 0; i < num; i++) {
90 const struct i2c_msg *i2c_msg = &i2c_msgs[i];
91 struct ec_params_i2c_passthru_msg *msg = &params->msg[i];
92
93 msg->len = i2c_msg->len;
94 msg->addr_flags = i2c_msg->addr;
95
96 if (i2c_msg->flags & I2C_M_TEN)
97 msg->addr_flags |= EC_I2C_FLAG_10BIT;
98
99 if (i2c_msg->flags & I2C_M_RD) {
100 msg->addr_flags |= EC_I2C_FLAG_READ;
101 } else {
102 memcpy(out_data, i2c_msg->buf, msg->len);
103 out_data += msg->len;
104 }
105 }
106
107 return 0;
108}
109
110/**
111 * ec_i2c_count_response - Count bytes needed for ec_i2c_parse_response
112 *
113 * @i2c_msgs: The i2c messages to to fill up.
114 * @num: The number of i2c messages expected.
115 *
116 * Returns the number of response bytes expeced.
117 */
118static int ec_i2c_count_response(struct i2c_msg i2c_msgs[], int num)
119{
120 int size;
121 int i;
122
123 size = sizeof(struct ec_response_i2c_passthru);
124 for (i = 0; i < num; i++)
125 if (i2c_msgs[i].flags & I2C_M_RD)
126 size += i2c_msgs[i].len;
127
128 return size;
129}
130
131/**
132 * ec_i2c_parse_response - Parse a response from the EC
133 *
134 * We'll take the EC's response and copy it back into msgs.
135 *
136 * @buf: The buffer to parse.
137 * @i2c_msgs: The i2c messages to to fill up.
138 * @num: The number of i2c messages; will be modified to include the actual
139 * number received.
140 *
141 * Returns 0 or a negative error number.
142 */
143static int ec_i2c_parse_response(const u8 *buf, struct i2c_msg i2c_msgs[],
144 int *num)
145{
146 const struct ec_response_i2c_passthru *resp;
147 const u8 *in_data;
148 int i;
149
150 in_data = buf + sizeof(struct ec_response_i2c_passthru);
151
152 resp = (const struct ec_response_i2c_passthru *)buf;
153 if (resp->i2c_status & EC_I2C_STATUS_TIMEOUT)
154 return -ETIMEDOUT;
155 else if (resp->i2c_status & EC_I2C_STATUS_ERROR)
156 return -EREMOTEIO;
157
158 /* Other side could send us back fewer messages, but not more */
159 if (resp->num_msgs > *num)
160 return -EPROTO;
161 *num = resp->num_msgs;
162
163 for (i = 0; i < *num; i++) {
164 struct i2c_msg *i2c_msg = &i2c_msgs[i];
165
166 if (i2c_msgs[i].flags & I2C_M_RD) {
167 memcpy(i2c_msg->buf, in_data, i2c_msg->len);
168 in_data += i2c_msg->len;
169 }
170 }
171
172 return 0;
173}
174
175static int ec_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg i2c_msgs[],
176 int num)
177{
178 struct ec_i2c_device *bus = adap->algo_data;
179 struct device *dev = bus->dev;
180 const u16 bus_num = bus->remote_bus;
181 int request_len;
182 int response_len;
183 u8 *request = NULL;
184 u8 *response = NULL;
185 int result;
186
187 request_len = ec_i2c_count_message(i2c_msgs, num);
188 if (request_len < 0) {
189 dev_warn(dev, "Error constructing message %d\n", request_len);
190 result = request_len;
191 goto exit;
192 }
193 response_len = ec_i2c_count_response(i2c_msgs, num);
194 if (response_len < 0) {
195 /* Unexpected; no errors should come when NULL response */
196 dev_warn(dev, "Error preparing response %d\n", response_len);
197 result = response_len;
198 goto exit;
199 }
200
201 if (request_len <= ARRAY_SIZE(bus->request_buf)) {
202 request = bus->request_buf;
203 } else {
204 request = kzalloc(request_len, GFP_KERNEL);
205 if (request == NULL) {
206 result = -ENOMEM;
207 goto exit;
208 }
209 }
210 if (response_len <= ARRAY_SIZE(bus->response_buf)) {
211 response = bus->response_buf;
212 } else {
213 response = kzalloc(response_len, GFP_KERNEL);
214 if (response == NULL) {
215 result = -ENOMEM;
216 goto exit;
217 }
218 }
219
220 ec_i2c_construct_message(request, i2c_msgs, num, bus_num);
221 result = bus->ec->command_sendrecv(bus->ec, EC_CMD_I2C_PASSTHRU,
222 request, request_len,
223 response, response_len);
224 if (result)
225 goto exit;
226
227 result = ec_i2c_parse_response(response, i2c_msgs, &num);
228 if (result < 0)
229 goto exit;
230
231 /* Indicate success by saying how many messages were sent */
232 result = num;
233exit:
234 if (request != bus->request_buf)
235 kfree(request);
236 if (response != bus->response_buf)
237 kfree(response);
238
239 return result;
240}
241
242static u32 ec_i2c_functionality(struct i2c_adapter *adap)
243{
244 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
245}
246
247static const struct i2c_algorithm ec_i2c_algorithm = {
248 .master_xfer = ec_i2c_xfer,
249 .functionality = ec_i2c_functionality,
250};
251
252static int ec_i2c_probe(struct platform_device *pdev)
253{
254 struct device_node *np = pdev->dev.of_node;
255 struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
256 struct device *dev = &pdev->dev;
257 struct ec_i2c_device *bus = NULL;
258 u32 remote_bus;
259 int err;
260
261 if (!ec->command_sendrecv) {
262 dev_err(dev, "Missing sendrecv\n");
263 return -EINVAL;
264 }
265
266 bus = devm_kzalloc(dev, sizeof(*bus), GFP_KERNEL);
267 if (bus == NULL)
268 return -ENOMEM;
269
270 err = of_property_read_u32(np, "google,remote-bus", &remote_bus);
271 if (err) {
272 dev_err(dev, "Couldn't read remote-bus property\n");
273 return err;
274 }
275 bus->remote_bus = remote_bus;
276
277 bus->ec = ec;
278 bus->dev = dev;
279
280 bus->adap.owner = THIS_MODULE;
281 strlcpy(bus->adap.name, "cros-ec-i2c-tunnel", sizeof(bus->adap.name));
282 bus->adap.algo = &ec_i2c_algorithm;
283 bus->adap.algo_data = bus;
284 bus->adap.dev.parent = &pdev->dev;
285 bus->adap.dev.of_node = np;
286
287 err = i2c_add_adapter(&bus->adap);
288 if (err) {
289 dev_err(dev, "cannot register i2c adapter\n");
290 return err;
291 }
292 platform_set_drvdata(pdev, bus);
293
294 return err;
295}
296
297static int ec_i2c_remove(struct platform_device *dev)
298{
299 struct ec_i2c_device *bus = platform_get_drvdata(dev);
300
301 i2c_del_adapter(&bus->adap);
302
303 return 0;
304}
305
306static struct platform_driver ec_i2c_tunnel_driver = {
307 .probe = ec_i2c_probe,
308 .remove = ec_i2c_remove,
309 .driver = {
310 .name = "cros-ec-i2c-tunnel",
311 },
312};
313
314module_platform_driver(ec_i2c_tunnel_driver);
315
316MODULE_LICENSE("GPL");
317MODULE_DESCRIPTION("EC I2C tunnel driver");
318MODULE_ALIAS("platform:cros-ec-i2c-tunnel");
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 22e92c3d3d07..3c20e4bd6dd1 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -422,6 +422,9 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
422 */ 422 */
423 dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR); 423 dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR);
424 424
425 /* enforce disabled interrupts (due to HW issues) */
426 i2c_dw_disable_int(dev);
427
425 /* Enable the adapter */ 428 /* Enable the adapter */
426 __i2c_dw_enable(dev, true); 429 __i2c_dw_enable(dev, true);
427 430
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 85056c22d21e..3356f7ab9f79 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -56,6 +56,7 @@ enum dw_pci_ctl_id_t {
56 medfield_5, 56 medfield_5,
57 57
58 baytrail, 58 baytrail,
59 haswell,
59}; 60};
60 61
61struct dw_scl_sda_cfg { 62struct dw_scl_sda_cfg {
@@ -95,6 +96,15 @@ static struct dw_scl_sda_cfg byt_config = {
95 .sda_hold = 0x6, 96 .sda_hold = 0x6,
96}; 97};
97 98
99/* Haswell HCNT/LCNT/SDA hold time */
100static struct dw_scl_sda_cfg hsw_config = {
101 .ss_hcnt = 0x01b0,
102 .fs_hcnt = 0x48,
103 .ss_lcnt = 0x01fb,
104 .fs_lcnt = 0xa0,
105 .sda_hold = 0x9,
106};
107
98static struct dw_pci_controller dw_pci_controllers[] = { 108static struct dw_pci_controller dw_pci_controllers[] = {
99 [moorestown_0] = { 109 [moorestown_0] = {
100 .bus_num = 0, 110 .bus_num = 0,
@@ -168,6 +178,15 @@ static struct dw_pci_controller dw_pci_controllers[] = {
168 .functionality = I2C_FUNC_10BIT_ADDR, 178 .functionality = I2C_FUNC_10BIT_ADDR,
169 .scl_sda_cfg = &byt_config, 179 .scl_sda_cfg = &byt_config,
170 }, 180 },
181 [haswell] = {
182 .bus_num = -1,
183 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
184 .tx_fifo_depth = 32,
185 .rx_fifo_depth = 32,
186 .clk_khz = 100000,
187 .functionality = I2C_FUNC_10BIT_ADDR,
188 .scl_sda_cfg = &hsw_config,
189 },
171}; 190};
172static struct i2c_algorithm i2c_dw_algo = { 191static struct i2c_algorithm i2c_dw_algo = {
173 .master_xfer = i2c_dw_xfer, 192 .master_xfer = i2c_dw_xfer,
@@ -328,6 +347,9 @@ static const struct pci_device_id i2_designware_pci_ids[] = {
328 { PCI_VDEVICE(INTEL, 0x0F45), baytrail }, 347 { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
329 { PCI_VDEVICE(INTEL, 0x0F46), baytrail }, 348 { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
330 { PCI_VDEVICE(INTEL, 0x0F47), baytrail }, 349 { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
350 /* Haswell */
351 { PCI_VDEVICE(INTEL, 0x9c61), haswell },
352 { PCI_VDEVICE(INTEL, 0x9c62), haswell },
331 { 0,} 353 { 0,}
332}; 354};
333MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); 355MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 9c7802614342..402ec3970fed 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -247,12 +247,13 @@ static const struct of_device_id dw_i2c_of_match[] = {
247MODULE_DEVICE_TABLE(of, dw_i2c_of_match); 247MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
248#endif 248#endif
249 249
250#ifdef CONFIG_PM_SLEEP 250#ifdef CONFIG_PM
251static int dw_i2c_suspend(struct device *dev) 251static int dw_i2c_suspend(struct device *dev)
252{ 252{
253 struct platform_device *pdev = to_platform_device(dev); 253 struct platform_device *pdev = to_platform_device(dev);
254 struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); 254 struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
255 255
256 i2c_dw_disable(i_dev);
256 clk_disable_unprepare(i_dev->clk); 257 clk_disable_unprepare(i_dev->clk);
257 258
258 return 0; 259 return 0;
@@ -268,13 +269,11 @@ static int dw_i2c_resume(struct device *dev)
268 269
269 return 0; 270 return 0;
270} 271}
271
272static SIMPLE_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend, dw_i2c_resume);
273#define DW_I2C_DEV_PM_OPS (&dw_i2c_dev_pm_ops)
274#else
275#define DW_I2C_DEV_PM_OPS NULL
276#endif 272#endif
277 273
274static UNIVERSAL_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend,
275 dw_i2c_resume, NULL);
276
278/* work with hotplug and coldplug */ 277/* work with hotplug and coldplug */
279MODULE_ALIAS("platform:i2c_designware"); 278MODULE_ALIAS("platform:i2c_designware");
280 279
@@ -286,7 +285,7 @@ static struct platform_driver dw_i2c_driver = {
286 .owner = THIS_MODULE, 285 .owner = THIS_MODULE,
287 .of_match_table = of_match_ptr(dw_i2c_of_match), 286 .of_match_table = of_match_ptr(dw_i2c_of_match),
288 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match), 287 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
289 .pm = DW_I2C_DEV_PM_OPS, 288 .pm = &dw_i2c_dev_pm_ops,
290 }, 289 },
291}; 290};
292 291
diff --git a/drivers/i2c/busses/i2c-diolan-u2c.c b/drivers/i2c/busses/i2c-diolan-u2c.c
index 721f7ebf9a3b..b19a310bf9b3 100644
--- a/drivers/i2c/busses/i2c-diolan-u2c.c
+++ b/drivers/i2c/busses/i2c-diolan-u2c.c
@@ -455,7 +455,6 @@ static int diolan_u2c_probe(struct usb_interface *interface,
455 /* allocate memory for our device state and initialize it */ 455 /* allocate memory for our device state and initialize it */
456 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 456 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
457 if (dev == NULL) { 457 if (dev == NULL) {
458 dev_err(&interface->dev, "no memory for device state\n");
459 ret = -ENOMEM; 458 ret = -ENOMEM;
460 goto error; 459 goto error;
461 } 460 }
diff --git a/drivers/i2c/busses/i2c-efm32.c b/drivers/i2c/busses/i2c-efm32.c
index 777ed409a24a..f7eccd682de9 100644
--- a/drivers/i2c/busses/i2c-efm32.c
+++ b/drivers/i2c/busses/i2c-efm32.c
@@ -320,10 +320,8 @@ static int efm32_i2c_probe(struct platform_device *pdev)
320 return -EINVAL; 320 return -EINVAL;
321 321
322 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); 322 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
323 if (!ddata) { 323 if (!ddata)
324 dev_dbg(&pdev->dev, "failed to allocate private data\n");
325 return -ENOMEM; 324 return -ENOMEM;
326 }
327 platform_set_drvdata(pdev, ddata); 325 platform_set_drvdata(pdev, ddata);
328 326
329 init_completion(&ddata->done); 327 init_completion(&ddata->done);
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index ff775ac29e49..a44ea13d1434 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -751,10 +751,8 @@ static int pch_i2c_probe(struct pci_dev *pdev,
751 pch_pci_dbg(pdev, "Entered.\n"); 751 pch_pci_dbg(pdev, "Entered.\n");
752 752
753 adap_info = kzalloc((sizeof(struct adapter_info)), GFP_KERNEL); 753 adap_info = kzalloc((sizeof(struct adapter_info)), GFP_KERNEL);
754 if (adap_info == NULL) { 754 if (adap_info == NULL)
755 pch_pci_err(pdev, "Memory allocation FAILED\n");
756 return -ENOMEM; 755 return -ENOMEM;
757 }
758 756
759 ret = pci_enable_device(pdev); 757 ret = pci_enable_device(pdev);
760 if (ret) { 758 if (ret) {
diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
index 00af0a0a3361..63d229202854 100644
--- a/drivers/i2c/busses/i2c-exynos5.c
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -76,12 +76,6 @@
76#define HSI2C_RXFIFO_TRIGGER_LEVEL(x) ((x) << 4) 76#define HSI2C_RXFIFO_TRIGGER_LEVEL(x) ((x) << 4)
77#define HSI2C_TXFIFO_TRIGGER_LEVEL(x) ((x) << 16) 77#define HSI2C_TXFIFO_TRIGGER_LEVEL(x) ((x) << 16)
78 78
79/* As per user manual FIFO max depth is 64bytes */
80#define HSI2C_FIFO_MAX 0x40
81/* default trigger levels for Tx and Rx FIFOs */
82#define HSI2C_DEF_TXFIFO_LVL (HSI2C_FIFO_MAX - 0x30)
83#define HSI2C_DEF_RXFIFO_LVL (HSI2C_FIFO_MAX - 0x10)
84
85/* I2C_TRAILING_CTL Register bits */ 79/* I2C_TRAILING_CTL Register bits */
86#define HSI2C_TRAILING_COUNT (0xf) 80#define HSI2C_TRAILING_COUNT (0xf)
87 81
@@ -183,14 +177,54 @@ struct exynos5_i2c {
183 * 2. Fast speed upto 1Mbps 177 * 2. Fast speed upto 1Mbps
184 */ 178 */
185 int speed_mode; 179 int speed_mode;
180
181 /* Version of HS-I2C Hardware */
182 struct exynos_hsi2c_variant *variant;
183};
184
185/**
186 * struct exynos_hsi2c_variant - platform specific HSI2C driver data
187 * @fifo_depth: the fifo depth supported by the HSI2C module
188 *
189 * Specifies platform specific configuration of HSI2C module.
190 * Note: A structure for driver specific platform data is used for future
191 * expansion of its usage.
192 */
193struct exynos_hsi2c_variant {
194 unsigned int fifo_depth;
195};
196
197static const struct exynos_hsi2c_variant exynos5250_hsi2c_data = {
198 .fifo_depth = 64,
199};
200
201static const struct exynos_hsi2c_variant exynos5260_hsi2c_data = {
202 .fifo_depth = 16,
186}; 203};
187 204
188static const struct of_device_id exynos5_i2c_match[] = { 205static const struct of_device_id exynos5_i2c_match[] = {
189 { .compatible = "samsung,exynos5-hsi2c" }, 206 {
190 {}, 207 .compatible = "samsung,exynos5-hsi2c",
208 .data = &exynos5250_hsi2c_data
209 }, {
210 .compatible = "samsung,exynos5250-hsi2c",
211 .data = &exynos5250_hsi2c_data
212 }, {
213 .compatible = "samsung,exynos5260-hsi2c",
214 .data = &exynos5260_hsi2c_data
215 }, {},
191}; 216};
192MODULE_DEVICE_TABLE(of, exynos5_i2c_match); 217MODULE_DEVICE_TABLE(of, exynos5_i2c_match);
193 218
219static inline struct exynos_hsi2c_variant *exynos5_i2c_get_variant
220 (struct platform_device *pdev)
221{
222 const struct of_device_id *match;
223
224 match = of_match_node(exynos5_i2c_match, pdev->dev.of_node);
225 return (struct exynos_hsi2c_variant *)match->data;
226}
227
194static void exynos5_i2c_clr_pend_irq(struct exynos5_i2c *i2c) 228static void exynos5_i2c_clr_pend_irq(struct exynos5_i2c *i2c)
195{ 229{
196 writel(readl(i2c->regs + HSI2C_INT_STATUS), 230 writel(readl(i2c->regs + HSI2C_INT_STATUS),
@@ -415,7 +449,7 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id)
415 fifo_status = readl(i2c->regs + HSI2C_FIFO_STATUS); 449 fifo_status = readl(i2c->regs + HSI2C_FIFO_STATUS);
416 fifo_level = HSI2C_TX_FIFO_LVL(fifo_status); 450 fifo_level = HSI2C_TX_FIFO_LVL(fifo_status);
417 451
418 len = HSI2C_FIFO_MAX - fifo_level; 452 len = i2c->variant->fifo_depth - fifo_level;
419 if (len > (i2c->msg->len - i2c->msg_ptr)) 453 if (len > (i2c->msg->len - i2c->msg_ptr))
420 len = i2c->msg->len - i2c->msg_ptr; 454 len = i2c->msg->len - i2c->msg_ptr;
421 455
@@ -483,6 +517,7 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop)
483 u32 i2c_auto_conf = 0; 517 u32 i2c_auto_conf = 0;
484 u32 fifo_ctl; 518 u32 fifo_ctl;
485 unsigned long flags; 519 unsigned long flags;
520 unsigned short trig_lvl;
486 521
487 i2c_ctl = readl(i2c->regs + HSI2C_CTL); 522 i2c_ctl = readl(i2c->regs + HSI2C_CTL);
488 i2c_ctl &= ~(HSI2C_TXCHON | HSI2C_RXCHON); 523 i2c_ctl &= ~(HSI2C_TXCHON | HSI2C_RXCHON);
@@ -493,13 +528,19 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop)
493 528
494 i2c_auto_conf = HSI2C_READ_WRITE; 529 i2c_auto_conf = HSI2C_READ_WRITE;
495 530
496 fifo_ctl |= HSI2C_RXFIFO_TRIGGER_LEVEL(HSI2C_DEF_TXFIFO_LVL); 531 trig_lvl = (i2c->msg->len > i2c->variant->fifo_depth) ?
532 (i2c->variant->fifo_depth * 3 / 4) : i2c->msg->len;
533 fifo_ctl |= HSI2C_RXFIFO_TRIGGER_LEVEL(trig_lvl);
534
497 int_en |= (HSI2C_INT_RX_ALMOSTFULL_EN | 535 int_en |= (HSI2C_INT_RX_ALMOSTFULL_EN |
498 HSI2C_INT_TRAILING_EN); 536 HSI2C_INT_TRAILING_EN);
499 } else { 537 } else {
500 i2c_ctl |= HSI2C_TXCHON; 538 i2c_ctl |= HSI2C_TXCHON;
501 539
502 fifo_ctl |= HSI2C_TXFIFO_TRIGGER_LEVEL(HSI2C_DEF_RXFIFO_LVL); 540 trig_lvl = (i2c->msg->len > i2c->variant->fifo_depth) ?
541 (i2c->variant->fifo_depth * 1 / 4) : i2c->msg->len;
542 fifo_ctl |= HSI2C_TXFIFO_TRIGGER_LEVEL(trig_lvl);
543
503 int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN; 544 int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN;
504 } 545 }
505 546
@@ -621,10 +662,8 @@ static int exynos5_i2c_probe(struct platform_device *pdev)
621 int ret; 662 int ret;
622 663
623 i2c = devm_kzalloc(&pdev->dev, sizeof(struct exynos5_i2c), GFP_KERNEL); 664 i2c = devm_kzalloc(&pdev->dev, sizeof(struct exynos5_i2c), GFP_KERNEL);
624 if (!i2c) { 665 if (!i2c)
625 dev_err(&pdev->dev, "no memory for state\n");
626 return -ENOMEM; 666 return -ENOMEM;
627 }
628 667
629 if (of_property_read_u32(np, "clock-frequency", &op_clock)) { 668 if (of_property_read_u32(np, "clock-frequency", &op_clock)) {
630 i2c->speed_mode = HSI2C_FAST_SPD; 669 i2c->speed_mode = HSI2C_FAST_SPD;
@@ -691,7 +730,9 @@ static int exynos5_i2c_probe(struct platform_device *pdev)
691 if (ret) 730 if (ret)
692 goto err_clk; 731 goto err_clk;
693 732
694 exynos5_i2c_init(i2c); 733 i2c->variant = exynos5_i2c_get_variant(pdev);
734
735 exynos5_i2c_reset(i2c);
695 736
696 ret = i2c_add_adapter(&i2c->adap); 737 ret = i2c_add_adapter(&i2c->adap);
697 if (ret < 0) { 738 if (ret < 0) {
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index 02d2d4abb9dd..71a45b210a24 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -147,24 +147,22 @@ static int i2c_gpio_probe(struct platform_device *pdev)
147 scl_pin = pdata->scl_pin; 147 scl_pin = pdata->scl_pin;
148 } 148 }
149 149
150 ret = gpio_request(sda_pin, "sda"); 150 ret = devm_gpio_request(&pdev->dev, sda_pin, "sda");
151 if (ret) { 151 if (ret) {
152 if (ret == -EINVAL) 152 if (ret == -EINVAL)
153 ret = -EPROBE_DEFER; /* Try again later */ 153 ret = -EPROBE_DEFER; /* Try again later */
154 goto err_request_sda; 154 return ret;
155 } 155 }
156 ret = gpio_request(scl_pin, "scl"); 156 ret = devm_gpio_request(&pdev->dev, scl_pin, "scl");
157 if (ret) { 157 if (ret) {
158 if (ret == -EINVAL) 158 if (ret == -EINVAL)
159 ret = -EPROBE_DEFER; /* Try again later */ 159 ret = -EPROBE_DEFER; /* Try again later */
160 goto err_request_scl; 160 return ret;
161 } 161 }
162 162
163 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 163 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
164 if (!priv) { 164 if (!priv)
165 ret = -ENOMEM; 165 return -ENOMEM;
166 goto err_add_bus;
167 }
168 adap = &priv->adap; 166 adap = &priv->adap;
169 bit_data = &priv->bit_data; 167 bit_data = &priv->bit_data;
170 pdata = &priv->pdata; 168 pdata = &priv->pdata;
@@ -225,7 +223,7 @@ static int i2c_gpio_probe(struct platform_device *pdev)
225 adap->nr = pdev->id; 223 adap->nr = pdev->id;
226 ret = i2c_bit_add_numbered_bus(adap); 224 ret = i2c_bit_add_numbered_bus(adap);
227 if (ret) 225 if (ret)
228 goto err_add_bus; 226 return ret;
229 227
230 platform_set_drvdata(pdev, priv); 228 platform_set_drvdata(pdev, priv);
231 229
@@ -235,13 +233,6 @@ static int i2c_gpio_probe(struct platform_device *pdev)
235 ? ", no clock stretching" : ""); 233 ? ", no clock stretching" : "");
236 234
237 return 0; 235 return 0;
238
239err_add_bus:
240 gpio_free(scl_pin);
241err_request_scl:
242 gpio_free(sda_pin);
243err_request_sda:
244 return ret;
245} 236}
246 237
247static int i2c_gpio_remove(struct platform_device *pdev) 238static int i2c_gpio_remove(struct platform_device *pdev)
@@ -255,8 +246,6 @@ static int i2c_gpio_remove(struct platform_device *pdev)
255 pdata = &priv->pdata; 246 pdata = &priv->pdata;
256 247
257 i2c_del_adapter(adap); 248 i2c_del_adapter(adap);
258 gpio_free(pdata->scl_pin);
259 gpio_free(pdata->sda_pin);
260 249
261 return 0; 250 return 0;
262} 251}
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index db895fb22e65..aa8bc146718b 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -183,6 +183,8 @@ struct imx_i2c_struct {
183 unsigned int disable_delay; 183 unsigned int disable_delay;
184 int stopped; 184 int stopped;
185 unsigned int ifdr; /* IMX_I2C_IFDR */ 185 unsigned int ifdr; /* IMX_I2C_IFDR */
186 unsigned int cur_clk;
187 unsigned int bitrate;
186 const struct imx_i2c_hwdata *hwdata; 188 const struct imx_i2c_hwdata *hwdata;
187}; 189};
188 190
@@ -305,6 +307,48 @@ static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
305 return 0; 307 return 0;
306} 308}
307 309
310static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx)
311{
312 struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
313 unsigned int i2c_clk_rate;
314 unsigned int div;
315 int i;
316
317 /* Divider value calculation */
318 i2c_clk_rate = clk_get_rate(i2c_imx->clk);
319 if (i2c_imx->cur_clk == i2c_clk_rate)
320 return;
321 else
322 i2c_imx->cur_clk = i2c_clk_rate;
323
324 div = (i2c_clk_rate + i2c_imx->bitrate - 1) / i2c_imx->bitrate;
325 if (div < i2c_clk_div[0].div)
326 i = 0;
327 else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div)
328 i = i2c_imx->hwdata->ndivs - 1;
329 else
330 for (i = 0; i2c_clk_div[i].div < div; i++);
331
332 /* Store divider value */
333 i2c_imx->ifdr = i2c_clk_div[i].val;
334
335 /*
336 * There dummy delay is calculated.
337 * It should be about one I2C clock period long.
338 * This delay is used in I2C bus disable function
339 * to fix chip hardware bug.
340 */
341 i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div
342 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
343
344#ifdef CONFIG_I2C_DEBUG_BUS
345 dev_dbg(&i2c_imx->adapter.dev, "I2C_CLK=%d, REQ DIV=%d\n",
346 i2c_clk_rate, div);
347 dev_dbg(&i2c_imx->adapter.dev, "IFDR[IC]=0x%x, REAL DIV=%d\n",
348 i2c_clk_div[i].val, i2c_clk_div[i].div);
349#endif
350}
351
308static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) 352static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
309{ 353{
310 unsigned int temp = 0; 354 unsigned int temp = 0;
@@ -312,6 +356,8 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
312 356
313 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 357 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
314 358
359 i2c_imx_set_clk(i2c_imx);
360
315 result = clk_prepare_enable(i2c_imx->clk); 361 result = clk_prepare_enable(i2c_imx->clk);
316 if (result) 362 if (result)
317 return result; 363 return result;
@@ -367,45 +413,6 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
367 clk_disable_unprepare(i2c_imx->clk); 413 clk_disable_unprepare(i2c_imx->clk);
368} 414}
369 415
370static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
371 unsigned int rate)
372{
373 struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
374 unsigned int i2c_clk_rate;
375 unsigned int div;
376 int i;
377
378 /* Divider value calculation */
379 i2c_clk_rate = clk_get_rate(i2c_imx->clk);
380 div = (i2c_clk_rate + rate - 1) / rate;
381 if (div < i2c_clk_div[0].div)
382 i = 0;
383 else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div)
384 i = i2c_imx->hwdata->ndivs - 1;
385 else
386 for (i = 0; i2c_clk_div[i].div < div; i++);
387
388 /* Store divider value */
389 i2c_imx->ifdr = i2c_clk_div[i].val;
390
391 /*
392 * There dummy delay is calculated.
393 * It should be about one I2C clock period long.
394 * This delay is used in I2C bus disable function
395 * to fix chip hardware bug.
396 */
397 i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div
398 + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
399
400 /* dev_dbg() can't be used, because adapter is not yet registered */
401#ifdef CONFIG_I2C_DEBUG_BUS
402 dev_dbg(&i2c_imx->adapter.dev, "<%s> I2C_CLK=%d, REQ DIV=%d\n",
403 __func__, i2c_clk_rate, div);
404 dev_dbg(&i2c_imx->adapter.dev, "<%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
405 __func__, i2c_clk_div[i].val, i2c_clk_div[i].div);
406#endif
407}
408
409static irqreturn_t i2c_imx_isr(int irq, void *dev_id) 416static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
410{ 417{
411 struct imx_i2c_struct *i2c_imx = dev_id; 418 struct imx_i2c_struct *i2c_imx = dev_id;
@@ -458,10 +465,11 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
458 return 0; 465 return 0;
459} 466}
460 467
461static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 468static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bool is_lastmsg)
462{ 469{
463 int i, result; 470 int i, result;
464 unsigned int temp; 471 unsigned int temp;
472 int block_data = msgs->flags & I2C_M_RECV_LEN;
465 473
466 dev_dbg(&i2c_imx->adapter.dev, 474 dev_dbg(&i2c_imx->adapter.dev,
467 "<%s> write slave address: addr=0x%x\n", 475 "<%s> write slave address: addr=0x%x\n",
@@ -481,7 +489,12 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
481 /* setup bus to read data */ 489 /* setup bus to read data */
482 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); 490 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
483 temp &= ~I2CR_MTX; 491 temp &= ~I2CR_MTX;
484 if (msgs->len - 1) 492
493 /*
494 * Reset the I2CR_TXAK flag initially for SMBus block read since the
495 * length is unknown
496 */
497 if ((msgs->len - 1) || block_data)
485 temp &= ~I2CR_TXAK; 498 temp &= ~I2CR_TXAK;
486 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); 499 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
487 imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */ 500 imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */
@@ -490,19 +503,49 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
490 503
491 /* read data */ 504 /* read data */
492 for (i = 0; i < msgs->len; i++) { 505 for (i = 0; i < msgs->len; i++) {
506 u8 len = 0;
493 result = i2c_imx_trx_complete(i2c_imx); 507 result = i2c_imx_trx_complete(i2c_imx);
494 if (result) 508 if (result)
495 return result; 509 return result;
496 if (i == (msgs->len - 1)) { 510 /*
497 /* It must generate STOP before read I2DR to prevent 511 * First byte is the length of remaining packet
498 controller from generating another clock cycle */ 512 * in the SMBus block data read. Add it to
513 * msgs->len.
514 */
515 if ((!i) && block_data) {
516 len = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
517 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX))
518 return -EPROTO;
499 dev_dbg(&i2c_imx->adapter.dev, 519 dev_dbg(&i2c_imx->adapter.dev,
500 "<%s> clear MSTA\n", __func__); 520 "<%s> read length: 0x%X\n",
501 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); 521 __func__, len);
502 temp &= ~(I2CR_MSTA | I2CR_MTX); 522 msgs->len += len;
503 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); 523 }
504 i2c_imx_bus_busy(i2c_imx, 0); 524 if (i == (msgs->len - 1)) {
505 i2c_imx->stopped = 1; 525 if (is_lastmsg) {
526 /*
527 * It must generate STOP before read I2DR to prevent
528 * controller from generating another clock cycle
529 */
530 dev_dbg(&i2c_imx->adapter.dev,
531 "<%s> clear MSTA\n", __func__);
532 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
533 temp &= ~(I2CR_MSTA | I2CR_MTX);
534 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
535 i2c_imx_bus_busy(i2c_imx, 0);
536 i2c_imx->stopped = 1;
537 } else {
538 /*
539 * For i2c master receiver repeat restart operation like:
540 * read -> repeat MSTA -> read/write
541 * The controller must set MTX before read the last byte in
542 * the first read operation, otherwise the first read cost
543 * one extra clock cycle.
544 */
545 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
546 temp |= I2CR_MTX;
547 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
548 }
506 } else if (i == (msgs->len - 2)) { 549 } else if (i == (msgs->len - 2)) {
507 dev_dbg(&i2c_imx->adapter.dev, 550 dev_dbg(&i2c_imx->adapter.dev,
508 "<%s> set TXAK\n", __func__); 551 "<%s> set TXAK\n", __func__);
@@ -510,7 +553,10 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
510 temp |= I2CR_TXAK; 553 temp |= I2CR_TXAK;
511 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); 554 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
512 } 555 }
513 msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); 556 if ((!i) && block_data)
557 msgs->buf[0] = len;
558 else
559 msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
514 dev_dbg(&i2c_imx->adapter.dev, 560 dev_dbg(&i2c_imx->adapter.dev,
515 "<%s> read byte: B%d=0x%X\n", 561 "<%s> read byte: B%d=0x%X\n",
516 __func__, i, msgs->buf[i]); 562 __func__, i, msgs->buf[i]);
@@ -523,6 +569,7 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
523{ 569{
524 unsigned int i, temp; 570 unsigned int i, temp;
525 int result; 571 int result;
572 bool is_lastmsg = false;
526 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); 573 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
527 574
528 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 575 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
@@ -534,6 +581,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
534 581
535 /* read/write data */ 582 /* read/write data */
536 for (i = 0; i < num; i++) { 583 for (i = 0; i < num; i++) {
584 if (i == num - 1)
585 is_lastmsg = true;
586
537 if (i) { 587 if (i) {
538 dev_dbg(&i2c_imx->adapter.dev, 588 dev_dbg(&i2c_imx->adapter.dev,
539 "<%s> repeated start\n", __func__); 589 "<%s> repeated start\n", __func__);
@@ -564,7 +614,7 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
564 (temp & I2SR_RXAK ? 1 : 0)); 614 (temp & I2SR_RXAK ? 1 : 0));
565#endif 615#endif
566 if (msgs[i].flags & I2C_M_RD) 616 if (msgs[i].flags & I2C_M_RD)
567 result = i2c_imx_read(i2c_imx, &msgs[i]); 617 result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg);
568 else 618 else
569 result = i2c_imx_write(i2c_imx, &msgs[i]); 619 result = i2c_imx_write(i2c_imx, &msgs[i]);
570 if (result) 620 if (result)
@@ -583,7 +633,8 @@ fail0:
583 633
584static u32 i2c_imx_func(struct i2c_adapter *adapter) 634static u32 i2c_imx_func(struct i2c_adapter *adapter)
585{ 635{
586 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 636 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
637 | I2C_FUNC_SMBUS_READ_BLOCK_DATA;
587} 638}
588 639
589static struct i2c_algorithm i2c_imx_algo = { 640static struct i2c_algorithm i2c_imx_algo = {
@@ -600,7 +651,6 @@ static int i2c_imx_probe(struct platform_device *pdev)
600 struct imxi2c_platform_data *pdata = dev_get_platdata(&pdev->dev); 651 struct imxi2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
601 void __iomem *base; 652 void __iomem *base;
602 int irq, ret; 653 int irq, ret;
603 u32 bitrate;
604 654
605 dev_dbg(&pdev->dev, "<%s>\n", __func__); 655 dev_dbg(&pdev->dev, "<%s>\n", __func__);
606 656
@@ -617,10 +667,8 @@ static int i2c_imx_probe(struct platform_device *pdev)
617 667
618 i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct), 668 i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct),
619 GFP_KERNEL); 669 GFP_KERNEL);
620 if (!i2c_imx) { 670 if (!i2c_imx)
621 dev_err(&pdev->dev, "can't allocate interface\n");
622 return -ENOMEM; 671 return -ENOMEM;
623 }
624 672
625 if (of_id) 673 if (of_id)
626 i2c_imx->hwdata = of_id->data; 674 i2c_imx->hwdata = of_id->data;
@@ -664,12 +712,11 @@ static int i2c_imx_probe(struct platform_device *pdev)
664 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); 712 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);
665 713
666 /* Set up clock divider */ 714 /* Set up clock divider */
667 bitrate = IMX_I2C_BIT_RATE; 715 i2c_imx->bitrate = IMX_I2C_BIT_RATE;
668 ret = of_property_read_u32(pdev->dev.of_node, 716 ret = of_property_read_u32(pdev->dev.of_node,
669 "clock-frequency", &bitrate); 717 "clock-frequency", &i2c_imx->bitrate);
670 if (ret < 0 && pdata && pdata->bitrate) 718 if (ret < 0 && pdata && pdata->bitrate)
671 bitrate = pdata->bitrate; 719 i2c_imx->bitrate = pdata->bitrate;
672 i2c_imx_set_clk(i2c_imx, bitrate);
673 720
674 /* Set up chip registers to defaults */ 721 /* Set up chip registers to defaults */
675 imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, 722 imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index f5391633b53a..6a32aa095f83 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -115,7 +115,7 @@ static void mpc_i2c_fixup(struct mpc_i2c *i2c)
115 for (k = 9; k; k--) { 115 for (k = 9; k; k--) {
116 writeccr(i2c, 0); 116 writeccr(i2c, 0);
117 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN); 117 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
118 udelay(delay_val); 118 readb(i2c->base + MPC_I2C_DR);
119 writeccr(i2c, CCR_MEN); 119 writeccr(i2c, CCR_MEN);
120 udelay(delay_val << 1); 120 udelay(delay_val << 1);
121 } 121 }
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 540ea692bf79..9f4b775e2e39 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -681,7 +681,7 @@ static const struct i2c_algorithm mv64xxx_i2c_algo = {
681 ***************************************************************************** 681 *****************************************************************************
682 */ 682 */
683static const struct of_device_id mv64xxx_i2c_of_match_table[] = { 683static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
684 { .compatible = "allwinner,sun4i-i2c", .data = &mv64xxx_i2c_regs_sun4i}, 684 { .compatible = "allwinner,sun4i-a10-i2c", .data = &mv64xxx_i2c_regs_sun4i},
685 { .compatible = "allwinner,sun6i-a31-i2c", .data = &mv64xxx_i2c_regs_sun4i}, 685 { .compatible = "allwinner,sun6i-a31-i2c", .data = &mv64xxx_i2c_regs_sun4i},
686 { .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx}, 686 { .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
687 { .compatible = "marvell,mv78230-i2c", .data = &mv64xxx_i2c_regs_mv64xxx}, 687 { .compatible = "marvell,mv78230-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
index 28cbe1b2a2ec..0e55d85fd4ed 100644
--- a/drivers/i2c/busses/i2c-nomadik.c
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -879,19 +879,19 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
879#ifdef CONFIG_PM_SLEEP 879#ifdef CONFIG_PM_SLEEP
880static int nmk_i2c_suspend_late(struct device *dev) 880static int nmk_i2c_suspend_late(struct device *dev)
881{ 881{
882 pinctrl_pm_select_sleep_state(dev); 882 int ret;
883 883
884 ret = pm_runtime_force_suspend(dev);
885 if (ret)
886 return ret;
887
888 pinctrl_pm_select_sleep_state(dev);
884 return 0; 889 return 0;
885} 890}
886 891
887static int nmk_i2c_resume_early(struct device *dev) 892static int nmk_i2c_resume_early(struct device *dev)
888{ 893{
889 /* First go to the default state */ 894 return pm_runtime_force_resume(dev);
890 pinctrl_pm_select_default_state(dev);
891 /* Then let's idle the pins until the next transfer happens */
892 pinctrl_pm_select_idle_state(dev);
893
894 return 0;
895} 895}
896#endif 896#endif
897 897
@@ -999,7 +999,7 @@ static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id)
999 999
1000 dev->virtbase = devm_ioremap(&adev->dev, adev->res.start, 1000 dev->virtbase = devm_ioremap(&adev->dev, adev->res.start,
1001 resource_size(&adev->res)); 1001 resource_size(&adev->res));
1002 if (IS_ERR(dev->virtbase)) { 1002 if (!dev->virtbase) {
1003 ret = -ENOMEM; 1003 ret = -ENOMEM;
1004 goto err_no_mem; 1004 goto err_no_mem;
1005 } 1005 }
diff --git a/drivers/i2c/busses/i2c-nuc900.c b/drivers/i2c/busses/i2c-nuc900.c
deleted file mode 100644
index 36394d737faf..000000000000
--- a/drivers/i2c/busses/i2c-nuc900.c
+++ /dev/null
@@ -1,709 +0,0 @@
1/*
2 * linux/drivers/i2c/busses/i2c-nuc900.c
3 *
4 * Copyright (c) 2010 Nuvoton technology corporation.
5 *
6 * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>.
7 * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation;version 2 of the License.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17
18#include <linux/i2c.h>
19#include <linux/init.h>
20#include <linux/time.h>
21#include <linux/interrupt.h>
22#include <linux/delay.h>
23#include <linux/errno.h>
24#include <linux/err.h>
25#include <linux/platform_device.h>
26#include <linux/clk.h>
27#include <linux/cpufreq.h>
28#include <linux/slab.h>
29#include <linux/io.h>
30
31#include <mach/mfp.h>
32#include <linux/platform_data/i2c-nuc900.h>
33
34/* nuc900 i2c registers offset */
35
36#define CSR 0x00
37#define DIVIDER 0x04
38#define CMDR 0x08
39#define SWR 0x0C
40#define RXR 0x10
41#define TXR 0x14
42
43/* nuc900 i2c CSR register bits */
44
45#define IRQEN 0x003
46#define I2CBUSY 0x400
47#define I2CSTART 0x018
48#define IRQFLAG 0x004
49#define ARBIT_LOST 0x200
50#define SLAVE_ACK 0x800
51
52/* nuc900 i2c CMDR register bits */
53
54#define I2C_CMD_START 0x10
55#define I2C_CMD_STOP 0x08
56#define I2C_CMD_READ 0x04
57#define I2C_CMD_WRITE 0x02
58#define I2C_CMD_NACK 0x01
59
60/* i2c controller state */
61
62enum nuc900_i2c_state {
63 STATE_IDLE,
64 STATE_START,
65 STATE_READ,
66 STATE_WRITE,
67 STATE_STOP
68};
69
70/* i2c controller private data */
71
72struct nuc900_i2c {
73 spinlock_t lock;
74 wait_queue_head_t wait;
75
76 struct i2c_msg *msg;
77 unsigned int msg_num;
78 unsigned int msg_idx;
79 unsigned int msg_ptr;
80 unsigned int irq;
81
82 enum nuc900_i2c_state state;
83
84 void __iomem *regs;
85 struct clk *clk;
86 struct device *dev;
87 struct resource *ioarea;
88 struct i2c_adapter adap;
89};
90
91/* nuc900_i2c_master_complete
92 *
93 * complete the message and wake up the caller, using the given return code,
94 * or zero to mean ok.
95*/
96
97static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret)
98{
99 dev_dbg(i2c->dev, "master_complete %d\n", ret);
100
101 i2c->msg_ptr = 0;
102 i2c->msg = NULL;
103 i2c->msg_idx++;
104 i2c->msg_num = 0;
105 if (ret)
106 i2c->msg_idx = ret;
107
108 wake_up(&i2c->wait);
109}
110
111/* irq enable/disable functions */
112
113static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c)
114{
115 unsigned long tmp;
116
117 tmp = readl(i2c->regs + CSR);
118 writel(tmp & ~IRQEN, i2c->regs + CSR);
119}
120
121static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c)
122{
123 unsigned long tmp;
124
125 tmp = readl(i2c->regs + CSR);
126 writel(tmp | IRQEN, i2c->regs + CSR);
127}
128
129
130/* nuc900_i2c_message_start
131 *
132 * put the start of a message onto the bus
133*/
134
135static void nuc900_i2c_message_start(struct nuc900_i2c *i2c,
136 struct i2c_msg *msg)
137{
138 unsigned int addr = (msg->addr & 0x7f) << 1;
139
140 if (msg->flags & I2C_M_RD)
141 addr |= 0x1;
142 writel(addr & 0xff, i2c->regs + TXR);
143 writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR);
144}
145
146static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret)
147{
148
149 dev_dbg(i2c->dev, "STOP\n");
150
151 /* stop the transfer */
152 i2c->state = STATE_STOP;
153 writel(I2C_CMD_STOP, i2c->regs + CMDR);
154
155 nuc900_i2c_master_complete(i2c, ret);
156 nuc900_i2c_disable_irq(i2c);
157}
158
159/* helper functions to determine the current state in the set of
160 * messages we are sending
161*/
162
163/* is_lastmsg()
164 *
165 * returns TRUE if the current message is the last in the set
166*/
167
168static inline int is_lastmsg(struct nuc900_i2c *i2c)
169{
170 return i2c->msg_idx >= (i2c->msg_num - 1);
171}
172
173/* is_msglast
174 *
175 * returns TRUE if we this is the last byte in the current message
176*/
177
178static inline int is_msglast(struct nuc900_i2c *i2c)
179{
180 return i2c->msg_ptr == i2c->msg->len-1;
181}
182
183/* is_msgend
184 *
185 * returns TRUE if we reached the end of the current message
186*/
187
188static inline int is_msgend(struct nuc900_i2c *i2c)
189{
190 return i2c->msg_ptr >= i2c->msg->len;
191}
192
193/* i2c_nuc900_irq_nextbyte
194 *
195 * process an interrupt and work out what to do
196 */
197
198static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c,
199 unsigned long iicstat)
200{
201 unsigned char byte;
202
203 switch (i2c->state) {
204
205 case STATE_IDLE:
206 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
207 break;
208
209 case STATE_STOP:
210 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
211 nuc900_i2c_disable_irq(i2c);
212 break;
213
214 case STATE_START:
215 /* last thing we did was send a start condition on the
216 * bus, or started a new i2c message
217 */
218
219 if (iicstat & SLAVE_ACK &&
220 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
221 /* ack was not received... */
222
223 dev_dbg(i2c->dev, "ack was not received\n");
224 nuc900_i2c_stop(i2c, -ENXIO);
225 break;
226 }
227
228 if (i2c->msg->flags & I2C_M_RD)
229 i2c->state = STATE_READ;
230 else
231 i2c->state = STATE_WRITE;
232
233 /* terminate the transfer if there is nothing to do
234 * as this is used by the i2c probe to find devices.
235 */
236
237 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
238 nuc900_i2c_stop(i2c, 0);
239 break;
240 }
241
242 if (i2c->state == STATE_READ)
243 goto prepare_read;
244
245 /* fall through to the write state, as we will need to
246 * send a byte as well
247 */
248
249 case STATE_WRITE:
250 /* we are writing data to the device... check for the
251 * end of the message, and if so, work out what to do
252 */
253
254 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
255 if (iicstat & SLAVE_ACK) {
256 dev_dbg(i2c->dev, "WRITE: No Ack\n");
257
258 nuc900_i2c_stop(i2c, -ECONNREFUSED);
259 break;
260 }
261 }
262
263retry_write:
264
265 if (!is_msgend(i2c)) {
266 byte = i2c->msg->buf[i2c->msg_ptr++];
267 writeb(byte, i2c->regs + TXR);
268 writel(I2C_CMD_WRITE, i2c->regs + CMDR);
269
270 } else if (!is_lastmsg(i2c)) {
271 /* we need to go to the next i2c message */
272
273 dev_dbg(i2c->dev, "WRITE: Next Message\n");
274
275 i2c->msg_ptr = 0;
276 i2c->msg_idx++;
277 i2c->msg++;
278
279 /* check to see if we need to do another message */
280 if (i2c->msg->flags & I2C_M_NOSTART) {
281
282 if (i2c->msg->flags & I2C_M_RD) {
283 /* cannot do this, the controller
284 * forces us to send a new START
285 * when we change direction
286 */
287
288 nuc900_i2c_stop(i2c, -EINVAL);
289 }
290
291 goto retry_write;
292 } else {
293 /* send the new start */
294 nuc900_i2c_message_start(i2c, i2c->msg);
295 i2c->state = STATE_START;
296 }
297
298 } else {
299 /* send stop */
300
301 nuc900_i2c_stop(i2c, 0);
302 }
303 break;
304
305 case STATE_READ:
306 /* we have a byte of data in the data register, do
307 * something with it, and then work out whether we are
308 * going to do any more read/write
309 */
310
311 byte = readb(i2c->regs + RXR);
312 i2c->msg->buf[i2c->msg_ptr++] = byte;
313
314prepare_read:
315 if (is_msglast(i2c)) {
316 /* last byte of buffer */
317
318 if (is_lastmsg(i2c))
319 writel(I2C_CMD_READ | I2C_CMD_NACK,
320 i2c->regs + CMDR);
321
322 } else if (is_msgend(i2c)) {
323 /* ok, we've read the entire buffer, see if there
324 * is anything else we need to do
325 */
326
327 if (is_lastmsg(i2c)) {
328 /* last message, send stop and complete */
329 dev_dbg(i2c->dev, "READ: Send Stop\n");
330
331 nuc900_i2c_stop(i2c, 0);
332 } else {
333 /* go to the next transfer */
334 dev_dbg(i2c->dev, "READ: Next Transfer\n");
335
336 i2c->msg_ptr = 0;
337 i2c->msg_idx++;
338 i2c->msg++;
339
340 writel(I2C_CMD_READ, i2c->regs + CMDR);
341 }
342
343 } else {
344 writel(I2C_CMD_READ, i2c->regs + CMDR);
345 }
346
347 break;
348 }
349}
350
351/* nuc900_i2c_irq
352 *
353 * top level IRQ servicing routine
354*/
355
356static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id)
357{
358 struct nuc900_i2c *i2c = dev_id;
359 unsigned long status;
360
361 status = readl(i2c->regs + CSR);
362 writel(status | IRQFLAG, i2c->regs + CSR);
363
364 if (status & ARBIT_LOST) {
365 /* deal with arbitration loss */
366 dev_err(i2c->dev, "deal with arbitration loss\n");
367 goto out;
368 }
369
370 if (i2c->state == STATE_IDLE) {
371 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
372 goto out;
373 }
374
375 /* pretty much this leaves us with the fact that we've
376 * transmitted or received whatever byte we last sent
377 */
378
379 i2c_nuc900_irq_nextbyte(i2c, status);
380
381 out:
382 return IRQ_HANDLED;
383}
384
385
386/* nuc900_i2c_set_master
387 *
388 * get the i2c bus for a master transaction
389*/
390
391static int nuc900_i2c_set_master(struct nuc900_i2c *i2c)
392{
393 int timeout = 400;
394
395 while (timeout-- > 0) {
396 if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) &&
397 ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
398 return 0;
399 }
400
401 msleep(1);
402 }
403
404 return -ETIMEDOUT;
405}
406
407/* nuc900_i2c_doxfer
408 *
409 * this starts an i2c transfer
410*/
411
412static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c,
413 struct i2c_msg *msgs, int num)
414{
415 unsigned long iicstat, timeout;
416 int spins = 20;
417 int ret;
418
419 ret = nuc900_i2c_set_master(i2c);
420 if (ret != 0) {
421 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
422 ret = -EAGAIN;
423 goto out;
424 }
425
426 spin_lock_irq(&i2c->lock);
427
428 i2c->msg = msgs;
429 i2c->msg_num = num;
430 i2c->msg_ptr = 0;
431 i2c->msg_idx = 0;
432 i2c->state = STATE_START;
433
434 nuc900_i2c_message_start(i2c, msgs);
435 spin_unlock_irq(&i2c->lock);
436
437 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
438
439 ret = i2c->msg_idx;
440
441 /* having these next two as dev_err() makes life very
442 * noisy when doing an i2cdetect
443 */
444
445 if (timeout == 0)
446 dev_dbg(i2c->dev, "timeout\n");
447 else if (ret != num)
448 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
449
450 /* ensure the stop has been through the bus */
451
452 dev_dbg(i2c->dev, "waiting for bus idle\n");
453
454 /* first, try busy waiting briefly */
455 do {
456 iicstat = readl(i2c->regs + CSR);
457 } while ((iicstat & I2CBUSY) && --spins);
458
459 /* if that timed out sleep */
460 if (!spins) {
461 msleep(1);
462 iicstat = readl(i2c->regs + CSR);
463 }
464
465 if (iicstat & I2CBUSY)
466 dev_warn(i2c->dev, "timeout waiting for bus idle\n");
467
468 out:
469 return ret;
470}
471
472/* nuc900_i2c_xfer
473 *
474 * first port of call from the i2c bus code when an message needs
475 * transferring across the i2c bus.
476*/
477
478static int nuc900_i2c_xfer(struct i2c_adapter *adap,
479 struct i2c_msg *msgs, int num)
480{
481 struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data;
482 int retry;
483 int ret;
484
485 nuc900_i2c_enable_irq(i2c);
486
487 for (retry = 0; retry < adap->retries; retry++) {
488
489 ret = nuc900_i2c_doxfer(i2c, msgs, num);
490
491 if (ret != -EAGAIN)
492 return ret;
493
494 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
495
496 udelay(100);
497 }
498
499 return -EREMOTEIO;
500}
501
502/* declare our i2c functionality */
503static u32 nuc900_i2c_func(struct i2c_adapter *adap)
504{
505 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART |
506 I2C_FUNC_PROTOCOL_MANGLING;
507}
508
509/* i2c bus registration info */
510
511static const struct i2c_algorithm nuc900_i2c_algorithm = {
512 .master_xfer = nuc900_i2c_xfer,
513 .functionality = nuc900_i2c_func,
514};
515
516/* nuc900_i2c_probe
517 *
518 * called by the bus driver when a suitable device is found
519*/
520
521static int nuc900_i2c_probe(struct platform_device *pdev)
522{
523 struct nuc900_i2c *i2c;
524 struct nuc900_platform_i2c *pdata;
525 struct resource *res;
526 int ret;
527
528 pdata = dev_get_platdata(&pdev->dev);
529 if (!pdata) {
530 dev_err(&pdev->dev, "no platform data\n");
531 return -EINVAL;
532 }
533
534 i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL);
535 if (!i2c) {
536 dev_err(&pdev->dev, "no memory for state\n");
537 return -ENOMEM;
538 }
539
540 strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name));
541 i2c->adap.owner = THIS_MODULE;
542 i2c->adap.algo = &nuc900_i2c_algorithm;
543 i2c->adap.retries = 2;
544 i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
545
546 spin_lock_init(&i2c->lock);
547 init_waitqueue_head(&i2c->wait);
548
549 /* find the clock and enable it */
550
551 i2c->dev = &pdev->dev;
552 i2c->clk = clk_get(&pdev->dev, NULL);
553 if (IS_ERR(i2c->clk)) {
554 dev_err(&pdev->dev, "cannot get clock\n");
555 ret = -ENOENT;
556 goto err_noclk;
557 }
558
559 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
560
561 clk_enable(i2c->clk);
562
563 /* map the registers */
564
565 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
566 if (res == NULL) {
567 dev_err(&pdev->dev, "cannot find IO resource\n");
568 ret = -ENOENT;
569 goto err_clk;
570 }
571
572 i2c->ioarea = request_mem_region(res->start, resource_size(res),
573 pdev->name);
574
575 if (i2c->ioarea == NULL) {
576 dev_err(&pdev->dev, "cannot request IO\n");
577 ret = -ENXIO;
578 goto err_clk;
579 }
580
581 i2c->regs = ioremap(res->start, resource_size(res));
582
583 if (i2c->regs == NULL) {
584 dev_err(&pdev->dev, "cannot map IO\n");
585 ret = -ENXIO;
586 goto err_ioarea;
587 }
588
589 dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
590 i2c->regs, i2c->ioarea, res);
591
592 /* setup info block for the i2c core */
593
594 i2c->adap.algo_data = i2c;
595 i2c->adap.dev.parent = &pdev->dev;
596
597 mfp_set_groupg(&pdev->dev, NULL);
598
599 clk_get_rate(i2c->clk);
600
601 ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
602 writel(ret & 0xffff, i2c->regs + DIVIDER);
603
604 /* find the IRQ for this unit (note, this relies on the init call to
605 * ensure no current IRQs pending
606 */
607
608 i2c->irq = ret = platform_get_irq(pdev, 0);
609 if (ret <= 0) {
610 dev_err(&pdev->dev, "cannot find IRQ\n");
611 goto err_iomap;
612 }
613
614 ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_SHARED,
615 dev_name(&pdev->dev), i2c);
616
617 if (ret != 0) {
618 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
619 goto err_iomap;
620 }
621
622 /* Note, previous versions of the driver used i2c_add_adapter()
623 * to add the bus at any number. We now pass the bus number via
624 * the platform data, so if unset it will now default to always
625 * being bus 0.
626 */
627
628 i2c->adap.nr = pdata->bus_num;
629
630 ret = i2c_add_numbered_adapter(&i2c->adap);
631 if (ret < 0) {
632 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
633 goto err_irq;
634 }
635
636 platform_set_drvdata(pdev, i2c);
637
638 dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n",
639 dev_name(&i2c->adap.dev));
640 return 0;
641
642 err_irq:
643 free_irq(i2c->irq, i2c);
644
645 err_iomap:
646 iounmap(i2c->regs);
647
648 err_ioarea:
649 release_resource(i2c->ioarea);
650 kfree(i2c->ioarea);
651
652 err_clk:
653 clk_disable(i2c->clk);
654 clk_put(i2c->clk);
655
656 err_noclk:
657 kfree(i2c);
658 return ret;
659}
660
661/* nuc900_i2c_remove
662 *
663 * called when device is removed from the bus
664*/
665
666static int nuc900_i2c_remove(struct platform_device *pdev)
667{
668 struct nuc900_i2c *i2c = platform_get_drvdata(pdev);
669
670 i2c_del_adapter(&i2c->adap);
671 free_irq(i2c->irq, i2c);
672
673 clk_disable(i2c->clk);
674 clk_put(i2c->clk);
675
676 iounmap(i2c->regs);
677
678 release_resource(i2c->ioarea);
679 kfree(i2c->ioarea);
680 kfree(i2c);
681
682 return 0;
683}
684
685static struct platform_driver nuc900_i2c_driver = {
686 .probe = nuc900_i2c_probe,
687 .remove = nuc900_i2c_remove,
688 .driver = {
689 .owner = THIS_MODULE,
690 .name = "nuc900-i2c0",
691 },
692};
693
694static int __init i2c_adap_nuc900_init(void)
695{
696 return platform_driver_register(&nuc900_i2c_driver);
697}
698
699static void __exit i2c_adap_nuc900_exit(void)
700{
701 platform_driver_unregister(&nuc900_i2c_driver);
702}
703subsys_initcall(i2c_adap_nuc900_init);
704module_exit(i2c_adap_nuc900_exit);
705
706MODULE_DESCRIPTION("NUC900 I2C Bus driver");
707MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
708MODULE_LICENSE("GPL");
709MODULE_ALIAS("platform:nuc900-i2c0");
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 1f6369f14fb6..0e10cc6182f0 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -250,7 +250,7 @@ static struct i2c_adapter ocores_adapter = {
250 .algo = &ocores_algorithm, 250 .algo = &ocores_algorithm,
251}; 251};
252 252
253static struct of_device_id ocores_i2c_match[] = { 253static const struct of_device_id ocores_i2c_match[] = {
254 { 254 {
255 .compatible = "opencores,i2c-ocores", 255 .compatible = "opencores,i2c-ocores",
256 .data = (void *)TYPE_OCORES, 256 .data = (void *)TYPE_OCORES,
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 85f8eac9ba18..b182793a4051 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1114,10 +1114,8 @@ omap_i2c_probe(struct platform_device *pdev)
1114 } 1114 }
1115 1115
1116 dev = devm_kzalloc(&pdev->dev, sizeof(struct omap_i2c_dev), GFP_KERNEL); 1116 dev = devm_kzalloc(&pdev->dev, sizeof(struct omap_i2c_dev), GFP_KERNEL);
1117 if (!dev) { 1117 if (!dev)
1118 dev_err(&pdev->dev, "Menory allocation failed\n");
1119 return -ENOMEM; 1118 return -ENOMEM;
1120 }
1121 1119
1122 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1120 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1123 dev->base = devm_ioremap_resource(&pdev->dev, mem); 1121 dev->base = devm_ioremap_resource(&pdev->dev, mem);
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index bbe6dfbc5c05..be671f7a0e06 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -1084,7 +1084,7 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
1084 .functionality = i2c_pxa_functionality, 1084 .functionality = i2c_pxa_functionality,
1085}; 1085};
1086 1086
1087static struct of_device_id i2c_pxa_dt_ids[] = { 1087static const struct of_device_id i2c_pxa_dt_ids[] = {
1088 { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX }, 1088 { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
1089 { .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX }, 1089 { .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX },
1090 { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA2XX }, 1090 { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA2XX },
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 1b4cf14f1106..2a5efb5b487c 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -479,7 +479,7 @@ static int qup_i2c_xfer(struct i2c_adapter *adap,
479 int ret, idx; 479 int ret, idx;
480 480
481 ret = pm_runtime_get_sync(qup->dev); 481 ret = pm_runtime_get_sync(qup->dev);
482 if (ret) 482 if (ret < 0)
483 goto out; 483 goto out;
484 484
485 writel(1, qup->base + QUP_SW_RESET); 485 writel(1, qup->base + QUP_SW_RESET);
diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
index d4fa8eba6e9d..899405923678 100644
--- a/drivers/i2c/busses/i2c-rcar.c
+++ b/drivers/i2c/busses/i2c-rcar.c
@@ -1,7 +1,9 @@
1/* 1/*
2 * drivers/i2c/busses/i2c-rcar.c 2 * Driver for the Renesas RCar I2C unit
3 * 3 *
4 * Copyright (C) 2012 Renesas Solutions Corp. 4 * Copyright (C) 2014 Wolfram Sang <wsa@sang-engineering.com>
5 *
6 * Copyright (C) 2012-14 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 7 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 * 8 *
7 * This file is based on the drivers/i2c/busses/i2c-sh7760.c 9 * This file is based on the drivers/i2c/busses/i2c-sh7760.c
@@ -12,16 +14,12 @@
12 * 14 *
13 * This program is free software; you can redistribute it and/or modify 15 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by 16 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License 17 * the Free Software Foundation; version 2 of the License.
16 * 18 *
17 * This program is distributed in the hope that it will be useful, 19 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 22 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */ 23 */
26#include <linux/clk.h> 24#include <linux/clk.h>
27#include <linux/delay.h> 25#include <linux/delay.h>
@@ -36,7 +34,6 @@
36#include <linux/platform_device.h> 34#include <linux/platform_device.h>
37#include <linux/pm_runtime.h> 35#include <linux/pm_runtime.h>
38#include <linux/slab.h> 36#include <linux/slab.h>
39#include <linux/spinlock.h>
40 37
41/* register offsets */ 38/* register offsets */
42#define ICSCR 0x00 /* slave ctrl */ 39#define ICSCR 0x00 /* slave ctrl */
@@ -60,7 +57,7 @@
60#define FSB (1 << 1) /* force stop bit */ 57#define FSB (1 << 1) /* force stop bit */
61#define ESG (1 << 0) /* en startbit gen */ 58#define ESG (1 << 0) /* en startbit gen */
62 59
63/* ICMSR */ 60/* ICMSR (also for ICMIE) */
64#define MNR (1 << 6) /* nack received */ 61#define MNR (1 << 6) /* nack received */
65#define MAL (1 << 5) /* arbitration lost */ 62#define MAL (1 << 5) /* arbitration lost */
66#define MST (1 << 4) /* sent a stop */ 63#define MST (1 << 4) /* sent a stop */
@@ -69,32 +66,18 @@
69#define MDR (1 << 1) 66#define MDR (1 << 1)
70#define MAT (1 << 0) /* slave addr xfer done */ 67#define MAT (1 << 0) /* slave addr xfer done */
71 68
72/* ICMIE */
73#define MNRE (1 << 6) /* nack irq en */
74#define MALE (1 << 5) /* arblos irq en */
75#define MSTE (1 << 4) /* stop irq en */
76#define MDEE (1 << 3)
77#define MDTE (1 << 2)
78#define MDRE (1 << 1)
79#define MATE (1 << 0) /* address sent irq en */
80 69
70#define RCAR_BUS_PHASE_START (MDBS | MIE | ESG)
71#define RCAR_BUS_PHASE_DATA (MDBS | MIE)
72#define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB)
81 73
82enum { 74#define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE)
83 RCAR_BUS_PHASE_ADDR, 75#define RCAR_IRQ_RECV (MNR | MAL | MST | MAT | MDR)
84 RCAR_BUS_PHASE_DATA, 76#define RCAR_IRQ_STOP (MST)
85 RCAR_BUS_PHASE_STOP,
86};
87 77
88enum { 78#define RCAR_IRQ_ACK_SEND (~(MAT | MDE))
89 RCAR_IRQ_CLOSE, 79#define RCAR_IRQ_ACK_RECV (~(MAT | MDR))
90 RCAR_IRQ_OPEN_FOR_SEND,
91 RCAR_IRQ_OPEN_FOR_RECV,
92 RCAR_IRQ_OPEN_FOR_STOP,
93};
94 80
95/*
96 * flags
97 */
98#define ID_LAST_MSG (1 << 0) 81#define ID_LAST_MSG (1 << 0)
99#define ID_IOERROR (1 << 1) 82#define ID_IOERROR (1 << 1)
100#define ID_DONE (1 << 2) 83#define ID_DONE (1 << 2)
@@ -112,14 +95,12 @@ struct rcar_i2c_priv {
112 struct i2c_msg *msg; 95 struct i2c_msg *msg;
113 struct clk *clk; 96 struct clk *clk;
114 97
115 spinlock_t lock;
116 wait_queue_head_t wait; 98 wait_queue_head_t wait;
117 99
118 int pos; 100 int pos;
119 int irq;
120 u32 icccr; 101 u32 icccr;
121 u32 flags; 102 u32 flags;
122 enum rcar_i2c_type devtype; 103 enum rcar_i2c_type devtype;
123}; 104};
124 105
125#define rcar_i2c_priv_to_dev(p) ((p)->adap.dev.parent) 106#define rcar_i2c_priv_to_dev(p) ((p)->adap.dev.parent)
@@ -130,9 +111,7 @@ struct rcar_i2c_priv {
130 111
131#define LOOP_TIMEOUT 1024 112#define LOOP_TIMEOUT 1024
132 113
133/* 114
134 * basic functions
135 */
136static void rcar_i2c_write(struct rcar_i2c_priv *priv, int reg, u32 val) 115static void rcar_i2c_write(struct rcar_i2c_priv *priv, int reg, u32 val)
137{ 116{
138 writel(val, priv->io + reg); 117 writel(val, priv->io + reg);
@@ -161,36 +140,6 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
161 rcar_i2c_write(priv, ICMAR, 0); 140 rcar_i2c_write(priv, ICMAR, 0);
162} 141}
163 142
164static void rcar_i2c_irq_mask(struct rcar_i2c_priv *priv, int open)
165{
166 u32 val = MNRE | MALE | MSTE | MATE; /* default */
167
168 switch (open) {
169 case RCAR_IRQ_OPEN_FOR_SEND:
170 val |= MDEE; /* default + send */
171 break;
172 case RCAR_IRQ_OPEN_FOR_RECV:
173 val |= MDRE; /* default + read */
174 break;
175 case RCAR_IRQ_OPEN_FOR_STOP:
176 val = MSTE; /* stop irq only */
177 break;
178 case RCAR_IRQ_CLOSE:
179 default:
180 val = 0; /* all close */
181 break;
182 }
183 rcar_i2c_write(priv, ICMIER, val);
184}
185
186static void rcar_i2c_set_addr(struct rcar_i2c_priv *priv, u32 recv)
187{
188 rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | recv);
189}
190
191/*
192 * bus control functions
193 */
194static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv) 143static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
195{ 144{
196 int i; 145 int i;
@@ -205,24 +154,6 @@ static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
205 return -EBUSY; 154 return -EBUSY;
206} 155}
207 156
208static void rcar_i2c_bus_phase(struct rcar_i2c_priv *priv, int phase)
209{
210 switch (phase) {
211 case RCAR_BUS_PHASE_ADDR:
212 rcar_i2c_write(priv, ICMCR, MDBS | MIE | ESG);
213 break;
214 case RCAR_BUS_PHASE_DATA:
215 rcar_i2c_write(priv, ICMCR, MDBS | MIE);
216 break;
217 case RCAR_BUS_PHASE_STOP:
218 rcar_i2c_write(priv, ICMCR, MDBS | MIE | FSB);
219 break;
220 }
221}
222
223/*
224 * clock function
225 */
226static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv, 157static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
227 u32 bus_speed, 158 u32 bus_speed,
228 struct device *dev) 159 struct device *dev)
@@ -312,60 +243,18 @@ scgd_find:
312 return 0; 243 return 0;
313} 244}
314 245
315static void rcar_i2c_clock_start(struct rcar_i2c_priv *priv) 246static int rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
316{ 247{
317 rcar_i2c_write(priv, ICCCR, priv->icccr); 248 int read = !!rcar_i2c_is_recv(priv);
318}
319 249
320/* 250 rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read);
321 * status functions 251 rcar_i2c_write(priv, ICMSR, 0);
322 */ 252 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
323static u32 rcar_i2c_status_get(struct rcar_i2c_priv *priv) 253 rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
324{
325 return rcar_i2c_read(priv, ICMSR);
326}
327
328#define rcar_i2c_status_clear(priv) rcar_i2c_status_bit_clear(priv, 0xffffffff)
329static void rcar_i2c_status_bit_clear(struct rcar_i2c_priv *priv, u32 bit)
330{
331 rcar_i2c_write(priv, ICMSR, ~bit);
332}
333
334/*
335 * recv/send functions
336 */
337static int rcar_i2c_recv(struct rcar_i2c_priv *priv)
338{
339 rcar_i2c_set_addr(priv, 1);
340 rcar_i2c_status_clear(priv);
341 rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_ADDR);
342 rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_RECV);
343
344 return 0;
345}
346
347static int rcar_i2c_send(struct rcar_i2c_priv *priv)
348{
349 int ret;
350
351 /*
352 * It should check bus status when send case
353 */
354 ret = rcar_i2c_bus_barrier(priv);
355 if (ret < 0)
356 return ret;
357
358 rcar_i2c_set_addr(priv, 0);
359 rcar_i2c_status_clear(priv);
360 rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_ADDR);
361 rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_SEND);
362 254
363 return 0; 255 return 0;
364} 256}
365 257
366#define rcar_i2c_send_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDE))
367#define rcar_i2c_recv_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDR))
368
369/* 258/*
370 * interrupt functions 259 * interrupt functions
371 */ 260 */
@@ -386,7 +275,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
386 * goto data phase. 275 * goto data phase.
387 */ 276 */
388 if (msr & MAT) 277 if (msr & MAT)
389 rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_DATA); 278 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
390 279
391 if (priv->pos < msg->len) { 280 if (priv->pos < msg->len) {
392 /* 281 /*
@@ -414,7 +303,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
414 * prepare stop condition here. 303 * prepare stop condition here.
415 * ID_DONE will be set on STOP irq. 304 * ID_DONE will be set on STOP irq.
416 */ 305 */
417 rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP); 306 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
418 else 307 else
419 /* 308 /*
420 * If current msg is _NOT_ last msg, 309 * If current msg is _NOT_ last msg,
@@ -425,7 +314,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
425 return ID_DONE; 314 return ID_DONE;
426 } 315 }
427 316
428 rcar_i2c_send_restart(priv); 317 rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);
429 318
430 return 0; 319 return 0;
431} 320}
@@ -462,11 +351,11 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
462 * otherwise, go to DATA phase. 351 * otherwise, go to DATA phase.
463 */ 352 */
464 if (priv->pos + 1 >= msg->len) 353 if (priv->pos + 1 >= msg->len)
465 rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP); 354 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
466 else 355 else
467 rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_DATA); 356 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
468 357
469 rcar_i2c_recv_restart(priv); 358 rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);
470 359
471 return 0; 360 return 0;
472} 361}
@@ -474,53 +363,31 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
474static irqreturn_t rcar_i2c_irq(int irq, void *ptr) 363static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
475{ 364{
476 struct rcar_i2c_priv *priv = ptr; 365 struct rcar_i2c_priv *priv = ptr;
477 struct device *dev = rcar_i2c_priv_to_dev(priv);
478 u32 msr; 366 u32 msr;
479 367
480 /*-------------- spin lock -----------------*/ 368 msr = rcar_i2c_read(priv, ICMSR);
481 spin_lock(&priv->lock);
482 369
483 msr = rcar_i2c_status_get(priv); 370 /* Arbitration lost */
484
485 /*
486 * Arbitration lost
487 */
488 if (msr & MAL) { 371 if (msr & MAL) {
489 /*
490 * CAUTION
491 *
492 * When arbitration lost, device become _slave_ mode.
493 */
494 dev_dbg(dev, "Arbitration Lost\n");
495 rcar_i2c_flags_set(priv, (ID_DONE | ID_ARBLOST)); 372 rcar_i2c_flags_set(priv, (ID_DONE | ID_ARBLOST));
496 goto out; 373 goto out;
497 } 374 }
498 375
499 /* 376 /* Stop */
500 * Stop
501 */
502 if (msr & MST) { 377 if (msr & MST) {
503 dev_dbg(dev, "Stop\n");
504 rcar_i2c_flags_set(priv, ID_DONE); 378 rcar_i2c_flags_set(priv, ID_DONE);
505 goto out; 379 goto out;
506 } 380 }
507 381
508 /* 382 /* Nack */
509 * Nack
510 */
511 if (msr & MNR) { 383 if (msr & MNR) {
512 dev_dbg(dev, "Nack\n");
513
514 /* go to stop phase */ 384 /* go to stop phase */
515 rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP); 385 rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
516 rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_STOP); 386 rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
517 rcar_i2c_flags_set(priv, ID_NACK); 387 rcar_i2c_flags_set(priv, ID_NACK);
518 goto out; 388 goto out;
519 } 389 }
520 390
521 /*
522 * recv/send
523 */
524 if (rcar_i2c_is_recv(priv)) 391 if (rcar_i2c_is_recv(priv))
525 rcar_i2c_flags_set(priv, rcar_i2c_irq_recv(priv, msr)); 392 rcar_i2c_flags_set(priv, rcar_i2c_irq_recv(priv, msr));
526 else 393 else
@@ -528,14 +395,11 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
528 395
529out: 396out:
530 if (rcar_i2c_flags_has(priv, ID_DONE)) { 397 if (rcar_i2c_flags_has(priv, ID_DONE)) {
531 rcar_i2c_irq_mask(priv, RCAR_IRQ_CLOSE); 398 rcar_i2c_write(priv, ICMIER, 0);
532 rcar_i2c_status_clear(priv); 399 rcar_i2c_write(priv, ICMSR, 0);
533 wake_up(&priv->wait); 400 wake_up(&priv->wait);
534 } 401 }
535 402
536 spin_unlock(&priv->lock);
537 /*-------------- spin unlock -----------------*/
538
539 return IRQ_HANDLED; 403 return IRQ_HANDLED;
540} 404}
541 405
@@ -545,24 +409,24 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
545{ 409{
546 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap); 410 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
547 struct device *dev = rcar_i2c_priv_to_dev(priv); 411 struct device *dev = rcar_i2c_priv_to_dev(priv);
548 unsigned long flags;
549 int i, ret, timeout; 412 int i, ret, timeout;
550 413
551 pm_runtime_get_sync(dev); 414 pm_runtime_get_sync(dev);
552 415
553 /*-------------- spin lock -----------------*/
554 spin_lock_irqsave(&priv->lock, flags);
555
556 rcar_i2c_init(priv); 416 rcar_i2c_init(priv);
557 rcar_i2c_clock_start(priv); 417 /* start clock */
418 rcar_i2c_write(priv, ICCCR, priv->icccr);
558 419
559 spin_unlock_irqrestore(&priv->lock, flags); 420 ret = rcar_i2c_bus_barrier(priv);
560 /*-------------- spin unlock -----------------*/ 421 if (ret < 0)
422 goto out;
561 423
562 ret = -EINVAL;
563 for (i = 0; i < num; i++) { 424 for (i = 0; i < num; i++) {
564 /*-------------- spin lock -----------------*/ 425 /* This HW can't send STOP after address phase */
565 spin_lock_irqsave(&priv->lock, flags); 426 if (msgs[i].len == 0) {
427 ret = -EOPNOTSUPP;
428 break;
429 }
566 430
567 /* init each data */ 431 /* init each data */
568 priv->msg = &msgs[i]; 432 priv->msg = &msgs[i];
@@ -571,21 +435,11 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
571 if (priv->msg == &msgs[num - 1]) 435 if (priv->msg == &msgs[num - 1])
572 rcar_i2c_flags_set(priv, ID_LAST_MSG); 436 rcar_i2c_flags_set(priv, ID_LAST_MSG);
573 437
574 /* start send/recv */ 438 ret = rcar_i2c_prepare_msg(priv);
575 if (rcar_i2c_is_recv(priv))
576 ret = rcar_i2c_recv(priv);
577 else
578 ret = rcar_i2c_send(priv);
579
580 spin_unlock_irqrestore(&priv->lock, flags);
581 /*-------------- spin unlock -----------------*/
582 439
583 if (ret < 0) 440 if (ret < 0)
584 break; 441 break;
585 442
586 /*
587 * wait result
588 */
589 timeout = wait_event_timeout(priv->wait, 443 timeout = wait_event_timeout(priv->wait,
590 rcar_i2c_flags_has(priv, ID_DONE), 444 rcar_i2c_flags_has(priv, ID_DONE),
591 5 * HZ); 445 5 * HZ);
@@ -594,9 +448,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
594 break; 448 break;
595 } 449 }
596 450
597 /*
598 * error handling
599 */
600 if (rcar_i2c_flags_has(priv, ID_NACK)) { 451 if (rcar_i2c_flags_has(priv, ID_NACK)) {
601 ret = -ENXIO; 452 ret = -ENXIO;
602 break; 453 break;
@@ -614,7 +465,7 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
614 465
615 ret = i + 1; /* The number of transfer */ 466 ret = i + 1; /* The number of transfer */
616 } 467 }
617 468out:
618 pm_runtime_put(dev); 469 pm_runtime_put(dev);
619 470
620 if (ret < 0 && ret != -ENXIO) 471 if (ret < 0 && ret != -ENXIO)
@@ -625,7 +476,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
625 476
626static u32 rcar_i2c_func(struct i2c_adapter *adap) 477static u32 rcar_i2c_func(struct i2c_adapter *adap)
627{ 478{
628 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; 479 /* This HW can't do SMBUS_QUICK and NOSTART */
480 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
629} 481}
630 482
631static const struct i2c_algorithm rcar_i2c_algo = { 483static const struct i2c_algorithm rcar_i2c_algo = {
@@ -639,6 +491,9 @@ static const struct of_device_id rcar_i2c_dt_ids[] = {
639 { .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_GEN1 }, 491 { .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_GEN1 },
640 { .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_GEN2 }, 492 { .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_GEN2 },
641 { .compatible = "renesas,i2c-r8a7791", .data = (void *)I2C_RCAR_GEN2 }, 493 { .compatible = "renesas,i2c-r8a7791", .data = (void *)I2C_RCAR_GEN2 },
494 { .compatible = "renesas,i2c-r8a7792", .data = (void *)I2C_RCAR_GEN2 },
495 { .compatible = "renesas,i2c-r8a7793", .data = (void *)I2C_RCAR_GEN2 },
496 { .compatible = "renesas,i2c-r8a7794", .data = (void *)I2C_RCAR_GEN2 },
642 {}, 497 {},
643}; 498};
644MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids); 499MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids);
@@ -651,13 +506,11 @@ static int rcar_i2c_probe(struct platform_device *pdev)
651 struct resource *res; 506 struct resource *res;
652 struct device *dev = &pdev->dev; 507 struct device *dev = &pdev->dev;
653 u32 bus_speed; 508 u32 bus_speed;
654 int ret; 509 int irq, ret;
655 510
656 priv = devm_kzalloc(dev, sizeof(struct rcar_i2c_priv), GFP_KERNEL); 511 priv = devm_kzalloc(dev, sizeof(struct rcar_i2c_priv), GFP_KERNEL);
657 if (!priv) { 512 if (!priv)
658 dev_err(dev, "no mem for private data\n");
659 return -ENOMEM; 513 return -ENOMEM;
660 }
661 514
662 priv->clk = devm_clk_get(dev, NULL); 515 priv->clk = devm_clk_get(dev, NULL);
663 if (IS_ERR(priv->clk)) { 516 if (IS_ERR(priv->clk)) {
@@ -685,9 +538,8 @@ static int rcar_i2c_probe(struct platform_device *pdev)
685 if (IS_ERR(priv->io)) 538 if (IS_ERR(priv->io))
686 return PTR_ERR(priv->io); 539 return PTR_ERR(priv->io);
687 540
688 priv->irq = platform_get_irq(pdev, 0); 541 irq = platform_get_irq(pdev, 0);
689 init_waitqueue_head(&priv->wait); 542 init_waitqueue_head(&priv->wait);
690 spin_lock_init(&priv->lock);
691 543
692 adap = &priv->adap; 544 adap = &priv->adap;
693 adap->nr = pdev->id; 545 adap->nr = pdev->id;
@@ -699,10 +551,10 @@ static int rcar_i2c_probe(struct platform_device *pdev)
699 i2c_set_adapdata(adap, priv); 551 i2c_set_adapdata(adap, priv);
700 strlcpy(adap->name, pdev->name, sizeof(adap->name)); 552 strlcpy(adap->name, pdev->name, sizeof(adap->name));
701 553
702 ret = devm_request_irq(dev, priv->irq, rcar_i2c_irq, 0, 554 ret = devm_request_irq(dev, irq, rcar_i2c_irq, 0,
703 dev_name(dev), priv); 555 dev_name(dev), priv);
704 if (ret < 0) { 556 if (ret < 0) {
705 dev_err(dev, "cannot get irq %d\n", priv->irq); 557 dev_err(dev, "cannot get irq %d\n", irq);
706 return ret; 558 return ret;
707 } 559 }
708 560
@@ -752,6 +604,6 @@ static struct platform_driver rcar_i2c_driver = {
752 604
753module_platform_driver(rcar_i2c_driver); 605module_platform_driver(rcar_i2c_driver);
754 606
755MODULE_LICENSE("GPL"); 607MODULE_LICENSE("GPL v2");
756MODULE_DESCRIPTION("Renesas R-Car I2C bus driver"); 608MODULE_DESCRIPTION("Renesas R-Car I2C bus driver");
757MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>"); 609MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c
index 9e1f8bacfb39..af3b3d032a9f 100644
--- a/drivers/i2c/busses/i2c-riic.c
+++ b/drivers/i2c/busses/i2c-riic.c
@@ -404,7 +404,7 @@ static int riic_i2c_remove(struct platform_device *pdev)
404 return 0; 404 return 0;
405} 405}
406 406
407static struct of_device_id riic_i2c_dt_ids[] = { 407static const struct of_device_id riic_i2c_dt_ids[] = {
408 { .compatible = "renesas,riic-rz" }, 408 { .compatible = "renesas,riic-rz" },
409 { /* Sentinel */ }, 409 { /* Sentinel */ },
410}; 410};
diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
new file mode 100644
index 000000000000..a9791509966a
--- /dev/null
+++ b/drivers/i2c/busses/i2c-rk3x.c
@@ -0,0 +1,763 @@
1/*
2 * Driver for I2C adapter in Rockchip RK3xxx SoC
3 *
4 * Max Schwarz <max.schwarz@online.de>
5 * based on the patches by Rockchip Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/i2c.h>
15#include <linux/interrupt.h>
16#include <linux/errno.h>
17#include <linux/err.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/spinlock.h>
23#include <linux/clk.h>
24#include <linux/wait.h>
25#include <linux/mfd/syscon.h>
26#include <linux/regmap.h>
27
28
29/* Register Map */
30#define REG_CON 0x00 /* control register */
31#define REG_CLKDIV 0x04 /* clock divisor register */
32#define REG_MRXADDR 0x08 /* slave address for REGISTER_TX */
33#define REG_MRXRADDR 0x0c /* slave register address for REGISTER_TX */
34#define REG_MTXCNT 0x10 /* number of bytes to be transmitted */
35#define REG_MRXCNT 0x14 /* number of bytes to be received */
36#define REG_IEN 0x18 /* interrupt enable */
37#define REG_IPD 0x1c /* interrupt pending */
38#define REG_FCNT 0x20 /* finished count */
39
40/* Data buffer offsets */
41#define TXBUFFER_BASE 0x100
42#define RXBUFFER_BASE 0x200
43
44/* REG_CON bits */
45#define REG_CON_EN BIT(0)
46enum {
47 REG_CON_MOD_TX = 0, /* transmit data */
48 REG_CON_MOD_REGISTER_TX, /* select register and restart */
49 REG_CON_MOD_RX, /* receive data */
50 REG_CON_MOD_REGISTER_RX, /* broken: transmits read addr AND writes
51 * register addr */
52};
53#define REG_CON_MOD(mod) ((mod) << 1)
54#define REG_CON_MOD_MASK (BIT(1) | BIT(2))
55#define REG_CON_START BIT(3)
56#define REG_CON_STOP BIT(4)
57#define REG_CON_LASTACK BIT(5) /* 1: send NACK after last received byte */
58#define REG_CON_ACTACK BIT(6) /* 1: stop if NACK is received */
59
60/* REG_MRXADDR bits */
61#define REG_MRXADDR_VALID(x) BIT(24 + (x)) /* [x*8+7:x*8] of MRX[R]ADDR valid */
62
63/* REG_IEN/REG_IPD bits */
64#define REG_INT_BTF BIT(0) /* a byte was transmitted */
65#define REG_INT_BRF BIT(1) /* a byte was received */
66#define REG_INT_MBTF BIT(2) /* master data transmit finished */
67#define REG_INT_MBRF BIT(3) /* master data receive finished */
68#define REG_INT_START BIT(4) /* START condition generated */
69#define REG_INT_STOP BIT(5) /* STOP condition generated */
70#define REG_INT_NAKRCV BIT(6) /* NACK received */
71#define REG_INT_ALL 0x7f
72
73/* Constants */
74#define WAIT_TIMEOUT 200 /* ms */
75#define DEFAULT_SCL_RATE (100 * 1000) /* Hz */
76
77enum rk3x_i2c_state {
78 STATE_IDLE,
79 STATE_START,
80 STATE_READ,
81 STATE_WRITE,
82 STATE_STOP
83};
84
85/**
86 * @grf_offset: offset inside the grf regmap for setting the i2c type
87 */
88struct rk3x_i2c_soc_data {
89 int grf_offset;
90};
91
92struct rk3x_i2c {
93 struct i2c_adapter adap;
94 struct device *dev;
95 struct rk3x_i2c_soc_data *soc_data;
96
97 /* Hardware resources */
98 void __iomem *regs;
99 struct clk *clk;
100
101 /* Settings */
102 unsigned int scl_frequency;
103
104 /* Synchronization & notification */
105 spinlock_t lock;
106 wait_queue_head_t wait;
107 bool busy;
108
109 /* Current message */
110 struct i2c_msg *msg;
111 u8 addr;
112 unsigned int mode;
113 bool is_last_msg;
114
115 /* I2C state machine */
116 enum rk3x_i2c_state state;
117 unsigned int processed; /* sent/received bytes */
118 int error;
119};
120
121static inline void i2c_writel(struct rk3x_i2c *i2c, u32 value,
122 unsigned int offset)
123{
124 writel(value, i2c->regs + offset);
125}
126
127static inline u32 i2c_readl(struct rk3x_i2c *i2c, unsigned int offset)
128{
129 return readl(i2c->regs + offset);
130}
131
132/* Reset all interrupt pending bits */
133static inline void rk3x_i2c_clean_ipd(struct rk3x_i2c *i2c)
134{
135 i2c_writel(i2c, REG_INT_ALL, REG_IPD);
136}
137
138/**
139 * Generate a START condition, which triggers a REG_INT_START interrupt.
140 */
141static void rk3x_i2c_start(struct rk3x_i2c *i2c)
142{
143 u32 val;
144
145 rk3x_i2c_clean_ipd(i2c);
146 i2c_writel(i2c, REG_INT_START, REG_IEN);
147
148 /* enable adapter with correct mode, send START condition */
149 val = REG_CON_EN | REG_CON_MOD(i2c->mode) | REG_CON_START;
150
151 /* if we want to react to NACK, set ACTACK bit */
152 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK))
153 val |= REG_CON_ACTACK;
154
155 i2c_writel(i2c, val, REG_CON);
156}
157
158/**
159 * Generate a STOP condition, which triggers a REG_INT_STOP interrupt.
160 *
161 * @error: Error code to return in rk3x_i2c_xfer
162 */
163static void rk3x_i2c_stop(struct rk3x_i2c *i2c, int error)
164{
165 unsigned int ctrl;
166
167 i2c->processed = 0;
168 i2c->msg = NULL;
169 i2c->error = error;
170
171 if (i2c->is_last_msg) {
172 /* Enable stop interrupt */
173 i2c_writel(i2c, REG_INT_STOP, REG_IEN);
174
175 i2c->state = STATE_STOP;
176
177 ctrl = i2c_readl(i2c, REG_CON);
178 ctrl |= REG_CON_STOP;
179 i2c_writel(i2c, ctrl, REG_CON);
180 } else {
181 /* Signal rk3x_i2c_xfer to start the next message. */
182 i2c->busy = false;
183 i2c->state = STATE_IDLE;
184
185 /*
186 * The HW is actually not capable of REPEATED START. But we can
187 * get the intended effect by resetting its internal state
188 * and issuing an ordinary START.
189 */
190 i2c_writel(i2c, 0, REG_CON);
191
192 /* signal that we are finished with the current msg */
193 wake_up(&i2c->wait);
194 }
195}
196
197/**
198 * Setup a read according to i2c->msg
199 */
200static void rk3x_i2c_prepare_read(struct rk3x_i2c *i2c)
201{
202 unsigned int len = i2c->msg->len - i2c->processed;
203 u32 con;
204
205 con = i2c_readl(i2c, REG_CON);
206
207 /*
208 * The hw can read up to 32 bytes at a time. If we need more than one
209 * chunk, send an ACK after the last byte of the current chunk.
210 */
211 if (unlikely(len > 32)) {
212 len = 32;
213 con &= ~REG_CON_LASTACK;
214 } else {
215 con |= REG_CON_LASTACK;
216 }
217
218 /* make sure we are in plain RX mode if we read a second chunk */
219 if (i2c->processed != 0) {
220 con &= ~REG_CON_MOD_MASK;
221 con |= REG_CON_MOD(REG_CON_MOD_RX);
222 }
223
224 i2c_writel(i2c, con, REG_CON);
225 i2c_writel(i2c, len, REG_MRXCNT);
226}
227
228/**
229 * Fill the transmit buffer with data from i2c->msg
230 */
231static void rk3x_i2c_fill_transmit_buf(struct rk3x_i2c *i2c)
232{
233 unsigned int i, j;
234 u32 cnt = 0;
235 u32 val;
236 u8 byte;
237
238 for (i = 0; i < 8; ++i) {
239 val = 0;
240 for (j = 0; j < 4; ++j) {
241 if (i2c->processed == i2c->msg->len)
242 break;
243
244 if (i2c->processed == 0 && cnt == 0)
245 byte = (i2c->addr & 0x7f) << 1;
246 else
247 byte = i2c->msg->buf[i2c->processed++];
248
249 val |= byte << (j * 8);
250 cnt++;
251 }
252
253 i2c_writel(i2c, val, TXBUFFER_BASE + 4 * i);
254
255 if (i2c->processed == i2c->msg->len)
256 break;
257 }
258
259 i2c_writel(i2c, cnt, REG_MTXCNT);
260}
261
262
263/* IRQ handlers for individual states */
264
265static void rk3x_i2c_handle_start(struct rk3x_i2c *i2c, unsigned int ipd)
266{
267 if (!(ipd & REG_INT_START)) {
268 rk3x_i2c_stop(i2c, -EIO);
269 dev_warn(i2c->dev, "unexpected irq in START: 0x%x\n", ipd);
270 rk3x_i2c_clean_ipd(i2c);
271 return;
272 }
273
274 /* ack interrupt */
275 i2c_writel(i2c, REG_INT_START, REG_IPD);
276
277 /* disable start bit */
278 i2c_writel(i2c, i2c_readl(i2c, REG_CON) & ~REG_CON_START, REG_CON);
279
280 /* enable appropriate interrupts and transition */
281 if (i2c->mode == REG_CON_MOD_TX) {
282 i2c_writel(i2c, REG_INT_MBTF | REG_INT_NAKRCV, REG_IEN);
283 i2c->state = STATE_WRITE;
284 rk3x_i2c_fill_transmit_buf(i2c);
285 } else {
286 /* in any other case, we are going to be reading. */
287 i2c_writel(i2c, REG_INT_MBRF | REG_INT_NAKRCV, REG_IEN);
288 i2c->state = STATE_READ;
289 rk3x_i2c_prepare_read(i2c);
290 }
291}
292
293static void rk3x_i2c_handle_write(struct rk3x_i2c *i2c, unsigned int ipd)
294{
295 if (!(ipd & REG_INT_MBTF)) {
296 rk3x_i2c_stop(i2c, -EIO);
297 dev_err(i2c->dev, "unexpected irq in WRITE: 0x%x\n", ipd);
298 rk3x_i2c_clean_ipd(i2c);
299 return;
300 }
301
302 /* ack interrupt */
303 i2c_writel(i2c, REG_INT_MBTF, REG_IPD);
304
305 /* are we finished? */
306 if (i2c->processed == i2c->msg->len)
307 rk3x_i2c_stop(i2c, i2c->error);
308 else
309 rk3x_i2c_fill_transmit_buf(i2c);
310}
311
312static void rk3x_i2c_handle_read(struct rk3x_i2c *i2c, unsigned int ipd)
313{
314 unsigned int i;
315 unsigned int len = i2c->msg->len - i2c->processed;
316 u32 uninitialized_var(val);
317 u8 byte;
318
319 /* we only care for MBRF here. */
320 if (!(ipd & REG_INT_MBRF))
321 return;
322
323 /* ack interrupt */
324 i2c_writel(i2c, REG_INT_MBRF, REG_IPD);
325
326 /* read the data from receive buffer */
327 for (i = 0; i < len; ++i) {
328 if (i % 4 == 0)
329 val = i2c_readl(i2c, RXBUFFER_BASE + (i / 4) * 4);
330
331 byte = (val >> ((i % 4) * 8)) & 0xff;
332 i2c->msg->buf[i2c->processed++] = byte;
333 }
334
335 /* are we finished? */
336 if (i2c->processed == i2c->msg->len)
337 rk3x_i2c_stop(i2c, i2c->error);
338 else
339 rk3x_i2c_prepare_read(i2c);
340}
341
342static void rk3x_i2c_handle_stop(struct rk3x_i2c *i2c, unsigned int ipd)
343{
344 unsigned int con;
345
346 if (!(ipd & REG_INT_STOP)) {
347 rk3x_i2c_stop(i2c, -EIO);
348 dev_err(i2c->dev, "unexpected irq in STOP: 0x%x\n", ipd);
349 rk3x_i2c_clean_ipd(i2c);
350 return;
351 }
352
353 /* ack interrupt */
354 i2c_writel(i2c, REG_INT_STOP, REG_IPD);
355
356 /* disable STOP bit */
357 con = i2c_readl(i2c, REG_CON);
358 con &= ~REG_CON_STOP;
359 i2c_writel(i2c, con, REG_CON);
360
361 i2c->busy = false;
362 i2c->state = STATE_IDLE;
363
364 /* signal rk3x_i2c_xfer that we are finished */
365 wake_up(&i2c->wait);
366}
367
368static irqreturn_t rk3x_i2c_irq(int irqno, void *dev_id)
369{
370 struct rk3x_i2c *i2c = dev_id;
371 unsigned int ipd;
372
373 spin_lock(&i2c->lock);
374
375 ipd = i2c_readl(i2c, REG_IPD);
376 if (i2c->state == STATE_IDLE) {
377 dev_warn(i2c->dev, "irq in STATE_IDLE, ipd = 0x%x\n", ipd);
378 rk3x_i2c_clean_ipd(i2c);
379 goto out;
380 }
381
382 dev_dbg(i2c->dev, "IRQ: state %d, ipd: %x\n", i2c->state, ipd);
383
384 /* Clean interrupt bits we don't care about */
385 ipd &= ~(REG_INT_BRF | REG_INT_BTF);
386
387 if (ipd & REG_INT_NAKRCV) {
388 /*
389 * We got a NACK in the last operation. Depending on whether
390 * IGNORE_NAK is set, we have to stop the operation and report
391 * an error.
392 */
393 i2c_writel(i2c, REG_INT_NAKRCV, REG_IPD);
394
395 ipd &= ~REG_INT_NAKRCV;
396
397 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK))
398 rk3x_i2c_stop(i2c, -ENXIO);
399 }
400
401 /* is there anything left to handle? */
402 if (unlikely(ipd == 0))
403 goto out;
404
405 switch (i2c->state) {
406 case STATE_START:
407 rk3x_i2c_handle_start(i2c, ipd);
408 break;
409 case STATE_WRITE:
410 rk3x_i2c_handle_write(i2c, ipd);
411 break;
412 case STATE_READ:
413 rk3x_i2c_handle_read(i2c, ipd);
414 break;
415 case STATE_STOP:
416 rk3x_i2c_handle_stop(i2c, ipd);
417 break;
418 case STATE_IDLE:
419 break;
420 }
421
422out:
423 spin_unlock(&i2c->lock);
424 return IRQ_HANDLED;
425}
426
427static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate)
428{
429 unsigned long i2c_rate = clk_get_rate(i2c->clk);
430 unsigned int div;
431
432 /* SCL rate = (clk rate) / (8 * DIV) */
433 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8);
434
435 /* The lower and upper half of the CLKDIV reg describe the length of
436 * SCL low & high periods. */
437 div = DIV_ROUND_UP(div, 2);
438
439 i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV);
440}
441
442/**
443 * Setup I2C registers for an I2C operation specified by msgs, num.
444 *
445 * Must be called with i2c->lock held.
446 *
447 * @msgs: I2C msgs to process
448 * @num: Number of msgs
449 *
450 * returns: Number of I2C msgs processed or negative in case of error
451 */
452static int rk3x_i2c_setup(struct rk3x_i2c *i2c, struct i2c_msg *msgs, int num)
453{
454 u32 addr = (msgs[0].addr & 0x7f) << 1;
455 int ret = 0;
456
457 /*
458 * The I2C adapter can issue a small (len < 4) write packet before
459 * reading. This speeds up SMBus-style register reads.
460 * The MRXADDR/MRXRADDR hold the slave address and the slave register
461 * address in this case.
462 */
463
464 if (num >= 2 && msgs[0].len < 4 &&
465 !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) {
466 u32 reg_addr = 0;
467 int i;
468
469 dev_dbg(i2c->dev, "Combined write/read from addr 0x%x\n",
470 addr >> 1);
471
472 /* Fill MRXRADDR with the register address(es) */
473 for (i = 0; i < msgs[0].len; ++i) {
474 reg_addr |= msgs[0].buf[i] << (i * 8);
475 reg_addr |= REG_MRXADDR_VALID(i);
476 }
477
478 /* msgs[0] is handled by hw. */
479 i2c->msg = &msgs[1];
480
481 i2c->mode = REG_CON_MOD_REGISTER_TX;
482
483 i2c_writel(i2c, addr | REG_MRXADDR_VALID(0), REG_MRXADDR);
484 i2c_writel(i2c, reg_addr, REG_MRXRADDR);
485
486 ret = 2;
487 } else {
488 /*
489 * We'll have to do it the boring way and process the msgs
490 * one-by-one.
491 */
492
493 if (msgs[0].flags & I2C_M_RD) {
494 addr |= 1; /* set read bit */
495
496 /*
497 * We have to transmit the slave addr first. Use
498 * MOD_REGISTER_TX for that purpose.
499 */
500 i2c->mode = REG_CON_MOD_REGISTER_TX;
501 i2c_writel(i2c, addr | REG_MRXADDR_VALID(0),
502 REG_MRXADDR);
503 i2c_writel(i2c, 0, REG_MRXRADDR);
504 } else {
505 i2c->mode = REG_CON_MOD_TX;
506 }
507
508 i2c->msg = &msgs[0];
509
510 ret = 1;
511 }
512
513 i2c->addr = msgs[0].addr;
514 i2c->busy = true;
515 i2c->state = STATE_START;
516 i2c->processed = 0;
517 i2c->error = 0;
518
519 rk3x_i2c_clean_ipd(i2c);
520
521 return ret;
522}
523
524static int rk3x_i2c_xfer(struct i2c_adapter *adap,
525 struct i2c_msg *msgs, int num)
526{
527 struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data;
528 unsigned long timeout, flags;
529 int ret = 0;
530 int i;
531
532 spin_lock_irqsave(&i2c->lock, flags);
533
534 clk_enable(i2c->clk);
535
536 /* The clock rate might have changed, so setup the divider again */
537 rk3x_i2c_set_scl_rate(i2c, i2c->scl_frequency);
538
539 i2c->is_last_msg = false;
540
541 /*
542 * Process msgs. We can handle more than one message at once (see
543 * rk3x_i2c_setup()).
544 */
545 for (i = 0; i < num; i += ret) {
546 ret = rk3x_i2c_setup(i2c, msgs + i, num - i);
547
548 if (ret < 0) {
549 dev_err(i2c->dev, "rk3x_i2c_setup() failed\n");
550 break;
551 }
552
553 if (i + ret >= num)
554 i2c->is_last_msg = true;
555
556 spin_unlock_irqrestore(&i2c->lock, flags);
557
558 rk3x_i2c_start(i2c);
559
560 timeout = wait_event_timeout(i2c->wait, !i2c->busy,
561 msecs_to_jiffies(WAIT_TIMEOUT));
562
563 spin_lock_irqsave(&i2c->lock, flags);
564
565 if (timeout == 0) {
566 dev_err(i2c->dev, "timeout, ipd: 0x%02x, state: %d\n",
567 i2c_readl(i2c, REG_IPD), i2c->state);
568
569 /* Force a STOP condition without interrupt */
570 i2c_writel(i2c, 0, REG_IEN);
571 i2c_writel(i2c, REG_CON_EN | REG_CON_STOP, REG_CON);
572
573 i2c->state = STATE_IDLE;
574
575 ret = -ETIMEDOUT;
576 break;
577 }
578
579 if (i2c->error) {
580 ret = i2c->error;
581 break;
582 }
583 }
584
585 clk_disable(i2c->clk);
586 spin_unlock_irqrestore(&i2c->lock, flags);
587
588 return ret;
589}
590
591static u32 rk3x_i2c_func(struct i2c_adapter *adap)
592{
593 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
594}
595
596static const struct i2c_algorithm rk3x_i2c_algorithm = {
597 .master_xfer = rk3x_i2c_xfer,
598 .functionality = rk3x_i2c_func,
599};
600
601static struct rk3x_i2c_soc_data soc_data[3] = {
602 { .grf_offset = 0x154 }, /* rk3066 */
603 { .grf_offset = 0x0a4 }, /* rk3188 */
604 { .grf_offset = -1 }, /* no I2C switching needed */
605};
606
607static const struct of_device_id rk3x_i2c_match[] = {
608 { .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] },
609 { .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] },
610 { .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] },
611 {},
612};
613
614static int rk3x_i2c_probe(struct platform_device *pdev)
615{
616 struct device_node *np = pdev->dev.of_node;
617 const struct of_device_id *match;
618 struct rk3x_i2c *i2c;
619 struct resource *mem;
620 int ret = 0;
621 int bus_nr;
622 u32 value;
623 int irq;
624
625 i2c = devm_kzalloc(&pdev->dev, sizeof(struct rk3x_i2c), GFP_KERNEL);
626 if (!i2c)
627 return -ENOMEM;
628
629 match = of_match_node(rk3x_i2c_match, np);
630 i2c->soc_data = (struct rk3x_i2c_soc_data *)match->data;
631
632 if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
633 &i2c->scl_frequency)) {
634 dev_info(&pdev->dev, "using default SCL frequency: %d\n",
635 DEFAULT_SCL_RATE);
636 i2c->scl_frequency = DEFAULT_SCL_RATE;
637 }
638
639 if (i2c->scl_frequency == 0 || i2c->scl_frequency > 400 * 1000) {
640 dev_warn(&pdev->dev, "invalid SCL frequency specified.\n");
641 dev_warn(&pdev->dev, "using default SCL frequency: %d\n",
642 DEFAULT_SCL_RATE);
643 i2c->scl_frequency = DEFAULT_SCL_RATE;
644 }
645
646 strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name));
647 i2c->adap.owner = THIS_MODULE;
648 i2c->adap.algo = &rk3x_i2c_algorithm;
649 i2c->adap.retries = 3;
650 i2c->adap.dev.of_node = np;
651 i2c->adap.algo_data = i2c;
652 i2c->adap.dev.parent = &pdev->dev;
653
654 i2c->dev = &pdev->dev;
655
656 spin_lock_init(&i2c->lock);
657 init_waitqueue_head(&i2c->wait);
658
659 i2c->clk = devm_clk_get(&pdev->dev, NULL);
660 if (IS_ERR(i2c->clk)) {
661 dev_err(&pdev->dev, "cannot get clock\n");
662 return PTR_ERR(i2c->clk);
663 }
664
665 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
666 i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
667 if (IS_ERR(i2c->regs))
668 return PTR_ERR(i2c->regs);
669
670 /* Try to set the I2C adapter number from dt */
671 bus_nr = of_alias_get_id(np, "i2c");
672
673 /*
674 * Switch to new interface if the SoC also offers the old one.
675 * The control bit is located in the GRF register space.
676 */
677 if (i2c->soc_data->grf_offset >= 0) {
678 struct regmap *grf;
679
680 grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
681 if (IS_ERR(grf)) {
682 dev_err(&pdev->dev,
683 "rk3x-i2c needs 'rockchip,grf' property\n");
684 return PTR_ERR(grf);
685 }
686
687 if (bus_nr < 0) {
688 dev_err(&pdev->dev, "rk3x-i2c needs i2cX alias");
689 return -EINVAL;
690 }
691
692 /* 27+i: write mask, 11+i: value */
693 value = BIT(27 + bus_nr) | BIT(11 + bus_nr);
694
695 ret = regmap_write(grf, i2c->soc_data->grf_offset, value);
696 if (ret != 0) {
697 dev_err(i2c->dev, "Could not write to GRF: %d\n", ret);
698 return ret;
699 }
700 }
701
702 /* IRQ setup */
703 irq = platform_get_irq(pdev, 0);
704 if (irq < 0) {
705 dev_err(&pdev->dev, "cannot find rk3x IRQ\n");
706 return irq;
707 }
708
709 ret = devm_request_irq(&pdev->dev, irq, rk3x_i2c_irq,
710 0, dev_name(&pdev->dev), i2c);
711 if (ret < 0) {
712 dev_err(&pdev->dev, "cannot request IRQ\n");
713 return ret;
714 }
715
716 platform_set_drvdata(pdev, i2c);
717
718 ret = clk_prepare(i2c->clk);
719 if (ret < 0) {
720 dev_err(&pdev->dev, "Could not prepare clock\n");
721 return ret;
722 }
723
724 ret = i2c_add_adapter(&i2c->adap);
725 if (ret < 0) {
726 dev_err(&pdev->dev, "Could not register adapter\n");
727 goto err_clk;
728 }
729
730 dev_info(&pdev->dev, "Initialized RK3xxx I2C bus at %p\n", i2c->regs);
731
732 return 0;
733
734err_clk:
735 clk_unprepare(i2c->clk);
736 return ret;
737}
738
739static int rk3x_i2c_remove(struct platform_device *pdev)
740{
741 struct rk3x_i2c *i2c = platform_get_drvdata(pdev);
742
743 i2c_del_adapter(&i2c->adap);
744 clk_unprepare(i2c->clk);
745
746 return 0;
747}
748
749static struct platform_driver rk3x_i2c_driver = {
750 .probe = rk3x_i2c_probe,
751 .remove = rk3x_i2c_remove,
752 .driver = {
753 .owner = THIS_MODULE,
754 .name = "rk3x-i2c",
755 .of_match_table = rk3x_i2c_match,
756 },
757};
758
759module_platform_driver(rk3x_i2c_driver);
760
761MODULE_DESCRIPTION("Rockchip RK3xxx I2C Bus driver");
762MODULE_AUTHOR("Max Schwarz <max.schwarz@online.de>");
763MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index ae4491062e41..e828a1dba0e5 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -1114,16 +1114,12 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
1114 } 1114 }
1115 1115
1116 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL); 1116 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL);
1117 if (!i2c) { 1117 if (!i2c)
1118 dev_err(&pdev->dev, "no memory for state\n");
1119 return -ENOMEM; 1118 return -ENOMEM;
1120 }
1121 1119
1122 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 1120 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1123 if (!i2c->pdata) { 1121 if (!i2c->pdata)
1124 dev_err(&pdev->dev, "no memory for platform data\n");
1125 return -ENOMEM; 1122 return -ENOMEM;
1126 }
1127 1123
1128 i2c->quirks = s3c24xx_get_device_quirks(pdev); 1124 i2c->quirks = s3c24xx_get_device_quirks(pdev);
1129 if (pdata) 1125 if (pdata)
@@ -1276,10 +1272,10 @@ static int s3c24xx_i2c_resume(struct device *dev)
1276 struct platform_device *pdev = to_platform_device(dev); 1272 struct platform_device *pdev = to_platform_device(dev);
1277 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); 1273 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1278 1274
1279 i2c->suspended = 0;
1280 clk_prepare_enable(i2c->clk); 1275 clk_prepare_enable(i2c->clk);
1281 s3c24xx_i2c_init(i2c); 1276 s3c24xx_i2c_init(i2c);
1282 clk_disable_unprepare(i2c->clk); 1277 clk_disable_unprepare(i2c->clk);
1278 i2c->suspended = 0;
1283 1279
1284 return 0; 1280 return 0;
1285} 1281}
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index 1d79585ba4b3..8b5e79cb4468 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -32,6 +32,7 @@
32#include <linux/clk.h> 32#include <linux/clk.h>
33#include <linux/io.h> 33#include <linux/io.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35#include <linux/of_device.h>
35#include <linux/i2c/i2c-sh_mobile.h> 36#include <linux/i2c/i2c-sh_mobile.h>
36 37
37/* Transmit operation: */ 38/* Transmit operation: */
@@ -139,6 +140,10 @@ struct sh_mobile_i2c_data {
139 bool send_stop; 140 bool send_stop;
140}; 141};
141 142
143struct sh_mobile_dt_config {
144 int clks_per_count;
145};
146
142#define IIC_FLAG_HAS_ICIC67 (1 << 0) 147#define IIC_FLAG_HAS_ICIC67 (1 << 0)
143 148
144#define STANDARD_MODE 100000 149#define STANDARD_MODE 100000
@@ -194,7 +199,7 @@ static void iic_set_clr(struct sh_mobile_i2c_data *pd, int offs,
194 iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr); 199 iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr);
195} 200}
196 201
197static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf, int offset) 202static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf)
198{ 203{
199 /* 204 /*
200 * Conditional expression: 205 * Conditional expression:
@@ -206,10 +211,10 @@ static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf, int off
206 * account the fall time of SCL signal (tf). Default tf value 211 * account the fall time of SCL signal (tf). Default tf value
207 * should be 0.3 us, for safety. 212 * should be 0.3 us, for safety.
208 */ 213 */
209 return (((count_khz * (tLOW + tf)) + 5000) / 10000) + offset; 214 return (((count_khz * (tLOW + tf)) + 5000) / 10000);
210} 215}
211 216
212static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf, int offset) 217static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf)
213{ 218{
214 /* 219 /*
215 * Conditional expression: 220 * Conditional expression:
@@ -225,52 +230,58 @@ static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf, int of
225 * to take into account the fall time of SDA signal (tf) at START 230 * to take into account the fall time of SDA signal (tf) at START
226 * condition, in order to meet both tHIGH and tHD;STA specs. 231 * condition, in order to meet both tHIGH and tHD;STA specs.
227 */ 232 */
228 return (((count_khz * (tHIGH + tf)) + 5000) / 10000) + offset; 233 return (((count_khz * (tHIGH + tf)) + 5000) / 10000);
229} 234}
230 235
231static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd) 236static int sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
232{ 237{
233 unsigned long i2c_clk_khz; 238 unsigned long i2c_clk_khz;
234 u32 tHIGH, tLOW, tf; 239 u32 tHIGH, tLOW, tf;
235 int offset; 240 uint16_t max_val;
236 241
237 /* Get clock rate after clock is enabled */ 242 /* Get clock rate after clock is enabled */
238 clk_prepare_enable(pd->clk); 243 clk_prepare_enable(pd->clk);
239 i2c_clk_khz = clk_get_rate(pd->clk) / 1000; 244 i2c_clk_khz = clk_get_rate(pd->clk) / 1000;
245 clk_disable_unprepare(pd->clk);
240 i2c_clk_khz /= pd->clks_per_count; 246 i2c_clk_khz /= pd->clks_per_count;
241 247
242 if (pd->bus_speed == STANDARD_MODE) { 248 if (pd->bus_speed == STANDARD_MODE) {
243 tLOW = 47; /* tLOW = 4.7 us */ 249 tLOW = 47; /* tLOW = 4.7 us */
244 tHIGH = 40; /* tHD;STA = tHIGH = 4.0 us */ 250 tHIGH = 40; /* tHD;STA = tHIGH = 4.0 us */
245 tf = 3; /* tf = 0.3 us */ 251 tf = 3; /* tf = 0.3 us */
246 offset = 0; /* No offset */
247 } else if (pd->bus_speed == FAST_MODE) { 252 } else if (pd->bus_speed == FAST_MODE) {
248 tLOW = 13; /* tLOW = 1.3 us */ 253 tLOW = 13; /* tLOW = 1.3 us */
249 tHIGH = 6; /* tHD;STA = tHIGH = 0.6 us */ 254 tHIGH = 6; /* tHD;STA = tHIGH = 0.6 us */
250 tf = 3; /* tf = 0.3 us */ 255 tf = 3; /* tf = 0.3 us */
251 offset = 0; /* No offset */
252 } else { 256 } else {
253 dev_err(pd->dev, "unrecognized bus speed %lu Hz\n", 257 dev_err(pd->dev, "unrecognized bus speed %lu Hz\n",
254 pd->bus_speed); 258 pd->bus_speed);
255 goto out; 259 return -EINVAL;
260 }
261
262 pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf);
263 pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf);
264
265 max_val = pd->flags & IIC_FLAG_HAS_ICIC67 ? 0x1ff : 0xff;
266 if (pd->iccl > max_val || pd->icch > max_val) {
267 dev_err(pd->dev, "timing values out of range: L/H=0x%x/0x%x\n",
268 pd->iccl, pd->icch);
269 return -EINVAL;
256 } 270 }
257 271
258 pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf, offset);
259 /* one more bit of ICCL in ICIC */ 272 /* one more bit of ICCL in ICIC */
260 if ((pd->iccl > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67)) 273 if (pd->iccl & 0x100)
261 pd->icic |= ICIC_ICCLB8; 274 pd->icic |= ICIC_ICCLB8;
262 else 275 else
263 pd->icic &= ~ICIC_ICCLB8; 276 pd->icic &= ~ICIC_ICCLB8;
264 277
265 pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf, offset);
266 /* one more bit of ICCH in ICIC */ 278 /* one more bit of ICCH in ICIC */
267 if ((pd->icch > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67)) 279 if (pd->icch & 0x100)
268 pd->icic |= ICIC_ICCHB8; 280 pd->icic |= ICIC_ICCHB8;
269 else 281 else
270 pd->icic &= ~ICIC_ICCHB8; 282 pd->icic &= ~ICIC_ICCHB8;
271 283
272out: 284 return 0;
273 clk_disable_unprepare(pd->clk);
274} 285}
275 286
276static void activate_ch(struct sh_mobile_i2c_data *pd) 287static void activate_ch(struct sh_mobile_i2c_data *pd)
@@ -316,7 +327,7 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
316 327
317 switch (op) { 328 switch (op) {
318 case OP_START: /* issue start and trigger DTE interrupt */ 329 case OP_START: /* issue start and trigger DTE interrupt */
319 iic_wr(pd, ICCR, 0x94); 330 iic_wr(pd, ICCR, ICCR_ICE | ICCR_TRS | ICCR_BBSY);
320 break; 331 break;
321 case OP_TX_FIRST: /* disable DTE interrupt and write data */ 332 case OP_TX_FIRST: /* disable DTE interrupt and write data */
322 iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE); 333 iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
@@ -327,10 +338,11 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
327 break; 338 break;
328 case OP_TX_STOP: /* write data and issue a stop afterwards */ 339 case OP_TX_STOP: /* write data and issue a stop afterwards */
329 iic_wr(pd, ICDR, data); 340 iic_wr(pd, ICDR, data);
330 iic_wr(pd, ICCR, pd->send_stop ? 0x90 : 0x94); 341 iic_wr(pd, ICCR, pd->send_stop ? ICCR_ICE | ICCR_TRS
342 : ICCR_ICE | ICCR_TRS | ICCR_BBSY);
331 break; 343 break;
332 case OP_TX_TO_RX: /* select read mode */ 344 case OP_TX_TO_RX: /* select read mode */
333 iic_wr(pd, ICCR, 0x81); 345 iic_wr(pd, ICCR, ICCR_ICE | ICCR_SCP);
334 break; 346 break;
335 case OP_RX: /* just read data */ 347 case OP_RX: /* just read data */
336 ret = iic_rd(pd, ICDR); 348 ret = iic_rd(pd, ICDR);
@@ -338,13 +350,13 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
338 case OP_RX_STOP: /* enable DTE interrupt, issue stop */ 350 case OP_RX_STOP: /* enable DTE interrupt, issue stop */
339 iic_wr(pd, ICIC, 351 iic_wr(pd, ICIC,
340 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE); 352 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
341 iic_wr(pd, ICCR, 0xc0); 353 iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK);
342 break; 354 break;
343 case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */ 355 case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
344 iic_wr(pd, ICIC, 356 iic_wr(pd, ICIC,
345 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE); 357 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
346 ret = iic_rd(pd, ICDR); 358 ret = iic_rd(pd, ICDR);
347 iic_wr(pd, ICCR, 0xc0); 359 iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK);
348 break; 360 break;
349 } 361 }
350 362
@@ -479,7 +491,7 @@ static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg,
479{ 491{
480 if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) { 492 if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
481 dev_err(pd->dev, "Unsupported zero length i2c read\n"); 493 dev_err(pd->dev, "Unsupported zero length i2c read\n");
482 return -EIO; 494 return -EOPNOTSUPP;
483 } 495 }
484 496
485 if (do_init) { 497 if (do_init) {
@@ -514,17 +526,12 @@ static int poll_dte(struct sh_mobile_i2c_data *pd)
514 break; 526 break;
515 527
516 if (val & ICSR_TACK) 528 if (val & ICSR_TACK)
517 return -EIO; 529 return -ENXIO;
518 530
519 udelay(10); 531 udelay(10);
520 } 532 }
521 533
522 if (!i) { 534 return i ? 0 : -ETIMEDOUT;
523 dev_warn(pd->dev, "Timeout polling for DTE!\n");
524 return -ETIMEDOUT;
525 }
526
527 return 0;
528} 535}
529 536
530static int poll_busy(struct sh_mobile_i2c_data *pd) 537static int poll_busy(struct sh_mobile_i2c_data *pd)
@@ -542,20 +549,18 @@ static int poll_busy(struct sh_mobile_i2c_data *pd)
542 */ 549 */
543 if (!(val & ICSR_BUSY)) { 550 if (!(val & ICSR_BUSY)) {
544 /* handle missing acknowledge and arbitration lost */ 551 /* handle missing acknowledge and arbitration lost */
545 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) 552 val |= pd->sr;
546 return -EIO; 553 if (val & ICSR_TACK)
554 return -ENXIO;
555 if (val & ICSR_AL)
556 return -EAGAIN;
547 break; 557 break;
548 } 558 }
549 559
550 udelay(10); 560 udelay(10);
551 } 561 }
552 562
553 if (!i) { 563 return i ? 0 : -ETIMEDOUT;
554 dev_err(pd->dev, "Polling timed out\n");
555 return -ETIMEDOUT;
556 }
557
558 return 0;
559} 564}
560 565
561static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter, 566static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
@@ -617,42 +622,44 @@ static struct i2c_algorithm sh_mobile_i2c_algorithm = {
617 .master_xfer = sh_mobile_i2c_xfer, 622 .master_xfer = sh_mobile_i2c_xfer,
618}; 623};
619 624
620static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook) 625static const struct sh_mobile_dt_config default_dt_config = {
626 .clks_per_count = 1,
627};
628
629static const struct sh_mobile_dt_config rcar_gen2_dt_config = {
630 .clks_per_count = 2,
631};
632
633static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
634 { .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
635 { .compatible = "renesas,iic-r8a7790", .data = &rcar_gen2_dt_config },
636 { .compatible = "renesas,iic-r8a7791", .data = &rcar_gen2_dt_config },
637 { .compatible = "renesas,iic-r8a7792", .data = &rcar_gen2_dt_config },
638 { .compatible = "renesas,iic-r8a7793", .data = &rcar_gen2_dt_config },
639 { .compatible = "renesas,iic-r8a7794", .data = &rcar_gen2_dt_config },
640 {},
641};
642MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
643
644static int sh_mobile_i2c_hook_irqs(struct platform_device *dev)
621{ 645{
622 struct resource *res; 646 struct resource *res;
623 int ret = -ENXIO; 647 resource_size_t n;
624 int n, k = 0; 648 int k = 0, ret;
625 649
626 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) { 650 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
627 for (n = res->start; hook && n <= res->end; n++) { 651 for (n = res->start; n <= res->end; n++) {
628 if (request_irq(n, sh_mobile_i2c_isr, 0, 652 ret = devm_request_irq(&dev->dev, n, sh_mobile_i2c_isr,
629 dev_name(&dev->dev), dev)) { 653 0, dev_name(&dev->dev), dev);
630 for (n--; n >= res->start; n--) 654 if (ret) {
631 free_irq(n, dev); 655 dev_err(&dev->dev, "cannot request IRQ %pa\n", &n);
632 656 return ret;
633 goto rollback;
634 } 657 }
635 } 658 }
636 k++; 659 k++;
637 } 660 }
638 661
639 if (hook) 662 return k > 0 ? 0 : -ENOENT;
640 return k > 0 ? 0 : -ENOENT;
641
642 ret = 0;
643
644 rollback:
645 k--;
646
647 while (k >= 0) {
648 res = platform_get_resource(dev, IORESOURCE_IRQ, k);
649 for (n = res->start; n <= res->end; n++)
650 free_irq(n, dev);
651
652 k--;
653 }
654
655 return ret;
656} 663}
657 664
658static int sh_mobile_i2c_probe(struct platform_device *dev) 665static int sh_mobile_i2c_probe(struct platform_device *dev)
@@ -661,62 +668,64 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
661 struct sh_mobile_i2c_data *pd; 668 struct sh_mobile_i2c_data *pd;
662 struct i2c_adapter *adap; 669 struct i2c_adapter *adap;
663 struct resource *res; 670 struct resource *res;
664 int size;
665 int ret; 671 int ret;
672 u32 bus_speed;
666 673
667 pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL); 674 pd = devm_kzalloc(&dev->dev, sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
668 if (pd == NULL) { 675 if (!pd)
669 dev_err(&dev->dev, "cannot allocate private data\n");
670 return -ENOMEM; 676 return -ENOMEM;
671 }
672 677
673 pd->clk = clk_get(&dev->dev, NULL); 678 pd->clk = devm_clk_get(&dev->dev, NULL);
674 if (IS_ERR(pd->clk)) { 679 if (IS_ERR(pd->clk)) {
675 dev_err(&dev->dev, "cannot get clock\n"); 680 dev_err(&dev->dev, "cannot get clock\n");
676 ret = PTR_ERR(pd->clk); 681 return PTR_ERR(pd->clk);
677 goto err;
678 } 682 }
679 683
680 ret = sh_mobile_i2c_hook_irqs(dev, 1); 684 ret = sh_mobile_i2c_hook_irqs(dev);
681 if (ret) { 685 if (ret)
682 dev_err(&dev->dev, "cannot request IRQ\n"); 686 return ret;
683 goto err_clk;
684 }
685 687
686 pd->dev = &dev->dev; 688 pd->dev = &dev->dev;
687 platform_set_drvdata(dev, pd); 689 platform_set_drvdata(dev, pd);
688 690
689 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 691 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
690 if (res == NULL) {
691 dev_err(&dev->dev, "cannot find IO resource\n");
692 ret = -ENOENT;
693 goto err_irq;
694 }
695
696 size = resource_size(res);
697 692
698 pd->reg = ioremap(res->start, size); 693 pd->reg = devm_ioremap_resource(&dev->dev, res);
699 if (pd->reg == NULL) { 694 if (IS_ERR(pd->reg))
700 dev_err(&dev->dev, "cannot map IO\n"); 695 return PTR_ERR(pd->reg);
701 ret = -ENXIO;
702 goto err_irq;
703 }
704 696
705 /* Use platform data bus speed or STANDARD_MODE */ 697 /* Use platform data bus speed or STANDARD_MODE */
706 pd->bus_speed = STANDARD_MODE; 698 ret = of_property_read_u32(dev->dev.of_node, "clock-frequency", &bus_speed);
707 if (pdata && pdata->bus_speed) 699 pd->bus_speed = ret ? STANDARD_MODE : bus_speed;
708 pd->bus_speed = pdata->bus_speed; 700
709 pd->clks_per_count = 1; 701 pd->clks_per_count = 1;
710 if (pdata && pdata->clks_per_count) 702
711 pd->clks_per_count = pdata->clks_per_count; 703 if (dev->dev.of_node) {
704 const struct of_device_id *match;
705
706 match = of_match_device(sh_mobile_i2c_dt_ids, &dev->dev);
707 if (match) {
708 const struct sh_mobile_dt_config *config;
709
710 config = match->data;
711 pd->clks_per_count = config->clks_per_count;
712 }
713 } else {
714 if (pdata && pdata->bus_speed)
715 pd->bus_speed = pdata->bus_speed;
716 if (pdata && pdata->clks_per_count)
717 pd->clks_per_count = pdata->clks_per_count;
718 }
712 719
713 /* The IIC blocks on SH-Mobile ARM processors 720 /* The IIC blocks on SH-Mobile ARM processors
714 * come with two new bits in ICIC. 721 * come with two new bits in ICIC.
715 */ 722 */
716 if (size > 0x17) 723 if (resource_size(res) > 0x17)
717 pd->flags |= IIC_FLAG_HAS_ICIC67; 724 pd->flags |= IIC_FLAG_HAS_ICIC67;
718 725
719 sh_mobile_i2c_init(pd); 726 ret = sh_mobile_i2c_init(pd);
727 if (ret)
728 return ret;
720 729
721 /* Enable Runtime PM for this device. 730 /* Enable Runtime PM for this device.
722 * 731 *
@@ -750,24 +759,14 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
750 ret = i2c_add_numbered_adapter(adap); 759 ret = i2c_add_numbered_adapter(adap);
751 if (ret < 0) { 760 if (ret < 0) {
752 dev_err(&dev->dev, "cannot add numbered adapter\n"); 761 dev_err(&dev->dev, "cannot add numbered adapter\n");
753 goto err_all; 762 return ret;
754 } 763 }
755 764
756 dev_info(&dev->dev, 765 dev_info(&dev->dev,
757 "I2C adapter %d with bus speed %lu Hz (L/H=%x/%x)\n", 766 "I2C adapter %d with bus speed %lu Hz (L/H=0x%x/0x%x)\n",
758 adap->nr, pd->bus_speed, pd->iccl, pd->icch); 767 adap->nr, pd->bus_speed, pd->iccl, pd->icch);
759 768
760 return 0; 769 return 0;
761
762 err_all:
763 iounmap(pd->reg);
764 err_irq:
765 sh_mobile_i2c_hook_irqs(dev, 0);
766 err_clk:
767 clk_put(pd->clk);
768 err:
769 kfree(pd);
770 return ret;
771} 770}
772 771
773static int sh_mobile_i2c_remove(struct platform_device *dev) 772static int sh_mobile_i2c_remove(struct platform_device *dev)
@@ -775,11 +774,7 @@ static int sh_mobile_i2c_remove(struct platform_device *dev)
775 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev); 774 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
776 775
777 i2c_del_adapter(&pd->adap); 776 i2c_del_adapter(&pd->adap);
778 iounmap(pd->reg);
779 sh_mobile_i2c_hook_irqs(dev, 0);
780 clk_put(pd->clk);
781 pm_runtime_disable(&dev->dev); 777 pm_runtime_disable(&dev->dev);
782 kfree(pd);
783 return 0; 778 return 0;
784} 779}
785 780
@@ -800,12 +795,6 @@ static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
800 .runtime_resume = sh_mobile_i2c_runtime_nop, 795 .runtime_resume = sh_mobile_i2c_runtime_nop,
801}; 796};
802 797
803static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
804 { .compatible = "renesas,rmobile-iic", },
805 {},
806};
807MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
808
809static struct platform_driver sh_mobile_i2c_driver = { 798static struct platform_driver sh_mobile_i2c_driver = {
810 .driver = { 799 .driver = {
811 .name = "i2c-sh_mobile", 800 .name = "i2c-sh_mobile",
diff --git a/drivers/i2c/busses/i2c-simtec.c b/drivers/i2c/busses/i2c-simtec.c
index 294c80f21d65..964e5c6f84ab 100644
--- a/drivers/i2c/busses/i2c-simtec.c
+++ b/drivers/i2c/busses/i2c-simtec.c
@@ -77,10 +77,8 @@ static int simtec_i2c_probe(struct platform_device *dev)
77 int ret; 77 int ret;
78 78
79 pd = kzalloc(sizeof(struct simtec_i2c_data), GFP_KERNEL); 79 pd = kzalloc(sizeof(struct simtec_i2c_data), GFP_KERNEL);
80 if (pd == NULL) { 80 if (pd == NULL)
81 dev_err(&dev->dev, "cannot allocate private data\n");
82 return -ENOMEM; 81 return -ENOMEM;
83 }
84 82
85 platform_set_drvdata(dev, pd); 83 platform_set_drvdata(dev, pd);
86 84
diff --git a/drivers/i2c/busses/i2c-sirf.c b/drivers/i2c/busses/i2c-sirf.c
index 8e3be7ed0586..a3216defc1d3 100644
--- a/drivers/i2c/busses/i2c-sirf.c
+++ b/drivers/i2c/busses/i2c-sirf.c
@@ -307,7 +307,6 @@ static int i2c_sirfsoc_probe(struct platform_device *pdev)
307 307
308 siic = devm_kzalloc(&pdev->dev, sizeof(*siic), GFP_KERNEL); 308 siic = devm_kzalloc(&pdev->dev, sizeof(*siic), GFP_KERNEL);
309 if (!siic) { 309 if (!siic) {
310 dev_err(&pdev->dev, "Can't allocate driver data\n");
311 err = -ENOMEM; 310 err = -ENOMEM;
312 goto out; 311 goto out;
313 } 312 }
diff --git a/drivers/i2c/busses/i2c-st.c b/drivers/i2c/busses/i2c-st.c
index 872016196ef3..95b947670386 100644
--- a/drivers/i2c/busses/i2c-st.c
+++ b/drivers/i2c/busses/i2c-st.c
@@ -847,7 +847,7 @@ static int st_i2c_remove(struct platform_device *pdev)
847 return 0; 847 return 0;
848} 848}
849 849
850static struct of_device_id st_i2c_match[] = { 850static const struct of_device_id st_i2c_match[] = {
851 { .compatible = "st,comms-ssc-i2c", }, 851 { .compatible = "st,comms-ssc-i2c", },
852 { .compatible = "st,comms-ssc4-i2c", }, 852 { .compatible = "st,comms-ssc4-i2c", },
853 {}, 853 {},
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index 29b1fb778943..fefb1c19ec1d 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -868,10 +868,8 @@ static int stu300_probe(struct platform_device *pdev)
868 int ret = 0; 868 int ret = 0;
869 869
870 dev = devm_kzalloc(&pdev->dev, sizeof(struct stu300_dev), GFP_KERNEL); 870 dev = devm_kzalloc(&pdev->dev, sizeof(struct stu300_dev), GFP_KERNEL);
871 if (!dev) { 871 if (!dev)
872 dev_err(&pdev->dev, "could not allocate device struct\n");
873 return -ENOMEM; 872 return -ENOMEM;
874 }
875 873
876 bus_nr = pdev->id; 874 bus_nr = pdev->id;
877 dev->clk = devm_clk_get(&pdev->dev, NULL); 875 dev->clk = devm_clk_get(&pdev->dev, NULL);
diff --git a/drivers/i2c/busses/i2c-sun6i-p2wi.c b/drivers/i2c/busses/i2c-sun6i-p2wi.c
new file mode 100644
index 000000000000..4d75d4759709
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sun6i-p2wi.c
@@ -0,0 +1,344 @@
1/*
2 * P2WI (Push-Pull Two Wire Interface) bus driver.
3 *
4 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 *
10 * The P2WI controller looks like an SMBus controller which only supports byte
11 * data transfers. But, it differs from standard SMBus protocol on several
12 * aspects:
13 * - it supports only one slave device, and thus drop the address field
14 * - it adds a parity bit every 8bits of data
15 * - only one read access is required to read a byte (instead of a write
16 * followed by a read access in standard SMBus protocol)
17 * - there's no Ack bit after each byte transfer
18 *
19 * This means this bus cannot be used to interface with standard SMBus
20 * devices (the only known device to support this interface is the AXP221
21 * PMIC).
22 *
23 */
24#include <linux/clk.h>
25#include <linux/i2c.h>
26#include <linux/io.h>
27#include <linux/interrupt.h>
28#include <linux/module.h>
29#include <linux/of.h>
30#include <linux/platform_device.h>
31#include <linux/reset.h>
32
33
34/* P2WI registers */
35#define P2WI_CTRL 0x0
36#define P2WI_CCR 0x4
37#define P2WI_INTE 0x8
38#define P2WI_INTS 0xc
39#define P2WI_DADDR0 0x10
40#define P2WI_DADDR1 0x14
41#define P2WI_DLEN 0x18
42#define P2WI_DATA0 0x1c
43#define P2WI_DATA1 0x20
44#define P2WI_LCR 0x24
45#define P2WI_PMCR 0x28
46
47/* CTRL fields */
48#define P2WI_CTRL_START_TRANS BIT(7)
49#define P2WI_CTRL_ABORT_TRANS BIT(6)
50#define P2WI_CTRL_GLOBAL_INT_ENB BIT(1)
51#define P2WI_CTRL_SOFT_RST BIT(0)
52
53/* CLK CTRL fields */
54#define P2WI_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8)
55#define P2WI_CCR_MAX_CLK_DIV 0xff
56#define P2WI_CCR_CLK_DIV(v) ((v) & P2WI_CCR_MAX_CLK_DIV)
57
58/* STATUS fields */
59#define P2WI_INTS_TRANS_ERR_ID(v) (((v) >> 8) & 0xff)
60#define P2WI_INTS_LOAD_BSY BIT(2)
61#define P2WI_INTS_TRANS_ERR BIT(1)
62#define P2WI_INTS_TRANS_OVER BIT(0)
63
64/* DATA LENGTH fields*/
65#define P2WI_DLEN_READ BIT(4)
66#define P2WI_DLEN_DATA_LENGTH(v) ((v - 1) & 0x7)
67
68/* LINE CTRL fields*/
69#define P2WI_LCR_SCL_STATE BIT(5)
70#define P2WI_LCR_SDA_STATE BIT(4)
71#define P2WI_LCR_SCL_CTL BIT(3)
72#define P2WI_LCR_SCL_CTL_EN BIT(2)
73#define P2WI_LCR_SDA_CTL BIT(1)
74#define P2WI_LCR_SDA_CTL_EN BIT(0)
75
76/* PMU MODE CTRL fields */
77#define P2WI_PMCR_PMU_INIT_SEND BIT(31)
78#define P2WI_PMCR_PMU_INIT_DATA(v) (((v) & 0xff) << 16)
79#define P2WI_PMCR_PMU_MODE_REG(v) (((v) & 0xff) << 8)
80#define P2WI_PMCR_PMU_DEV_ADDR(v) ((v) & 0xff)
81
82#define P2WI_MAX_FREQ 6000000
83
84struct p2wi {
85 struct i2c_adapter adapter;
86 struct completion complete;
87 unsigned int status;
88 void __iomem *regs;
89 struct clk *clk;
90 struct reset_control *rstc;
91 int slave_addr;
92};
93
94static irqreturn_t p2wi_interrupt(int irq, void *dev_id)
95{
96 struct p2wi *p2wi = dev_id;
97 unsigned long status;
98
99 status = readl(p2wi->regs + P2WI_INTS);
100 p2wi->status = status;
101
102 /* Clear interrupts */
103 status &= (P2WI_INTS_LOAD_BSY | P2WI_INTS_TRANS_ERR |
104 P2WI_INTS_TRANS_OVER);
105 writel(status, p2wi->regs + P2WI_INTS);
106
107 complete(&p2wi->complete);
108
109 return IRQ_HANDLED;
110}
111
112static u32 p2wi_functionality(struct i2c_adapter *adap)
113{
114 return I2C_FUNC_SMBUS_BYTE_DATA;
115}
116
117static int p2wi_smbus_xfer(struct i2c_adapter *adap, u16 addr,
118 unsigned short flags, char read_write,
119 u8 command, int size, union i2c_smbus_data *data)
120{
121 struct p2wi *p2wi = i2c_get_adapdata(adap);
122 unsigned long dlen = P2WI_DLEN_DATA_LENGTH(1);
123
124 if (p2wi->slave_addr >= 0 && addr != p2wi->slave_addr) {
125 dev_err(&adap->dev, "invalid P2WI address\n");
126 return -EINVAL;
127 }
128
129 if (!data)
130 return -EINVAL;
131
132 writel(command, p2wi->regs + P2WI_DADDR0);
133
134 if (read_write == I2C_SMBUS_READ)
135 dlen |= P2WI_DLEN_READ;
136 else
137 writel(data->byte, p2wi->regs + P2WI_DATA0);
138
139 writel(dlen, p2wi->regs + P2WI_DLEN);
140
141 if (readl(p2wi->regs + P2WI_CTRL) & P2WI_CTRL_START_TRANS) {
142 dev_err(&adap->dev, "P2WI bus busy\n");
143 return -EBUSY;
144 }
145
146 reinit_completion(&p2wi->complete);
147
148 writel(P2WI_INTS_LOAD_BSY | P2WI_INTS_TRANS_ERR | P2WI_INTS_TRANS_OVER,
149 p2wi->regs + P2WI_INTE);
150
151 writel(P2WI_CTRL_START_TRANS | P2WI_CTRL_GLOBAL_INT_ENB,
152 p2wi->regs + P2WI_CTRL);
153
154 wait_for_completion(&p2wi->complete);
155
156 if (p2wi->status & P2WI_INTS_LOAD_BSY) {
157 dev_err(&adap->dev, "P2WI bus busy\n");
158 return -EBUSY;
159 }
160
161 if (p2wi->status & P2WI_INTS_TRANS_ERR) {
162 dev_err(&adap->dev, "P2WI bus xfer error\n");
163 return -ENXIO;
164 }
165
166 if (read_write == I2C_SMBUS_READ)
167 data->byte = readl(p2wi->regs + P2WI_DATA0);
168
169 return 0;
170}
171
172static const struct i2c_algorithm p2wi_algo = {
173 .smbus_xfer = p2wi_smbus_xfer,
174 .functionality = p2wi_functionality,
175};
176
177static const struct of_device_id p2wi_of_match_table[] = {
178 { .compatible = "allwinner,sun6i-a31-p2wi" },
179 {}
180};
181MODULE_DEVICE_TABLE(of, p2wi_of_match_table);
182
183static int p2wi_probe(struct platform_device *pdev)
184{
185 struct device *dev = &pdev->dev;
186 struct device_node *np = dev->of_node;
187 struct device_node *childnp;
188 unsigned long parent_clk_freq;
189 u32 clk_freq = 100000;
190 struct resource *r;
191 struct p2wi *p2wi;
192 u32 slave_addr;
193 int clk_div;
194 int irq;
195 int ret;
196
197 of_property_read_u32(np, "clock-frequency", &clk_freq);
198 if (clk_freq > P2WI_MAX_FREQ) {
199 dev_err(dev,
200 "required clock-frequency (%u Hz) is too high (max = 6MHz)",
201 clk_freq);
202 return -EINVAL;
203 }
204
205 if (of_get_child_count(np) > 1) {
206 dev_err(dev, "P2WI only supports one slave device\n");
207 return -EINVAL;
208 }
209
210 p2wi = devm_kzalloc(dev, sizeof(struct p2wi), GFP_KERNEL);
211 if (!p2wi)
212 return -ENOMEM;
213
214 p2wi->slave_addr = -1;
215
216 /*
217 * Authorize a p2wi node without any children to be able to use an
218 * i2c-dev from userpace.
219 * In this case the slave_addr is set to -1 and won't be checked when
220 * launching a P2WI transfer.
221 */
222 childnp = of_get_next_available_child(np, NULL);
223 if (childnp) {
224 ret = of_property_read_u32(childnp, "reg", &slave_addr);
225 if (ret) {
226 dev_err(dev, "invalid slave address on node %s\n",
227 childnp->full_name);
228 return -EINVAL;
229 }
230
231 p2wi->slave_addr = slave_addr;
232 }
233
234 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
235 p2wi->regs = devm_ioremap_resource(dev, r);
236 if (IS_ERR(p2wi->regs))
237 return PTR_ERR(p2wi->regs);
238
239 strlcpy(p2wi->adapter.name, pdev->name, sizeof(p2wi->adapter.name));
240 irq = platform_get_irq(pdev, 0);
241 if (irq < 0) {
242 dev_err(dev, "failed to retrieve irq: %d\n", irq);
243 return irq;
244 }
245
246 p2wi->clk = devm_clk_get(dev, NULL);
247 if (IS_ERR(p2wi->clk)) {
248 ret = PTR_ERR(p2wi->clk);
249 dev_err(dev, "failed to retrieve clk: %d\n", ret);
250 return ret;
251 }
252
253 ret = clk_prepare_enable(p2wi->clk);
254 if (ret) {
255 dev_err(dev, "failed to enable clk: %d\n", ret);
256 return ret;
257 }
258
259 parent_clk_freq = clk_get_rate(p2wi->clk);
260
261 p2wi->rstc = devm_reset_control_get(dev, NULL);
262 if (IS_ERR(p2wi->rstc)) {
263 ret = PTR_ERR(p2wi->rstc);
264 dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
265 goto err_clk_disable;
266 }
267
268 ret = reset_control_deassert(p2wi->rstc);
269 if (ret) {
270 dev_err(dev, "failed to deassert reset line: %d\n", ret);
271 goto err_clk_disable;
272 }
273
274 init_completion(&p2wi->complete);
275 p2wi->adapter.dev.parent = dev;
276 p2wi->adapter.algo = &p2wi_algo;
277 p2wi->adapter.owner = THIS_MODULE;
278 p2wi->adapter.dev.of_node = pdev->dev.of_node;
279 platform_set_drvdata(pdev, p2wi);
280 i2c_set_adapdata(&p2wi->adapter, p2wi);
281
282 ret = devm_request_irq(dev, irq, p2wi_interrupt, 0, pdev->name, p2wi);
283 if (ret) {
284 dev_err(dev, "can't register interrupt handler irq%d: %d\n",
285 irq, ret);
286 goto err_reset_assert;
287 }
288
289 writel(P2WI_CTRL_SOFT_RST, p2wi->regs + P2WI_CTRL);
290
291 clk_div = parent_clk_freq / clk_freq;
292 if (!clk_div) {
293 dev_warn(dev,
294 "clock-frequency is too high, setting it to %lu Hz\n",
295 parent_clk_freq);
296 clk_div = 1;
297 } else if (clk_div > P2WI_CCR_MAX_CLK_DIV) {
298 dev_warn(dev,
299 "clock-frequency is too low, setting it to %lu Hz\n",
300 parent_clk_freq / P2WI_CCR_MAX_CLK_DIV);
301 clk_div = P2WI_CCR_MAX_CLK_DIV;
302 }
303
304 writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div),
305 p2wi->regs + P2WI_CCR);
306
307 ret = i2c_add_adapter(&p2wi->adapter);
308 if (!ret)
309 return 0;
310
311err_reset_assert:
312 reset_control_assert(p2wi->rstc);
313
314err_clk_disable:
315 clk_disable_unprepare(p2wi->clk);
316
317 return ret;
318}
319
320static int p2wi_remove(struct platform_device *dev)
321{
322 struct p2wi *p2wi = platform_get_drvdata(dev);
323
324 reset_control_assert(p2wi->rstc);
325 clk_disable_unprepare(p2wi->clk);
326 i2c_del_adapter(&p2wi->adapter);
327
328 return 0;
329}
330
331static struct platform_driver p2wi_driver = {
332 .probe = p2wi_probe,
333 .remove = p2wi_remove,
334 .driver = {
335 .owner = THIS_MODULE,
336 .name = "i2c-sunxi-p2wi",
337 .of_match_table = p2wi_of_match_table,
338 },
339};
340module_platform_driver(p2wi_driver);
341
342MODULE_AUTHOR("Boris BREZILLON <boris.brezillon@free-electrons.com>");
343MODULE_DESCRIPTION("Allwinner P2WI driver");
344MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 00f04cb5b4eb..f1bb2fc06791 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -732,10 +732,8 @@ static int tegra_i2c_probe(struct platform_device *pdev)
732 } 732 }
733 733
734 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); 734 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
735 if (!i2c_dev) { 735 if (!i2c_dev)
736 dev_err(&pdev->dev, "Could not allocate struct tegra_i2c_dev");
737 return -ENOMEM; 736 return -ENOMEM;
738 }
739 737
740 i2c_dev->base = base; 738 i2c_dev->base = base;
741 i2c_dev->div_clk = div_clk; 739 i2c_dev->div_clk = div_clk;
diff --git a/drivers/i2c/busses/i2c-wmt.c b/drivers/i2c/busses/i2c-wmt.c
index 2c8a3e4f9008..f80a38c2072c 100644
--- a/drivers/i2c/busses/i2c-wmt.c
+++ b/drivers/i2c/busses/i2c-wmt.c
@@ -379,10 +379,8 @@ static int wmt_i2c_probe(struct platform_device *pdev)
379 u32 clk_rate; 379 u32 clk_rate;
380 380
381 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); 381 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
382 if (!i2c_dev) { 382 if (!i2c_dev)
383 dev_err(&pdev->dev, "device memory allocation failed\n");
384 return -ENOMEM; 383 return -ENOMEM;
385 }
386 384
387 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 385 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
388 i2c_dev->base = devm_ioremap_resource(&pdev->dev, res); 386 i2c_dev->base = devm_ioremap_resource(&pdev->dev, res);
@@ -454,7 +452,7 @@ static int wmt_i2c_remove(struct platform_device *pdev)
454 return 0; 452 return 0;
455} 453}
456 454
457static struct of_device_id wmt_i2c_dt_ids[] = { 455static const struct of_device_id wmt_i2c_dt_ids[] = {
458 { .compatible = "wm,wm8505-i2c" }, 456 { .compatible = "wm,wm8505-i2c" },
459 { /* Sentinel */ }, 457 { /* Sentinel */ },
460}; 458};
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index cb66f9586f76..ff3f5747e43b 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -431,10 +431,8 @@ static struct scx200_acb_iface *scx200_create_iface(const char *text,
431 struct i2c_adapter *adapter; 431 struct i2c_adapter *adapter;
432 432
433 iface = kzalloc(sizeof(*iface), GFP_KERNEL); 433 iface = kzalloc(sizeof(*iface), GFP_KERNEL);
434 if (!iface) { 434 if (!iface)
435 pr_err("can't allocate memory\n");
436 return NULL; 435 return NULL;
437 }
438 436
439 adapter = &iface->adapter; 437 adapter = &iface->adapter;
440 i2c_set_adapdata(adapter, iface); 438 i2c_set_adapdata(adapter, iface);
diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig
index f7f9865b8b89..f6d313e528de 100644
--- a/drivers/i2c/muxes/Kconfig
+++ b/drivers/i2c/muxes/Kconfig
@@ -40,6 +40,7 @@ config I2C_MUX_PCA9541
40 40
41config I2C_MUX_PCA954x 41config I2C_MUX_PCA954x
42 tristate "Philips PCA954x I2C Mux/switches" 42 tristate "Philips PCA954x I2C Mux/switches"
43 depends on GPIOLIB
43 help 44 help
44 If you say yes here you get support for the Philips PCA954x 45 If you say yes here you get support for the Philips PCA954x
45 I2C mux/switch devices. 46 I2C mux/switch devices.
diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 550bd36aa5d6..9bd4212782ab 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -36,12 +36,11 @@
36 */ 36 */
37 37
38#include <linux/device.h> 38#include <linux/device.h>
39#include <linux/gpio.h> 39#include <linux/gpio/consumer.h>
40#include <linux/i2c.h> 40#include <linux/i2c.h>
41#include <linux/i2c-mux.h> 41#include <linux/i2c-mux.h>
42#include <linux/i2c/pca954x.h> 42#include <linux/i2c/pca954x.h>
43#include <linux/module.h> 43#include <linux/module.h>
44#include <linux/of_gpio.h>
45#include <linux/slab.h> 44#include <linux/slab.h>
46 45
47#define PCA954X_MAX_NCHANS 8 46#define PCA954X_MAX_NCHANS 8
@@ -186,7 +185,7 @@ static int pca954x_probe(struct i2c_client *client,
186{ 185{
187 struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); 186 struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
188 struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); 187 struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
189 struct device_node *np = client->dev.of_node; 188 struct gpio_desc *gpio;
190 int num, force, class; 189 int num, force, class;
191 struct pca954x *data; 190 struct pca954x *data;
192 int ret; 191 int ret;
@@ -200,21 +199,10 @@ static int pca954x_probe(struct i2c_client *client,
200 199
201 i2c_set_clientdata(client, data); 200 i2c_set_clientdata(client, data);
202 201
203 if (IS_ENABLED(CONFIG_OF) && np) { 202 /* Get the mux out of reset if a reset GPIO is specified. */
204 enum of_gpio_flags flags; 203 gpio = devm_gpiod_get(&client->dev, "reset");
205 int gpio; 204 if (!IS_ERR(gpio))
206 205 gpiod_direction_output(gpio, 0);
207 /* Get the mux out of reset if a reset GPIO is specified. */
208 gpio = of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
209 if (gpio_is_valid(gpio)) {
210 ret = devm_gpio_request_one(&client->dev, gpio,
211 flags & OF_GPIO_ACTIVE_LOW ?
212 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
213 "pca954x reset");
214 if (ret < 0)
215 return ret;
216 }
217 }
218 206
219 /* Write the mux register at addr to verify 207 /* Write the mux register at addr to verify
220 * that the mux is in fact present. This also 208 * that the mux is in fact present. This also
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-05 22:39:40 -0400