i2c: bfin-twi: remove unnecessary Blackfin SSYNC from the driver

Put necessary SSYNC code into blackfin twi arch header. The generic TWI
driver should not contain any architecture specific code.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>

1 files changed, 0 insertions, 14 deletions

diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index c8976a3e03df..e6d5162b6379 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -65,7 +65,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
                 /* Transmit next data */
                 while (iface->writeNum > 0 &&
                         (read_FIFO_STAT(iface) & XMTSTAT) != XMT_FULL) {
-                        SSYNC();
                         write_XMT_DATA8(iface, *(iface->transPtr++));
                         iface->writeNum--;
                 }
@@ -248,7 +247,6 @@ static irqreturn_t bfin_twi_interrupt_entry(int irq, void *dev_id)
                 /* Clear interrupt status */
                 write_INT_STAT(iface, twi_int_status);
                 bfin_twi_handle_interrupt(iface, twi_int_status);
-                SSYNC();
         }
         spin_unlock_irqrestore(&iface->lock, flags);
         return IRQ_HANDLED;
@@ -294,9 +292,7 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
          *  discarded before start a new operation.
          */
         write_FIFO_CTL(iface, 0x3);
-        SSYNC();
         write_FIFO_CTL(iface, 0);
-        SSYNC();
 
         if (pmsg->flags & I2C_M_RD)
                 iface->read_write = I2C_SMBUS_READ;
@@ -306,7 +302,6 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
                 if (iface->writeNum > 0) {
                         write_XMT_DATA8(iface, *(iface->transPtr++));
                         iface->writeNum--;
-                        SSYNC();
                 }
         }
 
@@ -315,7 +310,6 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
 
         /* Interrupt mask . Enable XMT, RCV interrupt */
         write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV);
-        SSYNC();
 
         if (pmsg->len <= 255)
                 write_MASTER_CTL(iface, pmsg->len << 6);
@@ -329,7 +323,6 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
                 (iface->msg_num > 1 ? RSTART : 0) |
                 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) |
                 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0));
-        SSYNC();
 
         while (!iface->result) {
                 if (!wait_for_completion_timeout(&iface->complete,
@@ -453,7 +446,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
          * start a new operation.
          */
         write_FIFO_CTL(iface, 0x3);
-        SSYNC();
         write_FIFO_CTL(iface, 0);
 
         /* clear int stat */
@@ -461,7 +453,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
 
         /* Set Transmit device address */
         write_MASTER_ADDR(iface, addr);
-        SSYNC();
 
         switch (iface->cur_mode) {
         case TWI_I2C_MODE_STANDARDSUB:
@@ -469,7 +460,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
                 write_INT_MASK(iface, MCOMP | MERR |
                         ((iface->read_write == I2C_SMBUS_READ) ?
                         RCVSERV : XMTSERV));
-                SSYNC();
 
                 if (iface->writeNum + 1 <= 255)
                         write_MASTER_CTL(iface, (iface->writeNum + 1) << 6);
@@ -484,7 +474,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
         case TWI_I2C_MODE_COMBINED:
                 write_XMT_DATA8(iface, iface->command);
                 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV);
-                SSYNC();
 
                 if (iface->writeNum > 0)
                         write_MASTER_CTL(iface, (iface->writeNum + 1) << 6);
@@ -531,7 +520,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
                 write_INT_MASK(iface, MCOMP | MERR |
                         ((iface->read_write == I2C_SMBUS_READ) ?
                         RCVSERV : XMTSERV));
-                SSYNC();
 
                 /* Master enable */
                 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN |
@@ -539,7 +527,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
                         ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0));
                 break;
         }
-        SSYNC();
 
         while (!iface->result) {
                 if (!wait_for_completion_timeout(&iface->complete,
@@ -704,7 +691,6 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
 
         /* Enable TWI */
         write_CONTROL(iface, read_CONTROL(iface) | TWI_ENA);
-        SSYNC();
 
         rc = i2c_add_numbered_adapter(p_adap);
         if (rc < 0) {