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-rw-r--r--arch/blackfin/include/asm/bfin_twi.h23
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c14
2 files changed, 21 insertions, 16 deletions
diff --git a/arch/blackfin/include/asm/bfin_twi.h b/arch/blackfin/include/asm/bfin_twi.h
index 34cc395f8b77..aaa0834d34aa 100644
--- a/arch/blackfin/include/asm/bfin_twi.h
+++ b/arch/blackfin/include/asm/bfin_twi.h
@@ -18,7 +18,6 @@ static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \
18 { bfin_write16(&iface->regs_base->reg, v); } 18 { bfin_write16(&iface->regs_base->reg, v); }
19 19
20DEFINE_TWI_REG(CLKDIV, clkdiv) 20DEFINE_TWI_REG(CLKDIV, clkdiv)
21DEFINE_TWI_REG(CONTROL, control)
22DEFINE_TWI_REG(SLAVE_CTL, slave_ctl) 21DEFINE_TWI_REG(SLAVE_CTL, slave_ctl)
23DEFINE_TWI_REG(SLAVE_STAT, slave_stat) 22DEFINE_TWI_REG(SLAVE_STAT, slave_stat)
24DEFINE_TWI_REG(SLAVE_ADDR, slave_addr) 23DEFINE_TWI_REG(SLAVE_ADDR, slave_addr)
@@ -27,7 +26,6 @@ DEFINE_TWI_REG(MASTER_STAT, master_stat)
27DEFINE_TWI_REG(MASTER_ADDR, master_addr) 26DEFINE_TWI_REG(MASTER_ADDR, master_addr)
28DEFINE_TWI_REG(INT_STAT, int_stat) 27DEFINE_TWI_REG(INT_STAT, int_stat)
29DEFINE_TWI_REG(INT_MASK, int_mask) 28DEFINE_TWI_REG(INT_MASK, int_mask)
30DEFINE_TWI_REG(FIFO_CTL, fifo_ctl)
31DEFINE_TWI_REG(FIFO_STAT, fifo_stat) 29DEFINE_TWI_REG(FIFO_STAT, fifo_stat)
32DEFINE_TWI_REG(XMT_DATA8, xmt_data8) 30DEFINE_TWI_REG(XMT_DATA8, xmt_data8)
33DEFINE_TWI_REG(XMT_DATA16, xmt_data16) 31DEFINE_TWI_REG(XMT_DATA16, xmt_data16)
@@ -60,4 +58,25 @@ static inline u16 read_RCV_DATA16(struct bfin_twi_iface *iface)
60} 58}
61#endif 59#endif
62 60
61static inline u16 read_FIFO_CTL(struct bfin_twi_iface *iface)
62{
63 return bfin_read16(&iface->regs_base->fifo_ctl);
64}
65
66static inline void write_FIFO_CTL(struct bfin_twi_iface *iface, u16 v)
67{
68 bfin_write16(&iface->regs_base->fifo_ctl, v);
69 SSYNC();
70}
71
72static inline u16 read_CONTROL(struct bfin_twi_iface *iface)
73{
74 return bfin_read16(&iface->regs_base->control);
75}
76
77static inline void write_CONTROL(struct bfin_twi_iface *iface, u16 v)
78{
79 SSYNC();
80 bfin_write16(&iface->regs_base->control, v);
81}
63#endif 82#endif
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index c8976a3e03df..e6d5162b6379 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -65,7 +65,6 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
65 /* Transmit next data */ 65 /* Transmit next data */
66 while (iface->writeNum > 0 && 66 while (iface->writeNum > 0 &&
67 (read_FIFO_STAT(iface) & XMTSTAT) != XMT_FULL) { 67 (read_FIFO_STAT(iface) & XMTSTAT) != XMT_FULL) {
68 SSYNC();
69 write_XMT_DATA8(iface, *(iface->transPtr++)); 68 write_XMT_DATA8(iface, *(iface->transPtr++));
70 iface->writeNum--; 69 iface->writeNum--;
71 } 70 }
@@ -248,7 +247,6 @@ static irqreturn_t bfin_twi_interrupt_entry(int irq, void *dev_id)
248 /* Clear interrupt status */ 247 /* Clear interrupt status */
249 write_INT_STAT(iface, twi_int_status); 248 write_INT_STAT(iface, twi_int_status);
250 bfin_twi_handle_interrupt(iface, twi_int_status); 249 bfin_twi_handle_interrupt(iface, twi_int_status);
251 SSYNC();
252 } 250 }
253 spin_unlock_irqrestore(&iface->lock, flags); 251 spin_unlock_irqrestore(&iface->lock, flags);
254 return IRQ_HANDLED; 252 return IRQ_HANDLED;
@@ -294,9 +292,7 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
294 * discarded before start a new operation. 292 * discarded before start a new operation.
295 */ 293 */
296 write_FIFO_CTL(iface, 0x3); 294 write_FIFO_CTL(iface, 0x3);
297 SSYNC();
298 write_FIFO_CTL(iface, 0); 295 write_FIFO_CTL(iface, 0);
299 SSYNC();
300 296
301 if (pmsg->flags & I2C_M_RD) 297 if (pmsg->flags & I2C_M_RD)
302 iface->read_write = I2C_SMBUS_READ; 298 iface->read_write = I2C_SMBUS_READ;
@@ -306,7 +302,6 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
306 if (iface->writeNum > 0) { 302 if (iface->writeNum > 0) {
307 write_XMT_DATA8(iface, *(iface->transPtr++)); 303 write_XMT_DATA8(iface, *(iface->transPtr++));
308 iface->writeNum--; 304 iface->writeNum--;
309 SSYNC();
310 } 305 }
311 } 306 }
312 307
@@ -315,7 +310,6 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
315 310
316 /* Interrupt mask . Enable XMT, RCV interrupt */ 311 /* Interrupt mask . Enable XMT, RCV interrupt */
317 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV); 312 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV);
318 SSYNC();
319 313
320 if (pmsg->len <= 255) 314 if (pmsg->len <= 255)
321 write_MASTER_CTL(iface, pmsg->len << 6); 315 write_MASTER_CTL(iface, pmsg->len << 6);
@@ -329,7 +323,6 @@ static int bfin_twi_do_master_xfer(struct i2c_adapter *adap,
329 (iface->msg_num > 1 ? RSTART : 0) | 323 (iface->msg_num > 1 ? RSTART : 0) |
330 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) | 324 ((iface->read_write == I2C_SMBUS_READ) ? MDIR : 0) |
331 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0)); 325 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0));
332 SSYNC();
333 326
334 while (!iface->result) { 327 while (!iface->result) {
335 if (!wait_for_completion_timeout(&iface->complete, 328 if (!wait_for_completion_timeout(&iface->complete,
@@ -453,7 +446,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
453 * start a new operation. 446 * start a new operation.
454 */ 447 */
455 write_FIFO_CTL(iface, 0x3); 448 write_FIFO_CTL(iface, 0x3);
456 SSYNC();
457 write_FIFO_CTL(iface, 0); 449 write_FIFO_CTL(iface, 0);
458 450
459 /* clear int stat */ 451 /* clear int stat */
@@ -461,7 +453,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
461 453
462 /* Set Transmit device address */ 454 /* Set Transmit device address */
463 write_MASTER_ADDR(iface, addr); 455 write_MASTER_ADDR(iface, addr);
464 SSYNC();
465 456
466 switch (iface->cur_mode) { 457 switch (iface->cur_mode) {
467 case TWI_I2C_MODE_STANDARDSUB: 458 case TWI_I2C_MODE_STANDARDSUB:
@@ -469,7 +460,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
469 write_INT_MASK(iface, MCOMP | MERR | 460 write_INT_MASK(iface, MCOMP | MERR |
470 ((iface->read_write == I2C_SMBUS_READ) ? 461 ((iface->read_write == I2C_SMBUS_READ) ?
471 RCVSERV : XMTSERV)); 462 RCVSERV : XMTSERV));
472 SSYNC();
473 463
474 if (iface->writeNum + 1 <= 255) 464 if (iface->writeNum + 1 <= 255)
475 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6); 465 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6);
@@ -484,7 +474,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
484 case TWI_I2C_MODE_COMBINED: 474 case TWI_I2C_MODE_COMBINED:
485 write_XMT_DATA8(iface, iface->command); 475 write_XMT_DATA8(iface, iface->command);
486 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV); 476 write_INT_MASK(iface, MCOMP | MERR | RCVSERV | XMTSERV);
487 SSYNC();
488 477
489 if (iface->writeNum > 0) 478 if (iface->writeNum > 0)
490 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6); 479 write_MASTER_CTL(iface, (iface->writeNum + 1) << 6);
@@ -531,7 +520,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
531 write_INT_MASK(iface, MCOMP | MERR | 520 write_INT_MASK(iface, MCOMP | MERR |
532 ((iface->read_write == I2C_SMBUS_READ) ? 521 ((iface->read_write == I2C_SMBUS_READ) ?
533 RCVSERV : XMTSERV)); 522 RCVSERV : XMTSERV));
534 SSYNC();
535 523
536 /* Master enable */ 524 /* Master enable */
537 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN | 525 write_MASTER_CTL(iface, read_MASTER_CTL(iface) | MEN |
@@ -539,7 +527,6 @@ int bfin_twi_do_smbus_xfer(struct i2c_adapter *adap, u16 addr,
539 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0)); 527 ((CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ > 100) ? FAST : 0));
540 break; 528 break;
541 } 529 }
542 SSYNC();
543 530
544 while (!iface->result) { 531 while (!iface->result) {
545 if (!wait_for_completion_timeout(&iface->complete, 532 if (!wait_for_completion_timeout(&iface->complete,
@@ -704,7 +691,6 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
704 691
705 /* Enable TWI */ 692 /* Enable TWI */
706 write_CONTROL(iface, read_CONTROL(iface) | TWI_ENA); 693 write_CONTROL(iface, read_CONTROL(iface) | TWI_ENA);
707 SSYNC();
708 694
709 rc = i2c_add_numbered_adapter(p_adap); 695 rc = i2c_add_numbered_adapter(p_adap);
710 if (rc < 0) { 696 if (rc < 0) {