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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/i2c
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'drivers/i2c')
-rw-r--r--drivers/i2c/Makefile5
-rw-r--r--drivers/i2c/algos/Kconfig2
-rw-r--r--drivers/i2c/algos/Makefile4
-rw-r--r--drivers/i2c/algos/i2c-algo-bit.c51
-rw-r--r--drivers/i2c/algos/i2c-algo-pca.c2
-rw-r--r--drivers/i2c/busses/Kconfig82
-rw-r--r--drivers/i2c/busses/Makefile11
-rw-r--r--drivers/i2c/busses/i2c-ali1535.c2
-rw-r--r--drivers/i2c/busses/i2c-ali15x3.c2
-rw-r--r--drivers/i2c/busses/i2c-amd8111.c163
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c32
-rw-r--r--drivers/i2c/busses/i2c-cpm.c9
-rw-r--r--drivers/i2c/busses/i2c-davinci.c2
-rw-r--r--drivers/i2c/busses/i2c-designware.c2
-rw-r--r--drivers/i2c/busses/i2c-diolan-u2c.c535
-rw-r--r--drivers/i2c/busses/i2c-eg20t.c940
-rw-r--r--drivers/i2c/busses/i2c-elektor.c2
-rw-r--r--drivers/i2c/busses/i2c-gpio.c2
-rw-r--r--drivers/i2c/busses/i2c-i801.c411
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c14
-rw-r--r--drivers/i2c/busses/i2c-intel-mid.c1135
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.c6
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.h2
-rw-r--r--drivers/i2c/busses/i2c-isch.c2
-rw-r--r--drivers/i2c/busses/i2c-mpc.c21
-rw-r--r--drivers/i2c/busses/i2c-mv64xxx.c45
-rw-r--r--drivers/i2c/busses/i2c-mxs.c412
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c2
-rw-r--r--drivers/i2c/busses/i2c-nomadik.c302
-rw-r--r--drivers/i2c/busses/i2c-nuc900.c1
-rw-r--r--drivers/i2c/busses/i2c-ocores.c137
-rw-r--r--drivers/i2c/busses/i2c-omap.c122
-rw-r--r--drivers/i2c/busses/i2c-parport-light.c10
-rw-r--r--drivers/i2c/busses/i2c-parport.c57
-rw-r--r--drivers/i2c/busses/i2c-parport.h74
-rw-r--r--drivers/i2c/busses/i2c-pasemi.c2
-rw-r--r--drivers/i2c/busses/i2c-pca-platform.c2
-rw-r--r--drivers/i2c/busses/i2c-pnx.c2
-rw-r--r--drivers/i2c/busses/i2c-puv3.c306
-rw-r--r--drivers/i2c/busses/i2c-pxa-pci.c176
-rw-r--r--drivers/i2c/busses/i2c-pxa.c116
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c18
-rw-r--r--drivers/i2c/busses/i2c-s6000.c2
-rw-r--r--drivers/i2c/busses/i2c-sh7760.c4
-rw-r--r--drivers/i2c/busses/i2c-sh_mobile.c43
-rw-r--r--drivers/i2c/busses/i2c-stu300.c6
-rw-r--r--drivers/i2c/busses/i2c-taos-evm.c8
-rw-r--r--drivers/i2c/busses/i2c-tegra.c735
-rw-r--r--drivers/i2c/busses/i2c-viapro.c8
-rw-r--r--drivers/i2c/busses/i2c-xiic.c2
-rw-r--r--drivers/i2c/busses/scx200_acb.c199
-rw-r--r--drivers/i2c/i2c-boardinfo.c2
-rw-r--r--drivers/i2c/i2c-core.c210
-rw-r--r--drivers/i2c/i2c-dev.c73
-rw-r--r--drivers/i2c/i2c-mux.c1
-rw-r--r--drivers/i2c/muxes/Kconfig22
-rw-r--r--drivers/i2c/muxes/Makefile6
-rw-r--r--drivers/i2c/muxes/gpio-i2cmux.c184
-rw-r--r--drivers/i2c/muxes/pca9541.c411
-rw-r--r--drivers/i2c/muxes/pca954x.c15
60 files changed, 6257 insertions, 897 deletions
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index c00fd66388f5..beee6b2d361d 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -9,6 +9,5 @@ obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
9obj-$(CONFIG_I2C_MUX) += i2c-mux.o 9obj-$(CONFIG_I2C_MUX) += i2c-mux.o
10obj-y += algos/ busses/ muxes/ 10obj-y += algos/ busses/ muxes/
11 11
12ifeq ($(CONFIG_I2C_DEBUG_CORE),y) 12ccflags-$(CONFIG_I2C_DEBUG_CORE) := -DDEBUG
13EXTRA_CFLAGS += -DDEBUG 13CFLAGS_i2c-core.o := -Wno-deprecated-declarations
14endif
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
index 7b2ce4a08524..f1cfe7e5508b 100644
--- a/drivers/i2c/algos/Kconfig
+++ b/drivers/i2c/algos/Kconfig
@@ -3,7 +3,7 @@
3# 3#
4 4
5menu "I2C Algorithms" 5menu "I2C Algorithms"
6 depends on !I2C_HELPER_AUTO 6 visible if !I2C_HELPER_AUTO
7 7
8config I2C_ALGOBIT 8config I2C_ALGOBIT
9 tristate "I2C bit-banging interfaces" 9 tristate "I2C bit-banging interfaces"
diff --git a/drivers/i2c/algos/Makefile b/drivers/i2c/algos/Makefile
index 18b3e962ec09..215303f60d61 100644
--- a/drivers/i2c/algos/Makefile
+++ b/drivers/i2c/algos/Makefile
@@ -6,6 +6,4 @@ obj-$(CONFIG_I2C_ALGOBIT) += i2c-algo-bit.o
6obj-$(CONFIG_I2C_ALGOPCF) += i2c-algo-pcf.o 6obj-$(CONFIG_I2C_ALGOPCF) += i2c-algo-pcf.o
7obj-$(CONFIG_I2C_ALGOPCA) += i2c-algo-pca.o 7obj-$(CONFIG_I2C_ALGOPCA) += i2c-algo-pca.o
8 8
9ifeq ($(CONFIG_I2C_DEBUG_ALGO),y) 9ccflags-$(CONFIG_I2C_DEBUG_ALGO) := -DDEBUG
10EXTRA_CFLAGS += -DDEBUG
11endif
diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
index a39e6cff86e7..d6d58684712b 100644
--- a/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -232,9 +232,17 @@ static int i2c_inb(struct i2c_adapter *i2c_adap)
232 * Sanity check for the adapter hardware - check the reaction of 232 * Sanity check for the adapter hardware - check the reaction of
233 * the bus lines only if it seems to be idle. 233 * the bus lines only if it seems to be idle.
234 */ 234 */
235static int test_bus(struct i2c_algo_bit_data *adap, char *name) 235static int test_bus(struct i2c_adapter *i2c_adap)
236{ 236{
237 int scl, sda; 237 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
238 const char *name = i2c_adap->name;
239 int scl, sda, ret;
240
241 if (adap->pre_xfer) {
242 ret = adap->pre_xfer(i2c_adap);
243 if (ret < 0)
244 return -ENODEV;
245 }
238 246
239 if (adap->getscl == NULL) 247 if (adap->getscl == NULL)
240 pr_info("%s: Testing SDA only, SCL is not readable\n", name); 248 pr_info("%s: Testing SDA only, SCL is not readable\n", name);
@@ -297,11 +305,19 @@ static int test_bus(struct i2c_algo_bit_data *adap, char *name)
297 "while pulling SCL high!\n", name); 305 "while pulling SCL high!\n", name);
298 goto bailout; 306 goto bailout;
299 } 307 }
308
309 if (adap->post_xfer)
310 adap->post_xfer(i2c_adap);
311
300 pr_info("%s: Test OK\n", name); 312 pr_info("%s: Test OK\n", name);
301 return 0; 313 return 0;
302bailout: 314bailout:
303 sdahi(adap); 315 sdahi(adap);
304 sclhi(adap); 316 sclhi(adap);
317
318 if (adap->post_xfer)
319 adap->post_xfer(i2c_adap);
320
305 return -ENODEV; 321 return -ENODEV;
306} 322}
307 323
@@ -600,12 +616,14 @@ static const struct i2c_algorithm i2c_bit_algo = {
600/* 616/*
601 * registering functions to load algorithms at runtime 617 * registering functions to load algorithms at runtime
602 */ 618 */
603static int i2c_bit_prepare_bus(struct i2c_adapter *adap) 619static int __i2c_bit_add_bus(struct i2c_adapter *adap,
620 int (*add_adapter)(struct i2c_adapter *))
604{ 621{
605 struct i2c_algo_bit_data *bit_adap = adap->algo_data; 622 struct i2c_algo_bit_data *bit_adap = adap->algo_data;
623 int ret;
606 624
607 if (bit_test) { 625 if (bit_test) {
608 int ret = test_bus(bit_adap, adap->name); 626 ret = test_bus(adap);
609 if (ret < 0) 627 if (ret < 0)
610 return -ENODEV; 628 return -ENODEV;
611 } 629 }
@@ -614,30 +632,27 @@ static int i2c_bit_prepare_bus(struct i2c_adapter *adap)
614 adap->algo = &i2c_bit_algo; 632 adap->algo = &i2c_bit_algo;
615 adap->retries = 3; 633 adap->retries = 3;
616 634
635 ret = add_adapter(adap);
636 if (ret < 0)
637 return ret;
638
639 /* Complain if SCL can't be read */
640 if (bit_adap->getscl == NULL) {
641 dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
642 dev_warn(&adap->dev, "Bus may be unreliable\n");
643 }
617 return 0; 644 return 0;
618} 645}
619 646
620int i2c_bit_add_bus(struct i2c_adapter *adap) 647int i2c_bit_add_bus(struct i2c_adapter *adap)
621{ 648{
622 int err; 649 return __i2c_bit_add_bus(adap, i2c_add_adapter);
623
624 err = i2c_bit_prepare_bus(adap);
625 if (err)
626 return err;
627
628 return i2c_add_adapter(adap);
629} 650}
630EXPORT_SYMBOL(i2c_bit_add_bus); 651EXPORT_SYMBOL(i2c_bit_add_bus);
631 652
632int i2c_bit_add_numbered_bus(struct i2c_adapter *adap) 653int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
633{ 654{
634 int err; 655 return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
635
636 err = i2c_bit_prepare_bus(adap);
637 if (err)
638 return err;
639
640 return i2c_add_numbered_adapter(adap);
641} 656}
642EXPORT_SYMBOL(i2c_bit_add_numbered_bus); 657EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
643 658
diff --git a/drivers/i2c/algos/i2c-algo-pca.c b/drivers/i2c/algos/i2c-algo-pca.c
index 2b9a8f54bb2c..4ca9cf9cde73 100644
--- a/drivers/i2c/algos/i2c-algo-pca.c
+++ b/drivers/i2c/algos/i2c-algo-pca.c
@@ -343,7 +343,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap,
343 343
344 ret = curmsg; 344 ret = curmsg;
345 out: 345 out:
346 DEB1("}}} transfered %d/%d messages. " 346 DEB1("}}} transferred %d/%d messages. "
347 "status is %#04x. control is %#04x\n", 347 "status is %#04x. control is %#04x\n",
348 curmsg, num, pca_status(adap), 348 curmsg, num, pca_status(adap),
349 pca_get_con(adap)); 349 pca_get_con(adap));
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 6539ac2907e9..646068e5100b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -79,6 +79,7 @@ config I2C_AMD8111
79config I2C_I801 79config I2C_I801
80 tristate "Intel 82801 (ICH/PCH)" 80 tristate "Intel 82801 (ICH/PCH)"
81 depends on PCI 81 depends on PCI
82 select CHECK_SIGNATURE if X86 && DMI
82 help 83 help
83 If you say yes to this option, support will be included for the Intel 84 If you say yes to this option, support will be included for the Intel
84 801 family of mainboard I2C interfaces. Specifically, the following 85 801 family of mainboard I2C interfaces. Specifically, the following
@@ -95,10 +96,13 @@ config I2C_I801
95 ESB2 96 ESB2
96 ICH8 97 ICH8
97 ICH9 98 ICH9
98 Tolapai 99 EP80579 (Tolapai)
99 ICH10 100 ICH10
100 3400/5 Series (PCH) 101 5/3400 Series (PCH)
101 Cougar Point (PCH) 102 6 Series (PCH)
103 Patsburg (PCH)
104 DH89xxCC (PCH)
105 Panther Point (PCH)
102 106
103 This driver can also be built as a module. If so, the module 107 This driver can also be built as a module. If so, the module
104 will be called i2c-i801. 108 will be called i2c-i801.
@@ -396,6 +400,16 @@ config I2C_IMX
396 This driver can also be built as a module. If so, the module 400 This driver can also be built as a module. If so, the module
397 will be called i2c-imx. 401 will be called i2c-imx.
398 402
403config I2C_INTEL_MID
404 tristate "Intel Moorestown/Medfield Platform I2C controller"
405 depends on PCI
406 help
407 Say Y here if you have an Intel Moorestown/Medfield platform I2C
408 controller.
409
410 This support is also available as a module. If so, the module
411 will be called i2c-intel-mid.
412
399config I2C_IOP3XX 413config I2C_IOP3XX
400 tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface" 414 tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface"
401 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX || ARCH_IOP13XX 415 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX || ARCH_IOP13XX
@@ -422,7 +436,7 @@ config I2C_IXP2000
422 436
423config I2C_MPC 437config I2C_MPC
424 tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx" 438 tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
425 depends on PPC32 439 depends on PPC
426 help 440 help
427 If you say yes to this option, support will be included for the 441 If you say yes to this option, support will be included for the
428 built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx, 442 built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
@@ -441,6 +455,16 @@ config I2C_MV64XXX
441 This driver can also be built as a module. If so, the module 455 This driver can also be built as a module. If so, the module
442 will be called i2c-mv64xxx. 456 will be called i2c-mv64xxx.
443 457
458config I2C_MXS
459 tristate "Freescale i.MX28 I2C interface"
460 depends on SOC_IMX28
461 help
462 Say Y here if you want to use the I2C bus controller on
463 the Freescale i.MX28 processors.
464
465 This driver can also be built as a module. If so, the module
466 will be called i2c-mxs.
467
444config I2C_NOMADIK 468config I2C_NOMADIK
445 tristate "ST-Ericsson Nomadik/Ux500 I2C Controller" 469 tristate "ST-Ericsson Nomadik/Ux500 I2C Controller"
446 depends on PLAT_NOMADIK 470 depends on PLAT_NOMADIK
@@ -512,17 +536,31 @@ config I2C_PNX
512 This driver can also be built as a module. If so, the module 536 This driver can also be built as a module. If so, the module
513 will be called i2c-pnx. 537 will be called i2c-pnx.
514 538
539config I2C_PUV3
540 tristate "PKUnity v3 I2C bus support"
541 depends on UNICORE32 && ARCH_PUV3
542 select I2C_ALGOBIT
543 help
544 This driver supports the I2C IP inside the PKUnity-v3 SoC.
545 This I2C bus controller is under AMBA/AXI bus.
546
547 This driver can also be built as a module. If so, the module
548 will be called i2c-puv3.
549
515config I2C_PXA 550config I2C_PXA
516 tristate "Intel PXA2XX I2C adapter" 551 tristate "Intel PXA2XX I2C adapter"
517 depends on ARCH_PXA || ARCH_MMP 552 depends on ARCH_PXA || ARCH_MMP || (X86_32 && PCI && OF)
518 help 553 help
519 If you have devices in the PXA I2C bus, say yes to this option. 554 If you have devices in the PXA I2C bus, say yes to this option.
520 This driver can also be built as a module. If so, the module 555 This driver can also be built as a module. If so, the module
521 will be called i2c-pxa. 556 will be called i2c-pxa.
522 557
558config I2C_PXA_PCI
559 def_bool I2C_PXA && X86_32 && PCI && OF
560
523config I2C_PXA_SLAVE 561config I2C_PXA_SLAVE
524 bool "Intel PXA2XX I2C Slave comms support" 562 bool "Intel PXA2XX I2C Slave comms support"
525 depends on I2C_PXA 563 depends on I2C_PXA && !X86_32
526 help 564 help
527 Support I2C slave mode communications on the PXA I2C bus. This 565 Support I2C slave mode communications on the PXA I2C bus. This
528 is necessary for systems where the PXA may be a target on the 566 is necessary for systems where the PXA may be a target on the
@@ -596,6 +634,13 @@ config I2C_STU300
596 This driver can also be built as a module. If so, the module 634 This driver can also be built as a module. If so, the module
597 will be called i2c-stu300. 635 will be called i2c-stu300.
598 636
637config I2C_TEGRA
638 tristate "NVIDIA Tegra internal I2C controller"
639 depends on ARCH_TEGRA
640 help
641 If you say yes to this option, support will be included for the
642 I2C controller embedded in NVIDIA Tegra SOCs
643
599config I2C_VERSATILE 644config I2C_VERSATILE
600 tristate "ARM Versatile/Realview I2C bus support" 645 tristate "ARM Versatile/Realview I2C bus support"
601 depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS 646 depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS
@@ -627,8 +672,33 @@ config I2C_XILINX
627 This driver can also be built as a module. If so, the module 672 This driver can also be built as a module. If so, the module
628 will be called xilinx_i2c. 673 will be called xilinx_i2c.
629 674
675config I2C_EG20T
676 tristate "Intel EG20T PCH / OKI SEMICONDUCTOR IOH(ML7213/ML7223)"
677 depends on PCI
678 help
679 This driver is for PCH(Platform controller Hub) I2C of EG20T which
680 is an IOH(Input/Output Hub) for x86 embedded processor.
681 This driver can access PCH I2C bus device.
682
683 This driver also can be used for OKI SEMICONDUCTOR IOH(Input/
684 Output Hub), ML7213 and ML7223.
685 ML7213 IOH is for IVI(In-Vehicle Infotainment) use and ML7223 IOH is
686 for MP(Media Phone) use.
687 ML7213/ML7223 is companion chip for Intel Atom E6xx series.
688 ML7213/ML7223 is completely compatible for Intel EG20T PCH.
689
630comment "External I2C/SMBus adapter drivers" 690comment "External I2C/SMBus adapter drivers"
631 691
692config I2C_DIOLAN_U2C
693 tristate "Diolan U2C-12 USB adapter"
694 depends on USB
695 help
696 If you say yes to this option, support will be included for Diolan
697 U2C-12, a USB to I2C interface.
698
699 This driver can also be built as a module. If so, the module
700 will be called i2c-diolan-u2c.
701
632config I2C_PARPORT 702config I2C_PARPORT
633 tristate "Parallel port adapter" 703 tristate "Parallel port adapter"
634 depends on PARPORT 704 depends on PARPORT
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index c3ef49230cba..e6cf294d3729 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -38,10 +38,12 @@ obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
38obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o 38obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o
39obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o 39obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
40obj-$(CONFIG_I2C_IMX) += i2c-imx.o 40obj-$(CONFIG_I2C_IMX) += i2c-imx.o
41obj-$(CONFIG_I2C_INTEL_MID) += i2c-intel-mid.o
41obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o 42obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
42obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 43obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
43obj-$(CONFIG_I2C_MPC) += i2c-mpc.o 44obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
44obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o 45obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
46obj-$(CONFIG_I2C_MXS) += i2c-mxs.o
45obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o 47obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
46obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o 48obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o
47obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o 49obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
@@ -50,18 +52,23 @@ obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
50obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o 52obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o
51obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o 53obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
52obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 54obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
55obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
53obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 56obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
57obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
54obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 58obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
55obj-$(CONFIG_I2C_S6000) += i2c-s6000.o 59obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
56obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o 60obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
57obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o 61obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
58obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o 62obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
59obj-$(CONFIG_I2C_STU300) += i2c-stu300.o 63obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
64obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o
60obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 65obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
61obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o 66obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
62obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o 67obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o
68obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o
63 69
64# External I2C/SMBus adapter drivers 70# External I2C/SMBus adapter drivers
71obj-$(CONFIG_I2C_DIOLAN_U2C) += i2c-diolan-u2c.o
65obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o 72obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
66obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o 73obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
67obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o 74obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o
@@ -76,6 +83,4 @@ obj-$(CONFIG_I2C_STUB) += i2c-stub.o
76obj-$(CONFIG_SCx200_ACB) += scx200_acb.o 83obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
77obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o 84obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
78 85
79ifeq ($(CONFIG_I2C_DEBUG_BUS),y) 86ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
80EXTRA_CFLAGS += -DDEBUG
81endif
diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c
index 906a3ca50db6..dd364171f9c5 100644
--- a/drivers/i2c/busses/i2c-ali1535.c
+++ b/drivers/i2c/busses/i2c-ali1535.c
@@ -295,7 +295,7 @@ static int ali1535_transaction(struct i2c_adapter *adap)
295 } 295 }
296 296
297 /* Unfortunately the ALI SMB controller maps "no response" and "bus 297 /* Unfortunately the ALI SMB controller maps "no response" and "bus
298 * collision" into a single bit. No reponse is the usual case so don't 298 * collision" into a single bit. No response is the usual case so don't
299 * do a printk. This means that bus collisions go unreported. 299 * do a printk. This means that bus collisions go unreported.
300 */ 300 */
301 if (temp & ALI1535_STS_BUSERR) { 301 if (temp & ALI1535_STS_BUSERR) {
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index b14f6d68221d..83e8a60cdc86 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -318,7 +318,7 @@ static int ali15x3_transaction(struct i2c_adapter *adap)
318 318
319 /* 319 /*
320 Unfortunately the ALI SMB controller maps "no response" and "bus 320 Unfortunately the ALI SMB controller maps "no response" and "bus
321 collision" into a single bit. No reponse is the usual case so don't 321 collision" into a single bit. No response is the usual case so don't
322 do a printk. 322 do a printk.
323 This means that bus collisions go unreported. 323 This means that bus collisions go unreported.
324 */ 324 */
diff --git a/drivers/i2c/busses/i2c-amd8111.c b/drivers/i2c/busses/i2c-amd8111.c
index af1e5e254b7b..6b6a6b1d7025 100644
--- a/drivers/i2c/busses/i2c-amd8111.c
+++ b/drivers/i2c/busses/i2c-amd8111.c
@@ -69,7 +69,7 @@ static struct pci_driver amd8111_driver;
69 * ACPI 2.0 chapter 13 access of registers of the EC 69 * ACPI 2.0 chapter 13 access of registers of the EC
70 */ 70 */
71 71
72static unsigned int amd_ec_wait_write(struct amd_smbus *smbus) 72static int amd_ec_wait_write(struct amd_smbus *smbus)
73{ 73{
74 int timeout = 500; 74 int timeout = 500;
75 75
@@ -85,7 +85,7 @@ static unsigned int amd_ec_wait_write(struct amd_smbus *smbus)
85 return 0; 85 return 0;
86} 86}
87 87
88static unsigned int amd_ec_wait_read(struct amd_smbus *smbus) 88static int amd_ec_wait_read(struct amd_smbus *smbus)
89{ 89{
90 int timeout = 500; 90 int timeout = 500;
91 91
@@ -101,7 +101,7 @@ static unsigned int amd_ec_wait_read(struct amd_smbus *smbus)
101 return 0; 101 return 0;
102} 102}
103 103
104static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address, 104static int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
105 unsigned char *data) 105 unsigned char *data)
106{ 106{
107 int status; 107 int status;
@@ -124,7 +124,7 @@ static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
124 return 0; 124 return 0;
125} 125}
126 126
127static unsigned int amd_ec_write(struct amd_smbus *smbus, unsigned char address, 127static int amd_ec_write(struct amd_smbus *smbus, unsigned char address,
128 unsigned char data) 128 unsigned char data)
129{ 129{
130 int status; 130 int status;
@@ -196,7 +196,7 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
196{ 196{
197 struct amd_smbus *smbus = adap->algo_data; 197 struct amd_smbus *smbus = adap->algo_data;
198 unsigned char protocol, len, pec, temp[2]; 198 unsigned char protocol, len, pec, temp[2];
199 int i; 199 int i, status;
200 200
201 protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ 201 protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ
202 : AMD_SMB_PRTCL_WRITE; 202 : AMD_SMB_PRTCL_WRITE;
@@ -209,38 +209,62 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
209 break; 209 break;
210 210
211 case I2C_SMBUS_BYTE: 211 case I2C_SMBUS_BYTE:
212 if (read_write == I2C_SMBUS_WRITE) 212 if (read_write == I2C_SMBUS_WRITE) {
213 amd_ec_write(smbus, AMD_SMB_CMD, command); 213 status = amd_ec_write(smbus, AMD_SMB_CMD,
214 command);
215 if (status)
216 return status;
217 }
214 protocol |= AMD_SMB_PRTCL_BYTE; 218 protocol |= AMD_SMB_PRTCL_BYTE;
215 break; 219 break;
216 220
217 case I2C_SMBUS_BYTE_DATA: 221 case I2C_SMBUS_BYTE_DATA:
218 amd_ec_write(smbus, AMD_SMB_CMD, command); 222 status = amd_ec_write(smbus, AMD_SMB_CMD, command);
219 if (read_write == I2C_SMBUS_WRITE) 223 if (status)
220 amd_ec_write(smbus, AMD_SMB_DATA, data->byte); 224 return status;
225 if (read_write == I2C_SMBUS_WRITE) {
226 status = amd_ec_write(smbus, AMD_SMB_DATA,
227 data->byte);
228 if (status)
229 return status;
230 }
221 protocol |= AMD_SMB_PRTCL_BYTE_DATA; 231 protocol |= AMD_SMB_PRTCL_BYTE_DATA;
222 break; 232 break;
223 233
224 case I2C_SMBUS_WORD_DATA: 234 case I2C_SMBUS_WORD_DATA:
225 amd_ec_write(smbus, AMD_SMB_CMD, command); 235 status = amd_ec_write(smbus, AMD_SMB_CMD, command);
236 if (status)
237 return status;
226 if (read_write == I2C_SMBUS_WRITE) { 238 if (read_write == I2C_SMBUS_WRITE) {
227 amd_ec_write(smbus, AMD_SMB_DATA, 239 status = amd_ec_write(smbus, AMD_SMB_DATA,
228 data->word & 0xff); 240 data->word & 0xff);
229 amd_ec_write(smbus, AMD_SMB_DATA + 1, 241 if (status)
230 data->word >> 8); 242 return status;
243 status = amd_ec_write(smbus, AMD_SMB_DATA + 1,
244 data->word >> 8);
245 if (status)
246 return status;
231 } 247 }
232 protocol |= AMD_SMB_PRTCL_WORD_DATA | pec; 248 protocol |= AMD_SMB_PRTCL_WORD_DATA | pec;
233 break; 249 break;
234 250
235 case I2C_SMBUS_BLOCK_DATA: 251 case I2C_SMBUS_BLOCK_DATA:
236 amd_ec_write(smbus, AMD_SMB_CMD, command); 252 status = amd_ec_write(smbus, AMD_SMB_CMD, command);
253 if (status)
254 return status;
237 if (read_write == I2C_SMBUS_WRITE) { 255 if (read_write == I2C_SMBUS_WRITE) {
238 len = min_t(u8, data->block[0], 256 len = min_t(u8, data->block[0],
239 I2C_SMBUS_BLOCK_MAX); 257 I2C_SMBUS_BLOCK_MAX);
240 amd_ec_write(smbus, AMD_SMB_BCNT, len); 258 status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
241 for (i = 0; i < len; i++) 259 if (status)
242 amd_ec_write(smbus, AMD_SMB_DATA + i, 260 return status;
243 data->block[i + 1]); 261 for (i = 0; i < len; i++) {
262 status =
263 amd_ec_write(smbus, AMD_SMB_DATA + i,
264 data->block[i + 1]);
265 if (status)
266 return status;
267 }
244 } 268 }
245 protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec; 269 protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec;
246 break; 270 break;
@@ -248,19 +272,35 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
248 case I2C_SMBUS_I2C_BLOCK_DATA: 272 case I2C_SMBUS_I2C_BLOCK_DATA:
249 len = min_t(u8, data->block[0], 273 len = min_t(u8, data->block[0],
250 I2C_SMBUS_BLOCK_MAX); 274 I2C_SMBUS_BLOCK_MAX);
251 amd_ec_write(smbus, AMD_SMB_CMD, command); 275 status = amd_ec_write(smbus, AMD_SMB_CMD, command);
252 amd_ec_write(smbus, AMD_SMB_BCNT, len); 276 if (status)
277 return status;
278 status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
279 if (status)
280 return status;
253 if (read_write == I2C_SMBUS_WRITE) 281 if (read_write == I2C_SMBUS_WRITE)
254 for (i = 0; i < len; i++) 282 for (i = 0; i < len; i++) {
255 amd_ec_write(smbus, AMD_SMB_DATA + i, 283 status =
256 data->block[i + 1]); 284 amd_ec_write(smbus, AMD_SMB_DATA + i,
285 data->block[i + 1]);
286 if (status)
287 return status;
288 }
257 protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA; 289 protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA;
258 break; 290 break;
259 291
260 case I2C_SMBUS_PROC_CALL: 292 case I2C_SMBUS_PROC_CALL:
261 amd_ec_write(smbus, AMD_SMB_CMD, command); 293 status = amd_ec_write(smbus, AMD_SMB_CMD, command);
262 amd_ec_write(smbus, AMD_SMB_DATA, data->word & 0xff); 294 if (status)
263 amd_ec_write(smbus, AMD_SMB_DATA + 1, data->word >> 8); 295 return status;
296 status = amd_ec_write(smbus, AMD_SMB_DATA,
297 data->word & 0xff);
298 if (status)
299 return status;
300 status = amd_ec_write(smbus, AMD_SMB_DATA + 1,
301 data->word >> 8);
302 if (status)
303 return status;
264 protocol = AMD_SMB_PRTCL_PROC_CALL | pec; 304 protocol = AMD_SMB_PRTCL_PROC_CALL | pec;
265 read_write = I2C_SMBUS_READ; 305 read_write = I2C_SMBUS_READ;
266 break; 306 break;
@@ -268,11 +308,18 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
268 case I2C_SMBUS_BLOCK_PROC_CALL: 308 case I2C_SMBUS_BLOCK_PROC_CALL:
269 len = min_t(u8, data->block[0], 309 len = min_t(u8, data->block[0],
270 I2C_SMBUS_BLOCK_MAX - 1); 310 I2C_SMBUS_BLOCK_MAX - 1);
271 amd_ec_write(smbus, AMD_SMB_CMD, command); 311 status = amd_ec_write(smbus, AMD_SMB_CMD, command);
272 amd_ec_write(smbus, AMD_SMB_BCNT, len); 312 if (status)
273 for (i = 0; i < len; i++) 313 return status;
274 amd_ec_write(smbus, AMD_SMB_DATA + i, 314 status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
275 data->block[i + 1]); 315 if (status)
316 return status;
317 for (i = 0; i < len; i++) {
318 status = amd_ec_write(smbus, AMD_SMB_DATA + i,
319 data->block[i + 1]);
320 if (status)
321 return status;
322 }
276 protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec; 323 protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec;
277 read_write = I2C_SMBUS_READ; 324 read_write = I2C_SMBUS_READ;
278 break; 325 break;
@@ -282,24 +329,29 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
282 return -EOPNOTSUPP; 329 return -EOPNOTSUPP;
283 } 330 }
284 331
285 amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1); 332 status = amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1);
286 amd_ec_write(smbus, AMD_SMB_PRTCL, protocol); 333 if (status)
334 return status;
335 status = amd_ec_write(smbus, AMD_SMB_PRTCL, protocol);
336 if (status)
337 return status;
287 338
288 /* FIXME this discards status from ec_read(); so temp[0] will 339 status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
289 * hold stack garbage ... the rest of this routine will act 340 if (status)
290 * nonsensically. Ignored ec_write() status might explain 341 return status;
291 * some such failures...
292 */
293 amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
294 342
295 if (~temp[0] & AMD_SMB_STS_DONE) { 343 if (~temp[0] & AMD_SMB_STS_DONE) {
296 udelay(500); 344 udelay(500);
297 amd_ec_read(smbus, AMD_SMB_STS, temp + 0); 345 status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
346 if (status)
347 return status;
298 } 348 }
299 349
300 if (~temp[0] & AMD_SMB_STS_DONE) { 350 if (~temp[0] & AMD_SMB_STS_DONE) {
301 msleep(1); 351 msleep(1);
302 amd_ec_read(smbus, AMD_SMB_STS, temp + 0); 352 status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
353 if (status)
354 return status;
303 } 355 }
304 356
305 if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS)) 357 if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS))
@@ -311,24 +363,35 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
311 switch (size) { 363 switch (size) {
312 case I2C_SMBUS_BYTE: 364 case I2C_SMBUS_BYTE:
313 case I2C_SMBUS_BYTE_DATA: 365 case I2C_SMBUS_BYTE_DATA:
314 amd_ec_read(smbus, AMD_SMB_DATA, &data->byte); 366 status = amd_ec_read(smbus, AMD_SMB_DATA, &data->byte);
367 if (status)
368 return status;
315 break; 369 break;
316 370
317 case I2C_SMBUS_WORD_DATA: 371 case I2C_SMBUS_WORD_DATA:
318 case I2C_SMBUS_PROC_CALL: 372 case I2C_SMBUS_PROC_CALL:
319 amd_ec_read(smbus, AMD_SMB_DATA, temp + 0); 373 status = amd_ec_read(smbus, AMD_SMB_DATA, temp + 0);
320 amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1); 374 if (status)
375 return status;
376 status = amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1);
377 if (status)
378 return status;
321 data->word = (temp[1] << 8) | temp[0]; 379 data->word = (temp[1] << 8) | temp[0];
322 break; 380 break;
323 381
324 case I2C_SMBUS_BLOCK_DATA: 382 case I2C_SMBUS_BLOCK_DATA:
325 case I2C_SMBUS_BLOCK_PROC_CALL: 383 case I2C_SMBUS_BLOCK_PROC_CALL:
326 amd_ec_read(smbus, AMD_SMB_BCNT, &len); 384 status = amd_ec_read(smbus, AMD_SMB_BCNT, &len);
385 if (status)
386 return status;
327 len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX); 387 len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX);
328 case I2C_SMBUS_I2C_BLOCK_DATA: 388 case I2C_SMBUS_I2C_BLOCK_DATA:
329 for (i = 0; i < len; i++) 389 for (i = 0; i < len; i++) {
330 amd_ec_read(smbus, AMD_SMB_DATA + i, 390 status = amd_ec_read(smbus, AMD_SMB_DATA + i,
331 data->block + i + 1); 391 data->block + i + 1);
392 if (status)
393 return status;
394 }
332 data->block[0] = len; 395 data->block[0] = len;
333 break; 396 break;
334 } 397 }
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index fb26e5c67515..cbc98aea5b09 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -20,6 +20,7 @@
20#include <linux/completion.h> 20#include <linux/completion.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/delay.h>
23 24
24#include <asm/blackfin.h> 25#include <asm/blackfin.h>
25#include <asm/portmux.h> 26#include <asm/portmux.h>
@@ -159,6 +160,27 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
159 if (mast_stat & BUFWRERR) 160 if (mast_stat & BUFWRERR)
160 dev_dbg(&iface->adap.dev, "Buffer Write Error\n"); 161 dev_dbg(&iface->adap.dev, "Buffer Write Error\n");
161 162
163 /* Faulty slave devices, may drive SDA low after a transfer
164 * finishes. To release the bus this code generates up to 9
165 * extra clocks until SDA is released.
166 */
167
168 if (read_MASTER_STAT(iface) & SDASEN) {
169 int cnt = 9;
170 do {
171 write_MASTER_CTL(iface, SCLOVR);
172 udelay(6);
173 write_MASTER_CTL(iface, 0);
174 udelay(6);
175 } while ((read_MASTER_STAT(iface) & SDASEN) && cnt--);
176
177 write_MASTER_CTL(iface, SDAOVR | SCLOVR);
178 udelay(6);
179 write_MASTER_CTL(iface, SDAOVR);
180 udelay(6);
181 write_MASTER_CTL(iface, 0);
182 }
183
162 /* If it is a quick transfer, only address without data, 184 /* If it is a quick transfer, only address without data,
163 * not an err, return 1. 185 * not an err, return 1.
164 */ 186 */
@@ -171,7 +193,13 @@ static void bfin_twi_handle_interrupt(struct bfin_twi_iface *iface,
171 return; 193 return;
172 } 194 }
173 if (twi_int_status & MCOMP) { 195 if (twi_int_status & MCOMP) {
174 if (iface->cur_mode == TWI_I2C_MODE_COMBINED) { 196 if ((read_MASTER_CTL(iface) & MEN) == 0 &&
197 (iface->cur_mode == TWI_I2C_MODE_REPEAT ||
198 iface->cur_mode == TWI_I2C_MODE_COMBINED)) {
199 iface->result = -1;
200 write_INT_MASK(iface, 0);
201 write_MASTER_CTL(iface, 0);
202 } else if (iface->cur_mode == TWI_I2C_MODE_COMBINED) {
175 if (iface->readNum == 0) { 203 if (iface->readNum == 0) {
176 /* set the read number to 1 and ask for manual 204 /* set the read number to 1 and ask for manual
177 * stop in block combine mode 205 * stop in block combine mode
@@ -760,7 +788,7 @@ static void __exit i2c_bfin_twi_exit(void)
760 platform_driver_unregister(&i2c_bfin_twi_driver); 788 platform_driver_unregister(&i2c_bfin_twi_driver);
761} 789}
762 790
763module_init(i2c_bfin_twi_init); 791subsys_initcall(i2c_bfin_twi_init);
764module_exit(i2c_bfin_twi_exit); 792module_exit(i2c_bfin_twi_exit);
765 793
766MODULE_AUTHOR("Bryan Wu, Sonic Zhang"); 794MODULE_AUTHOR("Bryan Wu, Sonic Zhang");
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index f2de3be35df3..3a20961bef1e 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -634,8 +634,7 @@ static void cpm_i2c_shutdown(struct cpm_i2c *cpm)
634 cpm_muram_free(cpm->i2c_addr); 634 cpm_muram_free(cpm->i2c_addr);
635} 635}
636 636
637static int __devinit cpm_i2c_probe(struct platform_device *ofdev, 637static int __devinit cpm_i2c_probe(struct platform_device *ofdev)
638 const struct of_device_id *match)
639{ 638{
640 int result, len; 639 int result, len;
641 struct cpm_i2c *cpm; 640 struct cpm_i2c *cpm;
@@ -718,7 +717,7 @@ static const struct of_device_id cpm_i2c_match[] = {
718 717
719MODULE_DEVICE_TABLE(of, cpm_i2c_match); 718MODULE_DEVICE_TABLE(of, cpm_i2c_match);
720 719
721static struct of_platform_driver cpm_i2c_driver = { 720static struct platform_driver cpm_i2c_driver = {
722 .probe = cpm_i2c_probe, 721 .probe = cpm_i2c_probe,
723 .remove = __devexit_p(cpm_i2c_remove), 722 .remove = __devexit_p(cpm_i2c_remove),
724 .driver = { 723 .driver = {
@@ -730,12 +729,12 @@ static struct of_platform_driver cpm_i2c_driver = {
730 729
731static int __init cpm_i2c_init(void) 730static int __init cpm_i2c_init(void)
732{ 731{
733 return of_register_platform_driver(&cpm_i2c_driver); 732 return platform_driver_register(&cpm_i2c_driver);
734} 733}
735 734
736static void __exit cpm_i2c_exit(void) 735static void __exit cpm_i2c_exit(void)
737{ 736{
738 of_unregister_platform_driver(&cpm_i2c_driver); 737 platform_driver_unregister(&cpm_i2c_driver);
739} 738}
740 739
741module_init(cpm_i2c_init); 740module_init(cpm_i2c_init);
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 5795c8398c7c..a76d85fa3ad7 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -355,7 +355,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
355 /* 355 /*
356 * Write mode register first as needed for correct behaviour 356 * Write mode register first as needed for correct behaviour
357 * on OMAP-L138, but don't set STT yet to avoid a race with XRDY 357 * on OMAP-L138, but don't set STT yet to avoid a race with XRDY
358 * occuring before we have loaded DXR 358 * occurring before we have loaded DXR
359 */ 359 */
360 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); 360 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
361 361
diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c
index b664ed8bbdb3..b7a51c43b185 100644
--- a/drivers/i2c/busses/i2c-designware.c
+++ b/drivers/i2c/busses/i2c-designware.c
@@ -178,7 +178,7 @@ static char *abort_sources[] = {
178 * @lock: protect this struct and IO registers 178 * @lock: protect this struct and IO registers
179 * @clk: input reference clock 179 * @clk: input reference clock
180 * @cmd_err: run time hadware error code 180 * @cmd_err: run time hadware error code
181 * @msgs: points to an array of messages currently being transfered 181 * @msgs: points to an array of messages currently being transferred
182 * @msgs_num: the number of elements in msgs 182 * @msgs_num: the number of elements in msgs
183 * @msg_write_idx: the element index of the current tx message in the msgs 183 * @msg_write_idx: the element index of the current tx message in the msgs
184 * array 184 * array
diff --git a/drivers/i2c/busses/i2c-diolan-u2c.c b/drivers/i2c/busses/i2c-diolan-u2c.c
new file mode 100644
index 000000000000..76366716a854
--- /dev/null
+++ b/drivers/i2c/busses/i2c-diolan-u2c.c
@@ -0,0 +1,535 @@
1/*
2 * Driver for the Diolan u2c-12 USB-I2C adapter
3 *
4 * Copyright (c) 2010-2011 Ericsson AB
5 *
6 * Derived from:
7 * i2c-tiny-usb.c
8 * Copyright (C) 2006-2007 Till Harbaum (Till@Harbaum.org)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation, version 2.
13 */
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/module.h>
18#include <linux/types.h>
19#include <linux/slab.h>
20#include <linux/usb.h>
21#include <linux/i2c.h>
22
23#define DRIVER_NAME "i2c-diolan-u2c"
24
25#define USB_VENDOR_ID_DIOLAN 0x0abf
26#define USB_DEVICE_ID_DIOLAN_U2C 0x3370
27
28#define DIOLAN_OUT_EP 0x02
29#define DIOLAN_IN_EP 0x84
30
31/* commands via USB, must match command ids in the firmware */
32#define CMD_I2C_READ 0x01
33#define CMD_I2C_WRITE 0x02
34#define CMD_I2C_SCAN 0x03 /* Returns list of detected devices */
35#define CMD_I2C_RELEASE_SDA 0x04
36#define CMD_I2C_RELEASE_SCL 0x05
37#define CMD_I2C_DROP_SDA 0x06
38#define CMD_I2C_DROP_SCL 0x07
39#define CMD_I2C_READ_SDA 0x08
40#define CMD_I2C_READ_SCL 0x09
41#define CMD_GET_FW_VERSION 0x0a
42#define CMD_GET_SERIAL 0x0b
43#define CMD_I2C_START 0x0c
44#define CMD_I2C_STOP 0x0d
45#define CMD_I2C_REPEATED_START 0x0e
46#define CMD_I2C_PUT_BYTE 0x0f
47#define CMD_I2C_GET_BYTE 0x10
48#define CMD_I2C_PUT_ACK 0x11
49#define CMD_I2C_GET_ACK 0x12
50#define CMD_I2C_PUT_BYTE_ACK 0x13
51#define CMD_I2C_GET_BYTE_ACK 0x14
52#define CMD_I2C_SET_SPEED 0x1b
53#define CMD_I2C_GET_SPEED 0x1c
54#define CMD_I2C_SET_CLK_SYNC 0x24
55#define CMD_I2C_GET_CLK_SYNC 0x25
56#define CMD_I2C_SET_CLK_SYNC_TO 0x26
57#define CMD_I2C_GET_CLK_SYNC_TO 0x27
58
59#define RESP_OK 0x00
60#define RESP_FAILED 0x01
61#define RESP_BAD_MEMADDR 0x04
62#define RESP_DATA_ERR 0x05
63#define RESP_NOT_IMPLEMENTED 0x06
64#define RESP_NACK 0x07
65#define RESP_TIMEOUT 0x09
66
67#define U2C_I2C_SPEED_FAST 0 /* 400 kHz */
68#define U2C_I2C_SPEED_STD 1 /* 100 kHz */
69#define U2C_I2C_SPEED_2KHZ 242 /* 2 kHz, minimum speed */
70#define U2C_I2C_SPEED(f) ((DIV_ROUND_UP(1000000, (f)) - 10) / 2 + 1)
71
72#define U2C_I2C_FREQ_FAST 400000
73#define U2C_I2C_FREQ_STD 100000
74#define U2C_I2C_FREQ(s) (1000000 / (2 * (s - 1) + 10))
75
76#define DIOLAN_USB_TIMEOUT 100 /* in ms */
77#define DIOLAN_SYNC_TIMEOUT 20 /* in ms */
78
79#define DIOLAN_OUTBUF_LEN 128
80#define DIOLAN_FLUSH_LEN (DIOLAN_OUTBUF_LEN - 4)
81#define DIOLAN_INBUF_LEN 256 /* Maximum supported receive length */
82
83/* Structure to hold all of our device specific stuff */
84struct i2c_diolan_u2c {
85 u8 obuffer[DIOLAN_OUTBUF_LEN]; /* output buffer */
86 u8 ibuffer[DIOLAN_INBUF_LEN]; /* input buffer */
87 struct usb_device *usb_dev; /* the usb device for this device */
88 struct usb_interface *interface;/* the interface for this device */
89 struct i2c_adapter adapter; /* i2c related things */
90 int olen; /* Output buffer length */
91 int ocount; /* Number of enqueued messages */
92};
93
94static uint frequency = U2C_I2C_FREQ_STD; /* I2C clock frequency in Hz */
95
96module_param(frequency, uint, S_IRUGO | S_IWUSR);
97MODULE_PARM_DESC(frequency, "I2C clock frequency in hertz");
98
99/* usb layer */
100
101/* Send command to device, and get response. */
102static int diolan_usb_transfer(struct i2c_diolan_u2c *dev)
103{
104 int ret = 0;
105 int actual;
106 int i;
107
108 if (!dev->olen || !dev->ocount)
109 return -EINVAL;
110
111 ret = usb_bulk_msg(dev->usb_dev,
112 usb_sndbulkpipe(dev->usb_dev, DIOLAN_OUT_EP),
113 dev->obuffer, dev->olen, &actual,
114 DIOLAN_USB_TIMEOUT);
115 if (!ret) {
116 for (i = 0; i < dev->ocount; i++) {
117 int tmpret;
118
119 tmpret = usb_bulk_msg(dev->usb_dev,
120 usb_rcvbulkpipe(dev->usb_dev,
121 DIOLAN_IN_EP),
122 dev->ibuffer,
123 sizeof(dev->ibuffer), &actual,
124 DIOLAN_USB_TIMEOUT);
125 /*
126 * Stop command processing if a previous command
127 * returned an error.
128 * Note that we still need to retrieve all messages.
129 */
130 if (ret < 0)
131 continue;
132 ret = tmpret;
133 if (ret == 0 && actual > 0) {
134 switch (dev->ibuffer[actual - 1]) {
135 case RESP_NACK:
136 /*
137 * Return ENXIO if NACK was received as
138 * response to the address phase,
139 * EIO otherwise
140 */
141 ret = i == 1 ? -ENXIO : -EIO;
142 break;
143 case RESP_TIMEOUT:
144 ret = -ETIMEDOUT;
145 break;
146 case RESP_OK:
147 /* strip off return code */
148 ret = actual - 1;
149 break;
150 default:
151 ret = -EIO;
152 break;
153 }
154 }
155 }
156 }
157 dev->olen = 0;
158 dev->ocount = 0;
159 return ret;
160}
161
162static int diolan_write_cmd(struct i2c_diolan_u2c *dev, bool flush)
163{
164 if (flush || dev->olen >= DIOLAN_FLUSH_LEN)
165 return diolan_usb_transfer(dev);
166 return 0;
167}
168
169/* Send command (no data) */
170static int diolan_usb_cmd(struct i2c_diolan_u2c *dev, u8 command, bool flush)
171{
172 dev->obuffer[dev->olen++] = command;
173 dev->ocount++;
174 return diolan_write_cmd(dev, flush);
175}
176
177/* Send command with one byte of data */
178static int diolan_usb_cmd_data(struct i2c_diolan_u2c *dev, u8 command, u8 data,
179 bool flush)
180{
181 dev->obuffer[dev->olen++] = command;
182 dev->obuffer[dev->olen++] = data;
183 dev->ocount++;
184 return diolan_write_cmd(dev, flush);
185}
186
187/* Send command with two bytes of data */
188static int diolan_usb_cmd_data2(struct i2c_diolan_u2c *dev, u8 command, u8 d1,
189 u8 d2, bool flush)
190{
191 dev->obuffer[dev->olen++] = command;
192 dev->obuffer[dev->olen++] = d1;
193 dev->obuffer[dev->olen++] = d2;
194 dev->ocount++;
195 return diolan_write_cmd(dev, flush);
196}
197
198/*
199 * Flush input queue.
200 * If we don't do this at startup and the controller has queued up
201 * messages which were not retrieved, it will stop responding
202 * at some point.
203 */
204static void diolan_flush_input(struct i2c_diolan_u2c *dev)
205{
206 int i;
207
208 for (i = 0; i < 10; i++) {
209 int actual = 0;
210 int ret;
211
212 ret = usb_bulk_msg(dev->usb_dev,
213 usb_rcvbulkpipe(dev->usb_dev, DIOLAN_IN_EP),
214 dev->ibuffer, sizeof(dev->ibuffer), &actual,
215 DIOLAN_USB_TIMEOUT);
216 if (ret < 0 || actual == 0)
217 break;
218 }
219 if (i == 10)
220 dev_err(&dev->interface->dev, "Failed to flush input buffer\n");
221}
222
223static int diolan_i2c_start(struct i2c_diolan_u2c *dev)
224{
225 return diolan_usb_cmd(dev, CMD_I2C_START, false);
226}
227
228static int diolan_i2c_repeated_start(struct i2c_diolan_u2c *dev)
229{
230 return diolan_usb_cmd(dev, CMD_I2C_REPEATED_START, false);
231}
232
233static int diolan_i2c_stop(struct i2c_diolan_u2c *dev)
234{
235 return diolan_usb_cmd(dev, CMD_I2C_STOP, true);
236}
237
238static int diolan_i2c_get_byte_ack(struct i2c_diolan_u2c *dev, bool ack,
239 u8 *byte)
240{
241 int ret;
242
243 ret = diolan_usb_cmd_data(dev, CMD_I2C_GET_BYTE_ACK, ack, true);
244 if (ret > 0)
245 *byte = dev->ibuffer[0];
246 else if (ret == 0)
247 ret = -EIO;
248
249 return ret;
250}
251
252static int diolan_i2c_put_byte_ack(struct i2c_diolan_u2c *dev, u8 byte)
253{
254 return diolan_usb_cmd_data(dev, CMD_I2C_PUT_BYTE_ACK, byte, false);
255}
256
257static int diolan_set_speed(struct i2c_diolan_u2c *dev, u8 speed)
258{
259 return diolan_usb_cmd_data(dev, CMD_I2C_SET_SPEED, speed, true);
260}
261
262/* Enable or disable clock synchronization (stretching) */
263static int diolan_set_clock_synch(struct i2c_diolan_u2c *dev, bool enable)
264{
265 return diolan_usb_cmd_data(dev, CMD_I2C_SET_CLK_SYNC, enable, true);
266}
267
268/* Set clock synchronization timeout in ms */
269static int diolan_set_clock_synch_timeout(struct i2c_diolan_u2c *dev, int ms)
270{
271 int to_val = ms * 10;
272
273 return diolan_usb_cmd_data2(dev, CMD_I2C_SET_CLK_SYNC_TO,
274 to_val & 0xff, (to_val >> 8) & 0xff, true);
275}
276
277static void diolan_fw_version(struct i2c_diolan_u2c *dev)
278{
279 int ret;
280
281 ret = diolan_usb_cmd(dev, CMD_GET_FW_VERSION, true);
282 if (ret >= 2)
283 dev_info(&dev->interface->dev,
284 "Diolan U2C firmware version %u.%u\n",
285 (unsigned int)dev->ibuffer[0],
286 (unsigned int)dev->ibuffer[1]);
287}
288
289static void diolan_get_serial(struct i2c_diolan_u2c *dev)
290{
291 int ret;
292 u32 serial;
293
294 ret = diolan_usb_cmd(dev, CMD_GET_SERIAL, true);
295 if (ret >= 4) {
296 serial = le32_to_cpu(*(u32 *)dev->ibuffer);
297 dev_info(&dev->interface->dev,
298 "Diolan U2C serial number %u\n", serial);
299 }
300}
301
302static int diolan_init(struct i2c_diolan_u2c *dev)
303{
304 int speed, ret;
305
306 if (frequency >= 200000) {
307 speed = U2C_I2C_SPEED_FAST;
308 frequency = U2C_I2C_FREQ_FAST;
309 } else if (frequency >= 100000 || frequency == 0) {
310 speed = U2C_I2C_SPEED_STD;
311 frequency = U2C_I2C_FREQ_STD;
312 } else {
313 speed = U2C_I2C_SPEED(frequency);
314 if (speed > U2C_I2C_SPEED_2KHZ)
315 speed = U2C_I2C_SPEED_2KHZ;
316 frequency = U2C_I2C_FREQ(speed);
317 }
318
319 dev_info(&dev->interface->dev,
320 "Diolan U2C at USB bus %03d address %03d speed %d Hz\n",
321 dev->usb_dev->bus->busnum, dev->usb_dev->devnum, frequency);
322
323 diolan_flush_input(dev);
324 diolan_fw_version(dev);
325 diolan_get_serial(dev);
326
327 /* Set I2C speed */
328 ret = diolan_set_speed(dev, speed);
329 if (ret < 0)
330 return ret;
331
332 /* Configure I2C clock synchronization */
333 ret = diolan_set_clock_synch(dev, speed != U2C_I2C_SPEED_FAST);
334 if (ret < 0)
335 return ret;
336
337 if (speed != U2C_I2C_SPEED_FAST)
338 ret = diolan_set_clock_synch_timeout(dev, DIOLAN_SYNC_TIMEOUT);
339
340 return ret;
341}
342
343/* i2c layer */
344
345static int diolan_usb_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
346 int num)
347{
348 struct i2c_diolan_u2c *dev = i2c_get_adapdata(adapter);
349 struct i2c_msg *pmsg;
350 int i, j;
351 int ret, sret;
352
353 ret = diolan_i2c_start(dev);
354 if (ret < 0)
355 return ret;
356
357 for (i = 0; i < num; i++) {
358 pmsg = &msgs[i];
359 if (i) {
360 ret = diolan_i2c_repeated_start(dev);
361 if (ret < 0)
362 goto abort;
363 }
364 if (pmsg->flags & I2C_M_RD) {
365 ret =
366 diolan_i2c_put_byte_ack(dev, (pmsg->addr << 1) | 1);
367 if (ret < 0)
368 goto abort;
369 for (j = 0; j < pmsg->len; j++) {
370 u8 byte;
371 bool ack = j < pmsg->len - 1;
372
373 /*
374 * Don't send NACK if this is the first byte
375 * of a SMBUS_BLOCK message.
376 */
377 if (j == 0 && (pmsg->flags & I2C_M_RECV_LEN))
378 ack = true;
379
380 ret = diolan_i2c_get_byte_ack(dev, ack, &byte);
381 if (ret < 0)
382 goto abort;
383 /*
384 * Adjust count if first received byte is length
385 */
386 if (j == 0 && (pmsg->flags & I2C_M_RECV_LEN)) {
387 if (byte == 0
388 || byte > I2C_SMBUS_BLOCK_MAX) {
389 ret = -EPROTO;
390 goto abort;
391 }
392 pmsg->len += byte;
393 }
394 pmsg->buf[j] = byte;
395 }
396 } else {
397 ret = diolan_i2c_put_byte_ack(dev, pmsg->addr << 1);
398 if (ret < 0)
399 goto abort;
400 for (j = 0; j < pmsg->len; j++) {
401 ret = diolan_i2c_put_byte_ack(dev,
402 pmsg->buf[j]);
403 if (ret < 0)
404 goto abort;
405 }
406 }
407 }
408abort:
409 sret = diolan_i2c_stop(dev);
410 if (sret < 0 && ret >= 0)
411 ret = sret;
412 return ret;
413}
414
415/*
416 * Return list of supported functionality.
417 */
418static u32 diolan_usb_func(struct i2c_adapter *a)
419{
420 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
421 I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
422}
423
424static const struct i2c_algorithm diolan_usb_algorithm = {
425 .master_xfer = diolan_usb_xfer,
426 .functionality = diolan_usb_func,
427};
428
429/* device layer */
430
431static const struct usb_device_id diolan_u2c_table[] = {
432 { USB_DEVICE(USB_VENDOR_ID_DIOLAN, USB_DEVICE_ID_DIOLAN_U2C) },
433 { }
434};
435
436MODULE_DEVICE_TABLE(usb, diolan_u2c_table);
437
438static void diolan_u2c_free(struct i2c_diolan_u2c *dev)
439{
440 usb_put_dev(dev->usb_dev);
441 kfree(dev);
442}
443
444static int diolan_u2c_probe(struct usb_interface *interface,
445 const struct usb_device_id *id)
446{
447 struct i2c_diolan_u2c *dev;
448 int ret;
449
450 /* allocate memory for our device state and initialize it */
451 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
452 if (dev == NULL) {
453 dev_err(&interface->dev, "no memory for device state\n");
454 ret = -ENOMEM;
455 goto error;
456 }
457
458 dev->usb_dev = usb_get_dev(interface_to_usbdev(interface));
459 dev->interface = interface;
460
461 /* save our data pointer in this interface device */
462 usb_set_intfdata(interface, dev);
463
464 /* setup i2c adapter description */
465 dev->adapter.owner = THIS_MODULE;
466 dev->adapter.class = I2C_CLASS_HWMON;
467 dev->adapter.algo = &diolan_usb_algorithm;
468 i2c_set_adapdata(&dev->adapter, dev);
469 snprintf(dev->adapter.name, sizeof(dev->adapter.name),
470 DRIVER_NAME " at bus %03d device %03d",
471 dev->usb_dev->bus->busnum, dev->usb_dev->devnum);
472
473 dev->adapter.dev.parent = &dev->interface->dev;
474
475 /* initialize diolan i2c interface */
476 ret = diolan_init(dev);
477 if (ret < 0) {
478 dev_err(&interface->dev, "failed to initialize adapter\n");
479 goto error_free;
480 }
481
482 /* and finally attach to i2c layer */
483 ret = i2c_add_adapter(&dev->adapter);
484 if (ret < 0) {
485 dev_err(&interface->dev, "failed to add I2C adapter\n");
486 goto error_free;
487 }
488
489 dev_dbg(&interface->dev, "connected " DRIVER_NAME "\n");
490
491 return 0;
492
493error_free:
494 usb_set_intfdata(interface, NULL);
495 diolan_u2c_free(dev);
496error:
497 return ret;
498}
499
500static void diolan_u2c_disconnect(struct usb_interface *interface)
501{
502 struct i2c_diolan_u2c *dev = usb_get_intfdata(interface);
503
504 i2c_del_adapter(&dev->adapter);
505 usb_set_intfdata(interface, NULL);
506 diolan_u2c_free(dev);
507
508 dev_dbg(&interface->dev, "disconnected\n");
509}
510
511static struct usb_driver diolan_u2c_driver = {
512 .name = DRIVER_NAME,
513 .probe = diolan_u2c_probe,
514 .disconnect = diolan_u2c_disconnect,
515 .id_table = diolan_u2c_table,
516};
517
518static int __init diolan_u2c_init(void)
519{
520 /* register this driver with the USB subsystem */
521 return usb_register(&diolan_u2c_driver);
522}
523
524static void __exit diolan_u2c_exit(void)
525{
526 /* deregister this driver with the USB subsystem */
527 usb_deregister(&diolan_u2c_driver);
528}
529
530module_init(diolan_u2c_init);
531module_exit(diolan_u2c_exit);
532
533MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
534MODULE_DESCRIPTION(DRIVER_NAME " driver");
535MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
new file mode 100644
index 000000000000..8abfa4a03ce1
--- /dev/null
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -0,0 +1,940 @@
1/*
2 * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
16 */
17
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/init.h>
22#include <linux/errno.h>
23#include <linux/i2c.h>
24#include <linux/fs.h>
25#include <linux/io.h>
26#include <linux/types.h>
27#include <linux/interrupt.h>
28#include <linux/jiffies.h>
29#include <linux/pci.h>
30#include <linux/mutex.h>
31#include <linux/ktime.h>
32#include <linux/slab.h>
33
34#define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */
35#define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */
36#define PCH_MAX_CLK 100000 /* Maximum Clock speed in MHz */
37#define PCH_BUFFER_MODE_ENABLE 0x0002 /* flag for Buffer mode enable */
38#define PCH_EEPROM_SW_RST_MODE_ENABLE 0x0008 /* EEPROM SW RST enable flag */
39
40#define PCH_I2CSADR 0x00 /* I2C slave address register */
41#define PCH_I2CCTL 0x04 /* I2C control register */
42#define PCH_I2CSR 0x08 /* I2C status register */
43#define PCH_I2CDR 0x0C /* I2C data register */
44#define PCH_I2CMON 0x10 /* I2C bus monitor register */
45#define PCH_I2CBC 0x14 /* I2C bus transfer rate setup counter */
46#define PCH_I2CMOD 0x18 /* I2C mode register */
47#define PCH_I2CBUFSLV 0x1C /* I2C buffer mode slave address register */
48#define PCH_I2CBUFSUB 0x20 /* I2C buffer mode subaddress register */
49#define PCH_I2CBUFFOR 0x24 /* I2C buffer mode format register */
50#define PCH_I2CBUFCTL 0x28 /* I2C buffer mode control register */
51#define PCH_I2CBUFMSK 0x2C /* I2C buffer mode interrupt mask register */
52#define PCH_I2CBUFSTA 0x30 /* I2C buffer mode status register */
53#define PCH_I2CBUFLEV 0x34 /* I2C buffer mode level register */
54#define PCH_I2CESRFOR 0x38 /* EEPROM software reset mode format register */
55#define PCH_I2CESRCTL 0x3C /* EEPROM software reset mode ctrl register */
56#define PCH_I2CESRMSK 0x40 /* EEPROM software reset mode */
57#define PCH_I2CESRSTA 0x44 /* EEPROM software reset mode status register */
58#define PCH_I2CTMR 0x48 /* I2C timer register */
59#define PCH_I2CSRST 0xFC /* I2C reset register */
60#define PCH_I2CNF 0xF8 /* I2C noise filter register */
61
62#define BUS_IDLE_TIMEOUT 20
63#define PCH_I2CCTL_I2CMEN 0x0080
64#define TEN_BIT_ADDR_DEFAULT 0xF000
65#define TEN_BIT_ADDR_MASK 0xF0
66#define PCH_START 0x0020
67#define PCH_ESR_START 0x0001
68#define PCH_BUFF_START 0x1
69#define PCH_REPSTART 0x0004
70#define PCH_ACK 0x0008
71#define PCH_GETACK 0x0001
72#define CLR_REG 0x0
73#define I2C_RD 0x1
74#define I2CMCF_BIT 0x0080
75#define I2CMIF_BIT 0x0002
76#define I2CMAL_BIT 0x0010
77#define I2CBMFI_BIT 0x0001
78#define I2CBMAL_BIT 0x0002
79#define I2CBMNA_BIT 0x0004
80#define I2CBMTO_BIT 0x0008
81#define I2CBMIS_BIT 0x0010
82#define I2CESRFI_BIT 0X0001
83#define I2CESRTO_BIT 0x0002
84#define I2CESRFIIE_BIT 0x1
85#define I2CESRTOIE_BIT 0x2
86#define I2CBMDZ_BIT 0x0040
87#define I2CBMAG_BIT 0x0020
88#define I2CMBB_BIT 0x0020
89#define BUFFER_MODE_MASK (I2CBMFI_BIT | I2CBMAL_BIT | I2CBMNA_BIT | \
90 I2CBMTO_BIT | I2CBMIS_BIT)
91#define I2C_ADDR_MSK 0xFF
92#define I2C_MSB_2B_MSK 0x300
93#define FAST_MODE_CLK 400
94#define FAST_MODE_EN 0x0001
95#define SUB_ADDR_LEN_MAX 4
96#define BUF_LEN_MAX 32
97#define PCH_BUFFER_MODE 0x1
98#define EEPROM_SW_RST_MODE 0x0002
99#define NORMAL_INTR_ENBL 0x0300
100#define EEPROM_RST_INTR_ENBL (I2CESRFIIE_BIT | I2CESRTOIE_BIT)
101#define EEPROM_RST_INTR_DISBL 0x0
102#define BUFFER_MODE_INTR_ENBL 0x001F
103#define BUFFER_MODE_INTR_DISBL 0x0
104#define NORMAL_MODE 0x0
105#define BUFFER_MODE 0x1
106#define EEPROM_SR_MODE 0x2
107#define I2C_TX_MODE 0x0010
108#define PCH_BUF_TX 0xFFF7
109#define PCH_BUF_RD 0x0008
110#define I2C_ERROR_MASK (I2CESRTO_EVENT | I2CBMIS_EVENT | I2CBMTO_EVENT | \
111 I2CBMNA_EVENT | I2CBMAL_EVENT | I2CMAL_EVENT)
112#define I2CMAL_EVENT 0x0001
113#define I2CMCF_EVENT 0x0002
114#define I2CBMFI_EVENT 0x0004
115#define I2CBMAL_EVENT 0x0008
116#define I2CBMNA_EVENT 0x0010
117#define I2CBMTO_EVENT 0x0020
118#define I2CBMIS_EVENT 0x0040
119#define I2CESRFI_EVENT 0x0080
120#define I2CESRTO_EVENT 0x0100
121#define PCI_DEVICE_ID_PCH_I2C 0x8817
122
123#define pch_dbg(adap, fmt, arg...) \
124 dev_dbg(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
125
126#define pch_err(adap, fmt, arg...) \
127 dev_err(adap->pch_adapter.dev.parent, "%s :" fmt, __func__, ##arg)
128
129#define pch_pci_err(pdev, fmt, arg...) \
130 dev_err(&pdev->dev, "%s :" fmt, __func__, ##arg)
131
132#define pch_pci_dbg(pdev, fmt, arg...) \
133 dev_dbg(&pdev->dev, "%s :" fmt, __func__, ##arg)
134
135/*
136Set the number of I2C instance max
137Intel EG20T PCH : 1ch
138OKI SEMICONDUCTOR ML7213 IOH : 2ch
139*/
140#define PCH_I2C_MAX_DEV 2
141
142/**
143 * struct i2c_algo_pch_data - for I2C driver functionalities
144 * @pch_adapter: stores the reference to i2c_adapter structure
145 * @p_adapter_info: stores the reference to adapter_info structure
146 * @pch_base_address: specifies the remapped base address
147 * @pch_buff_mode_en: specifies if buffer mode is enabled
148 * @pch_event_flag: specifies occurrence of interrupt events
149 * @pch_i2c_xfer_in_progress: specifies whether the transfer is completed
150 */
151struct i2c_algo_pch_data {
152 struct i2c_adapter pch_adapter;
153 struct adapter_info *p_adapter_info;
154 void __iomem *pch_base_address;
155 int pch_buff_mode_en;
156 u32 pch_event_flag;
157 bool pch_i2c_xfer_in_progress;
158};
159
160/**
161 * struct adapter_info - This structure holds the adapter information for the
162 PCH i2c controller
163 * @pch_data: stores a list of i2c_algo_pch_data
164 * @pch_i2c_suspended: specifies whether the system is suspended or not
165 * perhaps with more lines and words.
166 * @ch_num: specifies the number of i2c instance
167 *
168 * pch_data has as many elements as maximum I2C channels
169 */
170struct adapter_info {
171 struct i2c_algo_pch_data pch_data[PCH_I2C_MAX_DEV];
172 bool pch_i2c_suspended;
173 int ch_num;
174};
175
176
177static int pch_i2c_speed = 100; /* I2C bus speed in Kbps */
178static int pch_clk = 50000; /* specifies I2C clock speed in KHz */
179static wait_queue_head_t pch_event;
180static DEFINE_MUTEX(pch_mutex);
181
182/* Definition for ML7213 by OKI SEMICONDUCTOR */
183#define PCI_VENDOR_ID_ROHM 0x10DB
184#define PCI_DEVICE_ID_ML7213_I2C 0x802D
185#define PCI_DEVICE_ID_ML7223_I2C 0x8010
186
187static struct pci_device_id __devinitdata pch_pcidev_id[] = {
188 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH_I2C), 1, },
189 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_I2C), 2, },
190 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_I2C), 1, },
191 {0,}
192};
193
194static irqreturn_t pch_i2c_handler(int irq, void *pData);
195
196static inline void pch_setbit(void __iomem *addr, u32 offset, u32 bitmask)
197{
198 u32 val;
199 val = ioread32(addr + offset);
200 val |= bitmask;
201 iowrite32(val, addr + offset);
202}
203
204static inline void pch_clrbit(void __iomem *addr, u32 offset, u32 bitmask)
205{
206 u32 val;
207 val = ioread32(addr + offset);
208 val &= (~bitmask);
209 iowrite32(val, addr + offset);
210}
211
212/**
213 * pch_i2c_init() - hardware initialization of I2C module
214 * @adap: Pointer to struct i2c_algo_pch_data.
215 */
216static void pch_i2c_init(struct i2c_algo_pch_data *adap)
217{
218 void __iomem *p = adap->pch_base_address;
219 u32 pch_i2cbc;
220 u32 pch_i2ctmr;
221 u32 reg_value;
222
223 /* reset I2C controller */
224 iowrite32(0x01, p + PCH_I2CSRST);
225 msleep(20);
226 iowrite32(0x0, p + PCH_I2CSRST);
227
228 /* Initialize I2C registers */
229 iowrite32(0x21, p + PCH_I2CNF);
230
231 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_I2CCTL_I2CMEN);
232
233 if (pch_i2c_speed != 400)
234 pch_i2c_speed = 100;
235
236 reg_value = PCH_I2CCTL_I2CMEN;
237 if (pch_i2c_speed == FAST_MODE_CLK) {
238 reg_value |= FAST_MODE_EN;
239 pch_dbg(adap, "Fast mode enabled\n");
240 }
241
242 if (pch_clk > PCH_MAX_CLK)
243 pch_clk = 62500;
244
245 pch_i2cbc = (pch_clk + (pch_i2c_speed * 4)) / pch_i2c_speed * 8;
246 /* Set transfer speed in I2CBC */
247 iowrite32(pch_i2cbc, p + PCH_I2CBC);
248
249 pch_i2ctmr = (pch_clk) / 8;
250 iowrite32(pch_i2ctmr, p + PCH_I2CTMR);
251
252 reg_value |= NORMAL_INTR_ENBL; /* Enable interrupts in normal mode */
253 iowrite32(reg_value, p + PCH_I2CCTL);
254
255 pch_dbg(adap,
256 "I2CCTL=%x pch_i2cbc=%x pch_i2ctmr=%x Enable interrupts\n",
257 ioread32(p + PCH_I2CCTL), pch_i2cbc, pch_i2ctmr);
258
259 init_waitqueue_head(&pch_event);
260}
261
262static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2)
263{
264 return cmp1.tv64 < cmp2.tv64;
265}
266
267/**
268 * pch_i2c_wait_for_bus_idle() - check the status of bus.
269 * @adap: Pointer to struct i2c_algo_pch_data.
270 * @timeout: waiting time counter (us).
271 */
272static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
273 s32 timeout)
274{
275 void __iomem *p = adap->pch_base_address;
276
277 /* MAX timeout value is timeout*1000*1000nsec */
278 ktime_t ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000);
279 do {
280 if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0)
281 break;
282 msleep(20);
283 } while (ktime_lt(ktime_get(), ns_val));
284
285 pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
286
287 if (timeout == 0) {
288 pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME);
289 return -ETIME;
290 }
291
292 return 0;
293}
294
295/**
296 * pch_i2c_start() - Generate I2C start condition in normal mode.
297 * @adap: Pointer to struct i2c_algo_pch_data.
298 *
299 * Generate I2C start condition in normal mode by setting I2CCTL.I2CMSTA to 1.
300 */
301static void pch_i2c_start(struct i2c_algo_pch_data *adap)
302{
303 void __iomem *p = adap->pch_base_address;
304 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
305 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
306}
307
308/**
309 * pch_i2c_wait_for_xfer_complete() - initiates a wait for the tx complete event
310 * @adap: Pointer to struct i2c_algo_pch_data.
311 */
312static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap)
313{
314 s32 ret;
315 ret = wait_event_timeout(pch_event,
316 (adap->pch_event_flag != 0), msecs_to_jiffies(50));
317 if (ret < 0) {
318 pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
319 return ret;
320 }
321
322 if (ret == 0) {
323 pch_err(adap, "timeout: %x\n", adap->pch_event_flag);
324 return -ETIMEDOUT;
325 }
326
327 if (adap->pch_event_flag & I2C_ERROR_MASK) {
328 pch_err(adap, "error bits set: %x\n", adap->pch_event_flag);
329 return -EIO;
330 }
331
332 adap->pch_event_flag = 0;
333
334 return 0;
335}
336
337/**
338 * pch_i2c_getack() - to confirm ACK/NACK
339 * @adap: Pointer to struct i2c_algo_pch_data.
340 */
341static s32 pch_i2c_getack(struct i2c_algo_pch_data *adap)
342{
343 u32 reg_val;
344 void __iomem *p = adap->pch_base_address;
345 reg_val = ioread32(p + PCH_I2CSR) & PCH_GETACK;
346
347 if (reg_val != 0) {
348 pch_err(adap, "return%d\n", -EPROTO);
349 return -EPROTO;
350 }
351
352 return 0;
353}
354
355/**
356 * pch_i2c_stop() - generate stop condition in normal mode.
357 * @adap: Pointer to struct i2c_algo_pch_data.
358 */
359static void pch_i2c_stop(struct i2c_algo_pch_data *adap)
360{
361 void __iomem *p = adap->pch_base_address;
362 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
363 /* clear the start bit */
364 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_START);
365}
366
367/**
368 * pch_i2c_repstart() - generate repeated start condition in normal mode
369 * @adap: Pointer to struct i2c_algo_pch_data.
370 */
371static void pch_i2c_repstart(struct i2c_algo_pch_data *adap)
372{
373 void __iomem *p = adap->pch_base_address;
374 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
375 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_REPSTART);
376}
377
378/**
379 * pch_i2c_writebytes() - write data to I2C bus in normal mode
380 * @i2c_adap: Pointer to the struct i2c_adapter.
381 * @last: specifies whether last message or not.
382 * In the case of compound mode it will be 1 for last message,
383 * otherwise 0.
384 * @first: specifies whether first message or not.
385 * 1 for first message otherwise 0.
386 */
387static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
388 struct i2c_msg *msgs, u32 last, u32 first)
389{
390 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
391 u8 *buf;
392 u32 length;
393 u32 addr;
394 u32 addr_2_msb;
395 u32 addr_8_lsb;
396 s32 wrcount;
397 void __iomem *p = adap->pch_base_address;
398
399 length = msgs->len;
400 buf = msgs->buf;
401 addr = msgs->addr;
402
403 /* enable master tx */
404 pch_setbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
405
406 pch_dbg(adap, "I2CCTL = %x msgs->len = %d\n", ioread32(p + PCH_I2CCTL),
407 length);
408
409 if (first) {
410 if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
411 return -ETIME;
412 }
413
414 if (msgs->flags & I2C_M_TEN) {
415 addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
416 iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
417 if (first)
418 pch_i2c_start(adap);
419 if (pch_i2c_wait_for_xfer_complete(adap) == 0 &&
420 pch_i2c_getack(adap) == 0) {
421 addr_8_lsb = (addr & I2C_ADDR_MSK);
422 iowrite32(addr_8_lsb, p + PCH_I2CDR);
423 } else {
424 pch_i2c_stop(adap);
425 return -ETIME;
426 }
427 } else {
428 /* set 7 bit slave address and R/W bit as 0 */
429 iowrite32(addr << 1, p + PCH_I2CDR);
430 if (first)
431 pch_i2c_start(adap);
432 }
433
434 if ((pch_i2c_wait_for_xfer_complete(adap) == 0) &&
435 (pch_i2c_getack(adap) == 0)) {
436 for (wrcount = 0; wrcount < length; ++wrcount) {
437 /* write buffer value to I2C data register */
438 iowrite32(buf[wrcount], p + PCH_I2CDR);
439 pch_dbg(adap, "writing %x to Data register\n",
440 buf[wrcount]);
441
442 if (pch_i2c_wait_for_xfer_complete(adap) != 0)
443 return -ETIME;
444
445 if (pch_i2c_getack(adap))
446 return -EIO;
447 }
448
449 /* check if this is the last message */
450 if (last)
451 pch_i2c_stop(adap);
452 else
453 pch_i2c_repstart(adap);
454 } else {
455 pch_i2c_stop(adap);
456 return -EIO;
457 }
458
459 pch_dbg(adap, "return=%d\n", wrcount);
460
461 return wrcount;
462}
463
464/**
465 * pch_i2c_sendack() - send ACK
466 * @adap: Pointer to struct i2c_algo_pch_data.
467 */
468static void pch_i2c_sendack(struct i2c_algo_pch_data *adap)
469{
470 void __iomem *p = adap->pch_base_address;
471 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
472 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
473}
474
475/**
476 * pch_i2c_sendnack() - send NACK
477 * @adap: Pointer to struct i2c_algo_pch_data.
478 */
479static void pch_i2c_sendnack(struct i2c_algo_pch_data *adap)
480{
481 void __iomem *p = adap->pch_base_address;
482 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL));
483 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK);
484}
485
486/**
487 * pch_i2c_readbytes() - read data from I2C bus in normal mode.
488 * @i2c_adap: Pointer to the struct i2c_adapter.
489 * @msgs: Pointer to i2c_msg structure.
490 * @last: specifies whether last message or not.
491 * @first: specifies whether first message or not.
492 */
493static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
494 u32 last, u32 first)
495{
496 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
497
498 u8 *buf;
499 u32 count;
500 u32 length;
501 u32 addr;
502 u32 addr_2_msb;
503 void __iomem *p = adap->pch_base_address;
504
505 length = msgs->len;
506 buf = msgs->buf;
507 addr = msgs->addr;
508
509 /* enable master reception */
510 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
511
512 if (first) {
513 if (pch_i2c_wait_for_bus_idle(adap, BUS_IDLE_TIMEOUT) == -ETIME)
514 return -ETIME;
515 }
516
517 if (msgs->flags & I2C_M_TEN) {
518 addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD));
519 iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
520
521 } else {
522 /* 7 address bits + R/W bit */
523 addr = (((addr) << 1) | (I2C_RD));
524 iowrite32(addr, p + PCH_I2CDR);
525 }
526
527 /* check if it is the first message */
528 if (first)
529 pch_i2c_start(adap);
530
531 if ((pch_i2c_wait_for_xfer_complete(adap) == 0) &&
532 (pch_i2c_getack(adap) == 0)) {
533 pch_dbg(adap, "return %d\n", 0);
534
535 if (length == 0) {
536 pch_i2c_stop(adap);
537 ioread32(p + PCH_I2CDR); /* Dummy read needs */
538
539 count = length;
540 } else {
541 int read_index;
542 int loop;
543 pch_i2c_sendack(adap);
544
545 /* Dummy read */
546 for (loop = 1, read_index = 0; loop < length; loop++) {
547 buf[read_index] = ioread32(p + PCH_I2CDR);
548
549 if (loop != 1)
550 read_index++;
551
552 if (pch_i2c_wait_for_xfer_complete(adap) != 0) {
553 pch_i2c_stop(adap);
554 return -ETIME;
555 }
556 } /* end for */
557
558 pch_i2c_sendnack(adap);
559
560 buf[read_index] = ioread32(p + PCH_I2CDR);
561
562 if (length != 1)
563 read_index++;
564
565 if (pch_i2c_wait_for_xfer_complete(adap) == 0) {
566 if (last)
567 pch_i2c_stop(adap);
568 else
569 pch_i2c_repstart(adap);
570
571 buf[read_index++] = ioread32(p + PCH_I2CDR);
572 count = read_index;
573 } else {
574 count = -ETIME;
575 }
576
577 }
578 } else {
579 count = -ETIME;
580 pch_i2c_stop(adap);
581 }
582
583 return count;
584}
585
586/**
587 * pch_i2c_cb() - Interrupt handler Call back function
588 * @adap: Pointer to struct i2c_algo_pch_data.
589 */
590static void pch_i2c_cb(struct i2c_algo_pch_data *adap)
591{
592 u32 sts;
593 void __iomem *p = adap->pch_base_address;
594
595 sts = ioread32(p + PCH_I2CSR);
596 sts &= (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT);
597 if (sts & I2CMAL_BIT)
598 adap->pch_event_flag |= I2CMAL_EVENT;
599
600 if (sts & I2CMCF_BIT)
601 adap->pch_event_flag |= I2CMCF_EVENT;
602
603 /* clear the applicable bits */
604 pch_clrbit(adap->pch_base_address, PCH_I2CSR, sts);
605
606 pch_dbg(adap, "PCH_I2CSR = %x\n", ioread32(p + PCH_I2CSR));
607
608 wake_up(&pch_event);
609}
610
611/**
612 * pch_i2c_handler() - interrupt handler for the PCH I2C controller
613 * @irq: irq number.
614 * @pData: cookie passed back to the handler function.
615 */
616static irqreturn_t pch_i2c_handler(int irq, void *pData)
617{
618 u32 reg_val;
619 int flag;
620 int i;
621 struct adapter_info *adap_info = pData;
622 void __iomem *p;
623 u32 mode;
624
625 for (i = 0, flag = 0; i < adap_info->ch_num; i++) {
626 p = adap_info->pch_data[i].pch_base_address;
627 mode = ioread32(p + PCH_I2CMOD);
628 mode &= BUFFER_MODE | EEPROM_SR_MODE;
629 if (mode != NORMAL_MODE) {
630 pch_err(adap_info->pch_data,
631 "I2C-%d mode(%d) is not supported\n", mode, i);
632 continue;
633 }
634 reg_val = ioread32(p + PCH_I2CSR);
635 if (reg_val & (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT)) {
636 pch_i2c_cb(&adap_info->pch_data[i]);
637 flag = 1;
638 }
639 }
640
641 return flag ? IRQ_HANDLED : IRQ_NONE;
642}
643
644/**
645 * pch_i2c_xfer() - Reading adnd writing data through I2C bus
646 * @i2c_adap: Pointer to the struct i2c_adapter.
647 * @msgs: Pointer to i2c_msg structure.
648 * @num: number of messages.
649 */
650static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap,
651 struct i2c_msg *msgs, s32 num)
652{
653 struct i2c_msg *pmsg;
654 u32 i = 0;
655 u32 status;
656 u32 msglen;
657 u32 subaddrlen;
658 s32 ret;
659
660 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
661
662 ret = mutex_lock_interruptible(&pch_mutex);
663 if (ret)
664 return -ERESTARTSYS;
665
666 if (adap->p_adapter_info->pch_i2c_suspended) {
667 mutex_unlock(&pch_mutex);
668 return -EBUSY;
669 }
670
671 pch_dbg(adap, "adap->p_adapter_info->pch_i2c_suspended is %d\n",
672 adap->p_adapter_info->pch_i2c_suspended);
673 /* transfer not completed */
674 adap->pch_i2c_xfer_in_progress = true;
675
676 pmsg = &msgs[0];
677 pmsg->flags |= adap->pch_buff_mode_en;
678 status = pmsg->flags;
679 pch_dbg(adap,
680 "After invoking I2C_MODE_SEL :flag= 0x%x\n", status);
681 /* calculate sub address length and message length */
682 /* these are applicable only for buffer mode */
683 subaddrlen = pmsg->buf[0];
684 /* calculate actual message length excluding
685 * the sub address fields */
686 msglen = (pmsg->len) - (subaddrlen + 1);
687 if (status & (I2C_M_RD)) {
688 pch_dbg(adap, "invoking pch_i2c_readbytes\n");
689 ret = pch_i2c_readbytes(i2c_adap, pmsg, (i + 1 == num),
690 (i == 0));
691 } else {
692 pch_dbg(adap, "invoking pch_i2c_writebytes\n");
693 ret = pch_i2c_writebytes(i2c_adap, pmsg, (i + 1 == num),
694 (i == 0));
695 }
696
697 adap->pch_i2c_xfer_in_progress = false; /* transfer completed */
698
699 mutex_unlock(&pch_mutex);
700
701 return ret;
702}
703
704/**
705 * pch_i2c_func() - return the functionality of the I2C driver
706 * @adap: Pointer to struct i2c_algo_pch_data.
707 */
708static u32 pch_i2c_func(struct i2c_adapter *adap)
709{
710 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;
711}
712
713static struct i2c_algorithm pch_algorithm = {
714 .master_xfer = pch_i2c_xfer,
715 .functionality = pch_i2c_func
716};
717
718/**
719 * pch_i2c_disbl_int() - Disable PCH I2C interrupts
720 * @adap: Pointer to struct i2c_algo_pch_data.
721 */
722static void pch_i2c_disbl_int(struct i2c_algo_pch_data *adap)
723{
724 void __iomem *p = adap->pch_base_address;
725
726 pch_clrbit(adap->pch_base_address, PCH_I2CCTL, NORMAL_INTR_ENBL);
727
728 iowrite32(EEPROM_RST_INTR_DISBL, p + PCH_I2CESRMSK);
729
730 iowrite32(BUFFER_MODE_INTR_DISBL, p + PCH_I2CBUFMSK);
731}
732
733static int __devinit pch_i2c_probe(struct pci_dev *pdev,
734 const struct pci_device_id *id)
735{
736 void __iomem *base_addr;
737 int ret;
738 int i, j;
739 struct adapter_info *adap_info;
740 struct i2c_adapter *pch_adap;
741
742 pch_pci_dbg(pdev, "Entered.\n");
743
744 adap_info = kzalloc((sizeof(struct adapter_info)), GFP_KERNEL);
745 if (adap_info == NULL) {
746 pch_pci_err(pdev, "Memory allocation FAILED\n");
747 return -ENOMEM;
748 }
749
750 ret = pci_enable_device(pdev);
751 if (ret) {
752 pch_pci_err(pdev, "pci_enable_device FAILED\n");
753 goto err_pci_enable;
754 }
755
756 ret = pci_request_regions(pdev, KBUILD_MODNAME);
757 if (ret) {
758 pch_pci_err(pdev, "pci_request_regions FAILED\n");
759 goto err_pci_req;
760 }
761
762 base_addr = pci_iomap(pdev, 1, 0);
763
764 if (base_addr == NULL) {
765 pch_pci_err(pdev, "pci_iomap FAILED\n");
766 ret = -ENOMEM;
767 goto err_pci_iomap;
768 }
769
770 /* Set the number of I2C channel instance */
771 adap_info->ch_num = id->driver_data;
772
773 for (i = 0; i < adap_info->ch_num; i++) {
774 pch_adap = &adap_info->pch_data[i].pch_adapter;
775 adap_info->pch_i2c_suspended = false;
776
777 adap_info->pch_data[i].p_adapter_info = adap_info;
778
779 pch_adap->owner = THIS_MODULE;
780 pch_adap->class = I2C_CLASS_HWMON;
781 strcpy(pch_adap->name, KBUILD_MODNAME);
782 pch_adap->algo = &pch_algorithm;
783 pch_adap->algo_data = &adap_info->pch_data[i];
784
785 /* base_addr + offset; */
786 adap_info->pch_data[i].pch_base_address = base_addr + 0x100 * i;
787
788 pch_adap->dev.parent = &pdev->dev;
789
790 ret = i2c_add_adapter(pch_adap);
791 if (ret) {
792 pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i);
793 goto err_i2c_add_adapter;
794 }
795
796 pch_i2c_init(&adap_info->pch_data[i]);
797 }
798 ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED,
799 KBUILD_MODNAME, adap_info);
800 if (ret) {
801 pch_pci_err(pdev, "request_irq FAILED\n");
802 goto err_i2c_add_adapter;
803 }
804
805 pci_set_drvdata(pdev, adap_info);
806 pch_pci_dbg(pdev, "returns %d.\n", ret);
807 return 0;
808
809err_i2c_add_adapter:
810 for (j = 0; j < i; j++)
811 i2c_del_adapter(&adap_info->pch_data[j].pch_adapter);
812 pci_iounmap(pdev, base_addr);
813err_pci_iomap:
814 pci_release_regions(pdev);
815err_pci_req:
816 pci_disable_device(pdev);
817err_pci_enable:
818 kfree(adap_info);
819 return ret;
820}
821
822static void __devexit pch_i2c_remove(struct pci_dev *pdev)
823{
824 int i;
825 struct adapter_info *adap_info = pci_get_drvdata(pdev);
826
827 free_irq(pdev->irq, adap_info);
828
829 for (i = 0; i < adap_info->ch_num; i++) {
830 pch_i2c_disbl_int(&adap_info->pch_data[i]);
831 i2c_del_adapter(&adap_info->pch_data[i].pch_adapter);
832 }
833
834 if (adap_info->pch_data[0].pch_base_address)
835 pci_iounmap(pdev, adap_info->pch_data[0].pch_base_address);
836
837 for (i = 0; i < adap_info->ch_num; i++)
838 adap_info->pch_data[i].pch_base_address = 0;
839
840 pci_set_drvdata(pdev, NULL);
841
842 pci_release_regions(pdev);
843
844 pci_disable_device(pdev);
845 kfree(adap_info);
846}
847
848#ifdef CONFIG_PM
849static int pch_i2c_suspend(struct pci_dev *pdev, pm_message_t state)
850{
851 int ret;
852 int i;
853 struct adapter_info *adap_info = pci_get_drvdata(pdev);
854 void __iomem *p = adap_info->pch_data[0].pch_base_address;
855
856 adap_info->pch_i2c_suspended = true;
857
858 for (i = 0; i < adap_info->ch_num; i++) {
859 while ((adap_info->pch_data[i].pch_i2c_xfer_in_progress)) {
860 /* Wait until all channel transfers are completed */
861 msleep(20);
862 }
863 }
864
865 /* Disable the i2c interrupts */
866 for (i = 0; i < adap_info->ch_num; i++)
867 pch_i2c_disbl_int(&adap_info->pch_data[i]);
868
869 pch_pci_dbg(pdev, "I2CSR = %x I2CBUFSTA = %x I2CESRSTA = %x "
870 "invoked function pch_i2c_disbl_int successfully\n",
871 ioread32(p + PCH_I2CSR), ioread32(p + PCH_I2CBUFSTA),
872 ioread32(p + PCH_I2CESRSTA));
873
874 ret = pci_save_state(pdev);
875
876 if (ret) {
877 pch_pci_err(pdev, "pci_save_state\n");
878 return ret;
879 }
880
881 pci_enable_wake(pdev, PCI_D3hot, 0);
882 pci_disable_device(pdev);
883 pci_set_power_state(pdev, pci_choose_state(pdev, state));
884
885 return 0;
886}
887
888static int pch_i2c_resume(struct pci_dev *pdev)
889{
890 int i;
891 struct adapter_info *adap_info = pci_get_drvdata(pdev);
892
893 pci_set_power_state(pdev, PCI_D0);
894 pci_restore_state(pdev);
895
896 if (pci_enable_device(pdev) < 0) {
897 pch_pci_err(pdev, "pch_i2c_resume:pci_enable_device FAILED\n");
898 return -EIO;
899 }
900
901 pci_enable_wake(pdev, PCI_D3hot, 0);
902
903 for (i = 0; i < adap_info->ch_num; i++)
904 pch_i2c_init(&adap_info->pch_data[i]);
905
906 adap_info->pch_i2c_suspended = false;
907
908 return 0;
909}
910#else
911#define pch_i2c_suspend NULL
912#define pch_i2c_resume NULL
913#endif
914
915static struct pci_driver pch_pcidriver = {
916 .name = KBUILD_MODNAME,
917 .id_table = pch_pcidev_id,
918 .probe = pch_i2c_probe,
919 .remove = __devexit_p(pch_i2c_remove),
920 .suspend = pch_i2c_suspend,
921 .resume = pch_i2c_resume
922};
923
924static int __init pch_pci_init(void)
925{
926 return pci_register_driver(&pch_pcidriver);
927}
928module_init(pch_pci_init);
929
930static void __exit pch_pci_exit(void)
931{
932 pci_unregister_driver(&pch_pcidriver);
933}
934module_exit(pch_pci_exit);
935
936MODULE_DESCRIPTION("Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH I2C Driver");
937MODULE_LICENSE("GPL");
938MODULE_AUTHOR("Tomoya MORINAGA. <tomoya-linux@dsn.okisemi.com>");
939module_param(pch_i2c_speed, int, (S_IRUSR | S_IWUSR));
940module_param(pch_clk, int, (S_IRUSR | S_IWUSR));
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index e5b1a3bf5b80..37e2e82a9c88 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -22,7 +22,7 @@
22/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even 22/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
23 Frodo Looijaard <frodol@dds.nl> */ 23 Frodo Looijaard <frodol@dds.nl> */
24 24
25/* Partialy rewriten by Oleg I. Vdovikin for mmapped support of 25/* Partially rewriten by Oleg I. Vdovikin for mmapped support of
26 for Alpha Processor Inc. UP-2000(+) boards */ 26 for Alpha Processor Inc. UP-2000(+) boards */
27 27
28#include <linux/kernel.h> 28#include <linux/kernel.h>
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index d9aa9a649e35..a651779d9ff7 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -219,7 +219,7 @@ static void __exit i2c_gpio_exit(void)
219} 219}
220module_exit(i2c_gpio_exit); 220module_exit(i2c_gpio_exit);
221 221
222MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); 222MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
223MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver"); 223MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
224MODULE_LICENSE("GPL"); 224MODULE_LICENSE("GPL");
225MODULE_ALIAS("platform:i2c-gpio"); 225MODULE_ALIAS("platform:i2c-gpio");
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index c60081169cc3..ab26840d0c70 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -3,6 +3,8 @@
3 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker 3 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
4 <mdsxyz123@yahoo.com> 4 <mdsxyz123@yahoo.com>
5 Copyright (C) 2007, 2008 Jean Delvare <khali@linux-fr.org> 5 Copyright (C) 2007, 2008 Jean Delvare <khali@linux-fr.org>
6 Copyright (C) 2010 Intel Corporation,
7 David Woodhouse <dwmw2@infradead.org>
6 8
7 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
@@ -38,11 +40,17 @@
38 82801G (ICH7) 0x27da 32 hard yes yes yes 40 82801G (ICH7) 0x27da 32 hard yes yes yes
39 82801H (ICH8) 0x283e 32 hard yes yes yes 41 82801H (ICH8) 0x283e 32 hard yes yes yes
40 82801I (ICH9) 0x2930 32 hard yes yes yes 42 82801I (ICH9) 0x2930 32 hard yes yes yes
41 Tolapai 0x5032 32 hard yes yes yes 43 EP80579 (Tolapai) 0x5032 32 hard yes yes yes
42 ICH10 0x3a30 32 hard yes yes yes 44 ICH10 0x3a30 32 hard yes yes yes
43 ICH10 0x3a60 32 hard yes yes yes 45 ICH10 0x3a60 32 hard yes yes yes
44 3400/5 Series (PCH) 0x3b30 32 hard yes yes yes 46 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes
45 Cougar Point (PCH) 0x1c22 32 hard yes yes yes 47 6 Series (PCH) 0x1c22 32 hard yes yes yes
48 Patsburg (PCH) 0x1d22 32 hard yes yes yes
49 Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes
50 Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes
51 Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes
52 DH89xxCC (PCH) 0x2330 32 hard yes yes yes
53 Panther Point (PCH) 0x1e22 32 hard yes yes yes
46 54
47 Features supported by this driver: 55 Features supported by this driver:
48 Software PEC no 56 Software PEC no
@@ -50,12 +58,11 @@
50 Block buffer yes 58 Block buffer yes
51 Block process call transaction no 59 Block process call transaction no
52 I2C block read transaction yes (doesn't use the block buffer) 60 I2C block read transaction yes (doesn't use the block buffer)
61 Slave mode no
53 62
54 See the file Documentation/i2c/busses/i2c-i801 for details. 63 See the file Documentation/i2c/busses/i2c-i801 for details.
55*/ 64*/
56 65
57/* Note: we assume there can only be one I801, with one SMBus interface */
58
59#include <linux/module.h> 66#include <linux/module.h>
60#include <linux/pci.h> 67#include <linux/pci.h>
61#include <linux/kernel.h> 68#include <linux/kernel.h>
@@ -67,18 +74,19 @@
67#include <linux/acpi.h> 74#include <linux/acpi.h>
68#include <linux/io.h> 75#include <linux/io.h>
69#include <linux/dmi.h> 76#include <linux/dmi.h>
77#include <linux/slab.h>
70 78
71/* I801 SMBus address offsets */ 79/* I801 SMBus address offsets */
72#define SMBHSTSTS (0 + i801_smba) 80#define SMBHSTSTS(p) (0 + (p)->smba)
73#define SMBHSTCNT (2 + i801_smba) 81#define SMBHSTCNT(p) (2 + (p)->smba)
74#define SMBHSTCMD (3 + i801_smba) 82#define SMBHSTCMD(p) (3 + (p)->smba)
75#define SMBHSTADD (4 + i801_smba) 83#define SMBHSTADD(p) (4 + (p)->smba)
76#define SMBHSTDAT0 (5 + i801_smba) 84#define SMBHSTDAT0(p) (5 + (p)->smba)
77#define SMBHSTDAT1 (6 + i801_smba) 85#define SMBHSTDAT1(p) (6 + (p)->smba)
78#define SMBBLKDAT (7 + i801_smba) 86#define SMBBLKDAT(p) (7 + (p)->smba)
79#define SMBPEC (8 + i801_smba) /* ICH3 and later */ 87#define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */
80#define SMBAUXSTS (12 + i801_smba) /* ICH4 and later */ 88#define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */
81#define SMBAUXCTL (13 + i801_smba) /* ICH4 and later */ 89#define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */
82 90
83/* PCI Address Constants */ 91/* PCI Address Constants */
84#define SMBBAR 4 92#define SMBBAR 4
@@ -89,7 +97,7 @@
89#define SMBHSTCFG_SMB_SMI_EN 2 97#define SMBHSTCFG_SMB_SMI_EN 2
90#define SMBHSTCFG_I2C_EN 4 98#define SMBHSTCFG_I2C_EN 4
91 99
92/* Auxillary control register bits, ICH4+ only */ 100/* Auxiliary control register bits, ICH4+ only */
93#define SMBAUXCTL_CRC 1 101#define SMBAUXCTL_CRC 1
94#define SMBAUXCTL_E32B 2 102#define SMBAUXCTL_E32B 2
95 103
@@ -127,16 +135,33 @@
127 SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \ 135 SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \
128 SMBHSTSTS_INTR) 136 SMBHSTSTS_INTR)
129 137
130static unsigned long i801_smba; 138/* Older devices have their ID defined in <linux/pci_ids.h> */
131static unsigned char i801_original_hstcfg; 139#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
140#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
141/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
142#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
143#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
144#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
145#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22
146#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
147#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
148
149struct i801_priv {
150 struct i2c_adapter adapter;
151 unsigned long smba;
152 unsigned char original_hstcfg;
153 struct pci_dev *pci_dev;
154 unsigned int features;
155};
156
132static struct pci_driver i801_driver; 157static struct pci_driver i801_driver;
133static struct pci_dev *I801_dev;
134 158
135#define FEATURE_SMBUS_PEC (1 << 0) 159#define FEATURE_SMBUS_PEC (1 << 0)
136#define FEATURE_BLOCK_BUFFER (1 << 1) 160#define FEATURE_BLOCK_BUFFER (1 << 1)
137#define FEATURE_BLOCK_PROC (1 << 2) 161#define FEATURE_BLOCK_PROC (1 << 2)
138#define FEATURE_I2C_BLOCK_READ (1 << 3) 162#define FEATURE_I2C_BLOCK_READ (1 << 3)
139static unsigned int i801_features; 163/* Not really a feature, but it's convenient to handle it as such */
164#define FEATURE_IDF (1 << 15)
140 165
141static const char *i801_feature_names[] = { 166static const char *i801_feature_names[] = {
142 "SMBus PEC", 167 "SMBus PEC",
@@ -151,24 +176,24 @@ MODULE_PARM_DESC(disable_features, "Disable selected driver features");
151 176
152/* Make sure the SMBus host is ready to start transmitting. 177/* Make sure the SMBus host is ready to start transmitting.
153 Return 0 if it is, -EBUSY if it is not. */ 178 Return 0 if it is, -EBUSY if it is not. */
154static int i801_check_pre(void) 179static int i801_check_pre(struct i801_priv *priv)
155{ 180{
156 int status; 181 int status;
157 182
158 status = inb_p(SMBHSTSTS); 183 status = inb_p(SMBHSTSTS(priv));
159 if (status & SMBHSTSTS_HOST_BUSY) { 184 if (status & SMBHSTSTS_HOST_BUSY) {
160 dev_err(&I801_dev->dev, "SMBus is busy, can't use it!\n"); 185 dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
161 return -EBUSY; 186 return -EBUSY;
162 } 187 }
163 188
164 status &= STATUS_FLAGS; 189 status &= STATUS_FLAGS;
165 if (status) { 190 if (status) {
166 dev_dbg(&I801_dev->dev, "Clearing status flags (%02x)\n", 191 dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
167 status); 192 status);
168 outb_p(status, SMBHSTSTS); 193 outb_p(status, SMBHSTSTS(priv));
169 status = inb_p(SMBHSTSTS) & STATUS_FLAGS; 194 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
170 if (status) { 195 if (status) {
171 dev_err(&I801_dev->dev, 196 dev_err(&priv->pci_dev->dev,
172 "Failed clearing status flags (%02x)\n", 197 "Failed clearing status flags (%02x)\n",
173 status); 198 status);
174 return -EBUSY; 199 return -EBUSY;
@@ -179,48 +204,50 @@ static int i801_check_pre(void)
179} 204}
180 205
181/* Convert the status register to an error code, and clear it. */ 206/* Convert the status register to an error code, and clear it. */
182static int i801_check_post(int status, int timeout) 207static int i801_check_post(struct i801_priv *priv, int status, int timeout)
183{ 208{
184 int result = 0; 209 int result = 0;
185 210
186 /* If the SMBus is still busy, we give up */ 211 /* If the SMBus is still busy, we give up */
187 if (timeout) { 212 if (timeout) {
188 dev_err(&I801_dev->dev, "Transaction timeout\n"); 213 dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
189 /* try to stop the current command */ 214 /* try to stop the current command */
190 dev_dbg(&I801_dev->dev, "Terminating the current operation\n"); 215 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
191 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT); 216 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
217 SMBHSTCNT(priv));
192 msleep(1); 218 msleep(1);
193 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT); 219 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
220 SMBHSTCNT(priv));
194 221
195 /* Check if it worked */ 222 /* Check if it worked */
196 status = inb_p(SMBHSTSTS); 223 status = inb_p(SMBHSTSTS(priv));
197 if ((status & SMBHSTSTS_HOST_BUSY) || 224 if ((status & SMBHSTSTS_HOST_BUSY) ||
198 !(status & SMBHSTSTS_FAILED)) 225 !(status & SMBHSTSTS_FAILED))
199 dev_err(&I801_dev->dev, 226 dev_err(&priv->pci_dev->dev,
200 "Failed terminating the transaction\n"); 227 "Failed terminating the transaction\n");
201 outb_p(STATUS_FLAGS, SMBHSTSTS); 228 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
202 return -ETIMEDOUT; 229 return -ETIMEDOUT;
203 } 230 }
204 231
205 if (status & SMBHSTSTS_FAILED) { 232 if (status & SMBHSTSTS_FAILED) {
206 result = -EIO; 233 result = -EIO;
207 dev_err(&I801_dev->dev, "Transaction failed\n"); 234 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
208 } 235 }
209 if (status & SMBHSTSTS_DEV_ERR) { 236 if (status & SMBHSTSTS_DEV_ERR) {
210 result = -ENXIO; 237 result = -ENXIO;
211 dev_dbg(&I801_dev->dev, "No response\n"); 238 dev_dbg(&priv->pci_dev->dev, "No response\n");
212 } 239 }
213 if (status & SMBHSTSTS_BUS_ERR) { 240 if (status & SMBHSTSTS_BUS_ERR) {
214 result = -EAGAIN; 241 result = -EAGAIN;
215 dev_dbg(&I801_dev->dev, "Lost arbitration\n"); 242 dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
216 } 243 }
217 244
218 if (result) { 245 if (result) {
219 /* Clear error flags */ 246 /* Clear error flags */
220 outb_p(status & STATUS_FLAGS, SMBHSTSTS); 247 outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
221 status = inb_p(SMBHSTSTS) & STATUS_FLAGS; 248 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
222 if (status) { 249 if (status) {
223 dev_warn(&I801_dev->dev, "Failed clearing status " 250 dev_warn(&priv->pci_dev->dev, "Failed clearing status "
224 "flags at end of transaction (%02x)\n", 251 "flags at end of transaction (%02x)\n",
225 status); 252 status);
226 } 253 }
@@ -229,86 +256,88 @@ static int i801_check_post(int status, int timeout)
229 return result; 256 return result;
230} 257}
231 258
232static int i801_transaction(int xact) 259static int i801_transaction(struct i801_priv *priv, int xact)
233{ 260{
234 int status; 261 int status;
235 int result; 262 int result;
236 int timeout = 0; 263 int timeout = 0;
237 264
238 result = i801_check_pre(); 265 result = i801_check_pre(priv);
239 if (result < 0) 266 if (result < 0)
240 return result; 267 return result;
241 268
242 /* the current contents of SMBHSTCNT can be overwritten, since PEC, 269 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
243 * INTREN, SMBSCMD are passed in xact */ 270 * INTREN, SMBSCMD are passed in xact */
244 outb_p(xact | I801_START, SMBHSTCNT); 271 outb_p(xact | I801_START, SMBHSTCNT(priv));
245 272
246 /* We will always wait for a fraction of a second! */ 273 /* We will always wait for a fraction of a second! */
247 do { 274 do {
248 msleep(1); 275 msleep(1);
249 status = inb_p(SMBHSTSTS); 276 status = inb_p(SMBHSTSTS(priv));
250 } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT)); 277 } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
251 278
252 result = i801_check_post(status, timeout > MAX_TIMEOUT); 279 result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
253 if (result < 0) 280 if (result < 0)
254 return result; 281 return result;
255 282
256 outb_p(SMBHSTSTS_INTR, SMBHSTSTS); 283 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
257 return 0; 284 return 0;
258} 285}
259 286
260/* wait for INTR bit as advised by Intel */ 287/* wait for INTR bit as advised by Intel */
261static void i801_wait_hwpec(void) 288static void i801_wait_hwpec(struct i801_priv *priv)
262{ 289{
263 int timeout = 0; 290 int timeout = 0;
264 int status; 291 int status;
265 292
266 do { 293 do {
267 msleep(1); 294 msleep(1);
268 status = inb_p(SMBHSTSTS); 295 status = inb_p(SMBHSTSTS(priv));
269 } while ((!(status & SMBHSTSTS_INTR)) 296 } while ((!(status & SMBHSTSTS_INTR))
270 && (timeout++ < MAX_TIMEOUT)); 297 && (timeout++ < MAX_TIMEOUT));
271 298
272 if (timeout > MAX_TIMEOUT) 299 if (timeout > MAX_TIMEOUT)
273 dev_dbg(&I801_dev->dev, "PEC Timeout!\n"); 300 dev_dbg(&priv->pci_dev->dev, "PEC Timeout!\n");
274 301
275 outb_p(status, SMBHSTSTS); 302 outb_p(status, SMBHSTSTS(priv));
276} 303}
277 304
278static int i801_block_transaction_by_block(union i2c_smbus_data *data, 305static int i801_block_transaction_by_block(struct i801_priv *priv,
306 union i2c_smbus_data *data,
279 char read_write, int hwpec) 307 char read_write, int hwpec)
280{ 308{
281 int i, len; 309 int i, len;
282 int status; 310 int status;
283 311
284 inb_p(SMBHSTCNT); /* reset the data buffer index */ 312 inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
285 313
286 /* Use 32-byte buffer to process this transaction */ 314 /* Use 32-byte buffer to process this transaction */
287 if (read_write == I2C_SMBUS_WRITE) { 315 if (read_write == I2C_SMBUS_WRITE) {
288 len = data->block[0]; 316 len = data->block[0];
289 outb_p(len, SMBHSTDAT0); 317 outb_p(len, SMBHSTDAT0(priv));
290 for (i = 0; i < len; i++) 318 for (i = 0; i < len; i++)
291 outb_p(data->block[i+1], SMBBLKDAT); 319 outb_p(data->block[i+1], SMBBLKDAT(priv));
292 } 320 }
293 321
294 status = i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 | 322 status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 |
295 I801_PEC_EN * hwpec); 323 I801_PEC_EN * hwpec);
296 if (status) 324 if (status)
297 return status; 325 return status;
298 326
299 if (read_write == I2C_SMBUS_READ) { 327 if (read_write == I2C_SMBUS_READ) {
300 len = inb_p(SMBHSTDAT0); 328 len = inb_p(SMBHSTDAT0(priv));
301 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) 329 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
302 return -EPROTO; 330 return -EPROTO;
303 331
304 data->block[0] = len; 332 data->block[0] = len;
305 for (i = 0; i < len; i++) 333 for (i = 0; i < len; i++)
306 data->block[i + 1] = inb_p(SMBBLKDAT); 334 data->block[i + 1] = inb_p(SMBBLKDAT(priv));
307 } 335 }
308 return 0; 336 return 0;
309} 337}
310 338
311static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data, 339static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
340 union i2c_smbus_data *data,
312 char read_write, int command, 341 char read_write, int command,
313 int hwpec) 342 int hwpec)
314{ 343{
@@ -318,15 +347,15 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
318 int result; 347 int result;
319 int timeout; 348 int timeout;
320 349
321 result = i801_check_pre(); 350 result = i801_check_pre(priv);
322 if (result < 0) 351 if (result < 0)
323 return result; 352 return result;
324 353
325 len = data->block[0]; 354 len = data->block[0];
326 355
327 if (read_write == I2C_SMBUS_WRITE) { 356 if (read_write == I2C_SMBUS_WRITE) {
328 outb_p(len, SMBHSTDAT0); 357 outb_p(len, SMBHSTDAT0(priv));
329 outb_p(data->block[1], SMBBLKDAT); 358 outb_p(data->block[1], SMBBLKDAT(priv));
330 } 359 }
331 360
332 for (i = 1; i <= len; i++) { 361 for (i = 1; i <= len; i++) {
@@ -342,34 +371,37 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
342 else 371 else
343 smbcmd = I801_BLOCK_DATA; 372 smbcmd = I801_BLOCK_DATA;
344 } 373 }
345 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT); 374 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
346 375
347 if (i == 1) 376 if (i == 1)
348 outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT); 377 outb_p(inb(SMBHSTCNT(priv)) | I801_START,
378 SMBHSTCNT(priv));
349 379
350 /* We will always wait for a fraction of a second! */ 380 /* We will always wait for a fraction of a second! */
351 timeout = 0; 381 timeout = 0;
352 do { 382 do {
353 msleep(1); 383 msleep(1);
354 status = inb_p(SMBHSTSTS); 384 status = inb_p(SMBHSTSTS(priv));
355 } while ((!(status & SMBHSTSTS_BYTE_DONE)) 385 } while ((!(status & SMBHSTSTS_BYTE_DONE))
356 && (timeout++ < MAX_TIMEOUT)); 386 && (timeout++ < MAX_TIMEOUT));
357 387
358 result = i801_check_post(status, timeout > MAX_TIMEOUT); 388 result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
359 if (result < 0) 389 if (result < 0)
360 return result; 390 return result;
361 391
362 if (i == 1 && read_write == I2C_SMBUS_READ 392 if (i == 1 && read_write == I2C_SMBUS_READ
363 && command != I2C_SMBUS_I2C_BLOCK_DATA) { 393 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
364 len = inb_p(SMBHSTDAT0); 394 len = inb_p(SMBHSTDAT0(priv));
365 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { 395 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
366 dev_err(&I801_dev->dev, 396 dev_err(&priv->pci_dev->dev,
367 "Illegal SMBus block read size %d\n", 397 "Illegal SMBus block read size %d\n",
368 len); 398 len);
369 /* Recover */ 399 /* Recover */
370 while (inb_p(SMBHSTSTS) & SMBHSTSTS_HOST_BUSY) 400 while (inb_p(SMBHSTSTS(priv)) &
371 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS); 401 SMBHSTSTS_HOST_BUSY)
372 outb_p(SMBHSTSTS_INTR, SMBHSTSTS); 402 outb_p(SMBHSTSTS_BYTE_DONE,
403 SMBHSTSTS(priv));
404 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
373 return -EPROTO; 405 return -EPROTO;
374 } 406 }
375 data->block[0] = len; 407 data->block[0] = len;
@@ -377,27 +409,28 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
377 409
378 /* Retrieve/store value in SMBBLKDAT */ 410 /* Retrieve/store value in SMBBLKDAT */
379 if (read_write == I2C_SMBUS_READ) 411 if (read_write == I2C_SMBUS_READ)
380 data->block[i] = inb_p(SMBBLKDAT); 412 data->block[i] = inb_p(SMBBLKDAT(priv));
381 if (read_write == I2C_SMBUS_WRITE && i+1 <= len) 413 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
382 outb_p(data->block[i+1], SMBBLKDAT); 414 outb_p(data->block[i+1], SMBBLKDAT(priv));
383 415
384 /* signals SMBBLKDAT ready */ 416 /* signals SMBBLKDAT ready */
385 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS); 417 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv));
386 } 418 }
387 419
388 return 0; 420 return 0;
389} 421}
390 422
391static int i801_set_block_buffer_mode(void) 423static int i801_set_block_buffer_mode(struct i801_priv *priv)
392{ 424{
393 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL); 425 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
394 if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0) 426 if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
395 return -EIO; 427 return -EIO;
396 return 0; 428 return 0;
397} 429}
398 430
399/* Block transaction function */ 431/* Block transaction function */
400static int i801_block_transaction(union i2c_smbus_data *data, char read_write, 432static int i801_block_transaction(struct i801_priv *priv,
433 union i2c_smbus_data *data, char read_write,
401 int command, int hwpec) 434 int command, int hwpec)
402{ 435{
403 int result = 0; 436 int result = 0;
@@ -406,11 +439,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
406 if (command == I2C_SMBUS_I2C_BLOCK_DATA) { 439 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
407 if (read_write == I2C_SMBUS_WRITE) { 440 if (read_write == I2C_SMBUS_WRITE) {
408 /* set I2C_EN bit in configuration register */ 441 /* set I2C_EN bit in configuration register */
409 pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc); 442 pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
410 pci_write_config_byte(I801_dev, SMBHSTCFG, 443 pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
411 hostc | SMBHSTCFG_I2C_EN); 444 hostc | SMBHSTCFG_I2C_EN);
412 } else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) { 445 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
413 dev_err(&I801_dev->dev, 446 dev_err(&priv->pci_dev->dev,
414 "I2C block read is unsupported!\n"); 447 "I2C block read is unsupported!\n");
415 return -EOPNOTSUPP; 448 return -EOPNOTSUPP;
416 } 449 }
@@ -429,22 +462,23 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
429 /* Experience has shown that the block buffer can only be used for 462 /* Experience has shown that the block buffer can only be used for
430 SMBus (not I2C) block transactions, even though the datasheet 463 SMBus (not I2C) block transactions, even though the datasheet
431 doesn't mention this limitation. */ 464 doesn't mention this limitation. */
432 if ((i801_features & FEATURE_BLOCK_BUFFER) 465 if ((priv->features & FEATURE_BLOCK_BUFFER)
433 && command != I2C_SMBUS_I2C_BLOCK_DATA 466 && command != I2C_SMBUS_I2C_BLOCK_DATA
434 && i801_set_block_buffer_mode() == 0) 467 && i801_set_block_buffer_mode(priv) == 0)
435 result = i801_block_transaction_by_block(data, read_write, 468 result = i801_block_transaction_by_block(priv, data,
436 hwpec); 469 read_write, hwpec);
437 else 470 else
438 result = i801_block_transaction_byte_by_byte(data, read_write, 471 result = i801_block_transaction_byte_by_byte(priv, data,
472 read_write,
439 command, hwpec); 473 command, hwpec);
440 474
441 if (result == 0 && hwpec) 475 if (result == 0 && hwpec)
442 i801_wait_hwpec(); 476 i801_wait_hwpec(priv);
443 477
444 if (command == I2C_SMBUS_I2C_BLOCK_DATA 478 if (command == I2C_SMBUS_I2C_BLOCK_DATA
445 && read_write == I2C_SMBUS_WRITE) { 479 && read_write == I2C_SMBUS_WRITE) {
446 /* restore saved configuration register value */ 480 /* restore saved configuration register value */
447 pci_write_config_byte(I801_dev, SMBHSTCFG, hostc); 481 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
448 } 482 }
449 return result; 483 return result;
450} 484}
@@ -457,81 +491,85 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
457 int hwpec; 491 int hwpec;
458 int block = 0; 492 int block = 0;
459 int ret, xact = 0; 493 int ret, xact = 0;
494 struct i801_priv *priv = i2c_get_adapdata(adap);
460 495
461 hwpec = (i801_features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) 496 hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
462 && size != I2C_SMBUS_QUICK 497 && size != I2C_SMBUS_QUICK
463 && size != I2C_SMBUS_I2C_BLOCK_DATA; 498 && size != I2C_SMBUS_I2C_BLOCK_DATA;
464 499
465 switch (size) { 500 switch (size) {
466 case I2C_SMBUS_QUICK: 501 case I2C_SMBUS_QUICK:
467 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 502 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
468 SMBHSTADD); 503 SMBHSTADD(priv));
469 xact = I801_QUICK; 504 xact = I801_QUICK;
470 break; 505 break;
471 case I2C_SMBUS_BYTE: 506 case I2C_SMBUS_BYTE:
472 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 507 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
473 SMBHSTADD); 508 SMBHSTADD(priv));
474 if (read_write == I2C_SMBUS_WRITE) 509 if (read_write == I2C_SMBUS_WRITE)
475 outb_p(command, SMBHSTCMD); 510 outb_p(command, SMBHSTCMD(priv));
476 xact = I801_BYTE; 511 xact = I801_BYTE;
477 break; 512 break;
478 case I2C_SMBUS_BYTE_DATA: 513 case I2C_SMBUS_BYTE_DATA:
479 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 514 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
480 SMBHSTADD); 515 SMBHSTADD(priv));
481 outb_p(command, SMBHSTCMD); 516 outb_p(command, SMBHSTCMD(priv));
482 if (read_write == I2C_SMBUS_WRITE) 517 if (read_write == I2C_SMBUS_WRITE)
483 outb_p(data->byte, SMBHSTDAT0); 518 outb_p(data->byte, SMBHSTDAT0(priv));
484 xact = I801_BYTE_DATA; 519 xact = I801_BYTE_DATA;
485 break; 520 break;
486 case I2C_SMBUS_WORD_DATA: 521 case I2C_SMBUS_WORD_DATA:
487 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 522 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
488 SMBHSTADD); 523 SMBHSTADD(priv));
489 outb_p(command, SMBHSTCMD); 524 outb_p(command, SMBHSTCMD(priv));
490 if (read_write == I2C_SMBUS_WRITE) { 525 if (read_write == I2C_SMBUS_WRITE) {
491 outb_p(data->word & 0xff, SMBHSTDAT0); 526 outb_p(data->word & 0xff, SMBHSTDAT0(priv));
492 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); 527 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
493 } 528 }
494 xact = I801_WORD_DATA; 529 xact = I801_WORD_DATA;
495 break; 530 break;
496 case I2C_SMBUS_BLOCK_DATA: 531 case I2C_SMBUS_BLOCK_DATA:
497 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 532 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
498 SMBHSTADD); 533 SMBHSTADD(priv));
499 outb_p(command, SMBHSTCMD); 534 outb_p(command, SMBHSTCMD(priv));
500 block = 1; 535 block = 1;
501 break; 536 break;
502 case I2C_SMBUS_I2C_BLOCK_DATA: 537 case I2C_SMBUS_I2C_BLOCK_DATA:
503 /* NB: page 240 of ICH5 datasheet shows that the R/#W 538 /* NB: page 240 of ICH5 datasheet shows that the R/#W
504 * bit should be cleared here, even when reading */ 539 * bit should be cleared here, even when reading */
505 outb_p((addr & 0x7f) << 1, SMBHSTADD); 540 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
506 if (read_write == I2C_SMBUS_READ) { 541 if (read_write == I2C_SMBUS_READ) {
507 /* NB: page 240 of ICH5 datasheet also shows 542 /* NB: page 240 of ICH5 datasheet also shows
508 * that DATA1 is the cmd field when reading */ 543 * that DATA1 is the cmd field when reading */
509 outb_p(command, SMBHSTDAT1); 544 outb_p(command, SMBHSTDAT1(priv));
510 } else 545 } else
511 outb_p(command, SMBHSTCMD); 546 outb_p(command, SMBHSTCMD(priv));
512 block = 1; 547 block = 1;
513 break; 548 break;
514 default: 549 default:
515 dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size); 550 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
551 size);
516 return -EOPNOTSUPP; 552 return -EOPNOTSUPP;
517 } 553 }
518 554
519 if (hwpec) /* enable/disable hardware PEC */ 555 if (hwpec) /* enable/disable hardware PEC */
520 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_CRC, SMBAUXCTL); 556 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
521 else 557 else
522 outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL); 558 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
559 SMBAUXCTL(priv));
523 560
524 if (block) 561 if (block)
525 ret = i801_block_transaction(data, read_write, size, hwpec); 562 ret = i801_block_transaction(priv, data, read_write, size,
563 hwpec);
526 else 564 else
527 ret = i801_transaction(xact | ENABLE_INT9); 565 ret = i801_transaction(priv, xact | ENABLE_INT9);
528 566
529 /* Some BIOSes don't like it when PEC is enabled at reboot or resume 567 /* Some BIOSes don't like it when PEC is enabled at reboot or resume
530 time, so we forcibly disable it after every transaction. Turn off 568 time, so we forcibly disable it after every transaction. Turn off
531 E32B for the same reason. */ 569 E32B for the same reason. */
532 if (hwpec || block) 570 if (hwpec || block)
533 outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), 571 outb_p(inb_p(SMBAUXCTL(priv)) &
534 SMBAUXCTL); 572 ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
535 573
536 if (block) 574 if (block)
537 return ret; 575 return ret;
@@ -543,10 +581,11 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
543 switch (xact & 0x7f) { 581 switch (xact & 0x7f) {
544 case I801_BYTE: /* Result put in SMBHSTDAT0 */ 582 case I801_BYTE: /* Result put in SMBHSTDAT0 */
545 case I801_BYTE_DATA: 583 case I801_BYTE_DATA:
546 data->byte = inb_p(SMBHSTDAT0); 584 data->byte = inb_p(SMBHSTDAT0(priv));
547 break; 585 break;
548 case I801_WORD_DATA: 586 case I801_WORD_DATA:
549 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); 587 data->word = inb_p(SMBHSTDAT0(priv)) +
588 (inb_p(SMBHSTDAT1(priv)) << 8);
550 break; 589 break;
551 } 590 }
552 return 0; 591 return 0;
@@ -555,11 +594,13 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
555 594
556static u32 i801_func(struct i2c_adapter *adapter) 595static u32 i801_func(struct i2c_adapter *adapter)
557{ 596{
597 struct i801_priv *priv = i2c_get_adapdata(adapter);
598
558 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 599 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
559 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 600 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
560 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | 601 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
561 ((i801_features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | 602 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
562 ((i801_features & FEATURE_I2C_BLOCK_READ) ? 603 ((priv->features & FEATURE_I2C_BLOCK_READ) ?
563 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0); 604 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
564} 605}
565 606
@@ -568,12 +609,6 @@ static const struct i2c_algorithm smbus_algorithm = {
568 .functionality = i801_func, 609 .functionality = i801_func,
569}; 610};
570 611
571static struct i2c_adapter i801_adapter = {
572 .owner = THIS_MODULE,
573 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
574 .algo = &smbus_algorithm,
575};
576
577static const struct pci_device_id i801_ids[] = { 612static const struct pci_device_id i801_ids[] = {
578 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, 613 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
579 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, 614 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
@@ -587,17 +622,23 @@ static const struct pci_device_id i801_ids[] = {
587 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) }, 622 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
588 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) }, 623 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
589 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) }, 624 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
590 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TOLAPAI_1) }, 625 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
591 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) }, 626 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
592 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, 627 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
593 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) }, 628 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
594 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CPT_SMBUS) }, 629 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
630 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
631 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
632 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
633 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
634 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
635 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
595 { 0, } 636 { 0, }
596}; 637};
597 638
598MODULE_DEVICE_TABLE(pci, i801_ids); 639MODULE_DEVICE_TABLE(pci, i801_ids);
599 640
600#if defined CONFIG_INPUT_APANEL || defined CONFIG_INPUT_APANEL_MODULE 641#if defined CONFIG_X86 && defined CONFIG_DMI
601static unsigned char apanel_addr; 642static unsigned char apanel_addr;
602 643
603/* Scan the system ROM for the signature "FJKEYINF" */ 644/* Scan the system ROM for the signature "FJKEYINF" */
@@ -627,11 +668,7 @@ static void __init input_apanel_init(void)
627 } 668 }
628 iounmap(bios); 669 iounmap(bios);
629} 670}
630#else
631static void __init input_apanel_init(void) {}
632#endif
633 671
634#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
635struct dmi_onboard_device_info { 672struct dmi_onboard_device_info {
636 const char *name; 673 const char *name;
637 u8 type; 674 u8 type;
@@ -697,23 +734,60 @@ static void __devinit dmi_check_onboard_devices(const struct dmi_header *dm,
697 dmi_check_onboard_device(type, name, adap); 734 dmi_check_onboard_device(type, name, adap);
698 } 735 }
699} 736}
700#endif 737
738/* Register optional slaves */
739static void __devinit i801_probe_optional_slaves(struct i801_priv *priv)
740{
741 /* Only register slaves on main SMBus channel */
742 if (priv->features & FEATURE_IDF)
743 return;
744
745 if (apanel_addr) {
746 struct i2c_board_info info;
747
748 memset(&info, 0, sizeof(struct i2c_board_info));
749 info.addr = apanel_addr;
750 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
751 i2c_new_device(&priv->adapter, &info);
752 }
753
754 if (dmi_name_in_vendors("FUJITSU"))
755 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
756}
757#else
758static void __init input_apanel_init(void) {}
759static void __devinit i801_probe_optional_slaves(struct i801_priv *priv) {}
760#endif /* CONFIG_X86 && CONFIG_DMI */
701 761
702static int __devinit i801_probe(struct pci_dev *dev, 762static int __devinit i801_probe(struct pci_dev *dev,
703 const struct pci_device_id *id) 763 const struct pci_device_id *id)
704{ 764{
705 unsigned char temp; 765 unsigned char temp;
706 int err, i; 766 int err, i;
767 struct i801_priv *priv;
768
769 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
770 if (!priv)
771 return -ENOMEM;
707 772
708 I801_dev = dev; 773 i2c_set_adapdata(&priv->adapter, priv);
709 i801_features = 0; 774 priv->adapter.owner = THIS_MODULE;
775 priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
776 priv->adapter.algo = &smbus_algorithm;
777
778 priv->pci_dev = dev;
710 switch (dev->device) { 779 switch (dev->device) {
780 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
781 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
782 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
783 priv->features |= FEATURE_IDF;
784 /* fall through */
711 default: 785 default:
712 i801_features |= FEATURE_I2C_BLOCK_READ; 786 priv->features |= FEATURE_I2C_BLOCK_READ;
713 /* fall through */ 787 /* fall through */
714 case PCI_DEVICE_ID_INTEL_82801DB_3: 788 case PCI_DEVICE_ID_INTEL_82801DB_3:
715 i801_features |= FEATURE_SMBUS_PEC; 789 priv->features |= FEATURE_SMBUS_PEC;
716 i801_features |= FEATURE_BLOCK_BUFFER; 790 priv->features |= FEATURE_BLOCK_BUFFER;
717 /* fall through */ 791 /* fall through */
718 case PCI_DEVICE_ID_INTEL_82801CA_3: 792 case PCI_DEVICE_ID_INTEL_82801CA_3:
719 case PCI_DEVICE_ID_INTEL_82801BA_2: 793 case PCI_DEVICE_ID_INTEL_82801BA_2:
@@ -724,11 +798,11 @@ static int __devinit i801_probe(struct pci_dev *dev,
724 798
725 /* Disable features on user request */ 799 /* Disable features on user request */
726 for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { 800 for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
727 if (i801_features & disable_features & (1 << i)) 801 if (priv->features & disable_features & (1 << i))
728 dev_notice(&dev->dev, "%s disabled by user\n", 802 dev_notice(&dev->dev, "%s disabled by user\n",
729 i801_feature_names[i]); 803 i801_feature_names[i]);
730 } 804 }
731 i801_features &= ~disable_features; 805 priv->features &= ~disable_features;
732 806
733 err = pci_enable_device(dev); 807 err = pci_enable_device(dev);
734 if (err) { 808 if (err) {
@@ -738,8 +812,8 @@ static int __devinit i801_probe(struct pci_dev *dev,
738 } 812 }
739 813
740 /* Determine the address of the SMBus area */ 814 /* Determine the address of the SMBus area */
741 i801_smba = pci_resource_start(dev, SMBBAR); 815 priv->smba = pci_resource_start(dev, SMBBAR);
742 if (!i801_smba) { 816 if (!priv->smba) {
743 dev_err(&dev->dev, "SMBus base address uninitialized, " 817 dev_err(&dev->dev, "SMBus base address uninitialized, "
744 "upgrade BIOS\n"); 818 "upgrade BIOS\n");
745 err = -ENODEV; 819 err = -ENODEV;
@@ -755,19 +829,19 @@ static int __devinit i801_probe(struct pci_dev *dev,
755 err = pci_request_region(dev, SMBBAR, i801_driver.name); 829 err = pci_request_region(dev, SMBBAR, i801_driver.name);
756 if (err) { 830 if (err) {
757 dev_err(&dev->dev, "Failed to request SMBus region " 831 dev_err(&dev->dev, "Failed to request SMBus region "
758 "0x%lx-0x%Lx\n", i801_smba, 832 "0x%lx-0x%Lx\n", priv->smba,
759 (unsigned long long)pci_resource_end(dev, SMBBAR)); 833 (unsigned long long)pci_resource_end(dev, SMBBAR));
760 goto exit; 834 goto exit;
761 } 835 }
762 836
763 pci_read_config_byte(I801_dev, SMBHSTCFG, &temp); 837 pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
764 i801_original_hstcfg = temp; 838 priv->original_hstcfg = temp;
765 temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ 839 temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */
766 if (!(temp & SMBHSTCFG_HST_EN)) { 840 if (!(temp & SMBHSTCFG_HST_EN)) {
767 dev_info(&dev->dev, "Enabling SMBus device\n"); 841 dev_info(&dev->dev, "Enabling SMBus device\n");
768 temp |= SMBHSTCFG_HST_EN; 842 temp |= SMBHSTCFG_HST_EN;
769 } 843 }
770 pci_write_config_byte(I801_dev, SMBHSTCFG, temp); 844 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
771 845
772 if (temp & SMBHSTCFG_SMB_SMI_EN) 846 if (temp & SMBHSTCFG_SMB_SMI_EN)
773 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); 847 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
@@ -775,53 +849,45 @@ static int __devinit i801_probe(struct pci_dev *dev,
775 dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n"); 849 dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n");
776 850
777 /* Clear special mode bits */ 851 /* Clear special mode bits */
778 if (i801_features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) 852 if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
779 outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), 853 outb_p(inb_p(SMBAUXCTL(priv)) &
780 SMBAUXCTL); 854 ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
781 855
782 /* set up the sysfs linkage to our parent device */ 856 /* set up the sysfs linkage to our parent device */
783 i801_adapter.dev.parent = &dev->dev; 857 priv->adapter.dev.parent = &dev->dev;
784 858
785 /* Retry up to 3 times on lost arbitration */ 859 /* Retry up to 3 times on lost arbitration */
786 i801_adapter.retries = 3; 860 priv->adapter.retries = 3;
787 861
788 snprintf(i801_adapter.name, sizeof(i801_adapter.name), 862 snprintf(priv->adapter.name, sizeof(priv->adapter.name),
789 "SMBus I801 adapter at %04lx", i801_smba); 863 "SMBus I801 adapter at %04lx", priv->smba);
790 err = i2c_add_adapter(&i801_adapter); 864 err = i2c_add_adapter(&priv->adapter);
791 if (err) { 865 if (err) {
792 dev_err(&dev->dev, "Failed to add SMBus adapter\n"); 866 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
793 goto exit_release; 867 goto exit_release;
794 } 868 }
795 869
796 /* Register optional slaves */ 870 i801_probe_optional_slaves(priv);
797#if defined CONFIG_INPUT_APANEL || defined CONFIG_INPUT_APANEL_MODULE
798 if (apanel_addr) {
799 struct i2c_board_info info;
800
801 memset(&info, 0, sizeof(struct i2c_board_info));
802 info.addr = apanel_addr;
803 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
804 i2c_new_device(&i801_adapter, &info);
805 }
806#endif
807#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
808 if (dmi_name_in_vendors("FUJITSU"))
809 dmi_walk(dmi_check_onboard_devices, &i801_adapter);
810#endif
811 871
872 pci_set_drvdata(dev, priv);
812 return 0; 873 return 0;
813 874
814exit_release: 875exit_release:
815 pci_release_region(dev, SMBBAR); 876 pci_release_region(dev, SMBBAR);
816exit: 877exit:
878 kfree(priv);
817 return err; 879 return err;
818} 880}
819 881
820static void __devexit i801_remove(struct pci_dev *dev) 882static void __devexit i801_remove(struct pci_dev *dev)
821{ 883{
822 i2c_del_adapter(&i801_adapter); 884 struct i801_priv *priv = pci_get_drvdata(dev);
823 pci_write_config_byte(I801_dev, SMBHSTCFG, i801_original_hstcfg); 885
886 i2c_del_adapter(&priv->adapter);
887 pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
824 pci_release_region(dev, SMBBAR); 888 pci_release_region(dev, SMBBAR);
889 pci_set_drvdata(dev, NULL);
890 kfree(priv);
825 /* 891 /*
826 * do not call pci_disable_device(dev) since it can cause hard hangs on 892 * do not call pci_disable_device(dev) since it can cause hard hangs on
827 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) 893 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
@@ -831,8 +897,10 @@ static void __devexit i801_remove(struct pci_dev *dev)
831#ifdef CONFIG_PM 897#ifdef CONFIG_PM
832static int i801_suspend(struct pci_dev *dev, pm_message_t mesg) 898static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
833{ 899{
900 struct i801_priv *priv = pci_get_drvdata(dev);
901
834 pci_save_state(dev); 902 pci_save_state(dev);
835 pci_write_config_byte(dev, SMBHSTCFG, i801_original_hstcfg); 903 pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
836 pci_set_power_state(dev, pci_choose_state(dev, mesg)); 904 pci_set_power_state(dev, pci_choose_state(dev, mesg));
837 return 0; 905 return 0;
838} 906}
@@ -859,7 +927,8 @@ static struct pci_driver i801_driver = {
859 927
860static int __init i2c_i801_init(void) 928static int __init i2c_i801_init(void)
861{ 929{
862 input_apanel_init(); 930 if (dmi_name_in_vendors("FUJITSU"))
931 input_apanel_init();
863 return pci_register_driver(&i801_driver); 932 return pci_register_driver(&i801_driver);
864} 933}
865 934
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 89eedf45d30e..3c110fbc409b 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -41,7 +41,6 @@
41#include <asm/irq.h> 41#include <asm/irq.h>
42#include <linux/io.h> 42#include <linux/io.h>
43#include <linux/i2c.h> 43#include <linux/i2c.h>
44#include <linux/i2c-id.h>
45#include <linux/of_platform.h> 44#include <linux/of_platform.h>
46#include <linux/of_i2c.h> 45#include <linux/of_i2c.h>
47 46
@@ -495,7 +494,7 @@ static int iic_xfer_bytes(struct ibm_iic_private* dev, struct i2c_msg* pm,
495 if (unlikely(ret < 0)) 494 if (unlikely(ret < 0))
496 break; 495 break;
497 else if (unlikely(ret != count)){ 496 else if (unlikely(ret != count)){
498 DBG("%d: xfer_bytes, requested %d, transfered %d\n", 497 DBG("%d: xfer_bytes, requested %d, transferred %d\n",
499 dev->idx, count, ret); 498 dev->idx, count, ret);
500 499
501 /* If it's not a last part of xfer, abort it */ 500 /* If it's not a last part of xfer, abort it */
@@ -594,7 +593,7 @@ static int iic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
594 if (unlikely((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE)){ 593 if (unlikely((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE)){
595 DBG("%d: iic_xfer, bus is not free\n", dev->idx); 594 DBG("%d: iic_xfer, bus is not free\n", dev->idx);
596 595
597 /* Usually it means something serious has happend. 596 /* Usually it means something serious has happened.
598 * We *cannot* have unfinished previous transfer 597 * We *cannot* have unfinished previous transfer
599 * so it doesn't make any sense to try to stop it. 598 * so it doesn't make any sense to try to stop it.
600 * Probably we were not able to recover from the 599 * Probably we were not able to recover from the
@@ -692,8 +691,7 @@ static int __devinit iic_request_irq(struct platform_device *ofdev,
692/* 691/*
693 * Register single IIC interface 692 * Register single IIC interface
694 */ 693 */
695static int __devinit iic_probe(struct platform_device *ofdev, 694static int __devinit iic_probe(struct platform_device *ofdev)
696 const struct of_device_id *match)
697{ 695{
698 struct device_node *np = ofdev->dev.of_node; 696 struct device_node *np = ofdev->dev.of_node;
699 struct ibm_iic_private *dev; 697 struct ibm_iic_private *dev;
@@ -807,7 +805,7 @@ static const struct of_device_id ibm_iic_match[] = {
807 {} 805 {}
808}; 806};
809 807
810static struct of_platform_driver ibm_iic_driver = { 808static struct platform_driver ibm_iic_driver = {
811 .driver = { 809 .driver = {
812 .name = "ibm-iic", 810 .name = "ibm-iic",
813 .owner = THIS_MODULE, 811 .owner = THIS_MODULE,
@@ -819,12 +817,12 @@ static struct of_platform_driver ibm_iic_driver = {
819 817
820static int __init iic_init(void) 818static int __init iic_init(void)
821{ 819{
822 return of_register_platform_driver(&ibm_iic_driver); 820 return platform_driver_register(&ibm_iic_driver);
823} 821}
824 822
825static void __exit iic_exit(void) 823static void __exit iic_exit(void)
826{ 824{
827 of_unregister_platform_driver(&ibm_iic_driver); 825 platform_driver_unregister(&ibm_iic_driver);
828} 826}
829 827
830module_init(iic_init); 828module_init(iic_init);
diff --git a/drivers/i2c/busses/i2c-intel-mid.c b/drivers/i2c/busses/i2c-intel-mid.c
new file mode 100644
index 000000000000..e828ac85cfa7
--- /dev/null
+++ b/drivers/i2c/busses/i2c-intel-mid.c
@@ -0,0 +1,1135 @@
1/*
2 * Support for Moorestown/Medfield I2C chip
3 *
4 * Copyright (c) 2009 Intel Corporation.
5 * Copyright (c) 2009 Synopsys. Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License, version
9 * 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT ANY
12 * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
13 * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc., 51
18 * Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/err.h>
25#include <linux/slab.h>
26#include <linux/stat.h>
27#include <linux/delay.h>
28#include <linux/i2c.h>
29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/interrupt.h>
32#include <linux/pm_runtime.h>
33#include <linux/io.h>
34
35#define DRIVER_NAME "i2c-intel-mid"
36#define VERSION "Version 0.5ac2"
37#define PLATFORM "Moorestown/Medfield"
38
39/* Tables use: 0 Moorestown, 1 Medfield */
40#define NUM_PLATFORMS 2
41enum platform_enum {
42 MOORESTOWN = 0,
43 MEDFIELD = 1,
44};
45
46enum mid_i2c_status {
47 STATUS_IDLE = 0,
48 STATUS_READ_START,
49 STATUS_READ_IN_PROGRESS,
50 STATUS_READ_SUCCESS,
51 STATUS_WRITE_START,
52 STATUS_WRITE_SUCCESS,
53 STATUS_XFER_ABORT,
54 STATUS_STANDBY
55};
56
57/**
58 * struct intel_mid_i2c_private - per device I²C context
59 * @adap: core i2c layer adapter information
60 * @dev: device reference for power management
61 * @base: register base
62 * @speed: speed mode for this port
63 * @complete: completion object for transaction wait
64 * @abort: reason for last abort
65 * @rx_buf: pointer into working receive buffer
66 * @rx_buf_len: receive buffer length
67 * @status: adapter state machine
68 * @msg: the message we are currently processing
69 * @platform: the MID device type we are part of
70 * @lock: transaction serialization
71 *
72 * We allocate one of these per device we discover, it holds the core
73 * i2c layer objects and the data we need to track privately.
74 */
75struct intel_mid_i2c_private {
76 struct i2c_adapter adap;
77 struct device *dev;
78 void __iomem *base;
79 int speed;
80 struct completion complete;
81 int abort;
82 u8 *rx_buf;
83 int rx_buf_len;
84 enum mid_i2c_status status;
85 struct i2c_msg *msg;
86 enum platform_enum platform;
87 struct mutex lock;
88};
89
90#define NUM_SPEEDS 3
91
92#define ACTIVE 0
93#define STANDBY 1
94
95
96/* Control register */
97#define IC_CON 0x00
98#define SLV_DIS (1 << 6) /* Disable slave mode */
99#define RESTART (1 << 5) /* Send a Restart condition */
100#define ADDR_10BIT (1 << 4) /* 10-bit addressing */
101#define STANDARD_MODE (1 << 1) /* standard mode */
102#define FAST_MODE (2 << 1) /* fast mode */
103#define HIGH_MODE (3 << 1) /* high speed mode */
104#define MASTER_EN (1 << 0) /* Master mode */
105
106/* Target address register */
107#define IC_TAR 0x04
108#define IC_TAR_10BIT_ADDR (1 << 12) /* 10-bit addressing */
109#define IC_TAR_SPECIAL (1 << 11) /* Perform special I2C cmd */
110#define IC_TAR_GC_OR_START (1 << 10) /* 0: Gerneral Call Address */
111 /* 1: START BYTE */
112/* Slave Address Register */
113#define IC_SAR 0x08 /* Not used in Master mode */
114
115/* High Speed Master Mode Code Address Register */
116#define IC_HS_MADDR 0x0c
117
118/* Rx/Tx Data Buffer and Command Register */
119#define IC_DATA_CMD 0x10
120#define IC_RD (1 << 8) /* 1: Read 0: Write */
121
122/* Standard Speed Clock SCL High Count Register */
123#define IC_SS_SCL_HCNT 0x14
124
125/* Standard Speed Clock SCL Low Count Register */
126#define IC_SS_SCL_LCNT 0x18
127
128/* Fast Speed Clock SCL High Count Register */
129#define IC_FS_SCL_HCNT 0x1c
130
131/* Fast Spedd Clock SCL Low Count Register */
132#define IC_FS_SCL_LCNT 0x20
133
134/* High Speed Clock SCL High Count Register */
135#define IC_HS_SCL_HCNT 0x24
136
137/* High Speed Clock SCL Low Count Register */
138#define IC_HS_SCL_LCNT 0x28
139
140/* Interrupt Status Register */
141#define IC_INTR_STAT 0x2c /* Read only */
142#define R_GEN_CALL (1 << 11)
143#define R_START_DET (1 << 10)
144#define R_STOP_DET (1 << 9)
145#define R_ACTIVITY (1 << 8)
146#define R_RX_DONE (1 << 7)
147#define R_TX_ABRT (1 << 6)
148#define R_RD_REQ (1 << 5)
149#define R_TX_EMPTY (1 << 4)
150#define R_TX_OVER (1 << 3)
151#define R_RX_FULL (1 << 2)
152#define R_RX_OVER (1 << 1)
153#define R_RX_UNDER (1 << 0)
154
155/* Interrupt Mask Register */
156#define IC_INTR_MASK 0x30 /* Read and Write */
157#define M_GEN_CALL (1 << 11)
158#define M_START_DET (1 << 10)
159#define M_STOP_DET (1 << 9)
160#define M_ACTIVITY (1 << 8)
161#define M_RX_DONE (1 << 7)
162#define M_TX_ABRT (1 << 6)
163#define M_RD_REQ (1 << 5)
164#define M_TX_EMPTY (1 << 4)
165#define M_TX_OVER (1 << 3)
166#define M_RX_FULL (1 << 2)
167#define M_RX_OVER (1 << 1)
168#define M_RX_UNDER (1 << 0)
169
170/* Raw Interrupt Status Register */
171#define IC_RAW_INTR_STAT 0x34 /* Read Only */
172#define GEN_CALL (1 << 11) /* General call */
173#define START_DET (1 << 10) /* (RE)START occurred */
174#define STOP_DET (1 << 9) /* STOP occurred */
175#define ACTIVITY (1 << 8) /* Bus busy */
176#define RX_DONE (1 << 7) /* Not used in Master mode */
177#define TX_ABRT (1 << 6) /* Transmit Abort */
178#define RD_REQ (1 << 5) /* Not used in Master mode */
179#define TX_EMPTY (1 << 4) /* TX FIFO <= threshold */
180#define TX_OVER (1 << 3) /* TX FIFO overflow */
181#define RX_FULL (1 << 2) /* RX FIFO >= threshold */
182#define RX_OVER (1 << 1) /* RX FIFO overflow */
183#define RX_UNDER (1 << 0) /* RX FIFO empty */
184
185/* Receive FIFO Threshold Register */
186#define IC_RX_TL 0x38
187
188/* Transmit FIFO Treshold Register */
189#define IC_TX_TL 0x3c
190
191/* Clear Combined and Individual Interrupt Register */
192#define IC_CLR_INTR 0x40
193#define CLR_INTR (1 << 0)
194
195/* Clear RX_UNDER Interrupt Register */
196#define IC_CLR_RX_UNDER 0x44
197#define CLR_RX_UNDER (1 << 0)
198
199/* Clear RX_OVER Interrupt Register */
200#define IC_CLR_RX_OVER 0x48
201#define CLR_RX_OVER (1 << 0)
202
203/* Clear TX_OVER Interrupt Register */
204#define IC_CLR_TX_OVER 0x4c
205#define CLR_TX_OVER (1 << 0)
206
207#define IC_CLR_RD_REQ 0x50
208
209/* Clear TX_ABRT Interrupt Register */
210#define IC_CLR_TX_ABRT 0x54
211#define CLR_TX_ABRT (1 << 0)
212#define IC_CLR_RX_DONE 0x58
213
214/* Clear ACTIVITY Interrupt Register */
215#define IC_CLR_ACTIVITY 0x5c
216#define CLR_ACTIVITY (1 << 0)
217
218/* Clear STOP_DET Interrupt Register */
219#define IC_CLR_STOP_DET 0x60
220#define CLR_STOP_DET (1 << 0)
221
222/* Clear START_DET Interrupt Register */
223#define IC_CLR_START_DET 0x64
224#define CLR_START_DET (1 << 0)
225
226/* Clear GEN_CALL Interrupt Register */
227#define IC_CLR_GEN_CALL 0x68
228#define CLR_GEN_CALL (1 << 0)
229
230/* Enable Register */
231#define IC_ENABLE 0x6c
232#define ENABLE (1 << 0)
233
234/* Status Register */
235#define IC_STATUS 0x70 /* Read Only */
236#define STAT_SLV_ACTIVITY (1 << 6) /* Slave not in idle */
237#define STAT_MST_ACTIVITY (1 << 5) /* Master not in idle */
238#define STAT_RFF (1 << 4) /* RX FIFO Full */
239#define STAT_RFNE (1 << 3) /* RX FIFO Not Empty */
240#define STAT_TFE (1 << 2) /* TX FIFO Empty */
241#define STAT_TFNF (1 << 1) /* TX FIFO Not Full */
242#define STAT_ACTIVITY (1 << 0) /* Activity Status */
243
244/* Transmit FIFO Level Register */
245#define IC_TXFLR 0x74 /* Read Only */
246#define TXFLR (1 << 0) /* TX FIFO level */
247
248/* Receive FIFO Level Register */
249#define IC_RXFLR 0x78 /* Read Only */
250#define RXFLR (1 << 0) /* RX FIFO level */
251
252/* Transmit Abort Source Register */
253#define IC_TX_ABRT_SOURCE 0x80
254#define ABRT_SLVRD_INTX (1 << 15)
255#define ABRT_SLV_ARBLOST (1 << 14)
256#define ABRT_SLVFLUSH_TXFIFO (1 << 13)
257#define ARB_LOST (1 << 12)
258#define ABRT_MASTER_DIS (1 << 11)
259#define ABRT_10B_RD_NORSTRT (1 << 10)
260#define ABRT_SBYTE_NORSTRT (1 << 9)
261#define ABRT_HS_NORSTRT (1 << 8)
262#define ABRT_SBYTE_ACKDET (1 << 7)
263#define ABRT_HS_ACKDET (1 << 6)
264#define ABRT_GCALL_READ (1 << 5)
265#define ABRT_GCALL_NOACK (1 << 4)
266#define ABRT_TXDATA_NOACK (1 << 3)
267#define ABRT_10ADDR2_NOACK (1 << 2)
268#define ABRT_10ADDR1_NOACK (1 << 1)
269#define ABRT_7B_ADDR_NOACK (1 << 0)
270
271/* Enable Status Register */
272#define IC_ENABLE_STATUS 0x9c
273#define IC_EN (1 << 0) /* I2C in an enabled state */
274
275/* Component Parameter Register 1*/
276#define IC_COMP_PARAM_1 0xf4
277#define APB_DATA_WIDTH (0x3 << 0)
278
279/* added by xiaolin --begin */
280#define SS_MIN_SCL_HIGH 4000
281#define SS_MIN_SCL_LOW 4700
282#define FS_MIN_SCL_HIGH 600
283#define FS_MIN_SCL_LOW 1300
284#define HS_MIN_SCL_HIGH_100PF 60
285#define HS_MIN_SCL_LOW_100PF 120
286
287#define STANDARD 0
288#define FAST 1
289#define HIGH 2
290
291#define NUM_SPEEDS 3
292
293static int speed_mode[6] = {
294 FAST,
295 FAST,
296 FAST,
297 STANDARD,
298 FAST,
299 FAST
300};
301
302static int ctl_num = 6;
303module_param_array(speed_mode, int, &ctl_num, S_IRUGO);
304MODULE_PARM_DESC(speed_mode, "Set the speed of the i2c interface (0-2)");
305
306/**
307 * intel_mid_i2c_disable - Disable I2C controller
308 * @adap: struct pointer to i2c_adapter
309 *
310 * Return Value:
311 * 0 success
312 * -EBUSY if device is busy
313 * -ETIMEDOUT if i2c cannot be disabled within the given time
314 *
315 * I2C bus state should be checked prior to disabling the hardware. If bus is
316 * not in idle state, an errno is returned. Write "0" to IC_ENABLE to disable
317 * I2C controller.
318 */
319static int intel_mid_i2c_disable(struct i2c_adapter *adap)
320{
321 struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
322 int err = 0;
323 int count = 0;
324 int ret1, ret2;
325 static const u16 delay[NUM_SPEEDS] = {100, 25, 3};
326
327 /* Set IC_ENABLE to 0 */
328 writel(0, i2c->base + IC_ENABLE);
329
330 /* Check if device is busy */
331 dev_dbg(&adap->dev, "mrst i2c disable\n");
332 while ((ret1 = readl(i2c->base + IC_ENABLE_STATUS) & 0x1)
333 || (ret2 = readl(i2c->base + IC_STATUS) & 0x1)) {
334 udelay(delay[i2c->speed]);
335 writel(0, i2c->base + IC_ENABLE);
336 dev_dbg(&adap->dev, "i2c is busy, count is %d speed %d\n",
337 count, i2c->speed);
338 if (count++ > 10) {
339 err = -ETIMEDOUT;
340 break;
341 }
342 }
343
344 /* Clear all interrupts */
345 readl(i2c->base + IC_CLR_INTR);
346 readl(i2c->base + IC_CLR_STOP_DET);
347 readl(i2c->base + IC_CLR_START_DET);
348 readl(i2c->base + IC_CLR_ACTIVITY);
349 readl(i2c->base + IC_CLR_TX_ABRT);
350 readl(i2c->base + IC_CLR_RX_OVER);
351 readl(i2c->base + IC_CLR_RX_UNDER);
352 readl(i2c->base + IC_CLR_TX_OVER);
353 readl(i2c->base + IC_CLR_RX_DONE);
354 readl(i2c->base + IC_CLR_GEN_CALL);
355
356 /* Disable all interupts */
357 writel(0x0000, i2c->base + IC_INTR_MASK);
358
359 return err;
360}
361
362/**
363 * intel_mid_i2c_hwinit - Initialize the I2C hardware registers
364 * @dev: pci device struct pointer
365 *
366 * This function will be called in intel_mid_i2c_probe() before device
367 * registration.
368 *
369 * Return Values:
370 * 0 success
371 * -EBUSY i2c cannot be disabled
372 * -ETIMEDOUT i2c cannot be disabled
373 * -EFAULT If APB data width is not 32-bit wide
374 *
375 * I2C should be disabled prior to other register operation. If failed, an
376 * errno is returned. Mask and Clear all interrpts, this should be done at
377 * first. Set common registers which will not be modified during normal
378 * transfers, including: control register, FIFO threshold and clock freq.
379 * Check APB data width at last.
380 */
381static int intel_mid_i2c_hwinit(struct intel_mid_i2c_private *i2c)
382{
383 int err;
384
385 static const u16 hcnt[NUM_PLATFORMS][NUM_SPEEDS] = {
386 { 0x75, 0x15, 0x07 },
387 { 0x04c, 0x10, 0x06 }
388 };
389 static const u16 lcnt[NUM_PLATFORMS][NUM_SPEEDS] = {
390 { 0x7C, 0x21, 0x0E },
391 { 0x053, 0x19, 0x0F }
392 };
393
394 /* Disable i2c first */
395 err = intel_mid_i2c_disable(&i2c->adap);
396 if (err)
397 return err;
398
399 /*
400 * Setup clock frequency and speed mode
401 * Enable restart condition,
402 * enable master FSM, disable slave FSM,
403 * use target address when initiating transfer
404 */
405
406 writel((i2c->speed + 1) << 1 | SLV_DIS | RESTART | MASTER_EN,
407 i2c->base + IC_CON);
408 writel(hcnt[i2c->platform][i2c->speed],
409 i2c->base + (IC_SS_SCL_HCNT + (i2c->speed << 3)));
410 writel(lcnt[i2c->platform][i2c->speed],
411 i2c->base + (IC_SS_SCL_LCNT + (i2c->speed << 3)));
412
413 /* Set tranmit & receive FIFO threshold to zero */
414 writel(0x0, i2c->base + IC_RX_TL);
415 writel(0x0, i2c->base + IC_TX_TL);
416
417 return 0;
418}
419
420/**
421 * intel_mid_i2c_func - Return the supported three I2C operations.
422 * @adapter: i2c_adapter struct pointer
423 */
424static u32 intel_mid_i2c_func(struct i2c_adapter *adapter)
425{
426 return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR | I2C_FUNC_SMBUS_EMUL;
427}
428
429/**
430 * intel_mid_i2c_address_neq - To check if the addresses for different i2c messages
431 * are equal.
432 * @p1: first i2c_msg
433 * @p2: second i2c_msg
434 *
435 * Return Values:
436 * 0 if addresses are equal
437 * 1 if not equal
438 *
439 * Within a single transfer, the I2C client may need to send its address more
440 * than once. So a check if the addresses match is needed.
441 */
442static inline bool intel_mid_i2c_address_neq(const struct i2c_msg *p1,
443 const struct i2c_msg *p2)
444{
445 if (p1->addr != p2->addr)
446 return 1;
447 if ((p1->flags ^ p2->flags) & I2C_M_TEN)
448 return 1;
449 return 0;
450}
451
452/**
453 * intel_mid_i2c_abort - To handle transfer abortions and print error messages.
454 * @adap: i2c_adapter struct pointer
455 *
456 * By reading register IC_TX_ABRT_SOURCE, various transfer errors can be
457 * distingushed. At present, no circumstances have been found out that
458 * multiple errors would be occurred simutaneously, so we simply use the
459 * register value directly.
460 *
461 * At last the error bits are cleared. (Note clear ABRT_SBYTE_NORSTRT bit need
462 * a few extra steps)
463 */
464static void intel_mid_i2c_abort(struct intel_mid_i2c_private *i2c)
465{
466 /* Read about source register */
467 int abort = i2c->abort;
468 struct i2c_adapter *adap = &i2c->adap;
469
470 /* Single transfer error check:
471 * According to databook, TX/RX FIFOs would be flushed when
472 * the abort interrupt occurred.
473 */
474 if (abort & ABRT_MASTER_DIS)
475 dev_err(&adap->dev,
476 "initiate master operation with master mode disabled.\n");
477 if (abort & ABRT_10B_RD_NORSTRT)
478 dev_err(&adap->dev,
479 "RESTART disabled and master sent READ cmd in 10-bit addressing.\n");
480
481 if (abort & ABRT_SBYTE_NORSTRT) {
482 dev_err(&adap->dev,
483 "RESTART disabled and user is trying to send START byte.\n");
484 writel(~ABRT_SBYTE_NORSTRT, i2c->base + IC_TX_ABRT_SOURCE);
485 writel(RESTART, i2c->base + IC_CON);
486 writel(~IC_TAR_SPECIAL, i2c->base + IC_TAR);
487 }
488
489 if (abort & ABRT_SBYTE_ACKDET)
490 dev_err(&adap->dev,
491 "START byte was not acknowledged.\n");
492 if (abort & ABRT_TXDATA_NOACK)
493 dev_dbg(&adap->dev,
494 "No acknowledgement received from slave.\n");
495 if (abort & ABRT_10ADDR2_NOACK)
496 dev_dbg(&adap->dev,
497 "The 2nd address byte of the 10-bit address was not acknowledged.\n");
498 if (abort & ABRT_10ADDR1_NOACK)
499 dev_dbg(&adap->dev,
500 "The 1st address byte of 10-bit address was not acknowledged.\n");
501 if (abort & ABRT_7B_ADDR_NOACK)
502 dev_dbg(&adap->dev,
503 "I2C slave device not acknowledged.\n");
504
505 /* Clear TX_ABRT bit */
506 readl(i2c->base + IC_CLR_TX_ABRT);
507 i2c->status = STATUS_XFER_ABORT;
508}
509
510/**
511 * xfer_read - Internal function to implement master read transfer.
512 * @adap: i2c_adapter struct pointer
513 * @buf: buffer in i2c_msg
514 * @length: number of bytes to be read
515 *
516 * Return Values:
517 * 0 if the read transfer succeeds
518 * -ETIMEDOUT if cannot read the "raw" interrupt register
519 * -EINVAL if a transfer abort occurred
520 *
521 * For every byte, a "READ" command will be loaded into IC_DATA_CMD prior to
522 * data transfer. The actual "read" operation will be performed if an RX_FULL
523 * interrupt occurred.
524 *
525 * Note there may be two interrupt signals captured, one should read
526 * IC_RAW_INTR_STAT to separate between errors and actual data.
527 */
528static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
529{
530 struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
531 int i = length;
532 int err;
533
534 if (length >= 256) {
535 dev_err(&adap->dev,
536 "I2C FIFO cannot support larger than 256 bytes\n");
537 return -EMSGSIZE;
538 }
539
540 INIT_COMPLETION(i2c->complete);
541
542 readl(i2c->base + IC_CLR_INTR);
543 writel(0x0044, i2c->base + IC_INTR_MASK);
544
545 i2c->status = STATUS_READ_START;
546
547 while (i--)
548 writel(IC_RD, i2c->base + IC_DATA_CMD);
549
550 i2c->status = STATUS_READ_START;
551 err = wait_for_completion_interruptible_timeout(&i2c->complete, HZ);
552 if (!err) {
553 dev_err(&adap->dev, "Timeout for ACK from I2C slave device\n");
554 intel_mid_i2c_hwinit(i2c);
555 return -ETIMEDOUT;
556 }
557 if (i2c->status == STATUS_READ_SUCCESS)
558 return 0;
559 else
560 return -EIO;
561}
562
563/**
564 * xfer_write - Internal function to implement master write transfer.
565 * @adap: i2c_adapter struct pointer
566 * @buf: buffer in i2c_msg
567 * @length: number of bytes to be read
568 *
569 * Return Values:
570 * 0 if the read transfer succeeds
571 * -ETIMEDOUT if we cannot read the "raw" interrupt register
572 * -EINVAL if a transfer abort occurred
573 *
574 * For every byte, a "WRITE" command will be loaded into IC_DATA_CMD prior to
575 * data transfer. The actual "write" operation will be performed when the
576 * RX_FULL interrupt signal occurs.
577 *
578 * Note there may be two interrupt signals captured, one should read
579 * IC_RAW_INTR_STAT to separate between errors and actual data.
580 */
581static int xfer_write(struct i2c_adapter *adap,
582 unsigned char *buf, int length)
583{
584 struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
585 int i, err;
586
587 if (length >= 256) {
588 dev_err(&adap->dev,
589 "I2C FIFO cannot support larger than 256 bytes\n");
590 return -EMSGSIZE;
591 }
592
593 INIT_COMPLETION(i2c->complete);
594
595 readl(i2c->base + IC_CLR_INTR);
596 writel(0x0050, i2c->base + IC_INTR_MASK);
597
598 i2c->status = STATUS_WRITE_START;
599 for (i = 0; i < length; i++)
600 writel((u16)(*(buf + i)), i2c->base + IC_DATA_CMD);
601
602 i2c->status = STATUS_WRITE_START;
603 err = wait_for_completion_interruptible_timeout(&i2c->complete, HZ);
604 if (!err) {
605 dev_err(&adap->dev, "Timeout for ACK from I2C slave device\n");
606 intel_mid_i2c_hwinit(i2c);
607 return -ETIMEDOUT;
608 } else {
609 if (i2c->status == STATUS_WRITE_SUCCESS)
610 return 0;
611 else
612 return -EIO;
613 }
614}
615
616static int intel_mid_i2c_setup(struct i2c_adapter *adap, struct i2c_msg *pmsg)
617{
618 struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
619 int err;
620 u32 reg;
621 u32 bit_mask;
622 u32 mode;
623
624 /* Disable device first */
625 err = intel_mid_i2c_disable(adap);
626 if (err) {
627 dev_err(&adap->dev,
628 "Cannot disable i2c controller, timeout\n");
629 return err;
630 }
631
632 mode = (1 + i2c->speed) << 1;
633 /* set the speed mode */
634 reg = readl(i2c->base + IC_CON);
635 if ((reg & 0x06) != mode) {
636 dev_dbg(&adap->dev, "set mode %d\n", i2c->speed);
637 writel((reg & ~0x6) | mode, i2c->base + IC_CON);
638 }
639
640 reg = readl(i2c->base + IC_CON);
641 /* use 7-bit addressing */
642 if (pmsg->flags & I2C_M_TEN) {
643 if ((reg & ADDR_10BIT) != ADDR_10BIT) {
644 dev_dbg(&adap->dev, "set i2c 10 bit address mode\n");
645 writel(reg | ADDR_10BIT, i2c->base + IC_CON);
646 }
647 } else {
648 if ((reg & ADDR_10BIT) != 0x0) {
649 dev_dbg(&adap->dev, "set i2c 7 bit address mode\n");
650 writel(reg & ~ADDR_10BIT, i2c->base + IC_CON);
651 }
652 }
653 /* enable restart conditions */
654 reg = readl(i2c->base + IC_CON);
655 if ((reg & RESTART) != RESTART) {
656 dev_dbg(&adap->dev, "enable restart conditions\n");
657 writel(reg | RESTART, i2c->base + IC_CON);
658 }
659
660 /* enable master FSM */
661 reg = readl(i2c->base + IC_CON);
662 dev_dbg(&adap->dev, "ic_con reg is 0x%x\n", reg);
663 writel(reg | MASTER_EN, i2c->base + IC_CON);
664 if ((reg & SLV_DIS) != SLV_DIS) {
665 dev_dbg(&adap->dev, "enable master FSM\n");
666 writel(reg | SLV_DIS, i2c->base + IC_CON);
667 dev_dbg(&adap->dev, "ic_con reg is 0x%x\n", reg);
668 }
669
670 /* use target address when initiating transfer */
671 reg = readl(i2c->base + IC_TAR);
672 bit_mask = IC_TAR_SPECIAL | IC_TAR_GC_OR_START;
673
674 if ((reg & bit_mask) != 0x0) {
675 dev_dbg(&adap->dev,
676 "WR: use target address when intiating transfer, i2c_tx_target\n");
677 writel(reg & ~bit_mask, i2c->base + IC_TAR);
678 }
679
680 /* set target address to the I2C slave address */
681 dev_dbg(&adap->dev,
682 "set target address to the I2C slave address, addr is %x\n",
683 pmsg->addr);
684 writel(pmsg->addr | (pmsg->flags & I2C_M_TEN ? IC_TAR_10BIT_ADDR : 0),
685 i2c->base + IC_TAR);
686
687 /* Enable I2C controller */
688 writel(ENABLE, i2c->base + IC_ENABLE);
689
690 return 0;
691}
692
693/**
694 * intel_mid_i2c_xfer - Main master transfer routine.
695 * @adap: i2c_adapter struct pointer
696 * @pmsg: i2c_msg struct pointer
697 * @num: number of i2c_msg
698 *
699 * Return Values:
700 * + number of messages transferred
701 * -ETIMEDOUT If cannot disable I2C controller or read IC_STATUS
702 * -EINVAL If the address in i2c_msg is invalid
703 *
704 * This function will be registered in i2c-core and exposed to external
705 * I2C clients.
706 * 1. Disable I2C controller
707 * 2. Unmask three interrupts: RX_FULL, TX_EMPTY, TX_ABRT
708 * 3. Check if address in i2c_msg is valid
709 * 4. Enable I2C controller
710 * 5. Perform real transfer (call xfer_read or xfer_write)
711 * 6. Wait until the current transfer is finished (check bus state)
712 * 7. Mask and clear all interrupts
713 */
714static int intel_mid_i2c_xfer(struct i2c_adapter *adap,
715 struct i2c_msg *pmsg,
716 int num)
717{
718 struct intel_mid_i2c_private *i2c = i2c_get_adapdata(adap);
719 int i, err = 0;
720
721 /* if number of messages equal 0*/
722 if (num == 0)
723 return 0;
724
725 pm_runtime_get(i2c->dev);
726
727 mutex_lock(&i2c->lock);
728 dev_dbg(&adap->dev, "intel_mid_i2c_xfer, process %d msg(s)\n", num);
729 dev_dbg(&adap->dev, "slave address is %x\n", pmsg->addr);
730
731
732 if (i2c->status != STATUS_IDLE) {
733 dev_err(&adap->dev, "Adapter %d in transfer/standby\n",
734 adap->nr);
735 mutex_unlock(&i2c->lock);
736 pm_runtime_put(i2c->dev);
737 return -1;
738 }
739
740
741 for (i = 1; i < num; i++) {
742 /* Message address equal? */
743 if (unlikely(intel_mid_i2c_address_neq(&pmsg[0], &pmsg[i]))) {
744 dev_err(&adap->dev, "Invalid address in msg[%d]\n", i);
745 mutex_unlock(&i2c->lock);
746 pm_runtime_put(i2c->dev);
747 return -EINVAL;
748 }
749 }
750
751 if (intel_mid_i2c_setup(adap, pmsg)) {
752 mutex_unlock(&i2c->lock);
753 pm_runtime_put(i2c->dev);
754 return -EINVAL;
755 }
756
757 for (i = 0; i < num; i++) {
758 i2c->msg = pmsg;
759 i2c->status = STATUS_IDLE;
760 /* Read or Write */
761 if (pmsg->flags & I2C_M_RD) {
762 dev_dbg(&adap->dev, "I2C_M_RD\n");
763 err = xfer_read(adap, pmsg->buf, pmsg->len);
764 } else {
765 dev_dbg(&adap->dev, "I2C_M_WR\n");
766 err = xfer_write(adap, pmsg->buf, pmsg->len);
767 }
768 if (err < 0)
769 break;
770 dev_dbg(&adap->dev, "msg[%d] transfer complete\n", i);
771 pmsg++; /* next message */
772 }
773
774 /* Mask interrupts */
775 writel(0x0000, i2c->base + IC_INTR_MASK);
776 /* Clear all interrupts */
777 readl(i2c->base + IC_CLR_INTR);
778
779 i2c->status = STATUS_IDLE;
780 mutex_unlock(&i2c->lock);
781 pm_runtime_put(i2c->dev);
782
783 return err;
784}
785
786static int intel_mid_i2c_runtime_suspend(struct device *dev)
787{
788 struct pci_dev *pdev = to_pci_dev(dev);
789 struct intel_mid_i2c_private *i2c = pci_get_drvdata(pdev);
790 struct i2c_adapter *adap = to_i2c_adapter(dev);
791 int err;
792
793 if (i2c->status != STATUS_IDLE)
794 return -1;
795
796 intel_mid_i2c_disable(adap);
797
798 err = pci_save_state(pdev);
799 if (err) {
800 dev_err(dev, "pci_save_state failed\n");
801 return err;
802 }
803
804 err = pci_set_power_state(pdev, PCI_D3hot);
805 if (err) {
806 dev_err(dev, "pci_set_power_state failed\n");
807 return err;
808 }
809 i2c->status = STATUS_STANDBY;
810
811 return 0;
812}
813
814static int intel_mid_i2c_runtime_resume(struct device *dev)
815{
816 struct pci_dev *pdev = to_pci_dev(dev);
817 struct intel_mid_i2c_private *i2c = pci_get_drvdata(pdev);
818 int err;
819
820 if (i2c->status != STATUS_STANDBY)
821 return 0;
822
823 pci_set_power_state(pdev, PCI_D0);
824 pci_restore_state(pdev);
825 err = pci_enable_device(pdev);
826 if (err) {
827 dev_err(dev, "pci_enable_device failed\n");
828 return err;
829 }
830
831 i2c->status = STATUS_IDLE;
832
833 intel_mid_i2c_hwinit(i2c);
834 return err;
835}
836
837static void i2c_isr_read(struct intel_mid_i2c_private *i2c)
838{
839 struct i2c_msg *msg = i2c->msg;
840 int rx_num;
841 u32 len;
842 u8 *buf;
843
844 if (!(msg->flags & I2C_M_RD))
845 return;
846
847 if (i2c->status != STATUS_READ_IN_PROGRESS) {
848 len = msg->len;
849 buf = msg->buf;
850 } else {
851 len = i2c->rx_buf_len;
852 buf = i2c->rx_buf;
853 }
854
855 rx_num = readl(i2c->base + IC_RXFLR);
856
857 for (; len > 0 && rx_num > 0; len--, rx_num--)
858 *buf++ = readl(i2c->base + IC_DATA_CMD);
859
860 if (len > 0) {
861 i2c->status = STATUS_READ_IN_PROGRESS;
862 i2c->rx_buf_len = len;
863 i2c->rx_buf = buf;
864 } else
865 i2c->status = STATUS_READ_SUCCESS;
866
867 return;
868}
869
870static irqreturn_t intel_mid_i2c_isr(int this_irq, void *dev)
871{
872 struct intel_mid_i2c_private *i2c = dev;
873 u32 stat = readl(i2c->base + IC_INTR_STAT);
874
875 if (!stat)
876 return IRQ_NONE;
877
878 dev_dbg(&i2c->adap.dev, "%s, stat = 0x%x\n", __func__, stat);
879 stat &= 0x54;
880
881 if (i2c->status != STATUS_WRITE_START &&
882 i2c->status != STATUS_READ_START &&
883 i2c->status != STATUS_READ_IN_PROGRESS)
884 goto err;
885
886 if (stat & TX_ABRT)
887 i2c->abort = readl(i2c->base + IC_TX_ABRT_SOURCE);
888
889 readl(i2c->base + IC_CLR_INTR);
890
891 if (stat & TX_ABRT) {
892 intel_mid_i2c_abort(i2c);
893 goto exit;
894 }
895
896 if (stat & RX_FULL) {
897 i2c_isr_read(i2c);
898 goto exit;
899 }
900
901 if (stat & TX_EMPTY) {
902 if (readl(i2c->base + IC_STATUS) & 0x4)
903 i2c->status = STATUS_WRITE_SUCCESS;
904 }
905
906exit:
907 if (i2c->status == STATUS_READ_SUCCESS ||
908 i2c->status == STATUS_WRITE_SUCCESS ||
909 i2c->status == STATUS_XFER_ABORT) {
910 /* Clear all interrupts */
911 readl(i2c->base + IC_CLR_INTR);
912 /* Mask interrupts */
913 writel(0, i2c->base + IC_INTR_MASK);
914 complete(&i2c->complete);
915 }
916err:
917 return IRQ_HANDLED;
918}
919
920static struct i2c_algorithm intel_mid_i2c_algorithm = {
921 .master_xfer = intel_mid_i2c_xfer,
922 .functionality = intel_mid_i2c_func,
923};
924
925
926static const struct dev_pm_ops intel_mid_i2c_pm_ops = {
927 .runtime_suspend = intel_mid_i2c_runtime_suspend,
928 .runtime_resume = intel_mid_i2c_runtime_resume,
929};
930
931/**
932 * intel_mid_i2c_probe - I2C controller initialization routine
933 * @dev: pci device
934 * @id: device id
935 *
936 * Return Values:
937 * 0 success
938 * -ENODEV If cannot allocate pci resource
939 * -ENOMEM If the register base remapping failed, or
940 * if kzalloc failed
941 *
942 * Initialization steps:
943 * 1. Request for PCI resource
944 * 2. Remap the start address of PCI resource to register base
945 * 3. Request for device memory region
946 * 4. Fill in the struct members of intel_mid_i2c_private
947 * 5. Call intel_mid_i2c_hwinit() for hardware initialization
948 * 6. Register I2C adapter in i2c-core
949 */
950static int __devinit intel_mid_i2c_probe(struct pci_dev *dev,
951 const struct pci_device_id *id)
952{
953 struct intel_mid_i2c_private *mrst;
954 unsigned long start, len;
955 int err, busnum;
956 void __iomem *base = NULL;
957
958 dev_dbg(&dev->dev, "Get into probe function for I2C\n");
959 err = pci_enable_device(dev);
960 if (err) {
961 dev_err(&dev->dev, "Failed to enable I2C PCI device (%d)\n",
962 err);
963 goto exit;
964 }
965
966 /* Determine the address of the I2C area */
967 start = pci_resource_start(dev, 0);
968 len = pci_resource_len(dev, 0);
969 if (!start || len == 0) {
970 dev_err(&dev->dev, "base address not set\n");
971 err = -ENODEV;
972 goto exit;
973 }
974 dev_dbg(&dev->dev, "%s i2c resource start 0x%lx, len=%ld\n",
975 PLATFORM, start, len);
976
977 err = pci_request_region(dev, 0, DRIVER_NAME);
978 if (err) {
979 dev_err(&dev->dev, "failed to request I2C region "
980 "0x%lx-0x%lx\n", start,
981 (unsigned long)pci_resource_end(dev, 0));
982 goto exit;
983 }
984
985 base = ioremap_nocache(start, len);
986 if (!base) {
987 dev_err(&dev->dev, "I/O memory remapping failed\n");
988 err = -ENOMEM;
989 goto fail0;
990 }
991
992 /* Allocate the per-device data structure, intel_mid_i2c_private */
993 mrst = kzalloc(sizeof(struct intel_mid_i2c_private), GFP_KERNEL);
994 if (mrst == NULL) {
995 dev_err(&dev->dev, "can't allocate interface\n");
996 err = -ENOMEM;
997 goto fail1;
998 }
999
1000 /* Initialize struct members */
1001 snprintf(mrst->adap.name, sizeof(mrst->adap.name),
1002 "Intel MID I2C at %lx", start);
1003 mrst->adap.owner = THIS_MODULE;
1004 mrst->adap.algo = &intel_mid_i2c_algorithm;
1005 mrst->adap.dev.parent = &dev->dev;
1006 mrst->dev = &dev->dev;
1007 mrst->base = base;
1008 mrst->speed = STANDARD;
1009 mrst->abort = 0;
1010 mrst->rx_buf_len = 0;
1011 mrst->status = STATUS_IDLE;
1012
1013 pci_set_drvdata(dev, mrst);
1014 i2c_set_adapdata(&mrst->adap, mrst);
1015
1016 mrst->adap.nr = busnum = id->driver_data;
1017 if (dev->device <= 0x0804)
1018 mrst->platform = MOORESTOWN;
1019 else
1020 mrst->platform = MEDFIELD;
1021
1022 dev_dbg(&dev->dev, "I2C%d\n", busnum);
1023
1024 if (ctl_num > busnum) {
1025 if (speed_mode[busnum] < 0 || speed_mode[busnum] >= NUM_SPEEDS)
1026 dev_warn(&dev->dev, "invalid speed %d ignored.\n",
1027 speed_mode[busnum]);
1028 else
1029 mrst->speed = speed_mode[busnum];
1030 }
1031
1032 /* Initialize i2c controller */
1033 err = intel_mid_i2c_hwinit(mrst);
1034 if (err < 0) {
1035 dev_err(&dev->dev, "I2C interface initialization failed\n");
1036 goto fail2;
1037 }
1038
1039 mutex_init(&mrst->lock);
1040 init_completion(&mrst->complete);
1041
1042 /* Clear all interrupts */
1043 readl(mrst->base + IC_CLR_INTR);
1044 writel(0x0000, mrst->base + IC_INTR_MASK);
1045
1046 err = request_irq(dev->irq, intel_mid_i2c_isr, IRQF_SHARED,
1047 mrst->adap.name, mrst);
1048 if (err) {
1049 dev_err(&dev->dev, "Failed to request IRQ for I2C controller: "
1050 "%s", mrst->adap.name);
1051 goto fail2;
1052 }
1053
1054 /* Adapter registration */
1055 err = i2c_add_numbered_adapter(&mrst->adap);
1056 if (err) {
1057 dev_err(&dev->dev, "Adapter %s registration failed\n",
1058 mrst->adap.name);
1059 goto fail3;
1060 }
1061
1062 dev_dbg(&dev->dev, "%s I2C bus %d driver bind success.\n",
1063 (mrst->platform == MOORESTOWN) ? "Moorestown" : "Medfield",
1064 busnum);
1065
1066 pm_runtime_enable(&dev->dev);
1067 return 0;
1068
1069fail3:
1070 free_irq(dev->irq, mrst);
1071fail2:
1072 pci_set_drvdata(dev, NULL);
1073 kfree(mrst);
1074fail1:
1075 iounmap(base);
1076fail0:
1077 pci_release_region(dev, 0);
1078exit:
1079 return err;
1080}
1081
1082static void __devexit intel_mid_i2c_remove(struct pci_dev *dev)
1083{
1084 struct intel_mid_i2c_private *mrst = pci_get_drvdata(dev);
1085 intel_mid_i2c_disable(&mrst->adap);
1086 if (i2c_del_adapter(&mrst->adap))
1087 dev_err(&dev->dev, "Failed to delete i2c adapter");
1088
1089 free_irq(dev->irq, mrst);
1090 pci_set_drvdata(dev, NULL);
1091 iounmap(mrst->base);
1092 kfree(mrst);
1093 pci_release_region(dev, 0);
1094}
1095
1096static struct pci_device_id intel_mid_i2c_ids[] = {
1097 /* Moorestown */
1098 { PCI_VDEVICE(INTEL, 0x0802), 0 },
1099 { PCI_VDEVICE(INTEL, 0x0803), 1 },
1100 { PCI_VDEVICE(INTEL, 0x0804), 2 },
1101 /* Medfield */
1102 { PCI_VDEVICE(INTEL, 0x0817), 3,},
1103 { PCI_VDEVICE(INTEL, 0x0818), 4 },
1104 { PCI_VDEVICE(INTEL, 0x0819), 5 },
1105 { PCI_VDEVICE(INTEL, 0x082C), 0 },
1106 { PCI_VDEVICE(INTEL, 0x082D), 1 },
1107 { PCI_VDEVICE(INTEL, 0x082E), 2 },
1108 { 0,}
1109};
1110MODULE_DEVICE_TABLE(pci, intel_mid_i2c_ids);
1111
1112static struct pci_driver intel_mid_i2c_driver = {
1113 .name = DRIVER_NAME,
1114 .id_table = intel_mid_i2c_ids,
1115 .probe = intel_mid_i2c_probe,
1116 .remove = __devexit_p(intel_mid_i2c_remove),
1117};
1118
1119static int __init intel_mid_i2c_init(void)
1120{
1121 return pci_register_driver(&intel_mid_i2c_driver);
1122}
1123
1124static void __exit intel_mid_i2c_exit(void)
1125{
1126 pci_unregister_driver(&intel_mid_i2c_driver);
1127}
1128
1129module_init(intel_mid_i2c_init);
1130module_exit(intel_mid_i2c_exit);
1131
1132MODULE_AUTHOR("Ba Zheng <zheng.ba@intel.com>");
1133MODULE_DESCRIPTION("I2C driver for Moorestown Platform");
1134MODULE_LICENSE("GPL");
1135MODULE_VERSION(VERSION);
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index 112c61f7b8cd..f09c9319a2ba 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -409,7 +409,7 @@ iop3xx_i2c_remove(struct platform_device *pdev)
409 IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE); 409 IOP3XX_ICR_RXFULL_IE | IOP3XX_ICR_TXEMPTY_IE);
410 __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET); 410 __raw_writel(cr, adapter_data->ioaddr + CR_OFFSET);
411 411
412 iounmap((void __iomem*)adapter_data->ioaddr); 412 iounmap(adapter_data->ioaddr);
413 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); 413 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE);
414 kfree(adapter_data); 414 kfree(adapter_data);
415 kfree(padapter); 415 kfree(padapter);
@@ -453,7 +453,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
453 /* set the adapter enumeration # */ 453 /* set the adapter enumeration # */
454 adapter_data->id = i2c_id++; 454 adapter_data->id = i2c_id++;
455 455
456 adapter_data->ioaddr = (u32)ioremap(res->start, IOP3XX_I2C_IO_SIZE); 456 adapter_data->ioaddr = ioremap(res->start, IOP3XX_I2C_IO_SIZE);
457 if (!adapter_data->ioaddr) { 457 if (!adapter_data->ioaddr) {
458 ret = -ENOMEM; 458 ret = -ENOMEM;
459 goto release_region; 459 goto release_region;
@@ -498,7 +498,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
498 return 0; 498 return 0;
499 499
500unmap: 500unmap:
501 iounmap((void __iomem*)adapter_data->ioaddr); 501 iounmap(adapter_data->ioaddr);
502 502
503release_region: 503release_region:
504 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE); 504 release_mem_region(res->start, IOP3XX_I2C_IO_SIZE);
diff --git a/drivers/i2c/busses/i2c-iop3xx.h b/drivers/i2c/busses/i2c-iop3xx.h
index 8485861f6a36..097e270955d0 100644
--- a/drivers/i2c/busses/i2c-iop3xx.h
+++ b/drivers/i2c/busses/i2c-iop3xx.h
@@ -97,7 +97,7 @@
97#define IOP3XX_I2C_IO_SIZE 0x18 97#define IOP3XX_I2C_IO_SIZE 0x18
98 98
99struct i2c_algo_iop3xx_data { 99struct i2c_algo_iop3xx_data {
100 u32 ioaddr; 100 void __iomem *ioaddr;
101 wait_queue_head_t waitq; 101 wait_queue_head_t waitq;
102 spinlock_t lock; 102 spinlock_t lock;
103 u32 SR_enabled, SR_received; 103 u32 SR_enabled, SR_received;
diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c
index ddc258edb34f..0682f8f277b0 100644
--- a/drivers/i2c/busses/i2c-isch.c
+++ b/drivers/i2c/busses/i2c-isch.c
@@ -141,7 +141,7 @@ static int sch_transaction(void)
141 * This is the main access entry for i2c-sch access 141 * This is the main access entry for i2c-sch access
142 * adap is i2c_adapter pointer, addr is the i2c device bus address, read_write 142 * adap is i2c_adapter pointer, addr is the i2c device bus address, read_write
143 * (0 for read and 1 for write), size is i2c transaction type and data is the 143 * (0 for read and 1 for write), size is i2c transaction type and data is the
144 * union of transaction for data to be transfered or data read from bus. 144 * union of transaction for data to be transferred or data read from bus.
145 * return 0 for success and others for failure. 145 * return 0 for success and others for failure.
146 */ 146 */
147static s32 sch_access(struct i2c_adapter *adap, u16 addr, 147static s32 sch_access(struct i2c_adapter *adap, u16 addr,
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index b74e6dc6886c..107397a606b4 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -560,15 +560,20 @@ static struct i2c_adapter mpc_ops = {
560 .timeout = HZ, 560 .timeout = HZ,
561}; 561};
562 562
563static int __devinit fsl_i2c_probe(struct platform_device *op, 563static const struct of_device_id mpc_i2c_of_match[];
564 const struct of_device_id *match) 564static int __devinit fsl_i2c_probe(struct platform_device *op)
565{ 565{
566 const struct of_device_id *match;
566 struct mpc_i2c *i2c; 567 struct mpc_i2c *i2c;
567 const u32 *prop; 568 const u32 *prop;
568 u32 clock = MPC_I2C_CLOCK_LEGACY; 569 u32 clock = MPC_I2C_CLOCK_LEGACY;
569 int result = 0; 570 int result = 0;
570 int plen; 571 int plen;
571 572
573 match = of_match_device(mpc_i2c_of_match, &op->dev);
574 if (!match)
575 return -EINVAL;
576
572 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL); 577 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
573 if (!i2c) 578 if (!i2c)
574 return -ENOMEM; 579 return -ENOMEM;
@@ -700,7 +705,7 @@ static const struct of_device_id mpc_i2c_of_match[] = {
700MODULE_DEVICE_TABLE(of, mpc_i2c_of_match); 705MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
701 706
702/* Structure for a device driver */ 707/* Structure for a device driver */
703static struct of_platform_driver mpc_i2c_driver = { 708static struct platform_driver mpc_i2c_driver = {
704 .probe = fsl_i2c_probe, 709 .probe = fsl_i2c_probe,
705 .remove = __devexit_p(fsl_i2c_remove), 710 .remove = __devexit_p(fsl_i2c_remove),
706 .driver = { 711 .driver = {
@@ -712,18 +717,12 @@ static struct of_platform_driver mpc_i2c_driver = {
712 717
713static int __init fsl_i2c_init(void) 718static int __init fsl_i2c_init(void)
714{ 719{
715 int rv; 720 return platform_driver_register(&mpc_i2c_driver);
716
717 rv = of_register_platform_driver(&mpc_i2c_driver);
718 if (rv)
719 printk(KERN_ERR DRV_NAME
720 " of_register_platform_driver failed (%i)\n", rv);
721 return rv;
722} 721}
723 722
724static void __exit fsl_i2c_exit(void) 723static void __exit fsl_i2c_exit(void)
725{ 724{
726 of_unregister_platform_driver(&mpc_i2c_driver); 725 platform_driver_unregister(&mpc_i2c_driver);
727} 726}
728 727
729module_init(fsl_i2c_init); 728module_init(fsl_i2c_init);
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index 16242063144f..a9941c65f226 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -59,6 +59,7 @@ enum {
59 MV64XXX_I2C_STATE_INVALID, 59 MV64XXX_I2C_STATE_INVALID,
60 MV64XXX_I2C_STATE_IDLE, 60 MV64XXX_I2C_STATE_IDLE,
61 MV64XXX_I2C_STATE_WAITING_FOR_START_COND, 61 MV64XXX_I2C_STATE_WAITING_FOR_START_COND,
62 MV64XXX_I2C_STATE_WAITING_FOR_RESTART,
62 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK, 63 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK,
63 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_2_ACK, 64 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_2_ACK,
64 MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK, 65 MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK,
@@ -70,6 +71,7 @@ enum {
70 MV64XXX_I2C_ACTION_INVALID, 71 MV64XXX_I2C_ACTION_INVALID,
71 MV64XXX_I2C_ACTION_CONTINUE, 72 MV64XXX_I2C_ACTION_CONTINUE,
72 MV64XXX_I2C_ACTION_SEND_START, 73 MV64XXX_I2C_ACTION_SEND_START,
74 MV64XXX_I2C_ACTION_SEND_RESTART,
73 MV64XXX_I2C_ACTION_SEND_ADDR_1, 75 MV64XXX_I2C_ACTION_SEND_ADDR_1,
74 MV64XXX_I2C_ACTION_SEND_ADDR_2, 76 MV64XXX_I2C_ACTION_SEND_ADDR_2,
75 MV64XXX_I2C_ACTION_SEND_DATA, 77 MV64XXX_I2C_ACTION_SEND_DATA,
@@ -91,6 +93,7 @@ struct mv64xxx_i2c_data {
91 u32 addr2; 93 u32 addr2;
92 u32 bytes_left; 94 u32 bytes_left;
93 u32 byte_posn; 95 u32 byte_posn;
96 u32 send_stop;
94 u32 block; 97 u32 block;
95 int rc; 98 int rc;
96 u32 freq_m; 99 u32 freq_m;
@@ -159,8 +162,15 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
159 if ((drv_data->bytes_left == 0) 162 if ((drv_data->bytes_left == 0)
160 || (drv_data->aborting 163 || (drv_data->aborting
161 && (drv_data->byte_posn != 0))) { 164 && (drv_data->byte_posn != 0))) {
162 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; 165 if (drv_data->send_stop) {
163 drv_data->state = MV64XXX_I2C_STATE_IDLE; 166 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP;
167 drv_data->state = MV64XXX_I2C_STATE_IDLE;
168 } else {
169 drv_data->action =
170 MV64XXX_I2C_ACTION_SEND_RESTART;
171 drv_data->state =
172 MV64XXX_I2C_STATE_WAITING_FOR_RESTART;
173 }
164 } else { 174 } else {
165 drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA; 175 drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA;
166 drv_data->state = 176 drv_data->state =
@@ -228,6 +238,15 @@ static void
228mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data) 238mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
229{ 239{
230 switch(drv_data->action) { 240 switch(drv_data->action) {
241 case MV64XXX_I2C_ACTION_SEND_RESTART:
242 drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
243 drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
244 writel(drv_data->cntl_bits,
245 drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
246 drv_data->block = 0;
247 wake_up_interruptible(&drv_data->waitq);
248 break;
249
231 case MV64XXX_I2C_ACTION_CONTINUE: 250 case MV64XXX_I2C_ACTION_CONTINUE:
232 writel(drv_data->cntl_bits, 251 writel(drv_data->cntl_bits,
233 drv_data->reg_base + MV64XXX_I2C_REG_CONTROL); 252 drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
@@ -386,7 +405,8 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data)
386} 405}
387 406
388static int 407static int
389mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg) 408mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
409 int is_first, int is_last)
390{ 410{
391 unsigned long flags; 411 unsigned long flags;
392 412
@@ -406,10 +426,18 @@ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg)
406 drv_data->bytes_left--; 426 drv_data->bytes_left--;
407 } 427 }
408 } else { 428 } else {
409 drv_data->action = MV64XXX_I2C_ACTION_SEND_START; 429 if (is_first) {
410 drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND; 430 drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
431 drv_data->state =
432 MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
433 } else {
434 drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_1;
435 drv_data->state =
436 MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK;
437 }
411 } 438 }
412 439
440 drv_data->send_stop = is_last;
413 drv_data->block = 1; 441 drv_data->block = 1;
414 mv64xxx_i2c_do_action(drv_data); 442 mv64xxx_i2c_do_action(drv_data);
415 spin_unlock_irqrestore(&drv_data->lock, flags); 443 spin_unlock_irqrestore(&drv_data->lock, flags);
@@ -437,9 +465,12 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
437 struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); 465 struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
438 int i, rc; 466 int i, rc;
439 467
440 for (i=0; i<num; i++) 468 for (i = 0; i < num; i++) {
441 if ((rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[i])) < 0) 469 rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[i],
470 i == 0, i + 1 == num);
471 if (rc < 0)
442 return rc; 472 return rc;
473 }
443 474
444 return num; 475 return num;
445} 476}
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
new file mode 100644
index 000000000000..7e78f7c87857
--- /dev/null
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -0,0 +1,412 @@
1/*
2 * Freescale MXS I2C bus driver
3 *
4 * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
5 *
6 * based on a (non-working) driver which was:
7 *
8 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
9 *
10 * TODO: add dma-support if platform-support for it is available
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 */
18
19#include <linux/slab.h>
20#include <linux/device.h>
21#include <linux/module.h>
22#include <linux/i2c.h>
23#include <linux/err.h>
24#include <linux/interrupt.h>
25#include <linux/completion.h>
26#include <linux/platform_device.h>
27#include <linux/jiffies.h>
28#include <linux/io.h>
29
30#include <mach/common.h>
31
32#define DRIVER_NAME "mxs-i2c"
33
34#define MXS_I2C_CTRL0 (0x00)
35#define MXS_I2C_CTRL0_SET (0x04)
36
37#define MXS_I2C_CTRL0_SFTRST 0x80000000
38#define MXS_I2C_CTRL0_SEND_NAK_ON_LAST 0x02000000
39#define MXS_I2C_CTRL0_RETAIN_CLOCK 0x00200000
40#define MXS_I2C_CTRL0_POST_SEND_STOP 0x00100000
41#define MXS_I2C_CTRL0_PRE_SEND_START 0x00080000
42#define MXS_I2C_CTRL0_MASTER_MODE 0x00020000
43#define MXS_I2C_CTRL0_DIRECTION 0x00010000
44#define MXS_I2C_CTRL0_XFER_COUNT(v) ((v) & 0x0000FFFF)
45
46#define MXS_I2C_CTRL1 (0x40)
47#define MXS_I2C_CTRL1_SET (0x44)
48#define MXS_I2C_CTRL1_CLR (0x48)
49
50#define MXS_I2C_CTRL1_BUS_FREE_IRQ 0x80
51#define MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ 0x40
52#define MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ 0x20
53#define MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ 0x10
54#define MXS_I2C_CTRL1_EARLY_TERM_IRQ 0x08
55#define MXS_I2C_CTRL1_MASTER_LOSS_IRQ 0x04
56#define MXS_I2C_CTRL1_SLAVE_STOP_IRQ 0x02
57#define MXS_I2C_CTRL1_SLAVE_IRQ 0x01
58
59#define MXS_I2C_IRQ_MASK (MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | \
60 MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ | \
61 MXS_I2C_CTRL1_EARLY_TERM_IRQ | \
62 MXS_I2C_CTRL1_MASTER_LOSS_IRQ | \
63 MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \
64 MXS_I2C_CTRL1_SLAVE_IRQ)
65
66#define MXS_I2C_QUEUECTRL (0x60)
67#define MXS_I2C_QUEUECTRL_SET (0x64)
68#define MXS_I2C_QUEUECTRL_CLR (0x68)
69
70#define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20
71#define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04
72
73#define MXS_I2C_QUEUESTAT (0x70)
74#define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000
75
76#define MXS_I2C_QUEUECMD (0x80)
77
78#define MXS_I2C_QUEUEDATA (0x90)
79
80#define MXS_I2C_DATA (0xa0)
81
82
83#define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \
84 MXS_I2C_CTRL0_PRE_SEND_START | \
85 MXS_I2C_CTRL0_MASTER_MODE | \
86 MXS_I2C_CTRL0_DIRECTION | \
87 MXS_I2C_CTRL0_XFER_COUNT(1))
88
89#define MXS_CMD_I2C_WRITE (MXS_I2C_CTRL0_PRE_SEND_START | \
90 MXS_I2C_CTRL0_MASTER_MODE | \
91 MXS_I2C_CTRL0_DIRECTION)
92
93#define MXS_CMD_I2C_READ (MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \
94 MXS_I2C_CTRL0_MASTER_MODE)
95
96/**
97 * struct mxs_i2c_dev - per device, private MXS-I2C data
98 *
99 * @dev: driver model device node
100 * @regs: IO registers pointer
101 * @cmd_complete: completion object for transaction wait
102 * @cmd_err: error code for last transaction
103 * @adapter: i2c subsystem adapter node
104 */
105struct mxs_i2c_dev {
106 struct device *dev;
107 void __iomem *regs;
108 struct completion cmd_complete;
109 u32 cmd_err;
110 struct i2c_adapter adapter;
111};
112
113/*
114 * TODO: check if calls to here are really needed. If not, we could get rid of
115 * mxs_reset_block and the mach-dependency. Needs an I2C analyzer, probably.
116 */
117static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
118{
119 mxs_reset_block(i2c->regs);
120 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
121 writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
122 i2c->regs + MXS_I2C_QUEUECTRL_SET);
123}
124
125static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len,
126 int flags)
127{
128 u32 data;
129
130 writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD);
131
132 data = (addr << 1) | I2C_SMBUS_READ;
133 writel(data, i2c->regs + MXS_I2C_DATA);
134
135 data = MXS_CMD_I2C_READ | MXS_I2C_CTRL0_XFER_COUNT(len) | flags;
136 writel(data, i2c->regs + MXS_I2C_QUEUECMD);
137}
138
139static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c,
140 u8 addr, u8 *buf, int len, int flags)
141{
142 u32 data;
143 int i, shifts_left;
144
145 data = MXS_CMD_I2C_WRITE | MXS_I2C_CTRL0_XFER_COUNT(len + 1) | flags;
146 writel(data, i2c->regs + MXS_I2C_QUEUECMD);
147
148 /*
149 * We have to copy the slave address (u8) and buffer (arbitrary number
150 * of u8) into the data register (u32). To achieve that, the u8 are put
151 * into the MSBs of 'data' which is then shifted for the next u8. When
152 * appropriate, 'data' is written to MXS_I2C_DATA. So, the first u32
153 * looks like this:
154 *
155 * 3 2 1 0
156 * 10987654|32109876|54321098|76543210
157 * --------+--------+--------+--------
158 * buffer+2|buffer+1|buffer+0|slave_addr
159 */
160
161 data = ((addr << 1) | I2C_SMBUS_WRITE) << 24;
162
163 for (i = 0; i < len; i++) {
164 data >>= 8;
165 data |= buf[i] << 24;
166 if ((i & 3) == 2)
167 writel(data, i2c->regs + MXS_I2C_DATA);
168 }
169
170 /* Write out the remaining bytes if any */
171 shifts_left = 24 - (i & 3) * 8;
172 if (shifts_left)
173 writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA);
174}
175
176/*
177 * TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the
178 * rd_threshold to 1). Couldn't get this to work, though.
179 */
180static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c)
181{
182 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
183
184 while (readl(i2c->regs + MXS_I2C_QUEUESTAT)
185 & MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) {
186 if (time_after(jiffies, timeout))
187 return -ETIMEDOUT;
188 cond_resched();
189 }
190
191 return 0;
192}
193
194static int mxs_i2c_finish_read(struct mxs_i2c_dev *i2c, u8 *buf, int len)
195{
196 u32 data;
197 int i;
198
199 for (i = 0; i < len; i++) {
200 if ((i & 3) == 0) {
201 if (mxs_i2c_wait_for_data(i2c))
202 return -ETIMEDOUT;
203 data = readl(i2c->regs + MXS_I2C_QUEUEDATA);
204 }
205 buf[i] = data & 0xff;
206 data >>= 8;
207 }
208
209 return 0;
210}
211
212/*
213 * Low level master read/write transaction.
214 */
215static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
216 int stop)
217{
218 struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
219 int ret;
220 int flags;
221
222 init_completion(&i2c->cmd_complete);
223
224 dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
225 msg->addr, msg->len, msg->flags, stop);
226
227 if (msg->len == 0)
228 return -EINVAL;
229
230 flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
231
232 if (msg->flags & I2C_M_RD)
233 mxs_i2c_pioq_setup_read(i2c, msg->addr, msg->len, flags);
234 else
235 mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf, msg->len,
236 flags);
237
238 writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
239 i2c->regs + MXS_I2C_QUEUECTRL_SET);
240
241 ret = wait_for_completion_timeout(&i2c->cmd_complete,
242 msecs_to_jiffies(1000));
243 if (ret == 0)
244 goto timeout;
245
246 if ((!i2c->cmd_err) && (msg->flags & I2C_M_RD)) {
247 ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len);
248 if (ret)
249 goto timeout;
250 }
251
252 if (i2c->cmd_err == -ENXIO)
253 mxs_i2c_reset(i2c);
254
255 dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err);
256
257 return i2c->cmd_err;
258
259timeout:
260 dev_dbg(i2c->dev, "Timeout!\n");
261 mxs_i2c_reset(i2c);
262 return -ETIMEDOUT;
263}
264
265static int mxs_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
266 int num)
267{
268 int i;
269 int err;
270
271 for (i = 0; i < num; i++) {
272 err = mxs_i2c_xfer_msg(adap, &msgs[i], i == (num - 1));
273 if (err)
274 return err;
275 }
276
277 return num;
278}
279
280static u32 mxs_i2c_func(struct i2c_adapter *adap)
281{
282 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
283}
284
285static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
286{
287 struct mxs_i2c_dev *i2c = dev_id;
288 u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
289
290 if (!stat)
291 return IRQ_NONE;
292
293 if (stat & MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ)
294 i2c->cmd_err = -ENXIO;
295 else if (stat & (MXS_I2C_CTRL1_EARLY_TERM_IRQ |
296 MXS_I2C_CTRL1_MASTER_LOSS_IRQ |
297 MXS_I2C_CTRL1_SLAVE_STOP_IRQ | MXS_I2C_CTRL1_SLAVE_IRQ))
298 /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */
299 i2c->cmd_err = -EIO;
300 else
301 i2c->cmd_err = 0;
302
303 complete(&i2c->cmd_complete);
304
305 writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
306 return IRQ_HANDLED;
307}
308
309static const struct i2c_algorithm mxs_i2c_algo = {
310 .master_xfer = mxs_i2c_xfer,
311 .functionality = mxs_i2c_func,
312};
313
314static int __devinit mxs_i2c_probe(struct platform_device *pdev)
315{
316 struct device *dev = &pdev->dev;
317 struct mxs_i2c_dev *i2c;
318 struct i2c_adapter *adap;
319 struct resource *res;
320 resource_size_t res_size;
321 int err, irq;
322
323 i2c = devm_kzalloc(dev, sizeof(struct mxs_i2c_dev), GFP_KERNEL);
324 if (!i2c)
325 return -ENOMEM;
326
327 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
328 if (!res)
329 return -ENOENT;
330
331 res_size = resource_size(res);
332 if (!devm_request_mem_region(dev, res->start, res_size, res->name))
333 return -EBUSY;
334
335 i2c->regs = devm_ioremap_nocache(dev, res->start, res_size);
336 if (!i2c->regs)
337 return -EBUSY;
338
339 irq = platform_get_irq(pdev, 0);
340 if (irq < 0)
341 return irq;
342
343 err = devm_request_irq(dev, irq, mxs_i2c_isr, 0, dev_name(dev), i2c);
344 if (err)
345 return err;
346
347 i2c->dev = dev;
348 platform_set_drvdata(pdev, i2c);
349
350 /* Do reset to enforce correct startup after pinmuxing */
351 mxs_i2c_reset(i2c);
352
353 adap = &i2c->adapter;
354 strlcpy(adap->name, "MXS I2C adapter", sizeof(adap->name));
355 adap->owner = THIS_MODULE;
356 adap->algo = &mxs_i2c_algo;
357 adap->dev.parent = dev;
358 adap->nr = pdev->id;
359 i2c_set_adapdata(adap, i2c);
360 err = i2c_add_numbered_adapter(adap);
361 if (err) {
362 dev_err(dev, "Failed to add adapter (%d)\n", err);
363 writel(MXS_I2C_CTRL0_SFTRST,
364 i2c->regs + MXS_I2C_CTRL0_SET);
365 return err;
366 }
367
368 return 0;
369}
370
371static int __devexit mxs_i2c_remove(struct platform_device *pdev)
372{
373 struct mxs_i2c_dev *i2c = platform_get_drvdata(pdev);
374 int ret;
375
376 ret = i2c_del_adapter(&i2c->adapter);
377 if (ret)
378 return -EBUSY;
379
380 writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
381 i2c->regs + MXS_I2C_QUEUECTRL_CLR);
382 writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET);
383
384 platform_set_drvdata(pdev, NULL);
385
386 return 0;
387}
388
389static struct platform_driver mxs_i2c_driver = {
390 .driver = {
391 .name = DRIVER_NAME,
392 .owner = THIS_MODULE,
393 },
394 .remove = __devexit_p(mxs_i2c_remove),
395};
396
397static int __init mxs_i2c_init(void)
398{
399 return platform_driver_probe(&mxs_i2c_driver, mxs_i2c_probe);
400}
401subsys_initcall(mxs_i2c_init);
402
403static void __exit mxs_i2c_exit(void)
404{
405 platform_driver_unregister(&mxs_i2c_driver);
406}
407module_exit(mxs_i2c_exit);
408
409MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
410MODULE_DESCRIPTION("MXS I2C Bus Driver");
411MODULE_LICENSE("GPL");
412MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index a605a5029cfe..ff1e127dfea8 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -432,7 +432,7 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
432 432
433static void __devexit nforce2_remove(struct pci_dev *dev) 433static void __devexit nforce2_remove(struct pci_dev *dev)
434{ 434{
435 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev); 435 struct nforce2_smbus *smbuses = pci_get_drvdata(dev);
436 436
437 nforce2_set_reference(NULL); 437 nforce2_set_reference(NULL);
438 if (smbuses[0].base) { 438 if (smbuses[0].base) {
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
index 73de8ade10b1..0c731ca69f15 100644
--- a/drivers/i2c/busses/i2c-nomadik.c
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2009 ST-Ericsson 2 * Copyright (C) 2009 ST-Ericsson SA
3 * Copyright (C) 2009 STMicroelectronics 3 * Copyright (C) 2009 STMicroelectronics
4 * 4 *
5 * I2C master mode controller driver, used in Nomadik 8815 5 * I2C master mode controller driver, used in Nomadik 8815
@@ -15,13 +15,14 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/slab.h> 18#include <linux/slab.h>
20#include <linux/interrupt.h> 19#include <linux/interrupt.h>
21#include <linux/i2c.h> 20#include <linux/i2c.h>
22#include <linux/err.h> 21#include <linux/err.h>
23#include <linux/clk.h> 22#include <linux/clk.h>
24#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/regulator/consumer.h>
25#include <linux/pm_runtime.h>
25 26
26#include <plat/i2c.h> 27#include <plat/i2c.h>
27 28
@@ -117,15 +118,12 @@ enum i2c_operation {
117 I2C_READ = 0x01 118 I2C_READ = 0x01
118}; 119};
119 120
120/* controller response timeout in ms */
121#define I2C_TIMEOUT_MS 500
122
123/** 121/**
124 * struct i2c_nmk_client - client specific data 122 * struct i2c_nmk_client - client specific data
125 * @slave_adr: 7-bit slave address 123 * @slave_adr: 7-bit slave address
126 * @count: no. bytes to be transfered 124 * @count: no. bytes to be transferred
127 * @buffer: client data buffer 125 * @buffer: client data buffer
128 * @xfer_bytes: bytes transfered till now 126 * @xfer_bytes: bytes transferred till now
129 * @operation: current I2C operation 127 * @operation: current I2C operation
130 */ 128 */
131struct i2c_nmk_client { 129struct i2c_nmk_client {
@@ -148,6 +146,7 @@ struct i2c_nmk_client {
148 * @stop: stop condition 146 * @stop: stop condition
149 * @xfer_complete: acknowledge completion for a I2C message 147 * @xfer_complete: acknowledge completion for a I2C message
150 * @result: controller propogated result 148 * @result: controller propogated result
149 * @busy: Busy doing transfer
151 */ 150 */
152struct nmk_i2c_dev { 151struct nmk_i2c_dev {
153 struct platform_device *pdev; 152 struct platform_device *pdev;
@@ -160,6 +159,8 @@ struct nmk_i2c_dev {
160 int stop; 159 int stop;
161 struct completion xfer_complete; 160 struct completion xfer_complete;
162 int result; 161 int result;
162 struct regulator *regulator;
163 bool busy;
163}; 164};
164 165
165/* controller's abort causes */ 166/* controller's abort causes */
@@ -206,7 +207,7 @@ static int flush_i2c_fifo(struct nmk_i2c_dev *dev)
206 writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR); 207 writel((I2C_CR_FTX | I2C_CR_FRX), dev->virtbase + I2C_CR);
207 208
208 for (i = 0; i < LOOP_ATTEMPTS; i++) { 209 for (i = 0; i < LOOP_ATTEMPTS; i++) {
209 timeout = jiffies + msecs_to_jiffies(I2C_TIMEOUT_MS); 210 timeout = jiffies + dev->adap.timeout;
210 211
211 while (!time_after(jiffies, timeout)) { 212 while (!time_after(jiffies, timeout)) {
212 if ((readl(dev->virtbase + I2C_CR) & 213 if ((readl(dev->virtbase + I2C_CR) &
@@ -252,7 +253,7 @@ static int init_hw(struct nmk_i2c_dev *dev)
252 253
253 stat = flush_i2c_fifo(dev); 254 stat = flush_i2c_fifo(dev);
254 if (stat) 255 if (stat)
255 return stat; 256 goto exit;
256 257
257 /* disable the controller */ 258 /* disable the controller */
258 i2c_clr_bit(dev->virtbase + I2C_CR , I2C_CR_PE); 259 i2c_clr_bit(dev->virtbase + I2C_CR , I2C_CR_PE);
@@ -263,7 +264,8 @@ static int init_hw(struct nmk_i2c_dev *dev)
263 264
264 dev->cli.operation = I2C_NO_OPERATION; 265 dev->cli.operation = I2C_NO_OPERATION;
265 266
266 return 0; 267exit:
268 return stat;
267} 269}
268 270
269/* enable peripheral, master mode operation */ 271/* enable peripheral, master mode operation */
@@ -322,7 +324,7 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
322 * slsu defines the data setup time after SCL clock 324 * slsu defines the data setup time after SCL clock
323 * stretching in terms of i2c clk cycles. The 325 * stretching in terms of i2c clk cycles. The
324 * needed setup time for the three modes are 250ns, 326 * needed setup time for the three modes are 250ns,
325 * 100ns, 10ns repectively thus leading to the values 327 * 100ns, 10ns respectively thus leading to the values
326 * of 14, 6, 2 for a 48 MHz i2c clk. 328 * of 14, 6, 2 for a 48 MHz i2c clk.
327 */ 329 */
328 writel(dev->cfg.slsu << 16, dev->virtbase + I2C_SCR); 330 writel(dev->cfg.slsu << 16, dev->virtbase + I2C_SCR);
@@ -356,7 +358,7 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
356 /* 358 /*
357 * set the speed mode. Currently we support 359 * set the speed mode. Currently we support
358 * only standard and fast mode of operation 360 * only standard and fast mode of operation
359 * TODO - support for fast mode plus (upto 1Mb/s) 361 * TODO - support for fast mode plus (up to 1Mb/s)
360 * and high speed (up to 3.4 Mb/s) 362 * and high speed (up to 3.4 Mb/s)
361 */ 363 */
362 if (dev->cfg.sm > I2C_FREQ_MODE_FAST) { 364 if (dev->cfg.sm > I2C_FREQ_MODE_FAST) {
@@ -416,7 +418,7 @@ static int read_i2c(struct nmk_i2c_dev *dev)
416 dev->virtbase + I2C_IMSCR); 418 dev->virtbase + I2C_IMSCR);
417 419
418 timeout = wait_for_completion_interruptible_timeout( 420 timeout = wait_for_completion_interruptible_timeout(
419 &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS)); 421 &dev->xfer_complete, dev->adap.timeout);
420 422
421 if (timeout < 0) { 423 if (timeout < 0) {
422 dev_err(&dev->pdev->dev, 424 dev_err(&dev->pdev->dev,
@@ -426,15 +428,32 @@ static int read_i2c(struct nmk_i2c_dev *dev)
426 } 428 }
427 429
428 if (timeout == 0) { 430 if (timeout == 0) {
429 /* controler has timedout, re-init the h/w */ 431 /* Controller timed out */
430 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); 432 dev_err(&dev->pdev->dev, "read from slave 0x%x timed out\n",
431 (void) init_hw(dev); 433 dev->cli.slave_adr);
432 status = -ETIMEDOUT; 434 status = -ETIMEDOUT;
433 } 435 }
434
435 return status; 436 return status;
436} 437}
437 438
439static void fill_tx_fifo(struct nmk_i2c_dev *dev, int no_bytes)
440{
441 int count;
442
443 for (count = (no_bytes - 2);
444 (count > 0) &&
445 (dev->cli.count != 0);
446 count--) {
447 /* write to the Tx FIFO */
448 writeb(*dev->cli.buffer,
449 dev->virtbase + I2C_TFR);
450 dev->cli.buffer++;
451 dev->cli.count--;
452 dev->cli.xfer_bytes++;
453 }
454
455}
456
438/** 457/**
439 * write_i2c() - Write data to I2C client. 458 * write_i2c() - Write data to I2C client.
440 * @dev: private data of I2C Driver 459 * @dev: private data of I2C Driver
@@ -462,8 +481,13 @@ static int write_i2c(struct nmk_i2c_dev *dev)
462 init_completion(&dev->xfer_complete); 481 init_completion(&dev->xfer_complete);
463 482
464 /* enable interrupts by settings the masks */ 483 /* enable interrupts by settings the masks */
465 irq_mask = (I2C_IT_TXFNE | I2C_IT_TXFOVR | 484 irq_mask = (I2C_IT_TXFOVR | I2C_IT_MAL | I2C_IT_BERR);
466 I2C_IT_MAL | I2C_IT_BERR); 485
486 /* Fill the TX FIFO with transmit data */
487 fill_tx_fifo(dev, MAX_I2C_FIFO_THRESHOLD);
488
489 if (dev->cli.count != 0)
490 irq_mask |= I2C_IT_TXFNE;
467 491
468 /* 492 /*
469 * check if we want to transfer a single or multiple bytes, if so 493 * check if we want to transfer a single or multiple bytes, if so
@@ -481,7 +505,7 @@ static int write_i2c(struct nmk_i2c_dev *dev)
481 dev->virtbase + I2C_IMSCR); 505 dev->virtbase + I2C_IMSCR);
482 506
483 timeout = wait_for_completion_interruptible_timeout( 507 timeout = wait_for_completion_interruptible_timeout(
484 &dev->xfer_complete, msecs_to_jiffies(I2C_TIMEOUT_MS)); 508 &dev->xfer_complete, dev->adap.timeout);
485 509
486 if (timeout < 0) { 510 if (timeout < 0) {
487 dev_err(&dev->pdev->dev, 511 dev_err(&dev->pdev->dev,
@@ -491,9 +515,9 @@ static int write_i2c(struct nmk_i2c_dev *dev)
491 } 515 }
492 516
493 if (timeout == 0) { 517 if (timeout == 0) {
494 /* controler has timedout, re-init the h/w */ 518 /* Controller timed out */
495 dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); 519 dev_err(&dev->pdev->dev, "write to slave 0x%x timed out\n",
496 (void) init_hw(dev); 520 dev->cli.slave_adr);
497 status = -ETIMEDOUT; 521 status = -ETIMEDOUT;
498 } 522 }
499 523
@@ -501,10 +525,55 @@ static int write_i2c(struct nmk_i2c_dev *dev)
501} 525}
502 526
503/** 527/**
528 * nmk_i2c_xfer_one() - transmit a single I2C message
529 * @dev: device with a message encoded into it
530 * @flags: message flags
531 */
532static int nmk_i2c_xfer_one(struct nmk_i2c_dev *dev, u16 flags)
533{
534 int status;
535
536 if (flags & I2C_M_RD) {
537 /* read operation */
538 dev->cli.operation = I2C_READ;
539 status = read_i2c(dev);
540 } else {
541 /* write operation */
542 dev->cli.operation = I2C_WRITE;
543 status = write_i2c(dev);
544 }
545
546 if (status || (dev->result)) {
547 u32 i2c_sr;
548 u32 cause;
549
550 i2c_sr = readl(dev->virtbase + I2C_SR);
551 /*
552 * Check if the controller I2C operation status
553 * is set to ABORT(11b).
554 */
555 if (((i2c_sr >> 2) & 0x3) == 0x3) {
556 /* get the abort cause */
557 cause = (i2c_sr >> 4) & 0x7;
558 dev_err(&dev->pdev->dev, "%s\n", cause
559 >= ARRAY_SIZE(abort_causes) ?
560 "unknown reason" :
561 abort_causes[cause]);
562 }
563
564 (void) init_hw(dev);
565
566 status = status ? status : dev->result;
567 }
568
569 return status;
570}
571
572/**
504 * nmk_i2c_xfer() - I2C transfer function used by kernel framework 573 * nmk_i2c_xfer() - I2C transfer function used by kernel framework
505 * @i2c_adap - Adapter pointer to the controller 574 * @i2c_adap: Adapter pointer to the controller
506 * @msgs[] - Pointer to data to be written. 575 * @msgs: Pointer to data to be written.
507 * @num_msgs - Number of messages to be executed 576 * @num_msgs: Number of messages to be executed
508 * 577 *
509 * This is the function called by the generic kernel i2c_transfer() 578 * This is the function called by the generic kernel i2c_transfer()
510 * or i2c_smbus...() API calls. Note that this code is protected by the 579 * or i2c_smbus...() API calls. Note that this code is protected by the
@@ -552,49 +621,56 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap,
552{ 621{
553 int status; 622 int status;
554 int i; 623 int i;
555 u32 cause;
556 struct nmk_i2c_dev *dev = i2c_get_adapdata(i2c_adap); 624 struct nmk_i2c_dev *dev = i2c_get_adapdata(i2c_adap);
625 int j;
626
627 dev->busy = true;
628
629 if (dev->regulator)
630 regulator_enable(dev->regulator);
631 pm_runtime_get_sync(&dev->pdev->dev);
632
633 clk_enable(dev->clk);
557 634
558 status = init_hw(dev); 635 status = init_hw(dev);
559 if (status) 636 if (status)
560 return status; 637 goto out;
561 638
562 /* setup the i2c controller */ 639 /* Attempt three times to send the message queue */
563 setup_i2c_controller(dev); 640 for (j = 0; j < 3; j++) {
641 /* setup the i2c controller */
642 setup_i2c_controller(dev);
564 643
565 for (i = 0; i < num_msgs; i++) { 644 for (i = 0; i < num_msgs; i++) {
566 if (unlikely(msgs[i].flags & I2C_M_TEN)) { 645 if (unlikely(msgs[i].flags & I2C_M_TEN)) {
567 dev_err(&dev->pdev->dev, "10 bit addressing" 646 dev_err(&dev->pdev->dev, "10 bit addressing"
568 "not supported\n"); 647 "not supported\n");
569 return -EINVAL; 648
570 } 649 status = -EINVAL;
571 dev->cli.slave_adr = msgs[i].addr; 650 goto out;
572 dev->cli.buffer = msgs[i].buf; 651 }
573 dev->cli.count = msgs[i].len; 652 dev->cli.slave_adr = msgs[i].addr;
574 dev->stop = (i < (num_msgs - 1)) ? 0 : 1; 653 dev->cli.buffer = msgs[i].buf;
575 dev->result = 0; 654 dev->cli.count = msgs[i].len;
576 655 dev->stop = (i < (num_msgs - 1)) ? 0 : 1;
577 if (msgs[i].flags & I2C_M_RD) { 656 dev->result = 0;
578 /* it is a read operation */ 657
579 dev->cli.operation = I2C_READ; 658 status = nmk_i2c_xfer_one(dev, msgs[i].flags);
580 status = read_i2c(dev); 659 if (status != 0)
581 } else { 660 break;
582 /* write operation */
583 dev->cli.operation = I2C_WRITE;
584 status = write_i2c(dev);
585 }
586 if (status || (dev->result)) {
587 /* get the abort cause */
588 cause = (readl(dev->virtbase + I2C_SR) >> 4) & 0x7;
589 dev_err(&dev->pdev->dev, "error during I2C"
590 "message xfer: %d\n", cause);
591 dev_err(&dev->pdev->dev, "%s\n",
592 cause >= ARRAY_SIZE(abort_causes)
593 ? "unknown reason" : abort_causes[cause]);
594 return status;
595 } 661 }
596 mdelay(1); 662 if (status == 0)
663 break;
597 } 664 }
665
666out:
667 clk_disable(dev->clk);
668 pm_runtime_put_sync(&dev->pdev->dev);
669 if (dev->regulator)
670 regulator_disable(dev->regulator);
671
672 dev->busy = false;
673
598 /* return the no. messages processed */ 674 /* return the no. messages processed */
599 if (status) 675 if (status)
600 return status; 676 return status;
@@ -605,6 +681,7 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap,
605/** 681/**
606 * disable_interrupts() - disable the interrupts 682 * disable_interrupts() - disable the interrupts
607 * @dev: private data of controller 683 * @dev: private data of controller
684 * @irq: interrupt number
608 */ 685 */
609static int disable_interrupts(struct nmk_i2c_dev *dev, u32 irq) 686static int disable_interrupts(struct nmk_i2c_dev *dev, u32 irq)
610{ 687{
@@ -653,17 +730,7 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
653 */ 730 */
654 disable_interrupts(dev, I2C_IT_TXFNE); 731 disable_interrupts(dev, I2C_IT_TXFNE);
655 } else { 732 } else {
656 for (count = (MAX_I2C_FIFO_THRESHOLD - tft - 2); 733 fill_tx_fifo(dev, (MAX_I2C_FIFO_THRESHOLD - tft));
657 (count > 0) &&
658 (dev->cli.count != 0);
659 count--) {
660 /* write to the Tx FIFO */
661 writeb(*dev->cli.buffer,
662 dev->virtbase + I2C_TFR);
663 dev->cli.buffer++;
664 dev->cli.count--;
665 dev->cli.xfer_bytes++;
666 }
667 /* 734 /*
668 * if done, close the transfer by disabling the 735 * if done, close the transfer by disabling the
669 * corresponding TXFNE interrupt 736 * corresponding TXFNE interrupt
@@ -716,16 +783,11 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
716 } 783 }
717 } 784 }
718 785
719 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTD); 786 disable_all_interrupts(dev);
720 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MTDWS); 787 clear_all_interrupts(dev);
721
722 disable_interrupts(dev,
723 (I2C_IT_TXFNE | I2C_IT_TXFE | I2C_IT_TXFF
724 | I2C_IT_TXFOVR | I2C_IT_RXFNF
725 | I2C_IT_RXFF | I2C_IT_RXFE));
726 788
727 if (dev->cli.count) { 789 if (dev->cli.count) {
728 dev->result = -1; 790 dev->result = -EIO;
729 dev_err(&dev->pdev->dev, "%lu bytes still remain to be" 791 dev_err(&dev->pdev->dev, "%lu bytes still remain to be"
730 "xfered\n", dev->cli.count); 792 "xfered\n", dev->cli.count);
731 (void) init_hw(dev); 793 (void) init_hw(dev);
@@ -736,7 +798,7 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
736 798
737 /* Master Arbitration lost interrupt */ 799 /* Master Arbitration lost interrupt */
738 case I2C_IT_MAL: 800 case I2C_IT_MAL:
739 dev->result = -1; 801 dev->result = -EIO;
740 (void) init_hw(dev); 802 (void) init_hw(dev);
741 803
742 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MAL); 804 i2c_set_bit(dev->virtbase + I2C_ICR, I2C_IT_MAL);
@@ -750,7 +812,7 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
750 * during the transaction. 812 * during the transaction.
751 */ 813 */
752 case I2C_IT_BERR: 814 case I2C_IT_BERR:
753 dev->result = -1; 815 dev->result = -EIO;
754 /* get the status */ 816 /* get the status */
755 if (((readl(dev->virtbase + I2C_SR) >> 2) & 0x3) == I2C_ABORT) 817 if (((readl(dev->virtbase + I2C_SR) >> 2) & 0x3) == I2C_ABORT)
756 (void) init_hw(dev); 818 (void) init_hw(dev);
@@ -766,7 +828,7 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
766 * the Tx FIFO is full. 828 * the Tx FIFO is full.
767 */ 829 */
768 case I2C_IT_TXFOVR: 830 case I2C_IT_TXFOVR:
769 dev->result = -1; 831 dev->result = -EIO;
770 (void) init_hw(dev); 832 (void) init_hw(dev);
771 833
772 dev_err(&dev->pdev->dev, "Tx Fifo Over run\n"); 834 dev_err(&dev->pdev->dev, "Tx Fifo Over run\n");
@@ -792,12 +854,41 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg)
792 return IRQ_HANDLED; 854 return IRQ_HANDLED;
793} 855}
794 856
857
858#ifdef CONFIG_PM
859static int nmk_i2c_suspend(struct device *dev)
860{
861 struct platform_device *pdev = to_platform_device(dev);
862 struct nmk_i2c_dev *nmk_i2c = platform_get_drvdata(pdev);
863
864 if (nmk_i2c->busy)
865 return -EBUSY;
866
867 return 0;
868}
869
870static int nmk_i2c_resume(struct device *dev)
871{
872 return 0;
873}
874#else
875#define nmk_i2c_suspend NULL
876#define nmk_i2c_resume NULL
877#endif
878
879/*
880 * We use noirq so that we suspend late and resume before the wakeup interrupt
881 * to ensure that we do the !pm_runtime_suspended() check in resume before
882 * there has been a regular pm runtime resume (via pm_runtime_get_sync()).
883 */
884static const struct dev_pm_ops nmk_i2c_pm = {
885 .suspend_noirq = nmk_i2c_suspend,
886 .resume_noirq = nmk_i2c_resume,
887};
888
795static unsigned int nmk_i2c_functionality(struct i2c_adapter *adap) 889static unsigned int nmk_i2c_functionality(struct i2c_adapter *adap)
796{ 890{
797 return I2C_FUNC_I2C 891 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
798 | I2C_FUNC_SMBUS_BYTE_DATA
799 | I2C_FUNC_SMBUS_WORD_DATA
800 | I2C_FUNC_SMBUS_I2C_BLOCK;
801} 892}
802 893
803static const struct i2c_algorithm nmk_i2c_algo = { 894static const struct i2c_algorithm nmk_i2c_algo = {
@@ -820,7 +911,7 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev)
820 ret = -ENOMEM; 911 ret = -ENOMEM;
821 goto err_no_mem; 912 goto err_no_mem;
822 } 913 }
823 914 dev->busy = false;
824 dev->pdev = pdev; 915 dev->pdev = pdev;
825 platform_set_drvdata(pdev, dev); 916 platform_set_drvdata(pdev, dev);
826 917
@@ -850,6 +941,15 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev)
850 goto err_irq; 941 goto err_irq;
851 } 942 }
852 943
944 dev->regulator = regulator_get(&pdev->dev, "v-i2c");
945 if (IS_ERR(dev->regulator)) {
946 dev_warn(&pdev->dev, "could not get i2c regulator\n");
947 dev->regulator = NULL;
948 }
949
950 pm_suspend_ignore_children(&pdev->dev, true);
951 pm_runtime_enable(&pdev->dev);
952
853 dev->clk = clk_get(&pdev->dev, NULL); 953 dev->clk = clk_get(&pdev->dev, NULL);
854 if (IS_ERR(dev->clk)) { 954 if (IS_ERR(dev->clk)) {
855 dev_err(&pdev->dev, "could not get i2c clock\n"); 955 dev_err(&pdev->dev, "could not get i2c clock\n");
@@ -857,13 +957,15 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev)
857 goto err_no_clk; 957 goto err_no_clk;
858 } 958 }
859 959
860 clk_enable(dev->clk);
861
862 adap = &dev->adap; 960 adap = &dev->adap;
863 adap->dev.parent = &pdev->dev; 961 adap->dev.parent = &pdev->dev;
864 adap->owner = THIS_MODULE; 962 adap->owner = THIS_MODULE;
865 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 963 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
866 adap->algo = &nmk_i2c_algo; 964 adap->algo = &nmk_i2c_algo;
965 adap->timeout = pdata->timeout ? msecs_to_jiffies(pdata->timeout) :
966 msecs_to_jiffies(20000);
967 snprintf(adap->name, sizeof(adap->name),
968 "Nomadik I2C%d at %lx", pdev->id, (unsigned long)res->start);
867 969
868 /* fetch the controller id */ 970 /* fetch the controller id */
869 adap->nr = pdev->id; 971 adap->nr = pdev->id;
@@ -877,14 +979,8 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev)
877 979
878 i2c_set_adapdata(adap, dev); 980 i2c_set_adapdata(adap, dev);
879 981
880 ret = init_hw(dev); 982 dev_info(&pdev->dev, "initialize %s on virtual "
881 if (ret != 0) { 983 "base %p\n", adap->name, dev->virtbase);
882 dev_err(&pdev->dev, "error in initializing i2c hardware\n");
883 goto err_init_hw;
884 }
885
886 dev_dbg(&pdev->dev, "initialize I2C%d bus on virtual "
887 "base %p\n", pdev->id, dev->virtbase);
888 984
889 ret = i2c_add_numbered_adapter(adap); 985 ret = i2c_add_numbered_adapter(adap);
890 if (ret) { 986 if (ret) {
@@ -894,11 +990,12 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev)
894 990
895 return 0; 991 return 0;
896 992
897 err_init_hw:
898 clk_disable(dev->clk);
899 err_add_adap: 993 err_add_adap:
900 clk_put(dev->clk); 994 clk_put(dev->clk);
901 err_no_clk: 995 err_no_clk:
996 if (dev->regulator)
997 regulator_put(dev->regulator);
998 pm_runtime_disable(&pdev->dev);
902 free_irq(dev->irq, dev); 999 free_irq(dev->irq, dev);
903 err_irq: 1000 err_irq:
904 iounmap(dev->virtbase); 1001 iounmap(dev->virtbase);
@@ -928,8 +1025,10 @@ static int __devexit nmk_i2c_remove(struct platform_device *pdev)
928 iounmap(dev->virtbase); 1025 iounmap(dev->virtbase);
929 if (res) 1026 if (res)
930 release_mem_region(res->start, resource_size(res)); 1027 release_mem_region(res->start, resource_size(res));
931 clk_disable(dev->clk);
932 clk_put(dev->clk); 1028 clk_put(dev->clk);
1029 if (dev->regulator)
1030 regulator_put(dev->regulator);
1031 pm_runtime_disable(&pdev->dev);
933 platform_set_drvdata(pdev, NULL); 1032 platform_set_drvdata(pdev, NULL);
934 kfree(dev); 1033 kfree(dev);
935 1034
@@ -940,6 +1039,7 @@ static struct platform_driver nmk_i2c_driver = {
940 .driver = { 1039 .driver = {
941 .owner = THIS_MODULE, 1040 .owner = THIS_MODULE,
942 .name = DRIVER_NAME, 1041 .name = DRIVER_NAME,
1042 .pm = &nmk_i2c_pm,
943 }, 1043 },
944 .probe = nmk_i2c_probe, 1044 .probe = nmk_i2c_probe,
945 .remove = __devexit_p(nmk_i2c_remove), 1045 .remove = __devexit_p(nmk_i2c_remove),
diff --git a/drivers/i2c/busses/i2c-nuc900.c b/drivers/i2c/busses/i2c-nuc900.c
index 92d770d7bbc2..72434263787b 100644
--- a/drivers/i2c/busses/i2c-nuc900.c
+++ b/drivers/i2c/busses/i2c-nuc900.c
@@ -16,7 +16,6 @@
16#include <linux/module.h> 16#include <linux/module.h>
17 17
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/i2c-id.h>
20#include <linux/init.h> 19#include <linux/init.h>
21#include <linux/time.h> 20#include <linux/time.h>
22#include <linux/interrupt.h> 21#include <linux/interrupt.h>
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 0070371b29f3..1b46a9d9f907 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -9,6 +9,41 @@
9 * kind, whether express or implied. 9 * kind, whether express or implied.
10 */ 10 */
11 11
12/*
13 * Device tree configuration:
14 *
15 * Required properties:
16 * - compatible : "opencores,i2c-ocores"
17 * - reg : bus address start and address range size of device
18 * - interrupts : interrupt number
19 * - regstep : size of device registers in bytes
20 * - clock-frequency : frequency of bus clock in Hz
21 *
22 * Example:
23 *
24 * i2c0: ocores@a0000000 {
25 * compatible = "opencores,i2c-ocores";
26 * reg = <0xa0000000 0x8>;
27 * interrupts = <10>;
28 *
29 * regstep = <1>;
30 * clock-frequency = <20000000>;
31 *
32 * -- Devices connected on this I2C bus get
33 * -- defined here; address- and size-cells
34 * -- apply to these child devices
35 *
36 * #address-cells = <1>;
37 * #size-cells = <0>;
38 *
39 * dummy@60 {
40 * compatible = "dummy";
41 * reg = <60>;
42 * };
43 * };
44 *
45 */
46
12#include <linux/kernel.h> 47#include <linux/kernel.h>
13#include <linux/module.h> 48#include <linux/module.h>
14#include <linux/init.h> 49#include <linux/init.h>
@@ -210,6 +245,32 @@ static struct i2c_adapter ocores_adapter = {
210 .algo = &ocores_algorithm, 245 .algo = &ocores_algorithm,
211}; 246};
212 247
248#ifdef CONFIG_OF
249static int ocores_i2c_of_probe(struct platform_device* pdev,
250 struct ocores_i2c* i2c)
251{
252 const __be32* val;
253
254 val = of_get_property(pdev->dev.of_node, "regstep", NULL);
255 if (!val) {
256 dev_err(&pdev->dev, "Missing required parameter 'regstep'");
257 return -ENODEV;
258 }
259 i2c->regstep = be32_to_cpup(val);
260
261 val = of_get_property(pdev->dev.of_node, "clock-frequency", NULL);
262 if (!val) {
263 dev_err(&pdev->dev,
264 "Missing required parameter 'clock-frequency'");
265 return -ENODEV;
266 }
267 i2c->clock_khz = be32_to_cpup(val) / 1000;
268
269 return 0;
270}
271#else
272#define ocores_i2c_of_probe(pdev,i2c) -ENODEV
273#endif
213 274
214static int __devinit ocores_i2c_probe(struct platform_device *pdev) 275static int __devinit ocores_i2c_probe(struct platform_device *pdev)
215{ 276{
@@ -227,37 +288,41 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
227 if (!res2) 288 if (!res2)
228 return -ENODEV; 289 return -ENODEV;
229 290
230 pdata = (struct ocores_i2c_platform_data*) pdev->dev.platform_data; 291 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
231 if (!pdata)
232 return -ENODEV;
233
234 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
235 if (!i2c) 292 if (!i2c)
236 return -ENOMEM; 293 return -ENOMEM;
237 294
238 if (!request_mem_region(res->start, resource_size(res), 295 if (!devm_request_mem_region(&pdev->dev, res->start,
239 pdev->name)) { 296 resource_size(res), pdev->name)) {
240 dev_err(&pdev->dev, "Memory region busy\n"); 297 dev_err(&pdev->dev, "Memory region busy\n");
241 ret = -EBUSY; 298 return -EBUSY;
242 goto request_mem_failed;
243 } 299 }
244 300
245 i2c->base = ioremap(res->start, resource_size(res)); 301 i2c->base = devm_ioremap_nocache(&pdev->dev, res->start,
302 resource_size(res));
246 if (!i2c->base) { 303 if (!i2c->base) {
247 dev_err(&pdev->dev, "Unable to map registers\n"); 304 dev_err(&pdev->dev, "Unable to map registers\n");
248 ret = -EIO; 305 return -EIO;
249 goto map_failed; 306 }
307
308 pdata = pdev->dev.platform_data;
309 if (pdata) {
310 i2c->regstep = pdata->regstep;
311 i2c->clock_khz = pdata->clock_khz;
312 } else {
313 ret = ocores_i2c_of_probe(pdev, i2c);
314 if (ret)
315 return ret;
250 } 316 }
251 317
252 i2c->regstep = pdata->regstep;
253 i2c->clock_khz = pdata->clock_khz;
254 ocores_init(i2c); 318 ocores_init(i2c);
255 319
256 init_waitqueue_head(&i2c->wait); 320 init_waitqueue_head(&i2c->wait);
257 ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c); 321 ret = devm_request_irq(&pdev->dev, res2->start, ocores_isr, 0,
322 pdev->name, i2c);
258 if (ret) { 323 if (ret) {
259 dev_err(&pdev->dev, "Cannot claim IRQ\n"); 324 dev_err(&pdev->dev, "Cannot claim IRQ\n");
260 goto request_irq_failed; 325 return ret;
261 } 326 }
262 327
263 /* hook up driver to tree */ 328 /* hook up driver to tree */
@@ -265,36 +330,27 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
265 i2c->adap = ocores_adapter; 330 i2c->adap = ocores_adapter;
266 i2c_set_adapdata(&i2c->adap, i2c); 331 i2c_set_adapdata(&i2c->adap, i2c);
267 i2c->adap.dev.parent = &pdev->dev; 332 i2c->adap.dev.parent = &pdev->dev;
333 i2c->adap.dev.of_node = pdev->dev.of_node;
268 334
269 /* add i2c adapter to i2c tree */ 335 /* add i2c adapter to i2c tree */
270 ret = i2c_add_adapter(&i2c->adap); 336 ret = i2c_add_adapter(&i2c->adap);
271 if (ret) { 337 if (ret) {
272 dev_err(&pdev->dev, "Failed to add adapter\n"); 338 dev_err(&pdev->dev, "Failed to add adapter\n");
273 goto add_adapter_failed; 339 return ret;
274 } 340 }
275 341
276 /* add in known devices to the bus */ 342 /* add in known devices to the bus */
277 for (i = 0; i < pdata->num_devices; i++) 343 if (pdata) {
278 i2c_new_device(&i2c->adap, pdata->devices + i); 344 for (i = 0; i < pdata->num_devices; i++)
345 i2c_new_device(&i2c->adap, pdata->devices + i);
346 }
279 347
280 return 0; 348 return 0;
281
282add_adapter_failed:
283 free_irq(res2->start, i2c);
284request_irq_failed:
285 iounmap(i2c->base);
286map_failed:
287 release_mem_region(res->start, resource_size(res));
288request_mem_failed:
289 kfree(i2c);
290
291 return ret;
292} 349}
293 350
294static int __devexit ocores_i2c_remove(struct platform_device* pdev) 351static int __devexit ocores_i2c_remove(struct platform_device* pdev)
295{ 352{
296 struct ocores_i2c *i2c = platform_get_drvdata(pdev); 353 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
297 struct resource *res;
298 354
299 /* disable i2c logic */ 355 /* disable i2c logic */
300 oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL) 356 oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL)
@@ -304,18 +360,6 @@ static int __devexit ocores_i2c_remove(struct platform_device* pdev)
304 i2c_del_adapter(&i2c->adap); 360 i2c_del_adapter(&i2c->adap);
305 platform_set_drvdata(pdev, NULL); 361 platform_set_drvdata(pdev, NULL);
306 362
307 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
308 if (res)
309 free_irq(res->start, i2c);
310
311 iounmap(i2c->base);
312
313 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
314 if (res)
315 release_mem_region(res->start, resource_size(res));
316
317 kfree(i2c);
318
319 return 0; 363 return 0;
320} 364}
321 365
@@ -344,6 +388,12 @@ static int ocores_i2c_resume(struct platform_device *pdev)
344#define ocores_i2c_resume NULL 388#define ocores_i2c_resume NULL
345#endif 389#endif
346 390
391static struct of_device_id ocores_i2c_match[] = {
392 { .compatible = "opencores,i2c-ocores", },
393 {},
394};
395MODULE_DEVICE_TABLE(of, ocores_i2c_match);
396
347/* work with hotplug and coldplug */ 397/* work with hotplug and coldplug */
348MODULE_ALIAS("platform:ocores-i2c"); 398MODULE_ALIAS("platform:ocores-i2c");
349 399
@@ -355,6 +405,7 @@ static struct platform_driver ocores_i2c_driver = {
355 .driver = { 405 .driver = {
356 .owner = THIS_MODULE, 406 .owner = THIS_MODULE,
357 .name = "ocores-i2c", 407 .name = "ocores-i2c",
408 .of_match_table = ocores_i2c_match,
358 }, 409 },
359}; 410};
360 411
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index b33c78586bfc..58a58c7eaa17 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -39,6 +39,7 @@
39#include <linux/io.h> 39#include <linux/io.h>
40#include <linux/slab.h> 40#include <linux/slab.h>
41#include <linux/i2c-omap.h> 41#include <linux/i2c-omap.h>
42#include <linux/pm_runtime.h>
42 43
43/* I2C controller revisions */ 44/* I2C controller revisions */
44#define OMAP_I2C_REV_2 0x20 45#define OMAP_I2C_REV_2 0x20
@@ -175,8 +176,6 @@ struct omap_i2c_dev {
175 void __iomem *base; /* virtual */ 176 void __iomem *base; /* virtual */
176 int irq; 177 int irq;
177 int reg_shift; /* bit shift for I2C register addresses */ 178 int reg_shift; /* bit shift for I2C register addresses */
178 struct clk *iclk; /* Interface clock */
179 struct clk *fclk; /* Functional clock */
180 struct completion cmd_complete; 179 struct completion cmd_complete;
181 struct resource *ioarea; 180 struct resource *ioarea;
182 u32 latency; /* maximum mpu wkup latency */ 181 u32 latency; /* maximum mpu wkup latency */
@@ -265,45 +264,18 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg)
265 (i2c_dev->regs[reg] << i2c_dev->reg_shift)); 264 (i2c_dev->regs[reg] << i2c_dev->reg_shift));
266} 265}
267 266
268static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) 267static void omap_i2c_unidle(struct omap_i2c_dev *dev)
269{ 268{
270 int ret; 269 struct platform_device *pdev;
271 270 struct omap_i2c_bus_platform_data *pdata;
272 dev->iclk = clk_get(dev->dev, "ick");
273 if (IS_ERR(dev->iclk)) {
274 ret = PTR_ERR(dev->iclk);
275 dev->iclk = NULL;
276 return ret;
277 }
278
279 dev->fclk = clk_get(dev->dev, "fck");
280 if (IS_ERR(dev->fclk)) {
281 ret = PTR_ERR(dev->fclk);
282 if (dev->iclk != NULL) {
283 clk_put(dev->iclk);
284 dev->iclk = NULL;
285 }
286 dev->fclk = NULL;
287 return ret;
288 }
289 271
290 return 0; 272 WARN_ON(!dev->idle);
291}
292 273
293static void omap_i2c_put_clocks(struct omap_i2c_dev *dev) 274 pdev = to_platform_device(dev->dev);
294{ 275 pdata = pdev->dev.platform_data;
295 clk_put(dev->fclk);
296 dev->fclk = NULL;
297 clk_put(dev->iclk);
298 dev->iclk = NULL;
299}
300 276
301static void omap_i2c_unidle(struct omap_i2c_dev *dev) 277 pm_runtime_get_sync(&pdev->dev);
302{
303 WARN_ON(!dev->idle);
304 278
305 clk_enable(dev->iclk);
306 clk_enable(dev->fclk);
307 if (cpu_is_omap34xx()) { 279 if (cpu_is_omap34xx()) {
308 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 280 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
309 omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); 281 omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate);
@@ -326,10 +298,15 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
326 298
327static void omap_i2c_idle(struct omap_i2c_dev *dev) 299static void omap_i2c_idle(struct omap_i2c_dev *dev)
328{ 300{
301 struct platform_device *pdev;
302 struct omap_i2c_bus_platform_data *pdata;
329 u16 iv; 303 u16 iv;
330 304
331 WARN_ON(dev->idle); 305 WARN_ON(dev->idle);
332 306
307 pdev = to_platform_device(dev->dev);
308 pdata = pdev->dev.platform_data;
309
333 dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); 310 dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
334 if (dev->rev >= OMAP_I2C_REV_ON_4430) 311 if (dev->rev >= OMAP_I2C_REV_ON_4430)
335 omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1); 312 omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
@@ -345,8 +322,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
345 omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); 322 omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
346 } 323 }
347 dev->idle = 1; 324 dev->idle = 1;
348 clk_disable(dev->fclk); 325
349 clk_disable(dev->iclk); 326 pm_runtime_put_sync(&pdev->dev);
350} 327}
351 328
352static int omap_i2c_init(struct omap_i2c_dev *dev) 329static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -356,6 +333,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
356 unsigned long fclk_rate = 12000000; 333 unsigned long fclk_rate = 12000000;
357 unsigned long timeout; 334 unsigned long timeout;
358 unsigned long internal_clk = 0; 335 unsigned long internal_clk = 0;
336 struct clk *fclk;
359 337
360 if (dev->rev >= OMAP_I2C_REV_2) { 338 if (dev->rev >= OMAP_I2C_REV_2) {
361 /* Disable I2C controller before soft reset */ 339 /* Disable I2C controller before soft reset */
@@ -400,9 +378,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
400 * REVISIT: Some wkup sources might not be needed. 378 * REVISIT: Some wkup sources might not be needed.
401 */ 379 */
402 dev->westate = OMAP_I2C_WE_ALL; 380 dev->westate = OMAP_I2C_WE_ALL;
403 if (dev->rev < OMAP_I2C_REV_ON_4430) 381 omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
404 omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
405 dev->westate);
406 } 382 }
407 } 383 }
408 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 384 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
@@ -414,7 +390,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
414 * always returns 12MHz for the functional clock, we can 390 * always returns 12MHz for the functional clock, we can
415 * do this bit unconditionally. 391 * do this bit unconditionally.
416 */ 392 */
417 fclk_rate = clk_get_rate(dev->fclk); 393 fclk = clk_get(dev->dev, "fck");
394 fclk_rate = clk_get_rate(fclk);
395 clk_put(fclk);
418 396
419 /* TRM for 5912 says the I2C clock must be prescaled to be 397 /* TRM for 5912 says the I2C clock must be prescaled to be
420 * between 7 - 12 MHz. The XOR input clock is typically 398 * between 7 - 12 MHz. The XOR input clock is typically
@@ -443,7 +421,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
443 internal_clk = 9600; 421 internal_clk = 9600;
444 else 422 else
445 internal_clk = 4000; 423 internal_clk = 4000;
446 fclk_rate = clk_get_rate(dev->fclk) / 1000; 424 fclk = clk_get(dev->dev, "fck");
425 fclk_rate = clk_get_rate(fclk) / 1000;
426 clk_put(fclk);
447 427
448 /* Compute prescaler divisor */ 428 /* Compute prescaler divisor */
449 psc = fclk_rate / internal_clk; 429 psc = fclk_rate / internal_clk;
@@ -616,12 +596,8 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
616 * REVISIT: We should abort the transfer on signals, but the bus goes 596 * REVISIT: We should abort the transfer on signals, but the bus goes
617 * into arbitration and we're currently unable to recover from it. 597 * into arbitration and we're currently unable to recover from it.
618 */ 598 */
619 if (dev->set_mpu_wkup_lat != NULL)
620 dev->set_mpu_wkup_lat(dev->dev, dev->latency);
621 r = wait_for_completion_timeout(&dev->cmd_complete, 599 r = wait_for_completion_timeout(&dev->cmd_complete,
622 OMAP_I2C_TIMEOUT); 600 OMAP_I2C_TIMEOUT);
623 if (dev->set_mpu_wkup_lat != NULL)
624 dev->set_mpu_wkup_lat(dev->dev, -1);
625 dev->buf_len = 0; 601 dev->buf_len = 0;
626 if (r < 0) 602 if (r < 0)
627 return r; 603 return r;
@@ -672,12 +648,18 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
672 if (r < 0) 648 if (r < 0)
673 goto out; 649 goto out;
674 650
651 if (dev->set_mpu_wkup_lat != NULL)
652 dev->set_mpu_wkup_lat(dev->dev, dev->latency);
653
675 for (i = 0; i < num; i++) { 654 for (i = 0; i < num; i++) {
676 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1))); 655 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)));
677 if (r != 0) 656 if (r != 0)
678 break; 657 break;
679 } 658 }
680 659
660 if (dev->set_mpu_wkup_lat != NULL)
661 dev->set_mpu_wkup_lat(dev->dev, -1);
662
681 if (r == 0) 663 if (r == 0)
682 r = num; 664 r = num;
683 665
@@ -863,11 +845,15 @@ complete:
863 dev_err(dev->dev, "Arbitration lost\n"); 845 dev_err(dev->dev, "Arbitration lost\n");
864 err |= OMAP_I2C_STAT_AL; 846 err |= OMAP_I2C_STAT_AL;
865 } 847 }
848 /*
849 * ProDB0017052: Clear ARDY bit twice
850 */
866 if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK | 851 if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
867 OMAP_I2C_STAT_AL)) { 852 OMAP_I2C_STAT_AL)) {
868 omap_i2c_ack_stat(dev, stat & 853 omap_i2c_ack_stat(dev, stat &
869 (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR | 854 (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR |
870 OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR)); 855 OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR |
856 OMAP_I2C_STAT_ARDY));
871 omap_i2c_complete_cmd(dev, err); 857 omap_i2c_complete_cmd(dev, err);
872 return IRQ_HANDLED; 858 return IRQ_HANDLED;
873 } 859 }
@@ -1048,14 +1034,12 @@ omap_i2c_probe(struct platform_device *pdev)
1048 else 1034 else
1049 dev->reg_shift = 2; 1035 dev->reg_shift = 2;
1050 1036
1051 if ((r = omap_i2c_get_clocks(dev)) != 0)
1052 goto err_iounmap;
1053
1054 if (cpu_is_omap44xx()) 1037 if (cpu_is_omap44xx())
1055 dev->regs = (u8 *) omap4_reg_map; 1038 dev->regs = (u8 *) omap4_reg_map;
1056 else 1039 else
1057 dev->regs = (u8 *) reg_map; 1040 dev->regs = (u8 *) reg_map;
1058 1041
1042 pm_runtime_enable(&pdev->dev);
1059 omap_i2c_unidle(dev); 1043 omap_i2c_unidle(dev);
1060 1044
1061 dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff; 1045 dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff;
@@ -1127,8 +1111,6 @@ err_free_irq:
1127err_unuse_clocks: 1111err_unuse_clocks:
1128 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 1112 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
1129 omap_i2c_idle(dev); 1113 omap_i2c_idle(dev);
1130 omap_i2c_put_clocks(dev);
1131err_iounmap:
1132 iounmap(dev->base); 1114 iounmap(dev->base);
1133err_free_mem: 1115err_free_mem:
1134 platform_set_drvdata(pdev, NULL); 1116 platform_set_drvdata(pdev, NULL);
@@ -1150,7 +1132,6 @@ omap_i2c_remove(struct platform_device *pdev)
1150 free_irq(dev->irq, dev); 1132 free_irq(dev->irq, dev);
1151 i2c_del_adapter(&dev->adapter); 1133 i2c_del_adapter(&dev->adapter);
1152 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 1134 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
1153 omap_i2c_put_clocks(dev);
1154 iounmap(dev->base); 1135 iounmap(dev->base);
1155 kfree(dev); 1136 kfree(dev);
1156 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1137 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1158,12 +1139,41 @@ omap_i2c_remove(struct platform_device *pdev)
1158 return 0; 1139 return 0;
1159} 1140}
1160 1141
1142#ifdef CONFIG_SUSPEND
1143static int omap_i2c_suspend(struct device *dev)
1144{
1145 if (!pm_runtime_suspended(dev))
1146 if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_suspend)
1147 dev->bus->pm->runtime_suspend(dev);
1148
1149 return 0;
1150}
1151
1152static int omap_i2c_resume(struct device *dev)
1153{
1154 if (!pm_runtime_suspended(dev))
1155 if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_resume)
1156 dev->bus->pm->runtime_resume(dev);
1157
1158 return 0;
1159}
1160
1161static struct dev_pm_ops omap_i2c_pm_ops = {
1162 .suspend = omap_i2c_suspend,
1163 .resume = omap_i2c_resume,
1164};
1165#define OMAP_I2C_PM_OPS (&omap_i2c_pm_ops)
1166#else
1167#define OMAP_I2C_PM_OPS NULL
1168#endif
1169
1161static struct platform_driver omap_i2c_driver = { 1170static struct platform_driver omap_i2c_driver = {
1162 .probe = omap_i2c_probe, 1171 .probe = omap_i2c_probe,
1163 .remove = omap_i2c_remove, 1172 .remove = omap_i2c_remove,
1164 .driver = { 1173 .driver = {
1165 .name = "i2c_omap", 1174 .name = "omap_i2c",
1166 .owner = THIS_MODULE, 1175 .owner = THIS_MODULE,
1176 .pm = OMAP_I2C_PM_OPS,
1167 }, 1177 },
1168}; 1178};
1169 1179
@@ -1184,4 +1194,4 @@ module_exit(omap_i2c_exit_driver);
1184MODULE_AUTHOR("MontaVista Software, Inc. (and others)"); 1194MODULE_AUTHOR("MontaVista Software, Inc. (and others)");
1185MODULE_DESCRIPTION("TI OMAP I2C bus adapter"); 1195MODULE_DESCRIPTION("TI OMAP I2C bus adapter");
1186MODULE_LICENSE("GPL"); 1196MODULE_LICENSE("GPL");
1187MODULE_ALIAS("platform:i2c_omap"); 1197MODULE_ALIAS("platform:omap_i2c");
diff --git a/drivers/i2c/busses/i2c-parport-light.c b/drivers/i2c/busses/i2c-parport-light.c
index fc5fbd1012c9..4b95f7a63a3b 100644
--- a/drivers/i2c/busses/i2c-parport-light.c
+++ b/drivers/i2c/busses/i2c-parport-light.c
@@ -2,13 +2,13 @@
2 * i2c-parport-light.c I2C bus over parallel port * 2 * i2c-parport-light.c I2C bus over parallel port *
3 * ------------------------------------------------------------------------ * 3 * ------------------------------------------------------------------------ *
4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org> 4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
5 5
6 Based on older i2c-velleman.c driver 6 Based on older i2c-velleman.c driver
7 Copyright (C) 1995-2000 Simon G. Vogl 7 Copyright (C) 1995-2000 Simon G. Vogl
8 With some changes from: 8 With some changes from:
9 Frodo Looijaard <frodol@dds.nl> 9 Frodo Looijaard <frodol@dds.nl>
10 Kyösti Mälkki <kmalkki@cc.hut.fi> 10 Kyösti Mälkki <kmalkki@cc.hut.fi>
11 11
12 This program is free software; you can redistribute it and/or modify 12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by 13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or 14 the Free Software Foundation; either version 2 of the License, or
@@ -114,7 +114,7 @@ static struct i2c_algo_bit_data parport_algo_data = {
114 .getscl = parport_getscl, 114 .getscl = parport_getscl,
115 .udelay = 50, 115 .udelay = 50,
116 .timeout = HZ, 116 .timeout = HZ,
117}; 117};
118 118
119/* ----- Driver registration ---------------------------------------------- */ 119/* ----- Driver registration ---------------------------------------------- */
120 120
@@ -132,7 +132,7 @@ static struct i2c_smbus_alert_setup alert_data = {
132static struct i2c_client *ara; 132static struct i2c_client *ara;
133static struct lineop parport_ctrl_irq = { 133static struct lineop parport_ctrl_irq = {
134 .val = (1 << 4), 134 .val = (1 << 4),
135 .port = CTRL, 135 .port = PORT_CTRL,
136}; 136};
137 137
138static int __devinit i2c_parport_probe(struct platform_device *pdev) 138static int __devinit i2c_parport_probe(struct platform_device *pdev)
@@ -245,7 +245,7 @@ static int __init i2c_parport_init(void)
245 if (irq != 0) 245 if (irq != 0)
246 pr_info(DRVNAME ": using irq %d\n", irq); 246 pr_info(DRVNAME ": using irq %d\n", irq);
247 247
248 if (!adapter_parm[type].getscl.val) 248 if (!adapter_parm[type].getscl.val)
249 parport_algo_data.getscl = NULL; 249 parport_algo_data.getscl = NULL;
250 250
251 /* Sets global pdev as a side effect */ 251 /* Sets global pdev as a side effect */
diff --git a/drivers/i2c/busses/i2c-parport.c b/drivers/i2c/busses/i2c-parport.c
index 0eb1515541e7..24565687ac9b 100644
--- a/drivers/i2c/busses/i2c-parport.c
+++ b/drivers/i2c/busses/i2c-parport.c
@@ -1,14 +1,14 @@
1/* ------------------------------------------------------------------------ * 1/* ------------------------------------------------------------------------ *
2 * i2c-parport.c I2C bus over parallel port * 2 * i2c-parport.c I2C bus over parallel port *
3 * ------------------------------------------------------------------------ * 3 * ------------------------------------------------------------------------ *
4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org> 4 Copyright (C) 2003-2011 Jean Delvare <khali@linux-fr.org>
5 5
6 Based on older i2c-philips-par.c driver 6 Based on older i2c-philips-par.c driver
7 Copyright (C) 1995-2000 Simon G. Vogl 7 Copyright (C) 1995-2000 Simon G. Vogl
8 With some changes from: 8 With some changes from:
9 Frodo Looijaard <frodol@dds.nl> 9 Frodo Looijaard <frodol@dds.nl>
10 Kyösti Mälkki <kmalkki@cc.hut.fi> 10 Kyösti Mälkki <kmalkki@cc.hut.fi>
11 11
12 This program is free software; you can redistribute it and/or modify 12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by 13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or 14 the Free Software Foundation; either version 2 of the License, or
@@ -33,6 +33,8 @@
33#include <linux/i2c-algo-bit.h> 33#include <linux/i2c-algo-bit.h>
34#include <linux/i2c-smbus.h> 34#include <linux/i2c-smbus.h>
35#include <linux/slab.h> 35#include <linux/slab.h>
36#include <linux/list.h>
37#include <linux/mutex.h>
36#include "i2c-parport.h" 38#include "i2c-parport.h"
37 39
38/* ----- Device list ------------------------------------------------------ */ 40/* ----- Device list ------------------------------------------------------ */
@@ -43,10 +45,11 @@ struct i2c_par {
43 struct i2c_algo_bit_data algo_data; 45 struct i2c_algo_bit_data algo_data;
44 struct i2c_smbus_alert_setup alert_data; 46 struct i2c_smbus_alert_setup alert_data;
45 struct i2c_client *ara; 47 struct i2c_client *ara;
46 struct i2c_par *next; 48 struct list_head node;
47}; 49};
48 50
49static struct i2c_par *adapter_list; 51static LIST_HEAD(adapter_list);
52static DEFINE_MUTEX(adapter_list_lock);
50 53
51/* ----- Low-level parallel port access ----------------------------------- */ 54/* ----- Low-level parallel port access ----------------------------------- */
52 55
@@ -75,13 +78,13 @@ static unsigned char port_read_control(struct parport *p)
75 return parport_read_control(p); 78 return parport_read_control(p);
76} 79}
77 80
78static void (*port_write[])(struct parport *, unsigned char) = { 81static void (* const port_write[])(struct parport *, unsigned char) = {
79 port_write_data, 82 port_write_data,
80 NULL, 83 NULL,
81 port_write_control, 84 port_write_control,
82}; 85};
83 86
84static unsigned char (*port_read[])(struct parport *) = { 87static unsigned char (* const port_read[])(struct parport *) = {
85 port_read_data, 88 port_read_data,
86 port_read_status, 89 port_read_status,
87 port_read_control, 90 port_read_control,
@@ -144,7 +147,7 @@ static const struct i2c_algo_bit_data parport_algo_data = {
144 .getscl = parport_getscl, 147 .getscl = parport_getscl,
145 .udelay = 10, /* ~50 kbps */ 148 .udelay = 10, /* ~50 kbps */
146 .timeout = HZ, 149 .timeout = HZ,
147}; 150};
148 151
149/* ----- I2c and parallel port call-back functions and structures --------- */ 152/* ----- I2c and parallel port call-back functions and structures --------- */
150 153
@@ -161,10 +164,10 @@ void i2c_parport_irq(void *data)
161 "SMBus alert received but no ARA client!\n"); 164 "SMBus alert received but no ARA client!\n");
162} 165}
163 166
164static void i2c_parport_attach (struct parport *port) 167static void i2c_parport_attach(struct parport *port)
165{ 168{
166 struct i2c_par *adapter; 169 struct i2c_par *adapter;
167 170
168 adapter = kzalloc(sizeof(struct i2c_par), GFP_KERNEL); 171 adapter = kzalloc(sizeof(struct i2c_par), GFP_KERNEL);
169 if (adapter == NULL) { 172 if (adapter == NULL) {
170 printk(KERN_ERR "i2c-parport: Failed to kzalloc\n"); 173 printk(KERN_ERR "i2c-parport: Failed to kzalloc\n");
@@ -177,7 +180,7 @@ static void i2c_parport_attach (struct parport *port)
177 NULL, NULL, i2c_parport_irq, PARPORT_FLAG_EXCL, adapter); 180 NULL, NULL, i2c_parport_irq, PARPORT_FLAG_EXCL, adapter);
178 if (!adapter->pdev) { 181 if (!adapter->pdev) {
179 printk(KERN_ERR "i2c-parport: Unable to register with parport\n"); 182 printk(KERN_ERR "i2c-parport: Unable to register with parport\n");
180 goto ERROR0; 183 goto err_free;
181 } 184 }
182 185
183 /* Fill the rest of the structure */ 186 /* Fill the rest of the structure */
@@ -197,7 +200,7 @@ static void i2c_parport_attach (struct parport *port)
197 200
198 if (parport_claim_or_block(adapter->pdev) < 0) { 201 if (parport_claim_or_block(adapter->pdev) < 0) {
199 printk(KERN_ERR "i2c-parport: Could not claim parallel port\n"); 202 printk(KERN_ERR "i2c-parport: Could not claim parallel port\n");
200 goto ERROR1; 203 goto err_unregister;
201 } 204 }
202 205
203 /* Reset hardware to a sane state (SCL and SDA high) */ 206 /* Reset hardware to a sane state (SCL and SDA high) */
@@ -212,7 +215,7 @@ static void i2c_parport_attach (struct parport *port)
212 215
213 if (i2c_bit_add_bus(&adapter->adapter) < 0) { 216 if (i2c_bit_add_bus(&adapter->adapter) < 0) {
214 printk(KERN_ERR "i2c-parport: Unable to register with I2C\n"); 217 printk(KERN_ERR "i2c-parport: Unable to register with I2C\n");
215 goto ERROR1; 218 goto err_unregister;
216 } 219 }
217 220
218 /* Setup SMBus alert if supported */ 221 /* Setup SMBus alert if supported */
@@ -228,24 +231,25 @@ static void i2c_parport_attach (struct parport *port)
228 } 231 }
229 232
230 /* Add the new adapter to the list */ 233 /* Add the new adapter to the list */
231 adapter->next = adapter_list; 234 mutex_lock(&adapter_list_lock);
232 adapter_list = adapter; 235 list_add_tail(&adapter->node, &adapter_list);
233 return; 236 mutex_unlock(&adapter_list_lock);
237 return;
234 238
235ERROR1: 239 err_unregister:
236 parport_release(adapter->pdev); 240 parport_release(adapter->pdev);
237 parport_unregister_device(adapter->pdev); 241 parport_unregister_device(adapter->pdev);
238ERROR0: 242 err_free:
239 kfree(adapter); 243 kfree(adapter);
240} 244}
241 245
242static void i2c_parport_detach (struct parport *port) 246static void i2c_parport_detach(struct parport *port)
243{ 247{
244 struct i2c_par *adapter, *prev; 248 struct i2c_par *adapter, *_n;
245 249
246 /* Walk the list */ 250 /* Walk the list */
247 for (prev = NULL, adapter = adapter_list; adapter; 251 mutex_lock(&adapter_list_lock);
248 prev = adapter, adapter = adapter->next) { 252 list_for_each_entry_safe(adapter, _n, &adapter_list, node) {
249 if (adapter->pdev->port == port) { 253 if (adapter->pdev->port == port) {
250 if (adapter->ara) { 254 if (adapter->ara) {
251 parport_disable_irq(port); 255 parport_disable_irq(port);
@@ -256,17 +260,14 @@ static void i2c_parport_detach (struct parport *port)
256 /* Un-init if needed (power off...) */ 260 /* Un-init if needed (power off...) */
257 if (adapter_parm[type].init.val) 261 if (adapter_parm[type].init.val)
258 line_set(port, 0, &adapter_parm[type].init); 262 line_set(port, 0, &adapter_parm[type].init);
259 263
260 parport_release(adapter->pdev); 264 parport_release(adapter->pdev);
261 parport_unregister_device(adapter->pdev); 265 parport_unregister_device(adapter->pdev);
262 if (prev) 266 list_del(&adapter->node);
263 prev->next = adapter->next;
264 else
265 adapter_list = adapter->next;
266 kfree(adapter); 267 kfree(adapter);
267 return;
268 } 268 }
269 } 269 }
270 mutex_unlock(&adapter_list_lock);
270} 271}
271 272
272static struct parport_driver i2c_parport_driver = { 273static struct parport_driver i2c_parport_driver = {
diff --git a/drivers/i2c/busses/i2c-parport.h b/drivers/i2c/busses/i2c-parport.h
index a9f66816546c..3fe652302ea7 100644
--- a/drivers/i2c/busses/i2c-parport.h
+++ b/drivers/i2c/busses/i2c-parport.h
@@ -2,7 +2,7 @@
2 * i2c-parport.h I2C bus over parallel port * 2 * i2c-parport.h I2C bus over parallel port *
3 * ------------------------------------------------------------------------ * 3 * ------------------------------------------------------------------------ *
4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org> 4 Copyright (C) 2003-2010 Jean Delvare <khali@linux-fr.org>
5 5
6 This program is free software; you can redistribute it and/or modify 6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 8 the Free Software Foundation; either version 2 of the License, or
@@ -18,13 +18,9 @@
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * ------------------------------------------------------------------------ */ 19 * ------------------------------------------------------------------------ */
20 20
21#ifdef DATA 21#define PORT_DATA 0
22#undef DATA 22#define PORT_STAT 1
23#endif 23#define PORT_CTRL 2
24
25#define DATA 0
26#define STAT 1
27#define CTRL 2
28 24
29struct lineop { 25struct lineop {
30 u8 val; 26 u8 val;
@@ -41,61 +37,61 @@ struct adapter_parm {
41 unsigned int smbus_alert:1; 37 unsigned int smbus_alert:1;
42}; 38};
43 39
44static struct adapter_parm adapter_parm[] = { 40static const struct adapter_parm adapter_parm[] = {
45 /* type 0: Philips adapter */ 41 /* type 0: Philips adapter */
46 { 42 {
47 .setsda = { 0x80, DATA, 1 }, 43 .setsda = { 0x80, PORT_DATA, 1 },
48 .setscl = { 0x08, CTRL, 0 }, 44 .setscl = { 0x08, PORT_CTRL, 0 },
49 .getsda = { 0x80, STAT, 0 }, 45 .getsda = { 0x80, PORT_STAT, 0 },
50 .getscl = { 0x08, STAT, 0 }, 46 .getscl = { 0x08, PORT_STAT, 0 },
51 }, 47 },
52 /* type 1: home brew teletext adapter */ 48 /* type 1: home brew teletext adapter */
53 { 49 {
54 .setsda = { 0x02, DATA, 0 }, 50 .setsda = { 0x02, PORT_DATA, 0 },
55 .setscl = { 0x01, DATA, 0 }, 51 .setscl = { 0x01, PORT_DATA, 0 },
56 .getsda = { 0x80, STAT, 1 }, 52 .getsda = { 0x80, PORT_STAT, 1 },
57 }, 53 },
58 /* type 2: Velleman K8000 adapter */ 54 /* type 2: Velleman K8000 adapter */
59 { 55 {
60 .setsda = { 0x02, CTRL, 1 }, 56 .setsda = { 0x02, PORT_CTRL, 1 },
61 .setscl = { 0x08, CTRL, 1 }, 57 .setscl = { 0x08, PORT_CTRL, 1 },
62 .getsda = { 0x10, STAT, 0 }, 58 .getsda = { 0x10, PORT_STAT, 0 },
63 }, 59 },
64 /* type 3: ELV adapter */ 60 /* type 3: ELV adapter */
65 { 61 {
66 .setsda = { 0x02, DATA, 1 }, 62 .setsda = { 0x02, PORT_DATA, 1 },
67 .setscl = { 0x01, DATA, 1 }, 63 .setscl = { 0x01, PORT_DATA, 1 },
68 .getsda = { 0x40, STAT, 1 }, 64 .getsda = { 0x40, PORT_STAT, 1 },
69 .getscl = { 0x08, STAT, 1 }, 65 .getscl = { 0x08, PORT_STAT, 1 },
70 }, 66 },
71 /* type 4: ADM1032 evaluation board */ 67 /* type 4: ADM1032 evaluation board */
72 { 68 {
73 .setsda = { 0x02, DATA, 1 }, 69 .setsda = { 0x02, PORT_DATA, 1 },
74 .setscl = { 0x01, DATA, 1 }, 70 .setscl = { 0x01, PORT_DATA, 1 },
75 .getsda = { 0x10, STAT, 1 }, 71 .getsda = { 0x10, PORT_STAT, 1 },
76 .init = { 0xf0, DATA, 0 }, 72 .init = { 0xf0, PORT_DATA, 0 },
77 .smbus_alert = 1, 73 .smbus_alert = 1,
78 }, 74 },
79 /* type 5: ADM1025, ADM1030 and ADM1031 evaluation boards */ 75 /* type 5: ADM1025, ADM1030 and ADM1031 evaluation boards */
80 { 76 {
81 .setsda = { 0x02, DATA, 1 }, 77 .setsda = { 0x02, PORT_DATA, 1 },
82 .setscl = { 0x01, DATA, 1 }, 78 .setscl = { 0x01, PORT_DATA, 1 },
83 .getsda = { 0x10, STAT, 1 }, 79 .getsda = { 0x10, PORT_STAT, 1 },
84 }, 80 },
85 /* type 6: Barco LPT->DVI (K5800236) adapter */ 81 /* type 6: Barco LPT->DVI (K5800236) adapter */
86 { 82 {
87 .setsda = { 0x02, DATA, 1 }, 83 .setsda = { 0x02, PORT_DATA, 1 },
88 .setscl = { 0x01, DATA, 1 }, 84 .setscl = { 0x01, PORT_DATA, 1 },
89 .getsda = { 0x20, STAT, 0 }, 85 .getsda = { 0x20, PORT_STAT, 0 },
90 .getscl = { 0x40, STAT, 0 }, 86 .getscl = { 0x40, PORT_STAT, 0 },
91 .init = { 0xfc, DATA, 0 }, 87 .init = { 0xfc, PORT_DATA, 0 },
92 }, 88 },
93 /* type 7: One For All JP1 parallel port adapter */ 89 /* type 7: One For All JP1 parallel port adapter */
94 { 90 {
95 .setsda = { 0x01, DATA, 0 }, 91 .setsda = { 0x01, PORT_DATA, 0 },
96 .setscl = { 0x02, DATA, 0 }, 92 .setscl = { 0x02, PORT_DATA, 0 },
97 .getsda = { 0x80, STAT, 1 }, 93 .getsda = { 0x80, PORT_STAT, 1 },
98 .init = { 0x04, DATA, 1 }, 94 .init = { 0x04, PORT_DATA, 1 },
99 }, 95 },
100}; 96};
101 97
diff --git a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c
index 4174101660c9..837b8c1aa02a 100644
--- a/drivers/i2c/busses/i2c-pasemi.c
+++ b/drivers/i2c/busses/i2c-pasemi.c
@@ -88,7 +88,7 @@ static void pasemi_smb_clear(struct pasemi_smbus *smbus)
88 reg_write(smbus, REG_SMSTA, status); 88 reg_write(smbus, REG_SMSTA, status);
89} 89}
90 90
91static unsigned int pasemi_smb_waitready(struct pasemi_smbus *smbus) 91static int pasemi_smb_waitready(struct pasemi_smbus *smbus)
92{ 92{
93 int timeout = 10; 93 int timeout = 10;
94 unsigned int status; 94 unsigned int status;
diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c
index 5f6d7f89e225..ace67995d7de 100644
--- a/drivers/i2c/busses/i2c-pca-platform.c
+++ b/drivers/i2c/busses/i2c-pca-platform.c
@@ -224,7 +224,7 @@ static int __devinit i2c_pca_pf_probe(struct platform_device *pdev)
224 224
225 if (irq) { 225 if (irq) {
226 ret = request_irq(irq, i2c_pca_pf_handler, 226 ret = request_irq(irq, i2c_pca_pf_handler,
227 IRQF_TRIGGER_FALLING, i2c->adap.name, i2c); 227 IRQF_TRIGGER_FALLING, pdev->name, i2c);
228 if (ret) 228 if (ret)
229 goto e_reqirq; 229 goto e_reqirq;
230 } 230 }
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
index a97e3fec8148..04be9f82e14b 100644
--- a/drivers/i2c/busses/i2c-pnx.c
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -65,7 +65,7 @@ static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
65 jiffies, expires); 65 jiffies, expires);
66 66
67 timer->expires = jiffies + expires; 67 timer->expires = jiffies + expires;
68 timer->data = (unsigned long)&alg_data; 68 timer->data = (unsigned long)alg_data;
69 69
70 add_timer(timer); 70 add_timer(timer);
71} 71}
diff --git a/drivers/i2c/busses/i2c-puv3.c b/drivers/i2c/busses/i2c-puv3.c
new file mode 100644
index 000000000000..fac673940849
--- /dev/null
+++ b/drivers/i2c/busses/i2c-puv3.c
@@ -0,0 +1,306 @@
1/*
2 * I2C driver for PKUnity-v3 SoC
3 * Code specific to PKUnity SoC and UniCore ISA
4 *
5 * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
6 * Copyright (C) 2001-2010 Guan Xuetao
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/err.h>
16#include <linux/slab.h>
17#include <linux/types.h>
18#include <linux/delay.h>
19#include <linux/i2c.h>
20#include <linux/init.h>
21#include <linux/clk.h>
22#include <linux/platform_device.h>
23#include <linux/io.h>
24#include <mach/hardware.h>
25
26/*
27 * Poll the i2c status register until the specified bit is set.
28 * Returns 0 if timed out (100 msec).
29 */
30static short poll_status(unsigned long bit)
31{
32 int loop_cntr = 1000;
33
34 if (bit & I2C_STATUS_TFNF) {
35 do {
36 udelay(10);
37 } while (!(readl(I2C_STATUS) & bit) && (--loop_cntr > 0));
38 } else {
39 /* RXRDY handler */
40 do {
41 if (readl(I2C_TAR) == I2C_TAR_EEPROM)
42 msleep(20);
43 else
44 udelay(10);
45 } while (!(readl(I2C_RXFLR) & 0xf) && (--loop_cntr > 0));
46 }
47
48 return (loop_cntr > 0);
49}
50
51static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
52{
53 int i2c_reg = *buf;
54
55 /* Read data */
56 while (length--) {
57 if (!poll_status(I2C_STATUS_TFNF)) {
58 dev_dbg(&adap->dev, "Tx FIFO Not Full timeout\n");
59 return -ETIMEDOUT;
60 }
61
62 /* send addr */
63 writel(i2c_reg | I2C_DATACMD_WRITE, I2C_DATACMD);
64
65 /* get ready to next write */
66 i2c_reg++;
67
68 /* send read CMD */
69 writel(I2C_DATACMD_READ, I2C_DATACMD);
70
71 /* wait until the Rx FIFO have available */
72 if (!poll_status(I2C_STATUS_RFNE)) {
73 dev_dbg(&adap->dev, "RXRDY timeout\n");
74 return -ETIMEDOUT;
75 }
76
77 /* read the data to buf */
78 *buf = (readl(I2C_DATACMD) & I2C_DATACMD_DAT_MASK);
79 buf++;
80 }
81
82 return 0;
83}
84
85static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length)
86{
87 int i2c_reg = *buf;
88
89 /* Do nothing but storing the reg_num to a static variable */
90 if (i2c_reg == -1) {
91 printk(KERN_WARNING "Error i2c reg\n");
92 return -ETIMEDOUT;
93 }
94
95 if (length == 1)
96 return 0;
97
98 buf++;
99 length--;
100 while (length--) {
101 /* send addr */
102 writel(i2c_reg | I2C_DATACMD_WRITE, I2C_DATACMD);
103
104 /* send write CMD */
105 writel(*buf | I2C_DATACMD_WRITE, I2C_DATACMD);
106
107 /* wait until the Rx FIFO have available */
108 msleep(20);
109
110 /* read the data to buf */
111 i2c_reg++;
112 buf++;
113 }
114
115 return 0;
116}
117
118/*
119 * Generic i2c master transfer entrypoint.
120 *
121 */
122static int puv3_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg,
123 int num)
124{
125 int i, ret;
126 unsigned char swap;
127
128 /* Disable i2c */
129 writel(I2C_ENABLE_DISABLE, I2C_ENABLE);
130
131 /* Set the work mode and speed*/
132 writel(I2C_CON_MASTER | I2C_CON_SPEED_STD | I2C_CON_SLAVEDISABLE, I2C_CON);
133
134 writel(pmsg->addr, I2C_TAR);
135
136 /* Enable i2c */
137 writel(I2C_ENABLE_ENABLE, I2C_ENABLE);
138
139 dev_dbg(&adap->dev, "puv3_i2c_xfer: processing %d messages:\n", num);
140
141 for (i = 0; i < num; i++) {
142 dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
143 pmsg->flags & I2C_M_RD ? "read" : "writ",
144 pmsg->len, pmsg->len > 1 ? "s" : "",
145 pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
146
147 if (pmsg->len && pmsg->buf) { /* sanity check */
148 if (pmsg->flags & I2C_M_RD)
149 ret = xfer_read(adap, pmsg->buf, pmsg->len);
150 else
151 ret = xfer_write(adap, pmsg->buf, pmsg->len);
152
153 if (ret)
154 return ret;
155
156 }
157 dev_dbg(&adap->dev, "transfer complete\n");
158 pmsg++; /* next message */
159 }
160
161 /* XXX: fixup be16_to_cpu in bq27x00_battery.c */
162 if (pmsg->addr == I2C_TAR_PWIC) {
163 swap = pmsg->buf[0];
164 pmsg->buf[0] = pmsg->buf[1];
165 pmsg->buf[1] = swap;
166 }
167
168 return i;
169}
170
171/*
172 * Return list of supported functionality.
173 */
174static u32 puv3_i2c_func(struct i2c_adapter *adapter)
175{
176 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
177}
178
179static struct i2c_algorithm puv3_i2c_algorithm = {
180 .master_xfer = puv3_i2c_xfer,
181 .functionality = puv3_i2c_func,
182};
183
184/*
185 * Main initialization routine.
186 */
187static int __devinit puv3_i2c_probe(struct platform_device *pdev)
188{
189 struct i2c_adapter *adapter;
190 struct resource *mem;
191 int rc;
192
193 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
194 if (!mem)
195 return -ENODEV;
196
197 if (!request_mem_region(mem->start, resource_size(mem), "puv3_i2c"))
198 return -EBUSY;
199
200 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
201 if (adapter == NULL) {
202 dev_err(&pdev->dev, "can't allocate inteface!\n");
203 rc = -ENOMEM;
204 goto fail_nomem;
205 }
206 snprintf(adapter->name, sizeof(adapter->name), "PUV3-I2C at 0x%08x",
207 mem->start);
208 adapter->algo = &puv3_i2c_algorithm;
209 adapter->class = I2C_CLASS_HWMON;
210 adapter->dev.parent = &pdev->dev;
211
212 platform_set_drvdata(pdev, adapter);
213
214 adapter->nr = pdev->id;
215 rc = i2c_add_numbered_adapter(adapter);
216 if (rc) {
217 dev_err(&pdev->dev, "Adapter '%s' registration failed\n",
218 adapter->name);
219 goto fail_add_adapter;
220 }
221
222 dev_info(&pdev->dev, "PKUnity v3 i2c bus adapter.\n");
223 return 0;
224
225fail_add_adapter:
226 platform_set_drvdata(pdev, NULL);
227 kfree(adapter);
228fail_nomem:
229 release_mem_region(mem->start, resource_size(mem));
230
231 return rc;
232}
233
234static int __devexit puv3_i2c_remove(struct platform_device *pdev)
235{
236 struct i2c_adapter *adapter = platform_get_drvdata(pdev);
237 struct resource *mem;
238 int rc;
239
240 rc = i2c_del_adapter(adapter);
241 if (rc) {
242 dev_err(&pdev->dev, "Adapter '%s' delete fail\n",
243 adapter->name);
244 return rc;
245 }
246
247 put_device(&pdev->dev);
248 platform_set_drvdata(pdev, NULL);
249
250 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
251 release_mem_region(mem->start, resource_size(mem));
252
253 return rc;
254}
255
256#ifdef CONFIG_PM
257static int puv3_i2c_suspend(struct platform_device *dev, pm_message_t state)
258{
259 int poll_count;
260 /* Disable the IIC */
261 writel(I2C_ENABLE_DISABLE, I2C_ENABLE);
262 for (poll_count = 0; poll_count < 50; poll_count++) {
263 if (readl(I2C_ENSTATUS) & I2C_ENSTATUS_ENABLE)
264 udelay(25);
265 }
266
267 return 0;
268}
269
270static int puv3_i2c_resume(struct platform_device *dev)
271{
272 return 0 ;
273}
274#else
275#define puv3_i2c_suspend NULL
276#define puv3_i2c_resume NULL
277#endif
278
279MODULE_ALIAS("platform:puv3_i2c");
280
281static struct platform_driver puv3_i2c_driver = {
282 .probe = puv3_i2c_probe,
283 .remove = __devexit_p(puv3_i2c_remove),
284 .suspend = puv3_i2c_suspend,
285 .resume = puv3_i2c_resume,
286 .driver = {
287 .name = "PKUnity-v3-I2C",
288 .owner = THIS_MODULE,
289 }
290};
291
292static int __init puv3_i2c_init(void)
293{
294 return platform_driver_register(&puv3_i2c_driver);
295}
296
297static void __exit puv3_i2c_exit(void)
298{
299 platform_driver_unregister(&puv3_i2c_driver);
300}
301
302module_init(puv3_i2c_init);
303module_exit(puv3_i2c_exit);
304
305MODULE_DESCRIPTION("PKUnity v3 I2C driver");
306MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c
new file mode 100644
index 000000000000..6659d269b841
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pxa-pci.c
@@ -0,0 +1,176 @@
1/*
2 * The CE4100's I2C device is more or less the same one as found on PXA.
3 * It does not support slave mode, the register slightly moved. This PCI
4 * device provides three bars, every contains a single I2C controller.
5 */
6#include <linux/pci.h>
7#include <linux/platform_device.h>
8#include <linux/i2c/pxa-i2c.h>
9#include <linux/of.h>
10#include <linux/of_device.h>
11#include <linux/of_address.h>
12
13#define CE4100_PCI_I2C_DEVS 3
14
15struct ce4100_devices {
16 struct platform_device *pdev[CE4100_PCI_I2C_DEVS];
17};
18
19static struct platform_device *add_i2c_device(struct pci_dev *dev, int bar)
20{
21 struct platform_device *pdev;
22 struct i2c_pxa_platform_data pdata;
23 struct resource res[2];
24 struct device_node *child;
25 static int devnum;
26 int ret;
27
28 memset(&pdata, 0, sizeof(struct i2c_pxa_platform_data));
29 memset(&res, 0, sizeof(res));
30
31 res[0].flags = IORESOURCE_MEM;
32 res[0].start = pci_resource_start(dev, bar);
33 res[0].end = pci_resource_end(dev, bar);
34
35 res[1].flags = IORESOURCE_IRQ;
36 res[1].start = dev->irq;
37 res[1].end = dev->irq;
38
39 for_each_child_of_node(dev->dev.of_node, child) {
40 const void *prop;
41 struct resource r;
42 int ret;
43
44 ret = of_address_to_resource(child, 0, &r);
45 if (ret < 0)
46 continue;
47 if (r.start != res[0].start)
48 continue;
49 if (r.end != res[0].end)
50 continue;
51 if (r.flags != res[0].flags)
52 continue;
53
54 prop = of_get_property(child, "fast-mode", NULL);
55 if (prop)
56 pdata.fast_mode = 1;
57
58 break;
59 }
60
61 if (!child) {
62 dev_err(&dev->dev, "failed to match a DT node for bar %d.\n",
63 bar);
64 ret = -EINVAL;
65 goto out;
66 }
67
68 pdev = platform_device_alloc("ce4100-i2c", devnum);
69 if (!pdev) {
70 of_node_put(child);
71 ret = -ENOMEM;
72 goto out;
73 }
74 pdev->dev.parent = &dev->dev;
75 pdev->dev.of_node = child;
76
77 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
78 if (ret)
79 goto err;
80
81 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
82 if (ret)
83 goto err;
84
85 ret = platform_device_add(pdev);
86 if (ret)
87 goto err;
88 devnum++;
89 return pdev;
90err:
91 platform_device_put(pdev);
92out:
93 return ERR_PTR(ret);
94}
95
96static int __devinit ce4100_i2c_probe(struct pci_dev *dev,
97 const struct pci_device_id *ent)
98{
99 int ret;
100 int i;
101 struct ce4100_devices *sds;
102
103 ret = pci_enable_device_mem(dev);
104 if (ret)
105 return ret;
106
107 if (!dev->dev.of_node) {
108 dev_err(&dev->dev, "Missing device tree node.\n");
109 return -EINVAL;
110 }
111 sds = kzalloc(sizeof(*sds), GFP_KERNEL);
112 if (!sds)
113 goto err_mem;
114
115 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) {
116 sds->pdev[i] = add_i2c_device(dev, i);
117 if (IS_ERR(sds->pdev[i])) {
118 while (--i >= 0)
119 platform_device_unregister(sds->pdev[i]);
120 goto err_dev_add;
121 }
122 }
123 pci_set_drvdata(dev, sds);
124 return 0;
125
126err_dev_add:
127 pci_set_drvdata(dev, NULL);
128 kfree(sds);
129err_mem:
130 pci_disable_device(dev);
131 return ret;
132}
133
134static void __devexit ce4100_i2c_remove(struct pci_dev *dev)
135{
136 struct ce4100_devices *sds;
137 unsigned int i;
138
139 sds = pci_get_drvdata(dev);
140 pci_set_drvdata(dev, NULL);
141
142 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++)
143 platform_device_unregister(sds->pdev[i]);
144
145 pci_disable_device(dev);
146 kfree(sds);
147}
148
149static struct pci_device_id ce4100_i2c_devices[] __devinitdata = {
150 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e68)},
151 { },
152};
153MODULE_DEVICE_TABLE(pci, ce4100_i2c_devices);
154
155static struct pci_driver ce4100_i2c_driver = {
156 .name = "ce4100_i2c",
157 .id_table = ce4100_i2c_devices,
158 .probe = ce4100_i2c_probe,
159 .remove = __devexit_p(ce4100_i2c_remove),
160};
161
162static int __init ce4100_i2c_init(void)
163{
164 return pci_register_driver(&ce4100_i2c_driver);
165}
166module_init(ce4100_i2c_init);
167
168static void __exit ce4100_i2c_exit(void)
169{
170 pci_unregister_driver(&ce4100_i2c_driver);
171}
172module_exit(ce4100_i2c_exit);
173
174MODULE_DESCRIPTION("CE4100 PCI-I2C glue code for PXA's driver");
175MODULE_LICENSE("GPL v2");
176MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index c94e51b2651e..f59224a5c761 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -22,7 +22,6 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/i2c.h> 24#include <linux/i2c.h>
25#include <linux/i2c-id.h>
26#include <linux/init.h> 25#include <linux/init.h>
27#include <linux/time.h> 26#include <linux/time.h>
28#include <linux/sched.h> 27#include <linux/sched.h>
@@ -30,38 +29,75 @@
30#include <linux/errno.h> 29#include <linux/errno.h>
31#include <linux/interrupt.h> 30#include <linux/interrupt.h>
32#include <linux/i2c-pxa.h> 31#include <linux/i2c-pxa.h>
32#include <linux/of_i2c.h>
33#include <linux/platform_device.h> 33#include <linux/platform_device.h>
34#include <linux/err.h> 34#include <linux/err.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/slab.h> 36#include <linux/slab.h>
37#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/i2c/pxa-i2c.h>
38 39
39#include <asm/irq.h> 40#include <asm/irq.h>
40#include <plat/i2c.h> 41
42#ifndef CONFIG_HAVE_CLK
43#define clk_get(dev, id) NULL
44#define clk_put(clk) do { } while (0)
45#define clk_disable(clk) do { } while (0)
46#define clk_enable(clk) do { } while (0)
47#endif
48
49struct pxa_reg_layout {
50 u32 ibmr;
51 u32 idbr;
52 u32 icr;
53 u32 isr;
54 u32 isar;
55};
56
57enum pxa_i2c_types {
58 REGS_PXA2XX,
59 REGS_PXA3XX,
60 REGS_CE4100,
61};
41 62
42/* 63/*
43 * I2C register offsets will be shifted 0 or 1 bit left, depending on 64 * I2C registers definitions
44 * different SoCs
45 */ 65 */
46#define REG_SHIFT_0 (0 << 0) 66static struct pxa_reg_layout pxa_reg_layout[] = {
47#define REG_SHIFT_1 (1 << 0) 67 [REGS_PXA2XX] = {
48#define REG_SHIFT(d) ((d) & 0x1) 68 .ibmr = 0x00,
69 .idbr = 0x08,
70 .icr = 0x10,
71 .isr = 0x18,
72 .isar = 0x20,
73 },
74 [REGS_PXA3XX] = {
75 .ibmr = 0x00,
76 .idbr = 0x04,
77 .icr = 0x08,
78 .isr = 0x0c,
79 .isar = 0x10,
80 },
81 [REGS_CE4100] = {
82 .ibmr = 0x14,
83 .idbr = 0x0c,
84 .icr = 0x00,
85 .isr = 0x04,
86 /* no isar register */
87 },
88};
49 89
50static const struct platform_device_id i2c_pxa_id_table[] = { 90static const struct platform_device_id i2c_pxa_id_table[] = {
51 { "pxa2xx-i2c", REG_SHIFT_1 }, 91 { "pxa2xx-i2c", REGS_PXA2XX },
52 { "pxa3xx-pwri2c", REG_SHIFT_0 }, 92 { "pxa3xx-pwri2c", REGS_PXA3XX },
93 { "ce4100-i2c", REGS_CE4100 },
53 { }, 94 { },
54}; 95};
55MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); 96MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
56 97
57/* 98/*
58 * I2C registers and bit definitions 99 * I2C bit definitions
59 */ 100 */
60#define IBMR (0x00)
61#define IDBR (0x08)
62#define ICR (0x10)
63#define ISR (0x18)
64#define ISAR (0x20)
65 101
66#define ICR_START (1 << 0) /* start bit */ 102#define ICR_START (1 << 0) /* start bit */
67#define ICR_STOP (1 << 1) /* stop bit */ 103#define ICR_STOP (1 << 1) /* stop bit */
@@ -112,7 +148,11 @@ struct pxa_i2c {
112 u32 icrlog[32]; 148 u32 icrlog[32];
113 149
114 void __iomem *reg_base; 150 void __iomem *reg_base;
115 unsigned int reg_shift; 151 void __iomem *reg_ibmr;
152 void __iomem *reg_idbr;
153 void __iomem *reg_icr;
154 void __iomem *reg_isr;
155 void __iomem *reg_isar;
116 156
117 unsigned long iobase; 157 unsigned long iobase;
118 unsigned long iosize; 158 unsigned long iosize;
@@ -122,11 +162,11 @@ struct pxa_i2c {
122 unsigned int fast_mode :1; 162 unsigned int fast_mode :1;
123}; 163};
124 164
125#define _IBMR(i2c) ((i2c)->reg_base + (0x0 << (i2c)->reg_shift)) 165#define _IBMR(i2c) ((i2c)->reg_ibmr)
126#define _IDBR(i2c) ((i2c)->reg_base + (0x4 << (i2c)->reg_shift)) 166#define _IDBR(i2c) ((i2c)->reg_idbr)
127#define _ICR(i2c) ((i2c)->reg_base + (0x8 << (i2c)->reg_shift)) 167#define _ICR(i2c) ((i2c)->reg_icr)
128#define _ISR(i2c) ((i2c)->reg_base + (0xc << (i2c)->reg_shift)) 168#define _ISR(i2c) ((i2c)->reg_isr)
129#define _ISAR(i2c) ((i2c)->reg_base + (0x10 << (i2c)->reg_shift)) 169#define _ISAR(i2c) ((i2c)->reg_isar)
130 170
131/* 171/*
132 * I2C Slave mode address 172 * I2C Slave mode address
@@ -419,7 +459,8 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
419 writel(I2C_ISR_INIT, _ISR(i2c)); 459 writel(I2C_ISR_INIT, _ISR(i2c));
420 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c)); 460 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
421 461
422 writel(i2c->slave_addr, _ISAR(i2c)); 462 if (i2c->reg_isar)
463 writel(i2c->slave_addr, _ISAR(i2c));
423 464
424 /* set control register values */ 465 /* set control register values */
425 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c)); 466 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c));
@@ -730,8 +771,10 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
730 */ 771 */
731 ret = i2c->msg_idx; 772 ret = i2c->msg_idx;
732 773
733 if (timeout == 0) 774 if (!timeout && i2c->msg_num) {
734 i2c_pxa_scream_blue_murder(i2c, "timeout"); 775 i2c_pxa_scream_blue_murder(i2c, "timeout");
776 ret = I2C_RETRY;
777 }
735 778
736 out: 779 out:
737 return ret; 780 return ret;
@@ -916,11 +959,16 @@ static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
916 writel(icr, _ICR(i2c)); 959 writel(icr, _ICR(i2c));
917} 960}
918 961
962#define VALID_INT_SOURCE (ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF | \
963 ISR_SAD | ISR_BED)
919static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id) 964static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
920{ 965{
921 struct pxa_i2c *i2c = dev_id; 966 struct pxa_i2c *i2c = dev_id;
922 u32 isr = readl(_ISR(i2c)); 967 u32 isr = readl(_ISR(i2c));
923 968
969 if (!(isr & VALID_INT_SOURCE))
970 return IRQ_NONE;
971
924 if (i2c_debug > 2 && 0) { 972 if (i2c_debug > 2 && 0) {
925 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", 973 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
926 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c))); 974 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
@@ -935,7 +983,7 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
935 /* 983 /*
936 * Always clear all pending IRQs. 984 * Always clear all pending IRQs.
937 */ 985 */
938 writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c)); 986 writel(isr & VALID_INT_SOURCE, _ISR(i2c));
939 987
940 if (isr & ISR_SAD) 988 if (isr & ISR_SAD)
941 i2c_pxa_slave_start(i2c, isr); 989 i2c_pxa_slave_start(i2c, isr);
@@ -1002,6 +1050,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1002 struct resource *res; 1050 struct resource *res;
1003 struct i2c_pxa_platform_data *plat = dev->dev.platform_data; 1051 struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
1004 const struct platform_device_id *id = platform_get_device_id(dev); 1052 const struct platform_device_id *id = platform_get_device_id(dev);
1053 enum pxa_i2c_types i2c_type = id->driver_data;
1005 int ret; 1054 int ret;
1006 int irq; 1055 int irq;
1007 1056
@@ -1045,7 +1094,13 @@ static int i2c_pxa_probe(struct platform_device *dev)
1045 ret = -EIO; 1094 ret = -EIO;
1046 goto eremap; 1095 goto eremap;
1047 } 1096 }
1048 i2c->reg_shift = REG_SHIFT(id->driver_data); 1097
1098 i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr;
1099 i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
1100 i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
1101 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
1102 if (i2c_type != REGS_CE4100)
1103 i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
1049 1104
1050 i2c->iobase = res->start; 1105 i2c->iobase = res->start;
1051 i2c->iosize = resource_size(res); 1106 i2c->iosize = resource_size(res);
@@ -1073,7 +1128,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1073 i2c->adap.algo = &i2c_pxa_pio_algorithm; 1128 i2c->adap.algo = &i2c_pxa_pio_algorithm;
1074 } else { 1129 } else {
1075 i2c->adap.algo = &i2c_pxa_algorithm; 1130 i2c->adap.algo = &i2c_pxa_algorithm;
1076 ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED, 1131 ret = request_irq(irq, i2c_pxa_handler, IRQF_SHARED,
1077 i2c->adap.name, i2c); 1132 i2c->adap.name, i2c);
1078 if (ret) 1133 if (ret)
1079 goto ereqirq; 1134 goto ereqirq;
@@ -1083,12 +1138,19 @@ static int i2c_pxa_probe(struct platform_device *dev)
1083 1138
1084 i2c->adap.algo_data = i2c; 1139 i2c->adap.algo_data = i2c;
1085 i2c->adap.dev.parent = &dev->dev; 1140 i2c->adap.dev.parent = &dev->dev;
1141#ifdef CONFIG_OF
1142 i2c->adap.dev.of_node = dev->dev.of_node;
1143#endif
1086 1144
1087 ret = i2c_add_numbered_adapter(&i2c->adap); 1145 if (i2c_type == REGS_CE4100)
1146 ret = i2c_add_adapter(&i2c->adap);
1147 else
1148 ret = i2c_add_numbered_adapter(&i2c->adap);
1088 if (ret < 0) { 1149 if (ret < 0) {
1089 printk(KERN_INFO "I2C: Failed to add bus\n"); 1150 printk(KERN_INFO "I2C: Failed to add bus\n");
1090 goto eadapt; 1151 goto eadapt;
1091 } 1152 }
1153 of_i2c_register_devices(&i2c->adap);
1092 1154
1093 platform_set_drvdata(dev, i2c); 1155 platform_set_drvdata(dev, i2c);
1094 1156
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index bf831bf81587..f84a63c6dd97 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -24,7 +24,6 @@
24#include <linux/module.h> 24#include <linux/module.h>
25 25
26#include <linux/i2c.h> 26#include <linux/i2c.h>
27#include <linux/i2c-id.h>
28#include <linux/init.h> 27#include <linux/init.h>
29#include <linux/time.h> 28#include <linux/time.h>
30#include <linux/interrupt.h> 29#include <linux/interrupt.h>
@@ -249,12 +248,12 @@ static inline int is_msgend(struct s3c24xx_i2c *i2c)
249 return i2c->msg_ptr >= i2c->msg->len; 248 return i2c->msg_ptr >= i2c->msg->len;
250} 249}
251 250
252/* i2s_s3c_irq_nextbyte 251/* i2c_s3c_irq_nextbyte
253 * 252 *
254 * process an interrupt and work out what to do 253 * process an interrupt and work out what to do
255 */ 254 */
256 255
257static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) 256static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
258{ 257{
259 unsigned long tmp; 258 unsigned long tmp;
260 unsigned char byte; 259 unsigned char byte;
@@ -265,7 +264,6 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
265 case STATE_IDLE: 264 case STATE_IDLE:
266 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); 265 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
267 goto out; 266 goto out;
268 break;
269 267
270 case STATE_STOP: 268 case STATE_STOP:
271 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); 269 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
@@ -445,7 +443,7 @@ static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
445 /* pretty much this leaves us with the fact that we've 443 /* pretty much this leaves us with the fact that we've
446 * transmitted or received whatever byte we last sent */ 444 * transmitted or received whatever byte we last sent */
447 445
448 i2s_s3c_irq_nextbyte(i2c, status); 446 i2c_s3c_irq_nextbyte(i2c, status);
449 447
450 out: 448 out:
451 return IRQ_HANDLED; 449 return IRQ_HANDLED;
@@ -555,18 +553,23 @@ static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
555 int retry; 553 int retry;
556 int ret; 554 int ret;
557 555
556 clk_enable(i2c->clk);
557
558 for (retry = 0; retry < adap->retries; retry++) { 558 for (retry = 0; retry < adap->retries; retry++) {
559 559
560 ret = s3c24xx_i2c_doxfer(i2c, msgs, num); 560 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
561 561
562 if (ret != -EAGAIN) 562 if (ret != -EAGAIN) {
563 clk_disable(i2c->clk);
563 return ret; 564 return ret;
565 }
564 566
565 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); 567 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
566 568
567 udelay(100); 569 udelay(100);
568 } 570 }
569 571
572 clk_disable(i2c->clk);
570 return -EREMOTEIO; 573 return -EREMOTEIO;
571} 574}
572 575
@@ -911,6 +914,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
911 platform_set_drvdata(pdev, i2c); 914 platform_set_drvdata(pdev, i2c);
912 915
913 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); 916 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
917 clk_disable(i2c->clk);
914 return 0; 918 return 0;
915 919
916 err_cpufreq: 920 err_cpufreq:
@@ -978,7 +982,9 @@ static int s3c24xx_i2c_resume(struct device *dev)
978 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); 982 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
979 983
980 i2c->suspended = 0; 984 i2c->suspended = 0;
985 clk_enable(i2c->clk);
981 s3c24xx_i2c_init(i2c); 986 s3c24xx_i2c_init(i2c);
987 clk_disable(i2c->clk);
982 988
983 return 0; 989 return 0;
984} 990}
diff --git a/drivers/i2c/busses/i2c-s6000.c b/drivers/i2c/busses/i2c-s6000.c
index cadc0216e02f..cb5d01e279c6 100644
--- a/drivers/i2c/busses/i2c-s6000.c
+++ b/drivers/i2c/busses/i2c-s6000.c
@@ -318,7 +318,7 @@ static int __devinit s6i2c_probe(struct platform_device *dev)
318 rc = request_irq(iface->irq, s6i2c_interrupt_entry, 318 rc = request_irq(iface->irq, s6i2c_interrupt_entry,
319 IRQF_SHARED, dev->name, iface); 319 IRQF_SHARED, dev->name, iface);
320 if (rc) { 320 if (rc) {
321 dev_err(&p_adap->dev, "s6i2c: cant get IRQ %d\n", iface->irq); 321 dev_err(&p_adap->dev, "s6i2c: can't get IRQ %d\n", iface->irq);
322 goto err_clk_dis; 322 goto err_clk_dis;
323 } 323 }
324 324
diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c
index 4f93da31d3ad..3cad8fecc3d3 100644
--- a/drivers/i2c/busses/i2c-sh7760.c
+++ b/drivers/i2c/busses/i2c-sh7760.c
@@ -101,12 +101,12 @@ struct cami2c {
101 101
102static inline void OUT32(struct cami2c *cam, int reg, unsigned long val) 102static inline void OUT32(struct cami2c *cam, int reg, unsigned long val)
103{ 103{
104 ctrl_outl(val, (unsigned long)cam->iobase + reg); 104 __raw_writel(val, (unsigned long)cam->iobase + reg);
105} 105}
106 106
107static inline unsigned long IN32(struct cami2c *cam, int reg) 107static inline unsigned long IN32(struct cami2c *cam, int reg)
108{ 108{
109 return ctrl_inl((unsigned long)cam->iobase + reg); 109 return __raw_readl((unsigned long)cam->iobase + reg);
110} 110}
111 111
112static irqreturn_t sh7760_i2c_irq(int irq, void *ptr) 112static irqreturn_t sh7760_i2c_irq(int irq, void *ptr)
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index 598c49acaeb5..f633a53b6dbe 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -32,6 +32,7 @@
32#include <linux/clk.h> 32#include <linux/clk.h>
33#include <linux/io.h> 33#include <linux/io.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35#include <linux/i2c/i2c-sh_mobile.h>
35 36
36/* Transmit operation: */ 37/* Transmit operation: */
37/* */ 38/* */
@@ -117,7 +118,7 @@ struct sh_mobile_i2c_data {
117 struct device *dev; 118 struct device *dev;
118 void __iomem *reg; 119 void __iomem *reg;
119 struct i2c_adapter adap; 120 struct i2c_adapter adap;
120 121 unsigned long bus_speed;
121 struct clk *clk; 122 struct clk *clk;
122 u_int8_t icic; 123 u_int8_t icic;
123 u_int8_t iccl; 124 u_int8_t iccl;
@@ -205,7 +206,7 @@ static void activate_ch(struct sh_mobile_i2c_data *pd)
205 * We also round off the result. 206 * We also round off the result.
206 */ 207 */
207 num = i2c_clk * 5; 208 num = i2c_clk * 5;
208 denom = NORMAL_SPEED * 9; 209 denom = pd->bus_speed * 9;
209 tmp = num * 10 / denom; 210 tmp = num * 10 / denom;
210 if (tmp % 10 >= 5) 211 if (tmp % 10 >= 5)
211 pd->iccl = (u_int8_t)((num/denom) + 1); 212 pd->iccl = (u_int8_t)((num/denom) + 1);
@@ -538,15 +539,17 @@ static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
538{ 539{
539 struct resource *res; 540 struct resource *res;
540 int ret = -ENXIO; 541 int ret = -ENXIO;
541 int q, m; 542 int n, k = 0;
542 int k = 0;
543 int n = 0;
544 543
545 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) { 544 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
546 for (n = res->start; hook && n <= res->end; n++) { 545 for (n = res->start; hook && n <= res->end; n++) {
547 if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED, 546 if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
548 dev_name(&dev->dev), dev)) 547 dev_name(&dev->dev), dev)) {
548 for (n--; n >= res->start; n--)
549 free_irq(n, dev);
550
549 goto rollback; 551 goto rollback;
552 }
550 } 553 }
551 k++; 554 k++;
552 } 555 }
@@ -554,16 +557,17 @@ static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
554 if (hook) 557 if (hook)
555 return k > 0 ? 0 : -ENOENT; 558 return k > 0 ? 0 : -ENOENT;
556 559
557 k--;
558 ret = 0; 560 ret = 0;
559 561
560 rollback: 562 rollback:
561 for (q = k; k >= 0; k--) { 563 k--;
562 for (m = n; m >= res->start; m--) 564
563 free_irq(m, dev); 565 while (k >= 0) {
566 res = platform_get_resource(dev, IORESOURCE_IRQ, k);
567 for (n = res->start; n <= res->end; n++)
568 free_irq(n, dev);
564 569
565 res = platform_get_resource(dev, IORESOURCE_IRQ, k - 1); 570 k--;
566 m = res->end;
567 } 571 }
568 572
569 return ret; 573 return ret;
@@ -571,10 +575,10 @@ static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
571 575
572static int sh_mobile_i2c_probe(struct platform_device *dev) 576static int sh_mobile_i2c_probe(struct platform_device *dev)
573{ 577{
578 struct i2c_sh_mobile_platform_data *pdata = dev->dev.platform_data;
574 struct sh_mobile_i2c_data *pd; 579 struct sh_mobile_i2c_data *pd;
575 struct i2c_adapter *adap; 580 struct i2c_adapter *adap;
576 struct resource *res; 581 struct resource *res;
577 char clk_name[8];
578 int size; 582 int size;
579 int ret; 583 int ret;
580 584
@@ -584,10 +588,9 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
584 return -ENOMEM; 588 return -ENOMEM;
585 } 589 }
586 590
587 snprintf(clk_name, sizeof(clk_name), "i2c%d", dev->id); 591 pd->clk = clk_get(&dev->dev, NULL);
588 pd->clk = clk_get(&dev->dev, clk_name);
589 if (IS_ERR(pd->clk)) { 592 if (IS_ERR(pd->clk)) {
590 dev_err(&dev->dev, "cannot get clock \"%s\"\n", clk_name); 593 dev_err(&dev->dev, "cannot get clock\n");
591 ret = PTR_ERR(pd->clk); 594 ret = PTR_ERR(pd->clk);
592 goto err; 595 goto err;
593 } 596 }
@@ -617,6 +620,11 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
617 goto err_irq; 620 goto err_irq;
618 } 621 }
619 622
623 /* Use platformd data bus speed or NORMAL_SPEED */
624 pd->bus_speed = NORMAL_SPEED;
625 if (pdata && pdata->bus_speed)
626 pd->bus_speed = pdata->bus_speed;
627
620 /* The IIC blocks on SH-Mobile ARM processors 628 /* The IIC blocks on SH-Mobile ARM processors
621 * come with two new bits in ICIC. 629 * come with two new bits in ICIC.
622 */ 630 */
@@ -657,6 +665,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
657 goto err_all; 665 goto err_all;
658 } 666 }
659 667
668 dev_info(&dev->dev, "I2C adapter %d with bus speed %lu Hz\n",
669 adap->nr, pd->bus_speed);
660 return 0; 670 return 0;
661 671
662 err_all: 672 err_all:
@@ -726,3 +736,4 @@ module_exit(sh_mobile_i2c_adap_exit);
726MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver"); 736MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
727MODULE_AUTHOR("Magnus Damm"); 737MODULE_AUTHOR("Magnus Damm");
728MODULE_LICENSE("GPL v2"); 738MODULE_LICENSE("GPL v2");
739MODULE_ALIAS("platform:i2c-sh_mobile");
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index 495be451d326..99879617e686 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -497,7 +497,7 @@ static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate)
497 u32 val; 497 u32 val;
498 int i = 0; 498 int i = 0;
499 499
500 /* Locate the apropriate clock setting */ 500 /* Locate the appropriate clock setting */
501 while (i < ARRAY_SIZE(stu300_clktable) - 1 && 501 while (i < ARRAY_SIZE(stu300_clktable) - 1 &&
502 stu300_clktable[i].rate < clkrate) 502 stu300_clktable[i].rate < clkrate)
503 i++; 503 i++;
@@ -644,7 +644,7 @@ static int stu300_send_address(struct stu300_dev *dev,
644 ret = stu300_await_event(dev, STU300_EVENT_6); 644 ret = stu300_await_event(dev, STU300_EVENT_6);
645 645
646 /* 646 /*
647 * Clear any pending EVENT 6 no matter what happend during 647 * Clear any pending EVENT 6 no matter what happened during
648 * await_event. 648 * await_event.
649 */ 649 */
650 val = stu300_r8(dev->virtbase + I2C_CR); 650 val = stu300_r8(dev->virtbase + I2C_CR);
@@ -942,7 +942,7 @@ stu300_probe(struct platform_device *pdev)
942 adap->owner = THIS_MODULE; 942 adap->owner = THIS_MODULE;
943 /* DDC class but actually often used for more generic I2C */ 943 /* DDC class but actually often used for more generic I2C */
944 adap->class = I2C_CLASS_DDC; 944 adap->class = I2C_CLASS_DDC;
945 strncpy(adap->name, "ST Microelectronics DDC I2C adapter", 945 strlcpy(adap->name, "ST Microelectronics DDC I2C adapter",
946 sizeof(adap->name)); 946 sizeof(adap->name));
947 adap->nr = bus_nr; 947 adap->nr = bus_nr;
948 adap->algo = &stu300_algo; 948 adap->algo = &stu300_algo;
diff --git a/drivers/i2c/busses/i2c-taos-evm.c b/drivers/i2c/busses/i2c-taos-evm.c
index dd39c1eb03ed..26c352a09298 100644
--- a/drivers/i2c/busses/i2c-taos-evm.c
+++ b/drivers/i2c/busses/i2c-taos-evm.c
@@ -234,7 +234,7 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
234 234
235 if (taos->state != TAOS_STATE_IDLE) { 235 if (taos->state != TAOS_STATE_IDLE) {
236 err = -ENODEV; 236 err = -ENODEV;
237 dev_dbg(&serio->dev, "TAOS EVM reset failed (state=%d, " 237 dev_err(&serio->dev, "TAOS EVM reset failed (state=%d, "
238 "pos=%d)\n", taos->state, taos->pos); 238 "pos=%d)\n", taos->state, taos->pos);
239 goto exit_close; 239 goto exit_close;
240 } 240 }
@@ -255,7 +255,7 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
255 msecs_to_jiffies(250)); 255 msecs_to_jiffies(250));
256 if (taos->state != TAOS_STATE_IDLE) { 256 if (taos->state != TAOS_STATE_IDLE) {
257 err = -ENODEV; 257 err = -ENODEV;
258 dev_err(&adapter->dev, "Echo off failed " 258 dev_err(&serio->dev, "TAOS EVM echo off failed "
259 "(state=%d)\n", taos->state); 259 "(state=%d)\n", taos->state);
260 goto exit_close; 260 goto exit_close;
261 } 261 }
@@ -263,7 +263,7 @@ static int taos_connect(struct serio *serio, struct serio_driver *drv)
263 err = i2c_add_adapter(adapter); 263 err = i2c_add_adapter(adapter);
264 if (err) 264 if (err)
265 goto exit_close; 265 goto exit_close;
266 dev_dbg(&serio->dev, "Connected to TAOS EVM\n"); 266 dev_info(&serio->dev, "Connected to TAOS EVM\n");
267 267
268 taos->client = taos_instantiate_device(adapter); 268 taos->client = taos_instantiate_device(adapter);
269 return 0; 269 return 0;
@@ -288,7 +288,7 @@ static void taos_disconnect(struct serio *serio)
288 serio_set_drvdata(serio, NULL); 288 serio_set_drvdata(serio, NULL);
289 kfree(taos); 289 kfree(taos);
290 290
291 dev_dbg(&serio->dev, "Disconnected from TAOS EVM\n"); 291 dev_info(&serio->dev, "Disconnected from TAOS EVM\n");
292} 292}
293 293
294static struct serio_device_id taos_serio_ids[] = { 294static struct serio_device_id taos_serio_ids[] = {
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
new file mode 100644
index 000000000000..fb3b4f8f8152
--- /dev/null
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -0,0 +1,735 @@
1/*
2 * drivers/i2c/busses/i2c-tegra.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 * Author: Colin Cross <ccross@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/clk.h>
22#include <linux/err.h>
23#include <linux/i2c.h>
24#include <linux/io.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/i2c-tegra.h>
29
30#include <asm/unaligned.h>
31
32#include <mach/clk.h>
33
34#define TEGRA_I2C_TIMEOUT (msecs_to_jiffies(1000))
35#define BYTES_PER_FIFO_WORD 4
36
37#define I2C_CNFG 0x000
38#define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12
39#define I2C_CNFG_PACKET_MODE_EN (1<<10)
40#define I2C_CNFG_NEW_MASTER_FSM (1<<11)
41#define I2C_STATUS 0x01C
42#define I2C_SL_CNFG 0x020
43#define I2C_SL_CNFG_NACK (1<<1)
44#define I2C_SL_CNFG_NEWSL (1<<2)
45#define I2C_SL_ADDR1 0x02c
46#define I2C_SL_ADDR2 0x030
47#define I2C_TX_FIFO 0x050
48#define I2C_RX_FIFO 0x054
49#define I2C_PACKET_TRANSFER_STATUS 0x058
50#define I2C_FIFO_CONTROL 0x05c
51#define I2C_FIFO_CONTROL_TX_FLUSH (1<<1)
52#define I2C_FIFO_CONTROL_RX_FLUSH (1<<0)
53#define I2C_FIFO_CONTROL_TX_TRIG_SHIFT 5
54#define I2C_FIFO_CONTROL_RX_TRIG_SHIFT 2
55#define I2C_FIFO_STATUS 0x060
56#define I2C_FIFO_STATUS_TX_MASK 0xF0
57#define I2C_FIFO_STATUS_TX_SHIFT 4
58#define I2C_FIFO_STATUS_RX_MASK 0x0F
59#define I2C_FIFO_STATUS_RX_SHIFT 0
60#define I2C_INT_MASK 0x064
61#define I2C_INT_STATUS 0x068
62#define I2C_INT_PACKET_XFER_COMPLETE (1<<7)
63#define I2C_INT_ALL_PACKETS_XFER_COMPLETE (1<<6)
64#define I2C_INT_TX_FIFO_OVERFLOW (1<<5)
65#define I2C_INT_RX_FIFO_UNDERFLOW (1<<4)
66#define I2C_INT_NO_ACK (1<<3)
67#define I2C_INT_ARBITRATION_LOST (1<<2)
68#define I2C_INT_TX_FIFO_DATA_REQ (1<<1)
69#define I2C_INT_RX_FIFO_DATA_REQ (1<<0)
70#define I2C_CLK_DIVISOR 0x06c
71
72#define DVC_CTRL_REG1 0x000
73#define DVC_CTRL_REG1_INTR_EN (1<<10)
74#define DVC_CTRL_REG2 0x004
75#define DVC_CTRL_REG3 0x008
76#define DVC_CTRL_REG3_SW_PROG (1<<26)
77#define DVC_CTRL_REG3_I2C_DONE_INTR_EN (1<<30)
78#define DVC_STATUS 0x00c
79#define DVC_STATUS_I2C_DONE_INTR (1<<30)
80
81#define I2C_ERR_NONE 0x00
82#define I2C_ERR_NO_ACK 0x01
83#define I2C_ERR_ARBITRATION_LOST 0x02
84#define I2C_ERR_UNKNOWN_INTERRUPT 0x04
85
86#define PACKET_HEADER0_HEADER_SIZE_SHIFT 28
87#define PACKET_HEADER0_PACKET_ID_SHIFT 16
88#define PACKET_HEADER0_CONT_ID_SHIFT 12
89#define PACKET_HEADER0_PROTOCOL_I2C (1<<4)
90
91#define I2C_HEADER_HIGHSPEED_MODE (1<<22)
92#define I2C_HEADER_CONT_ON_NAK (1<<21)
93#define I2C_HEADER_SEND_START_BYTE (1<<20)
94#define I2C_HEADER_READ (1<<19)
95#define I2C_HEADER_10BIT_ADDR (1<<18)
96#define I2C_HEADER_IE_ENABLE (1<<17)
97#define I2C_HEADER_REPEAT_START (1<<16)
98#define I2C_HEADER_MASTER_ADDR_SHIFT 12
99#define I2C_HEADER_SLAVE_ADDR_SHIFT 1
100
101/**
102 * struct tegra_i2c_dev - per device i2c context
103 * @dev: device reference for power management
104 * @adapter: core i2c layer adapter information
105 * @clk: clock reference for i2c controller
106 * @i2c_clk: clock reference for i2c bus
107 * @iomem: memory resource for registers
108 * @base: ioremapped registers cookie
109 * @cont_id: i2c controller id, used for for packet header
110 * @irq: irq number of transfer complete interrupt
111 * @is_dvc: identifies the DVC i2c controller, has a different register layout
112 * @msg_complete: transfer completion notifier
113 * @msg_err: error code for completed message
114 * @msg_buf: pointer to current message data
115 * @msg_buf_remaining: size of unsent data in the message buffer
116 * @msg_read: identifies read transfers
117 * @bus_clk_rate: current i2c bus clock rate
118 * @is_suspended: prevents i2c controller accesses after suspend is called
119 */
120struct tegra_i2c_dev {
121 struct device *dev;
122 struct i2c_adapter adapter;
123 struct clk *clk;
124 struct clk *i2c_clk;
125 struct resource *iomem;
126 void __iomem *base;
127 int cont_id;
128 int irq;
129 bool irq_disabled;
130 int is_dvc;
131 struct completion msg_complete;
132 int msg_err;
133 u8 *msg_buf;
134 size_t msg_buf_remaining;
135 int msg_read;
136 unsigned long bus_clk_rate;
137 bool is_suspended;
138};
139
140static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned long reg)
141{
142 writel(val, i2c_dev->base + reg);
143}
144
145static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
146{
147 return readl(i2c_dev->base + reg);
148}
149
150/*
151 * i2c_writel and i2c_readl will offset the register if necessary to talk
152 * to the I2C block inside the DVC block
153 */
154static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,
155 unsigned long reg)
156{
157 if (i2c_dev->is_dvc)
158 reg += (reg >= I2C_TX_FIFO) ? 0x10 : 0x40;
159 return reg;
160}
161
162static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
163 unsigned long reg)
164{
165 writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
166}
167
168static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
169{
170 return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
171}
172
173static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
174 unsigned long reg, int len)
175{
176 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
177}
178
179static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,
180 unsigned long reg, int len)
181{
182 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
183}
184
185static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)
186{
187 u32 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK);
188 int_mask &= ~mask;
189 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);
190}
191
192static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)
193{
194 u32 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK);
195 int_mask |= mask;
196 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);
197}
198
199static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev)
200{
201 unsigned long timeout = jiffies + HZ;
202 u32 val = i2c_readl(i2c_dev, I2C_FIFO_CONTROL);
203 val |= I2C_FIFO_CONTROL_TX_FLUSH | I2C_FIFO_CONTROL_RX_FLUSH;
204 i2c_writel(i2c_dev, val, I2C_FIFO_CONTROL);
205
206 while (i2c_readl(i2c_dev, I2C_FIFO_CONTROL) &
207 (I2C_FIFO_CONTROL_TX_FLUSH | I2C_FIFO_CONTROL_RX_FLUSH)) {
208 if (time_after(jiffies, timeout)) {
209 dev_warn(i2c_dev->dev, "timeout waiting for fifo flush\n");
210 return -ETIMEDOUT;
211 }
212 msleep(1);
213 }
214 return 0;
215}
216
217static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)
218{
219 u32 val;
220 int rx_fifo_avail;
221 u8 *buf = i2c_dev->msg_buf;
222 size_t buf_remaining = i2c_dev->msg_buf_remaining;
223 int words_to_transfer;
224
225 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);
226 rx_fifo_avail = (val & I2C_FIFO_STATUS_RX_MASK) >>
227 I2C_FIFO_STATUS_RX_SHIFT;
228
229 /* Rounds down to not include partial word at the end of buf */
230 words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD;
231 if (words_to_transfer > rx_fifo_avail)
232 words_to_transfer = rx_fifo_avail;
233
234 i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer);
235
236 buf += words_to_transfer * BYTES_PER_FIFO_WORD;
237 buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD;
238 rx_fifo_avail -= words_to_transfer;
239
240 /*
241 * If there is a partial word at the end of buf, handle it manually to
242 * prevent overwriting past the end of buf
243 */
244 if (rx_fifo_avail > 0 && buf_remaining > 0) {
245 BUG_ON(buf_remaining > 3);
246 val = i2c_readl(i2c_dev, I2C_RX_FIFO);
247 memcpy(buf, &val, buf_remaining);
248 buf_remaining = 0;
249 rx_fifo_avail--;
250 }
251
252 BUG_ON(rx_fifo_avail > 0 && buf_remaining > 0);
253 i2c_dev->msg_buf_remaining = buf_remaining;
254 i2c_dev->msg_buf = buf;
255 return 0;
256}
257
258static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
259{
260 u32 val;
261 int tx_fifo_avail;
262 u8 *buf = i2c_dev->msg_buf;
263 size_t buf_remaining = i2c_dev->msg_buf_remaining;
264 int words_to_transfer;
265
266 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);
267 tx_fifo_avail = (val & I2C_FIFO_STATUS_TX_MASK) >>
268 I2C_FIFO_STATUS_TX_SHIFT;
269
270 /* Rounds down to not include partial word at the end of buf */
271 words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD;
272 if (words_to_transfer > tx_fifo_avail)
273 words_to_transfer = tx_fifo_avail;
274
275 i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
276
277 buf += words_to_transfer * BYTES_PER_FIFO_WORD;
278 buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD;
279 tx_fifo_avail -= words_to_transfer;
280
281 /*
282 * If there is a partial word at the end of buf, handle it manually to
283 * prevent reading past the end of buf, which could cross a page
284 * boundary and fault.
285 */
286 if (tx_fifo_avail > 0 && buf_remaining > 0) {
287 BUG_ON(buf_remaining > 3);
288 memcpy(&val, buf, buf_remaining);
289 i2c_writel(i2c_dev, val, I2C_TX_FIFO);
290 buf_remaining = 0;
291 tx_fifo_avail--;
292 }
293
294 BUG_ON(tx_fifo_avail > 0 && buf_remaining > 0);
295 i2c_dev->msg_buf_remaining = buf_remaining;
296 i2c_dev->msg_buf = buf;
297 return 0;
298}
299
300/*
301 * One of the Tegra I2C blocks is inside the DVC (Digital Voltage Controller)
302 * block. This block is identical to the rest of the I2C blocks, except that
303 * it only supports master mode, it has registers moved around, and it needs
304 * some extra init to get it into I2C mode. The register moves are handled
305 * by i2c_readl and i2c_writel
306 */
307static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev)
308{
309 u32 val = 0;
310 val = dvc_readl(i2c_dev, DVC_CTRL_REG3);
311 val |= DVC_CTRL_REG3_SW_PROG;
312 val |= DVC_CTRL_REG3_I2C_DONE_INTR_EN;
313 dvc_writel(i2c_dev, val, DVC_CTRL_REG3);
314
315 val = dvc_readl(i2c_dev, DVC_CTRL_REG1);
316 val |= DVC_CTRL_REG1_INTR_EN;
317 dvc_writel(i2c_dev, val, DVC_CTRL_REG1);
318}
319
320static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
321{
322 u32 val;
323 int err = 0;
324
325 clk_enable(i2c_dev->clk);
326
327 tegra_periph_reset_assert(i2c_dev->clk);
328 udelay(2);
329 tegra_periph_reset_deassert(i2c_dev->clk);
330
331 if (i2c_dev->is_dvc)
332 tegra_dvc_init(i2c_dev);
333
334 val = I2C_CNFG_NEW_MASTER_FSM | I2C_CNFG_PACKET_MODE_EN |
335 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT);
336 i2c_writel(i2c_dev, val, I2C_CNFG);
337 i2c_writel(i2c_dev, 0, I2C_INT_MASK);
338 clk_set_rate(i2c_dev->clk, i2c_dev->bus_clk_rate * 8);
339
340 if (!i2c_dev->is_dvc) {
341 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG);
342 sl_cfg |= I2C_SL_CNFG_NACK | I2C_SL_CNFG_NEWSL;
343 i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG);
344 i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1);
345 i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2);
346
347 }
348
349 val = 7 << I2C_FIFO_CONTROL_TX_TRIG_SHIFT |
350 0 << I2C_FIFO_CONTROL_RX_TRIG_SHIFT;
351 i2c_writel(i2c_dev, val, I2C_FIFO_CONTROL);
352
353 if (tegra_i2c_flush_fifos(i2c_dev))
354 err = -ETIMEDOUT;
355
356 clk_disable(i2c_dev->clk);
357
358 if (i2c_dev->irq_disabled) {
359 i2c_dev->irq_disabled = 0;
360 enable_irq(i2c_dev->irq);
361 }
362
363 return err;
364}
365
366static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
367{
368 u32 status;
369 const u32 status_err = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
370 struct tegra_i2c_dev *i2c_dev = dev_id;
371
372 status = i2c_readl(i2c_dev, I2C_INT_STATUS);
373
374 if (status == 0) {
375 dev_warn(i2c_dev->dev, "irq status 0 %08x %08x %08x\n",
376 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS),
377 i2c_readl(i2c_dev, I2C_STATUS),
378 i2c_readl(i2c_dev, I2C_CNFG));
379 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT;
380
381 if (!i2c_dev->irq_disabled) {
382 disable_irq_nosync(i2c_dev->irq);
383 i2c_dev->irq_disabled = 1;
384 }
385
386 complete(&i2c_dev->msg_complete);
387 goto err;
388 }
389
390 if (unlikely(status & status_err)) {
391 if (status & I2C_INT_NO_ACK)
392 i2c_dev->msg_err |= I2C_ERR_NO_ACK;
393 if (status & I2C_INT_ARBITRATION_LOST)
394 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST;
395 complete(&i2c_dev->msg_complete);
396 goto err;
397 }
398
399 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) {
400 if (i2c_dev->msg_buf_remaining)
401 tegra_i2c_empty_rx_fifo(i2c_dev);
402 else
403 BUG();
404 }
405
406 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) {
407 if (i2c_dev->msg_buf_remaining)
408 tegra_i2c_fill_tx_fifo(i2c_dev);
409 else
410 tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ);
411 }
412
413 if ((status & I2C_INT_PACKET_XFER_COMPLETE) &&
414 !i2c_dev->msg_buf_remaining)
415 complete(&i2c_dev->msg_complete);
416
417 i2c_writel(i2c_dev, status, I2C_INT_STATUS);
418 if (i2c_dev->is_dvc)
419 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
420 return IRQ_HANDLED;
421err:
422 /* An error occurred, mask all interrupts */
423 tegra_i2c_mask_irq(i2c_dev, I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |
424 I2C_INT_PACKET_XFER_COMPLETE | I2C_INT_TX_FIFO_DATA_REQ |
425 I2C_INT_RX_FIFO_DATA_REQ);
426 i2c_writel(i2c_dev, status, I2C_INT_STATUS);
427 if (i2c_dev->is_dvc)
428 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
429 return IRQ_HANDLED;
430}
431
432static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
433 struct i2c_msg *msg, int stop)
434{
435 u32 packet_header;
436 u32 int_mask;
437 int ret;
438
439 tegra_i2c_flush_fifos(i2c_dev);
440 i2c_writel(i2c_dev, 0xFF, I2C_INT_STATUS);
441
442 if (msg->len == 0)
443 return -EINVAL;
444
445 i2c_dev->msg_buf = msg->buf;
446 i2c_dev->msg_buf_remaining = msg->len;
447 i2c_dev->msg_err = I2C_ERR_NONE;
448 i2c_dev->msg_read = (msg->flags & I2C_M_RD);
449 INIT_COMPLETION(i2c_dev->msg_complete);
450
451 packet_header = (0 << PACKET_HEADER0_HEADER_SIZE_SHIFT) |
452 PACKET_HEADER0_PROTOCOL_I2C |
453 (i2c_dev->cont_id << PACKET_HEADER0_CONT_ID_SHIFT) |
454 (1 << PACKET_HEADER0_PACKET_ID_SHIFT);
455 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
456
457 packet_header = msg->len - 1;
458 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
459
460 packet_header = msg->addr << I2C_HEADER_SLAVE_ADDR_SHIFT;
461 packet_header |= I2C_HEADER_IE_ENABLE;
462 if (!stop)
463 packet_header |= I2C_HEADER_REPEAT_START;
464 if (msg->flags & I2C_M_TEN)
465 packet_header |= I2C_HEADER_10BIT_ADDR;
466 if (msg->flags & I2C_M_IGNORE_NAK)
467 packet_header |= I2C_HEADER_CONT_ON_NAK;
468 if (msg->flags & I2C_M_RD)
469 packet_header |= I2C_HEADER_READ;
470 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
471
472 if (!(msg->flags & I2C_M_RD))
473 tegra_i2c_fill_tx_fifo(i2c_dev);
474
475 int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
476 if (msg->flags & I2C_M_RD)
477 int_mask |= I2C_INT_RX_FIFO_DATA_REQ;
478 else if (i2c_dev->msg_buf_remaining)
479 int_mask |= I2C_INT_TX_FIFO_DATA_REQ;
480 tegra_i2c_unmask_irq(i2c_dev, int_mask);
481 dev_dbg(i2c_dev->dev, "unmasked irq: %02x\n",
482 i2c_readl(i2c_dev, I2C_INT_MASK));
483
484 ret = wait_for_completion_timeout(&i2c_dev->msg_complete, TEGRA_I2C_TIMEOUT);
485 tegra_i2c_mask_irq(i2c_dev, int_mask);
486
487 if (WARN_ON(ret == 0)) {
488 dev_err(i2c_dev->dev, "i2c transfer timed out\n");
489
490 tegra_i2c_init(i2c_dev);
491 return -ETIMEDOUT;
492 }
493
494 dev_dbg(i2c_dev->dev, "transfer complete: %d %d %d\n",
495 ret, completion_done(&i2c_dev->msg_complete), i2c_dev->msg_err);
496
497 if (likely(i2c_dev->msg_err == I2C_ERR_NONE))
498 return 0;
499
500 tegra_i2c_init(i2c_dev);
501 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) {
502 if (msg->flags & I2C_M_IGNORE_NAK)
503 return 0;
504 return -EREMOTEIO;
505 }
506
507 return -EIO;
508}
509
510static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
511 int num)
512{
513 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
514 int i;
515 int ret = 0;
516
517 if (i2c_dev->is_suspended)
518 return -EBUSY;
519
520 clk_enable(i2c_dev->clk);
521 for (i = 0; i < num; i++) {
522 int stop = (i == (num - 1)) ? 1 : 0;
523 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], stop);
524 if (ret)
525 break;
526 }
527 clk_disable(i2c_dev->clk);
528 return ret ?: i;
529}
530
531static u32 tegra_i2c_func(struct i2c_adapter *adap)
532{
533 return I2C_FUNC_I2C;
534}
535
536static const struct i2c_algorithm tegra_i2c_algo = {
537 .master_xfer = tegra_i2c_xfer,
538 .functionality = tegra_i2c_func,
539};
540
541static int tegra_i2c_probe(struct platform_device *pdev)
542{
543 struct tegra_i2c_dev *i2c_dev;
544 struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data;
545 struct resource *res;
546 struct resource *iomem;
547 struct clk *clk;
548 struct clk *i2c_clk;
549 void *base;
550 int irq;
551 int ret = 0;
552
553 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
554 if (!res) {
555 dev_err(&pdev->dev, "no mem resource\n");
556 return -EINVAL;
557 }
558 iomem = request_mem_region(res->start, resource_size(res), pdev->name);
559 if (!iomem) {
560 dev_err(&pdev->dev, "I2C region already claimed\n");
561 return -EBUSY;
562 }
563
564 base = ioremap(iomem->start, resource_size(iomem));
565 if (!base) {
566 dev_err(&pdev->dev, "Cannot ioremap I2C region\n");
567 return -ENOMEM;
568 }
569
570 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
571 if (!res) {
572 dev_err(&pdev->dev, "no irq resource\n");
573 ret = -EINVAL;
574 goto err_iounmap;
575 }
576 irq = res->start;
577
578 clk = clk_get(&pdev->dev, NULL);
579 if (IS_ERR(clk)) {
580 dev_err(&pdev->dev, "missing controller clock");
581 ret = PTR_ERR(clk);
582 goto err_release_region;
583 }
584
585 i2c_clk = clk_get(&pdev->dev, "i2c");
586 if (IS_ERR(i2c_clk)) {
587 dev_err(&pdev->dev, "missing bus clock");
588 ret = PTR_ERR(i2c_clk);
589 goto err_clk_put;
590 }
591
592 i2c_dev = kzalloc(sizeof(struct tegra_i2c_dev), GFP_KERNEL);
593 if (!i2c_dev) {
594 ret = -ENOMEM;
595 goto err_i2c_clk_put;
596 }
597
598 i2c_dev->base = base;
599 i2c_dev->clk = clk;
600 i2c_dev->i2c_clk = i2c_clk;
601 i2c_dev->iomem = iomem;
602 i2c_dev->adapter.algo = &tegra_i2c_algo;
603 i2c_dev->irq = irq;
604 i2c_dev->cont_id = pdev->id;
605 i2c_dev->dev = &pdev->dev;
606 i2c_dev->bus_clk_rate = pdata ? pdata->bus_clk_rate : 100000;
607
608 if (pdev->id == 3)
609 i2c_dev->is_dvc = 1;
610 init_completion(&i2c_dev->msg_complete);
611
612 platform_set_drvdata(pdev, i2c_dev);
613
614 ret = tegra_i2c_init(i2c_dev);
615 if (ret) {
616 dev_err(&pdev->dev, "Failed to initialize i2c controller");
617 goto err_free;
618 }
619
620 ret = request_irq(i2c_dev->irq, tegra_i2c_isr, 0, pdev->name, i2c_dev);
621 if (ret) {
622 dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);
623 goto err_free;
624 }
625
626 clk_enable(i2c_dev->i2c_clk);
627
628 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev);
629 i2c_dev->adapter.owner = THIS_MODULE;
630 i2c_dev->adapter.class = I2C_CLASS_HWMON;
631 strlcpy(i2c_dev->adapter.name, "Tegra I2C adapter",
632 sizeof(i2c_dev->adapter.name));
633 i2c_dev->adapter.algo = &tegra_i2c_algo;
634 i2c_dev->adapter.dev.parent = &pdev->dev;
635 i2c_dev->adapter.nr = pdev->id;
636
637 ret = i2c_add_numbered_adapter(&i2c_dev->adapter);
638 if (ret) {
639 dev_err(&pdev->dev, "Failed to add I2C adapter\n");
640 goto err_free_irq;
641 }
642
643 return 0;
644err_free_irq:
645 free_irq(i2c_dev->irq, i2c_dev);
646err_free:
647 kfree(i2c_dev);
648err_i2c_clk_put:
649 clk_put(i2c_clk);
650err_clk_put:
651 clk_put(clk);
652err_release_region:
653 release_mem_region(iomem->start, resource_size(iomem));
654err_iounmap:
655 iounmap(base);
656 return ret;
657}
658
659static int tegra_i2c_remove(struct platform_device *pdev)
660{
661 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
662 i2c_del_adapter(&i2c_dev->adapter);
663 free_irq(i2c_dev->irq, i2c_dev);
664 clk_put(i2c_dev->i2c_clk);
665 clk_put(i2c_dev->clk);
666 release_mem_region(i2c_dev->iomem->start,
667 resource_size(i2c_dev->iomem));
668 iounmap(i2c_dev->base);
669 kfree(i2c_dev);
670 return 0;
671}
672
673#ifdef CONFIG_PM
674static int tegra_i2c_suspend(struct platform_device *pdev, pm_message_t state)
675{
676 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
677
678 i2c_lock_adapter(&i2c_dev->adapter);
679 i2c_dev->is_suspended = true;
680 i2c_unlock_adapter(&i2c_dev->adapter);
681
682 return 0;
683}
684
685static int tegra_i2c_resume(struct platform_device *pdev)
686{
687 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
688 int ret;
689
690 i2c_lock_adapter(&i2c_dev->adapter);
691
692 ret = tegra_i2c_init(i2c_dev);
693
694 if (ret) {
695 i2c_unlock_adapter(&i2c_dev->adapter);
696 return ret;
697 }
698
699 i2c_dev->is_suspended = false;
700
701 i2c_unlock_adapter(&i2c_dev->adapter);
702
703 return 0;
704}
705#endif
706
707static struct platform_driver tegra_i2c_driver = {
708 .probe = tegra_i2c_probe,
709 .remove = tegra_i2c_remove,
710#ifdef CONFIG_PM
711 .suspend = tegra_i2c_suspend,
712 .resume = tegra_i2c_resume,
713#endif
714 .driver = {
715 .name = "tegra-i2c",
716 .owner = THIS_MODULE,
717 },
718};
719
720static int __init tegra_i2c_init_driver(void)
721{
722 return platform_driver_register(&tegra_i2c_driver);
723}
724
725static void __exit tegra_i2c_exit_driver(void)
726{
727 platform_driver_unregister(&tegra_i2c_driver);
728}
729
730subsys_initcall(tegra_i2c_init_driver);
731module_exit(tegra_i2c_exit_driver);
732
733MODULE_DESCRIPTION("nVidia Tegra2 I2C Bus Controller driver");
734MODULE_AUTHOR("Colin Cross");
735MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c
index 4c6fff5f330d..0b012f1f8ac5 100644
--- a/drivers/i2c/busses/i2c-viapro.c
+++ b/drivers/i2c/busses/i2c-viapro.c
@@ -185,14 +185,8 @@ static int vt596_transaction(u8 size)
185 } 185 }
186 186
187 if (temp & 0x04) { 187 if (temp & 0x04) {
188 int read = inb_p(SMBHSTADD) & 0x01;
189 result = -ENXIO; 188 result = -ENXIO;
190 /* The quick and receive byte commands are used to probe 189 dev_dbg(&vt596_adapter.dev, "No response\n");
191 for chips, so errors are expected, and we don't want
192 to frighten the user. */
193 if (!((size == VT596_QUICK && !read) ||
194 (size == VT596_BYTE && read)))
195 dev_err(&vt596_adapter.dev, "Transaction error!\n");
196 } 190 }
197 191
198 /* Resetting status register */ 192 /* Resetting status register */
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index a9c419e075a5..4bb68f35caf2 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -21,7 +21,7 @@
21 * to the automotive development board Russellville. The copyright holder 21 * to the automotive development board Russellville. The copyright holder
22 * as seen in the header is Intel corporation. 22 * as seen in the header is Intel corporation.
23 * Mocean Laboratories forked off the GNU/Linux platform work into a 23 * Mocean Laboratories forked off the GNU/Linux platform work into a
24 * separate company called Pelagicore AB, which commited the code to the 24 * separate company called Pelagicore AB, which committed the code to the
25 * kernel. 25 * kernel.
26 */ 26 */
27 27
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 4cb4bb009950..986e5f62debe 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -29,6 +29,7 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/i2c.h> 30#include <linux/i2c.h>
31#include <linux/pci.h> 31#include <linux/pci.h>
32#include <linux/platform_device.h>
32#include <linux/delay.h> 33#include <linux/delay.h>
33#include <linux/mutex.h> 34#include <linux/mutex.h>
34#include <linux/slab.h> 35#include <linux/slab.h>
@@ -40,6 +41,7 @@
40 41
41MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>"); 42MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
42MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver"); 43MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
44MODULE_ALIAS("platform:cs5535-smb");
43MODULE_LICENSE("GPL"); 45MODULE_LICENSE("GPL");
44 46
45#define MAX_DEVICES 4 47#define MAX_DEVICES 4
@@ -84,10 +86,6 @@ struct scx200_acb_iface {
84 u8 *ptr; 86 u8 *ptr;
85 char needs_reset; 87 char needs_reset;
86 unsigned len; 88 unsigned len;
87
88 /* PCI device info */
89 struct pci_dev *pdev;
90 int bar;
91}; 89};
92 90
93/* Register Definitions */ 91/* Register Definitions */
@@ -391,7 +389,7 @@ static const struct i2c_algorithm scx200_acb_algorithm = {
391static struct scx200_acb_iface *scx200_acb_list; 389static struct scx200_acb_iface *scx200_acb_list;
392static DEFINE_MUTEX(scx200_acb_list_mutex); 390static DEFINE_MUTEX(scx200_acb_list_mutex);
393 391
394static __init int scx200_acb_probe(struct scx200_acb_iface *iface) 392static __devinit int scx200_acb_probe(struct scx200_acb_iface *iface)
395{ 393{
396 u8 val; 394 u8 val;
397 395
@@ -427,7 +425,7 @@ static __init int scx200_acb_probe(struct scx200_acb_iface *iface)
427 return 0; 425 return 0;
428} 426}
429 427
430static __init struct scx200_acb_iface *scx200_create_iface(const char *text, 428static __devinit struct scx200_acb_iface *scx200_create_iface(const char *text,
431 struct device *dev, int index) 429 struct device *dev, int index)
432{ 430{
433 struct scx200_acb_iface *iface; 431 struct scx200_acb_iface *iface;
@@ -452,7 +450,7 @@ static __init struct scx200_acb_iface *scx200_create_iface(const char *text,
452 return iface; 450 return iface;
453} 451}
454 452
455static int __init scx200_acb_create(struct scx200_acb_iface *iface) 453static int __devinit scx200_acb_create(struct scx200_acb_iface *iface)
456{ 454{
457 struct i2c_adapter *adapter; 455 struct i2c_adapter *adapter;
458 int rc; 456 int rc;
@@ -472,182 +470,145 @@ static int __init scx200_acb_create(struct scx200_acb_iface *iface)
472 return -ENODEV; 470 return -ENODEV;
473 } 471 }
474 472
475 mutex_lock(&scx200_acb_list_mutex); 473 if (!adapter->dev.parent) {
476 iface->next = scx200_acb_list; 474 /* If there's no dev, we're tracking (ISA) ifaces manually */
477 scx200_acb_list = iface; 475 mutex_lock(&scx200_acb_list_mutex);
478 mutex_unlock(&scx200_acb_list_mutex); 476 iface->next = scx200_acb_list;
477 scx200_acb_list = iface;
478 mutex_unlock(&scx200_acb_list_mutex);
479 }
479 480
480 return 0; 481 return 0;
481} 482}
482 483
483static __init int scx200_create_pci(const char *text, struct pci_dev *pdev, 484static struct scx200_acb_iface * __devinit scx200_create_dev(const char *text,
484 int bar) 485 unsigned long base, int index, struct device *dev)
485{ 486{
486 struct scx200_acb_iface *iface; 487 struct scx200_acb_iface *iface;
487 int rc; 488 int rc;
488 489
489 iface = scx200_create_iface(text, &pdev->dev, 0); 490 iface = scx200_create_iface(text, dev, index);
490 491
491 if (iface == NULL) 492 if (iface == NULL)
492 return -ENOMEM; 493 return NULL;
493
494 iface->pdev = pdev;
495 iface->bar = bar;
496
497 rc = pci_enable_device_io(iface->pdev);
498 if (rc)
499 goto errout_free;
500 494
501 rc = pci_request_region(iface->pdev, iface->bar, iface->adapter.name); 495 if (!request_region(base, 8, iface->adapter.name)) {
502 if (rc) { 496 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n",
503 printk(KERN_ERR NAME ": can't allocate PCI BAR %d\n", 497 base, base + 8 - 1);
504 iface->bar);
505 goto errout_free; 498 goto errout_free;
506 } 499 }
507 500
508 iface->base = pci_resource_start(iface->pdev, iface->bar); 501 iface->base = base;
509 rc = scx200_acb_create(iface); 502 rc = scx200_acb_create(iface);
510 503
511 if (rc == 0) 504 if (rc == 0)
512 return 0; 505 return iface;
513 506
514 pci_release_region(iface->pdev, iface->bar); 507 release_region(base, 8);
515 pci_dev_put(iface->pdev);
516 errout_free: 508 errout_free:
517 kfree(iface); 509 kfree(iface);
518 return rc; 510 return NULL;
519} 511}
520 512
521static int __init scx200_create_isa(const char *text, unsigned long base, 513static int __devinit scx200_probe(struct platform_device *pdev)
522 int index)
523{ 514{
524 struct scx200_acb_iface *iface; 515 struct scx200_acb_iface *iface;
525 int rc; 516 struct resource *res;
526
527 iface = scx200_create_iface(text, NULL, index);
528 517
529 if (iface == NULL) 518 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
530 return -ENOMEM; 519 if (!res) {
531 520 dev_err(&pdev->dev, "can't fetch device resource info\n");
532 if (!request_region(base, 8, iface->adapter.name)) { 521 return -ENODEV;
533 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n",
534 base, base + 8 - 1);
535 rc = -EBUSY;
536 goto errout_free;
537 } 522 }
538 523
539 iface->base = base; 524 iface = scx200_create_dev("CS5535", res->start, 0, &pdev->dev);
540 rc = scx200_acb_create(iface); 525 if (!iface)
526 return -EIO;
541 527
542 if (rc == 0) 528 dev_info(&pdev->dev, "SCx200 device '%s' registered\n",
543 return 0; 529 iface->adapter.name);
530 platform_set_drvdata(pdev, iface);
544 531
545 release_region(base, 8); 532 return 0;
546 errout_free:
547 kfree(iface);
548 return rc;
549} 533}
550 534
551/* Driver data is an index into the scx200_data array that indicates 535static void __devexit scx200_cleanup_iface(struct scx200_acb_iface *iface)
552 * the name and the BAR where the I/O address resource is located. ISA 536{
553 * devices are flagged with a bar value of -1 */ 537 i2c_del_adapter(&iface->adapter);
554 538 release_region(iface->base, 8);
555static const struct pci_device_id scx200_pci[] __initconst = { 539 kfree(iface);
556 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE), 540}
557 .driver_data = 0 },
558 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE),
559 .driver_data = 0 },
560 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA),
561 .driver_data = 1 },
562 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA),
563 .driver_data = 2 }
564};
565
566static struct {
567 const char *name;
568 int bar;
569} scx200_data[] = {
570 { "SCx200", -1 },
571 { "CS5535", 0 },
572 { "CS5536", 0 }
573};
574 541
575static __init int scx200_scan_pci(void) 542static int __devexit scx200_remove(struct platform_device *pdev)
576{ 543{
577 int data, dev; 544 struct scx200_acb_iface *iface;
578 int rc = -ENODEV;
579 struct pci_dev *pdev;
580 545
581 for(dev = 0; dev < ARRAY_SIZE(scx200_pci); dev++) { 546 iface = platform_get_drvdata(pdev);
582 pdev = pci_get_device(scx200_pci[dev].vendor, 547 platform_set_drvdata(pdev, NULL);
583 scx200_pci[dev].device, NULL); 548 scx200_cleanup_iface(iface);
584 549
585 if (pdev == NULL) 550 return 0;
586 continue; 551}
587 552
588 data = scx200_pci[dev].driver_data; 553static struct platform_driver scx200_pci_drv = {
554 .driver = {
555 .name = "cs5535-smb",
556 .owner = THIS_MODULE,
557 },
558 .probe = scx200_probe,
559 .remove = __devexit_p(scx200_remove),
560};
589 561
590 /* if .bar is greater or equal to zero, this is a 562static const struct pci_device_id scx200_isa[] __initconst = {
591 * PCI device - otherwise, we assume 563 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
592 that the ports are ISA based 564 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
593 */ 565 { 0, }
566};
594 567
595 if (scx200_data[data].bar >= 0) 568static __init void scx200_scan_isa(void)
596 rc = scx200_create_pci(scx200_data[data].name, pdev, 569{
597 scx200_data[data].bar); 570 int i;
598 else {
599 int i;
600 571
601 pci_dev_put(pdev); 572 if (!pci_dev_present(scx200_isa))
602 for (i = 0; i < MAX_DEVICES; ++i) { 573 return;
603 if (base[i] == 0)
604 continue;
605 574
606 rc = scx200_create_isa(scx200_data[data].name, 575 for (i = 0; i < MAX_DEVICES; ++i) {
607 base[i], 576 if (base[i] == 0)
608 i); 577 continue;
609 }
610 }
611 578
612 break; 579 /* XXX: should we care about failures? */
580 scx200_create_dev("SCx200", base[i], i, NULL);
613 } 581 }
614
615 return rc;
616} 582}
617 583
618static int __init scx200_acb_init(void) 584static int __init scx200_acb_init(void)
619{ 585{
620 int rc;
621
622 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n"); 586 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
623 587
624 rc = scx200_scan_pci(); 588 /* First scan for ISA-based devices */
589 scx200_scan_isa(); /* XXX: should we care about errors? */
625 590
626 /* If at least one bus was created, init must succeed */ 591 /* If at least one bus was created, init must succeed */
627 if (scx200_acb_list) 592 if (scx200_acb_list)
628 return 0; 593 return 0;
629 return rc; 594
595 /* No ISA devices; register the platform driver for PCI-based devices */
596 return platform_driver_register(&scx200_pci_drv);
630} 597}
631 598
632static void __exit scx200_acb_cleanup(void) 599static void __exit scx200_acb_cleanup(void)
633{ 600{
634 struct scx200_acb_iface *iface; 601 struct scx200_acb_iface *iface;
635 602
603 platform_driver_unregister(&scx200_pci_drv);
604
636 mutex_lock(&scx200_acb_list_mutex); 605 mutex_lock(&scx200_acb_list_mutex);
637 while ((iface = scx200_acb_list) != NULL) { 606 while ((iface = scx200_acb_list) != NULL) {
638 scx200_acb_list = iface->next; 607 scx200_acb_list = iface->next;
639 mutex_unlock(&scx200_acb_list_mutex); 608 mutex_unlock(&scx200_acb_list_mutex);
640 609
641 i2c_del_adapter(&iface->adapter); 610 scx200_cleanup_iface(iface);
642
643 if (iface->pdev) {
644 pci_release_region(iface->pdev, iface->bar);
645 pci_dev_put(iface->pdev);
646 }
647 else
648 release_region(iface->base, 8);
649 611
650 kfree(iface);
651 mutex_lock(&scx200_acb_list_mutex); 612 mutex_lock(&scx200_acb_list_mutex);
652 } 613 }
653 mutex_unlock(&scx200_acb_list_mutex); 614 mutex_unlock(&scx200_acb_list_mutex);
diff --git a/drivers/i2c/i2c-boardinfo.c b/drivers/i2c/i2c-boardinfo.c
index 7e6a63b57165..3ca2e012e789 100644
--- a/drivers/i2c/i2c-boardinfo.c
+++ b/drivers/i2c/i2c-boardinfo.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * i2c-boardinfo.h - collect pre-declarations of I2C devices 2 * i2c-boardinfo.c - collect pre-declarations of I2C devices
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by 5 * it under the terms of the GNU General Public License as published by
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index bea4c5021d26..9a58994ff7ea 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -196,88 +196,60 @@ static int i2c_device_pm_suspend(struct device *dev)
196{ 196{
197 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 197 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
198 198
199 if (pm) { 199 if (pm)
200 if (pm_runtime_suspended(dev)) 200 return pm_generic_suspend(dev);
201 return 0; 201 else
202 else 202 return i2c_legacy_suspend(dev, PMSG_SUSPEND);
203 return pm->suspend ? pm->suspend(dev) : 0;
204 }
205
206 return i2c_legacy_suspend(dev, PMSG_SUSPEND);
207} 203}
208 204
209static int i2c_device_pm_resume(struct device *dev) 205static int i2c_device_pm_resume(struct device *dev)
210{ 206{
211 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 207 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
212 int ret;
213 208
214 if (pm) 209 if (pm)
215 ret = pm->resume ? pm->resume(dev) : 0; 210 return pm_generic_resume(dev);
216 else 211 else
217 ret = i2c_legacy_resume(dev); 212 return i2c_legacy_resume(dev);
218
219 return ret;
220} 213}
221 214
222static int i2c_device_pm_freeze(struct device *dev) 215static int i2c_device_pm_freeze(struct device *dev)
223{ 216{
224 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 217 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
225 218
226 if (pm) { 219 if (pm)
227 if (pm_runtime_suspended(dev)) 220 return pm_generic_freeze(dev);
228 return 0; 221 else
229 else 222 return i2c_legacy_suspend(dev, PMSG_FREEZE);
230 return pm->freeze ? pm->freeze(dev) : 0;
231 }
232
233 return i2c_legacy_suspend(dev, PMSG_FREEZE);
234} 223}
235 224
236static int i2c_device_pm_thaw(struct device *dev) 225static int i2c_device_pm_thaw(struct device *dev)
237{ 226{
238 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 227 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
239 228
240 if (pm) { 229 if (pm)
241 if (pm_runtime_suspended(dev)) 230 return pm_generic_thaw(dev);
242 return 0; 231 else
243 else 232 return i2c_legacy_resume(dev);
244 return pm->thaw ? pm->thaw(dev) : 0;
245 }
246
247 return i2c_legacy_resume(dev);
248} 233}
249 234
250static int i2c_device_pm_poweroff(struct device *dev) 235static int i2c_device_pm_poweroff(struct device *dev)
251{ 236{
252 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 237 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
253 238
254 if (pm) { 239 if (pm)
255 if (pm_runtime_suspended(dev)) 240 return pm_generic_poweroff(dev);
256 return 0; 241 else
257 else 242 return i2c_legacy_suspend(dev, PMSG_HIBERNATE);
258 return pm->poweroff ? pm->poweroff(dev) : 0;
259 }
260
261 return i2c_legacy_suspend(dev, PMSG_HIBERNATE);
262} 243}
263 244
264static int i2c_device_pm_restore(struct device *dev) 245static int i2c_device_pm_restore(struct device *dev)
265{ 246{
266 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; 247 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
267 int ret;
268 248
269 if (pm) 249 if (pm)
270 ret = pm->restore ? pm->restore(dev) : 0; 250 return pm_generic_restore(dev);
271 else 251 else
272 ret = i2c_legacy_resume(dev); 252 return i2c_legacy_resume(dev);
273
274 if (!ret) {
275 pm_runtime_disable(dev);
276 pm_runtime_set_active(dev);
277 pm_runtime_enable(dev);
278 }
279
280 return ret;
281} 253}
282#else /* !CONFIG_PM_SLEEP */ 254#else /* !CONFIG_PM_SLEEP */
283#define i2c_device_pm_suspend NULL 255#define i2c_device_pm_suspend NULL
@@ -376,7 +348,7 @@ EXPORT_SYMBOL(i2c_verify_client);
376 348
377 349
378/* This is a permissive address validity check, I2C address map constraints 350/* This is a permissive address validity check, I2C address map constraints
379 * are purposedly not enforced, except for the general call address. */ 351 * are purposely not enforced, except for the general call address. */
380static int i2c_check_client_addr_validity(const struct i2c_client *client) 352static int i2c_check_client_addr_validity(const struct i2c_client *client)
381{ 353{
382 if (client->flags & I2C_CLIENT_TEN) { 354 if (client->flags & I2C_CLIENT_TEN) {
@@ -425,14 +397,14 @@ static int __i2c_check_addr_busy(struct device *dev, void *addrp)
425/* walk up mux tree */ 397/* walk up mux tree */
426static int i2c_check_mux_parents(struct i2c_adapter *adapter, int addr) 398static int i2c_check_mux_parents(struct i2c_adapter *adapter, int addr)
427{ 399{
400 struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
428 int result; 401 int result;
429 402
430 result = device_for_each_child(&adapter->dev, &addr, 403 result = device_for_each_child(&adapter->dev, &addr,
431 __i2c_check_addr_busy); 404 __i2c_check_addr_busy);
432 405
433 if (!result && i2c_parent_is_i2c_adapter(adapter)) 406 if (!result && parent)
434 result = i2c_check_mux_parents( 407 result = i2c_check_mux_parents(parent, addr);
435 to_i2c_adapter(adapter->dev.parent), addr);
436 408
437 return result; 409 return result;
438} 410}
@@ -453,11 +425,11 @@ static int i2c_check_mux_children(struct device *dev, void *addrp)
453 425
454static int i2c_check_addr_busy(struct i2c_adapter *adapter, int addr) 426static int i2c_check_addr_busy(struct i2c_adapter *adapter, int addr)
455{ 427{
428 struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
456 int result = 0; 429 int result = 0;
457 430
458 if (i2c_parent_is_i2c_adapter(adapter)) 431 if (parent)
459 result = i2c_check_mux_parents( 432 result = i2c_check_mux_parents(parent, addr);
460 to_i2c_adapter(adapter->dev.parent), addr);
461 433
462 if (!result) 434 if (!result)
463 result = device_for_each_child(&adapter->dev, &addr, 435 result = device_for_each_child(&adapter->dev, &addr,
@@ -472,8 +444,10 @@ static int i2c_check_addr_busy(struct i2c_adapter *adapter, int addr)
472 */ 444 */
473void i2c_lock_adapter(struct i2c_adapter *adapter) 445void i2c_lock_adapter(struct i2c_adapter *adapter)
474{ 446{
475 if (i2c_parent_is_i2c_adapter(adapter)) 447 struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
476 i2c_lock_adapter(to_i2c_adapter(adapter->dev.parent)); 448
449 if (parent)
450 i2c_lock_adapter(parent);
477 else 451 else
478 rt_mutex_lock(&adapter->bus_lock); 452 rt_mutex_lock(&adapter->bus_lock);
479} 453}
@@ -485,8 +459,10 @@ EXPORT_SYMBOL_GPL(i2c_lock_adapter);
485 */ 459 */
486static int i2c_trylock_adapter(struct i2c_adapter *adapter) 460static int i2c_trylock_adapter(struct i2c_adapter *adapter)
487{ 461{
488 if (i2c_parent_is_i2c_adapter(adapter)) 462 struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
489 return i2c_trylock_adapter(to_i2c_adapter(adapter->dev.parent)); 463
464 if (parent)
465 return i2c_trylock_adapter(parent);
490 else 466 else
491 return rt_mutex_trylock(&adapter->bus_lock); 467 return rt_mutex_trylock(&adapter->bus_lock);
492} 468}
@@ -497,8 +473,10 @@ static int i2c_trylock_adapter(struct i2c_adapter *adapter)
497 */ 473 */
498void i2c_unlock_adapter(struct i2c_adapter *adapter) 474void i2c_unlock_adapter(struct i2c_adapter *adapter)
499{ 475{
500 if (i2c_parent_is_i2c_adapter(adapter)) 476 struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
501 i2c_unlock_adapter(to_i2c_adapter(adapter->dev.parent)); 477
478 if (parent)
479 i2c_unlock_adapter(parent);
502 else 480 else
503 rt_mutex_unlock(&adapter->bus_lock); 481 rt_mutex_unlock(&adapter->bus_lock);
504} 482}
@@ -559,9 +537,7 @@ i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info)
559 client->dev.parent = &client->adapter->dev; 537 client->dev.parent = &client->adapter->dev;
560 client->dev.bus = &i2c_bus_type; 538 client->dev.bus = &i2c_bus_type;
561 client->dev.type = &i2c_client_type; 539 client->dev.type = &i2c_client_type;
562#ifdef CONFIG_OF
563 client->dev.of_node = info->of_node; 540 client->dev.of_node = info->of_node;
564#endif
565 541
566 dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap), 542 dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
567 client->addr); 543 client->addr);
@@ -677,8 +653,6 @@ i2c_sysfs_new_device(struct device *dev, struct device_attribute *attr,
677 char *blank, end; 653 char *blank, end;
678 int res; 654 int res;
679 655
680 dev_warn(dev, "The new_device interface is still experimental "
681 "and may change in a near future\n");
682 memset(&info, 0, sizeof(struct i2c_board_info)); 656 memset(&info, 0, sizeof(struct i2c_board_info));
683 657
684 blank = strchr(buf, ' '); 658 blank = strchr(buf, ' ');
@@ -823,6 +797,10 @@ static int i2c_do_add_adapter(struct i2c_driver *driver,
823 797
824 /* Let legacy drivers scan this bus for matching devices */ 798 /* Let legacy drivers scan this bus for matching devices */
825 if (driver->attach_adapter) { 799 if (driver->attach_adapter) {
800 dev_warn(&adap->dev, "%s: attach_adapter method is deprecated\n",
801 driver->driver.name);
802 dev_warn(&adap->dev, "Please use another way to instantiate "
803 "your i2c_client\n");
826 /* We ignore the return code; if it fails, too bad */ 804 /* We ignore the return code; if it fails, too bad */
827 driver->attach_adapter(adap); 805 driver->attach_adapter(adap);
828 } 806 }
@@ -844,6 +822,18 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
844 goto out_list; 822 goto out_list;
845 } 823 }
846 824
825 /* Sanity checks */
826 if (unlikely(adap->name[0] == '\0')) {
827 pr_err("i2c-core: Attempt to register an adapter with "
828 "no name!\n");
829 return -EINVAL;
830 }
831 if (unlikely(!adap->algo)) {
832 pr_err("i2c-core: Attempt to register adapter '%s' with "
833 "no algo!\n", adap->name);
834 return -EINVAL;
835 }
836
847 rt_mutex_init(&adap->bus_lock); 837 rt_mutex_init(&adap->bus_lock);
848 mutex_init(&adap->userspace_clients_lock); 838 mutex_init(&adap->userspace_clients_lock);
849 INIT_LIST_HEAD(&adap->userspace_clients); 839 INIT_LIST_HEAD(&adap->userspace_clients);
@@ -995,6 +985,8 @@ static int i2c_do_del_adapter(struct i2c_driver *driver,
995 985
996 if (!driver->detach_adapter) 986 if (!driver->detach_adapter)
997 return 0; 987 return 0;
988 dev_warn(&adapter->dev, "%s: detach_adapter method is deprecated\n",
989 driver->driver.name);
998 res = driver->detach_adapter(adapter); 990 res = driver->detach_adapter(adapter);
999 if (res) 991 if (res)
1000 dev_err(&adapter->dev, "detach_adapter failed (%d) " 992 dev_err(&adapter->dev, "detach_adapter failed (%d) "
@@ -1005,6 +997,14 @@ static int i2c_do_del_adapter(struct i2c_driver *driver,
1005static int __unregister_client(struct device *dev, void *dummy) 997static int __unregister_client(struct device *dev, void *dummy)
1006{ 998{
1007 struct i2c_client *client = i2c_verify_client(dev); 999 struct i2c_client *client = i2c_verify_client(dev);
1000 if (client && strcmp(client->name, "dummy"))
1001 i2c_unregister_device(client);
1002 return 0;
1003}
1004
1005static int __unregister_dummy(struct device *dev, void *dummy)
1006{
1007 struct i2c_client *client = i2c_verify_client(dev);
1008 if (client) 1008 if (client)
1009 i2c_unregister_device(client); 1009 i2c_unregister_device(client);
1010 return 0; 1010 return 0;
@@ -1059,8 +1059,12 @@ int i2c_del_adapter(struct i2c_adapter *adap)
1059 mutex_unlock(&adap->userspace_clients_lock); 1059 mutex_unlock(&adap->userspace_clients_lock);
1060 1060
1061 /* Detach any active clients. This can't fail, thus we do not 1061 /* Detach any active clients. This can't fail, thus we do not
1062 checking the returned value. */ 1062 * check the returned value. This is a two-pass process, because
1063 * we can't remove the dummy devices during the first pass: they
1064 * could have been instantiated by real devices wishing to clean
1065 * them up properly, so we give them a chance to do that first. */
1063 res = device_for_each_child(&adap->dev, NULL, __unregister_client); 1066 res = device_for_each_child(&adap->dev, NULL, __unregister_client);
1067 res = device_for_each_child(&adap->dev, NULL, __unregister_dummy);
1064 1068
1065#ifdef CONFIG_I2C_COMPAT 1069#ifdef CONFIG_I2C_COMPAT
1066 class_compat_remove_link(i2c_adapter_compat_class, &adap->dev, 1070 class_compat_remove_link(i2c_adapter_compat_class, &adap->dev,
@@ -1093,6 +1097,18 @@ EXPORT_SYMBOL(i2c_del_adapter);
1093 1097
1094/* ------------------------------------------------------------------------- */ 1098/* ------------------------------------------------------------------------- */
1095 1099
1100int i2c_for_each_dev(void *data, int (*fn)(struct device *, void *))
1101{
1102 int res;
1103
1104 mutex_lock(&core_lock);
1105 res = bus_for_each_dev(&i2c_bus_type, NULL, data, fn);
1106 mutex_unlock(&core_lock);
1107
1108 return res;
1109}
1110EXPORT_SYMBOL_GPL(i2c_for_each_dev);
1111
1096static int __process_new_driver(struct device *dev, void *data) 1112static int __process_new_driver(struct device *dev, void *data)
1097{ 1113{
1098 if (dev->type != &i2c_adapter_type) 1114 if (dev->type != &i2c_adapter_type)
@@ -1124,13 +1140,19 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver)
1124 if (res) 1140 if (res)
1125 return res; 1141 return res;
1126 1142
1143 /* Drivers should switch to dev_pm_ops instead. */
1144 if (driver->suspend)
1145 pr_warn("i2c-core: driver [%s] using legacy suspend method\n",
1146 driver->driver.name);
1147 if (driver->resume)
1148 pr_warn("i2c-core: driver [%s] using legacy resume method\n",
1149 driver->driver.name);
1150
1127 pr_debug("i2c-core: driver [%s] registered\n", driver->driver.name); 1151 pr_debug("i2c-core: driver [%s] registered\n", driver->driver.name);
1128 1152
1129 INIT_LIST_HEAD(&driver->clients); 1153 INIT_LIST_HEAD(&driver->clients);
1130 /* Walk the adapters that are already present */ 1154 /* Walk the adapters that are already present */
1131 mutex_lock(&core_lock); 1155 i2c_for_each_dev(driver, __process_new_driver);
1132 bus_for_each_dev(&i2c_bus_type, NULL, driver, __process_new_driver);
1133 mutex_unlock(&core_lock);
1134 1156
1135 return 0; 1157 return 0;
1136} 1158}
@@ -1150,9 +1172,7 @@ static int __process_removed_driver(struct device *dev, void *data)
1150 */ 1172 */
1151void i2c_del_driver(struct i2c_driver *driver) 1173void i2c_del_driver(struct i2c_driver *driver)
1152{ 1174{
1153 mutex_lock(&core_lock); 1175 i2c_for_each_dev(driver, __process_removed_driver);
1154 bus_for_each_dev(&i2c_bus_type, NULL, driver, __process_removed_driver);
1155 mutex_unlock(&core_lock);
1156 1176
1157 driver_unregister(&driver->driver); 1177 driver_unregister(&driver->driver);
1158 pr_debug("i2c-core: driver [%s] unregistered\n", driver->driver.name); 1178 pr_debug("i2c-core: driver [%s] unregistered\n", driver->driver.name);
@@ -1346,7 +1366,7 @@ EXPORT_SYMBOL(i2c_transfer);
1346 * 1366 *
1347 * Returns negative errno, or else the number of bytes written. 1367 * Returns negative errno, or else the number of bytes written.
1348 */ 1368 */
1349int i2c_master_send(struct i2c_client *client, const char *buf, int count) 1369int i2c_master_send(const struct i2c_client *client, const char *buf, int count)
1350{ 1370{
1351 int ret; 1371 int ret;
1352 struct i2c_adapter *adap = client->adapter; 1372 struct i2c_adapter *adap = client->adapter;
@@ -1373,7 +1393,7 @@ EXPORT_SYMBOL(i2c_master_send);
1373 * 1393 *
1374 * Returns negative errno, or else the number of bytes read. 1394 * Returns negative errno, or else the number of bytes read.
1375 */ 1395 */
1376int i2c_master_recv(struct i2c_client *client, char *buf, int count) 1396int i2c_master_recv(const struct i2c_client *client, char *buf, int count)
1377{ 1397{
1378 struct i2c_adapter *adap = client->adapter; 1398 struct i2c_adapter *adap = client->adapter;
1379 struct i2c_msg msg; 1399 struct i2c_msg msg;
@@ -1504,26 +1524,25 @@ static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver)
1504 if (!driver->detect || !address_list) 1524 if (!driver->detect || !address_list)
1505 return 0; 1525 return 0;
1506 1526
1527 /* Stop here if the classes do not match */
1528 if (!(adapter->class & driver->class))
1529 return 0;
1530
1507 /* Set up a temporary client to help detect callback */ 1531 /* Set up a temporary client to help detect callback */
1508 temp_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); 1532 temp_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1509 if (!temp_client) 1533 if (!temp_client)
1510 return -ENOMEM; 1534 return -ENOMEM;
1511 temp_client->adapter = adapter; 1535 temp_client->adapter = adapter;
1512 1536
1513 /* Stop here if the classes do not match */
1514 if (!(adapter->class & driver->class))
1515 goto exit_free;
1516
1517 for (i = 0; address_list[i] != I2C_CLIENT_END; i += 1) { 1537 for (i = 0; address_list[i] != I2C_CLIENT_END; i += 1) {
1518 dev_dbg(&adapter->dev, "found normal entry for adapter %d, " 1538 dev_dbg(&adapter->dev, "found normal entry for adapter %d, "
1519 "addr 0x%02x\n", adap_id, address_list[i]); 1539 "addr 0x%02x\n", adap_id, address_list[i]);
1520 temp_client->addr = address_list[i]; 1540 temp_client->addr = address_list[i];
1521 err = i2c_detect_address(temp_client, driver); 1541 err = i2c_detect_address(temp_client, driver);
1522 if (err) 1542 if (unlikely(err))
1523 goto exit_free; 1543 break;
1524 } 1544 }
1525 1545
1526 exit_free:
1527 kfree(temp_client); 1546 kfree(temp_client);
1528 return err; 1547 return err;
1529} 1548}
@@ -1576,12 +1595,12 @@ i2c_new_probed_device(struct i2c_adapter *adap,
1576} 1595}
1577EXPORT_SYMBOL_GPL(i2c_new_probed_device); 1596EXPORT_SYMBOL_GPL(i2c_new_probed_device);
1578 1597
1579struct i2c_adapter *i2c_get_adapter(int id) 1598struct i2c_adapter *i2c_get_adapter(int nr)
1580{ 1599{
1581 struct i2c_adapter *adapter; 1600 struct i2c_adapter *adapter;
1582 1601
1583 mutex_lock(&core_lock); 1602 mutex_lock(&core_lock);
1584 adapter = idr_find(&i2c_adapter_idr, id); 1603 adapter = idr_find(&i2c_adapter_idr, nr);
1585 if (adapter && !try_module_get(adapter->owner)) 1604 if (adapter && !try_module_get(adapter->owner))
1586 adapter = NULL; 1605 adapter = NULL;
1587 1606
@@ -1664,7 +1683,7 @@ static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg)
1664 * This executes the SMBus "receive byte" protocol, returning negative errno 1683 * This executes the SMBus "receive byte" protocol, returning negative errno
1665 * else the byte received from the device. 1684 * else the byte received from the device.
1666 */ 1685 */
1667s32 i2c_smbus_read_byte(struct i2c_client *client) 1686s32 i2c_smbus_read_byte(const struct i2c_client *client)
1668{ 1687{
1669 union i2c_smbus_data data; 1688 union i2c_smbus_data data;
1670 int status; 1689 int status;
@@ -1684,7 +1703,7 @@ EXPORT_SYMBOL(i2c_smbus_read_byte);
1684 * This executes the SMBus "send byte" protocol, returning negative errno 1703 * This executes the SMBus "send byte" protocol, returning negative errno
1685 * else zero on success. 1704 * else zero on success.
1686 */ 1705 */
1687s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value) 1706s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value)
1688{ 1707{
1689 return i2c_smbus_xfer(client->adapter, client->addr, client->flags, 1708 return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
1690 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); 1709 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
@@ -1699,7 +1718,7 @@ EXPORT_SYMBOL(i2c_smbus_write_byte);
1699 * This executes the SMBus "read byte" protocol, returning negative errno 1718 * This executes the SMBus "read byte" protocol, returning negative errno
1700 * else a data byte received from the device. 1719 * else a data byte received from the device.
1701 */ 1720 */
1702s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command) 1721s32 i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command)
1703{ 1722{
1704 union i2c_smbus_data data; 1723 union i2c_smbus_data data;
1705 int status; 1724 int status;
@@ -1720,7 +1739,8 @@ EXPORT_SYMBOL(i2c_smbus_read_byte_data);
1720 * This executes the SMBus "write byte" protocol, returning negative errno 1739 * This executes the SMBus "write byte" protocol, returning negative errno
1721 * else zero on success. 1740 * else zero on success.
1722 */ 1741 */
1723s32 i2c_smbus_write_byte_data(struct i2c_client *client, u8 command, u8 value) 1742s32 i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command,
1743 u8 value)
1724{ 1744{
1725 union i2c_smbus_data data; 1745 union i2c_smbus_data data;
1726 data.byte = value; 1746 data.byte = value;
@@ -1738,7 +1758,7 @@ EXPORT_SYMBOL(i2c_smbus_write_byte_data);
1738 * This executes the SMBus "read word" protocol, returning negative errno 1758 * This executes the SMBus "read word" protocol, returning negative errno
1739 * else a 16-bit unsigned "word" received from the device. 1759 * else a 16-bit unsigned "word" received from the device.
1740 */ 1760 */
1741s32 i2c_smbus_read_word_data(struct i2c_client *client, u8 command) 1761s32 i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
1742{ 1762{
1743 union i2c_smbus_data data; 1763 union i2c_smbus_data data;
1744 int status; 1764 int status;
@@ -1759,7 +1779,8 @@ EXPORT_SYMBOL(i2c_smbus_read_word_data);
1759 * This executes the SMBus "write word" protocol, returning negative errno 1779 * This executes the SMBus "write word" protocol, returning negative errno
1760 * else zero on success. 1780 * else zero on success.
1761 */ 1781 */
1762s32 i2c_smbus_write_word_data(struct i2c_client *client, u8 command, u16 value) 1782s32 i2c_smbus_write_word_data(const struct i2c_client *client, u8 command,
1783 u16 value)
1763{ 1784{
1764 union i2c_smbus_data data; 1785 union i2c_smbus_data data;
1765 data.word = value; 1786 data.word = value;
@@ -1778,7 +1799,8 @@ EXPORT_SYMBOL(i2c_smbus_write_word_data);
1778 * This executes the SMBus "process call" protocol, returning negative errno 1799 * This executes the SMBus "process call" protocol, returning negative errno
1779 * else a 16-bit unsigned "word" received from the device. 1800 * else a 16-bit unsigned "word" received from the device.
1780 */ 1801 */
1781s32 i2c_smbus_process_call(struct i2c_client *client, u8 command, u16 value) 1802s32 i2c_smbus_process_call(const struct i2c_client *client, u8 command,
1803 u16 value)
1782{ 1804{
1783 union i2c_smbus_data data; 1805 union i2c_smbus_data data;
1784 int status; 1806 int status;
@@ -1806,7 +1828,7 @@ EXPORT_SYMBOL(i2c_smbus_process_call);
1806 * support this; its emulation through I2C messaging relies on a specific 1828 * support this; its emulation through I2C messaging relies on a specific
1807 * mechanism (I2C_M_RECV_LEN) which may not be implemented. 1829 * mechanism (I2C_M_RECV_LEN) which may not be implemented.
1808 */ 1830 */
1809s32 i2c_smbus_read_block_data(struct i2c_client *client, u8 command, 1831s32 i2c_smbus_read_block_data(const struct i2c_client *client, u8 command,
1810 u8 *values) 1832 u8 *values)
1811{ 1833{
1812 union i2c_smbus_data data; 1834 union i2c_smbus_data data;
@@ -1833,7 +1855,7 @@ EXPORT_SYMBOL(i2c_smbus_read_block_data);
1833 * This executes the SMBus "block write" protocol, returning negative errno 1855 * This executes the SMBus "block write" protocol, returning negative errno
1834 * else zero on success. 1856 * else zero on success.
1835 */ 1857 */
1836s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command, 1858s32 i2c_smbus_write_block_data(const struct i2c_client *client, u8 command,
1837 u8 length, const u8 *values) 1859 u8 length, const u8 *values)
1838{ 1860{
1839 union i2c_smbus_data data; 1861 union i2c_smbus_data data;
@@ -1849,7 +1871,7 @@ s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command,
1849EXPORT_SYMBOL(i2c_smbus_write_block_data); 1871EXPORT_SYMBOL(i2c_smbus_write_block_data);
1850 1872
1851/* Returns the number of read bytes */ 1873/* Returns the number of read bytes */
1852s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8 command, 1874s32 i2c_smbus_read_i2c_block_data(const struct i2c_client *client, u8 command,
1853 u8 length, u8 *values) 1875 u8 length, u8 *values)
1854{ 1876{
1855 union i2c_smbus_data data; 1877 union i2c_smbus_data data;
@@ -1869,7 +1891,7 @@ s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8 command,
1869} 1891}
1870EXPORT_SYMBOL(i2c_smbus_read_i2c_block_data); 1892EXPORT_SYMBOL(i2c_smbus_read_i2c_block_data);
1871 1893
1872s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, u8 command, 1894s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client, u8 command,
1873 u8 length, const u8 *values) 1895 u8 length, const u8 *values)
1874{ 1896{
1875 union i2c_smbus_data data; 1897 union i2c_smbus_data data;
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 5f3a52d517c3..c90ce50b619f 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -28,6 +28,8 @@
28 28
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/device.h>
32#include <linux/notifier.h>
31#include <linux/fs.h> 33#include <linux/fs.h>
32#include <linux/slab.h> 34#include <linux/slab.h>
33#include <linux/init.h> 35#include <linux/init.h>
@@ -37,16 +39,13 @@
37#include <linux/jiffies.h> 39#include <linux/jiffies.h>
38#include <linux/uaccess.h> 40#include <linux/uaccess.h>
39 41
40static struct i2c_driver i2cdev_driver;
41
42/* 42/*
43 * An i2c_dev represents an i2c_adapter ... an I2C or SMBus master, not a 43 * An i2c_dev represents an i2c_adapter ... an I2C or SMBus master, not a
44 * slave (i2c_client) with which messages will be exchanged. It's coupled 44 * slave (i2c_client) with which messages will be exchanged. It's coupled
45 * with a character special file which is accessed by user mode drivers. 45 * with a character special file which is accessed by user mode drivers.
46 * 46 *
47 * The list of i2c_dev structures is parallel to the i2c_adapter lists 47 * The list of i2c_dev structures is parallel to the i2c_adapter lists
48 * maintained by the driver model, and is updated using notifications 48 * maintained by the driver model, and is updated using bus notifications.
49 * delivered to the i2cdev_driver.
50 */ 49 */
51struct i2c_dev { 50struct i2c_dev {
52 struct list_head list; 51 struct list_head list;
@@ -192,13 +191,12 @@ static int i2cdev_check(struct device *dev, void *addrp)
192/* walk up mux tree */ 191/* walk up mux tree */
193static int i2cdev_check_mux_parents(struct i2c_adapter *adapter, int addr) 192static int i2cdev_check_mux_parents(struct i2c_adapter *adapter, int addr)
194{ 193{
194 struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
195 int result; 195 int result;
196 196
197 result = device_for_each_child(&adapter->dev, &addr, i2cdev_check); 197 result = device_for_each_child(&adapter->dev, &addr, i2cdev_check);
198 198 if (!result && parent)
199 if (!result && i2c_parent_is_i2c_adapter(adapter)) 199 result = i2cdev_check_mux_parents(parent, addr);
200 result = i2cdev_check_mux_parents(
201 to_i2c_adapter(adapter->dev.parent), addr);
202 200
203 return result; 201 return result;
204} 202}
@@ -222,11 +220,11 @@ static int i2cdev_check_mux_children(struct device *dev, void *addrp)
222 driver bound to it, as NOT busy. */ 220 driver bound to it, as NOT busy. */
223static int i2cdev_check_addr(struct i2c_adapter *adapter, unsigned int addr) 221static int i2cdev_check_addr(struct i2c_adapter *adapter, unsigned int addr)
224{ 222{
223 struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
225 int result = 0; 224 int result = 0;
226 225
227 if (i2c_parent_is_i2c_adapter(adapter)) 226 if (parent)
228 result = i2cdev_check_mux_parents( 227 result = i2cdev_check_mux_parents(parent, addr);
229 to_i2c_adapter(adapter->dev.parent), addr);
230 228
231 if (!result) 229 if (!result)
232 result = device_for_each_child(&adapter->dev, &addr, 230 result = device_for_each_child(&adapter->dev, &addr,
@@ -492,7 +490,6 @@ static int i2cdev_open(struct inode *inode, struct file *file)
492 return -ENOMEM; 490 return -ENOMEM;
493 } 491 }
494 snprintf(client->name, I2C_NAME_SIZE, "i2c-dev %d", adap->nr); 492 snprintf(client->name, I2C_NAME_SIZE, "i2c-dev %d", adap->nr);
495 client->driver = &i2cdev_driver;
496 493
497 client->adapter = adap; 494 client->adapter = adap;
498 file->private_data = client; 495 file->private_data = client;
@@ -523,19 +520,18 @@ static const struct file_operations i2cdev_fops = {
523 520
524/* ------------------------------------------------------------------------- */ 521/* ------------------------------------------------------------------------- */
525 522
526/*
527 * The legacy "i2cdev_driver" is used primarily to get notifications when
528 * I2C adapters are added or removed, so that each one gets an i2c_dev
529 * and is thus made available to userspace driver code.
530 */
531
532static struct class *i2c_dev_class; 523static struct class *i2c_dev_class;
533 524
534static int i2cdev_attach_adapter(struct i2c_adapter *adap) 525static int i2cdev_attach_adapter(struct device *dev, void *dummy)
535{ 526{
527 struct i2c_adapter *adap;
536 struct i2c_dev *i2c_dev; 528 struct i2c_dev *i2c_dev;
537 int res; 529 int res;
538 530
531 if (dev->type != &i2c_adapter_type)
532 return 0;
533 adap = to_i2c_adapter(dev);
534
539 i2c_dev = get_free_i2c_dev(adap); 535 i2c_dev = get_free_i2c_dev(adap);
540 if (IS_ERR(i2c_dev)) 536 if (IS_ERR(i2c_dev))
541 return PTR_ERR(i2c_dev); 537 return PTR_ERR(i2c_dev);
@@ -562,10 +558,15 @@ error:
562 return res; 558 return res;
563} 559}
564 560
565static int i2cdev_detach_adapter(struct i2c_adapter *adap) 561static int i2cdev_detach_adapter(struct device *dev, void *dummy)
566{ 562{
563 struct i2c_adapter *adap;
567 struct i2c_dev *i2c_dev; 564 struct i2c_dev *i2c_dev;
568 565
566 if (dev->type != &i2c_adapter_type)
567 return 0;
568 adap = to_i2c_adapter(dev);
569
569 i2c_dev = i2c_dev_get_by_minor(adap->nr); 570 i2c_dev = i2c_dev_get_by_minor(adap->nr);
570 if (!i2c_dev) /* attach_adapter must have failed */ 571 if (!i2c_dev) /* attach_adapter must have failed */
571 return 0; 572 return 0;
@@ -578,12 +579,23 @@ static int i2cdev_detach_adapter(struct i2c_adapter *adap)
578 return 0; 579 return 0;
579} 580}
580 581
581static struct i2c_driver i2cdev_driver = { 582int i2cdev_notifier_call(struct notifier_block *nb, unsigned long action,
582 .driver = { 583 void *data)
583 .name = "dev_driver", 584{
584 }, 585 struct device *dev = data;
585 .attach_adapter = i2cdev_attach_adapter, 586
586 .detach_adapter = i2cdev_detach_adapter, 587 switch (action) {
588 case BUS_NOTIFY_ADD_DEVICE:
589 return i2cdev_attach_adapter(dev, NULL);
590 case BUS_NOTIFY_DEL_DEVICE:
591 return i2cdev_detach_adapter(dev, NULL);
592 }
593
594 return 0;
595}
596
597static struct notifier_block i2cdev_notifier = {
598 .notifier_call = i2cdev_notifier_call,
587}; 599};
588 600
589/* ------------------------------------------------------------------------- */ 601/* ------------------------------------------------------------------------- */
@@ -608,10 +620,14 @@ static int __init i2c_dev_init(void)
608 goto out_unreg_chrdev; 620 goto out_unreg_chrdev;
609 } 621 }
610 622
611 res = i2c_add_driver(&i2cdev_driver); 623 /* Keep track of adapters which will be added or removed later */
624 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
612 if (res) 625 if (res)
613 goto out_unreg_class; 626 goto out_unreg_class;
614 627
628 /* Bind to already existing adapters right away */
629 i2c_for_each_dev(NULL, i2cdev_attach_adapter);
630
615 return 0; 631 return 0;
616 632
617out_unreg_class: 633out_unreg_class:
@@ -625,7 +641,8 @@ out:
625 641
626static void __exit i2c_dev_exit(void) 642static void __exit i2c_dev_exit(void)
627{ 643{
628 i2c_del_driver(&i2cdev_driver); 644 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
645 i2c_for_each_dev(NULL, i2cdev_detach_adapter);
629 class_destroy(i2c_dev_class); 646 class_destroy(i2c_dev_class);
630 unregister_chrdev(I2C_MAJOR, "i2c"); 647 unregister_chrdev(I2C_MAJOR, "i2c");
631} 648}
diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
index d32a4843fc3a..d7a4833be416 100644
--- a/drivers/i2c/i2c-mux.c
+++ b/drivers/i2c/i2c-mux.c
@@ -120,7 +120,6 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,
120 snprintf(priv->adap.name, sizeof(priv->adap.name), 120 snprintf(priv->adap.name, sizeof(priv->adap.name),
121 "i2c-%d-mux (chan_id %d)", i2c_adapter_id(parent), chan_id); 121 "i2c-%d-mux (chan_id %d)", i2c_adapter_id(parent), chan_id);
122 priv->adap.owner = THIS_MODULE; 122 priv->adap.owner = THIS_MODULE;
123 priv->adap.id = parent->id;
124 priv->adap.algo = &priv->algo; 123 priv->adap.algo = &priv->algo;
125 priv->adap.algo_data = priv; 124 priv->adap.algo_data = priv;
126 priv->adap.dev.parent = &parent->dev; 125 priv->adap.dev.parent = &parent->dev;
diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig
index 4c9a99c4fcb0..90b7a0163899 100644
--- a/drivers/i2c/muxes/Kconfig
+++ b/drivers/i2c/muxes/Kconfig
@@ -5,6 +5,28 @@
5menu "Multiplexer I2C Chip support" 5menu "Multiplexer I2C Chip support"
6 depends on I2C_MUX 6 depends on I2C_MUX
7 7
8config I2C_MUX_GPIO
9 tristate "GPIO-based I2C multiplexer"
10 depends on GENERIC_GPIO
11 help
12 If you say yes to this option, support will be included for a
13 GPIO based I2C multiplexer. This driver provides access to
14 I2C busses connected through a MUX, which is controlled
15 through GPIO pins.
16
17 This driver can also be built as a module. If so, the module
18 will be called gpio-i2cmux.
19
20config I2C_MUX_PCA9541
21 tristate "NXP PCA9541 I2C Master Selector"
22 depends on EXPERIMENTAL
23 help
24 If you say yes here you get support for the NXP PCA9541
25 I2C Master Selector.
26
27 This driver can also be built as a module. If so, the module
28 will be called pca9541.
29
8config I2C_MUX_PCA954x 30config I2C_MUX_PCA954x
9 tristate "Philips PCA954x I2C Mux/switches" 31 tristate "Philips PCA954x I2C Mux/switches"
10 depends on EXPERIMENTAL 32 depends on EXPERIMENTAL
diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile
index bd83b5274815..4640436ea61f 100644
--- a/drivers/i2c/muxes/Makefile
+++ b/drivers/i2c/muxes/Makefile
@@ -1,8 +1,8 @@
1# 1#
2# Makefile for multiplexer I2C chip drivers. 2# Makefile for multiplexer I2C chip drivers.
3 3
4obj-$(CONFIG_I2C_MUX_GPIO) += gpio-i2cmux.o
5obj-$(CONFIG_I2C_MUX_PCA9541) += pca9541.o
4obj-$(CONFIG_I2C_MUX_PCA954x) += pca954x.o 6obj-$(CONFIG_I2C_MUX_PCA954x) += pca954x.o
5 7
6ifeq ($(CONFIG_I2C_DEBUG_BUS),y) 8ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
7EXTRA_CFLAGS += -DDEBUG
8endif
diff --git a/drivers/i2c/muxes/gpio-i2cmux.c b/drivers/i2c/muxes/gpio-i2cmux.c
new file mode 100644
index 000000000000..7b6ce624cd6e
--- /dev/null
+++ b/drivers/i2c/muxes/gpio-i2cmux.c
@@ -0,0 +1,184 @@
1/*
2 * I2C multiplexer using GPIO API
3 *
4 * Peter Korsgaard <peter.korsgaard@barco.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/i2c.h>
12#include <linux/i2c-mux.h>
13#include <linux/gpio-i2cmux.h>
14#include <linux/platform_device.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/slab.h>
18#include <linux/gpio.h>
19
20struct gpiomux {
21 struct i2c_adapter *parent;
22 struct i2c_adapter **adap; /* child busses */
23 struct gpio_i2cmux_platform_data data;
24};
25
26static void gpiomux_set(const struct gpiomux *mux, unsigned val)
27{
28 int i;
29
30 for (i = 0; i < mux->data.n_gpios; i++)
31 gpio_set_value(mux->data.gpios[i], val & (1 << i));
32}
33
34static int gpiomux_select(struct i2c_adapter *adap, void *data, u32 chan)
35{
36 struct gpiomux *mux = data;
37
38 gpiomux_set(mux, mux->data.values[chan]);
39
40 return 0;
41}
42
43static int gpiomux_deselect(struct i2c_adapter *adap, void *data, u32 chan)
44{
45 struct gpiomux *mux = data;
46
47 gpiomux_set(mux, mux->data.idle);
48
49 return 0;
50}
51
52static int __devinit gpiomux_probe(struct platform_device *pdev)
53{
54 struct gpiomux *mux;
55 struct gpio_i2cmux_platform_data *pdata;
56 struct i2c_adapter *parent;
57 int (*deselect) (struct i2c_adapter *, void *, u32);
58 unsigned initial_state;
59 int i, ret;
60
61 pdata = pdev->dev.platform_data;
62 if (!pdata) {
63 dev_err(&pdev->dev, "Missing platform data\n");
64 return -ENODEV;
65 }
66
67 parent = i2c_get_adapter(pdata->parent);
68 if (!parent) {
69 dev_err(&pdev->dev, "Parent adapter (%d) not found\n",
70 pdata->parent);
71 return -ENODEV;
72 }
73
74 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
75 if (!mux) {
76 ret = -ENOMEM;
77 goto alloc_failed;
78 }
79
80 mux->parent = parent;
81 mux->data = *pdata;
82 mux->adap = kzalloc(sizeof(struct i2c_adapter *) * pdata->n_values,
83 GFP_KERNEL);
84 if (!mux->adap) {
85 ret = -ENOMEM;
86 goto alloc_failed2;
87 }
88
89 if (pdata->idle != GPIO_I2CMUX_NO_IDLE) {
90 initial_state = pdata->idle;
91 deselect = gpiomux_deselect;
92 } else {
93 initial_state = pdata->values[0];
94 deselect = NULL;
95 }
96
97 for (i = 0; i < pdata->n_gpios; i++) {
98 ret = gpio_request(pdata->gpios[i], "gpio-i2cmux");
99 if (ret)
100 goto err_request_gpio;
101 gpio_direction_output(pdata->gpios[i],
102 initial_state & (1 << i));
103 }
104
105 for (i = 0; i < pdata->n_values; i++) {
106 u32 nr = pdata->base_nr ? (pdata->base_nr + i) : 0;
107
108 mux->adap[i] = i2c_add_mux_adapter(parent, mux, nr, i,
109 gpiomux_select, deselect);
110 if (!mux->adap[i]) {
111 ret = -ENODEV;
112 dev_err(&pdev->dev, "Failed to add adapter %d\n", i);
113 goto add_adapter_failed;
114 }
115 }
116
117 dev_info(&pdev->dev, "%d port mux on %s adapter\n",
118 pdata->n_values, parent->name);
119
120 platform_set_drvdata(pdev, mux);
121
122 return 0;
123
124add_adapter_failed:
125 for (; i > 0; i--)
126 i2c_del_mux_adapter(mux->adap[i - 1]);
127 i = pdata->n_gpios;
128err_request_gpio:
129 for (; i > 0; i--)
130 gpio_free(pdata->gpios[i - 1]);
131 kfree(mux->adap);
132alloc_failed2:
133 kfree(mux);
134alloc_failed:
135 i2c_put_adapter(parent);
136
137 return ret;
138}
139
140static int __devexit gpiomux_remove(struct platform_device *pdev)
141{
142 struct gpiomux *mux = platform_get_drvdata(pdev);
143 int i;
144
145 for (i = 0; i < mux->data.n_values; i++)
146 i2c_del_mux_adapter(mux->adap[i]);
147
148 for (i = 0; i < mux->data.n_gpios; i++)
149 gpio_free(mux->data.gpios[i]);
150
151 platform_set_drvdata(pdev, NULL);
152 i2c_put_adapter(mux->parent);
153 kfree(mux->adap);
154 kfree(mux);
155
156 return 0;
157}
158
159static struct platform_driver gpiomux_driver = {
160 .probe = gpiomux_probe,
161 .remove = __devexit_p(gpiomux_remove),
162 .driver = {
163 .owner = THIS_MODULE,
164 .name = "gpio-i2cmux",
165 },
166};
167
168static int __init gpiomux_init(void)
169{
170 return platform_driver_register(&gpiomux_driver);
171}
172
173static void __exit gpiomux_exit(void)
174{
175 platform_driver_unregister(&gpiomux_driver);
176}
177
178module_init(gpiomux_init);
179module_exit(gpiomux_exit);
180
181MODULE_DESCRIPTION("GPIO-based I2C multiplexer driver");
182MODULE_AUTHOR("Peter Korsgaard <peter.korsgaard@barco.com>");
183MODULE_LICENSE("GPL");
184MODULE_ALIAS("platform:gpio-i2cmux");
diff --git a/drivers/i2c/muxes/pca9541.c b/drivers/i2c/muxes/pca9541.c
new file mode 100644
index 000000000000..ed699c5aa79d
--- /dev/null
+++ b/drivers/i2c/muxes/pca9541.c
@@ -0,0 +1,411 @@
1/*
2 * I2C multiplexer driver for PCA9541 bus master selector
3 *
4 * Copyright (c) 2010 Ericsson AB.
5 *
6 * Author: Guenter Roeck <guenter.roeck@ericsson.com>
7 *
8 * Derived from:
9 * pca954x.c
10 *
11 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
12 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
13 *
14 * This file is licensed under the terms of the GNU General Public
15 * License version 2. This program is licensed "as is" without any
16 * warranty of any kind, whether express or implied.
17 */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/jiffies.h>
22#include <linux/delay.h>
23#include <linux/slab.h>
24#include <linux/device.h>
25#include <linux/i2c.h>
26#include <linux/i2c-mux.h>
27
28#include <linux/i2c/pca954x.h>
29
30/*
31 * The PCA9541 is a bus master selector. It supports two I2C masters connected
32 * to a single slave bus.
33 *
34 * Before each bus transaction, a master has to acquire bus ownership. After the
35 * transaction is complete, bus ownership has to be released. This fits well
36 * into the I2C multiplexer framework, which provides select and release
37 * functions for this purpose. For this reason, this driver is modeled as
38 * single-channel I2C bus multiplexer.
39 *
40 * This driver assumes that the two bus masters are controlled by two different
41 * hosts. If a single host controls both masters, platform code has to ensure
42 * that only one of the masters is instantiated at any given time.
43 */
44
45#define PCA9541_CONTROL 0x01
46#define PCA9541_ISTAT 0x02
47
48#define PCA9541_CTL_MYBUS (1 << 0)
49#define PCA9541_CTL_NMYBUS (1 << 1)
50#define PCA9541_CTL_BUSON (1 << 2)
51#define PCA9541_CTL_NBUSON (1 << 3)
52#define PCA9541_CTL_BUSINIT (1 << 4)
53#define PCA9541_CTL_TESTON (1 << 6)
54#define PCA9541_CTL_NTESTON (1 << 7)
55
56#define PCA9541_ISTAT_INTIN (1 << 0)
57#define PCA9541_ISTAT_BUSINIT (1 << 1)
58#define PCA9541_ISTAT_BUSOK (1 << 2)
59#define PCA9541_ISTAT_BUSLOST (1 << 3)
60#define PCA9541_ISTAT_MYTEST (1 << 6)
61#define PCA9541_ISTAT_NMYTEST (1 << 7)
62
63#define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
64#define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
65#define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
66#define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON)
67
68/* arbitration timeouts, in jiffies */
69#define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */
70#define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */
71
72/* arbitration retry delays, in us */
73#define SELECT_DELAY_SHORT 50
74#define SELECT_DELAY_LONG 1000
75
76struct pca9541 {
77 struct i2c_adapter *mux_adap;
78 unsigned long select_timeout;
79 unsigned long arb_timeout;
80};
81
82static const struct i2c_device_id pca9541_id[] = {
83 {"pca9541", 0},
84 {}
85};
86
87MODULE_DEVICE_TABLE(i2c, pca9541_id);
88
89/*
90 * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
91 * as they will try to lock the adapter a second time.
92 */
93static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
94{
95 struct i2c_adapter *adap = client->adapter;
96 int ret;
97
98 if (adap->algo->master_xfer) {
99 struct i2c_msg msg;
100 char buf[2];
101
102 msg.addr = client->addr;
103 msg.flags = 0;
104 msg.len = 2;
105 buf[0] = command;
106 buf[1] = val;
107 msg.buf = buf;
108 ret = adap->algo->master_xfer(adap, &msg, 1);
109 } else {
110 union i2c_smbus_data data;
111
112 data.byte = val;
113 ret = adap->algo->smbus_xfer(adap, client->addr,
114 client->flags,
115 I2C_SMBUS_WRITE,
116 command,
117 I2C_SMBUS_BYTE_DATA, &data);
118 }
119
120 return ret;
121}
122
123/*
124 * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
125 * as they will try to lock adapter a second time.
126 */
127static int pca9541_reg_read(struct i2c_client *client, u8 command)
128{
129 struct i2c_adapter *adap = client->adapter;
130 int ret;
131 u8 val;
132
133 if (adap->algo->master_xfer) {
134 struct i2c_msg msg[2] = {
135 {
136 .addr = client->addr,
137 .flags = 0,
138 .len = 1,
139 .buf = &command
140 },
141 {
142 .addr = client->addr,
143 .flags = I2C_M_RD,
144 .len = 1,
145 .buf = &val
146 }
147 };
148 ret = adap->algo->master_xfer(adap, msg, 2);
149 if (ret == 2)
150 ret = val;
151 else if (ret >= 0)
152 ret = -EIO;
153 } else {
154 union i2c_smbus_data data;
155
156 ret = adap->algo->smbus_xfer(adap, client->addr,
157 client->flags,
158 I2C_SMBUS_READ,
159 command,
160 I2C_SMBUS_BYTE_DATA, &data);
161 if (!ret)
162 ret = data.byte;
163 }
164 return ret;
165}
166
167/*
168 * Arbitration management functions
169 */
170
171/* Release bus. Also reset NTESTON and BUSINIT if it was set. */
172static void pca9541_release_bus(struct i2c_client *client)
173{
174 int reg;
175
176 reg = pca9541_reg_read(client, PCA9541_CONTROL);
177 if (reg >= 0 && !busoff(reg) && mybus(reg))
178 pca9541_reg_write(client, PCA9541_CONTROL,
179 (reg & PCA9541_CTL_NBUSON) >> 1);
180}
181
182/*
183 * Arbitration is defined as a two-step process. A bus master can only activate
184 * the slave bus if it owns it; otherwise it has to request ownership first.
185 * This multi-step process ensures that access contention is resolved
186 * gracefully.
187 *
188 * Bus Ownership Other master Action
189 * state requested access
190 * ----------------------------------------------------
191 * off - yes wait for arbitration timeout or
192 * for other master to drop request
193 * off no no take ownership
194 * off yes no turn on bus
195 * on yes - done
196 * on no - wait for arbitration timeout or
197 * for other master to release bus
198 *
199 * The main contention point occurs if the slave bus is off and both masters
200 * request ownership at the same time. In this case, one master will turn on
201 * the slave bus, believing that it owns it. The other master will request
202 * bus ownership. Result is that the bus is turned on, and master which did
203 * _not_ own the slave bus before ends up owning it.
204 */
205
206/* Control commands per PCA9541 datasheet */
207static const u8 pca9541_control[16] = {
208 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
209};
210
211/*
212 * Channel arbitration
213 *
214 * Return values:
215 * <0: error
216 * 0 : bus not acquired
217 * 1 : bus acquired
218 */
219static int pca9541_arbitrate(struct i2c_client *client)
220{
221 struct pca9541 *data = i2c_get_clientdata(client);
222 int reg;
223
224 reg = pca9541_reg_read(client, PCA9541_CONTROL);
225 if (reg < 0)
226 return reg;
227
228 if (busoff(reg)) {
229 int istat;
230 /*
231 * Bus is off. Request ownership or turn it on unless
232 * other master requested ownership.
233 */
234 istat = pca9541_reg_read(client, PCA9541_ISTAT);
235 if (!(istat & PCA9541_ISTAT_NMYTEST)
236 || time_is_before_eq_jiffies(data->arb_timeout)) {
237 /*
238 * Other master did not request ownership,
239 * or arbitration timeout expired. Take the bus.
240 */
241 pca9541_reg_write(client,
242 PCA9541_CONTROL,
243 pca9541_control[reg & 0x0f]
244 | PCA9541_CTL_NTESTON);
245 data->select_timeout = SELECT_DELAY_SHORT;
246 } else {
247 /*
248 * Other master requested ownership.
249 * Set extra long timeout to give it time to acquire it.
250 */
251 data->select_timeout = SELECT_DELAY_LONG * 2;
252 }
253 } else if (mybus(reg)) {
254 /*
255 * Bus is on, and we own it. We are done with acquisition.
256 * Reset NTESTON and BUSINIT, then return success.
257 */
258 if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
259 pca9541_reg_write(client,
260 PCA9541_CONTROL,
261 reg & ~(PCA9541_CTL_NTESTON
262 | PCA9541_CTL_BUSINIT));
263 return 1;
264 } else {
265 /*
266 * Other master owns the bus.
267 * If arbitration timeout has expired, force ownership.
268 * Otherwise request it.
269 */
270 data->select_timeout = SELECT_DELAY_LONG;
271 if (time_is_before_eq_jiffies(data->arb_timeout)) {
272 /* Time is up, take the bus and reset it. */
273 pca9541_reg_write(client,
274 PCA9541_CONTROL,
275 pca9541_control[reg & 0x0f]
276 | PCA9541_CTL_BUSINIT
277 | PCA9541_CTL_NTESTON);
278 } else {
279 /* Request bus ownership if needed */
280 if (!(reg & PCA9541_CTL_NTESTON))
281 pca9541_reg_write(client,
282 PCA9541_CONTROL,
283 reg | PCA9541_CTL_NTESTON);
284 }
285 }
286 return 0;
287}
288
289static int pca9541_select_chan(struct i2c_adapter *adap, void *client, u32 chan)
290{
291 struct pca9541 *data = i2c_get_clientdata(client);
292 int ret;
293 unsigned long timeout = jiffies + ARB2_TIMEOUT;
294 /* give up after this time */
295
296 data->arb_timeout = jiffies + ARB_TIMEOUT;
297 /* force bus ownership after this time */
298
299 do {
300 ret = pca9541_arbitrate(client);
301 if (ret)
302 return ret < 0 ? ret : 0;
303
304 if (data->select_timeout == SELECT_DELAY_SHORT)
305 udelay(data->select_timeout);
306 else
307 msleep(data->select_timeout / 1000);
308 } while (time_is_after_eq_jiffies(timeout));
309
310 return -ETIMEDOUT;
311}
312
313static int pca9541_release_chan(struct i2c_adapter *adap,
314 void *client, u32 chan)
315{
316 pca9541_release_bus(client);
317 return 0;
318}
319
320/*
321 * I2C init/probing/exit functions
322 */
323static int pca9541_probe(struct i2c_client *client,
324 const struct i2c_device_id *id)
325{
326 struct i2c_adapter *adap = client->adapter;
327 struct pca954x_platform_data *pdata = client->dev.platform_data;
328 struct pca9541 *data;
329 int force;
330 int ret = -ENODEV;
331
332 if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
333 goto err;
334
335 data = kzalloc(sizeof(struct pca9541), GFP_KERNEL);
336 if (!data) {
337 ret = -ENOMEM;
338 goto err;
339 }
340
341 i2c_set_clientdata(client, data);
342
343 /*
344 * I2C accesses are unprotected here.
345 * We have to lock the adapter before releasing the bus.
346 */
347 i2c_lock_adapter(adap);
348 pca9541_release_bus(client);
349 i2c_unlock_adapter(adap);
350
351 /* Create mux adapter */
352
353 force = 0;
354 if (pdata)
355 force = pdata->modes[0].adap_id;
356 data->mux_adap = i2c_add_mux_adapter(adap, client, force, 0,
357 pca9541_select_chan,
358 pca9541_release_chan);
359
360 if (data->mux_adap == NULL) {
361 dev_err(&client->dev, "failed to register master selector\n");
362 goto exit_free;
363 }
364
365 dev_info(&client->dev, "registered master selector for I2C %s\n",
366 client->name);
367
368 return 0;
369
370exit_free:
371 kfree(data);
372err:
373 return ret;
374}
375
376static int pca9541_remove(struct i2c_client *client)
377{
378 struct pca9541 *data = i2c_get_clientdata(client);
379
380 i2c_del_mux_adapter(data->mux_adap);
381
382 kfree(data);
383 return 0;
384}
385
386static struct i2c_driver pca9541_driver = {
387 .driver = {
388 .name = "pca9541",
389 .owner = THIS_MODULE,
390 },
391 .probe = pca9541_probe,
392 .remove = pca9541_remove,
393 .id_table = pca9541_id,
394};
395
396static int __init pca9541_init(void)
397{
398 return i2c_add_driver(&pca9541_driver);
399}
400
401static void __exit pca9541_exit(void)
402{
403 i2c_del_driver(&pca9541_driver);
404}
405
406module_init(pca9541_init);
407module_exit(pca9541_exit);
408
409MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
410MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
411MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c
index 6f9accf3189d..6f8953664636 100644
--- a/drivers/i2c/muxes/pca954x.c
+++ b/drivers/i2c/muxes/pca954x.c
@@ -181,8 +181,8 @@ static int pca954x_deselect_mux(struct i2c_adapter *adap,
181/* 181/*
182 * I2C init/probing/exit functions 182 * I2C init/probing/exit functions
183 */ 183 */
184static int __devinit pca954x_probe(struct i2c_client *client, 184static int pca954x_probe(struct i2c_client *client,
185 const struct i2c_device_id *id) 185 const struct i2c_device_id *id)
186{ 186{
187 struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); 187 struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
188 struct pca954x_platform_data *pdata = client->dev.platform_data; 188 struct pca954x_platform_data *pdata = client->dev.platform_data;
@@ -201,10 +201,11 @@ static int __devinit pca954x_probe(struct i2c_client *client,
201 201
202 i2c_set_clientdata(client, data); 202 i2c_set_clientdata(client, data);
203 203
204 /* Read the mux register at addr to verify 204 /* Write the mux register at addr to verify
205 * that the mux is in fact present. 205 * that the mux is in fact present. This also
206 * initializes the mux to disconnected state.
206 */ 207 */
207 if (i2c_smbus_read_byte(client) < 0) { 208 if (i2c_smbus_write_byte(client, 0) < 0) {
208 dev_warn(&client->dev, "probe failed\n"); 209 dev_warn(&client->dev, "probe failed\n");
209 goto exit_free; 210 goto exit_free;
210 } 211 }
@@ -255,7 +256,7 @@ err:
255 return ret; 256 return ret;
256} 257}
257 258
258static int __devexit pca954x_remove(struct i2c_client *client) 259static int pca954x_remove(struct i2c_client *client)
259{ 260{
260 struct pca954x *data = i2c_get_clientdata(client); 261 struct pca954x *data = i2c_get_clientdata(client);
261 const struct chip_desc *chip = &chips[data->type]; 262 const struct chip_desc *chip = &chips[data->type];
@@ -279,7 +280,7 @@ static struct i2c_driver pca954x_driver = {
279 .owner = THIS_MODULE, 280 .owner = THIS_MODULE,
280 }, 281 },
281 .probe = pca954x_probe, 282 .probe = pca954x_probe,
282 .remove = __devexit_p(pca954x_remove), 283 .remove = pca954x_remove,
283 .id_table = pca954x_id, 284 .id_table = pca954x_id,
284}; 285};
285 286
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-17 21:00:33 -0400