aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/i2c/busses/i2c-pxa.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/i2c/busses/i2c-pxa.c')
-rw-r--r--drivers/i2c/busses/i2c-pxa.c116
1 files changed, 89 insertions, 27 deletions
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index c94e51b2651e..f59224a5c761 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -22,7 +22,6 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/i2c.h> 24#include <linux/i2c.h>
25#include <linux/i2c-id.h>
26#include <linux/init.h> 25#include <linux/init.h>
27#include <linux/time.h> 26#include <linux/time.h>
28#include <linux/sched.h> 27#include <linux/sched.h>
@@ -30,38 +29,75 @@
30#include <linux/errno.h> 29#include <linux/errno.h>
31#include <linux/interrupt.h> 30#include <linux/interrupt.h>
32#include <linux/i2c-pxa.h> 31#include <linux/i2c-pxa.h>
32#include <linux/of_i2c.h>
33#include <linux/platform_device.h> 33#include <linux/platform_device.h>
34#include <linux/err.h> 34#include <linux/err.h>
35#include <linux/clk.h> 35#include <linux/clk.h>
36#include <linux/slab.h> 36#include <linux/slab.h>
37#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/i2c/pxa-i2c.h>
38 39
39#include <asm/irq.h> 40#include <asm/irq.h>
40#include <plat/i2c.h> 41
42#ifndef CONFIG_HAVE_CLK
43#define clk_get(dev, id) NULL
44#define clk_put(clk) do { } while (0)
45#define clk_disable(clk) do { } while (0)
46#define clk_enable(clk) do { } while (0)
47#endif
48
49struct pxa_reg_layout {
50 u32 ibmr;
51 u32 idbr;
52 u32 icr;
53 u32 isr;
54 u32 isar;
55};
56
57enum pxa_i2c_types {
58 REGS_PXA2XX,
59 REGS_PXA3XX,
60 REGS_CE4100,
61};
41 62
42/* 63/*
43 * I2C register offsets will be shifted 0 or 1 bit left, depending on 64 * I2C registers definitions
44 * different SoCs
45 */ 65 */
46#define REG_SHIFT_0 (0 << 0) 66static struct pxa_reg_layout pxa_reg_layout[] = {
47#define REG_SHIFT_1 (1 << 0) 67 [REGS_PXA2XX] = {
48#define REG_SHIFT(d) ((d) & 0x1) 68 .ibmr = 0x00,
69 .idbr = 0x08,
70 .icr = 0x10,
71 .isr = 0x18,
72 .isar = 0x20,
73 },
74 [REGS_PXA3XX] = {
75 .ibmr = 0x00,
76 .idbr = 0x04,
77 .icr = 0x08,
78 .isr = 0x0c,
79 .isar = 0x10,
80 },
81 [REGS_CE4100] = {
82 .ibmr = 0x14,
83 .idbr = 0x0c,
84 .icr = 0x00,
85 .isr = 0x04,
86 /* no isar register */
87 },
88};
49 89
50static const struct platform_device_id i2c_pxa_id_table[] = { 90static const struct platform_device_id i2c_pxa_id_table[] = {
51 { "pxa2xx-i2c", REG_SHIFT_1 }, 91 { "pxa2xx-i2c", REGS_PXA2XX },
52 { "pxa3xx-pwri2c", REG_SHIFT_0 }, 92 { "pxa3xx-pwri2c", REGS_PXA3XX },
93 { "ce4100-i2c", REGS_CE4100 },
53 { }, 94 { },
54}; 95};
55MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); 96MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
56 97
57/* 98/*
58 * I2C registers and bit definitions 99 * I2C bit definitions
59 */ 100 */
60#define IBMR (0x00)
61#define IDBR (0x08)
62#define ICR (0x10)
63#define ISR (0x18)
64#define ISAR (0x20)
65 101
66#define ICR_START (1 << 0) /* start bit */ 102#define ICR_START (1 << 0) /* start bit */
67#define ICR_STOP (1 << 1) /* stop bit */ 103#define ICR_STOP (1 << 1) /* stop bit */
@@ -112,7 +148,11 @@ struct pxa_i2c {
112 u32 icrlog[32]; 148 u32 icrlog[32];
113 149
114 void __iomem *reg_base; 150 void __iomem *reg_base;
115 unsigned int reg_shift; 151 void __iomem *reg_ibmr;
152 void __iomem *reg_idbr;
153 void __iomem *reg_icr;
154 void __iomem *reg_isr;
155 void __iomem *reg_isar;
116 156
117 unsigned long iobase; 157 unsigned long iobase;
118 unsigned long iosize; 158 unsigned long iosize;
@@ -122,11 +162,11 @@ struct pxa_i2c {
122 unsigned int fast_mode :1; 162 unsigned int fast_mode :1;
123}; 163};
124 164
125#define _IBMR(i2c) ((i2c)->reg_base + (0x0 << (i2c)->reg_shift)) 165#define _IBMR(i2c) ((i2c)->reg_ibmr)
126#define _IDBR(i2c) ((i2c)->reg_base + (0x4 << (i2c)->reg_shift)) 166#define _IDBR(i2c) ((i2c)->reg_idbr)
127#define _ICR(i2c) ((i2c)->reg_base + (0x8 << (i2c)->reg_shift)) 167#define _ICR(i2c) ((i2c)->reg_icr)
128#define _ISR(i2c) ((i2c)->reg_base + (0xc << (i2c)->reg_shift)) 168#define _ISR(i2c) ((i2c)->reg_isr)
129#define _ISAR(i2c) ((i2c)->reg_base + (0x10 << (i2c)->reg_shift)) 169#define _ISAR(i2c) ((i2c)->reg_isar)
130 170
131/* 171/*
132 * I2C Slave mode address 172 * I2C Slave mode address
@@ -419,7 +459,8 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
419 writel(I2C_ISR_INIT, _ISR(i2c)); 459 writel(I2C_ISR_INIT, _ISR(i2c));
420 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c)); 460 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
421 461
422 writel(i2c->slave_addr, _ISAR(i2c)); 462 if (i2c->reg_isar)
463 writel(i2c->slave_addr, _ISAR(i2c));
423 464
424 /* set control register values */ 465 /* set control register values */
425 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c)); 466 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c));
@@ -730,8 +771,10 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
730 */ 771 */
731 ret = i2c->msg_idx; 772 ret = i2c->msg_idx;
732 773
733 if (timeout == 0) 774 if (!timeout && i2c->msg_num) {
734 i2c_pxa_scream_blue_murder(i2c, "timeout"); 775 i2c_pxa_scream_blue_murder(i2c, "timeout");
776 ret = I2C_RETRY;
777 }
735 778
736 out: 779 out:
737 return ret; 780 return ret;
@@ -916,11 +959,16 @@ static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
916 writel(icr, _ICR(i2c)); 959 writel(icr, _ICR(i2c));
917} 960}
918 961
962#define VALID_INT_SOURCE (ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF | \
963 ISR_SAD | ISR_BED)
919static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id) 964static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
920{ 965{
921 struct pxa_i2c *i2c = dev_id; 966 struct pxa_i2c *i2c = dev_id;
922 u32 isr = readl(_ISR(i2c)); 967 u32 isr = readl(_ISR(i2c));
923 968
969 if (!(isr & VALID_INT_SOURCE))
970 return IRQ_NONE;
971
924 if (i2c_debug > 2 && 0) { 972 if (i2c_debug > 2 && 0) {
925 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", 973 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
926 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c))); 974 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
@@ -935,7 +983,7 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
935 /* 983 /*
936 * Always clear all pending IRQs. 984 * Always clear all pending IRQs.
937 */ 985 */
938 writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c)); 986 writel(isr & VALID_INT_SOURCE, _ISR(i2c));
939 987
940 if (isr & ISR_SAD) 988 if (isr & ISR_SAD)
941 i2c_pxa_slave_start(i2c, isr); 989 i2c_pxa_slave_start(i2c, isr);
@@ -1002,6 +1050,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1002 struct resource *res; 1050 struct resource *res;
1003 struct i2c_pxa_platform_data *plat = dev->dev.platform_data; 1051 struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
1004 const struct platform_device_id *id = platform_get_device_id(dev); 1052 const struct platform_device_id *id = platform_get_device_id(dev);
1053 enum pxa_i2c_types i2c_type = id->driver_data;
1005 int ret; 1054 int ret;
1006 int irq; 1055 int irq;
1007 1056
@@ -1045,7 +1094,13 @@ static int i2c_pxa_probe(struct platform_device *dev)
1045 ret = -EIO; 1094 ret = -EIO;
1046 goto eremap; 1095 goto eremap;
1047 } 1096 }
1048 i2c->reg_shift = REG_SHIFT(id->driver_data); 1097
1098 i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr;
1099 i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
1100 i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
1101 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
1102 if (i2c_type != REGS_CE4100)
1103 i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
1049 1104
1050 i2c->iobase = res->start; 1105 i2c->iobase = res->start;
1051 i2c->iosize = resource_size(res); 1106 i2c->iosize = resource_size(res);
@@ -1073,7 +1128,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1073 i2c->adap.algo = &i2c_pxa_pio_algorithm; 1128 i2c->adap.algo = &i2c_pxa_pio_algorithm;
1074 } else { 1129 } else {
1075 i2c->adap.algo = &i2c_pxa_algorithm; 1130 i2c->adap.algo = &i2c_pxa_algorithm;
1076 ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED, 1131 ret = request_irq(irq, i2c_pxa_handler, IRQF_SHARED,
1077 i2c->adap.name, i2c); 1132 i2c->adap.name, i2c);
1078 if (ret) 1133 if (ret)
1079 goto ereqirq; 1134 goto ereqirq;
@@ -1083,12 +1138,19 @@ static int i2c_pxa_probe(struct platform_device *dev)
1083 1138
1084 i2c->adap.algo_data = i2c; 1139 i2c->adap.algo_data = i2c;
1085 i2c->adap.dev.parent = &dev->dev; 1140 i2c->adap.dev.parent = &dev->dev;
1141#ifdef CONFIG_OF
1142 i2c->adap.dev.of_node = dev->dev.of_node;
1143#endif
1086 1144
1087 ret = i2c_add_numbered_adapter(&i2c->adap); 1145 if (i2c_type == REGS_CE4100)
1146 ret = i2c_add_adapter(&i2c->adap);
1147 else
1148 ret = i2c_add_numbered_adapter(&i2c->adap);
1088 if (ret < 0) { 1149 if (ret < 0) {
1089 printk(KERN_INFO "I2C: Failed to add bus\n"); 1150 printk(KERN_INFO "I2C: Failed to add bus\n");
1090 goto eadapt; 1151 goto eadapt;
1091 } 1152 }
1153 of_i2c_register_devices(&i2c->adap);
1092 1154
1093 platform_set_drvdata(dev, i2c); 1155 platform_set_drvdata(dev, i2c);
1094 1156