diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-11-26 11:22:09 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-11-29 06:25:06 -0500 |
commit | 1974cad0ee4ce84e5cb792e49c4f0d9421e0312c (patch) | |
tree | 19c853856eea3c9dee13e9462f9e4079279ed083 /drivers/gpu | |
parent | a210b028f07690c127733addbbe137e8f4cad30c (diff) |
drm/i915: move is_dual_link_lvds to intel_lvds.c
Just a prep patch to make this a property of intel_lvds. Makes more
sense, removes clutter from intel_display.c and eventually I want to
move all the encoder special cases wrt clock handling to encoders
anyway.
v2: Add an intel_ prefixe to is_dual_link_lvds since it's non-static
now.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 60 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 53 |
3 files changed, 59 insertions, 55 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index be19b6d1ca52..2705da329ddf 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -472,61 +472,14 @@ static void vlv_init_dpio(struct drm_device *dev) | |||
472 | POSTING_READ(DPIO_CTL); | 472 | POSTING_READ(DPIO_CTL); |
473 | } | 473 | } |
474 | 474 | ||
475 | static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) | ||
476 | { | ||
477 | DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); | ||
478 | return 1; | ||
479 | } | ||
480 | |||
481 | static const struct dmi_system_id intel_dual_link_lvds[] = { | ||
482 | { | ||
483 | .callback = intel_dual_link_lvds_callback, | ||
484 | .ident = "Apple MacBook Pro (Core i5/i7 Series)", | ||
485 | .matches = { | ||
486 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | ||
487 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), | ||
488 | }, | ||
489 | }, | ||
490 | { } /* terminating entry */ | ||
491 | }; | ||
492 | |||
493 | static bool is_dual_link_lvds(struct drm_i915_private *dev_priv, | ||
494 | unsigned int reg) | ||
495 | { | ||
496 | unsigned int val; | ||
497 | |||
498 | /* use the module option value if specified */ | ||
499 | if (i915_lvds_channel_mode > 0) | ||
500 | return i915_lvds_channel_mode == 2; | ||
501 | |||
502 | if (dmi_check_system(intel_dual_link_lvds)) | ||
503 | return true; | ||
504 | |||
505 | if (dev_priv->lvds_val) | ||
506 | val = dev_priv->lvds_val; | ||
507 | else { | ||
508 | /* BIOS should set the proper LVDS register value at boot, but | ||
509 | * in reality, it doesn't set the value when the lid is closed; | ||
510 | * we need to check "the value to be set" in VBT when LVDS | ||
511 | * register is uninitialized. | ||
512 | */ | ||
513 | val = I915_READ(reg); | ||
514 | if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) | ||
515 | val = dev_priv->bios_lvds_val; | ||
516 | dev_priv->lvds_val = val; | ||
517 | } | ||
518 | return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP; | ||
519 | } | ||
520 | |||
521 | static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc, | 475 | static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc, |
522 | int refclk) | 476 | int refclk) |
523 | { | 477 | { |
524 | struct drm_device *dev = crtc->dev; | 478 | struct drm_device *dev = crtc->dev; |
525 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
526 | const intel_limit_t *limit; | 479 | const intel_limit_t *limit; |
527 | 480 | ||
528 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { | 481 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { |
529 | if (is_dual_link_lvds(dev_priv, PCH_LVDS)) { | 482 | if (intel_is_dual_link_lvds(dev)) { |
530 | /* LVDS dual channel */ | 483 | /* LVDS dual channel */ |
531 | if (refclk == 100000) | 484 | if (refclk == 100000) |
532 | limit = &intel_limits_ironlake_dual_lvds_100m; | 485 | limit = &intel_limits_ironlake_dual_lvds_100m; |
@@ -550,11 +503,10 @@ static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc, | |||
550 | static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc) | 503 | static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc) |
551 | { | 504 | { |
552 | struct drm_device *dev = crtc->dev; | 505 | struct drm_device *dev = crtc->dev; |
553 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
554 | const intel_limit_t *limit; | 506 | const intel_limit_t *limit; |
555 | 507 | ||
556 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { | 508 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { |
557 | if (is_dual_link_lvds(dev_priv, LVDS)) | 509 | if (intel_is_dual_link_lvds(dev)) |
558 | /* LVDS with dual channel */ | 510 | /* LVDS with dual channel */ |
559 | limit = &intel_limits_g4x_dual_channel_lvds; | 511 | limit = &intel_limits_g4x_dual_channel_lvds; |
560 | else | 512 | else |
@@ -686,7 +638,6 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, | |||
686 | 638 | ||
687 | { | 639 | { |
688 | struct drm_device *dev = crtc->dev; | 640 | struct drm_device *dev = crtc->dev; |
689 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
690 | intel_clock_t clock; | 641 | intel_clock_t clock; |
691 | int err = target; | 642 | int err = target; |
692 | 643 | ||
@@ -696,7 +647,7 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, | |||
696 | * We haven't figured out how to reliably set up different | 647 | * We haven't figured out how to reliably set up different |
697 | * single/dual channel state, if we even can. | 648 | * single/dual channel state, if we even can. |
698 | */ | 649 | */ |
699 | if (is_dual_link_lvds(dev_priv, LVDS)) | 650 | if (intel_is_dual_link_lvds(dev)) |
700 | clock.p2 = limit->p2.p2_fast; | 651 | clock.p2 = limit->p2.p2_fast; |
701 | else | 652 | else |
702 | clock.p2 = limit->p2.p2_slow; | 653 | clock.p2 = limit->p2.p2_slow; |
@@ -749,7 +700,6 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, | |||
749 | intel_clock_t *best_clock) | 700 | intel_clock_t *best_clock) |
750 | { | 701 | { |
751 | struct drm_device *dev = crtc->dev; | 702 | struct drm_device *dev = crtc->dev; |
752 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
753 | intel_clock_t clock; | 703 | intel_clock_t clock; |
754 | int max_n; | 704 | int max_n; |
755 | bool found; | 705 | bool found; |
@@ -764,7 +714,7 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, | |||
764 | lvds_reg = PCH_LVDS; | 714 | lvds_reg = PCH_LVDS; |
765 | else | 715 | else |
766 | lvds_reg = LVDS; | 716 | lvds_reg = LVDS; |
767 | if (is_dual_link_lvds(dev_priv, lvds_reg)) | 717 | if (intel_is_dual_link_lvds(dev)) |
768 | clock.p2 = limit->p2.p2_fast; | 718 | clock.p2 = limit->p2.p2_fast; |
769 | else | 719 | else |
770 | clock.p2 = limit->p2.p2_slow; | 720 | clock.p2 = limit->p2.p2_slow; |
@@ -5356,7 +5306,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc, | |||
5356 | if (is_lvds) { | 5306 | if (is_lvds) { |
5357 | if ((intel_panel_use_ssc(dev_priv) && | 5307 | if ((intel_panel_use_ssc(dev_priv) && |
5358 | dev_priv->lvds_ssc_freq == 100) || | 5308 | dev_priv->lvds_ssc_freq == 100) || |
5359 | is_dual_link_lvds(dev_priv, PCH_LVDS)) | 5309 | intel_is_dual_link_lvds(dev)) |
5360 | factor = 25; | 5310 | factor = 25; |
5361 | } else if (is_sdvo && is_tv) | 5311 | } else if (is_sdvo && is_tv) |
5362 | factor = 20; | 5312 | factor = 20; |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index a74c572f1d5e..7ca7772eaccd 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -441,6 +441,7 @@ extern void intel_mark_idle(struct drm_device *dev); | |||
441 | extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj); | 441 | extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj); |
442 | extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj); | 442 | extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj); |
443 | extern bool intel_lvds_init(struct drm_device *dev); | 443 | extern bool intel_lvds_init(struct drm_device *dev); |
444 | extern bool intel_is_dual_link_lvds(struct drm_device *dev); | ||
444 | extern void intel_dp_init(struct drm_device *dev, int output_reg, | 445 | extern void intel_dp_init(struct drm_device *dev, int output_reg, |
445 | enum port port); | 446 | enum port port); |
446 | extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port, | 447 | extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port, |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index b9a660a53677..4158a8839433 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -903,6 +903,59 @@ static bool lvds_is_present_in_vbt(struct drm_device *dev, | |||
903 | return false; | 903 | return false; |
904 | } | 904 | } |
905 | 905 | ||
906 | static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) | ||
907 | { | ||
908 | DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); | ||
909 | return 1; | ||
910 | } | ||
911 | |||
912 | static const struct dmi_system_id intel_dual_link_lvds[] = { | ||
913 | { | ||
914 | .callback = intel_dual_link_lvds_callback, | ||
915 | .ident = "Apple MacBook Pro (Core i5/i7 Series)", | ||
916 | .matches = { | ||
917 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | ||
918 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), | ||
919 | }, | ||
920 | }, | ||
921 | { } /* terminating entry */ | ||
922 | }; | ||
923 | |||
924 | bool intel_is_dual_link_lvds(struct drm_device *dev) | ||
925 | { | ||
926 | unsigned int val; | ||
927 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
928 | u32 lvds_reg; | ||
929 | |||
930 | if (HAS_PCH_SPLIT(dev)) { | ||
931 | lvds_reg = PCH_LVDS; | ||
932 | } else { | ||
933 | lvds_reg = LVDS; | ||
934 | } | ||
935 | |||
936 | /* use the module option value if specified */ | ||
937 | if (i915_lvds_channel_mode > 0) | ||
938 | return i915_lvds_channel_mode == 2; | ||
939 | |||
940 | if (dmi_check_system(intel_dual_link_lvds)) | ||
941 | return true; | ||
942 | |||
943 | if (dev_priv->lvds_val) | ||
944 | val = dev_priv->lvds_val; | ||
945 | else { | ||
946 | /* BIOS should set the proper LVDS register value at boot, but | ||
947 | * in reality, it doesn't set the value when the lid is closed; | ||
948 | * we need to check "the value to be set" in VBT when LVDS | ||
949 | * register is uninitialized. | ||
950 | */ | ||
951 | val = I915_READ(lvds_reg); | ||
952 | if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) | ||
953 | val = dev_priv->bios_lvds_val; | ||
954 | dev_priv->lvds_val = val; | ||
955 | } | ||
956 | return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP; | ||
957 | } | ||
958 | |||
906 | static bool intel_lvds_supported(struct drm_device *dev) | 959 | static bool intel_lvds_supported(struct drm_device *dev) |
907 | { | 960 | { |
908 | /* With the introduction of the PCH we gained a dedicated | 961 | /* With the introduction of the PCH we gained a dedicated |