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authorJani Nikula <jani.nikula@intel.com>2012-12-04 09:36:28 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-12-04 16:30:25 -0500
commitbfd7590d3eed3650e910a22a92dc23ea50e60a41 (patch)
tree181e4a24af76a22264a9cf017657b190a9cf2cb1 /drivers/gpu/drm/r128/r128_ioc32.c
parent633cf8f5056c3e72158e4dbc387b3d65926d2d55 (diff)
drm/i915: do not access BLC_PWM_CTL2 on pre-gen4 hardware
The BLC_PWM_CTL2 register does not exist before gen4. While at it, do a slight drive by cleanup of the code. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/r128/r128_ioc32.c')
0 files changed, 0 insertions, 0 deletions