diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2013-07-03 22:54:28 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2013-07-04 23:44:03 -0400 |
commit | 0085a60524aeb743c15bbdf7354f4e4f6623243e (patch) | |
tree | 7a3f118ede21054b02bc3460bc33da4f6536e18e /drivers/gpu/drm/nouveau | |
parent | 18ac4246510bee85d2efd6ed536b436e246f7624 (diff) |
drm/nvf0/gr: fix ddx shaders locking up on me
This can be generalised and used on GK104 (probably even GF117), but lets
just make it work for now.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c | 54 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h | 1 |
3 files changed, 54 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c index 51fb2687b570..261a600c8ffb 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c | |||
@@ -804,7 +804,7 @@ nve4_grctx_init_unk[] = { | |||
804 | {} | 804 | {} |
805 | }; | 805 | }; |
806 | 806 | ||
807 | void | 807 | static void |
808 | nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | 808 | nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) |
809 | { | 809 | { |
810 | u32 magic[GPC_MAX][2]; | 810 | u32 magic[GPC_MAX][2]; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c index c41a6f07e958..c1bacc3d7374 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c | |||
@@ -221,6 +221,58 @@ nvf0_grctx_init_unk[] = { | |||
221 | {} | 221 | {} |
222 | }; | 222 | }; |
223 | 223 | ||
224 | static void | ||
225 | nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | ||
226 | { | ||
227 | u32 magic[GPC_MAX][4]; | ||
228 | u32 offset; | ||
229 | int gpc; | ||
230 | |||
231 | mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS); | ||
232 | mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS); | ||
233 | mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW); | ||
234 | mmio_list(0x40800c, 0x00000000, 8, 1); | ||
235 | mmio_list(0x408010, 0x80000000, 0, 0); | ||
236 | mmio_list(0x419004, 0x00000000, 8, 1); | ||
237 | mmio_list(0x419008, 0x00000000, 0, 0); | ||
238 | mmio_list(0x4064cc, 0x80000000, 0, 0); | ||
239 | mmio_list(0x408004, 0x00000000, 8, 0); | ||
240 | mmio_list(0x408008, 0x80000030, 0, 0); | ||
241 | mmio_list(0x418808, 0x00000000, 8, 0); | ||
242 | mmio_list(0x41880c, 0x80000030, 0, 0); | ||
243 | mmio_list(0x4064c8, 0x01800600, 0, 0); | ||
244 | mmio_list(0x418810, 0x80000000, 12, 2); | ||
245 | mmio_list(0x419848, 0x10000000, 12, 2); | ||
246 | |||
247 | mmio_list(0x405830, 0x02180648, 0, 0); | ||
248 | mmio_list(0x4064c4, 0x0192ffff, 0, 0); | ||
249 | |||
250 | for (gpc = 0, offset = 0; gpc < priv->gpc_nr; gpc++) { | ||
251 | u16 magic0 = 0x0218 * (priv->tpc_nr[gpc] - 1); | ||
252 | u16 magic1 = 0x0648 * (priv->tpc_nr[gpc] - 1); | ||
253 | u16 magic2 = 0x0218; | ||
254 | u16 magic3 = 0x0648; | ||
255 | magic[gpc][0] = 0x10000000 | (magic0 << 16) | offset; | ||
256 | magic[gpc][1] = 0x00000000 | (magic1 << 16); | ||
257 | offset += 0x0324 * (priv->tpc_nr[gpc] - 1);; | ||
258 | magic[gpc][2] = 0x10000000 | (magic2 << 16) | offset; | ||
259 | magic[gpc][3] = 0x00000000 | (magic3 << 16); | ||
260 | offset += 0x0324; | ||
261 | } | ||
262 | |||
263 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { | ||
264 | mmio_list(GPC_UNIT(gpc, 0x30c0), magic[gpc][0], 0, 0); | ||
265 | mmio_list(GPC_UNIT(gpc, 0x30e4), magic[gpc][1] | offset, 0, 0); | ||
266 | offset += 0x07ff * (priv->tpc_nr[gpc] - 1); | ||
267 | mmio_list(GPC_UNIT(gpc, 0x32c0), magic[gpc][2], 0, 0); | ||
268 | mmio_list(GPC_UNIT(gpc, 0x32e4), magic[gpc][3] | offset, 0, 0); | ||
269 | offset += 0x07ff; | ||
270 | } | ||
271 | |||
272 | mmio_list(0x17e91c, 0x06060609, 0, 0); | ||
273 | mmio_list(0x17e920, 0x00090a05, 0, 0); | ||
274 | } | ||
275 | |||
224 | static struct nvc0_graph_init * | 276 | static struct nvc0_graph_init * |
225 | nvf0_grctx_init_hub[] = { | 277 | nvf0_grctx_init_hub[] = { |
226 | nvc0_grctx_init_base, | 278 | nvc0_grctx_init_base, |
@@ -267,7 +319,7 @@ nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
267 | .wr32 = _nouveau_graph_context_wr32, | 319 | .wr32 = _nouveau_graph_context_wr32, |
268 | }, | 320 | }, |
269 | .main = nve4_grctx_generate_main, | 321 | .main = nve4_grctx_generate_main, |
270 | .mods = nve4_grctx_generate_mods, | 322 | .mods = nvf0_grctx_generate_mods, |
271 | .hub = nvf0_grctx_init_hub, | 323 | .hub = nvf0_grctx_init_hub, |
272 | .gpc = nvf0_grctx_init_gpc, | 324 | .gpc = nvf0_grctx_init_gpc, |
273 | .icmd = nvc0_grctx_init_icmd, | 325 | .icmd = nvc0_grctx_init_icmd, |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h index 0180f05f40c3..dd06674336b4 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h | |||
@@ -254,7 +254,6 @@ extern struct nvc0_graph_init nvd9_grctx_init_rop[]; | |||
254 | extern struct nvc0_graph_mthd nvd9_grctx_init_mthd[]; | 254 | extern struct nvc0_graph_mthd nvd9_grctx_init_mthd[]; |
255 | 255 | ||
256 | void nve4_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *); | 256 | void nve4_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *); |
257 | void nve4_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *); | ||
258 | extern struct nouveau_oclass *nve4_grctx_oclass; | 257 | extern struct nouveau_oclass *nve4_grctx_oclass; |
259 | extern struct nvc0_graph_init nve4_grctx_init_unk46xx[]; | 258 | extern struct nvc0_graph_init nve4_grctx_init_unk46xx[]; |
260 | extern struct nvc0_graph_init nve4_grctx_init_unk47xx[]; | 259 | extern struct nvc0_graph_init nve4_grctx_init_unk47xx[]; |