diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2012-07-18 20:51:42 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2012-10-02 23:12:54 -0400 |
commit | e193b1d42c390bf1bff7fa02a5a1202b98e75601 (patch) | |
tree | c31143ea95c00e8b49c12571b10a1b9a200bd490 /drivers/gpu/drm/nouveau/nvc0_fence.c | |
parent | 66f247234d1c47da480f687b8104d8935d05b404 (diff) |
drm/nouveau/fence: un-port from nouveau_exec_engine interfaces
Still the same code, but not an "engine" anymore. The fence code is more of
a policy decision rather than exposing mechanisms, so it's not appropriate
to port it to the new engine subsystem.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvc0_fence.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_fence.c | 70 |
1 files changed, 35 insertions, 35 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c index 79bb31ed6c8b..d53ae32caea3 100644 --- a/drivers/gpu/drm/nouveau/nvc0_fence.c +++ b/drivers/gpu/drm/nouveau/nvc0_fence.c | |||
@@ -44,7 +44,7 @@ static int | |||
44 | nvc0_fence_emit(struct nouveau_fence *fence) | 44 | nvc0_fence_emit(struct nouveau_fence *fence) |
45 | { | 45 | { |
46 | struct nouveau_channel *chan = fence->channel; | 46 | struct nouveau_channel *chan = fence->channel; |
47 | struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; | 47 | struct nvc0_fence_chan *fctx = chan->fence; |
48 | u64 addr = fctx->vma.offset + chan->id * 16; | 48 | u64 addr = fctx->vma.offset + chan->id * 16; |
49 | int ret; | 49 | int ret; |
50 | 50 | ||
@@ -65,7 +65,7 @@ static int | |||
65 | nvc0_fence_sync(struct nouveau_fence *fence, | 65 | nvc0_fence_sync(struct nouveau_fence *fence, |
66 | struct nouveau_channel *prev, struct nouveau_channel *chan) | 66 | struct nouveau_channel *prev, struct nouveau_channel *chan) |
67 | { | 67 | { |
68 | struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; | 68 | struct nvc0_fence_chan *fctx = chan->fence; |
69 | u64 addr = fctx->vma.offset + prev->id * 16; | 69 | u64 addr = fctx->vma.offset + prev->id * 16; |
70 | int ret; | 70 | int ret; |
71 | 71 | ||
@@ -86,30 +86,33 @@ nvc0_fence_sync(struct nouveau_fence *fence, | |||
86 | static u32 | 86 | static u32 |
87 | nvc0_fence_read(struct nouveau_channel *chan) | 87 | nvc0_fence_read(struct nouveau_channel *chan) |
88 | { | 88 | { |
89 | struct nvc0_fence_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_FENCE); | 89 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
90 | struct nvc0_fence_priv *priv = dev_priv->fence.func; | ||
90 | return nouveau_bo_rd32(priv->bo, chan->id * 16/4); | 91 | return nouveau_bo_rd32(priv->bo, chan->id * 16/4); |
91 | } | 92 | } |
92 | 93 | ||
93 | static void | 94 | static void |
94 | nvc0_fence_context_del(struct nouveau_channel *chan, int engine) | 95 | nvc0_fence_context_del(struct nouveau_channel *chan) |
95 | { | 96 | { |
96 | struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine); | 97 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
97 | struct nvc0_fence_chan *fctx = chan->engctx[engine]; | 98 | struct nvc0_fence_priv *priv = dev_priv->fence.func; |
99 | struct nvc0_fence_chan *fctx = chan->fence; | ||
98 | 100 | ||
99 | nouveau_bo_vma_del(priv->bo, &fctx->vma); | 101 | nouveau_bo_vma_del(priv->bo, &fctx->vma); |
100 | nouveau_fence_context_del(&fctx->base); | 102 | nouveau_fence_context_del(&fctx->base); |
101 | chan->engctx[engine] = NULL; | 103 | chan->fence = NULL; |
102 | kfree(fctx); | 104 | kfree(fctx); |
103 | } | 105 | } |
104 | 106 | ||
105 | static int | 107 | static int |
106 | nvc0_fence_context_new(struct nouveau_channel *chan, int engine) | 108 | nvc0_fence_context_new(struct nouveau_channel *chan) |
107 | { | 109 | { |
108 | struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine); | 110 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
111 | struct nvc0_fence_priv *priv = dev_priv->fence.func; | ||
109 | struct nvc0_fence_chan *fctx; | 112 | struct nvc0_fence_chan *fctx; |
110 | int ret; | 113 | int ret; |
111 | 114 | ||
112 | fctx = chan->engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL); | 115 | fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL); |
113 | if (!fctx) | 116 | if (!fctx) |
114 | return -ENOMEM; | 117 | return -ENOMEM; |
115 | 118 | ||
@@ -117,36 +120,35 @@ nvc0_fence_context_new(struct nouveau_channel *chan, int engine) | |||
117 | 120 | ||
118 | ret = nouveau_bo_vma_add(priv->bo, chan->vm, &fctx->vma); | 121 | ret = nouveau_bo_vma_add(priv->bo, chan->vm, &fctx->vma); |
119 | if (ret) | 122 | if (ret) |
120 | nvc0_fence_context_del(chan, engine); | 123 | nvc0_fence_context_del(chan); |
121 | 124 | ||
122 | nouveau_bo_wr32(priv->bo, chan->id * 16/4, 0x00000000); | 125 | nouveau_bo_wr32(priv->bo, chan->id * 16/4, 0x00000000); |
123 | return ret; | 126 | return ret; |
124 | } | 127 | } |
125 | 128 | ||
126 | static int | 129 | static bool |
127 | nvc0_fence_fini(struct drm_device *dev, int engine, bool suspend) | 130 | nvc0_fence_suspend(struct drm_device *dev) |
128 | { | 131 | { |
129 | struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); | 132 | struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); |
130 | struct nvc0_fence_priv *priv = nv_engine(dev, engine); | 133 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
134 | struct nvc0_fence_priv *priv = dev_priv->fence.func; | ||
131 | int i; | 135 | int i; |
132 | 136 | ||
133 | if (suspend) { | 137 | priv->suspend = vmalloc(pfifo->channels * sizeof(u32)); |
134 | priv->suspend = vmalloc(pfifo->channels * sizeof(u32)); | 138 | if (priv->suspend) { |
135 | if (!priv->suspend) | ||
136 | return -ENOMEM; | ||
137 | |||
138 | for (i = 0; i < pfifo->channels; i++) | 139 | for (i = 0; i < pfifo->channels; i++) |
139 | priv->suspend[i] = nouveau_bo_rd32(priv->bo, i); | 140 | priv->suspend[i] = nouveau_bo_rd32(priv->bo, i); |
140 | } | 141 | } |
141 | 142 | ||
142 | return 0; | 143 | return priv->suspend != NULL; |
143 | } | 144 | } |
144 | 145 | ||
145 | static int | 146 | static void |
146 | nvc0_fence_init(struct drm_device *dev, int engine) | 147 | nvc0_fence_resume(struct drm_device *dev) |
147 | { | 148 | { |
148 | struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); | 149 | struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); |
149 | struct nvc0_fence_priv *priv = nv_engine(dev, engine); | 150 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
151 | struct nvc0_fence_priv *priv = dev_priv->fence.func; | ||
150 | int i; | 152 | int i; |
151 | 153 | ||
152 | if (priv->suspend) { | 154 | if (priv->suspend) { |
@@ -155,19 +157,17 @@ nvc0_fence_init(struct drm_device *dev, int engine) | |||
155 | vfree(priv->suspend); | 157 | vfree(priv->suspend); |
156 | priv->suspend = NULL; | 158 | priv->suspend = NULL; |
157 | } | 159 | } |
158 | |||
159 | return 0; | ||
160 | } | 160 | } |
161 | 161 | ||
162 | static void | 162 | static void |
163 | nvc0_fence_destroy(struct drm_device *dev, int engine) | 163 | nvc0_fence_destroy(struct drm_device *dev) |
164 | { | 164 | { |
165 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 165 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
166 | struct nvc0_fence_priv *priv = nv_engine(dev, engine); | 166 | struct nvc0_fence_priv *priv = dev_priv->fence.func; |
167 | 167 | ||
168 | nouveau_bo_unmap(priv->bo); | 168 | nouveau_bo_unmap(priv->bo); |
169 | nouveau_bo_ref(NULL, &priv->bo); | 169 | nouveau_bo_ref(NULL, &priv->bo); |
170 | dev_priv->eng[engine] = NULL; | 170 | dev_priv->fence.func = NULL; |
171 | kfree(priv); | 171 | kfree(priv); |
172 | } | 172 | } |
173 | 173 | ||
@@ -183,15 +183,15 @@ nvc0_fence_create(struct drm_device *dev) | |||
183 | if (!priv) | 183 | if (!priv) |
184 | return -ENOMEM; | 184 | return -ENOMEM; |
185 | 185 | ||
186 | priv->base.engine.destroy = nvc0_fence_destroy; | 186 | priv->base.dtor = nvc0_fence_destroy; |
187 | priv->base.engine.init = nvc0_fence_init; | 187 | priv->base.suspend = nvc0_fence_suspend; |
188 | priv->base.engine.fini = nvc0_fence_fini; | 188 | priv->base.resume = nvc0_fence_resume; |
189 | priv->base.engine.context_new = nvc0_fence_context_new; | 189 | priv->base.context_new = nvc0_fence_context_new; |
190 | priv->base.engine.context_del = nvc0_fence_context_del; | 190 | priv->base.context_del = nvc0_fence_context_del; |
191 | priv->base.emit = nvc0_fence_emit; | 191 | priv->base.emit = nvc0_fence_emit; |
192 | priv->base.sync = nvc0_fence_sync; | 192 | priv->base.sync = nvc0_fence_sync; |
193 | priv->base.read = nvc0_fence_read; | 193 | priv->base.read = nvc0_fence_read; |
194 | dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; | 194 | dev_priv->fence.func = priv; |
195 | 195 | ||
196 | ret = nouveau_bo_new(dev, 16 * pfifo->channels, 0, TTM_PL_FLAG_VRAM, | 196 | ret = nouveau_bo_new(dev, 16 * pfifo->channels, 0, TTM_PL_FLAG_VRAM, |
197 | 0, 0, NULL, &priv->bo); | 197 | 0, 0, NULL, &priv->bo); |
@@ -204,6 +204,6 @@ nvc0_fence_create(struct drm_device *dev) | |||
204 | } | 204 | } |
205 | 205 | ||
206 | if (ret) | 206 | if (ret) |
207 | nvc0_fence_destroy(dev, NVOBJ_ENGINE_FENCE); | 207 | nvc0_fence_destroy(dev); |
208 | return ret; | 208 | return ret; |
209 | } | 209 | } |