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authorBen Skeggs <bskeggs@redhat.com>2012-07-18 20:51:42 -0400
committerBen Skeggs <bskeggs@redhat.com>2012-10-02 23:12:54 -0400
commite193b1d42c390bf1bff7fa02a5a1202b98e75601 (patch)
treec31143ea95c00e8b49c12571b10a1b9a200bd490
parent66f247234d1c47da480f687b8104d8935d05b404 (diff)
drm/nouveau/fence: un-port from nouveau_exec_engine interfaces
Still the same code, but not an "engine" anymore. The fence code is more of a policy decision rather than exposing mechanisms, so it's not appropriate to port it to the new engine subsystem. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_channel.c10
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.c11
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.c15
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.h14
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fence.c42
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fence.c48
-rw-r--r--drivers/gpu/drm/nouveau/nv84_fence.c48
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_fence.c70
9 files changed, 124 insertions, 138 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index fd4d9513585e..285fde8ed3e3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -124,9 +124,9 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
124 struct drm_file *file_priv, 124 struct drm_file *file_priv,
125 uint32_t vram_handle, uint32_t gart_handle) 125 uint32_t vram_handle, uint32_t gart_handle)
126{ 126{
127 struct nouveau_exec_engine *fence = nv_engine(dev, NVOBJ_ENGINE_FENCE);
128 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
129 struct drm_nouveau_private *dev_priv = dev->dev_private; 127 struct drm_nouveau_private *dev_priv = dev->dev_private;
128 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
129 struct nouveau_fence_priv *fence = dev_priv->fence.func;
130 struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv); 130 struct nouveau_fpriv *fpriv = nouveau_fpriv(file_priv);
131 struct nouveau_channel *chan; 131 struct nouveau_channel *chan;
132 unsigned long flags; 132 unsigned long flags;
@@ -234,7 +234,7 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
234 234
235 FIRE_RING(chan); 235 FIRE_RING(chan);
236 236
237 ret = fence->context_new(chan, NVOBJ_ENGINE_FENCE); 237 ret = fence->context_new(chan);
238 if (ret) { 238 if (ret) {
239 nouveau_channel_put(&chan); 239 nouveau_channel_put(&chan);
240 return ret; 240 return ret;
@@ -289,6 +289,7 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
289 struct nouveau_channel *chan = *pchan; 289 struct nouveau_channel *chan = *pchan;
290 struct drm_device *dev = chan->dev; 290 struct drm_device *dev = chan->dev;
291 struct drm_nouveau_private *dev_priv = dev->dev_private; 291 struct drm_nouveau_private *dev_priv = dev->dev_private;
292 struct nouveau_fence_priv *fence = dev_priv->fence.func;
292 unsigned long flags; 293 unsigned long flags;
293 int i; 294 int i;
294 295
@@ -311,6 +312,9 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
311 dev_priv->eng[i]->context_del(chan, i); 312 dev_priv->eng[i]->context_del(chan, i);
312 } 313 }
313 314
315 if (chan->fence)
316 fence->context_del(chan);
317
314 /* aside from its resources, the channel should now be dead, 318 /* aside from its resources, the channel should now be dead,
315 * remove it from the channel list 319 * remove it from the channel list
316 */ 320 */
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index 4b90f12575b9..db150d9e0cd4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -33,6 +33,7 @@
33#include "nouveau_hw.h" 33#include "nouveau_hw.h"
34#include "nouveau_fb.h" 34#include "nouveau_fb.h"
35#include "nouveau_fbcon.h" 35#include "nouveau_fbcon.h"
36#include "nouveau_fence.h"
36#include "nouveau_pm.h" 37#include "nouveau_pm.h"
37#include <engine/fifo.h> 38#include <engine/fifo.h>
38#include "nv50_display.h" 39#include "nv50_display.h"
@@ -149,6 +150,7 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
149 struct drm_device *dev = pci_get_drvdata(pdev); 150 struct drm_device *dev = pci_get_drvdata(pdev);
150 struct drm_nouveau_private *dev_priv = dev->dev_private; 151 struct drm_nouveau_private *dev_priv = dev->dev_private;
151 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); 152 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
153 struct nouveau_fence_priv *fence = dev_priv->fence.func;
152 struct nouveau_channel *chan; 154 struct nouveau_channel *chan;
153 struct drm_crtc *crtc; 155 struct drm_crtc *crtc;
154 int ret, i, e; 156 int ret, i, e;
@@ -188,6 +190,11 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
188 nouveau_channel_idle(chan); 190 nouveau_channel_idle(chan);
189 } 191 }
190 192
193 if (fence->suspend) {
194 if (!fence->suspend(dev))
195 return -ENOMEM;
196 }
197
191 for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) { 198 for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
192 if (!dev_priv->eng[e]) 199 if (!dev_priv->eng[e])
193 continue; 200 continue;
@@ -216,6 +223,7 @@ nouveau_pci_resume(struct pci_dev *pdev)
216 struct drm_device *dev = pci_get_drvdata(pdev); 223 struct drm_device *dev = pci_get_drvdata(pdev);
217 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); 224 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
218 struct drm_nouveau_private *dev_priv = dev->dev_private; 225 struct drm_nouveau_private *dev_priv = dev->dev_private;
226 struct nouveau_fence_priv *fence = dev_priv->fence.func;
219 struct nouveau_engine *engine = &dev_priv->engine; 227 struct nouveau_engine *engine = &dev_priv->engine;
220 struct drm_crtc *crtc; 228 struct drm_crtc *crtc;
221 int ret, i; 229 int ret, i;
@@ -234,6 +242,9 @@ nouveau_pci_resume(struct pci_dev *pdev)
234 dev_priv->eng[i]->init(dev, i); 242 dev_priv->eng[i]->init(dev, i);
235 } 243 }
236 244
245 if (fence->resume)
246 fence->resume(dev);
247
237 nouveau_irq_postinstall(dev); 248 nouveau_irq_postinstall(dev);
238 249
239 /* Re-write SKIPS, they'll have been lost over the suspend */ 250 /* Re-write SKIPS, they'll have been lost over the suspend */
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 290b7c2e2f79..42ea8ad5b911 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -133,7 +133,6 @@ enum nouveau_flags {
133#define NVOBJ_ENGINE_BSP 6 133#define NVOBJ_ENGINE_BSP 6
134#define NVOBJ_ENGINE_VP 7 134#define NVOBJ_ENGINE_VP 7
135#define NVOBJ_ENGINE_FIFO 14 135#define NVOBJ_ENGINE_FIFO 14
136#define NVOBJ_ENGINE_FENCE 15
137#define NVOBJ_ENGINE_NR 16 136#define NVOBJ_ENGINE_NR 16
138#define NVOBJ_ENGINE_DISPLAY (NVOBJ_ENGINE_NR + 0) /*XXX*/ 137#define NVOBJ_ENGINE_DISPLAY (NVOBJ_ENGINE_NR + 0) /*XXX*/
139 138
@@ -189,6 +188,7 @@ struct nouveau_channel {
189 188
190 /* Execution engine contexts */ 189 /* Execution engine contexts */
191 void *engctx[NVOBJ_ENGINE_NR]; 190 void *engctx[NVOBJ_ENGINE_NR];
191 void *fence;
192 192
193 /* NV50 VM */ 193 /* NV50 VM */
194 struct nouveau_vm *vm; 194 struct nouveau_vm *vm;
@@ -448,6 +448,7 @@ struct drm_nouveau_private {
448 u32 crystal; 448 u32 crystal;
449 449
450 struct nouveau_exec_engine *eng[NVOBJ_ENGINE_NR]; 450 struct nouveau_exec_engine *eng[NVOBJ_ENGINE_NR];
451
451 struct list_head classes; 452 struct list_head classes;
452 453
453 struct nouveau_bo *vga_ram; 454 struct nouveau_bo *vga_ram;
@@ -467,6 +468,7 @@ struct drm_nouveau_private {
467 } ttm; 468 } ttm;
468 469
469 struct { 470 struct {
471 void *func;
470 spinlock_t lock; 472 spinlock_t lock;
471 struct drm_mm heap; 473 struct drm_mm heap;
472 struct nouveau_bo *bo; 474 struct nouveau_bo *bo;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index a91d6e859889..9775458aff48 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -62,8 +62,9 @@ void
62nouveau_fence_update(struct nouveau_channel *chan) 62nouveau_fence_update(struct nouveau_channel *chan)
63{ 63{
64 struct drm_device *dev = chan->dev; 64 struct drm_device *dev = chan->dev;
65 struct nouveau_fence_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FENCE); 65 struct drm_nouveau_private *dev_priv = dev->dev_private;
66 struct nouveau_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 66 struct nouveau_fence_priv *priv = dev_priv->fence.func;
67 struct nouveau_fence_chan *fctx = chan->fence;
67 struct nouveau_fence *fence, *fnext; 68 struct nouveau_fence *fence, *fnext;
68 69
69 spin_lock(&fctx->lock); 70 spin_lock(&fctx->lock);
@@ -84,8 +85,9 @@ int
84nouveau_fence_emit(struct nouveau_fence *fence, struct nouveau_channel *chan) 85nouveau_fence_emit(struct nouveau_fence *fence, struct nouveau_channel *chan)
85{ 86{
86 struct drm_device *dev = chan->dev; 87 struct drm_device *dev = chan->dev;
87 struct nouveau_fence_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FENCE); 88 struct drm_nouveau_private *dev_priv = dev->dev_private;
88 struct nouveau_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 89 struct nouveau_fence_priv *priv = dev_priv->fence.func;
90 struct nouveau_fence_chan *fctx = chan->fence;
89 int ret; 91 int ret;
90 92
91 fence->channel = chan; 93 fence->channel = chan;
@@ -148,7 +150,8 @@ int
148nouveau_fence_sync(struct nouveau_fence *fence, struct nouveau_channel *chan) 150nouveau_fence_sync(struct nouveau_fence *fence, struct nouveau_channel *chan)
149{ 151{
150 struct drm_device *dev = chan->dev; 152 struct drm_device *dev = chan->dev;
151 struct nouveau_fence_priv *priv = nv_engine(dev, NVOBJ_ENGINE_FENCE); 153 struct drm_nouveau_private *dev_priv = dev->dev_private;
154 struct nouveau_fence_priv *priv = dev_priv->fence.func;
152 struct nouveau_channel *prev; 155 struct nouveau_channel *prev;
153 int ret = 0; 156 int ret = 0;
154 157
@@ -193,7 +196,7 @@ nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence)
193 struct nouveau_fence *fence; 196 struct nouveau_fence *fence;
194 int ret = 0; 197 int ret = 0;
195 198
196 if (unlikely(!chan->engctx[NVOBJ_ENGINE_FENCE])) 199 if (unlikely(!chan->fence))
197 return -ENODEV; 200 return -ENODEV;
198 201
199 fence = kzalloc(sizeof(*fence), GFP_KERNEL); 202 fence = kzalloc(sizeof(*fence), GFP_KERNEL);
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.h b/drivers/gpu/drm/nouveau/nouveau_fence.h
index 82ba733393ae..690f46536a70 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.h
@@ -32,11 +32,15 @@ struct nouveau_fence_chan {
32}; 32};
33 33
34struct nouveau_fence_priv { 34struct nouveau_fence_priv {
35 struct nouveau_exec_engine engine; 35 void (*dtor)(struct drm_device *);
36 int (*emit)(struct nouveau_fence *); 36 bool (*suspend)(struct drm_device *);
37 int (*sync)(struct nouveau_fence *, struct nouveau_channel *, 37 void (*resume)(struct drm_device *);
38 struct nouveau_channel *); 38 int (*context_new)(struct nouveau_channel *);
39 u32 (*read)(struct nouveau_channel *); 39 void (*context_del)(struct nouveau_channel *);
40 int (*emit)(struct nouveau_fence *);
41 int (*sync)(struct nouveau_fence *, struct nouveau_channel *,
42 struct nouveau_channel *);
43 u32 (*read)(struct nouveau_channel *);
40}; 44};
41 45
42void nouveau_fence_context_new(struct nouveau_fence_chan *); 46void nouveau_fence_context_new(struct nouveau_fence_chan *);
diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c b/drivers/gpu/drm/nouveau/nv04_fence.c
index 78d851f7192b..1b45a4f8c0a5 100644
--- a/drivers/gpu/drm/nouveau/nv04_fence.c
+++ b/drivers/gpu/drm/nouveau/nv04_fence.c
@@ -60,7 +60,7 @@ nv04_fence_sync(struct nouveau_fence *fence,
60int 60int
61nv04_fence_mthd(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data) 61nv04_fence_mthd(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
62{ 62{
63 struct nv04_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 63 struct nv04_fence_chan *fctx = chan->fence;
64 atomic_set(&fctx->sequence, data); 64 atomic_set(&fctx->sequence, data);
65 return 0; 65 return 0;
66} 66}
@@ -68,51 +68,39 @@ nv04_fence_mthd(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
68static u32 68static u32
69nv04_fence_read(struct nouveau_channel *chan) 69nv04_fence_read(struct nouveau_channel *chan)
70{ 70{
71 struct nv04_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 71 struct nv04_fence_chan *fctx = chan->fence;
72 return atomic_read(&fctx->sequence); 72 return atomic_read(&fctx->sequence);
73} 73}
74 74
75static void 75static void
76nv04_fence_context_del(struct nouveau_channel *chan, int engine) 76nv04_fence_context_del(struct nouveau_channel *chan)
77{ 77{
78 struct nv04_fence_chan *fctx = chan->engctx[engine]; 78 struct nv04_fence_chan *fctx = chan->fence;
79 nouveau_fence_context_del(&fctx->base); 79 nouveau_fence_context_del(&fctx->base);
80 chan->engctx[engine] = NULL; 80 chan->fence = NULL;
81 kfree(fctx); 81 kfree(fctx);
82} 82}
83 83
84static int 84static int
85nv04_fence_context_new(struct nouveau_channel *chan, int engine) 85nv04_fence_context_new(struct nouveau_channel *chan)
86{ 86{
87 struct nv04_fence_chan *fctx = kzalloc(sizeof(*fctx), GFP_KERNEL); 87 struct nv04_fence_chan *fctx = kzalloc(sizeof(*fctx), GFP_KERNEL);
88 if (fctx) { 88 if (fctx) {
89 nouveau_fence_context_new(&fctx->base); 89 nouveau_fence_context_new(&fctx->base);
90 atomic_set(&fctx->sequence, 0); 90 atomic_set(&fctx->sequence, 0);
91 chan->engctx[engine] = fctx; 91 chan->fence = fctx;
92 return 0; 92 return 0;
93 } 93 }
94 return -ENOMEM; 94 return -ENOMEM;
95} 95}
96 96
97static int
98nv04_fence_fini(struct drm_device *dev, int engine, bool suspend)
99{
100 return 0;
101}
102
103static int
104nv04_fence_init(struct drm_device *dev, int engine)
105{
106 return 0;
107}
108
109static void 97static void
110nv04_fence_destroy(struct drm_device *dev, int engine) 98nv04_fence_destroy(struct drm_device *dev)
111{ 99{
112 struct drm_nouveau_private *dev_priv = dev->dev_private; 100 struct drm_nouveau_private *dev_priv = dev->dev_private;
113 struct nv04_fence_priv *priv = nv_engine(dev, engine); 101 struct nv04_fence_priv *priv = dev_priv->fence.func;
114 102
115 dev_priv->eng[engine] = NULL; 103 dev_priv->fence.func = NULL;
116 kfree(priv); 104 kfree(priv);
117} 105}
118 106
@@ -127,14 +115,12 @@ nv04_fence_create(struct drm_device *dev)
127 if (!priv) 115 if (!priv)
128 return -ENOMEM; 116 return -ENOMEM;
129 117
130 priv->base.engine.destroy = nv04_fence_destroy; 118 priv->base.dtor = nv04_fence_destroy;
131 priv->base.engine.init = nv04_fence_init; 119 priv->base.context_new = nv04_fence_context_new;
132 priv->base.engine.fini = nv04_fence_fini; 120 priv->base.context_del = nv04_fence_context_del;
133 priv->base.engine.context_new = nv04_fence_context_new;
134 priv->base.engine.context_del = nv04_fence_context_del;
135 priv->base.emit = nv04_fence_emit; 121 priv->base.emit = nv04_fence_emit;
136 priv->base.sync = nv04_fence_sync; 122 priv->base.sync = nv04_fence_sync;
137 priv->base.read = nv04_fence_read; 123 priv->base.read = nv04_fence_read;
138 dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; 124 dev_priv->fence.func = &priv->base;
139 return ret; 125 return ret;
140} 126}
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c
index 8ff9fbabc331..4dac16a9c7f7 100644
--- a/drivers/gpu/drm/nouveau/nv10_fence.c
+++ b/drivers/gpu/drm/nouveau/nv10_fence.c
@@ -64,7 +64,8 @@ static int
64nv17_fence_sync(struct nouveau_fence *fence, 64nv17_fence_sync(struct nouveau_fence *fence,
65 struct nouveau_channel *prev, struct nouveau_channel *chan) 65 struct nouveau_channel *prev, struct nouveau_channel *chan)
66{ 66{
67 struct nv10_fence_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_FENCE); 67 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
68 struct nv10_fence_priv *priv = dev_priv->fence.func;
68 u32 value; 69 u32 value;
69 int ret; 70 int ret;
70 71
@@ -106,23 +107,24 @@ nv10_fence_read(struct nouveau_channel *chan)
106} 107}
107 108
108static void 109static void
109nv10_fence_context_del(struct nouveau_channel *chan, int engine) 110nv10_fence_context_del(struct nouveau_channel *chan)
110{ 111{
111 struct nv10_fence_chan *fctx = chan->engctx[engine]; 112 struct nv10_fence_chan *fctx = chan->fence;
112 nouveau_fence_context_del(&fctx->base); 113 nouveau_fence_context_del(&fctx->base);
113 chan->engctx[engine] = NULL; 114 chan->fence = NULL;
114 kfree(fctx); 115 kfree(fctx);
115} 116}
116 117
117static int 118static int
118nv10_fence_context_new(struct nouveau_channel *chan, int engine) 119nv10_fence_context_new(struct nouveau_channel *chan)
119{ 120{
120 struct nv10_fence_priv *priv = nv_engine(chan->dev, engine); 121 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
122 struct nv10_fence_priv *priv = dev_priv->fence.func;
121 struct nv10_fence_chan *fctx; 123 struct nv10_fence_chan *fctx;
122 struct nouveau_gpuobj *obj; 124 struct nouveau_gpuobj *obj;
123 int ret = 0; 125 int ret = 0;
124 126
125 fctx = chan->engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL); 127 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
126 if (!fctx) 128 if (!fctx)
127 return -ENOMEM; 129 return -ENOMEM;
128 130
@@ -142,30 +144,18 @@ nv10_fence_context_new(struct nouveau_channel *chan, int engine)
142 } 144 }
143 145
144 if (ret) 146 if (ret)
145 nv10_fence_context_del(chan, engine); 147 nv10_fence_context_del(chan);
146 return ret; 148 return ret;
147} 149}
148 150
149static int
150nv10_fence_fini(struct drm_device *dev, int engine, bool suspend)
151{
152 return 0;
153}
154
155static int
156nv10_fence_init(struct drm_device *dev, int engine)
157{
158 return 0;
159}
160
161static void 151static void
162nv10_fence_destroy(struct drm_device *dev, int engine) 152nv10_fence_destroy(struct drm_device *dev)
163{ 153{
164 struct drm_nouveau_private *dev_priv = dev->dev_private; 154 struct drm_nouveau_private *dev_priv = dev->dev_private;
165 struct nv10_fence_priv *priv = nv_engine(dev, engine); 155 struct nv10_fence_priv *priv = dev_priv->fence.func;
166 156
167 nouveau_bo_ref(NULL, &priv->bo); 157 nouveau_bo_ref(NULL, &priv->bo);
168 dev_priv->eng[engine] = NULL; 158 dev_priv->fence.func = NULL;
169 kfree(priv); 159 kfree(priv);
170} 160}
171 161
@@ -180,15 +170,13 @@ nv10_fence_create(struct drm_device *dev)
180 if (!priv) 170 if (!priv)
181 return -ENOMEM; 171 return -ENOMEM;
182 172
183 priv->base.engine.destroy = nv10_fence_destroy; 173 priv->base.dtor = nv10_fence_destroy;
184 priv->base.engine.init = nv10_fence_init; 174 priv->base.context_new = nv10_fence_context_new;
185 priv->base.engine.fini = nv10_fence_fini; 175 priv->base.context_del = nv10_fence_context_del;
186 priv->base.engine.context_new = nv10_fence_context_new;
187 priv->base.engine.context_del = nv10_fence_context_del;
188 priv->base.emit = nv10_fence_emit; 176 priv->base.emit = nv10_fence_emit;
189 priv->base.read = nv10_fence_read; 177 priv->base.read = nv10_fence_read;
190 priv->base.sync = nv10_fence_sync; 178 priv->base.sync = nv10_fence_sync;
191 dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; 179 dev_priv->fence.func = &priv->base;
192 spin_lock_init(&priv->lock); 180 spin_lock_init(&priv->lock);
193 181
194 if (dev_priv->chipset >= 0x17) { 182 if (dev_priv->chipset >= 0x17) {
@@ -209,6 +197,6 @@ nv10_fence_create(struct drm_device *dev)
209 } 197 }
210 198
211 if (ret) 199 if (ret)
212 nv10_fence_destroy(dev, NVOBJ_ENGINE_FENCE); 200 nv10_fence_destroy(dev);
213 return ret; 201 return ret;
214} 202}
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index 721716aacbe0..a1812cab19dc 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -78,28 +78,30 @@ nv84_fence_sync(struct nouveau_fence *fence,
78static u32 78static u32
79nv84_fence_read(struct nouveau_channel *chan) 79nv84_fence_read(struct nouveau_channel *chan)
80{ 80{
81 struct nv84_fence_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_FENCE); 81 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
82 struct nv84_fence_priv *priv = dev_priv->fence.func;
82 return nv_ro32(priv->mem, chan->id * 16); 83 return nv_ro32(priv->mem, chan->id * 16);
83} 84}
84 85
85static void 86static void
86nv84_fence_context_del(struct nouveau_channel *chan, int engine) 87nv84_fence_context_del(struct nouveau_channel *chan)
87{ 88{
88 struct nv84_fence_chan *fctx = chan->engctx[engine]; 89 struct nv84_fence_chan *fctx = chan->fence;
89 nouveau_fence_context_del(&fctx->base); 90 nouveau_fence_context_del(&fctx->base);
90 chan->engctx[engine] = NULL; 91 chan->fence = NULL;
91 kfree(fctx); 92 kfree(fctx);
92} 93}
93 94
94static int 95static int
95nv84_fence_context_new(struct nouveau_channel *chan, int engine) 96nv84_fence_context_new(struct nouveau_channel *chan)
96{ 97{
97 struct nv84_fence_priv *priv = nv_engine(chan->dev, engine); 98 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
99 struct nv84_fence_priv *priv = dev_priv->fence.func;
98 struct nv84_fence_chan *fctx; 100 struct nv84_fence_chan *fctx;
99 struct nouveau_gpuobj *obj; 101 struct nouveau_gpuobj *obj;
100 int ret; 102 int ret;
101 103
102 fctx = chan->engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL); 104 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
103 if (!fctx) 105 if (!fctx)
104 return -ENOMEM; 106 return -ENOMEM;
105 107
@@ -116,30 +118,18 @@ nv84_fence_context_new(struct nouveau_channel *chan, int engine)
116 } 118 }
117 119
118 if (ret) 120 if (ret)
119 nv84_fence_context_del(chan, engine); 121 nv84_fence_context_del(chan);
120 return ret; 122 return ret;
121} 123}
122 124
123static int
124nv84_fence_fini(struct drm_device *dev, int engine, bool suspend)
125{
126 return 0;
127}
128
129static int
130nv84_fence_init(struct drm_device *dev, int engine)
131{
132 return 0;
133}
134
135static void 125static void
136nv84_fence_destroy(struct drm_device *dev, int engine) 126nv84_fence_destroy(struct drm_device *dev)
137{ 127{
138 struct drm_nouveau_private *dev_priv = dev->dev_private; 128 struct drm_nouveau_private *dev_priv = dev->dev_private;
139 struct nv84_fence_priv *priv = nv_engine(dev, engine); 129 struct nv84_fence_priv *priv = dev_priv->fence.func;
140 130
141 nouveau_gpuobj_ref(NULL, &priv->mem); 131 nouveau_gpuobj_ref(NULL, &priv->mem);
142 dev_priv->eng[engine] = NULL; 132 dev_priv->fence.func = NULL;
143 kfree(priv); 133 kfree(priv);
144} 134}
145 135
@@ -155,15 +145,13 @@ nv84_fence_create(struct drm_device *dev)
155 if (!priv) 145 if (!priv)
156 return -ENOMEM; 146 return -ENOMEM;
157 147
158 priv->base.engine.destroy = nv84_fence_destroy; 148 priv->base.dtor = nv84_fence_destroy;
159 priv->base.engine.init = nv84_fence_init; 149 priv->base.context_new = nv84_fence_context_new;
160 priv->base.engine.fini = nv84_fence_fini; 150 priv->base.context_del = nv84_fence_context_del;
161 priv->base.engine.context_new = nv84_fence_context_new;
162 priv->base.engine.context_del = nv84_fence_context_del;
163 priv->base.emit = nv84_fence_emit; 151 priv->base.emit = nv84_fence_emit;
164 priv->base.sync = nv84_fence_sync; 152 priv->base.sync = nv84_fence_sync;
165 priv->base.read = nv84_fence_read; 153 priv->base.read = nv84_fence_read;
166 dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; 154 dev_priv->fence.func = priv;
167 155
168 ret = nouveau_gpuobj_new(dev, NULL, 16 * pfifo->channels, 156 ret = nouveau_gpuobj_new(dev, NULL, 16 * pfifo->channels,
169 0x1000, 0, &priv->mem); 157 0x1000, 0, &priv->mem);
@@ -172,6 +160,6 @@ nv84_fence_create(struct drm_device *dev)
172 160
173out: 161out:
174 if (ret) 162 if (ret)
175 nv84_fence_destroy(dev, NVOBJ_ENGINE_FENCE); 163 nv84_fence_destroy(dev);
176 return ret; 164 return ret;
177} 165}
diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c
index 79bb31ed6c8b..d53ae32caea3 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fence.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fence.c
@@ -44,7 +44,7 @@ static int
44nvc0_fence_emit(struct nouveau_fence *fence) 44nvc0_fence_emit(struct nouveau_fence *fence)
45{ 45{
46 struct nouveau_channel *chan = fence->channel; 46 struct nouveau_channel *chan = fence->channel;
47 struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 47 struct nvc0_fence_chan *fctx = chan->fence;
48 u64 addr = fctx->vma.offset + chan->id * 16; 48 u64 addr = fctx->vma.offset + chan->id * 16;
49 int ret; 49 int ret;
50 50
@@ -65,7 +65,7 @@ static int
65nvc0_fence_sync(struct nouveau_fence *fence, 65nvc0_fence_sync(struct nouveau_fence *fence,
66 struct nouveau_channel *prev, struct nouveau_channel *chan) 66 struct nouveau_channel *prev, struct nouveau_channel *chan)
67{ 67{
68 struct nvc0_fence_chan *fctx = chan->engctx[NVOBJ_ENGINE_FENCE]; 68 struct nvc0_fence_chan *fctx = chan->fence;
69 u64 addr = fctx->vma.offset + prev->id * 16; 69 u64 addr = fctx->vma.offset + prev->id * 16;
70 int ret; 70 int ret;
71 71
@@ -86,30 +86,33 @@ nvc0_fence_sync(struct nouveau_fence *fence,
86static u32 86static u32
87nvc0_fence_read(struct nouveau_channel *chan) 87nvc0_fence_read(struct nouveau_channel *chan)
88{ 88{
89 struct nvc0_fence_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_FENCE); 89 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
90 struct nvc0_fence_priv *priv = dev_priv->fence.func;
90 return nouveau_bo_rd32(priv->bo, chan->id * 16/4); 91 return nouveau_bo_rd32(priv->bo, chan->id * 16/4);
91} 92}
92 93
93static void 94static void
94nvc0_fence_context_del(struct nouveau_channel *chan, int engine) 95nvc0_fence_context_del(struct nouveau_channel *chan)
95{ 96{
96 struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine); 97 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
97 struct nvc0_fence_chan *fctx = chan->engctx[engine]; 98 struct nvc0_fence_priv *priv = dev_priv->fence.func;
99 struct nvc0_fence_chan *fctx = chan->fence;
98 100
99 nouveau_bo_vma_del(priv->bo, &fctx->vma); 101 nouveau_bo_vma_del(priv->bo, &fctx->vma);
100 nouveau_fence_context_del(&fctx->base); 102 nouveau_fence_context_del(&fctx->base);
101 chan->engctx[engine] = NULL; 103 chan->fence = NULL;
102 kfree(fctx); 104 kfree(fctx);
103} 105}
104 106
105static int 107static int
106nvc0_fence_context_new(struct nouveau_channel *chan, int engine) 108nvc0_fence_context_new(struct nouveau_channel *chan)
107{ 109{
108 struct nvc0_fence_priv *priv = nv_engine(chan->dev, engine); 110 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
111 struct nvc0_fence_priv *priv = dev_priv->fence.func;
109 struct nvc0_fence_chan *fctx; 112 struct nvc0_fence_chan *fctx;
110 int ret; 113 int ret;
111 114
112 fctx = chan->engctx[engine] = kzalloc(sizeof(*fctx), GFP_KERNEL); 115 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
113 if (!fctx) 116 if (!fctx)
114 return -ENOMEM; 117 return -ENOMEM;
115 118
@@ -117,36 +120,35 @@ nvc0_fence_context_new(struct nouveau_channel *chan, int engine)
117 120
118 ret = nouveau_bo_vma_add(priv->bo, chan->vm, &fctx->vma); 121 ret = nouveau_bo_vma_add(priv->bo, chan->vm, &fctx->vma);
119 if (ret) 122 if (ret)
120 nvc0_fence_context_del(chan, engine); 123 nvc0_fence_context_del(chan);
121 124
122 nouveau_bo_wr32(priv->bo, chan->id * 16/4, 0x00000000); 125 nouveau_bo_wr32(priv->bo, chan->id * 16/4, 0x00000000);
123 return ret; 126 return ret;
124} 127}
125 128
126static int 129static bool
127nvc0_fence_fini(struct drm_device *dev, int engine, bool suspend) 130nvc0_fence_suspend(struct drm_device *dev)
128{ 131{
129 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); 132 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
130 struct nvc0_fence_priv *priv = nv_engine(dev, engine); 133 struct drm_nouveau_private *dev_priv = dev->dev_private;
134 struct nvc0_fence_priv *priv = dev_priv->fence.func;
131 int i; 135 int i;
132 136
133 if (suspend) { 137 priv->suspend = vmalloc(pfifo->channels * sizeof(u32));
134 priv->suspend = vmalloc(pfifo->channels * sizeof(u32)); 138 if (priv->suspend) {
135 if (!priv->suspend)
136 return -ENOMEM;
137
138 for (i = 0; i < pfifo->channels; i++) 139 for (i = 0; i < pfifo->channels; i++)
139 priv->suspend[i] = nouveau_bo_rd32(priv->bo, i); 140 priv->suspend[i] = nouveau_bo_rd32(priv->bo, i);
140 } 141 }
141 142
142 return 0; 143 return priv->suspend != NULL;
143} 144}
144 145
145static int 146static void
146nvc0_fence_init(struct drm_device *dev, int engine) 147nvc0_fence_resume(struct drm_device *dev)
147{ 148{
148 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO); 149 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
149 struct nvc0_fence_priv *priv = nv_engine(dev, engine); 150 struct drm_nouveau_private *dev_priv = dev->dev_private;
151 struct nvc0_fence_priv *priv = dev_priv->fence.func;
150 int i; 152 int i;
151 153
152 if (priv->suspend) { 154 if (priv->suspend) {
@@ -155,19 +157,17 @@ nvc0_fence_init(struct drm_device *dev, int engine)
155 vfree(priv->suspend); 157 vfree(priv->suspend);
156 priv->suspend = NULL; 158 priv->suspend = NULL;
157 } 159 }
158
159 return 0;
160} 160}
161 161
162static void 162static void
163nvc0_fence_destroy(struct drm_device *dev, int engine) 163nvc0_fence_destroy(struct drm_device *dev)
164{ 164{
165 struct drm_nouveau_private *dev_priv = dev->dev_private; 165 struct drm_nouveau_private *dev_priv = dev->dev_private;
166 struct nvc0_fence_priv *priv = nv_engine(dev, engine); 166 struct nvc0_fence_priv *priv = dev_priv->fence.func;
167 167
168 nouveau_bo_unmap(priv->bo); 168 nouveau_bo_unmap(priv->bo);
169 nouveau_bo_ref(NULL, &priv->bo); 169 nouveau_bo_ref(NULL, &priv->bo);
170 dev_priv->eng[engine] = NULL; 170 dev_priv->fence.func = NULL;
171 kfree(priv); 171 kfree(priv);
172} 172}
173 173
@@ -183,15 +183,15 @@ nvc0_fence_create(struct drm_device *dev)
183 if (!priv) 183 if (!priv)
184 return -ENOMEM; 184 return -ENOMEM;
185 185
186 priv->base.engine.destroy = nvc0_fence_destroy; 186 priv->base.dtor = nvc0_fence_destroy;
187 priv->base.engine.init = nvc0_fence_init; 187 priv->base.suspend = nvc0_fence_suspend;
188 priv->base.engine.fini = nvc0_fence_fini; 188 priv->base.resume = nvc0_fence_resume;
189 priv->base.engine.context_new = nvc0_fence_context_new; 189 priv->base.context_new = nvc0_fence_context_new;
190 priv->base.engine.context_del = nvc0_fence_context_del; 190 priv->base.context_del = nvc0_fence_context_del;
191 priv->base.emit = nvc0_fence_emit; 191 priv->base.emit = nvc0_fence_emit;
192 priv->base.sync = nvc0_fence_sync; 192 priv->base.sync = nvc0_fence_sync;
193 priv->base.read = nvc0_fence_read; 193 priv->base.read = nvc0_fence_read;
194 dev_priv->eng[NVOBJ_ENGINE_FENCE] = &priv->base.engine; 194 dev_priv->fence.func = priv;
195 195
196 ret = nouveau_bo_new(dev, 16 * pfifo->channels, 0, TTM_PL_FLAG_VRAM, 196 ret = nouveau_bo_new(dev, 16 * pfifo->channels, 0, TTM_PL_FLAG_VRAM,
197 0, 0, NULL, &priv->bo); 197 0, 0, NULL, &priv->bo);
@@ -204,6 +204,6 @@ nvc0_fence_create(struct drm_device *dev)
204 } 204 }
205 205
206 if (ret) 206 if (ret)
207 nvc0_fence_destroy(dev, NVOBJ_ENGINE_FENCE); 207 nvc0_fence_destroy(dev);
208 return ret; 208 return ret;
209} 209}