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authorBen Skeggs <bskeggs@redhat.com>2013-02-13 22:20:17 -0500
committerBen Skeggs <bskeggs@redhat.com>2013-02-20 01:00:53 -0500
commit827520ce06568f699dad275dcca61647cce08757 (patch)
tree707c9ab051ca1bd8a14f14fb153510c7fbf133c3 /drivers/gpu/drm/nouveau/nv84_fence.c
parent60e5cb79cbd27a36836fc04177d7c323ee873563 (diff)
drm/nouveau/fence: make internal hooks part of the context
A step towards being able to provide fences from other engines not connected to PFIFO. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv84_fence.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv84_fence.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index 8a80ad7c0cf5..bc6493c1a1ef 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -80,22 +80,20 @@ int
80nv84_fence_emit(struct nouveau_fence *fence) 80nv84_fence_emit(struct nouveau_fence *fence)
81{ 81{
82 struct nouveau_channel *chan = fence->channel; 82 struct nouveau_channel *chan = fence->channel;
83 struct nv84_fence_priv *priv = chan->drm->fence;
84 struct nv84_fence_chan *fctx = chan->fence; 83 struct nv84_fence_chan *fctx = chan->fence;
85 struct nouveau_fifo_chan *fifo = (void *)chan->object; 84 struct nouveau_fifo_chan *fifo = (void *)chan->object;
86 u64 addr = fctx->vma.offset + fifo->chid * 16; 85 u64 addr = fctx->vma.offset + fifo->chid * 16;
87 return priv->base.emit32(chan, addr, fence->sequence); 86 return fctx->base.emit32(chan, addr, fence->sequence);
88} 87}
89 88
90int 89int
91nv84_fence_sync(struct nouveau_fence *fence, 90nv84_fence_sync(struct nouveau_fence *fence,
92 struct nouveau_channel *prev, struct nouveau_channel *chan) 91 struct nouveau_channel *prev, struct nouveau_channel *chan)
93{ 92{
94 struct nv84_fence_priv *priv = chan->drm->fence;
95 struct nv84_fence_chan *fctx = chan->fence; 93 struct nv84_fence_chan *fctx = chan->fence;
96 struct nouveau_fifo_chan *fifo = (void *)prev->object; 94 struct nouveau_fifo_chan *fifo = (void *)prev->object;
97 u64 addr = fctx->vma.offset + fifo->chid * 16; 95 u64 addr = fctx->vma.offset + fifo->chid * 16;
98 return priv->base.sync32(chan, addr, fence->sequence); 96 return fctx->base.sync32(chan, addr, fence->sequence);
99} 97}
100 98
101u32 99u32
@@ -139,6 +137,11 @@ nv84_fence_context_new(struct nouveau_channel *chan)
139 return -ENOMEM; 137 return -ENOMEM;
140 138
141 nouveau_fence_context_new(&fctx->base); 139 nouveau_fence_context_new(&fctx->base);
140 fctx->base.emit = nv84_fence_emit;
141 fctx->base.sync = nv84_fence_sync;
142 fctx->base.read = nv84_fence_read;
143 fctx->base.emit32 = nv84_fence_emit32;
144 fctx->base.sync32 = nv84_fence_sync32;
142 145
143 ret = nouveau_bo_vma_add(priv->bo, client->vm, &fctx->vma); 146 ret = nouveau_bo_vma_add(priv->bo, client->vm, &fctx->vma);
144 if (ret) 147 if (ret)
@@ -213,11 +216,6 @@ nv84_fence_create(struct nouveau_drm *drm)
213 priv->base.resume = nv84_fence_resume; 216 priv->base.resume = nv84_fence_resume;
214 priv->base.context_new = nv84_fence_context_new; 217 priv->base.context_new = nv84_fence_context_new;
215 priv->base.context_del = nv84_fence_context_del; 218 priv->base.context_del = nv84_fence_context_del;
216 priv->base.emit32 = nv84_fence_emit32;
217 priv->base.emit = nv84_fence_emit;
218 priv->base.sync32 = nv84_fence_sync32;
219 priv->base.sync = nv84_fence_sync;
220 priv->base.read = nv84_fence_read;
221 219
222 init_waitqueue_head(&priv->base.waiting); 220 init_waitqueue_head(&priv->base.waiting);
223 priv->base.uevent = true; 221 priv->base.uevent = true;